Consumer Microcircuits Limited FX818D5, FX818D2 Datasheet

CML Semiconductor Products

CTCSS Signalling Processor

FX818

D/818/4 July 1997

1.0 Features Provisional Issue

•• Fast CTCSS Detection •• Programmable Tone Decoder

•• Non Predictive Tone Detection •• Programmable Modulator Drivers

•• Low Power 3.3V/5V Operation •• Programmable Tone Encoders

•• Variable Gain Audio Filter •• Compact (SSOP and SOIC)

Packaging

1.1 Brief Description

The FX818 is an innovative CTCSS Codec designed for the latest generation of Land Mobile Radio equipment. The FX818 is full duplex and has many advanced features which assist the operation of modern CTCSS based systems. The FX818 is electrically, physically and software compatible with the FX828. It permits manufacturers to add new features to their equipment with minimal design changes.

The FX818 incorporates a programmable tone decoder which can be set to respond to between 1 and 15 CTCSS tones with minimum software intervention. In addition, a 'Fast' CTCSS detector can respond to a single programmed tone in 60ms, or can be used to provide an output if any CTCSS tone is present at the detector input. A high resolution tone encoder performs accurate generation of any CTCSS tone in current use. High pass and low pass filters are included to provide filtering for CTCSS and Voice band signals. On chip audio summation amplifier and digital adjustable modulator drivers ensure easy integration into equipment.

The FX818 along with the FX828 is offered in a choice of small SSOP and SOIC 24-pin packages. It may be used with 3.0 to 5.5 volt supply.

 1997 Consumer Microcircuits Limited

CTCSS Signalling Processor FX818

CONTENTS

Section Page

1.0 Features ..........................................................................................................1

1.2 Block Diagram................................................................................................3

1.3 Signal List.......................................................................................................4

1.4 External Components.................................................................................... 6

1.5 General Description....................................................................................... 7

1.5.1 Software Description.....................................................................7

1.6 Application Notes......................................................................................... 18

1.6.1 General..........................................................................................18

1.6.2 Transmitter ...................................................................................18

1.6.3 Receiver (Decode)........................................................................18

1.6.4 Receiver (Fast Detect) .................................................................19

1.6.5 General Purpose Timer................................................................19

1.6.6 Tx / Fast Rx Tone Table...............................................................19

1.6.7 Rx Program Tone Table...............................................................20

1.7 Performance Specification..........................................................................21

1.7.1 Electrical Performance ................................................................21

1.7.2 Packaging .....................................................................................26

Note: As this product is still in development, it is likely that a number of changes and additions will be made to

this specification. Items marked TBD or left blank will be included in later issues.

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1.2 Block Diagram

Figure 1 Block Diagram

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1.3 Signal List

Package

D2/D5

Signal Description

Pin No. Name Type

1 XTALN O/P The inverted output of the on-chip oscillator. 2 XTAL/CLOCK I/P The input to the on-chip oscillator, for external

Xtal circuit or clock.

3 SERIAL CLOCK I/P The "C-BUS" serial clock input. This clock,

produced by the µController, is used for transfer timing of commands and data to and from the device. See "C-BUS" Timing Diagram (Figure

4).

4 COMMAND DATA I/P The "C-BUS" serial data input from the

µController. Data is loaded into this device in 8-bit bytes, MSB (B7) first, and LSB (B0) last, synchronised to the SERIAL CLOCK. See "C-BUS" Timing Diagram (Figure 4).

5 REPLY DATA O/P The "C-BUS" serial data output to the

µController. The transmission of REPLY DATA bytes is synchronised to the SERIAL CLOCK under the control of the CSN input. This 3-state output is held at high impedance when not sending data to the µController. See "C-BUS" Timing Diagram (Figure 4).

6 CSN I/P The "C-BUS" data loading control function: this

input is provided by the µController. Data transfer sequences are initiated, completed or aborted by the CSN signal. See "C-BUS" Timing Diagram (Figure 4).

7 IRQN O/P This output indicates an interrupt condition to the

µController by going to a logic "0". This is a "wire-ORable" output, enabling the connection of up to 8 peripherals to 1 interrupt port on the µController. This pin has a low impedance pulldown to logic "0" when active and a highimpedance when inactive. An external pullup resistor is required.

The conditions that cause interrupts are indicated in the IRQ FLAG register and are effective if not masked out by a corresponding bit in the IRQ MASK register.

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1.3 Signal List (continued)

Package

D2/D5

Signal Description

Pin No. Name Type

8 NC ) No internal connection. Do not make 9 NC ) any connection to these pins.

10 A/D CAP O/P An internal reference voltage for the A to D,

decoupled to V

by an external capacitor.

11 NC No internal connection. Do not make any

connection to this pin. 12 V 13 V

BIAS

Power The negative supply rail (ground).

O/P A bias line for the internal circuitry, held at ½

. This pin must be decoupled by a capacitor

mounted close to the device pins. 14 RX AMP IN I/P The inverting input to the Rx input amplifier. 15 RX AMP OUT O/P The output of the Rx input amplifier and the input

to the audio filter section. 16 RX AUDIO OUT O/P Output of the Rx audio filter section. 17 NC No internal connection. Do not make any

connection to this pin. 18 SUM IN I/P Input to the audio summing amplifier. 19 SUM OUT O/P Output of the audio summing amplifier. 20 MOD1 IN I/P Input to MOD1 audio gain control. 21 TX SUB AUDIO OUT O/P Output of the CTCSS tone generator. 22 MOD1 O/P Output of MOD1 audio gain control. 23 MOD2 O/P Output of MOD2 audio gain control. 24 V

Power The positive supply rail. Levels and voltages are

dependent upon this supply. This pin should be

decoupled to V

by a capacitor.

Notes: I/P = Input

O/P = Output

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CTCSS Signalling Processor FX818

1.4 External Components

C1 22pF ±20% R1 1M ±5% X1 4.032MHz ±100ppm C2 22pF ±20% R2 100k C3 100pF ±20% R3 100k

±10%

±10% C4 0.1µF ±20% R4 Note 2 ±10% C5 100pF ±20% R5 22k

±10% C6 0.1µF ±20% R6 Note 1 ±10% C7 Note 2 ±20% C8 0.1µF ±20%

Notes: 1. R2, R6 and C3 form the gain components for the Summing Amplifier. R6 should be chosen as

required from the system specification, using the following formula:

Tx Sub Audio Gain =

−

2. R3, R4, C5 and C7 form the gain components for the Rx Input Amplifier. R4 should be chosen as required by the signal level, using the following formula:

Gain =

−

C7 x R4 should be chosen so as not to compromise the low frequency performance of this product.

Figure 2 Recommended External Components

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1.5 General Description

The FX818 is a programmable CTCSS sub-audio encoder/decoder for use in land mobile radio equipment, see Figure 1.

The receiver section of the FX818 has a fast/predictive tone detector which operates in parallel with a tone decoder. The latter decodes a user-programmable set of up to 15 tones and performs a more accurate (but slower) analysis of the tones detected by the fast/predictive tone detector, which is a single detector that is switchable to provide either a fast response to any CTCSS tone (FAST DETECT mode) or a fast response to a single user-programmed CTCSS tone (PREDICTIVE mode).

The high pass audio filter is designed to filter out the CTCSS sub-audio tones. The summing and modulation amplifiers allow the audio modulation to be controlled digitally via the C-BUS. A general purpose timer is included.

Each function, and the routing of signals, is flexible and may be configured or controlled by the user's software.

1.5.1 Software Description

Address/Commands

Instructions and data are transferred, via "C-BUS", in accordance with the timing information given in Figure 4.

Instruction and data transactions to and from the FX818 consist of an Address/Command (A/C) byte followed by either:

(i) a further instruction or data (1 or 2 bytes) or (ii) a status or Rx data reply (1 byte)

8-bit Write Only Registers

HEX

ADDRESS/

COMMAND

$01 GENERAL N/A N/A N/A N/A N/A N/A N/A N/A

$80 SUB-AUDIO TX DECODER

$82 SUB-AUDIO MSB LSB

$88 GENERAL BPF BPF 6dB TIMER TIMER

$8B PURPOSE MSB LSB

$8E IRQ IRQ IRQ FAST IRQ

NAME

RESET

CONTROL ENABLE ENABLE ENABLE

SET-UP BIT 3 BIT 2 BIT 1 BIT 0

CONTROL ENABLE UN-MUTE PAD 0 0 0 ENABLE RE-CYCLE GENERAL GENERAL PURPOSE TIMER

TIMER BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0

MASK 0 MASK 0 0 MASK MASK 0 0

BIT 7

(D7)

BIT 6

(D6)

CTCSS

CTCSS DECODER BANDWIDTH FAST CTCSS

GPT CTCSS CTCSS

BIT 5

(D5)

FAST

DETECT

BPF

BIT 4

(D4)

0 0 0 0 0

BIT 3

(D3)

MODE

DETECT/

PREDICTIVE

BIT 2

(D2)

0 0 0

BIT 1

(D1)

BIT 0

(D0)

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16-bit Write Only Registers

HEX

ADDRESS/

COMMAND

$83 FAST RX CTCSS (TX) MSB

$84 PROGRAM MSB LSB MSB

$8A AUDIO MOD 1

NAME

CTCSS TX/ CTCSS TX / FAST RX FREQUENCY

FREQUENCY (1) NOTONE 0 0 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8

CTCSS TX/ CTCSS TX / FAST RX FREQUENCY

FAST RX LSB

FREQUENCY (2) BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0

CTCSS RX CTCSS TONE ADDRESS CTCSS FREQUENCY

(1) BIT 3 BIT 2 BIT 1 BIT 0 BIT 11 BIT 10 BIT 9 BIT 8 CTCSS RX CTCSS FREQUENCY PROGRAM LSB

(2) BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0

CONTROL MOD 1 MSB LSB

(1) 0 0 ENABLE BIT 4 BIT 3 BIT 2 BIT 1 BIT 0

AUDIO MOD 2

CONTROL MOD 2 MSB LSB

(2) 0 0 ENABLE BIT 4 BIT 3 BIT 2 BIT 1 BIT 0

BIT 7

(D7)

BIT 6

(D6)

BIT 5

(D5)

BIT 4

(D4)

BIT 3

(D3)

BIT 2

(D2)

BIT 1

(D1)

BIT 0

(D0)

Write Only Register Description

GENERAL RESET (Hex address $01)

The reset command has no data attached to it. It sets the device registers into the specific (all powersaved) states as listed below:

ADDRESS

SUB-AUDIO CONTROL $80 0 0 0 0 0 0 0 0 SUB-AUDIO STATUS $81 0 0 0 0 X X X X SUB-AUDIO SET-UP $82 0 0 0 0 0 0 0 0 CTCSS TX / FAST RX

(1) $83 0 0 0 0 0 0 0 0 FREQUENCY CTCSS TX / FAST RX

(2) 0 0 0 0 0 0 0 0 FREQUENCY CTCSS RX PROGRAM (1) $84 0 0 0 0 0 0 0 0 CTCSS RX PROGRAM (2) 0 0 0 0 0 0 0 0 GENERAL CONTROL $88 0 0 0 0 0 0 0 0 AUDIO CONTROL (1) $8A 0 0 0 0 0 0 0 0 AUDIO CONTROL (2) 0 0 0 0 0 0 0 0 GENERAL PURPOSE TIMER $8B 0 0 0 0 0 0 0 0 IRQ MASK $8E 0 0 0 0 0 0 0 0 IRQ FLAG $8F 0 0 0 0 0 0 0 0

BIT 7

(D7)

BIT 6

(D6)

BIT 5

(D5)

BIT 4

(D4)

BIT 3

(D3)

BIT 2

(D2)

BIT 1

(D1)

BIT 0

D0)

X = undefined

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Consumer Microcircuits Limited FX818D5, FX818D2 Datasheet

Specifications and Main Features

Frequently Asked Questions

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