Consumer Microcircuits Limited FX663P3, FX663D4 Datasheet
CML Semiconductor Products
•
•
•
•
Call Progress Decoder FX663
D/663/2 March 1997
1.0 Features Provisional Issue
•• Decodes Call Progress Tones
Worldwide covering:
• Single and Dual Tones
• Fax and Modem
Answer/Originate Tones
• Special Information Tones
• Fast 'US Busy' Tone Detector
•• Low-Power (3 Volt) Operation
•• Adjustable Detection Threshold
•• Voice Detector
•• Standard 3.58MHz Xtal/Clock Input
•• 16-Pin SOIC and DIP Packages
1.1 Brief Description
The FX663 decodes the standard audible tone signals provided by telecom systems worldwide to indicate Dial,
Ringing, Busy, Unobtainable and other stages of a call attempt. It provides the key features needed for
intelligent, full-function, call progress monitoring by applications involving machine dialling or automatic call
placement. The FX663 also incorporates the following features:
• Single and dual tone decoding for better cross-system Call Progress monitoring.
• "US Busy" tone detector, saving time needed for "cadence verification" under Busy and Unobtainable
conditions. This incorporates a separate 620Hz detector for improved response.
• A detector to indicate speech and non-call progress signals; this reduces voice falsing of call progress
tones and adds Voice-Answer detection as a "connected" prompt.
• A fax and modem tone decoder.
• A separate, adjustable threshold, signal-level detector which reduces noise falsing.
The FX663 uses new digital signal processing techniques to provide these advantages. It is a low cost, low
power product with superior performance. It is available in industry standard 16-pin packages.
1997 Consumer Microcircuits Limited
Call Progress Decoder FX663
CONTENTS
Section Page
1.0 Features......................................................................................................1
1.1 Brief Description.........................................................................................1
1.3 Signal List...................................................................................................4
1.4 External Components.................................................................................6
1.5 General Description ...................................................................................7
1.5.1 Overall Function Description .....................................................7
1.5.2 Glossary ......................................................................................7
1.5.3 Block Diagram Description......................................................... 8
1.5.4 Decode Output Truth Table........................................................9
1.6 Application Notes.......................................................................................9
1.6.1 General ........................................................................................9
1.6.2 Typical Response...................................................................... 10
1.7 Performance Specification.......................................................................11
1.7.1 Electrical Performance.............................................................. 11
1.7.2 Packaging..................................................................................16
1997 Consumer Microcircuits Limited 2 D/663/2
Call Progress Decoder FX663
1.2 Block Diagram
VDD
VSS
VBIAS
(Componen ts
shownfor
unba lan cedi/p)
C4
SIGNAL
VSS
R1
C1
C2
C5
VBIAS
C3
X1
C7
C6
R2
VDD
VSS
VBIAS
AMPOP
AMPINV
AMPNINV
SIGIN
XTAL/CLOCK
XTALN
OPAMP
AMPLIFIER
CLOCK
OSCILLATOR
DIVIDERS
AND
SIGNAL
ANALYSER
LEVEL
DETECTO R
620Hz
DETECTOR
CALLPROGRESS
DETECTOR
CONTROL
AND
OUTPUT
LOGIC
ENABLE
CSN
IRQN
D0
D1
D2
D3
VDD
R3
Figure 1 Block Diagram
1997 Consumer Microcircuits Limited 3 D/663/2
Call Progress Decoder FX663
1.3 Signal List
Package
D4/P3
Signal Description
Pin No. Name Type
1 XTALN O/P The inverted output of the on-chip oscillator.
2 XTAL/CLOCK I/P The input to the on-chip oscillator, for external
Xtal circuit or clock.
3
4
5
6
D3
D2
D1
D0
O/P
O/P
O/P
O/P
D3, D2, D1 and D0 is a 4-bit parallel data word
output to the µController. The transmission of
data is under the control of the CSN input.
These 3-state outputs are held at high
impedance when CSN is at "1". See Bus Timing
Diagram (Figure 8).
If CSN is permanently at "0", D3, D2, D1 and D0
are permanently active. See Timing Diagram
(Figure 4 to 7).
7 CSN I/P The data output control function: this input is
provided by the µController. Data transfer
sequences are initiated, completed or aborted
by the CSN signal. See Bus Timing Diagram
(Figure 8).
8 IRQN O/P This output indicates an interrupt condition to
the µController by going to a logic "0". This is a
"wire-ORable" output, enabling the connection of
up to 8 peripherals to 1 interrupt port on the
µController. This pin has a low impedance
pulldown to logic "0" when active and a highimpedance when inactive. An external pullup
resistor is required.
If CSN is permanently at "0", the interrupt
condition is a logic "0" pulse. See Timing
Diagram (Figure 4 to 7).
9 ENABLE I/P A low level input selects the powersave mode,
all circuits are reset and disabled. D0 - D3
outputs become high impedance. A high level
enables all circuits. (See also CSN).
1997 Consumer Microcircuits Limited 4 D/663/2
Call Progress Decoder FX663
1.3 Signal List (continued)
Package
D4/P3
Signal Description
Pin No. Name Type
10 V
ss
Power The negative supply rail (ground).
11 SIGIN I/P Signal input. The signal to this pin should be ac
coupled. The dc bias of this pin is set internally.
12 V
BIAS
O/P Internally generated bias voltage, held at V
when the device is not in powersave mode. It
should be decoupled to Vss by a capacitor
mounted close to the device pins. In powersave
mode this pin is pulled towards V
SS
.
13 AMPNINV I/P The non-inverting input to the on-chip amplifier.
14 AMPINV I/P The inverting input to the on-chip amplifier.
15 AMPOP O/P The output of the on-chip amplifier, this is
internally connected to the input of the Level
Detector.
16 V
DD
Power The positive supply rail. Levels and voltages are
dependent upon this supply. This pin should be
decoupled to V
by a capacitor.
SS
DD /2
Notes: I/P = Input
O/P = Output
1997 Consumer Microcircuits Limited 5 D/663/2
Loading...