Consumer Microcircuits Limited FX406LG, FX406J, FX224LG, FX214LG, FX336LG Datasheet

FX803 Audio
Signalling Processor

XTAL/CLOCK

CLOCK

GENERATOR

TONE 1 OUT

TONE 2 OUT

(Rx) AUDIO IN

COMMAND DATA

REPLY DATA

SERIAL CLOCK

SWITCHED SUM OUT

LOW

PASS

FILTER

SUM IN

SUM OUT

CAL/CUES OUT

SUMMING

AMPLIFIER

AUDIO SWITCH OUT

AUDIO SWITCH IN

TONE 2

GENERATOR

CUES / DTMF 2

LOW

PASS

FILTER

DIGITAL

NOISE

FILTER 1

C-BUS

INTERFACE

AND

CONTROL

LOGIC

Rx FILTER

SWITCH

AUDIO SWITCH

SUMMING

SWITCH

CAL/CUES

SWITCH

XTAL

V

DD

V

BIAS

V

SS

LOGIC INPUT

INTERRUPT

CHIP SELECT

SIGNAL INPUT BIAS

DIGITAL

NOISE

FILTER 2

PROGRAMABLE

NOTONE

TIMER

TONE 1

GENERATOR

5- / 2-TONE

DTMF 1

PROGRAMABLE

(Tx PERIOD)

TIMER

QUALITY

METER

GATE TIME

GENERATOR

FREQUENCY

COUNTER

V

BIAS

CUES

CAL

INPUT

AMPLIFIER

Fig.1 FX803 Audio Signalling Processor

Both tone generators can be individually placed into a

power economical “Powersave” mode.

A general purpose logic input, interfacing directly with the
Status Register, is provided. This could be used as an
auxiliary method of routeing digital information to the
µController via the “C-BUS.”

The output frequencies are produced from data loaded to
the device, with a programmable, general purpose, on-chip
timer available to indicate the tone transmit periods.

A Dual Tone Multi-Frequency (DTMF) output is obtained
by combining the 2 independent output frequencies in the
integral summing amplifier. This Summing Amplifier output
is also available for level adjustment.

Tones produced by the FX803 can also be used in the
DBS 800 system as modulation calibration inputs and for
“CUE” audio indications for the operator.

Received tones are measured and their frequency
indicated to the µController in the form of a received data
word. A poor-quality or incoherent tone will, after a
programmed period, indicate N

OTONE.

The FX803 is a low-power, 5-volt CMOS integrated circuit
and is available in 24-pin DIL cerdip and 24-pin/lead plastic
SMD packages.

FX803 Audio Signalling Processor

As part of the DBS 800 System, this audio signalling
processor will provide an inband tone signalling facility for
PMR radio systems. Signalling systems supported include
Selcall (CCIR, ZVEI I, II and III, EEA), 2-Tone Selcall and
Dual Tone Multi-Frequency (DTMF) encode.

Using a non-predictive tone decoder and versatile
encoders gives the FX803 the capability to work in any
standard or non-standard tone system.

This is a full-duplex device consisting of:

● Two individual tone generators and a
programmable (Tx) period timer.

● A tone decoder with programmable N

OTONE

Timer.

● An on-chip summing amplifier.

For use with Single Tone or Selective Call systems.

Under the control of the µController, via “C-BUS,” the
FX803 will encode and transmit a single or pair of audio
tones, in the frequency range 208Hz to 3kHz,
simultaneously, and detect, decode and indicate the
frequency of non-predicted input tones in the frequency
range 313Hz to 6kHz.

Publication D/803/5 August 1997

2

Pin Number Function

Xtal: The output of the on-chip clock oscillator. External components are required at this input when a

Xtal input is used. See Figure 2.

Xtal/Clock: The input to the on-chip clock oscillator inverter. A Xtal or externally derived clock (f

XTAL

)

should be connected here. See Figure 2.

Reply Data: The “C-BUS” serial data output to the µController. The transmission of Reply Data bytes
is synchronized to the Serial Clock under the control of the Chip Select input. This 3-state output is held
at high-impedance when not sending data to the µController. See Timing Diagrams.

Chip Select (CS): The “C-BUS” data loading control function. This input is provided by the µController.
Data transfer sequences are initiated, completed or aborted by the CS signal. See Timing Diagram.

Command Data: The “C-BUS” serial data input from the µController. Data is loaded to this device in
8-bit bytes, MSB (B7) first, and LSB (B0) last, synchronized to the Serial Clock. See Timing Diagrams.

Logic Input: This ‘real-time’ input is available as a general purpose logic input port which can be read
from the Status Register. See Table 3.

Interrupt Request (IRQ): The output of this pin indicates an interrupt condition to the µController, by
going to a logic “0.” This is a “wire-or able” output, allowing the connection of up to 8 peripherals to 1
interrupt port on the µController. This pin has a low-impedance pulldown to logic “0” when active and a
high-impedance when inactive. The System IRQ line requires one pullup resistor to V

DD

.

The conditions that cause interrupts are indicated in the Status Register and are shown below:

G/Purpose Timer Period Expired NOTONE Timer Period Expired

Rx Tone Measurement Complete

These interrupts are inactive during relevant Powersave conditions and can be disabled by Bits 5 and 6
in the Control Register.

No internal connection, connect to V

SS

.

No internal connection, connect to V

SS

.

Audio Switch In: The input to the stand-alone, on-chip Audio Switch. This switching function (Control
Register Bit 7) may be used to break the system transmitter modulation path when it is required to
provide a CUE (beep) from Tone Generator 2 to the loudspeaker via the FX806 PLMR Audio
Processor.

Audio Switch Out: The output of the stand-alone, on-chip Audio Switch.

V

SS

: Negative Supply (Signal Ground).

J/LG/LS

1

2

3

4

5

6

7

8

9

10

11

12

DW

1

2

3

5

6

7

8

4

9

10

11

12

3

Pin Number Function

J/LG/LS

13

14

15

16

17

18

19

20

21

22

23

24

(Rx) Audio In: The received audio tone signalling input to the Input Amplifier. This input requires to be

a.c. coupled and connected, using external components, to the Signal Input Bias pin. See Figure 2.

Signal Input Bias: External components are required between this input and the (Rx) Audio In pin
See Figure 2.

V

BIAS

: The internal circuitry bias line, held at VDD/2 this pin must be decoupled to VSS by capacitor C

2

See Figure 2.

Tone 1 Out: Tone 1 Generator (2-/5- tone Selcall or DTMF 1) output. External gain and coupling
components will be required at this output when operating in a complete DBS 800 audio installation.
The frequency of this output is determined by writing to Tx Tone Generator 1 Register (Table 4). See
Figure 2.

Tone 2 Out: Tone 2 Generator (2-/5- tone Selcall, CUES or DTMF 2) output. External gain and
coupling components will be required at this output when operating in a complete DBS 800 audio
installation. The frequency of this output is determined by writing to Tx Tone Generator 2 Register
(Table 5). See Figure 2.

CAL/CUES Out: An auxiliary, selectable tone frequency output, providing a square wave CALibration
signal from Tone 2 Generator or a sine wave CUES (beep) signal from the Summing Amplifier. The
output mode (CAL or CUES) is selected by Bit 14 in the Tx Tone Generator 2 Register (Table 5). In a
DBS 800 audio installation, this output should be connected to the Calibration Input of the FX806
PLMR Audio Processor. When Tone Generator 2 is set to V

BIAS

(NOTONE), the CAL output is pulled to

V

BIAS

and during a powersave of Tone Generator 2 it is held at VSS.

Sum In: The input to the on-chip Summing Amplifier. This amplifier is available for combining Tone 1
and Tone 2 outputs (DTMF). Gain and coupling components should be used at this input to provide the
required system gains. See Figures 2 and 3.

Sum Out: The output of the on-chip Summing Amplifier. Combined tones (1 and 2) are available at
this output. See Figures 2 and 3.

Switched Sum Out: The combined tone output available for transmitter modulation. The switch allows
control of the FX803 final output to the FX806. Control of this switch is by Bit 4 of the Control Register.
See Figures 2 and 3.

No internal connection, connect to V

SS

.

Serial Clock: The “C-BUS” serial clock input. This clock, produced by the µController, is used for
transfer timing of commands and data to and from the Audio Signalling Processor. See Timing
Diagrams.

V

DD

: Positive supply rail. A single +5-volt power supply is required. Levels and voltages within the

Audio Signalling Processor are dependent upon this supply.

NOTE: (i) Further information on external components and DBS 800 system integration of this

microcircuit are contained in the System Support Document.

“C-BUS” is CML’s proprietary standard for the transmission of commands and data between a

µ

Controller and DBS 800 microcircuits. It may be used with any µController, and can, if

desired, take advantage of the hardware serial I/O functions embodied into many types of

µ

Controller. The “C-BUS” data rate is determined solely by the µController.

DW

13

14

15

16

17

18

19

20

21

22

23

24

4

External Components

Component Value

R

1

= 1.0MΩ

R

2

2.0MΩ

*R

3

100kΩ

*R

4

82.0kΩ

*R

5

122kΩ

*R

6

100kΩ

*R

7

100kΩ

C

1

= 0.1µF

C

2

1.0µF

C

3

33.0pF

C

4

33.0pF

C

5

22.0pF

C

6

1.0µF

X

1

f

XTAL

4.032MHz

Tolerance: R = ± 10% C = ± 20%

V

BIAS

XTAL/CLOCK

V

DD

V

DD

SEE INSET

BELOW

V

SS

AUDIO SWITCH IN

REPLY DATA

SERIAL CLOCK

2

1

XTAL/CLOCK

V

SS

INSET

FX803J

R

1

X

1

COMMAND DATA

AUDIO SWITCH OUT

XTAL

SIGNAL BIAS
(Rx) AUDIO IN

TONE 1 OUT

TONE 2 OUT

CAL/CUES OUT

SUM IN

SUM OUT

SWITCHED SUM OUT

V

SS

C

6

C

5

R

3

R

4

R

5

R

2

C

1

C

2

XTAL

C

3

C

4

R

7

*

*

*

*

*

TONE LEVEL

and

GAIN

COMPONENTS

13

14

15

16

17

18

19

20

21

22

23

24

1
2
3
4
5

6
7

8
9

10
11

12

FX803J

R

6

CS

LOGIC INPUT

V

SS

IRQ

Notes

1. Xtal/clock circuitry components shown INSET are

recommended in accordance with CML Application
Note D/XT/2 December 1991. The DBS 800 System
Support Document contains additional notes on the use
of Xtal/clock frequencies (f

XTAL

).

2. It is recommended that, to improve screening and

reduce noise levels around the FX803, Pins 8, 9 and 22
are connected to V

SS

.

3. Resistors marked with an asterisk (*) are System
Components, calculated to operate in a system with
other DBS 800 microcircuits. Figure 3 shows in detail,
these components used in the System signal paths.

R

3

, R4, R5, C5 – Tone mixing components to provide a
3dB tone-differential (twist) when used in a DTMF
configuration. Single tone output levels are set
independently or by the FX806 Modulator Drivers.

R

7

– Modulation level and matching for inputs to the
FX806A.

Fig.2 Recommended External Components

+

–

SUM OUT

BIAS

SWITCHED SUM OUT

CAL

CUES

CAL/CUES OUT

TONE 2 OUT

TONE 1 OUT

SUM IN

AUDIO SWITCH OUT

AUDIO SWITCH IN

SUMMING

AMPLIFIER

FROM FX806

“MAIN PROCESS OUT”

TO FX806

“SUM IN”

TO FX806

“CALIBRATION IN”

DBS 800 “TRANSMIT AUDIO” BUS

17

16

19

20

21

18

11

10

FX803Part of

Fig.3 Output Signal Switching

5

Controlling Protocol

Control of the FX803 Audio Signalling Processor's operation is by communication between the µController and the FX803
internal registers on the “C-BUS,” using Address/Commands (A/Cs) and appended instructions or data (see Figure 7). The use
and content of these instructions is detailed in the following paragraphs and tables.

Address/Commands

The first byte of a loaded data sequence is always
recognized by the “C-BUS” as an Address/Command (A/C)
byte. Instruction and data transactions to and from this
device consist of an Address/Command byte followed by
either:

(i) further instructions or data or,

(ii) a Status or data Reply.

Instructions and data are loaded and transferred, via
“C-BUS,” in accordance with the timing information given in
Figures 7 and 8.

Table 1 shows the list of A/C bytes relevant to the FX803.
A complete list of DBS 800 “C-BUS” Address allocations is
published in the System Support Document.

(Rx) HIGH BAND

Frequency (Hz)

(Tx) TONE GENERATORS 1 and 2

(Rx) EXTENDED BAND

(Rx) HIGH BAND

0 1000 2000 3000 4000 5000 6000

208Hz to 3000Hz

1250Hz to 6000Hz

625Hz to 3000Hz

313Hz to 1500Hz

(Rx) MID BAND

0 1000 2000 3000 4000 5000 6000

Frequency (Hz)

FX803 Internal Registers

FX803 internal registers are detailed below:
Control Register (30

H

) – Write Only, control and

configuration of the FX803.

Status Register (31

H

) – Read Only, reporting of device

functions.

Rx Tone Frequency Register (32H) – Read Only, indicates

frequency of the last received input.

Rx N

OTONE Timer Register (33

H

) – Write Only, setting of the

Rx N

OTONE period.

Tx Tone Generator 1 Register (34

H

) – Write Only, setting

the required output frequency from Tx Tone Generator 1.

Tx Tone Generator 2 Register (35H) – Write Only, setting

required output frequency from Tx Tone Generator 2.

General Purpose Timer Register (36

H

) – Write Only,

setting of a general purpose, sequential time period.

Command Address/Command (A/C) Byte + Data
Assignment Hex. Binary Byte/s

MSB LSB

General Reset 01 0 0 0 00001
Write to Control Register 30 0 0 1 10000 + 1 byte Instruction to Control Register
Read Status Register 31 0 0 1 10001 + 1 byte Reply from Status Register
Read Rx Tone Frequency 32 0 0 1 10010 + 2 byte Reply from Rx Tone Register
Write to N

OTONE Timer 33 0 0 1 10011 + 1 byte Instruction to NOTONE Register

Write to Tx Tone Gen. 1 34 0 0 1 10100 + 2 byte Instruction to Tx Tone Gen. 1
Write to Tx Tone Gen. 2 35 0 0 1 10101 + 2 byte Instruction to Tx Tone Gen. 2

Write to G/Purpose Timer 36 0 0 1 10110 + 1 byte Instruction to G/Purpose Timer

Table 1 “C-BUS” Address/Commands

Fig.4 FX803 Frequencies