Consumer Microcircuits Limited FX365JS, FX365JG, FX365J Datasheet

CML Semiconductor Products

1

AN/Data/469/2 November 1997

Asynchronous Modem Circuitry

This application note, used with current FX469 product information, outlines the construction of a low-cost
asynchronous modem for the transmission of RS-232 data in the form of Fast Frequency Shift Keying (FFSK,
or Minimum Shift Keying (MSK), between terminals by a radio or line medium.

The modem circuitry shown in Figure 1 accepts asynchronous data while transmitting synchronous data using
the FX469 series modem. The FX469 may be used to transmit data at either 1200 or 2400 bps, depending on
the setting of Switch 1 shown in Figure 1. Details of the devices used in this application, are outlined below.

Function Requirement Device

RS-232 Driver/Receiver Level Translator Maxim MAX-232
Async to Sync conversion MICRONAS MAS7838
Sync to Async Conversion MICRONAS MAS7838
Data Carrier Detection CML FX469
Controlled RTS/CTS Delay 74HC04 Delay Element
Generation of FFSK/MSK Signals CML FX469
Reception of FFSK/MSK Signals CML FX469
Interface into Radio System CML FX469

RS-232 Handshake Misc. Circuitry

The signals required for an RS-232 handshake for asynchronous data are as follows. A complete definition
of each is given at the end of this application note.

DTR Data Terminal Ready
DSR Data Set Ready
RTS Request to Send
CTS Clear to Send
TXD Transmit Data
RXD Receive Data
DCD Data Carrier Detect

The Maxim MAX-232 converts the TTL/CMOS input/output levels to the nominal ±10V RS-232 input/output
levels. On power-up, the data set ready (DSR) signal is set by the MAX-232’s DC to DC converter. The
incoming data terminal ready (DTR) signal enables the transmitter keying signal.

The request to send (RTS) and clear to send (CTS) signals are level shifted from the RS-232 interface to
TTL/CMOS signal levels. When the modem (DCE) receives an RTS, the RF transmitter and the MSK tone
are keyed immediately and a 30 ms to 100 ms timer is started. At the completion of the timing, a CTS signal

is generated for the data terminal (DTE) to allow serial data flow.

Continued on next page ......

Using an FX469 FFSK Synchronous Modem

with an Asynchronous Data I/O

The transmit data (TXD) signal is level shifted to the TTL/CMOS levels, and applied to the MICRONAS
MAS7838 sync-to-async converter circuit. The random timed asynchronous input from the data terminal is
synchronised with the transmit clock pulses of the FX469. If a timing error builds up due to the difference of
the external asynchronous clock and the synchronous internal timing on the modem, the MICRONAS
MAS7838 will skip a stop-pulse to allow an adjustment to occur. The receiving-end MICRONAS MAS7838
will generate a stop-pulse and add it into the data flow so that no information is lost.

From the sync-to-async converter, synchronous information is then sent into the FX469, which converts the
digital ‘1’ into one cycle of 1200 Hz sinewave and a digital ‘0’ into one and a half-cycles of 1800 Hz sinewave
for 1200 bps and 1200 and 2400 Hz for 2400 bps. This sinewave is then sent on the transmitter through a
level adjustment. The signal is sufficiently band limited and level controlled to pass FCC type acceptance
testing without any additional in-band filtering.

The incoming receiver signal is fed into the FX469 which is held in a power down mode until an RF carrier is
detected by the receiver squelch circuitry. This minimises power drain and also prohibits false information
from being sent to the data terminal. If the receiver does not have a noise squelch signal, the chip’s carrier
detect must be used. It will detect within 12 ms the presence of the data modulation tone. This event is
output on the carrier detect pin which should be used to disable the data output to minimise random data at
the terminal. The use of Schmitt trigger circuitry would minimise the ‘clatter’ at the beginning of the detection
signal.

The FX469 FFSK tones are translated into logic levels and a digital phase lock loop is locked onto the
incoming data steam within 16 bit reversals. The detected synchronous data and the recovered receive
clock are sent into the MICRONAS MAS7838 for conversion back into asynchronous data. This information
is then sent out to the data terminal through the Maxim, MAX-232.

Operation in either a synchronous or asynchronous mode is achieved by a logic level on pin 11 (XASY), of
the MICRONAS MAS7838. If additional RS-232 level shifting is needed for transmit / receive clocks and the
TX / RX enable (Note additional RS232 level shifting will require another MAX232), pin 11 (XASY) on the
MICRONAS MAS7838 should be at logic ‘1’. Pulling this pin high bypasses the conversion process and
allows synchronous data to pass directly through the device i.e. TDI = TDO and RDI = RDO.

The clock frequency for the FX469 device is provided by a 4.032MHz crystal. Clock frequency for the
MICRONAS MAS7838 must be provided at 256 times the bit rate. This is accomplished by using a

2.4576MHz crystal and dividing down by eight to 301.2kHz (1200bps) or by four to 602.4kHz (2400bps).
Power is derived from a single 7805 voltage regulator. Typical DC current measured on the first model is

12.75mA.