Connect Tech PCI-104 User Manual
FreeForm/PCI-104
User Manual
Connect Tech, Inc.
42 Arrow Road
Guelph, Ontario
Canada, N1K 1S6
Tel: 519-836-1291
800-426-8979
Fax: 519-836-4878
Email: sales@connecttech.com
support@connecttech.com
URL: http://www.connecttech.com
CTIM-00040 Revision 0.02 September 19, 2008
Connect Tech FreeForm/PCI-104 User Manual
Limited Lifetime Warranty
Connect Tech Inc. provides a Lifetime Warranty for all Connect Tech Inc. products. Should
this product, in Connect Tech Inc.'s opinion, fail to be in good working order during the
warranty period, Connect Tech Inc. will, at its option, repair or replace this product at no
charge, provided that the product has not been subjected to abuse, misuse, accident, disaster or
non Connect Tech Inc. authorized modification or repair.
You may obtain warranty service by delivering this product to an authorized Connect Tech
Inc. business partner or to Connect Tech Inc. along with proof of purchase. Product returned to
Connect Tech Inc. must be pre-authorized by Connect Tech Inc. with an RMA (Return
Material Authorization) number marked on the outside of the package and sent prepaid,
insured and packaged for safe shipment.
The Connect Tech Inc. Lifetime Warranty is defined as the serviceable life of the product. This
is defined as the period during which all components are available. Should the product prove to
be irreparable, Connect Tech Inc. reserves the right to substitute an equivalent product if
available or to retract Lifetime Warranty if no replacement is available.
The above warranty is the only warranty authorized by Connect Tech Inc. Under no
circumstances will Connect Tech Inc. be liable in any way for any damages, including any lost
profits, lost savings or other incidental or consequential damages arising out of the use of, or
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Copyright Notice
The information contained in this document is subject to change without notice. Connect Tech
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Copyright © 2008 by Connect Tech, Inc.
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referred to in this document as the property of their respective owners.
Not listing all possible trademarks or copyright acknowledgments does not constitute a lack of
acknowledgment to the rightful owners of the trademarks and copyrights mentioned in this
document.
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Connect Tech FreeForm/PCI-104 User Manual
Customer Support Overview
If you experience difficulties after reading the manual and/or using the product, contact the
Connect Tech reseller from which you purchased the product. In most cases the reseller can
help you with product installation and difficulties.
In the event that the reseller is unable to resolve your problem, our highly qualified support
staff can assist you. Our support section is available 24 hours a day, seven days a week on our
website at:
www.connecttech.com/support/support.asp. See the contact information section below for
more information on how to contact us directly. Our technical support is always free.
Not listing all possible trademarks or copyright acknowledgments does not constitute a lack of
acknowledgment to the rightful owners of the trademarks and copyrights mentioned in this
document.
Contact Information
We offer three ways for you to contact us:
Telephone/Facsimile
Technical Support representatives are ready to answer your call Monday through Friday, from
8:30 a.m. to 5:00 p.m. Eastern Standard Time. Our numbers for calls are:
Telephone: 800-426-8979 (North America only)
Telephone: 519-836-1291 (Live assistance available 8:30 a.m. to 5:00 p.m. EST, Monday to
Friday)
Facsimile: 519-836-4878 (on-line 24 hours)
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You may contact us through the Internet. Our email and URL addresses are:
sales@connecttech.com
support@connecttech.com
www.connecttech.com
Mail/Courier
You may contact us by letter and our mailing address for correspondence is:
Connect Tech, Inc.
42 Arrow Road
Guelph, Ontario
Canada N1K 1S6
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Connect Tech FreeForm/PCI-104 User Manual
Table of Contents
Limited Lifetime Warranty......................................................................................................... 2
Copyright Notice ........................................................................................................................ 2
Trademark Acknowledgment ..................................................................................................... 2
Customer Support Overview ...................................................................................................... 3
Contact Information........................................................................................................... 3
Table of Contents ....................................................................................................................... 4
List of Tables.............................................................................................................................. 5
List of Figures ............................................................................................................................ 5
Introduction ................................................................................................................................ 6
Product Features ................................................................................................................ 6
About this manual.............................................................................................................. 6
System Overview ....................................................................................................................... 7
Reference Design ....................................................................................................................... 9
Hardware Description............................................................................................................... 10
Jumpers and Switches...................................................................................................... 10
Slot Selection (RSW1) ............................................................................................ 10
FPGA Configuration Settings (J1) .......................................................................... 10
Connector Pinouts............................................................................................................ 11
PCI-104 Header (P1)............................................................................................... 11
JTAG Programming Header (P2)............................................................................ 11
SPI Flash Programming Header (P3)...................................................................... 11
High-speed Serial (P4) ............................................................................................ 12
RS-485 Headers (P5, P6)......................................................................................... 13
GPIO Header (P7) ................................................................................................... 14
External Power Connector (P8)............................................................................... 15
Connector’s Mating Components and Cables.................................................................. 16
Hardware Installation ............................................................................................................... 17
Heat Sink Installation....................................................................................................... 17
Stand-alone Operation ..................................................................................................... 17
Software Installation................................................................................................................. 18
FPGA Development Environment................................................................................... 18
PLX Software Development Kit (SDK) .......................................................................... 18
Reference Design & Application Examples .................................................................... 18
FPGA Configuration ................................................................................................................ 19
Power and Thermal Considerations.......................................................................................... 20
Reference Design FPGA power analysis......................................................................... 20
Specifications ........................................................................................................................... 21
Appendix A: iMPACT Instructions for FPGA Configuration.................................................. 22
Launch Impact ................................................................................................................. 22
Programming the FPGA .................................................................................................. 25
Generating a PROM (MCS) File ..................................................................................... 26
Configuring the FPGA with the SPI Flash....................................................................... 29
Configuring the FPGA / SPI flash Association ....................................................... 29
Programming the Flash ........................................................................................... 31
Appendix B: Power calculations .............................................................................................. 33
Scenario 1: Heatsink attached, 250 LFM ................................................................ 33
Scenario 2: No Heatsink, 250 LFM......................................................................... 34
Scenario 3: No heatsink, 0 LFM.............................................................................. 35
Appendix C: Hardware Changes from Revision B................................................................... 36
Reference Design............................................................................................................. 37
Hardware Description...................................................................................................... 38
Connector Pinouts ................................................................................................... 38
Specifications................................................................................................................... 39
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List of Tables
Table 1: FreeForm/PCI-104 Components .................................................................................. 8
Table 2: Slot Selection (RSW1) ............................................................................................... 10
Table 3: FPGA Configuration Settings (J1) ............................................................................. 10
Table 4: JTAG Programming Header Pinout (P2).................................................................... 11
Table 5: SPI Flash Programming Header Pinout (P3).............................................................. 11
Table 6: High-Speed serial Connector Pinout (P4) .................................................................. 12
Table 7: RS-485 Port 1 Pinout (P5).......................................................................................... 13
Table 8: RS-485 Port 2 Pinout (P6).......................................................................................... 13
Table 9: GPIO Header Pinout................................................................................................... 14
Table 10: External Power Connector Pinout (P8) .................................................................... 15
Table 11: Connector Mate Listing............................................................................................ 16
List of Figures
Figure 1: FreeForm/PCI-104 Block Diagram............................................................................. 7
Figure 2: FreeForm/PCI-104 Layout.......................................................................................... 8
Figure 3: External Power Connection....................................................................................... 15
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Introduction
Connect Tech’s FreeForm/PCI-104 features Xilinx’s Virtex-5 multi-platform FPGA offering users a
flexible, reconfigurable computing platform that also takes advantage of the high bandwidth capabilities
of the PCI bus while communicating with various I/O interfaces.
Product Features
o PCI-104 form factor – 32-Bit/33MHz
o Xilinx multi-platform Virtex-5 FPGA with 3 million logic gates
o 2MB Flash for FPGA configuration storage
o 8MB Flash for embedded code storage
o Designed for embedded processing using MicroBlaze™
o 100MHz input clock
o 128MB DDR2-400 memory
o 2 x 10/100 Ethernet with modular jacks
o 2 x RS-485 serial interface
o High-speed serial connector 4 x Rocket I/O (GTP) channels
o 64 single ended or 32 LVDS general purpose I/O
o External 5V power connection for programming and development
o JTAG test and programming chain
o Industrial temperature range of -40°C to 85°C
o Ships preconfigured with a reference design
About this manual
This manual will provide the user with the following information:
o System overview
o Introduction to the reference design
o Description of jumpers, switches, and connector pinouts
o Hardware installation instructions
o Software installation instructions
o FPGA configuration details
o Specifications
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System Overview
The following conceptual block diagram provides a high level overview of the FreeForm/PCI-104 and
illustrates the general interconnection between components and connectors.
For the actual orientation and description of components refer to Figure 2 and Table 1 respectively.
PCI-104 Bus
EEPROM
(Config
1x6
Header
Registers)
SPI Flash
(FPGA
Config.)
PCI Bus Interface
[PLX 9056]s
100 Mhz
Osc.
Local Bus
RJ-45
RJ-45
2x5
Header
2x5
Header
Core Circuitry
Peripheral Circuitry
Connector
EEPROM
(Parameters)
Dual Ethernet PHY
RS-485 Transceiver
RS-485 Transceiver
Figure 1: FreeForm/PCI-104 Block Diagram
JTAG Connector
1x7 Header
FPGA
[Xilinx Virtex-5]
64 I/O, 32 LVDS Pairs
High Speed Serial
SPI Flash
(Embedded
Code)
2x40
Header
DDR2 RAM
DDR2 RAM
Ext Power Connector
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Figure 2: FreeForm/PCI-104 Layout
Table 1: FreeForm/PCI-104 Components
Connectors Description
P1 PCI-104 connector
P2 JTAG programming header
P3 SPI flash programming header
P4 High-speed serial connector
P5, P6 RS-485 header
P7 GPIO header
P8 External power header
P9 RJ-45 A
P10 RJ-45 B
Jumpers /Switches Description
RSW1 Slot selection
J1 FPGA configuration settings
Components
Description (not all on top side)
D1-D4 User LEDs
D5 FPGA load complete LED
U4 PLX PCI-local bus bridge
U5 Virtex-5 FPGA
U10 FPGA configuration flash
U11 Embedded code flash
U12, U13 DDR2 memory
U14 Parameter EEPROM
U15, U16 RS-485 transceiver
U17 Dual 10/100 PHY
O1,O2, O3 Oscillators
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Reference Design
The FreeForm/PCI-104 ships with a pre-installed reference design that is loaded into the FPGA’s
configuration flash. This reference design demonstrates how to interface the FreeForm/PCI-104
(Virtex-5 FPGA) with the PLX PCI 9056 PCI to Local Bus Bridge, as well as the various peripherals.
The PLX 9056 provides a generic local bus that is capable of operating at up to 66MHz (this design
forwards a 50MHz clock to the PLX). The PLX bridge has been set in the C-Mode of operation. The
reference logic operates as a local bus slave, as well as a local bus master.
The reference design contains examples demonstrating:
o Loading of PLX 9056’s registers via the local bus
o Local bus slave transfers
o Local bus master transfers
o GPIO control
o Programming the SPI Flash
o Interfacing to the built-in Virtex-5 TEMACs
o RS-485 serial data transfers
o Reading/writing to the serial EEPROM
o Reading/writing to DDR2 memory
o Interfacing to the Virtex-5 Rocket I/O transceivers
Most of the example VHDL modules demonstrate how to interface with the various peripherals through
a register set, which is accessible by the host system over the PCI bus. A set of software applications
has been created to show how the host system can communicate with each FPGA sub-module. In most
applications, the host system will not directly control these peripherals. In a custom application, these
modules can be easily modified to interconnect with each other through the FPGA fabric.
To obtain the source code, refer to Software Installation. For further details on the reference design,
refer to FreeForm/PCI-104 Reference Design Guide (CTIM-00042)
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Hardware Description
The following sections describe the function of all switches/jumpers and provide details on connector
pinouts.
Jumpers and Switches
Slot Selection (RSW1)
This rotary switch selects a slot position in the PCI-104 stack. When mounting on a PCI adapter
card, ensure slot one is selected.
Table 2: Slot Selection (RSW1)
Position Slot
0,4 0
1,5 1
2,6 2
3,7 3
FPGA Configuration Settings (J1)
Jumper J1 is used to control FPGA configuration.
Table 3: FPGA Configuration Settings (J1)
Location Function
FPGA waits for configuration over JTAG (using P2)
FPGA reads configuration from SPI flash
FPGA is tri-stated, flash is isolated from FPGA and
can be programmed directly
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Connector Pinouts
PCI-104 Header (P1)
Refer to PCI-104 specifications.
Note: P1 must be connected to a PCI-104 stack supplying both 3.3V and 5V.
JTAG Programming Header (P2)
Use P2 to configure the FPGA via JTAG. Refer to FPGA Configuration for more information.
Power pins are for voltage reference only; they do not provide power to the configuration
circuitry.
Note that the FPGA can always be programmed via JTAG, regardless of the J1 configuration
setting.
Table 4: JTAG Programming Header Pinout (P2)
Pin Signal Direction
1 TRST Input
2 TMS Input
3 TDI Input
4 TDO Output
5 TCK Input
6 GND Reference
7 3.3V Reference
1
JTAG
Header
P2
Top View
SPI Flash Programming Header (P3)
P3 may be used to directly program the SPI flash, providing that J1 is set correctly to the tri-state
FPGA position. The power pins are for voltage reference only. They do not provide power to the
configuration circuitry.
Table 5: SPI Flash Programming Header Pinout (P3)
Pin Signal Direction
1 SPI_CSN Input
2 SPI_MOSI Input
3 SPI_MISO Output
4 SPI_CLK Input
5 GND Reference
6 3.3V Reference
SPI Flash
Header
P3
Top View
1
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High-speed Serial (P4)
The high-speed serial connector carries four Rocket (GTP) I/O channels, each with a dedicated
transmit and receive differential pair. These channels are capable of operating up 3.125 Gbps,
depending on configuration. For more information on Rocket I/O capabilities, visit the Xilinx
website: http://www.xilinx.com/products/silicon_solutions/fpgas/virtex/virtex5/
Table 6: High-Speed serial Connector Pinout (P4)
Pin Signal Direction Notes
1 MTGRXN0_112 Input (b)
3 MTGRXP0_112 Input (b)
2 MTGTXN0_112 Output (b)
4 MTGTXP0_112 Output (b)
5 HSS_USER_IO(0) Input/Output (a), (d)
7 HSS_USER_IO(1) Input/Output (a), (d)
6 HSS_USER_IO(2) Input/Output (a), (d)
8 HSS_USER_IO(3) Input/Output (a), (d)
9 MTGRXN1_112 Input (b)
11 MTGRXP1_112 Input (b)
10 MTGTXN1_112 Output (b)
12 MTGTXP1_112 Output (b)
13 3.3V Power (a)
15 3.3V Power (a)
14 3.3V Power (a)
16 3.3V Power (a)
17 MTGRXN0_114 Input (c)
19 MTGRXP0_114 Input (c)
18 MTGTXN0_114 Output (c)
20 MTGTXP0_114 Output (c)
21 3.3V Power (a)
23 3.3V Power (a)
22 3.3V Power (a)
24 3.3V Power (a)
25 MTGRXN1_114 Input (c)
27 MTGRXP1_114 Input (c)
26 MTGTXN1_114 Output (c)
28 MTGTXP1_114 Output (c)
Notes:
a) Pins have a different function from Revision B.
b) The Rocket I/O (GTP) are organized into tiles, where each tile has two transceivers and
shares a common PLL. In this design, tiles 112 and 114 are used.
c) Tile 112 has AC coupling capacitors on the TX pairs, validated at PCI Express data rates
(2.5 Gbps).
d) Tile 114 has AC coupling capacitors on both the RX and TX pairs, validated at SATA
data rates (1.5 Gbps).
e) HSS_USER_IO are flexible LVCMOS side-band signals.
WARNING If connecting two FreeForm/PCI-104’s together using the Rocket I/O
interface in a cross-over fashion; care must be taken. Ensure that only
cables provided by Connect Tech are used. Cables ordered directly
from Samtec or a third party could result in damage to the cable and/or
the FreeForm/PCI-104 board itself.
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