Compaq DS20E - AlphaStation - 1 GB RAM, AlphaServer DS20E Technical Manual
Compaq AlphaServer DS20E Systems
Technical Summary
Contents
System Overview 1
Features and Benefits 1
Architecture 2
System Block Diagram
System Board 3
Component and Connector L ocations
Third-Generation Alpha Chip 4
Chip Operation
Alpha 21264 Features
Processor Module 4
Processor Configurati on Rules
Processor Upgrade
Memory 5
Memory Options
Memory Configuration Rules
System I/O 5
PCI Bus
ISA Bus
I/O Configuration Rules
I/O Implem entation
System Control 6
Storage 6
Fibre Channel
RAID (Redundant Array of Independent Disks)
Server Management 7
Operational Management
Platform Management
Error Reporting
Reliability, Availability, and Maintainability 7
Processor Features
Memory Features
I/O Features
System Features
Installation and Maintenance 8
Clustering 8
PCI to Memory Channel Interconnect
Operating System Support
Performance 9
Sources of Performance Information
Information for Compaq Partners
Service and Support 9
Hardware Warranty
Software Warranty
Compaq AlphaServer DS20E System Diagrams 10
System Features at a Glance 11
Physical Characteristics 12
Compaq AlphaServer DS20E Systems
The Compaq AlphaServer DS20E system delivers high
performance for business, technical, and scientific
applications at an affordable price. As a high-capacity
database server, high-performance application server,
Network File System (NFS) server, or Internet server, the
AlphaServer DS20E delivers exceptional value and
investment protection.
Compaq AlphaServer products use the 64-bit Alpha RISC
architecture that supports multiple operating systems:
Tru64 UNIX, OpenVMS, and Linux.
More information on Compaq AlphaServer DS20E systems
is on the World Wide Web:
http://www.compaq.com/alphaserver/platforms.html
.
System Overview
The Compaq AlphaServer DS20E uses the third-generation
Alpha 21264 processor. Two speeds are avail able, the EV67
chip, which runs at 667 M Hz and the EV68 chip, which runs at
833 MHz. The switch-based system inter connect exploits the
full potential of these Alpha chips.
The system is available as a pedestal or as a rackmount system .
The components in both are identical; the rackmount variant is
simply rotated to its side. The rackmount syste m requires 5U
space and can be mounted in a 67- or 79-inch M-series cabinet,
along with additional disks. In the largest cabine t up to 6
systems and 4 StorageWorks she l ves can be installed.
The DS20E system is available with one or two processors.
The system accommodates six hard disks, a floppy diskette
drive, a CD-ROM, and space for one additional 5.25-inch
removable media device. The system supports up to 218.4 GB
of internal storage using 36.4 GB disks.
There are 6 PCI slots, one of which could be used for an ISA
device. Integrated on the system board are controllers for a
SCSI tape device, a di skette, two serial ports, one parallel port,
and the keyboard and mouse.
Three operating syst ems are supported: Tru64 UNIX,
OpenVMS, and Linux. Customers can orde r the system that
meets their pre s ent application needs; the y choose the size of
the system disk, an Ultra3 SCSI adapter, and an Ethernet
adapter. Systems can also be configured in a choice of two
cabinet enclosures: a 67-inch or 79-inch M-series cabinet.
Features and Benefits
• Leadership 64-Bit Architecture
The Alpha 64-bit architecture was introduced with the Alpha
21064 chip in 1992 and now the 21264, builds upon that
proven architecture.
• Performance
The Alpha 21264 chip when combined with a switch-based
interconnect demonstrates its full potential. This switch-based
system provides a memory bandwidth of up to 5.2 Gbytes/sec
(peak) using two 256-bit memory buses running at 83 MHz.
• Reliability and Availability
The AlphaServer DS20E uses the latest technologies to
achieve redundancy, error correction, and fault management.
The balance between simple error detection and error correction provides high availability at low cost. Hot swappable
disks, fans, and power suppl i es allow repairs to be done without shutting the system down.
• DS20E Workstation
The pedestal package can also be ordered as a workstation.
Architecture
This system is designed t o maximize the pote nt i al of the Alpha
21264 chip. The traditional bus interconnect has been replaced
by a switch-based interconnect system. Wit h a bus design, the
processors, memory, and I/O modules must share the bus. As
the number of bus users increases, the transactions interfere
with one another, increasing latency and decreasing a ggregate
bandwidth. However, with a switch-base d syst em there is no
degradation in performance as the number of CPUs, me mory,
and I/O users incre ase. Although the users inc rease, the speed is
maintained.
With a switch-based, or point-to-point interconnect, the performance remains c onst ant, even though the number of transactions
multiplies. The switched system interconnect uses a set of complex chips that route the traffic over multiple paths. The chipset
consists of one C-chip, e i ght D-chips, and two P-chips,
Command, Address, and Control lines for each Memory Array
• C-chip. Provides the interface from the CPUs and main
memory. Although t here is only one in the system, it
allows each CPU to do transactions simultaneously.
• D-chips. Provide the data path for the CPUs, main
memory, and I/O.
• P-chips. Provide the interface to two independent 64-bit
PCI buses.
The DS20E system supports up to two CPUs and up to 4
Gbytes memory in 16 D IMM slots. Each memory option
contains four DIMMs, so each bank has four DIMMs.
Two 256-bit memory buses support four memory arrays,
yielding a 5.2 Gbytes/sec system bandwidth. Transactions are
ECC protected. Upon the receipt of data, the receiver checks
for data integri ty and corrects any e rrors. Commands a nd
addresses are parity protected.
D/
CM
Addr.
CPU 0
B-cache
C-chip
Probe/
Addr.
Probe/
Addr.
D/
CM
Addr.
CPU 1
(optional)
B-cache
Control lines for D-chips
CAPbus
P-chip
P-chip
CPU
Data
Bus
PAD
Bus
64 bit PCI
8 D-chips
64 bit PCI
Memory
Data
Bus
1 or 2
Memory
Banks
1 or 2
Memory
Banks
PKW
1400-99
System Block Diagram
System Board
The interconnect switch is implemented on the system board
by the chipset consisting of one C-chip, two P-chips, a nd eight
D-chips. This complex chipset provides the data and address
path between the CPUs, memory, and the I/ O subsystem.
A flash ROM holds the c onsole code and the NVRAM data.
Switches are located near the CD-ROM connector. One of
these switches must be set when the system is upgraded to
faster processors.
Integrated into the system board are c ont rollers for the floppy
diskette, the CD-ROM, a SCSI tape drive, two serial ports, one
parallel port, and keyboard and mouse.
1
DIMM Slots
Parallel Port
COM 1
COM 2
Keyboard & Mouse
DIMM Slots
PCI 0 Slot 7
PCI 0 Slot 8
PCI 0 Slot 9
3
1
3
0
2
0
2
D
Chip
Chip
2
0
2
0
3
1
3
1
D
Chip
D
D
Chip
C
Chip
Connectors are provi ded for the following:
2 CPU modules
16 DIMM memory modules
6 PCI devices
1 ISA device
1 floppy diskette drive
1 IDE CD-ROM
I/O panel for pa rallel port, COM1 and COM2 ports, keyboard
and mouse
CPU 0
D
D
Chip
Chip
D
D
Chip
Chip
CPU 1
P
ChipPChip
SCSI
Speaker
Firmware Flash ROM
PCI 1 Slot 7
PCI 1 Slot 8
PCI 1 Slot 9
ISA Slot
PK-0320C-99
Component and Connector Locations
Floppy
CD-ROM
Switches
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