Compal Electronics LA-7191P PGRAA Superior 10RH, Qosmio X750, Qosmio X755 Schematic

A

1 1

B

C

D

E

PGRAA

2 2

Superior 10H

LA-7191P SchematicREV 0.1

3 3

4 4

Intel Processor(Sandy Bridge) / PCH(Cougar Point)

2010-10-12 Rev 0.1

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/ 23

200910/9 2010/01/ 23

200910/9 2010/01/ 23

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

B

B

B

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

1 48Wednesd ay, October 20, 2 010

1 48Wednesd ay, October 20, 2 010

1 48Wednesd ay, October 20, 2 010

E

0.1

0.1

0.1

A

B

C

D

E

Intel CPU

PCI-Express 16X 5GHz

1 1

VGA Board(GDDR5)

CRT

NVIDIA N11E-GS, 192bit with 1.5GB/3GB

page 13,14,15,16

LVDS

EDP

2 2

EC SMBus

HDMI-CEC

page 16

HDMI Conn.

RJ45

page 28

page 16

RTL8111E 1G

PCIe port 1

page 28

Cardreader

VGA/B

3 3

LS-7191P

page 13

JMB389C

PCIe port4

page 29

page 15

LVDS Conn.

page 14

PCIe 1x

1.5V 5GT/s

PCIe 1x

1.5V 5GT/s

LVDS

Light Bar/B
LS-7192P

page 35

Sandy Bridge

rPGA-989

37.5mm*37.5mm

page 5,6,7,8,9,10

FDI X8

2.7GT/s

DMI X4

5GT/s

Intel PCH
Cougar Point - M

FCBGA-989

m*25mm

25m

page 17,18,19,20,21,22,23,24,25

LPC BUS

3.3V 33 MHz

HD Audio

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 1066/1333 MT/s

USB/B Right Left USB

USB port 0,1

page 26

IR Emitter

USB port 5

USB

5V 480MHz

page 32

PCIeMini Card

USB

5V 480MHz

PCIe 1x

1.5V 5GT/s

SATA port 0

5V 6GHz(600MB/s)

SATA port 1

5V 6GHz(600MB/s)

SATA port 2

5V 3GHz(300MB/s)

PCIe 1x

1.5V 5GT/s

WiMax

PCIeMini Card
WLAN

SATA HDD1

SATA HDD2

SATA ODD

USB3.0
TUSB7320

3.3V 24MHz

200pin DDRIII-SO-DIMM X2

USB port 13

page 27

CIe port 2

P

page 27

SATA port 1

page 26

SATA port 2

page 26

SATA port 4

page 26

Fan Control Circuit

BANK 0, 1, 2, 3

USB port 2

page 26

Blue Tooth

USB port 4

page 32

PCIeMini Card
JET

PCIe port6

page 30

page 5

page 11,12

FingerPrinter

USB port 8

page 35

Int. Camera

USB port 11

page 14

PCIe port 3

page 27

TP/B
LS-7193P

RTC CKT.

page 17

ODD/B
LS-7194P

LED/B

DC/DC Interface CKT.

page 36

4 4

Power Circuit DC/DC

page 37,38,39,40,
41,42,43,44

LS-7195P

Audio & USB/B
LS-6064P

Finger Printer/B
LS-6065P

Power On/Off CKT.

page 35

A

Power/B_FPC
DA300006JM0

page 35

page 26

page 35

page 26

page 35

page 35

SPI ROM
(4MB)

page 17

Debug Port

Cap Sensor
& Light Sensor/B
LS-6062P

page 35

B

page 34

Touch Pad

page 35

ENE KB930

Int.KBD

page 34

page 33

EC ROM
(128KB)

page 34

G-Sensor

page 34

MIC Conn

page 14

EC SMBus

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

HDA Codec

ALC269

page 31

SPK ConnInt.

page 31

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

JPIO
(HP & MIC)

page 26

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Block Diagram

Block Diagram

Block Diagram

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

Subwoofer

SUB Conn

E

APA3011

page 26

2 48Wednesday, Oct ober 20, 2010

2 48Wednesday, Oct ober 20, 2010

2 48Wednesday, Oct ober 20, 2010

page 26

0.1

0.1

0.1

5

D D

C C

4

B+

TPS51125ARGER

ISL95831CRZ

VR_ON

3

Ipeak=5A, Imax=3.5A, Iocp min=7.9

SUSP#

SUSP

N-CHANNEL

SI4800

Ipeak=5A, Imax=3.5A, Iocp min=7.7

SUSP

N-CHANNEL

SI4800

KB_LED

P-CHANNEL

AO-3413

+5VS

LDO

G9191

ODD_EN#

P-CHANNEL

AO-3413

WOL_EN#

P-CHANNEL

AO-3413

SY8033BDBC

LCD_ENVDD

P-CHANNEL

AO-3415

BT_PWR#

P-CHANNEL

AO-3413

DGPU_PWR_EN

P-CHANNEL

AO-3413

2

DESIGN CURRENT 0.1A

DESIGN CURRENT 0.1A

DESIGN CURRENT 5A

DESIGN CURRENT 4A

DESIGN CURRENT 400mA

DESIGN CURRENT 300mA

DESIGN CURRENT 1.6A

DESIGN CURRENT 5A

DESIGN CURRENT 330mA

DESIGN CURRENT 2A

DESIGN CURRENT 4A

DESIGN CURRENT 1.5A

DESIGN CURRENT 180mA

DESIGN CURRENT 0.5A

DESIGN CURRENT 94A

DESIGN CURRENT 33A

+3VL
+5VL

+5VALW

+5VS

+5VS_LED

+3VS_HDP

+5VS_ODD

+3VALW

+3V_LAN

+1.8VS

+3VS

+LCD_VDD

+BT_VCC

+3VS_DGPU

+CPU_CORE

+GFX_CORE

1

VCCPPWRGD

G5603RU1U

B B

SUSP#

G5603RU1U

SUSP#

G5603RU1U

Ipeak=6A, Imax=4.2A, Iocp min=7.69

Ipeak=7A, Imax=4.9A, Iocp min=7.7

Ipeak=7.5A, Imax=5.25A, Iocp min=9.09

SUSP

N-CHANNEL

FDS6676AS

SUSP

N-CHANNEL

FDS6676AS

VGA_PWROK

SUSP or 0.75VR_EN#

G2992F1U

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERI NG DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL E LECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERI NG DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL E LECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERI NG DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL E LECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CON TAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CON TAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CON TAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

DESIGN CURRENT 6A

DESIGN CURRENT 7A

DESIGN CURRENT 9A

DESIGN CURRENT 2A

DESIGN CURRENT 1.5A

DESIGN CURRENT 1A

2

+VCCSA

+1.05VS

+1.5V

+1.5V_CPU

+1.5VS

+0.75VS

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Power Tree

Power Tree

Power Tree

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

1

of

3 48Wednesday, October 20, 2010

of

3 48Wednesday, October 20, 2010

of

3 48Wednesday, October 20, 2010

0.1

0.1

0.1

A

Voltage Rails

State

power
plane

1 1

( O MEANS ON X MEANS OFF )

+RTCVCC

B+

+5VL

+3VL

B

+5VALW

+3VALW

+VSB

+1.5V

+5VS

+3VS

+1.8VS

+1.5VS

+1.05VS

+0.75VS

+CPU_CORE

+VGA_CORE

+GFX_CORE

+VTT

+VRAM_1.5VS

+3VS_DGPU

+1.05VS_DGPU

C

Platform

Huron River

BTO Option Table

Function

description

explain

BTO

Optimus

IHDMI@

SKU CPU

Discrete
(DIS@)

Clarksfield/
Arrandale

Optimus
(OPT@)

HDMI

HDMI

Discrete

D

PCH

HM65

Arrandale HM65

CEC

DHDMI@

CEC@

E

Function

S0

S1

2 2

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery
don't exist

O

O

O

O

O

O

O

O

O

O

O

X

O

O

O

O

O

X

O

O

O

O

X

X

O

X X

X

X X

OO

OO

X

X

description

explain

BTO

Function

description

explain

BTO

Function

PCH SM Bus Address

HEX

0001 0110 bSmart Battery

Address

1010 0000 bA0 H

1010 0100 bA4 H

EC SM Bus2 Address

PowerPower

+3VS

+3VS

+3VS

+3VS Light Sensor

Device

NVIDIA GPUHDMI-CEC 34 H 0011 0100 b 1001 1010 b

G-Sensor

96 H

9A H

40 H

52 H

1001 0110 bPCH

0100 0000 b

0101 0010 b

Power

+3VS

3 3

+3VS

+3VS

Device

DDR SO-DIMM 0

DDR SO-DIMM 1

WLAN/WIMAX

EC SM Bus1 Address

Device Address Address

+3VL

+3VL

4 4

+3VL Cap. Sensor Virtual I2C

HEX HEX

16 H

HEXDevice AddressPower

description

explain

BTO

MINI PCI-E SLOT

SLOT1SLOT2

WIMAX

WIMAX@

BLUE TOOTH

BLUE TOOTH G-SENSOR

BLUE TOOTH

BT@

CIR

CIR

CIR

CIR@

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LOW LOWLOW

G-SENSOR

G-SENSOR

GSENSOR@

SIGNAL

Discrete Optimus

SLP_S3# SLP_S4# SLP_S5#

HIGH HIGHHIGH

LOW

LOW

Fingerprint

Fingerprint KB Light

Fingerprint

FP@

SKU

SKU

DIS@ OPT@

HIGH HIGHHIGH

HIGH

HIGH

LOW

HIGH

LOW LOWLOW

KB Light

KB Light

KBL@

LVDS

3D Panel

Discrete Optimus

EDP@

OPT@

Camera & Mic

Camera & Mic

Camera & Mic

CAM@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

Notes List

Notes List

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

4 48Wednesday, Oct ober 20, 2010

4 48Wednesday, Oct ober 20, 2010

4 48Wednesday, Oct ober 20, 2010

E

0.1

0.1

0.1

5

@

@

PM_DRAM_PWR GD_R

C4871000P_0402_50V7K

C4871000P_0402_50V7K

12

@

@

12

D D

+1.05VS_VCCP

R47 62_0402_5%R47 62_0402_5%

R51 10K_0402_5%R51 10K_0402_5%

C C

PM_PWROK19,33

DRAMPWROK19

B B

12

12

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0_0402_5%

0_0402_5%

1 2

C4881000P_0402_50V7K

C4881000P_0402_50V7K

R312

R312

C93

C93

H_PWRGOOD

H_PROCHOT#

H_PWRGOOD

1

2

1

2

R384 0_0402_5%@R384 0_0402_5%@

1 2

+3VALW

U10

U10
74AHC1G09GW_TSSOP5

74AHC1G09GW_TSSOP5

5

P

B

4

O

A

G

3

SUSP9,36,43

PM_SYS_PWRGD_BUF

12

13

D

SUSP

D

2

G

G

S

S

H_PROCHOT#33,38

H_THERMTRIP#22

H_PM_SYNC19

H_PWRGOOD22

+1.5V_CPU

R340

R340
39_0402_5%

39_0402_5%

@

@

Q5

Q5

@

@

2N7002_SOT23-3

2N7002_SOT23-3

H_SNB_IVB#21

12

R339

R339
200_0402_5%

200_0402_5%

4

H_PECI33

H_SNB_IVB#

R450

R450

1 2

R14

R14

1 2

BUF_CPU_RST#

TP_SKTOCC#

H_CATERR#

H_PECI

H_PROCHOT#_R

56_0402_5%

56_0402_5%

H_THERMTRIP#_R

0_0402_5%

0_0402_5%

H_PM_SYNC

H_PWRGOOD

PM_DRAM_PWR GD_RPM_SYS_PWRGD_BUF

T1 PADT1 PAD

T2 PADT2 PAD

1 2

R454 130_0402_5%R454 130_0402_5%

JCPUB

JCPUB

PROC_SELECT#

C26

SNB_IVB#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWR OK

AR33

RESET#

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

3

BCLK

BCLK#

MISCTHERMALPWR MANAGEMENT

MISCTHERMALPWR MANAGEMENT

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLOCKS

CLOCKS

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

DDR3

MISC

DDR3

MISC

PRDY#

PREQ#

TCK
TMS

TRST#

TDI

TDO

DBR#

BPM#[0]

JTAG & BPM

JTAG & BPM

BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

@

@

100 MHz

A28
A27

120 MHz

A16
A15

R8

AK1
A5
A4

AP29
AP27

AR26
AR27
AP30

AR28
AP26

AL35

AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32

CLK_CPU_DMI
CLK_CPU_DMI#

CLK_CPU_DPLL
CLK_CPU_DPLL#

H_DRAMRST#

SM_RCOMP_0

R1437 140_0402_1%R1437 140_0402_1%

SM_RCOMP_1

R1438 25.5_0402_1%R1438 25.5_0402_1%

SM_RCOMP_2

R1439 200_0402_1%R1439 200_0402_1%

XDP_PRDY#
XDP_PREQ#

XDP_TCK_R
XDP_TMS_R
XDP_TRST#_R

XDP_TDI_R
XDP_TDO_R

XDP_DBRESET#_R

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_BPM#6
XDP_BPM#7

H_DRAMRST# 7

R11 0_0402_5%@R11 0_0402 _5%@

1 2

2

CLK_CPU_DMI 18
CLK_CPU_DMI# 18

12
12
12

DDR3 Compensatio n Signals
Layout Note:Plac e these
resistors near P rocessor

T48PAD T 48PAD
T49PAD T 49PAD

XDP_DBRESET#

T3PAD T3PAD
T4PAD T4PAD
T8PAD T8PAD
T9PAD T9PAD
T10PAD T 10PAD
T45PAD T 45PAD
T46PAD T 46PAD
T47PAD T 47PAD

1

Stuff R41 and R42 if do not support eDP

+1.05VS_VCCP

CLK_CPU_DPLL#

CLK_CPU_DPLL

R36

R36

1 2

1K_0402_5%

1K_0402_5%

PU/PD for JTAG signals

XDP_TMS_R

XDP_TDI_R

XDP_TDO_R

XDP_TCK_R

XDP_TRST#_R

R42 1K_0402_5%R42 1K_0402_5%

1 2

R41 1K_0402_5%R41 1K_0402_5%

1 2

+3VS

XDP_DBRESET# 19

R28 51_0402_5%R28 51_0402_5%

R29 51_0402_5%R29 51_0402_5%

R30 51_0402_5%R30 51_0402_5%

R31 51_0402_5%R31 51_0402_5%

R32 51_0402_5%R32 51_0402_5%

+1.05VS_VCCP

12

12

12

12

12

FAN Control Circuit

Buffered Reset to CPU

R154

R154

0_0603_5%

0_0603_5%

2

FAN_SPEED133

40 mil

+FAN1

+3VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C84

C84

PLT_RST# 21,27,28,29,30,33,34

U3

PLT_RST#

A A

U3

1

OE#

2

IN

3

GND

74AHC1G125GW_SOT353-5

74AHC1G125GW_SOT353-5

5

2

5

VCC

BUFO_CPU_RST# BUF _CPU_RST#

4

OUT

+1.05VS_VCCP

12

R69

R69
75_0402_5%

75_0402_5%

43_0402_1%

43_0402_1%

1 2

R155

R155

12

R209

R209
0_0402_5%

0_0402_5%

@

@

10U_0805_10V6K

10U_0805_10V6K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

Compal Secret Data

Compal Secret Data

Compal Secret Data

+5VS

2

C3

1

Deciphered Date

Deciphered Date

Deciphered Date

1A

@C3

@

1 2

+3VS

12

R3

R3
10K_0402_5%

10K_0402_5%

D86

D86

FANPWM

12

C4

C4

10U_0805_10V6K

10U_0805_10V6K

2

1

+5VS

1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

1

C6

C6

0.01U_0402_25V7K

0.01U_0402_25V7K

@

@

2

D57

D57

1

221

FANPWM33

+FAN1

BAS16_SOT23-3

BAS16_SOT23-3

Close to Connector

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Sandy Bridge_JTAG/XDP/FAN

Sandy Bridge_JTAG/XDP/FAN

Sandy Bridge_JTAG/XDP/FAN

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

1

JFAN

JFAN

1

1

2

2

3

3

4

4

ACES_85204-0400N

ACES_85204-0400N

@

@

1

C379

C379

2

1000P_0402_50V7K

1000P_0402_50V7K

5 46Wednesday, October 20, 2010

5 46Wednesday, October 20, 2010

5 46Wednesday, October 20, 2010

0.1

0.1

0.1

5

4

3

2

1

+1.05VS_VCCP

R34

R34

24.9_0402_1%

JCPUA

D D

DMI_PTX_CRX_N019
DMI_PTX_CRX_N119
DMI_PTX_CRX_N219
DMI_PTX_CRX_N319

DMI_PTX_CRX_P019
DMI_PTX_CRX_P119
DMI_PTX_CRX_P219
DMI_PTX_CRX_P319

DMI_CTX_PRX_N019
DMI_CTX_PRX_N119
DMI_CTX_PRX_N219
DMI_CTX_PRX_N319

DMI_CTX_PRX_P019
DMI_CTX_PRX_P119
DMI_CTX_PRX_P219
DMI_CTX_PRX_P319

FDI_CTX_PRX_N019
FDI_CTX_PRX_N119
FDI_CTX_PRX_N219

C C

eDP_COMP signals should be
shorted near balls and
routed with typical
impedance <25m ohm

B B

+1.05VS_VCCP

+1.05VS_VCCP

FDI_CTX_PRX_N319
FDI_CTX_PRX_N419
FDI_CTX_PRX_N519
FDI_CTX_PRX_N619
FDI_CTX_PRX_N719

FDI_CTX_PRX_P019
FDI_CTX_PRX_P119
FDI_CTX_PRX_P219
FDI_CTX_PRX_P319
FDI_CTX_PRX_P419
FDI_CTX_PRX_P519
FDI_CTX_PRX_P619
FDI_CTX_PRX_P719

FDI_FSYNC019
FDI_FSYNC119

FDI_INT19

FDI_LSYNC019
FDI_LSYNC119

R9 24.9_0402_1%R9 24.9_0402_1%

1 2

R33 10K_0402_5%R33 10K_0402_5%

1 2

DMI_PTX_CRX_N0
DMI_PTX_CRX_N1
DMI_PTX_CRX_N2
DMI_PTX_CRX_N3

DMI_PTX_CRX_P0
DMI_PTX_CRX_P1
DMI_PTX_CRX_P2
DMI_PTX_CRX_P3

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_FSYNC0
FDI_FSYNC1

FDI_INT

FDI_LSYNC0
FDI_LSYNC1

EDP_COMP

JCPUA

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]

DMI

DMI

Intel(R) FDI

Intel(R) FDI

eDP

eDP

PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[10]

PEG_RX[11]

PEG_RX[12]

PEG_RX[13]

PEG_RX[14]

PEG_RX[15]

PEG_TX#[0]

PEG_TX#[1]

PEG_TX#[2]

PEG_TX#[3]

PEG_TX#[4]

PEG_TX#[5]

PEG_TX#[6]

PEG_TX#[7]

PEG_TX#[8]

PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]

PCI EXPRESS* - GRAPHICS

PCI EXPRESS* - GRAPHICS

PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PEG_TX[10]

PEG_TX[11]

PEG_TX[12]

PEG_TX[13]

PEG_TX[14]

PEG_TX[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]

J22
J21
H22

K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32

J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32

M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25

M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25

@

@

PEG_COMP

PCIE_GTX_C_CRX_N0
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_N15

PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_P15

PCIE_CTX_GRX_N0
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_N13
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_N15

PCIE_CTX_GRX_P0
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_P12
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_P15

Close to CPU

A A

5

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DIS@

DIS@

1 2

R689 1K_0402_5%

R689 1K_0402_5%

DIS@

DIS@

1 2

R690 1K_0402_5%

R690 1K_0402_5%

DIS@

DIS@

1 2

R695 1K_0402_5%

R695 1K_0402_5%

DIS@

DIS@

1 2

R696 1K_0402_5%

R696 1K_0402_5%

DIS@

DIS@

1 2

R697 1K_0402_5%

R697 1K_0402_5%

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

24.9_0402_1%

C520 .1U_0402_16V7KC520 .1U_0402_16V7K
C521 .1U_0402_16V7KC521 .1U_0402_16V7K
C522 .1U_0402_16V7KC522 .1U_0402_16V7K
C523 .1U_0402_16V7KC523 .1U_0402_16V7K
C524 .1U_0402_16V7KC524 .1U_0402_16V7K
C525 .1U_0402_16V7KC525 .1U_0402_16V7K
C526 .1U_0402_16V7KC526 .1U_0402_16V7K
C527 .1U_0402_16V7KC527 .1U_0402_16V7K
C528 .1U_0402_16V7KC528 .1U_0402_16V7K
C529 .1U_0402_16V7KC529 .1U_0402_16V7K
C530 .1U_0402_16V7KC530 .1U_0402_16V7K
C531 .1U_0402_16V7KC531 .1U_0402_16V7K
C532 .1U_0402_16V7KC532 .1U_0402_16V7K
C533 .1U_0402_16V7KC533 .1U_0402_16V7K
C534 .1U_0402_16V7KC534 .1U_0402_16V7K
C535 .1U_0402_16V7KC535 .1U_0402_16V7K

C536 .1U_0402_16V7KC536 .1U_0402_16V7K
C537 .1U_0402_16V7KC537 .1U_0402_16V7K
C538 .1U_0402_16V7KC538 .1U_0402_16V7K
C539 .1U_0402_16V7KC539 .1U_0402_16V7K
C540 .1U_0402_16V7KC540 .1U_0402_16V7K
C541 .1U_0402_16V7KC541 .1U_0402_16V7K
C542 .1U_0402_16V7KC542 .1U_0402_16V7K
C543 .1U_0402_16V7KC543 .1U_0402_16V7K
C544 .1U_0402_16V7KC544 .1U_0402_16V7K
C545 .1U_0402_16V7KC545 .1U_0402_16V7K
C546 .1U_0402_16V7KC546 .1U_0402_16V7K
C547 .1U_0402_16V7KC547 .1U_0402_16V7K
C548 .1U_0402_16V7KC548 .1U_0402_16V7K
C549 .1U_0402_16V7KC549 .1U_0402_16V7K
C550 .1U_0402_16V7KC550 .1U_0402_16V7K
C551 .1U_0402_16V7KC551 .1U_0402_16V7K

C39 .1U_0402_16V7KC39 .1U_0402_16V7K
C40 .1U_0402_16V7KC40 .1U_0402_16V7K
C41 .1U_0402_16V7KC41 .1U_0402_16V7K
C42 .1U_0402_16V7KC42 .1U_0402_16V7K
C43 .1U_0402_16V7KC43 .1U_0402_16V7K
C44 .1U_0402_16V7KC44 .1U_0402_16V7K
C45 .1U_0402_16V7KC45 .1U_0402_16V7K
C46 .1U_0402_16V7KC46 .1U_0402_16V7K
C47 .1U_0402_16V7KC47 .1U_0402_16V7K
C48 .1U_0402_16V7KC48 .1U_0402_16V7K
C49 .1U_0402_16V7KC49 .1U_0402_16V7K
C50 .1U_0402_16V7KC50 .1U_0402_16V7K
C52 .1U_0402_16V7KC52 .1U_0402_16V7K
C51 .1U_0402_16V7KC51 .1U_0402_16V7K
C59 .1U_0402_16V7KC59 .1U_0402_16V7K
C53 .1U_0402_16V7KC53 .1U_0402_16V7K

C60 .1U_0402_16V7KC60 .1U_0402_16V7K
C72 .1U_0402_16V7KC72 .1U_0402_16V7K
C73 .1U_0402_16V7KC73 .1U_0402_16V7K
C74 .1U_0402_16V7KC74 .1U_0402_16V7K
C76 .1U_0402_16V7KC76 .1U_0402_16V7K
C75 .1U_0402_16V7KC75 .1U_0402_16V7K
C78 .1U_0402_16V7KC78 .1U_0402_16V7K
C77 .1U_0402_16V7KC77 .1U_0402_16V7K
C62 .1U_0402_16V7KC62 .1U_0402_16V7K
C61 .1U_0402_16V7KC61 .1U_0402_16V7K
C67 .1U_0402_16V7KC67 .1U_0402_16V7K
C66 .1U_0402_16V7KC66 .1U_0402_16V7K
C69 .1U_0402_16V7KC69 .1U_0402_16V7K
C68 .1U_0402_16V7KC68 .1U_0402_16V7K
C71 .1U_0402_16V7KC71 .1U_0402_16V7K
C70 .1U_0402_16V7KC70 .1U_0402_16V7K

Typ- suggest 220nF. The change in AC capacitor
value from 100nF to 220nF is to enable
compatibility with future platforms having PCIE
Gen3 (8GT/s)

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

3

PEG_ICOMPI and RCOMPO signals should be
shorted and routed
with - max length = 500 mils - typical

12

impedance = 43 m ohm (4 mils)
PEG_ICOMPO signals should be routed with ­max length = 500 mils

- typical impedance = 14.5 m ohm (12 mils)

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

PCIE_GTX_CRX_N0
PCIE_GTX_CRX_N1
PCIE_GTX_CRX_N2
PCIE_GTX_CRX_N3
PCIE_GTX_CRX_N4
PCIE_GTX_CRX_N5
PCIE_GTX_CRX_N6
PCIE_GTX_CRX_N7
PCIE_GTX_CRX_N8
PCIE_GTX_CRX_N9
PCIE_GTX_CRX_N10
PCIE_GTX_CRX_N11
PCIE_GTX_CRX_N12
PCIE_GTX_CRX_N13
PCIE_GTX_CRX_N14
PCIE_GTX_CRX_N15

PCIE_GTX_CRX_P0
PCIE_GTX_CRX_P1
PCIE_GTX_CRX_P2
PCIE_GTX_CRX_P3
PCIE_GTX_CRX_P4
PCIE_GTX_CRX_P5
PCIE_GTX_CRX_P6
PCIE_GTX_CRX_P7
PCIE_GTX_CRX_P8
PCIE_GTX_CRX_P9
PCIE_GTX_CRX_P10
PCIE_GTX_CRX_P11
PCIE_GTX_CRX_P12
PCIE_GTX_CRX_P13
PCIE_GTX_CRX_P14
PCIE_GTX_CRX_P15

PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_N8

PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_N15

PCIE_CTX_C_GRX_P0

PCIE_CTX_C_GRX_P1

PCIE_CTX_C_GRX_P2

PCIE_CTX_C_GRX_P3

PCIE_CTX_C_GRX_P4

PCIE_CTX_C_GRX_P5

PCIE_CTX_C_GRX_P6

PCIE_CTX_C_GRX_P7

PCIE_CTX_C_GRX_P8

PCIE_CTX_C_GRX_P9

PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_P15

PCIE_GTX_CRX_N[0..15] 13

PCIE_GTX_CRX_P[0..15] 13

PCIE_CTX_C_GRX_N[0..15] 13

PCIE_CTX_C_GRX_P[0..15] 13

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Sandy Bridge_DMI/PEG/FDI

Sandy Bridge_DMI/PEG/FDI

Sandy Bridge_DMI/PEG/FDI

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

6 48Wednesday, October 20, 2010

6 48Wednesday, October 20, 2010

6 48Wednesday, October 20, 2010

1

0.1

0.1

0.1

5

JCPUC

F10

G10

N10

M10

AG6
AG5
AK6
AK5
AH5
AH6

AJ5
AJ6
AJ8

AK8

AJ9
AK9
AH8
AH9

AL9

AL8

AP11

AN11

AL12
AM12
AM11

AL11
AP12
AN12

AJ14
AH14

AL15
AK15

AL14
AK14

AJ15
AH15

AE10

AF10

AE8
AD9

AF9

M8

M9

M7

C5
D5
D3
D2
D6
C6
C2
C3

F8

G9
F9
F7
G8
G7
K4
K5
K1

J1
J5
J4
J2

K2

N8
N7

N9

V6

JCPUC

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

DDR_A_D[0..63]11

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3

D D

C C

B B

DDR_A_BS011
DDR_A_BS111
DDR_A_BS211

DDR_A_CAS#11
DDR_A_RAS#11

DDR_A_WE#11

DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#

4

DDRA_CLK0

AB6

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

SA_CLK[2]

SA_CLK#[2]

SA_CKE[2]

SA_CLK[3]

SA_CLK#[3]

SA_CKE[3]

SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]

SA_ODT[0]

SA_ODT[1]
SA_ODT[2]
SA_ODT[3]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

DDRA_CLK0#

AA6

DDRA_CKE0

V9

DDRA_CLK1 DDRB_ CLK1

AA5

DDRA_CLK1# DDRB_ CLK1#

AB5

DDRA_CKE1 DDRB_CKE1

V10

AB4
AA4
W9

AB3
AA3
W10

DDRA_SCS0# DDRB_SCS0#

AK3

DDRA_SCS1#

AL3
AG1
AH1

DDRA_ODT0 DDRB_ODT0

AH3

DDRA_ODT1

AG3
AG2
AH2

DDR_A_DQS#0

C4

DDR_A_DQS#1

G6

DDR_A_DQS#2

J3

DDR_A_DQS#3

M6

DDR_A_DQS#4

AL6

DDR_A_DQS#5

AM8

DDR_A_DQS#6

AR12

DDR_A_DQS#7

AM15

DDR_A_DQS0

D4

DDR_A_DQS1

F6

DDR_A_DQS2

K3

DDR_A_DQS3

N6

DDR_A_DQS4

AL5

DDR_A_DQS5

AM9

DDR_A_DQS6

AR11

DDR_A_DQS7

AM14

DDR_A_MA0

AD10

DDR_A_MA1

W1

DDR_A_MA2

W2

DDR_A_MA3

W7

DDR_A_MA4

V3

DDR_A_MA5

V2

DDR_A_MA6

W3

DDR_A_MA7

W6

DDR_A_MA8

V1

DDR_A_MA9

W5

DDR_A_MA10

AD8

DDR_A_MA11

V4

DDR_A_MA12

W4

DDR_A_MA13

AF8

DDR_A_MA14

V5

DDR_A_MA15

V7

3

JCPUD

AM5
AM6
AR3

AN3
AN2
AN1

AN9

AN8
AR6
AR5
AR9

AJ11

AH11

AR8

AJ12

AH12

AT11
AN14
AR14

AT14

AT12
AN15
AR15

AT15

AA10

JCPUD

C9
A7

D10

C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8

K10

K9
J9

J10

K8

K7
M5
N4
N2
N1
M4
N5
M2
M1

AP3

AP2
AP5

AT5
AT6
AP6

AT8
AT9

AA9
AA7

R6

AB8
AB9

DDR_B_D[0..63]12

DDRA_CLK0 11 DDRB_CLK0 12
DDRA_CLK0# 11
DDRA_CKE0 11 DDRB_CKE0 12

DDRA_CLK1 11
DDRA_CLK1# 11 DDRB_CLK1# 12
DDRA_CKE1 11

DDRA_SCS0# 11
DDRA_SCS1# 11 DDRB_SCS1# 12

DDRA_ODT0 11 DDRB_ODT0 12
DDRA_ODT1 11 DDRB_ODT1 12

DDR_A_DQS#[0..7] 11

DDR_A_DQS[0..7] 11

DDR_A_MA[0..15] 11

DDR_B_BS012
DDR_B_BS112
DDR_B_BS212

DDR_B_CAS#12
DDR_B_RAS#12

DDR_B_WE#12

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

DDR_B_BS0
DDR_B_BS1
DDR_B_BS2

DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

2

AE2

SB_CLK[0]

AD2

SB_CLK#[0]

R9

SB_CKE[0]

AE1

SB_CLK[1]

AD1

SB_CLK#[1]

R10

SB_CKE[1]

AB2

SB_CLK[2]

AA2

SB_CLK#[2]

T9

SB_CKE[2]

AA1

SB_CLK[3]

AB1

SB_CLK#[3]

T10

SB_CKE[3]

AD3

SB_CS#[0]

AE3

SB_CS#[1]

AD6

SB_CS#[2]

AE6

SB_CS#[3]

AE4

SB_ODT[0]

AD4

SB_ODT[1]

AD5

SB_ODT[2]

AE5

SB_ODT[3]

DDR_B_DQS#0

D7

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

F3
K6
N3
AN5
AP9
AK12
AP15

C7
G3
J6
M3
AN6
AP8
AK11
AP14

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDRB_CLK0
DDRB_CLK0#
DDRB_CKE0

DDRB_SCS1#

DDRB_ODT1

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8

DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

1

DDRB_CLK0# 12

DDRB_CLK1 12

DDRB_CKE1 12

DDRB_SCS0# 12

DDR_B_DQS#[0..7] 12

DDR_B_DQS[0..7] 12

DDR_B_MA[0..15] 12

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

R466

R466

0_0402_5%

0_0402_5%

1 2

@

@

Q14

Q14

D

S

D

S

1 2

13

BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

G

G

2

1

C140

C140

0.047U_0402_25V6K

0.047U_0402_25V6K

2

H_DRAMRST#5

R464

R464

4.99K_0402_1%

A A

DRAMRST_CNTRL_PC H18

5

4.99K_0402_1%

DRAMRST_CNTRL

1 2

R463 0_0402 _5%R463 0_0402 _5%

1K_0402_5%

1K_0402_5%

DDR3_DRAMRST#_RH_DRAMRST#

@

@

+1.5V

12

R465

R465

R467

R467
1K_0402_5%

1K_0402_5%

1 2

4

SM_DRAMRST# 11,12

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Sandy Bridge_rPGA_Rev0p61

2

@

@

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Sandy Bridge_DDR3

Sandy Bridge_DDR3

Sandy Bridge_DDR3

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

7 48Wednesday, October 20, 2010

7 48Wednesday, October 20, 2010

7 48Wednesday, October 20, 2010

1

0.1

0.1

0.1

5

4

3

2

1

+CPU_CORE

D D

C C

B B

A A

JCPUF

JCPUF

94A (Quad Core 45W)
53A (SV 35W)

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

Sandy Bridge_rPGA_Rev0p6 1

Sandy Bridge_rPGA_Rev0p6 1

POWER

POWER

PEG AND DDR

PEG AND DDR

CORE SUPPLY

CORE SUPPLY

VSS_SENSE_VCCIO

SENSE LINES SVID

SENSE LINES SVID

5

8.5A

VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8

VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24

VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

VCCIO40

VIDALERT#

VIDSCLK
VIDSOUT

VCC_SENSE
VSS_SENSE

VCCIO_SENSE
VSSIO_SENSE

@

@

22U_0805_6.3V6M

22U_0805_6.3V6M

AH13
AH10

C146

C146

AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11

C147

C147

H14
H12
H11
G14
G13

22U_0805_6.3V6M

22U_0805_6.3V6M

G12
F14
F13
F12
F11
E14
E12

Bottom Socket Cavity x 5

E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

J23

H_CPU_SVIDALRT#

AJ29

H_CPU_SVIDCLK

AJ30

H_CPU_SVIDDAT

AJ28

VCCSENSE_R

AJ35

VSSSENSE_R

AJ34

VCCIO_SENSE

B10
A10

R102

R102
0_0402_5%

0_0402_5%

1 2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C143

C143

C144

C144

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C145

C145

C163

C163

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

12

R65 0_04 02_5%R65 0_04 02_5%

1 2

R52 0_04 02_5%R52 0_04 02_5%

1 2

R105

R105
100_0402_1%

100_0402_1%

@

@

1 2

@

@

R70

R70
130_0402_5%

130_0402_5%

+1.05VS_VCCP

Close to CPU

4

+1.05VS_VCCP Decoupling:
SPEC => 2X 330U (17m ohm), 12X 22U

TOP Socket Cavity x 7

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C141

C141

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C153

C153

@

@

2

1 2

R67 43_0402_1%R67 43_0402_1%

1 2

R63 0 _0402_5%R63 0 _0402_5%

1 2

R66 0 _0402_5%R66 0 _0402_5%

VCCIO_SENSE 4 3

C137

C137

2

1

C160

C160

@

@

2

22U_0805_6.3V6M

22U_0805_6.3V6M

+1.05VS_VCCP+1.05VS_VCCP

1

C136

C136

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C152

C152

@

@

2

12

R68

R68
75_0402_5%

75_0402_5%

+CPU_CORE

R64

R64
100_0402_1%

100_0402_1%

1 2

12

R62

R62
100_0402_1%

100_0402_1%

+1.05VS_VCCP

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C135

C135

2

1

C139

C139

@

@

2

22U_0805_6.3V6M

22U_0805_6.3V6M

330U_2.5V_M_R17

330U_2.5V_M_R17

VR_SVID_ALRT# 44
VR_SVID_CLK 44
VR_SVID_DAT 44

Pull high resistor on VR side

22U_0805_6.3V6M

1

1

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

Cl

C133

C133

C134

C134

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C132

C132

C138

C138

@

@

@

@

2

330U_2.5V_M_R17

330U_2.5V_M_R17

1

+

+

C10

C10

C11

C11

2

ose to CPU

VCCSENSE 44
VSSSENSE 44

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C142

C142

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

1

+

+

C12

C12

2

3

1

2

1

+

+

2

330U_2.5V_M_R17@

330U_2.5V_M_R17@

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

+CPU_CORE

10U_0805_10V6K

10U_0805_10V6K

1

C126

C126

10U_0805_10V6K

10U_0805_10V6K

1

C131

C131

@

@

2

2

+CPU_CORE Decoupling:
4

+CPU_CORE

10U_0805_10V6K

10U_0805_10V6K

1

C102

C102

C101

C101

2

10U_0805_10V6K

10U_0805_10V6K

+CPU_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C151

C151

C159

C159

2

22U_0805_6.3V6M

22U_0805_6.3V6M

+CPU_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C150

C150

C158

C158

2

22U_0805_6.3V6M

22U_0805_6.3V6M

Co-Lay with C2,C7

+CPU_CORE

330U_D2_2VM_R6M

330U_D2_2VM_R6M

1

1

+

+

+

+

C890

C890

2 3

2 3

330U_D2_2VM_R6M

330U_D2_2VM_R6M

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Reserve to CPU_CORE test

10U_0805_10V6K

1

C221

C221

@

@

2

10U_0805_10V6K

10U_0805_10V6K

10U_0805_10V6K

1

C220

C220

@

@

2

1

2

10U_0805_10V6K

10U_0805_10V6K

1

C209

C209

@

@

@

@

2

10U_0805_10V6K

10U_0805_10V6K

C214

C214

1

C215

C215

@

@

2

10U_0805_10V6K

10U_0805_10V6K

10U_0805_10V6K

10U_0805_10V6K

1

C219

C219

@

@

2

X 330U (6m ohm), 16X 22U, 10X 10U

Bottom Socket Cavity

10U_0805_10V6K

1

C103

C103

2

10U_0805_10V6K

10U_0805_10V6K

10U_0805_10V6K

10U_0805_10V6K

1

C104

C104

2

1

2

1

C105

C105

2

10U_0805_10V6K

10U_0805_10V6K

10U_0805_10V6K

1

C106

C106

C107

C107

2

10U_0805_10V6K

10U_0805_10V6K

10U_0805_10V6K

10U_0805_10V6K

1

C108

C108

2

Top Socket Edge

22U_0805_6.3V6M

1

C130

C130

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C129

C129

2

1

C124

C124

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C123

C123

2

1

C122

C122

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C121

C121

2

Top Socket Cavity

22U_0805_6.3V6M

1

C128

C128

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C127

C127

2

1

C120

C120

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C118

C118

2

1

C119

C119

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C117

C117

2

Bottom Socket Edge

+CPU_CORE

1

C891

C891

2 3

330U_D2_2VM_R6M

330U_D2_2VM_R6M

+

+

C894

C894

2

330U_D2_2V_Y

330U_D2_2V_Y

1

@

@

+

+

C2

C2

2

Title

Title

Title

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet of

Date: Sheet of

10U_0805_10V6K

10U_0805_10V6K

1

1

C222

C222

C223

C223

@

@

10U_0805_10V6K

10U_0805_10V6K

1

C109

C109

2

10U_0805_10V6K

10U_0805_10V6K

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

C5

C5

330U_D2_2V_Y

330U_D2_2V_Y

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

@

@

@

@

2

2

10U_0805_10V6K

10U_0805_10V6K

1

1

C110

C110

C111

C111

@

@

2

2

10U_0805_10V6K

10U_0805_10V6K

1

C125

C125

@

@

2

330U_D2_2V_Y

330U_D2_2V_Y

1

1

@

@

+

+

+

+

C9

C9

C7

C7

2

2

Sandy Bridge_POWER-1

Sandy Bridge_POWER-1

Sandy Bridge_POWER-1

1

1

2

1

+

+

330U_D2_2V_Y

330U_D2_2V_Y

2

0.1

0.1

0.1

of

8 48Wednesday, October 20, 2010

8 48Wednesday, October 20, 2010

8 48Wednesday, October 20, 2010

5

1

+

+

C113

C113

2

1

C338

C338

OPT@

OPT@

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C346

C346

OPT@

OPT@

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C391

C391

@

@

2

22U_0805_6.3V6M

22U_0805_6.3V6M

ESR 17mohm

330U_2.5V_M_R17

330U_2.5V_M_R17

SR 6mohm

E

330U_D2_2VM_R6M@

330U_D2_2VM_R6M@

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C341

C341

OPT@

OPT@

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C347

C347

OPT@

OPT@

2

1

2

+GFX_CORE Decoupling:

X 470U (4m ohm), 12X 22U

2

+GFX_CORE

D D

R71

R71
0_0402_5%

0_0402_5%

DIS@

DIS@

1 2

Bottom Socket
Cavity

Top Socket

C C

Cavity

Bottom Socket Edge

Co-lay for Cost Down Plan

330U_D2_2VM_R6M

330U_D2_2VM_R6M

1

+

+

C112

C112

@

@

2

22U_0805_6.3V6M

1

1

C267

C267

OPT@

OPT@

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C271

C271

OPT@

OPT@

22U_0805_6.3V6M

22U_0805_6.3V6M

C266

C266

OPT@

OPT@

Bottom Socket Edge

22U_0805_6.3V6M

22U_0805_6.3V6M

C343

C343

OPT@

OPT@

1

1

C344

C344

OPT@

OPT@

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C345

C345

OPT@

OPT@

Top Socket Edge

22U_0805_6.3V6M

22U_0805_6.3V6M

C349

C349

@

@

1

1

C350

C350

@

@

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C351

C351

@

@

1

C342

C342

OPT@

OPT@

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C348

C348

OPT@

OPT@

2

22U_0805_6.3V6M

22U_0805_6.3V6M

+GFX_CORE

1

C873

C873

OPT@

OPT@

2

1

2

1

2

+

+

AT24
AT23
AT21
AT20
AT18

AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17

AL24

AL23

AL21

AL20

AL18

AL17
AK24
AK23
AK21
AK20
AK18
AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17
AH24
AH23
AH21
AH20
AH18
AH17

VCCPLL Decoupling:
1X 330U (6m ohm), 1X 10U, 2x1U

+1.8VS

R76

R76

10U_0805_10V6K

10U_0805_10V6K

B B

A A

12

0_0805_5%

0_0805_5%

C185

C185

+

+

@

@

330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

1

C186

C186

2

+1.8VS_VCCPLL

1

1

C206

C206

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C230

C230

1U_0402_6.3V6K

1U_0402_6.3V6K

2

4

JCPUG

JCPUG

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5

33

VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54

1.2A

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

POWER

POWER

A

GRAPHICS

GRAPHICS

1.8V RAIL

1.8V RAIL

VCC_AXG_SENSE_R

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

VREFMISC

VREFMISC

DDR3 -1.5V RAILS

DDR3 -1.5V RAILS

SA RAIL

SA RAIL

VCCSA_SENSE

VCCSA_VID0

VCCSA_VID1

AK35
AK34

+V_SM_VREF should
have 20 mil trace width

+V_SM_VREF_CNT

AL1

SM_VREF

R486

R486

100K_0402_5%

100K_0402_5%

5A

AF7

VDDQ1

AF4

VDDQ2

AF1

VDDQ3

AC7

VDDQ4

AC4

VDDQ5

AC1

VDDQ6

Y7

VDDQ7

Y4

VDDQ8

Y1

VDDQ9

U7

VDDQ10

U4

VDDQ11

U1

VDDQ12

P7

VDDQ13

P4

VDDQ14

P1

VDDQ15

Bottom Socket Cavity

6A

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

FC_C22

@

@

M27
M26
L26
J26
J25
J24
H26
H25

H23

C22
C24

10K_0402_5%

10K_0402_5%

10U_0805_10V6K

10U_0805_10V6K

VCCSA_SENSE

VCCSA_VID0

VSS_AXG_SENSE_R

12

C148

C148

@

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

10U_0805_10V6K

10U_0805_10V6K

1

C447

C447

C100

C100

2

10U_0805_10V6K

10U_0805_10V6K

R114

R114

1 2

3

R121 0_0402_5%OPT@R121 0_0402_5%OPT@
R251 0_0402_5%OPT@R251 0_0402_5%OPT@

R111

R111

0_0402_5%

0_0402_5%

12

2

Q2

1

2

C114

C114

10K_0402_5%

10K_0402_5%

Reserve it to
follow CRB 1.0.

Q2

@

@

AP2302GN-HF_SOT23-3

AP2302GN-HF_SOT23-3

1

RUN_ON_CPU1.5VS3

10U_0805_10V6K

10U_0805_10V6K

1

1

C115

C115

C116

C116

2

2

10U_0805_10V6K

10U_0805_10V6K

10U_0805_10V6K

10U_0805_10V6K

1

1

C476

C476

C477

C477

@

@

2

2

10U_0805_10V6K

10U_0805_10V6K

Bo

ttom Socket Edge

R95

R95

1 2

0_0402_5% @

0_0402_5% @

R119

R119

@

@

1 2

+GFX_CORE

R74

R74
100_0402_1%OPT@

100_0402_1%OPT@

1 2
1 2

+V_SM_VREF

3

10U_0805_10V6K

10U_0805_10V6K

1

C149

C149

2

+1.5V_CPU

12

R122

R122
1K_0402_5%

1K_0402_5%

12

R252

R252
1K_0402_5%

1K_0402_5%

1

1

C154

C154

2

2

10U_0805_10V6K

10U_0805_10V6K

10U_0805_10V6K

10U_0805_10V6K

C155

C155

1 2

R75

OPT@ R75

OPT@

100_0402_1%

100_0402_1%

1 2

+1.5V_CPU Decoupling:
1X 330U (6m ohm), 6X 10U

+1.5V_CPU

ESR 6mohm

1

1

+

+

C180

C180

330U_D2_2VM_R6M

330U_D2_2VM_R6M

2

2

+VCCSA Decoupling:
1X 330U (6m ohm), 3X 10U

+VCCSA

Co-lay for Cost Down Plan

VCCSA_SENSE

1 2

R253 0_0402_5%R253 0_0402_5%

1

1

+

+

C485

C485

@

@

2

330U_D2_2VM_R6M

330U_D2_2VM_R6M

2

VCCSA_SENSE 42

VCCSAP_VID1 42

+1.5V_CPU +1.5V

C213 0.1U_0402_16V4ZC213 0.1U_0402_16V4Z

1 2

C212 0.1U_0402_16V4ZC212 0.1U_0402_16V4Z

1 2

C211 0.1U_0402_16V4ZC211 0.1U_0402_16V4Z

1 2

C210 0.1U_0402_16V4ZC210 0.1U_0402_16V4Z

1 2

2

Close to CPU

VCC_AXG_SENSE 44
VSS_AXG_SENSE 44

ESR 17mohm

@

@

330U_2.5V_M_R17

330U_2.5V_M_R17

Co-lay for Cost Down Plan

+VCCSA

ESR 17mohm

1

+

+

2

C877

C877

330U_2.5V_M_R17

330U_2.5V_M_R17

R449

R449

470_0805_5%

470_0805_5%

1 2
3

Q46B

Q46B

SUSP

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

5

4

+1.5V_CPU

1

+

+

C875

C875

2

0

0

1

1 1

+1.5V_CPU

1

C179

C179
10U_0805_10V4Z

10U_0805_10V4Z

2

C472

C472

0.1U_0402_25V6

0.1U_0402_25V6

0

1

0

PJ30

2

JUMP_43X118

JUMP_43X118

Q33

Q33

1

S

2

S

3

S

4

G

FDS6676AS_SO8

FDS6676AS_SO8

1

2

+VCCSAVCCSA_VID0 VCCSA_VID1

0.90 V

0.80 V

0.75 V

0.65 V

@PJ30

@

112

8

D

7

D

6

D

5

D

RUN_ON_CPU1.5VS3

12

R420

R420
820K_0402_5%

820K_0402_5%

1

+1.5VS

+1.5V

R455

R455

1 2

220K_0402_5%

220K_0402_5%

61

Q46A

Q46A

SUSP

2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

For Sandy Bridge

+VSB

SUSP 5,36,43

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Sandy Bridge_POWER-2

Sandy Bridge_POWER-2

Sandy Bridge_POWER-2

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

1

9 48W ednesday, October 20, 2010

9 48W ednesday, October 20, 2010

9 48W ednesday, October 20, 2010

0.1

0.1

0.1

5

JCPUH

JCPUH

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

AT13

VSS9

AT10

VSS10

AR25
AR22
AR19
AR16
AR13
AR10

AR7
AR4

AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10

AP7

AP4

AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10

AN7

AN4

AM29
AM25
AM22
AM19
AM16
AM13
AM10

AM7

AM4

AM3

AM2

AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10

AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10

AK7

AK4
AJ25

AT7

VSS11

AT4

VSS12

AT3

VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS

VSS

D D

C C

B B

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

T35
T34
T33
T32
T31
T30
T29
T28
T27
T26

P9
P8
P6
P5
P3

P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34

L33
L30
L27

L9

L8

L6

L5

L4

L3

L2

L1

K35
K32
K29
K26
J34

J31
H33
H30
H27
H24
H21
H18
H15
H13
H10

H9
H8
H7
H6
H5
H4
H3
H2

H1
G35
G32
G29
G26
G23
G20
G17
G11

F34
F31
F29

JCPUI

JCPUI

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

4

VSS

VSS

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

3

JCPUE

JCPUE

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

T54 PADT54 PAD
T5 PADT5 PAD
T6 PADT6 PAD
T7 PADT7 PAD
T11 PADT11 PAD
T12 PADT12 PAD
T15 PADT15 PAD
T18 PADT18 PAD
T16 PADT16 PAD
T19 PADT19 PAD
T21 PADT21 PAD
T20 PADT20 PAD
T50 PADT50 PAD
T51 PADT51 PAD
T52 PADT52 PAD
T53 PADT53 PAD
T26 PADT26 PAD
T27 PADT27 PAD

T22 PADT22 PAD
T24 PADT24 PAD
T25 PADT25 PAD
T23 PADT23 PAD

R115

R115

1K_0402_1%

1K_0402_1%

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

CPU_RSVD6
CPU_RSVD7

12

12

R116

R116
1K_0402_1%

1K_0402_1%

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

RSVD1

AH31

RSVD2

AJ33

RSVD3

AH33

RSVD4

AJ26

RSVD5

SA_DIMM_VREFDQ

B4

RSVD6

D1

RSVD7

SB_DIMM_VREFDQ

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

RSVD26

VCCIO_SEL

J15

RSVD27

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

RESERVED

RESERVED

RSVD28
RSVD29
RSVD30
RSVD31
RSVD32

RSVD33
RSVD34
RSVD35

RSVD37
RSVD38
RSVD39
RSVD40

RSVD41
RSVD42
RSVD43
RSVD44
RSVD45

RSVD46
RSVD47
RSVD48
RSVD49
RSVD50

RSVD51
RSVD52

RSVD53

RSVD54
RSVD55

RSVD56
RSVD57
RSVD58

L7
AG7
AE7
AK2
W8

AT26
AM33
AJ27

T8
J16
H16
G16

2

CFG Straps for Processor

(CFG[17:0] internal pull high to VCCIO)

CFG2

12

R254

R254
1K_0402_1%

1K_0402_1%

@

@

PEG Static Lane Reversal - CFG2 is for the 16x

1: Normal Operation; Lane # definition matches
socket pin map definition

*

CFG2

1

0:Lane Reversed

AR35
AT34
AT33
AP35
AR34

B34
A33
A34
B35
C35

AJ32
AK32

AH27

AN35
AM35

AT2
AT1
AR1

B1

KEY

@

@

T28 PADT28 PAD

CLK_RES_ITP 18
CLK_RES_ITP# 18

PCIE Port Bifurcation Straps

CFG[6:5]

CFG4

12

R255

R255
1K_0402_1%

1K_0402_1%

@

@

Embedded Display Port Presence Strap

1 : Disabled; No Physical Display Port
attached to Embedded Display Port

*

CFG4

11: (Default) x16 - Device 1 functions 1 and 2 disabled

*

10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled

01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

CFG6

CFG5

1K_0402_1%

1K_0402_1%

R257

R257

12

12

R256

R256
1K_0402_1%

1K_0402_1%

@

@

@

@

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

@

@

Sandy Bridge_rPGA_Rev0p61

Sandy Bridge_rPGA_Rev0p61

@

@

CFG7

12

R258

R258
1K_0402_1%

1K_0402_1%

@

@

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB
de assertion

CFG7

: PEG Wait for BIOS for training

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

0

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Sandy Bridge_GND/RSVD/CFG

Sandy Bridge_GND/RSVD/CFG

Sandy Bridge_GND/RSVD/CFG

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

1

10 48Wednesday, October 20, 2010

10 48Wednesday, October 20, 2010

10 48Wednesday, October 20, 2010

0.1

0.1

0.1

5

+VREF_DQA

1

C157

C157

C156

C156

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

D D

Close to JDDRH.1

C C

B B

A A

+3VS

C181

C181

DDR_A_BS27

DDRA_CLK07
DDRA_CLK0#7

DDR_A_BS07

DDR_A_WE#7

DDR_A_CAS#7

DDRA_SCS1#7

1

C182

C182

2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

2

R90

R90
10K_0402_5%

10K_0402_5%

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

5

DDR_A_D0
DDR_A_D1

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_D26
DDR_A_D27

DDRA_CKE0

DDR_A_BS2

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

DDRA_CLK0
DDRA_CLK0#

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13
DDRA_SCS1#

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_D42
DDR_A_D43

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_D58
DDR_A_D59

1 2

+0.75VS

12

R91

R91
10K_0402_5%

10K_0402_5%

+1.5V

JDDRH

JDDRH

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

GND2

FOX_AS0A621-J8RG-7H

FOX_AS0A621-J8RG-7H

@

@

VSS
DQ4
DQ5
VSS

DQS0#

DQS0

VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

RESET#

VSS
DQ14
DQ15

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

CKE1

VDD

VDD

VDD

VDD

VDD

CK1
CK1#

VDD

BA1
RAS#

VDD

ODT0

VDD
ODT1

VDD

VREF_CA

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

EVENT#

SDA

SCL

VTT

BOSS1
BOSS2

A15
A14

A11

A7

A6
A4

A2
A0

S0#

NC

4

+1.5V

2

DDR_A_D4

4

DDR_A_D5

6
8

DDR_A_DQS#0

10

DDR_A_DQS0

12
14

DDR_A_D6

16

DDR_A_D7

18
20

DDR_A_D12

22

DDR_A_D13

24
26
28

SM_DRAMRST#

30
32

DDR_A_D14

34

DDR_A_D15

36
38

DDR_A_D20

40

DDR_A_D21

42
44
46
48

DDR_A_D22

50

DDR_A_D23

52
54

DDR_A_D28

56

DDR_A_D29

58
60

DDR_A_DQS#3

62

DDR_A_DQS3

64
66

DDR_A_D30

68

DDR_A_D31

70
72

DDRA_CKE1

74
76

DDR_A_MA15

78

DDR_A_MA14

80
82

DDR_A_MA11

84

DDR_A_MA7

86
88

DDR_A_MA6

90

DDR_A_MA4

92
94

DDR_A_MA2

96

DDR_A_MA0

98
100

DDRA_CLK1

102

DDRA_CLK1#

104
106

DDR_A_BS1

108

DDR_A_RAS#

110
112

DDRA_SCS0#

114

DDRA_ODT0

116
118

DDRA_ODT1

120
122
124

+VREF_CAA

126
128

DDR_A_D36

130

DDR_A_D37

132
134
136
138

DDR_A_D38

140

DDR_A_D39

142
144

DDR_A_D44

146

DDR_A_D45

148
150

DDR_A_DQS#5

152

DDR_A_DQS5

154
156

DDR_A_D46

158

DDR_A_D47

160
162

DDR_A_D52

164

DDR_A_D53

166
168
170
172

DDR_A_D54

174

DDR_A_D55

176
178

DDR_A_D60

180

DDR_A_D61

182
184

DDR_A_DQS#7

186

DDR_A_DQS7

188
190

DDR_A_D62

192

DDR_A_D63

194
196
198

PM_SMBDATA

200

PM_SMBCLK

202
204

+0.75VS

206
208

4

DDR3 SO-DIMM A
Reverse Type

SM_DRAMRST# 7,12

DDRA_CKE1 7DDRA_CKE07

DDRA_CLK1 7
DDRA_CLK1# 7

DDR_A_BS1 7
DDR_A_RAS# 7

DDRA_SCS0# 7
DDRA_ODT0 7

DDRA_ODT1 7

1

1

C162

C162

C161

C161

close to JDDRH.126

PM_SMBDATA 12,18,27
PM_SMBCLK 12,18,27

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

2

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF CO MPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF CO MPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF CO MPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

3

DDR_A_DQS[0..7] 7

DDR_A_DQS#[0..7] 7

DDR_A_D[0..63] 7

DDR_A_MA[0..15] 7

+VREF_DQA

+1.5V

12

R80

R80

1K_0402_1%

1K_0402_1%

12

R82

R82

1K_0402_1%

1K_0402_1%

Layout Note:
Place near JDDRL

+1.5V

+

+

C218 390U_2.5V_M_R10

C218 390U_2.5V_M_R10

1 2

C166 10U_0603_6.3V6MC166 10U_0603_6.3V6M

1 2

C168 10U_0603_6.3V6MC168 10U_0603_6.3V6M

1 2

C171 10U_0603_6.3V6MC171 10U_0603_6.3V6M

1 2

C174 10U_0603_6.3V6MC174 10U_0603_6.3V6M

1 2

C176 10U_0603_6.3V6MC176 10U_0603_6.3V6M

1 2

C178 10U_0603_6.3V6MC178 10U_0603_6.3V6M

1 2

Compal Secret Data

Compal Secret Data

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

3

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

+1.5V

12

R79

R79

1K_0402_1%

1K_0402_1%

12

R81

R81

1K_0402_1%

1K_0402_1%

Layout Note: Place these 4 Caps near
Command and Control signals of DIMMA

+1.5V +0.75VS

C164 0.1U_0402_16V4ZC164 0.1U_0402_16V4Z

1 2

C167 0.1U_0402_16V4ZC167 0.1U_0402_16V4Z

1 2

C170 0.1U_0402_16V4ZC170 0.1U_0402_16V4Z

1 2

C173 0.1U_0402_16V4ZC173 0.1U_0402_16V4Z

1 2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

1

Layout Note:
Place near JDDRL1.203 and 204

C165 10U_0603_6.3V6MC165 10U_0603_6.3V6M

1 2

C169 1U_0402_6.3V6KC169 1U_0402_6.3V6K

12

C172 1U_0402_6.3V6KC172 1U_0402_6.3V6K

12

C175 1U_0402_6.3V6KC175 1U_0402_6.3V6K

12

C177 1U_0402_6.3V6KC177 1U_0402_6.3V6K

12

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

DDRIII-SODIMM0

DDRIII-SODIMM0

DDRIII-SODIMM0

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

11 48Wednesday, October 20, 2010

11 48Wednesday, October 20, 2010

11 48Wednesday, October 20, 2010

1

0.1

0.1

0.1

A

+VREF_DQB

1

C183

C183

C184

C184

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1 1

2

Close to JDDRL.1

DDRB_CKE07

2 2

3 3

4 4

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

+3VS

C207

C207

@

@

DDR_B_BS27

DDRB_CLK07
DDRB_CLK0#7

DDR_B_WE#7
DDR_B_CAS#7

DDRB_SCS1#7

1

2

1

C208

C208

2

@

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

R98

R98
10K_0402_5%

10K_0402_5%

R99

R99

1 2

10K_0402_5%

10K_0402_5%

DDR_B_D0
DDR_B_D1

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_D26
DDR_B_D27

DDRB_CKE0

DDR_B_BS2

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA5

DDR_B_MA3
DDR_B_MA1

DDRB_CLK0
DDRB_CLK0#

DDR_B_MA10
DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

DDR_B_MA13
DDRB_SCS1#

DDR_B_D37
DDR_B_D36

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_D42
DDR_B_D43

DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D54
DDR_B_D55

DDR_B_D56
DDR_B_D57

DDR_B_D58
DDR_B_D59

1 2

A

+0.75VS

+1.5V

JDDRL

JDDRL

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

GND2

FOX_AS0A626-U4RN-7F

FOX_AS0A626-U4RN-7F

@

@

VSS

DQ4

DQ5

VSS

DQS0#

DQS0

VSS

DQ6

DQ7

VSS
DQ12
DQ13

VSS

DM1

RESET#

VSS
DQ14
DQ15

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

CKE1

VDD

VDD

VDD

VDD

VDD

CK1
CK1#

VDD

BA1
RAS#

VDD

ODT0

VDD
ODT1

VDD

VREF_CA

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

EVENT#

SDA

SCL

VTT

BOSS1
BOSS2

A15
A14

A11

A7

A6
A4

A2
A0

S0#

NC

B

+1.5V

2

DDR_B_D4

4

DDR_B_D5

6
8

DDR_B_DQS#0

10

DDR_B_DQS0

12
14

DDR_B_D6

16

DDR_B_D7

18
20

DDR_B_D12

22

DDR_B_D13

24
26
28

SM_DRAMRST#

30
32

DDR_B_D14

34

DDR_B_D15

36
38

DDR_B_D20

40

DDR_B_D21

42
44
46
48

DDR_B_D22

50

DDR_B_D23

52
54

DDR_B_D28

56

DDR_B_D29

58
60

DDR_B_DQS#3

62

DDR_B_DQS3

64
66

DDR_B_D30

68

DDR_B_D31

70
72

DDRB_CKE1

74
76

DDR_B_MA15

78

DDR_B_MA14

80
82

DDR_B_MA11

84

DDR_B_MA7

86
88

DDR_B_MA6

90

DDR_B_MA4

92
94

DDR_B_MA2

96

DDR_B_MA0

98
100

DDRB_CLK1

102

DDRB_CLK1#

104
106

DDR_B_BS1

108

DDR_B_RAS#

110
112

DDRB_SCS0#

114

DDRB_ODT0

116
118

DDRB_ODT1

120
122
124

+VREF_CAB

126
128

DDR_B_D32

130

DDR_B_D33

132
134
136
138

DDR_B_D38

140

DDR_B_D39

142
144

DDR_B_D44

146

DDR_B_D45

148
150

DDR_B_DQS#5

152

DDR_B_DQS5

154
156

DDR_B_D46

158

DDR_B_D47

160
162

DDR_B_D52

164

DDR_B_D53

166
168
170
172

DDR_B_D50

174

DDR_B_D51

176
178

DDR_B_D60

180

DDR_B_D61

182
184

DDR_B_DQS#7

186

DDR_B_DQS7

188
190

DDR_B_D62

192

DDR_B_D63

194
196
198

PM_SMBDATA

200

PM_SMBCLK

202
204

206
208

+0.75VS

B

SM_DRAMRST# 7,11

DDRB_CKE1 7

DDRB_CLK1 7
DDRB_CLK1# 7

DDR_B_BS1 7
DDR_B_RAS# 7DDR_B_BS07

DDRB_SCS0# 7
DDRB_ODT0 7

DDRB_ODT1 7

C187

C187

Close to JDDRL.126

PM_SMBDATA 11,18,27
PM_SMBCLK 11,18,27

Reverse Type
DDR3 SO-DIMM B

+1.5V

12

R86

R86

1K_0402_1%

1K_0402_1%

12

R94

R94

1K_0402_1%

1K_0402_1%

1

1

C188

C188

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

2

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF CO MPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF CO MPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF CO MPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

C

DDR_B_DQS#[0..7] 7

DDR_B_DQS[0..7] 7

DDR_B_D[0..63] 7

DDR_B_MA[0..15] 7

+1.5V

12

R83

R83

1K_0402_1%

1K_0402_1%

+VREF_DQB

12

R84

R84

1K_0402_1%

1K_0402_1%

Layout Note:
Place near JDDRH

+1.5V

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

C

@

@

+

+

C189 330U_B2_2.5VM_R15M

C189 330U_B2_2.5VM_R15M

1 2

C192 10U_0603_6.3V6MC192 10U_0603_6.3V6M

1 2

C194 10U_0603_6.3V6MC194 10U_0603_6.3V6M

1 2

C197 10U_0603_6.3V6MC197 10U_0603_6.3V6M

1 2

C200 10U_0603_6.3V6MC200 10U_0603_6.3V6M

1 2

C202 10U_0603_6.3V6MC202 10U_0603_6.3V6M

1 2

C204 10U_0603_6.3V6MC204 10U_0603_6.3V6M

1 2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Layout Note: Place these 4 Caps near
Command and Control signals of DIMMB

D

C190 0.1U_0402_16V4ZC190 0.1U_0402_16V4Z

1 2

C193 0.1U_0402_16V4ZC193 0.1U_0402_16V4Z

1 2

C196 0.1U_0402_16V4ZC196 0.1U_0402_16V4Z

1 2

C199 0.1U_0402_16V4ZC199 0.1U_0402_16V4Z

1 2

D

E

Layout Note:
Place near JDDRH.203 and 204

+0.75VS+1.5V

C191 10U_0603_6.3V6MC191 10U_0603_6.3V6M

1 2

C195 1U_0402_6.3V6KC195 1U_0402_6.3V6K

12

C198 1U_0402_6.3V6KC198 1U_0402_6.3V6K

12

C201 1U_0402_6.3V6KC201 1U_0402_6.3V6K

12

C203 1U_0402_6.3V6KC203 1U_0402_6.3V6K

12

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMM1

DDRIII-SODIMM1

DDRIII-SODIMM1

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

12 48Wednesday, October 20, 2010

12 48Wednesday, October 20, 2010

12 48Wednesday, October 20, 2010

E

0.1

0.1

0.1

5

+3VS_DGPU

D D

Need to confirm MXM VGA_PWROK voltage level

C C

B B

A A

DGPU_PWR_EN

+3VS_DGPU

1 2

+5VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CLK_REQ_VGA#18

R566 0_0402_5%

R566 0_0402_5%

R576 0_0402_5%R576 0_0402_5%

10K_0402_5%

10K_0402_5%

@

@

RV128

RV128

VGA_PWROK

R5810K_0402_5% @ R5810K_0402_5% @

100mil(2.5A, 5VIA)

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

C339

C339

C18

C18

2

2

VGA_ENVDD14

VGA_ENBKL14

VGA_BL_PWM14

2N7002_SOT23-3

2N7002_SOT23-3
QV3

QV3

12

13

D

12

@

@

D

2

G

G

S

S

1 2

5

VGA_ENVDD
VGA_ENBKL

VGA_BL_PWM

PCIE_GTX_CRX_N15
PCIE_GTX_CRX_P15

PCIE_GTX_CRX_N14
PCIE_GTX_CRX_P14

PCIE_GTX_CRX_N13
PCIE_GTX_CRX_P13

PCIE_GTX_CRX_N12
PCIE_GTX_CRX_P12

PCIE_GTX_CRX_N11
PCIE_GTX_CRX_P11

PCIE_GTX_CRX_N10
PCIE_GTX_CRX_P10

PCIE_GTX_CRX_N9
PCIE_GTX_CRX_P9

PCIE_GTX_CRX_N8
PCIE_GTX_CRX_P8

PCIE_GTX_CRX_N7
PCIE_GTX_CRX_P7

PCIE_GTX_CRX_N6
PCIE_GTX_CRX_P6

PCIE_GTX_CRX_N5
PCIE_GTX_CRX_P5

PCIE_GTX_CRX_N4
PCIE_GTX_CRX_P4

PCIE_GTX_CRX_N3
PCIE_GTX_CRX_P3

B+

VGA_PWR_EN

1 2
2

QV2

QV2

1 3

D

D

2N7002_SOT23-3

2N7002_SOT23-3

@

@

1 2

RV110 0_0402_5%

RV110 0_0402_5%

1
3
5
7

9
11
13
15
17

19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161

RV124

RV124
10K_0402_5%

10K_0402_5%

@

@

G

G

@

@

S

S

JMXMA

JMXMA

PWR_SR C
PWR_SR C
PWR_SR C
PWR_SR C

E1 E2

E1 E2

PWR_SR C
PWR_SR C
PWR_SR C
PWR_SR C
PWR_SR C

GND
GND
GND
GND
GND

E3 E4

E3 E4

GND
GND
GND
GND
5V
5V
5V
5V
5V
GND
GND
GND
GND
PEX_STD_SW #
VGA_DISABLE#
PNL_PWR _EN
PNL_BL_EN
PNL_BL_PW M
HDMI_CEC
DVI_HPD
LVDS_DDC_DAT
LVDS_DDC_CLK
GND
OEM
OEM
OEM
OEM
GND
PEX_RX15#
PEX_RX15
GND
PEX_RX14#
PEX_RX14
GND
PEX_RX13#
PEX_RX13
GND
PEX_RX12#
PEX_RX12
GND
PEX_RX11#
PEX_RX11
GND
PEX_RX10#
PEX_RX10
GND
PEX_RX9#
PEX_RX9
GND
PEX_RX8#
PEX_RX8
GND
PEX_RX7#
PEX_RX7
GND
PEX_RX6#
PEX_RX6
GND
PEX_RX5#
PEX_RX5
GND
PEX_RX4#
PEX_RX4
GND
PEX_RX3#
PEX_RX3
GND

JAE_MM70-314-310B1-1

JAE_MM70-314-310B1-1

@

@

+3VS_DGPU

RV118

@ RV 118

@

10K_0402_5%

10K_0402_5%

1 2

CLK_REQ_GPU#

RV123

RV123
10K_0402_5%

10K_0402_5%

@

@

1 2

PWR_SR C
PWR_SR C
PWR_SR C
PWR_SR C
PWR_SR C
PWR_SR C
PWR_SR C
PWR_SR C
PWR_SR C

GND
GND
GND
GND
GND
GND
GND
GND
GND

PRSNT_R#

WAKE#

PWR_G OOD

PWR_EN

RSVD
RSVD
RSVD
RSVD

PWR_LEV EL

TH_OVERT#

TH_ALERT#

TH_PWM

GPIO0
GPIO1
GPIO2

SMB_DAT

SMB_CLK

GND
OEM
OEM
OEM
OEM
GND

PEX_TX15#

PEX_TX15

GND

PEX_TX14#

PEX_TX14

GND

PEX_TX13#

PEX_TX13

GND

PEX_TX12#

PEX_TX12

GND

PEX_TX11#

PEX_TX11

GND

PEX_TX10#

PEX_TX10

GND

PEX_TX9#

PEX_TX9

GND

PEX_TX8#

PEX_TX8

GND

PEX_TX7#

PEX_TX7

GND

PEX_TX6#

PEX_TX6

GND

PEX_TX5#

PEX_TX5

GND

PEX_TX4#

PEX_TX4

GND

PEX_TX3#

PEX_TX3

GND

4

40

1

C16

C16
10U_0805_10V6K

10U_0805_10V6K

2

1 2

0mil(10A)

VGA_PWROK 21,22

ACIN 19,33,35,39

PCIE_GTX_CRX_P[0..15]

PCIE_GTX_CRX_N[0..15]

PCIE_CTX_C_GRX_P[0..15]

PCIE_CTX_C_GRX_N[0..15]

B+

1

C15

C15
10U_0805_10V6K

10U_0805_10V6K

2

DIS@

DIS@

PR62720K_0402_1%

PR62720K_0402_1%

OPT@

OPT@

12

PR62868K_0402_1%

PR62868K_0402_1%

Resistor for fine tune sequence

2
4
6
8
10
12
14
16
18

20
22
24
26
28
30
32
34
36
38

VGA_PWROK

40
42

VGA_PWR_EN

44
46
48
50
52

ACIN_VGA

54
56
58
60
62
64
66

VGA_SMB_DA2

68

VGA_SMB_CK2

70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160

PCIE_GTX_CRX_P[0..15]6

PCIE_GTX_CRX_N[0..15]6

PCIE_CTX_C_GRX_P[0..15]6

PCIE_CTX_C_GRX_N[0..15]6

4

D25

D25

2 1

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

SYSTEM

PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_P15

PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_P14

PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_P13

PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_P12

PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_P11

PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_P10

PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_P9

PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_P8

PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_P7

PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_P6

PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_P5

PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_P4

PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_P3

3

SUSP# 17,27,33,36,41,43

DGPU_PWR_EN 21,36

HDMI

+3VS_DGPU

CLK_PCIE_VGA#18
CLK_PCIE_VGA18

VGA_HDMI_TX0-16

VGA_HDMI_TX0+16

VGA_HDMI_TX1-16

VGA_HDMI_TX1+16

VGA_HDMI_TX2-16

VGA_HDMI_TX2+16

VGA_HDMI_CLK-16

VGA_HDMI_CLK+16

VGA_HDMI_DATA16
VGA_HDMI_CLK16

1 2
1 2

PCIE_GTX_CRX_N2
PCIE_GTX_CRX_P2

PCIE_GTX_CRX_N1
PCIE_GTX_CRX_P1

PCIE_GTX_CRX_P0

CLK_PCIE_VGA#
CLK_PCIE_VGA

VGA_HDMI_TX0­VGA_HDMI_TX0+

VGA_HDMI_TX1­VGA_HDMI_TX1+

VGA_HDMI_TX2­VGA_HDMI_TX2+

VGA_HDMI_CLK­VGA_HDMI_CLK+

VGA_HDMI_DATA
VGA_HDMI_CLK

VGA_HDMI_DATA

R434.3K_0402_5% R434.3K_0402_5%

VGA_HDMI_CLK

R444.3K_0402_5% R444.3K_0402_5%

2

JMXMB

JMXMB

163

GND

165

PEX_RX2#

167

PEX_RX2

169

GND

171

PEX_RX1#

173

PEX_RX1

175

GND

177

PEX_RX0#

179

PEX_RX0

181

GND

183

PEX_REFCLK#

185

PEX_REFCLK

187

GND

189

RSVD

191

RSVD

193

RSVD

195

RSVD

197

RSVD

199

LVDS_UCLK#

201

LVDS_UCLK

203

GND

205

LVDS_UTX3#

207

LVDS_UTX3

209

GND

211

LVDS_UTX2#

213

LVDS_UTX2

215

GND

217

LVDS_UTX1#

219

LVDS_UTX1

221

GND

223

LVDS_UTX0#

225

LVDS_UTX0

227

GND

229

DP_C_L0#

231

DP_C_L0

233

GND

235

DP_C_L1#

237

DP_C_L1

239

GND

241

DP_C_L2#

243

DP_C_L2

245

GND

247

DP_C_L3#

249

DP_C_L3

251

GND

253

DP_C_AUX#

255

DP_C_AUX

257

RSVD

259

RSVD

261

RSVD

263

RSVD

265

RSVD

267

RSVD

269

RSVD

271

RSVD

273

RSVD

275

RSVD

277

RSVD

279

RSVD

281

GND

283

DP_A_L0#

285

DP_A_L0

287

GND

289

DP_A_L1#

291

DP_A_L1

293

GND

295

DP_A_L2#

297

DP_A_L2

299

GND

301

DP_A_L3#

303

DP_A_L3

305

GND

307

DP_A_AUX#

309

DP_A_AUX

310

PRSNT_L#

311

GND

JAE_MM70-314-310B1-1

JAE_MM70-314-310B1-1

@

@

PEX_TX2#

PEX_TX2

PEX_TX1#

PEX_TX1

PEX_TX0#

PEX_TX0

PEX_CLK_REQ#

PEX_RST#

VGA_DDC_DAT

VGA_DDC_CLK

VGA_VSYNC
VGA_HSYNC

VGA_RED

VGA_GREEN

VGA_BLUE

LVDS_LCLK#

LVDS_LCLK

LVDS_LTX3#

LVDS_LTX3

LVDS_LTX2#

LVDS_LTX2

LVDS_LTX1#

LVDS_LTX1

LVDS_LTX0#

LVDS_LTX0

DP_D_L0#

DP_D_L0

DP_D_L1#

DP_D_L1

DP_D_L2#

DP_D_L2

DP_D_L3#

DP_D_L3

DP_D_AUX#

DP_D_AUX
DP_C_HPD
DP_D_HPD

DP_B_L0#

DP_B_L0

DP_B_L1#

DP_B_L1

DP_B_L2#

DP_B_L2

DP_B_L3#

DP_B_L3

DP_B_AUX#

DP_B_AUX
DP_B_HPD
DP_A_HPD

VGA/B already have 4.7K ohm Pull High

+3VS_DGPU

RV22

RV22

RV24

2.2K_0402_5%

2.2K_0402_5%

OPT@

OPT@

VGA_SMB_CK2

VGA_SMB_DA2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

RV24

2.2K_0402_5%

2.2K_0402_5%

OPT@

OPT@

1 2

1 2

OPT@

OPT@

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2009/01/01 2010/01/01

2009/01/01 2010/01/01

2009/01/01 2010/01/01

+3VS_DGPU

4

2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

QV1A

QV1A

Compal Secret Data

Compal Secret Data

Compal Secret Data

5

OPT@

OPT@

QV1B

QV1B

61

Deciphered Date

Deciphered Date

Deciphered Date

3

EC_SMB_CK2 18 ,33,34,35

EC_SMB_DA2 18,33,34,35

2

162

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

RSVD
RSVD
RSVD

GND

GND

GND

GND

GND

GND

3V3
3V3

PCIE_CTX_C_GRX_N2

164

PCIE_CTX_C_GRX_P2

166
168

PCIE_CTX_C_GRX_N1

170

PCIE_CTX_C_GRX_P1

172
174

PCIE_CTX_C_GRX_N0PCIE_GTX_CRX_N0

176

PCIE_CTX_C_GRX_P0

178
180

CLK_REQ_GPU#

182

PLTRST_VGA#

184

VGA_CRT_DATA

186

VGA_CRT_CLK

188

VGA_CRT_VSYNC

190

VGA_CRT_HSYNC

192
194

VGA_CRT_R

196

VGA_CRT_G

198

VGA_CRT_B

200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232

VGA_EDP_TX0-

234

VGA_EDP_TX0+

236
238

VGA_EDP_TX1-

240

VGA_EDP_TX1+

242
244

VGA_EDP_TX2-

246

VGA_EDP_TX2+

248
250

VGA_EDP_TX3-

252

VGA_EDP_TX3+

254
256

VGA_EDP_AUX-

258

VGA_EDP_AUX

260
262
264
266
268
270
272
274
276
278
280
282
284
286
288
290
292
294
296
298
300
302
304
306
308

312

EDP_HPD

VGA/B already have 4.7K ohm Pull High

HDMI_HPD_VGA

+3VS_DGPU

40mil(1A)

VGA_SMB_CK2 EC_SMB_CK2

VGA_SMB_DA2

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Title

Title

Title

RV35 0_04 02_5%

RV35 0_04 02_5%

RV36 0_04 02_5%

RV36 0_04 02_5%

1

PLTRST_VGA# 21
VGA_CRT_DATA 15
VGA_CRT_CLK 15
VGA_CRT_VSYNC 15
VGA_CRT_HSYNC 15

VGA_CRT_R 15
VGA_CRT_G 15
VGA_CRT_B 15

VGA_EDP_TX0- 14
VGA_EDP_TX0+ 14

VGA_EDP_TX1- 14
VGA_EDP_TX1+ 14

VGA_EDP_TX2- 14
VGA_EDP_TX2+ 14

VGA_EDP_TX3- 14
VGA_EDP_TX3+ 14

VGA_EDP_AUX- 14

VGA_EDP_AUX 14

EDP_HPD 14

eDP is supported
only on IFPD????

VGA_CRT_DATA
VGA_CRT_CLK

R1431 0_0402_5%DHDMI@R1431 0_0402_5%DHDMI@

DIS@

DIS@

1 2

DIS@

DIS@

1 2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

R39 4.3K_0402_5%DIS@R39 4.3K_0402_5%DIS@

1 2

R38 4.3K_0402_5%DIS@R38 4.3K_0402_5%DIS@

1 2

12

EC_SMB_DA2

VGA_VRAM_A Lower

VGA_VRAM_A Lower

VGA_VRAM_A Lower

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

1

HDMI_HPD 16,20,22

13 48Wednesday, October 20, 2010

13 48Wednesday, October 20, 2010

13 48Wednesday, October 20, 2010

CRT

+3VS_DGPU

eDP

0.1

0.1

0.1

Compal Electronics, Inc.

A

OPTIMUS

LCD_TXOUT0+20

LCD_TXOUT0-20

LCD_TXOUT1+20

LCD_TXOUT1-20

1 1

LCD_TXOUT2+20

LCD_TXOUT2-20

LCD_TXCLK+20

LCD_TXCLK-20

LCD_EDID_CLK20

LCD_EDID_DATA20

PCH_PWM20

UMA_ENVDD20

R262 0_0402_5%

R262 0_0402_5%

R263 0_0402_5%

R263 0_0402_5%

R265 0_0402_5%

R265 0_0402_5%

R264 0_0402_5%

R264 0_0402_5%

R298 0_0402_5%

R298 0_0402_5%

R277 0_0402_5%

R277 0_0402_5%

R297 0_0402_5%

R297 0_0402_5%

R296 0_0402_5%

R296 0_0402_5%

R300 0_0402_5%

R300 0_0402_5%

R299 0_0402_5%

R299 0_0402_5%

R332 0_0402_5%

R332 0_0402_5%

R350 0_0402_5%

R350 0_0402_5%

R357 0_0402_5%

R357 0_0402_5%

OPT@

OPT@

1 2

OPT@

OPT@

1 2

OPT@

OPT@

1 2

OPT@

OPT@

1 2

OPT@

OPT@

1 2

OPT@

OPT@

1 2

OPT@

OPT@

1 2

OPT@

OPT@

1 2

OPT@

OPT@

1 2

OPT@

OPT@

1 2

OPT@

OPT@

1 2

OPT@

OPT@

1 2

OPT@

OPT@

1 2

B

LVDS_TXOUT0+

LVDS_TXOUT0-

LVDS_TXOUT1+

LVDS_TXOUT1-

LVDS_TXOUT2+

LVDS_TXOUT2-

LVDS_TXCLK+

LVDS_TXCLK-

LVDS_EDID_CLK

LVDS_EDID_DATA

LED_PWM

LCD_ENVDD

EC_ENBKL

LCD_TZOUT0+20

LCD_TZOUT0-20

LCD_TZOUT1+20

LCD_TZOUT1-20

LCD_TZOUT2+20

LCD_TZOUT2-20

LCD_TZCLK+20

LCD_TZCLK-20

EC_ENBKL 33UMA_ENBKL20

Close to LVDS Connector

C

OPT@

OPT@

1 2

R269 0_0402_5%

R269 0_0402_5%

OPT@

OPT@

1 2

R266 0_0402_5%

R266 0_0402_5%

OPT@

OPT@

1 2

R268 0_0402_5%

R268 0_0402_5%

OPT@

OPT@

1 2

R267 0_0402_5%

R267 0_0402_5%

OPT@

OPT@

1 2

R333 0_0402_5%

R333 0_0402_5%

OPT@

OPT@

1 2

R283 0_0402_5%

R283 0_0402_5%

OPT@

OPT@

1 2

R329 0_0402_5%

R329 0_0402_5%

OPT@

OPT@

1 2

R307 0_0402_5%

R307 0_0402_5%

D

LVDS_TZOUT0+

LVDS_TZOUT0-

LVDS_TZOUT1+

LVDS_TZOUT1-

LVDS_TZOUT2+

LVDS_TZOUT2-

LVDS_TZCLK+

LVDS_TZCLK-

E

150_0603_5%

150_0603_5%

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

LCD_ENVDD

+LCD_VDD

R107

R107

Q1A

Q1A

12

100K_0402_5%

100K_0402_5%

61

2

1 2

+3VS

R108

R108

OPT@

OPT@

5

R112

R112
10K_0402_5%

10K_0402_5%

F

+5VS

12

12

R120

R120
100K_0402_5%

100K_0402_5%

EDP@

EDP@

0.1U_0402_16V7K

0.1U_0402_16V7K

R109

R109

1 2

47K_0402_5%

47K_0402_5%

3

0.01U_0402_25V7K

0.01U_0402_25V7K

Q1B

Q1B
2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

OPT@

OPT@

C228

C228

LCDPWR_GATE

C229

C229

G

+3VS

2

W=80mils

S

S

OPT@

OPT@

G

G

1

1

2

Q17

Q17

2

AO3413_SOT23

AO3413_SOT23

D

D

1 3

+LCD_VDD

W=80mils

1

C233

C233

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

EDP@

EDP@

C251

C251

0.1U_0402_16V7K

0.1U_0402_16V7K

LCDPWR_GATE

2

G

G

1

2

+5VS

W=80mils

S

S

D

D

1 3

W=80mils

H

EDP@

EDP@

Q23

Q23
AO3413_SOT23

AO3413_SOT23

+LCD_VDD

12

R1446

R1446
0_0603_5%

0_0603_5%

@

@

DISCRETE

DIS@

DIS@

VGA_BL_PWM13

2 2

VGA_ENVDD13

VGA_ENBKL13

1 2

R349 0_0402_5%

R349 0_0402_5%

DIS@

DIS@

1 2

R356 0_0402_5%

R356 0_0402_5%

DIS@

DIS@

1 2

R358 0_0402_5%

R358 0_0402_5%

Close to LVDS Connector

LED_PWM

LCD_ENVDD

EC_ENBKL

USB20_N1121

USB20_P1121

LCD/PANEL BD. Conn.

CAM@

CAM@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 2

C225

C225

JLVDS

JLVDS

112
334
556
778
9910
111112
131314

15

15

16

171718

19

19

20
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
GMD41GND

ACES_87242-4001-09

ACES_87242-4001-09

2
4
6
8
10
12
14
16
18
20
22
24

LED_PWM

26
28
30
32
34
36
38
40
42

@

@

DISCRETE for 3D eDP Panel

VGA_EDP_TX0+13

VGA_EDP_TX0-13

VGA_EDP_TX1+13

VGA_EDP_TX1-13

VGA_EDP_TX2+13

VGA_EDP_TX2-13

VGA_EDP_TX3+13

3 3

VGA_EDP_TX3-13

VGA_EDP_AUX13

VGA_EDP_AUX-13

EDP@

EDP@

C880 0.1U_0402_16V7K

C880 0.1U_0402_16V7K

1 2

EDP@

EDP@

C881 0.1U_0402_16V7K

C881 0.1U_0402_16V7K

1 2

EDP@

EDP@

C882 0.1U_0402_16V7K

C882 0.1U_0402_16V7K

1 2

EDP@

EDP@

C883 0.1U_0402_16V7K

C883 0.1U_0402_16V7K

1 2

EDP@

EDP@

C884 0.1U_0402_16V7K

C884 0.1U_0402_16V7K

1 2

EDP@

EDP@

C885 0.1U_0402_16V7K

C885 0.1U_0402_16V7K

1 2

EDP@

EDP@

C886 0.1U_0402_16V7K

C886 0.1U_0402_16V7K

1 2

EDP@

EDP@

C887 0.1U_0402_16V7K

C887 0.1U_0402_16V7K

1 2

EDP@

EDP@

C888 0.1U_0402_16V7K

C888 0.1U_0402_16V7K

1 2

EDP@

EDP@

C889 0.1U_0402_16V7K

C889 0.1U_0402_16V7K

1 2

LVDS_TXOUT0+

LVDS_TXOUT0-

LVDS_TXOUT1+

LVDS_TXOUT1-

LVDS_TXOUT2+

LVDS_TXOUT2-

LVDS_TXCLK+

LVDS_TXCLK-

LVDS_EDID_CLK

LVDS_EDID_DATA

+3VS

USB20_P11_R
USB20_N11_R

LVDS_TXOUT0+
LVDS_TXOUT0­LVDS_TXOUT1+
LVDS_TXOUT1­LVDS_TXOUT2+
LVDS_TXOUT2-

LVDS_TZOUT0+
LVDS_TZOUT0­LVDS_TZOUT1+
LVDS_TZOUT1­LVDS_TZOUT2+
LVDS_TZOUT2-

BKOFF#_R

W=20mils

1 2

R388 0_0603_5%

R388 0_0603_5%

CAM@

CAM@

W=20mils

+3VS_LVDS_CAM

Close to LVDS Connector

4 4

Reserve fo r EMI requ est

R78 0_0402_5%

R78 0_0402_5%
L55

1

4

WCM-2012-900T_0805

WCM-2012-900T_0805

R96 0_0402_5%

R96 0_0402_5%

LVDS_TXCLK+
LVDS_TXCLK-

LVDS_TZCLK+
LVDS_TZCLK-

LVDS_EDID_CLK
LVDS_EDID_DATA
INT_MIC_CLK
INT_MIC_DATA
LCD_ENVDD

R387 0_0402_5%@R387 0_0402_5%@

+LCD_INV+LCD_INV

12

+3VS_LVDSDDC

68P_0402_50V8J

68P_0402_50V8J

CAM@

CAM@

1 2

@L55

@

1

4

CAM@

CAM@

1 2

1

C226

C226

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+LCD_INV

C234

C234

USB20_N11_R

2

2

USB20_P11_R

3

3

D84

@D84

@

2

1

3

PACDN042Y3R_SOT23-3

PACDN042Y3R_SOT23-3

INT_MIC_CLK 31
INT_MIC_DATA 31

INVT_PWM 33

2A

1

C227

C227

4.7U_0805_10V4Z

4.7U_0805_10V4Z

2

L2

L2

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

1

1

C235

C235

0.1U_0402_25V6

0.1U_0402_25V6

2

2

+LCD_VDD

12

+3VS

BKOFF#_R

+3VS_LVDSDDC

B+

C236

C236

R1434

R1434

R1435

R1435

@

@

12

100K_0402_5%EDP@

100K_0402_5%EDP@

12

100K_0402_5%EDP@

100K_0402_5%EDP@

1

2

0.1U_0402_25V6

0.1U_0402_25V6

LVDS_EDID_DATA

LVDS_EDID_CLK

1 2

R143

1 2

0_0402_5%

0_0402_5%

R1440

0_0603_5%

0_0603_5%

12

EDP@R143

EDP@

OPT@R1440

OPT@

12

R103 33_0402_5%R103 33_0402_5%

R113 10K_0402_5%R113 10K_0402_5%

For EMI

680P_0402_50V7K

680P_0402_50V7K

For EMI

1

1

C489

C489

C268

C268

@

@

@

@

2

2

0.1U_0402_25V6

0.1U_0402_25V6

0.1U_0402_25V6

0.1U_0402_25V6

C231

C231

C490

C490

BKOFF# 33

EDP_HPD 13

+3VS

1

1

@

@

@

@

C232

C232

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

B+

1

2

0.1U_0402_25V6

0.1U_0402_25V6

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

E

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

F

Date: Sheet of

Compal Electronics, Inc.

LVDS/eDP

LVDS/eDP

LVDS/eDP

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

G

PGRAA LA-7191P M/B

0.1

0.1

14 48Wednesday, October 20, 2010

14 48Wednesday, October 20, 2010

14 48Wednesday, October 20, 2010

H

0.1

A

B

C

D

E

1

D3

OPTIMUS

1 1

UMA_CRT _R20

UMA_CRT _G20

UMA_CRT _B20

UMA_CRT _HSYNC20

UMA_CRT _VSYNC20

UMA_CRT _CLK20

UMA_CRT _DATA20

OPT@

OPT@

1 2

R200 0_0402_ 5%

R200 0_0402_ 5%

OPT@

OPT@

1 2

R204 0_0402_ 5%

R204 0_0402_ 5%

OPT@

OPT@

1 2

R211 0_0402_ 5%

R211 0_0402_ 5%

OPT@

OPT@

1 2

R213 0_0402_ 5%

R213 0_0402_ 5%

OPT@

OPT@

1 2

R235 0_0402_ 5%

R235 0_0402_ 5%

OPT@

OPT@

1 2

R236 0_0402_ 5%

R236 0_0402_ 5%

OPT@

OPT@

1 2

R261 0_0402_ 5%

R261 0_0402_ 5%

Close to CRT Connector

CRT_R

CRT_G

CRT_B

CRT_HSYNC

CRT_VSYNC

CRT_CLK

CRT_DAT A

CRT_R

CRT_G

CRT_B

R138

R138

R140

R140

R139

R139

12

12

12

150_0402_1%

150_0402_1%

150_0402_1%

150_0402_1%

1

C238

C238

150_0402_1%

150_0402_1%

1

C239

C239

C240

2

C240

2

2.2P_0402_50V8C

2.2P_0402_50V8C

2.2P_0402_50V8C

2.2P_0402_50V8C

DAN217_ SC59

DAN217_ SC59

2

L3 NBQ1005 05T-800Y_0402L3 NBQ1005 05T-800Y_0402

1 2

L4 NBQ1005 05T-800Y_0402L4 NBQ1005 05T-800Y_0402

1 2

L5 NBQ1005 05T-800Y_0402L5 NBQ1005 05T-800Y_0402

1 2

1

2

C241

C241

2.2P_0402_50V8C

2.2P_0402_50V8C

DISCRETE

2 2

VGA_CRT _R13

VGA_CRT _G13

VGA_CRT _B13

VGA_CRT _HSYNC1 3

VGA_CRT _VSYNC13

VGA_CRT _CLK13

VGA_CRT _DATA13

DIS@

DIS@

1 2

R178 0_0402_ 5%

R178 0_0402_ 5%

DIS@

DIS@

1 2

R181 0_0402_ 5%

R181 0_0402_ 5%

DIS@

DIS@

1 2

R167 0_0402_ 5%

R167 0_0402_ 5%

DIS@

DIS@

1 2

R177 0_0402_ 5%

R177 0_0402_ 5%

DIS@

DIS@

1 2

R179 0_0402_ 5%

R179 0_0402_ 5%

DIS@

DIS@

1 2

R193 0_0402_ 5%

R193 0_0402_ 5%

DIS@

DIS@

1 2

R194 0_0402_ 5%

R194 0_0402_ 5%

Close to CRT Connector

CRT_R

CRT_G

CRT_B

CRT_HSYNC

CRT_VSYNC

CRT_CLK

CRT_DAT A

CRT_VSYNC

+CRT_VC C

1 2

C244 0.1U_0402_16V 4ZC244 0.1U_0402_16V 4Z

SN74AHC T1G125GW_ SOT353-5

SN74AHC T1G125GW_ SOT353-5

5

P

A2Y

G

3

1

4

OE#

U6

U6

+CRT_VC C

5

1

P

A2Y

SN74AHC T1G125GW_ SOT353-5

SN74AHC T1G125GW_ SOT353-5

G

3

1

@D 3

@

D4

@D 4

@

DAN217_ SC59

DAN217_ SC59

3

2

3

1

C242

C242

2

2.2P_0402_50V8C

2.2P_0402_50V8C

12

R141 10K_0402_5%R141 10K_0402_5%

D_CRT_H SYNCCRT_HSYNC

D_CRT_V SYNC

4

OE#

U7

U7

D5

DAN217_ SC59

DAN217_ SC59

2

1

2

2.2P_0402_50V8C

2.2P_0402_50V8C

1

C243

C243

@D 5

@

3

+3VS

1

2

2.2P_0402_50V8C

2.2P_0402_50V8C

1 2

L6 10_040 2_5%L6 10_0 402_5%

1 2

L7 10_040 2_5%L7 10_0 402_5%

CRT_R_L

CRT_G_L

CRT_B_L

C246

C246

@

@

If=1A

D6

D6

2

3

+CRT_VC C

HSYNC

VSYNC

1

2

10P_0402_50V8J

10P_0402_50V8J

1

RB491D_ SOT23-3

RB491D_ SOT23-3

CRT_R_L

CRT_DDC _DAT
CRT_G_L

HSYNC
CRT_B_L

VSYNC

CRT_DDC _CLK

F1

F1

21

1.1A_6V_ MINISMDC110F-2

1.1A_6V_ MINISMDC110F-2

+5VS +CRT_VC C_R +CRT_VC C

1

C245

C245

@

@

2

10P_0402_50V8J

10P_0402_50V8J

40 mils

C237

C237

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

@

@

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

ALLTO_C 10532-11505-L_ 15P-T

ALLTO_C 10532-11505-L_ 15P-T

JCRT

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

1

2

@JCRT

@

16

G

17

G

CRT CONNECTOR

3 3

+CRT_VC C

+3VS

R153

R153

4.7K_040 2_5%

4.7K_040 2_5%

2

Q205A

Q205A

5

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

Q205B

CRT_DAT A

C282

C282

33P_040 2_50V8K

33P_040 2_50V8K

@

@

4 4

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Q205B

4

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

1

1

C285

C285
33P_040 2_50V8K

33P_040 2_50V8K

2

2

@

@

200910/9 2010/01/ 23

200910/9 2010/01/ 23

200910/9 2010/01/ 23

61

3

470P_04 02_50V8J

470P_04 02_50V8J

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C284

C284

@

@

1 2

1 2

1

1

2

2

R159

R159

4.7K_040 2_5%

4.7K_040 2_5%

CRT_DDC _CLKCRT_CLK

CRT_DDC _DAT

C283

C283
470P_04 02_50V8J

470P_04 02_50V8J

@

@

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CRT

CRT

CRT

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

15 48W ednesday, October 20, 2010

15 48W ednesday, October 20, 2010

15 48W ednesday, October 20, 2010

E

of

0.1

0.1

0.1

5

HDMI CEC Controller

+3VL+3VL

12

R162

R162

10K_0402_5%

10K_0402_5%

CEC@

HDMI_CECIN

D D

C C

B B

A A

2N7002DW-T/R7_SOT36 3-6

2N7002DW-T/R7_SOT36 3-6

HDMI_CECOUT

VGA_HDMI_CLK+13

VGA_HDMI_CLK-13

VGA_HDMI_TX0+13

VGA_HDMI_TX0-13

VGA_HDMI_TX1+13

VGA_HDMI_TX1-13

VGA_HDMI_TX2+13

VGA_HDMI_TX2-13

UMA_HDMI_TXC+20

UMA_HDMI_TXC-20

UMA_HDMI_TX0+20

UMA_HDMI_TX0-20

UMA_HDMI_TX1+20

UMA_HDMI_TX1-20

UMA_HDMI_TX2+20

UMA_HDMI_TX2-20

CEC@

61

CEC@

CEC@

Q49A

Q49A

R163

R163

1 2

27K_0402_5%

27K_0402_5%

CEC@

CEC@

R165

R165

100K_0402_5%

100K_0402_5%

CEC@

CEC@

CV296 0.1U_0402_16V7K DHDMI@CV296 0.1U_0402_16V7K DHDMI@

CV293 0.1U_0402_16V7K DHDMI@CV293 0.1U_0402_16V7K DHDMI@

CV294 0.1U_0402_16V7K DHDMI@CV294 0.1U_0402_16V7K DHDMI@

CV297 0.1U_0402_16V7K DHDMI@CV297 0.1U_0402_16V7K DHDMI@

CV299 0.1U_0402_16V7K DHDMI@CV299 0.1U_0402_16V7K DHDMI@

CV298 0.1U_0402_16V7K DHDMI@CV298 0.1U_0402_16V7K DHDMI@

CV295 0.1U_0402_16V7K DHDMI@CV295 0.1U_0402_16V7K DHDMI@

CV300 0.1U_0402_16V7K DHDMI@CV300 0.1U_0402_16V7K DHDMI@

CV308 0.1U_0402_16V7K IHDMI@CV308 0.1U_0402_1 6V7K IHDMI@

CV304 0.1U_0402_16V7K IHDMI@CV304 0.1U_0402_1 6V7K IHDMI@

CV306 0.1U_0402_16V7K IHDMI@CV306 0.1U_0402_1 6V7K IHDMI@

CV302 0.1U_0402_16V7K IHDMI@CV302 0.1U_0402_1 6V7K IHDMI@

CV303 0.1U_0402_16V7K IHDMI@CV303 0.1U_0402_1 6V7K IHDMI@

CV301 0.1U_0402_16V7K IHDMI@CV301 0.1U_0402_1 6V7K IHDMI@

CV307 0.1U_0402_16V7K IHDMI@CV307 0.1U_0402_1 6V7K IHDMI@

CV305 0.1U_0402_16V7K IHDMI@CV305 0.1U_0402_1 6V7K IHDMI@

5

21

D9

D9
CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

CEC@

CEC@

12

R581

R581
27K_0402_5%

27K_0402_5%

CEC@

5

12

CEC@

HDMI_CEC

3

CEC@

CEC@

Q49B

Q49B
2N7002DW-T/R7_SOT36 3-6

2N7002DW-T/R7_SOT36 3-6

4

2

For DISCRETE

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

For Optimus

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

VGA_DVI_TXC+

VGA_DVI_TXC-

VGA_DVI_TXD0+

VGA_DVI_TXD0-

VGA_DVI_TXD1+

VGA_DVI_TXD1-

VGA_DVI_TXD2+

VGA_DVI_TXD2-

VGA_DVI_TXC+

VGA_DVI_TXC-

VGA_DVI_TXD0+

VGA_DVI_TXD0-

VGA_DVI_TXD1+

VGA_DVI_TXD1-

VGA_DVI_TXD2+

VGA_DVI_TXD2-

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4

U16

CEC_XOUT

CEC_XIN

U16

1

P3_5/SSCK/SCL/CMP1_2

2

P3_7/CNTR0#/SSO/TXD1

3

RESET#

4

XOUT/P4_7

5

VSS/AVSS

6

XIN/P4_6

7

VCC/AVCC

8

MODE

9

P4_5/INT0#/RXD1

10

P1_7/CNTR00/INT10#

R5F211A4C33SP-W 4_LSSOP20

R5F211A4C33SP-W 4_LSSOP20

UMA_HDMI_CLK20

VGA_HDMI_CLK13

VGA_HDMI_DATA13

UMA_HDMI_DATA20

@

@

1 2

R157 0_0402_ 5%

R157 0_0402_ 5%
L8

L8

1

1

4

4

WCM2012F2S- 900T04_0805

WCM2012F2S- 900T04_0805

@

@

1 2

R173 0_0402_5%

R173 0_0402_5%

@

@

1 2

R175 0_0402_ 5%

R175 0_0402_ 5%
L9

L9

1

1

4

4

WCM2012F2S- 900T04_0805

WCM2012F2S- 900T04_0805

@

@

1 2

R180 0_0402_ 5%

R180 0_0402_ 5%

@

@

1 2

R182 0_0402_ 5%

R182 0_0402_ 5%
L10

L10

1

1

4

4

WCM2012F2S- 900T04_0805

WCM2012F2S- 900T04_0805

@

@

1 2

R183 0_0402_ 5%

R183 0_0402_ 5%

@

@

1 2

R187 0_0402_ 5%

R187 0_0402_ 5%
L11

L11

1

1

4

4

WCM2012F2S- 900T04_0805

WCM2012F2S- 900T04_0805

@

@

1 2

R188 0_0402_ 5%

R188 0_0402_ 5%

2

2

HDMI@

HDMI@

3

3

2

2

HDMI@

HDMI@

3

3

2

2

HDMI@

HDMI@

3

3

2

2

HDMI@

HDMI@

3

3

R438 0_0402_5%

R438 0_0402_5%

HDMI_R_CK-

HDMI_R_CK+VGA_DVI_TXC+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-VGA_DVI_TXD2-

HDMI_R_D2+

Address: 0011010X

EC_SMB_CK133,38 CEC_INT# 33

+3VL

CEC@

CEC@

12

R169 4.7K_0402 _5%

R169 4.7K_0402 _5%

CEC@

CEC@

12

R171 47K_0402 _5%

R171 47K_0402 _5%

CEC@

CEC@

12

R174 47K_0402 _5%

R174 47K_0402 _5%

CEC@

CEC@

12

R176 4.7K_0402 _5%

R176 4.7K_0402 _5%

C262

C262

1

CEC@

CEC@

HDMI_CECIN HDMI_HPD_R

2

HDMI_CECOUT

VGA_DVI_TXC-

VGA_DVI_TXD0-

VGA_DVI_TXD0+

VGA_DVI_TXD1-

VGA_DVI_TXD1+

VGA_DVI_TXD2+

4

3

CEC_INT#

P1_4/TXD0

P4_2/VREF

CEC@

CEC@

+3VS

R453

R453

IHDMI@

IHDMI@

3 1

BSH111_SOT23-3

BSH111_SOT23-3

Issued Date

Issued Date

Issued Date

11

CEC_TEST

12

CEC_FSHUPDCEC_RST#

13

14

+3VL

15

16

17

18

19

20

+3VS_DGPU

R452

R452

0_0402_5%

0_0402_5%

DHDMI@

DHDMI@

1 2

3 1

2

BSH111_SOT23-3

BSH111_SOT23-3

SGD

SGD

Q19

Q19

HDMI@

HDMI@

HDMI_R_CK+

HDMI_R_CK-

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D0+

HDMI_R_D0-

HDMI_R_D2-

HDMI_R_D2+

R196

R196
680_0402_5%

680_0402_5%

IHDMI@

IHDMI@

R212

R212
680_0402_5%

680_0402_5%

IHDMI@

IHDMI@

R214

R214
680_0402_5%

680_0402_5%

IHDMI@

IHDMI@

R208

R208
680_0402_5%

680_0402_5%

IHDMI@

IHDMI@

07/10/2010
Intel DG P.132

P1_6/CLK0/SSI01

P1_5/RXD0/CNTR01/INT11#

P1_3/KI3#/AN11/TZOUT

P1_2/KI2#/AN10/CMP0_2

P1_1/KI1#/AN9/CMP0_1

P1_0/KI0#/AN8/CMP0_0

P3_3/TCIN/INT3#/SSI00/CMP1_0

P3_4/SCS#/SDA/CMP1_1

0_0402_5%

0_0402_5%

IHDMI@

IHDMI@

12

R435 0_0402_ 5%

R435 0_0402_ 5%

DHDMI@

DHDMI@

12

R391 0_0402_ 5%

R391 0_0402_ 5%

DHDMI@

DHDMI@

12

R401 0_0402_ 5%

R401 0_0402_ 5%

IHDMI@

IHDMI@

12

Security Classif ication

Security Classif ication

Security Classif ication

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY P ROPERTY OF COMP AL ELECTRONICS , INC. AND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY P ROPERTY OF COMP AL ELECTRONICS , INC. AND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY P ROPERTY OF COMP AL ELECTRONICS , INC. AND CONTAI NS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

+HDMI_5V_OUT

12

12

HDMI_SDATA

R199

R199
680_0402_5%

680_0402_5%

IHDMI@

IHDMI@

R215

R215
680_0402_5%

680_0402_5%

IHDMI@

IHDMI@

R207

R207
680_0402_5%

680_0402_5%

IHDMI@

IHDMI@

R210

R210
680_0402_5%

680_0402_5%

IHDMI@

IHDMI@

+3VL

R185

R185

2.2K_0402_5%

2.2K_0402_5%

HDMI@

HDMI@

HDMI_SCLK

13

D

D

Q24

Q24

2

2N7002_SOT23-3

2N7002_SOT23-3

G

G

HDMI@

HDMI@

S

S

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

CEC@

CEC@

1 2

R168 4.7K_0402 _5%

R168 4.7K_0402 _5%

CEC@

CEC@

1 2

R170 4.7K_0402 _5%

R170 4.7K_0402 _5%

CEC_FSHUPD (Pin13)
Low= Force to update flash.

CEC@

CEC@

1 2

C848 1U_0402 _6.3V6K

C848 1U_0402 _6.3V6K

1 2

C263 0.1U_040 2_16V4Z

C263 0.1U_040 2_16V4Z

CEC@

CEC@

HDMI_CLK

HDMI_DATA

EC_SMB_DA1 33, 38

1 2

R184

R184

2.2K_0402_5%

2.2K_0402_5%

HDMI@

HDMI@

2

SGD

SGD

Q18

Q18

HDMI@

HDMI@

DHDMI@

DHDMI@

1 2

R196 499_040 2_1%

R196 499_040 2_1%

DHDMI@

DHDMI@

1 2

R212 499_040 2_1%

R212 499_040 2_1%

DHDMI@

DHDMI@

1 2

R199 499_040 2_1%

R199 499_040 2_1%

DHDMI@

DHDMI@

1 2

R214 499_040 2_1%

R214 499_040 2_1%

DHDMI@

DHDMI@

1 2

R207 499_040 2_1%

R207 499_040 2_1%

DHDMI@

DHDMI@

1 2

R210 499_040 2_1%

R210 499_040 2_1%

DHDMI@

DHDMI@

1 2

R208 499_040 2_1%

R208 499_040 2_1%

DHDMI@

DHDMI@

1 2

R215 499_040 2_1%

R215 499_040 2_1%

+5VS

200910/9 2010 /01/23

200910/9 2010 /01/23

200910/9 2010 /01/23

+3VL

12

R166

R166

4.7K_0402_5%

4.7K_0402_5%

CEC@

CEC@

HDMI_CLK

HDMI_DATA

C264

C264

0.1U_0402_16V4Z

0.1U_0402_16V4Z

HDMI@

HDMI@

+3VL +3VS

R570

R570
100K_0402_5%

100K_0402_5%

HDMI_HPD_R

2 1

PMEG2010AEH_SOD123

PMEG2010AEH_SOD123

2 1

+5VL

PMEG2010AEH_SOD123

PMEG2010AEH_SOD123

12

R164

R164

4.7K_0402_5%

4.7K_0402_5%

CEC@

CEC@

+5VL

2

1

HDMI@

HDMI@

12

HDMI@

HDMI@

D53

D53

D54

D54

CEC@

CEC@

A2Y

+3VL

Q47

Q47

2

BSH111_SOT23-3

BSH111_SOT23-3

CEC@

CEC@

3 1

2

SGD

SGD

3 1

SGD

SGD

Q48

Q48

BSH111_SOT23-3

BSH111_SOT23-3

CEC@

CEC@

HDMI@

HDMI@

R145

R145

1 2

1K_0402_5%

1K_0402_5%

5

1

U9

U9

P

OE#

G

74AHCT1G125GW_SOT35 3-5

74AHCT1G125GW_SOT35 3-5

HDMI@

HDMI@

3

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

HDMI@

HDMI@

+HDMI_5V_OUT_F

+HDMI_5V_OUT

100K_0402_5%

100K_0402_5%

HDMI_HPD_R

4

HDMI@

HDMI@

R571

R571

2.2K_0402_5%

2.2K_0402_5%

D55

D55

21

F2

F2

2 1

1.1A_6V_MINISMDC110F- 2

1.1A_6V_MINISMDC110F- 2

HDMI@

HDMI@

HDMI_HPD_C

HDMI_SDATA
HDMI_SCLK

HDMI_CEC
HDMI_R_CK-

HDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

1

HDMI_SCLK

HDMI_SDATA

HDMI_HPD_CHDMI_HPD_U

2

C265

C265

R186

R186

0.1U_0402_16V4Z

0.1U_0402_16V4Z

HDMI@

1 2

12

1

C259

C259

HDMI@

HDMI@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

HDMI@

1

HDMI_HPD 13,20,22

+HDMI_5V_OUT+5VS

HDMI@

HDMI@

HDMI Connector

JHDMI

@JHDMI

@

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

SUYIN_100042MR019S153 ZL

SUYIN_100042MR019S153 ZL

HDMI Conn./CEC

HDMI Conn./CEC

HDMI Conn./CEC

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

1

GND
GND
GND
GND

20
21
22
23

16 48Wednesday, October 20, 2010

16 48Wednesday, October 20, 2010

16 48Wednesday, October 20, 2010

0.1

0.1

0.1

5

CMOS Setting, near DDR Door

R292

+RTCVCC

D D

R292
20K_0402_5%

20K_0402_5%

iME Setting.

R293

R293
20K_0402_5%

20K_0402_5%

Integrated SUS 1.05V VRM Enable

PCH_INTVRMEN

+RTCVCC

R117

R117

1 2

R118

R118

1 2

+3VS

+3VALW

HDA_SDO

ME debug mode,
this signal has a weak internal pull down
Low = Disable (d efault)

*

High = Enable ( flash descripto r security over ide)

C C

HDA_SYNC

This signal has a weak internal pull down

*

H

=>On Die PLL is supplied by 1.5 V
L=>On Die PLL is supplied by 1. 8V
Need to pull hig h for Huron Riv er platform

B B

Change in DVT phase
2010/08/25

SPIDO

A A

SPICS#
SPICLK
SPIDI

@

@

1 2

R276 1K_0402_5%

R276 1K_0402_5%

1 2

R560 10K_0402_5%R560 10K_0402_5%

AZ_SYNC_HD31

+3VS

EC_ON33,35

KSI733,34
KSI333,34
KSI533,34
KSI633,34,35

+3V_SPI

PCH_RTCRST#

1 2

PCH_SRTCRST#

1 2

High - Enable In ternal VRs

must be always p ulled high)

(

1M_0402_5%

1M_0402_5%

330K_0402_5%

330K_0402_5%

PCH_SPIDI
PCH_SPICLK
PCH_SPICS#
PCH_SPIDO

SM_INTRUDER#

PCH_INTVRMEN

+3VALW

1 2

R156 33_0402_5%R156 33_0402_5%

1 2

R125 1M_0402_5%R125 1M_0402_5%

R572 0_0402_5%@R572 0_0402_5%@

1 2

R573 0_0402_5%@R573 0_0402_5%@

1 2

R574 0_0402_5%@R574 0_0402_5%@

1 2

R575 0_0402_5%@R575 0_0402_5%@

1 2

R569 0_0603_5%@R569 0_0603_5%@

+3VS +3V_SPI

For MP phase

PCH_SPIDO
PCH_SPICS#
PCH_SPICLK
PCH_SPIDI

1

C455

C455

SPI@

SPI@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

EC_ON

1

C456

C456

SPI@

SPI@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

JCOMS @JCOMS @

1 2

C247

C247

1 2

1U_0402_6.3V6K

1U_0402_6.3V6K

JME @JME @

1 2

C248

C248

1 2

1U_0402_6.3V6K

1U_0402_6.3V6K

PCH_SPKR

PCH_SPKR

CR_CPPE# CR_CPPE#

AZ_SYNC_R

1

4
10
13

2

5

9
12

14

1

4
10
13

2

5

9
12

14

High = Enabled "No Reboot Mode"
Low = Disabled (Default)

*

12

R284 1K_0402_5%R284 1K_0402_5%

+5VS

G

G

2

Q21

Q21

13

D

S

D

S

BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

@

@

1 2

R285 0_0402_5%

R285 0_0402_5%

12

U51

U51

1OE#
2OE#
3OE#
4OE#

1A
2A
3A
4A

VCC

SN74CBTLV3125PWR_TSSOP14

SN74CBTLV3125PWR_TSSOP14

SPI@

SPI@

U53

U53

1OE#
2OE#
3OE#
4OE#

1A
2A
3A
4A

VCC

SN74CBTLV3125PWR_TSSOP14

SN74CBTLV3125PWR_TSSOP14

SPI@

SPI@

GND

GND

3

1B

6

2B

8

3B

11

4B

7

3

1B

6

2B

8

3B

11

4B

7

2010/08/22
Change PWRME_CTRL#
to HDA_SDO by PCH EDS

AZ_SYNC

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DI
CLK
CS#
DO

DO
CS#
CLK
DI

DO
CS#
CLK
DI

Socket: SP07000F500/SP07000H900

Please close to U2 PCH

Please close to U2 PCH,and between U2 & U13

5

4

2

3

32.768KHZ_12.5PF_Q13MC14610002

32.768KHZ_12.5PF_Q13MC14610002

AZ_BITCLK_HD31

PCH_SPKR31

AZ_RST_HD#31

AZ_SDIN0_HD31

+3VALW

AZ_SDOUT_HD31

PWRME_CTRL#33

CR_CPPE#29

+3V_SPI

1

C494

C494

2

CS#

CLK

100K_0402_5%

100K_0402_5%

SPI@

SPI@

1 2

+5VALW

Change in DVT phase
2010/08/25

100K_0402_5%

100K_0402_5%

SUSP#13,27,33,36,41,43

4

R227

R227

100K_0402_5%

100K_0402_5%

12

C216 15P_0402_50V8JC216 15P_0402_50V8J
Y3

Y3

1

OSC

NC

4

OSC

NC

12

C205 15P_0402_50V8JC205 15P_0402_50V8J

R286 33_0402_5%R286 33_0402_5%

1 2

R142 33_0402_5%R142 33_0402_5%

1 2

@

@

R273 1K_0402_5%

R273 1K_0402_5%

R289 33_0402_5%R289 33_0402_5%

1 2

R580 0_0402_5%R580 0_0402_5%

1 2

4M Byte

U13

U13

8

VCC

VSS

3

W

7

HOLD

1

S

6

C

5

Q

D

MX25L3205DM2I-12G SO8

MX25L3205DM2I-12G SO8

45@

45@

12

EC_ON

R217

R217

SPI@

SPI@

12

R443

R443

SPI@

SPI@

12

R291

R291

10M_0402_5%

10M_0402_5%

12

T37 PADT37 PAD

T38 PADT38 PAD

T39 PADT39 PAD

4

DODI

2

+5VALW

8

0.1U_0402_16V4Z

0.1U_0402_16V4Z

3

P

+

O

2

-

G

SPI@

SPI@

LM393DG_SO8

LM393DG_SO8

4

U56A

U56A

+5VALW

8

U56B

U56B

5

P

+

O

6

-

G

SPI@

SPI@

LM393DG_SO8

LM393DG_SO8

4

1 2

R442 100K_0402_5%

R442 100K_0402_5%

SPI@

SPI@

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

AZ_BITCLKAZ_BITCLK

AZ_SYNC

PCH_SPKR

AZ_RST#AZ_RST#

AZ_SDIN0_HD

AZ_SDOUT

AZ_SDOUT

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_SPICLK

PCH_SPICS#

PCH_SPIDI

PCH_SPIDO

10_0402_5%

10_0402_5%

10P_0402_50V8J

10P_0402_50V8J

C249

C249

12

SPI@

SPI@

1

7

+5VALW

3

U2A

U2A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

for EMI

R397

R397

SPI_MISO

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

CLK

12

@

@

1

C86

C86

@

@

2

+5VALW

R418

R418

SPI@

SPI@

10K_0402_5%

10K_0402_5%

1 2

1

C483

C483

SPI@

SPI@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+5VALW

R432

R432

SPI@

SPI@

10K_0402_5%

10K_0402_5%

1 2

1

C482

C482

SPI@

SPI@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

Change in DVT phase
2010/08/25

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

JTAG

JTAG

3

2

RB715FGT106_UMD3SP I@

RB715FGT106_UMD3SP I@

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

LPC

LPC

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

RTCIHDA

D43

D43

RTCIHDA

SPI

SPI

SERIRQ

SATA0RXN
SATA0RXP

SATA0TXN
SATA0TXP

SATA1RXN

SATA 6G

SATA 6G

SATA1RXP

SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP

SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP

SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP

SATA4TXN

SATA

SATA

SATA4TXP

SATA5RXN
SATA5RXP

SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

Q65R3@

Q65R3@

1

12

R226

R226

SPI@

SPI@

100K_0402_5%

100K_0402_5%

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

LPC_AD0

C38

LPC_AD1

A38

LPC_AD2

B37

LPC_AD3

C37

LPC_FRAME#

D36

E36
K36

SERIRQ

V5

SATA_PRX_C_DTX_N0

AM3

SATA_PRX_C_DTX_P0

AM1

SATA_PTX_DRX_N0

AP7

SATA_PTX_DRX_P0

AP5

SATA_PRX_C_DTX_N1

AM10

SATA_PRX_C_DTX_P1

AM8

SATA_PTX_DRX_N1

AP11

SATA_PTX_DRX_P1

AP10

SATA_PRX_C_DTX_N2

AD7

SATA_PRX_C_DTX_P2

AD5
AH5

SATA_PTX_DRX_P2

AH4

AB8
AB10
AF3
AF1

Y7
Y5
AD3
AD1

Y3
Y1
AB3
AB1

Y11

SATAICOMP

Y10

AB12

SATA3_COMP

AB13

RBIAS_SATA3

AH1

SATA_LED#

P3

CR_WAKE#

V14

PCH_GPIO19

P1

+3VALW

13

D

D

Q37

Q37

2

G

G

SPI@

SPI@

AO3416_SOT23-3

AO3416_SOT23-3

S

S

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

R279 37.4_0402_1%R279 37.4_0402_1%

R280 49.9_0402_1%R280 49.9_0402_1%

R281 750_0402_1%R281 750_0402_1%

+3V_SPI

2

LPC_AD0 33,34
LPC_AD1 33,34
LPC_AD2 33,34
LPC_AD3 33,34

LPC_FRAME# 33,34

SERIRQ 33,34

SATA_PRX_C_DTX_N0 26
SATA_PRX_C_DTX_P0 26
SATA_PTX_DRX_N0 26
SATA_PTX_DRX_P0 26

SATA_PRX_C_DTX_N1 26
SATA_PRX_C_DTX_P1 26
SATA_PTX_DRX_N1 26
SATA_PTX_DRX_P1 26

SATA_PRX_C_DTX_N2 26
SATA_PRX_C_DTX_P2 26
SATA_PTX_DRX_N2 26
SATA_PTX_DRX_P2 26

1 2

1 2

1 2

SATA_LED# 35

CR_WAKE# 29

PCH_GPIO19 21

BOOT BIOS Strap Bit 0

+1.05VS_VCC_SATA

+1.05VS_SATA3

12

R363

R363
200_0402_5%

200_0402_5%

12

R306

R306
100_0402_1%

100_0402_1%

R355 51_0402_1%R355 51_0402_1%

1

SERIRQ

12

R136 10K_0402_5%R136 10K_0402_5%

HDD1

HDD2

ODD

PCH_JTAG_TMS PCH_JTAG_TDO PCH_JTAG_TDI

1 2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

SATA_LED#

CR_WAKE#

PCH_GPIO19SATA_PTX_DRX_N2

+RTCVCC

C486

C486

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VALW +3VALW+3VALW

PCH_JTAG_TCK

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PCH_HDA/JTAG/SATA/SPI/LPC

PCH_HDA/JTAG/SATA/SPI/LPC

PCH_HDA/JTAG/SATA/SPI/LPC

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

1

2

12

R330

R330
200_0402_5%

200_0402_5%

12

R295

R295
100_0402_1%

100_0402_1%

R336 10K_0402_5%R336 10K_0402_5%

R334 10K_0402_5%R334 10K_0402_5%

R335 10K_0402_5%R335 10K_0402_5%

3

1

1 2

1

2

12

12

+RTCBATT

D13

D13
BAS40-04_SOT23-3

BAS40-04_SOT23-3

+3VL

R278

R278
200_0402_5%

200_0402_5%

1 2

R301

R301
100_0402_1%

100_0402_1%

1 2

17 48Wednesday, October 20, 2010

17 48Wednesday, October 20, 2010

17 48Wednesday, October 20, 2010

+3VS

+3VS

0.1

0.1

0.1

5

PCIE_PRX_C_LANTX_N128

LAN

WLAN

D D

JET

Card Reader

USB30

+3VS

C C

B B

+3VALW

A A

PCIE_PRX_C_LANTX_P128
PCIE_PTX_C_LANRX_N128
PCIE_PTX_C_LANRX_P128

PCIE_PRX_WLANTX_ N227
PCIE_PRX_WLANTX_ P227
PCIE_PTX_C_WLANR X_N227
PCIE_PTX_C_WLANR X_P227

PCIE_PRX_JETTX_N327
PCIE_PRX_JETTX_P327
PCIE_PTX_C_JETRX_N327
PCIE_PTX_C_JETRX_P327

PCIE_PRX_C_CRTX_N429
PCIE_PRX_C_CRTX_P429
PCIE_PTX_C_CRRX_N429
PCIE_PTX_C_CRRX_P429

PCIE_PRX_C_USBTX_N630
PCIE_PRX_C_USBTX_P630
PCIE_PTX_C_USBRX_N630
PCIE_PTX_C_USBRX_P630

R287 10K_0402_5%R287 10K_0402_5%

1 2

R338 10K_0402_5%R338 10K_0402_5%

1 2

R343 10K_0402_5 %R343 10K_0402_5%

1 2

R344 10K_0402_5 %R344 10K_0402_5%

1 2

R345 10K_0402_5 %R345 10K_0402_5%

1 2

R346 10K_0402_5 %R346 10K_0402_5%

1 2

R348 10K_0402_5 %R348 10K_0402_5%

1 2

R351 10K_0402_5 %R351 10K_0402_5%

1 2

CLK_RES_ITP#10
CLK_RES_ITP10

R564 10K_0402_5%R564 10K_0402_5%

1 2

CLKREQ_JET#

CLKREQ_WLAN#

CLKREQ_LAN#

PCH_GPIO26

CLKREQ_USB30#

C498 0.1U_0402_16V7KC498 0.1U_0402_16V7K
C497 0.1U_0402_16V7KC497 0.1U_0402_16V7K

C501 0.1U_0402_16V7KC501 0.1U_0402_16V7K
C502 0.1U_0402_16V7KC502 0.1U_0402_16V7K

C505 0.1U_0402_16V7KC505 0.1U_0402_16V7K
C503 0.1U_0402_16V7KC503 0.1U_0402_16V7K

C504 0.1U_0402_16V7KC504 0.1U_0402_16V7K
C868 0.1U_0402_16V7KC868 0.1U_0402_16V7K

C519 0.1U_0402_16V7KC519 0.1U_0402_16V7K
C869 0.1U_0402_16V7KC869 0.1U_0402_16V7K

LAN

WLAN

JET

Card Reader

USB30

CLKREQ_CR#

PCH_GPIO46

PCH_GPIO56

R233 0_0 402_5%@R 233 0_0402_5%@
R282 0_0 402_5%@R 282 0_0402_5%@

LVDS_SEL

1 2
1 2

1 2
1 2

1 2
1 2

CLKREQ_WLAN#2 7

CLKREQ_JET#27

CLK_USB30#30
CLK_USB3030

CLKREQ_USB30#30

CLKREQ_LAN#28

12
12

12
12

CLK_LAN#28
CLK_LAN28

CLK_WLAN#27
CLK_WLAN27

CLK_JET#27
CLK_JET27

CLK_CR#29
CLK_CR29

12
12

LVDS_SEL

LVDS_SEL

Channel

5

PCIE_PRX_C_LANTX_N1
PCIE_PRX_C_LANTX_P1
PCIE_PTX_LANRX_N1
PCIE_PTX_LANRX_P1

PCIE_PRX_WLANTX_ N2
PCIE_PRX_WLANTX_ P2
PCIE_PTX_WLANRX_ N2
PCIE_PTX_WLANRX_ P2

PCIE_PRX_JETTX_N3
PCIE_PRX_JETTX_P3
PCIE_PTX_JETRX_N3
PCIE_PTX_JETRX_P3

PCIE_PRX_C_CRTX_N4
PCIE_PRX_C_CRTX_P4
PCIE_PTX_CRRX_N4
PCIE_PTX_CRRX_P4

PCIE_PRX_C_USBTX_N6
PCIE_PRX_C_USBTX_P6
PCIE_PTX_USBRX_N6
PCIE_PTX_USBRX_P6

CLK_LAN#
CLK_LAN

CLKREQ_LAN#

CLK_WLAN#
CLK_WLAN

CLKREQ_WLAN#

CLK_JET#
CLK_JET

CLKREQ_JET#

CLK_CR#
CLK_CR

CLKREQ_CR#

PCH_GPIO26

CLK_USB30#
CLK_USB30

CLKREQ_USB30#

PCH_GPIO56

LVDS_SEL

PCH_GPIO46

CLK_BCLK_ITP#
CLK_BCLK_ITP

H L

Single
(Default)

4

U2B

U2B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GP IO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GP IO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GP IO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GP IO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GP IO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GP IO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GP IO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GP IO46

AK14

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

AK13

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

Dual

4

SMBUSController

SMBUSController

SML1ALERT# / PC HHOT# / GPIO74

PCI-E*

PCI-E*

CLOCKS

CLOCKS

CLKOUT_DP_N / C LKOUT_BCLK1_N

CLKOUT_DP_P / C LKOUT_BCLK1_P

CLKIN_GND1_N
CLKIN_GND1_P

SMBALERT# / GP IO11

SMBCLK

SMBDATA

SML0ALERT# / GPIO 60

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO7 5

CL_CLK1

Link

Link

CLKIN_SATA_N / CKS SCD_N
CLKIN_SATA_P / CKS SCD_P

FLEX CLOCKS

FLEX CLOCKS

CL_DATA1

CL_RST1#

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_DMI2_N
CLKIN_DMI2_P

CLKIN_DOT_96N
CLKIN_DOT_96P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / G PIO64

CLKOUTFLEX1 / G PIO65

CLKOUTFLEX2 / G PIO66

CLKOUTFLEX3 / G PIO67

Q65R3@

Q65R3@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

EC_LID_OUT#

E12

PCH_SMBCLK

H14

PCH_SMBDATA

C9

DRAMRST_CNTRL_PC H

A12

PCH_SMLCLK0

C8

PCH_SMLDATA0

G12

PCH_GPIO74

C13

PCH_SMLCLK1

E14

PCH_SMLDATA1

M16

M7

Control Link only for support Intel IAM T.

T11

P10

CLK_REQ_VGA#

M10

CLK_PCIE_VGA#

AB37

CLK_PCIE_VGA

AB38

CLK_CPU_DMI#

AV22

CLK_CPU_DMI

AU22

CLK_DPLL#

AM12

CLK_DPLL

AM13

PCH_CLK_DMI#

BF18

PCH_CLK_DMI

BE18

CLKIN_GND1#

BJ30

CLKIN_GND1

BG30

CLK_DOT#

G24

CLK_DOT

E24

CLK_SATA#

AK7

CLK_SATA

AK5

CLK_14M_PCH

K45

CLK_PCILOOP

H45

PCH_X1

V47

PCH_X2

V49

XCLK_RCOMP

Y47

CLK_FLEX0

K43

PCH_48MCLK

F47

CLK_FLEX2

H47

CLK_FLEX3

K49

3

T13 PADT13 PAD
T14 PADT14 PAD

1 2

R354 90.9_0402_1%R 354 90.9_0402_1%

T29 PADT29 PAD

T44 PADT44 PAD

T31 PADT31 PAD

T33 PADT33 PAD

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

EC_LID_OUT# 33

DRAMRST_CNTRL_PC H 7

CLK_REQ_VGA# 13

CLK_PCIE_VGA# 13
CLK_PCIE_VGA 13

CLK_CPU_DMI# 5
CLK_CPU_DMI 5

From Clock Gen.

CLK_PCILOOP 21

+1.05VS_VCCDIFFCLKN

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

VGA

120 MHz for eDP

2

1

R232 2.2K_0402_5%R232 2.2K_0402_5%

+3VALW +3VS

12

R260 2.2K_0402_5%R260 2.2K_0402_5%

12

PCH_SMBDATA

PCH_SMBCLK

R364 2.2K_0402_5%R364 2.2K_0402_5%

12

R385 2.2K_0402_5%R385 2.2K_0402_5%

12

PCH_SMLDATA1

PCH_SMLCLK1

EC_LID_OUT#

DRAMRST_CNTRL_PC H

PCH_GPIO74

PCH_SMLCLK0

PCH_SMLDATA0

PCH_CLK_DMI#
PCH_CLK_DMI

CLKIN_GND1#
CLKIN_GND1

CLK_DOT#
CLK_DOT

CLK_SATA#
CLK_SATA

CLK_14M_PCH

5

Q3B

Q3B

3

2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

Q3A

Q3A

6 1

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

Q4B

Q4B

3

2

Q4A

Q4A

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

6 1

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

@

@

CLK_REQ_VGA#

12

R303 10K_ 0402_5%

R303 10K_ 0402_5%

R242 10K_0402_5%R242 10K_0402_5%
R243 10K_0402_5%R243 10K_0402_5%

R244 10K_0402_5%R244 10K_0402_5%
R245 10K_0402_5%R245 10K_0402_5%

R246 10K_0402_5%R246 10K_0402_5%
R247 10K_0402_5%R247 10K_0402_5%

R248 10K_0402_5%R248 10K_0402_5%
R249 10K_0402_5%R249 10K_0402_5%

R250 10K_0402_5%R250 10K_0402_5%

R400 4.7K_0402_5%R400 4.7K_0402_5%

R386 4.7K_0402_5%R386 4.7K_0402_5%

4

5

4

R123 10K_0402_5%R123 10K_0402_5%

1 2

R228 1K_0402_5%R228 1K_0402_5%

1 2

R234 10K_0402_5%R234 10K_0402_5%

1 2

R238 10K_0402_5%R238 10K_0402_5%

1 2

R239 10K_0402_5%R239 10K_0402_5%

1 2

R275 10K_ 0402_5%R275 10K_0402_5%

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2

PM_SMBDATA 11,12,27

PM_SMBCLK 11,12,27

+3VS+3VALW

EC_SMB_DA2 13 ,33,34,35

EC_SMB_CK2 13,33,34,35

12

+3VALW

+3VALW

For EMI

@

CLK_PCILOOP

27P_0402_50V8J

27P_0402_50V8J

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

@

@

12

R417 10_0402_5%

R417 10_0402_5%

R365 1M_0402_5%R365 1M_0402_5%

PCH_X1 PCH_X2

1 2

25MHZ_20PF_7A25000012

25MHZ_20PF_7A25000012

1

C506

C506

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PCH_PCI-E/SMBUS/CLK

PCH_PCI-E/SMBUS/CLK

PCH_PCI-E/SMBUS/CLK

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

@

C474 22P_0402_50V8J

C474 22P_0402_50V8J

12

Y2

Y2

1

12

1

C507

C507

27P_0402_50V8J

27P_0402_50V8J

2

18 48Wednesday, October 20, 2010

18 48Wednesday, October 20, 2010

18 48Wednesday, October 20, 2010

0.1

0.1

0.1

5

+3VALW

D D

R316 200_0402_5%R316 200_0402_5%

R218 10K_0402_5%R218 10K_0402_5%

R220 10K_0402_5%R220 10K_0402_5%

R221 10K_0402_5%R221 10K_0402_5%

R127 10K_0402_5%R127 10K_0402_5%

R128 10K_0402_5%R128 10K_0402_5%

R129 10K_0402_5%R129 10K_0402_5%

Reserve 0 ohm for cost down plan
2010/08/25

C C

VGATE33,44

PM_PWROK5,33

B B

12

12

12

12

12

12

12

PM_PWROK

PCH_RSMRST#

PM_PWROK

SYS_PWROK

0_0402_5%

0_0402_5%

@R259

@

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 2

C250

C250

DRAMPWROK

PCH_SUSPWRDN_R

RI#

PCH_LOW_BAT#

R259

+3VS

5

U12

U12

1

P

IN1

4

O

2

IN2

G

SN74AHC1G08DCKR_SC70-5

SN74AHC1G08DCKR_SC70-5

3

+3VALW

XDP_DBRESET#5

DRAMPWROK5

PCH_RSMRST#33

PCH_SUSPWRDN33

PBTN_OUT#33

ACIN13,33,35,39

+1.05VS_PCH

1 2

R469 330K_0402_5%R469 330K_0402_5%

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

4

DMI_CTX_PRX_N06
DMI_CTX_PRX_N16
DMI_CTX_PRX_N26
DMI_CTX_PRX_N36

DMI_CTX_PRX_P06
DMI_CTX_PRX_P16
DMI_CTX_PRX_P26
DMI_CTX_PRX_P36

DMI_PTX_CRX_N06
DMI_PTX_CRX_N16
DMI_PTX_CRX_N26
DMI_PTX_CRX_N36

DMI_PTX_CRX_P06
DMI_PTX_CRX_P16
DMI_PTX_CRX_P26
DMI_PTX_CRX_P36

1 2

R130 49.9_0402_1%R130 49.9_0402_1%

1 2

R160 750_0402_1%R160 750_0402_1%

PM_PWROK

D12

D12

21

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_PTX_CRX_N0
DMI_PTX_CRX_N1
DMI_PTX_CRX_N2
DMI_PTX_CRX_N3

DMI_PTX_CRX_P0
DMI_PTX_CRX_P1
DMI_PTX_CRX_P2
DMI_PTX_CRX_P3

DMI_COMP

RBIAS_CPY

T34PAD T34PAD

1 2

R216 0_0402_5%R216 0_0402_5%

1 2

R320 0_0402_5%R320 0_0402_5%

SUSACK#

XDP_DBRESET#

SYS_PWROK

PM_PWROK_R

DRAMPWROK

PCH_RSMRST#

PCH_SUSPWRDN_R

PBTN_OUT#

PCH_ACIN

PCH_LOW_BAT#

RI#

U2C

U2C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN# / SUS_PWR_DN_ACK / GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

3

FDI_CTX_PRX_N0

BJ14

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5

DMI

DMI

System Power Management

System Power Management

FDI_RXP6

FDI

FDI

FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

Q65R3@

Q65R3@

FDI_CTX_PRX_N1

AY14

FDI_CTX_PRX_N2

BE14

FDI_CTX_PRX_N3

BH13

FDI_CTX_PRX_N4

BC12

FDI_CTX_PRX_N5

BJ12

FDI_CTX_PRX_N6

BG10

FDI_CTX_PRX_N7

BG9

FDI_CTX_PRX_P0

BG14

FDI_CTX_PRX_P1

BB14

FDI_CTX_PRX_P2

BF14

FDI_CTX_PRX_P3

BG13

FDI_CTX_PRX_P4

BE12

FDI_CTX_PRX_P5

BG12

FDI_CTX_PRX_P6

BJ10

FDI_CTX_PRX_P7

BH9

FDI_INT

AW16

FDI_FSYNC0

AV12

FDI_FSYNC1

BC10

FDI_LSYNC0

AV14

FDI_LSYNC1

BB10

DSWVREN

A18

PCH_DPWROK DSWVREN

E22

EC_SWI#

B9

PCH_GPIO32

N3

SUS_STAT#

G8

CLK_EC

N14

PM_SLP_S5#

D10

PM_SLP_S4#

H4

PM_SLP_S3#

F4

PM_SLP_A#

G10

PM_SLP_SUS#

G16

H_PM_SYNC

AP14

PCH_GPIO29 PCH_GPIO29

K14

T17 PADT17 PAD

T35 PADT35 PAD

T58 PADT58 PAD

2

FDI_CTX_PRX_N0 6
FDI_CTX_PRX_N1 6
FDI_CTX_PRX_N2 6
FDI_CTX_PRX_N3 6
FDI_CTX_PRX_N4 6
FDI_CTX_PRX_N5 6
FDI_CTX_PRX_N6 6
FDI_CTX_PRX_N7 6

FDI_CTX_PRX_P0 6
FDI_CTX_PRX_P1 6
FDI_CTX_PRX_P2 6
FDI_CTX_PRX_P3 6
FDI_CTX_PRX_P4 6
FDI_CTX_PRX_P5 6
FDI_CTX_PRX_P6 6
FDI_CTX_PRX_P7 6

FDI_INT 6

FDI_FSYNC0 6

FDI_FSYNC1 6

FDI_LSYNC0 6

FDI_LSYNC1 6

EC_SWI# 28,30

32.768 KHz

CLK_EC 33

PM_SLP_S5# 33

PM_SLP_S4# 33

PM_SLP_S3# 33

H_PM_SYNC 5

1

1 2

R222 0_0402_5%R222 0_0402_5%

PCH_RSMRST#PCH_DPWROK

Stuff R222 if do not support DeepSX state

+RTCVCC

R224 330K_0402_5%R224 330K_0402_5%

R225 330K_0402_5%@R225 330K_0402_5%@

12

12

DSWVREN must be always pulled high to +RTCVCC

DSWVREN - Internal Deep Sleep 1.05V regulator
H

：：：：

Enable

*

L

：：：：

Disable

+3VS

PCH_GPIO32

EC_SWI#

R313 8.2K_0402_5%R313 8.2K_0402_5%

1 2

R319 10K_0402_5%R319 10K_0402_5%

1 2

R563 10K_0402_5%@R563 10K_0402_5%@

1 2

+3VALW

D16

D16

2 1

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

D14

POK38,40

A A

5

D14

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

21

PCH_RSMRST#PM_PW ROK PCH_RSMRST#

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH_DMI/FDI/PM

PCH_DMI/FDI/PM

PCH_DMI/FDI/PM

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

19 48Wednesday, October 20, 2010

19 48Wednesday, October 20, 2010

19 48Wednesday, October 20, 2010

1

0.1

0.1

0.1

5

OPT@

OPT@

1 2

R230 100K_0402_5 %

R230 100K_0402_5 %

D D

+3VS

LCTL_CL K

12

R471 2.2K_0402_5%R4 71 2.2K_040 2_5%

LCTL_DA TA

12

R472 2.2K_0402_5%R4 72 2.2K_040 2_5%

LCD_EDID_ CLK

12

R223 2.2K_0402_5%R2 23 2.2K_040 2_5%

LCD_EDID_ DATA

12

R229 2.2K_0402_5%R2 29 2.2K_040 2_5%

12

12

UMA_CRT _CLK

UMA_CRT _DATA

UMA_CRT _B

UMA_CRT _G

UMA_CRT _R

OPT@

C C

B B

OPT@

R237 2.2K_0402_5%

R237 2.2K_0402_5%

OPT@

OPT@

R231 2.2K_0402_5%

R231 2.2K_0402_5%

OPT@

OPT@

1 2

R240 150_0402_1%

R240 150_0402_1%

OPT@

OPT@

1 2

R241 150_0402_1%

R241 150_0402_1%

OPT@

OPT@

1 2

R318 150_0402_1%

R318 150_0402_1%

UMA_ENB KL

UMA_ENB KL14
UMA_ENV DD14

LCD_EDID_ CLK14

LCD_EDID_ DATA14

R219 2.37K_0402_1%

R219 2.37K_0402_1%

LCD_TXC LK-14
LCD_TXC LK+14

LCD_TXO UT0-14
LCD_TXO UT1-14
LCD_TXO UT2-14

LCD_TXO UT0+14
LCD_TXO UT1+14
LCD_TXO UT2+14

LCD_TZC LK-14
LCD_TZC LK+14

LCD_TZO UT0-14
LCD_TZO UT1-14
LCD_TZO UT2-14

LCD_TZO UT0+14
LCD_TZO UT1+14
LCD_TZO UT2+14

UMA_CRT _B15
UMA_CRT _G15
UMA_CRT _R15

UMA_CRT _CLK15
UMA_CRT _DATA15

UMA_CRT _HSYNC15
UMA_CRT _VSYNC15

PCH_PW M14

OPT@

OPT@

1 2

4

UMA_ENB KL
UMA_ENV DD

PCH_PW M

LCD_EDID_ CLK
LCD_EDID_ DATA

LCTL_CL K
LCTL_DA TA

LVDS_IBG

T40 PA DT4 0 P AD

LCD_TXC LK­LCD_TXC LK+

LCD_TXO UT0­LCD_TXO UT1­LCD_TXO UT2-

LCD_TXO UT0+
LCD_TXO UT1+
LCD_TXO UT2+

LCD_TZC LK­LCD_TZC LK+

LCD_TZO UT0­LCD_TZO UT1­LCD_TZO UT2-

LCD_TZO UT0+
LCD_TZO UT1+
LCD_TZO UT2+

UMA_CRT _B
UMA_CRT _G
UMA_CRT _R

UMA_CRT _CLK
UMA_CRT _DATA

UMA_CRT _HSYNC
UMA_CRT _VSYNC

CRT_IREF

12

R311 1K_0402_0.5%R3 11 1K_0402 _0.5%

U2D

U2D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

COUGARP OINT_FCBGA989~D

COUGARP OINT_FCBGA989~D

3

DDPB_0N

DDPB_0P

DDPB_1N

DDPB_1P

DDPB_2N

DDPB_2P

DDPB_3N

DDPB_3P

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

Q65R3@

Q65R3@

AP43
AP45

AM42
AM40

AP39
AP40

P38
M39

AT49
AT47
AT40

AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49

P46
P42

AP47
AP49
AT38

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

M43
M36

AT45
AT43
BH41

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN

SDVO_STALLP

SDVO_INTN
SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN

DDPB_AUXP

DDPB_HPD

LVDS

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN
DDPD_AUXP

CRT

CRT

DDPD_HPD

2

+3VS

12

12

R271

R271

R272

2.2K_040 2_5%

2.2K_040 2_5%

IHDMI@

IHDMI@

HDMI_HPD_ UMA HDMI_HPD_ UMA

UMA_HDM I_TX2­UMA_HDM I_TX2+
UMA_HDM I_TX1­UMA_HDM I_TX1+
UMA_HDM I_TX0­UMA_HDM I_TX0+
UMA_HDM I_TXC­UMA_HDM I_TXC+

R473 100K_04 02_5%R473 100K_04 02_5%

R524 100K_04 02_5%R524 100K_04 02_5%

R272

2.2K_040 2_5%

2.2K_040 2_5%

IHDMI@

IHDMI@

R1432

R1432

0_0402_ 5%

0_0402_ 5%

IHDMI@

IHDMI@

12

12

UMA_HDM I_CLK 16
UMA_HDM I_DATA 16

HDMI_HPD

12

UMA_HDM I_TX2- 16
UMA_HDM I_TX2+ 16
UMA_HDM I_TX1- 16
UMA_HDM I_TX1+ 16
UMA_HDM I_TX0- 16
UMA_HDM I_TX0+ 16
UMA_HDM I_TXC- 16
UMA_HDM I_TXC+ 16

HDMI_HPD 1 3,16,22

HDMI

1

12

100K_04 02_5%

100K_04 02_5%
R1433

R1433

A A

Security Class ification

Security Class ification

Security Class ification

200910/9 2010/01/ 23

200910/9 2010/01/ 23

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/ 23

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_CRT/LVDS/HDMI

PCH_CRT/LVDS/HDMI

PCH_CRT/LVDS/HDMI

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

1

0.1

0.1

0.1

20 48W ednesday, October 20, 2010

20 48W ednesday, October 20, 2010

20 48W ednesday, October 20, 2010

5

4

3

2

1

U2E

U2E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

CLK_EC_R
CLK_PCH
CLK_SIO

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

TP25

BC30

TP26

BE32

TP27

BJ32

TP28

BC28

TP29

BE30

TP30

BF32

TP31

BG32

TP32

AV26

TP33

BB26

TP34

AU28

TP35

AY30

TP36

AU26

TP37

AY26

TP38

AV28

TP39

AW30

TP40

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

COUGARPOINT_FCBG A989~D

COUGARPOINT_FCBG A989~D

RSVD

RSVD

PCI

PCI

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9

NV_DQ10 / NV_IO10

NVRAM

NVRAM

NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

DF_TVS

NV_RCOMP

NV_RE#_WRB0
NV_RE#_WRB1

NV_WE#_CK0
NV_WE#_CK1

EHCI 1

EHCI 2

USB

USB

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

D D

+3VS

RP1

RP1

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

RP2

RP2

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

RP3

RP3

C C

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

1 2

R321 8.2K_0402_5%R321 8.2K_0402_5%

1 2

R322 8.2K_0402_5%R322 8.2K_0402_5%

DIS@

DIS@

1 2

R578 10K_0402_5%

R578 10K_0402_5%

DIS@

DIS@

1 2

R544 10K_0402_5%

R544 10K_0402_5%

OPT@

OPT@

1 2

R399 1K _0402_5%

R399 1K _0402_5%

B B

PLT_RST#5,27,28,29,30,33,34

100K_0402_5%

100K_0402_5%

PCH_GPIO4

18

PCI_PIRQC#

27

PCI_PIRQA#

36

PCH_GPIO2

45

PCH_GPIO52

18

PCH_GPIO53

27

PCI_PIRQB#

36

RF_OFF#

45

18
27

ODD_DA#

36

WL_OFF#

45

PCH_GPIO5

PCI_PIRQD#

DGPU_RST#

DGPU_PW R_EN

DGPU_PW R_EN

For Optimus

PLT_RST#

CLK_PCI_EC33
CLK_PCILOOP18

R534

R534

CLK_PCI_DDR34

1 2

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

DGPU_RST#
PCH_GPIO52

1 2
1 2
1 2

DGPU_PW R_EN

RF_OFF#
PCH_GPIO53
WL_OFF#

PCH_GPIO2
ODD_DA#
PCH_GPIO4
PCH_GPIO5

PCI_PME#

R52522_0402_5% R52522_0402_ 5%
R52622_0402_5% R52622_0402_ 5%
R52722_0402_5% R52722_0402_ 5%

DGPU_PW R_EN13, 36

RF_OFF#27

WL_OFF#27

ODD_DA#26

T32 PADT32 PAD

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

NV_DQS0
NV_DQS1

NV_ALE

NV_CLE

NV_RB#

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

Q65R3@

Q65R3@

AY7
AV7
AU3
BG4

AT10
BC8

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

AV5
AY1

AV10

AT8

AY5
BA2

AT12
BF3

C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

C33

B33

A14
K20
B17
C16
L16
A16
D14
C14

NV_CLE

USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2

USB20_N4
USB20_P4
USB20_N5
USB20_P5

USB20_N0 26
USB20_P0 26
USB20_N1 26
USB20_P1 26
USB20_N2 26
USB20_P2 26

USB20_N4 32
USB20_P4 32
USB20_N5 32
USB20_P5 32

USB port6 and port7 are disabled on HM65

USB20_N8
USB20_P8
USB20_N9
USB20_P9

USB20_N11
USB20_P11

USBBIAS

USB_OC#0
USB_OC#1
USB_OC#2
SLP_CHG_M3
SLP_CHG_M4
USB_OC#5
USB_OC#6
USB_OC#7

USB20_N8 35
USB20_P8 35
USB20_N9 27
USB20_P9 27

USB20_N11 14
USB20_P11 14

1 2

R535 22.6_0402_1%R535 22.6_0402_1%

Within 500 mils

USB_OC#0 26,33
USB_OC#1 27,30, 33

SLP_CHG_M3 27
SLP_CHG_M4 27

VGA_PW ROK13,22

USB-RIGHT1

USB-RIGHT2

USB-Left1

BlueTooth

IR Emitter

Finger Printer

WiMax

t. Camera

In

USB-Right
USB-Left

Boot BIOS Strap

RF_OFF#

RF_OFF#

R5371K_0402_5% @ R5371K_0402_5% @

12

PCH_GPIO19

R5381K_0402_5% @ R5381K_0402_5% @

12

A A

PCH_GPIO19 17

PCH_GPIO19 Boot BIOS Loaction

0
0
1

0
1
0

1 1

LPC

Reserved

P

CI

SPI

*

PLT_RST#

@

@

12

R531 0_0402_5%

R531 0_0402_5%

DGPU_RST#

R532

R532

1K_0402_5%

1K_0402_5%

OPT@

OPT@

PLT_RST#

12

+3VS

R533

R533
0_0402_5%

0_0402_5%

OPT@

OPT@

5

U20

U20

1

P

IN1

2

IN2

G

SN74AHC1G08DCKR_S C70-5

SN74AHC1G08DCKR_S C70-5

3

OPT@

OPT@

1 2

DIS@

DIS@

R529 0_ 0402_5%

R529 0_ 0402_5%

12

For Optimus

NV_CLE

OPT@

OPT@

1 2

C508 0.1U_0402_16V 4Z

C508 0.1U_0402_16V 4Z

OPT@

OPT@

4

O

R528 0_ 0402_5%

R528 0_ 0402_5%

PLTRST_VGA#

12

R530

R530

100K_0402_5%

100K_0402_5%

OPT@

OPT@

12

DMI & FDI Termination Voltage

Set to VCC when HIGH

NV_CLE

Set to VSS when LOW

+1.8VS

12

R324

R324

2.2K_0402_5%

2.2K_0402_5%

R323 1K_0402_5%R323 1K_0402_5%

USB_OC#0
SLP_CHG_M3
SLP_CHG_M4
USB_OC#1

USB_OC#2
USB_OC#5
USB_OC#6
USB_OC#7

12

RP4

RP4

4 5
3 6
2 7
1 8

10K_0804_8P4R_5%

10K_0804_8P4R_5%

RP5

RP5

4 5
3 6
2 7
1 8

10K_0804_8P4R_5%

10K_0804_8P4R_5%

+3VALW

PLTRST_VGA# 13

H_SNB_IVB# 5

WL_OFF#

R5361K_0402_5% @ R5361K_0402_5% @

12

5

A16 Swap Override Strap

WL_OFF#

*

4

Low= A16 swap override Enable

igh= A16 swap override Disable

H

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH_PCI/USB/NAND

PCH_PCI/USB/NAND

PCH_PCI/USB/NAND

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

21 48W ednesday, October 20, 2010

21 48W ednesday, October 20, 2010

21 48W ednesday, October 20, 2010

1

0.1

0.1

0.1

5

+3VALW

USB30_S MI#

EC_SMI#

PCH_GPIO1 2

PCH_GPIO2 8

3D_DET#

VGA_PW ROK

BT_ON#

HDMI_HPD

PCH_GPIO1

BT_DET#

ODD_DET ECT#

PCH_GPIO6

PCH_GPIO1 6

EC_SCI#

CIR_EN#

ISDBT_DET

PCH_GPIO4 9

OPTIMUS_E N#

3D_DET#

USB30_S MI#

PCH_GPIO3 7

PCH_GPIO2 7

ISDBT_DET

OPTIMUS_E N#

CIR_EN#

PCH_GPIO2 8

For Optimus

For TV-Tuner use with Japan module

3D_DET#

3D_DET#

1 2

1 2

1 2

OPT@

OPT@

1 2

@

@

1 2

1 2

@

@

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

@

@

1 2

1 2

DIS@

DIS@

1 2

DIS@

DIS@

1 2

@

@

1 2

OPT@

OPT@

CIR@

CIR@

R325 1K_0402 _5%@R325 1 K_0402_5%@

1 2

12

12

12

12

12

12

R390 1K_0402_5%R 390 1K_04 02_5%

R558 10K_0402_5%R558 10K_0402 _5%

D D

C C

B B

R556 10K_0402_5%R556 10K_0402 _5%

R557 10K_0402_5%R557 10K_0402 _5%

R549 10K_0402_5%

R549 10K_0402_5%

+3VS

R579 10K_0402_5%

R579 10K_0402_5%

R567 100K_0402_5 %R567 100K_0402_5 %

R539 10K_0402_5%

R539 10K_0402_5%

R540 10K_0402_5%R540 10K_0402 _5%

R542 10K_0402_5%R542 10K_0402 _5%

R545 200K _0402_5%R5 45 200 K_0402_5%

R546 10K_0402_5%R546 10K_0402 _5%

R577 10K_0402_5%R577 10K_0402 _5%

R550 10K_0402_5%R550 10K_0402 _5%

R551 100K_0402_5 %R551 100K_0402_5 %

R552 10K_0402_5%

R552 10K_0402_5%

R553 10K_0402_5%R553 10K_0402 _5%

R555 10K_0402_5%

R555 10K_0402_5%

R554 10K_0402_5%

R554 10K_0402_5%

R437 10K_04 02_5%

R437 10K_04 02_5%

R547 100K_0402_5 %R547 100K_0402_5 %

R402 10K_04 02_5%R402 10K_ 0402_5%

R328 47K_04 02_5%R328 47K_ 0402_5%

R415 10K_04 02_5%

R415 10K_04 02_5%

R405 10K_04 02_5%

R405 10K_04 02_5%

GPIO28

On-Die PLL Voltage Regulator
H: Enable

*

L: Disable

4

HDMI_HPD13,16,20

EC_SCI#33

EC_SMI#33

USB30_S MI#30

VGA_PW ROK13,21

BT_DET#3 2

BT_ON#27,3 2

BT_RST#32

ODD_DET ECT#26

SKU OPT

1 2

100K_04 02_5%

100K_04 02_5%

HDMI_HPD

PCH_GPIO1

PCH_GPIO6

EC_SCI#

EC_SMI#

PCH_GPIO1 2

USB30_S MI#

PCH_GPIO1 6

VGA_PW ROK

BT_DET#

PCH_GPIO2 7

PCH_GPIO2 8

BT_ON#

BT_RST#

ODD_DET ECT#

PCH_GPIO3 7

OPTIMUS_E N#

CIR_EN#

ISDBT_DET

PCH_GPIO4 9

3D_DET#

H L

@

@

R100

R100

3D

U2F

U2F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

COUGARP OINT_FCBGA989~D

COUGARP OINT_FCBGA989~D

3

ODD_EN#

A20GATE

PECI

RCIN#

INIT3_3V#

NC_1

NC_2

NC_3

NC_4

NC_5

C40

B41

C41

A40

P4

AU16

P5

AY11

AY10

T14

AH8

AK11

AH10

AK10

P37

PCH_W L_BT_LED

LOGO_LE D

MAXIC_SEL ECT

GATEA20

KB_RST#

H_PW RGOOD

PCH_THR MTRIP#

GPIO

GPIO

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

PROCPWRGD

THRMTRIP#

CPU/MISC

CPU/MISC

2

ODD_EN# 36

GATEA20 33

KB_RST# 33

1 2

R416 390_0402_5%R41 6 3 90_0402_5%

This signal has weak internal
pull-up, can't be pulled low

H_PW RGOOD 5

H_THERM TRIP# 5

ODD_EN#

GATEA20

KB_RST#

LOGO_LE D

PCH_W L_BT_LED

Q209B

Q209B

MAXIC_SEL ECT

1

1 2

R106 10K_0402_5%R106 10K_0402 _5%

1 2

R548 10K_0402_5%R548 10K_0402 _5%

1 2

R559 10K_0402_5%R559 10K_0402 _5%

1 2

R436 10K_0402_5%R436 10K_0402 _5%

1 2

R110 10K_0402_5%R110 10K_0402 _5%

PCH_W L_BT_LED

5

WL_B T_LED# 35

3

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

4

1 2

R124 10K_0402_5%R124 10K_0402 _5%

+3VS

MAXIC_SELECT

Q65R3@

Q65R3@

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

MAXIC_SELECT

H L

IC TYPE MAX14550E

MAX14566B

NCTF

NCTF

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

GPIO8

Integrated Clock Chip Enable (Removed)
H:

Disable

L: Enable

*

R326 1K_0402 _5%@R326 1K_0402_5%@

1 2

A A

Integrated clock enable functionality
is achieved by soft-strap
The current default is clock enable

5

EC_SMI#

OPTIMUS_EN#

OPTIMUS_EN#

SKU Discrete

4

H L

Optimus

Security Class ification

Security Class ification

Security Class ification

200910/9 2010/01/ 23

200910/9 2010/01/ 23

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/ 23

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH_CPU/GPIO

PCH_CPU/GPIO

PCH_CPU/GPIO

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

22 48W ednesday, October 20, 2010

22 48W ednesday, October 20, 2010

22 48W ednesday, October 20, 2010

1

0.1

0.1

0.1

5

4

3

2

1

12

L1

OPT@L1

OPT@

C513

C513
0_0402_5%

0_0402_5%

DIS@

DIS@

R480

R480

0_0805_5%

0_0805_5%

1 2

+3VS

+1.5VS

+1.05VS_VCCP

+1.8VS

PCH Power Rail Table

Voltage Rail

V_PROC_IO

V5REF

V5REF_SUS

VCC3_3

VCCADAC

VCCADPLLA

VCCADPLLB

VCCCORE

VCCDMI

Voltage

1.05

3.3

3.3

1.05

1.05

1.05

1.05

S0 Iccmax
Current (A)

0.001

5

5

0.001

0.001

0.266

0.001

0.08

0.08

1.3

0.042

1.05VCCIO 2.925

1.05VCCASW 1.01

3.3VCCSPI 0.02

3.3VCCDSW 0.002

1.8 0.19VCCDFTERM

3.3VCCRTC 6 uA

3.3VCCSUS3_3

3.3 / 1.5VCCSusHDA

0.97

0.01

VCCVRM 1.5 0.16

1.05VCCCLKDMI

VCCSSC 1.05

VCCDIFFCLKN 1.05

VCCALVDS 3.3

0.02

0.095

0.055

0.001

1.8VCCTX_LVDS 0.0 6

POWER

2925mA

POWER

VCC CORE

VCC CORE

VCCIO

VCCIO

FDI

FDI

1

mA

CRTLVDS

CRTLVDS

1mA

VCCTX_LVDS[1]

VCCTX_LVDS[2]

60mA

VCCTX_LVDS[3]

VCCTX_LVDS[4]

DMI

DMI

20mA

VCCDFTERM

190mA

NAND / SPI HVCMOS

NAND / SPI HVCMOS

20mA

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCIO[1]

VCCPNAND[1]

VCCPNAND[2]

VCCPNAND[3]

VCCPNAND[4]

VCCSPI

Q65R3@

Q65R3@

U48

U47

AK36

AK37

AM37

AM38

AP36

0.01U_0402_25V7K

0.01U_0402_25V7K

AP37

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

0.01U_0402_25V7K

0.01U_0402_25V7K

+VCCA_LVDS

R424 0_0402_5%DIS@R424 0_0402_5%DIS@

+VCCTX_LVDS

C514

C514

OPT@

OPT@

1

C272

C272

0.1U_0402_10V7K

0.1U_0402_10V7K

2

+VCCAFDI_VRM

+VCCP_VCCDMI

+1.05VS_VCC_DMI

1

C278

C278

0.1U_0402_10V7K

0.1U_0402_10V7K

2

1

C281

C281
1U_0402_6.3V6K

1U_0402_6.3V6K

2

C512

C512

1 2

0.01U_0402_25V7K

0.01U_0402_25V7K

+VCCP_VCCDMI

1

C270

C270
1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VS

0.1U_0402_10V7K

0.1U_0402_10V7K

1

C288

C288

2

OPT@

OPT@

1 2

R541 0_0603_5%

R541 0_0603_5%

1

C513

C513

OPT@

OPT@

2

+3VS

+VCCAFDI_VRM

R477

R477

0_0805_5%

0_0805_5%

1 2

+1.8VS

L12

L12

BLM18PG181SN1D_0603

BLM18PG181SN1D_0603

1

C286

C286
10U_0603_6.3V6M

10U_0603_6.3V6M

2

+3VS

1 2

0.1UH_MLF1608DR10KT_10%_1608

0.1UH_MLF1608DR10KT_10%_1608

C256

C256
22U_0805_6.3V6M

22U_0805_6.3V6M

OPT@

OPT@

0_0603_5%

0_0603_5%

1 2

+1.05VS_PCH

1

2

R474

R474

C276

C276
1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS_VCCP

D D

C C

B B

PJ31

2

JUMP_43X118

JUMP_43X118

10U_0603_6.3V6M

10U_0603_6.3V6M

+1.05VS_PCH

10U_0603_6.3V6M

10U_0603_6.3V6M

@PJ31

@

112

1

C274

C274

2

This pin can be left as NC if
On-Die VR is enabled (Default)

1

C273

C273

C277

C277

2

1U_0402_6.3V6K

1U_0402_6.3V6K

This pin can be left as NC if
On-Die VR is enabled (Default)

1

C269

C269

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

C279

C279

2

2

+3VS

1U_0402_6.3V6K

1U_0402_6.3V6K

C275

C275

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS_PCH

1

C510

C510

2

1

C290

C290

0.1U_0402_10V7K

0.1U_0402_10V7K

2

+1.05VS_PCH

+VCCP_VCCDMI

+1.05VS_PCH +VC CA_DAC

1

C289

C289

2

T30PAD T30PAD

1

C511

C511

1U_0402_6.3V6K

1U_0402_6.3V6K

2

T36PAD T36PAD

U2G

U2G

1300mA

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VCCFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_POWER-1

PCH_POWER-1

PCH_POWER-1

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

23 48Wednesday, October 20, 2010

23 48Wednesday, October 20, 2010

23 48Wednesday, October 20, 2010

1

0.1

0.1

0.1

5

+3VS

L18

L18

1 2

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

D D

+3VS_VCC_CLKF33

1

C301

C301
10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

C310

C310
1U_0402_6.3V6K

1U_0402_6.3V6K

2

"@" Avoid leakage

This pin can be left as NC if
On-Die VR is enabled (Default)

+1.05VS_PCH

C C

1U_0402_6.3V6K

+1.05VS_PCH

+1.05VS_PCH

B B

+1.05VS_PCH

+1.05VS_PCH

A A

R522

R522

0_0603_5%

0_0603_5%

R485

R485

0_0603_5%

0_0603_5%

R521

0_0603_5%

0_0603_5%

@R521

@

12

12

12

1

2

1

2

1

C316

C316
1U_0402_6.3V6K

1U_0402_6.3V6K

2

L21

L21

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

1 2

L19

L19

1 2

10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

C333

220U_B2_2.5VM_R15

220U_B2_2.5VM_R15

C337

C337
1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS_VCCDIFFCLKN

C320

C320
1U_0402_6.3V6K

1U_0402_6.3V6K

C333

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

+1.05VM_VCCSUS

1

+

+

C295

C295

1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VS_VCCP

1

2

1U_0402_6.3V6K

+1.05VS_VCCADPLLA

+1.05VS_VCCADPLLB

1

+

+

C515

C515

2

220U_B2_2.5VM_R15

220U_B2_2.5VM_R15

+1.05VS_PCH

1U_0402_6.3V6K

1U_0402_6.3V6K

R511

R511

1 2

0_0603_5%

0_0603_5%

C325

C325

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

0.1U_0402_10V7K

0.1U_0402_10V7K

C318

C318

0.1U_0402_10V7K

0.1U_0402_10V7K

1

2

4

This pin can be left as NC if

+3VALW

On-Die VR is enabled (Default)

1

C324

C324

0.1U_0402_10V7K

0.1U_0402_10V7K

2

@

@

C305

C305

12

0.1U_0402_10V7K

0.1U_0402_10V7K

+1.05VS_PCH

1

C300

C300
1U_0402_6.3V6K

1U_0402_6.3V6K

@

@

2

1

C311

C311

C312

C312

22U_0805_6.3V6M

22U_0805_6.3V6M

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C294

C294

2

1

C334

C334

2

1

0.1U_0402_10V7K

0.1U_0402_10V7K

C299

C299

2

1

1

C303

C303

0.1U_0402_10V7K

0.1U_0402_10V7K

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C308

C308

1U_0402_6.3V6K

1U_0402_6.3V6K

2

+VCCRTCEXT

+VCCAFDI_VRM

+1.05VS_VCCADPLLA

+1.05VS_VCCADPLLB

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

+VCCSST

+1.05VM_VCCSUS

+RTCVCC

C327

C327

C323

C323

1

C298

C298
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

2

C322

C322

+PCH_VCCDSW

+3VS_VCC_CLKF33

+VCCSUS

1

2

1

2

+V_CPU_IO

0.1U_0402_10V7K

0.1U_0402_10V7K

1

1

C330

C330

2

2

T41

T41

PAD

PAD

T42PAD T42PAD

1

C336

C336

0.1U_0402_10V7K

0.1U_0402_10V7K

2

U2J

U2J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCIO[8]

AF34

VCCIO[9]

AG34

VCCIO[11]

AG33

VCCIO[10]

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

1mA

BJ8

V_PROC_IO

A22

VCCRTC

COUGARPOINT_FCBGA989~D

COUGARPOINT_FCBGA989~D

3mA

1010mA

80mA

80mA

55mA

95mA

POWER

POWER

Clock and Miscellaneous

Clock and Miscellaneous

CPURTC

CPURTC

3

119mA

1mA

PCI/GPIO/LPCMISC

PCI/GPIO/LPCMISC

SATA USB

SATA USB

10mA

HDA

HDA

VCCIO[29]

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

1mA

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

Q65R3@

Q65R3@

N26

P26

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

+1.05VS_PCH

+PCH_V5REF_SUS

+VCCA_USBSUS

+PCH_V5REF_RUN

1 2

C306

C306

0.1U_0402_10V7K

0.1U_0402_10V7K

+1.05VS_SATA3

T43 PADT43 PAD

+VCCAFDI_VRM

+1.05VS_VCC_SATA

+VCCME_22

+VCCME_23

+VCCME_21

1

C307

C307

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+1.05VS_PCH

1

C328

C328
1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VALW

1

C321

C321

0.1U_0402_10V7K

0.1U_0402_10V7K

2

1

2

1

C297

C297

0.1U_0402_10V7K

0.1U_0402_10V7K

2

This pin can be left as NC if
On-Die VR is enabled (Default)

+VCCAFDI_VRM

+3VALW

+3VALW

1

C332

C332

0.1U_0402_10V7K

0.1U_0402_10V7K

2

@

@

C335 1U_0402_6.3V6K

C335 1U_0402_6.3V6K

1 2

+3VALW

+3VALW

C293

C293
1U_0402_6.3V6K

1U_0402_6.3V6K

+3VS

1

+3VS

C313

C313

0.1U_0402_10V7K

0.1U_0402_10V7K

2

+3VS

+1.05VS_SATA3

1

C329

C329
1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VS_VCC_SATA

1

C331

C331
1U_0402_6.3V6K

1U_0402_6.3V6K

2

R509 0_ 0603_5%R509 0_0603_5%

R517 0_ 0603_5%R517 0_0603_5%

R520 0_ 0603_5%R520 0_0603_5%

12

12

12

R491

R491

0_0805_5%

0_0805_5%

2

R516

R516

0_0805_5%

0_0805_5%

+1.05VS_PCH

12

+1.05VS_PCH

+1.05VS_PCH

12

R512

R512

100_0402_5%

100_0402_5%

100_0402_5%

100_0402_5%

+5VALW +3VALW

21

12

1

2

+5VS +3VS

12

R490

R490

21

1

2

1

D8

D8

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+PCH_V5REF_SUS

C326

C326

0.1U_0603_25V7K

0.1U_0603_25V7K

D7

D7

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+PCH_V5REF_RUN

C304

C304
1U_0603_10V6K

1U_0603_10V6K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

PCH_POWER-2

PCH_POWER-2

PCH_POWER-2

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

1

24 48Wedn esday, October 20, 2010

24 48Wedn esday, October 20, 2010

24 48Wedn esday, October 20, 2010

0.1

0.1

0.1

of

5

U2H

U2H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

D D

C C

B B

A A

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

COUGARPOINT_FCBG A989~D

COUGARPOINT_FCBG A989~D

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

Q65R3@

Q65R3@

AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28

4

3

U2I

U2I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

COUGARPOINT_FCBG A989~D

COUGARPOINT_FCBG A989~D

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

Q65R3@

Q65R3@

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

2

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_GND

PCH_GND

PCH_GND

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

25 48W ednesday, October 20, 2010

25 48W ednesday, October 20, 2010

25 48W ednesday, October 20, 2010

1

0.1

0.1

0.1

5

4

3

2

1

SATA Main HDD Conn. SATA ODD Conn

+5VS

D D

@ JHDD1

@

C C

SANTA_191001-2

SANTA_191001-2

Place closely JHDD1 SATA CONN.

1.2A

1

C356

C356
10U_0805_10V4Z

10U_0805_10V4Z

2

JHDD1

GND

A+

GND

B+

GND

V33
V33

V33
GND
GND
GND

V5
V5
V5

GND

Reserved

GND

V12

V12

V12

GND
GND

1

C357

C357

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

SATA_PTX_C_DRX_P0

2

SATA_PTX_C_DRX_N0

3

A-

4

SATA_PRX_DTX_N0

5

B-

6
7

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

23
24

SATA_PRX_DTX_P0

1

C358

C358

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

2

Close to JHDD1

C369 0.01U_0402_25V7KC369 0.01U_0402_25V7K

1 2

C367 0.01U_0402_25V7KC367 0.01U_0402_25V7K

1 2

C368 0.01U_0402_25V7KC368 0.01U_0402_25V7K

1 2

C370 0.01U_0402_25V7KC370 0.01U_0402_25V7K

1 2

+3VS

+5VS

C359

C359

0.1U_0402_16V4Z

0.1U_0402_16V4Z

SATA_PTX_DRX_P0 17
SATA_PTX_DRX_N0 17

SATA_PRX_C_DTX_N0 17

SATA_PRX_C_DTX_P0 17

JODDB

@JODDB

@

1

1
2
3
4
5
6
7
8

9
10
11
12

GND
GND

ACES_88058-120N

ACES_88058-120N

2
3
4
5
6
7
8
9
10
11
12
13
14

SATA_PTX_C_DRX_P2
SATA_PTX_C_DRX_N2

SATA_PRX_DTX_N2
SATA_PRX_DTX_P2

ODD_DETECT#_R

+5VS_ODD

ODD_DA#_R

USB Board@ Right Side

W=60mils

VOUT
VOUT

FLG

+USB_VCCA

8

C361 1000P_0402_50V7KC361 1000P_ 0402_50V7K

7
6
5

1

C362

C362

4.7U_0805_10V4Z

4.7U_0805_10V4Z

2

@

@

USB_EN#

+5VALW

2.5A

U14

U14

1

GND

2

VIN
VIN3VOUT

4

EN

RT9715BGS_SO8

RT9715BGS_SO8

Close to JODD

C378 0.01U_0402_25V7K C378 0.01U_0402_25V7K

1 2

C377 0.01U_0402_25V7K C377 0.01U_0402_25V7K

1 2

C376 0.01U_0402_25V7K C376 0.01U_0402_25V7K

1 2

C375 0.01U_0402_25V7K C375 0.01U_0402_25V7K

1 2

1 2

R561 0_0402_5%R561 0_0402_5%

1 2

R562 0_0402_5%R562 0_0402_5%

For EMI

12

USB_OC#0 21,33

ODD_DETECT# 22

ODD_DA# 21

USB20_N021

USB20_P021

USB20_N121

USB20_P121

SATA_PTX_DRX_P2 17

SATA_PTX_DRX_N2 17

SATA_PRX_C_DTX_N2 17
SATA_PRX_C_DTX_P2 17

R73 0_0402_5%

R73 0_0402_5%

@

@

1 2

L53

L53

1

1

4

4

WCM-2012-900T_0805

WCM-2012-900T_0805

R87 0_0402_5%

R87 0_0402_5%

R77 0_0402_5%

R77 0_0402_5%

L54

L54

1

1

4

4

WCM-2012-900T_0805

WCM-2012-900T_0805

R88 0_0402_5%

R88 0_0402_5%

@

@

1 2

@

@

1 2

@

@

1 2

2

3

2

3

+5VS_ODD

2

3

2

3

1.1A

1

C352

C352

10U_0805_10V4Z

10U_0805_10V4Z

2

USB20_N0_R

USB20_P0_R

USB20_N1_R

USB20_P1_R

Place components closely ODD CONN.

1

C353

C353

10U_0805_10V4Z

10U_0805_10V4Z

2

+5VL

+5VALW

+USB_VCCA

1

C354

C354

@

@

1U_0402_6.3V6K

1U_0402_6.3V6K

2

BACK_SENSE31

NBA_PLUG31

MIC1_R31
MIC1_L31

HP_L31

HP_R31

1 2

R149 0_0402_5%R149 0_0402_5%

@

@

1 2

R148 0_0402_5%

R148 0_0402_5%

1

2

USB20_P0_R
USB20_N0_R

USB20_P1_R
USB20_N1_R
+5V_IO

W=60mils

C355

C355

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C360

C360

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

JPIO

@JPIO

@

22

22

21

21

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

ACES_85201-2005N

ACES_85201-2005N

SATA 2nd HDD Conn.

B B

A A

5

+5VS

1

1

C363

C363
10U_0805_10V4Z

10U_0805_10V4Z

2

Place closely JHDD2 SATA CONN.

.2A

1

C372

C372

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

SATA_PRX_C_DTX_P117
SATA_PRX_C_DTX_N117

SATA_PTX_DRX_N117
SATA_PTX_DRX_P117

1

C373

C373

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

4

1

C374

C374

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C3710.01U_0402_25V7K C3710.01U_0402_25V7K

1 2

C3660.01U_0402_25V7K C3660.01U_0402_25V7K

1 2

C3650.01U_0402_25V7K C3650.01U_0402_25V7K

1 2

C3640.01U_0402_25V7K C3640.01U_0402_25V7K

1 2

Close to JHDD2

+5VS

SATA_PRX_DTX_P1
SATA_PRX_DTX_N1

SATA_PTX_C_DRX_N1
SATA_PTX_C_DRX_P1

JHDD2

JHDD2

@

@

1
3
5
7
9

ACES_85203-1202L

ACES_85203-1202L

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1
3
5
7
9
111112
131314
151516
171718
191920
212122
232324

3

2

2

4

4

6

6

8

8

10

10

12
14
16
18
20
22
24

Compal Secret Data

Compal Secret Data

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

USB Board@ Left Side

+USB_VCCC +USB_VCCB

1 2

+5VALW

R568 100K_0402_5%R568 100K_0402_5%

USB_EN#3 3

USB20_N221

USB20_P221

USB20_P2_R

USB20_N2_R

2

USB_EN#

W=60mils

@

@

R190 0_0402 _5%

R190 0_0402 _5%

1

4

R189 0_0402 _5%

R189 0_0402 _5%

2

3

12

L15

L15

1

2

3

4

WCM-2012-900T_0805

WCM-2012-900T_0805

@

@

12

D23

@D23

@

1

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Q8

Q8

D

S

D

S

1 3

AO3413_SOT23

AO3413_SOT23

G

G

2

+USB_VCCC

C426 220U_6.3V_M _R15

C426 220U_6.3V_M _R15

1 2

+

+

C428 1000P_0402_50V7KC428 1000P_0402_50V 7K

1 2

C389 0.1U_0402_16V4ZC 389 0.1U_0402_16V4Z

1 2

JUSB

@JUSB

@

USB20_N2_R
USB20_P2_R

1

VCC

2

D-

3

D+

4

GND

5

GND

6

GND

7

GND

8

GND

SUYIN_020173GB004M25MZL

SUYIN_020173GB004M25MZL

1

2

3

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SATA-HDD/ODD/USB

SATA-HDD/ODD/USB

SATA-HDD/ODD/USB

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

0.1

0.1

26 48Wednesday, October 20, 2010

26 48Wednesday, October 20, 2010

26 48Wednesday, October 20, 2010

0.1

Slot 1 Half PCIe Mini Card-WLAN/ WiMax

+3VALW

+3V_WLAN

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

CM1

CM1

CM2

CM2

2

0.01U_0402_25V7K

0.01U_0402_25V7K

CLKREQ_WLAN#18

CLK_WLAN#18
CLK_WLAN18

PCIE_PRX_WLANTX_N218
PCIE_PRX_WLANTX_P218

PCIE_PTX_C_WLANRX_N218
PCIE_PTX_C_WLANRX_P218

E51_TXD33
E51_RXD33

Debug card using

2

112

PJ27 JUMP_43X79@PJ27 JUMP_43X79@

2

+3VS

PJ26 JUMP_43X79@PJ26 JUMP_43X79@

112

Short PJ27 for Wimax
Short PJ26 for WLAN

40 mils

BT_CTRL BT_CTRL_ R

For SED For SED

1

1

12

C253

C253

CM7

CM3

CM3

2

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

@

@

R1443

R1443

0_0402_5%

0_0402_5%

1 2

+3V_WLAN

R16

R16
0_0402_5%

0_0402_5%

1 2
1 2

0_0402_5%

0_0402_5%
R17

R17

47P_0402_50V8J

47P_0402_50V8J

@

@

E51_RXD_R

CM7

0.01U_0402_25V7K

0.01U_0402_25V7K

+3V_WLAN

+1.5VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

CM8

CM8

2

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

JWLAN

JWLAN

1

1

3

3

5

5

7

7
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152

GND153GND2

BELLW_80003-1 121 @

BELLW_80003-1 121 @

CM9

CM9

2

2

4

4

6

6

8

8

10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

1

47P_0402_50V8J

47P_0402_50V8J

2

+1.5VS

WLAN&BT Combo module circuits

BT_CRTL

BT_ON#

**If +3V_WLAN is +3VS, please
remove D24

12

C254

C254

@

@

SUSP#13 ,17,33,36,41,43

+3V_WLAN

PLT_RST#

LED_WIMAX#

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

BT_ON#22,32

BT_CTRL E51_RXD_R

1 2

1K_0402_5%

For isolate Intel Rainbow Peak and
Compal Debug Card.

RM6 100K_0402_ 5%

RM6 100K_0402_ 5%

1K_0402_5%

WL_OFF# 21

PLT_RST# 5,21,28,29 ,30,33,34

PM_SMBCLK 11,12, 18
PM_SMBDATA 11,12,18

USB20_N9 21
USB20_P9 21

LED_WIMAX# 35

1 2

WIMAX@

WIMAX@

BT
on module

BT
on module

Enable Disable

H L

L H

D24

D24

21

13

D

D

Q36

Q36

2

G

G

2N7002_SOT23-3

2N7002_SOT23-3

S

S

R327

R327

WiMaxWLAN/ WiFi

+3VS

BT_CTRL

Slot 2 Full PCIe Mini Card- 3G/ TV Tuner
Half PCIe Mini Card- JET

J3G

PCIE--JET

PCIE_PRX_JETTX_N318
PCIE_PRX_JETTX_P31 8

PCIE_PTX_C_JETRX_N318
PCIE_PTX_C_JETRX_P318

CLKREQ_JET#18

CLK_JET#18
CLK_JET18

+3VS

J3G

1

1

3

3

5

5

7

7
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152

GND153GND2

BELLW_80003-1 121

BELLW_80003-1 121

2
4
6
8

+3VS

+1.5VS

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

@

@

2.75A

RF_OFF#
PLT_RST#

RF_OFF# 21

+3VS

CM4

CM4

0.01U_0402_25V7K

0.01U_0402_25V7K

120 mils

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

CM5

CM5

2

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

CM6

CM6

1

2

For SED

12

C255

C255
47P_0402_50V8J

47P_0402_50V8J

@

@

USB Sleep & Charge
Auto-Mode
Mode3

+5VALW +USB_VCCB

1
2

USB_CHG_EN#30,33

4

2.5A

U15

U15

GND

VOUT
VOUT

VIN
VIN3VOUT

FLG

EN

RT9715BGS_SO8

RT9715BGS_SO8

8
7
6
5

W=60mils

1

C383

C383

4.7U_0805_10V4Z

4.7U_0805_10V4Z

@

@

2

USB_OC#1 21,30,33

MAX14566B

CB

0

SLP_CHG_M4

0

0

1 X

CB1 (CEN#)
SLP_CHG_M3

0

1

SLP_CHG_M32 1
USB20_DN1_R30
USB20_DP1_R30

STATUS

AUTO MODE

Force Dedicated charger mode
(MODE3)

Pass-Through (USB) Mode:
Connect DP/DM to TDP/TDM

SA00004GV00

U5

SLP_CHG_M3
USB20_DN1_R

U5

1

CEN

2

DM

3

DP

4

GND

9

GND

MAX14566BEETA+_TDFN-EP8_2X2~D

MAX14566BEETA+_TDFN-EP8_2X2~D

SLP_CHG_M4

8

CB

U2D_DN1

7

TDM

U2D_DP1USB20_DP1_R

6

TDP

5

VCC

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SLP_CHG_M4 21
U2D_DN1 30
U2D_DP1 30

+5VALW

1

C892

C892

0.1U_0402_16V7K

0.1U_0402_16V7K

2

Compal Secret Data

Compal Secret Data

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCIe-WLAN/JET/3G/TV/S&C

PCIe-WLAN/JET/3G/TV/S&C

PCIe-WLAN/JET/3G/TV/S&C

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

Wednesday, October 20 , 2010

Wednesday, October 20 , 2010

Wednesday, October 20 , 2010

27 48

27 48

27 48

0.1

0.1

0.1

A

CL1 0.1U_0402 _16V7KCL1 0 .1U_0402_16V7K

PCIE_PRX_C_LANTX_P118

PCIE_PRX_C_LANTX_N118

1 1

+3V_LAN

RL24 10K_0402_5%@RL24 10K_0402_5%@

RL25 10K_0402_5%@RL25 10K_0402_5%@

12

12

CLKREQ_LAN#

EC_SWI#

1 2

CL2 0.1U_0402 _16V7KCL2 0 .1U_0402_16V7K

1 2

PCIE_PTX_C_LANRX_P118
PCIE_PTX_C_LANRX_N118

CLKREQ_LAN#18

PLT_RST#5,21,27,29,30,33,34

CLK_LAN18
CLK_LAN#18

CLKREQ_LAN#

PCH side already have 10K ohm Pull High

Pin14

+3VS

Pin15

Pin38

12

1K_0402_5%

1K_0402_5%
RL6

RL6

@

@

RL433 0_0402_5%RL433 0_0402_5%

RL7

RL7

15K_0402_5%

15K_0402_5%

2 2

NC

10K ohm PD

1K ohm Pull-high

1 2

WOL_EN

WOL_ENISOLATE#

Sx Enable
Wake up

LOW

Sx Disable
Wake up

RTL8111E

EC_SWI#19,30

+3V_LAN

S0

HIGH HIGH

PCIE_PRX_LANTX_P1

PCIE_PRX_LANTX_N1

PCIE_PTX_C_LANRX_P1
PCIE_PTX_C_LANRX_N1

RL19 0_0402_5%RL19 0_0402_5%

PLT_RST#

CLK_LAN
CLK_LAN#

LAN_X1

LAN_X2

EC_SWI#

ISOLATE#

RL21 10K_0402_5%RL21 10K_0402_5%
RL22 1K_0402_5%RL22 1K_0402_5%

+LAN_VDDREG

12

1 2

ENSWREG

1 2

RL5 2.49K_0402_1%RL5 2.49K_0402_1%

+3VALW TO +3V_LAN

@

@

2

AO3413_SOT23

AO3413_SOT23

CL681

CL681

+3VALW

Vgs=-4.5V,Id=3A, Rds<97mohm

2

S

S

QL51

QL51

G

G

@

@

2

1

D

D

1 3

1

1

2

+3VALW

12

RL147

RL147
100K_0402_5%

100K_0402_5%

@

@

RL432

@RL432

@

WOL_EN33

3 3

1 2

47K_0402_5%

47K_0402_5%

2

CL483

CL483

@

@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

2

@

@

CL482

CL482

0.01U_0402_25V7K

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

4.7U_0805_10V4Z

+3V_LAN rising time (10%~90%) need > 1ms and <100ms.

4 4

PJ29

PJ29
JUMP_43X79

JUMP_43X79

@

@

1

CL682

CL682
1U_0402_6.3V6K

1U_0402_6.3V6K

2

@

@

LAN_MDI3­LAN_MDI3+

LAN_MDI2­LAN_MDI2+

LAN_MDI1­LAN_MDI1+

LAN_MDI0­LAN_MDI0+

0.1U_0402_16V7K

0.1U_0402_16V7K

B

12

+3V_LAN

UL1

UL1

22

HSOP

23

HSON

17

HSIP

18

HSIN

16

CLKREQB

25

PERSTB

19

REFCLK_P

20

REFCLK_N

43

CKXTAL1

44

CKXTAL2

28

LANWAKEB

26

ISOLATEB

14

NC/SMBCLK

15

NC/SMBDATA

38

GPO/SMBALERT

33

ENSWREG

34

VDDREG

35

VDDREG

46

RSET

24

GND

49

PGND

RTL8111E-GR_QFN48_6X6

RTL8111E-GR_QFN48_6X6

2

CL35

@CL35

@

1

LED3/EEDO
LED1/EESK

EECS/SCL

EEDI/SDA

NC/MDIP2
NC/MDIN2
NC/MDIP3
NC/MDIN3

REGOUT

1

2

2

CL34

CL34

0.1U_0402_16V7K

0.1U_0402_16V7K

1

Place CL34 colse
to LAN chip

31
37
40

LED0

RL2 10K_0402_5%RL2 10K_0402_5%

30

RL1 10K_0402_5%RL1 10K_0402_5%

32

LAN_MDI0+

1

MDIP0

LAN_MDI0-

2

MDIN0

LAN_MDI1+

4

MDIP1

LAN_MDI1-

5

MDIN1

LAN_MDI2+

7

LAN_MDI2-

8

LAN_MDI3+

10

LAN_MDI3-

11

13

DVDD10

29

DVDD10

41

DVDD10

27

DVDD33

39

DVDD33

12

AVDD33

42

AVDD33

47

AVDD33

48

AVDD33

21

EVDD10

3

AVDD10

6

AVDD10

9

AVDD10

45

AVDD10

CL26

CL26
27P_0402_50V8J

27P_0402_50V8J

+LAN_REGOUT

36

60 mils

YL1

YL1

1 2

25MHZ_20PF_7A25000012

25MHZ_20PF_7A25000012

1
2
3

4
5

7
8
9

10
11
12

C

12
12

+LAN_VDD10

+3V_LAN

+3V_LAN

+LAN_EVDD10

+LAN_VDD10

LAN_X2LA N_X1

1

CL27

CL27
27P_0402_50V8J

27P_0402_50V8J

2

UL4

UL4

TCT1
TD1+
TD1-

TCT2
TD2+
TD2-6MX2-

TCT3
TD3+
TD3-

TCT4
TD4+
TD4-

SUPERWORLD_SW G150401

SUPERWORLD_SW G150401

MCT1
MX1+

MX1-

MCT2
MX2+

MCT3
MX3+

MX3-

MCT4
MX4+

MX4-

24
23
22

21
20
19

18
17
16

15
14
13

LL1

+LAN_REGOUT

Layout Note: LL1 must be
within 200mil to Pin36,
CL13,CL9 must be within
200mil to LL1

+3V_LAN

ENSWREG

LL1

1 2

2.2UH +-5% NLC252018T-2R2J-N

2.2UH +-5% NLC252018T-2R2J-N

1 2

LL2 0_0603_5%LL2 0_0603_5%

1U_0402_6.3V6K

1U_0402_6.3V6K

1 2

LL3 0_0603_5%LL3 0_0603_5%

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

+3V_LAN

CL39 1000P_0402_50V7KCL39 1000P _0402_50V7K

12

CL40 1000P_0402_50V7KCL40 1000P _0402_50V7K

CL41 1000P_0402_50V7KCL41 1000P _0402_50V7K

CL42 1000P_0402_50V7KCL42 1000P _0402_50V7K

RL11 75_0402_1%R L11 75_0402_1%

12

RL12 75_0402_1%R L12 75_0402_1%

12

RL13 75_0402_1%R L13 75_0402_1%

12

RL15 75_0402_1%R L15 75_0402_1%

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

CL18

CL18

Close to Pin 21

CL28

CL28

RL4

1 2

1 2

1 2

1 2

D

CL13

CL13

+LAN_EVDD10+L AN_VDD10

1

2

+LAN_VDDREG

1

2

RTL8105E-VC
RTL8111E-VB
PWM Mode

(Pull High)

1

2

1

CL17

CL17

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

2

+LAN_VDD10

1

CL9

CL9

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

CL29

CL29

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3V_LAN

+LAN_VDD10

FOR EMI ISN TEST DEMAND.

CL3 to CL6 close to Pin 27,39,47,48

L7 to CL8 close to Pin 12,42

C

1 2

CL3 0.1U_0402_16V4ZCL3 0.1U_0402_16V4Z

1 2

CL4 0.1U_0402_16V4ZCL4 0.1U_0402_16V4Z

1 2

CL5 0.1U_0402_16V4ZCL5 0.1U_0402_16V4Z

1 2

CL6 0.1U_0402_16V4ZCL6 0.1U_0402_16V4Z

1 2

CL7 0.1U_0402_16V4ZCL7 0.1U_0402_16V4Z

1 2

CL8 0.1U_0402_16V4ZCL8 0.1U_0402_16V4Z

CL19, CL20,CL21 close to pin 13,29,45, respectively
C

L22 close to pin 3, respectively

CL23,CL24,CL25 close to pin 6,9,41, respectively

1 2

CL19 0.1U_0402_16V4ZCL19 0.1U_0402_16V4Z

1 2

CL20 0.1U_0402_16V4ZCL20 0.1U_0402_16V4Z

1 2

CL21 0.1U_0402_16V4ZCL21 0.1U_0402_16V4Z

1 2

CL22 0.1U_0402_16V4ZCL22 0.1U_0402_16V4Z

1 2

CL23 0.1U_0402_16V4ZCL23 0.1U_0402_16V4Z

1 2

CL24 0.1U_0402_16V4ZCL24 0.1U_0402_16V4Z

1 2

CL25 0.1U_0402_16V4ZCL25 0.1U_0402_16V4Z

+3V_LAN

1

CL683

CL683

10U_0805_10V6K

10U_0805_10V6K

@

@

2

LAN Conn.

JLAN

RJ45_MIDI3-

RJ45_MIDI3+

RJ45_MIDI1-

RJ45_MIDI2-

RJ45_MIDI2+

RJ45_MIDI1+

RJ45_MIDI3-

RJ45_MIDI3+

RJ45_MIDI2-

RJ45_MIDI2+

RJ45_MIDI1-

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

RJ45_GND LANGND

RJ45_MIDI0-

RJ45_MIDI0+

1 2

CL36 1000P_1808_3KV7KCL36 1000P_180 8_3KV7K

JLAN

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

SANTA_130452-C

SANTA_130452-C

@

@

1

CL37

CL37

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

E

1

CL684

CL684
10U_0805_10V6K

10U_0805_10V6K

@

@

2

AZC199-02SPR7G_SOT23-3

AZC199-02SPR7G_SOT23-3

9

SHLD1

10

SHLD2

AZC199-02SPR7G_SOT23-3

AZC199-02SPR7G_SOT23-3

1

CL38

CL38

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

1

DL1

DL1

1

@

@

223

3

3

223

@

@

1

DL2

DL2

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/05 2 010/01/23

2009/10/05 2 010/01/23

2009/10/05 2 010/01/23

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PCIe-LAN-RTL8105E/8111E

PCIe-LAN-RTL8105E/8111E

PCIe-LAN-RTL8105E/8111E

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

E

0.1

0.1

28 48Wednesday, October 20, 2010

28 48Wednesday, October 20, 2010

28 48Wednesday, October 20, 2010

0.1

5

D D

CLK_CR#18
CLK_CR18

PCIE_PTX_C_CRRX_N418
PCIE_PTX_C_CRRX_P418

CC8 0.1U_0402_16V7KCC8 0.1U_0402_16V7K

PCIE_PRX_C_CRTX_N418
PCIE_PRX_C_CRTX_P418

C C

+VCC_OUT

RC7 10K_0402_5%RC7 10K_0402_5%

RC9 1K_0402_5%RC9 1K_0402_5%

12

1 2

XDWP#_S DWP#

1 2

CC9 0.1U_0402_16V7KCC9 0.1U_0402_16V7K

1 2

CC16 close to pin43
For internal LDO in SD3.0

PLT_RST#5,21,27,28,30,33,34

CR_LEDCON#35

XD_RB#

4

CLK_CR#
CLK_CR

PCIE_PTX_C_CRRX_N4
PCIE_PTX_C_CRRX_P4

PCIE_PRX_CRTX_N4
PCIE_PRX_CRTX_P4

RC3 12K_0402_1%RC3 12K _0402_1%

1 2

CC16 2.2U_0603_6.3V4ZCC16 2.2U_0603_6.3V4Z

12

+VCC_OUT

CR_LEDCON#

Confirm sinking 16mA

APREXT

12mil

+SDV33_18

CPPE#
XD_CD#

MS_CD#
SD_CD#

40 mils

JMB389C

UC1

UC1

3

APCLKN

4

APCLKP

9

APRXN

8

APRXP

11

APTXN

12

APTXP

7

APREXT

43

SDDV/MDIO4

39

TXIN/NC

JMB389

JMB389

1

XRSTN

2

XTEST

13

CPPE_N

14

CR1_CD2N

15

CR1_CD1N

16

CR1_CD0N

17

CR1_PCTLN

21

CR1_LEDN

JMB389-LGAZ0A_LQ FP48_7X7

JMB389-LGAZ0A_LQ FP48_7X7

APVDD

APV18

NC/TAV33

DV33
DV33
DV33
DV18
DV18

MDIO0
MDIO1
MDIO2
MDIO3

MDIO6/4

MDIO5

G/MDIO6

MDIO7
MDIO8

MDIO9
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14

NC/SPI_SCK
NC/SPI_CSN

NC/SPI_SO

NC/SPI_SI

APGND
NC/GND
NC/GND
NC/GND

3

+1.8VS_OUT

2

0mil

CC1

CC1

5
10
36

19
20
44
18
37

XD_SD_MS_D0

48

XD_SD_MS_D1

47

XD_SD_MS_D2

46

XD_SD_MS_D3

45

SDCMD_MSBS_XDW E#

41

SDCLK_MSCLK_XDCE #

42

XDWP#_S DWP#

24

XD_CLE

40

XD_SD_D4

29

XD_SD_D5

28

XD_SD_D6

27

XD_SD_D7

26

XD_RE#

25

XD_RB#

23

XD_ALE

22

30
33
34
35

6
31
32
38

CC3 close to pin 5
CC2 close to CC3
CC1 is near CC3

1

1

CC2

CC2

2

2

10U_0805_10V4Z

10U_0805_10V4Z

4

0mil

20mil

1

CC4

CC4

2

1000P_0402_50V7K

1000P_0402_50V7K

+1.8VS_OUT

2

CC10

CC10

CC11 10U_0805_10V4ZCC11 10U_0805_10V4 Z

1

1

CC4 close to pin 10

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

CC11 close to pin18

2

For intenal LDO's usage

CC3

CC3

0.22U_0402_6.3V4K

0.22U_0402_6.3V4K

+3VS

place near pin 19,20 and 44

1 2

CC5 0.1U_0402_16V 4ZCC5 0.1U_0402_16V4Z

1 2

CC6 0.1U_0402_16V4ZCC6 0.1U_0402_16V4Z

1 2

CC7 0.1U_0402_16V4ZCC7 0.1U_0402_16V4Z

0.22U_0402_6.3V4K

0.22U_0402_6.3V4K

CC10 close to pin37

2

+3VS

2

CC12

CC12

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

CC12 close to pin 36

1

D3E mode

RC31 0_0402_5%RC31 0_0402_5%

CR_CPPE#17

CR_WAK E#17

1 2

RC6 0_0402_5%RC6 0_0402_5%

1 2

Add RC24 and RC17 close to UC1 for xD issue

RC24 22_0402_5%RC24 22_0402_5%

RC17 22_0402_5%RC17 22_0402_5%

SDCLK_MSCLK_XDCE #

RC11 0_0402_5%RC11 0_0402_5%

1 2

RC12 22_0402_5%RC12 22_0402_5%

1 2

RC13 22_0402_5%RC13 22_0402_5%

1 2

12

12

CPPE#

SD_CD#

XDWE#SDCMD_MSBS_XDWE#

SDCMD_MSBS

Reserved for EMI,close to UC1.42

SD_CLK

MS_CLK

XD_CE#

@

@

@

@

RC14

RC14

CC19

RC15

RC15

RC16

RC16

@

@

@

@

CC19

1 2

100P_0402_50V8J

100P_0402_50V8J

@

@

CC20

CC20

1 2

100P_0402_50V8J

100P_0402_50V8J

@

@

CC21

CC21

1 2

100P_0402_50V8J

100P_0402_50V8J

1

0.1

0.1

29 48W ednesday, October 20, 2010

29 48W ednesday, October 20, 2010

29 48W ednesday, October 20, 2010

0.1

SD_CLK

MS_CLK

B B

A A

SD_CD# XD_CD#

1

CC22

CC22

0.1U_0402_16V4Z

0.1U_0402_16V4Z

@

@

2

5

1

CC23

CC23

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

CC17

CC17

10U_0805_10V4Z

10U_0805_10V4Z

+VCC_OUT

1

2

40 mils

1

CC18

CC18

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

XD_CD#
XD_RB#
XD_RE#
XD_CE#
XD_CLE
XD_ALE
XDWE#
XDWP#_S DWP#

XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XD_SD_D4
XD_SD_D5
XD_SD_D6
XD_SD_D7

4

JREAD

33

XD-VCC

34

XD-CD-SW

1

XD-R/B

2

XD-RE

3

XD-CE

4

XD-CLE

5

XD-ALE

6

XD-WE

7

XD-WP

8

XD-D0

9

XD-D1

26

XD-D2

27

XD-D3

28

XD-D4

30

XD-D5

31

XD-D6

32

XD-D7

TAITW_R015- 211-LM-A_NR

TAITW_R015- 211-LM-A_NR

@JREAD

@

14

MS-VCC

MS-SCLK

MS-INS

MS-BS
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3

SD-VCC
SD-CLK

SD-CMD
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3

SD-WP-SW

SD-CD-SW

4in1-GND
4in1-GND
4in1-GND
4in1-GND

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MS_CLK

15

MS_CD#

17

SDCMD_MSBS

21

XD_SD_MS_D0

19

XD_SD_MS_D1

20

XD_SD_MS_D2

18

XD_SD_MS_D3

16

23

SD_CLK

24

SDCMD_MSBS

12

XD_SD_MS_D0

25

XD_SD_MS_D1

29

XD_SD_MS_D2

10

XD_SD_MS_D3

11

XDWP#_S DWP#

35

SD_CD#

36

13
22
37
38

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

3

+VCC_OUT

+VCC_OUT

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

5 in 1 Card Reader

XD_CE#

Reserved for EMI,close to JREAD

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

1 2

100_0402_5%

100_0402_5%

1 2

100_0402_5%

100_0402_5%

1 2

100_0402_5%

100_0402_5%

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PCIe-CardReader JMB389

PCIe-CardReader JMB389

PCIe-CardReader JMB389

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

5

USB30_POK

RT1

RT1

+1.5V to +1.05V Transfer

+5VALW+1.5V+5VALW +1.5V +1.05V

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0603_10V6K

1U_0603_10V6K

CT2

CT2

CT1

CT1

1

1

USB30_POK

2

2

Vout=0.8(1+10K/32.4K)

D D

1.042 ~ 1.0469 ~ 1.0519V
Spec: 0.9975 ~ 1.05 ~ 1.1025

+3V

+3VALW to +3V Transfer

SYSON33,41

+3V +3VA

LT3

LT3

1 2

BLM18AG601SN1D_2P

BLM18AG601SN1D_2P

C C

10U_0603_6.3V6M

10U_0603_6.3V6M

+1.05V

CT18 0.1U_0402_16V7KCT18 0.1U_0402_16V7K

CT17 0.01U_0402_25V7KC T17 0.01U_0402_25V7K

CT19 0.01U_0402_25V7KC T19 0.01U_0402_25V7K

CT16 0.1U_0402_16V7KCT16 0.1U_0402_16V7K

1

2

1

2

1

2

+3V

CT13 0.01U_0402_25V7KC T13 0.01U_0402_25V7K

CT12 0.01U_0402_25V7KC T12 0.01U_0402_25V7K

CT11 0.01U_0402_25V7KC T11 0.01U_0402_25V7K

CT10 0.01U_0402_25V7KC T10 0.01U_0402_25V7K

2

2

2

B B

1

1

1

2

G

G

QT2 2N7002_SOT23-3

QT2 2N7002_SOT23-3

1

CT25

CT25

2

CT20 0.01U_0402_25V7KC T20 0.01U_0402_25V7K

CT22 0.01U_0402_25V7KC T22 0.01U_0402_25V7K

CT21 0.1U_0402_16V7KCT21 0.1U_0402_16V7K

CT23 0.01U_0402_25V7KC T23 0.01U_0402_25V7K

2

2

1

2

1

2

1

2

1

1

2

1

CT14 0.1U_0402_16V7KCT14 0.1U_0402_16V7K

CT15 0.01U_0402_25V7KC T15 0.01U_0402_25V7K

1

2

2

1

UT2

UT2

5

VIN

VOUT

9

VOUT

VIN

6

VCNTL

7

POK

8

EN

GND

APL5930KAI-TRG_SO8

APL5930KAI-TRG_SO8

+3VALW

RT37

RT37
100K_0402_5%

CT24 0.01U_0402_25V7KC T24 0.01U_0402_25V7K

2

1

100K_0402_5%

1 2

13

D

D

S

S

PCIE_PRX_C_USBTX_P618
PCIE_PRX_C_USBTX_N618

PCIE_PTX_C_USBRX_P618
PCIE_PTX_C_USBRX_N618

USB30_SMI#_IC

CT41

CT41

0.1U_0402_16V7K

0.1U_0402_16V7K

1 2

RT38 47K_0402_5%RT38 47K_0402_5%

0.01U_0402_25V7K

0.01U_0402_25V7K

+3V & +1.05V has power sequence timing:

0.1*VDD(+3V) ~ 0.9*VDD(+1.05V) < 100ms

CLK_USB3018
CLK_USB30#18

PLT_RST#5,21,27,28,29,33,34

EC_SWI#19,28

CLKREQ_USB30#18

UPD720200A:
SMIB Low active

For UPD720200:
SMI high active

13

D

D

Q57

Q57

2

@

@

G

G

2N7002_SOT23-3

2N7002_SOT23-3

S

S

24MHZ_12PF_X5H024000DC1H

24MHZ_12PF_X5H024000DC1H

RT30

0_0402_5%@RT30

0_0402_5%

@

1 2

+5VALW

FB

CT43

CT43

1

2

4.7K_0402_5%

4.7K_0402_5%

1A

3
4

2

1

+3VALW

2

1

G

G

2

2

1

CT29

CT29
CT30

CT30

+3V

@

@

1 2

RT21 0_0402_5%

RT21 0_0402_5%

@

@

1 2

RT40 0_0402_5%

RT40 0_0402_5%

YT1

YT1

1 2

12P_0402_50V8J

12P_0402_50V8J

CT37

CT37

1 2

RT2

RT2

12

10K_0402_1%

10K_0402_1%

RT3

RT3

32.4K_0402_1%

32.4K_0402_1%

CT42

CT42

0.1U_0402_16V4Z

0.1U_0402_16V4Z

S

S

QT1

QT1
AO3413_SOT23

AO3413_SOT23

D

D

1 3

+3V

0.1U_0402_16V7K

0.1U_0402_16V7K

12

0.1U_0402_16V7K

0.1U_0402_16V7K

12

RT12 0_0402_5%RT12 0_0402_5%

1 2

RT15 10K_0402_5%RT15 10K_0402_5%

+3V

RT16 100_0402_1%@RT16 100_0402_1%@
RT17 10K_0402_5%RT17 10K_0402_5%

+3V

RT180_0402_5% R T180_0402_5%

1 2

RT39 10K_0402_5%RT39 10K_0402_5%

1 2

1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

1

221

USB30_SMI_R

USB30_SMI#_R

12

RT26

RT26
100_0402_5%

100_0402_5%

12P_0402_50V8J

12P_0402_50V8J

1

CT38

CT38

2

12

DT3

DT3

Close to U102.D7 Close to U102.P13

10U_0603_6.3V6M

10U_0603_6.3V6M

0.1U_0402_16V7K

0.1U_0402_16V7K

CT3

CT3

CT4

CT4

1

2

PCIE_PRX_USBTX_P6
PCIE_PRX_USBTX_N6

USB30_WAKE#

1 2
1 2
1 2

USB30_SMI_R
USB30_SMI#_RUSB30_SMI#_IC

SPI_CLK_USB

1U_0603_10V6K

1U_0603_10V6K

SPI_CS_USB#

CT44

CT44

SPI_SI_USB

1

SPI_SO_USB

2

CLK_48M_USB

0_0402_5%

0_0402_5%

1 2

1 2

@

@

RT28

RT28

RT29

RT29

+3V

Place as close as possibile to
UU102.N14 and UU102.M14

RT32

RT32

47K_0402_5%

47K_0402_5%

+3V

1 2

12

RT33

RT33
10K_0402_5%

10K_0402_5%

UT4

UT4

1

CS#

2

SO

3

WP#

4

GND

MX25L5121EMC-20G SOP 8P

MX25L5121EMC-20G SOP 8P

5

35mA

HOLD#

SCLK

VCC

SI

8
7
6
5

1 2

RT35 10K_0402_5%RT35 10K_0402_5%

SPI_CLK_USB_R
SPI_SI_USB

RT36

RT36

1 2

0_0402_5%

0_0402_5%

CT39

CT39

1 2

0.1U_0402_16V7K

0.1U_0402_16V7K

SPI_CLK_USBSPI_CLK_USB_R

A A

SPI_CS_USB#
SPI_SO_USB

4

+3VA +3VA

8P_0402_50V8D

8P_0402_50V8D

CT6

CT6

@

1

2

0.01U_0402_25V7K

0.01U_0402_25V7K

@

1

1

2

2

CT5

CT5

Follow Vendor recommend.

+3V +1. 05V

UT1

UT1

D10

F13

F14

VDD33

VDD33

VDD33

B2

PECLKP

B1

PECLKN

D2

PETXP

D1

PETXN

F2

PERXP

F1

PERXN

H2

PERSTB

K1

PEWAKEB

K2

PECREQB

J2

AUXDET

J1

PSEL

H1

SMI

P4

SMIB

P5

PONRSTB

M2

SPISCK

N2

SPISCB

N1

SPISI

M1

SPISO

K13

GND

K14

GND

J13

GND

C14

GND

N14

XT1

M14

XT2

P6

CSEL

CSEL=0
CSEL=1

A1

GND

A2

GND

A3

GND

A4

GND

A5

0_0402_5%

0_0402_5%

GND

A7

GND

A9

GND

A11

GND

A13

GND

A14

GND

B3

GND

B4

GND

B5

GND

B7

GND

B9

GND

B11

GND

B13

GND

B14

GND

C1

GND

C2

GND

C3

GND

C10

GND

C11

GND

GND

GND

C12

C13

SPI_CLK_USB

Close to UU37.6

RT34

RT34

1 2

0_0402_5%

0_0402_5%

@

@

4

GNDD3GNDD4GND

1

0.1U_0402_16V7K

0.1U_0402_16V7K
CT7

CT7

2

0.01U_0402_25V7K

0.01U_0402_25V7K

L10

VDD33F3VDD33G3VDD33G4VDD33L9VDD33

+3V:200mA

+

1.05V:800mA

：：：：

24MHz XTAL

：：：：

48MHz Clock

GND

GND

GND

GNDE1GNDE2GND

D11

D12

D13

D14

2

CT40

CT40

0.1U_0402_16V7K

0.1U_0402_16V7K

1

@

@

8P_0402_50V8D

8P_0402_50V8D

CT9

CT9

@

@

1

1

2

2

CT8

CT8

L13

L14

VDD33

VDD33

VDD33N4VDD33N5VDD33N6VDD33P3VDD10C4VDD10C5VDD10C6VDD10C7VDD10D5VDD10C8VDD10C9VDD10D8VDD10D9VDD10E3VDD10E4VDD10

GND

E13

E14

GNDF4GNDF6GNDF7GNDF8GNDF9GND

GNDG1GNDG2GNDG6GNDG7GNDG8GND

GND

F11

F12

3

1 2

0_0402_5%

0_0402_5%

LT1

@LT1

@

4

4

1

1

WCM-2012-121T_0805

U3RXDP1_R U3RXDP1_R_L

GND

GNDH6GND

GND

GNDH7GNDH8GNDH9GND

G9

H12

G13

G11

G12

WCM-2012-121T_0805

1 2

E11

E12

H11

K11

VDD10

VDD10H3VDD10H4VDD10L5VDD10

GNDJ3GNDJ4GNDJ6GNDJ7GNDJ8GNDJ9GND

GND

GNDK3GNDK4GNDL1GNDL2GNDL3GND

J11

J12

UPD720200AF1-DAP-SSA-A

UPD720200AF1-DAP-SSA-A

3

0_0402_5%

0_0402_5%

+3VA

K12

L8

D7

VDD10

VDD10

VDD10

U3AVDO33

U3TXDP2

U3TXDN2

U2DM2

U3RXDP2

U3RXDN2

PPON2
PPON1

U3TXDP1

U3TXDN1

U2DM1

U3RXDP1

U3RXDN1

U2AVSS

U2PVSS

U3AVSS

L4

2

U2DP2

OCI2B
OCI1B

U2DP1

RREF

U3RXDN1_R_LU3RXDN1_R

RT4

RT4

3

3

2

2

RT6

RT6

P13

U2AVDD10

B6

A6
N8

P8
B8

A8

G14
H13

H14
J14

B10

A10
N10

P10
B12

A12

P12
N12

N11

D6

P14

GND

P11

GND

P9

GND

P7

GND

P2

GND

P1

GND

N13

GND

N9

GND

N7

GND

N3

GND

M13

GND

M12

GND

M11

GND

M10

GND

M9

GND

M8

GND

M7

GND

M6

GND

M5

GND

M4

GND

M3

GND

L12

GND

L11

GND

L7

GND

L6

GND

USB20_DN1_R27

USB20_DP1_R27

OCI2#

RT13 10K_0402_5%RT13 10K_0402_5%

1 2

OCL1#

USB30PWRON

U3TX_C_DP1

CT32 0.1U_0402_16V7KCT32 0.1U_0402_16V7K

U3TX_C_DN1
U2D_DN1

U2D_DP1
U3RXDP1_R

U3RXDN1_R

RT22 1.6K_0402_1%RT22 1.6K_0402_1%

1 2

CT33 0.1U_0402_16V7KCT33 0.1U_0402_16V7K

1 2

U2D_DN1 27

U2D_DP1 27

1 2

1 2

LT2

@LT2

@

4

4

1

1

WCM-2012-121T_0805

U3TXDP1 U3TXDP1_L

USB20_DN1_R

USB20_DP1_R

WCM-2012-121T_0805

1 2

RT9 0_0402_5%RT9 0_0402_5%

1 2

LT4

@LT4

@

1

1

4

4

WCM-2012-900T_0805

WCM-2012-900T_0805

1 2

RT10 0_0402_5%RT10 0_0402_5%

+3V

U3TXDP1

U3TXDN1

U3TXDN1_LU3TXDN1

RT5

RT5

0_0402_5%

0_0402_5%

3

3

2

2

RT7

RT7

0_0402_5%

0_0402_5%

USB20_DN1_L

2

2

USB20_DP1_L

3

3

+USB_VCCB

USB20_DP1_L

2

USB20_DN1_L

3

Change ESD Diode for EMI request

2010/10/05 Add Level shift to avoid +3V leakage from +3VALW_PCH

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

U3TXDP1_L

U3TXDN1_L
USB20_DP1_L

USB20_DN1_L
U3RXDP1_R_L

U3RXDN1_R_L

DT1

DT1

@

@

2

1

1

3

AZC199-02SPR7G_SOT23-3

AZC199-02SPR7G_SOT23-3

10K_0402_5%

10K_0402_5%
RT43

RT43

+3V

USB30_SMI#_IC

OCL1#

10K_0402_5%

10K_0402_5%
RT44

RT44

+3V

1

+USB_VCCB

W=80mils

4.7U_0805_10V4Z

4.7U_0805_10V4Z

1

CT26

CT26

2

RT11

RT11

0_0402_5%

0_0402_5%

12

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

12

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

+

+

CT31

CT31

CT27

CT27

2

220U_6.3V_M_R15

220U_6.3V_M_R15

@

@

1 2

+3V

4

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2

1000P_0402_50V7K

1000P_0402_50V7K

JUSB30

@JUSB30
9
1
8
3
7
2
6
4
5

U3RXDP1_R_L

U3RXDN1_R_L

5

QT3B

QT3B

@

SSTX+
VBUS
SSTX­D+
GND
D­SSRX+
GND
SSRX-

ACON_TARA4-9K1311

ACON_TARA4-9K1311

U3TXDP1_L

U3TXDN1_L

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PCIe-USB3.0 UPD720200A

PCIe-USB3.0 UPD720200A

PCIe-USB3.0 UPD720200A

10

GND

11

GND

12

GND

13

GND

0_0603_5%

0_0603_5%

RT41

RT41

DT2

DT2

1

1

1

2

2

2

4

4

4

5

5

5

3

3

3

8

8

YSCLAMP0524P_SLP2510P8-10-9

YSCLAMP0524P_SLP2510P8-10-9

USB_CHG_EN#USB30PWRON

3

2

QT3A

QT3A

61

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

1

1

CT28

CT28

2

USB_GND

12

12

0_0603_5%

0_0603_5%
RT42

RT42

@

@

U3TXDP1_L

10

10

9

U3TXDN1_L

9

9

8

U3RXDP1_R_L

7

7

7

U3RXDN1_R_L

6

6

6

USB_CHG_EN# 27,33

USB30_SMI# 22

USB_OC#1 21,27,33

30 48Wednesday, October 20, 2010

30 48Wednesday, October 20, 2010

30 48Wednesday, October 20, 2010

of

of

of

CT45 .1U_0402_16V7KCT45 .1U_0402_16V7K

2

1

0.1

0.1

0.1

5

RA20

RA20

+3VS

D D

xt. Mic/LINE IN

E

MIC1_LINE1_R _L

MIC1_LINE1_R _R

Subwoofer

C C

AZ_RST_ HD#17

place close to chip

RA36

RA36

0_0402_ 5%

0_0402_ 5%

RA39

RA39

0_0402_ 5%

0_0402_ 5%

RA35

RA35

RA38

RA38

For EMI

RA44

RA44

100K_04 02_5%

100K_04 02_5%

@

@

0_0402_ 5%

0_0402_ 5%

0_0402_ 5%

0_0402_ 5%

AMP_SUB32

CA11

CA11

0.01U_04 02_25V7K

0.01U_04 02_25V7K

@

@

+3VS

@

@

RA30 0_0402_5%

RA30 0_0402_5%

@

@

RA37 0_0402_5%

RA37 0_0402_5%

MIC1_LINE1_R _L

MIC1_LINE1_R _R

FBMH160 8HM601-T

FBMH160 8HM601-T

12

FBMH160 8HM601-T

FBMH160 8HM601-T

CA2

CA2

RA1

RA1

12

CA8

CA8

CA21 4.7U_0 805_10V4ZCA21 4 .7U_0805_10V4 Z

CA22 4.7U_0 805_10V4ZCA22 4 .7U_0805_10V4 Z

INT_MIC_DATA14

1 2

CA12 100P_04 02_50V8JCA 12 1 00P_0402_50V 8J

1

10U_080 5_10V4Z

10U_080 5_10V4Z

2

1

10U_080 5_10V4Z

10U_080 5_10V4Z

2

1 2

CA9 1U_0402 _6.3V6KCA9 1U_0402_6.3V 6K

1 2

CA10 1U_0402_6.3V6 KCA1 0 1U_0402 _6.3V6K

CA30 1U_0402_6 .3V6KCA 30 1U_0402 _6.3V6K

1 2

1 2

CA31 1U_0402_6 .3V6KCA 31 1U_0402 _6.3V6K

For EMI

RA41

RA41

INT_MIC_CLK1 4

CA47 0.1U_ 0603_50V7KCA47 0.1U_ 0603_50V7K

1 2

CA48 0.1U_ 0603_50V7KCA48 0.1U_ 0603_50V7K

B B

RA18 Close to UA1 for reduce ripple noise
on 5V power plance
(Need confirm with EMI again)

1 2

CA49 0.1U_ 0603_50V7KCA49 0.1U_ 0603_50V7K

1 2

CA50 0.1U_ 0603_50V7KCA50 0.1U_ 0603_50V7K

1 2

RA18 10_0 603_5%RA 18 10_ 0603_5%

12

FBMA-10-1 00505-301T

FBMA-10-1 00505-301T

1

CA28

CA28
27P_040 2_50V8J

27P_040 2_50V8J

@

@

2

CAM@

CAM@

RA42

RA42

100K_04 02_5%

100K_04 02_5%

INT_MIC_CLK_ R

+5VALW

@

@

EC_MUTE #

+MIC1_VRE FO_L

4

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

CA1

CA1

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

CA7

CA7

12

12

INT_MIC_DATA

INT_MIC_CLK_ R

EC_MUTE #

AZ_RST_ HD#

MONO_IN

SENSE_A

1 2

CA15

CA15

2.2U_060 3_6.3V4Z

2.2U_060 3_6.3V4Z

+3VS_DV DD

2

1

2

DGND

RA22 4.7K_0402_5%RA22 4.7K_0402_5%

12

+DVDD_IO

35 mA

1

9

DVDD

23

LINE1_L

24

LINE1_R

14

LINE2_L

15

LINE2_R

21

MIC1_L

22

MIC1_R

16

MIC2_L

17

MIC2_R

2

GPIO0/DMIC_DATA

3

GPIO1/DMIC_CLK

4

PD#

11

RESET#

12

PCBEEP

13

SENSE A

18

SENSE B

36

CBP

35

CBN

31

MIC1_VREFO_L

43

PVSS2

42

PVSS1

49

DVSS2

7

DVSS1

ALC269Q -VB5-GR _QFN48_ 7X7

ALC269Q -VB5-GR _QFN48_ 7X7

PVDD139PVDD2

DVDD_IO

+PVDD1

1

CA61

CA61

2

+AVDD

46

AVDD125AVDD2

SPK_OUT_L+

SPK_OUT_L-

SPK_OUT_R+

SPK_OUT_R-

HP_OUT_L
HP_OUT_R

SYNC

BCLK

SDATA_OUT

SDATA_IN

EAPD

SPDIFO

MONO_OUT

MIC2_VREFO

MIC1_VREFO_R

LDO_CAP

VREF

JDREF

CPVEE

AVSS1
AVSS2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

600 mA

CA57

CA57

place close to chip

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

6

8 mA

38

CA3

CA3

UA1

UA1

10U_080 5_10V4Z

10U_080 5_10V4Z

40
41

45
44

32
33

AZ_SYNC_H D

10

AZ_BITCLK _HD

6

AZ_SDOU T_HD

5

AZ_SDIN0_ HD_R

8

47

48

20

29

30
28

AC_VREF

27

AC_JDRE F

19

CPVEE

34

CA14 2.2U_0603_6.3V 4ZCA 14 2.2U_06 03_6.3V4Z

26
37

3

1

1

CA56

2

10U_080 5_10V4Z

10U_080 5_10V4Z

1

CA4

CA4

2

1 2

CA56

2

10U_080 5_10V4Z

10U_080 5_10V4Z

1

1

CA5

CA5

2

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

SPKL+
SPKL-

SPKR+
SPKR-

RA4 75_0402_1 %RA4 75_0402_ 1%

RA5 75_0402_1 %RA5 75_0402_ 1%

RA6 33_0402 _5%RA6 33_ 0402_5%

AZ_BITCLK _HD

+MIC1_VRE FO_R

RA9 20 K_0402_1%RA 9 20K_0402 _1%

12

AGND

RA2

RA2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

12

0_0603_ 5%

0_0603_ 5%

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

CA6

CA6

CA44

CA44

0_0603_ 5%

0_0603_ 5%

1

2

place close to chip

12

For EMI

CA29

CA29

@

1 2

12

RA1710_ 0402_5%@RA1710_ 0402_5%

10P_040 2_50V8J

10P_040 2_50V8J

CA23 10U_0805_ 10V4ZCA2 3 10U_0805 _10V4Z

1 2

1

CA17

CA17

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

place close to chip

1

1

CA43

CA43

2

2

10U_080 5_10V4Z

10U_080 5_10V4Z

RA3

RA3

12

HP_L 26

HP_R 26

AZ_SYNC_H D 17

AZ_BITCLK _HD 17

AZ_SDOU T_HD 17

AZ_SDIN0_ HD 17EC_MUTE #32,33

@

@

2

CA16

@ CA16

@

2.2U_060 3_6.3V4Z

2.2U_060 3_6.3V4Z

1

2

Speaker Connector

+5VALW

SPKL+

SPKL-

SPKR+

+5VALW

SPKR-

placement near Audio Codec

0_0603_ 5%

0_0603_ 5%

0_0603_ 5%

0_0603_ 5%

0_0603_ 5%

0_0603_ 5%

0_0603_ 5%

0_0603_ 5%

PCH_SPK R1 7

Change to AGND for
high frequency noise issue

Ext.MIC/LINE IN JACK

RA13

RA13

12

1

CA19

CA19

10U_080 5_10V4Z@

10U_080 5_10V4Z@

2

1

CA20

CA20

RA14

RA14

10U_080 5_10V4Z@

10U_080 5_10V4Z@

2

12

RA15

RA15

12

1

CA25

CA25

10U_080 5_10V4Z@

10U_080 5_10V4Z@

2

1

CA26

CA26

10U_080 5_10V4Z@

10U_080 5_10V4Z@

RA16

RA16

2

12

C Beep

E

EC_BEEP #33

PCI Beep

Change value for Beep
by A51 demand.
2010/08/31

MIC1_LINE1_R _R

MIC1_LINE1_R _L

MIC_SENSE

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

SPK_L1

2

CA24

CA24
1U_0402 _6.3V6K

1U_0402 _6.3V6K

@

@

1

SPK_L2

SPK_R1

2

CA27

CA27
1U_0402 _6.3V6K

1U_0402 _6.3V6K

@

@

1

SPK_R2

RA7

RA7

1 2

47K_040 2_5%

47K_040 2_5%

RA8

RA8

1 2

47K_040 2_5%

47K_040 2_5%

4.7K_040 2_5%

4.7K_040 2_5%

RA33

RA33

1K_0402 _5%

1K_0402 _5%

1K_0402 _5%

1K_0402 _5%

RA32

RA32

QA1A

QA1A

Beep sound

RA12

RA12

1 2

RA31

RA31

2.2K_040 2_5%

2.2K_040 2_5%

12

12

RA29

RA29

2.2K_040 2_5%

2.2K_040 2_5%

61

2

1

DA7

1

PESD5V0 U2BT_SOT23-3

PESD5V0 U2BT_SOT23-3

SPK_L1
SPK_L2
SPK_R1
SPK_R2

DA6

DA6

1

PESD5V0 U2BT_SOT23-3

PESD5V0 U2BT_SOT23-3

CA13

CA13

MONO_IN

1 2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

CA18

CA18
100P_04 02_50V8J

100P_04 02_50V8J

1

12

12

+MIC1_VRE FO_R

+MIC1_VRE FO_L

RA28 100K_ 0402_5%RA 28 100K_ 0402_5%

@DA7

@

2

3

@

@

2

3

MIC1_R 2 6

MIC1_L 26

JSPK

JSPK

1

1

2

2

3

3

4

4

ACES_85 204-0400N

ACES_85 204-0400N

@

@

RA43 1 00K_0402_5%R A43 100K_040 2_5%

Sense Pin Impedance

39.2K

SENSE A

A A

20K

10K

5.1K

39.2K

20K

10K

5

Codec Signals

PORT-I (PIN 32, 33)

PORT-B (PIN 21, 22)

RT-C (PIN 23, 24)

PO

(PIN 48)

PORT-E (PIN 14, 15)

PO

RT-F (PIN 16, 17)SENSE B

PORT-H (PIN 20)

Function

Headphone out

Ext. MIC

place close to chip

MIC_SENSE SENSE_A

NBA_PLU G26

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

RA10 2 0K_0402_1%RA10 20 K_0402_1%

RA21 3 9.2K_0402_1%RA21 39.2K_04 02_1%

12

Compal Secret Data

Compal Secret Data

200910/9 2010/01/ 23

200910/9 2010/01/ 23

200910/9 2010/01/ 23

3

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

+3VL

SM_SENS E#33

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Wednesday, October 20, 2010

Wednesday, October 20, 2010

Wednesday, October 20, 2010

Date: Sheet of

Date: Sheet of

Date: Sheet of

3

QA1B

QA1B

5

4

Compal Electronics, Inc.

HDA-ALC269/HP/MIC

HDA-ALC269/HP/MIC

HDA-ALC269/HP/MIC

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

1

31 48

31 48

31 48

BACK_SE NSE 26

0.1

0.1

0.1

5

4

3

2

1

IR Emitter Connector

USB20_P 521

D D

+5VS

For ESD

D10

@D10

USB20_P 5_R

USB20_N 5_R

C C

B-CAS Circuit

3

2

PESD5V0 U2BT_SOT23-3

PESD5V0 U2BT_SOT23-3

@

USB20_N 521

EDP@

EDP@

R151 0_0603 _5%

R151 0_0603 _5%

1

12

EDP@

EDP@

R150 0_0402_ 5%

R150 0_0402_ 5%

1 2

L57

4

4

1

1

WCM-2 012-900T_0805

WCM-2 012-900T_0805

R144 0_0402_ 5%

R144 0_0402_ 5%

EDP@

EDP@

C399

C399

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

EDP@

EDP@

1 2

@L 57

@

3

2

3

2

+IR_VCC
USB20_P 5_R
USB20_N 5_R

USB20_P 5_R

USB20_N 5_R

JIR

@J IR

@

1

1

2

2

3

3

GND

4

4

GND

ACES_87 213-0400G

ACES_87 213-0400G

5
6

APA3011 Subwoofer Amplifier

+5VALW

1

2

2.2U_060 3_6.3V4Z

2.2U_060 3_6.3V4Z

INTSPK_SU B+
INTSPK_SU B-

1

CA68

CA68

10U_080 5_10V4Z

10U_080 5_10V4Z

2

CA70

CA70

1 2

LA4 HLMA-160808-3 9NKTLA 4 HLMA-160 808-39NKT
LA5 HLMA-160808-3 9NKTLA 5 HLMA-160 808-39NKT

RA50

RA50

1 2

7.32K_04 02_1%

7.32K_04 02_1%

1 2
1 2

INTSPK_SU B+

1 2

RA48 33K_0402_ 1%RA 48 33K_040 2_1%

1 2

RA49 39K_0402_1%RA49 39K_0402_ 1%

CA71 0.022U_0402_2 5V7KCA71 0.022U_0402_25 V7K

DA3 PJD LC05_SOT23-3@DA3 PJDLC0 5_SOT23-3@

1

2.2N_060 3_100V7K

2.2N_060 3_100V7K

1 2

CA69

CA69

1 2

2

3

2

CA72

CA72

2.2U_060 3_6.3V4Z

2.2U_060 3_6.3V4Z

1

SPK_SUB +
SPK_SUB -

6

3

4

2

CA67

CA67

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

AMP_SUB31

Modify Sub woofer gain & Frequency
R50

：：：：

become 7,32k

It will has 19.1db Gain & Frequency between 9.9hz~500hz

Sub-woofer Conn.

UA8

UA8

VDD

SHUTDOWN#

IN+

IN-

BYPASS

APA3011 XA-TRL_MSOP8

APA3011 XA-TRL_MSOP8

Vo+

Vo-

GND
GND

JSUB

@J SUB

@

1

3

1

NC1

2

4

2

NC2

ACES_85 204-0200N

ACES_85 204-0200N

+3VS

1

5

8

7
9

INTSPK_SU B+

EC_MUTE # 31,33

INTSPK_SU B-

BlueTooth Interface

2

C396

BT@

BT@

C396

BT@

BT@

1

1

C390

C390

BT@

BT@

2

1

C496

C496

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

BT_RESE T#

2

G

G

S

S

D

D

Q28

BT@

Q28

BT@

1 3

AO3413_ SOT23

AO3413_ SOT23

@

@

R398

R398
0_0603_ 5%

0_0603_ 5%

1 2

Bluetooth Connector

JBT

1

1

2

2

3

3

4

4

5

5

G1

6

6

G2

ACES_87 213-0600G

ACES_87 213-0600G

+BT_VCC

@J BT

@

7
8

0.1U_040 2_16V7K

0.1U_040 2_16V7K

BT_ON#22,27

+BT_VCC

BT@

BT@

B B

R445 0_0402_ 5%BT@ R445 0_0402_5%BT@

BT_RST#22

1 2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

C499

BT@C499

BT@

1

2

R362 47K_040 2_5%

R362 47K_040 2_5%

BT@

BT@

(MAX=200mA)

1

C495

C495

4.7U_080 5_10V4Z

4.7U_080 5_10V4Z

2

USB20_P 421
USB20_N 421

BT_DET#22

1 2

0.01U_04 02_25V7K

0.01U_04 02_25V7K

A A

Security Class ification

Security Class ification

Security Class ification

200910/9 2010/01/ 23

200910/9 2010/01/ 23

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/ 23

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

IR/FP/B-CAS/Felica

IR/FP/B-CAS/Felica

IR/FP/B-CAS/Felica

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

1

0.1

0.1

0.1

32 48W ednesday, October 20, 2010

32 48W ednesday, October 20, 2010

32 48W ednesday, October 20, 2010

5

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C436

C436

0.1U_0402_16V4Z

For EMI

CLK_PCI_EC

12

R377

R377

10_0402_5%

10_0402_5%

@

D D

+3VL

C C

+3VL

+3VS

USB_CHG_EN#27,30

B B

@

C443

C443

22P_0402_50V8J

22P_0402_50V8J

@

@

R378

R378
47K_0402_5%

47K_0402_5%

12

12

C444 0 .1U_0402_16V4ZC444 0.1U_0402_16V4Z

RP7

RP7

1 8
2 7
3 6
4 5

2.2K_0804_8P4R_5%

2.2K_0804_8P4R_5%

@

@

1 2

C819 1U_0402_6.3V6K

C819 1U_0402_6.3V6K

@

@

1 2

C820 180P_0402_50V8J

C820 180P_0402_50V8J

1

2

ECRST#

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

R1442

R1442

0_0402_5%

0_0402_5%

1 2

PLT_RST#

Close to EC

0.1U_0402_16V4Z

KSI[0..7]17, 34,35

KSO[0..17]34,35

USB_CHG_EN#_R

SUSP#

CLK_EC19

C437

C437

2

2

GATEA2022

KB_RST#22

SERIRQ17,3 4

LPC_FRAME#17,34

LPC_AD317,34
LPC_AD217,34
LPC_AD117,34
LPC_AD017,34

CLK_PCI_EC2 1

PLT_RST#5,21,2 7,28,29,30,34

EC_SCI#22

HDPLOCK34

KSI[0..7]

KSO[0..17]

EC_SMB_CK11 6,38
EC_SMB_DA11 6,38
EC_SMB_CK213,18,34,35
EC_SMB_DA213,18,34,35

PM_SLP_S3#19

EC_SMI#2 2

ESB_CK35
ESB_DAT35

PCH_SUSPWRDN19

INVT_PWM14

FAN_SPEED15

SM_SENSE#31

E51_TXD27

E51_RXD27

ON/OFFBTN#35

PWR_SUSP_LED#3 5

NUM_LED#34

R991 0_0402_5%@ R991 0_04 02_5%@

CRY1 CRY1_EC
CRY2 CRY2_EC

R992 0_0402_5%@ R992 0_04 02_5%@
R990 0_0402_5%R99 0 0_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C438

C438

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

GATEA20
KB_RST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

CLK_PCI_EC
PLT_RST#
ECRST#
EC_SCI#
HDPLOCK

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

PM_SLP_S3#
SLP_S5#
EC_SMI#
USB_CHG_EN#_R
ESB_CK
ESB_DAT
PCH_SUSPWRDN
INVT_PWM
FAN_SPEED1
SM_SENSE#
E51_TXD
E51_RXD
ON/OFFBTN#
PWR_SUSP_LED#
NUM_LED#

R270

R270

100K_0402_5%

100K_0402_5%

4

1

C439

C439

2

KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

2

1

1000P_0402_50V7K

1000P_0402_50V7K

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6

KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9

12

1

2

+3VL

2

C440

C440

C441

C441
1000P_0402_50V7K

1000P_0402_50V7K

1

U19

U19

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LPC_FRAME#/LFRAME#

5

LPC_AD3/LAD3

7

LPC_AD2/LAD2

8

LPC_AD1/LAD1

10

LPC_AD0/LAD0

12

CLK_PCI_EC/PCICLK

13

PCIRST#/GPIO05

37

EC_RST#/ECRST#

20

EC_SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/SCL0/GPIO44

78

EC_SMB_DA1/SDA0/GPIO45

79

EC_SMB_CK2/SCL1/GPIO46

80

EC_SMB_DA2/SDA1/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

SUS_PWR_DN_ACK/GPIO0D

25

INVT_PWM/PWM2/GPIO11

28

FAN_SPEED1/FANFB0/GPIO14

29

FANFB1/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLK1

123

XCLK0

C1206

C1206
20P_0402_50V8J

20P_0402_50V8J

9

LPC & MISC

LPC & MISC

Int. K/B

Int. K/B
Matrix

Matrix

SM Bus

SM Bus

22

33

96

111

125

VCC

VCC

VCC

VCC

VCC

PWM Output

PWM Output

DA Output

DA Output

PS2 Interface

PS2 Interface

SPI Device I/F

SPI Device I/F

SPI Flash ROM

SPI Flash ROM

GPIO

GPIO

GPIO

GPIO

GPI

GPI

GND

GND

GND

GND

11

24

35

94

113

3

+3VL

C442

C442

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

67

VCC

AVCC

PWM0/GPIO0F

BEEP#/PWM1/GPIO10

FANPWM0/GPIO12

ACOFF/FANPWM1/GPIO13

BATT_TEMP/AD0/GPI38

BATT_OVP/AD1/GPI39

ADP_I/AD2/GPI3A

AD Input

AD Input

EC_MUTE#/PSCLK1/GPIO4A

CAP_INT#/PSCLK2/GPIO4C

WOL_EN/SDICLK/GPXIOA01

ME_EN/SDIMOSI/GPXIOA02

GPO

GPO

GND

AD3/GPI3B
AD4/GPI42
AD5/GPI43

DAC_BRIG/DA0/GPO3C

EN_DFAN1/DA1/GPO3D

IREF/DA2/GPO3E

DA3/GPO3F

USB_EN#/PSDAT1/GPIO4B

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXIOA00

LID_SW#/GPXIOD00

SPIDI/MISO

SPIDO/MOSI

SPICLK/GPIO58

H_PECI/GPIO41

FSTCHG/GPIO50

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

PWR_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXIOA03
EC_LID_OUT#/GPXIOA04

EC_ON/GPXIOA05

EC_SWI#/GPXIOA06

ICH_PWROK/GPXIOA07

BKOFF#/GPXIOA08

RF_OFF#/GPXIOA09

GPXIOA10
GPXIOA11

PM_SLP_S4#/GPXIOD01

ENBKL/GPXIOD02

EAPD/GPXIOD03

EC_THERM#/GPXIOD04

SUSP#/GPXIOD05

PBTN_OUT#/GPXIOD06

EC_PME#/GPXIOD07

AGND

KB930QF-A1_LQFP128_ 14X14

KB930QF-A1_LQFP128_ 14X14

69

SPICS#

GPIO40

V18R

KB_LED

21

EC_BEEP#

23

FANPWM

26

ACOFF

27

BATT_TEMPA

63

TMPTU1_SXP

64

ADP_I

65

ADP_V

66

TMPTU2_SXP

75

HDPACT

76

68
70

IREF

71

CHGVADJ

72

EC_MUTE#

83

USB_EN#

84

CAP_INT#

85

H_PROCHOT#_EC

86

TP_CLK

87

TP_DATA

88

VGATE

97

WOL_EN

98

PWRME_CTRL#

99

LID_SW#

109

EC_SI_SPI_SO

119

EC_SO_SPI_SI

120

SPI_CLK

126

SPI_CS#

128

CIR_IN

73

EC_PECI

74

FSTCHG

89

BATT_FULL_LED#

90

CAPS_LED#

91

BATT_CHG_LOW_LED#

92

PWR_ON_LED#

93

SYSON

95

VR_ON

121

ACIN_D

127

PCH_RSMRST#

100

EC_LID_OUT#

101

EC_ON

102

TP_LED

103

PM_PWROK

104

BKOFF#

105

HDPINT

106

CAP_RST#

107

SA_PGOOD

108

CEC_INT#

110

EC_ENBKL

112

USB_OC#1

114

SLP_CHG#

115

SUSP#

116

PBTN_OUT#

117

USB_OC#0

118

+EC_V18R

124

KB_LED 34
EC_BEEP# 3 1
FANPWM 5
ACOFF 39

BATT_TEMPA 38

ADP_I 38,39
ADP_V 39

HDPACT 34

IREF 39

CHGVADJ 39

EC_MUTE# 31 ,32

USB_EN# 26

CAP_INT# 35

TP_CLK 35

TP_DATA 35

VGATE 19,44

WOL_EN 28
PWRME_CTRL# 1 7

LID_SW# 34

EC_SI_SPI_SO 34
EC_SO_SPI_SI 3 4
SPI_CLK 34
SPI_CS# 34

R461 43_0402_1%R461 43_0402 _1%

1 2

FSTCHG 39

BATT_FULL_LED# 35
CAPS_LED# 34

BATT_CHG_LOW_LED# 35

PWR_ON_LED# 35

SYSON 30,41
VR_ON 44

PCH_RSMRST# 19
EC_LID_OUT# 18
EC_ON 17,35

TP_LED 35

PM_PWROK 5,19

BKOFF# 14

HDPINT 34
CAP_RST# 3 5
SA_PGOOD 42

CEC_INT# 16

EC_ENBKL 14

USB_OC#1 21,27,30

SUSP# 13,17 ,27,36,41,43
PBTN_OUT# 19

USB_OC#0 21,26

C448

C448

4.7U_0805_10V4Z

4.7U_0805_10V4Z

2

VR_HOT#44

H_PECI 5

H_PROCHOT#_EC

BATT_TEMPA

ACIN_D

+3VL

ACIN_D

R737

R737

0_0402_5%

0_0402_5%

12

2

G

G

TV tuner
temperature

TMPTU1_SXP

TMPTU2_SXP

H_PROCHOT#_EC

CEC_INT#

CAP_INT#

TP_CLK

TP_DATA

SYSON

R341 330K_ 0402_5%R34 1 330K_0402_5%

1 2

1

13

D

D

Q41

Q41
2N7002_SOT23-3

2N7002_SOT23-3

S

S

1 2

C445 100P_0402 _50V8JC445 100P_0402_50V8J

1 2

C446 100P_0402 _50V8JC446 100P_0402_50V8J

R754 10K_0 402_5%R754 10K_0402_5 %

1 2

R757 10K_0 402_5%R757 10K_0402_5 %

1 2

R758 10K_0 402_5%

R758 10K_0 402_5%

1 2

R53 100K_0402_5%R53 100K_0402_5%

@

@

1 2

R172 4.7K_0402_5%

R172 4.7K_0402_5%

1 2

R379 4.7K_0402 _5%R379 4.7K_0402_5%

1 2

R381 4.7K_0402 _5%R381 4.7K_0402_5%

1 2

R5 4.7K_ 0402_5%R5 4.7K_040 2_5%

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

SLP_CHG#

SLP_CHG#

SUSP#

VR_ON

12

@

@

12

D21

D21

2 1

R1428 10K_0402_5%R1428 10K_0402_5%

R439 10K_0402_5%@R439 10K_0402 _5%@

R423 10K_0402_5%R423 10K_0402_5%

R462 10K_0402_5%R462 10K_0402_5%

C518

C518
47P_0402_50V8J

47P_0402_50V8J

+3VS

+3VL

+5VS

12

12

12

12

H_PROCHOT# 5 ,38

ACIN 13,19,35,39

+3VALW

+3VALW

C818

C818

12

5

U44

U44

0.1U_0402_16V4Z

PM_SLP_S5#19

PM_SLP_S4#19

1

2

R446 0_0402_5%

R446 0_0402_5%

For Cost reduction need test

A A

1 2

R342 100K_0402_5%R342 100K_0402 _5%

5

0.1U_0402_16V4Z

P

IN1

4

O

IN2

G

SN74AHC1G08DCKR_SC70-5

SN74AHC1G08DCKR_SC70-5

3

@

@

1 2

E51_TXD

SLP_S5#

R389

R389

1 2

10M_0402_5%

10M_0402_5%

1

C449

18P_0402_50V8J

18P_0402_50V8J

1

@C449

@

@

@

2

2

32.768KHZ_12.5PF_Q 13MC14610002

32.768KHZ_12.5PF_Q 13MC14610002

CRY2CRY1

@

@

1

C450

@ C450

@

Y4

Y4

2

OSC4OSC

NC3NC

4

18P_0402_50V8J

18P_0402_50V8J

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF CO MPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF CO MPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF CO MPAL ELECTRONICS, INC.

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

CIR

CIR_IN

+5VL

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Wednesday, October 20 , 2010

Wednesday, October 20 , 2010

Wednesday, October 20 , 2010

+5VL

R748

R748
10K_0402_5%

10K_0402_5%

1 2

CIR@

CIR@

1 2

R750 100_0805_5%

R750 100_0805_5%

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

+5VL_CIR

4.7U_0805_10V4Z

4.7U_0805_10V4Z

CIR@

CIR@

LPC-EC-KB930

LPC-EC-KB930

LPC-EC-KB930

C783

C783

1

2

3

4

1

U45

U45

Vout

VCC

GND

GND

IRM-V538/TR1

IRM-V538/TR1

CIR@

CIR@

33 48

33 48

33 48

0.1

0.1

0.1

SPI Flash (256KB)

+3VL

20mils

1

C451

C451

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

SPI_CLK33

EC_SO_S PI_SI33

2

SPI_CS#

SPI_CLK

EC_SO_S PI_SI EC_SI_SPI_SO

SPI_CLK

Keyboard LED

+5VS

12

R587

R587

10K_040 2_5%

10K_040 2_5%

KBL@

KBL@

13

D

D

KB_LED3 3

2

G

G

S

S

KEYBOARD CONN.

KSI[0..7]

KSO[0..17]

JKB

JKB

34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

ACES_88 170-3400

ACES_88 170-3400

@

@

KSI[0..7] 17,33,35

KSO[0..17] 3 3,35

JKB34
KSO16

KSO17

KSO2
KSO1
KSO0
KSO4
KSO3
KSO5
KSO14
KSO6
KSO7
KSO13
KSO8
KSO9
KSO10
KSO11
KSO12
KSO15
KSI7
KSI2
KSI3
KSI4
KSI0
KSI5
KSI6
KSI1
JKB4

CAPS_LE D#

NUM_LED #

1 2

R372 300_ 0402_5%R372 300_04 02_5%

R376 300_ 0402_5%R376 300_04 02_5%

8

3

7

1

6

5

W25X 10BVSNIG_SO8

W25X 10BVSNIG_SO8

R394

R394

1 2

10_0402 _5%

10_0402 _5%

@

@

Q38

Q38
AO3413_ SOT23

AO3413_ SOT23

KBL@

KBL@

D

S

D

S

13

G

G

2

Q52

Q52
2N7002_ SOT23-3

2N7002_ SOT23-3

KBL@

KBL@

12

+3VS

U22

U22

VCC

VSS

W

HOLD

S

C

Q

D

1 2

C454 10P_0402_50 V8J

C454 10P_0402_50 V8J

For EMI

+5VS_LE D

1

C836

C836

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

KBL@

KBL@

+3VS

CAPS_LE D# 3 3

NUM_LED # 33

Lid SW

12

R543 0_04 02_5%R543 0_040 2_5%

@

@

12

R565 0_04 02_5%

R565 0_04 02_5%

4

U21

U21
APX9132 ATI-TRL_SOT23-3

APX9132 ATI-TRL_SOT23-3

VDD2VOUT

2

@

@

EC_SI_SPI_SO 3 3

1

C453

C453

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

GND

1

10P_040 2_50V8J

10P_040 2_50V8J

12

R383

R383
47K_040 2_5%

47K_040 2_5%

3

C452

C452

LID_SW # 33SPI_CS#33

1

2

LPC Debug Port

+3VALW

+3VL

SERIRQ17,33

LPC_AD317,33

LPC_AD117,33

LPC_FRA ME#17,3 3

Place the PAD under DDR DIMM.

+3VS

H7

7

8

9

10

DEBUG_P AD

DEBUG_P AD

@H7

@

56

4

3

2

1

R393

R393
22_0402 _5%

22_0402 _5%

@

@

1 2
2

C457

C457
22P_040 2_50V8J

22P_040 2_50V8J

1

@

@

PLT_RST # 5,21 ,27,28,29,30,33

LPC_AD2 17 ,33

LPC_AD0 17 ,33

CLK_PCI_D DR 21

For EMI

UG1

GSENSOR @UG1

KSO16

KSO17

KSO2

KSO1

KSO0

KSO4

KSO3

KSO5

KSO14

KSO6

KSO7

KSO13

KSO8

KSO9

KSO10

KSO11

KSO12

KSO15

KSI7

KSI2

KSI3

KSI4

KSI0

KSI5

KSI6

KSI1

CAPS_LE D#

NUM_LED #

JBLG

JBLG

1

1

2

2

3

3

4

4

5

GND

6

GND

ACES_85 201-0405N

ACES_85 201-0405N

@

@

For EMI

Close to JKB

1 2

C401 100P_04 02_50V8JC401 100P_04 02_50V8J

1 2

C402 100P_04 02_50V8JC402 100P_04 02_50V8J

1 2

C404 100P_04 02_50V8JC404 100P_04 02_50V8J

1 2

C405 10 0P_0402_50V8 JC4 05 100P_0402 _50V8J

1 2

C406 100P_04 02_50V8JC406 100P_04 02_50V8J

1 2

C407 10 0P_0402_50V8 JC4 07 100P_0402 _50V8J

1 2

C408 100P_04 02_50V8JC408 100P_04 02_50V8J

1 2

C409 10 0P_0402_50V8 JC4 09 100P_0402 _50V8J

1 2

C410 10 0P_0402_50V8 JC4 10 100P_0402 _50V8J

1 2

C411 100P_04 02_50V8JC411 100P_04 02_50V8J

1 2

C412 10 0P_0402_50V8 JC4 12 100P_0402 _50V8J

1 2

C413 100P_04 02_50V8JC413 100P_04 02_50V8J

1 2

C415 100P_04 02_50V8JC415 100P_04 02_50V8J

1 2

C416 10 0P_0402_50V8 JC4 16 100P_0402 _50V8J

1 2

C417 100P_04 02_50V8JC417 100P_04 02_50V8J

1 2

C418 10 0P_0402_50V8 JC4 18 100P_0402 _50V8J

1 2

C419 100P_04 02_50V8JC419 100P_04 02_50V8J

1 2

C420 100P_04 02_50V8JC420 100P_04 02_50V8J

1 2

C421 10 0P_0402_50V8 JC4 21 100P_0402 _50V8J

1 2

C422 10 0P_0402_50V8 JC4 22 100P_0402 _50V8J

1 2

C423 100P_04 02_50V8JC423 100P_04 02_50V8J

1 2

C424 10 0P_0402_50V8 JC4 24 100P_0402 _50V8J

1 2

C425 10 0P_0402_50V8 JC4 25 100P_0402 _50V8J

1 2

C427 10 0P_0402_50V8 JC4 27 100P_0402 _50V8J

1 2

C429 100P_04 02_50V8JC429 100P_04 02_50V8J

1 2

C431 100P_04 02_50V8JC431 100P_04 02_50V8J

1 2

C433 100P_04 02_50V8JC433 100P_04 02_50V8J

1 2

C435 100P_04 02_50V8JC435 100P_04 02_50V8J

+5VS_LE D

G-Sensor

RG2

@RG 2

@

12

0_0603_ 5%

0_0603_ 5%

+5VS +3VS_ HDP

2

CG12

CG12

1U_0402 _6.3V6K

1U_0402 _6.3V6K

GSENSOR @

GSENSOR @

1

+3VS_HD P

HDPINT33

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DG1 CH751H-40PT_S OD323-2

DG1 CH751H-40PT_S OD323-2

UG3

1

VIN

2

GND

3

SHDN#

G9191-33 0T1U_SOT23-5

G9191-33 0T1U_SOT23-5

EC_SMB_ CK213,18,33,35

HDPINT

+3VS_HD P+3VS

GSENSOR @

GSENSOR @

21

GSENSOR @UG3

GSENSOR @

5

VOUT

BP

RG3

RG3

RG4

RG4

RG5

RG5

RG6 4 .7K_0402_5%

RG6 4 .7K_0402_5%

GSENSOR @

GSENSOR @

RG7 1 K_0402_5%

RG7 1 K_0402_5%

GSENSOR @

GSENSOR @

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

CG14

CG14

4

0.22U_04 02_6.3V4K

0.22U_04 02_6.3V4K

SELF_TE ST

4.7K_040 2_5%GS ENSOR@

4.7K_040 2_5%GS ENSOR@

4.7K_040 2_5%GS ENSOR@

4.7K_040 2_5%GS ENSOR@

4.7K_040 2_5%GS ENSOR@

4.7K_040 2_5%GS ENSOR@

12

12

1

CG7

CG7

GSENSOR @

GSENSOR @

200910/9 2010/01/ 23

200910/9 2010/01/ 23

200910/9 2010/01/ 23

2

+3VS_HD P

+3VS_HD P

2

CG13

CG13
1U_0402 _6.3V6K

1U_0402 _6.3V6K

1

GSENSOR @

GSENSOR @

12

1

2

12

GXOUT

12

GXIN

12

3

4

5

6

7

8

9

10

1

CG8

CG8

GSENSOR @

GSENSOR @

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

SELF_TE ST

UG5

UG5

P3_5/SSCK/SCL/CMP1_2

P3_7/CNTR0#/SSO/TXD1

RESET#

XOUT/P4_7

VSS/AVSS

XIN/P4_6

VCC/AVCC

MODE

P4_5/INT0#/RXD1

P1_7/CNTR00/INT10#

2

Vdd1

12

Vdd2

4

ST

6

PD

8

FS

9

Rev

TSH35TR _LGA16

TSH35TR _LGA16

Place UG1 and UG4
on TOP Layer

R5F211B 4D34SP G SENSOR@

R5F211B 4D34SP G SENSOR@

GSENSOR @

3

Voutx

5

Vouty

7

Voutz

10

NC1

11

NC2

14

NC3

15

NC4

16

NC5

1

GND1

13

GND2

P1_5/RXD0/CNTR01/INT11#

P1_3/KI3#/AN11/TZOUT

P1_2/KI2#/AN10/CMP0_2

P1_1/KI1#/AN9/CMP0_1

P1_0/KI0#/AN8/CMP0_0

P3_3/TCIN/INT3#/SSI00/CMP1_0

P3_4/SCS#/SDA/CMP1_1

GSENSOR @

GSENSOR @

VOUTX

CG1 0 .033U_0402_16 V7K

CG1 0 .033U_0402_16 V7K

1 2

VOUTY

CG2 0 .033U_0402_16 V7K

CG2 0 .033U_0402_16 V7K

1 2

GSENSOR @

VOUTZ

GSENSOR @

CG3 0 .033U_0402_16 V7K

CG3 0 .033U_0402_16 V7K

1 2

GSENSOR @

GSENSOR @

Reserve for 2nd Source

CG9 0.1U_0402_16V 4Z

CG9 0.1U_0402_16V 4Z

@

@

CG10 0.1U_0 402_16V4Z

CG10 0.1U_0 402_16V4Z

@

@

CG11 0.1U_ 0402_16V4Z

CG11 0.1U_ 0402_16V4Z

@

@

+3VS_HD P

SELF_TE ST

P1_6/CLK0/SSI01

11

12

13

P1_4/TXD0

14

15

16

P4_2/VREF

17

18

19

20

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SPI ROM/LID/Debug/KB/G-Sen

SPI ROM/LID/Debug/KB/G-Sen

SPI ROM/LID/Debug/KB/G-Sen

Wednesday, October 20, 2010

Wednesday, October 20, 2010

Wednesday, October 20, 2010

UG4

VOUTX

12

2

XOUT

VOUTY

3

12

YOUT

VOUTZ

4

12

ZOUT

9

0G-DET

7

SLEEP#

10

G-SELECT

13

ST

MMA7360 LR2_LGA14

MMA7360 LR2_LGA14

RG9

RG9
47K_040 2_5%

47K_040 2_5%

GSENSOR @

GSENSOR @

1 2

VOUTZ

VOUTX

VOUTY

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

VDD

NC
NC
NC
NC
NC

VSS

HDPACT 33

HDPLOCK 33

RG10 47K_0 402_5%

RG10 47K_0 402_5%

12

GSENSOR @

GSENSOR @

+3VS_HD P

1

CG6

CG6

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

GSENSOR @

GSENSOR @

2

EC_SMB_ DA2 13 ,18,33,35

@UG4

@

6

1
8
11
12
14

5

34 48

34 48

34 48

+3VS_HD P

of

0.1

0.1

0.1

5

Power Button

For debug

SW4

SW4

1

TOP side

D D

BTM side

2

SMT1-05-A_4P

SMT1-05-A_4P

5

6

SW3

SW3

1

2

SMT1-05-A_4P

SMT1-05-A_4P

5

6

JPOWER

JPOWER

ACES_85201-040 5N

ACES_85201-040 5N

@

@

3

4

3

4

1
2
3

4
G1
G2

+3VL

For EMI request

PWR_ON_LE D#

1
2

ON/OFFBTN#

3
4
5
6

R395

R395

100K_0402_5 %

100K_0402_5 %

1 2

ON/OFFBTN#

1

C458

C458

0.1U_0402_25 V6

0.1U_0402_25 V6

@

@

2

1 2

R22 90.9_0402_1%R22 90.9_04 02_1%

EC_ON17,33

10K_0402_5%

10K_0402_5%

ON/OFFBTN# 33

+3VALW

R396

R396

1 2

ON/OFFBTN#

PWR_ON_LE D#

61

Q7A

Q7A
2N7002DW -T/R7_SOT363-6

2N7002DW -T/R7_SOT363-6

2

4

51_ON# 37

D83

D83

2

1

3

PJSOT05C_SOT2 3-3

PJSOT05C_SOT2 3-3

3

Caps Sensor/Light Sensor Conn.

JCS

JCS

@

@

ESB_DAZ
ESB_CKZ
CAP_INT#
CAP_RST#

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

GND

12

GND

ACES_87056-010 01-001

ACES_87056-010 01-001

+5VALW

FBMA-11-100505-30 1T_0402

ESB_DAT33

ESB_CK33
CAP_INT#33
CAP_RST#33

FBMA-11-100505-30 1T_0402

FBMA-11-100505-30 1T_0402

FBMA-11-100505-30 1T_0402

L13

L13
L14

L14

EC_SMB_CK213,18,33,34
EC_SMB_DA213,18,33,34

+3VL
+3VS

1 2
1 2

For EMI

C260

@C260

ESB_DAZ

ESB_CKZ

R428

@ R428

@

1 2

100_0402_5 %

100_0402_5 %

R427

@ R427

@

1 2

100_0402_5 %

100_0402_5 %

@

1 2

100P_0402_5 0V8J

100P_0402_5 0V8J

C261

@C261

@

1 2

100P_0402_5 0V8J

100P_0402_5 0V8J

2

Touchpad & Light Pipe Connector

+5VS

TP_CLK3 3

USB20_N8

TP_DATA33

USB20_N821
USB20_P821

KSI617,33,34
KSO033,34

TP_LED33

TP_LED#
KSI6
KSO0

3

Q7B2N 7002DW-T/R7_S OT363-6 Q7 B2N7002D W-T/R7_SOT363-6

5

4

+3VS

R147

R147

1 2

0_0603_5%

0_0603_5%

FP@

FP@

+3VS_FP

USB20_P8

1

Finger Printer

C484

C484

0.1U_0402_16 V4Z

0.1U_0402_16 V4Z

FP@

FP@

2

D85

FP@D85

FP@

2

4

IO1

VIN

1

3

GND

IO2

CM1293A-02SR SOT 143-4

CM1293A-02SR SOT 143-4

For ESD

1

+3VS_FP
USB20_N8
USB20_P8

JTPL

JTPL

@

@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

GND

12

GND

ACES_87056-010 01-001

ACES_87056-010 01-001

Screw Hole

H8

H8

H9

H5

H5

H6

DC-IN LED

2

DC_IN

6 1

Q209A

Q209A
2N7002DW -T/R7_SOT363-6

6 1

5

Q9A

Q9A
2N7002DW -T/R7_SOT363-6

2N7002DW -T/R7_SOT363-6

4

@

@

1 2

R50 0_0402_5%

R50 0_0402_5%

2N7002DW -T/R7_SOT363-6

2

C C

HDD LED

R404

R404

+5VS

HDD_LED#

12

10K_0402_5%

10K_0402_5%

3

Q9B 2N7 002DW-T/R7_SOT 363-6Q9B 2N7002DW-T /R7_SOT363-6

ACIN 13,19,33,39

SATA_LED# 17

WiMAX LED

WIMAX_LED_GND#

+5VS

WIMAX_LED_GND#

R506

R506

1 2

0_0402_5%

0_0402_5%

@

@

R819

R819

12

10K_0402_5%

10K_0402_5%

5

WIMAX@

WIMAX@

3

Q156B 2N7002DW -T/R7_SOT363-6

Q156B 2N7002DW -T/R7_SOT363-6

WIMAX@

WIMAX@

2

6 1

Q156A

Q156A
2N7002DW -T/R7_SOT363-6

2N7002DW -T/R7_SOT363-6

WIMAX@

WIMAX@

4

LED_WIMAX# 27

VGA

CPU

H6

H_3P0

H_3P0

H_3P0

H_3P0

@

@

@

@

1

1

H14

H14

H17

H17

H_3P3

H_3P3

H_3P3

H_3P3

@

@

@

@

1

1

H3

H3

H2

H2

H20

H20

H_1P2

H_1P2

H_1P2

H_1P2

@

@

@

@

1

1

H21

H21

H_7P0x7P5

H_7P0x7P5

H_7P0

H_7P0

@

@

@

@

1

1

H9

H_3P0

H_3P0

H_3P0

H_3P0

@

@

@

@

1

1

H26

H26

H_3P6N

H_3P6N

@

@

1

H22

H22

H23

H23

H_7P0x7P5

H_7P0x7P5

@

@

1

1

H_7P5

H_7P5

@

@

H11

H11

H12

H10

H10

H_3P0

H_3P0

@

@

1

H12

H13

1

H_3P0

H_3P0

@

@

H13

H_9P0

H_9P0

@

@

1

H_3P0

H_3P0

@

@

1

MINI CARD -- JET

H16

H16

H15

H15

H_3P7

H_3P7

H_3P7

H_3P7

@

@

@

@

1

1

MINI CARD -- WLAN

H19

H19

H_3P7

H_3P7

@

@

1

B B

LED/B Connector

JLED

@JLED

@

1

1

2

2

WIMAX_LED_GND#

3

3

WL_BT_L ED#

4

4

5

5

PWR_ON_LE D#

6

6

PWR_SUSP_ LED#

7

7

8

8

CR_LEDCON#

9

9

BATT_FULL_LED #

10

10

BATT_CHG_LOW _LED#

11

11

12

12

13

GND

14

GND

ACES_88058-120 N

ACES_88058-120 N

A A

5

4

DC_IN

HDD_LED#

+3VALW
+3VS

WL_BT_L ED# 22

PWR_ON_LE D# 33
PWR_SUSP_ LED# 33

CR_LEDCON# 29
BATT_FULL_LED # 33
BATT_CHG_LOW _LED# 3 3

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPER TY OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPER TY OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPER TY OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL
AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, IN C.

Issued Date

Issued Date

Issued Date

3

Compal Secret Data

Compal Secret Data

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

PCB Fedical Mark PAD

FD2@FD2

FD3@FD3

FD1@FD1

@

@

1

FD4@FD4

@

@

1

1

1

ISPD

U2

Q65R1@U2

Q65R1@

ZZZ

ZZZ

PCH

PCH

U2

PCH

PCH

U2

PCH

PCH

2

PCB LA-7191P

PCB LA-7191P

Q67R1@U2

Q67R1@

PJP1

PJP1

PJP1

Q67R3@U2

Q67R3@

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

45@PJP1

45@

Compal Electronics, Inc.

PWR/Cap./TP/LED/LP/LS/Screw

PWR/Cap./TP/LED/LP/LS/Screw

PWR/Cap./TP/LED/LP/LS/Screw

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

Wednesday, October 20, 2010

Wednesday, October 20, 2010

Wednesday, October 20, 2010

35 48

35 48

35 48

1

0.1

0.1

0.1

A

+3VALW TO +3VS

+3VALW +3VS

Q29

Q29

1

8

S

D

2

7

S

D

3

6

S

D

4

5

G

1 1

SI4800BDY_SO8

SI4800BDY_SO8

1

C465

C465

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

D

0.022U_0402_25V7K

0.022U_0402_25V7K

Vgs=10V,Id=9A,Rds=18.5mohm

1

C459

C459

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

12

C466

C466

R412

R412
330K_0402_5%

330K_0402_5%

2

1

C460 4.7U_0805_10V4ZC460 4.7U_0805_10V4Z

2

R409

R409

1 2

61

+VSB

47K_0402_5%

47K_0402_5%

Q10A

Q10A

SUSP SUSP SUSP

2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

R406

R406

470_0805_5%

470_0805_5%

1 2
3

Q10B

Q10B

5

4

+5VALW

4.7U_0805_10V4Z

4.7U_0805_10V4Z

1

2

B

Q30

Q30

8

D

7

D

6

D

5

G

D

SI4800BDY_SO8

SI4800BDY_SO8

C467

C467

S
S
S

1

1U_0402_6.3V6K

1U_0402_6.3V6K

2
3
4

1

C468

C468

2

0.01U_0402_25V7K

0.01U_0402_25V7K

+5VALW TO +5VS

Vgs=10V,Id=9A,Rds=18.5mohm

+5VS

4.7U_0805_10V4Z

4.7U_0805_10V4Z

C461

C461

12

R413

R413
200K_0402_5%

200K_0402_5%

@

@

1

2

1

C462

C462

2

R410

R410

1 2

61

+VSB

47K_0402_5%

47K_0402_5%

Q11A

Q11A

2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

5

R407

R407

C

D

E

+1.5V to +1.5VS

+5VS

For EMI

2

2

C822

C822

C821

470_0805_5%

470_0805_5%

1 2
3

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Q11B

Q11B

4

C821

@

@

@

@

1

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.5V

Vgs=10V,Id=14.5A,Rds=6mohm

Q31

Q31

8

D

7

D

6

D

5

D

FDS6676AS_SO8

FDS6676AS_SO8

1

C469

C469

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

+1.5VS

1

C463

C463

1

S

2

S
S

G

3
4

1

C470

C470

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_25V6

0.1U_0402_25V6

12

R414

R414
820K_0402_5%

820K_0402_5%

4.7U_0805_10V4Z

4.7U_0805_10V4Z

C464

C464

R411

R411

1 2

220K_0402_5%

220K_0402_5%

61

Q12A

Q12A

2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

1

2

+VSB

R408

R408

470_0805_5%

470_0805_5%

1 2
3

Q12B

Q12B

5

4

+1.8VS

1 2

13

D

D

S

S

R470

R470
470_0805_5%

470_0805_5%

Q190

Q190

SUSP

2

G

G

2N7002_SOT23-3

2N7002_SOT23-3

For S3 CPU Power Saving

+3VALW

R425

R425
100K_0402_5%

100K_0402_5%

1 2

3

Q44B

Q44B
2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

5

4

Q44A

Q44A

0.75VR_EN

61

2

2 2

VCCPPWRGD42,43

1 2

R158 100K_0402_5%R158 100K_0402_5%

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

SUSP

+3VS to +3VS_DGPU

+3VALW

2

C491

R426

R426

OPT@

OPT@

OPT@

OPT@

C491

0.1U_0402_16V7K

0.1U_0402_16V7K

OPT@

OPT@

1

AO3413_SOT23

AO3413_SOT23

2

C492

C492

0.01U_0402_25V7K

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

4.7U_0805_10V4Z

R433

R433
100K_0402_5%

100K_0402_5%

OPT@

OPT@

3 3

DGPU_PWR_EN13,21

DGPU_PWR_EN#

1 2

1 2

47K_0402_5%

47K_0402_5%

61

Q206A

Q206A

OPT@

OPT@

2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

+3VS

Vgs=-4.5V,Id=3A,Rds<97mohm

12

S

S

R104

R104
0_0805_5%

0_0805_5%

DIS@

DIS@

D

D

1 3

1

1

C684

C684
1U_0402_6.3V6K

1U_0402_6.3V6K

2

OPT@

OPT@

2

OPT@

OPT@

C683

C683

Q54

Q54

G

G

2

@

@

+3VS_DGPU

470_0805_5%

470_0805_5%

OPT@

OPT@

Q206B

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

Q206B

OPT@

OPT@

+3VS_DGPU

R458

R458

1 2
3

4

DGPU_PWR_EN#

5

0.75VR_EN# 43

+5VS_ODD

R457

R457

470_0805_5%

470_0805_5%

1 2
61

Q53A

Q53A

2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

ODD_EN#22

ODD_EN#

SUSP5,9,43

SUSP#13,17,27,33,41,43

+3VS

5

4

Q53B

Q53B

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

+5VALW

R422

R422
100K_0402_5%

100K_0402_5%

1 2

SUSP

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

13

D

D

Q6

Q6

2

@

@

G

G

2N7002_SOT23-3

2N7002_SOT23-3

S

S

+5VS TO +5VS_ODD

+5VS

R441

R441
10K_0402_5%

10K_0402_5%

R440

R440

1 2

3

1 2

47K_0402_5%

47K_0402_5%

Q208B

Q208B

2

C471

C471

0.1U_0402_16V7K

0.1U_0402_16V7K

1

2

AO3413_SOT23

AO3413_SOT23

C217

C217

0.01U_0402_25V7K

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

4.7U_0805_10V4Z

+0.75VS

R421

R421

22_0805_5%

22_0805_5%

1 2

3

SUSP

5

4

+5VS

Vgs=-4.5V,Id=3A,Rds<97mohm

2

S

S

Q45

C679

C679

Q45

G

G

2

@

@

2

1

D

D

1 3

1

1

2

+1.05VS_VCCP

2

PJ28

PJ28
JUMP_43X79

JUMP_43X79

@

@

1

C680

C680
1U_0402_6.3V6K

1U_0402_6.3V6K

2

R468

R468
470_0805_5%

470_0805_5%

1 2

61

Q208A

Q208A
2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

+5VS_ODD

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet

D

Date: Sheet

DC-DC INTERFACE

DC-DC INTERFACE

DC-DC INTERFACE

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

PGRAA LA-7191P M/B

Wednesday, October 20, 2010

Wednesday, October 20, 2010

Wednesday, October 20, 2010

0.1

0.1

36 48

36 48

E

36 48

0.1

of

of

A

PL1

@

@

PJP3

PJP3

1

+

2

+

3

1 1

2 2

-

4

-

SINGA_2DW -0005-B03

SINGA_2DW -0005-B03

BATT+

51_ON#35

PF1

PF1

21

10A_125V_451010MRL

10A_125V_451010MRL

PD4

PD4

12

RLS4148_LL34-2

RLS4148_LL34-2

PR10

PR10

100K_0402_1%

100K_0402_1%

PR11

PR11

1 2

22K_0402_1%

22K_0402_1%

12

DC_IN_S2 N3DC_IN_S1

12

PC1

PC1

1000P_0402_50V7K

1000P_0402_50V7K

12

PC6

PC6

0.22U_0603_25V7K

0.22U_0603_25V7K

N1

PL1

SMB3025500YA_2P

SMB3025500YA_2P

1 2

12

PC2

PC2

100P_0402_50V8J

100P_0402_50V8J

PQ4

PQ4

TP0610K-T1-E3_SOT23- 3

TP0610K-T1-E3_SOT23- 3

2

12

PR8

PR8

68_1206_5%

68_1206_5%

13

B

PC3

PC3

1000P_0402_50V7K

1000P_0402_50V7K

VIN

PD3

PD3

RLS4148_LL34-2

RLS4148_LL34-2

1 2

12

12

PC5

PC5

0.1U_0603_25V7K

0.1U_0603_25V7K

12

PR9

PR9
68_1206_5%

68_1206_5%

VIN

C

1 2

PR1

PR1

1K_1206_5%

PD1

PD1

VIN

12

PC4

PC4

100P_0402_50V8J

100P_0402_50V8J

VL

EN040

ACON39

100K_0402_1%

100K_0402_1%

PD2

PD2
RB715F_SOT323-3

RB715F_SOT323-3

2

3

1000P_0402_50V7K

1000P_0402_50V7K

RLS4148_LL34-2

RLS4148_LL34-2

PR4

PR4

1 2

1

PC16

PC16

12

LM393DG_SO8

LM393DG_SO8

12

VS

N1

8

PU2A

PU2A

P

+

1

O

-

LM393DG_SO8

LM393DG_SO8

G

4

1K_1206_5%

1 2

1K_1206_5%

1K_1206_5%

1 2

1K_1206_5%

1K_1206_5%

2.2M_0402_5%

2.2M_0402_5%

N1

8

PU2B

PU2B

P

+

7

O

-

G

4

PC13

PC13

1000P_0402_50V7K

1000P_0402_50V7K

3

2

PR2

PR2

PR5

PR5

PR3

PR3

5

6

12

12

PR6

PR6

12

34K_0402_1%

34K_0402_1%

39

PR7

@PR7

@

66.5K_0402_1%

66.5K_0402_1%

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

12

6251VREF

PQ1

PQ1

12

PR36

PR36
150K_0402_1%

150K_0402_1%

13

D

D

S

S

2

G

G

D

12

PR38

PR38
511K_0402_1%

511K_0402_1%

12

PR35

PR35
255K_0402_1%

255K_0402_1%

47K_0402_1%

47K_0402_1%

13

PQ2

PQ2
DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR39

PR39

2

B+

12

PC14

PC14
1000P_0402_50V7K

1000P_0402_50V7K

12

+5VALWP

PACIN 39

@

@

PJ152

PJ152

2

@

@

PJ332

PJ332

2

JUMP_43X118

JUMP_43X118

PJ352

@ PJ352

@

2

JUMP_43X118

JUMP_43X118

PJ182

@ PJ182

@

2

JUMP_43X118

JUMP_43X118

PJ452

@ PJ452

@

2

112

JUMP_43X118

JUMP_43X118

112

112

112

+3VALW

+5VALW

+1.8VS+1.8VSP

+VCCSA+VCCSAP

+1.5VP

(7.5A, 300mils ,Via NO.= 15)
OCP=9.09A

+1.05VS_VCCPP +1.05VS_VCCP

(17A,680mils ,Via NO.=34)
OCP=21.81A

+GFX_COREP

(33A,1320mils ,Via NO.=66)
OCP=40A

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

+5VL

+0.75VS

+3VALWP

(5A,200mils ,Via NO.= 10)
OCP=7.7A

+5VALWP

(5A,200mils ,Via NO.= 10)
OCP=7.9A

(1.65A,70mils ,Via NO.= 4)
OCP=4.2A

(6A,240mils ,Via NO.= 12)
OCP=7.69A

PJ333

@ PJ333

3 3

+3VLP +3VL

(100mA,40mils ,Via NO.= 2)

VL

+VSBP +VSB

@

2

JUMP_43X39

JUMP_43X39

PJ353

@ PJ353

@

2

JUMP_43X39

JUMP_43X39

PJ72

PJ72

@

@

2

JUMP_43X39

JUMP_43X39

112

112

112

(120mA,40mils ,Via NO.= 1)

PJ76

@ PJ76

@

+0.75VSP

(1A,40mils ,Via NO.= 2)

4 4

2

JUMP_43X79

JUMP_43X79

112

A

JUMP_43X118

JUMP_43X118

@

@

2

JUMP_43X118

JUMP_43X118

@ PJ402

@

2

JUMP_43X118

JUMP_43X118

@ PJ403

@

2

JUMP_43X118

JUMP_43X118

@

@

2

JUMP_43X118

JUMP_43X118

@ P J503

@

2

JUMP_43X118

JUMP_43X118

Issued Date

Issued Date

Issued Date

PJ153

PJ153

PJ402

PJ403

PJ502

PJ502

PJ503

112

112

112

112

+1.5V

RTC Battery

PBJ1

PBJ1

- +

MAXEL_ML1220T10@

MAXEL_ML1220T10@

12

PR13

PR13

560_0603_5%

560_0603_5%

1 2

PR17

PR17

560_0603_5%

560_0603_5%

1 2

+RTCBATT

+RTCBATT

SP093MX0000

112

112

+GFX_CORE

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

2009/04/282009/11/13

2009/04/282009/11/13

2009/04/282009/11/13

ACIN

Precharge detector

Min. typ. Max.
H-->L 14.42V 14.74V 15.23V
L-->H 15.39V 15.88V 16.39V

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Date: Sheet

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DCIN/VIN DECTOR

DCIN/VIN DECTOR

DCIN/VIN DECTOR

PGRAA LA-7191P M/B

37 48Wednesday, October 20, 2010

37 48Wednesday, October 20, 2010

D

37 48Wednesday, October 20, 2010

of

0.1

0.1

0.1

A

B

C

D

1 1

@

@

PJP2

PJP2

1

1

2

2

3

3

4

4

5

5
GND
GND
GND
GND

6

6

7

7

8

8

9

9

10
11
12
13

SUYIN_200045MR009G171ZR

SUYIN_200045MR009G171ZR

2 2

3 3

EC_SMCA

PR20

PR20

100_0402_1%

100_0402_1%

BATT_S1

BATT_P4
BATT_P5
EC_SMDA

1 2

1

2

VL

PR25

PR25

100K_0402_1%

100K_0402_1%

POK19,40

1 2

.1U_0402_16V7K

.1U_0402_16V7K

PD5

PD5

PJSOT24C_SOT23-3

PJSOT24C_SOT23-3

3

PR21

PR21
100_0402_1%

100_0402_1%

1 2

PR26

PR26

1 2

0_0402_5%

0_0402_5%

PC12

@ PC12

@

PF2

PF2

21

15A_65V_451015MRL

15A_65V_451015MRL

12

PR14

PR14
1K_0402_1%

1K_0402_1%

PD6

PD6

PJSOT24C_SOT23-3

PJSOT24C_SOT23-3

2

3

12

PR19

PR19

1K_0402_1%

1K_0402_1%

B+

13

2

G

G

12

1

6.49K_0402_1%

6.49K_0402_1%

PR24

PR24

1 2

22K_0402_1%

22K_0402_1%

D

D

PQ6

PQ6
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

PR16

PR16

12

12

PR23

PR23

100K_0402_1%

100K_0402_1%

VMB

12

PC15

@ PC15

@

.1U_0402_16V7K

.1U_0402_16V7K

TP0610K-T1-E3_SOT23- 3

TP0610K-T1-E3_SOT23- 3

12

PC10

PC10

@

@

0.22U_0603_25V7K

0.22U_0603_25V7K

+3VL

BATT_TEMPA 33

EC_SMB_DA1 16,33

EC_SMB_CK1 16,33

PQ5

PQ5

2

SMB3025500YA_2P

SMB3025500YA_2P

1 2

12

PC7

PC7

1000P_0402_50V7K

1000P_0402_50V7K

13

PL2

PL2

12

PC11

0.1U_0603_25V7K

0.1U_0603_25V7K

@PC11

@

12

PC8

PC8

0.01U_0402_25V7K

0.01U_0402_25V7K

+VSBP

BATT+

H_PROCHOT#5,33

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

Rset = 3 * Rtmh
Rhyst = (Rset* Rtml) / (3*Rtml - Rset)

Rtmh at 90C = 7.87K, Rtml at 56C = 26.1K
Rset = 3 * 7.87K = 23.61K ==> 23.7K
Rhyst = (23.7K * 26.1K) / (3 * 26.1K - 23.7K) = 11.33K ==> 11.3K

VL

0.1U_0603_25V7K

0.1U_0603_25V7K

PQ7

PQ7

CPU thermal protection at 90 degree C
Recovery at 56 degree C

12

PC9

PC9

PU1

PU1

1

VCC

2

GND

VS_ON40

+3VS

12

PR29

PR29
100K_0402_1%

100K_0402_1%

13

D

D

2

G

G

S

S

3

OT1

4

OT2

G718TM1U_SOT23-8

G718TM1U_SOT23-8

Adaptor protection

Adaptor

Throttling point

120W 170W

8

TMSNS1

7

RHYST1

6

TMSNS2

5

RHYST2

6.34K_0402_1%

6.34K_0402_1%

ADP_I Recovery point ADP_I

2.67V 115W 1.80V

PR27

PR27

12

12

PR15

PR15

23.7K_0402_1%

23.7K_0402_1%

PR18

PR18

11.3K_0402_1%

11.3K_0402_1%

1 2

PR22

PR22

4.42K_0402_1%

4.42K_0402_1%

12

PR28

PR28
10K_0402_1%

10K_0402_1%

12

PH1

PH1

100K_0402_1%_NCP15W F104F03RC

100K_0402_1%_NCP15W F104F03RC

12

ADP_I 33,39

PH1 under CPU botten side :

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

2009/04/282009/11/13

2009/04/282009/11/13

2009/04/282009/11/13

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

BATTERY CONN / OTP

BATTERY CONN / OTP

BATTERY CONN / OTP

PGRAA LA-7191P M/B

D

38 48Wednesday, October 20, 2010

38 48Wednesday, October 20, 2010

38 48Wednesday, October 20, 2010

0.1

0.1

0.1

A

B

C

D

@

@

@

PC207

PC207

PQ203

PQ203

AO4407A_SO8

AO4407A_SO8

VIN

1 1

12

PR210

PR210

47K_0402_1%

47K_0402_1%

DTA144EUA_SC70-3

DTA144EUA_SC70-3

2

61

D

D

2

G

G

2 2

PQ212A

PQ212A

S

S

DMN66D0LDW -7_SOT363-6

DMN66D0LDW -7_SOT363-6

SB00000EO00

PACIN37

ACON37

ACOFF33

8
7

5

PQ210

PQ210

2

13

PQ211

PQ211
DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR211

PR211

22K_0402_5%

22K_0402_5%

1 2

PQ213

PQ213

DTC115EUA_SC70-3

DTC115EUA_SC70-3

ACOFF

4

1 3

DMN66D0LDW -7_SOT363-6

DMN66D0LDW -7_SOT363-6

2

P2 P3

1
2
36

12

12

PC210

PC210

0.1U_0603_25V7K

0.1U_0603_25V7K

12

PQ212B

PQ212B

34

D

D

5

G

G

S

S

13

PQ204

PQ204

AO4407A_SO8

AO4407A_SO8

1
2
3 6

4

PR212

PR212
200K_0402_1%

200K_0402_1%

PR213

PR213

150K_0402_1%

150K_0402_1%

ADP_I33,3 8

IREF33

FSTCHG33

8
7

5

1 2

0.01U_0402_25V7K

0.01U_0402_25V7K

PR220

PR220

154K_0402_1%

154K_0402_1%

PR221

PR221

120K_0402_1%

120K_0402_1%

PC211

PC211
5600P_0402_25V7K

5600P_0402_25V7K

PC214

PC214

1 2

PC215

PC215

1 2

.1U_0402_16V7K

.1U_0402_16V7K

12

12

PC216

PC216

PR215

PR215

0.015_2512_1%

0.015_2512_1%

1

2

ACSETIN

PR216

PR216

10K_0402_1%

10K_0402_1%

12

12

PR217

PR217

100K_0402_1%

100K_0402_1%

PC213

PC213

1 2

6800P_0402_25V7K

6800P_0402_25V7K

PR218

PR218

1 2

10K_0402_1%

10K_0402_1%

6251VREF 6251aclim

12

0.01U_0402_25V7K

0.01U_0402_25V7K

2.39V

6251VREF37

PR222

PR222

1 2

8.25K_0402_1%

8.25K_0402_1%

26.7K_0402_1%

26.7K_0402_1%

1 2

PR223

PR223

B+

4

3

LDO 5.075V

6251VDD

12

PC212

PC212

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

1

2

6251_EN CSON

3

4

5

PR219

PR219

47K_0402_1%

47K_0402_1%

12

6

7

8

9

10

11

12

@

@

@

12

12

PC209

PC209

PC208

PC208

10U_1206_25V6M

10U_1206_25V6M

10U_1206_25V6M

10U_1206_25V6M

RB751V-40_SOD323-2

RB751V-40_SOD323-2

10_1206_5%

10_1206_5%

PU200

PU200

VDD

DCIN

ACSET

ACPRN

EN

CSON

CELLS

CSOP

ICOMP

CSIN

VCOMP

CSIP

PHASE

ICM

UGATE

VREF

CHLIM

BOOT

ACLIM

VDDP

VADJ

LGATE

PGND

GND

ISL6251AHAZ-T_QSOP24

ISL6251AHAZ-T_QSOP24

12

10U_1206_25V6M

10U_1206_25V6M

1.2UH_1127AS-1R2N_2. 4A_30%

1.2UH_1127AS-1R2N_2. 4A_30%

VIN

PD201

PD201

1 2
12

PR227

PR227

PC217

PC217

DCIN

24

0.1U_0603_25V7K

0.1U_0603_25V7K

ACPRN

23

22

21

1 2

PR231 20_0402_5%PR231 20_04 02_5%

20

PC220

PC220

0.1U_0603_25V7K

0.1U_0603_25V7K

19

1 2

LX_CHG

18

DH_CHG

17

BST_CHG

16

6251VDDP

15

DL_CHG

14

13

PL201

PL201

12

12

PR226

PR226

191K_0402_1%

191K_0402_1%

12

12

PR228

PR228

14.3K_0402_1%

14.3K_0402_1%

1000P_0402_25V8J

1000P_0402_25V8J

PC218

PC218

12

PR229 20_0402_5%PR229 20_0402_5 %

PC219

PC219

0.047U_0402_16V7K

0.047U_0402_16V7K

1 2

PR230

PR230

12

1 2

PR232 2_0402_5%P R232 2_0402_5%

PR205

PR205

1 2

0_0603_5%

0_0603_5%

PC221

PC221

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

1 2

CSIN

CSIP

ACSETIN

1.26V

1 2

20_0402_5%

20_0402_5%

PC205

PC205

BST_CHGA

12

0.1U_0603_25V7K

0.1U_0603_25V7K

PD202

PD202

RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

PR233 4.7_0603_5%PR233 4.7_0603_5%

PC231

PC231

CSOP

12

6251VDD

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

12

PC232

PC232

4.7U_0805_25V6-K

4.7U_0805_25V6-K

AO4466L_SO8

AO4466L_SO8

PC233

PC233

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PQ202

PQ202

12

4

4

CHG_B+

DTC115EUA_SC70-3

DTC115EUA_SC70-3

6

578

PQ201

PQ201
AO4466L_SO8

AO4466L_SO8

10UH_MSCDRI-104A-10 0M-E_4.6A_20%

10UH_MSCDRI-104A-10 0M-E_4.6A_20%

123

6

578

12

@ PR206

@

4.7_1206_5%

4.7_1206_5%

12

680P_0603_50V7K

680P_0603_50V7K

123

PQ215

PQ215

PL202

PL202

1 2

PR206

PC206

@PC2 06

@

PR237

PR237
10K_0402_1%

10K_0402_1%

1 2
13

CHGCHG

PQ208 AO 4407A_SO8PQ208 AO4407A_SO8

1
2
3 6

4

PQ209 AO 4407A_SO8PQ209 AO4407A_SO8

1
2
3 6

4

PD9

PD9

1 2

1SS355_SOD323-2

1SS355_SOD323-2

PD10

PD10

2

1 2

1SS355_SOD323-2

1SS355_SOD323-2

PR235

PR235

1

2

0.02_1206_1%

0.02_1206_1%

8
7

5

8
7

5

PR236

PR236

1 2

47K_0402_1%

47K_0402_1%

ACOFF

PR238

PR238

200K_0402_1%

200K_0402_1%

12

PC222

PC222

0.1U_0402_25V6

0.1U_0402_25V6

PACIN

PQ216

PQ216

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

4

3

12

PC202

PC202

10U_1206_25V6M

10U_1206_25V6M

VIN

12

VIN

13

D

D

2

G

G

S

S

BATT+

@

@

12

12

PC203

PC203

PC204

PC204

10U_1206_25V6M

10U_1206_25V6M

10U_1206_25V6M

10U_1206_25V6M

PR224

PR224

3 3

CHGVADJ33

CC=0.25A~3A

IREF=1.016*Icharge

IREF=0.254V~3.048V

VCHLIM need over 95mV

CHGVADJ=(Vcell-4)*9.445

Vcell

4V

4.2V

4.35V

CP mode

CHGVADJ

0V

1.882V

3.2935V

CP= 92%*Iada

Iada=0~3.42A(65W) CP=3.147A

Vaclim=0.6221V(65W) PR222=75k, PR223=20k, PR215=0.02

4 4

Iada=0~3.947A(75W) CP=3.63A

Vaclim=1.1V(75W) PR222=24k, PR223=20k, PR215=0.02

Iada=0~4.737A(90W) CP=4.36A

Vaclim=0.737V(90W) PR222=53.6k, PR223=20k, PR215=0.015

Iada=0~6.316A(120W) CP=5.81A

Vaclim=1.777V(120W) PR222=8.25k, PR223=26.7k, PR215=0.015

A

1 2

15.4K_0402_1%

15.4K_0402_1%

B

PR225

PR225

31.6K_0402_1%

31.6K_0402_1%

1 2

PR240

PR240

47K_0402_1%

47K_0402_1%

ACPRN

6251VDD

PR241

12

12

PR242

PR242
10K_0402_1%

10K_0402_1%

13

2

PR241

10K_0402_1%

10K_0402_1%

1 2

PQ214

PQ214
DTC115EUA_SC70-3

DTC115EUA_SC70-3

12

PR243

PR243

14.3K_0402_1%

14.3K_0402_1%

1.26 / 14.3 * 205.3 = 18.089V

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/25 2009/04/28

2010/01/25 2009/04/28

2010/01/25 2009/04/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

ACIN 13,19,33,35

PACIN

Vin Detector

18.089V

High

17.44V

Low

VIN

12

PR246

PR246

309K_0402_1%

309K_0402_1%

12

PR248

PR248

47K_0402_1%

47K_0402_1%

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PR247

PR247

10K_0402_1%

10K_0402_1%

1 2

12

PC223

PC223

.1U_0402_16V7K

.1U_0402_16V7K

CHARGER

CHARGER

CHARGER

PGRAA LA-7191P M/B

D

39 48W ednesday, October 20, 2010

39 48W ednesday, October 20, 2010

39 48W ednesday, October 20, 2010

ADP_V 33

0.1

0.1

0.1

5

4

3

2

1

2VREF_8205

D D

RT8205_B+

PJ331

PJ331

JUMP_43 X118@

JUMP_43 X118@

2

B+

C C

Ipeak=5A
Imax=3.5A
F=305KHz

B B

Total Capacitor 330uF
ESR 15mohm

VS

A A

112

+3VALWP

330U_6.3 V_M

330U_6.3 V_M

PR371

PR371

1 2

100K_04 02_1%

100K_04 02_1%

PC332

PC332

15mohm

15mohm

5

12

PC360

PC360

10U_120 6_25V6M

10U_120 6_25V6M

1

+

+

2

VL

VS_ON38

PL332

4.7UH_SIL1 045R-4R7PF_6.3A _30%

4.7UH_SIL1 045R-4R7PF_6.3A _30%

DMN66D0 LDW-7_SOT3 63-6

DMN66D0 LDW-7_SOT3 63-6

PL332

1 2

@P R336

@

4.7_1206 _5%

4.7_1206 _5%

PC336

@P C336

@

680P_06 03_50V7K

680P_06 03_50V7K

PQ360A

PQ360A

PR370

PR370

100K_04 02_1%

100K_04 02_1%

12

PR372

PR372

42.2K_0402_1%

42.2K_0402_1%

PR336

12

6

578

123

12

786

5

12

123

ENTRIP1 ENTRIP2

61

D

D

2

G

G

S

S

13

2

12

PC370

PC370

@

@

0.01U_0402_16V7K

0.01U_0402_16V7K

4

PQ331

PQ331

AO4466L _SO8

AO4466L _SO8

4

0.1U_060 3_25V7K

0.1U_060 3_25V7K

PQ332

PQ332

4

AO4712L _SO8

AO4712L _SO8

34

D

D

5

G

G

S

S

PQ361

PQ361
DTC115E UA_SC70-3

DTC115E UA_SC70-3

B+

PQ360B

PQ360B

DMN66D0 LDW-7_SOT3 63-6

DMN66D0 LDW-7_SOT3 63-6

SB00000EO00

PC335

PC335

+3VLP

12

PC361

PC361

4.7U_0805_10V6K

4.7U_0805_10V6K

PR335

PR335

1 2

1 2

0_0603_ 5%

0_0603_ 5%

EN037

PR360

PR360

499K_04 02_1%

499K_04 02_1%

1 2

12

PC362

PC362

1U_0402 _6.3V6K

1U_0402 _6.3V6K

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BST_3V

UG_3V

LX_3V

LG_3V

1U_0603 _10V6K

1U_0603 _10V6K

PR362

PR362

13K_040 2_1%

13K_040 2_1%

1 2

PR363

PR363

20K_040 2_1%

20K_040 2_1%

1 2

PR337

PR337

150K_04 02_1%

150K_04 02_1%

1 2

PU330

PU330

25

P PAD

7

VO2

8

VREG3

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

12

PR361

PR361

100K_0402_5%

100K_0402_5%

2VREF_8205

3

12

PC363

PC363

PR364

PR364

30K_040 2_1%

30K_040 2_1%

1 2

PR365

PR365

19.1K_04 02_1%

19.1K_04 02_1%

1 2

ENTRIP1

PR357

PR357

150K_04 02_1%

ENTRIP2

6

13

3

4

5

VFB2

VREF

TONSEL

ENTRIP2

SKIPSEL

VIN16GND

EN0

14

15

RT8205_B+

12

2009/11/ 13 2009/04/ 28

2009/11/ 13 2009/04/ 28

2009/11/ 13 2009/04/ 28

150K_04 02_1%

1 2

1

2

VFB1

ENTRIP1

24

VO1

23

PGOOD

22

VBST1

21

DRVH1

20

LL1

19

DRVL1

VCLK18VREG5

TPS5112 5ARGER_QFN24 _4X4

TPS5112 5ARGER_QFN24 _4X4

17

12

PC364

PC364

4.7U_080 5_10V6K

4.7U_080 5_10V6K

PC365

PC365

0.1U_060 3_25V7K

0.1U_060 3_25V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

VL

Deciphered Date

Deciphered Date

Deciphered Date

BST_5V

UG_5V

LX_5V

LG_5V

PR355

PR355

1 2

0_0603_ 5%

0_0603_ 5%

10U_120 6_25V6M

10U_120 6_25V6M

POK 19,38

1 2

2

RT8205_B+

12

PC366

PC366

PC355

PC355

0.1U_060 3_25V7K

0.1U_060 3_25V7K

6

578

PQ351

PQ351

4

AO4466L _SO8

AO4466L _SO8

123

PL352

4.7UH_SIL1 045R-4R7PF_6.3A _30%

4.7UH_SIL1 045R-4R7PF_6.3A _30%

12

786

5

4

PQ352

PQ352

AO4712L _SO8

AO4712L _SO8

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Wednesday, October 20, 2010

Wednesday, October 20, 2010

Wednesday, October 20, 2010

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

123

PGRAA LA-7191P M/B

PL352

1 2

@

@

PR356

PR356

4.7_1206 _5%

4.7_1206 _5%

@

@

PC356

PC356
680P_06 03_50V7K

680P_06 03_50V7K

3VALWP/5VALWP

3VALWP/5VALWP

3VALWP/5VALWP

15mohm

15mohm

Ipeak=5A
Imax=3.5A
F=245KHz
Total Capacitor 330uF
ESR 15mohm

1

+5VALWP

1

+

+

2

40 48

40 48

40 48

PC352

330U_6.3V_M

PC352

330U_6.3V_M

0.1

0.1

0.1

A

1 1

PR160

PR160

SYSON30,33

+5VALW

2 2

1 2

0_0402_5%

0_0402_5%

PR161

PR161

1 2

100_0603_5%

100_0603_5%

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

PC161

PC161

12

PC160

PC160

.1U_0402_16V7K

.1U_0402_16V7K

12

@

@

12

PR162

PR162

1 2

10K_0402_1%

10K_0402_1%

PR163

PR163
10K_0402_1%

10K_0402_1%

2

3

4

5

6

PU150

PU150

TON

OUT

VCC

FB

PGOOD

B

1

EN_SKIP

VFB=0.75V

AGND7PGND

8

PR164

PR164

255K_0402_1%

255K_0402_1%

1 2

PR155

BST_1.5V

14TP15

BST

ILIM

VDD

G5603RU1U_TQFN14_3P5X3 P5

G5603RU1U_TQFN14_3P5X3 P5

PR155

1 2

0_0603_5%

0_0603_5%

DH_1.5V

13

DH

LX_1.5V

12

LX

DL

11

10

9

PR157

PR157

1 2

16.2K_0402_1%

16.2K_0402_1%

DL_1.5V

BST_1.5V-1

PC155

PC155

1 2

0.1U_0603_25V7K

0.1U_0603_25V7K

+5VALW

PC162

PC162

4.7U_0805_10V6K

4.7U_0805_10V6K

1 2

C

PJ151

PJ151

JUMP_43X118@

JUMP_43X118@

2

12

6

578

PQ151

PQ151

4

AO4466L_SO8

AO4466L_SO8

123

786

5

PQ152

PQ152

4

AO4712L_SO8

AO4712L_SO8

123

12

12

12

PC163

PC163

PC164

PC164

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PL152

PL152

1.8UH_MSCDRI-104A- 1R8N-E_9.5A_30%

1.8UH_MSCDRI-104A- 1R8N-E_9.5A_30%

PR156

@PR1 56

@

4.7_1206_5%

4.7_1206_5%

PC156

@PC1 56

@

680P_0603_50V7K

680P_0603_50V7K

12

112

1

+

+

PC152

PC152
330U_6.3V_M

330U_6.3V_M

2

12

@PC1 65

@

680P_0402_50V7K

680P_0402_50V7K

D

B+

PC165

+1.5VP

Ipeak=7.5A
Imax=5.25A
Rtrip=16.2K, OCP=9.09A
F=315KHz
Total Capacitor 1380uF,
ESR 3.42mohm

HW side:
C218 390uF 10m
C189 330uF 15m
C875 330uF 17m ; C180 330uF 6m @

PU180

10

12

PC185

@PC185

@

0.1U_0402_10V7K

0.1U_0402_10V7K

PU180

4

PVIN

PG

9

PVIN

8

SVIN

5

EN

TP

NC

7

11

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LX_1.8V

2

LX

3

LX

FB=0.6Volt

6

FB

NC

1

1UH_FMJ-0630T-1R 0 HF_11A_20%

1UH_FMJ-0630T-1R 0 HF_11A_20%

PR186

PR186

PC186

PC186

2010/01/25 2009/04/28

2010/01/25 2009/04/28

2010/01/25 2009/04/28

12

12

1 2

4.7_1206_5%

4.7_1206_5%

680P_0603_50V7K

680P_0603_50V7K

PL182

PL182

20K_0402_1%

20K_0402_1%

12

PR183

PR183

FB_1.8V

12

PR184

PR184

10K_0402_1%

10K_0402_1%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

12

PC187

PC187

12

68P_0402_50V8J

68P_0402_50V8J

PC182

PC182

+1.8VSP

12

PC183

PC183

22U_0805_6.3VAM

22U_0805_6.3VAM

22U_0805_6.3VAM

22U_0805_6.3VAM

Ipeak=1.308A
ILIM = 4A
F=1MHz
Total Capacitor 66uF,
ESR ??mohm

HW side:
C256 22uF

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

+1.5VP/+1.8VSP

+1.5VP/+1.8VSP

+1.5VP/+1.8VSP

PGRAA LA-7191P M/B

D

41 48W ednesday, October 20, 2010

41 48W ednesday, October 20, 2010

41 48W ednesday, October 20, 2010

0.1

0.1

0.1

SY8033BDBC_DFN10_3X3

3 3

+3VALW

4 4

A

SUSP#13,17, 27,33,36,43

@ PJ181

@

2

JUMP_43X39

JUMP_43X39

PJ181

112

12

PC184

PC184
22U_0805_6.3VAM

22U_0805_6.3VAM

PR181

PR181

1 2

0_0402_5%

0_0402_5%

499K_0402_1%

499K_0402_1%

@

@

EN_1.8V

PR182

PR182

SY8033BDBC_DFN10_3X3

12

B

5

4

3

2

1

D D

6

578

PR462

PR462

1 2

255K_0402_1%

255K_0402_1%

PR455

PR455

1

EN_SKIP

15

TP

AGND7PGND

BST_VCCSAP

1 2

0_0603_5%

0_0603_5%

14

BST

13

DH

12

LX

11

1 2

ILIM

14.3K_0402_1%

14.3K_0402_1%

10

VDD

9

DL

G5603RU1U_TQFN14_3P5X3P5

G5603RU1U_TQFN14_3P5X3P5

8

BST_VCCSAP-1

DH_VCCSAP

LX_VCCSAPVOUT

PR457

PR457

DL_VCCSAP

0.1U_0603_25V7K

0.1U_0603_25V7K

+5VALW

4.7U_0805_10V6K

4.7U_0805_10V6K

PR460

PR460

PC461

PC461

1 2

0_0402_5%

0_0402_5%

12

PC460

@PC460

@

.1U_0402_16V7K

.1U_0402_16V7K

PR471

PR471

12

1 2

+3VS

10K_0402_1%

10K_0402_1%

SA_PGOOD33

FB

1 2

PU450

PU450

2

TON

3

OUT

4

VCC

5

FB

6

PGOOD

PR472

@ PR472

@

10K_0402_1%

10K_0402_1%

VCCPPWRGD36,43

PR461

PR461

100_0402_1%

100_0402_1%

+5VALW

C C

B B

1 2

4.7U_0805_10V6K

4.7U_0805_10V6K

PC455

PC455

1 2

1 2

PC462

PC462

12

PR466

PR466

9.09K_0402_1%

9.09K_0402_1%

4

PQ451

PQ451
AO4466L_SO8

AO4466L_SO8

123

786

5

4

PQ452

PQ452
AO4712L_SO8

AO4712L_SO8

123

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

VCCSAP_B+

12

1.8UH_SIL104R-1R8PF_9.5A_30%

1.8UH_SIL104R-1R8PF_9.5A_30%

12

@ PR456

@

4.7_1206_5%

4.7_1206_5%

12

@ PC456

@

680P_0603_50V7K

680P_0603_50V7K

12

PR467

PR467

5.1K_0402_1%

5.1K_0402_1%

13

D

D

2

G

G

S

S

PQ453

PQ453

12

PC463

PC463

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PL452

PL452

1 2

PR456

PC456

12

PC464

PC464

4.7U_0805_25V6-K

4.7U_0805_25V6-K

H=4mm

PR469

PR469

10K_0402_1%

10K_0402_1%

1 2

PC470

PC470

.1U_0402_16V7K

.1U_0402_16V7K

12

PC466

PC466

PC465

PC465

2200P_0402_50V7K

2200P_0402_50V7K

0.1U_0402_25V6

0.1U_0402_25V6

+3VS

12

12

12

12

PR468

PR468
10K_0402_1%

10K_0402_1%

PR470

@ PR470

@

1 2

PJ451

PJ451

JUMP_43X118@

JUMP_43X118@

2

PR463

PR463
0_0402_5%

0_0402_5%

PR465

PR465
680_0402_1%

680_0402_1%

100K_0402_1%

100K_0402_1%

112

10_0402_5%

10_0402_5%

C

C

2

B

B

E

E

3 1

PQ454

PQ454

MMST3904-7-F_SOT323-3

MMST3904-7-F_SOT323-3

1

+

+

PC452

PC452
330U_6.3V_M

330U_6.3V_M

2

PR464

PR464

PR473

PR473

0_0402_5%

0_0402_5%

1 2

12

B+

+VCCSAP

Ipeak=6A
Imax=4.2A
Rtrip=14.3K, OCP=7.69A
F=315KHz
Total Capacitor 660u
ESR=7.96mohm

HW side:
C877 330uF 17m; C485 330uF 6 m @

VCCSA_SENSE 9

VCCSAP_VID1 9

VID1 +VCCSAP

100.8V

0.9V

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY PR OPERTY OF COMPAL ELECTRONICS, INC. AN D CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY PR OPERTY OF COMPAL ELECTRONICS, INC. AN D CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINE ERING DRAW ING IS THE PROPRIETARY PR OPERTY OF COMPAL ELECTRONICS, INC. AN D CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANSF ERED FROM THE C USTODY OF THE COMPETEN T DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANSF ERED FROM THE C USTODY OF THE COMPETEN T DIVISION OF R&D

AND TRADE SE CRET INFORMATION. THIS SHE ET MAY NOT BE TRANSF ERED FROM THE C USTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EX CEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZE D BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/01/25 2009/04/28

2010/01/25 2009/04/28

2010/01/25 2009/04/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

+VCCSAP/+1.0VSDGPUP

+VCCSAP/+1.0VSDGPUP

+VCCSAP/+1.0VSDGPUP

PGRAA LA-7191P M/B

1

42 48Wednesday, October 20, 2010

42 48Wednesday, October 20, 2010

42 48Wednesday, October 20, 2010

of

of

of

0.1

0.1

0.1

5

4

3

2

1

+1.5V

1

PJ75

@P J75

@

1

JUMP_43 X79

JUMP_43 X79

D D

PR282

@P R282

@

0_0402_ 5%

0_0402_ 5%

SUSP5,9,36

0.75VR_EN#36

C C

PR410

PR410

0_0402_ 5%

0_0402_ 5%

SUSP#13,17,27,33,3 6,41

PR411

PR411

100_060 3_1%

100_060 3_1%

+5VALW

B B

1 2

4.7U_060 3_6.3V6K

4.7U_060 3_6.3V6K

PC411

PC411

1 2

12

PR412

PR412

4.02K_04 02_1%

4.02K_04 02_1%

1 2

12

PR413

PR413

10K_040 2_1%

10K_040 2_1%

VCCPPW RGD36,42

12

PC410

PC410

@

@

.1U_0402 _16V7K

.1U_0402 _16V7K

1 2

PR279

PR279

0_0402_ 5%

0_0402_ 5%

1 2

.1U_0402 _16V7K

.1U_0402 _16V7K

PR415

PR415

1 2

10K_040 2_1%

10K_040 2_1%

PR416

@P R416

@

10K_040 2_1%

10K_040 2_1%

1 2

PC260

PC260

2

3

4

5

6

12

PU400

PU400

TON

OUT

VCC

FB

PGOOD

+3VS

13

D

D

2

G

G

S

S

255K_04 02_1%

255K_04 02_1%

1 2

1

15

EN_SKIP

VFB=0.75V

AGND7PGND

2

2

PC261

PC261

4.7U_080 5_6.3V6K

4.7U_080 5_6.3V6K

1 2

1K_0402 _1%

1K_0402 _1%

PQ260

PQ260

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

PR414

PR414

BST_1.05 VS_VCCP

14

TP

BST

13

DH

12

LX

11

ILIM

10

VDD

9

DL

G5603RU 1U_TQFN14_3P 5X3P5

G5603RU 1U_TQFN14_3P 5X3P5

8

12

PR280

PR280

12

PR281

PR281

PR405

PR405

0_0603_ 5%

0_0603_ 5%

1 2

DH_1.05V S_VCCP

LX_1.05V S_VCCP

PR407

PR407

1 2

11K_040 2_1%

11K_040 2_1%

DL_1.05V S_VCCP

12

PC263

PC263

.1U_0402_16V7K

.1U_0402_16V7K

1K_0402_1%

1K_0402_1%

For shortage changed

BST_1.05 VS_VCCP-1

PU75

PU75

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1 U_SO8

G2992F1 U_SO8

12

PC262

PC262
10U_080 5_6.3V6M

10U_080 5_6.3V6M

PC405

PC405

0.1U_060 3_25V7K

0.1U_060 3_25V7K

1 2

+5VALW

1 2

PC412

PC412

4.7U_080 5_10V6K

4.7U_080 5_10V6K

+0.75VSP

6

5

NC

7

NC

8

NC

9

TP

PQ402

PQ402

TPCA805 7-H_PPAK56-8-5

TPCA805 7-H_PPAK56-8-5

4

4

12

5

5

+3VALW

PC264

PC264

1U_0603 _10V6K

1U_0603 _10V6K

123

123

1.05VS_B +

12

12

PC413

PC413

PC414

PC414

PQ401

PQ401

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PR406

PC406

@ PC406

@

4.7U_0805_25V6-K

PL402

PL402

680P_0603_50V7K

680P_0603_50V7K

TPCA806 5-H_PPAK56-8-5

TPCA806 5-H_PPAK56-8-5

1UH_FDU E1040D-1R0M-P3 _21.3A_20%

1UH_FDU E1040D-1R0M-P3 _21.3A_20%

12

@P R406

@

4.7_1206 _5%

4.7_1206 _5%

12

PJ401

@ PJ401

@

2

112

JUMP_43 X118

JUMP_43 X118

12

PC415

PC415

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

1

+

+

PC402

PC402
330U_6.3 V_M

330U_6.3 V_M

2

PR420

PR420

0_0402_5%

0_0402_5%

1 2

PR421

PR421

10_0402 _5%

10_0402 _5%

12

B+

+1.05VS_VCCPP

Ipeak=17A
Im

ax=11.9A
Rtrip=11K, OCP=21.81A
F=315KHz
Total Capacitor 990uF,
ESR 5.42mohm

HW side:
C10 330uF 17m
C11 330uF 17m
C12 330uF 17m @

VCCIO_SEN SE 8

A A

Security Class ification

Security Class ification

Security Class ification

2010/01/ 25 2009/04/ 28

2010/01/ 25 2009/04/ 28

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/ 25 2009/04/ 28

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

+1.05VS_VCCP/+0.75VSP

+1.05VS_VCCP/+0.75VSP

+1.05VS_VCCP/+0.75VSP

PGRAA LA-7191P M/B

1

0.1

0.1

0.1

43 48W ednesday, October 20, 2010

43 48W ednesday, October 20, 2010

43 48W ednesday, October 20, 2010

5

Reserve PC574, PR552

or slow rate

f

PR530

GFX@ PR530

GFX@

8.06K_0402_1%

8.06K_0402_1%

1 2

12

PR531

@ PR531

D D

C C

35W@ PR542

35W@

29.4K_0402_1%

29.4K_0402_1%

+1.05VS_VCCPP

B B

A A

@

499K_0402_1%

499K_0402_1%

PR539

GFX@ PR539

GFX@

18.2K_0402_1%

18.2K_0402_1%

VR_SVID_DAT8

VR_SVID_ALRT#8

VR_SVID_CLK8

12

PR542

PR542

VR_HOT#33

1 2

@PR547

@

499_0402_1%

499_0402_1%

499K_0402_1%

499K_0402_1%

1 2

Reserve PC559, PR550
for slow rate

If HW side have add resistor PW R
side can remove PR131, PR132

+CPU_CORE
Iocp=120A, IccMA X=94A
Load line=1.9moh m
DCR=1.1mohm

+CPU_CORE
Iocp=70A, IccMAX =53A
Load line=1.9moh m
DCR=1.1mohm

PR547

19.1K_0402_1%

19.1K_0402_1%

45W@ PR542

45W@

PR553

@PR553

@

PC561

PC561

0.047U_0603_16V7K

0.047U_0603_16V7K

12

12

150P_0402_50V8J

150P_0402_50V8J

@ PC559

@

680P_0402_50V7K

680P_0402_50V7K

5

GFX@ PC531

GFX@

39P_0402_50V7K

39P_0402_50V7K

12

PC533

GFX@ PC533

GFX@

150P_0402_50V8J

150P_0402_50V8J

12

12

GFX@ PC534

GFX@

0.047U_0603_16V7K

0.047U_0603_16V7K

VR_ON33

+3VS

12

VGATE19,33

1 2

PC537

PC537

8.06K_0402_1%

8.06K_0402_1%

33P_0402_50V8J

33P_0402_50V8J

PC543

PC543

PC559

PR544

PR544

3.83K_0402_1%

3.83K_0402_1%

43P_0402_50V8J

43P_0402_50V8J

PR546

PR546

PC541

PC541

12

PR549

PR549

316K_0402_1%

316K_0402_1%

12

PR550

@PR550

@

2K_0402_1%

2K_0402_1%

12

+GFX_CORE
Iocp=40A, IccMAX =33A
Load line=3.9moh m
DCR=1.1mohm

+GFX_CORE
Iocp=40A, IccMAX =24A
Load line=3.9moh m
DCR=1.1mohm

1 2

GFX@ PR532

GFX@

PC531

422_0402_1%

422_0402_1%

12

12

PR533

GFX@ PR533

GFX@

475K_0402_1%

475K_0402_1%

PC534

1 2

1 2

PR541

PR541

1.91K_0402_1%

1.91K_0402_1%

1 2

470KB_0402_5%_ERTJ0EV474J

470KB_0402_5%_ERTJ0EV474J

27.4K_0402_1%

27.4K_0402_1%

12

PC539

PC539
1000P_0402_50V7K

1000P_0402_50V7K

PR548

PR548

499_0402_1%

499_0402_1%

3.83K_0402_1%

3.83K_0402_1%

12

+CPU_CORE

12

VCCSENSE8

VSSSENSE8

quad core

dual core

PC530

GFX@ PC530

GFX@

1000P_0402_50V7K

1000P_0402_50V7K

PR532

GFX@ PR534

GFX@

2.55K_0402_1%

2.55K_0402_1%

+1.05VS_VCCPP

12

PC560

@ PC560

@

.1U_0402_16V7K

.1U_0402_16V7K

PR540

PR540

1 2

0_0402_5%

0_0402_5%

PH502

PH502

PR545

PR545

PC542

PC542

470P_0402_50V7K

470P_0402_50V7K

12

PR551

PR551

12

1 2

10_0402_1%

10_0402_1%

1 2

10_0402_1%

10_0402_1%

470P_0402_50V7K

470P_0402_50V7K

GFX@ PC532

GFX@

680P_0402_50V7K

680P_0402_50V7K

12

12

PR534

12

PR537

PR537

130_0402_1%

130_0402_1%

SVID_SDA

SVID_ALERT#

SVID_SCLK

12

12

@

@

PR131

PR131

@

@

PR132

PR132

@ PC574

@

PC532

12

PR538

PR538

54.9_0402_1%

54.9_0402_1%

PC574

12

10

11

12

10P_0402_50V8J

10P_0402_50V8J

VSUM-

1000P_0402_50V7K

1000P_0402_50V7K

4

PR552

@ PR552

@

4.99K_0402_1%

4.99K_0402_1%

12

PR563

GFX@ PR563

GFX@

3.83K_0402_1%

3.83K_0402_1%

12

PC557

GFX@PC5 57

GFX@

330P_0402_50V7K

330P_0402_50V7K

ISPG

ISNG

46

48

49

GND

1

VWG

COMPG

2

IMONG

3

PGOODG

4

SDA

5

ALERT#

6

SCLK

7

VR_ON

8

PGOOD

9

IMON

VR_HOT#

NTC

VW

COMP13FB14ISEN3/ FB215ISEN216ISEN117VSEN18RTN19ISUMN20ISUMP21VDD22VIN23PROG1

PC540

35W@ PC540

35W@

12

PC569

45W@ PC569

45W@

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

12

PC562

PC562

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

12

PC544

PC544

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

12

PC545

PC545

330P_0402_50V7K

330P_0402_50V7K

12

12

PC546

PC546

4

44

45

47

FBG

ISPG

RTNG

VSENG

ISL95831CRZ-T_TQFN48_6X6

ISL95831CRZ-T_TQFN48_6X6

ISEN3

ISEN2

ISEN1

12

PC547

PC547

330P_0402_50V7K

330P_0402_50V7K

PH501

GFX@ PH501

GFX@

470KB_0402_5%_ERTJ0EV474J

470KB_0402_5%_ERTJ0EV474J

12

1000P_0402_50V7K

1000P_0402_50V7K

NTCG

42

43

ISNG

NTCG

330P_0402_50V7K

330P_0402_50V7K

1 2

PR564

GFX@ PR564

GFX@

27.4K_0402_1%

27.4K_0402_1%

PC556

GFX@ PC556

GFX@

330P_0402_50V7K

330P_0402_50V7K

1 2

12

PC558

GFX@ PC558

GFX@

GFX@ PR567

GFX@

16.5K_0402_1%

16.5K_0402_1%

1 2

UGATEG

BOOTG

39

41

40

UGG

PROG2

BOOTG

VDD+

12

12

PC548

PC548

1U_0603_10V6K

1U_0603_10V6K

PR554

45W@ PR554

45W@

1.24K_0402_1%

1.24K_0402_1%

12

PC552

@PC552

@

35W@

35W@

1.47K_0402_1%

1.47K_0402_1%

12

PR567

PHASEG

38

24

PC549

PC549

0.22U_0603_10V7K

0.22U_0603_10V7K

1_0603_5%

1_0603_5%

12

PR554

PR554

3

NTCG

If HW side have add resistor PW R
side can remove PR129, PR130

12

+GFX_COREP

PR129

@ PR129

@

10_0402_1%

10_0402_1%

@ PR130

@

10_0402_1%

10_0402_1%

LGATEG

37

LGG

PHG

36

BOOT2

35

UG2

34

PH2

33

VSSP2

32

LG2

31

VDDP

30

PWM3

29

LG1

28

VSSP1

27

PH1

26

UG1

25

BOOT1

PU500

PU500

PR559

PR559

0_0603_5%

0_0603_5%

1 2

PR558

PR558

12

12

12

PC550

PC550

0.33U_0402_10V6K

0.33U_0402_10V6K

12

PR555

@PR555

@

100_0402_1%

100_0402_1%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PR130

PR568

0_0603_5%

0_0603_5%

45W@ PR56 8

45W@

BOOT2

UGATE2

PHASE2

LGATE2

VDDP+

LGATE1

PHASE1

UGATE1

BOOT1

PR560

45W@ PR560

45W@

0_0402_5%

0_0402_5%

1 2

+5VALW

12

PC551

@ PC551

@

0.022U_0402_16V7K

0.022U_0402_16V7K

PQ504

PQ504
T

T

PCA8059-H_PPAK56-8-5

PCA8059-H_PPAK56-8-5

35W@

35W@

PQ508

PQ508
TPCA8059-H_PPAK56-8-5

TPCA8059-H_PPAK56-8-5

35W@

35W@

3

VCC_AXG_SENSE 9

VSS_AXG_SENSE 9

+5VALW

12

45W@ PC567

45W@

1 2

PR569

0_0603_5%

45W@ PR569

0_0603_5%

45W@

1 2

PC554

PC554

Ipeak=98A,
Vboot=0V

CPU_B+

12

PR557

PR557

2.61K_0402_1%

2.61K_0402_1%

12

PR556

PR556

PH503

PH503

11K_0402_1%

11K_0402_1%

10K_0402_1%_ERTJ0EG103FA

10K_0402_1%_ERTJ0EG103FA

12

PC567

1U_0603_10V6K

1U_0603_10V6K

PU50145W@

PU50145W@

ISL6208ACRZ-T_QFN8_3X3

ISL6208ACRZ-T_QFN8_3X3

5

VCC

6

FCCM

2

PWM

3

GND

PR561

35W@ PR561

35W@

0_0402_5%

0_0402_5%

1 2

1 2

PR562

PR562

0_0603_5%

0_0603_5%

12

Connect to +5V
disable PWM3

2.2U_0603_10V6K

2.2U_0603_10V6K

PR560

PR560

35W@

35W@

4

4

.32K_0402_1%

.32K_0402_1%

VSUM+

VSUM-

PC553

PC553
.1U_0402_16V7K

.1U_0402_16V7K

2010/01/25 2009/04/28

2010/01/25 2009/04/28

2010/01/25 2009/04/28

BOOT

UGATE

PHASE

LGATE

PGND

Ipeak=56A,
V

boot=0V

1

8

7

4

9

UGATEG

PHASEG

GFX@ PC505

GFX@

0.22U_0603_10V7K

0.22U_0603_10V7K

BOOTG

PR505

GFX@ PR505

GFX@

0_0603_5%

0_0603_5%

LGATEG

PR535

45W@ PR535

45W@

0_0603_5%

0_0603_5%

BOOT3

UGATE3

PHASE3

LGATE3

+5VALW

UGATE2

PHASE2

PR515

PR515

0_0603_5%

0_0603_5%

BOOT2

LGATE2

UGATE1

PHASE1

BOOT1

LGATE1

Compal Secret Data

Compal Secret Data

Compal Secret Data

12

0.22U_0603_10V7K

0.22U_0603_10V7K

PR525

PR525

0_0603_5%

0_0603_5%

12

0.22U_0603_10V7K

0.22U_0603_10V7K

Deciphered Date

Deciphered Date

Deciphered Date

12

12

PC515

PC515

PC525

PC525

PC505

12

2

4

12

4

PC535

45W@ PC535

45W@

0.22U_0603_10V7K

0.22U_0603_10V7K

5

4

5

4

5

4

5

12

4

5

4

5

12

4

2

123

123

123

123

123

123

5

5

CPU_B+

PQ507

45W@ PQ50 7

45W@

PQ512

45W@ PQ512

45W@

PQ506

PQ506

PQ508

45W@ PQ508

45W@

PQ503

PQ503

PQ504

45W@ PQ504

45W@

TPCA8065-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

123

123

PC588

45W@ PC58 8

45W@

CPU_B+

CPU_B+

PQ501

GFX@ PQ501

GFX@

TPCA8065-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

PQ502

GFX@PQ502

GFX@

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

CPU_B+

1

1 2

PL501

PL501

HCB4532KF-800T90_1812

12

PC563

1 2

GFX@PC5 63

GFX@

12

PR506

@ PR506

@

12

PC506

@ PC506

@

12

PC587

45W@ PC58 7

45W@

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

PC580

PC580

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

PC583

PC583

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

PC565

PC564

GFX@PC5 65

GFX@

GFX@PC564

GFX@

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

4.7_1206_5%

4.7_1206_5%

680P_0603_50V7K

680P_0603_50V7K

ISPG

+5VALW

12

PC586

45W@ PC58 6

45W@

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

12

12

PC581

PC581

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

12

12

PC584

PC584

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

12

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet

Date: Sheet

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PL502

GFX@ PL502

GFX@

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20%

4

3

PR570

GFX@ PR570

GFX@

10K_0402_1%

10K_0402_1%

GFX@ PH504

GFX@

PR572

GFX@ PR572

GFX@

10K_0402_1%_ERTJ0EG103FA

10K_0402_1%_ERTJ0EG103FA

7.5K_0402_1%

7.5K_0402_1%

1 2

1 2

1 2

PR573

GFX@ PR573

GFX@

11K_0402_1%

11K_0402_1%

1 2

PC571

GFX@ PC571

GFX@

.1U_0402_16V7K

.1U_0402_16V7K

1 2

PC573

@PC573

@

0.01U_0402_16V7K

0.01U_0402_16V7K

DISEN@ PR576

DISEN@

0_0402_5%

0_0402_5%

Connect to +5V c an disable GFX portion,
but PR575 need t o be removed.

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20%

PR536

@ PR536

@

4.7_1206_5%

4.7_1206_5%

1 2

PC536

@ PC536

@

ISEN3

680P_0603_50V7K

680P_0603_50V7K

12

PC582

PC582

4.7U_0805_25V6-K

4.7U_0805_25V6-K

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20%

PR516

@ PR516

@

4.7_1206_5%

4.7_1206_5%

1 2

PC516

@ PC516

@

680P_0603_50V7K

680P_0603_50V7K

12

PC585

PC585

4.7U_0805_25V6-K

4.7U_0805_25V6-K

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20%

PR526

@ PR526

@

4.7_1206_5%

4.7_1206_5%

1 2

PC526

@ PC526

@

ISEN1 ISEN2

680P_0603_50V7K

680P_0603_50V7K

Compal Electronics, Inc.

HCB4532KF-800T90_1812

1

2

12

PR571

GFX@ PR571

GFX@

1_0402_5%

1_0402_5%

PH504

PC570

GFX@ PC570

GFX@

.1U_0402_16V7K

.1U_0402_16V7K

1 2

1 2

PR574

@PR574

@

100_0402_1%

100_0402_1%

12

PR575

GFX@ PR575

GFX@

PR576

590_0402_1%

590_0402_1%

ISNG

12

PL505

45W@ PL505

45W@

4

3

PR585

PR586

1 2

10K_0402_1%

10K_0402_1%

45W@ PR58 6

45W@

VSUM+

1

+

+

2

PR580

PR580

10K_0402_1%

10K_0402_1%

1 2

VSUM+

PR591

PR591

10K_0402_1%

10K_0402_1%

1 2

VSUM+

CPU_CORE/GFX

CPU_CORE/GFX

CPU_CORE/GFX

PR584

3.65K_0402_1%

3.65K_0402_1%

45W@ PR58 4

45W@

45W@ PR58 5

45W@

1

+

+

PC566

PC566

PC568

PC568

100U_25V_M

100U_25V_M

100U_25V_M

100U_25V_M

2

PL503

PL503

4

3

PR583

PR583

PR582

PR582

3.65K_0402_1%

3.65K_0402_1%

PL504

PL504

4

3

PR593

PR593

PR592

PR592

3.65K_0402_1%

3.65K_0402_1%

PGRAA LA-7191P M/B

1

1

2

PR587

1_0402_5%

1_0402_5%

1 2

45W@ PR58 7

45W@

VSUM-

1

2

PR581

PR581

1_0402_5%

1_0402_5%

1 2

VSUM-

1

2

PR590

PR590

1_0402_5%

1_0402_5%

1 2

VSUM-

B+

+GFX_COREP

1

+

PC502

GFX@+PC502

GFX@

390U_2.5V_M

390U_2.5V_M

2

12

PC572

@PC572

@

470P_0402_50V7K

470P_0402_50V7K

+CPU_CORE

PR589

10K_0402_1%

10K_0402_1%

1 2

1 2

10K_0402_1%

10K_0402_1%

45W@ PR58 9

45W@

ISEN2

ISEN1

+CPU_CORE

PR594

PR594

10K_0402_1%

10K_0402_1%

1 2

1 2

10K_0402_1%

10K_0402_1%

ISEN3

ISEN1ISEN2

+CPU_CORE

PR588

PR588

10K_0402_1%

10K_0402_1%

1 2

1 2

10K_0402_1%

10K_0402_1%

ISEN3

of

of

44 46Wednesday, October 20, 2010

44 46Wednesday, October 20, 2010

44 46Wednesday, October 20, 2010

0.1

0.1

0.1

NO DATE PAGE MODIFICATION LIST PURPOSE

----------------------------------------------------------------------------------------------------------------------------------------

P36-P45 Release2010/04/201

Security Class ification

Security Class ification

Security Class ification

2009/11/ 13 2009/04/ 28

2009/11/ 13 2009/04/ 28

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/11/ 13 2009/04/ 28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Power PIR

Power PIR

Power PIR

NHQAA LA-6831P M/B

45 48W ednesday, October 20, 2010

45 48W ednesday, October 20, 2010

45 48W ednesday, October 20, 2010

0.1

0.1

0.1

PIR (Product Improve Record)

PGRAA LA-7191P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.0 TO 0.1

PGRAA LA-7191P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.0 TO 0.1

PGRAA LA-7191P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.0 TO 0.1PGRAA LA-7191P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.0 TO 0.1

NO DATE PAGE MODIFICATION LIST PURPOSE

--------------------------------------------------------------------------------------------------------------------------------------------------------

D D

10/12

10/12

10/12

10/12

10/12

10/12 14 Change R112 from 100K ohm to 10K ohm

10/12

10/12

10/12

10/12

10/12

C C

10/12

10/12

10/12

10/12

10/12

10/12

10/12

10/12

10/12

10/12,14

10/12

10/13

10/13 34 ADD R393,C457 For EMI request

10/14 13 Remove RV18, Direct connection to MXM connector PCH Side already have option item

10/14 26 Update JHDD2 Connector For connector list

B B

5

0409/13 Change RC11 from 22 ohm to 0 ohm For SDXC SDA application

2909/13 Change R347 to @ and R564 to mount For LVDS dual channel select

8 Change C890,C891,C894 from 470u to 330u. For cost reduction09/21

8 Change C10,C11,C12 330u from D2 to OSCON. For cost reduction09/21

33 Remove R380,R382 For ENE has fixed entry test mode issue.09/24

35 Add H24 For J3G mini card stand off09/25

13 Change JP1 to JMXM, JHDD to JHDD1, JODD to JODDB For MXM,HDD,ODD/B Conn.09/25

27 Del Felica schematic For meet PRD09/26

32 Add Subwoofer schematic For meet PRD09/26

31 Del RA11,CA58,CA59,CA60,JA1 For reduce audio schematic09/26

32 Change UA8 subwoofer amplifier pin6 contact from +5VS to +5VALW For audio sleep & music09/26

11,12,26,28,30,32 Update JDDRL,JDDRH,JUSB,JHDD1,JHDD2,JODDB,JLAN,JUSB30,JSUB connector For connector list09/26

28 Del UL3,RL4,RL23,LL1,LL3,CL9,CL13,CL28,CL29 For 1G LAN only09/26

28 Change UL1,RL23 BOM structure from 8105ELDO@ to 8105E@ For LAN schematic update09/26

26 Add JHDD2,C363~C366,C371~C374 For LAN schematic update09/26

32 Add BT schematic For dedicated BT09/26

35 Delete SW1 and SW4 and update JTPL pin define For move to small board09/26

35 Update JTPL pin define For small board update09/26

32 Combine FP and JTPL schematic For small board update09/26

05 Change Fan Control Circuit For PWM FAN

06 Change PCIE AC capacitor from 0.22uF to 0.1uF For nVIDIA request

09 Change R122,R252 from 100 ohm to 1K_0402_5% ohm For Intel Design Guide V1.5 request

13,14 Remove LVDS Signal from VGA Board, RV125 DIS only support EDP

14 Mirron JLVDS pin define For Layout Routing

18 Remove R347, Change R228 form 10K ohm to 1K ohm Only support Dual Channel, follow Intel design guide

22 Remove R444 Only support MAXIM14566B

23 Remove L22,C509 change to test point T30 On-die VR default support

23 Remove R483,C280 change to test point T36

24

Remove R498 change to test point T41

24

Remove L20,C302 change to test point T42

24

Remove L17,C296 change to test point T43

26 Reverse JPIO pin define Follow FFC Pin define

26 Remove SW5 Cancel function test

26 Direction connection SLP_CHG_M3, SLP_CHG_M4, Remove R1445 Only support MAXIM14566B

28 Remove LL5, add CL35 For EMI request

Change RC17 from 0 ohm to 22 ohm For xD issue

29

31 Remove RA34 Support Sleep & Music function

32 Remove R361 Pull Up 10K ohm at PCH side

33 Remove R380,R382 Don't avoid to EC entry ENE test mode10/12

33,34 Change LID +3VALW to +3VL

22,35 Change Q32,Q51 (single) to Q209 (dual) For cost reduction

35 Change R22 from 63.4 ohm to 90.9 ohm For Power Board LED request

16,2010/14 Remove HDMI signal from PCH side For support Optimus Huron River 2.0

22,3310/14 Add CIR BTO@ Reserve to CIR

1310/15 Add R566 Fine tune vga_clk sequence

5,1010/18 Remove XDP connector & other component For layout routing request

3010/18 Change USB3.0 IC from SA000048H10(ES/CS sample) to SA000048H00(QS Sample)

3310/18 Change R172 to @ Due to the pull high resister will be in Cap sensor board

3410/18 Reserve power rail +3VL for Hall sensor

4

3

On-die VR default support

On-die VR default support

On-die VR default support

On-die VR default support

2

1

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sh eet

Date: Sh eet

2

Date: Sh eet

HW-PIR

HW-PIR

HW-PIR

NHQAA LA-6831P M/B

46 48Wednesday, October 20, 2010

46 48Wednesday, October 20, 2010

46 48Wednesday, October 20, 2010

1

0.1

0.1

0.1

of

of

of