Compal Electronics LA-6858P QBU00 Cougar 2.0, NB520 Schematic

A

1 1

B

C

D

E

Compal Confidential

2 2

Cougar 2.0

Schematics Document

Intel Cedar Trail Processor/ Tiger point

3 3

2011-11-07

LA-6858P REV:1.0

4 4

Security Class ification

Security Class ification

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Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/ 27 2011/6/2 7

2010/06/ 27 2011/6/2 7

2010/06/ 27 2011/6/2 7

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

QBU00

QBU00

QBU00

1 38Monday, November 07, 2 011

1 38Monday, November 07, 2 011

1 38Monday, November 07, 2 011

E

0.3

0.3

0.3

A

B

C

D

E

Compal Confidential

Model Name : Cougar 2.0
Project Code : QBU00

1 1

Fan Control

page 26

Low Power Clock Generator

RTM890N-397

page 9

CRT Conn.

page 15

HDMI Conn.

page 16

LED Conn.

page 17

2 2

RGB

HDMI

LVDS

ONE CHANNEL

Intel Cedarview 2 Core

1.86GHz (6.5W)

(22x22mm)

DMI x 2

page 6,7,8

Memory BUS(DDRIII)

1.5V DDRIII 1066MHz

204pin DDRIII-SO-DIMM

page 10

PCIeMini Card
WWAN

PCIeMini Card
WLAN +BT COMBO

3 3

RTC CKT.

page 13

PCIe port 3

USB port 5

page 18

PCIe port 2

page 18

RJ45

page 23

USB port 6

(FULL)

(HALF)

RTL8105E
10/100 LAN

PCIe port 1

page 23

USB

5V 480MHz

PCIe 1x [2]

1.5V 2.5G Hz(250MB/s)

PCIe 1x

1.5V 2.5G Hz(250MB/s)

SPI ROM
2MB

page 26

Tiger Pointer

(17x17mm)

page 11,12,13,14

USB

5V 480MHz

USB

5V 480MHz

SATA port 0

5V 1.5GHz(1 50MB/s)

HD Audio

USB Conn X3

USB port 0,1,4

page 19

Card Reader
RTL5137

USB port 3

SATA HDD

3.3V 24.576MHz/48Mhz

page 24

Int. Camera

USB port 7

page 17

Card Reader Conn.

page 20

page 24

DC/DC Interface CKT.

page 28

3.3V 33 MHz

LPC BUS

HDA Codec

ALC269

page 21

ENE KB930 E0

Power Circuit DC/DC

page 29~35

Touch Pad

page 27

4 4

Power/B

page 27

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Int.KBD

page 27

page 25

SPI ROM 128KB

page 26

Compal Secret Data

Compal Secret Data

2010/06/ 27 2011/6/2 7

2010/06/ 27 2011/6/2 7

2010/06/ 27 2011/6/2 7

C

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Int.

page 21 page 22 page 22 page 22

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

HP CONN SPK CONNMIC CONNMIC CONN

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Block Diagrams

Block Diagrams

Block Diagrams

QBU00

QBU00

QBU00

(10A 1X) (10B 2X)

2 38Wednesd ay, June 29, 20 11

2 38Wednesd ay, June 29, 20 11

2 38Wednesd ay, June 29, 20 11

E

0.3

0.3

0.3

A

B

C

D

E

Voltage Rails

1 1

OFF

OFF

OFF

OFF

OFF

OFF

OFF

ON

ON

ON

G3

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

ON

Power Plane

VIN

B+

+CPU_CORE

Description

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

+GFX_CORE GFX support voltage

+0.75VS

+1.05VS

+1.5VS

+1.5V

+1.8VS

+3VALW

0.75V switched power rail for DDR terminator

VCCP switched power rail

1.5V switched power rail

1.5V power rail for DDR

1.8VS switched power rail

3.3V always on power rail

+3V_LAN 3.3V power rail for LAN

2 2

+3VS

+5VALW

+5VS

+VSB

+3V_WLAN

3.3V power rail for LAN

3.3V switched power rail

5V always on power rail

5V switched power rail

VSB always on power rail

+RTCVCC RTC power

+3VS_PRIME 3.3V power rail for CPU and PCH

S1 S3 S5

ON ON ON

ON ON ON ON

ON

OFF

ON

OFF OFF

ON

OFF

ON

OFF OFF

ON

OFF OFF

ON

ON

ON

OFF

ONON ON

ON

ON

ON

OFF

ON

OFF

ON

ON

OFF OFFONOFF

ON

ON

ON

ON

OFF OFF OFF

ON

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

BTO Option Table

Function

description

explain

BTO

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

SIGNAL

Mini PCI-E SLOT

Wi-Fi WWAN

WLAN@

SLP_S3#

SLP_S4#

SLP_S5#

HIGH HIGH HIGH

HIGH

LOW

LOW LOW

LOWLOW

WWAN@3G3G@

+VALW

HIGHHIGHHIGH

ON

ON

HIGH

HIGH

LOW

ON

ON

ON

Display

CRT HDMI

CRT@ HDMI@

+V +VS Clock

ON

ON

ON

OFF

OFF

ON

OFF

OFF

OFF

ONON

LOW

OFF

OFF

OFF

Clock gen

Tpye

low@ normal@

3 3

EC SM Bus1 address

Device

Smart Batte ry

Address

EC SM Bus2 address

Device

EMC1402

Address

1001 010X b0001 011X b

NM10 SM Bus address

Device

Clock Generator
(SLG8SP556VTR)

DDR DIMMA

WWAN/WLAN

4 4

A

Address

1101 001Xb

1010 000Xb

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/ 27 2011/6/2 7

2010/06/ 27 2011/6/2 7

2010/06/ 27 2011/6/2 7

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

Notes List

Notes List

QBU00

QBU00

QBU00

3 38Wednesd ay, June 29, 20 11

3 38Wednesd ay, June 29, 20 11

3 38Wednesd ay, June 29, 20 11

E

0.3

0.3

0.3

5

D D

C C

B B

4

3

2

1

A A

5

4

Security Classification

Security Classification

Security Classification

2010/06/27 2011/6/27

2010/06/27 2011/6/27

Issued Date

Issued Date

Issued Date

THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDENTIAL

THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDENTIAL

THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET M AY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECR ET INFORMATION. THIS SHEET M AY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECR ET INFORMATION. THIS SHEET M AY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/27 2011/6/27

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Power sequence

Power sequence

Power sequence

QBU00

QBU00

QBU00

4 38Wednesday, J une 29, 2011

4 38Wednesday, J une 29, 2011

4 38Wednesday, J une 29, 2011

1

0.3

0.3

0.3

DESIGN CURRENT 250mA

B+

5

4

Cougar Power Map

Ipeak=6.97A, Imax=4.88A

3

2

DESIGN CURRENT 522mA

1

+3VALWP +-5%

** The SW just is reserved.

TPS51125ARGER

D D

The power passes by jump or
0-ohm resistor.

** P-CHANNEL

AO3413

WOL_EN#

DESIGN CURRENT 300mA

+3V_LAN

Ipeak=3.98A, Imax=2.8A

DESIGN CURRENT 3010mA

+5VALWP +-5%

SUSP

N-CHANNEL

SI7326DN

DESIGN CURRENT 2286mA

+5VS

VGATE

C C

APL5930KA

DESIGN CURRENT 151mA

SUSP

N-CHANNEL

SI7326DN

P-CHANNEL

AO3413

ENVDD

DESIGN CURRENT 5586mA

DESIGN CURRENT 2000mA

+1.8VS

+3VS

+LCD_VDD

VGATE#

SUSP#

SY8033BDBC +1.05VSP +-5%

Ipeak=1.308A, Imax=4A

SI7326DN

N-CHANNEL

DESIGN CURRENT 294mA

DESIGN CURRENT 3489mA

+3VS_PRIME

VR_ON

B B

Imax=3.5A

RT8165BGQW

DESIGN CURRENT 4500mA

DESIGN CURRENT 2000mA

+CPU_COREP

+GFX_COREP

SYSON

G5603RU1U

Ipeak=19.6A, Imax=13.72A

SI7326DN

DESIGN CURRENT 2270mA

SUSP#

DESIGN CURRENT 2112mA

+1.5VP +-5%

+1.5VSP

SUSP

QBU00

QBU00

QBU00

+0.75VSP

5 38Wednesday, June 29, 2011

5 38Wednesday, June 29, 2011

5 38Wednesday, June 29, 2011

1

0.3

0.3

0.3

G2992F1U

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF CO MPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF CO MPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF CO MPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

4

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

3

DESIGN CURRENT 500mA

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Power tree

Power tree

Power tree

2

5

U1A

N2600@

U1A

N2600@

CEDARVIEW

CEDARVIEW

REV = 1.10

DMI_RXP0_C

D D

+1.5VS

CLK_CPU_EXP<9>
CLK_CPU_EXP#<9>

R973 0_0402_5%R973 0_0402_5%

+1.5V pull up must be placed
within 500 mils from Cedarview

DMI_RXP0<12>

DMI_RXN0<12>

C C

B B

A A

DMI_RXP1<12>

DMI_RXN1<12>

C203

C203

68P_0402_50V8J

68P_0402_50V8J

DMI_RXN0_C
DMI_RXP1_C
DMI_RXN1_C

C948

C948

C949

C949

C950

C950

C951

C951

DMI_REF1P5

1 2

1 2

1 2

1 2

68P_0402_50V8J

68P_0402_50V8J

12

+5VALW +1.5V

1

1

C1050

C1050

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

L3

L2
M3
M2

N2

N1

P2

P3

N9

N8

T2

1

C1088

C1088

2

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C204

C204

2

DMI_RXP0
DMI_RXN0
DMI_RXP1
DMI_RXN1
DMI_RXP2
DMI_RXN2
DMI_RXP3
DMI_RXN3

DMI_REFCLKP
DMI_REFCLKN
DMI_REF1P5

QB0Z B2 1.6G

QB0Z B2 1.6G

DMI_RXP0_C

DMI_RXN0_C

DMI_RXP1_C

DMI_RXN1_C

1

C1065

C1065

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

REV = 1.10

DMI

DMI

1 OF 6

1 OF 6

XDP_DBREST#<7>

PCH_POK< 13>

4

DMI_TXP0

DMI_TXN0

DMI_TXP1

DMI_TXN1

DMI_TXP2

DMI_TXN2

DMI_TXP3

DMI_TXN3

RSVD_TP_R8
RSVD_TP_R7

DMI_RCOMP

SYSON#<28>

?

?

1 2

K6
K5
L5
L6
L9
L8
N5
N6

R8

T1T1

R7

T2T2

T1

SYSON#

2

G

G

R966

R966

@

@

1 2

R967 0_0402_5%R967 0_0402_5%

1 2

1 2

R968

R968

R969

R969
10K_0402_5%

10K_0402_5%

DMI_TXP0 <12>
DMI_TXN0 <12>
DMI_TXP1 <12>
DMI_TXN1 <12>

R493

R493

7.5K_0402_5%

7.5K_0402_5%

Q37

Q37

2N7002_SOT23

2N7002_SOT23

PCH_POK_RDRAM_VR_PWR GD

DMI_REF1P5DMI_IRCOMP

SMPWROK

1

2

1 2

R880 10K_0402_5%@R880 10K_0402_5%

C1063 0.1U_0402_16V4Z@C1063 0.1U_0402_16V4Z

@

@

DDR_DQPU

12

R893

R893

33.2_0402_1%

33.2_0402_1%

1 2

+1.5V pull up must be placed
within 500 mils from Cedarview

13

D

D

S

S

0_0402_5%

0_0402_5%

12.1K_0402_1%

12.1K_0402_1%

3

DDR_A_MA[0..15]<10>

DDR_A_DQS#[0..7]<10>

DDR_A_DM[0..7]<10>

DDR_A_DQS[0..7]<10>

DDR_A_D[0..63]<10>

DRAMRST#<10>

CLK_CPU_MPLL_C<9>
CLK_CPU_MPLL#_C<9>

SM_PWROK<33>

+1.5V

12

R500

R500

1K_0402_1%

1K_0402_1%

12

R504

R504

1K_0402_1%

1K_0402_1%

1

@

@

C952 0.01U_0402_16V7K

C952 0.01U_0402_16V7K

2

DDR_A_WE#<10>
DDR_A_CAS#<10>
DDR_A_RAS#<10>

DDR_A_BS0<10>
DDR_A_BS1<10>
DDR_A_BS2<10>

DDR_CS2#<10>
DDR_CS3#<10>

DDR_CKE2<10>
DDR_CKE3<10>

M_ODT2<10>
M_ODT3<10>

M_CLK_DDR2<10>
M_CLK_DDR#2<10>
M_CLK_DDR3<10>
M_CLK_DDR#3<10>

R878

@R878

@

1 2

+1.5V

10K_0402_5%

10K_0402_5%

R883 0_0402_5%R883 0_0402_5%

1 2
1 2

R892 0_0402_5%R892 0_0402_5%

0_0402_5%

0_0402_5%

R881

R881

1 2

DDR_VREF

1

C953

C953

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

DDR_CS2#
DDR_CS3#

DDR_CKE2
DDR_CKE3

M_ODT2
M_ODT3

M_CLK_DDR2
M_CLK_DDR#2
M_CLK_DDR3
M_CLK_DDR#3

DDR_VREF

CLK_CPU_MPLL
CLK_CPU_MPLL#

SMPWROK

DRAM_VR_PWR GD

DDR_ODTPU
DDR_CMDPU
DDR_DQPU

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

R553

R553

22.6_0402_1%

22.6_0402_1%

R503

R503

DDR_ODTPU

1 2

270_0402_1%

270_0402_1%

AK14
AK16

AJ14

AJ16
AK18
AH18

AJ18
AK20

AJ20
AH20

AJ12
AK21

AJ21

AH22

AJ22

AH10

AJ10

AJ11

AK12
AH13
AK22

AH12

AK11

AH23

AJ24
AK24
AH24

AK10

AG15

AF15

AF17
AG17
AD17
AC17
AC15
AD15

AK25

AJ27

AL28

AC19
AB19

AJ26

AJ25
AK27

AB11
AB13

AF19
AG19

AB26
AE30
AB21
AG11

DDR_CMDPU

2

N2800@

N2800@

U1

U1
QB0Y B2 1.86G

QB0Y B2 1.86G

U1B

U1B

DDR3_MA0
DDR3_MA1
DDR3_MA2
DDR3_MA3
DDR3_MA4
DDR3_MA5
DDR3_MA6
DDR3_MA7
DDR3_MA8
DDR3_MA9
DDR3_MA10
DDR3_MA11
DDR3_MA12

AJ8

DDR3_MA13
DDR3_MA14
DDR3_MA15

DDR3_WE#
DDR3_CAS#
DDR3_RAS#

DDR3_BS0
DDR3_BS1
DDR3_BS2

DDR3_CS#0

AH8

DDR3_CS#1
DDR3_CS#2

AK8

DDR3_CS#3

DDR3_CKE0
DDR3_CKE1
DDR3_CKE2
DDR3_CKE3

DDR3_ODT0

AK7

DDR3_ODT1

AL9

DDR3_ODT2

AJ7

DDR3_ODT3

DDR3_CK0
DDR3_CK#0
DDR3_CK1
DDR3_CK#1
DDR3_CK2
DDR3_CK#2
DDR3_CK3
DDR3_CK#3

DDR3_DRAMRST#

DDR3_VREF
DDR3_VREF_NCTF

DDR3_REFP
DDR3_REFN

AA5

DDR3_DRAM_PW ROK

W7

DDR3_VCCA_PW ROK

DDR3_ODTPU
DDR3_CMDPU
DDR3_DQPU

RSVD_TP_AB11
RSVD_TP_AB13
RSVD_TP_AF19
RSVD_TP_AG19

Y28

DDR3_DM0
DDR3_DM1
DDR3_DM2
DDR3_DM3
DDR3_DM4

AG2

DDR3_DM5

AB8

DDR3_DM6

AA3

DDR3_DM7

QB0Z B2 1.6G

QB0Z B2 1.6G

N2600@

N2600@

DDR3

DDR3

CEDARVIEW

CEDARVIEW

?

?

REV = 1.10

REV = 1.10

DDR3_DQ0
DDR3_DQ1
DDR3_DQ2
DDR3_DQ3
DDR3_DQ4
DDR3_DQ5
DDR3_DQ6
DDR3_DQ7
DDR3_DQ8

DDR3_DQ9
DDR3_DQ10
DDR3_DQ11
DDR3_DQ12
DDR3_DQ13
DDR3_DQ14
DDR3_DQ15
DDR3_DQ16
DDR3_DQ17
DDR3_DQ18
DDR3_DQ19
DDR3_DQ20
DDR3_DQ21
DDR3_DQ22
DDR3_DQ23
DDR3_DQ24
DDR3_DQ25
DDR3_DQ26
DDR3_DQ27
DDR3_DQ28
DDR3_DQ29
DDR3_DQ30
DDR3_DQ31
DDR3_DQ32
DDR3_DQ33
DDR3_DQ34
DDR3_DQ35
DDR3_DQ36
DDR3_DQ37
DDR3_DQ38
DDR3_DQ39
DDR3_DQ40
DDR3_DQ41
DDR3_DQ42
DDR3_DQ43
DDR3_DQ44
DDR3_DQ45
DDR3_DQ46
DDR3_DQ47
DDR3_DQ48
DDR3_DQ49
DDR3_DQ50
DDR3_DQ51
DDR3_DQ52
DDR3_DQ53
DDR3_DQ54
DDR3_DQ55
DDR3_DQ56
DDR3_DQ57
DDR3_DQ58
DDR3_DQ59
DDR3_DQ60
DDR3_DQ61
DDR3_DQ62
DDR3_DQ63

DDR3_DQS0
DDR3_DQS1
DDR3_DQS2
DDR3_DQS3
DDR3_DQS4
DDR3_DQS5
DDR3_DQS6
DDR3_DQS7

DDR3_DQS#0
DDR3_DQS#1
DDR3_DQS#2
DDR3_DQS#3
DDR3_DQS#4
DDR3_DQS#5
DDR3_DQS#6
DDR3_DQS#7

1

DDR_A_D0

Y30

DDR_A_D1

Y29

DDR_A_D2

AC30

DDR_A_D3

AC31

DDR_A_D4

W31

DDR_A_D5

W28

DDR_A_D6

AB28

DDR_A_D7

AB30

DDR_A_D8

AA24

DDR_A_D9

AA22

DDR_A_D10

AE27

DDR_A_D11

AE26

DDR_A_D12

AB27

DDR_A_D13

AA25

DDR_A_D14

AD25

DDR_A_D15

AD27

DDR_A_D16

AD29

DDR_A_D17

AE29

DDR_A_D18

AJ30

DDR_A_D19

AK29

DDR_A_D20

AD28

DDR_A_D21

AD30

DDR_A_D22

AG30

DDR_A_D23

AJ29

DDR_A_D24

AE24

DDR_A_D25

AG24

DDR_A_D26

AD22

DDR_A_D27

AC21

DDR_A_D28

AG27

DDR_A_D29

AG25

DDR_A_D30

AG21

DDR_A_D31

AE21

DDR_A_D32

AD13

DDR_A_D33

AD11

DDR_A_D34

AG8

DDR_A_D35

AG7

DDR_A_D36

AG13

DDR_A_D37

AE13

DDR_A_D38

AD10

DDR_A_D39

AF8

DDR_A_D40

AH2

DDR_A_D41

AG3

DDR_A_D42

AD2

DDR_A_D43

AD3

DDR_A_D44

AH4

DDR_A_D45

AK3

DDR_A_D46

AE2

DDR_A_D47

AD4

DDR_A_D48

AD7

DDR_A_D49

AD6

DDR_A_D50

AA6

DDR_A_D51

AB5

DDR_A_D52

AE8

DDR_A_D53

AE5

DDR_A_D54

AB9

DDR_A_D55

AA8

DDR_A_D56

AB2

DDR_A_D57

AB4

DDR_A_D58

W4

DDR_A_D59

V3

DDR_A_D60

AC2

DDR_A_D61

AB3

DDR_A_D62

Y2

DDR_A_D63

W1

DDR_A_DQS0

AA30

DDR_A_DQS1

AB24

DDR_A_DQS2

AF30

DDR_A_DQS3

AE22

DDR_A_DQS4

AG10

DDR_A_DQS5

AF4

DDR_A_DQS6

AB6

DDR_A_DQS7

Y3

DDR_A_DQS#0

AA31

DDR_A_DQS#1

AB25

DDR_A_DQS#2

AF29

DDR_A_DQS#3

AF22

DDR_A_DQS#4

AF10

DDR_A_DQS#5

AF3

DDR_A_DQS#6

AB7

DDR_A_DQS#7

AA2

?2 OF 6

?2 OF 6

2010.07.12 RF request

5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Cedarview(1/3)

Cedarview(1/3)

Cedarview(1/3)

QBU00

QBU00

QBU00

6 38Wednesday, November 02, 2011

6 38Wednesday, November 02, 2011

6 38Wednesday, November 02, 2011

1

0.3

0.3

0.3

5

GMCH_CRT_DATA
GMCH_CRT_CLK

U1C

N2600@

U1C

H25

J22

C8
B8

H22

G2
G3
F3
F2
D4
C3
B7
A7

H15

J15

F25

G27

D10
C10

D26

E11

F11
J11

H11

F13

E13

J13

K13

J17

H17

E15

F15

H21

F22

E22

F21

E21

N2600@

DDI0_DDC_S CL
DDI0_DDC_S DA

DDI0_AUXP
DDI0_AUXN

DDI0_HPD

DDI0_TXP0
DDI0_TXN0
DDI0_TXP1
DDI0_TXN1
DDI0_TXP2
DDI0_TXN2
DDI0_TXP3
DDI0_TXN3

RSVD_TP_H1 5
RSVD_TP_J1 5

DDI1_DDC_S CL
DDI1_DDC_S DA

DDI1_AUXP
DDI1_AUXN

DDI1_HPD

DDI1_TXP0
DDI1_TXN0
DDI1_TXP1
DDI1_TXN1
DDI1_TXP2
DDI1_TXN2
DDI1_TXP3
DDI1_TXN3

RSVD_TP_J1 7
RSVD_TP_H1 7

BREF1P5V
BREFREXT

AZIL_BCL K
AZIL_SYNC

AZIL_SDI
AZIL_SDO

AZIL_RST#

QB0Z B2 1.6G

QB0Z B2 1.6G

HDMICLK_C<16>

HDMIDAT_C<16>

R903

0_0402_ 5%

0_0402_ 5%

HDA_SDIN1<13>

CRT@

CRT@

R1002 0 _0402_5%CRT@ R100 2 0_0402_ 5%CRT@

1 2
1 2

R1003 0_0402_5%CRT@ R100 3 0_0402_ 5%CRT@

HPD_C<16>

1 2

R1005 0 _0402_5%CRT@ R100 5 0_0402_ 5%CRT@

HDMI_TXD2+<16>
HDMI_TXD2-<16>
HDMI_TXD1+<16>
HDMI_TXD1-<16>
HDMI_TXD0+<16>
HDMI_TXD0-<16>
HDMI_CLK0 +<1 6>
HDMI_CLK0 -<16>

R1009 0 _0402_5%R10 09 0_0402 _5%

1 2
1 2

R1010 0 _0402_5%R10 10 0_0402 _5%

BREF_1.5 V

12

1

C1120

2

1U_0402_6.3V6K

1U_0402_6.3V6K

HDMI@ C1120

HDMI@

HDMI@ R97 4

HDMI@

7.5K_04 02_1%

7.5K_04 02_1%

1 2

R904 0_ 0402_5%

R904 0_ 0402_5%

HDA_BITCLK_ CPU<13>
HDA_SYNC_CP U<13 >

HDA_SDOUT_C PU<13>

HDA_RST#_CP U<1 3>

R974

1 2

+1.5VS

HDMI@

HDMI@

R90533_0402_5 %

R90533_0402_5 %

1 2

12

HDMICLK_C
HDMIDAT_C

HPD_C

HDMI_TXD2+
HDMI_TXD2­HDMI_TXD1+
HDMI_TXD1­HDMI_TXD0+
HDMI_TXD0­HDMI_CLK0 +
HDMI_CLK0 -

HDMI@

HDMI@

R975

R975

0_0402_ 5%

0_0402_ 5%

BREF_1.5 V
BREFREXT

HDA_BITCLK_ CPU
HDA_SYNC_CP U

HDA_SDIN1 _CPU
HDA_SDOUT_C PU

HDA_RST#_CP U

D D

CRT@ R903

CRT@

C C

B B

A A

CEDARVIEW

CEDARVIEW

DDI

DDI

IHDA

IHDA

?

?

REV = 1.10

REV = 1.10

LVDS VGA

LVDS VGA

3 OF 6

3 OF 6

HDMI@

HDMI@

R10060_0402_5 %

R10060_0402_5 %

12
12

R10070_0402_5 %

R10070_0402_5 %

HDMI@

HDMI@

CRT_HSYNC
CRT_VSYNC

CRT_RED

CRT_GREEN

CRT_BLUE

CRT_IRTN
CRT_IREF

CRT_DDC_DATA

CRT_DDC_CLK

DPL_REFS SCCLKP

DPL_REFS SCCLKN

DPL_REFCL KP
DPL_REFCL KN

LVDS_CTRL_ CLK

LVDS_CTRL_ DATA

LVDS_DDC_ CLK

LVDS_DDC_ DATA

LVDS_IBG

LVDS_VB G

LVDS_VRE FH
LVDS_VRE FL

LVDS_TXP0
LVDS_TXN0
LVDS_TXP1
LVDS_TXN1
LVDS_TXP2
LVDS_TXN2
LVDS_TXP3
LVDS_TXN3

LVDS_CLK P
LVDS_CLK N

PANEL_B KLTCTL

PANEL_B KLTEN

PANEL_V DDEN

?

?

4

18P_040 2_50V8J

18P_040 2_50V8J

D14
C14

GMCH_CRT_R

B12

GMCH_CRT_G

B11

GMCH_CRT_B

C11

CRT_IRTN

D12

DAC_IREF

A13

E29
E27

CPU_SSCDRE FCLK

F17

CPU_SSCDRE FCLK#

E17

CPU_DREFCL K_C

B9

CPU_DREFCL K#_C

A9

LVDS_VTRL _CLK

F28

LVDS_VTRL _DATA

E24

G24
H24

L_IBG

E10
F10

H2
H3

G10
H10
F8
E8
H7
H8
G5
G6

H4
J4

G22
E25
F29

To be placed <250 mils to U1 ball

GMCH_CRT_R

GMCH_CRT_G

GMCH_CRT_B

XDP_TDI_R

XDP_TMS_R

XDP_TDO_R

XDP_TRST#_R

XDP_TCK_R

XDP_PREQ #

XDP_PRDY#

SVID_ALE RT#

SVID_DATA

H_PROCHOT#

XDP_DBRE ST#

R509

R509

2.37K_0 402_1%

2.37K_0 402_1%

ENBKL

R495

R495

R496

R496

R499

R499

R502

R502

R505

R505

R501

R501

R906

R906

GMCH_CRT_HSYNC <15>
GMCH_CRT_VS YNC <15 >

GMCH_CRT_R <15 >
GMCH_CRT_G <15>
GMCH_CRT_B <15>

R1008 0_0402 _5%CRT@ R100 8 0_0402_5%CRT@

R510 681 _0402_1%CRT@ R510 681_040 2_1%CRT@

GMCH_CRT_DATA <1 5>
GMCH_CRT_CLK <1 5>

R897

@R89 7

@
1 2
1 2

R898 0 _0402_5%@ R898 0 _0402_5%@

LCD_EDID_ CLK <17>

LCD_EDID_ DATA <17>

R509 be placed U1.R22

LCD_TXOUT0+ <17 >

LCD_TXOUT0- <1 7>

LCD_TXOUT1+ <17 >

LCD_TXOUT1- <1 7>

LCD_TXOUT2+ <17 >

LCD_TXOUT2- <1 7>

LCD_TXCLK+ <17>

LCD_TXCLK- <17>

GMCH_INVT_P WM <1 7>

ENBKL <25>

GMCH_ENVDD <17>

RV155 150_040 2_1%CR T@ RV155 150_040 2_1%CRT@

1 2

RV156 150_040 2_1%CR T@ RV156 150_040 2_1%CRT@

1 2

RV157 150_040 2_1%CR T@ RV157 150_040 2_1%CRT@

1 2

1 2

51_0402 _5%

51_0402 _5%

1 2

51_0402 _5%

51_0402 _5%

1 2

51_0402 _5%

51_0402 _5%

1 2

51_0402 _5%

51_0402 _5%

1 2

51_0402 _5%

51_0402 _5%

1 2

51_0402 _5%

51_0402 _5%

1 2

51_0402 _5%

51_0402 _5%

R907

R907

75_0402 _5%

75_0402 _5%

R908

R908

110_040 2_1%

110_040 2_1%

R511

R511

100_040 2_5%

100_040 2_5%

R971

R971

1K_0402 _1%

1K_0402 _1%

CPU_SSCDRE FCLK < 9>
CPU_SSCDRE FCLK# <9>

0_0402_ 5%

0_0402_ 5%

12

12

12

12

C1076

C1076

12

R894 1M_040 2_5%R894 1M_040 2_5%

1 2

Y3

Y3

27MHZ_18 PF_X3S027 000FI1H-X

27MHZ_18 PF_X3S027 000FI1H-X

1 3
2 4

1

2

+3VS

CPU_DREFCL K <9>
CPU_DREFCL K# <9>

R899

2.2K_0402_5%

R899

2.2K_0402_5%

1 2

ENBKL

To be placed <500 mils to U1 ball

+1.05VS

+1.8VS

+1.05VS

+3VS

3

R900

R900

2.2K_0402_5%

2.2K_0402_5%

1 2

R901

R901

R517

R517

100K_04 02_5%

100K_04 02_5%

49.9_0402_1%

49.9_0402_1%

CPU_DREFCL K#_CCPU_DREFCL K_C

1

2

H_RSVD_K 26

12

12

C1077

C1077

18P_040 2_50V8J

18P_040 2_50V8J

49.9_0402_1%

49.9_0402_1%

R902

R902

XDP_TCK_R
XDP_TDI_R
XDP_TDO_R
XDP_TMS_R
XDP_TRST#_R

L26

L27
K28
K25

J28
K26
K27
H27
K30

L29

L30
K29

J31
H30

K24
K23

C25
C24
B25
D24
B24

R5

R6
W25
W26
N24
N25

U1D

N2600@

U1D

N2600@

RSVD_L26
STRAP_L27
STRAP_K28
RSVD_K25
RSVD_J28
RSVD_K26
RSVD_K27
RSVD_H27
RSVD_K30
RSVD_L29
RSVD_L30
RSVD_K29
RSVD_J31
RSVD_H30

HV_GPIO_ RCOMP
MV_GPIO_ RCOMP

TCLK
TDI
TDO
TMS
TRST#

RSVD_R5
RSVD_R6
RSVD_W 25
RSVD_W 26
RSVD_N24
RSVD_N25

QB0Z B2 1.6G

QB0Z B2 1.6G

?

?

CEDARVIEW

CEDARVIEW

C969

C969

1 2

1 2

+3VS

R524 10 K_0402_5%R524 10K_0402 _5%

?

?

REV = 1.10

REV = 1.10

SMI#
NMI/LINT10
RSVD_C18

STPCLK#

ICH

ICH

DPRSTP#

DPLSLP#

CPUSLP#

INIT#

INTR/LINT00

THERMTRIP#

RSVD_L11

PBE#

PROCHOT#
PWRGOO D

RESET#

DBR#

PRDY#
PREQ#

HPLL_REF CLK_P

HPLL_REF CLK

CPU

CPU

4 OF 6

4 OF 6

+3VS

1

C968

C968

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2200P_0 402_50V7 K

2200P_0 402_50V7 K

RSVD_E19
RSVD_F19

SVID_ALE RT#

SVID_CLK

SVID_DATA

RSVD_K21
RSVD_L22
RSVD_L24

CPU THERMAL SENSOR

U2

U2

1

H_THERMDA

H_THERMDC

CPU_THERM#

VDD

2

DP

3

DN

THERM#4GND

EMC1402-1 -ACZL-TR_MSOP8

EMC1402-1 -ACZL-TR_MSOP8

Address:0100_1100 EMC1402-1
Address:0100_1101 EMC1402-2

2

B18
C22
C18
D22

C21
B21
B22

A23
D20

B20
L11

C20

A19
D23
G30
E30

H29
G29

J19
K19

E19
F19

B16
D18
C16

K21
L22
L24

H_FERR#_C PU

1 2

R895 0_0 402_5%R895 0_0402_5 %

1 2

R896 0_0 402_5%R896 0_0402_5 %

H_SMI#
H_NMI
H_A20M#_ C
H_STPCLK#

H_DPRSTP#
H_DPSLP#
H_CPUSLP #

H_INIT#
H_INTR

H_THERMTRIP#

H_FERR#_C PU

H_PROCHOT#
H_PWRG D
PLTRST#
XDP_DBRE ST#XDP_DBRE ST#

XDP_PRDY#

XDP_PREQ #

CLK_CPU_ HPLCLK
CLK_CPU_ HPLCLK#

SVID_ALE RT#
SVID_CLK
SVID_DATA

8

SMCLK

7

SMDATA

6

ALERT#

5

H_SMI# <11>
H_NMI <11>

H_STPCLK# <11>

H_DPRSTP# <13>

H_DPSLP# <13>

H_CPUSLP # <11>

H_INIT# <11>
H_INTR <11>

H_THERMTRIP# <11 >

Close to CPU

R958 0 _0402_5%R9 58 0_040 2_5%

1 2

H_PWRG D <13 >

PLTRST# <13,18 ,23>

XDP_DBRE ST# <6>

SVID_ALE RT# <35>

SVID_CLK <35>

SVID_DATA <35>

EC_SMB_C K2

EC_SMB_D A2

R523 10K_040 2_5%R523 1 0K_0402_5 %

H_FERR#

H_A20M#H_A20M#_ C

VR_HOT

H_FERR# <11 >

H_A20M# <11 >

VR_HOT <35>

2011.05.06 Add 0 ohm for XDP signal.

CLK_CPU_ HPLCLK <9>
CLK_CPU_ HPLCLK# <9>

REMOTE Thermal sensor

H_THERMDA

C190

2200P_0 402_50V7 K

2200P_0 402_50V7 K

H_THERMDC

12

EC_SMB_C K2 <25>

EC_SMB_D A2 <25>

+3VS

place near the hottest spot area for
NB & top SODIMM.

Layout Note:

1

C

C

Q8

Q8

2

B

B

MMBT3904W H_SOT323-3

MMBT3904W H_SOT323-3

E

E

3 1

2

@C190

@

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Custom

Custom

Custom

Cedarview(2/3)

Cedarview(2/3)

Cedarview(2/3)

QBU00

QBU00

QBU00

1

7 38Wednesday, N ovember 02, 2011

7 38Wednesday, N ovember 02, 2011

7 38Wednesday, N ovember 02, 2011

0.3

0.3

0.3

+1.05VS

723mA

R525

R525

1 2

0_0805_5%

0_0805_5%

C971

C971

@

@

D D

R526

R526

1 2

0_0603_5%

0_0603_5%

R956

R956

1 2

0_0603_5%

0_0603_5%

R910

R910

1 2

0_0603_5%

0_0603_5%

R531

R531

1 2

0_0603_5%

0_0603_5%

C C

CRT@

CRT@

R1004

R1004

1 2

0_0603_5%

0_0603_5%

CRT@

CRT@

+1.5V

1 2

R530

R530

0_0603_5%

0_0603_5%

Please closed U 1 ball

+1.5V

R527

R527

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

1 2

0_1206_5%

0_1206_5%

2

C979

C979

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

R919

R919

1 2

0_0603_5%

0_0603_5%

R922

R922

1 2

0_0603_5%

0_0603_5%

@

@

R927

R927

1 2

0_0603_5%

0_0603_5%

1

B B

+1.5VS

A A

5

R909

1

1

C973

C973

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

C973 1UF for
CPU pin V4

1

C1080

C1080

2

1U_0402_6.3V6K

1U_0402_6.3V6K

C1080 1UF for
CPU pin L19

+VCCA_VDDR

1

C1084

C1084

2

@

@

1U_0402_6.3V6K

1U_0402_6.3V6K

+VCCADP_1.05

1

C1086

C1086

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+VCCCK_DDR

1

C993

C993

2

1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

+VCCADMI_1.5VS

1U_0402_6.3V6K

1U_0402_6.3V6K

+VCCAGPIO1.5V

C1101

C1101

@

@

0.1U_0402_10V6K

0.1U_0402_10V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

R909

0_0603_5%

0_0603_5%

+1.05VS

C1081

C1081

Close Chipset pin

+3VS_PRIME

+VCC_SM

+VCCDMPL

C1078

C1078

@

@

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

1

+

+

2

330U_D2_2.5VY_R9M

330U_D2_2.5VY_R9M

HDMI@

HDMI@

2

1

R913

R913

1 2

0_0603_5%

0_0603_5%
R914

R914

1 2

0_0603_5%

0_0603_5%

+VCCAZILAON

+VCCPLLCPU0
+VCCPLLCPU1

+VCCAHPLL

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M
C1092

C1092

+VCCA_VCCD

+1.05VS_EAST

+VCCA_VCCD

+VCCA_VDDR

+VCCCK_DDR

+VCC_SM

+VCCADP_1.05

+VCCADP0_SFR
+VCCADP1_SFR

+1.05VS_EAST
+VCCAGPIO1.5V
+VCCAGPIO1.8V

+VCCAGPIO3.3V

+VCC_CRT_DAC

+VCCALVDS
+VCCDLVDS

+VCCSFRMPL
+VCCDMPL

+VCCAGPIO3.3V

2

1 2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

+1.8VS

R916

R916

1 2

0_0603_5%

0_0603_5%

1U_0402_6.3V6K

1U_0402_6.3V6K

R921

R921

1 2

0_0603_5%

0_0603_5%

CRT@

CRT@

R535

R535

1 2

0_0603_5%

0_0603_5%

HDMI@

HDMI@

C1125

C1125

CRT@

CRT@

0_0603_5%

0_0603_5%

@

@

1 2

+1.05VS+1.05VS +1.05VS

1

C983

C983

2

0.1uH use
0 ohm replace

+VCC_CRT_DAC+VCC_CRT_DAC

10U_0603_6.3V

10U_0603_6.3V

12

C1125

C1125

R928

R928

0_0603_5%

0_0603_5%

C1106

C1106

@

@

1 2

R918 0_0402_5%R918 0_0402_5%

C1100

C1100

2011.04.25 Add for RGB I/F

R925

R925
0_0603_5%

0_0603_5%

1 2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

1

C1127

C1127

2

2

+VCCA_VCCD

1

1

C972

C972

C970

C970

2

2

@

@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

22U_0805_6.3V6M

22U_0805_6.3V6M

+1.05VS_EAST

1

C1079

C1079

2

@

@

1U_0402_6.3V6K

1U_0402_6.3V6K

C1079 1UF for
CPU pin N30,N31

1

1

C1083

C1083

C1082

C1082

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+VCC_DMI

1

2011.04.25 Add for RGB I/F

C994

C994

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+VCCDIO

1

HDMI@

HDMI@

C166

C166

C166

C166

0_0402_5%

0_0402_5%

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C992

C992

2

22U_0805_6.3V6M

22U_0805_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2

2

C980

C980

C981

C981

C982

C982

1

1

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

1

C1097

C1097

2

2

1

+1.5VS +1.5VS +1.5VS

R924

R924
0_0603_5%

0_0603_5%

1 2

+VCCADP0_SFR +VCCADP1_SFR

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

C1104

C1104

C1126

C1126

2

@

@

5

+VCCDIO

+VCCAZILAON

2

C1093

1

HDMI@C1093

HDMI@

+VCCAGPIO1.8V

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4

AA14
AA16

W16
W18

N30
N31

W8
W9

W11
W13

AJ6

AK6

AH14
AH19

AK23

AK5
AL11
AL16
AL21

AG31

K17

L18

L19
L16

N18

D30

D31

B13

L21

B29

A30

AA18
AA11

B27

C29

B30

B26

CRT@

CRT@

C1093

C1093
0_0402_5%

0_0402_5%

+VCCDLVDS

+VCCALVDS

1

C986

C986

2

4

U1E

U1E

VCCADDR_1
VCCADDR_2
VCCADDR_3
VCCADDR_4

VCCRAMXXX_1
VCCRAMXXX_2

V4

VCCRAMXXX_3

VCCACKDDR_1
VCCACKDDR_2

VCCADLLDDR_1
VCCADLLDDR_2

VCCCKDDR_1
VCCCKDDR_2

V_SM_1
V_SM_2
V_SM_3
V_SM_4
V_SM_5
V_SM_6
V_SM_7
V_SM_8

B5

VCCADP_1

C6

VCCADP_2

D6

VCCADP_3

VCCADP0_SFR
VCCADP1_SFR

VCCAGPIO_LV
VCCAGPIO_REF
VCCAGPIO_DIO

VCCAGPIO_1
VCCAGPIO_2

VCCADAC

H5

VCCALVDS

J1

VCCDLVDS

VCCDIO

VCCAZILAON_1
VCCAZILAON_2

VCCSFRMPL
VCCDMPL

VCCPLLCPU0
VCCPLLCPU1_ 1
VCCPLLCPU1_ 2

VCCAHPLL

QB0Z B2 1.6G

QB0Z B2 1.6G

+1.05VS

N2600@

N2600@

R917

R917

1 2

0_0603_5%

0_0603_5%

R920

R920

1 2

0_0603_5%

0_0603_5%

R923

R923

1 2

0_0603_5%

0_0603_5%

@

@

R929

R929

1 2

0_0603_5%

0_0603_5%

3

?

?

CEDARVIEW

CEDARVIEW

REV = 1.10

DDR

DDR

REV = 1.10

POWER

POWER

CPU

CPU

DMI

DMI

VCC_CPU_01
VCC_CPU_02
VCC_CPU_03
VCC_CPU_04
VCC_CPU_05
VCC_CPU_06
VCC_CPU_07
VCC_CPU_08
VCC_CPU_09
VCC_CPU_10
VCC_CPU_11
VCC_CPU_12
VCC_CPU_13
VCC_CPU_14
VCC_CPU_15
VCC_CPU_16
VCC_CPU_17
VCC_CPU_18
VCC_CPU_19
VCC_CPU_20
VCC_CPU_21
VCC_CPU_22
VCC_CPU_23
VCC_CPU_24
VCC_CPU_25
VCC_CPU_26
VCC_CPU_27
VCC_CPU_28
VCC_CPU_29

VCC_GFX_01
VCC_GFX_02
VCC_GFX_03
VCC_GFX_04
VCC_GFX_05
VCC_GFX_06
VCC_GFX_07
VCC_GFX_08
VCC_GFX_09
VCC_GFX_10
VCC_GFX_11

VCCADMI_PLLSFR

PLL

PLL

5 OF 6

5 OF 6

+VCCPLLCPU0

1U_0402_6.3V6K

1U_0402_6.3V6K
10U_0805_10V4Z

10U_0805_10V4Z

1

1

2

2

C1094

C1094

C1095

C1095

+VCCPLLCPU1

10U_0805_10V4Z

10U_0805_10V4Z

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

2

2

C1098

C1098

C1099

C1099

+VCCAHPLL

1U_0402_6.3V6K

1U_0402_6.3V6K
10U_0805_10V4Z

10U_0805_10V4Z

1

1

2

2

C1103

C1103

C1102

C1102

R926

R926
0_0603_5%

0_0603_5%

1 2

+VCCSFRMPL

10U_0805_10V4Z

10U_0805_10V4Z

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

C1109

@

@

C1109

2

2

C1108

C1108

VCC_CPUSENSE
VSS_CPUSENSE

VCC_GFXSENSE

VSS_GFXSENSE

VCCTHRM_1
VCCTHRM_2

?

?

4234mA

1U_0402_6.3V6K

1U_0402_6.3V6K

P18
P19
P21
P28
P29
P30
R22
R23
R24
R25
R26
R27
T19
T21
T29
T30
T31
U22
U23
U24
U25
U26
U27
V18
V19
V21
V28
V29
V30

+GFX_CORE

1938mA

N11
N13
P11
P13
R10
R9
T11
T13
U10
V11
V13

+VCC_DMI

B4

VCCADMI_1

C5

VCCADMI_2

A4

VCCADMI_3

VCCFHV_1
VCCFHV_2

VCCFHV_3

K4

V16
T16

V14

VCCSENSE

M28

VSSSENSE

M30

VCC_GFXSENSE

U8

VSS_GFXSENSE

U7

N16
K2

+VCCADMI_1.5VS

+VCCATHRM

1

C1089

C1089

@

@

2

VCC_GFXSENSE
VSS_GFXSENSE

+GFX_CORE

1

C1005

C1005

2

22U_0805_6.3V6M

22U_0805_6.3V6M

Close Chipset pin

2011.06.14 Stuff C1007,C1008,C1009 for EDS issue

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL
AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

3

4.7U_0603_6.3V6K

1

C974

C974

2

1U_0402_6.3V6K

1U_0402_6.3V6K

4.7U_0603_6.3V6K

1

C975

C975

2

1

1

C976

C976

2

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

C977

C977

Please closed U 1 ball

+CPU_CORE

2 x 330uF(9mohm/2)

1

+

+

C984

C984

330U_D2_2.5VY_R9M

330U_D2_2.5VY_R9M

1

C991

C991

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

R912

R912

R915

R915

1

C1009

C1009

2

1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C1085

C1085

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

10U_0805_10V4Z

10U_0805_10V4Z

C1090

C1090

VCC_GFXSENSE <35>
VSS_GFXSENSE <35>

1

1

+

+

C1004

C1004

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

Compal Secret Data

Compal Secret Data

Compal Secret Data

+CPU_CORE

1

1

C990

C990

C989

C989

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

+VCCA_VCCD

R911

R911

1 2

0_0603_5%

0_0603_5%

+GFX_CORE

1U_0402_6.3V6K

1U_0402_6.3V6K

12

100_0402_5%

100_0402_5%

12

100_0402_5%

100_0402_5%

1

1

C1008

C1008

C1007

C1007

C1006

C1006

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

1

1

C988

C988

@

@

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+CPU_CORE

12

100_0402_5%

100_0402_5%

12

+1.8VS

100_0402_5%

100_0402_5%

1

+

+

C1096

C1096

2

330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

Deciphered Date

Deciphered Date

Deciphered Date

C987

C987

@

@

R532

R532

R533

R533

+CPU_CORE

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

C996

C996

@

@

2

1

+

+

C985

C985

330U_D2_2.5VY_R9M

330U_D2_2.5VY_R9M

2

VCCSENSE <35>
VSSSENSE <35>

2

1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

GND

GND

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS_CDVDET

VSSA_CRTDAC

6 OF 6

6 OF 6

1 2

C159 22P_0402_50V8J

C159 22P_0402_50V8J

RF@

RF@

1 2

C150 22P_0402_50V8J

C150 22P_0402_50V8J

RF@

RF@

1 2

C153 22P_0402_50V8JC153 22P_0402_50V8J

1 2

C156 22P_0402_50V8JC156 22P_0402_50V8J

H19
H26
H28
H6
J10
J2
J21
J30
K11
K15
K3
K7
K8
K9
L1
L10
L13
L23
L25
L31
L7
M29
M4
N10
N14
N19
N21
N22
N23
N26
N27
N28
N4
N7
P14
P16
P4
T14
T18
T3
U5
U6
U9
V2
W10
W14
W19
W2
W21
W22
W23
W24
W27
W30
W5
W6
Y4

A27
A29
A3
AH1
AJ1
AJ31
AK1
AK2
AK30
AK31
AL2
AL29
AL3
AL30
AL5
B2
B3
B31
C1
C2
C31
E1

L14
D13

AA10
AA13
AA19
AA21
AA23
AA26
AA27
AA29

AB15
AB17
AB23
AB29

AC10
AC11
AC13
AC22
AC28

AD19
AD21
AD24
AD26

AE10
AE11
AE15
AE17
AE19

AE31
AF11
AF13
AF21
AF24
AF28

AG22

AH26
AH28

AK13
AK19
AK28

AL13
AL19
AL23
AL25

+VCCA_VCCD

+VCCCK_DDR

+GFX_CORE

+CPU_CORE

A11
A16
A21
A25
AA1

AA7
AA9

AC1

AC4

AD5
AD8
AE1

AE3

AF7

AG5

AH6
AH9

AJ2
AJ3

AK9

AL7
B10
B14
B19
B23
C12
C26
C30

D19
D28

F24

G11
G13
G15
G17
G19
G21
G31

H13

C7

D8
D9
E2
E5
E7

F4
G1

G8

?

?

U1F

N2600@

U1F

N2600@

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

QB0Z B2 1.6G

QB0Z B2 1.6G

?

?

CEDARVIEW

CEDARVIEW

REV = 1.10

REV = 1.10

2010.07.12 RF request

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Cedarview(3/3)

Cedarview(3/3)

Cedarview(3/3)

QBU00

QBU00

QBU00

1

0.3

0.3

8 38Wednesday, November 02, 2011

8 38Wednesday, November 02, 2011

8 38Wednesday, November 02, 2011

0.3

5

PCI

SRC

CPU

CLKSEL1

0

FSA

CLKSEL0

MHz

266

MHz

1000

MHz

MHz

33.30

14.318 96.0 48.0

DOT_96
MHz

USB
MHz

FSC FSB REF

CLKSEL2

0 1000 133 33.31 14.318 96.0 48.0

0 1001 200 33.30 14.318 96.0 48.0

0 1001 166 33.31 14.318 96.0 48.0

D D

1 1000 333 33.30 14.318 96.0 48.0

1 1000 100 33.31 14.318 96.0 48.0

1 1001 400 33.30 14.318 96.0 48.0

1 1 1

Reserved

Normal Power Low Power

R477 @ Stuff
R478
R479
R480
R483

C C

B B

A A

Stuff
Stuff

@
@

+1.05VS

R482

R482

2.2K_0402_5%

2.2K_0402_5%

FSA

FSB

FSC

R486

R486
1K_0402_5%

1K_0402_5%

R490

R490

10K_0402_5%

10K_0402_5%

12

+1.05VS

12

+1.05VS

12

5

@

@
Stuff
Stuff

12

R481

R481
470_0402_5%

470_0402_5%

12

R484

@R484

@

1K_0402_5%

1K_0402_5%

+3VS

12

R485

@R485

@

470_0402_5%

470_0402_5%

12

R488

R488

0_0402_5%

0_0402_5%

12

R489

R489
470_0402_5%

470_0402_5%

12

R491

@R491

@

0_0402_5%

0_0402_5%

C147 22P_0402_50V8JC147 22P_0402_50V8J

14.31818MHZ 20PF 7A14300003

14.31818MHZ 20PF 7A14300003

C148 22P_0402_50V8JC148 22P_0402_50V8J

Routing the trace at least 10mil

+3VS

12

Y1

Y1

R65

R65

1 2

R608

R608

1 2

CLK_XTAL_IN

CLK_XTAL_OUT

+1.5VM_CK505

+1.05VM_CK505

+1.5VM_CK505

H_STP_CPU#_R

10K_0402_5%

10K_0402_5%

H_STP_PCI#_R

10K_0402_5%

10K_0402_5%

For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#

For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96#
Pin28/29 : LCDCLK / LCDCLK #

For PCI2_TME:0=Overclocking of CPU and SRC allowed
(ICS only) 1=Overclocking of CPU and SRC NOT allowed

4

+3VM_CK505

R81

R81

1 2

+3VS

0_0603_5%

0_0603_5%

R82

R82

1 2

+1.05VS

FBMH1608HM601-T_0603

FBMH1608HM601-T_0603

R477

R477

1 2

+1.5VS

0_0603_5%

0_0603_5%

LOW@

LOW@

+3VM_CK505

R478

NORMAL@ R478

NORMAL@

R483

LOW@R483

LOW@

1 2

0_0603_5%

0_0603_5%

NORMAL@ R479

NORMAL@

CLK_48M_CR<24>

CLK_PCH_48M<12>

CLK_PCH_14M<13>

1 = Pin24/25 : SRC_0 / SRC_0#
Pin28/29 : 27M/27M_SS

R119

R119

10K_0402_5%

10K_0402_5%

1 2

ITP_EN PCI2_TME

R113

@R113

@

10K_0402_5%

10K_0402_5%

1 2

4

1 2

0_0603_5%

0_0603_5%

1 2

0_0603_5%

0_0603_5%

R480

LOW@R480

LOW@

1 2

0_0603_5%

0_0603_5%

H_STP_CPU#<13>

H_STP_PCI#<13>

CLK_PCI_DDR<18>

CLK_PCI_LPC<25>

CLK_PCI_PCH<11>

R479

VGATE<13,25,28,34,35>

+3VS+3VS

@

@

R118

R118

10K_0402_5%

10K_0402_5%

1 2

R114

R114

10K_0402_5%

10K_0402_5%

1 2

+3VM_1.5VM_R

PCI4_SEL

1

C126

C126

10U_0805_10V4Z

10U_0805_10V4Z

2

+1.05VM_CK505

80 mA

1

C134

C134

10U_0805_10V4Z

10U_0805_10V4Z

2

+1.5VM_CK505

1

C942

C942

2

10U_0805_10V4Z

10U_0805_10V4Z

1

C943

C943

C944

C944

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.05VM_1.5VM_R

1

C946

C946

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 2

1 2

1 2

C143 22P_0402_50V8JC143 22P_0402_50V8J

1 2

1 2

C868 22P_0402_50V8JC868 22P_0402_50V8J

R432 0_0402_5%@R432 0_0402_5%@

1 2

R427 0_0402_5%@R427 0_0402_5%@

1 2

250 mA

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

@

@

C947

C947

1 2

C144 22P_0402_50V8JC144 22P_0402_50V8J

1 2

1 2

C145 22P_0402_50V8JC145 22P_0402_50V8J

1 2

1 2

1 2

C146 22P_0402_50V8JC146 22P_0402_50V8J

+3VS

R112

R112

10K_0402_5%

10K_0402_5%

1 2

@

@

R115

R115

10K_0402_5%

10K_0402_5%

1 2

3

1

C127

C127

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C135

C135

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C128

C128

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C136

C136

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C129

C129

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C137

C137

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C133

C133

47P_0402_50V8J

47P_0402_50V8J

1

C138

C138

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

2

SA00003H730 (Realtek :RTM890N-397-VC-GRT)

Low power CLK Gen.

1

C945

C945

2

47P_0402_50V8J

47P_0402_50V8J

R9210_0402_5% R9210_0402_5%

R9110_0402_5% R9110_0402_5%

R9333_0402_5% R9333_0402_5%

+3VM_CK505

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.05VM_CK505

FSA

FSB

FSC

VGATE

H_STP_CPU#_R

H_STP_PCI#_R

CLK_XTAL_IN

CLK_XTAL_OUT

R10333_0402_5% R10333_0402_5%

CLK_PCI_DDR_R

CLK_PCI_DDR_R

PCI2_TME

PCI4_SEL

PCI4_SEL

R10733_0402_5% R10733_0402_5%

ITP_EN

ITP_EN

R10833_0402_5% R10833_0402_5%

U4

LOW@U4

LOW@

55

VDD_SRC

6

VDD_REF

12

VDD_PCI

72

VDD_CPU

19

VDD_48

27

VDD_PLL3

66

VDD_CPU_IO

31

VDD_PLL3_IO

62

VDD_SRC_IO

52

VDD_SRC_IO

23

VDD_IO

38

VDD_SRC_IO

20

USB_0/FS_A

2

FS_B/TEST_MODE

7

REF_0/FS_C/TEST_

8

REF_1

1

CKPWRGD/PD#

11

NC

53

CPU_STOP#

54

PCI_STOP#

5

XTAL_IN

4

XTAL_OUT

13

PCI_1

14

PCI_2

15

PCI_3

16

PCI_4/SEL_LCDCL

17

PCIF_5/ITP_EN

18

VSS_PCI

3

VSS_REF

22

VSS_48

26

VSS_IO

69

VSS_CPU

30

VSS_PLL3

34

VSS_SRC

59

VSS_SRC

42

VSS_SRC

73

VSS

RTM890N-397-VC-GRT QFN

RTM890N-397-VC-GRT QFN

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

SRC_0/DOT_96

SRC_0#/DOT_96#

LCDCLK#/27M_SS

SRC_8/CPU_ITP

SRC_8#/CPU_ITP#

USB_1/CLKREQ_A#

9

SDA

10

SCL

71

CPU_0

70

CPU_0#

68

CPU_1

67

CPU_1#

24

25

28

LCDCLK/27M

29

32

SRC_2

33

SRC_2#

35

SRC_3

36

SRC_3#

2011.03.30 CLK_CPU_EXP change to SRC3

39

SRC_4

40

SRC_4#

57

SRC_6

56

SRC_6#

61

SRC_7

60

SRC_7#

64

63

44

SRC_9

45

SRC_9#

50

SRC_10

51

SRC_10#

48

SRC_11

47

SRC_11#

37

CLKREQ_3#

41

CLKREQ_4#

58

CLKREQ_6#

65

CLKREQ_7#

43

CLKREQ_9#

49

SLKREQ_10#

46

CLKREQ_11#

21

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

C139

C139

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CLK_SMBDATA

CLK_SMBCLK

CLK_CPU_HPLCLK

CLK_CPU_HPLCLK#

CLK_CPU_MPLL_C

CLK_CPU_MPLL#_C

CPU_SSCDREFCLK

CPU_SSCDREFCLK#

CLK_CPU_EXP

CLK_CPU_EXP#

CLK_PCIE_SATA

CLK_PCIE_SATA#

CLK_PCIE_WLAN

CLK_PCIE_WLAN#

CLK_PCIE_LAN

CLK_PCIE_LAN#

CLK_PCIE_PCH

CLK_PCIE_PCH#

CLK_PCIE_WWAN

CLK_PCIE_WWAN#

WLAN_CLKREQ#

LAN_CLKREQ#

WWAN_CLKREQ#

C141

C141

47P_0402_50V8J

47P_0402_50V8J

CLK_SMBDATA <10,18>

CLK_SMBCLK <10,18>

CLK_CPU_HPLCLK <7>

CLK_CPU_HPLCLK# <7>

CLK_CPU_MPLL_C <6>

CLK_CPU_MPLL#_C <6>

CPU_DREFCLK

CPU_DREFCLK#

2011.06.29 Swap CLK Gen output for
CPU_SCDREFFCLK and CPU_DREFCLK

CPU_ITP

CPU_ITP#

2

CPU_DREFCLK <7>

CPU_DREFCLK# <7>

CPU_SSCDREFCLK <7>

CPU_SSCDREFCLK# <7>

CLK_CPU_EXP <6>

CLK_CPU_EXP# <6>

CLK_PCIE_SATA <11>

CLK_PCIE_SATA# <11>

CLK_PCIE_WLAN <18>

CLK_PCIE_WLAN# <18>

R9800_0402_5% @R9800_0402_5% @

R9830_0402_5% @R9830_0402_5% @

CLK_PCIE_LAN <23>

CLK_PCIE_LAN# <23>

CLK_PCIE_PCH <12>

CLK_PCIE_PCH# <12>

CLK_PCIE_WWAN <18>

CLK_PCIE_WWAN# <18>

WLAN_CLKREQ# <18>

LAN_CLKREQ# <23>

WWAN_CLKREQ# <18>

1

+3VS

R84

R84

2.2K_0402_5%

2.2K_0402_5%

CLK_SMBDATA

CLK_SMBCLK

PCH_SMBDATA<13>

PCH_SMBCLK<13>

2.2K_0402_5%

2.2K_0402_5%

Q1A

Q1A

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

6 1

+3VS

3

Q1B 2N7002DW-T/R7_SOT363-6Q1B 2N7002DW-T/R7_SOT363-6

R83

R83

2

5

4

2011.04.29 Reserve R305,C392 for RF

@

@

@

@

R305

R305

C392

10_0402_5%

10_0402_5%

C392

1 2

22P_0402_50V8J

22P_0402_50V8J

CLK_SMBCLK

1 2

SRC PORT LIST

PORT

SRC0
SRC2
SRC3
SRC4
SRC6
SRC7
SRC8
SRC9
SRC10
SRC11

WLAN_CLKREQ#
WWAN_CLKREQ#
LAN_CLKREQ#

T77T77

T78T78

DEVICE

CPU_DREFCLK

CPU_EXP
PCIE_SATA
PCIE_WLAN

PCIE_LAN
PCIE_PCH
PCIE_WWAN

R99 10K_0402_5%R99 10K_0402_5%
R100 10K_0402_5%R100 10K_0402_5%
R101 10K_0402_5%R101 10K_0402_5%

12
12
12

REQ PORT LIST

DEVICEPORT

REQ_3#
REQ_4#
REQ_6#
REQ_7#
REQ_9#
REQ_10#
REQ_11#
REQ_A#

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Clock Generator CK505

Clock Generator CK505

Clock Generator CK505

QBU00

QBU00

QBU00

PEIC_WLAN

PCIE_LAN

PEIC_WWAN

9 38Wednesday, November 02, 2011

9 38Wednesday, November 02, 2011

9 38Wednesday, November 02, 2011

1

+3VS

0.3

0.3

0.3

5

DDR_A_DQS#[0..7]<6>

DDR_A_D[0..63]<6>

DDR_A_DM[0..7]<6>

DDR_A_DQS[0..7]<6>

DDR_A_MA[0..15]<6>

D D

+1.5V

2011.06.14 Add C119 for ESD issue

+1.5V

1

1

+

+

C106

C106

C119

C119

C107

C107

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

330U_D2_2.5VY_R9M

330U_D2_2.5VY_R9M

C C

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.75VS

B B

1

1

C108

C108

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+0.75VS

1

C111

C111

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C99

C99

1

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C110

C110

C109

C109

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C113

C113

C112

C112

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C100

C100

1

22U_0805_6.3V6M

22U_0805_6.3V6M

1

CZ03

CZ03

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C114

C114

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Layout Note:
Place near JDDR1

C101

C101

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C116

C116

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2011.06.14 Add C116 for ESD issue

A A

4

+1.5V

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1K_0402_1%

1

R74

R74

2

R75

R75

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

+1.5V

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R77

R77

1

2

R76

R76

1K_0402_1%

12

1K_0402_1%

1K_0402_1%

12

1

C104

C104

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1K_0402_1%

1K_0402_1%

12

+V_DDR_CPU_REF

1K_0402_1%

1K_0402_1%

12

1 2

0_0402_5%

0_0402_5%

C117

C117

2

2

C102

C102

1

1

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

CZ04

CZ04

2

@

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

+DIMM_VREF

C115

C115

C118

C118

3

R879

R879

+DIMM_VREF

20mils

1

C105

C105

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

2

DVT# SA0 change to
pull high +3VS

+DIMM_VREF

+DIMM_VREF

DDR_A_D4
DDR_A_D5

DDR_A_DM0

DDR_A_D1
DDR_A_D0

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D22

DDR_A_D24
DDR_A_D25

DDR_A_DM3

DDR_A_D30
DDR_A_D31 DDR_A_D26

DDR_CKE2<6>

DDR_A_BS2<6>

M_CLK_DDR2<6>
M_CLK_DDR#2<6>

DDR_A_BS0<6>

DDR_A_WE#<6>
DDR_A_CAS#<6>

DDR_CS3#<6>

+3VS

+3VS

1

2

DDR_CKE2

DDR_A_BS2

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

M_CLK_DDR2
M_CLK_DDR#2

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS# M_ODT2

DDR_A_MA13
DDR_CS3#

DDR_A_D37

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D41
DDR_A_D44

DDR_A_DM5

DDR_A_D42
DDR_A_D43

DDR_A_D49
DDR_A_D53

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D54
DDR_A_D55

DDR_A_D60
DDR_A_D57

DDR_A_DM7

DDR_A_D58
DDR_A_D62

R207

R207

1 2

10K_0402_5%

10K_0402_5%

1

C219

C219

C220

C220

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.5V +1.5V

12

R208

R208

3A@1.5V

3A@1.5V

3A@1.5V3A@1.5V

10K_0402_5%

10K_0402_5%

2

JDDR1

JDDR1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1
VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A621-U4SG-7H

FOX_AS0A621-U4SG-7H

+0.75VS

@

@

DQ4
DQ5

VSS3

DQS#0

DQS0
VSS6

DQ6

DQ7
VSS8
DQ12
DQ13

VSS10

DM1

DQ14
DQ15

DQ20
DQ21

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

DQ30
DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

CK1

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

SDA

SCL

VTT2

2

DDR_A_D2

4

DDR_A_D7

6
8

DDR_A_DQS#0

10

DDR_A_DQS0

12
14

DDR_A_D3

16

DDR_A_D6

18
20

DDR_A_D14

22

DDR_A_D13

24
26

DDR_A_DM1

28

DRAMRST#

30
32

DDR_A_D12

34

DDR_A_D15

36
38

DDR_A_D16DDR_A_D20

40

DDR_A_D21

42
44

DDR_A_DM2

46
48

DDR_A_D19

50

DDR_A_D23DDR_A_D18

52
54

DDR_A_D28

56

DDR_A_D29

58
60

DDR_A_DQS#3

62

DDR_A_DQS3

64
66

DDR_A_D27

68
70
72

DDR_CKE3

74
76

DDR_A_MA15

78

A15
A14

A11

A7

A6
A4

A2
A0

BA1

S0#

G2

DDR_A_MA14

80
82

DDR_A_MA11

84

DDR_A_MA7

86
88

DDR_A_MA6

90

DDR_A_MA4

92
94

DDR_A_MA2

96

DDR_A_MA0

98
100

M_CLK_DDR3

102

M_CLK_DDR#3

104
106

DDR_A_BS1

108

DDR_A_RAS#

110
112

DDR_CS2#

114
116
118

M_ODT3

120
122
124

+VREF_CA

126
128

DDR_A_D36

130

DDR_A_D33DDR_A_D32

132
134

DDR_A_DM4

136
138

DDR_A_D38

140

DDR_A_D39

142
144

DDR_A_D47

146

DDR_A_D45

148
150

DDR_A_DQS#5

152

DDR_A_DQS5

154
156

DDR_A_D46

158

DDR_A_D40

160
162

DDR_A_D48

164

DDR_A_D52

166
168

DDR_A_DM6

170
172

DDR_A_D50

174

DDR_A_D51

176
178

DDR_A_D56

180

DDR_A_D61

182
184

DDR_A_DQS#7

186

DDR_A_DQS7

188
190

DDR_A_D59

192

DDR_A_D63

194
196

PM_EXTTS#0

198

CLK_SMBDATA

200

CLK_SMBCLK

202
204

206

+0.75VS

0.65A@0.75V

DDR_CKE3 <6>

M_CLK_DDR3 <6>
M_CLK_DDR#3 <6>

DDR_A_BS1 <6>
DDR_A_RAS# <6>

DDR_CS2# <6>
M_ODT2 <6>

M_ODT3 <6>

1

1

C213

C213

2

2

@

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VS

12

CLK_SMBDATA <9 ,18>
CLK_SMBCLK <9,18>

1

+VREF_CA

1

C215

C215

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R513

R513
10K_0402_5%

10K_0402_5%

DRAMRST# < 6>

+V_DDR_CPU_REF

1 2

R877 0_0402_5 %R877 0_0402_5%

C214

C214

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

DDRII-SODIMMA

DDRII-SODIMMA

DDRII-SODIMMA

QBU00

QBU00

QBU00

10 38Wednesday, November 02, 2011

10 38Wednesday, November 02, 2011

10 38Wednesday, November 02, 2011

1

0.3

0.3

0.3

+3VS

R539 8.2K_040 2_5%R539 8.2K_040 2_5%

1 2

R540 8.2K_040 2_5%R540 8.2K_040 2_5%

1 2

+3VS

D D

+3VS

+3VS

+3VS

C C

+3VS

RP7

RP7

1 8
2 7
3 6
4 5

8.2K_080 4_8P4R_5%

8.2K_080 4_8P4R_5%

RP8

RP8

1 8
2 7
3 6
4 5

8.2K_080 4_8P4R_5%

8.2K_080 4_8P4R_5%

RP16

RP16

1 8
2 7
3 6
4 5

8.2K_080 4_8P4R_5%

8.2K_080 4_8P4R_5%

RP10

RP10

1 8
2 7
3 6
4 5

8.2K_080 4_8P4R_5%

8.2K_080 4_8P4R_5%

RP11

RP11

1 8
2 7
3 6
4 5

8.2K_080 4_8P4R_5%

8.2K_080 4_8P4R_5%

5

PCI_PIRQB#
PCI_PIRQF#
PCI_PIRQC#
PCI_PIRQA#

PCI_PIRQE#
PCI_PLOCK #
PCI_PIRQG#
PCI_IRDY#

PCI_SERR#
PCI_PERR#
PCI_TRDY#
GPIO1

GPIO22
PCI_DEVSE L#
PCI_PIRQD#
PCI_PIRQH#

REQ2#
REQ1#
PCI_STOP#
PCI_FRAME #

RSVD01

RSVD02

CLK_PCI_P CH<9>
PCI_RST#<25>

2011.04.20 Stuff R54 4 for SPI mode

Signals have weak in ternal pull-ups

GPIO17 GPIO48

SPI

PCI

B B

LPC

0 1

1 0

1 1

4

100K_0402_5%

100K_0402_5%

For EC request.

R543

@R 543

@

10K_040 2_5%

10K_040 2_5%

@

@

1 2

CLK_PCI_P CH
PCI_RST#

12

R541

R541

R544

R544
10K_040 2_5%

10K_040 2_5%

R545

R545
1K_0402 _5%

1K_0402 _5%

+3VS

PCI_DEVSE L#

PCI_IRDY#

PCI_SERR#
PCI_STOP#
PCI_PLOCK #
PCI_TRDY#
PCI_PERR#
PCI_FRAME #

REQ1#
REQ2#

GPIO22
GPIO1

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

RSVD01
RSVD02

R551

R551

1 2

8.2K_040 2_5%

8.2K_040 2_5%

R12
AE20
AD17
AC15
AD18

AA10
AA12

AD15

W10

AE21
AE18
AD19

U12

AC17
AB13
AC13
AB15

AB16
AE24
AE23

AA14

AD16
AB11
AB10

AD23

Y12

Y10

V12

Y14

V14

B15

A23

C22
B11

A10
D10
A16

A18
E16

G16
A20

G14

C15

H10

D11

M13

U15A

U15A

A5

PAR
DEVSEL#

J12

PCICLK
PCIRST#

B7

IRDY#
PME#
SERR#

F14

STOP#

A8

PLOCK#
TRDY#
PERR#
FRAME#

GNT1#
GNT2#

REQ1#
REQ2#

GPIO48/STRAP1#

A2

GPIO17/STRAP2#
GPIO22

C9

GPIO1

B2

PIRQA#

D7

PIRQB#

B3

PIRQC#
PIRQD#

E8

PIRQE#/GPIO2

D6

PIRQF#/GPIO3

H8

PIRQG#/GPIO4

F8

PIRQH#/GPIO5

STRAP0#

K9

RSVD01
RSVD02

TIGERPOINT_ES1_BGA360

TIGERPOINT_ES1_BGA360

U15C

U15C

RSVD03
RSVD04
RSVD05
RSVD06
RSVD07
RSVD08
RSVD09
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18

RSVD19
RSVD20
RSVD21
RSVD22
RSVD23

RSVD24
RSVD25
RSVD26

RSVD27
RSVD28

RSVD29
RSVD30
RSVD31

GPIO36

TGP

TGP

PCI

PCI

TGP

TGP

3

SATA0RXN
SATA0RXP

SATA0TXN

SATA0TXP
SATA1RXN
SATA1RXP

SATA1TXN

SATA1TXP

SATA

SATA

SATA_CLKN
SATA_CLKP

SATARBIAS#

SATARBIAS

SATALED#

HOST

HOST

THRMTRIP#

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8

AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE0#
C/BE1#
C/BE2#
C/BE3#

1

1

A20GATE

A20M#

CPUSLP#

IGNNE#

INIT3_3V#

INIT#

INTR

FERR#

NMI

RCIN#

SERIRQ

SMI#

STPCLK#

B22
D18
C17
C18
B17
C19
B18
B19
D16
D15
A13
E14
H14
L14
J14
E10
C11
E12
B9
B13
L12
B8
A3
B5
A6
G12
H12
C8
D9
C7
C1
B1

H16
M15
C13
L16

AE6
AD6
AC7
AD7
AE8
AD8
AD9
AC9

AD4
AC4

AD11
AC11
AD25

U16
Y20
Y21
Y18
AD21
AC25
AB24
Y22
T17
AC21
AA16
AA21
V18
AA20

SATARBIAS

GATEA20
H_A20M#
H_CPUSL P#
H_IGNNE#

H_INIT#
H_INTR
H_FERR#
H_NMI
EC_KBRS T#
SERIRQ
H_SMI#
H_STPCL K#

T63 PADT63 P AD
T64 PADT64 P AD
T65 PADT65 P AD
T66 PADT66 P AD

CLK_PCIE_ SATA# <9>
CLK_PCIE_ SATA <9>

R547 24.9_040 2_1%R547 24.9_04 02_1%

SATALED # < 27>

GATEA20 < 25>
H_A20M# <7>
H_CPUSL P# < 7>

H_INIT# <7 >
H_INTR <7>
H_FERR# <7>
H_NMI <7>
EC_KBRS T# <25>
SERIRQ <25>
H_SMI# <7>
H_STPCL K# <7>

2

PCI_RST#

CLK_PCI_P CH

@

@

10_0402 _5%

10_0402 _5%

C1016

C1016

8.2P_040 2_50V8D

8.2P_040 2_50V8D

For EMI, close to TigerPoint

R546 closed TigerPoint within 1"

SATA_IRX_ C_DTX_N0 <2 0>
SATA_IRX_ C_DTX_P0 <20>
SATA_ITX_ DRX_N0 <20>
SATA_ITX_ DRX_P0 < 20>

Please closed Tiger point
PIN within 500 mils

+1.05VS

12

R552

R552

60.4_040 2_1%

60.4_040 2_1%

H_THERM TRIP# <7>

R542

R542

@

@

SATALED #

GATEA20

SERIRQ

12

1

2

1

2

C1015

C1015

0.1U_0402_16V4Z

0.1U_0402_16V4Z

H_FERR#

H_IGNNE#

R548

R548

10K_040 2_5%

10K_040 2_5%

R549

R549

10K_040 2_5%

10K_040 2_5%
R550

R550

1 2

8.2K_040 2_5%

8.2K_040 2_5%

@

@

1 2

+1.05VS

12

R930

R930

1K_0402 _5%

1K_0402 _5%

+3VS

1

R546

R546

60.4_040 2_1%

60.4_040 2_1%

+1.05VS

3

A A

5

4

TIGERPOINT_ES1_BGA360

TIGERPOINT_ES1_BGA360

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Compal Secret Data

2010/06/ 27 2011/6/2 7

2010/06/ 27 2011/6/2 7

2010/06/ 27 2011/6/2 7

3

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Tigerpoint(1/4)

Tigerpoint(1/4)

Tigerpoint(1/4)

QBU00

QBU00

QBU00

11 38Wed nesday, November 02, 2011

11 38Wed nesday, November 02, 2011

11 38Wed nesday, November 02, 2011

1

0.3

0.3

0.3

5

4

3

2

1

D D

TGP

U15B

U15B

W23
W24

R23
R24
P21
P20

U23
U24
V21
V20
V24
V23

K21
K22

M18
M19
K24
K25

M21
P17
P18
N25
N24

H24

T21
T20
T24
T25
T19
T18

J23
J24

L23
L24
L22

J22

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4

DMI_ZCOMP
DMI_IRCOMP

DMI_CLKN
DMI_CLKP

TIGERPOINT_ES1_BGA360

TIGERPOINT_ES1_BGA360

DMI_TXN0<6>
DMI_TXP0<6>
DMI_RXN0<6>
DMI_RXP0<6>
DMI_TXN1<6>
DMI_TXP1<6>
DMI_RXN1<6>
DMI_RXP1<6>

PCIE_PTX_C_IRX_N1<23>

C C

LAN

WLAN+BT Combo

WWLAN

B B

PCIE_PTX_C_IRX_P1<23>
PCIE_ITX_C_PRX_N1<23>
PCIE_ITX_C_PRX_P1<23>
PCIE_PTX_C_IRX_N2<18>
PCIE_PTX_C_IRX_P2<18>
PCIE_ITX_C_PRX_N2<18>
PCIE_ITX_C_PRX_P2<18>
PCIE_PTX_C_IRX_N3<18>
PCIE_PTX_C_IRX_P3<18>
PCIE_ITX_C_PRX_N3<18>
PCIE_ITX_C_PRX_P3<18>

C1019 0.1U_0402_10V6KC1019 0.1U_0402_10V6K
C1020 0.1U_0402_10V6KC1020 0.1U_0402_10V6K

C1017 0.1U_0402_10V6KWLAN@ C1017 0.1U_0402_10V6KWLAN@
C1018 0.1U_0402_10V6KWLA N@ C1018 0.1U_0402_10V6KWLAN@

C1021 0.1U_0402_10V6KWWAN@C1021 0.1U_0402_10V6KWWAN@
C1022 0.1U_0402_10V6KWW AN@C1022 0.1U_0402_10V6KWW AN@

Please closed Tiger point
PIN within 500 mils

CLK_PCIE_PCH#<9>
CLK_PCIE_PCH<9>

12
12

12
12

12
12

+1.5VS

PCIE_PTX_C_IRX_N1

PCIE_PTX_C_IRX_P1

PCIE_ITX_PRX_N1
PCIE_ITX_PRX_P1

PCIE_PTX_C_IRX_N2

PCIE_PTX_C_IRX_P2

PCIE_ITX_PRX_N2
PCIE_ITX_PRX_P2

PCIE_PTX_C_IRX_N3

PCIE_PTX_C_IRX_P3

PCIE_ITX_PRX_N3
PCIE_ITX_PRX_P3

T51PAD T51PAD
T52PAD T52PAD
T53PAD T53PAD
T54PAD T54PAD

R555 24.9_0402_1%R555 24.9_0402_1%

1 2

TGP

USB20_N0

H7

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P

DMI PCI-E

DMI PCI-E

USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P

OC0#
OC1#
OC2#
OC3#

USB

USB

OC4#
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31

USBRBIAS

USBRBIAS#

CLK48

2

2

H6
H3
H2
J2
J3
K6
K5
K1
K2
L2
L3
M6
M5
N1
N2

USB_OC#0_1_PCH

D4

USB_OC#0_1_PCH

C5

USB_OC#2

D3

USB_OC#3

D2

USB_OC#4_PCH

E5

SLP_CHG_M3_PCH

E6

SLP_CHG_M4_PCH

C2

USB_OC#7

C3

G2
G3

CLK_PCH_48M

F4

USB20_P0
USB20_N1
USB20_P1

T49 PADT49 PAD
T50 PADT50 PAD

USB20_N4
USB20_P4
USB20_N5_L
USB20_P5_L
USB20_N6
USB20_P6
USB20_N7
USB20_P7

R957

R957

22.6_0402_1%

22.6_0402_1%

12

33_0402_5%

33_0402_5%

@

@

R554

R554

1

@

@

C1023

C1023
22P_0402_50V8J

22P_0402_50V8J

2

For EMI, Close to TigerPoint

USB20_N0 <19>
USB20_P0 <19>
USB20_N1 <19>
USB20_P1 <19>

USB20_N3 <24>
USB20_P3 <24>
USB20_N4 <19>
USB20_P4 <19>

USB20_N6 <18>
USB20_P6 <18>
USB20_N7 <17>
USB20_P7 <17>

USB_OC#0_1_PCH < 19>

USB_OC#4_PCH <19 >
SLP_CHG_M3_PCH <19>
SLP_CHG_M4_PCH <19>

CLK_PCH_48M <9>

USB1(Right)
USB2(Right)

Card-reader

USB3(Left)
WWAN
WLAN + BT (Combo)
CMOS

Please closed Tiger point
PIN within 200 mils

USB20_N5_L

USB20_P5_L

1 2

R3 0_0402_5%@R3 0_0402_5%@

WCM2012F2S-900T04_0805

WCM2012F2S-900T04_0805

4

1

L2

R4 0_0402_5%@R4 0_0402_5%@

4

1

WWAN@L2

WWAN@

1 2

3

2

USB20_N5

3

USB20_P5

2

USB PORT LIST

PORT

#EVT DEVICE
USB0
USB1
USB2
USB3
USB4
USB5
USB6
USB7

#6/27 EVT

USB1(Left)
USB2(Left)

NC

Card-reader
USB3(Right)
WWAN
WLAN + BT
CMOS

USB_OC#0_1_PCH
SLP_CHG_M4_PCH
USB_OC#7

10K_0804_8P4R_5%

10K_0804_8P4R_5%

USB_OC#3
USB_OC#2
USB_OC#4_PCH
SLP_CHG_M3_PCH

10K_0804_8P4R_5%

10K_0804_8P4R_5%

USB20_N5 <18>

USB20_P5 <18>

RP12

RP12

4 5
3 6
2 7
1 8

RP13

RP13

4 5
3 6
2 7
1 8

+3VALW

2010.07.12 RF request

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Tigerpoint(2/4)

Tigerpoint(2/4)

Tigerpoint(2/4)

QBU00

QBU00

QBU00

1

0.3

0.3

12 38Wednesday, November 02, 2011

12 38Wednesday, November 02, 2011

12 38Wednesday, November 02, 2011

0.3

5

+3VALW

R5602.2K_0402_5% R5602.2K_0402_5%

PCH_SMBCLK

1 2

PCH_SMBDATA

R5612.2K_0402 _5% R5612.2K_0402_5%

1 2

+3VALW

D D

10K_0402_5%

10K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

+3VALW

RP14

RP14

10K_0804_8P4R_5%

+3VALW

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

10K_0804_8P4R_5%

RP15

RP15

1 8
2 7
3 6
4 5

C C

SYS_RST#

R562

R562

12

R563

R563

ICH_RI#

EC_SWI#

R564

R564

12

SLP_CHG#

R565

R565

12

LINKALERT#

45

GPIO11

36

SMLINK0

27

SMLINK1

18

GPIO15

PCH_LOW_BAT#

GPIO12

EC_LID_OUT#

HDA_BITCLK_CPU<7>
HDA_BITCLK_CODEC<21>

HDA_RST#_CPU<7>
HDA_RST#_CODEC<21>

HDA_SDOUT_CPU<7>
HDA_SDOUT_CODEC<21>

HDA_SYNC_CPU<7>
HDA_SYNC_CODEC<21>

C1025

C1025

18P_0402_50V8J

18P_0402_50V8J

12

Y2

32.768KHZ_12.5PF_Q13MC14610002

32.768KHZ_12.5PF_Q13MC14610002

2

3

C1027

C1027

18P_0402_50V8J

18P_0402_50V8J

12

Y2

OSC

NC

OSC

NC

# MP C1026 4.7P change to
10p for RF request

1

4

2011.06.10 Change J1 to JCMOS

R574

R574

+RTCVCC

+RTCVCC

1M_0402_5%

1M_0402_5%

332K_0402_1%

332K_0402_1%

+3VS

B B

+3VS

1K_0402_5%

1K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

R575

R575

1 2

R576

R576

1 2

R577

R577

R579

R579

@

@

R580

R580

R581

R581

R585

R585

1 2

INTRUDER#

INTVRMEN

SLPIOVR

PM_CLKRUN#

GPIO0

GPIO6

MCH_SYNC#

1 2

20K_0402_5%

20K_0402_5%

JCMOS

JCMOS

@

@

112

JUMP_43X39

JUMP_43X39

C1028

C1028

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1 2

+3VS

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

2

R566

R566

R567

R567

R618

R618

2011.06.15 Change Pull high to +3VS

+RTCBATT

JRTC

JRTC

1

3

1

A A

GND

2

2

GND

ACES_85205-0200N

ACES_85205-0200N

CONN@

CONN@

4

5

+RTCVCC

C1029

C1029

1

1U_0402_6.3V6K

1U_0402_6.3V6K

2

+RTCBATT_R

D6

D6

1

BAV70W_SOT323-3

BAV70W_SOT323-3

2

3

CLK_PCH_14M<9>

PCH_SI_SPI_SO<26>

PCH_SO_SPI_SI<26>

PCH_SPI_CS#< 26>

12

12

12

1 2

4

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

HDA_SDIN0<21>
HDA_SDIN1<7>

RTCX1

R572

R572

10M_0402_5%

10M_0402_5%

RTCX2

PCH_SPICLK<26>

PCH_SI_SPI_SO

PCH_SO_SPI_SI

PCH_SPI_CS#

R126

R126

1K_0402_5%

1K_0402_5%

4

HDMI@

HDMI@

BITCLK_PCH

R93190.9_0402_1%

R93190.9_0402_1%
R58233_0402_5% R58233_0402_5%

HDMI@

HDMI@

RST#_PCH

R93290.9_0402_1%

R93290.9_0402_1%
R60933_0402_5% R60933_0402_5%

HDMI@

HDMI@

SDOUT_PCHSDOUT_PCH

R93390.9_0402_1%

R93390.9_0402_1%
R56833_0402_5% R56833_0402_5%

HDMI@

HDMI@

SYNC_PCHSYNC_PCH

R93490.9_0402_1%

R93490.9_0402_1%
R56933_0402_5% R56933_0402_5%

LPC_AD0<25>
LPC_AD1<25>
LPC_AD2<25>
LPC_AD3<25>

LPC_FRAME#<25>

12

R571

R571

10_0402_5%

10_0402_5%

RF@

RF@

1

RF@

RF@

C1026

12P_0402_50V8J

12P_0402_50V8J

2

C1158

C1158

1

C1026

2

10P_0402_50V8J

10P_0402_50V8J

RTCRST#

GPIO11
PCH_SMBCLK
PCH_SMBDATA
LINKALERT#
SMLINK0
SMLINK1

R616

R616

47_0402_5%

47_0402_5%

R617

R617

47_0402_5%

47_0402_5%

for RF request

12

PCH_SMBCLK<9>

PCH_SMBDATA<9>

PCH_SI_SPI_SO
PCH_SO_SPI_SI PCH_SO_SPI_SI_R
PCH_SPI_CS#

+RTCBATT

+3VL

BITCLK_PCH
RST#_PCH

SDOUT_PCH

SYNC_PCH

PCH_SPICLK_R

3

BITCLK_PCH

PM_CLKRUN#

2

C1024

C1024
10P_0402_50V8J

10P_0402_50V8J

1

TGP

1 2

R583 10K_0402_5%R583 10K_0402_5%

1 2

R584 10K_0402_5%R584 10K_0402_5%

R586 0_0402_5%R586 0_0402_5%

1

2

3

TGP

LPC

LPC

AUDIO

AUDIO

LAN

LAN

RTC

RTC

SMB

SMB

SPI

SPI

1 2

+3VS

5
@U5

@

B

A

3

U15D

U15D

AA5

LDRQ1#/GPIO23

V6

LAD0/FWH0

AA6

LAD1/FWH1

Y5

LAD2/FWH2

W8

LAD3/FWH3

Y8

LDRQ0#

Y4

LFRAME#/FWH4

P6

HDA_BIT_CLK

U2

HDA_RST#

W2

HDA_SDIN0

V2

HDA_SDIN1

P8

HDA_SDIN2

AA1

HDA_SDOUT

Y1

HDA_SYNC

AA3

CLK14

U3

EE_CS

AE2

EE_DIN

T6

EE_DOUT

EPROM

V3

T4

P7
B23
AA2
AD1
AC2

W3

T7

U4

W4

V5

T5

E20
H18
E23
H21

F25
F24

R2

T1
M8
P9
R4

EC_PWROK<25>

VGATE<9,25,28,34,35>

EPROM

EE_SHCLK

LAN_CLK
LANR_RSTSYNC
LAN_RST#
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2

RTCX1
RTCX2
RTCRST#

SMBALERT#/GPIO11
SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1

SPI_MISO
SPI_MOSI
SPI_CS#
SPI_CLK
SPI_ARB

TIGERPOINT_ES1_BGA360

TIGERPOINT_ES1_BGA360

PCH_POK

EC_PWROK

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EVT# For EC request 7/5

BMBUSY#/GPIO0

DPRSLPVR

STP_PCI#

STP_CPU#

CLKRUN#

CPUPWRGD/GPIO49

VRMPWRGD
MCH_SYNC#

MISC

MISC

PWRBTN#

SUS_STAT#/LPCPD#

SUSCLK

SYS_RESET#

PLTRST#

INTRUDER#

PWROK

RSMRST#

INTVRMEN

SLP_S3#
SLP_S4#
SLP_S5#

BATLOW#

DPRSTP#

DPSLP#
RSVD31

1

@

@

C1030

C1030

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

U5

P

4

Y

G

TC7SH08FUF_SSOP5

TC7SH08FUF_SSOP5

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

1 2

R598 10K_0402_5%R598 10K_0402_5%

T15
W16

GPIO6

W14

GPIO7

K18

GPIO8

H19

GPIO9

M17

GPIO10

A24

GPIO12

C23

GPIO13

P5

GPIO14

E24

GPIO15

AB20
Y16
AB19
R3

GPIO24

C24

GPIO25

D19

GPIO26

D20

GPIO27

F22

GPIO28

AC19
U14

GPIO33

AC1

GPIO34

AC23

GPIO38

AC24

GPIO39

AB22

AB17

THRM#

V16
AC18
E21
H23

RI#

G22
D22
G18
G23
C25

WAKE#

T8
U10
AC3
AD3
J16

SPKR

H20
E25
F21

B25
AB23
AA18
F20

PCH_POK <6>

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

GPIO0
GPIO6
SLPIOVR
EC_SMI#
EC_SCI#
PCH_ACIN
GPIO12

EC_LID_OUT#

SLP_CHG#
GPIO15

R570 1K_0402_5%R570 1K_0402_5%

BOARD_ID

PM_CLKRUN#

H_PWRGD

EC_THERM#
VGATE
MCH_SYNC#
PBTN_OUT#
ICH_RI#

EC_CLK
SYS_RST#
PLTRST#
EC_SWI#
INTRUDER#
PCH_POK
PCH_RSMRST#
INTVRMEN
PCH_SPKR

PCH_LOW_BAT#
H_DPRSTP#
H_DPSLP#

2

T43T43

1 2

12/31 Add HW Board ID function

T42T42

7/20 Add test point

2

2011.04.26 Reserve GPIO12 for clean password
Layout note: Put J2 close to J1

2011.06.10 Change J2 to JPW

GPIO12

1

JPW

JPW

1

JUMP_43X39

JUMP_43X39

EC_SMI# <25>
EC_SCI# <25>

EC_LID_OUT# <25>

H_STP_PCI# <9>
H_STP_CPU# <9>

BT_PWR# <18>

H_PWRGD <7>

EC_THERM# <25>

PBTN_OUT# <25>

EC_CLK <25>

PLTRST# <7,18,23>
EC_SWI# <18,23,25>

PCH_SPKR <21>

PM_SLP_S3# <25>
PM_SLP_S4# <25>
PM_SLP_S5# <25>

H_DPRSTP# <7>
H_DPSLP# <7>

BAV99DW-7_SOT363

BAV99DW-7_SOT363

2011.04.20 SLP_CHG# pull high only

01/11 Reserve EC_CLK for KBC

POK<30,32>

PCH_RSMRST#

1 2

R588

R588
10K_0402_5%

10K_0402_5%

D7B

@D7B

@

R590

@R590

@

2.2K_0402_5%

2.2K_0402_5%

1

C1087

@

@

PCH_ACIN

PCH_POK PCH_RSMRST#

C1087

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VALW

R578

R578
330K_0402_5%

330K_0402_5%

1 2

D44

D44

2 1

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

D45

D45

2 1

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

D46

D46

21

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

R587 0_0402_5%R587 0_0402_5%

4

5

3

12

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

123

C

C

Q36

@

Q36

@

E

E

MMBT3906_SOT23-3

MMBT3906_SOT23-3

B

B

1 2

R589

@R589

@

1

2

4.7K_0402_5%

4.7K_0402_5%
D7A

@D7A

@

BAV99DW-7_SOT363

BAV99DW-7_SOT363

6

RSMRST# circuit

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Tigerpoint(3/4)

Tigerpoint(3/4)

Tigerpoint(3/4)

QBU00

QBU00

QBU00

1

+3VALW

BOARD_ID

PLTRST#

1

C1064

C1064

2

ACIN <25,31>

EC_RSMRST# <25>

+3VALW

1

12

@

@

R610

R610
10K_0402_5%

10K_0402_5%

12

@

@

R611

R611
10K_0402_5%

10K_0402_5%

R573

R573
100K_0402_5%

100K_0402_5%

1 2

13 38Wednesday, November 02, 2011

13 38Wednesday, November 02, 2011

13 38Wednesday, November 02, 2011

0.3

0.3

0.3

5

4

3

2

1

D D

100_0402_5%

100_0402_5%

10_0402_5%

10_0402_5%

C C

B B

R591

R591

R593

R593

+3VS+5VS

12

D8

D8

RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

1 2

+V5REF_RUN

1

C1031

C1031

1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VALW+5VALW

12

D47

D47

RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

1 2

+V5REF_SUS

1

C1039

C1039

0.1U_0402_10V6K

0.1U_0402_10V6K

2

6mA

10mA

U15E

U15E

TIGERPOINT_ES1_BGA360

TIGERPOINT_ES1_BGA360

Place closely pin Y25 within 100mlis.

+1.5VS

R601

R601

1 2

0_0603_5%

0_0603_5%

1

2

C1055

C1055

0.01U_0402_16V7K

0.01U_0402_16V7K

+DMIPLL

24mA

1

@

@

2

C1056

C1056

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

Place closely pin Y6 within 100mlis.

+1.5VS

R602

R602

1 2

0_0603_5%

A A

0_0603_5%

5

C1057

C1057

+SATAPLL

45mA

2

1

C1058

C1058

1

2

10U_0805_10V4Z

10U_0805_10V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K

TGP

TGP

+V5REF_RUN

F12

VCC5REF

+V5REF_SUS

VCCRTC

V_CPU_IO

VCC1_5_1
VCC1_5_2
VCC1_5_3
VCC1_5_4

VCC1_05_1
VCC1_05_2
VCC1_05_3
VCC1_05_4

VCC3_3_1
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6

F5

+SATAPLL

Y6

AE3

+DMIPLL

Y25

F6

W18

14mA

AA8
M9
M20
N22

955mA

J10
K17
P15
V10

216mA

H25
AD13
F10
G10
R10
T9

F18
N4
K7
F1

92mA

5

5

1 2

C1068 2200P_0402_50V7KRF@C1068 2200P_0402_50V7KRF@

1 2

C207 68P_0402_50V8JRF@C207 68P_0402_50V8JRF@

1 2

C1069 2200P_0402_50V7KRF@C1069 2200P_0402_50V7KRF@

1 2

C208 68P_0402_50V8JRF@C208 68P_0402_50V8JRF@

1 2

C1070 2200P_0402_50V7KRF@C1070 2200P_0402_50V7KRF@

1 2

C209 68P_0402_50V8JRF@C209 68P_0402_50V8JRF@

1 2

C1071 2200P_0402_50V7KRF@C1071 2200P_0402_50V7KRF@

1 2

C210 68P_0402_50V8JRF@ C210 68P_0402_50V8JRF@

1 2

C1072 0.1U_0402_10V6KRF@C1072 0.1U_0402_10V6KRF@

1432mA

1

C1043

C1043

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C1051

C1051

2

0.1U_0402_10V6K

0.1U_0402_10V6K

2

2

C1035

C1035

C1034

C1034

1

1

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C1041

C1041

C1040

C1040

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

C1044

C1044

C1045

C1045

C1046

C1046

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

+VCCSUS33

1

1

@

C1052

C1052

2

@

C1053

C1053

C1054

C1054

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

C1036

C1036

1

2

1

2

1

2

+VCC1_05

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

C1047

C1047

1U_0402_6.3V6K

1U_0402_6.3V6K

1 2

10U_0805_6.3V4Z

10U_0805_6.3V4Z

1

C1037

C1037

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C1042

C1042

2

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

R599

R599

0_0603_5%

0_0603_5%

1 2

+VCC1_5

C1038

C1038

1U_0402_6.3V6K

1U_0402_6.3V6K

R594

R594

0_0603_5%

0_0603_5%

10U_0805_10V4Z

10U_0805_10V4Z

1

@

@

C1048

C1048

2

1

2

+VCC33

@

@

C1049

C1049

1U_0402_6.3V6K

1U_0402_6.3V6K

R592

R592

1 2

0_0603_5%

0_0603_5%

10U_0805_10V4Z

10U_0805_10V4Z

+1.05VS

1 2

0_0603_5%

0_0603_5%

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+3VALW

R596

R596

+1.5VS

C1032

C1032

0.01U_0402_16V7K

0.01U_0402_16V7K

+3VS_PRIME

2mA

1

2

+RTCVCC

1

C1033

C1033

2

0.1U_0402_10V6K

0.1U_0402_10V6K

POWER

POWER

+3VALW

+1.05VS

+1.5VS

+3VS

VCC5REF_SUS

VCCSATAPLL

VCCDMIPLL

VCCUSBPLL

VCCSUS3_3_1
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4

2010.07.12 RF request

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

TGP

U15F

TGP

U15F

VSS01
VSS02
VSS03
VSS04
VSS05
VSS06
VSS07
VSS08
VSS09
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56

VSS57
VSS58
VSS59

RSVD32

TIGERPOINT_ES1_BGA360

TIGERPOINT_ES1_BGA360

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Tigerpoint(4/4)

Tigerpoint(4/4)

Tigerpoint(4/4)

A1
A25
B6
B10
B16
B20
B24
E18
F16
G4
G8
H1
H4
H5
K4
K8
K11
K19
K20
L4
M7
M11
N3
N12
N13
N14
N23
P11
P13
P19
R14
R22
T2
T22
V1
V7
V8
V19
V22
V25
W12
W22
Y2
Y24
AB4
AB6
AB7
AB8
AC8
AD2
AD10
AD20
AD24
AE1
AE10
AE25

G24
AE13
F2

AE16

QBU00

QBU00

QBU00

1

0.3

0.3

14 38Wednesday, June 29, 2011

14 38Wednesday, June 29, 2011

14 38Wednesday, June 29, 2011

0.3

A

B

C

D

E

CRT CONNECTOR

1 1

Place closed to conn.

LV6

CRT@ L V6

CRT@

GMCH_CR T_R<7>

GMCH_CR T_G<7>

GMCH_CR T_B<7>

12

CRT@

CRT@

CRT@

2 2

CRT@

CRT@

GMCH_CR T_HSYNC<7>

GMCH_CR T_VSYNC<7>

3 3

CRT@ R V151

CRT@

2.2K_040 2_5%

2.2K_040 2_5%

GMCH_CR T_DATA<7>

GMCH_CR T_CLK<7 >

4 4

CRT@

RV146

RV146

RV145

RV145

150_0402_1%

150_0402_1%

1 2

CV196 0.1U_0402_16V 4Z

CV196 0.1U_0402_16V 4Z

SN74AHC T1G125DCKR_S C70-5

SN74AHC T1G125DCKR_S C70-5

+3VS

12

RV151

GMCH_CR T_G

GMCH_CR T_B

12

12

CRT@

CRT@

RV147

RV147

150_0402_1%

150_0402_1%

150_0402_1%

150_0402_1%

+CRT_VC C

5

P

A2Y

G

3

CRT@

CRT@

1 2

CV197 0.1U_0 402_16V4Z

CV197 0.1U_0 402_16V4Z

12

RV152

CRT@RV152

CRT@

2.2K_040 2_5%

2.2K_040 2_5%

QV3A

CRT@ Q V3A

CRT@

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

CRT@

CRT@

CV190

CV190

CRT@

CRT@

1

UV13

UV13

4

OE#

+CRT_VC C

5

P

A2Y

G

3

+3VS

2.2K_040 2_5%

2.2K_040 2_5%

5

CRT@

CRT@

QV3B

QV3B

4

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

2

61

1

2

CRT@

CRT@

1

UV14

UV14

OE#

SN74AHC T1G125DCKR_S C70-5

SN74AHC T1G125DCKR_S C70-5

CRT@ R V153

CRT@

3

470P_04 02_50V8J

470P_04 02_50V8J

CV192

CV192

CV191

CV191

2

2.2P_0402_50V8C

2.2P_0402_50V8C

2.2P_0402_50V8C

2.2P_0402_50V8C

1 2

RV148 10K_040 2_5%

RV148 10K_040 2_5%

4

+CRT_VC C

12

RV153

CV201

CRT@ CV20 1

CRT@

CRT@

CRT@

CRT@

CRT@

1

NBQ1005 05T-800Y_0402

NBQ1005 05T-800Y_0402

CRT@ L V7

CRT@

NBQ1005 05T-800Y_0402

NBQ1005 05T-800Y_0402

CRT@ L V8

CRT@

NBQ1005 05T-800Y_0402

NBQ1005 05T-800Y_0402

1

2

2.2P_0402_50V8C

2.2P_0402_50V8C

CRT@

CRT@

CRT_HSYNC _1

CRT_VSYNC _1

12

RV154

CRT@RV154

CRT@

2.2K_040 2_5%

2.2K_040 2_5%

CRT_DDC _DAT

CRT_DDC _CLK

1

2

1 2

LV7

1 2

LV8

1 2

1

CV202
470P_04 02_50V8J

470P_04 02_50V8J

2

CRT@CV 202

CRT@

CRT@

CRT@

CV193

CV193

HDMI@

HDMI@

CV201

CV201
0_0402_ 5%

0_0402_ 5%

1

2

RV149 39 _0402_5%CRT@ R V149 39_0402_ 5%CRT@

RV150 39 _0402_5%CRT@ R V150 39_0402_ 5%CRT@

CRT@

CRT@

CV194

CV194

2.2P_0402_50V8C

2.2P_0402_50V8C

1 2

1 2

1

2

2.2P_0402_50V8C

2.2P_0402_50V8C

HDMI@

HDMI@

CV193

CV193
0_0402_ 5%

0_0402_ 5%

HDMI@

HDMI@

CV202

CV202
0_0402_ 5%

0_0402_ 5%

CRT@

CRT@

1

CV195

CV195

2

CRT@

CRT@

1

CV198

CV198

2

+5VS

RB161M-2 0_SOD123-2

RB161M-2 0_SOD123-2

2.2P_0402_50V8C

2.2P_0402_50V8C

HDMI@

HDMI@

CV194

CV194
0_0402_ 5%

0_0402_ 5%

CRT@

CRT@

1

CV199

CV199

2

33P_0402_50V8K

33P_0402_50V8K

If=1A

+CRT_VC C_R +CRT_VC C

DV5

DV5

2 1

CRT_R_L

CRT_DDC _DAT
CRT_G_L

HSYNC
CRT_B_L

VSYNC

CRT_DDC _CLK

HDMI@

HDMI@

CV195

CV195
0_0402_ 5%

0_0402_ 5%

HSYNC

VSYNC

33P_0402_50V8K

33P_0402_50V8K

FV1

FV1

1.1A_6V_ MINISMDC110F-2

1.1A_6V_ MINISMDC110F-2

+CRT_VC C

HDMI@

HDMI@

CV198

CV198
0_0402_ 5%

0_0402_ 5%

HDMI@

HDMI@

21

30mil

1 2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

16
17

CRT_R_LGMCH_CR T_R

CRT_G_L

CRT_B_L

HDMI@

HDMI@

CV199

CV199
0_0402_ 5%

0_0402_ 5%

R990

R990

0_0603_ 5%

0_0603_ 5%

JCRT

JCRT

RGND
ID0
Red
GGND
SDA
Green
BGND
Hsync
Blue
+5V
Vsync
res
SGND
SCL
GND

GND
GND

+HDMI_5V_ OUT

1

CV200

CV200

2

2011.05.10 Co-lay with HDMI port

SUYIN_070546 FR015S263ZR

SUYIN_070546 FR015S263ZR

CONN@

CONN@

Security Class ification

Security Class ification

Security Class ification

2009/04/ 07 2012/10/ 21

2009/04/ 07 2012/10/ 21

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/04/ 07 2012/10/ 21

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

CRT PORT

CRT PORT

CRT PORT

QBU00

QBU00

QBU00

15 38Friday, November 04, 20 11

15 38Friday, November 04, 20 11

15 38Friday, November 04, 20 11

E

0.3

0.3

0.3

A

B

C

D

E

HDMI CONNECTOR

HDMI_CLK-

1 1

C1111 0.1U_0402_16V7KHDMI@C1 111 0.1U_0402 _16V7KHDMI@

HDMI_TXD0+<7>

HDMI_TXD0-<7>

HDMI_TXD1+<7>

HDMI_TXD1-<7>

HDMI_TXD2+<7>
HDMI_TXD2-<7>
HDMI_CLK0+<7>
HDMI_CLK0-<7>

2 2

1 2

C1112 0.1U_0402_16V7KHDMI@C1 112 0.1U_0402 _16V7KHDMI@

1 2

C1113 0.1U_0402_16V7KHDMI@C1 113 0.1U_0402 _16V7KHDMI@

1 2

C1114 0.1U_0402_16V7KHDMI@C1 114 0.1U_0402 _16V7KHDMI@

1 2

C1115 0.1U_0402_16V7KHDMI@C1 115 0.1U_0402 _16V7KHDMI@

1 2

C1116 0.1U_0402_16V7KHDMI@C1 116 0.1U_0402 _16V7KHDMI@

1 2

C1117 0.1U_0402_16V7KHDMI@C1 117 0.1U_0402 _16V7KHDMI@

1 2

C1118 0.1U_0402_16V7KHDMI@C1 118 0.1U_0402 _16V7KHDMI@

1 2

HDMI_TX0+

HDMI_TX0-

HDMI_TX1+

HDMI_TX1-

HDMI_TX2+

HDMI_TX2-

HDMI_CLK+

HDMI_CLK-

HDMI_TX0-

HDMI_TX0+

HDMI_TX1- HDMI_R_D1-

HDMI_TX1+

HDMI_TX2-

HDMI_TX2+

@

@

1 2

R935 0_0402_5%

R935 0_0402_5%

L14

HDMI@L14

HDMI@

1

1

4

4

WCM2012F2S-900T04_0805

WCM2012F2S-900T04_0805

@

@

1 2

R936 0_0402_5%

R936 0_0402_5%

@

@

1 2

R937 0_0402_5%

R937 0_0402_5%

L15

HDMI@L15

HDMI@

1

1

4

4

WCM2012F2S-900T04_0805

WCM2012F2S-900T04_0805

@

@

1 2

R938 0_0402_5%

R938 0_0402_5%

@

@

1 2

R939 0_0402_5%

R939 0_0402_5%

L16

HDMI@L16

HDMI@

1

1

4

4

WCM2012F2S-900T04_0805

WCM2012F2S-900T04_0805

@

@

1 2

R940 0_0402_5%

R940 0_0402_5%

@

@

1 2

R941 0_0402_5%

R941 0_0402_5%

L17

HDMI@L17

HDMI@

1

1

4

4

WCM2012F2S-900T04_0805

WCM2012F2S-900T04_0805

@

@

1 2

C1119 0_0402_5%

C1119 0_0402_5%

2

2

3

3

2

2

3

3

2

2

3

3

2

2

3

3

HDMI_R_CK-

HDMI_R_CK+HDMI_CLK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

+HDMI_5V_OUT

< HDMI Connector >

HPD

HDMIDAT
HDMICLK

HDMI_R_CK-

HDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

+3VS

R942

R942

HDMI@

HDMI@

HDMIDAT_C<7>

HDMICLK_C<7>

3 3

HPD_C<7>

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4 4

A

R943

R943

HDMI@

2.2K_0402_5%

2.2K_0402_5%

HDMI@

2.2K_0402_5%

2.2K_0402_5%

1 2

1 2

Q3A

Q3A

+3VS

12

3

Q46B

Q46B

HDMI@

HDMI@

4

+3VS

5

HDMI@

HDMI@

Q3B

Q3B

4

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2

61

2N7002DW-T/R7_SOT363-6HDMI@

2N7002DW-T/R7_SOT363-6HDMI@

R952

HDMI@R952

HDMI@

10K_0402_5%

10K_0402_5%

5

1 2

3

R955

HDMI@R955

HDMI@

1M_0402_5%

1M_0402_5%

+HDMI_5V_OUT

R944

R944

HDMI@

HDMI@

2.2K_0402_5%

2.2K_0402_5%

1 2

HPD

B

R945

R945

HDMI@

HDMI@

2.2K_0402_5%

2.2K_0402_5%

1 2

HDMIDAT

HDMICLK

HDMI_CLK+

HDMI_CLK-

HDMI_TX0-

HDMI_TX0+

HDMI_TX1-

HDMI_TX1+

HDMI_TX2+

HDMI_TX2-

2011.05.04 Change Q42,Q43 to dual package.

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R946 619_0402_1%HDMI@R946 619_0402_1%HDMI@

R947 619_0402_1%HDMI@R947 619_0402_1%HDMI@

R948 619_0402_1%HDMI@R948 619_0402_1%HDMI@

R949 619_0402_1%HDMI@R949 619_0402_1%HDMI@

R950 619_0402_1%HDMI@R950 619_0402_1%HDMI@

R951 619_0402_1%HDMI@R951 619_0402_1%HDMI@

R953 619_0402_1%HDMI@R953 619_0402_1%HDMI@

R954 619_0402_1%HDMI@R954 619_0402_1%HDMI@

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

C

61

Q46A

Q46A
2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

+3VS

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2

HDMI@

HDMI@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

HDMI PORT

HDMI PORT

HDMI PORT

QBU00

QBU00

QBU00

16 38Wednesday, November 02, 2011

16 38Wednesday, November 02, 2011

16 38Wednesday, November 02, 2011

E

0.3

0.3

0.3

5

4

3

2

1

LCD POWER CIRCUIT

D D

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

GMCH_EN VDD<7 >

C C

LED/PANEL BD. Conn.

+LCDVDD

+3VS

1

C468

C468

@

@

680P_04 02_50V7K

680P_04 02_50V7K

B B

R376 0_0805_ 5%R376 0_0805_ 5%

250mA

B+

+3VS

A A

1 2

R105

R105

0_0603_ 5%

0_0603_ 5%

1 2

+3VS_LV DS_CAM

W=20mils

2

C188680 P_0402_50V7K C188680 P_0402_50V7K

12

C18968P _0402_50V8J C18968P_04 02_50V8J

12

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1 2

C313

C313

680P_04 02_50V7K

680P_04 02_50V7K

+LCDVDD

12

R116

R116
150_060 3_5%

150_060 3_5%

3

Q2B

Q2B

5

4

12

R142

R142

100K_04 02_5%

100K_04 02_5%

R377 0_0805_ 5%R377 0_0805_ 5%

1 2

1

C469

C469

@

@

2

BKOFF#_ L<25>

C306 0.1U_0402_1 6V4ZC306 0 .1U_0402_16V4 Z

+LCD_INV

DMIC_CLK<21>

DMIC_DAT< 21>

2

1 2

+3VS

12

61

LCD_TXO UT0-<7>
LCD_TXO UT0+< 7>

LCD_TXO UT1-<7>
LCD_TXO UT1+< 7>
LCD_TXO UT2-<7>
LCD_TXO UT2+< 7>

R117

R117
100K_04 02_5%

100K_04 02_5%

R141 47K _0402_5%R14 1 47K_0402_5%

Q2A

Q2A

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

12

(20 MIL)

LCD_TXC LK-<7>
LCD_TXC LK+<7>

D54CH751H-40PT_ SOD323-2 D54CH751H-40PT_SO D323-2

2 1

+LCD_INV

+3VS_LV DS_CAM

USB20_N 7_R
USB20_P 7_R

DMIC_CLK
DMIC_DAT

D9

D9

1

PACDN04 2Y3R_SOT23-3

PACDN04 2Y3R_SOT23-3

1

C183

C183

0.1U_040 2_16V7K

0.1U_040 2_16V7K

2

1

C498

C498

0.01U_04 02_25V7K

0.01U_04 02_25V7K

2

+LCDVDD _R

LCD_EDID_ CLK

LCD_EDID_ DATA
LCD_TXO UT0­LCD_TXO UT0+

LCD_TXO UT1­LCD_TXO UT1+
LCD_TXO UT2­LCD_TXO UT2+

LCD_TXC LK­LCD_TXC LK+

INVT_PW M_R

BKOFF#

3

2

2

DMIC_CLK

DMIC_DAT

+3VS

G

G

1 3

1

2

S

S

D

D

Q11

Q11
AO3413_ SOT23

AO3413_ SOT23

C186

C186

@

@

4.7U_080 5_10V4Z

4.7U_080 5_10V4Z

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

W=40mils

2A

+LCDVDD

1

2

JLVDS1

JLVDS1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

I-PEX_2014 3-030E-20F~D

I-PEX_2014 3-030E-20F~D

@

@

1

C149

C149

4.7U_080 5_10V4Z

4.7U_080 5_10V4Z

2

W=40mils

C187

C187

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

34

MGND4

33

MGND3

32

MGND2

31

MGND1

@

@

2011.05.22 Remove EDID pull up resistors for Intel issue

+3VS

R144

R144

@

@

1 2

1 2

2.2K_0402_5%

2.2K_0402_5%

LCD_EDID_ CLK <7>

LCD_EDID_ DATA <7>

LCD_EDID_ CLK

LCD_EDID_ DATA

R143

R143

@

@

2.2K_0402_5%

2.2K_0402_5%

2011.05.20 LCD brightness will controlled by CPU(DPST)

GMCH_INVT _PWM<7>

Int. Camera

USB20_N 7_R
USB20_P 7_R

D55CH751H-40PT_ SOD323-2 @D55CH751H-40PT_ SOD323-2 @

INVT_PW M<25>

1 2

R392 0_0402_5%

R392 0_0402_5%

1

4

1 2

R393 0_0402_5%

R393 0_0402_5%

2 1

R420 0_0402 _5%R420 0_0 402_5%

1 2

@

@

L13

L13

1

4

WCM2 012F2S-900T04 _0805

WCM2 012F2S-900T04 _0805

@

@

2

2

3

3

INVT_PW M_R

USB20_N 7 <12>

USB20_P 7 <12>

Security Class ification

Security Class ification

LCD_TXC LK+ LCD_TXC LK-

5

C871 10P_040 2_50V8JC 871 10P_0402_50V8 J

1 2

4

Security Class ification

2010/06/ 27 2011/6/2 7

2010/06/ 27 2011/6/2 7

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/ 27 2011/6/2 7

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LVDS /INVERTER

LVDS /INVERTER

LVDS /INVERTER

QBU00

QBU00

QBU00

17 38Wed nesday, November 02, 2011

17 38Wed nesday, November 02, 2011

17 38Wed nesday, November 02, 2011

1

0.3

0.3

0.3

A

B

C

D

E

Mini-Express Card for WLAN/WiMax

+3V_WLAN

120 mil

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C258

C258

C259

R326

R326

2

12

WLAN@

WLAN@

C259

WLAN@

1 1

WLAN@

0.01U_0402_25V7K

0.01U_0402_25V7K

WLAN@

BT_CTRL EC_ RX_P80_CLK_R

WLAN@

1K_0402_5%

1K_0402_5%

# MP Add R326 1K for WB195 pin 51

WLAN_CLKREQ#<9>

CLK_PCIE_WLAN#<9>

CLK_PCIE_WLAN<9>

CLK_PCI_DDR<9>

PCIE_PTX_C_IRX_N2<12>
PCIE_PTX_C_IRX_P2<12>

PCIE_ITX_C_PRX_N2<12>

PCIE_ITX_C_PRX_P2<12>

2 2

EC_TX_P80_DATA<25>
EC_RX_P80_CLK<25>

WLAN/ WiFi

12

DEBUG@

DEBUG@

R425 0_0402_5%

R425 0_0402_5%
R426

R426

Debug card using

R429

DEBUG@R429

DEBUG@

100K_0402_5%

100K_0402_5%

1

C260

C260

WLAN@

WLAN@

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

+3V_WLAN

1 2
1 2

1

2

BT_CTRL

WLAN_CLKREQ#

PLTRST#

CLK_PCI_DDR

EC_RX_P80_CLK_R

0_0402_5%D EBUG@

0_0402_5%D EBUG@

C479

C479

WLAN@

WLAN@

47P_0402_50V8J

47P_0402_50V8J

For WWAN reques t For WWAN request

+1.5VS

1
3
5
7

9
11
13
15

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53
54

JWLAN

JWLAN

1
3
5
7
9
11
13
15

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

GND
GND

WLAN@

WLAN@

+1.5V_WLAN

C261

C261

0.01U_0402_25V7K

0.01U_0402_25V7K

1 2

R888 0_0805_5%

R888 0_0805_5%

WLAN@

WLAN@

2
4
6

8
10
12
14
16

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

ACES_88910-5204CONN @

ACES_88910-5204CONN @

Mini-Express Card for 3G/GPS

3G current need to 2750mA

+3V_WWAN +1.5V_WWAN

120 mil

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

WWAN@

WWAN@

2

C266

C266

1

C267

C267

WWAN@

WWAN@

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

C265

C265

WWAN@

WWAN@

0.01U_0402_25V7K

0.01U_0402_25V7K

3 3

2011.04.28 Reserve for new 3G/LTE module

EC_SWI#<13,23,25>

Reserve

4 4

GPS_OFF#<25>

T71PAD T71PAD
T72PAD T72PAD

WWAN_CLK REQ#<9>

CLK_PCIE_WW AN#<9>

CLK_PCIE_WW AN<9>

PCIE_PTX_C_IRX_N3<12>
PCIE_PTX_C_IRX_P3<12>

PCIE_ITX_C_PRX_N3<12>

PCIE_ITX_C_PRX_P3<12>

+3V_WWAN

D57

@ D57

@

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

1 2

R438

MC77XX@ R438

MC77XX@

0_0402_5%

0_0402_5%

2011.04.28 Reserve for new 3G/LTE module

A

3/16 PVT:Add B OM Config of C 481,C482 to 3G GPS@

1

C482

2

R435 0_0402_ 5%MC77XX@ R435 0_0402_5%MC77XX@

1 2

R433 0_0402_ 5%MC77XX@ R433 0_0402_5%MC77XX@

1 2

R434 0_0402_ 5%MC77XX@ R434 0_0402_5%MC77XX@

1 2

GPS_OFF#_R

21

C482

WWAN@

WWAN@

47P_0402_50V8J

47P_0402_50V8J

For WWAN reques t For WWAN reques t
2/25 PVT:Mount C482,C481 with 47pf

WWAN_CLK REQ#

C268

C268

WWAN@

WWAN@

0.01U_0402_25V7K

0.01U_0402_25V7K

+1.5VS +1.5V_WWAN

R890 0_0805_5%

R890 0_0805_5%

JGPS

JGPS

1

1

3

3

5

5

7

7

9

9

11
13
15

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53
54

10

11

12

13

14

15

16

17
19

18

21

20

23

22

25

24

27

26

29

28

31

30

33

32

35

34

37

36

39

38

41

40

43

42

45

44

47

46

49

48

51

50

52
GND
GND

P-TWO_A54402-A0G16-N

P-TWO_A54402-A0G16-N

CONN@

CONN@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

WWAN@

WWAN@

2

1 2

WWAN@

WWAN@

120 mil

2

2

4

4

6

6

8

8

10
12
14
16

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2/25 PVT:Mount C479,C480 with 47pf
3/16 PVT:Add B OM Config of C 481,C482 to WL AN@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C269

C269

2
4
6
8
10
12
14
16

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

C262

C262

WLAN@

WLAN@

1

2

WWAN@

WWAN@

4.7U_0805_10V4Z

4.7U_0805_10V4Z

1

C263

C263

WLAN@

WLAN@

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

+1.5V_WLAN

+3V_WLAN

1

C270

C270

2

+3V_WWAN

+UIM_PWR

UIM_DATA
UIM_CLK
UIM_RST
UIM_VPP

UWB_OFF#_R
PLTRST#

CLK_SMBCLK
CLK_SMBDATA

LED_WIMAX#_R

1

C480

C480

WLAN@

WLAN@

2

47P_0402_50V8J

47P_0402_50V8J

LPC_FRAME#_R
LPC_AD3_R
LPC_AD2_R
LPC_AD1_R
LPC_AD0_R

WL_OFF_R#
PLTRST#

C481

C481

WWAN@

WWAN@

47P_0402_50V8J

47P_0402_50V8J

1 2

R889 0_0805_5%

R889 0_0805_5%

WWAN@

WWAN@

+1.5V_WWAN
+UIM_PWR

USB20_N5 <12>
USB20_P5 <12>

CLK_SMBCLK <9,10>
CLK_SMBDATA <9,10>

USB20_N6 <12>
USB20_P6 <12>

@

@

1 2

R428

R428
0_0402_5%

0_0402_5%

#DVT WLAN,WWAN and BT LED
control by EC a nd HW reserve

R4370_0402_5% MC77XX@R4370_0402_5% MC77XX@

12

R4360_0402_5% MC77XX@R4360_0402_5% MC77XX@

12

2011.04.28 Reserve for new 3G/LTE module

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LPC_FRAME#_R <25>
LPC_AD3_R <25>
LPC_AD2_R <25>
LPC_AD1_R <25>
LPC_AD0_R <25>

PLTRST# <7,13,23>

LED_WIMAX#LED_WIMAX#_R

R229
100K_0402_5%

100K_0402_5%

1 2

+3VS

+UIM_PWR

C296

C296

0.1U_0402_16V4Z

0.1U_0402_16V4Z

3G@

3G@

T74 PADT74 PAD
T73 PADT73 PAD

Issued Date

Issued Date

Issued Date

@R229

@

1

2

C

PJ20

PJ20

2

JUMP_43X79@

JUMP_43X79@

+3VS

112

#EVT WLAN&BT Combo module circuits

BT_CRTL

+3VS

R259

R259

100K_0402_5%

LED_WIMAX# <25,27>

+3VS

WL_OFF_R#

+UIM_PWR

UIM_RST

12

UIM_CLK

D13

D13

GLZ20A LL-34

GLZ20A LL-34

3G@

3G@

UWB_OFF#_R

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

WWAN@ R431

WWAN@

Compal Secret Data

Compal Secret Data

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

Compal Secret Data

100K_0402_5%

BT_PWR#<13>

D49

@ D49

@

2 1

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

1 2

R430

R430
0_0402_5%

0_0402_5%

D14

D14

1

V I/O

Ground2V BUS

3

V I/O

IP4223CZ6_SO6-6

IP4223CZ6_SO6-6

@

@

D52

@D52

@

2 1

1 2

R431
0_0402_5%

0_0402_5%

Deciphered Date

Deciphered Date

Deciphered Date

V I/O

V I/O

BT
on module

Enable Disable

HI LO

# MP Add R328
by pass for co st down

R328

@R328

@

0_0402_5%

0_0402_5%

1 2

1 2

6

5

4

2

G

G

WL_OFF# <25>

UWB_OFF# < 25>

D

BT
on module

BT_CTRL

13

D

D

Q41

Q41

2N7002_SOT23

2N7002_SOT23

S

S

WLAN@

WLAN@

+UIM_PWR

J3GSIM

J3GSIM

CONN@

CONN@

1

VCC

2
3

7

SUYIN_254020MA006S522ZL~D

SUYIN_254020MA006S522ZL~D

GND

RST

VPP

CLK

GND

I/O

GND

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet of

Date: Sheet of

+UIM_PWR

4

UIM_VPP

5
6

8

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

WLAN/WiMAX Express Slot

WLAN/WiMAX Express Slot

WLAN/WiMAX Express Slot

QBU00

QBU00

QBU00

12

R231

R231

4.7K_0402_5%

4.7K_0402_5%

3G@

3G@

UIM_DATA

E

0.3

0.3

0.3

of

18 38Monday, November 07, 2011

18 38Monday, November 07, 2011

18 38Monday, November 07, 2011

5

4

3

2

1

USB Sleep & Charge
Auto-Mode
Mode3

D D

C C

Use PCH

MAX14566B

CB0
SLP_CHG_M4

0 1

1 X

USB20_N4 _R
USB20_P 4_R

SLP_CHG_ M3_PCH<12 >

SLP_CHG_ M4_PCH<12 >

0

CHG@

CHG@

R211 0_0 402_5%

R211 0_0 402_5%

CHG@

CHG@

R213 0_0 402_5%

R213 0_0 402_5%

CB1 (CEN#)
SLP_CHG_M3

0

SA00004GV00

US1

1
2
3
4
9

MAX1456 6BEETA+_TDFN-EP8 _2X2~D

MAX1456 6BEETA+_TDFN-EP8 _2X2~D

1 2

R221 0 _0402_5%

R221 0 _0402_5%

1 2

R222 0 _0402_5%

R222 0 _0402_5%

CHG@US1

CHG@

CEN

CB

DM

TDM

DP

TDP

GND

VCC

GND

SLP_CHG_ M3

12

SLP_CHG_ M4

12

STATUS

AUTO MODE

Force Dedicated charger mode
(MODE3)

Pass-Through (USB) Mode:
Connect DP/DM to TDP/TDM

nonCHG@

nonCHG@

nonCHG@

nonCHG@

8
7
6
5

SLP_CHG_ M4SLP_CHG _M3
USB20_N4
USB20_P 4

1

C892

C892

0.1U_040 2_16V7K

0.1U_040 2_16V7K

CHG@

CHG@

2

+5VALW

USB20_N4 <12>
USB20_P 4 <12>

150U_B2 _6.3VM_R45 M

150U_B2 _6.3VM_R45 M

0120 reserve both EC and PCH.

For EMI request

2/3 DVT: Change D38,D37 from PRTR5V0U2X_SOT143-4 to CM1293A-04SO_SOT23-6

USB_CHG_ EN#<25>

USB_EN#<25>

+USB_VCCB

+USB_VCCB

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

1

+

+

C2

C2

C3

C1

C1

C3

2

2

470P_04 02_50V8J

470P_04 02_50V8J

1 2

R1 0_0402_5%@ R1 0_0402_ 5%@
L1

USB20_N4 _R

USB20_P 4_R USB20 _P4_RL USB20_N4_ RLUSB20_P 4_RL

L1

1

1

4

4

WCM201 2F2S-900T04_ 0805

WCM201 2F2S-900T04_ 0805

1 2

R2 0_0402_5%@ R2 0_0402_ 5%@

For EMI request

USB_OC#0 _1_PCH<12>

USB_OC#4 _PCH<12 >

#DVT USB_OC# control by EC

1 2

R88

R88
0_0402_ 5%

0_0402_ 5%

1 2

R87

@R87

@

0_0402_ 5%

0_0402_ 5%

#PVT R88 CHG@ change to
always stuff for OC protect
actioc same

W=30mils

1

1

C4

C4

2

2

1000P_0 402_50V7 K

1000P_0 402_50V7 K

USB20_N4 _RL
USB20_P 4_RL

2

2

3

3

USB20_N4 _RL

1 2

R7 0_0402_5%@ R7 0_0402_ 5%@

1 2

R8 0_0402_5%@ R8 0_0402_ 5%@

1
2
3
4

5
6
7
8

JUSB1

JUSB1

VCC
D­D+
GND

GND1
GND2
GND3
GND4

SUYIN_020 133GB004M2 5MZL

SUYIN_020 133GB004M2 5MZL

CONN@

CONN@

1
2

4

USB_OC#0 _1

USB_OC#4

For EMI request

US4

US4

GND

VIN3VOUT
EN

G547E2P 11U_SO8

G547E2P 11U_SO8

1 2

R9 0_0402_ 5%R9 0 _0402_5%

1 2

R10 0_04 02_5%R10 0_0 402_5%

W=30mils

+USB_VCCB+5VALW

8

VOUT
VOUT7VIN

6
5

FLG

D1

D1

1

6

I/O1

I/O4

2

5

REF1

REF2

4

I/O23I/O3

CM1293A-0 4SO_SOT23-6

CM1293A-0 4SO_SOT23-6

USB_OC#4

1

C288

C288

@

@

4.7U_080 5_10V4Z

4.7U_080 5_10V4Z

2

1 2

C5

C5

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

+5VALW

USB_OC#0 _1_EC <2 5>

USB_OC#4 _EC <25 >

USB CONN

1.4A

U18

U18

1

GND

2

IN

3
4

USB20_P 0<1 2>
USB20_N0<1 2>

USB20_P 1<1 2>
USB20_N1<1 2>

IN
EN#

APL3510 BXI-TRG MSOP 8

APL3510 BXI-TRG MSOP 8

+USB_VCCA

USB_EN#

B B

A A

5

OUT
OUT
OUT
OC#

8
7
6
5

USB20_P 0
USB20_N0

USB20_P 1
USB20_N1

W=60mils

USB_OC#0 _1

1
2
3
4
5
6
7
8

9
10
11
12

ACES_85 201-1005N_ 10P

ACES_85 201-1005N_ 10P

+USB_VCCA+5VALW

1

C283

C283

4.7U_080 5_10V4Z

4.7U_080 5_10V4Z

2

JP1

JP1

1
2
3
4
5
6
7
8
9
10
GND
GND

CONN@

CONN@

H14

H2

H2

@

@

1

H_2P3

H_2P3

H7

H7

H6

H6

@

@

@

@

1

1

H_2P3

H_2P3

H_2P3

H_2P3

H4

H4

H3

H3

@

@

@

@

1

1

H_2P3

H_2P3

H_2P3

H_2P3

H8

H8

@

@

1

H_1P2

H_1P2

H11

H11

H12

H12

@

@

@

@

1

1

H_3P3

H_3P3

H_3P3

H_3P3

H10

H10

H9

H9

@

@

@

@

1

1

H_1P2

H_1P2

H_1P2

H_1P2

H14

H13

H13

@

@

@

@

1

1

H_2P0X2 P6N

H_2P0X2 P6N

H_2P0N

H_2P0N

# PVT Add H14 and remove H1

Add 0.1u Caps for each screw hole for ESD rule

+3VS

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C531

C531

2

1

C528

C528

2

Close to H7 Close to H2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

@ C53 5

@

2

C535

1U_0402_6.3V4Z

1U_0402_6.3V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C534

C534

2

+5VALW

1

C526

C526

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Close to H9,H6

1

C527

C527

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

FIDUCIAL_C40M80

FM2@FM2

FM1@FM1

@

@

1

1

FM3@FM3

FM4@FM4

@

@

1

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Close to H5

Compal Secret Data

Compal Secret Data

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

3

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

USB Conn

USB Conn

USB Conn

QBU00

QBU00

QBU00

0.3

0.3

19 38W ednesday, November 0 2, 2011

19 38W ednesday, November 0 2, 2011

19 38W ednesday, November 0 2, 2011

1

0.3

A

B

C

D

E

F

G

H

SATA Conn.

For 1.8" SSD

+3VS+5VS

Place closely JHDD SATA CONN.

1.2A

1
2
3
4
5
6
7

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

23
24

1

C277

C277

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

SATA_ITX_ C_DRX_P0
SATA_ITX_ C_DRX_N0

SATA_IRX_ DTX_N0
SATA_IRX_ DTX_P0

1

C278

C278

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

C284 0.01U_04 02_25V7KC284 0.01U_04 02_25V7K

1 2

C285 0.01U_04 02_25V7KC285 0.01U_04 02_25V7K

1 2

C286 0.01U_04 02_25V7KC286 0.01U_04 02_25V7K

1 2

C287 0.01U_04 02_25V7KC287 0.01U_04 02_25V7K

1 2

+3VS

+5VS

1

C275

C275

1 1

10U_080 5_10V4Z

10U_080 5_10V4Z

2

2 2

SUYIN_127043 FR022G226ZL_ NR

SUYIN_127043 FR022G226ZL_ NR

1

C276

C276

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

JSATA

JSATA

GND

A+

A-

GND

B-

B+

GND

V33
V33

V33
GND
GND
GND

V5
V5
V5

GND

Reserved

GND

V12

V12

V12

GND
GND

CONN@

CONN@

SSD HDD need 400mA for 3V(PHISON)

1

C279

C279

@

@

10U_080 5_10V4Z

10U_080 5_10V4Z

2

1

C280

C280

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

SATA_ITX_ DRX_P0 < 11>
SATA_ITX_ DRX_N0 <11>

SATA_IRX_ C_DTX_N0 <1 1>

SATA_IRX_ C_DTX_P0 <11>

1

C281

C281

@

@

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

1

C282

C282

@

@

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

2011.06.16 Add for ESD

3 3

4 4

Security Class ification

Security Class ification

Security Class ification

2010/06/ 27 2011/6/2 7

2010/06/ 27 2011/6/2 7

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2010/06/ 27 2011/6/2 7

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

E

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

F

Date: Sheet of

Compal Electronics, Inc.

SATA / CRT

SATA / CRT

SATA / CRT

QBU00

QBU00

QBU00

G

0.3

0.3

0.3

20 38Wed nesday, November 02, 2011

20 38Wed nesday, November 02, 2011

20 38Wed nesday, November 02, 2011

H

A

B

C

D

E

RA2

+PVDD1

place close to chip

JA1

JA1

JUMP_43X39

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

CA2

1 1

1 2

+3VS

RA1 FBMH1608HM601-TRA1 FBMH 1608HM601-T

ALC259@

ALC259@

UA1

UA1

ALC259-VB5-GR_QFN48_7X7

ALC259-VB5-GR_QFN48_7X7

Ext. Mic/LINE IN

MIC1_LINE1_R_L<22>

MIC1_LINE1_R_R<22>

2 2

HDA_RST#_CODEC<13>

EC_MUTE#

3 3

MIC1_LINE1_R_LMIC1_LINE1_R_LMIC1_LINE1_R_L

MIC1_LINE1_R_RMIC1_LINE1_R _RMIC1_LINE1_R_RMIC1_LINE1_R_RMIC1_ LINE1_R_RMIC1_LINE1_R_R

RA40

RA40

100K_0402_5%

100K_0402_5%

12

RA45

RA45

4.7K_0402_5%

4.7K_0402_5%

12

CA11

CA11

0.01U_0402_25V7K

0.01U_0402_25V7K

@

@

@

@

For EMI

Add RA45 and u n-mount RA43 a t PVT
for audio noise issue

CA2

+3VS_DVDD

MIC1_LINE1_R_L

MIC1_LINE1_R_R

CA12 100P_0402_50V8JCA12 100P_0402_50V8J

10U_0805_10V4Z

10U_0805_10V4Z

2

1

CA8

CA8

10U_0805_10V4Z

10U_0805_10V4Z

2

Change CA9 and CA10
to 1U at pre-MP

ALC269@CA10

ALC269@

DMIC_DAT<17> HDA_BITCLK_CODEC <13>

HDA_RST#_CODEC

1 2

+MIC1_VREFO_L

1

CA1

CA1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

CA7

CA7

2

CA9 1U_0402_6.3V4ZALC269@CA9 1U _0402_6.3V4ZALC269@

12

CA10

1U_0402_6.3V4Z

1U_0402_6.3V4Z

12

CA214.7U_0805_10V4Z CA214.7U_0805_10V4Z

12

12

CA224.7U_0805_10V4Z CA224.7U_0805_10V4Z

DMIC_DAT

DMIC_CLK_R

EC_MUTE#

MONO_IN

SENSE_A

1 2

CA15

CA15

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

DGND

LINE1_L
LINE1_R

MIC_L
MIC_R

+3VS_DVDD

35 mA

1

DVDD

23

LINE1_L

24

LINE1_R

14

LINE2_L

15

LINE2_R

21

MIC1_L

22

MIC1_R

16

MIC2_L

17

MIC2_R

2

GPIO0/DMIC_DATA

3

GPIO1/DMIC_CLK

4

PD#

11

RESET#

12

PCBEEP

13

SENSE A

18

SENSE B

36

CBP

35

CBN

31

MIC1_VREFO_L

43

PVSS2

42

PVSS1

49

DVSS2

7

DVSS1

JUMP_43X39

+PVDD2

1

CA61

CA61

+AVDD
2

9

46

AVDD125AVDD2

PVDD139PVDD2

DVDD_IO

SPK_OUT_L+

SPK_OUT_L-

SPK_OUT_R+

SPK_OUT_R-

HP_OUT_L

HP_OUT_R

SYNC

BCLK

SDATA_OUT

SDATA_IN

EAPD

SPDIFO

MONO_OUT

MIC2_VREFO

MIC1_VREFO_R

LDO_CAP

VREF

JDREF

CPVEE

AVSS1
AVSS2

ALC269Q-VB2-GR_QFN48_7X7

ALC269Q-VB2-GR_QFN48_7X7

@

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

68 mA

ALC269@

ALC269@

38

UA1

UA1

600 mA

2

1

40
41

45
44

32
33

10

6

5

8

47

48

20

29

30
28

27

19

34

26
37

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

CA57

CA57

2

10U_0805_10V4Z

10U_0805_10V4Z

place close to chip

# DVT For RF

1

C224

RF@C224

RF@

68P_0402_50V8J

68P_0402_50V8J

2

10U_0805_10V4Z

10U_0805_10V4Z

1

CA4

CA4

CA3

CA3

2

10U_0805_10V4Z

10U_0805_10V4Z

SPKL+
SPKL-

SPKR+
SPKR-

HDA_SYNC_CODEC

HDA_BITCLK_CODEC

HDA_SDOUT_CODEC

HDA_SDIN0_R

AC_VREF

AC_JDREF

RA9 20K_0402_1%RA9 20K_0402_1%

CPVEE

1 2

CA14 2.2U_0603_6.3V4ZCA14 2.2U_0603_6.3V4Z

AGND

1

2

RA2

0_0603_5%

0_0603_5%

1

CA56

CA56

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

CA6

CA6

CA5

CA5

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

RA6 33_0402_5%RA6 33_0402_5%

+MIC1_VREFO_R

12

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

1

CA44

CA44

2

10U_0805_10V4Z

10U_0805_10V4Z

RA11

RA11

12

0_0603_5%

0_0603_5%

1

CA60

CA60

@

@

@

@

2

10U_0805_10V4Z

10U_0805_10V4Z

RA3

RA3

12

0_0603_5%

0_0603_5%

1

2

place close to chip

HP_L <22>
HP_R <22>

HDA_SYNC_CODEC <13>

HDA_SDOUT_CODEC <13>

HDA_SDIN0 <13>EC_MUTE#<25>

CA23 10U_0805_10V4ZCA23 10U _0805_10V4Z

1 2

1

2

CA17

CA17

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

CA16

CA16

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

place close to chip

1

CA43

CA43

2

+5V_CODEC

+5V_CODEC

+5V_CODEC

for EMI request

CA47 0.1U_0603_50V7KCA47 0.1U_0603_50V7K

1 2

CA48 0.1U_0603_50V7KCA48 0.1U_0603_50V7K

DMIC_CLK_R

DMIC_CLK<17>

1 2

RA47 39_0402_5%

RA47 39_0402_5%

RF@

RF@

2

1

RF@

RF@

C438

C438
100P_0402_50V8J

100P_0402_50V8J

1 2

CA49 0.1U_0603_50V7KCA49 0.1U_0603_50V7K

1 2

CA50 0.1U_0603_50V7KCA50 0.1U_0603_50V7K

1 2

1 2

RA18 0_0603_5%RA18 0_0603_5%

HDA_BITCLK_CODEC

for RF request

1 2

RA42 10_0402_5%RF@R A42 10_0402_5%RF@

1 2

CA62 12P_0402_5 0V8JRF@CA62 12P_0402_50V8JRF@

Add RA43 for S/M battery mode at PVT

Speaker Connector

placement near Audio Codec

RA13

SPKL+

SPKL-

SPKR+

SPKR-

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

+3VL

RA13

0_0603_5%

0_0603_5%

470P_0402_50V8J

470P_0402_50V8J

RA14

RA14

0_0603_5%

0_0603_5%

RA15

RA15

0_0603_5%

0_0603_5%

470P_0402_50V8J

470P_0402_50V8J

RA16

RA16

0_0603_5%

0_0603_5%

EC Beep

EC_BEEP<25>

PCI Beep

PCH_SPKR<13>

+5V_CODEC

MIC_SENSE

QA1A

QA1A

ALC269@

ALC269@

RA44 100K_0402_5%RA44 100K_04 02_5%

12

CA19

CA19

CA20470P_0402_50V8J@CA20470P_0402_50V8J

12

12

CA25

CA25

CA26470P_0402_50V8J@CA26470P_0402_50V8J

12

@

@

@

@

@

@

1

2

1

2

1

2

1

2

1 2

47K_0402_5%

47K_0402_5%

1 2

47K_0402_5%

47K_0402_5%

4.7K_0402_5%

4.7K_0402_5%

61

RA7

RA7

RA8

RA8

2

SPK_L1

2

CA24

CA24
1U_0402_6.3V4Z

1U_0402_6.3V4Z

@

@

1

SPK_L2

SPK_R1

2

CA27

CA27
1U_0402_6.3V4Z

1U_0402_6.3V4Z

@

@

1

SPK_R2

Beep sound

CA13

CA13

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

1

100P_0402_50V8J

RA12

RA12

ALC269@

ALC269@

ALC259@

ALC259@

12

RA55
0_0402_5%

0_0402_5%

RA28 100K_0402_ 5%

RA28 100K_0402_ 5%

100P_0402_50V8J
CA18

CA18

2

1 2

RA53 0_0805_5%

RA53 0_0805_5%

1 2

RA54 0_0805_5%

RA54 0_0805_5%

ALC259@RA55

ALC259@

ALC269@

ALC269@

SPK_L1 <22>

SPK_L2 <22>

SPK_R1 <22>

SPK_R2 <22>

MONO_IN

+5VALW +5VS

Sense Pin Impedance

39.2K

SENSE A

4 4

20K

10K

5.1K

A

Codec Signals

PORT-I (PIN 32, 33)

PORT-B (PIN 21, 22)

PORT-C (PIN 23, 24)

(PIN 48)

Function

Headphone out

Ext. MIC

B

place close to chip

MIC_SENSE SENSE_A

NBA_PLUG<22>

RA10 20K_0402_1%R A10 20K_0402_1%

RA21 39.2K_0402_1%RA21 39.2K_0402_1%

12

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

#EVT EMI for DMIC_CLK solution

C

For EMI

B++3VS

1 2

CA28 1U_0402_6 .3V4Z@CA28 1U_0402_6.3V4Z@

1 2

CA29 1U_0402_6 .3V4Z@CA29 1U_0402_6.3V4Z@

Compal Secret Data

Compal Secret Data

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

SM_SENSE#<25>

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

D

3

QA1B

QA1B

ALC269@

ALC269@

5

4

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

QBU00

QBU00

QBU00

BACK_SENSE <22>

Audio_ALC269

Audio_ALC269

Audio_ALC269

E

0.3

0.3

21 38Wednesday, November 02, 2011

21 38Wednesday, November 02, 2011

21 38Wednesday, November 02, 2011

0.3

A

B

C

D

E

SPEAKER

1 1

DA7

DA7

1

PESD5V0U2BT_ SOT23-3

SPK_R1<21>
SPK_R2<21>
SPK_L1<21>
SPK_L2<21>

2 2

SPK_R1
SPK_R2
SPK_L1
SPK_L2

PESD5V0U2BT_ SOT23-3

PESD5V0U2BT_ SOT23-3

PESD5V0U2BT_ SOT23-3

1

DA6

DA6

2

3

2

3

JSPK1

JSPK1

6

GND2

5

GND1

4

4

3

3

2

2

1

1

CONN@

CONN@

E&T_3806-F0 4N-02R

E&T_3806-F0 4N-02R

Ext.MIC/LINE IN JACK

RA46

RA46

1K_0402_5%

MIC1_LINE1_R_R<21 >

MIC1_LINE1_R_L<21>

3 3

4 4

MIC1_LINE1_R_R

MIC1_LINE1_R_L

A

1K_0402_5%

1K_0402_5%

1K_0402_5%

RA35

RA35

12

RA36 2 .2K_0402_5%RA36 2.2 K_0402_5%

MIC1_R

12

MIC1_L

12

12

RA31 2 .2K_0402_5%RA31 2.2 K_0402_5%

+MIC1_VREFO_R

+MIC1_VREFO_L

B

HP_L<21>

HP_R<21 >

NBA_PLUG<21>

MIC

CA68

CA68

MIC1_L_1MIC1_L

MIC1_R_1MIC1_R MIC1_R_1

1

2

1

33P_0402_50V8K

33P_0402_50V8K

2

LA2 FBM-11-1 60808-601-T_06 03LA2 FBM-11 -160808-601-T_ 0603

1 2

LA1 FBM-11-1 60808-601-T_06 03LA1 FBM-11 -160808-601-T_ 0603

1 2

BACK_SENSE<21>

BACK_SENSE

33P_0402_5 0V8K

33P_0402_5 0V8K

Head phone

RA52 40.2_0402_ 1%

RA52 40.2_0402_ 1%

1 2

RA51 40.2_0402_ 1%

RA51 40.2_0402_ 1%

1 2

<BOM Structure>

NBA_PLUG

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

<BOM Structure>

<BOM Structure>

<BOM Structure>

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

LA4 FBM-11-16080 8-601-T_0603LA4 FBM-11-160808-60 1-T_0603

HP_R_R PRHP_R

Compal Secret Data

Compal Secret Data

Compal Secret Data

1 2

LA3 FBM-11-16080 8-601-T_0603LA3 FBM-11-160808-60 1-T_0603

1 2

0.1U_0402_ 16V4Z

0.1U_0402_ 16V4Z

Deciphered Date

Deciphered Date

Deciphered Date

D

CA67

CA67

@

@

CA69

CA69

12

RA48

RA48

ALC269@

ALC269@

1

@

@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

RA56

RA56

ALC259@

ALC259@

CA70

CA70

33P_0402_5 0V8K

33P_0402_5 0V8K

VL

4.7K_0402_5%

4.7K_0402_5%

12

CA63

CA63

0_0402_5%

0_0402_5%

12

PLHP_L HP_L_R

1

2

JMIC1

JMIC1

8
7
3
1
4
2

5
6

SINGA_2SJ2285-001 191

SINGA_2SJ2285-001 191

CONN@

CONN@

1

CA64

CA64

0.1U_0402_ 16V4Z@

0.1U_0402_ 16V4Z@

2

CA71

CA71

1

2

33P_0402_50V8K

33P_0402_50V8K

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

CA65

CA65

0.1U_0402_ 16V4Z

0.1U_0402_ 16V4Z

2

JHP2

JHP2

8
7
3
1
4
2

5
6

SINGA_2SJ2285-001 191

SINGA_2SJ2285-001 191

CONN@

CONN@

1

CA66

CA66

0.1U_0402_ 16V4Z

0.1U_0402_ 16V4Z

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Audio Jack MIC/HP

Audio Jack MIC/HP

Audio Jack MIC/HP

QBU00

QBU00

QBU00

E

22 38Wednesday, November 02, 2011

22 38Wednesday, November 02, 2011

22 38Wednesday, November 02, 2011

0.3

0.3

0.3

A

2011.04.20 Change to port 1

CL1 0.1U_0402_16V7KCL1 0.1U_0402_16V7K

PCIE_PTX_C_IRX_P1<12>

PCIE_PTX_C_IRX_N1<12>

+3VALW

1 1

12

RL102

RL102
10K_0402_5%

10K_0402_5%

LOM_W AKE#

EC_SWI#<13, 18,25>

1 2

CL2 0.1U_0402_16V7KCL2 0.1U_0402_16V7K

1 2

PCIE_ITX_C_PRX_P1<12>
PCIE_ITX_C_PRX_N1<12>

LAN_CLKREQ#<9>

PLTRST#<7,13,18>

CLK_PCIE_LAN<9>
CLK_PCIE_LAN#<9>

RL20 0_0402_5%RL2 0 0_0402_5%

PCIE_PRX_LANTX_P1

PCIE_PRX_LANTX_N1

RL19 0_0402_5%RL1 9 0_0402_5%

LAN_X1

LAN_X2

LOM_W AKE#

ISOLATEB

2011.04.26 Change control signal to EC_SWI#

RL22 1K_0402_ 5%RL22 1K_0402_5%

1

2

1 2

+LAN_VDDREG

ENSWR EG

1 2

RL5 2.49K_0402_1%RL5 2.49K_0402_1%

+3V_LAN

+3VS

2 2

3 3

RL6

RL6

1K_0402_1%

1K_0402_1%

RL7

RL7

15K_0402_5%

15K_0402_5%

27P_0402_50V8J

27P_0402_50V8J

12

ISOLATEB

YL1

YL1

25MHZ_20PF_7A25000012

25MHZ_20PF_7A25000012

1

CL26

CL26

2

27P_0402_50V8J

27P_0402_50V8J

LAN_X2LAN_X1

12

CL27

CL27

UL1

UL1

22

HSOP

23

HSON

17

HSIP

18

HSIN

16

CLKREQB

25

PERSTB

19

REFCLK_P

20

REFCLK_N

43

CKXTAL1

44

CKXTAL2

28

LANWAKEB

26

ISOLATEB

14

NC/SMBCLK

15

NC/SMBDATA

38

GPO/SMBALERT

33

ENSWREG

34

VDDREG

35

VDDREG

46

RSET

24

GND

49

PGND

RTL8105E-VL-CGT_QF N48_6X6

RTL8105E-VL-CGT_QF N48_6X6

12

CL33 0.01U _0402_16V7K@ CL33 0.01U_0402_16V7 K@

12

CL34 0.01U _0402_16V7K@ CL34 0.01U_0402_16V7 K@

12

CL35 0.01U _0402_16V7K@ CL35 0.01U_0402_16V7 K@

LED3/EEDO

LED1/EESK

LED0

EECS/SCL

EEDI/SDA

MDIP0
MDIN0
MDIP1

MDIN1
NC/MDIP2
NC/MDIN2
NC/MDIP3
NC/MDIN3

DVDD10
DVDD10
DVDD10

DVDD33
DVDD33

AVDD33
AVDD33
AVDD33
AVDD33

EVDD10

AVDD10
AVDD10
AVDD10
AVDD10

REGOUT

B

3/10 Change CL13 0805-->0603

31
37
40

RL2 10K_0402_5%RL2 10K_0402_5%

30

RL1 10K_0402_5%RL1 10K_0402_5%

32

LAN_MDI0+

1

LAN_MDI0-

2

LAN_MDI1+

4

LAN_MDI1-

5
7
8
10
11

13
29
41

27
39

12
42
47
48

21

3
6
9
45

+LAN_REGOUT

36

+3VS

+LAN_VDD10

+3V_LAN

+LAN_EVDD10

+LAN_VDD10

12
12

+3V_LAN

ENSWR EG

+LAN_REGOUT

Layout Note: LL1 must be
within 200mil to Pin36
CL8,CL9 must be within
200mil to LL1
+LAN_REGOUT: Width =60mil

+LAN_VDD10

+3V_LAN

+3V_LAN

RL4

@RL4

@

0_0402_5%

0_0402_5%

RL23

RL23
0_0402_5%

0_0402_5%

2.2UH +-5% NLC 252018T

2.2UH +-5% NLC 252018T

C

LL1

@LL1

@

1 2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

12

LL20_0603 _5% LL20_0603_5%

CL18

CL18

1U_0402_6.3V4Z

1U_0402_6.3V4Z

Close to Pin 21

12

LL30_0603 _5%@LL30_0603 _5%

@

CL28

CL28

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

CL13

CL13

1

2

1

2

1

2

+LAN_EVDD10

2

CL17

CL17

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

+LAN_VDDREG

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

+LAN_VDD10

2

CL9

CL9

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

CL29

CL29

WOL_EN #<25>

Close to Pin 27,39,12,47,48

Close to Pin 3,6,9,13,29,41,45

+3VALW TO +3V_LAN

+3VALW

RL25

RL25

100K_0402_5%

100K_0402_5%

0.1U_0402_16V7K

0.1U_0402_16V7K

1 2

RL16 47K_0402_5%RL16 47K_0402_5%

0.01U_0402_25V7K

0.01U_0402_25V7K

Vgs=-4.5V,Id=3A,Rds<97mohm

CL12

CL12

1 2

CL14

CL14

4.7U_0805_10V4Z

4.7U_0805_10V4Z

D

2

QL1

QL1

G

G

1

2

1

AO3413_SOT23

AO3413_SOT23

2

CL15

CL15

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

+3VALW

S

S

D

D

1 3

1

CL8 1U_0402_6.3V4ZCL8 1U_0402_6.3V4Z

2

@

@

+3V_LAN

CL100.1U_0402_16V4Z CL100.1U_0402_16V4Z

CL40.1U_0402_16V4Z CL40.1U_0402_16V4Z

CL50.1U_0402_16V4Z CL50.1U_0402_16V4Z

CL60.1U_0402_16V4Z CL60.1U_0402_16V4Z

CL70.1U_0402_16V4Z CL70.1U_0402_16V4Z

+LAN_VDD10

CL190.1U_0402_16V4Z CL190.1U _0402_16V4Z

CL200.1U_0402_16V4Z CL200.1U _0402_16V4Z

CL210.1U_0402_16V4Z CL210.1U _0402_16V4Z

CL220.1U_0402_16V4Z CL220.1U _0402_16V4Z

+3V_LAN

1

2

UL2

LAN_MDI1+

12

CL30 0.01U _0402_16V7KCL30 0.01U_0402_16V7K

4 4

LAN_MDI1-

LAN_MDI0+
LAN_MDI0-

A

UL2

1

TD+

2

TD-

3

CT

4

NC

5

NC

6

CT

7

RD+
RD-8RX-

NS681680

NS681680

TX+

RX+

RJ45_MIDI1+

16

TX-

14

CT

13

NC

12

NC

11

CT

10
9

CL31 1000P_0402_ 50V7KC L31 1000P_0402_50V7K

1 2
1 2

CL32 1000P_0402_ 50V7KC L32 1000P_0402_50V7K

RJ45_MIDI0+
RJ45_MIDI0-

1 2
1 2

RL26

RL26
75_0402_1%

75_0402_1%

75_0402_1%

75_0402_1%
RL27

RL27

RJ45_GND

CL3

CL3

1 2

1000P_1808_3KV7K

1000P_1808_3KV7K

3

@

@

D56

D56

223

AZC199-02SPR7G_SOT2 3-3

AZC199-02SPR7G_SOT2 3-3

1

1

1

CL23

CL23

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

LANGND

RJ45_MIDI1­RJ45_MIDI1+

RJ45_MIDI0­RJ45_MIDI0+

RJ45_MIDI1-

15

JLAN1

JLAN1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

GND1

10

GND2

ACES_88231-08001

ACES_88231-08001

CONN@

CONN@

2011/04/18 Add D56 for ESD request

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

C

Date: Sheet of

Compal Electronics, Inc.

LAN RTL8105E

LAN RTL8105E

LAN RTL8105E

23 38Wednesday, November 02, 2011

23 38Wednesday, November 02, 2011

D

23 38Wednesday, November 02, 2011

0.3

0.3

0.3

A

1 1

B

SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14

C

XD_CD#
XD_RDY

SD_WP

SD_D1
SD_D0
SD_D7
SD_CD#
SD_D6
SD_CLK
SD_D5
SD_CMD
SD_D4
SD_D3
SD_D2

MS_CLK
MS_INS#

MS_D7
MS_D3

MS_D6
MS_D2
MS_D0

MS_D4
MS_D1
MS_D5
MS_BS

XD_RE#
XD_CE#
XD_CLE
XD_ALE
XD_WE#
XD_WP
XD_D0
XD_D1
XD_D2
XD_D3
XD_D4
XD_D5
XD_D6
XD_D7

D

E

+3VS_CR

R891

R891

0_0805_ 5%

0_0805_ 5%

12

1

2

CC5

CC5

2

1

4.7U_0805_10V4Z

4.7U_0805_10V4Z

+3VS

2 2

CC4 100P_0 402_50V8JCC4 100P_0 402_50V8J

RC7 6.2K _0603_1%RC7 6.2 K_0603_1%

1 2

CC13

CC13

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

USB20_N 3<12>

USB20_P 3<12> CLK_48M _CR <9 >

need 12 mil trace

1

CC8

CC8

2

1U_0402_6.3V6K

1U_0402_6.3V6K

VREG

RREF

+VCC_3IN1

SDWP #

SD_DATA 1
SD_MS_D ATA0

1

2
3

4
5
6

7

8

9
10
11
12

UC1

UC1

REFE

DM
DP

3V3_IN
CARD_3V3
V18

XD_CD#

SP1
SP2
SP3
SP4
SP5

17

GPIO0

24

CLK_IN

23

XD_D7

22

SP14

21

SP13

20

SP12

19

SP11

18

SP10

16

SP9

15

SP8

14

SP7

13

SP6

EPAD

RTS5137 -GR QFN 24P_4X4

RTS5137 -GR QFN 24P_4X4

25

CR_LED#

XTLI

SD_DATA 2
SD_DATA 3

SDCMD

SD_MS_C LK SDCL K

SDCD#

12

RC190_04 02_5% RC190_0 402_5%

RC11 33_0402 _5%RC11 33_040 2_5%

CR_LED# <27>

48Mhz

1 2

R556

R556

1 2

33_0402 _5%

33_0402 _5%

@

@

C1073

C1073

1 2

22P_040 2_50V8J

22P_040 2_50V8J

@

@

2 in 1 Card Reader

JREAD1

SD_DATA 3

+VCC_3IN1

3 3

2

CB29

CB29

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

SDCMD

SDCLK

SD_MS_D ATA0

SD_DATA 1

SD_DATA 2

SDCD#

SDWP #

JREAD1

1

SD-DAT3

2

SD-CMD

3

SD-GND

4

SD-VCC

5

SD-CLK

6

SD-GND

7

SD-DAT0

8

SD-DAT1

9

SD-DAT2

10

11

GND1

DETECT

GND2

PROTECT

TAITW_ PSDATA009GLB S1ZZ4H

TAITW_ PSDATA009GLB S1ZZ4H

CONN@

CONN@

12

13

10_0402 _5%

10_0402 _5%

SDCLK

1 2

RC18

@R C18

@

4 4

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10P_040 2_50V8J

10P_040 2_50V8J

CC15

@C C15

@

Compal Secret Data

Compal Secret Data

2010/06/ 27 2011/6/2 7

2010/06/ 27 2011/6/2 7

2010/06/ 27 2011/6/2 7

C

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Card reader RTL5137

Card reader RTL5137

Card reader RTL5137

QBU00

QBU00

QBU00

24 38Wed nesday, November 02, 2011

24 38Wed nesday, November 02, 2011

24 38Wed nesday, November 02, 2011

E

0.3

0.3

0.3

LPC_FRAME#_R<18>

LPC_AD3_R<18>

LPC_AD2_R<18>

LPC_AD1_R<18>

LPC_AD0_R<18>

LPC_FRAME#_R

LPC_AD3_R

LPC_AD2_R

LPC_AD1_R

LPC_AD0_R

@

@

10_0402_5%

10_0402_5%

@

@

22P_0402_50V8J

22P_0402_50V8J

2011.04.26 Reserve GPIO to control LED

+3V_EC

R303

R303
47K_0402_5%

47K_0402_5%

12

12

C387 0 .1U_0402_16V4ZC387 0.1U_04 02_16V4Z

KSO[0..15]<26>

KSI[0..7]<26>

KSO[0..15]

KSI[0..7]

1 2

1 2

1 2

1 2

1 2

R302

R302

C385

C385

ECRST#

LPC_FRAME#

R3100_0402_5% DEBUG@ R3100_0402_5% DEBUG@

LPC_AD3

R3110_0402_5% DEBUG@ R3110_0402_5% DEBUG@

LPC_AD2

R3150_0402_5% DEBUG@ R3150_0402_5% DEBUG@

LPC_AD1

R3160_0402_5% DEBUG@ R3160_0402_5% DEBUG@

LPC_AD0

R3170_0402_5% DEBUG@ R3170_0402_5% DEBUG@

CLK_PCI_LPC

12

1

2

confirm battery team change + 5VALW to +3VALW

+3V_EC

EC_SMB_CK1

R323 2.2K_0402_5%R323 2.2K_0402_5%

EC_SMB_DA1

R314 2.2K_0402_5%R314 2.2K_0402_5%

EC_SMB_CK2

R308 2.2K_0402_5%R308 2.2K_0402_5%

EC_SMB_DA2

R309 2.2K_0402_5%R309 2.2K_0402_5%

+3VS

For EC recommen d 10/17

01/06 Add HW board ID in EC pin16

+3V_EC

12

R318

@R318

@

10K_0402_5%

10K_0402_5%

12

R319

R319
10K_0402_5%

10K_0402_5%

HW_BOARD_ID

WP_R<26>

BATT_TEMPA

ACIN_D

2010.07.15 EMI request

1 2

0_0402_5%

0_0402_5%

1 2

C388 100P_0402_50V8JC388 100P_0402_50V8J

1 2

C390 100P_0402_50V8JC390 100P_0402_50V8J

PCI_RST#

12

C389 0 .1U_0402_16V4ZC389 0.1U_04 02_16V4Z

R320

@R320

@

WPWP_R

+3VL

R613

R613

0_0603_5%

0_0603_5%

+3VALW

R612

@ R612

@

0_0603_5%

0_0603_5%

GATEA20<11>

EC_KBRST#<11>

SERIRQ<11>

LPC_FRAME#<13>

LPC_AD3<13 >
LPC_AD2<13 >
LPC_AD1<13 >
LPC_AD0<13 >

CLK_PCI_LPC<9>

PCI_RST#<11>

EC_SCI#<13>

EC_SMB_CK1<30>
EC_SMB_DA1<30>
EC_SMB_CK2<7>
EC_SMB_DA2<7>

PM_SLP_S3#<13>
PM_SLP_S5#<13>

EC_SMI#< 13>

INVT_PWM<17>

FAN_SPEED1<26>

1 2

R987 0_0 402_5%R987 0_0402_5%

LED_WIMAX#<18,27>

#DVT EC to contral WWAN,
WLAN and BT LED

EC_TX_P80_DATA<18>
EC_RX_P80_CLK<18 >

PWR_SUSP_LED#<27>

EC_CLK<13>

12

12

1

2

1 2

100K_0402_5%

100K_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C673

C673

C674

C674

1

2

GATEA20
EC_KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

CLK_PCI_LPC
PCI_RST#
ECRST#
EC_SCI#
LED_WIMAX#_EC

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
HW_BOARD_ID

WP

INVT_PWM
FAN_SPEED1

EC_TX_P80_DATA

EC_RX_P80_CLK

PWR_SUSP_LED#

R3220_0402 _5% R3220_0402_5%

RZ01

RZ01

+3V_EC

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C675

C675

1

1

2

2

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LPC_FRAME#/LFRAME#

5

LPC_AD3/LAD3

7

LPC_AD2/LAD2

8

LPC_AD1/LAD1

10

LPC_AD0/LAD0

12

CLK_PCI_EC/PCICLK

13

PCIRST#/GPIO05

37

EC_RST#/ECRST#

20

EC_SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/SCL0/GPIO44

78

EC_SMB_DA1/SDA0/GPIO45

79

EC_SMB_CK2/SCL1/GPIO46

80

EC_SMB_DA2/SDA1/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

SUS_PWR_DN_ACK/GPIO0D

25

INVT_PWM/PWM2 /GPIO11

28

FAN_SPEED1/FANFB0/GPIO14

29

FANFB1/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLK1

123

XCLK0

1

12

KB930QF-A1_LQFP128_1 4X14

KB930QF-A1_LQFP128_1 4X14
CZ01

@CZ01

@
2

20P_0402_50V8J

20P_0402_50V8J

C679

L49

L49

FBMA-L11-160808- 800LMT_0603

FBMA-L11-160808- 800LMT_0603

C677

C677

2

1

Int. K/B

Int. K/B
Matrix

Matrix

1 2

1000P_0402_50V7K

1000P_0402_50V7K

C678

C678

9

22

33

VCC

VCC

LPC & MISC

LPC & MISC

PS2 Interface

PS2 Interface

SM Bus

SM Bus

GND

11

24

96

111

125

VCC

VCC

VCC

VCC

PWM Output

PWM Output

ACOFF/FANPWM1/G PIO13

AD Input

AD Input

DA Output

DA Output

EC_MUTE#/PSCLK1/GPIO4A

USB_EN#/PSDAT1/GPIO4B

CAP_INT#/PSCLK2/GPIO4C

TP_DATA/PSDAT3/GPIO4F

WOL_EN/SDICLK/GPXIOA01

ME_EN/SDIMOSI/GPXIOA02

SPI Device I/F

SPI Device I/F

SPI Flash ROM

SPI Flash ROM

GPIO

GPIO

BATT_CHG_LED#/GPIO52

BATT_LOW_LED#/GPIO54

VR_ON/XCLK32K/GPIO57

GPIO

GPIO

GPO

GPO

GPI

GPI

GND

GND

GND

GND

35

94

113

67

AVCC

BEEP#/PWM1/GPIO10

BATT_TEMP/AD0/GPI38

BATT_OVP/AD1/GPI39

DAC_BRIG/DA0/GPO3C
EN_DFAN1/DA1/GPO3D

TP_CLK/PSCLK3/GPIO4E

CAPS_LED#/GPIO53

EC_RSMRST#/GPXIOA03
EC_LID_OUT#/GPXIOA04

EC_SWI#/GPXIOA06

ICH_PWROK/GPXIOA07

RF_OFF#/GPXIOA09

PM_SLP_S4#/GPXIOD01

EC_THERM#/GPXIOD04

PBTN_OUT#/GPXIOD06

EC_PME#/GPXIOD07

AGND

69

20mil

ECAGND

FBMA-L11-160808- 800LMT_0603

FBMA-L11-160808- 800LMT_0603

1000P_0402_50V7K

1000P_0402_50V7K

C676

C676

2

1

U29

U29

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 2

R985

R985

1 2

0_0402_5%

0_0402_5%

PWM0/GPIO0F

FANPWM0/GPIO12

ADP_I/AD2/GPI3A

AD3/GPI3B
AD4/GPI42
AD5/GPI43

IREF/DA2/GPO3E

DA3/GPO3F

PSDAT2/GPIO4D

SDICS#/GPXIOA00

LID_SW#/GPXIOD00

SPIDI/MISO

SPIDO/MOSI

SPICLK/GPIO58

SPICS#

GPIO40

H_PECI/GPIO41

FSTCHG/GPIO50

PWR_LED#/GPIO55

SYSON/GPIO56

AC_IN/GPIO59

EC_ON/GPXIOA05

BKOFF#/GPXIOA08

GPXIOA10
GPXIOA11

ENBKL/GPXIOD02

EAPD/GPXIOD03

SUSP#/GPXIOD05

V18R

L50

L50

C679

1 2

0_0402_5%

0_0402_5%

ECAGND+3V_EC +EC_VCCA

R986

R986

@

@

SM_SENSE#

21

EC_BEEP

23

EC_PWM_FAN

26

ACOFF

27

BATT_TEMPA

63
64

ADP_I

65

ADP_V

66

USB_OC#0_1_EC

75
76

USB_CHG_EN#

68
70

IREF

71

CHGVADJ

72

EC_MUTE#

83

USB_EN#

84

THERM#

85
86

TP_CLK

87

TP_DATA

88

VGATE

97

WOL_EN#

98

GPS_OFF#

99
109

EC_SI_SPI_SO

119

EC_SO_SPI_SI

120

EC_SPICLK

126

SPI_CS#

128

ENBKL

73

USB_OC#4_EC

74

FSTCHG

89

BATT_FULL_LED#

90

CAPS_LED#

91

BATT_CHG_LOW_LED#

92

PWR_ON_LED#

93

SYSON

95
121

PM_SLP_S4#

127

EC_RSMRST#

100

EC_LID_OUT#

101
102

EC_SWI#

103

EC_PWROK

104

BKOFF#_L

105

PBTN_OUT#

106

UWB_OFF#

107

WL_OFF#

108

ACIN_D

110

EC_ON

112

ON/OFFBTN#

114

LID_SW#

115

SUSP#

116
117
118

+EC_V18R

124

20mil

12

+3VL

C682 100P_0402_50V8JC682 100P_0402_50V8J

12

1 2

R988 0 _0402_5%R988 0_04 02_5%

C391

C391

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

SM_SENSE# <21>
EC_BEEP <21>
EC_PWM_FAN <26>
ACOFF <31>

ECAGND

BATT_TEMPA <30>

ADP_I <31>

ADP_V <31 >

USB_OC#0_1_EC <19>

USB_CHG_EN# <19>

IREF <31>
CHGVADJ <31>

EC_MUTE# <21>
USB_EN# <19>

EC_THERM# <13>

TP_CLK <27>

TP_DATA <27>

VGATE <9,13,28,34, 35>
WOL_EN# <23>
GPS_OFF# <18>

EC_SI_SPI_SO <26>

EC_SO_SPI_SI <26>

EC_SPICLK < 26>

SPI_CS# <26>

ENBKL < 7>

USB_OC#4_EC <19>
FSTCHG <31>

BATT_FULL_LED# <27>

CAPS_LED# <26>

BATT_CHG_LOW_LED# <27>

PWR_ON_LED# <27>

SYSON <28 ,33>
VR_ON <35>
PM_SLP_S4# < 13>

EC_RSMRST# <13>
EC_LID_OUT# <13>

EC_SWI# <13,18,23>
EC_PWROK <13>

BKOFF#_L <17>
PBTN_OUT# <13>

UWB_OFF# <18>

WL_OFF# <18 >

EC_ON <27>
ON/OFFBTN# <27>
LID_SW# <27>
SUSP# < 28,34>

R329

@R329

@

+3VALW

+5VS

1 2

0_0402_5%

0_0402_5%

R330

R330

1 2

+3VL

0_0402_5%

0_0402_5%

+3V_EC

1 2

R307330K_0402_5% R307330K_04 02_5%

ACIN_D

Add D21 for AC- IN leakage iss ue

USB_OC#0_1_EC

USB_OC#4_EC

1 2

R595 4.7K_0402_5%R595 4.7K_0402_5%

1 2

R597 4.7K_0402_5%R597 4.7K_0402_5%

R5

R5

10K_0402_5%

10K_0402_5%

R6

R6

10K_0402_5%

10K_0402_5%

2 1

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

12

12

TP_CLK

TP_DATA

D21

D21

+3VALW

R243

R243

1 2

47K_0402_5%

47K_0402_5%

Place closely pin 109

LID_SW#

1

C525

@ C52 5

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

ACIN <13,31>

KSO1

KSO2

R312 47K_0402_5%@R312 47K_0402 _5%@

R313 47K_0402_5%@R313 47K_0402 _5%@

1 2

1 2

+3V_EC

2011.08.29 Un-stuff R312,R313, KB930 dosen't need pull high

Security Classif ication

Security Classif ication

Security Classif ication

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY P ROPERTY OF COMP AL ELECTRONICS , INC. AND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY P ROPERTY OF COMP AL ELECTRONICS , INC. AND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY P ROPERTY OF COMP AL ELECTRONICS , INC. AND CONTAI NS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

KB926 D3

KB926 D3

KB926 D3

QBU00

QBU00

QBU00

25 3 8Wednesday, November 02, 2011

25 3 8Wednesday, November 02, 2011

25 3 8Wednesday, November 02, 2011

0.3

0.3

0.3

SPI ROM on PCH => 2M Byte

+3VS +3VS

R334

R334

R336

R336

1 2

1 2

PCH_SO_ SPI_SI< 13>

SPI_WP #

3.3K_040 2_5%

3.3K_040 2_5%

SPI_HOLD#

3.3K_040 2_5%

3.3K_040 2_5%

PCH_SPI_C S#<13 >

PCH_SPICL K<13 >

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

PCH_SPI_C S#

PCH_SPICL K

PCH_SO_ SPI_SI

C320

C320

SPI_WP #

SPI_HOLD#

R337

R337

1 2

15_0402 _5%

15_0402 _5%

1

2

U22

U22

16M W25 Q16CVSS IG SOIC 8P

16M W25 Q16CVSS IG SOIC 8P

U22

CONN@U22

CONN@

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

WIESON G6179 8P SPI

WIESON G6179 8P SPI

VSS

4

2

Q

2011/04/15 Add BIOS ROM for non-share

PCH_SPICL K

R615

R615

47_0402 _5%

47_0402 _5%

@R 335

@

1 2

PCH_SI_SP I_SOSPI_SO_L

R335

10_0402 _5%

10_0402 _5%

C321

@C 321

@

1 2

6P_0402 _50V

6P_0402 _50V

PCH_SI_SP I_SO <13>

SPI Flash (1Mb*1)

+3V_EC

1

RF@

RF@

C221

C221

68P_040 2_50V8J

68P_040 2_50V8J

2

0_0402_ 5%

0_0402_ 5%

WP_ R<25>

R321

R321

330P_04 02_50V7K

330P_04 02_50V7K

12

SPI_CS#<25>

EC_SI_SPI_SO<25>

C501

C501

2011.06.07 Change U36 Footprint

SPI_CS#_R

R741

R741

1 2

33_0402 _5%

33_0402 _5%

EC_SI_SPI_SO _R

R338

R338

1 2

0_0402_ 5%

0_0402_ 5%

1

2

U36

U36

1

CS#

2
3
4

VCC

SO

HOLD#

WP#

SCLK

GND

MX25L10 05AMC-12G_SO8

MX25L10 05AMC-12G_SO8

SI

1 2

C508 12P _0402_50V8J

C508 12P _0402_50V8J

RF@

RF@

8
7
6
5

470P_04 02_50V8J

470P_04 02_50V8J

EC_SPICLK _R
EC_SO_S PI_SI_R

R412

R412

1 2

33_0402 _5%

33_0402 _5%

RF@

RF@

330P_04 02_50V7K

330P_04 02_50V7K

1

1

C503

C503

C502

C502

2

2

R740 33_ 0402_5%R740 33_0402_ 5%

1 2

R739 33_ 0402_5%R739 33_0402_ 5%

1 2

EC_SPICLK

+3V_EC

1

C411

C411

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

EC_SPICLK <25>
EC_SO_S PI_SI <25>

FAN Control Circuit

KSI0

KSI1

KSI2

KSI3

KSI4

KSI5

KSI6

KSI7

KSO0

KSO1

KSO2

KSO3

KSO4

KSO5

KSO6

KSO7

KSO8

KSO9

KSO10

KSO11

KSO12

KSO13

KSO14

KSO15

CAPS_LE D#

R332

R332
10K_040 2_5%

10K_040 2_5%

EC_PW M_FAN_R

+3VS

12

R887

R887
10K_040 2_5%

10K_040 2_5%

+5VS

1

RF@

RF@

C223

C223

68P_040 2_50V8J

68P_040 2_50V8J

2

JFAN

JFAN

1

1

2

2

3

3

4

4

5

GND1

6

GND2

ACES_88 231-04001

ACES_88 231-04001

CONN@

CONN@

KEYBOARD
CONN.

KSI[0..7]

KSO[0..15]

JKB

JKB

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

ACES_88 170-3400CONN@

ACES_88 170-3400CONN@

KSI[0..7] <25>

KSO[0..15] <25>

R382 300_040 2_5%R382 300_ 0402_5%

1 2

KSI1
KSI6
KSI5
KSI0
KSI4
KSI3
KSI2
KSI7
KSO15
KSO12
KSO11
KSO10
KSO9
KSO8
KSO13
KSO7
KSO6
KSO14
KSO5
KSO3
KSO4
KSO0
KSO1
KSO2

CAPS_LE D# <25 >

+3VS

+5VS

1

RF@

RF@

C222

C222

68P_040 2_50V8J

68P_040 2_50V8J

2

R600

FAN_SPE ED1< 25>

EC_PW M_FAN<25>

R600

1 2

10_0603 _5%

10_0603 _5%

1

C218

C218
68P_040 2_50V8J

68P_040 2_50V8J

2

12

C414 1 00P_0402_50V 8JC414 1 00P_0402_50V 8J

1 2

C419 1 00P_0402_50V 8JC419 1 00P_0402_50V 8J

1 2

C416 1 00P_0402_50V 8JC416 1 00P_0402_50V 8J

1 2

C418 1 00P_0402_50V 8JC418 1 00P_0402_50V 8J

1 2

C422 1 00P_0402_50V 8JC422 1 00P_0402_50V 8J

1 2

C424 1 00P_0402_50V 8JC424 1 00P_0402_50V 8J

1 2

C426 1 00P_0402_50V 8JC426 1 00P_0402_50V 8J

1 2

C428 1 00P_0402_50V 8JC428 1 00P_0402_50V 8J

1 2

C430 1 00P_0402_50V 8JC430 1 00P_0402_50V 8J

1 2

C432 1 00P_0402_50V 8JC432 1 00P_0402_50V 8J

1 2

C434 1 00P_0402_50V 8JC434 1 00P_0402_50V 8J

1 2

C436 1 00P_0402_50V 8JC436 1 00P_0402_50V 8J

1 2

C415 1 00P_0402_50V 8JC415 1 00P_0402_50V 8J

1 2

C420 1 00P_0402_50V 8JC420 1 00P_0402_50V 8J

1 2

C417 1 00P_0402_50V 8JC417 1 00P_0402_50V 8J

1 2

C421 1 00P_0402_50V 8JC421 1 00P_0402_50V 8J

1 2

C423 1 00P_0402_50V 8JC423 1 00P_0402_50V 8J

1 2

C425 1 00P_0402_50V 8JC425 1 00P_0402_50V 8J

1 2

C427 1 00P_0402_50V 8JC427 1 00P_0402_50V 8J

1 2

C429 1 00P_0402_50V 8JC429 1 00P_0402_50V 8J

1 2

C431 1 00P_0402_50V 8JC431 1 00P_0402_50V 8J

1 2

C433 1 00P_0402_50V 8JC433 1 00P_0402_50V 8J

1 2

C435 1 00P_0402_50V 8JC435 1 00P_0402_50V 8J

1 2

C437 1 00P_0402_50V 8JC437 1 00P_0402_50V 8J

1 2

C461 1 00P_0402_50V 8JC461 1 00P_0402_50V 8J

1 2

Security Class ification

Security Class ification

Security Class ification

2010/06/ 27 2 011/6/27

2010/06/ 27 2 011/6/27

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/ 27 2 011/6/27

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

SPI ROM//KB//FAN/Debug Poart

SPI ROM//KB//FAN/Debug Poart

SPI ROM//KB//FAN/Debug Poart

QBU00

QBU00

QBU00

Wednesday, November 02, 2011

Wednesday, November 02, 2011

Wednesday, November 02, 2011

26 38

26 38

26 38

0.3

0.3

0.3

A

Power Button Touch/B Connector

ON/OFFBTN#_R

1 1

ON/OFFBTN#_R

2 2

R415 FBMA-10-100505-151TR415 FBMA-10-100505-151T

2
@

@

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

3

C538

C538

PJSOT24C_SOT23-3

PJSOT24C_SOT23-3

EC_ON<25>

1 2

2

D27

D27

@

@

1

1

D24

D24

2

3

BAV70W_SOT323-3

BAV70W_SOT323-3

R327

R327

10K_0402_5%

10K_0402_5%

1

C505

C505

@

@

2

180P_0402_50V8J

180P_0402_50V8J

+3V_EC

R324

R324

100K_0402_5%

100K_0402_5%

1 2

2

G

G

1 2

13

D

D

Q15

Q15

2N7002_SOT23

2N7002_SOT23

S

S

B

ON/OFFBTN# <25>

51_ON# <29>

JOINT_F1017WR-S-04P

JOINT_F1017WR-S-04P

1
2
3
4

5
6

JPOWER

JPOWER

1
2
3
4

GND
GND

CONN@

CONN@

C

+5VS

12

R325

R325
0_0603_5%

0_0603_5%

2

1

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C405

C405

1/22 DVT:JTOUCH pin define re versal

LID_SW#<25>

TP_DATA<25>
TP_CLK<25>

PJDLC05_SOT23-3

PJDLC05_SOT23-3

R223

R223

1 2

D26

D26

D

3

1

0_0402_5%

0_0402_5%

2

R333

@R333

@

0_0402_5%

0_0402_5%

1 2

+3VALW

JTOUCH

JTOUCH

1

1

2

2

3

3

4

4

5

5

6

6

E-T_7182K-F06N-00R

E-T_7182K-F06N-00R

CONN@

CONN@

C406

C406

1U_0402_6.3V4Z

1U_0402_6.3V4Z

R331

R331

0_0402_5%

0_0402_5%

1 2

+3VL

E

8

G2

7

G1

2011.06.14 Add C406 for ESD issue

12

C407

C407

12

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2011.08.29 Add C407 for ESD issue

LED Conn

JLED

JLED

+5VS

+5VALW

BATT_CHG_LOW_LED#<25>

BATT_FULL_LED#<25>

PWR_SUSP_LED#<25>

PWR_ON_LED#<25>

LED_WIMAX#<18,25>

3 3

SATALED#_R

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

D50

D50

2 1

D51

D51

2 1

SATALED#_R

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

GND

12

GND

P-TWO_161021-10021

P-TWO_161021-10021

CONN@

CONN@

CR_LED# <24>

SATALED# <11>

ISPD

CRT@ PCB1

CRT@

PCB

HDMI@ PC B2

HDMI@

PCB

PCB1

PCB LA-6858P_CRT

PCB LA-6858P_CRT

PCB2

PCB LA-6859P_HDMI

PCB LA-6859P_HDMI

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/27 2011/6/27

2010/06/27 2011/6/27

2010/06/27 2011/6/27

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

ON/OFF /TP Conn/LEDS

ON/OFF /TP Conn/LEDS

ON/OFF /TP Conn/LEDS

QBU00

QBU00

QBU00

27 38Friday, November 04, 2011

27 38Friday, November 04, 2011

27 38Friday, November 04, 2011

E

0.3

0.3

0.3

A

B

C

D

E

+5VALW TO +5VS+3VALW TO +3VS

+3VALW

SI7326DN-T 1-E3_PAK1212-8

SI7326DN-T 1-E3_PAK1212-8

Q18

Q18

1 1

@

@

1

C529

C529

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C446

C446

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

1
2
35

4

4/2 MP:For EMI ESD solution

+3VS

Vgs=-0V,Id=9A,Rds=18.5mohm

1

C439

C439

1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

2

1

C447

C447

12

Q6A

Q6A

R348

2

0.022U_0402_16V7K

0.022U_0402_16V7K

R348

330K_04 02_5%

330K_04 02_5%

1

C440

C440

4.7U_080 5_10V4Z

4.7U_080 5_10V4Z

2

R344

R344

1 2

47K_040 2_5%

47K_040 2_5%

61

SUSP

2

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6
2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

+VSB

R342

R342

5

470_0805_5%

470_0805_5%

1 2
3

Q6B

Q6B

4

+5VALW

SI7326DN-T 1-E3_PAK1212-8

SI7326DN-T 1-E3_PAK1212-8

Q19

Q19

1

C448

C448

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

+5VS

1
2
35

4

0.01U_0402_25V7K

0.01U_0402_25V7K

1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

2

1

12

C449

C449

R349

R349
200K_04 02_5%

200K_04 02_5%

2

@

@

1

C441

C441

1

C442

C442

4.7U_080 5_10V4Z

4.7U_080 5_10V4Z

2

R346

R346

1 2

47K_040 2_5%

47K_040 2_5%

61

Q7A

Q7A

SUSP

2

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6
2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

+VSB

R343

R343

5

470_0805_5%

470_0805_5%

1 2
3

Q7B

Q7B

4

+3VS TO +3VS_PRIME

2 2

+VSB

+3VS +3VS_PR IME

1

C1121

C1121
10U_080 5_10V6K

10U_080 5_10V6K

2

R186

R186

1 2

47K_040 2_1%

47K_040 2_1%

VGATE#

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

+5VALW

5

@

@

R977 0_0805 _5%

R977 0_0805 _5%

1 2

SI7326DN-T 1-E3_PAK1212-8

SI7326DN-T 1-E3_PAK1212-8

Q20

3

4

Q20

Q45B

Q45B

1
2
35

4

1

C1124

C1124

0.1U_040 2_25V7K~D

0.1U_040 2_25V7K~D

2

C1122

C1122

VGATE#

+5VALW

R978

R978
100K_04 02_5%

100K_04 02_5%

1 2

61

Q45A

Q45A

2

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

+5VALW

R362

R362
100K_04 02_5%

1U_0402_6.3V4Z

C1123

C1123

1U_0402_6.3V4Z

1

2

R979

R979
470_060 3_5%

470_060 3_5%

@

@

1 2
13

D

D

S

S

SUSP

2

G

G

Q44

Q44
2N7002_ SOT23-3

2N7002_ SOT23-3

@

@

SYSON<2 5,33>

SYSON#

SYSON

R402

R402

10K_040 2_5%

10K_040 2_5%

1 2

SYSON#< 6>

10U_0805_10V6K

10U_0805_10V6K

1

2

100K_04 02_5%

1 2

3

Q28B

Q28B

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

5

4

VGATE<9,13 ,25,34,35>

+1.5V TO +1.5VS

R361

R361
470_060 3_5%

3 3

R401

R401

10K_040 2_5%

10K_040 2_5%

SUSP

SUSP<33>

SUSP#<25,3 4>

470_060 3_5%

1 2

61

Q28A

Q28A

2

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

1 2

2011.06.14 Add C1128 for ESD issue

@

@

R366

Q25A

@Q2 5A

@

R366
470_060 3_5%

470_060 3_5%

1 2
61

SUSP SYSON#

2

A

1

C1128

4 4

0.1U_040 2_25V7K~D

0.1U_040 2_25V7K~D

C1128

2

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

+GFX_CO RE

R603

@ R 603

@

470_060 3_5%

470_060 3_5%

1 2

61

Q31A

@Q3 1A

@

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

2N7002_ SOT23

2N7002_ SOT23

2

+1.5V+0.75V S

D

D

Q26

@

Q26

@

S

S

SUSP

@

@

R367

R367
470_060 3_5%

470_060 3_5%

1 2

13

2

G

G

+1.5VS

R363

@R36 3

@

470_060 3_5%

470_060 3_5%

1 2

3

Q25B

@Q 25B

@

SUSP

5

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

4

+1.05VS

1

@

@

C533

C533

1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

2

Q24

@

Q24

@

2N7002_ SOT23

2N7002_ SOT23

B

R365
470_060 3_5%

470_060 3_5%

1 2

13

D

D

S

S

+1.8VS

R604

@R60 4

@

470_060 3_5%

470_060 3_5%

1 2

3

Q31B

@Q 31B

@

SUSP

5

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

4

@R36 5

@

1

@

@

C532

C532

1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

2

Security Class ification

Security Class ification

SUSP

2

G

G

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.5V

SI7326DN-T 1-E3_PAK1212-8

SI7326DN-T 1-E3_PAK1212-8

Q33

Q33

1

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4

C1061

C1061

12

200K_0402_5%

200K_0402_5%

2009/04/ 07 2012/10/ 21

2009/04/ 07 2012/10/ 21

2009/04/ 07 2012/10/ 21

C

+1.5VS

1
2
35

1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

R606

R606

1

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

1

C1059

C1059

2

C1062

C1062

0.01U_04 02_25V7K

0.01U_04 02_25V7K

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

Deciphered Date

Deciphered Date

Deciphered Date

2

C1060

C1060
10U_080 5_10V4Z

10U_080 5_10V4Z

1

Q35B

Q35B

R605

R605

1 2

47K_040 2_5%

47K_040 2_5%

+3VALW

R607

R607

10K_040 2_5%

3

4

D

10K_040 2_5%

1 2

5

Q35A

Q35A

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

+VSB

61

SUSP#

2

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

QBU00

QBU00

QBU00

DC INTERFACE

DC INTERFACE

DC INTERFACE

E

0.3

0.3

0.3

28 38Wed nesday, November 02, 2011

28 38Wed nesday, November 02, 2011

28 38Wed nesday, November 02, 2011

A

B

C

D

PL1

PL1

SMB3025500YA_2P

PF1

DC301001M80

PJP1

PJP1

1

1 1

+

2

-

SINGA_2DW -0005-B03@

SINGA_2DW -0005-B03@

DC_IN_S1

PF1

21

5A_32V_S1206-H-5.0A

5A_32V_S1206-H-5.0A

DC_IN_S2

12

PC1

PC1

1000P_0402_50V7K

1000P_0402_50V7K

SMB3025500YA_2P

1 2

12

PC2

PC2

100P_0402_50V8J

100P_0402_50V8J

12

PC3

PC3

1000P_0402_50V7K

1000P_0402_50V7K

VIN

12

PC4

PC4

100P_0402_50V8J

100P_0402_50V8J

VIN

PD3

PD3

RLS4148_LL34-2

RLS4148_LL34-2

1 2

12

12

PR8

PQ4

PQ4

BSS84_SOT23-3

PD4

PD4

RLS4148_LL34-2

RLS4148_LL34-2

100K_0402_1%

100K_0402_1%

1 2

22K_0402_1%

22K_0402_1%

112

PR11

PR11

12

12

PR10

PR10

12

PC6

PC6

0.22U_0603_25V7K

0.22U_0603_25V7K

+3VALW +1.5V+1.5VP

2 2

BATT+

51_ON#<27>

PJ332

PJ332

+3VALWP

2

JUMP_43X118@

(6.11A,250mils ,Via NO.= 12) (4.65A,200mils ,Via NO.= 10)

JUMP_43X118@

BSS84_SOT23-3

N1

2

68_1206_5%

68_1206_5%

13

PJ152

PJ152

2

JUMP_43X118@

JUMP_43X118@

PR8

12

PC5

PC5

0.1U_0603_25V7K

0.1U_0603_25V7K

112

PR9

PR9
68_1206_5%

68_1206_5%

VS

PJ402

PJ352

PJ352

3 3

+5VALWP

+VSBP

2

112

JUMP_43X118@

(5.3A,220mils ,Via NO.= 11)

JUMP_43X118@

PJ5

PJ5

2

112

JUMP_43X39@

JUMP_43X39@

+5VALW +1.05VSP +1.05VS

(1.8A,80mils ,Via NO.=4)

+VSB

+1.8VSP +1.8VS

(120mA,40mils ,Via NO.= 1)

PJ75

PJ75

+0.75VSP +0.75VS

4 4

2

112

JUMP_43X79@

(0.5A,40mils ,Via NO.= 1)

(100mA,40mils ,Via NO.= 2)

JUMP_43X79@

PJ331

PJ331

2

112

JUMP_43X39@

JUMP_43X39@

A

+3VL+3VLP

PJ402

2

112

JUMP_43X118@

JUMP_43X118@

PJ182

PJ182

2

112

JUMP_43X118@

JUMP_43X118@

(0.15A,40mils ,Via NO.= 1)

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

2010/06/122009/06/12

2010/06/122009/06/12

2010/06/122009/06/12

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DCIN & DETECTOR

DCIN & DETECTOR

DCIN & DETECTOR

Cedar trail

D

29 38W ednesday, November 02, 2011

29 38W ednesday, November 02, 2011

29 38W ednesday, November 02, 2011

0.3

0.3

0.3

A

B

C

D

1 1

PF2

12

PR14

PR14
1K_0402_1%

1K_0402_1%

PD6

PD6

PJSOT24C_SOT23-3

PJSOT24C_SOT23-3

1

22K_0402_1%

22K_0402_1%

13

D

D

PQ6

PQ6

2

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

G

G

S

S

PF2

21

7A_32V_TR/3216FF7-R

7A_32V_TR/3216FF7-R

PR16

PR16

6.49K_0402_1%

6.49K_0402_1%

12

PR24

PR24

1 2

12

12

PC10

PC10

PR23

PR23

@

@

100K_0402_1%

100K_0402_1%

0.22U_0603_25V7K

0.22U_0603_25V7K

PJP2

PJP2

10
11

SUYIN_200045MR009G171ZR

SUYIN_200045MR009G171ZR

@

@

2 2

3 3

GND
GND

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

PJSOT24C_SOT23-3

PJSOT24C_SOT23-3

100_0402_1%

100_0402_1%

EC_SMCA

PR20

PR20

BATT_P4
BATT_P5

EC_SMDA

PD5

PD5

1 2

3

1

2

PR21

PR21
100_0402_1%

100_0402_1%

1 2

BATT_S1

2

3

12

PR19

PR19

1K_0402_1%

1K_0402_1%

B+

VL

PR25

PR25

100K_0402_1%

100K_0402_1%

POK<13 ,32>

1 2

PR26

PR26

1 2

0_0402_5%

0_0402_5%

PC12

@ PC12

@

.1U_0402_16V7K

.1U_0402_16V7K

12

VMB

+3VL

BATT_TEMPA <25>

EC_SMB_DA1 <25>

EC_SMB_CK1 <25>

PQ5

PQ5

BSS84_SOT23-3

BSS84_SOT23-3

2

12

PC7

PC7

1000P_0402_50V7K

1000P_0402_50V7K

13

PL2

PL2

SMB3025500YA_2P

SMB3025500YA_2P

1 2

12

PC11

@PC11

@

0.1U_0603_25V7K

0.1U_0603_25V7K

+VSBP

12

PC8

PC8

0.01U_0402_25V7K

0.01U_0402_25V7K

PH1 under CPU botten side :

CPU thermal protection at 95 degree C

BATT+

Recovery at 56 degree C

VL

12

PC9

PC9

0.1U_0402_25V6

0.1U_0402_25V6

PU1

PU1

1

VCC

2

GND

3

OT1

4

VS_ON<32>

OT2

G718TM1U_SOT23-8

G718TM1U_SOT23-8

TMSNS1

RHYST1

TMSNS2

RHYST2

8

7

6

5

12

PR15

PR15

19.6K_0402_1%

19.6K_0402_1%

PR18

PR18

8.66K_0402_1%

8.66K_0402_1%

1 2

12

PH1

PH1

100K_0402_1%_NCP15W F104F03RC

100K_0402_1%_NCP15W F104F03RC

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

2009/04/282009/11/13

2009/04/282009/11/13

2009/04/282009/11/13

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

BATTERY CONN / OTP

BATTERY CONN / OTP

BATTERY CONN / OTP

Cedar trail

D

30 38W ednesday, November 02, 2011

30 38W ednesday, November 02, 2011

30 38W ednesday, November 02, 2011

0.3

0.3

0.3

A

PD203

PD203

VIN

1 1

12

PR210

PR210
200K_0402_1%

200K_0402_1%

47K

47K

2

47K

47K

13

BATT_ON

2 2

2

61

D

D

2

G

G

PQ212A

PQ212A

S

S

DMN66D0LDW -7_SOT363-6

DMN66D0LDW -7_SOT363-6

ACOFF<25>

PQ211

PQ211
DTC115EUA_SC70-3

DTC115EUA_SC70-3

47K_0402_1%

47K_0402_1%

PACIN

1 2

DTC115EUA_SC70-3

DTC115EUA_SC70-3

ACOFF

PR211

PR211

PQ213

PQ213

12

B340A_SMA2

B340A_SMA2

PQ210

PQ210

PDTA144EU_SOT323-3

PDTA144EU_SOT323-3

1 3

DMN66D0LDW -7_SOT363-6

DMN66D0LDW -7_SOT363-6

2

P2 P3

12

12

PC210

PC210

0.1U_0603_25V7K

0.1U_0603_25V7K

12

PQ212B

PQ212B

34

D

D

5

G

G

S

S

13

PQ204

PQ204

AO4407A_SO8

AO4407A_SO8

1
2
3 6

4

PR212

PR212
200K_0402_1%

200K_0402_1%

PR213

PR213
150K_0402_1%

150K_0402_1%

ADP_I<25>

IREF<25>

FSTCHG<25>

309K_0402_1%

309K_0402_1%

100K_0402_1%

100K_0402_1%

8
7

5

PC211

PC211
5600P_0402_25V7K

5600P_0402_25V7K

1 2

PC214

PC214

1 2

0.01U_0402_25V7K

0.01U_0402_25V7K

PR220

PR220

12

12

PR221

PR221

PR216

PR216

10K_0402_1%

10K_0402_1%

100K_0402_1%

100K_0402_1%

PR218

PR218

1 2

10K_0402_1%

10K_0402_1%

PC215

PC215

1 2

.1U_0402_16V7K

.1U_0402_16V7K

6251VREF 6251aclim

12

PC216

PC216

0.01U_0402_25V7K

0.01U_0402_25V7K

PR215

PR215

0.05_1206_1%

0.05_1206_1%

1

2

ACSETIN

12

PR217

PR217

PC213

PC213

1 2

6800P_0402_25V7K

6800P_0402_25V7K

PR222

PR222

1 2

24.9K_0402_1%

24.9K_0402_1%

20K_0402_1%

20K_0402_1%

B

12

12

12

12

B+

4

PC225

PC225

3

0.1U_0402_25V6

0.1U_0402_25V6

PC209

PC209

10U_1206_25V6M

10U_1206_25V6M

PC226

PC226

2200P_0402_50V7K

2200P_0402_50V7K

12

PC227

PC227

10U_1206_25V6M

10U_1206_25V6M

47P_0402_50V8J

47P_0402_50V8J

PC228

PC228

PL201

PL201

1.2UH_1231AS-H-1R2 N=P3_2.9A_30%

1.2UH_1231AS-H-1R2 N=P3_2.9A_30%

12

VIN

12

PR226

PR226

191K_0402_1%

12

12

PC217

PC217

1000P_0402_25V8J

1000P_0402_25V8J

PC218

PC218

12

ACPRN

PR229 20_0402_5%PR229 20_0402_5%

PC219

PC219

0.047U_0402_16V7K

0.047U_0402_16V7K

1 2

1 2

PR230

PR230

PR232 2_0402_5%PR232 2_0402_5%

PR205

PR205

1 2

0_0603_5%

0_0603_5%

PC221

PC221

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

1 2

191K_0402_1%

ACSETIN

PR228

PR228

14.3K_0402_1%

14.3K_0402_1%

1 2

20_0402_5%

20_0402_5%

12

1 2

BST_CHGA

12

PR233 4.7_0603_5%PR233 4.7_0603_5%

6251VDD

RB751V-40_SOD323-2

RB751V-40_SOD323-2

12

PC212

PC212

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

PU200

PU200

12

PR219

PR219

1 2

47K_0402_1%

47K_0402_1%

PR223

PR223

12

1

VDD

2

ACSET

6251_EN CSON

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

ICM

6251VREF

8

VREF

9

CHLIM

10

ACLIM

11

VADJ

12

GND

PD201

PD201

1 2
12

PR227

PR227

10_1206_5%

10_1206_5%

DCIN

24

DCIN

ACPRN

CSON

CSOP

CSIN

CSIP

PHASE

UGATE

BOOT

VDDP

LGATE

PGND

ISL6251AHAZ-T_QSOP24

ISL6251AHAZ-T_QSOP24

23

22

21

20

19

18

17

16

15

14

13

LX_CHG

DH_CHG

BST_CHG

6251VDDP

DL_CHG

0.1U_0603_25V7K

0.1U_0603_25V7K

1 2

PR231 20_0402_5%PR231 20_0402_5%

PC220

PC220

0.1U_0603_25V7K

0.1U_0603_25V7K

CSIN

CSIP

PC231

PC231

PC205

PC205

0.1U_0603_25V7K

0.1U_0603_25V7K

PD202

PD202
RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

6251VDD

CSOP

12

C

CHG_B+

AO4435_SO8

AO4435_SO8

1
2
3

12

12

12

12

12

PC208

PC208

0.1U_0402_25V6

0.1U_0402_25V6

PQ201

PQ201

3 5

3 5

12

PC222

PC222

47P_0402_50V8J

47P_0402_50V8J

2200P_0402_50V7K

2200P_0402_50V7K

PC224

PC224

DTC115EUA_SC70-3

DTC115EUA_SC70-3

AON7408L_DFN8-5

AON7408L_DFN8-5

10UH_MPL73-100_3A_20%

10UH_MPL73-100_3A_20%

241

12

PQ202

PQ202

12

241

AON7408L_DFN8-5

AON7408L_DFN8-5

PQ215

PQ215

PL202

PL202

1 2

PR206

PR206

4.7_1206_5%

4.7_1206_5%

PC206

PC206

680P_0603_50V7K

680P_0603_50V7K

PR237

PR237

10K_0402_1%

10K_0402_1%

1 2

13

100K_0402_1%

100K_0402_1%

BATT_ON

CHGCHG

2

PR238

PR238

1

2

0.02_1206_1%

0.02_1206_1%

PC232

PC232

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

PC233

PC233

PC207

PC207

10U_1206_25V6M

10U_1206_25V6M

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

PR235

PR235

PQ207

PQ207

4

D

8
7
6
5

PR236

PR236

1 2

47K_0402_1%

47K_0402_1%

4

3

PC202

PC202

VIN

BATT+

12

12

PC203

PC203

10U_1206_25V6M

10U_1206_25V6M

10U_1206_25V6M

10U_1206_25V6M

12

12

PC204

PC204

PC229

PC229

0.1U_0402_25V6

0.1U_0402_25V6
2200P_0402_50V7K

2200P_0402_50V7K

CP mode

3 3

Iada=0~1.579A(30W)4VCP= 92%*Iada; CP=1.45A

CHGVADJ<25>

Vaclim=1.08132V(30W) PR70=53.6k PR216=0.05

CC=0.25A~2A

IREF=1.636*Icharge

IREF=0.409V~3.272V

VCHLIM need over 95mV

Ki
Vchlim=Iref*(PR 221/(PR220+PR2 21))
=Iref*(100K/(30 9K+100K))
=Iref*0.2444
Ichanrge=(165mV/PR235)*(Vchlim/3.3V)
=(165m/20m)*(1/ 3.3V)*Iref*0.5 537
=0.611*Iref
Iref=1.636*Icha nrge =>Ki=1.63 6

Kv

4 4

Rinternal ic=514K Rec=3K R1=PR224=15.4K R2=PR225=31.6K
R=514K//31.6K// (15.4K+3k)=11. 372K
r=514K//514K//3 1.6K=28.14K
Vcell=0.175*Vad j+3.99v

4.2V=0.175*Vadj +3.99V =>Vadj= 1.2V
Vadj=Vref*(R/(R +514K))+CALIBR ATE*(r/(r=514K) )

1.1483=CALIBRAT E*0.6046 =>CAL IBRATE=1.899

1.899=(4.2-(Vce ll+A*0.175))*K v=(4.2-(4.2+A*0 .175))*Kv
A=Vref*(R/(R+51 4K))=0.052
Kv=9.455

CHGVADJ=(Vcell-4)*9.455

Vcell

4.2V

-

4.35V

A

CHGVADJ

0V

1.898V

3.309V

PR224

PR224

1 2

15.4K_0402_1%

15.4K_0402_1%

ACPRN

B

PR225

PR225

31.6K_0402_1%

31.6K_0402_1%

1 2

PR240

PR240

47K_0402_1%

47K_0402_1%

6251VDD

PR241

12

12

PR242

PR242

10K_0402_1%

10K_0402_1%

13

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR241

10K_0402_1%

10K_0402_1%

1 2

PQ214

PQ214
DTC115EUA_SC70-3

DTC115EUA_SC70-3

12

PR243

PR243

14.3K_0402_1%

14.3K_0402_1%

ACIN <13,25>

PACIN

Vin Detector

18.089V

High

17.44V

Low

Compal Secret Data

Compal Secret Data

2010/01/25 2009/04/28

2010/01/25 2009/04/28

2010/01/25 2009/04/28

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

PR246

PR246

309K_0402_1%

309K_0402_1%

PR248

PR248

47K_0402_1%

47K_0402_1%

VIN

12

PR247

PR247

10K_0402_1%

10K_0402_1%

1 2

12

12

PC223

PC223

.1U_0402_16V7K

.1U_0402_16V7K

Compal Electronics, Inc.

Title

Title

Title

CHARGER

CHARGER

CHARGER

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

ADP_V <25>

Cedar trail

D

0.3

0.3

31 38W ednesday, November 02, 2011

31 38W ednesday, November 02, 2011

31 38W ednesday, November 02, 2011

0.3

5

4

3

2

1

2VREF_6182

D D

UP6182_B+

PL331

PL331

HCB2012 KF-121T50_080 5

HCB2012 KF-121T50_080 5

B+

C C

B B

A A

1 2

47P_0402_50V8J

47P_0402_50V8J

PC375

PC375

+3VALWP

PC332

PC332

150U_B2 _6.3VM_R35M

150U_B2 _6.3VM_R35M

Ipeak=6.11A
Imax=4.277A
F=375KHz
Total Capacitor 150uF,
ESR 35mohm

VS

12

12

0.1U_0402_25V6

0.1U_0402_25V6

PC374

PC374

1 2

100K_04 02_1%

100K_04 02_1%

PR371

PR371

12

12

10U_1206_25V6M

10U_1206_25V6M

PC367 2200P_0402_50V7KPC367 2200P_0402_50V7K

PC360

PC360

4.7UH_FD VE0630-H-4R7M= P3_5.5A_20%

4.7UH_FD VE0630-H-4R7M= P3_5.5A_20%

1 2

1

12

+

+

PC369

2

PC369

0.1U_0402_25V6

0.1U_0402_25V6

DMN66D0 LDW-7_SOT3 63-6

DMN66D0 LDW-7_SOT3 63-6

VL

VS_ON<30>

PL332

PL332

PR336

PR336

4.7_1206 _5%

4.7_1206 _5%

PC336

PC336

680P_06 03_50V7K

680P_06 03_50V7K

100K_04 02_1%

100K_04 02_1%

PR372

PR372

PR370

PR370

12

12

12

PQ360A

PQ360A

42.2K_0402_1%

42.2K_0402_1%

AON7408L_DFN8-5

AON7408L_DFN8-5

123

D

D

S

S

12

12

PQ331

PQ331

3 5

241

61

@P C370

@

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

0.1U_060 3_25V7K

0.1U_060 3_25V7K

5

PQ332

PQ332

4

AON7702 L_DFN8-5

AON7702 L_DFN8-5

ENTRIP1 ENTRIP2

2

G

G

2

PC370

B+

5

G

G

13

PQ361

PQ361
DTC115E UA_SC70-3

DTC115E UA_SC70-3

12

PC361

PC361

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

PC335

PC335

1 2

499K_04 02_1%

499K_04 02_1%

1 2

1U_0402 _6.3V6K

1U_0402 _6.3V6K

34

D

D

PQ360B

PQ360B

DMN66D0 LDW-7_SOT3 63-6

DMN66D0 LDW-7_SOT3 63-6

S

S

+3VLP

PR360

PR360

PR335

PR335

1 2

0_0603_ 5%

0_0603_ 5%

PC362

PC362

12

BST_3V

UG_3V

LX_3V

LG_3V

1U_0402 _6.3V6K

1U_0402 _6.3V6K

PR362

PR362

13K_040 2_1%

13K_040 2_1%

1 2

PR363

PR363

20K_040 2_1%

20K_040 2_1%

1 2

PR337

PR337

120K_04 02_1%

120K_04 02_1%

1 2

PU330

PU330

25

P PAD

7

VO2

8

VREG3

9

BOOT2

10

UGATE2

11

PHASE2

12

LGATE2

12

PR361

PR361

100K_0402_5%

100K_0402_5%

2VREF_6182

12

PC363

PC363

ENTRIP2

5

6

FB2

ENTRIP2

SKIPSEL

EN

14

13

UP6182_B+

3

4

REF

TONSEL

VIN16GND

15

12

PR364

PR364

30K_040 2_1%

30K_040 2_1%

1 2

19.1K_04 02_1%

19.1K_04 02_1%

1 2

ENTRIP1

120K_04 02_1%

120K_04 02_1%

1 2

2

1

FB1

ENTRIP1

VO1

PGOOD

BOOT1

UGATE1

PHASE1

LGATE1

NC18VREG5

17

12

PC364

PC364

4.7U_060 3_6.3V6K

4.7U_060 3_6.3V6K

PC365

PC365

0.1U_060 3_25V7K

0.1U_060 3_25V7K

PR365

PR365

PR357

PR357

24

23

BST_5V

22

UG_5V

21

LX_5V

20

LG_5V

19

RT8205E GQW_W QFN24_4X4

RT8205E GQW_W QFN24_4X4

VL

PR355

PR355

1 2

0_0603_ 5%

0_0603_ 5%

12

PC372

PC372

0.1U_0402_25V6

0.1U_0402_25V6

POK < 13,30>

PC355

PC355

0.1U_060 3_25V7K

0.1U_060 3_25V7K

1 2

UP6182_B+

12

PC366

PC366

10U_1206_25V6M

10U_1206_25V6M

AON7702 L_DFN8-5

AON7702 L_DFN8-5

12

PC368

2200P_0402_50V7K

2200P_0402_50V7K

PQ352

PQ352

PC368

4

PQ351

PQ351

AON7408 L_DFN8-5

AON7408 L_DFN8-5

3 5

241

PL352

1 2

12

PR356

PR356

4.7_1206 _5%

4.7_1206 _5%

12

PC356

PC356

680P_06 03_50V7K

680P_06 03_50V7K

PL352

4.7UH_FD VE0630-H-4R7M= P3_5.5A_20%

4.7UH_FD VE0630-H-4R7M= P3_5.5A_20%

5

123

+5VALWP

12

PC373

PC373

2200P_0402_50V7K

2200P_0402_50V7K

Ipeak=5.3A
Imax=3.71A
F=300KHz
Total Capacitor 150uF,
ESR 35mohm

1

12

+

+

PC352

PC352

2

PC371

PC371

150U_B2_6.3VM_R35M

150U_B2_6.3VM_R35M

S CER CAP 0.1U 25V K X5R 0402

S CER CAP 0.1U 25V K X5R 0402

Security Class ification

Security Class ification

Security Class ification

2009/11/ 13 2009/04/ 28

2009/11/ 13 2009/04/ 28

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/11/ 13 2009/04/ 28

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Wednesday, November 02, 2011

Wednesday, November 02, 2011

Wednesday, November 02, 2011

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

+3VALWP/+5VALWP

+3VALWP/+5VALWP

+3VALWP/+5VALWP

Cedar trail

32 38

32 38

32 38

1

0.3

0.3

0.3

A

1 1

PR160

PR160

PC161

PC161

12

1 2

0_0402_5%

0_0402_5%

12

PC160

PC160

.1U_0402_16V7K

.1U_0402_16V7K

SM_PW ROK<6>

@

@

12

PR165

PR165
10K_0402_1%

10K_0402_1%

SYSON<25,28>

PR161

PR161

+5VALW

2 2

1 2

100_0603_5%

100_0603_5%

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

3

4

5

6

PU150

PU150

TON

VOUT

VDD

FB

PGOOD

B

1

14NC15

BOOT

UGATE

EN/DEM

PHASE

VFB=0.75V

VDDP

LGATE

GND7PGND

RT8209MGQW _WQFN14_3P5X3P5

RT8209MGQW _WQFN14_3P5X3P5

8

PR164

PR164

255K_0402_1%

255K_0402_1%

1 2

BST_1.5V

13

12

11

CS

10

9

PR155

PR155

1 2

0_0603_5%

0_0603_5%

DH_1.5V

LX_1.5V

PR157

PR157

1 2

7.87K_0402_1%

7.87K_0402_1%

DL_1.5V

BST_1.5V-1

PC155

PC155

1 2

0.1U_0603_25V7K

0.1U_0603_25V7K

+5VALW

PC162

PC162

4.7U_0805_10V6K

4.7U_0805_10V6K

1 2

AON7702L_DFN8-5

AON7702L_DFN8-5

C

4

1.5_B+

PQ151

PQ151

AON7408L_DFN8-5

AON7408L_DFN8-5

3 5

241

5

PQ152

PQ152

123

12

12

12

PC163

PC163

PC168

PC168

PC165

PC165

0.1U_0402_25V6

0.1U_0402_25V6

2200P_0402_50V7K

2200P_0402_50V7K

S COIL 2.2UH +-20 % PCMC063T-2R2MN 8A

S COIL 2.2UH +-20 % PCMC063T-2R2MN 8A

12

PR156

PR156

4.7_1206_5%

4.7_1206_5%

12

PC156

PC156

680P_0603_50V7K

680P_0603_50V7K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PL152

PL152

PC164

PC164

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

PL151

PL151

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1 2

12

D

B+

12

PC169

PC169

0.1U_0402_25V6

0.1U_0402_25V6

+1.5VP

Ipeak=4.65A

1

+

+

PC152

PC152

PC167

PC167

2

0.1U_0402_25V6

0.1U_0402_25V6

220U_B2_2.5VM_R25M

220U_B2_2.5VM_R25M

Imax=3.255A

12

12

F=313KHz
Total Capacitor 220uF,
ESR 25mohm

PC170 2200P_0402_50V7KPC170 2200P _0402_50V7K

PR162

+1.5VP

PR162

1 2

10K_0402_1%

10K_0402_1%

12

PR163

PR163
10K_0402_1%

10K_0402_1%

3 3

PR262

PR262

0_0402_5%

0_0402_5%

SUSP<28>

4 4

1 2

PC262

PC262

.1U_0402_16V7K

.1U_0402_16V7K

A

2

12

+1.5V

1

PJ76

PJ76

1

JUMP_43X79

JUMP_43X79

@

@

2

2

PC260

PC260

4.7U_0805_6.3V6K

4.7U_0805_6.3V6K

1 2

13

D

D

G

G

PQ261

PQ261

S

S

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

PR261

PR261

1K_0402_1%

1K_0402_1%

PR263

PR263

12

12

1K_0402_1%

1K_0402_1%

For shortage changed

12

PC263

PC263

.1U_0402_16V7K

.1U_0402_16V7K

PU75

PU75

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

G2992F1U_SO8

+0.75VSP

12

PC264

PC264
10U_0603_6.3V6M

10U_0603_6.3V6M

6

5

NC

7

NC

8

NC

9

TP

B

+3VALW

12

PC261

PC261

1U_0603_10V6K

1U_0603_10V6K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/25 2009/04/28

2010/01/25 2009/04/28

2010/01/25 2009/04/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Title

Title

Title

+1.5VP/+0.75VSP

+1.5VP/+0.75VSP

+1.5VP/+0.75VSP

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Cedar trail

D

33 38W ednesday, November 02, 2011

33 38W ednesday, November 02, 2011

33 38W ednesday, November 02, 2011

0.3

0.3

0.3

A

1 1

2 2

VGATE<9,13,25,2 8,35>

B

PJ181

PJ181

JUMP_43X39@

JUMP_43X39@

PC182

PC182

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PR184

PR184

0_0402_5%

0_0402_5%

1 2

+3VALW +5VALW

1

1

12

2

2

12

12

PC185

@ PC185

@

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

C

PC181

PC181

1U_0603_10V6K

1U_0603_10V6K

PU180

PU180

6

VCNTL

5

VIN

9

VIN

8

EN

7

POK

3

VOUT

4

VOUT

2

FB

GND

APL5930KAI-TRG_SO8

APL5930KAI-TRG_SO8

1

PR182

PR182

3K_0402_1%

3K_0402_1%

PR183

PR183

2.4K_0402_1%

2.4K_0402_1%

12

12

12

12

PC183

PC183

0.01U_0402_25V7K

0.01U_0402_25V7K

+1.8VSP

PC184

PC184

22U_0805_6.3V6M

22U_0805_6.3V6M

D

3 3

PJ400

@ P J400

@

SUSP#<25,28>

2

JUMP_43X39

JUMP_43X39

112

12

PC405

PC405
22U_0805_6.3V6M

22U_0805_6.3V6M

PR402

PR402

EN_1.05V

1 2

0_0402_5%

0_0402_5%

499K_0402_1%

499K_0402_1%

B

12

@

@

PR401

PR401

Pin 1 define same with Pin 2 & Pin 3 that just for SY8035 ,
SY8035 is for 5A loading , let LX shape can bigger!!

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+5VALW

4 4

A

10

9

8

5

12

PC401

@PC401

@

0.1U_0402_10V7K

0.1U_0402_10V7K

PU400

PU400

SY8033BDBC_DFN10_3X3

SY8033BDBC_DFN10_3X3

PVIN

PVIN

SVIN

EN

4

PG

TP

NC

7

11

LX_1.05V

2

LX

3

LX

6

FB

NC

FB=0.6Volt

1

2010/01/25 2009/04/28

2010/01/25 2009/04/28

2010/01/25 2009/04/28

1UH_PCMC063T-1R0M N_11A_20%

1UH_PCMC063T-1R0M N_11A_20%

1 2

12

PR403

PR403

4.7_1206_5%

4.7_1206_5%

12

PC406

PC406

680P_0603_50V7K

680P_0603_50V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

PL400

PL400

PR404

PR404

10K_0402_1%

10K_0402_1%

FB_1.05V

12

PC402

PC402

12

PR405

PR405

13.7K_0402_1%

13.7K_0402_1%

+1.05VSP

12

12

12

68P_0402_50V8J

68P_0402_50V8J

PC404

PC404

PC403

PC403

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

Compal Electronics, Inc.

Title

Title

Title

+1.8VSP/+1.05VSP

+1.8VSP/+1.05VSP

+1.8VSP/+1.05VSP

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Ipeak=1.8A
ILIM = 1.26A
F=1MHz
Total Capacitor330uF,9mohm

Cedar trail

D

34 38W ednesday, November 02, 2011

34 38W ednesday, November 02, 2011

34 38W ednesday, November 02, 2011

0.3

0.3

0.3

A

1 1

VCC

PR540

PR540

PR599

PR599

2 2

PR584 0_0 402_5%PR584 0_0402_5%

VCC

1 2

1 2

10K_0402_1%_ERTJ 0EG103FA@

10K_0402_1%_ERTJ 0EG103FA@

PR585 10K _0402_1%P R585 10K_0402_1%

VCC

1 2

1 2

10K_0402_1%_ERTJ 0EG103FA@

10K_0402_1%_ERTJ 0EG103FA@

3 3

4 4

A

PH501

PH501

PH500

PH500

B

12

12

12

12

PR521

PR521

PR520

PR520

249K_0402_1%

249K_0402_1%

51K_0402_1%

51K_0402_1%

240K_0402_1%

240K_0402_1%

12

12

PR517

PR517

PR598

PR598

33K_0402_1%

33K_0402_1%

2.2K_0402_1%

2.2K_0402_1%

5.1K_0402_1%

5.1K_0402_1%

1 2

+1.05VS

+3VS

+1.05VS

0.1U_0402_25V6

0.1U_0402_25V6

B

PR522

PR522

10K_0402_1%

10K_0402_1%

12

PR518

PR518

@

@

0_0402_5%

0_0402_5%

PR582

PR582

35.7K_0402_1%

35.7K_0402_1%

PR583

PR583

35.7K_0402_1%

35.7K_0402_1%

1 2

PC540

@PC 540

@

12

PR523

PR523

PR519

PR519

12

@

@

10K_0402_1%

10K_0402_1%

0_0402_5%

0_0402_5%

PC535

PC535

10K_0402_1%

10K_0402_1%

12

12

OCSET

12

PR580

PR580

PH503

PH503

SVID_ALERT#<7>

SVID_DATA<7>

SVID_CLK<7 >

12

PR586

PR586

1 2

10K_0402_1%

10K_0402_1%

10K_0402_1%_ERTJ0EG103FA

10K_0402_1%_ERTJ0EG103FA

12

PR589

PR589

1 2

560_0402_1%

560_0402_1%

0.1U_0402_25V6

0.1U_0402_25V6

OCSETA

12

PR581

PR581

10K_0402_1%

10K_0402_1%

PR576 75_0402_1%PR576 75_0402_1%

1 2

PR574 10K_0402_1%PR574 10K_0402_1%

1 2

PR575 10K_0402_1%@PR575 10K_0402_1%@

1 2

PR577 150_0402_1%PR577 150_0402_1%

1 2

PR578 130_0402_1%PR578 130_0402_1%

1 2

1 2

PR579 130_0402_1%PR579 130_0402_1%

VGATE<9,13,25 ,28,34>

C

PR528

@PR52 8

@

100_0402_5%

100_0402_5%

PR529

+5VALW

12

PR525

PR525

2.2_0402_1%

2.2_0402_1%

VCC

12

PC512

PC512

2.2U_0603_10V6K

2.2U_0603_10V6K

SETINIA

SETINI

TEMPMAX

ICCMAX

ICCMAXA

VCC

12

PR587

PR587

10K_0402_1%

10K_0402_1%

1 2

PH502

PH502

10K_0402_1%_ERTJ0EG103FA

10K_0402_1%_ERTJ0EG103FA

12

PR588

PR588

PC530

PC530

1 2

560_0402_1%

560_0402_1%

0.1U_0402_25V6

0.1U_0402_25V6

12

PR590

PR590

53.6K_0402_1%

53.6K_0402_1%

VR_HOT

VGATE
GFXPG
SVID_ALERT#
SVID_DATA
SVID_CLK

C

PR529

0_0402_5%

0_0402_5%

11

SETINI

12

TMPMAX

13

ICCMAX

14

ICCMAXA

15

TSEN

16

OCSET

17

TSENA

18

OCSETA

19

IBIAS

20

VRHOT

VR_HOT <7>

PR570

PR570

0_0402_5%

0_0402_5%

PR571

@PR57 1

@

10_0402_5%

10_0402_5%

+CPU_COR E

12

12

RNTC1N

10

SETINIA

VR_READY

21

RNTCAN

12

12

D

12

PR526

@PR526

@

100_0402_5%

100_0402_5%

12

PR527

PR527
0_0402_5%

0_0402_5%

12

PR530

PR530

0_0402_5%

0_0402_5%

PR535

PR535

12

9.1K_0402_1%

9.1K_0402_1%

RNTC1P

12

PR536

PR536

39K_0402_1%

39K_0402_1%

7

9

8

6

FB

VCC

RGND

GFXPS2

RT8165BGQW _WQFN40_5X 5

RT8165BGQW _WQFN40_5X 5

ALERT

VDIO

VCLK

VRA_READY

23

24

25

22

PR573

PR573

43K_0402_1%

43K_0402_1%

RNTCAP

PR567

PR567

0_0402_5%

0_0402_5%

12

PR568

PR568
0_0402_5%

0_0402_5%

12

PR569

@PR569

@

10_0402_5%

10_0402_5%

+GFX_CORE

D

VCCSENSE <8>VSSSEN SE<8>

PC511

PC511

12

100P_0402_50V8J

100P_0402_50V8J

PC502

PC502

12

33P_0402_50V8J

33P_0402_50V8J

4

5

3

COMP

ISEN1N

RGNDA

FBA

28

26

27

12

12

12

PR572

PR572

9.1K_0402_1%

9.1K_0402_1%

12

12

VCC_GFXSEN SE <8>VSS_GFXSENSE<8>

1

2

BOOT1

ISEN1P

TONSET

ISENAP

ISENAN

COMPA

30

29

PC565

PC565

27P_0402_50V8J

27P_0402_50V8J

PC514

PC514
100P_0402_50V8J

100P_0402_50V8J

UGATE1

PHASE1

LGATE1

PVCC

LGATEA

PHASEA

UGATEA

BOOTA

TONSETA

1 2

PU500

PU500

GND

EN

0.1U_0402_25V6

0.1U_0402_25V6

PR505

PR505

0_0603_5%

0_0603_5%

41

40

39

38

37

36

35

34

33

32

31

PC539

PC539

E

PC505

PC505

0.22U_0603_10V7K

0.22U_0603_10V7K

1 2

12

E

F

3 5

241

5

4

4

PQ504

PQ504

12

Deciphered Date

Deciphered Date

Deciphered Date

+CPU_B+

PQ501

PQ501
AON7408L_DFN 8-5

AON7408L_DFN 8-5

4.7_1206_5%

4.7_1206_5%

123

PQ503

PQ503
AON7408L_DFN 8-5

AON7408L_DFN 8-5

3 5

241

5

123

PR562 0_0402_5%@PR562 0_0402_5%@

12

PC549

PC549

10U_0805_25V6K

10U_0805_25V6K

12

PR506

PR506

12

PC506

PC506

680P_0603_50V7K

680P_0603_50V7K

PR516

PR516

4.7_1206_5%

4.7_1206_5%

PR561 0_0402_5%PR561 0_0402_5%

1 2

1 2

12

12

PR537

PR537
130K_0402_1%

130K_0402_1%

1 2

VCC

1 2

PR546

@PR546

@

12

10K_0402_1%

10K_0402_1%

PR539

PR539

10K_0402_1%

10K_0402_1%

12

PC513

PC513

PVCC

2.2U_0603_10V6K

2.2U_0603_10V6K

PR550 0_0402_5%PR550 0_0402_5%

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWIN G IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWIN G IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWIN G IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

PR547

PR547
0_0603_5%

0_0603_5%

1 2

PR515 0_0603_5%PR515 0_0603_5%

Issued Date

Issued Date

Issued Date

+5VALW

1 2

1 2

VR_ON <25>

PR552

PR552

130K_0402_1%

130K_0402_1%

PC545

PC545

0.1U_0402_25V6

0.1U_0402_25V6

PR538

PR538

4.7_0402_1%

4.7_0402_1%

1 2

12

PC566

PC566

0.1U_0402_25V6

0.1U_0402_25V6

PQ502

PQ502

AON7702L_DFN 8-5

AON7702L_DFN 8-5

12

PC544

PC544

0.1U_0402_25V6

0.1U_0402_25V6

PR553

PR553

2.2_0402_1%

2.2_0402_1%

1 2

12

PC515

PC515

0.22U_0603_10V7K

0.22U_0603_10V7K

1 2

AON7702L_DFN 8-5

AON7702L_DFN 8-5

PC541

PC541

0.1U_0402_25V6

0.1U_0402_25V6

Compal Secret Data

Compal Secret Data

2010/01/25 2009/04/28

2010/01/25 2009/04/28

2010/01/25 2009/04/28

Compal Secret Data

F

12

PC536

PC536

10U_0805_25V6K

10U_0805_25V6K

12

12

PC546

PC546

10U_0805_25V6K

10U_0805_25V6K

PC516

PC516
680P_0603_50V7K

680P_0603_50V7K

VCC

G

PL501

PL501

HCB2012KF-121T 50_0805

HCB2012KF-121T 50_0805

1 2

1

+

+

PC550

PC550

PC552

PC552

1 2

2

68U_25V_M

68U_25V_M

0.1U_0402_25V6

0.1U_0402_25V6

PL502

PL502

1UH_PCMC063 T-1R0MN_11A_20%

1UH_PCMC063 T-1R0MN_11A_20%

1 2

PH505

@PH505

@

10K_0402_1%_ERTJ 0EG103FA

10K_0402_1%_ERTJ 0EG103FA

RNTC1PRNTC1N

PR541

PR541

3.65K_0402_1%

3.65K_0402_1%

1 2

PR544 1.69K_0402_1 %PR54 4 1.69K_0402_1%

1 2

+CPU_B+

PC537

PC537

PC548

PC548

1 2

10U_0805_25V6K

10U_0805_25V6K

PR556

PR556
10K_0402_1%

10K_0402_1%

1 2

PR557 2K_0402_1%

PR557 2K_0402_1%

1 2

G

1 2

PR543

@PR543

@

PL503

PL503

PH504

@PR559

@

PC538

PC538

1 2

@PH504

@

RNTCANRNTCA P

PR542
0_0402_5%

0_0402_5%

1 2

PR560
0_0402_5%

0_0402_5%

1 2

Cedar trail

0_0402_5%

0_0402_5%

PR545 0_0402_5%PR545 0_0402_5%

1 2

1 2

PC534

PC534

0.1U_0402_25V6

0.1U_0402_25V6

1 2

0.1U_0402_25V6

0.1U_0402_25V6

2.2UH_PCMC06 3T-2R2MN_8A_20%

2.2UH_PCMC06 3T-2R2MN_8A_20%

1 2

10K_0402_1%_ERTJ 0EG103FA

10K_0402_1%_ERTJ 0EG103FA

1 2

PR559
0_0402_5%

0_0402_5%

1 2

PR558 0_0402_5%PR558 0_0402_5%

1 2

0.1U_0402_25V6

0.1U_0402_25V6

Compal Electronics, Inc.

Title

Title

Title

CPU GPU CORE

CPU GPU CORE

CPU GPU CORE

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

A2

A2

A2

Date: Sheet of

Date: Sheet of

Date: Sheet of

H

B+

+CPU_COR E

Ipeak=4.234A
Imax=2.9638A
F=313KHz
Total Capacitor 660uF,
ESR 4.5mohm

@PR542

@

+GFX_CORE

Ipeak=1.94A
Imax=1.358A
F=313KHz
Total Capacitor 660uF,

@PR560

@

ESR 7.5mohm

35 38Wednesd ay, November 02, 2011

35 38Wednesd ay, November 02, 2011

35 38Wednesd ay, November 02, 2011

H

0.3

0.3

0.3

5

4

3

2

1

PIR (Product Improve Record)

QBU00 LA-6858P SCHEMATIC CHANGE LIST
REVISION CHANGE: 0.1

NO DATE PAGE MODIFICATION LIST PURPOSE

-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

04/ 26 06 Delete C948,C949,C950,C951 ES2 CPU only support 2 pairs DMI

01.

02.

04/ 26 06 Add DDR_A_MA15 signal in CPU side

D D

03.

04/ 26 07 Reserve 0 ohm for DDC_SCL / SDA , HPD, BREF1P5V, BREFREXT connect to GND.

04.

04/ 26 07 Add CRT DAC,SYNC signals and add RV155,RV156,RV157 150 ohm pull down resistor for CRT DAC signal.

05.

04/ 26 08 Reserve 0 ohm for VCCADP / VCCADP_SFR connect to GND

06.

04/ 26 08 Add R1004,C166 for +VCCDIO / R535,C1125 for +VCC_CRT_DAC

07.

04/ 26 10 Add MA15 signal for SODIMM connector

08.

04/ 26 11 Stuff R544 System will change to non-share ROM design, PCH STRAP2/1 will be 01

09.

04/ 26 12 Change PCIe port arrangement

10.

04/ 26 13 Use BOM option for R931,R932,R933,R934

11.

04/ 26 13 Add J2 and C1087 for PCH GPIO12 BIOS will use GPIO12 for clean password function.

12.

04/ 26 13 Add R566,R567,R618 10K pull high resistors for PCH SPI I/F

13.

04/ 26 15 Add CRT circuit

14.

04/ 26 19 Change USB charger(US1) solution to MAX14566B Follow A51 common design

15.

04/ 26 19 Reserve US2 bus switch Support BIOS team's new debug card.

04/ 26 19 Change US4 USB power switch to 2A

16.

04/ 26 23 Change LOM_WAKE# control signal to EC_SWI#

17.

18. 04/ 26 25 Change KBC to KB930/KB9012

C C

19.

20.

04/ 28 18 Reserve 0 ohm and test points in JGPS pin1/3/5/44/46/51 Cougar 2.0 will support new 3G/LTE module

04/ 29 25 Delete C211,C212,C216,C217 RF team has no necessity21.

22.

04/ 29 07 Delete 220p caps for sideband signals. EMC team has no necessity

23.

04/ 29 09 Delete C940,C941

24.

04/ 29 09 Delete C1067,C1066

25.

04/ 29 09 Reserve R305,C392 for SMBus_CLK Reserve R-C for RF team's requirement

26.

04/ 29 17 Delete C227,C228,C290,C230,C231,C232,C1074,C1075 RF team has no necessity

27.

04/ 29 18 Delete C307,C298,C297 RF team has no necessity

28.

05/ 03 07 Add R984 0 ohm resistor for XDP pin17 Reserve 0 ohm for XDP when XDP connector no use.

29.

05/ 04 16 Change Q42,Q43 to dual package

30.

05/ 06 07 Add R989 (0 ohm) for XDP signal Reserve 0 ohm for XDP when XDP connector no use.

31. 05/ 10 15 Delete D53,F1,C1110 Share 5V with CRT circuit.

32. 05/ 10 07 Change XDP un-define net name Follow naming rule

Cedar Trail platform supports MA0-MA15 total sixteen address signals

Follow Intel V1.0 check list to disable HDMI

Follow Intel V1.0 check list to enable RGB I/F

Follow Intel V1.0 check list to disable HDMI

Follow Intel V1.0 check list to enable RGB I/F

Cedar Trail platform supports MA0-MA15 total sixteen address signals

Follow BIOS team's request to re-arrang PCIe port for power saving.

Follow Intel V1.0 check list to disable HDMI

System will change to non-share ROM design

Follow Intel PDG and V1.0 check list to implement CRT circuit

Support USB charge V1.1 SPEC--->support 1.8A

LOM WAKE# will connect to PCH directly and change net name to "EC_SWI#"

Follow EC team KB930/KB9012 common design

System will change to non-share ROM design04/ 26 26 Add U22 -->2MB SPI ROM

RF team has no necessity

RF team has no necessity

Save layout space and cost

QBU00 LA-6858P SCHEMATIC CHANGE LIST

B B

REVISION CHANGE: 0.2

NO DATE PAGE MODIFICATION LIST PURPOSE

-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

01. 06/ 07 07 Remove XDP connector XDP debug port is no necessary in PVT

06/ 07 08 Keep +VCCADP_1.05, +VCCADP_SFR power rail even disable DDI interface02. Intel correct their DDI disable guideline

06/ 07 26 Change U36 Symbol and footprint03. Fix DFB issue

04. 06/ 10 13 Change J1 to JCMOS, J2 to JPW Follow A51 jumper naming rule

06/ 10 19 Remove US2 USB bus switch05. PVT won't reserve USB debug port

06. 06/ 14 08 Stuff 1u (C1007,C1008,C1009) on GFX_CORE To solve ESD issue

06/ 14 28 Add 0.1u (C1128) on +0.75VS power rail07. To solve ESD issue

06/ 14 10 Add 0.1u (C116) on +0.75VS power rail08. To solve ESD issue

06/ 14 10 Add 0.1u (C119) on +1.5V power rail To solve ESD issue09.

10. 06/ 14 10 Add 0.1u (C406) on +1.5V power rail

06/ 14 27 Add 1u (C406) on touch pad power rail11.

To solve ESD issue

To solve ESD issue

12. 06/ 15 13 Change PCH SPI I/F pull high to +3VS To solve S3/S5 +3VS power plan leakage issue

13. 06/ 16 20 Stuff 0.1u (C280) on +3VS power rail To solve ESD issue

A A

06/ 18 07 Add R1009, R1010 for DDI1_DDC_SCL/SDA14. Follow Intel DDI disable guideline

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/04/07 2012/10/21

2009/04/07 2012/10/21

2009/04/07 2012/10/21

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW PIR

HW PIR

HW PIR

QBU00

QBU00

QBU00

36 38Wednesday, November 02, 2011

36 38Wednesday, November 02, 2011

36 38Wednesday, November 02, 2011

1

0.3

0.3

0.3

5

4

3

2

1

PIR (Product Improve Record)

QBU00 LA-6858P SCHEMATIC CHANGE LIST
REVISION CHANGE: 0.3

NO DATE PAGE MODIFICATION LIST PURPOSE

-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

06/ 29 09 Swap CLK Gen output for CPU_SCDREFFCLK and CPU_DREFCLK Intel recommend CPU_SSCDREFFCLK use SSC CLK01.

D D

QBU00 LA-6858P SCHEMATIC CHANGE LIST
REVISION CHANGE: 1.0

NO DATE PAGE MODIFICATION LIST PURPOSE

-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

08/ 29 07 Change R975 from 10ohm to 0 ohm Follow Intel CRB design.01.

08/ 29 25 Un-stuff R312,R313 KSO1,KSO2 of KB930 don't need to pull high.02.

03. 08/ 29 27 Add 1u(C406) on touch pad power rail. To solve ESD issue

C C

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/04/07 2012/10/21

2009/04/07 2012/10/21

2009/04/07 2012/10/21

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW PIR

HW PIR

HW PIR

QBU00

QBU00

QBU00

37 38Wednesday, November 02, 2011

37 38Wednesday, November 02, 2011

37 38Wednesday, November 02, 2011

1

0.3

0.3

0.3

NO DATE PAGE MODIFICATION LIST PURPOSE

--------------------------------------------------------------------------------------------------------------------------------

2011/06/14

2011/06/14

32

35 PR526, PR528, PR569, PR571 to @

PR336, PR356 to 1206 4.7ohm; PC336, PC356 to 0603 680pF

PR506, PR516 to 1206 4.7ohm; PC506, PC516 to 0603 680pF

For EMI Solution

For EMI Solution

2011/06/14

2011/06/14

2011/06/14

2011/06/21

2011/06/27

2011/06/27

2011/06/27

2011/06/27

2011/11/1

2011/11/1

2011/11/1

2011/11/1

33

33

35

PU150 change to RT8209MGQW

PR157 change to S RES 1/16W 7.87K +-1% 0402

PC550 to @

35 PC536 to 42.2K

35

35

35

35

29

30

32

35

PH505, PR542, PR543, PH504, PR559, PR560 to @
PR545, PR558, PR530, PR567 to 0ohm
PR541 to 3.62K, PR544 to 1.69K, PR556 to 10K
PR557 to 2K, PR536 to 39K

PR582, PR583 to 35.7K For CPU & GFX OCP Solution

PL503 to 2.2uH Base on GFX_Core ripple & dynamic test result

PR584 to 0_0402_5% For AP Code material

PF1 change to SART 5A_32V_S1206-H-5.0A

PF2 change to Cooper 7A_32V_TR/3216FF-R For burn out issue

PU330 change to RT8205EGQW

PC550 change to Lelon 68uF 5.3H

For OCP Solution

Reserve PC550 location and change it to 5.3mm cap ( SF000003Z00 ) for ME solution

Change PR536 to 42.2Kohm to meet Cedar Trail loadline spec

For Cedar Trail loadline spec

For burn out issue

For burn out issue

For acoustic issue

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/11/ 11 2011/11/ 11

2010/11/ 11 2011/11/ 11

2010/11/ 11 2011/11/ 11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Power PIR

Power PIR

Power PIR

PEQAE LA-7291P M/B

PEQAE LA-7291P M/B

PEQAE LA-7291P M/B

38 38Wed nesday, November 02, 2011

38 38Wed nesday, November 02, 2011

38 38Wed nesday, November 02, 2011

0.3

0.3

0.3