Compal SLC M Schematic

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1 1

B

C

D

E

2 2

Compal Confidential

SLC M/B Schematics Document

14": Tabo; 15.6" Pochacco

Intel Ivy Bridge ULV Processor with DDRIII + Panther Point

3 3

Date : 2013/11/13 Version 0.1

4 4

Security Classification

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2011/06/29 2011/06/29

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

LA-A999P

E

0.1

1 58Friday, March 14, 2014

0.1

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A

B

C

D

E

NVIDIA N15V-GM (GB2-64)

ball BGA 23x23mm

1 1

595

VRAM x 4

page 22~29

eDP/LVDS Conn.

page30

HDMI Conn.

pa

2 2

CRT Conn.

ge31

page 32

PEG x8 Gen2 / Gen3

1 l

eDP

ane

FDI *8

2.7GT/s

LVDS

DDPB

VGA

ocessor

Pr Ivy Bridge

ULV Processor

FCBGA 1023

31mm*24mm

Intel PCH

Intel

Memory BUS(DDR3L) Dual Channel

1.35V DDR3L 1600MHz

DMI2 *4 5GT/s

USB2.0

USB3.0

Port 1

USB3.0 Conn.X1

Panther Point

PCIe

GPP2

Card Reader RTS5239

page35

MINI Card (WLAN/BT)

Card Reader

3 3

Conn.

page35

1

Giga LAN RTL8151

page33 page35

Transformer RJ45

GPP3GPP

page35

Sub-borad

FCBGA 989Balls 25mm x 25mm

page 14~22

SPI LPC

SATA

HD

Port 0

HDD Conn.

Audio(AZ)

204pin DDR3L-SO-DIMM X2

BANK 0, 1, 2, 3

Port 8 Port 9

USB Camera

Port 0

page36

SATA III

page34

Audio ALC3227

page30

USB2.0 Conn.

page37

WLAN BT Combo

Port 1

page36

Debug port

Port2

ODD Conn.

page34

SATA I

page12,13

page33

USB2.0 Conn.

Port 2

page36

Touch

reen

Sc

Port 10

page30

USB/B

ge24

pa

PWR BTN/B

page28

BTN/B

TP

4 4

page27

A

RTC CKT

POWER On/Off CKT

DC/DC Interface CKT

BIOS (8M)

ENE KBC9012

page41

ch PadInt.KBD

page38 page38 page39

B

Tou

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

FAN/LED

Compal Secret Data

2012/12/01 2013/07/10

Compal Secret Data

Int. Speaker Conn.

Deciphered Date

D

Combo Jacks

page37 page37

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Custom

LA-A999P

Block Diagrams

E

2 58Friday, March 14, 2014

0.1

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A

B

C

D

E

GPU power

dGPU

VV

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

ON

ONONON ON

ON

OFF

HIGH HIGH HIGH HIGH

LOW

LOW LOW LOW LOW

OFF OFFPXGPU power

OFF

PX

OFF OFF

PX

HIGH

LOWLOWLOW

OFF

OFFOFF

HIGHHIGHHIGH

HIGH

PCH SM Bus address

Address

0x50/0x52

0xFFH

Address

Device Ad

DDR DIMM0

DDR DIMM1

CLKOUT

PCI0

PCI1

PCI2

PCI3

PCI4

SATA

SATA0

BY SKU

TPM

CPU

VRAM

C

UMA

DIS X X

9656@9635@

CPUUMA1@

CPUUMA2@

CPUDIS@

X76@

SAM@

HY@

MIC@

CONN@@Option

X

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

SATA1

SATA2

SATA3

SATA4

SATA5

SP@

PX@ UMA@

V

X

V X

2011/06/29 2011/06/29

dress

DESTINATION

PCH_LPBACK

PC

I_LPC/TPM

None

DESTINATION

JHDD1

None

JODD1

None

X

V X

V

Compal Secret Data

DIS@

V

Deciphered Date

D

LOW

OFF

USB Port Table

USB 2.0 USB 1.1 Port

EHCI1

EHCI2

USB 3.0 Port

3 External

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

0 1 2 3 4 5 6 7 8

9 10 11 12 13

1

2

3

4

Title

Size Document Number Rev

C

Date: Sheet of

USB Port

USB2.0 (For USB3.0 Conn.) USB2.0 (D/B) USB2.0 (D/B)

None None None None None

Camera Mini Card(WLAN& BT) Touch Screen

None None None

2 External USB Port

USB3.0 (left Side)

None None None

Compal Electronics, Inc.

Notes List

LA-A999P

E

3 58Friday, March 14, 2014

ZSO40/50 (LA-A998P/LA-A999 Ver:0.1)

Voltage Rails

S1

Power Plane Description

VIN

BATT+ Battery power supply (12.6V) N/A N/A N/A

B+

+CPU_CORE

1 1

+VGFX_CORE Core voltage for UMA graphic ON OFF OFF

+0.675VS +0.675VP to +0.675VS switched power rail for DDR3L terminator

+1.05VS_VCCP

+VCCP

+1.35V

+1.5VS

+1.8VS (+3VALW ) to 1.8V LDO power rail to PCH

+3VALW +3VALW always on power rail

+3VALW_EC +3VL to KBC ON ON ON*

+LAN_VDD_3V3

+3V_PCH

+3VS

+5VALW

+5V_PCH

+5VS +5VALW to +5VS switched power rail OFFON OFF

2 2

+RTCVCC RTC power

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

SMBUS Control Table

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

PCH_SMBCLK PCH_SMBDATA

PCH_SML0CLK

3 3

PCH_SML0DATA

PCH_SML1CLK PCH_SML1DATA

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

+V1.05SP to +1.05VS_VCCP switched power rail for CPU

+VCCP (1.05V ) power for PCH

+1.35V_VDDQP to +1.35V power rail for DDR3L ON ON OFF

+1.5VS switched power rail

+3VALW to +LAN_VDD_3V3 power rail for LAN

+3VALW to +3V_PCH power rail for PCH (Short Jumper)

+3VALW to +3VS power rail

+5VALWP to +5VALW power rail

+5VALW to +5V_PCH power rail for PCH (Short resister)

BATT

SOURCE

KB9012

PCH

WLAN

BATT SODIMM

MIINI1

Charger

V

TP

V

DESTINATIONDIFFERENTIAL

CLKOUT_PCIE0

CLKOUT_PCIE1

CLK

CLKOUT_PCIE2

CLKOUT_PCIE3

CLKOUT_PCIE4

4 4

CLKOUT_PCIE5

CLKOUT_PCIE6

CLKOUT_PCIE7

CLKOUT_PEG_B

A

mini WLAN

CARD READER

PCIE LAN

None

S3 S5

N/A N /A N/A

N/AN/AN/A

OFF

ON

ON OFF OFF

ON

ON ON

ON

ON ON

OFFOFFON

OFF

ON ON*

ON*

OFF

ON ON*

ON*

ON ONON

EC_SMB_CK2

EC_SMB_DA2

PCH_SML1CLK

PCH_SML1DATA

V

FLEX CLOCKS DESTINATION

CLKOUTFLEX0 None

CLKOUTFLEX1

CLKOUTFLEX2

CLKOUTFLEX3

Symbol Note :

: means Digital Ground

: means Analog Ground

Project ID UMA@ DIS@

LA-A998P LA-A999P

PCB

14@

B

DGPU_PRSNT#

15@

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

Power Plane Description S1 S5S3

+3VGS

+VGA_CORE

+1.05VGS

+1.5VGS

EC SM Bus1 address

Device

Smart Battery

G-sensor

Charger IC BQ24738

EC SM Bus2 address

Device

PCH SML1

N15V-GE dGPU

G-Sensor

V

None

0.1

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5

D D

C C

4

3

2

1

B B

A A

Security Classification

2011/06/29 2011/06/29

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/29 2011/06/29

3

Compal Secret Data

Deciphered Date

Title

PROCESSOR(1/7) DMI,FDI,PEG

Size Docum ent Number Rev

B

Date: Sheet of

2

Date: Sheet of

4 58Friday, March 14, 2014

1

0.1

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5

UCPU1

CPUDIS01@

UCPU1

CPUDIS01@

i5-2467M CPU

SA00004X000

UCPU1

CPUDIS02@

UCPU1

CPUDIS02@

i5-2367M CPU

SA000051H20

D D

C C

B B

UCPU1

CPUDIS03@

UCPU1

CPUDIS03@

i5-2367M CPU

SA000051H20

UCPU1

CPUDIS04@

UCPU1

CPUDIS04@

i5-3317U CPU

SA00005K600

eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms

NOTE:eDP_COMPIO and eDP_ICOMPO sh

ould not be left floating even if Internal Graphic is disab led since they are shared with other inter faces

EDP_HPD#<30>

UCPU1

CPUUMA3@

UCPU1

CPUUMA3@

i5-2367M CPU

SA000051H20

UCPU1

CPUUMA4@

UCPU1

CPUUMA4@

17W 1.7GHz GT2 ES2 QBP7

SA00005B010

UCPU1

CPUUMA5@

UCPU1

CPUUMA5@

17W 1.7GHz no cnfg ES2 QBTQ

SA00005B020

eDP@

RC88

RC88 1K_0402_5%

1K_0402_5%

1 2

UCPU1

CPUUMA1@

UCPU1

CPUUMA1@

17W 1.5GHz GT2 ES2 QBP8

+VCCP

12

SA00005AZ10

UCPU1

CPUUMA2@

UCPU1

CPUUMA2@

17W 1.5GHz no cnfg ES2 QBTP

SA00005AZ20

RC2

24.9_0402_1%

EDP_CPU_AUX#_C<30>

EDP_CPU_AUX_C<30>

EDP_CPU_LANE_N0_C<30>

EDP_CPU_LANE_P0_C<30>

<1111> Co-lay eDP function.

4

Sandy Bridge:

tel Core i5-2467M: SA00004X000 (4619HY32L01)

In

Ivy Bridge:

1.5GHz GT2 ES2 QBP8: SA00005AZ10 (4619HZ32L01)

1.5GHz ES2 QBTP: SA00005AZ20(4619HZ32L02)

UCPU1A

@

UCPU1A

@

DMI_CRX_PTX_N0<16> DMI_CRX_PTX_N1<16> DMI_CRX_PTX_N2<16> DMI_CRX_PTX_N3<16>

DMI_CRX_PTX_P0<16> DMI_CRX_PTX_P1<16> DMI_CRX_PTX_P2<16> DMI_CRX_PTX_P3<16>

DMI_CTX_PRX_N0<16> DMI_CTX_PRX_N1<16> DMI_CTX_PRX_N2<16> DMI_CTX_PRX_N3<16>

DMI_CTX_PRX_P0<16> DMI_CTX_PRX_P1<16> DMI_CTX_PRX_P2<16> DMI_CTX_PRX_P3<16>

FDI_CTX_PRX_N0<16> FDI_CTX_PRX_N1<16> FDI_CTX_PRX_N2<16> FDI_CTX_PRX_N3<16> FDI_CTX_PRX_N4<16> FDI_CTX_PRX_N5<16> FDI_CTX_PRX_N6<16> FDI_CTX_PRX_N7<16>

FDI_CTX_PRX_P0<16> FDI_CTX_PRX_P1<16> FDI_CTX_PRX_P2<16> FDI_CTX_PRX_P3<16> FDI_CTX_PRX_P4<16> FDI_CTX_PRX_P5<16> FDI_CTX_PRX_P6<16> FDI_CTX_PRX_P7<16>

FDI_FSYNC0<16> FDI_FSYNC1<16>

FDI_INT<16>

FDI_LSYNC0<16> FDI_LSYNC1<16>

EDP_COMP

EDP_HPD#

M2

DMI_RX#[0]

P6

DMI_RX#[1]

P1

DMI_RX#[2]

P10

DMI_RX#[3]

N3

DMI_RX[0]

P7

DMI_RX[1]

P3

DMI_RX[2]

P11

DMI_RX[3]

K1

DMI_TX#[0]

M8

DMI_TX#[1]

N4

DMI_TX#[2]

R2

DMI_TX#[3]

K3

DMI_TX[0]

M7

DMI_TX[1]

P4

DMI_TX[2]

T3

DMI_TX[3]

U7

FDI0_TX#[0]

W11

FDI0_TX#[1]

W1

FDI0_TX#[2]

AA6

FDI0_TX#[3]

W6

FDI1_TX#[0]

V4

FDI1_TX#[1]

Y2

FDI1_TX#[2]

AC9

FDI1_TX#[3]

U6

FDI0_TX[0]

W10

FDI0_TX[1]

W3

FDI0_TX[2]

AA7

FDI0_TX[3]

W7

FDI1_TX[0]

T4

FDI1_TX[1]

AA3

FDI1_TX[2]

AC8

FDI1_TX[3]

AA11

FDI0_FSYNC

AC12

FDI1_FSYNC

U11

FDI_INT

AA10

FDI0_LSYNC

AG8

FDI1_LSYNC

AF3

eDP_COMPIO

AD2

eDP_ICOMPO

AG11

eDP_HPD#

AG4

eDP_AUX#

AF4

eDP_AUX

AC3

eDP_TX#[0]

AC4

eDP_TX#[1]

AE11

eDP_TX#[2]

AE7

eDP_TX#[3]

AC1

eDP_TX[0]

AA4

eDP_TX[1]

AE10

eDP_TX[2]

AE6

eDP_TX[3]

IVY-BRIDGE_BGA1023

PEG_RCOMPO

DMI Intel(R) FDI

PCI EXPRESS -- GRAPHICS

eDP

PEG_ICOMPI

PEG_ICOMPO

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

3

PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical

+VCCP

12

RC1

24.9_0402_1%

G3

PEG_COMP

G1 G4

H22 J21 B22 D21 A19 D17 B14 D13 A11

PEG_GTX_C_HRX_N7

B10

PEG_GTX_C_HRX_N6

G8

PEG_GTX_C_HRX_N5

A8

PEG_GTX_C_HRX_N4

B6

PEG_GTX_C_HRX_N3

H8

PEG_GTX_C_HRX_N2

E5

PEG_GTX_C_HRX_N1

K7

PEG_GTX_C_HRX_N0

K22 K19 C21 D19 C19 D16 C13 D12 C11

PEG_GTX_C_HRX_P7

C9

PEG_GTX_C_HRX_P6

F8

PEG_GTX_C_HRX_P5

C8

PEG_GTX_C_HRX_P4

C5

PEG_GTX_C_HRX_P3

H6

PEG_GTX_C_HRX_P2

F6

PEG_GTX_C_HRX_P1

K6

PEG_GTX_C_HRX_P0

G22 C23 D23 F21 H19 C17 K15 F17 F14

PEG_HTX_GRX_N7 PEG_HTX_C_GRX_N7

A15

PEG_HTX_GRX_N6 PEG_HTX_C_GRX_N6

J14

PEG_HTX_GRX_N5 PEG_HTX_C_GRX_N5

H13

PEG_HTX_GRX_N4 PEG_HTX_C_GRX_N4

M10

PEG_HTX_GRX_N3 PEG_HTX_C_GRX_N3

F10

PEG_HTX_GRX_N2 PEG_HTX_C_GRX_N2

D9

PEG_HTX_GRX_N1 PEG_HTX_C_GRX_N1

J4

PEG_HTX_GRX_N0 PEG_HTX_C_GRX_N0

F22 A23 D24 E21 G19 B18 K17 G17 E14

PEG_HTX_GRX_P7 PEG_HTX_C_GRX_P7

C15

PEG_HTX_GRX_P6 PEG_HTX_C_GRX_P6

K13

PEG_HTX_GRX_P5 PEG_HTX_C_GRX_P5

G13

PEG_HTX_GRX_P4 PEG_HTX_C_GRX_P4

K10

PEG_HTX_GRX_P3 PEG_HTX_C_GRX_P3

G10

PEG_HTX_GRX_P2 PEG_HTX_C_GRX_P2

D8

PEG_HTX_GRX_P1 PEG_HTX_C_GRX_P1

K4

PEG_HTX_GRX_P0 PEG_HTX_C_GRX_P0

CU41 0.22U_0402_6.3V6KDIS@CU41 0.22U_0402_6.3V6KDIS@ CU42 0.22U_0402_6.3V6KDIS@CU42 0.22U_0402_6.3V6KDIS@ CU43 0.22U_0402_6.3V6KDIS@CU43 0.22U_0402_6.3V6KDIS@ CU44 0.22U_0402_6.3V6KDIS@CU44 0.22U_0402_6.3V6KDIS@ CU45 0.22U_0402_6.3V6KDIS@CU45 0.22U_0402_6.3V6KDIS@ CU46 0.22U_0402_6.3V6KDIS@CU46 0.22U_0402_6.3V6KDIS@ CU47 0.22U_0402_6.3V6KDIS@CU47 0.22U_0402_6.3V6KDIS@ CU48 0.22U_0402_6.3V6KDIS@CU48 0.22U_0402_6.3V6KDIS@

CU57 0.22U_0402_6.3V6KDIS@CU57 0.22U_0402_6.3V6KDIS@ CU58 0.22U_0402_6.3V6KDIS@CU58 0.22U_0402_6.3V6KDIS@ CU59 0.22U_0402_6.3V6KDIS@CU59 0.22U_0402_6.3V6KDIS@ CU60 0.22U_0402_6.3V6KDIS@CU60 0.22U_0402_6.3V6KDIS@ CU61 0.22U_0402_6.3V6KDIS@CU61 0.22U_0402_6.3V6KDIS@ CU62 0.22U_0402_6.3V6KDIS@CU62 0.22U_0402_6.3V6KDIS@ CU63 0.22U_0402_6.3V6KDIS@CU63 0.22U_0402_6.3V6KDIS@ CU64 0.22U_0402_6.3V6KDIS@CU64 0.22U_0402_6.3V6KDIS@

131204 Del CU65 by EMI requested

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

impedance = 43 mohms PEG_ICOMPO signals should be routed with max length = 500 mils

- typical impedance = 14.5 mohms

<PEG>

10/05 Change to 0.22uF.

Typ- suggest 220nF. The change in AC capacitor value from 180nF to 265nF is to enable compatibility with future platforms having PCIE Gen3 (8GT/s)

2

PEG_GTX_C_HRX_N[0..7]

PEG_GTX_C_HRX_P[0..7]

PEG_HTX_C_GRX_N[0..7]

PEG_HTX_C_GRX_P[0..7]

1

PEG_GTX_C_HRX_N[0..7] <22>

PEG_GTX_C_HRX_P[0..7] <22>

PEG_HTX_C_GRX_N[0..7] <22>

PEG_HTX_C_GRX_P[0..7] <22>

<PEG>

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/29 2011/06/29

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(1/7) DMI,FDI,PEG

LA-8661P

1

of

5 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

5

D D

PROC_DETECT (Processor Detect): pulled to ground on the processor package. There is no connection to the processor silicon for this signal. System board designers may use this

+VCCP

C C

B B

SYS_PWROK<16>

Processor Pullups

RC81

RC81 10K_0402_5%

10K_0402_5%

+3V_PCH

12

0.1U_0402_16V4Z

RC27

@ RC27

@

0_0402_5%

1 2

200_0402_5%

RC28

1 2

RC8 62_0402_5%RC8 62_0402_5%

RC11 10K_0201_5%RC11 10K_0201_5%

SI2 change to 0201

12.19

+3VS

1 2

PM_DRAM_PWRGD<16>

PROCHOT#

H_CPUPWRGD_R

1

CC2

2

Part Number = SA00003Y000

11.06 Change to +3V_PCH

signal to determine if the processor is present

C295

1 2

10P_0402_50V8J

@ESD@

Near CPU

H_CPUPWRGD<18>

+3V_PCH

UC2

UC2 74AHC1G09GW_TSSOP5

74AHC1G09GW_TSSOP5

5

1

P

B

4

PM_SYS_PWRGD_BUF

O

2

A

G

3

2

SUSP<43>

SUSP

G

H_SNB_IVB#<18>

H_PECI<18,41> H_DRAMRST# <7>

PROCHOT#<41,46>

H_THRMTRIP#<18>

H_PM_SYNC<16>

+1.5V_CPU_VDDQ

12

RC25

RC25 200_0402_5%

200_0402_5%

12

@

RC29

RC29 39_0402_5%

39_0402_5%

13

D

@

QC1

QC1 2N7002_SOT23

2N7002_SOT23

S

4

This pin is for compability with future platforms. A pull up resistor to VCCIO is required if connected to the DF_TVS strap on the PCH.

1 2

RC7 10K_0201_5%@ RC7 10K_0201_5%@

SI2 change to 0201

12.19

PROCHOT#

RC13

short@RC13

short@

1 2

RC16

short@RC16

short@

1 2

UNCOREPWRGOOD:

1 2

RC18 130_0402_5%RC18 130_0402_5%

SM_DRAMPWROK:DRAM power ok

T5PAD @T5PAD @

1 2

RC10 56_0402_5%RC10 56_0402_5%

1 2

RC12 0_0402_5%

short@

H_PM_SYNC_R

0_0201_5%

H_CPUPWRGD_R

0_0201_5%

非非非非

CORE

外外外外外外外外外外外外

PM_DRAM_PWRGD_RPM_SYS_PWRGD_BUF

BUF_CPU_RST#

DDR3 Compensation Signals

SM_RCOMP0

RC23 140_0402_1%RC23 140_0402_1%

SM_RCOMP1

RC24 25.5_0402_1%RC24 25.5_0402_1%

SM_RCOMP2

RC26 200_0402_1%RC26 200_0402_1%

PU/PD for JTAG signals

XDP_TMS

XDP_TDI

XDP_TDO

XDP_TCK

XDP_TRST#

PLT_RST#<17,22,33,35,40,41>

H_PROCHOT#_R

H_THEMTRIP#_R

OK

12

T40 PAD@T40 PAD@

T41 PAD@T41 PAD@

T42 PAD@T42 PAD@

T43 PAD@T43 PAD@

T46 PAD@T46 PAD@

UCPU1B

F49

PROC_SELECT#

C57

PROC_DETECT#

C49

CATERR#

A48

PECI

C45

PROCHOT#

D45

THERMTRIP#

C48

PM_SYNC

B46

UNCOREPWRGOOD

BE45

SM_DRAMPWROK

D44

RESET#

IVY-BRIDGE_BGA1023

PLT_RST#

@

Buffered reset to CPU

+3VS

1

CC1

0.1U_0402_16V4Z

2

5

UC1

1

P

NC

4

BUFO_CPU_RST#

Y

2

A

G

SN74LVC1G07DCKR_SC70-5

3

R375

@R375

@

0_0402_5%

1 2

MISC THERMAL PWR MANAGEMENT

SI2 change to 0201

12.19

C263 0.1U_0201_16V4ZC263 0.1U_0201_16V4Z

XDP_TRST#

C264 220P_0402_50V7KC264 220P_0402_50V7K

PLT_RST#

C265 100P_0402_50V8J@C265 100P_0402_50V8J@

PM_SYS_PWRGD_BUF

C266 220P_0402_50V7KC266 220P_0402_50V7K

BUF_CPU_RST#

3

+VCCP

12

RC3

RC3 75_0402_5%

75_0402_5%

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

DDR3

MISC

DDR3

MISC

JTAG & BPM

1 2

Reset# signal is driven by the PCH to multiple agents on the platform. PCH Reset# output DC levels are 0-V and 3.3 V, processor Reset input DC levels are 0V and 1.0 V. Processor high-voltage level is lower than PCH high v oltage level, therefore a voltage level shifter is required on the Reset# signal. In order for Reset# to meet the signal quality requirement at the input to the processor OD buffer must be plac ed on the motherboard between the PCH and the processor.

RC4

12

BUF_CPU_RST#

43_0402_1%

12

RC6

@RC6

@

750_0402_1%

Requires a series resistor of 43±5% between processor and PC H. It also a needs an Rtt of 75±5% to VCCP after the OD buffer and before the series resistor.

J3

BCLK

H2

BCLK#

AG3

CLK_EDP

AG1

CLK_EDP#

131224 If motherboard only supports external graphics or if it supports integrated graphic but without eDP: Connect DPLL_REF_SSCLK on Processor to GND t hrough 1K ± 5% resistor. Connect DPLL_REF_SSCLK# on Processor to VCCP t hrough 1K ± 5% resistor

AT30

H_DRAMRST#

BF44

SM_RCOMP0

BE43

SM_RCOMP1

BG43

SM_RCOMP2

PAD

T35

@

PAD

T39

N53

@

PRDY#

N55

PREQ#

L56

XDP_TCK

TCK

L55

XDP_TMS

TMS

J58

XDP_TRST#

TRST#

M60

XDP_TDI

TDI

L59

XDP_TDO

TDO

K58

DBR#

G58

BPM#[0]

E55

BPM#[1]

E59

BPM#[2]

G55

BPM#[3]

G59 H60 J59 J61

XDP_BPM#4_R XDP_BPM#5_R XDP_BPM#6_R XDP_BPM#7_R

BPM#[4] BPM#[5] BPM#[6] BPM#[7]

CLK_CPU_DMI <15> CLK_CPU_DMI# <15>

1 2

RC85 0_0402_5%

1 2

RC84 0_0402_5%

short@ RC17

short@

2011.10.18 delete all reserved XDP conponen t. Just reserve test point for XDP.

XDP_DBRESET#_R

H_CPUPWRGD_R

SI2 change to 0201

12.19

100MHz

eDP@

eDP@ eDP@

eDP@

1

CC104

0.1U_0402_16V7K

2

@ESD@

Near CPU

RC17

12

0_0201_5%

T60 PAD@T60 PAD@ T61 PAD@T61 PAD@ T62 PAD@T62 PAD@ T63 PAD@T63 PAD@

12

CC4 0.1U_0201_16V4ZCC4 0.1U_0201_16V4Z

1 2

C118 220P_0402_50V7KC118 220P_0402_50V7K

2

CLK_R_EDP <15> CLK_R_EDP# <15>

XDP_DBRESET#XDP_DBRESET#_R

12/16:Change to 0201 for SI2

6/27 Add ESD solution

XDP_DBRESET# <16>

XDP_DBRESET#

RC5 1K_0201_5%RC5 1K_0201_5%

SI2 change to 0201

12.19

1

+3VS

12

2011.10.18 delete all reserved XDP conponen t. st reserve test point for XDP.

Ju

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/06/29 2011/06/29

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

PROCESSOR(2/7) PM,XDP,CLK

Size Document Number Rev

C

LA-8041P

Date: Sheet of

1

6 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

5

UCPU1C

@

UCPU1C

DDR_A_D[0..63]<12>

D D

C C

DDR_A_BS0<12>

B B

DDR_A_BS1<12> DDR_A_BS2<12>

DDR_A_CAS#<12> DDR_A_RAS#<12> DDR_A_WE#<12>

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AP11

AJ10

AR11

AT13 AU13

BA13 BB11

AY13 AV14 AR14 AY17 AR19 BA14 AU14 BB14 BB17 BA45 AR43

AW48

BC48 BC45 AR45 AT48 AY48 BA49 AV49 BB51 AY53 BB49 AU49 BA53 BB55 BA55 AV56 AP50 AP53 AV54 AT54 AP56 AP52 AN57 AN53 AG56 AG53 AN55 AN52 AG55 AK56

BD37 BF36 BA28

BE39 BD39 AT41

AG6

SA_DQ[0]

AJ6

SA_DQ[1] SA_DQ[2]

AL6

SA_DQ[3] SA_DQ[4]

AJ8

SA_DQ[5]

AL8

SA_DQ[6]

AL7

SA_DQ[7] SA_DQ[8]

AP6

SA_DQ[9]

AU6

SA_DQ[10]

AV9

SA_DQ[11]

AR6

SA_DQ[12]

AP8

SA_DQ[13] SA_DQ[14] SA_DQ[15]

BC7

SA_DQ[16]

BB7

SA_DQ[17] SA_DQ[18] SA_DQ[19]

BA7

SA_DQ[20]

BA9

SA_DQ[21]

BB9

SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

IVY-BRIDGE_BGA1023

@

DDR SYSTEM MEMORY A

SA_CK[0]

SA_CK#[0]

SA_CKE[0]

SA_CK[1]

SA_CK#[1]

SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

4

AU36 AV36 AY26

AT40 AU40 BB26

BB40 BC41

AY40 BA41

AL11 AR8 AV11 AT17 AV45 AY51 AT55 AK55

AJ11 AR10 AY11 AU17 AW45 AV51 AT56 AK54

BG35 BB34 BE35 BD35 AT34 AU34 BB32 AT32 AY32 AV32 BE37 BA30 BC30 AW41 AY28 AU26

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

M_CLK_DDR0 <12> M_CLK_DDR#0 <12> DDR_CKE0_DIMMA <12>

M_CLK_DDR1 <12> M_CLK_DDR#1 <12> DDR_CKE1_DIMMA <12>

DDR_CS0_DIMMA# <12> DDR_CS1_DIMMA# <12>

M_ODT0 <12> M_ODT1 <12>

DDR_A_DQS#[0..7] <12>

DDR_A_DQS[0..7] <12>

DDR_A_MA[0..15] <12>

3

DDR_B_D[0..63]<13>

DDR_B_BS0<13> DDR_B_BS1<13> DDR_B_BS2<13>

DDR_B_CAS#<13> DDR_B_RAS#<13> DDR_B_WE#<13>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AN3 AR4 AK4 AK3 AN4 AR1 AU4 AT2 AV4 BA4 AU3 AR3 AY2 BA3 BE9

BD9 BD13 BF12

BF8 BD10 BD14 BE13 BF16 BE17 BE18 BE21 BE14 BG14 BG18 BF19 BD50 BF48 BD53 BF52 BD49 BE49 BD54 BE53 BF56 BE57 BC59 AY60 BE54 BG54 BA58

AW59 AW58

AU58 AN61 AN59 AU59 AU61 AN58 AR58 AK58

AL58 AG58 AG59

AM60

AL59 AF61 AH60

BG39 BD42 AT22

AV43 BF40 BD45

AL4 AL1

2

UCPU1D

@

UCPU1D

@

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

IVY-BRIDGE_BGA1023

BA34

SB_CK[0]

AY34

SB_CK#[0]

AR22

SB_CKE[0]

BA36

SB_CK[1]

BB36

SB_CK#[1]

BF27

SB_CKE[1]

BE41

SB_CS#[0]

BE47

SB_CS#[1]

AT43

SB_ODT[0]

BG47

SB_ODT[1]

AL3 AV3 BG11 BD17 BG51 BA59 AT60 AK59

AM2 AV1 BE11 BD18 BE51 BA61 AR59 AK61

BF32 BE33 BD33 AU30 BD30 AV30 BG30 BD29 BE30 BE28 BD43 AT28 AV28 BD46 AT26 AU22

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0

DDR_B_DQS1

DDR_B_DQS2

DDR_B_DQS3

DDR_B_DQS4

DDR_B_DQS5

DDR_B_DQS6

DDR_B_DQS7

DDR_B_MA0

DDR_B_MA1

DDR_B_MA2

DDR_B_MA3

DDR_B_MA4

DDR_B_MA5

DDR_B_MA6

DDR_B_MA7

DDR_B_MA8

DDR_B_MA9

DDR_B_MA10

DDR_B_MA11

DDR_B_MA12

DDR_B_MA13

DDR_B_MA14

DDR_B_MA15

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

DDR SYSTEM MEMORY B

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

1

M_CLK_DDR2 <13> M_CLK_DDR#2 <13> DDR_CKE0_DIMMB <13>

M_CLK_DDR3 <13> M_CLK_DDR#3 <13> DDR_CKE1_DIMMB <13>

DDR_CS0_DIMMB# <13> DDR_CS1_DIMMB# <13>

M_ODT2 <13> M_ODT3 <13>

DDR_B_DQS#[0..7] <13>

DDR_B_DQS[0..7] <13>

DDR_B_MA[0..15] <13>

RC35

@RC35

@

0_0402_5%

RC38

0_0402_5%

1 2

D

S

D

S

13

DDR3_DRAMRST#_RH_DRAMRST#

QC2

QC2 BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

G

2

9/7 Folllow PAJ80 BOM by Light del: SB501380020

1 2

add: SB00000QO00

1

CC3

0.047U_0402_16V4Z

2

CPU通通DIMM做reset

H_DRAMRST#<6>

4.99K_0402_1%

A A

DRAMRST_CNTRL_PC H<10,15,41>

5

RC39

RC39 0_0402_5%

0_0402_5%

1 2

short@

DRAMRST_CNTRL

RC36

1K_0402_5%

+1.35V

12

RC37

RC37 1K_0402_5%

1K_0402_5%

1 2

S0 DRAMRST_CNTRL_PC H hgih ,MOS ON H_DRAMRST# HIGH, DDR3_DRAMRST# H IGH Dimm not reset S3 DRAMRST_CNTRL_PC H Low ,MOS OFF H_DRAMRST# lo,DD R3_DRAMRST# HIG H Dimm not reset S4,5 DRAMRST_CNTRL_PC H Low ,MOS OFF H_DRAMRST# lo,DD R3_DRAMRST# low Dimm reset

4

DDR3_DRAMRST# <12,13>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/29 2011/06/29

Compal Secret Data

Deciphered Date

Custom

Date: Sheet of

2

Date: Sheet of

Title

Size Document Number Rev

Compal Electronics, Inc.

PROCESSOR(3/7) DDRIII

LA-8041P

1

7 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

5

4

3

2

1

CFG Straps for Processor

PEG bus is reversed, need to PD.

11.01

D D

Change to part G.

PEG Static Lane Reversal - CFG2 is for the 16x

UCPU1E

@

UCPU1E

B50

CFG[0]

C51

CFG[1]

B54

CFG[2]

D53

CFG[3]

A51

CFG[4]

C53

CFG[5]

C55

CFG[6]

H49

CFG[7]

A55

CFG[8]

H51

CFG[9]

K49

CFG[10]

K53

CFG[11]

F53

CFG[12]

G53

CFG[13]

L51

CFG[14]

F51

CFG[15]

D52

CFG[16]

L53

CFG[17]

H43

VCC_VAL_SENSE

K43

VSS_VAL_SENSE

H45

VAXG_VAL_SENSE

K45

VSSAXG_VAL_SENSE

F48

VCC_DIE_SENSE

H48

RSVD6

K48

RSVD7

RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27

@

BCLK_ITP

BCLK_ITP#

RESERVED

DC_TEST_A4 DC_TEST_C4 DC_TEST_D3

DC_TEST_D1 DC_TEST_A58 DC_TEST_A59 DC_TEST_C59 DC_TEST_A61 DC_TEST_C61 DC_TEST_D61

DC_TEST_BD61 DC_TEST_BE61 DC_TEST_BE59 DC_TEST_BG61 DC_TEST_BG59 DC_TEST_BG58

DC_TEST_BG4 DC_TEST_BG3

DC_TEST_BE3

DC_TEST_BG1

DC_TEST_BE1

DC_TEST_BD1

RSVD30 RSVD31 RSVD32 RSVD33

RSVD34 RSVD35 RSVD36 RSVD37 RSVD38

RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44

RSVD45

N59 N58

N42 L42 L45 L47

M13 M14 U14 W14 P13

AT49 K24

AH2 AG13 AM14 AM15

N50

A4 C4 D3 D1 A58 A59 C59 A61 C61 D61 BD61 BE61 BE59 BG61 BG59 BG58 BG4 BG3 BE3 BG1 BE1 BD1

CLK_RES_ITP <15> CLK_RES_ITP# <15>

Display Port Presence Strap

PCIE Port Bifurcation Straps

CFG[6:5]

Delete T12, T13, T10

12.21

CFG0

T9T9

CFG1

T6T6

CFG2 CFG3

T11T11

CFG4

C C

2011.10.18 delete XDP resistor just reserve test point for XDP.

1 2

+CPU_CORE

+VGFX_CORE

RC46

@RC46

@

1K_0201_1%

B B

1K_0201_1%

RC44 49.9_0402_1%RC44 49.9_0402_1%

CPU_RSVD6 CPU_RSVD7

12

RC47 1K_0201_1%

1K_0201_1%

RC42 49.9_0402_1%RC42 49.9_0402_1%

RC43 49.9_0402_1%RC43 49.9_0402_1%

1 2

RC45 4 9.9_0402_1%RC45 49.9_0402_1%

12

@RC47

@

12/16:Change to 0201 for SI2 because standoff PAD

T7T7 T8T8 T14T14 T15T15 T16T16 T47T47 T48T48 T58T58 T59T59 T17T17 T18T18

12

VAXG_VAL_SENSE

VSSAXG_VAL_SENSE

CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17

VCC_VAL_SENSE VSS_VAL_SENSE

BA19 AV19 AT21 BB21 BB19 AY21 BA22 AY22 AU19 AU21 BD21 BD22 BD25 BD26 BG22 BE22 BG26 BE26 BF23 BE24

CFG2

12

RC40

RC40 1K_0201_1%

1K_0201_1%

1: Normal Operation; Lane # definition matches socket pin map definition

*

RC40 SI2 change to 0201

12.19

0:Lane Reversed

CFG4

12

RC41

eDP@RC41

eDP@

1K_0201_1%

CFG4

1 : Disabled; No Physical Display Port attached to Embedded Display Port

*

0 : Enabled; An external Display Port device is co

nnected to the Embedded Display Port

CFG6

CFG5

12

RC48

RC48 1K_0201_1%

1K_0201_1%

00

= 1 x 8, 2 x 4 PCI Express

*

01 = reserved 10 = 2 x 8 PCI Express 11 = 1 x 16 PCI Express

RC49

RC49 1K_0201_1%

1K_0201_1%

Change CFG[6:5] to 00= 1x8, 2x4 PCIe because AMD driver can't install issue

11.21

RC48, RC49 SI2 change to 0201

12.19

12/16:Change to 0201 for SI2 because standoff PAD

CFG7

12

RC50

@RC50

@

1K_0201_1%

IVY-BRIDGE_BGA1023

PEG DEFER TRAINING

1: (Default) PEG Train immediately following

CFG7

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/29 2011/06/29

Compal Secret Data

Deciphered Date

*

xxRESETB de assertion

0: PEG Wait for BIOS for training

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(4/7) RSVD,CFG

LA-8661P

1

8 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

5

D D

C C

B B

4

+CPU_CORE

3

POWER

UCPU1F

A26

VCC[1]

A29

VCC[2]

A31

VCC[3]

A34

VCC[4]

A35

VCC[5]

A38

VCC[6]

A39

VCC[7]

A42

VCC[8]

C26

VCC[9]

C27

VCC[10]

C32

VCC[11]

C34

VCC[12]

C37

VCC[13]

C39

VCC[14]

C42

VCC[15]

D27

VCC[16]

D32

VCC[17]

D34

VCC[18]

D37

VCC[19]

D39

VCC[20]

D42

VCC[21]

E26

VCC[22]

E28

VCC[23]

E32

VCC[24]

E34

VCC[25]

E37

VCC[26]

E38

VCC[27]

F25

VCC[28]

F26

VCC[29]

F28

VCC[30]

F32

VCC[31]

F34

VCC[32]

F37

VCC[33]

F38

VCC[34]

F42

VCC[35]

G42

VCC[36]

H25

VCC[37]

H26

VCC[38]

H28

VCC[39]

H29

VCC[40]

H32

VCC[41]

H34

VCC[42]

H35

VCC[43]

H37

VCC[44]

H38

VCC[45]

H40

VCC[46]

J25

VCC[47]

J26

VCC[48]

J28

VCC[49]

J29

VCC[50]

J32

VCC[51]

J34

VCC[52]

J35

VCC[53]

J37

VCC[54]

J38

VCC[55]

J40

VCC[56]

J42

VCC[57]

K26

VCC[58]

K27

VCC[59]

K29

VCC[60]

K32

VCC[61]

K34

VCC[62]

K35

VCC[63]

K37

VCC[64]

K39

VCC[66]

K42

VCC[67]

L25

VCC[68]

L28

VCC[69]

L33

VCC[70]

L36

VCC[71]

L40

VCC[72]

N26

VCC[73]

N30

VCC[74]

N34

VCC[75]

N38

VCC[76]

POWER

CORE SUPPLY

AF46

VCCIO[1]

AG48

VCCIO[3]

AG50

VCCIO[4]

AG51

VCCIO[5]

AJ17

VCCIO[6]

AJ21

VCCIO[7]

AJ25

VCCIO[8]

AJ43

VCCIO[9]

AJ47

VCCIO[10]

AK50

VCCIO[11]

AK51

VCCIO[12]

AL14

VCCIO[13]

AL15

VCCIO[14]

AL16

VCCIO[15]

AL20

VCCIO[16]

AL22

VCCIO[17]

AL26

VCCIO[18]

AL45

VCCIO[19]

AL48

VCCIO[20]

AM16

VCCIO[21]

AM17

VCCIO[22]

AM21

VCCIO[23]

AM43

VCCIO[24]

AM47

VCCIO[25]

AN20

VCCIO[26]

AN42

VCCIO[27]

AN45

VCCIO[28]

AN48

VCCIO[29]

AA14

VCCIO[30]

AA15

VCCIO[31]

AB17

VCCIO[32] VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49]

VCCIO50 VCCIO51

VCCIO_SEL

VCCPQE[1] VCCPQE[2]

AB20 AC13 AD16 AD18 AD21 AE14 AE15 AF16 AF18 AF20 AG15 AG16 AG17 AG20 AG21 AJ14 AJ15

W16 W17

BC22

+1.05VS_VCCPQ

AM25 AN22

PEG IO AND DDR IO

RAILS

+VCCP

RC51

1 2

0_0805_5%

VCCP_PWRCTR L_R

choose low or high

1 2

0_0805_5%

1 2

CC73 1U_0402_6.3V6KCC73 1U_0402_6.3V6K

RC54

+VCCP

10K_0402_5%

1 2

RC53

@

+VCCP

short@

2

+VCCP

12

RC52

@RC52

@

75_0402_5%

CPU EDS descript as follow: For Chief River platforms this pin should not be used.

+VCCP

12

RC56

RC56 75_0402_5%

75_0402_5%

1

A44

VIDALERT#

VIDSCLK VIDSOUT

VCC_SENSE VSS_SENSE

VCCIO_SENSE

A A

IVY-BRIDGE_BGA1023

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

VSS_SENSE_VCCIO

SENSE LINES SVID QUIET

3

H_CPU_SVIDALRT#

B43

H_CPU_SVIDCLK

C44

H_CPU_SVIDDAT

F43

VCCSENSE_R

G43

VSSSENSE_R

AN16

VCCIO_SENSE_R

AN17

VSS_SENSE_VCCIO

1 2

RC61 0_0402_5%short@RC61 0_ 0402_5%short@

1 2

RC62 0_0402_5%short@RC62 0_ 0402_5%short@

1 2

RC63

12

RC66

RC66 10_0402_1%

10_0402_1%

10/05 mount. (follow check list)

Compal Secret Data

2011/06/29 2011/06/29

Compal Secret Data

Deciphered Date

1 2

RC57 43_0402_1%RC57 43_0402_1%

1 2

RC58 0_0402_5%short@RC 58 0_0402_5%short@

1 2

RC59 0_0402_5%short@RC 59 0_0402_5%short@

+VCCP

VCCIO_SENSE <51> VSS_SENSE_VCCIO <51>

2

VR_SVID_ALRT# <53> VR_SVID_CLK <53> VR_SVID_DAT <53>

1 2

RC60 1 00_0402_1%RC60 100_ 0402_1%

12

Title

PROCESSOR(5/7) PWR,BYPASS

Size Document Number Rev

Custom

Date: Sheet of

+CPU_CORE

RC64

RC64 100_0402_1%

100_0402_1%

Compal Electronics, Inc.

LA-8661P

Place the PU resistors close to CPU

VCCSENSE <53> VSSSENSE <53>

Place the PU resistors close to VR

9 58Friday, March 14, 2014

1

9 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

5

4

3

2

1

+1.5V_CPU_VDDQ +1.35V

CC74 0.1U_0402_10V7KCC74 0.1U_0402_10V7K

CC75 0.1U_0402_10V7KCC75 0.1U_0402_10V7K

D D

+V_DDR_REFA

+V_DDR_REFB

C C

+VGFX_CORE

RC15

1 2

0_0402_5%@

RC82

1 2

0_0402_5%@

QC7

SB00000S700

13

D

BSS138W-7-F_SOT323-3

S

QC8

SB00000S700

13

D

BSS138W-7-F_SOT323-3

S

12

2

DRAMRST_CNTRL_PC H

G

+V_DDR_REFA_R

1 2

RC14

1K_0402_1%@

2

DRAMRST_CNTRL_PC H

G

+V_DDR_REFB_R

1 2

RC83

1K_0402_1%@

DRAMRST_CNTRL_PC H <15,41,7>

For Chief River only

M3 Circuit (Processor Generated SO-DIMM VREF_DQ)

10/03 add +V_DDR_REFB

+VGFX_CORE

B B

+1.8VS

+VCCSA

A A

5

1 2

0_0805_5%

short@

10U_0603_6.3V6M

CC23

1U_0402_6.3V6K

CC129

1

2

RC77

VCC_AXG_SENSE<53> VSS_AXG_SENSE<53>

10U_0603_6.3V6M

1

CC26

2

10U_0603_6.3V6M

1

CC20

2

1U_0402_6.3V6K

CC130

1

2

1

CC22

2

1U_0402_6.3V6K

CC132

CC131

1

2

‧‧‧‧

Can connect to GND if motherboard only supports external graphics and if GFX VR is not stuffed in a common motherboard design,

VAXG can be left floating in a common

‧‧‧‧

motherboard design (Gfx VR keeps VAXG from floating) if the VR is stuffed

1 2

RC86 100_0402_1%RC86 100_0402_1%

1 2

RC87 100_0402_1%RC87 100_0402_1%

<1119>check list .

+1.8VS_VCCPLL

CC121

1U_0402_6.3V6K

CC121

1U_0402_6.3V6K

CC122

1U_0402_6.3V6K

CC122

1U_0402_6.3V6K

1

2

+VCCSA

10U_0603_6.3V6M

1

CC21

CC133

1

2

1

CC24

2

1U_0402_6.3V6K

UCPU1G

AA46

VAXG[1]

AB47

VAXG[2]

AB50

VAXG[3]

AB51

VAXG[4]

AB52

VAXG[5]

AB53

VAXG[6]

AB55

VAXG[7]

AB56

VAXG[8]

AB58

VAXG[9]

AB59

VAXG[10]

AC61

VAXG[11]

AD47

VAXG[12]

AD48

VAXG[13]

AD50

VAXG[14]

AD51

VAXG[15]

AD52

VAXG[16]

AD53

VAXG[17]

AD55

VAXG[18]

AD56

VAXG[19]

AD58

VAXG[20]

AD59

VAXG[21]

AE46

VAXG[22]

N45

VAXG[23]

P47

VAXG[24]

P48

VAXG[25]

P50

VAXG[26]

P51

VAXG[27]

P52

VAXG[28]

P53

VAXG[29]

P55

VAXG[30]

P56

VAXG[31]

P61

VAXG[32]

T48

VAXG[33]

T58

VAXG[34]

T59

VAXG[35]

T61

VAXG[36]

U46

VAXG[37]

V47

VAXG[38]

V48

VAXG[39]

V50

VAXG[40]

V51

VAXG[41]

V52

VAXG[42]

V53

VAXG[43]

V55

VAXG[44]

V56

VAXG[45]

V58

VAXG[46]

V59

VAXG[47]

W50

VAXG[48]

W51

VAXG[49]

W52

VAXG[50]

W53

VAXG[51]

W55

VAXG[52]

W56

VAXG[53]

W61

VAXG[54]

Y48

VAXG[55]

Y61

VAXG[56]

F45

VAXG_SENSE

G45

VSSAXG_SENSE

BB3

VCCPLL[1]

BC1

VCCPLL[2]

BC4

VCCPLL[3]

L17

VCCSA[1]

L21

VCCSA[2]

N16

VCCSA[3]

N20

VCCSA[4]

N22

VCCSA[5]

P17

VCCSA[6]

P20

VCCSA[7]

R16

VCCSA[8]

R18

VCCSA[9]

R21

VCCSA[10]

U15

VCCSA[11]

V16

VCCSA[12]

V17

VCCSA[13]

V18

VCCSA[14]

V21

VCCSA[15]

W20

VCCSA[16]

IVY-BRIDGE_BGA1023

Delete CC25 330U cap 10.19

r check with power)

(afte

4

POWER

VREF

DDR3 - 1.5V RAILS

GRAPHICS

SENSE

LINES

SENSE

LINES

1.8V RAIL

SA RAIL

VCCSA VID

+V_SM_VREF should

ve 20 mil trace width

ha

AY43

SM_VREF

SA_DIMM_VREFDQ SB_DIMM_VREFDQ

+V_SM_VREF_CNT +V_SM_VREF

BE7 BG7

+V_DDR_REFA_R +V_DDR_REFB_R

0.1U_0402_16V4Z

CC79

1

2

RUN_ON_CPU1.5VS3

Check with Power Team CC

AJ28

VDDQ[1] VDDQ[2] VDDQ[3] VDDQ[4] VDDQ[5] VDDQ[6] VDDQ[7] VDDQ[8]

VDDQ[9] VDDQ[10] VDDQ[11] VDDQ[12] VDDQ[13] VDDQ[14] VDDQ[15] VDDQ[16] VDDQ[17] VDDQ[18] VDDQ[19] VDDQ[20] VDDQ[21] VDDQ[22] VDDQ[23] VDDQ[24] VDDQ[25] VDDQ[26]

AJ33 AJ36 AJ40 AL30 AL34 AL38 AL42 AM33 AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33

5A

CPU1.5V_S3_GATE<41>

SUSP#<41,43,50,51,52,55,58>

1

2

1U_0402_6.3V6K

CC85

1 2

CC86

1

2

RC74

0_0402_5%

RC75

@RC75

@

0_0402_5%

+1.5V_CPU_VDDQ

131203 del RC76

AM28

VCCDQ[1]

AN26

VCCDQ[2]

QUIET RAILS

Issued Date

3

BC43 BA43

U10

D48 D49

VCCSA_SENSE

VDDQ_SENSE

VSS_SENSE_VDDQ

VCCSA_SENSE

SENSE LINES

VCCSA_VID[0] VCCSA_VID[1]

lines

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

1U_0402_6.3V6K

1 2

CC119

1 2

RC78 0_0402_5%@RC78 0_0402_5%@

VCCSA_VID0 VCCSA_VID1

2011/06/29 2011/06/29

100 (330UF) can be taken off.

10.31

1U_0402_6.3V6K

CC87

1

2

1U_0402_6.3V6K

CC90

CC89

CC88

1

2

1U_0402_6.3V6K

CC92

CC91

1

2

10U_0603_6.3V6M

1

CC93

CC94

2

QC4 Change to SA0000JA00 for small package 1016

B+

+3VALW

CPU1.5V_S3_GATE_R

2

12

RC72

RC72 100K_0402_5%

100K_0402_5%

RUN_ON_CPU1.5VS3#

61

2N7002DWH_SOT363-6

2N7002DWH_SOT363-6 QC5A

QC5A

12

34

5

RC70

RC70 100K_0402_5%

100K_0402_5%

RUN_ON_CPU1.5VS3

2N7002DWH_SOT363-6

2N7002DWH_SOT363-6 QC5B

QC5B

SI# BOM Change C C118 0.1u 25V f orm 0.1u 16V

Follow DG 0.71 page 6

+1.35V

CPU1.5V_S3_GATE_R

VCCSA_SENSE <52>

VCCSA_VID0 <52> VCCSA_VID1 <52>

Compal Secret Data

Deciphered Date

VID[0] VID[1] 2011 2012 0 0 0.90 V Yes Yes 0 1 0.80 V Yes Yes 1 0 0.725 V No Yes 1 1 0.675 V No Yes

<1111>Reserve low power switch for +1.5V_CPU_VDDQ.

2

RC67

0_0402_5%

12

short@

3

2

QC3

@QC3

@

AP2302GN-HF_SOT23-3

1

+1.5V_CPU_VDDQ

10U_0603_6.3V6M

1

CC96

CC95

2

10U_0603_6.3V6M

1

CC99

CC97

CC98

2

+1.5V_CPU_VDDQ

12

RC68

RC68 1K_0402_1%

1K_0402_1%

12

RC69

RC69 1K_0402_1%

1K_0402_1%

+1.5V_CPU_VDDQ Source

+1.35V +1.5V_CPU_VDDQ

QC4

QC4 AON6718L_DFN8-5

AON6718L_DFN8-5

5

12

RC73

330K_0402_5%

QC9 @

1

VOUT1

VIN1

2

VOUT1

VIN1

3

4

5

6 7

TPS22966DPUR_SON14_2X3-D

CT1

ON1

GND

VBIAS

ON2

CT2

VIN2

VOUT2

VIN2

VOUT2

GPAD

Title

PROCESSOR(6/7) PWR

Size Document Number Rev

Custom

Date: Sheet of

1 2 3

4

@

1

CC118

2

0.1U_0402_25V6

+1.5V_CPU_VDDQ

14 13

12

CC136 100P_0402_50V8J

11

10

9 8

15

12

20K_0402_5%

@

1 2

R78

RC71

RC71 470_0603_5%

470_0603_5%

1 2

61

2

RUN_ON_CPU1.5VS3#

Q10A

Q10A 2N7002DWH_SOT363-6

2N7002DWH_SOT363-6

Compal Electronics, Inc.

LA-8661P

1

0.1

10 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

5

4

UCPU1H

3

2

1

A13

VSS[1]

A17

VSS[2]

A21

VSS[3]

A25

VSS[4]

A28

VSS[5]

A33

VSS[6]

A37

VSS[7]

A40

VSS[8]

A45

VSS[9]

A49

AA13 AA50 AA51 AA52 AA53 AA55 AA56

AB16 AB18 AB21 AB48 AB61 AC10 AC14 AC46

AD17 AD20

AD61 AE13

AF17 AF21 AF47 AF48 AF50 AF51 AF52 AF53 AF55 AF56 AF58 AF59 AG10 AG14 AG18 AG47 AG52 AG61

AH58 AJ13 AJ16 AJ20 AJ22 AJ26 AJ30 AJ34 AJ38 AJ42 AJ45 AJ48

AK52 AL10 AL13 AL17 AL21 AL25 AL28 AL33 AL36 AL40 AL43 AL47

AL61 AM13 AM20 AM22 AM26 AM30 AM34

AA1

AA8

AC6

AD4

AE8 AF1

AG7 AH4

AK1

VSS[10]

A53

VSS[11]

A9

VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69]

AJ7

VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90]

VSS

D D

C C

B B

VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180]

AM38 AM4 AM42 AM45 AM48 AM58 AN1 AN21 AN25 AN28 AN33 AN36 AN40 AN43 AN47 AN50 AN54 AP10 AP51 AP55 AP7 AR13 AR17 AR21 AR41 AR48 AR61 AR7 AT14 AT19 AT36 AT4 AT45 AT52 AT58 AU1 AU11 AU28 AU32 AU51 AU7 AV17 AV21 AV22 AV34 AV40 AV48 AV55 AW13 AW43 AW61 AW7 AY14 AY19 AY30 AY36 AY4 AY41 AY45 AY49 AY55 AY58 AY9 BA1 BA11 BA17 BA21 BA26 BA32 BA48 BA51 BB53 BC13 BC5 BC57 BD12 BD16 BD19 BD23 BD27 BD32 BD36 BD40 BD44 BD48 BD52 BD56 BD8 BE5 BG13

UCPU1I

BG17

VSS[181]

BG21

VSS[182]

BG24

VSS[183]

BG28

VSS[184]

BG37

VSS[185]

BG41

VSS[186]

BG45

VSS[187]

BG49

VSS[188]

BG53

VSS[189]

BG9

VSS[190]

C29

VSS[191]

C35

VSS[192]

C40

VSS[193]

D10

VSS[194]

D14

VSS[195]

D18

VSS[196]

D22

VSS[197]

D26

VSS[198]

D29

VSS[199]

D35

VSS[200]

D4

VSS[201]

D40

VSS[202]

D43

VSS[203]

D46

VSS[204]

D50

VSS[205]

D54

VSS[206]

D58

VSS[207]

D6

VSS[208]

E25

VSS[209]

E29

VSS[210]

E3

VSS[211]

E35

VSS[212]

E40

VSS[213]

F13

VSS[214]

F15

VSS[215]

F19

VSS[216]

F29

VSS[217]

F35

VSS[218]

F40

VSS[219]

F55

VSS[220]

G51

VSS[221]

G6

VSS[222]

G61

VSS[223]

H10

VSS[224]

H14

VSS[225]

H17

VSS[226]

H21

VSS[227]

H4

VSS[228]

H53

VSS[229]

H58

VSS[230]

J1

VSS[231]

J49

VSS[232]

J55

VSS[233]

K11

VSS[234]

K21

VSS[235]

K51

VSS[236]

K8

VSS[237]

L16

VSS[238]

L20

VSS[239]

L22

VSS[240]

L26

VSS[241]

L30

VSS[242]

L34

VSS[243]

L38

VSS[244]

L43

VSS[245]

L48

VSS[246]

L61

VSS[247]

M11

VSS[248]

M15

VSS[249]

IVY-BRIDGE_BGA1023

VSS

VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258] VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301]

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11

NCTF

VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14

M4 M58 M6 N1 N17 N21 N25 N28 N33 N36 N40 N43 N47 N48 N51 N52 N56 N61 P14 P16 P18 P21 P58 P59 P9 R17 R20 R4 R46 T1 T47 T50 T51 T52 T53 T55 T56 U13 U8 V20 V61 W13 W15 W18 W21 W46 W8 Y4 Y47 Y58 Y59 G48

A5 A57 BC61 BD3 BD59 BE4 BE58 BG5 BG57 C3 C58 D59 E1 E61

IVY-BRIDGE_BGA1023

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/29 2011/06/29

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(7/7) VSS

LA-8041P

1

0.1

11 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

5

4

3

2

1

DDR3 SO-DIMM A

+V_DDR_REFA

CD9

10U_0603_6.3V6M

CD9

10U_0603_6.3V6M

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K CD18

CD18

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K CD28

CD28

1

@

2

All VREF traces should have 20 mil trace width

0.1U_0402_16V7K

CD19

CD25

0.1U_0402_16V7K

CD20

CD21

1

2

1

+

CD22

CD22 330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

2

SGA00004400

+3VS

0.1U_0402_16V7K

CD2

2.2U_0603_6.3V6K

CD2

2.2U_0603_6.3V6K

CD1

1

2

DDR_CKE0_DIMMA<7>

DDR_A_BS2<7>

M_CLK_DDR0<7> M_CLK_DDR#0<7>

DDR_A_BS0<7>

DDR_A_WE#<7> DDR_A_CAS#<7>

DDR_CS1_DIMMA#<7>

1 2

RD5 10K_0402_5%RD5 10K_0402_5%

0.1U_0402_16V7K

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K CD24

CD24

CD23

1

2

D D

C C

B B

DDR_A_D[0..63]<7>

DDR_A_DQS[0..7]<7>

DDR_A_DQS#[0..7]<7>

DDR_A_MA[0..15]<7>

Layout Note: Place near JDIMM1.203 & JDIMM1.204

+0.675VS

CD3

1U_0402_6.3V6K

CD3

1U_0402_6.3V6K

1

2

Layout Note: Place near JDIMM1

+1.35V

10U_0603_6.3V6M

CD12

CD13

1

2

1

2

CD5

CD4

1U_0402_6.3V6K

CD4

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

CD14

1

2

CD7

10U_0603_6.3V6M

CD7

10U_0603_6.3V6M

CD6

1U_0402_6.3V6K

1

2

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

10U_0603_6.3V6M

CD15

CD8

10U_0603_6.3V6M

CD8

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

1

2

10U_0603_6.3V6M

1

2

10U_0603_6.3V6M

CD16

CD17

1

2

1

2

DDR3 SO-DIMM A

A A

+1.35V

@

0.1U_0402_16V7K

CD26

CD27

1

@

2

@

2

SI# 8/16 Reserve 4 pcs 0.1uF for EMI noise issue

5

4

+1.35V +1.35V

3.56A@+1.5V

JDIMM1

+V_DDR_REFA

DDR_A_D0 DDR_A_D1

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS#

DDR_A_MA13 DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_D58 DDR_A_D59

12

JDIMM1

3 5 7

11 13 15 17 19 21 23

27

33 35

39 41

45

51

57

63

67 69

73 75 77 79 81

85 87 89 91 93 95 97

101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

RD6

10K_0402_5%

RD6

10K_0402_5%

205

LCN_DAN06-K4406-0102

VREF_DQ1VSS1 VSS2 DQ0 DQ1 VSS49DQS#0 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS925VSS10 DQS#1 DQS129RESET# VSS1131VSS12 DQ10 DQ11 VSS1337VSS14 DQ16 DQ17 VSS1543VSS16 DQS#2 DQS247VSS17 VSS1849DQ22 DQ18 DQ1953VSS19 VSS2055DQ28 DQ24 DQ2559VSS21 VSS2261DQS#3 DM3 VSS2365VSS24 DQ26 DQ27 VSS2571VSS26

CKE0 VDD1 NC1 BA2 VDD3 A12/BC#83A11 A9 VDD5 A8 A5 VDD7 A3 A1 VDD999VDD10 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1

G1

Standard <Address(SA1,SA0):00>

2 4

DDR_A_D4

6

DDR_A_D5

8 10

DDR_A_DQS#0

12

DDR_A_DQS0

14 16

DDR_A_D6

18

DDR_A_D7

20 22

DDR_A_D12

24

DDR_A_D13

26 28 30

DDR3_DRAMRST#

32 34

DDR_A_D14

36

DDR_A_D15

38 40

DDR_A_D20

42

DDR_A_D21

44 46 48 50

DDR_A_D22

52

DDR_A_D23

54 56

DDR_A_D28

58

DDR_A_D29

60 62

DDR_A_DQS#3

64

DDR_A_DQS3

66 68

DDR_A_D30

70

DDR_A_D31

72

74

DDR_CKE1_DIMMA

76 78

DDR_A_MA15

80

DDR_A_MA14

82 84

DDR_A_MA11

86

DDR_A_MA7

A7

88 90

DDR_A_MA6

A6

92

DDR_A_MA4

A4

94 96

DDR_A_MA2

A2

98

DDR_A_MA0

A0

100 102

M_CLK_DDR1

104

M_CLK_DDR#1

106 108

DDR_A_BS1

110

DDR_A_RAS#

112 114

DDR_CS0_DIMMA#

116

M_ODT0

118 120

M_ODT1

122 124 126

+VREF_CA

128 130

DDR_A_D36

132

DDR_A_D37

134 136 138 140

DDR_A_D38

142

DDR_A_D39

144 146

DDR_A_D44

148

DDR_A_D45

150 152

DDR_A_DQS#5

154

DDR_A_DQS5

156 158

DDR_A_D46

160

DDR_A_D47

162 164

DDR_A_D52

166

DDR_A_D53

168 170 172 174

DDR_A_D54

176

DDR_A_D55

178 180

DDR_A_D60

182

DDR_A_D61

184 186

DDR_A_DQS#7

188

DDR_A_DQS7

190 192

DDR_A_D62

194

DDR_A_D63

196 198 200

PCH_SMBDATA

202

PCH_SMBCLK

204

206

0.6A@+0.75VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

VSS3

DQS0

VSS6

VSS8 DQ12 DQ13

DQ14 DQ15

DQ20 DQ21

DQ23

DQ29

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

VTT2

DQ4 DQ5

DQ6 DQ7

DM1

DM2

A15 A14

CK1

BA1

S0#

NC2

DM4

DM6

SDA SCL

G2

LA-A999P

DDR3_DRAMRST# <13,7>

1

@ESD@

CD99

0.1U_0402_16V7K

2

DDR_CKE1_DIMMA <7>

M_CLK_DDR1 <7> M_CLK_DDR#1 <7>

DDR_A_BS1 <7> DDR_A_RAS# <7>

DDR_CS0_DIMMA# <7> M_ODT0 <7>

M_ODT1 <7>

+0.675VS

2011/06/29 2011/06/29

0.1U_0402_16V7K

CD10

1

2

Compal Secret Data

+VREF_CA

CD11

2.2U_0603_6.3V6K

CD11

2.2U_0603_6.3V6K

Deciphered Date

PCH_SMBDATA < 13,15> PCH_SMBCLK <13,15>

2

RP15

+V_DDR_REFA

+VREF_CA

+V_DDR_REFB

+VREF_CB

RP15

1K_0804_8P4R_1%

RP16

1K_0804_8P4R_1%

<1120>Swap assignment.

Title

Size Document Number Rev

C

Date: Sheet of

+1.35V

18 27 36 45

+1.35V

18 27 36 45

DDRIII DIMM

LA-8661P

1

0.1

12 58Friday, M arch 14, 2014

0.1

WWW.AliSaler.Com

5

All VREF traces should

DDR_B_D[0..63]<7>

D D

DDR_B_DQS[0..7]<7>

DDR_B_DQS#[0..7]<7>

DDR_B_MA[0..15]<7>

have 20 mil trace width

Delete DDR_B_DM[0..7]

10/03 change to +V_DDR_REFB

C C

Layout Note: Place near JDIMM1.203 & JDIMM1.204

+0.675VS

CD41

1U_0402_6.3V6K

CD41

1U_0402_6.3V6K

CD51

1U_0402_6.3V6K

CD51

1U_0402_6.3V6K

CD54

1

2

B B

Layout Note: Place near JDIMM1

+1.35V

10U_0603_6.3V6M

CD37

1

2

10U_0603_6.3V6M

CD45

CD46

1

2

CD53

10U_0603_6.3V6M

CD53

10U_0603_6.3V6M

CD48

1U_0402_6.3V6K

1

2

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

10U_0603_6.3V6M

CD40

CD42

1

2

CD49

10U_0603_6.3V6M

CD49

10U_0603_6.3V6M

CD52

10U_0603_6.3V6M

CD52

10U_0603_6.3V6M

1

2

1

2

0.1U_0402_16V7K

10U_0603_6.3V6M

CD56

1

2

0.1U_0402_16V7K

CD44

CD43

1

2

DDR3 SO-DIMM B

+1.35V

0.1U_0402_16V7K

0.1U_0402_16V7K CD33

CD33

A A

1

@

2

0.1U_0402_16V7K

CD34

1

@

2

0.1U_0402_16V7K

CD35

CD32

1

@

2

4

/03 change to +V_DDR_REFB

10

0.1U_0402_16V7K

0.1U_0402_16V7K CD47

CD47

1

2

+V_DDR_REFB

0.1U_0402_16V7K

2.2U_0603_6.3V6K

CD50

1

2

DDR_CKE0_DIMMB<7>

DDR_B_BS2<7>

M_CLK_DDR2<7> M_CLK_DDR#2<7>

DDR_B_BS0<7>

DDR_B_WE#<7> DDR_B_CAS#<7>

DDR_CS1_DIMMB#<7>

0.1U_0402_16V7K

47U 6.3V M B1 ESR70M

CD39

1

CD36

1

+

CD57

CD57 47U 6.3V M B1 ESR70M

47U 6.3V M B1 ESR70M

@

2

@

2

@

+3VS

10/05 change to PH.

+V_DDR_REFB

CD29

DDR_B_D0 DDR_B_D1

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26 DDR_B_D27

DDR_CKE0_DIMMB

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13 DDR_CS1_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D59

1 2

RD7 10K_0402_5%RD7 10K_0402_5%

0.1U_0402_16V7K

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K CD38

CD38

CD31

1

2

+3VS

3

DDR3 SO-DIMM B

+1.35V +1.35V

3.56A@+1.5V

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1 VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9 VSS925VSS10

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17 VSS1849DQ22

51

DQ18 DQ1953VSS19 VSS2055DQ28

57

DQ24 DQ2559VSS21 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3 A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

RD9

10K_0402_5%

RD9

10K_0402_5%

12

VTT1

205

G1

LCN_DAN06-K4406-0102

DQ4 DQ5

VSS3

DQS0

VSS6

DQ6 DQ7

VSS8 DQ12 DQ13

DM1

DQ14 DQ15

DQ20 DQ21

DM2

DQ23

DQ29

DQS3

DQ30 DQ31

CKE1 VDD2

A15 A14

VDD4

A7

VDD6

A6 A4

VDD8

A2 A0

CK1

CK1#

VDD12

BA1

RAS#

VDD14

S0#

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

SCL

VTT2

G2

Standard <Address(SA1,SA0):10>

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR3_DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_D22 DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_CKE1_DIMMB

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

M_CLK_DDR3 M_CLK_DDR#3

DDR_B_BS1 DDR_B_RAS#

DDR_CS0_DIMMB# M_ODT2

M_ODT3

+VREF_CB

DDR_B_D36 DDR_B_D37

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

PCH_SMBDATA PCH_SMBCLK

0.6A@+0.75VS

M_CLK_DDR3 <7> M_CLK_DDR#3 <7>

DDR_B_BS1 <7> DDR_B_RAS# <7>

DDR_CS0_DIMMB# <7> M_ODT2 <7>

M_ODT3 <7>

+0.675VS

DDR3_DRAMRST# <12,7>

DDR_CKE1_DIMMB <7>

+VREF_CB

0.1U_0402_16V7K

0.1U_0402_16V7K CD30

2.2U_0603_6.3V6K

CD30

2.2U_0603_6.3V6K

CD55

1

2

PCH_SMBDATA < 12,15> PCH_SMBCLK <12,15>

1

SI# 8/16 Reserve 4 pcs 0.1uF for EMI noise issue

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/05/27 2011/05/11

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

DDRIII-DDRH

LA-8661P

1

13 58Friday, M arch 14, 2014

0.1

WWW.AliSaler.Com

5

1 2

RH115 10M_0402_5%RH115 10M_0402_5%

YH1

1 2

32.768KHZ Q13FC1350000500

SJ10000EC00

CH2

1

18P_0201_50V8J

2

D D

1204 SWAP

13

HDA_BITCLK_AUDIO<37>

HDA_RST_AUDIO#<37>

HDA_SYNC_AUDIO<37>

HDA_SDOUT_AUDIO<37>

9/7 SMT memo:Follow intel ME update requirement

C C

add: RH123

SI2 delete RH128& RH127 200 ohm for CPU screw PAD 12

.19

PCH_JTAG_TDO PCH_JTAG_TDIPCH_JTAG_TMS

12

RH133

RH133 100_0201_1%

100_0201_1%

SI2 change to RH133 0201

12.19

B B

EC

ROM

PCH_RTCX1

PCH_RTCX2

<1111> Follow common 10ppm.

1

CH3

18P_0201_50V8J

2

+RTCVCC

RH117 20K_0402_5%RH117 20K_0402_5%

RP12

1 2

18

HDA_BIT_CLK

27

HDA_RST#

36 45

HDA_SDOUT

RH118 20K_0402_5%RH118 20K_0402_5%

RH158

For EMI

33_0804_8P4R_5%

1M_0402_5%

7/12 SI add 1M pull down

HDA_SDO<41>

+3V_PCH

12

RH129

@RH129

@

200_0402_5%

12

SPI ROM 8M

RH134

RH134 100_0402_1%

100_0402_1%

12

RH135

100_0402_1%

12

PCH_JTAG_TCK

RH15051_0402_5% RH15051_0402_5%

EON SA000046400 S IC FL 64M EN25Q64-104HIP SOP 8P MXIC SA00006N100 S IC FL 64M MX25L6473EM2I-10G SOP 8P WINBOND SA000039A30 S IC FL 64M W25Q64FVSSIQ SOIC 8P SPI ROM Micron SA00005L100 S IC FL 64M N25Q064A13ESEC0F SO8W 8P

(Share ROM)

EC_SPI_SO<41> EC_SPI_SI<41> EC_SPI_CLK<41> EC_SPI_CS#<41>

+RTCVCC

RH116

CH4

1U_0402_6.3V6K

1 2

CH5

1U_0402_6.3V6K

+5VS

G

2

QH1

S

SB00000S700

BSS138W-7-F_SOT323-3

1 2

RH122 0_0402_5%@RH122 0_0402_5%@

1 2

RH123 0_0402_5%RH123 0_0402_5%

EC_SPI_SO EC_SPI_SI EC_SPI_CLK EC_SPI_CS#

SPI_SO_PCH_R SPI_SI_PCH_R SPI_CLK_PCH_R SPI_SB_CS0#_R

This is needed to reduce leakage from Coin Cell Battery in G3 state

1 2

1

12

SHORT PADS

2

1

12

SHORT PADS

2

CLP1 & CLP2 place near DIMM

HDA_BIT_CLK HDA_BIT_CLK_OUTHDA_SYNC_R

Prevent back drive issue.

13

D

SPI_CLK_PCH SPI_CLK_PCH_OUT

RPH17

15_0804_8P4R_5%

RPH18

15_0804_8P4R_5%

1M_0402_5%

CMOS

CLRP1

CLRP2

ME CMOS

RH506

1 2

0_0402_5%

HDA_SPKR<37>

HDA_SYNCHDA_SYNC_R

HDA_SDIN0<37>

HDA_SDOUT

RH507

1 2

EMI@

0_0402_5%

place close to UH2

18 27 36 45

SM_INTRUDER#

EMI@

SPI_SO_PCH_R SPI_SI_PCH_R SPI_CLK_PCH_R SPI_SB_CS0#_R

SPI_SO_PCH SPI_SI_PCH SPI_CLK_PCH SPI_SB_CS0#

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_SYNC

HDA_SPKR

HDA_RST#

HDA_SDIN0

HDA_SDOUT

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

SPI_SB_CS0#

SPI_SI_PCH

SPI_SO_PCH

4

9/7 SMT memo:Follow PM requirement change R1 p/n into PV BOM R1: SA00004EES0 R3: SA00004QOB0

UH1A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_ EN# / GPIO3 3

N32

HDA_DOCK_ RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

PANTHER-POINT_FCBGA989

RTCIHDA

JTAG

SPI

LPC

FWH4 / L FRAME#

LDRQ1# / GPIO23

SATA

SATA3RCOMP O

SATA0GP / GPIO21

SATA1GP / GPIO19

I BIOS Pinout

SP

(1)CS# (5)DIO (2)DO (6)CLK (3)WP# (7)HOLD# (4)GND (8)VCC

W25X32

FWH0 / L AD0 FWH1 / L AD1 FWH2 / L AD2 FWH3 / L AD3

LDRQ0#

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP

SATA 6G

SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3COMPI

SATA3RBIA S

SATALED#

C38

LPC_AD0

A38

LPC_AD1

B37

LPC_AD2

C37

LPC_AD3

D36

LPC_FRAME#

E36 K36

V5

SERIRQ

AM3 AM1 AP7 AP5

AM10 AM8 AP11 AP10

AD7 AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

Y10

AB12

AB13

AH1

P3

SATA_LED#

V14

HDDHALT_LED#

P1

BBS_BIT0_R

I BIOS Pinout

SP

(1)CS# (5)DIO (2)DO (6)CLK (3)WP# (7)HOLD# (4)GND (8)VCC

W25X32

SATA_COMP

SATA3_COMP

RBIAS_SATA3

ROM

CPU

3

LPC_AD0 <40,41> LPC_AD1 <40,41> LPC_AD2 <40,41> LPC_AD3 <40,41>

LPC_FRAME# <40,41>

SERIRQ <40,41>

SATA_PRX_DTX_N0 <34> SATA_PRX_DTX_P0 <34> SATA_PTX_DRX_N0 <34> SATA_PTX_DRX_P0 <34>

SATA_PRX_DTX_N2 <34> SATA_PRX_DTX_P2 <34> SATA_PTX_DRX_N2 <34> SATA_PTX_DRX_P2 <34>

+1.05VS_VCC_SATA

1 2

RH130 37.4_0402_1%RH130 37.4_0402_1%

RH132 49.9_0402_1%RH132 49.9_0402_1%

RH137 750_0402_1%RH137 750_0402_1%

1 2

SATA_LED# <39>

+1.05VS_SATA3

EC and TPM.

SATA HDD

ODD

+RTCVCC

CH7

1U_0402_6.3V6K

Place CH95 close to PCH.

1

2

W=20mils

2

change to RP

06

11.

+3VS

RP17

10K_0804_8P4R_5%

RH139 1K_0402_5%@RH139 1K_0402_5%@

LOW=Default

*

HIGH=No Reboot

18 27 36 45

12

BBS_BIT0_R SATA_LED# HDDHALT_LED# SERIRQ

HDA_SPKR

HDA_SDO

ME debug mode , this signal has a weak internal PD

L=>security measures defined in the Flash Descriptor will be in effect (default)

H=>Flash Descriptor Security will be overridden

RTC Battery

DH1

2

1

3

BAV70W 3P C/C_SOT-323

RTC BAT conn

1K_0402_5%

<1118> change to +3VL.

RH148

+3VL

W=20mils

10mils20mils

12

+RTCBATT

20mils

2

-

JRTC1

JRTC1 LOTES_AAA-BAT-054-K01

LOTES_AAA-BAT-054-K01

CONN@

1

PCH_INTVRMEN

RH124 330K_0402_5%RH124 330K_0402_5%

PCH_INTVRMEN

RH126 330K_0402_5%@RH126 330K_0402_5%@

INTVRMEN

H

：

Integrated VRM enable

+3VS

15mils

1

+

*

L：Integrated VRM disable

HDA_SDOUT

RH140 1K_0402_5%@RH140 1K_0402_5%@

*

HDA_SYNC

This signal has a weak intern al pull-down On Die PLL VR is supplied by

1.5V when smapled high

1.8V when sampled low Needs to be pulled High for H uron River platfrom

HDA_SYNC

+RTCBATT

12

Low = Disabled High = Enabled

RH149 1K_0402_5%RH149 1K_0402_5%

+RTCVCC

12

+3V_PCH

12

8 7

SPI_HOLD#

6

SPI_CLK_PCH_R

5

SPI_SI_PCH_R

+3V_PCH

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/29 2011/06/29

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (1/8) SATA,HDA,SPI, LPC

LA-A999P

1

14 58Friday, March 14, 2014

A A

+3V_PCH

R127

R129

1 2

SPI_WP#

3.3K_0402_5%

SPI_HOLD#

3.3K_0402_5%

SPI_SB_CS0#_R SPI_SO_PCH_R SPI_WP#

UH2

1

CS#

2

SO/SIO1

3

WP#

4

GND

EN25Q64-104HIP

HOLD#

SCLK

SI/SIO0

VCC

<1111>Modified SPI ROM fix code.

<1119>Add ROM socket.

<12

05>Del ROM socket.

5

0.1

WWW.AliSaler.Com

5

10/03 change to PCIE port1.

Mini card WLAN

Card Reader

D D

PCIE LAN

<1119>Change back to +3V_PCH.

C C

B B

12

YH2 25MHZ_10PF_7V25000014

1

SJ10000E500

1

CH12

CH12 10P_0402_25V8K

10P_0402_25V8K

2

RH1871M_0402_5% RH1871M_0402_5%

3

GND

2

4

1

CH13

CH13 10P_0402_25V8K

10P_0402_25V8K

2

PCIE_PRX_DTX_N1<33>

PCIE_PRX_DTX_P1<33> PCIE_PTX_C_DRX_N1<33> PCIE_PTX_C_DRX_P1<33>

PCIE_PRX_DTX_N2<35>

PCIE_PRX_DTX_P2<35> PCIE_PTX_C_DRX_N2<35> PCIE_PTX_C_DRX_P2<35>

PCIE_PRX_DTX_N3<35>

PCIE_PRX_DTX_P3<35> PCIE_PTX_C_DRX_N3<35> PCIE_PTX_C_DRX_P3<35>

Mi

niWLAN

rd Reader

Ca

CLK_PCIE_CR#<35> CLK_PCIE_CR<35>

PCIE LAN

SI2 change to 0201

12.19

SI2 change to 0201

12.19

Change WL_OFF# to GPIO45 (pul l-high) +3V_PCH

2012.01.04

XTAL25_IN

XTAL25_OUT

CLK_RES_ITP#<8>

CLK_RES_ITP<8>

CH85 0.1U_0402_10V7KCH85 0.1U_0402_10V7K CH84 0.1U_0402_10V7KCH84 0.1U_0402_10V7K

CLK_PCIE_MINI1#<33> CLK_PCIE_MINI1<33>

+3V_PCH

MINI1_CLKREQ#<33>

+3VS

CR_CLKREQ#<35>

CLK_PCIE_LAN#<35> CLK_PCIE_LAN<35>

+3VS

LAN_CLKREQ#<35>

+3V_PCH

1 2 1 2

1 2

CH10 0.1U_0402_10V7KCH10 0.1U_0402_10V7K

1 2

CH11 0.1U_0402_10V7KCH11 0.1U_0402_10V7K

1 2

CH46 0.1U_0402_10V7KCH46 0.1U_0402_10V7K

1 2

CH27 0.1U_0402_10V7KCH27 0.1U_0402_10V7K

RH178 0_0402_5%short@RH178 0_0402_5%short@ RH179 0_0402_5%short@RH179 0_0402_5%short@

RH181 10K_0201_5%RH181 10K_0201_5%

RH182 10K_0201_5%RH182 10K_0201_5%

RH180 10K_0402_5%RH180 10K_0402_5%

RH177 10K_0201_5%RH177 10K_0201_5%

RH274 10K_0402_5%RH274 10K_0402_5%

RH183 10K_0201_5%RH183 10K_0201_5%

RH185 10K_0402_5%RH185 10K_0402_5%

RH189 10K_0402_5%RH189 10K_0402_5%

RH190 0_0402_5%@RH190 0_0402_5%@ RH191 0_0402_5%@RH191 0_0402_5%@

RH4 0_0402_5%short@RH4 0_0402_5%s hort@ RH5 0_0402_5%short@RH5 0_0402_5%s hort@

RH171

1 2

1 2 1 2

RH10 0_0402_5%short@RH10 0_0402_5%short@ RH9 0_0402_5%short@RH9 0_0402_5%short@

1 2

WL_OFF#<33>

1 2

1 2 1 2

10K_0201_5%

12

1 2 1 2

12

12 12

4

PCIE_PRX_DTX_N1 PCIE_PRX_DTX_P1 PCIE_PTX_DRX_N1 PCIE_PTX_DRX_P1

PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2 PCIE_PTX_DRX_N2 PCIE_PTX_DRX_P2

PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3 PCIE_PTX_DRX_N3 PCIE_PTX_DRX_P3

PCIE_MINI1# PCIE_MINI1

MINI1_CLKREQ#

PCIE_CR# PCIE_CR

CR_CLKREQ#

PCIE_LAN# PCIE_LAN

LAN_CLKREQ#

CLK_BCLK_ITP# CLK_BCLK_ITP

WL_OFF#

UH1B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_ B_N

AB40

CLKOUT_PEG_ B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

PANTHER-POINT_FCBGA989

SMBUSController

SML1ALERT# / PCH HOT# / GPIO74

PCI-E*

CLOCKS

3

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_DATA1

Link

CL_RST1#

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_ A_N CLKOUT_PEG_ A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_DP_ N CLKOUT_DP_ P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_DOT_96 N CLKIN_DOT_96 P

CLKIN_SATA_N CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

SMBCLK

SMBDATA

SML0CLK

CL_CLK1

E12

SMBALERT#

H14

SMBCLK

C9

SMBDATA

A12

DRAMRST_CNTRL_PCH

C8

SML0CLK

G12

SML0DATA

C13

GPIO74

E14

SML1CLK

M16

SML1DATA

M7

T11

P10

M10

PEG_CLKREQ#_R

AB37

CLK_VGA#

AB38

CLK_VGA

AV22 AU22

CLK_CPU_DMI_PCH

AM12 AM13

BF18

CLKIN_DMI#

BE18

CLKIN_DMI

BJ30

CLKIN_DMI2#

BG30

CLKIN_DMI2

G24

CLKIN_DOT96#

E24

CLKIN_DOT96

AK7

CLKIN_SATA#

AK5

CLKIN_SATA

K45

CLK_PCH_14M

H45

CLK_PCI_LPBACK

V47

XTAL25_IN

V49

XTAL25_OUT

Y47

XCLK_RCOMP

K43

F47

H47

K49

DGPU_PRSNT#

131202 Follow 1 5" CRV

RH155 10K_0402_5%RH155 10K_0402_5%

1 2

+3V_PCH

12

DIS@

RH8

RH8 10K_0402_5%

10K_0402_5%

DIS@

RH410 0_0402_5%DIS@RH410 0_0402_5%DIS@ RH411 0_0402_5%DIS@RH411 0_0402_5%DIS@

RH172 0_0402_5%short@RH172 0_0402_5%short@ RH173 0_0402_5%short@RH173 0_0402_5%short@

1 2

RH184 90.9_0402_1%RH184 90.9_0402_1%

2

PV# 9/13 change power rail form +3VALW->+3V_PCH

+3V_PCH

DRAMRST_CNTRL_PCH <10,41,7>

12

RH4120_0402_5%

1 2 1 2

CLK_R_EDP# <6> CLK_R_EDP <6>

CLK_PCI_LPBACK <17>

GPU_CLKREQ# <22>

CLK_CPU_DMI#CLK_CPU_DMI#_PCH CLK_CPU_DMI

131224 For Integrated Graphics designs using eDP on Ivy Bridge. For designs not using eDP, can leave as No Connect

2N7002DWH_SOT363-6

SMBCLK

+1.05VS_VCCDIFFCLKN

+3VS

RH318

RH318 10K_0402_5%UMA@

10K_0402_5%UMA@

1 2

RH319

RH319 10K_0402_5%DIS@

10K_0402_5%DIS@

1 2

SMBDATA

GPIO74

DRAMRST_CNTRL_PCH

CLK_PCIE_GPU# <22> CLK_PCIE_GPU <22>

CLK_CPU_DMI# <6> CLK_CPU_DMI <6>

100MHz

131127 SWAP Pin of RP9.1 & RP9.2 by layout requested

CLKIN_DMI2 CLKIN_DMI2# CLKIN_DMI# CLKIN_DMI

CLKIN_DOT96# CLKIN_DOT96 CLKIN_SATA# CLKIN_SATA

CLK_PCH_14M

<1113>change to RP18.

If use extenal CLK gen, please place close to CLK gen else, please place close to PCH

+3VS

2

6 1

QH2A

RH192

@RH192

@

1 2

0_0402_5%

2N7002DWH_SOT363-6

5

3 4

QH2B

RH194

1 2

0_0402_5%

@

+3VS

1 2

RH263 10K_0402_5%RH263 10K_0402_5%

1 2

RH161 1K_0201_5%RH161 1K_0201_5%

SMBCLK SMBDATA SML1CLK SML1DATA

SML0CLK SML0DATA PCH_SMBCLK PCH_SMBDATA

<1113>Swap. <1118> add SML0 ; SMB2 remove d.

RH170 10K_0402_5%RH170 10K_0402_5%

1

RP24

2.2K_0804_8P4R_5%

RP23

2.2K_0804_8P4R_5%

RP9 10K_0804_8P4R_5%RP9 10K_0804_8P4R_5%

1 8 2 7 3 6 4 5

RP18 10K_0804_8P4R_5%RP18 10K_0804_8P4R_5%

1 8 2 7 3 6 4 5

1 2

PCH_SMBCLK <12,13>

PCH_SMBDATA <12,13>

+3V_PCH

18 27 36 45

+3V_PCH

+3VS

18 27 36 45

2N7002DWH_SOT363-6

<1118>change to standard part.

A A

<1126>Del RH193 /CH14/RH195/CH 15

2N7002DWH_SOT363-6

SML1CLK

SML1DATA

2

6 1

QH6A

2N7002DWH_SOT363-6

5

3 4

QH6B

EC_SMB_CK2 <22,41>

EC_SMB_DA2 <22,41>

SI# 8/8 Add SM L1CLK/SML1DATA for EC detect Thermal

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/29 2011/06/29

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

PCH (2/8) PCIE, SMBUS, CLK

LA-A999P

1

15 58Friday, March 14, 2014

0.1

of

WWW.AliSaler.Com

5

UH1C

DMI_CTX_PRX_N0<5> DMI_CTX_PRX_N1<5> DMI_CTX_PRX_N2<5> DMI_CTX_PRX_N3<5>

DMI_CTX_PRX_P0<5> DMI_CTX_PRX_P1<5> DMI_CTX_PRX_P2<5> DMI_CTX_PRX_P3<5>

D D

SI2 change to 0201 12

.19

XDP_DBRESET#<6>

SYS_PWROK<6>

C C

PCH_RSMRST#<41>

PCH_SUSWARN#<41>

GPIO29 PU to follow Intel request.

11.04

RI# PCH_GPIO29

B B

PM_BATLOW# WAKE#

ACIN_R

PCH_SUSWARN#

ACIN_R

PCH_RSMRST#

PCH_PWROK

A A

DMI_CRX_PTX_N0<5> DMI_CRX_PTX_N1<5> DMI_CRX_PTX_N2<5> DMI_CRX_PTX_N3<5>

DMI_CRX_PTX_P0<5> DMI_CRX_PTX_P1<5> DMI_CRX_PTX_P2<5> DMI_CRX_PTX_P3<5>

+VCCP

To VccIO.

SUSACK#<41>

PCH_PWROK<41>

PM_DRAM_PWRGD<6>

PBTN_OUT#<41>

<1119>change to 10K.

RH214 10K_0201_5%RH214 10K_0201_5%

RH216 10K_0201_5%RH216 10K_0201_5%

RH219 10K_0201_5%

RH217 10K_0402_5%RH217 10K_0402_5%

SI2 change to 0201

.19

12

RH196 49.9_0402_1%RH196 49.9_0 402_1%

RH197 750_0402_1%RH197 750_0402_1%

4mil width and place within 500mil of the PCH

PCH_SUSWARN# SUSACK#_R

SYS_PWROK

PCH_PWROK

PCH_RSMRST# PCH_RSMRST#_R

PCH_SUSWARN# SUSW ARN#_R

ACIN< 41,46,47,48>

RP25

10K_0804_8P4R_5%

1 2

@

1 2

CH268

@

1 2

100P_0201_50V8J

PCH_PWROK

VGATE<53>

RH223 10K_0402_5%RH223 10 K_0402_5%

5

18 27 36 45

<1122>Reserved for deep Sx.

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

1 2

RH198 0_02 01_5%@RH198 0_0201_5%@

RH200

RH202 0_0402_5%

RH203 0_0402_5%

RH204 0_0402_5%

RH206 0_0402_5%

RH208

RH209 0_0402_5%

DH2 CH751 H-40PT_SOD323-2DH2 CH751H-40PT_SOD323-2

PM_BATLOW#

1

2

DMI_IRCOMP

RBIAS_CPY

1 2

0_0201_5%

short@

XDP_DBRESET#

short@

1 2

short@

1 2

short@

PM_DRAM_PWRGD

short@

1 2

0_0201_5%

short@

1 2

short@

21

+3V_PCH

+3V_DSW

SI# 8/16 Reserve C268 100pF by ESD request

+3VS

5

UH3

IN1

VCC

4

OUT

IN2

GND

MC74VHC1G08DFT2G_SC70-5

3

12

NOTE:It is recommended that SYS_PWROK be asserted after both PWROK assertion and CPU core VR powergood assertion. This needed to ensure a safe platform design which meets the timing requirements for this signal.

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

SYS_PWROK

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPW RDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

PANTHER-POINT_FCBGA989

DSWODVREN

RH213 330K_0402_5%RH213 330K_0402_5%

RH215 330K_0402_5%

DSWODVREN - On Die DSW VR Enable

：

Enable

H

*

L：Disable

SUSACK#_R

PM_PWROK_R SUS_STAT#

PBTN_OUT#_R

ACIN_R

RI#

4

BJ14

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5

DMI

System Power Management

+3VS

FDI_RXP6

FDI

FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

12

@

150_0804_8P4R_1%

Max = 800 mils

RH218 8.2K_0402_5%RH218 8.2K_0402_5%

1 2

RH222 2.37 K_0402_1%RH222 2.37K_040 2_1%

1 2

RH224 100K_ 0402_5%RH224 100K_040 2_5%

1 2

RH225 100 K_0402_5%RH225 100K_0402_5%

4

FDI_CTX_PRX_N0

AY14

FDI_CTX_PRX_N1

BE14

FDI_CTX_PRX_N2

BH13

FDI_CTX_PRX_N3

BC12

FDI_CTX_PRX_N4

BJ12

FDI_CTX_PRX_N5

BG10

FDI_CTX_PRX_N6

BG9

FDI_CTX_PRX_N7

BG14

FDI_CTX_PRX_P0

BB14

FDI_CTX_PRX_P1

BF14

FDI_CTX_PRX_P2

BG13

FDI_CTX_PRX_P3

BE12

FDI_CTX_PRX_P4

BG12

FDI_CTX_PRX_P5

BJ10

FDI_CTX_PRX_P6

BH9

FDI_CTX_PRX_P7

AW16

AV12

BC10

AV14

BB10

A18

DSWODVREN

E22

PCH_DPWROK

B9

WAKE#

N3

PM_CLKRUN#

G8

N14

SUSCLK

D10

PM_SLP_S5#

H4

PM_SLP_S4#

F4

PM_SLP_S3#

G10

SLP_A#

G16

PM_SLP_SUS#

AP14

H_PM_SYNC

K14

GPIO29 PU to follow Intel request.

11.04

+RTCVCC

RP20

18

CRT_B

27

CRT_G

36

CRT_R

45

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

1 2

RH199 0_0201_5%RH199 0_0201_5%

1 2

RH504 0_0201_ 5%RH504 0_02 01_5%

0_0402_5%sh ort@

1 2

RH201

<1111> Remove SUSCLK.

PCH_GPIO29

SPOK<49>

CRT_B<32> CRT_G<32> CRT_R< 32>

PM_CLKRUN#

LVDS_IBG

PCH_ENVDD

ENBKL

FDI_CTX_PRX_N0 <5> FDI_CTX_PRX_N1 <5> FDI_CTX_PRX_N2 <5> FDI_CTX_PRX_N3 <5> FDI_CTX_PRX_N4 <5> FDI_CTX_PRX_N5 <5> FDI_CTX_PRX_N6 <5> FDI_CTX_PRX_N7 <5>

FDI_CTX_PRX_P0 <5> FDI_CTX_PRX_P1 <5> FDI_CTX_PRX_P2 <5> FDI_CTX_PRX_P3 <5> FDI_CTX_PRX_P4 <5> FDI_CTX_PRX_P5 <5> FDI_CTX_PRX_P6 <5> FDI_CTX_PRX_P7 <5>

FDI_INT <5>

FDI_FSYNC0 < 5>

FDI_FSYNC1 < 5>

FDI_LSYNC0 <5>

FDI_LSYNC1 <5>

PCH_DPWROK <41>

PM_CLKRUN# <41>

T44 PADT44 PAD

LPCPD# pin of LPC devices may be connected to PCH SUS_STAT# pin.

T45 PADT45 PAD

PM_SLP_S5# <41>

PM_SLP_S4# <41>

PM_SLP_S3# <4 1>

SLP_A# <4 1>

PM_SLP_SUS# <41>

H_PM_SYNC <6>

RH508 47NH_LQG15HS47NJ02D_0 .2A_5%EMI@RH508 47NH_LQG15HS47NJ02D_0.2A_ 5%EMI@

CRT_B

RH509 47NH_LQG15HS47NJ02D_0 .2A_5%EMI@RH509 47NH_LQG15HS47NJ02D_0.2A_ 5%EMI@

CRT_G CRT_R

RH510 47NH_LQG15HS47NJ02D_0 .2A_5%EMI@RH510 47NH_LQG15HS47NJ02D_0.2A_ 5%EMI@

PM_CLKRUN#

3

+3VS

RP14

18

LCD_EDID_DATA

27

LCD_EDID_CLK

36

CTRL_CLK

45

ENBKL

LCD_EDID_CLK LCD_EDID_DATA

CTRL_CLK

CTRL_DATA

T37PAD T37PAD

short@

LVDS_CLKN LVDS_CLKP

LVDS_TXN0 LVDS_TXN1 LVDS_TXN2

LVDS_TXP0 LVDS_TXP1 LVDS_TXP2

CRT_B_R CRT_G_R CRT_R_R

CRT_DDC_CLK CRT_DDC_DATA

RH220

Compal Secret Data

CTRL_DATA

LVDS_IBG

LVD_VREF

CRT_IREF

12

Deciphered Date

2.2K_0804_8P4R_5%

PCH_RSMRST#

AOAC_PME# <17,41>

PCH_PCIE_WAKE# <44>

2 1

DH30 CH751H-40PT_SOD323- 2DH 30 CH751H -40PT_SOD323-2

DH29 CH751H-40PT_SOD323- 2DH 29 CH751H -40PT_SOD323-2

EC Request on 20110309

12

RH308

RH308 10K_0402_5%

10K_0402_5%

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

<1111> Reserved for deep sleep.

LCD_EDID_CLK<30>

LCD_EDID_DATA<30>

21

1 2 1 2 1 2

CRT_DDC_CLK<32 > CRT_DDC_DATA<32>

HSYNC<32> VSYNC<32>

ENBKL<41>

PCH_ENVDD<30>

DPST_PWM<30>

1 2

RH207 0_0402_5%

LVDS_CLKN<30> LVDS_CLKP<30>

LVDS_TXN0<30> LVDS_TXN1<30> LVDS_TXN2<30>

LVDS_TXP0<30> LVDS_TXP1<30> LVDS_TXP2<30>

PCH_RSMRST#PCH_PWROK

1K_0402_0.5%

2011/06/29 2011/06/29

2

131204 SWAP

UH1D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

PANTHER-POINT_FCBGA989

2

SDVO_CTRLDATA

LVDS

DDPC_CTRLDATA

Digital Display Interface

DDPD_CTRLDATA

CRT

SDVO_TVCLKINN

SDVO_TVCLKINP

SDVO_STALLN

SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

DDPB_AUXN

DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P

HDMI

DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_CTRLCLK

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P

mDP

DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_CTRLCLK

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N DDPD_0P

DMC

DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

1

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

Title

PCH (3/8) DMI,FDI,PM,GFX,DP

Size Document Number Rev

LA-A999P

Date: Sheet of

Date: Sheet

PCH_DDPB_CLK <31>

PCH_DDPB_DAT <31>

PCH_DDPB_HPD <3 1>

PCH_DPB_N2 <31> PCH_DPB_P2 <31> PCH_DPB_N1 <31> PCH_DPB_P1 <31> PCH_DPB_N0 <31> PCH_DPB_P0 <31> PCH_DPB_N3 <31> PCH_DPB_P3 <31>

+3VS

12

R524

R560

2.2K_0402_5%

Compal Electronics, Inc.

2.2K_0402_5%

CRT_DDC_CLK CRT_DDC_DATA

1

16 58Friday, March 14, 2014

HDMI

of

0.1

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5

D D

USB3_RX1_N<36>

USB3_RX1_P<36>

USB3.0 x1

C C

DGPU_PWR _EN<25,41 ,56>

<1118>Follow HSW control by EC. <1118>Re-assign USB 2.0 port.

B B

A A

CLK_PCI_LPBACK<15>

CLK_PCI_LPC<40,41>

CLK_PCI_LPC

ACCEL_INT# PCI_PIRQD# PCI_PIRQB# PCI_PIRQC#

GPIO51 PIRQH# GPIO53 DP_CBL_DET

PCI_PIRQA#

ODD_DA#

GPIO55

DGPU_SELECT #

GPIO54

DGPU_HOLD_R ST#

USB3_TX1_N<36>

USB3_TX1_P< 36>

DGPU_HOLD_R ST#<22,41>

DGPU_PWR _EN

ACCEL_INT#<40>

ODD_DA#<34>

RH230 22_040 2_5%EMI@RH230 22_0402 _5%EMI@ RH231 22_040 2_5%EMI@RH231 22_0402 _5%EMI@

RPH3

1 8 2 7 3 6 4 5

8.2K_0804_8 P4R_5%

RPH4

1 8 2 7 3 6 4 5

8.2K_0804_8 P4R_5%

RH7

1 2

RH6 8.2K_ 0402_5%RH6 8.2K _0402_5%

1 2

RH320 10K_ 0402_5%RH320 10K _0402_5%

1 2

RH236 10K_ 0402_5%RH236 10K _0402_5%

1 2

RH237 10K_ 0402_5%RH237 10K _0402_5%

1 2

RH334 10K_ 0402_5%@ R H334 10K_0402_ 5%@

1 2

RH505 0_020 1_5%@RH50 5 0_0201_5%@

AOAC_PME#<16,41 >

1 2

8.2K_0402_5 %

12

T38PAD@ T3 8PAD@

+3VS

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

DGPU_HOLD_R ST# DGPU_SELECT # GPIO54

GPIO51 GPIO53 GPIO55

ACCEL_INT# ODD_DA#

DP_CBL_DET PIRQH#

AOAC_PME#

PLT_RST#_ PCH

CLK_PCI0CLK_PCI_LPBACK CLK_PCI1

Follow Powell reserve PU 10K

5

4

UH1E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

USB3Rn1

BC30

USB3Rn2

BE32

USB3Rn3

BJ32

USB3Rn4

BC28

USB3Rp1

BE30

USB3Rp2

BF32

USB3Rp3

BG32

USB3Rp4

AV26

USB3Tn1

BB26

USB3Tn2

AU28

USB3Tn3

AY30

USB3Tn4

AU26

USB3Tp1

AY26

USB3Tp2

AV28

USB3Tp3

AW30

USB3Tp4

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

PANTHER-POINT_FC BGA989

10K_0402_5 %

PLT_RST#<22,3 3,35,40,41,6>

PD 100K@ KBC side

4

@

RH233

RSVD

PCI

+3VS

1 2

USB

12

RH234

@ RH234

@

100K_0402_ 5%

RSVD1 RSVD2 RSVD3 RSVD4

RSVD5 RSVD6

RSVD7 RSVD8

RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22

RSVD23 RSVD24

RSVD25

RSVD26 RSVD27

RSVD28 RSVD29

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

@

1 2

RH232 0_0 402_5%

+3VS

5

UH4

P

IN1

4

O

IN2

G

SN74AHC1G08D CKR_SC70-5

3

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

AV5 AV10

AT8

AY5 BA2

AT12 BF3

C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

C33

B33

A14 K20 B17 C16 L16 A16 D14 C14

1

2

USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2

USB20_N8 USB20_P8 USB20_N9 USB20_P9 USB20_N10 USB20_P10

USBRBIAS

USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7#

3

USB DEBUG=PORT1 AND PORT9

USB20_N0 <36> USB20_P0 <36> USB20_N1 <36> USB20_P1 <36> USB20_N2 <36> USB20_P2 <36>

To USB3.0 connector (Port 1)

USB2.0

HM76 not support USB2.0 for port 6-7

HM70 not support USB2.0 for port 4-7 &12 &13

NM70 not support USB2.0 for port 4-7 &12 &13

Within 500 mils

1 2

RH229 22.6_0402_1%RH229 22.6_0402_1%

PLT_RST#_ PCH

USB20_N8 <30> USB20_P8 <30> USB20_N9 <33> USB20_P9 <33> USB20_N10 <30> USB20_P10 <30>

USB Camera

WLAN

Touch Screen

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

USB_OC0#<36> USB_OC1#<36>

Compal Secret Data

2011/06/29 2011/06/29

Compal Secret Data

Deciphered Date

2

1

RPH1

USB_OC0# USB_OC1# USB_OC2# USB_OC3#

USB_OC6# USB_OC4# USB_OC7# USB_OC5#

Title

PCH (4/8) PCI, USB, NVRAM

Size Document Number Rev

LA-A999P

Date: Sheet of

Date: Sheet

4 5 3 6 2 7 1 8

10K_0804_8 P4R_5%

RPH2

4 5 3 6 2 7 1 8

10K_0804_8 P4R_5%

Compal Electronics, Inc.

1

+3V_PCH

0.1

of

17 58Friday, March 14, 2014

WWW.AliSaler.Com

5

D D

GPIO28

On-Die PLL Voltage Regulator

This signal has a weak internal pull up

H

：

On-Die voltage regulator enabl e

*

L

：

On-Die PLL Voltage Regulator d isable

+3V_PCH

1 2

@

12

100K_0402_5%

1 2

SLP_ME_CSW_DEV#

PCH_GPIO37

EC_PME#

RH267 10K_0402_5%RH267 10K_0402_5%

RH241 1K_0402_5%

PCH_GPIO37

C C

B B

FDI TERMINATION VOLTAGE OVERRIDE

LOW - Tx, Rx terminated

*

to same voltage (DC Coupling Mode)

+3VS

RH245 1K_0402_5%@RH245 1K_0402_5%@

RH246

GPIO27

PCH_GPIO27 (Have internal Pull-High) High: VCCVRM VR Enable

*

Low: VCCVRM VR Disable

+3V_DSW

<1122>Reserved for deep Sx.

RH251 10K_0402_5%RH251 10K_0402_5%

RH250 10K_0402_5%@RH250 10K_0402_5%@

EC_LID_OUT#<41>

DGPU_GC6_EN<24>

11.07 follow Lotus PU to +3VS

DGPU_PWROK<25,56>

13

1202 follow 15 " CRV

EC_FB_CLAMP_TGL_REQ#<41>

<1122>Reserved for deep Sx.

RC124 0_0201_5%@RC124 0_0201_5%@

RC126 0_0201_5%@RC126 0_0201_5%@

RC125 0_0201_5%@RC125 0_0201_5%@

SLP_ME_CSW_DEV#<41>

ODD_PLUG#<34>

TS_GPIO_CPU<30>

NMI_DBG#_CPU<41>

LAN_PWR_EN<35>

RH154 0_0201_5%

0_0201_5%

1 2

EC_PME#<35,41>

4

EC_SCI#<41>

1 2

short@RH154

short@

T49PAD T49PAD

NMI_DBG#_CPU

GPIO1

GPIO6

EC_SCI#

EC_SMI#

LAN_PWR_EN

EC_LID_OUT#_R

PCH_GPIO16

DGPU_PWROK_R

PCH_GPIO22

PCH_GPIO24

EC_PME#

SLP_ME_CSW_DEV#

PCH_GPIO34

PCH_GPIO35

ODD_PLUG#

PCH_GPIO37

GPIO38

PCH_GPIO39

PCH_GPIO48

GPIO49

HDD_DETECT#

UH1F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49 / TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

PANTHER-POINT_FCBGA989

GPIO

NCTF

3

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

NC_1

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

<1119>ODD_PWR change to GPIO68 .

C40

B41

C41

A40

P4

AU16

P5

AY11

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

ODD_PWR

PCH_PECI_R

EC_KBRST#

H_THERMTRIP#_C

NV_CLE

ODD_PWR <34>

1 2

@

1 2

2

+3VS

RH330

RH330 10K_0402_5%

10K_0402_5%

1 2

+3VS

RH238

RH238 10K_0402_5%

10K_0402_5%

1 2

RH240390_0402_5% RH240390_0402_5%

H_PECI <41,6>

EC_KBRST# <41>

H_CPUPWRGD <6>

H_THRMTRIP#

RH2390_0402_5%@RH2390_0402_5%

GATEA20 <41>

H_THRMTRIP# <6>

RH227 1K_0402_5%RH227 1K_0402_5%

12

131202 follow 15" CRV

This signal should be connected to

processor's UNCOREPWRGD

the input to indicate when the processor power is valid.

+1.8VS

12

RH226

2.2K_0402_5%

Layout note: C LOSE TO THE BRA NCHING POINT

ODD_PWR

PCH_GPIO16 EC_KBRST# DGPU_PWROK_R PCH_GPIO22

GPIO38

131204 SWAP

PCH_GPIO39 PCH_GPIO34 PCH_GPIO35

NMI_DBG#_CPU HDD_DETECT# EC_LID_OUT#_R HDD_DETECT#

GPIO1 GPIO6 PCH_GPIO48 GPIO49

LAN_PWR_EN

H_SNB_IVB# <6>

1 2

@

RH310 10K_0402_5%

RP10

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

RP11

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

RP13

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

RP19

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

1 2

RH311 10K_0402_5%RH311 10K_0402_5%

1

+3VS

+3V_PCH

+3VS

DB# 10/20 Reserve GPIO 36 pull up resistor an

d add pull down resistor

+3VS

10K_0402_5%

A A

RH322

RH255

12

5

ODD_PLUG#

EC_SMI#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/29 2011/06/29

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

PCH (5/8) GPIO, CPU, MISC

LA-A999P

1

18 58Friday, March 14, 2014

of

0.1

WWW.AliSaler.Com

5

4

3

2

1

+VCCP

CH17

10U_0603_6.3V6M

D D

10U_0603_6.3V6M

2

CH19

2

1U_0402_6.3V6K

1

CH17

1

CH18

CH16

2

1U_0402_6.3V6K

2011.10.18 change all cap to small size: 22u& 10u to 0603

4.7u to 0402 1u, 0.1u, 0.01u to 0201

+VCCP

12

RH264 0_0603_5%

@

+VCCP

RH297

1 2

0_0805_5%

+VCCP

0_0805_5%

+3VS

12

RH268

RH268 0_0805_5%

0_0805_5%

short@

1

CH35

0.1U_0201_16V4Z

2

Place CH53 Near AP13,AP15 pin

RH270 0_0603_5%

C C

SI# 8/8 Add RH297 for power break down

B B

Place CH35 Near AP19 pin

short@

+3VS_VCCA3GBG

@

1

CH28

2

10U_0603_6.3V6M

12

CH32

1U_0402_6.3V6K

1

2

+VCCP

CH29

1U_0402_6.3V6K

+VCCP

1

2

1

CH31

CH30

2

1U_0402_6.3V6K

+VCCAFDI_VRM

+1.05VS_VCCAPLL_FDI

RH271

1 2

+1.05VS_VCCDPLL_FDI

short@

0_0805_5%

+VCCP_VCCDMI

+VCCAPLLEXP

CH37

@ CH37

@

10U_0603_6.3V6M

UH1G

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

PANTHER-POINT_FCBGA989

13

00mA

POWER

VCC CORE

2925mA

VCCIO

FDI

1mA

CRTLVDS

1mA

VCCTX_LVDS[1]

VCCTX_LVDS[2]

60mA

VCCTX_LVDS[3]

VCCTX_LVDS[4]

20mA

DMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

190mA

VCCDFTERM[4]

DFT / SPI HVCMOS

20mA

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCSPI

U48

+VCCADAC

U47

AK36

AK37

AM37

AM38

AP36

AP37

V33

+3VS_VCC3_3_6

V34

AT16

AT20

+VCCP_VCCDMI

AB36

+1.05VS_VCC_DMI_CCI

AG16

AG17

AJ16

AJ17

V1

+3V_VCCPSPI

CH38

1U_0402_6.3V6K

+3VS

+VCCAFDI_VRM+1.05VS_VCC_EXP

1

CH20

2

+VCCTX_LVDS

1

CH26

0.1U_0201_16V4Z

2

1

CH36

2

1

2

LH1

BLM18PG181SN1D_2P

1

CH22

CH22 10U_0603_6.3V6M

10U_0603_6.3V6M

2

0.1U_0201_16V4Z

BLM18PG181SN1D_2P

1

CH21

2

0.01U_0201_16V7

12

Near AP43

1

2

RH265

1 2

0_0805_5%

1

2

+VCCPNAND

0.1U_0402_10V7K

RH272

1 2

0_0805_5%

short@

1

CH23

2

0.01U_0201_16V7

short@

+VCCP_VCCDMI

RH314

1 2

short@

0_0805_5%

CH34

1U_0402_6.3V6K

1 2

0_0805_5%

short@

+3V_PCH

Change BIOS ROM power rail to +3V_PCH

2014.01.21

1

CH24

0.01U_0201_16V7

+3VS

SI# 8/8 Change 10uH to 0805 0 ohm to follow compal common design

RH269

CH25

2

9/8 SI build BOT limit 0.8, CH25 del:SE000008L80

22U_0603_6.3V6M

add: SE000001120

1

CH33

2

+1.8VS

CH33

+VCCP

+3VS

0.1UH_MLF1608DR10KT_10%_1608

0.1UH_MLF1608DR10KT_10%_1608 LH2

LH2

12

0.1uH inductor, 200mA

+VCCP

RH266

1 2

short@

0_0805_5%

1U_0402_6.3V6K

+1.8VS

PCH Power Rail Table

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05

3.3

1.05

S0 Iccmax Current (A)

0.001

5

0.001

0.266

0.001

0.08

1.3

0.042

1.05VccIO 2.92 5

1.05VccASW 1.01

3.3VccSPI 0.02

3.3VccDSW 0.003

1.8 0.19VccpNAND

3.3VccRTC 6 uA

3.3VccSus 3_3

3.3 / 1.5VccSusHDA

0.119

0.01

VccVRM 1.8 / 1.5 0 .16

1.05VccCLKDMI

0.02

VccSSC 1.05 0.095

cc

DIFFCLKN 1.05 0.055

V

VccALVDS 3.3

0.001

1.8VccTX_ LVDS 0.06

+VCCAFDI_VRM

RH275

12

+1.5VS

A A

5

4

0_0603_5%

short@

+VCCAFDI_VRM

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/29 2011/06/29

Compal Secret Data

Deciphered Date

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

Title

Size Document Number Rev

Compal Electronics, Inc.

PCH (6/8) PWR

LA-A999P

1

of

19 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

5

1 2

RH312 0_0603_5%RH312 0_0603_5%

AO3413L_SOT23-3

3

D D

C C

B B

A A

PCH_VREG_EN#<41>

+VCCP

RH407 0_0603_5%

+VCCP

@

12

RH296 0_0603_5%short@RH296 0_0603_5%short@

+VCCP

1

2

@

+3VS

12

5

+3V_DSW+3VALW

<1122>Reserved f or deep Sx.

@

QH4

1

DGS

2

+VCCP

LH3

10UH_LB2012T100MR_20%

1 2

@

CH43

@CH43

@

10U_0603_6.3V6M

+1.05VM_VCCSUS

CH262

1U_0402_6.3V6K

+VCCP

SI# 7/29 Add RH3 07 for break down PCH VCCASW power

RH313

12

short@

0_0805_5%

1 2

LH4

10UH_LB2012T100MR_20%

1

CH65

CH65 1U_0402_6.3V6K

1U_0402_6.3V6K

2

RH298 0_0603_5%short@RH298 0_0603_5%short@

RH300 0_0603_5%short@RH300 0_0603_5 %short@

RH303 0_0603_5%short@RH303 0_0603_5%short@

10UH_LB2012T100MR_20%

@

10U_0603_6.3V6M

12

LH6

1 2

LH7

CH59

+3V_DSW

1

2

1

2

1

2

1

CH71

4.7U_0402_16V4Z

2

+VCCP

+3V_PCH

1 2

RH277 0_0603_5%@RH277 0_0603_5%@

1 2

RH309 0_0603_5%RH309 0_0603_5%

+VCCP

9/8 SI build BOT limit 0.8 del: SE000001120 add: SE000001120

RH307

0_0805_5%

SI# 8/8 Add RH31 3 for follow compal common de sign

+3VS_VCC_CLKF33

1

2

+1.05VS_VCCDIFFCLKN

CH67

CH67 1U_0402_6.3V6K

1U_0402_6.3V6K

CH69

CH69 1U_0402_6.3V6K

1U_0402_6.3V6K

+V_CPU_IO

1

2

RH283 0_0603_5%short@RH283 0_0603_5%short@

12

+VCCP_VCCASW

short@

1

CH61

2

1U_0402_6.3V6K

CH64

0.1U_0201_16V4Z

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

+1.05VS_SSCVCC

1

2

1

2

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

1

CH79

CH78

2

22U_0603_6.3V6M

1U_0402_6.3V6K

1 2

CH70

0.1U_0201_16V4Z

CH72

0.1U_0201_16V4Z

1

2

7/8 CH78, CH80 220uF change to 22uF.

4

12

@

RH276 0_0603_5%

0.1U_0201_16V4Z

CH42

@ CH42

@

0.1U_0201_16V4Z

+VCCSUS1

1

CH45

2

@

1U_0402_6.3V6K

1

CH53

2

+VCCRTCEXT

1

2

1

+RTCVCC

CH73

2

0.1U_0201_16V4Z

9/8 SI build BOT limit 0.8, CH78, CH80

1

del:SE000008L80

2

22U_0603_6.3V6M

add: SE000001120

CH81

1U_0402_6.3V6K

4

CH80

+VCCACLK

CH39

1

2

1

CH50

2

22U_0805_6.3V6M

1

CH54

2

1U_0402_6.3V6K

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

+VCCSST

+1.05VM_VCCSUS

1

CH74

2

0.1U_0201_16V4Z

1

+VCCPDSW

2

+PCH_VCCDSW

+3VS_VCC_CLKF33

+VCCAPLL_CPY_PCH

+VCCDPLL_CPY

1

CH51

2

22U_0805_6.3V6M

1

CH55

2

1U_0402_6.3V6K

+VCCAFDI_VRM

1

CH75

2

0.1U_0201_16V4Z

3

2

1

VCC3_3 = 266mA detal waiting for newest spec

VCCDMI = 42mA detal waiting for newest spec

POWER

UH1J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCDIFFCLKN[1]

AF34

VCCDIFFCLKN[2]

AG34

VCCDIFFCLKN[3]

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

1

2

PANTHER-POINT_FCBGA989

CH76

0.1U_0201_16V4Z

VCCRTC

POWER

N26

VCCIO[29]

P26

1mA

PCI/GPIO/LPCMISC

SATA USB

10mA

HDA

3

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

1mA

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

0.1U_0201_16V4Z

2011/06/29 2011/06/29

3mA

119mA

1010mA

Clock and Miscellaneous

80mA

55mA

95mA

1mA

CPURTC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

+1.05VS_VCCUSBCORE

1

2

1

2

+1.05VS_VCCAUPLL

+PCH_V5REF_SUS

+VCCA_USBSUS

+3V_VCCPSUS_1

+PCH_V5REF_RUN

+3VS_VCCPPCI

+VCC3_3_2

+VCCAFDI_VRM

+VCCSUSHDA

1

CH77

2

CH40

CH40 1U_0402_6.3V6K

1U_0402_6.3V6K

+3V_VCCPUSB

CH44

0.1U_0201_16V4Z

+3V_VCCPSUS

1

CH56

CH56 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

2

+VCCAFDI_VRM

+1.05VS_VCC_SATA

Compal Secret Data

RH285 0 _0603_5%short@RH285 0_0603_5%short@

+3V_VCCAUBG

1

CH47

2

RH286 0 _0603_5%short@RH286 0_0603_5%short@

+3VS_VCCPCORE

CH58

0.1U_0201_16V4Z

RH293

0_0603_5%

12

short@

CH62

0.1U_0201_16V4Z

+1.05VS_SATA3

+VCCSATAPLL

+1.05VS_VCC_SATA

12

@

150_0402_1%

RH306

Deciphered Date

RH281 0 _0603_5%

12

short@

12

RH282 0 _0603_5%short@RH282 0_0603_5%short@

0.1U_0201_16V4Z

1

2

1

2

+3VS

12

CH52

1

2

RH305 0_0603_5%short@RH305 0_0603_5 %short@

+VCCP

RH287

12

0_0603_5%short@

0.1U_0201_16V4Z

RH289

0_0603_5%

12

short@

RH290

12

short@

0_0805_5%

0_0603_5%

1

CH60

0.1U_0201_16V4Z

2

+1.05VS_SATA3

1

CH63

CH63 1U_0402_6.3V6K

1U_0402_6.3V6K

2

RH299

12

0_0805_5%

short@

CH68

1U_0402_6.3V6K

+VCCP

12

All the CODEC I/O Voltages need to be at the same level either 3.3 V or 1.5 V.

2

+VCCP

+3V_PCH

12

+VCCA_USBSUS

+3V_PCH

+3VS

RH292

12

short@

RH294

0_0805_5% short@

1

2

+VCCP

SI# 8/8 Delet th e RH301,RH302,R H304 for follow compal common de sign

+3V_PCH

QH3

QH3 AO3413_SOT23

RH278

0_0603_5%

short@

PCH_PWR_EN#<43>

+3V_PCH

1

@

CH48

2

1U_0402_6.3V6K

+3V_PCH

+3VS

12

+VCCP

LH5

10UH_LB2012T100MR_20%

1 2

CH66

10U_0603_6.3V6M

1U_0402_6.3V6K

@

@CH66

@

Place CH73 Near AK1 pin

Title

PCH (7/8) PWR

Size Document Number Rev

LA-A999P

Date: Sheet of

AO3413_SOT23

D

S

D

S

12

100_0402_5%

13

G

1

2

RH284

0.1U_0201_16V4Z

RH288

+VCCP

Compal Electronics, Inc.

CH49

12

DH3

12

CH41

2

+3V_PCH+5V_PCH

21

CH751H-40PT_SOD323-2

1

2

+3VS+5VS

21

DH4

CH751H-40PT_SOD323-2

1

CH57

CH57 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

+5V_PCH+5VALW

12

RH279

RH279 20K_0402_5%

20K_0402_5%

0.1U_0201_16V4Z

+PCH_V5REF_SUS

+PCH_V5REF_RUN

20 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

5

D D

C C

B B

A A

UH1H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

PANTHER-POINT_FCBGA989

4

AK38

VSS[80]

AK4

VSS[81]

AK42

VSS[82]

AK46

VSS[83]

AK8

VSS[84]

AL16

VSS[85]

AL17

VSS[86]

AL19

VSS[87]

AL2

VSS[88]

AL21

VSS[89]

AL23

VSS[90]

AL26

VSS[91]

AL27

VSS[92]

AL31

VSS[93]

AL33

VSS[94]

AL34

VSS[95]

AL48

VSS[96]

AM11

VSS[97]

AM14

VSS[98]

AM36

VSS[99]

AM39

VSS[100]

AM43

VSS[101]

AM45

VSS[102]

AM46

VSS[103]

AM7

VSS[104]

AN2

VSS[105]

AN29

VSS[106]

AN3

VSS[107]

AN31

VSS[108]

AP12

VSS[109]

AP19

VSS[110]

AP28

VSS[111]

AP30

VSS[112]

AP32

VSS[113]

AP38

VSS[114]

AP4

VSS[115]

AP42

VSS[116]

AP46

VSS[117]

AP8

VSS[118]

AR2

VSS[119]

AR48

VSS[120]

AT11

VSS[121]

AT13

VSS[122]

AT18

VSS[123]

AT22

VSS[124]

AT26

VSS[125]

AT28

VSS[126]

AT30

VSS[127]

AT32

VSS[128]

AT34

VSS[129]

AT39

VSS[130]

AT42

VSS[131]

AT46

VSS[132]

AT7

VSS[133]

AU24

VSS[134]

AU30

VSS[135]

AV16

VSS[136]

AV20

VSS[137]

AV24

VSS[138]

AV30

VSS[139]

AV38

VSS[140]

AV4

VSS[141]

AV43

VSS[142]

AV8

VSS[143]

AW14

VSS[144]

AW18

VSS[145]

AW2

VSS[146]

AW22

VSS[147]

AW26

VSS[148]

AW28

VSS[149]

AW32

VSS[150]

AW34

VSS[151]

AW36

VSS[152]

AW40

VSS[153]

AW48

VSS[154]

AV11

VSS[155]

AY12

VSS[156]

AY22

VSS[157]

AY28

VSS[158]

3

UH1I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

PANTHER-POINT_FCBGA989

2

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

1

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/29 2011/06/29

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (8/8) VSS

LA-A999P

1

0.1

21 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

1

2

3

4

5

+3VGS

UV1A

Part 1 of 5

PEX_RX0 PEX_RX0_N PEX_RX1 PEX_RX1_N PEX_RX2 PEX_RX2_N PEX_RX3 PEX_RX3_N PEX_RX4 PEX_RX4_N PEX_RX5 PEX_RX5_N PEX_RX6 PEX_RX6_N PEX_RX7 PEX_RX7_N NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC

PEX_TX0 PEX_TX0_N PEX_TX1 PEX_TX1_N PEX_TX2 PEX_TX2_N PEX_TX3 PEX_TX3_N PEX_TX4 PEX_TX4_N PEX_TX5 PEX_TX5_N PEX_TX6 PEX_TX6_N PEX_TX7 PEX_TX7_N NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC

PEX_REFCLK PEX_REFCLK_N

PEX_TSTCLK_OUT PEX_TSTCLK_OUT_N

PEX_TERMP

PEX_RST_N

PEX_CLKREQ_N

N15V-GM

@DIS

C6

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9

GPIO10

GPIO

GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21

DACA_HSYNC DACA_VSYNC

DACA_RED

DACA_BLUE

DACA_GREEN

DACA_VREF DACA_RSET

JTAG_TCK

JTAG_TDI JTAG_TDO JTAG_TMS

JTAG_TRST_N

PCI EXPRESS

TEST

TESTMODE

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

I2CC_SCL

I2C DACA

I2CC_SDA

I2CS_SCL

I2CS_SDA

XTAL_SSIN

XTAL_OUTBUFF

XTAL_OUT

CLK

XTAL_IN

SI 11/05 change RV182.1

ange to +3VGS from GPU_PWR_EN

ch

GPU_GPIO0

B2 D6 C7 F9 A3 A4

GPU_GPIO6

B6 A6

GPU_GPIO8

F8

GPU_GPIO9

C5 E7

NVVDD_PWM_VID

D7

GPU_PWR_LEVEL#

B4

NVVDD_PSI

B3 C3 D5 D4 C2 F7 E6 C4

AE3 AE4

AG3 AF3 AF4

AE2 AF2

AE5

GPU_JTAG_TCK

AE6 AF6 AD6 AG4

GPU_JTAG_TRST

AD9

TESTMODE

B7

I2CA_SCL

A7

I2CA_SDA

C9

I2CB_SCL

C8

I2CB_SDA

A9

I2CC_SCL

B9

I2CC_SDA

D9

I2CS_SCL

D8

I2CS_SDA

A10

XTALSSIN

C10

XTALOUT

B10

XTAL_OUT

C11

XTALIN

AB6

NC

D10

NC

E9

NC

GPU_CLKREQ#<15>

RV191 0_0402_5%DIS@RV191 0_0402_5%DIS@

T1402T1402 T1403T1403 T1404T1404

1 2

RV14 2.2K_0402_5%DIS@RV14 2.2K_0402_5%DIS@

1 2

RV15 2.2K_0402_5%DIS@RV15 2.2K_0402_5%DIS@

1 2

RV21 2.2K_0402_5%DIS@RV21 2.2K_0402_5%DIS@

1 2

RV22 2.2K_0402_5%DIS@RV22 2.2K_0402_5%DIS@

Internal Thermal Sensor

+3VGS

RV23 10K_0402_5%DIS@RV23 10K_0402_5%DIS@

RV25 10K_0402_5%DIS@RV25 10K_0402_5%DIS@

RV58 10K_0402_5%DIS@RV58 10K_0402_5%DIS@

1 2

CV17

@ CV17

@

0.1U_0402_16V7K

1 2

RV182

12

RV184

RV184 10K_0402_5%

10K_0402_5%

@

12

RV186

RV186 10K_0402_5%

10K_0402_5%

DIS@

AG6 AG7 AF7 AE7 AE9 AF9 AG9

AG10

AF10 AE10 AE12

AF12 AG12 AG13

AF13

AE13

AE15

AF15 AG15 AG16

AF16

AE16

AE18

AF18 AG18 AG19

AF19

AE19

AE21

AF21 AG21 AG22

AC9 AB9

AB10 AC10 AD11 AC11 AC12

AB12

AB13 AC13 AD14 AC14 AC15

AB15

AB16 AC16 AD17 AC17 AC18

AB18

AB19 AC19 AD20 AC20 AC21

AB21 AD23

AE23

AF24

AE24 AG24 AG25

AE8 AD8

AF22

AE22

AF25

AC7

AC6

PLT_RST_VGA#

DIS@

1 2

0_0402_5%@

PEG_HTX_C_GRX_P0 PEG_HTX_C_GRX_N0 PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_N1 PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_P3 PEG_HTX_C_GRX_N3 PEG_HTX_C_GRX_P4 PEG_HTX_C_GRX_N4 PEG_HTX_C_GRX_P5 PEG_HTX_C_GRX_N5 PEG_HTX_C_GRX_P6 PEG_HTX_C_GRX_N6 PEG_HTX_C_GRX_P7 PEG_HTX_C_GRX_N7

PEX_TSTCLK_OUT PEX_TSTCLK_OUT#

PEX_TERMP

PLT_RST_VGA#

GPU_CLKREQ#_R

+3VGS +3VGS

5

1

P

B

2

A

G

3

DIS@

PEG_GTX_HRX_P0 PEG_GTX_HRX_N0 PEG_GTX_HRX_P1 PEG_GTX_HRX_N1 PEG_GTX_HRX_P2 PEG_GTX_HRX_N2 PEG_GTX_HRX_P3 PEG_GTX_HRX_N3 PEG_GTX_HRX_P4 PEG_GTX_HRX_N4 PEG_GTX_HRX_P5 PEG_GTX_HRX_N5 PEG_GTX_HRX_P6 PEG_GTX_HRX_N6 PEG_GTX_HRX_P7 PEG_GTX_HRX_N7

UV11

4

Y

PEG_HTX_C_GRX_P0<5> PEG_HTX_C_GRX_N0<5> PEG_HTX_C_GRX_P1<5>

<CPU>

A A

PEG_GTX_C_HRX_P0<5> PEG_GTX_C_HRX_N0<5> PEG_GTX_C_HRX_P1<5>

<CPU>

B B

PEG_GTX_C_HRX_N1<5> PEG_GTX_C_HRX_P2<5> PEG_GTX_C_HRX_N2<5> PEG_GTX_C_HRX_P3<5> PEG_GTX_C_HRX_N3<5> PEG_GTX_C_HRX_P4<5> PEG_GTX_C_HRX_N4<5> PEG_GTX_C_HRX_P5<5> PEG_GTX_C_HRX_N5<5> PEG_GTX_C_HRX_P6<5> PEG_GTX_C_HRX_N6<5> PEG_GTX_C_HRX_P7<5> PEG_GTX_C_HRX_N7<5>

<CPU>

PEG_GTX_C_HRX_P0 PEG_GTX_C_HRX_N0 PEG_GTX_C_HRX_P1 PEG_GTX_C_HRX_N1 PEG_GTX_C_HRX_P2 PEG_GTX_C_HRX_N2 PEG_GTX_C_HRX_P3 PEG_GTX_C_HRX_N3 PEG_GTX_C_HRX_P4 PEG_GTX_C_HRX_N4 PEG_GTX_C_HRX_P5 PEG_GTX_C_HRX_N5 PEG_GTX_C_HRX_P6 PEG_GTX_C_HRX_N6 PEG_GTX_C_HRX_P7 PEG_GTX_C_HRX_N7

CLK_PCIE_GPU<15> CLK_PCIE_GPU#<15>

Differential signal

C C

PLT_RST#<17,33,35,40,41,6>

DGPU_HOLD_RST#<17,41>

Controlled by EC "AND" PCH

D D

PEG_HTX_C_GRX_N1<5> PEG_HTX_C_GRX_P2<5> PEG_HTX_C_GRX_N2<5> PEG_HTX_C_GRX_P3<5> PEG_HTX_C_GRX_N3<5> PEG_HTX_C_GRX_P4<5> PEG_HTX_C_GRX_N4<5> PEG_HTX_C_GRX_P5<5> PEG_HTX_C_GRX_N5<5> PEG_HTX_C_GRX_P6<5> PEG_HTX_C_GRX_N6<5> PEG_HTX_C_GRX_P7<5> PEG_HTX_C_GRX_N7<5>

CV1 0.22U_0402_6.3V6KDIS@CV1 0.22U_0402_6.3V6KDIS@ CV2 0.22U_0402_6.3V6KDIS@CV2 0.22U_0402_6.3V6KDIS@ CV3 0.22U_0402_6.3V6KDIS@CV3 0.22U_0402_6.3V6KDIS@ CV4 0.22U_0402_6.3V6KDIS@CV4 0.22U_0402_6.3V6KDIS@ CV5 0.22U_0402_6.3V6KDIS@CV5 0.22U_0402_6.3V6KDIS@ CV6 0.22U_0402_6.3V6KDIS@CV6 0.22U_0402_6.3V6KDIS@ CV7 0.22U_0402_6.3V6KDIS@CV7 0.22U_0402_6.3V6KDIS@ CV8 0.22U_0402_6.3V6KDIS@CV8 0.22U_0402_6.3V6KDIS@ CV25 0.22U_0402_6.3V6KDIS@CV25 0.22U_0402_6.3V6KDIS@ CV13 0.22U_0402_6.3V6KDIS@CV13 0.22U_0402_6.3V6KDIS@ CV15 0.22U_0402_6.3V6KDIS@CV15 0.22U_0402_6.3V6KDIS@ CV14 0.22U_0402_6.3V6KDIS@CV14 0.22U_0402_6.3V6KDIS@ CV18 0.22U_0402_6.3V6KDIS@CV18 0.22U_0402_6.3V6KDIS@ CV19 0.22U_0402_6.3V6KDIS@CV19 0.22U_0402_6.3V6KDIS@ CV11 0.22U_0402_6.3V6KDIS@CV11 0.22U_0402_6.3V6KDIS@ CV16 0.22U_0402_6.3V6KDIS@CV16 0.22U_0402_6.3V6KDIS@

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

1 2

RV26 200_0402_1%

1 2

RV27 2.49K_0402_1%DIS@RV27 2.49K_0402_1%DIS@

RV183

PLT_RST#

TC7SH08FUF_SSOP5

#9/2 , Add RV191 between. GPU_PWR_LEVEL# and GPU_THERMAL_DET#

1 2

NVVDD_PWM_VID <56>

GPU_THERMAL_DET# <41>

NVVDD_PSI <56>

CHECK!!

#8/19 ,N15V-GM didn't support GC6, unpop QV13 ,QV14.

131127 SWAP Pin of RV36.1, RV36.2 & RV36.4 by layout requested

#08/22,unused I2C change to pull-down.

1

2

10K_0402_5%

DIS@

CV12

0.01U_0402_16V7K

CV12

0.01U_0402_16V7K

1

DIS@

2

1 3

QV10

QV10 2N7002K_SOT23-3

2N7002K_SOT23-3

1 2

RV188 0_0402_5%

+3VGS

2

G

D

S

D

S

DIS@

@

12

GPU_CLKREQ#_RDGPU_HOLD_RST#

RV187

RV187 10K_0402_5%

10K_0402_5%

@

GPU_CLKREQ#_R GPU_JTAG_TCK GPU_JTAG_TRST TESTMODE

RV36

DIS@ RV36

DIS@

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

+3VGS

I2CS_SCL

I2CS_SDA

<1118>change to standard part.

Security Classification

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/07/01

Compal Secret Data

Deciphered Date

4

GPU_PWR_LEVEL#

GPU_GPIO6

NVVDD_PSI

GPU_GPIO8

GPU_GPIO9

GPU_GPIO0

I2CB_SDA I2CB_SCL I2CC_SDA I2CC_SCL

RV49 10K_0402_5%DIS@RV49 10K_0402_5%DIS@

#08/22,unused I2C change to pull-down.

+3VGS

5

2N7002KDWH_SOT363-6

1 2

RV13 0_0402_5%@RV13 0_0402_5%@

2

QV2A

61

2N7002KDWH_SOT363-6

1 2

RV20 0_0402_5%@RV20 0_0402_5%@

XTALDIS@

1 2

RV24 10M_0402_5%

XTALDIS@

YV1

1

CV9

CV9 10P_0402_25V8K

10P_0402_25V8K

2

XTALDIS@

GND

2

27MHZ 10PF X3G027000DA1H

SJ10000GI00

SJ10000CV00 cost is better.

Title

Size Document Number Rev

Custom

Date: Sheet of

1 2

RV62 100K_0402_5%DIS@RV62 100K_0402_5%DIS@

1 2

RV43 10K_0402_5%DIS@RV43 10K_0402_5%DIS@

1 2

RV44 10K_0402_5%DIS@RV44 10K_0402_5%DIS@

1 2

RV46 10K_0402_5%DIS@RV46 10K_0402_5%DIS@

1 2

RV48 10K_0402_5%DIS@RV48 10K_0402_5%DIS@

1 2

RV16

DIS@ RV16

DIS@

1 8 2 7 3 6 4 5

2.2K_0804_8P4R_5%

QV2B

DIS@QV2B

DIS@

DIS@QV2A

DIS@

34

EC_SMB_CK2 <15,41>

EC_SMB_DA2 <15,41>

PU AT EC SIDE, +3VS AND 4.7K

3

XTAL_OUTXTALIN

3

GND

4

Compal Electronics, Inc.

N15V-GM PCIE/DAC/GPIO

1

CV10

CV10 10P_0402_25V8K

10P_0402_25V8K

2

XTALDIS@

LA-A999P

5

22 58Friday, March 14, 2014

0.1

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1

UV1C

AC3

IFPA_TXC

AC4

IFPA_TXC_N

Y4

IFPA_TXD0

Y3

A A

B B

C C

D D

IFPA_TXD0_N

AA3

IFPA_TXD1

AA2

IFPA_TXD1_N

AB1

IFPA_TXD2

AA1

IFPA_TXD2_N

AA4

IFPA_TXD3

AA5

IFPA_TXD3_N

AB5

IFPB_TXC

AB4

IFPB_TXC_N

AB3

IFPB_TXD4

AB2

IFPB_TXD4_N

AD3

IFPB_TXD5

AD2

IFPB_TXD5_N

AE1

IFPB_TXD6

AD1

IFPB_TXD6_N

AD4

IFPB_TXD7

AD5

IFPB_TXD7_N

N4

IFPC_AUX_I2CW_SCL

N5

IFPC_AUX_I2CW_SDA_N

T2

IFPC_L0

T3

IFPC_L0_N

T1

IFPC_L1

R1

IFPC_L1_N

R2

IFPC_L2

R3

IFPC_L2_N

N2

IFPC_L3

N3

IFPC_L3_N

P3

IFPD_AUX_I2CX_SCL

P4

IFPD_AUX_I2CX_SDA_N

V3

IFPD_L0

V4

IFPD_L0_N

U3

IFPD_L1

U4

IFPD_L1_N

T4

IFPD_L2

T5

IFPD_L2_N

R4

IFPD_L3

R5

IFPD_L3_N

J2

IFPE_AUX_I2CY_SCL

J3

IFPE_AUX_I2CY_SDA_N

N1

NC

M1

NC

M2

NC

M3

NC

K2

NC

K3

NC

K1

NC

J1

NC

H3

IFPF_AUX_I2CZ_SCL

H4

IFPF_AUX_I2CZ_SDA_N

M4

NC

M5

NC

L3

NC

L4

NC

K4

NC

K5

NC

J4

NC

J5

NC

N15V-GM

DIS@

2

Part 3 of 5

3

D1

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

BUFRST_N

THERMDN THERMDP

GENERAL STRAPSERIAL

ROM_CS_N

ROM_SCLK

ROM_SI

LVDS / TMDS

ROM_SO

IFPAB_RSET

IFPC_RSET

IFPD_RSET

NC_G1 NC_G2 NC_G3 NC_G4 NC_G5 NC_G6 NC_G7

NC_V1 NC_V2 NC_V5 NC_V6

NC_W1 NC_W2 NC_W3 NC_W4

STRAP0

D2

STRAP1

E4

STRAP2

E3

STRAP3

D3

STRAP4

C1

NC

DIS@

D11

E12 F12

D12

C12

B12

A12

AA6

T6

U6

K6

NC

AD10

NC

AD7

NC

B19

NC

G1 G2 G3 G4 G5 G6 G7

V1 V2 V5 V6

W1 W2 W3 W4

E10

NC

F10

NC

1 2

RV28 100K_0402_5 %

ROM_CS

ROM_SCLK

ROM_SI

ROM_SO

RV29 10K_0402_5%

DIS@

1 2

STRAP0 <29> STRAP1 <29> STRAP2 <29> STRAP3 <29> STRAP4 <29>

ROM_SCLK <29>

ROM_SI <29>

ROM_SO <29>

+3VGS

4

5

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/07/12 2012/07/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

B

Date: Sheet of

4

Date: Sheet

Compal Electronics, Inc.

N15V-GM LVDS/HDMI/DP/THM

LA-A999P

5

of

23 5 8Friday, March 14, 2014

0.1

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1

+1.5VGS

CV28

0.1U_0402_10V7K

CV20

1

DIS@CV28

DIS@

DIS@CV20

DIS@

2

A A

+1.05VGS

Reference circuit: 1uF *2

4.7uF*1 10uF*2 22uF*2

Reference circuit: 1uF *2

B B

+3VGS

+1.05VGS

C C

4.7uF*1 10uF*2 22uF*2

1 2

RV34 0_0402_5%

short@

RV45 0_0402_5%

short@

1 2

CV70

DIS@CV70

DIS@

CV75

1

DIS@CV75

DIS@

2

CV71

0.1U_0402_10V7K

1

DIS@CV71

DIS@

2

CV76

1U_0402_6.3V6K

0.1U_0402_10V7K

1

DIS@CV76

DIS@

2

+PEX_3V3_NV

4.7U_0603_6.3V6K

CV72

1

DIS@CV72

DIS@

2

+PEXPLL_VDD

CV77

4.7U_0603_6.3V6K

1

DIS@CV77

DIS@

2

CV51

DIS@CV51

DIS@

CV58

DIS@CV58

DIS@

4.7U_0603_6.3V6K

CV53

4.7U_0603_6.3V6K

CV52

1U_0402_6.3V6K

1

DIS@CV52

DIS@

2

1U_0402_6.3V6K

CV59

1

DIS@CV59

DIS@

2

CV54

1U_0402_6.3V6K

1

DIS@CV53

DIS@

DIS@CV54

DIS@

2

1U_0402_6.3V6K

CV60

4.7U_0603_6.3V6K

CV61

1

DIS@CV60

DIS@

DIS@CV61

DIS@

2

+1.05VGS

#8/19,LV1 change to Z=30 ohm , RDC=0.05 SM01000F100

PCB Footprint = R_0402

2

CV22

1U_0402_6.3V6K

0.1U_0402_10V7K

1

2

10U_0805_6.3V6M

<SI> LV1 use R_0402 footprint

1U_0402_6.3V6K

CV21

1U_0402_6.3V6K

CV23

1

DIS@CV22

DIS@

DIS@CV21

DIS@

CV55

1

DIS@CV55

DIS@

2

CV62

1

DIS@CV62

DIS@

2

DGPU_GC6_EN<18>

DIS@CV23

DIS@

2

Reference circuit:

0.1uF *2 1 uF*2

4.7uF*2 10uF*1 22uF*1

CV57

10U_0805_6.3V6M

CV56

22U_0805_6.3V6M

1

DIS@CV57

DIS@

DIS@CV56

DIS@

2

CV63

22U_0805_6.3V6M

CV69

10U_0805_6.3V6M

1

DIS@CV63

DIS@

DIS@CV69

DIS@

2

DIS@

LV1

LV1 BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

1 2

1

2

22U_0805_6.3V6M

4.7U_0603_6.3V6K

short@

CV29

10U_0603_6.3V6M

CV24

4.7U_0603_6.3V6K

CV26

22U_0805_6.3V6M

1

DIS@CV24

DIS@

2

1 2

RV47 0_0402_5%

1

DIS@CV29

DIS@

DIS@CV26

DIS@

2

+PEX_3V3_NV +PEX_3V3_NV

+PEXPLL_VDD

+GPU_SP_PLLVDD

+GPU_PLLVDD

CV73

0.1U_0402_10V7K

CV74

22U_0805_6.3V6M

1

DIS@CV73

DIS@

DIS@CV74

DIS@

2

+FB_PLLAVDD

+FB_CAL_PD_VDDQ

FB_CLAMP

W21

AA10 AA12 AA13 AA16 AA18 AA19 AA20 AA21 AB22 AC23 AD24 AE25 AF26 AF27

AA22 AB23 AC24 AD25 AE26 AE27

AA14 AA15

B26 C25 E23 E26 F14 F21 G13 G14 G15 G16 G18 G19 G20 G21 H24 H26 J21 K21 L22 L24 L26 M21 N21 R21 T21 V21

AA8 AA9

N6

M6

L6 F16 P22 H22

W5

D22

F3

Part 4 of 5

FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD

PEX_PLL_HVDD PEX_PLL_HVDD

PEX_PLLVDD PEX_PLLVDD VID_PLLVDD SP_PLLVDD CORE_PLLVDD FB_PLLAVDD FB_PLLAVDD FB_DLLAVDD

DACA_VDD

FB_CAL_PD_VDDQ

FB_CLAMP

DIS@

3

POWER

VDD_SENSE

VDD33 VDD33 VDD33 VDD33

PEX_SVDD_3V3

IFPA_IOVDD IFPB_IOVDD IFPC_IOVDD IFPD_IOVDD

IFPAB_PLLVDD IFPAB_PLLVDD

IFPC_PLLVDD IFPC_PLLVDD

IFPD_PLLVDD IFPD_PLLVDD

N15V-GM

UV1D

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

4

K10 K12 K14 K16 K18 L11 L13 L15 L17 M10 M12 M14 M16 M18 N11 N13 N15 N17 P10 P12 P14 P16 P18 R11 R13 R15 R17 T10 T12 T14 T16 T18 U11 U13 U15 U17 V10 V12 V14 V16 V18

F2

G10 G12 G8 G9

F11

NC

AB8

W6 Y6 P6 R6 H6

NC

J6

NC

V7 W7

M7 N7

R7 T7

J7

NC

K7

NC

+VGA_CORE

Power :VDD_SENSE & GND_SENSE

VCCSENSE_VGA

Remove IFPC_PLLVDD,IFPD_PLLVDD,IFPC_IOVDD,IFPD_IOVDD,IFPAB_PLLVDD,+DACA_VDD,IFPA_IOVDD

VCCSENSE_VGA <56>

CV65

CV64

0.1U_0402_10V7K

1

DIS@CV65

DIS@

DIS@CV64

DIS@

2

0.1U_0402_10V7K

CV66

0.1U_0402_10V7K

1

DIS@CV66

DIS@

2

Differential signal

short@ RV30

CV67

DIS@CV67

DIS@

short@

1U_0402_6.3V6K

CV68

4.7U_0603_6.3V6K

1

DIS@CV68

DIS@

2

1 2

RV30

0_0603_5%

+3VGS

5

DIS@

LV3

LV3 BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

+1.05VGS

DG : LV3 ->Z=180 ohm , RDC=0.2 ohm.0603

DG:LV4->Z=30 ohm , RDC=0.01 ohm.0603

+1.05VGS

D D

1 2

LV4

DIS@LV4

DIS@

BLM18PG121SN1D_0603

1 2

1

CV82

1

DIS@CV82

DIS@

2

CV91

0.1U_0402_10V7K

CV90

1

DIS@CV91

DIS@

DIS@CV90

DIS@

2

+GPU_SP_PLLVDD

CV83

0.1U_0402_10V7K

CV84

4.7U_0603_6.3V6K

CV85

22U_0805_6.3V6M

0.1U_0402_10V7K

1

DIS@CV83

DIS@

2

+FB_PLLAVDD

0.1U_0402_10V7K

CV88

0.1U_0402_10V7K

1

DIS@CV88

DIS@

2

22U_0805_6.3V6M

1

DIS@CV84

DIS@

DIS@CV85

DIS@

2

CV89

22U_0805_6.3V6M

1

DIS@CV89

DIS@

2

+1.5VGS

#7/27 Follow DG to chenge R

1591 to 40.2 ohm

DIS@

1 2

RV50 40.2_0402_1%

+FB_CAL_PD_VDDQ

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/07/01

Compal Secret Data

Deciphered Date

4

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

N15V-GM POWER

LA-A999P

5

24 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

1

UV1E

Part 5 of 5

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

N15V-GM

DIS@

Part 5 of 5

GND

FB_CAL_PU_GND

FB_CAL_TERM_GND

MULTI_STRAP_REF0_GND

GND_SENSE

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

L10 L12 L14 L16 L18 L2 L23 L25 L5 M11 M13 M15 M17 N10 N12 N14 N16 N18 P11 P13 P15 P17 P2 P23 P26 P5 R10 R12 R14 R16 R18 T11 T13 T15 T17 U10 U12 U14 U16 U18 U2 U23 U26 U5 V11 V13 V15 V17 Y2 Y23 Y26 Y5 AB7

1 2

C24

B25

F6 F4

NC

F5

NC

F1

DIS@

RV67 42.2_0402_1%

1 2

DIS@

RV68 51.1_0402_1%

1 2

RV70

@RV70

@

VSSSENSE_VGA

Power :VDD_SENSE & GND_SENSE

Differential signal

40.2K_0402_1%

AA7

A2

A26 AB11 AB14 AB17 AB20 AB24

AC2 AC22 AC26

A A

B B

AD12 AD13 AD15 AD16 AD18 AD19 AD21 AD22 AE11 AE14 AE17 AE20

AF11 AF14 AF17 AF20 AF23

AG26

AC5

AC8

AF1

AF5 AF8

AG2

B1 B11 B14 B17 B20 B23 B27

B5

B8 E11 E14 E17

E2 E20 E22 E25

E5

E8

H2 H23 H25

H5 K11 K13 K15 K17

Power on

DGPU_PWR_EN

+3VGS

+VGA_CORE

C C

DGPU_PWROK

+1.05VGS

+1.5VGS

40us < Rt < 2ms

DGPU_PWROK<18,56>

D D

2

#8/19.RV70 unpop , N15V-GM use binary mode.

VSSSENSE_VGA <56>

Contrl by power

DIS@ CV81

DIS@

10U_0603_6.3V6M

DIS@

DGPU_PWROKDGPU_PWROK

#08/20 Don't support GC6,Add RV66. Unpop QV16,RV41,RV42,CV78.

RV66

1 2

47K_0402_5%

CV81

+1.5VS

+1.5VGS=3.6A,8vias.

2

+1.5V to +1.5VGS

1

2

+5VALW

1

CV78

0.01U_0603_50V7K

2

3

4

@CV78

@

3

J3

@J3

@

112

JUMP_43X118

DIS@

QV15

VIN VIN

ON

VBIAS

TPS22967DSGR_SON8_2X2

+1.5VGS+1.5VGS_GPU

#8/19.QV15 change to TPS22967

7

VOUT

8

VOUT

6

CT

5

GND

9

GND

+1.5VGS_GPU

1

DIS@

CV183

100P_0402_50V8J

2

4

5

#8/20 : N15V-GM don't support GC6 function. UV20 unpop.

+1.05VGS=1.6A,4vias.

J2

2

JUMP_43X79

@J2

@

112

+1.05VGS+1.05V_GPU

+3VALW to +3VGS

DIS@

+1.05V_GPU

+3VGS

+1.05V to +1.05VGS

+VCCP

+3VALW

RV92

DGPU_PWROK

DGPU_PWR_EN<17,41,56>

+5VALW

DGPU_PWR_EN

RV92

DIS@

20K_0402_5%

DIS@

QV12

1

VOUT1

VIN1

2

VOUT1

VIN1

3

4

5

6 7

CT1

ON1

GND

VBIAS

ON2

CT2

VIN2

VOUT2

VIN2

VOUT2

GPAD

TPS22966DPUR_SON14_2X3-D

14 13

12

1 2

CV181 680P_0402_50V7K

11

10

1 2

CV182 100P_0402_50V8J

9 8

15

+3VGS=0.5A,2vias.

+1.05VGS

RC370

RC370 18_0402_5%

18_0402_5%

SD028180A80

1 2

34

DIS@

5

QV17B

QV17B DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

DIS@

RV210

DIS@

100K_0402_5%

2

+3VALW

12

6

DIS@

QV17A

QV17A DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

1

DIS@

1

CV80

CV79

DIS@

1U 6.3V K X5R 0402

10U_0603_6.3V6M

2

DIS@

1

CV86

CV87

2

47U_0805_6.3V6M

DGPU_PWROK

PV# 2013.01.08 Add +1.05VGS discharge circuit

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/07/01

Compal Secret Data

Deciphered Date

4

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

N15V-GM VGA CORE, GND

LA-A999P

5

25 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

1

PU for X16 mode

UV1B

Part 2 of 5

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FB_VREF_PROBE

FBA_CLK0 FBA_CLK0_N

FBA_CLK1 FBA_CLK1_N

N15V-GM

DIS@

Part 2 of 5

MEMORY INTERFACE

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_WCK01

FBA_WCK01_N

FBA_WCK23

FBA_WCK23_N

FBA_WCK45

FBA_WCK45_N

FBA_WCK67

FBA_WCK67_N

FBA_DEBUG0 FBA_DEBUG1

E18

T1405T1405

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8

MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

CLKA0

CLKA0#

CLKA1

CLKA1#

AA24

AA23 AD27 AB25 AD26 AC25 AA27 AA26

W26

W27 W25

F18 E16 F17 D20 D21 F20 E21 E15 D15 F15 F13 C13 B13 E13 D13 B15 C16 A13 A15 B18 A18 A19 C19 B24 C23 A25 A24 A21 B21 C20 C21 R22 R24 T22 R23 N25 N26 N23 N24 V23 V22 T23 U22 Y24

Y22

Y25 R26 T25 N27 R27 V26 V27

D23

D24 D25

N22 M22

A A

B B

C C

MDA0<27> MDA1<27> MDA2<27> MDA3<27> MDA4<27> MDA5<27> MDA6<27> MDA7<27> MDA8<27> MDA9<27> MDA10<27> MDA11<27> MDA12<27> MDA13<27> MDA14<27> MDA15<27> MDA16<27> MDA17<27> MDA18<27> MDA19<27> MDA20<27> MDA21<27> MDA22<27> MDA23<27> MDA24<27> MDA25<27> MDA26<27> MDA27<27> MDA28<27> MDA29<27> MDA30<27> MDA31<27> MDA32<28> MDA33<28> MDA34<28> MDA35<28> MDA36<28> MDA37<28> MDA38<28> MDA39<28> MDA40<28> MDA41<28> MDA42<28> MDA43<28> MDA44<28> MDA45<28> MDA46<28> MDA47<28> MDA48<28> MDA49<28> MDA50<28> MDA51<28> MDA52<28> MDA53<28> MDA54<28> MDA55<28> MDA56<28> MDA57<28> MDA58<28> MDA59<28> MDA60<28> MDA61<28> MDA62<28> MDA63<28>

CLKA0<27>

CLKA0#<27>

CLKA1<28>

CLKA1#<28>

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31

FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7

C27 C26 E24 F24 D27 D26 F25 F26 F23 G22 G23 G24 F27 G25 G27 G26 M24 M23 K24 K23 M27 M26 M25 K26 K22 J23 J25 J24 K27 K25 J27 J26

D19 D14 C17 C22 P24 W24 AA25 U25

F19 C14 A16 A22 P25 W22 AB27 T27

E19 C15 B16 B22 R25 W23 AB26 T26

D18 C18 D17 D16 T24 U24 V24 V25

F22 J22

2

CMDA0

Dummy

CMDA2 CMDA3 CMDA4 CMDA5 CMDA6 CMDA7 CMDA8 CMDA9 CMDA10 CMDA11 CMDA12 CMDA13

mmy

Du

CMDA15 CMDA16

Dummy

CMDA18 CMDA19 CMDA20 CMDA21 CMDA22 CMDA23 CMDA24 CMDA25 CMDA26 CMDA27 CMDA28 CMDA29 CMDA30

DQMA0 DQMA1 DQMA2 DQMA3 DQMA4 DQMA5 DQMA6 DQMA7

DQSA#0 DQSA#1 DQSA#2 DQSA#3 DQSA#4 DQSA#5 DQSA#6 DQSA#7

DQSA0 DQSA1 DQSA2 DQSA3 DQSA4 DQSA5 DQSA6 DQSA7

1 2

RV137 60.4_0402_1%@RV137 60.4_0402_1%@

1 2

RV138 60.4_0402_1%@RV138 60.4_0402_1%@

CMDA0 <27>

CMDA2 <27> CMDA3 <27> CMDA4 <27,28> CMDA5 <27,28> CMDA6 <27,28> CMDA7 <27,28> CMDA8 <27,28> CMDA9 <27,28> CMDA10 <27,28> CMDA11 <27,28> CMDA12 <27,28> CMDA13 <27,28>

CMDA15 <27,28> CMDA16 <28>

CMDA18 <28> CMDA19 <28> CMDA20 <27,28> CMDA21 <27,28> CMDA22 <27,28> CMDA23 <27,28> CMDA24 <27,28> CMDA25 <27,28> CMDA26 <27,28> CMDA27 <27,28> CMDA28 <27,28> CMDA29 <27,28> CMDA30 <27,28>

DQMA0 <27> DQMA1 <27> DQMA2 <27> DQMA3 <27> DQMA4 <28> DQMA5 <28> DQMA6 <28> DQMA7 <28>

DQSA#0 <27> DQSA#1 <27> DQSA#2 <27> DQSA#3 <27> DQSA#4 <28> DQSA#5 <28> DQSA#6 <28> DQSA#7 <28>

DQSA0 <27> DQSA1 <27> DQSA2 <27> DQSA3 <27> DQSA4 <28> DQSA5 <28> DQSA6 <28> DQSA7 <28>

+1.5VGS

3

4

5

Note: DG use 1%

DIS@

12

CMDA2

RV169

10K_0402_1%

DIS@

10K_0402_1%

DIS@

RV170

DIS@

RV185

DIS@

RV189

DIS@

RV190

12

CMDA18

12

CMDA3

12

CMDA19

12

CMDA5

Mode D Command Mapping

Address

FBx_CMD1

FBx_CMD2

FBx_CMD3

FBx_CMD4

FBx_CMD5

FBx_CMD6

FBx_CMD7

FBx_CMD8

FBx_CMD9

FBx_CMD10

FBx_CMD11

FBx_CMD12

FBx_CMD13

RANK 0

0..31

CS0#FBx_CMD0

ODT

CKE

A14

RST

A9

A7

A2

A0 A0

A4

A1

BA0

WE#

32..63

A14

RST

A9

A7

A2

A4

A1

BA0

WE#

FBx_CMD14

CAS#

FBx_CMD15

FBx_CMD16

CAS#

CS0#

FBx_CMD17

A13

A8

A6

A11

A5

A3

BA2

A12

RAS#

ODT

CKE

A13

A8

A6

A11

A5

A3

BA2

BA1BA1

A12

A10A10

RAS#

FBx_CMD18

FBx_CMD19

FBx_CMD20

FBx_CMD21

FBx_CMD22

FBx_CMD23

FBx_CMD24

FBx_CMD25

FBx_CMD26

FBx_CMD27

FBx_CMD28

FBx_CMD29

FBx_CMD30

D D

Security Classification

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/07/01

Compal Secret Data

Deciphered Date

4

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

N15V-GM MEM Interface

LA-A999P

5

26 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

1

Memory Partition A RANK 0

+1.5VGS

RV139

1.33K_0402_1%

DIS@

A A

RV140

1.33K_0402_1%

DIS@

CLKA0

12

RV141

RV141 162_0402_1%

162_0402_1%

DIS@

CLKA0#

#8/19 , change CLK

mination to 162 ohm.

ter

B B

160 ohm:SD00000XP00

C C

D D

12

H:Group 1 L:Group 2

+1.5VGS

+FBA_VREF0

CV96

0.01U_0402_16V7K

1

DIS@CV96

DIS@

2

CV97

0.1U_0402_16V7K

2

DIS@CV97

DIS@

1

+FBA_VREF0

CMDA9 CMDA11 CMDA8 CMDA25 CMDA10 CMDA24 CMDA22 CMDA7 CMDA21 CMDA6 CMDA29 CMDA23 CMDA28 CMDA20 CMDA4

CMDA12 CMDA27 CMDA26

CLKA0<26> CLKA0#<26>

DQSA2<26> DQSA1<26>

DQMA2< 26> DQMA1< 26>

DQSA#2<26> DQSA#1<26>

L

CV98

0.1U_0402_16V7K

CV99

0.1U_0402_16V7K

2

DIS@CV98

DIS@

DIS@CV99

DIS@

1

CLKA0 CLKA0# CMDA3

CMDA2 CMDA0 CMDA30 CMDA15 CMDA13

DQSA2 DQSA1

DQMA2 DQMA1

DQSA#2 DQSA#1

CMDA5

RV145

RV145 243_0402_1%

243_0402_1%

DIS@

Closed to UV12

CV101

CV100

0.1U_0402_16V7K

2

DIS@CV101

DIS@

DIS@CV100

DIS@

1

M8 H1

N3

N2

R8 R2

R3

R7 N7

M7

M2 N8 M3

C7

D3

G3

12

CV102

1U_0402_6.3V6K

0.1U_0402_16V7K

1

DIS@CV102

DIS@

2

Rank 0

UV12

X76@

UV12

X76@

VREFCA VREFDQ

A0

P7

A1

P3

A2 A3

P8

A4

P2

A5 A6 A7

T8

A8 A9

L7

A10/AP A11 A12

T3

A13

T7

A14 A15/BA3

BA0 BA1 BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL DQSU

E7

DML DMU

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

CV103

1U_0402_6.3V6K

CV104

1

DIS@CV103

DIS@

DIS@CV104

DIS@

2

3

4

MDA[0..63] <26,28>

CMDA[30..0] <26,28>

5

Data0~Data31

Rank 0

UV14

X76@

UV14

E3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

CV105

1U_0402_6.3V6K

1

DIS@CV105

DIS@

2

MDA19

F7

MDA21

F2

MDA16

F8

MDA22

H3

MDA18

H8

MDA23

G2

MDA17

H7

MDA20

D7

MDA10

C3

MDA13

C8

MDA11

C2

MDA14

A7

MDA8

A2

MDA15

B8

MDA9

A3

MDA12

+1.5VGS

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

CV106

1U_0402_6.3V6K

1

DIS@CV106

DIS@

2

Group 2

Group 1

L:Group 0 H:Group 3

+1.5VGS

CV118

DIS@CV118

DIS@

+FBA_VREF0

CMDA9 CMDA11 CMDA8 CMDA25 CMDA10 CMDA24 CMDA22 CMDA7 CMDA21 CMDA6 CMDA29 CMDA23 CMDA28 CMDA20 CMDA4

CMDA12 CMDA27 CMDA26

CLKA0 CLKA0# CMDA3

CMDA2 CMDA0 CMDA30 CMDA15 CMDA13

CMDA5

RV150

243_0402_1%

DIS@

Closed to UV14

L

CV120

0.1U_0402_16V7K

CV121

2

DIS@CV120

DIS@

DIS@CV121

DIS@

1

DQSA0 DQSA3

DQMA0 DQMA3

DQSA#0 DQSA#3

12

0.1U_0402_16V7K

2

1

CV122

0.1U_0402_16V7K

2

DIS@CV122

DIS@

1

DQSA0<26> DQSA3<26>

DQMA0< 26> DQMA3< 26>

DQSA#0<26> DQSA#3<26>

0.1U_0402_16V7K

CV119

0.1U_0402_16V7K

2

DIS@CV119

DIS@

1

X76@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

CV123

1U_0402_6.3V6K

CV124

1U_0402_6.3V6K

1

DIS@CV123

DIS@

DIS@CV124

DIS@

2

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

CV125

DIS@CV125

DIS@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

1

2

E3

MDA4

F7

MDA0

F2

MDA5

F8

MDA2

H3

MDA7

H8

MDA1

G2

MDA6

H7

MDA3

D7

MDA31

C3

MDA27

C8

MDA30

C2

MDA25

A7

MDA28

A2

MDA26

B8

MDA29

A3

MDA24

+1.5VGS

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

CV126

1U_0402_6.3V6K

CV127

1U_0402_6.3V6K

1

DIS@CV126

DIS@

DIS@CV127

DIS@

2

Group 0

Group 3

Mode D Command Mapping

Address

FBx_CMD1

FBx_CMD2

FBx_CMD3

FBx_CMD4

FBx_CMD5

FBx_CMD6

FBx_CMD7

FBx_CMD8

FBx_CMD9

FBx_CMD10

FBx_CMD11

FBx_CMD12

FBx_CMD13

FBx_CMD14

FBx_CMD15

FBx_CMD16

FBx_CMD17

FBx_CMD18

FBx_CMD19

FBx_CMD20

FBx_CMD21

FBx_CMD22

FBx_CMD23

FBx_CMD24

FBx_CMD25

FBx_CMD26

FBx_CMD27

FBx_CMD28

FBx_CMD29

FBx_CMD30

RANK 0

0..31

CS0#FBx_CMD0

ODT

CKE

A14

RST

A9

A7

A2

A0 A0

A4

A1

B

A0

WE#

CAS#

A13

A8

A6

A11

A5

A3

BA2

A12

RAS#

32..63

A14

RST

A9

A7

A2

A4

A1

BA0

WE#

CAS#

CS0#

ODT

CKE

A13

A8

A6

A11

A5

A3

BA2

BA1BA1

A12

A10A10

RAS#

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/07/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

4

Date: Sheet of

Compal Electronics, Inc.

N15V-GM VRAM A Lower

LA-A999P

5

27 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

1

2

3

4

5

+1.5VGS

12

RV152

1.33K_0402_1%

DIS@

A A

RV153

1.33K_0402_1%

DIS@

12

RV154

162_0402_1%

DIS@

B B

#8/19 , change CLK termination to 162 ohm.

C C

D D

12

CLKA1

CLKA1#

L:Group 4 H:Group 7

+FBA_VREF1

CV138

0.01U_0402_16V7K

1

DIS@CV138

DIS@

2

+1.5VGS

CLKA1<26> CLKA1#<26>

DQSA4<26> DQSA7<26>

DQMA4<26> DQMA7<26>

DQSA#4<26> DQSA#7<26>

CV139

0.1U_0402_16V7K

CV140

0.1U_0402_16V7K

2

DIS@CV139

DIS@

DIS@CV140

DIS@

1

Memory Partition A RANK 0 32 bits

Rank 0

Data32~Data63

UV16

X76@

UV16

+FBA_VREF1

RV155

RV155 243_0402_1%

243_0402_1%

DIS@

L

CV141

0.1U_0402_16V7K

2

DIS@CV141

DIS@

1

CMDA9 CMDA11 CMDA8 CMDA25 CMDA10 CMDA24 CMDA22 CMDA7 CMDA21 CMDA6 CMDA29 CMDA23 CMDA28 CMDA20 CMDA4

CMDA12 CMDA27 CMDA26

CLKA1 CLKA1#

CMDA19

CMDA18 CMDA16 CMDA30 CMDA15 CMDA13

DQSA4 DQSA7

DQMA4 DQMA7

DQSA#4 DQSA#7

CMDA5

12

Closed to UV16

CV143

0.1U_0402_16V7K

CV142

0.1U_0402_16V7K

2

DIS@CV143

DIS@

DIS@CV142

DIS@

1

X76@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

310mA

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

CV144

1U_0402_6.3V6K

CV145

1U_0402_6.3V6K

1

DIS@CV144

DIS@

DIS@CV145

DIS@

2

E3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

CV146

1U_0402_6.3V6K

1

DIS@CV146

DIS@

2

MDA35

F7

MDA37

F2

MDA34

F8

MDA39

H3

MDA32

H8

MDA38

G2

MDA33

H7

MDA36

D7

MDA56

C3

MDA60

C8

MDA58

C2

MDA61

A7

MDA57

A2

MDA63

B8

MDA59

A3

MDA62

+1.5VGS

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

CV148

1U_0402_6.3V6K

CV147

1U_0402_6.3V6K

1

DIS@CV148

DIS@

DIS@CV147

DIS@

2

Group 4

Group 7

L:Group 6 H:Group 5

DQSA6<26> DQSA5<26>

DQMA6<26> DQMA5<26>

DQSA#6<26> DQSA#5<26>

+1.5VGS

+FBA_VREF1

RV162

RV162 243_0402_1%

243_0402_1%

DIS@

CV160

0.1U_0402_16V7K

2

DIS@CV160

DIS@

1

Rank 0

UV18

X76@

UV18

X76@

M8

VREFCA

H1

VREFDQ

N3

CMDA9 CMDA11 CMDA8 CMDA25 CMDA10 CMDA24 CMDA22 CMDA7 CMDA21 CMDA6 CMDA29 CMDA23 CMDA28 CMDA20 CMDA4

CMDA12 CMDA27 CMDA26

CLKA1 CLKA1#

CMDA19

CMDA18 CMDA16 CMDA30 CMDA15 CMDA13

DQSA6 DQSA5

DQMA6 DQMA5

DQSA#6 DQSA#5

CMDA5

CV161

0.1U_0402_16V7K

2

DIS@CV161

DIS@

1

12

CV162

0.1U_0402_16V7K

2

DIS@CV162

DIS@

1

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

Closed to UV18

L

CV164

0.1U_0402_16V7K

CV163

0.1U_0402_16V7K

2

DIS@CV164

DIS@

DIS@CV163

DIS@

1

E3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

CV165

1U_0402_6.3V6K

1

DIS@CV165

DIS@

2

MDA52

F7

MDA49

F2

MDA53

F8

MDA50

H3

MDA54

H8

MDA48

G2

MDA55

H7

MDA51

D7

MDA44

C3

MDA40

C8

MDA46

C2

MDA41

A7

MDA45

A2

MDA43

B8

MDA47

A3

MDA42

+1.5VGS

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

CV167

1U_0402_6.3V6K

CV166

1U_0402_6.3V6K

1

DIS@CV167

DIS@

DIS@CV166

DIS@

2

Group 6

Group 5

CV169

1U_0402_6.3V6K

CV168

1U_0402_6.3V6K

1

DIS@CV169

DIS@

DIS@CV168

DIS@

2

MDA[0..63] <26,27>

CMDA[30..0] <26,27>

Mode D Command Mapping

Address

FBx_CMD1

FBx_CMD2

FBx_CMD3

FBx_CMD4

FBx_CMD5

FBx_CMD6

FBx_CMD7

FBx_CMD8

FBx_CMD9

FBx_CMD10

FBx_CMD11

FBx_CMD12

FBx_CMD13

FBx_CMD14

FBx_CMD15

FBx_CMD16

FBx_CMD17

FBx_CMD18

FBx_CMD19

FBx_CMD20

FBx_CMD21

FBx_CMD22

FBx_CMD23

FBx_CMD24

FBx_CMD25

FBx_CMD26

FBx_CMD27

FBx_CMD28

FBx_CMD29

FBx_CMD30

RANK 0

0..31

CS0#FBx_CMD0

ODT

CKE

A14

RST

A9

A7

A2

A0 A0

A4

A1

BA0

WE#

CAS#

A13

A8

A6

A11

A5

A3

BA2

A12

RAS#

32..63

A14

RST

A9

A7

A2

A4

A1

BA0

WE#

CAS#

CS0#

ODT

CKE

A13

A8

A6

A11

A5

A3

BA2

BA1BA1

A12

A10A10

RAS#

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/12 2012/07/01

Compal Secret Data

Deciphered Date

4

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

N15V-GM VRAM C Lower

LA-A999P

5

28 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

1

Check Strap pin status

STRAP0<23> STRAP1<23> STRAP2<23>

A A

STRAP3<23> STRAP4<23>

Check SPI pin status

ROM_SI<23> ROM_SO<23> ROM_SCLK<23>

B B

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

ROM_SI ROM_SO ROM_SCLK

12

RV164

RV164 10K_0402_5%

10K_0402_5%

X76@

12

RV171

RV171 10K_0402_5%

10K_0402_5%

X76@

12

RV176

RV176 10K_0402_5%

10K_0402_5%

@

12

RV179

RV179 10K_0402_5%

10K_0402_5%

DIS@

12

RV165

RV165 10K_0402_5%

10K_0402_5%

X76@

12

RV172

RV172 10K_0402_5%

10K_0402_5%

X76@

12

RV177

RV177 10K_0402_5%

10K_0402_5%

@

12

RV180

RV180 10K_0402_5%

10K_0402_5%

DIS@

+3VGS

2

12

RV166

RV166 10K_0402_5%

10K_0402_5%

X76@

12

RV173

RV173 10K_0402_5%

10K_0402_5%

X76@

12

RV178

RV178 10K_0402_5%

10K_0402_5%

@

12

RV181

RV181 10K_0402_5%

10K_0402_5%

DIS@

12

RV167

RV167 10K_0402_5%

10K_0402_5%

X76@

12

RV174

RV174 10K_0402_5%

10K_0402_5%

X76@

+3VGS

12

RV168

RV168 10K_0402_5%

10K_0402_5%

@

RV175

RV175 10K_0402_5%

10K_0402_5%

DIS@

ZZZ

SAM@

1G SAMSUNG

X7654132L21

3

ZZZ

MIC@

1G MICRON

X7654132L23

ZZZ

HY@

1G HYNIX

X7654132L22

4

Table 123

Strap pin Name

ROM_SCLK

ROM_SI

ROM_SO

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

SMBUS_ALT_ADDR

0

1

Strap Mapping

SMB_ALT_ADDR

SUB_VENDOR

VGA_DEVICE

RAM_CFG[0]

RAM_CFG[1]

RAM_CFG[2]

RAM_CFG[3]

PCIE_MAX_SPEED

0x9E (Default)

0x

9C (Multi-GPU usage)

Resistance

SUB_VENDOR

0

1

VGA_DEVICE

0

Non-Primary 3D Acceleration Device(Class Code 302h)(Default)

1

Pr

imary Display or VGA Device .

PCIE_MAX_SPEED

0

Limit to PCIE Gen1

1

PC

IE Gen 2/3 Capable

10K

K

10

10K

Disable (Default)

5

Polarity Logical

Pull-down to GND.

Strapping Bit0

Pull-down to GND if no VBIOS ROM.

Pull-down to GND(no diaplay).

Pull-down to GND(PCIE Gen1).

GPU VRAM size Compal VRAM P/NDescription

ZSO40

N15V-GM (23x23) 64bit (One CH single rank)

ZSO50

CH VRAM descriptionProject

CHA

128M(X16) CHA DDR3 Micron 128Mx16 1.5V MT41J128M16JT-093G:K 1000MHz

128M(X16) CHA DDR3 Samsung 128Mx16 1.5V K4W2G1646E-BC1A 1000MHz

SA00006H400

SA000067500

A000068U00

S

H5T

ROM CFG setup

C2G63FFR-11C 1000MHz128M(X16) DDR3 Hynix 128Mx16 1.5V

[3...0]

1100

00

01

0101

M_CFG R P/N

RA

RV171+RV172+RV167+RV166

RV164+RV172+RV173+RV174

RV164+RV172+RV166+RV174

#9/5 RAM_CFG follow RVL-06891-001 table 1. Dule Rank layout with single Rank population.

C C

D D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

USER Straps

User[3:0]

1000-1100

2011/07/12 2012/07/01

Customer defined

Compal Secret Data

Deciphered Date

4

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

N15V-GM MISC

LA-A999P

5

29 58Friday, March 14, 2014

1.0

WWW.AliSaler.Com

5

1

2

RG3 0_0402_5%short@RG3 0_0402_5%short@

1 2

@R259

@

1 2

EC_BKOFF#

LVDS Pow er

5

IN

4

SS

APL3512_SOT23-5

1 2

0_0402_5%

12

R167

R167 10K_0402_5%

10K_0402_5%

UG1

1

OUT

2

GND

3

EN

INVTPWM

@

1 2

R166 33_0402_5%R166 33_0402_5%

12

R163

R163 10K_0402_5%

10K_0402_5%

DISPOFF#

+3VS

D D

C C

W=60mils W=60mils

CG1

1500P_0402_50V7K

PCH_ENVDD<16>

EC_INVT_PWM<41>

DPST_PWM<16 >

EC_BKOFF#<41>

R259

R258 0_0402_5%short@R258 0_0402_5%short@

LVDS SKU

1 2

R168 0_0402_5%LVDS@R168 0_0402_5%LVDS@

1 2

R169 0_0402_5%LVDS@R169 0_0402_5%LVDS@

RP36

4 5 3 6 2 7 1 8

0_0804_8P4R_5%

RP37

4 5 3 6 2 7 1 8

0_0804_8P4R_5%

SD309000080

LVDS@

LVDS_TXP0_CONN LVDS_TXN0_CONN LVDS_TXP1_CONN LVDS_TXN1_CONN

SD309000080

LVDS@

LVDS_TXP2_CONN

LVDS_TXN2_CONN LVDS_CLKP_CONN LVDS_CLKN_CONN

LCD_CLK

LCD_DATA

131203 SWAP

LVDS_TXP0<16>

LVDS_TXN0<16>

LVDS_TXP1<16>

LVDS_TXN1<16>

LVDS_TXP2<16>

LVDS_TXN2<16>

LVDS_CLKP<16>

LVDS_CLKN<16>

LCD_EDID_CLK LCD_EDID_DATA

LCD_EDID_CLK<16>

LCD_EDID_DATA<16>

B B

eDP SKU

1 2

EDP_CPU_LANE_P0_C<5> EDP_CPU_LANE_N0_C<5>

EDP_CPU_AUX_C<5> EDP_CPU_AUX#_C<5>

CC100 .1U_0402_16V7KeDP@CC10 0 .1U_0402_16V 7KeDP@

1 2

CC103 .1U_0402_16V7KeDP@CC10 3 .1U_0402_16V 7KeDP@

1 2

CC102 .1U_0402_16V7KeDP@CC10 2 .1U_0402_16V 7KeDP@

1 2

CC101 .1U_0402_16V7KeDP@CC10 1 .1U_0402_16V 7KeDP@

<1114>Follow AMD eDP pin assignment.

A A

EDP_HPD#<5>

EDP_HPD#

2N7002K_SOT23

5

QTS3

eDP@

13

D

S

2

EDP_HPD_PANEL

G

LVDS_TXP2_CONN LVDS_TXN2_CONN

LCD_CLK LCD_DATA

eDP@

12

RTS3

RTS3 100K_0402_5%

100K_0402_5%

1

CG2

4.7U_0603_6.3V6K

2

4

3

Touch Screen Power

+LCDVDD

0.1U_0402_16V7K

0.1U_0402_16V7K CG3

CG3

1

2

+VCC_TOUCH

0.1U_0402_16V4Z

1

CTS1

2

@EMI@

Camera

USB20_N8<17>

USB20_P8<17>

@EMI@

R170 0_0402_5%

R171 0_0402_5%

@EMI@

D_MIC_L_CLK

D_MIC_L_DATA

<DB>LA1/LA2 closed to Aduio codec

D_MIC_CLK<37> D_MIC_DATA<37>

D_MIC_DATA D_ MIC_L_DATA

TS_GPIO_CPU<18>

TS_GPIO_EC<41>

Touch Screen

D6

USB20_N10_R

USB20_P10_R USB20_N10_R

4

2

1

3

PESD5V0U2BT_SOT23-3

@ESD@ SCA00000U10

USB20_P10<17>

USB20_N10<17>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

12

RTS1

RTS1 1K_0402_5%

1K_0402_5%

CTS2

1 2

0.047U_0402_16V7K

123

DGS

1 2

L12

EMI@L12

EMI@

1

4

WCM-2012-900T_4P

1 2

D3

2

3

PESD5V0U2BT_SOT23-3

@ESD@ SCA00000U10

LA1 F BMA-L10-160808-301LMT_2P

1 2 1 2

LA2 0_0402_5%

TS_GPIO_CPU TS_GPIO

TS_GPIO_EC

0.047U_0402_16V7K

QTS2

QTS2 S TR LP2301ALT1G 1P SOT-23-3

S TR LP2301ALT1G 1P SOT-23-3

2

3

1

EMI@

D_MIC_L_CLKD_MIC_CLK

short@

R260

R261

@EMI@

R173 0_0402_5%

1

4

R174 0_0402_5%

@EMI@

2013/02/26 2015/07/08

QTS1

2N7002K_SOT23

+3VS

<1125>change power rail.

USB20_N8_R

USB20_P8_R

1 2

@R260

@

0_0402_5%

1 2

short@R261

short@

0_0402_5%

1 2

L13

EMI@L13

EMI@

1

4

WCM-2012-900T_4P

1 2

2

3

Compal Secret Data

+3VALW

12

RTS2

RTS2 100K_0402_5%

100K_0402_5%

13

D

G

S

USB20_P8_R

USB20_N8_R

USB20_P10_R

Deciphered Date

2

TOUCH_ON# <41>

D5

2

3

PESD5V0U2BT_SOT23-3

@ESD@ SCA00000U10

INVPWR_B+

+VCC_TOUCH

+3VS

2

1

DISPOFF# INVTPWM TS_GPIO

60mils

INVPWR_B+ B+

1

C4620

2

C4620 68P_0402_50V8J

68P_0402_50V8J

2

C121 220P_0 402_50V7KC121 220P_0402 _50V7K

C122 220P_0 402_50V7KC122 220P_0402 _50V7K

CONN@

JLVDS1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

STARC_107K40-000001-G2

C117

@EMI@ C 117

@EMI@

680P_0402_50V7K

LCD/LED PANEL Conn.

+LCDVDD

LCD_CLK LCD_DATA

LVDS_TXP0_CONN LVDS_TXN0_CONN

LVDS_TXP1_CONN LVDS_TXN1_CONN

LVDS_TXP2_CONN LVDS_TXN2_CONN

LVDS_CLKP_CONN LVDS_CLKN_CONN

USB20_N8_R USB20_P8_R

USB20_P10_R USB20_N10_R

D_MIC_L_CLK D_MIC_L_DATA

EDP_HPD_PANEL

131202 Follow 15" CRV

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

LVDS Connector

1

@EMI@

12

L10_0805_5%

0_0805_5%@EMI@L20_0805_5%@EMI@

12

L2

SM010014520 3000ma 220ohm@100mhz DCR 0.04

12

41

G1

42

G2

43

G3

44

G4

45

G5

46

G6

LA-A992P

1

W=60milsW=

INVTPWM

DISPOFF#

30 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

5

4

3

2

1

12

10P_0402_50V8J

1

CM27

2

+3VS

2

61

QG1A

QG1A 2N7002K DW_SOT363 -6

2N7002K DW_SOT363 -6

5V Level

PCH_DDP B_CLK HDMI_SCLK

PCH_DDP B_DAT

20K_0402_5%

HP_DETE CT

12

RG56

1

CM17

@

220P_04 02_50V7K

2

+3VS

5

QG2B

2N7002D WH_SOT363 -6

SB00000 DH00

HDMI Conn.

JHDMI1

HP_DETE CT

+HDMI_5V_ OUT

HDMI_SDAT A HDMI_SCLK

HDMI_R_CK -

HDMI_R_CK + HDMI_R_D0 -

HDMI_R_D0 + HDMI_R_D1 -

HDMI_R_D1 + HDMI_R_D2 -

HDMI_R_D2 +

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11 10

9 8 7 6 5 4 3 2 1

GND

CK_shield

GND

CK+

GND

D0-

GND D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+

CONCR_0 99AKAC19NBLC NF

CONN@

34

+3VS

2

2N7002D WH_SOT363 -6

SB00000 DH00 QG2A

SB00000 DH00

20 21 22 23

QG2A

61

HDMI_SDAT A

1 2

CG270.1U_040 2_16V7K CG270.1U_0402 _16V7K

1 2

CG280.1U_040 2_16V7K CG280.1U_0402 _16V7K

1 2

CG290.1U_040 2_16V7K CG290.1U_0402 _16V7K

1 2

CG300.1U_040 2_16V7K CG300.1U_0402 _16V7K

1 2

CG310.1U_040 2_16V7K CG310.1U_0402 _16V7K

1 2

CG320.1U_040 2_16V7K CG320.1U_0402 _16V7K

1 2

CG330.1U_040 2_16V7K CG330.1U_0402 _16V7K

1 2

CG340.1U_040 2_16V7K CG340.1U_0402 _16V7K

1 8

2 7

3 6

4 5

RP3

RP3 680_080 4_8P4R_5%

680_080 4_8P4R_5%

<1125>change to 680 ohm.

@EMI@

OUT

GND

3

2

3

2

3

2

3

2

3

2

3

2

3

2

W=40mils

HDMI_R_CK +PCH_DPB _P3_C

HDMI_R_D0 -PCH_DPB _N0_C

HDMI_R_D1 +PC H_DPB_P1_C

HDMI_R_D2 +PC H_DPB_P2_C

+HDMI_5V_ OUT

CG46

0.1U_040 2_16V7K

1

2

1 8

2 7

3 6

4 5

RP4

RP4 680_080 4_8P4R_5%

680_080 4_8P4R_5%

+3VS

PCH_DPB _P0_C PCH_DPB _N0_C

PCH_DPB _P1_C PCH_DPB _N1_C

PCH_DPB _P2_C PCH_DPB _N2_C

PCH_DPB _P3_C PCH_DPB _N3_C

2N7002K DW_SOT363 -6

QG1B

3

5

+HDMI_5V_ OUT

+3VS

@ESD@

HP_DETE CT

HDMI_SDAT A

HDMI_SCLK

4

DG1

1

2

4

5

3

8

RG105

1 8 2 7 3 6 4 5

2.2K_080 4_8P4R_5%

SC30000 2800

IP4292CZ1 0-TB

10

9

7

65

9

HP_DETE CT

8

HDMI_SDAT A

7

HDMI_SCLK

6

PCH_DDP B_HPD<16>

HDMI_SDAT A HDMI_SCLK PCH_DDP B_DAT PCH_DDP B_CLK

1M_0402 _5%

PCH_DDP B_CLK< 16>

PCH_DDP B_DAT<16 >

@

CM26

RG47

@

10P_0402_50V8J

1

2

CMMI21T-90 0Y-N

EMI@

LM13

LM14

EMI@ LM14

EMI@

CMMI21T-90 0Y-NSM0700 03K00

CMMI21T-90 0Y-N

EMI@

LM15

CMMI21T-90 0Y-N

EMI@

LM16

+5VS

PCH_DPB _P0 PCH_DPB _N0

PCH_DPB _P1 PCH_DPB _N1

PCH_DPB _P2 PCH_DPB _N2

PCH_DPB _P3 PCH_DPB _N3

RG59 0_0402 _5%

4

1

RG60 0_0402 _5%

RG61 0_0402 _5%

1

4

RG63 0_0402 _5%

RG64 0_0402 _5%@EM I@R G64 0_0402 _5%@E MI@

4

1

RG65 0_0402_5 %

RG66 0_0402_5 %@EMI@RG 66 0 _0402_5%@EMI@

4

1

RG70 0_0402 _5%

FG1

1

IN

AP2330W-7_SC59-3

1 2

4

1

1 2

1

4

1 2

4

1

1 2

4

1

1 2

PCH_DPB _P0< 16> PCH_DPB _N0<16 >

<CPU>

D D

C C

B B

A A

PCH_DPB _P1< 16> PCH_DPB _N1<16 >

PCH_DPB _P2< 16> PCH_DPB _N2<16 >

PCH_DPB _P3< 16> PCH_DPB _N3<16 >

SM07000 3K00

PCH_DPB _N3_C HDMI_R_CK-

PCH_DPB _P0_C HDMI_R_D0 +

SM07000 3K00

PCH_DPB _N1_C HDMI_R_D1-

SM07000 3K00

PCH_DPB _N2_C HDMI_R_D2-

5

Security Class ification

2011/06/ 29 2011/06/ 29

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/ 29 2011/06/ 29

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HDMI Conn/Level shift

LA-A999P

1

0.1

31 58Friday, March 14, 2014

WWW.AliSaler.Com

5

D D

4

CRT_DDC_DATA<16>

CRT_DDC_CLK<16>

3

<1125>change R to 2.2K.

+3VS

CRT_DDC_DATA CRT_DATA

5

2N7002DWH_SOT363-6

QG3B

2N7002DWH_SOT363-6

SB00000DH00

2

34

SB00000DH00

61

QG3A

R4101

2.2K_0402_5%

+HDMI_5V_OUT

R4102

2.2K_0402_5%

1 2

CRT_CLKCRT_DDC_CLK

2

@ESD@

DT4

SC3

00001G00

+HDMI_5V_OUT

CRT_DATA

CRT_R_2 CRT_G_2

+HDMI_5V_OUT

6

5

4

AZC099-04S.R7G_SOT23-6

DT3

6

5

4

AZC099-04S.R7G_SOT23-6

I/O4

VDD

I/O3

I/O4

VDD

I/O3

@ESD@

@ESD@ SC300001G00

SC300001G00

3

I/O2

2

GND

1

I/O1

3

I/O2

2

GND

1

I/O1

1

CRT_VSYNC_2CRT_HSYNC_2

CRT_CLK

CRT_B_2

C C

CRT_R<16>

CRT_G<16>

CRT_B<16>

131126 SWAP RP22.1 & RP22.2 by layout requested

B B

A A

RP22

150_0804_8P4R_1%

HSYNC<16>

VSYNC<16>

18

CRT_G

27

CRT_B

36

CRT_R

45

HSYNC

VSYNC

CRT_G

CRT_B

1 2

CT27 0.1U_0402_16V4ZCT27 0.1U_0402_16V4Z

RGB Trace m ust less than 2000mils.

CRB1.0 use 33ohm @100Mhz Bead

10P_0402_50V8J

C4126

1 2

1

C4127

@

2

+HDMI_5V_OUT

5

1

P

A2Y

G

3

1

@

2

OE#

1

@

2

CT25 0.1U_0402_16V4ZCT25 0.1U_0402_16V4Z

L4103

KC FBMA-L10-160808-600LMT

1 2

L4104

KC FBMA-L10-160808-600LMT

1 2

L4105

KC FBMA-L10-160808-600LMT

1 2

10P_0402_50V8J

C4128

UT2

UT2 74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

4

+HDMI_5V_OUT

5

1

P

OE#

A2Y

G

UT4

UT4 74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

3

EMI@

RT26

10K_0402_5%

4

CRT Connector

JCRT1

6

11

CRT_R_2CRT_R

CRT_G_2

CRT_B_2

10P_0402_50V8J

1

C4129

@

2

12

CRT_HSYNC_1

CRT_VSYNC_1

+HDMI_5V_OUT

1

C4130

@

2

W=40mils

C4131

2

LT14 33_0402_5%LT14 33_0402_5%

LT15 33_0402_5%LT15 33_0402_5%

@

1 2

1

2

C4132

0.1U_0402_16V4Z@C4132

0.1U_0402_16V4Z

CRT_DATA

CRT_HSYNC_2

+HDMI_5V_OUT CRT_VSYNC_2

CRT_CLK

10P_0402_50V8J

1 7

12

2 8

13

3 9

14

4

10

16

G

15

17

G

5

C-H_13-12201560CP

CONN@

DC060006E00

CRT_HSYNC_2

CRT_VSYNC_2

1

@

CT28

CT26

2

10P_0402_50V8J

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

Compal Secret Data

2011/06/30 2013/06/30

Deciphered Date

Compal Electronics, Inc.

Title

CRT

Size Document Number Rev

Custom 0.1

LA-A999P

Date: Sheet of

1

32 58Friday, March 14, 2014

WWW.AliSaler.Com

5

D D

C C

BT_ON_EC<41>

MC_WAKE#<44>

EC_PCIE_WAKE#<41>

E51TXD_P80DATA<41>

E51RXD_P80CLK<41>

1 2

RC160

1K_0402_1%

4

+3VS_WLAN

RN13

12

0_0201_5%short@

MINI1_CLKREQ#<15>

CLK_PCIE_MINI1#<15>

CLK_PCIE_MINI1<15 >

PCIE_PRX_DTX_N1<15>

PCIE_PRX_DTX_P1<15>

PCIE_PTX_C_DRX_N1<15>

PCIE_PTX_C_DRX_P1<15>

E51TXD_P80DATA E51RXD_P80CLK

E51RXD_P80CLKBT_ON_EC

BT_ON_EC

R216

R216 100K_0402_5%

100K_0402_5%

1 2

12

RN3

RN3 10K_0402_5%

10K_0402_5%

3

JMINI1

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

BELLW_80053-1021

CONN@

GND2

2

+3VS_WLAN+1.5VS_WLAN

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

12

RN7

4.7K_0402_5%

+3VS_WLAN

WL_OFF# PLT_RST#

WL_OFF# <15> PLT_RST# <17,22,35,40,41,6>

+3VS_WLAN

USB20_N9 <17> USB20_P9 <17>

MINI1_LED# <41>

1

+1.5VS +1.5VS_WLAN

RN1

@RN1

B B

+3VS_WLAN_R

R271

@R271

@

1 2

0_0805_5%

A A

5

@

1 2

0_0603_5%

+3VS_WLAN

@

1

CN2

4.7U_0603_6.3V6K

2

1

CN1

4.7U_0603_6.3V6K

2

@

0.1U_0402_16V7K

0.1U_0402_16V7K CN3

CN3

1

2

Security Classification

2013/02/26 2015/07/08

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/02/26 2015/07/08

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

WLAN

LA-A999P

0.1

33 5 8Friday, March 14, 2014

1

WWW.AliSaler.Com

5

Change to dual load switch for ODD and WLAN

+5VS+5VALW

+3VALW

D D

ODD_PWR<18>

WL_PWREN _EC<41>

ODD_PWR

WL_PWREN _EC

Reserve SATA Redriver

C C

ReSATA@

1 2

R103 0_ 0603_5%

PCH side

+3VS_SATA_RE

B B

A A

+3VS_SATA_RE+3VS

SATA_PTX_R1_DRX_P0 SATA_PTX_R1_DRX_N0

SATA_PRX_R1_DTX_P0 SATA_PRX_R1_DTX_N0

B_PRE1 A_PRE1

R143 10 K_0402_5%@ R143 10K_0402_5%@

12

11/29 emphasis=1, 1==>R145/R152

ReSATA@

R145

R145 10K_0402_5%

10K_0402_5%

1 2

R146 10K_0402_5%

10K_0402_5%

1 2

5

+3VS_SATA_RE

@R146

@

1 2

3

4

5

6 7

1 2

Q22

VOUT1

VIN1

VOUT1

VIN1

CT1

ON1

GND

VBIAS

ON2

CT2

VIN2

VOUT2

VIN2

VOUT2

GPAD

TPS22966DPUR_SON14_2X3-D

SATA_PRX_DTX_P0 SATA_PRX_DTX_N0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0

ReSATA@

R136

R136 10K_0402_5%

10K_0402_5%

ReSATA@

U71

7

EN

1

A_INp

2

A_INn

5

B_OUTp

4

B_OUTn

17

B_PRE1

19

A_PRE1

18

TEST

3

GND

13

GND

21

EPAD

PS8520BTQFN20GTR2_TQFN20_4X4

R147 10K_0402_5%

10K_0402_5%

1 2

R149 10K_0402_5%

10K_0402_5%

1 2

14 13

12

1 2

C555 100P_0 402_50V8JC 555 100P_0402_50V8J

11

1 2

10

C558 680P_0 402_50V7KC558 680P_0402 _50V7K

9 8

15

0_0804_8P4R_5%

1 8 2 7 3 6 4 5

RP38

NORESATA@

6

VDD

16

VDD

10

NC

20

REXT

9

A_PRE0

8

B_PRE0

15

A_OUTp

14

A_OUTn

11

B_INp

12

B_INn

+3VS_SATA_RE

@R147

@

1 2

A_PRE0 B_PRE0A_PRE1B_PRE1

@R149

@

1 2

R150 10K_0402_5%

10K_0402_5%

R151 10K_0402_5%

10K_0402_5%

4

SATA_PRX_R_DTX_P0 SATA_PRX_R_DTX_N0 SATA_PTX_R_DRX_N0 SATA_PTX_R_DRX_P0

SD309000080

A_PRE0 B_PRE0

SATA_PTX_R_DRX_P0 SATA_PTX_R_DRX_N0

SATA_PRX_R_DTX_P0 SATA_PRX_R_DTX_N0

@R150

@

@R151

@

4

10U_0603_6.3V6M

22U_0805_6.3V6M

C576

CC134

1

2

10U_0603_6.3V6M

1

2

C571

CC134

@

+3VS_WLAN_R

1

2

+5VS_ODD

<MV>Add 22UF for RF suggestion ,4/10.

131203 SWAP pin of PR38 by layout requested

+3VS_SATA_RE

ReSATA@

1 2

R4610

4.99K_0402_1%

ReSATA@

1 2

1

C46

@ C 46

@

0.1U_0402_10V6K

2

11/25 add R4610 4.99k -> Parade review

Co

nnector side

R152

R152 10K_0402_5%

10K_0402_5%

R153

@R153

@

10K_0402_5%

2

C4619

@

0.01U_0402_25V7K

1

Need Vendor check value

3

2

2.5" SATA HDD connector

+5VS

R201

R212

1 2

C155 0.01U_0402 _16V7KC155 0.01U_ 0402_16V7K

SATA_PTX_R_DRX_N0 SATA_PT X_C_DRX_N0

SATA_PRX_R_DTX_N0 SATA_PR X_C_DTX_N0

ReSATA@

1 2

C157 0.01U_0402 _16V7K

SATA_PRX_DTX_N0<14>

SATA_PRX_DTX_P0<14>

SATA_PTX_DRX_P0<14> SATA_PTX_DRX_N0<1 4>

SATA_PTX_DRX_P2<14> SATA_PTX_DRX_N2<1 4>

SATA_PRX_DTX_N2<14> SATA_PRX_DTX_P2<14>

C157 0.01U_0402 _16V7K

1 2

C158 0.01U_0402 _16V7K

ReSATA@

ReSATA@ ReSATA@

ReSATA@

1 2

C159 0.01U_0402 _16V7K

1 2

C160 0.01U_0402 _16V7K

ReSATA@

1 2

C156 0.01U_0402 _16V7KC156 0.01U_ 0402_16V7K

1 2

C153 0.01U_0402 _16V7KC153 0.01U_ 0402_16V7K

1 2

C154 0.01U_0402 _16V7KC154 0.01U_ 0402_16V7K

+3VS

CS11 0.01U_0402_16V7KCS11 0.01U_0402_16V 7K CS14 0.01U_0402_16V7KCS14 0.01U_0402_16V 7K

CS15 0.01U_0402_16V7KCS15 0.01U_0402_16V 7K CS18 0.01U_0402_16V7KCS18 0.01U_0402_16V 7K

ODD_PLUG#<18>

ODD_DA#<17>

<SI> Delete Q84, R954

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2013/02/26 2015/07/08

Compal Secret Data

Deciphered Date

0_0603_5%@

1 2

0_0603_5%@

1 2

SATA_PTX_C_DRX_P0SATA_PTX_R_DRX_P0

SATA_PRX_C_DTX_P0SATA_PRX_R_DTX_P0

<SI>RS11 change to un pop

1 2

RS11 0_0402_5%@RS11 0_0402_5%@

+5VS_HDD1

SATA_PRX_R1_DTX_N0 SATA_PRX_R1_DTX_P0

SATA_PTX_R1_DRX_P0 SATA_PTX_R1_DRX_N0

12 12

SATA_PTX_C_DRX_P1 SATA_PTX_C_DRX_N1

SATA_PRX_C_DTX_N1 SATA_PRX_C_DTX_P1

ODD_DA#

1

CS17

0.1U_0402_25V6K

ESD@

2

Place CS17 close to JODD

2

+5VS_HDD1

1

+5VS_HDD1

0.1U_0402_16V7K

GND GND

0.1U_0402_16V7K C150

C150

1

2

23 24

10U_0805_10V6K

1

CS12

2

14 15

34 58Friday, March 14, 2014

10U_0603_6.3V6M

C149

1

2

JHDD1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

VCC3.3

9

VCC3.3

JHDD_P10

+5VS_ODD

Title

Size Document Number Rev

Custom

Date: Sheet of

10

VCC3.3

11

GND

12

GND

13

GND

14

VCC5

15

VCC5

16

VCC5

17

GND

18

RESERVED

19

GND

20

VCC12

21

VCC12

22

VCC12

SANTA_193202-1

CONN@

Pleace near ODD Connector

0.1U_0402_25V6K

1000P_0402_50V7K

1

CS13

CS16

2

JODD1

1

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12 13

Compal Electronics, Inc.

ODD/SATA Conn

LA-A999P

GND1

GND

GND2

GND

OCTEK_SLS-13HCAB

CONN@

1

0.1

WWW.AliSaler.Com

5

JHW1 need to short

JHW1

@

2

112

JUMP_43X79

+3VALW

1 2

RL35 0_0201_5%@ RL35 0_0201_5%@

D D

1

@8161@

CL20

2

4.7U_0603_6.3V6K

CL19 close to UL1: Pin 32

CL20 close to UL1: Pin 11

C C

B B

+3VS +3VS_CR

LAN_PWR_EN<18>

CL19

@

1500P_0402_50V7K

+LAN_VDD_3V3

1

CL9

2

4.7U_0603_6.3V6K

2

@

CL1

0.01U_0402_16V7K

1

RR1

short@RR1

short@

1 2

0_0603_5%

4.7U_0402_6.3V6M

CL28

@CL28

@

1

CL5

2

@

0.1U_0402_16V7K

1

2

CR9

1

2

RL29 10K_0402_5%

1

2

@EMI@

CL4

0.1U_0402_16V7K

1

2

JUMP_43X79

UG5

@ UG5

@

5

4

@

0.1U_0402_16V7K

IN

SS

APL3512_SOT23-5

12

1

CL10

@

2

4.7U_0603_6.3V6K

OUT

GND

EN

LAN_PWR_EN_R

+VDDREG

1

CL16

@

2

0.1U_0402_16V7K

CL10& CL16 close to UL1: Pin 23CL9 & CL5 close to UL1: Pin 11,32

SP050005L00 Footprint

TSL1

8161@

TSL1

8161@

+V_DAC

LAN_MDIN3 LAN_MDIP3 RJ45_TX3+

LAN_MDIN2 LAN_MDIP2

LAN_MDIN1 LAN_MDIP1

LAN_MDIN0 LAN_MDIP0

1

TCT1

MCT1

2

TD1+

MX1+

3

TD1-

MX1-

4

TCT2

MCT2

5

TD2+

MX2+

6

TD2-

MX2-

7

TCT3

MCT3

8

TD3+

MX3+

9

TD3-

MX3-

10

TCT4

MCT4

11

TD4+

MX4+

TD4-12MX4-

LANKO_LG-2446S-1

SP050007M00

SP050007M00 S X’FORM_ LG-2446S-1 100/1000BASE-TX LAN

S X’FORM_ LG-2446S-1 100/1000BASE-TX LAN

TSL1

8166@

TSL1

8166@

SP050003P00

S X'FORM_ NS892404 ETHERNET 10/100

(SP050003P00) 10/100 8166@

P050007M00) Giga 8161@

(S

+3VS_CR

1

CR10

2

0.1U_0402_16V7K

Close to Chip

A A

+DVDD12

4.7U_0603_6.3V6M

12

CR1

CR2

5

+AVDD12

0.1U_0402_16V7K

1

2

+AVDD12

4.7U_0603_6.3V6M

12

CR3

+LAN_VDD_3V3 Rising time need>0.5mS and <100mS

1

2

3

1

CL29

@CL29

@

0.1U_0402_16V7K

2

CLK_PCIE_LAN<15> CLK_PCIE_LAN#<15>

PCIE_PTX_C_DRX_P3<15> PCIE_PTX_C_DRX_N3<15>

PCIE_PRX_DTX_P3<15> PCIE_PRX_DTX_N3<15>

24 23

RJ45_TX3-

22

21 20

RJ45_TX2-

19

RJ45_TX2+

18 17

RJ45_RX1-

16

RJ45_RX1+

15 14

RJ45_TX0-

13

RJ45_TX0+

PCIE_PTX_C_DRX_P2<15> PCIE_PTX_C_DRX_N2<15>

CLK_PCIE_CR<15>

CLK_PCIE_CR#<15> PCIE_PRX_DTX_P2<15> PCIE_PRX_DTX_N2<15>

0.1U_0402_16V7K

1

CR4

2

4

+LAN_VDD_3V3

8151/8166 Co-Lay

LAN_MDIP0

LAN_MDIN0

LAN_MDIP1

LAN_MDIN1

LAN_MDIP2

LAN_MDIN2

LAN_MDIP3

short@

12

RL6 0_0201_5%

LAN_CLKREQ#<15> PLT_RST#<17,22,33,40,41,6> EC_PME# <18,41>

PLT_RST#

CLK_PCIE_LAN CLK_PCIE_LAN#

PCIE_PTX_C_DRX_P3

PCIE_PTX_C_DRX_N3 PCIE_PRX_DTX_P3 PCIE_PRX_DTX_N3

RP5

1 8 2 7 3 6 4 5

75_0804_8P4R_1%

SD300002E80

RL6 0_0201_5%

1 2

CR11 0.1U_0402_10V7KCR11 0.1U_0402_10V7K

1 2

CR13 0.1U_0402_10V7KCR13 0.1U_0402_10V7K

2

3

YSLC05CH_SOT23-3

LANGND

ESD@

DL1

1

SCA00000U10

2

CL2

SE167100J80

10P_1808_3KV

1

12

LAN_CLKREQ#_RLAN_CLKREQ#

PCIE_PRX_C_DTX_P3 PCIE_PRX_C_DTX_N3

2.49K_0402_1%

EMI@

CL3

120P_0402_50V8

RL11

LAN_MDIN3

RSET

1 2

3

RTL8151G (LDO mode)

+LAN_REGOUT

8161@

UL1

1

MDIP0

2

MDIN0

4

MDIP1

5

MDIN1

6

MDIP2

7

MDIN2

9

MDIP3

10

MDIN3

12

CLKREQB

19

PERSTB

15

REFCLK_P

16

REFCLK_N

13

HSIP

14

HSIN

17

HSOP

18

HSON

31

RSET

SA00005YT00

A000063500) 10/100 8166@

(S

SA

00005YT00) Giga 8151@

(

2.2UH +-5% NLC252018T-2R2J-N

1

CL21

2

0.1U_0402_16V7K

LL2, CL8, CL23 for 8161

CL8 & CL18 close LL2

VDDREG(VDD33)

RTL8111G

LANWAKEB

ISOLATEB

LED1/GPO

LED2(LED1)

UL1

8166@

UL1

8166@

SA000063500

RTL8166EH-CG QFN 32P E-LAN CTRL

AVDD10 AVDD10 AVDD10

DVDD10

AVDD33 AVDD33

REGOUT

CKXTAL1 CKXTAL2

1 2

LL2

@LL2

@

1 2

3 8 30 22

11 32

23 24

21 20

27

LED0

26 25

28 29

33

GND

LL1

0_0603_5%

+LAN_VDD_1V0

+VDDREG +LAN_REGOUT

LANWAKEB EC_LAN_ISOLATEB#

LED0 LED1/GPO LED2

XTLI XTLO

short@

1

CL8

@

2

+LAN_VDD_3V3

2

LDO mode Switcing mode

LL1

SMT

CL21

SMT

LL2

@

CL8

@

1

CL23

@

2

4.7U_0603_6.3V6K

1

@

CL12

CL11

2

0.1U_0402_16V7K

Place CL11~CL13 close UL1 Pin 3, 8 , 22

+LAN_VDD_3V3=40mil

+VDDREG=40mil

L

+LAN_REGOUT=60mil

+LAN_VDD_3V3

RL10

1 2

short@

0_0603_5%

TH2TH2 TH1TH1 TH3TH3

@

SMT

1

CL13

2

0.1U_0402_16V7K

12

@

RL15

RL15 10K_0402_5%

10K_0402_5%

RJ45_TX3-

RJ45_TX3+

RJ45_RX1-

RJ45_TX2-

RJ45_TX2+

RJ45_RX1+

RJ45_TX0-

RJ45_TX0+

+LAN_VDD_1V0

1

CL14

CL15

8161@

@8161@

2

0.1U_0402_16V7K

SANTA_130456-291

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

131127 SWAP Pin of DL1.2 & DL1.3 by layout requested

Card Reader Connector

+CR_VDD_3V3

Close to Conn

4.7U_0603_6.3V6M

12

CR8

CR7

CLK_PCIE_CR CLK_PCIE_CR#

1 2

CL17 0.1U_0402_16V7KCL17 0.1U_0402_16V7K

1 2

CL18 0.1U_0402_16V7KCL18 0.1U_0402_16V7K

CR_CLKREQ#<15>

+3VS_CR

CR5

4

Close to Chip

1

2

+3VS_CR

4.7U_0402_6.3V6M

PCIE_PTX_C_DRX_P2 PCIE_PTX_C_DRX_N2

PCIE_PRX_C_DTX_P2 PCIE_PRX_C_DTX_N2

CR_CLKREQ# PLT_RST#

SD_CD#

1 2

RR96.2K_0402_1% RR96.2K_0402_1%

RR9 close to chip

0.1U_0402_16V7K

1

CR6

@

2

RTS5239

UR1

1

HSIP

2

HSIN

3

REFCLKP

4

REFCLKN

5

HSOP

6

HSON

24

CLKREQ#

23

PERST#

22

MS_INS#

21

SD_CD#

19

RREF

GPIO

8

RREF

RTS5239-GR_QFN24_4X4

RR810K_0402_5% RR810K_0402_5%

DV33_18

DV12_S

3V3_IN

AV12

CARD_3V3

GND

SP1 SP2 SP3 SP4 SP5 SP6 SP7

3

RR4-RR9 close to chip CR12-CR13 close to chip or socket

12

SD_D1

13

SD_D0

14

SD_CLK

16

SD_CMD

17

SD_D3

18

SD_D2

20

SD_WP

15 11

9 7 10

25

Security Classification

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

+DVDD12

+3VS_CR +AVDD12

Issued Date

1 2

RR2 0_0402_5%short@RR2 0_0402_5%short@

1 2

RR4 0_0402_5%short@RR4 0_0402_5%short@

1 2

RR5 33_0402_5%EMI@ RR5 33_0402_5%EMI@

1 2

RR3 0_0402_5%short@RR3 0_0402_5%short@

1 2

RR6 0_0402_5%short@RR6 0_0402_5%short@

1 2

RR7 0_0402_5%short@RR7 0_0402_5%short@

+CR_VDD_3V3

1 2

CR14 1U_0402_6.3V4ZCR14 1U_0402_6.3V4Z

2013/02/26 2015/07/08

208MHz

SD_D1_R SD_D0_R SD_CLK_R

SD_CMD_R

SD_D3_R

6.8P_0402_50V8C

SD_D2_R

Close to Chip

Compal Secret Data

CR12

@CR12

@

1 2

Deciphered Date

2

1

CL1

4 & CL15 close UL1 Pin22

CL26 & CL27 close UL1 Pin30

1U_0402_6.3V6K

1

CL26

8166@

2

XTAL@

CL25

1U_0402_6.3V6K

1

CL27

@8166@

2

0.1U_0402_16V7K

EC_LAN_ISOLATEB#

RL8

15K_0402_5%

1 2

XTAL@

10P_0402_25V8J

1

OSC1OSC

2

GND2GND

25MHZ_20PF_FSX3M-25.M20FDO

12

RL71M_0402_5%

XTAL@

3

YL1

4

SJ10000E500

XTAL@

CL24

12

RL51K_0402_5% RL51K_0402_5%

XTLI

XTLO

10P_0402_25V8J

1

2

<1118>change to standard part.

JLAN1

CONN@JLAN1

CONN@

10

GND

9

GND

LANGND

CONN@

JREAD1

SD_D3_R

SD_CMD_R

0.1U_0402_16V7K

1

2

+CR_VDD_3V3

SD_CLK_R

SD_D0_R

SD_D1_R

SD_D2_R

Title

LAN 8111G

Size Document Number Rev

LA-A999P

Date: Sheet of

1

DAT3

2

CMD

3

VSS1

4

VDD

5

CLK

6

VSS2

7

DAT0

8

DAT1

9

DAT2

10

SD_CD#

11

SD_WP

TAITW_PSDAT0-09GLBS1ZZ4H1

Compal Electronics, Inc.

G1

CD

G2

WP

1

35 58Friday, M arch 14, 2014

+3VS

12

13

0.1

WWW.AliSaler.Com

A

@EMI@

1 2

4

1

SM070003K00

1 2

@EMI@

1 2

1

4

1 2

@EMI@

12

USB3_TX1_P<17>

1 1

2 2

USB3_TX1_N<17 >

USB3_RX1_P<17>

USB3_RX1_N<17>

USB20_P0<17>

USB20_N0<17>

USB3_TX1_P USB3_TX1_C_P USB3TXDP1_C_R

0.1U_0402_16V7K

USB3_TX1_N USB3_TX1_C_N

0.1U_0402_16V7K

RS3 0_0 402_5%

CMMI21T-900Y-N

4

EMI@

1

LM2

RS6 0_0 402_5%

RS7 0_0 402_5%

LM3

1

EMI@

4

WCM-2012-900T_ 4P

RS8 0_0 402_5%

CS1

CS2

3

2

3

2

3

B

USB3RXDP1_C

USB3RXDN1_C

USB20_P0_C

USB20_N0_C

RS1 0_0 402_5%

CMMI21T-900Y-N

4

EMI@

1

LM1

RS2 0_0 402_5%

@EMI@

1 2

4

1

SM070003K00

1 2

@EMI@

3

2

3

2

C

USB3TXDN1_C_R

<EC>

USB_ON#<41>

ESD@

USB3RXDN1_C

USB3RXDP1_C

USB3TXDN1_C_R

USB3TXDP1_C_R

ESD@

+5VALW

W=

USB_ON#

@ESD@

DM1

1

YSLC05CH_SOT23-3

DM2

1

2

4

5

3

8

IP4292CZ10-TB

100mils

1

2

@

1 2

0_0402_5%

SCA00000U10

SC300002800

10

9

7

65

USB3.0 need support 2.5A change USB PWR SW SA00003TV00 low active

CS3

0.1U_0402_16V7K

RS4

2

USB20_N0_C

3

USB20_P0_C

9

USB3RXDN1_C

8

USB3RXDP1_C

7

USB3TXDN1_C_R

6

USB3TXDP1_C_R

D

US1

1

GND

2

VIN VIN3VOUT

4

EN

G547I2P81U_MSOP8

8

VOUT

7

VOUT

6 5

FLG

USB3TXDP1_C_R

USB3TXDN1_C_R USB20_P0_C

USB20_N0_C USB3RXDP1_C

USB3RXDN1_C

E

+USB_VCCA

W=100mils

RS5

0_0402_5%

@

CS4

1 2

@RS5

@

1

2

CS5

1000P_0402_50V7K

USB_OC0#

1

2

0.1U_0402_16V7K

USB2.0/USB3.0 port 1

+USB_VCCA

JUSB1

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2 6 4 5

GND

D-

GND

SSRX+ GND

GND

SSRX-

GND

ACON_TARA4-9K1311

CONN@

10 11 12 13

1

CS6

2

47U_0805_6.3V6M

USB_OC0# <17>

@EMI@

RS13 0_0402_5%

USB2.0 port x 2

3 3

+USB_VCCB

W=

1 2

RS9

0_0402_5%

USB20_N2_C

USB20_P2_C

B

100mils

@RS9

@

USB_OC1#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

USB_OC1# <17>

8 7 6 5

2

3

USB_ON#

+5VALW

W=100mils

1

2

1 2

RS10

@RS10

@

0_0402_5%

CS10

0.1U_0402_16V7K

US2

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

4

FLG

EN

G547I2P81U_MSOP8

131126 SWAP DM4.2 & DM4.3 by layout requested

4 4

YSLC05CH_SOT23-3

1

DM3

SCA00000U10

DM3

SCA00000U10

ESD@

3

USB20_P1_C

2

USB20_N1_C

ESD@

DM4

SCA00000U10

DM4

SCA00000U10

1

YSLC05CH_SOT23-3

131129 change DM3 & DM4 to pop by ESD requested

A

USB20_P1<17>

USB20_N1<17>

USB20_P2<17>

USB20_N2<17>

131203 SWAP pin of LM5 by layout requested

Compal Secret Data

2013/02/26 2015/07/08

C

Compal Secret Data

RS13 0_0402_5%

1 2

LM4

1

EMI@

4

WCM-2012-900T_ 4P

1 2

RS14 0_0402_5%@ EMI@RS14 0_0402_5%@EMI@

RS15 0_0402_5%@ EMI@RS15 0_0402_5%@EMI@

1 2

LM5

1

EMI@

4

WCM-2012-900T_ 4P

1 2

RS16 0_0402_5%

@EMI@

Deciphered Date

USB20_P1_C

2

3

USB20_N1_C

USB20_P2_C

2

3

USB20_N2_C

D

131126 reverse the JUSB2, follow haswell 14"

+USB_VCCB

USB20_P1_C USB20_N1_C

USB20_P2_C USB20_N2_C

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

USB 3.0/2.0 conn

LA-A999P

JUSB2

1

2

3

4

5

6

7

8

9

10

11 12

E

G1

11

G2

12

E-T_6916K-Q12N-00 L

36 5 8Friday, March 14, 2014

13 14

0.1

WWW.AliSaler.Com

5

1 2

RA3 1K_0402_5%RA3 1K_0402_5%

+MIC2_VREFO

D D

+3VS

CPVDD

2

CA17

4.7U_0603_6.3V6K

1

HDA_SYNC_AUDIO<14>

HDA_RST_AUDIO#<14>

D_MIC_DATA<30> D_MIC_CLK<30>

+3VS

1 2

@

RA6

4.7K_0402_5%

<SI> QA2 change from NMOS to BJT

C C

HDA_RST_AUDIO# PD#

Part Number = SB000008E10

EC_MUTE#<41>

CA1 4.7U_0402_6.3V6MCA1 4.7U_0402_6.3V6M

1 2

CA4 4.7U_0402_6.3V6MCA4 4.7U_0402_6.3V6M

1 2

CA11 10U_0603_6.3V6MCA11 10U_0603_6.3V6M

1 2

CA14 2. 2U_0402_6.3V6MCA14 2.2U_0402_6.3V6M

1 2

CA15 2. 2U_0402_6.3V6MCA15 2.2U_0402_6.3V6M

1 2

RA10 39.2K_0402_1%RA10 39.2K_0402_1%

+1.5VS +DVDD

12

RA25

2.2K_0402_5%

B

2

E

3 1

C

QA2

QA2 MMBT3904WH_SOT323-3

MMBT3904WH_SOT323-3

21

DA3

DA3 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

12

PC Beep

B B

SB Beep

EC Beep

EC_BEEP#<41>

HDA_SPKR<14>

Close to Codec pin12

MUTE_LED_CTR

HDA_RST_AUDIO#

1K_0402_5%

1K_0402_5% RA26

RA26

10K_0402_5%

10K_0402_5% RA11

RA11

1 2

CA31

CA31 .1U_0402_16V7K

.1U_0402_16V7K

1 2

CA33

CA33 .1U_0402_16V7K

.1U_0402_16V7K

4

UA1

20

MIC1_R

19

MIC1_L

INT_MICR_C INT_MICL_CINT_MIC

ALDO_CAP

ACPVEE

PC_BEEP_R

18

MIC2_R

17

MIC2_L

31

MIC1_VREFO_L

30

MIC1_VREFO_R

29

MIC2_VREFO

23

LINE2_R

24

LINE2_L

16

MONO_OUT

12

PC_BEEP

CPVDD CBN CBP

SENSEAPLUG_IN#

PCBEEP

10

SYNC

11

RESET#

7

LDO3-CAP

34

CPVEE

36

CPVDD

35

CBN

37

CBP

2

GPIO0/DMIC_DATA

3

GPIO1/DMIC_CLK

13

SENSE_A

14

SENSE_B

47

PDB

ALC3227-CG_MQFN48P_6X6

Power down (PD#) power stage for save power

0

Power down power stage

V:

3.3V: Power up power stage

RA19

RA19 47K_0402_5%

47K_0402_5%

1 2

12

RA20

RA20 10K_0402_5%

10K_0402_5%

DVDD_IO

SPK_OUT_R+ SPK_OUT_R-

SPK_OUT_L+

SPK_OUT_L-

HPOUT_R HPOUT_L

SDATA_OUT

SDATA_IN

LINE1_L LINE1_R

SPDIFO/GPIO2

LDO1_CAP LDO2_CAP

Thermal Pad

1 2

CA34

CA34 .1U_0402_16V7K

.1U_0402_16V7K

DVDD

AVDD1 AVDD2

PVDD1 PVDD2

BCLK

JDREF

VREF

AVSS1 AVSS2

DVSS

1 9

26 40

41 46

45 44

42 43

33 32

5 8

6

22 21 48

15 28 27 39

25 38

4 49

PC_BEEP

+DVDD +DVDD_IO

+5VS_AVDD +1.5VS_AVDD

+5VS_PVDD

SPK_R+ SPK_R-

SPK_L+ SPK_L-

HPOUT_R HPOUT_L HP_OUTL

SDATA_IN

JDREF AVREF

1 2

RA4 75_0402_1%RA4 75_0402_1%

1 2

RA5 75_0402_1%RA5 75_0402_1%

1 2

RA7 22_0402_5%RA7 22_0402_5%

MIC_JD

RA9 20K_0402_1%RA9 20K_0402_1%

12

CA16 .1U_0402_16V7KC A16 .1U_0402_16V7K

1 2

CA18 10U_0603_6.3V6MCA18 10U_0603_6.3V6M

1 2

CA19 10U_0603_6.3V6MCA19 10U_0603_6.3V6M

131202 Vender request

GNDA

3

Internal Speaker

12

RA29 100K_0402_5%

@

AVREF

CA24 2. 2U_0402_6.3V6MCA24 2.2U_0402_6.3V6M

1 2

HP_OUTR

GNDA

1 2

@

RA2

0_0603_5%

Place near Pin1 Place near Pin9

SM010008A00

+5VS_AVDD

+5VS_PVDD

1 2

RA13 PBY160808T-300Y-N 0603EMI@

1 2

RA14 PBY160808T-300Y-N 0603EMI@ RA14 PBY160808T-300Y-N 0603EMI@

1 2

RA15 PBY160808T-300Y-N 0603EMI@ RA15 PBY160808T-300Y-N 0603EMI@

1 2

RA16 PBY160808T-300Y-N 0603EMI@

.1U_0402_16V7K

GNDA

.1U_0402_16V7K

CA9

CA10

4.7U_0603_6.3V6K

CA10

4.7U_0603_6.3V6K

1

2

1

Place near Pin26

10U_0603_6.3V6M

CA21

.1U_0402_16V7K

CA21

.1U_0402_16V7K

CA20

1

2

Internal SPK

<DB>Relace RA13/RA14/RA15/RA16 close to UA1

Headphone

HDA_SDOUT_AUDIO <14> HDA_SDIN0 <14>

HDA_BITCLK_AUDIO <14>

GNDA

SPK_RSPK_R+ SPK_LSPK_L+

wide 40 MIL

HP_OUTR_R

SPK_L-_CONN

SPK_L+_CONN

2

3

DA2

SCA00002900

L03ESDL5V0CC3-2_SOT23-3

1

HP_OUTL_RINT_MIC_R

2

3

1

SPK_R-_CONN

SPK_R+_CONN

2

3

DA1

@ESD@DA1

@ESD@

SCA00002900

L03ESDL5V0CC3-2_SOT23-3

1

Reserve for ESD request.

2

3

1

GNDA

DA4

DA4 YSLC05CH_SOT23-3

YSLC05CH_SOT23-3

SCA00002900

SCA00002900 ESD@

ESD@

2

CA6

10U_0603_6.3V6M

CA6

10U_0603_6.3V6M

CA5

.1U_0402_16V7K

CA5

.1U_0402_16V7K

1

2

LA4

1 2

FBMA-L11160808601LMA10T_2P

600ohms @100MHz 1A P/N

: SM01000BU00

LA6

1 2

FBMA-L11-201209601LMA20T_2P

FBMA-L11-201209601LMA20T_2P CA22

CA22

CA23

10U_0603_6.3V6M

CA23

10U_0603_6.3V6M

2

1

@ESD@DA2

@ESD@

DA6

DA6 YSLC05CH_SOT23-3

YSLC05CH_SOT23-3

SCA00000U10

SCA00000U10 @ESD@

@ESD@

CA8

10U_0603_6.3V6M

CA8

10U_0603_6.3V6M

CA7

.1U_0402_16V7K

CA7

.1U_0402_16V7K

1

2

+5VS

CA12

.1U_0402_16V7K

CA12

.1U_0402_16V7K

Place near Pin40

+5VS

600ohms @100MHz 2A P/N: SM01000EE00

2

3

DA8

DA8 YSLC05CH_SOT23-3

YSLC05CH_SOT23-3

SCA00002900

1

Delete ESD Diode

Jack detect Combo Mic = High Normal HP = Low

1

+3VS+DVDD_IO+DVDD+3VS

1 2

LA3

LA3 SUPPRE_ KC FBMA-10-100505-101T 0402

SUPPRE_ KC FBMA-10-100505-101T 0402

PCB Footprint = R_0402

131224: Change power rail from +1.5VS to +3VS

+1.5VS+1.5VS_AVDD

1 2

LA5

CA13

4.7U_0603_6.3V6K

CA13

4.7U_0603_6.3V6K SUPPRE_ KC FBMA-10-100505-101T 0402

SUPPRE_ KC FBMA-10-100505-101T 0402

PCB Footprint = R_0402

2

1

GNDA

SPK_R-_CONN SPK_R+_CONN SPK_L-_CONN SPK_L+_CONN

PCB Footprint = R_0402

MUTE_LED_CTR

10K_0402_5%

1

C123

2

220P_0402_50V7K

@EMI@ C123

@EMI@

MIC_JD

CA32

10U_0603_6.3V6M

CA32

10U_0603_6.3V6M

GNDA

220P_0402_50V7K

2

1

RA12

1

C124

2

@EMI@ C124

@EMI@

1 2

RA18

RA18 22K_0402_5%

22K_0402_5%

12

220P_0402_50V7K

5

1

C125

2

220P_0402_50V7K

@EMI@ C125

@EMI@

+MIC2_VREFO

3

4

1

2

Q4B

Q4B 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

JSPK1

1

2

3

4

E-T_3703-Q04N-11R

CONN@

1

C126

2

@EMI@ C126

@EMI@

12

RA17

2.2K_0402_5%

INT_MIC

MUTE_LED <38>

5

GND

6

GND

COMBO AUDIO JACK

1 2

RA27 0_0402_5%@RA27 0_0402_5%@

1 2

RA28 0_0402_5%@RA28 0_0402_5%@

1 2

CA40

@EMI@CA40

@EMI@

.1U_0402_16V7K

1 2

CA38

@EMI@CA38

@EMI@

.1U_0402_16V7K

A A

1 2

CA39

@EMI@CA39

@EMI@

.1U_0402_16V7K

1 2

CA29

EMI@CA29

EMI@

.1U_0402_16V7K

1 2

CA30

EMI@CA30

EMI@

.1U_0402_16V7K

GNDA

Delete ESD Diode

5

4

3

INT_MIC

HP_OUTL

HP_OUTR

RA24

22K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

EMI@

1 2

RA21 BLM15AG601SN1D_2P

EMI@

1 2

RA22 BLM15AG601SN1D_2P

EMI@

1 2

RA23 BLM15AG601SN1D_2P

100P_0402_50V8J

12

2013/01/04 2015/01/04

100P_0402_50V8J

HPR, HPL, 15mil Keep 30mil

CA36

10P_0402_50V8J

CA36

10P_0402_50V8J

CA35

CA37

10P_0402_50V8J

CA37

10P_0402_50V8J

1

2

@EMI@

GNDA GNDA GNDAGNDA

Compal Secret Data

Deciphered Date

2

JHP1

GNDA

1

3

6

1

2 4

5

SINGA_2SJ-E960-001F

CONN@

37 58Friday, M arch 14, 2014

INT_MIC_R

HP_OUTL_R

HP_OUTR_R

PLUG_IN#

Pin6 and Pin5 Normal OPEN

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

AUDIO ALC259-VC2-CG

LA-A999P

0.1

WWW.AliSaler.Com

Touch pad conn

KSI0

ESD@

C193 100P_04 02_50V8J

12

KSI[0..7]<41>

KSO[0..17]<41 >

MUTE_LED<37>

KSI7 KSI6 KSI5 KSI4 KSI3 KSI2 KSI1 KSI0

KSO17 KSO16 KSO15 KSO14 KSO13 KSO12 KSO11 KSO10

KSO9 KSO8 KSO7 KSO6 KSO5 KSO4 KSO3 KSO2 KSO1

KSO0

+5VS

CAP_LOCK#<41>

CAP_LOCK# MUTE_LED

1 2

R203 3.3K_0402_5%R203 3.3K_0402_5%

1 2

R207 3.3K_0402_5%R207 3.3K_0402_5%

WL_WHIT WL_AMBER

+5VS

Keyboard conn

JKB1

CONN@ JKB1

CONN@

KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15 KSO16 KSO17

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

ACES_50690-0320N-P01

33

G1

34

G2

+3VALW

TP_CLK<41> TP_DATA<41>

TP_CLK TP_DATA

2

3

1

DM5

DM5 YSLC05CH_SOT23-3

YSLC05CH_SOT23-3

SCA00000U10

SCA00000U10 @ESD@

@ESD@

CONN@

JTP1

1

2

3

4

5

GND

6

GND

HB_A090420-SAHR21

<1114> update footprint.

Amber

WL_AMBER WL_WHIT

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/02/26 2015/07/08

12

R157

3.3K_0402_5%

61

Q20A

2

Compal Secret Data

Deciphered Date

+5VALW+5 VALW

CAP_LOCK# MUTE_LED

12

White

R158

3.3K_0402_5%

3

Q20B

5

WLAN_ON_LED# <41>WLAN_OFF_LED#<41>

4

2N7002KDW_SOT363-6

Title

Size Docum ent Number Rev

B

Date: Sheet of

KB/TP

LA-A999P

1

CC135

CC135 100P_0402_50V8J

100P_0402_50V8J

2

ESD@

Compal Electronics, Inc.

1

CC123

CC123 100P_0402_50V8J

100P_0402_50V8J

2

ESD@

38 5 8Friday, March 14, 2014

0.1

WWW.AliSaler.Com

A

B

C

D

E

Powert Button Connector

1 1

LID_SW#<41>

ON/OFF#< 41>

2 2

+3VL

LID_SW# ON/OFF#

JPWR1

1

2

3 4

5

3

G1

6

4

G2

E-T_6916K-Q04N-03 R

CONN@

<1205> update footprint.

1

CC124

CC124 100P_0402_50V8J

100P_0402_50V8J

2

ESD@

ON/OFF#

LID_SW#

R215

12

100K_0402_5%

+3VL

PWR_LED#<41>

remove at SI phase

SATA_LED#<14>

remove at SI phase

PWR_LED#

SATA_LED#

@ESD@

CS20

@ESD@

CS19

1

0.1U_0402_16V7K

2

1

0.1U_0402_16V7K

2

White

LED10

R2744220_0402_5% R2744220_0402 _5%

12

LTW-110DC5 -C_WHITE

LED10

3

+3VALW

21

White

LED9

R2743220_0402_5% R2743220_0402 _5%

12

LTW-110DC5 -C_WHITE

LED9

3

+3VS

21

<SI> Del New Lid SW conn

3 3

+FAN_POWER

40mil

1

2

2.2U_0603_6.3V6K

EN_DFAN1<41>

4 4

CE22

+5VS

CE25

2.2U_0603_6.3V6K

1 2

UE3

1

VEN

2

VIN

3

VO

4

VSET

APE8873M SOP 8P

GND GND GND GND

8 7 6 5

FAN conn

FAN_SPEED1<41>

+3VS

12

RE50

RE50 10K_0402_5%

10K_0402_5%

1

CE24

0.01U_0402_16V7K

2

+FAN_POWER

40mil

JFAN1

CONN@ JFAN1

CONN@

1

2

3

4

GND

5

GND

ACES_85204-0300N

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

2015/07/082013/02/26

D

Title

Size Docum ent Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

PWRBTN/FAN

LA-A999P

E

0.1

39 5 8Friday, March 14, 2014

WWW.AliSaler.Com

5

4

3

2

1

0128 change power rail for NPCT421 co-lay

+3VS

SLB9656@

+3VS

TPM1.2

0.1U_0402_16V4Z

D D

0.1U_0402_16V4Z

LPC_AD0<14,41> LPC_AD1<14,41> LPC_AD2<14,41> LPC_AD3<14,41>

CLK_PCI_LPC<17,41>

LPC_FRAME#<14,41> PLT_RST#<17,22,33,35,41,6> SERIRQ<14,41>

+3VS

C C

Screw Hole

H13

H14

H9

H_5P0

HOLEA

@

1

H22

H_2P6X3P1

HOLEA

1

H9

H_5P0

HOLEA

@

1

H4

H_2P8

HOLEA

@

1

H_5P0

HOLEA

@

1

H5

H_2P8

HOLEA

@

1

B B

0.1U_0402_16V4Z

@

1

C1059

C1060

2

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME# PLT_RST# SERIRQ

1 2

@

R1383

4.7K_0402_5%

12

131127 follow haswell 14"

H10

H_5P0

HOLEA

@

H7

H_2P8

HOLEA

@

1

@

1

H21

H_2P8

HOLEA

@

1

@

1

C1058

0.1U_0402_16V4Z

2

U70

26 23 20 17

21 22 16 27 15

7

R1414

R1414 0_0402_5%

0_0402_5%

short@

H20

H_3P0

HOLEA

1

H8

H_2P8

HOLEA

@

1

LAD0 LAD1 LAD2 LAD3

LCLK LFRAME# LRESET# SERIRQ CLKRUN# PP

H15

H_2P8

HOLEA

1

5

19

10

VSB

VDD24VDD

VDD

TESTB1/BADD

TPM

TPM SLB 9656 TT 1.2

SLB 9656 TT 1.2

GND4GND11GND18GND

25

H19

H_2P8

HOLEA

@

1

H3

H_2P8

HOLEA

@

1

LPCPD#

TEST1

XTALO

XTALI

GPIO2

GPIO

NC NC NC

SLB 9656 TT 1.2

H2

H_2P8

HOLEA

@

1

28 9 8

14 13

2 6

1 3 12

1 2

1

@

C1061

0.1U_0402_16V4Z

2

1 2

R1413 0_0402_5%

@

T1406 PAD

T1407 PAD

@

H1

H_2P8

HOLEA

@

1

SLB9656@

RH512

0_0402_5%

RH511

0_0402_5%

short@

H11

H_5P0

HOLEA

@

1

+3VALW

NPCT421@

*

PLT_RST#BADD

H12

H17

H_5P0

H_2P8

HOLEA

@

1

+3VL +3V_GSEN

EC_SMB_CK1<41,47,48> EC_SMB_DA1<41,47,48>

+3V_GSEN

H23

H16

H_2P6X3P1

H_2P8

HOLEA

@

1

ACCELEROMETER

1 2

RH413

@RH413

@

0_0402_5%

SI# 2012.04.10 Change ACCEL_INT# to INT1

+3V_GSEN

EC_SMB_CK1 EC_SMB_DA1

12

R208

@ R208

@

10K_0402_5%

12

R227

short@

12

R209

@R209

@

0_0402_5%

H18

H_2P8

HOLEA

@

1

@

U25

1

Vdd_IO

4

SCL/SPC

6

SDA/SDI/SDO

7

SDO/SA0

8

CS

2

NC

3

NC

FIDUCIAL_C40M80

HP3DC2TR

FD3

@

1

@ RH503

@

0_0402_5%

9

INT2

11

INT1

14

VDD

5

GND

12

GND

10

RES

13

RES

15

RES

16

RES

FIDUCIAL_C40M80

RH503

FD4

1

+3V_GSEN

@

12

ACCEL_INT#_R

0.1U_0402_16V7K

FIDUCIAL_C40M80

@

DH8

21

CH751H-40PT_SOD323-2

1

C231

2

@

FD2

@

1

ACCEL_INT# <17>

+3V_GSEN

1

10U_0603_6.3V6M

2

@

FD1

@

1

FIDUCIAL_C40M80

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

2013/02/26 2015/07/08

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

TPM/Screw hole

Size Document Number Rev

LA-A999P

Date: Sheet

Date: Sheet of

1

of

40 58Friday, M arch 14, 2014

0.1

WWW.AliSaler.Com

5

PV# 2013.01.29 Add CK4 for ESD protection

ESD@

CK4

D D

+3VALW_EC

+3VS

RP7

C C

+3VS

B B

A A

CK4

12

PLT_RST#

0.1U_0402_16V7K

1 2

@

1 2

12

RK15 330K_0402_5%RK15 330 K_0402_5%

CK9 0.1U_0402_16V7KCK9 0.1U_0402 _16V7K

1 8 2 7 3 6 4 5

2.2K_0804_8P4R_5%

RK36 10K_0402_5%

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

EC_SCI#

EC_SMB_CK1<40,47,48> EC_SMB_DA1<40,47,48> EC_SMB_CK2<15,22> EC_SMB_DA2<15,22>

EC_RST#

RK49 100K_0402_5%@ RK49 100K_0402_5%@

RK50 100K_0402_5%@ RK50 100K_0402_5%@

1 2

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

PCH_DPWROK

PCH_PWROK

PM_CLKRUN#<16> EC_PCIE_WAKE#<33>

KSI[0..7]<38>

KSO[0..17]<3 8>

1 2

RK39 0_0402_5%short@RK39 0_0402_5%short@

1 2

RK40 0_0402_5%

PM_SLP_S3#<16> PM_SLP_S5#<16>

SUSACK#<16>

MINI1_LED#<33>

PCH_SUSWARN#<16>

SLP_ME_CSW_DEV#<18>

CPU1.5V_S3_GATE<10>

DGPU_PWR_EN<17,25,56>

GPU_THERMAL_DET#<22>

short@

EC_INVT_PWM<30>

E51TXD_P80DATA<33> E51RXD_P80CLK< 33>

4

+3VL

1 2

RK57

0_0603_5%

GATEA20<18>

EC_KBRST#<18>

SERIRQ<14,40>

LPC_FRAME#<14,40>

LPC_AD3<14,40> LPC_AD2<14,40> LPC_AD1<14,40> LPC_AD0<14,40>

CLK_PCI_LPC<17,40>

PLT_RST#<17,22,33,3 5,40,6>

EC_SCI#<18>

1 2

@

1 2

RK59 0_0402_5%

RK59 0_0402_5% RK61 0_0402_5%short@RK61 0_0402_5%short@

PM_SLP_S3# PM_SLP_S5#

SUSACK#

PCH_SUSWARN#

CPU1.5V_S3_GATE

FAN_SPEED1<39> PM_SLP_SUS#< 16>

PCH_PWROK<16>

AC_LED#<46>

GPU_THERMAL_DET#

BT_ON_EC<33>

BT_ON_EC

10K_0402_5%

0.1U_0402_16V7K

0.1U_0402_16V7K CK2

CK2

1

2

GATEA20 EC_KBRST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_LPC PLT_RST# EC_RST# EC_SCI#

PM_CLKRUN#_R

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_CK2_R EC_SMB_DA2_R

FAN_SPEED1 PM_SLP_SUS# E51TXD_P80DATA E51RXD_P80CLK PCH_PWROK

AC_LED#

+3VALW_EC

12

RK18

+3VALW_EC

0.1U_0402_16V7K

0.1U_0402_16V7K CK3

CK3

1

2

KB9012QF-A3_LQFP128 _14X14

Part Number = SA00004OB30

UK1

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

10

LPC_AD0

12

CLK_PCI_EC

13

PCIRST#/GPIO05

37

EC_RST#

20

EC_SCII#/GPIO0E

38

GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/GPIO44

78

EC_SMB_DA1/GPIO45

79

EC_SMB_CK2/GPIO46

80

EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

GPIO0D

25

EC_INVT_PWM/GPIO11

28

FAN_SPEED1/GPIO14

29

EC_PME#/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

PCH_PWROK/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLKI/GPIO5D

123

XCLKO/GPIO5E

+3VALW_EC

LPC & MISC

LK1

LK1 FBMA-L11-160808- 800LMT_0603

FBMA-L11-160808- 800LMT_0603

1 2

111

9

22

33

96

EC_VDD/VCC

PWM Output

AD Input

DA Output

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SPI Device Interface

SPI Flash ROM

GPIO

SM Bus

GPIO

GND/GND

11

24

35

94

3

+EC_VCCA

ECAGND

+3V_EC_VDD

0_0402_5%

67

125

EC_VDD0

EC_VDD/VCC

BEEP#/GPIO10

EC_VDD/AVCC

ACOFF/GPIO13

BATT_TEMP/AD0/GPIO38

AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

IMON/AD5/GPIO43

DAC_BRIG/GPIO3C EN_DFAN1/GPIO3D

IREF/GPIO3E

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

CPU1.5V_S3_GATE/GPXIOA00

WOL_EN/GPXIOA01

ME_EN/GPXIOA02

VCIN0_PH/GPXIOD00

SPIDI/GPIO5B

SPIDO/GPIO5C

SPICLK/GPIO58

SPICS#/GPIO5A

ENBKL/AD6/GPIO40

PECI_KB930/AD7/GPIO41

FSTCHG/GPIO50

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

PWR_LED#/GPIO54

BATT_LOW_LED#/GPIO55

SYSON/GPIO56 VR_ON/GPIO57

PM_SLP_S4#/GPIO59

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04 PROCHOT_IN/GPXIOA05

H_PROCHOT#_EC/GPXIOA06

VCOUT0_PH/GPXIOA07

GPO

BKOFF#/GPXIOA08

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

SA_PGOOD/GPXIOA11

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

GPI

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

GPXIOD06

AGND/AGND

GND/GND

GND0

69

20mil

113

ECAGND

FBMA-L11-160808- 800LMT_0603

ECAGND <46>

1

CK7

0.1U_0402_16V7K

2

RK12

short@RK12

short@

12

GPIO0F

GPIO12

V18R

LK2

+3VL

SD000001B80

21 23 26 27

63

B/I#

64

BOARD_ID

65

ADP_I

66

USB_ON#

75

ADP_ID

76

ENBKL

68

PCH_VREG_EN#_R

70 71 72

83 84

PM_SLP_S4#

85

WLAN_OFF_LED#

86 87

TP_CLK

88

TP_DATA

97

EC_PME#

98 99

HDA_SDO

109

VCIN0_PH

119

EC_SPI_SO

120

EC_SPI_SI

126

EC_SPI_CLK

128

EC_SPI_CS#

73 74

EC_FB_CLAMP_TGL_REQ#

89

AOAC_PME#

90 91

CAP_LOCK#

92

PWR_LED#

93 95

SYSON

121

VR_ON

127

PCH_DPWROK

100

PCH_RSMRST#

101 102

VCIN1_PH

103

H_PROCHOT#_EC

104

MAINPWON

105

EC_BKOFF#

106

PBTN_OUT#

107

PCH_PWR_EN

108

SA_PGOOD

110

EC_ACIN

112

EC_ON

114

ON/OFF#

115

LID_SW#

116

SUSP#

117

NMI_DBG#

118

EC_PECI

124

+V18R

12

DIS@

RK13

240K_0402_1%

RK34

1

CK17

4.7U_0603_6.3V6K

2

+3VALW_EC

RK6

RK6 100K_0402_5%

100K_0402_5%

1 2

BOARD_ID

1 2

GPU_HOT# < 56> EC_BEEP# < 37> TS_GPIO_EC <30> AC_AND_CHAG <47>

HDA_SDO <14>

VCIN0_PH <46>

SYSON <43,50> VR_ON <53> PCH_DPWROK <16>

PCH_RSMRST# <16>

EC_ON <49>

ON/OFF# <39> LID_SW# <39>

SUSP# <10,43,5 0,51,52,55,58>

1 2

43_0402_1%

2

DB SI

UMA

RK13

DIS

RK13

Board ID control

<DB>RK13 change to 160K ==>for 15" DIS

<DB>RK13 change to 12K ===>for 15" UMA

UMA@

RK13

20K_0402_1%

SD034200280

B/I# <46 ,47>

ADP_I < 46,48>

USB_ON# <36>

ADP_ID <46>

ENBKL <16>

short@

RK53

1 2

0_0201_5%

EN_DFAN1 <39> DGPU_HOLD_RST# <17,22 >

DRAMRST_CNTRL_PCH <10,15,7>

EC_MUTE# <37>

PM_SLP_S4# <16>

WLAN_OFF_LED# <3 8>

SLP_A# <16> TP_CLK <38> TP_DATA <38>

EC_PME# <18,35>

WL_PWREN_EC <34>

EC_SPI_SO <14> EC_SPI_SI <14> EC_SPI_CLK <14> EC_SPI_CS# <14>

TOUCH_ON# <30>

EC_FB_CLAMP_TGL_REQ# <18>

AOAC_PME# <16,17> BAT_CHG_LED <46> CAP_LOCK# <38>

PWR_LED# <39>

WLAN_ON_LED# <38>

100P_0402_50V8J

100P_0402_50V8J CK10

CK10

VCIN1_PH <46>

MAINPWON <49> EC_BKOFF# <30> PBTN_OUT# <16> PCH_PWR_EN <43> SA_PGOOD <5 2>

H_PECI <18,6>

20K ohm

12k ohm

160k ohm

240k ohm 330k ohm 560k ohm

EC_ACIN

PCH_VREG_EN# <20>

<1

118> Remove SYS_PWROK.

<SI> Update Pin119 and Pin120 net name

12

ECAGND

PV

33K ohm

2 1

DK1

H_PROCHOT#_EC<46>

EC_FB_CLAMP_TGL_REQ#

TP_CLK

TP_DATA

EC_LID_OUT# <18>

MV

56K ohm

CH751H-40PT_SOD323-2

CK8 100P_0 402_50V8JCK8 100P_ 0402_50V8J

VR_HOT#<53>

WR>

<P

1

14"15"

UMA

RK13

DIS

RK13

12

short@RK1 7

short@

1 2

VR_HOT#

H_PROCHOT#_EC

2N7002DWH_SOT363 -6

15K ohm0 ohm

130k ohm 200k ohm 270k ohm 430k ohm

ACIN <16,46,47,48>

RK17

0_0402_5%

34

5

Q10B

<1120>Combine wi th Q10.

1 2

RK60 10K_0402_5%DIS@RK60 10K_0402_5%DIS@

1 2

RK2 4.7K_0402_5%RK2 4.7K_0402_5%

1 2

RK4 4.7K_0402_5%RK4 4.7K_0402_5%

RP8

RK51

1 2

100K_0402_5%

18 27 36 45

PCH_PWR_EN PLT_RST# EC_ON EC_ACIN

100K_0804_8P4R_5%

VR_ON

<1112> Add it.

LID_SW#

RK44 47K_0 402_5%RK44 47K_0402_ 5%

SIDB

PV

27K ohm

PROCHOT# <46,6>

+3VALW_EC

+3VALW

12

MV

43K ohm

+3VL

+3VALW_EC

5

NMI_DBG#

4

21

DK2

CH751H-40PT_SOD323-2

NMI_DBG#_CPU <18>

Security Classif ication

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/29 2011/06/29

Compal Secret Data

Deciphered D ate

2

Compal Electronics, Inc.

Title

EC ENE-KB9012

Size Document Number Rev

Custom

LA-A999P

Date: Sheet of

1

41 58Friday, March 14, 2 014

0.1

WWW.AliSaler.Com

5

D D

C C

4

3

2

1

Green CLK no reserved.

B B

A A

BOM control

Platform Silego P/N Compal PN 25MHz(A) 32.768KHz 25MHz(B) 27MHz 8MHz Remark

Intel CRV UMA

Intel CRV Dis SLG3NB304VTR

Base on A32 32.768KHz use 10ppm, G-CLK 25MHz X'TAL use 10ppm.

5

SA000063300SLG3NB244VTR

SA000057I00

1 1 1

1 1 1 1

4

X X

X

GCLKUMA@

GCLKDIS@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/06/10 2014/07/01

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

GCLK

Size Doc ument Number Rev

LA-A999P

Date: Sheet of

1

58Friday, March 14, 2014

31

58Friday, March 14, 2014

31

58Friday, March 14, 2014

31

0.1

WWW.AliSaler.Com

A

+5VALW

+3VALW

1 1

+5VALW

SUSP#

Q21

1

VOUT1

VIN1

2

VOUT1

VIN1

3

4

5

6 7

TPS22966DPUR_SON14_2X3-D

ON1

VBIAS

ON2

VIN2 VIN2

GND

VOUT2 VOUT2

GPAD

CT1

CT2

B

+5VS_IN

14 13

1 2

12

C554 100P_0402_50V8JC554 100P_0402_50 V8J

11

1 2

10

C557 680P_0402_50V7KC557 680P_0402 _50V7K

9

+3VS_IN

8

15

J4

2

JUMP_43X118

J5

2

JUMP_43X118

C

@J4

@

10U_0603_6.3V6M

112

1

2

@J5

@

112

22U_0805_6.3V6M

C575

1

2

+3VS

C570

10U_0603_6.3V6M

C570

10U_0603_6.3V6M

1

2

+5VS

CC56

@

D

E

+1.5V to +1.5VS

<1111> Remove +1.5VS DCDC.

2 2

<1111> 5V / 3V ?? pull high voltage

+5VALW

R559

100K_0402_5%

Q17B

1 2

34

5

PCH_PWR_EN#<20>

PCH_PWR_EN<41>

3 3

AO4430L VGS Max=+/- 20V VGS(Th) max=2.5V

Rds Max=5.5m @VGS=10V Rds Max=7.5m @VGS=4.5V

4 4

PCH_PWR_EN#

PCH_PWR_EN

DMN66D0LDW-7_SOT363-6

+3VALW

Q30

Q30 AO3413L_SOT23-3

AO3413L_SOT23-3

123

DGS

1

@

C591

2

40mils

0.1U_0402_16V7K

+3V_PCH

1

1U_0402_6.3V6K

2

C590

12

R182

R182 22_0603_5%

22_0603_5%

61

2

Q15A

Q15A DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

SYSON#

SYSON< 41,50> SUSP# <10,41,50,51,52,5 5,58>

SYSON

+1.8VS+0.675VS +1.35V+VCCP

R183

R183 470_0603_5%

470_0603_5%

1 2 34

5

Q15B

DMN66D0LDW-7_SOT363-6

61

Q18A

DMN66D0LDW-7_SOT363-6

2

SUSPSUSP SYSON#SUSP

Q18B

SYSON SUSP SYSON# SUSP#

R184

R184 470_0603_5%

470_0603_5%

1 2 61

Q17A

Q17A DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

SUSP

34

DMN66D0LDW-7_SOT363-6

5

100K_0804_8P4R_5%

2

SUSP#

RPH16

SUSP <6>

+5VALW

18 27 36 45

R185

@R18 5

@

470_0603_5%

1 2 61

@

2

Q113A

Q113A DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

AO4430L VGS Max=+/- 20V VGS(Th) max=2.5V

Rds Max=5.5m @VGS=10V Rds Max=7.5m @VGS=4.5V

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/29 2011/06/29

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Documen t Number Rev

Custom

Date: Sheet of

D

Date: Sheet

Compal Electronics, Inc.

DC Interface

LA-A999P

E

0.1

of

43 58Friday, March 1 4, 2014

WWW.AliSaler.Com

5

4

3

2

1

NGFF and WLAN

D D

+3VS +3VS_W LAN

@

RL25

100K_04 02_5%

2

G

PCH_PCIE_ WAKE#< 16>

1 3

D

@

QB8

2N7002H _SOT23-3

QB8

S

PV# 2013.01.23 Add QB8 abd RL25 to support OBFF PV# 2013.02.22 Unpop QB4 and RL23 for not support OBFF

C C

100K_04 02_5%

MC_W AKE#PCH_PCIE_ WAKE#

1 2

MC_W AKE# <33>

B B

A A

Security Class ification

5

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

WAKE and RST-1

LA-A999P

0.1

of

44 58Friday, March 14, 2014

1

WWW.AliSaler.Com

A

B

C

D

+V3P3S

E

+3VALW_EC

RP7

2.2K

PU101 Charger IC BQ24738

1 1

EC SM Bus1 address

EC_SMB_CK1 EC_SMB_DA1

PJPB1 Smart Battery

U25 G

-sensor

HP3DC2TR

ENE

+3V_PCH

KBC9012

+3VS

+3V_PCH

RP24

RP7

2.2K

2 2

EC SM Bus2 address

EC_SMB_CK2

level shift

EC_SMB_DA2

+3VGS

RP24

2.2K

SML1CLK SML1DATA

Intel

SMBCLK SMBDATA

2.2K

level shift

+3V_PCH

+3VS

RP23

2.2K

PCH_SMBCLK PCH_SMBDATA

JDIMM1 JDIMM2

PCH

RV21 RV22

2.2K

Panther Point

SML0CLK SML0DATA

RP24

2.2K

NVIDIA N15V-GM (GB2-64) 595 ball BGA 23x23mm

3 3

I2CS_SCL I2CS_SDA

I2CC_SCL

I2CS_SCL I2CS_SDA

level shift

RV16 2.2K

I2CC_SDA

I2CB_SCL

RV16 2.2K

I2CB_SDA

I2CA_SCL I2CA_SDA

4 4

A

RV21 RV22

2.2K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/29 2011/06/29

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

I2C Mapping

LA-A999P

E

45 58Friday, March 14, 2014

0.1

WWW.AliSaler.Com

5

ADPIN

PJP1

@P JP1

@

ACES_59 012-0080N-002

D D

2

1

2

4

334

6

556

8

778

2

3

ESD@ PD 1

ESD@

1

L30ESD2 4VC3-2_SOT23-3

1

ADP_SIGNA L

ACIN_LEDCharge_LED

PD1

ADP_SIGNA L

2

3

PD2

ESD@ PD 2

ESD@

1

L30ESD2 4VC3-2_SOT23-3

12

PC1

EMI@ PC1

EMI@

PR1

PR1 10K_040 2_5%

10K_040 2_5%

1 2

12

100P_0402_50V8J

12

4

PL1

EMI@PL1

EMI@

HCB2012 KF-121T50_080 5

1 2

PL2

EMI@PL2

EMI@

HCB2012 KF-121T50_080 5

1 2

PC2

EMI@ PC2

EMI@

1000P_0402_50V7K

12

PD3

PR7

@ PD3

@

10K_0402_5%

GLZ3.6B_LL34-2

3

VIN

PR2

@P R2

@

0_0402_ 5%

AC_LED#<41>

12

PC4

PC3

EMI@ PC4

EMI@

EMI@ PC3

EMI@

1000P_0402_50V7K

100P_0402_50V8J

ADP_ID <41>

12

PC5

PC6

@ PC5

@

100P_0402_50V8J

1000P_0402_50V7K

BAT_CHG _LED< 41>

1 2

12

PR3

PR3 100K_04 02_5%

100K_04 02_5%

PR5

PR5 2K_0402 _5%

2K_0402 _5%

1 2

12

PR8

PR8 100K_04 02_5%

100K_04 02_5%

ACIN_LED

Charge_LED

2

1

+3VL

+5VS

C C

PROCHOT #<41,6>

61

PQ2A

PQ2A L2N7002 DW1T1G_SC 88-6

L2N7002 DW1T1G_SC 88-6

2

12

PD4

@PD 4

@

CD4148W N-1_1206-2

@P C8

@

0.022U_0 402_16V7K

12

PR13

1.5M_040 2_5%

PC8

1 2

@PR13

@

12

PR10 47K_040 2_1%

47K_040 2_1%

@PR10

@

PU1A

4

LM393DR _SO8

2

G

-

1

O

3

+

P

8

+3VALW

12

PR11

@PR11

@

10K_040 2_1%

12

PR12

@PR12

@

100K_04 02_1%

100P_0402_50V8J

100K_04 02_1%

B/I# <41,4 7>

PC9

@

ACIN

27,33,35,9

PR4 0_0402_ 5%

0_0402_ 5%

1 2

12

@

PD8

PR32

@

10K_0402_1%

@PR 4

@

10K_0402_1%

1 2

PC17

0.022U_0 402_16V7K

12

@

PR31

47K_0402_1%

CD4148WN-1_1206-2

@PC17

@

47K_0402_1%

G

2

1 3

PROCHOT # 27,35

S

PQ5

@

PQ5

@

LBSS84L T1G_SOT23-3

D

+5VS

ADP_I <4 1,48>

+3VALW

12

PC13

100P_0402_50V8J

12

PR18

10K_040 2_1%

12

PR21

100K_04 02_1%

ACIN <16,41,47 ,48>

PC12

1 2

12

PR17

PR17 47K_040 2_1%

47K_040 2_1%

PU1B

PU1B LM393DR _SO8

LM393DR _SO8

8

5

P

+

7

O

6

-

G

4

B B

34

PQ2B

PQ2B L2N7002 DW1T1G_SC 88-6

L2N7002 DW1T1G_SC 88-6

5

12

PD5

PD5 CD4148W N-1_1206-2

CD4148W N-1_1206-2

0.022U_0 402_16V7K

12

PR20

1.5M_040 2_5%

+3VALW _EC

12

PR25

PR25 10K_040 2_1%

10K_040 2_1%

12

PH1

PC15

100K_04 02_1%_NCP15W F104F03RC

@ PC15

@

0.1U_0402_16V7K

ECAGND <41>

12

PC16

@ PC16

@

12

PR26

5.9K_040 2_1%

12

PR27

PR27 10K_040 2_1%

10K_040 2_1%

0.1U_0402_16V7K

12

@P R28

@

10K_040 2_1%

VCIN1_PH <41>VCIN0_PH <41>

PR28

H_PROCHOT#_EC <41>

A A

Security Class ification

5

Security Class ification

2013/08/07

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/08/07

3

Compal Secret Data

Deciphered Date

2016/08/06

2

Compal Electronics, Inc.

Title

PWR-DC Conn

Size Doc ument Number Rev

LA-A998P

Date: Sheet of

Friday, March 14, 2014

Date: Sheet of

Friday, March 14, 2014

Date: Sheet of

Friday, March 14, 2014

1

5846

0.2

WWW.AliSaler.Com

5

D D

PJPB1

@P JPB1

@

1

2

3

4

5

6

7

8

9

GND

10

OCTEK_B TJ-08FUAB

C C

GND

2

3

ESD@

1

L30ESD2 4VC3-2_SOT23-3

BATT++ BATT+

PR19

PR19 100_040 2_5%

100_040 2_5%

1 2

PR22

PR22 100_040 2_5%

100_040 2_5%

1 2

12

PR30

PR29

100_0402_5%

100K_04 02_5%

1 2

B/I# <41,4 6>

PD6

+3VL

4

PL3

EMI@ PL3

EMI@

HCB2012 KF-121T50_080 5

1 2

PL4

EMI@ PL4

EMI@

HCB2012 KF-121T50_080 5

1 2

12

PC10

EMI@ PC10

EMI@

1000P_0 402_50V7K

2

EC_SMB_ DA1 <40,41,48>

EC_SMB_ CK1 <40,41,48>

3

PD7

ESD@

PD7

ESD@

1

L30ESD2 4VC3-2_SOT23-3

12

PC11

EMI@ PC11

EMI@

0.01U_04 02_25V7K

PQ1 SI4483ADY-T1-G E3_SO8

SI4483ADY-T1-G E3_SO8

1 2 3 6

PR14

@P R14

@

470K_04 02_5%

1 2

12

PR15

@PR15

@

470K_04 02_5%

2

34

5

PQ3B

@PQ3B

@

L2N7002 DW1T1G_SC 88-6

3

PJPB2

@P JPB2

@

2

112

JUMP_43 X118

@PQ 1

@

8 7

5

4

12

PR16

@PR16

@

4.7K_040 2_5%

61

PQ3A

@PQ3A

@

L2N7002 DW1T1G_SC 88-6

+3VL

12

PR23 220K_04 02_5%

220K_04 02_5%

61

BATT

@PR23

@

PQ4A

@PQ4A

@

L2N7002 DW1T1G_SC 88-6

2

12

PC14 100P_04 02_50V8J

100P_04 02_50V8J

2

+3VL

12

PR24

@PR24

@

220K_04 02_5%

34

@PC14

@

5

PQ4B

@PQ4B

@

L2N7002 DW1T1G_SC 88-6

Need to define " AC_AND_CHAG" si gnal with EC

ACIN <16,41,46 ,48>

AC_AND_ CHAG <41>

1

B B

A A

Security Class ification

5

Security Class ification

2013/08/07

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/08/07

3

Compal Secret Data

Deciphered Date

2016/08/06

2

Compal Electronics, Inc.

Title

PWR-BATT Conn

Size Doc ument Number Rev

LA-A998P

Date: Sheet of

Friday, March 14, 2014

Date: Sheet of

Friday, March 14, 2014

Date: Sheet of

Friday, March 14, 2014

1

5847

0.2

WWW.AliSaler.Com

A

13

D

2

PQ102

G

2N7002KW_SOT323-3

G

2N7002KW_SOT323-3

S

PR101

1 2

1M_0402_5%

PQ101

AON6414AL_DFN8-5

5

12

PC101

2200P_0402_50V7K

1M_0402_5%

1 1

2 2

4

1 2

3M_0402_5%

1 2 3

ACDRV1_CHG

PR102

S

PQ103

PQ103 AON7506_DFN33-8-5

AON7506_DFN33-8-5

1 2 3

12

PC102

0.1U_0402_25V6

12

PR108

4.12K_0603_1%

4

PR109

4.12K_0603_1%

P2VIN B+P1

5

+3VL

12

PC108

0.1U_0402_25V6

PR114

10K_0402_1%

1 2

PR103

0.01_1206_1%

1

2

1 2

PC106

0.1U_0402_25V6

4

3

ACN_CHG

ACP_CHG

CMSRC_CHG

ACDRV_CHG

ACIN<16,41,46,47>

3 3

12

PC109

0.1U_0402_25V6

PC111

1U_0603_25V6K

1 2

21

VIN

12

B

VIN

2

3

PD101

PD101 BAS40CW_SOT323-3

BAS40CW_SOT323-3

1

12

PR105

VCC_CHG

20

PU101

VCC

PAD

1

ACN

2

ACP

BQ24738RGRR_QFN20_3P5X3P5

3

CMSRC

4

ACDRV

5

ACPRES

ACDET6IOUT7SDA8SCL9ILIM

ACDET_CHG

PR117

422K_0402_1%

PL101

EMI@ PL101

EMI@

1.2UH_NRS4018T1R2NDGJ_2.6A_30%

1 2

PC110

0.047U_0402_25V7K

1 2

12

PD102

PD102 RB751V-40_SOD323-2

2.2_0603_5%

BST_CHG

17

BTST

RB751V-40_SOD323-2

PC112

1U_0603_25V6K

1 2

REGN_CHGILIM_CHG

16

REGN

15

LODRV

14

GND

13

SRP

12

SRN

11

BATDRV

10

12

PR116

100K_0402_1%

PR106

10_1206_1%

LX_CHG

DH_CHG

19

18

HIDRV

PHASE

IOUT_CHG

DH_CHG

DL_CHG

SRP_CHG

SRN_CHG

BATDRV_CHG

PR115

PR115 357K_0402_1%

357K_0402_1%

1 2

PC119

0.01U_0402_25V7K

12

PC123

@EMI@ PC123

@EMI@

PR112

0_0603_1%

1 2

PR113

0_0603_5%

1 2

+3VL

12

2200P_0402_50V7K

PR107

@PR107

@

0_0603_5%

1 2

CSOP1

CSON1

PC104

10U_0805_25V6K

12

PC105

10U_0805_25V6K

PQ106

AON7506_DFN33-8-5

PC118

0.1U_0603_16V7K

C

PQ104

PQ104 AON7506_DFN33-8-5

AON7506_DFN33-8-5

5

PR104

4.12K_0603_1%

1 2

12

PR111

@EMI@

SNB_CHG

12

PC117

@EMI@ PC117

@EMI@

PL102

4.7_1206_5%

680P_0603_50V8J

1 2

BATDRV1_CHG

CHG

CSOP1

12

PR110

0.01_1206_1%

1

2

PC113

0.1U_0402_25V6

BATDRV_CHG

5

PQ105

PQ105 AON7408L_DFN8-5

4

AON7408L_DFN8-5

123

4.7UH_ETQP3W4R7W FN_5.5A_20%

LX_CHG

5

123

1 2 3

4

12

4

3

CSON1

12

PC116

0.1U_0402_25V6

D

PC107

0.01U_0402_50V7K

BATT

12

PC114

PC115

PD103

RB551V-30_SOD323-2

PC115

10U_0805_25V6K

Vin Dectector

12

PC122

@PC122

@

0.1U_0402_10V7K

EC_SMB_CK1 <40,41,47>

EC_SMB_DA1 <40,41,47>

ADP_I <41,46>

Min. Typ Max. H-->L 17.23V L-->H 17.63V

ILIM and external DPM

3.61A

12

PR118

PC120

66.5K_0402_1%

0.1U_0402_25V6

@PR119

@

0_0402_5%

1 2

12

PC121

PC121 100P_0402_50V8J

100P_0402_50V8J

PR119

4 4

A

B

locate the RC Ne ar EC chip

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

2013/08/07 2016/08/06

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PWR-CHARGER

LA-A998P

D

48 58

0.2

WWW.AliSaler.Com

A

1 1

B+

2 2

3.3UH_PCMB063T-3R3MS_6.5A_20%

+3VALWP

3 3

Vo=3.4V

3.3UH_PCMB063T-3R3MS_6.5A_20%

1

+

PC316

2

220U_C6_6.3V_M_R15

PL301

EMI@ PL301

EMI@

HCB2012KF-121T50_0805

1 2

PL303

1 2

3/5V_B+

12

PC318

@EMI@ PC318

@EMI@

12

PC307

PC303

2200P_0402_50V7K

4.7U_0805_25V6-K

12

SNUB_3V

12

5

4.7U_0805_25V6-K

4.7U_0805_25V6-K PQ301

PQ301 AON7408L_DFN8-5

AON7408L_DFN8-5

123

5

PR311

4.7_1206_5%

@EMI@ PR311

@EMI@

PQ302

PQ302 AON7506_DFN33-8-5

AON7506_DFN33-8-5

123

PC311

@EMI@ PC311

@EMI@

680P_0603_50V8J

4

SPOK<16>

0.1U_0402_10V7K

EC_ON<41>

MAINPWON<41>

PC305

1 2

B

+3VALW

BST1_3V

12

PR318

PR318 10K_0402_1%

10K_0402_1%

2.2_0402_1%

1 2

3/5V_B+

PR309

100P_0402_50V8J

14K_0402_1%

BST_3V

DH_3V

LX_3V

LG_3V

499K_0402_1%

1 2

12

PC313

PR316

@PR316

@

0_0402_5%

1 2

PC302@

1 2

PR301

1 2

PR306

20K_0402_1%

1 2

10

PR313

0.1U_0603_25V7K

PR315

2.2K_0402_1%

1 2

FB_3V

5

FB2

6

PGOOD

7

BOOT2

8

UGATE2

9

PHASE2

LGATE2

VIN11ENLDO12ENM13LDO514LDO3

12

PR314

100K_0402_1%

12

ENTRIP_3V

4

FB=2V

12

PC315

@ PC315

@

4.7U_0603_6.3V6K

ENTRIP2

TON_35V

3

TON

PC314

1U_0603_10V6K

12

@PR317

@

100K_0402_5%

PR302

165K_0402_1%

1 2

PR303

56K_0402_1%

1 2

PR304

143K_0402_1%

1 2

FB_5V

ENTRIP_5V

2

1

FB=2V

FB1

ENTRIP1

BYP1

BOOT1

UGATE1

PHASE1

LGATE1

PU301

15

RT8243AZQW_WQFN2 0_3X3

+5VLP

+3VLP

PR317

PR305

30K_0402_1%

1 2

PR307

19.1K_0402_1%

1 2

21

PAD

20

19

18

17

16

+3VLP

12

4.7U_0603_10V6K

12

4.7U_0603_10V6K

C

PR310

2.2_0402_1%

1 2

BST_5V

DH_5V

LX_5V

LG_5V

PJ301

@PJ301

@

JUMP_43X39

2

112

PC310

PJ304

@PJ304

@

JUMP_43X39

112

PC309

+3VL

(100mA,40mils ,Via NO.= 2)

2

+VL

(100mA,40mils ,Via NO.= 2)

0.1U_0402_10V7K

BST1_5V

PC306

1 2

D

3/5V_B+

12

PC308

PC304

4.7U_0805_25V6-K

PQ303

PQ303 AON7408L_DFN8-5

AON7408L_DFN8-5

3 5

241

5

4

PQ304

123

AON7506_DFN33-8-5

PL302

2.2UH_ETQP3W2R2W FN_8.5A_20%

1 2

12

PR312

4.7_1206_5%

@EMI@ PR312

@EMI@

SNUB_5V

12

PC312

@EMI@ PC312

@EMI@

680P_0603_50V8J

PJ302

@PJ302

@

2

112

JUMP_43X118

PJ303

@PJ303

@

2

112

JUMP_43X118

+3VALW+3VALWP

+5VALW+5VALWP

Vo=5.14V

1

+

PC317

2

220U_C6_6.3V_M_R15

+5VALWP

4 4

Security Classification

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2013/08/07 2016/08/06

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PWR-3VALW/5VALW

LA-A998P

D

49 58

0.2

WWW.AliSaler.Com

5

EMI@

PLM1

HCB2012 KF-121T50_080 5

1 2

B+

D D

12

@EMI@

PCM13

PCM13 2200P_0 402_50V7K

2200P_0 402_50V7K

B+_DDR

12

PCM1

4.7U_080 5_25V6-K

4

12

PCM3

4.7U_080 5_25V6-K

3

PCM2

0.22U_04 02_10V6K

1 2

BST_DDR -1

PRM1

2.2_0402 _1%

1 2

2

1

+1.35V_VDDQP

+0.6V_0.675VSP

DH_DDR

PHASE

PGOOD

PCM11

BST_DDR

17

19

18

UGATE

TON

8

9

S5_DDR

TON_DDR

BOOT

S5

20

VTT

VLDOIN

VTTGND

VTTSNS

VTTREF

VDDQ

FB

S3

6

7

FB=0.75V

FB_DDR

S3_DDR

12

PRM8

PRM8 10K_040 2_1%

10K_040 2_1%

12

PCM12

@P CM12

@

0.1U_040 2_10V7K

21

PAD

1

2

3

GND

4

5

PRM5

8.06K_04 02_1%

1 2

VTTREF_ DDRT

+1.35V_VDDQP

Vo=1.3545V

PQM1

AON7408 L_DFN8-5

PLM2

1.5UH_PC MC063T-1R5MN_ 9A_20%

+1.35V_VDDQP

12

PCM16

C C

B B

PCM16

12

PCM18

PCM17

22U_0603_6.3V6M

+1.35V_VDDQP

+0.6V_0.675VSP

1.5UH_PC MC063T-1R5MN_ 9A_20%

12

PCM20

PCM19

22U_0603_6.3V6M

1 2

PCM21

22U_0603_6.3V6M

12

@EMI@

PRM2

4.7_1206 _5%

SNB_DDR

12

@EMI@

PCM7

PCM7 680P_06 03_50V7K

680P_06 03_50V7K

PJPM2

@P JPM2

@

112

JUMP_43 X118

PJPM1

@P JPM1

@

JUMP_43 X39

112

2

3 5

241

5

123

+1.35V

+0.675VS

PQM2

AON7506 _DFN33-8-5

4

+5VALW

PRM4

5.1_0603 _5%

1 2

PRM3

13.3K_04 02_1%

1 2

+5VALW

12

PCM8

PCM8 1U_0603 _10V6K

1U_0603 _10V6K

SYSON<41,43>

SUSP#< 10,41,43,51,52,55,58>

12

B+_DDR

DL_DDR

CS_DDR

VDD_DDR

PCM9

PCM9 1U_0603 _10V6K

1U_0603 _10V6K

PRM6

PRM6 432K_04 02_1%

432K_04 02_1%

1 2

PRM9

@P RM9

@

0_0402_ 5%

1 2

PRM11

@P RM11

@

0_0402_ 5%

1 2

LX_DDR

16

15

LGATE

14

PGND

13

PUM1

CS

RT8207P GQW_W QFN20_3X3

12

VDDP

11

VDD

10

12

@P CM11

@

0.1U_040 2_10V7K

12

+1.35V_VDDQP

12

PCM5

PCM4

PCM5

10U_0805_6.3V6K

12

PCM10

0.033U_0 402_16V7K

A A

Security Class ification

5

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/08/ 07

3

Compal Secret Data

Deciphered Date

2016/08/ 06

2

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet o f

Compal Electronics, Inc.

PWR-1.35V/0.675VS

LA-A998P

Friday, March 14, 2014

1

50 58

0.2Custom

WWW.AliSaler.Com

5

D D

4

12

PRH2

PRH2 1M_0402 _1%

1M_0402 _1%

3

12

@P CH1

@

0.22U_04 02_10V6K

PRH1

@P RH1

@

0_0402_ 5%

1 2

PCH1

2

EN pin don't floating If have pull down resistor at HW side, pls delete PR2

SUSP# <10,41,43,50,52,55,58>

1

continuous 6A peak 12A

@EMI@

PRH3

4.7_1206 _5%

EMI@

PLH1

HCB2012 KF-121T50_080 5

1 2

B+

C C

12

PCH4

EMI@ PCH4

EMI@

2200P_0402_50V7K

PGND put together

+3VS

12

PCH6

PCH5

4.7U_0805_25V6-K

VSS_SENSE_VCCIO<9>

PRH6

PRH6 10K_040 2_5%

10K_040 2_5%

1 2

PRH10

PRH10 10_0402 _1%

10_0402 _1%

1 2

VCCP_PWRGOO D<52>

B+_1.05V

ILMT_1.05V

PUH1

PUH1 SY8206DQN C_QFN10_3X3

SY8206DQN C_QFN10_3X3

8

IN

EN

GND

ILMT

PG

BS

LX

FB

BYP

LDO

9

3

2

1

6

10

4

7

5

PRH4

@P RH4

@

0_0603_ 5%

1 2

BST_1.05 V BST_1.05 Vn

LX_1.05V

FB=0.6V

FB_1.05V

LDO_3V

12

Pin 7 BYP is for CS. Common NB can delete +3VALW and PCH13

12

PCH12

4.7U_0603_6.3V6K

PCH13

4.7U_0603_6.3V6K

PCH3

0.1U_060 3_25V7K

1 2

+3VALW

4.7_1206 _5%

1 2

SNB_1.05 V

PLH2

1UH_PCM B063T-1R0MS_1 2A_20%

1 2

@EMI@

PCH2

680P_06 03_50V7K

1 2

12

PCH7

1 2

12

100K_04 02_1%

PRH7

PRH7 133K_04 02_1%

133K_04 02_1%

+1.05VSP

PJH1

@P JH1

@

JUMP_43 X118

12

JUMP_43 X118

PCH11

22U_0603_6.3V6M

112

Vo=

1.05V

12

PRH11

10_0402_1%

330P_0402_50V7K

PRH5

10_0402_1%

12

PCH8

22U_0603_6.3V6M

PCH9

22U_0603_6.3V6M

PRH12

@P RH12

@

0_0402_ 5%

1 2

12

PCH10

22U_0603_6.3V6M

+VCCP

2

VCCIO_SENSE <9>

+3VALW

12

PRH8

@P RH8

@

0_0402_ 5%

ILMT_1.05V

B B

A A

5

12

PRH9

@0@PRH9

@0@

0_0402_ 5%

The current limit is set to 6A, 9A or 12A when this pin

pull low, floating or pull high

is

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/08/ 07

3

Compal Secret Data

Deciphered Date

2016/08/ 06

2

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet o f

Compal Electronics, Inc.

PWR-1.05VS_VCCP

LA-A998P

Friday, March 14, 2014

LA-A998P

1

51 58

0.2Custom

WWW.AliSaler.Com

5

4

3

2

1

VID [0] VID[1] VCCSA Vout

0 0 0.9V

D D

0 1 0.85V 1 0 0.775V 1 1 0.75V

SY8037DDCC support CRV ULV VID table

12

680P_0603_50V7K

SNUB_+VCCSA

PRA1

EMI@ PRA1

EMI@

4.7_1206_5%

1 2

PLA2

PUA1

PLA1

EMI@ PLA1

EMI@

HCB1608KF-121T30_0603

+3VALW +VCCSAP

C C

1 2

+VCCSA_PWR_SRC +VCCSA_PHASE

PCA3

68P_0402_50V8J

2

PCA10

1

@EMI@ PCA10

@EMI@

12

2200P_0402_50V7K

+VCCSAP_FB

12

PCA2

PCA1

22U_0603_6.3V6M

PRA4

1 2

1K_0402_5%

PUA1

SY8037DDCC_DFN12_3x3

12

PVIN

11

PVIN

10

SVIN

9

12

FB

8

VOUT

7

VID1

The 1k PD on the VCCSA VIDs are empty. These should be stuffed to ensure that VCCSA VID is 00 prior to VCCIO stability.

1

LX

2

LX

3

LX

4

PG

5

+VCCSA_EN

EN

6

VID0

GND

13

PRA5

1 2

1K_0402_5%

PRA2

100K_0402_5%

12

PCA4

@ PCA4

@

PLA2

0.47UH_PCMB063T-R47MS_18A_20%

1 2

SA_PGOOD <41>

+3VS

1 2

PRA3

@PRA3

@

0_0402_5%

VCCP_PWRGOOD<51>

0.1U_0402_10V7K

VCCSA_VID0 <10>

VCCSA_VID1 <10>

12

PCA5

PCA6

22U_0603_6.3V6M

+VCCSAP (ULV) TD Peak Current 4A OCP current 8A

12

PCA7

PCA8

22U_0603_6.3V6M

PRA6

100_0402_5%

PRA7

@PRA7

@

0_0402_5%

1 2

C 3A

22U_0603_6.3V6M

12

VCCSA_SENSE <10>

PJ305

@PJ305

@

112

JUMP_43X118

2

+VCCSA+VCCSAP

B B

PU1801

FB=0.6V

PR1801

@ PR1801

@

0_0402_5%

1 2

PC1808

@ PC1808

@

0.1U_0402_16V7K

4

3

2

1

SY8003DFC_DFN8_2X2

PL1801

EMI@ PL1801

EMI@

HCB1608KF-121T30_0603

+3VALW

A A

5

1 2

1.8V_B+

12

PC1802

PC1801

PC1810

2200P_0402_50V7K

@EMI@ PC1810

@EMI@

SUSP#<10,41,43,50,51,55,58>

4

22U_0603_6.3V6M

PGND

IN

PG

FB

EN_1.8V

12

SGND PGND

5

NC

6

LX

7

EN

8 9

12

PR1803

PR1803 1M_0402_5%

1M_0402_5%

PL1802

2.2UH_MMD-04BZ-2R2M-X2_3A_20%

1 2

PR1804

20K_0402_1%

12

PR1805

10K_0402_1%

PR1802

4.7_1206_5%

@EMI@ PR1802

@EMI@

PC1807

680P_0402_50V7K

@EMI@ PC1807

@EMI@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

12

PC1803

PC1809

22P_0402_50V8J

Vo=1.8V

12

22U_0603_6.3V6M

2013/08/07

+1.8VSP

PC1806

22U_0603_6.3V6M

@PJ1801

@ JUMP_43X79

JUMP_43X79

Ipeak=1.308A ILIM = 4A F=1MHz

PJ1801

2

112

Compal Secret Data

Deciphered Date

2

+1.8VS+1.8VSP

Compal Electronics, Inc.

Title

2016/08/06

Title

Size Document Number Rev

Date: Sheet of

PWR-VCCSAP/1.8VSP

LA-A998P

Friday, March 14, 2014

LA-A998P

52 58

1

52 58

0.2C

WWW.AliSaler.Com

A

1 1

Close GFX choke

VSUMG-

10K_0402_1%_ERTJ0EG103FA

Design Note Thi

s circuit is for ULV 1+1 17W. CPU: IccMax=33A, TDC=16A(TDP NOM) Loadline: -2.9 m V/A Output Cap. follow Intel PDDG 330uF/9m*1, 560uF/4.5m*1 22uF_0603*12, 2.2uF_0402*16 GFX(GT2): IccMax=33A, TDC=21.5A Loadline: -3.9 m V/A Output Cap. follow Intel PDDG 560uF/4.5m*1, 22uF_0603*6, 10uF_0603*6 , 1uF_0402*11

Close GFX L/S MOS

2 2

VR_ON

VR_SVID_CLK<9>

VR_SVID_ALRT#<9>

VR_SVID_DAT<9>

For VR_HOT#, al ready pull high at po wer side.

VR_HOT#<41>

PCZ7

@ PCZ7

@

47P_0402_50V8J

12

61.9K_0402_1%

PRZ10

@PRZ10

@ 1 2

0_0402_5%

+VCCP +3VS

PRZ15 and PRG5

27.4K ohm for 100 degree

3 3

Layout Note SVID routing

1. Alert# signal must be routed between the Clock and Date lines to reduce the cross talk between them. Signal order arrangement: mobile order is Clock-Alert-Date.

4 4

2. SVID spacing requirement is 18mils(0.475mm).

3. Maximum total microstrip routing length of each SVID signal must not exceed 6000mils(152.4mm).

4. The SVID bus must be ground reference, It cannot be referenced to input (Vbat or 12V) power plans as they can couple noise into the SVID bus as power states change.

5. Avoid routing under noisy circuit, e.g. switch node , Gate driver, B+, Vin, high speed signal.

6. When SVID signal changes Layer, GND return path may be changed also. We need add GND via for GND reference.

61.9K ohm for 110 degree

470P_0402_50V7K

A

PCZ10

PCZ9

1 2

PRZ20

1.91K_0402_1%

1 2

2K_0402_1%

10K_0402_1%_ERTJ0EG103FA

12

PCG5

.1U_0402_16V7K

VSUMG+

PHG1

PHG1 470K +-5% ERTJ0EV474J 0402

470K +-5% ERTJ0EV474J 0402

1 2

PRG5

1 2

NTCG_1

12

PRZ13

PRZ12

130_0402_1%

499_0402_1%

12

PCZ8

@PCZ8

@

0.1U_0402_16V7K

Close CPU L/S MOS

PRZ17

1 2

PRZ19

499_0402_1%

1 2

VCCSENSE<9>

VSSSENSE<9>

100P_0402_50V8J

PRZ21

137K_0402_1%

1 2

PHG2

12

PRG9

5.1K_0402_1%

3.83K_0402_1%

1 2

12

PRZ14

PRZ18

42.2K_0402_1%

1 2

PCZ11

1 2

1000P_0402_50V8-J

PRG10

PRG6

54.9_0402_1%

12

11K_0402_1%

12

PCZ12

1 2

B

+5VS

12

NTC_1

12

PHZ1

470K +-5% ERTJ0EV474J 0402

B

PRG7

12

PCG7

PCG7 PCG6

PCG6

0.1U_0402_25V6

NTCG

VR_SVID_CLK

VR_SVID_ALRT#

VR_SVID_DAT

NTC

PRZ11

@PRZ11

@ 1 2

0_0402_5%

PRZ16

3.83K_0402_1%

PRZ15

61.9K_0402_1%

PCZ13

@ PCZ13

@

330P_0402_50V7K

1 2

PCZ14

0.01UF_0402_25V7K

6800P_0402_25V7K

12

2K_0402_1%

453_0402_1%

1 2

12

0.033U_0402_25V7K

1

2

3

4

5

6

7

8

VCC_AXG_SENSE

VSS_AXG_SENSE

PCG8

1 2

PRG8

32

33

31

PAD

ISUMPG

ISUMNG

NTCG

VR_ON

SCLK

PUZ1

PUZ1 ISL95833HRTZ-T_TQFN32_4X4

ISL95833HRTZ-T_TQFN32_4X4

ALERT#

SDA

VR_HOT#

NTC

ISEN2

ISEN19ISUMP10ISUMN11RTN12FB13COMP14PGOOD15BOOT1

C

12

PCG9

@ PCG9

@

1000P_0402_50V7K

12

PCG10

0.01UF_0402_25V7K

PCG11

120P_0402_50V8J

1 2

PRG12

137K_0402_1%

12

PRG14

13K_0402_1%

+3VS

12

PRG16 1.91K_0402_1%PRG16 1.91K_0402_1%

27

28

26

29

30

RTNG

25

FBG

BOOTG

COMPG

UGATEG

PGOODG

PHASEG

LGATEG

VCCP

VDD

PWM2

LGATE1

PHASE1

UGATE1

16

1 2

12

PRZ22

2K_0402_1%

PRZ23

422_0402_1%

12

PCZ15

6800P_0402_25V7K

Cn = L/((Rntcne t*Rsum)/(Rntcn et+Rsum))*DCR)

Cn is correctly selected, whe n the load curr ent has a

If square change, the output vol tage also has a square respons e.

PCG13

1000P_0402_50V8-J

1 2

BOOTA_GFX

UGA_GFX

PHASEA_GFX

LGA_GFX

24

23

22

21

20

19

LG1_CPU

18

PHASE1_CPU

17

UG1_CPU

BOOT_CPU

PRZ91.91K_0402_1% PRZ91.91K_0402_1%

12

PCZ16

0.033U_0402_25V7K

C

PCG12

470P_0402_50V7K

1 2

PRG11

499_0402_1%

1 2

PRG13

12

2.55K_0402_1%

PRG15

PRG15 2K_0402_1%

2K_0402_1%

12

PCG14

PCG14 470P_0402_50V7K

470P_0402_50V7K

+5VS

12

PRZ6

@PRZ6

@

1_0603_5%

PCZ5

1U_0603_10V6K

12

PCZ17

0.1U_0402_25V6

1_0603_5%

0_0603_5%

VGATE <16>

12

PRZ25

12

2.61K_0402_1%

12

Close CPU choke

PHZ2

10K_0402_1%_ERTJ0EG103FA

PRZ24 11K_0402_1%PRZ24 11K_0402_1%

12

PCZ18

.1U_0402_16V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

Layout Note

e

R

1. The AL bulk capacitor of B+ should be very close to CPU_CORE MOSFET.

2. Input ceramic caps must place on symmetry same location on top side and bottom side.

PRG1

@PRG1

@

0_0603_5%

1 2

UGA_GFX

PHASEA_GFX

1 2

BOOTA_GFX

2.2_0603_5%

LGA_GFX

12

PRZ7

VDD source use +5VS and PGOOD source use +3V S Please confirm power on and d own sequence, make sure VGATE after CPU_COR E on.

12

PCZ6

1U_0603_10V6K

PRZ1

@PRZ1

@

0_0603_5%

1 2

UG1_CPU

PHASE1_CPU

2.2_0603_5%

1 2

BOOT_CPU

LG1_CPU

VSUM+

VSUM-

UGA_GFX-1

PCG3

0.1U_0603_25V7K

PRG2

PRZ2

1 2

UG1_CPU-1

PCZ3

1 2

0.1U_0603_25V7K

Compal Secret Data

2013/08/07 2016/08/06

Compal Secret Data

D

duce Acoustic Noise

PQG1

PQG1 AON6932A_DFN5X6-8-7

AON6932A_DFN5X6-8-7

S2

2

D1

S2

1

G1

S2

7

S1/D2

G2

+CPU_B+

PQZ1

PQZ1 AON6932A_DFN5X6-8-7

AON6932A_DFN5X6-8-7

3

S2

2

D1

4

S2

1

G1

5

S2

7

S1/D2

6

G2

Deciphered Date

D

+CPU_B+

12

PCG1

3

0.22uH DCR= 0.9 7+-5% m ohm, I dc~Isat= 25~34A

4

5

PHASEA_GFX

6

12

@EMI@ PRG3

@EMI@

4.7_1206_5%

12

@EMI@ PCG4

@EMI@

680P_0402_50V7K

12

PCZ2

PCZ1

10U_0805_25V6K

0.22uH DCR= 0.97+-5% m ohm, Idc~Isat= 25~34A

PHASE1_CPU

12

PCZ19

PCG2

10U_0805_25V6K

EMI@PCZ19

EMI@

2200P_0402_50V7K

PLG1

0.22UH_PCME064T-R22MS_28A_20%

1 2

12

PRG3

PRG4

3.65K_0603_1%

PCG4

VSUMG+

FBMA-L11-322513-151LMA50T_1210

1

12

10U_0805_25V6K

PRZ3

4.7_1206_5%

@EMI@ PRZ3

@EMI@

PCZ4

680P_0402_50V7K

@EMI@ PCZ4

@EMI@

VSUM+

VSUM-

1

+

PCZ21

@

PCZ20

EMI@PCZ20

EMI@

2200P_0402_50V7K

100U_25V_M

2

PLZ1

0.22UH_PCME064T-R22MS_28A_20%

1 2

12

PRZ4

3.65K_0603_1%

Compal Electronics, Inc.

Title

PWR-CPU_CORE/GFX_CORE

e Document Number Rev

Size Document Number Rev

Siz

Date: Sheet of

E

OCP setting=39.9~44.99A

+VGFX_CORE

VSUMG-

PLZ2

EMI@ PLZ2

EMI@

1 2

PCZ22

100U_25V_M

B+

OCP setting=39.9~44.99A

+CPU_CORE

LA-A998P

E

53 58Friday, M arch 14, 2014

0.2

WWW.AliSaler.Com

5

4

3

2

1

D D

C C

B B

+CPU_CORE

1

+

PCZ101

PCZ101 330U_D2 _2V_Y

330U_D2 _2V_Y

2

12

PCZ104

22U_0603_6.3V6M

12

PCZ110

22U_0603_6.3V6M

12

PCZ116

2.2U_0402_6.3V6M

12

PCZ124

2.2U_0402_6.3V6M

1

+

PCZ102

PCZ102 560U_D2 _2VM_R4.5M

560U_D2 _2VM_R4.5M

2

12

PCZ105

22U_0603_6.3V6M

12

PCZ111

22U_0603_6.3V6M

12

PCZ117

2.2U_0402_6.3V6M

12

PCZ125

2.2U_0402_6.3V6M

PCZ107

PCZ106

22U_0603_6.3V6M

12

PCZ113

PCZ112

22U_0603_6.3V6M

12

PCZ118

PCZ119

2.2U_0402_6.3V6M

12

PCZ126

PCZ127

2.2U_0402_6.3V6M

CPU_CORE 330uF 9m *1 560uF 4.5m *1 22uF 0603 *12

2.2uF 0402 *16

560U_D2_2VM_R4.5M

1

PCG101

+

2

12

PCZ109

PCZ108

22U_0603_6.3V6M

12

PCZ114

22U_0603_6.3V6M

12

PCZ120

2.2U_0402_6.3V6M

12

PCZ128

2.2U_0402_6.3V6M

22U_0603_6.3V6M

12

PCZ115

22U_0603_6.3V6M

12

PCZ121

2.2U_0402_6.3V6M

12

PCZ129

2.2U_0402_6.3V6M

12

PCZ122

PCZ123

2.2U_0402_6.3V6M

12

PCZ131

PCZ130

2.2U_0402_6.3V6M

12

PCG103

PCG104

22U_0603_6.3V6M

1

PCG110

2

PCG109

2

12

PCG115

12

PCG121

10U_0603_6.3V6M

12

PCG116

1U_0402_6.3V6K

12

PCG122

1U_0402_6.3V6K

GFX_CORE 560uF 4.5m *1 22uF 0603 *6 10uF 0603 *6

12

PCG106

PCG105

1

PCG111

2

12

PCG117

12

PCG123

22U_0603_6.3V6M

1

PCG112

2

10U_0603_6.3V6M

12

PCG118

1U_0402_6.3V6K

12

PCG124

1U_0402_6.3V6K

12

PCG108

PCG107

22U_0603_6.3V6M

1

PCG114

2

PCG113

2

12

10U_0603_6.3V6M

12

PCH113

1U_0402_6.3V6K

12

PCG119

PCG120

1U_0402_6.3V6K

PCG125

1U_0402_6.3V6K

12

PCH123

1U_0402_6.3V6K

PCH10310U_0603_6.3V6M PCH10310U_0603_6.3V6M

1 2

12

PCH114

PCH115

1U_0402_6.3V6K

12

PCH125

PCH124

1U_0402_6.3V6K

PCH10510U_0603_6.3V6M PCH10510U_0603_6.3V6M

PCH10410U_0603_6.3V6M PCH10410U_0603_6.3V6M

1 2

12

PCH116

1U_0402_6.3V6K

12

PCH126

1U_0402_6.3V6K

12

PCH10710U_0603_6.3V6M PCH10710U_0603_6.3V6M

PCH10610U_0603_6.3V6M PCH10610U_0603_6.3V6M

1 2

12

PCH117

1U_0402_6.3V6K

12

PCH127

1U_0402_6.3V6K

12

PCH133

1U_0402_6.3V6K

PCH10810U_0603_6.3V6M PCH10810U_0603_6.3V6M

1 2

12

PCH118

1U_0402_6.3V6K

12

PCH128

1U_0402_6.3V6K

12

PCH134

1U_0402_6.3V6K

VCCP 330uF 9m *2 10uF 0603 *10 1uF 0402 *26

330U_D2_2V_Y

PCH11010U_0603_6.3V6M PCH11010U_0603_6.3V6M

PCH10910U_0603_6.3V6M PCH10910U_0603_6.3V6M

1 2

12

PCH119

PCH120

1U_0402_6.3V6K

12

PCH130

PCH129

PCH135

1U_0402_6.3V6K

12

PCH136

1U_0402_6.3V6K

1uF 0402 *11

+VCCP+VGFX_CORE

330U_D2_2V_Y

1

+

2

1

PCH101

PCH102

+

2

PCH11210U_0603_6.3V6M PCH11210U_0603_6.3V6M

PCH11110U_0603_6.3V6M PCH11110U_0603_6.3V6M

1 2

12

PCH122

PCH121

12

PCH131

12

PCH137

1U_0402_6.3V6K

12

PCH132

1U_0402_6.3V6K

12

PCH138

1U_0402_6.3V6K

A A

Security Class ification

5

Security Class ification

2013/08/ 07 2016/08/ 06

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/08/ 07 2016/08/ 06

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR-CPU_CORE DECOUPLING

LA-A998P

QFKAA

1

54 58Friday, March 14, 2014

0.2

WWW.AliSaler.Com

A

1 1

UMA@

PU1501

FB_1.5V

PJ1501

@P J1501

@

JUMP_43 X79

+3VALW

2 2

JUMP_43 X79

112

2

12

PC1501

22U_0603_6.3V6M

UMA@ PC1501

UMA@

VIN_1.5V LX_1.5V

1

FB

2

PG

3

IN

4

PGND

SY8003DFC _DFN8_2X2

PGND SGND

B

12

@UMA@

PC1502

.1U_0402 _16V7K

9 8

7

EN_1.5V

EN

6

LX

5

NC

UMA@

PL1501

1UH_PH0 41H-1R0MS_3.8A _20%

1 2

12

@EMIUMA@

PR1504

4.7_0603 _5%

12

@EMIUMA@

PC1506

PC1506 680P_04 02_50V7K

680P_04 02_50V7K

12

UMA@

PR1505

30.1K_04 02_1%

12

UMA@

PR1506

PR1506 20K_040 2_1%

20K_040 2_1%

12

UMA@

PR1503

PR1503 1M_0402 _5%

1M_0402 _5%

12

UMA@

PC1503

PC1503 68P_040 2_50V8J

68P_040 2_50V8J

UMA@

PR1502

PR1502 0_0402_ 5%

0_0402_ 5%

1 2

C

SUSP# <10,41,43,50,51,52,58>

+1.5VSP

12

PC1504

22U_0603_6.3V6M

UMA@ PC1504

UMA@

PJ1502

@P J1502

@

JUMP_43 X79

112

12

PC1505

22U_0603_6.3V6M

UMA@ PC1505

UMA@

+1.5VS

2

continuous 3A

D

3 3

4 4

Security Class ification

A

Security Class ification

2013/08/07

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2013/08/07

Compal Secret Data

Deciphered Date

C

2016/08/06

Compal Electronics, Inc.

Title

PWR-1.5VS

Size Doc ument Number Rev

LA-A998P

Date: Sheet of

Friday, March 14, 2014

Date: Sheet of

Friday, March 14, 2014

Date: Sheet of

Friday, March 14, 2014

D

5855

0.2

WWW.AliSaler.Com

5

D D

12

VGA@

PCV1

PCV1 1U_0402 _6.3V6K

1U_0402 _6.3V6K

C C

VGA@

PRV13

VGA@

PRV12

PRV12 100_040 2_1%

100_040 2_1%

1 2

@VGA@

PRV16

VSSSENSE_VGA<25>

B B

VCCSENSE_VGA<24>

1. VSNS Soft-Start time (Internal) is 0.7ms (PCV17 un-pop) Tss=(Css*Vrefin)/Iss+2.3ms =0.01U*0.9V/5uA+2.3ms=4.1ms (PCV17 pop)

2. Switching frequency setting: Fsw=(Vin-0.5)/(2*Vin*Rton*3.2p)=448Khz

A A

3. Thermal mo nitoring: (VGPU_VREF-VTSNS)/PRV21=VTSNS/Rth

T_min T_typical

PRV21=18.7K

PRV21=13K

96.73C 100C 103.1C

106.38C 110C 113.4C

+VGA_CORE

5

VGA@

PRV18

PRV18 100_040 2_1%

100_040 2_1%

1 2

T_max

PRV16 0_0402_ 5%

0_0402_ 5%

1 2

@VGA@

PRV17

PRV17 0_0402_ 5%

0_0402_ 5%

1 2

12

@VGA@

PCV16

PCV16 47P_040 2_50V8J

47P_040 2_50V8J

GPU_B+

PRV13 340K_04 02_1%

340K_04 02_1%

1 2

Rton

1

@VGA@

PCV14

0.01UF_0 402_25V7K

2

12

VGA@

PCV23

PCV23 1U_0402 _6.3V6K

1U_0402 _6.3V6K

Rref2

VGA@

PRV8

6.2K_04 02_1%

1 2

4

@VGA@

PRV4

PRV4 0_0402_ 5%

0_0402_ 5%

1 2

Rboot

@VGA@

PCV7

0.01U_04 02_16V7K

1 2

VGA@

PRV11

1.74K_0 402_1%

1 2

GPU_VREF

GPU_HOT#<41>

4

12

Rref1

VGA@

PRV3

7.5K_04 02_1%

VGA@

PRV5

PRV5 27K_040 2_1%

27K_040 2_1%

1 2

Rrefadj

12

VGA@

PCV8

PCV8 5600P_0 402_50V7 K

5600P_0 402_50V7 K

C

GPU_FBRTN

7

GPU_REFIN

8

GPU_VREF

9

GPU_TON

10

GPU_FBRTN

11

GPU_FB

12

GPU_COMP

1

@VGA@

PCV17

0.01U_04 02_16V7K

2

Css

12

VGA@

PRV21

18.7K_0 402_1%

12

VGA@

PHV1

PHV1 470K +-5% ERTJ0EV474J 0402

470K +-5% ERTJ0EV474J 0402

VGA@

PRV25

PRV25 100K_04 02_1%

100K_04 02_1%

1 2

+3VS

GPU_VID

GPU_REFADJ

5

6

VID

REFADJ

REFIN

VREF

TON

VGA@

PUV1

RGND

RT8813AGQ W_WQFN 24_4X4

VSNS

SS

TALERT/ISEN2

TSNS/ISEN3

GND

14

13

25

GPU_HOT#

GPU_TSNS/ISEN3

GPU_PSI

4

PSI

VCC/ISNE1

15

GPU_DSBL/ISEN1

@VGA@

PRV1

PRV1 1K_0402 _5%

1K_0402 _5%

1 2

@VGA@

PRV2

PRV2 0_0402_ 5%

0_0402_ 5%

1 2

@VGA@

PRV26

PRV26 1K_0402 _5%

1K_0402 _5%

1 2

@VGA@

PRV6

PRV6 0_0402_ 5%

0_0402_ 5%

1 2

@VGA@

PRV28

PRV28 10K_040 2_5%

10K_040 2_5%

1 2

U2_BOOT1

GPU_ENGPU_PGOOD1

U2_UGATE1

1

2

3

EN

UGATE1

PGOOD

17

16

U2_UGATE2

U2_BOOT2

BOOT1

GND/PWM3

BOOT218UGATE2

+3VGS

12

+3VGS

NVVDD_PW M_VID <22>

+3VGS

PSI Pull high on HW side

NVVDD_PS I <22>

PRV27

@VGA@ PRV27

@VGA@

1K_0402 _5%

1 2

VGA@ PRV9

VGA@

1K_0402 _5%

1 2

12

@VGA@

PCV9

0.1U_040 2_25V6

Reserve Location

24

U2_PHASE 1

PHASE1

23

U2_LGATE1

LGATE1

22

U2_PWM 3

21

PVCC

20

U2_LGATE2

LAGTE2

19

U2_PHASE 2

PHASE2

VGA@

PRV22

PRV22 10K_040 2_1%

10K_040 2_1%

DGPU_PW ROK <1 8,25>

3

Operation phase Number PSI Voltage setting

1 phase with DEM 0V to 0.8V

1 phase with CCM 1.2V to 1.8V

Active phase with CCM 2.4V to 5.5V

+3VGS

PRV9

Pull high on HW side

DGPU_PW R_EN <17,25,41>

+5VS

VGA@

PRV24

2.2_060 3_5%

1 2

12

VGA@

PCV27

PCV27 1U_0402 _6.3V6K

1U_0402 _6.3V6K

3

2

GPU_B+

12

4

VGA@

PQV2

VGA@

PCV18

VGA@

PQV4

Deciphered Date

5

4

@VGA@

PRV10

PRV10 0_0603_ 5%

0_0603_ 5%

VGA@

PRV7

2.2_060 3_5%

1 2

VGA@

PRV19

2.2_060 3_5%

1 2

VGA@

PCV5

0.22U_06 03_25V7K

1 2

MDU1511RH _POWERDFN5 6-8-5

12

VGA@

PRV15

12.7K_0 402_1%

Rocset

@VGA@

PRV20

PRV20 0_0603_ 5%

0_0603_ 5%

1 2

0.22U_06 03_25V7K

1 2

MDU1511RH _POWERDFN5 6-8-5

Compal Secret Data

2013/08/07 2016/08/06

Compal Secret Data

2

U2_UGATE1

U2_BOOT1

U2_PHASE 1

U2_LGATE1

U2_UGATE2

U2_BOOT2

U2_PHASE 2

U2_LGATE2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

PCV3

2200P_0402_50V7K

EMIVGA@ PCV3

EMIVGA@

VGA@

PQV1

PQV1 SIR472DP -T1-GE3_POW ERPAK8-5

SIR472DP -T1-GE3_POW ERPAK8-5

123

5

12

SNB_VGA1

123

12

5

PCV20

EMIVGA@ PCV20

EMIVGA@

VGA@

PQV3

PQV3 SIR472DP -T1-GE3_POW ERPAK8-5

SIR472DP -T1-GE3_POW ERPAK8-5

123

5

12

123

12

PCV4

VGA@ PCV4

VGA@

10U_0805_25V6K

PLV2

VGA@ PLV 2

VGA@

0.22UH_P CME064T-R22MS_ 28A_20%

1 2

@EMIVGA@

PRV14

4.7_120 6_5%

@EMIVGA@

PCV15

PCV15 680P_06 03_50V7K

680P_06 03_50V7K

12

PCV21

VGA@ PCV21

VGA@

2200P_0402_50V7K

10U_0805_25V6K

PLV3

VGA@ PLV3

VGA@

0.22UH_P CME064T-R22MS_ 28A_20%

1 2

@EMIVGA@

PRV23

4.7_120 6_5%

SNB_VGA2

@EMIVGA@

PCV26

PCV26 680P_06 03_50V7K

680P_06 03_50V7K

1

EMIVGA@

PLV1

HCB2012K F-121T50_08 05

1 2

PCV6

VGA@ PCV6

VGA@

10U_0805_25V6K

1

+

PCV19

2

VGA@

1

+

PCV12

2

390U_2.5V_M

VGA@

B+

100U_25V_M

+VGA_CORE EDP-Continuous 33.5A EDP-Peak 51.5A OCP 66A

1

+

2

Co-Lay Co-Lay

GPU_B+

12

PCV22

VGA@ PCV22

VGA@

10U_0805_25V6K

+VGA_CORE

1

+

PCV25

2

390U_2.5V_M

VGA@

Co-Lay

Compal Electronics, Inc.

Title

PWR-VGA_CORE

Size Document Numb er Rev

Date: Sheet of

LA-A998P

1

56 5 8Friday, March 14, 2014

+VGA_CORE

PCV10

390U_2.5V_M

VGA@

0.2

WWW.AliSaler.Com

A

B

C

D

E

+VGA_CORE

PLACE UNDER GPU

1 1

12

VGA@

PCV51

4.7U_0603_6.3V6M

12

VGA@

PCV52

4.7U_0603_6.3V6M

12

VGA@

PCV53

4.7U_0603_6.3V6M

12

VGA@

PCV54

4.7U_0603_6.3V6M

12

VGA@

PCV55

4.7U_0603_6.3V6M

12

VGA@

PCV56

4.7U_0603_6.3V6M

2 2

12

VGA@

PCV61

PCV61 1U_0402_6.3V6K

1U_0402_6.3V6K

12

VGA@

PCV57

4.7U_0603_6.3V6M

12

VGA@

PCV62

PCV62 1U_0402_6.3V6K

1U_0402_6.3V6K

12

VGA@

PCV58

4.7U_0603_6.3V6M

12

VGA@

PCV63

PCV63 1U_0402_6.3V6K

1U_0402_6.3V6K

12

VGA@

PCV59

4.7U_0603_6.3V6M

12

VGA@

PCV64

PCV64 1U_0402_6.3V6K

1U_0402_6.3V6K

12

VGA@

PCV60

4.7U_0603_6.3V6M

PLACE NEAR GPU

12

VGA@

PCV65

4.7U_0603_6.3V6K

3 3

12

VGA@

PCV70

PCV70 22U_0603_6.3V6M

22U_0603_6.3V6M

12

VGA@

PCV66

4.7U_0603_6.3V6K

12

VGA@

PCV71

PCV71 47U_0805_6.3V6M

47U_0805_6.3V6M

12

VGA@

PCV67

4.7U_0603_6.3V6K

12

VGA@

PCV68

4.7U_0603_6.3V6K

12

VGA@

PCV69

4.7U_0603_6.3V6K

4 4

Security Classification

2013/08/07 2016/08/06

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/08/07 2016/08/06

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PWR-VGA CHIP DECOUPLING

Size Docum ent Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

LA-A998P

57 5 8Friday, March 14, 2014

E

0.2

WWW.AliSaler.Com

5

D D

EMIVGA@

PLW1

HCB2012 KF-121T50_080 5

1 2

B+

C C

12

PCW3

PCW4

VGA@ PCW4

VGA@

4.7U_0805_25V6-K

2200P_0402_50V7K

EMIVGA@ PCW3

EMIVGA@

B+_VRAM PWR

12

PCW6

VGA@ PCW6

VGA@

4.7U_0805_25V6-K

VGA@

PUW1

8

IN

9

GND

3

ILMT

2

PG

SY8206DQN C_QFN10_3X3

4

@VGA@

1

EN_VRAM PWR

EN

6

BST_VRA MPWR BST_VRAMPW Rn

BS

10

LX_VRAM PWR

LX

4

FB_VRAM PWR

FB

7

BYP

5

LDO

@VGA@

PRW4

PRW4 0_0603_ 5%

0_0603_ 5%

1 2

FB=0.6V

12

VGA@

PCW1 3

4.7U_060 3_6.3V6K

12

VGA@

PRW2

PRW2 1M_0402 _1%

1M_0402 _1%

0.1U_060 3_25V7K

+3VALW

12

VGA@

PCW1 2

4.7U_060 3_6.3V6K

VGA@

PCW5

1 2

@VGA@

PRW1

PRW1 0_0402_ 5%

0_0402_ 5%

1 2

12

@VGA@

PCW1

0.01UF_0 402_25V7K

@EMIVGA@

PRW3

4.7_1206 _5%

1 2

1.5UH_PCMC063T-1R5MN_9 A_20%

1 2

3

SUSP# <10,41,43,50,51,52,55>

680P_06 03_50V7K

SNB_VRA MPWR

VGA@

PLW2

@EMIVGA@

PCW2

1 2

12

VGA@

PRW5

30.1K_04 02_1%

12

VGA@

PRW6

19.6K_04 02_1%

12

VGA@

PCW7

PCW7 330P_04 02_50V7K

330P_04 02_50V7K

2

1

+1.5VDIS +1.5VS

PJW 1

@P JW1

@

JUMP_43 X118

Vo=1.503V

12

PCW8

22U_0603_6.3V6M

VGA@ PCW8

VGA@

12

PCW9

22U_0603_6.3V6M

VGA@ PCW9

VGA@

12

PCW10

22U_0603_6.3V6M

VGA@ PCW10

VGA@

JUMP_43 X118

2

112

12

PCW11

22U_0603_6.3V6M

VGA@ PCW11

VGA@

continuous 6A peak 9A

B B

A A

Security Class ification

5

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/08/ 07

3

Compal Secret Data

Deciphered Date

2016/08/ 06

2

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet o f

Compal Electronics, Inc.

PWR-VRAM Power

LA-A998P

Friday, March 14, 2014

LA-A998P

1

58 58

0.2Custom

Compal SLC M Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual