Compal Sapporo 300P Schematic

A

1 1

B

C

D

E

2 2

Sapporo 300P Rev 0.3 Schematics Document

Intel Prescott uFCPGA-478 / P4 Northwood

with Springdale / ICH5 / nVIDIA NV36M / HDTV chipset

2003 / 11 / 25

3 3

4 4

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Sapporo 300P

Date: Sheet of

A

B

C

D

星期一

Cover Sheet

, 01, 2003

十二月

157

E

0.3

A

B

C

D

E

Compal Confidential

File Name : DBQ02

1 1

HDTV Decode

page 23

CRT Connector

page 22

Fan Control

VGA

page 45

AGP BUS(8X)

NV36M

LVDS Interface

page 22

TV OUT Connector
(4Pin Reverse)

2 2

page 22

page 16,17,

PIRQA#

18,19

VRAM DDR
128MB/64MB (FBGA)

page 20,21

Desktop Prescott uFCPGA-478 CPU

Desktop Northwood uFCPGA-478 CPU

page 4,5,6

PSB

400/533/667/800MHz

H_D#(0..63)H_A#(3..31)

Intel Springdale MCH

FCBGA-932

page 7,8,9,10,11

Hub-Link

Thermal Sensor
ADM1032AR

Memory BUS(DDR)

2.5V DDR- 200/266

USB2.0

Clock Generator

ICS 952623

page 5

DDR-SO-DIMM X2

BANK 0, 1, 2, 3

page 12,13,14

USB Conn *4

MDC & BT Conn

page 15

page 37

page 38

3.3V 33 MHz

IDSEL: AD18

IDSEL: AD16
PIRQA#, GNT0#, REQ0#

IEEE 1394
TSB43AB21

page 30

RTC CKT.

3 3

PIRQC#, PIRQD#
GNT1#, REQ1#

Mini PCI
socket

page 29

IDSEL: AD17
PIRQB#, GNT3#, REQ3#

LAN

RTL 8101L

page 26

RJ45/11 CONN

page 26

IDSEL: AD20
PIRQB#, SIRQ, GNT2#, REQ2#

CardBus Controller
Toshiba TC6385XB

PCI BUS

Slot 0,1

page 28

page 27,28

SD Conn.

page 27

Intel ICH5

mBGA-460

page 23,24,25

LPC BUS

AC-LINK

ATA-100

Primary IDE

Secondary IDE

ATA-100

master

AC97 Codec

YMF753

page 31

HDD

Connector

page 35

master/slave

HW EQ CKT

page 32

Audio AMP

page 32

Softwave DJ

page 34

Power OK CKT.

page 41

Power On/Off CKT.

DC/DC Int erface CKT.

4 4

Touch Pad

page 44

EC I/O Bu ffer

page 40

NS87591L

EC

page 39

BIOS (1MB)

Int.KBD

page 39

page 40

SMsC LPC47N227

PARALLEL

page 38

Super I/O

FIR

page 37

page 36

Floppy

Module Conn.

(Main Module)

page 35

Module Conn.

(2nd Module)

page 35

Power Circuit DC/DC

A

Title

THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Block Diagram

Sapporo 300P

星期一 十二月

003

0.3

of

257, 01, 2

E

A

B

C

D

E

Voltage Rails

STATE

Power Plane Description

1 1

2 2

VIN
B+
+CPU_CORE
+CPU_VID
+VT T _GMCH +1.225V (Prescott) / +1.45V (Northwood)
+VGA_CORE ON OFF OF F1.3V switched power rail for VGA chip
+1.25VS 1.25V switched power rail
+1.5VS
+2.5V
+2.5VS 2.5V switched power rail
+3VALW
+3V
+3VS
+5VALW
+5V
+5VS

+RTCVCC

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Adapter power supply (19V)
AC or batte ry power rail for power circuit.
Core voltage for CPU

1.2V switched power rail for CPU AGTL Bus

AGP 4X/8X

2.5V power rail

3.3V always on power rail

3.3V power rail

3.3V switched power rail
5V always on power rail
5V power rail
5V switched power rail
12V always on power rail
RTC power

S1 S3 S5

N/A N/A N/A

N/AN/AN/A
ON OFF
ON OFF
ON OFF OF F

ON OFF OF F
ON OFF OF F
ON
ON
ON
ON
ON
ON
ON ON
ON
ON+12VALW
ON

OFF

OFF

OFF

ON

OFF

OFF
ON ON*

OFF

ON
OFF

OFF

ON

ON*

OFF

OFF

OFF

ON

ON*

ON

ON

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

Board ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6
7 NC

SIGNAL

SLP_S1# SLP_S3#

HIGH HIGH HIGH HIGH

LOW

LOW

LOW LOW LOW LOW

100K +/- 5%Ra

Rb V min

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

SLP_S4# SLP_S5# +VALW +V +VS Clock

ON

ON

ON

OFF

OFF

V

AD_BID

ON ON

ON

OFF

OFF

OFF

max

LOW

AD_BID

0 V

HIGH

LOWLOWLOW

ON

HIGHHIGHHIGH

HIGH

HIGH

ON

ON

ON

ON

Vtyp

AD_BID

0 V 0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

2.200 V

3.300 V

2.341 V

3.300 V

LOW

OFF

OFF

OFF

External PCI Devices

Device IDSEL # REQ # / GNT # Interrupts

VGA

CardBus

LAN

Mini-PCI

1394

3 3

SD

AD20

AD17

AD18
AD16 0
AD22

EC SM Bus1 address

Device

Smart Battery
EEPROM(24C16/02)

(24C04)

Address Address

1010 000X b
1011 000Xb

2

3PIRQB

1/4

EC SM Bus2 address

Device

ADM1032
OZ168

PIRQA
PIRQA/PIRQB

PIRQC/PIRQD
PIRQA

1001 110X b0001 011X b
0011 0100 b

Board ID

0
1
2
3
4
5
6
7

PCB Revision

0.1

0.2

0.3

ICH5 SM Bus address

Device

4 4

Clock Generator
( ICS 952623)

DDR DIMM0

DDR DIMM2

A

Address

1101 001Xb

1001 000Xb
1001 001Xb

Compal Electronics, Inc.

Title

Size Document Number Rev

B

B

C

D

Date: Sheet of

Sapporo 300P

星期一

, 01, 2003

十二月

Notes

357

E

0.3

5

4

+CPU_CORE

3

2

1

D D

H_A#[3..31]7

C C

H_REQ#[0..4]7

H_ADS#7

R43 @62_0402_5%

+CPU_CORE
+CPU_CORE

B B

1 2
1 2

R103 200_0402_5%

H_BR0#7
H_BPRI#7
H_BNR#7
H_LOCK#7

CLK_BCLK15

CLK_BCLK#15

H_HIT#7
H_HITM#7

H_DEFER#7

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_IERR#

CLK_BCLK
CLK_BCLK#

AMP_3-1565030-1_Prescott

AF22
AF23

A10

A12

A14

JCPU1A

VCC_0

VCC_1

K2

A#3

K4

A#4

L6

A#5

K1

A#6

L3

A#7

M6

A#8

L2

A#9

M3

A#10

M4

A#11

N1

A#12

M1

A#13

N2

A#14

N4

A#15

N5

A#16

T1

A#17

R2

A#18

P3

A#19

P4

A#20

R3

A#21

T2

A#22

U1

A#23

P6

A#24

U3

A#25

T4

A#26

V2

A#27

R6

A#28

W1

A#29

T5

A#30

U4

A#31

V3

A#32

W2

A#33

Y1

A#34

AB1

A#35

J1

REQ#0

K5

REQ#1

J4

REQ#2

J3

REQ#3

H3

REQ#4

G1

ADS#

AC1

AP#0

V5

AP#1

AA3

BINIT#

AC3

IERR#

H6

BR0#

D2

BPRI#

G2

BNR#

G4

LOCK#

BCLK0
BCLK1

F3

HIT#

E3

HITM#

E2

DEFER#

VCC_2

VSS_0H1VSS_1H4VSS_2

A16

VCC_3

AA16

AA18

AA8

AB11

AB13

AB15

AB17

AB19

AB7

AB9

AC10

AC12

AC14

AC16

AC18

AC8

AD11

AD13

AD15

AD17

AD19

AD7

AD9

AE10

AE12

AE14

AE16

AE18

AE20

AE6

AE8

AF11

AF13

AF15

AF17

AF19

AF2

AF21

AF5

AF7

AF9

B11

B13

B15

B17

B19

C10

C12

C14

C16

C18

C20

D11

D13

D15

D17

D19

D9

VCC_65C8VCC_66

VCC_84

VCC_85

F9

F11

VCC_67

VCC_68

VCC_79E8VCC_80

E20

VCC_69

VCC_78

E18

VCC_70

VCC_77

E16

E10

VCC_71D7VCC_72

VCC_75

VCC_76

E12

E14

VCC_73

VCC_74

D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63

H_D#0

B21

D#0

H_D#1

B22

D#1

H_D#2

A23

D#2

H_D#3

A25

D#3

H_D#4

C21

D#4

H_D#5

D22

D#5

H_D#6

B24

D#6

H_D#7

C23

D#7

H_D#8

C24

D#8

H_D#9

B25

D#9

H_D#10

G22

H_D#11

H21

H_D#12

C26

H_D#13

D23

H_D#14

J21

H_D#15

D25

H_D#16

H22

H_D#17

E24

H_D#18

G23

H_D#19

F23

H_D#20

F24

H_D#21

E25

H_D#22

F26

H_D#23

D26

H_D#24

L21

H_D#25

G26

H_D#26

H24

H_D#27

M21

H_D#28

L22

H_D#29

J24

H_D#30

K23

H_D#31

H25

H_D#32

M23

H_D#33

N22

H_D#34

P21

H_D#35

M24

H_D#36

N23

H_D#37

M26

H_D#38

N26

H_D#39

N25

H_D#40

R21

H_D#41

P24

H_D#42

R25

H_D#43

R24

H_D#44

T26

H_D#45

T25

H_D#46

T22

H_D#47

T23

H_D#48

U26

H_D#49

U24

H_D#50

U23

H_D#51

V25

H_D#52

U21

H_D#53

V22

H_D#54

V24

H_D#55

W26

H_D#56

Y26

H_D#57

W25

H_D#58

Y23

H_D#59

Y24

H_D#60

Y21

H_D#61

AA25

H_D#62

AA22

H_D#63

AA24

H_D#[0..63] 7

A18

A20

AA10

AA12

AA14

VCC_4

VCC_5

VCC_6A8VCC_7

VCC_8

VCC_9

VCC_10

VCC_11

VCC_12

VCC_13

VCC_14

VCC_15

VCC_16

VCC_17

VCC_18

VCC_19

VCC_20

VCC_21

VCC_22

VCC_23

VCC_24

VCC_25

VCC_26

VCC_27

VCC_28

VCC_29

VCC_30

VCC_31

VCC_32

VCC_33

VCC_34

VCC_35

VCC_36

VCC_37

VCC_38

VCC_39

VCC_40

VCC_41

VCC_42

VCC_43

VCC_44

VCC_45

VCC_46

VCC_47

VCC_48

VCC_49

VCC_50

VCC_51

VCC_52

VCC_53

VCC_54

VCC_55

VCC_56B7VCC_57B9VCC_58

VCC_59

VCC_61

VCC_62

VCC_63

VCC_64

Prescott

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12A3VSS_13A9VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

VSS_38

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_48

VSS_49

A11

A13

A15

A17

A19

A21

A24

H23

H26

A26

AA1

AA4

AA7

AA11

AA13

AA9

AA15

AA17

AA19

AA23

AA26

AB10

AB3

AB6

AB8

AC2

AC5

AC7

AB12

AB14

AB16

AB18

AB20

AB21

AB24

AC11

AC13

AC15

AC9

AC17

AC19

AC22

AC25

AD10

AD12

AD14

BOOTSELECT

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VCC_81

VCC_82

VCC_83

F13

F15

F17

F19

AD1

AD4

AD8

AD16

AD18

AD21

AD23

+CPU_CORE

BOOTSELECT54

Reference Intel document
Desktop P4 Spec.: 10988 P4 0.13u 512KB L2 EMTS Rev.2.0

Desktop Prescott Spec.: 11910 Prescott EMTS Rev.0.5

Pin number Northwood

Pin name

B6 FERR# FERR#/PBE# Pull-up 62ohm

AA20 ITPCLKOUT0 Pull-up56ohm

AB22 ITPCLKOUT1 Pull-up 56ohm

AD2 NC VIDPWRGD Pull-up 8.2Kohm

AD3 NC float VID5 Pull-up1Kohm to

A A

AF3 NC float VCCVIDLB Connect to +VCCVID
AD20 VCCA VCCIOPLLConnect to CPU

AF23 Connect to CPU

VCCIOPLL VCCA

AD1 VSS BOOTSELECTConnect to GND CPU determine
AE26 VSS Connect to GND OPTIMIZED/

Commend Commend

Pull-up 62ohm
to +VCC_CORE

to +VCC_CORE

to +VCC_CORE
float

Filter

Filter

5

Prescott
Pin name

to +VCC_CORE

TESTHI6 Pull-up 62ohm

TESTHI7 Pull-up 62ohm

to +VCC_CORE

to +VCC_CORE

to +VCCVID

+3VRUN & connect
to PWRIC

Connect to CPU
Filter

Connect to CPU
Filter

COMPAT#

float

Northwood Prescott

Pop Pop

Pop Pop

Pop Pop

PopDepop

Depop

Depop

Pop

Pop

Pop Depop

Pop Depop

4

R_A

R_B

R_C

R_D

R_E

3

1 2

R33
0_0402_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTI AL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.

BOOTSEL

R_D

1 2

R34
0_0402_5%

Pop: Northwood
Depop: Prescott

Compal Electronics, Inc.

Title

Prescott Processor in uFCPGA478 (1/2)

Size Document N u mb er Re v

C

Sapporo 300P

Date: Sheet

星期一 十二月

2

01, 2003

1

457,

0.3

of

5

+CPU_CORE

H_FERR#

1 2

R255 62_0402_5%

H_PROCHOT#

1 2

R147 130_0402_5%

H_PWRGOOD

1 2

D D

C C

B B

A A

R64 300_0402_5%

H_RESET#

1 2

R63 62_0402_5%

Note: Please change to 10uH, DC current
of 100mA parts and close to cap

+CPU_CORE

L9 LQG21F4R7N00_0805

1 2

1 2

L8 LQG21F4R7N00_0805

PLL Layout note :

1.Place cap within 600 mils of
the VCCA and VSSA pins.

2.H_VCCIOPLL,HVCCA,HVSSA trace wide
12 mils(min)

RP88

1K_8P4R_1206_5%

ITP_TMS
ITP_TRST#
ITP_TCK
ITP_TDI

1 8
2 7
3 6
4 5

Place near ICH

Place near CPU

+CPU_CORE

1 2

33U_D2_8M_R35

H_RS#[0..2]7

H_TRDY#7

H_A20M#26

H_FERR#26
H_IGNNE#26
H_SMI#26
H_PWRGOOD26
H_STPCLK#26

H_INTR26
H_NMI26
H_INIT#26
H_RESET#7

H_DBSY#7

H_DRDY#7
CPU_CLKSEL015
CPU_CLKSEL115

H_THERMTRIP#24

R305 62_0402_5%

1 2

R307 62_0402_5%

1 2

R308 62_0402_5%

1 2

R306 62_0402_5%

1 2

R309 62_0402_5%

1 2

R310 62_0402_5%

1 2

VCCSENSE54
VSSSENSE54

C22

+

Trace >= 25mils

Pop: Prescott
Depop: Northwood

+CPU_GMCH_GTLREF trace
wide 12mils(min),Space
15mils

+CPUVID

H_VCCA

H_VSSA

1 2

R28

CLK_ITP15
CLK_ITP#15

R106

61.9_0603_1%

R_C

Close to the CPU

5

4

H_RS#0
H_RS#1
H_RS#2

H_FERR#

H_PWRGOOD

H_RESET#

H_THERMDA
H_THERMDC

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5

ITP_TCK
ITP_TDI

ITP_TMS
ITP_TRST#

VCCVIDLB

0_0402_5%

CLK_ITP
CLK_ITP#

COMP0
COMP1

12

12

R94

61.9_0603_1%

AMP_3-1565030-1_Prescott

+CPU_GMCH_GTLREF

4

AB23

AB25

AD20
AE23

AD22

AC26
AD26

G5

AB2

W5

AD6
AD5

AC6
AB5
AC4

AA5
AB4

AF3

L24

F1
F4
J6

C6
B6
B2
B5

Y4
D1

E5

H5
H2

B3
C4

A2

Y6

D4
C1
D5
F7
E6

A5
A4

P1

JCPU1B

RS#0
RS#1
RS#2
RSP#
TRDY#

A20M#
FERR#
IGNNE#
SMI#
PWRGOOD
STPCLK#

LINT0
LINT1
INIT#
RESET#

DBSY#
DRDY#
BSEL0
BSEL1

THERMDA
THERMDC

THERMTRIP#

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5

TCK
TDI
TDO
TMS
TRST#

VCCIOPLL
VCCA

VCCSENSE
VSSSENSE
VCCVIDLB

VSSA

ITP_CLK0
ITP_CLK1

COMP0
COMP1

+CPU_CORE

R_A

R_B

AE11

AE13

AE15

VSS_57

VSS_58

VSS_59

VSS_129F8VSS_130

VSS_131

G21

G24

12

R51
200_0603_1%

12

R38
169_0603_1%

AE17

AE19

AE22

VSS_60

VSS_61

VSS_62

VSS_132G3VSS_133G6VSS_134J2VSS_135

AE24

AE7

AE9

AF1

AF10

AF12

AF14

AF16

AF18

AF20

AF6

VSS_63

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_72

VSS_73

VSS_136

VSS_137J5VSS_138

VSS_139

VSS_140K3VSS_141K6VSS_142L1VSS_143

VSS_144

J22

J25

L23

L26

K21

K24

GTL Reference Voltage

Layout note :

2

C8

0.1U_0402_10V6K

1

3

AF8

B10

B12

B14

B16

B18

B20

B23

B26

C11

C13

C15

C17

C19

C22

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_80

VSS_81

VSS_82

VSS_83

VSS_84

VSS_85B4VSS_86B8VSS_87

VSS_88

VSS_89

VSS_90

VSS_91

VSS_92C2VSS_93

Prescott

VSS_145L4VSS_146M2VSS_147

VSS_148

VSS_149M5VSS_150

VSS_151

VSS_152N3VSS_153N6VSS_154P2VSS_155

VSS_156

VSS_157P5VSS_158R1VSS_159

VSS_160

VSS_161R4VSS_162

VSS_163

T21

P25

R23

R26

C7
220P_0402_50V8K

3

T24

P22

N21

N24

M22

M25

1. +CPU_GTLREF Trace wide
12mils(min),Space 15mils

2. Place R_A and R_B near CPU.

3. Place decoupling cap 220PF near CPU.

+CPU_GTLREF

12

R37

0_0603_5%

1

2

2

R17

1 2

C25

D10

D12

D14

D16

D18

D20

D21

D24

E11

E13

E15

E17

E19

E23

E26

F10

F12

F14

F16

F18

F22

F25

F5

VSS_94

VSS_95C5VSS_96C7VSS_97C9VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106D3VSS_107D6VSS_108D8VSS_109E1VSS_110

VSS_111

VSS_112

VSS_113

VSS_114

VSS_115

VSS_116

VSS_117E4VSS_118E7VSS_119E9VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

VSS_125F2VSS_126

VSS_127

OPTIMIZED/COMPAT#

VID0

VID1

VID2

VID3

4

OE#

I5O

AE5

AE4

AE3

AE2

AE1

+3V

12

R654
10K_0402_5%

R655 0_0402_5%

VID4

VID5

AD3

1 2

VIDPWRGD

AD2

AF4

Trace >= 25mils

1

2

2

VSS_164T3VSS_165T6VSS_166U2VSS_167

VSS_168

VSS_169U5VSS_170V1VSS_171

VSS_172

VSS_173V4VSS_174

VSS_175

VSS_176W3VSS_177W6VSS_178Y2VSS_179

VSS_180

VSS_181

V23

V26

U22

U25

H_VID054
H_VID154
H_VID254
H_VID354
H_VID454
H_VID554

H_VID_PWRGD

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTI AL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.

Y5

Y22

Y25

W21

W24

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5

U51B

6

SN74LVC125APWLE_TSSOP14

+3V POWER

AF26

VSS_128

SKTOCC#

PROCHOT#

VCCVID

C4

0.1U_0402_10V6K

H_VID_PWRGD

VID_PWRGD 54
ENLL 51,54

DP#0
DP#1
DP#2
DP#3

GTLREF0
GTLREF1
GTLREF2
GTLREF3

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8

TESTHI9
TESTHI10
TESTHI11
TESTHI12

DSTBN#0
DSTBN#1
DSTBN#2
DSTBN#3

DSTBP#0
DSTBP#1
DSTBP#2
DSTBP#3

ADSTB#0
ADSTB#1

DBI#0
DBI#1
DBI#2
DBI#3

DBR#

MCERR#

SLP#

+CPUVID

0_0402_5%

J26
K25
K26
L25

AA21
AA6
F20
F6

AE26

AD24
AA2
AC21
AC20
AC24
AC23
AA20
AB22
U6
W4
Y3
A6
AD25

E22
K22
R22
W22

F21
J23
P23
W23

L5
R5

E21
G25
P26
V21

AE25

C3
V6
AB26

A22

NC1

A7

NC2

AF25

NC3

AF24

NC4

AE21

NC5

680_0603_1%

2200P_0402_50V7K

EC_SMB_CK240
EC_SMB_DA240

R_A

R19

1 2

R18 0_0402_5%

1 2

H_TESTHI0
H_TESTHI1

H_TESTHI2_7

H_TESTHI8
H_TESTHI9
H_TESTHI10
H_TESTHI11
H_TESTHI12

H_DSTBN#0 7
H_DSTBN#1 7
H_DSTBN#2 7
H_DSTBN#3 7

H_DSTBP#0 7
H_DSTBP#1 7
H_DSTBP#2 7
H_DSTBP#3 7

H_ADSTB#0 7
H_ADSTB#1 7

H_DINV#0 7
H_DINV#1 7
H_DINV#2 7
H_DINV#3 7

H_PROCHOT#

1 2

R66
62_0402_5%

RE
Pop: Prescott
Depop: Northwood

+CPUVID

1

C83

H_THERMDA

2

1

+CPU_GTLREF

Pop: Northwood

R_E

R21 62_0402_5%
R65 62_0402_5%

R20 62_0402_5%

R52 62_0402_5%
R57 62_0402_5%
R61 62_0402_5%
R149 62_0402_5%
R22 62_0402_5%

H_PROCHOT# 7,53
H_CPUSLP# 26

H_THERMDC

Title

Size Document N u mb er Re v

C

Date: Sheet

Depop: Prescott

H_VID5
H_VID4

H_VID3
H_VID2
H_VID1
H_VID0

U1

2

D+

3

D-

8

SCLK

7

SDATA

ADM1032ARM_RM8

+CPU_CORE

R150
@300_0402_5%

1 2

H_CPUPERF# 24
H_DPSLP# 26

Pop: P4 Protability
Depop: Prescott/Northwood

R_B

1 2

R24 1K_0402_5%

1 2

R27 1K_0402_5%

RP5

45
36
27
18

1K_8P4R_1206_5%

+3VS

1

C73

0.1U_0402_16V4Z

2

VDD1

ALERT#

THERM#

GND

12

1
6
4
5

+3VS

R77
@10K_0402_5%

1 2
1 2

1 2

1 2
1 2
1 2
1 2
1 2

R148 @0_0402_5%

1 2

R23 @0_0402_5%

1 2

+CPU_CORE

Compal Electronics, Inc.

Prescott Processor in uFCPGA478 (2/2)

Sapporo 300P

星期一 十二月

01, 2003

1

of

557,

0.3

5

4

3

2

1

+CPU_CORE

1

C448
22U_1206_16V4Z

2

D D

+CPU_CORE

1

C483
22U_1206_16V4Z

2

+CPU_CORE

1

C513
22U_1206_16V4Z

2

C C

+CPU_CORE

1

C158
22U_1206_16V4Z

2

1

C451
22U_1206_16V4Z

2

1

C482
@22U_1206_16V4Z

2

1

C514
22U_1206_16V4Z

2

1

C164
22U_1206_16V4Z

2

1

C466
22U_1206_16V4Z

2

1

C481
@22U_1206_16V4Z

2

C481, C482, C493, C494 del for Prescott

1

C33
22U_1206_16V4Z

2

Place 11 North of Socket(Stuff 8)

1

C86
22U_1206_16V4Z

2

1

C103
22U_1206_16V4Z

2

1

2

Place 12 Insid e So c ke t (S tu f f all)

1

C480
22U_1206_16V4Z

2

1

C491
22U_1206_16V4Z

2

1

2

Place 9 South o f So c ke t (U ns t uf f all)

1

C93
22U_1206_16V4Z

2

1

C18
22U_1206_16V4Z

2

1

2

C69
22U_1206_16V4Z

C494
@22U_1206_16V4Z

C94
22U_1206_16V4Z

1

C45
22U_1206_16V4Z

2

1

C493
@22U_1206_16V4Z

2

1

C34
22U_1206_16V4Z

2

1

C116
22U_1206_16V4Z

2

1

C492
22U_1206_16V4Z

2

1

C95
22U_1206_16V4Z

2

1

C134
22U_1206_16V4Z

2

1

C488
22U_1206_16V4Z

2

(H_1.78)
22uF depop reference

Springdale Customer Schematic R1.2 page82

1

C35
22U_1206_16V4Z

2

1

C141
22U_1206_16V4Z

2

1

C487
22U_1206_16V4Z

2

1

C124
22U_1206_16V4Z

2

B B

+CPU_CORE

1

+

C204
470U_D4_2.5VM

2

+CPU_CORE

1

+

C207
470U_D4_2.5VM

2

+CPU_CORE

A A

1

+

C218
@470U_D4_2.5VM

2

1

+

C203
470U_D4_2.5VM

2

1

+

C209
470U_D4_2.5VM

2

1

+

C517
470U_D4_2.5VM

2

5

470uF _ERS10m ohm* 15, ESR=0.5m ohm

1

+

C205
470U_D4_2.5VM

2

1

+

C202
470U_D4_2.5VM

2

1

+

C524
@470U_D4_2.5VM

2

1

+

C206
@470U_D4_2.5VM

2

1

+

C518
470U_D4_2.5VM

2

4

1

+

C210
470U_D4_2.5VM

2

1

+

C187
@470U_D4_2.5VM

2

1

+

C208
470U_D4_2.5VM

2

1

+

C188
@470U_D4_2.5VM

2

Decoupling Reference Document:
Springdale Chipset Platform Design guide Rev1.11
(12474)page239

Decoupling Reference Requirement:
560uF Polymer, ESR:5m ohm(each) * 10
22uF X5R * 32

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTI AL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAI NS

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

CPU Decoupling

Size Document N u mb er Re v

C

Sapporo 300P

Date: Sheet

星期一 十二月

2

01, 2003

1

657,

0.3

of

5

4

3

2

1

+VTT_GMCH

D D

C C

+CPU_GMCH_GTLREF

GTL Reference Voltage

B B

A A

Layout note :

1. +GMCH_GTLREF Trace wide
12mils(min),Space 15mils.

2. Place decoupling cap 220PF near GMCH.

Trace width 10mils,Space
7mils

12

R365
301_0603_1%

HD_SWING

12

R369
102_0603_1%

12

R362

24.9_0603_1%

+VTT_GMCH

HDRCOMP

12

R359
200_0603_1%

1

2

1 2

R647 0_0603_5%

C159

0.01U_0402_16V7K

+GMCH_GTLREF

1

C160
220P_0402_50V8K

2

H_RS#[0..2]5

H_A#[3..31]4

H_REQ#[0..4]4

+GMCH_GTLREF

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3

H_RS#0
H_RS#1
H_RS#2

HDRCOMP
HD_SWING

H_REQ#4

H_ADSTB#05
H_ADSTB#15

CLK_HCLK15
CLK_HCLK#15

H_DSTBP#05
H_DSTBN#05
H_DINV#05
H_DSTBP#15
H_DSTBN#15
H_DINV#15
H_DSTBP#25
H_DSTBN#25
H_DINV#25
H_DSTBP#35
H_DSTBN#35
H_DINV#35

H_ADS#4

H_TRDY#5

H_DRDY#5

H_DEFER#4
H_HITM#4
H_HIT#4
H_LOCK#4
H_BR0#4
H_BNR#4
H_BPRI#4
H_DBSY#5

H_RESET#5 MCH_CLKSEL0 15

SYS_PWROK24,43

U36A

D26

HA3#

D30

HA4#

L23

HA5#

E29

HA6#

B32

HA7#

K23

HA8#

C30

HA9#

C31

HA10#

J25

HA11#

B31

HA12#

E30

HA13#

B33

HA14#

J24

HA15#

F25

HA16#

D34

HA17#

C32

HA18#

F28

HA19#

C34

HA20#

J27

HA21#

G27

HA22#

F29

HA23#

E28

HA24#

H27

HA25#

K24

HA26#

E32

HA27#

F31

HA28#

G30

HA29#

J26

HA30#

G26

HA31#

B29

HREQ0#

J23

HREQ1#

L22

HREQ2#

C29

HREQ3#

J21

HREQ4#

B30

HADSTB0#

D28

HADSTB1#

B7

HCLKP

C7

HCLKN

B19

HDSTBP0#

C19

HDSTBN0#

C17

DINV0#

L19

HDSTBP1#

K19

HDSTBN1#

L17

DINV1#

G9

HDSTBP2#

F9

HDSTBN2#

L14

DINV2#

D12

HDSTBP3#

E12

HDSTBN3#

C15

DINV3#

F27

ADS#

D24

HTRDY#

G24

DRDY#

L21

DEFER#

E23

HITM#

K21

HIT#

E25

HLOCK#

B24

BREQ0#

B28

BNR#

B26

BPRI#

E27

DBSY#

G22

RS0#

C27

RS1#

B27

RS2#

E8

CPURST#

AE14

PWROK#

E24

HDRCOMP

C25

HDSWING

F23

HDVREF

SPRINGDALE_UFCBGA932

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#

HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#

FSB

HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

PROCHOT#

BSEL0
BSEL1

B23
E22
B21
D20
B22
D22
B20
C21
E18
E20
B16
D16
B18
B17
E16
D18
G20
F17
E19
F19
J17
L18
G16
G18
F21
F15
E15
E21
J19
G14
E17
K17
J15
L16
J13
F13
F11
E13
K15
G12
G10
L15
E11
K13
J11
H10
G8
E9
B13
E14
B14
B12
B15
D14
C13
B11
D10
C11
E10
B10
C9
B9
D8
B8

L20

L13
L12

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8

H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_PROCHOT#

H_D#[0..63] 4

H_PROCHOT# 5,53

MCH_CLKSEL1 15

U36F

AR32

VSS

AR29

VSS

AR27

VSS

AR25

VSS

AR23

VSS

AR20

VSS

AR16

VSS

AR13

VSS

AR11

VSS

AR9

VSS

AN32

VSS

AN30

VSS

AN28

VSS

AN26

VSS

AN24

VSS

AN22

VSS

AN20

VSS

AN18

VSS

AN16

VSS

AN14

VSS

AN12

VSS

AN10

VSS

AM35

VSS

AM29

VSS

AM27

VSS

AM25

VSS

AM23

VSS

AM21

VSS

AM19

VSS

AM17

VSS

AM15

VSS

AM13

VSS

AM11

VSS

AM9

VSS

AL32

VSS

AL1

VSS

AK28

VSS

AK26

VSS

AK24

VSS

AK22

VSS

AK20

VSS

AK18

VSS

AK16

VSS

AK14

VSS

AK12

VSS

AK10

VSS

AK8

VSS

AK3

VSS

AJ35

VSS

AJ32

VSS

AJ9

VSS

AJ4

VSS

AJ1

VSS

AH33

VSS

AH30

VSS

AH24

VSS

AH22

VSS

AH20

VSS

AH18

VSS

AH16

VSS

AH14

VSS

AH12

VSS

AH10

VSS

AH6

VSS

AH3

VSS

AG35

VSS

AG32

VSS

AG28

VSS

AG26

VSS

AG24

VSS

AG22

VSS

AG20

VSS

AG18

VSS

AG16

VSS

AG14

VSS

AG8

VSS

AG4

VSS

AF33

VSS

AF30

VSS

AF25

VSS

AF24

VSS

AF22

VSS

AF20

VSS

AF18

VSS

AF16

VSS

AF14

VSS

AF11

VSS

AF9

VSS

AF6

VSS

AF3

VSS

AE35

VSS

AE32

VSS

AE26

VSS

AE25

VSS

AE13

VSS

AE12

VSS

SPRINGDALE_UFCBGA932

AE11

VSS

AE10

VSS

AE4

VSS

AE1

VSS

AD33

VSS

AD30

VSS

AD28

VSS

AD10

VSS

AD9

VSS

AD8

VSS

AD6

VSS

AD3

VSS

AC35

VSS

AC32

VSS

AC4

VSS

AC1

VSS

AB33

VSS

AB30

VSS

AB28

VSS

AB27

VSS

AB26

VSS

AB10

VSS

AB9

VSS

AB8

VSS

AB6

VSS

AB3

VSS

AA32

VSS

AA4

VSS

AA1

VSS

Y35

VSS

Y33

VSS

Y30

VSS

Y28

VSS

Y27

VSS

Y26

VSS

Y10

VSS

Y9

VSS

Y8

VSS

Y6

VSS

Y3

VSS

W32

VSS

W18

VSS

W17

VSS

W4

VSS

GND

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

V33
V30
V28
V27
V26
V19
V17
V10
V9
V8
V6
V3
U32
U19
U18
U4
T35
T33
T30
T28
T27
T26
T10
T9
T8
T6
T3
T1
R32
R4
R1
P33
P30
P28
P27
P26
P9
P8
P6
P3
N35
N32
N4
N1
M33
M30
M28
M27
M26
M6
M3
L35

U36G

L31

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

GND

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

L26
L25

L24
K33
K29
K27
K25
K22
K20
K18
K16
K14
K12
K11

J35

J32

J28

J22

J20

J18

J16

J14

J12

J10
H33
H30
H26
H24
H22
H20
H18
H16
H14
H12

H9
H8
H5

H2
G35
G31
G28

F26
F24
F22
F20
F18

SPRINGDALE_UFCBGA932

F16
F14
F12
F10
F8
F5
F3
F1
E3
E1
D35
D33
D31
D29
D27
D25
D23
D21
D19
D17
D15
D13
D11
D9
D1
C28
C26
C24
C22
C20
C18
C16
C14
C12
C10
C8
C4
A32
A29
A27
A25
A23
A20
A16
A13
A11
A9
A7

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

2

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Springdale-Host/GND (1/4)

B

Sapporo 300P

星期一

, 01, 2003

十二月

757

1

0.3

5

4

3

2

1

DDRA_SMA[0..12]12,14

D D

C C

+SM_VREF_A

+SM_VREF_A trace width of 12mils and space
12mils(min)

2

C528

2.2U_0805_16V4Z

1

2

C522

0.1U_0402_16V4Z

1

DDRA_SMA[0..12]

DDRA_SWE#12,14
DDRA_SCAS#12,14
DDRA_SRAS#12,14

DDRA_SBS012,14
DDRA_SBS112,14

DDRA_SCS#012,14
DDRA_SCS#112,14

DDRA_CKE012,14
DDRA_CKE112,14

DDRA_CLK112
DDRA_CLK1#12
DDRA_CLK212
DDRA_CLK2#12

DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12

DDRA_SCS#0
DDRA_SCS#1 DDRA_SDQ18

DDRA_CKE0
DDRA_CKE1

SMXRCOMP
SMXRCOMPVOH
SMXRCOMPVOL

Close to GMCH(E34)

B B

+2.5V

Trace width of 12mils and space
10mils(min)

12

R151

40.2_0603_1%

Change to 42.2_1%

2

C201

2.2U_0805_16V4Z

1

A A

5

SMXRCOMP

12

R152

40.2_0603_1%

Place resistors within

1.0 inch of GMCH (AK9)

Change to 42.2_1%

U36B

AJ34

SMAA_A0

AL33

SMAA_A1

AK29

SMAA_A2

AN31

SMAA_A3

AL30

SMAA_A4

AL26

SMAA_A5

AL28

SMAA_A6

AN25

SMAA_A7

AP26

SMAA_A8

AP24

SMAA_A9

AJ33

SMAA_A10

AN23

SMAA_A11

AN21

SMAA_A12

AL34

SMAB_A1

AM34

SMAB_A2

AP32

SMAB_A3

AP31

SMAB_A4

AM26

SMAB_A5

AB34

SWE_A#

Y34

SCAS_A#

AC33

SRAS_A#

AE33

SBA_A0

AH34

SBA_A1

AA34

SCS_A0#

Y31

SCS_A1#

Y32

SCS_A2#

W34

SCS_A3#

AL20

SCKE_A0

AN19

SCKE_A1

AM20

SCKE_A2

AP20

SCKE_A3

AK32

SCMDCLK_A0

AK31

SCMDCLK_A0#

AP17

SCMDCLK_A1

AN17

SCMDCLK_A1#

N33

SCMDCLK_A2

N34

SCMDCLK_A2#

AK33

SCMDCLK_A3

AK34

SCMDCLK_A3#

AM16

SCMDCLK_A4

AL16

SCMDCLK_A4#

P31

SCMDCLK_A5

P32

SCMDCLK_A5#

E34

SMVREF_A

AK9

SMXRCOMP

AN9

SMXRCOMPVOH

AL9

SMXRCOMPVOL

SPRINGDALE_UFCBGA932

4

AN11

SDQS_A0

AP12

SDM_A0

AP10

SDQ_A0

AP11

SDQ_A1

AM12

SDQ_A2

AN13

SDQ_A3

AM10

SDQ_A4

AL10

SDQ_A5

AL12

SDQ_A6

AP13

SDQ_A7

AP15

SDQS_A1

AP16

SDM_A1

AP14

SDQ_A8

AM14

SDQ_A9

AL18

SDQ_A10

AP19

SDQ_A11

AL14

SDQ_A12

AN15

SDQ_A13

AP18

SDQ_A14

AM18

SDQ_A15

AP23

SDQS_A2

AM24

SDM_A2

AP22

SDQ_A16

AM22

SDQ_A17

AL24

SDQ_A18

AN27

SDQ_A19

AP21

SDQ_A20

AL22

SDQ_A21

DDR Channel A

SDQ_A22
SDQ_A23

SDQS_A3

SDM_A3

SDQ_A24
SDQ_A25
SDQ_A26
SDQ_A27
SDQ_A28
SDQ_A29
SDQ_A30
SDQ_A31

SDQS_A4

SDM_A4

SDQ_A32
SDQ_A33
SDQ_A34
SDQ_A35
SDQ_A36
SDQ_A37
SDQ_A38
SDQ_A39

SDQS_A5

SDM_A5

SDQ_A40
SDQ_A41
SDQ_A42
SDQ_A43
SDQ_A44
SDQ_A45
SDQ_A46
SDQ_A47

SDQS_A6

SDM_A6

SDQ_A48
SDQ_A49
SDQ_A50
SDQ_A51
SDQ_A52
SDQ_A53
SDQ_A54
SDQ_A55

SDQS_A7

SDM_A7

SDQ_A56
SDQ_A57
SDQ_A58
SDQ_A59
SDQ_A60
SDQ_A61
SDQ_A62
SDQ_A63

AP25
AP27

AM30
AP30

AP28
AP29
AP33
AM33
AM28
AN29
AM31
AN34

AF34
AF31

AH32
AG34
AF32
AD32
AH31
AG33
AE34
AD34

V34
W33

AC34
AB31
V32
V31
AD31
AB32
U34
U33

M32
M34

T34
T32
K34
K32
T31
P34
L34
L33

H31
H32

J33
H34
E33
F33
K31
J34
G34
F34

DDRA_SDQS0 12,14

DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7

DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15

DDRA_SDQ16
DDRA_SDQ17

DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23

DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31

DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39

DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47

DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55

DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DDRA_SDM0 12,14

DDRA_SDQS1 12,14
DDRA_SDM1 12,14

DDRA_SDQS2 12,14
DDRA_SDM2 12,14

DDRA_SDQS3 12,14
DDRA_SDM3 12,14

DDRA_SDQS4 12,14
DDRA_SDM4 12,14

DDRA_SDQS5 12,14
DDRA_SDM5 12,14

DDRA_SDQS6 12,14
DDRA_SDM6 12,14

DDRA_SDQS7 12,14
DDRA_SDM7 12,14

3

DDRA_SDQ[0..63]

2

C523

2.2U_0805_16V4Z

1

DDRA_SDQ[0..63] 12,14

2

C777

1

0.1U_0402_16V4Z

1

C533
1U_0603_10V6K

2

2

C217

2.2U_0805_16V4Z

1

1

C220
1U_0603_10V6K

2

2

+2.5V

12

R390
10K_0603_1%

SMXRCOMPVOH

12

R391

30.9K_0603_1%

*

*

Change to 31.12K

Follow Intel design guide
R1.11(12474) page124,125

+2.5V

12

R153

30.9K_0603_1%

*

12

R154
10K_0603_1%

Trace width of 12mils and space
10mils(min)

1

C196

0.01U_0402_16V7K

2

Close to Pin AN9

Close to GMCH <1"

Trace width of 12mils and space
10mils(min)

SMXRCOMPVOL

1

C190

0.01U_0402_16V7K

2

Close to Pin AL9

Close to GMCH <1"

Compal Electro nics, Inc.

Title

Springdale-DDR Interface-A(2/5)

Size Document Number Rev

B

Sapporo 300P

Date: Sheet of

星期一

, 01, 2003

十二月

857

1

0.3

5

4

3

2

1

DDRB_SMA[0..12]13,14

D D

C C

SM_VREF_B and SM_VREF_A
are connected inside GMCH.

+2.5V

2

12

R392
150_0603_1%

12

B B

R396
150_0603_1%

C539

2.2U_0805_16V4Z

1

2

C547

2.2U_0805_16V4Z

1

DDRB_SMA[0..12]

DDRB_SWE#13,14
DDRB_SCAS#13,14
DDRB_SRAS#13,14

DDRB_SBS013,14
DDRB_SBS113,14

DDRB_SCS#013,14
DDRB_SCS#113,14

DDRB_CKE013,14
DDRB_CKE113,14

DDRB_CLK113
DDRB_CLK1#13
DDRB_CLK213
DDRB_CLK2#13

+SM_VREF_B

+SM_VREF_B trace width of
12mils and space
12mils(min)

2

C200

0.1U_0402_16V4Z

1

DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12

DDRB_SCS#0
DDRB_SCS#1

DDRB_CKE0
DDRB_CKE1

SMYRCOMP
SMYRCOMPVOH
SMYRCOMPVOL

Close to GMCH(AP9)

+2.5V

2

12

R399

Change to 42.2_1%

Change to 42.2_1%

A A

40.2_0603_1%

SMYRCOMP

12

R400

40.2_0603_1%

C553

2.2U_0805_16V4Z

1

Trace width of 12mils
and space 10mils(min)

Place resistors within

1.0 inch of GMCH (AA33)

U36C

AG31

SMAA_B0

AJ31

SMAA_B1

AD27

SMAA_B2

AE24

SMAA_B3

AK27

SMAA_B4

AG25

SMAA_B5

AL25

SMAA_B6

AF21

SMAA_B7

AL23

SMAA_B8

AJ22

SMAA_B9

AF29

SMAA_B10

AL21

SMAA_B11

AJ20

SMAA_B12

AE27

SMAB_B1

AD26

SMAB_B2

AL29

SMAB_B3

AL27

SMAB_B4

AE23

SMAB_B5

W27

SWE_B#

W31

SCAS_B#

W26

SRAS_B#

Y25

SBA_B0

AA25

SBA_B1

U26

SCS_B0#

T29

SCS_B1#

V25

SCS_B2#

W25

SCS_B3#

AK19

SCKE_B0

AF19

SCKE_B1

AG19

SCKE_B2

AE18

SCKE_B3

AG29

SCMDCLK_B0

AG30

SCMDCLK_B0#

AF17

SCMDCLK_B1

AG17

SCMDCLK_B1#

N27

SCMDCLK_B2

N26

SCMDCLK_B2#

AJ30

SCMDCLK_B3

AH29

SCMDCLK_B3#

AK15

SCMDCLK_B4

AL15

SCMDCLK_B4#

N31

SCMDCLK_B5

N30

SCMDCLK_B5#

AP9

SMVREF_B

AA33

SMYRCOMP

R34

SMYRCOMPVOH

R33

SMYRCOMPVOL

SPRINGDALE_UFCBGA932

AF15

SDQS_B0

AG11

SDM_B0

AJ10

SDQ_B0

AE15

SDQ_B1

AL11

SDQ_B2

AE16

SDQ_B3

AL8

SDQ_B4

AF12

SDQ_B5

AK11

SDQ_B6

AG12

SDQ_B7

AG13

SDQS_B1

AG15

SDM_B1

AE17

SDQ_B8

AL13

SDQ_B9

AK17

SDQ_B10

AL17

SDQ_B11

AK13

SDQ_B12

AJ14

SDQ_B13

AJ16

SDQ_B14

AJ18

SDQ_B15

AG21

SDQS_B2

AE21

SDM_B2

AE19

SDQ_B16

AE20

SDQ_B17

AG23

SDQ_B18

AK23

SDQ_B19

AL19

SDQ_B20

DDR Channel B

SDQ_B21
SDQ_B22
SDQ_B23

SDQS_B3

SDM_B3

SDQ_B24
SDQ_B25
SDQ_B26
SDQ_B27
SDQ_B28
SDQ_B29
SDQ_B30
SDQ_B31

SDQS_B4

SDM_B4

SDQ_B32
SDQ_B33
SDQ_B34
SDQ_B35
SDQ_B36
SDQ_B37
SDQ_B38
SDQ_B39

SDQS_B5

SDM_B5

SDQ_B40
SDQ_B41
SDQ_B42
SDQ_B43
SDQ_B44
SDQ_B45
SDQ_B46
SDQ_B47

SDQS_B6

SDM_B6

SDQ_B48
SDQ_B49
SDQ_B50
SDQ_B51
SDQ_B52
SDQ_B53
SDQ_B54
SDQ_B55

SDQS_B7

SDM_B7

SDQ_B56
SDQ_B57
SDQ_B58
SDQ_B59
SDQ_B60
SDQ_B61
SDQ_B62
SDQ_B63

AK21
AJ24
AE22

AH27
AJ28

AK25
AH26
AG27
AF27
AJ26
AJ27
AD25
AF28

AD29
AC31

AE30
AC27
AC30
Y29
AE31
AB29
AA26
AA27

U30
U31

AA30
W30
U27
T25
AA31
V29
U25
R27

L27
M29

P29
R30
K28
L30
R31
R26
P25
L32

J30
J31

K30
H29
F32
G33
N25
M25
J29
G32

DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7

DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15

DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23

DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31

DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39

DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47

DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55

DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63

DDRB_SDQS0 13,14
DDRB_SDM0 13,14

DDRB_SDQS1 13,14
DDRB_SDM1 13,14

DDRB_SDQS2 13,14
DDRB_SDM2 13,14

DDRB_SDQS3 13,14
DDRB_SDM3 13,14

DDRB_SDQS4 13,14
DDRB_SDM4 13,14

DDRB_SDQS5 13,14
DDRB_SDM5 13,14

DDRB_SDQS6 13,14
DDRB_SDM6 13,14

DDRB_SDQS7 13,14
DDRB_SDM7 13,14

DDRB_SDQ[0..63]

2

C541

2.2U_0805_16V4Z

1

2

C778

0.1U_0402_16V4Z

1

1

C546
1U_0603_10V6K

2

DDRB_SDQ[0..63] 13,14

+2.5V

Trace width of 12mils and space
10mils(min)

12

R394
10K_0603_1%

SMYRCOMPVOH

12

R398

30.9K_0603_1%

1

C213

0.01U_0402_50V7K

2

Close to Pin R14

Close to GMCH <1"

+2.5V

Trace width of 12mils and space
10mils(min)

2

C219

2.2U_0805_16V4Z

1

1

C223
1U_0603_10V6K

2

12

R163

30.9K_0603_1%

SMYRCOMPVOL

12

R164
10K_0603_1%

1

C211

0.01U_0402_50V7K

2

Close to Pin R33

Close to GMCH <1"

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Springdale-DDR Interface-B(3/5)

Size Document Number Rev

B

Sapporo 300P

Date: Sheet of

星期一

, 01, 2003

十二月

957

1

0.3

5

4

3

2

1

+1.5VS

Change to 43.2_1%

12

R123

43_0402_5%

D D

C C

B B

+1.5VS

12

R353
226_0603_1%

12

R368
147_0603_1%

12

R372
113_0603_1%

1

C147

0.1U_0402_16V4Z

2

1

C166

0.1U_0402_16V4Z

2

GRCOMP

HI_SW ING_ MCH

1

2

HI_VREF_MCH

1

2

+1.5VS

12

CI_SWING_GMCH

12

12

+1.5VS

12

12

+AGP_VREF = 0.3535

1 2

R56

A A

44.2_0603_1%

12

+1.5VS

Change to 52.3_1%

12

R116

51.1_0603_1%

HI_RCOMP_MCH

Note:
HI_SWING_MCH, HI_VREF_MCH
trace width of 10mils and
space 7mils

Close to GMCH(AE3)

C499

0.1U_0402_16V4Z

C500

0.1U_0402_16V4Z

R122
226_0603_1%

R127
147_0603_1%

CI_VREF_GMCH

R130
113_0603_1%

1

C498

0.01U_0402_16V7K

2

Close to GMCH ball <250mils

Close to GMCH(AE2)

1

C503

0.01U_0402_16V7K

2

Close to GMCH ball <250mils

Note:
CI_SWING_MCH, CI_VREF_MCH
trace width of 10mils and
space 20mils

0.8V

Close to GMCH(AF2)

1

C155

0.01U_0402_16V7K

2

Close to GMCH ball <250mils

0.35V

Close to GMCH(AF4)

1

C165

0.01U_0402_16V7K

2

Close to GMCH ball <250mils

R31

60.4_0603_1%

AGP_SWING

R32

39.2_0603_1%

R55

100_0603_1%

Close GMCH ball (AD2)
less than 250mils

5

Close GMCH ball (AC3) less than 250mils

1

C9

0.1U_0402_16V4Z

2

+AGP_VREF

1

C127

0.01U_0402_16V7K

2

+1.5VS

?

R121
@10K_0402_5%

1 2

AGP_PAR

1: External AGP
0: Internal Graphics

CLK_MCH_66M

12

R337
@10_0402_5%

1

C486
@10P_0402_50V8K

2

AGP_C/BE#[0..3]16

AGP_FRAME#16
CLK_MCH_66M15
AGP_DEVSEL#16

AGP_IRDY#16
AGP_TRDY#16
AGP_STOP#16

AGP_PAR16

AGP_REQ#16
AGP_GNT#16

+AGP_VREF

AGP_RBF#16
AGP_WBF#16

AGP_DBIHI16
AGP_DBILO16

AGP_ST[0..2]16

HUB_HL[0..10]26

HUB_HLSTRF26

HUB_HLSTRS26

change to 52.3_1%

R375 54.9_0603_1%

+1.5VS

+3VS

ICH_SYNC#24

PCIRST#13,26,27,28,30,31,37,40

1

C113

0.01U_0402_16V7K

2

Follow Springdale Chipset Platform Design guide Rev1.11(12474)

Note:
Springdale Customer Schematic R1.2 page18
AGP_SWING only had 0.1u cap ; But Springdale
Chipset Platform Design guide Rev1.11(12474)
page138 had a 0.01uf cap. need confirm with
Intel.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R92 0_0402_5%

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

CLK_MCH_66M AGP_AD3

AGP_PAR

GRCOMP
AGP_SWING
+AGP_VREF

AGP_ST0
AGP_ST1
AGP_ST2

HUB_HL0
HUB_HL1
HUB_HL2
HUB_HL3
HUB_HL4
HUB_HL5
HUB_HL6
HUB_HL7
HUB_HL8
HUB_HL9
HUB_HL10

HI_RCOMP_MCH
HI_SW ING_ MCH
HI_VREF_MCH

1 2

R692 10K_0402_5%

CI_SWING_GMCH
CI_VREF_GMCH

1 2

R134 0_0402_5%

3

12

12

U36D

Y7

GCBE0

W5

GCBE1

AA3

GCBE2

U2

GCBE3

U6

GFRAME

H4

GCLKIN

AB4

GDEVSEL

V11

GIRDY

AB5

GTRDY

W11

GSTOP

AB2

GPAR/ADD_DETECT

N6

GREQ

M7

GGNT

AC2

GRCOMP/DVOBCGCOMP

AC3

GVSWING

AD2

GVREF

R10

GRBF

R9

GWBF

M4

DBI_HI

M5

DBI_LO

N3

GST0

N5

GST1

N2

GST2

AF5

HI0

AG3

HI1

AK2

HI2

AG5

HI3

AK5

HI4

AL3

HI5

AL2

HI6

AL4

HI7

AJ2

HI8

AH2

HI9

AJ3

HI10

AH5

HISTRF

AH4

HISTRS

AD4

HI_RCOMP

AE3

HI_SWING

AE2

HI_VREF

AK7

CI0

AH7

CI1

AD11

CI2

AF7

CI3

AD7

CI4

AC10

AG10
AN35

AP34

CSA

CI5

AF8

CI6

AG7

CI7

AE9

CI8

AH9

CI9

AG6

CI10

AJ6

CISTRF

AJ5

CISTRS

AG2

CI_RCOMP

AF2

CI_SWING

AF4

CI_VREF

G4

DREFCLK

AP8

EXTTS#

AJ8

ICH_SYNC#

AK4

RSTIN#
RESERVED_1

AG9

RESERVED_2
RESERVED_3
RESERVED_4

AR1

RESERVED_5

SPRINGDALE_UFCBGA932

GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8

GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15

GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

GSBSTBF

GSBA0#
GSBA1#
GSBA2#
GSBA3#
GSBA4#
GSBA5#
GSBA6#
GSBA7#

RED

RED#

GREEN

GREEN#

BLUE
BLUE#

HSYNC
VSYNC

REFSET

NC_1

NC_2

NC_3

NC_4

NC_5

NC_6

NC_7

NC_8

NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20

AC6
AC5

AGP_AD0

AE6

AGP_AD1

AC11

AGP_AD2

AD5
AE5

AGP_AD4

AA10

AGP_AD5

AC9

AGP_AD6

AB11

AGP_AD7

AB7

AGP_AD8

AA9

AGP_AD9

AA6

AGP_AD10

AA5

AGP_AD11

W10

AGP_AD12

AA11

AGP_AD13

W6

AGP_AD14

W9

AGP_AD15

V7
V4

V5

AGP_AD16

AA2

AGP_AD17

Y4

AGP_AD18

Y2

AGP_AD19

W2

AGP_AD20

Y5

AGP_AD21

V2

AGP_AD22

W3

AGP_AD23

U3

AGP_AD24

T2

AGP_AD25

T4

AGP_AD26

T5

AGP_AD27

R2

AGP_AD28

P2

AGP_AD29

P5

AGP_AD30

P4

AGP_AD31

M2
U11

T11

AGP_SBA0

R6

AGP_SBA1

P7

AGP_SBA2

R3

AGP_SBA3

R5

AGP_SBA4

U9

AGP_SBA5

U10

AGP_SBA6

U5

AGP_SBA7

T7

R88 0_0402_5%

H3

R84 0_0402_5%

F2

R91 0_0402_5%

F4
E4

R101 0_0402_5%

H6
G5

R104 0_0402_5%

H7
G6

G3
E2

R322 0_0402_5%

D2
A3

A33
A35

Analog RGB/CRT guidelines for Springdale-P

AF13
AF23
AJ12
AN1
AP2
AR3
AR33
AR35
B2
B25
B34
C1
C23
C35
E26
M31
R25

2

GADSTBF0

GADSTBS0#

AGP

GADSTBF1

GADSTBS1#

HUB

GSBSTBS#

DDCA_DATA

DDCA_CLK

VGA

AGP_AD_STBF0 16
AGP_AD_STBS0 16

AGP_AD[0..31] 16

AGP_AD_STBF1 16
AGP_AD_STBS1 16

AGP_SB_STBF 16
AGP_SB_STBS 16
AGP_SBA[0..7] 16

12
12

12
12
12

12

Title

Springdale-AGP/HUB/VGA/CSA (4/5)

Size Document Number Rev

B

Sapporo 300P

Date: Sheet

星期一

, 01, 2003

十二月

1

10 57

of

0.3

5

Note:
Placed less than 100 mils from ball

Route to GMCH ball without via

D D

1

C490

0.47U_0603_16V7K

2

2

C535

0.1U_0402_10V6K

1

C C

C548

0.1U_0402_10V6K

12

C552 0.22U_0603_10V7K

C520

0.47U_0603_16V7K

12

C532 0.22U_0603_10V7K

C163

Trace 14mils

R321

B B

Note:
Placed less than 100 mils from ball

Route to GMCH ball without via

A A

0.1U_0402_10V6K

12

12

C168 0.1U_0402_10V6K

R316 0_0402_5%

0_0402_5%

12
12

1 2

C242 0.1U_0402_10V6K

VTT_DCAP1
VTT_DCAP2

1

C496

0.47U_0603_16V7K

2

+VTT_GMCH

+2.5V

VCC_DDR_DCAP5

12

VCC_DDR_DCAP4

VCC_DDR_DCAP1

12

+3VS

VCC_AGP_DCAP2

+1.5VS

VTT_DCAP3
VCCA_FSB
VCCA_DPLL
VCCA_DAC

VCC_DDR_DCAP2 VCCA_FSB1 VCCA_FSB

VCCA1P5_DDR_SM

(1A)

A15
A21

A4
A5
A6
B5
B6
C5
C6
D5
D6
D7
E6
E7
F7

AA35

AL6

AL7
AM1
AM2
AM3
AM5
AM6
AM7
AM8
AN2
AN4
AN5
AN6
AN7
AN8

AP3

AP4

AP5

AP6

AP7

AR15
AR21

*

AR31

AR4
AR5
AR7

E35

R35

G1
G2

AG1

Y11

A31

B4
B3
C2

AL35
AB25
AC25
AC26

Decoupling Reference Document:
Springdale Chipset Platform Design guide Rev1.11
(12474)page246,248

Decoupling Reference Document:
Springdale Customer Schematic R1.2 page84

4

U36E

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR

VCC_DAC
VCC_DAC

VCCA_AGP
VCCA_AGP

VCCA_FSB
VCCA_FSB
VCCA_DPLL
VCCA_DAC

VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR

SPRINGDALE_UFCBGA932

POWER

VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP

VSSA_DAC

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

J6
J7
J8
J9
K6
K7
K8
K9
L6
L7
L9
L10
L11
M8
M9
M10
M11
N9
N10
N11
P10
P11
R11
T16
T17
T18
T19
T20
U16
U17
U20
V16
V18
V20
W16
W19
W20
Y16
Y17
Y18
Y19
Y20

J1
J2
J3
J4
J5
K2
K3
K4
K5
L1
L2
L3
L4
L5
Y1

D3

+1.5VS

VCC_AGP_DCAP1

3

+2.5V

+2.5V

+1.5VS

+1.5VS

1

2

1

2

1

2

1

+

2

C174
22U_1206_10V4Z

C189

0.1U_0402_10V6K

C171

0.1U_0402_10V6K

C72
470U_D4_2.5VM

2

C186

4.7U_0805_10V4Z

1

1

C185

0.1U_0402_10V6K

2

1

C112

0.1U_0402_10V6K

2

2

C157

4.7U_0805_10V4Z

1

1

C169

0.1U_0402_10V6K

2

1

C222

0.1U_0402_10V6K

2

1

C135

0.1U_0402_10V6K

2

C156
10U_1206_16V4Z

Place at the output of the 1.5V VR

+VTT_GMCH +2.5V

1

C92

0.1U_0402_10V6K

2

Place near GMCH

1 2

C117

0.1U_0402_10V6K

+1.5VS

1

C126

0.1U_0402_10V6K

2

Place near ball
Y11,routing trace
from cap to ball

Note: Please change to 0.82uH, DC current
of 30mA parts and close to cap

+1.5VS

12

R315
0_0603_5%

Note: Please change to 1uH(0.54uH-D-IN), DC current
of 1000mA parts and close to cap

Trace 50mils
Trace 35mils (under GMCH ball field)

+1.5VS

VCCA_DDR VCCA1P5_DDR_SM

R144 0_0603_5%

12

1

C238

0.1U_0402_10V6K

2

+1.5VS

1

C175

0.1U_0402_10V6K

2

1

C125

0.1U_0402_10V6K

2

+VTT_GMCH

1

+

C28
470U_D4_2.5VM

2

L21

1 2

LQG21F4R7N00_0805

1 2

L16 0_0603_5%

2

1

C191

0.1U_0402_10V6K

2

1

C99

0.1U_0402_10V6K

2

1

C106

0.1U_0402_10V6K

2

2

C70

0.1U_0402_16V4Z

1

1

C183

0.1U_0402_10V6K

2

Place near GMCH

Trace 14milsTrace 14mils

12

C32

+

150U_D2_6.3VM

1

C197
22U_1206_16V4Z

2

1

C198

0.1U_0402_10V6K

2

1

C181

0.1U_0402_10V6K

2

2

C47

4.7U_0805_10V4Z

1

Trace 35mils

(1A)(1A)

1

C172

0.1U_0402_10V6K

2

1

C167

0.1U_0402_10V6K

2

2

1

2

C475

0.1U_0402_16V4Z

1

Close to GMCH

2

C212

0.1U_0402_16V4Z

1

Close to GMCH

1

C195

0.1U_0402_10V6K

2

1

C143

0.1U_0402_10V6K

2

C60

4.7U_0805_10V4Z

1

1

2

1

C42
1U_0603_6.3V6M

2

1

C199

0.1U_0402_10V6K

2

C184

0.1U_0402_10V6K

1

C26

0.47U_0603_16V4Z

2

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Springdale-Decoupling (5/5)

B

Sapporo 300P

星期一

, 01, 2003

十二月

1

0.3

11 57

5

+2.5V

JP26

1

VREF

3

DDRA_SDQ0
DDRA_SDQ1

DDRA_SDQS0
DDRA_SDQ6 DDRA_SDQ7

DDRA_SDQ2

D D

DDRA_CLK18
DDRA_CLK1#8

C C

DDRA_CKE18,14

DDRA_SBS08,14
DDRA_SWE#8,14
DDRA_SCS#08,14

B B

A A

ICH_SMB_DATA13,15,26
ICH_SMB_CLK13,15,26

5

DDRA_SDQ12
DDRA_SDQ8

DDRA_SDQS1
DDRA_SDQ10

DDRA_SDQ15

DDRA_SDQ20
DDRA_SDQ16

DDRA_SDQS2
DDRA_SDQ18

DDRA_SDQ19
DDRA_SDQ28

DDRA_SDQ29
DDRA_SDQS3

DDRA_SDQ30
DDRA_SDQ27

DDRA_CKE1
DDRA_SMA12

DDRA_SMA9
DDRA_SMA7

DDRA_SMA5
DDRA_SMA3
DDRA_SMA1

DDRA_SMA10
DDRA_SBS0
DDRA_SWE#
DDRA_SCS#0

DDRA_SDQ36
DDRA_SDQ37

DDRA_SDQS4
DDRA_SDQ34

DDRA_SDQ35
DDRA_SDQ44

DDRA_SDQ41 DDRA_SDQ45
DDRA_SDQS5

DDRA_SDQ43
DDRA_SDQ46

DDRA_SDQ48
DDRA_SDQ53

DDRA_SDQS6
DDRA_SDQ54

DDRA_SDQ55
DDRA_SDQ60

DDRA_SDQ61
DDRA_SDQS7

DDRA_SDQ62
DDRA_SDQ59

+3VS

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

KEYLINK_5762-3-111

4

4

VREF

VSS
DQ4

DQ5
VDD
DM0

DQ6

VSS

DQ7

DQ12

VDD

DQ13

DM1

VSS

DQ14
DQ15

VDD
VDD

VSS

VSS

DQ20
DQ21

VDD
DM2

DQ22

VSS

DQ23
DQ28

VDD

DQ29

DM3

VSS

DQ30
DQ31

VDD

CB4

CB5

VSS
DM8

CB6
VDD

CB7

DU/RESET#

VSS

VSS
VDD
VDD

CKE0

DU/BA2

A11

A8

VSS

A6
A4
A2
A0

VDD

BA1

RAS#
CAS#

S1#

DU

VSS

DQ36
DQ37

VDD
DM4

DQ38

VSS

DQ39
DQ44

VDD

DQ45

DM5

VSS

DQ46
DQ47

VDD

CK1#

CK1

VSS

DQ52
DQ53

VDD
DM6

DQ54

VSS

DQ55
DQ60

VDD

DQ61

DM7

VSS

DQ62
DQ63

VDD

SA0

SA1

SA2

DU

H = 5.2mm

3

+2.5V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDRA_SDQ5
DDRA_SDQ4

DDRA_SDM0

DDRA_SDQ3
DDRA_SDQ9

DDRA_SDQ13
DDRA_SDM1

DDRA_SDQ14
DDRA_SDQ11

DDRA_SDQ21
DDRA_SDQ17

DDRA_SDM2
DDRA_SDQ22

DDRA_SDQ23
DDRA_SDQ24

DDRA_SDQ25
DDRA_SDM3

DDRA_SDQ26
DDRA_SDQ31

DDRA_CKE0
DDRA_SMA11

DDRA_SMA8
DDRA_SMA6

DDRA_SMA4
DDRA_SMA2
DDRA_SMA0

DDRA_SBS1
DDRA_SRAS#
DDRA_SCAS#
DDRA_SCS#1

DDRA_SDQ32
DDRA_SDQ33

DDRA_SDM4
DDRA_SDQ38

DDRA_SDQ39
DDRA_SDQ40

DDRA_SDM5
DDRA_SDQ42

DDRA_SDQ47

DDRA_SDQ49
DDRA_SDQ52

DDRA_SDM6
DDRA_SDQ51

DDRA_SDQ50
DDRA_SDQ56

DDRA_SDQ57
DDRA_SDM7

DDRA_SDQ63
DDRA_SDQ58

SO-DIMM 0

DDRA_VREF trace width of
12mils and space 12mils(min)

DDRA_VREF

1

C305

0.1U_0402_16V4Z

2

Close to SO-DIMM

+2.5V

1

C310

0.1U_0402_10V6K

2

DDRA_CKE0 8,14

DDRA_SBS1 8,14
DDRA_SRAS# 8,14
DDRA_SCAS# 8,14
DDRA_SCS#1 8,14

DDRA_CLK2# 8
DDRA_CLK2 8

+2.5V

1

C331
22U_1206_10V4Z

2

1

C335

0.1U_0402_10V6K

2

+2.5V

12

R204
75_0603_1%

12

R203
75_0603_1%

System Memory Decoupling caps

1

C314

0.1U_0402_10V6K

2

1

C334

0.1U_0402_10V6K

2

Decoupling Reference Document:
Springdale Customer Schematic R1.2 page22
each Channel(two DIMMs) requirement 22uF*1 ; 0.1uF*14

Decoupling Reference Document:
Springdale Chipset Platform Design guide Rev1.11
(12474)pag 271 each DIMM(two) requirement 0.1uF*42

REVERSE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

3

2

DDRA_SDQ[0..63]8,14
DDRA_SDQS[0..7]8,14
DDRA_SMA[0..12]8,14
DDRA_SDM[0..7]8,14

1

C339

0.1U_0402_10V6K

2

1

C308

0.1U_0402_10V6K

2

2

1

C312

0.1U_0402_10V6K

2

1

C333

0.1U_0402_10V6K

2

Title

Size Document Number Rev

Date: Sheet of

星期一

DDRA_SDQ[0..63]
DDRA_SDQS[0..7]
DDRA_SMA[0..12]
DDRA_SDM[0..7]

1

C337

0.1U_0402_10V6K

2

1

C307

0.1U_0402_10V6K

2

Compal Electronics, Inc.

DDR-SODIMM SLOT1

Sapporo 300P

, 01, 2003

十二月

1

1

C311

0.1U_0402_10V6K

2

1

C332

0.1U_0402_10V6K

2

1

1

C336

0.1U_0402_10V6K

2

1

C306

0.1U_0402_10V6K

2

12 57

0.3

5

4

3

2

1

+2.5V

JP24

1

VREF

3

DDRB_SDQ4
DDRB_SDQ0

DDRB_SDQS0
DDRB_SDQ7

D D

DDRB_CLK19
DDRB_CLK1#9

C C

DDRB_CKE19,14

DDRB_SBS09,14
DDRB_SWE#9,14
DDRB_SCS#09,14

B B

A A

ICH_SMB_DATA12,15,26
ICH_SMB_CLK12,15,26

5

DDRB_SDQ5
DDRB_SDQ9

DDRB_SDQ12
DDRB_SDQS1

DDRB_SDQ10
DDRB_SDQ14

DDRB_SDQ20
DDRB_SDQ21

DDRB_SDQS2
DDRB_SDQ22

DDRB_SDQ17
DDRB_SDQ24

DDRB_SDQ25
DDRB_SDQS3

DDRB_SDQ26
DDRB_SDQ30

R_LAD0
R_LAD1

R_LFRAME# R_PCIRST#
R_LAD2

R_LAD3

R_PCLK_80H

DDRB_CKE1
DDRB_SMA12

DDRB_SMA9
DDRB_SMA7

DDRB_SMA5
DDRB_SMA3
DDRB_SMA1

DDRB_SMA10
DDRB_SBS0
DDRB_SWE#
DDRB_SCS#0

DDRB_SDQ33
DDRB_SDQ34

DDRB_SDQS4
DDRB_SDQ37

DDRB_SDQ38
DDRB_SDQ40

DDRB_SDQ44
DDRB_SDQS5

DDRB_SDQ43 DDRB_SDQ41
DDRB_SDQ42

DDRB_SDQ52
DDRB_SDQ49

DDRB_SDQS6
DDRB_SDQ55

DDRB_SDQ60
DDRB_SDQ56

DDRB_SDQS7
DDRB_SDQ58

DDRB_SDQ57

+3VS

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

KLINK_5746-3-111

DU/RESET#

4

VREF

VSS
DQ4

DQ5
VDD
DM0

DQ6

VSS

DQ7

DQ12

VDD

DQ13

DM1

VSS

DQ14
DQ15

VDD
VDD

VSS

VSS

DQ20
DQ21

VDD
DM2

DQ22

VSS

DQ23
DQ28

VDD

DQ29

DM3

VSS

DQ30
DQ31

VDD

CB4

CB5

VSS
DM8

CB6
VDD

CB7

VSS

VSS
VDD
VDD

CKE0

DU/BA2

A11

A8

VSS

A6
A4
A2
A0

VDD

BA1

RAS#
CAS#

S1#

DU

VSS

DQ36
DQ37

VDD
DM4

DQ38

VSS

DQ39
DQ44

VDD

DQ45

DM5

VSS

DQ46
DQ47

VDD

CK1#

CK1

VSS

DQ52
DQ53

VDD
DM6

DQ54

VSS

DQ55
DQ60

VDD

DQ61

DM7

VSS

DQ62
DQ63

VDD

SA0

SA1

SA2

DU

H= 9.2mm

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDRB_VREF trace width of
12mils and space 12mils(min)

DDRB_SDQ2
DDRB_SDQ6

DDRB_SDM0
DDRB_SDQ1

DDRB_SDQ3
DDRB_SDQ13

DDRB_SDQ11
DDRB_SDM1

DDRB_SDQ15
DDRB_SDQ8

DDRB_SDQ19
DDRB_SDQ16

DDRB_SDM2
DDRB_SDQ18

DDRB_SDQ23
DDRB_SDQ28

DDRB_SDQ29
DDRB_SDM3

DDRB_SDQ27
DDRB_SDQ31

DDRB_CKE0
DDRB_SMA11

DDRB_SMA8
DDRB_SMA6

DDRB_SMA4
DDRB_SMA2
DDRB_SMA0

DDRB_SBS1
DDRB_SRAS#
DDRB_SCAS#
DDRB_SCS#1

DDRB_SDQ32
DDRB_SDQ36

DDRB_SDM4
DDRB_SDQ39

DDRB_SDQ35
DDRB_SDQ46

DDRB_SDQ45
DDRB_SDM5

DDRB_SDQ47

DDRB_SDQ48
DDRB_SDQ53

DDRB_SDM6
DDRB_SDQ51

DDRB_SDQ54DDRB_SDQ50
DDRB_SDQ62

DDRB_SDQ61
DDRB_SDM7

DDRB_SDQ59
DDRB_SDQ63

+3VS

DDRB_VREF

2

C300

0.1U_0402_16V4Z

1

DDRB_CKE0 9,14

DDRB_SBS1 9,14
DDRB_SRAS# 9,14
DDRB_SCAS# 9,14
DDRB_SCS#1 9,14

DDRB_CLK2# 9
DDRB_CLK2 9

REVERSESO-DIMM 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+2.5V

1

C299

0.1U_0402_10V6K

2

+2.5V

1

C294

0.1U_0402_10V6K

2

+2.5V

1

C338

0.1U_0402_10V6K

2

+2.5V+2.5V

12

R197
75_0603_1%

12

R196
75_0603_1%

DDRB_SDQ[0..63]9,14
DDRB_SDQS[0..7]9,14
DDRB_SMA[0..12]9,14
DDRB_SDM[0..7]9,14

DDRB_SDQ[0..63]
DDRB_SDQS[0..7]
DDRB_SMA[0..12]
DDRB_SDM[0..7]

System Memory Decoupling caps

1

C270

0.1U_0402_10V6K

2

1

C292

0.1U_0402_10V6K

2

1

C313

0.1U_0402_10V6K

2

LPC_AD224,37,40
LPC_AD324,37,40
CLK_80H15
PCIRST#10,26,27,28,30,31,37,40

LPC_AD024,37,40
LPC_AD124,37,40

LPC_FRAME#24,37,40

1

C298

0.1U_0402_10V6K

2

Decoupling Reference Document:
Springdale Customer Schematic R1.2 page26
each Channel(two DIMMs) requirement 0.1uF*24

1

C264

0.1U_0402_10V6K

2

1

C295

0.1U_0402_10V6K

2

1

C269

0.1U_0402_10V6K

2

1

C263

0.1U_0402_10V6K

2

1

C265

0.1U_0402_10V6K

2

LAD2

1 8

LAD3

2 7

PCLK_80H

3 6

PCIRST#

4 5

RP147 @0_1206_8P4R_5%

LAD0

1 8

LAD1

2 7

LFRAME#

3 6
4 5

RP148 @0_1206_8P4R_5%

PCIRST#
LFRAME#

LAD3
LAD2
LAD1
LAD0

+3VS

PCLK_80H

10

1

C297

0.1U_0402_10V6K

2

1

C291

0.1U_0402_10V6K

2

1

C271

0.1U_0402_10V6K

2

R_LAD2

R_LAD3
R_PCLK_80H
R_PCIRST#

R_LAD0

R_LAD1
R_LFRAME#

JP36

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9
10

@E&T_96212-1011S

1

C267

0.1U_0402_10V6K

2

1

C262

0.1U_0402_10V6K

2

1

C309

0.1U_0402_10V6K

2

1

C296

0.1U_0402_10V6K

2

1

C290

0.1U_0402_10V6K

2

1

C293

0.1U_0402_10V6K

2

1

C266

0.1U_0402_10V6K

2

1

C261

0.1U_0402_10V6K

2

1

C268

0.1U_0402_10V6K

2

DEBUG PORT

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.
DDR-SODIMM SLOT2

Sapporo 300P

星期一

, 01, 2003

十二月

1

13 57

of

0.3

5

4

3

2

1

Channel A(DIMM0) Termination resistors & Decoupling caps Channel B(DIMM1) Termination resistors & Decoupling caps

+1.25VS +1.25VS

DDRA_SDQ5
DDRA_SDQ4

DDRA_SDQ1
DDRA_SDQ0

D D

DDRA_SDQ6
DDRA_SDQS0

DDRA_SDM0
DDRA_SDQ7

DDRA_SDQ13
DDRA_SDM1

DDRA_SDQ3
DDRA_SDQ9

DDRA_SDQ14
DDRA_SDQ11

C C

DDRA_SDQ12
DDRA_SDQ2

DDRA_SDQS1
DDRA_SDQ8

DDRA_SDQ15
DDRA_SDQ10

DDRA_SDQ16
DDRA_SDQ20

DDRA_SDQ21
DDRA_SDQ17

DDRA_SDQ18
DDRA_SDQS2

B B

DDRA_SDM2
DDRA_SDQ22

DDRA_SDQ23
DDRA_SDQ24

DDRA_SDQ25
DDRA_SDM3

DDRA_SDQS5
DDRA_SDQ41

DDRA_SDM6
DDRA_SDQ51

DDRA_SDQ46
DDRA_SDQ43

A A

DDRA_SDQ50
DDRA_SDQ56

RP77

1 4
2 3

56_0404_4P2R_5%

RP114

1 4
2 3

56_0404_4P2R_5%

RP115

1 4
2 3

56_0404_4P2R_5%

RP76

1 4
2 3

56_0404_4P2R_5%

RP74

1 4
2 3

56_0404_4P2R_5%

RP75

1 4
2 3

56_0404_4P2R_5%

RP73

1 4
2 3

56_0404_4P2R_5%

RP116

1 4
2 3

56_0404_4P2R_5%

RP117

1 4
2 3

56_0404_4P2R_5%

RP118

1 4
2 3

56_0404_4P2R_5%

RP119

1 4
2 3

56_0404_4P2R_5%

RP72

1 4
2 3

56_0404_4P2R_5%

RP120

1 4
2 3

56_0404_4P2R_5%

RP71

1 4
2 3

56_0404_4P2R_5%

RP70

1 4
2 3

56_0404_4P2R_5%

RP69

1 4
2 3

56_0404_4P2R_5%

RP130

1 4
2 3

56_0404_4P2R_5%

RP56

1 4
2 3

56_0404_4P2R_5%

RP131

1 4
2 3

56_0404_4P2R_5%

RP55

1 4
2 3

56_0404_4P2R_5%

5

RP121

DDRA_SDQ28

14

DDRA_SDQ19

23

56_0404_4P2R_5%

RP68

DDRA_SDQ26

14

DDRA_SDQ31

23

56_0404_4P2R_5%

RP132

DDRA_SDQ53

14

DDRA_SDQ48

23

56_0404_4P2R_5%

RP79

DDRA_SDQ57

14

DDRA_SDM7

23

56_0404_4P2R_5%

RP78

DDRA_SDQ63

14

DDRA_SDQ58

23

56_0404_4P2R_5%

RP135

DDRA_SDQS7

14

DDRA_SDQ61

23

56_0404_4P2R_5%

RP133

DDRA_SDQ54

14

DDRA_SDQS6

23

56_0404_4P2R_5%

RP62

DDRA_SDQ32

14

DDRA_SDQ33

23

56_0404_4P2R_5%

RP61

DDRA_SDM4

14

DDRA_SDQ38

23

56_0404_4P2R_5%

RP127

DDRA_SDQ37

14

DDRA_SDQ36

23

56_0404_4P2R_5%

RP128

DDRA_SDQ34

14

DDRA_SDQS4

23

56_0404_4P2R_5%

RP59

DDRA_SDQ45

14

DDRA_SDM5

23

56_0404_4P2R_5%

RP60

DDRA_SDQ39

14

DDRA_SDQ40

23

56_0404_4P2R_5%

RP58

DDRA_SDQ42

14

DDRA_SDQ47

23

56_0404_4P2R_5%

RP129

DDRA_SDQ44

14

DDRA_SDQ35

23

56_0404_4P2R_5%

RP57

DDRA_SDQ49

14

DDRA_SDQ52

23

56_0404_4P2R_5%

RP122

DDRA_SDQS3

14

DDRA_SDQ29

23

56_0404_4P2R_5%

RP123

DDRA_SDQ27

14

DDRA_SDQ30

23

56_0404_4P2R_5%

RP136

DDRA_SDQ59

14

DDRA_SDQ62

23

56_0404_4P2R_5%

RP134

DDRA_SDQ60

14

DDRA_SDQ55

23

56_0404_4P2R_5%

Decoupling Re f e r e n c e Document:
Springdale Customer Schematic R1.2 page22
each Channel(two DIMMs) requirement 4.7u*2 ; 0.1uF*28

RP80

1 4
2 3

56_0404_4P2R_5%

RP66

14
23

56_0404_4P2R_5%

RP67

14
23

56_0404_4P2R_5%

RP125

14
23

56_0404_4P2R_5%

RP126

14
23

56_0404_4P2R_5%

RP65

14
23

56_0404_4P2R_5%

RP124

14
23

56_0404_4P2R_5%

RP64

14
23

56_0404_4P2R_5%

RP63

14
23

56_0404_4P2R_5%

RP81

1 4
2 3

56_0404_4P2R_5%

RP137

1 4
2 3

56_0404_4P2R_5%

+1.25VS

1

C621

2

0.1U_0402_10V6K

+1.25VS

1

C634

2

0.1U_0402_10V6K

+1.25VS

1

C626

2

0.1U_0402_10V6K

+1.25VS

1

C326

2

0.1U_0402_10V6K

+1.25VS

1

C323

2

0.1U_0402_10V6K

DDRA_SCS#0
DDRA_SCS#1

DDRA_SMA8
DDRA_SMA6

DDRA_SMA12
DDRA_SMA11

DDRA_SMA3
DDRA_SMA5

DDRA_SMA10
DDRA_SMA1

DDRA_SMA4
DDRA_SMA2

DDRA_SMA7
DDRA_SMA9

DDRA_SMA0
DDRA_SBS1

DDRA_SRAS#
DDRA_SCAS#

DDRA_CKE0
DDRA_CKE1

DDRA_SBS0
DDRA_SWE#

0.1U_0402_10V6K

1

C630

2

0.1U_0402_10V6K

1

C622

2

0.1U_0402_10V6K

1

C627

2

0.1U_0402_10V6K

1

C329

2

0.1U_0402_10V6K

1

C322

2

4

DDRA_SCS#0 8,12
DDRA_SCS#1 8,12

DDRA_SDQ[0..63]8,12
DDRA_SDQS[0..7]8,12
DDRA_SMA[0..12]8,12
DDRA_SDM[0..7]8,12

DDRA_SBS1 8,12

DDRA_SRAS# 8,12
DDRA_SCAS# 8,12

DDRA_CKE0 8,12
DDRA_CKE1 8,12

DDRA_SBS0 8,12
DDRA_SWE# 8,12

0.1U_0402_10V6K

1

C631

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C327

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C628

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C325

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C320

2

0.1U_0402_10V6K

1

2

1

2

1

2

1

2

1

C318

2

C629

C564

C316

C324

DDRB_SDQ2
DDRB_SDQ6

DDRA_SDQ[0..63]
DDRA_SDQS[0..7]

DDRA_SMA[0..12]

DDRA_SDM[0..7]

0.1U_0402_10V6K

1

2

0.1U_0402_10V6K

1

2

0.1U_0402_10V6K

1

2

0.1U_0402_10V6K

1

2

4.7U_0805_10V4Z

1

2

0.1U_0402_10V6K

1

C632

C624

C321

C619

C319

C633

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.1U_0402_10V6K

1

C625

2

0.1U_0402_10V6K

1

C328

2

4.7U_0805_10V4Z

1

C618

2

0.1U_0402_10V6K

1

C317

2

DDRB_SDQ0
DDRB_SDQ4

DDRB_SDQ7
DDRB_SDQS0

DDRB_SDM0
DDRB_SDQ1

DDRB_SDQ3
DDRB_SDQ13

DDRB_SDQ15
DDRB_SDQ8

DDRB_SDQ9 DDRB_SDQ14
DDRB_SDQ5

DDRB_SDQ11
DDRB_SDM1

DDRB_SDQS1
DDRB_SDQ12

DDRB_SDQ19
DDRB_SDQ16

DDRB_SDQ21
DDRB_SDQ20

DDRB_SDQ29
DDRB_SDM3

DDRB_SDQ22
DDRB_SDQS2

DDRB_SDQ24
DDRB_SDQ17

DDRB_SDQ23
DDRB_SDQ28

DDRB_SDM2
DDRB_SDQ18

DDRB_SDM6
DDRB_SDQ51

DDRB_SDQ42
DDRB_SDQ43

DDRB_SDM7

DDRB_SDQ54

DDRB_SDQ49
DDRB_SDQ52

3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

56_0404_4P2R_5%

1 4
2 3

56_0404_4P2R_5%

1 4
2 3

56_0404_4P2R_5%

1 4
2 3

56_0404_4P2R_5%

+1.25VS +1.25VS

RP92

56_0404_4P2R_5%

RP52

56_0404_4P2R_5%

RP51

56_0404_4P2R_5%

RP93

56_0404_4P2R_5%

RP94

56_0404_4P2R_5%

RP96

56_0404_4P2R_5%

RP50

56_0404_4P2R_5%

RP95

56_0404_4P2R_5%

RP49

56_0404_4P2R_5%

RP97

56_0404_4P2R_5%

RP48

56_0404_4P2R_5%

RP100

56_0404_4P2R_5%

RP47

56_0404_4P2R_5%

RP46

56_0404_4P2R_5%

RP99

56_0404_4P2R_5%

RP98

56_0404_4P2R_5%

RP109

RP32

RP26

RP31

RP45

56_0404_4P2R_5%

RP44

56_0404_4P2R_5%

RP24

56_0404_4P2R_5%

RP30

56_0404_4P2R_5%

RP25

56_0404_4P2R_5%

RP29

56_0404_4P2R_5%

RP43

56_0404_4P2R_5%

RP35

56_0404_4P2R_5%

RP104

56_0404_4P2R_5%

RP36

56_0404_4P2R_5%

RP105

56_0404_4P2R_5%

RP106

56_0404_4P2R_5%

RP108

56_0404_4P2R_5%

RP34

56_0404_4P2R_5%

RP107

56_0404_4P2R_5%

RP33

56_0404_4P2R_5%

RP103

56_0404_4P2R_5%

RP101

56_0404_4P2R_5%

RP28

56_0404_4P2R_5%

RP27

56_0404_4P2R_5%

DDRB_SDQS3

14

DDRB_SDQ25

23

DDRB_SDQ30

14

DDRB_SDQ26

23

DDRB_SDQ62

14

DDRB_SDQ59

23

DDRB_SDQ55

14

DDRB_SDQS6

23

DDRB_SDQ63

14

DDRB_SDQ61

23

DDRB_SDQ60

14

DDRB_SDQ50

23

14

DDRB_SDQ10

23

DDRB_SDQ37

14

DDRB_SDQS4

23

DDRB_SDM4

14

DDRB_SDQ39

23

DDRB_SDQ34

14

DDRB_SDQ33

23

DDRB_SDQ35

14

DDRB_SDQ46

23

DDRB_SDQ45

14

DDRB_SDM5

23

DDRB_SDQ48

14

DDRB_SDQ53

23

DDRB_SDQ40

14

DDRB_SDQ38

23

DDRB_SDQ41

14

DDRB_SDQ47

23

DDRB_SDQS5

14

DDRB_SDQ44

23

DDRB_SDQ32

14

DDRB_SDQ36

23

DDRB_SDQ27

14

DDRB_SDQ31

23

DDRB_SDQS7

14

DDRB_SDQ56

23

DDRB_SDQ57

14

DDRB_SDQ58

23

2

RP37

DDRB_SCS#0

14

DDRB_SWE#

23

56_0404_4P2R_5%

RP38

DDRB_SMA10

14

DDRB_SBS0

23

56_0404_4P2R_5%

RP41

DDRB_SMA12

14

DDRB_SMA9

23

56_0404_4P2R_5%
RP89

1 4
2 3

56_0404_4P2R_5%

1 4
2 3

+1.25VS

0.1U_0402_10V6K

+1.25VS

0.1U_0402_10V6K

+1.25VS

0.1U_0402_10V6K

+1.25VS

0.1U_0402_10V6K

DDRB_SMA8
DDRB_SMA11

RP39

DDRB_SMA1

14

DDRB_SMA3

23

56_0404_4P2R_5%

RP91

DDRB_SMA6

14

DDRB_SMA4

23

56_0404_4P2R_5%

RP40

DDRB_SMA5

14

DDRB_SMA7

23

56_0404_4P2R_5%

RP102

DDRB_SMA2

14

DDRB_SMA0

23

56_0404_4P2R_5%

RP42

DDRB_CKE1

14

DDRB_CKE0

23

56_0404_4P2R_5%

RP110

DDRB_SCAS#

14

DDRB_SCS#1

23

56_0404_4P2R_5%
RP90

DDRB_SRAS#
DDRB_SBS1

56_0404_4P2R_5%

0.1U_0402_10V6K

1

1

C284

2

1

C277

2

1

C563

2

1

C570

2

Decoupling Re f e r e n c e Document:
Springdale Customer Schematic R1.2 page26
each Channel(two DIMMs) requirement 4.7u*2 ; 0.1uF*26

C283

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C276

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C623

2

0.1U_0402_10V6K

4.7U_0805_10V4Z

1

C572

2

4.7U_0805_10V4Z

Title

DDR Termination Resistors

Size Document Number Rev

B

Date: Sheet of

星期一

DDRB_SCS#0 9,13

DDRB_SWE# 9,13

DDRB_SBS0 9,13

DDRB_SDQ[0..63]9,13
DDRB_SDQS[0..7]9,13
DDRB_SMA[0..12]9,13
DDRB_SDM[0..7]9,13

DDRB_CKE1 9,13
DDRB_CKE0 9,13

DDRB_SCAS# 9,13

DDRB_SCS#1 9,13

DDRB_SRAS# 9,13

DDRB_SBS1 9,13

1

C282

2

0.1U_0402_10V6K

1

C275

2

0.1U_0402_10V6K

1

C565

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C573

2

Sapporo 300P

, 01, 2003

十二月

1

C281

2

1

C274

2

1

C566

2

1

C571

2

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C280

2

0.1U_0402_10V6K

1

C273

2

0.1U_0402_10V6K

1

C567

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C259

2

1

DDRB_SDQ[0..63]
DDRB_SDQS[0..7]
DDRB_SMA[0..12]
DDRB_SDM[0..7]

0.1U_0402_10V6K

1

C279

2

0.1U_0402_10V6K

1

C272

2

0.1U_0402_10V6K

1

C568

2

1

C258

2

14 57

1

C278

2

1

C562

2

1

C569

2

0.3

5

4

3

2

1

SEL0 SEL1 CPU 3V66[0..3] REF0 REF1 SRC USB/Dot

+3VS_CLK+3VS

REF

48

L29

1 2

BLM21A601SPT_0805

L28

1 2

BLM21A601SPT_0805

1

C591
10U_1206_6.3V7K

2

0 0 100 66 14.3 14.3 100/200

0 MID REF REF REF REF REF

D D

0 1 200

1 0 133 66 14.3

1 1 166

66 14.3 100/200 48

66 14.3

14.3

14.3

14.3

100/200

100/2004848

1 MID Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z

CLK_ICH_14M24

CLK_14M_SIO37

C C

PM_SLP_S1#24
STP_PCI#24
STP_CPU#24,54

+3VS

12

R421
1K_0603_1%

B B

12

R420
2K_0603_1%

12

R185

2.49K_0603_1%

A A

12

R444
1K_0603_1%

CLKSEL0
CLKSEL1

12

R443
2K_0603_1%

12

R190

2.49K_0603_1%

R462 @0_0402_5%
R425 @0_0402_5%
R424 @0_0402_5%

R187 @0_0402_5%
R186 0_0402_5%
R188 0_0402_5%
R189 @0_0402_5%

12
12
12

12
12
12
12

MCH_CLKSEL0 7
MCH_CLKSEL1 7

SLP_S1#
STPPCI#
STPCPU#

CPU_CLKSEL0 5
CPU_CLKSEL1 5

Check SPEC (250mA,300 ohm)

+3VS

R450 33_0402_5%

R451 33_0402_5%

+3VS

CLK_ICH_48M24

L27
BLM11A601S_0603

1 2

12

12

C602

@10P_0402_50V8K

12

C603

@10P_0402_50V8K

12

Place crystal within
500 mils of CK409

R463 1K_0402_5%

1 2

R412 1K_0402_5%

1 2

R411 1K_0402_5%

1 2

CK409_PWRGD#53

ICH_SMB_CLK12,13,26
ICH_SMB_DATA12,13,26

R438 33_0402_5%

CLK_VDD_PLL

1

C578
10U_1206_6.3V7K

2

CLKREF1
CLKREF0

CLK_XTAL_IN

12

X3

14.31818MHz_20P_1BX14318CC1A~L

CLK_XTAL_OUT

CLK48M_OUT0

12

1 2

R437 475_0603_1%

1

C579

0.1U_0402_16V4Z

2

SLP_S1#
STPPCI#
STPCPU#

CLK_VTT_PG#

CK_SCLK
CK_SDATA

CLKSEL0
CLKSEL1

U42

1

REF_0

2

REF_1

4

XTAL_IN

5

XTAL_OUT

51

SEL0

56

SEL1

21

PWRDWN#

49

PCI_STP#

50

CPU_STP#

35

VTT_PWRGD#

28

SCLK

30

SDATA

37

SRCLKN_100MHZ

38

SRCLKP_100MHZ

31

USB_48MHZ

32

DOT_48MHZ

52

IREF

55

VDD_PLL

54

VSS_PLL

3

VDD_REF

16

VDD_PCI10VDD_PCI

VSS_REF

VSS_PCI11VSS_PCI

6

24

VDD_3V66

CK409

17

25

36

34

VDD_48

VDD_SRC

48/66MHZ_OUT/3V66_4

VSS_3V66

VSS_48

33

39

Place near each pin
W>40 mil

1

C583

0.1U_0402_10V6K

2

42

48

VSS_CPU

VDD_CPU

VDD_CPU

CPUCLKT2

CPU_CLKC2

CPUCLKT1

CPUCLKC1

CPUCLKT0

CPUCLKC0

66MHZ_OUT3/3V66_3
66MHZ_OUT2/3V66_2
66MHZ_OUT1/3V66_1
66MHZ_OUT0/3V66_0

PCICLK_F2
PCICLK_F1
PCICLK_F0

PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0

VSS_SRC

VSS_IREF

ICS952623BG_TSSOP56

53

1

C582

0.1U_0402_10V6K

2

1

C581

0.1U_0402_10V6K

2

45

CLK_CPU2

47

CLK_CPU2#

46

CLK_CPU1

44

CLK_CPU1#

43

CLK_CPU0

41

CLK_CPU0#

40
29

CLK66M_OUT3

27
26

CLK66M_OUT1

23

CLK66M_OUT0

22

PCICLK_F2

9

PCICLK0

8
7

PCICLK6

20

PCICLK5

19

PCICLK4

18

PCICLK3

15

PCICLK2

14

PCICLK1

13
12

1

C597

0.1U_0402_10V6K

2

1

C592

4.7U_0805_10V4Z

2

1 2

R428 33_0402_5%

1 2

R429 33_0402_5%

1 2

R430 33_0402_5%

1 2

R431 33_0402_5%

1 2

R432 33_0402_5%

1 2

R433 33_0402_5%

1 2

R457 33_0402_5%

1 2

R456 33_0402_5%

1 2

R455 33_0402_5%

1 2

R452 33_0402_5%

1 2

R713 33_0402_5%

1 2

R461 33_0402_5%

1 2

R460 33_0402_5%

1 2

R454 33_0402_5%

1 2

R459 33_0402_5%

1 2

R458 33_0402_5%

1 2

R453 33_0402_5%

1 2

1 2

1 2

1 2

1 2

Trace wide=40 mils

1

C596

0.1U_0402_10V6K

2

R41349.9_0603_1%

R41449.9_0603_1%

R41549.9_0603_1%

R41649.9_0603_1%

R41749.9_0603_1%

1 2

R41849.9_0603_1%

1

C595

0.1U_0402_10V6K

2

CLK_HCLK

CLK_HCLK#
CLK_ITP

CLK_ITP#
CLK_BCLK

1

C594

0.1U_0402_10V6K

2

CLK_HCLK 7

CLK_HCLK# 7
CLK_ITP 5

CLK_ITP# 5
CLK_BCLK 4

Place near CK409

CLK_BCLK#

CLK_AGP_66M 16

CLK_MCH_66M 10
CLK_ICH_66M 26
CLK_PCI_ICH 26
CLK_80H 13

CLK_PCI_MINI 30
CLK_PCI_PCM 28
CLK_PCI_LPC 40
CLK_PCI_1394 31
CLK_PCI_LAN 27
CLK_PCI_SIO 37

CLK_BCLK# 4

1

C580

0.1U_0402_10V6K

2

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Clock Generator

Sapporo 300P

星期一

, 01, 2003

十二月

0.3

15 57

1

5

Place close
to pin
H2 & H3

@2200P_0402_50V7K

1

C145

D D

AGP_AD[0..31]10

AGP_SBA[0..7]10

AGP_C/BE#[0..3]10

AGP_ST[0..2]10

+3VS

C C

0.1U_0402_10V6K

12

C479

NV_THERMDA

2

NV_THERMDC
I2CC_SCL
I2CC_SDA

R35
10K_0402_5%

1 2
1 2

R36 10K_0402_5%

4.7U_0805_10V4Z

12

C30

4.7U_0805_10V4Z

1 2

R67 220K_0402_5%

1 2

R69 220K_0402_5%

U33

2

D+

3

D-

8

SCLK

7

SDATA

@ADM1032ARM_RM8

AGP_AD[0..31]

AGP_SBA[0..7]

AGP_C/BE#[0..3]

AGP_ST[0..2]

STP_AGP#
AGP_BUSY#

12

C31

VDD1

ALERT#

THERM#

GND

+SVDD

L10

1 2

FCM2012C-800_0805

12

C478

0.1U_0402_10V6K

AGP_AD_STBS0
AGP_AD_STBS1

1

NV_THERCTL#

6
4
5

+3VS

2.2K_0402_5%

12

R128

@0.1U_0402_16V4Z

C16

1 2

@10P_0402_50V8K

CLK_AGP_66M15

Selection Table For W180

B B

Modulation
Setting

SS%

0
1

XTALOUTBUFF XTALSSIN

+3VS

R318
1K_0402_5%

1 2
1 2

A A

R317
1K_0402_5%

1

7
8

SST
Ratio

1.25%

3.75%

U31

X1/CLK

FS1
FS2

+SVDD

PLACE COLSE TO VGA

6

Pin AJ5, AJ7,

VDD

5

CLKOUT

2

X2

4

SS%

GND

W180-01GT_SO8

3

5

Close VGA ball (AK29)
less than 250mils

+AGP_VREF

1 2

22_0402_5%

R323

SPREAD_RATE

R341
@1K_0402_5%

R345
10K_0402_5%

1 2

1 2

+3VS

1

C13

0.1U_0402_10V6K

2

1 2

R70 63.4_0603_1%

+3VS

SWAPRDY_B
NV31,NV34 use.
NV18, NV36 not use.

+SVDD

only for NV36M only for NV36M

R752 10K_0402_5%

12

10K_0402_5%

12

R753

4

+3VS+3VS

12

R124
@2.2K_0402_5%

+3VS

1

C148

2

R68

1 2

@10_0402_5%

B_PCIRST#22,26,35,36

AGP_REQ#10
AGP_GNT#10

AGP_PAR10

AGP_STOP#10

AGP_DEVSEL#10

AGP_TRDY#10

AGP_IRDY#10

AGP_FRAME#10

PCI_PIRQA#26,28,31

AGP_WBF#10

AGP_RBF#10
AGP_DBIHI10
AGP_DBILO10

AGP_SB_STBF10

AGP_SB_STBS10
AGP_AD_STBF010
AGP_AD_STBS010
AGP_AD_STBF110
AGP_AD_STBS110

R42 10K_0402_5%

CRMA22

LUMA22

COMPS22

DACB_RSET

JTAG_TMS
JTAG_TDI

4

12

R343 @10K_0402_5%

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9

AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

CLK_AGP_66M
B_PCIRST#
AGP_REQ#
AGP_GNT#
AGP_PAR
AGP_STOP#
AGP_DEVSEL#
AGP_TRDY#
AGP_IRDY#

AGP_FRAME#

PCI_PIRQA#

AGP_WBF#

AGP_RBF#

AGP_SB_STBF
AGP_SB_STBS
AGP_AD_STBF0
AGP_AD_STBS0
AGP_AD_STBF1
AGP_AD_STBS1

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
AGP_ST0
AGP_ST1
AGP_ST2

+AGP_REF

12

AGP_BUSY#
STP_AGP#

CRMA

LUMA

COMPS
DACB_HSYNC
DACB_VSYNC

I2CB_CLK23

I2CB_DATA23

XTALIN
XTALOUT

XTALSSIN
XTALOUTBUFF
NV_THERMDA
NV_THERMDC
JTAG_TCLK
JTAG_TMS
JTAG_TDI

JTAG_TRST

PROPRIETARY NOTE

3

U35A

AJ28

AD0

AK28

AD1

AH27

AD2

AK27

AD3

AJ27

AD4

AH26

AD5

AJ26

AD6

AH25

AD7

AH23

AD8

AJ23

AD9

AH22

AD10

AJ22

AD11

AJ21

AD12

AK21

AD13

AH20

AD14

AJ20

AD15

AG26

AD16

AE24

AD17

AG25

AD18

AG24

AD19

AF24

AD20

AG23

AD21

AE22

AD22

AF22

AD23

AE21

AD24

AG20

AD25

AG19

AD26

AF19

AD27

AE19

AD28

AF18

AD29

AG18

AD30

AE18

AD31

AJ24

C/BE#0

AH19

C/BE#1

AF25

C/BE#2

AG22

C/BE#3

AG12

PCICLK

AF15

PCIRST#

AF13

PCIREQ#

AE15

PCIGNT#

AK18

PCIPAR

AH17

PCISTOP#

AJ16

PCIDEVSEL#

AJ17

PCITRDY#

AG16

PCIIRDY#

AK16

PCIFRAME#

AG15

PCIINTA#

AE10

NC

AG17

AGPWBF#

AG14

AGPRBF#

AJ18

AGPPIPE/ DBI_HI

AJ19

NC/ DBI_LO

AK13

AGPSB_STB/ ADSTBF

AJ13

AGPSB_STB#/ ADSTBS

AK24

AGPADSTB0/ ADSTBF0

AJ25

AGPADSTB0#/ADSTBS0

AG21

AGPADSTB1/ ADSTBF1

AF21

AGPADSTB1#/ADSTBS1

AJ11

AGPSBA0

AH11

AGPSBA1

AJ12

AGPSBA2

AH12

AGPSBA3

AJ14

AGPSBA4

AH14

AGPSBA5

AJ15

AGPSBA6

AH15

AGPSBA7

AG13

AGPST0

AE16

AGPST1

AE13

AGPST2

AK29

AGPVREF

AF16

NC/AGPMBDET#

AF12

AGP_BUSY#

AG11

STP_AGP#

AE2

DACB_RED/CHROMA

AD2

DACB_GREEN/LUMA

AD1

DACB_BLUE/COMPOSITE

AF3

DACB_HSYNC

AE3

DACB_VSYNC

AD3

DACB_RSET

AE7

I2CB_SCL

AF6

I2CB_SDA

AD4

SWAPRDY_B

Y5

STEREO

AC4

DACB_IDUMP

AJ6

XTALIN

AH6

XTALOUT

AJ7

XTALSSIN

AJ5

XTALOUTBUFF

H2

THERMDA

H3

THERMDC

C2

JTAG[0]

C1

JTAG[1]

D1

JTAG[2]

E2

JTAG[3]

D2

JTAG[4]

NV36M_BGA701

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

nVIDIA
NV36M

PCI/AGP

AGP4X/8X

DAC2

CLK

SSC

3

DVOCLKOUT#

ZV PORT / EXT TMDS / GPIO / ROMLVDSTMDS

DACA_GREEN
DACA_HSYNC

DACA_VSYNC

DAC1

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9

FPBCLKOUT#

FPBCLKOUT

ROMA14
ROMA15

ROMCS#

VIPPCLK
VIPHCTL

VIPHCLK
VIPHAD0

VIPHAD1

VIPD0
VIPD1
VIPD2
VIPD3
VIPD4
VIPD5
VIPD6
VIPD7

DVOD0
DVOD1
DVOD2
DVOD3
DVOD4
DVOD5
DVOD6
DVOD7
DVOD8

DVOD9
DVOD10
DVOD11

DVOHSYNC
DVOVSYNC

DVODE

DVOCLKOUT

I2CC_SCL

I2CC_SDA

BUFRST#

DVOCLKIN

STRAP0
STRAP1
STRAP2
STRAP3

IFPATXDO#

IFPATXDO

IFPATXD1#

IFPATXD1

IFPATXD2#

IFPATXD2

IFPATXD3#

IFPATXD3
IFPATXC#

IFPATXC

IFPBTXD4#

IFPBTXD4

IFPBTXD5#

IFPBTXD5

IFPBTXD6#

IFPBTXD6

IFPBTXD7#

IFPBTXD7
IFPBTXC#

IFPBTXC

DACA_RED

DACA_BLUE

DACA_RSET

I2CA_SCL

I2CA_SDA

SWAPRDY_A

DACA_IDUMP

IFPCTXD0#

IFPCTXD0

IFPCTXD1#

IFPCTXD1

IFPCTXD2#

IFPCTXD2
IFPCTXC#

IFPCTXC

VGA_GPIO0

G5
F4

ENBKL

G4

ENVDD

H5
H4

VGA_GPIO5

J4

VAG_GPIO6

J5

POWER_SEL_F

J6

NV_THERCTL#

K4
K6

M2
M3

ROMA14

R2

ROMA15

R1
AF2

L4

VIPHCTL

M4
M5

P3
P2

J3
J2

VIPD2

K2

VIPD3

K1

VIPD4

L3

VIPD5

L2

VIPD6

N2

VIPD7

N1
AG2

AH1

DVOD2

AG3

DVOD3

AJ1
AH2
AK1
AJ3
AK3

DVOD8

AH4

DVOD9

AK4
AJ4
AH5

DVO_HSYNC

AD5
AD6

DVODE

AE4

1 2

AJ2

R760 33_0402_5%

AK2

I2CC_SCL

AG6

I2CC_SDA

AG7
B1

DVOCLKIN

AG1
G1

G2
F2
F3

TXOUT0-

T4

TXOUT0+

U4

TXOUT1-

AA1

TXOUT1+

Y2

TXOUT2-

W3

TXOUT2+

V3

TXOUT3-

V4

TXOUT3+

U5

TXCLK-

V1

TXCLK+

W2

TZOUT0-

V5

TZOUT0+

W4

TZOUT1-

AB2

TZOUT1+

AB3

TZOUT2-

W6

TZOUT2+

Y6

TZOUT3-

AC2

TZOUT3+

AC3

TZCLK-

Y3

TZCLK+

AA2

R

AK10

G

AJ10

B

AJ9

DACA_HSYNC

AH9

DACA_VSYNC

AJ8

DACA_RSET

AG8

DDC_CLK

AG5

DDC_DATA

AF7
AF9

R41 @10K_0402_5%

AG10
T2

R3
T3
U2
V2
U3
P4
P5

12

R132 0_0402_5%

R374 @0_0402_5%
R129 10K_0402_5%
R701 @0_0402_5%

Only for
NV34MU, NV31
Power Mizer

R749

10K_0402_5%

only for NV36M

DVOD0 23
DVOD1 23
DVOD2 23
DVOD3 23
DVOD4 23
DVOD5 23
DVOD6 23
DVOD7 23
DVOD8 23
DVOD9 23
DVOD10 23
DVOD11 23

DVO_HSYNC 23
DVO_VSYNC 23

DVOCLKOUT 23

R693
R694

BUFRST# 23

DVOCLKIN 23

STRAP0
STRAP1
STRAP2
STRAP3

TXOUT0- 22
TXOUT0+ 22
TXOUT1- 22
TXOUT1+ 22
TXOUT2- 22
TXOUT2+ 22
TXOUT3- 22
TXOUT3+ 22
TXCLK- 22
TXCLK+ 22
TZOUT0- 22
TZOUT0+ 22
TZOUT1- 22
TZOUT1+ 22
TZOUT2- 22
TZOUT2+ 22
TZOUT3- 22
TZOUT3+ 22
TZCLK- 22
TZCLK+ 22

R22
G22
B22
DACA_HSYNC 22
DACA_VSYNC 22

1 2

R39 130_0603_1%

12

SWAPRDY_A
NV31,NV34 use.
NV18, NV36 not use.

R754 10K_0402_5%

ENBKL 22,40
ENVDD 22

12
12
12

12

+3VS

12

2.2K_0402_5%

12

2.2K_0402_5%

DDC_CLK 22
DDC_DATA 22

+3VS

12
12

2

SPREAD_RATE

(SUS_STAT#)

R133 10K_0402_5%

PCI_AD_SWAP: 0-RVSERSED 1-NORMAL

1

SUB_VENDOR: 0-SYSTEM BIOS 1-ADAPTER BIOS

2

R376 10K_0402_5%

RAM_CFG[3:0]

3

(1101 = 4Mx32 DDR,0000 =8Mx32 DDR Samsung, 0001 =8Mx32 DDR Hynix, DQS per byte)

Low

High

Low

High

Low

High

Low

High

Low

High

R378 @10K_0402_5%

NV18M

0

R334 @10K_0402_5%

NV31M:NV34M

4

R380 @10K_0402_5%

NV18M

1

R329 10K_0402_5%

NV31M:NV34M

5

R49 @10K_0402_5%

2

R50 @10K_0402_5%

3

CRYSTAL: (10)-27MHz

6

R373 10K_0402_5%

0
1

TVMODE: (01)-NTSC

7

0

R339 10K_0402_5%

1

AGP8X/4X: (0)-8X / (1)-4X

8

R48 10K_0402_5%

AGP_SIDEBAND: (0)-ENABLE

9

R360 10K_0402_5%

AGP_FASTWRITE: (0)-ENABLE

10

R319 10K_0402_5%

PCI_DEVID[3:0]

11

R366 10K_0402_5%

0

R363 10K_0402_5%

1

R370 10K_0402_5%

2

R346 @10K_0402_5%

3

BUS_TYPE: (1)-AGP

12

ROM TYPE: (00)-PARALLEL

R354 10K_0402_5%

0

R351 10K_0402_5%

1

DVOCLKIN

only for NV36M

JTAG_TCLK

R75110K_0402_5%

JTAG_TRST

2

+3VS

POWER_SEL 52

12

R750 @10K_0402_5%

Title

Size Document Number Rev

Date: Sheet

DVODE

1 2

R691 @10K_0402_5%

ONLY FOR NV18M

ENBKL

1 2

R682 10K_0402_5%

POWER_SEL

1 2

R683 @10K_0402_5%

+3VS

STRAP0

R377 10K_0402_5%

12

12
12

12
12

12
12

12

12

12

12

12

STRAP1

STRAP2
DVOD2

STRAP3
DVOD3

DACA_VSYNC
DACA_HSYNC

VIPD2
VIPD6

DACB_VSYNC
DACB_HSYNC

DVOD9

VIPD7

DVOD8

R379 @10K_0402_5%
R335 10K_0402_5%

R381 @10K_0402_5%
R330 @10K_0402_5%

R29 10K_0402_5%
R30 10K_0402_5%

R357 10K_0402_5%

R340 10K_0402_5%

R361 @10K_0402_5%

R320 @10K_0402_5%

(1000 NV36M 0100 NV34M 1010 NV31M)

VIPD4

12
12
12
12

12
12

DVO_HSYNC

12

R367 @10K_0402_5%

VIPD5

R364 @10K_0402_5%

VIPD3

R371 @10K_0402_5%
R347 10K_0402_5%

VIPHCTL

R126 10K_0402_5%

ROMA14

R355 @10K_0402_5%

ROMA15

R352 @10K_0402_5%

XTALIN

1

C468

22P_0402_50V8J

2

Compal Electronics, Inc.
nVIDIA NV36M (AGP BUS)

Sapporo 300P

星期一

, 01, 2003

十二月

1

12

12
12

12
12

12
12

12

12

12

12

12
12
12
12

12

12
12

Y2

XTALOUT

1 2

27MHZ_16PF

1 2

R311 @2M_0402_5%

22P_0402_50V8J

16 57

1

+3VS

1

C469

2

0.3

of

5

4

3

2

1

NDQMA[0..7]20

NDQSA[0..7]20

D D

C C

B B

A A

NMAA[0..11]20
NMDA[0..63]20

NDQMA[0..7]
NDQSA[0..7]

NMAA[0..11]

NMDA[0..63]

NMDA0
NMDA1
NMDA2
NMDA3
NMDA4
NMDA5
NMDA6
NMDA7
NMDA8
NMDA9
NMDA10
NMDA11
NMDA12
NMDA13
NMDA14
NMDA15
NMDA16
NMDA17
NMDA18
NMDA19
NMDA20
NMDA21
NMDA22
NMDA23
NMDA24
NMDA25
NMDA26
NMDA27
NMDA28
NMDA29
NMDA30
NMDA31
NMDA32
NMDA33
NMDA34
NMDA35
NMDA36
NMDA37
NMDA38
NMDA39
NMDA40
NMDA41
NMDA42
NMDA43
NMDA44
NMDA45
NMDA46
NMDA47
NMDA48
NMDA49
NMDA50
NMDA51
NMDA52
NMDA53
NMDA54
NMDA55
NMDA56
NMDA57
NMDA58
NMDA59
NMDA60
NMDA61
NMDA62
NMDA63

M25

M29
M28

G30

G26

G29

AJ29

AJ30
AH29
AH30
AF29
AE29
AD29
AC28
AG28
AF27
AE26
AE28
AD25
AB25
AB26
AA25
AD30
AC29
AB28
AB29

W28
W29

AC27
AB27
AA27
AA26

W25

N25
N27
N26

K26
K27
J27
H27
N29

L29
J29
J28
H29

K25
J26
J25

F28
F26
E27
D27
H28

F29
E29
C30
C29
B30
A30

Y29

V29

V26
V27
V25

U35B

FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63

NV36M_BGA701

FBAA0
FBAA1
FBAA2
FBAA3
FBAA4
FBAA5
FBAA6
FBAA7
FBAA8

FBAA9
FBAA10
FBAA11
FBAA12

FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7

FBADQS0
FBADQS1
FBADQS2
FBADQS3
FBADQS4
FBADQS5
FBADQS6
FBADQS7

FBARAS#
FBACAS#

FBAWE#
FBACS0#
FBACS1#

FBACKE

MEMORY INTERFACE

A

FBACLK0

FBACLK0#

FBACLK1

FBACLK1#

FBABA0
FBABA1

FB_VREF

NMAA1

U28

NMAA2

U29

NMAA3

T28

NMAA4

T29

NMAA5

T27

NMAA6

T30

NMAA7

T26

NMAA8

T25

NMAA9

R27

NMAA10

R25

NMAA11

R30
U24

NDQMA0

L27

NDQMA1

K29

NDQMA2

G25

NDQMA3

E28

NDQMA4

AF28

NDQMA5

AD27

NDQMA6

AA30

NDQMA7

Y27

M27

NDQSA1

K30

NDQSA2

G27

NDQSA3

D30

NDQSA4

AG30

NDQSA5

AD26

NDQSA6

AA29

NDQSA7

W27

NMRASA#

P28

NMCASA#

P29

NMWEA#

R28

NMCSA0#

U27

NMCSA1#

P27

NMCKEA

N30

NMCLKA0

U21

NMCLKA0#

V21

NMCLKA1 NMCLKB1#

N21

NMCLKA1#

P21

NMA_BA0

R26
R29

C28

NMA_BA1

A_REF

(10 mil)

NMA_BA0 20
NMA_BA1 20

1

C173

0.1U_0402_10V6K

2

NMAA0

V30

NMRASA# 20
NMCASA# 20
NMWEA# 20
NMCSA0# 20
NMCSA1# 20
NMCKEA 20

NDQMB[0..7]21

NDQSB[0..7]21

NMDB[0..63]21

NMAB[0..11]21

+2.5VS

12

12

12

R89
@120_0402_5%

12

R105
@120_0402_5%

R138
1K_0603_1%

R135
1K_0603_1%

NDQMB[0..7]
NDQSB[0..7]
NMAB[0..11]
NMDB[0..63]

NMCLKA0 20

NMCLKA0# 20
NMCLKA1 20

NMCLKA1# 20

1 2

R358 10K_0402_5%

1 2

R389 10K_0402_5%

NMDB0
NMDB1
NMDB2
NMDB3
NMDB4
NMDB5
NMDB6
NMDB7
NMDB8
NMDB9
NMDB10
NMDB11
NMDB12
NMDB13
NMDB14
NMDB15
NMDB16
NMDB17
NMDB18
NMDB19
NMDB20
NMDB21
NMDB22
NMDB23
NMDB24
NMDB25
NMDB26
NMDB27
NMDB28NDQSA0
NMDB29
NMDB30
NMDB31
NMDB32
NMDB33
NMDB34
NMDB35
NMDB36
NMDB37
NMDB38
NMDB39
NMDB40
NMDB41
NMDB42
NMDB43
NMDB44
NMDB45
NMDB46
NMDB47
NMDB48
NMDB49
NMDB50
NMDB51
NMDB52
NMDB53
NMDB54
NMDB55
NMDB56
NMDB57
NMDB58
NMDB59
NMDB60
NMDB61
NMDB62
NMDB63

NV36M use 10K

F13
D13
E13

F12
E10
D10

D9

D8
B13
B12
C12
B11

B9

C9

B8

A7

F10

E9

F9

F7

C6

E6

D5

C4

C8

B7

B6

B5

A3

B3

A2

B2
B29
A29
B28
A28
B26
B25
B24
C23
E26
D26
E25
C25
E24

F22

E22

F21
A24
B23
C22
B22
B20
C19
B19
B18
D23
D22
D21
E21

F19
E18
D18

F18

NMCKEA

NMCKEB

U35C

FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63

NV36M_BGA701

FBCA0
FBCA1
FBCA2
FBCA3
FBCA4
FBCA5
FBCA6
FBCA7
FBCA8

FBCA9
FBCA10
FBCA11
FBCA12

FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7

FBCDQS0
FBCDQS1
FBCDQS2
FBCDQS3
FBCDQS4
FBCDQS5
FBCDQS6
FBCDQS7

FBCRAS#
FBCCAS#

FBCWE#

MEMORY INTERFACE B

FBCCS0#
FBCCS1#

FBCCKE

FBCCLK0

FBCCLK0#

FBCCLK1

FBCCLK1#

FBCBA0
FBCBA1

C17
B17
C16
B16
D16
A16
E16
F16
D15
F15
A15
G17

D11
B10
D7
C5
C26
F24
B21
D20

D12
A10
E7
A4
A27
D24
A21
D19

C14
B14
C15
D17
D14
A13
K18

K17

K13
K14

E15
B15

NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11

NDQMB0
NDQMB1
NDQMB2
NDQMB3
NDQMB4
NDQMB5
NDQMB6
NDQMB7

NDQSB0
NDQSB1
NDQSB2
NDQSB3
NDQSB4
NDQSB5
NDQSB6
NDQSB7

NMRASB#
NMCASB#
NMWEB#
NMCSB0#
NMCSB1#
NMCKEB
NMCLKB0

NMCLKB0#

NMCLKB1

NMB_BA0
NMB_BA1

NMRASB# 21
NMCASB# 21
NMWEB# 21
NMCSB0# 21
NMCSB1# 21
NMCKEB 21

NMB_BA0 21
NMB_BA1 21

12

R111
@120_0402_5%

12

R110
@120_0402_5%

NMCLKB0 21

NMCLKB0# 21

NMCLKB1 21

NMCLKB1# 21

NMAB0

A18

Title

Size Document Number Rev

5

4

3

2

Date: Sheet

Compal Electronics, Inc.

nVIDIA NV36M (DDR)

Sapporo 300P

星期一

, 01, 2003

十二月

1

of

17 57

0.3

5

4

3

2

1

U35D

+1.5VS

D D

+VGA_CORE

C C

+3VS

+1.5VS

R40 49.9_0603_1%

1 2
1 2

R82 49.9_0603_1%

B B

FBCAL_PD_VDDQ
NV31,NV34 use.
NV18 not use.

FBCAL_PUK_GND
NV31,NV34 use.
NV18 not use.

FBCAL_TERM_GND
NV31 use (tie to GND).
NV18,NV34 not use.

FBCAL_CLK_GND
NV31 use.
NV18,NV34 not use.

A A

+5VS

AGPCALPD_VDDQ
AGPCALPU_GND
+AGP_PLLVDD

+2.5VS

+1.25VSFBVTT

AD11
AD14
AD17
AD20
AD23
AE11
AE14
AE17
AE20
AE23

AA17
AA18

G14

AC6

AC7
AD12
AD15
AD19
AD22
AD16

AE9
AA13
AA14
AE12

G11

G20

G23

AC24
AC25

AA6

AC5

AF10
AG29
AE27

L11
L13
L14
L17
L18
L20

N11
N20
P11
P20
U11
U20
V11
V20
Y11
Y13
Y14
Y17
Y18
Y20

P24

F11
F14
F17
F20
F23

H24
H25
L24
L25
P25
U25
Y24
Y25

Y28

N6

H6
H7

M6

U6
U7

N4

F8

G8

G9

AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

VD50CLAMP0
VD50CLAMP1
AGPCALPD_VDDQ
AGPCALPU_GND
AGP_PLLVDD

FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

NC
NC
NC
NC
NC
FBVTT
NC

NV36M_BGA701

IFPABVPROBE

IFPABRSET

IFPABPLLVDD
IFPABPLLGND

IFPAIOVDD

IFPAIOGND

IFPBIOVDD

IFPBIOGND

IFPCVPROBE

IFPCRSET

IFPCPLLVDD
IFPCPLLGND

IFPCIOVDD

IFPCIOGND

VIPVDDQ
VIPVDDQ
VIPVDDQ

VIPCAL_PD_VDDQ

VIPCAL_PU_GND

DVOVDDQ
DVOVDDQ
DVOVDDQ

DVOCAL_PD_VDDQ

DVOCAL_PU_GND

DVO_VREF

TESTMODE

TESTMECLK

DACB_VDD

DACB_VREF

DACA_VDD

I/O POWER

DACA_VREF

FBCAL_PD_VDDQ

FBCAL_PU_GND

FBCAL_TERM_GND

FBCAL_CLK_GND

FB_DLLVDD

PLLVDD

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

AA4
V6

U10
V10

T5
T6

Y4
W5

AA3
R4

P10
N10

R5
R6

L6
L7
M7

P6
P7

AD8
AD9
AE8

AB6
AB7
AF4

AE5
G24

AB4
AB5

AG9
AH8

F5
E4
D3
E3

C27
AK7

B4
B27
C11
C20
D6
D25
D29
E12
E19
F27
L28
M26
N5
W7
W26
Y7

IFABVPROBE
IFPABREST

+IFPABPLLVDD

+IFPABIOVDD

IFPCVPROBE

+IFPCPLLVDD

+IFPCIOVDD

VIPCAL_1
VIPCAL_2

DVOCAL_1
DVOCAL_2

R342 10K_0402_5%

1 2

R117 10K_0402_5%

1 2

+DACA/BVDD
DACAVREF

1

C10

0.01U_0603_50V7K

2

+FB_DLLVDD

+PLLVDD

C44 0.1U_0402_10V6K

1 2

1 2

R109 1K_0402_5%

C55

R112 @1K_0402_5%
R107 10K_0402_5%

R114 10K_0402_5%

R120 49.9_0603_1%
R125 49.9_0603_1%

NV31 use only.
NV18,NV34, NV36 not use.

R349 49.9_0603_1%
R348 49.9_0603_1%

DACBVREF

1 2

1 2
1 2

1 2

1 2

1 2
1 2

TESTMECLK
NV31,NV34 use.
NV18 not use.

1

C67

0.01U_0402_50V7K

2

@0.1U_0402_10V6K

12

12
12
12
12

R385 use 49.9 for NV36M

1

2

+VIP/DVOVDDQ

NV31 use only.
NV18,NV34 not use.

+DVO_VREF

+2.5VS

R13649.9_0603_1%
R13949.9_0603_1%
R38549.9_0603_1%
R137549_0603_1%

C176
4700P_0402_25V7K

+1.5VS

1

C61

4.7U_0805_10V4Z

2

NV36M not use

1

C23

0.1U_0402_10V6K

2

1

C100
470P_0402_50V8J

2

KC FBM-L11-201209-221LMAT_0805

1

C182
470P_0402_50V8J

2

1

C62
4700P_0402_25V7K

2

L15

1 2

1

C36

0.1U_0402_16V4Z

2

+VIP/DVOVDDQ

12

R76
1K_0603_1%

12

R71
1K_0603_1%

NV36M not use

1

2

+3VS

+FB_DLLVDD
NV31,NV34 use.
NV18 not use.

1

C40

0.022U_0402_16V7K

2

L14

12

KC FBM-L11-201209-221LMAT_0805

C131

4.7U_0805_10V4Z

1

2

+3VS

+AGP_PLLVDD+FB_DLLVDD

C471

4.7U_0805_10V4Z

C39

0.022U_0402_16V7K

+DACA/BVDD

1

C53

4.7U_0805_10V4Z

2

+PLLVDD

C472

1

4.7U_0805_10V4Z

2

+IFPABPLLVDD

1

C87
470P_0402_50V8J

2

+VIP/DVOVDDQ+IFPABIOVDD

1

C50
470P_0402_50V8J

2

1

2

1

C49

0.022U_0402_16V7K

2

1

C65
4700P_0402_25V7K

2

1

C474

4700P_0402_25V7K

2

1

C88
4700P_0402_25V7K

2

1

2

C37
4700P_0402_25V7K

+5VS

1

C41

0.1U_0402_10V6K

2

1

C24
470P_0402_50V8J

2

1

C15

2

C114
4700P_0402_25V7K

L19

1 2

KC FBM-L11-201209-221LMAT_0805

1

C43
470P_0402_50V8J

2

+AGP_PLLVDD
NV31,NV34 use.
NV18 not use.

1

C110

0.1U_0402_10V6K

2

L11

1 2

KC FBM-L11-201209-221LMAT_0805

1 2

KC FBM-L11-201209-221LMAT_0805

470P_0402_50V8J

KC FBM-L11-201209-221LMAT_0805

1 2

KC FBM-L11-201209-221LMAT_0805

+3VS

+3VS

+3VS

L20

+3VS

L13

12

+3VS

L12

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

nVIDIA NV36M POWER)

Sapporo 300P

星期一

, 01, 2003

十二月

1

of

18 57

0.3

5

4

3

2

1

+1.25VSFBVTT

+VGA_CORE

1

C129

4.7U_0805_10V4Z

2

+VGA_CORE

1

C119
470P_0402_50V8J

2

+1.25VSFBVTT

1

C816
1U_0603_10V6K

2

+2.5VS

1

C58
1U_0603_10V6K

2

+2.5VS

1

C136
4700P_0402_25V7K

2

+3VS

1

C54
1U_0603_10V6K

2

+3VS

1

C140

0.022U_0402_16V7K

2

+VGA_CORE

D

S

R118
@470_0402_5%

1 2

Q8

13

@2N7002

2

G

1

C75

4.7U_0805_10V4Z

2

1

C109
470P_0402_50V8J

2

1

C817
1U_0603_10V6K

2

1

C71

4.7U_0805_10V4Z

2

1

C89
470P_0402_50V8J

2

1

C818

0.1U_0402_10V6K

2

1

C74
1U_0603_10V6K

2

1

C90
470P_0402_50V8J

2

1

C819

0.1U_0402_10V6K

2

1

C130
1U_0603_10V6K

2

1

C118
4700P_0402_25V7K

2

1

C820

0.1U_0402_10V6K

2

1

C102
1U_0603_10V6K

2

1

C78
4700P_0402_25V7K

2

1

C821

0.1U_0402_10V6K

2

1

2

1

C822
4700P_0402_25V7K

2

Only for NV36M

1

C97
1U_0603_10V6K

2

1

C152
4700P_0402_25V7K

2

1

C59
1U_0603_10V6K

2

1

C104
4700P_0402_25V7K

2

SUSP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C79
1U_0603_10V6K

2

1

C85

0.1U_0402_10V6K

2

SUSP 42,53

1

C151
4700P_0402_25V7K

2

1

2

1

C101
4700P_0402_25V7K

2

3

1

C91

0.1U_0402_10V6K

2

1

C150

0.022U_0402_16V7K

2

C48

0.1U_0402_10V6K

1

C128
4700P_0402_25V7K

2

+2.5VS

@22U_1206_10V4Z

1

C105

0.1U_0402_10V6K

2

1

C52

0.1U_0402_10V6K

2

20mil

1

C827

2

1

C137

0.1U_0402_10V6K

2

1

C146

0.022U_0402_16V7K

2

1

C38

0.1U_0402_10V6K

2

1

C828

2

@22U_1206_10V4Z

1

C149

0.022U_0402_16V7K

2

1

2

SUSP#32,35,40,41,42,50,51,52,53

1

C829

@0.1U_0402_16V4Z

2

2

1

C66

0.1U_0402_10V6K

2

C51

0.022U_0402_16V7K

1

C96
1U_0603_10V6K

1

C77
4700P_0402_25V7K

2

C115

0.1U_0402_10V6K

2

1

C823
4700P_0402_25V7K

2

1

C120

0.1U_0402_10V6K

2

1

C142

0.022U_0402_16V7K

2

Only for NV36M

U63

7
4

1

VDD

STANDBY
VD

ExtRefIn
RefOut8VttSense
VSS

@NE57814_HSO8

max ITT = 3.5A

Title

Size Document Number Rev

Date: Sheet

1

2

1

C825
4700P_0402_25V7K

2

1

C138

0.1U_0402_10V6K

2

+1.25VSFBVTT

C84

0.1U_0402_10V6K

VTT

1

C111

0.1U_0402_10V6K

2

1

C824
4700P_0402_25V7K

2

1

C121

0.1U_0402_10V6K

2

20mil

5
6
2

1

C830

3

+

@220U_D2_4M_R45

2

Compal Electronics, Inc.

nVIDIA NV36M (DECOUPLING CAP)

Sapporo 300P

星期一

, 01, 2003

十二月

1

1

C123

0.1U_0402_10V6K

2

1

C153

0.1U_0402_10V6K

2

+2.5VS

1

C826
@0.1U_0402_16V4Z

2
1

C831
@0.1U_0402_16V4Z

2

of

19 57

0.3

U35E

A9

GND

A12

GND

A19

GND

A22

GND

A25

GND

C3

GND

C7

GND

D D

C C

B B

+1.25VSFBVTT

A A

+3VS

R720 10K_0402_5%

R721 10K_0402_5%

C10
C13
C18
C21
C24

D28

E11
E14
E17
E20
E23

F25
F30

G3
G28
H11
H20
H26

J30

K28

L23
L26

M1

M30

N28
P26

U26
V28

W1

W30

Y23
Y26
AA5

AA28

AB1

AB30
AC11
AC20
AC26
AD28

AE1
AE6

AE25
AE30

AF5
AF8

AF11
AF14
AF17
AF20
AF23
AF26

AG4

AG27

AH3
AH7

AH10

R24

T24

W24

AB24
AK30

G6

HDCP_SCL
HDCP_SDA

12

12

Only for NV36M

5

GND
GND
GND
GND
GND

D4

GND
GND

E5

GND

E8

GND
GND
GND
GND
GND
GND

F1

GND

F6

GND
GND
GND
GND
GND
GND
GND
GND

J1

GND

J7

GND
GND

K3

GND

K5

GND
GND

L5

GND

L8

GND
GND
GND
GND
GND

N3

GND
GND
GND

T1

GND
GND
GND
GND
GND

Y8

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

A6

GND
FBVTT

FBVTT
FBVTT
FBVTT

A1

FBC0_RST
FBA0_RST
NC

R7

HDCP_SCL

T7

HDCP_SDA

NV36M_BGA701

GROUND

HDCP_SCL

HDCP_SDA

T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT

M12
M13
M14
M15
M16
M17
M18
M19
N12
N13
N14
N15
N16
N17
N18
N19
P12
P13
P14
P15
P16
P17
P18
P19
R12
R13
R14
R15
R16
R17
R18
R19
T12
T13
T14
T15
T16
T17
T18
T19
U12
U13
U14
U15
U16
U17
U18
U19
V12
V13
V14
V15
V16
V17
V18
V19
W12
W13
W14
W15
W16
W17
W18
W19

AH13
AH16
AH18
AH21
AH24
AH28
AK6
AK9
AK12
AK15
AK19
AK22
AK25

G12
G15
G16
G19
G22
J24
M24

4

5

4

3

2

1

+2.5VS +2.5VS

NDQMA[0..7]17

NDQSA[0..7]17
NMAA[0..11]17

D D

NMDA[0..63]17

NDQMA[0..7]
NDQSA[0..7]
NMAA[0..11]
NMDA[0..63]

22U_1206_10V4Z

for NV36M for NV36M

+1.25VSFBVTT +1.25VSFBVTT

R722 68_0402_5%

1 2

R724 68_0402_5%

1 2

R726 68_0402_5%

1 2

R728 68_0402_5%

1 2

C832 0.1U_0402_16V7K

1 2

C834 0.01U_0402_16V7K

1 2

C C

+2.5VS

R382
1K_0603_1%

1 2

R386
1K_0603_1%

1 2

B B

(25mil) (25mil)

1

C510

0.1U_0402_10V6K

2

NMCLKA0#17 NMCLKA1#17
NMCSA1#17

NDQSA0
NDQSA3 NDQSA6
NDQSA1
NDQSA2

NMA_BA017
NMA_BA117

NMRASA#17
NMCASA#17
NMWEA#17
NMCSA0#17

NMCKEA17

NMCLKA0

R131
@100_0402_5%

NMCLKA0#
NMCSA1# CSA1# CSA1#

1 2

R709 @0_0402_5%

Reserved for
Hynix 8Mx32

for NV36M

+1.25VSFBVTT

R730 68_0402_5%

1 2

R732 68_0402_5%

1 2

C837 0.1U_0402_16V7K

A A

1 2

C839 0.01U_0402_16V7K

1 2

NMCLKA0
NMCLKA0#

12

C122

22U_1206_10V4Z

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMA_BA0
NMA_BA1

NDQMA0
NDQMA3
NDQMA1
NDQMA2

NDQSA0
NDQSA3
NDQSA1
NDQSA2

VR_VREF_1

NMRASA#
NMCASA#
NMWEA#
NMCSA0#

NMCKEA

12

C178

U32

N5
N6

M6

N7
N8

M9

N9
N10
N11

M8

L6

M7

N4

M5

B3
H12

H3
B12

B2
H13

H2
B13

N13

M13

L9

M10

M2

L2

L3

N2
N12

M11
M12

C4
C11

H4
H11
L12
L13

M3
M4

N3

E7

E8
E10

K6

K7

K8

K9

L5
L10

E5

0.1U_0402_10V6K

1

C133

2

0.1U_0402_10V6K

B11

D10

D11

VSSQB4VSSQ

VSSQD4VSSQD5VSSQD6VSSQD9VSSQ

VSSQ

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

DM0
DM1
DM2
DM3

DQS0
DQS1
DQS2
DQS3

VREF
MCL
RFU1
RFU2

RAS#
CAS#
WE#
CS#

CKE
CK

CK#
NC

NC
NC
NC
NC
NC
NC
NC
NC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS THF6VSS THF7VSS THF8VSS THF9VSS THG6VSS THG7VSS THG8VSS THG9VSS THH6VSS THH7VSS THH8VSS THH9VSS THJ6VSS THJ7VSS THJ8VSS TH

As close as ppossible to related pin

0.1U_0402_10V6K

1

C132

2

F10

VSSQE6VSSQE9VSSQF5VSSQ

0.1U_0402_10V6K

G10

H10

VSSQG5VSSQ

VSSQH5VSSQ

VSSQJ5VSSQ

1

C144

2

J10

1

2

K10

VSSQK5VSSQ

NMDA1

B7

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

J9

NMDA5

C6

NMDA2

B6

NMDA0

B5

NMDA4

C2

NMDA3

D3

NMDA7

D2

NMDA6

E2

NMDA24

K13

NMDA25

K12

NMDA26

J13

NMDA27

J12

NMDA28

G13

NMDA29

G12

NMDA30

F13

NMDA31

F12

NMDA8

F3

NMDA10

F2

NMDA11

G3

NMDA9

G2

NMDA13

J3

NMDA12

J2

NMDA15

K2

NMDA14

K3

NMDA23

E13

NMDA22

D13

NMDA21

D12

NMDA20

C13

NMDA19

B10

NMDA17

B9

NMDA18

C9

NMDA16

B8

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

K4D263238A-GC_FBGA144

C162

1

2

0.01U_0402_16V7K

+2.5VS +2.5VS

0.01U_0402_16V7K

C161

1

2

R723 68_0402_5%
R725 68_0402_5%
R727 68_0402_5%
R729 68_0402_5%

+2.5VS

1

C154

C139

2

22U_1206_10V4Z

0.01U_0402_16V7K

1 2
1 2
1 2
1 2

C833 0.1U_0402_16V7K

1 2

C835 0.01U_0402_16V7K

1 2

R96
1K_0603_1%

1 2

R98
1K_0603_1%

1 2

1

2

NMCLKA117NMCLKA017

for NV36M

+1.25VSFBVTT

R731 68_0402_5%

1 2

R733 68_0402_5%

1 2

C836 0.1U_0402_16V7K

1 2

C838 0.01U_0402_16V7K

1 2

22U_1206_10V4Z

12

C14

NDQSA5
NDQSA4

NDQSA7

C68

0.1U_0402_10V6K

NMCLKA1

NMCLKA1#

12

C473

NMCLKA1
NMCLKA1#

1

2

0.1U_0402_10V6K

R81
@100_0402_5%

0.1U_0402_10V6K

C20

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMA_BA0
NMA_BA1

NDQMA5
NDQMA6
NDQMA4
NDQMA7

NDQSA5
NDQSA6
NDQSA4
NDQSA7

VR_VREF_2

NMRASA#
NMCASA#
NMWEA#
NMCSA0#

NMCKEA

1

C29

2

U29

N5
N6

M6

N7
N8

M9

N9
N10
N11

M8

L6

M7

N4

M5

B3
H12

H3
B12

B2
H13

H2
B13

N13

M13

L9

M10

M2

L2
L3

N2
N12

M11
M12

C4
C11

H4
H11
L12
L13

M3
M4

N3

E7

E8
E10

K6

K7

K8

K9

L5

L10

E5

0.1U_0402_10V6K

D10

D11

VSSQ

1

C57

2

F10

VSSQE6VSSQE9VSSQF5VSSQ

G10

VSSQG5VSSQ

1

C19

2

0.1U_0402_10V6K

B11

VSSQB4VSSQ

VSSQD4VSSQD5VSSQD6VSSQD9VSSQ

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

DM0
DM1
DM2
DM3

DQS0
DQS1
DQS2
DQS3

VREF
MCL
RFU1
RFU2

RAS#
CAS#
WE#
CS#

CKE
CK

CK#
NC

NC
NC
NC
NC
NC
NC
NC
NC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS THF6VSS THF7VSS THF8VSS THF9VSS THG6VSS THG7VSS THG8VSS THG9VSS THH6VSS THH7VSS THH8VSS THH9VSS THJ6VSS THJ7VSS THJ8VSS TH

0.01U_0402_16V7K

1

C56

2

0.01U_0402_16V7K

H10

J10

K10

VSSQH5VSSQ

VSSQJ5VSSQ

VSSQK5VSSQ

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

J9

K4D263238A-GC_FBGA144

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

1

C46

2

NMDA46
NMDA43
NMDA44
NMDA41
NMDA40
NMDA42
NMDA47
NMDA45
NMDA54
NMDA52
NMDA55
NMDA53
NMDA50
NMDA49
NMDA48
NMDA51
NMDA38
NMDA39
NMDA37
NMDA36
NMDA34
NMDA35
NMDA32
NMDA33
NMDA63
NMDA62
NMDA61
NMDA60
NMDA58
NMDA57
NMDA56
NMDA59

1

C21

2

0.01U_0402_16V7K

Title

Size Document Number Rev

5

4

3

2

Date: Sheet

Compal Electronics, Inc.
VGA DDR FOR CHANNEL A

Sapporo 300P

星期一

, 01, 2003

十二月

1

of

20 57

0.3

5

4

3

2

1

+2.5VS +2.5VS

NDQMB[0..7]17

NDQSB[0..7]17

D D

NMAB[0..11]17

NMDB[0..63]17

NDQMB[0..7]
NDQSB[0..7]
NMAB[0..11]
NMDB[0..63]

22U_1206_10V4Z

for NV36M

+1.25VSFBVTT

R734 68_0402_5%

1 2

R736 68_0402_5%

1 2

R738 68_0402_5%

1 2

R740 68_0402_5%

1 2

C840 0.1U_0402_16V7K

1 2

C842 0.01U_0402_16V7K

1 2

C C

+2.5VS

R180

1K_0603_1%

1 2

R178
1K_0603_1%

1 2

B B

(25mil)

1

C244

0.1U_0402_10V6K

2

NMCLKB017 NMCLKB117

NMCLKB0#17
NMCSB1#17

NDQSB0
NDQSB3
NDQSB1
NDQSB2

NMB_BA017
NMB_BA117

NMRASB#17
NMCASB#17
NMWEB#17
NMCSB0#17

NMCKEB17

NMCLKB0

R409
@100_0402_5%

NMCLKB0#
NMCSB1# CS B1# CSB1#

1 2

R710 @0_0402_5%

Reserved for
Hynix 8Mx32

22U_1206_10V4Z

C246

1

C559

12

2

0.1U_0402_10V6K

B11

U40

VSSQB4VSSQ

N10
N11

H12
B12

H13
B13
N13

N12

C11
H11

L12
L13

E10

L10

VSSQD4VSSQD5VSSQD6VSSQD9VSSQ

N5

A0

N6

A1

M6

A2

N7

A3

N8

A4

M9

A5

N9

A6
A7
A8/AP

M8

A9

L6

A10

M7

A11

N4

BA0

M5

BA1

B3

DM0
DM1

H3

DM2
DM3

B2

DQS0
DQS1

H2

DQS2
DQS3

VREF
MCL

L9

RFU1
RFU2

M2

RAS#

L2

CAS#

L3

WE#

N2

CS#
CKE
CK

CK#

C4

NC
NC

H4

NC
NC
NC
NC

M3

NC

M4

NC

N3

NC

E7

VSS

E8

VSS
VSS

K6

VSS

K7

VSS

K8

VSS

K9

VSS

L5

VSS
VSS

E5

VSS

NMAB0
NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11
NMB_BA0
NMB_BA1

NDQMB0
NDQMB3
NDQMB1
NDQMB2

NDQSB0
NDQSB3
NDQSB1
NDQSB2 NDQSB7

VR_VREF_3

M13
M10

NMRASB#
NMCASB#
NMWEB#
NMCSB0#

NMCKEB

M11
M12

VSS THF6VSS THF7VSS THF8VSS THF9VSS THG6VSS THG7VSS THG8VSS THG9VSS THH6VSS THH7VSS THH8VSS THH9VSS THJ6VSS THJ7VSS THJ8VSS TH

+1.25VSFBVTT +1.25VSFBVTT

A A

R742 68_0402_5%
R744 68_0402_5%

for NV36M for NV36M

1 2
1 2

C844 0.1U_0402_16V7K

1 2

C846 0.01U_0402_16V7K

1 2

5

NMCLKB0 NMCLKB1

As close as ppossible to related pin

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

1

C237

2

0.1U_0402_10V6K

1

2

NMDB7
NMDB5
NMDB1
NMDB2
NMDB3
NMDB0
NMDB6
NMDB4
NMDB31
NMDB30
NMDB29
NMDB28
NMDB27
NMDB26
NMDB25
NMDB24
NMDB15
NMDB14
NMDB13
NMDB12
NMDB11
NMDB9
NMDB10
NMDB8
NMDB21
NMDB23
NMDB20
NMDB22
NMDB19
NMDB17
NMDB18
NMDB16

4

D10

1

2

D11

C226

VSSQ

VSSQE6VSSQE9VSSQF5VSSQ

0.1U_0402_10V6K

1

C240

2

F10

G10

H10

J10

VSSQG5VSSQ

VSSQH5VSSQ

VSSQJ5VSSQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

J9

0.1U_0402_10V6K

K10

VSSQK5VSSQ

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

K4D263238A-GC_FBGA144

C236

0.01U_0402_16V7K

+2.5VS

0.01U_0402_16V7K

1

C232

2

1

2

+1.25VSFBVTT

R735 68_0402_5%
R737 68_0402_5%
R739 68_0402_5%
R741 68_0402_5%

C841 0.1U_0402_16V7K
C843 0.01U_0402_16V7K

+2.5VS

1 2

1 2

3

C227

1

C225

2

0.01U_0402_16V7K

for NV36M

1 2
1 2
1 2
1 2

1 2
1 2

R181
1K_0603_1%

R179
1K_0603_1%

R743 68_0402_5%
R745 68_0402_5%

1

2

NMCLKB1#17

1 2
1 2

C845 0.1U_0402_16V7K

1 2

C847 0.01U_0402_16V7K

1 2

12

C221

22U_1206_10V4Z

NDQSB5
NDQSB6
NDQSB4
NDQSB7

(25mil)

C245

0.1U_0402_10V6K

NMCLKB1

NMCLKB1#

22U_1206_10V4Z

12

C560

R183
@100_0402_5%

NMCLKB1#NMCLKB0#

1

C229

2

0.1U_0402_10V6K

NMAB0
NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11
NMB_BA0
NMB_BA1

NDQMB5
NDQMB6
NDQMB4
NDQMB7

NDQSB5
NDQSB6
NDQSB4

VR_VREF_4

NMRASB#
NMCASB#
NMWEB#
NMCSB0#

NMCKEB

2

0.1U_0402_10V6K

1

C235

2

B11

U39

VSSQB4VSSQ

N5

A0

N6

A1

M6

A2

N7

A3

N8

A4

M9

A5

N9

A6

N10

A7

N11

A8/AP

M8

A9

L6

A10

M7

A11

N4

BA0

M5

BA1

B3

DM0

H12

DM1

H3

DM2

B12

DM3

B2

DQS0

H13

DQS1

H2

DQS2

B13

DQS3

N13

VREF

M13

MCL

L9

RFU1

M10

RFU2

M2

RAS#

L2

CAS#

L3

WE#

N2

CS#

N12

CKE

M11

CK

M12

CK#

C4

NC

C11

NC

H4

NC

H11

NC

L12

NC

L13

NC

M3

NC

M4

NC

N3

NC

E7

VSS

E8

VSS

E10

VSS

K6

VSS

K7

VSS

K8

VSS

K9

VSS

L5

VSS

L10

VSS

E5

VSS

1

C228

2

0.1U_0402_10V6K

D10

D11

VSSQD4VSSQD5VSSQD6VSSQD9VSSQ

VSSQ

0.1U_0402_10V6K

F10

VSSQE6VSSQE9VSSQF5VSSQ

VSSQG5VSSQ

1

2

G10

C234

H10

VSSQH5VSSQ

0.01U_0402_16V7K

J10

VSSQJ5VSSQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

1

2

K10

VSSQK5VSSQ

0.01U_0402_16V7K

C241

NMDB47

B7

NMDB46

C6

NMDB45

B6

NMDB44

B5

NMDB42

C2

NMDB43

D3

NMDB41

D2

NMDB40

E2

NMDB53

K13

NMDB55

K12

NMDB52

J13

NMDB54

J12

NMDB51

G13

NMDB50

G12

NMDB48

F13

NMDB49

F12

NMDB39

F3

NMDB38

F2

NMDB36

G3

NMDB37

G2

NMDB35

J3

NMDB34

J2

NMDB33

K2

NMDB32

K3

NMDB63

E13

NMDB61

D13

NMDB60

D12

NMDB62

C13

NMDB58

B10

NMDB57

B9

NMDB59

C9

NMDB56

B8

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

1

C224

2

0.01U_0402_16V7K

+2.5VS

1

C239

2

VSS THF6VSS THF7VSS THF8VSS THF9VSS THG6VSS THG7VSS THG8VSS THG9VSS THH6VSS THH7VSS THH8VSS THH9VSS THJ6VSS THJ7VSS THJ8VSS TH

J9

K4D263238A-GC_FBGA144

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.
VGA DDR FOR CHANNEL B

Sapporo 300P

星期一

, 01, 2003

十二月

1

of

21 57

0.3

A

B

C

D

E

TV-OUT Conn.

C501 22P_0402_50V8J

1 2

L24

1 1

LUMA16

CRMA16

COMPS16

75_0603_1%

1K_0402_1%

12

R74

R755

12

R387

75_0603_1%

R756

1K_0402_1%

12

12

R757

1K_0402_1%

12

R356

75_0603_1%

12

270P_0402_50V7K

12

C515

1 2

FBM-11-160808-121T_0603

L26

1 2

FBM-11-160808-121T_0603

1 2

C512

12

C497

22P_0402_50V8J

270P_0402_50V7K

12

C511
330P_0402_50V7K

1

2

3

D26
DAN217_SOT23

LUMA_1
CRMA_1

12

C502
330P_0402_50V7K

R755, R756,R757 need for NV36M

+12VALW

+LCDVDD

@0_0402_5%

1 2

+3VS

1

B

2

A

12

R16
200_0402_5%

13

D

Q1

S

2N7002

R711

5

U62

P

Y

G

TC7SH08FU_SSOP5

3

2 2

C799

12

0.1U_0402_10V6K

ENVDD

B_PCIRST#16,26,35,36

ENVDD

ENVDD16

3 3

+5V

R6
10K_0402_5%

1 2

2

G

22K

2

22K

4

1 2

R5
47K_0402_5%

13

Q2

DTC124EK_SOT23

2

DTC124EK_SOT23

CRT Conn.

R746, R747,R748 need for NV36M

R16

G16

R747

A

12

U27

R9

R748

1K_0402_1%

12

12

75_0603_1%

+CRT_VCC

1

5

P

A2Y

G

3

18P_0402_50V8K

4

OE#

1 2

C2

0.1U_0402_16V4Z

12

C462

18P_0402_50V8K

+CRT_VCC

12

C463

5

A2Y

3

1

P

OE#

G

B16

75_0603_1%

4 4

DACA_HSYNC16

DACA_VSYNC16

R746

1K_0402_1%

1K_0402_1%

12

12

12

R8

R7

75_0603_1%

1 2

C1

0.1U_0402_16V4Z

SN74AHCT1G125GW_SOT353-5

L3

1 2

FCM2012C-800_0805

L4

1 2

FCM2012C-800_0805

L5

1 2

FCM2012C-800_0805

12

C464
18P_0402_50V8K

R4
1K_0402_5%

1 2

DACA_VSYNC_1

4

U26
SN74AHCT1G125GW_SOT353-5

1 2
13

22K

22K

Q4

D24

DAN217_SOT23

2

12

C461

15P_0402_50V8J

L1

1 2

0_0603_5%

L2

1 2

0_0603_5%

B

R26
100K_0402_5%

1

3

CRT_R

CRT_G

CRT_B

12

C460

15P_0402_50V8J

12

12

R25

200K_0402_5%

D23

DAN217_SOT23

1

2

C457
@68P_0402_50V8K

12

C5

1000P_0402_50V7K

3

12

15P_0402_50V8J

DACA_HSYNC_2

1

D25
DAN217_SOT23

2

3

D22

DAN217_SOT23

1

2

3

C458

DACA_VSYNC_2

12

C456
@68P_0402_50V8K

+3VALW

14

U13D

13

+3VS

JP20

1. Y ground

1

1

2. C ground

2

2

3. Y (luminance+sync)

3

3

4. C (crominance)

4

4

SUYIN_030008FR004T101ZL

1

C803

@0.1U_0402_16V7K

2

+3VS

13

D

Q3

2

G

SI2302DS-T1_SOT23

S

12

C107

0.1U_0402_16V4Z

+5VS + CRT_VCC+R_CRT_VCC

D20

2 1

CH491D_SOT23

+3VS

100P_0402_50V8K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

INVT_PWM40

12

C6

4.7U_0805_10V4Z

+LCDVDD

12

C108

4.7U_0805_10V4Z

F1

FUSE_1A

0.1U_0402_16V4Z

12

C454

C459

220P_0402_50V8K

C

12

R686
@100K_0402_5%

21

12

C455

12

12

C453
220P_0402_50V8K

CRT_VCC

PID3
PID2
PID1
PID0

B+

A

12

B

7

12

C12

0.1U_0603_50V4Z

1 8
2 7
3 6
4 5

JP15
CRT-15P

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

DDC_DATA_1DACA_HSYNC_1

DDC_CLK_1

P

B_INVT_PWM

11

O

G

SN74LVC32APWLE_TSSOP14

+3VALW POWER

C17
10U_1210_35V4Z

+3VS

RP6

10K_8P4R_1206_5%

BKOFF#40

+CRT_VCC

R12

4.7K_0402_5%

1 2

1

2

R13

4.7K_0402_5%

1 2

D

1

2

C804

2
3

R11

100K_0402_5%

1 2
2

G

S

Q35

2N7002

1 3

D

B+

DAC_BRIG40

+LCDVDD

TXOUT0+16
TXOUT0-16
TXOUT1+16
TXOUT1-16

TXOUT2+16

TXOUT2-16

TXOUT3+16

TXOUT3-16

TXCLK+16

TXCLK-16

TZOUT0+16
TZOUT0-16
TZOUT1+16
TZOUT1-16

TZOUT2+16

TZOUT2-16

TZOUT3+16

TZOUT3-16

TZCLK+16

TZCLK-16
PID037

PID137
PID237
PID337

D32
RB751V_SOD323

1 2

2

G

S

C800
@0.1U_0402_16V7K

0.1U_0402_16V7K

D41
@DAN217_SOT23

1

ENBKL16,40

+5VS+CRT_VCC +5VS +5VS

Q34

2N7002

1 3

D

Compal Electronics, Inc.

Title

CRT,TV-OUT & LVDS Connector

Size Document Number Rev

B

Date: Sheet of

星期一

1 2
1 2

CHB2012U170_0805

PID0
PID1
PID2
PID3

+3VS

21

2

G

R1

4.7K_0402_5%

Sapporo 300P

01, 2003

十二月

LVDS Conn.

CHB2012U170_0805

INVPWR_B+

L7
L6

DAC_BRIG

B_INVT_PWM
DISPOFF#

TXOUT0+
TXOUT0­TXOUT1+
TXOUT1-

TXOUT2+
TXOUT2­TXOUT3+
TXOUT3-

TXCLK+
TXCLK-

TZOUT0+
TZOUT0­TZOUT1+
TZOUT1-

TZOUT2+
TZOUT2­TZOUT3+
TZOUT3-

TZCLK+
TZCLK-

R551
10K_0402_5%

1 2

DISPOFF#

@2N7002
Q57

R10

4.7K_0402_5%

1 2

12

13

D

S

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

JP1
IPEX_20323-040E-01

C680
220P_0402_50V8K

DDC_DATA 16

DDC_CLK 16

E

1

C801

@0.1U_0402_16V7K

2

22 57,

0.3

CRT, TV-OUT & LVDS CONNECTOR

5

4

3

2

1

+3VS

L40

1 2

FBM-11-160808-121T_0603

12

C848

4.7U_0805_10V4Z

D D

U64

DVOCLKIN16

DVOCLKOUT16

DVOD016
DVOD116
DVOD216
DVOD316
DVOD416
DVOD516
DVOD616
DVOD716
DVOD816
DVOD916
DVOD1016
DVOD1116

DVO_HSYNC16
DVO_VSYNC16

+3VS

C C

BUFRST#16

B B

AOUT_PB BOUT_Y COUT_PR

A A

R761 33_0402_5%

R762 33_0402_5%
R763 33_0402_5%
R764 33_0402_5%
R765 33_0402_5%
R766 33_0402_5%
R767 33_0402_5%
R768 33_0402_5%
R770 33_0402_5%
R771 33_0402_5%
R773 33_0402_5%
R774 33_0402_5%
R775 33_0402_5%

R779 47K_0402_5%

1 2

R780 47K_0402_5%

1 2

R781 47K_0402_5%

1 2

R782 412_0402_1%

1 2

13.5MHZ_16PF_6X13500020
R784

1

C873
27P_0402_50V8J

2

JP37

1

GND

2

OUT

SUYIN 040180FR002T111NR

12

12
12
12
12
12
12
12
12
12
12
12
12

1 2

R776 4.7K_0402_5%

1 2

R777 4.7K_0402_5%

Y3

1 2

75K_0402_5%

SID
SIC

12

1

2

37

CLKO

35

CLKI

2

P[0]

3

P[1]

4

P[2]

5

P[3]

6

P[4]

7

P[5]

8

P[6]

13

P[7]

14

P[8]

15

P[9]

16

P[10]

17

P[11]

18

HSYNC*

19

VSYNC*

20

FIELD

21

BLANK*

39

SID

40

SIC

41

ALTADDR

26

SLEEP

27

RESET*

23

NC1

33

NC2

28

GPO[0]

29

GPO[1]

30

GPO[2]

54

FSADJUST

46

XTALIN

47

XTALOUT

CX25875_TQFP64

C874
33P_0402_50V8J

CX25875

TQFP-64P

JP38

1

GND

2

OUT

SUYIN 040180FR002T111NR

(Green) (Red)(Blue)

VAA_OSC

VAA_BG
VAA_DAC
VAA_DAC

VDDHV

VDD_SIO

VDDO
VDDO

REG_OUT

REG_IN

VDD

VDD
DACA
DACB
DACC
DACD
COMP

VREF

PLL_COMP

XTL_BFO

VSSHV

VSS

VSS

VSS
VSSO
VSSO

VSS_SO

VSS_PLL

VSS_OSC

VSS_BG

NG_DAC
VSS_DAC
VSS_DAC

48
52
57
58

25
38
11
36

50
49
10
32

60
61
62

0.1U_0402_16V4Z

R772 412_0402_1%

1 2

DACA_NET
DACB_NET
DACC_NET

59

C865 0.1U_0402_16V4Z

1 2

55
53
43
1

24
9
22
31
12
34
42
44
45
51
56
63
64

1

C868

0.1U_0402_16V4Z

2

I2CB_DATA16

I2CB_CLK16

JP39

1

GND

2

OUT

SUYIN 040180FR002T111NR

+3VS_HDTV

1

2

+3VS

1

2

12

R811

2.2K_0402_5%

+3VS_HDTV

1

C

Q74

2

B

PMBT3904_SOT23

E

3

C856

1K_0402_5%

C869

0.1U_0402_16V4Z

12

R812

2.2K_0402_5%

0.1U_0402_16V4Z

12

R769

SID
SIC

1

C861

2

0.1U_0402_16V4Z

4.7U_0805_10V4Z

1

C862

2

DACA_NET

DACB_NET

12

4.7U_0805_10V4Z

C863

12

R778
75_0402_5%

12

R783
75_0402_5%

12

R785
75_0402_5%

0.1U_0402_16V4Z

12

C849

1

C850

2

0.1U_0402_16V4Z

+3VS

4.7U_0805_10V4Z

C864 0.1U_0402_16V4Z

FBM-11-160808-121T_0603

1

C866

0.1U_0402_16V4Z

2

C870 0.1U_0402_16V4Z

FBM-11-160808-121T_0603

1

C871

0.1U_0402_16V4Z

2

C875 0.1U_0402_16V4Z

FBM-11-160808-121T_0603

1

C876

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

C851

2

L41

1 2

FBM-11-160808-121T_0603

12

C857

1 2

L42

1 2

1 2

L43

1 2

1 2

L44

1 2

1

C852

2

1

C853

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C858

2

1

C867

0.1U_0402_16V4Z

2

1

C872

0.1U_0402_16V4Z

2

1

C877

0.1U_0402_16V4Z

2

0.01U_0402_16V7K

0.1U_0402_16V4Z

+3VS_HDTV

1

C854

2

+3VS_HDTV+3VS_HDTV

1

C859

2

1

2

3

D45

DA204U_SOT23

1

2

3

D46

DA204U_SOT23

1

2

3

D47

DA204U_SOT23

1

C855

0.01U_0402_16V7K

2

1

C860

0.01U_0402_16V7K

2

AOUT_PB

+3VS

BOUT_Y

+3VS

COUT_PRDACC_NET

+3VS

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

CX75875 HDTV

Custom

星期一

Sapporo 300P

, 01, 2003

十二月

1

23 57

of

0.3

+3VALW

R550 10K_0402_5%
R540 8.2K_0402_5%

+3VS

R253 10K_0402_5%

D D

C C

B B

R530 4.7K_0402_5%
R653 10K_0402_5%

+CPU_CORE

R257 10K_0402_5%

R542 @10K_0402_5%
R265 10K_0402_5%

+3VS

R477 @8.2K_0402_5%

R225 @10K_0402_5%
R230 @10K_0402_5%
R229 @10K_0402_5%

+3VALW

4 5
3 6
2 7
1 8

+RTCVCC

R577 330K_0402_5%
R576 @10K_0402_5%

+3VS

Disable timer timeout

CLK_ICH_14M

A A

5

TP0_PU

12

SYS_RESET#

12

ICH_VGATE

12

EC_THRM#

12

PM_CLKRUN#

12

H_CPUPERF#

12

SUSCLK

12

EC_RSMRST#

12

ICH_AC_SDOUT

12

ICH_AC_BITCLK

12

ICH_AC_SDIN0

12

ICH_AC_SDIN1

12

RP141

10K_8P4R_1206_5%

USB_OC3#
USB_OC5#
USB_OC7#
USB_OC1#

12
12

12

R504 @1K_0402_5%

PM_CLKRUN#27,28,30,31,37,40

CLK_ICH_48M

R231
@10_0402_5%

1 2

C353
@4.7P_0402_50V8C

1 2

+CPU_CORE

5

H_CPUPERF#5

LPC_AD[0..3]13,37,40

ICH_INTVRMEN

Note:
USBRBIAS keep less than 500mils

SPKR

12

R508
@10_0402_5%

2

C650
@10P_0402_50V8K

1

1 2

R254 62_0402_5%

H_THERMTRIP#

Near ICH

PM_CLKRUN#

H_THERMTRIP#5

VGATE51,53,54

ICH_AC_BITCLK32,39

ICH_AC_SDIN032
ICH_AC_SDIN139

+3VS

PM_DPRSLPVR54

PBTN_OUT#40
EC_SWI#40

EC_RSMRST#40,46

PM_SLP_S1#15
PM_SLP_S3#40

STP_CPU#15,54
STP_PCI#15
SUSCLK28

EC_THRM#40

R528 0_0402_5%

LPC_AD[0..3]

LPC_DRQ#137

LPC_FRAME#13,37,40

USB_OC0#38
USB_OC2#38
USB_OC4#38
USB_OC6#38

SIDERST#36

CLK_ICH_14M15

CLK_ICH_48M15

4

R251
10K_0402_5%

1 2

1 2

USBP0+38

USBP0-38

USBP2+38

USBP2-38

USBP3+36

USBP3-36

USBP4+38

USBP4-38

USBP5+39

USBP5-39

USBP6+38

USBP6-38

USBP7+36

USBP7-36

1 2

R500

22.6_0603_1%

SPKR34

H_THERMTRIP#

4

SYS_RESET#
TP0_PU

PM_DPRSLPVR
ICH_PWROK
EC_RSMRST#

PM_SLP_S1#
PM_SLP_S3#
PM_SLPS4#
PM_SLPS5#
STP_CPU#
STP_PCI#
SUSCLK

EC_THRM#

H_CPUPERF#
ICH_VGATE

ICH_AC_BITCLK
ICH_AC_RST_R#
ICH_AC_SDIN0
ICH_AC_SDIN1

ICH_AC_SDOUT_R
ICH_AC_SYNC_R

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_DRQ1#
LPC_FRAME#

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

SIDERST#
ICH_INTVRMEN

SPKR

1 2

R258 0_0402_5%

CLK_ICH_14M

CLK_ICH_48M

AC12
AB13

USBRBIAS

AD10

U49B

R5

GPI6/(AGPBUSY#)

U1

SYS_RESET#

AB2

TP0/(BATLOW#)

R1

GPO21/(C3_SAT#)

AC1

GPIO24/(CLKRUN#)

P20

NC/(DPRSLPVR)

Y4

PWRBTN#
PWROK

AB3

RI#
RSMRST#

T20

GPO19/(SLP_S1#)

W1

SLP_S3#

U2

SLP_S4#

AA3

SLP_S5#

U22

GPO20/(STP_CPU#)

U21

GPO18/(STP_PCI#)

Y1

SUSCLK

AB1

SUS_STAT#/LPCPD#

T2

THRM#

F22

GPO23/(SSMUXSEL)

U20

GPO22/(CPUPERF#)

R20

VRMPWRGD/(VGATE)

D8

AC_BIT_CLK

C12

AC_RST#

E12

AC_SDIN0

D12

AC_SDIN1

A13

AC_SDIN2

A9

AC_SDOUT

B8

AC_SYNC

T5

LAD0

R4

LAD1

R3

LAD2

U4

LAD3

U5

LDRQ0#

R2

LDRQ1#/GPI41

T4

LFRAME#

C23

USBP0P

D23

USBP0N

A22

USBP1P

B22

USBP1N

C21

USBP2P

D21

USBP2N

A20

USBP3P

B20

USBP3N

C19

USBP4P

D19

USBP4N

A18

USBP5P

B18

USBP5N

C17

USBP6P

D17

USBP6N

A16

USBP7P

B16

USBP7N

C15

OC0#

D15

OC1#

D14

OC2#

C14

OC3#

B14

OC4#/GPI9

A14

OC5#/GPI10

D13

OC6#/GPI14

C13

OC7#/GPI15

A24

USBRBIAS

B24

USBRBIAS#

T1

GPIO32

G23

GPIO33

F21

GPIO34
INTVRMEN

E24

SPKR

T21

THRMTRIP#

F20

CLK14

F24

CLK48

ICH5

ICH_AC_RST#32,39
ICH_AC_SYNC32,39

ICH_AC_SDOUT32,39

3

R536
100K_0402_5%

ICH_ACIN

ICH5/(ICH5-M)

GPI

PM

IST

AC97 I/F

IDE I/F

LPC I/F

USB I/F

SATA0RXN

SATA I/F

GPIO

MISC

CLOCK

R486 33_0402_5%
R485 33_0402_5%
R484 33_0402_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ICH_AC_RST_R#

12

ICH_AC_SYNC_R

12

ICH_AC_SDOUT_R

12

3

SATA1RXN

SATARBIAS

SATARBIAS#

GPI7

GPI8
GPI12
GPI13

GPIO25
GPIO27
GPIO28

PDA0
PDA1

PDA2
PDCS1#
PDCS3#

PDDREQ

PDDACK#

PDIOR#

PDIOW#

PIORDY

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8

PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDA0

SDA1

SDA2

SDCS1#
SDCS3#

SDDREQ

SDDACK#

SDIOR#

SDIOW#

SIORDY

SDD0

SDD1

SDD2

SDD3

SDD4

SDD5

SDD6

SDD7

SDD8

SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

SATA0TXP
SATA0TXN

SATA0RXP
SATA1TXP

SATA1TXN
SATA1RXP

CLK100P
CLK100N

RTCRST#

RTCX1
RTCX2

U3
Y2
W4
W5
W3
V3
W2

AA19
AD19
AC19
AB19
Y18

AC17
AC18
AD18
AA17
AA18

AB16
Y13
Y14
AC14
AA14
AC15
AD14
AB14
AD15
Y15
AD16
AA15
AC16
Y16
AA16
AB17

W22
W23
W21
V22
V20

Y20
W20
Y23
Y22
Y21

AA22
AB23
AD23
AD24
AB21
AC21
AB20
AC20
Y19
AD22
AC22
AA20
AB22
AC24
AB24
AA23

AA8
AB8
AD7
AC7

AA10
AB10
AD9
AC9

Y11
Y9

AC5
AD5

AA12
AC11
AB12

1 2

EC_SMI#
EC_SCI#
EC_LID_OUT#

IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_PDCS1#
IDE_PDCS3#

IDE_PDDREQ
IDE_PDDACK#
IDE_PDIOR#
IDE_PDIOW#
IDE_PDIORDY

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

IDE_SDA0
IDE_SDA1
IDE_SDA2
IDE_SDCS1#
IDE_SDCS3#

IDE_SDDREQ
IDE_SDDACK#
IDE_SDIOR#
IDE_SDIOW#
IDE_SDIORDY

IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

Note:
SATABIAS keep less than 500mils

SATABIAS

ICH_RTCRST#
ICH_RTCX1
ICH_RTCX2

12

R260 24.9_0603_1%

ICH_AC_BITCLK

2

+3VS

EC_SMI# 40
EC_SCI# 40
EC_LID_OUT# 40
EC_FLASH# 41

USB_EN# 38

IDE_PDA0 35
IDE_PDA1 35
IDE_PDA2 35
IDE_PDCS1# 35
IDE_PDCS3# 35

IDE_PDDREQ 35
IDE_PDDACK# 35
IDE_PDIOR# 35
IDE_PDIOW# 35
IDE_PDIORDY 35

ICH_SYNC# SY S_PWROK ICH_PWROK

0
0

111

IDE_SDA0 36
IDE_SDA1 36
IDE_SDA2 36
IDE_SDCS1# 36
IDE_SDCS3# 36

IDE_SDDREQ 36
IDE_SDDACK# 36
IDE_SDIOR# 36
IDE_SDIOW# 36
IDE_SDIORDY 36

IDE_PDD[0..15]
IDE_SDD[0..15]

ICH_RTCX1
ICH_RTCX2

12P_0402_50V8J

R223
@10_0402_5%

1 2
2

C354
@10P_0402_50V8K

1

2

1

D36RB751V_SOD323

+3VALW

5

U17

1

P

IN1

2

IN2

G

SN74AHC1G08HDCK_TSSOP5

3

+3VS

12

2

Q60

12

J1
JOPEN

ICH_VBIAS

1 2

C698
12P_0402_50V8J

ACINICH_ACIN

O

R578 @22M_0603_5%
R568
@2.4M_0603_1%

ACIN 40,45,47

12

C392 0.1U_0402_16V4Z

4

IDE_PDIORDY

IDE_SDIORDY

12

3 1

1U_0805_25V4Z

1 2

R572 4.7K_0402_5%

R546 4.7K_0402_5%

R580
@1K_0402_5%

2

Q59
@MMBT3904_SOT23

3 1

1 2

R570 0_0402_5%

200K_0402_5%

C686

C691
@0.047U_0402_16V4Z

R573

R575 @1K_0402_5%

Compal Electronics, Inc.

十二月

1

PM_SLP_S5# 40

12

24 57

2 1

PM_SLPS4#
PM_SLPS5#

0
1

0
0

001

R571

@220_0402_5%

@MMBT3904_SOT23

ICH_SYNC#10
SYS_PWROK7,43

IDE_PDD[0..15] 35
IDE_SDD[0..15] 36

12

R476

4.7K_0402_5%

ICH_RTCRST#

12

R569
@10M_0603_5%

12

R567 10M_0402_5%

1

C697

32.768KHZ_12.5P_1TJS125DJ2A073

4

X6

IN

OUT

NC3NC

2

Title

Size Document Number Rev

Date: Sheet

ICH5-IDE/LPC/PM/GPIO/USB

Sapporo 300P

星期一

, 01, 2003

12

12

R582
@220_0402_5%

ICH_PWROK

+RTCVCC

12

12

of

+3VS

0.3

5

4

3

2

1

+CPU_CORE

1

C388

0.1U_0402_16V4Z

2

Place near
ball T22

+1.5VS

1

C382

0.1U_0402_16V4Z

2

1

C384

0.01U_0402_16V7K

2

Place near ball D24

+1.5VS

1

C378

0.1U_0402_16V4Z

2

1

C394

0.01U_0402_16V7K

2

Place near ball AD6

+3VS +5VS

21

RB751V_SOD323

1

C349

0.1U_0402_16V4Z

2

1

2

D30

D12

RB751V_SOD323

C355

0.1U_0402_16V4Z

1 2

1

C636
1U_0603_10V6K

2

+3VALW +5VALW

21

1

C364
1U_0603_10V6K

2

Compal Electronics, Inc.

ICH5 Power & Decoupling
Sapporo 300P

星期一

, 01, 2003

十二月

1

R482

1K_0402_5%

1 2

R233
1K_0402_5%

25 57

of

0.3

U49C

A1

ICH5/(ICH5-M)

VSS

A7

VSS

A10

VSS

A15

VSS

A17

VSS

A19

VSS

A21

VSS

D D

C C

B B

A A

AA5
AA7

AA9
AA11
AA13
AA21
AA24

AB5

AB7

AB9
AB11
AB15
AB18

AC2

AC4

AC6

AC8

AC10
AC13
AC23

AD4

AD6

AD8

AD17
AD21
AD12

G20

G24

M11

M12

M13

M14

M22

M24

A23

B13
B17
B19
B21
B23

C16
C18
C20
C22

D11
D16
D18
D20
D22
D24
E17
E19
E20
E21
E23

H19
H22

J21
J23

K11
K14
K20
K22
K24
L10
L11
L12
L13
L14
L15
L21
L23

N11
N12
N13
N14
N20

P10
P11
P12
P13

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

C3

VSS

C8

VSS
VSS
VSS
VSS
VSS

D1

VSS

D6

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

F3

VSS

F9

VSS

G6

VSS
VSS
VSS

H1

VSS
VSS
VSS

J6

VSS
VSS
VSS

K3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

M1

VSS

M5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

P1

VSS
VSS
VSS
VSS
VSS

ICH5

5

Power

GND

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5

VCCSUS1_5_A
VCCSUS1_5_B
VCCSUS1_5_B
VCCSUS1_5_B
VCCSUS1_5_C
VCCSUS1_5_C

V5REF
V5REF

V5REF_SUS

V_CPU_IO
V_CPU_IO
V_CPU_IO

VCCSATAPLL
VCCSATAPLL

VCCUSBPLL

VCCRTC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

B5
F6
G1
H6
K6
L6
M10
N10
P6
R13
V19
W15
W17
W24
AD13
AD20
G19
G21

E18
B15
E11
F10
F11
E13
E14
U6
V6
F16
F17
F18
K15

K10
K12
K13
L19
P19
R10
R6
H24
J19
K19
M15
N15
N23
E15
F15
F14
W19
R12
W9
W10
W11
W6
W7
W8
E22

F19
Y5
AA4
AB4
F7
F8

A8
W14

E16
R15

R19
T19

AA6
AB6

C24
AD11

P14
P15
P21
R11
R14
T23
T3
T6
U19
V1
V21
W16
W18
Y3
Y6
Y7
Y8
Y10

+3VS

+3VALW

+1.5VS

VCCSUS15_A
VCCSUS15_B

VCCSUS15_C

ICH_V5REF

ICH_V5REF_SUS

+CPU_CORE

+1.5VS

4

+3VS

1

C373

0.1U_0402_16V4Z

2

+1.5VS

1

C393

0.1U_0402_16V4Z

2

+3VALW

1

C356

0.01U_0402_16V7K

2

Decoupling Reference Document:
Springdale Chipset Platform Design guide Rev1.11
(12474)page278

1

C362

0.01U_0402_16V7K

2

Place near
ball (VSS)A7

1

C402

0.1U_0402_10V6K

2

+RTCVCC

1

C397

0.1U_0402_16V4Z

2

Place near ball(VSS)
D1,A7,H1,P1,W24 and A21

1

C401

0.1U_0402_16V4Z

2

Place0.1u near ball(VSS)

G24,H24,K24,M24,AD4
and AD18; 0.01u near to
ball AD8.

1

C361

0.1U_0402_16V4Z

2

Place0.1u near ball(VSS)
A17,A23,V1.Addition cap near
A15,A19

1

C398

0.01U_0402_16V7K

2

Place near
ball (VSS)AD4

1

C385

0.1U_0402_16V4Z

2

1

C386

0.1U_0402_16V4Z

2

1

C357

0.1U_0402_16V4Z

2

1

C359

0.01U_0402_16V7K

2

Place near
ball (VSS)A19

+1.5VS

1

C363

0.1U_0402_16V4Z

2

1

C368

0.1U_0402_16V4Z

2

1

C391

0.1U_0402_16V4Z

2

1

C796
1000P_0402_50V7K

2

Place near ball AD11

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

C381

0.1U_0402_16V4Z

2

1

C395

0.1U_0402_16V4Z

2

1

C387
1U_0603_10V6K

2

+5VS

1

C797
1000P_0402_50V7K

2

1

C389

0.1U_0402_16V4Z

2

1

C360

0.1U_0402_16V4Z

2

1

C390

0.1U_0402_16V4Z

2

Place near ball A8

1

2

Place near ball(VSS) A17

2

2

C372

0.01U_0402_16V7K

1

ICH_V5REF

ICH_V5REF_SUS

C358

0.1U_0402_16V4Z

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

1

+3VS

RP144

4 5
3 6
2 7
1 8

D D

C C

B B

A A

+3VS

4 5
3 6
2 7
1 8

+3VS

4 5
3 6
2 7
1 8

+3VS

4 5
3 6
2 7
1 8

+3VS

4 5
3 6
2 7
1 8

+3VS

R232 8.2K_0402_5%

R512 8.2K_0402_5%

R483 10K_0402_5%

R222 10K_0402_5%

R503 10K_0402_5%

R479 10K_0402_5%

+1.5VS

12

R515
226_0603_1%

12

R513
147_0603_1%

12

R241
113_0603_1%

PCI_TRDY#
ICH_GPIO4_PIRQG#
PCI_PIRQB#

8.2K_8P4R_1206_5%

RP140

PCI_REQ#2
ICH_GPIO3_PIRQF#
PCI_REQ#B
ICH_GPIO2_PIRQE#

8.2K_8P4R_1206_5%

RP146

PCI_IRDY#
PCI_SERR#
PCI_DEVSEL#
PCI_PERR#

8.2K_8P4R_1206_5%

RP143

PCI_STOP#
PCI_FRAME#
PCI_REQ#0
PCI_PIRQD#

8.2K_8P4R_1206_5%

RP142

ICH_GPIO5_PIRQH#
PCI_PIRQA#
PCI_PIRQC#

8.2K_8P4R_1206_5%

DISABLE "TOP BLOCK SWAP"

1 2

1 2

1 2

1 2

1 2

HI_SWING_ICH

HI_VREF_ICH

12

(GNTA#)

PIDERST#

PCI_PLOCK#

PCI_REQ#A

PCI_REQ#4

PCI_REQ#1

PCI_REQ#3

Note:
HI_SWING_MCH, HI_VREF_MCH
trace width of 10mils and
space 7mils

2

C371

0.1U_0402_16V4Z

1

2

C379

0.1U_0402_16V4Z

1

5

Close to ICH(L20)

1

2

Close to ICH ball <250mils

Close to ICH(L24)

1

2

Close to ICH ball <250mils

PCI_AD[0..31]27,28,30,31

HUB_HL[0..10]10

C377

0.01U_0402_16V7K

C374

0.01U_0402_16V7K

PCI_AD[0..31]

HUB_HL[0..10]

PCI_C/BE#027,28,30,31
PCI_C/BE#127,28,30,31
PCI_C/BE#227,28,30,31
PCI_C/BE#327,28,30,31

PCI_REQ#031
PCI_REQ#130
PCI_REQ#228
PCI_REQ#327

PCI_GNT#031
PCI_GNT#130
PCI_GNT#228
PCI_GNT#327

CLK_PCI_ICH15

PCI_FRAME#27,28,30,31

PCI_DEVSEL#27,28,30,31

PCI_IRDY#27,28,30,31
PCI_PAR27,28,30,31

PCI_PERR#27,28,30,31

PCIRST#10,13,27,28,30,31,37,40
PCI_SERR#27,28,30,31

PCI_STOP#27,28,30,31

PCI_TRDY#27,28,30,31

PIDERST#35

4

PCI_AD0 INTRUDER#
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3

CLK_PCI_ICH
PCI_FRAME#

PCI_DEVSEL#
PCI_IRDY#
PCI_PAR
PCI_PERR#
PCI_PLOCK#

PCIRST#

PCI_SERR#

PCI_STOP#

PCI_TRDY#

PCI_REQ#A
PCI_REQ#B

PIDERST#

CLK_PCI_ICH

U49A

J4

ICH5/(ICH5-M)

AD0

J5

AD1

G3

AD2

K4

AD3

H5

AD4

H2

AD5

J3

AD6

J2

AD7

K5

AD8

F2

AD9

M4

AD10

H4

AD11

L5

AD12

G2

AD13

K1

AD14

G5

AD15

G4

AD16

L1

AD17

B2

AD18

P5

AD19

H3

AD20

N5

AD21

C4

AD22

N4

AD23

E6

AD24

P3

AD25

D3

AD26

N2

AD27

F5

AD28

P4

AD29

F4

AD30

P2

AD31

E3

C/BE0#

J1

C/BE1#

N3

C/BE2#

M2

C/BE3#

D5

REQ0#

C1

REQ1#

C5

REQ2#

B6

REQ3#

C6

REQ4#/GPI40

D4

GNT0#

A3

GNT1#

B7

GNT2#

C7

GNT3#

A4

GNT4#/GPO48

N1

PCICLK

D2

FRAME#

L3

DEVSEL#

M3

IRDY#

F1

PAR

K2

PERR#

L2

PLOCK#

V2

PME#

V4

PCIRST#

L4

SERR#

E5

STOP#

E4

TRDY#

A5

REQA#/GPI0

E7

REQB#REQ5#/GPI1

E8

GNTA#/GPO16

B4

GNTB#/GNT5#/GPO17

PCI I/F

INTRUDER#

LINKALERT#

SMB I/F

SMBALERT#/GPI11

CPU I/F

CPUPWRGD/GPO49

NC/(DPSLP#)

HUB I/F

HI_VSWING

Interrupt I/F

PIRQE#/GPI2
PIRQF#/GPI3
PIRQG#/GPI4
PIRQH#/GPI5

EEPROM I/F

LAN I/F

LAN_RSTSYNC

ICH5

12

R520
@10_0402_5%

1

C667
@10P_0402_50V8K

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

SMLINK0
SMLINK1

SMBCLK

SMBDATA

A20GATE

A20M#
FERR#

IGNNE#

INIT#

INTR

NMI

RCIN#

CPUSLP#

SMI#

STPCLK#

HI10
HI11

CLK66

HI_STBF

HI_STBS

HIRCOMP

HIREF

PIRQA#

PIRQB#
PIRQC#
PIRQD#

IRQ14
IRQ15

SERIRQ

EE_CS

EE_DIN

EE_DOUT

EE_SHCLK
LAN_RXD0

LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2

LAN_CLK

LAN_RST#

PCIRST#

Y12

ICH_SMLINK0

AD3

ICH_SMLINK1

AA2

LINK_ALERT#

V5

ICH_SMB_CLK

AD2

ICH_SMB_DATA

AD1

GPI_11

AC3
T22

V23
A11

NC

U24
R21
R23
U23
R22
P24
P23
P22

SMI#

V24

R537

T24

R531 0_0402_5%

R24

HUB_HL0

H20

HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9

HUB_HL1

H21

HUB_HL2

J20

HUB_HL3

H23

HUB_HL4

M23

HUB_HL5

M21

HUB_HL6

N21

HUB_HL7

M20

HUB_HL8

L22

HUB_HL9

J22

HUB_HL10

K21

HUB_HL11

G22

CLK_ICH_66M

N22
K23

J24

HI_RCOMP_ICH

N24

HI_VREF_ICH

L24

HI_SWING_ICH

L20

PCI_PIRQA#

B3

PCI_PIRQB#

E1

PCI_PIRQC#

A2

PCI_PIRQD#

C2

ICH_GPIO2_PIRQE#

D7

ICH_GPIO3_PIRQF#

A6

ICH_GPIO4_PIRQG#

E2

ICH_GPIO5_PIRQH#

B1

IDE_IRQ14

Y17

IDE_IRQ15

Y24

IRQ_SERIRQ

F23
B10

B11
B9
A12

C10
C9
C11
D9
E9
B12
E10
D10

LAN_RST#

AA1

+3V

C679 0.1U_0402_16V4Z

14

P
I2O

G

7

NC_EE_DOUT

12

1

U51A

OE#

+3V POWER

SN74LVC125APWLE_TSSOP14

3

12

0_0402_5%

12

R220
@1K_0402_5%

R544
10K_0402_5%

ICH_SMB_CLK 12,13,15
ICH_SMB_DATA 12,13,15

GATEA20 40
H_A20M# 5

H_FERR# 5
H_IGNNE# 5
H_INIT# 5
H_INTR 5
H_NMI 5
H_PWRGOOD 5
KBRST# 40
H_CPUSLP# 5

H_SMI# 5
H_STPCLK# 5
H_DPSLP# 5

R234 62_0402_5%

CLK_ICH_66M 15
HUB_HLSTRF 10

HUB_HLSTRS 10

12

R522 54.9_0603_1%

change to 52.3_1%

PCI_PIRQA# 16,28,31
PCI_PIRQB# 27,28
PCI_PI R QC# 28,30
PCI_PI R QD# 28,30

IDE_IRQ14 35
IDE_IRQ15 36

SERIRQ 28,37,40

12

12

B_PCIRST# 16,22,35,36

2

12

+1.5VS

INTRUDER#

ICH_SMLINK0

ICH_SMLINK1

LINK_ALERT#

GPI_11

ICH_SMB_CLK

ICH_SMB_DATA

IDE_IRQ15

IDE_IRQ14

IRQ_SERIRQ

Title

Size Document Number Rev

Date: Sheet

星期一

1 2

R264 10K_0402_5%

1 2

R566 10K_0402_5%

1 2

R547 10K_0402_5%

1 2

R261 10K_0402_5%

1 2

R652 10K_0402_5%

1 2

R565 2.7K_0402_5%

1 2

R559 2.7K_0402_5%

CLK_ICH_66M

1 2

R543

1 2

R262

1 2

R511 10K_0402_5%

Compal Electronics, Inc.
ICH5-PCI/HUB/LAN
Sapporo 300P

, 01, 2003

十二月

+RTCVCC

+3VALW

R249
@10_0402_5%

1 2
2

C383
@10P_0402_50V8K

1

8.2K_0402_5%

8.2K_0402_5%

1

+3VS

+3VS

26 57

0.3

of

5

4

3

2

1

TRACE=20mil

+2.5V_LAN

R388 0_0603_5%

PCI_AD0
PCI_AD1

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

1 2

CLK_PCI_LAN

+3V

PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

D D

C C

PCI_AD[0..31]26,28,30,31

IDSEL:PCI_AD17

B B

CLK_PCI_LAN

A A

+3V

PCI_AD[0..31]

PCI_C/BE#026,28,30,31
PCI_C/BE#126,28,30,31
PCI_C/BE#226,28,30,31
PCI_C/BE#326,28,30,31

PCI_AD17 LAN_IDSEL

PCI_PAR26,28,30,31

PCI_FRAME#26,28,30,31

PCI_IRDY#26,28,30,31

PCI_TRDY#26,28,30,31

PCI_DEVSEL#26,28,30,31

PCI_STOP#26,28,30,31

PCI_PERR#26,28,30,31
PCI_SERR#26,28,30,31

PCI_REQ#326

PCI_GNT#326

PCI_PIRQB#26,28

LAN_PME#28,30,31,40

PCIRST#10,13,26,28,30,31,37,40

CLK_PCI_LAN15

PM_CLKRUN#24,28,30,31,37,40

12

R393
@10_0402_5%

12

C540
@10P_0402_50V8K

R395 100_0402_5%

U37

47

AD0

46

AD1

45

AD2

43

AD3

42

AD4

41

AD5

40

AD6

39

AD7

36

AD8

35

AD9

34

AD10

33

AD11

32

AD12

30

AD13

29

AD14

28

AD15

15

AD16

14

AD17

13

AD18

12

AD19

11

AD20

10

AD21

9

AD22

8

AD23

96

AD24

93

AD25

92

AD26

91

AD27

89

AD28

87

AD29

86

AD30

85

AD31

38

C/BE#0

27

C/BE#1

17

C/BE#2

84

C/BE#3

98

IDSEL

24

PAR

18

FRAME#

19

IRDY#

20

TRDY#

21

DEVSEL#

23

STOP#

25

PERR#

26

SERR#

83

REQ#

82

GNT#

80

INTA#

79

INTB#

57

PME#

81

RST#

97

PCICLK

50

CLKRUN#

6

VDD

22

VDD

37

VDD

Power

49

VDD

90

VDD

95

VDD

RTL8101L_LQFP100

Power

PCI I/F

ISOLATE#

AC_RST#
AC_SYNC
AC_DOUT

AC_BCK

AC-Link

ROMCS/OEB

0.1U_0402_16V4Z

+2.5V_DLAN

48

VDD25

94

VDD25

AVDD25

AVDD
AVDD
AVDD

EEDO

EEDI
EESK
EECS

LED0
LED1
LED2

TXD+

TXD-

RXIN+

RXIN-

LAN I/F

LWAKE

RTSET

RTT3

VCTRL

AC_DIN

GPIO0
GPIO1

NC

DGND1
DGND2
DGND3
DGND4
DGND5

AGND1
AGND2
AGND3

+2.5V_LAN

58

+3V_LAN_VDD1

59

+3V_LAN_VDD2

70

+3V_LAN_VDD3

75

LAN_EEDO

52

LAN_EEDI

53

LAN_EECLK

54

LAN_EECS

55

ACTIVITY#

78

LINK10_100#

77
76

LAN_TD+

72

LAN_TD-

71

LAN_RD+

68

LAN_RD-

67

LAN_X1

61

X1

LAN_X2

60

X2

64
74
65
63
56
1

3
4
5
7

100
99

51
69

2
16
31
44
88
62
66
73

12

12

C534

C519

0.1U_0402_16V4Z

TRACE=20mil

1 2

R145 1K_0402_5%

1 2

R146 15K_0402_5%

1 2

R383 5.6K_0603_1%

LAN_X1 LAN_X2

12

C180
27P_0402_50V8J

22U_1206_16V4Z

1 2

U34

4
3
2
1

AT93C46-10SI-2.7_SO8

1 2

R384

5.6K_0402_5%

B

2

10K

Y1

25MHZ_20PF_6X25000017

JP30

RJ11

SANTA_130403-1

Place closed to
RTL8101L pin58

0.1U_0402_16V4Z

12

C507

+3V

12

C504

0.1U_0402_16V4Z

Closed to PULSE H0013

R324

49.9_0603_1%

+2.5V_LAN

0.1U_0402_16V4Z

GND

NC
NC

VCC

+3V

+3VS

+3V

31

E

47K

C

C509

1 2

5
6
7
8

Q9
@2SB1197K_SOT23

C508

TRACE=20mil

TRACE=20mil

TRACE=20mil

DO
DI
SK
CS

reserve transistor for ver.C

12

C177
@22U_1206_10V4Z

12

C179
27P_0402_50V8J

1

NC

2

NC

3

NC

4

NC

0.1U_0402_16V4Z

12

C506

12

12

C484

0.1U_0402_16V4Z

LINK10_100#

0.1U_0402_16V4Z

12

R325

49.9_0603_1%

+3V

ACTIVITY#

3 1

+3V

12

C505

Closed to RT8101L

R326

49.9_0603_1%

E

3 1

47K

B

2

E

C

47K

B

10K

2

RTL8101L has internal
+2.5V generator at pin58

+2.5V_LAN

1 2

L25
LQG21N4R7K10_0805

TRACE=30mil

12

12

R327

49.9_0603_1%

12

C485

0.1U_0402_16V4Z

Q38
DTA114YKA_SOT23

1 2

R331 300_0402_5%

C

10K

Q36
DTA114YKA_SOT23

1 2

R314 300_0402_5%

LAN_TD+
LAN_TD-

RJ45_RX-

RJ45_RX+
RJ45_TX­RJ45_TX+

75_0402_5%

RJ45_PR

Termination plane should be copled to chassis ground

LAN Realtek RT8101L

+3V

Layout Note
H0013 pls close to
conn.

U28

LAN_RD+
LAN_RD-

12

R15

1
2
3
4
5
6

8

C476

0.1U_0402_16V4Z

12

12

R14
75_0402_5%

C470
1000P_1206_2KV7K

RD+

RX+

RD-

RX-

CT

CT

NC

NC

NC

NC

CT

CT

TD+7TX+

TX-

TD-

Pulse H0013

(NS0013)

JP16

12

Amber LED+

11

Amber LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

AMP 440470-4 RJ45 with LED

1 2

75_0402_5%

@0.1U_0402_16V4Z

12

SHLD4
SHLD3

SHLD2
SHLD1

RJ45_RX+

RJ45_RX-

RJ45_TX+
RJ45_TX-

12

R312
75_0402_5%

RJ45_PR

16
15

14
13

LANGND

C450

4.7U_0805_10V4Z

16
15
14
13
12
11
10
9

R313

12

C449

C527

0.1U_0402_16V4Z

C516

0.1U_0402_16V4Z

5

C550

0.1U_0402_16V4Z

C549

0.1U_0402_16V4Z

C536

0.1U_0402_16V4Z

4

C529

0.1U_0402_16V4Z

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Compal Electronics, Inc.

Title

LAN REALTEK RTL8101L

Size Document Number Rev

Sapporo 300P

Date: Sheet

星期一

, 01, 2003

十二月

1

of

27 57

0.3

5

PCI_AD[31..0]26,27,30,31

PCI_C/BE#[3..0]26,27,30,31

D D

+5VS

12

R706
100K_0402_5%

G

2

PCI_REQ#226

C C

PCI_AD21

@100_0402_5%

B B

CARD_RST

PCIRST#

A A

PCI_REQ#2

PCI_AD21

R712 100_0402_5%
R403 @100_0402_5%

R407

10K_0402_5%

+3VS
+3V

1 2

R687 @0_0402_5%

1 2

R688 0_0402_5%

R406

1 2

R807 @10K_0402_5%

1 2

R808 10K_0402_5%

TBC

5

PCI_REQ#2_F

13

D

S

Q72
2N7002

PCI_PAR26,27,30,31
PCI_PERR#26,27,30,31
PCI_SERR#26,27,30,31

PCI_FRAME#26,27,30,31
PCI_IRDY#26,27,30,31
PCI_TRDY#26,27,30,31
PCI_STOP#26,27,30,31
PCI_DEVSEL#26,27,30,31

PCI_GNT#226

PM_CLKRUN#24,27,30,31,37,40

PCIRST#10,13,26,27,30,31,37,40

R405 100_0402_5%
R404 100_0402_5%

SERIRQ26,37,40
PCI_PIRQA#16,26,31
PCI_PIRQB#26,27
PCI_PIRQC#26,30
PCI_PIRQD#26,30

PCM_PME#27,30,31,40
CLK_PCI_PCM15
SUSCLK24

PCLR#

CLK_PCI_PCM

R410 100_0402_5%

R445
33_0402_5%

C588
10P_0402_50V8K

PCI_AD[31..0]

PCI_C/BE#[3..0]

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

PCI_PAR
PCI_PERR#
PCI_SERR#

PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_DEVSEL#
PCI_REQ#2_F
PCI_GNT#2
PM_CLKRUN#
PCIRST#

IDSELSM
IDSELSDPCI_AD22
IDSELVIPCI_AD20
IDSELFL

IRQ_SERIRQ
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCM_PME#

CLK_PCI_PCM
SUSCLK

PCLR#
PCM_FCMODE

+3V

4

U5A

K17

AD0

K18

AD1

K19

AD2

L17

AD3

L18

AD4

L19

AD5

L20

AD6

M17

AD7

M18

AD8

M19

AD9

M20

AD10

N17

AD11

N18

AD12

N19

AD13

N20

AD14

P17

AD15

P18

AD16

P19

AD17

P20

AD18

P16

AD19

R17

AD20

R18

AD21

R19

AD22

R20

AD23

T17

AD24

T18

AD25

T19

AD26

T20

AD27

U17

AD28

U18

AD29

U19

AD30

U20

AD31

V20

C/BE#0

V19

C/BE#1

V18

C/BE#2

V17

C/BE#3

Y14

PAR

V16

PERR#

U16

SERR#

W18

FRAME#

W17

IRDY#

Y18

TRDY#

Y17

STOP#

W16

DEVSEL#

Y16

REQ#

Y15

GNT#

W19

CLKRUN#

K20

PCIRST#

N16

IDSELSM

M16

IDSELSD

L16

IDSELVI

K16

IDSELFL

T14

IRQDT#

W15

INTA#

V14

INTB#

V15

INTC#

U15

INTD#

U12

PME#

T4

PCICLK

W3

CLK32

Y11

PCLR#

Y6

SUSPEND#

U13

FCMODE

H6

VCC

P6

VCC

P15

VCC

R5

VCC

R6

VCC

R7

VCC

R15

VCC

R16

VCC

T6

VCC

T15

VCC

L9

GND

L10

GND

L11

GND

L12

GND

M9

GND

M10

GND

M11

GND

M12

GND

TC6385XB_PBGA328

4

SD Interface SmartMedia Interface

PCI Interface

Other Pins

System

Interface

GPIO Interface

Power Supply

PROPRIETARY NOTE

3

+3V

R2

SDCD0

T2

SDCD1

R3

SDCD2

T3

SDCD3

U1

SDCMD

R4

SDCLK

T1

SDCD#

P1

SDWP

V13

SDLED

R1

SDPWR

M1

SMD0

N4

SMD1

N5

SMD2

P4

SMD3

N1

SMD4

N2

SMD5

P2

SMD6

N3

SMD7

M3

SMCLE

M2

SMALE

L1

SMCE#

L3

SMWE#

L2

SMRE#

K3

SMWP#

M4

SMRB#

L5

SMCD#

L4

SMLVD

K4

SMWPD#

K5

SMEJSW#

M5

SMLED#

K2

SMLOCK#

K1

SMEJCT#

P3

SMVC3EN

V12

RSV0

W12

RSV1

Y12

RSV2

W11

RSV3

U6

RSV4

Y4

RSV5

U9

RSV6

U10

RSV7

V9

RSV8

U4

RSV9

U5

RSV10

W4

RSV11

W2

RSV12

V2

RSV13

U3

RSV14

U2

RSV15

V6

RSV16

P5

RSV17

V1

RSV18

V5

RSV19

V4

RSV20

V11

RSV#0

Y5

RSV#1

V8

RSV#2

V7

RSV#3

U7

RSV#4

U8

RSV#5

U11

RSV#6

Y3

RSV#7

W7

RSV#8

V10

GPO0

Y10

GPO1

T10

GPO2

T9

GPO3

W9

GPO4

Y9

GPO5

W8

GPO6

Y8

GPO7

Y7

GPO8

W6

GPO9

T5

GND

T16

GND

W1

GND

W20

GND

Y2

GND

Y19

GND

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SDC_D0
SDC_D1
SDC_D2
SDC_D3

SDCMD
SDCLK

SDCD#
SDWP#
SDLED

SDPWR
SMD0

SMD1
SMD2
SMD3
SMD4
SMD5
SMD6
SMD7

+3V

R441 100K_0402_5%

R436 100K_0402_5%

R419 100K_0402_5%
R423 100K_0402_5%
R434 100K_0402_5%
R435 100K_0402_5%

SDLED 44

3

+3V

100K_0402_5%

1U_0805_25V4Z

R689

C776

C577

0.1U_0402_10V6K

+3V

+3V

+SD3_VCC

+3V

14

U55F

P

13

2

1

SN74LVC14APWLE_TSSOP14

+3V POWER +3V POWER

12

O

I

G

7

C586

0.1U_0402_10V6K

2

U41

4

VIN

SDPWR

R397 10K_0402_5%

SDC_D1
SDC_D0

SDCLK

SDCMD
SDC_D3

SDC_D2

5

CE1GND

RT9702_SOT23-5

+3V+3V

14

U55C

P

O6I

G

SDWP#

7

SN74LVC14APWLE_TSSOP14

2

C556

0.1U_0402_10V6K

FLG#

VOUT

100K_0402_5%

1

C584

0.1U_0402_10V6K

C574

0.1U_0402_10V6K

C589

0.1U_0402_10V6K

3
5
2

JP2

12

Wr_Pt

8

SD4

7

SD3

6

Vss2

5

SDCLK

4

Vdd

3

Vss1

2

SD2

1

SD1

9

SD5

ALPS_SCDA1A0301

CARD_RST

R690

C554

4.7U_0805_10V4Z

Com

SD I/O

CARD_DET#

11
13

10

SMD3
SMD2
SMD1
SMD7

SMD6
SMD4
SMD5
SMD0

SDCMD
SDC_D1
SDC_D0
SDC_D2

+SD3_VCC

R401
20K_0402_5%

1 2

R674 @0_0402_5%

+3V

12

R191
10K_0402_5%

SDCD#

RP111

1 8
2 7
3 6
4 5

100K_8P4R_1206_5%
RP53

1 8
2 7
3 6
4 5

100K_8P4R_1206_5%

RP54

1 8
2 7
3 6
4 5

100K_8P4R_1206_5%

Compal Electronics, Inc.

Title

CARDBUS & SD CONN (1/2)

Size Document Number Rev

B

Sapporo 300P 0.3

星期一

01, 2003

Date: Sheet

十二月

1

C561

0.1U_0402_10V6K

+3V

+3V

+SD3_VCC

28 57,

of

5

S2_D0
S2_D1
S2_D2
S2_D3
S2_D4
S2_D5
S2_D6
S2_D7
S2_D8
S2_D9

D D

S2_A16 S1_A16

1 2

R402
33_0402_5%

C C

B B

A A

S2_D10
S2_D11
S2_D12
S2_D13
S2_D14
S2_D15

S2_A0
S2_A1
S2_A2
S2_A3
S2_A4
S2_A5
S2_A6
S2_A7
S2_A8
S2_A9
S2_A10
S2_A11
S2_A12
S2_A13
S2_A14
S2_A15
R_S2_A16
S2_A17
S2_A18
S2_A19
S2_A20
S2_A21
S2_A22
S2_A23
S2_A24
S2_A25

S2_BVD1
S2_BVD2
S2_CD1#
S2_CD2#
S2_RDY#
S2_WAIT#
S2_WP
S2_INPACK#

S2_CE1#
S2_CE2#
S2_WE#
S2_IORD#
S2_IOWR#
S2_OE#
S2_VS1
S2_VS2
S2_REG#
S2_RST

BVCC3_EN
BVCC5_EN

BEN0

U5B

F17

SLTB30/D0/CAD27

F19

SLTB31/D1/CAD29

G16

SLTB32/D2/RESERVED

E10

SLTB2/D3/CAD0

C10

SLTB3/D4/CAD1

E11

SLTB4/D5/CAD3

C11

SLTB5/D6/CAD5

A11

SLTB6/D7/CAD7

F18

SLTB64/D8/CAD28

F20

SLTB65/D9/CAD30

G18

SLTB66/D10/CAD31

D10

SLTB37/D11/CAD2

B10

SLTB38/D12/CAD4

D11

SLTB39/D13/CAD6

B11

SLTBA40/D14/RESERVED

E12

SLTB41/D15/CAD8

E19

SLTB29/A0/CAD26

D20

SLTB28/A1/CAD25

D18

SLTB27/A2/CAD24

C20

SLTB26/A3/CAD23

C18

SLTB25/A4/CAD22

A18

SLTB24/A5/CAD21

B18

SLTB23/A6/CAD20

B17

SLTB22/A7/CAD18

E14

SLTB12/A8/CCBE#1

B13

SLTB11/A9/CAD14

B12

SLTB8/A10/CAD9

D13

SLTB10/A11/CAD12

A16

SLTB21/A12/CCBE#2

C14

SLTB13/A13/CPAR

A14

SLTB14/A14/CPERR#

C16

SLTB20/A15/CIRDY#

E17

SLTB19/A16/CCLK

A13

SLTB46/A17/CAD16

D14

SLTB47/A18/RESERVED

B14

SLTB48/A19/CBLOCK#

D15

SLTB49/A20/CSTOP#

B15

SLTB50/A21/CDEVSEL#

D16

SLTB53/A22/CTRDY#

B16

SLTB54/A23/CFRAME#

C17

SLTB55/A24/CAD17

A17

SLTB56/A25/CAD19

E20

SLTB63/BVD1/CSTSCHG

E18

SLTB62/BVD2/CAUDIO

G19

SLTB36/CD#1/CCD#1

H20

SLTB67/CD#2/CCD#2

A15

SLTB16/BSY#/CINT#

C19

SLTB59/WAIT#/CSERR#

G20

SLTB33/WP#/CCLKRUN#

D17

SLTB60/INPACK#/CREQ#

D12

SLTB7/CE#1/CCBE#0

C12

SLTB42/CE#2/CAD10

C15

SLTB15/WE#/CGNT#

E13

SLTB44/IORD#/CAD13

C13

SLTB45/IOWR#/CAD15

A12

SLTB9/OE#/CAD11

H18

SLTB43/VS1/CVS1

H19

SLTB57/VS2/CVS2

D19

SLTB61/REG#/CCBE#3

B19

SLTB58/RESET/CRST#

J18

VC3ENB

J19

VC5ENB

J16

VPEN0B

J17

VPEN1B

T13

ZVBEN

E15

VCCB

F14

VCCB

F15

VCCB

F16

VCCB

G15

VCCB

A19

GND

B20

GND

E16

GND

J11

GND

J12

GND

K11

GND

K12

GND

T7

TSTI0

T8

TSTI1

T11

TSTI2

T12

TSTI3

W14

TSTO1

W13

TSTO2

Y13

TSTO3

TC6385XB_PBGA328

Slot B

Test Pins

SLTA30/D0/CAD27
SLTA31/D1/CAD29

SLTA32/D2/RESERVED

SLTA2/D3/CAD0
SLTA3/D4/CAD1
SLTA4/D5/CAD3
SLTA5/D6/CAD5

SLTA6/D7/CAD7
SLTA64/D8/CAD28
SLTA65/D9/CAD30

SLTA66/D10/CAD31

SLTA37/D11/CAD2
SLTA38/D12/CAD4
SLTA39/D13/CAD6

SLTA40/D14/RESERVED

SLTA41/D15/CAD8
SLTA29/A0/CAD26

SLTA28/A1/CAD25
SLTA27/A2/CAD24
SLTA26/A3/CAD23
SLTA25/A4/CAD22
SLTA24/A5/CAD21
SLTA23/A6/CAD20
SLTA22/A7/CAD18

SLTA12/A8/CCBE#1

SLTA11/A9/CAD14

SLTA8/A10/CAD9

SLTA10/A11/CAD12

SLTA21/A12/CCBE#2

SLTA13/A13/CPAR

SLTA14/A14/CPERR#

SLTA20/A15/CIRDY#

SLTA19/A16/CCLK

SLTA46/A17/CAD16

SLTA47/A18/RESERVED

SLTA48/A19/CBLOCK#

SLTA49/A20/CSTOP#

SLTA50/A21/CDEVSEL#

SLTA53/A22/CTRDY#

SLTA54/A23/CFRAME#

SLTA55/A24/CAD17
SLTA56/A25/CAD19

SLTA63/BVD1/CSTSCHG

SLTA62/BVD2/CAUDIO

SLTA36/CD#1/CCD#1
SLTA67/CD#2/CCD#2

SLTA16/BSY#/CINT#

SLTA59/WAIT#/CSERR#
SLTA33/WP#/CCLKRUN#
SLTA60/INPACK#/CREQ#

SLTA7/CE#1/CCBE#0
SLTA42/CE#2/CAD10

SLTA15/WE#/CGNT#

SLTA44/IORD#/CAD13

SLTA45/IOWR#/CAD15

SLTA9/OE#/CAD11

SLTA43/VS1/CVS1

SLTA57/VS2/CVS2
SLTA61/REG#/CCBE#3
SLTA58/RESET/CRST#

VC3ENA
VC5ENA
VPEN0A
VPEN1A

ZVAEN

VCCA
VCCA
VCCA
VCCA
VCCA

GND
GND
GND
GND

Slot A

System
Interface

NC Pins

GND
GND
GND

AUDIO

ALARM

EXSMI#

NC0
NC1
NC2
NC3

A8
D9
B9
J3
H5
H2
G5
G3
E9
C9
A9
J2
H3
H1
G4
G2

C8
E8
B7
D7
A6
C6
D6
B5
D4
E2
F3
E4
A4
D2
C4
A3
D5
E1
D3
D1
C3
C1
B2
B4
C5
A5

B8
D8
J1
H4
B3
E7
A10
C7

G1
F4
C2
F1
E3
F2
J4
J5
A7
B6

H17
G17
J20
H16

U14
E6

F5
F6
F7
G6

A2
B1
E5
J9
J10
K9
K10

W5
V3
W10

A1
A20
Y1
Y20

4

S1_D0
S1_D1
S1_D2
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_D8
S1_D9
S1_D10
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15

S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A7
S1_A8
S1_A9
S1_A10
S1_A11
S1_A12
S1_A13
S1_A14
S1_A15
R_S1_A16
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_A22
S1_A23
S1_A24
S1_A25

S1_BVD1
S1_BVD2
S1_CD1#
S1_CD2#
S1_RDY#

S1_WAIT#

S1_WP

S1_INPACK#

S1_CE1#
S1_CE2#

S1_WE#

S1_IORD#

S1_IOWR#

S1_OE#
S1_VS1
S1_VS2

S1_REG#

S1_RST

AVCC3_EN
AVCC5_EN

AEN0
AEN1BEN1

+3VALW
+5VALW

+12VALW

+3VALW

+5VALW

+12VALW

1 2

R442
33_0402_5%

+5VALW

C545

0.1U_0402_10V6K

+S1_VCC +S2_VCC

C551
1U_0805_25V4Z

This area close to MIC2563A-0BSM

+S1_VCC+S2_VCC

PCM_SPK# 34

3

U38

AVCC3_EN
AVCC5_EN

AEN0
AEN1

BVCC3_EN
BVCC5_EN

BEN0
BEN1

+3VALW

C526

0.1U_0402_10V6K

C525

0.1U_0402_10V6K

27

AVCC3IN

1

AVCC5IN

3

AVCC5IN

23

AVPPIN

6

AVCC3_EN

5

AVCC5_EN

7

AEN0

8

AEN1

13

BVCC3IN

15

BVCC5IN

17

BVCC5IN

9

BVPPIN

20

BVCC3_EN

19

BVCC5_EN

21

BEN0

22

BEN1

MIC2563A-0BSM_SSOP28

C521
1U_0805_25V4Z

+S1_VCC

C576

0.1U_0402_10V6K

+S2_VCC

C557

0.1U_0402_10V6K

C544

0.1U_0402_10V6K

C543

0.1U_0402_10V6K

Slot A
Power
Supply

Slot B
Power
Supply

AVCCOUT
AVCCOUT
AVCCOUT

AVPPOUT

NC0
NC1

BVCCOUT
BVCCOUT
BVCCOUT

BVPPOUT

GND
GND

+12VALW

C530

0.1U_0402_10V6K

C575

0.1U_0402_10V6K

C558

0.1U_0402_10V6K

This area close to TC6385XB

2
26
28

24

11
25

12
14
16

10

4
18

C538

0.1U_0805_25V7K

C585

0.1U_0402_10V6K

C555

0.1U_0402_10V6K

2

RP19

AVCC5_EN

1 8

AVCC3_EN

+S1_VCC

+S1_VPP

C542
1U_0805_25V4Z

+S2_VCC

+S2_VPP

C531
1U_0805_25V4Z

C215
1000P_0402_50V7K

C537

0.1U_0805_25V7K

C247

+S1_VPP
+S1_VCC +S2_VCC

0.1U_0805_25V7K

C253

0.1U_0402_10V6K

2 7

AEN0

3 6

AEN1

4 5

S1_WP
S1_CD2#
S1_D2
S1_D10
S1_D1
S1_D9

S1_D0
S1_D8
S1_A0
S1_BVD1
S1_A1
S1_BVD2
S1_A2

S1_REG#
S1_A3
S1_INPACK#
S1_A4
S1_WAIT#
S1_A5
S1_RST

S1_A6
S1_VS2
S1_A7
S1_A25
S1_A12
S1_A24
S1_A15

S1_A23
S1_A16
S1_A22

S1_A21
S1_RDY#
S1_A20

S1_WE#
S1_A19
S1_A14
S1_A18
S1_A13
S1_A17
S1_A8

S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_VS1
S1_OE#
S1_CE2#

S1_A10
S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13
S1_D6

S1_D12
S1_D5
S1_D11

S1_D4
S1_CD1#
S1_D3

C301
1000P_0402_50V7K

47K_8P4R_1206_5%

CARDBUS

SOCKET

A1
A2
A3
A4
A5
A6
A7
A8

A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75

JP21

a68
a34
a67
a33
a66
a32
a65
a31
GND
a64
a30
a63
a29
a62
a28
a61
GND
a27
a60
a26
a59
a25
a58
a24
GND
a57
a23
a56
a22
a55
a21
a54
GND
a20
a53
a19
a52/a18
none
a51/a17
a16
a50
a15
GND
a49
a14
a48
a13
a47
a12
a46
GND
a11
a45
a10
a44
a9
a43
a8
GND
a42
a7
a41
a6
a40
a5
a39
GND
a4
a38
a3
a37
a2
a36
a1
a35

PCMC150PIN

b52/b18
b51/b17

GND

GND

GND

GND

none

GND

GND

GND

GND

BVCC5_EN
BVCC3_EN
BEN0
BEN1

B1

b68

B2

b34

B3

b67

B4

b33

B5

b66

B6

b32

B7

b65

B8

b31

B9
B10

b64

B11

b30

B12

b63

B13

b29

B14

b62

B15

b28

B16

b61

B17
B18

b27

B19

b60

B20

b26

B21

b59

B22

b25

B23

b58

B24

b24

B25
B26

b57

B27

b23

B28

b56

B29

b22

B30

b55

B31

b21

B32

b54

B33
B34

b20

B35

b53

B36

b19

B37
B38
B39
B40

b16

B41

b50

B42

b15

B43
B44

b49

B45

b14

B46

b48

B47

b13

B48

b47

B49

b12

B50

b46

B51
B52

b11

B53

b45

B54

b10

B55

b44

B56

b9

B57

b43

B58

b8

B59
B60

b42

B61

b7

B62

b41

B63

b6

B64

b40

B65

b5

B66

b39

B67
B68

b4

B69

b38

B70

b3

B71

b37

B72

b2

B73

b36

B74

b1

B75

b35

1

RP14

1 8
2 7
3 6
4 5

47K_8P4R_1206_5%

S2_WP
S2_CD2#
S2_D2
S2_D10
S2_D1
S2_D9

S2_D0
S2_D8
S2_A0
S2_BVD1
S2_A1
S2_BVD2
S2_A2

S2_REG#
S2_A3
S2_INPACK#
S2_A4
S2_WAIT#
S2_A5
S2_RST

S2_A6
S2_VS2
S2_A7
S2_A25
S2_A12
S2_A24
S2_A15

S2_A23
S2_A16
S2_A22

S2_A21
S2_RDY#
S2_A20

S2_WE#
S2_A19
S2_A14
S2_A18
S2_A13
S2_A17
S2_A8

S2_IOWR#
S2_A9
S2_IORD#
S2_A11
S2_VS1
S2_OE#
S2_CE2#

S2_A10
S2_D15
S2_CE1#
S2_D14
S2_D7
S2_D13
S2_D6

S2_D12
S2_D5
S2_D11
S2_D4
S2_CD1#
S2_D3

C216
1000P_0402_50V7K

C248

0.1U_0805_25V7K

+S2_VPP

C254

0.1U_0402_10V6K

C302
1000P_0402_50V7K

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND

PROPRIETARY NOTE

5

4

TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

CARDBUS & PCMCIA (2/2)

Size Document Number Rev

B

Sapporo 300P 0.3

29 57,

星期一

01, 2003

Date: Sheet

十二月

1

of

+3VS_MINIPCI

+3V

0_0603_5%

CLK_PCI_MINI

12

R449
@33_0402_5%

12

C593
@10P_0402_50V8K

WL_OFF#40
KILL_SW#34,39,40

L17

1 2

CLK_PCI_MINI15

W=40mils

PCI_C/BE#326,27,28,31

PCI_C/BE#226,27,28,31

PM_CLKRUN#24,27,28,31,37,40

PCI_SERR#26,27,28,31

PCI_PERR#26,27,28,31
PCI_C/BE#126,27,28,31

+3V

C346 0.1U_0402_16V4Z
U10

5

TC7SH08FU_SSOP5

1
2

3

PCI_PIRQD#26,28

PCI_REQ#126

PCI_IRDY#26,27,28,31

+5VS_MINIPCI

+5VS

+5VS_MINIPCI

1 2

4

CLK_PCI_MINI

PCI_AD31
PCI_AD29

PCI_AD27
PCI_AD25

PCI_AD23
PCI_AD21

PCI_AD19
PCI_AD17

PCI_AD14
PCI_AD12

PCI_AD10
PCI_AD8

PCI_AD7
PCI_AD5
PCI_AD3
PCI_AD1

1 2

L31 0_0603_5%

PCI_AD[0..31]

MINI_PCI SOCKET

TIP

LAN RESERVED

D9

RB751V_SOD323

0603

21

PCI_PIRQD#

W=30mils

W=30mils W=20mils

JP27

112

KEY KEY

334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
535354
555556
575758
595960
616162
636364
656566
676768
696970
717172
737374
757576
777778
797980
818182
838384
858586
878788
898990
919192
939394
959596
979798
9999100

101

101

103

103

105

105

107

107

109

109

111

111

113

113

115

115

117

117

119

119

121

121

123

123

Mini-PCI SLOT

102
104
106
108
110
112
114
116
118
120
122
124

PCI_AD[0..31] 26,27,28,31

L30

1 2

12

1 2

PCIRST#

+3V

C214
@1000P_0402_50V7K

C304

0.1U_0402_16V4Z

C233
@0.1U_0402_16V4Z

1 2

C252

0.1U_0402_16V4Z

1 2

C598
@0.1U_0402_16V4Z

1 2

C255

0.1U_0402_16V4Z

1 2

+5VS_MINIPCI

12

C600
@10U_1206_16V4Z

+3VS_MINIPCI

C243

0.1U_0402_16V4Z

1 2

C288

0.1U_0402_16V4Z

1 2

12

C590
10U_1206_16V4Z

Compal Electronics, Inc.

Title

MINI_PCI

Size Document Number Rev

B

Sapporo 300P

Date: Sheet

星期一

01, 2003

十二月

0.3

of

30 57,

RING

2
4

6
8

LAN RESERVED

10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

PCI_PIRQC#

W=40mils

PCIRST#

PCI_AD30
PCI_AD28

PCI_AD26
PCI_AD24

MINI_IDSEL

PCI_AD22
PCI_AD20

PCI_AD18
PCI_AD16

1 2

W=30mils

+3V

1 2

R440

PCI_AD15
PCI_AD13
PCI_AD11

PCI_AD9

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

+3V

C289

0.1U_0402_16V4Z

+5VS_MINIPCI

PCI_PI R QC# 26,28

PCI_GNT#1 26
WLANPME# 27,28,31,40

PCI_AD18

100_0402_5%

PCI_PAR 26,27,28,31

PCI_FRAME# 26 , 27,28,31
PCI_T R D Y # 26,27,28,31
PCI_STOP# 26,27,28,31

PCI_DEVSEL# 26 ,27,28,31

PCI_C/BE#0 26,27,28,31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCIRST#10,13,26,27,28,31,37,40

+3VS_MINIPCI

W=40mils

0_0603_5%

IDSEL : PCI_AD18

A

B

C

D

E

+3VS

1 2

4.7K_0402_5%

R526

1 2

10K_0402_5%

+3VS

1 1

PCI_PAR26,27,28,30
PCIRST#10,13,26,27,28,30,37,40

PCI_AD[0..31]

R516

220_0402_5%

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8

PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

CLK_PCI_1394

PCI_GNT#0
PCI_REQ#0
1394_IDSEL

PCI_FRAME#

PCI_IRDY#
PCI_TRDY#

PCI_DEVSEL#

PCI_STOP#
PCI_PERR#
PCI_PIRQA#
1394_PME#
PCI_SERR#
PCI_PAR

PCIRST# TPA0+

1 2

PCI_AD[0..31]26,27,28,30

2 2

IDSEL:PCI_AD16

PCI_AD16

1 2

R563

3 3

CLK_PCI_1394

4 4

1394_IDSEL

100_0402_5%

PCI_C/BE#326,27,28,30
PCI_C/BE#226,27,28,30
PCI_C/BE#126,27,28,30
PCI_C/BE#026,27,28,30

CLK_PCI_139415

PCI_GNT#026
PCI_REQ#026

PCI_FRAME#26,27,28,30

PCI_IRDY#26,27,28,30

PCI_TRDY#26,27,28,30

PCI_DEVSEL#26,27,28,30

PCI_STOP#26,27,28,30

PCI_PERR#26,27,28,30

PCI_PIRQA#16,26,28

1394_PME#27,28,30,40

PCI_SERR#26,27,28,30

PM_CLKRUN#24,27,28,30,37,40

12

R583
@10_0402_5%

C696
@10P_0402_50V8K

R523
220_0402_5%

1 2

U52

84

PCI_AD0

82

PCI_AD1

81

PCI_AD2

80

PCI_AD3

79

PCI_AD4

77

PCI_AD5

76

PCI_AD6

74

PCI_AD7

71

PCI_AD8

70

PCI_AD9

69

PCI_AD10

67

PCI_AD11

66

PCI_AD12

65

PCI_AD13

63

PCI_AD14

61

PCI_AD15

46

PCI_AD16

45

PCI_AD17

43

PCI_AD18

42

PCI_AD19

41

PCI_AD20

40

PCI_AD21

38

PCI_AD22

37

PCI_AD23

32

PCI_AD24

31

PCI_AD25

29

PCI_AD26

28

PCI_AD27

26

PCI_AD28

25

PCI_AD29

24

PCI_AD30

22

PCI_AD31

34

PCI_C/BE3

47

PCI_C/BE2

60

PCI_C/BE1

73

PCI_C/BE0

16

PCI_CLK

18

PCI_GNT

19

PCI_REQ

36

PCI_IDSEL

49

PCI_FRAME

50

PCI_IRDY

52

PCI_TRDY

53

PCI_DEVSEL

54

PCI_STOP

56

PCI_PERR

13

PCI_INTA/CINT

21

PCI_PME/CSTSCHG

57

PCI_SERR

58

PCI_PAR

12

PCI_CLKRUN

85

PCI_RST

14

G_RST

89

GPIO3

90

GPIO2

VDDP20VDDP35VDDP48VDDP62VDDP

TSB43AB21
/(TSB43AB22)

PCI BUS INTERFACE

PLLGND18REG_EN9AGND

AGND

AGND

AGND

AGND

AGND

AGND

109

110

111

117

126

127

128

87

78

CYCLEIN

BIAS CURRENT

OSCILLATOR

FILTER

EEPROM 2 WIRE BUS

POWER CLASS

PHY PORT 1

DGND17DGND23REG1830DGND33DGND44DGND55DGND64DGND68DGND75DGND83REG1893DGND

C695

0.1U_0402_16V4Z

R527

1 2

R524

1 2

R267
R269 4.7K_0402_5%

86

11

96

DVDD

CNA

DVDD

TEST1710TEST16

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD

CYCLEOUT/CARDBUS

PLLVDD

AVDD
AVDD
AVDD
AVDD
AVDD

CPS

NC/(TPBIAS1)

NC/(TPA1+)

NC/(TPA1-)

NC/(TPB1+)

NC/(TPB1-)

FILTER0
FILTER1

SDA
SCL
PC0

PC1
PC2

TPBIAS0

TPA0+

TPA0-

TPB0 +

TPB0 -

TEST9
TEST8

TEST3
TEST2
TEST1
TEST0

TSB43AB21_PQFP128

103

C668

0.1U_0402_16V4Z

R0

R1
X0

X1

4.7K_0402_5%

4.7K_0402_5%

12

15
27
39
51
59
72
88
100
7
1
2
107
108
120

1 2

106

R545

125
124
123
122
121

118

R564

6.34K_0603_1%

119
6

5

C694

3

0.1U_0402_16V4Z

4

1 2

92

R525

1 2

91

R521

99
98
97

TPBIAS0

116
115

TPA0-

114

TPB0+

113

TPB0-

112

94
95

101
102
104
105

+3VS

1394_PLLVDD

1K_0402_5%

220_0402_5%
220_0402_5%

+3VS

C676

0.1U_0402_16V4Z

0.01U_0402_25V4Z
C407

C702
22P_0402_50V8J

X7

24.576MHz_16P_3XG-24576-43E1

1 2

C700
22P_0402_50V8J

C675

0.1U_0402_16V4Z

L18
BLM21A601SPT_0805

1 2

C404

4.7U_0805_10V4Z

R562

56.2_0603_1%

R557

56.2_0603_1%

C681
220P_0402_50V8K

C683

0.1U_0402_16V4Z

+3VS

C403
1000P_0402_50V7K

+3VS

R561

56.2_0603_1%

R558

56.2_0603_1%

R556

5.11K_0603_1%

C685

0.1U_0402_16V4Z

C400
1000P_0402_50V7K

C684

0.33U_0603_16V4Z

C408

0.1U_0402_16V4Z

JP35

4

4

3

3

2

2

1

1

SUYIN_020204FR004S507ZL

C409

0.1U_0402_16V4Z

C396
1000P_0402_50V7K

C671

0.1U_0402_16V4Z

C670
1000P_0402_50V7K

C410

0.1U_0402_16V4Z

C672
1000P_0402_50V7K

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND

PROPRIETARY NOTE

A

B

TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

1394 Interface

Size Document Number Rev

B

Sapporo 300P

星期一

01, 2003

Date: Sheet

十二月

E

of

31 57,

0.3

AC97 Codec

5

4

3

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

1

12

R624 6.8K_0402_5%

12

R621 6.8K_0402_5%

D D

C C

INT_CD_L34
INT_CD_R34

MD_SPK39

B B

A A

LINE_IN_L34

LINE_IN_R34

C751 0.01U_0402_25V4Z

R635 10K_0402_5%

R637 10K_0402_5%

C813

0.1U_0402_16V4Z

1 2

R814 0_0402_5%

C815

0.1U_0402_16V4Z

1 2

R281 0_0603_5%

1 2

R272 0_0603_5%

1 2

R277 0_0603_5%

R631 6.8K_0402_5%
R625 6.8K_0402_5%

R630 20K_0402_5%
R626 20K_0402_5%

12

12

+3VS
+3VS

12

R623 6.8K_0402_5%

12

R622 6.8K_0402_5%

C737

0.1U_0402_16V4Z

C741 1U_0603_10V6K
C738 1U_0603_10V6K

@0_0402_5%

0.1U_0402_16V4Z

12
12

12
12

MONO_IN34

ICH_AC_RST#24,39

ICH_AC_SYNC24,39

ICH_AC_SDOUT24,39

R787 @10K_0402_5%
R788 @10K_0402_5%

CD_L_R

C746 1U_0603_10V6K

CD_R_R

C744 1U_0603_10V6K

CD_GNA

MIC34

CD_AGND36

C745 1U_0603_10V6K
C743 1U_0603_10V6K

+AUD_VREF

C750 1U_0603_10V6K

R633 100_0402_5%

12
12

EAPD34
SPDIF34

R627
@10K_0402_5%

1 2

+5VCDS

+VDDA

C742
10U_1206_16V4Z

+AUD_VREF

R634

C748

LINEIN_L
LINEIN_R

C_MICMIC

C_MD_SPK

12

R628
20K_0402_5%

12

R472
0_0402_5%

LINEIN_L
LINEIN_R

L45

1 2

CHB2012U170_0805

L36

1 2

@CHB2012U170_0805

1 2

14

AUX_L

15

AUX_R

16

VIDEO_L

17

VIDEO_R

23

LINE_IN_L

24

LINE_IN_R

18

CD_L

20

CD_R

19

CD_GND

21

MIC1

22

MIC2

13

PHONE

12

PC_BEEP

11

RESET#

10

SYNC

5

SDATA_OUT

45

RESERVERD/ID0#

46

EXT24M/ID1#

47

EAPD

48

ZV_BCK/DIT

4

DVSS1

7

DVSS2

YMF753

CD_GNA

12

12

R629

6.8K_0402_5%

+AVDD_AC97

38

AVDD125AVDD2

U58

LINE_OUT_L

LINE_OUT_R

MONO_OUT

TRUE_LOUT_L

TRUE_LOUT_R

BIT_CLK

SDATA_IN

XTL_OUT

VREFOUT

ZV_LR/DIT

ZV_SIN/RES

+VDDC

DVDD11DVDD2

XTL_IN

CAP1
CAP2

VREF
CAP4

CAP3
CAP5
CAP6

MSEL
AVSS1
AVSS2

+VDDC

C747

0.1U_0402_16V4Z

9

35
36

LINEL
LINER

C731 1000P_0402_50V7K
C732 1000P_0402_50V7K
C728 4.7U_0805_10V4Z
C727 4.7U_0805_10V4Z

37
39
41

1 2

6

R632 22_0402_5%

1 2

8

R636 22_0402_5%

2

@1M_0402_5%

3
29
30
28
27

C734 2200P_0402_50V7K
C733 0.015U_0402_16V7K

1 2

R617 0_0402_5%

32

31
33
34
43
44

40

AGND

26
42

0.01U_0402_16V7K

AGNDDGND

R789
10K_0402_5%

1 2

+5VALW

C432

@4.7U_0805_10V4Z

+3VS

C749
10U_1206_16V4Z

1 2

C752 15P_0402_50V8J

1 2

R638

R280

R790

1 2

1 2

620_0402_5%

+AUD_VREF

0.01U_0402_16V7K

R616

C882

0.01U_0603_50V7K

@10K_0402_5%

C724

C717

0.1U_0402_16V4Z

C434
@0.1U_0402_16V4Z

SUSP#19,35,40,41,42,50,51,52,53

AC97_L
AC97_R

ICH_AC_BITCL K 24,39
ICH_AC_SDIN0 24

X1

1 2

24.576MHz_16P_3XG-24576-43E1

1

C435
22P_0402_25V8K

2

C735

+AUD_VREF

@1U_0603_10V6K

C726

4.7U_0805_10V4Z

2200P_0402_50V7K

+2.5VOP_REF

0.1U_0402_16V4Z

C723

DGND AGND

5

4

3

Adjustable Output

U22

4

VIN

2

DELAY
ERROR7CNOISE

8

SD

@SI9182DH-AD_MSOP8

INT_CD_L34

+2.5VOP_REF

INT_CD_R34

1

C436
22P_0402_25V8K

2

C736

22U_1206_16V4Z

2

5

VOUT

SENSE or ADJ

R809 10K_0402_5%

R810 10K_0402_5%

+2.5VOP_REF

+2.5VOP_REF

C881

6
1
3

GND

12

C709 1U_0603_10V6K

12

C690 1U_0603_10V6K

EC_IDERST#

R601 10K_0402_5%

R581 10K_0402_5%

C729

4.7U_0805_10V4Z

EC_IDERST35,40

Title

Size Document Number Rev

B

Date: Sheet of

R279

@100K_0603_1%
C433
@0.1U_0402_16V4Z

+5VCDS

1 2

R278

@33K_0603_1%

1 2

DIRECT PLAY PATH

C693 0.1U_0402_16V4Z

147

1 2

13

U53A
74HCT4066

+5VCDS

147

11 10

12

U53B
74HCT4066

+5VCDS

AC97_L

12

147

4 3

U53C

5

74HCT4066

+5VCDS

147

EC_IDERST

8 9

U53D

6

74HCT4066

+5VALW

R579
100K_0402_5%

EC_IDERST#

13

D

2

G

S

12

EC_IDERST

Compal Electronics, Inc.

AC97 Codec YAM753

Sapporo 300P

星期一

, 01, 2003

十二月

+VDDA

EQ_LEFT

EQ_RIGHT

+VDDA

C431
@4.7U_0805_10V4Z

POWER ON PATH

EQ_LEFT

EQ_RIGHTAC97_R

Q61
2N7002_SOT23

DM_ON
DM_ONHL SYSTEM ON

32 57

1

EQ_LEFT 33,34

EQ_RIGHT 33,34

DIRECT CD

0.3

5

+5VCD+5VCD

C423

4.7U_0805_10V4Z

C725

D D

EQ_LEFT

0.018U_0603_16V7K

1 2

R613 11.8K_0603_1%
C718

0.018U_0603_16V7K

+2.5VOP_REF

C422

0.1U_0402_16V4Z

EQ_L_IN1#

EQ_L_IN1

12

R614
107K_0603_1%

2

-

3

+

4

U56A

P

1

O

G

LMV824MT_TSSOP14

11

R607

3.32K_0603_1%
C720
1800P_0402_50V7K

AUDIO LEFT CHANNEL

+2.5VOP_REF

4

3

BTQ00 EQ Circuit

EQ_L_OUT1

1 2

EQ_L_IN2 EQ_L_IN3

12

R618

200K_0603_1%

1 2

R612 4.99K_0603_1%

C721 0.082U_0402

+5VCD

4

U56B

6

P

-

5

+

11

EQ_L_OUT2

7

O

G

LMV824MT_TSSOP14

1 2

R598

2.49K_0603_1%

C703 390P_0603_50V7K

+2.5VOP_REF

UPDATA 03/26

C704 4700P_0402_25V7K

10

12

R590
200K_0603_1%

+5VCD

9

­+

4

U56C

P

8

OUT

G

LMV824MT_TSSOP14

11

2

+5VCD

2

-

3

+

13
12

C730
100P_0402_50V8K

1 2

R619

1.5K_0603_1%

4

U57A

P

1

O

G

LMV824MT_TSSOP14

11

+5VCD

4

U56D

P

­OUT

+

G

LMV824MT_TSSOP14

11

14

C425

0.1U_0402_16V4Z

EQ_L_IN5

C701 1500P_0402_50V7K

1 2

R594

1.65K_0603_1%
C705

EQ_L_OUT3 EQ_L_OUT4

390P_0603_50V7K

+2.5VOP_REF

EQ_L_IN4

12

R589
100K_0603_1%

1

AMP_LEFTAMP_LEFT_1

1 2

R684 0_0402_5%

OUTPUT TO AMPLIFIER
LEFT CHANNEL

AMP_LEFT 34

C C

EQ_LEFT32,34

EQ_RIGHT32,34

+5VCD

C420

+5VCD

2

-

3

+

4

U54A

P

O

G

LMV824MT_TSSOP14

11

C421

4.7U_0805_10V4Z

C719

0.018U_0603_16V7K

B B

EQ_RIGHT

C418

4.7U_0805_10V4Z

0.1U_0402_16V4Z

1 2

R603 11.8K_0603_1%
C710

0.018U_0603_16V7K

+2.5VOP_REF

EQ_R_IN1#

EQ_R_IN1

12

R606
107K_0603_1%

AUDIO RIGHT CHANNEL

+2.5VOP_REF

A A

BY-PASS EQ CIRCUIT

EQ_LEFT
EQ_RIGHT

EQ_R_OUT1

1

1 2

R602

3.32K_0603_1%
C712
1800P_0402_50V7K

EQ_R_IN2

12

R615
200K_0603_1%

R609 @0_0402_5%
R608 @0_0402_5%

AMP_RIGHT

12

0.1U_0402_16V4Z

1 2

R600 4.99K_0603_1%

C713 0.082U_0402

+5VCD

4

U54B

6

P

­O

5

+

G

LMV824MT_TSSOP14

11

AMP_LEFT

12

C708

EQ_R_OUT2

7

100K_0603_1%

100K_0603_1%

+2.5VOP_REF

+5VCD

12

R595

9

10

12

R596

C688 4700P_0402_25V8K

1 2

R586

2.49K_0603_1%

C689 390P_0603_50V7K

12

+5VCD

4

U57C

P

­OUT

+

G

LMV824MT_TSSOP14

11

EQ_R_IN3

R585
200K_0603_1%

+2.5VOP_REF

8

EQ_R_IN5

+5VCD

4

U54C

9

P

­OUT

10

+

G

11

EQ_R_OUT3

8

LMV824MT_TSSOP14

13
12

C706 1500P_0402_50V7K

1 2

R597

1.65K_0603_1%
C707
390P_0603_50V7K

+2.5VOP_REF

+5VCD

4

U57D

P

­OUT

+

G

LMV824MT_TSSOP14

11

12

14

C722
100P_0402_50V8K

1 2

R620

1.5K_0603_1%

+5VCD

6

-

5

+

EQ_R_IN4

R584
100K_0603_1%

4

U57B

P

7

O

G

LMV824MT_TSSOP14

11

+5VCD

4

13

P

­OUT

12

+

G

11

1 2

R685 0_0402_5%

U54D

EQ_R_OUT4

14

LMV824MT_TSSOP14

AMP_RIGHTAMP_RIGHT_1

OUTPUT TO AMPLIFIER
RIGHT CHANNEL

AMP_RIGHT 34

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND

PROPRIETARY NOTE

5

4

TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

HAREWARE EQ

Size Document Number Rev

B

Sapporo 300P

星期一

, 01, 2003

Date: Sheet

十二月

1

33 57

of

0.3

A

B

C

D

E

Audio AMP

+5VCD

W=40Mil

12

C760

0.1U_0402_16V4Z

4 4

NBA_PLUG

R604
100K_0402_5%

1 2

AMP_LEFT33

AMP_RIGHT33

EQ_LEFT32,33
EQ_RIGHT32,33

3 3

HIGH

PIN 4,10 ACTIVE

LOW PIN 5,9 ACTIVE

NBA_PLUG

INTSPK_L1
INTSPK_R1

C762

0.47U_0603_16V4Z
C764

0.47U_0603_16V4Z

R665
@820_0402_5%

AMP_LEFT_1

1 2

AMP_RIGHT_1

1 2

12

fo=1/(2*3.14*R*C)=412Hz
R=820 / C=0.47U

VOL_AMP

0.47U_0603_16V4Z
C763

1 2

0.47U_0603_16V4Z

1 2

C765

C769 0.47U_0603_16V4Z

1 2

C770 0.47U_0603_16V4Z

1 2

12

R666
@820_0402_5%

0.1U_0402_16V4Z

12

C761

4.7U_0805_10V4Z

12

C771

Enable Gain
soft start

SET SE MODE MAX

2.94V---0dB

U59

3

PVDD

SHUTDOWN#

11

PVDD

7

VDD

22

HP/LINE#

21

VOLUME

14

LOUT+

24

ROUT+

9

LLINEIN
RLINEIN5SEDIFF

10

LHPIN

4

RHPIN

16

FADE#

TPA6011A4_TSSOP24

+5VCD +5VCD

SE/BTL#
BYPASS

LOUT-

ROUT-

LIN
RIN

SEMAX

PGND
PGND
AGND

12

R663
@10K_0402_5%

12

R667
10K_0402_5%

15
23
17
12
2
8
6

19
20

1
13
18

SHUTDOWN#

2N7002_SOT23

NBA_PLUG

2

C766

1

1U_0603_10V4Z

(0.47U~1U)

+5VCD

D

Q66

S

INTSPK_L2
INTSPK_R2

C767

0.47U_0603_16V4Z

1 2

12

R664
10K_0402_1%

SET SE MODE MAX

2.7V--- (-4dB)

12

R668

11.8K_0603_1%

12

R661
100K_0402_5%

13

2

G

1 2

R662

1 2

@100K_0402_5%

C768

0.47U_0603_16V4Z

EAPD 32

+5VCD

INTSPK_R1
INTSPK_R2

JP9

1
2

MOLEX_53398-0290

+3V

C699

0.1U_0402_16V4Z

14

U55A

P

1

O2I

G

7

+3V POWER

SN74LVC14APWLE_TSSOP14

+3V

14

P

3

O4I

G

U55B

SN74LVC14APWLE_TSSOP14

7

+3V POWER

C715

1U_0603_10V6K

C587

1U_0603_10V6K

C716

1U_0603_10V6K

R610

560_0402_5%

1 2

R447

560_0402_5%

1 2

R611

560_0402_5%

1 2

10K_0402_5%

B

R642

12

+AVDD_AC97

12

R640
10K_0402_5%

12

R641
10K_0402_5%

1

C

Q63

2

B

2SC2411K_SOT23

E

3

D35
RB751V_SOD323

2 1

PROPRIETARY NOTE

R697(1.5K)----------10dB
R698(300)----------14dB

1 2

R698 300_0402_5%

C754
10U_1206_16V4Z

C753

1U_0603_10V6K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R639

2.4K_0402_5%

1 2

MONO_IN

MONO_IN 32

C

+5VCD

+AVDD_AC97

+AUD_VREF

1 2

L37 FBML10160808121LMT_0603

1 2

L39 FBML10160808121LMT_0603

1 2

R697 @1.5K_0402_1%

+3V

KILL_SW#30,39,40

SPDIF32

D

MIC32

LINE_IN_R32
LINE_IN_L32

1 2

R669 100K_0402_5%

KILL_SW#

1 2

L38 FBML10160808121LMT_0603

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

NBA_PLUG
VOL_AMP

MIC
LINE_IN_R

LINE_IN_L

INTSPK_R1
INTSPK_L2
INTSPK_L1

AMP & Audio Jack

Sapporo 300P

星期一

, 01, 2003

十二月

JP10

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

ACES_85201-2005

E

0.3

34 57

10

OE#

I9O

U51C

+3V POWER

+3V

12

8

R599

8.2K_0402_5%

PCM_SPK#29

SPKR24

A

R593
100K_0402_5%

1 2

C714

0.22U_0603_16V4Z

BEEP#40

2 2

SN74LVC125APWLE_TSSOP14

1 1

AUDIO Board Conn.

Placea caps. near HDD
CONN.

+5VS

C654
1000P_0402_50V7K

IDE_PDDREQ24
IDE_PDIOW#24
IDE_PDIOR#24
IDE_PDIORDY24
IDE_PDDACK#24
IDE_IRQ1426
IDE_PDA124
IDE_PDA024
IDE_PDCS1#24 IDE_PDCS3# 24
PHDD_LED#40

+5VS

C656
10U_1206_16V4Z

IDE_PDD[0..15]24

1 2

R259

100K_0402_5%

C657
10U_1206_16V4Z

IDE_PDD[0..15]

PIDE_RST#
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0

IDE_PDDREQ
IDE_PDIOW#
IDE_PDIOR#

IDE_IRQ14
IDE_PDA1
IDE_PDA0

+5VS

C655
1U_0805_25V4Z

JP34

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44

OCTEK AFH-22DC

C653

0.1U_0402_16V4Z

HDD CONNECTOR

IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

PCSEL

1 2

470_0402_5%

R236

IDE_PDA2
IDE_PDCS3#IDE_PDCS1#

+5VS

IDE_PDA2 24

C606
10U_1206_16V4Z

1 2

+5VALW

+5VALW

C609
1U_0805_25V4Z

1 2

1 2

R470

C611 1U_0805_25V4Z

240K_0402_5%

12

+5VCDS

Q79
@AOS 3401_SOT23

2

U43

1

S

D

2

S

D

3

S

D

G4D

SI4425DY-T1_SO8

12

22K

2

22K

13

12

8
7
6
5

13

C608
10U_1206_16V4Z

1 2

13

22K

2

22K

Q44

DTC124EK_SOT23

C604

0.1U_0402_16V4Z

+5VALW

+5VALW

R469
10K_0402_5%

SUSP#19,32,40,41,42,50,51,52,53 CD_PLAY 40

SUSP# CD_PLAY

Q46

@DTC124EK_SOT23

+5VALWP TO +5VLDO

+5VS +5VS

14

U68C

9

B_PCIRST#16,22,26,36

PIDERST#26

SN74LVC08APW_TSSOP14

EC_IDERST32,40

22U_1206_10V4Z

P

A

8

O

10

B

G

7

SN74LVC08APW_TSSOP14

+5VALW +5VCDS

22U_1206_10V4Z

1

1

C885

2

2

1

C886

2

1U_0603_10V4Z

1U_0603_10V4Z

C887

14

U68D

12

P

A

13

B

G

7

1

C888

2

11

O

22U_1206_10V4Z

PIDE_RST#

+5VCD DECOUPLING

(4.5V)

4.7U_0805_10V4Z

1

C889

2

1U_0603_10V4Z

1

1

C891

C890

2

2

4.7U_0805_10V4Z

10K_0402_5%

CD_PLAY40

0.1U_0402_10V6K

1

C892

2

1

C894

2

0.1U_0402_10V6K

1

2

C895

1

C893

2

1U_0603_10V4Z

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CD_PLAY

2N7002_SOT23

+5VCD TO +5VCDS

+5VCDS

L46

1 2

@CHB2012U170_0805

L47

1 2

@CHB2012U170_0805

R791 10K_0402_5%

1 2

12

R792

13

D

2

G

Q77

S

2

G

+5VCD

+12VALW+5VALW

12

R793
1K_0402_5%

13

D

Q76

2N7002_SOT23

S

1

*

C884

2

1U_0603_10V4Z

SI4800DY_SO8

1

C897
@1U_0805_25V4Z

2

1

A

D48
LM431SC_SOT23

Compal Electronics, Inc.

Title

Softwave DJ

Size Document Number Rev

B

Sapporo 300P

Date: Sheet

星期一

2

U66

2

K

3

R

01, 2003

十二月

+5VALW

1 3

5

4

Q75
AOS 3401_SOT23

+5VLDO

D8D7D6D

S1S2S3G

+5VCD

12

R794

3.9K_0603_1%

12

R795

4.99K_0603_1%

(4.5V)

35 57,

0.3

of

IDE,CD-ROM Module CONN.

IDE_SDD[0..15]24

INT_CD_L32
CD_AGND32

R471 470_0402_5%

RDATA#37

WP#37

TRACK0#37

WDATA#37

STEP#37

MTR0#37

DSKCHG#37

DRV0#37,40

B_PCIRST#16,22,26,35

SIDERST#24

+5VCDS

C612
1000P_0402_50V7K

Place co mp o n e nt's c lose ly MODULE CONNECTOR.

IDE_SDD[0..15]

CD_AGND
SIDE_RST#
IDE_SDD7
IDE_SDD6
IDE_SDD5
IDE_SDD4
IDE_SDD3
IDE_SDD2
IDE_SDD1
IDE_SDD0
PDIAG
IDE_SDIOW#
IDE_SIORDY
IDE_IRQ15
IDE_SDA1
IDE_SDA0
SW_IDE_SDCS1#

EXTCSEL1

12

RDATA#
WP#
TRACK0#
WDATA#
STEP#
MTR0#
DSKCHG#
DRV0#

0.1U_0402_16V4Z

B_PCIRST#

SN74LVC08APW_TSSOP14

W=80mils

C610
10U_1206_16V4Z

Main Module Conn. (Master)

JP28

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60

SUYIN_100311MB060S106ZU

+5VS

C652

14

U68A

1

P

A

O

2

B

G

7

C616
1U_0805_25V4Z

3

INT_CD_RINT_CD_L

CD_AGND
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_SDDREQ

IDE_SDDACK#
IDE_SDA2
SW_IDE_SDCS3#

EXTID0

EXTID1

HDSEL#

WGATE#

USBP7+

USBP7-

FDDIR#

3MODE#

INDEX#

+5VCDS

10

U67C

8

OE#

I9O

SN74LVC125APWLE_TSSOP14
R798

10K_0402_5%

C613

0.1U_0402_16V4Z

INT_CD_R 32

IDE_SDDREQ 24

IDE_SDIOR# 24
IDE_SDDACK# 24
IDE_SDA2 24

EXTID0 40

EXTID1 40

HDSEL# 37

WGATE# 37

USBP7+ 24

USBP7- 24

FDDIR# 37

3MODE# 37

INDEX# 37

PCMRST# 40

SIDE_RST#

10K_0402_5%

+5VCDS

R799

2nd Module Conn. (Slave)

JP29

1 2

SIDE_RST#
IDE_SDD7
IDE_SDD6
IDE_SDD5
IDE_SDD4
IDE_SDD3
IDE_SDD2
IDE_SDD1
IDE_SDD0
PDIAGIDE_SDIOR#

IDE_SDIOW#24

IDE_SDIORDY24

IDE_IRQ1526
IDE_SDA124
IDE_SDA024

IDE_SDCS1#24

IDE_SDCS3#24

IDE_SDIOW#
IDE_SIORDY
IDE_IRQ15
IDE_SDA1
IDE_SDA0
SW_IDE_SDCS1#
SHDD_LED#SHDD_LED#
EXTCSEL2

3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60

SUYIN_100311MB060S106ZU

B_PCI_RST#

+3VALW

C8960.1U_0402_16V4Z

14

IDE_SDCS1#

B_PCI_RST#

IDE_SDCS3#

P
I2O

G

7

I12O

SN74LVC125APWLE_TSSOP14

IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_SDDREQ
IDE_SDIOR#
IDE_SDDACK#
IDE_SDA2
SW_IDE_SDCS3#
EXTID2
EXTID3

USBP3+
USBP3-

+5VCDS

1

U67A

3

OE#

SN74LVC125APWLE_TSSOP14

+5VCDS

13

U67D

11

OE#

+5VS

10K_0402_5%
R797

SW_IDE_SDCS1#

10K_0402_5%
R800

SW_IDE_SDCS3#

IDE_SDDREQ 24

IDE_SDIOR# 24
IDE_SDDACK# 24
IDE_SDA2 24

EXTID2 40

EXTID3 40

USBP3+ 24

USBP3- 24

EXTID1

0
0
1
1

EXTID3

0
0
1
1

EXTID0

EXTID2

B_PCIRST#

0
1
0

TV Tuner/No Module

1

0
1
0
1

TV Tuner/No Module

+3VALW

10K_0402_5%
R796

13

D

2

G

S

+5VCDS

R464
100K_0402_5%

1 2

SHDD_LED#

Module
CDROM

FDD
HDD

Module
CDROM

FDD
HDD

B_PCI_RST#

2N7002_SOT23
Q78

SHDD_LED# 40

+5VS

RP138

1 8
2 7
3 6
4 5

1K_8P4R_1206_5%

MTR0#
DSKCHG#
DRV0#
FDDIR#

+5VS

1 8
2 7
3 6
4 5

+5VS

1 8
2 7
3 6
4 5

1K_8P4R_1206_5%

RP151

RDATA#
WP#
TRACK0#
INDEX#

1K_8P4R_1206_5%

RP150

HDSEL#
WGATE#
WDATA#
STEP#

+5VS

R467
100K_0402_5%

1 2

1 2

R468 470_0402_5%

13

D

2

G

Q45

S

2N7002_SOT23

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EXTCSEL2

EXTID0

+5VS

W=80mils

C615
1000P_0402_50V7K

Place co mp o n e nt's c los ely MODULE CONNECTOR.

C617
10U_1206_16V4Z

C620
1U_0805_25V4Z

C614

0.1U_0402_16V4Z

EXTID0
EXTID1
EXTID2
EXTID3

RP82

10K_8P4R_1206_5%

18
27
36
45

Compal Electronics, Inc.

Title

IDE/ FDD MODULE CONN.

Size Document Number Rev

B

Sapporo 300P

星期一

01, 2003

Date: Sheet

十二月

of

36 57,

+3VALW

0.3

A

B

C

D

E

SUPER I/O SMsC FDC47N227

1 1

LPC_AD[0..3]13,24,40

LPC_FRAME#13,24,40

LPC_DRQ#124

PCIRST#10,13,26,27,28,30,31,40

CLK_14M_SIO

R214
@10_0402_5%

2 2

CLK_PCI_SIO

1 2
12

C341
@15P_0402_50V8J

R208
@33_0402_5%

1 2

C330

1

@22P_0402_25V8K

SERIRQ26,28,40
PM_CLKRUN#24,27,28,30,31,40

CLK_PCI_SIO15

CLK_14M_SIO15

PID[0..3]22

BT_DET#39

+3VS

FIR_EN#38

+3VS

2

12

10K_0402_5%

R194

12

10K_0402_5%

R192

3 3

+3VS

12

C285

4.7U_0805_10V4Z

12

C315

0.1U_0402_16V4Z

LPC_AD[0..3]
LPC_AD0

LPC_AD1
LPC_AD2
LPC_AD3

R195 10K_0402_5%

+3VS

R212 10K_0402_5%

CLK_PCI_SIO
CLK_14M_SIO

PID[0..3]

1 2

R643 10K_0402_5%

1 2

R644 10K_0402_5%

12

C340

0.1U_0402_16V4Z

12
12

12

C286

0.1U_0402_16V4Z

+3VS

PID0
PID1
PID2
PID3

12

R209
10K_0402_5%

U8

20

LAD0

21

LAD1

22

LAD2

23

LAD3

24

LFRAME#

25

LDRQ#

26

PCIRST#

27

LPCPD#

50

GPIO12/IO_SMI#

17

IO_PME#

30

SIRQ

28

CLKRUN#

29

PCICLK

19

CLK14

48

GPIO10

54

GPIO15

55

GPIO16

56

GPIO17

57

GPIO20

58

GPIO21

59

GPIO22

6

GPIO24

32

GPIO30

33

GPIO31

34

GPIO32

35

GPIO33

36

GPIO34

37

GPIO35

38

GPIO36

39

GPIO37

40

GPIO40

41

GPIO41

42

GPIO42

43

GPIO43

44

GPIO44

45

GPIO45

46

GPIO46

47

GPIO47

51

GPIO13/IRQIN1

52

GPIO14/IRQIN2

64

GPIO23/FDC_PP

18

VTR

53

VCC

65

VCC

93

VCC

7

VSS

31

VSS

60

VSS

76

VSS

LPC47N227 TQFP100 SUPER I/O

PD0/INDEX#

PD1/TRK0

PD2/WRTPRT#

PD3/RDATA#

PD4/DSKCHG#

PD5

PD6/MTR0#

PD7

BUSY/MTR1#

PE/WDATA#

SLCT/WGATE#

ERROR#/HDSEL#

ACK#/DS1#

INIT#/DIR#

AUTOFD#/DRVDEN0#

STROBE#/DS0#

SLCTIN#/STEP#

DTR2#
CTS2#
RTS2#
DSR2#

TXD2

RXD2

DCD2#

RI2#

DTR1#
CTS1#
RTS1#
DSR1#

TXD1

RXD1

DCD1#

RI1#

IRMODE/IRRX3

IRRX2

IRTX2

RDATA#
WDATA#
WGATE#

HDSEL#

DIR#

STEP#

DS0#

INDEX#
DSKCHG#
WRTPRT#

TRK0#
MTR0#

DRVDEN0
DRVDEN1

GPIO11/SYSOPT

LPD[0..7]

LPD0

68

LPD1

69

LPD2

70

LPD3

71

LPD4

72

LPD5

73

LPD6

74

LPD7

75

LPTBUSY

79

LPTPE

78

LPTSLCT

77

LPTERR#

81

LPTACK#

80
66
82
83
67

100

CTS#2

99
98

DSR#2

97
96
95

DCD#2

94

RI#2

92

DTR#1

89

CTS#1

88

RTS#1

87

DSR#1

86

TXD1

85

RXD1

84

DCD#1

91

RI#1

90
63

61
62

16
10
11
12
8
9
5
13
4
15
14
3
1

2
49

Base I/O Address

0 = 02Eh

*

1 = 04Eh

IRRX

DSKCHG#

RDATA#
WDATA#
WGATE#

HDSEL#

FDDIR#

STEP#

DRV0#

INDEX#

WP#

TRACK0#

MTR0#

LPD[0..7] 39

LPTBUSY 39
LPTPE 39
LPTSLCT 39
LPTERR# 39
LPTACK# 39
INIT# 39
LPTAFD# 39
LPTSTB# 39
SLCTIN# 39

1 2

R206 1K_0402_5%

1 2

R199 1K_0402_5%

IRMODE 38
IRRX 38
IRTXOUT 38

RDATA# 36
WDATA# 36
WGATE# 36
HDSEL# 36
FDDIR# 36
STEP# 36
DRV0# 36,40
INDEX# 36
DSKCHG# 36
WP# 36
TRACK0# 36
MTR0# 36
3MODE# 36

12

10K_0402_5%

R213

1 2

R198 1K_0402_5%

+5VS

DSR#1
CTS#1
RI#1
DCD#1

4.7K_8P4R_1206_5%

IRRX

1 2

R193
@10K_0402_5%

RP112

+3VS+3VS

RP113

1 8
2 7
3 6
4 5

4.7K_8P4R_1206_5%

JP32

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

@96212-1011S

+5V

CTS#2
DSR#2
DCD#2
RI#2

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

18
27
36
45

4 4

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND

PROPRIETARY NOTE

A

B

TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SUPER I/O

Size Document Number Rev

B

Sapporo 300P

Date: Sheet of

星期一

01, 2003

十二月

37 57,

E

0.3

C251
150U_D2_6.3VM

USB_EN#24

+5V

1

12

+

C250

0.1U_0402_16V4Z

2

1 2

R182 @0_0402_5%

USBEN#

R177
0_0402_5%

1 2

U4

1

GND

2

IN

3

EN1#

4

EN2#

TPS2042ADR_SO8

OC1#
OUT1
OUT2
OC2#

8
7
6
5

+USB_AS

+USB_BS

+3VALW

12

R173
100K_0402_5%

12

R174
100K_0402_5%

1 2

R175
47_0402_5%

1 2

R176
47_0402_5%

USB_OC0#

USB_OC2#

12

C230

0.1U_0402_16V4Z

12

C231

0.1U_0402_16V4Z

USB_OC0# 24

USB_OC2# 24

+USB_AS +USB_BS

1

+

C467
150U_D2_6.3VM

2

R44
0_0603_5%

1 2

USBP0+24

1 2

R45
0_0603_5%

1

C11
470P_0402_50V7K

2

USB0+

JP17

1
2
3
4

12

SUYIN_020122MR008S516ZU

(New)

VCC

VCC
D0­D0+

D1+

VSS

VSS
G210G1

G4

5
6

D1-

7
8

9
11

G3

USB2-USB0­USB2+

1

C3
470P_0402_50V7K

2

R46
0_0603_5%

R47
0_0603_5%

1 2
1 2

1

+

C465
150U_D2_6.3VM

2

USBP2- 24USBP0-24
USBP2+ 24

C350
150U_D2_6.3VM

+

1

2

+5V

12

C348

0.1U_0402_16V4Z

1

C81

4.7U_0805_10V4Z

2

1

C64
100P_0402_50V8J

2

USBEN#

U12

1

GND

2

IN

3

EN1#

4

EN2#

TPS2042ADR_SO8

+3VS

R80
47_1206_5%

1 2

12

C63

0.1U_0402_16V4Z

OC1#
OUT1
OUT2

OC2#

+IR_VCC

+IR_GND

+USB_CS

8
7
6
5

+USB_DS

+3VALW

12

R243
100K_0402_5%

FIR Module

IRRX

IRRX37

12

R242
100K_0402_5%

1 2

R240
47_0402_5%

1 2

R239
47_0402_5%

USB_OC4#

USB_OC6#

12

C376

0.1U_0402_16V4Z

+3VS

U2

2

IRED_C

4

RXD

6

VCC

8

GND

IR_VISHAY_TFDU6101E-TR4_8P

IRED_A

TXD

SD/MODE

MODE

12

C375

0.1U_0402_16V4Z

1

C82
22U_1206_10V4Z

2

1
3
5
7

USB_OC4# 24

USB_OC6# 24

1 2

R99
@3.3_1206_5%

1 2

R87

3.3_1206_5%

+IR_ANODE
IRTXOUT
IRMODE

IRTXOUT 37
IRMODE 37

USBP4+24

+USB_CS +USB_DS

+IR_ANODE

1

+

C660
150U_D2_6.3VM

2

R247
0_0603_5%

1 2
1 2

R250
0_0603_5%

1

C369
470P_0402_50V7K

2

USB4­USB4+

JP33

1
2
3
4

12

SUYIN_020122MR008S516ZU

VCC
D0­D0+
VSS

G210G1
G4

(New)

VCC

D1+

VSS

5
6

D1-

7
8

9
11

G3

USB6­USB6+

1

C370
470P_0402_50V7K

2

R252
0_0603_5%

1 2
1 2

R256
0_0603_5%

1

+

C658
150U_D2_6.3VM

2

USBP6- 24USBP4-24
USBP6+ 24

FIR_EN#37

1 2

R645 0_0402_5%

FIR_EN#

LOW FIR Poped
HIGH FIR Un-Poped

cloely IRDA MODULE.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

USB Conn.

Size Document Number Rev

B

Sapporo 300P

Date: Sheet of

星期一

01, 2003

十二月

38 57,

0.3

The component's most place

ICH_AC_SDOUT24,32

ICH_AC_RST#24,32

+5V_PRN

+5V_PRN

+5V_PRN

+3V
+3VS

RP3

1 8
2 7
3 6
4 5

2.7K_8P4R_1206_5%

RP149

1 8
2 7
3 6
4 5

2.7K_8P4R_1206_5%

RP87

1 8
2 7
3 6
4 5

10K_8P4R_1206_5%

R100
0_0402_5%

1 2

L22

1 2

CHB1608B121_0603

1

C98
1U_0805_25V4Z

2

FD4
FD5
FD6
FD7

FD3
FD2
FD1
FD0

LPTSLCT
LPTPE
LPTBUSY
LPTACK#

+3VS_MDC

+3VS_MDC

1

2

MDC CONN.

JP19

1

MONO_OUT/PC_BEEP

3

GND

5

AUXA_RIGHT

7

AUXA_LEFT

9

CD_GND

11

CD_RIGHT

13

CD_LEFT

15

GND

17

3.3Vaux

19

GND

21

3.3Vmain

23

AC97_SDATA_OUT

25

AC97_RESET#

27

GND

29

AC97_MSTRCLK

ACES_88023-3010

C80
1U_0805_25V4Z

LPD0 FD0
LPD1 FD1
LPD2 FD2
LPD3 FD3

LPD7 FD7
LPD6 FD6
LPD5 FD5
LPD4 FD4

+5V_PRN

AUDIO_PWDN

MONO_PHONE

Bluetooth Enable

USB Data+

USB Data-

PRIMARY DN

AC97_SYNC
AC97_SDATA_IN1
AC97_SDATA_IN0

AC97_BITCLK

+5VS_MDC+3V

1

C495
1U_0805_25V4Z

2

RP2

1 8
2 7
3 6
4 5

68_8P4R_1206_5%

1 8
2 7
3 6
4 5

RP1
68_8P4R_1206_5%

1 2

R801 @2.7K_0402_5%

1 2

R802 @2.7K_0402_5%

1 2

R803 @2.7K_0402_5%

1 2

R804 10K_0402_5%

GND

+5V

5Vd

GND

GND

LPTSLCTIN#
LPTINIT#
AFD#/3M#
LPTERR#

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

+5VS_MDC

1 2

10K_0402_5%

1 2

R83 0_0402_5%

1 2

R78
22_0402_5%

MD_SPK 32

1 2

L23
CHB1608B121_0603

+3VS

1 2

R79
22_0402_5%

LPD[0..7]37

LPTAFD#37

INIT#37

SLCTIN#37

+5VS

ICH_AC_SYNC 24,32

ICH_AC_SDIN1 24

ICH_AC_BITCLK 24,32

LPTSTB#37

LPD[0..7]

AFD#/3M#

R302

1 2

33_0402_5%

1 2

33_0402_5%

R3

1 2

R2 33_0402_5%

@0.1U_0402_16V4Z

KILL_SW#30,34,40

BT_RST#40

+5VS

LPTINIT#

LPTSLCTIN#

LPTSTB#

LPTACK#37
LPTBUSY37

LPTPE37

LPTSLCT37

LPTERR#37

C489

+3VS

U30

5

1
2

3

@TC7SH08FU_SSOP5

1 2

0_0402_5%

R344

+5V_PRN

D21

2 1

RB420D_SOT23

R303

1 2

33_0402_5%

FD0
FD1
FD2
FD3
FD4
FD5
FD6
FD7
LPTACK#
LPTBUSY
LPTPE
LPTSLCT

LPTERR#
LPTINIT#
LPTSLCTIN#

BlueTooth Interface

22K

2

Module ID

Indication for polarity of reset
Reset input High Active --> Low ,
Reset input Low Active --> Open

4

BT_PWR40

BT_RESET#

PARALLEL PORT

12

R304

2.2K_0402_5%
C452

1 2

220P_0402_50V8K

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

JP14
@ACES_85201-2005

22K

USBP5+24

USBP5-24

R72
100K_0402_5%

1 2

13

Q6

DTC124EK_SOT23

C27

0.1U_0402_16V4ZR350

BT_DET#37

BT_WAKE_UP40

BT_DETACH40

USBP5+

R338 0_0603_5%
R333 0_0603_5%

+BT_VCC

+3VS+5VS

2

1 3

C25
10U_1206_16V4Z

Module ID

Module_Detect

BT_RESET#
BT_WAKE_UP

(MAX=200mA)

0.1U_0402_16V4Z

C76

0.1U_0402_16V4Z

Q7
SI2301DS-T1_SOT23

+BT_VCC

USB5+
USB5-USBP5-

C477

Bluetooth Connector

FD3
LPTSLCTIN#
FD2
LPTINIT#

@220P_1206_8P4C_50V8_V1

LPTSLCT
LPTPE
LPTBUSY
LPTACK#

@220P_1206_8P4C_50V8_V1

FD1
LPTERR#
FD0
AFD#/3M#

FD7
FD6
FD5
FD4

1 8
2 7
3 6
4 5

@220P_1206_8P4C_50V8_V1

@220P_1206_8P4C_50V8_V1

JP18

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

ACES_87153-2008

(Top Contact)

CP11

18
27
36
45

CP9

18
27
36
45

CP1

CP10

18
27
36
45

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

PARALLEL/MDC PORT

Size Document Number Rev

Sapporo 300P

Date: Sheet of

星期一

01, 2003

十二月

39 57,

0.3

5

0.1U_0402_16V4Z

12

12

C674

0.1U_0402_16V4Z

+RTCVCC +51AVCC

12

D D

C666

0.1U_0402_16V4Z

+3VALW

R494
100K_0402_5%

R478

C C

B B

A A

100K_0402_5%

+3VALW

+5VALW

Analog Board ID definition,
Please see page 3.

Ra

Rb

0.1U_0402_16V4Z

12

12

C678

C669

0.1U_0402_16V4Z

1 2

12

C639

0.1U_0402_16V4Z

ECAGND

1 2
1 2

WLANPME#27,28,30,31
PCM_PME#27,28,30,31
1394_PME#27,28,30,31

LAN_PME#27,28,30,31

12

C649 0.01U_0402_25V4Z

RP145

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

RP85

EC_SMB_DA2

18

EC_SMB_CK2

27

EC_SMB_DA1

36

EC_SMB_CK1

45

10K_1206_8P4R_5%

+3VALW

R481
100K_0402_5%

1 2

R487
18K_0402_5%

1 2

5

C661

1 2

1000P_0402_50V7K

+3VALW

L33
FBM-L11-160808-800LMT_0603

EMAIL#
INTERNET#

+3VALW

BATT_TEMPECAGND

MODE#
FRD#
SELIO#
FSEL#

AD_BID0

12

C638

0.1U_0402_16V4Z

C643

R535
10K_0402_5%

1 2

CLK_PCI_LPC15

EC_PME#

10P_0402_50V8K

+3VALW

C637
1000P_0402_50V7K

1 2

@33_0402_5%

@22P_0402_25V8K

TP_CLK45
TP_DATA45

C664

+3VS

+3VALW

12

R548

1

C682

2

TP_CLK
TP_DATA

EC_SMI#24
S4_SATA43
WL_OFF#30

EC_SWI#24

BT_RST#39

EN_DFAN343

PCMRST#36

EC_RSMRST#24,46

CRY1

12

R519

1 2

20M_0603_5%

1

4

X5

IN

OUT

NC3NC

32.768KHZ_12.5P_1TJS125DJ2A073

2

4

R552 0_0402_5%

SERIRQ26,28,37

LPC_FRAME#13,24,37

LPC_AD013,24,37
LPC_AD113,24,37
LPC_AD213,24,37
LPC_AD313,24,37

R549 4.7K_0402_5%

EC_SCI#24

GATEA2026
KBRST#26

KSI045
KSI145
KSI245
KSI345
KSI444

EXTID036
EXTID136
EXTID236
EXTID336

LID_SW#44

EC_IDERST32,35

SYSON42,43,51
SUSP#19,32,35,41,42,50,51,52,53

VR_ON54

DRV0#36,37
ENBKL16,22
BKOFF#22

FSEL#41

CRY2

4

+51VDD

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

EC_RST#

12

EC_SCI#

EC_GA20

EC_KBRST#

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

LID_SW#

EC_SMI#

EN_DFAN3
SYSON

SUSP#
VR_ON

BKOFF#
FSEL#

R517
120K_0402_5%

1 2

12

C665
12P_0402_50V8J

12

C677

0.1U_0402_16V4Z

7
8

9
15
14
13
10
18
19
22
23

31

5

6

71
72
73
74
77
78
79
80

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

105
106
107
108
109

110
111
114
115
116
117
118
119

CRY1

158

CRY2

160

62
63
69
70
75
76

148
149
155
156

3

4
27
28

173
174

47

U50

SERIRQ
LDRQ#
LFRAME#
LAD0
LAD1
LAD2
LAD3
LCLK
RESET1#
SMI#
PWUREQ#

IOPD3/ECSCI#

GA20/IOPB5
KBRST/IOPB6

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

TINT#
TCK
TDO
TDI
TMS

PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7

32KX1/32KCLKIN
32KX2

IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO

IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15

SEL0#
SEL1#
CLK

16

VDD

VCC134VCC245VCC3

Host interface

Key matrix scan

JTAG debug port

PS2 interface

PORTJ-2

PORTM

GND117GND235GND346GND4

PROPRIETARY NOTE

3

+51AVCC+3VALW

123

GND5

122

159

95

136

157

166

VCC4

VCC5

VCC6

AVCC

AD Input

DA output

PWM
or PORTA

PORTB

IOPB7/RING/PFAIL/RESET2

PORTC

IOPC4/TB1/EXWINT22
IOPC6/TB2/EXWINT23

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21

IOPD2/EXWINT24/RESET2

PORTE

IOPE6/LPCPD/EXWIN45

IOPE7/CLKRUN/EXWINT46

PORTH

PORTI

PORTJ-1

PORTD-2

PORTK

PORTL

AGND

NC212NC320NC421NC585NC686NC791NC892NC997NC10

NC1

96

11

ECAGND

FBM-L11-160808-800LMT_0603

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

GND6

167

PORTD-1

GND7

137

1 2

161

VBAT

AD0
AD1
AD2
AD3

IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7

DP/AD8
DN/AD9

DA0
DA1
DA2
DA3

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

IOPB0/URXD
IOPB1/UTXD

IOPB2/USCLK

IOPB3/SCL1

IOPB4/SDA1

IOPC0

IOPC1/SCL2

IOPC2/SDA2

IOPC3/TA1
IOPC5/TA2

IOPC7/CLKOUT

IOPE4/SWIN

IOPE5/EXWINT40

IOPH0/A0/ENV0

IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1

IOPH4/A4/TRIS

IOPH5/A5/SHBM

IOPH6/A6
IOPH7/A7

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

IOPJ0/RD

IOPJ1/WR0

SELIO#

IOPD4
IOPD5
IOPD6
IOPD7

IOPK0/A8

IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12

IOPK5/A13_BE0
IOPK6/A14_BE1

IOPK7/A15_CBRD

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19

IOPL4/WR1#

1 2

L32

3

R813
0_0402_5%

+RTCVCC

BATT_TEMP

81
82

BATT_OVP

83
84

ALI/MH#

87

EMAIL#

88

MODE#

89

INTERNET#

90

AD_BID0

93
94

DAC_BRIG

99

EN_DFAN2#

100

IREF

101

EN_DFAN1#

102

INVT_PWM

32

BEEP#

33
36

ACOFF

37

KILL_SW#

38

EC_ON

39

EC_LID_OUT#

40

BT_DETACH

43

EC_URXD

153

EC_UTXD

154

EC_USCLK

162

EC_SMB_CK1

163

EC_SMB_DA1

164
165

PBTN_OUT#

168

EC_SMB_CK2

169

EC_SMB_DA2

170

FAN_SPEED1

171

EC_PME#

172

EC_THRM#

175

FAN_SPEED2

176
1

ACIN

26

CD_PLAY

29

PM_SLP_S3#

30
2

PM_SLP_S5#

44

BT_WAKE_UP

24
25

KBA0

124

KBA1

125

KBA2

126

KBA3

127

KBA4

128

KBA5

131

KBA6

132

KBA7

133

ADB0

138

ADB1

139

ADB2

140

ADB3

141

ADB4

144

ADB5

145

ADB6

146

ADB7

147

FRD#

150

FWR#

151

SELIO#

152
41

NUM_LED#

42

CAPS_LED#

54

PADS_LED#

55

KBA8

143

KBA9

142

KBA10

135

KBA11

134

KBA12

130

KBA13

129

KBA14

121

KBA15

120

KBA16

113

KBA17

112

KBA18

104

KBA19

103

FSTCHG

48

PC87591L-VPCN01 A2_LQFP176

98

12

FSTCHG 49

C798
@0.1U_0402_16V4Z

KBA[0..19]41

ADB[0..7]41

BATT_TEMPA 48
BATT_OVP 49

FAN_DET 43
ALI/MH# 48

EMAIL# 44
MODE# 45
INTERNET# 44

DAC_BRIG 22
EN_DFAN2 43
IREF 49
EN_DFAN1 43

INVT_PWM 22
BEEP# 34
SHDD_LED# 36
ACOFF 49

KILL_SW# 30,34,39
EC_ON 44,46
EC_LID_OUT# 24
BT_DETACH 39

EC_URXD 46
EC_UTXD 46
EC_USCLK 46
EC_SMB_CK1 41,48
EC_SMB_DA1 41,48
PCIRST# 10,13,26,27,28,30,31,37

PBTN_OUT# 24
EC_SMB_CK2 5
EC_SMB_DA2 5
FAN_SPEED1 43

EC_THRM# 24
FAN_SPEED2 43
BT_PWR 39

ACIN 24,45,47
CD_PLAY 35
PM_SLP_S3# 24

ON/OFF 44
PM_SLP_S5# 24
BT_WAKE_UP 39
PM_CLKRUN# 24,27,28,30,31,37

FRD# 41
FWR# 41

SELIO# 41
PHDD_LED# 35

R499

DAC_BRIG

1

@0.1U_0402_16V7K

2

2

KBA[0..19]
ADB[0..7]

1 2

100K_0402_5%

1 2

C644 0.22U_0603_16V4Z

(ACES_85201-2405_24P)

JP5

34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

6278-34P-KBCON

ADP_I 49,53

KEYBOARD CONN.

NUM_LED#
PADS_LED#
CAPS_LED#

KSO15
KSO14
KSO10
KSO11
KSO8
KSO9
KSO13
KSI7
KSO3
KSO7
KSO12
KSI4
KSI6
KSI5
KSO6
KSO5
KSI3
KSI0

KSO0
KSO1
KSI1
KSI2

9

KSO2

8

KSO4

7
6
5
4
3
2
1

1 2

R218 300_0402_5%

1 2

R217

1 2

R219

300_0402_5%

(Need to check layout library with KB spec)

BADDR1(KBA3) BADDR0(KBA2)

0
0

*

0
1
01

11

ENV0 (KBA0) TRIS (KBA4)

R493
R492

2
3

0
1

1

1 2
1 2

+3VALW

4.7K_0402_5%

4.7K_0402_5%

C802

IRE
OBD 0

*

DEV 0
PROG

SHBM(KBA5)=1: Enable shared memory with host BIOS
TRIS(KBA4)=1: While in IRE and OBD, float all the
signals for clip-on ISE use

TP_CLK KBA2
TP_DATA

D42

1

@DAN217_SOT23

2

1

For EC Tools

JP31

1
2
3
4
5
6
7
8
9

10

@96212-1011S

300_0402_5%

1
2
3
4
5
6
7
8
9
10

+3VS

+3VS

+3VS

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

EC_URXD
EC_UTXD
EC_USCLK

NUM_LED#
PADS_LED#
CAPS_LED#

KSO15
KSO14
KSO10
KSO11

KSO8
KSO9
KSO13
KSI7

KSO3
KSO7
KSO12
KSI4

KSI6
KSI5
KSO6
KSO5

KSI3
KSI0
KSO0
KSO1

KSI1
KSI2
KSO2
KSO4

+3VALW

CP8 @100P_1206_8P4C_50V8

CP7 @100P_1206_8P4C_50V8

CP6 @100P_1206_8P4C_50V8

CP5 @100P_1206_8P4C_50V8

CP4 @100P_1206_8P4C_50V8

CP3 @100P_1206_8P4C_50V8

CP2 @100P_1206_8P4C_50V8

2
3
4 5

2
3
4 5

2
3
4 5

2
3
4 5

2
3
4 5

2
3
4 5

2
3
4 5

81
7
6

81
7
6

81
7
6

81
7
6

81
7
6

81
7
6

81
7
6

I/O Address

Index

Data
2E 2F
4E

4F

(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1

Reserved

ENV1 (KBA1)

0
0
0
0

KBA1

1 2

R491 1K_0402_5%

1 2

R490 @1K_0402_5%

KBA3

1 2

R489 1K_0402_5%

KBA5

1 2

R488 1K_0402_5%

+3VALW

+5VS

0
1

1

Compal Electronics, Inc.

Title

EC PC87591

Size Document Number Rev

Custom

Date: Sheet

星期一 十二月

Sapporo 300P

003

of

1

40 57, 01, 2

0.3

KBA2

SELIO#40

SELIO# LARST#

SN74LVC32APWLE_TSSOP14

U13B

4
5

+3VALW

14

A
B

7

+5VALW

P

O

G

6

1 2

R224
20K_0402_5%

ADB0

ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

AA

C352

1 2

1U_0805_25V4Z

3

11

1

+5VALW

U14

D0
D14Q1
D27Q2
D38Q3
D413Q4
D514Q5
D617Q6
D718Q7

CP
MR

1 2

C367

0.1U_0402_16V4Z

20

2

Q0

5

VCC

6
9
12
15
16

CD_FDD_LED#

19

GND

SN74HCT273PW_TSSOP20

10

CDON_LED# 45
MP3_LED# 45
EMAIL_LED# 45

PWR_LED# 45
PWR_SUSP_LED# 45
BATT_LOW_LED# 45
BATT_CHGI_LED# 45

CD_FDD_LED# 44

ADB0

+3VALW

C366

1 2

0.1U_0402_16V4Z

KBA4
SELIO# LARST#

14

U13A

1

P

A

O

2

B

G

SN74LVC32APWLE_TSSOP14

7

ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

CC

3

3

11

1

D0
D14Q1
D27Q2
D38Q3
D413Q4
D514Q5
D617Q6
D718Q7

CP
MR

+5VALW

1 2

C351 0.1U_0402_16V4Z

U11

20

2

Q0

5

VCC

6
9
12
15
16
19

GND

SN74HCT273PW_TSSOP20

10

KSO16

KSO17
HDD_LED#

EC_RCVEN
EC_RCRST#

KSO17 44,45

HDD_LED# 44
WL_BT_LED# 44
S4_LATCH 43
EC_RCVEN 46
EC_RCRST# 46
CIR_GATING# 46

to 3V

FWE#

8

SN74LVC32APWLE_TSSOP14

U13C

+3VALW

O

+3VALW

AA

1 2

R246 100K_0402_5%

CC

1 2

+3VALW

12

R245
100K_0402_5%

14

10

P

A

9

B

G

7

2

G

1 3

D

Q15
2N7002_SOT23

S

FWR# 40

SUSP# 19,3 2 ,3 5 , 40,42,50,51,52,53

EC_FLASH# 24

R238 100K_0402_5%

EC_SMB_CK140,48
EC_SMB_DA140,48

+5VALW

1 2

C399

0.1U_0402_16V4Z

U18

8

VCC

7

WP

6

SCL

5

SDA

GND

AT24C16N10SC-2.7_SO8

+5VALW

12

R266
100K_0402_5%

1

A0

2

A1

3

A2

4

12

R263
100K_0402_5%

1MB Flash ROM 512KB Flash ROM

Flash ROM Socket Conn.

KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#
RESET#

KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1

JP7

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40

@SUYIN-80065A-040G2T

KBA17

KBA19
KBA10

ADB7
ADB6
ADB5
ADB4

ADB3
ADB2
ADB1
ADB0

FRD#
FSEL#

KBA0

+3VALW

U15

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

CE#
OE#
WE#

KBA[0..19]
ADB[0..7]

VCC0
VCC1

RP#

READY/BUSY#

NC0
NC1

GND0
GND1

C663

FWE#

ADB7
ADB5
ADB3

0.1U_0402_16V4Z

1 2

+3VALW

+3VALW

31
30

ADB0

25

D0
D1
D2
D3
D4
D5
D6
D7

NC

ADB1

26

ADB2

27

ADB3

28

ADB4

32

ADB5

33

ADB6

34

ADB7

35

RESET#

10
11
12
29
38

23
39

1 2

R248
@100K_0402_5%

1

C380

0.1U_0402_16V4Z

2

+3VALW

KBA18
KBA16
KBA15 KBA17
KBA12 KBA14
KBA7 KBA13
KBA6 KBA8
KBA5 KBA9
KBA4 KBA11
KBA3 FRD#
KBA2 KBA10
KBA1 FSEL#
KBA0
ADB0 ADB6
ADB1
ADB2 ADB4

U16

1

NC

2

A16

3

A15

4

A12

5

A7

6

A6

7

A5

8

A4

9

A3

10

A2

11

A1

12

A0

13

DQ0

14

DQ1

15

DQ2

16

VSS

@29F040/SST39VF040_PLCC

VCC
WE*

A17
A14
A13

A11
OE*
A10

CE*
DQ7
DQ6
DQ5
DQ4
DQ3

32
31
30
29
28
27

A8

26

A9

25
24
23
22
21
20
19
18
17

KBA[0..19]40

ADB[0..7]40

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

FSEL#40

FRD#40

FSEL#
FRD#
FWE#

21
20
19
18
17
16
15
14

8
7

36

6
5
4
3
2

1
40
13
37

22
24

9

SST39VF080-70_TSOP40

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

BIOS & EXT. I/O PORT

Size Document Number Rev

B

Sapporo 300P

Date: Sheet

星期一

01, 2003

十二月

of

41 57,

0.3

A

B

C

D

E

+3VALW TO +3V

+3VALW

1 1

2 2

3 3

4 4

U44

8

D

7

D

6

D

5

D

SI4800DY_SO8

1

C635
10U_1206_16V4Z

2

+3VALW

U9

8

D

7

D

6

D

5

D

SI4800DY_SO8

1

C345
10U_1206_16V4Z

2

1

C806

0.1U_0402_16V4Z

2

S
S
S
G

S
S
S
G

1

C601
10U_1206_16V4Z

2

1
2
3

SYSON_ALW

4

2

C605

0.1U_0402_16V4Z

1

+3VALW TO +3VS

+3VALW

1

D

1 3

2
3
4

2

C342

0.1U_0402_16V4Z

1

2

1

C807

0.1U_0402_16V4Z

2

G

+3V

1

2

12

R427
@1M_0402_5%

1

5VS_GATE

12

R473
@1M_0402_5%

1

2

2

C808

0.1U_0402_16V4Z

S

Q80
@AOS 3400_SOT23

C599
1U_0805_25V4Z

C344
10U_1206_16V4Z

100K_0402_5%

1 2

13

D

S

R426

100K_0402_5%

1 2

13

D

2

G

Q41

S

2N7002_SOT23

+3VS

1

C343
1U_0805_25V4Z

2

R474

SUSP

2

G

Q47
2N7002_SOT23

1

C809

0.1U_0402_16V4Z

2

SYSON#

+12VALW

+2.5V

+12VALW

8
7
6
5

1

2

+5VALW

+2.5V TO +2.5VS

+2.5VS

U3

1

S

D

2

S

D

3

S

D

4

G

D

SI4800DY_SO8

C192

4.7U_0805_10V4Z

U23

8

D

7

D

6

D

5

D

SI4800DY_SO8

1

C441

4.7U_0805_10V4Z

2

1

C805

0.1U_0402_16V4Z

2

5VS_GATE

2

C170

0.1U_0402_16V4Z

1

+5VALW TO +5V

+5V

1

S

2

S

3

S

4

G

1

2

SYSON_ALW

2

C437

0.1U_0402_16V4Z

1

+5VALW TO +5VS

+5VALW

U45

S

D

S

D

S

D

G

D

SI4800DY_SO8
C646

1
2
3
4

1

2

8
7
6
5

1

4.7U_0805_10V4Z

2

1

C193

4.7U_0805_10V4Z

2

C440

4.7U_0805_10V4Z

+5VS

2

C640

0.1U_0402_16V4Z

1

R699

0_0402_5%

C194
1U_0805_25V4Z

+3VS

R700

0_0402_5%

1

2

1

C647

4.7U_0805_10V4Z

2

5VS_GATE

+3V

12

1

12

5

C438
1U_0805_25V4Z

1

C648
1U_0805_25V4Z

2

+3VALW

2

C781

2

O

+3VALW POWER

6

O

+3VALW POWER

0.1U_0402_16V4Z

1

14

U61A

P

I

G

SN74LVC14APWLE_TSSOP14

7

14

U61C

P

I

G

SN74LVC14APWLE_TSSOP14

7

SYSON40,43,51 SUSP#19,32,35,40,41,50,51,52,53

SYSON

R758

10K_0402_5%

+3VALW

14

U61B

P

3

O4I

G

SN74LVC14APWLE_TSSOP14

7

+3VALW+3VALW

14

U61D

P

9

G

SN74LVC14APWLE_TSSOP14

7

+3V +5V

1 2
13

D

S

1 2
13

D

S

+5VALW

SYSON#

2

G

1 2

+3VALW POWER+3VALW POWER

O8I

+3VALW POWER

R408
@470_0805_5%

1 2
13

SYSON# SYSON#

2

G

Q39
@2N7002_SOT23

R475
@470_0805_5%

2

G

Q48
@2N7002_SOT23

R502
10K_0402_5%

1 2
13

D

Q53
2N7002_SOT23

S

D

S

+5VS+3VS

D

S

V_ON 51

VS_ON 51,52,53

1 2
13

R505
@470_0805_5%

2

G

Q51
@2N7002_SOT23

R507
@470_0805_5%

SUSPSUSP

2

G

Q54
@2N7002_SOT23

+2.5VS

D

S

SUSP19,53

R184
@470_0805_5%

1 2
13

2

G

Q11
@2N7002_SOT23

10K_0402_5%

SUSP

R759

SUSP

+5VALW

R501
10K_0402_5%

1 2
13

D

2

1 2

Q52

G

2N7002_SOT23

S

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND

PROPRIETARY NOTE

A

B

TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

POWER CONTROL CKT

Size Document Number Rev

B

Sapporo 300P

Date: Sheet

星期一

01, 2003

十二月

E

of

42 57,

0.3

A

B

C

D

E

FAN CONN. 1

BATT1

-+

RTCBATT

+RTCVCC

12

SYS_PWROK 7,24

1 2

4

1 2

R268

U19

10K_0402_5%

NC7SZ14M5X

13

D

SYSON40,42,51

U20

CD1#

VCC

D1

CD2#

CP1

D2

SD1#

CP2

Q1

SD2#

Q1#

Q2

GND

Q2#

74LCX74

D_SET_S4

Title

Size Document Number Rev

Date: Sheet

2

G

Q16

2N7002_SOT23

14
13
12
11
10
09
08

S

RTCVREF

C405 0.1U_0402_10V6K

1 2

Compal Electronics, Inc.

Power OK/Reset/RTC battery/Lid Switch/Int. KB

Sapporo 300P

星期一

, 01, 2003

十二月

1 2

1 2

R679
10K_0402_5%

D38
1N4148_SOT23

E

B

2

B

2

B

+5VALW

C

E

+5VALW

C

E

1

FMMT619_SOT23
Q71

3

FAN1

12

D8
1N4148_SOT23

@1000P_0402_50V7K

1

FMMT619_SOT23
Q10

3

FAN2

12

D5
1N4148_SOT23

@1000P_0402_50V7K

+5VALW

2

B

2

1

C795

1000P_0402_50V7K

+5V

12

D7

1SS355_SOD323

2

2

C791

1

1

12

D3

1SS355_SOD323

2

1

FAN2-1

2

1

C793

1

C

FMMT619_SOT23
Q12

E

3

12

D6

1N4148_SOT23

1 2

R695 10K_0402_5%

12

C287
10U_1206_16V4Z

JP25

1
2
3
4

ACES_85205-0400

C792
1000P_0402_50V7K

12

C249
10U_1206_16V4Z

JP23

1
2
3

ACES_85205-0300

C794
1000P_0402_50V7K

12

D4

1SS355_SOD323

C779

4.7U_0805_10V4Z

1U_0805_25V4Z

S4_LID_SW#44

12

C257
10U_1206_16V4Z

JP22

1
2
3

ACES_85205-0300

12

C

R587

180K_0402_5%

C692

100K_0402_5%

RB751V_SOD323

2 1

12

RB751V_SOD323

R696
100K_0402_5%

Power ON Circuit

+3VS

+3V +3V

12

2

1

R275

D15

D40

U55D

SN74LVC14APWLE_TSSOP14

14

P

9

O8I

G

+3V POWER +3V POWER

7

RTCVREF RTCVREF RTCVREF RTCVREF

12

12

R271
100K_0402_5%

1 2

C411 1U_0603_10V6K

13

D

21

2

G

S4_LATCH41

RTCVREF

+3VALW

S4_SATA40

S

1 2

R276
10K_0402_5%

C780

0.1U_0402_16V4Z

1 2

Q18
2N7002_SOT23

1 2

R274
10K_0402_5%

11

12

R270
680K_0402_5%

RTCVREF

2 1

RB751V_SOD323

FAN_DET 40

14

U55E
SN74LVC14APWLE_TSSOP14

P

10

O

I

G

7

12

1 2

R273
10K_0402_5%

1

C413
@1U_0805_16V7K

2

D14

D

R588
100K_0402_5%

D13

1N4148_SOT23

2

1 2

C412 1U_0805_16V7K

1
2
3
4
5
6
7

C406 0.1U_0402_10V6K

5

3

VS

1 2

C303

1 1

R211

10K_0402_5%

EN_DFAN1

12

R210

EN_DFAN140

8

P

3

+IN

2

-IN
G

4

1 2

0.1U_0402_16V4Z
U7A

EN_FAN1

1

OUT

LM358A_SO8

8.2K_0402_5%

1 2

R705
100_0402_5%

2

C782
@0.1U_0402_16V4Z

1

+3VS

R529 10K_0402_5%

FAN_SPEED140

FAN CONN. 2

2 2

EN_DFAN240

EN_DFAN2

R202

10K_0402_5%

12

FAN CONN. 3

3 3

+3VALW

EN_DFAN3

R207

A

12

1 2

R707
10K_0402_5%

EN_DFAN340

4 4

EN_FAN2

5

+IN

6

-IN

1 2

R201

2

G

@0_0402_5%

U7B

OUT

LM358A_SO8

8.2K_0402_5%

13

D

S

EN_FAN2

7

+5VALW

12

2SA1036K_SOT23

Q73
2N7002_SOT23

R205

1 2

@100_0402_5%

1 2

R200
100_0402_5%

R681
10K_0402_5%

Q69

2

C256

0.1U_0402_16V4Z

1

+3VS

R541 10K_0402_5%

FAN_SPEED240

+12VALW

12

1 2

3

2

B

C

1

C260

0.1U_0402_16V4Z

1 2

+RTCBATT

+RTCBATT

12

3

C607

0.1U_0402_16V4Z

2

G

2

G

E

1

2

13

D

S

13

D

S

D27
BAS40-04_SOT23

CHGRTC

ON/OFFBTN# 44,46

Q17
2N7002_SOT23

Q19
2N7002_SOT23

of

43 57

0.3

RTC Battery

5

4

3

2

1

1

2

3

R560
100K_0402_5%

51ON#

E

LID Switch

SW1

3

4

+3VALW

HORNG CHIH

(DIFFERENT BETWEEN MPU-101-81A)

1

2

Power Button

ON/OFF 40
51ON# 45,47

12

C687

1 2

1000P_0402_50V7K

D34

RLZ20A_LL34

INTERNET_BTN#

EMIAL_BTN#

D10

1

DAN202U_SC70

D11

1

DAN202U_SC70

31

E

47K

B

10K

C

+5VS

31

E

47K

10K

C

INTERNET#

2

51ON#

3

EMAIL#

2

51ON#

3

Q42
DTA114YKA_SOT23

2

R465 200_0402_5%

Q13
DTA114YKA_SOT23

B

2

R216 200_0402_5%

INTERNET# 40

EMAIL# 40

CD_FDD_LED# WL_BT_LED#

CD_FDDLED# WL_BTLED#

12

HDD_LED#

HDDLED#

12

CD_FDD_LED# 41 WL_BT_LED# 41

HDD_LED# 41

+5VS

POWER_ON_LED45

PWR_SUSPLED#_145

S4_LID_SW#43

LID_SW#40

D D

C C

B B

CIR_LID_SW#46

+3VALW

ON/OFFBTN#43,46

EC_ON40,46

2N7002_SOT23

R656 100K_0402_5%

12

12

J2 JOPEN

12

J3 JOPEN

ON/OFFBTN#

+3VALW

1 2

EC_ON

13

D

Q55

S

R554

4.7K_0402_5%

LID_SW#

1 2

R555
33K_0402_5%

DTC124EK_SOT23

2

G

D2

2

1

3

DAN202U_SC70

D1

@DAN217_SOT23

D33

1

DAN202U_SC70

22K

2

B

22K

Q58

+3VALW

1 2

2
3

13

C

Button FPC Conn.

INTERNET_BTN#
EMIAL_BTN#

+3VALW

KSI440

KSO1741,45

+5V+5VS

31

E

47K

10K

C

R466 200_0402_5%

Q43
DTA114YKA_SOT23

B

2

TV_OUT_EN#

KSO17

12

Power FPC Conn.

WL_BTLED#

R215

12

SDLED#

200_0402_5%

+5VALW

CD_FDDLED#
HDDLED#
ON/OFFBTN#
POWER_ON_LED

JP6

6
5
4
3
2
1

ACES_85201-0605

ACES_85201-1405

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

JP4

SDLED#

13

D

SDLED

A A

SDLED28

2

Q56

G

2N7002_SOT23

S

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Switchs & Connectors

Size Document Number Rev

B

Sapporo 300P

Date: Sheet of

星期一

01, 2003

十二月

44 57,

1

0.3

5

R296

POWER_ON_LED

12

200_0402_5%

PWR_LED#

2

R646

G

12

13

D

Q29

S

2N7002_SOT23

+5VALW

PWR_SUSP_LED# 41

1 2

R671 470K_0402_5%

1 2

R672 100K_0603_1%

C773 1U_0805_25V4Z

12

POWER_ON_LED44

PWRLED#

D D

200_0402_5%

PWR_LED#41

POWER/SUSP LED

C C

4

C772 1U_0805_25V4Z

12

2

-IN

3

+IN

12

R673

100K_0603_1%

4

G

1

OUT

P

LM358A_SO8
U60A

8

RB751V_SOD323

+5VALW

12

C775

0.1U_0402_16V4Z

3

12

R297
200_0402_5%

13

100K

100K

BATT_LOWLED#

2

DTC115EKA_SOT23

BATT_CHGILED#

12

R294

200_0402_5%

13

BATT_CHGI_LED#41 BATT_LOW_LED# 41

D37

2 1

R293 200_0402_5%

R678 200_0402_5%

BATT_CHGI_LED# BATT_LOW_LED#

DTC115EKA_SOT23
Q28

PWR_SU SPLED#

12

12

100K

2

100K

BATTERY CHGI/LOW LED

PWR_SUSPLED#_1 44

2

Q30

LED FPC Conn.

JP12

+5VALW

ACINLED#
PWR_SU SPLED#

BATT_LOWLED#
BATT_CHGILED#
EMAILLED#

1
2
3
4
5
6
7
8
9

10

ACES_85201-1005

1

+5V

31

Q31

47K

C

1 2

DTA114YKA_SOT23

B

EMAIL_LED#

2

10K

R295

200_0402_5%

EMAILLED#

EMAIL_LED# 41

E

EMAIL LED

ACINLED#PWRLED#

R298
200_0402_5%

12

13

D

S

ACIN

2

G

Q32
2N7002_SOT23

ACIN 24,40,47

+5VCDS +5VCDS

31

E

47K

B

2

10K

C

R282

1 2

12

D_MODE#

12

CDPLAY Board Conn.

+3VALW

KSO1741,44

KSI040
KSI140
KSI240
KSI340

DTA114YKA_SOT23

D_MODE#
R_CDON_LED#
R_MP3_LED#
KSO17
EC_PLAYBTN#
EC_STOPBTN#
EC_REVBTN#
EC_FRDBTN#

Q21

MP3_LED#CDON_LED#

200_0402_5%

4

51ON#

MODE#

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

Q20

200_0402_5%

R_CDON_LED#

D16

1N4148_SOT23
D17

1N4148_SOT23

100P_0402

DTA114YKA_SOT23

CDON_LED#41 MP3_LED#41

B B

51ON#44,47

MODE#40

A A

D_MODE#
R_CDON_LED#
R_MP3_LED#
KSO17
EC_PLAYBTN#
EC_STOPBTN#
EC_REVBTN#
EC_FRDBTN#

C783 @100P_0402_16V4Z
C784 @100P_0402_16V4Z
C785 @100P_0402_16V4Z
C786 @100P_0402_16V4Z
C787 @100P_0402_16V4Z
C788 @100P_0402_16V4Z
C789 @100P_0402_16V4Z
C790 @100P_0402_16V4Z

5

47K

B

2

10K

R283

R_MP3_LED#

ACES_85201-1405

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

JP11

31

E

C

Touch Pad Connector

1 2

TP_CLK
TP_DATA

12

C347
1U_0603_10V6K

1

C811
@180P_0402_50V8J

2
1

C812
@180P_0402_50V8J

2

3

+5VS

TP_CLK40

TP_DATA40

1

C810
180P_0402_50V8J

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

JP8

1
2
3
4
5
6

ACES 85201-0602_6P

D43
@DAN217_SOT23

TP_CLK

1

TP_DATA

1

@DAN217_SOT23

D44

2
3

3
2

+5VS

+5VALW POWER

4
5

SN74LVC08APW_TSSOP14

2

U60B

5

+IN

OUT

6

-IN

LM358A_SO8

13

U51D

OE#

I12O

SN74LVC125APWLE_TSSOP14

+3V POWER

14

U68B

P

A

6

O

B

G

7

Title

Size Document Number Rev

Date: Sheet of

ACIN LED

7

11

11

13

Compal Electronics, Inc.

Switchs & Connectors

B

Sapporo 300P

星期一

01, 2003

十二月

14

U61E

P

O10I

G

+3VALW POWER

SN74LVC14APWLE_TSSOP14

7

14

U61F

P

O12I

G

+3VALW POWER

SN74LVC14APWLE_TSSOP14

7

4

U67B

6

OE#

I5O

SN74LVC125APWLE_TSSOP14

(+3VALW)(+5VS)

45 57,

1

0.3

5

1

1

1

H37

SCREW 8.5X2.8

H42

SCREW

H47

SCREW

CF9
SMD40M80

1

CF28
SMD40M80

H23

SCREW 8.5x3.0

SCREW 8.5X2.8

SCREW 8.5X2.8

SCREW 8.5x3.0

1

1

1

CF13
SMD40M80

CF2
SMD40M80

H3

SCREW 8.5X2.8

H7

SCREW 8.5X2.8

1

H15

SCREW 8.5X2.8

1

H27

SCREW 8.5x3.0

1

H33

SCREW 8.5X2.8

1

H40

SCREW

1

H45

SCREW

1

CF7
SMD40M80

1

1

CF22
SMD40M80

1

SCREW 8.5X2.8

SCREW 8.5X2.8

SCREW 8.5x3.0

CF11
SMD40M80

1

CF27
SMD40M80

H2

SCREW 8.5x3.0

1

H6

1

H14

1

H26

1

H32

SCREW 8.5X2.8

1

H39

SCREW

1

H44

SCREW

1

CF8
SMD40M80

1

CF23
SMD40M80

CF20
SMD40M80

CF24
SMD40M80

H1

SCREW 8.5x3.0

1

D D

H5

SCREW 8.5X2.8

1

H13

SCREW 8.5X2.8

1

H25

SCREW 8.5x3.0

C C

1

H31

SCREW 8.5X2.8

1

B B

H43

SCREW

1

CF5
SMD40M80

1

A A

CF21
SMD40M80

SCREW 8.5X2.8

H8

SCREW 8.5X2.8

1

H16

SCREW 8.5X2.8

1

H28

SCREW 8.5x3.0

1

H36

SCREW 8.5X2.8

H41

SCREW

H46

SCREW

CF14
SMD40M80

1

CF26
SMD40M80

H4

1

H9

SCREW 8.5X2.8

H17

SCREW 8.5X2.8

H29

SCREW 8.5x3.0

1

1

1

CF6
SMD40M80

1

CF25
SMD40M80

H10

H18

H30

1

1

1

1

1

4

H24

SCREW 8.5x3.0

SCREW 8.5X2.8

SCREW 8.5X2.8

H34

SCREW 8.5x3.0

CF10
SMD40M80

1

CF4
SMD40M80

H11

H19

H21

SCREW 8.5x3.0

1

1

1

1

1

H12

SCREW 8.5X2.8

1

H20

SCREW 8.5X2.8

1

H35

SCREW 8.5x3.0

1

CIR_RCVEN
CIR_RCRST#
CIR_URXD
CIR_USCLK

H22

SCREW 8.5x3.0

1

C757 @10P_0402_50V8K

4MHZ_30PF_6W04000042

C758 @10P_0402_50V8K

RP86

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

CIR Reciever Board Conn.

+5V_CIR

RCIRRX

CF15
SMD40M80

1

CF12
SMD40M80

CF18
SMD40M80

1

CF17
SMD40M80

CF16
SMD40M80

1

CF1
SMD40M80

CF19
SMD40M80

1

CF3
SMD40M80

CIR_LID_SW#44

EC_RSMRST#24,40

1 2

X2

1 2

+5V_CIR

JP13

1
2
3
4
5
6

ACES_85201-0605

P2

R284
100K_0402_5%

3

+5V_CIR

P2

1 2

12

3

1

C447

0.1U_0402_16V4Z

2

1

C445
1U_0603_10V6K

2

1 2

R300 100K_0603_5%

13

D

2

G

Q24
2N7002_SOT23

S

12

R675
@1M_0603_5%

1 2

R676 0_0402_5%

CIR_RCRST#

RCIRRX

+5V_CIR

1

C446

0.1U_0402_16V4Z

2

+3VALW

EC_UTXD40

+3VALW

EC_URXD40

+3VALW

EC_USCLK40

C444 1U_0603_10V6K

1 2

R299 100K_0603_5%

13

D

2

G

Q23
2N7002_SOT23

S

U25

3

XIN

4

XOUT

6

RESET#

7

P21/AIN1

8

P20/AIN0

9

D3/K

10

D2/C

1

VDD

M34501M4-XXXFP

1 2

R285 @10K_0402_5%

EC_UTXD

1 2

R287 10K_0402_5%

EC_URXD

1 2

R292 10K_0402_5%

EC_USCLK

1 2

P12/CNTR

SI2301DS 1P_SOT23

1
2
3

P00
P01
P02
P03

P10
P11

P13/INT

D0
D1

CNVSS

VSS

Q26

MMBT3904_SOT23

D18
RB751V_SOD323

D19
RB751V_SOD323

2

3

U24

OUT
SNS

FB

SHDN

TAP

GND4ERR#

MIC2951

CIR_RCVEN

20

CIR_UTXD

19
18
17

16
15
14

CIR_UTXD

13

CIR_URXD

12

CIR_USCLK

11

1 2

5

R301 0_0402_5%

2

+3VALW

12

R286

10K_0402_5%

2

3 1

2 1

2 1

Q33

113

1

2

2

IN

2

1 2

R289 10K_0402_5%

8
7
6
5

RC_ON/OFFBTN

+5V_CIR

1 2

CIR_UTXD

CIR_URXD

CIR_USCLK

+5VALW

C442
1U_0603_10V6K

1 3

Q22

P2

DTC115EKA_SOT23

C443
1U_0805_25V4Z

1 2

R290 @10K_0402_5%

1 2

R291 0_0402_5%

+5V_CIR

C774
1U_0805_25V4Z

2

12

R677
47K_0402_5%

R670

10K_0402_5%

CIR_GATING#41

EC_RCVEN41

EC_RCRST#41

100K

100K

2

+5V_CIR

100K

EC_ON 40,44

100K

2

G

13

DTC115EKA_SOT23
Q67

CIR_GATING#

CIR_GATING#

R657
@10K_0402_5%

13

D

S

1

12

+5V_CIR

ON/OFFBTN# 43,44

Q25
2N7002_SOT23

12

R650

10K_0402_5%

2

CIR_RCVEN

3 1

Q64 MMBT3904_SOT23

12

R651

10K_0402_5%

2

CIR_RCRST#

3 1

Q65 MMBT3904_SOT23

1

FD2
FIDUCAL

1

1

FD3
FIDUCAL

1

1

FD1
FIDUCAL

1

FD4
FIDUCAL

5

1

1

1

1

1

FD5

FD6

FIDUCAL

FIDUCAL

1

1

1

1

1

1

4

1

1

1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Compal Electronics, Inc.

Title

CIR & Screws

Size Document Number Rev

B

Sapporo 300P 0.3

Date: Sheet

星期一

01, 2003

十二月

46 57,

1

of

A

PF1
12A_65VDC_451012

PCN1

1

1

6

G

5

G

4

1 1

2 2

CHGRTC

3 3

+1.25VSP

+CPUVIDP

+1.5VSP

4 4

+12VALWP

+1.25VS

G

3

G

SINGA_2DC-G313B200

PR200

1 2

200_0603_5%

+2.5VP

2

BATT+

CHGRTCP

51ON#44,45

PR20

1 2

200_0603_5%

PJP1

112

JUMP_43X118
PJP2

112

JUMP_43X118

PJP4

112

JUMP_43X118
PJP6

112

JUMP_43X39
PJP7

112

JUMP_43X118
PJP9

112

JUMP_43X39

PJP11

112

JUMP_43X118

2

PD4

RB751V_SOD323

1 2

PR11
200_0603_5%

100K_0603_5%

1 2

PR14 22K_0603_5%

RTCVREF

3.3V

12

10U_1206_10V4Z

2

2

2

2

2

2

2

A

21

PD1

EC10QS04_SOD106

12

12

PR13

S-812C33AUA-C2N-T2_SOT89

3

OUT

PC10

+2.5V

+1.25VS

+CPUVID

+1.5VS

+12VALW

+1.25VSFBVTT

12

12

12

PC1
1000P_0603_50V7K

N1

PC7

0.22U_1206_25V7K

PU2

2

IN

GND

1

13

PQ1
TP0610T_SOT23

2

12

PR16
200_0603_5%

12

PC9
1U_0805_25V4Z

(12A,480mils ,Via NO.=24)

(1.5A,120mils ,Via NO.= 6)

(150mA,40mils ,Via NO.= 2)

(6A,240mils ,Via NO.= 12)

(300mA,20mils ,Via NO.= 1)

(150mA,40mils ,Via NO.= 2)

1 2

C8B BPH 853025_2P

12

PC2

100P_0603_50V8J

VIN

PD3

1N4148_SOD80

1 2
12

PR9
33_1206_5%

12

0.1U_0603_25V7K

N2

PL1

PC8

2 1

PD6
RLZ16B_LL34

+VTT_GMCHP

B

VIN

12

PC3
1000P_0603_50V7K

VS

12

PC4
100P_0603_50V8J

MAINPWON48,50

+5VALWP

(6A,240mils ,Via NO.= 12)

+3VALWP

(6A,240mils ,Via NO.= 12)

+VGA_COREP

(5A,200mils ,Via NO.= 10)

(1.2A,60mils ,Via NO.= 3)

PJP3

112

JUMP_43X118

PJP5

112

JUMP_43X118

PJP8

112

JUMP_43X118

PJP10

112

JUMP_43X79

B

ACON49

2

2

2

2

12

PC5

1000P_0603_50V7K

2
3

+5VALW

+3VALW

+VGA_CORE

+VTT_GMCH

VIN

12

PR3

84.5K_0603_1%

12

PR6
20K_0603_1%

VIN

VS

PD7

1

RB715F_SOT323

C

VS

1 2

1 2

PR5 22K_0603_5%

12

PC6

0.1U_0603_25V7K

PD5

12

1N4148_SOD80

1 2

10K_0603_5%

PR17

PON

PD8

RLZ6.2C_LL34

2 1

PR1 1M_0603_1%

VS

8

PU1A

3

P

+

O

2

-

G

LM393M_SO8

4

PR8

12

10K_0603_5%

3.3V

1 2

PR10
1K_1206_5%

N3

1 2

PR12
1K_1206_5%

1 2

PR15
1K_1206_5%

6.0V

12

1

RLZ4.3B_LL34

RTCVREF

PU1B

7

O

PC12
1000P_0603_50V7K

12

12

PD2

12

1M_0603_1%

PR18

LM393M_SO8

8

5

P

+

6

-

G

4

12

PC13

0.1U_0603_16V7K

PR2

5.6K_0603_5%

10K_0603_5%

1 2

RTCVREF

3.3V

2N7002_SOT23

Precharge detector

15.34 15.90 16.48

13.13 13.71 14.20

THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

C

D

PR4
1K_0603_5%

12

PR7
10K_0603_5%

1 2

PACIN

ACIN 24,40,45

PACIN 49,50

Vin Detector

High 18.764 17.901 17.063
Low 17.745 16.903 16.038

B+

12

PR19
499K_0603_1%

12

12

PR22

PR23
215K_0603_1%

13

D

PQ2

2

G

S

Title

Size Document Number Rev

Date: Sheet

PR21
499K_0603_1%

PR24 47K_0603_5%

13

PQ3
DTC115EKA_SOT23

100K

2

100K

Compal Electronics, Inc.

DCIN & DETECTOR

星期一

Sapporo 300P

, 01, 2003

十二月

12

D

12

PC11

1000P_0603_50V7K

PACIN

+5VALWP

47 57

0.3

of

A

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 84 degree C
Recovery at 45 degree C

1 1

PCN2

10

GND

11

GND

SUYIN_200275MR009G116ZL_RV

2 2

BATT+
BATT+

SMD

SMC
GND­GND-

1
2

ID

B/I

TS

AB/I

4

TS_A

5

EC_SMDA

6

EC_SMCA

7
8
9

100_0603_5%

PR29

12

12

PR30
100_0603_5%

PR26

PR37

1K_0603_5%

ALI/NIMH#

3

12

1K_0603_5%

12

PR32
1K_0603_5%

PR35 25.5K_0603_1%

12

BAS40-04_SOT23@

1 2

PD11

PF2

15A_65VDC_451015

1 2

PR27 47K_0603_5%

1

PD9

BAS40-04_SOT23 @

3

21

+3VALWP

3

2

+3VALWP

VMB

C8B BPH 853025_2P

12

PC15
1000P_0603_50V7K

PL2

1 2

ALI/MH# 40

12

PC16

0.01U_0603_50V7K

BATT+

PC17

0.22U_0805_16V7K_V2

1

VL VS

10KB_0603_1%_TH11-3H103FT

PH1

12

12

12

PR33

3.32K_0603_1%

12

PR31

1 2

16.9K_0603_1%

TM_REF1

12

PC18

1000P_0603_50V7K

PC14

0.1U_0603_25V7K

3
2

PR34

100K_0603_1%

12

PR36
100K_0603_1%

8

P

+

-

G

4

1 2

PR28
47K_0603_1%
PU3A

1

O

LM393M_SO8

12

VL

VL

PR25
47K_0603_1%

1 2

1SS355_SOD323

PD10

MAINPWON 47,50

13

PQ4

100K

12

2

100K

DTC115EKA_SOT23

2

BATT_TEMPA 40

EC_SMB_DA1 40,41
EC_SMB_CK1 40,41

1

@

BAS40-04_SOT23

PD12

3

3 3

+5VALWP

4 4

1

PD13

BAS40-04_SOT23@

2

3

2

PH2 near main Battery CONN :

BAT. thermal protection at 79 degree C
Recovery at 45 degree C

12

PH2
10KB_0603_1%_TH11-3H103FT

1 2

PC19

0.22U_0805_16V7K_V2

PR40 14.7K_0603_1%

12

12

PR42

3.48K_0603_1%

TM_REF2

12

PC20

1000P_0603_50V7K

12

PR43
100K_0603_1%

5

+

6

-

1 2

PR39

47K_0603_1%

8

PU3B

P

O

G

LM393M_SO8

4

PR41

100K_0603_1%

VLVL

PR38
47K_0603_1%

1 2

PD14

7

12

VL

12

1SS355_SOD323

THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

BATTERY CONN / OTP

星期一

Sapporo 300P

, 01, 2003

十二月

D

0.3

48 57

A

B

C

D

P2

PQ5

S

D

S

D

S

D

G

D

SI4825DY_SO8

PD15

1 2

1
2
3
4

2

G

VIN

PACIN47,50

ACON47

12

PR45
10K_0603_5%

1 1

2 2

8
7
6
5

ACOFF#

1SS355_SOD323

PACIN

1 2

PR52
3K_0603_5%

ACON

IREF=1.31*Icharge

PQ6

1
2
3
4

12

PR46

SI4825DY_SO8

200K_0603_1%

12

PR49

150K_0603_1%

13

D

PQ10
2N7002_SOT23

S

PC26

0.1U_0603_16V7K

8

S

D

7

S

D

6

S

D

5

G

D

ADP_I40,53

12

12

PR54
10K_0603_1%

12

IREF=0.73~3.3V

IREF40

+3VALWP

12

PR63
47K_0603_5%

13

PQ12
DTC115EKA_SOT23

100K

FSTCHG40

3 3

2

100K

1 2

205K_0603_1%

PR58

CS

13

PQ11
DTC115EKA_SOT23

100K

2

100K

PR62

100K_0603_1%

P3 B+

12

PR53

33.2K_0603_1%

PC29

0.1U_0603_16V7K

12

12

PC33

0.1U_0603_16V7K

Iadp=0~5.8A

PR51 100K_0603_5%

PC27

1 2

4700P_0603_50V7K

PC30

1 2

1000P_0603_50V7K

PR60 10K_0603_5%

PR44

12

0.01_2512_1%(2W)

12

PR55

1 2

10K_0603_5%

PR56

1 2

1K_0603_5%

12

PU4

1

-INC2

2

OUTC2

3

+INE2

4

-INE2

5

FB2

6

VREF

7

FB1

8

-INE1

9

+INE1

10

OUTC1

11

OUTD

12

-INC1

MB3887_SSOP24

PR64

12

47.5K_0603_0.1%

+INC2

GND

VCC(o)

OUT

VCC

-INE3

FB3

CTL

+INC1

24

23

22

CS

21

20

19

VH

18

17

RT

16

15

14

13

PL3

1 2

C8B BPH 853025_2P

CS

1 2

PC28

0.1U_0603_25V7K

1 2

PR57
68K_0603_5%

PR61

1 2

47K_0603_5%

ACON

0.1U_0603_25V7K

1500P_0603_50V7K

12

PC21

4.7U_1210_25V6K

12

PR50
0_0603_5%

1 2

1 2

0.1U_0603_25V7K

1 2

PC31

PC32

1 2

4.2V

12

PC24

0.022U_0603_25V7K

PC25

PC22

4.7U_1210_25V6K

PR65

143K_0603_0.1%

12

PC23

4.7U_1210_25V6K

36

N18

578

22UH_SPC-1204P-220_2.9A_20%

12

PD16

RB051L-40_SOD106

12

B++

241

PQ8
SI4835DY_SO8

LXCHRG

PL4

1 2

PQ7

1
2
3

4

ACOFF#

1 2

13

100K

100K

PR47

10K_0603_5%

PQ9
DTC115EKA_SOT23

2

PR48

1 2

47K_0603_5%

CC=0.5~2.7A
CV=16.8V(12 CELLS LI-ION)

PR59

1 2

0.02_2512_1%

4.7U_1210_25V6K

12

PC34

PC35

4.7U_1210_25V6K

SI7447DP_SO8

5

ACOFF 40

12

12

PC36

4.7U_1210_25V6K

VIN

BATT+

VMB

12

PR69

PR66
340K_0603_1%

12

PR67
499K_0603_1%

12

12

PC38

0.01U_0603_50V7K

B

THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CHARGER

星期一

Sapporo 300P

, 01, 2003

十二月

D

49 57

0.3

OVP voltage : LI

4S3P : 17.4V--> BATT_OVP= 1.935V

(BAT_OVP=0.1111 *VMB)

+5VALWP

8

PU5A

3

P

+

1

BATT_OVP40

4 4

PC37

12

0.1U_0603_16V7K@

A

12

PR68

2.2K_0603_5%

0

2

-

G

LM358A_SO8

4

105K_0603_0.5%

5

D D

1 2

B+

HCB4532K-800T90_1812

4.7U_1210_25V6K@

C C

+3VALWP

PC52

150U_D2E_6.3VM_R18

B B

B+++

PL5

12

PC42

4.7U_1210_25V6K

10UH_SPC-1205P-100_4.5A_20%

0.012_2512_1%

1

1

+

+

PC53
150U_D2E_6.3VM_R18@

2

2

PR74

12

PC43

PL6

12

2 1

12

PD20
EP10QY03

12

PC50

47P_0603_50V8J

PR73
1M_0603_1%

1 2

3.57K_0603_1%

PR78

PQ13

1

D1

2

D1

S1/D2

3

G2

S1/D2

4

S1/D2

S2

SI4814DY_SO8

12

1 2

100P_0603_50V8J

PR80
10K_0603_1%

1 2

8

G1

7
6
5

PACIN47,49

PC54

SUSP#19,32,35,40,41,42,51,52,53 +5VALWP

+3.3V Ipeak = 6.66A ~ 10A

PC41

1 2

0.1U_0603_25V7K

PDH31

1 2

PR71
1_0603_5%

PLX3

PDL3

CSH3

PR77

10K_0603_5%@

10K_0603_5%

PON

4

BST31

PDH3

1 2

1 2

PR201

12

PR81
47K_0603_5%

12

PC60

0.047U_0603_16V7K

PD19

1SS355_SOD323

12

PC48

0.1U_0603_25V7K

PU6

25

BST3

27

DH3

26

LX3

24

DL3

1

CSH3

2

CSL3

3

FB3

10

SKIP#

23

SHDN#

7

TIME/ON5

28

RUN/ON3

12

PC56
680P_0603_50V8J

PR83
47K_0603_1%

12

PC61

0.047U_0603_16V7K

VS

12

1 2

22

V+

8

VL

3

2

1

VL

PC47

4.7U_1206_16V4Z

12

21

12OUT

VL

VDD

BST5

DH5

LX5
DL5

PGND

CSH5

CSL5

FB5
SEQ
REF

SYNC

RST#

GND

MAX1632_SSOP28

MAINPWON 47,48

3

PD18
DAP202U_SOT323

4
5
18
16
17
19
20
14
13
12
15
9
6
11

BST51

+12VALWP

12

PC49

4.7U_1206_16V4Z

12

PC55

4.7U_1206_16V4Z

2.5VREF

PC44

1 2

0.1U_0603_25V7K

PDH5

PLX5

10.5K_0603_1%

PC45

4.7U_1210_25V6K@

PR79

2

12

PR72

1 2

1_0603_5%

PDL5

12

12

PR82

10K_0603_1%

N4

B+++

12

PC46

4.7U_1210_25V6K

PDH51

12

PC59
100P_0603_50V8J

PC39

4.7U_1210_25V6K

1 2

12

PC40
470P_0805_100V7K

1 2

PR70 22_1206_5%

10uH_SDT-1205P-100-118_5A_20%

PQ14

1

D1

2

D1

3

G2

4

S2

SI4814DY_SO8

FLYBACKSNB

12

8

G1

7

S1/D2

6

S1/D2

5

S1/D2

PC57

150U_D2E_6.3VM_R18

PD17

EC11FS2_SOD106

PT1

1 4

12

PC51
47P_0603_50V8J

12

PR75
2M_0603_5%

1

PC58

+

2

150U_D2E_6.3VM_R18@

+5V Ipeak = 6.66A ~ 10A

1

3 2

CSH5

12

PR76

0.012_2512_1%

1

+

2

2 1

PD21

EP10QY03

A A

THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

5

4

3

INC.

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

5V/3.3V/12V

星期一

Sapporo 300P

, 01, 2003

十二月

1

of

50 57

0.3

A

B

C

D

+2.5V/+VTT_GMCHP

PL7

1 2

12

G1

8
7
6
5

PC69

4.7U_1210_25V6K

PD22

DAP202U_SOT323

PC70

12

0.1U_0603_25V7K

PR90

1 2

0_0603_5%@

1 2

PR91

0_0603_5%@

1 2

PR206

0_0603_5%

1 2

PR207

0_0603_5%@

1

2

1 2

PC65

1U_0805_25V4Z

3

PR86
3_0603_5%

MAX1845EEI_QSOP28

1 2

PR203

0_0603_5%

25
26
27

24
28

1
2

11

1 1

PQ17

1

D1

2

D1

S1/D2

+1.45V/+1.225V

+VTT_GMCHP

1

2 1

2N7002_SOT23

PC76

+

150U_D2E_6.3VM_R18

2

2

G

PQ23

2 2

3 3

PD27

EP10QY03

GMCH_SEL54

13

D

S

12

PR89

4.53K_0603_1%

PL9

5UH_SPC-06704-5R0_2.9A_30%

1 2

12

PR88

10K_0603_1%

12

PR96
10K_0603_1%

3

G2

S1/D2

4

S1/D2

S2

SI4814DY_SO8

VS_ON42,52,53

SUSP#19,32,35,40,41,42,50,52,53

ENLL5,54

VGATE24,53,54

PR84
0_0603_5%

1 2

12

12

4

PU7

BST1

V+

DH1
LX1

DL1
CS1

OUT1
FB1

ON1

GND

OVP

8

23

1 2

PR202

0_0603_5%@

PC79

0.22U_0805_16V7K_V2

PR85

20_0603_5%

PC68
1U_0603_10V6K

9

22

VDD

UVP

VCC

BST2

DH2

LX2
DL2

CS2

OUT2

FB2

ON2

PGOOD

TON

ILIM2
ILIM1

SKIP

REF

6

10

42.2K_0603_1%

220K_0603_1%

12

+5VALWP

12

21
19

18
17
20
16

15
14
12

7
5

13
3

PR99

12

PR100

12

100K_0603_1%

12

PC66

4.7U_1206_16V4Z

PR87
3_0603_5%

1 2

12

PR97

PC71

0.1U_0603_25V7K

12

PR98
100K_0603_1%

IRF7811A_SO8

12

4.7U_1210_25V6K

5

PQ15

S

4

2

578

3 6

241

PR94 0_0603_5%@

PR95 0_0603_5%

PC62

D8D7D6D

S1S3G

PQ16
FDS6672A_SO8

12

12

12

12

PC63

4.7U_1210_25V6K

PL8

2.2UH_SPC-1205P-2R2B_13A_30%

1 2

12

PD23

EC31QS04

SYSON 40,42,43

V_ON 42

12

PC64

HCB4532K-800T90_1812

4.7U_1210_25V6K

1

PC72

+

220U_D2_4VM

2

PR92
15K_0603_1%

1 2

12

PR93
10K_0603_1%

220U_D2_4VM

B+

+2.5V

1

+

PC73

2 1

2

+2.5VP

PD28

EP10QY03

2.5V OCP 11.84A ~ 21A

GMCH_SEL=0

GMCH_SEL=1

4 4

PRESCOTT

NORTHWOOD

A

VTT_GMCH=1.225V

OCP 1.92A ~ 3.71A

VTT_GMCH=1.45V OCP 1.98A ~ 3.78A

THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

B

INC.

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDR_2.5V/VTT_GMCH

星期一

Sapporo 300P

, 01, 2003

十二月

D

0.3

51 57

A

B

C

D

PL10

1 2

12

PC80

4.7U_1210_25V6K

1 1

PD24

DAP202U_SOT323

+1.5V

+1.5VSP

2.2UH_SPC-1205P-2R2B_13A_30%

1

1

470U_D2_2.5VM

2 1

PC90

+

2

PC91

+

470U_D2_2.5VM@

2

12

PR194

5.1K_0603_1%

12

PR195
10K_0603_1%

PD29

EP10QY03

2 2

PL11

1 2

1.5V OCP 6.9A ~ 8.72A

PQ18

8

G1

7

S1/D2

6

S1/D2

5

S1/D2

SI4814DY_SO8

1

D1

2

D1

3

G2

4

S2

SUSP#19,32,35,40,41,42,50,51,53

VS_ON42,51,53

SUSP#

VS_ON

PC88

0.1U_0603_25V7K

PR106

1 2

0_0603_5%@

PR107

1 2

0_0603_5%

12

PC81

4.7U_1210_25V6K

1

PC84

1U_0805_25V4Z

3

2

PR103

12

1 2

3_0603_5%

25

26

27

24

28

1
2

11

MAX1845EEI_QSOP28

PR205

1 2

100K_0603_1%

PR101
0_0603_5%

1 2

12

PC87
1U_0603_10V6K

4

PU8

BST1

V+

DH1
LX1

DL1
CS1

OUT1
FB1

ON1

GND

OVP

8

23

PR204

1 2

43K_0603_1%

0.22U_0805_16V7K_V2

1845VCC

12

22

SKIP

6

PC95

VCC

9

UVP

BST2

OUT2

PGOOD

ILIM2
ILIM1

REF

10

12

VDD

DH2

DL2
CS2

FB2

ON2

TON

PR102

12

20_0603_5%

21
19

18
17

LX2

20
16

15
14
12

7
5

13
3

PR108

86.6K_0603_1%

1 2

PR117

1 2

16.2K_0603_1%

100K_0603_1%

+5VALWP

PR118

12

PC85

PR104

3_0603_5%

1 2

12

4.7U_1206_16V4Z

PC89

0.1U_0603_25V7K

12

PR112 0_0603_5%@

1 2

PR109 0_0603_5%

12

PR119
100K_0603_1%

PC82

12

4.7U_1210_25V6K

PQ19

1

D1

2

D1

3

G1

4

G2

5

S2

6

S2

7

S2

SI4308DY_SO14

SUSP#

12

VS_ON

14

S1

13

S1

12

D2

11

D2

10

D2

9

D2

8

D2

HCB4532K-800T90_1812

PC83

12

4.7U_1210_25V6K

PL12

2.2UH_SPC-1205P-2R2B_13A_30%

1 2

2200P_0603_50V7K

POWER_SEL16

2N7002_SOT23

PC156
4700P_0603_50V7K

PC157

2

G

PQ20

B+

+1.2V/1.0V

12

12

12

13

D

S

PR113

2K_0603_1%

12

PR114
10K_0603_1%

12

PR208

1

+

470U_D2_2.5VM @

2

8.66K_0603_1%@

470U_D2_2.5VM

1

PC94

+

PC93

2

+VGA_COREP

PD30

EP10QY03

2 1

3 3

NV36

POWER_SEL=1 VOUT=1.27V OCP 7.1A ~ 13.5A

POWER_SEL=0 VOUT=1V OCP 7A ~ 13A

4 4

THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

星期一

, 01, 2003

十二月

PR113=2K_0603_1%

Unpop PR208

VGA_CORE/1.5V

Sapporo 300P

D

0.3

52 57

5

4

3

2

+3VS

1

145W THROTTLING
120W REVOVERY

D D

1 2

VL

PR123

ADP_I40,49

249K_0603_1%

PR124

100K_0603_1%

1 2

64.9K_0603_1%

PR122

12

12

PC98
1000P_0603_50V7K

1 2

PR120 1M_0603_1%

VS

12

PC97

0.1U_0603_25V7K

8

3

P

+

1

O

2

-

G

PU9A
LM393M_SO8

4

VL

12

PR121
365K_0603_1%

12

PC99
10P_0603_50V8J

13

D

S

PQ21
2N7002_SOT23

2

G

H_PROCHOT# 5,7

+3VS

+CPU_CORE

t = -RC(1-Vb/Va)

1 2

R658 200K_0603_1%

1 2

R659 10K_0603_1%

0.33U_0805_10V7F

C759

+CPU_CORE

VGATE24,51,54

8

Va

Vb

12

1

2

PU9B

5

P

+

7

O

6

-

G

LM393M_SO8

4

R660
100K_0603_1%

1 2

R703 @0_0402_5%

1 2

R704 @0_0402_5%

1 2

R702 0_0402_5%

12

100K_0603_5%
R422

CK409_PWRGD# 15

13

D

S

Q70
@2N7002_SOT23

2

G

+3VALWP

+3VALWP

PR125

C C

12

PR110

100K_0603_5%

+2.5VP

B B

PR111
105K_0603_0.5%

12

PR115

105K_0603_0.5%

PQ46

1 2

1 2

2N7002_SOT23

2

G

13

D

S

12

PC104

12

0.1U_0603_16V7K

SUSP19,42

PR196 0_0603_5%@

PR197 0_0603_5%

12

PC92

0.1U_0603_16V7K

REMOTE SENSE

PR126

1 2

5.1_0603_5%

PU10

VIN1PVIN

2

GND

3

SD
VREF4VFB

CM3718_PSOP8

0_1206_5%

LX

PGND

1 2

PC100

1U_0603_10V6K

5UH_SPC-06704-5R0_2.9A_30%

8
7
6
5

FB_VDD+

PR129

1 2

1K_0603_5%

1 2

12

PL13

PR128

1 2

12

PC101

4.7U_1206_16V4Z

100K_0603_5%

1 2

PC102

470P_0603_50V8J

PC96

0.1U_0603_16V7K

+1.25VSP

1

12

+

PC103
220U_D2_4VM

2

13

PQ22

D

2

G

S

PR116

@

499K_0603_1%

1 2

THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

3

INC.

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDR_1.25V/CLOCK THROTTLING

星期一

Sapporo 300P

, 01, 2003

十二月

1

0.3

53 57

PR198

SUSP#19,32,35,40,41,42,50,51,52

VS_ON42,51,52

A A

5

1 2

0_0603_5%@
PR199

1 2

0_0603_5%

4

2N7002_SOT23

A

1 1

PR131

0_0603_5%@

1 2

PR133

0_0603_5%

PR135

VID_PWRGD5

PR161

0_0603_5%

1 2

0_0603_5%@

PR136

0_0603_5% @

12

VR_ON40

PM_DPRSLPVR24

STP_CPU#15,24

2 2

3 3

+3VALWP

12

PR137

0_0603_5%@

100P_0603_50V8J

1.2VDD

12

PC115

4.7U_1206_16V4Z

PR165
0_0603_5%

1 2

1 2

12

+5VALWP

12

PC109

PR134
0_0603_5%

PR140

0_0603_5%@

12

PR155

45.3K_0603_1%

12

PR167
100K_0603_5%

1 2

ENLL5,51

12

PR141
475_0603_1%

12

PR143

27.4K_0603_1%

10K_0603_1%

1 2

PU12

1

IN

4

PG

3

EN

MIC5258_SOT23-5

H_VID45
H_VID35
H_VID25
H_VID15
H_VID05

H_VID55

12

PR149

12

PR154

32.4K_0603_1%

OUT

GND

PR142

69.8K_0603_1%

7

LM358A_SO8

1 2

5

2

B

Frequency Select

PU5B

5

+

0

6

-

12

PR147

100K_0603_5%

10K_0603_5%@

12

+CORE_VCC

+3VALWP

PR151

1 2

+CPUVIDP

PC116

4.7U_1206_16V4Z

+5VALWP

+5VS

12

12

12

@

PH3

330K_0402_5%

1 2

PQ26

13

2N7002_SOT23

2

G

PR210

0_0402_5%@

PR138
1K_0603_1%

PU11

32

VCC

1

VID4

2

VID3

3

VID2

4

VID1

5

VID0

6

VID12.5

34

ENLL

33

DRSEN

35

DSEN#

10

OCSET

11

SOFT

9

DSV

36

FS

37

DRSV

38

VR-TT#

40

NTC

12

GND

19

GND

ISL6247_MLFP40

BOOTSELECT4

PR209
0_0402_5%

12

PC106
1U_0603_10V6K

PC107

12

1U_0603_10V6K

PR145

0_0603_5% @

1 2

220P_0603_50V8J

12

PC112

NOW DISABLE THIS FUNCTION, POP 330K_0402_5%

Panasonic ERTJ0EV334J (0402)
Locate this NTC resistor on
PCB between phase 2 and 3
for thermal compensation.

D

S

PQ25

2

TP0610T_SOT23

GMCH_SEL51

12

PR130

80.6K_0603_1%

RAMPS

PGOOD

PWM1

ISEN1+

ISEN1-

PWM2

ISEN2+

ISEN2-

PWM3

ISEN3+

ISEN3-

PWM4

ISEN4+

ISEN4-

COMP

FB

NC

VDIFF
VSEN
VRTN

OFS

PR152

1.2M_0603_5%

13

340K_0603_1%

PR164

22K_0603_5%

PR166
100K_0603_5%

C

7
39

25
24

23

26
27

28

20
21

22

31
30

29

15

13

14
16

17
18

8

PR156

12

12

B+

1 2

PR146

0_0603_5%

27K_0603_5%

1 2

C

2

B

E

3 1

2

Battery Feed
Forward

PR132

12

10K_0603_5%

PR139

12

0_0603_5% @

12

+CORE_VCC

Place close to IC

0.1U_0603_16V7K
PC113

1 2

PR158

PR157

5.1K_0603_1%

1 2

1 2

13

D

S

PQ27
2N7002_SOT23

G

PQ28
MMBT3904_SOT23

+CORE_VCC

12

PC108 1000P_0603_50V7K

12

PC110

12

PC111
1000P_0603_50V7K@

2N7002_SOT23
PC114
1U_0603_10V6K

PR162

12

0_0603_5%

PR163

12

0_0603_5%@

VGATE 24,51,53

PWM1 55
ISEN1+ 55
ISEN1- 55
PWM2 55
ISEN2+ 55
ISEN2- 55
PWM3 56
ISEN3+ 56
ISEN3- 56
PWM4 56
ISEN4+ 56

PR144

20K_0603_1%

1 2
12

1000P_0603_50V7K

@

PR148
0_0603_5%@

PR150 2.26K_0603_1%

PQ24

PR159 0_0603_5%

PR160
0_0603_5%@

ISEN4- 56

12

1 2

D

S

13

G

2

12

12

Place near +VCC_CORE
output capacitor

VSSSENSE 5

D

PR153

8.45K_0603_1%

+CPU_CORE

VCCSENSE 5

12

Remote
Sensing

4 4

BOOTSELECT=1

BOOTSELECT=0

A

B

PRESCOTT

NORTHWOOD

THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CPU_CORE_Controller

星期一

Sapporo 300P

, 01, 2003

十二月

D

54 57

0.3

A

B

C

D

PC117

12

0.22U_0805_16V7K_V2

PR168
3_0603_5%

1 1

+CORE_VCC

1 2

6

PWM154

PR171
499K_0603_1%

1 2

PR170

0_0603_5%

PC123

0.1U_0603_16V7K

12

1 2

1U_0805_25V4Z

PC124

3
7
4

1 2

PU13

BOOT

VCC
PWM

UGATE

EN

PHASE
LGATE

GND

ISL6207CB-T_SO8

2

PR169

N5

1

0_0603_5%

8
5

SI4362DY_SO8

CPU_DRIVE_EN

12

PHASE1

PQ31

N6

5

4

5

4

PQ29

D8D7D6D

S1S3G

S

2

IRF7811W_SO8

D8D7D6D

S1S3G

S

2

5

PQ30

D8D7D6D

S1S3G

S

IRF7811W_SO8

4

2

5

PQ32

D8D7D6D

4

SI4362DY_SO8

S1S3G

S

2

PC120

1 2

4.7U_1210_25V6K

220P_0603_50V8J

4.7U_1210_25V6K

12

PC121

PR172

68_0805_5%

PC126

4.7U_1210_25V6K

12

PC122

12

12

1

+

PC118

22U_23V_M

2

1

+

PC119

22U_23V_M

2

0.6U_HK_AE26A0R6_26A_25%

PR173

39K_0603_1%

CPU_B+

1 2

C8B BPH 853025_2P

PL15

1 2

12

PL14

B+

PC125

12

0.01U_0603_50V7K

N7

ISEN1-54

PR176

499K_0603_1%

1 2

ISEN1+54

PC127

PC131

1U_0805_25V4Z

PR174
3_0603_5%

1 2

1 2

1 2

PU14

6

VCC

3

PWM

UGATE

7

EN

PHASE

4

LGATE

GND

ISL6207CB-T_SO8

0.22U_0805_16V7K_V2

2

BOOT

PR175

N8

1

0_0603_5%

8
5

SI4362DY_SO8

12

PHASE2

PQ35

N9

5

4

5

4

PQ33

D8D7D6D

S1S3G

S

IRF7811W_SO8

2

D8D7D6D

S1S3G

S

2

5

PQ34

D8D7D6D

4.7U_1210_25V6K

S1S3G

S

IRF7811W_SO8

4

2

5

PQ36

D8D7D6D

4

SI4362DY_SO8

S1S3G

S

2

2 2

PWM254

3 3

PC128

CPU_B+

12

4.7U_1210_25V6K

68_0805_5%

220P_0603_50V8J

PC129

12

PR177

PC132

12

PC130

4.7U_1210_25V6K

12

12

Local Transistor
Swtich Decoupling

PL16

1 2

0.6U_HK_AE26A0R6_26A_25%

PR178

12

39K_0603_1%

PH4

12

820B_0603_5%_ERAV33J821V

PC133

12

0.01U_0603_50V7K

+CPU_CORE

N10

ISEN2-54
ISEN2+54

Local Transistor
Swtich Decoupling

PH5

12

820B_0603_5%_ERAV33J821V

4 4

THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CPU_CORE_Power stage 1

星期一

Sapporo 300P

, 01, 2003

十二月

D

0.3

55 57

A

B

C

D

1 1

+CORE_VCC

PR179
3_0603_5%

1 2

6

1 2

PR184
3_0603_5%

1 2

3
7
4

PWM354

PR181

499K_0603_1%

1 2

2 2

ISEN3-54

CPU_DRIVE_EN

ISEN3+54

PC138

1U_0805_25V4Z

6

PWM454

3
7

499K_0603_1%

3 3

PR186

PC145

1 2

1U_0805_25V4Z

4

1 2

PC134

1 2

0.22U_0805_16V7K_V2

PU15

BOOT

VCC
PWM

UGATE

EN

PHASE
LGATE

GND

ISL6207CB-T_SO8

PC141

1 2

0.22U_0805_16V7K_V2

PU16

BOOT

VCC
PWM

UGATE

EN

PHASE
LGATE

GND

ISL6207CB-T_SO8

2

PR180

N11

1

0_0603_5%

8
5

2

PR185

N14

1

0_0603_5%

8
5

N13

12

PHASE3

12

PHASE4

5

4

5

4

5

4

5

4

PQ37

D8D7D6D

S1S3G

S

IRF7811W_SO8

2

N12

PQ39

D8D7D6D

SI4362DY_SO8

S1S3G

S

2

PQ41

D8D7D6D

S1S3G

S

IRF7811W_SO8

2

N15

PQ43

D8D7D6D

SI4362DY_SO8

S1S3G

S

2

5

4

5

4

5

4

5

4

PQ38

D8D7D6D

S1S3G

S

IRF7811W_SO8

2

PQ40

D8D7D6D

SI4362DY_SO8

S1S3G

S

2

PQ42

D8D7D6D

S1S3G

S

IRF7811W_SO8

2

PQ44

D8D7D6D

SI4362DY_SO8

S1S3G

S

2

PC135

12

4.7U_1210_25V6K@

4.7U_1210_25V6K

68_0805_5%

220P_0603_50V8J

CPU_B+

4.7U_1210_25V6K

12

PC142

4.7U_1210_25V6K

68_0805_5%

220P_0603_50V8J

PC140

PR187

PC147

PC136

PR182

12

12

PC143

12

12

12

12

PC137

12

4.7U_1210_25V6K

12

PC144

4.7U_1210_25V6K@

PL17

12

0.6U_HK_AE26A0R6_26A_25%

PR183

12

39K_0603_1%

Local Transistor
Swtich Decoupling

PL18

1 2

0.6U_HK_AE26A0R6_26A_25%

PR188

12

39K_0603_1%

PC139

12

0.01U_0603_50V7K

PH6

12

820B_0603_5%_ERAV33J821V

PC146

12

0.01U_0603_50V7K

+CPU_CORE

N16

CPU_B+

ISEN4-54
ISEN4+54

PH7

1 2

820B_0603_5%_ERAV33J821V

4 4

THIS SHEET OF EN GINE ERI NG DR AWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION I T CONTA INS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,

A

B

INC.

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CPU_CORE_Power stage 2

星期一

Sapporo 300P

, 01, 2003

十二月

D

0.3

56 57

DBQ02 PIR LIST

************* Rev0.1 PIR List **************

10/28/2003 Writen by Jason Shih
Change from DBQ01 LA-2041

P16:New add R749, R750, R751, R752, R753, R754

Add @ to R41, R343, R701

P17:R358, R389 change from 1K to 10K

P18:Add @ to R71, R76, R112, R348, R349

Add @ to C23, C55
Change R385 from 0_0402 to 49.9_0603

P19:New add U63

Add @ to U63
New add C826, C827, C828, C829, C830, C831
Add @ to C826, C827, C828, C829, C830, C831

P20:New add R722 - R733 (12pcs)

New add C832 ~ R839 (8pcs)

P21:New add R734 - R745 (12pcs)

New add C840 - R847 (8pcs)

P22:New add R746, R747, R748

************* Rev0.2 PIR List **************

11/03/2003 Writen by Jason Shih

P5:R18 del @
P5:R19 del @, Change to 680_0603_1% ----------------------- for Prescott CPU

P22:New add R755, R756, R757

P39:R487 change from 0_0402 to 8.2K_0402

P41:Add new R758, R759

************* Rev0.2A PIR List **************

11/13/2003 Writen by Jason Shih
Add HDTV, SW-DJ, Yamaha AC97 Codec Function

P23:HDTV Function (NewPage)

P32:New add R787, 789, R790, C881, C882, C883

P34:JP10 change from 16pin to 20pin

JP10.18 new add SPDIF signal

P35: -- Del OZ-168 peripheral circuit --

Del U46, X4, D31, Q14, Q49, Q50, L34, L35, RP83, RP84
Del R228, R235, R237, R244, R495, R496, R497, R498, R506, R509, R510, R514, R518, R532, R533, R534, R538, R539
Del C365, C641, C642, C651, C659, C662, C673

Add new U66, U68, Q75, Q76, Q77, D48
Add new R791, R792, R793, R794, R795
Add new C884, C885, C886, C887, C888, C889, C890, C891, C892, C893, C894, C895, C897

P36:Del RP139, U47, U48, C645

Add new RP150, RP151, U67, U68, Q78
Add new R796, R797, R798, R799, R800
JP28.60 change from +5VCD to +5VCDS

P39:PR3, PR87 change from 10P8R to 8P4R

Add new PR149
Add new R801, R802, R803, R804

PWR PIR LIST

EVT

Reason for changepage Modify list

47 Change DC-jack from 3D to 2.5D Change PCN1 from 2DC-S113L200 to 2DC-G313B200

11/14/2003 Writen by Jason Shih

P22:R16 change from 100_0402 to 200_0402

11/18/2003 Writen by Jason Shih

P6:Add @ to C481, C482, C493, C494
P34:Add @ to R662

R604 del @

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

DBQ01 PIR LIST
Sapporo 300P

星期一

01, 2003

十二月

0.3

57 57,