Compal QAQ10, QAQ11 Schematic

5

4

3

2

1

D

D

Compal Confidential

C

C

QAQ10/11

LA-8581P

B

Intel Ivy Bridge/Pather Point

UMA&OPT

2012-04-23 Rev 1.0

SchematicREV1.0

B

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

Friday, August 24, 2012

Friday, August 24, 2012

Friday, August 24, 2012

1 60

of

1 60

of

1 60

of

1

A

B

B

B

Compal Confidential
Model Name : QAQ10/11
File Name : LA-8581P

D

C

port 4

PCIeMini Card
WLAN &BT

USB Port 13

PCIe Port 2

page 36

B

USB&Function/B

page 43

Power/B

page 43

Touch Pad/B

page 43

5

PEG(DIS)

4

PCI-E 2.0x16 5GT/s PER LANE100MHz

VGA (DDR3)

NVIDIA N13P-GLP, 128bit with 1GB/2GB

page 13,14,15,16,17,18,19,20,21

page 22

CRT

HDMI Conn.

page 24

port 2 port 1

port 6

PCIe Mini Card WWAN
&SIM

PCIe Port 5

USB Port 12

JMB385/388 Card Reader
&1394
PCIe Port 6

page 37

page 23

LCD Conn.

PCI-Express x 8 (ARD PCIE2.0 2.5GT/s)

port 3

page 36

Express Card
PCIe Port 3

USB port 8

port 5

page 39

RTL8111E&Intel 82579

PCIe port 1

133MHz

OPT & UMA

OPT & UMA

page 35,42

RJ45

page 39

SIO

Page 47

Mobile

37.5mm*37.5mm

100MHz

Touch Pad

3

Ivy Bridge

CPU Dual Core

Socket-rPGA988B/989

page 5,6,7,8,9,10

DMI X4

Intel
Panther Point-M

989pin FCBGA

HM76

page 25 ~ 32

25mm*25mm

LPC BUS

33MHz

ENE KB9012

page 41

page 43

Memory BUS(DDRIII)

FDI

USB

SATA port 0

5V 1.5GHz(150MB/s)

SATA port 2

5V 1.5GHz(150MB/s)

SATA port 4

5V 1.5GHz(150MB/s)

TPM 1.2

Int.KBD

page 40

2

Dual Channel

1.5V DDRIII 1333/1600

USB/B Right

USB port 3,4

page 44

Smart Card

USB port 2

page 39

SATA HDD0

SATA ODD

E-SATA

USB port 3

HD Audio

page 34

204pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

USB Left Port

USB port 1,9

page 43

Int. Camera

USB port 10

page 23

page 34

page 34

page 43

3.3V 24.576MHz/48Mhz

Int.

page 38

MIC

USB3.0

USB port 0

Finger Print

USB port 11

HDA Codec

ALC259

page 38

MIC CONN

page 38

page 40

page 40

1

page 11,12

BIOS ROM

HP CONN

page 38

Fan Control

page 6

page 33

SPK CONN

page 38

D

C

B

RTC CKT.

page 25,47

A

DC/DC Interface

page 45

Power Circuit DC/DC

page 46,47,48,49,50,51 ,52,53,54,55,56,57,58

5

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

4

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

2 60Friday, August 24, 2012

2 60Friday, August 24, 2012

2 60Friday, August 24, 2012

1

B

B

B

of

of

of

3

+5VALW

+5VS

+1.8VS

SI4800

4

SUSP

SUSP#

DESIGN CURRENT 5A

DESIGN CURRENT 4A

DESIGN CURRENT 2A

5

B+

Ipeak=5A, Ima x=3.5A, Iocp min=7.9

N-CHANNEL

D

SY8033BDBC

2

1

D

RT8205

Ipeak=5A, Ima x=3.5A, Iocp min=7.7

WOL_EN#

P-CHANNEL

N-CHANNEL

C

SUSP

SI4800

VR_ON

AO-3413

P-CHANNEL

AO-3413

P-CHANNEL

AO-3413

P-CHANNEL

AO-3413

ISL95831CRZ

DESIGN CURRENT 5A

DESIGN CURRENT 330mA

DESIGN CURRENT 4A

VGA_ENVDD

DESIGN CURRENT 1.5A

BT_PWR#

DESIGN CURRENT 180mA

PCIE_OK

DESIGN CURRENT 100mA

DESIGN CURRENT 52A

+3VALW

+3V_LAN

+3VS

+LCD_VDD

+BT_VCC

+3VS_DELAY

+CPU_CORE

C

DESIGN CURRENT 30A

+GFX_CORE

DGPU_PWR_EN / SUSP#

APW7138

SUSP#

G5603RU1U

B

SYSON

G5603RU1U

Ipeak=18A, Im ax=12.6A, Ioc p min=19.8

Ipeak=15A, Im ax=10.5A, Ioc p min=16.5

DESIGN CURRENT 26A

DESIGN CURRENT 18A

DESIGN CURRENT 15A

+VGA_CORE

+1.05VS_VCCP

+1.5V

+1.5V_CPU

B

CPU1.5V_S3_GATE / SUSP

APL5336

SI4856

SUSP

DESIGN CURRENT 2A

DESIGN CURRENT 12A

+0.75VS

+1.5VS

SUSP#

A

G5603RU1U

5

4

DESIGN CURRENT 6A

+VCCSA

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

3 60Friday, August 24, 2012

3 60Friday, August 24, 2012

3 60Friday, August 24, 2012

1

of

of

of

A

B

B

B

Voltage Rails

5

Power Plane Description

VIN

BATT+ Battery power supply (12.6V) N/A N/A N/A

B+

+VCC_CORE

D

+VGA_CORE

+VGFX_CORE Core voltage for UMA graphic ON OFF OFF

+0.75VS +0.75VP to +0.75VS switched power rail for DDR terminator

+1.0VSDGPU +1.0VSPDGPU to +1.0VSDGPU switched power rail for GPU

+1.05VS_VCCP

+1.05VS_PCH +1.05VS_VCCP to +1.05VS_PCH power for PCH

+1.5V

+1.5VS

+1.5VSDGPU +1.5VS to +1.5VSDGPU switched power rail for GPU ON OFF OFF

+1.8VS (+5VALW or +3VALW) to 1.8V switched power rail to PCH & GPU

+3VALW +3VALW always on power rail

+3VALW_EC + 3VALW always to KBC ON ON ON*

+3V_LAN

+3VALW_PCH

+3VS

C

+5VALW

+5VALW_PCH

+5VS + 5VALW to +5VS switched power rail OFFON OFF

+VSB +VSBP to +VSB always on power rail for sequence control ON ON*

+RTCVCC RTC power

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

B

S5 (Soft OFF)

EC SM Bus1 address

Power Power

+3VL Smart Battery

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

Core voltage for GPU

+1.05VS_VCCPP to +1.05VS_VCCP switched power rail for CPU

+1.5VP to +1.5V power rail for DDRIII ON ON OFF

+1.5V to +1.5VS switched power rail

+3VALW to +3V_LAN power rail for LAN

+3VALW to +3VALW_PCH power rail for PCH (Short Jumper)

+3VALW to +3VS power rail

+5VALWP to +5VALW power rail

+5VALW to +5VALW_PCH power rail for PCH (Short resister)

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

LOW

LOW

HIGH

LOW

LOWLOWLOW

LOW LOW LOW LOW

HIGHHIGHHIGH

HIGH

HIGH

ON

ON

ON

ON

ON

EC SM Bus2 address

Device

0x12

0x16

+3VS VGA(N13P-GLP)+3VL charger

+3VS PCH

Device

PCH SM Bus address

Power

Device

PCH

+3VALW

A

+3VS

+3VS

+3VS

+3VS

Clock Generator

DDR DIMMA

DDR DIMMB

Slot#1--WLAN

Address

1101 001x b

1001 000x b

1001 010x b

5

4

S1

N/A N/A N/A

ON

ON

ON OFF OFF

ON OFF OFF

ON OFF OFF

ON OFF OFF

ON OFF OFF

ON

ON

ON ON

ON ON

ON

ON

ON ON

ONONON ON

ON

OFF

OFF

AddressAddress

0X9E

0x96

4

S3 S5

OFF

OFF

OFF

ON ON*

OFF

ON ON*

ON

OFF

OFF

OFF

3

2

1

BOM configu table

SKU Description B om config

QAQ10 UMA GIGA W/HDMI

N/AN/AN/A

OFF

OFF

1

QAQ11 DIS N13PGLP1G W/HDMI

2

QAQ13 DIS GLP2G W/HDMI/TPM

3

DA8@/8111E@/UMA@/TF@/10@/WIN8@/388@/COM@

DA8@/8111E@/OPT@/TF@/11@/WIN8@/388@/COM@

DA8@/8111E@/OPT@/030@/13@/WIN8@/388@/COM@
/TPM@/IN_TPM@

4

5

6

7

8

OFF

ON*

ON*

OFF

ON*

ONONONON

LOW

OFF

OFF

OFF

DA8@/8111E@/PCH@/UMA@/OPT@ /385@/388@/389@/IN_TPM@/TP M@/WB_TPM@/SM@/COM@/030@/T F@
/WIN8@/10@/11@/12@/13@/Rev 02@/Rev03@/Rev04@/Rev10@/V PRO@

388@: with 1394;
389@: without 1394.

IN_TPM@: TPM chip from vendor "INFINEON";
WB_TPM@: TPM chip from vendor "Nuvoton"
With TPM SKUs: mount "TPM@ and IN_TPM@ " or "TPM@ and WB_TPM@".

If has Vpro@, no 8111E@, Rev02@,Rev03@, Rev04@ and Rev10@.

X76 AND VGA configu table

SKU Description Config

Board ID Table

Board ID Rb V min Vtyp Vmax PCB Revision

0

1

2

3

4

5

6

7

4619IE30L11

1
2

4619IE30L21

3
4
5

Ra VCC

0

8.2K +/- 5%

18K +/- 5%

33K +/- 5%

56K +/- 5%

100K +/- 5%

200K +/- 5%

NC

100K +/- 5% 3.3V +/- 5%

100K +/- 5%

100K +/- 5%

100K +/- 5%

100K +/- 5%

100K +/- 5%

100K +/- 5%

100K +/- 5%

ZZZ
SAM 1G

ZZZ
SAM 2G

SAM1G@

SAM2G@

3.3V +/- 5%

3.3V +/- 5%

3.3V +/- 5%

3.3V +/- 5%

3.3V +/- 5%

3.3V +/- 5%

3.3V +/- 5%

ZZZ

HY1G@

Hynix 1G

ZZZ

HY2G@

Hynix 2G

0V

0.216 V0V0.250 V

0.503 V

0.436 V

0.819 V

0.712 V

1.185 V

1.036 V

1.650 V

1.453 V

2.200 V

1.935 V

3.300 V

2.500 V

0V

0.289 V

0.538 V

0.875 V

1.264 V

1.759 V

2.341 V

3.300 V

4619IE30L01

4619IE30L11

4619IE30L21

QAQ11 DIS N13P-GLP

QAQ13 DIS N13P-GLP

0.1

0.2

0.3

0.4

1.0

VPRO

D

C

B

PCH And PCBA table

UPCH1
BD82HM76 SLJ8E C1 BGA 989P PCH 030!

PCH

8111E@

PCB

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

UPCH1
BD82QM77 QPRE C1 BGA 989P PCH

VPRO@

ZZZ

DA8@

PCB LA-8581P REV1 M/B

2

ZZZ

DAZ@

PCB QAQ10

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

4 60Friday, August 24, 2012

4 60Friday, August 24, 2012

4 60Friday, August 24, 2012

1

of

of

of

A

B

B

B

VSS

1

F22

VSS234

F19

VSS235

E30

VSS236

E27

VSS237

E24

VSS238

E21

VSS239

E18

VSS240

VSS241

VSS242

VSS243

VSS244

VSS245

VSS246

VSS247

VSS248

VSS249

VSS250

VSS251

VSS252

VSS253

VSS254

VSS255

VSS256

VSS257

VSS258

VSS259

VSS260

VSS261

VSS262

VSS263

VSS264

VSS265

VSS266

VSS267

VSS268

VSS269

VSS270

VSS271

VSS272

VSS273

VSS274

VSS275

VSS276

VSS277

VSS278

VSS279

VSS280

VSS281

VSS282

VSS283

VSS284

VSS285

D

E15

E13

E10

E9

E8

E7

E6

E5

E4

E3

E2

E1

D35

D32

D29

D26

D20

D17

C34

C31

C28

C27

C25

C23

C10

C1

B22

B19

B17

B15

B13

B11

C

B9

B8

B7

B5

B3

B2

A35

A32

A29

A26

A23

A20

A3

B

5

JCPU1A

D

C

+1.05VS_VCCP

+1.05VS_VCCP

B

DMI_CRX_PTX_N0<27>

DMI_CRX_PTX_N1<27>

DMI_CRX_PTX_N2<27>

DMI_CRX_PTX_N3<27>

DMI_CRX_PTX_P0<27>

DMI_CRX_PTX_P1<27>

DMI_CRX_PTX_P2<27>

DMI_CRX_PTX_P3<27>

DMI_CTX_PRX_N0<27>

DMI_CTX_PRX_N1<27>

DMI_CTX_PRX_N2<27>

DMI_CTX_PRX_N3<27>

DMI_CTX_PRX_P0<27>

DMI_CTX_PRX_P1<27>

DMI_CTX_PRX_P2<27>

DMI_CTX_PRX_P3<27>

FDI_CTX_PRX_N0<27>

FDI_CTX_PRX_N1<27>

FDI_CTX_PRX_N2<27>

FDI_CTX_PRX_N3<27>

FDI_CTX_PRX_N4<27>

FDI_CTX_PRX_N5<27>

FDI_CTX_PRX_N6<27>

FDI_CTX_PRX_N7<27>

FDI_CTX_PRX_P0<27 >

FDI_CTX_PRX_P1<27 >

FDI_CTX_PRX_P2<27 >

FDI_CTX_PRX_P3<27 >

FDI_CTX_PRX_P4<27 >

FDI_CTX_PRX_P5<27 >

FDI_CTX_PRX_P6<27 >

FDI_CTX_PRX_P7<27 >

FDI_FSYNC0<27>

FDI_FSYNC1<27>

FDI_INT<27>

FDI_LSYNC0<27>

FDI_LSYNC1<27>

RC4 24.9_0402_1%

2

1

2

1

10K_0402_5%
R88

@

FDI_CTX_PRX_N0

FDI_CTX_PRX_N1

FDI_CTX_PRX_N2

FDI_CTX_PRX_N3

FDI_CTX_PRX_N4

FDI_CTX_PRX_N5

FDI_CTX_PRX_N6

FDI_CTX_PRX_N7

FDI_CTX_PRX_P0

FDI_CTX_PRX_P1

FDI_CTX_PRX_P2

FDI_CTX_PRX_P3

FDI_CTX_PRX_P4

FDI_CTX_PRX_P5

FDI_CTX_PRX_P6

FDI_CTX_PRX_P7

FDI_FSYNC0

FDI_FSYNC1

FDI_INT

FDI_LSYNC0

FDI_LSYNC1

EDP_COMP

EDP_HPD#

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD#

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

TYCO_2013620-2_IVY BRIDGE

CONN@

4

J22

PEG_ICOMPI

J21

PEG_ICOMPO

H22

PEG_RCOMPO

K33

PEG_RX#[0]

M35

PEG_RX#[1]

L34

PEG_RX#[2]

J35

PEG_RX#[3]

J32

PEG_RX#[4]

H34

PEG_RX#[5]

H31

PEG_RX#[6]

G33

PEG_RX#[7]

PCI EXPRESS* - GRAPHICS

PEG_RX#[8]

PEG_RX#[9]

PEG_RX#[10]

PEG_RX#[11]

PEG_RX#[12]

PEG_RX#[13]

PEG_RX#[14]

PEG_RX#[15]

PEG_RX[0]

PEG_RX[1]

PEG_RX[2]

PEG_RX[3]

PEG_RX[4]

PEG_RX[5]

PEG_RX[6]

PEG_RX[7]

PEG_RX[8]

PEG_RX[9]

PEG_RX[10]

PEG_RX[11]

PEG_RX[12]

PEG_RX[13]

PEG_RX[14]

PEG_RX[15]

PEG_TX#[0]

PEG_TX#[1]

PEG_TX#[2]

PEG_TX#[3]

PEG_TX#[4]

PEG_TX#[5]

PEG_TX#[6]

PEG_TX#[7]

PEG_TX#[8]

PEG_TX#[9]

PEG_TX#[10]

PEG_TX#[11]

PEG_TX#[12]

PEG_TX#[13]

PEG_TX#[14]

PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]

PEG_TX[10]

PEG_TX[11]

PEG_TX[12]

PEG_TX[13]

PEG_TX[14]

PEG_TX[15]

G30

F35

E34

E32

D33

D31

B33

C32

J33

L35

K34

H35

H32

G34

G31

F33

F30

E35

E33

F32

D34

E31

C33

B32

M29

M32

M31

L32

L29

K31

K28

J30

J28

H29

G27

E29

F27

D28

F26

E25

M28

M33

M30

L31

L28

K30

K27

J29

J27

H28

G28

E28

F28

D27

E26

D25

DMI

Intel(R) FDI

eDP

24.9_0402_1%

PEG_COMP

PCIE_GTX_C_CRX_N0

PCIE_GTX_C_CRX_N1

PCIE_GTX_C_CRX_N2

PCIE_GTX_C_CRX_N3

PCIE_GTX_C_CRX_N4

PCIE_GTX_C_CRX_N5

PCIE_GTX_C_CRX_N6

PCIE_GTX_C_CRX_N7

PCIE_GTX_C_CRX_N8

PCIE_GTX_C_CRX_N9

PCIE_GTX_C_CRX_N10

PCIE_GTX_C_CRX_N11

PCIE_GTX_C_CRX_N12

PCIE_GTX_C_CRX_N13

PCIE_GTX_C_CRX_N14

PCIE_GTX_C_CRX_N15

PCIE_GTX_C_CRX_P0

PCIE_GTX_C_CRX_P1

PCIE_GTX_C_CRX_P2

PCIE_GTX_C_CRX_P3

PCIE_GTX_C_CRX_P4

PCIE_GTX_C_CRX_P5

PCIE_GTX_C_CRX_P6

PCIE_GTX_C_CRX_P7

PCIE_GTX_C_CRX_P8

PCIE_GTX_C_CRX_P9

PCIE_GTX_C_CRX_P10

PCIE_GTX_C_CRX_P11

PCIE_GTX_C_CRX_P12

PCIE_GTX_C_CRX_P13

PCIE_GTX_C_CRX_P14

PCIE_GTX_C_CRX_P15

PCIE_CTX_GRX_N0

PCIE_CTX_GRX_N1

PCIE_CTX_GRX_N2

PCIE_CTX_GRX_N3

PCIE_CTX_GRX_N4

PCIE_CTX_GRX_N5

PCIE_CTX_GRX_N6

PCIE_CTX_GRX_N7

PCIE_CTX_GRX_N8

PCIE_CTX_GRX_N9

PCIE_CTX_GRX_N10

PCIE_CTX_GRX_N11

PCIE_CTX_GRX_N12

PCIE_CTX_GRX_N13

PCIE_CTX_GRX_N14

PCIE_CTX_GRX_N15

PCIE_CTX_GRX_P0

PCIE_CTX_GRX_P1

PCIE_CTX_GRX_P2

PCIE_CTX_GRX_P3

PCIE_CTX_GRX_P4

PCIE_CTX_GRX_P5

PCIE_CTX_GRX_P6

PCIE_CTX_GRX_P7

PCIE_CTX_GRX_P8

PCIE_CTX_GRX_P9

PCIE_CTX_GRX_P10

PCIE_CTX_GRX_P11

PCIE_CTX_GRX_P12

PCIE_CTX_GRX_P13

PCIE_CTX_GRX_P14

PCIE_CTX_GRX_P15

3

+1.05VS_VCCP

1

RC2

2

PEG_ICOMPI and RCOMPO signals should be shorted and routed
with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils

- typical impedance = 14.5 mohms

PCIE_GTX_C_CRX_N[0..15] <13>

PEG signals swapped at VGA side.

PCIE_GTX_C_CRX_P[0..15] <13>

2

1

C222 0.1U_0402_16V7KOPT@

2

1

C136 0.1 U_0402_16V7KOPT@

2

1

C60 0.1U_0402_16V7 KOPT@

2

1

C75 0.1U_0402_16V7 KOPT@

2

1

C67 0.1U_0402_16V7KOPT@

2

1

C220 0.1U_0402_16V7KOPT@

2

1

C118 0.1U_ 0402_16V7KOPT@

2

1

C62 0.1U_0402_16 V7KOPT@

2

1

C59 0.1U_0402_16V7KOPT@

2

1

C115 0.1U_0402_16V7 KOPT@

2

1

C70 0.1U_0402_16V7KOPT@

2

1

C197 0.1U_0402_16V7KOPT@

2

1

C61 0.1U_0402_16 V7KOPT@

2

1

C223 0.1U_0 402_16V7KOPT@

2

1

C88 0.1U_0402_16 V7KOPT@

2

1

C68 0.1U_0402_16V7KOPT@

2

1

C209 0.1U_0402_16V7KOPT@

2

1

C66 0.1U_0402_16 V7KOPT@

2

1

C224 0.1U_0 402_16V7KOPT@

2

1

C89 0.1U_0402_16 V7KOPT@

2

1

C69 0.1U_0402_16V7KOPT@

2

1

C221 0.1U_0402_16V7 KOPT@

2

1

C135 0 .1U_0402_16V7KOPT@

2

1

C71 0.1U_0402_16 V7KOPT@

2

1

C74 0.1U_0402_16 V7KOPT@

2

1

C72 0.1U_0402_16V7KOPT@

2

1

C214 0.1U_0402_16V7KOPT@

2

1

C117 0.1 U_0402_16V7KOPT@

2

1

C78 0.1U_0402_16V7KOPT@

2

1

C87 0.1U_0402_16V7 KOPT@

2

1

C79 0.1U_0402_16V7KOPT@

2

1

C111 0.1U_0 402_16V7KOPT@

PCIE_CTX_C_GRX_N0

PCIE_CTX_C_GRX_N1

PCIE_CTX_C_GRX_N2

PCIE_CTX_C_GRX_N3

PCIE_CTX_C_GRX_N4

PCIE_CTX_C_GRX_N5

PCIE_CTX_C_GRX_N6

PCIE_CTX_C_GRX_N7

PCIE_CTX_C_GRX_N8

PCIE_CTX_C_GRX_N9

PCIE_CTX_C_GRX_N10

PCIE_CTX_C_GRX_N11

PCIE_CTX_C_GRX_N12

PCIE_CTX_C_GRX_N13

PCIE_CTX_C_GRX_N14

PCIE_CTX_C_GRX_N15

PCIE_CTX_C_GRX_P0

PCIE_CTX_C_GRX_P1

PCIE_CTX_C_GRX_P2

PCIE_CTX_C_GRX_P3

PCIE_CTX_C_GRX_P4

PCIE_CTX_C_GRX_P5

PCIE_CTX_C_GRX_P6

PCIE_CTX_C_GRX_P7

PCIE_CTX_C_GRX_P8

PCIE_CTX_C_GRX_P9

PCIE_CTX_C_GRX_P10

PCIE_CTX_C_GRX_P11

PCIE_CTX_C_GRX_P12

PCIE_CTX_C_GRX_P13

PCIE_CTX_C_GRX_P14

PCIE_CTX_C_GRX_P15

2

PCIE_CTX_C_GRX_N[0..15] <13>

PCIE_CTX_C_GRX_P[0..15] <13>

JCPU1I

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

TYCO_2013620-2_IVY BRIDGE

CONN@

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

2

Date: Sheet

5 60Friday, August 24, 2012

5 60Friday, August 24, 2012

5 60Friday, August 24, 2012

1

A

B

B

B

of

of

of

4

1

0_0402_5%

1

0.1U_0402_16V4Z

C85

+1.5V_CPU_VDDQ

R81
200_0402_1%

VDDPWRGOOD

R110
39_0402_1%

@

2

@

1

D

@

2

Q5
2N7002_SOT23-3

G

2

@

S

3

D

5

D

4

3

2

SYSTEM_PWROK<27>

1

R104

0_0402_5%

short@

2

RC21 0_0 402_5%

short@

RUN_ON_CPU1.5VS3#<10,45>

+3VS

D_PWG

+3VALW

R289

200_0402_1%

PM_DRAM_PWRGD<27>

RC13

@

10K_0402_5%

SUSP<11,40,43,45>

+3VALW

5

1

P

B

2

A

G

3

RC17

RC16

U5
74AHC1G08DCKR_SC70-5

O

1

0_0402_5%

C

Processor Pullups

H_PROCHOT#

B

A

1

R47
62_0402_5%

CC62

@

220P_0402_25V8J

H_CPUPWRGD_R

5

+1.05VS_VCCP

2

H_PROCHOT#<41,47>

H_THERMTRIP#<29>

PROC_SELECT#:
Sandy Bridge---output high;
Ivy Bridge---output low.

T0501

H_PECI<29,41>

H_PROCHOT#

H_PM_SYNC<27>

H_CPUPWRGD<29>

VDDPWRGOOD

220P_0402_25V8J

H_SNB_IVB#<29>

H_CATERR#

2

1

RC44
43_0402_1%

H_PECI_R

R58

2

1

H_PROCHOT#_R

56_0402_5%

Place R58 close to CPU.

2

1

H_THERMTRIP#_R

R14 0_0402_5%

short@

R15

2

1

H_PM_SYNC_R

0_0402_5%

short@

R16

2

1

H_CPUPWRGD_R

0_0402_5%

short@

R79

2

1

130_0402_1%

VDDPWRGOOD_R

BUF_CPU_RST#

R5010K_0402_5%

C379

@

JCPU1B

C26

PROC_SELECT#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

TYCO_2013620-2_IVY BRIDGE

CONN@

4

BCLK

BCLK#

MISCTHERMALPWR MANAGEMENT

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

SM_DRAMRST#

SM_RCOMP[0]

SM_RCOMP[1]

SM_RCOMP[2]

DDR3

MISC

PRDY#

PREQ#

TCK

TMS

TRST#

TDI

TDO

DBR#

BPM#[0]

BPM#[1]

BPM#[2]

JTAG & BPM

BPM#[3]

BPM#[4]

BPM#[5]

BPM#[6]

BPM#[7]

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

A28

A27

A16

A15

R8

AK1

A5

A4

AP29

AP27

AR26

AR27

AP30

AR28

AP26

AL35

AT28

AR29

AR30

AT30

AP32

AR31

AT31

AR32

XDP_DBRESET#

CLK_CPU_DMI_R

CLK_CPU_DMI#_R

CLK_CPU_DPLL_R

CLK_CPU_DPLL#_R

H_DRAMRST#

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

XDP_PRDY#_R

XDP_PREQ#_R

XDP_TCK_R

XDP_TMS_R

XDP_TRST#_R

XDP_TDI_R

XDP_TDO_R

short@

2

1

R138 0_040 2_5%

2

1

R139 0_040 2_5%

short@

2

1

R126 1K_04 02_5%

2

1

R115 1K_040 2_5%

H_DRAMRST# <7>

Compal Secret Data

Compal Secret Data

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

PLT_RST#<28,34,35,36,37,39,41,42,44>

CLK_CPU_DMI <26>

CLK_CPU_DMI# <26>

+1.05VS_VCCP

DDR3 Compensation Signals

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

EN_DFAN1<41>

Deciphered Date

Deciphered Date

Deciphered Date

+FAN1

10mil

+5VS

2

1

1

1

1A

1

C1
10U_0805_10V4Z

2

2

2

2

U58

1

EN

2

VIN

3

VOUT

4

VSET

G996P11U SOP 8P

+3VS

5

U3

1

P

NC

Y

2

A

G

3

+1.05VS_VCCP

0.1U_0402_16V4Z

C84

4

BUFO_CPU_RST#

SN74LVC1G07DCKR_SC70-5

PU/PD for JTAG signals

XDP_TMS_R

XDP_TDI_R

XDP_PREQ#_R

RC42140_0402_1%

RC4325.5_0402_1%

RC45200_0402_1%

XDP_TDO_R

XDP_TCK_R

XDP_TRST#_R

FAN Control Circuit

2

C863

10U_0805_10V4Z

8

GND

7

GND

6

GND

5

GND

+FAN1

1

2

C864

@

1000P_0402_50V7K

1

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

Date: Sheet

1

R64
75_0402_5%

2

R72

43_0402_1%

1

C865

0.01U_0402_25V7K

2

1

BUF_CPU_RST#

+1.05VS_VCCP

RC4651_0402_5%

RC4751_0402_5%

RC4851_0402_5% @

RC4951_0402_5%

RC5751_0402_5%

RC5551_0402_5%

JFAN

1

1

2

2

3

3

4

GND

5

GND

ACES_85205-03001

CONN@

R3 1 0K_0402_5%

2

@

1

@

R73
0_0402_5%

2

1

+3VS

FAN_SPEED <41>

6 60Friday, August 24, 2012

of

6 60Friday, August 24, 2012

of

6 60Friday, August 24, 2012

of

C

B

A

B

B

B

DDR_B_DQS#0

DDR_B_DQS#1

DDR_B_DQS#2

DDR_B_DQS#3

DDR_B_DQS#4

DDR_B_DQS#5

DDR_B_DQS#6

DDR_B_DQS#7

DDR_B_DQS0

DDR_B_DQS1

DDR_B_DQS2

DDR_B_DQS3

DDR_B_DQS4

DDR_B_DQS5

DDR_B_DQS6

DDR_B_DQS7

DDR_B_MA0

DDR_B_MA1

DDR_B_MA2

DDR_B_MA3

DDR_B_MA4

DDR_B_MA5

DDR_B_MA6

DDR_B_MA7

DDR_B_MA8

DDR_B_MA9

DDR_B_MA10

DDR_B_MA11

DDR_B_MA12

DDR_B_MA13

DDR_B_MA14

DDR_B_MA15

1

DDRB_CLK0 <12>

DDRB_CLK0# <12>

DDRB_CKE0 <12>

DDRB_CLK1 <12>

DDRB_CLK1# <12>

DDRB_CKE1 <12>

DDRB_SCS0# <12>

DDRB_SCS1# <12>

DDRB_ODT0 <12>

DDRB_ODT1 <12>

DDR_B_DQS#[0..7] <12>

DDR_B_DQS[0..7] <12>

DDR_B_MA[0..15] <12>

D

C

B

3

DDR_B_D[0..63]<12>

DDR_B_BS0<12>

DDR_B_BS1<12>

DDR_B_BS2<12>

DDR_B_CAS#<12>

DDR_B_RAS#<12>

DDR_B_WE#<12>

DDR_B_D0

DDR_B_D1

DDR_B_D2

DDR_B_D3

DDR_B_D4

DDR_B_D5

DDR_B_D6

DDR_B_D7

DDR_B_D8

DDR_B_D9

DDR_B_D10

DDR_B_D11

DDR_B_D12

DDR_B_D13

DDR_B_D14

DDR_B_D15

DDR_B_D16

DDR_B_D17

DDR_B_D18

DDR_B_D19

DDR_B_D20

DDR_B_D21

DDR_B_D22

DDR_B_D23

DDR_B_D24

DDR_B_D25

DDR_B_D26

DDR_B_D27

DDR_B_D28

DDR_B_D29

DDR_B_D30

DDR_B_D31

DDR_B_D32

DDR_B_D33

DDR_B_D34

DDR_B_D35

DDR_B_D36

DDR_B_D37

DDR_B_D38

DDR_B_D39

DDR_B_D40

DDR_B_D41

DDR_B_D42

DDR_B_D43

DDR_B_D44

DDR_B_D45

DDR_B_D46

DDR_B_D47

DDR_B_D48

DDR_B_D49

DDR_B_D50

DDR_B_D51

DDR_B_D52

DDR_B_D53

DDR_B_D54

DDR_B_D55

DDR_B_D56

DDR_B_D57

DDR_B_D58

DDR_B_D59

DDR_B_D60

DDR_B_D61

DDR_B_D62

DDR_B_D63

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1]

RSVD_TP[2]

RSVD_TP[3]

RSVD_TP[4]

RSVD_TP[5]

RSVD_TP[6]

SA_CS#[0]

SA_CS#[1]

RSVD_TP[7]

RSVD_TP[8]

SA_ODT[0]

SA_ODT[1]

RSVD_TP[9]

RSVD_TP[10]

SA_DQS#[0]

SA_DQS#[1]

SA_DQS#[2]

SA_DQS#[3]

SA_DQS#[4]

SA_DQS#[5]

SA_DQS#[6]

SA_DQS#[7]

SA_DQS[0]

SA_DQS[1]

SA_DQS[2]

SA_DQS[3]

SA_DQS[4]

SA_DQS[5]

SA_DQS[6]

SA_DQS[7]

SA_MA[0]

SA_MA[1]

SA_MA[2]

SA_MA[3]

SA_MA[4]

SA_MA[5]

SA_MA[6]

SA_MA[7]

SA_MA[8]

SA_MA[9]

SA_MA[10]

SA_MA[11]

SA_MA[12]

SA_MA[13]

SA_MA[14]

SA_MA[15]

4

AB6

AA6

V9

AA5

AB5

V10

AB4

AA4

W9

AB3

AA3

W10

AK3

AL3

AG1

AH1

AH3

AG3

AG2

AH2

C4

G6

J3

M6

AL6

AM8

AR12

AM15

D4

F6

K3

N6

AL5

AM9

AR11

AM14

AD10

W1

W2

W7

V3

V2

W3

W6

V1

W5

AD8

V4

W4

AF8

V5

V7

DDR_A_DQS#0

DDR_A_DQS#1

DDR_A_DQS#2

DDR_A_DQS#3

DDR_A_DQS#4

DDR_A_DQS#5

DDR_A_DQS#6

DDR_A_DQS#7

DDR_A_DQS0

DDR_A_DQS1

DDR_A_DQS2

DDR_A_DQS3

DDR_A_DQS4

DDR_A_DQS5

DDR_A_DQS6

DDR_A_DQS7

DDR_A_MA0

DDR_A_MA1

DDR_A_MA2

DDR_A_MA3

DDR_A_MA4

DDR_A_MA5

DDR_A_MA6

DDR_A_MA7

DDR_A_MA8

DDR_A_MA9

DDR_A_MA10

DDR_A_MA11

DDR_A_MA12

DDR_A_MA13

DDR_A_MA14

DDR_A_MA15

DDRA_CLK0 <11>

DDRA_CLK0# <11>

DDRA_CKE0 <11>

DDRA_CLK1 <11>

DDRA_CLK1# <11>

DDRA_CKE1 <11>

DDRA_SCS0# <11>

DDRA_SCS1# <11>

DDRA_ODT0 <11>

DDRA_ODT1 <11>

DDR_A_DQS#[0..7] <11>

DDR_A_DQS[0..7] <11>

DDR_A_MA[0..15] <11>

5

JCPU1C

C5

DDR_A_D[0..63]<11>

D

C

DDR_A_BS0<11>

DDR_A_BS1<11>

DDR_A_BS2<11>

B

DDR_A_CAS#<11>

DDR_A_RAS#<11>

DDR_A_WE#<11>

DDR_A_D0

DDR_A_D1

DDR_A_D2

DDR_A_D3

DDR_A_D4

DDR_A_D5

DDR_A_D6

DDR_A_D7

DDR_A_D8

DDR_A_D9

DDR_A_D10

DDR_A_D11

DDR_A_D12

DDR_A_D13

DDR_A_D14

DDR_A_D15

DDR_A_D16

DDR_A_D17

DDR_A_D18

DDR_A_D19

DDR_A_D20

DDR_A_D21

DDR_A_D22

DDR_A_D23

DDR_A_D24

DDR_A_D25

DDR_A_D26

DDR_A_D27

DDR_A_D28

DDR_A_D29

DDR_A_D30

DDR_A_D31

DDR_A_D32

DDR_A_D33

DDR_A_D34

DDR_A_D35

DDR_A_D36

DDR_A_D37

DDR_A_D38

DDR_A_D39

DDR_A_D40

DDR_A_D41

DDR_A_D42

DDR_A_D43

DDR_A_D44

DDR_A_D45

DDR_A_D46

DDR_A_D47

DDR_A_D48

DDR_A_D49

DDR_A_D50

DDR_A_D51

DDR_A_D52

DDR_A_D53

DDR_A_D54

DDR_A_D55

DDR_A_D56

DDR_A_D57

DDR_A_D58

DDR_A_D59

DDR_A_D60

DDR_A_D61

DDR_A_D62

DDR_A_D63

SA_DQ[0]

D5

SA_DQ[1]

D3

SA_DQ[2]

D2

SA_DQ[3]

D6

SA_DQ[4]

C6

SA_DQ[5]

C2

SA_DQ[6]

C3

SA_DQ[7]

F10

SA_DQ[8]

F8

SA_DQ[9]

G10

SA_DQ[10]

G9

SA_DQ[11]

F9

SA_DQ[12]

F7

SA_DQ[13]

G8

SA_DQ[14]

G7

SA_DQ[15]

K4

SA_DQ[16]

K5

SA_DQ[17]

K1

SA_DQ[18]

J1

SA_DQ[19]

J5

SA_DQ[20]

J4

SA_DQ[21]

J2

SA_DQ[22]

K2

SA_DQ[23]

M8

SA_DQ[24]

N10

SA_DQ[25]

N8

SA_DQ[26]

N7

SA_DQ[27]

M10

SA_DQ[28]

M9

SA_DQ[29]

N9

SA_DQ[30]

M7

SA_DQ[31]

AG6

SA_DQ[32]

AG5

SA_DQ[33]

AK6

SA_DQ[34]

AK5

SA_DQ[35]

AH5

SA_DQ[36]

AH6

SA_DQ[37]

AJ5

SA_DQ[38]

AJ6

SA_DQ[39]

AJ8

SA_DQ[40]

AK8

SA_DQ[41]

AJ9

SA_DQ[42]

AK9

SA_DQ[43]

AH8

SA_DQ[44]

AH9

SA_DQ[45]

AL9

SA_DQ[46]

AL8

SA_DQ[47]

AP11

SA_DQ[48]

AN11

SA_DQ[49]

AL12

SA_DQ[50]

AM12

SA_DQ[51]

AM11

SA_DQ[52]

AL11

SA_DQ[53]

AP12

SA_DQ[54]

AN12

SA_DQ[55]

AJ14

SA_DQ[56]

AH14

SA_DQ[57]

AL15

SA_DQ[58]

AK15

SA_DQ[59]

AL14

SA_DQ[60]

AK14

SA_DQ[61]

AJ15

SA_DQ[62]

AH15

SA_DQ[63]

AE10

SA_BS[0]

AF10

SA_BS[1]

V6

SA_BS[2]

AE8

SA_CAS#

AD9

SA_RAS#

AF9

SA_WE#

TYCO_2013620-2_IVY BRIDGE

CONN@

DDR SYSTEM MEMORY A

2

JCPU1D

C9

SB_DQ[0]

A7

SB_DQ[1]

D10

SB_DQ[2]

C8

SB_DQ[3]

A9

SB_DQ[4]

A8

SB_DQ[5]

D9

SB_DQ[6]

D8

SB_DQ[7]

G4

SB_DQ[8]

F4

SB_DQ[9]

F1

SB_DQ[10]

G1

SB_DQ[11]

G5

SB_DQ[12]

F5

SB_DQ[13]

F2

SB_DQ[14]

G2

SB_DQ[15]

J7

SB_DQ[16]

J8

SB_DQ[17]

K10

SB_DQ[18]

K9

SB_DQ[19]

J9

SB_DQ[20]

J10

SB_DQ[21]

K8

SB_DQ[22]

K7

SB_DQ[23]

M5

SB_DQ[24]

N4

SB_DQ[25]

N2

SB_DQ[26]

N1

SB_DQ[27]

M4

SB_DQ[28]

N5

SB_DQ[29]

M2

SB_DQ[30]

M1

SB_DQ[31]

AM5

SB_DQ[32]

AM6

SB_DQ[33]

AR3

SB_DQ[34]

AP3

SB_DQ[35]

AN3

SB_DQ[36]

AN2

SB_DQ[37]

AN1

SB_DQ[38]

AP2

SB_DQ[39]

AP5

SB_DQ[40]

AN9

SB_DQ[41]

AT5

SB_DQ[42]

AT6

SB_DQ[43]

AP6

SB_DQ[44]

AN8

SB_DQ[45]

AR6

SB_DQ[46]

AR5

SB_DQ[47]

AR9

SB_DQ[48]

AJ11

SB_DQ[49]

AT8

SB_DQ[50]

AT9

SB_DQ[51]

AH11

SB_DQ[52]

AR8

SB_DQ[53]

AJ12

SB_DQ[54]

AH12

SB_DQ[55]

AT11

SB_DQ[56]

AN14

SB_DQ[57]

AR14

SB_DQ[58]

AT14

SB_DQ[59]

AT12

SB_DQ[60]

AN15

SB_DQ[61]

AR15

SB_DQ[62]

AT15

SB_DQ[63]

AA9

SB_BS[0]

AA7

SB_BS[1]

R6

SB_BS[2]

AA10

SB_CAS#

AB8

SB_RAS#

AB9

SB_WE#

TYCO_2013620-2_IVY BRIDGE

CONN@

AE2

SB_CLK[0]

AD2

SB_CLK#[0]

R9

SB_CKE[0]

AE1

SB_CLK[1]

AD1

SB_CLK#[1]

R10

SB_CKE[1]

AB2

RSVD_TP[11]

AA2

RSVD_TP[12]

T9

RSVD_TP[13]

AA1

RSVD_TP[14]

AB1

RSVD_TP[15]

T10

RSVD_TP[16]

AD3

SB_CS#[0]

AE3

SB_CS#[1]

AD6

RSVD_TP[17]

AE6

RSVD_TP[18]

AE4

SB_ODT[0]

AD4

AD5

SB_ODT[1]

RSVD_TP[19]

AE5

RSVD_TP[20]

D7

SB_DQS#[0]

F3

SB_DQS#[1]

K6

SB_DQS#[2]

N3

SB_DQS#[3]

AN5

SB_DQS#[4]

AP9

SB_DQS#[5]

AK12

SB_DQS#[6]

AP15

SB_DQS#[7]

C7

SB_DQS[0]

G3

SB_DQS[1]

J6

SB_DQS[2]

M3

SB_DQS[3]

AN6

SB_DQS[4]

AP8

SB_DQS[5]

AK11

SB_DQS[6]

AP14

SB_DQS[7]

DDR SYSTEM MEMORY B

AA8

SB_MA[0]

T7

SB_MA[1]

R7

SB_MA[2]

T6

SB_MA[3]

T2

SB_MA[4]

T4

SB_MA[5]

T3

SB_MA[6]

R2

SB_MA[7]

T5

SB_MA[8]

R3

SB_MA[9]

AB7

SB_MA[10]

R1

SB_MA[11]

T1

SB_MA[12]

AB10

SB_MA[13]

R5

SB_MA[14]

R4

SB_MA[15]

+1.5V

@

R124 0_0402_5%

QC3

BSS138_SOT23

D

S

3

H_DRAMRST#<6>

A

H_DRAMRST#

4.99K_0402_1%

5

R119

1

G

2

C86

0.047U_0402_16V4Z

DDR3_DRAMRST#_R

DRAMRST_CNTRL

R123
1K_0402_5%

R129 1K_0402_5%

short@

R118 0_0402_5%

4

SM_DRAMRST# <11,12>

DRAMRST_CNTRL_PCH <10,26>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Compal Electronics, Inc.

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sh eet

Date: Sh eet

Date: She et

7 60Friday, August 24, 2012

of

7 60Friday, August 24, 2012

of

7 60Friday, August 24, 2012

1

of

A

B

B

B

5

D

CFG[1:0]: reserved configuration lane.

CFG[3]: reserved

CFG[17:7]: reserved configuration lanes.

CFG[17:0]:
Processor internal pull up 5~15Kohm to VCCIO

C

B

T266 PAD

T251 PAD

T252 PAD

T253 PAD

T254 PAD

T255 PAD

T256 PAD

T257 PAD

T258 PAD

T259 PAD

T260 PAD

T261 PAD

T267 PAD

T268 PAD

T269 PAD

T270 PAD

T262 PAD

T263 PAD

T245 PAD

T246 PAD

T247 PAD

T248 PAD

CFG0

CFG1

CFG2

CFG3

CFG4

CFG5

CFG6

CFG7

CFG8

CFG9

CFG10

CFG11

CFG12

CFG13

CFG14

CFG15

CFG16

CFG17

4

JCPU1E

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

J15

RSVD27

TYCO_2013620-2_IVY BRIDGE

CONN@

CFG

RESERVED

VCC_DIE_SENSE

VSS_DIE_SENSE

RSVD28

RSVD29

RSVD30

RSVD31

RSVD32

RSVD33

RSVD34

RSVD35

RSVD37

RSVD38

RSVD39

RSVD40

RSVD_NCTF1

RSVD_NCTF2

RSVD_NCTF3

RSVD_NCTF4

RSVD_NCTF5

RSVD_NCTF6

RSVD_NCTF7

RSVD_NCTF8

RSVD_NCTF9

RSVD_NCTF10

RSVD51

RSVD52

BCLK_ITP

BCLK_ITP#

RSVD_NCTF11

RSVD_NCTF12

RSVD_NCTF13

3

2

1

CFG Straps for Processor

CFG2

AH27

AH26

L7

AG7

AE7

AK2

W8

AT26

AM33

AJ27

T8

J16

H16

G16

AR35

AT34

AT33

AP35

AR34

B34

A33

A34

B35

C35

AJ32

AK32

AN35

AM35

AT2

AT1

AR1

B1

KEY

CLK_RES_ITP <26>

CLK_RES_ITP# <26>

PEG Static Lane Reversal - CFG2 is for the 16x

1:(Default) Normal Operation; Lane #

CFG2

definition matches socket pin map definition
0:Lane Reversed

Display Port Presence Strap

1 : Disabled; No Physical Display Port

CFG4

attached to Embedded Display Port

0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1 function 1 enabled ; function 2

CFG[6:5]

disabled
01: Reserved - (Device 1 function 1 disabled ; function

2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

CFG4

CFG6

CFG5

1K_0402_1%

CFG7

RC51
1K_0402_1%

RC52

@

1K_0402_1%

RC54

@

RC53

@

1K_0402_1%

RC56

@

1K_0402_1%

D

C

B

PEG DEFER TRAINING

1: (Default) PEG Train immediately

CFG7

following RESETB de assertion

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

0: PEG Wait for BIOS for training

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

4019IE

4019IE

4019IE

8 60Friday, August 24, 201 2

8 60Friday, August 24, 201 2

8 60Friday, August 24, 201 2

1

A

B

B

B

of

of

of

5

JCPU1H

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

D

C

B

A

VSS7

AT16

VSS8

AT13

VSS9

AT10

VSS10

AT7

VSS11

AT4

VSS12

AT3

VSS13

AR25

VSS14

AR22

VSS15

AR19

VSS16

AR16

VSS17

AR13

VSS18

AR10

VSS19

AR7

VSS20

AR4

VSS21

AR2

VSS22

AP34

VSS23

AP31

VSS24

AP28

VSS25

AP25

VSS26

AP22

VSS27

AP19

VSS28

AP16

VSS29

AP13

VSS30

AP10

VSS31

AP7

VSS32

AP4

VSS33

AP1

VSS34

AN30

VSS35

AN27

VSS36

AN25

VSS37

AN22

VSS38

AN19

VSS39

AN16

VSS40

AN13

VSS41

AN10

VSS42

AN7

VSS43

AN4

VSS44

AM29

VSS45

AM25

VSS46

AM22

VSS47

AM19

VSS48

AM16

VSS49

AM13

VSS50

AM10

VSS51

AM7

VSS52

AM4

VSS53

AM3

VSS54

AM2

VSS55

AM1

VSS56

AL34

VSS57

AL31

VSS58

AL28

VSS59

AL25

VSS60

AL22

VSS61

AL19

VSS62

AL16

VSS63

AL13

VSS64

AL10

VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68

AK33

VSS69

AK30

VSS70

AK27

VSS71

AK25

VSS72

AK22

VSS73

AK19

VSS74

AK16

VSS75

AK13

VSS76

AK10

VSS77

AK7

VSS78

AK4

VSS79

AJ25

VSS80

TYCO_2013620-2_IVY BRIDGE

CONN@

VSS

VSS81

VSS82

VSS83

VSS84

VSS85

VSS86

VSS87

VSS88

VSS89

VSS90

VSS91

VSS92

VSS93

VSS94

VSS95

VSS96

VSS98

VSS99

VSS100

VSS101

VSS102

VSS103

VSS104

VSS105

VSS106

VSS107

VSS108

VSS109

VSS110

VSS111

VSS112

VSS113

VSS114

VSS115

VSS116

VSS117

VSS118

VSS119

VSS120

VSS121

VSS122

VSS123

VSS124

VSS125

VSS126

VSS127

VSS128

VSS129

VSS130

VSS131

VSS132

VSS133

VSS134

VSS135

VSS136

VSS137

VSS138

VSS139

VSS140

VSS141

VSS142

VSS143

VSS144

VSS145

VSS146

VSS147

VSS148

VSS149

VSS150

VSS151

VSS152

VSS153

VSS154

VSS155

VSS156

VSS157

VSS158

VSS159

VSS160

AJ22

AJ19

AJ16

AJ13

AJ10

AJ7

AJ4

AJ3

AJ2

AJ1

AH35

AH34

AH32

AH30

AH29

AH28

AH25

AH22

AH19

AH16

AH7

AH4

AG9

AG8

AG4

AF6

AF5

AF3

AF2

AE35

AE34

AE33

AE32

AE31

AE30

AE29

AE28

AE27

AE26

AE9

AD7

AC9

AC8

AC6

AC5

AC3

AC2

AB35

AB34

AB33

AB32

AB31

AB30

AB29

AB28

AB27

AB26

Y9

Y8

Y6

Y5

Y3

Y2

W35

W34

W33

W32

W31

W30

W29

W28

W27

W26

U9

U8

U6

U5

U3

U2

4

JCPU1F

+VCC_CORE

AG35

VCC1

AG34

VCC2

97A

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

TYCO_2013620-2_IVY BRIDGE

CONN@

3

POWER

PEG AND DDR

CORE SUPPLY

VSS_SENSE_VCCIO

SENSE LINES SVID

VCCIO1

VCCIO2

VCCIO3

VCCIO4

VCCIO5

VCCIO6

VCCIO7

VCCIO8

VCCIO9

VCCIO10

VCCIO11

VCCIO12

VCCIO13

VCCIO14

VCCIO15

VCCIO16

VCCIO17

VCCIO18

VCCIO19

VCCIO20

VCCIO21

VCCIO22

VCCIO23

VCCIO24

VCCIO25

VCCIO26

VCCIO27

VCCIO28

VCCIO29

VCCIO30

VCCIO31

VCCIO32

VCCIO33

VCCIO34

VCCIO35

VCCIO36

VCCIO37

VCCIO38

VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE

VSS_SENSE

VCCIO_SENSE

AH13

8.5A

AH10

AG10

AC10

Y10

U10

P10

L10

J14

J13

J12

J11

H14

H12

H11

G14

G13

G12

F14

F13

F12

F11

E14

E12

E11

D14

D13

D12

D11

C14

C13

C12

C11

B14

B12

A14

A13

A12

A11

J23

AJ29

AJ30

AJ28

AJ35

AJ34

B10

A10

VCCSENSE_R

VSSSENSE_R

+1.05VS_VCCP

H_CPU_SVIDALRT#

H_CPU_SVIDCLK

H_CPU_SVIDDAT

RC61

H_CPU_SVIDDAT

R52 0_0402_5%short@

R51 0_0402_5%

1

1

2

2

+1.05VS_VCCP

0.1U_0402_16V4Z

CC49

130_0402_1%

short@

R168

10_0402_1%

R158
10_0402_1%

H_CPU_SVIDCLK

1

RC60
75_0402_5%

2

43_0402_1%

+1.05VS_VCCP

RC137

Place the PU resistors
R53, R54 close to CPU

2

+1.05VS_VCCP

VCCIO_SENSE <51>

Package Sensing Recommendations--PDDG P30

Sense Trace Impedance Trace Length Match

VCC_SENSE /
VSS_SENSE

VCCAXG_SENSE /
VSSAXG_SENSE

VCCIO_SENSE /
VSS_SENSE_VCCIO

VCCSA

RC59 0_0402_5%

Place the PU resistors
RC60, RC137 close to CPU.

0.1U_0402_16V4Z

CC50

RC65 0_0402_5%

short@

short@

+VCC_CORE

1

2

1

R53
100_0402_1%

2

R54
100_0402_1%

25.5-34.5ohm

55ohm

VR_SVID_ALRT# <54>

VCCSENSE <54>

VSSSENSE <54>

1

D

<25 mils

C

VR_SVID_CLK <54>

B

VR_SVID_DAT <54>

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

2

Date: Sheet

1

B

B

B

9 60Friday, August 24, 201 2

of

9 60Friday, August 24, 201 2

of

9 60Friday, August 24, 20 12

of

5

4

3

2

1

+1.5V_CPU_VDDQ

+1.5V

VAXG_SENSE

VSSAXG_SENSE

SM_VREF

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10

VDDQ11

VDDQ12

VDDQ13

VDDQ14

VDDQ15

VCCSA1

VCCSA2

VCCSA3

VCCSA4

VCCSA5

VCCSA6

VCCSA7

VCCSA8

VCCSA_SENSE

VCCSA_VID[0]

VCCSA_VID[1]

VCCIO_SEL

1

+VSB

2

3

Q208B

5

2N7002DW-T/R7_SOT363-6

4

AK35

AK34

AL1

B4

D1

AF7

AF4

AF1

AC7

AC4

AC1

Y7

Y4

Y1

U7

U4

U1

P7

P4

P1

M27

M26

L26

J26

J25

J24

H26

H25

H23

C22

C24

A19

R135
100K_0402_5%

RUN_ON_CPU1.5VS3

VCC_AXG_SENSE

VSS_AXG_SENSE

VCC_AXG_SENSE

VSS_AXG_SENSE

+V_SM_VREF_CNT

VREFDQ_DIMMA_CPU

VREFDQ_DIMMB_CPU

+1.5V_CPU_VDDQ

6A

+3VALW

1

R134

D

R132

@

+GFX_CORE

1U_0402_6.3V6K

1

2

0_0402_5%

R133

0_0402_5%

AT24

33A

AT23

AT21

AT20

AT18

AT17

AR24

AR23

AR21

AR20

AR18

AR17

AP24

AP23

AP21

AP20

AP18

AP17

AN24

AN23

AN21

AN20

AN18

AN17

AM24

AM23

AM21

AM20

AM18

AM17

AL24

AL23

AL21

AL20

AL18

AL17

AK24

AK23

AK21

AK20

AK18

AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17

AH24

AH23

AH21

AH20

AH18

AH17

1.5A

B6

A6

330U_X_2VM_R6M

A2

1

CC60

CC61

+

2

SUSP#<39,41,45,50,51 ,52,57>

CPU1.5V_S3_GATE<41>

C

B

10U_0805_6.3V6M

CC58

+1.8VS_VCCPLL

1U_0402_6.3V6K

1

CC59

2

+1.8VS

RC120

0_0805_5%

A

100K_0402_5%

2

6

Q208A

2

2N7002DW-T/R7_SOT363-6

1

POWER

JCPU1G

VAXG1

VAXG2

VAXG3

VAXG4

VAXG5

VAXG6

VAXG7

VAXG8

VAXG9

VAXG10

VAXG11

VAXG12

VAXG13

VAXG14

VAXG15

VAXG16

VAXG17

VAXG18

VAXG19

VAXG20

VAXG21

VAXG22

VAXG23

VAXG24

VAXG25

VAXG26

VAXG27

VAXG28

VAXG29

VAXG30

VAXG31

VAXG32

VAXG33

VAXG34

VAXG35

VAXG36

VAXG37

VAXG38

VAXG39

VAXG40

VAXG41

VAXG42

VAXG43

VAXG44

VAXG45

VAXG46

VAXG47

VAXG48

VAXG49

VAXG50

VAXG51

VAXG52

VAXG53

VAXG54

VCCPLL1

VCCPLL2

VCCPLL3

1.8V RAIL

TYCO_2013620-2_IVY BRIDGE

CONN@

RUN_ON_CPU1.5VS3#

SENSE

LINES

SA_DIMM_VREFDQ

SB_DIMM_VREFDQ

VREFMISC

GRAPHICS

DDR3 -1.5V RAILS

SA RAIL

8

7

6

5

Close to CPU

1

R86 1 00_0402_1%

1

CC178

10A

10U_0805_6.3V6M

CC51

H_VCCSA_VID0 <53>

H_VCCSA_VID1 <53>

RC113

@

Q7

AO4728L_SO8

1

R136

2

330K_0402_1%

R89

2

2

VCC_AXG_SENSE <54>

VSS_AXG_SENSE <54>

1

2

10U_0805_6.3V6M

CC52

10U_0805_6.3V6M

CC40

0_0402_5%

+1.5V_CPU_VDDQ

1

2

4

C196

0.1U_0603_50V7K

+GFX_CORE

100_0402_1%

RC76 0_04 02_5%

2

0.1U_0402_16V4Z

10U_0805_6.3V6M

CC53

3

3

@

QC5

1

AP2302GN-HF_SOT23-3

RUN_ON_CPU1.5VS3

10U_0805_6.3V6M

10U_0805_6.3V6M

CC54

1

@

@

2

C107

CC38

10U_0805_10V4Z

+V_SM_VREF should
have 20 mil trace width

+V_SM_VREF

10U_0805_6.3V6M

1

+

CC56

CC55

CC57
330U_X_2VM_R6M

2

0.1U_0402_10V6K

+1.5V_CPU_VDDQ

check Confirm QC6, QC7 is low Rdson or not--Joyce 0929

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0603_6.3V6M

@

1

CC43

+

CC44

CC42

CC41

@

0_0402_5%

10K_0402_5%

330U_X_2VM_R6M

2

+VCCSA_SENSE <53>

RC111

VCCSA_VID Configuration --CPU EDS Page99.

VCCSA_VID[0] output default logic state is low for Sandy Bridge processors

+3VS

2

RC112

@

1

+VCCSA

+VCCSA_SENSE

+1.5V_CPU_VDDQ

R131
220_0402_5%

1

D

2

G

Q8

RUN_ON_CPU1.5VS3#

+1.5V_CPU_VDDQ

S

3

2N7002E-T1-GE3_SOT23 -3

C199 0 .1U_0402_10V7K

C201 0 .1U_0402_10V7K

CC47 0.1U_0402_10V7K

CC48 0.1U_0402_10V7K

+1.5V

RUN_ON_CPU1.5VS3# <6,45>

+1.5V_CPU_VDDQ

Intel future processor compatibility design. --DG1.5 P113

RC77 0_0402_5%

@

RC118
1K_0402_1%

RC119
1K_0402_1%

VREFDQ_DIMMA_CPU

VREFDQ_DIMMB_CPU

RC121

@

1K_0402_1%

RC78 0_0402_5%

RC122
1K_0402_1%@

2

@

2

1

3

QC6

1

AP2302GN-HF_SOT23-3

DRAMRST_CNT

3

QC7
AP2302GN-HF_SOT23-3

DRAMRST_CNT

0_0402_5% short@

0_0402_5%

VCCSA: 0.675V (Min) ~ 0.9V (Max)

SA: System Agent
(Memory controller, DMI, PCIE controllers, and display engine)

R92

@

2

1

+VCCSA

100_0402_1%

J3

2

JUMP_43X118@

2

RC79

R120

0_0402_5%

short@

RC80

2

J2

2

JUMP_43X118

@

+V_DDR_REFA

+V_DDR_REFB

short@

1

1

+1.5VS

1

1

+1.5V

+VREF_CA

RC83

@

0_0402_5%

DRAMRST_CNTRL_PCH <7,26>

+VREF_CB

RC84

@

0_0402_5%

D

C

B

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

2

Date: Sheet

10 60Friday, August 24, 2012

10 60Friday, August 24, 2012

10 60Friday, August 24, 2012

1

B

B

B

of

of

of

+V_DDR_REFA

D

C

B

A

1

10U_0603_6.3V6M

10U_0603_6.3V6M

C146

1

2

0.1U_0402_10V6K
C149

1

2

C361

1U_0402_6.3V6K

1

2

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

10U_0603_6.3V6M

C147

C148

1

1

C153

47P_0402_50V8J

1

2

2

2

0.1U_0402_10V6K
C150

1

2

1U_0402_6.3V6K

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C151

1

2

2

C362

1U_0402_6.3V6K

C360

1

1

2

2

11 60Friday, August 24, 2012

11 60Friday, August 24, 2012

11 60Friday, August 24, 2012

1

D

10U_0603_6.3V6M

CD15

1

@

2

C152

C

C359

1U_0402_6.3V6K

C369

22U_0805_6.3V6M

1

2

B

A

B

B

B

of

of

of

R5535

SUSP

0.75VR_EN

Q5520A

2

2

Layout Note:

10U_0603_6.3V6M

Place near JDDRL

C143

10U_0603_6.3V6M

+1.5V

+3VALW

5

6

1

1

+

2

2

C140

330U 2V Y D2 LESR9M

R5536
100K_0402_5%

3

Q5520B

2N7002DW-T/R7_SOT363-6

4

10U_0603_6.3V6M

C144

C145

1

1

2

2

refer to QAL51, need confirm. --Joyce 0929/2011

1

Title

Title

Title

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Layout Note: Place these 4 Caps near
Command and Control signals of JDDRL

+1.5V

Layout Note:
Place near JDD RL.203,204

+0.75VS

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

3

DDR_A_D[0..63]<7>

DDR_A_DQS[0..7]<7>

DDR_A_DQS#[0..7]<7>

DDR_A_MA[0..15]<7>

+V_DDR_REFA

RC81 0_0402_5%

+VREF_CA

RC82 0_0402_5%

+1.5V

1

R56
1K_0402_1%

2

1

1

2

C138

2

0.1U_0402_10V6K

C139

2.2U_0603_6.3V4Z

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

+VREF_CA

1

R60
1K_0402_1%

2

+1.05VSP_PWRGOOD<51,53>

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

@

@

Compal Secret Data

Compal Secret Data

Compal Secret Data

+V_DDR_REFB

+VREF_CB

0.75VR_EN#

0.75VR_EN<52>

100K_0402_5%

2N7002DW-T/R7_SOT363-6

SUSP<6,40,43,45>

Deciphered Date

Deciphered Date

Deciphered Date

JDDRL

1

VREF_DQ

3

VSS2

5

DQ0

7

DQ1

9

VSS4

DM0

VSS5

DQ2

DQ3

VSS7

DQ8

DQ9

VSS9

DQS#1

DQS1

VSS11

DQ10

DQ11

VSS13

DQ16

DQ17

VSS15

DQS#2

DQS2

VSS18

DQ18

DQ19

VSS20

DQ24

DQ25

VSS22

DM3

VSS23

DQ26

DQ27

VSS25

CKE0

VDD1

NC1

79

BA2

81

VDD3

A12/BC#

A9

VDD5

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

CK0

CK0#

VDD11

A10/AP

BA0

VDD13

WE#

CAS#

VDD15

A13

S1#

VDD17

NCTEST

VSS27

DQ32

DQ33

VSS29

DQS#4

DQS4

VSS32

DQ34

DQ35

VSS34

DQ40

DQ41

VSS36

DM5

VSS37

DQ42

DQ43

VSS39

DQ48

DQ49

VSS41

DQS#6

DQS6

VSS44

DQ50

DQ51

VSS46

DQ56

DQ57

VSS48

DM7

VSS49

DQ58

DQ59

VSS51

SA0

VDDSPD

SA1

VTT1

G1

LCN_DAN06-K4526-0101

CONN@

4

DQS#0

DQS0

VSS10

RESET#

VSS12

VSS14

VSS16

VSS17

VSS19

VSS21

DQS#3

VSS24

VSS26

VDD10

VDD12

VDD14

VDD16

VDD18

VREF_CA

VSS28

VSS30

VSS31

VSS33

VSS35

DQS#5

VSS38

VSS40

VSS42

VSS43

VSS45

VSS47

DQS#7

VSS50

VSS52

EVENT#

4

VSS1

VSS3

VSS6

VSS8

DQ12

DQ13

DQ14

DQ15

DQ20

DQ21

DQ22

DQ23

DQ28

DQ29

DQS3

DQ30

DQ31

CKE1

VDD2

VDD4

VDD6

VDD8

CK1#

RAS#

ODT0

ODT1

DQ36

DQ37

DQ38

DQ39

DQ44

DQ45

DQS5

DQ46

DQ47

DQ52

DQ53

DQS7

+1.5V

2

4

DQ4

6

DQ5

DDR_A_D4

8

DDR_A_D5

10

12

DDR_A_DQS#0

14

16

DDR_A_DQS0

DQ6

18

DQ7

20

DDR_A_D6

DDR_A_D7

22

24

26

DDR_A_D12

DDR_A_D13

28

DM1

30

32

DDR_A_DM1

34

SM_DRAMRST#

36

DDR_A_D14

38

DDR_A_D15

40

42

DDR_A_D20

44

DDR_A_D21

46

DM2

48

50

DDR_A_DM2

52

DDR_A_D22

54

DDR_A_D23

56

58

60

DDR_A_D28

62

DDR_A_D29

64

DDR_A_DQS#3

66

68

DDR_A_DQS3

70

72

DDR_A_D30

DDR_A_D31

74

76

DDRA_CKE1

78

A15

80

A14

82

DDR_A_MA15

DDR_A_MA14

84

A11

86

DDR_A_MA11

A7

88

90

DDR_A_MA7

A6

92

A4

94

DDR_A_MA6

DDR_A_MA4

96

A2

98

DDR_A_MA2

A0

100

102

DDR_A_MA0

CK1

104

DDRA_CLK1

106

DDRA_CLK1#

108

BA1

110

112

DDR_A_BS1

114

DDR_A_RAS#

S0#

116

118

DDRA_SCS0#

DDRA_ODT0

120

122

NC2

DDRA_ODT1

124

126

128

130

132

DDR_A_D36

134

136

DDR_A_D37

DM4

138

140

DDR_A_DM4

142

DDR_A_D38

144

146

DDR_A_D39

148

150

DDR_A_D44

152

DDR_A_D45

154

156

DDR_A_DQS#5

158

DDR_A_DQS5

160

162

DDR_A_D46

DDR_A_D47

164

166

168

DDR_A_D52

DDR_A_D53

170

DM6

172

DDR_A_DM6

174

DQ54

176

DQ55

178

DDR_A_D54

DDR_A_D55

180

DQ60

182

DQ61

184

DDR_A_D60

DDR_A_D61

186

188

190

DDR_A_DQS#7

192

DDR_A_DQS7

DQ62

194

DQ63

DDR_A_D62

196

DDR_A_D63

198

200

SDA

202

SCL

PM_SMBDATA

204

VTT2

PM_SMBCLK

206

G2

0.65A@0.75V

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

+0.75VS

SM_DRAMRST# <7,12>

DDRA_CKE1 <7>

DDRA_CLK1 <7>

DDRA_CLK1# <7>

DDR_A_BS1 <7>

DDR_A_RAS# <7 >

DDRA_SCS0# <7 >

DDRA_ODT0 <7>

DDRA_ODT1 <7>

PM_SMBDATA <12,26,36,39>

PM_SMBCLK <12,26,36,39>

5

1

+1.5V

R55

2

1K_0402_1%

1

1

1

R57

1

2

2

2

C133

2

1K_0402_1%

C134

CD1

0.1U_0402_10V6K

2.2U_0603_6.3V4Z

0.1U_0402_10V6K

DDRA_CKE0<7>

DDR_A_BS2<7>

DDRA_CLK0<7>

DDRA_CLK0#<7>

DDR_A_BS0<7>

DDR_A_WE#<7>

DDR_A_CAS#<7>

DDRA_SCS1#<7>

1

+3VS

5

1

2

C160

2

C161

2.2U_0603_6.3V4Z

0.1U_0402_10V6K

DDR_A_D0

DDR_A_D1

DDR_A_DM0

DDR_A_D2

DDR_A_D3

DDR_A_D8

DDR_A_D9

DDR_A_DQS#1

DDR_A_DQS1

DDR_A_D10

DDR_A_D11

DDR_A_D16

DDR_A_D17

DDR_A_DQS#2

DDR_A_DQS2

DDR_A_D18

DDR_A_D19

DDR_A_D24

DDR_A_D25

DDR_A_DM3

DDR_A_D26

DDR_A_D27

DDRA_CKE0

DDR_A_BS2

DDR_A_MA12

DDR_A_MA9

DDR_A_MA8

DDR_A_MA5

DDR_A_MA3

DDR_A_MA1

DDRA_CLK0

DDRA_CLK0#

DDR_A_MA10

DDR_A_BS0

DDR_A_WE#

DDR_A_CAS#

DDR_A_MA13

DDRA_SCS1#

DDR_A_D32

DDR_A_D33

DDR_A_DQS#4

DDR_A_DQS4

DDR_A_D34

DDR_A_D35

DDR_A_D40

DDR_A_D41

DDR_A_DM5

DDR_A_D42

DDR_A_D43

DDR_A_D48

DDR_A_D49

DDR_A_DQS#6

DDR_A_DQS6

DDR_A_D50

DDR_A_D51

DDR_A_D56

DDR_A_D57

DDR_A_DM7

DDR_A_D58

DDR_A_D59

1

R67

2

10K_0402_5%

+1.5V

3A@1.5V

3A@1.5V

3A@1.5V3A@1.5V

DDR3 SO-DIMM A

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

83

85

87

89

101

103

105

107

109

111

113

115

117

119

121

123

125

127

129

131

133

135

137

139

141

143

145

147

149

151

153

155

157

159

161

163

165

167

169

171

173

175

177

179

181

183

185

187

189

191

193

195

197

199

201

203

1

205

R68

2

10K_0402_5%

3

DDR_B_D[0..63]<7>

DDR_B_DQS[0..7]<7>

DDR_B_DQS#[0..7]<7>

DDR_B_MA[0..15]<7>

+1.5V

1

RD12
1K_0402_1%

2

+VREF_CB

1

RD13
1K_0402_1%

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

DQS#0

VSS10

VSS12

VSS14

VSS16

VSS17

VSS19

VSS21

DQS#3

VSS24

VSS26

VDD10

VDD12

VDD14

VDD16

VDD18

VSS28

VSS30

VSS31

VSS33

VSS35

DQS#5

VSS38

VSS40

VSS42

VSS43

VSS45

VSS47

DQS#7

VSS50

VSS52

VSS1

VSS3

DQS0

VSS6

VSS8

DQ12

DQ13

DQ14

DQ15

DQ20

DQ21

DQ22

DQ23

DQ28

DQ29

DQS3

DQ30

DQ31

CKE1

VDD2

VDD4

VDD6

VDD8

CK1#

RAS#

ODT0

ODT1

DQ36

DQ37

DQ38

DQ39

DQ44

DQ45

DQS5

DQS7

4

+1.5V

2

4

DQ4

6

DDR_B_D4

DQ5

8

DDR_B_D5

10

12

DDR_B_DQS#0

14

DDR_B_DQS0

16

DQ6

18

DQ7

DDR_B_D6

20

DDR_B_D7

22

24

DDR_B_D12

26

DDR_B_D13

28

DM1

30

DDR_B_DM1

32

34

SM_DRAMRST#

36

DDR_B_D14

38

DDR_B_D15

40

42

DDR_B_D20

44

DDR_B_D21

46

DM2

48

DDR_B_DM2

50

52

54

DDR_B_D22

DDR_B_D23

56

58

DDR_B_D28

60

DDR_B_D29

62

64

DDR_B_DQS#3

66

DDR_B_DQS3

68

70

DDR_B_D30

72

DDR_B_D31

74

76

78

DDRB_CKE1

A15

80

A14

82

DDR_B_MA15

DDR_B_MA14

84

A11

86

DDR_B_MA11

A7

88

DDR_B_MA7

90

A6

92

A4

DDR_B_MA6

94

DDR_B_MA4

96

A2

98

DDR_B_MA2

A0

100

102

DDR_B_MA0

CK1

104

DDRB_CLK1

106

DDRB_CLK1#

108

BA1

110

112

DDR_B_BS1

DDR_B_RAS#

114

S0#

116

DDRB_SCS0#

118

DDRB_ODT0

120

122

DDRB_ODT1

NC2

124

126

128

+VREF_CB

130

132

134

DDR_B_D36

DDR_B_D37

136

DM4

138

DDR_B_DM4

140

142

DDR_B_D38

144

146

DDR_B_D39

148

DDR_B_D44

150

DDR_B_D45

152

154

156

DDR_B_DQS#5

DDR_B_DQS5

158

DQ46

160

DQ47

162

DDR_B_D46

DDR_B_D47

164

DQ52

166

DQ53

DDR_B_D52

168

DDR_B_D53

170

DM6

172

174

DDR_B_DM6

DQ54

176

DQ55

DDR_B_D54

178

DDR_B_D55

180

DQ60

182

DQ61

DDR_B_D60

184

DDR_B_D61

186

188

DDR_B_DQS#7

190

192

DDR_B_DQS7

DQ62

194

DQ63

DDR_B_D62

196

198

DDR_B_D63

200

SDA

202

SCL

204

PM_SMBDATA

VTT2

PM_SMBCLK

206

G2

0.65A@0.75V

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

4

SM_DRAMRST# <7,11>

DDRB_CKE1 <7>

DDRB_CLK1 <7>

DDRB_CLK1# <7>

DDR_B_BS1 <7>

DDR_B_RAS# <7 >

DDRB_SCS0# <7 >

DDRB_ODT0 <7>

DDRB_ODT1 <7>

PM_SMBDATA <11,26,36,39>

PM_SMBCLK <11,26,36,39>

+0.75VS

2.2U_0603_6.3V4Z

0.1U_0402_10V6K

1

1

C168

C167

2

2

+V_DDR_REFB

1

2

CD27

0.1U_0402_10V6K

1

C185

2

5

+1.5V

3A@1.5V

3A@1.5V

3A@1.5V3A@1.5V

JDDRH

1

1

DDR_B_D0

2

DDR_B_D1

CD28

DDR_B_DM0

2.2U_0603_6.3V4Z

DDR_B_D2

DDR_B_D3

DDR_B_D8

DDR_B_D9

DDR_B_DQS#1

DDR_B_DQS1

DDR_B_D10

DDR_B_D11

DDR_B_D16

DDR_B_D17

DDR_B_DQS#2

DDR_B_DQS2

DDR_B_D18

DDR_B_D19

DDR_B_D24

DDR_B_D25

DDR_B_DM3

DDR_B_D26

DDR_B_D27

DDRB_CKE0

DDR_B_BS2

DDR_B_MA12

DDR_B_MA9

DDR_B_MA8

DDR_B_MA5

DDR_B_MA3

DDR_B_MA1

DDRB_CLK0

DDRB_CLK0#

DDR_B_MA10

DDR_B_BS0

DDR_B_WE#

DDR_B_CAS#

DDR_B_MA13

DDRB_SCS1#

DDR_B_D32

DDR_B_D33

DDR_B_DQS#4

DDR_B_DQS4

DDR_B_D34

DDR_B_D35

DDR_B_D40

DDR_B_D41

DDR_B_DM5

DDR_B_D42

DDR_B_D43

DDR_B_D48

DDR_B_D49

DDR_B_DQS#6

DDR_B_DQS6

DDR_B_D50

DDR_B_D51

DDR_B_D56

DDR_B_D57

DDR_B_DM7

DDR_B_D58

DDR_B_D59

2

1

R76

0.1U_0402_10V6K

2.2U_0603_6.3V4Z

10K_0402_5%

1

1

C186

R77 10K_0402_5%

2

5

VREF_DQ

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

83

101

103

105

107

109

111

113

115

117

119

121

123

125

127

129

131

133

135

137

139

141

143

145

147

149

151

153

155

157

159

161

163

165

167

169

171

173

175

177

179

181

183

185

187

189

191

193

195

197

199

201

203

2

205

DQS1

VSS11

DQ10

DQ11

VSS13

DQ16

DQ17

VSS15

DQS#2

DQS2

VSS18

DQ18

DQ19

VSS20

DQ24

DQ25

VSS22

DM3

VSS23

DQ26

DQ27

VSS25

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

CK0

CK0#

VDD11

A10/AP

BA0

VDD13

WE#

CAS#

VDD15

A13

S1#

VDD17

NCTEST

VSS27

DQ32

DQ33

VSS29

DQS#4

DQS4

VSS32

DQ34

DQ35

VSS34

DQ40

DQ41

VSS36

DM5

VSS37

DQ42

DQ43

VSS39

DQ48

DQ49

VSS41

DQS#6

DQS6

VSS44

DQ50

DQ51

VSS46

DQ56

DQ57

VSS48

DM7

VSS49

DQ58

DQ59

VSS51

SA0

VDDSPD

SA1

VTT1

G1

LCN_DAN06-K4926-0101

CONN@

RESET#

VREF_CA

EVENT#

1

+1.5V

RD10

2

1K_0402_1%

1

1

RD11

2

2

CD51

1K_0402_1%

D

0.1U_0402_10V6K

C

DDRB_CKE0<7>

DDR_B_BS2<7>

DDRB_CLK0<7>

DDRB_CLK0#<7>

DDR_B_BS0<7>

DDR_B_WE#<7>

DDR_B_CAS#<7>

DDRB_SCS1#<7>

B

A

+3VS

2

+1.5V

1

+

2

C141

330U 2V Y D2 LESR9M

2

Layout Note:

10U_0603_6.3V6M

Place near JDDRH

10U_0603_6.3V6M

C171

1

2

C173

10U_0603_6.3V6M

1

C172

1

2

2

Layout Note: Place these 4 Caps near
Command and Control signals of JDDRH

+1.5V

0.1U_0402_10V6K
C177

0.1U_0402_10V6K

1

C178

1

2

2

Layout Note:
Place near JDDRH.203 and 204

+0.75VS

1U_0603_10V4Z

C181

1

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

1

10U_0603_6.3V6M

C174

1

2

0.1U_0402_10V6K

1

2

1U_0603_10V4Z

1U_0603_10V4Z

C182

1

1

2

2

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

10U_0603_6.3V6M

10U_0603_6.3V6M

C176

C175

1

1

2

2

0.1U_0402_10V6K

C179

C180

1

2

1U_0603_10V4Z

C370

22U_0805_6.3V6M

C184

C183

1

1

2

2

1

10U_0603_6.3V6M

10U_0603_6.3V6M

CD49

CD48

1

1

@

@

2

2

D

C

B

A

B

B

12 60Friday, August 24, 2012

12 60Friday, August 24, 2012

12 60Friday, August 24, 2012

B

of

of

of

PCIE_GTX_C_CRX_P[0..15]<5>

PCIE_GTX_C_CRX_N[0..15]<5>

PCIE_CTX_C_GRX_P[0..15]<5>

PCIE_CTX_C_GRX_N[0..15]<5>

1

PCIE:80ohm+_10%
45~50ohm+_10%

PCIE_GTX_C_CRX_P15

PCIE_GTX_C_CRX_N15

PCIE_GTX_C_CRX_P14

PCIE_GTX_C_CRX_N14

PCIE_GTX_C_CRX_P13

PCIE_GTX_C_CRX_N13

PCIE_GTX_C_CRX_P12

PCIE_GTX_C_CRX_N12

PCIE_GTX_C_CRX_P11

PCIE_GTX_C_CRX_N11

2

PCIE_GTX_C_CRX_P10

PCIE_GTX_C_CRX_N10

PCIE_GTX_C_CRX_P9

PCIE_GTX_C_CRX_N9

PCIE_GTX_C_CRX_P8

PCIE_GTX_C_CRX_N8

PCIE_GTX_C_CRX_P7

PCIE_GTX_C_CRX_N7

PCIE_GTX_C_CRX_P6

PCIE_GTX_C_CRX_N6

PCIE_GTX_C_CRX_P5

PCIE_GTX_C_CRX_N5

PCIE_GTX_C_CRX_P4

PCIE_GTX_C_CRX_N4

PCIE_GTX_C_CRX_P3

PCIE_GTX_C_CRX_N3

PCIE_GTX_C_CRX_P2

PCIE_GTX_C_CRX_N2

PCIE_GTX_C_CRX_P1

PCIE_GTX_C_CRX_N1

PCIE_GTX_C_CRX_P0

PCIE_GTX_C_CRX_N0

+3VS_DGPU

termination

3

RV36 default unmount




RV165 0_0402_5%OPT@

RV166 0_0402_5%OPT@

VID_0

RV167 0_0402_5%OPT@

VID_1

RV168 0_0402_5%OPT@

VID_2

RV169 0_0402_5%OPT@

VID_3

RV170 0_0402_5%OPT@

VID_4

VID_5

4

A

PCIE_GTX_C_CRX_P[0..15]

PCIE_GTX_C_CRX_N[0..15]

PCIE_CTX_C_GRX_P[0..15]

PCIE_CTX_C_GRX_N[0..15]

2

1

C16 0.1U_0402_16V7KOPT@

2

1

C17 0.1U_0402_16V7KOPT@

2

1

C20 0.1U_0402 _16V7KOPT@

2

1

C18 0.1U_0402_16V7KOPT@

2

1

C19 0.1U_0402_16V7KOPT@

2

1

C21 0.1U_0402_16V7KOPT@

2

1

C22 0.1U_0402_16V7KOPT@

2

1

C23 0.1U_0402_16V7KOPT@

2

1

C24 0.1U_0402_16V7KOPT@

2

1

C25 0.1U_0402_16V7 KOPT@

2

1

C26 0.1U_0402_16V7KOPT@

2

1

C28 0.1U_0402 _16V7KOPT@

2

1

C29 0.1U_040 2_16V7KOPT@

2

1

C27 0.1U_0402_16V7KOPT@

2

2

1

1

C32 0.1U_040 2_16V7KOPT@

C30 0.1U_0402_16V7KOPT@

2

1

C31 0.1U_0402_16V7KOPT@

2

1

C33 0.1U_0402_16V7KOPT@

2

1

C35 0.1U_0402_ 16V7KOPT@

2

1

C34 0.1U_0402_16V7KOPT@

2

1

C37 0.1U_0402 _16V7KOPT@

2

1

C36 0.1U_0402_16V7KOPT@

2

1

C39 0.1U_0402_ 16V7KOPT@

2

1

C38 0.1U_0402_16V7KOPT@

2

1

C40 0.1U_0402 _16V7KOPT@

2

1

C45 0.1U_0402_ 16V7KOPT@

2

1

C46 0.1U_0402_16V7 KOPT@

2

1

C116 0.1U_0402_16V7KOPT@

2

1

C48 0.1U_0402_16V7KOPT@

2

1

C213 0.1U_0402_16V7KOPT@

2

1

C226 0.1U_0402_16V7KOPT@

2

1

C47 0.1U_0402_16V7KOPT@

2

1

OPT@

RV48 10K_040 2_5%

PEG_CLKREQ#<26>

PLTRST_VGA#<28>

PEX_TERMP: used for internal calibration.

1

1

1

@

@

@

2

2

2

RV160 10 K_0402_5%

RV159 10 K_0402_5%

2

1

2

1

2

1

2

1

2

1

2

1

A

RV161 10 K_0402_5%

1

1

1

RV17110K_0402_5%

RV17310K_0402_5%

RV17210K_04 02_5%

OPT@

OPT@

OPT@

2

2

2

CLK_PCIE_VGA<26>

CLK_PCIE_VGA#<26>

RV36 200_0402 _1%@

RV37 2.49K_0402_1%O PT@

+3VS_DGPU

1

@

2

RV162 10K_0 402_5%

1

RV17410K_ 0402_5%

OPT@

2

1

1

OPT@

OPT@

2

2

RV163 10 K_0402_5%

1

RV17510K_0402_5%

@

2

PCIE_CTX_C_GRX_P15

PCIE_CTX_C_GRX_N15

PCIE_CTX_C_GRX_P14

PCIE_CTX_C_GRX_N14

PCIE_CTX_C_GRX_P13

PCIE_CTX_C_GRX_N13

PCIE_CTX_C_GRX_P12

PCIE_CTX_C_GRX_N12

PCIE_CTX_C_GRX_P11

PCIE_CTX_C_GRX_N11

PCIE_CTX_C_GRX_P10

PCIE_CTX_C_GRX_N10

PCIE_CTX_C_GRX_P9

PCIE_CTX_C_GRX_N9

PCIE_CTX_C_GRX_P8

PCIE_CTX_C_GRX_N8

PCIE_CTX_C_GRX_P7

PCIE_CTX_C_GRX_N7

PCIE_CTX_C_GRX_P6

PCIE_CTX_C_GRX_N6

PCIE_CTX_C_GRX_P5

PCIE_CTX_C_GRX_N5

PCIE_CTX_C_GRX_P4

PCIE_CTX_C_GRX_N4

PCIE_CTX_C_GRX_P3

PCIE_CTX_C_GRX_N3

PCIE_CTX_C_GRX_P2

PCIE_CTX_C_GRX_N2

PCIE_CTX_C_GRX_P1

PCIE_CTX_C_GRX_N1

PCIE_CTX_C_GRX_P0

PCIE_CTX_C_GRX_N0

PCIE_GTX_CRX_P15

PCIE_GTX_CRX_N15

PCIE_GTX_CRX_P14

PCIE_GTX_CRX_N14

PCIE_GTX_CRX_P13

PCIE_GTX_CRX_N13

PCIE_GTX_CRX_P12

PCIE_GTX_CRX_N12

PCIE_GTX_CRX_P11

PCIE_GTX_CRX_N11

PCIE_GTX_CRX_P10

PCIE_GTX_CRX_N10

PCIE_GTX_CRX_P9

PCIE_GTX_CRX_N9

PCIE_GTX_CRX_P8

PCIE_GTX_CRX_N8

PCIE_GTX_CRX_P7

PCIE_GTX_CRX_N7

PCIE_GTX_CRX_P6

PCIE_GTX_CRX_N6

PCIE_GTX_CRX_P5

PCIE_GTX_CRX_N5

PCIE_GTX_CRX_P4

PCIE_GTX_CRX_N4

PCIE_GTX_CRX_P3

PCIE_GTX_CRX_N3

PCIE_GTX_CRX_P2

PCIE_GTX_CRX_N2

PCIE_GTX_CRX_P1

PCIE_GTX_CRX_N1

PCIE_GTX_CRX_P0

PCIE_GTX_CRX_N0

RV164 10K_0 402_5%

1

RV17610K_0402_5%

@

2

PEX_TSTCLK_OUT+

PEX_TSTCLK_OUT-

PEX_TREMP

GPU_VID0 <57>

GPU_VID1 <57>

GPU_VID2 <57>

GPU_VID3 <57>

GPU_VID4 <57>

GPU_VID5 <57>

B

UV1A

AN12

PEX_RX0

AM12

PEX_RX0_N

AN14

PEX_RX1

AM14

PEX_RX1_N

AP14

PEX_RX2

AP15

PEX_RX2_N

AN15

PEX_RX3

AM15

PEX_RX3_N

AN17

PEX_RX4

AM17

PEX_RX4_N

AP17

PEX_RX5

AP18

PEX_RX5_N

AN18

PEX_RX6

AM18

PEX_RX6_N

AN20

PEX_RX7

AM20

PEX_RX7_N

AP20

PEX_RX8

AP21

PEX_RX8_N

AN21

PEX_RX9

AM21

PEX_RX9_N

AN23

PEX_RX10

AM23

PEX_RX10_N

AP23

PEX_RX11

AP24

PEX_RX11_N

AN24

PEX_RX12

AM24

PEX_RX12_N

AN26

PEX_RX13

AM26

PEX_RX13_N

AP26

PEX_RX14

AP27

PEX_RX14_N

AN27

PEX_RX15

AM27

PEX_RX15_N

AK14

PEX_TX0

AJ14

PEX_TX0_N

AH14

PEX_TX1

AG14

PEX_TX1_N

AK15

PEX_TX2

AJ15

PEX_TX2_N

AL16

PEX_TX3

AK16

PEX_TX3_N

AK17

PEX_TX4

AJ17

PEX_TX4_N

AH17

PEX_TX5

AG17

PEX_TX5_N

AK18

PEX_TX6

AJ18

PEX_TX6_N

AL19

PEX_TX7

AK19

PEX_TX7_N

AK20

PEX_TX8

AJ20

PEX_TX8_N

AH20

PEX_TX9

AG20

PEX_TX9_N

AK21

PEX_TX10

AJ21

PEX_TX10_N

AL22

PEX_TX11

AK22

PEX_TX11_N

AK23

PEX_TX12

AJ23

PEX_TX12_N

AH23

PEX_TX13

AG23

PEX_TX13_N

AK24

PEX_TX14

AJ24

PEX_TX14_N

AL25

PEX_TX15

AK25

PEX_TX15_N

AJ11

PEX_WAKE_N

AL13

PEX_REFCLK

AK13

PEX_REFCLK_N

AK12

PEX_CLKREQ_N

AJ26

PEX_TSTCLK_OUT

AK26

PEX_TSTCLK_OUT_N

AJ12

PEX_RST_N

AP29

PEX_TERMP

N13P-GLP-A1 FCBGA 908P GPU

OPT@

XTALOUT

10P_0402_50V8J

1

I2CS_SCL

DMN66D0LDW-7_SOT363-6

OPT@

4

I2CS_SDA

B

OPT@

2

QV6A

5

QV6B

Part 1 of 7

4

1

CV46

+3VS_DGPU

OPT@

+3VS_DGPU

GPIO0

GPIO1

GPIO2

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

GPIO8

GPIO9

GPIO10

GPIO11

GPIO12

GPIO13

GPIO14

GPIO15

GPIO

GPIO16

GPIO17

GPIO18

GPIO19

GPIO20

GPIO21

DACA_RED

DACA_GREEN

DACA_BLUE

DACA_HSYNC

DACA_VSYNC

DACs

DACA_VDD

DACA_VREF

DACA_RSET

I2CA_SCL

I2CA_SDA

PCI EXPRESS

I2CB_SCL

I2CB_SDA

I2CC_SCL

I2CC_SDA

I2C

I2CS_SCL

I2CS_SDA

PLLVDD

SP_PLLVDD

VID_PLLVDD

XTAL_IN

XTAL_OUT

CLK

XTAL_OUTBUFF

XTAL_SSIN

@

RV55 1M_0402_5%

YV1

Crystal

3

GND

OUT

2

GND

IN

27MHZ_10PF_7V2700005 0

OPT@

6

EC_SMB_CK2 <26,41>

RV35 0_0402_5%@

I2CS_SCL

RV40

@

0_0402_5%

I2CS_SDA

3

EC_SMB_DA2 <26,41>

P6

M3

L6

P5

P7

VID_4

L7

VID_3

M7

N8

M1

M2

VID_1

L1

VID_2

M5

N3

M4

N4

P2

VID_0

R8

GPS_DOWN#

VID_5

M6

R1

P3

P4

P1

AK9

AL10

AL9

AM9

AN9

AG10

AP9

AP8

R4

R5

R7

VGA_CRT_CLK

R6

VGA_CRT_DATA

R2

R3

T4

VGA_LCD_CLK

T3

VGA_LCD_DATA

AD8

AE8

+PLLVDD

AD7

H3

H2

J4

H1

XTAL_OUTBUFF

XTAL_SSIN

XTALIN

XTALIN

OPT@

CV47

10P_0402_50V8J

C

RV30 10K_0402 _5%OPT@

RV29 10K_0402_5 %OPT@

RH168 3 30K_0402_5%OPT@

GPS_DOWN#

RH172

OPT@

2

1

10K_0402_5%

I2CB_SCL

I2CB_SDA

I2CS_SCL

I2CS_SDA

+PLLVDD

+GPU_PLLVDD

XTALIN

XTALOUT

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

+3VS_DGPU

+3VS_DGPU

5

UV2

1

P

IN1

4

O

2

IN2

G

TC7SH08FU(TE85L,F)

@

3

2

CH751H-40PT_SOD323-2

R270

@

2

1

0_0402_5%

2

1

R268 0_040 2_5%OPT@

I2CA/B/C: Master
I2CS: Slaver (for Internal Thermal Sensor)

+3VS_DGPU

DV6

@

LV10

+PLLVDD

@

2

R2660_0402_5%

2

R2670_0402_5%

@

1

EC_GPS_DOWN# <41>

猁ㄩ

30ohm, ESR=0.05

1

1

VGA_CRT_CLK

VGA_CRT_DATA

I2CB_SCL

I2CB_SDA

VGA_LCD_CLK

VGA_LCD_DATA

I2CS_SCL

I2CS_SDA

60mA




LV18

猁ㄩ

+GPU_PLLVDD

OPT@

2

1

2

1

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

180ohm, ESR=0.2

CV38

CV40

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+GPU_PLLVDD

90mA






RV45 10K_0 402_5%OPT@

RV52 10K_0402_5 %OPT@

XTAL_OUTBUFF

XTAL_SSIN

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

D

PSI: Phase shedding

PWR_GPS_DOWN# <41,5 7>

ACIN <27,41,48>

2.2K_0402_5%OPT@

2.2K_0402_5%OPT@

LV10

拸

CV42ㄛCV44

1

BLM18PG181SN1D_2P



22U_0805_6.3V6M





+3VS_DGPU

+1.05VS_DGPU

2

LV18

OPT@

2

+1.05VS_DGPU

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

RV39 2.2K_0402 _5%OPT@

RV38 2.2K_0402_5%OPT@

RV41 2.2K_0402_5%OPT@

RV42 2.2K_0402_5%OPT@

RV44

RV43 2.2K_0402_5%OPT@

RV46 2.2K_0402_5%OPT@

RV47

SM010018510--­SM01000FE00-­SM010007W00--

OPT@

30R@100MHz(ESR=0.5)

1

CV41

OPT@

BLM18PG330SN1D_0603

CV42

@

CV43

0.1U_0402_16V4Z

4.7U_0402_6.3V6M

OPT@



22U_0805_6.3V6M





DG

CV310

CV311

OPT@

OPT@

4.7U_0402_6.3V6M

PFH: Pixel-Clock Frequency Hopping Interface.
PFH can be implemented in system software with
NVAPI to reduce interference between graphic
and wireless networking modems.
Refer to SP-04941-001

D

GPIO I/O USAGE

GPIO0

GPIO1

GPIO2

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

GPIO8

GPIO9

GPIO10

GPIO11

GPIO12

GPIO13

GPIO14

GPIO15

GPIO16

GPIO17

GPIO18

GPIO19

GPIO20

GPIO21

CV44

OPT@

22U_0805_6.3V6M

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

4019IE

4019IE

4019IE

E

O

GPU Core VID4

GPU Core VID3

O

O

LCD_BL_PWM

O

LCD_VCC or PSI

O

LCD_BLEN

O

GPU Core VID1

O

GPU Core VID2

O

3D Vision

OVERT

I/O

I/O

ALERT

O

MEM_VREF_CTL

GPU Core VID0

O

I

PWR_LEVEL

GPU Core VID5

O

I

HPD_AB

HPD_C

I

MEM_VDD_CTL or PSI

O

HPD_D

I

HPD_E

I

HPD_F

I

Reserved

Reserved

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

13 60Friday, August 24, 2012

of

13 60Friday, August 24, 2012

of

13 60Friday, August 24, 2012

E

of

1

2

3

4

B

B

B

MDA[15..0]<18>

Part 2 of 7

MEMORY INTERFACE

MDA[31..16]<18>

MDA[47..32]<19>

MDA[63..48]<19>

FBA_CMD_RFU0

FBA_CMD_RFU1

A

FBA_WCK01_N

FBA_WCK23_N

FBA_WCK45_N

FBA_WCK67_N

FBA_WCKB01_N

FBA_WCKB23_N

FBA_WCKB45_N

FBA_WCKB67_N

FB_DLL_AVDD

FBA_PLL_AVDD

FBA_CMD0

FBA_CMD1

FBA_CMD2

FBA_CMD3

FBA_CMD4

FBA_CMD5

FBA_CMD6

FBA_CMD7

FBA_CMD8

FBA_CMD9

FBA_CMD10

FBA_CMD11

FBA_CMD12

FBA_CMD13

FBA_CMD14

FBA_CMD15

FBA_CMD16

FBA_CMD17

FBA_CMD18

FBA_CMD19

FBA_CMD20

FBA_CMD21

FBA_CMD22

FBA_CMD23

FBA_CMD24

FBA_CMD25

FBA_CMD26

FBA_CMD27

FBA_CMD28

FBA_CMD29

FBA_CMD30

FBA_CMD31

FBA_DEBUG0

FBA_DEBUG1

FBA_CLK0_N

FBA_CLK1_N

FBA_WCK01

FBA_WCK23

FBA_WCK45

FBA_WCK67

FBA_WCKB01

FBA_WCKB23

FBA_WCKB45

FBA_WCKB67

FB_CLAMP

VRAM Interface

UV1B

L28

FBA_D0

M29

FBA_D1

L29

MDA0

MDA1

MDA2

MDA3

MDA4

MDA5

MDA6

MDA7

MDA8

MDA9

MDA10

MDA11

MDA12

MDA13

MDA14

MDA15

MDA16

MDA17

MDA18

MDA19

MDA20

MDA21

MDA22

MDA23

MDA24

MDA25

MDA26

MDA27

MDA28

MDA29

MDA30

MDA31

MDA32

MDA33

MDA34

MDA35

MDA36

MDA37

MDA38

MDA39

MDA40

MDA41

MDA42

MDA43

MDA44

MDA45

1

DQMA[3..0]<18>

DQMA[7..4]<19>

DQSA[3..0]<18>

DQSA[7..4]<19>

DQSA#[3..0]<18>

DQSA#[7..4]<19>

MDA46

MDA47

MDA56

MDA57

MDA58

MDA59

MDA60

MDA61

MDA62

MDA63

MDA48

MDA49

MDA50

MDA51

MDA52

MDA53

MDA54

MDA55

DQMA0

DQMA1

DQMA2DQMA2

DQMA3

DQMA4DQMA4

DQMA5

DQMA6

DQMA7

DQSA0

DQSA1

DQSA2

DQSA3

DQSA4

DQSA5

DQSA6

DQSA7

DQSA#0

DQSA#1

DQSA#2

DQSA#3

DQSA#4

DQSA#5

DQSA#6

DQSA#7

FBA_D2

M28

FBA_D3

N31

FBA_D4

P29

FBA_D5

R29

FBA_D6

P28

FBA_D7

J28

FBA_D8

H29

FBA_D9

J29

FBA_D10

H28

FBA_D11

G29

FBA_D12

E31

FBA_D13

E32

FBA_D14

F30

FBA_D15

C34

FBA_D16

D32

FBA_D17

B33

FBA_D18

C33

FBA_D19

F33

FBA_D20

F32

FBA_D21

H33

FBA_D22

H32

FBA_D23

P34

FBA_D24

P32

FBA_D25

P31

FBA_D26

P33

FBA_D27

L31

FBA_D28

L34

FBA_D29

L32

FBA_D30

L33

FBA_D31

AG28

FBA_D32

AF29

FBA_D33

AG29

FBA_D34

AF28

FBA_D35

AD30

FBA_D36

AD29

FBA_D37

AC29

FBA_D38

AD28

FBA_D39

AJ29

FBA_D40

AK29

FBA_D41

AJ30

FBA_D42

AK28

FBA_D43

AM29

FBA_D44

AM31

FBA_D45

AN29

FBA_D46

AM30

FBA_D47

AN31

FBA_D48

AN32

FBA_D49

AP30

FBA_D50

AP32

FBA_D51

AM33

FBA_D52

AL31

FBA_D53

AK33

FBA_D54

AK32

FBA_D55

AD34

FBA_D56

AD32

FBA_D57

AC30

FBA_D58

AD33

FBA_D59

AF31

FBA_D60

AG34

FBA_D61

AG32

FBA_D62

AG33

FBA_D63

P30

FBA_DQM0

F31

FBA_DQM1

F34

FBA_DQM2

M32

FBA_DQM3

AD31

FBA_DQM4

AL29

FBA_DQM5

AM32

FBA_DQM6

AF34

FBA_DQM7

M31

FBA_DQS_WP0

G31

FBA_DQS_WP1

E33

FBA_DQS_WP2

M33

FBA_DQS_WP3

AE31

FBA_DQS_WP4

AK30

FBA_DQS_WP5

AN33

FBA_DQS_WP6

AF33

FBA_DQS_WP7

M30

FBA_DQS_RN0

H30

FBA_DQS_RN1

E34

FBA_DQS_RN2

M34

FBA_DQS_RN3

AF30

FBA_DQS_RN4

AK31

FBA_DQS_RN5

AM34

FBA_DQS_RN6

AF32

FBA_DQS_RN7

N13P-GLP-A1 FCBGA 908P GPU

OPT@

FBA_CLK0

FBA_CLK1

FB_VREF

U30

T31

U29

R34

R33

U32

U33

U28

V28

V29

V30

U34

U31

V34

V33

Y32

AA31

AA29

AA28

AC34

AC33

AA32

AA33

Y28

Y29

W31

Y30

AA34

Y31

Y34

Y33

V31

R32

AC32

R28

AC28

R30

R31

AB31

AC31

K31

L30

H34

J34

AG30

AG31

AJ34

AK34

J30

J31

J32

J33

AH31

AJ31

AJ32

AJ33

E1

K27

U27

H26

MDA[15..0]

MDA[31..16]

MDA[47..32]

MDA[63..48]

CMDA[30..0] <18,19>

CMDA0

CMDA1

CMDA2

CMDA3

CMDA4

CMDA5

CMDA6

CMDA7

CMDA8

CMDA9

CMDA10

CMDA11

CMDA12

CMDA13

CMDA14

CMDA15

CMDA16

CMDA17

CMDA18

CMDA19

CMDA20

CMDA21

CMDA22

CMDA23

CMDA24

CMDA25

CMDA26

CMDA27

CMDA28

CMDA29

CMDA30

RV57, RV58, RV59, RV60 change BS from
"OPT@" to "@".--Design Guide. Joyce 1018

2

1

RV57 60.4_0402 _1%@

FBA_DEBUG0

2

FBA_DEBUG1

RV59 60.4_0402_1%@

FB_CLAMP:
Leave as NC for N13P-PES/-GL/-GLP/-NS1
and N13M-GE1/NS1;
Pull down with a 10K on N13P-GV, N13M-GS,
N13E-GE,N13P-GT/-GS/-LP and N14-Q1/-Q3.

RV152

@

10K_0402_5%

+FB_PLLAVDD

66mA

CV49

0.1U_0402_16V4Z

OPT@

CV49 Under GPU
close to ball : U27

1

CLKA0 <18>

CLKA0# <18>

CLKA1 <19>

CLKA1# <19>

OPT@

+1.5VSDGPU

+FB_PLLAVDD

CV50

0.1U_0402_16V4Z

CV50 Under GPU
close to ball : K27

A

MDC0

MDC1

MDC2

MDC3

MDC4

MDC5

MDC6

MDC7

MDC8

MDC9

MDC10

MDC11

MDC12

MDC13

MDC14

MDC15

MDC16

MDC17

MDC18

MDC19

MDC20

MDC21

MDC22

MDC23

MDC24

MDC25

MDC26

MDC27

MDC28

MDC29

MDC30

MDC31

MDC32

MDC33

MDC34

MDC35

MDC36

MDC37

MDC38

MDC39

MDC40

MDC41

MDC42

MDC43

MDC44

MDC45

MDC46

MDC47

MDC48

MDC49

MDC50

MDC51

MDC52

MDC53

MDC54

MDC55

MDC56

MDC57

MDC58

MDC59

MDC60

MDC61

MDC62

DQMC[3..0]<20>

DQMC[7..4]<21>

DQSC[3..0]<20>

DQSC[7..4]<21>

DQSC#[3..0]<20>

DQSC#[7..4]<21>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

MDC63

DQMC0

DQMC1

DQMC2

DQMC3

DQMC4

DQMC5

DQMC6

DQMC7

DQSC0

DQSC1

DQSC2

DQSC3

DQSC4

DQSC5

DQSC6

DQSC7

DQSC#0

DQSC#1

DQSC#2

DQSC#3

DQSC#4

DQSC#5

DQSC#6

DQSC#7

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

MDC[15..0]<20>

MDC[31..16]<20>

MDC[47..32]<21>

MDC[63..48]<21>

UV1C

G9

FBB_D0

E9

FBB_D1

G8

FBB_D2

F9

FBB_D3

F11

FBB_D4

G11

FBB_D5

F12

FBB_D6

G12

FBB_D7

G6

FBB_D8

F5

FBB_D9

E6

FBB_D10

F6

FBB_D11

F4

FBB_D12

G4

FBB_D13

E2

FBB_D14

F3

FBB_D15

C2

FBB_D16

D4

FBB_D17

D3

FBB_D18

C1

FBB_D19

B3

FBB_D20

C4

FBB_D21

B5

FBB_D22

C5

FBB_D23

A11

FBB_D24

C11

FBB_D25

D11

FBB_D26

B11

FBB_D27

D8

FBB_D28

A8

FBB_D29

C8

FBB_D30

B8

FBB_D31

F24

FBB_D32

G23

FBB_D33

E24

FBB_D34

G24

FBB_D35

D21

FBB_D36

E21

FBB_D37

G21

FBB_D38

F21

FBB_D39

G27

FBB_D40

D27

FBB_D41

G26

FBB_D42

E27

FBB_D43

E29

FBB_D44

F29

FBB_D45

E30

FBB_D46

D30

FBB_D47

A32

FBB_D48

C31

FBB_D49

C32

FBB_D50

B32

FBB_D51

D29

FBB_D52

A29

FBB_D53

C29

FBB_D54

B29

FBB_D55

B21

FBB_D56

C23

FBB_D57

A21

FBB_D58

C21

FBB_D59

B24

FBB_D60

C24

FBB_D61

B26

FBB_D62

C26

FBB_D63

E11

FBB_DQM0

E3

FBB_DQM1

A3

FBB_DQM2

C9

FBB_DQM3

F23

FBB_DQM4

F27

FBB_DQM5

C30

FBB_DQM6

A24

FBB_DQM7

D10

FBB_DQS_WP0

D5

FBB_DQS_WP1

C3

FBB_DQS_WP2

B9

FBB_DQS_WP3

E23

FBB_DQS_WP4

E28

FBB_DQS_WP5

B30

FBB_DQS_WP6

A23

FBB_DQS_WP7

D9

FBB_DQS_RN0

E4

FBB_DQS_RN1

B2

FBB_DQS_RN2

A9

FBB_DQS_RN3

D22

FBB_DQS_RN4

D28

FBB_DQS_RN5

A30

FBB_DQS_RN6

B23

FBB_DQS_RN7

N13P-GLP-A1 FCBGA 908P GPU

OPT@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Part 3 of 7

MDC[15..0]

MDC[31..16]

MDC[47..32]

MDC[63..48]

MEMORY INTERFACE B

FBB_CMD0

FBB_CMD1

FBB_CMD2

FBB_CMD3

FBB_CMD4

FBB_CMD5

FBB_CMD6

FBB_CMD7

FBB_CMD8

FBB_CMD9

FBB_CMD10

FBB_CMD11

FBB_CMD12

FBB_CMD13

FBB_CMD14

FBB_CMD15

FBB_CMD16

FBB_CMD17

FBB_CMD18

FBB_CMD19

FBB_CMD20

FBB_CMD21

FBB_CMD22

FBB_CMD23

FBB_CMD24

FBB_CMD25

FBB_CMD26

FBB_CMD27

FBB_CMD28

FBB_CMD29

FBB_CMD30

FBB_CMD31

FBB_CMD_RFU0

FBB_CMD_RFU1

FBB_DEBUG0

FBB_DEBUG1

FBB_CLK0

FBB_CLK0_N

FBB_CLK1

FBB_CLK1_N

FBB_WCK01

FBB_WCK01_N

FBB_WCK23

FBB_WCK23_N

FBB_WCK45

FBB_WCK45_N

FBB_WCK67

FBB_WCK67_N

FBB_WCKB01

FBB_WCKB01_N

FBB_WCKB23

FBB_WCKB23_N

FBB_WCKB45

FBB_WCKB45_N

FBB_WCKB67

FBB_WCKB67_N

FBB_PLL_AVDD

D13

E14

F14

A12

CMDC0

B12

CMDC1

C14

CMDC2

B14

CMDC3

G15

CMDC4

F15

CMDC5

E15

CMDC6

D15

CMDC7

A14

CMDC8

D14

CMDC9

A15

CMDC10

B15

CMDC11

C17

CMDC12

D18

CMDC13

E18

CMDC14

F18

CMDC15

A20

CMDC16

B20

CMDC17

C18

CMDC18

B18

CMDC19

G18

CMDC20

G17

CMDC21

F17

CMDC22

D16

CMDC23

A18

CMDC24

D17

CMDC25

A17

CMDC26

B17

CMDC27

E17

CMDC28

CMDC29

CMDC30

C12

C20

G14

G20

FBB_DEBUG0

FBB_DEBUG1

D12

E12

E20

F20

F8

E8

A5

A6

D24

D25

B27

C27

D6

D7

C6

B6

F26

E26

A26

A27

H17

+FB_PLLAVDD

66mA35mA

FBB_PLL_AVDD Design Guide:

100nF X7R 0402 1pcs per pin under GPU

22uF X5R 0805 1pcs per pin Near GPU

bead--30ohm@100MHz (ESR=0.01ohm) 0603 1pcs Near GPU

CMDC[30..0] <20,21>

2

1

RV58 60.4_0402 _1%@

2

RV60 60.4_0402_ 1%@

CV48

OPT@

0.1U_0402_16V4Z

CV48 Under GPU
close to ball : H17

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

+1.5VSDGPU

1

CLKC0 <20>

CLKC0# <20>

CLKC1 <21>

CLKC1# <21>

+FB_PLLAVDD

+FB_PLLAVDD

+FB_PLLAVDD

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

300mA

CV51

OPT@

1U_0402_6.3V6K

LV11

1

MPZ1608S300AT 0603

1

CV52

2

OPT@

22U_0805_6.3V6M

30ohm@100M // ESR=0.01
SM01000EQ00-­SM010031100--

1

OPT@

+1.05VS_DGPU

2

CV53

OPT@

1U_0402_6.3V6K

B

B

B

14 60Friday, August 24, 2012

of

14 60Friday, August 24, 2012

of

14 60Friday, August 24, 2012

of

1

RV69

@

4.99K_0402_1%

2

1

RV77

@

45.3K_0402_1%

2

1

1

RV70

@

4.99K_0402_1%

2

1

RV78

10K_0402_1%

2

Resistor
Values

5K

10K

15K

20K

25K

30K

35K

45K

+3VS_DGPU

1

2

1

2

Pull up
to 3V

1000 0000

1001 0001

1010 0010

1011 0011

1100 0100

1101 0101

1110 0110

1111 0111

RV71

@

4.99K_0402_1%

RV79

15K_0402_1%

Pull down
to GND

D

C

B

2

+3VS_DGPU

1

RV66

4.99K_0402_1%

2

1

RV74

@

10K_0402_1%

2

1

1

RV68

@

@

30K_0402_1%

2

2

RV67

34.8K_0402_1%

STRAP3

STRAP4

1

1

2

RV75

2

RV76

20K_0402_1%

4.99K_0402_1%

@

@

Logical
Strapping Bit2

RAM_CFG[2] RAM_CFG[1] RAM_CFG[0]

FB [0] VGA_DEVICE

USER [2] USER [1] USER [0]

3GIO_PAD_CFG_ADR[2] 3GIO_PAD_CFG_ADR[1] 3GIO_PAD_CFG_ADR[0]

PCI-DEVID [2] PCI-DEVID [1] PCI-DEVID [0]

SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED

CHANGE_GEN3

PEX_PLL_EN_TERM:
PLL termination setting

0

Disable (Default)

1 Enable

ROM_SI

ROM_SO

ROM_SCLK

Logical
Strapping Bit1

SMB_ALT_ADDR

PCIE_MAX_SPEED DP_PLL_VDD33V

Logical
Strapping Bit0

PCIE_MAX_SPEED

01Limited to PCIE GEN 1

PCIE GEN 2/3 capable

X76-

PAD

PAD

PAD

PAD

+3VS_DGPU

3

VCCSENSE_VGA <57>

VSSSENSE_VGA <57>

+3VS_DGPU

@

TV1

@

TV2

@

TV3

@

TV4

+3VS_DGPU

STRAP0

STRAP1

STRAP2

Straps

MULTI LEVEL STRAPS

1

RV64

45.3K_0402_1%

2

1

RV72

@

4.99K_0402_1%

2

Physical
strapping pin

ROM_SCLK

ROM_SI

ROM_SO

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

SUB_VENDOR

01No VBIOS ROM

BIOS ROM is present (Default)

FB [1:0]: N13x FB Aperture Size

0

RESERVED

1

RESERVED

256 MB (Default)

2

3 RESERVED

USER Straps

1111

EDID is used

others: DG-05587 Page195

3GIO_PAD_CFG

0000--0101 RESERVED

0110 Notebook (default)

0111--1111 RESERVED

1

RV65

@

4.99K_0402_1%

2

1

RV73

45.3K_0402_1%

2

Logical
Strapping Bit3

PCI_DEVID[4] SUB_VENDOR SLOT_CLK_CFG PEX_PLL_EN_TERM

RAM_CFG[3]

FB [1]

USER [3]

3GIO_PAD_CFG_ADR[3]

PCI-DEVID [3]

SOR3_EXPOSED

RESERVED PCIE_SPEED_

5

D

C

B

UV1D

AM6

IFPA_TXC

AN6

IFPA_TXC_N

AP3

IFPA_TXD0

AN3

IFPA_TXD0_N

AN5

IFPA_TXD1

AM5

IFPA_TXD1_N

AL6

IFPA_TXD2

AK6

IFPA_TXD2_N

AJ6

IFPA_TXD3

AH6

IFPA_TXD3_N

AJ9

IFPB_TXC

AH9

IFPB_TXC_N

AP6

IFPB_TXD4

AP5

IFPB_TXD4_N

AM7

IFPB_TXD5

AL7

IFPB_TXD5_N

AN8

IFPB_TXD6

AM8

IFPB_TXD6_N

AK8

IFPB_TXD7

AL8

IFPB_TXD7_N

AK1

IFPC_L0

AJ1

IFPC_L0_N

AJ3

IFPC_L1

AJ2

IFPC_L1_N

AH3

IFPC_L2

AH4

IFPC_L2_N

AG5

IFPC_L3

AG4

IFPC_L3_N

AM1

IFPD_L0

AM2

IFPD_L0_N

AM3

IFPD_L1

AM4

IFPD_L1_N

AL3

IFPD_L2

AL4

IFPD_L2_N

AK4

IFPD_L3

AK5

IFPD_L3_N

AD2

IFPE_L0

AD3

IFPE_L0_N

AD1

IFPE_L1

AC1

IFPE_L1_N

AC2

IFPE_L2

AC3

IFPE_L2_N

AC4

IFPE_L3

AC5

IFPE_L3_N

AE3

IFPF_L0

AE4

IFPF_L0_N

AF4

IFPF_L1

AF5

IFPF_L1_N

AD4

IFPF_L2

AD5

IFPF_L2_N

AG1

IFPF_L3

AF1

IFPF_L3_N

AG3

IFPC_AUX_I2CW_SCL

AG2

IFPC_AUX_I2CW_SDA_N

AK3

IFPD_AUX_I2CX_SCL

AK2

IFPD_AUX_I2CX_SDA_N

AB3

IFPE_AUX_I2CY_SCL

AB4

IFPE_AUX_I2CY_SDA_N

AF3

IFPF_AUX_I2CZ_SCL

AF2

IFPF_AUX_I2CZ_SDA_N

N13P-GLP-A1 FCBGA 908P GPU

OPT@

Part 4 of 7

LVDS/TMDS

4

NC

VDD_SENSE

GND_SENSE

TEST

TESTMODE

JTAG_TCK

JTAG_TDI

JTAG_TDO

JTAG_TMS

JTAG_TRST_N

SERIAL

ROM_CS_N

ROM_SCLK

ROM_SI

ROM_SO

GENERAL

BUFRST_N

MULTI_STRAP_REF0_GND

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

THERMDP

THERMDN

P8

NC

AC6

NC

AJ28

NC

AJ4

NC

AJ5

NC

AL11

NC

C15

NC

D19

NC

D20

NC

D23

NC

D26

NC

H31

NC

T8

NC

V32

NC

L4

L5

AK11

AM10

AM11

AP12

AP11

AN11

H6

H4

ROM_CS#

H5

ROM_SCLK

H7

ROM_SI

ROM_SO

ROM support: 512Kbit or greater, up to 50MHz.

CEC: Place a 10K pull up resistor to 3.3V on
N13P-PES/-GL/-GLP/-NS1 and N13M-NS1

L2

L3

CEC

J1

MULTI_STRAP_REF0_GND

J2

J7

J6

J5

J3

K3

K4

@

PAD

TV5

2

1

RV177 0_0402_5%OPT@

2

1

RV178 0_0402_5%OPT@

RV88 10K_04 02_5%@

DG:

啎啎

RV88 for XOR tree testing. --Joyce 1026

RV82 10K_0402_5%OPT@

RV83 10K_0402_5%OPT@

JTAG_TCK

JTAG_TDI

JTAG_TDO

JTAG_TMS

JTAG_TRST

OPT@

RV84 10K_0402_5%

RV85 10K_04 02_5%

OPT@

RV153 10K_0402_5%@

RV86 10K_04 02_5%OPT@

2

1

RV87 40.2K_04 02_1%OPT@

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

For N13P-GLP strap table

For N13P-PES :
Strap 0 : PU45
Strap 1 : PD35
Strap 2 : PU35
ROM_SCLK : PU15
ROM_SI : PD35

A

5

4

ROM_SO : PD10

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

900 MHz

900 MHz

N13P-GLP

900 MHz

900 MHz

Compal Secret Data

Compal Secret Data

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Memory SizeFrenq . strap4strap3GPU

64M* 16* 8
1GB

64M* 16* 8
1GB

128M* 16* 8
2GB

128M* 16* 8
2GB

Deciphered Date

Deciphered Date

Deciphered Date

Memory Config

Hynix
SA000041S20

Samsung
SA00004GS00

Hynix
SA00003YO00

Samsung
SA000047Q00

ROM_SIstrap 2strap1strap0 ROM_SCLKROM_SO

RV77

RV73

RV64
PU 45K

RV64
PU 45K

RV64
PU 45K

RV64
PU 45K

2

RV74
PU 5K

PD 45K

RV73
PD 45K

RV73
PD 45K

RV73
PD 45K

RV74
PU 5K

RV74
PU 5K

RV74
PU 5K

NC

NC

NC

NC

NC

NC

NC

NC

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

Date: Sheet

RV70

PD 15K

PD 30K

RV70

RV77

PD 30K

PD 20K

RV70

RV77

PD 30K

PD 35K

RV70

RV77

PD 30K

PD 45K

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

RV71
PD 15K

RV71
PD 15K

RV71
PD 15K

RV71
PD 15K

15 60Frid ay, August 24, 2012

15 60Frid ay, August 24, 2012

15 60Fr iday, August 24, 2012

A

B

B

B

of

of

of

FBVDDQ Decouping Design Guide:

D

0.1uF X7R 0402 8pcs under GPU
1uF X7R 0603 2pcs under GPU

4.7uF X6S 0603 2pcs under GPU
10uF X5R 0805 4pcs Near GPU

C

Calibration Pin

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CAL_TERM_GND

B

A

5

DDR3 GDDR5

40.2ohm

40.2ohm

40.2ohm

42.2ohm

60.4ohm

51.1ohm

300ohm 100MHz, ESR=0.25ohm

220ohm 100MHz, ESR=0.05ohm

5

+1.5VSDGPU

1

2

OPT@

+1.5VSDGPU

+1.5VSDGPU

+3VS_DGPU

2

BLM18PG181SN1D_0603

+1.05VS_DGPU

2

BLM18PG181SN1D_0603

CV83

LV7

@

LV13

@

CV61

OPT@

CV69

OPT@

1

CV84

2

10U_0603_6.3V6M

OPT@

Near GPU

1

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

Under GPU

CV62

CV63

OPT@

OPT@

1U_0402_6.3V6K

4.7U_0603_6.3V6K

Under GPU

CV79

CV70

OPT@

OPT@

4.7U_0603_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V4Z

Near GPU

1

1

CV85

CV86

2

2

OPT@

10U_0603_6.3V6M

OPT@

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V4Z

1

CV203

@

2

Under GPU(below 150mils)

1

1

CV205

@

2

2

1U_0402_6.3V4Z

4

Design guide no define

CV65

CV64

OPT@

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CV72

CV71

OPT@

0.1U_0402_16V4Z

OPT@

0.1U_0402_16V4Z

2

1

OPT@

RV91 10_0402_5%

2

1

OPT@

RV93 10_0402_5%

2

1

OPT@

RV96 40.2_0402_1%

2

1

OPT@

RV98 42.2_0402_1%

2

1

OPT@

RV101 51.1_0402_1%

Under GPU

1

1

CV199

CV200

@

@

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

CV204

CV201

@

@

2

4

7200mA

CV66

OPT@

0.1U_0402_16V4Z

CV73

OPT@

0.1U_0402_16V4Z

FB_VDDQ_SENSE

FB_GND_SENSE

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CAL_TERM_GND

0.1U_0402_16V4Z

1

CV202

@

2

1

CV206

0.1U_0402_16V4Z

@

2

UV1E

AA27

FBVDDQ_0

AA30

FBVDDQ_1

AB27

FBVDDQ_2

AB33

FBVDDQ_3

AC27

FBVDDQ_4

AD27

FBVDDQ_5

AE27

FBVDDQ_6

AF27

FBVDDQ_7

AG27

FBVDDQ_8

B13

FBVDDQ_9

B16

FBVDDQ_10

B19

FBVDDQ_11

E13

FBVDDQ_12

E16

FBVDDQ_13

E19

FBVDDQ_14

H10

FBVDDQ_15

H11

FBVDDQ_16

H12

FBVDDQ_17

H13

FBVDDQ_18

H14

FBVDDQ_19

H15

FBVDDQ_20

H16

FBVDDQ_21

H18

FBVDDQ_22

H19

FBVDDQ_23

H20

FBVDDQ_24

H21

FBVDDQ_25

H22

FBVDDQ_26

H23

FBVDDQ_27

H24

FBVDDQ_28

H8

FBVDDQ_29

H9

FBVDDQ_30

L27

FBVDDQ_31

M27

FBVDDQ_32

N27

FBVDDQ_33

P27

FBVDDQ_34

R27

FBVDDQ_35

T27

FBVDDQ_36

T30

FBVDDQ_37

T33

FBVDDQ_38

V27

FBVDDQ_39

W27

FBVDDQ_40

W30

FBVDDQ_41

W33

FBVDDQ_42

Y27

FBVDDQ_43

F1

FB_VDDQ_SENSE

F2

FB_GND_SENSE

J27

FB_CAL_PD_VDDQ

H27

FB_CAL_PU_GND

H25

FB_CAL_TERM_GND

N13P-GLP-A1 FCBGA 908P GPU

OPT@

+IFPC_PLLVDD

1

CV215

0.1U_0402_16V4Z

@

2

+IFPC_IOVDD

CV54

OPT@

1U_0402_6.3V6K

210mA

210mA

150mA

2

RV102 10K_0402_5%OPT@

RV90 1K_040 2_5%@

2

RV104 10K_0402_5%OPT@

2

RV92 10K_04 02_5%OPT@

RV94 1K_0402 _5%@

2

2

RV97 10K_04 02_5%OPT@

RV99 1K_040 2_5%@

2

2

RV114 10K_0402_5%OPT@

RV103 1K_0402_5%

2

RV126 10K_0402_5%OPT@

X6S

X5R

X5R

X5R

X5R

X5R

2

Near GPU

CV56

CV55

OPT@

1U_0402_6.3V6K

4.7U_0603_6.3V6K

Under GPU

CV74

OPT@

PEX_PLL_HVDD:
N13P-GLP/PES :NC
N13P-LP : power.

0603

0805

0805

0603

080511

2

1

2

OPT@

1U_0402_6.3V6K

CV57

1

2

10U_0603_6.3V6M

OPT@

CV75

OPT@

Under GPU

Under GPU

2

4

4

CV58

10U_0603_6.3V6M

Near GPU

OPT@

1U_0402_6.3V6K

CV87

OPT@

OPT@

3

Part 5 of 7

POWER

PEX_IOVDD_0

PEX_IOVDD_1

PEX_IOVDD_2

PEX_IOVDD_3

PEX_IOVDD_4

PEX_IOVDD_5

PEX_IOVDDQ_0

PEX_IOVDDQ_1

PEX_IOVDDQ_2

PEX_IOVDDQ_3

PEX_IOVDDQ_4

PEX_IOVDDQ_5

PEX_IOVDDQ_6

PEX_IOVDDQ_7

PEX_IOVDDQ_8

PEX_IOVDDQ_9

PEX_IOVDDQ_10

PEX_IOVDDQ_11

PEX_IOVDDQ_12

PEX_IOVDDQ_13

PEX_PLL_HVDD

PEX_SVDD_3V3

PEX_PLLVDD

VDD33_0

VDD33_1

VDD33_2

VDD33_3

IFPAB_PLLVDD

IFPAB_RSET

IFPA_IOVDD

IFPB_IOVDD

IFPC_PLLVDD

IFPC_RSET

IFPC_IOVDD

IFPD_PLLVDD

IFPD_RSET

IFPD_IOVDD

IFPEF_PLVDD

IFPEF_RSET

IFPE_IOVDD

IFPF_IOVDD

AG19

AG21

AG22

AG24

AH21

AH25

AG13

AG15

AG16

AG18

AG25

AH15

AH18

AH26

AH27

AJ27

AK27

AL27

AM28

AN28

AH12

AG12

AG26

J8

K8

L8

M8

AH8

AJ8

AG8

AG9

AF7

AF8

AF6

AG7

AN2

AG6

AB8

AD6

AC7

AC8

CV198 0.1U_0402 _16V4Z

+PEX_PLLVDD

+VDD33

+VDD33

+IFPAB_PLLVDD

+IFPAB_IOVDD

+IFPC_PLLVDD

+IFPC_IOVDD

+IFPD_PLLVDD

+IFPD_IOVDD

+IFPEF_PLLVDD

+IFPEF_IOVDD

+IFPEF_IOVDD

110mA

50mA

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Under GPU

OPT@

3300 mA

CV80,CV198 Under GPU
close to ball

@

CV80 0.1U_0402_16V4Z

OPT@

120mA

Design guide no define

1

1

1

1

RV95 10K_040 2_5%OPT@

1

1

RV100 10K_0402_5%OPT@

1

@

1

PEX_IOVVD/Q

Capacitor Type Footprint Population Location

1.0uF X6S 0402 4

4.7uF

10uF

22uF

PEX_PLLVDD

Capacitor Type Footprint Population Location

100nF X6S 0402 1

1.0uF

4.7uF X5R

PEX_SVDD/PLL_HVDD

Capacitor Type Footprint Population Location

0.1uF 0402 1

4.7uF 0603 2 Near GPU

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

+1.05VS_DGPU

CV59

CV60

OPT@

OPT@

22U_0805_6.3V6M

22U_0805_6.3V6M

1

CV76

0.1U_0402_16V4Z

CV90

0.1U_0402_16V4Z

CV67

1

CV77

2

OPT@

2

4.7U_0603_6.3V6K

Near GPU

Under GPU

Near GPU

Midway between GPU and Power Supply

Midway between GPU and Power Supply

Under GPU

Near GPU

Near GPU

10U_0603_6.3V6M

OPT@

10U_0603_6.3V6M

BLM18PG121SN1D_0603

CV89

CV88

LV12

OPT@

OPT@

1U_0402_6.3V6K

4.7U_0603_6.3V6K

LV12 stuff a 0ohm resistor instead for
N13E-GE, N13P-GT/-GS/-LP/-GV, N13M-GS,
N14P-Q1/-Q3

CV91

CV92

OPT@

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

OPT@

1

+1.05VS_DGPU

CV78

CV68

OPT@

OPT@

22U_0805_6.3V6M

22U_0805_6.3V6M

Near GPU

CV81

CV82

OPT@

OPT@

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

LV12

2

1

OPT@

猁

:120ohm@100MHz, ESR=0.18ohm 0603

CV97

CV96

CV95

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

Near GPU

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

Date: Sheet

1

420mA

+1.05VS_DGPU

OPT@

RV89

0_0603_5%

4.7U_0603_6.3V6K

+3VS_DGPU

16 60Frid ay, August 24, 2012

16 60Fr iday, August 24, 2012

16 60Fr iday, August 24, 2012

+3VS_DGPU

of

of

of

D

C

B

A

B

B

B

5

4

3

2

1

UV1F

Part 6 of 7

A2

GND_0

AA17

GND_1

D

C

B

A

5

AA18

GND_2

AA20

GND_3

AA22

GND_4

AB12

GND_5

AB14

GND_6

AB16

GND_7

AB19

GND_8

AB2

GND_9

AB21

GND_10

A33

GND_11

AB23

GND_12

AB28

GND_13

AB30

GND_14

AB32

GND_15

AB5

GND_16

AB7

GND_17

AC13

GND_18

AC15

GND_19

AC17

GND_20

AC18

GND_21

AA13

GND_22

AC20

GND_23

AC22

GND_24

AE2

GND_25

AE28

GND_26

AE30

GND_27

AE32

GND_28

AE33

GND_29

AE5

GND_30

AE7

GND_31

AH10

GND_32

AA15

GND_33

AH13

GND_34

AH16

GND_35

AH19

GND_36

AH2

GND_37

AH22

GND_38

AH24

GND_39

AH28

GND_40

AH29

GND_41

AH30

GND_42

AH32

GND_43

AH33

GND_44

AH5

GND_45

AH7

GND_46

AJ7

GND_47

AK10

GND_48

AK7

GND_49

AL12

GND_50

AL14

GND_51

AL15

GND_52

AL17

GND_53

AL18

GND_54

AL2

GND_55

AL20

GND_56

AL21

GND_57

AL23

GND_58

AL24

GND_59

AL26

GND_60

AL28

GND_61

AL30

GND_62

AL32

GND_63

AL33

GND_64

AL5

GND_65

AM13

GND_66

AM16

GND_67

AM19

GND_68

AM22

GND_69

AM25

GND_70

AN1

GND_71

AN10

GND_72

AN13

GND_73

AN16

GND_74

AN19

GND_75

AN22

GND_76

AN25

GND_77

AN30

GND_78

AN34

GND_79

AN4

GND_80

AN7

GND_81

AP2

GND_82

AP33

GND_83

B1

GND_84

B10

GND_85

B22

GND_86

B25

GND_87

B28

GND_88

B31

GND_89

B34

GND_90

B4

GND_91

B7

GND_92

C10

GND_93

C13

GND_94

C19

GND_95

C22

GND_96

C25

GND_97

C28

GND_98

C7

GND_99

N13P-GLP-A1 FCBGA 908P GPU

OPT@

GND

GND_100

GND_101

GND_102

GND_103

GND_104

GND_105

GND_106

GND_107

GND_108

GND_109

GND_110

GND_111

GND_112

GND_113

GND_114

GND_115

GND_116

GND_117

GND_118

GND_119

GND_120

GND_121

GND_122

GND_123

GND_124

GND_125

GND_126

GND_127

GND_128

GND_129

GND_130

GND_131

GND_132

GND_133

GND_134

GND_135

GND_136

GND_137

GND_138

GND_139

GND_140

GND_141

GND_142

GND_143

GND_144

GND_145

GND_146

GND_147

GND_148

GND_149

GND_150

GND_151

GND_152

GND_153

GND_154

GND_155

GND_156

GND_157

GND_158

GND_159

GND_160

GND_161

GND_162

GND_163

GND_164

GND_165

GND_166

GND_167

GND_168

GND_169

GND_170

GND_171

GND_172

GND_173

GND_174

GND_175

GND_176

GND_177

GND_178

GND_179

GND_180

GND_181

GND_182

GND_183

GND_184

GND_185

GND_186

GND_187

GND_188

GND_189

GND_190

GND_191

GND_192

GND_193

GND_194

GND_195

GND_196

GND_197

GND_198

GND_199

GND_OPT

GND_OPT

D2

D31

D33

E10

E22

E25

E5

E7

F28

F7

G10

G13

G16

G19

G2

G22

G25

G28

G3

G30

G32

G33

G5

G7

K2

K28

K30

K32

K33

K5

K7

M13

M15

M17

M18

M20

M22

N12

N14

N16

N19

N2

N21

N23

N28

N30

N32

N33

N5

N7

P13

P15

P17

P18

P20

P22

R12

R14

R16

R19

R21

R23

T13

T15

T17

T18

T2

T20

T22

AG11

T28

T32

T5

T7

U12

U14

U16

U19

U21

U23

V12

V14

V16

V19

V21

V23

W13

W15

W17

W18

W20

W22

W28

Y12

Y14

Y16

Y19

Y21

Y23

AH11

C16

W32

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

+VGA_CORE

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

UV1G

60A

AA12

AA14

AA16

AA19

AA21

AA23

AB13

AB15

AB17

AB18

AB20

AB22

AC12

AC14

AC16

AC19

AC21

AC23

M12

M14

M16

M19

M21

M23

N13

N15

N17

N18

N20

N22

2

VDD_0

VDD_1

VDD_2

VDD_3

VDD_4

VDD_5

VDD_6

VDD_7

VDD_8

VDD_9

VDD_10

VDD_11

VDD_12

VDD_13

VDD_14

VDD_15

VDD_16

VDD_17

VDD_18

VDD_19

VDD_20

VDD_21

VDD_22

VDD_23

VDD_24

VDD_25

VDD_26

VDD_27

VDD_28

VDD_29

P12

VDD_30

P14

VDD_31

P16

VDD_32

P19

VDD_33

P21

VDD_34

P23

VDD_35

R13

VDD_36

R15

VDD_37

R17

VDD_38

R18

VDD_39

R20

VDD_40

R22

VDD_41

T12

VDD_42

T14

VDD_43

T16

VDD_44

T19

VDD_45

T21

VDD_46

T23

VDD_47

U13

VDD_48

U15

VDD_49

U17

VDD_50

U18

VDD_51

U20

VDD_52

U22

VDD_53

V13

VDD_54

V15

VDD_55

N13P-GLP-A1 FCBGA 908P GPU

OPT@

Part 7 of 7

POWER

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

Date: Sheet

+VGA_CORE

V17

VDD_56

V18

VDD_57

V20

VDD_58

V22

VDD_59

W12

VDD_60

W14

VDD_61

W16

VDD_62

W19

VDD_63

W21

VDD_64

W23

VDD_65

Y13

VDD_66

Y15

VDD_67

Y17

VDD_68

Y18

VDD_69

Y20

VDD_70

Y22

VDD_71

U1

XVDD_1

U2

XVDD_2

U3

XVDD_3

U4

XVDD_4

U5

XVDD_5

U6

XVDD_6

U7

XVDD_7

U8

XVDD_8

V1

XVDD_9

V2

XVDD_10

V3

XVDD_11

V4

XVDD_12

V5

XVDD_13

V6

XVDD_14

V7

XVDD_15

V8

XVDD_16

W2

XVDD_17

W3

XVDD_18

W4

XVDD_19

W5

XVDD_20

W7

XVDD_21

W8

XVDD_22

Y1

XVDD_23

Y2

XVDD_24

Y3

XVDD_25

Y4

XVDD_26

Y5

XVDD_27

Y6

XVDD_28

Y7

XVDD_29

Y8

XVDD_30

AA1

XVDD_31

AA2

XVDD_32

AA3

XVDD_33

AA4

XVDD_34

AA5

XVDD_35

AA6

XVDD_36

AA7

XVDD_37

AA8

XVDD_38

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

D

C

B

A

B

B

B

17 60F riday, August 24, 2012

of

17 60Friday, August 24, 2012

of

17 60Friday, August 24, 2012

of

5

4

3

2

1

DDR3

CV138

1U_0402_6.3V6K

Mode D
Address

0..31

CMD0

CS0_L#

CMD1

ODT_L

CMD2

CMD3

CKE

CMD4

A14

CMD5

RST

CMD6

A9

A7

CMD7

A2

CMD8

A0

CMD9

A4

CMD10

CMD11

A1

BA0

CMD12

CMD13

WE*

CMD14

A15

CAS*

CMD15

CMD16

CMD17

CMD18

CMD19

A13

CMD20

CMD21 A8

A8

A6

CMD22

A11

CMD23

A5

CMD24

A3

CMD25

BA2

CMD26

BA1

CMD27

A12

CMD28

A10

CMD29

RAS*

CMD30

Not Available

LOW HIGH

Command Bit Default Pull-down

ODTx 10k

10k

CKEx

RST 10k

CS* No Termination

32..63

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

CS0_H#

ODT_H

CKE_H

A13

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

D

C

B

A

VRAM DDR3 chips (1GB)

D

C

B

A

64Mx16 DDR3 *8==>1GB
128Mx16 DDR3 *8==>2GB

DQSA[7..0]<14,19>

DQSA#[7..0]<14,19>

DQMA[7..0]<14,19>

MDA[63..0]<14,19>

CMDA[30..0]<14,19>

+1.5VSDGPU

RV105

1.33K_0402_1%

OPT@

RV106

1.33K_0402_1%

OPT@

+1.5VSDGPU

RV107

1.33K_0402_1%

OPT@

+MEM_VREF1

RV108

1.33K_0402_1%

OPT@

1

1

CLKA0<14>

CLKA0#<14>

CLKA0

RV15

OPT@

160_0402_1%

2

CLKA0#

NV recommand 0720

+1.5VSDGPU

80.6_0402_1%

1

80.6_0402_1%

1

2

DQSA[7..0]

DQSA#[7..0]

DQMA[7..0]

MDA[63..0]

CMDA[30..0]

+MEM_VREF0

1

2

OPT@

1

2

OPT@

RV109

@

RV118

@

CV112

OPT@

0.1U_0402_16V4Z

UV3

X76@

M8

VREFCA

H1

CMDA9

CMDA11

CMDA8

CMDA25

CMDA10

CMDA24

CMDA22

CMDA7

CMDA21

CMDA6

CMDA29

CMDA23

CMDA28

CMDA20

CMDA4

CMDA14

CMDA12

CMDA27

CMDA26

CLKA0

CLKA0#

CMDA3

CMDA2

CMDA0

CMDA30

CMDA15

CMDA13

DQSA1

DQSA2

DQMA1

DQMA2

DQSA#1

DQSA#2

CMDA5

1

2

ZQ0

OPT@

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

N7

A11

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

M3

BA1

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

1

1

CV119

CV118

2

2

OPT@

OPT@

0.1U_0402_16V4Z

+MEM_VREF0

CV109

0.1U_0402_16V4Z

CV110

0.1U_0402_16V4Z

2

2

1

CV111

0.01U_0402_16V7K

2

RV110

243_0402_1%

@

close to UV3 close to UV4

1

CV114

CV115

CV113

2

OPT@

0.1U_0402_16V4Z

CV116

OPT@

1U_0402_6.3V6K

CV117

OPT@

OPT@

1U_0402_6.3V6K

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

310mA

0.1U_0402_16V4Z

E3

DQL0

MDA12

swap 0329

F7

DQL1

MDA14

F2

DQL2

MDA8

F8

DQL3

MDA15

H3

DQL4

MDA9

H8

DQL5

MDA13

G2

DQL6

MDA10

H7

DQL7

MDA11

D7

DQU0

C3

MDA17

DQU1

C8

MDA21

DQU2

C2

MDA18

DQU3

A7

MDA23

DQU4

A2

MDA19

DQU5

B8

MDA22

DQU6

A3

MDA16

DQU7

MDA20

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1

VDDQ

A8

VDDQ

C1

VDDQ

C9

D2

VDDQ

VDDQ

E9

VDDQ

F1

VDDQ

H2

VDDQ

H9

VDDQ

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

CV121

CV120

CV122

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

OPT@

1U_0402_6.3V6K

+1.5VSDGPU

+1.5VSDGPU

CV123

OPT@

1U_0402_6.3V6K

Group1

Group2

243_0402_1%

RV111

+1.5VSDGPU

+MEM_VREF1

CMDA9

CMDA11

CMDA8

CMDA25

CMDA10

CMDA24

CMDA22

CMDA7

CMDA21

CMDA6

CMDA29

CMDA23

CMDA28

CMDA20

CMDA4

CMDA14

CMDA12

CMDA27

CMDA26

CLKA0

CLKA0#

CMDA3

CMDA2

CMDA0

CMDA30

CMDA15

CMDA13

DQSA0

DQSA3

DQMA0

DQMA3

DQSA#0

DQSA#3

CMDA5

ZQ1

1

OPT@

2

1

CV124

2

OPT@

M2

N8

K3

1

CV125

2

OPT@

0.1U_0402_16V4Z

UV4

X76@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

N7

A11

A12

T3

A13

T7

A14

M7

A15/BA3

BA0

M3

BA1

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

CAS

L3

WE

F3

DQSL

C7

DQSU

310mA

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

CV127

CV126

0.1U_0402_16V4Z

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

E3

DQL0

F7

DQL1

F2

MDA3

DQL2

F8

MDA4

DQL3

H3

MDA2

DQL4

H8

MDA7

DQL5

G2

MDA0

DQL6

H7

MDA5

DQL7

MDA1

MDA6

D7

DQU0

C3

DQU1

C8

MDA27

DQU2

C2

MDA29

DQU3

A7

MDA25

DQU4

A2

MDA30

DQU5

B8

MDA24

DQU6

A3

MDA28

DQU7

MDA26

MDA31

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1

VDDQ

A8

VDDQ

C1

VDDQ

C9

D2

VDDQ

VDDQ

E9

VDDQ

F1

VDDQ

H2

VDDQ

H9

VDDQ

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

CV129

CV128

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.5VSDGPU

+1.5VSDGPU

CMDA2

CMDA3

CMDA5

CMDA18

CMDA19

Group0

Group3

2

1

RV112 10K_0402_5%OPT@

2

1

RV115 10K_0402_5%OPT@

2

1

RV113 10K_0402_5%OPT@

1

1

CV130

CV134

2

2

OPT@

OPT@

0.1U_0402_16V4Z

RV116 10K_0402_5%OPT@

1

RV117 10K_0402_5%OPT@

CV135

OPT@

0.1U_0402_16V4Z

2

1

2

CV137

CV136

OPT@

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

2

Date: Sheet

1

B

B

B

18 60Friday, August 24, 2012

of

18 60Friday, August 24, 2012

of

18 60Friday, August 24, 2012

of

5

4

3

2

1

VRAM DDR3 chips (1GB)

64Mx16 DDR3 *8==>1GB

D

C

B

A

128Mx16 DDR3 *8==>2GB

DQMA[7..0]<14,18>

CMDA[30..0]<14,18>

DQSA#[7..0]<14,18>

DQSA[7..0]<14,18>

MDA[63..0]<14,18>

+1.5VSDGPU

RV119

1.33K_0402_1%

OPT@

RV120

1.33K_0402_1%

OPT@

+1.5VSDGPU

RV121

1.33K_0402_1%

OPT@

RV122

1.33K_0402_1%

OPT@

1

1

CLKA1<14>

CLKA1#<14>

CLKA1

RV16

OPT@

160_0402_1%

2

CLKA1#

NV recommand 0720

80.6_0402_1%

1

80.6_0402_1%

+MEM_VREF2

1

2

OPT@

1

+MEM_VREF3

2

OPT@

RV125

@

RV127

@

+1.5VSDGPU

DQMA[7..0]

CMDA[30..0]

DQSA#[7..0]

DQSA[7..0]

MDA[63..0]

CV131

0.1U_0402_16V4Z

CV132

0.1U_0402_16V4Z

2

2

1

2

1

@

CV133

0.01U_0402_16V7K

2

close to UV5

1

CV144

2

OPT@

0.1U_0402_16V4Z

+MEM_VREF2

RV123

243_0402_1%

CV145

CV147

CV146

OPT@

OPT@

OPT@

OPT@

0.1U_0402_16V4Z

1U_0402_6.3V6K

1U_0402_6.3V6K

CMDA9

CMDA11

CMDA8

CMDA25

CMDA10

CMDA24

CMDA22

CMDA7

CMDA21

CMDA6

CMDA29

CMDA23

CMDA28

CMDA20

CMDA4

CMDA14

CMDA12

CMDA27

CMDA26

CLKA1

CLKA1#

CMDA19

CMDA18

CMDA16

CMDA30

CMDA15

CMDA13

DQSA4

DQSA7

DQMA4

DQMA7

DQSA#4

DQSA#7

CMDA5

CV148

1U_0402_6.3V6K

1

ZQ2

OPT@

2

CV149

OPT@

UV5

X76@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

N7

A11

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

M3

BA1

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4B1G1646E-HC12_FBGA96

1U_0402_6.3V6K

96-BALL
SDRAM DDR3

1

2

E3

DQL0

F7

DQL1

F2

MDA39

DQL2

F8

MDA35

DQL3

H3

MDA37

DQL4

H8

MDA33

DQL5

G2

MDA38

DQL6

H7

MDA32

DQL7

MDA36

MDA34

D7

DQU0

C3

DQU1

C8

MDA61

DQU2

C2

MDA59

DQU3

A7

MDA60

DQU4

A2

MDA57

DQU5

B8

MDA63

DQU6

A3

MDA56

DQU7

MDA62

MDA58

+1.5VSDGPU

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

+1.5VSDGPU

A1

VDDQ

A8

VDDQ

C1

VDDQ

C9

D2

VDDQ

VDDQ

E9

VDDQ

F1

VDDQ

H2

VDDQ

H9

310mA 310mA

VDDQ

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

1

CV139

CV140

CV150

2

CV141

OPT@

OPT@

0.1U_0402_16V4Z

OPT@

1U_0402_6.3V6K

0.1U_0402_16V4Z

OPT@

Group4

CV143

CV142

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

+MEM_VREF3

RV124

243_0402_1%

+1.5VSDGPU

CLKA1

CLKA1#

CMDA19

CMDA5

1

2

CMDA9

CMDA11

CMDA8

CMDA25

CMDA10

CMDA24

CMDA22

CMDA7

CMDA21

CMDA6

CMDA29

CMDA23

CMDA28

CMDA20

CMDA4

CMDA14

CMDA12

CMDA27

CMDA26

CMDA18

CMDA16

CMDA30

CMDA15

CMDA13

DQSA5

DQSA6

DQMA5

DQMA6

DQSA#5

DQSA#6

ZQ3

1

2

CV159

OPT@

M8

H1

N3

P7

P3

N2

P8

P2

R8

R2

T8

R3

L7

R7

N7

T3

T7

M7

M2

N8

M3

J7

K7

K9

K1

L2

J3

K3

L3

F3

C7

E7

D3

G3

B7

T2

L8

J1

L1

J9

OPT@

L9

close to UV6

1

CV160

2

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

OPT@

UV6

X76@

VREFCA

DQL0

VREFDQ

DQL1

DQL2

A0

DQL3

A1

DQL4

DQL5

A2

DQL6

A3

DQL7

A4

A5

A6

DQU0

A7

DQU1

A8

DQU2

A9

DQU3

A10/AP

DQU4

A11

DQU5

A12

A13

DQU6

A14

DQU7

A15/BA3

BA0

BA1

BA2

CK

CK

CKE/CKE0

ODT/ODT0

VDDQ

VDDQ

CS/CS0

VDDQ

RAS

VDDQ

CAS

VDDQ

WE

VDDQ

VDDQ

VDDQ

DQSL

VDDQ

DQSU

DML

DMU

DQSL

DQSU

RESET

ZQ/ZQ0

VSSQ

NC/ODT1

VSSQ

NC/CS1

NC/CE1

VSSQ

NCZQ1

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

CV163

CV162

CV161

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

E3

MDA45

F7

MDA40

F2

MDA46

F8

MDA41

H3

MDA47

H8

MDA43

MDA44

MDA42

MDA53

MDA49

MDA55

MDA50

MDA52

MDA48

MDA54

MDA51

+1.5VSDGPU

+1.5VSDGPU

Group5

Group6Group7

1

1

CV165

CV151

CV156

2

CV152

2

OPT@

0.1U_0402_16V4Z

OPT@

OPT@

OPT@

0.1U_0402_16V4Z

1U_0402_6.3V6K

G2

H7

D7

C3

C8

C2

A7

A2

B8

A3

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1

A8

C1

C9

D2

E9

F1

H2

H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

B9

D1

D8

E2

E8

F9

G1

G9

CV164

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

Mode D
Address

0..31

CS0_L#

ODT_L

CKE

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

LOW HIGH

32..63

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

CS0_H#

ODT_H

CKE_H

A13

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

D

C

B

A

CMD0

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21 A8

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

Not Available

CV158

CV157

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

2

Date: Sheet

19 60Friday, August 24, 2012

19 60Friday, August 24, 2012

1

B

B

B

19 60Friday, August 24, 2012

of

of

of

0..31

CS0_L#

ODT_L

CKE

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

LOW HIGH

CV183

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

OPT@

32..63

CS0_H#

ODT_H

CKE_H

10k

10k

10k

CV184

1U_0402_6.3V6K

1

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

A13

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

D

C

B

CV185

OPT@

1U_0402_6.3V6K

A

5

4

3

VRAM DDR3 chips (1GB)

D

C

B

A

64Mx16 DDR3 *8==>1GB
128Mx16 DDR3 *8==>2GB

DQSC#[7..0]<14,21>

DQMC[7..0]<14,21>

CMDC[30..0]<14,21>

1.33K_0402_1%

1.33K_0402_1%

1.33K_0402_1%

1.33K_0402_1%

CLKC0<14>

CLKC0#<14>

1

OPT@

2

NV recommand 0720

DQSC[7..0]<14 ,21>

MDC[63..0]<14,21>

+1.5VSDGPU

RV128

RV129

+1.5VSDGPU

RV130

RV131

CLKC0

RV17
160_0402_1%

CLKC0#

OPT@

OPT@

OPT@

+MEM_VREF5

OPT@

1

RV139

@

80.6_0402_1%

1

RV141

@

80.6_0402_1%

DQSC[7..0]

DQSC#[7..0]

DQMC[7..0]

MDC[63..0]

CMDC[30..0]

1

+MEM_VREF4

2

OPT@

CV153

1

2

OPT@

CV154

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

@

CV155

0.01U_0402_16V7K

2

+MEM_VREF4

RV151

243_0402_1%

UV8

X76@

+MEM_VREF5

CMDC9

CMDC11

CMDC8

CMDC25

CMDC10

CMDC24

CMDC22

CMDC7

CMDC21

CMDC6

CMDC29

CMDC23

CMDC28

CMDC20

CMDC4

CMDC14

CMDC12

CMDC27

CMDC26

CLKC0

CLKC0#

CMDC3

CMDC2

CMDC0

CMDC30

CMDC15

CMDC13

DQSC0

DQSC3

DQMC0

DQMC3

DQSC#0

DQSC#3

CMDC5

RV133

CV167

OPT@

ZQ5

1

2

1U_0402_6.3V6K

OPT@

OPT@

M8

H1

N3

P7

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

N7

A11

T3

T7

M7

M2

BA0

N8

M3

BA1

J7

CK

K7

CK

K9

CKE/CKE0

K1

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

C7

E7

D3

G3

B7

DQSU

T2

L8

J1

L1

J9

L9

K4B1G1646E-HC12_FBGA96

CV169

CV168

OPT@

1U_0402_6.3V6K

VREFCA

VREFDQ

A0

A1

A12

A13

A14

A15/BA3

BA2

ODT/ODT0

DQSL

DQSU

DML

DMU

DQSL

RESET

ZQ/ZQ0

NC/ODT1

NC/CS1

NC/CE1

NCZQ1

96-BALL
SDRAM DDR3

1U_0402_6.3V6K

310mA

CV170

OPT@

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQU0

DQU1

DQU2

DQU3

DQU4

DQU5

DQU6

DQU7

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

1U_0402_6.3V6K

UV7

X76@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

CMDC9

P3

CMDC11

A2

N2

CMDC8

A3

P8

CMDC25

A4

P2

CMDC10

A5

R8

CMDC24

A6

R2

A7

CMDC22

T8

A8

CMDC7

R3

CMDC21

A9

L7

CMDC6

A10/AP

R7

N7

CMDC29

A11

A12

T3

CMDC23

A13

T7

CMDC28

A14

M7

CMDC20

A15/BA3

CMDC4

CMDC14

M2

BA0

N8

M3

CMDC12

BA1

BA2

CMDC27

CMDC26

J7

CK

K7

CLKC0

CK

K9

CLKC0#

CKE/CKE0

CMDC3

K1

ODT/ODT0

L2

CMDC2

CS/CS0

J3

CMDC0

RAS

K3

CMDC30

CAS

L3

CMDC15

WE

CMDC13

F3

DQSL

C7

DQSC1

DQSU

DQSC2

E7

DML

D3

DQMC1

DMU

DQMC2

G3

DQSL

DQSC#1

B7

DQSU

DQSC#2

T2

RESET

CMDC5

L8

1

ZQ/ZQ0

ZQ4

J1

NC/ODT1

L1

OPT@

NC/CS1

2

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

+1.5VSDGPU

close to UV7 close to UV8

1

1

CV172

CV171

2

2

OPT@

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

310mA

OPT@

E3

DQL0

MDC8

MDC12

MDC11

MDC13

MDC9

MDC14

MDC10

MDC15

MDC18

MDC20

MDC17

MDC22

MDC16

MDC23

MDC19

MDC21

+1.5VSDGPU

+1.5VSDGPU

CV179

OPT@

swap 0329

Group1

Group2

243_0402_1%

1

1

CV180

CV166

2

2

OPT@

OPT@

0.1U_0402_16V4Z

1U_0402_6.3V6K

0.1U_0402_16V4Z

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1

VDDQ

A8

VDDQ

C1

VDDQ

C9

D2

VDDQ

VDDQ

E9

VDDQ

F1

VDDQ

H2

VDDQ

H9

VDDQ

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

CV178

CV174

CV173

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

E3

F7

F2

F8

H3

H8

G2

H7

D7

C3

C8

C2

A7

A2

B8

A3

B2

D9

G7

K2

K8

N1

N9

R1

R9

A1

A8

C1

C9

D2

E9

F1

H2

H9

A9

B3

E1

G8

J2

J8

M1

M9

P1

P9

T1

T9

B1

B9

D1

D8

E2

E8

F9

G1

G9

+1.5VSDGPU

MDC3

MDC7

MDC1

MDC4

MDC2

MDC6

MDC0

MDC5

MDC26

MDC31

MDC25

MDC30

MDC27

MDC28

MDC24

MDC29

1

2

+1.5VSDGPU

+1.5VSDGPU

CV186

OPT@

0.1U_0402_16V4Z

2

Mode D
Address

CMD0

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

Group0

Group3

2

1

RV134 10K_0402_5%OPT@

2

1

RV135 10K_0402_5%OPT@

CMDC2

CMDC3

CMDC5

CMDC18

CMDC19

1

CV187

CV188

2

OPT@

OPT@

0.1U_0402_16V4Z

1U_0402_6.3V6K

1

RV136 10K_0402_5%OPT@

1

RV137 10K_0402_5%OPT@

1

RV138 10K_0402_5%OPT@

CV189

OPT@

1U_0402_6.3V6K

2

2

2

CV190

CV191

OPT@

1U_0402_6.3V6K

OPT@

1U_0402_6.3V6K

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21 A8

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

Not Available

Command Bit Default Pull-down

DDR3

1

1

CV192

CV181

2

2

OPT@

OPT@

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

ODTx

CKEx

RST

CS* No Termination

CV182

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

2

Date: Sheet

1

B

B

B

20 60Friday, August 24, 2012

of

20 60Friday, August 24, 2012

of

20 60Friday, August 24, 2012

of

5

4

3

2

1

VRAM DDR3 chips (1GB)

D

C

B

A

128Mx16 DDR3 *8==>2GB

CLKC1<14>

CLKC1#<14>

1

CLKC1

RV18
160_0402_1%

OPT@

2

CLKC1#

NV recommand 0720

DQMC[7..0]<14,20>

CMDC[30..0]<14,20>

MDC[63..0]<14,20>

+1.5VSDGPU

RV142

1.33K_0402_1%

RV143

1.33K_0402_1%

+1.5VSDGPU

RV144

1.33K_0402_1%

RV145

1.33K_0402_1%

1

80.6_0402_1%

1

80.6_0402_1%

DQSC#[7..0]<14,20>

DQSC[7..0]<14 ,20>

RV150

@

RV148

@

DQMC[7..0]

CMDC[30..0]

DQSC#[7..0]

DQSC[7..0]

MDC[63..0]

OPT@

1

+MEM_VREF6

2

OPT@

OPT@

CV175

0.1U_0402_16V4Z

OPT@

+MEM_VREF7

1

2

OPT@

OPT@

CV176

0.1U_0402_16V4Z

2

2

1

@

CV177

0.01U_0402_16V7K

2

+1.5VSDGPU

+MEM_VREF6

RV146

243_0402_1%

close to UV10 close to UV9

1

1

CV209

CV208

2

2

OPT@

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

OPT@

CMDC9

CMDC11

CMDC8

CMDC25

CMDC10

CMDC24

CMDC22

CMDC7

CMDC21

CMDC6

CMDC29

CMDC23

CMDC28

CMDC20

CMDC4

CMDC14

CMDC12

CMDC27

CMDC26

CLKC1

CLKC1#

CMDC19

CMDC18

CMDC16

CMDC30

CMDC15

CMDC13

DQSC4

DQSC5

DQMC4

DQMC5

DQSC#4

DQSC#5

CMDC5

1

2

CV210

ZQ6

OPT@

1U_0402_6.3V6K

UV10

X76@

M8

H1

N3

P7

P3

N2

P8

P2

R8

R2

T8

R3

L7

R7

N7

T3

T7

M7

M2

N8

M3

J7

K7

K9

K1

L2

J3

K3

L3

F3

C7

E7

D3

G3

B7

T2

L8

J1

L1

J9

L9

CV211

OPT@

1U_0402_6.3V6K

VREFCA

VREFDQ

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10/AP

A11

A12

A13

A14

A15/BA3

BA0

BA1

BA2

CK

CK

CKE/CKE0

ODT/ODT0

CS/CS0

RAS

CAS

WE

DQSL

DQSU

DML

DMU

DQSL

DQSU

RESET

ZQ/ZQ0

NC/ODT1

NC/CS1

NC/CE1

NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

CV212

OPT@

1U_0402_6.3V6K

E3

DQL0

F7

DQL1

F2

MDC39

DQL2

F8

MDC33

DQL3

H3

MDC38

DQL4

H8

MDC32

DQL5

G2

MDC36

DQL6

H7

MDC34

DQL7

MDC37

MDC35

D7

DQU0

C3

DQU1

C8

DQU2

MDC44

C2

DQU3

MDC43

A7

DQU4

MDC47

A2

DQU5

MDC40

B8

DQU6

MDC45

A3

DQU7

MDC42

MDC46

MDC41

+1.5VSDGPU

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

+1.5VSDGPU

A1

VDDQ

A8

VDDQ

C1

VDDQ

C9

D2

VDDQ

VDDQ

E9

VDDQ

F1

VDDQ

H2

VDDQ

H9

310mA 310mA

VDDQ

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

1

1

CV214

CV213

2

2

OPT@

OPT@

0.1U_0402_16V4Z

1U_0402_6.3V6K

Group4

Group5

CV193

OPT@

0.1U_0402_16V4Z

CV196

CV195

CV194

OPT@

1U_0402_6.3V6K

OPT@

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

+MEM_VREF7

CMDC9

CMDC11

CMDC25

CMDC10

CMDC24

CMDC22

CMDC7

CMDC6

CMDC29

CMDC23

CMDC28

CMDC20

CMDC4

CMDC14

CMDC12

CMDC27

CMDC26

CLKC1

CLKC1#

CMDC19

CMDC5

RV147

243_0402_1%

CV207

1U_0402_6.3V6K

CMDC8

CMDC21

CMDC18

CMDC16

CMDC30

CMDC15

CMDC13

DQSC7

DQSC6

DQMC7

DQMC6

DQSC#7

DQSC#6

1

ZQ7

OPT@

2

+1.5VSDGPU

UV9

X76@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

N7

A11

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

M3

BA1

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

1

1

CV221

2

2

OPT@

0.1U_0402_16V4Z

Mode D
Address

0..31

E3

MDC63

DQL0

F7

DQL1

MDC58

F2

DQL2

MDC62

F8

MDC59

DQL3

H3

MDC60

DQL4

H8

MDC61

DQL5

G2

DQL6

MDC57

H7

DQL7

MDC56

D7

DQU0

C3

MDC54

DQU1

C8

MDC48

DQU2

C2

MDC52

DQU3

A7

MDC50

DQU4

A2

MDC53

DQU5

B8

MDC51

DQU6

A3

MDC55

DQU7

MDC49

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1

VDDQ

A8

VDDQ

C1

VDDQ

C9

D2

VDDQ

VDDQ

E9

VDDQ

F1

VDDQ

H2

VDDQ

H9

VDDQ

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

CV222

CV224

CV223

OPT@

OPT@

OPT@

0.1U_0402_16V4Z

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.5VSDGPU

+1.5VSDGPU

CV225

OPT@

1U_0402_6.3V6K

Group7

Group6

1

1

CV226

OPT@

CV227

2

2

OPT@

1U_0402_6.3V6K

0.1U_0402_16V4Z

CV216

CV217

OPT@

OPT@

0.1U_0402_16V4Z

1U_0402_6.3V6K

CMD0

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21 A8

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

Not Available

CV219

CV218

OPT@

OPT@

1U_0402_6.3V6K

CS0_L#

ODT_L

CKE

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

LOW HIGH

CV220

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

32..63

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

CS0_H#

ODT_H

CKE_H

A13

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

64Mx16 DDR3 *8==>1GB

D

C

B

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

2

Date: Sheet

21 60Friday, August 24, 2012

21 60Friday, August 24, 2012

1

B

B

B

21 60Friday, August 24, 2012

of

of

of

3

1

1

@

D29

3

2

1

C684

C685

2

2.2P_0402_50V8C

2.2P_0402_50V8C

@

D30

PESD5V0U2BT_SOT23-3

3

2

CRT_R_L

CRT_G_L

CRT_B_L

1

2

2.2P_0402_50V8C

CRT_DDC_DAT

CRT_DDC_CK

PCH_CRT_R

PCH_CRT_G

PCH_CRT_B

C680

150_0402_1%

1

2

4

1

1

C682

C681

2.2P_0402_50V8C

2N7002DW-T/R7_SOT363-6

2

2

2.2P_0402_50V8C

+3VS

1

2N7002DW-T/R7_SOT363-6

5

4

3

2

L18

1

NBQ100505T-800Y_0402

L19

1

NBQ100505T-800Y_0402

L20

1

NBQ100505T-800Y_0402

2.2P_0402_50V8C

+CRT_VCC

R677

Q157A

6

Q157B

C689

@

470P_0402_50V8J

PESD5V0U2BT_SOT23-3

2

2

2

C683

2

4.7K_0402_5%

1

1

2

1

2

2

R678

4.7K_0402_5%

1

1

C690

@

470P_0402_50V8J

2

5

D

PCH_CRT_R<27>

PCH_CRT_G<27>

PCH_CRT_B<27>

C

PCH_CRT_DATA<27>

PCH_CRT_CLK<27>

R672

@

33P_0402_50V8K

1

1

1

R670

R671

150_0402_1%

150_0402_1%

2

2

2

PCH_CRT_DATA

PCH_CRT_CLK

1

1

C850

2

C849

@

33P_0402_50V8K

2

2

T264 PAD

+CRT_VCC

T265 PAD

40mil

+5VS

D58

2

+CRT_VCC_R

1

RB491D_SOT23-3

1

3

If=1A

CRT CONNECTOR

CRT11

CRT_R_L

CRT_DDC_DAT

CRT_G_L

HSYNC

CRT_B_L

VSYNC

CRT12

CRT_DDC_CK

1

F3

40mil

2

1.1A_6V_MINISMDC110F-2

0.1U_0402_16V4Z

JCRT

6

RGND

11

ID0

1

Red

7

GGND

12

SDA

2

Green

8

BGND

13

Hsync

3

Blue

9

+5V

14

Vsync

4

res

10

SGND

15

SCL

5

GND

16

GND

17

GND

SUYIN_070546FR015S293ZR

CONN@

C679

+CRT_VCC

1

2

D

C

B

C686

0.1U_0402_16V4Z

PCH_CRT_HSYNC<27>

PCH_CRT_VSYNC<27>

A

5

PCH_CRT_HSYNC

C851

0.1U_0402_16V4Z

PCH_CRT_VSYNC

+CRT_VCC

R1436 10K_0402_5%

2

2

1

1

2

5

1

P

4

2

OE#

Y

A

G

SN74AHCT1G125GW_SOT353-5

3

+CRT_VCC

5

2

A

3

4

1

D_CRT_HSYNC

U38

1

P

4

D_CRT_VSYNC

OE#

Y

G

U39

SN74AHCT1G125GW_SOT353-5

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2

1

L21 10_0402_5%

2

1

L22 10_0402_5%

Issued Date

Issued Date

Issued Date

HSYNC

VSYNC

1

C687

@

1

C688

@

2

2

10P_0402_50V8J

10P_0402_50V8J

Compal Secret Data

Compal Secret Data

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

22 60Friday, August 24, 2012

22 60Friday, August 24, 2012

22 60Friday, August 24, 2012

1

B

A

B

B

B

of

of

of

5

R1440
0_0402_5%

2

BKOFF#

CAMPWR_EN

R1422

10K_0402_5%

TF@

1

2

1

R14410_0402_5% @

R103
33_0402_5%

2

1

R1421

10K_0402_5%

2

R1403 0_0402_5%TF@

1

2

PCH_BL_PWM<27>

INVT_PWM<41>

D

BKOFF#<41>

C

CAMPWR_EN<41>

B

1

C958
180P_0402_50V8J

2

1

2

+5VS

1

2

1

1

2

TF@

R628
100K_0402_5%

2

G

C699

0.1U_0402_16V4Z

@

LCD_BL_PWM

BKOFF#_R

0.1U_0402_16V7K

TF@

1

R624 47K_0402_5%

1

D

Q61

TF@

2N7002_SOT23-3

S

3

Add on 7/27 for fn+f5 turn off camera.

USB20_P10<28>

USB20_N10<28>

A

5

C909

TF@

2

CAMPWR_EN#

4

+5VS

2

3

G

1

2

1

R6 0_0402_5%

1

L4

1

1

4

4

WCM-2012-900T_0805

1

R7 0_0402_5%

4

W=30mils

R1428 0_0603_5%

2

S

Q20
AO3413_SOT23

D

TF@

2

1

+LCDVDD_R

+LCDVDD_R

1

2

1.5A

@

@

C691

0.1U_0402_16V4Z

1

C693

4.7U_0805_10V4Z

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

C678

0.1U_0402_16V4Z

2

B+

L23

2

C319

0.1U_0402_25V4K

DMIC_CLK

DMIC_DATA

DMIC_DATA_R

DMIC_CLK_R

1

1

1

@

680P_0402_50V7K

2

DMIC_CLK <38>

DMIC_DATA <38>

23 60Friday, August 24, 2012

of

23 60Friday, August 24, 2012

of

23 60Friday, August 24, 2012

of

C400

FBMA-L11-201209-221LMA30T_0805

1

2

Rated Current MAX:3000mA

1

1

CE_EN <29>

CE_EN: reserve for special panel,
controlled by PCH--Joyce 0921-2011

R1191

100K_0402_5%

+3VS

1

2

D

C

B

A

B

B

B

C908

2

C671

4.7U_0805_10V4Z

W=30mils

2

2

2

1

2

1

@

1

@

100P_0402_50V8J

2

+LVDS_CAM

JP4

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

GND1

32

GND2

ACES_88242-3001

CONN@

2

+3VS

G

C672

C758

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

Vds=-20V
Id=-3A
Rds=130m ohm

S

3

Vgs=-4.5

Q18

Vth=-1

AO3413_SOT23

D

1

1

W=60mils

2

1

@

C760

100P_0402_50V8J

2

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

+LCD_VDD

1

C673

0.1U_0402_16V4Z

2

PCH_TXCLK+

PCH_TXCLK-

PCH_EDID_CLK

PCH_EDID_DATA

CE_EN_R

LCD_BL_PWM

BKOFF#_R

+LCDVDD_R

+LCDVDD_R

DMIC_CLK_R

2

1

L24

0_0805_5%

Close to JLVDS1

+LCD_INV

1

C692

68P_0402_50V8J

2

2

R1401 0_0402_5%

2

R1402 0_0402_5%

PCH_TXCLK+ < 27>

PCH_TXCLK- <27>

PCH_EDID_CLK <27>

PCH_EDID_DATA <27>

2

1

R183
1K_0402_5%

CE_EN

1

C399

0.1U_0402_16V4Z

1

2

@

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

4019IE

4019IE

4019IE

3

PCH_ENVDD<27>

2N7002DW-T/R7_SOT363-6

short@

2

R1379
0_0402_5%

+LCD_VDD

1

2

Q17A

1

R621
300_0603_5%

6

1

2

3

Q17B

5

2N7002DW-T/R7_SOT363-6

4

+3VS

1

R627
100K_0402_5%

2

0.1U_0402_16V7K

1

R623 47K_0402_5%

0.01U_0402_25V7K

LCD/PANEL BD. Conn.

1

030@

W=30mils

+LVDS_CAM

2

2

USB20_P10_R

@

3

3

USB20_N10_R

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

Must close JLVDS pin 28、30

DMIC_CLK

DMIC_DATA

220P_0402_25V8J

USB20_P10_R

USB20_N10_R

3

1

1

C328

@

C327

@

220P_0402_25V8J

2

2

+3VS

PCH_TXOUT0+<27>

PCH_TXOUT0-<27>

PCH_TXOUT1+<27>

PCH_TXOUT1-<27>

PCH_TXOUT2+<27>

PCH_TXOUT2-<27>

D14

@

PJDLC05_SOT23-3

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

PCH_EDID_CLK

PCH_EDID_DATA

C911
47P_0402_50V8J

2

1

R1427 0_0603_5%

2

1

@

USB20_P10_R

USB20_N10_R

PCH_TXOUT0+

PCH_TXOUT0-

PCH_TXOUT1+

PCH_TXOUT1-

PCH_TXOUT2+

PCH_TXOUT2-

DMIC_DATA_R

+LCD_INV

+LCD_INV

+LCD_INV

3

2

1

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

HDMI Source Select

D

PCH_HDMI_TXC+<27>

PCH_HDMI_TXC-<27>

PCH_HDMI_TX0+<27>

PCH_HDMI_TX0-<27>

PCH_HDMI_TX1+<27>

PCH_HDMI_TX1-<27>

PCH_HDMI_TX2+<27>

PCH_HDMI_TX2-<27>

C

1

2

PCH_HDMI_HPD <27>

D

C

100K_0402_5%

1

3

2

2

2N7002_SOT23-3

Q16

R573

BAV99_SOT23-3
D34

2

2

1

1

2

G

3

1

D

S

C729

0.1U_0402_16V4Z

1

R1568
1M_0402_5%

2

2

C730

@

0.1U_0402_16V4Z

1

+3VS

short@

1

R438 0_0402_5%

5

VGA Video Chanel

DISO and OPT Channel

2

1

C4330.1U_0402_16V7K

2

2

2

2

2

2

2

HDMI_CK+

1

C4010.1U_0402_16V7K

HDMI_CK-

1

HDMI_D0+

C4580.1U_0402_16V7K

1

C3920.1U_0402_16V7K

HDMI_D0-

1

C4020.1U_0402_16V7K

1

C4350. 1U_0402_16V7K

1

C4570.1U_0402_16V7K

1

C4360.1U_0402_16V7K

Internal Graphic Video Chanel

HDMI_D1+

UMAO Channel

HDMI_D1-

HDMI_D2+

HDMI_D2-

4

HDMI_CK+

HDMI_CK-

HDMI_D0+

HDMI_D0-

HDMI_D1+

HDMI_D1-

HDMI_D2+

HDMI_D2-

3

1

@

WCM-2012-121T_0805

4

4

1

1

L9

1

@

1

@

WCM-2012-121T_0805

4

4

1

1

L10

1

@

1

@

WCM-2012-121T_0805

4

4

1

1

L11

1

@

@

1

WCM-2012-121T_0805

4

4

1

1

L12

1

@

2

R164

0_0402_5%

3

2

2

R166

0_0402_5%

2

R167

0_0402_5%

3

2

2

R172

0_0402_5%

2

R173

0_0402_5%

3

2

2

R176

0_0402_5%

2

R177

0_0402_5%

3

2

2

R178

0_0402_5%

3

2

3

2

3

2

3

2

HDMI_R_CK+

HDMI_R_CK-

HDMI_R_D0+

HDMI_R_D0-

HDMI_R_D1+

HDMI_R_D1-

HDMI_R_D2+

HDMI_R_D2-

HOT PLUG1

HDMI_HPD

+HDMI_5V_OUT

EVT mount chock, DVT moun t resistor

HDMI Connector

B

+5VS

HDMI_HPD

+HDMI_5V_OUT

HDMI_SDATA

HDMI_SCLK

HDMI_R_CK-

HDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

A

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

EDID SELECT

if use VGA_HD MI,

+5VS_HDMI

40mil

1.1A_6V_MINISMDC110F-2

D53RB161M-20_SOD123-2

1

2

5

F2

2

JHDMI

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

LOTES_ABA-HDM-029-P01

CONN@

1

+HDMI_5V_OUT

1

C250

0.1U_0402_16V4Z

2

20

GND

21

GND

22

GND

23

GND

HDMI_R_CK+

HDMI_R_CK-

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D2+

HDMI_R_D2-

+5VS

R690~R697 sho uld be 499ohm +/-1%.

R690 680 +-5% 0402

R691 680 +-5% 0402

R692 680 +-5% 0402

R693 680 +-5% 0402

R694 680 +-5% 0402

R695 680 +-5% 0402

R696 680 +-5% 0402

R697 680 +-5% 0402

1

C266

2

0.1U_0402_16V4Z

4

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

1

R698 100K_0402_5%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

1

D

2

Q2

G

2N7002_SOT23-3

S

3

2

Compal Secret Data

Compal Secret Data

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

Compal Secret Data

+3VS

Deciphered Date

Deciphered Date

Deciphered Date

1

R434 0_0402_5%short@

HDMI_R_CLK

BSH111_SOT23-3

HDMI_R_DATA

HDMI_R_CLK

HDMI_R_DATA

2

Q183

3

2

+HDMI_5V_OUT

1

1

R1328

R1329

2

2.2K_0402_5%

3

2

SGD

SGD

1

R433 0_0402_5%

1

R436 0_0402_5%short@

2.2K_0402_5%

2

2

1

Q182

BSH111_SOT23-3

1

short@

2

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

HDMI_SCLK

HDMI_SDATA

PCH_HDMI_CLK <27>

PCH_HDMI_DATA <27>

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

B

A

B

B

24 60Friday, August 24, 2012

24 60Friday, August 24, 2012

24 60Friday, August 24, 2012

1

B

of

of

of

5

2

1

C204 18P_0402_50V8J

Y6

2

1

NC

OSC

3

4

NC

OSC

32.768KHZ_12.5PF_Q13MC14610002

D

MP BOM: Y2-SJ100001K00, C204-18pF, C205-15pF.

another solution: Y2-SJ100004Z00, C204-15pF, C205-15pF.
this is tested OK by DQA, but not add into BOM.

ME_EN from EC.
Please place close to RH29 aviod the branch.

HDA_SDO<41>

AZ_BITCLK_HD<38>

AZ_RST_HD#<38>

AZ_SDOUT_HD<38>

C

PCH_SPKR

HDA_SDO

ME debug mode , this signal has a weak int ernal PD

L=>security me asures defined in the Flash
Descriptor wil l be in effect (default)

H=>Flash Descr iptor Security will be overr idden

HDA_SDOUT

B

AZ_SYNC_HD<38>

HDA_SYNC

This signal has a weak internal pull-down
On Die PLL VR is supplied by

A

1.5V when smapled high

1.8V when sampled low
Needs to be pulled High for Chief River platfrom

@

R182 1K_0402_5%@

Low = Disabled

*

High = Enabled

HDA_SYNC

*

C205 15P_0402_50V8J

R180 0_0402_5%

R101 33_0402_5%

R106 33_0402_5%

R108 33_0402_5%

R1299 1K_0402_5%@

LOW=Default
HIGH=No Reboot

R145 33_0402_5%

R181 1K_0402_5%

32.768KHZ_12.5PF

2

1

far away hot s pot

+RTCVCC

2

1

HDA_BIT_CLK

2

1

2

1

+3VALW_PCH

2

1

AZ_SYNC_HD_R

1M_0402_5%

5

1

Y2

2

1U_0603_10V4Z

1

R97 20K_0402_5%

R98 20K_0402_5%

1U_0603_10V4Z

HDA_SDOUT

HDA_RST#

HDA_SDOUT

+3VS

R418

+3VALW_PCH

R94

+5VS

2

1

1

2

Intel recommend

PCH_RTCX1

1

2

10M_0402_5%

PCH_RTCX2

JCMOS & JME1 place near DIMM

2

C206

CMOS

1

2

2

@

C207

JME1
SHORT PADS

1

ME CMOS

AZ_SDIN0_HD<38>

PCH_SPI_CLK<33>

PCH_SPI_CS#<33>

PCH_SPI_CS1#<33>

PCH_SPI_MOSI<33>

PCH_SPI_MISO<33>

+3VS

2

R189
0_0402_5%

R190

@

0_0402_5%

1

G

2

Q10
BSS138_NL_SOT23-3

3

1

D

S

1

@

@

JCOMS
SHORT PADS

PCH_SPKR<38>

T1512 PAD

T1513 PAD

T1514 PAD

T1515 PAD

HDA_SYNC

2

R1880_0402_5%

4

Integrated SUS 1.05V VRM Enable

High - Enable Internal VRs

PCH_INTVRMEN

(must be always pulled high)

+RTCVCC

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK

HDA_SYNC

PCH_SPKR

HDA_RST#

AZ_SDIN0_HD

HDA_SDOUT

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

R95

R96

PCH_SPI_CLK

PCH_SPI_CS#

PCH_SPI_CS1#

PCH_SPI_MOSI

PCH_SPI_MISO

2

1

1M_0402_5%

2

1

330K_0402_5%

A20

C20

D20

G22

K22

C17

N34

L34

T10

K34

E34

G34

C34

A34

A36

C36

N32

J3

H7

K5

H1

T3

Y14

T1

V4

U3

+3VALW

1

200_0402_5%

2

1

PCH_JTAG_TDO

100_0402_1%

2

Intel DPDG Rev1.2 requirement.

4

SM_INTRUDER#

PCH_INTVRMEN

PCH_INTVRMEN

UPCH1A

RTCX1

RTCX2

RTCRST#

SRTCRST#

INTRUDER#

INTVRMEN

HDA_BCLK

HDA_SYNC

SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

HDA_SDIN2

HDA_SDIN3

HDA_SDO

HDA_DOCK_EN# / GPIO33

HDA_DOCK_RST# / GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_MOSI

SPI_MISO

PANTHER-POINT_FCBGA989

@

+3VALW

RH38

1

XDP@

200_0402_5%

2

PCH_JTAG_TMS

1

RH44

XDP@

100_0402_1%

2

2

RH50

XDP@

51_0402_5%

RH37 330K_0402_5%@

INTVRMEN: check list Rev1.5 P63, P64 error

C38

FWH0 / LAD0

A38

FWH1 / LAD1

LPC_AD0

B37

FWH2 / LAD2

LPC_AD1

C37

FWH3 / LAD3

LDRQ0#

SERIRQ

SATA0RXN

SATA0RXP

SATA0TXN

SATA0TXP

SATA1RXN

SATA1RXP

SATA1TXN

SATA1TXP

SATA2RXN

SATA2RXP

SATA2TXN

SATA2TXP

SATA3RXN

SATA3RXP

SATA3TXN

SATA3TXP

SATA4RXN

SATA4RXP

SATA4TXN

SATA4TXP

SATA5RXN

SATA5RXP

SATA5TXN

SATA5TXP

SATAICOMPI

SATA3COMPI

SATA3RBIAS

SATALED#

LPC_AD2

LPC_AD3

D36

LPC_FRAME#

E36

K36

V5

AM3

AM1

SATA_PRX_C_DTX_N0

AP7

SATA_PRX_C_DTX_P0

AP5

SATA_PTX_DRX_N0

SATA_PTX_DRX_P0

AM10

AM8

AP11

AP10

AD7

AD5

SATA_PRX_C_DTX_N2

AH5

SATA_PRX_C_DTX_P2

AH4

SATA_PTX_DRX_N2

SATA_PTX_DRX_P2

AB8

AB10

AF3

AF1

Y7

Y5

SATA_PRX_C_DTX_N4

AD3

SATA_PRX_C_DTX_P4

AD1

SATA_PTX_DRX_N4

SATA_PTX_DRX_P4

Y3

Y1

AB3

AB1

Y11

Y10

AB12

AB13

AH1

P3

SATA_LED#

V14

PCH_GPIO21

P1

BBS_BIT0_R

RTC

IHDA

JTAG

SPI

LPC

FWH4 / LFRAME#

LDRQ1# / GPIO23

SATA 6G

SATA

SATAICOMPO

SATA3RCOMPO

SATA0GP / GPIO21

SATA1GP / GPIO19

SATA1GP/GPIO19: Integrated 20K pull up.

+3VALW

1

RH40

RH39

XDP@

XDP@

200_0402_5%

2

PCH_JTAG_TDI

RH45

1

RH47

XDP@

XDP@

100_0402_1%

2

1

PCH_JTAG_TCK

R113 10K_0402_5%

R208 4.7K_0402_5%@

R205 10K_0402_5%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2

2

2

@

R207
10K_0402_5%

3

LPC_AD0 <34,41,44>

LPC_AD1 <34,41,44>

LPC_AD2 <34,41,44>

LPC_AD3 <34,41,44>

LPC_FRAME# <34,41,44>

2

1

R99 10K_0402_5%

SATA_COMP

SATA3_COMP

RBIAS_SATA3

SATA0GP / GPIO21: Serial ATA 0 General Purpose.
This is an input pin which can be configured as an
interlock switch corresponding to SATA Port 0.
When used as an interlock switch status indication,
this signal should be drive to
that
the switch is closed and to
the switch is open.
If interlock switches are not required,
this pin can be configured as
GPIO21.

3

+3VS

SERIRQ <34,41,44>

SATA_PRX_C_DTX_N0 <34>

SATA_PRX_C_DTX_P0 <34>

SATA_PTX_DRX_N0 <34>

SATA_PTX_DRX_P0 <34>

SATA_PRX_C_DTX_N2 <34>

SATA_PRX_C_DTX_P2 <34>

SATA_PTX_DRX_N2 <34>

SATA_PTX_DRX_P2 <34>

SATA_PRX_C_DTX_N4 <43>

SATA_PRX_C_DTX_P4 <43>

SATA_PTX_DRX_N4 <43>

SATA_PTX_DRX_P4 <43>

+1.05VS_VCC_SATA

R1202 37.4_0402_1%

+1.05VS_SATA3

2

1

RH42 49.9_0402_1%

RH46 750_0402_1%

SATA_LED# <43>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

HDD

ODD

E-Sata

SATA_LED#

BBS_BIT0_R

PCH_GPIO21

＆0＊

to indicate

＆1＊

to indicate that

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Place near PCH

+RTCVCC

1

W=20mils

C363

0.1U_0402_16V4Z

2

+3VS

1

1

SATA1GP/GPIO19: Boot BIOS Strap bit 0 (BBS0)

GNT1#/GPIO51: Boot BIOS Strap bit 1 (BBS1)

GPIO19 => BBS_BIT0
GPIO51 => BBS_BIT1

Boot BIOS Stra p

Bit 10

Bit 11
(BBS1)

0

1

0

(BBS0)

1

0

1

0

Boot BIOS
Destination

Reserved

PCI

SPI1

*

LPC

PCH EDS Rev1.5 P99, P98

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

Date: Sheet

1

R1300 1K_0402_5%

1

W=20mils

3

2

1

2

D2
BAS40-04_SOT23-3

+CHGRTC

1

+RTCBATT

25 60Friday, August 24, 2012

25 60Friday, August 24, 2012

25 60Friday, August 24, 2012

D

C

B

A

B

B

B

of

of

of

D

C

B

A

+3VALW_PCH

+3VS

1

@

R1523 10K_0402_5%

1

R1521 10K_0402_5%

1

R1527 10K_0402_5%

1

1

R1531 10K_0402_5%

R1530 10K_0402_5%

1

R1522 10K_0402_5%

1

R1529 10K_0402_5%

2

R1217 10K_0402_5%

1

R1520 10K_0402_5%

1

R1532 10K_0402_5%

PEG_CLKREQ#_R

for safe

2

2

2

2

2

2

2

1

2

2

1

2

RN72

@

2.2K_0402_5%

5

WWAN

WLAN

Express Card

Card Reader

LAN

CLK_REQ_CARD#

PCH_GPIO46

CLKREQ_LAN#

PEG_CLKREQ#_R

CLKREQ_R_WWAN#

PCH_GPIO44

PCH_GPIO45

PCH_GPIO56

CLKREQ_WLAN#

CLKREQ_EXPCARD#

RN192 0_0402_5%OPT@

2

G

1

D

1

RN188 0_0402_5%@

5

PCIE_PRX_C_WWANTX_N1<36>

PCIE_PRX_C_WWANTX_P1<36>

PCIE_PTX_C_WWANRX_N1<36>

PCIE_PTX_C_WWANRX_P1<36>

PCIE_PRX_WLANTX_N2<36>

PCIE_PRX_WLANTX_P2<36>

PCIE_PTX_C_WLANRX_N2<36>

PCIE_PTX_C_WLANRX_P2<36>

PCIE_PRX_C_EXPTX_N3<39>

PCIE_PRX_C_EXPTX_P3<39>

PCIE_PTX_C_EXPRX_N3<39>

PCIE_PTX_C_EXPRX_P3<39>

PCIE_PRX_C_CARDTX_N5<37>

PCIE_PRX_C_CARDTX_P5<37>

PCIE_PTX_C_CARDRX_N5<37>

PCIE_PTX_C_CARDRX_P5<37>

PCIE_PRX_C_LANTX_N6<35,42>

PCIE_PRX_C_LANTX_P6<35,42>

PCIE_PTX_C_LANRX_N6<35,42>

PCIE_PTX_C_LANRX_P6<35,42>

LAN

WLAN

Express Card

Card Reader

WWAN

2

1

2

1

RN193 0_0402_5%

@

QN4

OPT@

Add RN192,RN193 5/12

SSM3K7002F_SC59-3

1

3

RN71 0_0402_5%OPT@

S

1

2

RN73

@

2.2K_0402_5%

2

CLKREQ_LAN#<35,42>

CLK_WLAN#<36>

CLK_WLAN<36>

CLKREQ_WLAN#<36>

CLK_PCIE_EXPCARD#<39>

CLK_PCIE_EXPCARD<39>

CLKREQ_EXPCARD#<39>

CLK_PCIE_READER#<37>

CLK_PCIE_READER<37>

CLK_WWAN#<36>

CLK_WWAN<36>

CLKREQ_WWAN#<36>

CLK_RES_ITP#<8>

CLK_RES_ITP<8>

2

C385 0.1U_0402_16V7K

C384 0.1U_0402_16V7K

C215 0.1U_0402_16V7K

C216 0.1U_0402_16V7K

C391 0.1U_0402_16V7K

C386 0.1U_0402_16V7K

C404 0.1U_0402_16V7K

C403 0.1U_0402_16V7K

C217 0.1U_0402_16V7K

C218 0.1U_0402_16V7K

CLK_LAN#<35,42>

CLK_LAN<35,42>

DGPU_PWR_EN <28,45,57>

VGA_PWROK <29,45,57>

Pull high @ VGA side

PEG_CLKREQ# <13>

4

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

short@

2

1

R1213 0_0402_5%

2

1

R1214 0_0402_5%

short@

short@

2

1

R140 0_0402_5%

2

1

R1212 0_0402_5%

short@

short@

2

1

R1227 0_0402_5%

2

1

R1228 0_0402_5%

short@

2

1

R260 0_0402_5%

short@

short@

2

1

R264 0_0402_5%

2

1

2

1

R144 0_0402_5%short@

R255 10K_0402_5%

2

1

R1220 0_0402_5%

short@

2

1

R1226 0_0402_5%

short@

RH108 0_0402_5%@

RH109 0_0402_5%@

4

PCIE_PTX_WWANRX_N1

PCIE_PTX_WWANRX_P1

PCIE_PTX_WLANRX_N2

PCIE_PTX_WLANRX_P2

PCIE_PTX_EXPRX_N3

PCIE_PTX_EXPRX_P3

PCIE_PTX_CARDRX_N5

PCIE_PTX_CARDRX_P5

PCIE_PTX_LANRX_N6

PCIE_PTX_LANRX_P6

CLK_R_LAN#

CLK_R_LAN

CLKREQ_LAN#

CLK_R_WLAN#

CLK_R_WLAN

CLKREQ_WLAN#

CLK_R_CARD#

CLK_R_CARD

CLKREQ_EXPCARD#

CLK_CARD#

CLK_CARD

CLK_REQ_CARD#

CLK_R_WWAN#

CLK_R_WWAN

CLKREQ_R_WWAN#

PCH_GPIO44

PCH_GPIO56

PCH_GPIO45

PCH_GPIO46

CLK_BCLK_ITP#

CLK_BCLK_ITP

UPCH1B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

PANTHER-POINT_FCBGA989

@

SMBUSController

PCI-E*

CLOCKS

PCH_SMLCLK0 <42>

PCH_SMLDATA0 <42>

PCH_HOT# <41>

2

CL_CLK_DMC <36>

2

2

CL_DATA_DMC <36>

CL_RST#_DMC <36>

R253

short@

1

1

R254

short@

2

+1.05VS_VCCDIFFCLKN

2

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

add port to EC--Joyce

+5VALW_PCH

VGA

CLK_PCIE_VGA# <13>

CLK_PCIE_VGA <13>

T15 PA D

@

CLK_SIO_48M <44>

2

3

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1ALERT# / PCHHOT# / GPIO74

Link

PEG_A_CLKRQ# / GPIO47

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

3

E12

H14

SMBCLK

PCH_GPIO11

C9

SMBDATA

PCH_SMBCLK

A12

PCH_SMBDATA

C8

SML0CLK

G12

DRAMRST_CNTRL_PCH

SML0DATA

PCH_SMLCLK0

C13

PCH_SMLDATA0

E14

SML1CLK / GPIO58

M16

SML1DATA / GPIO75

CLKOUT_PEG_A_N

CLKOUT_PEG_A_P

CLKOUT_DMI_N

CLKIN_DOT_96N

CLKIN_DOT_96P

PCH_HOT#

PCH_SMLCLK1

PCH_SMLDATA1

M7

CL_CLK1

T11

CL_DATA1

CL_CLK_DMC

P10

CL_RST1#

CL_DATA_DMC

CL_RST#_DMC

M10

PEG_CLKREQ#_R

AB37

AB38

CLK_VGA#

CLK_VGA

AV22

AU22

CLKOUT_DMI_P

CLK_CPU_DMI#

AM12

CLK_CPU_DMI

CLKOUT_DP_N

AM13

CLKOUT_DP_P

CLK_DP#

CLK_DP

BF18

CLKIN_DMI_N

BE18

CLKIN_DMI_P

PCH_CLK_DMI#

PCH_CLK_DMI

BJ30

CLKIN_GND1_N

BG30

CLKIN_GND1_P

CLKIN_DMI2#

CLKIN_DMI2

G24

E24

CLK_DOT#

CLK_DOT

AK7

CLKIN_SATA_N

AK5

CLKIN_SATA_P

CLK_SATA#

CLK_SATA

K45

REFCLK14IN

XTAL25_OUT

XCLK_RCOMP

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

CLK_14M_PCH

H45

CLK_PCILOOP

V47

XTAL25_IN

V49

PCH_X1

PCH_X2

Y47

XCLK_RCOMP

K43

F47

H47

CLK_FLEX1

K49

CLK_FLEX2

DGPU_PRSNT#

T15, T16 reserve 27M_CLK and 27M_SSC for VGA.
we have crystal at VGA side.

Issued Date

Issued Date

Issued Date

DRAMRST_CNTRL_PCH <7,10>

To EC SM BUS 2

1

R219 2.2K_0402_5%

@

1

R222 2.2K_0402_5%

@

1

R223 10K_0402_5%

@

2

0_0402_5%

2

0_0402_5%

CLK_CPU_DMI# <6>

CLK_CPU_DMI <6>

T13 PA D

@

T14 PAD

@

CLK_PCILOOP <28>

1

R1221 90.9_0402_1%

@

1

R257 0_0402_5%

1

R258 0_0402_5%

short@

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2

1

1

R1207 10K_0402_5%

PCH_GPIO11

DRAMRST_CNTRL_PCH

PCH_HOT#

PCH_SMBCLK

PCH_SMBDATA

PCH_SMLCLK0

PCH_SMLDATA0

PCH_CLK_DMI#

PCH_CLK_DMI

CLKIN_DMI2#

CLKIN_DMI2

CLK_DOT#

CLK_DOT

CLK_SATA#

CLK_SATA

CLK_14M_PCH

If use extenal CLK gen, please place close to
CLK gen, else, please place close to PCH

CLK_14M_PCH

CLK_PCILOOP

Reserve for EMI please close to UPCH1

+3VALW_PCH

R130

2

1

PCH_SMLCLK1

2.2K_0402_5%

R1206

+3VS

2

1

2.2K_0402_5%

PCH_SMLDATA1

PM_SMBCLK<11,12,36,39>

+3VS

PM_SMBDATA<11,12,36,39>

+3VS

2

UMA@

1

2

OPT@

1

2N7002DW T/R7_SOT-363-6

PM_SMBCLK

2

1

R12084.7K_0402_5%

2

1

R12094.7K_0402_5%

2N7002DW T/R7_SOT-363-6

PM_SMBDATA

R1533
10K_0402_5%

R1534
10K_0402_5%

C869

FROM CLK GEN FOR: 133/100/96/14.318 MHZ

Title

Title

Title

Size Document Number Rev

Size Document Number R ev

Size Document Number R ev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

R1320 10K_0402_5%

R1322 2.2K_0402_5%

R1222 2.2K_0402_5%

R1224 2.2K_0402_5%

R1229 2.2K_0402_5%

RH92 10K_0402_5%

1

RH90 10K_0402_5%

RH91 10K_0402_5%

RH76 10K_0402_5%

RH89 10K_0402_5%

RH77 10K_0402_5%

RH79 10K_0402_5%

RH78 10K_0402_5%

RH183 10K_0402_5%

R265

@

33_0402_5%

2

R269

@

33_0402_5%

2

1

Q4A

2N7002DW T/R7_SOT-363-6

1

6

2

EC_SMB_CK2

5

3

2N7002DW T/R7_SOT-363-6

Q4B

EC_SMB_DA2

Q3A

1

6

2

5

+3VS

4

3

Q3B

Y3

1

1

GND

10P_0402_50V8J

2

1

25MHZ_10PF_7V25000014

2

Compal Electronics, Inc.

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

1

R1319 1K_0402_5%

1

2

2

2

1

2

1

2

1

2

2

1

1

2

1

1

1

1

1

@

22P_0402_50V8J

1

C367

@

22P_0402_50V8J

1

4

1

R1225 0_0402_5%short@

1

R1223 0_0402_5%short@

R12161M_0402_5%

3

GND

4

1

+3VALW_PCH

2

2

1

1

+3VALW_PCH

2

2

2

2

2

C368

2

1

2

EC_SMB_CK2 <13,41>

EC_SMB_DA2 <13,41>

2

PCH_SMBCLK

2

PCH_SMBDATA

PCH_X1

PCH_X2

3

10P_0402_50V8J

1

C225

2

26 60Friday, August 24, 2012

26 60Friday, August 24, 2012

26 60Friday, August 24, 2012

D

C

B

A

B

B

B

of

of

of

2

PCH_ENBKL

PCH_EDID_CLK

PCH_EDID_DATA

CTRL_CLK

CTRL_DATA

LVDS_IBG

1

PCH_TXCLK-

PCH_TXCLK+

PCH_TXOUT0-

PCH_TXOUT1-

PCH_TXOUT2-

PCH_TXOUT0+

PCH_TXOUT1+

PCH_TXOUT2+

PCH_CRT_HSYNC

PCH_CRT_VSYNC

CRT_IREF

R1250

+3VS

1

R301 2.2K_0402_5%

1

R302 2.2K_0402_5%

1

R304 2.2K_0402_5%

1

R305 2.2K_0402_5%

1

R1438 4.7K_0402_5%

1

R1620 100K_0402_5%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

UPCH1D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

PANTHER-POINT_FCBGA989

@

2

2

2

2

2

2

PCH_ENBKL

2

R300
100K_0402_5%

1

SDVO_TVCLKINN

SDVO_TVCLKINP

SDVO_STALLN

SDVO_STALLP

SDVO_INTN

SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN

DDPB_AUXP

DDPB_HPD

DDPB_0N

DDPB_0P

DDPB_1N

LVDS

CRT

CTRL_CLK

CTRL_DATA

PCH_EDID_CLK

PCH_EDID_DATA

PCH_BL_PWM

PCH_ENVDD

DDPB_1P

DDPB_2N

DDPB_2P

DDPB_3N

DDPB_3P

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN

DDPC_AUXP

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN

DDPD_AUXP

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

+3VS

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

RH291 2.2K_0402_5%

RH292 2.2K_0402_5%

RH131 150_0402_1%

RH132 150_0402_1%

RH133 150_0402_1%

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

SUSCLK_R <41>

PM_SLP_S5# <41>

PM_SLP_S4# <41>

PM_SLP_S3# <41>

SLP_A# <41>

SLP_LAN# <41>

1

1

@

3

Can be left NC when IAMT is
not support on the platfrom

R284

R283

3

Pull high at LVDS conn side.

DSWODVREN

DSWODVREN - On Die DSW VR Enable

H

：

Enable

*

：

Disable

L

2

8.2K_0402_5%

2

10K_0402_5%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

PCH_ENVDD<23>

PCH_BL_PWM<23>

PCH_EDID_CLK<23>

PCH_EDID_DATA<23>

RH290 0_0402_5%

PCH_TXCLK-<23>

PCH_TXCLK+<23>

PCH_TXOUT0-<23>

PCH_TXOUT1-<23>

PCH_TXOUT2-<23>

PCH_TXOUT0+<23>

PCH_TXOUT1+<23>

PCH_TXOUT2+<23>

RH127 330K_0402_5%

RH129 330K_0402_5%@

PCH_CRT_B<22>

PCH_CRT_G<22>

PCH_CRT_R<22>

PCH_CRT_CLK<22>

PCH_CRT_DATA<22>

PCH_CRT_HSYNC<22>

PCH_CRT_VSYNC<22>

+3VS

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2

1

RH244 2.37K_0402_1%

short@

2

+RTCVCC

PCH_CRT_B

PCH_CRT_G

PCH_CRT_R

PCH_CRT_CLK

PCH_CRT_DATA

1K_0402_0.5%

PCH_ENBKL<41>

5

UPCH1C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

RI#

+3VALW_PCH

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

PANTHER-POINT_FCBGA989

@

SYSTEM_PWROK <6>

1

R1255
10K_0402_5%

2

DMI_CTX_PRX_N0<5>

DMI_CTX_PRX_N1<5>

DMI_CTX_PRX_N2<5>

DMI_CTX_PRX_N3<5>

DMI_CTX_PRX_P0<5>

DMI_CTX_PRX_P1<5>

DMI_CTX_PRX_P2<5>

PM_DRAM_PWRGD<6>

PCH_RSMRST#<41>

PBTN_OUT#<41>

2

RH135 0_0402_5%

C953 180P_0402_50V8J@

PCH_GPIO72

RI#

EC_SWI#

AC_PRESENT_R

SUSWARN#_R

SLP_R_LAN#

PCH_RSMRST#_R

PM_PWROK

+1.05VS_PCH

RH118 0_0402_5%

SUSWARN#<41>

ACIN<13,41,48>

@

1

2

1

DMI_CTX_PRX_P3<5>

DMI_CRX_PTX_N0<5>

DMI_CRX_PTX_N1<5>

DMI_CRX_PTX_N2<5>

DMI_CRX_PTX_N3<5>

DMI_CRX_PTX_P0<5>

DMI_CRX_PTX_P1<5>

DMI_CRX_PTX_P2<5>

DMI_CRX_PTX_P3<5>

+3VS

1

PCH_RSMRST#

SUSWARN#

short@

PM_PWROK

R35 10K_0402_5%

VPRO@

R13140_0402_5%

R1251 10K_0402_5%

R1252 10K_0402_5%

R279 10K_0402_5%

R1244 330K_0402_5%

R1243 10K_0402_5%

R282 10K_0402_5%

R1257 10K_0402_5%

R1256 10K_0402_5%

5

D

C

PCH_APWROK<41>

SUSACK#

B

VGATE<54>

PM_PWROK<41>

A

DMI_CTX_PRX_N0

DMI_CTX_PRX_N1

DMI_CTX_PRX_N2

DMI_CTX_PRX_N3

DMI_CTX_PRX_P0

DMI_CTX_PRX_P1

DMI_CTX_PRX_P2

DMI_CTX_PRX_P3

DMI_CRX_PTX_N0

DMI_CRX_PTX_N1

DMI_CRX_PTX_N2

DMI_CRX_PTX_N3

DMI_CRX_PTX_P0

DMI_CRX_PTX_P1

DMI_CRX_PTX_P2

DMI_CRX_PTX_P3

R1236 49.9_0402_1%

RH112 750_0402_1%

DMI_IRCOMP

RBIAS_CPY

4mil width and place
within 500mil of the PCH

SUSACK#

SYS_RST#

SYSTEM_PWROK

8111E@

RH120 0_0402_5%

short@

R2

PM_DRAM_PWRGD

0_0402_5%

2

1

R291 0_0402_5%short@

short@

RH137 0_0402_5%

D12

1

2

+3VS

5

U12

1

P

IN1

O

2

IN2

G

TC7SH08FU(TE85L,F)

3

@

PM_PWROK

PCH_RSMRST#_R

SUSWARN#_R

PBTN_OUT#_R

AC_PRESENT_R

PCH_GPIO72

4

SYSTEM_PWROK

2

CH751H-40PT_SOD323-2

VGATE

4

BJ14

FDI_RXN0

AY14

FDI_RXN1

BE14

FDI_RXN2

BH13

FDI_CTX_PRX_N0

FDI_RXN3

BC12

FDI_CTX_PRX_N1

FDI_RXN4

BJ12

FDI_CTX_PRX_N2

FDI_RXN5

BG10

FDI_CTX_PRX_N3

FDI_RXN6

BG9

FDI_CTX_PRX_N4

FDI_RXN7

FDI_CTX_PRX_N5

BG14

FDI_CTX_PRX_N6

FDI_RXP0

BB14

FDI_CTX_PRX_N7

FDI_RXP1

BF14

FDI_RXP2

BG13

FDI_CTX_PRX_P0

FDI_RXP3

BE12

FDI_CTX_PRX_P1

FDI_RXP4

BG12

FDI_CTX_PRX_P2

FDI_RXP5

BJ10

FDI_CTX_PRX_P3

FDI_RXP6

BH9

FDI

DMI

FDI_FSYNC0

FDI_FSYNC1

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

SLP_LAN# / GPIO29

Check EC for S3 S4 LED

祥

support deep S4/S5:

"SUSWARN#'

妗妗妗妗妗

SUSWARN# /SUSPWRDNACK/ GPIO30 (Mobile Only):
Used by Intel@ME as either SUSWARN#
in Deep S4/S5 state supported platforms
or as SUSPWRDNACK in non Deep S4/S5
state supported platforms.

4

FDI_CTX_PRX_P4

FDI_RXP7

FDI_CTX_PRX_P5

FDI_CTX_PRX_P6

AW16

FDI_CTX_PRX_P7

FDI_INT

AV12

FDI_INT

BC10

FDI_FSYNC0

AV14

FDI_LSYNC0

FDI_FSYNC1

BB10

FDI_LSYNC1

FDI_LSYNC0

FDI_LSYNC1

A18

DSWVRMEN

DSWVRMEN: must be always pulled-up to VCCRTC. --PCH EDS

E22

DPWROK

DSWODVREN

non Deep S4/S5: tied "DPWROK"to RSMRST#.

RH113 0_0402_5%

B9

PCH_DPWROK

WAKE#

EC_SWI#

N3

PM_CLKRUN#

G8

SUS_STAT#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

N14

D10

H4

F4

G10

G16

AP14

K14

SUSCLK

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

SLP_R_A#

H_PM_SYNC

SLP_R_LAN#

2

RH119 0_0402_5%

RH116 0_0402_5%

T21PAD

1

RH117 0_0402_5%

"SUSPWRDNACK"

PCH_RSMRST#_R

EC_SWI# <35,36,39>

PM_CLKRUN# <34,44>

SUS_STAT# <34>

short@

1

1

VPRO@

2

VPRO@

PM_CLKRUN#

FDI_CTX_PRX_N0 <5>

FDI_CTX_PRX_N1 <5>

FDI_CTX_PRX_N2 <5>

FDI_CTX_PRX_N3 <5>

FDI_CTX_PRX_N4 <5>

FDI_CTX_PRX_N5 <5>

FDI_CTX_PRX_N6 <5>

FDI_CTX_PRX_N7 <5>

FDI_CTX_PRX_P0 <5>

FDI_CTX_PRX_P1 <5>

FDI_CTX_PRX_P2 <5>

FDI_CTX_PRX_P3 <5>

FDI_CTX_PRX_P4 <5>

FDI_CTX_PRX_P5 <5>

FDI_CTX_PRX_P6 <5>

FDI_CTX_PRX_P7 <5>

FDI_INT <5>

FDI_FSYNC0 <5>

FDI_FSYNC1 <5>

FDI_LSYNC0 <5>

FDI_LSYNC1 <5>

T18

T19

T20

2

T22PAD

H_PM_SYNC <6>

1

AP43

AP45

+3VS

AM42

AM40

AP39

AP40

P38

M39

AT49

AT47

AT40

AV42

AV40

AV45

AV46

AU48

AU47

AV47

AV49

P46

P42

AP47

AP49

AT38

AY47

AY49

AY43

AY45

BA47

BA48

BB47

BB49

M43

M36

AT45

AT43

BH41

BB43

BB45

BF44

BE44

BF42

BE42

BJ42

BG42

R1334

2.2K_0402_5%

PCH_HDMI_HPD

PCH_HDMI_TX2-

PCH_HDMI_TX2+

PCH_HDMI_TX1-

PCH_HDMI_TX1+

PCH_HDMI_TX0-

PCH_HDMI_TX0+

PCH_HDMI_TXC-

PCH_HDMI_TXC+

R1235 100K_0402_5%

1

@

100K_0402_5%

2

R1475

2

1

2

1

2

1

2

1

2

1

1

1

R1335

2.2K_0402_5%

2

2

100K_0402_5%

2

1

@

PCH_CRT_CLK

PCH_CRT_DATA

PCH_CRT_B

PCH_CRT_G

PCH_CRT_R

Compal Electronics, Inc.

1

PCH_HDMI_CLK <24>

PCH_HDMI_DATA <24>

2

1

RH142

@

PCH_HDMI_HPD <24>

PCH_HDMI_TX2- <24>

PCH_HDMI_TX2+ <24>

PCH_HDMI_TX1- <24>

PCH_HDMI_TX1+ <24>

PCH_HDMI_TX0- <24>

PCH_HDMI_TX0+ <24>

PCH_HDMI_TXC- <24>

PCH_HDMI_TXC+ <24>

27 60Friday, August 24, 2012

of

27 60Friday, August 24, 2012

of

27 60Friday, August 24, 2012

of

D

C

B

A

B

B

B

+3VS

D

DEL RP5, ADD R316,R317,R318 FOR REMOVE
GPIO53 PU---0609

C

B

A

2

1

R320 8.2K_0402_5%

2

1

2

1

R321 8.2K_0402_5%

2

1

R322 8.2K_0402_5%

R323 8.2K_0402_5%

2

1

2

1

R324 8.2K_0402_5%

R327 8.2K_0402_5%

2

1

2

1

R329 8.2K_0402_5%

R330 8.2K_0402_5%

2

1

@

R319 8.2K_0402_5%

2

1

R316 8.2K_0402_5%

2

1

R317 8.2K_0402_5%

2

1

R318 8.2K_0402_5%

2

1

R310 8.2K_0402_5%

2

1

R311 8.2K_0402_5%

2

1

@

R127710K_0402_5%

DGPU_PWR_EN<26,45,57>

CLK_PCI_EC<41>

CLK_PCILOOP<26>

CLK_PCI_SIO<44>

CLK_PCI_TPM<34>

BUF_PLT_RST#

R157

100K_0402_5%

DGPU_HOLD_RST#

5

PCH_GPIO55

PCH_GPIO51

PCH_GPIO52

PCI_PIRQA#

PCH_GPIO2

PCH_GPIO4

PCH_GPIO53

PCI_PIRQC#

DGPU_HOLD_RST#_R

PCI_PIRQB#

DGPU_PWR_EN_R

PCH_GPIO5

PCI_PIRQD#

DGPU_PWR_EN

DGPU_HOLD_RST#

PLT_RST#<6,34,35,36,37,39,41,42,44>

2

1

2

R413
1K_0402_5%

OPT@

1

5

ODD_DA#

R262 0_0402_5%

1

R161 0_0402_5%

PLT_RST#

+3VS

5

U8

1

P

IN1

O

2

IN2

G

TC7SH08FU(TE85L,F)

3

+3VS_DGPU

U20

5

OPT@

1

P

IN1

2

IN2

G

TC7SH08FU(TE85L,F)

3

USB3.0 Port0

2

OPT@

OPT@

4

2

C477

0.1U_0402_16V4Z

1

OPT@

4

O

R261 0_0402_5%OPT@

USB3_RX0_N<40>

USB3_RX0_P<40>

USB3_TX0_N<40>

USB3_TX0_P<40>

1

2

ODD_DA#<34>

2

1

@

R259 0_0402_5%

2

1

R28022_0402_5%

2

1

R28522_0402_5%

2

1

R28122_0402_5%

2

1

R28622_0402_5%

2

R151

100K_0402_5%

1

2

1

PCI_PIRQA#

PCI_PIRQB#

PCI_PIRQC#

PCI_PIRQD#

DGPU_HOLD_RST#_R

PCH_GPIO52

DGPU_PWR_EN_R

PCH_GPIO51

PCH_GPIO53

PCH_GPIO55

PCH_GPIO2

ODD_DA#

PCH_GPIO4

PCH_GPIO5

BUF_PLT_RST#

CLK_PCI_EC_R

CLK_PCI

CLK_SIO

CLK_TPM

PLT_RST#

+3VS_DGPU

R165

100K_0402_5%

OPT@

1

2

2

1

BG26

BJ26

BH25

BJ16

BG16

AH38

AH37

AK43

AK45

C18

N30

AH12

AM4

AM5

Y13

K24

L24

AB46

AB45

B21

M20

AY16

BG46

BE28

BC30

BE32

BJ32

BC28

BE30

BF32

BG32

AV26

BB26

AU28

AY30

AU26

AY26

AV28

AW30

K40

K38

H38

G38

C46

C44

E40

D47

E42

F46

G42

G40

C42

D44

K10

C6

H49

H43

J48

K42

H40

RV49
10K_0402_5%

@

4

TP1

TP2

TP3

TP4

TP5

TP6

TP7

TP8

TP9

TP10

TP11

H3

TP12

TP13

TP14

TP15

TP16

TP17

TP18

TP19

TP20

TP21

TP22

TP23

TP24

USB3Rn1

USB3Rn2

USB3Rn3

USB3Rn4

USB3Rp1

USB3Rp2

USB3Rp3

USB3Rp4

USB3Tn1

USB3Tn2

USB3Tn3

USB3Tn4

USB3Tp1

USB3Tp2

USB3Tp3

USB3Tp4

PIRQA#

PIRQB#

PIRQC#

PIRQD#

REQ1# / GPIO50

REQ2# / GPIO52

REQ3# / GPIO54

GNT1# / GPIO51

GNT2# / GPIO53

GNT3# / GPIO55

PIRQE# / GPIO2

PIRQF# / GPIO3

PIRQG# / GPIO4

PIRQH# / GPIO5

PME#

PLTRST#

CLKOUT_PCI0

CLKOUT_PCI1

CLKOUT_PCI2

CLKOUT_PCI3

CLKOUT_PCI4

PANTHER-POINT_FCBGA989

@

PLTRST_VGA# <13>

4

RSVD

PCI

USB

RSVD1

RSVD2

RSVD3

RSVD4

RSVD5

RSVD6

RSVD7

RSVD8

RSVD9

RSVD10

RSVD11

RSVD12

RSVD13

RSVD14

RSVD15

RSVD16

RSVD17

RSVD18

RSVD19

RSVD20

RSVD21

RSVD22

RSVD23

RSVD24

RSVD25

RSVD26

RSVD27

RSVD28

RSVD29

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

USBP12N

USBP12P

USBP13N

USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59

OC1# / GPIO40

OC2# / GPIO41

OC3# / GPIO42

OC4# / GPIO43

OC5# / GPIO9

OC6# / GPIO10

OC7# / GPIO14

AY7

AV7

AU3

BG4

AT10

BC8

AU2

AT4

AT3

AT1

AY3

AT5

AV3

AV1

BB1

BA3

BB5

BB3

BB7

BE8

BD4

BF6

AV5

AV10

NV_ALE

AT8

AY5

BA2

AT12

BF3

C24

A24

C25

USB20_N0

B25

USB20_P0

USB20_N1

C26

USB20_P1

A26

K28

H28

USB20_N3

E28

USB20_P3

D28

USB20_N4

C28

USB20_P4

A28

USB20_N5

C29

USB20_P5

B29

N28

M28

L30

USB port 6,7 are disabled on HM76 and HM75.

K30

USB20_N8

G30

USB20_P8

E30

C30

USB20_N9

A30

USB20_P9

L32

USB20_N10

K32

USB20_P10

G32

USB20_N11

E32

USB20_P11

C32

USB20_N12

A32

USB20_P12

USB20_N13

USB20_P13

C33

USBRBIAS

B33

A14

K20

B17

USB_OC0#

C16

USB_OC1#

L16

USB_OC2#

USB_OC3#

A16

USB_OC4#

D14

C14

PCH_GPIO9

PCH_GPIO10

CP_PE#

3

USB20_N0 <40>

USB20_P0 <40>

USB20_N1 <43>

USB20_P1 <43>

USB20_N3 <44>

USB20_P3 <44>

USB20_N4 <44>

USB20_P4 <44>

USB20_N5 <39>

USB20_P5 <39>

USB20_N8 <39>

USB20_P8 <39>

USB20_N9 <43>

USB20_P9 <43>

USB20_N10 <23>

USB20_P10 <23>

USB20_N11 <40>

USB20_P11 <40>

USB20_N12 <36>

USB20_P12 <36>

USB20_N13 <36>

USB20_P13 <36>

RH165 22.6_0402_1%

Within 500 mils

USB_OC0# <40>

USB_OC1# <44>

USB_OC4# <40,43>

CP_PE# <39>

3

2

SATA1GP/GPIO19: Boot BIOS Strap bit 0 (BBS0)

GNT1#/GPIO51: Boot BIOS Strap bit 1 (BBS1)

GPIO19 => BBS_BIT0
GPIO51 => BBS_BIT1

Boot BIOS Stra p

Bit 10

Bit 11
(BBS1)

0

1

0

(BBS0)

1

0

1

0

Boot BIOS
Destination

Reserved

PCI

SPI1

*

LPC

PCH EDS Rev1.5 P99, P98

USB30

L-CONN

R-CONN

R-CONN

Smart Card

New Card

USB port with Esata

Int. Camera

Finger Printer

WWAN

BT

For USB3.0, Left USB.
For Right power USB port

For USB port with eSATA.

USB_OC3#

USB_OC4#

USB_OC2#

USB_OC0#

USB_OC1#

CP_PE#

PCH_GPIO9

PCH_GPIO10

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

Compal Secret Data

Compal Secret Data

Compal Secret Data

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Deciphered Date

Deciphered Date

Deciphered Date

2

1

Intel Anti-Theft Techonlogy

High=Endabled

NV_ALE

Low=Disable(floating)

RH164 1K_0402_5%@

NV_ALE

+3VALW_PCH

2

1

2

1

R1270 10K_0402_5%

R1271 10K_0402_5%

2

1

R1268 10K_0402_5%

2

1

R1267 10K_0402_5%

2

1

R1269 10K_0402_5%

2

1

@

R1306 10K_0402_5%

2

1

R1307 10K_0402_5%

2

1

R1308 10K_0402_5%

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

Date: Sheet

*

+1.8VS

1

D

C

B

A

B

B

B

28 60Friday, August 24, 2012

of

28 60Friday, August 24, 2012

of

28 60Friday, August 24, 2012

of

PLT_RST#

5

+3VALW_PCH

D

C

B

@

2

1

QAL50/51, PBL22: GPIO24 NC

R133210K_0402_5%

2

1

R133010K_0402_5%

2

1

2

1

R6110K_0402_5%

R128410K_0402_5%

PM_LANPHY_ENABLE

2

1

R33710K_0402_5%

2

1

R33810K_0402_5%

+3VS

2

1

R132510K_0402_5%

2

1

2

1

R132310K_0402_5%

R127410K_0402_5%

2

1

R127810K_0402_5%

VGA_PWROK_R

2

1

R33910K_0402_5%

2

1

2

1

R35210K_0402_5%

R128010K_0402_5%

2

1

R34 200K_0402_5%

2

1

ODD_DETECT#

R128610K_0402_5%

2

1

R36 200K_0402_5%

2

1

R132410K_0402_5%

2

1

R129610K_0402_5%

2

1

R132610K_0402_5%

2

1

R35610K_0402_5%

2

1

R35510K_0402_5%

2

1

@

R36510K_0402_5%

2

1

@

R127510K_0402_5%

PCH_GPIO27 (Ha ve internal Pu ll-High)
High: VCCVRM V R Enable
Low: VCCVRM VR Disable

Can be configured as wake input to allow wakes from
Deep Sleep.
If not used then use 8.2-kΩ to 10-kΩ pull-down to
GND.

GPIO28

On-Die PLL Vol tage Regulator
This signal ha s a weak inter nal pull up

2

1

R328 10K_0402_5%

@

H

：

On-Die voltage regulator enable

*

L：On-Die PLL Voltage Regulator disable

2

1

R325 1K_0402_5%@

PCH_GPIO24

LID_SW#_R

EC_SMI#

PCH_GPIO28

PCH_GPIO57

PCH_GPIO0

PCH_GPIO1

KB_RST#

PCH_GPIO22

CR_WAKE#

CR_PE#

PCH_GPIO6

WWAN_R_OFF#

CE_EN

EC_SCI#

PCH_GPIO39

PCH_GPIO48

WL_R_OFF#

WWAN_R_OFF#

PCH_GPIO35

*

GPIO27_WAKE#_R

2

1

R331 10K_0402_5%

@

PCH_GPIO28PCH_GPIO28PC H_GPIO28PCH_GPIO28

LID_SW_OUT#<41>

GPIO27_WAKE#<35,41>

WWAN_OFF#<36,41>

WL_OFF#<36,41>

+3VALW

KEEP LOW XXMS ACTIVE,
NOT TAKE ACTIVE ON
RISE/FALL EDGE

PM_LANPHY_ENABLE<42>

VGA_PWROK<26,45,57>

RH171 0_0402_5%

CR_WAKE#<37>

ODD_DETECT#<34>

RH167 0_0402_5%@

4

UPCH1F

T7

BMBUSY# / GPIO0

1

LID_SW#_R

PCH_GPIO57

T1911PAD @

T1927PAD @

T1929P AD @

T1931P AD @

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49 / TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

PANTHER-POINT_FCBGA989

@

PCH_GPIO0

PCH_GPIO1

EC_SCI#<41>

EC_SMI#<41>

CR_PE#<37>

1

CE_EN<23>

RH166 0_0402_5%@

PCH_GPIO6

EC_SCI#

EC_SMI#

2

PM_LANPHY_ENABLE

R147 0_0402_5%

short@

CR_PE#

2

1

RH170 0_0402_5%short@

VGA_PWROK_R

PCH_GPIO22

2

PCH_GPIO24

GPIO27_WAKE#_R

PCH_GPIO28

CR_WAKE#

PCH_GPIO35

ODD_DETECT#

2

1

WWAN_R_OFF#

CE_EN

PCH_GPIO39

2

1

PCH_GPIO48

WL_R_OFF#

T1913P AD @

T1933PAD @

PCH_GPIO28 nee ds to be conne cted to XDP_FN 8
PCH_GPIO35 nee ds to be conne cted to XDP_FN 9
PCH_GPIO15 nee ds to be conne cted to XDP_FN 16

Please refer t o Huron River Debug Board DG 1.2

GPIO

NCTF

3

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

A20GATE

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

RCIN#

2

2

1

R128710K_0402_5%

C40

B41

ODD_EN#

C41

PROJECT_ID0

A40

PROJECT_ID1

PROJECT_ID2

2

1

R1259

10K_0402_5%

P4

AU16

GATEA20

PECI

P5

PCH_PECI_R

AY11

AY10

T14

PCH_THRMTRIP#

AY1

NV_CLE

AH8

AK11

AH10

AK10

P37

NC_1

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

1

KB_RST# <41>

H_CPUPWRGD <6>

1

R1261 390_0402_5%

T1908 PAD@

T1912 PAD@

T1914 PAD@

T1916 PAD@

T1926 PAD@

T1930 PAD@

2

RH1590_0402_5% @

2

+3VS

ODD_EN# <34>

+3VS

GATEA20 <41>

H_PECI <6,41>

H_THERMTRIP#

INIT3_3V

This signal has weak internal
PU, can't pull low

H_THERMTRIP# <6>

NV_CLE

PROJECT_ID2

PROJECT_ID2

PROJECT_ID0

PROJECT_ID1

PROJECT_ID2 PROJECT_ID1 PROJECT_ID0

QAQ10 (UMA)

QAQ11 (Optimus )

QAQ12 (UMA) 0 0

QAQ13 (Optimus ) 0 1 1

QAT10 (UMA) 010

QAT11 (Optimus )

QAQ12 (vPro) 110

QAQ13 (vPro)

For TongFang: QAQ10 (UMA) / QAQ11 (Optimus)
For 030: QAQ12 (UMA) / QAQ13 (Optimus)

1

DMI Termination Voltage

Set to Vcc when HIGH

NV_CLE

Set to Vss when LOW

Weak internal
PU,Do not pull low

+1.8VS

RH187

2.2K_0402_5%

2

1

RH1891K_0402_5%

CLOSE TO THE BRANCHING POINT

2

1

R1279 10K_0402_5%

2

1

R1276 10K_0402_5%@

2

1

OPT@

R33310K_0402_5%

2

1

UMA@

R37010K_0402_5%

2

1

030@

R40910K_0402_5%

2

1

TF@

R40810K_0402_5%

0

0

0

0

1

1

0

1

1 1

1

2

0

1

1

D

H_SNB_IVB# <6>

+3VS

C

B

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

5

4

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

2

Date: Sheet

29 60Friday, August 24, 2012

29 60Friday, August 24, 2012

29 60Friday, August 24, 2012

1

A

B

B

B

of

of

of

S0 Iccmax
Current (A)

1.05/1.0

0.002

5

0.001

0.001

5

3.3

0.178

0.063

3.3

0.075

1.05

0.075

1.05

1.73

1.05

0.047

1.1

1.05VccIO 3.799

1.05VccASW 0.803

3.3VccSPI 0.01

3.3VccDSW 0.001

1.8 0.002VccDFTERM

3.3VccRTC N/A

3.3VccSus3_3

0.065

3.3VccSusHDA

0.01

1.05VccCLKDMI

0.075

0.001

1.8VccTX_LVDS 0.04

1

D

C

B

L5

MBK1608221YZF_2P

2

L6

2

+1.5VS

R361
0_0805_5%

1

1

C255
1U_0402_6.3V6K

2

1

1

2

2

+3VS

+1.8VS

+1.05VS_PCH

PCH Power Rail Table
Refer to PCH EDS R1.5

Voltage Rail

Voltage

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

VccVRM 1.5 0.147

VccSSC 1.05 0.095

VccDIFFCLKN 1.05 0.050

VccALVDS 3.3

+VCCADAC

U48

U47

AK36

AK37

AM37

AM38

AP36

AP37

V33

+3VS_VCC3_3_6

V34

AT16

AT20

+VCCP_VCCDMI

AB36

+1.05VS_VCC_DMI_CCI

AG16

AG17

AJ16

AJ17

V1

+3V_VCCPSPI

1U_0402_6.3V6K

C271

+VCCALVDS

+VCCTX_LVDS

+VCCAFDI_VRM

C268

3

1

2

1

1

C309

2

2

0.01U_0402_16V7K

2

1

R423 0_0805_5%

C310

0.01U_0402_16V7K

1

C254

0.1U_0402_10V7K

2

+VCCAFDI_VRM

+VCCP_VCCDMI

1

C262
1U_0402_6.3V6K

2

+VCCPNAND

1

C263

0.1U_0402_10V7K

2

R362
0_0805_5%

1

VPRO@

1

1

8111E@

R414
0_0805_5%

2

C308

0.1U_0402_10V7K

+3VS

1

C366

0.01U_0402_16V7K

2

R363

1

0_0805_5%

R359
0_0805_5%

1

2

+3V_M

2

+3VS

1

2

2

2

C249

10U_0603_6.3V6M

1

2

+3VS

R366
0_0603_5%

1

+1.05VS_PCH

R360
0_0805_5%

1

1

2

10U_0603_6.3V6M

0.1UH_MLF1608DR10KT_10%_160 8

C311

0.1uH inductor, 200mA

22U_0805_6.3V6M

2

+1.8VS

2

C247

1U_0402_6.3V6K

+VCCAPLLEXP

C264

1U_0402_6.3V6K

1

2

4

UPCH1G

1300mA

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

PANTHER-POINT_FCBGA989

@

3709mA

POWER

VCC CORE

VCCIO

FDI

VCCADAC

1mA

VSSADAC

CRTLVDS

VCCALVDS

1mA

VSSALVDS

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCTX_LVDS[3]

40mA

VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

HVCMOS

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

DMI

75mA

VCCDFTERM[1]

VCCDFTERM[2]

2mA

VCCDFTERM[3]

VCCDFTERM[4]

DFT / SPI

10mA

VCCSPI

5

+1.05VS_PCH

C244

1U_0402_6.3V6K

C245

10U_0603_6.3V6M

C246

1U_0402_6.3V6K

1

1

2

2

LH3

@

+1.05VS_VCC_EXP

C269

1U_0402_6.3V6K

+3VS_VCCA3GBG

1

2

2

1

+1.05VS_VCCDPLLEXP

2

1

@

2

CH41

10U_0805_6.3V6M

C267

1U_0402_6.3V6K

C258

1U_0402_6.3V6K

1

1

2

2

+VCCAFDI_VRM

+1.05VS_VCCAPLL_FDI

R364

2

1

0_0805_5%

+1.05VS_VCCDPLL_FDI

+VCCP_VCCDMI

Intel recommand
VCCVRM==>1.5V FOR MOBILE

1

D

+1.05VS_PCH

@

RH210 0_060 3_5%

+1.05VS_PCH

PJPH1

@

+1.05VS_PCH

2

PAD-OPEN 3x3m

+3VS

R367

@

0_0603_5%

2

1

1U_0402_6.3V6K

C

B

2

+1.05VS_PCH

R357 0_0603_5%

1

1UH_LB2012T1R0M_20%

+VCCAPLLEXP_R

1

C256

10U_0603_6.3V6M

1

1

2

2

R369

0_0805_5%

2

1

1

C270

0.1U_0402_10V7K

2

Place C265 Near BG6 pin

1

C265

@

+1.05VS_PCH

2

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

2

Date: Sheet

30 60Frid ay, August 24, 2012

30 60Frid ay, August 24, 2012

30 60Frid ay, August 24, 2012

1

A

B

B

B

of

of

of

5

R386

@

0_0805_5%

2

1

+3VS

L7

10UH_LB2012T100MR_20%

2

1

D

DcpSus and DcpSusByp do not require Decoupling.
Stuffing Decoupling Caps may cause voltage
oscillations, when Internal 1.05 Voltage
Regulator is used. By CPET

Short J6 When No VPRO

+1.05VM_PCH

@

C

+1.05VS_PCH

10UH_LB2012T100MR_20%

+1.05VS_PCH

B

+1.05VS_PCH

+1.05VS_PCH

+1.05VM_PCH

A

C273

10U_0603_6.3V6M

1

+3VS_VCC_CLKF33

2

+1.05VS_PCH

J6

+1.05VS_PCH

1

2

PAD-OPEN 2x2m

L16

10UH_LB2012T100MR_20%

1

2

1

L14

R399

0_0603_5%

2

1

1

R417

2

0_0603_5%

2

1

1

2

R416

0_0603_5%

2

1

1

2

R398

@

0_0603_5%

2

1

1

2

2

+VCCDIFFCLK

C315
1U_0402_6.3V6K

+1.05VS_VCCDIFFCLKN

C318
1U_0402_6.3V6K

+1.05VS_SSCVCC

C317
1U_0402_6.3V6K

+1.05VM_VCCSUS

C316
1U_0402_6.3V6K

C286

220U_B2_2.5VM_R35

1

+

2

C278

1U_0402_6.3V6K

1

2

R372

@

2

1

0_0805_5%

+1.05VS_VCCA_A_DPL

C288

1U_0402_6.3V6K

+1.05VS_VCCA_B_DPL

1

2

+1.05VS_VCCDIFFCLKN

+3VALW

+3VALW_PCH

Stuff C277 will make

@

voltage leakage

10UH_LB2012T100MR_20%

1

+VCCAPLL_CPY

10U_0603_6.3V6M

+1.05VM_PCH

C312

220U_B2_2.5VM_R35

1U_0402_6.3V6K

1

+

1

2

2

+1.05VS_PCH

+1.05VS_PCH

R382

0_0603_5%

1

1

R415

@

0_0603_5%

L8

@

C289

R395

0_0603_5%

1

2

2

2

C274

R379

0_0805_5%

1

0.1U_0402_10V7K

0.1U_0402_10V7K

2

1

2

@

0_0603_5%

2

1

+1.05VS_PCH

2

2

4.7U_0603_6.3V6K

C301

R374

C306

C299

4

1

2

1U_0402_6.3V6K

1

2

0.1U_0402_10V7K

1

2

1

+VCCPDSW

C293

C277

0.1U_0402_10V7K

2

+1.05VM_VCCASW

1

2

1

C292

2

1

2

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

1

2

C302

0.1U_0402_10V7K

1

2

+VCCACLK

1

0.1U_0402_10V7K@

+PCH_VCCDSW

+3VS_VCC_CLKF33

2

1

+VCCAPLL_CPY_PCH

R375 0_0603_5%

+VCCDPLL_CPY

1

+VCCSUS1

C276

@

1U_0402_6.3V6K

2

C280

22U_0805_6.3V6M

1

C279

22U_0805_6.3V6M

2

C281

1U_0402_6.3V6K

C282

1U_0402_6.3V6K

1

2

+VCCRTCEXT

+VCCAFDI_VRM

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

+1.05VS_SSCVCC

+VCCSST

+1.05VM_VCCSUS

+V_CPU_IO

C303

+RTCVCC

C304

1U_0402_6.3V6K

1

2

R373

0_0603_5%

2

@

2

R1382
0_0402_5%

+5VALW_PCH

R377

100_0402_5%

100_0402_5%

R392
0_0603_5%

2

@

+5VS

R381

1

AO3413_SOT23-3

1

1

2

1

2

1

2

R389

@

0_0805_5%

2

1

1

Q14

S

3

G

2

C677

0.1U_0402_16V4Z

@

+3VALW_PCH

2

1

1

2

+3VS

2

1

+1.05VS_PCH

1

+5VALW_PCH

D

1

1

@

2

D5
CH751H-40PT_SOD323-2

+PCH_V5REF_SUS

C294

0.1U_0603_25V7K

D4
CH751H-40PT_SOD323-2

1

C284

+PCH_V5REF_RUN

1U_0603_10V6K

2

C272

0.1U_0402_10V7K

R388

20K_0402_5%

1

@

D

2

C

B

A

R371

0_0603_5%

2

+3V_VCCAUBG

@

2

1

C283
1U_0402_6.3V4Z

2

R385

0_0603_5%

2

+1.05VS_SATA3

+VCCSATAPLL

2

2

2

2

2

+1.05VS_PCH

1

2

1

R383 0_06 03_5%

1

C298

0.1U_0402_10V7K

2

2

R378 0_0603_5%

R380
0_0603_5%

2

1

2

1

+3VS

+1.05VS_PCH

2

1

R391 0_0805_5%

1

C300
1U_0402_6.3V6K

2

1

1

1

1

R376

2

0_0603_5%

1

+3VALW_PCH

1

C285

0.1U_0402_10V7K

1

C290

0.1U_0402_10V7K

2

+1.05VS_SATA3

+1.05VM_PCH

PCH_PWR_EN#<45>

+3VALW_PCH

1

+3VALW_PCH

+1.05VS_PCH

R390

+3VS

0_0805_5%

2

1

R384

+3VS

0_0603_5%

2

1

1

C297
1U_0402_6.3V6K

2

L13

@

10UH_LB2012T100MR_20%

1

1

C296

@

10U_0603_6.3V6M

2

Place C296 Near AK1 pin

+3VALW_PCH

R387

0_0805_5%

2

+5VALW

1

+1.05VS_PCH

2

+VCCSATAPLL_R

3

UPCH1J

AD49

T16

V12

T38

BH23

AL29

AL24

AA19

AA21

AA24

AA26

AA27

AA29

AA31

AC26

AC27

AC29

AC31

AD29

AD31

W21

W23

W24

W26

W29

W31

W33

N16

Y49

BD47

BF47

AF17

AF33

AF34

AG34

AG33

V16

T17

V19

BJ8

A22

C313

0.1U_0402_10V7K

C305

0.1U_0402_10V7K

1

1

2

2

POWER

VCCACLK

VCCDSW3_3

DCPSUSBYP

3mA

VCC3_3[5]

VCCAPLLDMI2

VCCIO[14]

DCPSUS[3]

VCCASW[1]

VCCASW[2]

VCCASW[3]

903mA

VCCASW[4]

VCCASW[5]

VCCASW[6]

VCCASW[7]

VCCASW[8]

VCCASW[9]

VCCASW[10]

VCCASW[11]

VCCASW[12]

VCCASW[13]

VCCASW[14]

VCCASW[15]

VCCASW[16]

VCCASW[17]

VCCASW[18]

VCCASW[19]

VCCASW[20]

DCPRTC

VCCVRM[4]

VCCADPLLA

VCCADPLLB

75mA

75mA

VCCIO[7]

VCCDIFFCLKN[1]

VCCDIFFCLKN[2]

VCCDIFFCLKN[3]

55mA

VCCSSC

95mA

DCPSST

DCPSUS[1]

DCPSUS[2]

V_PROC_IO

2mA

VCCRTC

PANTHER-POINT_FCBGA989

@

119mA

1mA

Clock and Miscellaneous

PCI/GPIO/LPC

SATA USB

MISC

CPURTC

10mA

HDA

1mA

VCCIO[29]

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

N26

P26

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

+1.05VS_VCCAUPLL

AN23

+PCH_V5REF_SUS

AN24

+VCCA_USBSUS

+3V_VCCPSUS

P34

N20

+PCH_V5REF_RUN

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

+VCCME_22

V21

+VCCME_23

T19

+VCCME_21

P32

+VCCSUSHDA

+1.05VS_VCCUSBCORE

1

C287

0.1U_0402_10V7K

2

+3V_VCCPSUS

+3VS_VCCPCORE

+3VS_VCCPPCI

+VCC3_3_2

+VCCAFDI_VRM

+VCCAFDI_VRM

+1.05VS_VCC_SATA

1

C307

0.1U_0402_16V4Z

2

1

C295
1U_0402_6.3V6K

2

+3V_VCCPUSB

1

C314 1U_0402_6.3V6 K

CH66 0.1U_0402_10V7K

1

C291

0.1U_0402_10V7K

2

+1.05VS_VCC_SATA

R393 0_0603_5%

R394 0_0603_5%

R396 0_0603_5%

R397 0_ 0603_5%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

2

Date: Sheet

1

B

B

B

31 60Friday, August 24, 2012

of

31 60Friday, August 24, 201 2

of

31 60Friday, August 24, 201 2

of

5

4

3

2

1

UPCH1I

H5

UPCH1H

VSS[0]

D

C

B

A

5

AA17

VSS[1]

AA2

AA33

VSS[2]

AA3

VSS[4]

VSS[3]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD38

AD37

VSS[32]

VSS[31]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

AD8

VSS[39]

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

AD14

VSS[44]

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

AF5

VSS[57]

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

AJ21

VSS[73]

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

PANTHER-POINT_FCBGA989

@

4

VSS[80]

VSS[81]

VSS[82]

VSS[83]

VSS[84]

VSS[85]

VSS[86]

VSS[87]

VSS[88]

VSS[89]

VSS[90]

VSS[91]

VSS[92]

VSS[93]

VSS[94]

VSS[95]

VSS[96]

VSS[97]

VSS[98]

VSS[99]

VSS[100]

VSS[101]

VSS[102]

VSS[103]

VSS[104]

VSS[105]

VSS[106]

VSS[107]

VSS[108]

VSS[109]

VSS[110]

VSS[111]

VSS[112]

VSS[113]

VSS[114]

VSS[115]

VSS[116]

VSS[117]

VSS[118]

VSS[119]

VSS[120]

VSS[121]

VSS[122]

VSS[123]

VSS[124]

VSS[125]

VSS[126]

VSS[127]

VSS[128]

VSS[129]

VSS[130]

VSS[131]

VSS[132]

VSS[133]

VSS[134]

VSS[135]

VSS[136]

VSS[137]

VSS[138]

VSS[139]

VSS[140]

VSS[141]

VSS[142]

VSS[143]

VSS[144]

VSS[145]

VSS[146]

VSS[147]

VSS[148]

VSS[149]

VSS[150]

VSS[151]

VSS[152]

VSS[153]

VSS[154]

VSS[155]

VSS[156]

VSS[157]

VSS[158]

AK38

AK4

AK42

AK46

AK8

AL16

AL17

AL19

AL2

AL21

AL23

AL26

AL27

AL31

AL33

AL34

AL48

AM11

AM14

AM36

AM39

AM43

AM45

AM46

AM7

AN2

AN29

AN3

AN31

AP12

AP19

AP28

AP30

AP32

AP38

AP4

AP42

AP46

AP8

AR2

AR48

AT11

AT13

AT18

AT22

AT26

AT28

AT30

AT32

AT34

AT39

AT42

AT46

AT7

AU24

AU30

AV16

AV20

AV24

AV30

AV38

AV4

AV43

AV8

AW14

AW18

AW2

AW22

AW26

AW28

AW32

AW34

AW36

AW40

AW48

AV11

AY12

AY22

AY28

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

F45

VSS[170]

B7

VSS[172]

VSS[171]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

H10

VSS[220]

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

PANTHER-POINT_FCBGA989

@

Compal Secret Data

Compal Secret Data

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

3

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

VSS[259]

VSS[260]

VSS[261]

VSS[262]

VSS[263]

VSS[264]

VSS[265]

VSS[266]

VSS[267]

VSS[268]

VSS[269]

VSS[270]

VSS[271]

VSS[272]

VSS[273]

VSS[274]

VSS[275]

VSS[276]

VSS[277]

VSS[278]

VSS[279]

VSS[280]

VSS[281]

VSS[282]

VSS[283]

VSS[284]

VSS[285]

VSS[286]

VSS[287]

VSS[288]

VSS[289]

VSS[290]

VSS[291]

VSS[292]

VSS[293]

VSS[294]

VSS[295]

VSS[296]

VSS[297]

VSS[298]

VSS[299]

VSS[300]

VSS[301]

VSS[302]

VSS[303]

VSS[304]

VSS[305]

VSS[306]

VSS[307]

VSS[308]

VSS[309]

VSS[310]

VSS[311]

VSS[312]

VSS[313]

VSS[314]

VSS[315]

VSS[316]

VSS[317]

VSS[318]

VSS[319]

VSS[320]

VSS[321]

VSS[322]

VSS[323]

VSS[324]

VSS[325]

VSS[328]

VSS[329]

VSS[330]

VSS[331]

VSS[333]

VSS[334]

VSS[335]

VSS[337]

VSS[338]

VSS[340]

VSS[342]

VSS[343]

VSS[344]

VSS[345]

VSS[346]

VSS[347]

VSS[348]

VSS[349]

VSS[350]

VSS[351]

VSS[352]

H46

K18

K26

K39

K46

K7

L18

L2

L20

L26

L28

L36

L48

M12

P16

M18

M22

M24

M30

M32

M34

M38

M4

M42

M46

M8

N18

P30

N47

P11

P18

T33

P40

P43

P47

P7

R2

R48

T12

T31

T37

T4

W34

T46

T47

T8

V11

V17

V26

V27

V29

V31

V36

V39

V43

V7

W17

W19

W2

W27

W48

Y12

Y38

Y4

Y42

Y46

Y8

BG29

N24

AJ3

AD47

B43

BE10

BG41

G14

H16

T36

BG22

BG24

C22

AP13

M14

AP3

AP1

BE16

BC16

BG28

BJ28

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

2

Date: Sheet

32 60F riday, August 24, 2012

32 60Friday, August 24, 2012

32 60Friday, August 24, 2012

1

D

C

B

A

B

B

B

of

of

of

5

4

3

2

1

SBIOS SPI Flash

R4927

R4928

U59

5

6

1

7

3

8

2

SI

SCLK

CS

HOLD

WP

VCC

32M W25Q32BVSSIG

8111E@

PCH_SPI_MISO_R

SO

4

GND

U59
64M W25Q64FVSSIG SOIC 8P SPI ROM

VPRO@

U59:
Vpro--SA000039A20 8MB
non-Vpro--SA00003K800 4MB

2

1

PCH_SPI_MOSI<25>

D

C

PCH_SPI_CLK<25>

PCH_SPI_CS#<25>

+3V_M

+3VS

6P_0402_25V

PCH_SPI_MOSI

PCH_SPI_CLK

PCH_SPI_CS#

R405

0_0603_5%

2

1

8111E@

2

1

0_0603_5%

R411

VPRO@

For EMI resuest.

2

R419

@

C409

@

10_0402_5%

C413
12P_0402_50V8J

1

SBIOS_SI

R401 33_0402_5%

2

1

SBIOS_CLK

R402 33_0402_5%

1

4.7K_0402_5%

1

4.7K_0402_5%

C405

0.1U_0402_16V4Z

SBIOS_CLK

2

2

2

1

PCH_SPI_MISO

R403 33_0402_5%

PCH_SPI_MISO <25>

D

C

BIOS SPI Flash (2MByte*1) For Win8

U60

2

1

R404

PCH_SPI_MOSI

PCH_SPI_CLK

PCH_SPI_CS1#<25>

B

+3VS

+3V_M

PCH_SPI_CS1#

R421

0_0603_5%

2

8111E@

2

0_0603_5%

R422

VPRO@

WIN8@

SBIOS_SI1

33_0402_5%

2

1

R406

WIN8@

SBIOS_CLK1

33_0402_5%

2

1

R4932

WIN8@

4.7K_0402_5%

4.7K_0402_5%

1

1

C406

0.1U_0402_16V4Z

WIN8@

R4933

1

WIN8@

2

WIN8@

5

6

1

7

3

8

2

SI

SO

SCLK

CS

HOLD

WP

4

GND

VCC

16M MX25L1606EM2I-12G SOP 8P ROM

P/N: SA000041N00

SBIOS_SO1

2

1

WIN8@

PCH_SPI_MISO

R407 33_0402_5%

B

For EMI resuest.

C420

@

R420

@

2

1

6P_0402_25V

@

C421 12P_0402_50V8J

A

5

SBIOS_CLK1

10_0402_5%

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

4

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

4019IE

4019IE

4019IE

Friday, August 24, 2012

Friday, August 24, 2012

Friday, August 24, 2012

33 60

33 60

33 60

1

B

B

B

of

of

of

SATA HDD Conn.

D

JHDD

GND

RX+

RX-

GND

TX-

TX+

GND

3.3V

3.3V

3.3V

GND

GND

GND

5V

5V

5V

GND

C

SATA ODD Conn

B

A

Reserved

GND

23

GND

12V

24

GND

12V

12V

CONN@

+5VS_ODD

10U_0805_10V4Z

SUYIN_127382FR013G109ZR_RV

1

C952

@

2

CONN@

1

C414

10U_0805_10V4Z

2

JODD

GND

A+

A-

GND

B-

B+

GND

DP

V5

V5

MD

GND

GND

ODD_EN#<29>

5

+5VS

Place closely JP25 SATA CONN.

1.2A

1

C387
10U_0805_10V4Z

2

1

2

3

4

SATA_PTX_C_DRX_P0

5

SATA_PTX_C_DRX_N0

6

7

SATA_PRX_DTX_N0

SATA_PRX_DTX_P0

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

1

C415

10U_0805_10V4Z

2

13

Place component's closely ODD CONN.

12

11

SATA_PTX_C_DRX_P2

10

SATA_PTX_C_DRX_N2

9

8

SATA_PRX_DTX_N2

7

SATA_PRX_DTX_P2

6

5

ODD_DETECT#_R

4

+5VS_ODD

3

2

ODD_DA#_R

1

+VSB

R760

470K_0402_5%

@

2

G

5

1

C388

0.1U_0402_16V4Z

2

2

1

ODD_EN

1

D

Q59
SSM3K7002FU_SC70-3

@

S

3

+5VS

1

C389

0.1U_0402_16V4Z

2

2

1

C513 0.01U_0402_25V7K

2

1

C512 0.01U_0402_25V7K

2

1

C410 0.01U_0402_25V7K

2

1

C412 0.01U_0402_25V7K

+5VS

1

C416

@

1U_0402_6.3V4Z

2

1

2

1

2

2

1

C518 0.01U_0402_25V7K

2

1

C519 0.01U_0402_25V7K

2

1

C424 0.01U_0402_25V7K

2

1

C425 0.01U_0402_25V7K

short@

2

+5VS_ODD

2

short@

R107

0_0805_5%

1

D

6

CS27

1U_0402_6.3V6K

5

2

1

G

@

1

C390

0.1U_0402_16V4Z

2

C417

0.1U_0402_16V4Z

1

R7620_0402_5%

1

R7630_0402_5%

+5VS_ODD

2

S

4

Q55
SI3456BDV-T1-E3 1N TSOP6

@

3

0.1U_0402_16V4Z

R764

1.5M_0402_5%

2

1

@

@

2

1

4

SATA_PTX_DRX_P0 <25>

SATA_PTX_DRX_N0 <25>

SATA_PRX_C_DTX_N0 <25>

SATA_PRX_C_DTX_P0 <25>

1

C418

0.1U_0402_16V4Z

2

SATA_PTX_DRX_P2 <25>

SATA_PTX_DRX_N2 <25>

SATA_PRX_C_DTX_N2 <25>

SATA_PRX_C_DTX_P2 <25>

ODD_DETECT# <29>

ODD_DA# <28>

C818

4

TPM 1.2

+3VS

+3VALW

PM_CLKRUN#<27,44>

+3VS_TPM

IN_TPM:

if support physically access
the platform, connect the pin
to 3.3V.
If this feature is not used,
the pin can be left open (it
has an internal pull-down).

WB_TPM:

SERIRQ PU At Page29

GPIO_IF, GPX and PP are optio nal.
Leave them open if not used.

U37

S IC WPCT200AA0WG TSSOP 28P TPM

WB_TPM@

BOM
IN_TPM:IN_TPM@&TPM@
WB_TPM:WB_TPM@&TPM@

For NON_TPM SKU Reserve

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

TPM@

2

1

R30 0_0603_5%

0.1U_0402_16V4Z

TPM@

2

1

R49 0_0603_5%

0.1U_0402_16V4Z

LPC_AD0<25,41,44>

LPC_AD1<25,41,44>

LPC_AD2<25,41,44>

LPC_AD3<25,41,44>

CLK_PCI_TPM<28>

LPC_FRAME#<25,41, 44>

PLT_RST#<6,28,35,36,37,39,41,42,44>

SERIRQ<25,41,44>

2

1

R773 0_0402_5%

R665 4.7K_0402_5%

IN_TPM@

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

C764

C778

@

2

1

TPM@

1U_0402_6.3V4Z

2

1

TPM@

1U_0402_6.3V4Z

2

LPC_AD0

LPC_AD1

LPC_AD2

LPC_AD3

CLK_PCI_TPM

LPC_FRAME#

PLT_RST#

SERIRQ

1

PM_CLKRUN#_R

PP

1

C765

TPM@

10U_0805_10V4Z

2

+3VALW_TPM

1

C777

TPM@

2

+3VS_TPM

U37

26

LAD0

23

LAD1

20

LAD2

17

LAD3

TPM
SLB 9635 TT 1.1

21

LCLK

22

LFRAME#

16

LRESET#

27

SERIRQ

15

CLKRUN#

7

PP

2

R772

@

0_0402_5%

1

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C419

10

19

24

VDD

VDD

GND

4

11

2

+3VS_TPM

1

TPM@

2

+3VALW_TPM

5

VSB

VDD

GND

28

LPCPD#

SUS_STAT#_R

9

TESTB1/BADD

GND

GND

SLB 9635 TT 1.2 TSSOP28P FW REV3.19

25

18

TEST1

XTALO

XTALI

GPIO2

GPIO

IN_TPM@

BADD

8

TPM_TEST1

14

TPM_XTALO_R

13

TPM_XTALI_R

2

6

1

NC

3

NC

12

NC

2

R728 0_0402_5%

R729 0_0402_5%IN_TPM@

TPM_XTALI

TPM_XTALO

1

2

1

WB_TPM@

PM_CLKRUN#_R

CLK_PCI_TPM

R664 4.7K_0402_5%

2

1

@

R669 10_0402_5%

+3VS_TPM

@

2

1

C768 15P_0402_50V8J

EMI

2

1

BADD

BADD: IN_TPM PD, WB_TPM NC

Base I/O Address:

TPM_TEST1

TEST:

1

R727 4.7K_0402_5%

1

@

R726 0_0402_5%

IN_TPM@

2

1

2

1

1

10M_0402_5%

2

R668

IN_TPM@

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

IN_TPM@

R659 4.7K_0402_5%

Default: Normal Mode, IN_TPM PD,
WB_TPM NC

4.7K PU: Test Mode

2

2

C766
18P_0402_50V8J

1

32.768KHZ_12.5PF_Q13FC1350000400
X3

2

IN_TPM@

C767

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

2

1

@

R663 4.7K_0402_5%

IN_TPM:

WB_TPM:

R660 4. 7K_0402_5%

R661 0_0402_5%

TPM_XTALO

TPM_XTALI

IN_TPM@

18P_0402_50V8J

Default:7EH-7FH

4.7K PD:EEH-EFH

2

1

@

2

1

IN_TPM@

+3VS_TPM

SUS_STAT# <27>

IN_TPM@

1

*0 = 02Eh

1 = 04Eh

34 60Friday, August 24, 2012

34 60Friday, August 24, 2012

34 60Friday, August 24, 2012

+3VS_TPM

+3VS_TPM

of

of

of

D

C

B

A

B

B

B

IC function Part

+3V_LAN

1

1

+3V_LAN

RL3 10K_0402_5%

RTL8105E

Pin14

Pin15

Pin38

ENSWREG

2

Crystal

LAN_X1

1

CL26

12P_0402_50V8J

2

8111E@

3

Transformer

LAN_MDI3-

LAN_MDI3+

LAN_MDI2-

LAN_MDI2+

LAN_MDI1-

LAN_MDI1+

LAN_MDI0-

LAN_MDI0+

4

Place CL34 colse
to LAN chip

Intel check:Better to put 4x 0.1uF bypass cap
near 4 central tap pin of Transformer.

A

@

2

1

RL2510K_0402_5 %

CLKREQ_LAN#

@

2

LAN_WAKE#

RTL8111E

NC

NC

NC 10K ohm PD

1K ohm Pull-high

+3V_LAN

RL4
0_0402_5%

8111E@

RL23
0_0402_5%

@

25MHZ_10PF_7V2500001 4

YL1

1

1

GND

2

8111E@

UL5

1

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2+

6

TD2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+

12

TD4-

1

NS892407 1G

CL34

0.1U_0402_25V4K

2

8111E@

CL34

1U_0402_6.3V4Z

VPRO@

A

PCIE_PRX_C_LANTX_P6<26,42>

PCIE_PRX_C_LANTX_N6<26,42>

PCIE_PTX_C_LANRX_P6<26,42>

PCIE_PTX_C_LANRX_N6<26,42>

+3VS

LanWake O/D PU at Page31. Used
to reactivate PCIE slot's main
PWR rail and REF CLK

ISOLATEB used to isolate 8111E
from PCIE

CLKREQ O/D PU at PCH side

SMBDATA and GPO using EFuse
only without ASF function.

3

3

GND

LAN_X2

4

CL27

12P_0402_50V8J

8111E@

24

MCT1

23

MX1+

22

MX1-

21

MCT2

20

MX2+

19

MX2-

18

MCT3

17

MX3+

16

MX3-

15

MCT4

14

MX4+

13

MX4-

CLKREQ_LAN#<26,42>

CLK_LAN<26,42>

CLK_LAN#<26,42>

GPIO27_WAKE#<29,41>

EC_PME#<36,39,41,42>

2

1

RL6

EC_SWI#<27,36,39 >

1K_0402_1%

8111E@

RL7

15K_0402_5%

8111E@

1

+3V_LAN

2

CL39 1000P_0402_50V7K

2

1

1

RL11 75_0402_1%

1

CL40 1000P_0402_50V7K

RL12 75_0402_1%

2

1

CL41 1000P_0402_50V7K

1

2

1

RL13 75_0402_1%

CL42 1000P_0402_50V7K

1

2

1

RL15 75_0402_1%

LAN_TX0+<4 2>

LAN_TX0-<42>

LAN_TX1+<4 2>

LAN_TX1-<42>

LAN_TX2+<4 2>

LAN_TX2-<42>

LAN_TX3+<4 2>

LAN_TX3-<42>

8111E@

2

8111E@

1

CL1 0.1U_0402_16V7K

2

1

CL2 0.1U_0402_16V7 K

RL20 0_040 2_5%8111E@

RL24 0_040 2_5%

8111E@

PCIE_PTX_C_C_RTLANRX_P6

PCIE_PTX_C_C_RTLANRX_N6

PLT_RST#<6,28,34,36,37,39,41,42,44>

RL10 0_0402_5%@

RL9 0_0 402_5%@

RL8 0_0 402_5%8111E@

RL22 1K_0402_5%

RL21 10 K_0402_5%8111E@

+3V_LAN

+LAN_VDDREG

CL11 close to pin42

1

CL11

0.1U_0402_16V4Z

2

8111E@

2

RJ45_MIDI3-

2

RJ45_MIDI3+

RJ45_MIDI2-

2

RJ45_MIDI2+

RJ45_MIDI1-

2

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

RJ45_GND

LAN_TX0+

LAN_TX0-

LAN_TX1+

LAN_TX1-

LAN_TX2+

LAN_TX2-

LAN_TX3+

LAN_TX3-

B

PCIE_PRX_RTLANTX_P6

PCIE_PRX_RTLANTX_N6

CLKREQ_LAN#

PLT_RST#

CLK_LAN

CLK_LAN#

2

1

2

1

8111E@

ENSWREG

1

RL5 2.49K_ 0402_1%

RL28 0_0402_5%VPRO@

RL29 0_0402_5%VPRO@

RL30 0_0402_5%VPRO@

RL31 0_0402_5%VPRO@

RL32 0_0402_5%VPRO@

RL33 0_0402_5%VPRO@

RL35 0_0402_5%VPRO@

RL34 0_0402_5%VPRO@

B

LAN_X1

LAN_X2

LAN_WAKE#

ISOLATEB

2

LAN Conn.

LAN_10/100_ LED#<42>

22

23

17

18

16

25

19

20

43

44

28

26

14

15

38

33

34

35

46

24

49

LAN_1000_LED#<42>

LAN_ACT_LED#<42>

LAN_MDI0+

LAN_MDI0-

LAN_MDI1+

LAN_MDI1-

LAN_MDI2+

LAN_MDI2-

LAN_MDI3+

LAN_MDI3-

HSOP

HSON

HSIP

HSIN

CLKREQB

PERSTB

REFCLK_P

REFCLK_N

CKXTAL1

CKXTAL2

LANWAKEB

ISOLATEB

NC/SMBCLK

NC/SMBDATA

GPO/SMBALERT

ENSWREG

VDDREG

VDDREG

RSET

GND

PGND

RTL8111E-VL-CGT QFN 48P

10/100_LINK_LED

31

LED3/EEDO

LED1/EESK

LED0

EECS/SCL

EEDI/SDA

MDIP0

MDIN0

MDIP1

MDIN1

NC/MDIP2

NC/MDIN2

NC/MDIP3

NC/MDIN3

DVDD10

DVDD10

DVDD10

DVDD33

DVDD33

AVDD33

AVDD33

AVDD33

AVDD33

EVDD10

AVDD10

AVDD10

AVDD10

AVDD10

REGOUT

VPRO@

RL36 0_04 02_5%

C

37

40

30

10/100_LINK_LED

32

2

1

RL1 10K_0402_5%

LAN_ACTIVITY#

2

1

RL2 10K_0402_5%8111E@

8111E@

1

2

4

5

LAN_MDI0+

7

LAN_MDI0-

8

LAN_MDI1+

10

LAN_MDI1-

11

LAN_MDI2+

LAN_MDI2-

LAN_MDI3+

13

LAN_MDI3-

29

41

+LAN_VDD10

27

39

12

+3V_LAN

42

47

48

21

3

6

+LAN_EVDD10

9

45

+LAN_VDD10

36

+LAN_REGOUT

60 mils

2

1

8111E@

R1713 510_0402_5%

2

3

LAN_LINK#

LAN_LINK#

DL2

1

VPRO@

S DIO BAW56W SOT-323

LAN_R_ACTIVITY#

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

PWR

LL1

LL1,CL13 will be changed to

1

2.2UH_1008HC-472EJFS-A_5%_1008

2.2uH&4.7uF after EVT test

+LAN_REGOUT

Layout Note: LL1 must be
within 200mil to Pin36,
CL13,CL9 must be within
200mil to LL1

+LAN_VDD10

+3V_LAN

+3V_LAN

LAN_ACTIVITY#

R1709 510_0402_5%

2

C2002 220 P_0402_50V7K

+3V_M

+3V_LAN

+3V_M

+3V_LAN

R1711 510_0402_5%

RJ45_MIDI3-

RJ45_MIDI3+

RJ45_MIDI1-

RJ45_MIDI2-

RJ45_MIDI2+

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

LAN_LINK#

2

C2003 220 P_0402_50V7K

2

VPRO@

R1712 510_0402_5%

RJ45_GND

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

4.7U_0603_6.3V6K

2

1

8111E@

LL20_0603_5%

1U_0402_6.3V4Z

Close to Pin 21

2

LL30_0603_5%

8111E@

4.7U_0603_6.3V6K

2

1

8111E@

LAN_R_ACTIVITY#

1

2

1

VPRO@

1

1

2

1

1000P_1808_3KV7K

CL36

RL38

0_0402_5%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1

8111E@

2

8111E@

CL30

CL18

CL28

8111E@

8111E@

4.7U_0603_6.3V6K

D

CL13

1

2

1

2

D

1

2

+LAN_EVDD10

2

1

+LAN_VDDREG

1

2

JLAN1

12

Yellow LED-

11

Yellow LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

LIYO_101002-0080 3-3

LAN_GND

RL37

0_0402_5%

+LAN_VDD10

2

CL9

8111E@

0.1U_0402_16V4Z

1

CL17

0.1U_0402_16V4Z

8111E@

2

CL29

0.1U_0402_16V4Z

1

8111E@

CONN@

2

1

+3VALW TO +3V_LAN

+3VALW

E

J35

Vgs=-4.5V,Id=3A,Rds<97mohm

2

2

1

JUMP_43X79

@

C840

4.7U_0805_10V4Z

Close to Pin 27,39,12,47,48

Close to Pin 3,6,9,13,29,41,45

CL23,CL24,CL25 close to pin6,9,41, respectively

14

SHLD2

13

SHLD1

CL31

0.1U_0402_16V4Z

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

4019IE

4019IE

4019IE

E

1

1

1

C841
1U_0402_6.3V4Z

2

8111E@

@

2

2

1

2

1

CL100.1U_04 02_16V4Z

CL120.1U_0402_16V4Z

2

1

CL40.1U_04 02_16V4Z 8111E@

2

1

CL50.1U_0402_ 16V4Z 8111E@

2

1

CL60.1U_040 2_16V4Z 8111E@

2

1

CL70 .1U_0402_16V4Z 8111 E@

CL7 close to pin12

2

1

1

2

1

CL210.1U_0402_16V4Z 8111E@

2

1

CL220.1U_0402_16V4Z 8111E@

2

1

CL230.1U_0402_16V4Z 8111E@

1

2

1

35 60Friday, August 24, 2012

35 60Friday, August 24, 2012

35 60Friday, August 24, 2012

+3V_LAN

8111E@

8111E@

+LAN_VDD10

CL190.1U_0402_16V4Z 8111E@

2

CL200.1U_0402_16V4Z 8111E@

2

CL240.1U_0402_16V4Z 8111E@

CL250.1U_0402_16V4Z 8111E@

of

of

of

+3V_LAN

1

2

3

4

B

B

B

EC_PME#<35,39,41,42>

EC_SWI#<27,35,39>

BT_PWRON

5

RH121 0_0402_5%

CLKREQ_WLAN#<26>

CLK_WLAN#<26>

CLK_WLAN<26>

PCIE_PRX_WLANTX_N2<26>

PCIE_PRX_WLANTX_P2<26>

PCIE_PTX_C_WLANRX_N2<26>

PCIE_PTX_C_WLANRX_P2<26>

+3VS_WLAN

2

@

1

RH122

0_0402_5%

BT_PWRON_R

1

1

1

1

R14371K_0402_5%

2

WLAN_WAKE

WLAN_WAKE

2

R14340_0402_5% VPRO@

2

R14310_0402_5% VPRO@

2

R14300_0402_5% VPRO@

JMINI1

WLAN/ WiFi

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

ACES_88910-5204

CONN@

Slot 1 Half PCIe Mini Card-WLAN & BT3.0

D

CL_CLK_DMC<26>

CL_DATA_DMC<26>

CL_RST#_DMC<26>

C

Vpro SKU: please delete E51_TXD_R /RXD connection on JMINI1.

Slot 2 Half PCIe Mini Card-G/GPS (FULL Card)

150U_B2_6.3VM_R35M

B

A

+3VS_FULL

1

C634

+

0.1U_0402_16V4Z

2

CLKREQ_WWAN#<26>

CLK_WWAN#<26>

CLK_WWAN<26>

PCIE_PRX_C_WWANTX_N1<26>

PCIE_PRX_C_WWANTX_P1<26>

PCIE_PTX_C_WWANRX_N1<26>

PCIE_PTX_C_WWANRX_P1<26>

+3VS_FULL

E51_TXD<41>

E51_RXD<41>

R682 0_0402_5%

R1333 0_0402_5%

5

C667

1

1

1

2

EC_PME#

EC_SWI#

short@

short@

+1.5VS

0.1U_0402_16V4Z

1

C637

C666

2

4.7U_0805_10V4Z

R702

0_0402_5%

@

1

R701 0_0402_5%

1

R638 0_0402_5%short@

2

E51_TXD_R

2

1

E51_RXD_R

R683

100K_0402_5%

2

1

2

C615

2

2

1

0.1U_0402_16V4Z

2

GND2

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

1

D

C

40mil

+UIM_PWR

UIM_CLK

1

1

1

C132456P_0402_50V8

@

2

C132556P_0402_50V8

1

C42722P_0402_50V8J

@

2

1

C42822P_0402_50V8J

@

C6651U_0402_6.3V4Z

@

2

2

2

36 60Friday, August 24, 2012

36 60Friday, August 24, 2012

36 60Friday, August 24, 2012

1

B

1

1

C6640.1U_0402_16V4Z

C42656P_0402_50V8

@

2

2

A

B

B

B

of

of

of

1

2

1

2

UIM_DATA

2

1

C372

2

@

0.1U_0402_16V4Z

UIM_CLK

2

BT_PWRON<41>

0.1U_0402_16V4Z

1

1

C380

C381

2

2

@

@

0.1U_0402_16V4Z

D19

@

CM1293-04SO_SOT23-6

1

CH1

2

Vn

3

CH2

4

GND

5

VPP

6

I/O

8

GND

CONN@

short@

2

1

R1380

BT_PWRON_R

0_0402_5%

1

C675

0.1U_0402_16V4Z

2

@

1

C382

2

0.1U_0402_16V4Z

@

4

UIM_VPP

CH4

5

Vp

+UIM_PWR

6

CH3

UIM_RST

JSIM

1

VCC

2

RST

3

CLK

7

GND

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

UIM_RST

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

4

+3VS_WLAN

+1.5VS

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

+3VS_FULL

JMINI2

1

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

G1

53

1

C612

0.1U_0402_16V4Z

2

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

G3

G3

G2

56

55

54

4

PLT_RST#

2

2

4

4

6

6

8

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

ACES_88910-5204

CONN@

WL_OFF# <29, 41>

PLT_RST# <6,28,34,35,37,39,41,42,44>

PM_SMBCLK <11,12,26,39>

PM_SMBDATA <11,12,26,39>

R1435

USB20_N13 <28>

0_0402_5%

USB20_P13 <28>

2

1

@

2

1

R44 10K_0402_5%@

2

1

R42 10K_0402_5%@

+3VS

+UIM_PWR

UIM_DATA

UIM_CLK

UIM_RST

UIM_VPP

WWAN_OFF#

1

R1375 0_0402_5%short@

MINI_SMBCLK

MINI_SMBDATA

USB20_N12

USB20_P12

1

R45 10K_0402_5%@

Bluetooth 3.0

LED_WLAN# <43>

Peak: 2.75A

2

Normal: 1.1A

R662 0_1206_5%

+3VS_FULL

+1.5VS

+UIM_PWR

2

PLT_RST#

short@

1

1

R1433 0_0402_5%short@

R1432 0_0402_5%

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

+3V_M

+3VS

1

1050mA

2

2

USB20_N12 <28>

USB20_P12 <28>

3

+3VS

1

1

8111E@

VPRO@

2

R870_0603_5%

2

R830_0603_5%

CM17

47P_0402_50V8J

+1.5VS

CM20

47P_0402_50V8J

+3VS_WLAN

1

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

EMI

1

C374

2

@

60mil

+3VS_FULL

UIM_VPP

UIM_DATA

UIM_DATA

WWAN_OFF# <29,41>

+3VS_FULL

PM_SMBCLK

PM_SMBDATA

+3VS

Up to 150MA, Default 8-10MA

Compal Secret Data

Compal Secret Data

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

Compal Secret Data

0.1U_0402_16V4Z

1

CM18

CM19

2

4.7U_0805_10V4Z

1

CM22

CM21

2

4.7U_0805_10V4Z

1

C373

2

@

0.1U_0402_16V4Z

@

2

1

C429 22P_0402_50V8J

Deciphered Date

Deciphered Date

Deciphered Date

+3VS_WLAN

0.1U_0402_16V4Z

1

C371

2

@

+3VS

+1.8VS_APVDD

C41

10U_0805_10V4Z

7mil

2

1

R11

+3VS_READER

2

1

0_0805_5%

0.1U_0402_16V4Z

<BOM Structure>

0.1U_0402_16V4Z

40mil

1

C52

C54
15P_0402_50V8J

388@

1

C77

C53

2

2

0.1U_0402_16V4Z

R13

1

1M_0402_5%

388@

X1

1

IN

2

GND

24.576MHZ_12PF_X3G024576FC1H

388@

1

C50

2

0.1U_0402_16V4Z

2

3

OUT

4

GND

0.1U_0402_16V4Z

1

40mil

C83

2

0.1U_0402_16V4Z

1

C42

2

1000P_0402_50V7K

0.1U_0402_16V4Z

1

C43

2

XIN

XOUT

7mil

2

C82
15P_0402_50V8J

1

388@

1

C44

2

C82

0_0402_5%

389@

IC PWR

C41,C43,C97 cl ose U4 Pin5.
Pin5 -> 1000pF -> 0.1uF -> 1 0uF.
C42 close U4 Pin10.
C77 close U4 Pin37.

D

C52close U4 Pi n18.

10U_0805_10V4Z

External Crystal

C

C54

0_0402_5%

389@

5

24.576MHz--main: SJ10000EV00

Memory Card Power

B

A

+3VS

MC_PWREN#

MC_PWREN#

1

R1677 0_0805_5%

1

C1962

4.7U_0805_10V4Z

2

U49

1

GND

2

IN

3

IN

4

EN#

TPS2061DRG4_SO8

MC_PWREN#

2

Note:

if use externa l PWR and chan ge
+3V_MCPWR as c ontrol signal, Need BIOS
to change the Setting.

5

@

8

OUT

7

OUT

6

OUT

5

FLG

R1676
300_0603_5%

C1959

1

10U_0805_10V4Z

2

+3V_MCVCC

40mil

1

@

2

1

D

2

G

S

3

C1960

0.1U_0402_16V4Z

Q116
2N7002_SOT23

+3V_MCVCC

1

C1961

0.1U_0402_16V4Z

2

IC Function Part

1

C97

2

Note:

Colay With JMB 385; W/1394, m ount JMB388;W O/1394, mount JMB385.
CR_PE# and CR_ WAKE reserve f or D3 mode

4

PLT_RST#<6,28,34,35,3 6,39,41,42,44>

CLK_PCIE_READER#<26>

CLK_PCIE_READER<26>

APREXT: PCIE r eference resis tor

8.2Kused in JM B385C;
12Kused in JMB 388A

PCIE_PTX_C_CARDRX_N5<26>

PCIE_PTX_C_CARDRX_P5<26>

PCIE_PRX_C_CARDTX_N5<26>

PCIE_PRX_C_CARDTX_P5<26>

CR_WAKE#<29>

5IN1_LED#<43>

CR_PE#<29>

R141 100_0402_1%

D1
CH751H-40PT_SOD323-2

1

@

1

R26
0_0402_5%

2

1

C73 0. 1U_0402_16V4Z

2

1

APREXT

2

1

2

C80 0.1U_0402_16V7K

1

PCIE_PRX_CARDTX_N5

C51 0.1U_0402_16V7K

PCIE_PRX_CARDTX_P5

2

1

@

R24 0_0402_5%

CR_PE#_R

2

MSCD#

2

SDCD#

@

40 mil

MC_PWREN#

XRSTN#

15mil

3

JMB388-QGAZ0A QFN 48P CARD READER

388@

U4

1

XRSTN

2

XTEST

3

APCLKN

4

APCLKP

7

APREXT

9

APRXN

8

APRXP

11

APTXN

12

APTXP

13

CPPE_N

15

CR1_CD1N/WAKEN

16

CR1_CD0N

17

CR1_PCTLN

21

CR1_LEDN

JMB389-QGAZ0C QFN 48P

389@

1394 Conn

R29
56_0402_5%

C95
220P_0402_50V7K

388@

1

C100

0.33U_0603_10V7K

388@

2

10mil

1

R27

4.99K_0402_1%

388@

2

2

388@

10mil

2

R32 56_0402_5%

R38 56_0402_5%

4

388@

1

2

1

1

2

@

1

TPBIAS

2

R28
56_0402_5%

388@

1

388@

1

Close to Chip

2

TPB-

TPB+

TPA-

TPA+

2

1

@

R41 0_0402_5%

WCM-2012-900T_4P

2

L2

3

R48 0_0402_5 %

R43 0_0402_5%

2

2

L1

3

3

WCM-2012-900T_4P

R46 0_0402_5%

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WI THOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

3

1

@

1

@

1

@

Issued Date

Issued Date

Issued Date

1

1

388@

4

4

2

2

1

1

388@

4

4

2

3

5

APVDD

10

APV18

19

DV33

20

DV33

44

DV33

18

DV18

37

DV18

48

MDIO0

47

MDIO1

46

MDIO2

45

MDIO3

JMB389 C

@

2

3

PJDLC05C_SOT23-3

2

3

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

MDIO4

MDIO5

MDIO6

MDIO7

MDIO8

MDIO9

MDIO10

MDIO11

MDIO12

MDIO13

MDIO14

6

APGND

GND

GND

NC

NC

NC

NC

NC

NC

NC

NC

NC

14

NC

D20

1

JP6

1

1

2

2

3

3

4

4

5

GND1

6

GND2

FOX_UV31413-WR50D-7F~N

CONN@

D21

@

PJDLC05C_SOT23-3

43

XD_SD_MS_D0

42

XD_SD_MS_D1

41

XD_SD_MS_D2

40

XD_SD_MS_D3

SLE3

29

XDCE_SDCLK_MSCLK_R

28

SEL2

27

26

XD_CLE

XD_D4

25

XD_D5

23

XD_D6

22

XD_D7

XD_RE

24

49

XD_RB

XD_ALE

30

31

SEL1

32

33

TAV33

R66

389@

34

TPB-

R65

389@

35

R63

385@

TPB+

36

TPA-

38

TPA+

39

APWR

XIN

XOUT

XD_CD#_R

XDCE_SDCLK_MSCLK_R

7 IN 1 Conn

+3V_MCVCC

1

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1

1

1

1

388@

R25 12K_0402_1%

2

+1.8VS_APVDD

+3VS_READER

+1.8VS_APVDD

2

0_0402_5%

2

2

0_0402_5%

0_0402_5%

TPBIAS

2

2

1

XDCE_SDCLK_MSCLK

SDCMD_MSBS_XDWE#

SDCD#

XDWP_SDW P

XD_SD_MS_D0

XD_SD_MS_D1

XD_SD_MS_D2

XD_SD_MS_D3

XD_D4

XD_D5

XD_D6

XD_D7

XD_SD_MS_D0

XD_SD_MS_D1

XD_SD_MS_D2

XD_SD_MS_D3

XDCE_SDCLK_MSCLK

MSCD#

SDCMD_MSBS_XDWE#

2

C49
22P_0402_50V8J

1

@

2

385@

1

R3722_0402_5%

XDCE_SDCLK_MSCLK

2

R820_0402_5%

0.1U_0402_16V4Z

Strap Pin Definition

TAV33

APWR

JREAD

13

SD_VCC

22

MS_VCC

43

XD_VCC

10

SD_CLK

19

SD_CMD

1

SD_CD

2

SD_WP

4

SD/MMC_DAT0

3

SD/MMC_DAT1

25

SD/MMC_DAT2

23

SD/MMC_DAT3

21

MMC_DATA4

17

MMC_DATA5

8

MMC_DATA6

5

MMC_DATA7

12

MS_DATA0

11

MS_DATA1

14

MS_DATA2

18

MS_DATA3

20

MS_SCLK

16

MS_INS

9

MS_BS

TAITW_R013-P12-HM_NR

SDCD#

MSCD#

C99

CONN@

D7

2

3

DAN202UT106_SC70-3

2

2

C98

0.1U_0402_16V4Z

1

1

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

1

1

SDCMD_MSBS_XDWE#

XD_D0

XD_D1

XD_D2

XD_D3

XD_D4

XD_D5

XD_D6

XD_D7

XD_CD

XD_R/B

XD_RE

XD_CE

XD_CLE

XD_ALE

XD_WE

XD_WP

SD_GND

SD_GND

MS_GND

MS_GND

XD_GND

XD_GND

@

R12 10K_0402_5%

2

1

R22 1K_0402_5%

XDWP_SDW P

XD_RB

XD_CD#

XD_CLE

SDCD#

MSCD#

XD_RE

XD_ALE

SLE3

C101 should be close to ChipSet for power
source for SDA3.0 3.3/1.8v signaling

SEL2

SEL1

2

388@

R410 0_0603_5%

2

389@

R412 0_0603_5%

APREXT

35

36

37

38

39

40

41

42

26

27

28

29

30

31

32

33

SDCMD_MSBS_XDWE#

7

15

6

24

34

44

45

GND

46

GND

Card Detect

1

XD_CD#XD_CD#

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

2

1

R17 1K_0402_5%

2

385@

R40 1K_0402_5%

2

1

385@

R20 1K_0402_5%

2

385@

R18 1K_0402_5%

2

385@

R31 1K_0402_5%

1

R21 200K_0402_5%@

2

1

385@

R23 200K_0402_5%

1

385@

R71 0_0402_5%

SDCMD_MSBS_XDWE#

2

1

C101 2.2U_0603_6.3V4Z

2

1

2

1

R74 0_0402_5%

385@

SDCMD_MSBS_XDWE#

R75 0_0402_5%

XDWP_SDW P

1

R78 0_0402_5%

2

1

385@

XDWP_SDW P

R80 0_0402_5%

1

1

2

1

385@

1

R19 9.1K_0402_5%

R39 12K_0402_1%

XD_SD_MS_D0

XD_SD_MS_D1

XD_SD_MS_D2

XD_SD_MS_D3

XD_D4

XD_D5

XD_D6

XD_D7

XD_CD#

XD_RB

XD_RE

XDCE_SDCLK_MSCLK

XD_CLE

XD_ALE

XDWP_SDW P

2

1

R33 0_0402_5%

XD_CD#_R

2

C96

0.1U_0402_16V4Z

1

1

+3V_MCVCC

2

1

+3VS_READER

1

1

2

2

2

2

1

+3VS_READER

C76 0.1U_0402_16V4Z

2

37 60Friday, August 24, 2012

of

37 60Friday, August 24, 2012

of

37 60Friday, August 24, 2012

of

D

C

B

A

B

B

B

Ext. Mic/LINE IN

D

MIC1_LINE1_R_R

MIC1_LINE1_R_L

C

CA17

2.2U_0603_6.3V4Z

place close to chip

MIC CONN

+MIC2_VREFO

4.7K_0402_5%

B

DA10

1

PESD5V0U2BT_SOT23-3

Sense Pin Impedance

SENSE A

A

SENSE B

MIC

RA51

2

MIC

2

1

0.1U_0402_16V4Z

1

2

3

5

RA25
1K_0402_5%

1

1

RA26
1K_0402_5%

AZ_SYNC_HD<25>

AZ_RST_HD#<25>

1

CA18

2

EAPD<41>

EC_MUTE#<41>

39.2K

20K

10K

5.1K

39.2K

20K

10K

5.1K

5

RA34

@

0_0402_5%

@

RA39
0_0402_5%

2

2

MIC2R_R

MIC2R_L

MIC_SENSE

NBA_PLUG

CONN@

JMIC

1

1

2

2

3

GND

4

GND

ACES_88231-02001

2

1

CA9 4.7U_0603_6.3V6K

2

1

CA10 4.7U_0603_6.3V6K

CA26
1U_0402_6.3V4Z

2

1

2

1

CA28

1U_0402_6.3V4Z

2

1

CA12 100P_0402_50V8J

CA35 10U_0805_10V4Z

CA16

2.2U_0603_6.3V4Z

DMIC_DATA<23>

1

DMIC_CLK<23>

RA18 20K_0402_1%

1

RA16 39.2K_0402_1%

Codec Signals

PORT-A (PIN 39, 41)

PORT-B (PIN 21, 22)

PORT-C (PIN 23, 24)

PORT-D (PIN 35, 36)

PORT-E (PIN 14, 15)

PORT-F (PIN 16, 17)

PORT-H (PIN 37)

PORT-I (PIN 32, 33)

MIC1_LINE1_R

MIC1_LINE1_L

+MIC1_VREFO_L

+MIC1_VREFO_R

+MIC2_VREFO

MONO_IN

AZ_SYNC_HD

1

RA1020K_0402_1%

2

2

2

1

DMIC_DATA

DMIC_CLK

2

2

EAPD

EC_MUTE#

Headphone out

+3VS

MIC2_R

MIC2_L

2

1

AC_JDREF

AC_VREF

1

CA142.2U_0603_6.3V4Z

SENSE_A

Function

Ext. MIC

CPVEE

4

RA10_0603_5%

2

1

1

CA8

0.1U_0402_16V4Z

10U_0805_10V4Z

2

place close to chip

U143

22

MIC1_R

21

MIC1_L

17

MIC2_R

16

MIC2_L

31

MIC1_VREF O_L

30

MIC1_VREF O_R

29

MIC2_VREF O

15

14

20

12

10

11

19

28

27

34

35

36

2

3

13

18

47

4

ALC259-VB5-GR_QFN48_7X7

LINE2_R

LINE2_L

MONO_OUT

PCBEEP_ IN

SYNC

RESET#

JDREF

LDO_CAP

VREF

CPVEE

CBN

CBP

GPIO0/DMI C_DATA

GPIO1/DMI C_CLK

SENSE_A

SENSE_B

EAPD

PD#

SPK_OUT_R +

THERMAL_PA D

Beep sound

4

3

+3VS_DVDD

1

CA7

DVDD

DVDD_IO

AVDD1

AVDD2

PVDD1

PVDD2

SPK_OUT_R -

SPK_OUT_L +

SPK_OUT_L -

HPOUT_R

HPOUT_L

SDATA_OUT

SDATA_IN

BITCLK

AVSS1

AVSS2

PVSS1

PVSS2

DVSS

35 mA

2

1

9

25

38

39

46

45

44

40

41

RA4 75_0402_1%

33

32

RA5 75_0402_1%

5

8

AZ_SDOUT_HD

6

AZ_SDIN0_HD_R

24

NC

23

NC

48

NC

26

37

42

43

7

49

0.1U_0402_16V4Z

place close to chip

+AVDD

68 mA

+PVDD1

+PVDD2

AGND

10U_0805_10V4Z

CA1

CA3

10U_0805_10V4Z

place close to chip

SPKR+

SPKR-

30MIL/30MIL

SPKL+

SPKL-

2

RA6 33_0402_5%

+DVDD_IO

1

CA2

2

10U_0805_10V4Z

1

1

CA4

CA5

2

2

0.1U_0402_16V4Z

HP_R

HP_L

1

AZ_SDOUT_HD <25>

AZ_SDIN0_HD <25>

@

AZ_BITCLK_HD <25>

RA7

10_0402_5%

Close to Audio Chip

DGND

2

1

CA47 0.1U_0603_50V7K

2

1

CA48 0.1U_0603_50V7K

2

1

CA49 0.1U_0603_50V7K

2

1

CA50 0.1U_0603_50V7K

2

1

RA43 0_0603_5%

RA8

2

EC Beep

EC_BEEP#<41>

PCI Beep

PCH_SPKR<25>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

1

47K_0402_5%

RA9

2

1

47K_0402_5%

10K_0402_5%

CA15

1

0.1U_0402_16V4Z

1

1

RA11

2

2

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

1

2

0.1U_0402_16V4Z

1

CA6

1

2

2

@

CA23

10P_0402_50V8J

2

MONO_IN

CA20

0.1U_0402_16V4Z

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

RA32 0_0603_5%

2

1

RA3

2

0_0603_1%

HP_L

HP_R

MIC1_LINE1_R_R

MIC1_LINE1_R_L

MIC1_L

MIC1_R

+3VS

1

+5VS

placement near Audio Codec

RA13

2

0_0603_1%

SPKL-

short@

RA14

2

0_0603_1%

SPKL+

SPKR-

SPKR+

RA15

2

0_0603_1%

short@

2

0_0603_1%

LA3

FBMA-L11-160808-121LMT_0603

LA4

1

FBMA-L11-160808-121LMT_0603

1

1K_0402_5%

2

2

1K_0402_5%

RA45

LA2

FBMA-L11-160808-121LMT_0603

1

1

LA8

FBMA-L11-160808-121LMT_0603

2

+PVDD1

JUMP_43X39

1

+PVDD2

CA61

2

1

1

CA19 10U_0805_10V4Z

@

2

1

CA46 10U_0805_10V4Z

1

@

short@

2

1

1

CA51 10U_0805_10V4Z

@

2

1

CA39 10U_0805_10V4Z

@

RA44

2

1

short@

2

2

CA11

100P_0402_50V8J

@

2

4.7K_0402_5%

RA47

1

1

2

4.7K_0402_5%

2

2

CA21

100P_0402_50V8J

@

2

600 mA

2

JA1

2

1

@

1

place close to chip

0.1U_0402_16V4Z

SPK_L-

1

@

2

SPK_L+

SPK_R-

1

@

2

SPK_R+

CA57

1U_0603_10V6K

1

2

CA42

1U_0603_10V6K

CA45

RA2

2

1

BLM18PG181SN1D_0603

CA56

2

10U_0805_10V4Z

RA12

DVT NOT POP RA12, USE JA1

2

1

BLM18PG181SN1D_0603

CA60

@

2

10U_0805_10V4Z

Speaker Connector

1

SPK_R-

SPK_R+

SPK_L-

SPK_L+

DA9

1

PESD5V0U2BT_SOT23-3

1

1

DA8

PESD5V0U2BT_SOT23-3

Head Phone JACK

HP_L_L

1

1

HP_R_R

CA13
100P_0402_50V8J

2

2

@

D9

3

1

2

@

PACDN042Y3R_SOT23-3

1

RA48

RA46

+MIC1_VREFO_R

MIC1_R

MIC1_L

1

+MIC1_VREFO_L

MIC1_L_L

MIC1_R_R

1

1

CA22
100P_0402_50V8J

2

2

@

D10

3

1

2

@

PACDN042Y3R_SOT23-3

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Friday, August 24, 2012

Friday, August 24, 2012

Friday, August 24, 2012

AGND

NBA_PLUG

AGND

MIC_SENSE

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

0.1U_0402_16V4Z

1

1

CA44

+5VS

1

2

CA43

2

10U_0805_10V4Z

0.1U_0402_16V4Z

1

1

+5VS

CA58

CA59

@

@

2

2

10U_0805_10V4Z

2

3

ACES_85204-0400N

2

3

JHP

1

2

6

3

4

5

SINGA_2SJ-S351-013

CONN@

Ex.MIC JACK

JEMIC

1

2

6

3

4

5

SINGA_2SJ-S351-012

CONN@

38 60

of

38 60

of

38 60

1

of

1

2

3

4

JSPK

1

2

3

4

CONN@

D

C

B

A

B

B

B

Express Card

D

C

5

+3VALW_PCH

PLT_RST#< 6,28,34,35,36,37,41,42,44>

SYSON<41,45,52>

SUSP#<10,41,45,50,51,52,57>

(Internal Pull High to AUXIN)

(Internal Pull High to AUXIN)

+1.5VS

+3VS

CP_USB#

RCLKEN1

PLT_RST#

SYSON

SUSP#

CP_PE#

U52

PWR Switch

12

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin

17

AUX_IN

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

Thermal_Pad

CPUSB#

18

RCLKEN

G577NSR91U_TQFN20_4x4

1.5Vout

1.5Vout

3.3Vout

3.3Vout

AUX_OUT

PERST#

CP_USB#

PERST1#

CLKREQ1#

CP_PE#

1

JEXP1

1

GND

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND

28

GND

29

GND

30

GND

CONN@

D

C

C2030

1

2

1

D

S

3

Q118
2N7002_SOT23

3

+1.5VS_CARD

1

1

C2031

2

2

0.1U_0402_16V4Z

10U_0805_10V4Z

+3VS

1

R1727

10K_0402_5%

2

CLKREQ1#

NC7SZ32P5X_NL_SC70-5

C2032

1

C2033

0.1U_0402_16V4Z

2

4

+3VS

C2034

10U_0805_10V4Z

1

C2035

10U_0805_10V4Z

2

CLKREQ_EXPCARD# <26>

1

2

0.1U_0402_16V4Z

+3VS

5

U53

2

B

Vcc

Y

1

A

G

3

USB20_N8<28>

USB20_P8<28>

4

11

13

40mil

3

5

60mils

15

19

40mil

OC#

8

16

NC

PERST1#

7

GND

21

+1.5VS_CARD

+3VS_CARD

+3VALW_CARD

+3VALW_CARD

C2027

+3VS_CARD

1

1

2

RCLKEN1

C2029

0.1U_0402_16V4Z

10K_0402_5%

R1726

2

Imax = 1.35A Imax = 0.75AImax = 0.275A

2

10U_0805_10V4Z

+3VS

G

1

C2028

2

10U_0805_10V4Z

+3VALW_PCH

EC_SWI#<27,35,36>

EC_PME#<35,36,41, 42>

2

+1.5VS

1

C2036

10U_0805_10V4Z

2

R59 0_0402_5%

1

WCM-2012-900T_0805

4

4

1

1

L26

@

1

R84 0_0402_5%

New Card Socket (Left/TOP)

1

2

R102

2

1

0_0402_5%

R100

2

1

0_0402_5%

@

CLK_PCIE_EXPCARD#<26>

CLK_PCIE_EXPCARD<26>

PCIE_PRX_C_EXPTX_N3<26>

PCIE_PRX_C_EXPTX_P3<26>

PCIE_PTX_C_EXPRX_N3<26>

PCIE_PTX_C_EXPRX_P3<26>

2

3

3

2

2

2

PM_SMBCLK<11,12,26,36>

PM_SMBDATA<11,12,26,36>

+1.5VS_CARD

+3VALW_CARD

+3VS_CARD

CP_PE#<28>

USB20_R_N8

USB20_R_P8

USB20_R_N8

USB20_R_P8

This pin1 define need check

+SC_PWR

Smart Card

USB20_N5<28>

USB20_P5<28>

B

SC_CLK

SC_DATA

2

+SC_PWR

A

4.7K_0402_5%

USB20_N5

USB20_P5

WCM2012F2S-900T04_0805

SCard0C8

SCard0C6

SCard0Fcb

2

RS18 0_0402_5 %

SC_RST

2

RS13 470_0402_5%

SM@

RS12

SM@

1

SC_DATA_R

SM@

MP: to solve issue of "Smart Card also show in Device Manager
after plug out it", change US4 from SA000042I00 to SA000042I10.

5

+5VS

1

1

USB20_N5_R

USB20_P5_R

+3V_SC

+SC_PWR

+5VS

+3V_SC

2

1

RS14 0_0402_5%

SM@

2

1

RS20 0_ 0402_5%

SM@

@

3

4

3

2

2

1

LS2

US4

1

SCard0C8

2

SCard0C6

3

SCard0Fcb

4

SMIO_5VPWR

5

SCard0Rst

6

SCard0Clk

7

SCard0Data

8

DM

9

DP

10

AV33

11

SCPWR0

12

5VGND

13

5VInput

14

V33OUT

AU9540B55-GBS-GR

SM@

4

USB20_N5_R

1

USB20_P5_R

28

XO

27

XI

26

PWRSV_SEL

25

LEDCRD

24

LEDPWR

23

RESET

22

EEPDATA

21

EEPCLK

20

P1(6)

19

ICCInsertN

18

VDDH

17

VDDP

16

VDD

15

V18OUT

4

1

SM@

CS32

2

0.1U_0402_10V6K

SC_XTAL_Out

SC_XTAL_In

SC_SDA

SC_SCL

EEPWP

ICCInsertN

+3V_SC

+1.8V_SC

PWRSV_SEL: (Default high)
High: Normal mode,
Low: Power Saving Mode

1

RS22
10K_0402_5%

SM@

2

2

RS21

10K_0402_5%

SC_RST

SCard0C6

SC_CLK

SC_DATA

SCard0Fcb

SCard0C8

ICCInsertN

1

@

JSMART

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

GND

12

GND

ACES_88514-104N

CONN@

+3V_SC

1

RS16
100K_0402_5%

SM@

2

1

SM@

CS29

2

1U_0402_6.3V4K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+3V_SC

+3V_SC

1

SM@

CS30

2

1U_0402_6.3V4K

US3

1

A0

2

A1

3

A2

4

GND

AT24C02BN-SH-T_SO8

@

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

1

SM@

CS24

2

0.1U_0402_10V6K

Layout note: Close to PIN14

8

VCC

7

WP

6

EEPWP

SCL

5

SC_SCL

SDA

SC_SDA

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1

2

+5VS

1

1

SM@

SM@

CS21

CS18

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

Layout note: Close to PIN18

+3V_SC

1

1

1

1

CS20

SM@

@

RS17

RS19

RS11

2

0.1U_0402_10V6K

2

2

2

47K_0402_5%

47K_0402_5%

@

@

2

SM@

CS26

1U_0402_6.3V4K

Layout note: Close to PIN13

47K_0402_5%

+5VS

1

CS25

2

0.1U_0402_10V6K

Layout note: Close to PIN4

+SC_PWR

SM@

CS31

SM@

SC_XTAL_In

SC_XTAL_Out

1U_0402_6.3V4K

18P_0402_50V8J

SM@

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

+1.8V_SC

1

2

Layout note: Close to PIN11

RS15 1M_0402_5%

12MHZ_16PF_X5H012000FG1H-X

1

CS16

1

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

1

SM@

1

CS17

2

1U_0402_6.3V4K

2

SM@

YS2

2

SM@

CS22

2

0.1U_0402_10V6K

Layout note: Close to PIN15

2

18P_0402_50V8J

CS23

1

SM@

2

1

SM@

1

1

+3V_SC

CS28

39 60Friday, August 24, 2012

39 60Friday, August 24, 2012

39 60Friday, August 24, 2012

1

SM@

2

0.1U_0402_10V6K

Layout note: Close to PIN10

of

of

of

B

A

B

B

B

1

RU7 0_0402_5%@

LU2 W CM-2012-121T_0805

4

4

1

1

2

4

5

3

3

2

1

RU6 0_0402_5%@

RU5 0_0402_5%@

LU1 W CM-2012-121T_0805

4

4

3

1

2

1

RU4 0_0402_5%@

DU1

1

10

2

9

7

4

65

3

8

L15ESDL5V0NA-4 SLP2510P8

3

2

3

2

9

U3RXDN0_L

8

U3RXDP0_L

7

U3TXDN0_L

6

U3TXDP0_L

U3RXDP0_L

U3RXDN0_L

U3TXDP0_L

U3TXDN0_L

D

C

RU27

@

2

0_0402_5%

1

R90 0_0402_5%

U3TXDP0_L

U3TXDN0_L

USB20_P0_L

USB20_N0_L

U3RXDP0_L

U3RXDN0_L

150U_B2_6.3VM_R35M

USB20_N0

USB20_P0

3

1

2

0.1U_0402_16V4Z

3

3

2

2

LU3 W CM-2012-900T_0805

1

@

C13

2

RU9 0_0402_5%@

RU8 0_0402_5%@

2.5A

9

1

8

3

7

2

6

4

5

UU1

1

VOUT

GND

2

VIN

VOUT

3

VOUT

VIN

4

EN

G547E2P11U

JUSB31

SSTX+

VBUS

SSTX-

D+

GND

D-

SSRX+

GND

SSRX-

SANTA_371394-1

4

1

FLG

1000P_0402_50V7K

CONN@

GND

GND

4

1

+USB_VCCB

8

7

6

5

@

10

11

C3606

USB30_GND

USB30_GND

USB20_N0_L

USB20_P0_L

1

R91 0_0402_5%@

CU1

@

USB_OC0#

KSO0

KSO1

KSO2

KSO3

KSO4

KSO5

KSO6

KSO7

KSO8

KSO9

KSO10

KSO11

KSO12

KSO13

KSO14

KSO15

KSI7

KSI6

KSI5

KSI4

KSI3

KSI2

KSI1

KSI0

KSI[0..7]

KSO[0..15]

4

JKB

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

26

ACES_85208-24071

CONN@

KSI[0..7] <41,43>

KSO[0..15] <41,43>

GND1

GND2

+5VALW

SUSP<6,11,43,45>

SYSON#<43,45>

+USB_VCCB

USB20_N0<28>

USB20_P0<28>

CU6

0.1U_0402_16V4Z

1

+

CU5

2

5

KSO10

KSO11

KSO12

KSO15

D

C

KSI7

KSI2

KSI3

KSI4

KSI0

KSI5

KSI6

KSI1

KSO2

KSO1

KSO0

KSO4

KSO3

KSO5

KSO14

KSO6

KSO7

KSO13

KSO8

KSO9

@

2

1

2

1

C805 100P_0402_50V8J

C804 100P_0402_50V8J

@

@

2

1

C807 100P_0402_50V8J

2

1

@

2

1

C808 100P_0402_50V8J

C810 100P_0402_50V8J

@

@

2

1

C811 100P_0402_50V8J

2

1

C812 100P_0402_50V8J

@

@

2

1

C813 100P_0402_50V8J

@

2

1

2

1

C814 100P_0402_50V8J

2

1

C815 100P_0402_50V8J

@

C816 100P_0402_50V8J

@

@

2

1

C793 100P_0402_50V8J

2

1

@

C790 100P_0402_50V8J

2

1

C791 100P_0402_50V8J

@

@

2

1

C792 100P_0402_50V8J

2

1

C795 100P_0402_50V8J

@

2

1

@

C796 100P_0402_50V8J

2

1

@

C797 100P_0402_50V8J

@

2

1

C798 100P_0402_50V8J

2

1

@

C799 100P_0402_50V8J

2

1

@

C800 100P_0402_50V8J

2

1

@

C801 100P_0402_50V8J

@

2

1

C802 100P_0402_50V8J

@

2

1

For EMC

C803 100P_0402_50V8J

KEYBOARD CONN.

4.7U_0805_10V4Z

2

RU2
0_0603_5%

USB20_P0_L

USB20_N0_L

2

W=100mils

CU4

4.7U_0805_10V4Z

USB_OC0# <28>

USB_OC4# <28,43>

CU2

CU3

0.1U_0402_16V4Z

USB3_TX0_P<28>

USB3_TX0_N<28>

DU2

2

3

YSDA0502C 3P C/A SOT-23

1000P_0402_50V7K

1

USB3_RX0_P<28>

USB3_RX0_N<28>

CU11

1

0.1U_0402_16V7K

CU12

1

0.1U_0402_16V7K

2

USB3_TX0_P_C

2

USB3_TX0_N_C

U3RXDN0_L

U3RXDP0_L

U3TXDN0_L

U3TXDP0_L

+3VL

B

1

2

Kill Switch

+3VALW

@

A

2

1

1

SW5
1BS003-1211L_3P

U34
APX9132ATI-TRL_SOT23-3

2

VDD

C645

0.1U_0402_16V4Z

3

2

D24

DAN217_SC59

1

KILL_SW#

3

3

2

Finger Print

+3VS_FP

1

3

VOUT

GND

1

+3VALW

2

1

5

1

C647

0.1U_0402_16V4Z

2

R580

100K_0402_5%

LID_SW# <41>

KILL_SW# <41>

C128

0.1U_0402_16V4Z

1U_0402_6.3V4Z

2

USB20_N11<28>

USB20_P11<28>

Diode added on Finger Print small board

USB20_R_N11

USB20_R_P11

PJDLC05_SOT23-3

4

D15

@

1

C122

2

R160 0_0402_5%

1

WCM-2012-900T_0805

4

4

1

1

L56

1

R159 0_0402_5%

3

2

1

+3VS

+3VALW

2

3

3

2

2

@

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

1

R62 0_0603_5%

1

R69 0_0603_5%@

+3VS_FP

USB20_R_N11

USB20_R_P11

E&T_6905-F04N-00R

2

+3VS_FP

2

JFP

1

1

2

2

3

3

4

4

CONN@

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

Screw HoleLid SW

H2

H4

H3

1

1

1

@

@

@

H_3P0

H_3P0

H_3P0

Break hole CPU

H31

H30

1

1

@

@

H_2P3

H_2P3

H19

@

H_4P5

PCB Fiducial Mark PAD

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

H6

H1

H7

1

@

H_3P0

H11

1

1

@

H_4P5

FD1

@

1

2

1

1

@

@

H_3P0

H_3P0

H21

H12

1

1

@

@

H_4P5

H_4P5

FD3

FD2

@

@

1

1

H16

H8

1

@

@

H_3P0

H_3P0

JWLAN VGA

FD4

@

1

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

H18

H9

1

1

1

@

@

H_3P0

H_3P0

H32

1

@

H_3P0N

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

Friday, August 24, 2012

Friday, August 24, 2012

Friday, August 24, 2012

H26

@

H_4P5

1

H25

@

H_3P3

1

1

H_3P0X5P0N

H10

1

@

H_4P5

H24

1

@

H_3P3

40 60

40 60

40 60

H23

@

H_3P3

H33

@

1

H13

@

H_4P5

of

of

of

1

B

1

H22

1

@

A

H_3P3

B

B

B

R738

D

@

10_0402_5%

C787

@

22P_0402_50V8J

R739 47K_0402_5%

2

+3VALW_EC

2

C789 0.1U_0402_16V4Z

KSI[0..7]<40,43>

KSO[0..15]<40,43>

C

B

+3VS

+3VL

PCH_PWR_EN<45>

+3VALW

1

R755 2.2K_0402_5%

1

R756 2.2K_0402_5%

1

R758 2.2K_0402_5%

1

R759 2.2K_0402_5%

new added pin--Joyce 0928-201 1

reserve for ENE_CS board

1

20M_0603_5%

@

CRY1

1

C784

@

A

2

15P_0402_50V8J

Y5

@

32.768KHZ_12.5PF_Q13MC14610002

1

2

1

2

1

1

+3VALW

R326

1

@

1K_0402_5%

R749

1

4

OSC

NC

2

3

OSC

NC

5

+3VL

+3VALW

CLK_PCI_EC

ECRST#

GPIO27_WAKE#< 29,35>

KSI[0..7]

KSO[0..15]

2

2

2

EC_SMB_CK1

EC_SMB_DA1

EC_SMB_CK2

2

EC_SMB_DA2

To battery & charger

@

1

R819 100K _0402_5%

1

R817 100K _0402_5%

2

2

EC_SMI#

2

CRY2

1

C785

@

2

15P_0402_50V8J

5

R745

R746

0_0805_5%

0_0805_5%

@

+3VALW

+3VL

When use EC_PM E#, should pul l
up to +3VL: if pull up to +3 VALW,
the system wil l auto resume when
plug in AC at DC mode.

2

To PCH & VGA

2

1

R7540_0402_5%

0.1U_0402_16V4Z

R761

@

1

10K_0402_5%

R768

@

1

10K_0402_5%

2

SUSWARN#< 27>

SUSCLK_R<27>

0.1U_0402_16V4Z

1

C771

C770

1

2

2

GATEA20<29>

KB_RST#<29>

LPC_FRAME#< 25,34,44>

LPC_AD3<25,34,44>

LPC_AD2<25,34,44>

LPC_AD1<25,34,44>

LPC_AD0<25,34,44>

CLK_PCI_EC<28>

PLT_RST#<6,28,34,35,36,37,39,42,44>

2

2

EC_PME#

EC_PME#

1

R7670_0402_5% @

EC_PME#

SLP_A#<27>

EC_SMB_CK1<47,48>

EC_SMB_DA1<47,48>

EC_SMB_CK2<13,26>

EC_SMB_DA2<13,26>

PM_SLP_S3#<27>

PM_SLP_S5#<27>

EC_SMI#<29>

WL_BT_LED#<43>

SLP_LAN#<27>

INVT_PWM<23>

FAN_SPEED<6>

PM_SLP_LAN#<42,50>

E51_TXD<36>

E51_RXD<36>

PM_PWROK<27>

GREEN_PWR<48>

NUM_LED#<44>

R753 0_0402_5%

R757 100 K_0402_5%

1

C783 20P_0402_50V8

0.1U_0402_16V4Z

SERIRQ<25,34,44>

EC_SCI#<29>

EC_PME#<35,36,39,42>

1

short@

2

1

0.1U_0402_16V4Z

C772

2

WL_OFF_EC#

EC_SMB_CK1

EC_SMB_DA1

EC_SMB_CK2

EC_SMB_DA2

PM_SLP_S3#

PM_SLP_S5#

EC_SMI#

PCH_PWR_EN_R

WL_BT_LED#

SLP_LAN#

SUSWARN#

INVT_PWM

FAN_SPEED

PM_SLP_LAN#

E51_TXD

E51_RXD

GREEN_PWR

NUM_LED#

2

CRY1

CRY2

4

1

C773

2

GATEA20

KB_RST#

SERIRQ

LPC_FRAME#

LPC_AD3

LPC_AD2

LPC_AD1

LPC_AD0

CLK_PCI_EC

PLT_RST#

ECRST#

EC_SCI#

EC_PME#

KSI0

KSI1

KSI2

KSI3

KSI4

KSI5

KSI6

KSI7

KSO0

KSO1

KSO2

KSO3

KSO4

KSO5

KSO6

KSO7

KSO8

KSO9

KSO10

KSO11

KSO12

KSO13

KSO14

KSO15

SLP_A#

PM_PWROK

4

2

C774
1000P_0402_50V7K

1

1

2

3

4

5

7

8

10

12

13

37

20

38

55

56

57

58

59

60

61

62

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

81

82

77

78

79

80

6

14

15

16

17

18

19

25

28

29

30

31

32

34

36

122

123

+3VALW_EC

2

C775
1000P_0402_50V7K

1

UE1

GATEA20/GPIO00

KBRST#/GPIO01

SERIRQ

LPC_FRAME#

LPC_AD3

LPC_AD2

LPC_AD1

LPC & MISC

LPC_AD0

CLK_PCI_EC

PCIRST#/GPIO05

EC_RST#

EC_SCII#/GPIO0E

GPIO1D

KSI0/GPIO30

KSI1/GPIO31

KSI2/GPIO32

KSI3/GPIO33

KSI4/GPIO34

KSI5/GPIO35

KSI6/GPIO36

KSI7/GPIO37

KSO0/GPIO20

KSO1/GPIO21

KSO2/GPIO22

KSO3/GPIO23

KSO4/GPIO24

KSO5/GPIO25

Int. K/B

KSO6/GPIO26

Matrix

KSO7/GPIO27

KSO8/GPIO28

KSO9/GPIO29

KSO10/GPIO2A

KSO11/GPIO2B

KSO12/GPIO2C

KSO13/GPIO2D

KSO14/GPIO2E

KSO15/GPIO2F

KSO16/GPIO48

KSO17/GPIO49

EC_SMB_CK1/GPIO44

EC_SMB_DA1/GPIO45

EC_SMB_CK2/GPIO46

EC_SMB_DA2/GPIO47

PM_SLP_S3#/GPIO04

PM_SLP_S5#/GPIO07

EC_SMI#/GPIO08

GPIO0A

GPIO0B

GPIO0C

GPIO0D

EC_INVT_PWM/GPIO11

FAN_SPEED1/GPIO14

EC_PME#/GPIO15

EC_TX/GPIO16

EC_RX/GPIO17

PCH_PWROK/GPIO18

SUSP_LED#/GPIO19

NUM_LED#/GPIO1A

XCLKI/GPIO5D

XCLKO/GPIO5E

9

EC_VDD/VCC

PS2 Interface

SM Bus

22

EC_VDD/VCC

GND/GND

11

+3VALW_EC

+3VL

FBMA-L11-160808-800LMT_0603

125

111

96

33

EC_VDD0

EC_VDD/VCC

EC_VDD/VCC

EC_VDD/VCC

PWM Output

AD Input

DA Output

CPU1.5V_S3_GATE/GPXIOA00

SPI Device Interface

SPI Flash ROM

GPIO

H_PROCHOT#_EC/GPXIOA06

GPO

GPIO

GPI

GND0

GND/GND

GND/GND

GND/GND

94

35

113

24

3

+EC_VCCA

LE1

1

67

BEEP#/GPIO10

EC_VDD/AVCC

ACOFF/GPIO13

BATT_TEMP/GPIO38

ADP_I/GPIO3A

IMON/GPIO43

DAC_BRIG/GPIO3C

EN_DFAN1/GPIO3D

IREF/GPIO3E

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

WOL_EN/GPXIOA01

HDA_SDO/GPXIOA02

VCIN0_PH/GPXIOD00

SPIDI/GPIO5B

SPIDO/GPIO5C

SPICLK/GPIO58

SPICS#/GPIO5A

ENBKL/GPIO40

PECI_KB930/GPIO41

FSTCHG/GPIO50

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

PWR_LED#/GPIO54

BATT_LOW_LED#/GPIO55

SYSON/GPIO56

VR_ON/GPIO57

PM_SLP_S4#/GPIO59

EC_RSMRST#/GPXIOA03

EC_LID_OUT#/GPXIOA04

PROCHOT_IN/GPXIOA05

VCOUT0_PH/GPXIOA07

BKOFF#/GPXIOA08

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

SA_PGOOD/GPXIOA11

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

PECI_KB9012/GPXIOD07

AGND/AGND

KB9012QF A3 LQFP 128P

69

20mil

2

FBMA-L11-160808-800LMT_0603

ECAGND

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

0.1U_0402_16V4Z

2

21

GPIO0F

23

26

WWAN_OFF_EC#

GPIO12

27

EC_BEEP#

PM_SLP_A#

PWR_GPS_DOWN_R#

63

64

GPIO39

65

66

BATT_TEMPA

Project_ID

GPIO3B

75

GPIO42

76

ADP_I

Board_ID

PCH_HOT#_R

GREEN_PWR4

68

70

71

EC_GPS_DOWN#

--Delete net " PWRMOS_TEMP", add net "GREEN _PWR4"for EC pin 76 as powe r circuit modi fied --Joyce 0 302/2012

72

EN_DFAN1

BT_PWRON

TP_ON/OFF#

83

84

85

86

EC_MUTE#

87

USB_EN#

TP_LED#

88

TP_CLK

97

TP_DATA

98

99

CPU1.5V_S3_GATE

109

VSB_EN_R

HDA_SDO

VCIN0_PH

119

120

126

128

73

74

89

PCH_ENBKL

90

KILL_SW#

91

PWR_USB_EN#

92

BATT_FULL_LED#

93

95

CAPS_LED#

PWR_ON_LED

121

BATT_CHG/LOW_LED#

127

SYSON

VR_ON

PM_SLP_S4#

100

101

102

PCH_RSMRST#

103

104

LID_SW_OUT#

VCIN1_PH

105

H_PROCHOT#_EC

106

VCOUT0_PH

107

BKOFF#

108

PBTN_OUT#

PCH_APWROK

SA_PGOOD

110

112

114

115

EC_ACIN

EC_ON

116

ON/OFFBTN#

117

LID_SW#

GPXIOD06

118

SUSP#

CAMPWR_EN

124

H_PECI

V18R

+EC_V18R

LE2

1

3

ECAGND <47>

ECAGND

1

R731 10K_0402_5%

1

WWAN_OFF_EC#

WL_OFF_EC#

EAPD

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

R725 10K_0402_5%

R734 0_04 02_5%

BATT_TEMPA <47>

ADP_I <47,48>

EC_GPS_DOWN# <13>

EN_DFAN1 <6>

BT_PWRON <36>

TP_ON/OFF# <43>

EC_MUTE# <38>

USB_EN# <44>

TP_LED# <43>

EAPD <38>

TP_CLK <43>

TP_DATA <43>

CPU1.5V_S3_GATE <10>

HDA_SDO <25>

VCIN0_PH <47>

VSB_EN

R818 100K_0402_5 %@

PCH_ENBKL <27>

KILL_SW# <40>

PWR_USB_EN# <4 4>

BATT_FULL_LED# <43>

CAPS_LED# <44>

PWR_ON_LED <43 >

BATT_CHG/LOW_LED# <43>

SYSON <39,45,52>

VR_ON <54>

PM_SLP_S4# <27>

PCH_RSMRST# <27>

LID_SW_OUT# <29>

VCIN1_PH <47>

VCOUT0_PH <47,49>

BKOFF# <23>

PBTN_OUT# <27>

PCH_APWROK <27>

SA_PGOOD <53>

EC_ON <43,49>

ON/OFFBTN# <43>

LID_SW# <40>

SUSP# <10,39,45,50,51,52,57>

CAMPWR_EN <23>

H_PECI <6,29>

C782

4.7U_0805_10V4Z

Compal Secret Data

Compal Secret Data

Compal Secret Data

EC_BEEP# <38>

PM_SLP_A# <42>

R4934 0_0402_5%

GREEN_PWR4 < 48>

2

1

Deciphered Date

Deciphered Date

Deciphered Date

2

VR_HOT#<54>

H_PROCHOT#_EC<47>

2

2

PWR_GPS_DOWN# <13,57>

--Add net "PWR_GPS_DOWN#" for EC pin27
as power circuit modified --J oyce 0224/2012

new added pin --Joyce 0922-20 11

PCH_HOT#

--Add net "EC_GPS_DOWN#" to E C pin68

--Joyce 0224/2012

1

R1211 10K_0402_5%

EC_MUTE#

2

1

R765 0_0402_5%

@

VSB_EN

2

1

R7660_0402_5%

PCH_PWR_EN_R

VSB_EN_R

2

VR_HOT#

H_PROCHOT#_EC

2

VSB_EN <47>

Rd
56K_0402_5%

12RM@

Rd
100K_0402_5%

13RM@

BATT_TEMPA

EC_ACIN

+3VL

+3VALW

1

D

2

G

Q38

S

3

2N7002_SOT23

BKOFF#

PCH_HOT# <26>

R747 330K_0402_5%

TP_CLK

TP_DATA

LID_SW#

Board_ID

Rb

8.2K_0402_5%

Rev02@

由



去去去 去去去 去



去去去

由

Project_ID

Rd
0_0402_5%

10@

0 (QAQ10)

1 (QAQ11)

2 (QAQ12)

3 (QAQ13)

4 (12-RM)

5 (13-RM)

2

1

C776 100P_0402_50V8J

2

1

C788 100P_0402_50V8J

@

2

1

R742 330K_0402_5%

2

1

EC_ACIN

WL_OFF_EC#

R752 0_04 02_5%

WWAN_OFF_EC#

Title

Title

Title

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

H_PROCHOT# <6,47>

PWR_GPS_DOWN_R#

EC_GPS_DOWN#

PCH_HOT#_R

與與

Rc 100K_0402_5%

Rd 100K_0402_5%

1

1

R733 1 00K_0402_5%

@

@

1

R732 10K_0402_5%

1

R730 10K_0402_5%

1

R724 10K_0402_5%

@

R740 4.7K_0402_5%

2

1

2

1

R741 4.7K _0402_5%

2

1

R1210 10K_0402_5%

Rb
18K_0402_5%

Rev03@



Rd

8.2K_0402_5%

11@

2

1

Ra 100K_0402_5%

2

1

Rb 100K_0402_5%VPRO@

Rb
33K_0402_5%

Rev04@

的的的 ；

2

1

2

1

@

Rd
18K_0402_5%

12@

2

2

2

2

+5VS

。

+3VL

Rd Vmin VmaxProject_ID V type

0 0. 155V

8.2K+/-5% 0.362V

18K+/-5% 0.503V

33K+/-5% 0. 634V 0. 819V

56K+/-5%

100K+/-5%

2

CH751H-40PT_SOD323-2

1

R748 0_ 0402_5%

1

Friday, August 24, 2012

Friday, August 24, 2012

Friday, August 24, 2012

0V

0V

0.250V

0.168V

0.375V

0.958V 1.185V 1. 359V

KB_RST#

PLT_RST#

EMI request
close U43

D64

1

2

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

0.621V

0.945V

1.838V1.372V 1.650V

2

1

C820 0.1U_0402_16V4Z

@

2

1

C794 330P_0402_16V4Z

ACIN <13,27,48>

WL_OFF# <29,36>

WWAN_OFF# <29,36>

1

+3VS

+3VL

Rb
56K_0402_5%

Rev10@

Rd
33K_0402_5%

13@

41 60

of

41 60

of

41 60

of

D

C

B

A

B

B

B

5

4

3

2

1

3

1

1

VPRO@

S

D

1

2

R548
0_0805_5%~D

VPRO@

0.1U_0402_16V4Z~D

2

C487

1

1

C698
1U_0402_6.3V4Z

2

VPRO@

2

VPRO@

2

1

+3V_M

+1.05V_M

0.1U_0402_16V4Z~D

C494

VPRO@

+3V_M

D

VPRO@

0.1U_0402_16V4Z~D

22U_0805_6.3V6M~D

2

C1178

1

C483

1

2

C

B

A

2

1

2

1

2

2

+3V_M

1

R1144 0_0402_ 5%VPRO@

3

GND

VPRO@

4

+5VALW

2

1

Q50

1

2

G

3

PCH_SMLCLK0<26>

PCH_SMLDATA0<26>

1

R546 10K_0 402_5%@

R545 10K_040 2_5%@

3

R814
100K_0402_5%

VPRO@

D

S

R564 0_0402_5 % VPRO@

1

R563 0_0402_5 % VPRO@

1

2

R560 0_0402_5% VPRO@

C469 0.1U_0402_10 V7K VPRO@

2

C482 0.1U_0402_10 V7K VPRO@

1

R556 0_0402_5 % VPRO@

1

R558 0_0402_5 % VPRO@

1

2

LAN_X2

VPRO@

PM_SLP_LAN

2N7002_SOT23-3

CLKREQ_LAN#<26,35>

PLT_RST#<6,28,34,35,36,37,39,41,44>

D

+3V_M

PM_LANPHY_ENABLE<29>

EC_PME#<35,36,39,41>

C

B

PM_SLP_LAN#<41,50>

PM_SLP_LAN<45>

A

CLK_LAN<26,35>

CLK_LAN#<26,35>

PCIE_PRX_C_LANTX_P6<26,35>

PCIE_PRX_C_LANTX_N6<26,35>

PCIE_PTX_C_LANRX_P6<26,35>

PCIE_PTX_C_LANRX_N6<26,35>

1

@

1

R549 10K_0402_5%

R555 0_0402 _5%VPRO@

R559 0_0402_5%@

25MHZ_20PF_7V2500001 6

Y4

1

1

LAN_X1

33P_0402_50V8J

GND

2

2

C485

VPRO@

1

Need to verify A3 silicon drive
power before removing C427
KDS crystal vender verify
driving level in A3

2N7002E-T1-GE3_SOT23 -3

VPRO@

PLT_RST#

2

2

1

1

2

2

2

1

R557 10K_0402_5%

@

LAN_ACT_LED#<35>

LAN_1000_LED#<35>

LAN_10/100_ LED#<35 >

T142 PAD

T143 PAD

2

2

33P_0402_50V8J

VPRO@

2

C493

1

+3V_M

2

G

VPRO@

2

1

1

3

CLKREQ_LAN#_R

CLK_LAN_R

CLK_LAN#_R

PCIE_PRX_VLANTX_P6

PCIE_PRX_VLANTX_N6

PCIE_PTX_C_C_VLANRX_P6

PCIE_PTX_C_C_VLANRX_N6

PCH_SMLCLK0

PCH_SMLDATA0

SMBus Device Address 0xC8

LAN_DISABLE#_R

LAN_ACT_LED#

LAN_1000_LED#

LAN_10/100_ LED#

TP_LAN_JTAG_TDI

TP_LAN_JTAG_TDO

TP_LAN_JTAG_TMS

TP_LAN_JTAG_TCK

XTALO

XTALI

LAN_TEST_EN

1K_0402_5%

RES_BIAS

1

R561

3.01K_0402_1%

1

R562

VPRO@

2

2

R1200 Resistor Value:

3.01 kohm for Hanksville-M LOM

2.37 kohm for Hanksville-D LOM

R462
470_0603_5%

VPRO@

D

Q60

S

PM_SLP_A#<41>

U31

48

CLK_REQ_N

36

PE_RST_N

44

PE_CLKP

45

PE_CLKN

38

PETp

39

PETn

41

PERp

42

PERn

28

SMB_CLK

31

SMB_DATA

3

LAN_DISABLE_N

26

LED0

27

LED1

25

LED2

32

JTAG_TDI

34

JTAG_TDO

33

JTAG_TMS

35

JTAG_TCK

9

XTAL_OUT

10

XTAL_IN

30

TEST_EN

12

RBIAS

LED

JTAG

Q44A

2

MDI_MINUS0

MDI_MINUS1

MDI

PCIE

MDI_MINUS2

MDI_MINUS3

RSVD_VCC3P3_1

RSVD_VCC3P3_2

SMBUS

VDD3P3_OUT

82579_QFN48_6X6~D

VPRO@

+5VALW

2

R442
47K_0402_5%

VPRO@

1

6

PM_SLP_A

1

2N7002DW-T/R7_SOT363-6

MDI_PLUS0

MDI_PLUS1

MDI_PLUS2

MDI_PLUS3

RSVD_NC

VDD3P3_IN

VDD3P3_15

VDD3P3_19

VDD3P3_29

VDD1P0_47

VDD1P0_46

VDD1P0_37

VDD1P0_43

VDD1P0_11

VDD1P0_40

VDD1P0_22

VDD1P0_16

VDD1P0_8

CTRL_1P0

VSS_EPAD

13

14

17

18

20

21

23

24

6

1

2

5

+RSVD_VCC3P3_1

+RSVD_VCC3P3_2

4

15

19

29

47

46

37

43

11

40

22

16

8

7

49

REGCTL_PNP10

+1.05VM_PCH

Q44B

5

LAN_TX0+

LAN_TX0-

LAN_TX1+

LAN_TX1-

LAN_TX2+

LAN_TX2-

LAN_TX3+

LAN_TX3-

2

R461

470_0603_5%

1

3

4

+3.3V_M_OUT

+1.0V_LAN

VPRO@

2N7002DW-T/R7_SOT363-6

LAN_TX0+ <35>

LAN_TX0- <35>

LAN_TX1+ <35>

LAN_TX1- <35>

LAN_TX2+ <35>

LAN_TX2- <35>

LAN_TX3+ <35>

LAN_TX3- <35>

2

1

VPRO@

2

1

VPRO@

R554 4 .7K_0402_1%~D

R553 4.7K_04 02_1%~D

1

C490
1U_0603_10V6K~D

2

VPRO@

2

C495

0.1U_0402_16V7K

@

1

PM_SLP_A#

2

C496

VPRO@

1

0.01U_0402_25V7K

4.7U_0805_10V4Z

2

G

C694

+3V_M

+1.05V_M

@

1

D

Q56

VPRO@

S

3

AO3416_SOT23-3

1

2

1

C695
1U_0402_6.3V4Z

2

VPRO@

CLKREQ_LAN#

PCH_SMLCLK0

PCH_SMLDATA0

REGCTL_PNP10

+1.05VM_PCH

R1232 10K_0 402_5%@

2

1

R1230 2.2K_0402_5%@

2

1

R1231 2.2K_0402_5%@

L29

@

1

4.7UH_CBC2012T4R7M_20%~D

Idc max=330mA

+1.0V_LAN

22U_0805_6.3V6M~D

2

1

VPRO@

2

Place R548, C462, C463 and L29 close to U31

+1.0V_LAN

VPRO@

VPRO@

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

VPRO@

VPRO@

0.1U_0402_10V7K~D

1

C472

C488

1

C471

2

2

Place C1178 close to pin5

Note:
+1.0V_LAN will work at 0.95V to 1.15V

+1.0V_LAN POWER OPTIONS

Shared with PCH

1.05V SVR

STUFF: R548
NO STUFF: L29

PM_SLP_LAN

Internal SRV

*

STUFF: L29
NO STUFF: R548

2

C497

0.1U_0402_16V7K

VPRO@

1

AO3413_SOT23

2

C498

@

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

C470

VPRO@

1

2

+3V_M

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C468

1

VPRO@

2

22U_0805_6.3V6M~D

C1177

1

C486

2

+3VALW

Q57

G

2

VPRO@

C696

@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

42 60Friday, August 24, 201 2

of

42 60Friday, August 24, 201 2

of

42 60Friday, August 24, 201 2

1

of

B

B

B

3

+5VS

LEFT_BTN#

D16

U6

1

GND

2

VIN

3

VIN

4

EN

G547E2P11U SOP 8P

ESATA

C755

1

0.1U_0402_16V4Z

3

2

+3VS

TP_ON/OFF#<41>

PJDLC05C_SOT23-3

1

1

C7

0.1U_0402_16V4Z

2

+USB_VCCE

8

VOUT

W=80mils

7

VOUT

6

VOUT

5

FLG

1

C4

2

4.7U_0805_10V4Z

+USB_VCCB

W=40mils

1

+

C9
220U_6.3V_M

@

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

LED_WLAN# <36>

WL_BT_LED# <41>

Left USB

1

R93 0_0 402_5%

2

1

4

5IN1_LED#<37>

SATA_LED#<25>

@

2

R169

100K_0402_5%

4

SUSP<6,11,40,45>

SYSON#<40,45 >

4

1

@

1

R85 0_0402_5%

PWR_ON_LED <41>

JTP

8

GND

7

GND

6

5

4

3

2

1

ACES_85201-0605N

CONN@

SW8
SW LTL-613NQR1

3

4

5

TP_CLK

TP_DATA

3

D18

1

+USB_VCCE

W=40mils

1

+

2

C3

2

1

0.1U_0402_16V4Z

@

1

R9 0_0402_5%

1

R10 0_0402_5%

5

2N7002DW-T/R7_SOT363-6@

3

Q230B

MEDIA_LED#

6

Q230A

2N7002DW-T/R7_SOT363-6

2

+3VS

2

6

5

4

3

2

1

6

LEFT_BTN#

RIGHT_BTN#

2

PJDLC05C_SOT23-3

C2
220U_6.3V_M

+5VALW

2

2

@

LEFT_BTN#

RIGHT_BTN#

1

2

1

C12

0.1U_0402_16V4Z

2

+3VS

5

Power Button/ PWR/B Touch/B Connector

2

1

R152 10K_0603_5%@

2

1

R153 10K_0603_5%@

TOP Side

Bottom Side

D

C

B

A

ON/OFFBTN#_R

EC_ON<41,49>

10K_0402_5%

JP7

1

1

2

2

3

3

4

PWR_ON_LED#

4

5

ON/OFFBTN#_R

5

9

6

KSO0

G1

6

10

7

KSI0

G2

7

8

KSI2

8

ACES_51524-0080N-001

WL&BT LED

+3VS

+5VS

HDD LED

+3VS

+5VS

BATT CHARGE/FULL LED

+5VALW

PWR ON LED

+5VALW

+5VS

KSI6

CONN@

LED2

2

1

2

R211 220_0402 _5%

HT-191UYG5 0603 YELLOW GREEN

LED4

2

2

1

R200 220_0402 _5%

HT-191USD 0603 RED

LED5

1

2

B

RED

3

4

A

HT-297USD/UYG 0603 RED/YELLOW GREE

HT-191UYG5 0603 YELLOW GREEN

R215 220_0 402_5%

YELLOW GREEN

LED6

1

2

2

1

LED 19-213A/T1D-CP2Q2HY/3T 0603 WHITE

5

R202 220_0 402_5%

2

10K_0402_5%

1

2

10K_0402_5%

1

100K_0402_5%

D8

1

CHN202UPT SC-70

R155

@

+5VALW

R210

3

R199

3

1

R203 220_0 402_5%

1

R204 220_0 402_5%

1

LED8

2

+3VL

2

+3VALW

R156

2

R154

@

100K_0402_5%

1

2

1

3

1

D

2

Q19
2N7002_SOT23-3

G

@

S

3

2

1

KSO0 <40,41>

KSI0 <40,41>

KSI2 <40,41>

KSI6 <40,41>

2

2N7002DW-T/R7_SOT363-6

1

1

6

1

5

Q229B 2N700 2DW-T/R7_SOT363-6

1

5

Q210B 2N700 2DW-T/R7_SOT363-6

Vf=2.1V(typ),2.4V(max) for amber
Vf=2.2V(typ),2.4V(max) for green
If=25mA(max)

2

1

4

6

4

2

2

TP_LED#

Q229A

Q210A

R1442
0_0402_5%

2

2N7002DW-T/R7_SOT363-6

1

BATT_CHG/LOW_LED# <41>

BATT_FULL_LED# <41>

1

D

G

S

3

TP_LED# <41>

ON/OFFBTN# <41>

51_ON# <44,47>

2

MEDIA_LED#

PWR_ON_LED#

Q6
2N7002_SOT23-3

2

2

1

2

2

1

C8
1000P_0402_50V7K

2

TP_CLK <41>

@

1

C757

100P_0402_50V8J

TP_DATA <41>

@

C759

100P_0402_50V8J

2

SW7
SW LTL-613NQR1

1

3

4

1

R214

10K_0402_5%

TP_ON/OFF#

2

1

R4
0_0402_5%

C14

0.1U_0402_16V4Z

1

C10

0.1U_0402_16V4Z

2

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

6

5

SW6
SMT1-05-A_4P

3

4

6

5

USB20_N1<28>

USB20_P1<28 >

USB_OC4# <28,40>

1

C11
1000P_0402_50V7K

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

2

RIGHT_BTN#

1

2

SATA_PTX_DRX_P4<2 5>

SATA_PTX_DRX_N4<25>

SATA_PRX_C_DTX_N4<25 >

SATA_PRX_C_DTX_P4<25>

Deciphered Date

Deciphered Date

Deciphered Date

2

R1 0_0402_5%

1

L3

1

1

4

4

WCM-2012-900T_0805

1

R5 0_0402_5%

USB20_N9<28>

USB20_P9<28 >

2

2

2

2

USB20_N1_R

@

3

3

USB20_P1_R

2

R163 0_0402_5%

2

1

L57

1

4

WCM-2012-900T_0805

2

1

2

1

2

1

2

1

2

1

2

2

@

3

3

1

4

R162 0_0402_5%

C2055 0.01U_0402 _25V7K

C2054 0.01U_0402_ 25V7K

C2052 0.01U_0402_25V7K

C2053 0.01U_0402_25 V7K

1

+USB_VCCB

JUSB1

1

5

VCC

GND

2

6

D-

GND

3

7

D+

GND

8

4

GND

1

2

+USB_VCCE

SANTA_360117-1

CONN@

1

GND

2

3

D13

PJDLC05_SOT23-3

@

JESATA

USB

1

VBUS

2

D-

3

D+

4

GND

5

GND

6

A+

7

ESATA

A-

8

SHIELD

GND

9

SHIELD

B-

10

SHIELD

B+

11

SHIELD

GND

FOX_3Q318111-R33C3- 7F

CONN@

43 60

43 60

43 60

of

of

of

3

D11

@

PJDLC05_SOT23-3

USB20_N9_R

USB20_P9_R

SATA_PTX_C_DRX_P4

SATA_PTX_C_DRX_N4

SATA_PRX_DTX_N4

SATA_PRX_DTX_P4

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

4019IE

4019IE

4019IE

Friday, August 24, 2012

Friday, August 24, 2012

Friday, August 24, 2012

D

C

B

1

12

13

14

A

15

B

B

B

5

EMI And ESD

Reserve R199,C207,R226,C208 <EMI> 0601

D

CLK_SIO_48M

4.7P_0402_50V8C

Add CR7,CC1 for EMI test fail issue--0929-2011

C

2

CR7

10_0402_5%

1

1

CC1

2

Reserve C292 for SIO_RST# <ESD> 0608

PLT_RST#

CC4

0.1U_0402_16V7K

@

1

2

Place closely pin 1Place closely pin 18

CLK_PCI_SIO

10_0402_5%

4.7P_0402_50V8C

4

3

LAD0

4

LPC_AD0<25,34,41>

LPC_AD1<25,34,41>

2

CR8

@

1

1

CC2

@

2

LPC_AD2<25,34,41>

LPC_AD3<25,34,41>

LPC_FRAME#<25,34,41>

CLK_PCI_SIO<28>

CLK_SIO_48M<26>

PM_CLKRUN#<27 ,34>

LPC_AD0

LPC_AD1

LPC_AD2

LPC_AD3

LPC_FRAME#

CLK_PCI_SIO

CLK_SIO_48M

PM_CLKRUN#

LAD1

5

LAD2

6

LAD3

2

LFRAME#

1

LCLK

18

CLKIN

9

CLKRUN#

22

DFT_EN

24

VSS

KC3820_QFN24

3

CU13

COM@

GPIO00

CTS0/GPIO01

RTS0/GPIO02

DSR0/GPIO03

DTR0/GPIO04

DCD0/GPIO05

RI0/GPIO06

SIN1/GPIO07

SOUT1/GPIO08

SOUT0

SIRQ#

LRST#

21

12

13

14

15

16

17

19

20

11

10

SIN0

8

7

23

VCC

0.1U_0402_16V4Z

SIO_GPIO00

CTS1#

RTS1#

DSR1#

DTR1#

DCD1#

RI1#

TXD1

RXD1

SERIRQ

PLT_RST#_R

CC3

1

COM@

2

1

CR9
0_0402_5%

+3VS

2

COM@

PLT_RST#PLT_RST#PLT_RST#

2

+3VS

CR1 4.7K_0402_5%@

CR2 4.7K_0402_5%@

CR3 4.7K_0402_5%@

CR4 4.7K_0402_5%@

1

CR5 4.7K_0402_5%COM@

1

CR6 4.7K_0402_5%@

SERIRQ <2 5,34,41>

PLT_RST# <6,28,34,35,36,37,39,41,42>

Base Address Selection
mount : 4E unmount : 2E

SIO_GPIO00

2

CR10

@

470_0402_5%

1

2

1

1

1

1

LPC_AD0

2

LPC_AD1

2

2

LPC_AD2

LPC_AD3

2

LPC_FRAME#

2

SERIRQ

1

D

C

B

A

PWR USB

USB20_N3< 28>

USB20_P3<28>

USB20_N4<28>

USB20_P4<28>

R149 0_0402_5%

1

2

2

3

3

WCM-2012-900T_0805

1

R148 0_0402_5%

R137 0_0402_5%

1

2

2

3

3

WCM-2012-900T_0805

2

1

R127 0_0402_5%

5

2

1

+5VALW

1

0.1U_0402_16V4Z

1

1

C676

0.1U_0402_16V4Z

2

@

R582

10K_0402_5%

D26

2

3

+3VL

1

2

51_ON#

C5

2

L54

1

1

USB20_N3_R

@

4

4

USB20_P3_R

2

2

L53

1

1

USB20_N4_R

@

4

4

USB20_P4_R

USB_EN#<41>

2

R1381
0_0402_5%

PWR_USB_ON#

BAV70W_SOT323-3

4

+USB_VCCA

Max 2.5A

U7

8

1

VOUT

GND

2

7

VIN

VOUT

6

3

VOUT

VIN

4

5

EN

FLG

G547E2P11U

C6

4.7U_0805_10V4Z

change from +3VALW to +3VL

+3VALW

since EC power source changed.

1

--Joyce 1110

R581

@

10K_0402_5%

2

PWR_USB_EN#

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.

W=80mils

1

1

R8
0_0402_5%

2

2

USB_OC1# < 28>

PWR_USB_EN# <41>

51_ON# <43,47>

3

NUM_LED#< 41>

CAPS_LED#<41>

Compal Secret Data

Compal Secret Data

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

+USB_VCCA

W=60mils

USB20_N4_R

USB20_P4_R

USB20_N3_R

USB20_P3_R

TXD1

RXD1

CTS1#

RTS1#

DSR1#

DTR1#

DCD1#

RI1#

NUM_LED#

CAPS_LED#

+3VS

PWR_USB_ON#

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

JP1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

G1

26

G2

E&T_6916-Q26N-00R

1

B

A

B

B

44 60Friday, August 24, 2012

44 60Friday, August 24, 2012

44 60Friday, August 24, 2012

B

of

of

of

D

0.1U_0402_16V7K

5

+3VALW TO +3VS

Vgs=-0V,Id=9A, Rds=18.5mohm

+3VALW

Q32

8

D

S

7

D

S

6

D

S

5

D

4.7U_0805_10V4Z

SI4800BDY_SO8

1

C830

2

G

2

C847

1

1

2

3

4

0.022U_0402_25V7K

C824

1U_0402_6.3V4Z

1

C831

2

+3VS

1

2

1

R787
330K_0402_5%

2

1

C825 4.7U_0805_10V4Z

2

2

1

R784

47K_0402_5%

6

Q35A

2

2N7002KDW 2N SOT-363-6

2N7002KDW 2N SOT-363-6

1

SUSP

2

+1.5V to +1.5VS+5VALW TO +5VS

Vgs=10V,Id=14. 5A,Rds=6mohm

8

7

6

5

SI4856ADY_SO8

1

C834

FDS6676AS

2

4.7U_0805_10V4Z

+1.5VS

Q34

1

D

S

2

D

S

3

D

S

4

D

G

1

C835

2

0.1U_0603_25V7K

1

C828
1U_0402_6.3V4Z

2

1

R789
820K_0402_5%

2

1

C829

4.7U_0805_10V4Z

2

6

2

1

R786

220K_0402_5%

Q37A

+VSB

2

2N7002KDW 2N SOT-363-6

1

2N7002KDW 2N SOT-363-6

SUSP

1

2

3

1

C827

4.7U_0805_10V4Z

2

2

1

6

R785

47K_0402_5%

Q36A

+VSB

2

2N7002KDW 2N SOT-363-6

1

2N7002KDW 2N SOT-363-6

SUSP

2

C842

+1.5V

2

2

1

470_0805_5%

1

0.1U_0402_16V7K

Q36B

C845

1

0.1U_0402_16V7K

R782

3

5

4

4

0.1U_0402_16V7K

0.1U_0402_16V7K

2

+5VALW

C843

2

C844

1

2

R781

470_0805_5%

1

3

+VSB

Q35B

5

4

0.1U_0402_16V7K

Q33

8

1

2

C846

1

4.7U_0805_10V4Z

D

7

D

6

D

5

D

1

SI4800BDY_SO8

C832

2

1

S

2

S

3

S

4

G

0.01U_0402_25V7K

C833

1U_0402_6.3V4Z

RUN_ON

1

2

C826

1

R788
330K_0402_5%

2

+5VS

1

2

R783

470_0805_5%

1

3

Q37B

5

4

D

C

DGPU_PWR_EN#

+1.05VS_DGPU

C852

10U_0603_6.3V6M

OPT@

B

A

2

+VSB

R808 200K _0402_5%

DGPU_PWR_EN#

2N7002KDW 2N SOT-363-6

PM_SLP_LAN<42>

OPT@

+3VS to +3VS_DGPU

2

1

R426

47K_0402_5%

OPT@

+1.05VS_PCH

J4

@

2

1

2

1

JUMP_43X79

Q40

8

1

D

S

7

2

D

S

6

3

D

S

5

4

D

G

SI4800BDY_SO8

1

OPT@

2

1

1

R432

6

@

2

820K_0402_5%

2

Q227A

1

OPT@

+1.05V_M

Q197A

+1.05VS_VCCP

2

R1447

470_0805_5%

VPRO@

1

+1.05V_M_R

6

Q197B

2

5

SUSP

2N7002KDW 2N SOT-363-6

1

5

2

C491

0.1U_0402_16V7K

OPT@

1

AO3413_SOT23

2

C492

0.01U_0402_25V7K

1

@

+1.05VS_DGPU

1

2

1

C848

0.1U_0603_25V7K

2

OPT@

2

R1445

470_0805_5%

1

+VCCP_R

3

SYSON#

2N7002KDW 2N SOT-363-6

4

OPT@

10U_0603_6.3V6M

Q54

OPT@

C854

2

2

+3VS

G

1

2

+1.5V

3

1

1U_0603_10V4Z

OPT@

1

2

6

+1.5V_R

1

S

D

C853

R1446
470_0805_5%

2N7002KDW 2N SOT-363-6

1

C697
1U_0402_6.3V4Z

2

OPT@

2

R805
470_0603_5%

OPT@

1

3

5

Q227B

DGPU_PWR_EN#

4

2N7002KDW 2N SOT-363-6

OPT@

RUN_ON_CPU1.5VS3#<6,10>

Q198A

SUSP

+3VS_DGPU

R463

0_0402_5%

4

+1.5V to +1.5VSDGPU

+1.5V

8

7

6

5

FDS6676AS_SO8

1

C473

OPT@

2

4.7U_0805_10V4Z

PCH_PWR_EN#<31>

PCH_PWR_EN<41>

R460

@

0_0402_5%

Q43

1

D

S

2

D

S

3

D

S

4

D

G

OPT@

C481

OPT@

PCH_PWR_EN#

2N7002E-T1-GE3_SOT23-3

+0.75VS

1

R826
22_0603_5%

2

3

+0.75VS_R

Q198B

5

4

2N7002KDW 2N SOT-363-6

+1.5VSDGPU

1

C478

OPT@

2

1U_0402_6.3V4Z

1

1

R430
820K_0402_5%

OPT@

2

2

2N7002KDW 2N SOT-363-6

0.1U_0402_25V6

VGA_PWROK< 26,29,57>

+5VALW

2

R813

100K_0402_5%

1

Q49

2

G

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

Vgs=10V,Id=14. 5A,Rds=6mohm

1

D

S

3

+3VS_DGPU

1

220K_0402_5%

6

Q13A

OPT@

1

2

R458
470_0603_5%

OPT@

1

C475

OPT@

4.7U_0805_10V4Z

2

2

R431

OPT@

2

VGA_PWROK#

1

2

G

3

+VSB

D

S

6

2

DGPU_PWR_EN#

Q225A

1

2N7002KDW 2N SOT-363-6

OPT@

Issued Date

Issued Date

Issued Date

3

2

R429

OPT@

470_0805_5%

1

3

Q13B

5

2N7002KDW 2N SOT-363-6

OPT@

4

+5VALW

R146

2

1

OPT@

100K_0402_5%

Q188

2N7002_SOT23-3

OPT@

+VGA_CORE

2

R459

470_0603_5%

OPT@

1

3

5

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

DGPU_PWR_EN<26,28,57>

Q225B
2N7002KDW 2N SOT-363-6

4

OPT@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

+3VALW TO +3VALW(PCH AUX Power)

Short J1 for PCH VCCSUS3.3

+3VALW

1

C837

10U_0603_6.3V6M

2

R807 200 K_0402_5%

+VSB

PCH_PWR_EN#

2N7002KDW 2N SOT-363-6

DGPU_PWR_EN#

OPT@

2N7002_SOT23-3

R441

4.7K_0402_5%

@

2

2

3V_GATE

2

Q46A

+5VALW

2

R797
100K_0402_5%

OPT@

1

Q191

1

D

2

2

G

S

3

1

20mil 10mil

J1

@

2

1

JUMP_43X79

SI7326DN-T1-E3_PAK1212-8

U25

5

+3VALW_PCH

2

1

1

2

3

4

1

1

R435

6

1

SYSON#<40,43>

2N7002KDW 2N SOT-363-6

SYSON<39,41,52>

2

C836

0.1U_0402_16V7K

@

2

820K_0402_5%

1

+5VALW

+5VALW

2

R1453
100K_0402_5%

1

SYSON#

3

Q201B

5

2

1

R70

4

10K_0402_5%

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

Friday, August 24, 2012

Friday, August 24, 2012

Friday, August 24, 2012

40mil

C839

10U_0603_6.3V6M

1

2

2

100K_0402_5%

1

SUSP

6

Q201A
2N7002KDW 2N SOT-363-6

2

1

1

1

C838

2

2

1U_0402_6.3V4K

3

4

2N7002KDW 2N SOT-363-6

R796

SUSP <6,11,40,43>

SUSP# <10,39,41,50,51,52,57>

1

R440

4.7K_0402_5%

1

R804
470_0402_5%

5

PCH_PWR_EN#

Q46B

2

45 60

45 60

45 60

C

B

A

B

B

B

of

of

of

5

Compal Electronics, Inc.

4

3

2

1

Power block

D

C

B

DC IN

CHARGER
CC:0A~3.64A
CV:12.6V(6cell)
BQ24725RGRR

DGPU_PWR_EN

VR_ON

Page 48

Battery

+VGA_CORE
TDC:23A
ADP3211AMNR2G

+VCC_CORE
TDC: 36A
NCP6132A

Input
Switch

Page 48

Page 57

Page 54

B+

CPU OTP

Page 47

Turn Off

+3VALWP: TDC:6A
+5VALWP: TDC:4A
RT8205LZQW(2) WQFN

+1.8VP: TDC:3A
SY8033BDBC

+1.05VSP: TDC:12A
TPS51212DSCR

+1.5VP: TDC:13A

0.75VS: TDC :2A
RT8207MZQW

+VCCSAP: TDC:5A
TPS51461RGER

Page 50

Page 51

Page 52

Page 53

Page 49

SUSP#

SUSP#

SYSON

SUSP#

+1.05VSP_PWRGOOD

D

Always

C

B

5

+GFX_CORE
TDC: 21.5A
NCP6132A

Page 54

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2011/10/31 2012/12/31

2011/10/31 2012/12/31

2011/10/31 2012/12/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

Date: Sheet

46 60Friday, August 24, 2012

of

46 60Friday, August 24, 2012

of

46 60Friday, August 24, 2012

1

of

A

B

B

B

VR_ON

A

DCIN jack P/N:DC301008L00,
need doble confirm P/N with ME

ADPIN

1

V+

2

3

4

5

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

PR18

100_0402_1%

1

2

3

PJPDC1

GND

GND

GND

GND

SANTA_322121-1

PJP1

11

GND

10

GND

SINGA_2BA1514-000111F

@

RTC Battery

PBJ1

- +

2

MAXEL_ML1220T10

4

SP093MX0000

Change RTC For Cost Down

A

EC_SMCA

2

1

A

1

PD1

EC_SMDA

PJSOT24CW_SOT323-3

3

2

2

PR19
100_0402_1%

1

1

+RTCBATT1

Must close PBJ 1

1

PC1

2

TH

PR24

560_0603_5%

1

1000P_0402_50V7K

PD2

2

3

PJSOT24CW_SOT323-3

1

PR17
1K_0402_1%

2

2

+RTCBATT2

PL1

HCB2012KF-121T50_0805

1

PL2

HCB2012KF-121T50_0805

1

1

PC2

2

100P_0402_50V8J

1

2

1

PR16

2

6.49K_0402_1%

PR25

560_0603_5%

2

1

+RTCBATT

2

2

BATT_B/I

PR12
1K_0402_1%

1

1

2

PC3

1000P_0402_50V7K

+3VL

B

VIN

1

2

HCB2012KF-121T50_0805

VMB

HCB2012KF-121T50_0805

1

PC6
1000P_0402_50V7K

2

BATT_TEMPA 38

EC_SMB_DA1 38,47

EC_SMB_CK1 38,47

B

C

PH1 under CPU botten side :
CPU thermal protection at 93 +-3 degree C
Recovery at 56 +-3 degree C

VL

PC4

100P_0402_50V8J

PL3

1

PL4

1

0.1U_0603_16V7K

H_PROCHOT#5,38

H_PROCHOT#_EC38

2

2

SPOK48

VSB_EN41

1

PC7

0.01U_0402_25V7K

2

@

PC5

BATT+

100K_0402_1%

1

1

+3VS

2

2

PR4

1

PQ1

1

D

2

G

ADP_OCP_1

2N7002KW 1N SOT323-3

S

3

PR9

1

0_0402_5%

KB9012@

VL

2

PR14

@

1

PR15

@

0_0402_5%

2

1

PR22
0_0402_5%

2

100K_0402_1%

2

B+

PR23
1K_0402_1%

1

2

OTP_N_003

2

1

2

BATT+

51_ON#47,48,50

PU1

KB930@

1

VCC

2

GND

3

OT1

4

OT2

G718TM1U_SOT23-8

2

PR8 0_0402_5%@

1

PR10 0_0402_5%KB93 0@

2

G

PC10

.1U_0402_16V7K

@

TMSNS1

RHYST1

TMSNS2

RHYST2

1

PR13

22K_0402_1%

1

1

D

VSB_N_003

PQ3
2N7002KW 1N SOT323-3

S

3

2

PD21

LL4148_LL34-2

100K_0402_1%

@

1

22K_0402_1%

@

8

7

OTP_N_002

6

5

ADP_OCP_2

PR6

OPT@ 309K_0402_1%

MAINPOWN 48

VCOUT0_PH 38,48

2

1

1

PR302

2

2

PR303

For KB9012 --> Remove all 51_ON# c ircuit

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

D

For KB930 --> Keep PU1 circuit
(Vth = 0.825V)

For KB9012 (Red square) --> Remove PU1 circui t, but keep
PH1, PR1, PR2,PR4,PR7,PR9,P Q1

KB930@ UMA@

51.1K_0402_1%

1

PR11

2

100K_0402_1%

ADP_I38,47

PR6

1

1

2

VSB_N_001

1

@

2

2012/12/312011/10/31

2012/12/312011/10/31

2012/12/312011/10/31

N1

PR1

UMA@

2

PR21

@

100K_0402_1%

2

VCIN1_PH

38

3

PC9

TP0610K-T1-E3_SOT23-3

0.22U_0603_25V7K

TP0610K-T1-E3_SOT23-3

3

PC500

0.22U_0603_25V7K

VS_N_002

2

PR1

OPT@ 47.5K_0402_1%

1

7.87K_0402_1%

2

PR500

KB9012@

0_0402_5%

1

1

1

2

PQ2

PQ100

@

1

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

PR7

1

2

@

+EC_VCCA

1

PR2

KB9012@

2

13.7K_0402_1%

2

1

+3VL

100K_0402_1%

PR20

@

100K_0402_1%

2

VCIN0_PH

38

2

PR501

KB9012@

0_0402_5%

1

1

+VSB

PC8

0.1U_0603_25V7K

VIN

2

PD20

@

RLS4148_LL34-2

1

VS_N_001

1

1

PR300

PR301

68_1206_5%

2

68_1206_5%

2

@

VS

1

PC501

0.1U_0603_25V7K

2

@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

D

1

PR3

1

KB930@

2

2

1

PR5
10K_0402_1%

KB930@

1

PH1

2

ECAGND

41

100K_0402_1%_NCP15WF104F03RC

2

3

4

B

B

47 60Friday, August 24, 2012

47 60Friday, August 24, 2012

47 60Friday, August 24, 2012

B

of

of

of

A

B

C

D

for reverse input protect ion

BQ24725_PROT

PR26

2

VIN

1

1M_0402_5%

PQ7
TPCA8057-H_PPAK56-8

5

1

4

1

PC24

2

2200P_040 2_50V7K

PQ9
TP0610K-T1-E3_SOT23-3

3

100K_0402_1%

@

1

2

1

BQ24725_VCC_EN1

D

2

GREEN_LATCH#

G

S

3

PR33

1

2

22K_0402_1%

PQ11
SSM3K7002FU_SC70-3

1

PC28

0.22U_0603_25V7K

BQ24725_VCC_EN

@

2

BQ24725_VCC1

2

PR32

1

BQ24725_VCC2

2

1

PR39

0_0402_5 %

2

Vin Dectector

Min. Typ Max.
H-->L 17.23V
L--> H 17.63V

ILIM and external DPM

3.97A

3

4

For KB930 --> Keep PR44

For KB9012 (Red square) --> Remove PR44
Keep PR45

A

1

2

3

PR27

1

3M_0402_5%

P1

1

2

PQ5

2

G

PR30

1

D

2N7002KW 1N SOT323-3

S

3

2

1

PC13

2

@0_0402_5 %

1

PR34

2

PQ6

MDS2659URH

8

1

7

P2

P3

PL5

1UH_VMPI0703AR-1R0M-Z01_11A_20%

PQ8

MDS2659URH

8

1

2

3

0.1U_0402_ 25V6

1

PR35

4.12K_060 3_1%

4.12K_060 3_1%

2

1

7

6

5

1

4

2

PC14

10U_0805_ 25V6K

+3VALW

+3VL

ACIN14,20,38

B

2

PC15

10U_0805_ 25V6K

1

2

BQ24725_CMSRC

BQ24725_ACDRV

1

VIN

1

2

1

2

PC25

0.1U_0603 _25V7K

BQ24725_ACP

PR44

1

@10K_0402_1%

PR45

1

1M_0402_1%

PR46

1

10K_0402_1%

PR48

255K_0402_1%

PR28

0.02_2512_1%

PC27

2

1

0.1U_0402_25V6

2

BQ24725_ACOK

2

2

2

BQ24725_PRECHG

1

PC43

2

0.1U_0402_ 25V6

4

3

B+

1

PC26

2

PC30

1

BQ24725_ACN

1U_0603_25V6K

PU3

21

PAD

1

ACN

2

ACP

3

CMSRC

4

ACDRV

5

ACOK

1

PR50

154K_0402 _1%

2

1

PR52

66.5K_040 2_1%

2

PC44 .1U_0402_16V7K

Please locate the RC
Near EC chip

VIN

3

1

0.1U_0402_ 25V6

BQ24725_VCC1

BQ24725_VCC2

PR36

2

BQ24725_VCC

20

BQ24725ARGRR_VQFN20_3P5X3P5

6

BQ24725_ACDET

PR53

100_0402_5%

2

1

1

1

10U_0805_ 25V6K

1

PR37

2

BQ24725_BS T

17

BTST

SCL

9

Issued Date

Issued Date

Issued Date

2

0_0603_5 %

PC17

1

2

BQ24725_REGN

16

REGN

LODRV

BATDRV

ILIM

10

BQ24725_ILIM

1

2

1

PC18

2

2

10U_0805_ 25V6K

PD5
RB751V-40_SOD323-2

DH_CHG

PC31

2

1

1U_0603_25V6K

15

DL_CHG

14

GND

13

SRP

SRP

12

SRN

SRN

11

BQ24725_BATDRV

1

PC41

PR49

2

100K_0402 _1%

EC_SMB_CK1 38,46

EC_SMB_DA1 38,46

ADP_I 38,46

GREEN_LATCH#

1

2

PC19

2

@10U_0805_ 25V6K

@10U_0805_ 25V6K

2

1

DH_CHG1

PR38

0_0402_5%

AON7406L 1N DFN

PR42

10_0603_1%

PR43

2

1

6.8_0603_1%

1

PR47

1

133K_0402_1%

0.01U_0402 _25V7K

VIN

GREEN_PWR3

@

1

0_0402_5%

2011/10/31 2012/12/31

2011/10/31 2012/12/31

2011/10/31 2012/12/31

PC16

2

PD4

BAS40CW_SOT323-3

0.047U_0402_25V7K

PC29

2

1

1

BQ24725_BS T1

2

10_1206_ 1%

DH_CHG

BQ24725_LX

19

18

VCC

HIDRV

PHASE

SDA

IOUT

ACDET

8

7

BQ24725_IOUT

2

1

1

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

PC20

CSOP1

2

CSON1

+3VALW

2

2

1

2

PR55

1

47K_0402_1%

@

PR180

C

1

PC21

2

0.1U_0402_ 25V6

2200P_040 2_25V7K

4

PQ12

4

1

2

PR51

@

309K_0402_1%

1

PC45

2

@

2

SSM3K7002FU_SC70-3

1

PC22

2

BQ24725_BATDRV

@820P_040 2_25V7

5

PQ10
MDV1528URH 1N PDFN33-8

4.7UH_ETQP3W4R7WFN_5.5A_20%

3

2

1

BQ24725_LX

5

3

2

1

PC39

0.1U_0603_ 16V7K

41

PR54

@

10K_0402_5%

2

1

GREEN_PWR4

GREEN_PWR#

0.1U_0402_10V7K

+3VL

PR179
10K_0402_5%

PQ109

@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1

2

1

BQ24725_SNUB

2

GREEN_PWR4

2

@

1

1

D

S

3

1

PC40

2

G

PL6

PR41

@4.7_1206 _5%

@680P_040 2_50V7K

GREEN_PWR41

1

2

1

2

CHG_OUT

IN1

IN2

PR31

4.12K_0603_1%

CSOP1

1

2

5

VCC

GND

3

2

BQ24725_BATDRV_1

1

2

PC35

PU4

MC74VHC1G08DFT2G_SC70-5

OUT

6

5

PR40

0.02_1206_1%

0.1U_0402_ 25V6

@

4

GREEN_PWR1

4

4

3

CSON1

2

1

1

2

1

2

1

PR58
100K_0402_5%

2

3

1

PR29

1

PC23

@0_0402_5 %

2

2

0.01U_0402 _50V7K

BATT+

1

1

1

1

PC34

1

PC33

PC32

2

2

PC38

0.1U_0402_ 25V6

@820P_040 2_25V7

5

PU5

@

P

INB

4

O

INA

G

GREEN_PWR2

74LVC1G02_04_SOT353

3

PR56 0_0402_5%@

2

@

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

PC36

2

PC37

2

10U_0805_ 25V6K

2

2200P_040 2_50V7K

10U_0805_ 25V6K

+3VL

1

INB

2

INA

GREEN_LATCH1

0.01U_0402 _50V7K

1

PC42

2

5

PU6

@

P

4

O

G

74LVC1G02_04_SOT353

3

@

2

1

PR178

@

2

1

GREEN_PWR5

0_0402_5%

GREEN_LATCH#

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

D

0.1U_0402_10V6K

PR57
0_0402_5%

48 60Friday, August 24, 2012

48 60Friday, August 24, 2012

48 60Friday, August 24, 2012

1

2

3

@

4

B

B

B

of

of

of

A

1

B+

PL7

HCB2012KF-121T50_0805

2

1

1

PC48

2

PC47

0.1U_0402_25V6

2

+3VALWP

3

EC_ON38,39,41

VCOUT0_PH38,46

MAINPOWN46

VS

4

For KB930 --> Keep PR319, Remove PR74

For KB9012 (Red square) --> Remove PR319
Keep PR74

A

2200P_0402_50V7K

B++

1

2

@

1

2

220U_6.3V_M

SSM6N7002FU_US6

PR181

1

0_0402_5%

1

PR319
100K_0402_1%

PC56

@

PC49

4.7U_0805_25V6-K

MDV1528URH 1N PDFN33-8

PL8

4.7UH_ETQP3W4R7WFN_5.5A_20%

2

1

+

2

ENTRIP1

6

D

PQ17A

S

1

PR74

2.2K_0402_1%

2

1

PR76

2

1

0_0402_5%

2

KB9012@

2

1

PR320

2

42.2K_0402_1%

@

B

C

D

E

2VREF_51125

1

PC46

1U_0603_16V6K

2

3

TONSEL

GND

16

2

FB_5V

2

FB1

REF

VIN

VREG5

17

1

2

1

PC62

2

0.1U_0603_25V7K

51125_PWR1

PC64

PR60

30.9K_0402_1%

2

1

PR62
20K_0402_1%

2

1

PR64
137K_0402_1%

2

1

ENTRIP1

1

ENTRIP1

24

VO1

23

PGOOD

22

BOOT1

BST_5V

21

UGATE1

20

PHASE1

19

LGATE1

NC

18

RT8205LZQW(2)_WQFN24_4X4

VL

PC61

4.7U_0805_10V6K

PR73

0_0603_5%

1

1

PD8
GLZ27D_LL34-2

2

1

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

UG_5V

LX_5V

LG_5V

PR66

2.2_0402_5%

1

51125_PWR

2

PC50

B++

2

1

2

0.1U_0402_25V6

PR68

BST1_5V

D

PC51

1

0_0402_5%

SPOK 46

+5VALWP

+3VALWP

1

1

2

2

2200P_0402_50V7K

PC55

0.1U_0402_10V7K

2

1

2

PC52

5

10U_0805_25V6K

UG_5V_1

AON7702L_DFN8-5

PJP2

1

PAD-OPEN 4x4m

PJP3

1

PAD-OPEN 4x4m

+3VLP

+3VLP

PQ14

MDV1528URH 1N PDFN33-8

4

3

2

1

5

4

3

2

1

2

2

PJP4

2

PAD-OPEN 2x2m

PJP5

2

PAD-OPEN 2x2m

Title

Title

Title

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

PL9

4.7UH_ETQP3W4R7WFN_5.5A_20%

1

1

PQ16

PR70

2

220U_6.3V_M

@4.7_1206_5%

SNUB_5V

1

PC60

2

@680P_0402_50V7K

+5VALW

(6A,200mils ,Via NO.= 12)

+3VALW

(4A,120mils ,Via NO.= 8)

+3VL

1

+CHGRTC

1

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

2

1

+

PC57

2

49 60Friday, August 24, 2012

49 60Friday, August 24, 2012

49 60Friday, August 24, 2012

E

PR59

13.7K_0402_1%

2

1

PR61

20K_0402_1%

2

1

FB_3V

5

+3VLP

4

PQ13

3

2

1

1

1

PR69

2

@4.7_1206_5%

SNUB_3V

1

2

PC58

@680P_0402_50V7K

5

3

2

1

UG_3V_1

PQ15

4

AON7406L_DFN8-5

PC53

10U_0805_6.3V6M

PC54

0.1U_0402_10V7K

1

LX_3V

51125_PWR

1

2

1

2

2.2_0402_5%

PR67

BST1_3V

2

1

0_0402_5%

LG_3V

PR71

499K_0402_1%

1

PR72

95.3K_0402_1%

PR63

154K_0402_1%

2

1

ENTRIP2

6

5

4

PU8

25

PR65

2

BST_3V

10

UG_3V

11

12

2

1

1

PC59
1U_0603_10V6K

2

2

FB2

P PAD

ENTRIP2

7

VO2

8

VREG3

9

BOOT2

UGATE2

PHASE2

LGATE2

EN

SKIPSEL

13

15

14

51125_PWR

2VREF_51125

ENTRIP2

3

D

5

G

S

4

PR75

1

100K_0402_5%

PQ18
DRC5115E0L_SOD323-3

B

PQ17B

SSM6N7002FU_US6

2

B+

2

PD7

Vin

2

VL

BATT+

1

1SS355_SOD323-2

PD9

2

1

1SS355_SOD323-2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

1

PD6

1SS355_SOD323-2

PR77

100_0805_5%

1

51125_PWR2

0.1U_0603_25V7K

2011/10/31 2012/12/31

2011/10/31 2012/12/31

2011/10/31 2012/12/31

C

2

N_3_5V_001

G

N_3_5V_002

1

2

1

3

PC63

2

4.7U_0603_10V6K

of

of

of

+5VALWP

1

2

3

4

B

B

B

A

B

C

D

1

+5VALW

SUSP#9,32,38,44,50,5 1,56

2

PL12

VPRO@

HCB1608KF_0603

+5VALW

3

PM_SLP_LAN#45,46

4

1

PR85

1

100K_0402_1%

2

VPRO@

2

1

PC71
22U_0805_6.3VAM

2

1

VPRO@

EN_+1.05V_MP

PR87
300K_0402_5%

2

+1.05V_MP_VIN

@

1

PR80 0_0402_5%

2

1

2

1

1

PC65
22U_0805_6.3VAM

2

2

EN_1.8VSP

@47K_0402_5%

PU10

VPRO@

10

9

8

5

PC75

@

0.1U_0402_10V7K

VIN_1.8VSP

1

PR81

2

4

PVIN

LX

PG

PVIN

LX

SVIN

FB

EN

NC

TP

1

7

11

SY8033BDBC_DFN10_3X3

NC

PL10

HCB1608KF-121T30_0603

2

3

6

1

PC69

2

@0.1U_0402_10V7K

+1.05V_MP_LX

+1.05V_MP_FB

PU9

4

10

PVIN

PG

9

PVIN

8

SVIN

5

EN

TP

7

11

+1.8VSP

1

2

SNUB_+1.05V_MP

2

LX_1.8VSP

LX

3

LX

6

FB

NC

NC

1

SY8033BDBC_DFN10_3X3

PJP7

1

PAD-OPEN 3x3m

VPRO@

PL13

0.47UH_PCMB042T-R47MN_6A_20%

1

2

2

1

VPRO@

VPRO@

PR84

7.5K_0402_1%

PR83

4.7_1206_5%

PR86

VPRO@

10K_0402_1%

PC76

VPRO@

680P_0603_50V7K

0.47UH_PCMB042T-R47MN_6A_20%

1

PR78

2

4.7_1206_5%

SNUB_1.8VSP

1

2

PC70

680P_0402_50V7K

2

+1.8VS

1

1

PC72

2

2

68P_0402_50V

VPRO@

1

2

PL11

2

1

20K_0402_1%

FB_1.8VSP

10K_0402_1%

1

PR79

2

1

PR82

2

(3A,120mils ,Via NO.= 6)

1

1

PC73

2

PC74

2

VPRO@

22U_0805_6.3VAM

22U_0805_6.3VAM

VPRO@

+1.05V_MP

1

PC66

2

68P_0402_50V8J

+1.05V_MP

1

2

PJP8

1

PAD-OPEN 3x3m

+1.8VSP

1

PC67

2

PC68

22U_0805_6.3VAM

22U_0805_6.3VAM

<Vo=1.05V> VFB=0.6V
Vo=VFB(1+PR401/PR402)=0.6*(1+7.5K/10K)=1.05V

2

(1.3A, 52mils, Via NO.= 3)

+1.05V_M

1

2

3

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

2012/12/312011/10/31

2012/12/312011/10/31

2012/12/312011/10/31

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

D

50 60Friday, August 24, 2012

of

50 60Friday, August 24, 2012

of

50 60Friday, August 24, 2012

of

B

B

B

1

1

B+

D

+1.05VSP

1

+

PC83

2

220U_6.3VM_R15

1

VCCIO_SENSE 8

C

B

+1.05VSP

2

1

1

PC78

2

PC77

2

0.1U_0402_25V6

2200P_0402_50V7K

0.47UH_PCMB063T-R47MS_18A_20%

1

PR93

4.7_1206_5%

2

SNUB_+1.05VSP

1

PC85

680P_0402_50V7K

2

PJP9

1

PAD-OPEN 4x4m

PJP10

1

PAD-OPEN 4x4m

PL14

HCB1608KF-121T30_0603

2

1

1

2

2

PC79

PC80

10U_0805_25V6K

4.7U_0805_25V6-K

PL15

2

1

1

PR95
0_0402_5%

2

PR98

100_0402_1%

2

2

+1.05VS_PCH

2

(12A,480mils ,Via NO.= 24)

+1.05VS_VCCP

2

BST1_+1.05VSP

PR91

1

2.2_0402_5%

VCCIO_SENSE1

3

PC81

0.22U_0402_10V6K

1

2

UG_+1.05VSP1

+1.05VSP_B+

5

PQ19

4

2

MDV1525URH_PDFN33-8-5

3

2

1

5

6

8

7

PQ20

4

AO4456_SO8

3

2

1

5

D

+1.05VSP_PWRGOOD44,52

PR89

2

1

84.5K_0402_1%

PR92

0_0402_5%

2

SUSP#9,32,38,44,49,51,56

C

B

1

PC84

@0.1U_0402_16V7K

1

2

2

1

TRIP_+1.05VSP

EN_+1.05VSP

FB_+1.05VSP

RF_+1.05VSP

1

470K_0402_1%

2

@1000P_0402_50V7K

PR99
10K_0402_1%

+3VS

PR94

PC86

2

1

+1.05VSP1

PR97 4.99K_0402_1%

2

1

4

PR88
10K_0402_5%

PU11

1

PGOOD

2

TRIP

3

EN

4

VFB

5

TST

TPS51212DSCR_SON10_3X3

1

@1.2K_0402_1%

2

PR96

PR90

1

10

VBST

BST_+1.05VSP

9

DRVH

UG_+1.05VSP

8

SW

SW_+1.05VSP

7

V5IN

6

DRVL

LG_+1.05VSP

11

TP

2

+1.05VSP

1

4.7_0402_5%

1

PC82
1U_0603_10V6K

2

+5VALW

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/10/31

2011/10/31

2011/10/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2012/12/31

2012/12/31

2012/12/31

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

Friday, August 24, 2012

Friday, August 24, 2012

Friday, August 24, 2012

4019IE

51 60

51 60

51 60

1

A

BCustom

BCustom

BCustom

of

of

of

5

HCB1608KF-121T30_0603

B+

D

1

+1.5VP

C

Mode Level +0.75VSP VTTREF_1.5V
S5 L off off
S3 L off on
S0 H on on

Note: S3 - sleep ; S5 - power off

B

+1.5VP

+0.75VSP

A

PL16

2

1.5V_B+

1

2

PC87

0.1U_0402_25V6

1

+

PC95

2

2

220U_6.3VM_R15

PJP11

1

PAD-OPEN 4x4m

PJP12

1

PAD-OPEN 4x4m

PJP13

1

PAD-OPEN 3x3m

PL17

1

2

2

2

1UH_VMPI0703AR-1R0M-Z01_11A_20%

1

1

1

PC88

2

2

2

PC89

10U_0805_25V6K

2200P_0402_50V7K

1

PR103

@4.7_1206_5%

2

SNUB_+1.5VP

1

PC98

@680P_0402_50V7K

2

(13A,520mils ,Via NO.= 26)

+1.5V

(2A,80mils ,Via NO.= 4)

+0.75VS

1

0.75Volt +/- 5%
TDC 0.525A
Peak Current 0.75A
OCP Current 0.9A

+0.75VSP

1

PC93

2

10U_0805_6.3V6M

1

PC97

0.033U_0402_16V7K

2

+1.5VP

D

C

B

A

19

18

BOOT

S5

7

8

EN_0.75VSP

1

PC101

2

@0.1U_0402_10V7K

2

+1.5VP

1

+1.5VP

1

2

1

PC92

2

10U_0805_6.3V6M

PC99
.1U_0402_16V7K

20

PU12

21

VTT

PAD

VLDOIN

1

VTTGND

2

VTTSNS

3

GND

4

VTTREF

VTTREF_1.5V

5

VDDQ

S3

FB

6

PR105

10.2K_0402_1%

2

PR106
10K_0402_1%

1

2

FB_1.5V

PR100

1

2.2_0402_5%

PR104

1

2

PR101

1

0_0402_5%

18.7K_0402_1%

2

1

2

3

BOOT_1.5V

2

PR102

1

1U_0603_10V6K

PC96
1U_0603_10V6K

EN_1.5V

SW_1.5V

DL_1.5V

PC94

1

VDD_1.5V

0.75VR_EN44

2

CS_1.5V

2

+5VALW

1.5V_B+

SUSP#9,32,38,44,49,50,56

DH_1.5V

15

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

887K_0402_1%

PR107

1

2

17

16

UGATE

PHASE

RT8207MZQW_WQFN20_3X3

TON

PGOOD

9

10

TON_1.5V

2

PR109

2

1

@0_0402_5%

PR110

1

0_0402_5%

4

BST_1.5V

DH_1.5V_1

PC90

@4.7U_0805_25V6-K

1

1

SYSON32,38,39,44

5

PQ21

MDV1528URH 1N PDFN33-8

4

3

2

5

PQ22

4

AON7702L_DFN8-5

3

2

2

1

PR108

0_0402_5%

1

PC91

0.22U_0402_10V6K

+5VALW

2

5.1_0603_5%

1

PC100

2

@0.1U_0402_10V7K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/10/31

2011/10/31

2011/10/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2012/12/31

2012/12/31

2012/12/31

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

Friday, August 24, 2012

Friday, August 24, 2012

Friday, August 24, 2012

52 60

of

52 60

of

52 60

1

of

BCustom

BCustom

BCustom

D

C

B

+5VALW

5

PL19

2

1

HCB1608KF-121T30_0603

4

+3VS

1

PR112

100K_0402_5%

2

SA_PGOOD38

PR114

10_0402_1%

2

PU13

19

20

21

22

23

24

1

18

V5DRV

PGND

PGND

PGND

TPS51461RGER_QFN24_4X4

VIN

VIN

VIN

GND

1

2

PR121

10K_0402_5%

2

PC102

1

1U_0603_10V6K

+VCCSA_V5FILT

17

15

14

16

VID1

V5FILT

PGOOD

VREF

SLEW

COMP

2

4

3

5

+VCCSA_COMP

+VCCSA_SLEW

1

2

1

PC117

0.01U_0402_25V7K

+5VALW

PC103

2.2U_0603_10V7K

2

1

1

PC111

PC110

0.1U_0402_25V6

2

2200P_0402_50V7K

2

2

2

PC113

PC112

1

1

1

10U_0805_10V6M

10U_0805_10V6M

+VCCSA_PWR_SRC

PC115

2

1

3300P_0402_50V7K

2

PC116

+VCCSA_VREF

1

+VCCSA_COMP1

0.22U_0402_10V6K

3

The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability.

PR111

1K_0402_5%

2

1

H_VCCSA_VID1 9

H_VCCSA_VID0 9

PR113

1K_0402_5%

2

1

PR115

0_0402_5%

1

2

PC104

@0.1U_0402_10V7K

+VCCSA_BT

+VCCSA_PHASE

PR118

2

@33K_0402_5%

1

1

1

PR116

2.2_0603_5%

2

+VCCSA_BT_1

13

EN

VID0

MODE

VOUT

6

+VCCSA_MODE

+VCCSA_VOUT

BST

SW

SW

SW

SW

SW

TP

+VCCSA_EN

12

11

10

9

8

7

25

2

PC105

0.22U_0603_10V7K

1

1

4.7_1206_5%

2

SNUB_VCCSA

1

1000P_0402_25V8J

2

+1.05VSP_PWRGOOD 44,50

2

0.47UH_PCMB042T-R47MN_6A_20%

1

PR117

PC114

2

VID [0] VID[1] VCCSA Vout
0 0 0.9V
0 1 0.8V
1 0 0.725V
1 1 0.675V

output voltage adjustable network

+VCC_SAP
TDC 4.2A
Peak Current 6A
OCP current 7.2A

PL18

2

PC106

22U_0805_6.3V6M

2

1

PR119

100_0402_5%

2

PR120

0_0402_5%

2

2

PC107

1

22U_0805_6.3V6M

1

1

2

2

PC109

1

PC108

1

22U_0805_6.3V6M

22U_0805_6.3V6M

+VCCSA_SENSE 9

1

D

C

+VCCSAP

B

PJP14

2

1

+VCCSAP

PAD-OPEN 4x4m

A

5

+VCCSA

(6A,240mils ,Via NO.= 12)

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

4

3

2011/10/31

2011/10/31

2011/10/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

2012/12/31

2012/12/31

2012/12/31

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

Friday, August 24, 2012

Friday, August 24, 2012

Friday, August 24, 2012

1

53 60

of

53 60

of

53 60

of

BC

BC

BC

1

PH3

100K_0402_1%_TSM0B104F4251 RZ

54 60Friday, August 24, 2012

54 60Friday, August 24, 2012

54 60Friday, August 24, 2012

D

C

B

A

B

B

B

of

of

of

PR134 6.98K_0402_1%

2

1

SW1A

PC131

2

1

0.22U_0402_10V6K

PC135

2

1

0.22U_0402_10V6K

PC136

2

1

2.2U_0603_10V7K

PR148

2

1

PC138

2

1

0.22U_0402_10V6K

1

1

PR155

6.98K_0402_1%

PC142

0.047U_0402_16V7K

2

1

1

PR159

PC147

6.98K_0402_1%

0.047U_0402_16V7K

2

SW1

SW2

2

CSCOMPA

2

SW2

2

SW1

+5VS

PC123

1

1000P_0402_50V7K

DROOPA

TSENSEA

1

PR136

2

8.25K_0402_1%

PUT COLSE
TO V_GT
HOT SPOT

TSENSE

1

PR160

2

8.25K_0402_1%

PUT COLSE
TO VCORE
HOT SPOT

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

SW1A 4 3

SW2 43

SW1 43

PR128

1

1K_0402_1%

2P: 1.65K
1P: 1K

2

2

CSREFA

2

1

2

PH4

100K_0402_1%_TSM0B104F4251 RZ

1

4019IE

4019IE

4019IE

3

PC119

2

2

2

PR124

PC126

2

FBA

TRBSTA#

COMPA

DIFFA

56

58

59

57

VSNA

VSPA

DIFFA

TRBSTA#

NCP6132AMNR2G_QFN60_7X7

<BOM Structure>

TRBST#

IOUT

FB

COMP

20

19

17

18

DROOP

COMP_CPU

ILIM_CPU

IMONIMON

2

1

1

2

1

PC150

2

1

PC120

1200P_0402_50V7K

1

PC121

330P_0402_50V7K

2

165K_0402_1%

2

1

PR133

SW1A

2

63.4K_0603_1%

2

PC128
1000P_0402_50V7K

1

PR135

1

ILIMA

DROOPA

IMONAIMONA

53

55

54

FBA

IOUTA

COMPA

ILIM

DROOP

CSCOMP

21

23

22

PR153 12.4K_0402_1%

CSCOMPCSCOMPCSCOMPCSCOMPCSCOMPCSCOMP

75K_0402_1%

.1U_0402_16V7K

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

15.8K_0402_1%

+5VS

CSP1A

CSREFA

CSCOMPA

CSSUMA

TSENSEA

47

51

48

50

49

52

46

ILIMA

CSP1A

CSP2A

CSREFA

CSSUMA

DROOPA

CSCOMPA

TSNS

CSP2

DRVEN

CSP1

CSSUM

CSREF

CSP3

28

26

29

27

24

25

TSENSETSENSE

CSP1

CSP2

3P: 21K
2P: 12.4K

2

PC146
1000P_0402_50V7K

1

PC149

1

CSSUM

1200P_0402_50V7K

1

2

1

PR166

NTC_PH201

PH5

2

1

220K_0402_5%_ERTJ0EV224J

Issued Date

Issued Date

Issued Date

TSNSA

PWMA

BSTA

HGA

SWA

LGA

BST2

HG2

SW2

PVCC

PGND

SW1

BST1

PWM

30

1

2

PC130

1

.1U_0402_16V7K

LG2

LG1

HG1

PC140

.1U_0402_16V7K

2

PC151
330P_0402_50V7K

1

2

PR127

75K_0402_1%

1

1

PR130

NTC_PH203

CSREFA 43

2

45

44

43

42

BSTA1

41

40

39

38

BST2

37

36

35

34

6132P_VCCP

33

32

31

BST1

2

1

PR152

41.2K_0402_1%

2

+5VS

CSREF 43

3P: 1500p
2P: 1200p

1

PR167

165K_0402_1%

2011/10/31 2012/12/31

2011/10/31 2012/12/31

2011/10/31 2012/12/31

3P: 73.2K
2P: 41.2K

2

2

1

26.1K_0402_1%

HG1A 43

LG1A 43

HG2 43

LG2 43

LG1 43

HG1 43

PUT COLSE

PH2

TO GT

220K_0402_5%_ERTJ0EV224J

Inductor

PC127

CSREFA

2

0.047U_0402_16V7K

1

CSP1A

PR137

2

2P: 36K
1P: 26.1K

PR139

2

1

2.2_0603_5%

BSTA1_1

1

PR143

2.2_0603_5%

BST2_1

1

PR149

2.2_0603_5%

BST1_1

CSP2

CSREF

CSP1

CSREF

2

1

PR163

169K_0603_1%

1

PR165

169K_0603_1%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2

0_0402_5%

2

2

1

@10.7K_0402_1%

CPU_B+

PR151
10K_0402_5%

PC145

1

680P_0402_50V7K

2

2

DROOP

CSP1A

PR126

VR_ON2 9

PR147 1K_0402_1%

1

49.9_0402_1%

2

FB_CPU2

PC148

4

2

PR129

1

10_0402_1%

1

PR131

1K_0402_1%

+5VS

PR145

95.3K_0402_1%

1

1

1

PC139
1000P_0402_50V7K

2

PR156

2

FB_CPU1

1

2

4700P_0402_25V7K

PC152

1

1000P_0402_50V7K

2

FBA2

2

1

2.2U_0603_10V7K

2

2

PC137

1

PR154

1K_0402_1%

1000P_0402_50V7K

PR162

1

9.53K_0402_1%

3P: 3.65K
2P: 9.53K

2

CSREF

DIS only:
All AXG components are @.
Except
PR272 and PR273 are 0ohm.
PC223, PC226, PR202 are 0ohm.
PC220, PC215, PR206 are 0ohm.

2P: 24K

PC124

1

330P_0402_50V7K

1

PR138

2_0603_5%

PC134

2

PR142

1

0_0402_5%

PR146

1

10K_0402_1%

1

2

0.01U_0402_25V7K

2

PC143

1

2

2

2

6132_VCC

2

VR_ON_CPU

2

VBOOT

DIFF_CPU

2

3P: 6.04K
2P: 4.32K

1P: 24.9K

PR132

1

5.11K_0402_1%

2P: 21.5K
1P: 15.8K

1000P_0402_50V7K

VR_SVID_DAT1

VR_SVID_ALRT#

VR_SVID_CLK

ROSC_CPU

VRMP

VR_HOT#

VGATE

3P: 22p
2P: 10p

PR157

2

4.32K_0402_1%

COMP_CPU1

3P: 2200p
2P: 3300p

3P: 23.7K
2P: 24.9K

PC125

1

10P_0402_50V8J

2

PC129

2

10P_0402_50V8J

1

2

COMPA1

2

1

PU14

1

VCC

2

VDDBP

3

VRDYA

4

EN

5

SDIO

6

ALERT#

7

8

SCLK

VBOOT

9

ROSC

10

VRMP

11

VRHOT#

12

VRDY

13

VSN

14

VSP

15

DIFF

PC141

1

PR164

PUT COLSE
TO VCORE
Phase 1
Inductor

1

.1U_0402_16V7K

1

24.9K_0402_1%

1

3300P_0402_25V7K

61

60

PAD

16

TRBST#

FB_CPU

PC144

2

3300P_0402_50V7K

2

1

24.9K_0402_1%

5

1

PR122 @0_0402_5%

@10_0402_1%

+1.05VS_VCCP

2

PR140

1

.1U_0402_16V7K

1

PR150
75_0402_1%

2

1

PR123

1

@1.21K_0402_1%

130_0402_1%

VGATE14,2 9

TRBST#

+5VS

FBA and COMPA are short.
CSCOMPA, CSSUMA, DROOPA are short.

2

1

PC118

@680P_0402_50V7K

2

FBA3

2

1

PR125

PC122

FBA1

2

@4700P_0402_25V7K

1

2

PC133

2

.1U_0402_16V7K

PR141

0_0402_5%

54.9_0402_1%

1

2

1

PR144

VR_SVID_DAT1

+3VS

1

2

3P: 330p
2P: 1000p

PR158

2

1

10_0402_1%

FB_CPU3

PR161

1

1.21K_0402_1%

3P: 348
2P: 1.21K

PR168

1

CSCOMP

1K_0402_1%

3P: 806
2P: 1K

CSP1A, CSP2A to +5VS.

LGA, SWA, HGA, BSTA, DIFFA, TRBSTA#, ILIMA, PWMA are float.

D

C

B

A

VSPA, VSNA to GND (HW side).
CSREFA, TSNSA, IOUTA to GND.

TRBSTA#

VCC_AXG_SENSE9

VSS_AXG_SENSE9

1

PC132

2

VR_SVID_DAT8

VR_SVID_ALRT#8

VR_SVID_CLK8

+1.05VS_VCCP

VR_HOT#29

VSSSENSE8

VCCSENSE8

5

4

3

2

1

5

4

3

2

1

1

CSREF

of

of

of

D

C

B

A

B

B

B

D

CPU_B+

+VCC_CORE

2

PR173

2

10_0402_1%

B+

100U_25V_M

1

SW1

PC162

DC 35W GT2
VID1=1.23V
IccMax=33A
Icc_Dyn=20.2A
Icc_TDC=21.5A
R_LL=3.9m ohm
OCP~40A

5

PR169

2

1

0_0603_5%

S TR MDU1512RH 1N POWERDFN56-8

GFX_B+

5

4

PQ27

S TR MDU1516URH 1N POWERDFN56-8

3

2

1

5

PQ28

4

S TR MDU1512RH 1N POWERDFN56-8

3

2

1

HG1_1

PQ25

HG142

SW142

LG142

C

PR175

2

1

HG1A_1

0_0603_5%

HG1A42

SW1A42

B

LG1A42

A

4

S TR MDU1516URH 1N POWERDFN56-8

3

2

1

5

4

3

2

1

PC167

1

PR176

@4.7_1206_5%

2

SNUB_GFX1

1

PC172

@680P_0402_50V7K

2

PQ23

1

2

10U_0805_25V6K

0.36UH 20% FDUM0640J-H-R36M

PC168

1

2

10U_0805_25V6K

1

PC153

1

PC169

2

0.1U_0402_25V6

PL24

<BOM Structure>

1

2

@820P_0402_25V7

1

PC170

2

2200P_0402_25V7K

2

1

1

PC155

PC154

2

2

10U_0805_25V6K

10U_0805_25V6K

1

2

SNUB_CPU1

PL30

HCB2012KF-121T50_0805

2

1

PC171

2

@820P_0402_25V7

2

PR177

10_0402_1%

SW1A

1

1

PC156

2

PC160

0.1U_0402_25V6

2

2200P_0402_25V7K

PL22

0.36UH 20% FDUM0640J-H-R36M

1

<BOM Structure>

PR171

@4.7_1206_5%

1

PC165

@680P_0402_50V7K

2

1

+GFX_CORE

1

CSREFA 42

B+

PL20

HCB2012KF-121T50_0805

2

1

PL21

HCB2012KF-121T50_0805

2

1

+

2

CSREF 42

1

1

+

PC163

@100U_25V_M

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

CPU_B+

PR170

1

HG242

0_0603_5%

SW242

LG242

S TR MDU1512RH 1N POWERDFN56-8

QC 45W CPU
VID1=0.9V
IccMax=94A
Icc_Dyn=66A
Icc_TDC=52A
R_LL=1.9m ohm
OCP~110A

Compal Secret Data

Compal Secret Data

Compal Secret Data

2011/10/31 2012/12/31

2011/10/31 2012/12/31

2011/10/31 2012/12/31

2

HG2_1

PQ26

Deciphered Date

Deciphered Date

Deciphered Date

5

4

3

2

5

4

3

2

1

PQ24

S TR MDU1516URH 1N POWERDFN56-8

1

DC 35W CPU
VID1=1.05V
IccMax=53A
Icc_Dyn=43A
Icc_TDC=36A
R_LL=1.9m ohm
OCP~65A

CPU_B+

1

1

PC157

PC158

2

2

10U_0805_25V6K

PC161

@820P_0402_25V7

1

PR172

@4.7_1206_5%

2

SNUB_CPU2

1

PC166

@680P_0402_50V7K

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

1

1

1

PC164

2

PC159

2

10U_0805_25V6K

2

0.1U_0402_25V6

2200P_0402_25V7K

+VCC_CORE

PL23

0.36UH 20% FDUM0640J-H-R36M

2

1

<BOM Structure>

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

PR174

2

10_0402_1%

SW2

55 60Friday, August 24, 2012

55 60Friday, August 24, 2012

55 60Friday, August 24, 2012

5

4

3

2

1

Compal Electronics, Inc.

PBL22 LA-7391P M/B

5

4

3

2

1

D

C

B

+VCC_CORE

1

PC173
10U_0805_6.3V6M

2

1

PC178
10U_0805_6.3V6M

2

+VCC_CORE

1

PC191
22U_0805_6.3V6M

2

1

PC211
22U_0805_6.3V6M

2

1

PC221
22U_0805_6.3V6M

2

+VCC_CORE

1

+

PC227

470U_D2_2VM_R4.5M

2

1

PC174
10U_0805_6.3V6M

2

1

PC179
10U_0805_6.3V6M

2

1

PC192
22U_0805_6.3V6M

2

1

PC212
22U_0805_6.3V6M

2

1

PC222
22U_0805_6.3V6M

2

1

+

PC228
330U_D2_2V_Y

2

1

PC175
10U_0805_6.3V6M

2

1

PC180
10U_0805_6.3V6M

2

1

PC193
22U_0805_6.3V6M

2

1

PC213
22U_0805_6.3V6M

2

1

PC223
22U_0805_6.3V6M

2

1

+

PC229
330U_D2_2V_Y

2

1

PC176
10U_0805_6.3V6M

2

1

PC181
10U_0805_6.3V6M

2

1

PC194
22U_0805_6.3V6M

2

1

PC214
22U_0805_6.3V6M

2

1

PC224
22U_0805_6.3V6M

2

1

+

PC230
330U_D2_2V_Y

2

+VCC_CORE

1

PC177
10U_0805_6.3V6M

2

1

PC182
10U_0805_6.3V6M

2

1

PC195
22U_0805_6.3V6M

2

1

PC215
22U_0805_6.3V6M

2

1

PC225
22U_0805_6.3V6M

2

1

PC226
22U_0805_6.3V6M

2

+GFX_CORE

22U_0805_6.3V6M

1

PC183

1

2

2

22U_0805_6.3V6M

PC207

1

1

2

2

330U_D2_2V_Y

1

330U_D2_2V_Y

PC219

+

2

+GFX_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

PC184

22U_0805_6.3V6M

PC185

PC186

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

PC209

PC208

1

PC210

1

2

2

1

PC220

+

2

Below is 458544_CRV_PDDG_0.5 Table 5-8.

5 x 22 µF (0805)

Socket Bottom

22U_0805_6.3V6M

PC187

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

PC188

PC189

1

1

PC190

1

2

2

2

Socket Top

22U_0805_6.3V6M

1

PC196

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

PC197

1

PC198

2

2

5 x (0805) no-stuff
sites

7 x 22
2 x (0805) no-stuff
sites

22U_0805_6.3V6M

22U_0805_6.3V6M

1

+1.05VS_VCCP

1

PC200

PC199

2

2

1

2

22U_0805_6.3V6M

PC201

µF (0805)

22U_0805_6.3V6M

1

1

PC202

2

2

22U_0805_6.3V6M

PC217

1

2

+1.05VS_VCCP

22U_0805_6.3V6M

22U_0805_6.3V6M

1

PC204

PC203

2

330U_D2_2V_Y

1

330U_D2_2V_Y

PC216

+

2

D

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

PC205

PC206

2

2

1

PC218

+

2

C

B

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2011/10/31 2012/12/31

2011/10/31 2012/12/31

2011/10/31 2012/12/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

4019IE

4019IE

4019IE

56 60Friday, August 24, 2012

of

56 60Friday, August 24, 2012

of

56 60Friday, August 24, 2012

of

1

A

B

B

B

D

C

B

A

OPT@

PC241

1

1000P_0402_50V7K

PR202

0_0402_5%

+VGA_CORE

1

2

1

2

1

2

5

VGA_PWROK<14,17,45>

1

PR193

@

68K_0402_1%

2

1

PC242

OPT@

220P_0402_50V7K

1

PR196

OPT@

1K_0402_1%

Avoid high dV/dt

2

2

PR203
0_0402_5%

1

1

OPT@

OPT@

VSSSENSE_VGA

VCCSENSE_VGA

Under VGA Chip

1

1

PC257

PC256

2

2

PC255

OPT@

OPT@

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

OPT@

4.7U_0603_6.3V6M

1

1

PC275

2

PC274

2

PC273

OPT@

4.7U_0603_6.3V6M

OPT@

4.7U_0603_6.3V6M

OPT@

4.7U_0603_6.3V6M

1

1

PC280

PC282

PC281

2

2

0.1U_0402_10V7K

OPT@

0.1U_0402_10V7K

OPT@

0.1U_0402_10V7K

OPT@

5

2

1

1

1

PC234

2

2

PC235

2

4700P_0402_25V7K

OPT@

4.7U_0805_25V6M

OPT@

OPT@

0.22UH_PCMB104T-R22MS_35A_20%

1

PR195

4.7_1206_5%

PC247

680P_0603_50V7K

470U_D2_2VM_R4.5M

+3VL

OPT@

0.1U_0603_25V7K

PWR_GPS_DOWN#<41>

GPU Skin temperature prot ection:

Requlator temperature pro tection:

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

PL31

OPT@

1

PC238

2

0.1U_0402_25V6

OPT@

2200P_0402_50V7K

1

2

3

4

HCB2012KF-121T50_0805

1

1

+

PC245

2

OPT@

470U_D2_2VM_R4.5M

PR741

OPT@

14.7K_0402_1%

2

1

PU701

OPT@

8

TMSNS1

VCC

7

RHYST1

GND

6

TMSNS2

OT1

5

OT2

RHYST2

G718TM1U_SOT23-8

Protection at 105 degree C

Recoveyr at 85 degree C

Protection at 105 degree C

Recoveyr at 85 degree C

Title

Title

Title

Size Document Number Re v

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

+VGA_B+

1

PC237

PC236

2

4.7U_0805_25V6M

OPT@

OPT@

PL32

2

1

PC716

2

2012/12/31

2012/12/31

2012/12/31

MDU1516URH 1N POWERDFN56-8

PC240

OPT@

0.22U_0603_25V7K

1

2

1

+5VS

PC243

2.2U_0603_10V6K

1

PR205
124K_0402_1%

2

+VGA_CORE

3

PQ32 MDU1516URH 1N POWERDFN56-8OPT@

OPT@

2

OPT@

2

150K_0603_1%

5

PQ33

4

3

2

1

5

4

3

2

1

1

PR206

OPT@

5

4

3

2

1

5

4

PQ34

3

MDU1511RH 1N POWERDFN56-8

OPT@

1

1

2

2

PQ35

2

1

MDU1511RH 1N POWERDFN56-8

OPT@

Near VGA Core

1

+

PC252

2

OPT@

1

1

PC260

2

PC261

2

OPT@

22U_0805_6.3V6M

OPT@

22U_0805_6.3V6M

1

1

PC268

2

PC502

2

OPT@

4.7U_0603_6.3V6M

OPT@

47U_0805_6.3V6M

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.

3

1

1

+

PC254

2

OPT@

470U_D2_2VM_R4.5M

1

1

PC262

2

2

OPT@

22U_0805_6.3V6M

1

1

PC269

2

PC270

2

OPT@

4.7U_0603_6.3V6M

OPT@

1

+

+

PC288

PC289

2

@

2

OPT@

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

1

PC264

2

PC263

OPT@

22U_0805_6.3V6M

OPT@

22U_0805_6.3V6M

1

1

PC272

2

PC271

2

OPT@

4.7U_0603_6.3V6M

OPT@

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

2011/10/31

2011/10/31

2011/10/31

4

<21>

<21>

<21>

<21>

<21>

1

2

3

4

5

6

7

8

PR199

80.6K_0402_1%

OPT@

PR207

1K_0402_1%

2

100P_0402_50V8J

1

2

PC233

OPT@

3211_EN

32

EN

PWRGD

IMON

CLKEN#

FBRTN

FB

COMP

GPU

ILIM

IREF

9

3211_IREF

3211_RPM

2

2

PR200

1

200K_0402_1%

1

OPT@

1

3211_RAMP-1

OPT@

1000P_0402_50V7K

<21>

GPU_VID4

GPU_VID3

GPU_VID2

GPU_VID1

GPU_VID0

2

2

2

2

2

PR184 0_0402_5%OPT@

PR183 0_0402_5%OP T@

1

1

PR185 0_0402_5%OPT@

PR186 0_0402_5%OPT@

1

1

1

VID4

VID3

VID2

VID1

VID0

27

28

29

30

31

VID4

VID3

VID2

VID1

VID0

ADP3211AMNR2G_QFN32_5X5

PU15

OPT@

CSREF

LLINE

RAMP

RT

RPM

14

13

12

11

10

2

3211_RT

3211_RAMP

1

PR201

1

274K_0402_1%

OPT@

PR204

2

499K_0402_1%

OPT@

1

1

2

PC250

2

1

OPT@

PR209
0_0402_5%

2

3211_CSCOMP

4

GPU_VID5

2

2

PR188 0_0402_5%OPT@

1

PR187 0_0402_5%OPT@

PR189 0_0402_5%OPT@

1

VID6

VID5

25

26

VID6

VID5

DRVH

PVCC

PGND

AGND

AGND

CSCOMP

CSFB

16

15

3211_CSFB

3211_CSCOMP

PC251
1000P_0402_50V7K

PR208

@

0_0402_5%

2

24

VCC

23

BST

22

21

SW

20

19

DRVL

18

17

33

1

OPT@

PC248

2

1200P_0402_50V7K

OPT@

Shortest the
net trace

1

+5VS

3211_VCC

CPU_BOOST

3211_DRVH

3211_SW

3211_DRVL

2

PR190
10_0603_1%

1

OPT@

1

2

OPT@

1

2

PC239
1U_0805_25V6K

1

OPT@

OPT@

PR194
0_0603_5%

2

CPU_BOOST-1

OPT@

PC249
820P_0402_50V7K

<14,16,38>

DGPU_PWR_EN

PR809

SUSP#45,53

2

0_0402_5%

OPT@

OPT@

2

2

1

2

PC246

OPT@

470P_0402_50V8J

<23>

<23>

1

1

1

PC259

2

2

PC258

2

OPT@

4.7U_0603_6.3V6M

OPT@

4.7U_0603_6.3V6M

1

1

1

PC276

PC277

2

2

2

OPT@

4.7U_0603_6.3V6M

OPT@

4.7U_0603_6.3V6M

1

1

1

PC283

2

PC284

2

2

0.1U_0402_10V7K

OPT@

0.1U_0402_10V7K

OPT@

1

PR192

0_0402_5%

2

2

3211_COMP-1

PC265

OPT@

4.7U_0603_6.3V6M

PC278

OPT@

4.7U_0603_6.3V6M

1

2

PC285

0.1U_0402_10V7K

OPT@

OPT@

47P_0402_50V8J

OPT@

1

2

1

2

PR808

@

2

1

0_0402_5%

10K_0402_1%

+3VS

OPT@

1

3211_PWRGD

1

PC244

3211_FB

2

1

3211_COMP

2

PR197

20K_0402_1%

2

PR198

OPT@

4.53K_0402_1%

1

3211_CSCOMP

+VGA_B+

Connect to input caps

1

PC266

PC267

2

OPT@

4.7U_0603_6.3V6M

OPT@

4.7U_0603_6.3V6M

PC279

OPT@

4.7U_0603_6.3V6M

1

PC286

PC287

2

0.1U_0402_10V7K

OPT@

0.1U_0402_10V7K

OPT@

1

PR191

2

3211_VCC

3211_ILIM

OPT@

1

2

B+

+VGA_CORE

2

1

PH702

OPT@

100K_0402_1%_NCP15WF104 F03RC

2

1

1

PR743

@

10.5K_0402_1%

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Friday, August 24, 2012

Friday, August 24, 2012

Friday, August 24, 2012

2

OPT@

PR742

10.5K_0402_1%

1

2

2

PH703

@

1

100K_0402_1%_NCP15WF104F03RC

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

4019IE

4019IE

4019IE

1

PR744

OPT@

+3VL

14.7K_0402_1%

57 60

57 60

57 60

D

C

B

A

BC

BC

BC

of

of

of

5

Page# Title

Item

Item Issue Description

Page#Page#

ItemItem

1 Page 47

D

Page 57

2

Title

TitleTitle

Date

DateDate

2012/02/24

2012/02/24

4

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Request

Request

RequestRequest
Owner

Owner

OwnerOwner

For DVT can't power on and need to disa ble EC VCIN0_PH
VCIN1_PH pin detect

3D mark06&3D mark Vantage score don't m eet SPEC need to
support GPS f unction

Issue DescriptionDate

Issue DescriptionIssue Description

3

Page 1

Page 1

Page 1Page 1

Reserve PR20 PR21 for DVT can't power on issue

Add PC288 PC2 89 470U_D2_2V M_R4.5M
PC248 1200P_0402_5 0V7K
PR209 0_0402_5%
Change PC242 to 220P_0402_ 50V7K
PC246 to 470P _0402_50V8J
PC244 to 47P_ 0402_50V8J
PR197 to 20K_ 0402_1%
PR198 to 4.5 3K_0402_1%
PC249 to 820 P_0402_50V7K
PR205 to 124 K_0402_1%
PR206 to 150 K_0603_1%
Delete PR208 0_0402_5%

2

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

1

Rev.Page#

Rev.Rev.

PVT

D

PVT

3

C

4

5

6

7

B

8

9 Page 47

10 Page 47

11

A

Page 49

Page 57

Page 47

Page 48

Page 48

Page 47

49

Page 47
48,50,51
52,53,54
57

2012/02/24 Fo r DVT SMT PC5 6, PC57 footp rint did not ma tch issue Change PC56,PC57 f ootprint from D2 to C_6SVPE2 20MX

3D mark06&3D mark Vantage score don't m eet SPEC need to

2012/02/24

2012/02/24

2012/02/27 Up date Green po wer Circuit

2012/03/02

2012/03/06

2012/03/06

2012/04/23

2012/04/23 Ch ange to new f ootprint

5

support GPS f unction

Change PH1 pr otect action to EC Change PH1 pu ll high vcc f rom +3VL to + EC_VACC

Update Green power Circuit

Add one contr ol signal in order to disa ble B+ to VSB
circuit in AC S5 for LOT6 system little than 0.5W issue

For System ca n power on im mediately aft er HW shutdown C hange PU1.3 o utput name fr om EN0 to MAI NPOWN

For EU Erp lo t6 fail, need to cut off + VSB when system
at S5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2011/10/31 2012/12/31

2011/10/31 2012/12/31

2011/10/31 2012/12/31

3

Reserve GPU S kin and Requl ator temperat ure protection c ircuit
for if temper ature over sp ec issue
Add PC716 S E042104K80 0 .1U_0603_25V7 K
PR74 1,PR744 SD03 4147280 14.7 K_0402_1%
PR74 2 SD03410528 0 10.5K_0402 _1%
PH70 2 SL200000U0 0 100K_0402_ 1%_NCP15WF104F03 RC

Change PH1 GN D from normal GND to EC_AG ND

Delete PU7 74 LVC1G17GW TSS OP and change to PQ109 SSM3K7 002FU_SC70-3
Add PR10 0_04 02_5% to conn ect GREEN_LAT CH#
Reserve PR178 0_0402_5%

Connect the G reen_PWR4 net to EC GPIO f or AC decete for Green power
circuit ACOK will drop onc e time issue

Reserve PR22 to add VSB_EN

Dis-connect E N0 to PU8.13
Connect MAINP OWN to PQ18.2

Add PR22, del ete PR14,PR15

ChangePR56,PR 80,PR92,PR95, PR108,PR110,P R115,PR120,PR142 ,PR144,PR183,
PR184,PR185,P R186,PR187,PR 188,PR189,PR1 92,PR809 footpri nt
from R_0402 to R0402_0ohm

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

4019IE

4019IE

4019IE

1

58 60Friday, August 24, 2012

58 60Friday, August 24, 2012

58 60Friday, August 24, 2012

PVT

PVT

PVT

PVT

PVT

PVT

Pre_MP

Pre_MP

of

of

of

C

B

A

B

B

B

5

4

3

QAQ1x HW PIR from EVT to DVT LA-8581P REV:0.1 -> 0.2 <2011.12.05~2012.01.02. >

Item ImpactDateRev. Modify DescriptionChange Cause

0.2 1

D

C

12/05 Sourcer require to change crystal to small size.

Circuit, Layout, BOM 37

2

12/21 Circuit, Layout EVT can't power on issue. Change R739 pull up power source from "+3VALW" to "+3VALW_EC".

3

12/21 Circuit, Layout Vpro require PCIE port1 can't connect to LAN.26,35,42,36 Swap PCH PCIE port1 and port5.

4

12/21 Circuit, BOM 43 SW7, SW8 part number error. change SW7,SW8 part number to "SN100005G00"

5

12/21 BOM 27 just reserve pull up resistor for SLP_LAN#. Add @ to R282.

6

12/26 BOM 34 TPM IC FW update from FW3.16 to FW 3.19. Change U37 from "SA00000GG40" to "SA00000GG70".

7

12/26 33 Add Vpro & non-Vpro WIN8 BIOS ROM power source selection. Add R421, R422.

Circuit, BOM

8

01/05 40, 43 issue: redetect USB HDD when resume from S3. Add @ to RU27, delete @ to R90; add @ to R9, delete @ to R10.BOM

9

01/05 BOM

10

01/09 40 LID_SW# will cause system can't power on at DC mode if use +3VALW, not +3VL. Change U34 Pin2 VDD from +3VALW to +3VL if EC use +3VL.Circuit, layout

11

01/09 Circuit, layout,BOM 43 PWR ON LED will flash when doing Crisis. Add a pull down resistor R169 100K to PWR_ON_LED; Reserve a 0ohm resistor R93.

12

01/09 Circuit, layout,BOM 36 DVT will build Vpro SKU, delete EC port80 debug signals to WLAN connector. Delete R684, R1336 and the EC port80 debug signals to WLAN connector.

13

01/09 Circuit, layout,BOM No need reserve VGA HDMI connection. Change PCH net "DGPU_HPD_INT#" to PCH_GPIO6;

14

01/10 Circuit, layout 37,35,26,42 BIOS prefer LAN connect to PCIE port6 for Vpro. Sw ap PCIE port5 and port6 connection.

15

01/10 BOM 33, Distinguish with Vpro SKU. Change UPCH1 and U59 BOM Structure to "8111E@" for non-Vpro SKUs.

16

01/11 43 +USB_VCCE no bulk capacitor. Change C2,C7,C8 power source from +USB_VCCB to +USB_VCCE.Circuit, layout

17

01/11 41Circuit, layout power CPU OTP issue, and power modified schematic. Delete net EC pin27 "PWR_GPS_DOWN#" and EC pin 76 "PWRMOS_TEMP", delete R732.

Page

Change X1 from "SJ100009A00" to "SJ10000EV00"

41

41 Board ID issue Add "Rev02@", "Rev03@","Rev04@","Rev10@" serial Rb to distinguish the boards.

13,15
24

Delete U13,CV197,RV140,RV149,C430,C378,C455,C377,C376,C434,C456,C432,R432,R435,R443,Q65,R439,R437RV132,L88.

2

1

D

C

QAQ1x HW PIR from DVT to PVT LA-8581P REV:0.2 -> 0.3 <2012.02.24~2012.03.07. >

Item ImpactDateRev. Modify DescriptionChange Cause

0.3 1

B

A

02/24 LL1 and CL13 change after EVT, DVT schematic missed and used MEMO for change.

2

3

4

Circuit, BOM

BOM DVT board card reader JMB389 can't detect 4IN1 card. Delete R39 BOM structure "388@".

02/24

02/24 BOM

02/24

Circuit, layout,BOM 41,13 PVT add GPU GPS feature. Add R266 "@", R267 "@", R268 at Page13, add "@" to DV6.

5

6

02/24 Circuit, layout,BOM

7

02/24 BOM 35 UL5 BOM structure error with vPro SKU. Delete UL5 BOM structure "8111E@".

8

03/01 Circuit, layout,BOM 35 LAN vendor Realtek suggest:Reserve CLKREQ_LAN# pull up 10Kohm to +3V_LAN. Reserve CLKREQ_LAN# pull up 10Kohm to +3V_LAN: add RL25 and unmount it.

9

03/01 35 LAN vendor Realtek suggest:Reserve UL1 pin28 "EC_SWI#"pull up 10Kohm to +3V_LAN. Modify reserved resistor RL3 from 100Kohm to 10Kohm.

10

11

12

13

14

15

BOM

03/01 Circuit, layout,BOM 35

03/01 Circuit, layout,BOM

Circuit, layout,BOM03/01

03/02 Circuit, layout 41

03/05 BOM 26 Adjust crystal loading capacitors' value according to matching test result. Change Y3 from SJ10000DJ00 to SJ10000E800, C869 from SE071150J80 to SE071100J80, C225 from SE071120J80 to SE071100J80.

03/05 Circuit, layout,BOM 39 Refer to QAL50/51 design for smart card to add pull high to US4 pin26. Add RS22 10Kohm pull up to +3V_SC for US4 Pin26. and change reserved pull down resistor RS21 from 0ohm to 10Kohm.

5

Page

35

37

HDMI HPD signal level is too low for HDMI detection.27 Add "@" to RH142.

28 requirement from Sourcer and buyer. Change RP1, RP3 from row resistor "SD309820180" to single ones "SD028820180"-R320,R321,R322,R323,R324,R327,R329,R330.

LAN vendor Realtek suggest: 6pcs decoupling capacitor for UL1 Pin 12, 27, 39, 42, 47, 48. Add one more piece capacitor CL12 close to UL1.

4113Reserve and add pull up for added net of EC pin27,68. Reserve R732 10Kohm and add R733 100Kohm pull up to +3VS for EC pin27,68, add R734 0ohm for PWR_GPS_DOWN# connect to EC.

Reserve a 0ohm resistor for "GPS_DOWN#" to "PWR_GPS_DOWN#".

power circuit removed net "PWR_MOS_TEMP", added net "GREEN_PWR4".

13 Change YV1 from SJ10000DK00 to SJ100009700, CV46 and CV47 from SE071180J80 to SE071100J80.

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

Change LL1 from 4.7uH "SHI00004T00" to 2.2uH "SHI0000AA00". CL13 from 22uF "SE000000I10" to 4.7uF "SE107475K80".

Change net ACIN_BUF to GPS_DOWN#, add net PWR_GPS_DOWN#, EC_GPS_DOWN#, PWRMOS_TEMP.

Reserve a 0ohm resistor R270 for "GPS_DOWN#" to "PWR_GPS_DOWN#".

Remove net "PWR_MOS_TEMP", add net "GREEN_PWR4" to EC pin 76.

Change YL1 from SJ10000DJ00 to SJ10000E800, CL26 and CL27 from SE071270J80 to SE071120J80.35

Change C54 and C82 from SE071120J80 to SE071150J80; C766,C767 from SE071150J80 to SE071180J80.37,34

Compal Secret Data

Compal Secret Data

Issued Date

Issued Date

Issued Date

2006/02/13 2010/12/31

2006/02/13 2010/12/31

2006/02/13 2010/12/31

3

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

B

A

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

2

Date: Sheet

59 60Friday, August 24, 2012

59 60Friday, August 24, 2012

59 60Friday, August 24, 2012

1

B

B

B

of

of

of

5

4

3

QAQ1x HW PIR from DVT to PVT LA-8581P REV:0.2 -> 0.3 <2012.02.24~2012.03.07. >

Item ImpactDateRev. Modify DescriptionChange Cause

0.3 16

17

18

D

19

20

21

Circuit, BOM

03/06 BOM 31 PCH VCCDSW3_3 change power connection from +3VALW_PCH to +3VALW. Add "@" to R415, delete "@" to R382.

03/06 Circuit, layout, BOM 35,36,

03/06 Circuit, layout, BOM 25 Reserve big size crystal Y6 for 32.768KHz. Reserve big size crystal Y6 for 32.768KHz.

03/08 BOM 40,43 UU1 SA000047500 was forbidden, change material requirement from buyer. Change UU1 from SA000047500 to SA000033H00; Correct U6 description and value.

03/08 BOM 43,44 Change C4,C6 from SE053475Z05 to normal part SE053475Z80. Change C4,C6 from SE053475Z05 to normal part SE053475Z80.

Page

smart card device lost at USB 3.0 port.03/05

28,39

ErP lot 6 fail, reserve a EC pin VSB_EN to control VSB;
reserve LAN WAKE to EC and PCH GPIO27.

39,29
41,45

Change smart card reader from USB port 2 to port 5.

Delete reserved net AOAC_ON (EC pin 38) and DRAMRST_GATE (EC pin 98) and their test point T23,T24.
Use these two pins for new added net VSB_EN_R and EC_PME#

Reserve net GPIO27_WAKE#, EC_PME# for LAN WAKE, reserve net EC_PME# to WLAN, WWAN and PCIE Express card wake.
thus, add R702@, RH122@, RH171, R331@, RL8(8111E@),RL9@, RL10@, R100@, R102, R761@, R767@,R768@.

Reserve net VSB_EN, thus add R765@, R766, R817, R818@, R819@; delete R816@, add @ to R754.

2

1

D

QAQ1x HW PIR from PVT to Pre-MP LA-8581P REV:0.3 -> 1.0 <2012.04.18~2012.04.25. >

Item ImpactDateRev. Modify DescriptionChange Cause

1.0 1

2

3

C

4

5

6

7

8

9

B

A

Circuit, BOM,layout

04/19

04/19

BOM 25,34 Change 32.768KHz crystal P/N, and RTC capacitor C204 from 15pF to 18pF. Change Y2, X3 from SJ10000BM00 to SJ100001K00. change C204 from SE071150J80 to SE071180J80.

04/19

BOM 39 to solve issue of "Smart Card also show in Device Manager after plug out it". Change US4 from SA000042I00 to SA000042I10.

04/19

04/19

BOM 45,41 For ErP lot6, add +3VALW to +3VALW_PCH DC/DC circuit. Delete @ for U25, Q46, Q49, R813, C837, C839, C838, R804, C836, R807, R754.

BOM,layout04/20 cost down: change some 0ohm resistors to short pad. cost down: change some 0ohm resistors to short pad.

04/23 BOM 42 vPro: Intel suggest to change R1232 from 2.2K to 10K. vPro: change R1232@ from 2.2K to 10K.

04/23 42 vPro: Intel suggest to change C470 from 10uF to 22uF.BOM vPro: change C470 from 10uF to 22uF.

04/23 BOM 35 vPro: Intel suggest to change CL34 from 0.1uF to 1uF. vPro: change CL34 from 0.1uF to 1uF. keep CL34 0.1uF for 8111E LAN.

Circuit, BOM,layout04/23 42 vPro: Reserve LAN WAKE to EC. vPro reserve R559@ 0ohm for LAN WAKE connect to EC.

Circuit,layout04/25 35 T here is not enough space for LAN GND ESD diodes.

5

Page

Reserve +5VS for MOS Q10 gate of audio sync signal to PCH HDA sync signal.

25

Reserve 820Kohm resistor to GND for +3VALW_PCH and +1.05VS_DGPU DC/DC MOS GATE. Add 820Kohm R432@ and R435@.45Circuit,layout

EMI test OK without the two ESD diodes.

4

Add 0ohm 0402 resistor R189@ and R190.

Remove DL3@, DL4@.

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2006/02/13 2010/12/31

2006/02/13 2010/12/31

2006/02/13 2010/12/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

B

A

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

SCHEMATICS, MB A8581

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Custom

Custom

Custom

4019IE

4019IE

4019IE

Date: Sheet

Date: Sheet

2

Date: Sheet

60 60Friday, August 24, 2012

60 60Friday, August 24, 2012

60 60Friday, August 24, 2012

1

B

B

B

of

of

of