Compal NS-A031 Schematic

A
1 1
2 2
B
C
D
E
LCFC confidential
Schematics Document
NS-A031 ODD to VGA board schematic
3 3
2012-01-08
REV:1.0
4 4
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTUR E CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTUR E CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTUR E CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF LC FUTURE CENTER.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF LC FUTURE CENTER.
C
2012/07/01
2012/07/01
2012/07/01
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
2014/07/01
2014/07/01
2014/07/01
Title
ODD to VGA Board
ODD to VGA Board
ODD to VGA Board
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031NS-A031
NS-A031NS-A031
NS-A031NS-A031
Monday, March 18, 2013
Monday, March 18, 2013
Monday, March 18, 2013
1 16
1 16
1 16
E
1.0
1.0
1.0
A
1 1
B
C
D
E
SLI Connector
from NS-A031 M/B
PWM FAN Conn
Page 3
Page 3
PCI-Express 8X Gen3
2 2
PEG 8~15
2nd VGA
SPI ROM (VBIOS 256KB)
Page 5
SPI BUS
3.3V 33MHz
N14P-GT
GB4 128 Pin
VRAM 64*32
GDDR5* 8
Page 9,10,11,12
29mm*29mm
Page 4,5,6,7,8,9,10,11,12,13
3 3
4 4
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTUR E CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTUR E CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTUR E CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF LC FUTURE CENTER.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF LC FUTURE CENTER.
C
2012/07/01
2012/07/01
2012/07/01
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
2014/07/01
2014/07/01
2014/07/01
Title
Block Diagram
Block Diagram
Block Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031NS-A031
NS-A031NS-A031
NS-A031NS-A031
Tuesday, March 19, 2013
Tuesday, March 19, 2013
Tuesday, March 19, 2013
2 16
2 16
E
2 16
1.0
1.0
1.0
5
4
3
2
1
4
PCIE_CTX_GRX_N[0..15]
4
PCIE_CTX_GRX_P[0..15]
4
PCIE_CRX_C_GTX_N[0..15]
4
PCIE_CRX_C_GTX_P[0..15]
D D
B+
SLI
JSLI1
1
GND
3
NC
5
NC
7
NC
9
NC
11
NC
13
NC
15
NC
17
GND
PCIE_CTX_GRX_N15 PCIE_CTX_GRX_P15
C C
B B
PCIE_CTX_GRX_N14 PCIE_CTX_GRX_P14
PCIE_CTX_GRX_N13 PCIE_CTX_GRX_P13
PCIE_CTX_GRX_N12 PCIE_CTX_GRX_P12
PCIE_CTX_GRX_N11 PCIE_CTX_GRX_P11
PCIE_CTX_GRX_N10 PCIE_CTX_GRX_P10
PCIE_CTX_GRX_N9 PCIE_CTX_GRX_P9
PCIE_CTX_GRX_N8 PCIE_CTX_GRX_P8
PCIE_CRX_C_GTX_N15 PCIE_CRX_C_GTX_P15
PCIE_CRX_C_GTX_N14 PCIE_CRX_C_GTX_P14
PCIE_CRX_C_GTX_N13 PCIE_CRX_C_GTX_P13
PCIE_CRX_C_GTX_N12 PCIE_CRX_C_GTX_P12
PCIE_CRX_C_GTX_N11 PCIE_CRX_C_GTX_P11
PCIE_CRX_C_GTX_N10 PCIE_CRX_C_GTX_P10
PCIE_CRX_C_GTX_N9 PCIE_CRX_C_GTX_P9
PCIE_CRX_C_GTX_N8
PCIE_CRX_C_GTX_P8
19
PEG_RX_N7
21
PEG_RX_P7
23
GND
25
PEG_RX_N6
27
PEG_RX_P6
29
GND
31
GND
33
PEG_RX_N5
35
PEG_RX_P5
37
GND
39
PEG_RX_N4
41
PEG_RX_P4
43
GND
45
PEG_RX_N3
47
PEG_RX_P3
49
GND
51
PEG_RX_N2
53
PEG_RX_P2
55
GND
57
PEG_RX_N1
59
PEG_RX_P1
61
GND
63
PEG_RX_N0
65
PEG_RX_P0
67
GND
69
GND
71
PEG_TX_N7
73
PEG_TX_P7
75
GND
77
PEG_TX_N6
79
PEG_TX_P6
81
GND PEG_TX_N583PWR_GOOD
85
PEG_TX_P5
87
GND
89
PEG_TX_N4
91
PEG_TX_P4
93
GND PEG_TX_N395TH_OVERT#
97
PEG_TX_P3
99
GND
101
PEG_TX_N2
103
PEG_TX_P2
105
GND
107
PEG_TX_N1
109
PEG_TX_P1
111
GND
113
PEG_TX_N0
115
PEG_TX_P0
117
GND
119
GND
TE_2199015-1_118P
ME@
PEX_STD_SW#
GND GND GND GND +19V +19V +19V +19V +19V +19V +19V +19V GND GND GND
GND GND GND
GND GND GND
GND
TH_TACH
TH_PWN
AC_DC
PWR_EN
CLK_REQ#
RSVD RSVD
RSVD SMB_DAT SMB_CLK
WAKE#
RSVD
RSVD
GND CLK_PCIE_N CLK_PCIE_P
GND
GND
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
32 34 36 38
+5V
40
+5V
42
+5V
44
+5V
46
+5V
48 50 52 54
NC
56
+3V
58
+3V
60 62
NC
64
NC
66
NC
68
+3VS_R
NC
70
NC
72
NC
74 76 78
NC
80 82 84 86 88 90 92 94
NC
96 98
NC
100 102 104 106 108 110 112 114 116 118
120
+5VS
+3VS_VGA
DGPU_PWROK_R
SLAVE_PRESENT#
RV169 0_0402_5%
+3VS
RV172 0_0402_5%
1 2
+3VS_R
For Power Protection
SLI_FAN_SPEED
SLI_FAN_PWM
12
RV1580_0402_5%
12
SUSP#
VGA_AC_DET
DGPU_PWROK
DGPU_PWR_EN#
CLK_REQ_GPU#_R NVDD_PWR_EN
DGPU_HOLD_RST#
PCH_THRMTRIP#_R 4 PLT_RST# GC6_EVENT_SLI#
EC_SMB_DA2
EC_SMB_CK2
FB_CLAMP DGPU_PWR_EN
CLK_PCIE_2VGA# 4 CLK_PCIE_2VGA 4
14
4 8,14,15
4 15 4
4 4 4 4
4,8 4
PCIE_CTX_GRX_N[0..15]
PCIE_CTX_GRX_P[0..15]
PCIE_CRX_C_GTX_N[0..15]
PCIE_CRX_C_GTX_P[0..15]
C986 10U_0805_10V6K
+5VS
FAN Conn
2
1
12
R13 1K_0402_5%
SLI_FAN_SPEED SLI_FAN_PWM
JFAN
ME@
1
1
2
2
3
3
4
4
5
G1
6
G2
ACES_85204-04001
2012.05.31 Del Pin5,6 GND net for layout location chang e
FD1
1
B1
43J_BARCODE_5
FD2
1
1
1
2012.06.01 Change footpri nt for ME
FD31FD4
1
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/07/01
2012/07/01
2012/07/01
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2014/07/01
2014/07/01
2014/07/01
Title
MXM CONN.
MXM CONN.
MXM CONN.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031NS-A031
NS-A031NS-A031
NS-A031NS-A031
Tuesday, March 19, 2013
Tuesday, March 19, 2013
Tuesday, March 19, 2013
of
3 16
3 16
1
3 16
1.0
1.0
1.0
5
3
PCIE_CTX_GRX_N[0..15]
3
PCIE_CTX_GRX_P[0..15]
3
PCIE_CRX_C_GTX_N[0..15]
3
PCIE_CRX_C_GTX_P[0..15]
D D
+3VS_VGA
RV24
2.2K_0402_5%
VGA_SMB_CK2
VGA_SMB_DA2
C C
B B
1 2
PLT_RST#3
DGPU_HOLD_RST#3
+3VS_VGA
RV25
2.2K_0402_5%
1 2
4
2N7002DW-T/R7_SOT363-6
RV126 0_0402_5%@
2
QV1A
2N7002DW-T/R7_SOT363-6
1 2
RV137 0_0402_5%@
PLT_RST#
DGPU_HOLD_RST#
5
1 2
61
NC7SZ08P5X_NL_SC70-5
+1.05VS_VGA
180ohms (ESR=0.2) Bead
QV1B
3
PU AT EC SIDE, +3VS AND 4.7K
+3VS_VGA
1
CV6
0.1U_0402_10V7K
2
RV138 0_0402_5%@
2
B
1
A
1 2
5
3
UV2
P
G
10K_0402_5%
Y
EC_SMB_CK2
EC_SMB_DA2
RV106
4
LV1 BLM18PG181SN1D_2P
1 2
+3VS_VGA
@
1 2
PLT_RST_VGA#
RV107 10K_0402_5%
1 2
Under GPU(below 150mils)
1
2
22U_0805_6.3V6M
3
3
Differential signal
FB_CLAMP_MON
GC6 Function
GC6@
RV237
GC6@
2
G
0_0402_5%
GC6@
10K_0402_5%
13
D
GC6@
QV2
S
LP2301ALT1G_SOT-23
For GC6
12
+3VS
12
RV235
10K_0402_5%
GC6@
1
13
GC6@
D
2
G
QV3
CV139
2
S
0.1U_0402_10V7K
10K_0402_5%
A A
3,4
DGPU_PWR_EN
2N7002KW_SOT323-3
5
CV112
RV238
RV236
FB_CLAMP
1
2
4.7U_0402_6.3V6M
4
PCIE_CTX_GRX_N[0..15]
PCIE_CTX_GRX_P[0..15]
PCIE_CRX_C_GTX_N[0..15]
PCIE_CRX_C_GTX_P[0..15]
150mA
1
1
CV4
CV113
CV5
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
cap location follow MXM3.0 spec
CLK_PCIE_2VGA3
CLK_PCIE_2VGA#3
1 2
12
3,4
3,4,8
4
+SP_PLLVDD
1 2
@
RV20 200_0402_1%
1 2
RV22 2.49K_0402_1%
DGPU_PWR_EN
CLK_REQ_GPU#_R
PCIE_CTX_GRX_P15 PCIE_CTX_GRX_N15 PCIE_CTX_GRX_P14 PCIE_CTX_GRX_N14 PCIE_CTX_GRX_P13 PCIE_CTX_GRX_N13 PCIE_CTX_GRX_P12 PCIE_CTX_GRX_N12 PCIE_CTX_GRX_P11 PCIE_CTX_GRX_N11 PCIE_CTX_GRX_P10 PCIE_CTX_GRX_N10
PCIE_CTX_GRX_P9 PCIE_CTX_GRX_N9 PCIE_CTX_GRX_P8 PCIE_CTX_GRX_N8
PCIE_CRX_C_GTX_P15 PCIE_CRX_C_GTX_N15 PCIE_CRX_C_GTX_P14 PCIE_CRX_C_GTX_N14 PCIE_CRX_C_GTX_P13 PCIE_CRX_C_GTX_N13 PCIE_CRX_C_GTX_P12 PCIE_CRX_C_GTX_N12 PCIE_CRX_C_GTX_P11 PCIE_CRX_C_GTX_N11 PCIE_CRX_C_GTX_P10 PCIE_CRX_C_GTX_N10 PCIE_CRX_C_GTX_P9 PCIE_CRX_C_GTX_N9 PCIE_CRX_C_GTX_P8 PCIE_CRX_C_GTX_N8
CLK_PCIE_2VGA CLK_PCIE_2VGA#
CLK_REQ_GPU#
PEX_TSTCLK_OUT PEX_TSTCLK_OUT#
PLT_RST_VGA#
PEX_TERMP
RV231
10K_0402_5%
<BOM Structure>
UV1A
AN12
PEX_RX0
AM12
PEX_RX0_N
AN14
PEX_RX1
AM14
PEX_RX1_N
AP14
PEX_RX2
AP15
PEX_RX2_N
AN15
PEX_RX3
AM15
PEX_RX3_N
AN17
PEX_RX4
AM17
PEX_RX4_N
AP17
PEX_RX5
AP18
PEX_RX5_N
AN18
PEX_RX6
AM18
PEX_RX6_N
AN20
PEX_RX7
AM20
PEX_RX7_N
AP20
PEX_RX8
AP21
PEX_RX8_N
AN21
PEX_RX9
AM21
PEX_RX9_N
AN23
PEX_RX10
AM23
PEX_RX10_N
AP23
PEX_RX11
AP24
PEX_RX11_N
AN24
PEX_RX12
AM24
PEX_RX12_N
AN26
PEX_RX13
AM26
PEX_RX13_N
AP26
PEX_RX14
AP27
PEX_RX14_N
AN27
PEX_RX15
AM27
PEX_RX15_N
AK14
PEX_TX0
AJ14
PEX_TX0_N
AH14
PEX_TX1
AG14
PEX_TX1_N
AK15
PEX_TX2
AJ15
PEX_TX2_N
AL16
PEX_TX3
AK16
PEX_TX3_N
AK17
PEX_TX4
AJ17
PEX_TX4_N
AH17
PEX_TX5
AG17
PEX_TX5_N
AK18
PEX_TX6
AJ18
PEX_TX6_N
AL19
PEX_TX7
AK19
PEX_TX7_N
AK20
PEX_TX8
AJ20
PEX_TX8_N
AH20
PEX_TX9
AG20
PEX_TX9_N
AK21
PEX_TX10
AJ21
PEX_TX10_N
AL22
PEX_TX11
AK22
PEX_TX11_N
AK23
PEX_TX12
AJ23
PEX_TX12_N
AH23
PEX_TX13
AG23
PEX_TX13_N
AK24
PEX_TX14
AJ24
PEX_TX14_N
AL25
PEX_TX15
AK25
PEX_TX15_N
AJ11
PEX_WAKE_N
AL13
PEX_REFCLK
AK13
PEX_REFCLK_N
AK12
PEX_CLKREQ_N
AJ26
PEX_TSTCLK_OUT
AK26
PEX_TSTCLK_OUT_N
AJ12
PEX_RST_N
AP29
PEX_TERMP
N14P-GT-A2 FCBGA 908P
+3VS_VGA
1 2
12
2
QV16
1 3
D
2N7002H 1N_SOT23-3
@
1 2
RV233 0_0402_5%
RV230 10K_0402_5%
@
G
3
S
3
Part 1 of 7
PCI EXPRESS
GT@
+3VS_VGA
1 2
1 2
3
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8
GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14
GPIO
GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_HSYNC
DACA_VSYNC
DACs
DACA_VDD DACA_VREF DACA_RSET
I2CA_SCL I2CA_SDA
I2CB_SCL I2CB_SDA
I2CC_SCL
I2C
I2CC_SDA
I2CS_SCL I2CS_SDA
PLLVDD
SP_PLLVDD
VID_PLLVDD
XTAL_IN
CLK
XTAL_OUT
XTAL_OUTBUFF
XTAL_SSIN
UV1
N14P-GT1-A2 FCBGA 908P
RV30 10K_0402_5%
CLK_REQ_GPU#
RV232
@
10K_0402_5%
P6
FB_CLAMP_MON
M3 L6 P5 P7 L7 M7 N8 M1 M2 L1 M5 N3 M4 N4 P2 R8 M6 R1 P3 P4 P1
AK9 AL10 AL9
AM9 AN9
AG10 AP9 AP8
R4 R5
R7 R6
R2 R3
T4 T3
AD8
AE8
AD7
H3 H2
J4 H1
Internal Thermal Sensor
GT1@
RV173 0_0402_5%
FB_CLAMP_TOGGLE_REQ#
OVERT#
ALERT#
NVVDD PWM_VID
+DACA_VDD
RV57 10K_0402_5%@
For NV request. Change to @.
VGA_CRT_CLK VGA_CRT_DATA
I2CB_SCL I2CB_SDA
VGA_EDID_CLK VGA_EDID_DATA
VGA_SMB_CK2 VGA_SMB_DA2
60mA
+PLLVDD
RV112 0_0402_5%@
45mA
45mA
XTAL_IN
XTAL_OUT
XTALOUT
XTALSSIN
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF LC FU TURE CENTER. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF LC FU TURE CENTER. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF LC FU TURE CENTER. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT C ONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT C ONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT C ONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF LC FUTURE CENTER .
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF LC FUTURE CENTER .
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF LC FUTURE CENTER .
@
1 2
1 2
1 2
1 2
FB_CLAMP
NVVDD PWM_VID
DPRSLPVR_VGA
RV2610K_0402_5%
RV27
10K_0402_5%
2
FB_CLAMP
15
VGA_AC_DET
15
3,4,8
VGA_AC_DET
Vendor recommand reserve PU/PD resistor
FB_CLAMP_TOGGLE_REQ#
+SP_PLLVDD
12
+PLLVDD
1
2
0.1U_0402_10V7K
Under GPU Near GPU
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
2
Deciphered Date
Deciphered Date
Deciphered Date
2012/07/01
2012/07/01
2012/07/01
+3VS_VGA
RV65
@
10K_0402_5%
1 2
MEM_VREF
3
12
RV223
10K_0402_5%
PLT_RST_VGA#
+3VS_VGA
RV56 10K_0402_5%
GC6@
1 2
1 2
RV23 10M_0402_5%
YV1
4
NC
1
XTAL_IN
OSC
27MHZ 10PF +-10PPM 7V27000050
1
CV37
2
10P_0402_50V8J
30 ohms @100MHz (ESR=0.05)
LV7
1 2
1
22U_0805_6.3V6M
CV40
2
FBMA-10-100505-300T_2P
2014/07/01
2014/07/01
2014/07/01
CV131
+3VS_VGA
OVERT#
9,10,11,12
@
2
2
G
12
@
61
QV7A DMN66D0LDW-7 2N_SOT363-6
13
D
@
S
RV208 10K_0402_5%
5
QV5 2N7002KW_SOT323-3
PCH_THRMTRIP#_R
3
QV7B DMN66D0LDW-7 2N_SOT363-6
4
Prevent Power Leakage
PLT_RST_VGA#
G
2
13
D
S
GC6@
QV6 2N7002KW_SOT323-3
3
XTAL_OUT
OSC
2
NC
1
CV38
2
10P_0402_50V8J
+1.05VS_VGA
Title
Title
Title
N14P-PCIE/DAC/GPIO
N14P-PCIE/DAC/GPIO
N14P-PCIE/DAC/GPIO
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Tuesday, March 19, 2013
Tuesday, March 19, 2013
Tuesday, March 19, 2013
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
@
3,4
GC6_EVENT_SLI#
VGA_EDID_CLK
VGA_EDID_DATA
VGA_CRT_DATA
VGA_CRT_CLK
I2CB_SCL
I2CB_SDA
OVERT#
VGA_AC_DET
ALERT#
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031NS-A031
NS-A031NS-A031
NS-A031NS-A031
1
PCH_THRMTRIP#_R
3
1 2
RV3 2.2K_0402_5%
1 2
RV4 2.2K_0402_5%
1 2
RV10 2.2K_0402_5%
1 2
RV11 2.2K_0402_5%
1 2
RV12 2.2K_0402_5%
1 2
RV13 2.2K_0402_5%
1 2
RV1 10K_0402_5%
1 2
RV2 10K_0402_5%
1 2
RV7 10K_0402_5%
4 16
4 16
4 16
3
+3VS_VGA
1.0
1.0
1.0
5
UV1D
AM6
IFPA_TXC
AN6
IFPA_TXC_ N
AP3
IFPA_TXD0
AN3
IFPA_TXD0 _N
AN5
IFPA_TXD1
AM5
IFPA_TXD1 _N
AL6
IFPA_TXD2
AK6
IFPA_TXD2 _N
AJ6
IFPA_TXD3
D D
C C
B B
A A
AH6
IFPA_TXD3 _N
AJ9
IFPB_TXC
AH9
IFPB_TXC_ N
AP6
IFPB_TXD4
AP5
IFPB_TXD4 _N
AM7
IFPB_TXD5
AL7
IFPB_TXD5 _N
AN8
IFPB_TXD6
AM8
IFPB_TXD6 _N
AK8
IFPB_TXD7
AL8
IFPB_TXD7 _N
AK1
IFPC_L0
AJ1
IFPC_L0_N
AJ3
IFPC_L1
AJ2
IFPC_L1_N
AH3
IFPC_L2
AH4
IFPC_L2_N
AG5
IFPC_L3
AG4
IFPC_L3_N
AM1
IFPD_L0
AM2
IFPD_L0_N
AM3
IFPD_L1
AM4
IFPD_L1_N
AL3
IFPD_L2
AL4
IFPD_L2_N
AK4
IFPD_L3
AK5
IFPD_L3_N
AD2
IFPE_L0
AD3
IFPE_L0_N
AD1
IFPE_L1
AC1
IFPE_L1_N
AC2
IFPE_L2
AC3
IFPE_L2_N
AC4
IFPE_L3
AC5
IFPE_L3_N
AE3
IFPF_L0
AE4
IFPF_L0_N
AF4
IFPF_L1
AF5
IFPF_L1_N
AD4
IFPF_L2
AD5
IFPF_L2_N
AG1
IFPF_L3
AF1
IFPF_L3_N
AG3
IFPC_AUX_ I2CW _SCL
AG2
IFPC_AUX_ I2CW _SDA_N
AK3
IFPD_AUX_ I2CX_SCL
AK2
IFPD_AUX_ I2CX_SDA _N
AB3
IFPE_AUX_ I2CY_SCL
AB4
IFPE_AUX_ I2CY_SDA_N
AF3
IFPF_AUX_ I2CZ_SCL
AF2
IFPF_AUX_ I2CZ_SDA _N
N14P-GT-A2_FCBGA908
4
Part 4 of 7
TEST
SERIAL
LVDS/TMDS
GENERAL
MULTI_STR AP_REF0_GND
NC
VDD_SEN SE
GND_SEN SE
TESTMOD E
JTAG_TC K
JTAG_TD I JTAG_TD O JTAG_TM S
JTAG_TR ST_N
ROM_CS_ N
ROM_SCL K
ROM_SI
ROM_SO
BUFRST_ N
CEC
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
THERMDP THERMDN
P8
NC
AC6
NC
AJ28
NC
AJ4
NC
AJ5
NC
AL11
NC
C15
NC
D19
NC
D20
NC
D23
NC
D26
NC
H31
NC
T8
NC
V32
NC
L4
VCCSENSE_VGA
L5
VSSSENSE_VGA
AK11
AM10 AM11 AP12 AP11 AN11
H6 H4 H5 H7
RV35 10K_0402_5%
L2
L3
J1
J2 J7 J6 J5 J3
K3 K4
3
VCCSENSE_VGA 15
trace width: 16mils differential voltage sensing. differential signal routing.
TESTMODE
1 2
RV34 10K_0402_5%
ROM_CS ROM_SCLK ROM_SI ROM_SO
1 2
RV38 40.2K_0402_1%
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
VSSSENSE_VGA 15
TV2 TV3 TV4 TV5
ROM_SCLK 13 ROM_SI 13 ROM_SO 13
12
STRAP0 13 STRAP1 13 STRAP2 13 STRAP3 13 STRAP4 13
12
10K_0402_5% RV33
ROM_CS ROM_SO
CV295
12
0.1U_0402_16V4Z
RV224 R_short 0_0402_5%
1 2 1 2
RV226 R_short 0_0402_5%
ROM_CS_R
RV229
10K_0402_5%
2
1MB SPI ROM FOR VBIOS ROM (SLI)
+3VS_VGA
20mils
12
UV15
1
CS#
2
DO
3
WP#
4
GND
MX25L2006EM1I-12G SOP 8P
8
VCC
7
HOLD#
6
CLK
5
DIO
For EMI request Please close to UV15
ROM_HOLD#ROM_SO_R ROM_SCLK_R ROM_SI_R
10_0402_5%
RV51
12
RV225 10K_0402_5%
12
@
1
CV296
@
2
10P_0402_50V8J
1
RV228 R_short 0_0402_5%
1 2 1 2
RV227 R_short 0_0402_5%
ROM_SCLK ROM_SI
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2012/07/01
2012/07/01
2012/07/01
3
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2014/07/01
2014/07/01
2014/07/01
2
Title
N14P-LVDS/HDMI/DP/THM
N14P-LVDS/HDMI/DP/THM
N14P-LVDS/HDMI/DP/THM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Tuesday, March 19, 2013
Tuesday, March 19, 2013
Date: Sheet of
Date: Sheet of
Date: Sheet of
Tuesday, March 19, 2013
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031NS-A031
NS-A031NS-A031
NS-A031NS-A031
5 16
5 16
5 16
1
1.0
1.0
1.0
5
4
3
2
1
+1.5VS_VGA
D D
+1.5VS_VGA
1
2
1U_0402_6.3V6K
C C
B B
For GDDR5 settin g. Near GPU
1
1
1
CV276
CV275
2
2
22U_0805_6.3V6M
1
CV274
CV273
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
2
2
CV271
CV272
1
1
10U_0603_6.3V6M
22U_0805_6.3V6M
Under GPU(below 150mils)
1
1
1
CV281
CV277
1U_0402_6.3V6K
CV282
2
2
1U_0402_6.3V6K
1
CV278
CV279
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
VDDQ_SENSE
1U_0402_6.3V6K
14
CALIBRATION PIN
FB_CAL_x_PD_VDDQ
FB_CAL_x_PU_GND
FB_CAL_xTERM_GND
CV270
1
10U_0603_6.3V6M
1
CV280
2
2
1
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
CV292
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
1
2
2
CV268
CV269
GDDR5
40.2Ohm
40.2Ohm
60.4Ohm
1
1
CV267
2
4.7U_0603_6.3V6K
CV287
0.1U_0402_10V7K
RV141 R_short 0_0402_5%
1 2
RV142 R_short 0_0402_5%
1 2
1
CV266
CV265
2
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
1
CV284
CV294
2
2
0.1U_0402_10V7K
+1.5VS_VGA
1
1
CV264
CV263
2
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_10V7K
4.7U_0603_6.3V6K
1
1
CV285
CV286
2
2
0.1U_0402_10V7K
FB_VDDQ_SENSE
FB_VSS_SENSE
1 2
RV6 40.2_0402_1%
1 2
RV8 40.2_0402_1%
1 2
RV9 60.4_0402_1%
Pl
ace near balls
3.5A
AA27 AA30 AB27 AB33 AC27 AD27 AE27 AF27 AG27
M27 N27
R27
W27 W30 W33
H27
H25
UV1E
B13 B16 B19 E13 E16 E19 H10 H11 H12 H13 H14 H15 H16 H18 H19 H20 H21 H22 H23 H24
H8 H9
L27
P27
T27 T30 T33 V27
Y27
F1
F2
J27
Part 5 of 7
FBVDDQ_0 FBVDDQ_1 FBVDDQ_2 FBVDDQ_3 FBVDDQ_4 FBVDDQ_5 FBVDDQ_6 FBVDDQ_7 FBVDDQ_8 FBVDDQ_9 FBVDDQ_10 FBVDDQ_11 FBVDDQ_12 FBVDDQ_13 FBVDDQ_14 FBVDDQ_15 FBVDDQ_16 FBVDDQ_17 FBVDDQ_18 FBVDDQ_19 FBVDDQ_20 FBVDDQ_21 FBVDDQ_22 FBVDDQ_23 FBVDDQ_24 FBVDDQ_25 FBVDDQ_26 FBVDDQ_27 FBVDDQ_28 FBVDDQ_29 FBVDDQ_30 FBVDDQ_31 FBVDDQ_32 FBVDDQ_33 FBVDDQ_34 FBVDDQ_35 FBVDDQ_36 FBVDDQ_37 FBVDDQ_38 FBVDDQ_39 FBVDDQ_40 FBVDDQ_41 FBVDDQ_42 FBVDDQ_43
FB_VDDQ_SENSE
FB_GND_SENSE
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
N14P-GT-A2_FCBGA908
PEX_IOVDD_0 PEX_IOVDD_1 PEX_IOVDD_2 PEX_IOVDD_3 PEX_IOVDD_4 PEX_IOVDD_5
PEX_IOVDDQ_0 PEX_IOVDDQ_1 PEX_IOVDDQ_2 PEX_IOVDDQ_3 PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8
PEX_IOVDDQ_9 PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13
PEX_PLL_HVDD
PEX_SVDD_3V3
POWER
PEX_PLLVDD
IFPAB_PLLVDD
IFPC_PLLVDD
IFPD_PLLVDD
IFPEF_PLVDD
IFPAB_RSET
IFPA_IOVDD IFPB_IOVDD
IFPC_RSET
IFPC_IOVDD
IFPD_RSET
IFPD_IOVDD
IFPEF_RSET
IFPE_IOVDD IFPF_IOVDD
VDD33_0 VDD33_1 VDD33_2 VDD33_3
2000mA
AG19 AG21 AG22 AG24 AH21 AH25
AG13 AG15 AG16 AG18 AG25 AH15 AH18 AH26 AH27 AJ27 AK27 AL27 AM28 AN28
AH12
AG12
AG26
J8 K8 L8 M8
AH8
+IFPAB_PLLVDD
AJ8
AG8
+IFPAB_IOVDD
AG9
AF7
+IFPC_PLLVDD
AF8
AF6
+IFPC_IOVDD
AG7
+IFPD_PLLVDD
AN2
AG6
+IFPD_IOVDD
AB8
+IFPEF_PLLVDD
AD6
AC7
+IFPE_IOVDD
AC8
1
CV43
2
1U_0402_6.3V6K
1U_0402_6.3V6K
Under GPU(below 150mils)
1
CV54
2
22U_0805_6.3V6M
22U_0805_6.3V6M
+PEX_PLLVDD
+VDD33
+VDD33
@
1 2
@
1 2
RV5310K_0402_5%
@
1 2
RV4210K_0402_5%
@
1 2
RV4410K_0402_5%
@
1 2
RV4510K_0402_5%
1 2
@
RV4710K_0402_5%
@
1 2
RV5510K_0402_5%
@
1 2
RV5410K_0402_5%
1
CV44
2
1
CV53
2
+3VS_VGA_PEX
RV5210K_0402_5%
1
2
1U_0402_6.3V6K
1
2
22U_0805_6.3V6M
RV401K_0402_1%
@
RV431K_0402_1%
@
RV461K_0402_1%
@
RV501K_0402_1%
@
Near GPU
1
1
1
2
1
2
CV46
+1.05VS_VGA
CV55
1
2
4.7U_0603_6.3V6K
CV47
2
4.7U_0603_6.3V6K
1
CV74
2
4.7U_0603_6.3V6K
CV45
1U_0402_6.3V6K
CV56
22U_0805_6.3V6M
1
CV70
2
0.1U_0402_10V7K
2
CV48
CV49
2
1
10U_0603_6.3V6M
4.7U_0603_6.3V6K
0_0603_5%
12
RV14
CV73
2
1
10U_0603_6.3V6M
+3VS_VGA
2
CV51
CV50
1
10U_0603_6.3V6M
+1.05VS_VGA
2
CV52
1
10U_0603_6.3V6M
Under GPU(below 150mils)
Place near balls Place near GPU
1
1
12
12
LVDD
PL
12
12
->NV recommend: un-stuff pull down resistor by default.
2
0.1U_0402_10V7K
IOVDD no use
+PEX_PLLVDD
CV109
0.1U_0402_10V7K
1
CV111
2
2
1U_0402_6.3V6K
120mA
1
1
CV65
2
2
1U_0603_10V6K
0.1U_0402_10V7K
0_0603_5%
1
CV75
CV293
2
4.7U_0603_6.3V6K
1
CV3
CV66
2
4.7U_0805_25V6-K
+3VS_VGA
12
RV5
+1.05VS_VGA
LV2
0_0603_5%
12
Place near balls
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/07/01
2012/07/01
2012/07/01
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2014/07/01
2014/07/01
2014/07/01
Title
N14P-POWER
N14P-POWER
N14P-POWER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031
NS-A031NS-A031
NS-A031NS-A031
NS-A031NS-A031
Tuesday, March 19, 2013
Tuesday, March 19, 2013
Tuesday, March 19, 2013
of
6 16
6 16
1
6 16
1.0
1.0
1.0
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