A
1 1
B
C
D
E
LCFC Confidential
CG413/CG513 MB Schematics Document
Intel Skylake-U22/Kabylake-U22 with DDR4 + Nvidia N16S-GTR/N16V-GMR1 GPU
2
2016-06-12
2
REV:1.0
3
4
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
A
B
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
2016/08/20
2016/08/20
2016/08/20
Title
Cover Page
Cover Page
Cover Page
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
of
1 60
1 60
of
E
1 60
3
4
1.0
1.0
1.0
A
B
C
D
E
LCFC confidential
NV N16S-GTR/N16V-GMR1
Package: GB2B-64
Page 19~24
VRAM: 256*16
DDR3L*8/*4: 4GB/2GB
1 1
Page 25~29
PCIe Port 9~12
HDMI Conn.
Page 3 4
PCI-Express
4x Gen3
HDMI (DDI 1)
Memory Bus (Dual Channel)
1.2V DDR4 2133MT/s
USB3.0 x1
USB2.0 x1
USB3.0 Left Conn
USB3.0 Port1
USB2.0 Port1
DDR4 SO-DIMM x1
Page 18
DDR4 Memory Down
4pcs x16
Page 4 1
Page 17
VGA Conn.
Page 3 6
DP to VGA
ITE IT6516BFN
Page 3 5
eDP Conn
Int. Camera Conn.
USB2.0 Port4
Int. MIC Conn.
2
Page 3 3
RJ45 Conn.
Page 3 8
SATA HDD
Page 4 2
SATA ODD
Page 4 2
LAN Chip
Realtek_RTL8111GUL
Realtek_RTL8111H_CG
Page 3 7
SATA Port0
SATA Port1A
PCIe Port 5
DP x2 Lane (DDI 2)
eDP x2 Lane
USB2.0 x1
SATA Gen3 x1
SATA Gen1 x1
PCIe Gen1 x1
Intel MCP
SKL-U22 15W
KBL-U22 15W
BGA-1356
42mm*24mm
HD Audio
3
Codec
Conexant_CX11802_33Z
Page 4 3
SPK Conn.
Page 4 3
HP&Mic Com bo Conn.
Page 4 3
Page 3~16
LPC
USB3.0 x1
USB3.0 x1
USB2.0 x1
USB2.0 x1
USB2.0 x1
USB2.0 x1
PCIe Gen1 x1
USB2.0 x1
SPI
3D Camera (Optional)
USB3.0 Port3
Page 3 1
USB3.0 Right Conn 1 (Optional)
USB3.0 Port2
Page 4 5
USB2.0 Right Conn 1
USB2.0 Port3
Page 4 5
USB2.0 Right Conn 2
USB2.0 Port2
Page 4 5
To uc h S cr ee n ( O pt io na l )
USB2.0 Port6
Card Reader
Realtek RTS5170
USB2.0 Port5
Page 3 3
SD/MMC Conn.
Page 3 0
NGFF WLAN&BT
PCIe Po rt6
USB2.0 Port7
SPI ROM (8MB)
W25Q64FVSSI Q
Page 4 0
Page 0 7
SPI ROM (4MB) (Reserved)
W25Q32FVSSI Q
Page 0 7
USB Board
Sub-board( for 14")
USB BOARD
TP BOARD
2
3
Sub-board( for 15")
EC
ITE IT8586E-LQFP
Page 4 4
TPM (Reserved)
Z32H320TC
Page 3 2
USB BOARD
TP BOARD
ODD BOARD
To uc h P ad I nt .K BD
Page 4 5 Page 4 5
4
Thermal Sensor (Reserved)
NCT7718W
Page 3 9
Sub-board( for CG513 DIS)
3D Camera Board
4
MIC Board
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF L C FU TURE CEN TER. AND CON TAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF L C FU TURE CEN TER. AND CON TAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF L C FU TURE CEN TER. AND CON TAINS CONF IDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
A
B
MAY BE USED BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
C
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
2016/08/20
2016/08/20
2016/08/20
Title
Block Diagram
Block Diagram
Block Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
of
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2 60
of
2 60
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1.0
1.0
1.0
A
B
C
D
E
Voltage Rails
Power Plane
1 1
State
S0
S3
2
S3
Battery only
S5 S4
AC Only
S5 S4
Battery only
S5 S4
AC & Battery
don't exist
SMBUS Control Table
3
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
EC_SMB_CK3
EC_SMB_DA3
( O --> Means ON , X --> Means OFF )
+3VALW
+5VALW
V20B+
+3VALW_PCH
+1.8VALW
+1.0VALW
O
O
O
O X
O
XX
SOURCE
IT8586E EC_SMB_CK1
+3VL_EC
IT8586E
IT8586E
+3VL_EC
+3VS
BATT
V
X
ChargerVDGPU
X
X
V
+3VG_AON
+1.2V
+2.5V_DDR
+VCCST
O
O
O
O
XX
O
O
O
X
X
X
IT8586E
V
+3VL_EC
V
+3VS
V
+3VL_EC
Memory
Down
X
XX
PCH
X
V
+3VALW_PCH
+5VS
+3VS
+VCCIO
+VCCSTG
+VCCSA
+VCC_GT
+CPU_CORE
+0.6VS
O
X
X
X
SODIMM
PMIC
X
VXXX X X XX
Thermal
Sensor
X
X
X
V
WLAN
WiMAX
X
X
X
STATE
Full ON
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SIGNAL
HSIO PORT
1
2
USB3.0
USB2.0
PCIE
SATA
3
4
5
6
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9~12
X4 PCIE
0
1A
1B
2
SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
ON
HIGH HIGH HIGH
LOW
HIGH
LOW LOW
Function
USB3.0 Conn Left
USB3.0 Conn Right(optional)
3D Camera(optional)
NC
NC
NC
USB3.0 Conn Left
USB2.0 Conn1 Right
USB2.0 Conn2 Right
Camera
Cardreader
Touch Panel
Bluetooth
NC
NC
NC
NC
NC
NC
NC
LAN
WLAN
used as SATA
used as SATA
HIGH
LOW
ON ON ON
ON
ON
ON
OFF
ON
OFF LOW LOW LOW
@
14@
15@
14or15@
14or17@
Cannonlake@
CD@
DUALMIC@
EMC@
EMC_15@
EMC_NS@
EMC_PX@
EMC_PXNS@
ES@
EXO@
ME@
NTS@
PX@
RANKA@
DGPU
HDD
ODD
used as PCIE
used as PCIE
RANKB@
Realtek_SD@
SINGLEMIC@
SINGLERANK@
DUALRANK@
TS@
TPM@
UMA@
OFF
OFF
OFF
OFF
OFF
OFF
BTO Item BOM Structure
Not stuff
For 14" part
For 15" part
For 14" or 15" part
For 14" or 17" part
For Cannonlake part
For C cost down
For Dual MIC part
For EMC part
For EMC 15" part
For EMC nu-stuff part
For EMC PX part
For EMC PX nu-stuff part
For ES CPU
For EXO GPU
For ME part
For nu-touch part
For PX part
For VRAM rank A part
For VRAM rank B part
For Realtek SD part
For single MIC part
For single VRAN rank part
For dual VRAN rank part
For touch screen part
For TPM part
For UMA part
2
3
PCH_SMB_CLK
PCH_SMB_DATA
PCH
+3VALW_PCH
EC SMBus1 address
Device
4
Smart Battery
Charger
need to update
0001 0010 b
X
X
X
X
XX
EC SMBus2 address
Device
Thermal Sensor(NCT7718W)
PCH
DGPU
A
1001_100xb
need to update
need to update
V
+3VALW_PCH
EC SMBus3 address
Device Address Addre ss
PMIC
B
V
+3VS
need to update
X
V
+3VS
PCH SM Bus address
Device Address Addre ss
DDR4 SODIMM
Wlan
Security Classification
Security Classificati on
Security Classificati on
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSE NT OF LC FUTURE C ENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSE NT OF LC FUTURE C ENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSE NT OF LC FUTURE C ENTER.
C
need to update
Reserved
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Dat e
Deciphered Dat e
D
2016/08/20
2016/08/20
2016/08/20
Titl e
Titl e
Titl e
Notes List
Notes List
Notes List
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
E
of
3 60
3 60
of
3 60
4
1.0
1.0
1.0
5
D D
HDMI D2
HDMI D1
HDMI D0
HDMI CLK
DP TO VGA Conv erter
+VCCIO
C
check PROCHOT# circuit with PWR
H_PROCHOT# 44,55
check H_THRMTRIP# if need to connector to EC
B
+VCCSTG
+VCCST_CPU
+3VS
HDMI_TX2- 34
HDMI_TX2+ 34
HDMI_TX1- 34
HDMI_TX1+ 34
HDMI_TX0- 34
HDMI_TX0+ 34
HDMI_CLK- 34
HDMI_CLK+ 34
VGA_TX0- 35
VGA_TX0+ 35
VGA_TX1- 35
VGA_TX1+ 35
DDPB_CLK 34
DDPB_DATA 34
RC4 24.9_0402_1%
1
RC19
1K_0402_5%
2
1 2
RC143
1K_0402_5%
1 2
1 2
RC20 499 +-1% 0402
RC155 49.9_0402_1%
RC156 49.9_0402_1%
RC157 49.9_0402_1%U23E@
RC170 49.9_0402_1%U23E@
check DDPC_CLK pull high or not?
RPC19
1
8
7
2
3
6
4 5
2.2K_0804_8P4R_5%
HDMI_TX2ĀHDMI_TX2+
HDMI_TX1-
HDMI_TX1+
HDMI_TX0-
HDMI_TX0+
HDMI_CLKĀHDMI_CLK+
VGA_TX0-
VGA_TX0+
VGA_TX1-
VGA_TX1+
DDPB_CLK
DDPB_DATA
DDPC_CLK
DDPC_DATA
EDP_COMP
+VCCIO&EDP_COMP :
Trace Widt h: 20mil
Isolation Spac ing: 25m il
Max length: 100mil
1
2
1 2
1
2
2
1
DDPC_CLK
DDPC_DATA
DDPB_CLK
DDPB_DATA
4
?
DDI
DISPLAY SIDEBANDS
UC1D
D63
CATERR#
A54
PECI
C65
PROCHOT#
C63
THERMTRIP#
A65
SKTOCC#
C55
BPM#[0]
D55
BPM#[1]
B54
BPM#[2]
C56
BPM#[3]
A6
GPP_E3/CPU_GP0
A7
GPP_E7/CPU_GP1
BA5
GPP_B3/CPU_GP2
AY5
GPP_B4/CPU_GP3
AT16
PROC_POPIRCOMP
AU16
PCH_OPIRCOMP
H66
OPCE_RCOMP
H65
OPC_RCOMP
SKYLAKE-U_BGA1356
REV = 1
@
SKL_ULT
EDP
1 OF 20
SKL_ULT
CPU MISC
UC1A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22/DDPD_CTRLCLK
N12
GPP_E23/DDPD_CTRLDATA
E52
EDP_RCOMP
SKYLAKE-U_BGA1356
1
2
RC1625
49.9_0402_1%
REV = 1
@
CATERR#
H_PECI
H_PROCHOT#_R
H_THRMTRIP#
XDP_BPM0#
1
XDP_BPM1#
1
XDP_BPM2#
1
XDP_BPM3#
1
GPP_E3
1
GPP_E7
1
PROC_OPI_RCOMP
PCH_OPI_RCOMP
EDRAM_OPIO_RCOMP
EOPIO_RCOMP
+VCCST_CPU
@
H_PECI 44
TC11 PAD @
TC12 PAD @
TC13 PAD
@
TC14 PAD @
TC162@PAD
TC163@PAD
GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
?
1 OF 20
3
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
JTAG
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TRST#
?
JTAGX
?
C47
C46
D46
C45
A45
B45
A47
B47
E45
F45
B52
G50
F50
E48
F48
G46
F46
L9
L7
L6
N9
L10
R12
R11
U13
B61
D60
A61
C60
B59
B56
D59
A56
C59
C61
A59
CPU_EDP_TX0-
CPU_EDP_TX0+
CPU_EDP_TX1ĀCPU_EDP_TX1+
CPU_EDP_AUX#
CPU_EDP_AUX
VGA_AUX#
VGA_AUX
HDMI_HPD
DP_VGA_HPD
GPP_E15
CPU_EDP_HPD
PCH_ENBKL
PCH_EDP_PWM
PCH_ENVDD
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_JTAG_TRST#
JTAGX
1 2
RC1601 10K_0402_5%@
1 2
1 2
1
+3VS
+VCCSTG
2
CPU_EDP_TX0- 33
CPU_EDP_TX0+ 33
CPU_EDP_TX1- 33
CPU_EDP_TX1+ 33
CPU_EDP_AUX# 33
CPU_EDP_AUX 33
VGA_AUX# 35
VGA_AUX 35
HDMI_HPD 34
1 2
RC181 0_0402_5%@
PCH_ENBKL 33
PCH_EDP_PWM 33
PCH_ENVDD 33
XDP_TCK
XDP_TDO
1
PAD @
TC15
1
PAD
@
TC16
1
1
1
1
1
1
1
1
1
TC17
TC18
TC27
TC29
TC31
TC35
TC36
TC42
TC43
PAD
PAD
PAD @
PAD @
PAD @
PAD @
PAD @
PAD @
PAD
@
@
@
confirmed with ITE, the HPD
pull down resistor should follow
ITE recommended resistor 4.7k~10Kohm
GPP_E15
2
RC37
100K_0402_5%
1
1
RC13
100K_0402_5%
2
1 2
RC1546 0_0402_5%@
1
RC1547 0_0402_5%
XDP_TDI PCH_JTAG_TDI
XDP_TMS
XDP_TRST#
2
@
RC1548 0_0402_5%@
RC1549 0_0402_5%@
RC1550 0_0402_5%@
1 2
1 2
1 2
DP_VGA_HPD 35
EC_SCI# 44
CPU_EDP_HPD 33
JTAGX
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_JTAG_TRST#
check JTAG circuit?
RC1551 51_0402_5%
RC1543 51_0402_5%
C
B
DDP*_CTRLDATA strapping sampled on t he rising edge of PWROK
Port
Strap Enable Disable
Port 1
DDPB_CTRLDATA
Port 2
DDPC_CTRLDATA
A
5
Pull up to 3.3 V
with 2.2Kohm
Pull up to 3.3 V
with 2.2Kohm
NC
NC
A
Titl e
Titl e
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WR ITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WR ITTEN CONSENT OF LC FUTURE CENTER.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WR ITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Fut ure Center Secret Data
LC Fut ure Center Secret Data
LC Fut ure Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Titl e
MCP (DDI,EDP)
MCP (DDI,EDP)
MCP (DDI,EDP)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
4 60
4 60
of
4 60
of
1.0
1.0
1.0
5
DDRA_DQ[0..63] 17
D D
C
DDRA_DQ0
DDRA_DQ1
DDRA_DQ2
DDRA_DQ3
DDRA_DQ4
DDRA_DQ5
DDRA_DQ6
DDRA_DQ7
DDRA_DQ8
DDRA_DQ9
DDRA_DQ10
DDRA_DQ11
DDRA_DQ12
DDRA_DQ13
DDRA_DQ14
DDRA_DQ15
DDRA_DQ16
DDRA_DQ17
DDRA_DQ18
DDRA_DQ19
DDRA_DQ20
DDRA_DQ21
DDRA_DQ22
DDRA_DQ23
DDRA_DQ24
DDRA_DQ25
DDRA_DQ26
DDRA_DQ27
DDRA_DQ28
DDRA_DQ29
DDRA_DQ30
DDRA_DQ31
DDRA_DQ32
DDRA_DQ33
DDRA_DQ34
DDRA_DQ35
DDRA_DQ36
DDRA_DQ37
DDRA_DQ38
DDRA_DQ39
DDRA_DQ40
DDRA_DQ41
DDRA_DQ42
DDRA_DQ43
DDRA_DQ44
DDRA_DQ45
DDRA_DQ46
DDRA_DQ47
DDRA_DQ48
DDRA_DQ49
DDRA_DQ50
DDRA_DQ51
DDRA_DQ52
DDRA_DQ53
DDRA_DQ54
DDRA_DQ55
DDRA_DQ56
DDRA_DQ57
DDRA_DQ58
DDRA_DQ59
DDRA_DQ60
DDRA_DQ61
DDRA_DQ62
DDRA_DQ63
4
UC1B
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
SKYLAKE-U_BGA1356
REV = 1
@
?
SKL_ULT
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]
DDR CH - A
1 OF 20
DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_MA[3]
DDR0_MA[4]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR_VTT_CNTL
3
AU53
AT53
AU55
AT55
BA56
BB56
AW56
AY56
AU45
AU43
AT45
AT43
BA51
BB54
BA52
AY52
AW52
AY55
AW54
BA54
BA55
AY54
AU46
AU48
AT46
AU50
AU52
AY51
AT48
AT50
BB50
AY50
BA50
BB52
DDRA_DQS#0
AM70
DDRA_DQS0
AM69
DDRA_DQS#1
AT69
DDRA_DQS1
AT70
DDRA_DQS#2
BA64
DDRA_DQS2
AY64
DDRA_DQS#3
AY60
DDRA_DQS3
BA60
DDRA_DQS#4
BA38
DDRA_DQS4
AY38
DDRA_DQS#5
AY34
DDRA_DQS5
BA34
DDRA_DQS#6
BA30
DDRA_DQS6
AY30
DDRA_DQS#7
AY26
DDRA_DQS7
BA26
AW50
AT52
AY67
AY68
BA67
DDR_VTT_CNTL
AW67
?
DDRA_CLK0# 17
DDRA_CLK0 17
DDRA_CKE0 17
DDRA_CS0# 17
DDRA_ODT0 17
DDRA_MA5 17
DDRA_MA9 17
DDRA_MA6 17
DDRA_MA8 17
DDRA_MA7 17
DDRA_BG0 17
DDRA_MA12 17
DDRA_MA11 17
DDRA_ACT# 17
DDRA_MA13 17
DDRA_MA15_CAS# 17
DDRA_MA14_WE# 17
DDRA_MA16_RAS# 17
DDRA_BS0# 17
DDRA_MA2 17
DDRA_BS1# 17
DDRA_MA10 17
DDRA_MA1 17
DDRA_MA0 17
DDRA_MA3 17
DDRA_MA4 17
DDRA_ALERT# 17
DDRA_PAR 17
DDR_SA_VREFCA 17
DDR_SB_VREFCA 18
DDRA_DQS#[0..7]
DDRA_DQS[0..7]
2
DDRA_DQS#[0..7] 17
DDRA_DQS[0..7] 17
SMVREF
WIDTH:20MIL
SPACING: 20MIL
1
C
B
+3VALW
1
RC30
100K_0402_5%
B
2
+1.2V
1
RC3
1K_0402_5%
DDR_VTT_CNTL
A
5
4
2
2
RC29
10K_0402_5%
1
C
QC18
B
E
3
MMBT3904WH_SOT323-3
@
1 2
CPU_DRAMPG_CNTL 55
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF LC FUTU RE C ENTER . AND C ONTAIN S CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF LC FUTU RE C ENTER . AND C ONTAIN S CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF LC FUTU RE C ENTER . AND C ONTAIN S CONF IDENTIAL
AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D
AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D
AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE U SED BY OR DISCLOSED TO ANY T HIRD PARTY W ITHOUT PR IOR WRITTEN CONSENT OF LC F UTURE CENT ER.
MAY BE U SED BY OR DISCLOSED TO ANY T HIRD PARTY W ITHOUT PR IOR WRITTEN CONSENT OF LC F UTURE CENT ER.
MAY BE U SED BY OR DISCLOSED TO ANY T HIRD PARTY W ITHOUT PR IOR WRITTEN CONSENT OF LC F UTURE CENT ER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
Title
Title
MCP (DDR4)
MCP (DDR4)
MCP (DDR4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
of
5 60
of
5 60
of
5 60
A
1.0
1.0
1.0
5
DDRB_DQ[0..63] 18
D D
C
B
DDRB_DQ0
DDRB_DQ1
DDRB_DQ2
DDRB_DQ3
DDRB_DQ4
DDRB_DQ5
DDRB_DQ6
DDRB_DQ7
DDRB_DQ8
DDRB_DQ9
DDRB_DQ10
DDRB_DQ11
DDRB_DQ12
DDRB_DQ13
DDRB_DQ14
DDRB_DQ15
DDRB_DQ16
DDRB_DQ17
DDRB_DQ18
DDRB_DQ19
DDRB_DQ20
DDRB_DQ21
DDRB_DQ22
DDRB_DQ23
DDRB_DQ24
DDRB_DQ25
DDRB_DQ26
DDRB_DQ27
DDRB_DQ28
DDRB_DQ29
DDRB_DQ30
DDRB_DQ31
DDRB_DQ32
DDRB_DQ33
DDRB_DQ34
DDRB_DQ35
DDRB_DQ36
DDRB_DQ37
DDRB_DQ38
DDRB_DQ39
DDRB_DQ40
DDRB_DQ41
DDRB_DQ42
DDRB_DQ43
DDRB_DQ44
DDRB_DQ45
DDRB_DQ46
DDRB_DQ47
DDRB_DQ48
DDRB_DQ49
DDRB_DQ50
DDRB_DQ51
DDRB_DQ52
DDRB_DQ53
DDRB_DQ54
DDRB_DQ55
DDRB_DQ56
DDRB_DQ57
DDRB_DQ58
DDRB_DQ59
DDRB_DQ60
DDRB_DQ61
DDRB_DQ62
DDRB_DQ63
4
AF65
AF64
AK65
AK64
AF66
AF67
AK67
AK66
AF70
AF68
AH71
AH68
AF71
AF69
AH70
AH69
AT66
AU66
AP65
AN65
AN66
AP66
AT65
AU65
AT61
AU61
AP60
AN60
AN61
AP61
AT60
AU60
AU40
AT40
AT37
AU37
AR40
AP40
AP37
AR37
AT33
AU33
AU30
AT30
AR33
AP33
AR30
AP30
AU27
AT27
AT25
AU25
AP27
AN27
AN25
AP25
AT22
AU22
AU21
AT21
AN22
AP22
AP21
AN21
UC1C
DDR1_DQ[0]/DDR0_DQ[16]
DDR1_DQ[1]/DDR0_DQ[17]
DDR1_DQ[2]/DDR0_DQ[18]
DDR1_DQ[3]/DDR0_DQ[19]
DDR1_DQ[4]/DDR0_DQ[20]
DDR1_DQ[5]/DDR0_DQ[21]
DDR1_DQ[6]/DDR0_DQ[22]
DDR1_DQ[7]/DDR0_DQ[23]
DDR1_DQ[8]/DDR0_DQ[24]
DDR1_DQ[9]/DDR0_DQ[25]
DDR1_DQ[10]/DDR0_DQ[26]
DDR1_DQ[11]/DDR0_DQ[27]
DDR1_DQ[12]/DDR0_DQ[28]
DDR1_DQ[13]/DDR0_DQ[29]
DDR1_DQ[14]/DDR0_DQ[30]
DDR1_DQ[15]/DDR0_DQ[31]
DDR1_DQ[16]/DDR0_DQ[48]
DDR1_DQ[17]/DDR0_DQ[49]
DDR1_DQ[18]/DDR0_DQ[50]
DDR1_DQ[19]/DDR0_DQ[51]
DDR1_DQ[20]/DDR0_DQ[52]
DDR1_DQ[21]/DDR0_DQ[53]
DDR1_DQ[22]/DDR0_DQ[54]
DDR1_DQ[23]/DDR0_DQ[55]
DDR1_DQ[24]/DDR0_DQ[56]
DDR1_DQ[25]/DDR0_DQ[57]
DDR1_DQ[26]/DDR0_DQ[58]
DDR1_DQ[27]/DDR0_DQ[59]
DDR1_DQ[28]/DDR0_DQ[60]
DDR1_DQ[29]/DDR0_DQ[61]
DDR1_DQ[30]/DDR0_DQ[62]
DDR1_DQ[31]/DDR0_DQ[63]
DDR1_DQ[32]/DDR1_DQ[16]
DDR1_DQ[33]/DDR1_DQ[17]
DDR1_DQ[34]/DDR1_DQ[18]
DDR1_DQ[35]/DDR1_DQ[19]
DDR1_DQ[36]/DDR1_DQ[20]
DDR1_DQ[37]/DDR1_DQ[21]
DDR1_DQ[38]/DDR1_DQ[22]
DDR1_DQ[39]/DDR1_DQ[23]
DDR1_DQ[40]/DDR1_DQ[24]
DDR1_DQ[41]/DDR1_DQ[25]
DDR1_DQ[42]/DDR1_DQ[26]
DDR1_DQ[43]/DDR1_DQ[27]
DDR1_DQ[44]/DDR1_DQ[28]
DDR1_DQ[45]/DDR1_DQ[29]
DDR1_DQ[46]/DDR1_DQ[30]
DDR1_DQ[47]/DDR1_DQ[31]
DDR1_DQ[48]
DDR1_DQ[49]
DDR1_DQ[50]
DDR1_DQ[51]
DDR1_DQ[52]
DDR1_DQ[53]
DDR1_DQ[54]
DDR1_DQ[55]
DDR1_DQ[56]
DDR1_DQ[57]
DDR1_DQ[58]
DDR1_DQ[59]
DDR1_DQ[60]
DDR1_DQ[61]
DDR1_DQ[62]
DDR1_DQ[63]
SKYLAKE-U_BGA1356
REV = 1
@
3
?
SKL_ULT
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR CH - B
1 OF 20
DDR1_ODT[1]
DDR1_MA[3]
DDR1_MA[4]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_ALERT#
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]
DDR1_PAR
AN45
AN46
AP45
AP46
AN56
AP55
AN55
AP53
BB42
AY42
BA42
AW42
AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52
BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47
AH66
AH65
AG69
AG70
AR66
AR65
AR61
AR60
AT38
AR38
AT32
AR32
AR25
AR27
AR22
AR21
AN43
AP43
AT13
AR18
AT18
AU18
?
DDRB_DQS#0
DDRB_DQS0
DDRB_DQS#1
DDRB_DQS1
DDRB_DQS#2
DDRB_DQS2
DDRB_DQS#3
DDRB_DQS3
DDRB_DQS#4
DDRB_DQS4
DDRB_DQS#5
DDRB_DQS5
DDRB_DQS#6
DDRB_DQS6
DDRB_DQS#7
DDRB_DQS7
CPU_DRAMRST#_R
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
2
DDRB_CLK0# 18
DDRB_CLK1# 18
DDRB_CLK0 18
DDRB_CLK1 18
DDRB_CKE0 18
DDRB_CKE1 18
DDRB_CS0# 18
DDRB_CS1# 18
DDRB_ODT0 18
DDRB_ODT1 18
DDRB_MA5 18
DDRB_MA9 18
DDRB_MA6 18
DDRB_MA8 18
DDRB_MA7 18
DDRB_BG0 18
DDRB_MA12 18
DDRB_MA11 18
DDRB_ACT# 18
DDRB_BG1 18
DDRB_MA13 18
DDRB_MA15_CAS# 18
DDRB_MA14_WE# 18
DDRB_MA16_RAS# 18
DDRB_BS0# 18
DDRB_MA2 18
DDRB_BS1# 18
DDRB_MA10 18
DDRB_MA1 18
DDRB_MA0 18
DDRB_MA3 18
DDRB_MA4 18
DDRB_DQS#[0..7]
DDRB_DQS[0..7]
DDRB_ALERT# 18
DDRB_PAR 18
1
RC24 121_0402_1%
RC25 80.6_0402_1%
RC26 100_0402_1%
2
2
1
2
1
1
DDRB_DQS#[0..7] 18
DDRB_DQS[0..7] 18
C
B
+1.2V
1 2
RC22
470_0402_5%
1
2015/08/20
2015/08/20
2015/08/20
2
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
CPU_DRAMRST# 17,18
A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
1
CC1
0.01U_0201_25V6-K
EMC_NS@
2
3
RC23 0_0402_5%@
CPU_DRAMRST#_R
2
2016/08/20
2016/08/20
2016/08/20
Title
Title
Title
MCP (DDR4)
MCP (DDR4)
MCP (DDR4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
6 60
6 60
1
6 60
A
1.0
1.0
1.0
5
2
1
SPI_CLK 44
SPI_SO 44
D D
SPI_SI 44
SPI_CS0# 44
Check with BIOS, SPI is Dual mode or quad mode
SPI_WP#_R
C
B
A
RC54 15_0402_5%
SPI_HOLD#_R
RC55 15_0402_5%@
SPI_WP#_R SPI_WP#_1
RC176 33_0402_5%@
SPI_HOLD#_R
RC178 33_0402_5%@
+3VALW_PCH
RC1568 20K_0402_5%
RC1565 20K_0402_5%@
RC1578 20K_0402_5%@
RC1580 20K_0402_5%
Follow CRB, need to check the strap ?
RC1567 4.7K_0402_5%@
RC1566 4.7K_0402_5%@
RC1581 4.7K_0402_5%@
RC64 1K_0402_5%ES@
Based on WW36 SKL U&Y WOM, RC64 populated,
and RC61 de-populated for SKL U ES sample.
In this cas e, custom ers must en sure tha t the
SPI flash device on the platfo rm
has HOLD functionality disabled by default.
RC1539 15_0402_5%
SPI_CLK_1
SPI_SO
SPI_SO_1
SPI_SI
SPI_SI_1
SPI_CS0#
SPI_CS1#
1
1
1
1
Follow CRB, need to check the strap ?
2
2
2
2
2
1
1
RC1538 33_0402_5%@
RC53 15_0402_5%
1
RC177 33_0402_5%@
1 2
RC52 15_0402_5%
1
1
RC175 33_0402_5%
1
RC51 0_0402_5%@
RC174 0_0402_5%@
1
1K_0402_5%
2
@
2
1K_0402_5%
2
2
@
1
1 2
1
1 2
@
1
1
1
2
@
RC60
RC179
@
2
2
2
2
2
2
+3V_SPI
1
2
+3V_SPI
1
2
SPI_SO_R
SPI_SI_R
SPI_WP#_R
SPI_HOLD#_R
SPI_SO_R
SPI_SI_R
SPI_WP#_R
SPI_HOLD#_R
1
2
1
2
RC61
1K_0402_5%
SPI_WP#
SPI_HOLD#
RC180
1K_0402_5%
@
SPI_HOLD#_1
SPI_SO_R
SPI_SI_R
SPI_CS0#_R
SPI_CS1#_R
BOARD_ID4 8
KBRST# 44
SERIRQ 32,44
+3VS
+3VALW_PCH
+3V_SPI
*
1. If support DS3, connect to +3VS and don't support EC mirror code;
2. If don't support DS3, connect to +3VALW_PCH and support EC mirror code.
SPI_CS0#
SPI_SO
SPI_WP#
SPI_CS1#
SPI_SO_1
SPI_WP#_1
1
2
3
1
2
3
4
SPI_CLK_R SPI_CLK SPI_CLK_R
SPI_SO_R
SPI_SI_R
SPI_WP#_R
SPI_HOLD#_R
SPI_CS0#_R
SPI_CS1#_R
BOARD_ID4
KBRST#
SERIRQ
1
RC171 0_0402_5%@
RC172 0_0402_5%@
1
UC3
CS#
DO
HOLD#
WP#
GND4DI
W25Q64FVSSIQ_SO8
UC6
CS#
VCC
DO
HOLD#
WP#
CLK
GND
W25Q32FVSSIQ_SO8
@
4
?
1
CC8
0.1u_0201_10V6K
2
CC97
0.1u_0201_10V6K
@
SKL_ULT
SMBUS, SMLINK
GPP_B23/SML1ALERT#/PCHHOT#
LPC
GPP_A5/LFRAME#/ESPI_CS#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
1 OF 20
check CLKRUN# / SUS_STAT# signal if need to connect
PM_CLKRUN#
SERIRQ
KBRST#
KBRST#
2.2K_0404_4P2R_5%
GPP_C2/SMBALERT#
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C7/SML1DATA
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A10/CLKOUT_LPC1
RC11 8.2K_0402_5%
RC12 10K_0402_5%
RC10 10K_0402_5%
CC1255 1000P_0201_50V7-K
PCH_SML1_CLK
PCH_SML1_DAT
UC1E
SPI - FLASH
AV2
SPI0_CLK
AW3
SPI0_MISO
AV3
SPI0_MOSI
AW2
SPI0_IO2
AU4
SPI0_IO3
AU3
SPI0_CS0#
AU2
SPI0_CS1#
AU1
SPI0_CS2#
SPI - TOUCH
M2
GPP_D1/SPI1_CLK
M3
GPP_D2/SPI1_MISO
J4
GPP_D3/SPI1_MOSI
V1
GPP_D21/SPI1_IO2
V2
GPP_D22/SPI1_IO3
M1
GPP_D0/SPI1_CS#
C LINK
G3
CL_CLK
G2
CL_DATA
G1
CL_RST#
AW13
GPP_A0/RCIN#
AY11
GPP_A6/SERIRQ
SKYLAKE-U_BGA1356
REV = 1
@
+3V_SPI
2
2
+3V_SPI
8
VCC
SPI_HOLD#
7
SPI_CLK
6
CLK
SPI_SI
5
+3V_SPI
8
SPI_HOLD#_1
7
SPI_CLK_1
6
SPI_SI_1
5
DI
1
2
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C3/SML0CLK
GPP_C6/SML1CLK
GPP_A8/CLKRUN#
1
1 2
1
1 2
EMC_NS@
+3VALW_PCH
RPC25
3
PCH_SMB_CLK
R7
PCH_SMB_DATA
R8
SMB_ALERT#
R10
SML0_CLK
R9
SML0_DATA
W2
SML0_ALERT#
W1
PCH_SML1_CLK
W3
PCH_SML1_DAT
V3
SML1_ALERT#
AM7
AY13
BA13
BB13
AY12
BA12
SUS_STAT#
BA11
CLK_PCI_EC_R
AW9
CLK_PCI_TPM_R
AY9
PM_CLKRUN#
AW11
?
DIMM, NGFF
GPU, EC, Thermal Sensor
LPC_AD0 32,44
LPC_AD1 32,44
LPC_AD2 32,44
LPC_AD3 32,44
LPC_FRAME# 32,44
RC173 22_0402_5%
TPM@
RC1541 22_0402_5%
2
+3VS
1
1 2
1
TC81@
CLK_PCI_EC 44
CLK_PCI_TPM 32
PM_CLKRUN# 32
2
2
RPC20
2.2K_0404_4P2R_5%
PCH_SMB_CLK
PCH_SMB_DATA
+3VALW_PCH
3
2
4
1
QC2A
SMB_ALERT#
SML0_CLK
SML0_DATA
+3VS
2
G
1
6
S
D
2N7002KDWH_SOT363-6
QC2B
2N7002KDWH_SOT363-6
2.2K_0404_4P2R_5%
5
G
3 4
D
2
2.2K_0402_5%
RPC23
4
3
+3VS
4
3
1
2
S
RC1562
1
1
2
2
SML0_ALERT#
This signal has a wea k internal pu ll-down.
0 = LPC Is selected for EC. (Default)
1 = eSPI Is selected for EC.
Notes:
1. The internal pull-do wn is disabled a fter RSMRST#
de-asserts.
2. This signal is in the primary wel
Rising edge of RSMRST#
SML1_ALERT#
+3VS
2
1 4
2 3
G
6 1
QC10A
D
2N7002KDWH_SOT363-6
@
S
3
QC10B
D
2N7002KDWH_SOT363-6
5
G
4
@
S
EC_SMB_CK2 20,39,44
EC_SMB_DA2 20,39,44
To e na b l e D i re c t C o nn e ct In t er f ac e (D C I) , a 1 5 0K p ull up resistor will need to be
added to PCHHOT# pin. This pin must be low during the rising e dge of RSMRST#.
(Refer to WW52_MOW)
1 2
RC1564 2.2K_0402_5%@
1
2
RC1569 150K_0402_5%
RPC24
2.2K_0404_4P2R_5%
+3VALW_PCH
+3VALW_PCH
+3VALW_PCH
+3VALW_PCH
1
SMB_CLK_S3 18,40
SMB_DATA_S3 18,40
C
B
A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF E NGINEERING DRAW ING IS THE P ROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF E NGINEERING DRAW ING IS THE P ROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF E NGINEERING DRAW ING IS THE P ROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET I NFORMATION. THIS SHE ET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SE CRET I NFORMATION. THIS SHE ET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SE CRET I NFORMATION. THIS SHE ET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC F UTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC F UTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC F UTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR DISCL OSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF LC F UTURE CENTER.
MAY BE USED B Y OR DISCL OSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF LC F UTURE CENTER.
5
4
3
MAY BE USED B Y OR DISCL OSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF LC F UTURE CENTER.
2015/08/20
2015/08/20
2015/08/20
LC Fut ure Center Secret Data
LC Fut ure Center Secret Data
LC Fut ure Center Secret Data
2
Deciphered Date
Deciphered Date
Deciphered Date
2016/08/20
2016/08/20
2016/08/20
Title
MCP (MISC,JTAG,SPI,LPC,SMB)
MCP (MISC,JTAG,SPI,LPC,SMB)
MCP (MISC,JTAG,SPI,LPC,SMB)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
1
CG413
CG413
CG413
7 60
7 60
of
7 60
of
1.0
1.0
1.0
5
+3VS
RC1559 10K_0402_5%OPT@
RC1641 10K_0402_5%@
RC1629 10K_0402_5%@
RC1630 10K_0402_5%GC6@
D D
RC1637 10K_0402_5%OPT@
RC1638 10K_0402_5%@
RC1557 10K_0402_5%OPT@
RC1558 10K_0402_5%UMA@
CC1259 0.01U_0201_10V6K
+3VS
C
+3VALW_PCH
*
HDA_SDO This signal has a w eak internal pull-down.
0 = Enable security measures def ined in the Flash Descriptor.
1 = Disable Flash Descriptor Security(override). This strap
should only be asserted high during external pull-up in
manufacturing/debug environments ONLY.
1 2
2
1
1
2
1
2
1
2
2
1
1
2
1 2
1 2
2
RC1595 10K_0402_5%3D@
2
RC1596 10K_0402_5%
2
RC1597 10K_0402_5%
double check if need the pull up resisor
+3VS
RC1600 1K_0402_5%@
RC47 1K_0402_5%@
For EMI
1
CC7
10P_0201_50V8F
EMC_NS@
2
HDA_SDOUT_AUDIO 43
B
ME_FLASH 44
PXS_PWREN_R
PXS_RST#_R
Reserve for GPU sequence
FB_GC6_EN_R
GPU_EVENT#
FB_GC6_EN_R
GPU_EVENT#
Reserve for NV GPU
PXS_RST#_R
DGPU_PWROK
PXS_RST#
1
1
1
1
1
PCH_CMOS_ON#
PCH_WLAN_OFF#
PCH_BT_OFF#
2
2
HDA_SDIN0
RC45 33_0402_5%
RC46 0_0402_5%@
RC1561 2.2K_0402_5%@
+3VS
PCH_CMOS_ON# 33
UART_RX_DEBUG 40
UART_TX_DEBUG 40
PXS_PWREN 22,58
PXS_RST# 20
DGPU_PWROK 24,57,58
FB_GC6_EN_R 20
3D_FR 31 GPU_EVENT# 20
PCH_WLAN_OFF# 40
PCH_BT_OFF# 40
HDA_SDOUT
HDA_SDOUT
2
1
2
1
RC1563 2.2K_0402_5%@
RC7 1K_0402_5%OPT@
RC8 0_0402_5%@
HDA_SYNC_AUDIO 43
HDA_BITCLK_AUDIO 43
HDA_SDIN0 43
HDA_RST_AUDIO# 43
PCH_BEEP 43
4
1
2
1
2
1
2
1
2
1 2
RC43 33_0402_5%
1
RC42 33_0402_5%
1
RC44 33_0402_5%
GPP_B18
PCH_CMOS_ON#
GPP_B22
PXS_PWREN_R
PXS_RST#_R
DGPU_PWROK
FB_GC6_EN_R
3D_FR
PCH_WLAN_OFF#
PCH_BT_OFF#
2
2
+3VS
HDA_SYNC
HDA_BCLK
HDA_SDOUT
HDA_SDIN0
HDA_RST#
BOARD_ID10
BOARD_ID9
PCH_BEEP
1
RC14 2.2K_0402_5%@
UC1F
AN8
GPP_B15/GSPI0_CS#
AP7
GPP_B16/GSPI0_CLK
AP8
GPP_B17/GSPI0_MISO
AR7
GPP_B18/GSPI0_MOSI
AM5
GPP_B19/GSPI1_CS#
AN7
GPP_B20/GSPI1_CLK
AP5
GPP_B21/GSPI1_MISO
AN5
GPP_B22/GSPI1_MOSI
AB1
GPP_C8/UART0_RXD
AB2
GPP_C9/UART0_TXD
W4
GPP_C10/UART0_RTS#
AB3
GPP_C11/UART0_CTS#
AD1
GPP_C20/UART2_RXD
AD2
GPP_C21/UART2_TXD
AD3
GPP_C22/UART2_RTS#
AD4
GPP_C23/UART2_CTS#
U7
GPP_C16/I2C0_SDA
U6
GPP_C17/I2C0_SCL
U8
GPP_C18/I2C1_SDA
U9
GPP_C19/I2C1_SCL
AH9
GPP_F4/I2C2_SDA
AH10
GPP_F5/I2C2_SCL
AH11
GPP_F6/I2C3_SDA
AH12
GPP_F7/I2C3_SCL
AF11
GPP_F8/I2C4_SDA
AF12
GPP_F9/I2C4_SCL
SKYLAKE-U_BGA1356
REV = 1
@
2
3
?
AUDIO
SKL_ULT
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
1 OF 20
?
SKL_ULT
1 OF 20
LPSS ISH
UC1G
BA22
HDA_SYNC/I2S0_SFRM
AY22
HDA_BLK/I2S0_SCLK
BB22
HDA_SDO/I2S0_TXD
BA21
HDA_SDI0/I2S0_RXD
AY21
HDA_SDI1/I2S1_RXD
AW22
HDA_RST#/I2S1_SCLK
J5
GPP_D23/I2S_MCLK
AY20
I2S1_SFRM
AW20
I2S1_TXD
AK7
GPP_F1/I2S2_SFRM
AK6
GPP_F0/I2S2_SCLK
AK9
GPP_F2/I2S2_TXD
AK10
GPP_F3/I2S2_RXD
H5
GPP_D19/DMIC_CLK0
D7
GPP_D20/DMIC_DATA0
D8
GPP_D17/DMIC_CLK1
C8
GPP_D18/DMIC_DATA1
AW5
GPP_B14/SPKR
SKYLAKE-U_BGA1356
REV = 1
@
PCH_BEEP
GPP_D9
GPP_D10
GPP_D11
GPP_D12
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D15/ISH_UART0_RTS#
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
SDIO/SDXC
GPP_A17/SD_PWR_EN#/ISH_GP7
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
GPP_A12/BM_BUSY#/ISH_GP6
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_WP
GPP_A16/SD_1P8_SEL
SD_RCOMP
GPP_F23
?
2
RC1613
1
10K_0402_5%
2
RC1614
1
10K_0402_5%
@
@
TS@
NTS@
00
01
10
11
0
1
0
1
0
1
0
1
1
RC1632
2
10K_0402_5%
1
RC1635
2
10K_0402_5%
1
DUALRANK@
2
2
OPT@
RC1611
RC1609
1
1
10K_0402_5%
10K_0402_5%
SINGLERANK@
2
UMA@
RC1610
RC1612
1 2
1
10K_0402_5%
10K_0402_5%
14"
15"
17"
Reserved
Touch
DIS
SingleRankRC1607
DualRank
DualMIC
510Z@
1
RC1633
2
10K_0402_5%
310G@
1
RC1636
2
10K_0402_5%
DUALMIC@
2
RC1608
1
10K_0402_5%
SINGLEMIC@
2
RC1607
1
10K_0402_5%
Stuff R
RC1616
RC1614
RC1616 RC1613
RC1615
RC1614
RC1612
RC1611
RC1610
RC1609
RC1608
RC123
RC1606
@
KBL@
1
RC1639
2
10K_0402_5%
@
NKBL@
1
RC1640
2
10K_0402_5%
+3VS
+3VS
2
RC1606
1
10K_0402_5%
2
RC123
10K_0402_5%
1
1
RC1651
2
10K_0402_5%
1
RC1652
2
10K_0402_5%
2
15@
17@
BOARD_ID0
P2
BOARD_ID1
P3
P4
BOARD_ID3
P1
BOARD_ID6
M4
BOARD_ID5
N3
BOARD_ID7
N1
BOARD_ID8
N2
AD11
AD12
U1
U2
U3
U4
AC1
AC2
GPU_EVENT#
AC3
AB4
AY8
BA8
BB7
BA7
AY7
AW7
AP13
?
BOARD_ID2 9
BOARD_ID4 7
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
RC1615
1 2
10K_0402_5%
2
14or15@
14or17@
RC1616
1
10K_0402_5%
Board ID Description
Board_ID[0:1]
Board_ID2 Non-touch
Board_ID3 UMA
Board_ID4
AB11
AB13
AB12
W12
W11
W10
W8
W7
BA9
BB9
AB7
AF13
SD_RCOMP
1
RC49
200_0402_1%
2
BOARD_ID6
BOARD_ID7
BOARD_ID8
BOARD_ID9
BOARD_ID10
Board_ID5 SingleMIC
@
1
RC1631
2
10K_0402_5%
@
1
RC1634
2
10K_0402_5%
C
B
Default
Pin Name Strap Description Configuration
SPKR /
Top Swap
GPP_B14
Override
GSPI0_MOSI
No Reboot
/GPP_B18
GSPI1_MOSI
Boot BIOS
/GPP_B22
Strap Bit
BBS
Internal PD
0 = Disable ā Top Swapā
mode. (Default)
1 = Enable ā Top Swapā
mode.
Internal PD
0 = Disable ā No Rebootā
mode. (Default)
1 = Enable ā No Rebootā
mode
Internal PD
0 = SPI (Default)
1 = LPC
*
When
Value
Sampled
0*Rising edge
of PCH_PWROK
0*Rising edge
of PCH_PWROK
Rising edge
0
of PCH_PWROK
Board_ID
[6,7,9]
Board_ID8
A
Board_ID10
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF L C FU TURE CEN TER. AND CON TAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF L C FU TURE CEN TER. AND CON TAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF L C FU TURE CEN TER. AND CON TAINS CONF IDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Description Board ID
Samsung 8Gb
000
2133 MT/s
Hynix 8Gb
010
2133 MT/s
Micron 8Gb
100
2133 MT/s
Reserved
110
Samsung 8Gb
001
2400 MT/s
Hynix 8Gb
011
2400 MT/s
Micron 8Gb
101
2400 MT/s
Reserved 111
0
1
0
1K B L
Title
Title
Title
MCP (LPSS,ISH,AUDIO,SDIO)
MCP (LPSS,ISH,AUDIO,SDIO)
MCP (LPSS,ISH,AUDIO,SDIO)
Size Do cument Number Rev
Size Do cument Number Rev
Size Do cument Number Rev
Custom
Custom
Custom
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
Date: Sheet
Date: Sheet
Date: Sheet
Stuff R
RC1631
310G RC1636
510Z
RC1633
Non-KBL RC1652
RC1651
CG413
CG413
CG413
1
RC1635 RC1634
RC1632 RC1634
RC1635 RC1631
RC1632 RC1631
RC1635 RC1634
RC1640
RC1640
RC1640
RC1640
RC1639
RC1639 RC1632 RC1634
RC1639 RC1635 RC1631
RC1639 RC1632
of
8 60
of
8 60
8 60
of
A
1.0
1.0
1.0
5
4
3
2
1
D D
UC1H
PCIE/USB3/SATA
H13
PCIE1_RXN/USB3_5_RXN
G13
PCIE1_RXP/USB3_5_RXP
B17
PCIE1_TXN/USB3_5_TXN
A17
PCIE1_TXP/USB3_5_TXP
G11
PCIE2_RXN/USB3_6_RXN
F11
PCIE2_RXP/USB3_6_RXP
D16
PCIE2_TXN/USB3_6_TXN
C16
PCIE2_TXP/USB3_6_TXP
H16
PCIE3_RXN
G16
PCIE3_RXP
D17
PCIE3_TXN
C17
PCIE3_TXP
G15
PCIE4_RXN
F15
PCIE4_RXP
B19
PCIE4_TXN
A19
PCIE4_TXP
F16
PCIE5_RXN
E16
PCIE5_RXP
C19
PCIE5_TXN
D19
PCIE5_TXP
G18
PCIE6_RXN
F18
PCIE6_RXP
D20
PCIE6_TXN
C20
PCIE6_TXP
F20
PCIE7_RXN/SATA0_RXN
E20
PCIE7_RXP/SATA0_RXP
B21
PCIE7_TXN/SATA0_TXN
A21
PCIE7_TXP/SATA0_TXP
G21
PCIE8_RXN/SATA1A_RXN
F21
PCIE8_RXP/SATA1A_RXP
D21
PCIE8_TXN/SATA1A_TXN
C21
PCIE8_TXP/SATA1A_TXP
E22
PCIE9_RXN
E23
PCIE9_RXP
B23
PCIE9_TXN
A23
PCIE9_TXP
F25
PCIE10_RXN
E25
PCIE10_RXP
D23
PCIE10_TXN
C23
PCIE10_TXP
F5
PCIE_RCOMPN
E5
PCIE_RCOMPP
D56
PROC_PRDY#
D61
PROC_PREQ#
BB11
GPP_A7/PIRQA#
E28
PCIE11_RXN/SATA1B_RXN
E27
PCIE11_RXP/SATA1B_RXP
D24
PCIE11_TXN/SATA1B_TXN
C24
PCIE11_TXP/SATA1B_TXP
E30
PCIE12_RXN/SATA2_RXN
F30
PCIE12_RXP/SATA2_RXP
A25
PCIE12_TXN/SATA2_TXN
B25
PCIE12_TXP/SATA2_TXP
SKYLAKE-U_BGA1356
REV = 1
@
USB_OC0#
USB_OC1#
USB_OC3#
USB_OC2#
2
2
2
2
2
2
CC16 0.22U_0201_6.3V6-K
CC14 0.22U_0201_6.3V6-K OPT@
CC15 0.22U_0201_6.3V6-K OPT@
CC17 0.22U_0201_6.3V6-K OPT@
1
1
CC18 0.22U_0201_6.3V6-K OPT@
CC19 0.22U_0201_6.3V6-K OPT@
CC20 0.22U_0201_6.3V6-K OPT@
CC21 0.22U_0201_6.3V6-K OPT@
PCIE_PRX_DTX_N5
PCIE_PRX_DTX_P5
PCIE_PTX_DRX_N5
PCIE_PTX_DRX_P5
PCIE_PRX_DTX_N6
PCIE_PRX_DTX_P6
PCIE_PTX_DRX_N6
PCIE_PTX_DRX_P6
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
SATA_PTX_DRX_N0
SATA_PTX_DRX_P0
SATA_PRX_DTX_N1
SATA_PRX_DTX_P1
SATA_PTX_DRX_N1
SATA_PTX_DRX_P1
PCIE_CRX_GTX_N0
PCIE_CRX_GTX_P0
PCIE_CTX_GRX_N0
PCIE_CTX_GRX_P0
PCIE_CRX_GTX_N1
PCIE_CRX_GTX_P1
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_P1
PCIE_RCOMPN
PCIE_RCOMPP
XDP_PRDY#
XDP_PREQ#
PIRQA#
PCIE_CRX_GTX_N2
PCIE_CRX_GTX_P2
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_P2
PCIE_CRX_GTX_N3
PCIE_CRX_GTX_P3
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_P3
PCIE_PRX_DTX_N5 37
C
LAN
WLAN
SATA HDD
SATA ODD
B
PCIE_CRX_GTX_N[0..3] 20
PCIE_CRX_GTX_P[0..3] 20
PCIE_CTX_C_GRX_N[0..3] 20
PCIE_CTX_C_GRX_P[0..3] 20
A
DGPU
PCIE_PRX_DTX_P5 37
PCIE_PTX_C_DRX_N5 37
PCIE_PTX_C_DRX_P5 37
PCIE_PRX_DTX_N6 40
PCIE_PRX_DTX_P6 40
PCIE_PTX_C_DRX_N6 40
PCIE_PTX_C_DRX_P6 40
SATA_PRX_DTX_N0 42
SATA_PRX_DTX_P0 42
SATA_PTX_DRX_N0 42
SATA_PTX_DRX_P0 42
SATA_PRX_DTX_N1 42
SATA_PRX_DTX_P1 42
SATA_PTX_DRX_N1 42
SATA_PTX_DRX_P1 42
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P1
RC119 100_0402_1%
PCIE_RCOMPN and PCIE_RCOMPP
Trace Width: 12-15mil
Differential between RCOMPP/RCOMPN
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_P3
+3VS
1
2
CC22 0.1u_0201_10V6K
2
1
CC23 0.1u_0201_10V6K
1
2
CC24 0.1u_0201_10V6K
1
2
CC25 0.1u_0201_10V6K
1
OPT@
1 2
1
RPC2
2
7
6
5
1
TC20 PAD @
@
TC19 PAD
1
1 2
1
1
ODD_DETECT#
SATA0GP
SATA2GP
PIRQA#
1
1 8
2
3
4
10K_0804_8P4R_5%
SKL_ULT
10K_0804_8P4R_5%
?
1 OF 20
8
7
6
5
USB2
RPC17
SSIC / USB3
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
1
2
3
4
USB3_1_RXN
USB3_1_RXP
USB3_1_TXN
USB3_1_TXP
USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP
USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
USB3_4_RXN
USB3_4_RXP
USB3_4_TXN
USB3_4_TXP
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2_COMP
USB2_ID
USB2_VBUSSENSE
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E8/SATALED#
?
+3VALW_PCH
H8
G8
C13
D13
J6
H6
B13
A13
J10
H10
B15
A15
E10
F10
C15
D15
AB9
AB10
AD6
AD7
AH3
AJ3
AD9
AD10
AJ1
AJ2
AF6
AF7
AH1
AH2
AF8
AF9
AG1
AG2
AH7
AH8
AB6
AG3
AG4
A9
C9
D9
B9
J1
J2
J3
H2
H3
G4
H1
USB30_RX_N1
USB30_RX_P1
USB30_TX_N1
USB30_TX_P1
USB30_RX_N2
USB30_RX_P2
USB30_TX_N2
USB30_TX_P2
USB30_RX_N3
USB30_RX_P3
USB30_TX_N3
USB30_TX_P3
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB2_COMP
USB2_ID
USB2_VBUSSENSE
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
GPP_E4
GPP_E5
SATA0GP
ODD_DETECT#
SATA2GP
BOARD_ID2
GPP_E4
USB30_RX_N1 41
USB30_RX_P1 41
USB30_TX_N1 41
USB30_TX_P1 41
USB30_RX_N2 45
USB30_RX_P2 45
USB30_TX_N2 45
USB30_TX_P2 45
USB30_RX_N3 31
USB30_RX_P3 31
USB30_TX_N3 31
USB30_TX_P3 31
USB20_N1 41
USB20_P1 41
USB20_N2 45
USB20_P2 45
USB20_N3 45
USB20_P3 45
USB20_N4 33
USB20_P4 33
USB20_N5 30
USB20_P5 30
USB20_N6 33
USB20_P6 33
USB20_N7 40
USB20_P7 40
2
RC118 113_0402_1%
RC1626 0_0402_5%@
RC1627 1K_0402_5%
USB_OC1# 41
USB_OC2# 45
1
@
BOARD_ID2 8
RC1617 10K_0402_5%@
1
2
1
2
1
TC202 PAD
2016/05/03: Implement as Power Button
function for Windows RedStone support
1 2
LEFT USB (3.0)
Right USB (3.0) (Optional)
3D Camera (Optional)
LEFT USB (3.0)
RIGHT USB (2.0)
RIGHT USB (2.0)
Camera
Card reader
Touch panel
BT
USBRBIAS
Width 20Mil
Space 15Mil
Length 500Mil
1
+3VS
2
EC_SMI# 44
RC1628 0_0402_5%
C
B
A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
MCP (PCIE,SATA,USB3,USB2)
MCP (PCIE,SATA,USB3,USB2)
MCP (PCIE,SATA,USB3,USB2)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet of
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
of
9 60
9 60
1
9 60
1.0
1.0
1.0
5
D D
check the Pull up resistor
+3VS
RPC4
1
8
2
7
3
6
5
4
10K_0804_8P4R_5%
C
PCIE CLK0 D GPU
PCIE CLK4
PCIE CLK5
B
GPU_CLKREQ#
LAN_CLKREQ#
WLAN_CLKREQ#
LAN
WLAN
CLK_PCIE_GPU# 20
CLK_PCIE_GPU 20
GPU_CLKREQ# 20
CLK_PCIE_LAN# 37
CLK_PCIE_LAN 37
LAN_CLKREQ# 37
CLK_PCIE_WLAN# 40
CLK_PCIE_WLAN 40
WLAN_CLKREQ# 40
4
CLK_PCIE_GPU#
CLK_PCIE_GPU
GPU_CLKREQ#
CLK_PCIE_LAN#
CLK_PCIE_LAN
LAN_CLKREQ#
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
WLAN_CLKREQ#
A36
CSI2_DN0
B36
CSI2_DP0
C38
CSI2_DN1
D38
CSI2_DP1
C36
CSI2_DN2
D36
CSI2_DP2
A38
CSI2_DN3
B38
CSI2_DP3
C31
CSI2_DN4
D31
CSI2_DP4
C33
CSI2_DN5
D33
CSI2_DP5
A31
CSI2_DN6
B31
CSI2_DP6
A33
CSI2_DN7
B33
CSI2_DP7
A29
CSI2_DN8
B29
CSI2_DP8
C28
CSI2_DN9
D28
CSI2_DP9
A27
CSI2_DN10
B27
CSI2_DP10
C27
CSI2_DN11
D27
CSI2_DP11
SKYLAKE-U_BGA1356
REV = 1
@
UC1J
D42
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
AR10
GPP_B5/SRCCLKREQ0#
B42
CLKOUT_PCIE_N1
A42
CLKOUT_PCIE_P1
AT7
GPP_B6/SRCCLKREQ1#
D41
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2#
D40
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3
AT10
GPP_B8/SRCCLKREQ3#
B40
CLKOUT_PCIE_N4
A40
CLKOUT_PCIE_P4
AU8
GPP_B9/SRCCLKREQ4#
E40
CLKOUT_PCIE_N5
E38
CLKOUT_PCIE_P5
AU7
GPP_B10/SRCCLKREQ5#
SKYLAKE-U_BGA1356
REV = 1
@
UC1I
CSI-2
SKL_ULT
SKL_ULT
CLOCK SIGNALS
?
EMMC
GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7
GPP_F21/EMMC_RCLK
GPP_F12/EMMC_CMD
1 OF 20
?
1 OF 20
3
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
GPP_F22/EMMC_CLK
EMMC_RCOMP
?
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
GPD8/SUSCLK
XCLK_BIASREF
C37
D37
C32
D32
C29
D29
B26
A26
E13
B7
AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1
AM2
AM3
AP4
AT1
XTAL24_IN
XTAL24_OUT
RTCX1
RTCX2
SRTCRST#
RTCRST#
?
CSI2_COMP
EMMC_RCOMP
F43
E43
BA17
E37
E35
E42
AM18
AM20
AN18
AM16
1
RC73 100_0402_1%
1
RC50 200_0402_1%
CLK_PCIE_XDP#
CLK_PCIE_XDP
SUSCLK
XTAL24_IN
XTAL24_OUT
DIFFCLK_BIASREF
RTC_X1
RTC_X2
SRTC_RST#
RTC_RST#
1
1
RC72 2.7K_0402_1%
VCCRTC
2
2
2
TC85 @
TC87 @
SUSCLK 40
2
1
1U_0402_6.3V6K
1 2
RC33 20K_0402_1%
1
RC34 20K_0402_1%
2
1U_0402_6.3V6K
+VCCCLK5
CC3
CC6
1
2
1
2
SRTC_RST#
RTC_RST#
1
JCMOS1
SHORT PADS
@
2
SUSCLK
DIFFCLK_BIASREF
RC1624
1
1 2
RC95 1K_0402_5%@
1
Cannonlake@
2
0_0402_5%
2
RC1555 60.4_0402_1%
1
@
EC_RTC_RST# 44
C
B
1
2
RC71 1M_0402_5%
YC2
1
2
GND12OSC2
1
OSC1
24MHZ_6PF_7V24000032
XTAL24_IN
CC12
3.3P_0402_50V8-C
A
5
need to use 38.4MHz (30ohm) for Cannonlake-u
4
GND2
3
4
XTAL24_OUT
1
CC11
2.7P_0402_50V9-B
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
RC32 10M_0402_5%
32.768KHZ_9PF_X1A0001410002
2
CC4
7P_0402_50V8J
1
2015/08/20
2015/08/20
2015/08/20
1 2
YC1
1
2
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
RTC_X1
RTC_X2
2
CC5
7P_0402_50V8J
1
Deciphered Date
Deciphered Date
Deciphered Date
when single end external clock generator used,
this pin should be grounded
Title
Title
Title
MCP (CSI2,EMMC,CLOCK)
MCP (CSI2,EMMC,CLOCK)
MCP (CSI2,EMMC,CLOCK)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
2
2016/08/20
2016/08/20
2016/08/20
A
1.0
1.0
10 60
10 60
1
10 60
1.0
of
of
5
1
1
1
1 2
1
1
2
2
PLT_RST# 20,32,37,40,44
EC_RSMRST# 44
SYS_PWROK 44
PCH_PWROK 44
SUSWARN# 44
SUSACK# 44
PCIE_WAKE# 37,40,44
AC_PRESENT_R
BATLOW#
WAKE#
PCH_LAN_WAKE#
SUSWARN#_R
SYS_RESET#
2
2
2
2
PCH_RSMRST#_R
CC1254 1000P_0201_50V7-K
EMC_NS@
Stuff to fix Reset&PWRGD test fail issue
PCH_PWROK
CC104 0.01U_0201_10V6K
PCH_DPWROK_R
CC103 1000P_0201_50V7-K
EMC_NS@
SYS_PWROK
CC101 47P_0201_25V8-J
EC_RSMRST#
CC1260 0.01U_0201_10V6K
VCCST_PWRGD_R
TC21 PAD@
1
Reserve for DS3
Follow CRB change to 1kohm
D D
+3VALW
1 2
RC74 10K_0402_5%
1 2
RC75 8.2K_0402_5%
2
RC76 1K_0402_5%
1 2
C
B
RC90 10K_0402_5%
+3VALW_PCH
1
RC78 10K_0402_5%@
+3VS
1
RC80 10K_0402_5%
4
1
1 2
1
1 2
1 2
1
1 2
1
2
2
2
2
RC84 0_0402_5%@
RC85 0_0402_5%@
RC93 60.4_0402_1%
RC139 0_0402_5%@
RC126 0_0402_5%@
RC86 0_0402_5%@
RC79 0_0402_5%@
RC91 0_0402_5%@
EC_VCCST_PWRGD 44
PLT_RST#_R
SYS_RESET#
PCH_RSMRST#_R
CPU_PROCPWRGD
VCCST_PWRGD
SYS_PWROK_R
PCH_PWROK_R
PCH_DPWROK_R
SUSWARN#_R
SUSACK#_R
WAKE#
PCH_LAN_WAKE#
RC138 0_0402_5%@
UC1K
SYSTEM POWER MANAGEMENT
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PWROK
AR13
GPP_A13/SUSWARN#/SUSPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
SKYLAKE-U_BGA1356
REV = 1
@
1
2
1
CC46
0.01U_0201_25V6-K
EMC_NS@
2
3
SKL_ULT
2
G
?
1 OF 20
+3VALW
2
RC136
10K_0402_5%
@
1
6 1
D
QC6A
2N7002KDWH_SOT363-6
@
S
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
SLP_SUS#
SLP_LAN#
GPD9/SLP_WLAN#
GPD6/SLP_A#
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW#
GPP_A11/PME#
GPP_B11/EXT_PWR_GATE#
INTRUDER#
GPP_B2/VRALERT#
+VCCST_CPU
5
G
AT11
AP15
BA16
AY16
AN15
AW15
BB17
AN16
BA15
AY15
AU13
AU11
AP16
AM10
AM11
?
2
RC137
1K_0402_5%
1
3
D
QC6B
2N7002KDWH_SOT363-6
@
S
4
PM_SLP_S3#_R
PM_SLP_S4#_R
PM_SLP_SUS#_R
PBTN_OUT#_R
AC_PRESENT_R
BATLOW#
PME#
INTVRMEN
+VCCSTG
2
1
2
1
TC89@
AC_PRESENT 44
RC1554
1K_0402_5%
@
VCCST_PWRGD_R
2
1
RC96 0_0402_5%@
1 2
RC97 0_0402_5%@
2
1
RC89 0_0402_5%@
Reserve for DS3
1 2
RC87 0_0402_5%@
1
2
RC41 330K_0402_5%
1
RC88 0_0402_5%@
ACIN# 44
2
CC140
1000P_0201_50V7-K
EMC_NS@
1
2
VCCRTC
2
G
PM_SLP_S3# 13,44
PM_SLP_S4# 44
PM_SLP_SUS# 44
PBTN_OUT# 44
AC_PRESENT_R
1
D
QC8
2N7002KW_SOT323-3
@
S
3
1
Add to fix Reset&PWRGD test fail issue
1
RPC21
1
8
2
7
3 6
5
4
10K_0804_8P4R_5%
PCH_RSMRST#_R
PCH_PWROK
SYS_PWROK
PM_SLP_S3#
1 2
DC4
RB751V-40_SOD323-2
RC1599 0_0402_5%@
@
2
C
B
1
PLT_RST#_R
1
2
RC92 100K_0402_5%
PCH_DPWROK_R
1
2
RC94 100K_0402_1% @
PCH_DPWROK_R
RC182 0_0402_5%@
RC81 0_0402_5%@
2
1
2
Reserve for DS3
A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
EC_RSMRST#
DPWROK_EC 44
MCP (SYSTEM PWR MANAGEMENT)
MCP (SYSTEM PWR MANAGEMENT)
MCP (SYSTEM PWR MANAGEMENT)
CG413
CG413
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
11 60
of
of
11 60
of
1
11 60
A
1.0
1.0
1.0
5
+CPU_CORE
D D
1
@
TC90
+V_EDRAM_VR
1
TC92@
+V1.8S_EDRAM
1
TC94@
1
@
TC95
1
TC97@
1
+VCCEOPIO
TC99@
1
TC100
@
1
TC101
@
C
+CPU_CORE
13x10uF 0402, SIT update to 0603 package
1
1
CC1085
CC1086
2
2
10U_0402_6.3V6M
10U_0402_6.3V6M
CD@
@
A30
A34
A39
A44
AK33
AK35
AK37
AK38
AK40
AL33
AL37
AL40
AM32
AM33
AM35
AM37
AM38
G30
K32
AK32
AB62
P62
V62
H63
G61
AC63
AE63
AE62
AG62
AL63
AJ62
1
CC1080
2
10U_0603_6.3V6M
UC1L
VCC_A30
VCC_A34
VCC_A39
VCC_A44
VCC_AK33
VCC_AK35
VCC_AK37
VCC_AK38
VCC_AK40
VCC_AL33
VCC_AL37
VCC_AL40
VCC_AM32
VCC_AM33
VCC_AM35
VCC_AM37
VCC_AM38
VCC_G30
RSVD_K32
RSVD_AK32
VCCOPC_AB62
VCCOPC_P62
VCCOPC_V62
VCC_OPC_1P8_H63
VCC_OPC_1P8_G61
VCCOPC_SENSE
VSSOPC_SENSE
VCCEOPIO_AE62
VCCEOPIO_AG62
VCCEOPIO_SENSE
VSSEOPIO_SENSE
SKYLAKE-U_BGA1356
REV = 1
@
SKL_ULT
CPU POWER 1 OF 4
1
CC1236
2
10U_0603_6.3V6M
?
G32
VCC_G32
G33
VCC_G33
G35
VCC_G35
G37
VCC_G37
G38
VCC_G38
G40
VCC_G40
G42
VCC_G42
J30
VCC_J30
J33
VCC_J33
J37
VCC_J37
J40
VCC_J40
K33
VCC_K33
K35
VCC_K35
K37
VCC_K37
K38
VCC_K38
K40
VCC_K40
K42
VCC_K42
K43
VCC_K43
E32
VCC_SENSE
E33
VSS_SENSE
B63
VIDALERT#
A63
VIDSCK
D64
VIDSOUT
G20
VCCSTG_G20
1
2
1 OF 20
CC1237
10U_0603_6.3V6M
?
1
1
CC1093
2
1
CC1092
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
+CPU_CORE
VCORE_VCC_SEN
VCORE_VSS_SEN
CPU_SVID_ALERT#_R
CPU_SVID_CLK_R
CPU_SVID_DAT_R
CC1091
10U_0603_6.3V6M
4
1
2
CC1089
10U_0603_6.3V6M
VCORE_VCC_SEN 59
VCORE_VSS_SEN 59
+VCCSTG
1
CC1238
2
10U_0603_6.3V6M
VCORE_VCC_SEN
VCORE_VSS_SEN
1
RC77 100_0402_1%
RC82 100_0402_1%
+VCC_GT
2
1
2
VR_SVID_ALRT# 59
VR_SVID_CLK 59
VR_SVID_DAT 59
Backside Cap 8x10uF 0402, SIT update
1
2
@
1
1
CC1122
CC1124
CC1123
2
2
10U_0402_6.3V6M
10U_0402_6.3V6M
@
@
10U_0402_6.3V6M
3
+CPU_CORE
VCCGT_VCC_SEN
VCCGT_VSS_SEN
SVID
2
1
+VCCST_CPU
1
1
RC131
2
56_0402_5%
RC132
RC1544
2
100_0402_1%
100_0402_1%
@
RC133 220_0402_1%
RC134 0_0402_5%
RC1545 0_0402_5%
1, Alert# Route Between CLK and Data
1
2
1
1
CC1125
CC1126
2
2
10U_0402_6.3V6M
10U_0402_6.3V6M
CD@
@
1
1
CC1127
CC1129
CC1128
2
2
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CD@
1
1
CC42
0.1u_0201_10V6K
@
2
2
2
2
2
RC83 100_0402_1%
RC98 100_0402_1%
1
2
1
1
@
1
@
+VCC_GT
CPU_SVID_ALERT#_R
CPU_SVID_CLK_R
CPU_SVID_DAT_R
VCCGT_VCC_SEN 59
VCCGT_VSS_SEN 59
2
VCCGT_VCC_SEN
VCCGT_VSS_SEN
+VCC_GT
UC1M
A48
VCCGT_A48
A53
VCCGT_A53
A58
VCCGT_A58
A62
VCCGT_A62
A66
VCCGT_A66
AA63
VCCGT_AA63
AA64
VCCGT_AA64
AA66
VCCGT_AA66
AA67
VCCGT_AA67
AA69
VCCGT_AA69
AA70
VCCGT_AA70
AA71
VCCGT_AA71
AC64
VCCGT_AC64
AC65
VCCGT_AC65
AC66
VCCGT_AC66
AC67
VCCGT_AC67
AC68
VCCGT_AC68
AC69
VCCGT_AC69
AC70
VCCGT_AC70
AC71
VCCGT_AC71
J43
VCCGT_J43
J45
VCCGT_J45
J46
VCCGT_J46
J48
VCCGT_J48
J50
VCCGT_J50
J52
VCCGT_J52
J53
VCCGT_J53
J55
VCCGT_J55
J56
VCCGT_J56
J58
VCCGT_J58
J60
VCCGT_J60
K48
VCCGT_K48
K50
VCCGT_K50
K52
VCCGT_K52
K53
VCCGT_K53
K55
VCCGT_K55
K56
VCCGT_K56
K58
VCCGT_K58
K60
VCCGT_K60
L62
VCCGT_L62
L63
VCCGT_L63
L64
VCCGT_L64
L65
VCCGT_L65
L66
VCCGT_L66
L67
VCCGT_L67
L68
VCCGT_L68
L69
VCCGT_L69
L70
VCCGT_L70
L71
VCCGT_L71
M62
VCCGT_M62
N63
VCCGT_N63
N64
VCCGT_N64
N66
VCCGT_N66
N67
VCCGT_N67
N69
VCCGT_N69
J70
VCCGT_SENSE
J69
VSSGT_SENSE
SKYLAKE-U_BGA1356
REV = 1
@
SKL_ULT
CPU POWER 2 OF 4
?
1 OF 20
VCCGT_N70
VCCGT_N71
VCCGT_R63
VCCGT_R64
VCCGT_R65
VCCGT_R66
VCCGT_R67
VCCGT_R68
VCCGT_R69
VCCGT_R70
VCCGT_R71
VCCGT_T62
VCCGT_U65
VCCGT_U68
VCCGT_U71
VCCGT_W63
VCCGT_W64
VCCGT_W65
VCCGT_W66
VCCGT_W67
VCCGT_W68
VCCGT_W69
VCCGT_W70
VCCGT_W71
VCCGT_Y62
VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70
VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56
VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66
VCCGTX_SENSE
VSSGTX_SENSE
1
+VCC_GT
N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62
AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66
VCCGTX_SENSE
AK62
VSSGTX_SENSE
AL61
?
1
TC135 @
1
TC133 @
1
TC134 @
C
+CPU_CORE
15x1uF 0201, SIT update to 0402 package
1
1
1
CC1095
2
1U_0402_6.3V6K
B
A
1
1
CC1097
CC1096
1U_0402_6.3V6K
CC1098
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
5
1
1
CC1100
CC1099
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CC1102
CC1101
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CC1105
CC1104
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CC1108
CC1109
2
2
1U_0201_6.3V6-M
1U_0201_6.3V6-M
@
@
4
+VCC_GT
Backside Cap 12x1uF 0201, SIT update
1
CC1111
2
1U_0402_6.3V6K
1
CC1114
CC1115
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
1
1
CC1116
2
2
1U_0402_6.3V6K
3
1
CC1119
CC1118
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CC1240
CC1241
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS S HEE T OF ENGIN EERIN G DR AWIN G IS THE PRO PRIETAR Y PROPE RTY OF L C FUTURE CENTER. AND CON TAINS CONFIDENTIAL
THIS S HEE T OF ENGIN EERIN G DR AWIN G IS THE PRO PRIETAR Y PROPE RTY OF L C FUTURE CENTER. AND CON TAINS CONFIDENTIAL
THIS S HEE T OF ENGIN EERIN G DR AWIN G IS THE PRO PRIETAR Y PROPE RTY OF L C FUTURE CENTER. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R& D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF LC FUTURE CENTER.
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
Title
Title
MCP (CPU PWR1)
MCP (CPU PWR1)
MCP (CPU PWR1)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
12 60
12 60
of
12 60
of
B
A
1.0
1.0
1.0
5
+1.2V
D D
+1.2V
C
2A , 3x22uF, 6x10uF, 4x1uF, SIT update
1
2
CD@
CC1256
22U_0603_6.3V6-M
1
CC1257
2
22U_0603_6.3V6-M
RC1497 0_0402_5%@
RC104 0_0402_5%@
1
2
1
1
CC1168
CC1258
2
2
10U_0603_6.3V6M
CD@
22U_0603_6.3V6-M
1
2
2
1
1
CC1171
CC1169
2
10U_0402_6.3V6M
10U_0402_6.3V6M
+VDDQ_CPU_CLK
1
CC1229
2
@
1U_0201_6.3V6-M
+VCCSFR_OC
1
CC85
2
1U_0201_6.3V6-M
1
1
1
CC1222
CC1223
2
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
@
1
2
+VCCIO
+VCCST_CPU
CC1228
Reserved for VCCST/VCCSTG/VCCPLL
power optimized
10U_0402_6.3V6M
+VCCST_CPU
CC1243
1
2
10U_0402_6.3V6M
@
1
CC1244
CC1224
2
10U_0402_6.3V6M
CD@
1
RC103 0_0402_5%@
1
RC1604 0_0402_5%@
RC105 0_0402_5%@
1
1
CC1226
CC1225
2
2
1U_0201_6.3V6-M
1U_0201_6.3V6-M
1U_0201_6.3V6-M
CD@
@
+VCCSTG
2
2
2
1
4
+1.2V
UC1N
AU23
VDDQ_AU23
AU28
VDDQ_AU28
AU35
VDDQ_AU35
AU42
VDDQ_AU42
BB23
VDDQ_BB23
BB32
VDDQ_BB32
BB41
VDDQ_BB41
BB47
VDDQ_BB47
BB51
1
CC1227
2
1U_0201_6.3V6-M
@
+VCCST_CPU
+VDDQ_CPU_CLK
+VCCST_CPU
+VCCSTG
+VCCSFR_OC
+VCCPLL_CPU
AM40
AL23
A18
A22
K20
K21
VDDQ_BB51
VDDQC
VCCST
VCCSTG_A22
VCCPLL_OC
VCCPLL_K20
VCCPLL_K21
SKL_ULT
CPU POWER 3 OF 4
?
120mA
1
1
2
CC87
1U_0402_6.3V6K
2
+VCCPLL_CPU
CC86
1U_0402_6.3V6K
SKYLAKE-U_BGA1356
REV = 1
@
1 OF 20
120mA
1
1
CC84
CC1249
2
2
1U_0402_6.3V6K
0.1u_0201_10V6K
VCCIO_AK28
VCCIO_AK30
VCCIO_AL30
VCCIO_AL42
VCCIO_AM28
VCCIO_AM30
VCCIO_AM42
VCCSA_AK23
VCCSA_AK25
VCCSA_G23
VCCSA_G25
VCCSA_G27
VCCSA_G28
VCCSA_J22
VCCSA_J23
VCCSA_J27
VCCSA_K23
VCCSA_K25
VCCSA_K27
VCCSA_K28
VCCSA_K30
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
3
AK28
AK30
AL30
AL42
AM28
AM30
AM42
AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30
AM23
AM22
H21
H20
?
VCCSA_VCC_SEN
VCCSA_VSS_SEN
+VCCIO
+VCCSA
VCCIO_SENSE
VSSIO_SENSE
VCCSA_VSS_SEN
VCCSA_VCC_SEN
1
1
1 2
RC101 100_0402_1%
1
RC102 100_0402_1%
TC136 @
TC137 @
VCCSA_VSS_SEN 59
VCCSA_VCC_SEN 59
2
+VCCSA
2
+VCCIO
3.1A 2x10uF, 4x1uF
1
2
+VCCSA
1
1
CC1152
2
10U_0402_6.3V6M
1
CC1158
CC1153
CC1159
2
2
1U_0201_6.3V6-M
10U_0402_6.3V6M
1U_0201_6.3V6-M
@
@
4.5A 10x10uF, 7x1uF, SIT update
1
2
1
1
2
CC1132
10U_0603_6.3V6M
1
CC1134
CC1133
CC1135
2
2
10U_0402_6.3V6M
10U_0603_6.3V6M
10U_0402_6.3V6M
@
@
1
1
2
@
1
2
1
1
CC1160
CC1161
2
2
1U_0201_6.3V6-M
1U_0201_6.3V6-M
@
1
CC1137
CC1136
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
CC1218
2
1U_0402_6.3V6K
1
2
1
CC1232
CC1231
CC1230
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
@
1
1
CC1253
CC1252
CC1251
2
2
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0603_6.3V6M
@
@
1
1
1
CC1139
2
2
1U_0402_6.3V6K
CD@
1
CC1142
CC1140
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CD@
1
1
CC1145
2
1U_0402_6.3V6K
1
CC1143
CC1141
CC1144
2
2
1U_0201_6.3V6-M
1U_0201_6.3V6-M
CD@
1U_0201_6.3V6-M
C
+1.0VALW
1
2
+5VALW
RC1650 47K_0402_5%
RC142
VCCST_EN#
5
G
Deciphered Date
Deciphered Date
Deciphered Date
2
+3VALW
RC1605 0_0402_5%@
V20B+
1 2
RC141
47K_0402_5%
EC_VCCST_EN
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Reserved for VCCST/VCCSTG/VCCPLL power optimized
B
1
1
CC72
CC71
2
2
22U_0603_6.3V6-M
1
2
1
2
2
G
3
D
QC12B
2N7002KDWH_SOT363-6
S
4
10U_0603_6.3V6M
6
D
2N7002KDWH_SOT363-6
S
1
4
@
+5VALW
RC1649 47K_0402_5%@
V20B+
+3VALW
RC128
RC1575
47K_0402_5%
@
A
EC_VCCIO_EN 44
PM_SLP_S3# 11,44
RC1577 0_0402_5%@
DC1
5
2
1
1 2
RB751V-40_SOD323-2
1 2
VCCIO_EN
@
RC1621 100K_0402_5%
VCCIO_EN#
1
2
47K_0402_5%
5
G
+1.0VALW
@
CC1261
QC12A
1
2
5
0.1u_0201_10V6K
AON7408L_DFN8-5
QC11
D
G
4
1
2
+VCCIO
1
S1
2
S2
3
S3
@
CC1262
1 2
CC77
0.01U_0201_25V6-K
1
2
0.1u_0201_10V6K
RC125
820K_0402_5%
CC1250
1
1
C1102
2
2
@
10U_0603_6.3V6M
22U_0603_6.3V6-M
VCCIO_EN#
1
RC124
470_0603_5%
@
2
1
D
2
QC13
G
2N7002KW_SOT323-3
@
S
3
EC_VCCST_EN 44
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS S HEE T OF ENGIN EERIN G DR AWIN G IS THE PRO PRIETAR Y PROPE RTY OF L C FUTURE CENTER. AND CON TAINS CONFIDENTIAL
THIS S HEE T OF ENGIN EERIN G DR AWIN G IS THE PRO PRIETAR Y PROPE RTY OF L C FUTURE CENTER. AND CON TAINS CONFIDENTIAL
THIS S HEE T OF ENGIN EERIN G DR AWIN G IS THE PRO PRIETAR Y PROPE RTY OF L C FUTURE CENTER. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R& D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF LC FUTURE CENTER.
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF LC FUTURE CENTER.
2015/08/20
2015/08/20
2015/08/20
1
2
@
1
2
100K_0402_5%
2
G
3
D
QC16B
2N7002KDWH_SOT363-6
S
4
+VCCST_CPU
+1.0VALW
CC79
6
D
S
1
2016/08/20
2016/08/20
2016/08/20
1
1
1
@
2
2
CC1263
0.1u_0201_10V6K
10U_0603_6.3V6M
QC16A
2N7002KDWH_SOT363-6
0.01U_0201_25V6-K
3
1
@
2
CC1264
RC1584
120K_0402_5%
1 2
0.1u_0201_10V6K
+VCCST_CPU
1
CC80
2
@
VCCST_EN#
1
RC135
470_0603_5%
@
10U_0603_6.3V6M
2
1
D
2
G
S
3
QC19
AO3402_SOT-23-3
S
D
G
2
1
CC81
2
+VCCST_CPU switch
Title
Title
Title
MCP (CPU PWR2)
MCP (CPU PWR2)
MCP (CPU PWR2)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
QC14
2N7002KW_SOT323-3
@
13 60
of
13 60
of
13 60
B
A
1.0
1.0
1.0
5
4
3
2
1
+3VALW_PCH
1
1 2
2
1
RC1620 0_0402_5%@
+VCCAMPHY
+VCCHDA
1
+3VALW_PCH
VCCMPHYON_1P0_L1
2
RC1586 BLM18EG221TN1D_2P
2
1
RC1622 0_0402_5%@
2
RC1503 0_0603_5%@
+1.0VALW
RC1504 BLM18EG221TN1D_2P
D D
+1.0VALW +VCCAPLL_1P0
+1.0VALW
+VCCPGPPG
1
CC144
2
C
B
+VCCAMPHY
+VCCAPLL_1P0
+1.0VALW
1U_0402_6.3V6K
1
2
CC153
1U_0402_6.3V6K
VCCMPHYON_1P0_L1
11mA
+1.0VALW
0.696A
Near AB19
1
CC141
2
@
1U_0402_6.3V6K
33mA
1
CC169
2
AB19
AB20
P18
AF18
AF19
V20
V21
AL1
K17
L1
N15
N16
N17
P15
P16
K15
L15
V15
AB17
Y18
AD17
AD18
AJ17
AJ19
AJ16
AF20
AF21
T19
T20
AJ21
AK20
N18
1U_0402_6.3V6K
SKYLAKE-U_BGA1356
REV = 1
@
UC1O
VCCPRIM_1P0_AB19
VCCPRIM_1P0_AB20
VCCPRIM_1P0_P18
VCCPRIM_CORE_AF18
VCCPRIM_CORE_AF19
VCCPRIM_CORE_V20
VCCPRIM_CORE_V21
DCPDSW_1P0
VCCMPHYAON_1P0_K17
VCCMPHYAON_1P0_L1
VCCMPHYGT_1P0_N15
VCCMPHYGT_1P0_N16
VCCMPHYGT_1P0_N17
VCCMPHYGT_1P0_P15
VCCMPHYGT_1P0_P16
VCCAMPHYPLL_1P0_K15
VCCAMPHYPLL_1P0_L15
VCCAPLL_1P0
VCCPRIM_1P0_AB17
VCCPRIM_1P0_Y18
VCCDSW_3P3_AD17
VCCDSW_3P3_AD18
VCCDSW_3P3_AJ17
VCCHDA
VCCSPI
VCCSRAM_1P0_AF20
VCCSRAM_1P0_AF21
VCCSRAM_1P0_T19
VCCSRAM_1P0_T20
VCCPRIM_3P3_AJ21
VCCPRIM_1P0_AK20
VCCAPLLEBB
SKL_ULT
CPU POWER 4 OF 4
?
1 OF 20
VCCPGPPA
VCCPGPPB
VCCPGPPC
VCCPGPPD
VCCPGPPE
VCCPGPPF
VCCPGPPG
VCCPRIM_3P3_V19
VCCPRIM_1P0_T1
VCCATS_1P8
VCCRTCPRIM_3P3
VCCRTC_AK19
VCCRTC_BB14
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
+1.0VALW
1
2
CC145
1U_0402_6.3V6K
+3VALW
68mA
+3VALW_PCH
2.574A 22mA
1
CC158
2
@
Near AF18
22U_0603_6.3V6-M
0.118A
+1.0VALW
Near N15
88mA
1
CC151
2
1U_0402_6.3V6K
1
CC154
2
1U_0402_6.3V6K
1
2
@
Near K15
22mA
+1.0VALW
1
CC159
2
CD@
1U_0402_6.3V6K
1.5A
1
CC148
2
47U_0805_4V6-M
0.642A
Near AF20
+3VALW_PCH
CC147
1U_0201_6.3V6-M
+VCCHDA
+1.0VALW
1
C1096
2
@
22U_0603_6.3V6-M
1
C1097
2
0.1u_0201_10V6K
+VCCDSW_1P0
1
CC171
2
1U_0402_6.3V6K
CD@
+1.0VALW
PCH Internal VRM
1
CC165
2
0.1u_0201_10V6K
75mA
+1.0VALW
Near A18
+3VALW_PCH
1
CC156
2
@
20mA
AK15
4mA
AG15
6mA
Y16
8mA
Y15
6mA
T16
161mA
AF16
61mA
AD15
V19
T1
6mA
AA1
1mA
AK17
AK19
BB14
BB10
VCCRTCEXT
35mA
A14
29mA
K19
24mA
L21
33mA
N20
4mA
L19
10mA
A10
AN11
AN13
?
1U_0402_6.3V6K
1mA
1
1
CC172
2
2
1U_0402_6.3V6K
Near Y15
1
CC173
+VCCPGPPG
CC174
2
@
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CC57
2
1U_0402_6.3V6K
1
2
@
+1.0VALW
1
RC1588 0_0603_5%@
1
C1099
2
@
22U_0603_6.3V6-M
1
RC1589 0_0603_5%@
1
C1100
2
@
22U_0603_6.3V6-M
CC175
1U_0402_6.3V6K
1
2
2
2
1
CC176
2
@
1U_0402_6.3V6K
1
RC1587 0_0603_5%@
1
CC56
2
@
1U_0402_6.3V6K
+1.0VALW +VCCCLK4
+1.0VALW +VCCCLK5
C1098
22U_0603_6.3V6-M
+3VALW_PCH
2
+1.8VALW
1
CC142
2
1U_0402_6.3V6K
+1.0VALW
1
CC149
2
0.1u_0201_10V6K
1
CC55
2
0.1u_0201_10V6K
+3VALW_PCH
1
CC143
2
1U_0402_6.3V6K
1
CC146
2
VCCRTC
1
CC1242
2
1U_0402_6.3V6K
0.1u_0201_10V6K
1
CC164
2
@
@
1U_0402_6.3V6K
+1.8VALW
+1.0VALW
+1.0VALW
+1.0VALW
+VCCCLK4
+VCCCLK5
C
B
A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF E NGINEERING DRAWING IS THE PRO PRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF E NGINEERING DRAWING IS THE PRO PRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF E NGINEERING DRAWING IS THE PRO PRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SEC RET INF ORMATION. THIS SHEET MAY N OT B E TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SEC RET INF ORMATION. THIS SHEET MAY N OT B E TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SEC RET INF ORMATION. THIS SHEET MAY N OT B E TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED B Y LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED B Y LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED B Y LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY O R DISC LOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY O R DISC LOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
3
MAY BE USED BY O R DISC LOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
MCP (PCH PWR)
MCP (PCH PWR)
MCP (PCH PWR)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet of
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
of
14 60
14 60
14 60
A
1.0
1.0
1.0
5
?
SKL_ULT
UC1P
GND 1 OF 3
A5
VSS_A5
A67
VSS_A67
A70
D D
C
B
VSS_A70
AA2
VSS_AA2
AA4
VSS_AA4
AA65
VSS_AA65
AA68
VSS_AA68
AB15
VSS_AB15
AB16
VSS_AB16
AB18
VSS_AB18
AB21
VSS_AB21
AB8
VSS_AB8
AD13
VSS_AD13
AD16
VSS_AD16
AD19
VSS_AD19
AD20
VSS_AD20
AD21
VSS_AD21
AD62
VSS_AD62
AD8
VSS_AD8
AE64
VSS_AE64
AE65
VSS_AE65
AE66
VSS_AE66
AE67
VSS_AE67
AE68
VSS_AE68
AE69
VSS_AE69
AF1
VSS_AF1
AF10
VSS_AF10
AF15
VSS_AF15
AF17
VSS_AF17
AF2
VSS_AF2
AF4
VSS_AF4
AF63
VSS_AF63
AG16
VSS_AG16
AG17
VSS_AG17
AG18
VSS_AG18
AG19
VSS_AG19
AG20
VSS_AG20
AG21
VSS_AG21
AG71
VSS_AG71
AH13
VSS_AH13
AH6
VSS_AH6
AH63
VSS_AH63
AH64
VSS_AH64
AH67
VSS_AH67
AJ15
VSS_AJ15
AJ18
VSS_AJ18
AJ20
VSS_AJ20
AJ4
VSS_AJ4
AK11
VSS_AK11
AK16
VSS_AK16
AK18
VSS_AK18
AK21
VSS_AK21
AK22
VSS_AK22
AK27
VSS_AK27
AK63
VSS_AK63
AK68
VSS_AK68
AK69
VSS_AK69
AK8
VSS_AK8
AL2
VSS_AL2
AL28
VSS_AL28
AL32
VSS_AL32
AL35
VSS_AL35
AL38
VSS_AL38
AL4
VSS_AL4
AL45
VSS_AL45
AL48
VSS_AL48
AL52
VSS_AL52
AL55
VSS_AL55
AL58
VSS_AL58
AL64
VSS_AL64
SKYLAKE-U_BGA1356
REV = 1
@
1 OF 20
VSS_AL65
VSS_AL66
VSS_AM13
VSS_AM21
VSS_AM25
VSS_AM27
VSS_AM43
VSS_AM45
VSS_AM46
VSS_AM55
VSS_AM60
VSS_AM61
VSS_AM68
VSS_AM71
VSS_AM8
VSS_AN20
VSS_AN23
VSS_AN28
VSS_AN30
VSS_AN32
VSS_AN33
VSS_AN35
VSS_AN37
VSS_AN38
VSS_AN40
VSS_AN42
VSS_AN58
VSS_AN63
VSS_AP10
VSS_AP18
VSS_AP20
VSS_AP23
VSS_AP28
VSS_AP32
VSS_AP35
VSS_AP38
VSS_AP42
VSS_AP58
VSS_AP63
VSS_AP68
VSS_AP70
VSS_AR11
VSS_AR15
VSS_AR16
VSS_AR20
VSS_AR23
VSS_AR28
VSS_AR35
VSS_AR42
VSS_AR43
VSS_AR45
VSS_AR46
VSS_AR48
VSS_AR5
VSS_AR50
VSS_AR52
VSS_AR53
VSS_AR55
VSS_AR58
VSS_AR63
VSS_AR8
VSS_AT2
VSS_AT20
VSS_AT23
VSS_AT28
VSS_AT35
VSS_AT4
VSS_AT42
VSS_AT56
VSS_AT58
4
AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58
?
3
UC1Q
AT63
VSS_AT63
AT68
VSS_AT68
AT71
VSS_AT71
AU10
VSS_AU10
AU15
VSS_AU15
AU20
VSS_AU20
AU32
VSS_AU32
AU38
VSS_AU38
AV1
VSS_AV1
AV68
VSS_AV68
AV69
VSS_AV69
AV70
VSS_AV70
AV71
VSS_AV71
AW10
VSS_AW10
AW12
VSS_AW12
AW14
VSS_AW14
AW16
VSS_AW16
AW18
VSS_AW18
AW21
VSS_AW21
AW23
VSS_AW23
AW26
VSS_AW26
AW28
VSS_AW28
AW30
VSS_AW30
AW32
VSS_AW32
AW34
VSS_AW34
AW36
VSS_AW36
AW38
VSS_AW38
AW41
VSS_AW41
AW43
VSS_AW43
AW45
VSS_AW45
AW47
VSS_AW47
AW49
VSS_AW49
AW51
VSS_AW51
AW53
VSS_AW53
AW55
VSS_AW55
AW57
VSS_AW57
AW6
VSS_AW6
AW60
VSS_AW60
AW62
VSS_AW62
AW64
VSS_AW64
AW66
VSS_AW66
AW8
VSS_AW8
AY66
VSS_AY66
B10
VSS_B10
B14
VSS_B14
B18
VSS_B18
B22
VSS_B22
B30
VSS_B30
B34
VSS_B34
B39
VSS_B39
B44
VSS_B44
B48
VSS_B48
B53
VSS_B53
B58
VSS_B58
B62
VSS_B62
B66
VSS_B66
B71
VSS_B71
BA1
VSS_BA1
BA10
VSS_BA10
BA14
VSS_BA14
BA18
VSS_BA18
BA2
VSS_BA2
BA23
VSS_BA23
BA28
VSS_BA28
BA32
VSS_BA32
BA36
VSS_BA36
F68
VSS_F68
BA45
VSS_BA45
SKYLAKE-U_BGA1356
REV = 1
@
SKL_ULT
GND 2 OF 3
?
1 OF 20
VSS_BA49
VSS_BA53
VSS_BA57
VSS_BA6
VSS_BA62
VSS_BA66
VSS_BA71
VSS_BB18
VSS_BB26
VSS_BB30
VSS_BB34
VSS_BB38
VSS_BB43
VSS_BB55
VSS_BB6
VSS_BB60
VSS_BB64
VSS_BB67
VSS_BB70
VSS_C1
VSS_C25
VSS_C5
VSS_D10
VSS_D11
VSS_D14
VSS_D18
VSS_D22
VSS_D25
VSS_D26
VSS_D30
VSS_D34
VSS_D39
VSS_D44
VSS_D45
VSS_D47
VSS_D48
VSS_D53
VSS_D58
VSS_D6
VSS_D62
VSS_D66
VSS_D69
VSS_E11
VSS_E15
VSS_E18
VSS_E21
VSS_E46
VSS_E50
VSS_E53
VSS_E56
VSS_E6
VSS_E65
VSS_E71
VSS_F1
VSS_F13
VSS_F2
VSS_F22
VSS_F23
VSS_F27
VSS_F28
VSS_F32
VSS_F33
VSS_F35
VSS_F37
VSS_F38
VSS_F4
VSS_F40
VSS_F42
VSS_BA41
2
?
SKL_ULT
BA49
BA53
BA57
BA6
BA62
BA66
BA71
BB18
BB26
BB30
BB34
BB38
BB43
BB55
BB6
BB60
BB64
BB67
BB70
C1
C25
C5
D10
D11
D14
D18
D22
D25
D26
D30
D34
D39
D44
D45
D47
D48
D53
D58
D6
D62
D66
D69
E11
E15
E18
E21
E46
E50
E53
E56
E6
E65
E71
F1
F13
F2
F22
F23
F27
F28
F32
F33
F35
F37
F38
F4
F40
F42
BA41
?
UC1R
GND 3 OF 3
F8
VSS_F8
G10
VSS_G10
G22
VSS_G22
G43
VSS_G43
G45
VSS_G45
G48
VSS_G48
G5
VSS_G5
G52
VSS_G52
G55
VSS_G55
G58
VSS_G58
G6
VSS_G6
G60
VSS_G60
G63
VSS_G63
G66
VSS_G66
H15
VSS_H15
H18
VSS_H18
H71
VSS_H71
J11
VSS_J11
J13
VSS_J13
J25
VSS_J25
J28
VSS_J28
J32
VSS_J32
J35
VSS_J35
J38
VSS_J38
J42
VSS_J42
J8
VSS_J8
K16
VSS_K16
K18
VSS_K18
K22
VSS_K22
K61
VSS_K61
K63
VSS_K63
K64
VSS_K64
K65
VSS_K65
K66
VSS_K66
K67
VSS_K67
K68
VSS_K68
K70
VSS_K70
K71
VSS_K71
L11
VSS_L11
L16
VSS_L16
L17
VSS_L17
SKYLAKE-U_BGA1356
REV = 1
@
1 OF 20
VSS_L18
VSS_L2
VSS_L20
VSS_L4
VSS_L8
VSS_N10
VSS_N13
VSS_N19
VSS_N21
VSS_N6
VSS_N65
VSS_N68
VSS_P17
VSS_P19
VSS_P20
VSS_P21
VSS_R13
VSS_R6
VSS_T15
VSS_T17
VSS_T18
VSS_T2
VSS_T21
VSS_T4
VSS_U10
VSS_U63
VSS_U64
VSS_U66
VSS_U67
VSS_U69
VSS_U70
VSS_V16
VSS_V17
VSS_V18
VSS_W13
VSS_W6
VSS_W9
VSS_Y17
VSS_Y19
VSS_Y20
VSS_Y21
L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21
?
1
C
B
A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
MCP (VSS)
MCP (VSS)
MCP (VSS)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
of
15 60
15 60
of
1
15 60
A
1.0
1.0
1.0
5
CPU_CFG0
D D
2
RC1618
1K_0402_5%
@
1
C
B
2
RC106
1K_0402_5%
1
2
RC162
49.9_0402_1%
1
Pin Name Strap Description Configu ration
A
CFG[4] Display Port
Presence strap
ā1 = eDP Disabled
ā0 = eDP Enabled
5
TC142 PAD@
TC143 PAD@
TC144 PAD@
TC146 PAD@
TC147 PAD@
TC148 PAD@
TC153 PAD
@
TC150 PAD@
TC151 PAD@
TC152 PAD@
TC157 PAD@
TC154 PAD@
TC155 PAD@
TC156 PAD@
TC159 PAD
@
TC158 PAD@
TC161 PAD@
TC160 PAD@
TC166 PAD@
TC186 PAD@
TC189 PAD@
TC191 PAD@
TC171 PAD@
TC172 PAD@
TC169 PAD@
TC170 PAD@
Default
Value
1
*
CPU_CFG1
1
CPU_CFG2
1
XDP_CPU_CFG3
1
CPU_CFG4
CPU_CFG5
1
CPU_CFG6
1
CPU_CFG7
1
CPU_CFG8
1
CPU_CFG9
1
CPU_CFG10
1
CPU_CFG11
1
CPU_CFG12
1
CPU_CFG13
1
CPU_CFG14
1
CPU_CFG15
1
CPU_CFG16
1
CPU_CFG17
1
CPU_CFG18
1
CPU_CFG19
1
CFG_RCOMP
XDP_ITP_PMODE
1
1
1
1
1
1
1
1
4
E68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70
E63
F63
E66
F66
E60
E8
AY2
AY1
D1
D3
K46
K45
AL25
AL27
C71
B70
F60
A52
BA70
BA68
J71
J68
F65
G65
F61
E61
SKYLAKE-U_BGA1356
REV = 1
@
4
UC1S
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
CFG[19]
CFG_RCOMP
ITP_PMODE
RSVD_AY2
RSVD_AY1
RSVD_D1
RSVD_D3
RSVD_K46
RSVD_K45
RSVD_AL25
RSVD_AL27
RSVD_C71
RSVD_B70
RSVD_F60
RSVD_A52
RSVD_TP_BA70
RSVD_TP_BA68
RSVD_J71
RSVD_J68
VSS_F65
VSS_G65
RSVD_F61
RSVD_E61
SKL_ULT
RESERVED SIGNALS-1
?
1 OF 20
3
RSVD_TP_BB68
RSVD_TP_BB69
RSVD_TP_AK13
RSVD_TP_AK12
RSVD_TP_AW71
RSVD_TP_AW70
PROC_SELECT#
BB68
BB69
AK13
AK12
BB2
RSVD_BB2
BA3
RSVD_BA3
AU5
TP5
AT5
TP6
D5
RSVD_D5
D4
RSVD_D4
B2
RSVD_B2
C2
RSVD_C2
B3
RSVD_B3
A3
RSVD_A3
AW1
RSVD_AW1
E1
RSVD_E1
E2
RSVD_E2
BA4
RSVD_BA4
BB4
RSVD_BB4
A4
RSVD_A4
C4
RSVD_C4
BB5
TP4
A69
RSVD_A69
B69
RSVD_B69
RSVD_AY3
RSVD_D71
RSVD_C70
RSVD_C54
RSVD_D54
TP1
TP2
VSS_AY71
ZVM#
MSM#
?
Security Classifica tion
Security Classifica tion
Security Classifica tion
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y O F LC F UTU RE CE NT ER. AND C ONTAI NS CO NFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y O F LC F UTU RE CE NT ER. AND C ONTAI NS CO NFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y O F LC F UTU RE CE NT ER. AND C ONTAI NS CO NFIDENTIAL
AND T RADE S ECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND T RADE S ECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND T RADE S ECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSEN T OF LC FUTURE C ENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSEN T OF LC FUTURE C ENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSEN T OF LC FUTURE C ENTER.
AY3
D71
C70
C54
D54
AY4
BB3
AY71
AR56
AW71
AW70
AP56
C64
RSVD_AY3
VSS_AY71
PROC_SELECT#
3
2015/08/20
2015/08/20
2015/08/20
1
TC173 PAD@
1
@
TC174 PAD
1
@
TC175 PAD
1
TC176 PAD@
1
TC183 PAD@
1
TC185 PAD@
1
TC184 PAD@
1
TC181 PAD@
1
TC187 PAD@
1
TC182 PAD@
1
TC188 PAD@
1
TC193 PAD@
1
TC190 PAD@
1
TC192 PAD@
1
TC167 PAD@
1
TC177 PAD@
1
TC178 PAD@
1
@
TC168 PAD
1
2
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
+1.8VALW
need to check with Intel
need to check with Intel
R22 100K_0402_5% Cannonlake@
2
Cannonlake@
2
RC1582 0_0402_5%
2
RC1583 0_0402_5%
Cannonlake@
+VCCST_CPU
2
1
1
2016/08/20
2016/08/20
2016/08/20
2
1
2
1
RSVD_U12
RSVD_U11
RC107
0_0402_5%
RC108
0_0402_5%
1
F6
E3
C11
B11
A11
D12
C12
F52
+VCCST_CPU
RSVD_F52
16 60
16 60
16 60
1
RC1619
150_0402_5%
@
2
of
?
SKL_ULT
UC1T
AW69
AW68
AU56
AW48
C7
U12
U11
H11
SKYLAKE-U_BGA1356
REV = 1
@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
SPARE
RSVD_AW69
RSVD_AW68
RSVD_AU56
RSVD_AW48
RSVD_C7
RSVD_U12
RSVD_U11
RSVD_H11
MCP (CFG,RESERVED)
MCP (CFG,RESERVED)
MCP (CFG,RESERVED)
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
1 OF 20
RSVD_F6
RSVD_E3
RSVD_C11
RSVD_B11
RSVD_A11
RSVD_D12
RSVD_C12
RSVD_F52
CG413
CG413
CG413
?
1
1.0
1.0
1.0
C
B
A
5
DDRA_MA0
DDRA_MA1
DDRA_MA2
DDRA_MA3
DDRA_MA4
DDRA_MA5
DDRA_MA6
DDRA_MA7
DDRA_MA8
DDRA_MA9
DDRA_MA10
DDRA_MA11
DDRA_MA12
DDRA_MA13
D D
C
B
A
DDRA_MA14_WE# 5
DDRA_MA15_CAS# 5
DDRA_MA16_RAS# 5
DDRA_CLK0# 5
DDRA_CLK0 5
DDRA_CKE0 5
+1.2V
RD65 0_0402_5%@
RD68 0_0402_5%
DDRA_BS0# 5
DDRA_BS1# 5
DDRA_ACT# 5
DDRA_CS0# 5
DDRA_ALERT# 5
DDRA_BG0 5
DDRA_ODT0 5
DDRA_PAR 5
RD94 10K_0402_5%
CPU_DRAMRST# 6,18
+1.2V
RD87 0_0402_5%
RD88 0_0402_5%
RD96 10K_0402_5%
1
1
1
1
@
1
@
1
DDRA_MA14_WE#
DDRA_MA15_CAS#
DDRA_MA16_RAS#
DDRA_CLK0#
DDRA_CLK0
DDRA_CKE0
DDRA_DQS#0
DDRA_DQS0
DDRA_DQS#1
DDRA_DQS1
DDRA_DM1
2
DDRA_DM0
2
@
DDRA_BS0#
DDRA_BS1#
DDRA_ACT#
DDRA_CS0#
DDRA_ALERT#
DDRA_BG0
DDRA_ODT0
DDRA_PAR
TEN_UD1 TEN_UD2
2
CPU_DRAMRST#
@
1
2
CD47
0.1u_0201_10V6K
DDRA_MA0
DDRA_MA1
DDRA_MA2
DDRA_MA3
DDRA_MA4
DDRA_MA5
DDRA_MA6
DDRA_MA7
DDRA_MA8
DDRA_MA9
DDRA_MA10
DDRA_MA11
DDRA_MA12
DDRA_MA13
DDRA_MA14_WE#
DDRA_MA15_CAS#
DDRA_MA16_RAS#
DDRA_CLK0#
DDRA_CLK0
DDRA_CKE0
DDRA_DQS#5
DDRA_DQS5
DDRA_DQS#4
DDRA_DQS4
DDRA_DM4
2
DDRA_DM5 DDRA_DM6
2
DDRA_BS0#
DDRA_BS1#
DDRA_ACT#
DDRA_CS0#
DDRA_ALERT#
DDRA_BG0
DDRA_ODT0
DDRA_PAR
TEN_UD3
2
CPU_DRAMRST#
@
1
2
0.1u_0201_10V6K
CD107
UD1
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC_N
T8
A13
L2
WE_N/A14
M8
CAS_N/A15
L8
RAS_N/A16
K8
CK_C
K7
CK_T
K2
CKE
F3
LDQS_C
G3
LDQS_T
A7
UDQS_C
B7
UDQS_T
E2
NF/UDM_N/UDBI_N
E7
NF/LDM_N/LDBI_N
N2
BA0
N8
BA1
L3
ACT_N
L7
CS_N
P9
ALERT_N
M2
BG0
K3
ODT
T3
PAR
N9
TEN
P1
RESET_N
F1
VSSQ1
H1
VSSQ2
A2
VSSQ3
D2
VSSQ4
E3
VSSQ5
A8
VSSQ6
D8
VSSQ7
E8
VSSQ8
C9
VSSQ9
H9
VSSQ10
F9
ZQ
1
RD39
MT40A512M16HA083EA_FBGA96
240_0402_1%
2
UD3
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC_N
T8
A13
L2
WE_N/A14
M8
CAS_N/A15
L8
RAS_N/A16
K8
CK_C
K7
CK_T
K2
CKE
F3
LDQS_C
G3
LDQS_T
A7
UDQS_C
B7
UDQS_T
E2
NF/UDM_N/UDBI_N
E7
NF/LDM_N/LDBI_N
N2
BA0
N8
BA1
L3
ACT_N
L7
CS_N
P9
ALERT_N
M2
BG0
K3
ODT
T3
PAR
N9
TEN
P1
RESET_N
F1
VSSQ1
H1
VSSQ2
A2
VSSQ3
D2
VSSQ4
E3
VSSQ5
A8
VSSQ6
D8
VSSQ7
E8
VSSQ8
C9
VSSQ9
H9
VSSQ10
F9
ZQ
1
MT40A512M16HA083EA_FBGA96
RD43
240_0402_1%
2
VDD10
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VREFCA
VDD10
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VREFCA
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VPP1
VPP2
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
@
DDRA_DQ2
G2
DDRA_DQ3
DQ0
F7
DDRA_DQ7
DQ1
H3
DDRA_DQ1
DQ2
H7
DDRA_DQ4
DQ3
H2
DDRA_DQ0
DQ4
H8
DDRA_DQ6
DQ5
J3
DDRA_DQ5
DQ6
J7
DDRA_DQ11
DQ7
A3
DDRA_DQ8
DQ8
B8
DDRA_DQ14
DQ9
C3
DDRA_DQ13
DQ10
C7
DDRA_DQ15
DQ11
C2
DDRA_DQ12
DQ12
C8
DDRA_DQ10
DQ13
D3
DDRA_DQ9
DQ14
D7
DQ15
+1.2V
D1
VDD1
J1
VDD2
L1
VDD3
R1
VDD4
B3
VDD5
G7
VDD6
B9
VDD7
J9
VDD8
L9
VDD9
T9
A1
C1
G1
F2
J2
F8
J8
A9
D9
G9
B1
VPP1
R9
VPP2
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
NC
@
NC
+VREF_CA_MD
M1
E1
K1
N1
T1
B2
G8
E9
K9
M9
T7
G2
F7
H3
H7
H2
H8
J3
J7
A3
B8
C3
C7
C2
C8
D3
D7
D1
J1
L1
R1
B3
G7
B9
J9
L9
T9
A1
C1
G1
F2
J2
F8
J8
A9
D9
G9
B1
R9
M1
E1
K1
N1
T1
B2
G8
E9
K9
M9
T7
DDRA_DQ43
DDRA_DQ44
DDRA_DQ46
DDRA_DQ40
DDRA_DQ47
DDRA_DQ45
DDRA_DQ42
DDRA_DQ41
DDRA_DQ34
DDRA_DQ37
DDRA_DQ39
DDRA_DQ32
DDRA_DQ35
DDRA_DQ33
DDRA_DQ38
DDRA_DQ36
+1.2V
+VREF_CA_MD
1
2
.047U_0201_6.3V6K
CD113
1
2
.047U_0201_6.3V6K
CD115
4
DDRA_MA0
P3
DDRA_MA1
P7
DDRA_MA2
R3
DDRA_MA3
N7
DDRA_MA4
N3
DDRA_MA5
P8
DDRA_MA6
P2
DDRA_MA7
R8
DDRA_MA8
R2
DDRA_MA9
R7
DDRA_MA10
M3
DDRA_MA11
DDRA_MA12
M7
DDRA_MA13
DDRA_MA14_WE#
DDRA_MA15_CAS#
M8
DDRA_MA16_RAS#
DDRA_CLK0#
K8
DDRA_CLK0
K7
DDRA_CKE0
K2
DDRA_DQS#2
DDRA_DQS2
G3
DDRA_DQS#3
+1.2V
1
RD66 0_0402_5%
1 2
RD69 0_0402_5%
+2.5V_DDR
1
1
1
2
0.1u_0201_10V6K
CD120
1
2
0.1u_0201_10V6K
CD149
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CD123
CD121
+2.5V_DDR
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CD@
CD150
CD151
+1.2V
RD89 0_0402_5%
RD90 0_0402_5%@
RD97 10K_0402_5%
1
RD95 10K_0402_5%
1
@
1
1
DDRA_DQS3
B7
DDRA_DM3
2
@
@
2
@
1
2
CD48
0.1u_0201_10V6K
DDRA_MA0
DDRA_MA1
DDRA_MA2
DDRA_MA3
DDRA_MA4
DDRA_MA5
DDRA_MA6
DDRA_MA7
DDRA_MA8
DDRA_MA9
DDRA_MA10
DDRA_MA11
DDRA_MA12
DDRA_MA13
DDRA_MA14_WE#
DDRA_MA15_CAS#
DDRA_MA16_RAS#
DDRA_CLK0#
DDRA_CLK0
DDRA_CKE0
DDRA_DQS#7
DDRA_DQS7
DDRA_DQS#6
DDRA_DQS6
2
DDRA_DM7
2
DDRA_BS0#
DDRA_BS1#
DDRA_ACT#
DDRA_CS0#
DDRA_ALERT#
DDRA_BG0
DDRA_ODT0
DDRA_PAR
TEN_UD4
2
CPU_DRAMRST#
@
1
2
0.1u_0201_10V6K
CD108
DDRA_DM2
DDRA_BS0#
DDRA_BS1#
DDRA_ACT#
DDRA_CS0#
DDRA_ALERT#
DDRA_BG0
DDRA_ODT0
DDRA_PAR
CPU_DRAMRST#
E2
E7
N2
N8
P9
M2
K3
N9
P1
H1
D2
E3
D8
E8
C9
H9
1
RD40
240_0402_1%
2
UD4
P3
P7
R3
N7
N3
P8
P2
R8
R2
R7
M3
T2
M7
T8
L2
M8
L8
K8
K7
K2
F3
G3
A7
B7
E2
E7
N2
N8
L3
L7
P9
M2
K3
T3
N9
P1
F1
H1
A2
D2
E3
A8
D8
E8
C9
H9
F9
1
RD44
MT40A512M16HA083EA_FBGA96
240_0402_1%
2
UD2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
T2
A11
A12/BC_N
T8
A13
L2
WE_N/A14
CAS_N/A15
L8
RAS_N/A16
CK_C
CK_T
CKE
F3
LDQS_C
LDQS_T
A7
UDQS_C
UDQS_T
NF/UDM_N/UDBI_N
NF/LDM_N/LDBI_N
BA0
BA1
L3
ACT_N
L7
CS_N
ALERT_N
BG0
ODT
T3
PAR
TEN
RESET_N
F1
VSSQ1
VSSQ2
A2
VSSQ3
VSSQ4
VSSQ5
A8
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
F9
ZQ
MT40A512M16HA083EA_FBGA96
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC_N
A13
WE_N/A14
CAS_N/A15
RAS_N/A16
CK_C
CK_T
CKE
LDQS_C
LDQS_T
UDQS_C
UDQS_T
NF/UDM_N/UDBI_N
NF/LDM_N/LDBI_N
BA0
BA1
ACT_N
CS_N
ALERT_N
BG0
ODT
PAR
TEN
RESET_N
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
ZQ
VDD10
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VREFCA
3
@
DDRA_DQ18
G2
DDRA_DQ19
DQ0
F7
DDRA_DQ16
DQ1
H3
DDRA_DQ21
DQ2
H7
DDRA_DQ22
DQ3
H2
DDRA_DQ17
DQ4
H8
DDRA_DQ23
DQ5
J3
DDRA_DQ20
DQ6
J7
DDRA_DQ30
DQ7
A3
DDRA_DQ28
DQ8
B8
DDRA_DQ26
DQ9
C3
DDRA_DQ25
DQ10
C7
DDRA_DQ31
DQ11
C2
DDRA_DQ29
DQ12
C8
DDRA_DQ27
DQ13
D3
DDRA_DQ24
DQ14
D7
DQ15
+1.2V
D1
VDD1
J1
VDD2
L1
VDD3
R1
VDD4
B3
VDD5
G7
VDD6
B9
VDD7
J9
VDD8
L9
VDD9
T9
VDD10
A1
VDDQ1
C1
VDDQ2
G1
VDDQ3
F2
VDDQ4
J2
VDDQ5
F8
VDDQ6
J8
VDDQ7
A9
VDDQ8
D9
VDDQ9
G9
VDDQ10
B1
VPP1
R9
VPP2
VREFCA
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
@
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VPP1
VPP2
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
NC
+VREF_CA_MD
M1
E1
K1
N1
T1
B2
G8
E9
K9
M9
T7
NC
DDRA_DQ59
G2
DDRA_DQ60
F7
DDRA_DQ62
H3
DDRA_DQ56
H7
DDRA_DQ63
H2
DDRA_DQ61
H8
DDRA_DQ58
J3
DDRA_DQ57
J7
DDRA_DQ54
A3
DDRA_DQ52
B8
DDRA_DQ51
C3
DDRA_DQ49
C7
DDRA_DQ50
C2
DDRA_DQ53
C8
DDRA_DQ55
D3
DDRA_DQ48
D7
+1.2V
D1
J1
L1
R1
B3
G7
B9
J9
L9
T9
A1
C1
G1
F2
J2
F8
J8
A9
D9
G9
B1
R9
M1
E1
K1
N1
T1
B2
G8
E9
K9
M9
T7
+VREF_CA_MD
1
2
CD116
1
1
2
2
0.1u_0201_10V6K
.047U_0201_6.3V6K
CD122
CD114
1
2
0.1u_0201_10V6K
.047U_0201_6.3V6K
CD153
DDR_SA_VREFCA 5
CD111
0.022U_0201_6.3V6-K
24.9_0402_1%
+2.5V_DDR
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CD125
CD124
+2.5V_DDR
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CD@
CD155
CD154
RD48
0.1u_0201_10V6K
RD46
1
2
1
2
+2.5V_DDR
1
2.7_0402_1%
+1.2V
1
2
CD126
+1.2V
1
2
CD142
1
2
CD152
+0.6VS
1
2
CD158
2
CD119
2
1
2
1U_0402_6.3V6K
CD@
CD127
10U_0603_6.3V6M
10U_0603_6.3V6M
1
2
1U_0402_6.3V6K
CD159
+1.2V
1
1
RD45
1.8K_0402_1%
2
2
1
RD47
1.8K_0402_1%
2
(1uF_0402_6.3V) *16
Place 4 near each DRAM
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CD128
CD129
(1OuF_0603_6.3V) *5
Place around the DRAMs
1
1
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
CD144
CD143
(1OuF_0603_6.3V) *3
Place around the DRAMs
1
1
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
CD156
CD147
(1uF_0402_6.3V) *8
Place 2 near each DRAM
1
1
1
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CD@
CD161
CD160
CD162
+VREF_CA_MD
1
CD112
0.1u_0201_10V6K
2
1
2
1U_0402_6.3V6K
CD130
1
2
10U_0603_6.3V6M
CD145
1
2
1U_0402_6.3V6K
CD@
CD163
1
2
CD@
CD131
1U_0402_6.3V6K
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CD132
1
2
10U_0603_6.3V6M
CD@
CD146
1
2
1U_0402_6.3V6K
CD165
CD164
1
1
2
2
1U_0402_6.3V6K
CD133
CD134
(1OuF_0603_6.3V) *2
Place around the DRAMs
1
1
2
2
1U_0402_6.3V6K
10U_0603_6.3V6M
CD@
CD166
DDRA_DQ[0..63]
DDRA_DQS#[0..7]
DDRA_DQS[0..7]
DDRA_MA[0..13]
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CD135
+1.2V
1
2
+2.5V_DDR
1
2
1
2
10U_0603_6.3V6M
CD167
DDRA_CLK0#
DDRA_CLK0
DDRA_CS0#
DDRA_ODT0
DDRA_CKE0
DDRA_MA0
DDRA_MA1
DDRA_MA2
DDRA_MA3
DDRA_MA4
DDRA_MA5
DDRA_MA6
DDRA_MA7
DDRA_MA8
DDRA_MA9
DDRA_MA10
DDRA_MA11
DDRA_MA12
DDRA_MA13
DDRA_MA14_WE#
DDRA_MA15_CAS#
DDRA_MA16_RAS#
DDRA_BG0
DDRA_BS0#
DDRA_BS1#
DDRA_ACT#
DDRA_PAR
DDRA_ALERT#
1
2
1U_0402_6.3V6K
CD136
CD109
22P_0402_50V8-J
RF@
CD157
22P_0402_50V8-J
RF@
1
2
1U_0402_6.3V6K
CD@
CD137
DDRA_DQ[0..63] 5
DDRA_DQS#[0..7] 5
DDRA_DQS[0..7] 5
DDRA_MA[0..13] 5
1
2
1
RD49 36_0402_1%
2
1
RD50 36_0402_1%
1 2
RD51 34.8_0402_1%
1
2
RD52 34.8_0402_1%
1
2
RD53 34.8_0402_1%
1
2
RD54 34.8_0402_1%
1
2
RD55 34.8_0402_1%
1
2
RD56 34.8_0402_1%
1
2
RD57 34.8_0402_1%
1
2
RD58 34.8_0402_1%
2
1
RD59 34.8_0402_1%
1
2
RD60 34.8_0402_1%
1
2
RD61 34.8_0402_1%
2
1
RD62 34.8_0402_1%
1
2
RD63 34.8_0402_1%
2
1
RD64 34.8_0402_1%
1
2
RD67 34.8_0402_1%
1
2
RD70 34.8_0402_1%
2
1
RD71 34.8_0402_1%
2
1
RD72 34.8_0402_1%
1 2
RD73 34.8_0402_1%
1
2
RD74 34.8_0402_1%
2
1
RD75 34.8_0402_1%
1 2
RD76 34.8_0402_1%
1
2
RD77 34.8_0402_1%
2
1
RD78 34.8_0402_1%
1
2
RD79 34.8_0402_1%
1
2
RD86 49.9_0402_1%
1
1
1
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CD@
CD139
CD140
CD110
22P_0402_50V8-J
RF@
CD148
22P_0402_50V8-J
RF@
+0.6VS
1
CD168
22P_0402_50V8-J
RF@
2
CD141
CD138
1
2
1
2
+0.6VS
+1.2V
1
2
1U_0402_6.3V6K
1
CD169
22P_0402_50V8-J
RF@
2
C
B
A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USE D BY OR DI SCLOSE D TO ANY THIRD PARTY WI THOUT PRIOR W RITTE N CONSENT OF L C FUTURE C ENTER.
MAY BE USE D BY OR DI SCLOSE D TO ANY THIRD PARTY WI THOUT PRIOR W RITTE N CONSENT OF L C FUTURE C ENTER.
5
4
3
MAY BE USE D BY OR DI SCLOSE D TO ANY THIRD PARTY WI THOUT PRIOR W RITTE N CONSENT OF L C FUTURE C ENTER.
2
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2016/08/20
2016/08/20
2016/08/20
Title
DDR4 Memory Down
DDR4 Memory Down
DDR4 Memory Down
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
1
CG413
CG413
CG413
17 60
of
17 60
of
17 60
1.0
1.0
1.0
5
DDR4 SO-DIMM
+1.2V +1.2V +1.2V +1.2V
+1.2V +1.2V +1.2V
DDRB_DQ12
DDRB_DQ13
DDRB_DQS#1
DDRB_DQS1
D D
+1.2V
1
RD92
240_0402_1%
2
C
DDRB_CKE0 6
DDRB_BG1 6
DDRB_BG0 6
DDRB_MA12 6
DDRB_MA9 6
DDRB_MA8 6
DDRB_MA6 6
B
DDR_SB_VREFCA 5
A
DDRB_DQ10
DDRB_DQ14
DDRB_DQ0
DDRB_DQ6
DDRB_DQ7
DDRB_DQ3
DDRB_DQ18
DDRB_DQ16
DDRB_DQS#2
DDRB_DQS2
DDRB_DQ22
DDRB_DQ23
DDRB_DQ27
DDRB_DQ28
DDRB_DQ25
DDRB_DQ30
1 2
RD93
240_0402_1%
DDRB_DQS#8
DDRB_DQS8
DDRB_CKE0
DDRB_BG1
DDRB_BG0
DDRB_MA12
DDRB_MA9
DDRB_MA8
DDRB_MA6
1
CD13
0.022U_0201_6.3V6-K
2
1
RD6
24.9_0402_1%
2
+3VS +3VS
1
RD7
0_0402_5%
@
2
1
RD10
0_0402_5%
@
2
0.1u_0201_10V6K
DDRB_SA0 DDRB_SA1 DDRB_SA2
RD4
CD117
1
2_0402_5%
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
JDDR1A
VSS_1
DQ5
VSS_3
DQ1
VSS_5
DM0_n/DBIO_n/NC
DQS0_C
DQS0_t
VSS_8
DQ7
VSS_10
DQ3
VSS_12
DQ13
VSS_14
DQ9
VSS_16
DM1_n/DBl1_n/NC
VSS_17
DQ15
VSS_19
DQ10
VSS_21
DQ21
VSS_23
DQ17
VSS_25
DM2_n/DBl2_n/NC
DQS2_c
DQS2_t
VSS_28
DQ23
VSS_30
DQ19
VSS_32
DQ29
VSS_34
DQ25
VSS_36
DM3_n/DBl3_n/NC
VSS_37
DQ30
VSS_39
DQ26
VSS_41
CB5/NC
VSS_43
CB1/NC
VSS_45
DM8_n/DBI8_n/NC
DQS8_c
DQS8_t
VSS_48
CB2/NC
VSS_50
CB3/NC
VSS_52
CKE0
VDD_1
BG1
BG0
VDD_3
A12
A9
VDD_5
A8
A6
VDD_7
ARGOS_D4AS0-26001-1P60
ME@
+1.2V
1
1
2
RD3
1K_0402_1%
2
2
1
RD5
1K_0402_1%
2
1
RD8
0_0402_5%
@
2
1 2
RD11
0_0402_5%
@
VSS_2
VSS_4
VSS_6
VSS_7
VSS_9
VSS_11
DQ12
VSS_13
VSS_15
DQS1_c
DQS1_t
VSS_18
DQ14
VSS_20
DQ11
VSS_22
DQ20
VSS_24
DQ16
VSS_26
VSS_27
DQ22
VSS_29
DQ18
VSS_31
DQ28
VSS_33
DQ24
VSS_35
DQS3_c
DQS3_t
VSS_38
DQ31
VSS_40
DQ27
VSS_42
CB4/NC
VSS_44
CB0/NC
VSS_46
VSS_47
CB6/NC
VSS_49
CB7/NC
VSS_51
RESET_n
CKE1
VDD_2
ACT_n
ALERT_n
VDD_4
VDD_6
VDD_8
DQ4
DQ0
DQ6
DQ2
DQ8
A11
A7
A5
A4
SPD Address = 2H
5
4
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
Note:
VREF trace width:20 mils at least
Spacing:20mils to other signal/planes
Place near DIMM scoket
+VREF_CA_DIMM
1
CD14
0.1u_0201_10V6K
2
+3VS
1
RD9
0_0402_5%
@
2
1
RD12
0_0402_5%
@
2
4
DDRB_DQ9
DDRB_DQ8
DDRB_DQ11
DDRB_DQ15
DDRB_DQ5
DDRB_DQ4
DDRB_DQS#0
DDRB_DQS0
DDRB_DQ1
DDRB_DQ2
DDRB_DQ20
DDRB_DQ21
DDRB_DQ17
DDRB_DQ19
DDRB_DQ24
DDRB_DQ29
DDRB_DQS#3
DDRB_DQS3
DDRB_DQ26
DDRB_DQ31
CPU_DRAMRST#
DDRB_CKE1
DDRB_ACT#
DDRB_ALERT#
DDRB_MA11
DDRB_MA7
DDRB_MA5
DDRB_MA4
DDRB_DQ[0..63]
DDRB_DQS#[0..7]
DDRB_DQS[0..7]
DDRB_CKE1 6
DDRB_ACT# 6
DDRB_ALERT# 6
DDRB_MA11 6
DDRB_MA7 6
DDRB_MA5 6
DDRB_MA4 6
3
DDRB_DQ[0..63] 6
DDRB_DQS#[0..7] 6
DDRB_DQS[0..7] 6
DDRB_MA3 6
DDRB_MA1 6
DDRB_CLK0 6
DDRB_CLK0# 6
DDRB_PAR 6
DDRB_BS1# 6
DDRB_CS0# 6
DDRB_MA14_WE# 6
DDRB_ODT0 6
DDRB_CS1# 6
DDRB_ODT1 6
CPU_DRAMRST# 6,17
1
CD3
0.1u_0201_10V6K
@
2
SMB_CLK_S3 7,40 SMB_DATA_S3 7,40
1
2
RD1
10U_0603_6.3V6M
4.7U_0402_6.3V6M
3
0_0603_5%
2.2U_0402_6.3V6M
1
RD2
0_0603_5%
1
2
10U_0603_6.3V6M
CD21
1
EMC_NS@
2
0.1u_0201_10V6K
CD17
@
1
CD4
2
2
@
Layout Note:
Place near DIMM
1
1
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
CD23
CD22
CD@
RF@
1
EMC_NS@
2
0.1u_0201_10V6K
CD36
CD18
Near JDDRL1
2015/08/20
2015/08/20
2015/08/20
1
2
1
2
33P_0402_50V8J
CD5
0.1u_0201_10V6K
1
2
CD24
+3VS
+2.5V_DDR
+1.2V
1
1
2
2
10U_0603_6.3V6M
CD20
CD19
CD@
+1.2V
1
1
EMC_NS@
EMC_NS@
2
2
4.7U_0402_6.3V6M
CD15
CD16
For EMC
Security Classifi cation
Security Classifi cation
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERT Y O F LC FU TUR E CENT ER. AN D CON TAINS C ONFI DENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERT Y O F LC FU TUR E CENT ER. AN D CON TAINS C ONFI DENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERT Y O F LC FU TUR E CENT ER. AN D CON TAINS C ONFI DENTIAL
AND TRAD E SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
+1.2V
DDRB_MA3
DDRB_MA1
DDRB_CLK0
DDRB_CLK0#
DDRB_PAR
DDRB_BS1#
DDRB_CS0#
DDRB_MA14_WE#
DDRB_ODT0
DDRB_CS1#
DDRB_ODT1
DDRB_DQ32
DDRB_DQ33
DDRB_DQS#4
DDRB_DQS4
DDRB_DQ39
DDRB_DQ38
DDRB_DQ41
DDRB_DQ40
DDRB_DQ47
DDRB_DQ43
DDRB_DQ53
DDRB_DQ48
DDRB_DQS#6
DDRB_DQS6
DDRB_DQ54
DDRB_DQ50
DDRB_DQ60
DDRB_DQ57
DDRB_DQ59
DDRB_DQ58
SMB_CLK_S3
+VDD_SPD
+VPP
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
CD25
RF@
1
2
33P_0402_50V8J
CD37
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
JDDR1B
131
A3
133
A1
135
VDD_9
137
CK0_t
139
CK0_c
141
VDD_11
143
Parity
145
BA1
147
VDD_13
149
CS0_n
151
WE_n/A14
153
VDD_15
155
ODT0
157
CS1_n
159
VDD_17
161
ODT1
163
VDD_19
165
C1/CS3_n/NC
167
VSS_53
169
DQ37
171
VSS_55
173
DQ33
175
VSS_57
177
DQS4_c
179
DQS4_t
181
VSS_60
183
DQ38
185
VSS_62
187
DQ34
189
VSS_64
191
DQ44
193
VSS_66
195
DQ40
197
VSS_68
199
DM5_n/DBl5_n/NC
201
VSS_69
203
DQ46
205
VSS_71
207
DQ42
209
VSS_73
211
DQ52
213
VSS_75
215
DQ49
217
VSS_77
219
DQS6_c
221
DQS6_t
223
VSS_80
225
DQ55
227
VSS_82
229
DQ51
231
VSS_84
233
DQ61
235
VSS_86
237
DQ56
239
VSS_88
241
DM7_n/DBl7_n/NC
243
VSS_89
245
DQ62
247
VSS_91
249
DQ58
251
VSS_93
253
SCL
255
VDDSPD
257
VPP_1
259
VPP_2
261
GND_1
ARGOS_D4AS0-26001-1P60
ME@
@
1
1
1
2
2
1U_0402_6.3V6K
CD6
1
2
10U_0603_6.3V6M
CD26
2
1U_0402_6.3V6K
CD7
CD118
1
1
2
2
1U_0402_6.3V6K
CD27
CD28
2016/08/20
2016/08/20
2016/08/20
2
DM4_n/DBl4_n/NC
DM6_n/DBl6_n/NC
10U_0603_6.3V6M
1
2
1U_0402_6.3V6K
CD29
CD@
132
A2
134
EVENT_n
136
VDD_10
138
CK1_t
140
CK1_c
142
VDD_12
144
A0
146
A10/AP
148
VDD_14
150
BA0
152
RAS_n/A16
154
VDD_16
156
CAS_n/A15
158
A13
160
VDD_18
162
C0/CS2_n/NC
164
VREFCA
166
SA2
168
VSS_54
170
DQ36
172
VSS_56
174
DQ32
176
VSS_58
178
180
VSS_59
182
DQ39
184
VSS_61
186
DQ35
188
VSS_63
190
DQ45
192
VSS_65
194
DQ41
196
VSS_67
198
DQS5_c
200
DQS5_t
202
VSS_70
204
DQ47
206
VSS_72
208
DQ43
210
VSS_74
212
DQ53
214
VSS_76
216
DQ48
218
VSS_78
220
222
VSS_79
224
DQ54
226
VSS_81
228
DQ50
230
VSS_83
232
DQ60
234
VSS_85
236
DQ57
238
VSS_87
240
DQS7_c
242
DQS7_t
244
VSS_90
246
DQ63
248
VSS_92
250
DQ59
252
VSS_94
254
SDA
256
SA0
258
Vtt
260
SA1
262
GND_2
+2.5V_DDR +0.6VS
1
2
10U_0603_6.3V6M
CD8
CD@
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CD30
Title
Title
Title
Size
Size
Size
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
DDRB_MA2
DDRB_EVENT#
DDRB_CLK1
DDRB_CLK1#
DDRB_MA0
DDRB_MA10
DDRB_BS0#
DDRB_MA16_RAS#
DDRB_MA15_CAS#
DDRB_MA13
+VREF_CA_DIMM
DDRB_SA2
DDRB_DQ36
DDRB_DQ37
DDRB_DQ34
DDRB_DQ35
DDRB_DQ45
DDRB_DQ44
DDRB_DQS#5
DDRB_DQS5
DDRB_DQ46
DDRB_DQ42
DDRB_DQ52
DDRB_DQ49
DDRB_DQ55
DDRB_DQ51
DDRB_DQ56
DDRB_DQ61
DDRB_DQS#7
DDRB_DQS7
DDRB_DQ62
DDRB_DQ63
SMB_DATA_S3
DDRB_SA0
DDRB_SA1
1
1
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
CD9
1
2
CD31
DDR4 SO-DIMM
DDR4 SO-DIMM
DDR4 SO-DIMM
CD11
CD10
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CD32
CD33
Document Number Rev
Document Number Rev
Document Number Rev
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
1
2
CD@
1
2
CD@
+0.6VS
1U_0402_6.3V6K
CD12
1U_0402_6.3V6K
CD34
CG413
CG413
CG413
1
1
2
1U_0402_6.3V6K
1
2
1U_0402_6.3V6K
1
RD91
240_0402_1%
@
DDRB_MA2 6
DDRB_CLK1 6
DDRB_CLK1# 6
DDRB_MA0 6
DDRB_MA10 6
DDRB_BS0# 6
DDRB_MA16_RAS# 6
DDRB_MA15_CAS# 6
DDRB_MA13 6
@
1
1
2
2
0.1u_0201_10V6K
CD1
CD2
@
1
+
2
220U_6.3V_M
CD35
of
18 60
18 60
18 60
+1.2V
2.2U_0402_6.3V6M
1
2
1.0
1.0
1.0
C
B
A
5
4
3
2
1
N15x GPIO
GPIO I/ O
GPIO0
D D
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
C
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
OVERT
ACT IVE Fun ction Desc riptio n
-
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
I/O
I/O N/A
OUT
OUT
IN
OUT
IN
IN
FB Enable for GC6 2.0
N/A
N/A
N/A
N/A
GPU power sequencing---3V3_MAIN_EN
N/A
-
GPU wake signal for GC6 2.0
N/A
-
System side PCIe reset Monitor
2.2K Pull -up
N/A
-
GPU Core VDD PWM control signal
AC Power Detect Inpu t
-
Phase Shedding
N/A
N/A
N/A
IN
N/A
IN
N/A
IN
N/A
N/A
OUT
OUT
GPU PCIe self-reset control
Active Lo w Thermal Ca tastroph ic Over Tempera ture
(10K pull High)
Performance Mode P0 TDP at Tj = 102 C* (DDR3)
FBVDDQ
FBVDD
(GPU+M em)
(1.35V) (1.35V)
(A)
(W)
Product s
N14X
128bit
2GB
DDR3
GPU
Mem
(W) (W)
NVCLK
/MCLK
NVVDD
(A)
(V)
TBD TBD TBD
TBD TBD
(A)
(W)
N15x Multi-level Straps
Physical
Strapping pin
ROM_SCLK
ROM_SI
ROM_SO
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
Power Rail
SMBUS_ALT_ADDR
0
0x9E (Default)
1
0x9C (Multi-GPU usage)
Logical
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
Strapping Bit3
SOR3_EXPO SED
DEVID_SEL
Reserved(keep pull-up and pull-down footprint and stuff 50Kohm pull-up)
Reserved(keep pull-up and pull-down footprint and not stuff by default)
Logical
Strapping Bit2
SOR2_EXPO SED SOR1_EX POSED
RAM_CFG[2 ]
PCIE_CFG
PCI Express
(1.05V)
(6) (1,5) (4)
(mA)
(W) (W)
TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD
Logical
Strapping Bit1
RAM_CFG[1 ] RAM_CFG[3 ]
I/O a nd
PLLVDD
(1.05V) (3.3V)
(mA)
Logical
Strapping Bit0
SOR0_EXPO SED
RAM_CFG[0 ]
VGA_DEVICE SMB_ALT_ADDR
Other
(mA) (MHz)
(W) (W)
C
N15V-GM Power Sequence
B
+3VG_AON
+VGA_CORE
+1.35VGS
+1.05VS_VGA
tNVVDD >0
tFBVDDQ >0
tPEX_VDD >0
1. all power rail ramp up time should be larger than 40us 2. Optimus system VDD33 avoids drop down earlier than NVDD and FBVDDQ
Other Power rail
+3VG_AON
Tpower-off <10ms
1.all GPU power rails should be turned off within 10ms
N15S-GT Power Sequence
N15x Binary Straps
Physical
Strapping pin
ROM_SCLK
ROM_SI
ROM_SO
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
Power Rail
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
Strap Mapping
SMB_ALT_ADDR
SUB_VENDOR
VGA_DEVICE
RAM_CFG[0 ]
RAM_CFG[1 ]
RAM_CFG[2 ]
RAM_CFG[3 ]
PCIE_MA X_SPEED
+3VG_AON
A
+VGA_CORE
+1.05VS_VGA
+1.35VGS
tNVVDD >0
tPEX_VDD >0
1. all power rail ramp up time should be larger than 40us
5
Title
Title
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
VGA Notes List
VGA Notes List
VGA Notes List
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
Date: Sheet
Date: Sheet of
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
19 60
19 60
19 60
of
of
B
A
1.0
1.0
1.0
5
PCIE_CRX_GTX_N[0..3] 9
PCIE_CRX_GTX_P[0..3] 9
PCIE_CTX_C_GRX_N[0..3] 9
PCIE_CTX_C_GRX_P[0..3] 9
D D
VGA_SMB_CK2
VGA_SMB_DA2
C
B
A
2.2K_0402_5%
PLT_RST# 11,32,37,40,44
PXS_RST# 8
GPU_CLKREQ# 10
+3VG_AON
RV3
@
1 2
RV5
2.2K_0402_5%
@
1 2
G
2
S
2
RV9 0_0402_5%OPT@
PLT_RST#
GPU_PEX_RST_HOLD#
SYS_PEX_RST_MON#
0.1u_0201_10V6K
+3VG_AON
5
G
QV1B
2N7002KDWH_SOT363-6
@
S
3
4
D
1
2
OPT@
RV7 0_0402_5%
QV1A
2N7002KDWH_SOT363-6
@
6 1
D
1
UV2
1
VCC
A
2
B
GND3Y
74LVC1G08SE-7_SOT353-5
OPT@
2
RV14 10K_0402_5%OPT@
1
RV16 0_0402_5%@
DV6
2
3
BAT54AW_SOT323-3
GC6@
1 2
RV39 0_0402_5%NGC6@
+3VG_AON
2
RV40
10K_0402_5%
@
1
1
CV23
@
5
2
1
D
QV5
2N7002KW_SOT323-3
@
1
RV48
0_0402_5%
2
G
@
PU AT EC SIDE, +3VS AND 4.7K
RV10
0_0402_5%
1
+3VGARST
RV12
1
CV11
0.1u_0201_10V6K
OPT@
2
5
4
1
2
+3VG_AON
+3VGS
2
2
RV180
2.2K_0402_5%
GC6@
1
1
1
+3VG_AON
2
RV44
10K_0402_5%
@
1
RV46
10K_0402_5%
@
1 2
CLK_REQ_GPU#
3
S
2
EC_SMB_CK2 7,39,44
EC_SMB_DA2 7,39,44
+3VS
1 2
@
+3VG_AON
2
@
0_0402_5%
SYS_PEX_RST_MON#
RV37
10K_0402_5%
@
PLT_RST_VGA#
PCIE_CRX_GTX_P0
PCIE_CRX_GTX_N0
PCIE_CRX_GTX_P1
PCIE_CRX_GTX_N1
PCIE_CRX_GTX_P2
PCIE_CRX_GTX_N2
PCIE_CRX_GTX_P3
PCIE_CRX_GTX_N3
4
OPT@
OPT@
OPT@
OPT@
OPT@
OPT@
Differential signal
4
1
2
CV10 0.22U_0201_6.3V6-K
2
1
CV13 0.22U_0201_6.3V6-KOPT@
2
1
CV8 0.22U_0201_6.3V6-K
1
2
CV9 0.22U_0201_6.3V6-K
1 2
CV6 0.22U_0201_6.3V6-K
1
2
CV7 0.22U_0201_6.3V6-KOPT@
1 2
CV4 0.22U_0201_6.3V6-K
2
1
CV5 0.22U_0201_6.3V6-K
CLK_PCIE_GPU 10
CLK_PCIE_GPU# 10
1
2
RV32
@
200_0402_1%
1 2
RV35
OPT@
2.49K_0402_1%
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N3
PCIE_CRX_C_GTX_P0
PCIE_CRX_C_GTX_N0
PCIE_CRX_C_GTX_P1
PCIE_CRX_C_GTX_N1
PCIE_CRX_C_GTX_P2
PCIE_CRX_C_GTX_N2
PCIE_CRX_C_GTX_P3
PCIE_CRX_C_GTX_N3
CLK_PCIE_GPU
CLK_PCIE_GPU#
CLK_REQ_GPU#
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
PLT_RST_VGA#
PEX_TERMP
10P_0201_25V8G
OPT@
AG6
AG7
AF7
AE7
AE9
AF9
AG9
AG10
AF10
AE10
AE12
AF12
AG12
AG13
AF13
AE13
AE15
AF15
AG15
AG16
AF16
AE16
AE18
AF18
AG18
AG19
AF19
AE19
AE21
AF21
AG21
AG22
AC9
AB9
AB10
AC10
AD11
AC11
AC12
AB12
AB13
AC13
AD14
AC14
AC15
AB15
AB16
AC16
AD17
AC17
AC18
AB18
AB19
AC19
AD20
AC20
AC21
AB21
AD23
AE23
AF24
AE24
AG24
AG25
AE8
AD8
AC6
AF22
AE22
AC7
AF25
CV19
UV1A
PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
NC81
NC82
NC83
NC84
NC85
NC86
NC87
NC88
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
NC89
NC90
NC91
NC92
NC93
NC94
NC95
NC96
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24
NC25
NC26
NC27
NC28
NC29
NC30
NC31
NC32
PEX_REFCLK
PEX_REFCLK_N
PEX_CLKREQ_N
PEX_TSTCLK
PEX_TSTCLK_N
PEX_RST_N
PEX_TERMP
N15S-GT-S-A2_FCBGA595
@
RV38 10M_0402_5%OPT@
YV1
XTAL_IN
1
OSC1
2
GND1
1
27MHZ_10PF_7V27000050
OPT@
2
3
Part 1 of 6
PCI EXPRESS
1
3
GPIO
DACs
I2C
CLK
XTAL_OUTBUFF
2
GND2
OSC2
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
OVERT
NC33
NC97
NC98
NC99
NC100
NC101
NC102
NC103
NC104
I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA
I2CS_SCL
I2CS_SDA
CORE_PLLVDD
SP_PLLVDD
VID_PLLVDD
XTAL_IN
XTAL_OUT
XTAL_SSIN
4
XTAL_OUT
3
FB_GC6_EN
C6
B2
D6
C7
F9
3VGS_PWR_EN
A3
GPU_EVENT#_R
A4
B6
SYS_PEX_RST_MON#
E9
VGA_ALERT#
F8
C5
NVVDD_PWM_VID
E7
VGA_AC_DET_R
D7
PSI_VGA_R
B4
B3
C3
D5
D4
C2
F7
E6
GPU_PEX_RST_HOLD#
C4
A6
OVERT#
AB6
AG3
AF4
AF3
AE3
AE4
W5
AE2
AF2
VGA_CRT_CLK
B7
VGA_CRT_DATA
A7
I2CB_SCL
C9
I2CB_SDA
C8
I2CC_SCL
A9
I2CC_SDA
B9
VGA_SMB_CK2
D9
VGA_SMB_DA2
D8
60mA
L6
M6
45mA
N6
45mA
XTAL_IN
C11
XTAL_OUT
B10
A10
XTALSSIN
C10
XTALOUT
1
CV20
10P_0201_25V8G
OPT@
2
2
FB_GC6_EN 24
3VGS_PWR_EN 22,58
NVVDD_PWM_VID 58
1
RV6 0_0402_5%
I2C,if not use, can be soft grounded
and delete pull up resistor
---colin
RB751V-40_SOD323-2
1
2
DV1
2
@
OPT@
PSI_VGA 58
VGA_AC_DET 44
Internal Thermal Sensor
+PLLVDD
1
RV24 0_0402_5%@
1
OPT@
1
2
2
RV34 10K_0402_5%
2
RV36 10K_0402_5%OPT@
+SP_PLLVDD
VGA_CRT_DATA
VGA_CRT_CLK
I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA
XTALOUT
RV17 2.2K_0402_5%
RV19 2.2K_0402_5%@
RV22 2.2K_0402_5%
RV25 2.2K_0402_5%@
RV28 2.2K_0402_5%@
RV30 2.2K_0402_5%@
RV33 10K_0402_5%@
Under GPU(below 150mils)
+SP_PLLVDD
150mA
Under GPU
+PLLVDD
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF LC FUTUR E CE NTER. AND CONTAI NS C ONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF LC FUTUR E CE NTER. AND CONTAI NS C ONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF LC FUTUR E CE NTER. AND CONTAI NS C ONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY LC FUTURE CENT ER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS A UTHORIZED BY LC FUTURE CENT ER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS A UTHORIZED BY LC FUTURE CENT ER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTE N CONSENT OF LC FUTURE CENTE R.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTE N CONSENT OF LC FUTURE CENTE R.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTE N CONSENT OF LC FUTURE CENTE R.
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
10K_0402_5%
FB_GC6_EN
10K_0402_5%
10K_0402_5%
GPU_EVENT#_R
PLT_RST_VGA#
1
@
1
1
@
1 2
1
1 2
1
1
OPT@
2
CV15
1
OPT@
2
CV21
2016/08/20
2016/08/20
2016/08/20
2
2
2
2
2
0.1u_0201_10V6K
0.1u_0201_10V6K
+3VG_AON
2
RV45
@
1
RV47
@
1 2
+3VG_AON
2
RV13
@
1
0.01U_0201_10V6K
1
OPT@
2
CV16
0.1u_0201_10V6K
Near GPU
1
OPT@
2
CV22
22U_0603_6.3V6-M
1
+3VG_AON
2
RV41
10K_0402_5%
@
1
1
CV24
0.1u_0201_10V6K
@
2
G
2
FB_GC6_EN_R
1 3
D
S
QV6
2N7002KW_SOT323-3
@
2
1
RV49 0_0402_5%GC6@
+3VG_AON
1
CV12
0.1u_0201_10V6K
2
G
@
2
2
G
2
1
D
1
0_0603_5%
1
0_0603_5%
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
GPU_EVENT#
1
CV218
220P_0201_25V7-K
OPT@
2
RV18 10K_0402_5%
RV20 10K_0402_5%
RV23 10K_0402_5%OPT@
RV26 100K_0402_5%
RV29 10K_0402_5%
RV31 10K_0402_5%OPT@
2
@
2
@
CG413
CG413
CG413
1
1 3
D
S
QV4
2N7002KW_SOT323-3
@
1
RV15 0_0402_5%GC6@
2
1
RV174
OVERT#
CV221
+3VG_AON
56_0402_5%
@
OPT@
3
S
QV23
1
2N7002KW_SOT323-3
@
2
3VGS_PWR_EN
OVERT#
VGA_ALERT#
VGA_AC_DET_R
PSI_VGA
GPU_PEX_RST_HOLD#
180ohms (ESR=0.2) Bead
1
1
OPT@
OPT@
2
2
CV18
CV17
22U_0603_6.3V6-M
4.7U_0402_6.3V6M
30ohms (ESR=0.05) Bead
Title
Title
Title
N16X_PCIE/ DAC/ GPIO
N16X_PCIE/ DAC/ GPIO
N16X_PCIE/ DAC/ GPIO
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
Custom
Custom
Custom
Date: Sh eet of
Date: Sh eet of
Date: Sh eet of
2
1
1
1
1
1
OPT@
OPT@
OPT@
OPT@
LV1
LV2
WRST# 44
1
2
2
2
2
2
FB_GC6_EN_R 8
GPU_EVENT# 8
+3VG_AON
+1.05VGS
+1.05VGS
20 60
20 60
20 60
1.0
1.0
1.0
C
B
A
5
4
3
2
1
D D
C
B
UV1C
AC3
NC105
AC4
NC106
Y4
NC107
Y3
NC108
AA3
NC109
AA2
NC110
AB1
NC111
AA1
NC112
AA4
NC113
AA5
NC114
AB5
NC115
AB4
NC116
AB3
NC117
AB2
NC118
AD3
NC119
AD2
NC120
AE1
NC121
AD1
NC122
AD4
NC123
AD5
NC124
T2
NC125
T3
NC126
T1
NC127
R1
NC128
R2
NC129
R3
NC130
N2
NC131
N3
NC132
V3
NC133
V4
NC134
U3
NC135
U4
NC136
T4
NC137
T5
NC138
R4
NC139
R5
NC140
N1
NC34
M1
NC35
M2
NC36
M3
NC37
K2
NC38
K3
NC39
K1
NC40
J1
NC41
M4
NC42
M5
NC43
L3
NC44
L4
NC45
K4
NC46
K5
NC47
J4
NC48
J5
NC49
N4
NC141
N5
NC142
P3
NC143
P4
NC144
J2
NC145
J3
NC146
H3
NC147
H4
NC148
N15S-GT-S-A2_FCBGA595
@
Part 3 of 6
LVDS /TMDS
MULTI_STRAP_REF0_GND
MULTI_STRAP_REF1_GNDMLS_REF1
MULTI_STRAP_REF2_GND
NC50
NC51
NC52
FERMI_RSVD1
FERMI_RSVD2
NC56
NC57
NC58
NC
NC59
NC60
NC61
NC62
NC63
NC64
NC65
NC66
NC67
NC68
BUFRST_N
PGOOD
NC71
NC72
STRAP0
STRAP1
GENERA L
STRAP2
STRAP3
STRAP4
NC73
THERMDP
THERMDN
VDD_SENSE
GND_SENSE
TEST
TESTMODE
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST_N
SERIAL
ROM_CS_N
ROM_SI
ROM_SO
ROM_SCLK
F11
AD10
AD7
V5
V6
G1
G2
G3
G4
G5
G6
G7
V1
V2
W1
W2
W3
W4
D11
D10
E10
F10
D1
D2
E4
E3
D3
C1
F6
F4
F5
F12
E12
F2
F1
AD9
AE5
AE6
AF6
AD6
AG4
D12
B12
A12
C12
1
2
RV50 10K_0402_5%@
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
MULTI_STRAP_REF0_GND
VCCSENSE_VGA
trace width: 16mils
differential voltage sensing.
differential signal routing.
VSSSENSE_VGA
TESTMODE
1
@
TV1
1
@
TV2
1
@
TV3
1
@
TV4
1
@
ROM_SI
ROM_SO
ROM_SCLK
TV5
+3VG_AON
STRAP0 29
STRAP1 29
STRAP2 29
STRAP3 29
STRAP4 29
VCCSENSE_VGA 58
VSSSENSE_VGA 58
RV52 10K_0402_5%
RV53 10K_0402_5%OPT@
ROM_SI 29
ROM_SO 29
ROM_SCLK 29
1
OPT@
1 2
2
1 2
RV181
10K_0402_5%
@
1
RV51
40.2K_0402_1%
OPT@
2
C
B
A
Title
Title
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
N16X_LVDS/ HDMI/ THERM
N16X_LVDS/ HDMI/ THERM
N16X_LVDS/ HDMI/ THERM
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
21 60
21 60
21 60
of
of
of
A
1.0
1.0
1.0
5
4
3
2
1
PEX_IOVVDD/Q Decouling
+1.35VGS
D D
C
CD@
CV25
Near GPU
OPT@
1
2
2
1
10U_0603_6.3V6M
22U_0603_6.3V6-M
CV26
Under GPU(below 150mils)
OPT@
1
2
4.7U_0402_6.3V6M
CV27
OPT@
OPT@
1
1
2
2
4.7U_0402_6.3V6M
1U_0402_6.3V6K
CV29
CV28
CD@
CV30
1
2
1U_0402_6.3V6K
1
1
2
2
CV32
CV31
0.1u_0201_10V6K
0.1u_0201_10V6K
OPT@
OPT@
3.5A
UV1D
B26
FBVDDQ_01
C25
FBVDDQ_02
E23
FBVDDQ_03
E26
FBVDDQ_04
F14
FBVDDQ_05
F21
FBVDDQ_06
G13
FBVDDQ_07
G14
FBVDDQ_08
G15
FBVDDQ_09
G16
FBVDDQ_10
G18
FBVDDQ_11
G19
FBVDDQ_12
G20
FBVDDQ_13
G21
FBVDDQ_14
L22
FBVDDQ_19
L24
FBVDDQ_20
L26
FBVDDQ_21
M21
FBVDDQ_22
N21
FBVDDQ_23
R21
FBVDDQ_24
T21
FBVDDQ_25
V21
FBVDDQ_26
W21
FBVDDQ_27
H24
FBVDDQ_AON_1
H26
FBVDDQ_AON_2
J21
FBVDDQ_AON_3
K21
FBVDDQ_AON_4
V7
NC149
W7
NC150
AA6
NC151
W6
NC152
Y6
NC153
M7
NC154
N7
NC155
T6
NC156
P6
NC157
T7
NC158
R7
NC159
U6
NC160
R6
NC161
J7
NC76
K7
NC77
K6
NC78
H6
NC79
J6
NC80
N15S-GT-S-A2_FCBGA595
@
Part 4 of 6
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
PEX_IOVDD_6
3V3_AON_1
3V3_AON_2
3V3_MAIN_1
3V3_MAIN_2
POWER
FB_CAL_VDDQ
FB_CAL_GND
FB_CAL_TERM
PEX_PLL_HVDD_1
PEX_PLL_HVDD_2
PEX_SVDD_3V3
PEX_PLLVDD_1
PEX_PLLVDD_2
AA10
AA12
AA13
AA16
AA18
AA19
AA20
AA21
AB22
AC23
AD24
AE25
AF26
AF27
AA22
AB23
AC24
AD25
AE26
AE27
G10
G12
G8
G9
D22
C24
B25
AA8
AA9
AB8
AA14
AA15
Under GPU
2000mA
(below 150mils)
1 2
RV55 40.2_0402_1%OPT@
1
RV56 42.2_0402_1%OPT@
1 2
RV57 51.1_0402_1%OPT@
Place near balls
120mA
+PEX_PLLVDD
Near GPU
1
OPT@
2
1U_0402_6.3V6K
CV33
+1.05VGS
1
OPT@
2
22U_0603_6.3V6-M
CV43
+3VG_AON
+VDD33
+1.35VGS
2
Under GPU(below 150mils)
Near balls
+1.05VGS
1
2
OPT@
2
CV37
4.7U_0402_6.3V6M
1
OPT@
RF_NS@
1
CV39
For RF
2
10U_0603_6.3V6M
CV215
33P_0402_50V8J
Under Near
1
1
OPT@
OPT@
2
2
CV47
CV48
1U_0402_6.3V6K
0.1u_0201_10V6K
Near balls
(Under GPU)
1
OPT@
2
CV50
1
OPT@
2
CV55
0.1u_0201_10V6K
1
OPT@
2
CV58
0.1u_0201_10V6K
1
1
OPT@
OPT@
2
2
CV57
CV56
4.7U_0402_6.3V6M
1
1
OPT@
OPT@
2
2
1U_0402_6.3V6K
CV60
CV59
Near GPU
1
OPT@
2
CV51
0.1u_0201_10V6K
0.1u_0201_10V6K
+3VG_AON
4.7U_0402_6.3V6M
120ohm (ESR=0.18) Bead
@
RV62 0_0603_5%@
4.7U_0402_6.3V6M
+3.3VS TO +3VG_AON
+3VS
CV61
RV65
@
LP2301ALT1G_SOT23-3
S
3
QV11
1
2
1
CV64
0.1u_0201_10V6K
OPT@
2
+5VALW
B
PXS_PWREN#
PXS_PWREN 8,58
RV66
100K_0402_5%
OPT@
1 2
RV63
47K_0402_5%
OPT@
2
G
1
0.1u_0201_10V6K
2
1 2
OPT@
10K_0402_5%
1
D
QV12
2N7002KW_SOT323-3
OPT@
S
3
+3VG_AON
D
1
OPT@
G
2
1
CV62
0.01U_0201_10V6K
@
2
PXS_PWREN#
2
G
1
RV64
470_0603_5%
@
2
1 3
D
QV13
2N7002KW_SOT323-3
@
S
1
CV63
10U_0603_6.3V6M
OPT@
2
FBVDDQ_PWR_EN 24,57
47K_0402_5%
2
G
RV69
+5VALW
@
1
2
1
D
S
3
FBVDDQ_PWR_EN#
QV18
2N7002KW_SOT323-3
@
MLCC
+3VG_AON
1
OPT@
2
CV49
4.7U_0402_6.3V6M
1
1
OPT@
OPT@
2
2
1U_0402_6.3V6K
CV52
CV53
4.7U_0402_6.3V6M
2
HCB1608KF-121T30_0603
1 2
+1.35VGS
2
G
1.0uF
4.7uF
10uF
22uF
RV54 0_0402_5%
1
LV3
1
RV67
470_0603_5%
@
2
1
D
QV15
2N7002KW_SOT323-3
@
S
3
Q'ty
1
2
@
CALIBRATION PIN
FB_CAL_x_PD_VDDQ
FB_CAL_x_PU_GND
FB_CAL_xTERM_GND
+1.05VGS
1
1
1
1
+3VGS
DDR3
40.2Ohm
42.2Ohm
51.1Ohm
C
B
2
G
2016/08/20
2016/08/20
2016/08/20
+1.05VGS
1 2
RV59
470_0603_5%
@
1
D
QV10
2N7002KW_SOT323-3
@
S
3
Title
Title
Title
N16X_Power
N16X_Power
N16X_Power
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
Date: Sheet
Date: Sheet of
Date: Sheet of
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
22 60
22 60
22 60
A
1.0
1.0
1.0
of
RV60
47K_0402_5%
2
G
Deciphered Date
Deciphered Date
Deciphered Date
2
+5VALW
1
@
2
1.05VGS_EN#
1
D
QV9
2N7002KW_SOT323-3
@
S
3
0.1u_0201_10V6K
1
4.7K_0402_5%
CV72
2
+3VG_AON
@
RV73
1
RV171
0_0603_5%
LP2301ALT1G_SOT23-3
S
QV16
1
2
1
CV75
0.1u_0201_10V6K
GC6@
2
G
+3.3VS TO +3VGS
+5VALW
1 2
RV71
47K_0402_5%
DGPU_PWR_EN#
1
RV74
2
2
G
GC6@
GC6@
1
D
QV19
2N7002KW_SOT323-3
GC6@
S
3
A
3VGS_PWR_EN 20,58
100K_0402_5%
GC6@
5
2
4
2
NGC6@
D
1 3
GC6@
DGPU_PWR_EN#
+3VGS
1
CV73
0.01U_0201_10V6K
GC6@
2
2
G
1 2
RV72
470_0603_5%
@
1
D
QV20
2N7002KW_SOT323-3
@
S
3
1
CV74
10U_0603_6.3V6M
GC6@
2
EN_VGA 23,57,58
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
5
D D
4
3
2
1
UV1E
A2
A26
AB11
AB14
AB17
AB20
AB24
AC2
AC22
AC26
AC5
AC8
AD12
AD13
AD15
AD16
AD18
AD19
AD21
AD22
AE11
AE14
AE17
AE20
AF1
AF11
AF14
AF17
C
B
AF20
AF23
AG26
AF5
AF8
AG2
B1
B11
B14
B17
B20
B23
B27
B5
B8
E11
E14
E17
E2
E20
E22
E25
E5
E8
H2
H23
H25
H5
Part 5 o f 6
GND_001
GND_002
GND_003
GND_004
GND_005
GND_006
GND_007
GND_008
GND_009
GND_010
GND_011
GND_012
GND_013
GND_014
GND_015
GND_016
GND_017
GND_018
GND_019
GND_020
GND_021
GND_022
GND_023
GND_024
GND_025
GND_026
GND_027
GND_028
GND_029
GND_030
GND_031
GND_032
GND_033
GND_034
GND_035
GND_036
GND_037
GND_038
GND_039
GND_040
GND_041
GND_042
GND_043
GND_044
GND_045
GND_046
GND_047
GND_048
GND_049
GND_050
GND_051
GND_052
GND_053
GND_054
GND_055
GND_056
N15S-GT-S-A2_FCBGA595
@
GND
GND_057
GND_058
GND_059
GND_060
GND_061
GND_062
GND_063
GND_064
GND_065
GND_066
GND_067
GND_068
GND_069
GND_070
GND_071
GND_072
GND_073
GND_074
GND_075
GND_076
GND_077
GND_078
GND_079
GND_080
GND_081
GND_082
GND_083
GND_084
GND_085
GND_086
GND_087
GND_088
GND_089
GND_090
GND_091
GND_092
GND_093
GND_094
GND_095
GND_096
GND_097
GND_098
GND_099
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
K11
K13
K15
K17
L10
L12
L14
L16
L18
L2
L23
L25
L5
M11
M13
M15
M17
N10
N12
N14
N16
N18
P11
P13
P15
P17
P2
P23
P26
P5
R10
R12
R14
R16
R18
T11
T13
T15
T17
U10
U12
U14
U16
U18
U2
U23
U26
U5
V11
V13
V15
V17
Y2
Y23
Y26
Y5
AA7
AB7
+VGA_CORE
Under GPU
OPT@
CV76
OPT@
CV89
OPT@
CV93
OPT@
CV103
Near GPU
1
1
2
4.7U_0402_6.3V6M
1
2
1U_0402_6.3V6K
1
2
4.7U_0402_6.3V6M
1
2
22U_0603_6.3V6-M
CD@
CV77
OPT@
CV90
OPT@
CV94
OPT@
CV104
1
OPT@
2
2
CV78
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
OPT@
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CV91
1
1
OPT@
2
2
CV95
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
CD@
1
1
2
2
CV105
22U_0603_6.3V6-M
22U_0603_6.3V6-M
OPT@
CV79
OPT@
CV92
CD@
CV96
RF_NS@
CV214
1
1
2
4.7U_0402_6.3V6M
1
2
1U_0402_6.3V6K
1
2
4.7U_0402_6.3V6M
1
2
33P_0402_50V8J
OPT@
2
CV80
1
RF_NS@
2
CV213
1
CD@
2
CV97
For RF
4.7U_0402_6.3V6M
For RF
33P_0402_50V8J
4.7U_0402_6.3V6M
1
1
OPT@
OPT@
2
2
CV81
CV82
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
@
@
1
1
2
2
CV98
CV99
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
1
OPT@
OPT@
2
2
CV84
CV83
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
@
@
1
1
2
2
CV101
CV100
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
@
1
1
OPT@
2
2
CV86
CV85
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
@
1
2
CV102
4.7U_0402_6.3V6M
1
1
2
2
CV88
CV87
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
@
@
+VGA_CORE
UV1F
K10
VDD_001
K12
VDD_002
K14
VDD_003
K16
VDD_004
K18
VDD_005
L11
VDD_006
L13
VDD_007
L15
VDD_008
L17
VDD_009
M10
VDD_010
M12
VDD_011
M14
VDD_012
M16
VDD_013
M18
VDD_014
N11
VDD_015
N13
VDD_016
N15
VDD_017
N17
VDD_018
P10
VDD_019
P12
VDD_020
N15S-GT-S-A2_FCBGA595
@
Part 6 of 6
POWER
VDD_041
VDD_040
VDD_039
VDD_038
VDD_037
VDD_036
VDD_035
VDD_034
VDD_033
VDD_032
VDD_031
VDD_030
VDD_029
VDD_028
VDD_027
VDD_026
VDD_025
VDD_024
VDD_023
VDD_022
VDD_021
+VGA_CORE
V18
V16
V14
V12
V10
U17
U15
U13
U11
T18
T16
T14
T12
T10
R17
R15
R13
R11
P18
P16
P14
C
B
+5VALW
2
RV172
47K_0402_5%
@
1
1 3
D
2
EN_VGA 22,57,58
A
5
4
G
QV21
2N7002KW_SOT323-3
@
S
+VGA_CORE
1 2
RV173
470_0603_5%
@
1 3
D
2
QV22
G
2N7002KW_SOT323-3
@
S
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
Title
Title
N16X_+VGA CORE, GND
N16X_+VGA CORE, GND
N16X_+VGA CORE, GND
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
Date: Sheet
Date: Sheet of
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
23 60
23 60
23 60
A
1.0
1.0
1.0
of
of
5
4
3
2
1
Place close to ball Place close to BGA
OPT@
CV112
+FB_PLLAVDD
FBA_D[0..63]
OPT@
1
2
1U_0402_6.3V6K
+FB_PLLAVDD
200mA
1
OPT@
2
CV113
FB_GC6_EN
0.1u_0201_10V6K
RV119 0_0402_5%@
RV120 10K_0402_5%
Place close to ball
1 2
OPT@
CV115
0.1u_0201_10V6K
2
1
1
2
OPT@
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FB_CLAMP
AA24
AA23
AD27
AB25
AD26
AC25
AA27
AA26
E18
F18
E16
F17
D20
D21
F20
E21
E15
D15
F15
F13
C13
B13
E13
D13
B15
C16
A13
A15
B18
A18
A19
C19
B24
C23
A25
A24
A21
B21
C20
C21
R22
R24
T22
R23
N25
N26
N23
N24
V23
V22
T23
U22
Y24
Y22
W26
Y25
R26
T25
N27
R27
V26
V27
W27
W25
F16
P22
D23
H22
F3
UV1B
FBA_D00
FBA_D01
FBA_D02
FBA_D03
FBA_D04
FBA_D05
FBA_D06
FBA_D07
FBA_D08
FBA_D09
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FB_PLLAVDD_1
FB_PLLAVDD_2
FB_VREF
FB_DLLAVDD
FB_CLAMP
Part 2 of 6
MEMORY
INTERFACE A
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA_CLK0_N
FBA_CLK1_N
FBA_WCK01_N
FBA_WCK23_N
FBA_WCK45_N
FBA_WCK67_N
FBA_CMD00
FBA_CMD01
FBA_CMD02
FBA_CMD03
FBA_CMD04
FBA_CMD05
FBA_CMD06
FBA_CMD07
FBA_CMD08
FBA_CMD09
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_CMD32
FBA_CMD34
FBA_CMD35
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_CLK0
FBA_CLK1
FBA_WCK01
FBA_WCK23
FBA_WCK45
FBA_WCK67
FBA_ODT_L
C27
FBA_CS1#_L
C26
FBA_CS0#_L
E24
FBA_CKE_L
F24
FBA_CMD4
D27
FBA_CMD5
D26
FBA_CMD6
F25
FBA_CMD7
F26
FBA_CMD8
F23
FBA_CMD9
G22
FBA_CMD10
G23
FBA_RAS#
G24
FBA_CMD12
F27
FBA_CMD13
G25
FBA_CMD14
G27
FBA_CAS#
G26
FBA_ODT_H
M24
FBA_CS1#_H
M23
FBA_CS0#_H
K24
FBA_CKE_H
K23
FBA_RST#
M27
FBA_CMD21
M26
FBA_CMD22
M25
FBA_CMD23
K26
FBA_CMD24
K22
FBA_CMD25
J23
FBA_CMD26
J25
FBA_CMD27
J24
FBA_CMD28
K27
FBA_CMD29
K25
FBA_CMD30
J27
J26
B19
F22
RV121 60.4_0402_1%
J22
RV122 60.4_0402_1%@
D19
D14
C17
C22
P24
W24
AA25
U25
F19
C14
A16
A22
P25
W22
AB27
T27
E19
C15
B16
B22
R25
W23
AB26
T26
D24
D25
N22
M22
D18
C18
D17
D16
T24
U24
V24
V25
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS#0
FBA_DQS#1
FBA_DQS#2
FBA_DQS#3
FBA_DQS#4
FBA_DQS#5
FBA_DQS#6
FBA_DQS#7
FBA_DQS0
FBA_DQS1
FBA_DQS2
FBA_DQS3
FBA_DQS4
FBA_DQS5
FBA_DQS6
FBA_DQS7
FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#
1 2
@
1 2
FBA_ODT_L 25,27
FBA_CS1#_L 27
FBA_CS0#_L 25
FBA_CKE_L 25,27
FBA_RAS# 25,26,27,28
FBA_CAS# 25,26,27,28
FBA_ODT_H 26,28
FBA_CS1#_H 28
FBA_CS0#_H 26
FBA_CKE_H 26,28
FBA_RST# 25,26,27,28
+1.35VGS
FBA_CLK0 25,27
FBA_CLK0# 25,27
FBA_CLK1 26,28
FBA_CLK1# 26,28
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_RAS#
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CAS#
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
2
1
RV75 100_0402_5%OPT@
1
2
RV76 100_0402_5%OPT@
2
1
RV77 100_0402_5%OPT@
2
1
RV78 100_0402_5%OPT@
1 2
RV79 100_0402_5%OPT@
2
1
RV80 100_0402_5%OPT@
2
1
RV81 100_0402_5%OPT@
1 2
OPT@
RV82 100_0402_5%
2
1
RV83 100_0402_5%OPT@
2
1
RV84 100_0402_5%OPT@
1
2
RV85 100_0402_5%OPT@
2
1
RV86 100_0402_5%
OPT@
2
1
RV87 100_0402_5%
OPT@
2
1
RV88 100_0402_5%
OPT@
1
2
RV89 100_0402_5%OPT@
2
1
RV90 100_0402_5%OPT@
1
2
RV91 100_0402_5%OPT@
2
1
RV92 100_0402_5%OPT@
2
1
RV93 100_0402_5%
OPT@
1
2
RV94 100_0402_5%OPT@
1 2
RV95 100_0402_5%OPT@
1
2
RV96 100_0402_5%OPT@
2
1
RV97 100_0402_5%
OPT@
1
2
RV98 100_0402_5%
OPT@
1
2
RV99 100_0402_5%
OPT@
1 2
RV100 100_0402_5%OPT@
2
1
RV101 100_0402_5%OPT@
1 2
RV102 100_0402_5%OPT@
2
1
RV103 100_0402_5%OPT@
2
1
RV104 100_0402_5%OPT@
2
1
RV105 100_0402_5%
OPT@
2
1
RV106 100_0402_5%
OPT@
1 2
RV107 100_0402_5%OPT@
1
2
RV108 100_0402_5%OPT@
2
1
RV109 100_0402_5%OPT@
1
2
RV110 100_0402_5%OPT@
1 2
RV111 100_0402_5%OPT@
2
1
RV112 100_0402_5%OPT@
1
2
RV113 100_0402_5%OPT@
2
1
RV114 100_0402_5%OPT@
1
2
RV115 100_0402_5%OPT@
1
2
RV116 100_0402_5%
OPT@
1
2
RV117 100_0402_5%OPT@
1 2
RV118 100_0402_5%OPT@
+1.35VGS
@
1
2
0.1u_0201_10V6K
CV106
@
1
2
0.1u_0201_10V6K
CV107
@
1
2
0.1u_0201_10V6K
CV108
@
1
2
0.1u_0201_10V6K
CV109
@
1
2
0.1u_0201_10V6K
CV110
@
1
2
0.1u_0201_10V6K
CV114
CMD mapping mod Mode E
Address
FBx_CMD0
FBx_CMD1
FBx_CMD2
FBx_CMD3
FBx_CMD4
FBx_CMD5
FBx_CMD6
FBx_CMD7
FBx_CMD8
FBx_CMD9
FBx_CMD10
FBx_CMD11
FBx_CMD12
FBx_CMD13
FBx_CMD14
FBx_CMD15
FBx_CMD16
FBx_CMD17
FBx_CMD18
FBx_CMD19
FBx_CMD20
FBx_CMD21
FBx_CMD22
FBx_CMD23
FBx_CMD24
FBx_CMD25
FBx_CMD26
FBx_CMD27
FBx_CMD28
FBx_CMD29
FBx_CMD30
0..31
ODT_L
CS0#_L
CKE_L
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#
RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0
Rank0
32..63
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#
ODT_H
CS0#_H
CKE_H
RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0
0..31
ODT_L
CS1#_L
CKE_L
A11
A7
BA1
A12
A8
A0
A2
RAS#
A14
A3
A13
CAS#
RST
A6
A5
A9
A1
WE#
A4
A10
BA0
BA2
Rank1
32..63
A11
A7
BA1
A12
A8
A0
A2
RAS#
A14
A3
A13
CAS#
ODT_H
CS1#_H
CKE_H
RST
A6
A5
A9
A1
WE#
A4
A10
BA0
BA2
FBA_D[0..63] 25,26,27,28
FBA_DQM[7..0] 25,26,27,28
FBA_DQS[7..0] 25,26,27,28
FBA_DQS#[7..0] 25,26,27,28
FBA_CMD[30..0] 25,26,27,28
D D
C
30ohms (ESR=0.01) Bead
+1.05VGS
1 2
LV4
HCB1608KF-300T60_2P
Place close to BGA
+FB_PLLAVDD
1
OPT@
2
CV111
22U_0603_6.3V6-M
B
C
B
N15S-GT-S-A2_FCBGA595
@
FB_GC6_EN
1
2
RV123
FB_GC6_EN 20
RV124
+3VGS
A
DGPU_PWROK 8,57,58
5
0_0402_5%
1 2
10K_0402_5%
@
@
GC6_EN
BAV70W-7-F_SOT323-3
1
RV126
0_0402_5%
DV4 GC6@
2
3
2
NGC6@
1
1
RV125
200K_0402_5%
GC6@
2
4
FBVDDQ_PWR_EN 22,57
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
Title
Title
N16X_MEM Interface
N16X_MEM Interface
N16X_MEM Interface
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
24 60
24 60
24 60
A
1.0
1.0
1.0
of
of
5
at least 16 mils width(optimal)
20 mils spacing to other signals /planes
D D
C
B
+1.35VGS
1 2
1
2
+1.35VGS
1 2
1 2
1
2
FBA_ODT_L
FBA_CKE_L
RANKA@
RV128
1.33K_0402_1%
+FBA_VREFCA0
RANKA@
RV127
1.33K_0402_1%
RANKA@
RV167
1.33K_0402_1%
+FBA_VREFDQ0
RANKA@
RV168
1.33K_0402_1%
FBA_CLK0
RV129
162_0402_1%
RANKA@
FBA_CLK0#
1 2
RV133
10K_0402_5%
RANKA@
1
CV116
0.01U_0201_10V6K
RANKA@
2
1
CV216
0.01U_0201_10V6K
RANKA@
2
+FBA_VREFCA0 27
+FBA_VREFDQ0 27
1
RV134
10K_0402_5%
RANKA@
2
FBA_CLK0 24,27
FBA_CLK0# 24,27
FBA_CKE_L 24,27
FBA_ODT_L 24,27
FBA_CS0#_L 24
FBA_RAS# 24,26,27,28
FBA_CAS# 24,26,27,28
FBA_RST# 24,26,27,28
1
RV131
10K_0402_5%
RANKA@
2
+FBA_VREFCA0
+FBA_VREFDQ0
FBA_CMD7
FBA_CMD10
FBA_CMD24
FBA_CMD6
FBA_CMD22
FBA_CMD26
FBA_CMD5
FBA_CMD21
FBA_CMD8
FBA_CMD4
FBA_CMD25
FBA_CMD23
FBA_CMD9
FBA_CMD12
FBA_CMD14
FBA_CMD29
FBA_CMD13
FBA_CMD27
FBA_CLK0
FBA_CLK0#
FBA_CKE_L
FBA_ODT_L
FBA_CS0#_L
FBA_RAS#
FBA_CAS#
FBA_CMD28
FBA_RST#
1
RANKA@
4
FBA_DQS0
FBA_DQS3
FBA_DQM0
FBA_DQM3
FBA_DQS#0
FBA_DQS#3
2
RV130
243_0402_1%
UV6
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC1
L1
NC2
J9
NC3
L9
NC4
M7
NC5
96-BALL
SDRAM DDR3
K4W4G1646B-HC11_FBGA96
@
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
3
FBA_D5
E3
FBA_D1
F7
FBA_D7
F2
FBA_D0
F8
FBA_D4
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
FBA_D3
FBA_D6
FBA_D2
FBA_D31
FBA_D25
FBA_D30
FBA_D24
FBA_D29
FBA_D27
FBA_D28
FBA_D26
+1.35VGS
Group0
Group3
RV132
243_0402_1%
RANKA@
+FBA_VREFCA0
+FBA_VREFDQ0
FBA_CMD7
FBA_CMD10
FBA_CMD24
FBA_CMD6
FBA_CMD22
FBA_CMD26
FBA_CMD5
FBA_CMD21
FBA_CMD8
FBA_CMD4
FBA_CMD25
FBA_CMD23
FBA_CMD9
FBA_CMD12
FBA_CMD14
FBA_CMD29
FBA_CMD13
FBA_CMD27
FBA_CMD28
FBA_RST#
1 2
FBA_CLK0
FBA_CLK0#
FBA_CKE_L
FBA_ODT_L
FBA_CS0#_L
FBA_RAS#
FBA_CAS#
FBA_DQS1
FBA_DQS2
FBA_DQM1
FBA_DQM2
FBA_DQS#1
FBA_DQS#2
UV5
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC1
L1
NC2
J9
NC3
L9
NC4
M7
NC5
96-BALL
SDRAM DDR3
K4W4G1646B-HC11_FBGA96
@
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
2
FBA_D11
E3
FBA_D13
F7
FBA_D8
F2
FBA_D15
F8
FBA_D10
H3
FBA_D14
H8
FBA_D9
G2
FBA_D12
H7
FBA_D17
D7
FBA_D22
C3
FBA_D16
C8
FBA_D23
C2
FBA_D19
A7
FBA_D21
A2
FBA_D18
B8
FBA_D20
A3
+1.35VGS
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
Group1
Group2
CMD mapping mod Mode E
Address
FBx_CMD0 ODT_L
FBx_CMD1
FBx_CMD2
FBx_CMD3
FBx_CMD4
FBx_CMD5
FBx_CMD6
FBx_CMD7
FBx_CMD8
FBx_CMD9
FBx_CMD10
FBx_CMD11
FBx_CMD12
FBx_CMD13
FBx_CMD14
FBx_CMD15
FBx_CMD16
FBx_CMD17
FBx_CMD18
FBx_CMD19
FBx_CMD20
FBx_CMD21
FBx_CMD22
FBx_CMD23
FBx_CMD24
FBx_CMD25
FBx_CMD26
FBx_CMD27
FBx_CMD28
FBx_CMD29
FBx_CMD30
CS0#_L
CKE_L
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#
RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0
Rank0
32..630..31
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#
ODT_H
CS0#_H
CKE_H
RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0
1
0..31 32..63
ODT_L
CS1#_L
CKE_L
A11
A7
BA1
A12
A8
A0
A2
RAS#
A14
A3
A13
CAS#
RST
A6
A5
A9
A1
WE#
A4
A10
BA0
BA2
FBA_D[0..63] 24,26,27,28
FBA_CMD[30..0] 24,26,27,28
FBA_DQM[7..0] 24,26,27,28
FBA_DQS[7..0] 24,26,27,28
FBA_DQS#[7..0] 24,26,27,28
Rank1
A11
A7
BA1
A12
A8
A0
A2
RAS#
A14
A3
A13
CAS#
ODT_H
CS1#_H
CKE_H
RST
A6
A5
A9
A1
WE#
A4
A10
BA0
BA2
C
B
+1.35VGS
UV6 SIDE
1
1
RANKA@
2
0.1u_0201_10V6K
CV117
A
5
RANKA@
RANKA@
1
2
2
1U_0402_6.3V6K
0.1u_0201_10V6K
CV119
CV118
CD@
RANKA@
RANKA@
1
2
1U_0402_6.3V6K
CV120
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CV122
CV121
4
For RF
+1.35VGS +1.35VGS
RF_NS@
1
2
33P_0402_50V8J
CV127
3
+1.35VGS
UV5 SIDE
CD@
1
RANKA@
2
0.1u_0201_10V6K
CV129
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
1
RANKA@
1
2
2
1U_0402_6.3V6K
0.1u_0201_10V6K
CV131
CV130
2015/08/20
2015/08/20
2015/08/20
1
RANKA@
1
RANKA@
2
1U_0402_6.3V6K
CV132
1
RANKA@
2
2
1U_0402_6.3V6K
CV133
CV134
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
Deciphered Date
Deciphered Date
Deciphered Date
1U_0402_6.3V6K
2016/08/20
2016/08/20
2016/08/20
2
For RF
RF_NS@
1
2
33P_0402_50V8J
CV139
Title
Title
Title
N16X_DDR3_Rank0_[31:0]
N16X_DDR3_Rank0_[31:0]
N16X_DDR3_Rank0_[31:0]
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet
Date: Sheet of
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
25 60
25 60
of
25 60
A
1.0
1.0
1.0
5
at least 16 mils width(optimal)
20 mils spacing to other signals /planes
+1.35VGS
D D
C
B
1
2
1 2
+1.35VGS
1 2
1 2
1
2
FBA_CKE_H
FBA_ODT_H
RANKA@
RV135
1.33K_0402_1%
RANKA@
RV136
1.33K_0402_1%
RANKA@
RV169
1.33K_0402_1%
RANKA@
RV170
1.33K_0402_1%
FBA_CLK1
RV137
162_0402_1%
RANKA@
FBA_CLK1#
RV138
10K_0402_5%
RANKA@
+FBA_VREFCA1
1
CV141
0.01U_0201_10V6K
RANKA@
2
+FBA_VREFDQ1
1
CV217
0.01U_0201_10V6K
RANKA@
2
1
10K_0402_5%
2
RV139
RANKA@
+FBA_VREFCA1 28
+FBA_VREFDQ1 28
1
2
FBA_CLK1 24,28
FBA_CLK1# 24,28
FBA_CKE_H 24,28
FBA_ODT_H 24,28
FBA_CS0#_H 24
FBA_RAS# 24,25,27,28
FBA_CAS# 24,25,27,28
FBA_RST# 24,25,27,28
RV140
243_0402_1%
RANKA@
1
2
4
+FBA_VREFCA1
+FBA_VREFDQ1
FBA_CMD7
FBA_CMD10
FBA_CMD24
FBA_CMD6
FBA_CMD22
FBA_CMD26
FBA_CMD5
FBA_CMD21
FBA_CMD8
FBA_CMD4
FBA_CMD25
FBA_CMD23
FBA_CMD9
FBA_CMD12
FBA_CMD14
FBA_CMD29
FBA_CMD13
FBA_CMD27
FBA_CLK1
FBA_CLK1#
FBA_CKE_H
FBA_ODT_H
FBA_CS0#_H
FBA_RAS#
FBA_CAS#
FBA_CMD28
FBA_DQS4
FBA_DQS7
FBA_DQM4
FBA_DQM7
FBA_DQS#4
FBA_DQS#7
FBA_RST#
UV8
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC1
L1
NC2
J9
NC3
L9
NC4
M7
NC5
96-BALL
SDRAM DDR3
K4W4G1646B-HC11_FBGA96
@
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
3
UV7
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC1
L1
NC2
J9
NC3
L9
NC4
M7
NC5
96-BALL
SDRAM DDR3
K4W4G1646B-HC11_FBGA96
@
RV141
243_0402_1%
RANKA@
+FBA_VREFCA1
+FBA_VREFDQ1
FBA_CMD7
FBA_CMD10
FBA_CMD24
FBA_CMD6
FBA_CMD22
FBA_CMD26
FBA_CMD5
FBA_CMD21
FBA_CMD8
FBA_CMD4
FBA_CMD25
FBA_CMD23
FBA_CMD9
FBA_CMD12
FBA_CMD14
FBA_CMD29
FBA_CMD13
FBA_CMD27
FBA_CLK1
FBA_CLK1#
FBA_CKE_H
FBA_ODT_H
FBA_CS0#_H
FBA_RAS#
FBA_CAS#
FBA_CMD28
FBA_DQS5
FBA_DQS6
FBA_DQM5
FBA_DQM6
FBA_DQS#5
FBA_DQS#6
FBA_RST#
1
2
FBA_D34
E3
FBA_D38
F7
FBA_D35
F2
FBA_D39
F8
FBA_D32
H3
H8
G2
H7
FBA_D59
D7
FBA_D62
C3
FBA_D58
C8
FBA_D63
C2
FBA_D57
A7
FBA_D60
A2
FBA_D56
B8
FBA_D61
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
FBA_D36
FBA_D33
FBA_D37
+1.35VGS
Group4
Group7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
2
FBA_D44
E3
FBA_D43
F7
FBA_D45
F2
FBA_D40
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
FBA_D47
FBA_D42
FBA_D46
FBA_D41
FBA_D52
FBA_D50
FBA_D55
FBA_D51
FBA_D53
FBA_D48
FBA_D54
FBA_D49
+1.35VGS
Group5
Group6
CMD mapping mod Mode E
Address
FBx_CMD0
FBx_CMD1
FBx_CMD2
FBx_CMD3
FBx_CMD4
FBx_CMD5
FBx_CMD6
FBx_CMD7
FBx_CMD8
FBx_CMD9
FBx_CMD10
FBx_CMD11
FBx_CMD12
FBx_CMD13
FBx_CMD14
FBx_CMD15
FBx_CMD16
FBx_CMD17
FBx_CMD18
FBx_CMD19
FBx_CMD20
FBx_CMD21
FBx_CMD22
FBx_CMD23
FBx_CMD24
FBx_CMD25
FBx_CMD26
FBx_CMD27
FBx_CMD28
FBx_CMD29
FBx_CMD30
0..31
ODT_L
CS0#_L
CKE_L
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#
RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0
Rank0
1
FBA_D[0..63] 24,25,27,28
FBA_CMD[30..0] 24,25,27,28
FBA_DQM[7..0] 24,25,27,28
FBA_DQS[7..0] 24,25,27,28
FBA_DQS#[7..0] 24,25,27,28
32..63
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#
ODT_H
CS0#_H
CKE_H
RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0
ODT_L
CS1#_L
CKE_L
A11
A7
BA1
A12
A8
A0
A2
RAS#
A14
A3
A13
CAS#
RST
A6
A5
A9
A1
WE#
A4
A10
BA0
BA2
Rank1
32..63 0..31
A11
A7
BA1
A12
A8
A0
A2
RAS#
A14
A3
A13
CAS#
ODT_H
CS1#_H
CKE_H
RST
A6
A5
A9
A1
WE#
A4
A10
BA0
BA2
C
B
+1.35VGS +1.35VGS +1.35VGS
For RF For RF
1
RANKA@
2
0.1u_0201_10V6K
CV142
A
5
CD@
1
RANKA@
1
1
RANKA@
2
2
2
1U_0402_6.3V6K
0.1u_0201_10V6K
CV143
1U_0402_6.3V6K
CV144
CV145
RANKA@
1
RANKA@
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CV147
CV146
4
RF_NS@
1
2
33P_0402_50V8J
CV152
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
1
RANKA@
2
CV154
UV7 SIDE UV8 SIDE
0.1u_0201_10V6K
2015/08/20
2015/08/20
2015/08/20
1
RANKA@
1
RANKA@
2
2
1U_0402_6.3V6K
0.1u_0201_10V6K
CV155
CV156
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
RANKA@
RANKA@
1
2
1U_0402_6.3V6K
CV158
CV157
Deciphered Date
Deciphered Date
Deciphered Date
CD@
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CV159
Title
Title
2016/08/20
2016/08/20
2016/08/20
2
Title
N16X_DDR3_Rank0_[64:32]
N16X_DDR3_Rank0_[64:32]
N16X_DDR3_Rank0_[64:32]
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet
+1.35VGS
RF_NS@
1
2
CV164
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
33P_0402_50V8J
CG413
CG413
CG413
1
26 60
26 60
26 60
of
A
1.0
1.0
1.0
5
D D
+FBA_VREFCA0 25
at least 16 mils width(optimal)
20 mils spacing to other signals /planes
C
B
+FBA_VREFDQ0 25
FBA_RST# 24,25,26,28
4
RV142
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M2
N8
M3
K7
K9
K1
L2
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
L1
L9
M7
UV9
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
BA0
BA1
BA2
J7
CK
CK
CKE
ODT
VDDQ_1
VDDQ_2
CS
J3
J1
J9
VDDQ_3
RAS
VDDQ_4
CAS
VDDQ_5
WE
VDDQ_6
VDDQ_7
DQSL
VDDQ_8
VDDQ_9
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC1
NC2
NC3
NC4
NC5
96-BALL
SDRAM DDR3
K4W4G1646B-HC11_FBGA96
@
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
FBA_D1
E3
FBA_D5
F7
FBA_D0
F2
FBA_D7
F8
FBA_D2
H3
FBA_D6
H8
FBA_D3
G2
FBA_D4
H7
FBA_D25
D7
FBA_D31
C3
FBA_D24
C8
FBA_D30
C2
FBA_D26
A7
FBA_D28
A2
FBA_D27
B8
FBA_D29
A3
+1.35VGS
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+FBA_VREFCA0
+FBA_VREFDQ0
FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD12
FBA_CMD29
FBA_CMD6
FBA_CMD30
FBA_RST#
1 2
RANKB@
FBA_CLK0
FBA_CLK0#
FBA_CKE_L
FBA_ODT_L
FBA_CS1#_L
FBA_RAS#
FBA_CAS#
FBA_CMD25
FBA_DQS0
FBA_DQS3
FBA_DQM0
FBA_DQM3
FBA_DQS#0
FBA_DQS#3
243_0402_1%
FBA_CLK0 24,25
FBA_CLK0# 24,25
FBA_CKE_L 24,25
FBA_ODT_L 24,25
FBA_CS1#_L 24
FBA_RAS# 24,25,26,28
FBA_CAS# 24,25,26,28
Group0
Group3
3
UV10
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC1
L1
NC2
J9
NC3
L9
NC4
M7
NC5
K4W4G1646B-HC11_FBGA96
@
RV143
243_0402_1%
RANKB@
+FBA_VREFCA0
+FBA_VREFDQ0
FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD12
FBA_CMD29
FBA_CMD6
FBA_CMD30
FBA_CLK0
FBA_CLK0#
FBA_CKE_L
FBA_ODT_L
FBA_CS1#_L
FBA_RAS#
FBA_CAS#
FBA_CMD25
FBA_RST#
1 2
FBA_DQS1
FBA_DQS2
FBA_DQM1
FBA_DQM2
FBA_DQS#1
FBA_DQS#2
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
2
FBA_D13
E3
FBA_D11
F7
FBA_D15
F2
FBA_D8
F8
FBA_D12
H3
FBA_D9
H8
FBA_D14
G2
FBA_D10
H7
FBA_D22
D7
FBA_D17
C3
FBA_D23
C8
FBA_D16
C2
FBA_D20
A7
FBA_D18
A2
FBA_D21
B8
FBA_D19
A3
+1.35VGS
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
Group1
Group2
CMD mapping mod Mode E
Address
FBx_CMD0
FBx_CMD1
FBx_CMD2
FBx_CMD3
FBx_CMD4
FBx_CMD5
FBx_CMD6
FBx_CMD7
FBx_CMD8
FBx_CMD9
FBx_CMD10
FBx_CMD11
FBx_CMD12
FBx_CMD13
FBx_CMD14
FBx_CMD15
FBx_CMD16
FBx_CMD17
FBx_CMD18
FBx_CMD19
FBx_CMD20
FBx_CMD21
FBx_CMD22
FBx_CMD23
FBx_CMD24
FBx_CMD25
FBx_CMD26
FBx_CMD27
FBx_CMD28
FBx_CMD29
FBx_CMD30
0..31
ODT_L
CS0#_L
CKE_L
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#
RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0
Rank0
32..63
1
FBA_D[0..63] 24,25,26,28
FBA_CMD[30..0] 24,25,26,28
FBA_DQM[7..0] 24,25,26,28
FBA_DQS[7..0] 24,25,26,28
FBA_DQS#[7..0] 24,25,26,28
0..31
ODT_L
CS1#_L
CKE_L
A9
A11
A6
A7
A3
BA1
A0
A12
A8
A8
A12
A0
A1
A2
RAS#
RAS#
A13
A14
BA1
A3
A14
A13
CAS#
CAS#
ODT_H
CS0#_H
CKE_H
RST
RST
A7
A6
A4
A5
A11
A9
A2
A1
A10
WE#
A5
A4
BA2
WE#
A10
BA0
BA0
BA2
Rank1
32..63
A11
A7
BA1
A12
A8
A0
A2
RAS#
A14
A3
A13
CAS#
ODT_H
CS1#_H
CKE_H
RST
A6
A5
A9
A1
WE#
A4
A10
BA0
BA2
C
B
+1.35VGS
+1.35VGS
For RF For RF
RANKB@
RANKB@
1
1
2
2
0.1u_0201_10V6K
0.1u_0201_10V6K
CV167
CV166
A
5
CD@
RANKB@
RANKB@
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CV169
CV168
RANKB@
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CV170
CV171
4
RF_NS@
1
2
33P_0402_50V8J
CV176
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
+1.35VGS
RANKB@
1
2
CV178
0.1u_0201_10V6K
UV3 SIDE UV4 SIDE
RANKB@
1
2
CV179
2015/08/20
2015/08/20
2015/08/20
RANKB@
1
2
1U_0402_6.3V6K
0.1u_0201_10V6K
CV180
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
CD@
CV181
1
2
RANKB@
1
2
1U_0402_6.3V6K
CV182
Deciphered Date
Deciphered Date
Deciphered Date
RANKB@
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CV183
Title
Title
2016/08/20
2016/08/20
2016/08/20
2
Title
Size
Size
Size
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
+1.35VGS
RF_NS@
1
2
33P_0402_50V8J
CV188
N16X_DDR3_Rank1_[31:0]
N16X_DDR3_Rank1_[31:0]
N16X_DDR3_Rank1_[31:0]
Document Number Rev
Document Number Rev
Document Number Rev
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
27 60
27 60
27 60
A
1.0
1.0
1.0
5
D D
at least 16 mils width(optimal)
20 mils spacing to other signals /planes
C
B
+FBA_VREFCA1 26
+FBA_VREFDQ1 26
243_0402_1%
FBA_CLK1 24,26
FBA_CLK1# 24,26
FBA_CKE_H 24,26
FBA_ODT_H 24,26
FBA_CS1#_H 24
FBA_RAS# 24,25,26,27
FBA_CAS# 24,25,26,27
RANKB@
FBA_RST# 24,25,26,27
RV144
4
UV11
M8
VREFCA
+FBA_VREFDQ1 +FBA_VREFDQ1
1
2
FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD12
FBA_CMD29
FBA_CMD6
FBA_CMD30
FBA_CLK1
FBA_CLK1#
FBA_CKE_H
FBA_ODT_H
FBA_CS1#_H
FBA_RAS#
FBA_CAS#
FBA_CMD25
FBA_DQS4
FBA_DQS7
FBA_DQM4
FBA_DQM7
FBA_DQS#4
FBA_DQS#7
FBA_RST#
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M2
N8
M3
J7
K7
K9
K1
L2
J3
K3
L3
F3
C7
E7
D3
G3
B7
T2
L8
J1
L1
J9
L9
M7
K4W4G1646B-HC11_FBGA96
@
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ
NC1
NC2
NC3
NC4
NC5
96-BALL
SDRAM DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
FBA_D38
E3
FBA_D34
F7
FBA_D39
F2
FBA_D35
F8
FBA_D37
H3
FBA_D33
H8
FBA_D36
G2
FBA_D32
H7
FBA_D62
D7
FBA_D59
C3
FBA_D63
C8
FBA_D58
C2
FBA_D61
A7
FBA_D56
A2
FBA_D60
B8
FBA_D57
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
Group7
+1.35VGS
3
243_0402_1%
RANKB@
RV145
+FBA_VREFCA1 +FBA_VREFCA1
1
2
FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD12
FBA_CMD29
FBA_CMD6
FBA_CMD30
FBA_CLK1
FBA_CLK1#
FBA_CKE_H
FBA_ODT_H
FBA_CS1#_H
FBA_RAS#
FBA_CAS#
FBA_CMD25
FBA_DQS5
FBA_DQS6
FBA_DQM5
FBA_DQM6
FBA_DQS#5
FBA_DQS#6
FBA_RST#
UV12
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC1
L1
NC2
J9
NC3
L9
NC4
M7
NC5
96-BALL
SDRAM DDR3
K4W4G1646B-HC11_FBGA96
@
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
Rank0
1
32..63
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#
ODT_H
CS0#_H
CKE_H
RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0
FBA_D[0..63] 24,25,26,27
FBA_CMD[30..0] 24,25,26,27
FBA_DQM[7..0] 24,25,26,27
FBA_DQS[7..0] 24,25,26,27
FBA_DQS#[7..0] 24,25,26,27
Rank1
32..63
0..31
ODT_L
CS1#_L
CKE_L
A11
A11
A7
A7
BA1
BA1
A12
A12
A8
A8
A0
A0
A2
A2
RAS#
RAS#
A14
A14
A3
A3
A13
A13
CAS#
CAS#
ODT_H
CS1#_H
CKE_H
RST
RST
A6
A6
A5
A5
A9
A9
A1
A1
WE#
WE#
A4
A4
A10
A10
BA0
BA0
BA2
BA2
2
FBA_D43
E3
FBA_D44
F7
FBA_D40
F2
FBA_D45
F8
FBA_D41
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
FBA_D46
FBA_D42
FBA_D47
FBA_D50
FBA_D52
FBA_D51
FBA_D55
FBA_D49
FBA_D54
FBA_D48
FBA_D53
+1.35VGS
Group5 Group4
Group6
CMD mapping mod Mode E
Address
FBx_CMD0
FBx_CMD1
FBx_CMD2
FBx_CMD3
FBx_CMD4
FBx_CMD5
FBx_CMD6
FBx_CMD7
FBx_CMD8
FBx_CMD9
FBx_CMD10
FBx_CMD11
FBx_CMD12
FBx_CMD13
FBx_CMD14
FBx_CMD15
FBx_CMD16
FBx_CMD17
FBx_CMD18
FBx_CMD19
FBx_CMD20
FBx_CMD21
FBx_CMD22
FBx_CMD23
FBx_CMD24
FBx_CMD25
FBx_CMD26
FBx_CMD27
FBx_CMD28
FBx_CMD29
FBx_CMD30
0..31
ODT_L
CS0#_L
CKE_L
A9
A6
A3
A0
A8
A12
A1
RAS#
A13
BA1
A14
CAS#
RST
A7
A4
A11
A2
A10
A5
BA2
WE#
BA0
C
B
2015/08/20
2015/08/20
2015/08/20
+1.35VGS
UV5 SIDE UV6 SIDE
1
RANKB@
RANKB@
1
2
2
0.1u_0201_10V6K
0.1u_0201_10V6K
CV203
CV202
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
Deciphered Date
Deciphered Date
Deciphered Date
RANKB@
1
2
1U_0402_6.3V6K
CV206
2016/08/20
2016/08/20
2016/08/20
CD@
CV207
1
2
1U_0402_6.3V6K
Title
Title
Title
N16X_DDR3_Rank1_[64:32]
N16X_DDR3_Rank1_[64:32]
N16X_DDR3_Rank1_[64:32]
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
RANKB@
RANKB@
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CV205
CV204
2
+1.35VGS
CD@
1
1
1
RANKB@
RANKB@
1
2
2
0.1u_0201_10V6K
0.1u_0201_10V6K
CV190
A
5
CV191
RANKB@
RANKB@
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CV193
CV192
4
RANKB@
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CV195
CV194
+1.35VGS
For RF For RF
RF_NS@
1
2
33P_0402_50V8J
CV200
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
CG413
CG413
CG413
1
+1.35VGS
RF_NS@
1
2
CV212
33P_0402_50V8J
28 60
28 60
28 60
A
1.0
1.0
1.0
5
4
3
2
1
Physical
Strapping pin
ROM_SCLK
ROM_SI
ROM_SO PCIE_CFG
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
Resistor Values
RV149
4.99K_0402_1%
@
RV154
4.99K_0402_1%
@
+3VG_AON
1 2
2
1
RV150
45.3K_0402_1%
@
RV155
45.3K_0402_1%
@
D D
RV156
4.99K_0402_1%
@
RV159
20K_0402_1%
@
2
RV147
4.99K_0402_1%
@
1
2
RV152
4.99K_0402_1%
@
1
2
RV157
4.99K_0402_1%
@
1
2
RV160
4.99K_0402_1%
OPT@
1
RV148
24.9K_0402_1%
@
1 2
RV153
15K_0402_1%
@
1 2
+3VGS
2
1
1 2
RV146
49.9K_0402_1%
OPT@
1 2
STRAP0 21
STRAP1 21
STRAP2 21
STRAP3 21
STRAP4 21
C
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
2
RV151
45.3K_0402_1%
@
1
2
X76
1
ROM_SI 21
ROM_SO 21
ROM_SCLK 21
ROM_SI
ROM_SO
ROM_SCLK
2
1
RV158
4.99K_0402_1%
@
RV161
4.99K_0402_1%
OPT@
2
1
2
1
4.99K
10K
15K
20K
24.9K
30.1K
34.8K
45.3K
Power Rail
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
Logical
Strapping Bit3
SOR3_EXPO SED
DEVID_SEL
Reserved(keep pull-up and pull-down footprint and stuff 50Kohm pull-up)
Reserved(keep pull-up and pull-down footprint and not stuff by default)
Pull-up to
+3VGS
1000
1001
1010
1011
110 0
110 1
1110
1111
Pull-down to Gnd
Logical
Strapping Bit2
SOR2_EXPO SED SOR1_E XPOSED SOR0_EXP OSED
Logical
Strapping Bit1
RAM_CFG[1 ] RAM_CFG[3 ] RAM_CF G[2]
DEVID_SEL
0000
0001
0010
0011
0100
0101
0110
0111
0
1
PCIE_CFG
0
1
SMBUS_ALT_ADDR
0
1
VGA_DEVICE
0
1
Logical
Strapping Bit0
RAM_CFG[0 ]
VGA_DEVICE SMB_ALT_ADDR
(Default)
(Default)
0x9E (Default)
0x9C (Multi-GPU usage)
3D Device (Class Code 302h)
VGA Device (Default)
C
B
GPU STRAP0
Configu ration
Single-Rank
N16S-GTR
N16V-GMR1
Dual-Rank
A
5
FB Memory (DDR3L)
K4W4G16 46E-BC1A
Samsung
256M x 16
900MHz
H5TC4G6 3CFR-N0 C 0x 2
Hynix
256M x 16
900MHz
MT41J25 6M16LY-0 91G:N
Micron
256M x 16
900MHz
K4W4G16 46E-BC1A
Samsung
256M x 16
900MHz
H5TC4G6 3CFR-N0 C
Hynix
256M x 16
900MHz
MT41J25 6M16LY-0 91G:N
Micron
256M x 16
900MHz
ROM_SI
0x1
PD 10K
PD 15K
0x6
PD 34.8K
0xF
PU 45.3K
0xE
PU 34.8K
0xA
PU 15K
ROM_SO STRAP4 STRAP3 STRAP2 STRAP1 ROM_SCLK
PD 4.99K Un-stuffPD 4.99K PU 49.9K
4
Samsung
Hynix
Un-stuff Un-stuff Un-stuff
Micron
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
Deciphered Date
Deciphered Date
Deciphered Date
2
X76 P/N VRAM P/N VRAM
X7610212201
X7610212001
X7610212202
X7610212101
X7610212203
N/A
2016/08/20
2016/08/20
2016/08/20
VRAM Q'ty
4
SA000063F20
8
4
SA00007DU10
8
4
SA00007QJ00
8
Title
Title
Title
N16X_MISC
N16X_MISC
N16X_MISC
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
29 60
29 60
29 60
of
B
A
1.0
1.0
1.0
5
USB20_N5 9
USB20_P5 9
D D
USB20_N5
USB20_P5
FOR EMI
LW1
1
1
4
4
EXC24CH900U_4P
EMC_NS@
USB20_N5_R
2
2
USB20_P5_R
3
3
4
+3VS
CW2
4.7U_0402_6.3V6M
USB20_N5
USB20_P5
3
UW1
1
RW2 6.2K_0402_1%
RW9 0_0402_5%@
RW10 0_0402_5%@
1
1
CW3
0.1u_0201_10V6K
2
2
2
1
2
1
2
1U_0402_6.3V6K
CW4
1
2
RREF
USB20_N5_R
USB20_P5_R
CARD_3V3
SDREG
SD_WP
SD_D1_R
SD_D0_R
1
RREF
2
DM
3
DP
4
3V3_IN
5
CARD_3V3
6
SDREG
7
XD_CD#
8
SP1
9
SP2
10
SP3
11
SP4
12
SP5
25
GND
RTS5170-GRT_QFN24_4X4
XD_D7
SP14
SP13
SP12
SP11
SP10
GPIO0
V18
SP9
SP8
SP7
SP6
24
23
22
21
20
19
18
17
16
15
14
13
VDD18
SD_D2_R
SD_D3_R
SD_CMD_R
SD_CLK_R
SD_CD#
2
1
2
CW1 1U_0402_6.3V6K
1
C
B
A
SD_D0_R
SD_D1_R
SD_D2_R
SD_D3_R
SD_CMD_R
SD_CLK_R
RW3 0_0402_5%@
RW4 0_0402_5%@
RW5 0_0402_5%@
RW6 0_0402_5%@
RW7 0_0402_5%
RW8 0_0402_5%
5
1
1 2
1
1
1
@
1 2
2
2
2
2
1
2
CW5 5.6P_0402_50V8-D
EMC@
1
2
CW6 5.6P_0402_50V8-D
EMC@
1
2
CW7 5.6P_0402_50V8-D
EMC@
1
2
CW8 5.6P_0402_50V8-D
EMC@
1
2
CW11 5.6P_0402_50V8-D
EMC@
1 2
CW12 5.6P_0402_50V8-D
EMC@
SD_D0
SD / MMC
SD_D1
SD_D2
SD_D3
SD_CMD
SD_CLK
4
Close to Connector
CARD_3V3
1
DW1
1
2
EMC_NS@
2
AZ5123-01F.R7GR_DFN1006P2X2
FOR ESD
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS TH E PROPRIETARY PRO PERTY OF LC F UTURE CENTE R. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS TH E PROPRIETARY PRO PERTY OF LC F UTURE CENTE R. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS TH E PROPRIETARY PRO PERTY OF LC F UTURE CENTE R. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET M AY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET M AY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET M AY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2015/08/20
2015/08/20
2015/08/20
3
CARD_3V3
1
CW9
2
4.7U_0402_6.3V6M
1
CW17
2
0.1u_0201_10V6K
Close to Connector
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2016/08/20
2016/08/20
2016/08/20
2
SD_D0
SD_D1
SD_D2
SD_D3
SD_CD#
SD_WP
SD_CMD
SD_CLK
JREAD1
4
VDD
7
DAT0
8
DAT1
9
DAT2
1
CD/DAT3
11
C/D
10
W/P
2
CMD
5
CLK
3
VSS1
6
VSS2
DEREN_404232501111RHF_NR
ME@
Title
Title
Title
Cardreader
Cardreader
Cardreader
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
12
GND_1
13
GND_2
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
30 60
30 60
of
of
30 60
1
C
B
A
1.0
1.0
1.0
5
+5VS
R271 0_0603_5%@
1 2
R273
100K_0402_5%
@
+3VS
TR1@
1 2
R301
3D@
1
U15
5
IN
4
ENB
SY6288D20AAC_SOT23-5
USB_EQ1_A
USB_DE0_A
USB_EQ0_A
USB_DE1_A
USB30_TX_P3_C
USB30_TX_N3_C
USB30_RX_P3_U
USB30_RX_N3_U
USB_PD#
1
REXT
TEST
1
C1111
1U_0402_10V6K
3D@
2
CMOS_ON# 33
D D
+3VS
3D@
3D@
1
1
2
2
0.1u_0201_10V6K
0.1u_0201_10V6K
C1121
C1120
USB30_TX_P3 9
USB30_TX_N3 9
C
USB30_TX_P3
USB30_TX_N3
USB30_RX_P3_U_R
USB30_RX_N3_U_R
C1118 0.1u_0201_10V6K
3D@
1 2
C1119 0.1u_0201_10V6K3D@
1 2
R321 0_0201_5%3D@
1 2
R322 0_0201_5%3D@ 12
4.99K_0402_1%
4
+5VS_CMOS_R
2
B_EQ1_I2C_ADDR1
B_DE0_I2C_ADDR0
B_EQ0_NC
B_DE1_NC
A_OUTp
A_OUTn
B_OUTp
B_OUTn
GND1
GND2
GPAD
3D@
+5VS_CMOS
3D@
C1112
4
3
2
6
12
11
22
23
10
21
25
1
2
4.7U_0603_10V6-K
USB_EQ1_B
USB_DE0_B
USB_EQ0_B
USB_DE1_B
USB30_TX_P3_U
USB30_TX_N3_U
USB30_RX_P3_C
USB30_RX_N3_C
3D@
1
OUT
2
GND
3
OCB
2.285W, 0.457A
R282 0_0603_5%3D@
1 2
UR1
1
VDD1
13
VDD2
15
A_EQ1_SDA_CTL
16
A_DE0_SCL_CTL
17
A_EQ0_NC
18
A_DE1_NC
19
A_INp
20
A_INn
9
B_INp
8
B_INn
5
PD#
7
REXT
14
TEST
24
I2C_EN
PS8713BTQFN24GTR2A_TQFN24_4X4
1
1
RF@
RF_NS@
2
2
2200P_0402_50V7K
C1114
C1113
For RF
R299 0_0201_5%
R300 0_0201_5%
3D@
3
33P_0402_50V8J
3D@12
3D@
1 2
C1122 0.1u_0201_10V6K3D@
1
2
2
1
C1123 0.1u_0201_10V6K
USB_EQ1_A
USB_EQ0_A
USB_DE1_A
USB_DE0_A
TEST
USB_EQ1_B
USB_EQ0_B
USB_DE1_B
USB_DE0_B
USB30_TX_P3_U_R
USB30_TX_N3_U_R
USB30_RX_P3
USB30_RX_N3
2
R308 4.7K_0201_5%
@
1
2
R309 4.7K_0201_5%@
1 2
R303 4.7K_0201_5%@ 12
R302 4.7K_0201_5%@
1
2
R310 4.7K_0201_5%@ 12
R304 4.7K_0201_5%@
1
2
R305 4.7K_0201_5%@
1 2
2
1
@
R307 4.7K_0201_5%
R306 4.7K_0201_5%
@12
USB30_RX_P3 9
USB30_RX_N3 9
Equalizer control and program for channel A
+3VS
3.3V tolerant. Internally pulled down at ~150K
[A_EQ1, A_EQ0] ==
LL: program EQ for channel loss up to 9.5dB(default)
LH: program EQ for channel loss up to 13dB
HL: program EQ for channel loss up to 4.5dB
HH: program EQ for channel loss up to 7.5dB
Programmable output de-emphasis level setting for channel A
+3VS
3.3V tolerant. Internally pulled down at ~150K
[A_DE1, A_DE0] ==
LL: 3.5dB de-emphasis (default)
LH: No de-emphasis
HL: 2.7dB de-emphasis
HH: 5dB de-emphasis
LFPS swing adjust.
+3VS
3.3V tolerant. Internally pulled down at ~150Kā¦
TEST==
L: Normal LFPS swing(default)
H:Turn down LFPS swing
Equalizer control and program for channel B
+3VS
3.3V tolerant. Internally pulled down at ~150K
[B_EQ1, B_EQ0] ==
LL: program EQ for channel loss up to 9.5dB(default)
LH: program EQ for channel loss up to 13dB
HL: program EQ for channel loss up to 4.5dB
HH: program EQ for channel loss up to 7.5dB
Programmable output de-emphasis level setting for channel B
+3VS
3.3V tolerant. Internally pulled down at ~150K
[B_DE1, B_DE0] ==
LL: 3.5dB de-emphasis (default)
LH: No de-emphasis
HL: 2.7dB de-emphasis
HH: 5dB de-emphasis
1
C
USB30_TX_P3
R312 0_0201_5%@
USB30_TX_N3
USB30_RX_P3
USB30_RX_N3
USB30_TX_P3_U_R
USB30_TX_N3_U_R
+5VS_CMOS
B
3D@
1
2
0.1u_0201_10V6K
C1124
A
3D_FR
1
EMC_NS@
2
C1125
1
R319
100K_0402_5%
@
2
0.1u_0201_10V6K
USB30_RX_P3_U_R
USB30_RX_N3_U_R
USB30_TX_C_P3
USB30_TX_C_N3
USB30_RX_P3_U_R
USB30_RX_N3_U_R
1
R314 0_0201_5%@
1
R315 0_0201_5%
@
1 2
1 2
R317 0_0201_5%@
C1115 0.1u_0201_10V6K3D@
C1116 0.1u_0201_10V6K3D@
L18
1
1
4
4
EXC24CH900U_4P
L19
EMC_NS@
112
4
4
EXC24CH900U_4P
2
2
1 2
1 2
USB30_TX_P3_R
R311 0_0201_5%@
USB30_TX_C_P3
USB30_TX_C_N3
DMIC_CLK 33,43
DMIC_DATA 33,43
1 2
R313 0_0201_5%@
1 2
R316 0_0201_5%@
1
R318 0_0201_5%@
1
R274 0_0402_5%@
R275 0_0402_5%@
R276 0_0402_5%3D@
R277 0_0402_5%
R320 0_0402_5%3D@
USB30_TX_N3_R
USB30_RX_P3_R
USB30_RX_N3_R
3D@
USB30_TX_R_P3
2
2
USB30_TX_R_N3
3
3
USB30_RX_R_P3
2
USB30_RX_R_N3
3
3
2
2
1 2
1 2
1 2
1 2
3D@
1 2
3D_FR 8
USB30_TX_P3_U_R
USB30_TX_N3_U_R
USB30_RX_P3_U_R
USB30_RX_N3_U_R
+3VS
3D_FR
USB30_TX_R_P3
USB30_TX_R_N3
USB30_RX_R_P3
USB30_RX_R_N3
DMIC_DATA_3D
3D Camera Connector
+5VS_CMOS
J3D
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
21
19
GND1
19
22
20
GND2
20
I-PEX_20374-020E-31
ME@
08/29: Double confirm if can
change to 18pin
B
A
Title
Title
Security Cl assificati on
Security Cl assificati on
Security Cl assification
Issued Date
Issued Date
Issued Date
THIS SHE ET OF E NGINEERING DRAW ING IS THE PROPRI ETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF E NGINEERING DRAW ING IS THE PROPRI ETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF E NGINEERING DRAW ING IS THE PROPRI ETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TR ADE SECR ET INFORM ATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TR ADE SECR ET INFORM ATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TR ADE SECR ET INFORM ATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2016/08/20
2016/08/20
2016/08/20
2
Title
3D Camera
3D Camera
3D Camera
Size
Document Number Re v
Size
Document Number Re v
Size
Document Number Re v
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
31 60
31 60
31 60
1
1.0
1.0
1.0
of
of
5
4
3
2
1
+3VS
D D
1
2
1
TPM@
2
RTPM1 0_0603_5%
CTPM4
0.1u_0201_10V6K
TPM@
1
CTPM1
10U_0603_6.3V6M
2
TPM@
+3VS_TPM
1A
1
CTPM3
0.1u_0201_10V6K
TPM@
2
TPM
TPM@
+3VS_TPM
Reserve for Nationz TPM
2
2
2
2
2
1 2
RTPM13
0_0402_5%
Reserve for Nuvoton TPM
1 2
RTPM4
0_0402_5%
TPM@
SERIRQ 7,44
LPC_AD0 7,44
LPC_AD1 7,44
LPC_FRAME# 7,44
LPC_AD2 7,44
LPC_AD3 7,44
CLK_PCI_TPM 7
@
+3VS_TPM
PM_CLKRUN# 7
UTPM1
1
NC_1
2
C
RTPM12
1
TPM@
0_0402_5%
2
Reserve for Nationz TPM
+3VALW
RTPM11
1 2
TPM@
0_0603_5%
Add for Nuvoton TPM
B
NC_2
3
NC_3
7
PP
6
NC_4
9
NC_7
4
GND_1
11
GND_2
18
GND_3
5
NC_5
8
NC_6
12
NC_8
13
NC_9
14
NC_10
Z32H320TC-LPC-T28-LT1_TSSOP28
TPM@
VDD3
VDD1
LPCPD#
SERIRQ
LAD0
LAD1
LFRAME#
LAD2
LAD3
GND_4
LCLK
VDD2
CLK_RUN#
LRESET#
24
10
28
SERIRQ_TPM
27
LPC_AD0_TPM
26
LPC_AD1_TPM
23
LPC_FRAME#_TPM
22
LPC_AD2_TPM
20
LPC_AD3_TPM
17
25
21
19
TPM_CLKRUN#
15
16
1
RTPM2 4.7K_0402_5%TPM@
RTPM5 0_0402_5%TPM@
RTPM6 0_0402_5%
RTPM7 0_0402_5%TPM@
RTPM8 0_0402_5%TPM@
RTPM9 0_0402_5%TPM@
RTPM10 0_0402_5%TPM@
PLT_RST# 11,20,37,40,44
2
1
1
1
1
1 2
1
Nationz TPM Nuvoton TPM
RTPM2
RTPM12
Stuff
Stuff
NC
NC
C
B
RTPM11 NC
A
Security Classifica tion
Security Classifica tion
Security Classifica tion
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y O F LC F UTU RE CE NT ER. AND C ONTAI NS CO NFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y O F LC F UTU RE CE NT ER. AND C ONTAI NS CO NFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y O F LC F UTU RE CE NT ER. AND C ONTAI NS CO NFIDENTIAL
AND T RADE S ECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND T RADE S ECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND T RADE S ECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSEN T OF LC FUTURE C ENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSEN T OF LC FUTURE C ENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSEN T OF LC FUTURE C ENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Stuff
Title
Title
Title
TPM
TPM
TPM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
32 60
32 60
1
32 60
A
1.0
1.0
1.0
5
4
3
2
1
LCD POWER CIRCUIT
+3VS
U5
5
1
C1
D D
0.1u_0201_10V6K
PCH_ENVDD
2
IN
4
EN
SY6288C20AAC_SOT23-5
GND
OCB
OUT
1
2
3
R263
1
@
0_0805_5%
U5 EN PIN VIH MIN 1.5V
R1
+3VS
R10
4.7K_0402_5%
@
1 2
1
R16
100K_0402_5%
2
+3VS
2
R18
1K_0402_5%
@
1
1
R20
100K_0402_5%
2
1
2
DISPOFF#
ENBKL
INVT_PWM
PCH_ENVDD
ENBKL 44
PCH_CMOS_ON# 8 CMOS_ON# 31
EC_CMOS_ON# 44
V20B+
2A 80 m il
PCH_ENVDD 4
100K_0402_5%
PCH_ENBKL
R11
BKOFF# 44
PCH_ENBKL 4
C
PCH_EDP_PWM 4
B
R12 0_0402_5%@
R14 0_0402_5%@
R19 0_0402_5%@
1
0_0402_5%
1
1
1
2
@
2
2
2
2
R17 0_0805_5%@
+LCDVDD_CON +LCDVDD
C121
1 2
R296 0_0402_5%3D@
R297 0_0402_5%@
1
1 2
W=60mils
1
2
4.7U_0402_6.3V6M
W=40 mils
@
RF_NS@
1
1
2
2
C122
2
0.1u_0201_10V6K
For RF
+LEDVDD
C123
33P_0402_50V8J
CMOS_ON#
CMOS_ON#
0.01U_0201_25V6-K
EMC_NS@
For EMI
Close to R5
EDP_AUX
EDP_AUX#
C9
+3VS
2A 80 m il
1
1
CD@
EMC@
2
2
C15
C14
0.1U_0201_25V6-K
4.7U_0805_25V6-K
EMI Request
EMC_NS@
680P_0402_50V7K
CPU_EDP_TX0+ 4
CPU_EDP_TX0- 4
CPU_EDP_TX1+ 4
CPU_EDP_TX1- 4
CPU_EDP_AUX 4
CPU_EDP_AUX# 4
+3VS
1
R21
0_0402_5%
1
C22
2
1
2
2
R8
100K_0402_1%
@
1
2
R13
100K_0402_1%
@
1
2
@
0.1u_0201_10V6K
R5
@
1
2
100K_0402_5%
2
R9
100K_0402_1%
@
1
2
R15
100K_0402_1%
@
1
CPU_EDP_TX0+
CPU_EDP_TX1+ EDP_TX1+
CPU_EDP_TX1-
CPU_EDP_AUX EDP_AUX
CPU_EDP_AUX#
CPU_EDP_HPD 4
W=60mils
DMIC_DATA 31,43
DMIC_CLK 31,43
USB20_P4 9
USB20_N4 9
To uc h Sc r ee n
+5VS_TS +5VS
1 2
R26 0_0402_5%@
0.1u_0201_10V6K
A
USB20_P6
USB20_N6
L15
1
1
4
4
EXC24CH900U_4P
EMC_NS@
2
3
For EMI
5
2
3
1
C25
TS@
2
USB20_P6_CONN
USB20_N6_CONN
EC_TS_ON 44
USB20_N6 9
USB20_P6 9
+5VS_TS
2
1
R28 0_0402_5%@
@
R23 0_0402_5%
1
2
2
1
R24 0_0402_5%@
USB20_P6_CONN
USB20_N6_CONN
1
D2
1
2
AZ5725-01F.R7GR_DFN1006P2X2
2
EMC_NS@
For EMI
4
3
TS_RS
USB20_N6_CONN
USB20_P6_CONN
2
1
D1
AZC199-02S.R7G_SOT23-3
EMC_NS@
JTS1
1
1
2
2
3
3
4
4
5
5
6
6
CVILU_CI1806M2HR0-NH
ME@
GND1
GND2
7
8
Touc h Scre en
Security Classification
Security Classificati on
Security Classificati on
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSE NT OF LC FUTURE C ENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSE NT OF LC FUTURE C ENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSE NT OF LC FUTURE C ENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Dat e
Deciphered Dat e
CMOS Camera
Need short
+3VS +3VS_CMOS_R
C5
@
+LCDVDD_CON
2
J1
@
2
112
JUMP_43X39
LP2301ALT1G_SOT23-3
D
S
3
1
Q7 @
1
2
1
C10
0.1u_0201_10V6K
@
2
C19 0.1u_0201_10V6K
C16 0.1u_0201_10V6K
C17 0.1u_0201_10V6K
C18 0.1u_0201_10V6K
C20 0.1u_0201_10V6K
C21 0.1u_0201_10V6K
G
2
DMIC_CLK
1
EMC@
2
C11
+LEDVDD
1
2
2
1
1 2
1
2
2
1
1 2
+3VS
1
1
EMC_NS@
2
2
@
1
C24
2
R182 0_0402_5%@
R183 0_0402_5%
+3VS_CMOS
.047U_0201_6.3V6K
100P_0201_25V8J
EDP_TX0+
EDP_TX0- CPU_EDP_TX0-
EDP_TX1-
EDP_AUX#
DISPOFF#
INVT_PWM
USB20_P4_R
USB20_N4_R
W=40mils
EMI request
L12
USB20_N4
USB20_P4 USB20_P4_R
2016/08/20
2016/08/20
2016/08/20
EMC_NS@
1
1
4
4
EXC24CH900U_4P
Titl e
Titl e
Titl e
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
+3VS_CMOS
R3
@
1 2
@
1
2
C6
0.01U_0201_10V6K
0_0603_5%
1
C3
0.1u_0201_10V6K
CD@
2
EMI request
DISPOFF#
1
2
EMC_NS@
C12
470P_0201_50V7-K
JEDP1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
G1
32
G2
DRAPH_FC5AF301-3181H
ME@
For EMI
USB20_N4_R
2
2
3
3
eDP/CMOS/Touch screen
eDP/CMOS/Touch screen
eDP/CMOS/Touch screen
CG413
CG413
CG413
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
W=40mils
1
C4
10U_0603_6.3V6M
@
2
INVT_PWM
1
1
2
EMC_NS@
C13
470P_0201_50V7-K
33 60
of
33 60
33 60
of
1.0
1.0
1.0
C
B
A
5
4
3
2
1
L2
HDMI_CLK-_C
HDMI_CLK+_C HDMI_CLK+_CON
D D
HDMI_TX0-_C
HDMI_TX0+_C
HDMI_TX1-_C
HDMI_TX1+_C
HDMI_TX2-_C
HDMI_TX2+_C
1
1
4
4
EXC24CH900U_4P
L3
1
1
4
4
EXC24CH900U_4P
L4
1
1
4
4
EXC24CH900U_4P
L5
1
1
4
4
EXC24CH900U_4P
EMC@
EMC@
EMC@
EMC@
HDMI_CLK-_CON
2
2
3
3
HDMI_TX0-_CON
2
2
HDMI_TX0+_CON
3
3
HDMI_TX1-_CON
2
2
HDMI_TX1+_CON
3
3
HDMI_TX2-_CON
2
2
HDMI_TX2+_CON
3
3
EMC_NS@
2
1
C26 3.3P_0402_50V8-C
EMC_NS@
1 2
C27 3.3P_0402_50V8-C
EMC_NS@
1
2
C28 3.3P_0402_50V8-C
EMC_NS@
1 2
C29 3.3P_0402_50V8-C
EMC_NS@
1
2
C30 3.3P_0402_50V8-C
EMC_NS@
1
2
C31 3.3P_0402_50V8-C
EMC_NS@
2
1
C32 3.3P_0402_50V8-C
EMC_NS@
1
2
C33 3.3P_0402_50V8-C
+3VS
G
5
Q1B
S
DDPB_CLK 4
Q1A
DDPB_DATA 4
S
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6
2
G
6 1
D
4
3
D
HDMICLK_R
HDMIDAT_R
HDMI_DET
HDMIDAT_R
HDMICLK_R
+5VS_HDMI
D3
1
1
2
2
4
4
5
5
3
3
8
AZ1045-04F_DFN2510P10E-10-9
EMC_NS@
9
10
8
9
7
7
6
6
HDMI_DET
HDMIDAT_R
HDMICLK_R
+5VS_HDMI
For EMC
For EMC
C
B
HDMI_CLK-_C
HDMI_CLK+_C
HDMI_TX0-_C
HDMI_TX0+_C
HDMI_TX1-_C
HDMI_TX1+_C
HDMI_TX2-_C
HDMI_TX2+_C
1 2
R29 470_0402_5%
1
1
1 2
1 2
1
1
1
+3VS
2
2
2
2
2
1 2
R42
100K_0402_5%
R30 470_0402_5%
R31 470_0402_5%
R32 470_0402_5%
R33 470_0402_5%
R34 470_0402_5%
R37 470_0402_5%
R38 470_0402_5%
SUSP 46
+5VS
HDMI_CLK-_C
HDMI_CLK+_C
HDMI_TX0-_C
HDMI_TX0+_C
HDMI_TX1-_C
HDMI_TX1+_C
HDMI_TX2-_C
HDMI_TX2+_C
+3VS
2
R35
1M_0402_5%
1
D
2
G
@
Q13
2N7002KW_SOT323-3
S
3
HDMI_HPD 4
HDMI_CLK- 4
HDMI_CLK+ 4
HDMI_TX0- 4
HDMI_TX0+ 4
HDMI_TX1- 4
HDMI_TX1+ 4
HDMI_TX2- 4
HDMI_TX2+ 4
G
2
1
S
2N7002KW_SOT323-3
Q12
1 3
D
HDMI_CLK-
HDMI_CLK+
HDMI_TX0-
HDMI_TX0+
HDMI_TX1-
HDMI_TX1+
HDMI_TX2-
HDMI_TX2+
+5VS
3
D4
BAT54S-7-F_SOT23-3
1
D4
2
R41
20K_0402_5%
1
2
1
C35 0.1u_0201_10V6K
1 2
C36 0.1u_0201_10V6K
1 2
C37 0.1u_0201_10V6K
1 2
C38 0.1u_0201_10V6K
2
1
C39 0.1u_0201_10V6K
1
2
C40 0.1u_0201_10V6K
2
1
C41 0.1u_0201_10V6K
1
2
C42 0.1u_0201_10V6K
2
@
HDMI_DET
D5
2
3
RB491D_SOT23-3
LP2301ALT1G_SOT23-3
1
D
2
R43 0_0402_5%@
2
R44 0_0402_5%@
2
R45 0_0402_5%@
2
R46 0_0402_5%@
2
R47 0_0402_5%
R48 0_0402_5%@
R49 0_0402_5%@
2
R50 0_0402_5%@
+5VS_HDMI_F
1
@
3
S
Q22
G
2
HDMIDAT_R
HDMICLK_R
1
1
1
1
1
@
1 2
1 2
1
F1
1
0.5A_6V_1206L050YRHF
R39
2.2K_0402_5%
HDMI_CLK-_CON
HDMI_CLK+_CON
HDMI_TX0-_CON
HDMI_TX0+_CON
HDMI_TX1-_CON
HDMI_TX1+_CON
HDMI_TX2-_CON
HDMI_TX2+_CON
2
1
2
+5VS_HDMI
2
R40
2.2K_0402_5%
1
1
C34
0.1u_0201_10V6K
2
JHDMI1
19
HP_DET
18
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
11
10
GND1
CK_shield
GND2
CK+
GND3
9
D0-
GND4
8
D0_shield
7
D0+
6
D1-
5
D1_shield
4
D1+
3
D2-
2
D2_shield
1
D2+
SINGA_2HE3Y37-000111F
ME@
20
21
22
23
C
B
Close to JHDMI1
HDMI_CLK+_CON
HDMI_CLK-_CON
A
HDMI_TX0-_CON
D6
1
1
2
2
4
4
5
5
3
3
8
AZ1045-04F_DFN2510P10E-10-9
EMC_NS@
5
9
10
8
9
7
7
6
6
HDMI_CLK+_CON
HDMI_CLK-_CON
HDMI_TX0+_CON HDMI_TX0+_CON
HDMI_TX0-_CON
For EMC
HDMI_TX1-_CON
HDMI_TX1+_CON
HDMI_TX2-_CON
HDMI_TX2+_CON
D7
1
1
2
2
4
4
5
5
3
3
8
AZ1045-04F_DFN2510P10E-10-9
EMC_NS@
4
9
10
8
9
7
7
6
6
HDMI_TX1-_CON
HDMI_TX1+_CON
HDMI_TX2-_CON
HDMI_TX2+_CON
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
Title
Title
HDMI_CONN
HDMI_CONN
HDMI_CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
34 60
34 60
1
34 60
A
1.0
1.0
1.0
5
4
3
2
1
+3VS
1
RVG1
@
0_0603_5%
D D
C
DP_GP11
DP_GP12
B
RVG8
4.7K_0402_5%
RVG10
4.7K_0402_5%
10U_0603_6.3V6M
@
@
+DP_3V3
1
2
1
RVG2 0_0402_5%@
1 2
RVG4 0_0402_5%@
VGA_AUX 4
VGA_AUX# 4
VGA_TX0+ 4
VGA_TX0- 4
VGA_TX1+ 4
VGA_TX1- 4
2
CVG1
@
+DP_3V3
1
1 2
RVG9
4.7K_0402_5%
@
2
1
1 2
RVG11
4.7K_0402_5%
@
2
+AVCC33
2
+VDD_DAC_33
1
CVG4 0.1u_0201_10V6K
1
CVG5 0.1u_0201_10V6K
1 2
CVG6 0.1u_0201_10V6K
1
CVG8 0.1u_0201_10V6K
1
CVG9 0.1u_0201_10V6K
1 2
CVG10 0.1u_0201_10V6K
1
CVG11 0.1u_0201_10V6K
1
RVG6 4.7K_0402_5%
+DP_3V3
1
RVG7 4.7K_0402_5%
+CRT_VCC_CON
+5VS_HV
1
06/21 P/N fro m SA00007QZ00 change to SA00007QZ10
For FW Update
+AVCC33
2
2
2
2
2
2
2
TVG3@
+DP_3V3
CRT_DDC_CLK 36
CRT_DDC_DAT 36
1
AUXP
AUXN
+VCCK_12
DRX0P
DRX0N
DRX1P
DRX1N
POL2
POL1
DP_GP11
DP_GP12
DP_GP13
CRT_DDC_CLK
CRT_DDC_DAT
UVG1
1
AVCC_33
2
AUX_P
3
AUX_N
4
AVCC_12
5
LANE0_P
6
LANE0_N
7
LANE1_P
8
LANE1_N
9
POL2
10
POL1/SPI_CEB
11
GPI1/SPI_CLK
12
GPI2/SPI_SI
13
GPI3/SPI_SO
14
VCC_33
15
VGA_SCL
16
VGA_SDA
RTD2166-CG_QFN32_4X4
HVSYNC_PWR
VSYNC
HSYNC
VDD_DAC_33
BLUE_P
GREEN_P
RED_P
GND
VCCK_12
PVCC_33
LDO_RSTB
EXT_CLK_IN
SMB_SDA
SMB_SCL
EXT1.2V_CTRL
HPD
EPAD
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
VGA_VS
VGA_HS
+VDD_DAC_33
CRT_B
CRT_G
CRT_R
+VCCK_12
+DP_3V3
DP_LDO_RST#
DP_EXT_CLKIN
DP_SMB_SDA
DP_SMB_SCL
DP_EXT1.2V_EN
DP_VGA_HPD
1
2
2
CVG3
CVG2
0.1u_0201_10V6K
4.7U_0603_10V6-K
VGA_VS 36
VGA_HS 36
1 2
CVG7 0.1u_0201_10V6K
CRT_B 36
CRT_G 36
CRT_R 36
1
CVG12 0.1u_0201_10V6K
RVG20 4.7K_0402_5%@
1
1
1
1
2
1 2
TVG2 @
TVG4 @
TVG5 @
TVG6 @
DP_VGA_HPD 4
+DP_3V3
+5VS +5VS_HV
1 2
RVG3
0_0603_5%
1
RVG5 0_0603_5%@
1
1
2
1 2
RVG13
75_0402_1%
CVG14
2.2U_0402_6.3V6M
2
CVG13
0.1u_0201_10V6K
1 2
RVG12
75_0402_1%
@
1
RVG14
75_0402_1%
2
2
CRT_R
CRT_G
CRT_B
C
B
CLOSE TO UVG1
A
Title
Title
Security Classifica tion
Security Classifica tion
Security Classifica tion
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y O F LC F UTU RE CE NT ER. AND C ONTAI NS CO NFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y O F LC F UTU RE CE NT ER. AND C ONTAI NS CO NFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y O F LC F UTU RE CE NT ER. AND C ONTAI NS CO NFIDENTIAL
AND T RADE S ECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND T RADE S ECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND T RADE S ECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSEN T OF LC FUTURE C ENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSEN T OF LC FUTURE C ENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSEN T OF LC FUTURE C ENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
P35-DP to VGA (RTD2166)
P35-DP to VGA (RTD2166)
P35-DP to VGA (RTD2166)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
of
35 60
of
of
35 60
1
35 60
A
1.0
1.0
1.0
5
D D
C
CRT_DDC_DAT 35
CRT_DDC_CLK 35
CRT_R 35
CRT_G 35
CRT_B 35
CRT_DDC_DAT
CRT_DDC_CLK
1
2
@
RVG16 0_0402_5%
1 2
RVG17 0_0402_5%@
1
CVG18
2
EMC@
2.2P_0402_50V8-C
4
CRT_DDC_DAT_R
CRT_DDC_CLK_R
100P_0201_25V8J
1
CVG19
2
EMC@
2.2P_0402_50V8-C
CVG16
1
CVG20
2
EMC@
@
LVG1
LVG2
LVG3
2.2P_0402_50V8-C
+CRT_VCC_CON
1 4
2
RPVG1
2.2K_0404_4P2R_5%
3
1
1
CVG17
68P_0201_50V8-J
@
2
2
0229: Need update symbols in SIT phase
2
1
BLM18BB220SN1D_2P
1
BLM18BB220SN1D_2P
1 2
BLM18BB220SN1D_2P
EMC@
2
EMC@
EMC@
1
1
CVG21
CVG22
2
2
EMC@
EMC@
2.2P_0402_50V8-C
2.2P_0402_50V8-C
3
2
1
CRT Connector
FVG1
+CRT_VCC_CON
2 1
@
1
2
JCRT1
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
SUYIN_070546HR015M25KZR
ME@
@
1 2
RVG15 0_0603_5%
+CRT_VCC_CON
CVG15
0.1u_0201_10V6K
CD@
16
G
17
G
+5VS
2
@
3
DVG1
1
RB491D_SOT23-3
+CRT_VCC
0.5A_6V_1206L050YRHF
W=40mils
CRT_R_CON
CRT_DDC_DAT_R
CRT_G_CON
HSYNC_CON
CRT_B_CON
1
CVG23
2
EMC@
2.2P_0402_50V8-C
VSYNC_CON
CRT_DDC_CLK_R
CVG24
100P_0201_25V8J
1
@
2
+5VS_HDMI
1
DVG2
1
AZ5725-01F.R7GR_DFN1006P2X2
EMC_NS@
2
2
For EMC
0714: SVT For VGA 20m cable test issue change to 100ohm
C
B
CRT_B_CON
CRT_G_CON CRT_G_CON
CRT_R_CON
A
DVG3
1
1
2
2
4
4
5
5
3
3
8
AZ1045-04F_DFN2510P10E-10-9
EMC_NS@
5
10
9
7
6
CRT_B_CON
9
8
CRT_R_CON
7
6
For EMC
VGA_HS 35
VGA_VS 35
VSYNC_CON
HSYNC_CON
CRT_DDC_CLK_R
CRT_DDC_DAT_R
VGA_HS
VGA_VS
DVG4
1
1
2
2
4
4
5
5
3
3
8
AZ1045-04F_DFN2510P10E-10-9
EMC_NS@
4
9
10
8
9
7
7
6
6
1
RVG18 100_0402_5%
RVG19 100_0402_5%
VSYNC_CON
HSYNC_CON
CRT_DDC_CLK_R
CRT_DDC_DAT_R
2
1
2
HSYNC_CON
1
CVG25
2.2P_0402_50V8-C
@
2
VSYNC_CON
1
CVG26
2.2P_0402_50V8-C
@
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
Title
Title
CRT_CONN
CRT_CONN
CRT_CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
36 60
36 60
36 60
of
1
of
B
A
1.0
1.0
1.0
5
4
3
2
1
+3VALW TO +3VALW_LAN
+3VALW_LAN rising t i me ( 10 %~90 %):
+3VALW
D D
LAN_PWR_ON# 44
PCIE_WAKE# 11,40,44
C
LAN_WAKE# 40,44
+3VS
1
2
ISOLATE#
1 2
RL9
1K_0402_1%
RL11
15K_0402_5%
@
RL2
100K_0402_5%
RL10
+3VALW
@
1
0_0402_5%
1
2
@
RL3
LAN_PWR_ON#
2
1
@
47K_0402_5%
2
1 2
RL7 0_0402_5%@
1
RL6 0_0402_5%@
0.1u_0201_10V6K
CL8
1
2
@
2
Need short
JL1
112
JUMP_43X79
LP2301ALT1G_SOT23-3
S
3
Q14
G
2
+3VALW_LAN
RL5
10K_0402_5%
@
1 2
2
@
D
1
@
PCIE_WAKE#_R
PLT_RST# 11,20,32,40,44
PCIE_PRX_DTX_N5 9
PCIE_PRX_DTX_P5 9
+3VALW_LAN
CL9
@
0.5ms
CL4
1
1
2
@
2
4.7U_0402_6.3V6M
0.01U_0201_10V6K
Close to Pin11 Close to Pin32
RL8
@
1 2
RL12
0_0402_5%
1
CL10 0.1u_0201_10V6K
1
CL11 0.1u_0201_10V6K
CL10 c lose to Pin18
CL11 c lose to Pin17
10 0m s
spec
ļ¼
ļ¼
+3VALW_LAN
width : 40 mils
CL5
1
2
@
1 2
2.49K_0402_1%
TL3 @
TL4 @
2
2
CL6
4.7U_0402_6.3V6M
CL7
1
2
1
2
0.1u_0201_10V6K
0.1u_0201_10V6K
Close to Pin11 Close to Pin32
manual change the Codec PN to RTL8111GUL-CG
+3VALW_LAN
RSET
+LAN_VDD10
LAN_XTALO
LAN_XTALI
1
LAN_DISABLE# LAN_PWR_ON#
1
+LAN_REGOUT
+LAN_VDDREG
+LAN_VDD10
PCIE_WAKE#_R
ISOLATE#
PLT_RST#
PCIE_PRX_C_DTX_N5
PCIE_PRX_C_DTX_P5
UL1
33
GND
32
AVDD33_2
31
RSET
30
AVDD10
29
CKXTAL2
28
CKXTAL1
27
LED0
26
LED1/GPIO
25
LED2
24
REGOUT
23
VDDREG
22
DVDD10
21
LANWAKEB
20
ISOLATEB
19
PERSTB
18
HSON
17
HSOP
RTL8111GUL-CG QFN 32P
8111GUL@
REFCLK_N
REFCLK_P
HSIN
HSIP
CLKREQB
AVDD33_1
MDIN3
MDIP3
AVDD10_2
MDIN2
MDIP2
MDIN1
MDIP1
AVDD10_1
MDIN0
MDIP0
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
RL1
1
0_0603_5%
CLK_PCIE_LAN#
CLK_PCIE_LAN
PCIE_PTX_C_DRX_N5
PCIE_PTX_C_DRX_P5
LAN_CLKREQ#_R
+3VALW_LAN
LAN_MDI3-
LAN_MDI3+
+LAN_VDD10
LAN_MDI2-
LAN_MDI2+
LAN_MDI1-
LAN_MDI1+
+LAN_VDD10
LAN_MDI0-
LAN_MDI0+
@
2
+LAN_VDDREG
1
CL1
4.7U_0402_6.3V6M
2
LAN_CLKREQ#_R
CLK_PCIE_LAN# 10
CLK_PCIE_LAN 10
PCIE_PTX_C_DRX_N5 9
PCIE_PTX_C_DRX_P5 9
LAN_MDI3- 38
LAN_MDI3+ 38
LAN_MDI2- 38
LAN_MDI2+ 38
LAN_MDI1- 38
LAN_MDI1+ 38
LAN_MDI0- 38
LAN_MDI0+ 38
1
CL2
0.1u_0201_10V6K
2
+3VALW_LAN
@
RL4
10K_0402_5%
2
1
2N7002KW_SOT323-3
RL18 0_0402_5%@
+3VS
QL1
1
D
1 2
2
G
3
@
S
LAN_CLKREQ# 10
C
B
LAN_XTALO_R
YL1
1
OSC1
GND12OSC2
1
CL12
12P_0402_50V8-J
A
25MHZ_10PF_7V25000014
2
5
GND2
4
3
1
CL13
15P_0402_50V8J
2
1
RL21 1K_0402_5%
2
4
LAN_XTALI
LAN_XTALO
+LAN_REGOUT
For RTL8111GUL(SWR mode, reserved)
For RTL8111H (LDO mode)
2
1
LL1
2.2UH_NLC252018T-2R2J-N_5%
1
RL20
Layout Note: LL1 must be
within 200mil to Pin24,
CL15,CL16 must be within
200mil to LL1
+LAN_REGOUT: Width =60mil
8111GUL@
2
8111H@
0_0805_5%
4.7U_0402_6.3V6M
Security Classifica tion
Security Classifica tion
Security Classifica tion
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y O F LC F UTU RE CE NT ER. AND C ONTAI NS CO NFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y O F LC F UTU RE CE NT ER. AND C ONTAI NS CO NFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y O F LC F UTU RE CE NT ER. AND C ONTAI NS CO NFIDENTIAL
AND T RADE S ECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND T RADE S ECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND T RADE S ECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSEN T OF LC FUTURE C ENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSEN T OF LC FUTURE C ENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSEN T OF LC FUTURE C ENTER.
1
CL15
3
1
2
2
CL16
0.1u_0201_10V6K
2015/08/20
2015/08/20
2015/08/20
+LAN_VDD10
1
CL17
0.1u_0201_10V6K
2
1
CL18
0.1u_0201_10V6K
2
Close to Pin3, 8, 22, 30
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
1
CL19
0.1u_0201_10V6K
2
1
CL20
0.1u_0201_10V6K
2
1
CL21
1U_0402_6.3V6K
2
1
CL22
0.1u_0201_10V6K
2
Close to Pin22(Reserved)
Title
Title
Title
LAN_RTL8111H_CG
LAN_RTL8111H_CG
LAN_RTL8111H_CG
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
37 60
of
37 60
of
1
37 60
B
A
1.0
1.0
1.0
5
DL1/DL2
1'S PN:SC300003M00
4
3
2
1
TL1
24
D D
LAN_MDI2+
LAN_MDI2-
LAN_MDI3+
LAN_MDI3-
C
LAN_MDI1-
LAN_MDI1+
LAN_MDI0-
LAN_MDI0+
DL1
1
2
3
4
11
12
1
2
3
4
11
12
LINE1OUT
LINE1IN
LINE2OUT
LINE2IN
GND1
LINE3IN
LINE4IN5LINE4OUT
GND3
GND4
AZ3133-08F.R7G_DFN3020P10E10
EMC_NS@
DL2
LINE1IN
LINE2IN
GND1
LINE3IN
LINE4IN5LINE4OUT
GND3
GND4
AZ3133-08F.R7G_DFN3020P10E10
EMC_NS@
GND2
LINE3OUT
GND5
LINE1OUT
LINE2OUT
GND2
LINE3OUT
GND5
10
9
8
7
6
13
10
9
8
7
6
13
LAN_MDI2+
LAN_MDI2-
LAN_MDI3+
LAN_MDI3-
LAN_MDI1-
LAN_MDI1+
LAN_MDI0-
LAN_MDI0+
1
CL24
0.01U_0201_25V6-K
EMC@
2
EMC
LAN_MDI0+ 37
LAN_MDI0- 37
LAN_MDI1+ 37
LAN_MDI1- 37
LAN_MDI2+ 37
LAN_MDI2- 37
LAN_MDI3+ 37
LAN_MDI3- 37
LAN_MDI0+
LAN_MDI0-
LAN_MDI1+
LAN_MDI1-
LAN_MDI2+
LAN_MDI2-
LAN_MDI3+
LAN_MDI3-
MCT1
23
MX1+
22
MX1-
21
MCT2
20
MX2+
19
MX2-
18
MCT3
17
MX3+
16
MX3-
15
MCT4
14
MX4+
13
MX4-
BOTH_GST5009 LF
Place Close to TL1
EMC
B
@
2
1
RL14 0_0603_5%
1
RL15 0_0603_5%
1
RL16 0_0603_5%
@
2
@
2
EMC
CHASSIS1_GND
TCT1
TD1+
TD1-
TCT2
TD2+
TD2-
TCT3
TD3+
TD3-
TCT4
TD4+
TD4-
1
2
3
4
5
6
7
8
9
10
11
12
MCT
LAN_MDO0+
LAN_MDO0-
MCT
LAN_MDO1+
LAN_MDO1-
MCT
LAN_MDO2+
LAN_MDO2-
MCT
LAN_MDO3+
LAN_MDO3-
0.022U_0603_50V7K
LAN_MDO0+
LAN_MDO0-
LAN_MDO1+
LAN_MDO2+
LAN_MDO2-
LAN_MDO1-
LAN_MDO3+
LAN_MDO3-
1
CL32
EMC@
2
CHASSIS1_GND
JRJ1
1
PR1+
2
PR1-
3
PR2+
4
PR3+
5
PR3-
6
PR2-
7
PR4+
8
PR4-
SANTA_130460-3
1
2
EMC@
RL17
20_0603_5%
1
CL25
1000P_1206_2KV7-K
EMC@
2
EMC
ME@
GND_4
GND_3
GND_2
GND_1
1
1
2
2
12
11
10
9
CHASSIS1_GND
DL3
PDT5061_DO-214AA
EMC@
EMC
C
B
A
Title
Title
Security Classification
Security Classification
Security Classification
Issue d D ate
Issue d D ate
Issue d D ate
THIS SH EET OF EN GINEERING DRAWING IS THE PROPR IETARY PROP ERTY OF LC FU TURE CEN TER. AND CON TAINS CONF IDENTIAL
THIS SH EET OF EN GINEERING DRAWING IS THE PROPR IETARY PROP ERTY OF LC FU TURE CEN TER. AND CON TAINS CONF IDENTIAL
THIS SH EET OF EN GINEERING DRAWING IS THE PROPR IETARY PROP ERTY OF LC FU TURE CEN TER. AND CON TAINS CONF IDENTIAL
AND TRAD E SECRE T INFORMATION. TH IS SHEET MAY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECRE T INFORMATION. TH IS SHEET MAY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECRE T INFORMATION. TH IS SHEET MAY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSED TO AN Y THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR D ISCLOSED TO AN Y THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR D ISCLOSED TO AN Y THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
5
4
2015/08/20
2015/08/20
2015/08/20
3
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2016/08/20
2016/08/20
2016/08/20
2
Title
LAN_Transformer
LAN_Transformer
LAN_Transformer
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
B
B
B
Thursday, July 14, 2016
Thursday, July 14, 2016
Date: Sheet of
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
CG413
CG413
CG413
1
38 60
38 60
38 60
of
of
A
1.0
1.0
1.0
5
Close to U1
2200P_0201_25V7-K
D D
C44
@
REMOTE+_R
1
2
REMOTE-_R
REMOTE+_R
REMOTE-_R
REMOTE+/-_R, REMOTE1+/-, REMOTE2+/-:
Trace width/space:10/10 mil
Trace length:<8"
SMSC thermal sensor
placed near DIMM
+3VS
1
C47
0.1u_0201_10V6K
@
2
+3VS
R51
REMOTE+_R
REMOTE-_R
2
@
10K_0402_5%
1
U1
1
VDD
2
D+
3
D-
4
T_CRIT#
NCT7718W_MSOP8
Address 1001_101xb
C
SCL
SDA
ALERT#
GND
@
8
7
6
5
4
1
R175 0_0402_5%@
1
R176 0_0402_5%@
1 2
R177 0_0402_5%@
1
R178 0_0402_5%@
EC_SMB_CK2
EC_SMB_DA2
2
2
2
REMOTE1+
REMOTE2+
REMOTE2-
REMOTE1-
EC_SMB_CK2 7,20,44
EC_SMB_DA2 7,20,44
3
REMOTE1+
100P_0201_25V8J
REMOTE1-
C45
@
NTC_V1
2
1
Near GPU&VRAM
1
C
2
Q15
B
2
MMBT3904WH_SOT323-3
E
@
3
+3VALW
1 2
R36
13.7K_0402_1%
1
R287
100K_0402_1%_NCP15WF104F03RC
OPT@
2
2
R184
0_0402_5%
OPT@
1
EC_AGND
2
R185
0_0402_5%
@
1
REMOTE2+
100P_0201_25V8J
REMOTE2-
NTC_V2
1
1
C46
@
C
2
Q16
B
2
MMBT3904WH_SOT323-3
E
@
3
+3VALW
1
R25
13.7K_0402_1%
2
1
R288
100K_0402_1%_NCP15WF104F03RC
2
1
Near CPU core
Near CPU
for layout optimized, change the EC_AGND to GND
C
+5VLP
1
C7
0.1u_0201_10V6K
@
2
B
A
5
HW thermal sensor
21.5K_0402_1%
U4
@
TMSNS1
RHYST1
TMSNS2
RHYST2
8
TMSNS1
7
PHYST1
6
TMSNS2
5
PHYST2
1
2
@
R6 10K_0402_5%
1 2
@
R7 10K_0402_5%
4
1
VCC
2
GND
3
OT1
4
OT2
G718TM1U_SOT23-8
over temperature threshold:
RSET=3*RTMH
92+/-30C
Hysteresis temperature threshold.
RHYST=(RSET*RTML)/(3*RTML-RSET)
56+/-30C
+5VLP +5VLP
2
R252
@
1
2
R253
21.5K_0402_1%
@
1
1
R196 0_0402_5%@
R197 0_0402_5%@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS TH E PROPRIETARY PRO PERTY OF LC F UTURE CENTE R. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS TH E PROPRIETARY PRO PERTY OF LC F UTURE CENTE R. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS TH E PROPRIETARY PRO PERTY OF LC F UTURE CENTE R. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET M AY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET M AY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET M AY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2
1
2
NTC_V1
NTC_V2
2015/08/20
2015/08/20
2015/08/20
3
NTC_V1 44
NTC_V2 44 EC_ON 44,54,55
+5VS
R52 0_0603_5%
1
C49
10U_0805_10V6K
2
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
1
2
@
2016/08/20
2016/08/20
2016/08/20
2
B
FAN Conn
@
1
2
C50
EC_FAN_SPEED 44
EC_FAN_ANTI 44
EC_FAN_PWM 44
0.1u_0201_10V6K
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
+5VS_FAN
Thermal sensor/FAN CONN
Thermal sensor/FAN CONN
Thermal sensor/FAN CONN
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
JFAN1
1
2
3
4
5
6
7
ACES_50273-0050N-001
ME@
CG413
CG413
CG413
1
2
3
4
5
GND1
GND2
1
39 60
39 60
39 60
of
of
A
1.0
1.0
1.0
A
B
Mini-Express Card(WLAN/WiMAX)
C
D
E
R258
49.9K_0402_1%
2
2
+3VS
1 2
1 2
R259
49.9K_0402_1%
UART_RX_DEBUG 8
UART_TX_DEBUG 8
EC_RX 44
SUSCLK 10
PLT_RST# 11,20,32,37,44
PCH_BT_OFF# 8
PCH_WLAN_OFF# 8
SMB_DATA_S3 7,18
SMB_CLK_S3 7,18
EC_TX 44
+3VS_WLAN
+3VS
Need short
1 1
2
J2
112
JUMP_43X79
+3VS_WLAN
@
2
1
C53
0.1u_0201_10V6K
@
2
1
WLAN_CLKREQ# 10
PCIE_WAKE# 11,37,44
LAN_WAKE# 37,44
R61 0_0402_5%@
1
R262 0_0402_5%
1
R57 0_0402_5%@
USB20_P7 9
USB20_N7 9
PCIE_PTX_C_DRX_P6 9
PCIE_PTX_C_DRX_N6 9
PCIE_PRX_DTX_P6 9
PCIE_PRX_DTX_N6 9
CLK_PCIE_WLAN 10
CLK_PCIE_WLAN# 10
2
2
@
2
WLAN_CLKREQ_Q#
PCIE_WAKE#_WLAN
JWLAN1
1
GND1
3
USB_D+
5
USB_D-
7
GND2
9
SDIO_CLK
11
SDIO_CMD
13
SDIO_DAT0
15
SDIO_DAT1
17
SDIO_DAT2
19
SDIO_DAT3
21
SDIO_WAKE
23
SDIO_RESET
KEY E
PIN24~PIN31 NC PIN
25
27
29
31
33
GND3
35
PETP0
37
PETN0
39
GND4
41
PERP0
43
PERN0
45
GND5
47
REFCLKP0
49
REFCLKN0
51
GND6
53
CLKEQ0#
55
PEWAKE0#
57
GND7
59
RSRVD/PETP1
61
RSRVD/PETN1
63
GND8
65
RSRVD/PERP1
67
RERVD/PERN1
69
GND9
71
RSRVD1
73
RSRVD2
75
GND10
77
GND15
LCN_DAN05-67406-0102
ME@
3.3VAUX1
3.3VAUX2
LED#1
PCM_CLK
PCM_SYNC
PCM_IN
PCM_OUT
LED#2
GND11
UART_WAKE
UART_RX
UART_TX
UART_CTS
UART_RTS
RSRVD10
RSRVD11
RSRVD9
COEX3
COEX2
COEX1
SUSCLK
PERSTO#
RSRVD/W_DISABLE#2
W_DISABLE#1
I2C_DATA
I2C_CLK
ALERT
RSRVD6
RSRVD7
RSRVD8
RSRVD12
3.3VAUX3
3.3VAUX4
GND14
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
1
T2@
1
T3
@
UART_RX_DEBUG_R
UART_TX_DEBUG_R
EC_TX_RSVD
EC_RX_RSVD
SUSCLK_R
PLT_RST#
BT_OFF#
WLAN_OFF#
WLAN_SMB_DATA
WLAN_SMB_CLK
EC_TX_R
+3VS_WLAN
1
R256 0_0402_5%
@
1
R257 0_0402_5%@
2
1
R62 0_0402_5%@
1
1 2
1 2
1 2
1
1 2
1
1 2
2
2
2
R63 0_0402_5%@
R88 0_0402_5%@
R55 0_0402_5%@
R53 1K_0402_5%
R56 0_0402_5%@
R58 0_0402_5%@
R59 0_0402_5%@
R89 0_0402_5%@
1 2
R186
100K_0402_5%
2
3
4
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC F UTURE CENTE R. AND CONTAIN S CONFIDENTIA L
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC F UTURE CENTE R. AND CONTAIN S CONFIDENTIA L
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC F UTURE CENTE R. AND CONTAIN S CONFIDENTIA L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS A UTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS A UTHORIZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE US ED BY OR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE US ED BY OR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
A
B
MAY BE US ED BY OR DISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2015/08/20
2015/08/20
2015/08/20
C
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Dat e
Deciphered Dat e
Deciphered Dat e
2016/08/20
2016/08/20
2016/08/20
D
Title
NGFF WLAN
NGFF WLAN
NGFF WLAN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
E
40 60
40 60
of
40 60
of
3
4
1.0
1.0
1.0
A
1 1
+5VALW +USB_VCCA
1
C128
1U_0402_6.3V6K
2
LEFT SIDE USB3.0 PORT x1
U2
5
IN
USB_ON# 44,45
4
ENB
SY6288D20AAC_SOT23-5
Low Active 2A
OUT
GND
OCB
1
2
3
USB_OC1#
1
C140
1000P_0201_50V7-K
EMC_NS@
2
B
USB_OC1# 9
C
USB30_TX_P1 9
USB30_TX_N1 9
USB20_P1 9
USB20_N1 9
USB30_RX_P1 9
USB30_RX_N1 9
USB30_TX_P1
USB30_TX_N1 USB30_TX_C_N1
USB20_N1
USB30_RX_P1
USB30_RX_N1
1
2
C126 0.1u_0201_10V6K
1
2
C124 0.1u_0201_10V6K
USB30_TX_C_P1
D
1 2
R95 0_0402_5%
@
2
1
R96 0_0402_5%@
1 2
R97 0_0402_5%@
1
2
@
R93 0_0402_5%
1 2
R94 0_0402_5%@
1 2
R98 0_0402_5%@
USB30_TX_R_P1
USB30_TX_R_N1
USB20_P1_R USB20_P1
USB20_N1_R
USB30_RX_R_P1
USB30_RX_R_N1
+USB_VCCA
+
1
2
C55
220U_6.3V_M
1
2
C1117
47U_0805_6.3V6-M@
1
2
C125
1U_0402_10V6K@
1
2
C127
1U_0402_10V6K@
JUSB1
9
StdA_SSTX+
1
VBUS
8
StdA_SSTX-
3
D+
7
GND_DRAIN
2
D-
6
StdA_SSRX+
4
GND_5
5
StdA_SSRX-
SUYIN_020053GR009M2736L
GND_1
GND_2
GND_3
GND_4
ME@
E
10
11
12
13
2
L13
USB30_RX_P1
USB30_RX_N1
USB30_TX_C_P1
USB30_TX_C_N1
USB20_P1
3
USB20_N1
1
1
4
4
EXC24CH900U_4P
L16
1
1
4
4
EXC24CH900U_4P
L8
1
1
4
4
EXC24CH900U_4P
EMC@
EMC@
EMC@
2
3
2
3
2
3
2
3
2
3
2
3
USB30_RX_R_P1
USB30_RX_R_N1
USB30_TX_R_P1
USB30_TX_R_N1
USB20_P1_R
USB20_N1_R
+USB_VCCA
1
1
2
EMC_NS@
2
AZ5725-01F.R7GR_DFN1006P2X2
D12
EMC_NS@
USB30_RX_R_N1
D11
USB30_RX_R_P1
USB30_TX_R_N1
USB30_TX_R_P1
9
10
8
9
7
7
6
6
AZ1045-04F_DFN2510P10E-10-9
USB30_RX_R_N1
1
1
USB30_RX_R_P1
2
2
USB30_TX_R_N1
4
4
USB30_TX_R_P1
5
5
3
3
8
USB20_P1_R
USB20_N1_R
3
2
D13
AZC199-02S.R7G_SOT23-3
EMC_NS@
1
2
3
EMC EMC
4
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
A
B
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
2016/08/20
2016/08/20
2016/08/20
Title
USB3.0 PORT (LEFT)
USB3.0 PORT (LEFT)
USB3.0 PORT (LEFT)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
41 60
of
41 60
of
E
41 60
4
1.0
1.0
1.0
A
B
C
D
E
F
G
H
SATA HDD Conn.
JHDD1
10
SATA_PTX_DRX_P0 9
1
2
SATA_PTX_DRX_N0 9
SATA_PRX_DTX_N0 9
SATA_PRX_DTX_P0 9
+5VS_HDD
1
2
C74
33P_0201_50V8-J
@
SATA_PTX_DRX_P0
SATA_PTX_DRX_N0
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
1
C76
33P_0201_50V8-J
@
2
1
2
C66 0.01U_0201_10V6K
1
2
C67 0.01U_0201_10V6K
1
2
C68 0.01U_0201_10V6K
1
2
C69 0.01U_0201_10V6K
+5VS
1
C75
0.1u_0201_10V6K
2
Need short
J3
JUMP_43X79
1
C77
10U_0805_10V6K
2
112
SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0
SATA_PRX_C_DTX_N0
SATA_PRX_C_DTX_P0
+5VS_HDD
2
@
1
C78
10U_0805_10V6K
@
2
10
9
9
8
8
7
GND2
7
6
6
5
5
4
4
3
GND1
3
2
2
1
1
ELCO_006809610010846
ME@
12
11
SATA_PTX_DRX_P1 9
SATA_PTX_DRX_N1 9
SATA_PRX_DTX_N1 9
SATA_PRX_DTX_P1 9
SATA_PTX_DRX_N1
SATA_PRX_DTX_N1
SATA_PRX_DTX_P1
1
2
C70 0.01U_0201_10V6K14@
2
1
C71 0.01U_0201_10V6K14@
1
2
C72 0.01U_0201_10V6K14@
1
2
C73 0.01U_0201_10V6K14@
SATA_PTX_C_DRX_P1_14 SATA_PTX_DRX_P1
SATA_PTX_C_DRX_N1_14
SATA_PRX_C_DTX_N1_14
SATA_PRX_C_DTX_P1_14
+5V_ODD
For EMC
SATA_PTX_DRX_P1
SATA_PTX_DRX_N1
SATA_PRX_DTX_N1
SATA_PRX_DTX_P1
2
1
C79 0.01U_0201_10V6K15@
1
2
C80 0.01U_0201_10V6K15@
1
2
C81 0.01U_0201_10V6K15@
1 2
C82 0.01U_0201_10V6K15@
SATA_PTX_C_DRX_P1_15
SATA_PTX_C_DRX_N1_15
SATA_PRX_C_DTX_N1_15
SATA_PRX_C_DTX_P1_15
+5V_ODD
FOR 14"
SATA ODD Conn.
JODD1
1
GND_1
2
RX+
3
RX-
4
GND_2
5
TX-
6
TX+
7
GND_3
8
DP
9
+5V_1
10
+5V_2
11
MD
12
GND_4
13
GND_5
SUYIN_127382FB013S255ZL
ME@
GND1
GND2
14
15
FOR 15"
SATA ODD FFC Conn
JODD2
1
1
2
2
3
3
4
4
5
5
6
6
7
8
9
7
GND1
10
8
GND2
HIGHS_FC1AF081-1151H
ME@
1
2
3
4 4
A
+5VS
B
Need Short
J4
@
2
112
JUMP_43X79
C
1
2
C85
1
2
10U_0805_10V6K
C86
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS TH E PROPRIETARY PRO PERTY OF LC F UTURE CENTE R. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS TH E PROPRIETARY PRO PERTY OF LC F UTURE CENTE R. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS TH E PROPRIETARY PRO PERTY OF LC F UTURE CENTE R. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET M AY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET M AY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET M AY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
D
0.1u_0201_10V6K
CD@
Issued Date
Issued Date
Issued Date
+5V_ODD
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
E
F
2016/08/20
2016/08/20
2016/08/20
Title
Title
Title
HDD/ODD CONN
HDD/ODD CONN
HDD/ODD CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet of
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
G
CG413
CG413
CG413
of
42 60
42 60
42 60
H
1.0
1.0
1.0
3
5
+3VS
+5VS
D D
DA1
CD@
CA15
1
2
PLUG_IN
1
2
4.7U_0603_10V6-K
CA16
2
3
BAT54CW_SOT323-3
RA17
RA36
2
1
0.1u_0201_10V6K
4.7U_0603_10V6-K
CA18
PC_BEEP1
1
5.11K_0402_1%
1
39.2K_0402_1%
1
20K_0402_1%
+5VD
CD@
2
1
0.1u_0201_10V6K
CA19
RA15
2
2
BEEP# 44
PCH_BEEP 8
C
2
1
RA2 0_0603_5%@
1
2
RA7 0_0603_5%@
2
1
@
RA10 0_0603_5%
0.1u_0201_10V6K
1 2
CA2
1
RA14
10K_0402_5%
2
+3.3VD
2
1
JSENSE
HDA_RST_AUDIO# 8
HDA_BITCLK_AUDIO 8
HDA_SYNC_AUDIO 8
HDA_SDOUT_AUDIO 8
+3.3VD
+5VA
+5VD
PC_BEEP
change the Codec PN to CX11802-33Z,, symbol check ok
HDA_SDIN0 8
DMIC_CLK 31,33
DMIC_DATA 31,33
Close to Pin11,13,16
1
@
B
HDA_RST_AUDIO#
EC_MUTE# 44
A
EC_MUTE#
1
1
EMC_NS@
EMC_NS@
2
2
CA37
CA38
100P_0201_25V8J
100P_0201_25V8J
RA24
0_0402_5%
RB751V-40_SOD323-2
1
DA3
RB751V-40_SOD323-2
1 2
DA4
1 2
RA35
0_0402_5%
DMIC_CLK
DMIC_DATA
@
For EMI
5
+3.3VD
2
1
RA28
47K_0402_5%
2
@
@
2
@
SPKR_MUTE#
1
EMC@
2
68P_0402_50V8J
CA22
1
1
EMC_NS@
EMC_NS@
2
2
22P_0201_25V8
CA24
CA23
4
+3VALW_PCH
+3VS
HDA_RST_AUDIO#
HDA_BITCLK_AUDIO
HDA_SYNC_AUDIO
HDA_SDOUT_AUDIO
1
RA18 33_0402_5%
1 2
0_0402_5% @
RA19
1
CA14 1U_0402_6.3V6K
1
CA17 2.2U_0402_6.3V6M
1
EMC@
RA27
27_0402_5%
1
1
EMC_NS@
EMC@
2
2
22P_0201_25V8
33P_0201_50V8-J
CA25
CA26
4
1
RA44 0_0402_5%@
RA11 0_0402_5%@
1
RA16 33_0402_5%
PC_BEEP
SPKR_MUTE#
JSENSE
DMIC_CLK_R
2
DMIC_DATA_R
0.1u_0201_10V6K
+5VD
CA13
2
2
GND
Use 250mils wide trace bridging
AGND and DGND at codec
HDA_RST_AUDIO#
HDA_SYNC_AUDIO
HDA_SDOUT_AUDIO
HDA_BITCLK_AUDIO
2
HDA_SDIN0
33P_0201_50V8-J
2
1
2
UA1
9
RESET#
5
BIT_CLK
8
SDATA_IN
2
1
RA1 0_0402_5%@
RA4 0_0402_5%
RA6 0_0402_5%
RA9 0_0402_5%
RA12 0_0402_5%@
RA13 0_0402_5%
SYNC
6
SDATA_IN
4
SDATA_OUT
10
PC_BEEP
39
SPKR_MUTE#
38
JSENSE
37
GPIO1/PORTC_R_MIC
36
MUSIC_REQ/GPIO0/PORTC_L_MIC
40
DMIC_CLK/MUSIC_REQ/GPIO0
1
DMIC_DAT/GPIO1
2
11
CLASS-D_REF
13
LPWR_5.0
16
RPWR_5.0
19
FLY_P
20
FLY_N
21
AVEE
41
GND
CX11802-33Z QFN LOW POWER CODEC
1
2
1 2
EMC@
2
1
@
2
1
EMC@
1 2
1
2
@
For EMI
DVDD_IO
CA1
2
1
0.1u_0201_10V6K
Close to Pin7
CX20751-11Z
PORTB_R_LINE
PORTB_L_LINE
PORTD_A_MIC
PORTD_B_MIC
GNDA
Audio Jack
RING3_CONN
RING2_CONN
HP_OUTL_R
HP_OUTR_R
PLUG_IN
CA43
1000P_0402_50V7K
EMC@
Close to Connector
FOR ESD
FILT_1.8V
VDD_IO
VDDO_3.3
DVDD_3.3
AVDD_3.3
VREF_1.65V
AVDD_5V
LEFT+
LEFT-
RIGHT+
RIGHT-
MICBIASC
MICBIASB
HGNDA
HGNDB
AVDD_HP
PORTA_R
PORTA_L
1
2
EMC_NS@
AZ5123-01F.R7GR_DFN1006P2X2
3
+3VL
+3VALW
+3VS
1
@
RA3 0_0603_5%
1
RA5 0_0603_5%@
1
@
RA43 0_0603_5%
2
2
2
AVDD_HP
2
Close to Pin3
1
2
1
2
DA7
1
2
CA4
4.7U_0402_6.3V6M
+3.3VD
MICBIASB
0_0402_5%
1
1
1
1
CA16 close to Pin18
CA17 close to Pin2
2
CD@
1
0.1u_0201_10V6K
CA7
DA2
BAT54AW_SOT323-3
1
@
1
RA42
@
3
2
2
3K_0402_1%
3K_0402_1%
1
1 2
RA37
2
PORTD_A_MIC
PORTD_B_MIC
SPK_R+
2
RA25 15_0402_5% CD@
SPK_R-
2
RA29 15_0402_5% CD@
SPK_L+
2
RA32 15_0402_5% CD@
SPK_L-
2
CD@
RA33 15_0402_5%
1
DA8
1
2
2
EMC_NS@
EMC_NS@
AZ5725-01F.R7GR_DFN1006P2X2
AZ5725-01F.R7GR_DFN1006P2X2
2015/08/20
2015/08/20
2015/08/20
1
2
1U_0402_6.3V6K
CA8
1
RA41
0_0402_5%
@
2
RA38
4.7U_0603_10V6-K
RPA1
2
1
100_0404_4P2R_1%
1
RA26 PBY160808T-221Y-N_2PEMC@
1 2
RA31 PBY160808T-221Y-N_2PEMC@
1
RA30 PBY160808T-221Y-N_2PEMC@
1
RA34 PBY160808T-221Y-N_2PEMC@
1
RA47
0_0402_5%
1
RA48
1
DA9
1
2
2
0_0402_5%
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
CA35
3
4
HP_OUTR
HP_OUTL
@
@
LINE_B_L
LINE_B_R
4
3
1
2
1
2
2
2
2
2
2
2
2
1
0.1u_0201_10V6K
CA3
FILT_1.8V
3
DVDD_IO
7
2
18
AVDD_3.3
27
VREF_1.65V
29
28
+5VA
SPK_L+
12
SPK_L-
14
SPK_R+
17
SPK_R-
15
35
34
MICBIASB
LINE_B_R
33
LINE_B_L
32
PORTD_A_MIC
30
PORTD_B_MIC
31
RING2_CONN
25
RING3_CONN
26
AVDD_HP
24
HPOUT_R
23
HPOUT_L
22
CD@
CD@
CD@
CD@
2
1
CA27
1
DA5
1
2
2
3
2
2
2
1
1
1
220P_0201_25V7-K
220P_0201_25V7-K
220P_0201_25V7-K
220P_0201_25V7-K
CA30
CA28
CA29
1
DA6
1
2
2
EMC_NS@
EMC_NS@
AZ5725-01F.R7GR_DFN1006P2X2
AZ5725-01F.R7GR_DFN1006P2X2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF L C FU TURE CEN TER. AND CON TAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF L C FU TURE CEN TER. AND CON TAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF L C FU TURE CEN TER. AND CON TAINS CONF IDENTIAL
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECR ET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
Close to Pin27
Close to Pin29
RPA2
100_0404_4P2R_1%
1
CA36
4.7U_0603_10V6-K
2
1
2
1
CA39 2.2U_0402_6.3V6M
1
CA40 2.2U_0402_6.3V6M
1
1
1
1 2
2
CA41
CA42
2016/08/20
2016/08/20
2016/08/20
2
2
RA45 0_0402_5%@
RA46 0_0402_5%@
@
470P_0201_50V7-K
@
470P_0201_50V7-K
+5VA
AVDD_HP
2
1
CA11
0.1u_0201_10V6K
Close to Pin28 Close to Pin24
2
1
1
2
CA5
CA6
0.1u_0201_10V6K
2.2U_0402_6.3V6M
2
1
1
2
CA9
1U_0402_6.3V6K
CA10
0.1u_0201_10V6K
RPA3
4
3
82.5_0404_4P2R_1%
2
2
SPK_R+_CONN
SPK_R-_CONN
SPK_L+_CONN
SPK_L-_CONN
EMC@
1
2
CA31
HP_OUTL_R
HP_OUTR_R
HP_OUTR
HP_OUTL
RING3_CONN
RING2_CONN
EMC@
470P_0201_50V7-K
EMC@
1
2
CA32
HP_OUTR_R
HP_OUTL_R
EMC@
1
1
2
2
CA33
CA34
470P_0201_50V7-K
470P_0201_50V7-K
RING2_CONN
PLUG_IN
RING3_CONN
Title
Title
Title
Codec_CX11802 & Audio jack
Codec_CX11802 & Audio jack
Codec_CX11802 & Audio jack
Size Do cument Number Rev
Size Do cument Number Rev
Size Do cument Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
470P_0201_50V7-K
1
2
CA45
100P_0201_25V8J
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
2
1
CA12
0.1u_0201_10V6K
JSPK1
1
1
2
2
3
3
4
4
5
GND1
6
GND2
ACES_88231-04001
ME@
1
2
CA44
100P_0201_25V8J
CG413
CG413
CG413
1
JHP1
3
G/M
1
L/R
5
5
6
6
2
R/L
4
M/G
SINGA_2SJ3095-091111F
ME@
1
MS
43 60
43 60
of
43 60
7
1.0
1.0
1.0
C
B
A
5
For E SD
PLT_RST#
1
CE1
220P_0201_25V7-K
EMC@
2
D D
WRST# 20
+3VL_EC
1 2
DE1
RB751V-40_SOD323-2
RE8
C
+3VL_EC
+3VS
B
+3VL
RE35 10K_0402_5%@
RE36 10K_0402_5%@
RE38 100K_0402_5%
RE40 10K_0402_5%
2.2K_0404_4P2R_5%
2.2K_0404_4P2R_5%
1
1
2
1
1
100K_0402_5%
RPE2
2
1
RPE3
1 4
2
H_PECI 4
EC_VR_ON 59
2
2
1
2
2
3
4
3
EC_ON
@
PM_SLP_S3#
For EMI
CLK_PCI_EC
KBRST# 7
SERIRQ 7,32
LPC_FRAME# 7,32
LPC_AD3 7,32
LPC_AD2 7,32
LPC_AD1 7,32
LPC_AD0 7,32
CLK_PCI_EC 7
1
CE12
1U_0402_6.3V6K
2
KSI[0..7] 45
KSO[0..17] 45
EC_SMB_DA1
EC_SMB_CK1
EC_SMB_CK2
EC_SMB_DA2
1
2
RE58 0_0402_5%
@
2
1
RE24 43_0402_5%
+3VL
1
DE2
RB751V-40_SOD323-2
@
ON/OFF
BKOFF#
LID_SW#
BKOFF#
2
1
RE2 10_0402_5%
EMC@
CE2
10P_0201_50V8F
EMC@
RE56 0_0402_5%@
RE59 0_0402_5%
RE60 0_0402_5%
RE61 0_0402_5%
RE62 0_0402_5%@
RE63 0_0402_5%@
RE64 0_0402_5%@
EC_SMI# 9
EC_RX 40
EC_TX 40
PLT_RST# 11,20,32,37,40
EC_SCI# 4
KSI[0..7]
KSO[0..17]
EC_SMB_CK1
EC_SMB_DA1
KSI7
KSI6
WRST#
PAD
PAD @
PAD
PAD @
PAD @
PAD @
PAD @
PAD @
For factory EC flash
ON/OFF 45
EC_SMB_CK1 52,53
EC_SMB_DA1 52,53
LAN_PWR_ON# 37
EC_SMB_CK2 7,20,39
EC_SMB_DA2 7,20,39
RE27 0_0402_5%@
2
RE272 0_0402_5%@
USB_ON# 41,45
DPWROK_EC 11
EC_RSMRST# 11
PCIE_WAKE# 11,37,40
AC_PRESENT 11
2
2
@
1
@
1
@
1
1
1
1
1
1
1
1
1
1
1
1
1 2
1
2
1
1
2
2
2
2
2
CLK_PCI_EC
WRST#
EC_RX
EC_TX
PLT_RST#
EC_RTCRST#_ON
@
IT1
IT2
@
IT3
IT4
IT5
IT6
IT7
IT8
ON/OFF
EC_SMB_CK1
EC_SMB_DA1
PECI_EC
EC_SMB_CK2
EC_SMB_DA2
2
USB_ON#
PCIE_WAKE#
for EC version update to EX, manual modify PN to FX
+3VL
A
GPG2
GPG2
when mirror, GPG2 pull high
when no mirror, GPG2 pull low
2
RE44 10K_0402_5%
2
RE46 10K_0402_5%@
2
@
RE43 10K_0402_5%
GPG2
1
1
1
+3VL_EC
EC_SPI_CS0#
EC_SPI_SI
EC_SPI_SO
EC_SPI_CLK
5
2
RE45 0_0402_5%@
2
RE47 0_0402_5%@
2
RE48 0_0402_5%@
2
RE49 0_0402_5%@
4
Close EC
2
1
CE3
0.1u_0201_10V6K
Change RE6 to 0ohm jump
RE6 0_0402_5%
LPC_FRAME#_EC
LPC_AD3_EC
LPC_AD2_EC
LPC_AD1_EC
LPC_AD0_EC
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
1
1
1
1
VCOREVCC
2
1
@
UE1
4
KBRST#/GPB6
5
SERIRQ/GPM6
6
LFRAME#/GPM5
7
LAD3/GPM3
8
LAD2/GPM2
9
LAD1/GPM1
10
LAD0/GPM0
13
LPCCLK/GPM4
14
WRST#
15
ECSMI#/GPD4
16
PWUREQ#/BBO/SMCLK2ALT/GPC7
17
LPCPD#/GPE6
22
LPCRST#/GPD2
23
ECSCI#/GPD3
126
GA20/GPB5
58
KSI0/STB#
59
KSI1/AFD#
60
KSI2/INIT#
61
KSI3/SLIN#
62
KSI4
63
KSI5
64
KSI6
65
KSI7
36
KSO0/PD0
37
KSO1/PD1
38
KSO2/PD2
39
KSO3/PD3
40
KSO4/PD4
41
KSO5/PD5
42
KSO6/PD6
43
KSO7/PD7
44
KSO8/ACK#
45
KSO9/BUSY
46
KSO10/PE
51
KSO11/ERR#
52
KSO12/SLCT
53
KSO13
54
KSO14
55
KSO15
56
KSO16/SMOSI/GPC3
57
KSO17/SMISO/GPC5
110
PWRSW#
111
XLP_OUT
115
SMCLK1/GPC1
116
SMDAT1/GPC2
117
SMCLK2/PECI/GPF6
118
SMDAT2/PECIRQT#/GPF7
94
CRX1/SIN1/SMCLK3/GPH1/ID1
95
CTX1/SOUT1/GPH2/SMDAT3/ID2
112
VSTBY0
125
GPE4
33
GINT/CTS0#/GPD5
35
RTS1#/GPE5
93
CLKRUN#/GPH0/ID0
2
CK32KE/GPJ7
128
CK32K/GPJ6
IT8586E-AX_LQFP128_14X14
SPI_CS0#
SPI_SI
SPI_SO
SPI_CLK
4
+3VS
3
26
12
11
VCC
VBAT
VCORE
IT8586E/AX
LQFP-128L
Int. K/B
Matrix
EXTERNAL SERIAL FLASH
SM Bus
WAKE UP
GPIO
Clock
1
SPI_CS0# 7
SPI_SI 7
SPI_SO 7
SPI_CLK 7
RE1 0_0603_5%@
RE3 0_0603_5%@
114
121
92
50
VSTBY4
VSTBY1
VSTBY3
VSTBY2
LPC
SPI Flash ROM
VSS2
VSS1
49
27
NOVO#
2
1
2
1
All capacitors close to EC
+3VL_EC
+3VL_EC_R
127
VSTBY5
VSTBY(PLL)
74
CD@
CE6
minimum trace width 12 mil
AVCC
PWM
PWM6/SSCK/GPA6
PWM7/RIG1#/GPA7
ADC
ADC5/DCD1#/GPI5
ADC6/DSR1#/GPI6
ADC7/CTS1#/GPI7
DAC2/TACH0B/GPJ2
DAC3/TACH1B/GPJ3
DAC
DAC4/DCD0#/GPJ4
DAC5/RIG0#/GPJ5
PS2CLK0/TMB0/CEC/GPF0
PS2DAT0/TMB1/GPF1
PS2
UART
GPIO
DTR1#/SBUSY/GPG1/ID7
TACH1A/TMA1/GPD7
L80HLAT/BAO/GPE0
VSS3
VSS6
VSS5
VSS4
AVSS
91
75
122
113
EC_AGND
1
CE48
0.01U_0201_10V6K
EMC_NS@
2
+3VL
+3VALW
1
2
0.1u_0201_10V6K
PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5
TMRI0/GPC4
TMRI1/GPC6
ADC0/GPI0
ADC1/GPI1
ADC2/GPI2
ADC3/GPI3
ADC4/GPI4
GPF2
GPF3
PS2CLK2/GPF4
PS2DAT2/GPF5
GPH3/ID3
GPH4/ID4
GPH5/ID5
GPH6/ID6
AC_IN#
LID_SW#
EGAD/GPE1
EGCS#/GPE2
EGCLK/GPE3
GPJ1
SSCE0#/GPG2
SSCE1#/GPG0
DSR0#/GPG6
CRX0/GPC0
CTX0/TMA0/GPB2
RI1#/GPD0
RI2#/GPD1
TACH2/GPJ0
TACH0A/GPD6
L80LLAT/GPE7
PECI_EC
BATT_TEMP
ACIN#
ON/OFF
3
@
1
1
2
2
CE8
PWR_LED#
EC_VCCST_PWRGD
EC_FAN_PWM
EC_VCCST_EN_R
LAN_WAKE#
SUSP#
BATT_TEMP
H_PROCHOT#_EC
EC_ON_GPIO
EC_SMB_CK3
EC_SMB_DA3
TP_CLK
TP_DATA
EC_SPI_CS0#
EC_SPI_SI
EC_SPI_SO
EC_SPI_CLK
EC_FAN_ANTI_R
EC_VPP_PWREN
EC_FAN_SPEED
Security Classification
Security Classification
Security Classification
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
0.1u_0201_10V6K
0.1u_0201_10V6K
CE9
B+_Track
ACIN#
LID_SW#
GPG2
SYSON_R
RE271 0_0402_5%@
BKOFF#
1
1
1
1
Issued D ate
Issued D ate
Issued D ate
RE34
2
2
2
2
H_PROCHOT#_EC
VR_HOT# 53,59
CE15 47P_0201_25V8-JEMC_NS@
CE16 100P_0201_25V8J
CE17 100P_0201_25V8JEMC_NS@
CE18 1U_0402_6.3V6K@
CE7
NC1
NC2
NC3
NC4
1
2
3
0.1u_0201_10V6K
24
25
28
29
30
31
32
34
120
124
66
67
68
69
70
71
72
73
78
79
80
81
85
86
87
88
89
90
96
97
98
99
101
102
103
105
108
109
82
83
84
77
100
106
104
107
119
123
18
21
76
48
47
19
20
EMC_NS@
1
2
CE10
0.1u_0201_10V6K
PWR_LED# 45
BATT_CHG_LED# 45
BATT_LOW_LED# 45
EC_VCCST_PWRGD 11
SYS_PWROK 11
EC_FAN_PWM 39
BEEP# 43
SUSP# 46
NTC_V1 39
NTC_V2 39
BATT_TEMP 52,53
PM_SLP_SUS# 11
CPU_VR_READY 59
ADP_I 53
1
TE1 @
SUSWARN# 11
SUSACK# 11
ENBKL 33
PBTN_OUT# 11
EC_SMB_CK3 55
EC_SMB_DA3 55
TP_CLK 45
TP_DATA 45
CAPS_LED# 45
PCH_PWR_EN 46,55
EC_BKL_EN 45
PCH_PWROK 11
LID_SW# 45
VDDQ_PGOOD 55
EC_VPP_PWREN 55
EC_CMOS_ON# 33
EC_MUTE# 43
1
2
BKOFF# 33
PM_SLP_S3# 11,13
PM_SLP_S4# 11
NOVO# 45
EC_TS_ON 33
EC_FAN_SPEED 39
NUM_LED# 45
1
@
0_0402_5%
100_0402_5%
2N7002KW_SOT323-3
2015/08/20
2015/08/20
2015/08/20
2
@
1
2
CE11
1
2
G
0.1u_0201_10V6K
RE54
@
RE267
QE1
+3VS
1 2
@
0_0402_5%
2
RE57 0_0402_5%
2
RE55 0_0402_5%@
1
2
1
D
S
3
1
CE19
0.1u_0201_10V6K
2
SYSON
Reserve for VGA_AC_DET
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
+3VL_EC +3VL_EC
EC_VCCST_EN
+3VL_EC
For PMIC
EC_SMB_DA3
EC_SMB_CK3
1
RE53 0_0402_5%@
1
1
CE14
47P_0201_25V8-J
EMC_NS@
2
ACIN# 11
Deciphered Date
Deciphered Date
Deciphered Date
2
1
LE1 0_0603_5%@
1
LE2 0_0603_5%@
1
RE65
100K_0402_5%
2
RPE4
1
2
2.2K_0404_4P2R_5%
2
EC_VCCIO_EN
VGA_AC_DET
ACIN#
2
2
CE4
0.1u_0201_10V6K
2
EC_ON 39,54,55
+3VALW
RE273
0_0402_5%
@
4
3
H_PROCHOT# 4,55
+3VL
2
RE42
100K_0402_5%
1
1
D
QE2
S
2N7002KW_SOT323-3
3
@
2016/08/20
2016/08/20
2016/08/20
1
2
EC_AGND
EC_AGND
EC_VCCST_EN 13
+3VL_EC
1
1
RE274
0_0402_5%@
2
2
EC_FAN_ANTI 39
ME_FLASH 8
SYSON 55
EC_VCCIO_EN 13
VGA_AC_DET 20
1
RE262 0_0402_5%@
2
G
+3VL_EC_R
1
CE5
1000P_0201_50V7-K
2
EC_FAN_SPEED
EC_FAN_PWM
LPC_FRAME#
ENBKL
CPU_VR_READY
EC_CMOS_ON#
TP_CLK
TP_DATA
USB_ON#
SUSP#
SUSP#
SYSON_R
EC_VCCST_EN
EC_VCCIO_EN
EC_RTCRST#_ON
100K_0402_5%
2
Title
Title
Title
Size
Size
Size
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
+3VL_EC
LAN_WAKE#
1
RE10 10K_0402_5%
1
RE11 10K_0402_5%
1
RE7 10K_0402_5%@
1
RE9 100K_0402_5%
1 2
RE270 10K_0402_5%
1
RE275 10K_0402_5%@
2
RE12 4.7K_0402_5%
2
RE13 4.7K_0402_5%
1
RE15 100K_0402_5%
1
RE18 100K_0402_5%@
1
RE19 100K_0402_5%
1
RE21 100K_0402_5%
1
RE269 100K_0402_5%
1
RE268 100K_0402_5%
Add to fix Reset&PWRGD test fail issue
VDDQ_PGOOD
PM_SLP_S4#
PM_SLP_S3#
SYSON
2
1
PM_SLP_S4#
2
G
1
RE50
@
2
ACIN 53
EC ITE8586LQFP
EC ITE8586LQFP
EC ITE8586LQFP
Document Number Rev
Document Number Rev
Document Number Rev
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
1
V20B+
1 2
RE261
470K_0402_5%
0_0402_5%
2
2
2
EMC_NS@
2
@
1
R260
47K_0402_5%
@
2
LAN_WAKE# 37,40
+3VS
+3VS
+5VS
2
1
RE52
@
1
2
+5VALW
+3VL_EC
RE51
0_0402_5%@
B+_Track
1
RE5
10K_0402_5%
2
2
2
@
2
2
@
2
1
1
2
2
2
2
2
@
2
@
1
CE51 0.01U_0201_10V6K
1
CE50 1000P_0201_50V7-KEMC_NS@
1
CE21 1000P_0201_50V7-K
1
CE13 1000P_0201_50V7-KEMC_NS@
EMC Request
DE3
RB751V-40_SOD323-2
@
EC_RTC_RST# 10
1
D
QE3
S
@
2N7002KW_SOT323-3
3
CG413
CG413
CG413
1
of
44 60
of
44 60
of
44 60
1.0
1.0
1.0
C
B
A
5
ON/OFF switch
+3VL
+3VALW
2
R82
100K_0402_5%
NOVO#
NOVO# 44
ON/OFFBTN#
1
J5
SHORT PADS
1 2
J6
SHORT PADS
ON/OFF
2
@
@
D D
R83
100K_0402_5%
@
1 2
1
2
1
R85 0_0402_5%
@
1 2
R119 0_0402_5%@
1
R261
0_0402_5%
2
D15
3
BAT54CW_SOT323-3
+3VALW
R111
100K_0402_5%
@
1 2
ON/OFF
2
@
NOVO_BTN#
1
@
+3VL
2
R114
100K_0402_5%
1
ON/OFF 44
4
3
2
1
Novo button
U14
1
GND
OUTPUT
2
VCC
AH9247-W-7_SC59-3
NOVO_BTN#
1
D24
1
AZ5123-01F.R7GR_DFN1006P2X2
EMC@
2
2
1
C1104
100P_0201_25V8J
2
LID_SW#
3
LID_SW# 44
3
1
SW1
SKRBAAE010_4P
14@
4
2
3
1
SW3
SKRBAAE010_4P
15@
2
4
ON/OFFBTN#
1
D25
1
2
EMC_14@
2
AZ5123-01F.R7GR_DFN1006P2X2
ON/OFFBTN#
1
D26
1
2
EMC_15@
2
AZ5123-01F.R7GR_DFN1006P2X2
LID switch
R264
+3VL
0.01U_0201_10V6K
1
0_0402_5%
1
2
SW2
EVQP7L01K SPST
3
4
1
C1105
+VCC_LID
2
2
@
K/B Connector
PWR_CAPS_LED
PWR_NUM_LED
CAPS_LED#
NUM_LED#_R
C
CAPS_LED#
1
D22
1
AZ5123-01F.R7GR_DFN1006P2X2
EMC@
2
2
USB DB Connector
+5VALW
1
C141
1U_0402_6.3V6K
USB_ON# 41,44
2
B
USB20_P2
USB20_N2
USB20_P3
USB20_N3
USB30_RX_P2
USB30_RX_N2
USB30_TX_N2
USB30_TX_P2
BATT_LOW_LED# 44
A
BATT_CHG_LED# 44
KSI[0..7]
KSO[0..17]
EMC_NS@
2
1
C133 100P_0201_25V8J
2
1
C134 100P_0201_25V8J
EMC_NS@
EMC@
2
1
C117 100P_0201_25V8J
1
2
C118 100P_0201_25V8J
EMC_15@
NUM_LED#_R
1
D23
1
AZ5123-01F.R7GR_DFN1006P2X2
EMC_15@
2
2
For EMC
Right Side USB2.0 Port X 2 (USB/B)
U3
5
IN
OUT
GND
4
ENB
OCB
SY6288D20AAC_SOT23-5
Low Active 2A
L14
EMC_NS@
1
1
4
4
EXC24CH900U_4P
L17
EMC_NS@
1
1
4
4
EXC24CH900U_4P
L20
EMC_NS@
112
4
4
EXC24CH900U_4P
L21
EMC_NS@
112
4
4
EXC24CH900U_4P
BATT_LOW_LED#
1
D18
1
AZ5123-01F.R7GR_DFN1006P2X2
EMC_NS@
2
2
BATT_CHG_LED#
1
D19
1
AZ5725-01F.R7GR_DFN1006P2X2
EMC_NS@
2
2
5
+USB_VCCB
1
2
USB_OC2#
3
1
C142
1000P_0201_50V7-K
EMC_NS@
2
USB20_P2_CONN
2
2
USB20_N2_CONN
3
3
USB20_P3_CONN
2
2
USB20_N3_CONN
3
3
USB30_RX_R_P2
2
USB30_RX_R_N2
3
3
USB30_TX_R_N2
2
USB30_TX_R_P2
3
3
1
LED2
L-C192JFCT-LCFC_SUPER_AMBER
1
LED3
L-C192WDT-LCFC_WHITE
2
2
KSI[0..7] 44
KSO[0..17] 44
USB_OC2# 9
+3VS
+3VALW
2
1
R143 470_0402_5%
1
2
R144 1.5K_0402_5%
1
R291 0_0402_5%14@
KSO12
1
15@
R292 0_0402_5%
KSO14
1
R289 0_0402_5%14@
KSI2
1
15@
R290 0_0402_5%
KSI5
R67 0_0402_5%
USB20_P2 9
R66 0_0402_5%@
USB20_N2 9
R254 0_0402_5%@
USB20_P3 9
R255 0_0402_5%@
USB20_N3 9
PWR_LED# 44
+3VALW
+5VALW
1
@
1
4
R284 0_0402_5%@
R283 0_0402_5%@
R285 0_0402_5%@
R286 0_0402_5%
2
2
USB30_RX_P2 9
USB30_RX_N2 9
USB30_TX_P2 9
USB30_TX_N2 9
R295 0_0402_5%
R298 0_0402_5%510Z@
2
2
2
2
1
1 2
1
1
1
1
1
1
@
@
+3VS_DB
KB_P32
KB_P31
NUM_LED#_R
2
1
15@
+3VS
KSO17
KSO16
R84
+3VS
USB20_P2_CONN
USB20_N2_CONN
USB20_P3_CONN
USB20_N3_CONN
PWR_LED#
USB30_RX_R_P2
USB30_RX_R_N2
USB30_TX_R_P2
USB30_TX_R_N2
+3VS_DB
+USB_VCCB
USB20_P2_CONN
USB20_N2_CONN
USB20_P3_CONN
USB20_N3_CONN
PWR_LED#
R279 0_0402_5%
1 2
R90 300_0402_5%15@
1
R281 0_0402_5%15@
1
R280 0_0402_5%15@
CAPS_LED# 44
1
2
300_0402_5%
+USB_VCCB
2
2
JUSB3
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
ACES_50506-01201-AT1
ME@
JUSB4
22
GND2
21
GND1
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
HIGHS_FC5AF201-1151H
ME@
PWR_NUM_LED
KSO17_R
KSO16_R
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
CAPS_LED#
PWR_CAPS_LED
GND2
GND1
3
NUM_LED# 44
KB_P32
KB_P31
2
2
2
+5VALW
2
2
2
2
+5VALW
JKB1
32
33
32
GND1
34
31
31
GND2
30
30
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
CVILU_CF32321D0RONH
ME@
TP/B Co nnector
14
13
For EMC
Security C lassification
Security C lassification
Security C lassification
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF LC FUTURE CENTE R. AND CONTAI NS CO NFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF LC FUTURE CENTE R. AND CONTAI NS CO NFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF LC FUTURE CENTE R. AND CONTAI NS CO NFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USE D BY O R DI SCLO SED TO A NY THI RD PARTY WI THOUT PRIOR WRI TTEN CONSENT OF LC FUTURE CENTER.
MAY BE USE D BY O R DI SCLO SED TO A NY THI RD PARTY WI THOUT PRIOR WRI TTEN CONSENT OF LC FUTURE CENTER.
MAY BE USE D BY O R DI SCLO SED TO A NY THI RD PARTY WI THOUT PRIOR WRI TTEN CONSENT OF LC FUTURE CENTER.
KB Backlight Connector
TP_CLK
TP_DATA
3
AZC199-02S.R7G_SOT23-3
1
2015/08/20
2015/08/20
2015/08/20
EC_BKL_EN 44
+5VS
1
R160
+3VS
0_0402_5%
1
R141 0_0402_5%@
2
DT1
EMC_NS@
LC Future Center S ecret Data
LC Future Center S ecret Data
LC Future Center S ecret Data
2
EC_BKL_EN
0.1u_0201_10V6K
2
@
2
Deciphered Date
Deciphered Date
Deciphered Date
C1109
KBL@
TP_PWR
0.1u_0201_10V6K
+5VS
+5VALW
1
R265
10K_0402_5%
KBL@
2
1 2
100K_0402_5%
KBL@
1
D
2
Q32
G
2N7002KW_SOT323-3
KBL@
S
1
3
2
TP_CLK 44
TP_DATA 44
1
2
C114
2016/08/20
2016/08/20
2016/08/20
1
2
C115
100P_0201_25V8J
Q31
LP2301ALT1G_SOT23-3
KBL@
D
S
1 3
G
R266
2
10U_0603_6.3V6M
1
C1108
0.01U_0201_10V6K
KBL@
2
+VCC_KB_LED
C1110
0.1u_0201_10V6K
@
TP_CLK
TP_DATA
1
2
EMC_NS@
EMC_NS@
C116
100P_0201_25V8J
Title
Title
Title
KBD/PWR/IO/LED/TP Conn.
KBD/PWR/IO/LED/TP Conn.
KBD/PWR/IO/LED/TP Conn.
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
Custom
Custom
Custom
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
Date: Sheet of
Date: Sheet of
Date: Sheet
1
2
C1106
KBL@
CG413
CG413
CG413
1
+VCC_KB_LED
1
1
2
2
JTP1
1
1
2
2
3
3
4
4
5
GND1
6
GND2
HIGHS_FC1AF040-1201H
ME@
C1107
0.1u_0201_10V6K
KBL@
JKBL1
1
1
2
2
3
3
4
4
5
GND1
6
GND2
HIGHS_FC1AF040-1201H
ME@
45 60
45 60
45 60
of
C
B
A
1.0
1.0
1.0
A
B
C
D
E
Load Switch
+5VALW To +5VS
+3VALW To +3VS
1
1 2
C180
1U_0402_6.3V6K
PCH_PWR_EN#
1
R162
@
2
2
1
2
+5VALW
1
2
1
D
Q30
2
G
S
3
R64 0_0402_5%@
1 1
2
PCH_PWR_EN#_R
PCH_PWR_EN 44,55
3
1 2
R158 100K_0402_5%@
SUSP#
R27 0_0402_5%@
PCH_PWR_EN
100K_0402_5%
1
C179
1U_0402_6.3V6K
2
R155
100K_0402_5%
@
2N7002KW_SOT323-3@
3VSON
5VSON
+5VALW
1
2
+3VALW
1
C178
1U_0402_6.3V6K
2
@
C1103
22U_0603_6.3V6-M
C177
1U_0402_6.3V6K
1
@
2
PCH_PWR_EN#_R
VIN 5V and 3.3V (VBIAS=5V), IMAX(per channel)=6A, Rds=16mohm
+5VALW
Change the main so urce to SA00 0067600 (GMT) 7/16
+3VALW
1
R87
100K_0402_5%
@
2
+3VS, C173 --> 2.74ms
+5VS, C176 --> 2.03ms
U13
1
IN1_1
2
IN1_2
5VSON
3VSON
3
EN1
4
VBIAS
5
EN2
6
IN2_1
7
IN2_2
G5016KD1U_TDFN14_2X3
Need short
@
J7
112
JUMP_43X79
LP2301ALT1G_SOT23-3
D
S
1
3
Q29
G
2
1
C131
0.1u_0201_10V6K
@
2
2
OUT1_2
OUT1_1
GND
OUT2_2
OUT2_1
GPAD
14
13
12
C176 1000P_0201_50V7-K
CT1
11
10
C173 2200P_0402_25V7-K
CT2
9
8
15
+3VALW_PCH
+5VS_LS
1
1
+3VS_LS
Need Short
J12
2
2
JUMP_43X118
J11
1
JUMP_43X118
Need Short
112
1
+5VS
@
2
1
C174
0.1u_0201_10V6K
@
2
@
2
2
+3VS
1
C175
0.1u_0201_10V6K
@
2
Id=3.2A
@
1
C130
0.01U_0201_10V6K
@
2
2
3
4
+5VLP
+5VALW
1
1 2
R156
100K_0402_5%
SUSP 34
SUSP# 44
SUSP
Q10
2
G
R157
100K_0402_5%
@
2
1
D
S
2N7002KW_SOT323-3
3
+0.6VS
1 2
R159
47_0603_5%
@
1
D
Q11
G
S
2N7002KW_SOT323-3
3
@
2
08/29: Need double check enable signal and the resistanc e
A
B
For DisCharge
+2.5V_DDR
1
R278
200_0402_5%
@
2
1
D
Q33
SUSP
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
2015/08/20
2015/08/20
2015/08/20
2
SUSP
G
S
2N7002KW_SOT323-3
3
@
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
2016/08/20
2016/08/20
2016/08/20
Title
Title
Title
DC V TO VS INTERFACE
DC V TO VS INTERFACE
DC V TO VS INTERFACE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
46 60
of
of
46 60
E
46 60
4
1.0
1.0
1.0
5
D D
AC
MODE
A1
VIN
V
PU301
V
BATT
MODE
C
BATT
B1
4
B2
A2
+3VLP
V
B5
V
11
+3VALW
A3
VR_REDY
A4
V
EC
B4
B3
V
V
V
10
VR_ON
A2
PU904
V
B+
EC_ON
ON/OFF
NOVO
PU901
+CPU_C ORE
3
PCH_PWR_EN#
1
DPWROK_EC
4
PCH_RSMRST#
5
PBTN_ OUT#
PM_SLP_S3#
PM_SLP_S4#
PM_SLP_S5#
V
PM_SLP_SUS#
12
PCH_PWROK
13
SYS_PWROK
SYSON
2
2
Q25,+3V_PCH
V
3
+3V_PCH
1
V
V
PM_DRAM_PWRGD
VV
6
PCH
H_CPUPWRGD
CPU_PLTRST#
14
V
15
16
CPU
V
V
V
V
NVDD_PWR_EN
(DIS)
7
+1.35V
PU501
V
Q31
V
+5VS
Vb
DGPU_PWR_EN
(DIS)
Va
+VGA_CORE
V
PU801
DGPU_PWROK
+1.5VS_VGA
V
PU601
V V
C
B
SUSP#,SUSP
9
Q32
V
+3VS
PU602
V
+1.5VS
PU502
V
+1.05VSP_VGA
V
PU702
+3VS_VGA
V
Q27
VGA
V
VV
B
+0.675V
SUS_VCCP
A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
8
3
PU701
V
+1.05VS
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
Title
Title
Power sequence block
Power sequence block
Power sequence block
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
of
47 60
47 60
of
1
47 60
A
1.0
1.0
1.0
5
ZZZ1
@
ZZZ1
@
ZZZ1
@
4
ZZZ1
ZZZ1
@
ZZZ1
@
3
@
UC1
80710@
UC1
80310@
2
UC1
80410@
1
PCB PN
DAZ11500100
UL1
D D
RTL8111H-CG
SA000074W00
ZZZ2
Samsung
X76XXXXXXXX
UD1
K4A8G165WB-BCPB
SA00007DA10
C
UD1
MT40A512M16HA-083E:A
SA000079F10
ZZZ2
PCB PN
DAZ11600100
8111H@
LAN Chip GPU
@
UD2
@
K4A8G165WB-BCPB
SA00007DA10
UD2
@
MT40A512M16HA-083E:A
SA000079F10
DRAM_S4G@
UV1
N16S-GTR GPU
SA00007QA10
@
@
PCB PN
DAZ11500200
N16SGTR@
UV1
N16V-GMR1 GPU
SA00007QX00
@
ZZZ2
Micron
X76XXXXXXXX
2133MT/s DRAM X76 BOM
UD3
@
K4A8G165WB-BCPB
SA00007DA10
UD3
@
MT40A512M16HA-083E:A
SA000079F10
ZZZ2
DRAM_M4G@
PCB PN
DAZ11600200
N16VGMR1@
UD4
@
K4A8G165WB-BCPB
SA00007DA10
UD4
@
MT40A512M16HA-083E:A
SA000079F10
PCB PN
DAZ11300100
RC1634
10K_0402_5%
SD02810028J
RC1631
10K_0402_5%
SD02810028J
@
PCB PN
DAZ11300200
RC1635
@
10K_0402_5%
SD02810028J
2133MT/s DRAM_Samsung 4G
PCB_MB CPU
@
RC1640
10K_0402_5%
SD02810028J
2133MT/s DRAM_Hynix 4G
@
RC1635
@
RC1640
10K_0402_5%
SD02810028J
10K_0402_5%
SD02810028J
2133MT/s DRAM_Micron 4G
@
KBL-U CPU
SA000080710
ZZZ3
Samsung
X7612912001
UV5
K4W4G1646E-BC1A
SA000063F20
UV5
H5TC4G63CFR-N0C
SA00007DU10
UV5
MT41J256M16LY-091G:N
SA00007QJ00
UV5
K4W4G1646E-BC1A
SA000063F20
UV9
K4W4G1646E-BC1A
SA000063F20
S4GX4@
S4G_SR@
H4G_SR@
M4G_SR@
S4G_DR@
S4G_DR@
KBL-U CPU
SA000080310
ZZZ3
H4GX4@
Hynix
X7612712003
UV6
S4G_SR@
K4W4G1646E-BC1A
SA000063F20
UV6
H4G_SR@
H5TC4G63CFR-N0C
SA00007DU10
UV6
M4G_SR@
MT41J256M16LY-091G:N
SA00007QJ00
UV6
S4G_DR@
K4W4G1646E-BC1A
SA000063F20
UV10
S4G_DR@
K4W4G1646E-BC1A
SA000063F20
KBL-U CPU
SA000080410
M4GX4@
ZZZ3
Micron
X7612712002
UV7
S4G_SR@
K4W4G1646E-BC1A
SA000063F20
UV7
H4G_SR@
H5TC4G63CFR-N0C
SA00007DU10
UV7
M4G_SR@
MT41J256M16LY-091G:N
SA00007QJ00
UV7
S4G_DR@
K4W4G1646E-BC1A
SA000063F20
UV11
S4G_DR@
K4W4G1646E-BC1A
SA000063F20
ZZZ3
S4GX8@
Samsung
X7612712001
UV8
S4G_SR@
K4W4G1646E-BC1A
SA000063F20
UV8
H4G_SR@
H5TC4G63CFR-N0C
SA00007DU10
UV8
M4G_SR@
MT41J256M16LY-091G:N
SA00007QJ00
UV8
S4G_DR@
K4W4G1646E-BC1A
SA000063F20
UV12
S4G_DR@
K4W4G1646E-BC1A
SA000063F20
H4GX8@
ZZZ3
Hynix
X7612712008
RV159
S4G_SR@
10K_0402_1%
SD03410028J
RV159
H4G_SR@
15K_0402_1%
SD03415028J
RV159
M4G_SR@
34.8K_0402_1%
SD03434828J
RV156
S4G_DR@
45.3K_0402_1%
SD03445328J
ZZZ3
M4GX8@
Micron
X7612712007
VRAM X76 BOM
VRAM_Samsung 4GX4
VRAM_Hynix 4GX4
VRAM_Micron 4GX4
VRAM_Samsung 4GX8
B
Samsung
X7612912002
UD1
MD_S8Gb@
K4A8G165WB-BCRC
SA00007TQ00
MD_S8Gb@
UD2
K4A8G165WB-BCRC
SA00007TQ00
Micron
X7612912003
2400MT/s DRAM X76 BOM
UD3
MD_S8Gb@
K4A8G165WB-BCRC
SA00007TQ00
UD4
MD_S8Gb@
K4A8G165WB-BCRC
SA00007TQ00
RC1634
10K_0402_5%
SD02810028J
MD_S8Gb@
RC1635
MD_S8Gb@
10K_0402_5%
SD02810028J
2400MT/s DRAM_Samsung 4G
RC1639
10K_0402_5%
SD02810028J
MD_S8Gb@
UV5
H4G_DR@
H5TC4G63CFR-N0C
SA00007DU10
UV9
H4G_DR@
H5TC4G63CFR-N0C
SA00007DU10
UV6
H4G_DR@
H5TC4G63CFR-N0C
SA00007DU10
UV10
H4G_DR@
H5TC4G63CFR-N0C
SA00007DU10
UV7
H4G_DR@
H5TC4G63CFR-N0C
SA00007DU10
UV11
H4G_DR@
H5TC4G63CFR-N0C
SA00007DU10
UV8
H4G_DR@
H5TC4G63CFR-N0C
SA00007DU10
UV12
H4G_DR@
H5TC4G63CFR-N0C
SA00007DU10
RV156
H4G_DR@
34.8K_0402_1%
SD03434828J
VRAM_Hynix 4GX8
C
B
A
UD1
MD_M8Gb@
MT40A512M16JY-083E:B
SA00007TS00
ZZZ4
HDMI@
HDMI PN
RO00000040J
HDMI Royalty
UD2
MD_M8Gb@
MT40A512M16JY-083E:B
SA00007TS00
5
UD3
MD_M8Gb@
MT40A512M16JY-083E:B
SA00007TS00
UD4
MD_M8Gb@
MT40A512M16JY-083E:B
SA00007TS00
4
RC1631
10K_0402_5%
SD02810028J
MD_M8Gb@
2400MT/s DRAM_Hynix 4G
RC1635
MD_M8Gb@
10K_0402_5%
SD02810028J
2400MT/s DRAM_Micron 4G
UV7
UV5
M4G_DR@
UV6
M4G_DR@
MT41J256M16LY-091G:N
RC1639
MD_M8Gb@
10K_0402_5%
SD02810028J
Security Cl assification
Security Cl assificati on
Security Cl assificati on
Issued Date
Issued Date
Issued Date
THIS SHE ET OF E NGINEERING DRAW ING IS THE PROPRI ETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF E NGINEERING DRAW ING IS THE PROPRI ETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF E NGINEERING DRAW ING IS THE PROPRI ETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TR ADE SECR ET INFORM ATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TR ADE SECR ET INFORM ATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TR ADE SECR ET INFORM ATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
SA00007QJ00
UV9
MT41J256M16LY-091G:N
SA00007QJ00
2015/08/20
2015/08/20
2015/08/20
MT41J256M16LY-091G:N
SA00007QJ00
UV10
M4G_DR@
MT41J256M16LY-091G:N
SA00007QJ00
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
M4G_DR@
Deciphered Date
Deciphered Date
Deciphered Date
M4G_DR@
MT41J256M16LY-091G:N
SA00007QJ00
UV11
M4G_DR@
MT41J256M16LY-091G:N
SA00007QJ00
2016/08/20
2016/08/20
2016/08/20
2
RV156
15K_0402_1%
SD03415028J
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
M4G_DR@
CG413
CG413
CG413
UV8
M4G_DR@
MT41J256M16LY-091G:N
SA00007QJ00
UV12
M4G_DR@
MT41J256M16LY-091G:N
SA00007QJ00
Title
Title
Title
Virtual symbol
Virtual symbol
Virtual symbol
Size
Document Number Re v
Size
Document Number Re v
Size
Document Number Re v
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet
VRAM_Micron 4GX8
1
of
48 60
48 60
of
48 60
A
1.0
1.0
1.0
5
4
3
2
1
PCB Fedical Mark PAD
FD2
FD3
1
1
FD4
FD5
FD6
1
1
1
NH1
D D
HOLEA
1
NH2
HOLEA
1
NH3
HOLEA
1
FD1
1
PAD_O2P6X2P5D2P6X2P5N
H1
HOLEA
1
PAD_D3P4
H11
C
B
HOLEA
1
PAD_CT7P0B9P0D3P0
PAD_O2P5X3P0D2P5X3P0N
H12
HOLEA
1
pad_ct6p0b7p0d4p0
PAD_O2P5X2P9D2P5X2P9N
H3
HOLEA
1
CHASSIS1_GND
PAD_CT7P0B9P0D3P0
H13
HOLEA
1
pad_ct6p0b7p0d4p0
H4
HOLEA
1
PAD_C7P0D3P3
H14
HOLEA
1
pad_ct6p0b7p0d4p0
H5
HOLEA
1
PAD_C8P0
H15
HOLEA
1
pad_ct6p0b7p0d4p0
H6
HOLEA
1
PAD_C5P0
H16
HOLEA
1
PAD_ShapeT9P0X8P0CB9P0D3P0
H7
HOLEA
1
PAD_C7P0D3P0
H17
HOLEA
1
PAD_ShapeT7P5X8P0D3P4
H18
HOLEA
1
PAD_CT7P0B6P0D3P3
H19
HOLEA
1
PAD_C3P0D3P0N
H10
HOLEA
1
PAD_C7P0D3P3
H20
HOLEA
1
PAD_C6P0D2P5
C
B
A
Title
Title
Security Classification
Security Classification
Security Classification
Issue d D ate
Issue d D ate
Issue d D ate
THIS SH EET OF EN GINEERING DRAWING IS THE PROPR IETARY PROP ERTY OF LC FU TURE CEN TER. AND CON TAINS CONF IDENTIAL
THIS SH EET OF EN GINEERING DRAWING IS THE PROPR IETARY PROP ERTY OF LC FU TURE CEN TER. AND CON TAINS CONF IDENTIAL
THIS SH EET OF EN GINEERING DRAWING IS THE PROPR IETARY PROP ERTY OF LC FU TURE CEN TER. AND CON TAINS CONF IDENTIAL
AND TRAD E SECRE T INFORMATION. TH IS SHEET MAY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECRE T INFORMATION. TH IS SHEET MAY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECRE T INFORMATION. TH IS SHEET MAY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSED TO AN Y THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR D ISCLOSED TO AN Y THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR D ISCLOSED TO AN Y THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENTER.
5
4
2015/08/20
2015/08/20
2015/08/20
3
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2016/08/20
2016/08/20
2016/08/20
2
Title
Hole
Hole
Hole
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
B
B
B
Thursday, July 14, 2016
Thursday, July 14, 2016
Date: Sheet
Date: Sheet
Date: Sheet of
Thursday, July 14, 2016
CG413
CG413
CG413
1
49 60
49 60
49 60
of
of
A
1.0
1.0
1.0
5
D D
4
3
2
1
Adaptor 45W/65W
C
TI
BQ24780SRUYR
Battery Charger
Switch Mode
SMBus
B
Battery
polymer
2S1P
V20B+
EC_ON
EC_ON
SYSON
CPU_DRAMPG_CNTL
FBVDDQ_PWR_EN
PXS_PWREN
Silergy
SY8288CRAC
QFN20_3X3
Converter
FOR SYSTEM
Silergy
SY8286BRAC
QFN20_3X3
Converter
FOR SYSTEM
Richtek
LV5075AGQV
S5
VQFN40_5X5
Switch Mode
S3
FOR DDR4
Richtek
NB685GQ-Z
QFN16_3X3
Switch Mode
EN
FOR VRAM
Intersil
RT8812AGQW
WQFN20_3X3
VID
Switch Mode
EN
FOR GPU VDDC
PGOOD EN
PGOOD EN
PGOOD
PGOOD
PGOOD
+5VLP/ 100mA
+5VALW/6A
NA
+3VLP/ 100mA
+3VALW/ 5A
ALW_PWRGD
+1.2V/7A
+0.6VS/2A
VDDQ_PGOOD
+1.35V/8A
NA
+VGA_CORE/31A
DGPU_PWROK
PCH_PWR_EN EN
PCH_PWR_EN
EC_VPP_PWREN
Silergy
LV5075AGQV
VQFN40_5X5
Converter
FOR PCH
ANPEC
LV5075AGQV
VQFN40_5X5
Converter
EN
For GPU
Richtek
LV5075AGQV
VQFN40_5X5
LDO
EN
For DDR4
PGOOD
PGOOD
PGOOD
+1.0VALW/6A
NA
+1.8VALW/1A
NA
+2.5V/1A
NA
EN_VGA
GMT
G971LADJF11U
SO8
LDO
EN
FOR GPU
+1.05VGS/1.5A
NAPGOOD
C
B
PGOOD
CPU Core/23A
VCCGT/25A
VCCSA/7A
CPU_VR_READY
A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS S HEET O F E NGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS S HEET O F E NGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS S HEET O F E NGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRE T IN FORMATION. THIS S HEET MAY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRE T IN FORMATION. THIS S HEET MAY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRE T IN FORMATION. THIS S HEET MAY N OT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCL OSED TO ANY T HIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCL OSED TO ANY T HIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
MAY BE USED BY OR DISCL OSED TO ANY T HIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
PWR-Power Diagram
PWR-Power Diagram
PWR-Power Diagram
Size
Document Nu mber Rev
Size
Document Nu mber Rev
Size
Document Nu mber Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
50 60
50 60
50 60
1.0
1.0
1.0
of
Onsemi
NCP81206MNR2G
QFN60_7X7
Switch Mode
VID
EC_VR_ON
A
5
FOR CPU Core
EN
4
5
4
3
2
1
PC103
EMC@
470P_0201_50V7-K
1
2
RTC_VCC
VIN
2
EMC@
1
PC104
1000P_0201_50V7-K
JRTC1
1
1
2
2
3
G1
4
G2
ACES_50273-0020N-001
ME@
RTC_VCC 20MIL
+3VL 20MIL
VCCRTC 20MIL
No charge RTC
JDCIN1
1
1
2
GND1
3
GND2
4
GND3
5
GND4
6
D D
C
GND5
7
GND6
HIGHS_PJSS0026-8B01H
ME@
7A_24VDC_429007.WRML
1
ADPIN
VCCRTC
2
1
PF101
2
@
PC105
1U_0402_6.3V6K
APDIN_F
PC101
EMC@
1000P_0201_50V7-K
2
PC102
1
PD101
1
BAT54CW_SOT323-3
1
EMC@
2
470P_0201_50V7-K
2
3
EMC@
HCB2012KF-121T50_0805
PL101
1
2
EMC@
HCB2012KF-121T50_0805
PL102
1
2
+3VL
1
PR1015
1.5K_0402_1%
2
1
PR1016
45.3K_0402_1%
2
2
PR101
1K_0603_5%
1
C
B
A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
PWR-DCIN / RTC charger
PWR-DCIN / RTC charger
PWR-DCIN / RTC charger
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
of
51 60
51 60
1
51 60
B
A
1.0
1.0
1.0
5
4
3
2
1
SUYIN_125022HB008M202ZL
9
JBATT2
GND1
GND2
ME@
JBATT1
1
2
9
GND1
3
10
GND2
4
5
6
7
8
ME@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
D D
C
SUYIN_125022HB008M202ZL
B
10
VBAT
1
2
EC_SMCA
3
EC_SMDA
4
5
6
7
8
BATT_TEMP_IN
1
PD202
1
EMC_NS@
AZ5215-01F_DFN1006P2E2
2
2
PF201
12A_24V_F1206HB12V024T/M
1
2
3
2
PD201
EMC_NS@
AZC199-02S.R7G_SOT23-3
1
PR209
2
1
100K_0402_1%
PR213
1
2
10K_0402_5%
2
1
PR202 100_0402_1%
1
PR201 100_0402_1%
Reverse PD201 PD202
For EMI request
2
+3VALW
BATT_TEMP 44,53
EC_SMB_CK1 44,53
EC_SMB_DA1 44,53
A/D
VBAT
EC_SMCA
EC_SMDA
BATT_TEMP_IN
VBAT_F
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
2
PC201
1000P_0201_50V7-K
1
EMC@
EMC@
PL201
1
2
1
2
PL202
EMC@
1
PC202
0.01U_0201_25V6-K
2
EMC@
BATT+
2S1P BAT +6V
~ 8.4 V
C
B
A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y OF LC FU TU RE C EN TER . AND CO NTAIN S C ON FIDENTIAL
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRAD E SECR ET INFORMATION . THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISC LOSED TO AN Y THIR D PART Y W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
PWR-BATTERY CONN/OTP
PWR-BATTERY CONN/OTP
PWR-BATTERY CONN/OTP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
52 60
52 60
of
of
1
52 60
A
1.0
1.0
1.0
5
4
3
2
1
AON6414AL_DFN8-5
VIN
D D
1
1
2
1000P_0201_50V7-K
C
B
PC330
PC329
2
1000P_0201_50V7-K
EMC_NS@
EMC_NS@
1
1 2
PC332
PC317
2
1000P_0201_50V7-K
1000P_0201_50V7-K
EMC_NS@
EMC_NS@
PC301
470P_0201_50V7-K
PQ311
5
4
1 2
1 2
PR302
4.7_0603_5%
1
PR310
2
4.02K_0603_1%
ADP_I 44
N1
1
2
3
1 2
432K and 64.9k change
to 43k and 6.49k.0.1u
change to 0.01u
decrease ACDET
deassert time
1
PR311
2
4.02K_0603_1%
7.15K_0402_1%
1 2
PR315
0.01U_0201_25V6-K
BQ24780_VDD
ACIN 44
EC_SMB_DA1 44,52
EC_SMB_CK1 44,52
2
1
1 2
PC325
PC324
100P_0201_25V8J
100P_0201_25V8J
AON7408L_DFN8-5
1
2
3
PC302
0.022U_0402_25V7K
1 2
PC309
Psys 59
4
IDCHG
PQ312
5
43K_0402_1%
2
1 2
1
1
1 2
2
1
PC1108
@
+3VALW
VIN
PR313
PR324 100K_0402_1% @
100P_0201_25V8J
N2
2
1
1 2
PR339 20K_0402_1%@
1
PR325 0_0402_5%
2
PR320 0_0402_5% @
2
PR322 0_0402_5% @
PR323 0_0402_5% @
1
316K_0402_1%
JUMP_43X118
PC303
EMC_NS@
10U_0603_25V6-M
1U_0603_25V6K
1U_0603_25V6K
ACDET
1 2
@
EC_SMB_DA1_R
EC_SMB_CK1_R
VR_HOT# 44,59
PR331
@
PJ301
2
112
2
PC304
1
EMC_NS@
10U_0603_25V6-M
1 2
PC307
VIN
BATT+
3
2
PD302
BAT54CW_SOT323-3
1
PR314
10_1206_5%
PC315
1 2
780_VCC
28
ADP_I_R
2
1 2
ILIM_R
1 2
VCC
6
ACDET
BQ24780SRUYR_QFN24_4X4
3
CMSRC
4
ACDRV
ACIN_R
5
ACOK
11
SDA
12
SCL
7
IADP
8
IDCHG
9
PMON
10
PROCHOT#
13
CMPIN
14
CMPOUT
21
ILIM
ILIM
2
@
PR330
0_0402_5%
1
1 2
14.7K_0402_1%
PR332
1
PR333
100K_0402_1%
PC328
need config special
2
appliction
0.1U_0201_25V6-K
PR301
0.01_1206_1%
1
2
0.1U_0201_25V6-K
PC305
1
2
ACP
2
ACP
PU301
TB_STAT#
16
TB_STAT#
ACN
1
ACN
4
3
REGN
HIDRV
PHASE
LODRV
BATDRV
BATSRC
BATPRES#
15
BTST
GND
PAD
SRP
SRN
2
PC306
0.1U_0201_25V6-K
1
BQ24780_VDD
24
BST_CHG
25
DH_CHG
26
LX_CHG
27
DL_CHG
23
22
29
18
17
SRP_R
20
SRN_R
19
BATT_TEMP 44,52
1
PC316 2.2U_0603_10V6-K
PR316
1
2.2_0603_5%
BQ24780_BATDRV
PR328
PR329
2
PC318
1 2
2
0.047U_0603_16V7K
PR338 10_0603_5%
2
1
1
2
10_0603_5%
1
2
10_0603_5%
0.1U_0201_25V6-K
PQ317
AON7408L_DFN8-5
2
1
4
4
1 2
PC312
EMC_NS@
5
3
2
5
3
2
PC327
PQ316
AON7408L_DFN8-5
1
1
0.1U_0201_25V6-K
PC331
1 2
1000P_0201_50V7-K
EMC_NS@
BQ24780_BATDRV
PC310
1 2
2200P_0201_25V7-K
PL302
1 2
2
CHG
SRP
SRN
EMC@
4.7UH_PCMB063T-4R7MS_5.5A_20%
1
1
PR321
4.7_0603_5%
EMC@
2
1
PC321
2200P_0201_25V7-K
2
EMC@
PC313
10U_0805_25V6K
PR303
499K_0402_1%
2
1
PC314
0.01_1206_1%
1
2
2
PC322
1
V20B+
10U_0805_25V6K
PR317
0.1U_0201_25V6-K
1
2
4
PC308
0.01U_0201_25V6-K
1 2
4
3
2
PC323
1
5
AON6764_DFN8-5
PQ314
3
2
1
0.5C charge
PC319
1 2
10U_0805_25V6K
0.1U_0201_25V6-K
V20B+
BATT+
2
1
PC320
10U_0805_25V6K
C
B
A
Title
Title
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
PWR-CHARGER
PWR-CHARGER
PWR-CHARGER
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
53 60
53 60
53 60
of
of
A
1.0
1.0
1.0
5
4
3
2
1
+3VALW
2
PR407
100K_0402_5%
V20B+
@
PJ401
2
112
JUMP_43X79
D D
EC_ON 39,44,55
PR414
1 2
0_0402_5%
@
1
2
EMC@
PC401
1.5A
0.01U_0201_25V6-K
EC_ON_R
1 2
1 2
PC402
PC452
10U_0805_25V6K
10U_0805_25V6K
@
PR415
1 2
0_0402_5%
+3V_VIN
1
1
@
PC408
2
2
0.1U_0201_25V6-K
+3V_VIN
+3VALW_EN
PR401
1M_0402_5%
+3VLP
PU401
5
IN1
4
IN2
3
IN3
2
IN4
7
GND1
8
GND2
18
GND3
21
GND4
12
EN1
11
EN2
10
NC1
15
NC2
NC316LDO
2
SY8286BRAC_QFN20_3X3
@
PJ404
1
2
JUMP_43X39
+3V_PWRGD
9
PG
BS
LX1
LX2
LX3
OUT
FF
1
6
19
20
14
13
17
+3VBS
+3VLX
100mA
1
2
PC403
0.1U_0603_25V7-M
+3VALW_P
+3VALW_FB
+3VLP
1 2
PC409
+3VL
1
1
1
2
1 2
4.7U_0603_6.3V6K
@
PL401
1
2.2UH_PCME063T-2R2MS_8A_20%
PR403
2.2_0805_5%
EMC_NS@
PC410
1200P_0201_25V7-K
EMC_NS@
2
PC411
1
1000P_0201_25V7K
TDC-5A OCP-12A OVP-120%
+3VALW
@
+3VALW_P
1 2
1
2
PC434
22U_0805_6.3V6M
2
1 2
PC432
22U_0805_6.3V6M
1
1K_0402_1%
PR405
1 2
PC435
PC431
22U_0805_6.3V6M
22U_0805_6.3V6M
2
PJ402
2
2
JUMP_43X79
1
1
+3VALW
C
V20B+
EC_ON_R +5VALW_EN
B
PJ405
2
JUMP_43X79
PR409
1
0_0402_5%
@
2.5A
112
1 2
PC412
@
EMC@
2
1
@
2
1 2
1 2
PC414
PC413
10U_0805_25V6K
10U_0805_25V6K
0.01U_0201_25V6-K
1
PC421
PR412
1M_0402_5%
2
0.1U_0201_25V6-K
+5V_VIN
PU402
+5V_VIN
5
IN1
4
IN2
3
IN3
2
IN4
7
GND1
8
GND2
18
GND3
21
GND4
12
EN1
11
EN2
10
NC1
16
NC2
SY8288CRAC_QFN20_3X3
PG
BS
LX1
LX2
LX3
OUT
FF
LDO
VCC
ALW_PWRGD
9
1
+5VBS
6
19
20
+5VALW_OUT
14
13
15
17
+5VVCC
PC416
1U_0603_25V6M
2
PC415
1 2
0.1U_0603_25V7-M
+5VLX
PR410
1 2
0_0402_5%
1
1
2
@
PC422
PR406
100K_0402_5%
1 2
+5VLP
100mA
4.7U_0603_6.3V6K
@
+5VALW_P
ALW_PWRGD 55
improve Vin 6Vļ¼transient performance
PL402
1
2.2UH_PCME063T-2R2MS_8A_20%
1 2
PR411
2.2_0805_5%
EMC_NS@
1 2
PC423
1200P_0201_25V7-K
EMC_NS@
PC424
1 2
+5VFB
1000P_0201_25V7K
TDC-6A OCP-14A OVP-120%
2
1 2
1 2
1 2
PC417
PC418
PC419
22U_0805_6.3V6M
22U_0805_6.3V6M
PR413
1
2
1K_0402_1%
+5VALW_P
1
2
PC420
22U_0805_6.3V6M
22U_0805_6.3V6M
PJ406
2
2
JUMP_43X79
@
+5VALW
1
1
C
B
A
Title
Title
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
6800pf soft start 2ms
5
4
47nf soft start 7ms
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
PWR_3VALW/5VALW
PWR_3VALW/5VALW
PWR_3VALW/5VALW
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
54 60
54 60
54 60
of
of
of
A
1.0
1.0
1.0
5
D D
2
1
SYSON 44
CPU_DRAMPG_CNTL 5
PCH_PWR_EN 44,46
EC_VPP_PWREN 44
C
B
PR501 0_0402_5%@
2
1
PR503 0_0402_5%@
1
2
PR504 1M_0402_5%
1 2
PR506 0_0402_5%
@
+1.8VALW_B_EN
1 2
PR507
@
0_0402_5%
+2.5V_DDR_EN EC_VPP_PWREN
1 2
PR508
@
0_0402_5%
@
0.1u_0201_10V6K
+3VALW
1 2
PR513
R_0402
100K_0402_5%
PC504
1 2
VDDQ_EN
VTT_EN
+1.8VALW_L_EN
+1.0VALW_EN
2
PC505
PC506
1
@
@
0.1u_0201_10V6K
0.1u_0201_10V6K
VDDQ_PGOOD 44
2
1
4
+3VALW
+0.6VS
PC503
@
0.1u_0201_10V6K
1A
+3VALW
+5VLP
PC508
1 2
1 2
@
0.1u_0201_10V6K
2A
+5VALW
PJ500
2
JUMP_43X39
PJ508
2
112
JUMP_43X39
1
2
PC517 10U_0603_10V6K
PJ504
2
2
1
JUMP_43X39
2A
PR515
1 2
33K_0402_1%
PJ502
2
JUMP_43X39
+5VALW
VDDQ_P
@
112
@
@
1
@
@
112
1
10_0603_5%
1 2
10_0402_5%
+1.0VALW_B_VIN
1
2
22U_0603_6.3V6-M
12
+2.5V_DDR_VIN
PR520
PR505
+2.5V_DDR_EN
+1.8VALW_L_EN
+1.0VALW_EN
+1.8VALW_B_EN
VDDQ_EN
VTT_EN
1
2
PC509
+1.8VALW_B_VIN
PC534
22U_0603_6.3V6-M
+1.2V_P
1
2
PC521
1 2
10U_0603_10V6K
PR502
1 2
10_0603_5%
2
1 2
PC510
0.1u_0201_10V6K
EMC_NS@
PC519
22U_0603_6.3V6-M
@
PC500
1 2
2.2U_0603_6.3V6K
PC502
0.1u_0201_10V6K
PU500
29
1
11
16
31
36
7
8
19
38
39
40
30
5
4
PMIC_VCC
EN_LDO1
EN_LDO2
EN_V1P0A
EN_V1P8A
EN_VDDQ
EN_VTT
VIN_V1P0A_7
VIN_V1P0A_8
VIN_V1P8A_19
VIN_VTT
VTT
VSNS_VTT
CS_VDDQ
VIN_LDO1
VIN_LDO2
VSYS_PMIC
28
VSYS
27
VCC
PMIC_EN
9
PMIC_EN
LX_V1P0A_12
LX_V1P0A_13
LX_V1P0A_14
LX_V1P0A_15
LX_V1P8A_17
LX_V1P8A_18
VO_V1P8A_20
LV5075AGQV_VQFN40_5X5
UGATE_VDDQ
BOOT_VDDQ
PHASE_VDDQ
LGATE_VDDQ
VSNS_VDDQ
41
T_ALERT_B
POK_V1P0A
POK_V1P8A
POK_VDDQ
VO_V1P0A
PR500
0_0402_5%
1 2
@
1
PR521 0_0402_5%
PR522
0_0402_5%
1
@
PR523
0_0402_5%
1
@
GND
25
SDA
26
SCL
24
22
21
23
12
13
14
15
+1.0VALW_FB
10
17
18
20
33
BST_VDDQ
32
34
35
37
6
LDO1
PC520 22U_0603_6.3V6-M
3
LDO2
2
FB_LDO2
3
@
PMIC_VCC
2
EC_ON 39,44,54
2
ALW_PWRGD 54
PCH_PWR_EN
2
PMIC_SMB_DAT1
PMIC_SMB_CLK1
PMIC_ALERT#
+1.0VALW_PG
+1.8VALW_B_PG
VDDQ_PGOOD
0.47UH_PCME063T-R47MS_18A_20%
LX_1P0
1
LX_1P8
1UH_PH041H-1R0MS_3.8A_20%
+1.8VALW_FB
UG_VDDQ
LX_VDDQ
LG_VDDQ
+1.2V_P
+2.5V_P
2
1
2
@
1 2
PR510 0_0402_5%
@
1 2
PR511 0_0402_5%
2
PR512 0_0402_5%@
1
1
2
PL500
PL502
1 2
PR1031
PC518
1
2
2
0_0603_5%
0.1U_0603_25V7-M
600mA
PJ503
@
112
+2.5V_DDR
JUMP_43X39
UG_VDDQ
4
LX_VDDQ
LG_VDDQ
4
1
5
321
5
321
PTC501 PAD @
PTC502 PAD @
1
AON7506_DFN
1
2
PC511
1
2
6mA
PQ500
AON7408L_DFN8-5
PQ501
EC_SMB_DA3 44
EC_SMB_CK3 44
H_PROCHOT# 4,44
12
PC512
22U_0603_6.3V6-M
PC535
22U_0603_6.3V6-M
1 2
1
EMC_NS@
2
22U_0603_6.3V6-M
12
4.7_0805_5%
PR518
EMC_NS@
PC533
68P_0402_50V8J
12
12
1
2
PC514
PC513
22U_0603_6.3V6-M
22U_0603_6.3V6-M
obligati on
PC536
22U_0603_6.3V6-M
1
12
PC524
2
EMC@
0.1U_0201_25V6-K
0.68UH_PCMB063T-R68MS_16A_+-20%
1 2
2
TDC-6A OCP-10A OVP-135%
PJ501
+1.0VALW_FB
1
2
PC516
PC515
@
@
+1.8VALW_FB
22U_0603_6.3V6-M
22U_0603_6.3V6-M
12
PC525
10U_0805_25V6K
PL501
@
2
112
JUMP_43X79
PJ509
2
2
JUMP_43X79
VDDQ_P
PC526
10U_0805_25V6K
@
1
2
PC1113
22U_0603_6.3V6-M
+1.0VALW
TDC-2A OCP-6A OVP-135%
@
1
1
+1.8VALW
2A
PJ506
2
1
2
1
V20B+
JUMP_43X39
@
@
1
1
1
2
1
2
2
2
PC527
PC528
PC529
PC530
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
LX_1P0
1
2
1
2
TDC-6A OCP-10A OVP-120%
PJ507
+1.2V_P
2
2
JUMP_43X79
1
@
1
2
PC532
PC531
2
0.1U_0402_25V6
22U_0603_6.3V6-M
22U_0603_6.3V6-M
EMC_NS@
PR1029
4.7_0603_5%
EMC@
PC1109
2200P_0201_25V7-K
EMC@
1
1
LX_1P8
1
2
12
+1.2V
PR1030
4.7_0603_5%
EMC@
PC1110
2200P_0201_25V7-K
EMC@
1
C
B
A
Title
Title
Security Classif ication
Security Classif ication
Security Classif ication
Issued Date
Issued Date
Issued Date
THIS SHE ET O F E NGINEE RING DRAW ING IS THE PROPRI ETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET O F E NGINEE RING DRAW ING IS THE PROPRI ETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET O F E NGINEE RING DRAW ING IS THE PROPRI ETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DI SCLOSE D TO ANY THIRD PARTY W ITHOUT PRI OR W RITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DI SCLOSE D TO ANY THIRD PARTY W ITHOUT PRI OR W RITTEN CONSENT OF LC FUTURE CENTER.
5
4
3
MAY BE USED BY OR DI SCLOSE D TO ANY THIRD PARTY W ITHOUT PRI OR W RITTEN CONSENT OF LC FUTURE CENTER.
2
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2016/08/20
2016/08/20
2016/08/20
Title
PWR PMIC-DDR4/1.0ALW/1.8ALW
PWR PMIC-DDR4/1.0ALW/1.8ALW
PWR PMIC-DDR4/1.0ALW/1.8ALW
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
D
D
D
Date: Sheet
Date: Sheet
Date: Sheet of
1
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
55 60
of
55 60
of
55 60
A
1.0
1.0
1.0
5
D D
4
3
2
1
C
B
A
5
4
Security Classifica tion
Security Classifica tion
Security Classifica tion
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y O F LC F UTU RE CE NT ER. AND C ONTAI NS CO NFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y O F LC F UTU RE CE NT ER. AND C ONTAI NS CO NFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERT Y O F LC F UTU RE CE NT ER. AND C ONTAI NS CO NFIDENTIAL
AND T RADE S ECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND T RADE S ECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND T RADE S ECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSEN T OF LC FUTURE C ENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSEN T OF LC FUTURE C ENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSEN T OF LC FUTURE C ENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
Title
Title
PWR
PWR
PWR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
of
56 60
56 60
of
1
56 60
C
B
A
1.0
1.0
1.0
5
4
3
2
1
D D
0_0402_5%
PR705
@
@
1 2
PC1084
0.1u_0201_10V6K
1U_0402_6.3V6K
1 2
S5_1.35V
2
PR1018
4.7_0402_5%
1
OPT@
500mA
PJ701
+1.8VALW
2
JUMP_43X39
@
112
DGPU_PWROK 22,23,58
C
V20B+
@
PJ703
2
2
JUMP_43X79
B
2A
1
1
1 2
PC1087
EMC@
1
2
PC1090
10U_0805_25V6K
0.1U_0201_25V6-K
OPT@
PR1017 100K_0402_1%
1 2
OPT@
FBVDDQ_PWR_EN 22,24
1
PC701
22U_0603_6.3V6-M
2
OPT@
1
2
PC1088
@
10U_0805_25V6K
+1.05VGS_VIN
EN_VGA 22,23,58
1.35V_B+
S3_1.35V
PR1032
1 2
0_0402_5%
PR1021
1 2
10K_0402_1%
OPT@
OPT@
+3VALW
PJ705
1
2
JUMPER
@
1.35V_GND
+5VALW
1
PC702
2
OPT@
+1.05VGS_EN
1
@
PC706
2
.1U_0402_10V6-K
2
1
PR1019 100K_0402_1%
DDR_3V3
OPT@
1
2
PC1085
1U_0402_6.3V6K
OPT@
1.35V_GND
1.35V_GND
obligation
TP Pin connect to GND
PU701
6
VPP
Mode
2
1
1
2
+3VALW
16
15
12
14
PR1027
0_0402_5%
5
VIN
9
TP
8
VEN
7
POK
@
PR702
100K_0402_5%
PU702
1
VIN
EN1
EN2
PG
OPT@
3
3V3
4
AGND
2
PGND
MODE
@
VO1
VO2
OPT@
ADJ
GND
G971MF11U _SO8
1
NB685GQ-Z_QFN16_3X3
VDDQ
VTTS
VTTREF
OTW#
3
4
2
BST
SW
FB
VTT
+1.05VGS_FB
BST_1.35V
10
9
1.35V_FB
13
1.35V_L
6
5
8
7
VTTREF
11
1
2
OPT@
1.35V_GND
PR706
22.6K_0402_1%
0_0603_5%
1 2
PR1022
LX_1.35V
OPT@
1 2
PC1093
22U_0603_6.3V6-M
PC1095
OPT@
1U_0402_6.3V6K
1
2
OPT@
1
PR707
71.5K_0402_1%
2
OPT@
0.1U_0603_25V7-M
PC1086
1
2
OPT@
1 2
1.35V_SN
EMC_OPTNS@
1
2
EMC_OPTNS@
1
PC708
220P_0201_25V7-K
2
@
0.68UH_PCMB063T-R68MS_16A_+-20%
PL702
1
2
OPT@
@
PC1091
1
2.2_0805_5%
PR1026
PC1092
1200P_0201_25V7-K
2
1M_0402_5%
PR1024
@
PR1023
499_0402_1%
1 2
220P_0201_25V7-K
@
1
2
OPT@
1.35V_FB
1 2
PC703
2
1
OPT@
1
2
OPT@
1.35V_GND
1 2
22U_0603_6.3V6-M
1
2
PC1094
@
22U_0603_6.3V6-M
PR1020
41.2K_0402_1%
PR1028
32.4K_0402_1%
2A
+1.05VGS +1.05VSP_VGA
PJ702
1
2
1
2
JUMP_43X39
@
@
PC704
22U_0603_6.3V6-M
TDC-8A OCP-14A OVP-120%
@
1.35V_L
1
1
2
2
PC1082
22U_0603_6.3V6-M
OPT@
PC1097
PC1083
22U_0603_6.3V6-M
22U_0603_6.3V6-M
OPT@
OPT@
PJ704
2
1
2
1
JUMP_43X118
1
1
2
2
PC1089
22U_0603_6.3V6-M
OPT@
+1.35VGS
C
B
A
Title
Title
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
PWR-+1.05VGS/+1.35V_VRAM
PWR-+1.05VGS/+1.35V_VRAM
PWR-+1.05VGS/+1.35V_VRAM
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
Date: Sheet
Date: Sheet of
Date: Sheet of
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
57 60
57 60
57 60
of
A
1.0
1.0
1.0
5
4
3
2
1
PR835
1
0_0402_5%
2
PR841
0_0402_5%
@
PR818
1 2
0_0402_5%
+VGA_CORE
NVVDD_PWM_VID
PSI_VGA
VSSSENSE_VGA
VCCSENSE_VGA
DGPU_PWROK
@
2
1
@
18K_0402_1%
2700P_0402_50V7-K
+VGA_B+
PC826
2
0.1U_0201_25V6-K
PR831
1
2
100_0402_5%
OPT@
VSSSENSE_VGA
VCCSENSE_VGA
PR832
1 2
100_0402_5%
OPT@
1
PR801
1
OPT@
+3VGS
PC805
OPT@
1
PR811
10K_0402_5%
@
1 2
1
PR814
100K_0402_5%
@
2
2700P_0402_50V7-K
VREF_VGA
OPT@
2
2
PR830
1
2.2_0603_5%
OPT@
PD801
RB751V-40_SOD323-2
OPT@
1
PR817
1 2
0_0402_5%
PC816
1
2
PR804
1
2
20K_0402_1% OPT@
PR802
1 2
2K_0402_1% OPT@
2
frequency change to 300K SIT
PR836
@
1 2
0_0402_5%
PR837
1
0_0402_5%
1 2
@
2
2
@
OPT@
PR839
1
430K_0402_1%
OPT@
VSS_SEN
PC842
1000P_0201_25V7K
@
VCC_SEN
1 2
1 2
2
EN_VGA
PC812
0.1u_0201_10V6K
OPT@
PR803
20K_0402_1%
OPT@
REFIN
PC804
1
OPT@
0.1U_0603_25V7K
2
VREF_VGA
EN_VGA 22,23,57
reserve
PC821
VSS_SEN
+VGA_B+
@
1
2
22U_0603_6.3V6-M
@
10U_0805_25V6K
OPT@
PL802
OPT@
PL801
1
2
1 2
OPT@
PC830
OPT@
PC815
22U_0603_6.3V6-M
10U_0805_25V6K
2
2
1
2
1 2
PJ801
2
JUMP_43X118
1 2
PC831
22U_0603_6.3V6-M
1.5A
1
5
PQ801
AON6372_DFN8-5
4
+5VS
2
3
2
1
PQ802
5
AON6764_DFN8-5
3
2
1
OPT@
4
4
OPT@
OPT@
5
3
5
321
PQ803
AON6372_DFN8-5
OPT@
1
2
PQ804
AON6764_DFN8-5
OPT@
1 2
PR808
2.2_0805_5%
EMC_OPTNS@
1 2
PC809
EMC_OPTNS@
1200P_0201_25V7-K
1
PR824
2
1
PC820
2
VGA_UGATE1
NVVDD_PWM_VID
PR826
@
0_0402_5%
1 2
1 2
@
GPU_VID
PSI_VGA
EN_VGA
VGA_UGATE1
VID
SS
4
PSI
OPT@
VSNS12PGOOD13UGATE2
VCC_SEN
3
EN
DGPU_PWROK
VGA_BOOT1
1
2
BOOT1
UGATE1
PHASE1
LGATE1
PVCC
LGATE2
PHASE2
BOOT2
14
15
RT8812AGQW_WQFN20_3X3
VGA_BOOT2
VGA_UGATE2
2
PR822
10K_0402_1%
OPT@
1
+3VGS
20
19
18
17
16
PU801
10P_0201_25V8G
5
6
REFADJ
7
REFIN
8
VREF
9
TON
10
RGND
GND
21
11
1
PC824
2
OPT@
1000P_0201_25V7K
VGA_PHASE1
VGA_LGATE1
VGA_LGATE2
VGA_PHASE2
VGA_PHASE1
VGA_BOOT1
VGA_LGATE1
PVCC_VGA
VGA_BOOT2
PR807
1 2
0_0603_5%
OPT@
PC810
4.7U_0603_6.3V6K
1
1
0_0402_5%
PR815
VGA_UGATE2
VGA_PHASE2
PR823
1 2
0_0603_5%
OPT@
PC806
1
0.22U_0603_16V7K
OPT@
2
OPT@
2
@
4
2
PC817
1
0.22U_0603_16V7K
VGA_LGATE2
EMC_OPT@
2.2_0805_5%
EMC_OPTNS@
EMC_OPTNS@
1200P_0201_25V7-K
1 2
PC802
PC801
2
10U_0805_25V6K
0.1U_0201_25V6-K
OPT@
OPT@
0.22UH_PCMB063T-R22MS_23A_20%
1 2
OPT@
1.5A
1 2
PC813
EMC_OPT@
0.1U_0201_25V6-K
0.22UH_PCMB063T-R22MS_23A_20%
PC803
10U_0805_25V6K
1 2
PC829
+VGA_B+
PC814
OPT@
1
1
+
2
OPT@
OPT@
V20B+
1
1
+VGA_CORE
1
+
PC808
PC807
2
330U_2.0V_M
330U_2.0V_M
OPT@
1 2
1
PC832
2
PC833
PC834
22U_0603_6.3V6-M
OPT@
22U_0603_6.3V6-M
@
TDC-31A
+VGA_CORE
1
1
+
+
PC818
2
OPT@
PC819
2
330U_2.0V_M
330U_2.0V_M
OPT@
22U_0603_6.3V6-M
NVVDD_PWM_VID 20
PSI_VGA 20
3VGS_PWR_EN 20,22
PXS_PWREN 8,22
VSSSENSE_VGA 21
VCCSENSE_VGA 21
DGPU_PWROK 8,24
pr9446 OPT@
D D
C
B
C
B
A
Title
Title
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
PWR-VGA_CORE
PWR-VGA_CORE
PWR-VGA_CORE
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
58 60
58 60
58 60
of
of
A
1.0
1.0
1.0
5
4
3
2
1
+5VS
+5VS
V20B+
2.2_0603_5%
Psys 53
2
Vcore_COMP
Vcore_ILIM
1 2
2
PC909 1000P_0402_50V7K
Vcore_VSP
Vcore_VSN
Vcore_IOUT
GT_IOUT
1 2
GT_DIFFOUT
2
1
PC908
2
2
GT_TSENSE
PR912
1 2
30.9K_0402_1%
2
1
PC940 1000P_0402_50V7K
2
2
1
PC939 220P_0402_50V7K
PR922
PU901 NCP81206MNTXG_QFN52_6X6
50
41
42
35
30
31
28
29
34
27
1
2
GT_COMP
4
GT_FB
3
51
GT_VSN
52
11
SA_COMP
47
SA_ILIM
46
SA_VSP
49
SA_VSN
48
470P_0402_50V7K
1
1.58K_0402_1%
PC924
.1U_0402_10V6-K
+VCCST_CPU
@
PR944
54.9_0402_1%
1.58K_0402_1%
1 2
PR913
2
1
PR910
PC904 1000P_0402_50V7K
2
1000P_0402_50V7K
1
1
2
PC937
1
@
PR945
2
2.7K_0402_1%
1 2
PR903
2
2
PC931
1000P_0402_50V7K
1
1 2
@
PR946
1K_0402_1%
1K_0402_1%
PR916
1
0_0402_5%
2
1
PC901 15P_0402_50V8J
1K_0402_1%
1
PR911
1 2
470P_0402_50V7K
1 2
PR914
PC907
49.9_0402_1%
1
PR918
1K_0402_1%
1.5K_0402_1%
1
PR965
1 2
PC935 15P_0402_50V8J
3.16K_0402_1%
3.16K_0402_1%
1 2
PR907
PC938 1000P_0402_50V7K
@
2
1500P_0402_50V6-K
1 2
PC902
2
PC906 330P_0402_50V7K
40.2K_0402_1%
470P_0402_50V7K
1 2
PC930
2
25.5K_0402_1%
PR959
1 2
2
0.015U_0402_25V7-K
2
1
2
PC936
1 2
PR966
2
1
20K_0402_1%
1
PR940
VR_EN
18K_0402_1%
PR901
1
470P_0402_50V7K
2
1
PC911
2
1
PR917
Vcore_TSENSE
1
100K_0402_1%
PR902
PR934
2200P_0402_50V7K
1
2
13.7K_0402_1%
1 2
PC932 10P_0402_50V8J
1.5K_0402_1%
1
PR964
1
PC933 2200P_0402_50V7K
1K_0402_1%
1
PR970
D D
EC_VR_ON 44
CPU_VR_READY 44
VR_HOT# 44,53
VCORE_VCC_SEN 12
C
B
VCORE_VSS_SEN 12
1 2
0_0402_5%
1
1 2
PH903
2
100K_0402_1%_NCP15WF104F03RC
PR960
PR963
PC913
1000P_0402_50V7K
1 2
PH902
100K_0402_1%_NCP15WF104F03RC
Place close to MOSFET
VCCGT_VCC_SEN 12
VCCGT_VSS_SEN 12
1
PC934
2
8.25K_0402_1%
.1U_0402_10V6-K
VCCSA_VCC_SEN 13
VCCSA_VSS_SEN 13
1
0_0402_5%
2
1
2
1 2
PR942
1 2
PR931
8.25K_0402_1%
2
2.2_0603_5%
PR926
1
1 2
2
2
1
1
PC916
PC912
2.2U_0603_10V7K
2.2U_0603_10V7K
VR_VCC
VR_PVCC
18
PSYS
PVCC
EN
VR_RDY
VRHOT#
VCORE PORTION
COMP_1a
ILIM_1a
VSP_1a
VSN_1a
IOUT_1a
TSENSE_1ph
VCCGT PORTION
IOUT_2ph
DIFFOUT_2ph/ICCMAX_2ph
COMP_2ph
FB_2ph
VSP_2ph
VSN_2ph
TSENSE_2ph
COMP_1b
VCCSA PORTION
ILIM_1b
VSP_1b
VSN_1b
IOUT_1b
43
SA_Iout
1
1
2
PR958
121K_0402_1%
2
PC929
1
2
VR_VRMP
12
13
VCC
VRMP
PWM/ADDR_VBOOT
EPAD
53
PR923
1K_0402_1%
1
2
SDIO
SCLK
ALERT#
DRON
BST3
LG3/ICCMAX_1b
CSP_1a
CSN_1a
CSSUM_2ph
CSCOMP_2ph
ILIM_2ph
CSREF_2ph
BST1
LG1/ROSC
CSP1_2ph
CSP2_2ph
BST2
LG2/ICCMAX_1a
CSP_1b
CSN_1b
PC920
0.01U_0201_25V6-K
36
38
37
39
26
25
HG3
24
SW3
23
33
32
7
6
5
8
14
15
HG1
16
SW1
17
10
9
40
22
21
HG2
20
SW2
19
44
45
VR_SVID_DAT_1
VR_SVID_CLK_1
VR_SVID_ALRT#_1
PR919
Vcore_BST
1 2
2.2_0603_5%
11K_0402_1%
1
PR941
GT_CSSUM
GT_CSCOMP
PR951
GT_ILIM
1
12.7K_0402_1%
GT_CSREF
GT_BST1
1 2
PR925 2.2_0603_5%
PR954
2
14K_0402_1%
1
22.1K_0402_1%
PR927
SA_BST
1
PR989 2.2_0603_5%
30K_0402_1%
1
SA_CSP
PC910
2
1
0.22U_0603_16V7K
Vcore_HG 60
Vcore_LG 60
2
Vcore_CSP
1 2
PR950 180K_0402_1%
1 2
220K_0402_5%_ERTJ0EV224J
2
2
PC915
GT_HG 60
1
GT_LG 60
1
GT_CSP1
GT_CSP2
2
2
SA_HG 60
2
PR955
SA_LG 60
PC918
1U_0402_6.3V6K
+CPU_CORE
PR949
1 2
105K_0402_1%
10_0402_1%
1
1
PR952
1
0_0402_5%
10_0402_1%
0_0402_5%
2
49.9_0402_1%
2
PR924
PR953
1.8K_0402_1%
VR_SVID_DAT_1
VR_SVID_ALRT#_1
VR_SVID_CLK_1
23.2K_0402_1%
2
1
PR947
22K_0402_1%
Vcore_PH
1
1
2
PH901
GT_PH
0.22U_0603_16V7K
PC925
220P_0402_50V7K
1
2
PC914 330P_0402_50V7K
1
2
PH905
1
2
1
PR948
100K_0402_1%_NCP15WF104F03RC
1
2
PC942 3300P_0402_50V7-K
1 2
PC922 2200P_0402_50V7K
2
PR904
110K_0402_1%
PC917
0.01U_0402_25V7K
1
0.047U_0402_16V7K
2
2
PC926
2
DIS GT one phase
2
PC989
1
SA_PH
0.22U_0603_16V7K
22K_0402_1%
1 2
PR957
1
PC941 6800P_0402_25V7-K
1
PC927 5600P_0402_25V7-K
+VCCST_CPU
1
1
2
PR933
2
45.3_0402_1%
PR936
1 2
PR937
1
PR938
1
Vcore_PH 60
GT_PH 60
+VCC_GT
2
GT_PH
2
+5VS
13K_0402_1%
1
2
PR956
PH904
1
2
100K_0402_1%_NCP15WF104F03RC
2
2
1
2
1
@
PR943
2
75_0402_1%
+VCCSA
PR932
100_0402_1%
VR_SVID_DAT 12
VR_SVID_ALRT# 12
VR_SVID_CLK 12
SA_PH 60
C
B
A
Title
Title
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/08/20
2015/08/20
2015/08/20
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/08/20
2016/08/20
2016/08/20
Title
PWR_CPU_CORE1
PWR_CPU_CORE1
PWR_CPU_CORE1
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet
Date: Sheet of
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
59 60
59 60
59 60
of
A
1.0
1.0
1.0
5
5
Vcore_HG 59
Vcore_PH 59
D D
Vcore_LG 59
C
GT_HG 59
GT_PH 59
GT_LG 59
B
4
4
4
4
5
3
5
321
3
5
3
2
1
1
2
2
1
AON6372_DFN8-5
PQ1005
AON6764_DFN8-5
PQ1006
AON6372_DFN8-5
PQ1001
AON6764_DFN8-5
PQ1002
1 2
1
2
EMC@
PC1001
0.1U_0201_25V6-K
1
PR1002
2.2_0805_5%
EMC_NS@
2
1
PC1026
1000P_0201_25V7K
2
EMC_NS@
EMC@
PR1008
2.2_0805_5%
EMC_NS@
PC1047
1200P_0201_25V7-K
EMC_NS@
1 2
PC1002
0.15UH_PCMB063T-R15MS_30A_20%
PC1032
0.1U_0201_25V6-K
0.15UH_PCMB063T-R15MS_30A_20%
4
PJ1001
CPU_VIN
1
1
2
2
PC1003
10U_0805_25V6K
10U_0805_25V6K
2
JUMP_43X79
1
112
+
2
PC1004
68U_25V_M
@
1
+
PC1107
68U_25V_M
2
@
+CPU_CORE
1
2
PL1001
+CPU_CORE
Vcore_PH
CPU_VIN
1 2
1 2
1
2
PC1033
PC1031
10U_0805_25V6K
10U_0805_25V6K
1
+
2 3
1
EMC@
2
PC1015
PC1078
220U_D2_2VM_R6M
PC1079
0.1U_0201_25V6-K
V20B+
1 2
EMC_NS@
2200P_0201_25V7-K
SA_HG 59
SA_PH 59
SA_LG 59
3
2
1
+CPU_CORE
1
1
1 2
1 2
2
PC1006
PC1005
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1
1
1
@
2
2
2
PC1022
PC1016
22U_0603_6.3V6-M
22U_0603_6.3V6-M
5
PQ1003
4
AON7408L_DFN8-5
3
2
1
5
AON7506_DFN
PQ1004
4
3
2
1
EMC@
PC1027
0.47UH_PCMB063T-R47MS_18A_20%
1
PR1006
2.2_0805_5%
EMC_NS@
2
1
PC1046
1200P_0201_25V7-K
2
EMC_NS@
1
@
2
2
PC1007
PC1008
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1 2
1 2
PC1017
PC1023
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1 2
1
2
PC1028
10U_0805_25V6K
0.1U_0201_25V6-K
1
PL1002
1
1
@
2
2
PC1009
PC1013
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1
1 2
@
2
PC1018
PC1025
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1
2
PC1029
10U_0805_25V6K
2
1 2
PC1112
@
+VCCSA
SA_PH
1 2
1 2
PC1010
22U_0603_6.3V6-M
1 2
PC1024
PC1019
22U_0603_6.3V6-M
2
PC1011
22U_0603_6.3V6-M
1
2
PC1020
22U_0603_6.3V6-M
@
PJ1002
112
JUMP_43X79
1 2
PC1014
PC1012
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1 2
PC1021
22U_0603_6.3V6-M
22U_0603_6.3V6-M
V20B+
+VCCSA
1
2
PC1111
47U_0603_4V6-M
@
1
1
2
PC1036
47U_0603_4V6-M
1
1
1
2
2
2
PC1037
22U_0603_6.3V6-M
22U_0603_6.3V6-M
2
PC1038
PC1039
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1 2
1 2
PC1042
PC1041
PC1040
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
@
+VCC_GT
1
2
PL1003
+VCC_GT
GT_PH
1
1
+
+
PC1045
2
3
2
330U_2.0V_M
1
1 2
2
PC1066
PC1080
PC1081
EMC_NS@
220U_D2_2VM_R6M
0.1U_0402_25V7-K
EMC_NS@
1 2
2200P_0201_25V7-K
1
1
@
@
2
PC1052
22U_0603_6.3V6-M
1 2
2
PC1054
PC1053
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1
1
2
PC1055
22U_0603_6.3V6-M
1
1 2
@
2
2
PC1056
PC1057
PC1058
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1 2
1
2
PC1059
22U_0603_6.3V6-M
1 2
PC1061
PC1060
PC1062
22U_0603_6.3V6-M
22U_0603_6.3V6-M
+VCC_GT
1 2
1 2
PC1063
22U_0603_6.3V6-M
PC1064
22U_0603_6.3V6-M
22U_0603_6.3V6-M
C
B
1 2
A
5
4
3
1
1 2
1 2
@
2
PC1067
PC1068
22U_0603_6.3V6-M
22U_0603_6.3V6-M
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
1
2
PC1069
PC1070
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1
2
PC1071
22U_0603_6.3V6-M
2015/08/20
2015/08/20
2015/08/20
1
1 2
@
2
PC1073
PC1072
22U_0603_6.3V6-M
PC1074
22U_0603_6.3V6-M
22U_0603_6.3V6-M
LC Future Center Secr et Data
LC Future Center Secr et Data
LC Future Center Secr et Data
Deciphered Date
Deciphered Date
Deciphered Date
1 2
1
1
@
2
2
PC1077
PC1076
PC1075
22U_0603_6.3V6-M
2
22U_0603_6.3V6-M
22U_0603_6.3V6-M
A
Title
Title
2016/08/20
2016/08/20
2016/08/20
Title
PWR_CPU_CORE2
PWR_CPU_CORE2
PWR_CPU_CORE2
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Thursday, July 14, 2016
Thursday, July 14, 2016
Thursday, July 14, 2016
CG413
CG413
CG413
1
60 60
60 60
60 60
1.0
1.0
1.0
of
of
of