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NM-A181 ZX10 AILZC
Schematic
62 pgs1.04 Mb1

Compal NM-A181 ZX10 AILZA, IdeaPad Z410, IdeaPad Z510, NM-A181 ZX10 AILZB, NM-A181 ZX10 AILZC Schematic

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A
1 1
B
C
D
E
LCFC Confidential
AILZA/B/C (ZX10)
MB MA181 Schematics
2 2
nVIDIA N14P-GV2
2012-12-27
3 3
4 4
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
A
B
REV:1.1
Issued Date
Issued Date
Issued Date
2012/12/14
2012/12/14
2012/12/14
C
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2012/12/21
2012/12/21
2012/12/21
D
Title
Title
Title
Cover Page
Cover Page
Cover Page
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
401025
401025
401025
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of
of
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161
161
161
1.1
1.1
1.1
A
LCFC confidential
File Name : ZX10
B
PCI-Express 8X Gen3
C
D
E
1 1
N14P-GV2
Page 23,24,25,26,27,32
VRAM 128*16/256*16
DDR3*4
Page 28,29
HDMI Conn.
Edp Conn.
Int. Camera
USB 2.0 Port 0
2 2
Int. MIC Conn.
Page 34 Page 34
Touch Screen
USB 2.0 Port 8
SPI ROM (4MB+2MB)
Page 17
eDP
USB 2.0 1x
USB 2.0 1x
SPI BUS
Intel CPU Haswell 37W/47W
rPGA-947
37.5mm*37.5mm
Page 5,6,7,8,9,10
DMI *4 5GT/s
Intel PCH Lynx point HM86
695 ball FCBGA
FDI *2
20mm*20mm
RJ45 Conn.
3 3
Transform
Page 38Page 38
LAN Realtek RTL8106E/8111G(S)
Page 37
Page 36
PCIe Port 4
CRT Conn.
Sub-board ( for 14")
POWERBOARD
Codec ALC282-CG
Page 43
SPK Conn. (1.5W x 2)
USBBoard
PCIe 1x
VGA
HD Audio
Page 13,14,15,16,17,18,19,20,21,22
LPC BUS
Page 43
Memory BUS (DDR3L) Dual Channel
1.35V DDR3L 1333/1600 MT/s
USB 2.0 2x
USB 3.0 2x
PCIe 1x
USB 2.0 1x
USB 2.0 1x
USB 2.0 1x
SATA Gen3 Port 2
SATA Gen3 Port 4
USB Left
USB 2.0 Port 1 USB 3.0 Port 1 USB 2.0 Port 2 USB 3.0 Port 2
PCIeMini Card WLAN&BT
PCIe Port 5 USB 2.0 Port 10
USB right
USB 2.0 Port 5
Cardreader Genesys GL834L
USB 2.0 Port 4
SATA ODD
SATA Port 2
SATA HDD
SATA Port 4
DDR3-SO-DIMM X2
UP TO 16G
Page 41
Page 40
SD/MMC Conn.
Page 42
Page 42
Page 11,12
USBBoard
Page 45
EC
HP&Mic Combo Conn.
Sub-board ( for 15")
POWERBOARD
USBBoard
4 4
iphone type
USBBoard
Page 45
Touch Pad Int.KBD
ITE ITE8586 128LQFP
Page 44
Thermal Sensor
Page 45 Page 45 Page 39
EMC 1403
LEDBoard
Title
Title
ODDBoard
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
2012/12/21
2012/12/21
2012/12/21
Title
Block Diagram
Block Diagram
Block Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
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261
261
261
1.1
1.1
1.1
A
B
C
D
E
Voltage Rails
Power Plane
1 1
State
S0
S3
2 2
S3 Battery only
S5 S4/AC Only
S5 S4 Battery only
S5 S4 AC & Battery don't exist
( O --> Means ON , X --> Means OFF )
+3VALW
B+
+5VALW
O
+3V_PCH
OO O
O
O
O X
O
O
O
XX
XX
+1.35V
OO
X
O
X
O
O
O
X
X
X
+5VS +3VS +1.5VS +1.05VS
+0.675VS +CPU_CORE
+VGA_CORE +3.3VS_VGA +1.5VS_VGA
+1.05VS_VGA
X
X
X
X
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SIGNAL
USB Port Table
USB 3.0USB 2.0 Port
XHCI
1
EHCI1
2
EHCI2
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
HIGH HIGH HIGH HIGH
LOW
LOW
LOW
LOW LOW LOW LOW
3 External USB Port
0
Camera
1
USB Port (Left Side)
2
USB Port (Left Side)
3
Cardreader
4 5
USB Port (Right Side)
6
HIGH
LOWLOWLOW
HIGHHIGHHIGH
HIGH
HIGH
ON
ON
ON
ON
ON
ONONON ON
ON
ON
OFF
OFF
OFF
OFF
OFF
LOW
OFF
OFF
OFF
7
TOUCH PANEL
8 9
Mini Card(WLAN)
10 11 12 13
BOM Structure Table
BTO ItemBOM Structure
AOAC@ OPT@ UMA@
14@ 15@
8106@ 8111G@ 8111GS@ N14PGV2@ GIGA@ Gastube@ NOTS@ GC6@ TS@ @ ME@ XDP@ 37@ 47@ H2@ M2@ M4@ S2@ S4@ M1GB@ M2GB@ S1GB@ S2GB@ H1GB@
AOAC support part
External GPU SKU ID part UMA SKU ID part For Z410 part
For Z510 part
8106E LAN part 8111G LAN Part 8111GS LAN Part N14P GV2 stuff
GIGA LAN Part
Gastube Part No Touch screen part GPU GC6 function part
Touch screen part Not stuff Connector XDP part 37W CPU part 47W CPU part Hynix 2Gb Vram part Micron 2Gb Vram part Micron 4Gb Vram part Samsung 2Gb Vram part Samsung 4Gb Vram part Micron 1GB Vram BOM Micron 2GB Vram BOM samsung 1GB Vram BOM samsung 2GB Vram BOM hynix 1GB Vram BOM
PCIE PORT LIST
SMBUS Control Table
3 3
EC_SMB_DA1
EC_SMB_CK2 EC_SMB_DA2
PCH_SMBCLK PCH_SMBDATA
EC SM Bus1 address
4 4
Device
Smart Battery Charger
SOURCE
IT8586EEC_SMB_CK1
+3VALW
IT8586E
+3VS
+3V_PCH +3VS +3VS
VGA BATT SODIMM
X
X
V
+3VS_VGA
PCH
XXX X
IT8586E
V
V
+3VS +3VS
EC SM Bus2 address
Device
0001 011X b 0001 0010 b
A
Thermal Sensor EMC1403-2
VGA PCH
WLAN
Thermal
WiMAX
Sensor
XXV
X
X
VV
Address
1001_101xb 0x9E 0x96
V
X
V
+3V_PCH
+3V_PCH
PCH SM Bus address
Device Address
DDR DIMMA DDR DIMMB Wlan TP
B
PCH
TP Module
XX
V
X
V
+3VS
charger
V
X
X
0xA0 0xA2 Rsvd 0x2C for Synaptics
0x15 for ELAN vendor
XDP
+3VS
X
X
V
Port Device
1 2 3 4
LAN
5
WLAN
6 7 8
C
PCIE 3
PCIE 3
FixedSignals
PCIE
PCIE
4
5
PCIE
PCIE
4
5
2012/12/21
2012/12/21
2012/12/21
PCIE 6
PCIE 6
*
FixedSignals
USB3
USB3
1
2
HM86
USB3
USB3
1
2012/12/14
2012/12/14
2012/12/14
2
HM87 QM87
SoftStrap:(USB3P4_PCIEP2_MODE) 00:PCIeLane2isstaticallyassignedtoPCIEExpress(orGbE) 01:PCIeLane2isstaticallyassignedtoUSB3Port4
SoftStrap:(USB3P3_PCIEP1_MODE) 00:PCIeLane1isstaticallyassignedtoPCIEExpress(orGbE) 01:PCIeLane1isstaticallyassignedtoUSB3Port3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MuxedSignals
NA PCIE
NA NA NA
USB3
USB3
5
6
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
PCIE
1
2
(00)
(00)
USB3
USB3
3
4
(01) (0b) (0b)
(01)
PCIE
PCIE
1
2
USB3
USB3
4
5
Deciphered Date
Deciphered Date
Deciphered Date
D
SATA 6Gb/s 5
PCIE 2
SATA 6Gb/s 5 PCIE 3
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
SATA 3Gb/s 0
SATA 6Gb/s 0
FixedSignals
SATA 6Gb/s 1
GPIO16,49
11
00PCIE1,PECI2
401025
401025
401025
E
SATA 3Gb/s 2
SATA 3Gb/s 2
MuxedSignals
PCIE
PCIE
SATA
7
8
6Gb/s 4
(1b) (1b)
PCIE 1
PCIE
PCIE
SATA
7
8
6Gb/s 4 PCIE 2
Config
SATA4,SATA5
Title
Title
Title
Notes List
Notes List
Notes List
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
SATA 3Gb/s 3
361
361
361
1.1
1.1
1.1
of
of
of
5
4
3
2
1
VGA and GDDR3 Voltage Rails (N14P GPIO)
GPIO I/O ACTIVE Function Description
D D
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10
C C
GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19
IN FB Clamp monitor­OUT
N/A
OUT
N/A
OUT
N/A
OUT
N/A N/A
-
OUT OUT
N/A
I/O
­I/O N/A OUT
N/A
IN OUT IN
N/A
IN
N/A
OUT
N/A
IN
N/A
IN
N/A
IN
N/A
Active low FB Clamp toggle request
Thermal Catastrophic Over Temperature
2.2K Pull-up
GPU Core VDD PWM control signal-OUT AC Power Detect Input Phase Shedding-
(10K pull High)
Performance Mode P0 TDP at Tj = 102 C* (DDR3)
GPU Mem NVCLK (4) (1,5) (6)
(W) (W) (MHz)
Products
N14P 64bit
25W TBD 32 TBD 1.7 2.55 TBD TBD 1.98 2.1 TBD TBD TBD TBD TBD TBD 1GB/2GB DDR3
Physical Strapping pin
ROM_SCLK ROM_SI ROM_SO FB[0] STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
GPU
Power Rail
+3VS_VGA +3VS_VGA +3VS_VGA +3VS_VGA +3VS_VGA +3VS_VGA +3VS_VGA +3VS_VGA
Device ID
/MCLK NVVDD
(V) (A) (W) (A) (W)
1000MHz TBD
Logical Strapping Bit3
PCI_DEVID[4]
FB[1]
3GIO_PAD_CFG_ADR[2] 3GIO_PAD_CFG_ADR[1]3GIO_PAD_CFG_ADR[3] PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0] SOR3_EXPOSED
RESERVED PCIE_SPEED_
SMB_ALT_ADDR
(ROM_SO Bit 1)
setting
N14P-GV2 0x1292
ROM_SO ROM_SCLKGPU STRAP2STRAP1STRAP0
ROM_SI
N14P-GV2 PD 45.3K
TBD PU 4.99K PU 45.3K
PU 45.3KPU 4.99K PD 15K
FBVDDQ PCI Express I/O and
FBVDD
(GPU+Mem) (1.5V)(1.5V)
(A) (W) (W)(A) (W) (W) (W)(mA) (mA) (mA)
Logical Strapping Bit2
SUB_VENDOR
USER[2] USER[1] USER[0]USER[3]
SOR2_EXPOSED SOR1_EXPOSED
CHANGE_GEN3
I2C Slave addrees ID
0
1
0x9E
0x9C
(1.05V)
Logical Strapping Bit1
PCI_DEVID5] RAM_CFG[1]RAM_CFG[3] RAM_CFG[2]
PLLVDD
I/O and PLLVDD
Logical Strapping Bit0
PEX_PLL_EN_TERM RAM_CFG[0]
VGA_DEVICESMB_ALT_ADDR
3GIO_PAD_CFG_ADR[0]
SOR0_EXPOSED
PCIE_MAX_SPEED DP_PLL_VDD33V
(Default)
STRAP3
STRAP4
PD 4.99K
Other (3.3V)(1.05V)(1.8V)
B B
A A
5
+3VS_VGA
+VGA_CORE
+1.5VS_VGA
+1.05VS_VGA
Other Power rail
+3VS_VGA
tNVVDD >0
tFBVDDQ >0
tPEX_VDD >0
1. all power rail ramp up time should be larger than 40us
Tpower-off <10ms
1.all GPU power rails should be turned off within 10ms
2. Optimus system VDD33 avoids drop down earlier than NVDD and FBVDDQ
4
GPU
FB Memory (DDR3)
Samsung 1GHz
Micron 1GMHz
Hynix 1GMHz
Samsung 900MHz
Micron 900MHz
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
K4W2G1646E-BC1A
128M x 16
MT41J128M16JT-093G:K
128M x 16
128M x 16
K4W4G1646B-HC11
256M x 16
MT41K256M16HA-107G:E
256M x 16
Issued Date
Issued Date
Issued Date
2012/12/14
2012/12/14
2012/12/14
N14P_GV2
ROM_SI
0x7 PD 45.3K
0x5 PD 30.1K
0x4H5TC2G63FFR-11C PD 24.9K
0x3 PD 20K
0x1 PD 10K
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
Title
Title
VGA Notes List
VGA Notes List
VGA Notes List
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
401025
401025
401025
1
of
of
of
461
461
461
1.1
1.1
1.1
5
4
3
2
+VCCIOA_OUT
1
D D
JCPU1A
DMI_CRX_PTX_N015 DMI_CRX_PTX_N115 DMI_CRX_PTX_N215 DMI_CRX_PTX_N315
DMI_CRX_PTX_P015 DMI_CRX_PTX_P115 DMI_CRX_PTX_P215 DMI_CRX_PTX_P315
DMI_CTX_PRX_N015 DMI_CTX_PRX_N115 DMI_CTX_PRX_N215 DMI_CTX_PRX_N315
DMI_CTX_PRX_P015 DMI_CTX_PRX_P115 DMI_CTX_PRX_P215
C C
FDI_CSYNC15 FDI_INT15
B B
DMI_CTX_PRX_P315
1 2
RC2 0_0402_5%@
1 2
RC3 0_0402_5%@
Change RC2,RC3 to 0ohm jump
DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3
DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3
DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3
DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3
FDI_CSYNC_R FDI_INT_R
D21
DMI_RXN_0
C21
DMI_RXN_1
B21
DMI_RXN_2
A21
DMI_RXN_3
D20
DMI_RXP_0
C20
DMI_RXP_1
B20
DMI_RXP_2
A20
DMI_RXP_3
D18
DMI_TXN_0
C17
DMI_TXN_1
B17
DMI_TXN_2
A17
DMI_TXN_3
D17
DMI_TXP_0
C18
DMI_TXP_1
B18
DMI_TXP_2
A18
DMI_TXP_3
H29
FDI_CSYNC
J29
DISP_INT
FOX_PZ94726-3641-41H_HASWELL
ME@
Haswell rPGA EDS
FDIDMI
1 OF 9
PEG
PEG_RCOMP
PEG_RXN_0 PEG_RXN_1 PEG_RXN_2 PEG_RXN_3 PEG_RXN_4 PEG_RXN_5 PEG_RXN_6 PEG_RXN_7 PEG_RXN_8
PEG_RXN_9 PEG_RXN_10 PEG_RXN_11 PEG_RXN_12 PEG_RXN_13 PEG_RXN_14 PEG_RXN_15
PEG_RXP_0
PEG_RXP_1
PEG_RXP_2
PEG_RXP_3
PEG_RXP_4
PEG_RXP_5
PEG_RXP_6
PEG_RXP_7
PEG_RXP_8
PEG_RXP_9 PEG_RXP_10 PEG_RXP_11 PEG_RXP_12 PEG_RXP_13 PEG_RXP_14 PEG_RXP_15
PEG_TXN_0
PEG_TXN_1
PEG_TXN_2
PEG_TXN_3
PEG_TXN_4
PEG_TXN_5
PEG_TXN_6
PEG_TXN_7
PEG_TXN_8
PEG_TXN_9 PEG_TXN_10 PEG_TXN_11 PEG_TXN_12 PEG_TXN_13 PEG_TXN_14 PEG_TXN_15
PEG_TXP_0
PEG_TXP_1
PEG_TXP_2
PEG_TXP_3
PEG_TXP_4
PEG_TXP_5
PEG_TXP_6
PEG_TXP_7
PEG_TXP_8
PEG_TXP_9 PEG_TXP_10 PEG_TXP_11 PEG_TXP_12 PEG_TXP_13 PEG_TXP_14 PEG_TXP_15
E23
PEG_COMP
M29
PCIE_CRX_GTX_N0
K28
PCIE_CRX_GTX_N1
M31
PCIE_CRX_GTX_N2
L30
PCIE_CRX_GTX_N3
M33
PCIE_CRX_GTX_N4
L32
PCIE_CRX_GTX_N5
M35
PCIE_CRX_GTX_N6
L34
PCIE_CRX_GTX_N7
E29
PCIE_CRX_GTX_N8
D28
PCIE_CRX_GTX_N9
E31
PCIE_CRX_GTX_N10
D30
PCIE_CRX_GTX_N11
E35
PCIE_CRX_GTX_N12
D34
PCIE_CRX_GTX_N13
E33
PCIE_CRX_GTX_N14
E32
PCIE_CRX_GTX_N15
L29
PCIE_CRX_GTX_P0
L28
PCIE_CRX_GTX_P1
L31
PCIE_CRX_GTX_P2
K30
PCIE_CRX_GTX_P3
L33
PCIE_CRX_GTX_P4
K32
PCIE_CRX_GTX_P5
L35
PCIE_CRX_GTX_P6
K34
PCIE_CRX_GTX_P7
F29
PCIE_CRX_GTX_P8
E28
PCIE_CRX_GTX_P9
F31
PCIE_CRX_GTX_P10
E30
PCIE_CRX_GTX_P11
F35
PCIE_CRX_GTX_P12
E34
PCIE_CRX_GTX_P13
F33
PCIE_CRX_GTX_P14
D32
PCIE_CRX_GTX_P15
H35
PCIE_CTX_GRX_N0
H34
PCIE_CTX_GRX_N1
J33
PCIE_CTX_GRX_N2
H32
PCIE_CTX_GRX_N3
J31
PCIE_CTX_GRX_N4
G30
PCIE_CTX_GRX_N5
C33
PCIE_CTX_GRX_N6
B32
PCIE_CTX_GRX_N7
B31
PCIE_CTX_GRX_N8
A30
PCIE_CTX_GRX_N9
B29
PCIE_CTX_GRX_N10
A28
PCIE_CTX_GRX_N11
B27
PCIE_CTX_GRX_N12
A26
PCIE_CTX_GRX_N13
B25
PCIE_CTX_GRX_N14
A24
PCIE_CTX_GRX_N15
J35
PCIE_CTX_GRX_P0
G34
PCIE_CTX_GRX_P1
H33
PCIE_CTX_GRX_P2
G32
PCIE_CTX_GRX_P3
H31
PCIE_CTX_GRX_P4
H30
PCIE_CTX_GRX_P5
B33
PCIE_CTX_GRX_P6
A32
PCIE_CTX_GRX_P7
C31
PCIE_CTX_GRX_P8
B30
PCIE_CTX_GRX_P9
C29
PCIE_CTX_GRX_P10
B28
PCIE_CTX_GRX_P11
C27
PCIE_CTX_GRX_P12
B26
PCIE_CTX_GRX_P13
C25
PCIE_CTX_GRX_P14
B24
PCIE_CTX_GRX_P15
PCIE_CRX_GTX_N[0..15] 23
PCIE_CRX_GTX_P[0..15] 23
1 2
CC1 0.22U_0402_10V6K@
1 2
CC2 0.22U_0402_10V6K@
1 2
CC3 0.22U_0402_10V6K@
1 2
CC4 0.22U_0402_10V6K@
1 2
CC5 0.22U_0402_10V6K@
1 2
CC6 0.22U_0402_10V6K@
1 2
CC7 0.22U_0402_10V6K@
1 2
CC8 0.22U_0402_10V6K@
1 2
CC9 0.22U_0402_10V6KOPT@
1 2
CC10 0.22U_0402_10V6KOPT@
1 2
CC11 0.22U_0402_10V6KOPT@
1 2
CC12 0.22U_0402_10V6KOPT@
1 2
CC13 0.22U_0402_10V6KOPT@
1 2
CC14 0.22U_0402_10V6KOPT@
1 2
CC15 0.22U_0402_10V6KOPT@
1 2
CC16 0.22U_0402_10V6KOPT@
1 2
CC17 0.22U_0402_10V6K@
1 2
CC18 0.22U_0402_10V6K@
1 2
CC19 0.22U_0402_10V6K@
1 2
CC20 0.22U_0402_10V6K@
1 2
CC21 0.22U_0402_10V6K@
1 2
CC22 0.22U_0402_10V6K@
1 2
CC23 0.22U_0402_10V6K@
1 2
CC24 0.22U_0402_10V6K@
1 2
CC25 0.22U_0402_10V6KOPT@
1 2
CC26 0.22U_0402_10V6KOPT@
1 2
CC27 0.22U_0402_10V6KOPT@
1 2
CC28 0.22U_0402_10V6KOPT@
1 2
CC29 0.22U_0402_10V6KOPT@
1 2
CC30 0.22U_0402_10V6KOPT@
1 2
CC31 0.22U_0402_10V6KOPT@
1 2
CC32 0.22U_0402_10V6KOPT@
PCIE_CTX_C_GRX_N0 PCIE_CTX_C_GRX_N1 PCIE_CTX_C_GRX_N2 PCIE_CTX_C_GRX_N3 PCIE_CTX_C_GRX_N4 PCIE_CTX_C_GRX_N5 PCIE_CTX_C_GRX_N6 PCIE_CTX_C_GRX_N7 PCIE_CTX_C_GRX_N8 PCIE_CTX_C_GRX_N9 PCIE_CTX_C_GRX_N10 PCIE_CTX_C_GRX_N11 PCIE_CTX_C_GRX_N12 PCIE_CTX_C_GRX_N13 PCIE_CTX_C_GRX_N14 PCIE_CTX_C_GRX_N15 PCIE_CTX_C_GRX_P0 PCIE_CTX_C_GRX_P1 PCIE_CTX_C_GRX_P2 PCIE_CTX_C_GRX_P3 PCIE_CTX_C_GRX_P4 PCIE_CTX_C_GRX_P5 PCIE_CTX_C_GRX_P6 PCIE_CTX_C_GRX_P7 PCIE_CTX_C_GRX_P8 PCIE_CTX_C_GRX_P9 PCIE_CTX_C_GRX_P10 PCIE_CTX_C_GRX_P11 PCIE_CTX_C_GRX_P12 PCIE_CTX_C_GRX_P13 PCIE_CTX_C_GRX_P14 PCIE_CTX_C_GRX_P15
PEG_COMP
CADNote: Tracewidth=12mils,Spacing=15mil Maxlength=400mils.
PEG Static Lane Reversal - CFG2 is for the 16x
CFG2
1 2
RC1 24.9_0402_1%
1: Normal Operation; Lane # definition matches socket pin map definition
*
0:Lane Reversed
PCIE_CTX_C_GRX_N[0..15] 23
PCIE_CTX_C_GRX_P[0..15] 23
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
CPU (1/7) DMI, FDI, PEG
CPU (1/7) DMI, FDI, PEG
CPU (1/7) DMI, FDI, PEG
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
1
of
of
of
561
561
561
1.1
1.1
1.1
5
4
3
2
1
+1.05VS
1 2
RC4 0_0603_5%@
D D
.1U_0402_10V6-K
ReserveforDesignGuideandCRBrecommended.
Buffered Reset to CPU
C C
CPU_PLTRST#19
1.05V
RC22 0_0402_5%@
1 2
Change RC22 to 0ohm jump
B B
+3V_PCH
SM_DRAMPWROKwithDDRPowerGatingTopology
+3VALW
PM_DRAM_PWRGD15
RC79 0_0402_5%@ RC78 0_0402_5%@
SYS_PWROK15,44
VDDQ_PGOOD44,55
RC77
RC39
.01U_0402_16V7-K
Change RC77 to 0ohm jump
A A
CC33
@
12 12
RC35
0_0402_5%
1 2
@
0_0402_5%
@
1 2
10K_0402_5%
CC40
+VCCST
1
1
CC34
4.7U_0603_6.3V6K
@
2
2
H_PROCHOT#44,51,52
CLK_CPU_DPLL#16 CLK_CPU_DPLL16 CLK_CPU_SSC_DPLL#16 CLK_CPU_SSC_DPLL16
BUF_CPU_RST#
ForESDconcern,pleaseputnearCPU
ForESD
+3VDRAM
200_0402_5%
100K_0402_5%
12
12
RC32
RC31
@
@
@
12
1
@
2
CC37
5
1
P
B
2
A
G
3
74AHC1G09GW_TSSOP5
@
RC41 0_0402_5%
RUN_ON_CPU1.5VS3#10
+VCCIO_OUT
12
RC7
62_0402_5%
H_PM_SYNC15 H_CPUPWRGD19
Change RC11,RC13,RC15,RC16,RC17 to 0ohm jump
1
CC35 220P_0402_50V7K
2
@
1 2
@
.1U_0402_10V6-K
4
Y
UC1
12
2
G
+VCCST
1 2
RC9 56_0402_5%
1 2
RC11 0_0402_5%@
1 2
RC13 0_0402_5%@
1 2
RC15 0_0402_5%@
1 2
RC16 0_0402_5%@
1 2
RC17 0_0402_5%@
CLK_CPU_DMI#16 CLK_CPU_DMI16
1
CC36 220P_0402_50V7K
2
@
+1.35V_CPU_VDDQ
RC42
39_0402_5%
@
1 2 13
D
QC2
@
S
2N7002KW_SOT323-3
PAD@
1
TC81
H_PECI44
H_THRMTRIP#19
H_PM_SYNC VCCPWRGOOD_0_R PM_DRAM_PWRGD_CPU BUF_CPU_RST#
CPU_DPLL# CPU_DPLL CPU_SSC_DPLL# CPU_SSC_DPLL CLK_CPU_DMI# CLK_CPU_DMI
SSCCLOCKTERMINATION,IFNOTUSED,stuffRC25,RC27
12
RC33
1.8K_0402_1%
@
1 2
RC36
0_0402_5%
Change RC36 to 0ohm jump
12
RC40
3.3K_0402_1%
H_CATERR# H_PECI
H_PROCHOT#_R H_THRMTRIP#
PM_DRAM_PWRGD_CPURUNPWROK_AND
AP32
AN32 AR27
AK31 AM30 AM35
AT28
AL34 AC10
AT26
G28 H28 F27 E27 D26 E26
+VCCIO_OUT
@
RC25 10K_0402_5%
@
RC27 10K_0402_5%
JCPU1B
SKTOCC CATERR
PECI FC_AK31 PROCHOT THERMTRIP
PM_SYNC PWRGOOD SM_DRAMPWROK PLTRSTIN
DPLL_REF_CLKN DPLL_REF_CLKP SSC_DPLL_REF_CLKN SSC_DPLL_REF_CLKP BCLKN BCLKP
FOX_PZ94726-3641-41H_HASWELL
ME@
12
CPU_SSC_DPLLVCCPWRGOOD_0_RBUF_CPU_RST#
12
CPU_SSC_DPLL#
Haswell rPGA EDS
MISC
THERMAL CLOCK
PWR
DRAMRST_CNTRL_PCH17
DRAMRST_CNTRL7
DRAMRST_CNTRL_EC44
2 OF 9
AP3
SM_RCOMP_0 SM_RCOMP_1
DDR3L
SM_RCOMP_2 SM_DRAMRST
PRDY PREQ
TCK TMS
TRST
JTAG
TDO DBR
BPM_N_0 BPM_N_1 BPM_N_2 BPM_N_3 BPM_N_4 BPM_N_5 BPM_N_6 BPM_N_7
CADNote: AvoidstubinthePWRGDpath whileplacingresistorsRC11&RC26
RC37 0_0402_5%
RC38 0_0402_5%
AR3 AP2 AN3
AR29 AT29 AM34 AN33 AM33 AM31
TDI
AL33 AP33
AR30 AN31 AN29 AP31 AP30 AN28 AP29 AP28
4.99K_0402_1%
@
1 2
1 2
@
SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 H_DRAMRST#
XDP_PRDY# XDP_PREQ# XDP_TCLK XDP_TMS XDP_TRST# XDP_TDI_R XDP_TDO_R XDP_DBRESET#_R
XDP_BPM0 XDP_BPM1 XDP_BPM2 XDP_BPM3 XDP_BPM4 XDP_BPM5 XDP_BPM6 XDP_BPM7
RC34
ReserveforDeepS3
@
@ @ @ @ @ @ @ @
VCCPWRGOOD_0_R
12
RC26 10K_0402_5%
@
1 2
DRAMRST_CNTRL
1
1 1 1 1 1 1 1 1
S
RC28 0_0402_5%@
G
TC59
PAD
TC61
PAD
TC60
PAD
TC4
PAD
TC5
PAD
TC6
PAD
TC7
PAD
TC8
PAD
TC9
PAD
Change RC28 to 0ohm jump
1 2
D
13
DDR3_DRAMRST#_RH_DRAMRST#
QC1 2N7002KW_SOT323-3
@
2
1
CC39
0.047U_0402_16V7K
@
2
+1.35V
DDR3COMPENSATIONSIGNALS
SM_RCOMP0 SM_RCOMP1 SM_RCOMP2
CADNote: Tracewidth=12~15mil,Spcing=20mils Maxtracelength=500mil
1 2
RC5 100_0402_1%
1 2
RC6 75_0402_1%
1 2
RC8 100_0402_1%
PU/PDforJTAGsignals
1
CC38 .1U_0402_10V6-K
@
2
12
12 12 12 12
12 12
DDR3_DRAMRST# 11,12
XDP_DBRESET#_R
XDP_TMS XDP_TDI_R XDP_PREQ# XDP_TDO_R
XDP_TCLK XDP_TRST#
12
RC29 1K_0402_5%
@
RC30
1 2
1K_0402_5%
@
RC14 1K_0402_1%
RC18 51_0402_1%@ RC19 51_0402_1%@ RC20 51_0402_1%@ RC21 51_0402_1%@
RC23 51_0402_1%@ RC24 51_0402_1%@
+3VS
+1.05VS
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
CPU (2/7) PM, XDP, CLK
CPU (2/7) PM, XDP, CLK
CPU (2/7) PM, XDP, CLK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
1
of
of
of
661
661
661
1.1
1.1
1.1
5
4
3
2
1
Haswell rPGA EDS
@
1
TC10 PAD
DDRA_CLK0#11 DDRA_CLK011 DDRA_CKE011 DDRA_CLK1#11
D D
C C
B B
DDRA_CLK111 DDRA_CKE111
DDRA_CS0#11 DDRA_CS1#11
DDRA_ODT011 DDRA_ODT111
DDRA_BS0#11 DDRA_BS1#11 DDRA_BS2#11
DDRA_RAS#11 DDRA_WE#11 DDRA_CAS#11
DDRA_MA[0..15]11
DDRA_DQS#[0..7]11
DDRA_DQS[0..7]11
DDRA_MA0 DDRA_MA1 DDRA_MA2 DDRA_MA3 DDRA_MA4 DDRA_MA5 DDRA_MA6 DDRA_MA7 DDRA_MA8 DDRA_MA9 DDRA_MA10 DDRA_MA11 DDRA_MA12 DDRA_MA13 DDRA_MA14 DDRA_MA15
DDRA_DQS#0 DDRA_DQS#1 DDRA_DQS#2 DDRA_DQS#3 DDRA_DQS#4 DDRA_DQS#5 DDRA_DQS#6 DDRA_DQS#7 DDRA_DQS0 DDRA_DQS1 DDRA_DQS2 DDRA_DQS3 DDRA_DQS4 DDRA_DQS5 DDRA_DQS6 DDRA_DQS7 +VREF_CA_R
JCPU1C
AC7
RSVD27
U4
SA_CKN0
V4
SA_CKP0
AD9
SA_CKE_0
U3
SA_CKN1
V3
SA_CKP1
AC9
SA_CKE_1
U2
SA_CKN2
V2
SA_CKP2
AD8
SA_CKE_2
U1
SA_CKN3
V1
SA_CKP3
AC8
SA_CKE_3
M7
SA_CS_N_0
L9
SA_CS_N_1
M9
SA_CS_N_2
M10
SA_CS_N_3
M8
SA_ODT_0
L7
SA_ODT_1
L8
SA_ODT_2
L10
SA_ODT_3
V5
SA_BS_0
U5
SA_BS_1
AD1
SA_BS_2
V10
VSS330
U6
SA_RAS
U7
SA_WE
U8
SA_CAS
V8
SA_MA_0
AC6
SA_MA_1
V9
SA_MA_2
U9
SA_MA_3
AC5
SA_MA_4
AC4
SA_MA_5
AD6
SA_MA_6
AC3
SA_MA_7
AD5
SA_MA_8
AC2
SA_MA_9
V6
SA_MA_10
AC1
SA_MA_11
AD4
SA_MA_12
V7
SA_MA_13
AD3
SA_MA_14
AD2
SA_MA_15
AP15
SA_DQS_N_0
AP8
SA_DQS_N_1
AJ8
SA_DQS_N_2
AF3
SA_DQS_N_3
J3
SA_DQS_N_4
E2
SA_DQS_N_5
C5
SA_DQS_N_6
C11
SA_DQS_N_7
AP14
SA_DQS_P_0
AP9
SA_DQS_P_1
AK8
SA_DQS_P_2
AG3
SA_DQS_P_3
H3
SA_DQS_P_4
E3
SA_DQS_P_5
C6
SA_DQS_P_6
C12
SA_DQS_P_7
FOX_PZ94726-3641-41H_HASWELL
ME@
SA_DIMM_VREFDQ SB_DIMM_VREFDQ
3 OF 9
SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8
SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63
SM_VREF
AR15 AT14 AM14 AN14 AT15 AR14 AN15 AM15 AM9 AN9 AM8 AN8 AR9 AT9 AR8 AT8 AJ9 AK9 AJ6 AK6 AJ10 AK10 AJ7 AK7 AF4 AF5 AF1 AF2 AG4 AG5 AG1 AG2 J1 J2 J5 H5 H2 H1 J4 H4 F2 F1 D2 D3 D1 F3 C3 B3 B5 E6 A5 D6 D5 E5 B6 A6 E12 D12 B11 A11 E11 D11 B12 A12 AM3 F16 F13
DDRA_DQ0 DDRA_DQ1 DDRA_DQ2 DDRA_DQ3 DDRA_DQ4 DDRA_DQ5 DDRA_DQ6 DDRA_DQ7 DDRA_DQ8 DDRA_DQ9 DDRA_DQ10 DDRA_DQ11 DDRA_DQ12 DDRA_DQ13 DDRA_DQ14 DDRA_DQ15 DDRA_DQ16 DDRA_DQ17 DDRA_DQ18 DDRA_DQ19 DDRA_DQ20 DDRA_DQ21 DDRA_DQ22 DDRA_DQ23 DDRA_DQ24 DDRA_DQ25 DDRA_DQ26 DDRA_DQ27 DDRA_DQ28 DDRA_DQ29 DDRA_DQ30 DDRA_DQ31 DDRA_DQ32 DDRA_DQ33 DDRA_DQ34 DDRA_DQ35 DDRA_DQ36 DDRA_DQ37 DDRA_DQ38 DDRA_DQ39 DDRA_DQ40 DDRA_DQ41 DDRA_DQ42 DDRA_DQ43 DDRA_DQ44 DDRA_DQ45 DDRA_DQ46 DDRA_DQ47 DDRA_DQ48 DDRA_DQ49 DDRA_DQ50 DDRA_DQ51 DDRA_DQ52 DDRA_DQ53 DDRA_DQ54 DDRA_DQ55 DDRA_DQ56 DDRA_DQ57 DDRA_DQ58 DDRA_DQ59 DDRA_DQ60 DDRA_DQ61 DDRA_DQ62 DDRA_DQ63
+V_DDR_REFA_R +V_DDR_REFB_R
DDRA_DQ[0..63] 11
+VREF_CA_R
@
1
TC11 PAD
DDRB_CLK0#12 DDRB_CLK012 DDRB_CKE012 DDRB_CLK1#12 DDRB_CLK112 DDRB_CKE112
DDRB_CS0#12 DDRB_CS1#12
DDRB_ODT012 DDRB_ODT112
DDRB_BS0#12 DDRB_BS1#12 DDRB_BS2#12
DDRB_RAS#12 DDRB_WE#12 DDRB_CAS#12
DDRB_MA[0..15]12
DDRB_DQS#[0..7]12
DDRB_DQS[0..7]12
DDRB_MA0 DDRB_MA1 DDRB_MA2 DDRB_MA3 DDRB_MA4 DDRB_MA5 DDRB_MA6 DDRB_MA7 DDRB_MA8 DDRB_MA9 DDRB_MA10 DDRB_MA11 DDRB_MA12 DDRB_MA13 DDRB_MA14 DDRB_MA15
DDRB_DQS#0 DDRB_DQS#1 DDRB_DQS#2 DDRB_DQS#3 DDRB_DQS#4 DDRB_DQS#5 DDRB_DQS#6 DDRB_DQS#7 DDRB_DQS0 DDRB_DQS1 DDRB_DQS2 DDRB_DQS3 DDRB_DQS4 DDRB_DQS5 DDRB_DQS6 DDRB_DQS7
AG8
Y4
AA4
AF10
Y3
AA3
AG10
Y2 AA2 AG9
Y1 AA1 AF9
P4
R2
P3
P1
R4
R3
R1
P2
R7
P8 AA9
R10
R6
P6
P7
R8
Y5
Y10
AA5
Y7 AA6
Y6 AA7
Y8
AA10
R9
Y9 AF7
P9 AA8 AG7
AP18 AP11
AP5
AJ3
L3
H9
C8 C14
AP17 AP12
AP6 AK3
M3
H8
C9 C15
FOX_PZ94726-3641-41H_HASWELL
ME@
JCPU1D
RSVD28 SB_CKN0 SB_CKP0 SB_CKE_0 SB_CKN1 SB_CKP1 SB_CKE_1 SB_CKN2 SB_CKP2 SB_CKE_2 SB_CKN3 SB_CKP3 SB_CKE_3
SB_CS_N_0 SB_CS_N_1 SB_CS_N_2 SB_CS_N_3
SB_ODT_0 SB_ODT_1 SB_ODT_2 SB_ODT_3 SB_BS_0 SB_BS_1 SB_BS_2
VSS331 SB_RAS SB_WE SB_CAS
SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14 SB_MA_15
SB_DQS_N_0 SB_DQS_N_1 SB_DQS_N_2 SB_DQS_N_3 SB_DQS_N_4 SB_DQS_N_5 SB_DQS_N_6 SB_DQS_N_7 SB_DQS_P_0 SB_DQS_P_1 SB_DQS_P_2 SB_DQS_P_3 SB_DQS_P_4 SB_DQS_P_5 SB_DQS_P_6 SB_DQS_P_7
Haswell rPGA EDS
4 OF 9
SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8
SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63
AR18 AT18 AM17 AM18 AR17 AT17 AN17 AN18 AT12 AR12 AN12 AM11 AT11 AR11 AM12 AN11 AR5 AR6 AM5 AM6 AT5 AT6 AN5 AN6 AJ4 AK4 AJ1 AJ2 AM1 AN1 AK2 AK1 L2 M2 L4 M4 L1 M1 L5 M5 G7 J8 G8 G9 J7 J9 G10 J10 A8 B8 A9 B9 D8 E8 D9 E9 E15 D15 A15 B15 E14 D14 A14 B14
DDRB_DQ0 DDRB_DQ1 DDRB_DQ2 DDRB_DQ3 DDRB_DQ4 DDRB_DQ5 DDRB_DQ6 DDRB_DQ7 DDRB_DQ8 DDRB_DQ9 DDRB_DQ10 DDRB_DQ11 DDRB_DQ12 DDRB_DQ13 DDRB_DQ14 DDRB_DQ15 DDRB_DQ16 DDRB_DQ17 DDRB_DQ18 DDRB_DQ19 DDRB_DQ20 DDRB_DQ21 DDRB_DQ22 DDRB_DQ23 DDRB_DQ24 DDRB_DQ25 DDRB_DQ26 DDRB_DQ27 DDRB_DQ28 DDRB_DQ29 DDRB_DQ30 DDRB_DQ31 DDRB_DQ32 DDRB_DQ33 DDRB_DQ34 DDRB_DQ35 DDRB_DQ36 DDRB_DQ37 DDRB_DQ38 DDRB_DQ39 DDRB_DQ40 DDRB_DQ41 DDRB_DQ42 DDRB_DQ43 DDRB_DQ44 DDRB_DQ45 DDRB_DQ46 DDRB_DQ47 DDRB_DQ48 DDRB_DQ49 DDRB_DQ50 DDRB_DQ51 DDRB_DQ52 DDRB_DQ53 DDRB_DQ54 DDRB_DQ55 DDRB_DQ56 DDRB_DQ57 DDRB_DQ58 DDRB_DQ59 DDRB_DQ60 DDRB_DQ61 DDRB_DQ62 DDRB_DQ63
DDRB_DQ[0..63] 12
DRAMRST_CNTRL6
+VREF_DQ_DIMMA_R +VREF_DQ_DIMMB_R
A A
5
4
Change RC43,RC44 to 0ohm jump
DRAMRST_CNTRL
2N7002KW_SOT323-3
RC43 0_0402_5%@ RC44 0_0402_5%@
2N7002KW_SOT323-3
DRAMRST_CNTRL
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
QC3
1 3
D
1 2 1 2
1 3
D
QC4
3
2
G
@
S
+V_DDR_REFA_R +V_DDR_REFB_R
12
S
@
G
2
2012/12/14
2012/12/14
2012/12/14
RC45
1K_0402_1%
@
12
RC46 1K_0402_1%
@
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
Title
Title
CPU (3/7) DDRIII
CPU (3/7) DDRIII
CPU (3/7) DDRIII
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
1
of
of
of
761
761
761
1.1
1.1
1.1
5
4
3
2
1
+VCCIO_OUT
2
G
12
RC47 10K_0402_5%
1 2
13
D
S
+VCCIOA_OUT
RC4924.9_0402_1%
EDP_HPD_IN#
QC5 2N7002KW_SOT323-3
HPDINVERSIONFOREDP
D D
HDMI D2 HDMI D1 HDMI D0 HDMI CLK
@
1 2
PCH_PWROK15,44
C C
RC50
6.04K_0402_1%
HDMI_TX2-35 HDMI_TX1-35 HDMI_TX0-35 HDMI_CLK-35
VCCST_PWRGD
12
RC75
2.67K_0402_1%
@
HDMI_TX2+35 HDMI_TX1+35 HDMI_TX0+35 HDMI_CLK+35
HDMI_TX2­HDMI_TX2+ HDMI_TX1­HDMI_TX1+ HDMI_TX0­HDMI_TX0+ HDMI_CLK­HDMI_CLK+
JCPU1H
T28
DDIB_TXN0
U28
DDIB_TXP0
T30
DDIB_TXN1
U30
DDIB_TXP1
U29
DDIB_TXN2
V29
DDIB_TXP2
U31
DDIB_TXN3
V31
DDIB_TXP3
T34
DDIC_TXN0
U34
DDIC_TXP0
U35
DDIC_TXN1
V35
DDIC_TXP1
U32
DDIC_TXN2
T32
DDIC_TXP2
U33
DDIC_TXN3
V33
DDIC_TXP3
P29
DDID_TXN0
R29
DDID_TXP0
N28
DDID_TXN1
P28
DDID_TXP1
P31
DDID_TXN2
R31
DDID_TXP2
N30
DDID_TXN3
P30
DDID_TXP3
FOX_PZ94726-3641-41H_HASWELL
ME@
Haswell rPGA EDS
DDI
eDP
EDP_AUXN
EDP_AUXP
EDP_HPD
EDP_RCOMP
EDP_DISP_UTIL
EDP_TXN_0 EDP_TXP_0 EDP_TXN_1 EDP_TXP_1
FDI_TXN_0 FDI_TXP_0 FDI_TXN_1 FDI_TXP_1
8 OF 9
M27 N27 P27 E24 R27
P35 R35 N34 P34 P33 R33 N32 P32
CPU_EDP_AUX# CPU_EDP_AUX EDP_HPD_IN# EDP_COMP
CPU_EDP_TX0­CPU_EDP_TX0+ CPU_EDP_TX1­CPU_EDP_TX1+ FDI_CTX_PRX_N0 FDI_CTX_PRX_P0 FDI_CTX_PRX_N1 FDI_CTX_PRX_P1
CPU_EDP_AUX# 34 CPU_EDP_AUX 34
1
PAD@
TC12
CPU_EDP_TX0- 34 CPU_EDP_TX0+ 34 CPU_EDP_TX1- 34 CPU_EDP_TX1+ 34 FDI_CTX_PRX_N0 15 FDI_CTX_PRX_P0 15 FDI_CTX_PRX_N1 15 FDI_CTX_PRX_P1 15
CPU_EDP_HPD34
12
RC48
100K_0402_5%
COMPENSATIONPUFOReDP
EDP_COMP
CADNote:Tracewidth=20mils,Spacing=25mil, Maxlength=100mils.
ReserveforDesignGuideandCRBrecommended.
CFG3
Haswell rPGA EDS
9 OF 9
12
RC192 1K_0402_1%
@
C23
RSVD_TP12
B23
RSVD_TP13
D24
RSVD_TP14
D23
RSVD_TP15
AT31
CFG_RCOMP
CFG_16 CFG_18 CFG_17 CFG_19
RSVD4 FC_G6 RSVD5 RSVD6 RSVD7 RSVD8
RSVD9 RSVD10 RSVD11
RSVD12
RSVD13
RSVD_TP16 RSVD_TP17
RSVD_TP18
VSS318 VSS319
VSS320 VSS321
NC
AR21 AR23 AP21 AP23
AR33 G6 AM27 AM26 F5 AM2 K6
E18 U10
P10 B1
A2 AR1
E21 E20
AP27 AR26
AL31 AL32
CFG_RCOMPCFG2 CFG16 CFG18 CFG17 CFG19
VCCST_PWRGD
PHYSICAL_DEBUG_ENABLED(DFXPRIVACY)
0:ENABLED
CFG3
SETDFXENABLEDBITINDEBUG INTERFACEMSR
1:DISABLED
*
1
PAD@
TC18
1
PAD@
TC19
1
PAD@
TC20
1
PAD@
TC16
1
PAD@
TC25
1
PAD@
TC29
1
PAD@
TC24
1
PAD@
TC27
1
PAD@
TC31
1
PAD@
TC33
1
PAD@
TC35
1
PAD@
TC36
1
PAD@
TC38
1
PAD@
TC40
1
PAD@
TC41
1
PAD@
TC44
1
PAD@
TC46
1
PAD@
TC50
1
PAD@
TC52
1
PAD@
TC55
1
PAD@
TC57
CFG[6:5]
*
CFG5 CFG6
12
RC51 1K_0402_1%
@
12
RC52 1K_0402_1%
PCIEPortBifurcationStraps 11:(Default)x16‐Device1functions1and2disabled 10:x8,x8‐Device1function1enabled;function2
disabled 01:Reserved‐(Device1function1disabled;function 2enabled)
00:x8,x4,x4‐Device1functions1and2enabled
12
RC55 1K_0402_1%
@
PEGDEFERTRAINING
1:(Default)PEGTrainimmediately
*
CFG7
followingxxRESETBdeassertion
0:PEGWaitforBIOSfortraining
NeedconfirmwithIntelifthisreservedcircuitcanbedeleted.
JCPU1I
1
PAD @
CFGSTRAPSforCPU
12
RC53 1K_0402_1%@
B B
A A
PEGStaticLaneReversal‐CFG2isforthe16x
1:(Default)NormalOperation;Lane#
*
CFG2
definitionmatchessocketpinmapdefinition
0:LaneReversed
CFG4 CFG7
12
RC54 1K_0402_1%
DisplayPortPresenceStrap
1:Disabled;NoPhysicalDisplayPort
CFG4
attachedtoEmbeddedDisplayPort
0:Enabled;AnexternalDisplayPortdeviceis
*
connectedtotheEmbeddedDisplayPort
TC13
1
PAD @
TC14
1
PAD @
TC15
1
PAD @
TC21
1
PAD @
TC22
1
PAD @
TC17
1
PAD @
TC23
1
PAD @
TC26
1
PAD @
TC28
TC30 TC32
TC34 TC37
TC39
TC56 TC58
TC43 TC45 TC47 TC48 TC49 TC51 TC53 TC54
RC56 49.9_0402_1% RC57 49.9_0402_1% RC58 49.9_0402_1%
1 1
1 1
1
1 1
1 1 1 1 1 1 1 1
PAD @ PAD @
PAD @ PAD @
PAD @
PAD @ PAD @
PAD @ PAD @ PAD @ PAD @ PAD @ PAD @ PAD @ PAD @
+VCC_CORE
12 12 12
H_CPU_TESTLO_G26
H_CPU_TESTLO_W34
H_CPU_TESTLO_G26 H_CPU_TESTLO_W34 CFG_RCOMP
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15
AT1
RSVD_TP1
AT2
RSVD_TP2
AD10
RSVD1
A34
RSVD_TP3
A35
RSVD_TP4
W29
RSVD_TP5
W28
RSVD_TP6
G26
TESTLO_G26
W33
VSS317
AL30
RSVD2
AL29
RSVD3
F25
VCC104
C35
RSVD_TP7
B35
RSVD_TP8
AL25
RSVD_TP9
W30
RSVD_TP10
W31
RSVD_TP11
W34
TESTLO_W34
AT20
CFG_0
AR20
CFG_1
AP20
CFG_2
AP22
CFG_3
AT22
CFG_4
AN22
CFG_5
AT25
CFG_6
AN23
CFG_7
AR24
CFG_8
AT23
CFG_9
AN20
CFG_10
AP24
CFG_11
AP26
CFG_12
AN25
CFG_13
AN26
CFG_14
AP25
CFG_15
FOX_PZ94726-3641-41H_HASWELL
ME@
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
CPU (4/7) RSVD,CFG
CPU (4/7) RSVD,CFG
CPU (4/7) RSVD,CFG
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
1
of
of
of
861
861
861
1.1
1.1
1.1
5
4
3
2
1
Haswell rPGA EDS
JCPU1E
D D
CC49 .1U_0402_10V6-K
CC50 .1U_0402_10V6-K
75_0402_1%
RC66
130_0402_1%
+1.05VS
12
RC67 150_0402_1%
CPU_PWR_DEBUG#
12
RC68 10K_0402_5%
@
+VCCIO_OUT
+VCCIO_OUT
12
RC76
12
+VCCIO_OUT
+VCCIO2PCH
RC65 43_0402_5%
+1.05VS
1 2
RC63 0_0603_5%@
1 2
RC64 0_0603_5%@
C C
VR_SVID_ALRT#59 VR_SVID_CLK59 VR_SVID_DAT59
B B
TC65 TC64 TC66 TC67
1 2
1 2
TC68 TC69
TC70
TC71
TC72 TC73 TC74 TC75
1 2
TC76 TC77 TC78 TC79
1 1 1 1
@
@
1 1
1
1
1 1 1 1
CPU_PWR_DEBUG#
1 1 1 1
PAD @ PAD @ PAD @ PAD @
PAD @ PAD @
PAD @
PAD @
PAD @ PAD @ PAD @ PAD @
PAD @ PAD @ PAD @ PAD @
+1.35V_CPU_VDDQ+1.35V
+VCC_CORE
VCCSENSE_R
+VCCIO_OUT
+VCCIO2PCH
+VCCIOA_OUT
VR_SVID_ALRT#_R VR_SVID_CLK VR_SVID_DAT
+VCC_CORE
needconnecttopower
K27
RSVD15
L27
RSVD16
T27
RSVD17
V27
RSVD18
AB11
VDDQ1
AB2
VDDQ2
AB5
VDDQ3
AB8
VDDQ4
AE11
VDDQ5
AE2
VDDQ6
AE5
VDDQ7
AE8
VDDQ8
AH11
VDDQ9
K11
VDDQ10
N11
VDDQ11
N8
VDDQ12
T11
VDDQ13
T2
VDDQ14
T5
VDDQ15
T8
VDDQ16
W11
VDDQ17
W2
VDDQ18
W5
VDDQ19
W8
VDDQ20
N26
RSVD19
K26
VCC103
AL27
RSVD20
AK27
RSVD21
AL35
VCC_SENSE
E17
RSVD22
AN35
VCCIO_OUT
A23
FC_A23
F22
VCOMP_OUT
W32
RSVD23
AL16
RSVD24
J27
RSVD25
AL13
RSVD26
AM28
VIDALERT
AM29
VIDSCLK
AL28
VIDSOUT
AP35
VSS317
H27
PWR_DEBUG
AP34
VSS318
AT35
RSVD_TP19
AR35
RSVD_TP20
AR32
IVR_ERROR
AL26
IST_TRIGGER
AT34
VSS319
AL22
VSS320
AT33
VSS321
AM21
VSS322
AM25
VSS323
AM22
VSS324
AM20
VSS325
AM24
VSS326
AL19
VSS327
AM23
VSS328
AT32
VSS329
Y25
VCC1
Y26
VCC2
Y27
VCC3
Y28
VCC4
Y29
VCC5
Y30
VCC6
Y31
VCC7
Y32
VCC8
Y33
VCC9
Y34
VCC10
Y35
VCC11
FOX_PZ94726-3641-41H_HASWELL
ME@
5 OF 9
VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96
VCC97 VCC98 VCC99
VCC100 VCC101
VCC102
AA26 AA28 AA34 AA30 AA32 AB26 AB29 AB25 AB27 AB28 AB30 AB31 AB33 AB34 AB32 AC26 AB35 AC28 AD25 AC30 AD28 AC32 AD31 AC34 AD34 AD26 AD27 AD29 AD30 AD32 AD33 AD35 AE26 AE32 AE28 AE30 AG28 AG34 AE34 AF25 AF26 AF27 AF28 AF29 AF30 AF31 AF32 AF33 AF34 AF35 AG26 AH26 AH29 AG30 AG32 AH32 AH35 AH25 AH27 AH28 AH30 AH31 AH33 AH34 AJ25 AJ26 AJ27 AJ28 AJ29 AJ30 AJ31 AJ32 AJ33 AJ34 AJ35 G25 H25 J25 K25 L25 M25 N25 P25 R25 T25
U25 U26 V25 V26
W26 W27
+VCC_CORE
+1.35V_CPU_VDDQ
VCC_SENSE
VCCSENSE59
VSSSENSE59
VDDQDECOUPLING
10U_0603_6.3V6M
1
2
22U_0805_6.3V6M
1
2
CC51
CC63
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
CC52
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
CC64
2
2
+VCC_CORE
12
RC59 100_0402_1%
CADNote:RC59SHOULDBEPLACEDCLOSETOCPU
12
VCCSENSE VCCSENSE_R
@
RC600_0402_5%
CADNote:RC62SHOULDBEPLACEDCLOSETOCPU
12
VSSSENSE VSSSENSE_R
CC53
CC65
12
RC62 100_0402_1%
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
1
CC55
CC54
2
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
CC66
1
CC67
2
2
1
2
@
RC800_0402_5%
Change RC60,RC61 to 0ohm jump
10U_0603_6.3V6M
CC57
CC69
10U_0603_6.3V6M
1
1
CC58
CC59
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
CC71
CC70
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CC56
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
CC68
2
VSSSENSE_R 10
Power
@
10U_0603_6.3V6M
330U_2.5V_M
1
CC61
1
+
CC60
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
CC73
CC72
2
2
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
CPU (5/7) PWR, BYPASS
CPU (5/7) PWR, BYPASS
CPU (5/7) PWR, BYPASS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
401025
401025
401025
1
961
961
961
of
of
of
1.1
1.1
1.1
5
Haswell rPGA EDS
JCPU1F
A10
VSS1
A13
VSS2
A16
VSS3
A19
VSS4
A22
VSS5
A25
VSS6
A27
VSS7
A29
VSS8
A3
VSS9
A31
VSS10
A33
VSS11
A4
D D
C C
B B
VSS12
A7
VSS13
AA11
VSS14
AA25
VSS15
AA27
VSS16
AA31
VSS17
AA29
VSS18
AB1
VSS19
AB10
VSS20
AA33
VSS21
AA35
VSS22
AB3
VSS23
AC25
VSS24
AC27
VSS25
AB4
VSS26
AB6
VSS27
AB7
VSS28
AB9
VSS29
AC11
VSS30
AD11
VSS31
AC29
VSS32
AC31
VSS33
AC33
VSS34
AC35
VSS35
AD7
VSS36
AE1
VSS37
AE10
VSS38
AE25
VSS39
AE29
VSS40
AE3
VSS41
AE27
VSS42
AE35
VSS43
AE4
VSS44
AE6
VSS45
AE7
VSS46
AE9
VSS47
AF11
VSS48
AF6
VSS49
AF8
VSS50
AG11
VSS51
AG25
VSS52
AE31
VSS53
AG31
VSS54
AE33
VSS55
AG6
VSS56
AH1
VSS57
AH10
VSS58
AH2
VSS59
AG27
VSS60
AG29
VSS61
AH3
VSS62
AG33
VSS63
AG35
VSS64
AH4
VSS65
AH5
VSS66
AH6
VSS67
AH7
VSS68
AH8
VSS69
AH9
VSS70
AJ11
VSS71
AJ5
VSS72
AK11
VSS73
AK25
VSS74
AK26
VSS75
AK28
VSS76
AK29
VSS77
AK30
VSS78
AK32
VSS79
E19
VSS80
FOX_PZ94726-3641-41H_HASWELL
ME@
For Deep S3
+3VALW
12
RC70
100K_0402_5%
QC8
2
G
@
RUN_ON_CPU1.5VS3#
13
D
@
S
@
RC73
SUSP40,46,55
A A
CPU1.5V_S3_GATE44
5
1 2
0_0402_5%
2N7002KW_SOT323-3
6 OF 9
2
G
4
AK34
VSS81
AK5
VSS82
AL1
VSS83
AL10
VSS84
AL11
VSS85
AL12
VSS86
AL14
VSS87
AL15
VSS88
AL17
VSS89
AL18
VSS90
AL2
VSS91
AL20
VSS92
AL21
VSS93
AL23
VSS94
E22
VSS95
AL3
VSS96
AL4
VSS97
AL5
VSS98
AL6
VSS99
AL7
VSS100
AL8
VSS101
AL9
VSS102
AM10
VSS103
AM13
VSS104
AM16
VSS105
AM19
VSS106
E25
VSS107
AM32
VSS108
AM4
VSS109
AM7
VSS110
AN10
VSS111
AN13
VSS112
AN16
VSS113
AN19
VSS114
AN2
VSS115
AN21
VSS116
AN24
VSS117
AN27
VSS118
AN30
VSS119
AN34
VSS120
AN4
VSS121
AN7
VSS122
AP1
VSS123
AP10
VSS124
AP13
VSS125
AP16
VSS126
AP19
VSS127
AP4
VSS128
AP7
VSS129
W25
VSS130
AR10
VSS131
AR13
VSS132
AR16
VSS133
AR19
VSS134
AR2
VSS135
AR22
VSS136
AR25
VSS137
AR28
VSS138
AR31
VSS139
AR34
VSS140
AR4
VSS141
AR7
VSS142
AT10
VSS143
AT13
VSS144
AT16
VSS145
AT19
VSS146
AT21
VSS147
AT24
VSS148
AT27
VSS149
AT3
VSS150
AT30
VSS151
AT4
VSS152
AT7
VSS153
B10
VSS154
B13
VSS155
B16
VSS156
B19
VSS157
B2
VSS158
B22
VSS159
+VSB
RC69 need to check on SDV
12
RC69 100K_0402_5%
@
RUN_ON_CPU1.5VS3
13
D
QC6 2N7002KW_SOT323-3
S
@
RUN_ON_CPU1.5VS3# 6
4
3
+1.35V_CPU_VDDQ
J1
2
112
JUMP_43X79
+1.35V +1.35V_CPU_VDDQ
QC9
1 2
470K_0402_5%
12
RC74 470K_0402_5%
@
1 2
CC74 .1U_0402_10V6-K@
1 2
CC75 .1U_0402_10V6-K@
1 2
CC76 .1U_0402_10V6-K@
1 2
CC77 .1U_0402_10V6-K@
8 7 6 5
4
@
RC72
@
AO4304L Vgs=10V,Id=18A, Rds<6.7m ohm P/N: SB00000RV00
1
CC78 .01U_0402_16V7-K
@
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
AO4456_SO8
1 2 3
3
+1.35V_CPU_VDDQ+1.35V
12
RC71 470_0603_5%
@
13
D
QC7
S
2N7002KW_SOT323-3
@
2012/12/14
2012/12/14
2012/12/14
2
SUSP
G
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Haswell rPGA EDS
JCPU1G
B34
VSS160
B4
VSS161
B7
VSS162
C1
VSS163
C10
VSS164
C13
VSS165
C16
VSS166
C19
VSS167
C2
VSS168
C22
VSS169
C24
VSS170
C26
VSS171
C28
VSS172
C30
VSS173
C32
VSS174
C34
VSS175
C4
VSS176
C7
VSS177
D10
VSS178
D13
VSS179
D16
VSS180
D19
VSS181
D22
VSS182
D25
VSS183
D27
VSS184
D29
VSS185
D31
VSS186
D33
VSS187
D35
VSS188
D4
VSS189
D7
VSS190
E1
VSS191
E10
VSS192
E13
VSS193
E16
VSS194
E4
VSS195
E7
VSS196
F10
VSS197
F11
VSS198
F12
VSS199
F14
VSS200
F15
VSS201
F17
VSS202
F18
VSS203
F20
VSS204
F21
VSS205
F23
VSS206
F24
VSS207
F26
VSS208
F28
VSS209
F30
VSS210
F32
VSS211
F34
VSS212
F4
VSS213
F6
VSS214
F7
VSS215
F8
VSS216
F9
VSS217
G1
VSS218
G11
VSS219
G2
VSS220
G27
VSS221
G29
VSS222
G3
VSS223
G31
VSS224
G33
VSS225
G35
VSS226
G4
VSS227
G5
VSS228
H10
VSS229
H26
VSS230
H6
VSS231
H7
VSS232
J11
VSS233
J26
VSS234
J28
VSS235
J30
VSS236
J32
VSS237
J34
VSS238
J6
VSS239
K1
VSS240
FOX_PZ94726-3641-41H_HASWELL
ME@
Deciphered Date
Deciphered Date
Deciphered Date
7 OF 9
2
VSS_SENSE
2
VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285 VSS286 VSS287 VSS288 VSS289 VSS290 VSS291 VSS292 VSS293 VSS294 VSS295 VSS296 VSS297 VSS298 VSS299 VSS300 VSS301 VSS302 VSS303 VSS304 VSS305 VSS306 VSS307 VSS308 VSS309 VSS310 VSS311 VSS312 VSS313 VSS314 VSS315 VSS316
RSVD14
2012/12/21
2012/12/21
2012/12/21
K10 K2 K29 K3 K31 K33 K35 K4 K5 K7 K8 K9 L11 L26 L6 M11 M26 M28 M30 M32 M34 M6 N1 N10 N2 N29 N3 N31 N33 N35 N4 N5 N6 N7 N9 P11 P26 P5 R11 R26 R28 R30 R32 R34 R5 T1 T10 T29 T3 T31 T33 T35 T4 T6 T7 T9 U11 U27 V11 V28 V30 V32 V34 W1 W10 W3 W35 W4 W6 W7 W9 Y11 H11 AL24 F19 T26 AK35 AK33
1
1
PAD@
TC80
Title
Title
Title
CPU (6/7) PWR
CPU (6/7) PWR
CPU (6/7) PWR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
VSSSENSE_R 9
401025
401025
401025
1
of
of
of
10 61
10 61
10 61
1.1
1.1
1.1
5
4
3
2
1
DDR3 SO-DIMM A
+VREF_DQ_DIMMA_R
D D
1
CD1 .1U_0402_10V6-K
2
12
RD4
24.9_0402_1%
For EMC
C C
B B
A A
RD2
1 2
@
0_0402_5%
+1.35V
12
RD1 1K_0402_1%
+VREF_DQ_DIMMA
12
RD31K_0402_1%
CD2
DDRA_CKE07
DDRA_BS2#7
DDRA_CLK07 DDRA_CLK0#7
DDRA_BS0#7 DDRA_WE#7
DDRA_CAS#7
DDRA_CS1#7
+3VS
CD27
2.2U_0603_6.3V6K
Change RD2 to 0ohm jump
DDRA_DQ0 DDRA_DQ1
1
1
CD3
2
2
2.2U_0603_6.3V6K
1
1
2
2
5
.1U_0402_10V6-K
CD28 .1U_0402_10V6-K
DDRA_DQ2 DDRA_DQ3
DDRA_DQ8 DDRA_DQ9
DDRA_DQS#1 DDRA_DQS1
DDRA_DQ10 DDRA_DQ11
DDRA_DQ16 DDRA_DQ17
DDRA_DQS#2 DDRA_DQS2
DDRA_DQ18 DDRA_DQ19
DDRA_DQ24 DDRA_DQ25
DDRA_DQ26 DDRA_DQ27
DDRA_CKE0
DDRA_BS2# DDRA_MA12
DDRA_MA9 DDRA_MA8
DDRA_MA5 DDRA_MA3
DDRA_MA1 DDRA_CLK0
DDRA_CLK0# DDRA_MA10
DDRA_BS0# DDRA_WE#
DDRA_CAS# DDRA_MA13
DDRA_CS1#
DDRA_DQ32 DDRA_DQ33
DDRA_DQS#4 DDRA_DQS4
DDRA_DQ34 DDRA_DQ35
DDRA_DQ40 DDRA_DQ41
DDRA_DQ42 DDRA_DQ43
DDRA_DQ48 DDRA_DQ49
DDRA_DQS#6 DDRA_DQS6
DDRA_DQ50 DDRA_DQ51
DDRA_DQ56 DDRA_DQ57
DDRA_DQ58 DDRA_DQ59
1 2
RD9
10K_0402_5%
12
RD10 10K_0402_5%
3A@1.5V
JDDRH1
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1 DQS129RESET#
31
VSS11
33
DQ10
35
DQ11
37
VSS13
39
DQ16
41
DQ17
43
VSS15
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25 VSS2261DQS#3
63
DM3
65
VSS23
67
DQ26
69
DQ27
71
VSS25
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
LCN_DAN06-K4806-0102
ME@
DQ4 DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6 DQ7
VSS8 DQ12 DQ13
VSS10
DM1
VSS12
DQ14 DQ15
VSS14
DQ20 DQ21
VSS16
DM2
VSS17
DQ22 DQ23
VSS19
DQ28 DQ29
VSS21
DQS3
VSS24
DQ30 DQ31
VSS26
CKE1 VDD2
VDD4
VDD6
VDD8
VDD10
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30
DM4
VSS31
DQ38 DQ39
VSS33
DQ44 DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46 DQ47
VSS40
DQ52 DQ53
VSS42
DM6
VSS43
DQ54 DQ55
VSS45
DQ60 DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62 DQ63
VSS52
EVENT#
VTT2
A15 A14
A11
CK1
BA1
S0#
NC2
SDA SCL
+1.35V+1.35V
2 4
DDRA_DQ4
6
DDRA_DQ5
8 10
DDRA_DQS#0
12
DDRA_DQS0
14 16
DDRA_DQ6
18
DDRA_DQ7
20 22
DDRA_DQ12
24
DDRA_DQ13
26 28 30
DDR3_DRAMRST#
32 34
DDRA_DQ14
36
DDRA_DQ15
38 40
DDRA_DQ20
42
DDRA_DQ21
44 46 48 50
DDRA_DQ22
52
DDRA_DQ23
54 56
DDRA_DQ28
58
DDRA_DQ29
60 62
DDRA_DQS#3
64
DDRA_DQS3
66 68
DDRA_DQ30
70
DDRA_DQ31
72
74
DDRA_CKE1
76 78
DDRA_MA15
80
DDRA_MA14
82 84
DDRA_MA11
86
A7 A6
A4 A2
A0
G2
DDRA_MA7
88 90
DDRA_MA6
92
DDRA_MA4
94 96
DDRA_MA2
98
DDRA_MA0
100 102
DDRA_CLK1
104
DDRA_CLK1#
106 108
DDRA_BS1#
110
DDRA_RAS#
112 114
DDRA_CS0#
116
DDRA_ODT0
118 120
DDRA_ODT1
122 124 126 128 130
DDRA_DQ36
132
DDRA_DQ37
134 136 138 140
DDRA_DQ38
142
DDRA_DQ39
144 146
DDRA_DQ44
148
DDRA_DQ45
150 152
DDRA_DQS#5
154
DDRA_DQS5
156 158
DDRA_DQ46
160
DDRA_DQ47
162 164
DDRA_DQ52
166
DDRA_DQ53
168 170 172 174
DDRA_DQ54
176
DDRA_DQ55
178 180
DDRA_DQ60
182
DDRA_DQ61
184 186
DDRA_DQS#7
188
DDRA_DQS7
190 192
DDRA_DQ62
194
DDRA_DQ63
196 198 200
SMB_DATA_S3
202
SMB_CLK_S3
204 206
4
0.65A@0.75V
For RF request
0.047U_0402_16V7K
1
@
CD4
2
DDR3_DRAMRST# 6,12
DDRA_CKE1 7
DDRA_CLK1 7 DDRA_CLK1# 7
DDRA_BS1# 7 DDRA_RAS# 7
DDRA_CS0# 7 DDRA_ODT0 7
DDRA_ODT1 7
.1U_0402_10V6-K
CD21
1
1
2
2
SMB_DATA_S3 12,17,40,45 SMB_CLK_S3 12,17,40,45
+0.675VS
0.047U_0402_16V7K
0.047U_0402_16V7K
1
1
@
@
2
CD6
CD5
2
Layout Note: Place near DIMM
OSCON (220uF_6.3V_4.2L_ESR17m)*1=(SF000002Y00) (10uF_0603_6.3V)*8 (0.1uF_402_10V)*4
+1.35V
10U_0603_6.3V6M
10U_0603_6.3V6M
CD7
CD8
1
2
+VREF_CA
CD22
2.2U_0603_6.3V6K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
10U_0603_6.3V6M
10U_0603_6.3V6M
CD10
CD9
1
1
2
2
CD11
1
2
Change RD6 to 0ohm jump
+VREF_CA 12
Layout Note: Place near DIMM
+0.675VS
CD23
2012/12/14
2012/12/14
2012/12/14
10U_0603_6.3V6M
CD12
1
1
2
2
+1.35V
+VREF_CA
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CD24
2
2
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
DDRA_DQ[0..63] 7 DDRA_DQS[0..7] 7 DDRA_DQS#[0..7] 7 DDRA_MA[0..15] 7
10U_0603_6.3V6M
CD13
1
2
12
RD5 1K_0402_1%
RD6
@
0_0402_5%
12
RD7 1K_0402_1%
1U_0402_6.3V6K
1
CD25
2
Deciphered Date
Deciphered Date
Deciphered Date
10U_0603_6.3V6M
12
CD26
CD14
1
2
+VREF_CA_R
1U_0402_6.3V6K
1
2
2
.1U_0402_10V6-K
10U_0603_6.3V6M
.1U_0402_10V6-K
CD16
CD15
1
2
Note: VREFtracewidth:20milsatleast Spacing:20milstoothersignal/planes PlacenearDIMMscoket
1
CD20 .1U_0402_10V6-K
@
2
12
RD8
24.9_0402_1%
@
CD17
1
2
Layout Note: Place near DIMM
DDR_A_DM[0:7] connect to GND
2012/12/21
2012/12/21
2012/12/21
ReserveforEMI
1000P_0402_50V7K
.1U_0402_10V6-K
.1U_0402_10V6-K
CD18
1
1
2
2
Title
Title
Title
DDRIII SO-DIMM A
DDRIII SO-DIMM A
DDRIII SO-DIMM A
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
CD19
220U_6.3V_M
1
+
2
401025
401025
401025
.01U_0402_16V7-K
CD56
CD55
@
1
1
2
11 61
11 61
11 61
1
2
@
of
of
of
1.1
1.1
1.1
5
4
3
2
1
+VREF_DQ_DIMMB_R
RD12
1 2
@
0_0402_5%
D D
1
CD29 .1U_0402_10V6-K
2
12
RD14
24.9_0402_1%
For EMC
C C
B B
A A
2.2U_0603_6.3V6K
Change RD12 to 0ohm jump
+1.35V
12
RD11 1K_0402_1%
+VREF_DQ_DIMMB
1K_0402_1%
5
CD53
2.2U_0603_6.3V6K
1
CD30
2
DDRB_CKE07
DDRB_BS2#7
DDRB_CLK07 DDRB_CLK0#7
DDRB_BS0#7 DDRB_WE#7
DDRB_CAS#7
DDRB_CS1#7
1
2
RD13
12
+3VS
.1U_0402_10V6-K
1
CD31
2
1
CD54 .1U_0402_10V6-K
2
DDRB_DQ0 DDRB_DQ1
DDRB_DQ2 DDRB_DQ3
DDRB_DQ8 DDRB_DQ9
DDRB_DQS#1 DDRB_DQS1
DDRB_DQ10 DDRB_DQ11
DDRB_DQ16 DDRB_DQ17
DDRB_DQS#2 DDRB_DQS2
DDRB_DQ18 DDRB_DQ19
DDRB_DQ24 DDRB_DQ25
DDRB_DQ26 DDRB_DQ27
DDRB_CKE0
DDRB_BS2# DDRB_MA12
DDRB_MA9 DDRB_MA8
DDRB_MA5 DDRB_MA3
DDRB_MA1 DDRB_CLK0
DDRB_CLK0# DDRB_MA10
DDRB_BS0# DDRB_WE#
DDRB_CAS# DDRB_MA13
DDRB_CS1#
DDRB_DQ32 DDRB_DQ33
DDRB_DQS#4 DDRB_DQS4
DDRB_DQ34 DDRB_DQ35
DDRB_DQ40 DDRB_DQ41
DDRB_DQ42 DDRB_DQ43
DDRB_DQ48 DDRB_DQ49
DDRB_DQS#6 DDRB_DQS6
DDRB_DQ50 DDRB_DQ51
DDRB_DQ56 DDRB_DQ57
DDRB_DQ58 DDRB_DQ59
1 2
RD16 10K_0402_5%
1 2
RD17 10K_0402_5%
DDR3 SO-DIMM B
+1.35V +1.35V
3A@1.5V
JDDRL1
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1 DQS129RESET# VSS1131VSS12
33
DQ10
35
DQ11 VSS1337VSS14
39
DQ16
41
DQ17 VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25 VSS2261DQS#3
63
DM3 VSS2365VSS24
67
DQ26
69
DQ27 VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
LCN_DAN06-K4406-0102 ME@
DQ4 DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7 VSS8 DQ12 DQ13
VSS10
DM1
DQ14 DQ15
DQ20 DQ21
DM2
VSS17
DQ22 DQ23
VSS19
DQ28 DQ29
VSS21
DQS3
DQ30 DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
VDD10
CK1 CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30
DM4
VSS31
DQ38 DQ39
VSS33
DQ44 DQ45
VSS35 DQS#5
DQS5
VSS38
DQ46 DQ47
VSS40
DQ52 DQ53
VSS42
DM6
VSS43
DQ54 DQ55
VSS45
DQ60 DQ61
VSS47 DQS#7
DQS7
VSS50
DQ62 DQ63
VSS52
EVENT#
SDA
SCL VTT2
4
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72
74 76 78
A15
80
A14
82 84
A11
86
A7
88 90
A6
92
A4
94 96
A2
98
A0
100 102 104 106 108
BA1
110 112 114
S0#
116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206
G2
DDRB_DQ4 DDRB_DQ5
DDRB_DQS#0 DDRB_DQS0
DDRB_DQ6 DDRB_DQ7
DDRB_DQ12 DDRB_DQ13
DDR3_DRAMRST# DDRB_DQ14
DDRB_DQ15 DDRB_DQ20
DDRB_DQ21
DDRB_DQ22 DDRB_DQ23
DDRB_DQ28 DDRB_DQ29
DDRB_DQS#3 DDRB_DQS3
DDRB_DQ30 DDRB_DQ31
DDRB_CKE1 DDRB_MA15
DDRB_MA14 DDRB_MA11
DDRB_MA7 DDRB_MA6
DDRB_MA4 DDRB_MA2
DDRB_MA0 DDRB_CLK1
DDRB_CLK1# DDRB_BS1#
DDRB_RAS# DDRB_CS0#
DDRB_ODT0 DDRB_ODT1
DDRB_DQ36 DDRB_DQ37
DDRB_DQ38 DDRB_DQ39
DDRB_DQ44 DDRB_DQ45
DDRB_DQS#5 DDRB_DQS5
DDRB_DQ46 DDRB_DQ47
DDRB_DQ52 DDRB_DQ53
DDRB_DQ54 DDRB_DQ55
DDRB_DQ60 DDRB_DQ61
DDRB_DQS#7 DDRB_DQS7
DDRB_DQ62 DDRB_DQ63
SMB_DATA_S3 SMB_CLK_S3
0.65A@0.75V
For RF request
CD32
@
DDRB_CKE1 7
DDRB_CLK1 7 DDRB_CLK1# 7
DDRB_BS1# 7 DDRB_RAS# 7
DDRB_CS0# 7 DDRB_ODT0 7
DDRB_ODT1 7
.1U_0402_10V6-K
1
CD47
2
SMB_DATA_S3 11,17,40,45 SMB_CLK_S3 11,17,40,45 +0.675VS
0.047U_0402_16V7K
0.047U_0402_16V7K
1
1
CD33
2
2
@
DDR3_DRAMRST# 6,11
+VREF_CB
1
CD48
2.2U_0603_6.3V6K
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
0.047U_0402_16V7K
1
CD34
2
@
Layout Note: Place near DIMM
CD35
3
+1.35V
10U_0603_6.3V6M
CD36
1
1
2
2
RD15
1 2
@
0_0402_5%
Change RD15 to 0ohm jump
2012/12/14
2012/12/14
2012/12/14
10U_0603_6.3V6M
10U_0603_6.3V6M
CD38
CD37
1
2
+VREF_CA 11
Layout Note: Place near DIMM
CD49
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
(10uF_0603_6.3V)*8 (0.1uF_402_10V)*4
10U_0603_6.3V6M
10U_0603_6.3V6M
CD39
1
2
+0.675VS
1U_0402_6.3V6K
1
CD50
2
Deciphered Date
Deciphered Date
Deciphered Date
CD40
1
1
2
2
1U_0402_6.3V6K
CD51
1U_0402_6.3V6K
1
2
2
1
2
10U_0603_6.3V6M
CD52
2012/12/21
2012/12/21
2012/12/21
DDRB_DQ[0..63] 7 DDRB_DQS[0..7] 7 DDRB_DQS#[0..7] 7 DDRB_MA[0..15] 7
10U_0603_6.3V6M
CD41
CD42
1
2
1U_0402_6.3V6K
1
2
.1U_0402_10V6-K
10U_0603_6.3V6M
CD43
1
2
1
2
Layout Note: Place near DIMM
.1U_0402_10V6-K
.1U_0402_10V6-K
CD44
CD45
1
1
2
2
CD46
.1U_0402_10V6-K
1
2
DDR_B_DM[0:7] connect to GND
Title
Title
Title
DDRIII SO-DIMM B
DDRIII SO-DIMM B
DDRIII SO-DIMM B
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
1
12 61
12 61
12 61
1.1
1.1
1.1
of
of
of
5
4
3
2
1
1 2
@
1 2
@
1 2
@
PCH_RTCX1
PCH_RTCX2
1
18P_0402_50V8J
2
1K_0402_5%
1K_0402_5%
1K_0402_5%
CH3
SM_INTRUDER# PCH_INTVRMEN
+3VS
RH14 51_0402_1%@ RH16 210_0402_1%@ RH18 210_0402_1%@ RH20 210_0402_1%@
Place JUMPER under RAM door
+RTCVCC
1 2
RH3
1 2
RH4
RH7
1 2
10K_0402_5%
1 2 1 2 1 2
HDA_SDOUT
PCH_SPKR
HDA_SYNC
PCH_GPIO33
@
ME_FLASH44
12
RH1
1 2
10M_0402_5% YH1
1 2
32.768KHZ_12.5PF_200458-PG14
1
D D
C C
B B
CH2
18P_0402_50V8J
2
+RTCVCC
*
1 2
RH5 1M_0402_5%
1 2
RH6 330K_0402_5%
INTVRMEN H Integrated VRM enable (Default)　 L Integrated VRM disable　 (INTVRMEN should always be pull high.)
GPIO33 This signal has a weak internal pull-down. DMI TX Termination Strap (Rising edge of PWROK) This signal only takes effect if DMI is configured in DC-
+3V_PCH
coupled mode. 0 = DMI TX is terminated to VSS.
*
12
1 = DMI TX is terminated to VCC/2.
RH12 0_0603_5%
@
+3.3V_ALW_PCH_JTAG PCH_JTAG_TMS
+3V_PCH
RH25
HDA_SDO This signal has a weak internal pull-down. 0 = Enable security measures defined in the Flash Descriptor.
*
1 = Disable Flash Descriptor Security (override). This strap should only be asserted high using external pull­ up in manufacturing/debug environments ONLY.
+3VS
RH28
SPKR The signal has a weak internal pull-down. H Enable ( No Reboot, PCH will disable the TCO Timer system reboot feature, This function is useful when running ITP/XDP. ) L Disable (Default)
*
+3V_PCH
RH31
W=20mils W=20mils
+RTCBATT +RTCVCC
RH2
1 2
0_0402_5%
CMOS
1 2
@
TH3 TH4
PCH_RTCX1
PCH_RTCX2 PCH_SRTCRST# SM_INTRUDER# PCH_INTVRMEN PCH_RTCRST#
HDA_BIT_CLK
HDA_SYNC
PCH_SPKR
HDA_RST#
HDA_SDIN0
PCH_GPIO33
PCH_GPIO13
PCH_TP25
0_0402_5%
1 1
1
2
1
2
1 2 1 2
@
1 2
@
100_0402_1%
12
12
JME1
@
SHORT PADS
12
JCMOS1 SHORT PADS@
PCH_SPKR43
HDA_SDIN043
1K_0402_5%
PCH_JTAG_TCK
PCH_JTAG_TDI PCH_JTAG_TDO
RH21
PAD@ PAD@
CH4
1U_0402_6.3V6K
20K_0402_5%
20K_0402_5%
ME_FLASH HDA_SDOUT
+3V_PCH
1U_0402_6.3V6K
RH11 10K_0402_5%
100_0402_1%
12
12
RH23
RH22
@
@
CH5
Change RH9 to 0ohm jump
RH9 0_0402_5%@ RH10
100_0402_1%
RH24
@
HDA AUDIO
1 2
HDA_SYNC_AUDIO43
HDA_RST_AUDIO#43
HDA_SDOUT_AUDIO43
HDA_BITCLK_AUDIO43
RH27
33_0402_5%
1 2
RH29
33_0402_5%
1 2
RH30
33_0402_5%
1 2
RH26
33_0402_5%
1
CH77 100P_0402_50V8J
2
@
1
CH1
1U_0402_6.3V6K
2
B5 B4 B9 A8
G10
D9
B25 A22
AL10
C24
L22 K22 G22
F22 A24 B17 C22
AB3 AD1
AE2 AD3
F8 C26 AB6
UH1A
RTCX1 RTCX2 SRTCRST# INTRUDER# INTVRMEN RTCRST#
HDA_BCLK HDA_SYNC SPKR HDA_RST# HDA_SDI0 HDA_SDI1 HDA_SDI2 HDA_SDI3 HDA_SDO DOCKEN#/GPIO33 HDA_DOCK_RST#/GPIO13
JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO TP25 TP22 TP20
LYNX-POINT-DH82LPMS_BGA695
HDA_SYNC
HDA_RST#
HDA_SDOUT
HDA_BIT_CLK
1
CH78 100P_0402_50V8J
2
@
For EMC
LPT_PCH_M_EDS
JTAGRTC AZALIA
REV = 5
SATA
SATALED#
SATA_IREF
TP9 TP8
BC8 BE8
AW8 AY8
BC10 BE10
AV10 AW10
BB9
SATA_PRX_DTX_N2
BD9
SATA_PRX_DTX_P2
AY13
SATA_PTX_DRX_N2
AW13
SATA_PTX_DRX_P2
BC12 BE12
AR13 AT13
BD13
SATA_PRX_DTX_N4
BB13
SATA_PRX_DTX_P4
AV15
SATA_PTX_DRX_N4
AW15
SATA_PTX_DRX_P4
BC14 BE14
AP15 AR15
AY5
SATA_COMP
AP3
HDD_LED#
AT1
PCH_GPIO21
AU2
PCH_GPIO19
BD4
SATA_IREF
BA2 BB2
SATA_RXN_0 SATA_RXP_0
SATA_TXN_0
SATA_TXP_0
SATA_RXN_1 SATA_RXP_1
SATA_TXN_1
SATA_TXP_1
SATA_RXN_2 SATA_RXP_2
SATA_TXN_2
SATA_TXP_2
SATA_RXN_3 SATA_RXP_3
SATA_TXN_3
SATA_TXP_3
SATA_RXN4/PERN1 SATA_RXP4/PERP1
SATA_TXN4/PETN1 SATA_TXP4/PETP1
SATA_RXN5/PERN2 SATA_RXP5/PERP2
SATA_TXN5/PETN2 SATA_TXP5/PETP2
SATA_RCOMP
SATA0GP/GPIO21 SATA1GP/GPIO19
1 OF 11
SATAImpedanceCompensation
SATA_COMP
CADnote: Placetheresistorwithin500milsofthePCH.Avoid routingnexttoclockpins.
1 2
1 1
RH8
1 2
RH15
1 2
RH17
1 2
RH19
TH1 TH2
7.5K_0402_1%
0_0402_5% PAD@
PAD@
+1.5VS
RH13
10K_0402_5% 10K_0402_5%
+1.5VS
1 2
10K_0402_5%
+3VS +3VS
Boot BIOS Strap bit0 BBS0
Bit11
SATA1GP /GPIO19
ODD
HDD
+3VS
Bit10
01
0
1 1
1
0
0
SATA_PRX_DTX_N2 42
SATA_PRX_DTX_P2 42 SATA_PTX_DRX_N2 42
SATA_PTX_DRX_P2 42
SATA_PRX_DTX_N4 42 SATA_PRX_DTX_P4 42
SATA_PTX_DRX_N4 42 SATA_PTX_DRX_P4 42
Boot BIOS Destination
Reserved Reserved SPI
*
LPC
(Default)
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
PCH (1/9) RTC,HDA,SATA
PCH (1/9) RTC,HDA,SATA
PCH (1/9) RTC,HDA,SATA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
1
13 61
13 61
13 61
of
of
of
1.1
1.1
1.1
5
+3VS
1 2
RH34
RH35
D D
RH36 RH37 RH38
1 2
1 2
150_0402_1%
1 2
150_0402_1%
1 2
150_0402_1%
2.2K_0402_5%
2.2K_0402_5%
PCH_CRT_B PCH_CRT_G PCH_CRT_R
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
PCH_CRT_B36 PCH_CRT_G36
PCH_CRT_R36 PCH_CRT_DDC_CLK36 PCH_CRT_DDC_DAT36
PCH_CRT_HSYNC36
PCH_CRT_VSYNC36
Change RH40,RH41,RH42 to 0ohm jump
1 2
C C
+3VS
B B
GPIO53 The signal has a weak internal pull-up. H DMI is in DC-coupling mode (desktop, mobile or server/workstation).
*
L DMI is in AC-coupling mode (server/workstation only, not meant for desktop/mobile).
DGPU_HOLD_RST#23
NVDD_PWR_EN46,58 DGPU_PWR_EN23,46
1 2
RH44 8.2K_0402_5%@
1 2
RH45 8.2K_0402_5%@
1 2
RH47 8.2K_0402_5%
1 2
RH48 8.2K_0402_5%UMA@
1 2
RH49 8.2K_0402_5%@
1 2
RH50 8.2K_0402_5%@
1 2
RH51 8.2K_0402_5%@
1 2
RH52 1K_0402_5%@
RH40 0_0402_5%@
NVDD_PWR_EN NVDD_PWR_EN_R DGPU_PWR_EN DGPU_PWR_EN_R
DGPU_GC6_EN27 PCH_WL_OFF#40
PPT EDS DOC#474146
PCH_GPIO51 DGPU_GC6_EN
PCH_WL_OFF# DGPU_PWR_EN_R DGPU_HOLD_RST#
DGPU_GC6_EN DGPU_HOLD_RST#
PCH_WL_OFF#
4
1 2
RH46 1K_0402_5%@
LPT_PCH_M_EV
LVDSCRT
UH1E
PCH_CRT_B PCH_CRT_G PCH_CRT_R
PCH_CRT_DDC_CLK PCH_CRT_DDC_DAT PCH_CRT_HSYNC PCH_CRT_VSYNC
1 2
RH39
649_0402_1%
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
PCH_DGPU_HOLD_RST#
@
0_0402_5%
@
0_0402_5%
PCH_GPIO51 DGPU_GC6_EN PCH_WL_OFF#
PCH_EDP_PWM PCH_ENBKL PCH_ENVDD
PCH_EDP_PWM34 PCH_ENBKL34 PCH_ENVDD34
1 2
RH41
1 2
RH42
T45
VGA_BLUE
U44
VGA_GREEN
V45
VGA_RED
M43
VGA_DDC_CLK
M45
VGA_DDC_DATA
N42
VGA_HSYNC
N44
VGA_VSYNC
U40
DAC_IREF
U39
VGA_IRTN
N36
EDP_BKLTCTL
K36
EDP_BKLTEN
G36
EDP_VDDEN
H20
PIRQA#
L20
PIRQB#
K17
PIRQC#
M20
PIRQD#
A12
GPIO50
B13
GPIO52
C12
GPIO54
C10
GPIO51
A10
GPIO53
AL6
GPIO55
LYNX-POINT-DH82LPMS_BGA695
PCH_GPIO51
BootBIOSStrap
BBS_BIT1 (GPIO51)
*
SATA_SLPD (BBS_BIT0)
BootBIOSLocation
00 LPC
0 1 Reserved(NAND)
10
11 SPI
REV = 5
PCI
PCI
DISPLAY
3
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPD_CTRLCLK
DDPD_CTRLDATA
5 OF 11
DDPB_AUXN DDPC_AUXN DDPD_AUXN DDPB_AUXP DDPC_AUXP DDPD_AUXP
DDPB_HPD DDPC_HPD DDPD_HPD
PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5
PME#
PLTRST#
R40 R39 R35 R36 N40 N38
H45 K43 J42 H43 K45 J44 K40 K38 H39
G17 F17 L15 M15 AD10 Y11
DDPB_CLK DDPB_DATA
TMDS_B_HPD
PCH_GPIO2 ODD_DA# PCH_GPIO4 PCH_GPIO5
PLT_RST#
1
PLT_RST#
+3VS
2
+3VS
1 2
RH32
RH33
DDPB_CLK 35 DDPB_DATA 35
DDPB_CTRLDATA The signal has a weak internal pull-down. H Port B is detected.
*
L Port B is not detected.
TMDS_B_HPD 35
ODD_DA# 42
PAD@
TH5
PLT_RST# 23,37,40,44
12
RH43 100K_0402_5%
RPH1
18
PCI_PIRQD#
27
PCI_PIRQA#
36
PCI_PIRQC#
45
PCI_PIRQB#
8.2K_8P4R_5% RPH2
18
PCH_GPIO4
27 36
PCH_GPIO2
45
8.2K_8P4R_5%
PCH_GPIO5
1 2
2.2K_0402_5%
2.2K_0402_5%
DDPB_CLK
DDPB_DATA
ODD_DA#
ForESD
1
CH6 220P_0402_50V7K
2
@
1
GPIO55 The signal has a weak internal pull-up. H Disable ' Top-Block Swap ' mode.
*
L Enable ' Top-Block Swap ' mode.
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
PCH (2/9) CRT,DP,PCI
PCH (2/9) CRT,DP,PCI
PCH (2/9) CRT,DP,PCI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
1
of
of
of
14 61
14 61
14 61
1.1
1.1
1.1
5
+3VS
1
CH7
.1U_0402_10V6-K
D D
C C
B B
VR_READY44,59
+3V_PCH
RH56
RH58 is 8.2K as intel check list, will test 10k in future
+3VALW
+3VS
1 2
RH58
RH54
1 2
RH59 10K_0402_5%
1 2
RH67
1 2
VR_READY PCH_PWROK
10K_0402_5%
200K_0402_5%
12
10K_0402_5%
10K_0402_5%
2
@
SUSWARN#
PCH_AC_PRESENT_R
PCH_PWROK
PCH_RSMRST#_R
SYS_RESET#
5
1
VCC
IN1
2
IN2
GND
3
@
MC74VHC1G08DFT2G_SC70-5
UH2
4
OUT
For Deep S3
SUSACK#44
SYS_PWROK6,44 PCH_PWROK8,44
APWROK can be connect to PWROK if iAMT disable
PBTN_OUT#44
AC_PRESENT44
+3VALW
+3V_PCH
PM_DRAM_PWRGD6
EC_RSMRST#44
SUSWARN#44
SYS_PWROK_R
12
@
RH53 100K_0402_5%
DMI_CTX_PRX_N05 DMI_CTX_PRX_N15
DMI_CTX_PRX_N25 DMI_CTX_PRX_N35
DMI_CTX_PRX_P05 DMI_CTX_PRX_P15
DMI_CTX_PRX_P25 DMI_CTX_PRX_P35
DMI_CRX_PTX_N05 DMI_CRX_PTX_N15
DMI_CRX_PTX_N25 DMI_CRX_PTX_N35
DMI_CRX_PTX_P05 DMI_CRX_PTX_P15
DMI_CRX_PTX_P25 DMI_CRX_PTX_P35
+1.5VS
+1.5VS
1 2
RH66
@
1 2
RH193 0_0402_5%@
1 2
RH70 0_0402_5%@
1 2
RH73 0_0402_5%@
1 2
RH74 0_0402_5%
1 2
RH75 0_0402_5%@
1 2
RH76 0_0402_5%@
1 2
RH77 8.2K_0402_5%
1 2
RH79 10K_0402_5%
Change RH62,RH193,RH70,RH71,RH73,RH75,RH76,RH60 to 0ohm jump
1 2
RH62 0_0402_5%@
1 2
RH64
0_0402_5%
4
PAD@ PAD@
7.5K_0402_1%
1 2
RH71
0_0402_5%
PAD@ PAD@
DMI_CTX_PRX_N0 DMI_CTX_PRX_N1
DMI_CTX_PRX_N2 DMI_CTX_PRX_N3
DMI_CTX_PRX_P0 DMI_CTX_PRX_P1
DMI_CTX_PRX_P2 DMI_CTX_PRX_P3
DMI_CRX_PTX_N0 DMI_CRX_PTX_N1
DMI_CRX_PTX_N2 DMI_CRX_PTX_N3
DMI_CRX_PTX_P0 DMI_CRX_PTX_P1
DMI_CRX_PTX_P2 DMI_CRX_PTX_P3
DMI_IREF
1
TH11
1
TH13
DMI_RCOMP
SUSACK#_R SYS_RESET# SYS_PWROK_R PWROK
@
APWROK PM_DRAM_PWRGD PCH_RSMRST#_R SUSWARN#_R
PM_PWRBTN#_R PCH_AC_PRESENT_R
PCH_GPIO72 RI#
1
TH17
1
TH19
UH1B
AW22
DMI_RXN_0
AR20
DMI_RXN_1
AP17
DMI_RXN_2
AV20
DMI_RXN_3
AY22
DMI_RXP_0
AP20
DMI_RXP_1
AR17
DMI_RXP_2
AW20
DMI_RXP_3
BD21
DMI_TXN_0
BE20
DMI_TXN_1
BD17
DMI_TXN_2
BE18
DMI_TXN_3
BB21
DMI_TXP_0
BC20
DMI_TXP_1
BB17
DMI_TXP_2
BC18
DMI_TXP_3
BE16
DMI_IREF
AW17
TP12
AV17
TP7
AY17
DMI_RCOMP
R6
SUSACK#
AM1
SYS_RESET#
AD7
SYS_PWROK
F10
PWROK
AB7
APWROK
H3
DRAMPWROK
J2
RSMRST#
J4
SUSWARN#/SUSPWRNACK/GPIO30
K1
PWRBTN#
E6
ACPRESENT/GPIO31
K7
BATLOW#/GPIO72
N4
RI#
AB10
TP21
D2
SLP_WLAN#/GPIO29
LYNX-POINT-DH82LPMS_BGA695
LPT_PCH_M_EDS
DMI
System Power
Management
REV = 5
3
FDI
SUS_STAT#/GPIO61
FDI_RXN_0 FDI_RXN_1
FDI_RXP_0 FDI_RXP_1
FDI_CSYNC
FDI_RCOMP
DSWVRMEN
SUSCLK/GPIO62 SLP_S5#/GPIO63
SLP_SUS# PMSYNCH SLP_LAN#
4 OF 11
AJ35
FDI_CTX_PRX_N0
AL35
FDI_CTX_PRX_N1
AJ36
FDI_CTX_PRX_P0
AL36
FDI_CTX_PRX_P1
AV43
TP16
AY45
TP5
AV45
TP15
AW44
TP10
AL39 AL40
FDI_INT
AT45
FDI_IREF
AU42
TP17
AU44
TP13
AR44
C8 L13
DPWROK
K3
WAKE#
AN7
CLKRUN#
U7 Y6 Y7 C6
SLP_S4#
H1
SLP_S3#
F3
SLP_A#
F1 AY3 G5
Can be left NC if no use integrated LAN.
1
TH6
1
TH7
1
TH8
1
TH9
FDI_CSYNC FDI_INT
1 2
FDI_IREF
RH60
1
TH10
1
TH12
FDI_RCOMP
DSWODVREN PCH_DPWROK_R
PM_CLKRUN# SUS_STAT# SUSCLK PM_SLP_S5# PM_SLP_S4# PM_SLP_S3#
1 2
RH63
7.5K_0402_1%
RH239 0_0402_5%
RH68 0_0402_5%@ RH69 0_0402_5%
1
TH14
1
TH15
Can be left NC when IAMT is not support on the platfrom
PM_SLP_SUS#_R H_PM_SYNC
1
RH78 0_0402_5%@
TH18
PAD@ PAD@ PAD@ PAD@
0_0402_5%@ PAD@ PAD@
1 2
1 2 1 2
PAD@
PAD@
PM_SLP_S5# 44 PM_SLP_S4# 44 PM_SLP_S3# 44
1 2
H_PM_SYNC 6
PAD@
2
FDI_CTX_PRX_N0 8 FDI_CTX_PRX_N1 8 FDI_CTX_PRX_P0 8 FDI_CTX_PRX_P1 8
FDI_CSYNC 5 FDI_INT 5
+1.5VS
+1.5VS
1
+RTCVCC
12
RH55 330K_0402_5%
DSWODVREN
DSWODVREN - On Die DSW VR Enable H Enable　
*
L Disable　
12
RH57 330K_0402_5%
@
RH61 is 1% as check list request, CRB is 5%. follow CRB
1 2
RH61 100K_0402_5%
+3VS
1 2
RH65 8.2K_0402_5%
For Deep S3
note need connect to GPIO27
@
1 2
RH72 10K_0402_5%
For Deep S3
1 2
RH80 10K_0402_5%
+3VALW
+3V_PCH
EC_RSMRST#
DPWROK_EC PCIE_WAKE#WAKE#
PCH_DPWROK_R
PM_CLKRUN#
DPWROK_EC 44 PCIE_WAKE# 19,37,40,44
SUSCLK
SUSCLK/GPIO62 - (Have weak internal pull-up) PLL On-Die Voltage Regulator Enable H Enable　
*
L Disable　
PM_SLP_SUS# 44,46
WAKE#
AS EMC request
PCH_PWROK SYS_PWROK_R PCH_DPWROK_R
1
CH83
A A
.1U_0402_10V6-K
5
2
.1U_0402_10V6-K
CH84
1
2
.1U_0402_10V6-K
CH85
1
2
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
PCH (3/9) DMI,FDI,PM
PCH (3/9) DMI,FDI,PM
PCH (3/9) DMI,FDI,PM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
1
of
of
of
15 61
15 61
15 61
1.1
1.1
1.1
5
4
3
2
1
UH1C
D D
PCH_GPIO18
PCH_GPIO20
LAN
WLAN
C C
CLK_PCI_EC44
RH84 22_0402_5%
CLK_PCIE_LAN#37 CLK_PCIE_LAN37
CLKREQ_LAN#37
CLK_PCIE_WLAN#40 CLK_PCIE_WLAN40 WLAN_CLKREQ1#40
1 2
1 2
RH87 22_0402_5%
CLK_PCIE_LAN# CLK_PCIE_LAN CLKREQ_LAN#
CLK_PCIE_WLAN# CLK_PCIE_WLAN WLAN_CLKREQ1#
PCH_GPIO44
PCH_GPIO45
PCH_GPIO46
CLK_PCI_EC_R
PCI_LOOPBACKOUTCLK_PCI_LOOPBACK
PCH_GPIO73
Y43
CLKOUT_PCIE_N_0
Y45
CLKOUT_PCIE_P_0
AB1
PCIECLKRQ0#/GPIO73
AA44
CLKOUT_PCIE_N_1
AA42
CLKOUT_PCIE_P_1
AF1
PCIECLKRQ1#/GPIO18
AB43
CLKOUT_PCIE_N_2
AB45
CLKOUT_PCIE_P_2
AF3
PCIECLKRQ2#/GPIO20/SMI#
AD43
CLKOUT_PCIE_N_3
AD45
CLKOUT_PCIE_P_3
T3
PCIECLKRQ3#/GPIO25
AF43
CLKOUT_PCIE_N_4
AF45
CLKOUT_PCIE_P_4
V3
PCIECLKRQ4#/GPIO26
AE44
CLKOUT_PCIE_N5
AE42
CLKOUT_PCIE_P_5
AA2
PCIECLKRQ5#/GPIO44
AB40
CLKOUT_PCIE_N_6
AB39
CLKOUT_PCIE_P_6
AE4
PCIECLKRQ6#/GPIO45
AJ44
CLKOUT_PCIE_N_7
AJ42
CLKOUT_PCIE_P_7
Y3
PCIECLKRQ7#/GPIO46
AH43
CLKOUT_ITPXDP_N
AH45
CLKOUT_ITPXDP_P
D44
CLKOUT_33MHZ0
E44
CLKOUT_33MHZ1
B42
CLKOUT_33MHZ2
F41
CLKOUT_33MHZ3
A40
CLKOUT_33MHZ4
CLOCK SIGNAL
LYNX-POINT-DH82LPMS_BGA695
LPT_PCH_M_EDS
REV = 5
PEG_A_CLKRQ#/GPIO47
PEG_B_CLKRQ#/GPIO56
CLKIN_33MHZLOOPBACK
2 OF 11
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
CLKOUT_DMI_N CLKOUT_DMI_P
CLKOUT_DP_N CLKOUT_DP_P
CLKOUT_DPNS_N CLKOUT_DPNS_P
CLKIN_DMI_N CLKIN_DMI_P
CLKIN_GND_N CLKIN_GND_P
CLKIN_DOT96N CLKIN_DOT96P
CLKIN_SATA_N CLKIN_SATA_P
REFCLK14IN
XTAL25_IN
XTAL25_OUT CLKOUTFLEX0/GPIO64 CLKOUTFLEX1/GPIO65 CLKOUTFLEX2/GPIO66 CLKOUTFLEX3/GPIO67
ICLK_IREF
TP19 TP18
DIFFCLK_BIASREF
AB35
CLK_PCIE_VGA#
AB36
CLK_PCIE_VGA
AF6
CLK_REQ_GPU#_R
Y39 Y38 U4
CLK2_REQ_GPU#_R
AF39
CLK_CPU_DMI#
AF40
CLK_CPU_DMI
AJ40
CLK_CPU_SSC_DPLL#
AJ39
CLK_CPU_SSC_DPLL
AF35
CLK_CPU_DPLL#
AF36
CLK_CPU_DPLL
AY24
CLK_BUF_CPU_DMI#
AW24
CLK_BUF_CPU_DMI
AR24
CLKIN_DMI2#
AT24
CLKIN_DMI2
H33
CLK_BUF_DREF_96M#
G33
CLK_BUF_DREF_96M
BE6
CLK_BUF_PCIE_SATA#
BC6
CLK_BUF_PCIE_SATA
F45
CLK_BUF_ICH_14M
D17
CLK_PCI_LOOPBACK
AM43
XTAL25_IN
AL44
XTAL25_OUT
C40 F38 F36 F39
PCH_GPIO67
AM45
ICLK_IREF
AD39 AD38
AN44
PCH_CLK_BIASREF
RH83 10K_0402_5%
1 2
1
PAD@
TH22
1
PAD@
TH23
1 2
CLK_PCIE_VGA# 23 CLK_PCIE_VGA 23
1 2
RH81 10K_0402_5%
1 2
RH82 10K_0402_5%
CLK_CPU_DMI# 6 CLK_CPU_DMI 6
CLK_CPU_SSC_DPLL# 6 CLK_CPU_SSC_DPLL 6
CLK_CPU_DPLL# 6 CLK_CPU_DPLL 6
1 2
PCH_GPIO67 19
RH86
@
+1.5VS
RH88
0_0402_5%
7.5K_0402_1%
Change RH86 to 0ohm jump
+1.05V_+1.5V_RUN
+3V_PCH
+3V_PCH
CLK_BUF_CPU_DMI CLK_BUF_CPU_DMI# CLKIN_DMI2 CLKIN_DMI2#
CLK_BUF_DREF_96M# CLK_BUF_DREF_96M CLK_BUF_PCIE_SATA# CLK_BUF_PCIE_SATA
CLK_REQ_GPU#_R 23
RPH3
4 5 3 6 2 7 1 8
RPH4
4 5 3 6 2 7 1 8
10K_0804_8P4R_5%
10K_0804_8P4R_5%
B B
A A
+3V_PCH
1 2
RH89 10K_0402_5%
1 2
RH90 10K_0402_5%
1 2
RH91 10K_0402_5%
1 2
RH93 10K_0402_5%
1 2
RH94 10K_0402_5%
1 2
RH98 10K_0402_5%
+3VS
1 2
RH96 10K_0402_5%
1 2
RH97 10K_0402_5%
5
CLKREQ_LAN# WLAN_CLKREQ1# PCH_GPIO44
PCH_GPIO45 PCH_GPIO46 PCH_GPIO73
PCH_GPIO18 PCH_GPIO20
Reserve for EMI please close to PCH
3
CH8
1 2
22P_0402_50V8-J
@
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
RH95
CLK_PCI_LOOPBACK
4
12
33_0402_5%
@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
XTAL25_IN XTAL25_OUT
12P_0402_50V8-J
2012/12/21
2012/12/21
2012/12/21
2
CH9
1 2
RH92 1M_0402_5%
YH2
1
OSC1
1
2
GND12OSC2
25MHZ_10PF_7V25000014
Title
Title
Title
PCH (3/9) CLOCK
PCH (3/9) CLOCK
PCH (3/9) CLOCK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
GND2
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
4 3
1
CH10
12P_0402_50V8-J
2
1.1
1.1
401025
401025
401025
1
16 61
16 61
16 61
1.1
of
of
of
5
LPC_AD044 LPC_AD144 LPC_AD244 LPC_AD344
D D
LPC_FRAME#44
SERIRQ44
SPI_CLK_PCH_0 SPI_CLK_PCH_1_R
SPI_SB_CS0#_R SPI_CS1#_R
SPI_SI_R SPI_SI_R1 SPI_SI
SPI_SO_L SPI_SO_L1
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
LPC_FRAME#
1 2
+3VS
RH104 10K_0402_5%
1 2
RH105 33_0402_5%
1 2
RH106 33_0402_5%
1 2
RH107 0_0402_5%@
1 2
RH108 0_0402_5%@
1 2
RH109 33_0402_5%
1 2
RH110 33_0402_5%
1 2
RH111 33_0402_5%
1 2
RH112 33_0402_5%
SERIRQ
SPI_CLK_PCH SPI_SB_CS0# SPI_CS1#
SPI_SO_R
Change RH107,RH108 to 0ohm jump
C C
SPI_CS1#_R44
SPI_SI_R144
SPI_SO_L144
SPI_CLK_PCH_144
SPI_CS1#_R
SPI_SI_R1
SPI_SO_L1
1 2
RH118 0_0402_5%
Change RH118 to 0ohm resistor from 0ohm jump
A20 C20 A18 C18 B21 D21
G20
AL11
AJ11
AJ7 AL7
AJ10
AH1 AH3
AJ4 AJ2
SPI_CLK_PCH_1_RSPI_CLK_PCH_1
4
UH1D
LAD_0 LAD_1 LAD_2 LAD_3 LFRAME# LDRQ0# LDRQ1#/GPIO23 SERIRQ
SPI_CLK SPI_CS0# SPI_CS1# SPI_CS2# SPI_MOSI SPI_MISO SPI_IO2 SPI_IO3
LYNX-POINT-DH82LPMS_BGA695
SPILPC
LPT_PCH_M_EDS
SMBus
C-Link
Thermal
REV = 5
SML1ALERT#/PCHHOT#/GPIO74
3 OF 11
3
SMBALERT#/GPIO11
SMBCLK
SMBDATA
SML0ALERT#/GPIO60
SML0CLK
SML0DATA
SML1CLK/GPIO58
SML1DATA/GPIO75
CL_CLK CL_DATA CL_RST#
TD_IREF
TP1 TP2 TP4 TP3
N7
PCH_GPIO11
R10
PCH_SMBCLK
U11
PCH_SMBDATA
N8 U8
SML0CLK
R7
SML0DATA
H6
PCH_HOT#
K6
SML1CLK
N11
SML1DATA
AF11 AF10 AF7
BA45 BC45 BE43 BE44 AY43
PCH_TD_IREF
DRAMRST_CNTRL_PCH 6
1
PAD@
TH24
1
PAD@
TH25
1
PAD@
TH26
1
PAD@
TH27
1 2
RH113 8.2K_0402_1%
+3V_PCH
1 2
RH114 2.2K_0402_5%
1 2
RH116 2.2K_0402_5%
PCH_SMBCLK
PCH_SMBDATA
2
PCH_GPIO11 DRAMRST_CNTRL_PCH SML0CLK SML0DATA PCH_HOT#
+3VS
6 1
5
QH1A 2N7002KDWH_SOT363-6
G
3 4
S
D
QH1B 2N7002KDWH_SOT363-6
2
G
S
D
1 2
RH99 10K_0402_5% RH100 1K_0402_5%
1 2
RH101 2.2K_0402_5%
1 2
RH102 2.2K_0402_5%
1 2
RH103 10K_0402_5%
2N7002KDWH Vth= min 1V, max 2.5V ESD 2KV
SMB_CLK_S3
SMB_DATA_S3
1
+3V_PCH
12
DIMM1, DIMM2, Mini CARD, TP
1 2
RH115 2.2K_0402_5%
1 2
RH117 2.2K_0402_5%
SMB_CLK_S3 11,12,40,45
SMB_DATA_S3 11,12,40,45
+3VS
For EMI
SPI_CLK_PCH_0 SPI_CLK_PCH_1_R
+3VS_PCH_VCCSPI +3VS_PCH_VCCSPI
1 2
RH123 3.3K_0402_5%
1 2
RH125 3.3K_0402_5%
UH3
SPI_SB_CS0#_R
B B
A A
SPI_SO_L SPI_WP#
1
CS
2
DO(IO1)
3
WP(IO2)
4
GND
W25Q16DVSSIG_SO8
5
HOLD(IO3)
DI(IO0)
8
VCC
7 6
CLK
5
ROMPWREN44
RH119 10_0402_5%
1 2
1
@
CH11
10P_0402_50V8J
2
SPI_WP# SPI_HOLD#
SPI_HOLD# SPI_WP#_1 SPI_CLK_PCH_0 SPI_SI_R
@
+3VS_PCH_VCCSPI
1
CH13 .1U_0402_10V6-K
2
ROMPWREN
@
12
RH192 0_0402_5%
SPI_CS1#_R SPI_SO_L1
1 2
RH237 10K_0402_5%@
1 2
@
RB751V-40_SOD323-2
1 2
0_0402_5%
4
RH124 3.3K_0402_5% RH126 3.3K_0402_5%
DH6
RH85
@
32Mb Flash ROM16Mb Flash ROM
1 2 1 2
UH4
1
CS
2
DO(IO1)
3
WP(IO2)
4
GND
W25Q32FVSSIG_SO8
CH80
4.7U_0603_6.3V6K
For EMI
HOLD/RST(IO3)
+3VALW
1
@
2
RH120 10_0402_5%
1 2
1
@
CH12
10P_0402_50V8J
2
1 2
0_0402_5%
LP2301ALT1G_SOT23-3
S
QH9
@
G
@
Issued Date
Issued Date
Issued Date
3
@
+3VS_PCH_VCCSPI
1
CH14 .1U_0402_10V6-K
2
RH235
D
13
2
1
CH81 .1U_0402_10V6-K
@
2
SPI_WP#_1 SPI_HOLD#_1
8
VCC
7
SPI_HOLD#_1
6
SPI_CLK_PCH_1_R
CLK
5
SPI_SI_R1
DI(IO0)
+3V_PCH +3VS_PCH_VCCSPI
+3VALW
RH191
100K_0402_5%
@
1 2
13
D
2
G
QH7
S
2N7002KW_SOT323-3
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2012/12/14
2012/12/14
2012/12/14
+3V_PCH
1
PAD@
TH34
1 2
RH236
@
0_0402_5%
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
1 2
RH121 2.2K_0402_5%
1 2
RH122 2.2K_0402_5%
SML1CLK
SML1DATA
+3VS
2012/12/21
2012/12/21
2012/12/21
2
2
G
6 1
D
5
QH2A 2N7002KDWH_SOT363-6
G
3 4
S
D
QH2B 2N7002KDWH_SOT363-6
Title
Title
Title
PCH (5/9) LPC,SPI,SMBUS
PCH (5/9) LPC,SPI,SMBUS
PCH (5/9) LPC,SPI,SMBUS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
GPU, EC, Thermal Sensor
+3VS
EC_SMB_CK2
S
EC_SMB_DA2
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
EC_SMB_CK2 23,39,44
EC_SMB_DA2 23,39,44
401025
401025
401025
1
17 61
17 61
17 61
of
of
of
1.1
1.1
1.1
5
4
3
2
1
UH1I
AW31
PERN1/USB3RN3
AY31
PERP1/USB3RP3
BE32
PETN1/USB3TN3
BC32
D D
1 2
RH128
0_0402_5%
PAD@
PAD@
1 2
RH129
PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4
PCIE_PTX_DRX_N4 PCIE_PTX_DRX_P4
PCIE_PRX_DTX_N5 PCIE_PRX_DTX_P5
PCIE_PTX_DRX_N5 PCIE_PTX_DRX_P5
PCH_PCIE_IREF
TH32
TH33
PCH_PCIE_RCOMP
7.5K_0402_1%
1
1
PCIE_PRX_DTX_N437
LAN
WLAN
C C
PCIE_PRX_DTX_P437 PCIE_PTX_C_DRX_N437
PCIE_PTX_C_DRX_P437 PCIE_PRX_DTX_N540
PCIE_PRX_DTX_P540 PCIE_PTX_C_DRX_N540
PCIE_PTX_C_DRX_P540
1 2
CH15 .1U_0402_10V6-K
1 2
CH16 .1U_0402_10V6-K
1 2
CH17 .1U_0402_10V6-K
1 2
CH18 .1U_0402_10V6-K
Change RH128 to 0ohm jump
+1.5VS
+1.5VS
B B
@
PETP1/USB3TP3
AT31
PERN2/USB3RN4
AR31
PERP2/USB3RP4
BD33
PETN2/USB3TN4
BB33
PETP2/USB3TP4
AW33
PERN_3
AY33
PERP_3
BE34
PETN_3
BC34
PETP_3
AT33
PERN_4
AR33
PERP_4
BE36
PETN_4
BC36
PETP_4
AW36
PERN_5
AV36
PERP_5
BD37
PETN_5
BB37
PETP_5
AY38
PERN_6
AW38
PERP_6
BC38
PETN_6
BE38
PETP_6
AT40
PERN_7
AT39
PERP_7
BE40
PETN_7
BC40
PETP_7
AN38
PERN_8
AN39
PERP_8
BD42
PETN_8
BD41
PETP_8
BE30
PCIE_IREF
BC30
TP11
BB29
TP6
BD29
PCIE_RCOMP
LYNX-POINT-DH82LPMS_BGA695
LPT_PCH_M_EDS
REV = 5
PCIe
USB
9 OF 11
USB2N0 USB2P0 USB2N1 USB2P1 USB2N2 USB2P2 USB2N3 USB2P3 USB2N4 USB2P4 USB2N5 USB2P5 USB2N6 USB2P6 USB2N7 USB2P7 USB2N8 USB2P8 USB2N9 USB2P9
USB2N10
USB2P10
USB2N11
USB2P11
USB2N12
USB2P12
USB2N13
USB2P13
USB3RN1 USB3RP1 USB3TN1 USB3TP1 USB3RN2 USB3RP2 USB3TN2 USB3TP2 USB3RN5 USB3RP5 USB3TN5 USB3TP5 USB3RN6
USB3RP6 USB3TN6 USB3TP6
USBRBIAS#
USBRBIAS
TP24 TP23
OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43
OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14
B37
USB20_N0
D37
USB20_P0
A38
USB20_N1
C38
USB20_P1
A36
USB20_N2
C36
USB20_P2
A34 C34 B33
USB20_N4
D33
USB20_P4
F31
USB20_N5
G31
USB20_P5
K31 L31
Some PCH config not support USB port 6 & 7.
G29 H29 A32
USB20_N8
C32
USB20_P8
A30 C30 B29 D29 A28 C28 G26 F26 F24 G24
AR26 AP26 BE24 BD23 AW26 AV26 BD25 BC24 AW29 AV29 BE26 BC26 AR29 AP29 BD27 BE28
K24 K26
M33 L33
P3 V1 U2 P1 M3 T1 N2 M1
1
1
USB20_N10 USB20_P10
USB30_RX_N1 USB30_RX_P1 USB30_TX_N1
USB30_TX_P1 USB30_RX_N2 USB30_RX_P2 USB30_TX_N2
USB30_TX_P2
USBRBIAS
Within 500 mils
1 1
USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7#
TH28 TH29
TH30 TH31
USB20_N0 34 USB20_P0 34 USB20_N1 41 USB20_P1 41 USB20_N2 41 USB20_P2 41
USB20_N4 45 USB20_P4 45 USB20_N5 45 USB20_P5 45
USB20_N8 34 USB20_P8 34
PAD@ PAD@
USB20_N10 40 USB20_P10 40
USB30_RX_N1 41 USB30_RX_P1 41 USB30_TX_N1 41
USB30_TX_P1 41 USB30_RX_N2 41 USB30_RX_P2 41 USB30_TX_N2 41
USB30_TX_P2 41
1 2
RH127
22.6_0402_1% PAD@ PAD@
USB_OC1# 41 USB_OC2# 45
Camera LEFT USB (3.0)
LEFT USB (3.0)
Card reader RIGHT USB (2.0)
Touch screen
Debug port, reserved test point
Buletooth
USB3.0
USB_OC4# USB_OC7# USB_OC6# USB_OC3#
USB_OC0# USB_OC5# USB_OC2# USB_OC1#
LEFT USB
LEFT USB
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
RPH5
10K_1206_8P4R_5% RPH6
10K_1206_8P4R_5%
Port1
Port2
Port5
Port6
+3V_PCH
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
PCH (5/9) PCI, USB
PCH (5/9) PCI, USB
PCH (5/9) PCI, USB
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
1
of
of
of
18 61
18 61
18 61
1.1
1.1
1.1
5
CMOS_ON#34
1 2
+3VS
1 2
RH133
+3V_PCH
D D
C C
1 2
RH135
1 2
RH140 1K_0402_5%
@
Place CH82 close to R23
CMOS_ON#
CH82
0.01U_0402_25V7K
GPIO28 On-Die PLL Voltage Regulstor (Have internal Pull-High) High: VCCVRM VR Enable
*
Low: VCCVRM VR Disable
EC_SCI#
10K_0402_5%
EC_SMI#
10K_0402_5%
1
2
1 2
RH160 1K_0402_5%
@
GC6_EVENT#23,44
+3VS
+3VS
+3V_PCH
EC_LID_OUT#44
+3VS_VGA
DGPU_PWROK27,46,57,58
PCH_BT_DISABLE#40 ODD_EN42
PCIE_WAKE#15,37,40,44
PCH_BT_ON#40
+3V_PCH
PCH_GPIO28
RH132 10K_0402_5%
FB_CLAMP23,27,44
RH139 10K_0402_5% RH136 10K_0402_5%
RH137 10K_0402_5%@ RH138 10K_0402_5%
RH142 10K_0402_5%
RH144 10K_0402_5%
+3VS
RH147 10K_0402_5%
+3V_PCH
RH148 10K_0402_5%
+3VS
RH149 10K_0402_5%@
+3VS
RH151 10K_0402_5%
+3VS
RH154 10K_0402_5%
RH156
@
1 2
1 2
1 2 1 2
1 2 1 2
1 2 1 2
RH143
0_0402_5%
1 2
1 2
RH146
1 2 1 2 1 2
1 2 1 2
1 2
RH134
@
0_0402_5%
ODD_DETECT#42
RH131
0_0402_5%
EC_SCI#44 EC_SMI#44
10K_0402_5%
0_0402_5%
@
+3VS
@
@
1 2
4
RH130 0_0402_5%
GC6_EVENT#_R
PCH_GPIO1 PCH_GPIO6 EC_SCI# EC_SMI# PCH_GPIO12 EC_LID_OUT#
PCH_GPIO16 PCH_DGPU_PWROK PCH_BT_DISABLE#
DS3_WAKE#_R
PCH_GPIO28
PCH_BT_ON#
PCH_GPIO35
ODD_DETECT#
PCH_GPIO37 PCH_GPIO38 PCH_GPIO39 PCH_GPIO48 PCH_GPIO49 PCH_GPIO57 PCH_GPIO68 PCH_GPIO69 PCH_GPIO70 PCH_GPIO71
1 2
RH161
1 2
RH162
PCH_GPIO68CMOS_ON#
Change RH130,RH143 to 0ohm jump
UH1F
AT8
BMBUSY#/GPIO0
F13
TACH1/GPIO1
A14
TACH2/GPIO6
G15
TACH3/GPIO7
Y1
GPIO8
K13
LAN_PHY_PWR_CTRL/GPIO12
AB11
GPIO15
AN2
SATA4GP/GPIO16
C14
TACH0/GPIO17
BB4
SCLOCK/GPIO22
Y10
GPIO24
R11
GPIO27
AD11
GPIO28
AN6
GPIO34
AP1
GPIO35/NMI#
AT3
SATA2GP/GPIO36
AK1
SATA3GP/GPIO37
AT7
SLOAD/GPIO38
AM3
SDATAOUT0/GPIO39
AN4
SDATAOUT1/GPIO48
AK3
SATA5GP/GPIO49
U12
GPIO57
C16
TACH4/GPIO68
D13
TACH5/GPIO69
G13
TACH6/GPIO70
H15
TACH7/GPIO71
BE41
VSS_NCTF_1
BE5
VSS_NCTF_2
C45
VSS_NCTF_3
A5
VSS_NCTF_4
LYNX-POINT-DH82LPMS_BGA695
PCH_GPIO68
10K_0402_5%
PCH_GPIO69
10K_0402_5%
LPT_PCH_M_EDS
REV = 5
GPIO
3
CPU/Misc
AN10
TP14 PECI
RCIN#
PROCPWRGD
THRMTRIP#
PLTRST_PROC#
VSS_N10
VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8
VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21
6 OF 11
VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24
NCTF
GATEA20_PCH
AY1 AT6
KBRST#
AV3 AV1
PCH_THRMTRIP#_R H_THRMTRIP#
AU4
CPU_PLTRST#
N10
A2 A41 A43 A44 B1 B2 B44 B45 BA1 BC1 BD1 BD2 BD44 BD45 BE2 BE3 D1 E1 E45 A4
Change RH194 to 0ohm jump
1 2
RH141 10K_0402_5%
1 2
RH194
@
0_0402_5%
KBRST# 44
390_0402_5%
CPU_PLTRST# 6
H_CPUPWRGD 6
1 2
RH145
2
+3VS
GATEA20 44
H_THRMTRIP# 6
PCH_THRMTRIP#_R 23
SKU ID
PCH_GPIO6716
AS EMC request
KBRST#
.1U_0402_10V6-K
PCH_GPIO38 PCH_GPIO67 PCH_GPIO70 PCH_GPIO71
CH86
RH152
@
RH157
@
1
2
PCH_THRMTRIP#_R
+3VS
RH150
RH155
RH153
@
1 2
1 2
10K_0402_5%
RH158
RH159
@
1 2
1 2
10K_0402_5%
1 2
+3VS
RH163
@
1 2
10K_0402_5%
RH195
@
1 2
10K_0402_5%
1 2
RH234 1K_0402_5%@
@
1 2
10K_0402_5%
10K_0402_5%
@
1 2
10K_0402_5%
10K_0402_5%
KBRST#
10K_0402_5%
1
+1.05VS
PCH_GPIO27 (Have internal Pull-High) High: VCCVRM VR Enable
*
B B
A A
Low: VCCVRM VR Disable
+3VALW
1 2
RH166 10K_0402_5%
1 2
RH169
1 2
RH170
GPIO37 H Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality) L Disable Intel ME Crypto Transport Layer Security
*
(TLS) cipher suite (no confidentiality)
10K_0402_5%
10K_0402_5%
5
ODD_DETECT#
PCH_GPIO37
DS3_WAKE#_R
GPIO36 DMI RX termination Strap (Rising edge of PWROK)
If DMI is operating in DC-coupled mode (e.g. Client applications), then DMI RX is terminated to VSS and the value of this strap is ignored by the PCH and does not take effect.
USB3 1
+3VS
RH164 RH165
RH167 RH168
FixedSignals
USB3 2
4
USB3 5
1 2 1 2
1 2
@
1 2
@
USB3 6
PCH_GPIO16
10K_0402_5%
PCH_GPIO49
10K_0402_5%
PCH_GPIO16
10K_0402_5%
PCH_GPIO49
10K_0402_5%
Config
SATA4,SATA5
*
MuxedSignals
PCIE
PCIE
1
2
(00)
(00)
USB3
USB3
3
4
(01)
(01) (0b) (0b)
PCIE 3
FixedSignals
PCIE
PCIE
4
5
PCIE 6
PCIE 7
GPIO16,49
11
00PCIE1,PECI2
PCIE 8
MuxedSignals
SATA
SATA
4
5
(1b)
(1b)
PCIE
PCIE
1
2
3
Function
UMA 14"
UMA 15"
14" VRAM 900MHz
14"
VRAM 1GHz
FixedSignals
SATA
SATA 0
SATA
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
SATA
2
3
2012/12/14
2012/12/14
2012/12/14
15" VRAM 900MHz
15"
VRAM 1GHz
UMA 15"
Touch
VRAM 900MHz15"
15" VRAM 1GHz
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Touch
Touch
2012/12/21
2012/12/21
2012/12/21
PCH_GPIO38
PCH_GPIO67
00
10
10
1
PCH_GPIO70
0
10
0
0
011
1
1
1
PCH_GPIO71
0
0
0
0
0
0
1010
1110
1111
Title
Title
Title
PCH (6/9) GPIO, CPU, MISC
PCH (6/9) GPIO, CPU, MISC
PCH (6/9) GPIO, CPU, MISC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
401025
401025
401025
1
19 61
19 61
19 61
1.1
1.1
1.1
of
of
of
5
4
3
2
1
Close to PCH within 100mils
+VCCADAC
.01U_0402_16V7-K
CH19
1
D D
+1.05VS
J2
2
112
JUMP_43X39
+PCH_VCCDSW_R
1
2
+1.05VS
1U_0402_6.3V6K
CH41
1 2
RH172 0_0603_5%
@
RH173
1 2
C C
Change RH172 to 0ohm jump
B B
1.312 A
+1.05VS_PCH_VCC
+1.05VS_PCH_VCC
10U_0603_6.3V6M
1
CH24
2
670mA
+1.05VS_PCH_VCCASW
+1.05VS_PCH_VCCASW
+PCH_VCCDSW
5.11_0402_1%
UH1G
AA24
VCC[1]
1U_0402_6.3V6K
1
CH25
2
22U_0805_6.3V6M
1
CH29
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
2
1
2
1U_0402_6.3V6K
CH22
CH30
CH23
2
1U_0402_6.3V6K
1
CH31
2
+PCH_VCCDSW
AA26
VCC[2]
AD20
VCC[3]
AD22
VCC[4]
AD24
VCC[5]
AD26
VCC[6]
AD28
VCC[7]
AE18
VCC[8]
AE20
VCC[9]
AE22
VCC[10]
AE24
VCC[11]
AE26
VCC[12]
AG18
VCC[13]
AG20
VCC[14]
AG22
VCC[15]
AG24
VCC[16]
Y26
VCC[17]
U14
DCPSUSBYP
AA18
VCCASW[1]
U18
VCCASW[2]
U20
VCCASW[3]
U22
VCCASW[4]
U24
VCCASW[5]
V18
VCCASW[6]
V20
VCCASW[7]
V22
VCCASW[8]
V24
VCCASW[9]
Y18
VCCASW[10]
Y20
VCCASW[11]
Y22
VCCASW[12]
LYNX-POINT-DH82LPMS_BGA695
LPT_PCH_M_EDS
CRT DAC
HVCMOS
Core
USB3
PCIe/DMI
SATA
VCCMPHY
REV = 5
FDI
7 OF 11
VCCADAC1_5
VSSADAC
VCCADACBG3_3
VCCVRM[1]
VCCIO[1]
VCCIO[2]
VCC3_3_R30 VCC3_3_R32
DCPSUS1
VCCSUS3_3_AJ30 VCCSUS3_3_AJ32
DCPSUS3_AJ26 DCPSUS3_AJ28
VCCIO[3]
VCCVRM[2] VCCVRM[3]
VCCVRM[4]
VCCIO[4]
VCCVRM[5]
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
VCCIO[9]
VCCIO[10] VCCIO[11]
P45 P43 M31
BB44 AN34 AN35 R30
R32 Y12
+PCH_USB_DCPSUS1
AJ30
+3VPCH_PCH_VCCSUS3_3
AJ32 AJ26
+PCH_USB_DCPSUS3
AJ28 AK20 AK26 AK28
BE22 AK18 AN11 AK22 AM18
AM20 AM22 AP22 AR22 AT22
+3VS
2
+3VS_PCH_VCC3_3
+3VPCH_PCH_VCCSUS3_3
+1.05VS_PCH_VCCIO
+1.05VS_PCH_VCCIO
1U_0402_6.3V6K
1
1
CH36
2
2
1
2
1U_0402_6.3V6K
CH37
.1U_0402_10V6-K
CH20
1
2
70mA
10U_0603_6.3V6M
1
2
+1.05VS_PCH_VCCIO
1U_0402_6.3V6K
CH38
1
CH21
2
1U_0402_6.3V6K
1
CH35
2
RH171
1 2
10U_0603_6.3V6M
1_0603_1%
CH79
@
+3VS_PCH_VCC3_3
CH28
1
2
+1.05V_+1.5V_RUN
2
CH39
1
10U_0805_6.3V6M
+1.5VS
+1.05VS_PCH_VCCIO
.1U_0402_10V6-K
+1.05V_+1.5V_RUN
10U_0603_6.3V6M
1
10U_0603_6.3V6M
2
@
1
CH34
2
+PCH_USB_DCPSUS1
+PCH_USB_DCPSUS3
10U_0603_6.3V6M
@
1
CH42
2
+1.05V_+1.5V_RUN
1
1U_0402_6.3V6K
1
CH27
2
2
+1.05V_+1.5V_RUN
10U_0603_6.3V6M
@
1
CH32
2
@
CH33
1U_0402_6.3V6K
1
CH40
2
@
1U_0402_6.3V6K
1
CH43
2
@
10U_0603_6.3V6M
@
CH26
1 2
RH174
RH175
1 2
@
@
0_0402_5%
0_0603_5%
+1.05VS
+1.05VS
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
2012/12/14
2012/12/14
2012/12/14
3
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2012/12/21
2012/12/21
2012/12/21
2
Title
PCH (7/9) PWR
PCH (7/9) PWR
PCH (7/9) PWR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
1
of
of
of
20 61
20 61
20 61
1.1
1.1
1.1
5
4
3
2
1
+3VPCH_PCH_VCCSUS3_3
1U_0402_6.3V6K
1
CH68
2
LPT_PCH_M_EDS
USB
ICC
REV = 5
GPIO/LPC
Azalia
RTC
CPU
SPI
Fuse
Thermal
8 OF 11
1U_0402_6.3V6K
1
CH69
2
VCCSUS3_3_R20 VCCSUS3_3_R22
VCCDSW3_3
DCPSST
VCC3_3_AE14 VCC3_3_AF12 VCC3_3_AG14
VCCIO[16]
VCCSUSHDA
VCCSUS3_3_K8
VCCRTC
DCPRTC[1] DCPRTC[2]
V_PROC_IO[1] V_PROC_IO[2]
VCCSPI
VCC[19]
VCC[20] VCCASW[13] VCCASW[14]
VCCVRM[7] VCC3_3_AK30 VCC3_3_AK32
R20 R22
A16 AA14 AE14
AF12 AG14
U36
A26
K8 A6 P14
P16
AJ12 AJ14
AD12
P18 P20
L17 R18
AW40 AK30 AK32
1U_0402_6.3V6K
1
CH70
2
+PCH_VCCDSW3_3 +PCH_VCCSST
+PCH_DCPRTC
+PCH_VPROC
+PCH_VCCCFUSE
+1.05VS_PCH_VCCASW
+3VS_PCH_VCC3_3
12
CH47
.1U_0402_10V6-K
+1.05VS_PCH_VCCIO
CH55
12
.1U_0402_10V6-K
+3V_PCH_SPI
1
2
+1.05V_+1.5V_RUN
1
CH61 .1U_0402_10V6-K
2
1U_0402_6.3V6K
1
2
.1U_0402_10V6-K
CH44
2
1
1U_0402_6.3V6K
CH60
1U_0402_6.3V6K
1
CH71
CH72
2
+3VPCH_PCH_VCCSUS3_3
+RTCVCC
.1U_0402_10V6-K
CH56
CH57
2
2
1
1
CH45
2
1
+3VPCH_VCCSUSHDA
1U_0402_6.3V6K
.1U_0402_10V6-K
1
CH58
2
+PCH_VPROC
+PCH_VCCCFUSE
.1U_0402_10V6-K
1
2
2
1
1
2
1U_0402_6.3V6K
CH54
.1U_0402_10V6-K
CH62
1U_0402_6.3V6K
CH67
+3VPCH_PCH_VCCSUS3_3
+1.05VS
CH46
.1U_0402_10V6-K
2
D D
+1.05VS
1 2
RH178
0_0402_5%
C C
+3V_PCH +3VPCH_VCCSUSHDA
+3VS
+1.05VS
1 2
RH181 0_0402_5%
@
1 2
RH184 0_0402_5%
1 2
RH238 0_0402_5%@
1
@
+PCH_USB_DCPSUS2
4.7UH_LQM18FN4R7M00D_20%
LH1
1 2
1 2
RH180
0_0603_5%
@
1
2
@
1U_0402_6.3V6K
CH59
@
10mA
+3V_PCH_SPI+3V_PCH
22mA
CH48
.1U_0402_10V6-K
2
1
+3VS_PCH_VCC3_3
+1.05VS_PCH_VCCIO
CH49
.1U_0402_10V6-K
2
1
+PCH_VCC
PlacenearpinAP45
1U_0402_6.3V6K
1
2
10U_0603_6.3V6M
1
CH65
2
+1.05V_+1.5V_RUN
CH51
1U_0402_6.3V6K
1
CH66
2
10U_0603_6.3V6M
1
CH53
2
+PCH_USB_DCPSUS2
+PCH_VCCCLK
+PCH_VCCCLK3_3
+PCH_VCCCLK
+1.05VS
+PCH_VCC
306mA
1 2
RH185
0_0603_5%
@
UH1H
R24
VCCSUS3_3_R24
R26
VCCSUS3_3_R26
R28
VCCSUS3_3_R28
U26
VCCSUS3_3_U26
M24
VSS_USB
U35
VCCUSBPLL
L24
VCC3_3_L24
U30
VCCIO[12]
V28
VCCIO[13]
V30
VCCIO[14]
Y30
VCCIO[15]
Y35
DCPSUS2
AF34
VCCVRM[6]
AP45
VCC[18]
Y32
VCCCLK[1]
M29
VCCCLK3_3[1]
L29
VCCCLK3_3[2]
L26
VCCCLK3_3[3]
M26
VCCCLK3_3[4]
U32
VCCCLK3_3[5]
V32
VCCCLK3_3[6]
AD34
VCCCLK[2]
AA30
VCCCLK[3]
AA32
VCCCLK[4]
AD35
VCCCLK[5]
AG30
VCCCLK[6]
AG32
VCCCLK[7]
AD36
VCCCLK[8]
AE30
VCCCLK[9]
AE32
VCCCLK[10]
LYNX-POINT-DH82LPMS_BGA695
+PCH_VCCCLK
RH177 0_0402_5%
+3VS_PCH_VCC3_3
.1U_0402_10V6-K
CH52
2
1
.1U_0402_10V6-K
CH63
2
1
15mA
@
1 2
RH176
1
CH50 .01U_0402_16V7-K
2
1U_0402_6.3V6K
1
CH64
2
0_0402_5%
12
1 2
RH179
0_0402_5%
@
+3V_PCH +3VALW
+1.05VS
Change RH183,RH179 to 0ohm jump
1 2
RH182 0_0603_5%@
1 2
RH183 0_0603_5%@
+3VS +1.05VS
Change RH180,RH181,RH187,RH189,RH190,RH185,RH186 to 0ohm jump
B B
+1.05VS
112
JUMP_43X39
+1.5VS +1.05V_+1.5V_RUN
1 2
+1.05VS
+3V_PCH +3VPCH_PCH_VCCSUS3_3
A A
@
1 2
1 2
1 2
5
J3
RH187 0_0603_5% RH188
@
RH189
0_0603_5%
@
RH190 0_0603_5%
@
2
0_0603_5%
+3VS_PCH_VCC3_3+3VS
+1.05VS_PCH_VCCIO
3.629A
183mA
261mA
133mA
+3VS
4
PlacenearpinY32,AA30,AA32 PlacenearpinAD34 PlacenearpinAD35,AD36
55mA
1 2
RH186 0_0402_5%
@
+PCH_VCCCLK3_3
1U_0402_6.3V6K
1
CH73
2
1U_0402_6.3V6K
1
CH74
2
PlacenearpinM29 PlacenearpinL29 PlacenearpinL26,M26 PlacenearpinU32,V32
3
PlacenearpinAG30,AG32,AE30,AE32
1U_0402_6.3V6K
1
CH75
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
1U_0402_6.3V6K
1
2
2012/12/14
2012/12/14
2012/12/14
CH76
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
Title
Title
PCH (8/9) PWR
PCH (8/9) PWR
PCH (8/9) PWR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
401025
401025
401025
1
21 61
21 61
21 61
of
of
of
1.1
1.1
1.1
5
D D
4
3
2
1
LPT_PCH_M_EDS
UH1J
AL34
VSS[1]
AL38
VSS[2]
AL8
VSS[3]
AM14
VSS[4]
AM24
VSS[5]
AM26
VSS[6]
AM28
VSS[7]
AM30
VSS[8]
AM32
VSS[9]
AM16
VSS[10]
AN36
VSS[11]
AN40
C C
B B
VSS[12]
AN42
VSS[13]
AN8
VSS[14]
AP13
VSS[15]
AP24
VSS[16]
AP31
VSS[17]
AP43
VSS[18]
AR2
VSS[19]
AK16
VSS[20]
AT10
VSS[21]
AT15
VSS[22]
AT17
VSS[23]
AT20
VSS[24]
AT26
VSS[25]
AT29
VSS[26]
AT36
VSS[27]
AT38
VSS[28]
D42
VSS[29]
AV13
VSS[30]
AV22
VSS[31]
AV24
VSS[32]
AV31
VSS[33]
AV33
VSS[34]
BB25
VSS[35]
AV40
VSS[36]
AV6
VSS[37]
AW2
VSS[38]
F43
VSS[39]
AY10
VSS[40]
AY15
VSS[41]
AY20
VSS[42]
AY26
VSS[43]
AY29
VSS[44]
AY7
VSS[45]
B11
VSS[46]
B15
VSS[47]
LYNX-POINT-DH82LPMS_BGA695
REV = 5
VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92]
10 OF 11
K39 L2 L44 M17 M22 N12 N35 N39 N6 P22 P24 P26 P28 P30 P32 R12 R14 R16 R2 R34 R38 R44 R8 T43 U10 U16 U28 U34 U38 U42 U6 V14 V16 V26 V43 W2 W44 Y14 Y16 Y24 Y28 Y34 Y36 Y40 Y8
AA16 AA20 AA22 AA28
AB12 AB34 AB38
AC44 AD14 AD16 AD18 AD30 AD32 AD40
AE16 AE28 AF38
AG16 AG26
AG28 AG44
AJ16 AJ18 AJ20 AJ22 AJ24 AJ34 AJ38
AK14 AK24 AK43 AK45
AL12
BC22 BB42
AA4
AB8 AC2
AD6 AD8
AF8 AG2
AJ6 AJ8
AL2
LPT_PCH_M_EDS
UH1K
VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98] VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129 VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137]
LYNX-POINT-DH82LPMS_BGA695
REV = 5
VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182]
11 OF 11
B19 B23 B27 B31 B35 B39 B7 BA40 BD11 BD15 BD19 AY36 AT43 BD31 BD35 BD39 BD7 D25 AV7 F15 F20 F29 F33 BC16 D4 G2 G38 G44 G8 H10 H13 H17 H22 H24 H26 H31 H36 H40 H7 K10 K15 K20 K29 K33 BC28
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
PCH (9/9) VSS
PCH (9/9) VSS
PCH (9/9) VSS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
1
of
of
of
22 61
22 61
22 61
1.1
1.1
1.1
5
4
3
2
1
UV1A
PEX_RX0 PEX_RX0_N PEX_RX1 PEX_RX1_N PEX_RX2 PEX_RX2_N PEX_RX3 PEX_RX3_N PEX_RX4 PEX_RX4_N PEX_RX5 PEX_RX5_N PEX_RX6 PEX_RX6_N PEX_RX7 PEX_RX7_N NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16
PEX_TX0 PEX_TX0_N PEX_TX1 PEX_TX1_N PEX_TX2 PEX_TX2_N PEX_TX3 PEX_TX3_N PEX_TX4 PEX_TX4_N PEX_TX5 PEX_TX5_N PEX_TX6 PEX_TX6_N PEX_TX7 PEX_TX7_N NC17 NC18 NC19 NC20 NC21 NC22 NC23 NC24 NC25 NC26 NC27 NC28 NC29 NC30 NC31 NC32
PEX_REFCLK PEX_REFCLK_N PEX_CLKREQ_N
PEX_TSTCLK_OUT PEX_TSTCLK_OUT_N
PEX_RST_N PEX_TERMP
FB_CLAMP_MON
RV94 10K_0402_5%
GC6@
Part 1 of 6
DACsI2C GPIO
PCI EXPRESS
CLK
3
PEX_TERMP
AG6 AG7 AF7 AE7 AE9 AF9 AG9
AG10
AF10 AE10 AE12
AF12 AG12 AG13
AF13
AE13
AE15
AF15 AG15 AG16
AF16
AE16
AE18
AF18 AG18 AG19
AF19
AE19
AE21
AF21 AG21 AG22
AC9 AB9
AB10 AC10 AD11 AC11 AC12
AB12
AB13 AC13 AD14 AC14 AC15
AB15
AB16 AC16 AD17 AC17 AC18
AB18
AB19 AC19 AD20 AC20 AC21
AB21 AD23
AE23
AF24
AE24 AG24 AG25
AE8 AD8 AC6
AF22
AE22
AC7
AF25
N14M-LP-S-A2_FCBGA595
OPT@
12
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_N[0..15]5 PCIE_CTX_C_GRX_P[0..15]5
PCIE_CRX_GTX_N[0..15]5 PCIE_CRX_GTX_P[0..15]5
D D
RV3
2.2K_0402_5%
OPT@
1 2
1 2
VGA_SMB_CK2
VGA_SMB_DA2
C C
PLT_RST#14,37,40,44
DGPU_HOLD_RST#14
B B
DGPU_PWR_EN14,46
CLK_REQ_GPU#_R16
A A
DGPU_PWR_EN
RV4
2.2K_0402_5%
OPT@
G
2
S
61
D
QV4A 2N7002KDWH_SOT363-6
OPT@
PLT_RST#
DGPU_HOLD_RST#
5
+3VS_VGA+3VS_VGA
G
5
S
34
D
QV4B 2N7002KDWH_SOT363-6
OPT@
PU AT EC SIDE, +3VS AND 4.7K
1
CV181 .1U_0402_10V6-K
2
OPT@
2
B
1
A
NC7SZ08P5X_NL_SC70-5
OPT@
+3VS_VGA
RV93
12
10K_0402_5%
OPT@
1
CV210
OPT@
2
.1U_0402_10V6-K
1 3
D
QV8 2N7002KW_SOT323-3
OPT@
1 2
EC_SMB_CK2 17,39,44
EC_SMB_DA2 17,39,44
+3VGARST
5
UV11
P
4
Y
G
3
1 2
RV91 10K_0402_5%
@
1 2
2
G
S
RV98
0_0402_5%@
RV110 0_0402_5%@
RV109 0_0402_5%OPT@
RV107
0_0402_5%@
+3VS_VGA
PLT_RST_VGA#
PLT_RST_VGA#
RV75 10K_0402_5%
OPT@
1 2
RV95 10K_0402_5%
OPT@
1 2
RV97 10K_0402_5%
@
1 2
12
12
CLK_REQ_GPU#
PCIE_CRX_GTX_P15 PCIE_CRX_GTX_N15 PCIE_CRX_GTX_P14 PCIE_CRX_GTX_N14 PCIE_CRX_GTX_P13 PCIE_CRX_GTX_N13 PCIE_CRX_GTX_P12 PCIE_CRX_GTX_N12
+3VS
PCIE_CRX_GTX_P11 PCIE_CRX_GTX_N11 PCIE_CRX_GTX_P10 PCIE_CRX_GTX_N10 PCIE_CRX_GTX_P9
+3VS_VGA
PCIE_CRX_GTX_N9 PCIE_CRX_GTX_P8 PCIE_CRX_GTX_N8 PCIE_CRX_GTX_P7 PCIE_CRX_GTX_N7 PCIE_CRX_GTX_P6 PCIE_CRX_GTX_N6 PCIE_CRX_GTX_P5 PCIE_CRX_GTX_N5 PCIE_CRX_GTX_P4 PCIE_CRX_GTX_N4 PCIE_CRX_GTX_P3 PCIE_CRX_GTX_N3 PCIE_CRX_GTX_P2 PCIE_CRX_GTX_N2 PCIE_CRX_GTX_P1 PCIE_CRX_GTX_N1 PCIE_CRX_GTX_P0 PCIE_CRX_GTX_N0
Differential signal
2
DGPU_PWR_EN FB_CLAMP
G
CV160 0.22U_0402_10V6KOPT@ CV161 0.22U_0402_10V6KOPT@ CV162 0.22U_0402_10V6KOPT@ CV163 0.22U_0402_10V6KOPT@ CV164 0.22U_0402_10V6KOPT@ CV165 0.22U_0402_10V6KOPT@ CV166 0.22U_0402_10V6KOPT@ CV167 0.22U_0402_10V6KOPT@ CV168 0.22U_0402_10V6KOPT@ CV169 0.22U_0402_10V6KOPT@ CV170 0.22U_0402_10V6KOPT@ CV171 0.22U_0402_10V6KOPT@ CV172 0.22U_0402_10V6KOPT@ CV173 0.22U_0402_10V6KOPT@ CV174 0.22U_0402_10V6KOPT@ CV175 0.22U_0402_10V6KOPT@ CV176 0.22U_0402_10V6K@ CV177 0.22U_0402_10V6K@ CV178 0.22U_0402_10V6K@ CV179 0.22U_0402_10V6K@ CV180 0.22U_0402_10V6K@ CV182 0.22U_0402_10V6K@ CV183 0.22U_0402_10V6K@ CV184 0.22U_0402_10V6K@ CV185 0.22U_0402_10V6K@ CV186 0.22U_0402_10V6K@ CV187 0.22U_0402_10V6K@ CV188 0.22U_0402_10V6K@ CV189 0.22U_0402_10V6K@ CV190 0.22U_0402_10V6K@ CV191 0.22U_0402_10V6K@ CV192 0.22U_0402_10V6K@
+3VS
12
RV90 10K_0402_5%
GC6@
RV108 1K_0402_5%GC6@
13
D
QV7
S
2N7002KW_SOT323-3
GC6@
4
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
CLK_PCIE_VGA16
CLK_PCIE_VGA#16
1 2
1 2
PCIE_CTX_C_GRX_N15 PCIE_CTX_C_GRX_P14 PCIE_CTX_C_GRX_N14 PCIE_CTX_C_GRX_P13 PCIE_CTX_C_GRX_N13 PCIE_CTX_C_GRX_P12 PCIE_CTX_C_GRX_N12 PCIE_CTX_C_GRX_P11 PCIE_CTX_C_GRX_N11 PCIE_CTX_C_GRX_P10 PCIE_CTX_C_GRX_N10 PCIE_CTX_C_GRX_P9 PCIE_CTX_C_GRX_N9 PCIE_CTX_C_GRX_P8 PCIE_CTX_C_GRX_N8 PCIE_CTX_C_GRX_P7 PCIE_CTX_C_GRX_N7 PCIE_CTX_C_GRX_P6 PCIE_CTX_C_GRX_N6 PCIE_CTX_C_GRX_P5 PCIE_CTX_C_GRX_N5 PCIE_CTX_C_GRX_P4 PCIE_CTX_C_GRX_N4 PCIE_CTX_C_GRX_P3 PCIE_CTX_C_GRX_N3 PCIE_CTX_C_GRX_P2 PCIE_CTX_C_GRX_N2 PCIE_CTX_C_GRX_P1 PCIE_CTX_C_GRX_N1 PCIE_CTX_C_GRX_P0 PCIE_CTX_C_GRX_N0
PCIE_CRX_C_GTX_P15 PCIE_CRX_C_GTX_N15 PCIE_CRX_C_GTX_P14 PCIE_CRX_C_GTX_N14 PCIE_CRX_C_GTX_P13 PCIE_CRX_C_GTX_N13 PCIE_CRX_C_GTX_P12 PCIE_CRX_C_GTX_N12 PCIE_CRX_C_GTX_P11 PCIE_CRX_C_GTX_N11 PCIE_CRX_C_GTX_P10 PCIE_CRX_C_GTX_N10 PCIE_CRX_C_GTX_P9 PCIE_CRX_C_GTX_N9 PCIE_CRX_C_GTX_P8 PCIE_CRX_C_GTX_N8 PCIE_CRX_C_GTX_P7 PCIE_CRX_C_GTX_N7 PCIE_CRX_C_GTX_P6 PCIE_CRX_C_GTX_N6 PCIE_CRX_C_GTX_P5 PCIE_CRX_C_GTX_N5 PCIE_CRX_C_GTX_P4 PCIE_CRX_C_GTX_N4 PCIE_CRX_C_GTX_P3 PCIE_CRX_C_GTX_N3 PCIE_CRX_C_GTX_P2 PCIE_CRX_C_GTX_N2 PCIE_CRX_C_GTX_P1 PCIE_CRX_C_GTX_N1 PCIE_CRX_C_GTX_P0 PCIE_CRX_C_GTX_N0
CLK_PCIE_VGA CLK_PCIE_VGA#
CLK_REQ_GPU#
PEX_TSTCLK_OUT
RV81
PEX_TSTCLK_OUT# XTAL_IN
200_0402_1%@
PLT_RST_VGA#
1 2
RV85
2.49K_0402_1%OPT@
13
D
2
G
LP2301ALT1G_SOT23-3
S
QV6
GC6@
1
CV193
GC6@
2
.1U_0402_10V6-K
C6
GPIO0
B2
GPIO1
D6
GPIO2
C7
GPIO3
F9
GPIO4
A3
GPIO5
A4
GPIO6
B6
GPIO7
A6
GPIO8
F8
GPIO9
C5
GPIO10
E7
GPIO11
D7
GPIO12
B4
GPIO13
B3
GPIO14
C3
GPIO15
D5
GPIO16
D4
GPIO17
C2
GPIO18
F7
GPIO19
E6
GPIO20
C4
GPIO21
AB6
NC33
AG3
DACA_RED
AF4
DACA_GREEN
AF3
DACA_BLUE
AE3
DACA_HSYNC
AE4
DACA_VSYNC
W5
DACA_VDD
AE2
DACA_VREF
AF2
DACA_RSET
B7
VGA_CRT_CLK
I2CA_SCL
A7
VGA_CRT_DATA
I2CA_SDA
C9
I2CB_SCL
I2CB_SCL
C8
I2CB_SDA
I2CB_SDA
A9
I2CC_SCL
I2CC_SCL
B9
I2CC_SDA
I2CC_SDA
D9
VGA_SMB_CK2
I2CS_SCL
D8
VGA_SMB_DA2
I2CS_SDA
60mA
L6
CORE_PLLVDD
SP_PLLVDD
VID_PLLVDD
XTAL_OUTBUFF
+PLLVDD
M6
45mA
N6
45mA
C11
XTAL_IN
B10
XTAL_OUT
A10
XTALSSIN
XTAL_SSIN
C10
XTALOUT
change YV1 from SJ10000HZ00 to SJ10000G700 (S CRYSTAL 27MHZ 10PF +-10PPM 7V27000050) as PPM sugest. SJ10000G700 no symbol and footprint, with SJ10000G500(S CRYSTAL 25MHZ 10PF +-20PPM 7V25000014) instead.
XTAL_IN
10P_0402_50V8J
1
2
1 2
FB_CLAMP_TOGGLE_REQ# OVERT#
VGA_ALERT# NVVDD PWM_VID
VGA_AC_DET_R DPRSLPVR_VGA_R
+DACA_VDD
RV72 10K_0402_5%@
RV1
0_0402_5%@
NVVDD PWM_VID 58
1 2
12
I2C,if not use, can be soft grounded and delete pull up resistor ---colin
0_0402_5%@
OPT@
RV103
FB_CLAMPFB_CLAMP_MON
DV1
12
RB751V-40_SOD323-2
DPRSLPVR_VGA
VGA_AC_DET 44
DPRSLPVR_VGA 58
PLT_RST_VGA#
FB_CLAMP 19,27,44
1 2
RV10 0_0402_5%
Internal Thermal Sensor
1 2
RV76
0_0402_5%@
XTAL_OUT
1 2
RV84 10K_0402_5%OPT@
1 2
RV87 10K_0402_5%OPT@
1 2
10M_0402_5%OPT@
YV1
1
OSC1
GND2
GND12OSC2
CV196
27MHZ_10PF_7V27000050
OPT@
OPT@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
+SP_PLLVDD
RV92
4 3
XTAL_OUT
10P_0402_50V8J
1
CV197
OPT@
2
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
2012/12/14
2012/12/14
2012/12/14
Deciphered Date
Deciphered Date
Deciphered Date
2
OVERT#
1
2
.1U_0402_10V6-K
FB_CLAMP_TOGGLE_REQ#
Under GPU(below 150mils)
+SP_PLLVDD
150mA
+PLLVDD
0.1U_0402_10V7K
Under GPU Near GPU
CV223
@
OVERT# VGA_ALERT# VGA_AC_DET_R DPRSLPVR_VGA VGA_CRT_DATA VGA_CRT_CLK I2CB_SCL I2CB_SDA I2CC_SCL I2CC_SDA
1
CV4
2
OPT@
0.1U_0402_10V7K
CV194
OPT@
2012/12/21
2012/12/21
2012/12/21
2
G
2
G
0.1U_0402_10V7K
+3VS_VGA
1
CV1
2
OPT@
1
2
+3VS_VGA
12
61
D
S
13
D
S
RV73 10K_0402_5%
OPT@
1 2
RV2 10K_0402_5%
OPT@
QV1A 2N7002KDWH_SOT363-6
OPT@
QV2 2N7002KW_SOT323-3
OPT@
RV82 RV74 RV83 RV89 RV77 RV78 RV79 RV80 RV86 RV88
1
2
OPT@
4.7U_0402_6.3V6M
1
2
PCH_THRMTRIP#_R
34
D
5
G
QV1B
S
2N7002KDWH_SOT363-6
OPT@
1 2
RV106 0_0402_5%
G
2
.1U_0402_10V6-K
13
D
S
QV5 2N7002KW_SOT323-3
OPT@
+3VS_VGA
1 2
10K_0402_5%OPT@
1 2
2.2K_0402_5%OPT@
1 2
10K_0402_5%OPT@
1 2
10K_0402_5%OPT@
1 2
2.2K_0402_5%OPT@
1 2
2.2K_0402_5%OPT@
1 2
2.2K_0402_5%OPT@
1 2
2.2K_0402_5%OPT@
1 2
2.2K_0402_5%OPT@
1 2
2.2K_0402_5%OPT@
180ohms (ESR=0.2) Bead
1 2
PBY160808T-181Y-N_2P
1
CV3
CV2
OPT@
2
OPT@
22U_0805_6.3V6M
30ohms (ESR=0.05) Bead
1 2
PBY160808T-300Y-N_2P
OPT@
CV195 22U_0805_6.3V6M
OPT@
Title
Title
Title
N14P_PCIE/ DAC/ GPIO
N14P_PCIE/ DAC/ GPIO
N14P_PCIE/ DAC/ GPIO
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
1
2
CV222
@
LV1
LV4
1
PCH_THRMTRIP#_R 19
PLT_RST_VGA#
+1.05VS_VGA
401025
401025
401025
GC6_EVENT# 19,44
+1.05VS_VGA
23 61
23 61
23 61
1.1
1.1
1.1
of
of
of
5
4
3
2
1
D D
C C
B B
UV1C
AC3
IFPA_TXC
AC4
IFPA_TXC_N
Y4
IFPA_TXD0
Y3
IFPA_TXD0_N
AA3
IFPA_TXD1
AA2
IFPA_TXD1_N
AB1
IFPA_TXD2
AA1
IFPA_TXD2_N
AA4
IFPA_TXD3
AA5
IFPA_TXD3_N
AB5
IFPB_TXC
AB4
IFPB_TXC_N
AB3
IFPB_TXD4
AB2
IFPB_TXD4_N
AD3
IFPB_TXD5
AD2
IFPB_TXD5_N
AE1
IFPB_TXD6
AD1
IFPB_TXD6_N
AD4
IFPB_TXD7
AD5
IFPB_TXD7_N
T2
IFPC_L0
T3
IFPC_L0_N
T1
IFPC_L1
R1
IFPC_L1_N
R2
IFPC_L2
R3
IFPC_L2_N
N2
IFPC_L3
N3
IFPC_L3_N
V3
IFPD_L0
V4
IFPD_L0_N
U3
IFPD_L1
U4
IFPD_L1_N
T4
IFPD_L2
T5
IFPD_L2_N
R4
IFPD_L3
R5
IFPD_L3_N
N1
NC34
M1
NC35
M2
NC36
M3
NC37
K2
NC38
K3
NC39
K1
NC40
J1
NC41
M4
NC42
M5
NC43
L3
NC44
L4
NC45
K4
NC46
K5
NC47
J4
NC48
J5
NC49
N4
IFPC_AUX_I2CW_SCL
N5
IFPC_AUX_I2CW_SDA_N
P3
IFPD_AUX_I2CX_SCL
P4
IFPD_AUX_I2CX_SDA_N
J2
IFPE_AUX_I2CY_SCL
J3
IFPE_AUX_I2CY_SDA_N
H3
IFPF_AUX_I2CZ_SCL
H4
IFPF_AUX_I2CZ_SDA_N
N14M-LP-S-A2_FCBGA595
OPT@
Part 3 of 6
MULTI_STRAP_REF0_GND
LVDS/TMDS
NC50 NC51 NC52 NC53 NC54 NC55 NC56 NC57 NC58
NC
NC59 NC60 NC61 NC62 NC63 NC64 NC65 NC66 NC67 NC68
BUFRST_N
NC69 NC70 NC71 NC72
STRAP0 STRAP1
GENERAL
STRAP2 STRAP3 STRAP4
NC73
NC74 NC75
THERMDP THERMDN
VDD_SENSE
GND_SENSE
TEST
TESTMODE
JTAG_TCK
JTAG_TDI JTAG_TDO JTAG_TMS
JTAG_TRST_N
SERIAL
ROM_CS_N
ROM_SI
ROM_SO
ROM_SCLK
F11 AD10 AD7 B19 V5 V6 G1 G2 G3 G4 G5 G6 G7 V1 V2 W1 W2 W3 W4
D11 D10 E9 E10 F10
D1 D2 E4 E3 D3 C1
F6 F4 F5
F12 E12
F2
F1
AD9 AE5 AE6 AF6 AD6 AG4
D12 B12 A12 C12
12
RV7
10K_0402_5%@
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
1 2
RV8
40.2K_0402_1%N14PGV2@
VCCSENSE_VGA
trace width: 16mils differential voltage sensing. differential signal routing.
VSSSENSE_VGA
TESTMODE
ROM_SI ROM_SO ROM_SCLK
1 2
OPT@
1
@
TV1
1
@
TV2
1
@
TV3
1
@
TV4
1 2
1
@
TV5
ROM_SI 32 ROM_SO 32 ROM_SCLK 32
STRAP0 32 STRAP1 32 STRAP2 32 STRAP3 32 STRAP4 32
VCCSENSE_VGA 58
VSSSENSE_VGA 58
RV5
10K_0402_5%
RV6
10K_0402_5%OPT@
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
N14P_LVDS/ HDMI/ THERM
N14P_LVDS/ HDMI/ THERM
N14P_LVDS/ HDMI/ THERM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
401025
401025
401025
1
of
of
of
24 61
24 61
24 61
1.1
1.1
1.1
5
D D
4
3
2
1
CV21
CV31
CV45
1
2
OPT@
1U_0402_6.3V6K
1
2
OPT@
22U_0805_6.3V6M
1
2
OPT@
.1U_0402_10V6-K
1
2
OPT@
4.7U_0603_6.3V6K
Near GPU
1
CV23
CV22
2
OPT@
4.7U_0603_6.3V6K
+1.05VS_VGA
CV32
1
CV48
2
OPT@
.1U_0402_10V6-K
1
CV46
2
OPT@
4.7U_0603_6.3V6K
Place near balls
OPT@
4.7U_0603_6.3V6K
CV49
CV47
1
CV24
2
10U_0805_6.3V6M
1
CV216
2
OPT@
.1U_0402_10V6-K
+3VS_VGA
1
2
OPT@
.1U_0402_10V6-K
2
1
OPT@
1U_0402_6.3V6K
2
CV26
CV25
1
OPT@
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
CV50
CV51
2
2
OPT@
OPT@
4.7U_0603_6.3V6K
CALIBRATION PIN FB_CAL_x_PD_VDDQ FB_CAL_x_PU_GND FB_CAL_xTERM_GND
120ohm (ESR=0.18) Bead
1
1
CV52
CV53
2
2
OPT@
OPT@
1U_0603_25V6M
4.7U_0805_25V6-K
+1.05VS_VGA
2
2
CV27
CV28
1
1
OPT@
OPT@
10U_0805_6.3V6M
+3VS_VGA
12
RV9
@
0_0603_5%
Change RV9 to 0ohm jump
12
HCB1608KF-121T30_0603
N14MGE@
CV54
12
RV15
0_0603_5%N14PGV2@
DDR3
40.2Ohm
42.2Ohm
51.1Ohm
+1.05VS_VGA
LV5
+1.5VS_VGA
C C
B B
22U_0805_6.3V6M
1
2
OPT@
CV8
Near GPU
2
CV6
1
10U_0805_6.3V6M
OPT@
Under GPU(below 150mils)
4.7U_0603_6.3V6K
1
2
OPT@
CV9
@
@
4.7U_0603_6.3V6K
DV2
1 2
DV3
1 2
1
1
CV10
2
2
OPT@
OPT@
1U_0603_25V6M
Follow NV advice reserved next phase can be delete ---Colin
RB751V-40_SOD323-2
RB751V-40_SOD323-2
1
CV34
CV35
2
OPT@
1U_0603_25V6M
RV23 10K_0402_5%
RV96 10K_0402_5%
RV99 10K_0402_5%
RV100 10K_0402_5%
RV101 10K_0402_5%
RV102 10K_0402_5%
+1.5VS_VGA+3VS_VGA
+VGA_CORE
1
CV39
2
0.1U_0402_10V7K
OPT@
1 2
@
1 2
@
1 2
@
1 2
@
1 2
@
1 2
@
1
CV40
2
0.1U_0402_10V7K
OPT@
3.5A
UV1D
B26
FBVDDQ_01
C25
FBVDDQ_02
E23
FBVDDQ_03
E26
FBVDDQ_04
F14
FBVDDQ_05
F21
FBVDDQ_06
G13
FBVDDQ_07
G14
FBVDDQ_08
G15
FBVDDQ_09
G16
FBVDDQ_10
G18
FBVDDQ_11
G19
FBVDDQ_12
G20
FBVDDQ_13
G21
FBVDDQ_14
H24
FBVDDQ_15
H26
FBVDDQ_16
J21
FBVDDQ_17
K21
FBVDDQ_18
L22
FBVDDQ_19
L24
FBVDDQ_20
L26
FBVDDQ_21
M21
FBVDDQ_22
N21
FBVDDQ_23
R21
FBVDDQ_24
T21
FBVDDQ_25
V21
FBVDDQ_26
W21
FBVDDQ_27
V7
IFPAB_PLLVDD_1
W7
IFPAB_PLLVDD_2
AA6
IFPAB_RSET
W6
IFPA_IOVDD
Y6
IFPB_IOVDD
M7
IFPC_PLLVDD_1
N7
IFPC_PLLVDD_2
T6
IFPC_RSET
P6
IFPC_IOVDD
T7
IFPD_PLLVDD_2
R7
IFPD_PLLVDD_1
U6
IFPD_RSET
R6
IFPD_IOVDD
J7
NC76
K7
NC77
K6
NC78
H6
NC79
J6
NC80
N14M-LP-S-A2_FCBGA595
OPT@
Part 4 of 6
PEX_IOVDDQ_1 PEX_IOVDDQ_2 PEX_IOVDDQ_3 PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8
PEX_IOVDDQ_9 PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13 PEX_IOVDDQ_14
PEX_IOVDD_1 PEX_IOVDD_2 PEX_IOVDD_3 PEX_IOVDD_4 PEX_IOVDD_5 PEX_IOVDD_6
POWER
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
PEX_PLL_HVDD_1 PEX_PLL_HVDD_2
PEX_SVDD_3V3
PEX_PLLVDD_1
PEX_PLLVDD_2
VDD33_1 VDD33_2 VDD33_3 VDD33_4
2000mA
AA10 AA12 AA13 AA16 AA18 AA19 AA20 AA21 AB22 AC23 AD24 AE25 AF26 AF27
AA22 AB23 AC24 AD25 AE26 AE27
G10 G12 G8 G9
D22
C24
B25
Place near balls
AA8 AA9
AB8
120mA
AA14 AA15
1
CV19
2
OPT@
1U_0402_6.3V6K
Under GPU(below 150mils)
1
CV29
2
OPT@
22U_0805_6.3V6M
+VDD33
1 2
RV12
40.2_0402_1%OPT@
1 2
RV13
42.2_0402_1%OPT@
1 2
RV14
51.1_0402_1%OPT@
1
1
CV20
2
2
OPT@
OPT@
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CV30
2
2
OPT@
OPT@
22U_0805_6.3V6M
22U_0805_6.3V6M
Place near balls(Under GPU) Place near GPU
+1.5VS_VGA
Under GPU(below 150mils)
1
2
OPT@
+PEX_PLLVDD
.1U_0402_10V6-K
Reserved Diode ---Colin
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
N14P_Power
N14P_Power
N14P_Power
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
401025
401025
401025
1
of
of
of
25 61
25 61
25 61
1.1
1.1
1.1
5
D D
4
3
2
1
UV1E
A2
A26 AB11 AB14 AB17 AB20 AB24
AC2 AC22 AC26
AC5
AC8 AD12 AD13 AD15 AD16 AD18 AD19 AD21 AD22 AE11 AE14 AE17
C C
B B
AE20
AF1
AF11 AF14 AF17 AF20 AF23
AF5
AF8
AG2
AG26
B1 B11 B14 B17 B20 B23 B27
B5
B8 E11 E14 E17
E2 E20 E22 E25
E5
E8
H2 H23 H25
H5
N14M-LP-S-A2_FCBGA595
OPT@
GND_001 GND_002 GND_003 GND_004 GND_005 GND_006 GND_007 GND_008 GND_009 GND_010 GND_011 GND_012 GND_013 GND_014 GND_015 GND_016 GND_017 GND_018 GND_019 GND_020 GND_021 GND_022 GND_023 GND_024 GND_025 GND_026 GND_027 GND_028 GND_029 GND_030 GND_031 GND_032 GND_033 GND_034 GND_035 GND_036 GND_037 GND_038 GND_039 GND_040 GND_041 GND_042 GND_043 GND_044 GND_045 GND_046 GND_047 GND_048 GND_049 GND_050 GND_051 GND_052 GND_053 GND_054 GND_055 GND_056
Part 5 of 6
GND
GND_057 GND_058 GND_059 GND_060 GND_061 GND_062 GND_063 GND_064 GND_065 GND_066 GND_067 GND_068 GND_069 GND_070 GND_071 GND_072 GND_073 GND_074 GND_075 GND_076 GND_077 GND_078 GND_079 GND_080 GND_081 GND_082 GND_083 GND_084 GND_085 GND_086 GND_087 GND_088 GND_089 GND_090 GND_091 GND_092 GND_093 GND_094 GND_095 GND_096 GND_097 GND_098 GND_099 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112
GND_113 GND_114
K11 K13 K15 K17 L10 L12 L14 L16 L18 L2 L23 L25 L5 M11 M13 M15 M17 N10 N12 N14 N16 N18 P11 P13 P15 P17 P2 P23 P26 P5 R10 R12 R14 R16 R18 T11 T13 T15 T17 U10 U12 U14 U16 U18 U2 U23 U26 U5 V11 V13 V15 V17 Y2 Y23 Y26 Y5
AA7 AB7
+VGA_CORE
Under GPU
1
CV5
2
4.7U_0603_6.3V6K
OPT@
1
CV13
2
0.1U_0402_10V7K
OPT@
1
CV7
2
4.7U_0603_6.3V6K
OPT@
1
CV17
2
22U_0805_6.3V6M
OPT@
Near GPU
1
CV43
2
4.7U_0603_6.3V6K
OPT@
1
CV205
2
0.1U_0402_10V7K
OPT@
1
CV15
2
4.7U_0603_6.3V6K
OPT@
1
CV16
2
47U_0805_4V6-M
OPT@
1
CV44
2
4.7U_0603_6.3V6K
OPT@
1
CV206
2
0.1U_0402_10V7K
OPT@
1
CV33
2
4.7U_0603_6.3V6K
OPT@
1
CV198
2
4.7U_0603_6.3V6K
OPT@
1
CV207
2
0.1U_0402_10V7K
OPT@
1
CV208
2
4.7U_0603_6.3V6K
OPT@
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
2
OPT@
1
2
OPT@
1
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
2
OPT@
1
2
@
1
CV203
CV202
CV201
CV218
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
OPT@
1
2
@
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
OPT@
1
CV220
CV219
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
@
1
CV200
CV199
2
4.7U_0603_6.3V6K
OPT@
1
CV217
CV209
2
4.7U_0603_6.3V6K
@
1
2
OPT@
1
2
@
1
CV213
CV204
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
@
CV221
1
1
CV214
2
2
4.7U_0603_6.3V6K
@
@
+VGA_CORE
CV215
UV1F
K10
VDD_001
K12
VDD_002
K14
VDD_003
K16
VDD_004
K18
VDD_005
L11
VDD_006
L13
VDD_007
L15
VDD_008
L17
VDD_009
M10
VDD_010
M12
VDD_011
M14
VDD_012
M16
VDD_013
M18
VDD_014
N11
VDD_015
N13
VDD_016
N15
VDD_017
N17
VDD_018
P10
VDD_019
P12
VDD_020
N14M-LP-S-A2_FCBGA595
OPT@
Part 6 of 6
VDD_041 VDD_040 VDD_039 VDD_038 VDD_037 VDD_036 VDD_035 VDD_034 VDD_033 VDD_032 VDD_031 VDD_030 VDD_029 VDD_028 VDD_027 VDD_026 VDD_025 VDD_024 VDD_023
POWER
VDD_022 VDD_021
+VGA_CORE
V18 V16 V14 V12 V10 U17 U15 U13 U11 T18 T16 T14 T12 T10 R17 R15 R13 R11 P18 P16 P14
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
N14P_+VGA CORE, GND
N14P_+VGA CORE, GND
N14P_+VGA CORE, GND
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
401025
401025
401025
1
26 61
26 61
26 61
of
of
of
1.1
1.1
1.1
5
4
3
2
1
CV59
1U_0402_6.3V6K
+FB_PLLAVDD
200mA
LV2
1
CV58
2
OPT@
+1.5VS_VGA
FBA_D[0..63]
Place close to ballPlace close to BGA
1
2
0.1U_0402_10V7K
OPT@
CV57
FB_CLAMP
Place close to ball
1 2
CV55
0.1U_0402_10V7K
OPT@
1 2
RV20 10K_0402_5%OPT@
1 2
RV16 60.4_0402_1%@
1 2
RV17
60.4_0402_1%@
3
FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8
FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63
UV1B
E18
FBA_D00
F18
FBA_D01
E16
FBA_D02
F17
FBA_D03
D20
FBA_D04
D21
FBA_D05
F20
FBA_D06
E21
FBA_D07
E15
FBA_D08
D15
FBA_D09
F15
FBA_D10
F13
FBA_D11
C13
FBA_D12
B13
FBA_D13
E13
FBA_D14
D13
FBA_D15
B15
FBA_D16
C16
FBA_D17
A13
FBA_D18
A15
FBA_D19
B18
FBA_D20
A18
FBA_D21
A19
FBA_D22
C19
FBA_D23
B24
FBA_D24
C23
FBA_D25
A25
FBA_D26
A24
FBA_D27
A21
FBA_D28
B21
FBA_D29
C20
FBA_D30
C21
FBA_D31
R22
FBA_D32
R24
FBA_D33
T22
FBA_D34
R23
FBA_D35
N25
FBA_D36
N26
FBA_D37
N23
FBA_D38
N24
FBA_D39
V23
FBA_D40
V22
FBA_D41
T23
FBA_D42
U22
FBA_D43
Y24
FBA_D44
AA24
FBA_D45
Y22
FBA_D46
AA23
FBA_D47
AD27
FBA_D48
AB25
FBA_D49
AD26
FBA_D50
AC25
FBA_D51
AA27
FBA_D52
AA26
FBA_D53
W26
FBA_D54
Y25
FBA_D55
R26
FBA_D56
T25
FBA_D57
N27
FBA_D58
R27
FBA_D59
V26
FBA_D60
V27
FBA_D61
W27
FBA_D62
W25
FBA_D63
F16
FB_PLLAVDD_1
P22
FB_PLLAVDD_2
D23
FB_VREF_PROBE
H22
FB_DLLAVDD
F3
FB_CLAMP
F22
FBA_DEBUG0
J22
FBA_DEBUG1
N14M-LP-S-A2_FCBGA595
OPT@
Part 2 of 6
MEMORY
INTERFACE A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8
FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7
FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7
FBA_CLK0
FBA_CLK0_N
FBA_CLK1
FBA_CLK1_N
FBA_WCK01
FBA_WCK01_N
FBA_WCK23
FBA_WCK23_N
FBA_WCK45
FBA_WCK45_N
FBA_WCK67
FBA_WCK67_N
C27 C26 E24 F24 D27 D26 F25 F26 F23 G22 G23 G24 F27 G25 G27 G26 M24 M23 K24 K23 M27 M26 M25 K26 K22 J23 J25 J24 K27 K25 J27 J26
D19 D14 C17 C22 P24 W24 AA25 U25
F19 C14 A16 A22 P25 W22 AB27 T27
E19 C15 B16 B22 R25 W23 AB26 T26
D24 D25
N22 M22
D18 C18 D17 D16 T24 U24 V24 V25
FBA_CLK0 FBA_CLK0#
FBA_CLK1 FBA_CLK1#
2012/12/14
2012/12/14
2012/12/14
FBA_CS0#_L FBA_ODT_L
FBA_CKE_L FBA_MA14 FBA_RST# FBA_MA9 FBA_MA7 FBA_MA2 FBA_MA0 FBA_MA4 FBA_MA1 FBA_BA0 FBA_WE# FBA_MA15 FBA_CAS# FBA_CS0#_H
FBA_ODT_H FBA_CKE_H FBA_MA13 FBA_MA8 FBA_MA6 FBA_MA11 FBA_MA5 FBA_MA3 FBA_BA2 FBA_BA1 FBA_MA12 FBA_MA10 FBA_RAS#
FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7
FBA_DQS#0 FBA_DQS#1 FBA_DQS#2 FBA_DQS#3 FBA_DQS#4 FBA_DQS#5 FBA_DQS#6 FBA_DQS#7
FBA_DQS0 FBA_DQS1 FBA_DQS2 FBA_DQS3 FBA_DQS4 FBA_DQS5 FBA_DQS6 FBA_DQS7
FBA_CS0#_L 28 FBA_ODT_L 28
FBA_CKE_L 28 FBA_RST# 28,29
FBA_WE# 28,29 FBA_CAS# 28,29
FBA_CS0#_H 29 FBA_ODT_H 29
FBA_CKE_H 29
FBA_RAS# 28,29
FBA_CLK0 28 FBA_CLK0# 28
FBA_CLK1 29 FBA_CLK1# 29
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
2
Deciphered Date
Deciphered Date
Deciphered Date
2012/12/21
2012/12/21
2012/12/21
Title
Title
Title
N14P_MEM Interface
N14P_MEM Interface
N14P_MEM Interface
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
1
401025
401025
401025
27 61
27 61
27 61
of
of
of
1.1
1.1
1.1
FBA_D[0..63]28,29
FBA_DQM[7..0]28,29 FBA_DQS[7..0]28,29
FBA_DQS#[7..0]28,29
FBA_MA[15..0]28,29
D D
C C
B B
A A
Mode D - Mirror Mode Mapping
1 2
@
1 2
RV22
0_0402_5%
@
DATA Bus
0..31 CS0#_L
ODT_L CKE_L A14 RST
A9 A7 A2 A0 A4 A1 BA0 WE# A15
CAS#
A13 A8 A6 A11 A5 A3 BA2 BA1 A12 A10 RAS#
2
G
RV21
0_0402_5%
Address
FBx_CMD0 FBx_CMD1 FBx_CMD2 FBx_CMD3 FBx_CMD4 FBx_CMD5 FBx_CMD6 FBx_CMD7 FBx_CMD8 FBx_CMD9 FBx_CMD10 FBx_CMD11 FBx_CMD12 FBx_CMD13 FBx_CMD14 FBx_CMD15 FBx_CMD16 FBx_CMD17 FBx_CMD18 FBx_CMD19 FBx_CMD20 FBx_CMD21 FBx_CMD22 FBx_CMD23 FBx_CMD24 FBx_CMD25 FBx_CMD26 FBx_CMD27 FBx_CMD28 FBx_CMD29 FBx_CMD30
DGPU_GC6_EN14
FB_CLAMP19,23,44
FB_CLAMP
DGPU_PWROK19,46,57,58
5
32..63
A14 RST A9 A7 A2 A0 A4 A1 BA0 WE# A15 CAS# CS0#_H
ODT_H CKE_H A13 A8 A6 A11 A5 A3 BA2 BA1 A12 A10 RAS#
+3VS
13
D
QV3 2N7002KW_SOT323-3
@
S
DV4 GC6@
2
GC6_EN
3
BAV70W-7-F_SOT323-3
1 2
1
RV25 0_0402_5%
@
12
RV24 200K_0402_5%
GC6@
+FB_PLLAVDD
FBVDDQ_PWR_EN 46,56
4
FBA_BA[2..0]28,29
30ohms (ESR=0.01) Bead
+1.05VS_VGA +FB_PLLAVDD
1 2
HCB1608KF-300T60_2P
OPT@
Place close to BGA
1
2
22U_0805_6.3V6M
OPT@
5
+1.5VS_VGA
at least 16 mils width(optimal)
D D
20 mils spacing to other signals /planes
C C
12
OPT@
RV26
1.1K_0402_1%
12
RV27
1.1K_0402_1%
OPT@
12
RV28 160_0402_1%
OPT@
FBA_ODT_L
FBA_CKE_L
FBA_CLK0
FBA_CLK0#
12
+FBA_VREF0
1
2
RV29 10K_0402_5%
OPT@
CV60 .01U_0402_16V7-K
OPT@
FBA_RST#27,29
12
RV30 10K_0402_5%
OPT@
10K_0402_5%
OPT@
+FBA_VREF0
FBA_MA0 FBA_MA1 FBA_MA2 FBA_MA3 FBA_MA4 FBA_MA5 FBA_MA6 FBA_MA7 FBA_MA8 FBA_MA9 FBA_MA10 FBA_MA11 FBA_MA12 FBA_MA13 FBA_MA14 FBA_MA14
FBA_BA0 FBA_BA1 FBA_BA2
12
FBA_RST#
1 2
OPT@
FBA_CLK0 FBA_CLK0# FBA_CKE_L
FBA_ODT_L FBA_CS0#_L FBA_RAS# FBA_CAS# FBA_WE#
FBA_DQS0 FBA_DQS3
FBA_DQM0 FBA_DQM3
FBA_DQS#0 FBA_DQS#3
243_0402_1%
FBA_CLK027 FBA_CLK0#27 FBA_CKE_L27
FBA_ODT_L27 FBA_CS0#_L27 FBA_RAS#27,29 FBA_CAS#27,29 FBA_WE#27,29
RV31
RV32
4
UV4
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC1
L1
NC2
J9
NC3
L9
NC4
M7
NC5
96-BALL SDRAM DDR3
K4W4G1646B-HC11_FBGA96
@
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
FBA_D4 FBA_D1 FBA_D7 FBA_D0 FBA_D6 FBA_D3 FBA_D5 FBA_D2
FBA_D30 FBA_D25 FBA_D28 FBA_D26 FBA_D31 FBA_D24 FBA_D29 FBA_D27
+1.5VS_VGA
Group0 (IN3)
Group3 (BOT)
RV33
243_0402_1%
OPT@
3
UV3
+FBA_VREF0
FBA_RST#
12
M8
VREFCA
H1
VREFDQ
N3
FBA_MA0
A0
P7
FBA_MA1
A1
P3
FBA_MA2
A2
N2
FBA_MA3
A3
P8
FBA_MA4 FBA_D22
A4
P2
FBA_MA5
A5
R8
FBA_MA6
A6
R2
FBA_MA7
A7
T8
FBA_MA8
A8
R3
FBA_MA9
A9
L7
FBA_MA10
A10/AP
R7
FBA_MA11
A11
N7
FBA_MA12
A12/BC
T3
FBA_MA13
A13
T7
A14
M2
FBA_BA0
BA0
N8
FBA_BA1
BA1
M3
FBA_BA2
BA2
J7
FBA_CLK0
CK
K7
FBA_CLK0#
CK
K9
FBA_CKE_L
CKE
K1
FBA_ODT_L FBA_CS0#_L FBA_RAS# FBA_CAS# FBA_WE#
FBA_DQS2 FBA_DQS1
FBA_DQM2 FBA_DQM1
FBA_DQS#2 FBA_DQS#1
FBA_MA15FBA_MA15
L2 J3
K3
L3
F3
C7
E7 D3
G3 B7
T2 L8
J1 L1 J9 L9
M7
VDDQ_1
ODT CS
VDDQ_2
RAS
VDDQ_3
CAS
VDDQ_4
WE
VDDQ_5 VDDQ_6 VDDQ_7
DQSL
VDDQ_8
DQSU
VDDQ_9
DML DMU
DQSL DQSU
RESET
VSS_10 VSS_11
ZQ
VSS_12
NC1
VSSQ_1
NC2
VSSQ_2 VSSQ_3
NC3
VSSQ_4
NC4
VSSQ_5
NC5
VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
96-BALL SDRAM DDR3
K4W4G1646B-HC11_FBGA96
@
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
FBA_D19 FBA_D20 FBA_D17 FBA_D21 FBA_D16 FBA_D23 FBA_D18
FBA_D10 FBA_D15
FBA_D8
FBA_D13
FBA_D9 FBA_D12 FBA_D11 FBA_D14
+1.5VS_VGA
Group2 (IN1)
Group1 (TOP)
2
CMD mapping mod Mode D
Address
FBx_CMD0 FBx_CMD1 FBx_CMD2 FBx_CMD3 FBx_CMD4 FBx_CMD5 FBx_CMD6 FBx_CMD7 FBx_CMD8 FBx_CMD9 FBx_CMD10 FBx_CMD11 FBx_CMD12 FBx_CMD13 FBx_CMD14 FBx_CMD15 FBx_CMD16 FBx_CMD17 FBx_CMD18 FBx_CMD19 FBx_CMD20 FBx_CMD21 FBx_CMD22 FBx_CMD23 FBx_CMD24 FBx_CMD25 FBx_CMD26 FBx_CMD27 FBx_CMD28 FBx_CMD29 FBx_CMD30
FBA_D[0..63] 27,29
FBA_DQM[7..0] 27,29 FBA_DQS[7..0] 27,29
FBA_DQS#[7..0] 27,29
DATA Bus
0..31 CS0#_L
ODT_L CKE_L A14 RST
A9 A7 A2 A0 A4 A1 BA0 WE# A15
CAS#
A13 A8 A6 A11 A5 A3 BA2 BA1 A12 A10 RAS#
FBA_MA[15..0] 27,29 FBA_BA[2..0] 27,29
32..63
A14 RST A9 A7 A2 A0 A4 A1 BA0 WE# A15 CAS# CS0#_H
ODT_H CKE_H A13 A8 A6 A11 A5 A3 BA2 BA1 A12 A10 RAS#
1
B B
+1.5VS_VGA
UV4 SIDE
1
2
0.1U_0402_10V7K
OPT@
A A
5
CV61
1
CV62
2
0.1U_0402_10V7K
OPT@
1
CV63
2
1U_0603_25V6M
OPT@
1
CV64
2
1U_0603_25V6M
OPT@
1
2
1U_0603_25V6M
OPT@
CV65
1
CV66
2
1U_0603_25V6M
OPT@
+1.5VS_VGA
0.1U_0402_10V7K
1
2
OPT@
CV67
1
CV68
2
0.1U_0402_10V7K
OPT@
4
1
CV69
2
1U_0603_25V6M
OPT@
1
CV70
2
1U_0603_25V6M
OPT@
1
CV71
2
1U_0603_25V6M
OPT@
1
CV72
2
1U_0603_25V6M
OPT@
+1.5VS_VGA +1.5VS_VGA
UV3 SIDE
1
2
0.1U_0402_10V7K
OPT@
CV73
1
2
0.1U_0402_10V7K
@
3
CV74
1
CV75
2
1U_0603_25V6M
OPT@
1
CV76
2
1U_0603_25V6M
OPT@
1
1
CV78
CV77
2
2
1U_0603_25V6M
1U_0603_25V6M
OPT@
0.1U_0402_10V7K
@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
CV79
1
CV80
2
0.1U_0402_10V7K
@
1
CV81
2
1U_0603_25V6M
OPT@
2012/12/14
2012/12/14
2012/12/14
1
2
1U_0603_25V6M
OPT@
1
2
@
1
1
CV84
CV83
CV82
2
2
1U_0603_25V6M
1U_0603_25V6M
@
@
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
Title
Title
N14P_DDR3_A Lower
N14P_DDR3_A Lower
N14P_DDR3_A Lower
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
1
401025
401025
401025
of
of
of
28 61
28 61
28 61
1.1
1.1
1.1
5
at least 16 mils width(optimal)
D D
20 mils spacing to other signals /planes
C C
B B
+1.5VS_VGA
12
12
12
FBA_CKE_H
FBA_ODT_H
10K_0402_5%
RV35
1.1K_0402_1%
OPT@
RV34
1.1K_0402_1%
OPT@
FBA_CLK1
RV36 160_0402_1%
OPT@
FBA_CLK1#
RV37
OPT@
+FBA_VREF1
1
CV85 .01U_0402_16V7-K
OPT@
2
12
RV38
10K_0402_5%
OPT@
12
243_0402_1%
OPT@
+FBA_VREF1 +FBA_VREF1
FBA_CLK127 FBA_CLK1#27 FBA_CKE_H27
FBA_ODT_H27 FBA_CS0#_H27 FBA_RAS#27,28 FBA_CAS#27,28 FBA_WE#27,28
FBA_RST#27,28
RV39
FBA_CLK1 FBA_CLK1# FBA_CKE_H
FBA_ODT_H FBA_CS0#_H FBA_RAS# FBA_CAS# FBA_WE#
12
FBA_MA15 FBA_MA15
4
UV6
M8
VREFCA
H1
VREFDQ
N3
FBA_MA0
A0
P7
FBA_MA1
A1
P3
FBA_MA2
A2
N2
FBA_MA3
A3
P8
FBA_MA4
A4
P2
FBA_MA5
A5
R8
FBA_MA6
A6
R2
FBA_MA7
A7
T8
FBA_MA8
A8
R3
FBA_MA9
A9
L7
FBA_MA10
A10/AP
R7
FBA_MA11
A11
N7
FBA_MA12
A12/BC
T3
FBA_MA13
A13
T7
FBA_MA14 FBA_MA14
A14
M2
FBA_BA0
BA0
N8
FBA_BA1
BA1
M3
FBA_BA2
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
FBA_DQS4
DQSL
C7
FBA_DQS5
DQSU
E7
FBA_DQM4
DML
D3
FBA_DQM5
DMU
G3
FBA_DQS#4
DQSL
B7
FBA_DQS#5 FBA_DQS#6
DQSU
T2
FBA_RST#
RESET
L8
ZQ
J1
NC1
L1
NC2
J9
NC3
L9
NC4
M7
NC5
96-BALL
SDRAM DDR3
K4W4G1646B-HC11_FBGA96
@
E3
FBA_D36
DQL0
F7
FBA_D34
DQL1
F2
FBA_D37
DQL2
F8
FBA_D35
DQL3
H3
FBA_D39
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
+1.5VS_VGA +1.5VS_VGA
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
Group4 (IN1)
FBA_D32 FBA_D38 FBA_D33
FBA_D45 FBA_D42 FBA_D46 FBA_D41
Group5 (TOP)
FBA_D47 FBA_D52 FBA_D43 FBA_D44 FBA_D40
RV40
243_0402_1%
OPT@
3
FBA_MA0 FBA_MA1 FBA_MA2 FBA_MA3 FBA_MA4 FBA_MA5 FBA_MA6 FBA_MA7 FBA_MA8 FBA_MA9 FBA_MA10 FBA_MA11 FBA_MA12 FBA_MA13
FBA_BA0 FBA_BA1 FBA_BA2
FBA_CLK1 FBA_CLK1# FBA_CKE_H
FBA_ODT_H FBA_CS0#_H FBA_RAS# FBA_CAS# FBA_WE#
FBA_DQS7 FBA_DQS6
FBA_DQM7 FBA_DQM6
FBA_DQS#7
FBA_RST#
12
UV5
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC1
L1
NC2
J9
NC3
L9
NC4
M7
NC5
96-BALL
SDRAM DDR3
K4W4G1646B-HC11_FBGA96
@
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
2
FBA_D[0..63] 27,28
FBA_MA[15..0] 27,28
E3
FBA_D63
F7
FBA_D58
F2
FBA_D60
F8
FBA_D59
H3
FBA_D61 FBA_D56 FBA_D62 FBA_D57
FBA_D54 FBA_D51 FBA_D55 FBA_D49
FBA_D50 FBA_D53 FBA_D48
Group7 (IN3)
Group6 (BOT)
CMD mapping mod Mode D
Address
FBx_CMD0 FBx_CMD1 FBx_CMD2 FBx_CMD3 FBx_CMD4 FBx_CMD5 FBx_CMD6 FBx_CMD7 FBx_CMD8 FBx_CMD9 FBx_CMD10 FBx_CMD11 FBx_CMD12 FBx_CMD13 FBx_CMD14 FBx_CMD15 FBx_CMD16 FBx_CMD17 FBx_CMD18 FBx_CMD19 FBx_CMD20 FBx_CMD21 FBx_CMD22 FBx_CMD23 FBx_CMD24 FBx_CMD25 FBx_CMD26 FBx_CMD27 FBx_CMD28 FBx_CMD29 FBx_CMD30
H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
FBA_BA[2..0] 27,28
FBA_DQM[7..0] 27,28 FBA_DQS[7..0] 27,28
FBA_DQS#[7..0] 27,28
DATA Bus
32..63
0..31 CS0#_L
ODT_L CKE_L A14 RST
A9 A7 A2 A0 A4 A1 BA0 WE# A15
CAS#
A13 A8 A6 A11 A5 A3 BA2 BA1 A12 A10 RAS#
A14 RST A9 A7 A2 A0 A4 A1 BA0 WE# A15 CAS# CS0#_H
ODT_H CKE_H A13 A8 A6 A11 A5 A3 BA2 BA1 A12 A10 RAS#
1
+1.5VS_VGA +1.5VS_VGA +1.5VS_VGA+1.5VS_VGA
1
1
2
0.1U_0402_10V7K
OPT@
A A
5
CV86
CV87
2
0.1U_0402_10V7K
OPT@
1
2
1U_0603_25V6M
OPT@
CV88
1
CV89
2
1U_0603_25V6M
OPT@
1
CV90
2
1U_0603_25V6M
OPT@
1
CV91
2
1U_0603_25V6M
OPT@
1
2
0.1U_0402_10V7K
OPT@
4
CV92
1
CV93
2
0.1U_0402_10V7K
OPT@
1
CV94
2
1U_0603_25V6M
OPT@
1
CV95
2
1U_0603_25V6M
OPT@
1
CV96
2
1U_0603_25V6M
OPT@
1
CV97
2
1U_0603_25V6M
OPT@
3
1
CV98
2
0.1U_0402_10V7K
OPT@
UV5 SIDEUV6 SIDE
1
CV99
2
0.1U_0402_10V7K
@
1
CV100
2
1U_0603_25V6M
OPT@
1
2
1U_0603_25V6M
OPT@
1
1
CV101
CV103
CV102
2
2
1U_0603_25V6M
1U_0603_25V6M
@
@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
1
CV104
2
0.1U_0402_10V7K
@
1
2
0.1U_0402_10V7K
@
2012/12/14
2012/12/14
2012/12/14
1
CV105
CV106
2
1U_0603_25V6M
1U_0603_25V6M
OPT@
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
2
1
2
OPT@
CV107
1
CV108
2
1U_0603_25V6M
1U_0603_25V6M
@
Deciphered Date
Deciphered Date
Deciphered Date
1
CV109
2
@
2012/12/21
2012/12/21
2012/12/21
Title
Title
Title
N14P_DDR3_A Upper
N14P_DDR3_A Upper
N14P_DDR3_A Upper
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
1
401025
401025
401025
of
of
of
29 61
29 61
29 61
1.1
1.1
1.1
5
D D
C C
4
3
2
1
B B
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
Blank4
Blank4
Blank4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
1
401025
401025
401025
30 61
30 61
30 61
of
of
of
1.1
1.1
1.1
5
D D
C C
4
3
2
1
B B
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
Blank5
Blank5
Blank5
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
1
401025
401025
401025
31 61
31 61
31 61
of
of
of
1.1
1.1
1.1
5
RV56
45.3K_0402_1%
D D
STRAP024 STRAP124 STRAP224 STRAP324 STRAP424
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
OPT@
1 2
RV57
4.99K_0402_1%
@
1 2
RV58
24.9K_0402_1%
@
1 2
4
RV59
4.99K_0402_1%
@
1 2
+3VS_VGA
RV60
45.3K_0402_1%
@
1 2
3
Physical Strapping pin
ROM_SCLK ROM_SI ROM_SO FB[0] STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
Power Rail
+3VS_VGA +3VS_VGA +3VS_VGA +3VS_VGA +3VS_VGA +3VS_VGA +3VS_VGA +3VS_VGA
Logical Strapping Bit3
PCI_DEVID[4]
FB[1]
PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0] SOR3_EXPOSED
RESERVED PCIE_SPEED_
2
Logical Strapping Bit2
SUB_VENDOR
USER[2] USER[1] USER[0]USER[3]
3GIO_PAD_CFG_ADR[2] 3GIO_PAD_CFG_ADR[1]3GIO_PAD_CFG_ADR[3]
SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED
CHANGE_GEN3
1
Logical Strapping Bit1
PCI_DEVID5] RAM_CFG[1]RAM_CFG[3] RAM_CFG[2]
Logical Strapping Bit0
PEX_PLL_EN_TERM RAM_CFG[0]
VGA_DEVICESMB_ALT_ADDR
3GIO_PAD_CFG_ADR[0]
PCIE_MAX_SPEED DP_PLL_VDD33V
RV61
45.3K_0402_1%
@
1 2
RV62
4.99K_0402_1%
OPT@
1 2
1 2
RV63 15K_0402_1%
OPT@
RV64
4.99K_0402_1%
OPT@
1 2
RV65
45.3K_0402_1%
OPT@
1 2
Resistor Values
4.99K 10K 15K 20K
24.9K
30.1K
34.8K
C C
RV66
4.99K_0402_1%
@
1 2
RV67
4.99K_0402_1%
OPT@
1 2
+3VS_VGA
1 2
RV68
4.99K_0402_1%
OPT@
PCIE_MAX_SPEED SMBUS_ALT_ADDR
0
1
ROM_SI24
ROM_SO24
ROM_SCLK24
B B
ROM_SI ROM_SO ROM_SCLK
X76
1 2
RV69 20K_0402_1%
@
1 2
RV70 30K_0402_1%
@
RV71
4.99K_0402_1%
@
1 2
SUB_VENDOR
0
1
USER Straps
45.3K
Limit booting to PCIE Gen1
Allow booting to PCIE Gen 2/3
No VBIOS ROM
BIOS ROM is present (Default)
User[3:0]
X76
GPU STRAP0
N14P_GV2
A A
FB Memory (DDR3)
Samsung 1GHz
Micron 1GMHz
Hynix 1GMHz
Samsung 900MHz
Micron 900MHz
K4W2G1646E-BC1A 0x7 128M x 16 MT41J128M16JT-093G:K 128M x 16 H5TC2G63FFR-11C 0x4 128M x 16 K4W4G1646B-HC11 256M x 16 MT41K256M16HA-107G:E 256M x 16
5
ROM_SI
PD 45.3K 0x5 PD 30.1K
PD 24.9K 0x3 PD 20K 0x1 PD 10K
ROM_SO STRAP4STRAP3STRAP2STRAP1ROM_SCLK
PU 4.99K PU 45.3KPD 4.99KPU 4.99K PU 45.3K PD 15K PD 4.99K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
4
1000-1100
2012/12/14
2012/12/14
2012/12/14
3
Customer defined
Pull-up to +3VS_VGA
1000 1001 1010 1011 1100 1101 1110 1111
Pull-down to Gnd
0000 0001 0010 0011 0100 0101 0110 0111
VGA_DEVICE
0
3D Device (Class Code 302h)
1
VGA Device (Default)
PEX_PLL_EN_TERM
0
Disable (Default)
1
Enable
DP_PLL_VDD33V
0
Reserved
1
Default
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2012/12/21
2012/12/21
2012/12/21
2
Samsung
Micron
Hynix
FB[1:0]
0
Reserved
1
Reserved
2
256MB (Default)
3
Reserved
0
0x9E (Default)
1
0x9C (Multi-GPU usage)
PCIE_SPEED_CHANGE_GEN3
0
Disable PCIE Gen3 operation
1
Enable PCIE Gen3 operation
3GIO_PADCFG[3:0]
0110
0000
X76
X76409JVL01 SA00005SH10
X76409JVL51 (1G 32Mx16)
X76409JVL02
X76409JVL02 (2G 64Mx32)
Title
Title
Title
N14P_MISC
N14P_MISC
N14P_MISC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
Gen1/Gen2 support only
Gen3 support
VRAM P/NVRAM
SA00005M100
401025
401025
401025
1
32 61
32 61
32 61
of
of
of
1.1
1.1
1.1
5
D D
C C
4
3
2
1
B B
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
XDP_CONN
XDP_CONN
XDP_CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
1
of
of
of
33 61
33 61
33 61
1.1
1.1
1.1
5
4
3
2
1
LCD POWER CIRCUIT
R261 100K_0402_1%
@
R263 100K_0402_1%
@
CPU_EDP_TX0+8 CPU_EDP_TX0-8
CPU_EDP_TX1+8 CPU_EDP_TX1-8
CPU_EDP_AUX8 CPU_EDP_AUX#8
1 2
@
0_0402_5%
+3VS
.1U_0402_10V6-K
1 2
R23
100K_0402_5%
R262 100K_0402_1%
@
1 2
R264 100K_0402_1%
@
1 2
LP2301ALT1G_SOT23-3
W=40 mils W=40mils
C18
@
CPU_EDP_TX1+ EDP_TX1+
CPU_EDP_AUX EDP_AUX CPU_EDP_AUX# EDP_AUX#
CPU_EDP_HPD8
W=60mils
DMIC_DATA43
DMIC_CLK43
USB20_P018 USB20_N018
+LCDVDD
12
R20
D D
1 2
PCH_ENVDD14
Change R177 to 0ohm jump
C C
B B
R177 0_0402_5%
@
PCH_ENBKL
BKOFF#44
PCH_ENBKL14
PCH_EDP_PWM14
130_0603_1%
13
D
Q2
S
2N7002KW_SOT323-3
100K_0402_5%
1 2
R178 0_0402_5%@
1 2
R28 0_0402_5%@
G
R25
Touch Screen
1 2
R34
EC_TS_ON#44
+3VS +3VS_TS+3VS_TS_R
1 2
R37 0_0402_5%@
+3VALW
1 2
R39 0_0402_5%@
A A
TS@
100K_0402_5%
1 2
R38 0_0402_5%@
Change R35,R36,R37 to 0ohm jump
2
12
@
@
2
1 2
+5VALW
Q4
G
R29
0_0402_5%
R32
1 2
0_0402_5%
.1U_0402_10V6-K
C30
+3VS_TS_R
LP2301ALT1G_SOT23-3
Q5 TS@
12
R21 100K_0402_5%
1 2
220K_0402_5%
.1U_0402_10V6-K
13
D
2N7002KW_SOT323-3
S
1 2
D
S
G
2
.1U_0402_10V6-K
R22
13
+3VS
ENBKL
TS@
C20
R26
4.7K_0402_5%
@
1 2
R31 100K_0402_1%
1 2
1 2
+3VS
W=60mils
1
C15
4.7U_0603_6.3V6K
S
LP2301ALT1G_SOT23-3
G
D
1 3
ENBKL 44
2
+LCDVDD
L1
1 2
FCM2012CF-800T06_2P
Place C257 close to R23
0.01U_0402_25V7K
2A80mil
+LCDVDD_CON
C22
4.7U_0603_6.3V6K
CMOS_ON#
1
C257
2
B+ +LEDVDD
@
0_0805_5%
4.7U_0805_25V6-K
Q3
2
1
2
DISPOFF#
Change R28,R29,R32,R27,R30 to 0ohm jump
INVT_PWM
R33 100K_0402_1%
+3VS_TS
1
C31
@
USB20_N818
USB20_P818
2
+3VS_TS
1 2
R35 0_0402_5%@
1 2
R36 0_0402_5%@
USB20_P8_CONN USB20_N8_CONN
1
@
D18
1
2
2
AZ5215-01F_DFN1006P2E2
ForEMI
W=60mils
1
2
R27
3
1
2
12
C3
USB20_N8_CONN USB20_P8_CONN
T83
2
1
C23 .1U_0402_10V6-K
2A80mil
1
1
C2
470P_0402_50V7K
2
2
1
EMIRequest
680P_0402_50V7K
PAD @
D17 AZC199-02S.R7G_SOT23-3
@
CMOS_ON#19
EDP_AUX EDP_AUX#
+3VS
C8
@
JTS1
1
1
2
2
3
3
4
4
5
5
GND1
6
6
GND2
ACES_87213-00601-P01
ME@
Touch Screen
7 8
+3VS
1
2
1 2
1 2
R200
CMOS Camera
D
S
13
Q1
G
1
2
2
1
C21 .1U_0402_10V6-K
2
+LEDVDD
1 2
C27 .1U_0402_10V6-K
1 2
C28 .1U_0402_10V6-K
1 2
C243 .1U_0402_10V6-K
1 2
C246 .1U_0402_10V6-K
1 2
C242 .1U_0402_10V6-K
1 2
C241 .1U_0402_10V6-K
+LCDVDD_CON
+3VS
+3VS_CMOS
0.047U_0402_16V7K
.01U_0402_16V7-K
1
C19
1
2
2
@
DMIC_CLK
C24
1
2
@
USB20_P0 USB20_N0
2
W=40mils
C29
1
EMI request
+3VS_CMOS+3VS_CMOS_R
1 2
R19
0_0603_5%
C16 .1U_0402_10V6-K
EMI request
DISPOFF# INVT_PWM
100P_0402_50V8J
EDP_TX0+CPU_EDP_TX0+ EDP_TX0-CPU_EDP_TX0-
EDP_TX1-CPU_EDP_TX1-
DISPOFF# INVT_PWM
12
R_DMIC_DATA
R300_0402_5% @
1
C17 10U_0603_6.3V6M
@
2
C25
1
2
@
470P_0402_50V7K
JEDP1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
GND1
26
26
GND2
27
27
GND3
28
28
GND4
29
29
30
30
ACES_50203-03001-001
ME@
C26
1
2
470P_0402_50V7K
@
31 32 33 34
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
eDP/ CMOS/Touch screen
eDP/ CMOS/Touch screen
eDP/ CMOS/Touch screen
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
401025
401025
401025
1
of
of
of
34 61
34 61
34 61
1.1
1.1
1.1
5
4
3
2
1
L2
HDMI_CLK-_C
HDMI_CLK+_C HDMI_CLK+_CON
D D
HDMI_TX0-_C
HDMI_TX0+_C
HDMI_TX1-_C HDMI_TX1-_CON
HDMI_TX1+_C
HDMI_TX2-_C
HDMI_TX2+_C
1
1
4
4
HDMI2012F2SF-900T04_4P L3
1
1
4
4
HDMI2012F2SF-900T04_4P L4
1
1
4
4
HDMI2012F2SF-900T04_4P L5
1
1
4
4
HDMI2012F2SF-900T04_4P
2
2
3
3
2
2
3
3
2
2
3
3
2
2
3
3
HDMI_CLK-_CON
HDMI_TX0-_CON
HDMI_TX0+_CON
HDMI_TX1+_CON
HDMI_TX2-_CON
HDMI_TX2+_CON
@
1 2
C32 3.3P_0402_50V8-C
@
1 2
C33 3.3P_0402_50V8-C
@
1 2
C34 3.3P_0402_50V8-C
@
1 2
C35 3.3P_0402_50V8-C
@
1 2
C36 3.3P_0402_50V8-C
@
1 2
C37 3.3P_0402_50V8-C
@
1 2
C38 3.3P_0402_50V8-C
@
1 2
C39 3.3P_0402_50V8-C
+3VS
R40
@
0_0402_5%
1 2
G
5
S
34
HDMICLK_R
DDPB_CLK14
DDPB_DATA14
G
2
S
61
D
Q6A
2N7002KDWH_SOT363-6
D
Q6B
2N7002KDWH_SOT363-6
HDMIDAT_R
HDMI_DET HDMI_DET HDMIDAT_R HDMICLK_R HDMICLK_R +5VS_HDMI
D25
1
1
2
2
4
4
5 3
3
8
AZ1045-04F_DFN2510P10E-10-9
@
9
10
8
9
7
7
6
65
HDMIDAT_R
+5VS_HDMI
For EMC
For EMC
C C
B B
HDMI_CLK-_CON HDMI_CLK+_CON HDMI_TX0-_CON HDMI_TX0+_CON HDMI_TX1-_CON HDMI_TX1+_CON HDMI_TX2-_CON HDMI_TX2+_CON
1 2
R41 470_0402_5%
1 2
R42 470_0402_5%
1 2
R43 470_0402_5%
1 2
R44 470_0402_5%
1 2
R45 470_0402_5%
1 2
R46 470_0402_5%
1 2
R49 470_0402_5%
1 2
R50 470_0402_5%
+3VS
1 2
R55
100K_0402_5%
+5VS
3
D2
BAT54S-7-F_SOT23-3
1
R54 20K_0402_5%
1 2
12
C254 .1U_0402_10V6-K
12
C256 .1U_0402_10V6-K
12
C253 .1U_0402_10V6-K
12
C255 .1U_0402_10V6-K
12
C251 .1U_0402_10V6-K
12
C252 .1U_0402_10V6-K
12
C249 .1U_0402_10V6-K
12
C250 .1U_0402_10V6-K
2
@
HDMI_DET
1M_0402_5%
R51
1 2
0_0402_5%
+3VS
R47
1 2
2N7002KW_SOT323-3
S
G
2
Q33
D
HDMI_CLK­HDMI_CLK+
HDMI_TX0­HDMI_TX0+
HDMI_TX1­HDMI_TX1+
HDMI_TX2­HDMI_TX2+
13
Change R40,R51 to 0ohm jump
13
D
2
G
@
Q9 2N7002KW_SOT323-3
S
TMDS_B_HPD14
@
HDMI_CLK-8 HDMI_CLK+8
HDMI_TX0-8
HDMI_TX0+8
HDMI_TX1-8
HDMI_TX1+8
HDMI_TX2-8
HDMI_TX2+8
+5VS
HDMI_CLK-_C HDMI_CLK+_C
HDMI_TX0-_C HDMI_TX0+_C
HDMI_TX1-_C HDMI_TX1+_C
HDMI_TX2-_C HDMI_TX2+_C
D16
2 3
PMEG2010ET_SOT23-3
R48 0_0805_5% @
R56 0_0402_5%@ R57 0_0402_5%@
R58 0_0402_5%@ R59 0_0402_5%@
R60 0_0402_5%@ R61 0_0402_5%@
R62 0_0402_5%@ R63 0_0402_5%@
1 2
1
12 12
12 12
12 12
12 12
HDMIDAT_R HDMICLK_R
F1
0.5A_8V_KMC3S050RY
R52
2.2K_0402_5%
1 2
HDMI_CLK-_CON HDMI_CLK+_CON
HDMI_TX0-_CON HDMI_TX0+_CON
HDMI_TX1-_CON HDMI_TX1+_CON
HDMI_TX2-_CON HDMI_TX2+_CON
21
+5VS_HDMI+5VS_HDMI_F
R53
2.2K_0402_5%
1 2
1
C40 .1U_0402_10V6-K
2
JHDMI1
19
HP_DET
18
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
11
CK_shield
10
CK+
9
D0-
8
D0_shield
7
D0+
6
D1-
5
D1_shield
4
D1+
3
D2-
2
D2_shield
1
D2+
FOX_QJ111A1-RC0AH1-8H
ME@
GND1 GND2
GND3 GND4
20 21
22 23
Close to JHDMI1
D3
1
1
HDMI_CLK-_CON HDMI_CLK-_CON
A A
2
2
4
4
5 3
3
8
AZ1045-04F_DFN2510P10E-10-9
@
5
9
HDMI_CLK+_CONHDMI_CLK+_CON
10
8
9
7
HDMI_TX0+_CONHDMI_TX0+_CON
7
6
65
HDMI_TX1-_CON HDMI_TX1+_CON HDMI_TX2-_CON HDMI_TX2+_CONHDMI_TX0-_CON HDMI_TX0-_CON
For EMC
D4
1
1
2
2
4
4
5 3
3
8
AZ1045-04F_DFN2510P10E-10-9
@
4
9
10
8
9
7
7
6
65
HDMI_TX1-_CON HDMI_TX1+_CON HDMI_TX2-_CON HDMI_TX2+_CON
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
Title
Title
HDMI_CONN
HDMI_CONN
HDMI_CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
1
of
of
of
35 61
35 61
35 61
1.1
1.1
1.1
5
4
3
2
1
CRT Connector
+5VS
2 3
D D
PAD@
10P_0402_50V8J
1
C47
2
T1
1 2
PCH_CRT_R14
PCH_CRT_G14
PCH_CRT_B14
1 2
R64 150_0402_1%
R65 150_0402_1%
1 2
1 2
R66 150_0402_1%
1
C42
2
L6 BLM18BB470SN1D_2P~D
1 2
L7 BLM18BB470SN1D_2P~D
1 2
L8 BLM18BB470SN1D_2P~D
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
1
1
C44
C43
2
2
10P_0402_50V8J
1
C45
2
10P_0402_50V8J
1
C46
2
CLOSE TO CONN
+CRT_VCC
R67
1 2
1
1K_0402_5%
C49
C C
PCH_CRT_HSYNC14
PCH_CRT_VSYNC14
B B
PCH_CRT_DDC_DAT14
PCH_CRT_DDC_CLK14
PCH_CRT_DDC_DAT
PCH_CRT_DDC_CLK
.1U_0402_10V6-K
.1U_0402_10V6-K
S
+3VS
C51
G
5
Q10B2N7002KDWH_SOT363-6
OE#
2
1
5
P
OE#
A2Y
G
3
+CRT_VCC
1
OE#
2
1
5
P
OE#
A2Y
G
3
G
2
R70
S
61
D
Q10A
2N7002KDWH_SOT363-6
34
D
@
100P_0402_50V8J
U4 74AHCT1G125GW_SOT353-5
4
CRT_HSYNC_1
U5 74AHCT1G125GW_SOT353-5
4
CRT_VSYNC_1 CRT_VSYNC_2
+CRT_VCC
2.2K_0402_5%
12
C53
2.2K_0402_5%
12
R71
CRT_DDC_CLK_CON
1
1
2
2
R68
1 2
33_0402_5%
R69
1 2
33_0402_5%
C54 68P_0402_50V8J
CRT_HSYNC_2
CRT_DDC_DAT_CON
@
L9
NBQ100505T-800Y-N_2P
1 2
L10
NBQ100505T-800Y-N_2P
1 2
10P_0402_50V8J
1
C50
@
2
10P_0402_50V8J
1
C52
@
2
D5
1
PMEG2010ET_SOT23-3
1
CRT_DET# CRT_R_CON
CRT_DDC_DAT_CON CRT_G_CON
HSYNC_CON CRT_B_CON
VSYNC_CON
CRT_DDC_CLK_CON
HSYNC_CON
VSYNC_CON
+CRT_VCC
0.5A_8V_KMC3S050RY
F2
W=40mils
1
C48 100P_0402_50V8J
2
+CRT_VCC_CON
21
+CRT_VCC_CON+CRT_VCC_CON
1
C41 .1U_0402_10V6-K
2
JCRT1
6
11
1 7
12
2 8
13
3 9
14
4
10
16
G
15
17
G
5
C-H_13-12201557CP
ME@
CRT_R_CON CRT_R_CON CRT_G_CON CRT_G_CON CRT_B_CON CRT_B_CON CRT_DET# CRT_DET#
VSYNC_CON
HSYNC_CON CRT_DDC_CLK_CON CRT_DDC_DAT_CON
@
For EMC
D6
1
1
2
2
4
4
5 3
3
8
AZ1045-04F_DFN2510P10E-10-9
@
D7
1
1
2
2
4
4
5 3
3
8
AZ1045-04F_DFN2510P10E-10-9
@
For EMC
1
D19
1
AZ5425-01F_DFN1006P2E2
2
2
9
10
8
9
7
7
6
65
9
VSYNC_CON
10
8
HSYNC_CON
9
7
CRT_DDC_CLK_CON
7
6
CRT_DDC_DAT_CON
65
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
CRT
CRT
CRT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
401025
401025
401025
1
36 61
36 61
36 61
of
of
of
1.1
1.1
1.1
5
4
3
2
1
+3VALW_LANrisingme(10%~90%):0.5ms＜spec＜100ms +3VALW_LANwidth:40mils
+3VALWTO+3VALW_LAN
+3VALW+3VALW +3VALW_LAN
D D
LAN_PWR_ON#44
C C
+3VALW_LAN
PCIE_WAKE#15,19,40,44
PLT_RST#14,23,40,44
RL2 100K_0402_5%
@
1 2
1 2
@
RL3 47K_0402_5%
LAN_WAKE#40,44,46
PCIE_PRX_DTX_N418 PCIE_PRX_DTX_P418
1
CL4 .1U_0402_10V6-K
2
@
2
2
CL7 .01U_0402_16V7-K
1
@
CL8
4.7U_0805_25V6-K
1 2
RL7
@
4.7K_0402_5%
1 2
RL8 0_0402_5%@
1 2
RL9 0_0402_5%
CL10 .1U_0402_10V6-K CL11 .1U_0402_10V6-K
S
G
D
1 3
Vgs=‐4.5V,Id=3A,Rds<97mohm
1
2
@
PCIE_WAKE#_R
RL10 2.49K_0402_1%
1 2 1 2
J4
112
JUMP_43X79
QL1 LP2301ALT1G_SOT23-3
@
1
CL9 1U_0402_6.3V6K
2
@
1 2
LAN_XTALO LAN_XTALI
+LAN_REGOUT +LAN_VDDREG
+LAN_VDD10 PCIE_WAKE#_R ISOLATE#
2
ClosetoPin11,respectively
+3VALW_LAN +LAN_VDD10
PCIE_PRX_C_DTX_N4 PCIE_PRX_C_DTX_P4
1
2
33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
CL5 .1U_0402_10V6-K
GIGA@
ClosetoPin32,respectively
UL1
GND AVDD33_2 RSET AVDD10 CKXTAL2 CKXTAL1 LED0 LED1/GPIO LED2 REGOUT VDDREG DVDD10 LANWAKEB ISOLATEB PERSTB HSON HSOP
1
CL6 .1U_0402_10V6-K
2
REFCLK_N REFCLK_P
HSIN
HSIP CLKREQB AVDD33_1
MDIN3 MDIP3
AVDD10_2
MDIN2 MDIP2 MDIN1 MDIP1
AVDD10_1
MDIN0 MDIP0
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
+3VALW_LAN +LAN_VDDREG
RL1
1 2
@
0_0603_5%
Change RL1 to 0ohm jump
+3VS
12
RL4 1K_0402_1%
1 2
12
RL6 15K_0402_5%
@
CLK_PCIE_LAN# CLK_PCIE_LAN
+3VALW_LAN LAN_MDI3­LAN_MDI3+ +LAN_VDD10 LAN_MDI2­LAN_MDI2+ LAN_MDI1­LAN_MDI1+ +LAN_VDD10 LAN_MDI0­LAN_MDI0+
LAN_MDI3- 38 LAN_MDI3+ 38
LAN_MDI2- 38 LAN_MDI2+ 38 LAN_MDI1- 38 LAN_MDI1+ 38
LAN_MDI0- 38 LAN_MDI0+ 38
RL5
@
0_0402_5%
CLK_PCIE_LAN# 16
CLK_PCIE_LAN 16
PCIE_PTX_C_DRX_N4 18
PCIE_PTX_C_DRX_P4 18
CLKREQ_LAN# 16
1
CL1
4.7U_0603_6.3V6K
2
8111GS@
LAN_PWR_ON#ISOLATE#
1
CL2 .1U_0402_10V6-K
2
8111GS@
1
CL3 .1U_0402_10V6-K
2
8106@
B B
LAN_XTALI
LAN_XTALO
4 3
1
CL18 10P_0402_50V8J
2
4
+LAN_REGOUT
+3VALW_LAN
12
RL12
4.7K_0402_5%
@
CLKREQ_LAN#
Vendorrecommandresevethe PUresistorcloseLANchip
A A
5
CL17
10P_0402_50V8J
1
1
25MHZ_10PF_7V25000014
2
YL1
OSC1
GND2
GND12OSC2
RTL8111G-CG_QFN32_4X48111G@
1 2
1
CL12 .1U_0402_10V6-K
2
8111G@
+LAN_VDD10
ReserveforRTL8111GS(SWRmode)
RL11 0_0805_5%
8111G@
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
1 2
LL1
2.2UH_NLC252018T-2R2J-N_5%
8111GS@
4.7U_0603_6.3V6K
LayoutNote:LL1mustbe within200miltoPin36, CL15,CL16mustbewithin 200miltoLL1 +LAN_REGOUT:Width=60mil
Issued Date
Issued Date
Issued Date
3
CL15
8111GS@
2012/12/14
2012/12/14
2012/12/14
1
1
CL19 .1U_0402_10V6-K
2
2
8111GS@
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
ClosetoPin8,30
1
CL13 .1U_0402_10V6-K
2
2
2012/12/21
2012/12/21
2012/12/21
1
CL14 .1U_0402_10V6-K
2
ClosetoPin3,22
1
CL20 .1U_0402_10V6-K
2
GIGA@
Title
Title
Title
LAN_RTL8106E
LAN_RTL8106E
LAN_RTL8106E
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
2
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
CL16 .1U_0402_10V6-K
GIGA@
401025
401025
401025
1
1
CL21 1U_0402_6.3V6K
2
37 61
37 61
37 61
of
of
of
1.1
1.1
1.1
5
DL1/DL2 1'S PN:SC300003M00
D D
DL1
9
I/O4
2
NC1
4
NC2
+3VALW_LAN
LAN_MDI2- LAN_MDI3-
5
VDD
6
NC3
7
I/O3
AZ3033-04F_DFN2525P10E10
Place Close to TL1
DL2
9
I/O4
2
C C
+3VALW_LAN
NC1
4
NC2
5
VDD
6
NC3
7
I/O3
AZ3033-04F_DFN2525P10E10
I/O2 NC5
GND
NC4 I/O1
I/O2 NC5
GND
NC4 I/O1
3
LAN_MDI3+LAN_MDI2+
10 11 8 1
3
LAN_MDI0+LAN_MDI1+
10 11 8 1
LAN_MDI0-LAN_MDI1-
4
CL22
0.1U_0603_25V7K
3
TL1
LAN_MDI3+37 LAN_MDI3-37
LAN_MDI2+37 LAN_MDI2-37
LAN_MDI0+37 LAN_MDI0-37
1
2
LAN_MDI1+37 LAN_MDI1-37
LAN_MDI3+ LAN_MDI3-
LAN_MDI2+ LAN_MDI2-
LAN_MDI0+ LAN_MDI0-
LAN_MDI1+ LAN_MDI1-
1
RD+
2
RD-
3
RCT_1 NC_1 NC_2 TCT_1 TD+ TD-
TL2
RD+ RD­RCT_1 NC_1 NC_2 TCT_1 TD+ TD-
RCT_2
NC_4 NC_3
TCT_2
GIGA@
RCT_2
NC_4 NC_3
TCT_2
4 5 6 7 8
1 2 3 4 5 6 7 8
RX+
TX+
RX+
TX+
RX-
TX-
RX-
TX-
16 15 14 13 12 11 10 9
16 15 14 13 12 11 10 9
2
LAN_MDO3+ LAN_MDO3­MCT
MCT LAN_MDO2+ LAN_MDO2-
Place Close to T1,T2
LAN_MDO0+ LAN_MDO0­MCT
MCT LAN_MDO1+ LAN_MDO1-
1
Reserve gas tube for EMI go rural solution
2
FL1
FL2
FL3
FL4
2
2
2
@
112
BS4200N-C-LV_SMB-F2
@
112
BS4200N-C-LV_SMB-F2
@
112
BS4200N-C-LV_SMB-F2
@
112
BS4200N-C-LV_SMB-F2
CHASSIS1_GND
CHASSIS1_GND
CHASSIS1_GND
CHASSIS1_GND
Place Close to TL2
B B
C55
10P_0603_50V8-J
@
12
RL17 75_0603_5%
1
2
MCT
1
CL23 1000P_1206_2KV7-K
2
1
DL3
1
BS4200N-C-LV_SMB-F2
2
2
1
J11
1
JUMP_43X118
@
2
2
LAN_MDO0+ LAN_MDO0­LAN_MDO1+ LAN_MDO2+ LAN_MDO2­LAN_MDO1­LAN_MDO3+ LAN_MDO3-
JRJ1
1
PR1+
2
PR1-
3
PR2+
4
PR3+
5
PR3-
6
PR2-
7
PR4+
8
PR4-
SANTA_130460-3
ME@
GND_4 GND_3 GND_2 GND_1
12 11 10 9
CHASSIS1_GND
Add J11 for bencent transform solution
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
CHASSIS1_GND
2012/12/14
2012/12/14
2012/12/14
Title
Title
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
3
2012/12/21
2012/12/21
2012/12/21
2
Title
LAN_Transformer
LAN_Transformer
LAN_Transformer
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
1
of
of
of
38 61
38 61
38 61
1.1
1.1
1.1
5
4
3
2
1
D D
C C
Close U4
1
@
2
1
@
2
REMOTE1+
C56 2200P_0402_50V7K
REMOTE1-
REMOTE2+
C58 2200P_0402_50V7K
REMOTE2-
C59
.1U_0402_10V6-K
+3VS
Remove +VDD netname
1
2
FAN_PWM & TACH for PWM FAN
REMOTE1+ REMOTE1­REMOTE2+ REMOTE2-
SMSC thermal sensor placed near by DIMM
U6
1
VDD
2
DP1
3
DN1
4
DP2
5
DN2
EMC1403-2-AIZL-TR_MSOP10
@
Address 1001_101xb
internal pull up 1.2K to 1.5V R for initial thermal shutdown temp
SMCLK
SMDATA
ALERT#
THERM#
GND
10 9 8 7 6
R72
10K_0402_5%
@
EC_SMB_CK2 EC_SMB_DA2
12
+3VS
EC_SMB_CK2 17,23,44 EC_SMB_DA2 17,23,44
REMOTE1+
C57
100P_0402_50V8J
REMOTE1-
REMOTE2+
C60
100P_0402_50V8J
REMOTE2-
1
@
2
Close to cpu side
1
@
2
C
@
2
Q11
B
MMST3904-7-F_SOT323-3
E
3 1
C
@
2
Q12
B
MMST3904-7-F_SOT323-3
E
3 1
Under VRAM
REMOTE2+/-: Trace width/space:10/10 mil Trace length:<8"
FAN Conn
C61
+5VS
2
1
R73
1 2
0_0603_5%
@
+5VS_FAN
1
C62 .1U_0402_10V6-K
2
@
EC_FAN_SPEED44 EC_FAN_PWM44
JFAN1
1
1
2
2
3
3
4
4
5
GND1
6
GND2
ACES_85205-04001
ME@
B B
10U_0805_25V6K
Change R73 to 0ohm jump
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
2012/12/14
2012/12/14
2012/12/14
3
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2012/12/21
2012/12/21
2012/12/21
2
Title
VGA Thermal sensor/FAN CONN
VGA Thermal sensor/FAN CONN
VGA Thermal sensor/FAN CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet of
Date: Sheet of
Date: Sheet of
Friday, July 12, 2013
401025
401025
401025
1
39 61
39 61
39 61
1.1
1.1
1.1
A
B
C
D
E
Mini-Express Card(WLAN/WiMAX)
+3VS
2
G
WLAN_CLKREQ1#16
1 1
BT_CTRL
For isolate Intel Rainbow Peak and Compal debug card.
1 3
D
2N7002KW_SOT323-3
1 2
R89
0_0402_5%@
1 2
R82 0_0402_5%
1 2
BT_DISABLE#
R83 1K_0402_5%
Change R93 to 0ohm jump
1 2
2 2
PCH_BT_DISABLE#19
PCH_BT_ON#19
R93 0_0402_5%@
2
G
@
2N7002KDWH_SOT363-6
Q14A
61
S
Q8
S
D
RH196 10K_0402_5%
1 2
BT_CTRL
34
D
Q14B
G
S
2N7002KDWH_SOT363-6
WLAN_CLKREQ1_Q#
LAN_WAKE#37,44,46
PCIE_WAKE#15,19,37,44
CLK_PCIE_WLAN#16 CLK_PCIE_WLAN16
PCIE_PRX_DTX_N518 PCIE_PRX_DTX_P518
PCIE_PTX_C_DRX_N518 PCIE_PTX_C_DRX_P518
5
@
BT_CTRL_R
EC_TX44 EC_RX44
SUSP 10,46,55
@
1 2
R81 0_0402_5%
PCIE_WAKE#
WLAN_CLKREQ1_Q#
+3VS_WLAN
R90
100_0402_1%
1 2
EC_TX
1 2
EC_RX
100_0402_1%
R91
BT_DISABLE#
R94 100K_0402_5%
For EC to detect
1 2
debug card insert.
JWLAN1
112 334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152
GND153GND2
BELLW_80003-3041
ME@
+3VS_WLAN
1
C63
0.047U_0402_16V4Z
2
@
For RF request
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
54
+1.5VS_WLAN
WL_OFF#
SMB_CLK_S3_R SMB_DATA_S3_R
USB20_N10 18 USB20_P10 18
WLAN&BT Combo module circuits
BT_CRTL (GPIO22)
*
PCH_BT_ON#
+1.5VS
12
R80 0_0603_5%
@
1 2
R84 0_0402_5%@
1 2
R85 0_0402_5%@
1 2
R86 0_0402_5%@
1 2
R87 0_0402_5%@
1 2
R88 0_0402_5%@
BT on module Enable
H
L
+1.5VS
1
C64 .1U_0402_10V6-K
2
@
1
C65 .1U_0402_10V6-K
2
@
Change R84,R86 to 0ohm jump
PLT_RST#
PCH_WL_OFF# 14
PLT_RST# 14,23,37,44 +3VALW +3VS_WLAN
SMB_CLK_S3 11,12,17,45 SMB_DATA_S3 11,12,17,45
BT on module Disable
L
H
+3VS
J5
112
+3VALW
C67
.1U_0402_10V6-K
AOAC@
1 2
AOAC_ON#44
R92
100K_0402_5%
@
JUMP_43X79
LP2301ALT1G_SOT23-3
S
AOAC@
1
2
1
C70 .1U_0402_10V6-K
2
AOAC@
+3VS_WLAN
2
Q13
D
13
.01U_0402_16V7-K
1
G
2
1
C69 .1U_0402_10V6-K
C68
2
2
AOAC@
@
softstart (RC) will check on EVT PCB
3 3
4 4
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
A
B
C
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
2012/12/21
2012/12/21
2012/12/21
Title
Mini-Card
Mini-Card
Mini-Card
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
401025
401025
401025
E
40 61
40 61
40 61
of
of
of
1.1
1.1
1.1
A
B
C
D
E
1
1
2
2
@
1
1
2
2
@
+USB_VCCA
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
+USB_VCCA
AZ5425-01F_DFN1006P2E2
D21
AZ5425-01F_DFN1006P2E2
D24
LEFT SIDE USB3.0 PORT X2
+5VALW
1 1
2.2U_0603_10V7K C73
1 2
USB_ON#44,45
USB_ON# USB_OC1#
U7
1
GND
2
VIN1
3
VIN2
4
EN/EN
AP2820CMMTR-G1_MSOP8
VOUT3 VOUT2 VOUT1
Low Active 2A
For EMI request
USB2.0 choke --> SM070001S0J
2 2
3 3
4 4
USB3.0 Choke --> SM070001S0J
USB30_RX_N2
USB30_RX_P2
HSF1210F2SF-900T02_4P
USB30_TX_C_N2
USB30_TX_C_P2
HSF1210F2SF-900T02_4P
USB20_N2
USB20_P2
WCM2012F2S-900T04_0805
USB30_RX_P1
USB30_RX_N1
HSF1210F2SF-900T02_4P
USB30_TX_C_P1
USB30_TX_C_N1
HSF1210F2SF-900T02_4P
USB20_N1
USB20_P1
WCM2012F2S-900T04_0805
3
3
2
2
3
3
2
2
2
2
3
3
3
3
2
2
3
3
2
2
2
2
3
3
L11
4
USB30_RX_R_N2
4
1
USB30_RX_R_P2
1
L12
4
4
1
1
L13
1
1
4
4
L14
4
USB30_RX_R_P1
4
1
USB30_RX_R_N1
1
L15
4
4
1
1
L16
1
1
4
4
USB30_TX_R_N2
USB30_TX_R_P2
USB30_TX_R_P1
USB30_TX_R_N1
For EMC
A
8 7 6 5
FLAG
USB20_N2_R
USB20_P2_R
USB20_N1_R
USB20_P1_R
+USB_VCCA
1
2
USB_OC1# 18
C74 1000P_0402_50V7K
@
B
R95 0_0402_5%@
1 2
USB30_TX_P218 USB30_TX_N218
USB20_P218 USB20_N218
USB30_RX_P218 USB30_RX_N218
USB30_TX_N2 USB30_TX_C_N2 USB30_TX_R_N2
USB30_RX_P2 USB30_RX_R_P2
C75 .1U_0402_10V6-K
1 2
C76 .1U_0402_10V6-K
USB30_RX_R_N2 USB30_RX_R_P2 USB30_TX_R_N2 USB30_TX_R_P2
USB30_RX_R_N1 USB30_RX_R_P1
USB30_TX_R_P1
9
10
8 7 6
AZ1045-04F_DFN2510P10E-10-9
AZ1045-04F_DFN2510P10E-10-9
9
7
6 5
@
9
10
8
9
7
7
6
6 5
@
D8
1
USB30_RX_R_N2
1
2
USB30_RX_R_P2
2
4
USB30_TX_R_N2
4
5
USB30_TX_R_P2
3
3
8
D10
1
USB30_RX_R_N1
1
2
USB30_RX_R_P1
2
4
USB30_TX_R_N1USB30_TX_R_N1
4
5
USB30_TX_R_P1
3
3
8
USB30_TX_C_P2 USB30_TX_R_P2USB30_TX_P2
For ESD request
1 2
R96 0_0402_5%@
1 2
R97 0_0402_5%@
1 2
R98 0_0402_5%@
1 2
R99 0_0402_5%@
1 2
R100 0_0402_5%@
1 2
USB20_P2_R USB20_N2_R
For EMC
1 2
USB30_TX_P118 USB30_TX_N118
USB20_P118 USB20_N118
USB30_RX_P118 USB30_RX_N118
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
USB20_N1 USB20_N1_R
USB30_RX_N1 USB30_RX_R_N1
C81 .1U_0402_10V6-K C82 .1U_0402_10V6-K
2012/12/14
2012/12/14
2012/12/14
C
1 2
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
USB30_TX_C_P1USB30_TX_P1 USB30_TX_R_P1
R101 0_0402_5%@ R102 0_0402_5%@
R103 0_0402_5%@ R104 0_0402_5%@
R105 0_0402_5%@ R106 0_0402_5%@
2012/12/21
2012/12/21
2012/12/21
1 2 1 2
1 2 1 2
1 2 1 2
D
@
USB20_P1_R USB20_N1_R
@
USB20_P2_RUSB20_P2 USB20_N2_RUSB20_N2
USB30_RX_R_N2USB30_RX_N2
AZ5425-01F_DFN1006P2E2
1
D20
1
2
2
AZ5425-01F_DFN1006P2E2
1
D23
1
2
2
USB30_TX_R_N1USB30_TX_C_N1USB30_TX_N1 USB20_P1_RUSB20_P1
USB30_RX_R_P1USB30_RX_P1
Title
Title
Title
USB 3.0 PORT (LEFT)
USB 3.0 PORT (LEFT)
USB 3.0 PORT (LEFT)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
220U_6.3V_M
C71
+
1 2
C166
1 2
1U_0603_25V6M
1 2
C72 470P_0402_50V7K
@
JUSB1
9
StdA_SSTX+
1
VBUS
8
StdA_SSTX-
3
D+
7
GND_DRAIN
2
D-
6
StdA_SSRX+
4
GND_5
5
StdA_SSRX-
SINGA_2UB4034-100101F
ME@
+USB_VCCA
1
2
@
C167
@
1 2
1U_0603_25V6M
1 2
C168 470P_0402_50V7K
@
JUSB2
9
StdA_SSTX+
1
VBUS
8
StdA_SSTX-
3
D+
7
GND_DRAIN
2
D-
6
StdA_SSRX+
4
GND_5
5
StdA_SSRX-
SINGA_2UB4034-100101F
ME@
401025
401025
401025
@
10
GND_1
11
GND_2
12
GND_3
13
GND_4
AZ5425-01F_DFN1006P2E2
D22
1
2
10
GND_1
11
GND_2
12
GND_3
13
GND_4
1.1
1.1
1.1
41 61
41 61
41 61
of
of
of
E
A
B
C
D
E
F
G
H
SATA HDD Conn.
JHDD1
1
GND_1
10 11 12 13 14 15 16 17 18 19 20 21
LCN_ASF98-2231S10-0002
2
1
.01U_0402_16V7-K
2
A+
3
A-
4
GND_2
5
B-
6
B+
7
GND_3
8
V33_1
9
V33_2 V33_3 GND_4 GND_5 GND_6 V5_1 V5_2 V5_3 GND_7 DAS/DSS GND_8 V12_1 V12_2 V12_322GND_9
ME@
1
C100
2
GND_12 GND_11 GND_10
1
C101
2
10U_0805_25V6K
26 25 24 23
.1U_0402_10V6-K
ODD_EN#
SATA_PTX_DRX_P213 SATA_PTX_DRX_N213
SATA_PRX_DTX_N213
SATA_PRX_DTX_P213
SATA_PTX_DRX_P2 SATA_PTX_DRX_N2
SATA_PRX_DTX_N2 SATA_PRX_C_DTX_N2_14 SATA_PRX_DTX_P2
1 2
C87 .01U_0402_16V7-K14@
1 2
C88 .01U_0402_16V7-K14@
1 2
C89 .01U_0402_16V7-K14@
1 2
C90 .01U_0402_16V7-K14@
SATA_PTX_C_DRX_P2_14 SATA_PTX_C_DRX_N2_14
SATA_PRX_C_DTX_P2_14
FOR15"
Co‐lay
SATAODDFFCConnJODD2&JODD3.
SATA_PTX_DRX_P2 SATA_PTX_DRX_N2
SATA_PRX_DTX_N2 SATA_PRX_C_DTX_N2_15 SATA_PRX_DTX_P2
ODD_DETECT#19
ODD_DETECT# +5V_ODD
C96 .01U_0402_16V7-K15@ C97 .01U_0402_16V7-K15@
C99 .01U_0402_16V7-K15@ C98 .01U_0402_16V7-K15@
R107 0_0402_5%@ R108 0_0402_5%@
1 2 1 2
1 2 1 2
1 2 1 2
Change R344,R107 to 0ohm jump
1 2
ODD_DA#14 ODD_DA_EC#44
Q30
2
G
R344 0_0402_5%@
+5V_ODD
12
R179 470_0603_5%@
13
D
@
S
2N7002KW_SOT323-3
R112 0_0402_5%@
1 2
+3VS
1 2
R111 10K_0402_5%
LED_KB_PWM44
SATA_PTX_C_DRX_P2_15 SATA_PTX_C_DRX_N2_15
SATA_PRX_C_DTX_P2_15
ODD_DETECT#_R
SATA_PTX_C_DRX_P2_15 SATA_PTX_C_DRX_N2_15
SATA_PRX_C_DTX_N2_15 SATA_PRX_C_DTX_P2_15
+5VALW
1 2
C83 .01U_0402_16V7-K
1 2
C84 .01U_0402_16V7-K
1 2
C85 .01U_0402_16V7-K
1 2
C86 .01U_0402_16V7-K
+5VS
1
C93 1U_0603_25V6M
2
R110 10K_0402_5%
R113
1 2
100K_0402_5%
@
2N7002KW_SOT323-3
1
2
ODD_EN#
112
JUMP_43X79
C94 10U_0805_25V6K
C164
@
1
2
1 2
R260
@
SATA_PTX_DRX_P4 SATA_PTX_DRX_N4
SATA_PRX_DTX_P4
C92 .1U_0402_10V6-K
+5VS +5V_ODD+5VALW
R109 10K_0402_5%
@
@
Q16
2
G
@
1 2
1 2
13
D
S
SATA_PTX_DRX_P413
1 1
2 2
3 3
4 4
SATA_PTX_DRX_N413
SATA_PRX_DTX_N413
SATA_PRX_DTX_P413
For EMC
+5VS
1
C91 1000P_0402_50V7K
2
ODD_EN19
100K_0402_5%
J6
1
2
.1U_0402_10V6-K
SATA_PTX_C_DRX_P4 SATA_PTX_C_DRX_N4
SATA_PRX_C_DTX_N4SATA_PRX_DTX_N4 SATA_PRX_C_DTX_P4
2
1
C95 10U_0805_25V6K
2
J7
2
112
JUMP_43X79
Q15
D
S
13
LP2301ALT1G_SOT23-3
G
2
@
2
C102 .01U_0402_16V7-K
1
@
+5VS_HDD
C165
@
FOR14"
SATAODDConn.
ODD_DETECT#_R +5V_ODD
R_ODD_DA#
R_ODD_DA#
ODD_DETECT#_R +5V_ODD
R_ODD_DA#
+5VS
LED_KB_PWM
JODD1
1
GND_1
2
RX+
3
RX-
4
GND_2
5
TX-
6
TX+
7
GND_3
8
DP
9
+5V_1
10
+5V_2
11
MD
12
GND_4
13
GND_5
SUYIN_127382FR013G258ZR
ME@
JODD2
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
GND_1
12
GND_2
ACES_51524-01001-003
ME@
JODD3
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
GND_1
18
GND_2
ACES_51524-0160N-001
ME@
GND1 GND2
14 15
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
A
B
C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
D
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
E
F
2012/12/21
2012/12/21
2012/12/21
Title
HDD/ODD CONN
HDD/ODD CONN
HDD/ODD CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
G
401025
401025
401025
of
of
of
42 61
42 61
42 61
H
1.1
1.1
1.1
5
+3VS
+1.5VS
+3VS
+5VS
D D
Change RA1,RA6,RA7,RA9,RA11,RA14 to 0ohm jump
+3VS
+1.5VS
1 2
RA1 0_0402_5%@
1 2
RA3 0_0402_5%@
1 2
RA6 0_0402_5%@
1 2
RA7 0_0402_5%@
1 2
RA9 0_0603_5%@
1 2
RA11 0_0603_5%@
1 2
RA13 0_0402_5%@
1 2
RA14 0_0402_5%@
+3.3VD +CPVDD
+5VA +5VD
AVDD2
1 2
RA2 0_0402_5%
1 2
RA4 0_0402_5%
1 2
RA5 0_0402_5%
@
1 2
RA8 0_0402_5%
@
1 2
RA10 0_0402_5%
@
1 2
RA12 0_0402_5%
@
4
+5VA
1
CA4 10U_0805_10V4Z
2
1
CA5 .1U_0402_10V6-K
2
Place close to Pin 26
VREFCodec
1
GNDAGND
CA15
2.2U_0603_6.3V6K
2
3
+3.3VD
1
CA9 10U_0603_6.3V6M
2
1
2
Place close to Pin 1
1
CA44 .1U_0402_10V6-K
2
CA10 .1U_0402_10V6-K
DVDD-IODVDD-IO
1
CA1 10U_0805_10V4Z
2
1
CA6 .1U_0402_10V6-K
2
Place close to pin 9
2
1
CA2 10U_0805_10V4Z
2
1
CA7 .1U_0402_10V6-K
2
Place close to Pin 41
1
+5VD+5VD
1
CA8 10U_0805_10V4Z
2
1
CA3 .1U_0402_10V6-K
2
Place close to Pin 46
If AVDD2 is design to 1.5V, you will get better power consumption.
CA14
EC Beep
C C
PCH Beep
EC_MUTE#44
BEEP#44
PCH_SPKR13
HDA_RST_AUDIO#
EC_MUTE#
1 2
.1U_0402_10V6-K
CA17
1 2
.1U_0402_10V6-K
1 2
RA29 0_0402_5%@
DA1
@
1 2
DA2
@
1 2
PC_BEEP1
1 2
33_0402_5%
RB751V-40_SOD323-2
RB751V-40_SOD323-2
ANDGATE
1 2
RA30 0_0402_5%
RA22
PC_BEEP
12
RA23 1K_0402_5%@
RA24 is 33ohm as Intel suggest, but codec suggest is 10ohm, need to confirm test in future
PDB
12
RA40 100K_0402_5%@
Place close to Pin 40
Place close to Pin 36
DMIC_DATA34
DMIC_CLK34
HDA_SDIN013
HDA_SDOUT_AUDIO13
HDA_BITCLK_AUDIO13 HDA_SYNC_AUDIO13
Change RA25,RA26,RA27 to 0ohm jump
PLUG_IN45
WhenSPKR_MUTE#ishigh,trunonAMP.
WhenSPKR_MUTE#islow,trunoffAMP.
B B
C_MIC2_L C_MIC2_R
1 2
CA27 2.2U_0603_6.3V6K
1 2
CA28 2.2U_0603_6.3V6K
RA37
1 2
1K_0402_0.5%
+MIC2_VREFO_R
12
12
1
CA34 10U_0603_10V6K
2
RA35
2.2K_0402_5%
RA38 22K_0402_5%
COMBO-GPI
12
RA39 22K_0402_5%
MIC 45
Place close to Pin 28
+3.3VD DVDD-IO
1 2
CA13 10U_0805_10V4Z
1 2
CA16 10U_0805_10V4Z
DMIC_DATA DMIC_CLK
1 2
RA17 0_0402_5%
1 2
RA21 22_0402_5%
1 2
RA24 10_0402_5%
1 2
RA25 0_0402_5%@
1 2
RA26 0_0402_5%@
1 2
RA27 0_0402_5%@
1 2
RA28 39.2K_0402_1%
HDA_RST_AUDIO#13
HDA_RST_AUDIO# DMIC_CLK HDA_SDIN0 HDA_SDOUT_AUDIO HDA_BITCLK_AUDIO HDA_SYNC_AUDIO
1
CA38
@
33P_0402_50V8J
2
1
CA39 22P_0402_50V8-J
2
+5VA AVDD2
+5VD +CPVDD
DMIC_DATA_R DMIC_CLK_R
HDA_SDIN0_R HDA_SDOUT_AUDIO_R
HDA_BITCLK_AUDIO_R HDA_SYNC_AUDIO_R
PC_BEEP
C_MIC2_L C_MIC2_R
PDB
@
1
CA40 10P_0402_50V8J
2
SPKOUT_L1+ SPKOUT_L2­SPKOUT_R1+ SPKOUT_R2-
UA1
1
DVDD
9
DVDD-IO
26
AVDD1
40
AVDD2
41
PVDD1
46
PVDD2
36
CPVDD
2
GPIO0/DMIC-DATA
3
GPIO1/DMIC-CLK
8
SDATA-IN
5
SDATA-OUT
6
BCLK
10
SYNC
12
PCBEEP
13
SenseA
14
SenseB
19
MIC1-L(PORT-B-L)
20
MIC1-R(PORT-B-R)
17
MIC2-L(PORT-F-L)
18
MIC2-R(PORT-F-R)
22
LINE1-L(PORT-C-L)
21
LINE1-R(PORT-C-R)
24
LINE2-L(PORT-E-L)
23
LINE2-R(PORT-E-R)
11
RESETB
47
PDB
ALC282-CG_MQFN48_6X6
1
2
RA31 0_0603_5%@ RA32 0_0603_5%@ RA33 0_0603_5%@ RA34 0_0603_5%@
MIC1-VREFO-R MIC1-VREFO-L
HPOUT-L(PORT-I-L)
HPOUT-R(PORT-I-R)
SPDIF-OUT/GPIO2
CA41 10P_0402_50V8J
1 2 1 2 1 2 1 2
MONO-OUT
MIC2-VREFO
JDREF
VREF
CBN CBP
CPVEE
LDO1-CAP LDO2-CAP LDO3-CAP
SPK-OUT-L­SPK-OUT-L+ SPK-OUT-R-
SPK-OUT-R+
DVSS AVSS1 AVSS2
ThermalPad
1
2
16 29 30 31
15 28 32
33 35
37 34 27
39 7
43 42 44 45
48
4 25 38 49
CA42 10P_0402_50V8J
Change RA31,RA32,RA33,RA34 to 0ohm jump
For EMC
+MIC2_VREFO_R
Place close to Pin 15
1 2
RA18 20K_0402_1%
VREFCodec
HPOUTL_R HPOUTR_R HP_OUTR
CA18 2.2U_0603_10V7K CA19 2.2U_0603_10V7K CA20 10U_0805_10V4Z
CA21 10U_0805_10V4Z CA22 10U_0805_10V4Z
SPKOUT_L2­SPKOUT_L1+ SPKOUT_R2­SPKOUT_R1+
COMBO-GPI
1 2
RA19 75_0402_5%
1 2
RA20 75_0402_5%
1 2 1 2 1 2
1 2 1 2
1
CA43 10P_0402_50V8J
2
HP_OUTL
Place close to Pin 34/35/36
For EMC
JSPK1
1
SPK_L1 SPK_L2 SPK_R1 SPK_R2
1
1
1
CA23
CA24
2
2
@
@
1000P_0402_50V7K
1
CA25
CA26
2
2
@
@
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1
2
2
3
3
4
4
5
GND1
6
GND2
ACES_88231-04001
ME@
HP_OUTL 45
HP_OUTR 45
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/05/02
2012/05/02
2012/05/02
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2012/5/02
2012/5/02
2012/5/02
2
Title
Audio Codec_ALC282
Audio Codec_ALC282
Audio Codec_ALC282
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
401025
401025
401025
1
of
of
of
43 61
43 61
43 61
1.1
1.1
1.1
5
ForESD
PLT_RST#
1
CE2 220P_0402_50V7K
2
D D
For EMI
CLK_PCI_EC
1 2
RE2 10_0402_5%@
10P_0402_50V8J
1
CE1
2
@
+RTCBATT
Change RE6 to 0ohm jump
+3VALW_R
1 2
DE1
RB751V-40_SOD323-2
1 2
RE11 100K_0402_5%
C C
+3VALW_R
1 2
RE18 2.2K_0402_5%
1 2
RE20 2.2K_0402_5%
+3VS
1 2
RE27 2.2K_0402_5%
1 2
RE28 2.2K_0402_5%
H_PECI6
B B
Change RE24 to 0ohm jump
+3VL
1 2
RE31 10K_0402_5%@
1 2
RE33 10K_0402_5%@
1 2
RE37 10K_0402_5%
1 2
RE53 10K_0402_5%
1
CE12 1U_0402_6.3V6K
2
KSI[0..7]45
KSO[0..17]45
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
1 2
RE22 43_0402_5%
+3VLP
+3VALW_R
VGA_AC_DET
ON/OFF BKOFF# LID_SW#
BKOFF#
KBRST#19 SERIRQ17
LPC_FRAME#17
LPC_AD317 LPC_AD217 LPC_AD117 LPC_AD017
CLK_PCI_EC16
EC_SMI#19
EC_RX40 EC_TX40
PLT_RST#14,23,37,40
EC_SCI#19 GATEA2019
KSI[0..7] KSO[0..17]
EC_SMB_CK1 EC_SMB_DA1
KSI7 KSI6 WRST#
PAD @ PAD @ PAD @ PAD @ PAD @
PAD @ PAD @ PAD @
For factory EC flash
ON/OFF45
EC_ON45,54 EC_SMB_CK152,53 EC_SMB_DA152,53
LAN_PWR_ON#37
EC_SMB_CK217,23,39 EC_SMB_DA217,23,39
VR_ON59
USB_ON#41,45
DPWROK_EC15
EC_RSMRST#15
EC_LID_OUT#19
AC_PRESENT15
1 2
RE24 0_0402_5%@
1 2
RE25 0_0402_5%@
1 2
RE59 0_0402_5%
LPC_FRAME#
CLK_PCI_EC WRST#
EC_RX EC_TX PLT_RST#
1 1 1 1 1
1 1 1
ON/OFF EC_SMB_CK1
EC_SMB_DA1 PECI_EC
EC_SMB_CK2 EC_SMB_DA2
USB_ON#
IT0 IT1 IT2 IT3 IT4
IT5 IT6 IT7
forECversionupdatetoEX,manualmodifyPNtoFX
+3VL
GPG2
A A
RE47 10K_0402_5%@
GPG2
RE51 10K_0402_5%
GPG2
RE49 10K_0402_5%@
whenmirror,GPG2pullhigh whennomirror,GPG2pulllow
12 12 12
+3VALW_R
EC_SPI_CS1#
EC_SPI_SI
EC_SPI_SO_L
EC_SPI_CLK
5
12
RE39 0_0402_5%
12
RE40 0_0402_5%
12
RE41 0_0402_5%
12
RE42 0_0402_5%
SPI_CS1#_R
SPI_SI_R1
SPI_SO_L1
SPI_CLK_PCH_1
4
CloseEC
CE3
1 2
.1U_0402_10V6-K
1 2
RE4 0_0402_5%@
1 2
RE6 0_0402_5%
@
126
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17
110 111 115 116 117 118
112 125
128
4
VCOREVCC
UE1
4 5 6 7 8
9 10 13 14 15 16 17 22 23
58 59 60 61 62 63 64 65 36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55 56 57
94 95
33 35 93
2
SPI_CS1#_R 17
SPI_SI_R1 17
SPI_SO_L1 17
SPI_CLK_PCH_1 17
3
VBAT
KBRST#/GPB6 SERIRQ/GPM6 LFRAME#/GPM5 LAD3/GPM3 LAD2/GPM2 LAD1/GPM1 LAD0/GPM0 LPCCLK/GPM4 WRST# ECSMI#/GPD4 PWUREQ#/BBO/SMCLK2ALT/GPC7 LPCPD#/GPE6 LPCRST#/GPD2 ECSCI#/GPD3 GA20/GPB5
KSI0/STB# KSI1/AFD# KSI2/INIT# KSI3/SLIN# KSI4 KSI5 KSI6 KSI7 KSO0/PD0
Int. K/B
KSO1/PD1
Matrix
KSO2/PD2 KSO3/PD3 KSO4/PD4 KSO5/PD5 KSO6/PD6 KSO7/PD7 KSO8/ACK# KSO9/BUSY KSO10/PE KSO11/ERR# KSO12/SLCT KSO13 KSO14 KSO15 KSO16/SMOSI/GPC3 KSO17/SMISO/GPC5
PWRSW# XLP_OUT SMCLK1/GPC1 SMDAT1/GPC2 SMCLK2/PECI/GPF6 SMDAT2/PECIRQT#/GPF7 CRX1/SIN1/SMCLK3/GPH1/ID1 CTX1/SOUT1/GPH2/SMDAT3/ID2
VSTBY0 GPE4
GINT/CTS0#/GPD5 RTS1#/GPE5 CLKRUN#/GPH0/ID0
CK32KE/GPJ7 CK32K/GPJ6
RE1 0_0603_5%@
RE3 0_0603_5%
50
92
114
121
VSTBY2
VSTBY3
VSTBY4
VSTBY126VSTBY5
+3VALW_EC
127
VSTBY(PLL)
+3VS
11
12
VCC
VCORE
LPC
IT8586E/AX LQFP-128L
EXTERNAL SERIAL FLASH
SPI Flash ROM
SM Bus
WAKE UP
GPIO
Clock
VSS1
VSS2
VSS4
VSS349VSS6
1
27
91
113
1 2
1 2
AllcapacitorsclosetoEC
+3VALW_R
1
CE6
2
.1U_0402_10V6-K
minimumtracewidth12mil
74
AVCC
PWM0/GPA0 PWM1/GPA1 PWM2/GPA2
PWM6/SSCK/GPA6
PWM7/RIG1#/GPA7
ADC
ADC5/DCD1#/GPI5 ADC6/DSR1#/GPI6
ADC7/CTS1#/GPI7
DAC2/TACH0B/GPJ2 DAC3/TACH1B/GPJ3
DAC
DAC4/DCD0#/GPJ4
DAC5/RIG0#/GPJ5
PS2CLK0/TMB0/CEC/GPF0
PS2DAT0/TMB1/GPF1
PS2
PS2CLK2/GPF4
PS2DAT2/GPF5
EGCS#/GPE2 EGCLK/GPE3
GPIO
SSCE0#/GPG2 SSCE1#/GPG0
DTR1#/SBUSY/GPG1/ID7
CTX0/TMA0/GPB2
TACH1A/TMA1/GPD7
TACH0A/GPD6
L80HLAT/BAO/GPE0
L80LLAT/GPE7
AVSS
IT8586E-AX_LQFP128_14X14
EC_AGND
PWM3/GPA3 PWM4/GPA4 PWM5/GPA5
TMRI0/GPC4 TMRI1/GPC6
ADC0/GPI0 ADC1/GPI1 ADC2/GPI2 ADC3/GPI3 ADC4/GPI4
GPH3/ID3 GPH4/ID4 GPH5/ID5 GPH6/ID6
LID_SW#
EGAD/GPE1
DSR0#/GPG6
CRX0/GPC0
RI1#/GPD0 RI2#/GPD1
TACH2/GPJ0
PECI_EC BATT_TEMP ACIN# ON/OFF
VSS5
PWM
UART
75
122
3
+3VL
+3VALW
1
1
1
CE7
CE8
2
2
.1U_0402_10V6-K
.1U_0402_10V6-K
24 25 28 29 30 31
EC_FAN_PWM
32 34
SUS_VCCP
120
LAN_WAKE#
124
SUSP#
66 67 68
BATT_TEMP
69 70 71 72 73
78 79 80
H_PROCHOT#_EC
81 85
86 87
GPF2
88
GPF3
89
TP_CLK
90
TP_DATA
96 97 98 99
101
EC_SPI_CS1#
NC1
102
EC_SPI_SI
NC2
103
EC_SPI_SO_L
NC3
105
EC_SPI_CLK
NC4
108
GPJ1
109
82 83 84
77 100 106 104 107 119 123 18 21 76 48 47 19 20
ACIN# LID_SW#
GC6_EVENT#
GPG2
SYSON BKOFF#
EC_FAN_SPEED
AC_IN#
Change RE30 to 0ohm jump
VR_HOT#59
@
1 2
CE19 47P_0402_50V8J
1 2
CE15 100P_0402_50V8J@
1 2
CE16 100P_0402_50V8J@
1 2
CE18 1U_0402_6.3V6K
@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
1
1
CE10
CE9
2
2
.1U_0402_10V6-K
.1U_0402_10V6-K
PWR_LED# 45 BATT_CHG_LED# 45 BATT_LOW_LED# 45 LED_KB_PWM 42 SYS_PWROK 6,15 EC_FAN_PWM 39 BEEP# 43
IMVP_IMON 59 VR_READY 15,59
ADAPTER_ID 51,53
ROMPWREN 17 PBTN_OUT# 15
1 2
RE30 0_0402_5%
@
H_PROCHOT#_EC
2N7002KW_SOT323-3
CE11
@
2
.1U_0402_10V6-K
SUS_VCCP 57
SUSP# 46,56,57
NTC_V 52 TURBO_V 52
BATT_TEMP 52
ADP_I 51,52,53 VDDQ_PGOOD 6,55 SUSWARN# 15
MAINPWON 52,54
RE14 0_0402_5%@
ENBKL 34
PM_SLP_SUS# 15,46
SUSACK# 15 TP_CLK 45 TP_DATA 45
CAPS_LED# 45
PCH_PWR_EN 46,52
ACOFF 53
PCH_PWROK 8,15
LID_SW# 45
GC6_EVENT# 19,23
FB_CLAMP 19,23,27 ADAPTER_ID_ON# 53
EC_MUTE# 43
SYSON 55 BKOFF# 34
PM_SLP_S3# 15 PM_SLP_S4# 15 NOVO# 45
EC_TS_ON# 34
EC_FAN_SPEED 39
NUM_LED# 45
QE1
2
G
+3VS
1
CE13 .1U_0402_10V6-K
2
2012/12/14
2012/12/14
2012/12/14
1 2
Change RE14 to 0ohm jump
ReserveforDRAMRST_CNTRL_ECandPM_SLP_S5#function
RE62 0_0402_5%@ RE63 0_0402_5%@
RE61 0_0402_5%
RE58 0_0402_5%@ RE57 0_0402_5%@
ReserveforVGA_AC_DETandCPU1.5V_S3_GATEfunction
13
D
S
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
2
+3VALW_R+3VALW_R
LE1 BLM18PG181SN1D_0603
LE2 BLM18PG181SN1D_0603
12 12
12
1 2
RE60 0_0402_5%
1 2
12
1
CE14 47P_0402_50V8J
@
2
ACIN#53
2N7002KW_SOT323-3
Deciphered Date
Deciphered Date
Deciphered Date
2
1 2
1 2
VGA_AC_DET
H_PROCHOT# 6,51,52
+3VLP
ACIN#
D
S
PROCHOT# 52
PM_SLP_S5# 15 DRAMRST_CNTRL_EC 6
ME_FLASH 13
AOAC_ON# 40 PCIE_WAKE# 15,19,37,40
12
RE29 10K_0402_5%
13
QE2
2
G
2012/12/21
2012/12/21
2012/12/21
1
CE4 .1U_0402_10V6-K
2
EC_AGND
EC_AGND
EC_FAN_SPEED EC_FAN_PWM LPC_FRAME# ENBKL
TP_CLK TP_DATA
USB_ON#
GC6_EVENT# SUSP# SUSP# SYSON SUS_VCCP
VGA_AC_DET 23 CPU1.5V_S3_GATE 10 ODD_DA_EC# 42
ACIN 53
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
1
+3VALW_EC
1
CE5 1000P_0402_50V7K
2
RE12 10K_0402_5%
RE17 4.7K_0402_5% RE19 4.7K_0402_5%
RE21 10K_0402_5%
+3VS+5VS
RE45 0_0402_5%@ RE46 0_0402_5%@
Title
Title
Title
EC ITE8586LQFP
EC ITE8586LQFP
EC ITE8586LQFP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
+3VALW_R
12
RE5 10K_0402_5%
LAN_WAKE#
1 2 1 2
RE15 10K_0402_5%@
1 2
RE23 10K_0402_5%
1 2
RE26 100K_0402_5%@
12 12
1 2
1 2
RE43 10K_0402_5%
1 2
RE32 100K_0402_5%@
1 2
RE38 100K_0402_5%
1 2
RE35 100K_0402_5%@
1 2
RE56 100K_0402_5%
SYSON
EMCRequest
@
1 2 1 2
EC_TX EC_RX
12
RE44 100K_0402_5%@
401025
401025
401025
1
LAN_WAKE# 37,40,46
+3VS
+3VS
+5VALW
+3VALW_R
1
CE17 .1U_0402_10V6-K
2
J80P1
1
1
2
2
3
3
4
4
5
GND1
6
GND2
ACES_85205-04001
ME@
44 61
44 61
44 61
of
of
of
1.1
1.1
1.1
5
+3VLP
ON/OFF switch
NOVO#
NOVO#44
51_ON# ON/OFF
D D
Change R130,R133 to 0ohm jump
ON/OFFBTN#
J8
1 2
SHORT PADS
DAN202UT106_SOT323-3 @
J9
1 2
SHORT PADS
EC_ON44,54
10K_0402_5%
R127 100K_0402_5%@
1 2
R129 0_0402_5%@ R130 0_0402_5%@
1 2
R133 0_0402_5%@
1
EC_ON
R137
@
1 2 1 2
D13
1 2
+3VALW
2 3
R128 100K_0402_5%
1 2
Q17
2
G
@
D12
2
1
3
DAN202UT106_SOT323-3
+3VALW
R131 100K_0402_5%
@
1 2
ON/OFF 51_ON#
13
D
S
2N7002KW_SOT323-3
NOVO_BTN#
+3VLP
R132 100K_0402_5%
1 2
ON/OFF 44
51_ON# 51
4
K/B Connector
KSI[0..7] KSO[0..17]
KSO2 KSO1 KSO15 KSO6 KSO8 KSO13 KSO12 KSO11 KSO10 KSO3 KSO4 KSI0 KSO0
1 2
C113 100P_0402_50V8J@
1 2
C114 100P_0402_50V8J@
1 2
C116 100P_0402_50V8J@
1 2
C118 100P_0402_50V8J@
1 2
C120 100P_0402_50V8J@
1 2
C122 100P_0402_50V8J@
1 2
C124 100P_0402_50V8J@
1 2
C126 100P_0402_50V8J@
1 2
C128 100P_0402_50V8J@
1 2
C130 100P_0402_50V8J@
1 2
C132 100P_0402_50V8J@
1 2
C134 100P_0402_50V8J@
For EMC
KSI[0..7] 44 KSO[0..17] 44
KSO16 KSO17
KSO7 KSI2 KSO5 KSI3 KSO14 KSI7 KSI6 KSI5 KSI4 KSO9 KSI1
1 2
C110 100P_0402_50V8J@
1 2
C112 100P_0402_50V8J@
1 2
C111 100P_0402_50V8J@
1 2
C115 100P_0402_50V8J@
1 2
C117 100P_0402_50V8J@
1 2
C119 100P_0402_50V8J@
1 2
C121 100P_0402_50V8J@
1 2
C123 100P_0402_50V8J@
1 2
C125 100P_0402_50V8J@
1 2
C127 100P_0402_50V8J@
1 2
C129 100P_0402_50V8J@
1 2
C131 100P_0402_50V8J@
1 2
C133 100P_0402_50V8J@
1 2
C135 100P_0402_50V8J@
KSO15 KSO10 KSO11 KSO14 KSO13 KSO12
3
14"
JKB2
27
GND1
28
GND2
CAPS_LED#
CAPS_LED#44
1 2
R289 0_0402_5%14@
1 2
R290 0_0402_5%14@
1 2
R291 0_0402_5%14@
1 2
R292 0_0402_5%14@
1 2
R293 0_0402_5%14@
1 2
R294 0_0402_5%14@
1 2
KSO3
R295 0_0402_5%14@
1 2
KSO6
R296 0_0402_5%14@
1 2
KSO8
R297 0_0402_5%14@
1 2
KSO7
R298 0_0402_5%14@
1 2
KSO4
R299 0_0402_5%14@
1 2
KSO2
R300 0_0402_5%14@
1 2
KSI0
R301 0_0402_5%14@
1 2
KSO1
R302 0_0402_5%14@
1 2
KSO5
R303 0_0402_5%14@
1 2
KSI3
R304 0_0402_5%14@
1 2
KSI2
R305 0_0402_5%14@
1 2
KSO0
R306 0_0402_5%14@
1 2
KSI5
R307 0_0402_5%14@
1 2
KSI4
R308 0_0402_5%14@
1 2
KSO9
R309 0_0402_5%14@
1 2
KSI6
R310 0_0402_5%14@
1 2
KSI7
R311 0_0402_5%14@
1 2
KSI1
R312 0_0402_5%14@
KB_LED_PWR
26
26
25
25
24
KB_24
24
23
KB_23
23
22
KB_22
22
21
KB_21
21
20
KB_20
20
19
KB_19
19
18
KB_18
18
17
KB_17
17
16
KB_16
16
15
KB_15
15
14
KB_14
14
13
KB_13
13
12
KB_12
12
11
KB_11
11
10
KB_10
10
9
KB_9
9
8
KB_8
8
7
KB_7
7
6
KB_6
6
5
KB_5
5
4
KB_4
4
3
KB_3
3
2
KB_2
2
1
KB_1
1
ACES_88514-02601-071
ME@
12
+3VS
R340
300_0402_5%
2
12
R134
300_0402_5%
NUM_LED#44
1 2
R337 0_0402_5%15@
1 2
R338 0_0402_5%15@
1 2
CAPS_LED# KB_22
R339 0_0402_5%15@
1 2
R342 0_0402_5%15@
1 2
KSO17 KB_20
R341 0_0402_5%15@
1 2
KSO16 KB_19
R343 0_0402_5%15@
1 2
KSO15
R313 0_0402_5%15@
1 2
KSO10
R315 0_0402_5%15@
1 2
KSO11
R314 0_0402_5%15@
1 2
KSO14
R317 0_0402_5%15@
1 2
KSO13
R316 0_0402_5%15@
1 2
KSO12
R318 0_0402_5%15@
1 2
KSO3
R319 0_0402_5%15@
1 2
KSO6
R320 0_0402_5%15@
1 2
KSO8
R321 0_0402_5%15@
1 2
KSO7
R322 0_0402_5%15@
1 2
KSO4
R323 0_0402_5%15@
1 2
KSO2
R324 0_0402_5%15@
1 2
KSI0
R325 0_0402_5%15@
1 2
KSO1
R326 0_0402_5%15@
1 2
KSO5
R327 0_0402_5%15@
1 2
KSI3
R328 0_0402_5%15@
1 2
KSI2
R329 0_0402_5%15@
1 2
KSO0
R330 0_0402_5%15@
KB_24 KB_23
KB_21KB_LED_PWR
KB_18 KB_17 KB_16 KB_15 KB_14 KB_13 KB_12 KB_11 KB_10 KB_9 KB_8 KB_7 KB_6 KB_5 KB_4 KB_3 KB_2 KB_1 KSI5 KSI4 KSO9 KSI6 KSI7 KSI1
15"
ME@
30
30
GND1
29
29
GND2
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
ACES_50504-3041-001
1
14"
KB_1 KB_2 KB_3 KB_4
JKB3
KB_5
31
KB_6
32
KB_7 KB_8 KB_9 KB_10 KB_11 KB_12 KB_13 KB_14 KB_15 KB_16 KB_17 KB_18 KB_19 KB_20 KB_21 KB_22 KB_23 KB_24
15"
KSI1_14 KSO0_15
KSI2_15KSI7_14
KSI6_14 KSI3_15
KSO5_15KSO9_14 KSO1_15KSI4_14
KSI5_14 KSI0_15
KSO2_15KSO0_14 KSO4_15KSI2_14 KSO7_15KSI3_14 KSO8_15KSO5_14 KSO6_15KSO1_14 KSO3_15KSI0_14 KSO12_15
KSO2_14
KSO13_15KSO4_14
KSO7_14 KSO14_15
KSO11_14KSO8_14 KSO10_15KSO6_14
KSO3_14 KSO15_15
KSO16_15KSO12_14 KSO17_15KSO13_14 KB_LED_PWR_15
KSO14_14
CAPS_LED#_15KSO11_14 VDD_15KSO10_14 NUM_LED#_15KSO15_14
TP/B Connector
C C
+3VS
+3VALW
TP_CLK44
1
TP_DATA44
C136
2
.1U_0402_10V6-K
D14
4
TP_CLK TP_DATA
I/O3
5
VDD
6
I/O4
AZC099-04S.R7G_SOT23-6
@
For EMC
B B
LED (For 14")
PWR_LED#44
BATT_LOW_LED#44
BATT_CHG_LED#44
A A
C137
@
I/O1
GND
I/O2
PWR_LED#
BATT_LOW_LED#
BATT_CHG_LED#
TP_CLK TP_DATA
1
C138
2
@
100P_0402_50V8J
1
2
3
SMB_DATA_S3_TPSMB_CLK_S3_TP
SMB_CLK_S311,12,17,40 SMB_DATA_S311,12,17,40 LID_SW# 44
LED1
1 2
19-217-T1D-DP1Q2QY-3T_WHITE
14@
LED2
1 2
19-217-S2C-FM2P1VY-3T_ORANGE
14@
LED3
1 2
19-217-T1D-DP1Q2QY-3T_WHITE
14@
5
SMB_CLK_S3_TP
1
SMB_DATA_S3_TP
2
@
1
100P_0402_50V8J
2
C139
For EMC
Change R141,R142 to 0ohm jump
1 2
R149 300_0402_5%14@
1 2
R150 300_0402_5%14@
1 2
R153 300_0402_5%14@
R141 0_0402_5%@ R142 0_0402_5%@
100P_0402_50V8J
@
1
2
C140
1 2 1 2
100P_0402_50V8J
+5VALW
+3VALW
+5VALW
JTP1
1
1
2
2
3
3
4
4
5
5
6
GND1
6
GND2
ACES_50503-0060N-001
ME@
SMB_CLK_S3_TP SMB_DATA_S3_TP
7 8
PWR/B Connector
2
3
1
@
For EMC
LED (For 15")
+5VALW +3VALW
PWR_LED# BATT_LOW_LED# BATT_CHG_LED#
4
NOVO_BTN# ON/OFFBTN#
PWR_LED#
LID_SW#
D15 PJSOT24C_SOT23-3
JLED1
1
1
2
2
3
3
4
4
5
5
6
6
ACES_50503-0060N-001
ME@
Right Side USB2.0 Port X 1 (USB/B)
+5VALW
+3VL
JPWRB1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
GND_1
10
GND_2
ACES_51524-00801-001
ME@
7
GND1
8
GND2
2.2U_0603_10V7K
1 2
C141
USB_ON#41,44
R345 place between JUSB3.13 and JUSB3.14
1 2
R345 0_0402_5%
3
U10
1
GND
2
VIN1
3
VIN2 EN4FLAG
AP2815CMMTR-G1_MSOP8
Low Active 1.5A
VOUT3 VOUT2 VOUT1
+USB_VCCB+5VALW 8 7 6 5
USB_OC2#USB_ON#
1
C143 1000P_0402_50V7K@
2
USB I/O Connector
USB_OC2# 18
USB20_P518 USB20_N518
USB20_P418 USB20_N418
1 2
HP_OUTR43 HP_OUTL43
MIC43
R208 0_0603_5%@
1 2
R207 0_0603_5%@
1 2
R209 0_0603_5%@
PLUG_IN43
Change R207,R208,R209 to 0ohm jump
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
+USB_VCCB
+3VS
USB20_P5 USB20_N5
USB20_P4 USB20_N4
2
R_HP_OUTR R_HP_OUTL
R_MIC
2012/12/14
2012/12/14
2012/12/14
JUSB3
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
22
17
GND2
18
21
18
GND1
19
19
20
20
HB_A082015-SAHR31
ME@
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2012/12/21
2012/12/21
2012/12/21
Title
Title
Title
KBD/PWR/IO/LED/TP Conn.
KBD/PWR/IO/LED/TP Conn.
KBD/PWR/IO/LED/TP Conn.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
1
401025
401025
401025
45 61
45 61
45 61
of
of
of
1.1
1.1
1.1
A
+5VALW to +5VS
AP4800BGM VGS=10V, ID=9A, Rds=18m ohm VGS=+-25V
+5VALW
1 1
1
@
2
C149 10U_0805_25V6K
Q31
8 7 6 5
C155
0.01U_0402_25V7K
+5VS
1 2 3
AP4800BGM-HF_SO-8
4
1
2
1
C150 10U_0805_25V6K
2
R156
1 2
82K_0402_1%
820K_0402_5%
R160
1
C151 1U_0603_25V6M
2
5VS_GATE5VS_GATE_R
13
12
D
Q20
@
S
B
12
R157
150K_0402_5%
2
SUSP
G
2N7002KW_SOT323-3
+VSB
2
G
Q21
12
R154 470_0603_5%@
13
D
@
S
2N7002KW_SOT323-3
1
@
2
C
+3VALW to +3VS
+3VALW
Q32
8 7
6
C152 10U_0805_25V6K
5
0.01U_0402_25V7K
AP4800BGM VGS=10V, ID=9A, Rds=18m ohm VGS=+-25V
+3VS
1 2 3
AP4800BGM-HF_SO-8
4
1 2
0_0402_5%
820K_0402_5%
C156
3VS_GATE_R
1
2
1
2
R158
R161
@
C153 10U_0603_6.3V6M
R180
0_0402_5%
R181
0_0402_5%
@
12
D
12
5VS_GATE
12
3VS_GATE
13
D
@
S
1
C154 1U_0603_25V6M
2
Q22
G
2N7002KW_SOT323-3
R159
470K_0402_5%
@
2
SUSP
E
12
R155
@
470_0603_5%
12
+VSB
Q23
2
G
13
D
S
@
2N7002KW_SOT323-3
2 2
1 2
R166 100K_0402_5%@
PCH_PWR_EN44,52
PM_SLP_SUS#15,44
PCH_PWR_EN
PM_SLP_SUS#
1 2
R167 0_0402_5%@
1 2
R168 0_0402_5%@
Change R167 to 0ohm jump
+5VALW
+5VALW
12
61
S
R170 0_0402_5%@
12
R201 100K_0402_5%@
61
D
S
R202 100K_0402_5%@
D
1 2
5
G
LAN_WAKE#37,40,44
3 3
FBVDDQ_PWR_EN27,56
2N7002KDWH_SOT363-6
4 4
DGPU_PWROK19,27,57,58
2N7002KDWH_SOT363-6
LAN_WAKE#
Q36A
2
A
Q35A
G
2
G
@
@
5
G
+1.5VS_VGA
@
@
PCH_PWR_EN#_R
12
R206
@
470_0603_5%
34
D
2N7002KDWH_SOT363-6
Q35B
S
+1.05VS_VGA
12
R205
@
470_0603_5%
34
D
Q36B
S
+5VALW
12
@
PCH_PWR_EN#
PCH_PWR_EN#PCH_PWR_EN#_R
13
D
Q24
2
G
12
R169 100K_0402_5%
2N7002KDWH_SOT363-6
S
NVDD_PWR_EN14,58
2N7002KDWH_SOT363-6
R162 100K_0402_5%
@
2N7002KW_SOT323-3
Q37A
B
+5VALW+RTCBATT
12
+3VALW +3V_PCH
1
C157 .1U_0402_10V6-K
@
2
PCH_PWR_EN#_R
+VGA_CORE
5
G
@
12
R204
@
470_0603_5%
34
D
2N7002KDWH_SOT363-6
Q37B
S
DGPU_PWR_EN14,23
Change R174 to 0ohm jump
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
+5VALW
12
R203 100K_0402_5%@
61
D
2
G
S
@
C
J10
112
JUMP_43X79
Q25
D
S
13
LP2301ALT1G_SOT23-3
G
2
@
1
C159
@
.1U_0402_10V6-K
2
2
Id=3.2A
1
C158
@
0.01U_0402_25V7K
2
+3VS to +3VS_VGA
47K_0402_5%
DGPU_PWR_EN#
R174 0_0402_5%@
2012/12/14
2012/12/14
2012/12/14
12
100K_0402_5%
2
12
R175
OPT@
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
+5VALW
12
R171
13
D
Q28
G
S
Deciphered Date
Deciphered Date
Deciphered Date
SUSP10,40,55
OPT@
.1U_0402_10V6-K
1 2
R173
10K_0402_5%
OPT@
OPT@
2N7002KW_SOT323-3
D
+3VS
C160
2012/12/21
2012/12/21
2012/12/21
1
@
2
1
OPT@
C163 .1U_0402_10V6-K
2
R163 100K_0402_5%
SUSP
SUSP#44,56,57
2N7002KDWH_SOT363-6
Q27
OPT@
LP2301ALT1G_SOT23-3
S
G
2
+3VS_VGA
D
13
@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
12
R164 100K_0402_5%@
61
Q26A
D
2
G
S
1
C161
0.01U_0402_25V7K
2
DGPU_PWR_EN#
DC V TO VS INTERFACE
DC V TO VS INTERFACE
DC V TO VS INTERFACE
2
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
G
Q29
+0.675VS
12
34
D
Q26B
S
2N7002KDWH_SOT363-6
12
R172 470_0603_5%@
13
D
S
2N7002KW_SOT323-3@
401025
401025
401025
E
R165 47_0603_5%
5
G
SUSP
OPT@
1
C162 10U_0603_6.3V6M
2
46 61
46 61
46 61
of
of
of
1.1
1.1
1.1
5
D D
AC MODE
A1
VIN
V
PU301
V
BATT MODE
C C
BATT
B1
4
B2
A2
+3VLP
V
A3
A4
+3VALW
B4
B3
V
B5
VR_ON
V
EC
V
V
10
A2
PU904
V
B+
EC_ON
ON/OFF NOVO
PU901 +CPU_CORE
V
11 VR_REDY
3
PCH_PWR_EN#
1
DPWROK_EC
4
PCH_RSMRST#
5
PBTN_OUT#
PM_SLP_S3# PM_SLP_S4# PM_SLP_S5#
V
PM_SLP_SUS#
12
PCH_PWROK
13
SYS_PWROK
SYSON
2
2
Q25,+3V_PCH
V
3
+3V_PCH
1
V
V
PM_DRAM_PWRGD
VV
6
PCH
H_CPUPWRGD
CPU_PLTRST#
14
V
15
16
CPU
V
V
V V
NVDD_PWR_EN
(DIS)
7
+1.35V PU501
V
Q31
V
+5VS
Vb
DGPU_PWR_EN
(DIS)
Va
+VGA_CORE
V
PU801
DGPU_PWROK
+1.5VS_VGA
V
PU601
VV
B B
SUSP#,SUSP
9
Q32
V
+3VS
PU602
V
+1.5VS
PU502
V
+1.05VSP_VGA
V
PU702
+3VS_VGA
V
Q27
VGA
V
VV
+0.675V
SUS_VCCP
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
8
3
PU701
V
+1.05VS
2012/12/14
2012/12/14
2012/12/14
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/21
2012/12/21
2012/12/21
Title
Title
Title
Power sequence Block
Power sequence Block
Power sequence Block
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
1
of
of
of
47 61
47 61
47 61
1.1
1.1
1.1
5
4
3
2
1
RH153
10K_0402_5%
SD02810028J
UV5
Micron
M4@
SA00005ON10
UV5
Hynix
H2@
SA00005VS00
H2@
UV6
SA00005ON10
Micron
M4@
UV6
Hynix
H2@
SA00005VS00
UV3
UL1
UL1
8106@
RTL8106E-CG
D D
C C
SA00005MA00
ZZZ6
PCB PN
DAZ0T100100
14@
ZZZ8
PCB PN
DAZ0T200100
15@
8111GS@
RTL8111GS-CG
SA00005O70J
SA00005SH10
RV69
UV3
K4W4G1646B-HC11_FBGA96
S4@
SA00005OM20
RV69
20K_0402_1%
SD03420028J
UV4
Samsung
S2@
SA00005SH10
S2@
45.3K_0402_1%
SD03445328J
S4@
Samsung
S2@
RH153
UV5
Samsung
S2@
SA00005SH10
S2@
10K_0402_5%
SD02810028J
UV4
SA00005OM20
RH159
10K_0402_5%
SD02810028J
UV6
Samsung
S2@
SA00005SH10
K4W4G1646B-HC11_FBGA96
S4@
S4@
UV3
hynix
H4@
SA00005YL00
RV69
H4@
UV3
Micron
M2@
SA00005M100
RV69
30.1K_0402_1%
SD03430128J
UV5
K4W4G1646B-HC11_FBGA96
S4@
SA00005OM20
UV4
SA00005YL00
hynix
H4@
M2@
UV4
Micron
M2@
SA00005M100
RH159
H4@
UV5
Micron
M2@
SA00005M100
RH153
M2@
10K_0402_5%
SD02810028J
UV6
K4W4G1646B-HC11_FBGA96
S4@
SA00005OM20
UV5
hynix
H4@
SA00005YL00
UV6
Micron
M2@
SA00005M100
UV6
hynix
H4@
SA00005YL00
UV3
SA00005VS00
RV69
UV3
Micron
M4@
SA00005ON10
RV69
M4@
10K_0402_1%
SD03410028J
Hynix
H2@
H2@
24.9K_0402_1%
SD03424928J
UV4
Micron
M4@
SA00005ON10
RH159
10K_0402_5%
SD02810028J
UV4
Hynix
H2@
SA00005VS00
M4@
15K_0402_1%
SD03415028J
B B
PR812
39K_0402_1%
N14MGE@
PR815
24K_0402_1%
N14MGE@
A A
PR917
7.5K_0402_1%
47W@
PR811
30K_0402_1%
N14MGE@
PR814
3K_0402_1%
N14MGE@
PR912
15.4K_0402_1%
47W@
5
PR840
3K_0402_1%
N14MGE@
PC812
1800P_0402_50V7-K
N14MGE@
PR910
66.5K_0402_1%
47W@
U6
EMC1403-2-AIZL-TR_MSOP10
OPT@ SA00002921J
U6
EMC1403-2-AIZL-TR_MSOP10
47W@ SA00002921J
4
Q12
MMST3904-7-F_SOT323-3
OPT@ SB000002R0J
Q12
MMST3904-7-F_SOT323-3
47W@ SB000002R0J
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C58
2200P_0402_50V7K
OPT@ SE074222K8J
C58
2200P_0402_50V7K
47W@ SE074222K8J
2012/12/14
2012/12/14
2012/12/14
3
10K_0402_5%
SD02810028J
ZZZ4
Samsung
S2GB@
X7602212001
Q11
MMST3904-7-F_SOT323-3
OPT@ SB000002R0J
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
ZZZ5
Micron
M2GB@
X7602212002
C56
2200P_0402_50V7K
OPT@ SE074222K8J
2012/12/21
2012/12/21
2012/12/21
2
ZZZ7
Hynix
H2GB@
X7602212003
ZZZ1
Samsung
S1GB@
X7602212004
Title
Title
Title
Virtual symbol
Virtual symbol
Virtual symbol
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
ZZZ2
X7602212005
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Micron
M1GB@
ZZZ3
Hynix
H1GB@
X7602212006
401025
401025
401025
1
of
of
of
48 61
48 61
48 61
0.3
0.3
0.3
5
4
3
2
1
H15 HOLEA
1
D D
PAD_C7P0D3P8 @
H2 HOLEA
1
PAD_C7P0D4P0 @
H3 HOLEA
1
PAD_C7P0D4P0 @
CPU scoket
H20 HOLEA
1
C C
H_3P0N @
H19 HOLEA
1
H_3P9N @
H21 HOLEA
1
H_3P0X4P0N @
H22 HOLEA
1
H_4P0X3P0N @
H4 HOLEA
1
PAD_CT3P7B6P0D3P3
GPU
H8 HOLEA
1
PAD_CT9P0B7P0D2P8
@
H5 HOLEA
1
PAD_CT3P7B6P0D3P3
H13 HOLEA
1
PAD_CT9P0B7P0D2P8
@
H10 HOLEA
1
PAD_CT9P0B7P0D2P8 @
H9 HOLEA
1
PAD_C6P0D3P3
WLAN
H23 HOLEA
1
PAD_CT7P5B7P0D2P8
@
CHASSIS1_GND CHASSIS1_GND
H12 HOLEA
1
PAD_CT7P5B7P0D2P8
@
H1 HOLEA
1
PAD_CT6P0B5P0D3P3
RJ45
H6 HOLEA
1
PAD_CT7P5B7P0D2P8 @
H24 HOLEA
1
PAD_CT8P0B5P0D4P6
@
H11 HOLEA
1
PAD_CT9P0B7P0D2P3 @
PCB Fedical Mark PAD
FD1
FD2
1
@
H14 HOLEA
1
PAD_CT9P0B7P0D3P0 @
1
@
@
FD3
FD4
1
1
NPTH
H16 HOLEA
1
PAD_CT7P5B7P0D2P8
@
H17 HOLEA
1
PAD_CT7P0B9P0D2P5 @
H18 HOLEA
1
PAD_CT7P5B9P0D2P8 @
H7 HOLEA
1
PAD_C10P0D7P0
@
H25 HOLEA
1
PAD_CT7P0B6P5D2P8
@
B B
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
2012/12/14
2012/12/14
2012/12/14
3
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2012/12/21
2012/12/21
2012/12/21
2
Title
Hole
Hole
Hole
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
401025
401025
401025
1
of
of
of
49 61
49 61
49 61
1.1
1.1
1.1
5
B+
B+
Adaptor
D D
TI
EC_ON
SYSON SUSP#
BQ24737RGRR
Battery Charger
Switch Mode
PAGE 46
C C
SMBus
VR_ON
4
Richtek
RT8243AZQW WQFN20_3X3
Switch Mode
EN1
FOR System
EN2
Silergy +Anpec
SYX198DQNC_ QFN10_3X3
S5
APL5336
S3
Switch Mode
FOR DDR
Onsemi
NCP81103MNTXG_QFN36_5X5
Switch Mode
FOR CPU Core
PGOOD_NB
PGOOD VREG5 VREG3
PGOOD
PGOODEN
+5VALW
+3VALW
SPOK
VL
+3VLP
+1.5V/+1.35V
+0.675VS
CPU Core
VGATE
3
Silergy
SY8036LDBC DFN10_3X3
Switch Mode
SUSP#
DGPU_PWROK
FOR VDDR
EN PGOOD
Silergy
SY8032ABC SOT23-6
Switch Mode
FOR VDDR
EN PGOOD
ANPEC
APL5932AQBI-TRG TDFN10_3X3
Switch Mode
SUSP#
FOR VDDR
EN PGOOD
2
+1.05VS_VCCPP
+1.05VSP_VGA
+1.5VSP
1
Battery
Li-ion
NVDD_PWR_EN
B B
FBVDDQ_PWR_EN
A A
5
Onsemi
NCP81172MNTWG QFN24_4X4
VIDs
Switch Mode
EN
FOR GPU VDDC
Silergy
SYX198DQNC_ QFN10_3X3 APL5336
Switch Mode
FOR GPU 1.5V
EN
4
PGOOD
PGOOD
+VGA_CORE
VGA_PWRGD
+1.5VSP_VGA
VGA_PWRGD
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/12/28
2012/12/28
2012/12/28
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/28
2012/12/28
2012/12/28
Title
Title
Title
Power Diagram
Power Diagram
Power Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
401025
401025
401025
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
1
50 61
50 61
50 61
of
of
of
1.1
1.1
1.1
5
4
3
2
1
JDCIN1
7
GND2
6
GND1
5
5 4 3 2
D D
ACES_50305-00541-001
1
ME@
APDIN
4 3 2 1
PF101
21
APDIN1APDIN
7A_24VDC_429007.WRML
ADAPTER_ID 44,53
12
12
PC101
1000P_0402_50V7K
PC1036
PC102
100P_0402_50V8J
PL101
C8BBPH403025-1TAPING_2P
1 2
12
0.1U_0603_25V7K
12
PC1037
0.1U_0603_25V7K
VIN
PD103
PD104
LL4148_LL-34-2
C C
+3VLP
BATT+
51_ON#45
PR112
200_0402_1%
1 2
12
@
@
PR113
100K_0402_1%
@
12
51ON-2
PC105
0.22U_0603_25V7K
1 2
@
PJ101 JUMP_43X39@
TP0610K-T1-E3_SOT23-3
51_ON#
2
112
PQ102
13
2
Reserve for 51_ON#
LL4148_LL-34-2
@
1 2
51ON-1
12
12
PR111 68_1206_5%
@
@
PR110
68_1206_5%
@
12
PC106
0.1U_0603_25V7K
@
VIN
12
12
PC104
PC103
VS
1000P_0402_50V7K
100P_0402_50V8J
@
VIN
PR104
@
590K_0402_1%
PR115
88.7K_0402_1%
@
PR103
@
590K_0402_1%
12
PC107
PR114
180K_0402_1%
@
0.1U_0402_10V7K
12
COMP_1N
12
12
COMP_2P
12
PR106
@
PR117
@
PR105
@
PR116
@
+3VALW
12
200K_0402_1%
COMP_1P
12
430K_0402_1%
+3VALWVMB2
12
200K_0402_1%
COMP_2N
12
430K_0402_1%
+5VAW
3
+_1
2
-_1
+5VAW
5
+_2
6
-_2
8
PU103A
P
1
COMP_1O
O1
G
AS393MTR-G1_SO8
4
@
8
PU103B
P
7
COMP_2O
O2
G
AS393MTR-G1_SO8
4
@
12
PR107
@
12
PR108
@
JRTC1
-+
MAXEL_ML1220-P01
@
12
RTC Battery
430K_0402_1%
PQ101A
61
D
430K_0402_1%
2
G
S
@
PR101
1 2
560_0603_5%
5
G
2N7002KDWH_SOT363-6
@
0_0402_5%
UVP_1
34
D
S
PR102
1 2
560_0603_5%
PR109
12
H_PROCHOT#
@
PQ101B 2N7002KDWH_SOT363-6
PD101
12
RB751V-40_SOD323-2 PD102
1 2
RB751V-40_SOD323-2
+RTCBATT
+CHGRTC
PR118 0_0402_5%
1 2
B B
737_SRP53 737_SRN53
A A
10U_0603_6.3V6M
PR127
10K_0402_1%
1 2 1 2
PR128
10K_0402_1%
+CHGRTC
PU102
3.3V
12
PC108
@
PR124
100K_0402_1%
1 2
3
COMP_5N
@
@
5
COMP_5P
12
PR130 100K_0402_1%
@
4
@
3
VOUT
GND
1
APL5156-33DI-TRL_SOT89-3
@
+5VALW
5
PU104
VDD
-
IN-1
+
IN+1
VSS
1
VIN
2
12
PR119 200_0603_5%
2
CHGRTCIN
NC
OUT
EP
7
NCS2004MUTAG_UDFN6_1P6X1P6
@
@
12
PC109 1U_0603_25V6M
@
6
BAT_IOUT
4
PR125
200K_0402_1%
1 2
+3VALW
12
1 2
+3VALW
PR126
348K_0402_1%
@
ADP_I44,52,53
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
12
PR129 200K_0402_1%
@
2012/12/28
2012/12/28
2012/12/28
COMP_4P
+5VALW
@
COMP_3P BAT_IOUT
PC110
0.022U_0402_25V7K
8
PU903A
3
P
+_1
2
-_1
G
AS393MTR-G1_SO8
4
@
+5VALW
8
PU903B
5
P
+_2
6
-_2
G
AS393MTR-G1_SO8
4
12
PC111
@
1000P_0402_50V7K
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
1
O1
@
7
O2
@
Deciphered Date
Deciphered Date
Deciphered Date
+5VALW
12
12
PR122
@
430K_0402_1%
COMP_3O
PR131
0_0402_5%
COMP_4O
2
12
@
2012/12/28
2012/12/28
2012/12/28
1 2
@
430K_0402_1%
PQ988A
2
PR120 200K_0402_1%
@
COMP_3O_1
PR121
61
D
G
S
@
2N7002KDWH_SOT363-6
Title
Title
Title
DCIN / RTC charger
DCIN / RTC charger
DCIN / RTC charger
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
5
G
S
@
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
OCP_1
34
D
PQ988B 2N7002KDWH_SOT363-6
PR123
@
0_0402_5%
401025
401025
401025
1
12
H_PROCHOT# 6,44,52
of
of
of
51 61
51 61
51 61
1.1
1.1
1.1
5
4
3
2
1
1 2 3 4 5 6 7 8 9 10
EC_SMCA EC_SMDA
VMB2
12
12
PR201
100_0402_1%
BATT_TEMP_IN
PR202
100_0402_1%
PR203
1 2
6.49K_0402_1%
PR204
1 2
10K_0402_5%
PF201
21
12A_65V_451012MRL
JBATT1
1 2 3 4 5 6
D D
C C
7 8 9
10
ACES_50299-01001-W01
ME@
VMB
C8BBPH403025-1TAPING_2P
1 2
12
PC201
1000P_0402_50V7K
EC_SMB_CK1 44,53
EC_SMB_DA1 44,53
+3VALW
BATT_TEMP 44
PL201
A/D
BATT+
12
PC202
0.01U_0402_25V7K
PH1 under CPU botten side : CPU thermal protection at 92+-3 degree C Recovery at 56 +-3 degree C
VL
12
PC203
0.1U_0603_25V7K
@
+3VS
H_PROCHOT#6,44,51
@
13
D
PROCHOT#44
PR230
@
0_0402_5%
1 2
PQ201
S
2N7002KW_SOT323-3
737_CMPOUT53
1 2
2
ADP_OCP_1
G
PR215
1 2
0_0402_5% @
PR208 100K_0402_1%
@
OTP_N_003
@
1 2
0_0402_5%
PU201
1
VCC
TMSNS1
2
GND
RHYST1
3
OT1
TMSNS2
4
RHYST2
OT2
G718TM1U_SOT23-8
PR214
@
8 7 6 5
MAINPWON 44,54
For KB930 --> Keep PU1 circuit (Vth = 0.825V)
For KB9012 (Red square) --> Remove PU201 circuit, but keep PR206 PH201, PR205,PR211,PQ201,PR208,PR212
NTC_V_1
10K_0402_1%
10K_0402_1%
PR209
+3VLP
@
12
PR206
13.7K_0402_1%
12
PR213
0_0402_5%
1 2
NTC_V
12
PR207
21.5K_0402_1%
@
12
PH201 100K_0402_1%_NCP15WF104F03RC
44
ADP_I44,51,53
PR205
4.42K_0402_1%
@
OTP_N_002
Turbo_V_1
1 2
ADP_OCP_2
PR221
57.6K:90W
82.5K:120W
76.8K:170W
PR210
57.6K_0402_1%
@
PR222
4.42K:90W
9.1K:120W
16.5K:170W
1 2
PR211
0_0402_5%
1 2
@
Turbo_V
PR212
1 2
@
44
B B
PQ202
TP0610K-T1-E3_SOT23-3
B+
+3VLP
PR218 100K_0402_1%
1 2
PR219
@
0_0402_5%
SPOK54
A A
5
PCH_PWR_EN44,46
4
1 2
PR220
1 2
1K_0402_1%
VSBP_1
12
PC206 1U_0402_6.3V6K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
VSBP_2 VSBP_3
13
D
PQ203
2
G
S
2N7002KW_SOT323-3
2012/12/28
2012/12/28
2012/12/28
12
PC204
PR216
100K_0402_1%
PR217
1 2
22K_0402_1%
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
12
0.22U_0603_25V7K
Deciphered Date
Deciphered Date
Deciphered Date
13
2
2012/12/28
2012/12/28
2012/12/28
2
12
PC205
0.1U_0603_25V7K
+VSBP
+VSBP
PJ201 JUMP_43X39
2
112
Title
Title
Title
BATTERY CONN/OTP
BATTERY CONN/OTP
BATTERY CONN/OTP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
+VSB
401025
401025
401025
1
of
of
of
52 61
52 61
52 61
1.1
1.1
1.1
5
8 7
5
PC301
1 2
100P_0402_50V7K
1 2
PC309
0.1U_0603_25V7K
@
PR311
1 2
12
1 2
1 2
0_0402_5%
ADP_I44,51,52
P3
VIN
12
PR313
PR315
P2
12
PR303 200K_0402_1%
0.1U_0603_25V7K
P2-1
12
PR307 75K_0402_1%
P2-2
34
D
PQ307B 2N7002KDWH_SOT363-6
S
EC_SMB_CK144,52
EC_SMB_DA144,52
PR323 1M_0402_5%
34
PQ302
AO4423L_SO8
1 2 3 6
4
64.9K_0603_1%
PC316
0.1U_0603_25V7K
5
NTZD5110NT1G_SOT563-6 PQ312B
PQ301
AO4407AL_SO8
8
VIN
D D
C C
PR302
200K_0402_5%
PQ307A
2
G
ACOFF44
12
P2_G1
61
D
S
7 5
PQ304
LTA044EUBFS8TL_UMT3F-3
2
P2_G2
13
2
2N7002KDWH_SOT363-6
1 2
PACIN
47K_0402_1%
PR314
1 2
ACOFF-1
10K_0402_5%
LTC015EUBFS8TL_UMT3F-3
+3VLP
12
PR322 750_0603_1%
PQ312A
61
1
PD304
1
AZ5425-01F_DFN1006P2E2
2
2
B B
NTZD5110NT1G_SOT563-6
1
PC1045 470P_0402_50V7K
2
@
1 2 36
4
12
1 3
PQ305 LTC015EUBFS8TL_UMT3F-3
PR309
5
G
PACIN_G
13
2
PQ310
VIN
2
ADAPTER_ID_ON#_G
ADAPTER_ID 44,51
PR328 1M_0402_5%
PC308
12
12
PlacePC1045closetoPQ312
P2
10_1206_5%
PC314
1U_0603_25V6M
PR310
390K_0603_1%
737_ACDET
ACPRN
737_SCL
0_0402_5%
737_SDA
ADP_I
1 2
+3VS
ADAPTER_ID_ON# 44
4
PR308
12
12
6
5
9
8
7
PC318 100P_0603_50V8
PR318
10K_0402_5%
1 2
PR321
100K_0402_1%
PR301
0.01_1206_1%
1 2
PC310
0.1U_0603_25V7K
12
PC312
0.1U_0603_25V7K
737_VCC
ACDET
ACOK
SCL
SDA
IOUT
@
12
12
2
1
20
ACP
VCC
PU301
BQ24737RGRR_VQFN20_3P5X3P5
ILIM10BM#
4
11
BM#
737_ILIM
737_CMPIN
PR324
316K_0402_1%
1 2
+3VALWP
PR331
ADP_I
39.2K_0402_1%
4 3
737_ACN737_ACP
ACN
CMPIN
PR319
6.8_0603_5%
12
B+
12
PC311
0.1U_0603_25V7K
737_CMPOUT
14
3
CMPOUT
REGN
HIDRV
PHASE
LODRV
SRN12SRP
13
SRN_1
SRP_1
12
12
12
PC322
0.1U_0603_25V7K
12
PC323
0.1U_0603_25V7K
PR329
100K_0402_1%
PR332
1 2
1 2
4.7M_0603_1%
737_CMPIN
GND
BTST
PAD
PR320
10_0603_5%
PC1038
17
16
18
19
15
21
+3VALWP
12
PR330
737_CMPOUT
12
0.1U_0603_25V7K
BQ24737_VDD
PD303
RB751V-40_SOD323-2
10K_0603_1%
3
Charge Option() bit[8]=1
PJ301
JUMP_43X118
2
112
PL301
1 2
SH00000AA00
PC302
10U_0805_25V6K
1 2
@
PC315 1U_0603_25V6M
1 2
12
BST_CHG
737_CMPOUT 52
@
PR312
1 2
2.2_0603_5%
1 2
LX_CHG
ACPRN
1UH_PCMB042T-1R0MS_4.5A_20%
DH_CHG
PC303
@
PC304
1 2
10U_0805_25V6K
PC317
12
0.047U_0603_16V7K
DL_CHG
12
PR325 47K_0402_1%
2N7002KDWH_SOT363-6
ACPRN ACIN#
4.7U_0805_25V6-K
5
1 2
PQ308B
G
PC305
1 2
4.7U_0805_25V6-K
AO4466L_SO8
AO4466L_SO8
BQ24737_VDD
12
34
D
S
PR334
0_0402_5%
1 2
@
PC306
1 2
4.7U_0805_25V6-K
PQ309
PQ311
PR326 10K_0402_1%
CHG_B+
PC307
2200P_0402_50V7K
6
578
4
6
578
4
1 2
12
DISCHG_G
PR305 10K_0402_1%
1 2
DISCHG_G-1
13
LTC015EUBFS8TL_UMT3F-3
123
123
PR327
10K_0402_1%
PACIN
PR333 12K_0402_1%
ACIN# 44
1 2
2
PQ303
AO4407AL_SO8
1 2 3 6
4
PR304
47K_0402_1%
ACOFF-1
PD301
1 2
0.1U_0603_25V7K
PL302
1 2
@
737_SRP
737_SRN
ACIN 44
PD302
1 2
1SS355_SOD323-2
PC313
CHGCHG
2
PQ306
4.7UH_PCMB063T-4R7MS_5.5A_20%
12
PR317
4.7_1206_5%
6251_SN
12
PC321 680P_0402_50V7K
@
1SS355_SOD323-2
8 7
5
PR306 200K_0402_1%
1 2
PACIN_PPACIN_N
61
D
12
S
2N7002KDWH_SOT363-6
PR316
0.01_1206_1%
1 2
4 3
VIN
2
G
PQ308A
PC319
PACIN
12
PC320
10U_0805_25V6K
1
BATT+
12
10U_0805_25V6K
737_SRP 51
737_SRN 51
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2012/12/28
2012/12/28
2012/12/28
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/28
2012/12/28
2012/12/28
Title
CHARGER
CHARGER
CHARGER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
401025
401025
401025
1
53 61
53 61
53 61
of
of
of
1.1
1.1
1.1
5
D D
PR401
1 2
13.3K_0402_1%
PC401
0.1U_0402_10V7K
1 2
@
1 2
20K_0402_1%
PR403
4
PC402
@
0.1U_0402_10V7K
1 2
PR402
30.9K_0402_1%
12
PR405
20K_0402_1%
1 2
3
+3VALWP +3VALW
+5VALWP +5VALW
PJ401
2
JUMP_43X118
PJ402
2
JUMP_43X118
2
112
112
1
CPU_B+
2
12
PC408
0.1U_0603_25V7K
+3VALWP
C C
6A 6.5A
12
12
PC432
PC431
@
@
1000P_0402_50V7K
.1U_0402_10V6-K
B B
A A
B++
PJ403
112
JUMP_43X118
3.3UH_PCMB063T-3R3MS_6.5A_20%
1
+
PC415 220U_6.3V_M
2
12
PC409
0.1U_0603_25V7K
PL401
1 2
680P_0402_50V7K
PC410
4.7U_0805_25V6-K
4.7_1206_5%
PC419
MAINPWON44,52
VL
12
PC411
PR410
@
@
100K_0402_5%
12
PC412
4.7U_0805_25V6-K
12
SNUB_3V
12
EC_ON44,45
PR419
PD402
LL4148_LL-34-2
@
VS
12
6
2200P_0402_50V7K
PQ401
123
3 6
241
22K_0402_1%
1SS355_SOD323-2
1 2
12
2
PR416
1 2
12
1M_0402_1%
PR418
1 2
316K_0402_1%
@
AO4466L_SO8
578
4
578
PR415
1 2
PD401
@
PQ405
G
UG_3V
SW2_3V
PQ403
AO4566_SO8
1 2
13
D
330_0603_5%
S
2N7002KW_SOT323-3
@
PR417
402K_0402_1%
PC413
0.1U_0603_25V7K
1 2
LG_3V
PR420
12
12
SPOK52
PR408
2.2_0603_5%
1 2
BST_3V_R BST_3V
PR413
499K_0402_1%
1 2
B++
PR425
150K_0402_5%
PR414
3V_5V_EN
12
0_0402_5%
2
3V_5V_EN
PC421
2.2U_0603_10V7K
FB_3V
6
PGOOD
7
BOOT2
8
UGATE2
9
PHASE2
10
LGATE2
B++
12
8243_EN
VL VL
12
100K_0402_5%
PQ989A
61
D
G
S
@
12
12
PR407
120K_0402_1%
225_CS2
8232_TON
4
5
3
FB2
ENTRIP2
RT8243AZQW_WQFN20_3X3
VIN11ENLDO12ENM
13
LDO_EN
12
PC417
0.1U_0603_25V7K
12
PC424
1U_0603_25V6M
PR423
@
5
G
2N7002KDWH_SOT363-6
PR421
TON
@
75K_0402_1%
225_CS1
2
14
12
12
PR406
51.1K_0402_1%
FB_5V
1
PU904
FB1
GND
ENTRIP1
BYP1
BOOT1
UGATE1
PHASE1
LGATE1
LDO3
LDO5
15
12
PC403
4.7U_0603_6.3V6K
PR412
0_0603_5%
5VLP
PC418
4.7U_0603_6.3V6K
12
PR422
100K_0402_5%
@
8243_EN
34
D
PQ989B 2N7002KDWH_SOT363-6
S
Reserve for ASM mode
12
21
PC422
1U_0603_25V6M
20
19
1 2
BST_5V BST_5V_R
PR409
2.2_0603_5%
18
17
16
+3VLP +3VL
PR404
0_0603_5%
12
12
VL
@
12
PC405
PC404
0.1U_0603_25V7K
567
8
4
UG_5V
PC414
0.1U_0603_25V7K
1 2
4
LG_5V
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
567
321
AO4406AL_SO8 PQ402
123
SW1_5V
8
AO4354_SO8 PQ987
2012/12/28
2012/12/28
2012/12/28
3.3UH_PCMB063T-3R3MS_6.5A_20%
12
4.7_1206_5%
SNUB_5V
12
680P_0402_50V7K
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
B++
12
2200P_0402_50V7K
1 2
PR411
PC420
12
12
PC407
PC406
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PL402
@
@
3VALWP VFB=2V TDC 6A OCP current 8.4A~10A Fsw=350KHZ
Deciphered Date
Deciphered Date
Deciphered Date
1
+
2
PC416 220U_6.3V_M
2012/12/28
2012/12/28
2012/12/28
+5VALWP
12
12
PC434
PC433
@
@
1000P_0402_50V7K
.1U_0402_10V6-K
5VALWP TDC 6.5A OCP current 10.3A~12A Fsw=300KHZ
Title
Title
Title
3VALWP/5VALWP
3VALWP/5VALWP
3VALWP/5VALWP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
401025
401025
401025
54 61
54 61
54 61
of
of
of
1.1
1.1
1.1
5
4
3
2
1
A
1.35V_EN
12
PR501 1M_0402_5%
1 1
SYSON44
12
PR502 0_0402_5%
12
PC504 .1U_0402_10V6-K
@
PJ501
JUMP_43X118
2
112
+3VALW
VDDQ_PGOOD6,44
B+_1.35V
12
PR504
1 2
100K_0402_5%
@
PC501
0.1U_0603_25V7K
1.35VP_ILNT
12
PC502
10U_0805_25V6K
12
PR505 1M_0402_5%
@
@
12
PC515
@
10U_0805_25V6K
PR555
1 2
0_0402_5%
B++
+3VALW
8
9
3
2
1.35VP_PG
PR507 10K_0402_5%
1 2
PU501
B
1
EN
IN
BS
LX
GND
FB
ILMT
BYP
PG
LDO
SYX198DQNC_QFN10_3X3
PC503
0.1U_0603_25V7K
6
1 2
1.35VP_BS
10 4 7
5
1.35VLDO
12
PC511
4.7U_0603_6.3V6K
+3VALW
12
PC512
4.7U_0603_6.3V6K
Fsw=800KHZ
1.35VP_LX
12
SNUB_1.35V
12
680P_0402_50V7K
PL501
1 2
1UH_PCMB063T-1R0MS_12A_20%
PR503
4.7_1206_5%
PC514
@
1.35VP_FB
12
PR509
@
12
PC513
0_0402_5%
PR506 43K_0402_1%
1 2
330P_0402_50V8J
12
34K_0402_1%
PR508
12
C
12
PC505
22U_0805_6.3V6M
12
PC506
22U_0805_6.3V6M
12
PC507
22U_0805_6.3V6M
7A
PC508
22U_0805_6.3V6M
12
PC509
@
22U_0805_6.3V6M
12
PC510
@
22U_0805_6.3V6M
D
PJ502
2
+1.35VP
+1.35VP
12
12
PC521
@
.1U_0402_10V6-K
PC522
@
1000P_0402_50V7K
112
JUMP_43X118
+1.35V
Vfb=0.6V Vout=1.35V
2 2
Current limit setting pin. The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high respectively.
OCP:12A
3 3
PR511
SUSP10,40,46
4 4
A
1 2
20K_0402_1%
.1U_0402_10V6-K
PC525
5336_EN
PQ501
2
G
12
+1.35V
10U_0603_6.3V6M
13
D
S
2N7002KW_SOT323-3
1
PJ503
1
JUMP_43X118
2
2
PC516
12
5336_VREF
PR510
1K_0402_1%
PR512
1K_0402_1%
B
PU502
1 2 3
1 2
PC520
1 2
.1U_0402_10V6-K
4
12
APL5336KAI-TRL_SOP8P8
+0.675VSP
12
PC518
10U_0603_6.3V6M
VIN GND VREF VOUT
NC_3 NC_2
VCNTL
NC_1
TP
12
8 7 6 5 9
PC519
10U_0603_6.3V6M
PR556
1 2
0_0402_5%
PC517
1U_0603_25V6M
@
+5VALW
2012/12/28
2012/12/28
2012/12/28
+0.675VSP
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
C
Deciphered Date
Deciphered Date
Deciphered Date
PJ504
2
JUMP_43X39
112
2012/12/28
2012/12/28
2012/12/28
+0.675VS
12
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Title
Title
Title
1.35VP/0.675VSP
1.35VP/0.675VSP
1.35VP/0.675VSP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
401025
401025
401025
D
55 61
55 61
55 61
of
of
of
1.1
1.1
1.1
A
PD601
RB751V-40_SOD323-2
OPT@
SUSP#
1 2
PR601
1 2
0_0402_5% OPT@
PR602
1 2
0_0402_5%
@
1 2
1M_0402_1%
@
PR603
B+
12
@
.1U_0402_10V6-K
PJ602
JUMP_43X118
112
PC610
2
B+_1.5V
12
PC602
PR605
1 2
+3VS
100K_0402_5%
OPT@
0.1U_0603_25V7K
@
1 1
FBVDDQ_PWR_EN27,46
Current limit setting pin. The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high respectively.
2 2
12
PC619
1_5VSP_ILMT
B
12
@
10U_0805_25V6K
12
PR606 1M_0402_5%
@
1_5VSP_VGA
PC601
OPT@
10U_0805_25V6K
1 2
+3VS
PU601
8
IN
9
GND
3
ILMT
2
PG
OPT@
PR609 10K_0402_5%
@
SYX198DQNC_QFN10_3X3
BYP
LDO
EN BS
LX FB
1
1 2
6 10 4 7
5
1_5VSPLDO
12
PC611
OPT@
4.7U_0603_6.3V6K
PC603
0.1U_0603_25V7K
OPT@
+3VALW
12
PC612
OPT@
4.7U_0603_6.3V6K
PL601
1UH_PCMB063T-1R0MS_12A_20%
1_5VSP_LX
12
SNUB_1.5V
12
1 2
PR604
4.7_1206_5%
@
PC613 680P_0402_50V7K
@
1_5VSP_FB
C
OPT@
12
OPT@
PR611 0_0402_5%
12
OPT@
PC614
330P_0402_50V8J
PR607 10_0402_5%
OPT@
1 2
12
PR610
30.1K_0402_1%
OPT@
12
PR612 20K_0402_1%
OPT@
12
OPT@
1 2
12
PC604
22U_0805_6.3V6M
OPT@
PR608 0_0402_5%
@
D
+1.5VSP_VGA +1.5VS_VGA
PJ601
2
JUMP_43X118
112
7A
+1.5VSP_VGA
12
PC607
@
22U_0805_6.3V6M
22U_0805_6.3V6M
12
@
12
PC608
@
22U_0805_6.3V6M
PC609
22U_0805_6.3V6M
12
PC605
22U_0805_6.3V6M
OPT@
PC606
Fsw=800KHZ Vout=1.503V OCP:8A
VFB=0.8V Vo=VFB*(1+PR613/PR615) OCP:Min 4A
3 3
+3VALW
300mA
PR625
0_0603_5%
1 2
@
SUSP#44,46,57
12
PC616
4.7U_0603_6.3V6K
1 2
0_0402_5%
PC615
1U_0402_10V6K
5332_VIN
PR614
EN_1_5VSP 5332_PG
+5VALW
12
12
PC618
.1U_0402_10V6-K
@
PU602 APL5932AQBI-TRG_TDFN10_3X3
10
VCNTL
9
VIN3
8
VIN2
7
VIN1
6
EN/ENB
VOUT1 VOUT2 VOUT3
FB
POK
GND
11
1 2 3 4 5
PR616
100K_0402_5%
5332_FB
+1.5VSP
300mA
12
PR613
21.5K_0402_1%
12
12
PR615
24K_0402_1%
12
PC617 10U_0603_6.3V6M
PJ603
2
JUMP_43X118
112
+1.5VS+1.5VSP
+3VS
4 4
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
2012/12/28
2012/12/28
2012/12/28
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
2012/12/28
2012/12/28
2012/12/28
Title
+1.35VS_VGA/+1.5VS
+1.35VS_VGA/+1.5VS
+1.35VS_VGA/+1.5VS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
401025
401025
401025
D
56 61
56 61
56 61
1.1
1.1
1.1
5
4
+3VS
PR701 10K_0402_5%
1 2
3
2
1
D D
+5VALW
C C
SUSP#44,46,56
SUS_VCCP44
PJ701
JUMP_43X118
112
2
PR704
@
1 2
0_0402_5%
PR994
1 2
0_0402_5%
12
PC702
22U_0805_6.3V6M
PR705
@
12
PC701
1 2
47K_0402_5%
1_05VS_PVIN
1 2
1_05VS_SVIN
PR702
10_0402_5%
1_05VS_EN
22U_0805_6.3V6M
12
PC709
.1U_0402_10V6-K
@
12
PC708 1U_0402_6.3V6K
VFB=0.6V Vo=VFB*(1+PR706/PR705)
1_05VS_PG
4
PU701
10
PVIN1
9
PVIN2
8
SVIN
5
EN
TP_GND
11
1
LX1
PG
2
LX2
3
LX3
6
FB
SS
SY8036LDBC_DFN10_3X3
7 12
PC711
.1U_0402_10V6-K
1_05VS_LX
12
1_05VS_FB
PR707 100K_0402_1%
1UH_PCMB063T-1R0MS_12A_20%
12
SNB_1_05VS
12
PL701
1 2
PR703
4.7_1206_5%
@
PC710 680P_0402_50V7K
@
PR706
75K_0402_1%
12
12
PC712 22P_0402_50V8-J
12
12
PC703
22U_0805_6.3V6M
12
PC704
22U_0805_6.3V6M
PC705
22U_0805_6.3V6M
12
PC706
22U_0805_6.3V6M
5A
1
+
PC707 330U_D2_2V_Y
2
@
Fsw=1MHZ Vout=1.05V
+1.05VS_VCCPP
PJ702
2
112
JUMP_43X118
+1.05VS+1.05VS_VCCPP
OCP:7.5A
+3VS
PR708
10K_0402_5%
OPT@
1 2
PJ703
+3VALW
B B
DGPU_PWROK19,27,46,58
2
JUMP_43X39
112
SUSP#
12
PC713
OPT@
PD701
1 2
PR712
4.7K_0402_5%
OPT@
PR715 0_0402_5%
@
12
PC714
OPT@
22U_0805_6.3V6M
22U_0805_6.3V6M
OPT@
12
EN_1.05VMP
12
1.05VMP_VIN
1M_0402_5%
PU702
4
IN
5
PG FB6EN
SY8032ABC_SOT23-6
12
PR713
OPT@
GND
OPT@
FB=0.6Volt
12
OPT@
3
LX
2 1
PC719 .1U_0402_10V6-K
1.05VMP_LX
12
12
PL702
1 2
1UH_PH041H-1R0MS_3.8A_20%
OPT@
PR710
4.7_1206_5%
@
PC718 680P_0402_50V7K
@
OPT@
1.05VMP_FB
PR711
75K_0402_1%
12
12
PR714 100K_0402_1%
OPT@
5A
12
PC715
12
68P_0402_50V8J
OPT@
PC716
22U_0805_6.3V6M
OPT@
Fsw=1MHZ Vout=1.05V OCP:7.5A
12
OPT@
+1.05VSP_VGA
PC717
22U_0805_6.3V6M
PJ704
2
JUMP_43X79
112
+1.05VS_VGA+1.05VSP_VGA
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2012/12/28
2012/12/28
2012/12/28
3
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2012/12/28
2012/12/28
2012/12/28
2
Title
+1.05VS/+1.05VS_VGA
+1.05VS/+1.05VS_VGA
+1.05VS/+1.05VS_VGA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
401025
401025
401025
1
57 61
57 61
57 61
1.1
1.1
1.1
A
B
C
D
PQ802
PQ801
AON6504_POWERDFN56-8-5
PQ805
AON6414AL_DFN8-5
OPT@
PQ804
AON6414AL_DFN8-5
OPT@
OPT@
AON6504_POWERDFN56-8-5
+VGA_B+
12
OPT@
OPT@
PC801
12
12
0.1U_0603_25V7K
OPT@
12
PC819
0.1U_0603_25V7K
OPT@
12
PC803
PC802
2200P_0402_50V7K
OPT@
12
PC820
2200P_0402_50V7K
OPT@
PL801
HCB2012KF-121T50_0805
1 2
PL802
HCB2012KF-121T50_0805
1 2
12
PC804
10U_0805_25V6K
10U_0805_25V6K
OPT@
PL803
0.24UH_FDUE0630J-H-R24M-P3_22A_20%
1 2
12
SNUB1_VGA
12
+VGA_B+
PC821
10U_0805_25V6K
OPT@
PR809
4.7_1206_5%
@
PC811 680P_0402_50V7K
@
12
PC822
10U_0805_25V6K
OPT@
PL804
0.24UH_FDUE0630J-H-R24M-P3_22A_20%
1 2
OPT@
12
PR828
4.7_1206_5%
@
SNUB2_VGA
12
PC829 680P_0402_50V7K
@
OPT@
OPT@
B+
+VGA_CORE
1
1
+
+
2
PC808
OPT@
330U_D2_2V_Y
1
+
2
PC826
2
OPT@
330U_D2_2V_Y
PC809
OPT@
330U_D2_2V_Y
+VGA_CORE
1
+
OPT@
PC827
2
330U_D2_2V_Y
N14M-GE GF117, Config C N14P-GV2 GK208, Config B
1 1
C
B
N14M-GE
N14P-GV2
PR812
R1
PR811
R2
PR840
R3
PR815
R4
PR814
R5
PC812
C(nF)
2 2
VSSSENSE_VGA24
VCCSENSE_VGA24
3 3
Thermistor near MOSFET trigger point 97 degree C.
20 39
3020 23 18 24 03
2.7 1.8
PR817
0_0402_5%
PC815
1000P_0402_50V7K
PR820
0_0402_5%
12
12
OPT@
OPT@
VSS_SEN
12
OPT@
VCC_SEN
N14PGV2@
OPT@
PC816
47P_0402_50V8J
1 2
PR821
OPT@
1 2
OPT@
10K_0402_1%
PR814
0_0402_5%
12
PC813
0.01U_0603_50V7K
1 2
PR819
1 2
51_0402_1%
OPT@
reserve follow NV suggestion
VREF
PR815
18K_0402_1%
1 2
PC812 2700P_0402_50V7-K
PR816 39K_0402_1%
PC818
1 2
100P_0402_50V8J
OPT@
@
PC828
2700P_0402_50V7-K
1 2
PR811
20K_0402_1%
N14PGV2@
12
N14PGV2@
N14PGV2@
12
OPT@
PC817
1 2
10P_0402_50V8JOPT@
1 2
FB2_VGA
PR822
82K_0402_1% OPT@
.1U_0402_10V6-K
OPT@
COMP_VGAFB1_VGA
12
12
FB_VGA
PC823
reserve
PC807
10P_0402_50V8J
PR812
20K_0402_1%
PR840
2K_0402_1%
N14PGV2@
VREF
FS
1 2
12
@
12
VIDBUF
N14PGV2@
7
REFIN
8
VREF
9
FS
10
FBRTN
11
FB
12
COMP
PH801
100K_0402_1%_NCP15WF104F03RC
NVVDD PWM_VID
PR804 0_0402_5%
1 2
PU801
GND
25
12
OPT@
OPT@
6
12
PR826
OPT@
VREF
N14P-GV2 25W Continue Current 35A
4 4
Iocp=55A~60A
23
PD801
RB751V-40_SOD323-2
DPRSLPVR_VGA
PR802
OPT@
20K_0402_1% PC805
1 2
.1U_0402_10V6-K
GPU_VID
UGATE1_VGA
EN_VGA
4
2
5
3
EN
PSI
VID
VCC_VGA
@
PC825 1U_0402_10V6K
1 2
OPT@
PR829
0_0402_5% @
PR830
10K_0402_5%
HG1
10K_0402_5%
PR827
2.2_0402_5%
12
12
VIDBUF
TSNS13TALERT#14VCC15PGOOD16HG217BST2
5.9K_0402_1%
+3VS
23
1 2
12
OPT@
12
12
OPT@
1
BST1
24
PH1
23
LG1
22
PGND
21
PVCC
20
LG2
19
PH2
OPT@
18
NCP81172MNTWG_QFN24_4X4
BOOT2_VGA
UGATE2_VGA
DGPU_PWROK 19,27,46,57
PR825
+3VS
12
+5VS
12
OPT@
+3VS
OPT@
PR801 10K_0402_5%
@
PR803 100K_0402_5%
OPT@
PR805
0_0603_5%
BOOT1_VGA
PHASE1_VGA
PVCC_VGA
NVDD_PWR_EN 14,46
0.22U_0603_16V7K
12
BOOT1_2_VGA
OPT@
OPT@
LGATE1_VGA
4.7U_0603_6.3V6K
1 2
PC806
1 2
PC814
OPT@
1 2
PR818
0_0402_5%
@
PR824
0_0603_5%
PHASE2_VGA
12
LGATE2_VGA
PR806
0_0402_5%
12
UGATE1_2_VGA
OPT@
12
PR831
5.1K_0402_1%
@
reserve for future tune
+5VS
PR823
0_0402_5%
12
UGATE2_2_VGA
PC824
OPT@
0.22U_0603_16V7K
1 2
BOOT2_2_VGA
OPT@
OPT@
5
4
321
OPT@
5
4
321
5
4
321
5
4
321
PS0 Fsw=322KHZ PS1/PS2 Fsw=475KHZ
Title
Title
Vboot=0.9V
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2012/12/28
2012/12/28
2012/12/28
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
2012/12/28
2012/12/28
2012/12/28
Title
VGA_CORE
VGA_CORE
VGA_CORE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
D
401025
401025
401025
of
of
of
58 61
58 61
58 61
1.1
1.1
1.1
5
4
3
2
1
CSREF
D D
PR902
165K_0402_1%
1 2
75K_0402_1%
CPU_B+
PR909
1 2
PC908
1 2
2200P_0402_50V7K
1 2
2_0603_5%
1 2
12
0.01U_0402_25V7K
PR920
1K_0402_1%
1 2
PC913
PR923
24.3K_0402_1%
PC909
470P_0402_50V7K
1 2
PC915
2.2U_0603_10V7K
12
PC901
820P_0402_50V7K
PR914
12
12
VSN_2VSN_1
VR_HOT#44
PC902
IMVP_IMON
VR_ON44
12
680P_0402_50V7K
44
CSCOMP
37W=10K 47W=15.4K
PR912 10K_0402_1%
37W@
1 2
0_0402_5%
1 2 1 2
@
0_0402_5%
PR925
PR926
12
PC904
1000P_0402_50V7K
CSSUM
25
27
26
28
CSSUM
ILIM
CSCOMP
29
IOUT
30
VRMP
31
COMP
32
FB
33
DIFFOUT
34
VSN
35
VSP
36
VCC
37
GND
EN1VR_HOT#2SDIO3ALERT#4ROSC7SCLK
@
VR_HOT#_1
VR_SVID_DAT_1
12
PH901
PR903
Place close to phase 1 inductir
C C
PC906 390P_0402_50V7-K
1 2
1 2
PR911
49.9_0402_1%
1 2
PR916
1K_0402_1%
1 2
PR918
VSSSENSE9 VCCSENSE9
B B
0_0402_5%
1 2
PR921
0_0402_5%
12
10P_0402_50V8J
1 2
7.5K_0402_1%
PC912 1000P_0402_50V7K
+5VALW
220K_0402_5%_ERTJ0EV224J
PC907
1 2
PR917
37W@
VSP
1K_0402_1%
+VCCIO_OUT
12
PR929
130_0402_1%
PR934
@
0_0402_5%
VR_SVID_DAT9
VR_SVID_ALRT#9
VR_SVID_CLK9
1 2
PR935
1 2
0_0402_5%
1 2
PR936
0_0402_5%
@
@
12
PR993
54.9_0402_1%
VR_SVID_DAT_1
VR_SVID_ALRT#_1
VR_SVID_CLK_1
12
PC917 .1U_0402_10V6-K
@
15,44
PR932
0_0402_5%
47W@
CSP3 CSP2 CSP1
20
24
22
23
19
21
BST3
CSP3
CSP1
CSP2
DRON
CSREF
PWM2/IMAX
VR_RDY
TSENSE
INT_SEL
5
6
8
9
TSENSE
VR_RDY
VR_SVID_ALRT#_1
VR_SVID_CLK_1
12
PR927
57.6K_0402_1%
12
PR933
1.91K_0402_1%
1 2
+3VS
VR_READY
PR901
174K_0603_1%
1 2
PR939
174K_0603_1%
1 2
1 2
PR904
174K_0603_1%
CSREF 60
PR910 43K_0402_1%
1 2
37W@
PU901 NCP81103MNTXG_QFN36_5X5
18
HG3
17
SW3
16
LG3
15
PVCC
14
PGND
13
LG1
12
SW1
11
HG1
10
BST1
PR924
45.3K_0402_1%
1 2
12
PC916 .1U_0402_10V6-K
SW3
SW2
SW1
NA for 37W
DRON 60
37W=43K 47W=66.5K
81103_PWM 60
1 2
2.2_0603_5%
HG3 60 LG3 60
LG1 60 HG1 60
1 2
2.2_0603_5%
PR915
PR922
TSENSE
12
PR928
13K_0402_1%
47W@
CSP2
CSREF
CSP3 SW3
CSREF
CSP1 SW1
PC910
1 2
0.22U_0603_16V7K
PC911
1 2
2.2U_0603_10V7K
PC914
1 2
0.22U_0603_16V7K
12
PH902
100K_0402_1%_TSM0B104F4251RZ
12
12
12
12
PR937
PC918
@
20K_0402_1%
0.047U_0402_16V7K
12
PR905
PC903
@
20K_0402_1%
0.047U_0402_16V7K
12
PR907
PC905
@
20K_0402_1%
0.047U_0402_16V7K
SW3 60
PR919 0_0402_5%
1 2
SW1 60
Place close to phase 2 MOSFET
PR938
6.98K_0402_1%
1 2
47W@
PR906
6.98K_0402_1%
1 2
PR908
6.98K_0402_1%
1 2
@
+5VALW
CSP2
SW2 60
+5VALW
PR913
0_0402_5%
1 2
37W@
Mount for 37W
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
3
2012/12/28
2012/12/28
2012/12/28
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/28
2012/12/28
2012/12/28
Title
CPU_CORE1
CPU_CORE1
CPU_CORE1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
401025
401025
401025
1
59 61
59 61
59 61
of
of
of
1.1
1.1
1.1
5
D D
5
PR981
0_0603_5%
HG159
SW159
LG159
C C
1 2
4
4
321
5
321
PQ982
PQ981
AON6414AL_DFN8-5
12
12
AON6504_POWERDFN56-8-5
4
ForEMCrequest
CPU_B+
12
PC1039
PR982
4.7_1206_5%
@
PC990
680P_0402_50V7K
@
PC1040
0.1U_0603_25V7K
0.36UH_ VMPI1004AR-R36M-Z03_30A_20%
1 2
12
10U_0805_25V6K
PL982
PC981
@
PR983
10_0402_1%
12
12
PC982
10U_0805_25V6K
10U_0805_25V6K
DCR=0.825mohm
12
SW1
12
PC983
10U_0805_25V6K
CSREF 59
12
PC985
PC984
0.01U_0402_25V7K
2200P_0402_50V7K
12
PC988
@
68P_0402_50V8J
1 2
12
3
1
+
PC986
2
PC989
@
220P_0402_50V7K
68U_25V_M
PC987
1
+
2
68U_25V_M
PL981
FBMAL11453215800LMA90T_2P
1 2
+VCC_CORE
HG359
SW359
LG359
B+
PR984
0_0603_5%
1 2
2
ForEMCrequest
5
12
0.1U_0603_25V7K
12
12
12
PC1041
10U_0805_25V6K
PR985
4.7_1206_5%
@
PC996
680P_0402_50V7K
@
4
4
321
5
321
PQ983
PQ984
PC1042
AON6414AL_DFN8-5
AON6504_POWERDFN56-8-5
12
PC991
@
10U_0805_25V6K
0.36UH_ VMPI1004AR-R36M-Z03_30A_20%
12
PC993
PC992
10U_0805_25V6K
PL983
1 2
12
10U_0805_25V6K
1
CPU_B+
12
PC994
PC995
0.01U_0402_25V7K
2200P_0402_50V7K
PR986
10_0402_1%
1 2
+VCC_CORE
12
CSREF
SW3
ForEMCrequest
PR987
1 2
BSTA2 BSTA2_1
2.2_0603_5%47W@
B B
PU902 NCP81151MNTBG_DFN8_2X2
1
BST
FLAG
81103_PWM59
DRON59
1 2
+5VALW
PR990
0_0402_5%
47W@
A A
1 2
PR988 2K_0402_1%47W@
12
PC951
2.2U_0603_10V7K
47W@
5
EN_VCORE2 VCC_VCORE2
2
PWM
DRVH
3
EN
SW
4
VCC
GND
DRVL
47W@
12
0.22U_0603_16V7K PC552
47W@
9 8 7 6 5
PR989 0_0603_5%
1 2
HG2
47W@
SW2
LG2
4
5
4
321
5
4
321
47W@
47W@
PQ986
PQ985
AON6504_POWERDFN56-8-5
AON6414AL_DFN8-5
PC1044
0.1U_0603_25V7K
12
PR991
4.7_1206_5%
@
SNUB_CPU2
12
PC958
680P_0402_50V7K
@
12
12
PC1043
10U_0805_25V6K
0.36UH_ VMPI1004AR-R36M-Z03_30A_20%
PC953
PL984
1 2
47W@
3
12
10U_0805_25V6K
@
CPU_B+
12
12
PC955
10U_0805_25V6K
47W@
12
PC957
PC956
0.01U_0402_25V7K
2200P_0402_50V7K
47W@
47W@
1 2
PC954
10U_0805_25V6K
47W@
Mount for 47W
+VCC_CORE
PR992
10_0402_1%
12
CSREF
47W@
SW2 59
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2012/12/28
2012/12/28
2012/12/28
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/12/28
2012/12/28
2012/12/28
Title
Title
Title
CPU_CORE2
CPU_CORE2
CPU_CORE2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
Date: Sheet
Date: Sheet
Date: Sheet
401025
401025
401025
1
of
60 61
of
60 61
of
60 61
1.1
1.1
1.1
5
4
3
2
1
+VCC_CORE
+VCC_CORE
12
PC1005 10U_0805_6.3V6M
D D
12
PC1006 10U_0805_6.3V6M
12
PC1007 10U_0805_6.3V6M
12
PC1008 10U_0805_6.3V6M
12
PC1009 10U_0805_6.3V6M
1
+
PC1001 330U_D2_2VM_R9M
2
1
+
PC1002 330U_D2_2VM_R9M
2
1
+
PC1003 330U_D2_2VM_R9M
2
1
+
PC1004 330U_D2_2VM_R9M
2
12
PC1010 10U_0805_6.3V6M
12
PC1016 22U_0805_6.3VAM
12
C C
B B
PC1021 22U_0805_6.3VAM
12
PC1026 22U_0805_6.3VAM
12
PC1031 22U_0805_6.3VAM
12
PC1011 10U_0805_6.3V6M
12
PC1017 22U_0805_6.3VAM
12
PC1022 22U_0805_6.3VAM
12
PC1027 22U_0805_6.3VAM
12
PC1032 22U_0805_6.3VAM
12
PC1012 10U_0805_6.3V6M
12
PC1018 22U_0805_6.3VAM
12
PC1023 22U_0805_6.3VAM
12
PC1028 22U_0805_6.3VAM
12
PC1033 22U_0805_6.3VAM
12
PC1013 10U_0805_6.3V6M
12
PC1019 22U_0805_6.3VAM
12
PC1024 22U_0805_6.3VAM
12
PC1029 22U_0805_6.3VAM
12
PC1034 22U_0805_6.3VAM
12
PC1014 10U_0805_6.3V6M
12
PC1020 22U_0805_6.3VAM
12
PC1025 22U_0805_6.3VAM
12
PC1030 22U_0805_6.3VAM
12
PC1015 10U_0805_6.3V6M
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2012/12/28
2012/12/28
2012/12/28
3
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2012/12/28
2012/12/28
2012/12/28
2
Title
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Friday, July 12, 2013
Friday, July 12, 2013
Friday, July 12, 2013
401025
401025
401025
1
61 61
61 61
61 61
1.1
1.1
1.1
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