Compal NM-A043, NM-A044 Schematics

1

2

3

4

5

Model Name : VILE1 & VILE2 File Name : NM-A043, NM-A044 BOM P/N:

A A

VILE1:

VILE2:

B B

M/B Schematics Document

Intel Ivy Bridge Processor with DDRIII + Panther Point PCH

GPU nVIDIA N14M-GL / N14P-GV2

2012-11-07

C C

REV:0.1

D D

3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

4

Deciphered Date

2014/07/01

Size Document Number Rev

Title

Cover Page

Date: Sheet

Size Document Number Rev

Custom

Wednesday, November 07, 2012

Date: Sheet

5

ON.B152

ON.B152ON.B152

159

of

1.A

A

nVIDIA N14M-GL DDR3*4 VRAM 256M*16/

1 1

128M*16/64M*16 nVIDIA N14P-GV2

DDR3*4 VRAM 256M*16/

128M*16/64M*16

Page 24~32

B

PCI-E X8

37.5mm * 37.5mm

C

Intel

Ivy Bridge

rPGA 989 Socket

Memory Bus Dual Channel

1.5V DDR3 1600MHz

D

DDR3-SO-DIMM X2

Page 11~12

E

HM76

Page 4~10

DMI x4

100MHz 5GB/s

Page 13~21

LPC BUS

TPM

Page 40

HD Audio

USB3+DP

USB 2.0

USB 3.0

SATA

DC-IN dongle

Audio Codec

CX20671-21Z CODEC

CMOS Camera

USB PORT 3.0 x 2

Page 35

Finger Printer

UPEK TCS5DA6C0

2Channel Speaker

Digital MIC

Audio combo Jack

Page 32

Page 39

Sub-Board

Page 40

Page 37

Page 35

HDMI Connector

Page 34

CRT Connector

Page 33

HDMI

RGB

FDI x8 (UMA)

100MHz

2.7GT/s

Intel

2 2

LVDS Connector

Page 32

Card Reader

Realtek RTS5229

cable

Page 36

Realtek

RTL8111F(Giga)

Page 40

RJ45 CONN

3 3

Page 40

cable

LVDS

PCI-E

SPI ROM BIOS 8M+4M

Page 13

SPI

Panther Point

FCBGA 989

25mm*25mm

EC

ENE KBC9012

Page 41

Sub-Board

PCI Express Mini card Slot 1

WLAN/WiMAX/BT

Page 38

Track Point

Page 39

USB(BT)

PCI-E(WLAN)

G-Sensor

Page 36

Click Pad

Page 39

Int.KBD

Page 39

Thermal Sensor

Fintek F75303M

Page 39

SATA3.0 HDD CONN

SATA ODD CONN

m-SATA CONN

Page 36

Page 38

PCI Express Mini card

4 4

Slot 2

WWAN/mSATA

Page 38

USB

SATA

www.schematic-x.blogspot.com

SIM Card

Page 38

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

C

2012/07/01

LC Future Center Secret Data

Deciphered Date

D

2014/07/01

Title

Block Diagram

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

E

259

of

1.A

1

2

3

4

5

Voltage Rails

SIGNAL

STATE

+5VS

power plane

A A

State

S0

S3

S5 S4/AC

S5 S4/ Battery only

B B

S5 S4/AC & Battery don't exist

+5VALW

+B

O

X

+1.5V

+3VALW

O

XX

X

XX X

+3VS

+1.5VS

+VCCP

+CPU_CORE

+VGA_CORE

+VCC_GFXCORE_AXG

+1.8VS

+0.75VS

+1.05VS

OO

X

+3VM

+1.05VM

O

M3 Supported

O

M3 Supported

O

M3 Supported

Full ON

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

USB Port Table

USB 2.0 Port

EC SM Bus1 address

Device

Smart Battery

Address Address

0001 011X b

PCH SM Bus address

Device Address

DDR DIMM0

DDR DIMM2

C C

1001 000Xb

1001 010Xb

EC SM Bus2 address

Device

Thermal Sensor Fintek F75303M

1001_101xb

EHCI1

USB3.0

EHCI2

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

SMBUS Control Table

ZZZ5

Thermal

X X V

+3VS

X

WLAN WWAN

X XX V

+3VS

X

Sensor

SOURCE

SMB_EC_CK1 SMB_EC_DA1 SMB_EC_CK2 SMB_EC_DA2 SMBCLK SMBDATA SML0CLK SML0DATA SML1CLK SML1DATA

D D

KB9012

+3VALW

KB9012

+3VALW

PCH

+3VALW

PCH

+3VALW

PCH

+3VALW

VGA BATT KE9012 SODIMM

XV

+3VALW

X X X V

+3VS

X X X

X X

X

V

+3VS

X X X XX V

+3VS

PCH

X V

+3VS

X X XXX

ZZZ5

DA PCB

DA80000TG00

NM-A043

B2

1

46J_BARCODE_16X7

46J_BARCODE_16X7 @

@

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

ON

ON ON ON

ON

OFF

OFFLOW LOW LOW LOW

HIGH HIGH HIGH HIGH

LOW LOW

HIGH

LOWLOWLOW

HIGH

PCB Revision

0.1

0.2

BOM Structure Table

BTO Item BOM Structure Connector ME@ 45 LEVEL 45@ Unpop

Intel UMA

Intel SBA SBA@ Intel AOAC AOAC@ TPM TPM@ GPU N14M-GL GPU N14P-GV2 SIM Card Slot 3G@ Touch Panel Finger Print Board

0 1 2 3 4 5 6 7 8

9 10 11 12 13

B3

1

UUID_BARCODE_16X7

UUID_BARCODE_16X7 @

@

3 External USB Port

USB 3.0 Port (Left Side)

USB 3.0 Port (Left Side) USB 3.0 Port Touch Panel

USB Port (Right Side) Mini Card(WLAN/BT) FPR Mini Card(WWAN) Camera

OFF

@ DIS@NVidia

+3V_PCH@PCH AUX Power UMA@ X76@VRAM Option

N14MGL@ N14PGV2@

Touch@ FP@ SSD@SSD

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

Notes List

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

359

of

1.A

1

2

3

4

5

A A

DMI_CRX_PTX_N015 DMI_CRX_PTX_N115 DMI_CRX_PTX_N215 DMI_CRX_PTX_N315

DMI_CRX_PTX_P015 DMI_CRX_PTX_P115 DMI_CRX_PTX_P215 DMI_CRX_PTX_P315

DMI_CTX_PRX_N015 DMI_CTX_PRX_N115 DMI_CTX_PRX_N215 DMI_CTX_PRX_N315

DMI_CTX_PRX_P015 DMI_CTX_PRX_P115 DMI_CTX_PRX_P215 DMI_CTX_PRX_P315

FDI_CTX_PRX_N015 FDI_CTX_PRX_N115 FDI_CTX_PRX_N215 FDI_CTX_PRX_N315 FDI_CTX_PRX_N415 FDI_CTX_PRX_N515 FDI_CTX_PRX_N615

B B

C C

FDI_CTX_PRX_N715

FDI_CTX_PRX_P015 FDI_CTX_PRX_P115 FDI_CTX_PRX_P215 FDI_CTX_PRX_P315 FDI_CTX_PRX_P415 FDI_CTX_PRX_P515 FDI_CTX_PRX_P615 FDI_CTX_PRX_P715

FDI_FSYNC015 FDI_FSYNC115

FDI_INT15

FDI_LSYNC015 FDI_LSYNC115

+1.05VS

eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms

1 2

R2 24.9_0402_1%R2 24.9_0402_1%

1 2

R3 10K_0402_5%@R3 10K_0402_5%@

EDP_COMP

JCPU1A

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMP IO

A17

eDP_ICOMPO

B16

eDP_HPD#

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX [0]

F16

eDP_TX [1]

C16

eDP_TX [2]

G15

eDP_TX [3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

TYCO_2013620-2_IVY BRIDGE

ME@

J22

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7]

DMI

PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5]

Intel(R) FDI

PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12]

PCI EXPRESS* - GRAPHICS

PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

eDP

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

PEG_COMP J21 H22

K33

PCIE_CRX_GTX_N0 M35

PCIE_CRX_GTX_N1 L34

PCIE_CRX_GTX_N2 J35

PCIE_CRX_GTX_N3 J32

PCIE_CRX_GTX_N4 H34

PCIE_CRX_GTX_N5 H31

PCIE_CRX_GTX_N6 G33

PCIE_CRX_GTX_N7 G30 F35 E34 E32 D33 D31 B33 C32

J33

PCIE_CRX_GTX_P0 L35

PCIE_CRX_GTX_P1 K34

PCIE_CRX_GTX_P2 H35

PCIE_CRX_GTX_P3 H32

PCIE_CRX_GTX_P4 G34

PCIE_CRX_GTX_P5 G31

PCIE_CRX_GTX_P6 F33

PCIE_CRX_GTX_P7 F30 E35 E33 F32 D34 E31 C33 B32

M29

PCIE_CTX_GRX_C_N0 M32

PCIE_CTX_GRX_C_N1 M31

PCIE_CTX_GRX_C_N2 L32

PCIE_CTX_GRX_C_N3 L29

PCIE_CTX_GRX_C_N4 K31

PCIE_CTX_GRX_C_N5 K28

PCIE_CTX_GRX_C_N6 J30

PCIE_CTX_GRX_C_N7 J28 H29 G27 E29 F27 D28 F26 E25

M28

PCIE_CTX_GRX_C_P0 M33

PCIE_CTX_GRX_C_P1 M30

PCIE_CTX_GRX_C_P2 L31

PCIE_CTX_GRX_C_P3 L28

PCIE_CTX_GRX_C_P4 K30

PCIE_CTX_GRX_C_P5 K27

PCIE_CTX_GRX_C_P6 J29

PCIE_CTX_GRX_C_P7 J27 H28 G28 E28 F28 D27 E26 D25

1 2

R1 24.9_0402_1%R1 24.9_0402_1%

1 2

C1 0.22U_0402_10V6KDIS@C1 0.22U_0402_10V6KDIS@

1 2

C2 0.22U_0402_10V6KDIS@C2 0.22U_0402_10V6KDIS@

1 2

C3 0.22U_0402_10V6KDIS@C3 0.22U_0402_10V6KDIS@

1 2

C4 0.22U_0402_10V6KDIS@C4 0.22U_0402_10V6KDIS@

1 2

C5 0.22U_0402_10V6KDIS@C5 0.22U_0402_10V6KDIS@

1 2

C6 0.22U_0402_10V6KDIS@C6 0.22U_0402_10V6KDIS@

1 2

C7 0.22U_0402_10V6KDIS@C7 0.22U_0402_10V6KDIS@

1 2

C8 0.22U_0402_10V6KDIS@C8 0.22U_0402_10V6KDIS@

1 2

C17 0.22U_0402_10V6KDIS@C17 0.22U_0402_10V6KDIS@

1 2

C18 0.22U_0402_10V6KDIS@C18 0.22U_0402_10V6KDIS@

1 2

C19 0.22U_0402_10V6KDIS@C19 0.22U_0402_10V6KDIS@

1 2

C20 0.22U_0402_10V6KDIS@C20 0.22U_0402_10V6KDIS@

1 2

C21 0.22U_0402_10V6KDIS@C21 0.22U_0402_10V6KDIS@

1 2

C22 0.22U_0402_10V6KDIS@C22 0.22U_0402_10V6KDIS@

1 2

C23 0.22U_0402_10V6KDIS@C23 0.22U_0402_10V6KDIS@

1 2

C24 0.22U_0402_10V6KDIS@C24 0.22U_0402_10V6KDIS@

+1.05VS

PCIE_CRX_GTX_N[0..7] 22

PCIE_CRX_GTX_P[0..7] 22

PCIE_CTX_GRX_N0 PCIE_CTX_GRX_N1 PCIE_CTX_GRX_N2 PCIE_CTX_GRX_N3 PCIE_CTX_GRX_N4 PCIE_CTX_GRX_N5 PCIE_CTX_GRX_N6 PCIE_CTX_GRX_N7

PCIE_CTX_GRX_P0 PCIE_CTX_GRX_P1 PCIE_CTX_GRX_P2 PCIE_CTX_GRX_P3 PCIE_CTX_GRX_P4 PCIE_CTX_GRX_P5 PCIE_CTX_GRX_P6 PCIE_CTX_GRX_P7

PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical impedance = 43 mohms PEG_ICOMPO signals should be routed with - max length = 500 mils

- typical impedance = 14.5 mohms

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

1: Normal Operation; Lane # definition matches socket pin map definition

*

0:Lane Reversed

PCIE_CTX_GRX_N[0..7] 22

PCIE_CTX_GRX_P[0..7] 22

Nvidia support PCIE Gen2

D D

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

PROCESSOR(1/7) DMI,FDI,PEG

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

459

of

1.A

1

A A

+1.05VS

Processor Pullups

1 2

R281 62_0402_5%R281 62_0402_5%

B B

H_SNB_IVB#18

H_PECI18,41

H_PROCHOT#41

H_THRMTRIP#18

H_PM_SYNC15

H_CPUPWRGD18,5

2

1 2

R306 10K_0402_5%@R306 10K_0402_5%@

H_PROCHOT#H_PROCHOT#

R298 56_0402_5%R298 56_0402_5%

1 2

R240 0_0402_5%R240 0_0402_5%

1 2

R324 10K_0402_5%R324 10K_0402_5% C75 220P_0402_50V7K@C75 220P_0402_50V7K@

1 2

R322 130_0402_5%R322 130_0402_5%

1 2

H_CATERR#

H_PECI

H_PROCHOT#_R

H_THRMTRIP#

H_PM_SYNC

H_CPUPWRGD_R

PM_DRAM_PWRGD_RPM_SYS_PWRGD_BUF

BUF_CPU_RST#

JCPU1B

C26

PROC_SELECT#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE ME@

ME@

3

A28

CLK_CPU_DMI_R

BCLK

A27

CLK_CPU_DMI#_R

BCLK#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PRDY#

PREQ#

TRST#

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

A16 A15

R8

AK1

SM_RCOMP0

A5

SM_RCOMP1

A4

SM_RCOMP2

AP29

XDP_PRDY#

AP27

XDP_PREQ#

AR26

XDP_TCK

TCK

AR27

XDP_TMS

TMS

AP30

XDP_TRST#

AR28

XDP_TDI

TDI

AP26

XDP_TDO

TDO

AL35

XDP_DBRESET#_C

AT28

XDP_BPM#0

AR29

XDP_BPM#1

AR30

XDP_BPM#2

AT30

XDP_BPM#3

AP32

XDP_BPM#4

AR31

XDP_BPM#5

AT31

XDP_BPM#6

AR32

XDP_BPM#7

MISCTHERMALPWR MANAGEMENT

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

SM_DRAMRST#

DDR3

MISC

DDR3

MISC

P+ P+

P+ P+ P+

P+

JTAG & BPM

P+

4

1 2

R355 0_0402_5%R355 0_0402_5%

1 2

R354 0_0402_5%R354 0_0402_5%

1 2

R297 1K_0402_5%R297 1K_0402_5%

1 2

R321 1K_0402_5%R321 1K_0402_5%

1 2

R20 140_0402_1%R20 140_0402_1%

1 2

R236 25.5_.402_1%R236 25.5_.402_1%

1 2

R312 200_0402_1%R312 200_0402_1%

DDR3 Compensation Signals

PU/PD for JTAG signals

1 2

R326 51_0402_5%R326 51_0402_5%

1 2

R238 51_0402_5%R238 51_0402_5%

1 2

R323 51_0402_5%R323 51_0402_5%

1 2

R296 51_0402_5%R296 51_0402_5%

1 2

R299 51_0402_5%R299 51_0402_5%

1 2

R327 1K_0402_5%R327 1K_0402_5%

1 2

R267 0_0402_5%R267 0_0402_5%

CLK_CPU_DMI 14 CLK_CPU_DMI# 14

+1.05VS

H_DRAMRST# 6

+1.05VS

+3VS

XDP_DBRESET# 15

5

C C

1

C74

0.1U_0402_16V4Z

R295

10K_0402_5%

@

1 2

1

1 2

PM_DRAM_PWRGD15

PM_DRAM_PWRGD PM_SYS_PWRGD_BUF

D D

R333 0_0402_5%

5

1

P

B

2

A

G

3

2

U12

U12 74AHC1G09GW_TSSOP5

74AHC1G09GW_TSSOP5

4

O

RUN_ON_CPU1.5VS3#9

2

G

12

R331

R331 200_0402_5%

200_0402_5%

PM_SYS_PWRGD_BUF

12

R239

R239 39_0402_5%

39_0402_5% @

@

13

D

Q13

Q13 2N7002K_SOT23-3

2N7002K_SOT23-3 @

@

S

2

Buffered reset to CPU

PCH_PLTRST#17

+3VS +1.05VS+1.5V_CPU_VDDQ+3VALW+3VS

5

1

P

NC

Y

2

A

G

U7

U7 SN74LVC1G07DCKR_SC70-5

SN74LVC1G07DCKR_SC70-5

3

1

C73

0.1U_0402_16V4Z

2

4

BUFO_CPU_RST# BUF_CPU_RST#

12

R320

R320 75_0402_5%

75_0402_5%

R242

43_0402_1%

1 2

12

R44

R44 0_0402_5%

0_0402_5% @

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

For 26 Pin XDP Conn.

1 2

H_CPUPWRGD18,5 PBTN_OUT#15,41 XDP_CFG07 SYS_PWROK15 CLK_XDP_CLK14 CLK_XDP_CLK#14 PLT_RST#14,17,22,38,39,40,41,42

Title

PROCESSOR(2/7) PM,XDP,C LK

Size Document Number Rev

Custom

Date: Sheet

R237 1K_0402_1%@R237 1K_0402_1%@ R301 0_0402_5%@R301 0_0402_5%@ R224 1K_0402_1%@R224 1K_0402_1%@ R325 0_0402_5%@R325 0_0402_5%@ R194 0_0402_5%@R194 0_0402_5%@ R279 0_0402_5%@R279 0_0402_5%@

PLT_RST#

R191 1K_0402_1%@R191 1K_0402_1%@

ON.B152

ON.B152ON.B152

Thursday, November 01, 2012

ON.B152ON.B152

1 2 1 2 1 2 1 2 1 2 1 2

5

1.A

559

1.A

of

1

2

3

4

5

JCPU1C

A A

B B

C C

DDR_A_D[0..63]11

DDR_A_BS011 DDR_A_BS111 DDR_A_BS211

DDR_A_CAS#11 DDR_A_RAS#11 DDR_A_WE#11

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AP11 AN11

AL12 AM12 AM11

AL11 AP12 AN12

AJ14 AH14

AL15 AK15

AL14 AK14

AJ15 AH15

AE10

AF10

C5

SA_DQ[0]

D5

SA_DQ[1]

D3

SA_DQ[2]

D2

SA_DQ[3]

D6

SA_DQ[4]

C6

SA_DQ[5]

C2

SA_DQ[6]

C3

SA_DQ[7]

F10

SA_DQ[8]

F8

SA_DQ[9]

G10

SA_DQ[10]

G9

SA_DQ[11]

F9

SA_DQ[12]

F7

SA_DQ[13]

G8

SA_DQ[14]

G7

SA_DQ[15]

K4

SA_DQ[16]

K5

SA_DQ[17]

K1

SA_DQ[18]

J1

SA_DQ[19]

J5

SA_DQ[20]

J4

SA_DQ[21]

J2

SA_DQ[22]

K2

SA_DQ[23]

M8

SA_DQ[24]

N10

SA_DQ[25]

N8

SA_DQ[26]

N7

SA_DQ[27]

M10

SA_DQ[28]

M9

SA_DQ[29]

N9

SA_DQ[30]

M7

SA_DQ[31]

AG6

SA_DQ[32]

AG5

SA_DQ[33]

AK6

SA_DQ[34]

AK5

SA_DQ[35]

AH5

SA_DQ[36]

AH6

SA_DQ[37]

AJ5

SA_DQ[38]

AJ6

SA_DQ[39]

AJ8

SA_DQ[40]

AK8

SA_DQ[41]

AJ9

SA_DQ[42]

AK9

SA_DQ[43]

AH8

SA_DQ[44]

AH9

SA_DQ[45]

AL9

SA_DQ[46]

AL8

SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1]

V6

SA_BS[2]

AE8

SA_CAS#

AD9

SA_RAS#

AF9

SA_WE#

ME@

AB6

SA_CLK[0]

AA6

SA_CLK#[0]

V9

SA_CKE[0]

AA5

SA_CLK[1]

AB5

SA_CLK#[1]

V10

SA_CKE[1]

AB4

RSVD_TP[1]

AA4

RSVD_TP[2]

W9

RSVD_TP[3]

AB3

RSVD_TP[4]

AA3

RSVD_TP[5]

W10

RSVD_TP[6]

AK3

SA_CS#[0]

AL3

SA_CS#[1]

AG1

RSVD_TP[7]

AH1

RSVD_TP[8]

AH3

SA_ODT[0]

AG3

SA_ODT[1]

AG2

RSVD_TP[9]

AH2

RSVD_TP[10]

C4 G6 J3 M6 AL6 AM8 AR12 AM15

D4 F6 K3 N6 AL5 AM9 AR11 AM14

AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

DDR SYSTEM MEMORY A

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

JCPU1D

M_CLK_DDR0 11 M_CLK_DDR#0 11 DDR_CKE0_DIMMA 11

M_CLK_DDR1 11 M_CLK_DDR#1 11 DDR_CKE1_DIMMA 11

DDR_CS0_DIMMA# 11 DDR_CS1_DIMMA# 11

M_ODT0 11 M_ODT1 11

DDR_A_DQS#[0..7] 11

DDR_A_DQS[0..7] 11

DDR_A_MA[0..15] 11 DDR_B_MA[0..15] 12

DDR_B_D[0..63]12

DDR_B_BS012 DDR_B_BS112 DDR_B_BS212

DDR_B_CAS#12 DDR_B_RAS#12 DDR_B_WE#12

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AJ11

AH11

AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15

AA10

C9

SB_DQ[0]

A7

SB_DQ[1]

D10

SB_DQ[2]

C8

SB_DQ[3]

A9

SB_DQ[4]

A8

SB_DQ[5]

D9

SB_DQ[6]

D8

SB_DQ[7]

G4

SB_DQ[8]

F4

SB_DQ[9]

F1

SB_DQ[10]

G1

SB_DQ[11]

G5

SB_DQ[12]

F5

SB_DQ[13]

F2

SB_DQ[14]

G2

SB_DQ[15]

J7

SB_DQ[16]

J8

SB_DQ[17]

K10

SB_DQ[18]

K9

SB_DQ[19]

J9

SB_DQ[20]

J10

SB_DQ[21]

K8

SB_DQ[22]

K7

SB_DQ[23]

M5

SB_DQ[24]

N4

SB_DQ[25]

N2

SB_DQ[26]

N1

SB_DQ[27]

M4

SB_DQ[28]

N5

SB_DQ[29]

M2

SB_DQ[30]

M1

SB_DQ[31]

AM5

SB_DQ[32]

AM6

SB_DQ[33]

AR3

SB_DQ[34]

AP3

SB_DQ[35]

AN3

SB_DQ[36]

AN2

SB_DQ[37]

AN1

SB_DQ[38]

AP2

SB_DQ[39]

AP5

SB_DQ[40]

AN9

SB_DQ[41]

AT5

SB_DQ[42]

AT6

SB_DQ[43]

AP6

SB_DQ[44]

AN8

SB_DQ[45]

AR6

SB_DQ[46]

AR5

SB_DQ[47]

AR9

SB_DQ[48] SB_DQ[49]

AT8

SB_DQ[50]

AT9

SB_DQ[51] SB_DQ[52]

AR8

SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

AA9

SB_BS[0]

AA7

SB_BS[1]

R6

SB_BS[2]

SB_CAS#

AB8

SB_RAS#

AB9

SB_WE#

ME@

AE2

SB_CLK[0]

AD2

SB_CLK#[0]

R9

SB_CKE[0]

AE1

SB_CLK[1]

AD1

SB_CLK#[1]

R10

SB_CKE[1]

AB2

RSVD_TP[11]

AA2

RSVD_TP[12]

T9

RSVD_TP[13]

AA1

RSVD_TP[14]

AB1

RSVD_TP[15]

T10

RSVD_TP[16]

AD3

SB_CS#[0]

AE3

SB_CS#[1]

AD6

RSVD_TP[17]

AE6

RSVD_TP[18]

AE4

SB_ODT[0]

AD4

SB_ODT[1]

AD5

RSVD_TP[19]

AE5

RSVD_TP[20]

D7 F3 K6 N3 AN5 AP9 AK12 AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

DDR SYSTEM MEMORY B

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

M_CLK_DDR2 12 M_CLK_DDR#2 12 DDR_CKE2_DIMMB 12

M_CLK_DDR3 12 M_CLK_DDR#3 12 DDR_CKE3_DIMMB 12

DDR_CS2_DIMMB# 12 DDR_CS3_DIMMB# 12

M_ODT2 12 M_ODT3 12

DDR_B_DQS#[0..7] 12

DDR_B_DQS[0..7] 12

TYCO_2013620-2_IVY BRIDGE

+1.5V

1 2

R39 0_0402_5%@R39 0_0402_5%@

D

S

D

S

13

D D

H_DRAMRST#5

DRAMRST_CNTRL_PCH14

R43 0_0402_5%R43 0_0402_5%

1

R42

4.99K_0402_1%

1 2

12

Q2

G

BSS138_NL_SOT23-3

2

DRAMRST_CNTRL

1

C36

0.047U_0402_16V4Z

2

DDR3_DRAMRST#_R

R40

1K_0402_5%

12

R41

1K_0402_5%

1 2

2

DDR3_DRAMRST# 11,12

DRAMRST_CNTRL 9

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

TYCO_2013620-2_IVY BRIDGE

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

PROCESSOR(3/7) DDRIII

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

659

of

1.A

1

2

3

4

5

CFG Straps for Processor

CFG2

12

R45

A A

R45 1K_0402_1%

1K_0402_1% @

@

JCPU1E

XDP_CFG05

+CPU_CORE +VCC_GFXCORE_AXG

12

R48

49.9_0402_1%

B B

C C

12

R46

49.9_0402_1%

1 2

R176 100_0402_1%@R176 100_0402_1%@

1 2

R179 100_0402_1%@R179 100_0402_1%@

1 2

R47 49.9_0402_1%R47 49.9_0402_1%

1 2

R49 49.9_0402_1%R49 49.9_0402_1%

VCC_AXG_VAL_SENSE VSS_AXG_VAL_SENSE VCC_VAL_SENSE VSS_VAL_SENSE

VSS_AXG_VAL_SENSE

VSS_VAL_SENSE

CFG2

CFG4 CFG5 CFG6 CFG7

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

J15

RSVD27

TYCO_2013620-2_IVY BRIDGE

P+

CFG

RESERVED

ME@

VCC_DIE_SENSE VSS_DIE_SENSE

RSVD28 RSVD29 RSVD30 RSVD31

RSVD32

RSVD33 RSVD34 RSVD35

RSVD37 RSVD38 RSVD39 RSVD40

RSVD_NCTF1 RSVD_NCTF2 RSVD_NCTF3 RSVD_NCTF4 RSVD_NCTF5

RSVD_NCTF6 RSVD_NCTF7 RSVD_NCTF8 RSVD_NCTF9

RSVD_NCTF10

RSVD51 RSVD52

BCLK_ITP

BCLK_ITP#

RSVD_NCTF11 RSVD_NCTF12 RSVD_NCTF13

PEG Static Lane Reversal - CFG2 is for the 16x

AH27 AH26

L7 AG7 AE7 AK2

W8

AT26 AM33 AJ27

T8 J16 H16 G16

AR35 AT34 AT33 AP35 AR34

B34 A33 A34 B35 C35

AJ32 AK32

AN35 AM35

AT2 AT1 AR1

B1

KEY

T2T2

1 2

R173 0_0402_5%R173 0_0402_5%

CFG2

Display Port Presence Strap

PCIE Port Bifurcation Straps

CFG[6:5]

1: Normal Operation; Lane # definition matches socket pin map definition

*

0:Lane Reversed

CFG4

12

R50

1K_0402_1%

CFG4

1 : Disabled; No Physical Display Port attached to Embedded Display Port

0 : Enabled; An external Display Port device is connected to the Embedded Display Port

*

CFG6 CFG5

12

R51

1K_0402_1%

11: (Default) x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled

*

01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

CFG7

12

@R53

@ 1K_0402_1%

1K_0402_1%

R52

1K_0402_1%

@

R53

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB

CFG7

de assertion

0: PEG Wait for BIOS for training

D D

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

PROCESSOR(4/7) RSVD,CFG

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

759

of

1.A

1

2

3

4

5

+CPU_CORE +1.05VS

A A

B B

C C

D D

JCPU1F

AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26

AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27

AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26

Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26

TYCO_2013620-2_IVY BRIDGE

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100

POWER

PEG AND DDR

CORE SUPPLY

VSS_SENSE_VCCIO

SENSE LINES SVID

ME@

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK VIDSOUT

VCC_SENSE VSS_SENSE

VCCIO_SENSE

8.5A97A

AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12

E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

J23

12

1

R54

C37

0.1U_0402_16V4Z

AJ29

H_CPU_SVIDALRT#

AJ30

H_CPU_SVIDCLK

AJ28

H_CPU_SVIDDAT

Trace Impedance = 27 ~ 33 ohm Trace Length Match < 25 mils

AJ35

VCCSENSE_R

AJ34

VSSSENSE_R

1 2

R64 10_0402_1%R64 10_0402_1%

B10

VCCIO_SENSE

A10

VSSIO_SENSE

R63

10_0402_1%

R54 130_0402_5%

130_0402_5%

2

R56 43_0402_1%R56 43_0402_1% R57 0_0402_5%R57 0_0402_5% R58 0_0402_5%R58 0_0402_5%

R174 100_0402_1%@R174 100_0402_1%@

R60 0_0402_5%R60 0_0402_5% R61 0_0402_5%R61 0_0402_5%

+1.05VS

12

75_0402_5%

1 2 1 2 1 2

1 2

1 2 1 2

VCCIO_SENSE 51

+1.05VS+1.05VS

R55

+CPU_CORE

12

1

C38

0.1U_0402_16V4Z

2

Place the PU resistors close to VR

VR_SVID_ALRT# 53 VR_SVID_CLK 53 VR_SVID_DAT 53

VCCSENSE_RVSSSENSE_R

12

R59

Place the PU

100_0402_1%

resistors close to CPU

VCCSENSE 53 VSSSENSE 53

12

R62

R62 100_0402_1%

100_0402_1%

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

PROCESSOR(5/7) PWR,BYPASS

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

859

of

1.A

1

A A

+VCC_GFXCORE_AXG

B B

+1.8VS

C C

D D

Vaxg

ɄɄɄɄ

supports external gr aphics and if GFX VR is not stuffed in a common mother board design,

ɄɄɄɄ

motherboard design (Gfx VR keeps VAXG from floating) if the VR is stuff ed

1 2

R76 0_0805_5%R76 0_0805_5%

C56

1

2

Can connect to GND if mother board only

VAXG can be left floating in a com mon

+1.8VS_VCCPLL

C58

1U_0402_6.3V6K

C58

1U_0402_6.3V6K

C57

1U_0402_6.3V6K

C57

1U_0402_6.3V6K

10U_0603_6.3V6M

1

C59

1

@

2

1

+

2

1.5A

330U_D2_2V_Y

33A

JCPU1G

AT24

VAXG1

AT23

VAXG2

AT21

VAXG3

AT20

VAXG4

AT18

VAXG5

AT17

VAXG6

AR24

VAXG7

AR23

VAXG8

AR21

VAXG9

AR20

VAXG10

AR18

VAXG11

AR17

VAXG12

AP24

VAXG13

AP23

VAXG14

AP21

VAXG15

AP20

VAXG16

AP18

VAXG17

AP17

VAXG18

AN24

VAXG19

AN23

VAXG20

AN21

VAXG21

AN20

VAXG22

AN18

VAXG23

AN17

VAXG24

AM24

VAXG25

AM23

VAXG26

AM21

VAXG27

AM20

VAXG28

AM18

VAXG29

AM17

VAXG30

AL24

VAXG31

AL23

VAXG32

AL21

VAXG33

AL20

VAXG34

AL18

VAXG35

AL17

VAXG36

AK24

VAXG37

AK23

VAXG38

AK21

VAXG39

AK20

VAXG40

AK18

VAXG41

AK17

VAXG42

AJ24

VAXG43

AJ23

VAXG44

AJ21

VAXG45

AJ20

VAXG46

AJ18

VAXG47

AJ17

VAXG48

AH24

VAXG49

AH23

VAXG50

AH21

VAXG51

AH20

VAXG52

AH18

VAXG53

AH17

VAXG54

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

TYCO_2013620-2_IVY BRIDGE

POWER

GRAPHICS

1.8V RAIL

2

+VCC_GFXCORE_AXG

1 2

R73 100_0402_1%@R73 100_0402_1%@

ME@

AK35

VAXG_SENSE

SM_VREF

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15

VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8

VCCSA_VID[0] VCCSA_VID[1]

VCCIO_SEL

2

AK34

AL1

B4 D1

10A

AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1

6A

M27 M26 L26 J26 J25 J24 H26 H25

H23

C22 C24

A19

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

SA_DIMM_VREFDQ SB_DIMM_VREFDQ

VREFMISC

DDR3 -1.5V RAILS

SA RAIL

VCCSA_SENSE

12

+V_SM_VREF_CNT

+V_DDR_REFA_R +V_DDR_REFB_R

+1.5V_CPU_VDDQ

C40

10U_0603_6.3V6M

C40

10U_0603_6.3V6M

1

2

C48

1

2

H_VCCP_SEL

IVY Bridge drives VCCIO_SEL low VCCP_PWRCTRL:0

Sandy Bridge is NC for A19 VCCP_PWRCTRL:1

R65

R65 10_0402_1%

10_0402_1%

1 2

+V_SM_VREF should

R66

have 10 mil trace width

10_0402_1%

R68

1K_0402_5%

R72

1K_0402_5%

C41

10U_0603_6.3V6M

C41

10U_0603_6.3V6M

C43

C42

10U_0603_6.3V6M

C42

10U_0603_6.3V6M

1

2

10U_0603_6.3V6M

1

2

C50

10U_0603_6.3V6M

C50

10U_0603_6.3V6M

C49

10U_0603_6.3V6M

C49

10U_0603_6.3V6M

1

@

2

1 2

R75 0_0402_5%@R75 0_0402_5%@

1 2

R77 0_0402_5%R77 0_0402_5%

+1.5V_CPU_VDDQ

12

C44

10U_0603_6.3V6M

C44

10U_0603_6.3V6M

1

2

C51

10U_0603_6.3V6M@C51

10U_0603_6.3V6M

C52

1

+

@

2

3

VCC_AXG_SENSE 53

VSS_AXG_SENSE 53

1 2

R70 0_0402_5%@R70 0_0402_5%@

3

C39

0.1U_0402_16V4Z

C39

0.1U_0402_16V4Z

1

2

@JP1

@

1 2

C46

330U_D2_2V_Y+C46

330U_D2_2V_Y

C45

10U_0603_6.3V6M

C45

10U_0603_6.3V6M

1

2

+VCCSA

330U_D2_2V_Y

R78 10K_0402_5%R78 10K_0402_5%

1

+

2

+VCCSA_SENSE 50

H_VCCSA_VID0 50 H_VCCSA_VID1 50

1 2

3

PAD-OPEN 4x4m

4

Dϯ^ƵƉƉŽƌƚ

+V_DDR_REFA_R

+V_DDR_REFB_R

+1.5V

12

R69

@R69

@ 100_0402_5%

100_0402_5%

1

Q4

Q4 AP2302GN-HF_SOT23-3

AP2302GN-HF_SOT23-3 @

@

RUN_ON_CPU1.5VS3

JP1

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

+1.5V

RUN_ON_CPU1.5VS3#5

+V_SM_VREF

SUSP31,43,49,52

SUSP#31,41,43,49,51

2012/07/01

12

R74

@R74

@ 100_0402_5%

100_0402_5%

R80

R80 100K_0402_5%

100K_0402_5% @

@

1 2

R83 0_0402_5%R83 0_0402_5%

2N7002K_SOT23-3

@R86

@

Deciphered Date

2N7002K_SOT23-3

4

1 2

R86

0_0402_5%

RUN_ON_CPU1.5VS3#

LC Future Center Secret Data

Q12

2

G

@

from 1PCS 2N7002 dual channel change to BSS138 2pCS

+1.5V_CPU_VDDQ Source

+VSB+3VALW +1.5V_CPU_VDDQ+1.5V

12

13

D

S

R81

R81 82K_0402_1%

82K_0402_1%

Q11

2

G

2N7002K_SOT23-3

2014/07/01

12

RUN_ON_CPU1.5VS3

13

D

S

5

1 2

R67 0_0402_5%@R67 0_0402_5%@

Q3

BSS138_NL_SOT23-3

D

S

D

S

12

R79

1K_0402_1%

@

R71 0_0402_5%@R71 0_0402_5%@

12

R108

1K_0402_1%

@

+1.5V_CPU_VDDQ +1.5V

8 7 6 5

1 2

12 R85

R85

@

330K_0402_5%

Title

PROCESSOR(6/7) PWR

Size Document Number Rev

Custom

Date: Sheet

13

G

2

DRAMRST_CNTRL

1 2

Q6

BSS138_NL_SOT23-3

D

S

D

S

13

G

2

1 2

C47 0.1U_0402_10V7KC47 0.1U_0402_10V7K

1 2

C53 0.1U_0402_10V7KC53 0.1U_0402_10V7K

1 2

C54 0.1U_0402_10V7KC54 0.1U_0402_10V7K

1 2

C55 0.1U_0402_10V7KC55 0.1U_0402_10V7K

J2@

1 2

PAD-OPEN 4x4m

Q5

Q5 AP4800BGM-HF_SO -8

AP4800BGM-HF_SO -8

4

R201

15K_0402_5%

1

C61

0.047U_0603_25V7K

0.047U_0603_25V7K 2

Thursday, November 01, 2012

1 2 3

D

S

ON.B152

ON.B152ON.B152

5

+VREF_DQ_DIMMA

+VREF_DQ_DIMMB

DRAMRST_CNTRL 6

R82 220_0402_5%R82 220_0402_5%

12

1

C60

0.1U_0402_10V6K

0.1U_0402_10V6K @

@

2

13

2

RUN_ON_CPU1.5VS3#

G

Q7

Q7 2N7002K_SOT23-3

2N7002K_SOT23-3

959

1.A

of

1

A A

B B

C C

AR25 AR22 AR19 AR16 AR13 AR10

AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10

AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10

AM29 AM25 AM22 AM19 AM16 AM13 AM10

AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10

AT35 AT32 AT29 AT27 AT25 AT22 AT19 AT16 AT13 AT10

AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10

AJ25

2

JCPU1H

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10

AT7

VSS11

AT4

VSS12

AT3

VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19

AR7

VSS20

AR4

VSS21

AR2

VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31

AP7

VSS32

AP4

VSS33

AP1

VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42

AN7

VSS43

AN4

VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51

AM7

VSS52

AM4

VSS53

AM3

VSS54

AM2

VSS55

AM1

VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77

AK7

VSS78

AK4

VSS79 VSS80

VSS

ME@

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

3

JCPU1I

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

VSS

ME@

VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285

F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3

4

5

TYCO_2013620-2_IVY BRIDGE

D D

1

2

TYCO_2013620-2_IVY BRIDGE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

PROCESSOR(7/7) VSS

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

10 59

of

1.A

1

+1.5V

12

R2001

1K_0402_1%

A A

B B

C C

D D

+VREF_DQ_DIMMA

R2003

R2003 1K_0402_1%

1K_0402_1%

All VREF traces should have 10 mil trace width

C2001

12

DDR_CKE0_DIMMA6

DDR_A_BS26

M_CLK_DDR06 M_CLK_DDR#06

DDR_A_BS06

DDR_A_WE#6 DDR_A_CAS#6

DDR_CS1_DIMMA#6

+3VS

+0.75VS +0.75VS

<Address: 00>

DIMM_A Reserve H:4.0mm

1

2

C2021

2

+1.5V

JDIMM1

10K_0402_5%

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1 VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9 VSS925VSS10

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17

49

VSS18

51

DQ18 DQ1953VSS19

55

VSS20

57

DQ24 DQ2559VSS21 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3 A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LCN_DAN06-K4806-0102

LCN_DAN06-K4806-0102 ME@

ME@

2.2U_0603_6.3V6K

C2002

0.1U_0402_16V4Z

C2046

1

2

+VREF_DQ_DIMMA

0.1U_0402_16V4Z

0.1U_0402_16V4Z DDR_A_D0 DDR_A_D1

1

2

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS#

DDR_A_MA13 DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D36 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_D42 DDR_A_D46 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_D58 DDR_A_D59

C2022

2.2U_0603_6.3V6K

C2022

2.2U_0603_6.3V6K

R2006

10K_0402_5%

R2006

10K_0402_5%

R2007

0.1U_0402_16V4Z@C2046

0.1U_0402_16V4Z

1

2

@

2

R2007

12

1

2

12

VSS3

DQS0

VSS6

VSS8 DQ12 DQ13

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3

DQ30 DQ31

CKE1

VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44

DQ45 VSS35 DQS#5

DQS5

VSS38

DQ46

DQ47 VSS40

DQ52

DQ53 VSS42

VSS43

DQ54

DQ55 VSS45

DQ60

DQ61 VSS47 DQS#7

DQS7

VSS50

DQ62

DQ63 VSS52

EVENT#

VTT2

2 4

DQ4

6

DQ5

8 10 12 14 16

DQ6

18

DQ7

20 22 24 26 28

DM1

30 32 34 36 38 40 42 44 46

DM2

48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78

A15

80

A14

82 84 86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102

CK1

104 106 108

BA1

110 112 114

S0#

116 118 120 122

NC2

124 126 128 130 132 134 136

DM4

138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170

DM6

172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

SDA

202

SCL

204

206

G2

+1.5V

DDR_A_D4 DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

DDR3_DRAMRST#

DDR_A_D14 DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_D22 DDR_A_D23

DDR_A_D28 DDR_A_D29

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D30 DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA15 DDR_A_MA14DDR_A_MA14

DDR_A_MA11DDR_A_MA12 DDR_A_MA7

DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_BS1 DDR_A_RAS#

DDR_CS0_DIMMA# M_ODT0

M_ODT1

+VREF_CA

DDR_A_D37

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

SMB_DATA_S3 SMB_CLK_S3

3

DDR3_DRAMRST# 12,6

DDR_CKE1_DIMMA 6

M_CLK_DDR1 6 M_CLK_DDR#1 6

DDR_A_BS1 6 DDR_A_RAS# 6

DDR_CS0_DIMMA# 6 M_ODT0 6

M_ODT1 6

C2015

2.2U_0603_6.3V6K

C2015

2.2U_0603_6.3V6K

C2016

0.1U_0402_16V4Z

C2016

0.1U_0402_16V4Z

1

2

SMB_DATA_S3 12,14,38,39 SMB_CLK_S3 12,14,38,39

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

+1.5V

12

R2004

R2004 1K_0402_1%

1K_0402_1%

12

R2005

R2005 1K_0402_1%

1K_0402_1%

LC Future Center Secret Data

4

Deciphered Date

4

2014/07/01

5

DDR_A_DQS#[0..7] 6

DDR_A_DQS[0..7] 6

DDR_A_D[0..63] 6

DDR_A_MA[0..15] 6

Layout Note: Place near JDIMM1

+1.5V

C2004

0.1U_0402_10V6K

C2004

0.1U_0402_10V6K

C2005

0.1U_0402_10V6K

C2005

0.1U_0402_10V6K

C2006

C2003

0.1U_0402_10V6K

C2003

0.1U_0402_10V6K

1

2

+1.5V

C2007

10U_0603_6.3V6M

C2007

10U_0603_6.3V6M

C2008

1

2

+0.75VS

C2017

1U_0402_6.3V6K

C2017

1U_0402_6.3V6K

C2018

1

2

Title

Size Document Number Rev

Custom

Date: Sheet

C2006

1

2

C2010

10U_0603_6.3V6M

C2009

10U_0603_6.3V6M

C2009

10U_0603_6.3V6M

1

2

1U_0402_6.3V6K

1

2

Layout Note: Place near JDIMM1.203,204

C2019

1U_0402_6.3V6K

C2019

1U_0402_6.3V6K

1

2

DDRIII DIMMA

Thursday, November 01, 2012

C2020

0.1U_0402_10V6K

10U_0603_6.3V6M

C2011

1U_0402_6.3V6K

1

2

For RF

12

@

10U_0603_6.3V6M

C2012

10U_0603_6.3V6M

C2012

10U_0603_6.3V6M

1

2

For RF

12

@

ON.B152

ON.B152ON.B152

5

@

RFC1

2200P_0402_50V7K

C2013

1

@

2

RFC3

2200P_0402_50V7K

1

RFC2

2

47P_0402_50V8J

10U_0603_6.3V6M@C2013

10U_0603_6.3V6M

C2014

1

+

@

2

1

@

RFC4

2

11 59

330U_D2_2V_Y

47P_0402_50V8J

1.A

of

1

2

3

4

5

0.1U_0402_10V6K

10U_0603_6.3V6M

1U_0402_6.3V6K

1

2

C2028

0.1U_0402_10V6K

C2028

0.1U_0402_10V6K

1

2

C2032

10U_0603_6.3V6M

C2032

10U_0603_6.3V6M

1

2

C2045

1U_0402_6.3V6K@C2045

1U_0402_6.3V6K

1

2

ON.B152

ON.B152ON.B152

5

DDR_B_DQS#[0..7] 6

DDR_B_DQS[0..7] 6

DDR_B_D[0..63] 6

DDR_B_MA[0..15] 6

For RF

12

@

RFC5

C2033

10U_0603_6.3V6M

C2033

10U_0603_6.3V6M

C2034

10U_0603_6.3V6M

C2034

10U_0603_6.3V6M

1

2

For RF

12

@

1

@

2

2200P_0402_50V7K

C2035

10U_0603_6.3V6M@C2035

10U_0603_6.3V6M

C2036

1

@

2

@

1

@

RFC7

2

2200P_0402_50V7K

12 59

of

RFC6

47P_0402_50V8J

330U_D2_2V_Y

1

+

2

RFC8

47P_0402_50V8J

1.A

+1.5V

12

R2008

1K_0402_1%

+1.5V +1.5V

JDIMM2

12

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1 VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9 VSS925VSS10

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17

49

VSS18

51

DQ18 DQ1953VSS19

55

VSS20

57

DQ24 DQ2559VSS21 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3 A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LCN_DAN06-K4406-0102

LCN_DAN06-K4406-0102 ME@

ME@

A A

B B

C C

D D

1

+VREF_DQ_DIMMB

R2013

10K_0402_5%

+0.75VS

C2024

1

12

R2010

1K_0402_1%

All VREF traces should have 10 mil trace width

+3VS

12

C2043

2

DDR_CKE2_DIMMB6

DDR_B_BS26

M_CLK_DDR26 M_CLK_DDR#26

DDR_B_BS06

DDR_B_WE#6 DDR_B_CAS#6

DDR_CS3_DIMMB#6

C2044

0.1U_0402_16V4Z

1

2

2.2U_0603_6.3V6K

+3VS

2.2U_0603_6.3V6K

C2023

1

2

0.1U_0402_16V4Z

+VREF_DQ_DIMMB

DDR_B_D0 DDR_B_D1

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26 DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13 DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D59

R2014

10K_0402_5%

2

VSS3

DQS0

VSS6

VSS8 DQ12 DQ13

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44

DQ45 VSS35 DQS#5

DQS5

VSS38

DQ46

DQ47 VSS40

DQ52

DQ53 VSS42

VSS43

DQ54

DQ55 VSS45

DQ60

DQ61 VSS47 DQS#7

DQS7

VSS50

DQ62

DQ63 VSS52

EVENT#

VTT2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR3_DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_D22 DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_CKE3_DIMMB

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

M_CLK_DDR3 M_CLK_DDR#3

DDR_B_BS1 DDR_B_RAS#

DDR_CS2_DIMMB# M_ODT2

M_ODT3

+VREF_CB

DDR_B_D36 DDR_B_D37

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

SMB_DATA_S3 SMB_CLK_S3

DDR3_DRAMRST# 11,6

DDR_CKE3_DIMMB 6

M_CLK_DDR3 6 M_CLK_DDR#3 6

DDR_B_BS1 6 DDR_B_RAS# 6

DDR_CS2_DIMMB# 6 M_ODT2 6

M_ODT3 6

C2038

0.1U_0402_16V4Z

C2038

0.1U_0402_16V4Z

C2037

2.2U_0603_6.3V6K

C2037

2.2U_0603_6.3V6K

1

2

SMB_DATA_S3 11,14,38,39 SMB_CLK_S3 11,14,38,39 +0.75VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

+1.5V

12

R2011

R2011 1K_0402_1%

1K_0402_1%

12

R2012

R2012 1K_0402_1%

1K_0402_1%

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Layout Note: Place near JDIMM2

+1.5V

C2027

C2025

+1.5V

C2029

+0.75VS

C2039

1U_0402_6.3V6K

C2039

1U_0402_6.3V6K

1

2

Title

Size Document Number Rev

Custom

Date: Sheet

C2027

0.1U_0402_10V6K

C2026

0.1U_0402_10V6K

C2026

0.1U_0402_10V6K

1

2

1

2

C2040

1

2

C2031

C2030

10U_0603_6.3V6M

C2030

10U_0603_6.3V6M

1

2

Layout Note: Place near JDIMM2.203,204

C2041

1U_0402_6.3V6K

C2041

1U_0402_6.3V6K

C2042

1

2

DDRIII DIMMB

Thursday, November 01, 2012

DQ4 DQ5

DQ6 DQ7

DM1

DM2

A15 A14

A7

A6 A4

A2 A0

CK1

BA1

S0#

NC2

DM4

DM6

SDA SCL

G2

1

C64

C64 18P_0402_50V8J

18P_0402_50V8J

2

PCH_RTCX1

PCH_RTCX2

SM_INTRUDER#

PCH_INTVRMEN

HDA_SPKR

HDA_SDOUT

HDA_SYNC

1

C179

C179 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VS

1 2

R202 10K_0402_5%R202 10K_0402_5%

R106

1K_0402_5%

1 2

R87 10M_0402_5%R87 10M _0402_5%

Y1

1 2

18P_0402_50V8J

32.768KHZ_12.5PF_CM31532768DZFT

1

C63

11/14

2

A A

+RTCVCC

1 2

R90 1M_0402_5%R90 1M_0402_5%

1 2

R91 330K_0402_5%R91 330K_0402_5%

INTVR MEN

烉烉烉烉

Integrated VRM enable

H

*

L

烉烉烉烉

Integrated VRM disable

(INTVRMEN should always be pull high.)

+3VS

1 2

R93 1K_0402_5%@R93 1K_0402_5%@

HIGH= Enable ( No Reboot ) LOW= Disable (Default)

*

B B

+3V_PCH

1 2

R95 1K_0402_5%@R95 1K_0402_5%@

HDA_SDO

ME debug mode,this signal has a weak i nternal PD Low = Disabled (Default)

*

High = Enabled [Flash Descriptor Security Overi de]

+3V_PCH

1 2

R99 1K_0402_5%R99 1K_0402_5%

This signal has a weak internal pull-down

On Die PLL VR Select is supplied by

1.5V when sampled high

*

1.8V when sampled low Needs to be pulled High for Huron River platfrom

C C

HDA_BITCLK_AUDIO35

HDA_SYNC_AUDIO35

HDA_RST#_AUDIO35

HDA_SDOUT_AUDIO35

1 2

C76 22P_0402_50V8JC76 22P_0402_50V8J

1 2

C77 22P_0402_50V8J@C77 22P _0402_50V8J@

+3V_PCH +3V_PCH+3V_PCH

D D

12

R120 200_0402_5%

200_0402_5%

12

R123 100_0402_1%

100_0402_1%

12

@R120

@

12

@R123

@

R107

33_0402_5%

1 2

HDA_BIT_CLK

R241

33_0402_5%

1 2

HDA_SYNC_R

R109

33_0402_5%

1 2

HDA_RST#

R111

33_0402_5%

1 2

HDA_SDOUT

HDA_BITCLK_AUDIO

HDA_SDOUT_AUDIO

12

R122

@R122

R121

@R121

@

200_0402_5%

PCH_JTAG_TMSPCH_JTAG_TDO PCH_JTAG_TDI

R124

@R124

@

100_0402_1%

1

200_0402_5%

12

R125 100_0402_1%

100_0402_1%

@

@R125

@

Prevent back drive issue.

+5VS

G

2

13

D

S

D

S

Q8

12

BSS138_NL_SOT23-3

R303

R303 1M_0402_5%

1M_0402_5%

2

W=20milsW=20mils

+RTCBATT+RTCVCC

+RTCVCC

1 2

R88 20K_0402_5%R88 20K_0402_5%

1 2

R89 20K_0402_5%R89 20K_0402_5%

WLBT_OFF_5#

9/27

HDA_SYNC

2

12

CLRP1

SHORT PADS

1U_0402_6.3V6K

WLBT_OFF_5#38

C62

C66

ME_FLASH41

+3V_PCH

3

CMOS

JCMOS1

SHORT PADS@JCMOS1

SHORT PADS

1

12

@

2

SHORT PADS@JME1

SHORT PADS

1

12

@

2

ME

R94 0_0402_5%R94 0_0402_5%

R209 10K_0402_5%@R209 10K_0402_5%@

R96 51_0402_5%R96 51_0402_5%

JME1

1 2

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK

HDA_SYNC

HDA_SPKR35

HDA_SDIN035

HDA_SPKR

HDA_RST#

HDA_SDIN0

HDA_SDOUT

WLBT_OFF_5#

PCH_GPIO13

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

SPI_CLK_PCH_R

SPI_SB_CS0#

SPI_SB_CS1#

SPI_SI

SPI_SO_R

U3A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

PANTHER-POINT_FCBGA989

P-

P+

P-

P+

8MB+4MB SPI ROM FOR 5M ME(SBA) & Non-share ROM.

U6

SPI_SB_CS1#

SPI_SB_CS0# SPI_SO_R SPI_SO_L

EON 8M:SA000046400 S IC FL 64M EN25Q64-104HIP SOP 8P 4M:SA00004LI00 S IC FL 32M EN25Q32B-104HIP SOP 8P

1 2

R336 0_0402_5%R336 0_0402_5%

1 2

R343 33_0402_5%R343 33_0402_5%

1 2

R340 0_0402_5%R340 0_0402_5%

1 2

R337 33_0402_5%R337 33_0402_5%

3

1

CS1#

2

SPI_SO1SPI_SO_R

3

SPI_WP#1

4

W25Q16BVSSIG_SO8

1

CS#

2 3

SPI_WP#

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

RTCIHDA

JTAG

SPI

P+

U6 4M

CS# DO(IO1)

HOLD#(IO3) WP#(IO2) GND

DI(IO0)

U5 8M

U5

CS#

VCC

DO

HOLD# WP# GND

W25Q32BVSSIG_SO8

C38

P+

FWH0 / LAD0

P+

FWH1 / LAD1

P+

FWH2 / LAD2

P+

FWH3 / LAD3

LPC

FWH4 / LFRAME#

P+

LDRQ0#

P+

LDRQ1# / GPIO23

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP

SATA 6G

SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA

SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

8

VCC

7

SPI_HOLD#1

6

SPI_CLK1

CLK

5

SPI_SI1

+3VS_SPI

8 7

SPI_HOLD#

6

SPI_CLK_PCH SPI_CLK_PCH_R

CLK

5

SPI_SI_R

DI

2012/07/01

LPC_AD0

A38

LPC_AD1

B37

LPC_AD2

C37

LPC_AD3

D36

LPC_FRAME#

E36 K36

V5

AM3 AM1 AP7 AP5

AM10 AM8 AP11 AP10

AD7 AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

Y10

AB12

AB13

AH1

P3

V14

P1

1 2

R110 0_0402_5%

1 2

R112 0_0402_5%SBA@R112 0_0402_5%SBA@

R339 33_0402_5%R339 33_0402_5% R338 33_0402_5%R338 33_0402_5%

1 2

C191 0.1U_0402_16V4ZC191 0.1U_0402_16V4Z

R92 10K_0402_5%R92 10K_0402_5%

SERIRQ

SATA_PTX_C_DRX_N0 SATA_PTX_C_DRX_P0

SATA_PTX_C_DRX_N1 SATA_PTX_C_DRX_P1

SATA_PTX_C_DRX_N2 SATA_PTX_C_DRX_P2

SATA_COMP

SATA3_COMP

RBIAS_SATA3

PCH_SATALED#

PCH_GPIO21

ODD_DET#

9/22

@

1 2 1 2

R342 33_0402_5%R342 33_0402_5% 1 2 1 2

R341 33_0402_5%R341 33_0402_5%

LC Future Center Secret Data

Deciphered Date

4

1 2

C67 0.01U_0402_16V7KC67 0.01U_0402_16V7K

1 2

C68 0.01U_0402_16V7KC68 0.01U_0402_16V7K

1 2

C69 0.01U_0402_16V7KC69 0.01U_0402_16V7K

1 2

C70 0.01U_0402_16V7KC70 0.01U_0402_16V7K

1 2

C71 0.01U_0402_16V7KC71 0.01U_0402_16V7K

1 2

C72 0.01U_0402_16V7KC72 0.01U_0402_16V7K

1 2

R97 37.4_0402_1%R97 37.4_0402_1%

1 2

R98 49.9_0402_1%R98 49.9_0402_1%

1 2

R100 750_0402_1%R100 750_0402_1%

1 2

R101 10K_0402_5%R101 10K_0402_5%

1 2

R102 10K_0402_5%R102 10K_0402_5%

1 2

R103 10K_0402_5%R103 10K_0402_5%

+3VS+3VS_SPI

+3VM

if not supply SBA function R110 mount , R112 @ if supply SBA function R110 @,R112 mount

SPI_CLK_PCH_R SPI_SI

SPI_SI

2014/07/01

4

LPC_AD0 38,40,41 LPC_AD1 38,40,41 LPC_AD2 38,40,41 LPC_AD3 38,40,41

LPC_FRAME# 38,40,41

+3VS

SERIRQ 40,41

SATA_DTX_C_PRX_N0 SATA_DTX_C_PRX_P0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0

SATA_DTX_C_PRX_N1 SATA_DTX_C_PRX_P1 SATA_PTX_DRX_N1 SATA_PTX_DRX_P1

SATA_DTX_C_PRX_N2 SATA_DTX_C_PRX_P2 SATA_PTX_DRX_N2 SATA_PTX_DRX_P2

+1.05VS_PCH

+1.05VS_VCC_SATA

+1.05VS_SATA3

+3VS

ODD_DET# 36

SPI_WP#1

SPI_HOLD#1

SPI_WP#

SPI_HOLD#

SPI_CLK_PCH_R

R104 3.3K_0402_5%R104 3.3K_0402_5%

R105 3.3K_0402_5%R105 3.3K_0402_5%

R334 3.3K_0402_5%R334 3.3K_0402_5%

R335 3.3K_0402_5%R335 3.3K_0402_5%

R119 33_0402_5%@R119 33_0402_5%@

Reserve for EMI please close to U3

SPI_CLK_PCH_R

Reserve for RF please close to U5, U6

C84 22P_0402_50V8JC84 22P_0402_50V8J

C85 22P_0402_50V8JC85 22P_0402_50V8J

9/28 RF modify

Title

PCH (1/9) SATA,HDA,S PI, LPC

Size Document Number Rev

Custom

Date: Sheet

SATA_DTX_C_PRX_N0 36 SATA_DTX_C_PRX_P0 36 SATA_PTX_DRX_N0 36 SATA_PTX_DRX_P0 36

SATA_DTX_C_PRX_N1 38 SATA_DTX_C_PRX_P1 38 SATA_PTX_DRX_N1 38 SATA_PTX_DRX_P1 38

SATA_DTX_C_PRX_N2 36 SATA_DTX_C_PRX_P2 36 SATA_PTX_DRX_N2 36 SATA_PTX_DRX_P2 36

1 2

Saturday, November 03, 2012

5

+3VS_SPI

1 2

C78 22P_0402_50V8J@C78 22P_0402_50V8J@

ON.B152

ON.B152ON.B152

5

HDD

m-SATA

ODD

13 59

of

1.A

1

PCIE_PRX_DTX_N139

+3VS

2

6 1

Touch@

3 4

Touch@

PCIE_PRX_DTX_P139 PCIE_PTX_C_DRX_N139 PCIE_PTX_C_DRX_P139

PCIE_PRX_DTX_N238 PCIE_PRX_DTX_P238 PCIE_PTX_C_DRX_N238 PCIE_PTX_C_DRX_P238

PCIE_PRX_DTX_N442 PCIE_PRX_DTX_P442 PCIE_PTX_C_DRX_N442 PCIE_PTX_C_DRX_P442

CLK_PCIE_CARD#39 CLK_PCIE_CARD39

CARD_CLKREQ#39

CLK_PCIE_WLAN1#38 CLK_PCIE_WLAN138

WLAN_CLKREQ1#38

CLK_PCIE_LAN#42 CLK_PCIE_LAN42

LAN_CLKREQ#42

WLAN_CLKREQ1#

PCH_GPIO20

CARD_CLKREQ#

LAN_CLKREQ#

PCH_GPIO26

PCH_GPIO44

PCH_GPIO56

PCH_GPIO45

ON_ODD_DET

ON_ODD_DET36

CLK_XDP_CLK#5 CLK_XDP_CLK5

5

1

Touch@

R143 2.2K _0402_5%

1 2

SMB_DATA_TPanel

Touch@

R167 2.2K _0402_5%

1 2

SMB_CLK_TPanel

Card Reader

Wireless LAN

A A

PCIE LAN

Card Reader

B B

Wireless LAN

PCIE LAN

+3VS

1 2

R170 10K_0402_5%R170 10K_0402_5%

1 2

R162 10K_0402_5%R162 10K_0402_5%

+3V_PCH

1 2

R177 10K_0402_5%R177 10K_0402_5%

C C

D D

1 2

R175 10K_0402_5%R175 10K_0402_5%

1 2

R181 10K_0402_5%R181 10K_0402_5%

1 2

R182 10K_0402_5%R182 10K_0402_5%

1 2

R159 10K_0402_5%R159 10K_0402_5%

1 2

R183 10K_0402_5%R183 10K_0402_5%

1 2

R184 10K_0402_5%@R184 10K_0402_5%@

PCH_SML0DATA

Q2417A 2N7002KDWH_SOT363-6

PCH_SML0CLK

Q2417B 2N7002KDWH_SOT363-6

1 2

C86 0.1U_0402_10V7KC86 0.1U_0402_10V7K

1 2

C79 0.1U_0402_10V7KC79 0.1U_0402_10V7K

1 2

C82 0.1U_0402_10V7KC82 0.1U_0402_10V7K

1 2

C83 0.1U_0402_10V7KC83 0.1U_0402_10V7K

1 2

C80 0.1U_0402_10V7KC80 0.1U_0402_10V7K

1 2

C81 0.1U_0402_10V7KC81 0.1U_0402_10V7K

1 2

R147 0_0402_5%R147 0_0402_5%

1 2

R149 0_0402_5%R149 0_0402_5%

1 2

R141 0_0402_5%R141 0_0402_5%

1 2

R142 0_0402_5%R142 0_0402_5%

1 2

R145 0_0402_5%R145 0_0402_5%

1 2

R146 0_0402_5%R146 0_0402_5%

1 2

R164 0_0402_5%R164 0_0402_5%

1 2

R165 0_0402_5%R165 0_0402_5%

+3VS

SMB_DATA_TPanel 40

+3VS

SMB_CLK_TPanel 40

PCIE_PRX_DTX_N1 PCIE_PRX_DTX_P1 PCIE_PTX_DRX_N1 PCIE_PTX_DRX_P1

PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2 PCIE_PTX_DRX_N2 PCIE_PTX_DRX_P2

PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4 PCIE_PTX_DRX_N4 PCIE_PTX_DRX_P4

Touch Panel

CLK_CARD# CLK_CARD

CARD_CLKREQ#

CLK_MINI1# CLK_MINI1

WLAN_CLKREQ1#

PCH_GPIO20

CLK_LAN# CLK_LAN

LAN_CLKREQ#

PCH_GPIO26

PCH_GPIO44

PCH_GPIO56

PCH_GPIO45

ON_ODD_DET

CLK_BCLK_ITP# CLK_BCLK_ITPCLK_BCLK_ITP

2

U3B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

PANTHER-POINT_FCBGA989

2

SMBUSController

SML1ALERT# / PCHHOT# / GPIO 74

PCI-E*

CLOCKS

P+

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1CLK / GPIO58

SML1DATA / GPIO75

P+/P-

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_DP_N CLKOUT_DP_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_SATA_N CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_OUT

XCLK_RCOMP

P-

CLKOUTFLEX0 / GPIO64

P-

CLKOUTFLEX1 / GPIO65

P-

CLKOUTFLEX2 / GPIO66

P-

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

XTAL25_IN

3

E12

PCH_GPIO11

H14

PCH_SMBCLK

C9

PCH_SMBDATA

A12

DRAMRST_CNTRL_PCH

C8

PCH_SML0CLK

G12

PCH_SML0DATA

C13

PCH_HOT#

E14

PCH_SML1CLK

M16

PCH_SML1DATA

M7

T11

P10

M10

PCH_GPIO47

AB37

CLK_PCIE_VGA#_R

AB38

CLK_PCIE_VGA_R

AV22

CLK_CPU_DMI#

AU22

CLK_CPU_DMI

AM12 AM13

BF18

CLK_BUF_CPU_DMI#

BE18

CLK_BUF_CPU_DMI

BJ30

CLKIN_DMI2#

BG30

CLKIN_DMI2

G24

CLK_BUF_DREF_96M#

E24

CLK_BUF_DREF_96M

AK7

CLK_BUF_PCIE_SATA#

AK5

CLK_BUF_PCIE_SATA

K45

CLK_BUF_ICH_14M

H45

CLK_PCI_LPBACK

V47

XTAL25_IN

V49

XTAL25_OUT

Y47

XCLK_RCOMP

K43

F47

H47

LAN_25M

K49

PCH_GPIO67

3

DIS@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

DRAMRST_CNTRL_PCH 6

1 2

R139 0_0402_5%R139 0_0402_5%

1 2

R140 0_0402_5%@R140 0_0402_5%@

DIS@

1 2

R144 0_0402_5%R144 0_0402_5%

DIS@

1 2

R151 0_0402_5%R151 0_0402_5%

1 2

R148 10K_0402_5%R148 10K_0402_5%

1 2

R150 10K_0402_5%R150 10K_0402_5%

1 2

R152 10K_0402_5%R152 10K_0402_5%

1 2

R153 10K_0402_5%R153 10K_0402_5%

1 2

R154 10K_0402_5%R154 10K_0402_5%

1 2

R155 10K_0402_5%R155 10K_0402_5%

1 2

R156 10K_0402_5%R156 10K_0402_5%

1 2

R157 10K_0402_5%R157 10K_0402_5%

1 2

R158 10K_0402_5%R158 10K_0402_5%

1 2

R160 90.9_0402_1%R160 90.9_0402_1%

1 2

R163 22_0402_5%@R163 22_0402_5%@

2012/07/01

+1.05VS_PCH

LC Future Center Secret Data

4

GPU_CLKREQA 22

CLK_PCIE_VGA# 22 CLK_PCIE_VGA 22

CLK_CPU_DMI# 5 CLK_CPU_DMI 5

CLK_PCI_LPBACK 17

+1.05VS_VCCDIFFCLKN

PCH_LAN_25M 42

PCH_GPIO67 18

Deciphered Date

4

2014/07/01

PLT_RST#17,22,38,39,40,41,42,5

5

1 2

R128 2.2K_0402_5%R128 2.2K_0402_5%

1 2

R129 2.2K_0402_5%R129 2.2K_0402_5%

1 2

R130 2.2K_0402_5%R130 2.2K_0402_5%

1 2

R131 2.2K_0402_5%R131 2.2K_0402_5%

1 2

R126 2.2K_0402_5%R126 2.2K_0402_5%

1 2

R132 2.2K_0402_5%R132 2.2K_0402_5%

1 2

R133 10K_0402_5%R133 10K_0402_5%

1 2

R135 10K_0402_5%R135 10K_0402_5%

1 2

R127 1K_0402_5%R127 1K_0402_5%

1 2

R138 10K_0402_5%R138 10K_0402_5%

R136 2.2K _0402_5%R136 2.2K_0402_5%

1 2

SMB_DATA_S3

R137 2.2K _0402_5%R137 2.2K_0402_5%

5

1 2

SMB_CLK_S3

Pull up at EC side.

EC_SMB_DA2

5

EC_SMB_CK2

R168 33_0402_5%

1 2

@

C89 22P_0402_50V8J

C89 22P_0402_50V8J @

@

PCH_SMBDATA

PCH_SMBCLK

PCH_SML1DATA

PCH_SML1CLK

PCH_SMBCLK

PCH_SMBDATA

PCH_SML0CLK

PCH_SML0DATA

PCH_SML1CLK

PCH_SML1DATA

PCH_HOT#

PCH_GPIO11

DRAMRST_CNTRL_PCH

PCH_GPIO47

+3VS

2

6 1

Q9A 2N7002KDWH_SOT363-6Q9A 2N7002KDWH_SOT 363-6

3 4

Q9B 2N7002KDWH_SOT363-6Q9B 2N7002KDWH_SOT 363-6

+3VS

2

6 1

Q10A 2N7002KDWH_SOT363-6Q10A 2N7002K DWH_SOT363-6

3 4

Q10B 2N7002KDWH_SOT363-6Q10B 2N7002K DWH_SOT363-6

CLK_BUF_ICH_14M

Reserve for EMI

XTAL25_IN

XTAL25_OUT

C87

C87 15P_0402_50V8J

15P_0402_50V8J

+3VS

12

R172

R172 10K_0402_5%

10K_0402_5% @

@

PLT_RST#

Title

PCH (2/9) PCIE, SMBUS, CLK

Size Document Number Rev

Custom

Date: Sheet

1 2

R161 1M_0402_5%R161 1M_0402_5%

Y2

Y2 25MHZ 12PF 20PPM X3G025000DC1H

25MHZ 12PF 20PPM X3G025000DC1H

1

GND

1

2

U8

1

NC

VCC

2

NC

WP

3

SCL

PROT#

4

SDA

GND

PCA24S08D_SO8

PCA24S08D_SO8 EEPROM SA00004MK00 EEPROM SA00004ML00

Saturday, November 03, 2012

GND

2

4

11/14

8 7 6

SMB_CLK_S3

5

SMB_DATA_S3

ON.B152

ON.B152ON.B152

5

3

+3V_PCH

+3VS

SMB_DATA_S3 11,12,38,39

DDR, WALN, WWAN

+3VS

SMB_CLK_S3 11,12,38,39

EC_SMB_DA2 22,39,41

EC, VGA, Theraml

EC_SMB_CK2 22,39,41

1 2

3

1

C88

C88 15P_0402_50V8J

15P_0402_50V8J

2

+3VS

ROM_WP

1

C91

0.1U_0402_16V4Z

2

14 59

of

1.A

1

DMI_CTX_PRX_N04

A A

B B

C C

DMI_CTX_PRX_N14 DMI_CTX_PRX_N24 DMI_CTX_PRX_N34

DMI_CTX_PRX_P04 DMI_CTX_PRX_P14 DMI_CTX_PRX_P24 DMI_CTX_PRX_P34

DMI_CRX_PTX_N04 DMI_CRX_PTX_N14 DMI_CRX_PTX_N24 DMI_CRX_PTX_N34

DMI_CRX_PTX_P04 DMI_CRX_PTX_P14 DMI_CRX_PTX_P24 DMI_CRX_PTX_P34

+1.05VS_VCC_EXP

XDP_DBRESET#5

PCH_PWROK41

PCH_APWROK41

PM_DRAM_PWRGD5

EC_RSMRST#41

PBTN_OUT#41,5

ACIN41,42,47

+1.05VS_PCH

1 2

R186 49.9_0402_1%R186 49.9_0402_1%

1 2

R188 750_0402_1%R188 750_0402_1%

4mil width and place within 500mil of the PCH

1 2

R193 0_0402_5%R193 0_0402_5%

PCH_PWROK

1 2

R197 0_0402_5%R197 0_0402_5%

1 2

R198 0_0402_5%@R198 0_0402_5%@

1 2

R200 0_0402_5%R200 0_0402_5%

1 2

R203 0_0402_5%R203 0_0402_5%

1 2

D3

2

T8T8

RB751V-40_SOD323-2

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

DMI_IRCOMP

RBIAS_CPY

SUSACK#_R

XDP_DBRESET#_R

SYS_PWROK

PCH_POK_R

APWROK

PM_DRAM_PWRGD

PCH_RSMRST#_R

SUSWARN#

AC_PRESENT_R

PCH_GPIO72

RI#

U3C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

P+

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/S USPWRDNACK/GPI O30

E20

H20

E10

A10

P+

PWRBTN#

ACPRESENT / GPIO31

BATLOW# / GPIO72

RI#

PANTHER-POINT_FCBGA989

3

BJ14

FDI_RXN0

AY14

FDI_RXN1

BE14

FDI_RXN2

BH13

FDI_RXN3

BC12

FDI_RXN4

BJ12

FDI_RXN5

BG10

FDI_RXN6

BG9

FDI_RXN7

BG14

FDI_RXP0

BB14

FDI_RXP1

BF14

FDI_RXP2

BG13

FDI_RXP3

BE12

FDI_RXP4

BG12

FDI_RXP5

BJ10

FDI_RXP6 FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

P-

P+

SLP_LAN# / GPIO29

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWODVREN

PCH_DPWROK_R

WAKE#

PM_CLKRUN#

SUSCLK

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

PCH_SLPA#

PM_SLP_SUS#_R

H_PM_SYNC

PCH_GPIO29

1 2

R189 0_0402_5%R189 0_0402_5%

1 2

R914 0_0402_5%R914 0_0402_5%

FDI_CTX_PRX_N0 4 FDI_CTX_PRX_N1 4 FDI_CTX_PRX_N2 4 FDI_CTX_PRX_N3 4 FDI_CTX_PRX_N4 4 FDI_CTX_PRX_N5 4 FDI_CTX_PRX_N6 4 FDI_CTX_PRX_N7 4

FDI_CTX_PRX_P0 4 FDI_CTX_PRX_P1 4 FDI_CTX_PRX_P2 4 FDI_CTX_PRX_P3 4 FDI_CTX_PRX_P4 4 FDI_CTX_PRX_P5 4 FDI_CTX_PRX_P6 4 FDI_CTX_PRX_P7 4

FDI_INT 4

FDI_FSYNC0 4

FDI_FSYNC1 4

FDI_LSYNC0 4

FDI_LSYNC1 4

PCH_RSMRST#_R

PCIE_WAKE# 42

PM_CLKRUN# 40

SUSCLK 41

T11T11

PM_SLP_S5# 41

T12T12

PM_SLP_S4# 41

T13T13

PM_SLP_S3# 41

PCH_SLPA# 41

T14T14

T15T15

H_PM_SYNC 5

4

DSWODVREN

DSWODVREN - On Die DSW VR Enable

烉

Enable

H

*

烉

Disable

L

WAKE#

PCH_GPIO29

PM_CLKRUN#

EC team suggestion South Bridge side must have pull-low 10K on this pin(GPIO32) Use CLKRUN# Requires a 8.2- k weak pull-up resistor to Vcc3_3S

Can be left NC when IAMT is not support on the platfrom

5

1 2

R185 330K_0402_5%R185 330K_0402_5%

1 2

R187 330K_0402_5%@R187 330K_0402_5%@

1 2

R192 10K_0402_5%R192 10K _0402_5%

1 2

R195 10K_0402_5%@R195 10K_0402_5%@

1 2

R196 8.2K_0402_5%R196 8.2K_0402_5%

1 2

R199 10K_0402_5%@R199 10K_0402_5%@

+RTCVCC

+3V_PCH

+3VS

1 2

R204 200_0402_5%@R204 200_0402_5%@

+3V_PCH

1 2

R305 200_0402_5%R305 200_0402_5%

1 2

R205 10K_0402_5%R205 10K_0402_5%

D D

1 2

R207 10K_0402_5%R207 10K_0402_5%

1 2

R208 10K_0402_5%R208 10K_0402_5%

1 2

R210 10K_0402_5%R210 10K_0402_5%

+3VALW

1 2

R206 200K_0402_5%R206 200K _0402_5%

1

PM_DRAM_PWRGD

SUSWARN#

PCH_GPIO72

RI#

PCH_RSMRST#_R

AC_PRESENT_R

VGATE53

2

PCH_PWROK

MC74VHC1G08DFT2G_SC70-5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

+3VS+3VS

U9

5

1

IN1

VCC

4

SYS_PWROK

OUT

2

IN2

GND

3

2012/07/01

12

R211

R211 100K_0402_5%

100K_0402_5%

SYS_PWROK 5

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

PCH (3/9) DMI,FDI,PM

Size Document Number Rev

Custom

Saturday, November 03, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

15 59

of

1.A

1

A A

ENBKL41

+3VS

B B

+3VS

1 2

C C

R218 2.2K_0402_5%R218 2.2K_0402_5%

1 2

R219 2.2K_0402_5%R219 2.2K_0402_5%

1 2

R220 150_0402_1%R220 150_0402_1%

1 2

R221 150_0402_1%R221 150_0402_1%

1 2

R222 150_0402_1%R222 150_0402_1%

CRT_DDC_CLK

CRT_DDC_DATA

DAC_BLU

DAC_GRN

DAC_RED

2

1 2

R253100K_0402_5% R253100K_0402_5%

1 2

R252 0_0402_5%R252 0_0402_5%

PCH_ENVDD32

PCH_PWM32

EDID_CLK32 EDID_DATA32

1 2

R2122.2K_0402_5% R2122. 2K_0402_5%

1 2

R2132.2K_0402_5% R2132. 2K_0402_5%

1 2

R2152.37K_0402_1% R2152.37K_0402_1%

1 2

R2170_0402_5% R2170_0402_5%

LVDS_ACLK#32 LVDS_ACLK32

LVDS_A0#32 LVDS_A1#32 LVDS_A2#32

LVDS_A032 LVDS_A132 LVDS_A232

LVDS_BCLK#32 LVDS_BCLK32

LVDS_B0#32 LVDS_B1#32 LVDS_B2#32

LVDS_B032 LVDS_B132 LVDS_B232

DAC_BLU33 DAC_GRN33 DAC_RED33

CRT_DDC_CLK33 CRT_DDC_DATA33

CRT_HSYNC33 CRT_VSYNC33

1 2

R2231.05K_0402_0.5% R2231. 05K_0402_0.5%

PCH_ENBKL

CTRL_CLK CTRL_DATA

LVDS_IBG

LVD_VREF

DAC_BLU DAC_GRN DAC_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

CRT_IREF

U3D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

PANTHER-POINT_FCBGA989

3

P-

SDVO_TVCLKINN

P-

SDVO_TVCLKINP

P-

SDVO_STALLN

P-

LVDS

CRT

SDVO_STALLP

P-

SDVO_INTN

P-

SDVO_INTP

SDVO_CTRLCLK

P-

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_CTRLCLK

P-

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

Digital Display Interface

DDPD_CTRLCLK

P-

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

DDPC_CTRLDATA

4

HDMICLK_NB 34 HDMIDAT_NB 34

PCH_DPB_HPD 34

PCH_DPB_N0 34 PCH_DPB_P0 34 PCH_DPB_N1 34 PCH_DPB_P1 34 PCH_DPB_N2 34 PCH_DPB_P2 34 PCH_DPB_N3 34 PCH_DPB_P3 34

DISP_AUXN_R 42 DISP_AUXP_R 42

DISP_HPD 42

DISP_A0N_L 42 DISP_A0P_L 42 DISP_A1N_L 42 DISP_A1P_L 42

HDMI D2

HDMI D1

HDMI D0

HDMI CLK

2.2K_0402_5%

DDPC_CTRLCLK

DDPC_CTRLDATADDPC_CTRLCLK

R2156

5

+3VS

12

R2157

2.2K_0402_5%

D D

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

PCH (4/9) LVDS,CRT, DP,HDMI

Size Document Number Rev

Custom

Saturday, November 03, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

16 59

of

1.A

1

+3VS

R225

R225 1 8 2 7 3 6 4 5

8.2K_8P4R_5%

R228

R228 1 8 2 7 3 6

A A

B B

4 5

8.2K_8P4R_5%

R227

R227 1 8 2 7 3 6 4 5

8.2K_8P4R_5%

1 2

R230 8.2K_0402_5%R230 8.2K _0402_5%

1 2

R231 8.2K_0402_5%R231 8.2K _0402_5%

1 2

R246 8.2K_0402_5%R246 8.2K _0402_5%

1 2

R357 8.2K_0402_5%R357 8.2K _0402_5%

1 2

R358 8.2K_0402_5%@R358 8.2K_0402_5%@

1 2

R244 8.2K_0402_5%@R244 8.2K_0402_5%@

1 2

R232 8.2K_0402_5%@R232 8.2K_0402_5%@

1 2

R234 100K_0402_5%@R234 100K_0402_5%@

1 2

R243 1K_0402_5%@R243 1K_0402_5%@

Boot BIOS Strap bit1 BBS1

Bit11

1 2

R245 1K_0402_5%@R245 1K_0402_5%@

A16 swap overide Strap/Top-Block

C C

Swap Override jumper

PCI_GNT3#

Low=A16 swap override/Top-Block Swap Override enabled High=Default

RF Boris Tsai suggests

0

1

0

GPIO19GPIO51

1 2

Bit10

1

0

1

0

PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCI_PIRQA#

PCH_GPIO52 PCH_GPIO5 PCH_GPIO51 PCH_GPIO53

ODD_DA#

PCH_GPIO2

PCH_GPIO55

PCH_GPIO50

PCH_GPIO54

PCH_GPIO4

PCH_GPIO54

PCH_GPIO50

PCH_PLTRST#

PCH_GPIO51

Boot BIOS Destination

*

PCH_GPIO55

*

CLK_PCI_TPM

C11910P_0402_50V8J C11910P_0402_50V8J

CLK_PCI_LPBACK

C9210P_0402_50V8J @ C9210P_0402_50V8J @

CLK_PCI_EC

C9310P_0402_50V8J C9310P_0402_50V8J

Reserved

PCI

(Default)

SPI

LPC

USB3_RX0_N37

USB3_RX2_N37 USB3_RX3_N42

USB3_RX0_P37

USB3_RX2_P37 USB3_RX3_P42 USB3_TX0_N37

USB3_TX2_N37 USB3_TX3_N42 USB3_TX0_P37

USB3_TX2_P37 USB3_TX3_P42

DGPU_HOLD_RST#22 NVDD_PWR_EN52 DGPU_PWR_EN22,31

BT_DET#38 ODD_DA#36 DGPU_GC6_EN31

PCI_PME#41

PCH_PLTRST#5

CLK_PCI_LPBACK14 CLK_PCI_EC41 CLK_PCI_DB38,40 CLK_PCI_TPM40

Port1

Port2

Port3

Port4

1 2

R190 0_0402_5%@R190 0_0402_5%@

2

USB3.0

CLK_PCI_EC

USB 3.0

USB 3.0+DP

DIS@ DIS@ DIS@

1 2

R254 0_0402_5%R254 0_0402_5%

1 2

R348 0_0402_5%R348 0_0402_5%

1 2

R264 0_0402_5%R264 0_0402_5%

PCH_GPIO52PCH_GPIO54

1 2

R332 0_0402_5%R332 0_0402_5%

1 2

R356 0_0402_5%@R356 0_0402_5%@

1 2

R248 22_0402_5%R248 22_0402_5%

1 2

R249 22_0402_5%R249 22_0402_5%

1 2

R250 22_0402_5%R250 22_0402_5%

1 2

R350 22_0402_5%

TPM@

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

PCH_GPIO50 PCH_GPIO52 PCH_GPIO54

PCH_GPIO51 PCH_GPIO53 PCH_GPIO55

PCH_GPIO2 ODD_DA# PCH_GPIO4 PCH_GPIO5

PCH_PLTRST#

CLK_PCI0 CLK_PCI1 CLK_PCI2 CLK_PCI3

U3E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

USB3Rn1

BC30

USB3Rn2

BE32

USB3Rn3

BJ32

USB3Rn4

BC28

USB3Rp1

BE30

USB3Rp2

BF32

USB3Rp3

BG32

USB3Rp4

AV26

USB3Tn1

BB26

USB3Tn2

AU28

USB3Tn3

AY30

USB3Tn4

AU26

USB3Tp1

AY26

USB3Tp2

AV28

USB3Tp3

AW30

USB3Tp4

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

PANTHER-POINT_FCBGA989

PCH_PLTRST#

TC7SH08FUF_SSOP5

3

RSVD

P-

PCI

USB

P+ P+ P+

P+

PPPPP-

1 2

R251 0_0402_5%R251 0_0402_5%

+3VS

5

U11

1

P

B

Y

2

A

G

@

3

4

RSVD1 RSVD2 RSVD3 RSVD4

RSVD5 RSVD6

RSVD7 RSVD8

RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22

RSVD23 RSVD24

RSVD25

RSVD26 RSVD27

RSVD28 RSVD29

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

12

R255

R255 100K_0402_5%

100K_0402_5%

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

AV5 AV10

AT8

AY5 BA2

AT12 BF3

PCH HM65 config not support USB por t 6 & 7.

C24

USB20_N0

A24

USB20_P0 C25 B25 C26

USB20_N2 A26

USB20_P2 K28

USB20_N3 H28

USB20_P3 E28

USB20_N4 D28

USB20_P4 C28 A28 C29 B29 N28 M28 L30 K30 G30

USB20_N9 E30

USB20_P9 C30

USB20_N10 A30

USB20_P10 L32

USB20_N11 K32

USB20_P11 G32

USB20_N12 E32

USB20_P12 C32

USB20_N13 A32

USB20_P13

C33

USBRBIAS

R247 22.6_0402_1%R247 22.6_0402_1%

B33

A14

USB_OC0# K20

USB_OC1# B17

USB_OC2# C16

USB_OC3# L16

USB_OC4# A16

USB_OC5# D14

USB_OC6# C14

USB_OC7#

PLT_RST# 14,22,38,39,40,41,42,5

USB20_N0 37 USB20_P0 37

USB20_N2 37 USB20_P2 37 USB20_N3 42 USB20_P3 42 USB20_N4 40 USB20_P4 40

USB20_N9 39 USB20_P9 39 USB20_N10 38 USB20_P10 38 USB20_N11 40 USB20_P11 40 USB20_N12 38 USB20_P12 38 USB20_N13 32 USB20_P13 32

Within 500 mils

1 2

USB_OC0# 39 USB_OC1# 37

4

USB 3.0

USB 3.0+DP

Touch Panel

USB 2.0

Mini Card(WLAN/BT)

FingerPrint

Mini Card(WWAN)

CMOS Camera (LVDS)

(To USB S/B)

OC[0..3] use for EHCI 1 OC[4..7] use for EHCI 2

USB_OC0# USB_OC1# USB_OC2# USB_OC3#

USB_OC4# USB_OC5# USB_OC6# USB_OC7#

R233

R233 1 8 2 7 3 6 4 5

10K_8P4R_5%

R235

R235 1 8 2 7 3 6 4 5

10K_8P4R_5%

5

+3V_PCH

D D

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

PCH (5/9) PCI, USB, NVRAM

Size Document Number Rev

Custom

Saturday, November 03, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

17 59

of

1.A

GPIO28

On-Die PLL Voltage Regulator This signal has a weak internal pull up

烉

On-Die voltage regulator enable

H

*

L烉On-Die PLL Voltage Regulator disable

1 2

R265 1K_0402_5%@R265 1K_0402_5%@

1 2

A A

B B

C C

R274 1K_0402_5%@R274 1K_0402_5%@

+3VS

1 2

R280 10K_0402_5%R280 10K _0402_5%

1 2

R282 10K_0402_5%@R282 10K_0402_5%@

+3V_PCH

1 2

R288 10K_0402_5%R288 10K_0402_5%

1 2

R290 10K_0402_5%@R290 10K_0402_5%@

+3VS

1 2

R285 10K_0402_5%@R285 10K_0402_5%@

1 2

R284 10K_0402_5%R284 10K_0402_5%

+3VS

1 2

R269 10K_0402_5%R269 10K_0402_5%

1 2

R270 10K_0402_5%R270 10K_0402_5%

1 2

R266 10K_0402_5%R266 10K_0402_5%

1 2

R344 10K_0402_5%R344 10K_0402_5%

1 2

R275 10K_0402_5%R275 10K_0402_5%

1 2

R268 10K_0402_5%R268 10K_0402_5%

1 2

R277 10K_0402_5%R277 10K_0402_5%

1 2

R346 10K_0402_5%R346 10K_0402_5%

1 2

R283 10K_0402_5%R283 10K_0402_5%

1 2

R287 10K_0402_5%R287 10K_0402_5%

1 2

R289 10K_0402_5%R289 10K_0402_5%

1 2

R291 10K_0402_5%R291 10K_0402_5%

+3V_PCH

1 2

R345 10K_0402_5%R345 10K_0402_5%

1 2

R271 10K_0402_5%R271 10K_0402_5%

1 2

R273 1K_0402_5%R273 1K_0402_5%

1 2

R347 10K_0402_5%R347 10K_0402_5%

1 2

R292 10K_0402_5%@R292 10K_0402_5%@

1 2

R352 10K_0402_5%R352 10K_0402_5%

1

PCH_GPIO28

EC_SMI#

WLBT_OFF_51#

PCH_GPIO24

PCH_GPIO37

PCH_GPIO0

PCH_GPIO1

PCH_GPIO6

EC_SCI#

PCH_GPIO16

DGPU_PWROK

PCH_GPIO22

PCH_GPIO34

3G_DET#

3G_OFF#

GPS_OFF#

PCH_GPIO49

EC_SMI#

PCH_GPIO12

PCH_GPIO15

PCH_GPIO28

PCH_GPIO57

PCH_GPIO27

GPIO34

For GC6

FN_LED#39

F1_LED#39

EC_SCI#41

EC_SMI#41

EC_WAKE#41

DGPU_PWROK31,52

F4_LED#39

mSATA_PCH38

3G_DET#38

WLBT_OFF_51#38

3G_OFF#38

GPS_OFF#38

For Edge code setting

PCH_GPIO69

PCH_GPIO38 PCH_GPIO67

Function

2

1 2

R359 0_0402_5%R359 0_0402_5%

1 2

R360 0_0402_5%R360 0_0402_5%

1 2

R178 0_0402_5%R178 0_0402_5%

1 2

R361 0_0402_5%R361 0_0402_5%

1 2

R293 0_0402_5%R293 0_0402_5%

PCH_GPIO0

PCH_GPIO1

PCH_GPIO6

EC_SCI#

EC_SMI#

PCH_GPIO12

PCH_GPIO15

PCH_GPIO16

DGPU_PWROK

PCH_GPIO22

PCH_GPIO24

PCH_GPIO27

PCH_GPIO28

PCH_GPIO34

3G_DET#

WLBT_OFF_51#

PCH_GPIO37

PCH_GPIO38

3G_OFF#

GPS_OFF#

PCH_GPIO49

PCH_GPIO57

T22T22

T24T24

T26

T28

T30T30

T32T32

T34T34

T36

T38T38

T40T40

T42T42

T44T44

T46T46

T48T48

U3F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

P+

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

P-

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24

E16

P+

GPIO27

P8

P+

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49 / TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

PANTHER-POINT_FCBGA989

3

C40

RCIN#

PECI

NC_1

B41

C41

A40

P4

AU16

P5

AY11

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

ODD_EN#

PCH_GPIO69

PCH_GPIO70

CMOS_ON#

1 2

T18T18

T19T19

T20T20

T21T21

T23T23

T25T25

T27T27

T29T29

T31T31

T33T33

T35T35

T39T39

T43T43

T47T47

1 2

R307 0_0402_5%@R307 0_0402_5%@

PCH_PECI_R

KB_RST#

H_CPUPWRGD

R278 390_0402_5%R278 390_0402_5%

DF_TVS

T37

T41

T45

T49

INIT3_3V

This signal has weak internal PU, can't pull low

Intel schematic reviwe recommand.

P+

GPIO

P+

NCTF

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

A20GATE

P-

PROCPWRGD

THRMTRIP#

P+

INIT3_3V#

P-

DF_TVS

CPU/MISC

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

P+

P-

CMOS_ON# 32

H_THRMTRIP#

4

ODD_EN# 36

GATEA20 41

H_PECI 41,5

KB_RST# 41

H_CPUPWRGD 5

H_THRMTRIP# 5 VGA_THRMTRIP# 22

5

ODD_EN#

PCH_GPIO70

CMOS_ON#

GATEA20

KB_RST#

DF_TVS

R229 1K_0402_5%R229 1K_0402_5%

NV_CLE

CLOSE TO THE BRANCHING POINT

1 2

R256 8.2K_0402_5%R256 8.2K _0402_5%

1 2

R260 8.2K_0402_5%@R260 8.2K_0402_5%@

R258 10K_0402_5%R258 10K_0402_5%

1 2

R262 10K_0402_5%@R262 10K_0402_5%@

R257 10K_0402_5%R257 10K_0402_5%

1 2

R263 10K_0402_5%@R263 10K_0402_5%@

1 2

R272 10K_0402_5%R272 10K_0402_5%

1 2

R276 10K_0402_5%R276 10K_0402_5%

1 2

DMI Termination Voltage

Set to Vcc when HIGH

Set to Vss when LOW

12

+1.8VS

12

R226

2.2K_0402_5%

+3VS

H_SNB_IVB# 5

0

12

R259

R259 10K_0402_5%

D D

10K_0402_5% @

@

12

R261

R261 10K_0402_5%

10K_0402_5%

0

01

1

0

11

+3VS

12

R330

R330 10K_0402_5%

10K_0402_5% UMA@

UMA@

12

R329

R329 10K_0402_5%

10K_0402_5% DIS@

DIS@

12

R311

R311 10K_0402_5%

10K_0402_5% UMA@

UMA@

12

R286

R286 10K_0402_5%

10K_0402_5% DIS@

DIS@

1

PCH_GPIO69 PCH_GPIO38 PCH_GPIO67

Optimus

Reserved

DIS

UMA

PCH_GPIO67 14

(MB_ID_2) (MB_ID_1) (MB_ID_0)

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

PCH (6/9) GPIO, CPU, MISC

Size Document Number Rev

Custom

Saturday, November 03, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

18 59

of

1.A

1

A A

B B

+1.05VS

JP2

1 2

PAD-OPEN 4x4m

+1.05VS_VCCDPLLEXP

+1.05VS_VCC_EXP

+1.05VS_PCH

C97

C95

+1.05VS_PCH

This pin can be left as no connect in On-Die VR enabled mode (default ).

+1.05VS_PCH

C105

+3VS

1

C112

0.1U_0402_10V7K

2

C97

10U_0603_6.3V6M

C96

1U_0402_6.3V6K

C96

1U_0402_6.3V6K

1

2

1

2

1

2

+VCCAPLLEXP

T50T50

C106

1U_0402_6.3V6K

C106

1U_0402_6.3V6K

10U_0603_6.3V6M

C107

1

2

Place C167 Near BG6 pin

1

C114

@C114

C C

@

1U_0402_6.3V6K

2

1U_0402_6.3V6K

C98

1U_0402_6.3V6K

C98

1U_0402_6.3V6K

1

2

+1.05VS_PCH

C108

1U_0402_6.3V6K

C108

1U_0402_6.3V6K

1

2

+VCCAFDI_VRM

+1.05VS_VCCAPLL_FDI

+1.05VS_PCH

+1.05VS_VCCDPLL_FDI +VCCP_VCCDMI

C109

2

POWER

1300mA

VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15] VCCCORE[16] VCCCORE[17]

VCCIO[28]

VCCAPLLEXP

VCCIO[15]

VCCIO[16]

VCCIO[17]

VCCIO[18]

VCCIO[19]

VCCIO[20]

VCCIO[21]

VCCIO[22]

VCCIO[23]

VCCIO[24]

VCCIO[25]

VCCIO[26]

VCC3_3[3]

VCCVRM[2]

VccAFDIPLL

VCCIO[27]

VCCDMI[2]

POWER

3709mA

CRTLVDS

VCC CORE

40mA

DMI

VCCIO

2mA

DFT / SPI HVCMOS

FDI

1mA

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCTX_LVDS[3]

VCCTX_LVDS[4]

75mA

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

10mA

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCSPI

U3G

AA23 AC23 AD21 AD23

AF21

AF23 AG21 AG23 AG24 AG26 AG27 AG29

AJ23

AJ26

AJ27

AJ29

AJ31

AN19

BJ22

AN16

AN17

AN21

AN26

1U_0402_6.3V6K

1

2

AN27

AP21

AP23

AP24

AP26

AT24

AN33

AN34

BH29

AP16

BG6

AP17

AU20

PANTHER-POINT_FCBGA989

U48

U47

AK36

AK37

AM37

AM38

AP36

AP37

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

3

+VCCADAC

+VCCAFDI_VRM

+VCCPNAND

+3V_VCCPSPI

+VCCTX_LVDS

C94

1

2

C101

1

2

1

C104

0.1U_0402_10V7K

2

1

C111

C111 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+VCCPNAND

1

C113

C113 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3V_VCCPSPI

1

C115

C115 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1U_0402_16V7K

C99

0.1U_0402_10V7K

C99

0.1U_0402_10V7K

1

2

C102

0.01U_0402_16V7K

C102

0.01U_0402_16V7K

1

2

+VCCAFDI_VRM

+1.05VS

R300 0_0805_5%R300 0_0805_5%

R166 0_0402_5%SBA@R166 0_0402_5%SBA@

R302 0_0402_5%@R302 0_0402_5%@

C160

C100

10U_0603_6.3V6M

C100

10U_0603_6.3V6M

1

2

+3VS

0.1uH inductor, 200mA

C103

22U_0805_6.3V6M

C103

22U_0805_6.3V6M

1

2

+3VS

1 2

10U_0603_6.3V6M

1 2

+1.05VS_PCH

1

2

+1.8VS

+3VM

11/16

4

1 2

1 ohm 0603L11 ohm 0603

L20.1UH_MLF1608DR10KT_10%_1608 L20.1UH_M LF1608DR10KT_10%_1608

+VCCP_VCCDMI

C110

C110 1U_0402_6.3V6K

1U_0402_6.3V6K

+3VS

+3VS+VCCADAC

L1

+1.8VS

5

+1.5VS +VCCAFDI_VRM

1 2

R304 0_0603_5%R304 0_0603_5%

D D

1

VCCVRM==>1.5V FOR MOBILE VCCVRM==>1.8V FOR DESKTOP VCCVRM = 160mA detal waiting for newest spec

2

+VCCAFDI_VRM

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

PCH (7/9) PWR

Size Document Number Rev

Custom

Saturday, November 03, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

19 59

of

1.A

1

+3VALW

1 2

R308 0_0603_5%R308 0_0603_5%

A A

+3VS

C117

1U_0402_6.3V6K

C117

C116

10U_0603_6.3V6M

C116

10U_0603_6.3V6M

1

2

B B

C C

D D

if not supply SBA R316 mount , R349 @ if supply SBA R316 @,R349 mount

1U_0402_6.3V6K

1

2

+1.05VS

1 2

R316 0_0805_5%

+1.05VM

1 2

R349 0_0805_5%

+1.05VS_PCH

+1.05VS

Ensure independent power routing for SSC and DIFFCLKN

1

R328 0_0603_5%R328 0_0603_5%

If platform does not support Deep S4/S5 then tie to VccSus3_3.

+3VS

+1.05VS_PCH

+VCCDPLL_CPY

@

SBA@

L4

1 2

10UH_LB2012T100MR_20%

L5

1 2

10UH_LB2012T100MR_20%

1 2

220U_B2_2.5VM_R35

+V_CPU_IO

C136

C138

+1.05VS_VCCA_A_DPL

1

+

2

+1.05VS_VCCA_B_DPL

1

+

2

1

C144

C144 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C146

C146 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C149

C149 1U_0402_6.3V6K

1U_0402_6.3V6K

2

0.1U_0402_10V7K

+1.05VS_PCH

2

Have internal VRM

C121

C123

C124

C127

1U_0402_6.3V6K

C127

1U_0402_6.3V6K

C128

1U_0402_6.3V6K

C128

1U_0402_6.3V6K

1

2

C137

1

1U_0402_6.3V6K

2

C139

1

1U_0402_6.3V6K

2

C150

C153

0.1U_0402_10V7K

C153

0.1U_0402_10V7K

C152

4.7U_0603_6.3V6K

C152

4.7U_0603_6.3V6K

1

2

1 2

@C121

@

0.1U_0402_10V7K

@C123

@

10U_0603_6.3V6M

1 2

@C124

@

1U_0402_6.3V6K

C129

1U_0402_6.3V6K

C129

1U_0402_6.3V6K

1

2

+VCCAFDI_VRM

2

1

C154

0.1U_0402_10V7K

C154

0.1U_0402_10V7K

1

2

1

0.1U_0402_10V7K

2

12

+1.05VM_VCCASW

C130

22U_0805_6.3V6M

C130

22U_0805_6.3V6M

1

2

1 2

C143

0.1U_0402_10V7K

+VCCAFDI_VRM

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

+1.05VS_PCH

+1.05VS_SSCVCC

+VCCSST

+1.05VM_VCCSUS

1

C151

C151 1U_0402_6.3V6K

1U_0402_6.3V6K

2

@

+1.05VS_PCH

+RTCVCC

C155

1

2

+VCCPDSW

C118

+PCH_VCCDSW

+VCCAPLL_CPY_PCH

+VCCSUS1

C131

22U_0805_6.3V6M

C131

22U_0805_6.3V6M

1

2

+VCCRTCEXT

1U_0402_6.3V6K

C157

C156

0.1U_0402_10V7K

C156

0.1U_0402_10V7K

1

2

0.1U_0402_10V7K

1

2

U3J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCDIFFCLKN[1]

AF34

VCCDIFFCLKN[2]

AG34

VCCDIFFCLKN[3]

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

VCCRTC

PANTHER-POINT_FCBGA989

3

POWER

3mA

VCCSUS3_3[7]

119mA

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

903mA

1mA

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

1mA

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

Clock and Miscellaneous

PCI/GPIO/LPCMISC

75mA

SATA USB

VCCAPLLSATA

VCCVRM[1]

55mA

95mA

VCCASW[22]

10mA

HDA

VCCASW[23]

VCCASW[21]

VCCSUSHDA

3

1mA

CPURTC

4

+1.05VS_PCH

N26

VCCIO[29]

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCIO[34]

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCIO[2]

VCCIO[3]

VCCIO[4]

+1.05VS_PCH

P26

P28

T27

T29

T23

T24

V23

V24

P24

T26

+1.05VS_PCH

M26

+PCH_V5REF_SUS

AN23

+VCCA_USBSUS

AN24

+3V_PCH

P34

+PCH_V5REF_RUN

V5REF

N20

+3V_PCH

N22

P20

P22

AA16

W16

0.1U_0402_10V7K

T34

AJ2

AF13

AH13

AH14

Place C199 Near AK1 pin

+VCCSATAPLL

AF14

AK1

AF11

+VCCAFDI_VRM

AC16

AC17

AD17

T21

V21

T19

P32

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

1

2

1

2

1

2

1

2

1

C141

2

1

2

1

C147

C147 10U_0603_6.3V6M

10U_0603_6.3V6M @

@

2

2012/07/01

C122

0.1U_0402_10V7K

C125

0.1U_0402_10V7K

C132

@C132

@

1U_0402_6.3V6K

C133

0.1U_0402_10V7K

C134

C134 1U_0402_6.3V6K

1U_0402_6.3V6K

1

C140

0.1U_0402_10V7K

2

C142

0.1U_0402_10V7K

+VCCAFDI_VRM

+1.05VS_VCC_SATA

+1.05VM_VCCASW

LC Future Center Secret Data

Deciphered Date

1U_0402_6.3V6K

11/16

+3V_PCH

C145

+3V_PCH

4

11/16

+1.05VS_PCH

11/16

+1.05VS_PCH

1

C158

0.1U_0402_16V4Z

2

1

C120

C120 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VS_VCCUSBCORE

+1.05VS_VCCAUPLL

+3VS

+1.05VS_SATA3

1

2

1

C148

C148 1U_0402_6.3V6K

1U_0402_6.3V6K

2

2014/07/01

5

VCC3_3 = 266mA detal waiting for newest spec

VCCDMI = 42mA detal waiting for newest spec

+5VALW_PCH+5VALW

1 2

R309 0_0603_5%R309 0_0603_5%

+3V_PCH +5VALW_PCH

12

D4

R315

RB751V-40_SOD323-2

+PCH_V5REF_SUS

C126

0.1U_0402_10V7K

RB751V-40_SOD323-2

+PCH_V5REF_RUN

C135

1U_0402_6.3V6K

Title

PCH (8/9) PWR

Size Document Number Rev

Custom

Saturday, November 03, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

1 2

1

2

+3VS +5VS

D5

1 2

1

2

R315 10_0402_5%

10_0402_5%

12

R318

R318 10_0402_5%

10_0402_5%

20 59

of

1.A

1

A A

B B

C C

U3H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

PANTHER-POINT_FCBGA989

2

AK38

VSS[80]

AK4

VSS[81]

AK42

VSS[82]

AK46

VSS[83]

AK8

VSS[84]

AL16

VSS[85]

AL17

VSS[86]

AL19

VSS[87]

AL2

VSS[88]

AL21

VSS[89]

AL23

VSS[90]

AL26

VSS[91]

AL27

VSS[92]

AL31

VSS[93]

AL33

VSS[94]

AL34

VSS[95]

AL48

VSS[96]

AM11

VSS[97]

AM14

VSS[98]

AM36

VSS[99]

AM39

VSS[100]

AM43

VSS[101]

AM45

VSS[102]

AM46

VSS[103]

AM7

VSS[104]

AN2

VSS[105]

AN29

VSS[106]

AN3

VSS[107]

AN31

VSS[108]

AP12

VSS[109]

AP19

VSS[110]

AP28

VSS[111]

AP30

VSS[112]

AP32

VSS[113]

AP38

VSS[114]

AP4

VSS[115]

AP42

VSS[116]

AP46

VSS[117]

AP8

VSS[118]

AR2

VSS[119]

AR48

VSS[120]

AT11

VSS[121]

AT13

VSS[122]

AT18

VSS[123]

AT22

VSS[124]

AT26

VSS[125]

AT28

VSS[126]

AT30

VSS[127]

AT32

VSS[128]

AT34

VSS[129]

AT39

VSS[130]

AT42

VSS[131]

AT46

VSS[132]

AT7

VSS[133]

AU24

VSS[134]

AU30

VSS[135]

AV16

VSS[136]

AV20

VSS[137]

AV24

VSS[138]

AV30

VSS[139]

AV38

VSS[140]

AV4

VSS[141]

AV43

VSS[142]

AV8

VSS[143]

AW14

VSS[144]

AW18

VSS[145]

AW2

VSS[146]

AW22

VSS[147]

AW26

VSS[148]

AW28

VSS[149]

AW32

VSS[150]

AW34

VSS[151]

AW36

VSS[152]

AW40

VSS[153]

AW48

VSS[154]

AV11

VSS[155]

AY12

VSS[156]

AY22

VSS[157]

AY28

VSS[158]

3

U3I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

PANTHER-POINT_FCBGA989

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]

4

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

5

D D

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

PCH (9/9) VSS

Size Document Number Rev

Custom

Saturday, November 03, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

21 59

of

1.A

1

C1401 0.22U_0402_10V6KDIS@C1401 0.22U_0402_10V 6KDIS@ C1402 0.22U_0402_10V6KDIS@C1402 0.22U_0402_10V6KDIS@ C1403 0.22U_0402_10V6KDIS@C1403 0.22U_0402_10V 6KDIS@ C1404 0.22U_0402_10V6KDIS@C1404 0.22U_0402_10V6KDIS@ C1405 0.22U_0402_10V6KDIS@C1405 0.22U_0402_10V 6KDIS@ C1406 0.22U_0402_10V6KDIS@C1406 0.22U_0402_10V6KDIS@ C1407 0.22U_0402_10V6KDIS@C1407 0.22U_0402_10V 6KDIS@ C1409 0.22U_0402_10V6KDIS@C1409 0.22U_0402_10V6KDIS@ C1410 0.22U_0402_10V6KDIS@C1410 0.22U_0402_10V 6KDIS@ C1411 0.22U_0402_10V6KDIS@C1411 0.22U_0402_10V6KDIS@ C1412 0.22U_0402_10V6KDIS@C1412 0.22U_0402_10V 6KDIS@ C1413 0.22U_0402_10V6KDIS@C1413 0.22U_0402_10V6KDIS@ C1414 0.22U_0402_10V6KDIS@C1414 0.22U_0402_10V 6KDIS@ C1415 0.22U_0402_10V6KDIS@C1415 0.22U_0402_10V6KDIS@ C1416 0.22U_0402_10V6KDIS@C1416 0.22U_0402_10V 6KDIS@ C1417 0.22U_0402_10V6KDIS@C1417 0.22U_0402_10V 6KDIS@

0.1U_0402_16V4Z

11/17

C2108

@

1

PCIE_CTX_GRX_N[0..7]

PCIE_CTX_GRX_P[0..7]

PCIE_CRX_GTX_N[0..7]

PCIE_CRX_GTX_P[0..7]

DIS@

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

CLK_PCIE_VGA14 CLK_PCIE_VGA#14

R1432 200_0402_1%

R1434 2.49K_0402_1%DIS@R1434 2.49K_0402_1%DIS@

R1444

1 2

C2154

@

1

2

1 2

@

1 2

10K_0402_5%

10K_0402_5% DIS@

DIS@

1

2

1 3

Q2414

Q2414 2N7002K_SOT23-3

2N7002K_SOT23-3

1 2

R1447 0_0402_5%

2

D

DIS@

@

PCIE_CTX_GRX_P0 PCIE_CTX_GRX_N0 PCIE_CTX_GRX_P1 PCIE_CTX_GRX_N1 PCIE_CTX_GRX_P2 PCIE_CTX_GRX_N2 PCIE_CTX_GRX_P3 PCIE_CTX_GRX_N3 PCIE_CTX_GRX_P4 PCIE_CTX_GRX_N4 PCIE_CTX_GRX_P5 PCIE_CTX_GRX_N5 PCIE_CTX_GRX_P6 PCIE_CTX_GRX_N6 PCIE_CTX_GRX_P7 PCIE_CTX_GRX_N7

PCIE_CRX_C_GTX_P0 PCIE_CRX_C_GTX_N0 PCIE_CRX_C_GTX_P1 PCIE_CRX_C_GTX_N1 PCIE_CRX_C_GTX_P2 PCIE_CRX_C_GTX_N2 PCIE_CRX_C_GTX_P3 PCIE_CRX_C_GTX_N3 PCIE_CRX_C_GTX_P4

PCIE_CRX_C_GTX_P5 PCIE_CRX_C_GTX_N5 PCIE_CRX_C_GTX_P6 PCIE_CRX_C_GTX_N6 PCIE_CRX_C_GTX_P7PCIE_CRX_GTX_P7 PCIE_CRX_C_GTX_N7

CLK_PCIE_VGA CLK_PCIE_VGA# CLK_REQ_GPU#

PEX_TSTCLK_OUT PEX_TSTCLK_OUT#

PLT_RST_VGA# PEX_TERMP

G

S

+3VS_VGA

12

R1445

R1445 10K_0402_5%

10K_0402_5% DIS@

DIS@

CLK_REQ_GPU#

12

R1446

R1446 10K_0402_5%

10K_0402_5% @

@

DGPU_HOLD_RST#17

AG6 AG7 AF7 AE7 AE9 AF9 AG9

AG10

AF10 AE10 AE12

AF12 AG12 AG13

AF13 AE13 AE15

AF15 AG15 AG16

AF16 AE16 AE18

AF18 AG18 AG19

AF19 AE19 AE21

AF21 AG21 AG22

AC9

AB9 AB10 AC10 AD11 AC11 AC12 AB12 AB13 AC13 AD14 AC14 AC15 AB15 AB16 AC16 AD17 AC17 AC18 AB18 AB19 AC19 AD20 AC20 AC21 AB21 AD23 AE23

AF24 AE24 AG24 AG25

AE8 AD8 AC6

AF22 AE22

AC7

AF25

PLT_RST#14,17,38,39,40,41,42,5

PEX_RX0 PEX_RX0_N PEX_RX1 PEX_RX1_N PEX_RX2 PEX_RX2_N PEX_RX3 PEX_RX3_N PEX_RX4 PEX_RX4_N PEX_RX5 PEX_RX5_N PEX_RX6 PEX_RX6_N PEX_RX7 PEX_RX7_N NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC

PEX_TX0 PEX_TX0_N PEX_TX1 PEX_TX1_N PEX_TX2 PEX_TX2_N PEX_TX3 PEX_TX3_N PEX_TX4 PEX_TX4_N PEX_TX5 PEX_TX5_N PEX_TX6 PEX_TX6_N PEX_TX7 PEX_TX7_N NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC

PEX_REFCLK PEX_REFCLK_N PEX_CLKREQ_N

PEX_TSTCLK_OUT PEX_TSTCLK_OUT_N

PEX_RST_N PEX_TERMP

N14P-GV2-S-A2_FCB GA595

N14PGV2@

SA00005NC00

PCIE_CTX_GRX_N[0..7]4

PCIE_CTX_GRX_P[0..7]4

PCIE_CRX_GTX_N[0..7]4

PCIE_CRX_GTX_P[0..7]4

A A

PCIE_CRX_GTX_P0 PCIE_CRX_GTX_N0 PCIE_CRX_GTX_P1 PCIE_CRX_GTX_N1 PCIE_CRX_GTX_P2 PCIE_CRX_GTX_N2 PCIE_CRX_GTX_P3 PCIE_CRX_GTX_N3 PCIE_CRX_GTX_P4

B B

PCIE_CRX_GTX_N4 PCIE_CRX_C_GTX_N4 PCIE_CRX_GTX_P5 PCIE_CRX_GTX_N5 PCIE_CRX_GTX_P6 PCIE_CRX_GTX_N6

PCIE_CRX_GTX_N7

Differential signal

C C

DGPU_PWR_EN17,22,31

GPU_CLKREQA14

0.1U_0402_16V4Z

D D

U1401A

2

Part 1 of 6

PCI EXPRESS

1 2

R1437

0_0402_5%@

PLT_RST#

DGPU_HOLD_RST#

TC7SH08FUF_SSOP5

2

C6

GPIO0

B2

GPIO1

D6

GPIO2

C7

GPIO3

F9

GPIO4

A3

GPIO5

A4

GPIO6

B6

GPIO7

A6

GPIO8

F8

GPIO9

C5

GPIO10

E7

GPIO11

D7

GPIO12

B4

GPIO13

B3

GPIO14

C3

GPIO15

D5

GPIO16

D4

GPIO17

C2

GPIO18

F7

GPIO19

E6

GPIO20

C4

GPIO21

AB6

NC

AG3

DACA_RED

AF4

DACA_GREEN

AF3

DACA_BLUE

AE3

DACA_HSYNC

AE4

DACA_VSYNC

DACsI2C GPIO

CORE_PLLVDD

CLK

XTAL_OUTBUFF

N14M-GL-S-A2_FCBGA595

1

2

DIS@

W5

DACA_VDD

AE2

DACA_VREF

AF2

DACA_RSET

B7

I2CA_SCL

A7

I2CA_SDA

C9

I2CB_SCL

C8

I2CB_SDA

A9

I2CC_SCL

B9

I2CC_SDA

D9

I2CS_SCL

D8

I2CS_SDA

L6 M6

SP_PLLVDD

N6

VID_PLLVDD

C11

XTAL_IN

B10

XTAL_OUT

A10

XTAL_SSIN

C10

U1401

N14MGL@

N14MGL@ SA00005N900

SA00005N900

+3VS_VGA +3VS_VGA

5

U1402

P

B

4

Y

A

G

3

FB_CLAMP_MON

VGA_BL_PWM VGA_ENVDD VGA_ENBKL

FB_CLAMP_TGL_REQ# VGA_GPIO7 OVERT# THERM#_VGA VGA_GPIO10 NVVDD_PWM_VID VGA_GPIO12 VGA_GPIO13

I2CA_SCL I2CA_SDA

I2CB_SCL I2CB_SDA

I2CC_SCL I2CC_SDA

I2CS_SCL I2CS_SDA

52mA

+PLLVDD

71mA

41mA

XTALIN XTAL_OUT

XTALSSIN XTALOUT

1 2

0_0402_5%

1 2

R1448 10K_0402_5%@R1448 10K_0402_5%@

1 2

R1452 2.2K_0402_5%DIS@R1452 2.2K_0402_5%DIS@

1 2

R1460 2.2K_0402_5%DIS@R1460 2.2K_0402_5%DIS@

1 2

R1406 2.2K_0402_5%DIS@R1406 2.2K_0402_5%DIS@

1 2

R1407 2.2K_0402_5%DIS@R1407 2.2K_0402_5%DIS@

1 2

R1402 2.2K_0402_5%DIS@R1402 2.2K_0402_5%DIS@

1 2

R1403 2.2K_0402_5%DIS@R1403 2.2K_0402_5%DIS@

1 2

R1404 2.2K_0402_5%DIS@R1404 2.2K_0402_5%DIS@

1 2

R1405 2.2K_0402_5%DIS@R1405 2.2K_0402_5%DIS@

1 2

R1428 0_0402_5%@R1428 0_0402_5%@

1 2

R1435 10K_0402_5%DIS@R1435 10K_0402_5%DIS@

1 2

R1433 10K_0402_5%DIS@R1433 10K_0402_5%DIS@

R1430

DIS@

Internal Thermal Sensor

12

R1438

R1438 10K_0402_5%

10K_0402_5% @

@

PLT_RST_VGA#

12

R1441

R1441 10K_0402_5%

10K_0402_5% DIS@

DIS@

3

NVVDD PWM_VID 52

DPRSLPVR_VGA 52

10K_0402_5%

10K_0402_5% N14PGV2@

N14PGV2@

FB_CLAMP_TGL_REQ#

2N7002KW_SOT323-3

+3VS_VGA

DGPU_PWR_EN17,22,31

2N7002KW_SOT323-3

3

4

1 2

R1415 10K_0402_5%DIS@R1415 10K_0402_5%DIS@

1 2

R1408 100K_0402_5%DIS@R1408 100K_0402_5%DIS@

1 2

R1410 100K_0402_5%DIS@R1410 100K_0402_5%DIS@

1 2

R1409 100K_0402_5%DIS@R1409 100K_0402_5%DIS@

2N7002KDWH_SOT363-6

I2CS_SCL

I2CS_SDA

+SP_PLLVDD

+PLLVDD

R1423

R1423 10K_0402_5%

10K_0402_5% DIS@

DIS@

OVERT#

Q1401A

DIS@ Q1401A

DIS@

PLT_RST_VGA#

C1443

DIS@C1443

DIS@

2

1

150mA

22U_0805_6.3V6M

1

2

+3VS_VGA

R1575

+SP_PLLVDD

N14PGV2@

1 2

N14PGV2@

10K_0402_5%

N14PGV2@

D2414

RB751V-40_SOD323-2 DIS@

12

G

2

13

D

S

D

S

Q1413

GPIO 6 of GPU connect to EC GPIO

+3VS

12

R1424

AP2301GN-HF_SOT23-3

13

D

2

G

Q1414

S

VGA_AC_DET

DGPU_PWR_EN 17,22,31

For GC6

GC6_EVENT# 41

2

Q1415

N14PGV2@

R1426

10K_0402_5%

DIS@

VGA_AC_DET 41

FB_CLAMP_MON

0_0402_5%

0_0402_5% N14PGV2@

N14PGV2@

10K_0402_5%

N14PGV2@

3 1

For GC6

12

VGA_GPIO13

OVERT#

THERM#_VGA

VGA_GPIO12

R1431

1 2

12

R1425

FB_CLAMP 26,31,41

Under GPU Near GPU

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

5

+3VS_VGA

1 2

R1413 100K_0402_5%@R1413 100K_0402_5%@

1 2

R1411 100K_0402_5%@R1411 100K_0402_5%@

1 2

R1412 100K_0402_5%@R1412 100K_0402_5%@

1 2

R1414 100K_0402_5%

@

1 2

R1416 100K_0402_5%@R1416 100K_0402_5%@

VGA_THRMTRIP# 18

DIS@Q1402B

DIS@

EC_SMB_CK2 14,39,41

EC_SMB_DA2 14,39,41

+3VS_VGA

12

5

61

2

13

D

2

Q1403

G

2N7002KW_SOT323-3

S

DIS@

2

2N7002KDWH_SOT363-6

1 2

R1443 0_0402_5%@R1443 0_0402_5%@

VGA_BL_PWM

VGA_ENVDD

VGA_ENBKL

VGA_GPIO10

VGA_GPIO7

34

Q1401B

Q1401B 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6 DIS@

DIS@

+3VS_VGA

5

2N7002KDWH_SOT363-6

1 2

R1442 0_0402_5%@R1442 0_0402_5%@

Q1402A

DIS@Q1402A

DIS@

61

Q1402B

34

PU AT EC SIDE, +3VS AND 4.7K

1 2

R1436 10M_0402_5%DIS@R1436 10M_0402_5%DIS@

DIS@

DIS@ Y1401

Y1401

1

XTALIN XTAL_OUT

1

C1441

C1441 22P_0402_50V8J

22P_0402_50V8J DIS@

DIS@

GND

27MHZ 16PF X3G027000FG1H-HX

Under GPU(below 150mils)

C1445

0.1U_0402_10V7K

C1444

DIS@C1444

DIS@

C1448

DIS@C1448

DIS@

C1446

4.7U_0402_6.3V6M

1

DIS@C1445

DIS@

DIS@C1446

DIS@

2

0.1U_0402_10V7K

C1449

1

DIS@C1449

DIS@

2

Title

N14P_PCIE/DAC/GPIO

Size Document Number Rev

Custom

Date: Sheet

3

GND

2

4

L1402

DIS@L1402

DIS@

1 2

BLM18PG330SN1_2P

0.1U_0402_10V7K

180ohms (ESR=0.2) Bead

1

2

L1403

DIS@L1403

DIS@

1 2

BLM18PG181SN1D_2P

BLM18PG181SN1D_2P 22U_0805_6.3V6M

22U_0805_6.3V6M

1

30 ohms @100MHz (ESR=0.05)

2

ON.B152

ON.B152ON.B152

Thursday, November 01, 2012

ON.B152ON.B152

5

2

C1442

C1442 22P_0402_50V8J

22P_0402_50V8J DIS@

DIS@

1

+1.05VS_VGA

22 59

of

1.A

1

U1401C

AC3

IFPA_TXC

AC4

IFPA_TXC_N

Y4

IFPA_TXD0

Y3

IFPA_TXD0_N

AA3

IFPA_TXD1

AA2

IFPA_TXD1_N

A A

B B

C C

AB1

IFPA_TXD2

AA1

IFPA_TXD2_N

AA4

IFPA_TXD3

AA5

IFPA_TXD3_N

AB5

IFPB_TXC

AB4

IFPB_TXC_N

AB3

IFPB_TXD4

AB2

IFPB_TXD4_N

AD3

IFPB_TXD5

AD2

IFPB_TXD5_N

AE1

IFPB_TXD6

AD1

IFPB_TXD6_N

AD4

IFPB_TXD7

AD5

IFPB_TXD7_N

T2

IFPC_L0

T3

IFPC_L0_N

T1

IFPC_L1

R1

IFPC_L1_N

R2

IFPC_L2

R3

IFPC_L2_N

N2

IFPC_L3

N3

IFPC_L3_N

V3

IFPD_L0

V4

IFPD_L0_N

U3

IFPD_L1

U4

IFPD_L1_N

T4

IFPD_L2

T5

IFPD_L2_N

R4

IFPD_L3

R5

IFPD_L3_N

N1

NC

M1

NC

M2

NC

M3

NC

K2

NC

K3

NC

K1

NC

J1

NC

M4

NC

M5

NC

L3

NC

L4

NC

K4

NC

K5

NC

J4

NC

J5

NC

N4

IFPC_AUX_I2CW _SCL

N5

IFPC_AUX_I2CW _SDA_N

P3

IFPD_AUX_I2CX_SCL

P4

IFPD_AUX_I2CX_SDA_N

J2

IFPE_AUX_I2CY_SCL

J3

IFPE_AUX_I2CY_SDA_N

H3

IFPF_AUX_I2CZ_SCL

H4

IFPF_AUX_I2CZ_SDA_N

N14P-GV2-S-A2_FCB GA595

N14P-GV2-S-A2_FCB GA595 N14PGV2@

N14PGV2@

Part 3 of 6

NC

BUFRST_N

GENERAL

MULTI_STRAP_REF0_GND

LVDS/TMDS

THERMDP

THERMDN

VDD_SENSE

GND_SENSE

TEST

TESTMODE

JTAG_TCK

JTAG_TDO JTAG_TMS

JTAG_TRST_N

SERIAL

ROM_CS_N

ROM_SCLK

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

JTAG_TDI

ROM_SI

ROM_SO

2

F11

NC

AD10

NC

AD7

NC

B19

NC

V5

NC

V6

NC

G1

NC

G2

NC

G3

NC

G4

NC

G5

NC

G6

NC

G7

NC

V1

NC

V2

NC

W1

NC

W2

NC

W3

NC

W4

NC

D11

D10

NC

E9

NC

E10

NC

F10

NC

D1 D2 E4 E3 D3 C1

NC

F6 F4

NC

F5

NC

F12

E12

F2

F1

AD9 AE5 AE6 AF6 AD6 AG4

D12 B12 A12 C12

R1530 10K_0402_5%DIS@R1530 10K_0402_5%DIS@

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

VCCSENSE_VGA

VSSSENSE_VGA

TESTMODE

T1401T1401 T1402T1402 T1403T1403 T1404T1404

ROM_CS# ROM_SI ROM_SO ROM_SCLK

1 2

STRAP0 29 STRAP1 29 STRAP2 29 STRAP3 29 STRAP4 29

R1532

1 2

40.2K_0402_1%

N14PGV2@

VCCSENSE_VGA 52

VSSSENSE_VGA 52

trace width: 16mils differential voltage sensing. differential signal routing.

1 2

R1449 10K_0402_5%DIS@R1449 10K_0402_5%DIS@

1 2

R1450 10K_0402_5%DIS@R1450 10K_0402_5%DIS@

1 2

R1451 10K_0402_5%DIS@R1451 10K_0402_5%DIS@

ROM_SI 29 ROM_SO 29 ROM_SCLK 29

+3VS_VGA

3

4

5

D D

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

N14P_LVDS/HDMI/THERM

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

23 59

of

1.A

1

2

3

4

5

+1.5VS_VGA +1.05VS_VGA

C1483

0.1U_0402_10V7K

A A

DIS@C1483

DIS@

1

2

Under GPU(below 150mils)

C1485

0.1U_0402_10V7K

C1484

DIS@C1484

DIS@

C1486

0.1U_0402_10V7K

1

DIS@C1485

DIS@

1

DIS@C1486

DIS@

2

1

2

Near GPU

C1456

4.7U_0603_6.3V6K

C1488

0.1U_0402_10V7K

C1487

DIS@C1487

DIS@

0.1U_0402_10V7K

C1489

1

DIS@C1488

DIS@

DIS@C1489

DIS@

2

0.1U_0402_10V7K

C1479

1U_0603_10V6K

C1490

0.1U_0402_10V7K

1

DIS@C1479

DIS@

DIS@C1490

DIS@

2

C1480

DIS@C1480

DIS@

4.7U_0603_6.3V6K

C1458

10U_0805_6.3V6M

1U_0603_10V6K

C1457

1

DIS@C1456

DIS@

DIS@C1457

DIS@

2

C1459

4.7U_0603_6.3V6K

1

DIS@C1458

DIS@

DIS@C1459

DIS@

2

C1461

22U_0805_6.3V6M

C1460

DIS@C1460

DIS@

22U_0805_6.3V6M

10U_0805_6.3V6M

1

DIS@C1461

DIS@

2

10U_0805_6.3V6M

1

2

rise 1.5v system source voltage to 1.55-1.57V

12

+IFPAB_PLLVDD

R146210K _0402_5% @ R146210K_0402_5% @

12

+IFPAB_IOVDD

R147110K _0402_5% @ R147110K_0402_5% @

B B

C C

12

R146510K _0402_5% @ R146510K_0402_5% @

R146710K _0402_5% @ R146710K_0402_5% @

R146910K _0402_5% @ R146910K_0402_5% @

R147210K _0402_5% @ R147210K_0402_5% @

+IFPC_PLLVDD

+IFPC_IOVDD

+IFPD_PLLVDD

+IFPD_IOVDD

3.5A

U1401D

B26

FBVDDQ_01

C25

FBVDDQ_02

E23

FBVDDQ_03

E26

FBVDDQ_04

F14

FBVDDQ_05

F21

FBVDDQ_06

G13

FBVDDQ_07

G14

FBVDDQ_08

G15

FBVDDQ_09

G16

FBVDDQ_10

G18

FBVDDQ_11

G19

FBVDDQ_12

G20

FBVDDQ_13

G21

FBVDDQ_14

H24

FBVDDQ_15

H26

FBVDDQ_16

J21

FBVDDQ_17

K21

FBVDDQ_18

L22

FBVDDQ_19

L24

FBVDDQ_20

L26

FBVDDQ_21

M21

FBVDDQ_22

N21

FBVDDQ_23

R21

FBVDDQ_24

T21

FBVDDQ_25

V21

FBVDDQ_26

W21

FBVDDQ_27

V7

IFPAB_PLLVDD_1

W7

IFPAB_PLLVDD_2

AA6

IFPAB_RSET

W6

IFPA_IOVDD

Y6

IFPB_IOVDD

M7

IFPC_PLLVDD_1

N7

IFPC_PLLVDD_2

T6

IFPC_RSET

P6

IFPC_IOVDD

T7

IFPD_PLLVDD_2

R7

IFPD_PLLVDD_1

U6

IFPD_RSET

R6

IFPD_IOVDD

J7

NC

K7

NC

K6

NC

H6

NC

J6

NC

N14P-GV2-S-A2_FCB GA595

N14P-GV2-S-A2_FCB GA595 N14PGV2@

N14PGV2@

Part 4 of 6

PEX_IOVDDQ_1 PEX_IOVDDQ_2 PEX_IOVDDQ_3 PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8

PEX_IOVDDQ_9 PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13 PEX_IOVDDQ_14

PEX_IOVDD_1 PEX_IOVDD_2 PEX_IOVDD_3 PEX_IOVDD_4 PEX_IOVDD_5 PEX_IOVDD_6

POWER

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CAL_TERM_GND

PEX_PLL_HVDD_1 PEX_PLL_HVDD_2

PEX_SVDD_3V3

PEX_PLLVDD_1

PEX_PLLVDD_2

VDD33_1 VDD33_2 VDD33_3 VDD33_4

2000mA

AA10 AA12 AA13 AA16 AA18 AA19 AA20 AA21 AB22 AC23 AD24 AE25 AF26 AF27

AA22 AB23 AC24 AD25 AE26 AE27

G10 G12 G8 G9

D22

C24

B25

AA8 AA9

AB8

AA14 AA15

Under GPU(below 150mils)

C1467

C1466

1U_0402_6.3V6K

C1465

1U_0402_6.3V6K

1

DIS@C1467

DIS@

DIS@C1466

DIS@

DIS@C1465

DIS@

2

+VDD33

1 2

R1468 40.2_0402_1%DIS@R1468 40.2_0402_1%DIS@

1 2

R1470 42.2_0402_1%DIS@R1470 42.2_0402_1%DIS@

1 2

R1473 51.1_0402_1%DIS@R1473 51.1_0402_1%DIS@

2

Place near balls

+PEX_PLLHVDD

120mA

+PEX_PLLVDD

C1500

DIS@C1500

DIS@

Under GPU

1

2

Near GPU

C1469

4.7U_0603_6.3V6K

1U_0402_6.3V6K

1

2

DIS@

1 2

C1501

1

DIS@C1501

DIS@

2

1

DIS@C1469

DIS@

2

1U_0603_10V6K

C1502

1

DIS@C1502

DIS@

2

Near GPU

4.7U_0603_6.3V6K

4.7U_0805_10V4Z

1U_0402_6.3V6K

C1468

DIS@C1468

DIS@

+1.5VS_VGA

R1459 0_0402_5%

0.1U_0402_10V7K

C1470

DIS@C1470

DIS@

C1471

10U_0603_6.3V6M

C1473

C1472

10U_0603_6.3V6M

DIS@C1471

DIS@

10U_0603_6.3V6M

1

DIS@C1473

DIS@

DIS@C1472

DIS@

2

4.7U_0603_6.3V6K

1

2

C1475

10U_0603_6.3V6M

C1474

10U_0603_6.3V6M

1

DIS@C1475

DIS@

DIS@C1474

DIS@

2

Under GPU Near GPU

C1507

DIS@C1507

DIS@

C1506

0.1U_0402_10V7K

C1496

0.1U_0402_10V7K

1

2

DIS@C1506

DIS@

1

DIS@C1496

DIS@

2

C1497

DIS@C1497

DIS@

C1498

0.1U_0402_10V7K

1

DIS@C1498

DIS@

2

Near GPU(below 150mils)

L1404

N14MGL@L1404

N14MGL@

1 2

BLM18PG121SN1D_0603

120ohms @100MHz (ESR=0.18)

N14PGV2@

1 2

R2155

0_0603_5%

22U_0805_6.3V6M

1

2

C1499

1U_0402_6.3V6K

DIS@C1499

DIS@

+1.05VS_VGA

C1476

22U_0805_6.3V6M

C1477

22U_0805_6.3V6M

1

DIS@C1476

DIS@

DIS@C1477

DIS@

2

R1461 0_0603_5%

4.7U_0603_6.3V6K

1

2

C1478

22U_0805_6.3V6M

1

DIS@C1478

DIS@

2

1 2

DIS@

CALIBRATION PIN

FB_CAL_x_PD_VDDQ

FB_CAL_x_PU_GND

FB_CAL_xTERM_GND

+3VS_VGA

C1493

0.1U_0402_10V7K

C1495

4.7U_0603_6.3V6K

C1494

4.7U_0603_6.3V6K

DIS@C1493

DIS@

1

2

DIS@C1494

DIS@

1

DIS@C1495

DIS@

2

+3VS_VGA

DDR3

40.2Ohm

42.2Ohm

51.1Ohm

D D

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

N14P_Power

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

24 59

of

1.A

1

U1401E

A2

A26 AB11 AB14

A A

B B

AB17 AB20 AB24

AC22 AC26

AD12 AD13 AD15 AD16 AD18 AD19 AD21 AD22 AE11 AE14 AE17 AE20

AF11 AF14 AF17 AF20 AF23

AG26

AC2

AC5 AC8

AF1

AF5 AF8 AG2

B1 B11 B14 B17 B20 B23 B27

B5

B8 E11 E14 E17

E2 E20 E22 E25

E5

E8

H2 H23 H25

H5

GND_001 GND_002 GND_003 GND_004 GND_005 GND_006 GND_007 GND_008 GND_009 GND_010 GND_011 GND_012 GND_013 GND_014 GND_015 GND_016 GND_017 GND_018 GND_019 GND_020 GND_021 GND_022 GND_023 GND_024 GND_025 GND_026 GND_027 GND_028 GND_029 GND_030 GND_031 GND_032 GND_033 GND_034 GND_035 GND_036 GND_037 GND_038 GND_039 GND_040 GND_041 GND_042 GND_043 GND_044 GND_045 GND_046 GND_047 GND_048 GND_049 GND_050 GND_051 GND_052 GND_053 GND_054 GND_055 GND_056

Part 5 of 6

GND

GND_057 GND_058 GND_059 GND_060 GND_061 GND_062 GND_063 GND_064 GND_065 GND_066 GND_067 GND_068 GND_069 GND_070 GND_071 GND_072 GND_073 GND_074 GND_075 GND_076 GND_077 GND_078 GND_079 GND_080 GND_081 GND_082 GND_083 GND_084 GND_085 GND_086 GND_087 GND_088 GND_089 GND_090 GND_091 GND_092 GND_093 GND_094 GND_095 GND_096 GND_097 GND_098 GND_099 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112

K11 K13 K15 K17 L10 L12 L14 L16 L18 L2 L23 L25 L5 M11 M13 M15 M17 N10 N12 N14 N16 N18 P11 P13 P15 P17 P2 P23 P26 P5 R10 R12 R14 R16 R18 T11 T13 T15 T17 U10 U12 U14 U16 U18 U2 U23 U26 U5 V11 V13 V15 V17 Y2 Y23 Y26 Y5

2

+VGA_CORE +VGA_CORE

3

U1401F

K10

VDD_001

K12

VDD_002

K14

VDD_003

K16

VDD_004

K18

VDD_005

L11

VDD_006

L13

VDD_007

L15

VDD_008

L17

VDD_009

M10

VDD_010

M12

VDD_011

M14

VDD_012

M16

VDD_013

M18

VDD_014

N11

VDD_015

N13

VDD_016

N15

VDD_017

N17

VDD_018

P10

VDD_019

P12

VDD_020

N14P-GV2-S-A2_FCB GA595

N14P-GV2-S-A2_FCB GA595 N14PGV2@

N14PGV2@

Part 6 of 6

VDD_041 VDD_040 VDD_039 VDD_038 VDD_037 VDD_036 VDD_035 VDD_034 VDD_033 VDD_032 VDD_031 VDD_030 VDD_029 VDD_028 VDD_027 VDD_026 VDD_025 VDD_024 VDD_023

POWER

VDD_022 VDD_021

4

V18 V16 V14 V12 V10 U17 U15 U13 U11 T18 T16 T14 T12 T10 R17 R15 R13 R11 P18 P16 P14

C1636

47U_0805_4V6

1

DIS@C1636

DIS@

2

Place near balls

5

AA7

GND

AB7

GND

N14P-GV2-S-A2_FCB GA595

N14P-GV2-S-A2_FCB GA595 N14PGV2@

N14PGV2@

VDD33

tIFPx_IOVDD

C C

IFPx_IOVDD

NVVDD

tNVVDD

tFBVDDQ

FBVDDQ

tPEX_VDD

PEX_VDD

tIFPy_IOVDD

IFPy_IOVDD

NV Recommended Power On Sequencing Order

D D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

X=A and B Y=C,D,E and F

Deciphered Date

4

2014/07/01

Title

N14P_VGA CORE, GND

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

25 59

of

1.A

1

2

3

4

5

For GC6

FBA_D[0..63]

FB_CLAMP22,31,41

C1624

DIS@C1624

DIS@

FBA_MA[15..0] 27,28

FBA_BA[2..0] 27,28

U1401B

Part 2 of 6

FBA_D00 FBA_D01 FBA_D02 FBA_D03 FBA_D04 FBA_D05 FBA_D06 FBA_D07 FBA_D08 FBA_D09 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FB_PLLAVDD_1 FB_PLLAVDD_2

FB_VREF_PROBE

FB_DLLAVDD

FB_CLAMP

FBA_DEBUG0 FBA_DEBUG1

Part 2 of 6

MEMORY

INTERFACE A

MEMORY

INTERFACE A

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

FBA_WCK01

FBA_WCK01_N

FBA_WCK23

FBA_WCK23_N

FBA_WCK45

FBA_WCK45_N

FBA_WCK67

FBA_WCK67_N

C27 C26 E24 F24 D27 D26 F25 F26 F23 G22 G23 G24 F27 G25 G27 G26 M24 M23 K24 K23 M27 M26 M25 K26 K22 J23 J25 J24 K27 K25 J27 J26

D19 D14 C17 C22 P24 W24 AA25 U25

F19 C14 A16 A22 P25 W22 AB27 T27

E19 C15 B16 B22 R25 W23 AB26 T26

D24 D25

N22 M22

D18 C18 D17 D16 T24 U24 V24 V25

FBA_CS0#_L

FBA_ODT_L FBA_CKE_L FBA_MA14 FBA_RST# FBA_MA9 FBA_MA7 FBA_MA2 FBA_MA0 FBA_MA4 FBA_MA1 FBA_BA0 FBA_WE# FBA_MA15 FBA_CAS# FBA_CS0#_H

FBA_ODT_H FBA_CKE_H FBA_MA13 FBA_MA8 FBA_MA6 FBA_MA11 FBA_MA5 FBA_MA3 FBA_BA2 FBA_BA1 FBA_MA12 FBA_MA10 FBA_RAS#

FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7

FBA_DQS#0 FBA_DQS#1 FBA_DQS#2 FBA_DQS#3 FBA_DQS#4 FBA_DQS#5 FBA_DQS#6 FBA_DQS#7

FBA_DQS0 FBA_DQS1 FBA_DQS2 FBA_DQS3 FBA_DQS4 FBA_DQS5 FBA_DQS6 FBA_DQS7

FBA_CLK0 FBA_CLK0#

FBA_CLK1 FBA_CLK1#

FBA_CS0#_L 27

FBA_ODT_L 27 FBA_CKE_L 27

FBA_RST# 27,28

FBA_WE# 27,28

FBA_CAS# 27,28 FBA_CS0#_H 28

FBA_ODT_H 28 FBA_CKE_H 28

FBA_RAS# 27,28

FBA_CLK0 27 FBA_CLK0# 27

FBA_CLK1 28 FBA_CLK1# 28

E18

FBA_D0

F18

FBA_D1

E16

FBA_D2

F17

FBA_D3

D20

FBA_D4

D21

FBA_D5

F20

FBA_D6

E21

FBA_D7

E15

FBA_D8

D15

FBA_D9

F15

FBA_D10

F13

FBA_D11

C13

FBA_D12

B13

FBA_D13

E13

FBA_D14

D13

FBA_D15

B15

FBA_D16

C16

FBA_D17

A13

FBA_D18

A15

FBA_D19

B18

FBA_D20

A18

FBA_D21

A19

FBA_D22

C19

FBA_D23

B24

FBA_D24

C23

FBA_D25

A25

FBA_D26

A24

FBA_D27

A21

FBA_D28

B21

FBA_D29

C20

FBA_D30

C21

FBA_D31

R22

FBA_D32

R24

FBA_D33

T22

FBA_D34

R23

FBA_D35

N25

FBA_D36

N26

FBA_D37

N23

FBA_D38

N24

FBA_D39

V23

FBA_D40

V22

FBA_D41

T23

FBA_D42

U22

FBA_D43

Y24

FBA_D44

AA24

FBA_D45

Y22

FBA_D46

AA23

FBA_D47

AD27

FBA_D48

AB25

FBA_D49

AD26

FBA_D50

AC25

FBA_D51

AA27

C1626

22U_0805_6.3V6M

C1625

DIS@C1625

DIS@

22U_0805_6.3V6M

1U_0402_6.3V6K

1

DIS@C1626

DIS@

2

0.1U_0402_10V7K

1

2

Near GPUUnder GPU

Under GPU

+FB_PLLAVDD

1 2

R1513 10K_0402_5%@ R1513 10K_0402_5%@

FB_CLAMP

1 2

+1.5VS_VGA

R1509 60.4_0402_1%@R1509 60.4_0402_1%@

1 2

R1511 60.4_0402_1%@R1511 60.4_0402_1%@

FBA_D52

AA26

FBA_D53

W26

FBA_D54

Y25

FBA_D55

R26

FBA_D56

T25

FBA_D57

N27

FBA_D58

R27

FBA_D59

V26

FBA_D60

V27

FBA_D61

W27

FBA_D62

W25

FBA_D63

F16 P22

12

C16220.1U_0402_10V7K DIS@ C16220.1U_0402_10V7K DIS@

D23

H22

F3

F22 J22

Mode D - Mirror Mode Mapping

Address

FBx_CMD0

FBx_CMD1

FBx_CMD2

FBx_CMD3

FBx_CMD4

FBx_CMD5

FBx_CMD6

FBx_CMD7

FBx_CMD8

FBx_CMD9

FBx_CMD10

FBx_CMD11

FBx_CMD12

FBx_CMD13

FBx_CMD14

FBx_CMD15

FBx_CMD16

FBx_CMD17

FBx_CMD18

FBx_CMD19

FBx_CMD20

FBx_CMD21

FBx_CMD22

FBx_CMD23

FBx_CMD24

FBx_CMD25

FBx_CMD26

FBx_CMD27

FBx_CMD28

FBx_CMD29

FBx_CMD30

DATA Bus

0..31

CS0#_L

ODT_L

CKE_L

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE#

A15

CAS#

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

32..63

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE#

A15

CAS#

CS0#_H

ODT_H

CKE_H

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

FBA_D[0..63]27, 28

FBA_DQM[7..0]27,28

FBA_DQS[7..0]27,28

FBA_DQS#[7..0]27,28

A A

B B

+FB_PLLAVDD

C C

N14P-GV2-S-A2_FCB GA595

N14P-GV2-S-A2_FCB GA595 N14PGV2@

N14PGV2@

30ohms (ESR=0.01) Bead

D D

P/N;SM010007W00

+1.05VS_VGA +FB_PLLAVDD

L1414

1 2

FBMA-L11-160808300LMA25T _2P

DIS@L1414

DIS@

600mA

+FB_PLLAVDD

Place close to BGA

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

N14P_MEM Interface

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

26 59

of

1.A

1

2

3

4

5

Memory Partition A - Lower 32 bits

U1407

12

C1536

0.1U_0402_10V7K@C1536

0.1U_0402_10V7K

1

@

2

U1407

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W4G1646B-HC11_FBGA96

K4W4G1646B-HC11_FBGA96 X76@

X76@

C1539

1U_0402_6.3V6K

C1538

1U_0402_6.3V6K

1

DIS@C1539

DIS@

DIS@C1538

DIS@

2

@

C1540

E3

FBA_D19

DQL0

F7

FBA_D20

DQL1

F2

FBA_D17

DQL2

F8

FBA_D21

DQL3

H3

FBA_D16

DQL4

H8

FBA_D23

DQL5

G2

FBA_D18

DQL6

H7

DQL7

D7

FBA_D10

DQU0

C3

FBA_D15

DQU1

C8

FBA_D8

DQU2

C2

FBA_D13

DQU3

A7

FBA_D9

DQU4

A2

FBA_D12

DQU5

B8

FBA_D11

DQU6

A3

FBA_D14

DQU7

+1.5VS_VGA

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1

VDDQ

A8

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H2

VDDQ

H9

VDDQ

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

C1546

C1545

1U_0402_6.3V6K

1U_0402_6.3V6K@C1540

1U_0402_6.3V6K

1

DIS@C1546

DIS@

DIS@C1545

DIS@

2

1U_0402_6.3V6K

Group2 (IN1)

Group1 (TOP)

FBA_CKE_L

R1484

R1484 10K_0402_5%

10K_0402_5% DIS@

DIS@

12

R1485

R1485 10K_0402_5%

10K_0402_5% DIS@

DIS@

U1406

12

1U_0402_6.3V6K

C1532

DIS@C1532

DIS@

1U_0402_6.3V6K

1

2

U1406

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W4G1646B-HC11_FBGA96

K4W4G1646B-HC11_FBGA96 X76@

X76@

C1533

1U_0402_6.3V6K

C1534

1U_0402_6.3V6K

1

DIS@C1533

DIS@

DIS@C1534

DIS@

2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3

FBA_D4

F7

FBA_D1

F2

FBA_D7

F8

FBA_D0

H3

FBA_D6 FBA_D3 FBA_D5 FBA_D2

FBA_D29 FBA_D25 FBA_D30 FBA_D26 FBA_D28 FBA_D24 FBA_D31 FBA_D27

+1.5VS_VGA

Group0 (IN3)

Group3 (BOT)

C1530

DIS@C1530

DIS@

0.1U_0402_10V7K

C1524

1

DIS@C1524

DIS@

2

H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

A A

12

R1483

R1483 160_0402_1%

160_0402_1% DIS@

DIS@

B B

C C

+1.5VS_VGA

12

R1481

1.1K_0402_1%

1.1K_0402_1% DIS@

DIS@

R1482

1.1K_0402_1%

1.1K_0402_1% DIS@

DIS@

FBA_CLK0

FBA_CLK0#

+1.5VS_VGA +1.5VS_VGA

C1541

1

DIS@C1541

DIS@

2

+FBA_VREF0

C1522

0.01U_0402_16V7K

12

1

DIS@C1522

DIS@

2

FBA_CLK026 FBA_CLK0#26 FBA_CKE_L26

FBA_ODT_L26 FBA_CS0#_L26 FBA_RAS#26,28 FBA_CAS#26,28 FBA_WE#26,28

FBA_RST#26,28

R1486

R1486 10K_0402_5%

10K_0402_5% DIS@

DIS@

0.1U_0402_10V7K

C1526

0.1U_0402_10V7K

1

DIS@C1526

DIS@

2

U1406 SIDE U1407 SIDE

C1529

C1528

0.1U_0402_10V7K

C1527

0.1U_0402_10V7K

1

DIS@C1529

DIS@

DIS@C1528

DIS@

DIS@C1527

DIS@

2

+FBA_VREF0

FBA_MA0 FBA_MA1 FBA_MA2 FBA_MA3 FBA_MA4 FBA_MA5 FBA_MA6 FBA_MA7 FBA_MA8 FBA_MA9 FBA_MA10 FBA_MA11 FBA_MA12 FBA_MA13 FBA_MA14 FBA_MA15

FBA_BA0 FBA_BA1 FBA_BA2

FBA_CLK0 FBA_CLK0# FBA_CKE_L

FBA_ODT_L FBA_CS0#_L FBA_RAS# FBA_CAS# FBA_WE#

FBA_DQS0 FBA_DQS3

FBA_DQM0 FBA_DQM3

FBA_DQS#0 FBA_DQS#3

FBA_RST#

12

R1487

R1487 243_0402_1%

243_0402_1% DIS@

DIS@

0.1U_0402_10V7K

C1537

1U_0402_6.3V6K

C1531

1

DIS@C1537

DIS@

DIS@C1531

DIS@

2

+FBA_VREF0

FBA_MA0 FBA_MA1 FBA_MA2 FBA_MA3 FBA_MA4 FBA_D22 FBA_MA5 FBA_MA6 FBA_MA7 FBA_MA8 FBA_MA9 FBA_MA10 FBA_MA11 FBA_MA12 FBA_MA13 FBA_MA14 FBA_MA15

FBA_BA0 FBA_BA1 FBA_BA2

FBA_CLK0 FBA_CLK0# FBA_CKE_L

FBA_ODT_L FBA_CS0#_L FBA_RAS# FBA_CAS# FBA_ODT_L FBA_WE#

FBA_DQS2 FBA_DQS1

FBA_DQM2 FBA_DQM1

FBA_DQS#2 FBA_DQS#1

FBA_RST#

R1488

R1488 243_0402_1%

243_0402_1% DIS@

DIS@

C1535

0.1U_0402_10V7K

C1525

0.1U_0402_10V7K

1

DIS@C1535

DIS@

DIS@C1525

DIS@

2

FBA_MA[15..0] 26,28

FBA_BA[2..0] 26,28

FBA_D[0..63] 26,28

FBA_DQM[7..0] 26,28

FBA_DQS[7..0] 26,28

FBA_DQS#[7..0] 26,28

Mode D - Mirror Mode Mapping

Address

FBx_CMD0

FBx_CMD1

FBx_CMD2

FBx_CMD3

FBx_CMD4

FBx_CMD5

FBx_CMD6

FBx_CMD7

FBx_CMD8

FBx_CMD9

FBx_CMD10

FBx_CMD11

FBx_CMD12

FBx_CMD13

FBx_CMD14

FBx_CMD15

FBx_CMD16

FBx_CMD17

FBx_CMD18

FBx_CMD19

FBx_CMD20

FBx_CMD21

FBx_CMD22

FBx_CMD23

FBx_CMD24

FBx_CMD25

FBx_CMD26

FBx_CMD27

FBx_CMD28

FBx_CMD29

FBx_CMD30

DATA Bus

0..31

CS0#_L

ODT_L

CKE_L

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE#

A15

CAS#

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

32..63

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE#

A15

CAS#

CS0#_H

ODT_H

CKE_H

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

D D

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

N14P_GDDR3_A Lower

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

27 59

of

1.A

1

2

3

4

5

Memory Partition A - Upper 32 bits

Address

FBA_D[0..63] 26,27

FBA_MA[15..0] 26,27

FBA_BA[2..0] 26,27

FBA_DQM[7..0] 26, 27

FBA_DQS[7..0] 26,27

FBA_DQS#[7..0] 26,27

DATA Bus

32..63

0..31

CS0#_L

ODT_L

CKE_L

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE#

A15

CAS#

CS0#_H

ODT_H

CKE_H

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS#

U1409

12

C1557

DIS@C1557

DIS@

1U_0402_6.3V6K

1

2

U1409

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W4G1646B-HC11_FBGA96

K4W4G1646B-HC11_FBGA96 X76@

X76@

C1559

1U_0402_6.3V6K

C1558

1U_0402_6.3V6K

1

DIS@C1559

DIS@

DIS@C1558

DIS@

2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

U1408

12

C1565

0.1U_0402_10V7K@C1566

0.1U_0402_10V7K

@

U1408

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4W4G1646B-HC11_FBGA96

K4W4G1646B-HC11_FBGA96 X76@

X76@

1U_0402_6.3V6K@C1565

1U_0402_6.3V6K

C1568

1U_0402_6.3V6K@C1568

1U_0402_6.3V6K

1

@

2

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

C1569

1U_0402_6.3V6K@C1569

1U_0402_6.3V6K

1

@

2

@

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

C1570

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

1

2

E3 F7

FBA_D58

F2

FBA_D60

F8

FBA_D59

H3

FBA_D61 FBA_D56 FBA_D62 FBA_D57

FBA_D55 FBA_D51 FBA_D54 FBA_D49 FBA_D52 FBA_D50 FBA_D53 FBA_D48

+1.5VS_VGA

Group7 (IN3)

Group6 (BOT)

Mode D - Mirror Mode Mapping

FBx_CMD0

FBx_CMD1

FBx_CMD2

FBx_CMD3

FBx_CMD4

FBx_CMD5

FBx_CMD6

FBx_CMD7

FBx_CMD8

FBx_CMD9

FBx_CMD10

FBx_CMD11

FBx_CMD12

FBx_CMD13

FBx_CMD14

FBx_CMD15

FBx_CMD16

FBx_CMD17

FBx_CMD18

FBx_CMD19

FBx_CMD20

FBx_CMD21

FBx_CMD22

FBx_CMD23

FBx_CMD24

FBx_CMD25

FBx_CMD26

FBx_CMD27

FBx_CMD28

FBx_CMD29

FBx_CMD30

H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

1U_0402_6.3V6K@C1570

1U_0402_6.3V6K

C1571

1U_0402_6.3V6K@C1571

1U_0402_6.3V6K

1

@

2

E3

FBA_D36

F7

FBA_D34

F2

FBA_D37

F8

FBA_D35

H3

FBA_D39

H8

FBA_D32

G2

FBA_D38

H7

FBA_D33

D7

FBA_D44

C3

FBA_D42

C8

FBA_D46

C2

FBA_D41

A7

FBA_D47

A2

FBA_D43

B8

FBA_D45

A3

FBA_D40

+1.5VS_VGA

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

Group4 (IN1)

Group5 (TOP)

+FBA_VREF1 FBA_D63

FBA_MA0 FBA_MA1 FBA_MA2 FBA_MA3 FBA_MA4 FBA_MA5 FBA_MA6 FBA_MA7 FBA_MA8 FBA_MA9 FBA_MA10 FBA_MA11 FBA_MA12 FBA_MA13 FBA_MA14 FBA_MA15

FBA_BA0 FBA_BA1 FBA_BA2

FBA_CLK1 FBA_CLK1# FBA_CKE_H

FBA_ODT_H FBA_CS0#_H FBA_RAS# FBA_CAS# FBA_WE#

FBA_DQS7 FBA_DQS6

FBA_DQM7 FBA_DQM6

FBA_DQS#7 FBA_DQS#6

FBA_RST#

R1495

243_0402_1%

DIS@

U1408 SIDE

C1561

0.1U_0402_10V7K

C1562

0.1U_0402_10V7K

C1567

0.1U_0402_10V7K@C1567

DIS@C1562

DIS@

0.1U_0402_10V7K

C1566

1

@

2

C1560

DIS@C1560

DIS@

0.1U_0402_10V7K

1

DIS@C1561

DIS@

2

+1.5VS_VGA

A A

R1491

160_0402_1%

DIS@

B B

FBA_CKE_H

FBA_ODT_H

R1492

10K_0402_5%

DIS@

C C

R1489

1.1K_0402_1%

1.1K_0402_1% DIS@

DIS@

R1490

1.1K_0402_1%

1.1K_0402_1% DIS@

DIS@

12

+FBA_VREF1

C1547

0.01U_0402_16V7K

12

1

DIS@C1547

DIS@

2

FBA_CLK1

12

FBA_CLK1#

12

R1493

10K_0402_5%

DIS@

+1.5VS_VGA +1.5VS_VGA

C1549

0.1U_0402_10V7K

C1555

0.1U_0402_10V7K

1

DIS@C1549

DIS@

DIS@C1555

DIS@

2

C1551

DIS@C1551

DIS@

FBA_CLK126 FBA_CLK1#26 FBA_CKE_H26

FBA_ODT_H26 FBA_CS0#_H26 FBA_RAS#26,27 FBA_CAS#26,27 FBA_WE#26,27

FBA_RST#26,27

U1409 SIDE

C1554

0.1U_0402_10V7K

C1552

0.1U_0402_10V7K

1

DIS@C1554

DIS@

DIS@C1552

DIS@

2

C1553

DIS@C1553

DIS@

1U_0402_6.3V6K

1

2

+FBA_VREF1

FBA_MA0 FBA_MA1 FBA_MA2 FBA_MA3 FBA_MA4 FBA_MA5 FBA_MA6 FBA_MA7 FBA_MA8 FBA_MA9 FBA_MA10 FBA_MA11 FBA_MA12 FBA_MA13 FBA_MA14 FBA_MA15

FBA_BA0 FBA_BA1 FBA_BA2

FBA_CLK1 FBA_CLK1# FBA_CKE_H

FBA_ODT_H FBA_CS0#_H FBA_RAS# FBA_CAS# FBA_WE#

FBA_DQS4 FBA_DQS5

FBA_DQM4 FBA_DQM5

FBA_DQS#4 FBA_DQS#5

FBA_RST#

R1494

243_0402_1%

DIS@

C1556

1U_0402_6.3V6K

1

DIS@C1556

DIS@

2

D D

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

N14P_GDDR3_A Upper

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

28 59

of

1.A

1

R1514

12

R1514

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

ROM_SI ROM_SO ROM_SCLK

R1514

45.3K_0402_1%

45.3K_0402_1% N14PGV2@

N14PGV2@

12

R1519

R1519 10K_0402_5%

10K_0402_5% @

@

N14M @ N14P @

12

R1524

R1524 10K_0402_5%

10K_0402_5% @

@

N14M @ N14P @

12

R1527

R1527 10K_0402_5%

10K_0402_5% X76@

X76@

10K_0402_5%

N14MGL@

SD02810028J

STRAP023 STRAP123 STRAP223

A A

B B

STRAP323 STRAP423

ROM_SI23 ROM_SO23 ROM_SCLK23

FB Memory gDDR3

Samsung 1000MHz

Micron

N14P-GV2

C C

1000MHz

Samsung 900MHz

Micron 900MHz

K4W2G1646E-BC1A

128Mx16

MT41J128M16JT-093G

128Mx16

K4W4G1646B-HC11

256Mx16

MT41K256M16HA-107G

256Mx16

FB Memory gDDR3

Samsung 1000MHz

Hynix 1000MHz

Micron

N14M-GL

D D

1000MHz

Samsung 900MHz

Hynix 900MHz

Micron 900MHz

K4W2G1646E-BC1A

128Mx16

H5TQ2G63DFR-N0C

128Mx16

MT41J128M16JT-093G

128Mx16

K4W4G1646B-HC11

256Mx16

H5TQ4G63MFR-11C

256Mx16

MT41K256M16HA-107G

256Mx16

1

12

R1515

R1515 10K_0402_5%

10K_0402_5% X76@

X76@

12

R1520

R1520 10K_0402_5%

10K_0402_5% X76@

X76@

12

R1525

4.99K_0402_1%

4.99K_0402_1% N14PGV2@

N14PGV2@

12

R1528

R1528 10K_0402_5%

10K_0402_5% N14MGL@

N14MGL@

ROM_SO ROM_SIROM_SCLK STRAP1GPU

PU 5K

ROM_SO ROM_SIROM_SCLK STRAP0 STRAP1GPU

PD 10K

12

+3VS_VGA

12

PU 5K

PD 10K

2

+3VS_VGA

12

R1517

R1516

29.4K_0402_1%

29.4K_0402_1% X76@

X76@

R1521

R1521 10K_0402_5%

10K_0402_5% X76@

X76@

R1526

4.99K_0402_1%

4.99K_0402_1% N14PGV2@

N14PGV2@

R1529

R1529 10K_0402_5%

10K_0402_5% N14MGL@

N14MGL@

R1517 10K_0402_5%

10K_0402_5% X76@

X76@

12

R1522

4.99K_0402_1%

4.99K_0402_1% X76@

X76@

STRAP0

PD 45K

PD 30K

PD 20K

PD 10K

PU 45K

PU 45KPU 5K

PD 10K

PU 10K

PD 10K

PU 10K

PD 10K

PU 10K

PD 10K

PU 10K

PD 10K

PU 10K

X76 X76

2

12

R1518

R1518 10K_0402_5%

10K_0402_5% @

@

N14M @ N14P @

12

R1523

R1523 10K_0402_5%

10K_0402_5% N14MGL@

N14MGL@

PD 45K

PD 10K

PU 10K

PD 10K

PU 10K

PD 10K

R1523

SD03445328J

ZZZ1

Micron

M1G@

X7600108001

STRAP2

PD 15K

STRAP2

PU 10K

PD 10K

PU 10K

45.3K_0402_1%

N14PGV2@

ZZZ2

Samsung

S1G@

S1G@ X7600108002

X7600108002

STRAP3 STRAP4

PD 5KPD 15K

PD 5K

STRAP3 STRAP4

PD 10K

PU 10K

PD 10K

PU 10K

ZZZ3

Samsung

S2G@

S2G@ X7600108004

X7600108004

PD 45K

PD 45KPD 5K

PD 10K

3

Physical Strapping pin

ROM_SCLK

ROM_SI

ROM_SO

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

Resistor Values

5K

10K

15K

20K

25K

30K

35K

45K

Power Rail

+3VS_VGA

Pull-up to +3VS_VGA

SUB_VENDOR

ZZZ4

Micron

M2G@

M2G@ X7600108005

X7600108005

0

No VBIOS ROM

1

BIOS ROM is present (Default)

FB[1:0]

0

Reserved

1

Reserved

2

256MB (Default)

3

Reserved

USER Straps

User[3:0]

1000-1100

ZZZ6

MT41J128M16JT

M1G@

M1G@ SA00005M100

SA00005M100

For N14P-GV2 QS Sample ROM_SO change from PU 10K to PU 5K ROM_SCLK change from PD 15K to PU 5K STRAP1 change from PD 5K to PD 45K STRAP2 change from PU 30K to PD 15K STRAP4 change from PD 5K to PD 45K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

Customer defined

ZZZ7

K4W2G1646E

S1G@

S1G@ SA00005SH10

SA00005SH10

2012/07/01

ZZZ8

K4W4G1646B

S2G@

S2G@ SA00005OM00

SA00005OM00

LC Future Center Secret Data

4

Logical Strapping Bit3

PCI_DEVID[4]

FB[1]

PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]

SOR3_EXPOSED

RESERVED PCIE_SPEED_

1000

1001

1010

1011

1100

1101

1110

1111

Pull-down to Gnd

Logical Strapping Bit2

SUB_VENDOR

RAM_CFG[2]

FB[0]

USER[2] USER[1] USER[0]USER[3]

3GIO_PADCFG[2] 3GIO_PADCFG[1]3GIO_PADCFG[3]

SOR2_EXPOSED SOR1_EXPOSED

CHANGE_GEN3

0000

0001

0010

0011

0100

0101

0110

0111

3GIO_PADCFG[3:0]

0110

0000

SMBUS_ALT_ADDR

0

0x9E (Default)

1

0x9C (Multi-GPU usage)

PCIE_MAX_SPEED

0

Limit booting to PCIE Gen1

1

Allow booting to PCIE Gen 2/3

PCIE_SPEED_CHANGE_GEN3

0

Disable PCIE Gen3 operation

1

Enable PCIE Gen3 operation

ZZZ9

MT41K256M16HA

M2G@

M2G@ SA00005ON00

SA00005ON00

2014/07/01

Deciphered Date

4

2014/07/01

Gen1/Gen2 support only

Gen3 support

VGA_DEVICE

0

1

PEX_PLL_EN_TERM

0

1

5

Logical Strapping Bit1

PCI_DEVID[5]

RAM_CFG[1]RAM_CFG[3]

Logical Strapping Bit0

PEX_PLL_EN_TERM

RAM_CFG[0]

VGA_DEVICESMB_ALT_ADDR

3GIO_PADCFG[0]

PCIE_MAX_SPEED DP_PLL_VDD33V

SOR0_EXPOSED

3D Device (Class Code 302h)

VGA Device (Default)

Disable (Default)

Enable

DP_PLL_VDD33V

0

Reserved

1

Default

Title

N14P_MISC

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

29 59

of

1.A

1

A A

B B

2

3

4

5

C C

D D

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

XXX

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

30 59

of

1.A

1

2

3

4

5

+1.5V to +1.5VS_VGA

+VSB

12

R1536

R1536 100K_0402_5%

100K_0402_5% DIS@

R1537

R1537 100K_0402_5%

100K_0402_5% @

@

R1480

DIS@R1480

DIS@

100K_0402_5%

DIS@

13

D

2

G

S

12

+5VALW +3VS +3VS_VGA

12

R1475

R1475 100K_0402_5%

100K_0402_5% DIS@

DIS@

DGPU_PWR_EN#

13

D

2

G

S

12

A A

1 2

SUSP43,49,52,9

FBVDDQ_PWR_EN#31

B B

C C

SUSP#41,43,49,51,9

DGPU_PWR_EN17,22

FBVDDQ_PWR_EN#

R1542 0_0402_5%@R1542 0_0402_5%@

1 2

R1541 0_0402_5%

DIS@

1 2

R1477 0_0402_5%@R1477 0_0402_5%@

1 2

R1478 0_0402_5%

DIS@

+1.5V +1.5VS_VGA

J1402

@J1402

@

112

JUMP_43X79

Q1404 AO4430L_SO8

AO4430L_SO8 8 7 6 5

C1516

DIS@C1516

DIS@

0.01U_0603_50V7K

12

4

Q1408

2N7002K_SOT23-3

1 2

R1538 0_0402_5%DIS@R1538 0_0402_5%DIS@

Q1410

Q1410 2N7002K_SOT23-3

2N7002K_SOT23-3 DIS@

DIS@

+3VS to +3VS_VGA

R1476

1 2

DIS@

10K_0402_5%

Q1406

Q1406 2N7002K_SOT23-3

2N7002K_SOT23-3 DIS@

DIS@

10K_0402_5%

C1515

DIS@C1515

DIS@

0.01U_0402_16V7K

1 2

2

DIS@Q1404

DIS@

1 2 3

D

S

@

J1401

112

JUMP_43X79

Q1405

Q1405 AO3413_SOT23-3

AO3413_SOT23-3

S

G

2

2N7002K_SOT23-3

12

R1539

R1539 470_0603_5%

470_0603_5% @

@

13

@J1401

@

2

DIS@

D

13

Q1407

@

G

C1513

@

2

D

S

10U_0603_6.3V6M@C1513

10U_0603_6.3V6M

1

2

12

R1533

R1533 470_0603_5%

470_0603_5% @

@

13

C1512

10U_0603_6.3V6M

C1627

1

DIS@C1512

DIS@

DIS@C1627

DIS@

2

R1540

@R1540

@

1 2

0_0402_5%

R1543

@R1543

@

1 2

0_0402_5%

C1511

1 2

10U_0603_6.3V6M

2

G

C1521

0.1U_0402_10V7K@C1521

0.1U_0402_10V7K

1

@

2

0.1U_0402_10V7K

1

2

FBVDDQ_PWR_EN#

SUSP

DIS@C1511

DIS@

R1479

@R1479

@

1 2

10K_0402_5%

DGPU_PWR_EN#

FBVDDQ_PWR_EN# 31

+5VALW

12

R1549

R1549 100K_0402_5%

100K_0402_5% DIS@

DIS@

1 2

DIS@R1579

DIS@

R1547 10K_0402_5%DIS@R1547 10K_0402_5%DIS@

1 2

R1544 10K_0402_5%DIS@R1544 10K_0402_5%DIS@

2

G

R1578

1 2

@

0_0402_5%

R1580

12

10K_0402_5%

@

DGPU_PWROK18,31,52

R1548

R1548 100K_0402_5%

100K_0402_5% @

@

R1546

R1546 100K_0402_5%

100K_0402_5% @

@

+3VS

13

@

D

Q1582

Q1582 2N7002_SOT23

2N7002_SOT23

S

R1545

R1545 100K_0402_5%

100K_0402_5% DIS@

DIS@

FBVDDQ_PWR_EN31

DGPU_PWROK18,31,52

DGPU_GC6_EN17

R1579

1 2

FB_CLAMP22,26,41

FB_CLAMP GC6_EN

0_0402_5%

12

2

G

+5VALW

1 2

0_0402_5%

FBVDDQ_PWR_EN#

13

D

Q1412

Q1412 2N7002K_SOT23-3

2N7002K_SOT23-3 DIS@

DIS@

S

12

DGPU_PWROK#

13

D

Q1411

Q1411 2N7002K_SOT23-3

2N7002K_SOT23-3 DIS@

DIS@

S

D1581

DAN202UT106_SC70-3

DAN202UT106_SC70-3 2

1

3

DIS@

R1582

@

FBVDDQ_PWR_EN# 31

DGPU_PWROK# 52

FBVDDQ_PWR_EN 31

12

R1583

R1583 200K_0402_5%

200K_0402_5%

DIS@

D D

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

N14P_+3VS/+1.05VS POWER

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

31 59

of

1.A

1

LCD POWER CIRCUIT

2

3

4

5

Place closed to JLVDS1

+3VS

Q2102

+LCDVDD +5VALW

12

A A

PCH_ENVDD16

B B

C C

PCH_ENVDD

100K_0402_5%

R2101

150_0603_1%

R2106

12

34

5

Q2415B

Q2415B 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

2

12

BKOFF#41

R2102

100K_0402_5%

1 2

R2103 220K_0402_5%R2103 220K_0402_5%

0.1U_0402_16V4Z

61

0.1U_0402_16V4Z

Q2415A

Q2415A 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

12

+3VS

W=60mils

1

4.7U_0805_10V4Z

2

1

C2107

2

D2101

@ D2101

@

RB751V-40_SOD323-2

1 2

R2114 0_0402_5%R2114 0_0402_5%

R2116

R2115

R2115 10K_0402_5%

10K_0402_5%

R2116 10K_0402_5%

10K_0402_5% @

@

Q2102

+LCDVDD +LCDVDD_CONN

W=60mils

3 1

C2101

2

AP2301GN-HF_SOT23-3

+3VS

12

R2113

4.7K_0402_5%

4.7K_0402_5% @

@

12

DISPOFF#

12

1 2

FBMA-L11-201209-221LMA 30T_0805

L2102

CMOS

C2124

4.7U_0805_10V4Z

C2124

4.7U_0805_10V4Z

C2109

0.1U_0402_16V4Z

C2109

0.1U_0402_16V4Z

1

2

1

12

@

RFC49

RFC50

2

47P_0402_50V8J

2200P_0402_50V7K

For RF

USB20_N1317 USB20_P1317

L2403

@L2403

@

USB20_N13 USB20_N13_C

USB20_P13 USB20_P13_C

2

3

WCM-2012-900T_4P

1

4

PN: SM070000K0J x 1

+3VS

1 2

R2104 2.2K_0402_5%R2104 2.2K_0402_5%

1 2

R2105 2.2K_0402_5%R2105 2.2K_0402_5%

C2110

C2110 10P_0402_50V8J

10P_0402_50V8J @

@

EDID_CLK

EDID_DATA

1

2

1

@

RFC47

2

47P_0402_50V8J

For RF

A LOGO RED LIGHT

1 2 1 2

1

4

1

C2111

C2111 10P_0402_50V8J

10P_0402_50V8J @

@

2

1

C2103

0.1U_0402_16V4Z

2

9/19 Del R1010

R24710_0402_5% R24710_0402_5% R24720_0402_5% R24720_0402_5%

+3VS_CMOS

DMIC_CLK35 DMIC_1_235 +3VS LOGO_LED#39,41 +3VALW

LVDS_ACLK16 LVDS_ACLK#16

LVDS_A216 LVDS_A2#16 LVDS_A116 LVDS_A1#16 LVDS_A016 LVDS_A0#16

LVDS_BCLK16 LVDS_BCLK#16 LVDS_B216 LVDS_B2#16 LVDS_B116 LVDS_B1#16 LVDS_B016 LVDS_B0#16 EDID_DATA16 EDID_CLK16 +3VS +LCDVDD_CONN

@

DMIC_CLK

DMIC_1_2

1

@

RFC13

RFC14

2

47P_0402_50V8J

For RF

DMIC_CLK DMIC_1_2

1 2

R1209 4.99K_0402_1%R1209 4.99K_0402_1%

+3VS

1 2

R2118 10K_0402_5%R2118 10K_0402_5%

1 2

C2116 220P_0402_50V7KC2116 220P_0402_50V7K

1 2

C2125 1000P_0402_50V7K@C2125 1000P_0402_50V7K@

1 2

C2117 220P_0402_50V7KC2117 220P_0402_50V7K

LCD/LED PANEL Conn.

PN:SP01000XE00

1

C2113

4.7U_0805_25V6-K

R2110

R2110 100K_0402_5%

100K_0402_5%

1 2

4.7U_0805_25V6-K

USB20_N13_C USB20_P13_C

INVPWM

DISPOFF#

(20 MIL)

DISPOFF# INVPWM

LOGO_LED# +3VALW_LOGO

EDID_DATA EDID_CLK

2

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

1

C2112

C2112 680P_0402_50V7K

680P_0402_50V7K @

@

2

JLCD1

40

G5

39

G4

38

G3

37

G2

36

G1 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9

8

7

6

5

4

3

2

1

ACES_50398-04071-001

ACES_50398-04071-001 ME@

ME@

B++LEDVDD

R2108

1 2

0_0805_5%

1

12

@

45 44 43 42 41

@

RFC9

2200P_0402_50V7K

RFC48

RFC10

2

47P_0402_50V8J

0.1U_0402_16V4Z

For RF

+3VS

12

R2154

4.7K_0402_5%

4.7K_0402_5% @

12

R2137

R2137 10K_0402_5%

10K_0402_5% @

@

12

@

INVPWM

1 2

R2119

CMOS_ON#18

2

R2119

150K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

D2102

@ D2102

@

RB751V-40_SOD323-2

1 2

PCH_PWM16

D D

1

R2107 0_0402_5%R2107 0_0402_5%

12

R2153

R2153 10K_0402_5%

10K_0402_5%

@

+3VALW

1

C2123

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

1

C2118

0.1U_0402_16V4Z

2

+3VS

(20 MIL)

C2148

0.1U_0402_16V4Z

2012/07/01

Q2105

AP2301GN-HF_SOT23-3

3 1

1

2

4.7V

LC Future Center Secret Data

Deciphered Date

1

2

4

CMOS Camera Conn

(20 MIL)

CMOS SUSPEND 2.4mA

1 2

R2150 0_0603_5%R2150 0_0603_5%

C2114

0.1U_0402_16V4Z

C2427

0.01U_0402_16V7K

2014/07/01

+3VS_CMOS

1

2

1

C2115

@ C2115

@

10U_0603_6.3V6M

2

1

12

@

RFC11

RFC12

2

47P_0402_50V8J

2200P_0402_50V7K

For RF

Title

LVDS CONN.

Size Document Number Rev

Custom

Saturday, November 03, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

32 59

of

1.A

1

2

3

4

5

+5VS

D2105

2

10P_0402_50V8J

GREEN

JVGA_HS

JVGA_VS

1

2

RED

+R_CRT_VCC

GREEN

3

RB491D_SOT23-3

1

C2131

C2131 10P_0402_50V8J

10P_0402_50V8J @

@

2

A A

DAC_RED16

DAC_GRN16

DAC_BLU16

B B

C C

DAC_RED RED

DAC_GRN

DAC_BLU BLUE

CRT_HSYNC16

CRT_VSYNC16

12

R2120

R2120 150_0402_1%

150_0402_1%

12

R2121

150_0402_1%

1 2

C2129 0.1U_0402_16V4ZC2129 0.1U_0402_16V4Z

CRT_HSYNC

74AHCT1G125GW_SOT353-5

CRT_VSYNC CRT_VSYNC_1

R2122

R2122 150_0402_1%

150_0402_1%

+CRT_VCC

2

U2101

C2135 0.1U_0402_16V4ZC2135 0.1U_0402_16V4Z

C2120

10P_0402_50V8J

C2120

10P_0402_50V8J

1

2

5

1

P

A

G

3

1 2

74AHCT1G125GW_SOT353-5

C2122

10P_0402_50V8J

C2122

10P_0402_50V8J

C2121

10P_0402_50V8J

C2121

10P_0402_50V8J

1

2

1 2

R2123 1K_0402_5%R2123 1K_0402_5%

4

OE#

Y

+CRT_VCC

1

5

P

2

OE#

A

Y

G

U2102

3

1 2

L2104 FCM1608CF-121T03_2PL2104 F CM1608CF-121T03_2P

1 2

L2105 FCM1608CF-121T03_2PL2105 F CM1608CF-121T03_2P

1 2

L2106 FCM1608CF-121T03_2PL2106 F CM1608CF-121T03_2P

CRT_HSYNC_1

1 2

R2127 1K_0402_5%R2127 1K_0402_5%

4

C2127

10P_0402_50V8J

C2127

10P_0402_50V8J

1

2

D2110

3

I/O2

2

GND

1

I/O1

AZC099-04S.R7G_SOT23-6

10P_0402_50V8J

C2130

C2130 10P_0402_50V8J

10P_0402_50V8J @

@

I/O4

VDD

I/O3

C2126

1

2

1 2

L2109 FCM1608CF-121T03_2PL2109 FCM1608CF-121T03_2P

1 2

L2110 FCM1608CF-121T03_2PL2110 FCM1608CF-121T03_2P

BLUE

C2128

6

5

4

1

2

W=40mils

+R_CRT_VCC

1

C2132

F2101

1.1A_6V_SMD1812P110TF

1 2

C2119

0.1U_0402_16V4Z

C2133

100P_0402_50V8J

1

@

2

JVGA_VS

CRT_DDC_CLK_CONN

1

2

68P_0402_50V8J@C2133

68P_0402_50V8J

W=40mils

1

CRT Connector

2

PN:DC061208040

T16T16

CRT_DDC_DAT_CONN

CRT_DDC_CLK_CONN

1

C2134

C2134 68P_0402_50V8J

68P_0402_50V8J @

@

2

D2103

3

I/O2

2

GND

1

I/O1

AZC099-04S.R7G_SOT23-6

+CRT_VCC

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

TE_2041480-1

I/O4

VDD

I/O3

JCRT1

ME@

16 17

6

JVGA_HS

5

4

CRT_DDC_DAT_CONN

R314

0_0603_5%

+R_CRT_VCC

12

R319

R319 0_0603_5%

0_0603_5%

+3VS

C2153

100P_0402_50V8J

C2153

100P_0402_50V8J

C2152

100P_0402_50V8J

C2152

100P_0402_50V8J

1

2

D D

CRT_DDC_DATA16

CRT_DDC_CLK16

CRT_DDC_DATA

CRT_DDC_CLK

+3VS +R_CRT_VCC

12

R2125

R2124

4.7K_0402_5%

2

5

34

Q2107B2N7002KDWH_S OT363-6 Q2107B2N7002KDWH_S OT363-6

4.7K_0402_5%

61

Q2107A2N7002KDWH_S OT363-6 Q2107A2N7002KDWH_S OT363-6

R2125

4.7K_0402_5%

CRT_DDC_DAT_CONN

CRT_DDC_CLK_CONN

ConnChip

9/27 ESD

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

CRT CONN.

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

33 59

of

1.A

1

2

3

4

5

A A

R2126

1M_0402_5%

PCH_DPB_HPD16

ESD request Common mode choke 90ohm on these singals Compal PN: SM070000K00 Vendor PN: WCM-2012-900T

1

12

+HDMI_5V

12

R2143

2.2K_0402_1%

Q2111B

2N7002KDWH_SOT363-6

PCH_DPB_P316

B B

C C

PCH_DPB_N316

PCH_DPB_P216

PCH_DPB_N216

PCH_DPB_P116

PCH_DPB_N116

PCH_DPB_P016

PCH_DPB_N016

HDMI_TX2HDMI_TX2+

HDMI_TX1HDMI_TX1+

HDMI_TX0HDMI_TX0+

HDMI_CLKHDMI_CLK+

1 2

R2144 680_0402_5%R2144 680_0402_5%

1 2

R2152 680_0402_5%R2152 680_0402_5%

1 2

R2139 680_0402_5%R2139 680_0402_5%

1 2

R2140 680_0402_5%R2140 680_0402_5%

1 2

R2141 680_0402_5%R2141 680_0402_5%

1 2

R2142 680_0402_5%R2142 680_0402_5%

1 2

R2151 680_0402_5%R2151 680_0402_5%

1 2

R2147 680_0402_5%R2147 680_0402_5%

UMA 680_0402_5%

HDMI_CLK+

C2145.1U_0402_16V7K C2145.1U_0402_16V 7K

HDMI_CLK-

C2144.1U_0402_16V7K C2144.1U_0402_16V 7K

HDMI_TX0+

C2143.1U_0402_16V7K C2143.1U_0402_16V 7K

HDMI_TX0-

C2142.1U_0402_16V7K C2142.1U_0402_16V 7K

HDMI_TX1+

C2141.1U_0402_16V7K C2141.1U_0402_16V 7K

HDMI_TX1-

C2140.1U_0402_16V7K C2140.1U_0402_16V 7K

HDMI_TX2+

C2139.1U_0402_16V7K C2139.1U_0402_16V 7K

HDMI_TX2-

C2138.1U_0402_16V7K C2138.1U_0402_16V 7K

HDMI_GND

2

+3VS

1 2

R2128 0_0402_5%@R2128 0_0402_5%@

1

4

1 2

1

4

1 2

1

4

1 2

1

4

1 2

2

3

2

3

2

3

2

3

L2111 WCM-2012HS-900TL2111 WCM-2012HS-900T

4

R2130 0_0402_5%@R2130 0_0402_5%@

R2131 0_0402_5%@R2131 0_0402_5%@

1

L2112 WCM-2012HS-900TL2112 WCM-2012HS-900T

4

R2132 0_0402_5%@R2132 0_0402_5%@

R2133 0_0402_5%@R2133 0_0402_5%@

1

L2113 WCM-2012HS-900TL2113 WCM-2012HS-900T

4

R2134 0_0402_5%@R2134 0_0402_5%@

R2135 0_0402_5%@R2135 0_0402_5%@

1

L2114 WCM-2012HS-900TL2114 WCM-2012HS-900T

4

R2136 0_0402_5%@R2136 0_0402_5%@

13

D

Q2110

Q2110 2N7002K_SOT23-3

2N7002K_SOT23-3

G

S

2

3

2

3

2

3

2

3

HDMI_R_CK+

HDMI_R_CK-

HDMI_R_D0+

HDMI_R_D0-

HDMI_R_D1+

HDMI_R_D1-

HDMI_R_D2+

HDMI_R_D2-

D2113

1

HDMI_HPD HDMI_HPD

HDMI_SDATA

HDMI_SCLK

+HDMI_5V_OUT



2



4



5

3



8

YSCLAMP0524P_SLP 2510P8-10-9

+5VS

HDMICLK_NB16

HDMIDAT_NB16

9



8



7



6



R2149 0_0805_5%@R2149 0_0805_5%@

HDMI_SDATA

HDMI_SCLK

+HDMI_5V_OUT

9/27 ESD

D2106

2

3

RB491D-YS_SOT23-3

1 2

R2148

2.2K_0402_1%

+3VS

12

2

G

Q2109

Q2109 2N7002K_SOT23-3

2N7002K_SOT23-3

13

D

S

D

S

12

R2129

20K_0402_5%

W=40mils

F2102

1 2

+HDMI_5V

1.1A_6V_SMD1812P110TF

+3VS +HDMI_5V

R2145

2.2K_0402_5%

2

Q2111A

2N7002KDWH_SOT363-6

5

61

34

Place close d to JHDMI1

D2112

1



2



HDMI_R_D1-

HDMI_R_D1+

4



5

3



8

YSCLAMP0524P_SLP 2510P8-10-9

1

C2137

C2137 220P_0402_50V7K

220P_0402_50V7K @

@

2

+HDMI_5V_OUT

1

C2136

0.1U_0402_16V4Z

2

12









12

9

HDMI_R_CK-HDMI_R_CK-

8

HDMI_R_CK+HDMI_R_CK+

7

HDMI_R_D1-

6

HDMI_R_D1+

W=40mils

R2146

2.2K_0402_5%

HDMI_SCLK

HDMI_SDATA

47P_0402_50V8J

C2146 @

HDMI Connector

PN:DC232001K00

JHDMI1

HDMI_HPD

HDMI_SDATA HDMI_SCLK

HDMI_R_CK-

HDMI_R_CK+ HDMI_R_D0-

HDMI_R_D0+ HDMI_R_D1-

HDMI_R_D1+ HDMI_R_D2-

HDMI_R_D2+

ConnChip

12

C2147 @

C2147 @ 47P_0402_50V8J

47P_0402_50V8J

HDMI_R_D2-

HDMI_R_D2+

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

CONCR_099ATAC19NBLCNF

CONCR_099ATAC19NBLCNF ME@

ME@

20

GND

21

GND

22

GND

23

GND

footprint check

D2108

1



2



4



5

3



8

YSCLAMP0524P_SLP 2510P8-10-9

9



8



7



6



HDMI_R_D2-

HDMI_R_D2+

HDMI_R_D0-HDMI_R_D0-

HDMI_R_D0+HDMI_R_D0+

D D

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

HDMI CONN.

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

34 59

of

1.A

CX20671 High Definition Audio Codec SoC With Integrated Class-D Stereo Amplifier. An integrated 5 V to 3.3 V Low-dropout voltage regulator (LDO).

An integrated 3.3 V to 1.8V Low-dropout voltage regulator (LDO).

A A

EC Beep

ICH Beep

B B

Decoupling CAP

+CLASSD_5V

1 2

C1115 0.1U_0402_16V4ZC1115 0. 1U_0402_16V4Z

1 2

C1117 10U_0603_6.3V6MC1117 10U_0603_6.3V6M

1 2

C1118 0.1U_0402_16V4ZC1118 0. 1U_0402_16V4Z

1 2

C1120 10U_0603_6.3V6M

@

C1120 10U_0603_6.3V6M

@

C C

D D

CA8

0.1U_0402_16V4Z

CA6

0.1U_0402_16V4Z

CA1

0.1U_0402_16V4Z

CA2

0.1U_0402_16V4Z

HDA_RST#_AUDIO

HDA_SYNC_AUDIO

HDA_SDOUT_AUDIO

HDA_BITCLK_AUDIO

1

BEEP#41

HDA_SPKR13

MIC_JD

PLUG_IN

CX_GPIO0

12

@

12

@

12

@

12

@

R1123 33_0402_5%R1123 33_0402_5%

D2417 RB751V-40_SOD323-2D2417 RB751V -40_SOD323-2

12

1 2

C1141

0.1U_0402_16V4Z

1 2

C1142

0.1U_0402_16V4Z

D2416

RB751V-40_SOD323-2

10K_0402_5%

R1121

@C1141

@

@C1142

@

12

R1120 33_0402_5%R1120 33_0402_5%

PC Beep

Combo Jack detect (normal open)

Q1103

13

D

LBSS138LT1G_SOT-23- 3

S

Near Pin 12

Near Pin 15

1 2

2

G

1 2

R1130 33K_0402_5%R1130 33K_0402_5%

1

C1146

C1146 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1 2

R1129 33K_0402_5%@R1129 33K _0402_5%@

1

C1147

C1147 1U_0402_6.3V6K

1U_0402_6.3V6K @

@

2

1

@

RFC15

2

47P_0402_50V8J

For RF

EXT_MIC

HP_OUTL

HP_OUTR

PLUG_IN

@

12

CA3

CA3 1000P_0402_50V7K

1000P_0402_50V7K

EMI

HDA_BITCLK_AUDIO_C

C1123 22P_0402_50V8J@C1123 22P_0402_50V8J@

C1126 22P_0402_50V8J@C1126 22P_0402_50V8J@

C1128 22P_0402_50V8J@C1128 22P_0402_50V8J@

C1131 22P_0402_50V8JC1131 22P _0402_50V8J

DMIC_CLK

DMIC_1_2

1

2

1 2

RFC16

47P_0402_50V8J

1 2

EXT_MIC

12

9/28 RF modify

1

2

Layout Note:Path from +5VS to Pin12, Pin15 must be very low resistance (<0.01 ohms)

To support Wake-on-Jack or Wake-on-Ring, the CODEC VAUX_3.3 & VDD_IO pins m ust be powerd by a rail that is not removed unless AC power is removed. *DSH page42 has more detail.

C1111 0.1U_0402_16V4ZC1111 0.1U_0402_16V4Z

Internal DMIC

Internal SPEAKER

@

@ CA4

CA4 1000P_0402_50V7K

1000P_0402_50V7K

12

2

@

@ CA5

CA5 1000P_0402_50V7K

1000P_0402_50V7K

1 2

+3VS

HDA_RST#_AUDIO13

HDA_BITCLK_AUDIO13 HDA_SYNC_AUDIO13 HDA_SDIN013 HDA_SDOUT_AUDIO13

EAPD active low 0=power down ex AMP 1=power up ex AMP

EAPD EC_MUTE#41

DMIC_CLK32 DMIC_1_232

1 2

C1102 0.1U_0402_16V4ZC1102 0.1U_0402_16V4Z

1 2

C1103 0.1U_0402_16V4ZC1103 0.1U_0402_16V4Z

1 2

C1104 0.1U_0402_16V4ZC1104 0.1U_0402_16V4Z

1 2

R1102 0_0402_5%R1102 0_0402_5%

1 2

R1104 0_0402_5%R1104 0_0402_5%

1 2

R1105 0_0402_5%R1105 0_0402_5%

GND

3

+3VS DVDD_3V

R2414

+3VS

PC_BEEPPC_BEEP_CPC_BEEP_C_R

1 2

R1112 @ 4.7K_0402_5%R1112 @ 4.7K_0402_5%

1 2

R1134 0_0402_5%R1134 0_0402_5%

1 2

R1115 33_0402_5%R1115 33_0402_5%

1 2

R1111 0_0402_5%

1 2

R1131 0_0402_5%R1131 0_0402_5%

1 2

R1125

FBMA-10-100505-301T_2P

JAUHP

JAUHP 3 6

1

2 4

5

SINGA_2SJ2326-001111

SINGA_2SJ2326-001111 ME@

ME@

1 2

0_0603_5%

0.1U_0402_16V4Z

10K only needed if supply to VAUX_3.3 is removed during system re-start.

@

EXT_MIC PLUG_IN

12

C1127

4.7U_0603_6.3V6K

Near Pin 18

12

C1119

12

HP_OUTRHP_OUTL

2

3

DA1

DA1 PESD5V0U2BT_SOT23-3

PESD5V0U2BT_SOT23-3

1

2

3

DA2

DA2 PESD5V0U2BT_SOT23-3

PESD5V0U2BT_SOT23-3

1

C1119

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K @

@

Near Pin 2

12

C1114

C1114 1U_0402_6.3V6K

1U_0402_6.3V6K @

@

Near Pin 7

FILT_1.8_R

12

C1130

4.7U_0603_6.3V6K

Near Pin 3

C1121

C1116

10 mils

C1132

HDA_RST#_AUDIO

HDA_BITCLK_AUDIO_R HDA_SYNC_AUDIO HDA_SDIN0_R PLUG_IN HDA_SDOUT_AUDIO

PC_BEEP

CX_GPIO0

DMIC_CLK_R

SPK_L2+ SPK_L1-

SPK_R2+ SPK_R1-

EMI

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

GND

GNDA

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

U1101

9

RESET#

5

BIT_CLK

8

SYNC

6

SDATA_IN

4

SDATA_OUT

10

PC_BEEP

38

GPIO0/EAPD#

37

GPIO1/SPK_MUTE#

40

DMIC_CLK

1

DMIC_1/2

11

LEFT+

13

LEFT-

16

RIGHT+

14

RIGHT-

7

3

FILT_1.8

GND

41

4

FILT_1.65_R

+LDO_OUT_3.3V_R

AVDD_3.3 pinis output of internal LDO. NOT connect to external supply.

0.1U_0402_16V4Z

28

2

27

18

29

26

VDD_IO

VAUX_3.3

LPWR_5.0 RPWR_5.0

AVDD_5V

FILT_1.65

AVDD_HP

AVDD_3.3

DVDD_3.3

CLASS-D_REF

SENSE_A

PORTB_R PORTB_L

PORTC_R PORTC_L

PORTA_R PORTA_L

CX20671-21Z_QFN40_6X6

SPK_R1- SPK_R1-_CONN SPK_R2+ SPK_R2+_CONN

EMC request Bead 120ohm on these singals JV PN: SM01001670J Vendor PN: FBMA-L11-160808-121LMT

Rdc < 0.05 ohms Rated Current > 2A

SPK_L1- SPK_L1-_CONN SPK_L2+ SPK_L2+_CONN

1 2

C1135 1U_0402_6.3V6KC1135 1U_0402_6.3V6K

1 2

C1136 0.1U_0402_16V4ZC1136 0.1U_0402_16V4Z

1 2

C1133 4.7U_0603_6.3V6KC1133 4.7U_0603_6.3V6K

1 2

C1134 0.1U_0402_16V4ZC1134 0.1U_0402_16V4Z

12

C1113

12

C1129

12 15 17

36

SENSE_A

35

PORTB 34 33

B_BIAS

32

C_BIAS

31 30

23

HP_OUTR_R 22

HP_OUTL_R

24

NC

25

NC

39

NC

21

AVEE

19

FLY_P

20

FLY_N

1 2

L1102 0_0603_5%L1102 0_0603_5%

1 2

L1103 0_0603_5%L1103 0_0603_5%

1 2

L1104 0_0603_5%L1104 0_0603_5%

1 2

L1105 0_0603_5%L1105 0_0603_5%

EXT_MIC

Width 20 mil

LC Future Center Secret Data

Deciphered Date

2012/07/01

Deciphered Date

4

Near Pin 29

Near Pin 27

+5VS

@

C1112

4.7U_0603_6.3V6K

C1124

4.7U_0603_6.3V6K

Near Pin 26

Near Pin 28

+3VS

Near Pin 17

1 2

C1107 0.1U_0402_16V4ZC1107 0.1U_0402_16V4Z

1 2

R1113 5.11K_0402_1%R1113 5.11K _0402_1%

1 2

R1114 20K_0402_1%R1114 20K_0402_1%

1 2

R1116 39.2K_0402_1%R1116 39.2K _0402_1%

1 2

C1108 2.2U_0402_6.3V6MC1108 2.2U_0402_6.3V6M

1109

1 2

R1132 2K_0402_5%R1132 2K_0402_5%

1 2

R1117 39_0402_5%R1117 39_0402_5%

1 2

R1118 39_0402_5%R1118 39_0402_5%

Changed from 5.1ohm to 15ohm for "zi zi"noise.

1 2

C1110

1U_0402_6.3V6K

2014/07/01

5

Sense resistors must be connected same power that is used for

+CLASSD_5V

R1133 100_0402_1%R1133 100_0402_1%

+MICBIASB

C1122 0.1U_0402_16V4ZC1122 0. 1U_0402_16V4Z

C1125 4.7U_0603_6.3V6KC1125 4.7U_0603_6.3V6K

1 2

R1122 0_0805_5%R1122 0_0805_5%

MIC_JD

1 2

R1128 4.7K_0402_5%R1128 4.7K _0402_5%

HP_OUTR HP_OUTL

1 2

+3VS

PLUG_IN

+MICBIASB

VAUX_3.3

EXT_MIC

Near Pin 21

Internal Speaker

DC030008W00

SPK_R1-_CONN

C1139

1000P_0402_50V7K@C1139

1000P_0402_50V7K

C1140

1

@

2

C1138

C1137

1000P_0402_50V7K@C1137

1000P_0402_50V7K

EMI

1

@

2

Title

HD Audio Codec_CX20671

Size Document Number Rev

Custom

Date: Sheet

SPK_R2+_CONN

1000P_0402_50V7K@C1140

1000P_0402_50V7K

1

2

SPK_L1-_CONN SPK_L2+_CONN

1000P_0402_50V7K@C1138

1000P_0402_50V7K

1

2

Thursday, November 01, 2012

ON.B152

ON.B152ON.B152

5

+5VS

Headphone

JSPK2

1

2

3

G1

4

G2

ACES_85204-02001

ACES_85204-02001 ME@

ME@

JSPK1

1

2

3

GND

4

GND

ACES_85205-02001

ACES_85205-02001 ME@

ME@

Port B Port A

External MIC

35 59

of

1.A

1

2

3

4

5

SATA HDD CONN.

PN:SP01001HE00

JHDD1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

V33

9

V33

10

V33

11

GND

12

GND

13

GND

14

V5

15

V5

16

V5

17

GND

18

Reserved

19

GND

20

V12

21

V12

22

V12

SANTA_198002-1

SANTA_198002-1 ME@

ME@

23

GND

24

GND

+5VS

C2403

@

+3VS

+5VS

1000P_0402_50V7K@C2403

1000P_0402_50V7K

1

2

SATA_PTX_DRX_P0 SATA_PTX_DRX_N0

SATA_DTX_C_PRX_N0 SATA_DTX_C_PRX_P0

C2406

C2405

1U_0402_6.3V6K@C2405

1U_0402_6.3V6K

1

@

2

10U_0603_6.3V6M

1 2

C2401 0.01U_0402_16V7KC2401 0.01U_0402_16V7K

1 2

C2402 0.01U_0402_16V7KC2402 0.01U_0402_16V7K

J2401@

2

112

JUMP_43X79

SATA_DTX_PRX_N0 SATA_DTX_PRX_P0

5VS_HDD

Pin 18 to GND for Gen 3

SATA_PTX_DRX_P013

A A

B B

SATA_PTX_DRX_N013

SATA_DTX_C_PRX_N013 SATA_DTX_C_PRX_P013

HDD_DETECT#41

U2401

2

ST

14

Vs

15

Vs

3

COM

5

COM

6

COM

7

COM

LIS34ALTR_LGA16_4X4

2MM

2MM @

@

+3VS

11/17

12

R2138

4

J2402

APS G-SensorSATA ODD CONN.

12

Xout

10

Yout

8

Zout

1

NC

4

NC

9

NC

11

NC

13

NC

16

NC

21

APS_GND

AP2301GN-HF_SOT23-3

1

C2426

0.01U_0402_16V7K

2

2014/07/01

VOUTX VOUTY

Q2402

3 1

2

1

C2418

0.01U_0402_16V7K

2

1 2

R2403 56K_0402_5%R2403 56K _0402_5%

1 2

R2404 56K_0402_5%R2404 56K _0402_5%

C2414

.1U_0402_16V7K

C2414

.1U_0402_16V7K

C2411

.1U_0402_16V7K

C2411

.1U_0402_16V7K

1

2

APS_GND

+3VS_GS

R2409

1 2

0_0603_5%

1

C2417

0.1U_0402_16V4Z

2

Title

HDD/ODD/Card reade r/G-Sen

Size Document Number Rev

Custom

Date: Sheet

C2412

1

2

1

C2420

10U_0603_6.3V6M

@

2

ON.B152

ON.B152ON.B152

Thursday, November 01, 2012

ON.B152ON.B152

.1U_0402_16V7K

5

C2415

1

2

.1U_0402_16V7K

GS_VOUTY 41

36 59

of

1.A

PN:SP01000TU10

for Edge 14''

JODD1

1

GND1

1 2

2 3 4 5 6 7

8

9 10 11 12 13

A+_RX+ A-_RXGND2 B-_TXB+_TX+ GND3

DP +5V_1 +5V_2 MD GND4 GND5

SUYIN_127382FB013M283ZR

SUYIN_127382FB013M283ZR ME@

ME@

GND6 GND7

14 15

GS_SELFTEST41 GS_VOUTX 41

+3VS +3VS_GS

1 2

R2405 @ 0_0603_5%R2405 @ 0_0603_5%

11/17 BOM modify

GS_ON#41

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

1U_0402_6.3V6K

ODD_EN

1

SATA_PTX_DRX_P2 SATA_PTX_DRX_N2

SATA_DTX_C_PRX_N2 SATA_DTX_C_PRX_P2

+5VS_ODD

+5VS+VSB

1

C2416

2

12

R2411

1.5M_0402_5%

1 2

C2408 0.01U_0402_16V7KC2408 0.01U_0402_16V7K

1 2

C2409 0.01U_0402_16V7KC2409 0.01U_0402_16V7K

1 2

R2406 0_0402_5%R2406 0_0402_5%

Q2406

Q2406 2N7002K_SOT23-3

2N7002K_SOT23-3

1 3

D

S

D

S

G

2

1 2

R2407 @ 0_0805_5%R2407 @ 0_0805_5%

D

6

S

45 2 1

Q2401

G

3

SI3456DDV-T1-GE3_TSO P6

1

C2419

0.1U_0603_25V7K

2

ODD_DETECT#_R

+5VS_ODD

SATA_DTX_PRX_N2 SATA_DTX_PRX_P2

+5VS_ODD

ODD_DA#_R

C2425

0.1U_0402_16V4Z@C2425

0.1U_0402_16V4Z

1

@

2

C2407

10U_0603_6.3V6M

1

2

SATA_PTX_DRX_P213 SATA_PTX_DRX_N213

SATA_DTX_C_PRX_N213 SATA_DTX_C_PRX_P213

ODD_EN#18

ODD_DA#17

ODD_DET#13

ON_ODD_DET14

470K_0402_5%

Q2403

2N7002K_SOT23-3

R2408

2

12

13

D

G

S

C C

D D

SATA_PTX_DRX_P2 SATA_PTX_DRX_N2

SATA_DTX_PRX_N2 SATA_DTX_PRX_P2

ODD_DETECT#_R +5VS_ODD

ODD_DA#_R

ODD_DA#

C2155 220P_0402_50V7KC2155 220P _0402_50V7K

1

12

@

RFC45

RFC46

2

47P_0402_50V8J

2200P_0402_50V7K

For RF

12

R2402

R2402 100K_0402_5%

100K_0402_5%

C2410

.1U_0402_16V7K

C2410

.1U_0402_16V7K

C2413

10U_0603_6.3V6M

C2413

10U_0603_6.3V6M

1

2

APS_GND

@ R2138

@

150K_0402_5%

R2410

1 2

GS_ON#

150K_0402_5%

LC Future Center Secret Data

Deciphered Date

1

2

3

4

5

USB 3.0 Conn.

A A

D2411

USB3_TX2_C_P

L2406

L2402

B B

+5VALW

Low Active

U2409

USB_ON#

1 2

4

G547I2P81U_MSOP8

C2421

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1 2

USB_ON#41

C C

GND

VOUT VOUT

VIN VIN3VOUT EN

W=80mils

+USB_VCCB

8 7 6 5

FLG

1000P_0402_50V7K

1

2

1

C2424

C2424 1000P_0402_50V7K

1000P_0402_50V7K @

@

2

C2216

USB_OC1# 17

USB20_N2 US B20_N2_C

USB20_P2 USB20_P2_C

USB20_P2_C

USB20_P0 USB20_P0_C

USB20_N0 USB20_N0_C

2

3

WCM-2012-900T_4P

PN: SM070000K00 x 1

D2403

1

I/O1

2

GND

3

I/O2

AZC099-04S.R7G_SOT23-6

PN: SC300001G00

L2401

2

3

WCM-2012-900T_4P

PN: SM070000K00 x 1

1

4

I/O3

+USB_VCCB

5

VDD

I/O4

1

4

9/27 ESD

6

USB20_N2_C

USB3TXDP2 USB3_TX2_C_P

USB3TXDN2 USB3_TX2_C_N

USB3_TX2_P17

USB3_TX2_N17 USB20_P217

USB20_N217 USB3_RX2_P17

USB3_RX2_N17

USB3TXDP0 USB3_TX0_C_P

USB3TXDN0 USB3_TX0_C_N

3

2

WCM-2012HS-900T

3

2

WCM-2012HS-900T

L2406

4

1

PN: SM070001S00 x 2

1 2

L2408

4

1

USB3_RX2_P USB3_RX2_C_P

USB3_RX2_N USB3_RX2_C_N

USB3TXDP2

C25110.1U_0402_10V6K C25110.1U_0402_10V6K

USB3TXDN2

C24460.1U_0402_10V6K C24460.1U_0402_10V6K

USB3_RX0_P USB3_RX0_C_P

USB3_RX0_N

PN: SM070001S00 x 2

1 2

USB3TXDP0

USB3_TX0_P17

USB3_TX0_N17 USB20_P017

USB20_N017 USB3_RX0_P17

USB3_RX0_N17

D2401

D D

USB20_P0_C

1

I/O1

2

GND

3

I/O2

AZC099-04S.R7G_SOT23-6

4

I/O3

+USB_VCCB

5

VDD

I/O4

6

9/27 ESD

USB20_N0_C

PN: SC300001G00

1

2

USB20_P0 USB20_P0_C

USB20_N0 USB20_N0_C

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

1 2

C24450.1U_0402_10V6K C24450.1U_0402_10V6K

USB3TXDN0

C24440.1U_0402_10V6K C24440.1U_0402_10V6K

2012/07/01

L2407

3

2

WCM-2012HS-900T

3

2

WCM-2012HS-900T

LC Future Center Secret Data

4

1

1 2

1 2 1 2

1 2

L2409

4

1

1 2

1 2 1 2

1 2

Deciphered Date

4

R24250_0402_5% @ R24250_0402_5% @

R24260_0402_5% @ R24260_0402_5% @ R24210_0402_5% @ R24210_0402_5% @

R24220_0402_5% @ R24220_0402_5% @ R24650_0402_5% @ R24650_0402_5% @

R24660_0402_5% @ R24660_0402_5% @

USB3_RX0_C_N

R24610_0402_5% @ R24610_0402_5% @

R24620_0402_5% @ R24620_0402_5% @ R24130_0402_5% @ R24130_0402_5% @

R24120_0402_5% @ R24120_0402_5% @ R24670_0402_5% @ R24670_0402_5% @

R24680_0402_5% @ R24680_0402_5% @

+USB_VCCB

USB3_TX2_C_P

USB3_TX2_C_N USB20_P2_C

USB20_N2_C USB3_RX2_C_P

USB3_RX2_C_N

USB3_TX0_C_P

USB3_TX0_C_N

USB3_RX0_C_P

USB3_RX0_C_N

PN:DC233008A00

2014/07/01

JUSB2

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND D-2GND

6

SSRX+

4

GND

5

SSRX-

SUYIN_020053GR009M2106L

SUYIN_020053GR009M2106L ME@

ME@

PN:DC233008A00

+USB_VCCB

C2422

1

+

2

JUSB3

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND D-2GND

6

SSRX+

4

GND

5

SSRX-

SUYIN_020053GR009M2106L

SUYIN_020053GR009M2106L ME@

ME@

USB3_TX2_C_N

USB3_RX2_C_P

USB3_RX2_C_N

10 11

GND

12

GND

13

GND

150U_B2_6.3VM_R35M+C2422

150U_B2_6.3VM_R35M

C2423

470P_0402_50V7K

C2423

470P_0402_50V7K

1

2

10 11

GND

12

GND

13

GND

Title

USB 3.0 CONN.

Size Document Number Rev

Custom

Date: Sheet

1

2

4

5

3

YSCLAMP0524P_SLP 2510P8-10-9

USB3_TX0_C_P

USB3_TX0_C_N

USB3_RX0_C_P

USB3_RX0_C_N

Thursday, November 01, 2012









8

D2415

1



2



4



5

3



8

YSCLAMP0524P_SLP 2510P8-10-9

ON.B152

ON.B152ON.B152

5

















9

USB3_TX2_C_P

8

USB3_TX2_C_N

7

USB3_RX2_C_P

6

USB3_RX2_C_N

9

USB3_TX0_C_P

8

USB3_TX0_C_N

7

USB3_RX0_C_P

6

USB3_RX0_C_N

37 59

1.A

of

1

Mini-Express Card for WLAN(Half)

Mini-Express Card(WLAN)

PN:SP07000JP00

A A

B B

WLAN_WAKE#41

WLBT_OFF_5#13 WLAN_CLKREQ1#14

CLK_PCIE_WLAN1#14 CLK_PCIE_WLAN114

BT_DET#17

PCIE_PRX_DTX_N214 PCIE_PRX_DTX_P214

PCIE_PTX_C_DRX_N214 PCIE_PTX_C_DRX_P214

EC_TX_P80_DATA40,41 EC_RX_P80_CLK40,41

WLBT_OFF_51#18

9/19

WLAN_WAKE#

WLBT_OFF_5# WLAN_CLKREQ1#

R2427 1K_0402_5%R2427 1K_0402_5%

+3VS_AOAC

EC_TX_P80_DATA EC_RX_P80_CLK

1 2

R2434 0_0402_5%R2434 0_0402_5%

1 2

R2432

R2432 1 2 1 2

R2433

R2470

1K_0402_5%

For EC to detect debug card insert.

100K_0402_5%

R2435

BT_OFF#_R

PCI_RST#_R CLK_PCI_DB_R

100_0402_1%

100_0402_1% 100_0402_1%

100_0402_1%

12

2

JMINI2

112 334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

GND153GND2

BELLW_80003-3041

ME@

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

J2403

JUMP_43X79

@

+1.5VS+3VS_AOAC+3VS +1.5VS+3VS_AOAC

1

2

LPC_FRAME#_R LPC_AD3_R LPC_AD2_R LPC_AD1_R LPC_AD0_R

RF_OFF# PLT_RST#

SMB_CLK_S3 SMB_DATA_S3

RF_OFF# 41 PLT_RST# 14,17,22,39,40,41,42,5

SMB_CLK_S3 11,12,14,39 SMB_DATA_S3 11,12,14,39

USB20_N10 17 USB20_P10 17

For AOAC assessment

if AOAC enable +3VS_AOAC always ON if AOAC disable +3VS_AOAC same +3VS

AOAC_WLAN41

from EC

C2452

1

2

3

10U_0603_6.3V6M

2N7002K_SOT23-3

C2455

0.1U_0402_16V4Z

C2455

0.1U_0402_16V4Z

1

2

R2482

470K_0402_5%

AOAC@

2

G

Q2404

AOAC@

Power

+3VS

+3V

+1.5VS

+VSB

12

13

WLAN_EN

D

S

Primary Power (mA)

1000

330

500

For RF

12

@

RFC30

2200P_0402_50V7K

C2509

1U_0402_6.3V6K

AOAC@

R2481

1.5M_0402_5%

1.5M_0402_5% AOAC@

AOAC@

Mini Card Power Rating

NormalPeak

750

250

375

+3VALW

1

@

RFC29

2

47P_0402_50V8J

+3VALW

1

2

12

R2485

R2483

1 2

0_0402_5%

AOAC@

@

1 2

D

6

2 1

G

3

4

Auxiliary Power (mA)

Normal

250 (wake enable)

5 (Not wake enable)

+3VS_AOAC

0_0805_5%R2485

0_0805_5%

S

45

Q2400

Q2400 SI3456DDV-T1-GE3_TSO P6

SI3456DDV-T1-GE3_TSO P6 AOAC@

AOAC@

1

C2501

C2501 .1U_0603_25V7K

.1U_0603_25V7K

2

AOAC@

BT Connector

Reserve for SW mini-pcie debug card. Series resistors closed to KBC side.

LPC_FRAME#_R LPC_AD3_R LPC_AD2_R LPC_AD1_R LPC_AD0_R PCI_RST#_R CLK_PCI_DB_R

1 2

R2449 0_0402_5%R2449 0_0402_5%

1 2

R2455 0_0402_5%R2455 0_0402_5%

1 2

R2456 0_0402_5%R2456 0_0402_5%

1 2

R2457 0_0402_5%R2457 0_0402_5%

1 2

R2458 0_0402_5%R2458 0_0402_5%

1 2

R2459 0_0402_5%R2459 0_0402_5%

1 2

R2428 0_0402_5%R2428 0_0402_5%

LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 PLT_RST# CLK_PCI_DB

5

LPC_FRAME# 13,40,41 LPC_AD3 13,40,41 LPC_AD2 13,40,41 LPC_AD1 13,40,41 LPC_AD0 13,40,41

CLK_PCI_DB 17,40

Mini-Express Card for WWAN/mSATA(Full)

2

112

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74

77

J2406@JUMP_43X79J2406@JUMP_43X79

2

112

J2404@JUMP_43X79J2404@JUMP_43X79

R2441

1 2

10K_0402_5%

3G@

UIM_RST UIM_CLK UIM_DATA +UIM_PWR

R2438

R2446

@R2446

@

1 2

10K_0402_5%

mSATA_PCH18

mSATA_DETEC#41

USB20_P1217 USB20_N1217

C C

3G_DET#18

SATA_DTX_C_PRX_P113 SATA_DTX_C_PRX_N113

SATA_PTX_DRX_N113 SATA_PTX_DRX_P113

PLT_RST#

D D

10K_0402_5%

1 2

R294 0_0402_5%R294 0_0402_5%

SSD@

1 2

R2442 10K_0402_5%

1 2

R2440 10K_0402_5%@R2440 10K_0402_5%@

1 2

R2475 10K_0402_5%3G@R2475 10K_0402_5%3G@

0.01U_0402_16V7K

0.01U_0402_16V7K 1 2

C2461

1 2

C2462

0.01U_0402_16V7K

1 2

R2437 0_0402_5%@R2437 0_0402_5%@

1 2

R2473 10K_0402_5%3G@R2473 10K_0402_5%3G@

1 2

R2474 10K_0402_5%3G@R2474 10K_0402_5%3G@

SATA_DTX_PRX_P1 SATA_DTX_PRX_N1

SATA_PTX_DRX_N1 SATA_PTX_DRX_P1

JMINI1

1

PRESENCE#

3

GND

5

GND

7

USB_D+

9

USBD-

11

GND

13

NC

15

NC

17

NC

19

NC

21

WW AN_DETECT#

23

RESERVED1

25

RESERVED2

27

GND

29

USB3.0-RX-

31

USB3.0-RX+

33

GND

35

USB3.0-TX-

37

USB3.0-TX+

39

GND

41

SATA-B+

43

SATA-B-

45

GND

47

SATA-A-

49

SATA-A+

51

GND

53

RESERVED3

55

RESERVED4

57

GND

59

ANTCTRL0

61

ANTCTRL1

63

ANTCTRL2

65

ANTCTRL3

67

RESET#

69

PCIE_DETECT

71

GND

73

GND

75

USB3.0_DETECT

76

PEG1

TYCO_2199230-3 M E@

3.3VAUX1

3.3VAUX2

FULL_CARD_POWER_OFF #

W_DISABLE#

UIM-RFU

UIM-RESET

UIM-CLK

UIM-DATA

UIM-PWR

DEVSLP

RESERVED5 RESERVED6 RESERVED7

SIM_DETECT

SUSCLK

3.3VAUX3

3.3VAUX4

3.3VAUX5

LED#

AUDIO0 AUDIO1 AUDIO2 AUDIO3

GNSS0 GNSS1 GNSS2 GNSS3 GNSS4

COEX3 COEX2 COEX1

PEG2

NC NC NC NC

NC3 NC4

3G@R2438

3G@

1 2

0_0402_5%

+3VS_AOAC

+3VS

+3VS_WWAN

GPS_OFF# 18

UIM_DET

3G_OFF# 18

AZC099-04S.R7G_SOT23-6

+1.8VS

R2463

R2463 10K_0402_5%

10K_0402_5% 3G@

3G@

1 2

R2464

R2464 10K_0402_5%

10K_0402_5% 3G@

3G@

1 2

D2406

@

+3VS

5

6

I/O4

VDD

I/O23GND2I/O1

4

I/O3

1

+3VS_WWAN

C2451

1

2

+UIM_PWR

UIM_RST UIM_VPP UIM_CLK UIM_DATA

0.1U_0402_16V4Z

10U_0603_6.3V6M

@

PN:SP01072413J

C2453

1

2

UIM_VPP

47P_0402_50V8J@C2453

47P_0402_50V8J

@

UIM_DET

C2459

3G@

For RF

12

R2436

1 2

20K_0402_5%

20K_0402_5% R2439

1 2

10K_0402_5%

1

2

RFC31

2200P_0402_50V7K

3G@R2436

3G@

+UIM_PWRUIM_DATA

@R2439

@

+UIM_PWR

JSIM1

1

CD

2

C1

3

C5

4

C2

5

C6

6

C3

7

C7

8

GND

9

GND

PLAST_CE1S-148-H-N_7P -T

ME@

PN:SP

+UIM_PWR

C2457

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K 3G@

3G@

1

2

40mil

1

DAN217T146_SC59-3

1

C2458

0.1U_0402_16V4Z

0.1U_0402_16V4Z 3G@

3G@

2

+3VS

D2407@

3

2

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

PCIe-WLAN and WWAN_mSATA

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

38 59

of

1.A

1

INT_KBD Conn.

Fn_LED#

KSI[0..7]

A A

KSO[0..15]

KSO2

C2470 @ 100P_0402_50V8JC2470 @100P _0402_50V8J

KSO15

C2472 @ 100P_0402_50V8JC2472 @100P _0402_50V8J

KSO6

C2476 @ 100P_0402_50V8JC2476 @100P _0402_50V8J

KSO8

C2478 @ 100P_0402_50V8JC2478 @100P _0402_50V8J

KSO13

C2480 @ 100P_0402_50V8JC2480 @100P _0402_50V8J

KSO12

C2482 @ 100P_0402_50V8JC2482 @100P _0402_50V8J

KSO11

C2484 @ 100P_0402_50V8JC2484 @100P _0402_50V8J

KSO10

C2486 @ 100P_0402_50V8JC2486 @100P _0402_50V8J

KSO3

C2488 @ 100P_0402_50V8JC2488 @100P _0402_50V8J

KSO4

C2490 @ 100P_0402_50V8JC2490 @100P _0402_50V8J

KSI0

C2492 @ 100P_0402_50V8JC2492 @100P _0402_50V8J

KSO0

C2494 @ 100P_0402_50V8JC2494 @100P _0402_50V8J

KSO17

C2506 @ 100P_0402_50V8JC2506 @100P _0402_50V8J

KSO18

C2507 @ 100P_0402_50V8JC2507 @100P _0402_50V8J

B B

CONN PIN define need double check

1 2

KSI[0..7] 41

KSO[0..15] 41

F1_LED#

F4_LED#

KSO1

KSO7

KSI2

KSO5

KSI3

KSO14

KSI7

KSI6

KSI5

KSI4

KSO9

KSI1

KB_FN

KSO16

1 2

C2467 @ 100P_0402_50V8JC2467 @ 100P_0402_50V8J

1 2

C2468 @ 100P_0402_50V8JC2468 @ 100P_0402_50V8J

1 2

C2469 @ 100P_0402_50V8JC2469 @ 100P_0402_50V8J

1 2

C2471 @ 100P_0402_50V8JC2471 @ 100P_0402_50V8J

1 2

C2473 @ 100P_0402_50V8JC2473 @ 100P_0402_50V8J

1 2

C2477 @ 100P_0402_50V8JC2477 @ 100P_0402_50V8J

1 2

C2479 @ 100P_0402_50V8JC2479 @ 100P_0402_50V8J

1 2

C2481 @ 100P_0402_50V8JC2481 @ 100P_0402_50V8J

1 2

C2483 @ 100P_0402_50V8JC2483 @ 100P_0402_50V8J

1 2

C2485 @ 100P_0402_50V8JC2485 @ 100P_0402_50V8J

1 2

C2487 @ 100P_0402_50V8JC2487 @ 100P_0402_50V8J

1 2

C2489 @ 100P_0402_50V8JC2489 @ 100P_0402_50V8J

1 2

C2491 @ 100P_0402_50V8JC2491 @ 100P_0402_50V8J

1 2

C2493 @ 100P_0402_50V8JC2493 @ 100P_0402_50V8J

1 2

C2495 @ 100P_0402_50V8JC2495 @ 100P_0402_50V8J

1 2

C2496 @ 100P_0402_50V8JC2496 @ 100P_0402_50V8J

1 2

C2497 @ 100P_0402_50V8JC2497 @ 100P_0402_50V8J

1 2

R2486 0_0402_5%

+3VS

2

PN:SP011208010

JKB1

FN_LED#18 F1_LED#18 F4_LED#18

KB_FN41

KSO1741 KSO1841

300_0402_5%

32

KSI1

31

KSI7

30

KSI6

29

KSO9

28

KSI4

27

KSI5

26

KSO0

25

KSI2

24

KSI3

23

KSO5

22

KSO1

21

KSI0

20

KSO2

19

KSO4

18

KSO7

17

KSO8

16

KSO6

15

KSO3

14

KSO12

13

KSO13

12

KSO14

11

KSO11

10

KSO10

9

KSO15

R372

12

Fn_LED# F1_LED# F4_LED#

KB_FN

KSO16 KSO17 KSO18

8 7 6 5 4 3 2 1

32

GND2

31

GND1 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

JAE_FL10S032HA1

ME@

34 33

3

Click pad

PN:SP01001BX00

1 2

+5VS

SMB_DATA_S311,12,14,38

CP_RESET#41 TP_CLK41 TP_DATA41

+5VS

1 2

R2443 4.7K_0402_5%R2443 4.7K _0402_5%

1 2

R2444 4.7K_0402_5%R2444 4.7K _0402_5%

1 2

R2445 4.7K_0402_5%R2445 4.7K _0402_5%

1 2

R2447 100K_0402_1%R2447 100K_0402_1%

SMB_CLK_S311,12,14, 38

C2474

C2474 100P_0402_50V8J

100P_0402_50V8J @

@

R2469 0_0402_5%R2469 0_0402_5%

1 2

R2479 0_0402_5%R2479 0_0402_5%

CP_RESET# TP_CLK TP_DATA

1

C2475

C2475 100P_0402_50V8J

100P_0402_50V8J

2

@

TP_CLK2

TP_DATA2

TP_RESET

CP_RESET#

TP_DATA2 TP_CLK2

TP4RST41 BYPASS_PAD41

4

5

Track point

JCP1

12

GND

11

GND

10

9

8

7

6

5

4

3

2

1

ACES_51522-01201-001

ME@

PN:SP01120802J

14 13

TP_RESET41

TP_CLK

TP_DATA

2

3

1

D2408

D2408 PJDLC05_SOT23-3

PJDLC05_SOT23-3 @

@

0.1U_0402_16V4Z

C2508

TP_DATA2 TP_RESET

TP_CLK2

D2409

D2409 PJDLC05_SOT23-3

PJDLC05_SOT23-3 @

@

+5VS

1

2

JTP1

1

2

3

4

5

6

7

8

9

10

11 12

11

GND1

12

GND2

JAE_FL10S012HA1

ME@

TP_DATA2

TP_CLK2

2

3

1

13 14

PN: SCA00000A0J X 2

Fintek thermal sensor placed near by TOP DDR3

+3VS +3VS

12

R2448

R2448 10K_0402_5%

10K_0402_5% @

GND

12

@

10

EC_SMB_CK2

9

EC_SMB_DA2

8

7

R2450

6

BOTTOM DDR3

1

C

2

Q2407

B

MMST3904-7-F_SOT323-3

E

3

TOP CPU_CORE

1

C

2

Q2408

B

MMST3904-7-F_SOT323-3

E

3

1 2

@R2450

@

0_0402_5%

EC_FAN_PWM41

EC_TACH41

FAN_ID41

EC_SMB_CK2 14,22,41

EC_SMB_DA2 14,22,41

MAINPWON 41,45,46,48

1

C2503

C2503 1000P_0402_50V7K

1000P_0402_50V7K @

@

2

U2407

1

C C

C2498

0.1U_0402_16V4Z

Close U2407

2200P_0402_25V7K

D D

2200P_0402_25V7K

REMOTE1+

1

REMOTE1-

REMOTE2+

2

REMOTE2-

REMOTE1+

1

C2502

2

REMOTE1- REMOTE1-

REMOTE2+

1

C2504

2

REMOTE2-

DP1

3

DN1

4

DP2/DN3

5

DN2/DP3

F75303M_MSOP10

Address 1001_101xb

2nd source SA000029210-->EMC1403-2-AIZL-TR

1

VDD

2

SMCLK

SMDATA

ALERT#

THERM#

REMOTE1+

C2500

@ C2500

@

2200P_0402_25V7K

REMOTE2+

C2505

@ C2505

@

2200P_0402_25V7K

REMOTE2-

REMOTE1,2+/-: Trace width/space:10/10 mil Trace length:<8"

FAN CONN.

+5VS

12

0_0603_5%

0_0603_5% R2478

R2478

C2499 1U_0402_6.3V6K@C2499 1U_0402_6.3V6K@

+VCC_FAN1

40mil

PN:SP02000U900

1 2

JFAN1

1

2

3

4

GND

5

GND

ACES_85205-05001

ACES_85205-05001 ME@

ME@

6 7

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

Audio+CR Board

+5VALW

+3VALW +3VS

LOGO_LED#32,41 USB_OC0#17 AOU_EN41 AOU_CTL241 AOU_CTL341

USB20_N917 USB20_P917

PCIE_PRX_DTX_P114 PCIE_PRX_DTX_N114

PCIE_PTX_C_DRX_P114 PCIE_PTX_C_DRX_N114

CARD_CLKREQ#14 CLK_PCIE_CARD14 CLK_PCIE_CARD#14 PLT_RST#14,17,22,38,40,41,42,5

LOGO_LED# USB_OC0# AOU_EN AOU_CTL2 AOU_CTL3

USB20_N9 USB20_P9

PCIE_PRX_DTX_P1 PCIE_PRX_DTX_N1

PCIE_PTX_C_DRX_P1 PCIE_PTX_C_DRX_N1

CARD_CLKREQ# CLK_PCIE_CARD CLK_PCIE_CARD# PLT_RST#

need change to 28 Pin

LC Future Center Secret Data

Deciphered Date

2012/07/01

Deciphered Date

JUCR

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

GND1

30

GND2

ACES_88194-2841

ACES_88194-2841 ME@

ME@

Title

KB/TP/Thermal S ensor/Audio

2014/07/01

4

KB/TP/Thermal S ensor/Audio

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

39 59

of

1.A

1

2

3

4

5

Power Button CONN.

ON/OFF switch

SW2

3

Power Button TOP Side

A A

Bottom Side

B B

1

2

J2405

1 2

SHORT PADS

ON/OFFBTN#

SMT1-05_4P

5

6

@

4

R2460

1 2

100K_0402_5%

1

EC_ON41,48

100K_0402_5%

Power Button

+3VLP

12

R2453

R2453 100K_0402_5%

100K_0402_5%

@R2460

@

3

2

EC_ON

R2454

51_ON#

13

D

2

G

S

12

D2412

D2412 BAV70W_SOT323-3

BAV70W_SOT323-3

Q2409

Q2409 2N7002K_SOT23-3

2N7002K_SOT23-3

ON/OFF 41

51_ON# 45

PN:SP01000R400 PN:SP01000R400

+3VLP +3VALW

12

R113

0_0402_5%

0_0402_5% R114

R114

LID_SW#41

ON/OFFBTN#42

ON/OFFBTN#

R113 0_0402_5%

0_0402_5%

@

11/21

JPWR1

1

2

3

4

5

GND

6

GND

ACES_88514-0401

ACES_88514-0401 ME@

ME@

USB20_P1117 USB20_N1117

AZC199-02SPR7G_SOT23- 3

Finger Print Board

+3VS

3

223

1

C2512

D2413

FP@

C2512

0.1U_0402_10V6K

1

FP@

2

JFPB1

8

GND2

7

GND1

6

5

4

3

2

1

ACES_88514-0060N-071

ME@

Touch Panel

C2513

Touch@

+3VS

JTouch

1

2

3

4

5

6

7

8

9

10

11

GND1

12

GND2

ACES_50463-0104A-P01

ACES_50463-0104A-P01 ME@

1

2

ME@

TPM

+3VS

+3VALW+3VS

JDB3

C5109

JDB3

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

ACES_85201-1205N

ME@

13 14

U10

1

SDA

2

SCL

3

VNC

7

PP

6

DataAvailable

9

C C

AcceptCmd

4

GND1

11

GND2

18

GND3

5

NC

8

NC

12

NC

13

NC

14

NC

ST33ZP24AR28PVSC TSSOP 28P

TPM@

VPS1 VPS1 VPS1 VPS1 VPS1 VPS1 VPS1

LRESET#

24

VPS

10

VPS

28 27 26 23 22 20 17

25

NC

21

NC

19

NC

15

NC

16

TPM@

1 2

C589 10U_0603_6.3V6M

1 2

C645 0.1U_0402_16V4Z

TPM@

SERIRQ LPC_AD0 LPC_AD1 LPC_FRAME# LPC_AD2 LPC_AD3

CLK_PCI_TPM

PM_CLKRUN#

PLT_RST#

SERIRQ 13,41 LPC_AD0 13,38,40,41 LPC_AD1 13,38,40,41 LPC_FRAME# 13,38, 40,41 LPC_AD2 13,38,40,41 LPC_AD3 13,38,40,41

CLK_PCI_TPM 17

PM_CLKRUN# 15

PLT_RST# 14,17,22,38,39,41,42,5

LPC_FRAME#13,38,40,41 LPC_AD313,38,40,41 LPC_AD213,38,40,41 LPC_AD113,38,40,41 LPC_AD013,38,40,41

CLK_PCI_DB17,38

EC_TX_P80_DATA38,41

EC_RX_P80_CLK38,41

Debug Conn.

PLT_RST#

CLK_PCI_DB

12P_0402_50V8J

@

SMB_DATA_TPanel14

SMB_CLK_TPanel14

USB20_N417 USB20_P417

0.1U_0402_10V6K

CLK_PCI_TPM

D D

RF 11/17

1

1 2

R317

10_0402_5%

TPM@

1 2

C159

22P_0402_50V8J

TPM@

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

PWR S/B/LID SW/TPM/RJ45

Size Document Number Rev

Custom

Wednesday, November 07, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

40 59

of

1.A

1

+3VALW_EC

1 2

L2201 0_0603_5%L2201 0_0603_5%

0.1U_0402_16V4Z

A A

+3VALW_EC

1 2

R2205 330K_0402_5%R2205 330K_0402_5%

R2201

1 2

10_0402_5%

1

CLK_PCI_EC

KSO1

KSO2

EC_SMB_CK1

EC_SMB_DA1

EC_SMB_CK1

EC_SMB_DA1

EC_FAN_PWM

EC_TACH

EC_SMB_CK2

EC_SMB_DA2

EC_SMB_CK2

EC_SMB_DA2

PCH_PWROK

1 2

C2209

22P_0402_50V8J

B B

C C

+3VALW

R2225 47K_0402_5%R2225 47K _0402_5%

R2227 47K_0402_5%R2227 47K _0402_5%

R2228 2.2K_0402_5%R2228 2.2K _0402_5%

R2230 2.2K_0402_5%R2230 2.2K _0402_5%

+3VLP

R2231 2.2K_0402_5%@R2231 2.2K_0402_5%@

R2232 2.2K_0402_5%@R2232 2.2K_0402_5%@

+3VS

R2452 10K_0402_5%@R2452 10K_0402_5%@

D D

R2451 10K_0402_5%R2451 10K _0402_5%

R2236 2.2K_0402_5%R2236 2.2K _0402_5%

R2237 2.2K_0402_5%R2237 2.2K _0402_5%

C2220 100P_0402_50V8J@C2220 100P_0402_50V8J@

C2221 100P_0402_50V8J@C2221 100P_0402_50V8J@

R2239 10K_0402_5%R2239 10K _0402_5%

0.1U_0402_16V4Z

1 2

L2202 0_0603_5%L2202 0_0603_5%

C2210

0.1U_0402_10V6K

RF

C2201

1

2

KSI[0..7]39

KSO[0..15]39

ODD_DA# EC_INVT_PWM

SUSCLK15

C2218

C2218 18P_0402_50V8J

18P_0402_50V8J @

@

1

2

ECAGND

+EC_AVCC

1

C2202

C2202 1000P_0402_50V7K

1000P_0402_50V7K

2

GATEA2018 KB_RST#18 SERIRQ13,40 LPC_FRAME#13,38,40 LPC_AD313,38,40 LPC_AD213,38,40 LPC_AD113,38,40 LPC_AD013,38,40

CLK_PCI_EC17 PLT_RST#14,17,22,38,39,40,42,5

EC_SCI#18 ADP_PROTECT46

KSI[0..7]

KSO[0..15]

KSO1739 KSO1839

EC_SMB_CK146,47 EC_SMB_DA146,47 EC_SMB_CK214,22,39 EC_SMB_DA214,22,39

PM_SLP_S3#15 PM_SLP_S5#15 EC_SMI#18 FB_CLAMP22,26,31 TP_RESET39 GS_ON#36 RF_OFF#38 +VSB_EN46 EC_TACH39

EC_TX_P80_DATA38,40 EC_RX_P80_CLK38,40 PCH_PWROK15 EC_FAN_PWM39 GS_SELFTEST36

1 2

R2221 0_0402_5%R2221 0_0402_5%

1 2

R2229 10M_0402_5%@R2229 10M_0402_5%@

@

Y2202

1 2

32.768KHZ_12.5PF_CM31532768DZFT

1

2

C2203

R2223

100K_0402_5%

11/14

1

C2219

C2219 18P_0402_50V8J

18P_0402_50V8J @

@

2

1

2

+3VALW+3VLP

1 2

R310 0_0603_5%@R310 0_0603_5%@

1 2

R313 0_0603_5%R313 0_0603_5%

0.1U_0402_16V4Z

C2205

0.1U_0402_16V4Z

C2205

0.1U_0402_16V4Z

C2204

0.1U_0402_16V4Z

C2204

0.1U_0402_16V4Z

1

2

KB_RST#

LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC

EC_RST# EC_SCI# ADP_PROTECT

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO17 KSO18

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

EC_SMI#

+VSB_EN EC_TACH EC_PME# EC_TX_P80_DATA EC_RX_P80_CLK PCH_PWROK EC_FAN_PWM

EC_RTCX1 SUSCLK_R

12

EC_RTCX1

SUSCLK_R

2

122 123

1

C2213

C2213 20P_0402_50V8

20P_0402_50V8

KB9012QF A3 LQFP 128P_14X 14

2

C2206

0.1U_0402_16V4Z

C2206

0.1U_0402_16V4Z

C2208

1

2

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

10

LPC_AD0

12

CLK_PCI_EC

13

PCIRST#/GPIO05

37

EC_RST#

20

EC_SCII#/GPIO0E

38

GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/GPIO44

78

EC_SMB_DA1/GPIO45

79

EC_SMB_CK2/GPIO46

80

EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

GPIO0D

25

EC_INVT_PWM/GPIO11

28

FAN_SPEED1/GPIO14

29

EC_PME#/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

PCH_PWROK/ GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

XCLKI/GPIO5D XCLKO/GPIO5E

+3VALW_EC

1000P_0402_50V7K

C2207

1000P_0402_50V7K

C2207

1000P_0402_50V7K

1

2

LPC & MISC

Int. K/B

Int. K/B Matrix

Matrix

9

22

33

EC_VDD/VCC

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SM Bus

GPIO

GND/GND

11

24

+EC_AVCC

+3VLP

111

67

96

125

EC_VDD0

EC_VDD/VCC

EC_VDD/AVCC

BATT_TEMP/GPIO38

AD Input

CPU1.5V_S3_GATE/GPXIOA00

HDA_SDO/GPXIOA02 VCIN0_PH/GPXIOD00

SPI Flash ROM

PECI_KB930/GPIO41

BATT_CHG_LED#/GPIO52

GPIO

BATT_LOW_LED#/G PIO55

PM_SLP_S4#/GPIO59

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04

PROCHOT_IN/GPXIOA05

H_PROCHOT#_EC/GPXIOA06

VCOUT0_PH/GPXIOA07

GPO

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

SA_PGOOD/GPXIOA11

GPI

PECI_KB9012/GPXIOD07

GND/GND

AGND/AGND

GND/GND

GND0

35

69

94

113

ECAGND

3

SD028330280 S RES 1/16W 33K +-5% 0402

SD028180280 S RES 1/16W 18K +-5% 0402

SD02882018J S RES 1/16W 8.2K +-5% 0402

SD028470180 S RES 1/16W 4.7K +-5% 0402

SD028240280 S RES 1/16W 24K +-5% 0402

R2233

U2201

GPIO0F

BEEP#/GPIO10

GPIO12

ACOFF/GPIO13

GPIO39

ADP_I/GPIO3A

GPIO3B GPIO42

IMON/GPIO43

DAC_BRIG/GPIO3C EN_DFAN1/GPIO3D

IREF/GPIO3E

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

WOL_EN/GPXI OA01

SPIDI/GPIO5B

SPIDO/GPIO5C

SPICLK/GPIO58

SPICS#/GPIO5A

ENBKL/GPIO40

FSTCHG/GPIO50

CAPS_LED#/GPIO53

PWR_LED#/GPIO54

SYSON/GPIO56

VR_ON/GPIO57

BKOFF#/GPXIOA08

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

LID_SW#/GPXI OD04

SUSP#/GPXIOD05

GPXIOD06

V18R

GC6_EVENT#

21

LOGO_LED

23

BEEP# 26 27

ACOFF

63

FAN_ID 64 65 66 75

BRDID 76

68 70 71 72

83

EC_MUTE# 84

USB_ON# 85 86 87

TP_CLK 88

TP_DATA

97

GC6_EVENT# 98 99 109

EC_GPIO

119 120 126

BATT_LEN# 128

BATT_TEMP

73 74 89 90 91 92 93 95

SYSON 121 127

100 101

EC_WAKE# 102 103

H_PROCHOT#_EC 104

MAINPW ON_R 105

BKOFF# 106

PBTN_OUT# 107 108

SA_PGOOD

110

ACIN 112

EC_ON 114

ON/OFF 115

LID_SW# 116

SUSP# 117

BYPASS_PAD_R 118

EC_PECI

124

+V18R

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

R2233

1 2

10K_0402_5%

BEEP# 35 WLAN_WAKE# 38 ACOFF 47

FAN_ID 39 GS_VOUTX 36 ADP_I 46,47 GS_VOUTY 36

IMVP_IMON 53

AOU_CTL2 39 PCH_PWR_EN# 43 AOU_CTL3 39 TP4RST 39

EC_MUTE# 35 USB_ON# 37 AOAC_WLAN 38 KB_FN 39 TP_CLK 39 TP_DATA 39

GC6_EVENT# 22 VGA_AC_DET 22 ME_FLASH 13

M_PWR_ON 43,56 PCH_SLPA# 15 BATT_LEN# 46 BATT_TEMP 46

ENBKL 16 ADP_ID 45 FSTCHG AOU_EN 39 mSATA_DETEC# 38 HDD_DETECT# 36 CP_RESET# 39 SYSON 49 VR_ON 53 PM_SLP_S4# 15

EC_RSMRST# 15 EC_WAKE# 18 VL_OFF# 47

BKOFF# 32 PBTN_OUT# 15,5 PCH_APWROK 15 SA_PGOOD 50

ACIN 15,42,47 EC_ON 40,48 ON/OFF 40 LID_SW# 40 SUSP# 31,43,49,51,9

1

C2214

4.7U_0805_10V4Z

2

2012/07/01

+3VALW

12

R2210

100K_0402_1%

BRDID

R2213

8.2K_0402_5%

1 2

+3VS

ODD_DETECT#

AOU_ILIM

AOU_CTL1

1 2

R2243 0_0402_5%@R2243 0_0402_5%@

1 2

R2215 0_0402_5%@R2215 0_0402_5%@

1 2

R2244 0_0402_5%R2244 0_0402_5%

1 2

R2245 43_0402_1%R2245 43_0402_1%

LC Future Center Secret Data

Deciphered Date

4

Vcc R2210

Board ID

0 1 2 3 4 5

Definition FAN_ID (pin 5) PCC 00 AVC 01 Delta 02

Muxless_STAT

2014/07/01

4

3.3V +/- 5%

100K +/- 1%

R2213

0K +/- 5%

8.2K +/- 5%

18K +/- 5%

33K +/- 5%

4.7K +/- 5%

24K +/- 5%

PROCHOT 46 MAINPWON 39,45,46,48

BYPASS_PAD 39 H_PECI 18,5

EC_PME#

5

min

VV

AD_BID

0 V

0.216 V 0.250 V

0.436 V

0.712 V

0.612 V 0.638 V 0.664 V

LOGO_LED

LID_SW#

TP4RST

VL_OFF#

EC_GPIO

KB_FN

VL_OFF#

EC_GPIO

EC_MUTE#

HDD_DETECT#

ADP_PROTECT

FAN_ID

USB_ON#

TP_CLK

TP_DATA

BATT_TEMP

ACIN

SA_PGOOD

VR_HOT#

R2214 0_0402_5%R2214 0_0402_5%

H_PROCHOT#_EC

+3VALW

12

R2220

R2220 10K_0402_5%

10K_0402_5%

1 2

R2222 0_0402_5%R2222 0_0402_5%

1 2

R2224 0_0402_5%@R2224 0_0402_5%@

1 3

D

Q2203

2N7002K_SOT23-3

@

Title

EC ENE-KB9012

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

typ

V

AD_BID

0 V 0 V

0.503 V

0.819 V

0.148 V

LOGO_LED#

13

D

Q2104

2

2N7002K_SOT23-3

G

S

1 2

R2203 100K_0402_5%R2203 100K_0402_5%

1 2

R2216 10K_0402_5%@R2216 10K_0402_5%@

1 2

R2218 10K_0402_5%@R2218 10K_0402_5%@

1 2

R2219 10K_0402_5%@R2219 10K_0402_5%@

1 2

R2226 10K_0402_5%R2226 10K_0402_5%

1 2

R2217 100K_0402_5%@R2217 100K_0402_5%@

1 2

R2206 10K_0402_5%@R2206 10K_0402_5%@

1 2

R2202 10K_0402_5%R2202 10K_0402_5%

1 2

R2204 100K_0402_5%R2204 100K_0402_5%

1 2

R2207 @ 100K_0402_1%R2207 @ 100K_0402_1%

1 2

R2208 10K_0402_5%R2208 10K_0402_5%

1 2

R2209 10K_0402_5%R2209 10K_0402_5%

1 2

R2211 4.7K_0402_5%R2211 4.7K_0402_5%

1 2

R2212 4.7K_0402_5%R2212 4.7K_0402_5%

1 2

C2211 100P_0402_50V8JC2211 100P_0402_50V8J

1 2

C2212 100P_0402_50V8JC2212 100P_0402_50V8J

1 2

C2510 0.1U_0402_10V6KC2510 0.1U_0402_10V 6K

1 2

13

D

2

G

S

G

+3VALW

2

ON.B152

ON.B152ON.B152

5

AD_BID

0.289 V

0.538 V

0.875 V

0.155 V0.141 V

Q2202

Q2202 2N7002K_SOT23-3

2N7002K_SOT23-3

Phasemax SDV FVT

LOGO_LED# 32,39

+3VALW_EC

+3VS

+3VLP

+3VALW

+5VALW

+5VS

H_PROCHOT# 5VR_HOT#46,53

(EC_PME#)

LAN_WAKE# 42

PCI_PME# 17

41 59

of

1.A

1

A A

2

3

USB3_TX3_P17 USB3_TX3_N17

USB3_RX3_P17 USB3_RX3_N17

USB20_P317 USB20_N317

4

JDCIN2

1

2

3

4

5

6

6 DISP_A0P_L16 DISP_A0N_L16 DISP_A1P_L16 DISP_A1N_L16

DISP_AUXP_CONN DISP_AUXN_CONN

HPD

ON/OFFBTN#40

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

G1

22

G2

23

G3

24

G4

ACES_50406-02071-001

ME@

5

+3VS

B B

20K_0402_5%

R2248

DISP_HPD16

1 2

0_0402_5%

R2249

12

HHPD

+3VS

HPD

5

1

P

4

OE#

A2Y

G

UV12 SN74AHCT1G125GW_SOT353-5UV12 SN74AHCT1G125GW_SOT353-5

3

RJ45 Board

+5VALW

JRJ45

1

DP/TMDS Switch Circuit (1)

C C

+3VS

R2487

@

100K_0402_1%

1 2

DISP_AUXP_R16 DISP_AUXN_R16

DISP_AUXP_R DISP_AUXN_R

1 2

R2247 0_0402_5%R2247 0_0402_5%

1 2

R2246 0_0402_5%R2246 0_0402_5%

DISP_AUXP_CONN DISP_AUXN_CONN

+3VALW +3VS +RTCBATT

PCIE_PRX_DTX_N414 PCIE_PRX_DTX_P414

PCIE_PTX_C_DRX_N414 PCIE_PTX_C_DRX_P414

CLK_PCIE_LAN#14 CLK_PCIE_LAN14 LAN_CLKREQ#14 PLT_RST#14,17,22,38,39,40,41,5 LAN_WAKE#41 PCIE_WAKE#15 PCH_LAN_25M14 ACIN15,41,47

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

GND1

22

GND2

ACES_88194-2041

ME@

D D

1

R2488

100K_0402_1% @

2

1 2

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

DP U3 CONN.

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sh eet

ON.B152

ON.B152ON.B152

5

42 59

of

1.A

1

+5VALW TO +5VS

+5VALW

U2301

AP4800BGM-HF_SO -8

8 7

C2302

10U_0603_6.3V6M

C2302

10U_0603_6.3V6M

C2301

10U_0603_6.3V6M

C2301

10U_0603_6.3V6M

1

A A

+VSB

B B

20mil

+VSB

2

20mil 10mil

1 2

R2301 150K_0402_5%R2301 150K_0402_5%

SUSP

Q2301

Q2301 2N7002K_SOT23-3

2N7002K_SOT23-3

C2310

10U_0603_6.3V6M

C2310

10U_0603_6.3V6M

1

2

1 2

R2310 470K_0402_5%R2310 470K_0402_5%

SUSP

2N7002KDWH_SOT363-6

6 5

2

C2311

Q2304A

1

2

13

G

+3VALW

10U_0603_6.3V6M

1

2

4

R2313

1 2

82K_0402_5%

D

S

+3VALW TO +3VS

U2302

AP4800BGM-HF_SO -8

8 7 6 5

10mil

R2321

1 2

0_0402_5%

61

5VS_GATE

4

1 2 3

12

C2309

0.01U_0603_50V7K

1 2 3

3VS_GATE

+5VS

@

C2303

1

2

12

C2304

10U_0603_6.3V6M

C2304

10U_0603_6.3V6M

10U_0805_10V4Z@C2303

10U_0805_10V4Z

1

2

+3VS

C2312

10U_0603_6.3V6M@C2312

10U_0603_6.3V6M

1

@

2

C2314

0.01U_0603_50V7K

C2313

10U_0603_6.3V6M

1

2

+1.5V to +1.5VS

10mil

C2321

+1.5VS+1.5V

C2319

10U_0603_6.3V6M

C2319

10U_0603_6.3V6M

C2320

1

2

0.1U_0603_25V7K

1

2

U2303

AP2301GN-HF_SOT23-3

C2315

10U_0603_6.3V6M

C2315

10U_0603_6.3V6M

1

2

C C

+3VALW

1 2

R2312 100K_0402_5%R2312 100K_0402_5%

20mil

SUSP#31,41,43,49,51,9

SUSP#

Q2306

Q2306 2N7002K_SOT23-3

2N7002K_SOT23-3

2

G

3 1

C2317

0.1U_0402_16V4Z

C2317

0.1U_0402_16V4Z

12

13

D

S

R2322

1 2

0_0402_5%

2

1.5VS_GATE

12

R2304

R2304 470_0603_5%

470_0603_5% @

@

13

D

S

12

R2309

R2309 470_0603_5%

470_0603_5% @

@

34

Q2304B

Q2304B 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

1U_0402_6.3V6K

2

SUSP

G

Q2303

Q2303 2N7002K_SOT23-3

2N7002K_SOT23-3 @

@

5

SUSP

12

R2311

R2311 470_0603_5%

470_0603_5% @

@

13

D

G

S

2N7002K_SOT23-3

2N7002K_SOT23-3 @

@

3

+3VALW TO +3VALW(PCH AUX Power)

Short J2301 for PCH VCCSUS3.3

2

+3V_PCH@

D

13

2

12

C2322

0.1U_0603_25V7K

0.1U_0603_25V7K @

@

+3V_PCH+3VALW

40mil40mil

C2308

1U_0402_6.3V6K

1

+3V_PCH@C2308

+3V_PCH@

2

J2301

C2306

10U_0603_6.3V6M

1

+3V_PCH@C2306

+3V_PCH@

2

+3V_PCH@

1 2

R171 0_0402_5%

PCH_PWR_EN#41

R171 0_0402_5%

112

JUMP_43X79

JUMP_43X79 @

@ Q1409

Q1409 AO3413_SOT23-3

AO3413_SOT23-3

S

G

12

R2318

R2318 20K_0402_5%

20K_0402_5%

4

SUSP31,49,52,9

SUSP#31,41,43,49,51,9

H

@

@ R2308

@

100K_0402_5%

SUSP

R2306

R2306 10K_0402_5%

10K_0402_5%

11/14

R2308

12

5

+5VALW

VL

12

R2303

R2303 100K_0402_5%

100K_0402_5%

L

13

D

2

Q2302

Q2302 2N7002K_SOT23-3

2N7002K_SOT23-3

G

S

11/21

FOR SBA Function POWER(always mount)

+3VALW

VL

SBA@

1 2

R2320 47K_0402_5%

@

1 2

R2319 47K_0402_5%

M_PWR_ ON41,56

from EC

2

SUSP

Q2311

M_PWR_ ON

2N7002KDWH_SOT363-6

H

2

Q2416A

SBA@

M_PWR_ON#

61

L

R2324

1 2

10K_0402_5% SBA@

C2327

10U_0603_6.3V6M

1

SBA@

2

Q2108

AP2301GN-HF_SOT23-3

3 1

2

+3VM_GATE

12

SBA@Q2108

SBA@

C2325

0.1U_0603_25V7K

0.1U_0603_25V7K SBA@

SBA@

+3VM

C2329

10U_0603_6.3V6M

12

1

2

SBA@

R351

SBA@R351

SBA@

390_0402_5%

34

5

M_PWR_ON#

Q2416B

2N7002KDWH_SOT363-6

SBA@

11/14

PJ801

+1.8VS+0. 75VS +1.05VS

12

R2314

R2314 22_0603_5%

22_0603_5%

D D

13

D

S

2

G

Q2307

Q2307 2N7002K_SOT23-3

2N7002K_SOT23-3

12

R2315

R2315 470_0603_5%

470_0603_5% @

@

13

D

2

G

Q2308

S

2N7002K_SOT23-3

2N7002K_SOT23-3 @

@

1

12

13

D

S

R2316

R2316 470_0603_5%

470_0603_5% @

@

2

G

Q2309

Q2309 2N7002K_SOT23-3

2N7002K_SOT23-3 @

@

SUSPSUSP SUSP

+1.05VS +1.05VS_PCH

PJ801

2

112

JUMP_43X118@

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

DC INTERFACE

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

43 59

of

1.A

1

2

S5G3

3

4

5

S0

RTC

RTCRST

EC_111 pin

Screw Hole & FD

A A

FD1

@

1

FIDUCIAL_C40M80

FD2

@

1

FIDUCIAL_C40M80

FD3

@

1

FIDUCIAL_C40M80

FD4

@

1

FIDUCIAL_C40M80

EC_ON

MAINPWON

+5VALW

+3VALW/VCCDSW

ON/OFF#

EC_RSMRST#

H18

H8

H8 H_4P2

H_4P2

1

@

H_2P5

H21

H_2P5X3P0N

H_2P5

H18

H_2P5N

@

1

H17

H_2P5

@

1

H16

@

1

@

1

H15

@

1

H14

H_2P5

@

1

H19

H6

H5

H_4P0N

@

1

GPU Screw

H7

H_4P0N

@

H1

H_4P0N

B B

H10

H_2P5

CPU Screw

@

1

H4

H_4P0N

H11

H_2P5

@

1

H20

H_2P5

@

1

H12

H22

H_2P5

H_2P5X3P0N

C C

H_2P5X3P0N

@

1

@

1

H2

H_4P0N

@

1

H3

H_4P0N

@

1

@

1

H23

H_2P5

@

1

@

1

H13

H_2P5

@

1

H_2P5

H19

@

1

PBTN_OUT#

SLP_S5#

SLP_S4#

SYSON

PCH_SLPA#

M_PWR_ON

+3VM

+1.05VM

PCH_APWROK

SLP_S3#

SUSP#

+1.5V_CPU_VDDQ

+1.8VS

+5VS

+3VS

+1.5VS

+0.75VS

+V1.05VS(VCCP)

+VCCSA

SA_PGOOD

VR_ON

99ms

PCH_POK

PCH_CLKOUT

DRAMPWROK

H_CPUPWRGD

CPU_VID

CPU_CORE

VGATE

SYS_PWROK

D D

1

2

BUF_PLT_RST#

SPI

DMI

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

ME and BIOS activity will continue

Tralning

Title

Screw Hole

Size Document Number Rev

Custom

Monday, November 05, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

44 59

1.A

of

5

PR101

PR101 750_0402_1%

750_0402_1%

+3VALW

2011_0929 PR103 for 0ohm change to 270ohm

JDCIN1

D D

ACES_50271-00701-001

JDCIN1

1

2

APDIN

F1

2

3

4

5

5 GND1 GND2

6

7

8 9

F1

1 2

7A_32V_0437007.WR

1 2

PR103

270_0402_1%

1 2

APDIN1

12

PC101

0.1U_0402_16V7K

1 2

SMB3025500YA_2P

12

100P_0402_50V8J

PC104

PC103

1000P_0402_50V7K

12

PL101

4

3

2

1

ADP_ID

AC Adapter 90W 65W

ADP_ID 41

A/D

PC102

680P_0603_50V7K

R(K ohm) open 10 ADP_ID(V) 3.3 1.65

Detection voltage >2.64 1.32~1.98

VIN

12

100P_0402_50V8J

PC106

PC105

1000P_0402_50V7K

+5VALW

VL

12

PR1208

10K_0402_5%

12

PR1209

10K_0402_5%

PR1210

10K_0402_5%

@

PR1214

10K_0402_5%

1

2

3

PU1203

IN+

VCC+

GND

OUT

IN-

LMV331IDCKRG4_SC70-5

+5VALW

VL

12

@

PR1215

10K_0402_5%

12

RT1

540_0402NEW_30%_PRF15BB541NB6RC

12

RT5

12

RT3

RT2

540_0402NEW_30%_PRF15BB541NB6RC

12

RT6

RT7

10K_0402_5%

12

RT4

12

RT8

VL

1

PC1226

PC1226 1U_0603_10V6K

1U_0603_10V6K

2

5

4

PR1211

1 2

0_0402_5%

MAINPWON 39,41,46,48

Thermal protect RT1 place to closed PQ312 with PU301 RT2 place to closed PQ401 with PU401

540_0402NEW_30%_PRF15BB541NB6RC

C C

540_0402NEW_30%_PRF15BB541NB6RC

RT3 place to closed PQ402 with PU401 RT4 place to closed PQ501 with PU501 RT5 place to closed PL601 with PU601 RT6 place to closed PQ702 with PU701 RT7 place to closed PQ804 with PU801 RT8 place to closed PL1201 with PU1201

VIN

PD104

LL4148_LL34-2

PR123

68_1206_5%

13

PR131

PR131 200_0603_5%

200_0603_5%

PC117

PC117 1U_0805_25V6K

1U_0805_25V6K

LL4148_LL34-2

1 2

51ON-1

12

PC115

0.1U_0603_25V7K

PR124

PR124 68_1206_5%

68_1206_5%

VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

PWR-DCIN / Vin Detector

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sh eet

ON.B152

ON.B152ON.B152

1

45 59

of

1.A

PD105

LL4148_LL34-2

BATT+

B B

51_ON#40

+CHGRTC

PR132

PR133

PD106

+RTCBATT

A A

2011_0728 del PR130 and +3VLP add PR? 1K_0603_5% change place for R132,R133, +CHGRTC,PD107

1 2

RB751V-40_SOD323-2

560_0603_5%

1 2

2011_0805 del PD107,PR134,JRTC1

䦣⇘HW⮷㜧

PR133

560_0603_5%

1 2

12

TP0610K-T1-GE3_SOT23-3

PR125

200_0603_5%

1 2

100K_0402_1%

PR129

22K_0402_1%

1 2

PR128

12

TP0610K-T1-GE3_SOT23-3

51ON-2CHGRTCP

PC114

1 2

0.22U_0603_25V7K

0.22U_0603_25V7K 51ON-3

RTCVREF

PU102

BIT3021A-ST9_SOT89-3

3.3V

3

12

2011_0808 PU102 change form SA00001PE00(APL5156-33DI-TRL) to SA00002E280(BIT3021A-ST9)

VOUT

PC116

@

10U_0603_6.3V6M

GND

2

VIN

1

PQ101

CHGRTCIN

2

12

RTC Battery

5

4

5

4

3

2

1

+3VALW

PR222

PR222 100K_0402_1%

100K_0402_1%

1 2

+3VLP

PR226

1 2

VMB

SMB3025500YA_2P

1 2

12

PC201

PC201 1000P_0402_50V7K

1000P_0402_50V7K

EC_SMB_CK1 41,47

EC_SMB_DA1 41,47

BATT_TEMP 41

+3VALW+3VLP

PR220

PR220 100K_0402_1%

100K_0402_1%

1 2

13

D

2N7002KW_SOT323-3

2

G

S

2

G

4

PL201

A/D

PQ204

PQ205

13

D

2N7002KW_SOT323-3

S

BATT+

12

PC202

0.01U_0402_25V7K

BATT_OUT 47

2011_1128 Add OTP PR212 and PR206 unmount

PH1 under CPU botten side : CPU thermal protection at 93 +-3 degree C Recovery at 56 +-3 degree C

VL

12

PC203

PQ201

13

D

2

G

2N7002KW_SOT323-3

S

@

@ PR217

PR217 1K_0402_5%

1K_0402_5%

1 2

PR234

PR234 1K_0402_5%

1K_0402_5%

1 2

Issued Date

3

+3VS

PR209

1 2

ADP_OCP_1

PR212

PR212 0_0402_5%

0_0402_5%

1 2

100K_0402_1%

12

PC206

2

G

1U_0402_10V6K

SPOK48

+VSB_EN41

0.1U_0603_16V7K

VR_HOT#41,53

PROCHOT41

PR216

100K_0402_1% @

VL

1 2

Security Classification

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

ADP_I41,47

PU201

1

VCC

2

GND

3

OT1

4

OT2

G718TM1U_SOT23-8

OTP_N_003

PR213 0_0402_5%PR213 0_0402_5%

B+

PR215

22K_0402_1%

1 2

13

D

PQ203

2N7002KW_SOT323-3

S

2011_1005 PQ105 change form SB000006800(2N7002W T/R7 1N SOT-323) to SB000009Q80( 2N7002KW 1N SOT323-3)

2012/07/01

8

TMSNS1

7

RHYST1

TMSNS2

RHYST2

12

OTP_N_002

6

5

ADP_OCP_2

MAINPWON 39,41,45,48

12

PR214

PC204

100K_0402_1%

LC Future Center Secret Data

Deciphered Date

Turbo_V_1

PR210

1 2

27.4K_0402_1%

PQ202

TP0610K-T1-GE3_SOT23-3

2

0.22U_0603_25V7K

PR205

4.42K_0402_1%

PR229

@

1 2

0_0402_5%

2

2.1K_0402_1%

1 2

PR228

0_0402_5%

13

2014/07/01

1 2

PR227

PQ206

12

0.1U_0603_25V7K

+VSBP

13

D

S TR 2N7002KW 1N SOT323-3

S

+3VLP

PR211

10K_0402_1%

1 2

Turbo_V

+VSBP

PC205

+3VLP

12

2

G

Custom

Date: Sh eet

ADP_PROTECT 41

NTC_V_1

12

PR230

0_0402_5%

1 2

PR231

47K_0402_1%

@

PJ201

PJ201 JUMP_43X39@

JUMP_43X39@

112

Title

PWR-BATTERY CONN/OTP

Size Document Number Rev

+3VALW

PR232

47K_0402_1%

NTC_V

2

Thursday, November 01, 2012

12

@

12

+VSB

ON.B152

ON.B152ON.B152

1

PR206

12.7K_0402_1%

PR208

10K_0402_1%

PH201

100K_0402_1%_TSM0B104F4251RZ

PR207

21.5K_0402_1%

12

46 59

of

1.A

JBATT1

VMB2

JBATT1

1

2

3

D D

C C

6

7

8

GND

9

GND

@

SUYIN_200082GR007M211ZR

2011_0823 change 9P JBATT1

4

5

VMB2

PR224

PR224 255K_0402_1%

B B

A A

255K_0402_1%

1 2

PR221

PR221 150K_0402_1%

150K_0402_1%

1 2

EC_SMDA

12

PR202

100_0402_1%

PR202

100_0402_1%

2

3

PESD5V0U2BT_SOT23-3

PESD5V0U2BT_SOT23-3 PD806

PD806

@

1

2011_0731 add circuit for battery learning function 2011_1119 change circuit to unmount from mount

12

PC207

PR219

10K_0402_1%

1 2

5

3

2

PR225

PR225 10K_0402_1%

10K_0402_1%

2

100K_0402_1%

1 2

PR204

PR204 750_0402_5%

750_0402_5%

P2

0.01U_0402_25V7K

8

P

+

-

G

4

PF201

PF201 12A_65V_451012MRL

12A_65V_451012MRL

EC_SMCA

3

PESD5V0U2BT_SOT23-3

PESD5V0U2BT_SOT23-3 PD805

PD805

@

1

PR203

12

PR218

10M_0402_5%

1 2

1

O

PU202A

LM393DG_SO8

12

RTCVREF

21

BATT_LEN#41

12

PR201

100_0402_1%

100K_0402_1%

5

PQ301

PQ301 AO4407AL_SO8

AO4407AL_SO8

VIN

D D

C C

B B

2

PACIN

ACOFF41

BATT_OUT46,47

12

PR301

61

2N7002KDW-2N _SOT363-6

8 7

5

PQ305

LTA044EUBFS8TL_UMT3F

47K_0402_5%

2

13

2

LTC015EUBFS8TL_UMT3F

PQ310A

47K_0402_1%

1 2

PACIN

PQ313

LTC015EUBFS8TL_UMT3F

PR321

1 2

ACOFF-1

10K_0402_5%

PR332

0_0402_5%

PQ318

2

G

PQ307

PR318

12

13

4

1 3

2

D

S

2N7002KW_SOT323-3

P2

1 2 36

12

PC301

PR306

200K_0402_1%

0.1U_0603_25V7K

P2-1

12

PR309

P2-2

34

PQ310B

5

13

2N7002KDW-2N_SOT363-6

PQ304

AO4423L 1P SO8

AO4423L 1P SO8 1 2 3 6

4

12

PR331

PR331 20K_0402_1%

20K_0402_1%

PQ317

13

D

2N7002KW_SOT323-3

2

G

S

150K_0402_1%

PR319

64.9K_0603_1%

64.9K_0603_1% 1 2

1 2

PC323 0.1U_0603_25V7KPC323 0.1U_0603_25V7K

5600P_0402_25V7K

PR314

EC_SMB_DA141,46

EC_SMB_CK141,46

CHGVADJ=(Vcell-4)/0.10627

Vcell

4V

4.2V

4.35V

CC=0.25A~3A

IREF=1.016*Icharge

IREF=0.254V~3.048V

VCHLIM need over 95mV

A A

CHGVADJ

0V

1.882V

3.2935V

47K_0402_1%

ACPRN

PR328

BQ24737_VDD

12

PQ311B

5

8 7

5

1 2

PC302

BATT_OUT 46,47

VIN

12

432K_0603_1%

12

PR329

PR329 10K_0402_1%

10K_0402_1%

34

+3VALW

4

P3

SH00000AA00

1 2

PL301

1 2

PC303

10U_0805_25V6K<BOM Structure>

PR323

1 2

316K_0402_1%

100K_0402_1%

VL_OFF#41

PR334

10K_0402_1%

1 2

12

PR335

12K_0402_1%

PL301

ADP_I41,46

PC313

1 2

100P_0603_50V8

PR325

@

PACIN

12

0_0402_5%

1 2

1UH_PCMB061H-1R0MS_7A_20%

PR302

0.01_1206_1%

1

2

1 2

PC304

10U_0805_25V6K<BOM Structure>

ACPRN

@PR337

@

PR337

PR338

@PR338

@

12

39.2K_0402_1%

5

ACOK

6

ACDET

7

IOUT

8

SDA

BQ24737RGRR_VQFN20_3P5X3P5

9

SA000051W00

SCL

10

ILIM

BM

11

PR333

@

PR330

10K_0402_5%

1 2

+3VS

ACIN 15,41,42

B+

4

3

ACP

+3VALWP

12

PR336

100K_0402_1%

PR339

@PR339

@ 1 2 1 2

4.7M_0603_1%

3

4

CMPIN

PU301

SRN

12

13

12

PR326

6.8_0603_5%

6.8_0603_5% PC320

PC320

0.1U_0603_25V7K

0.1U_0603_25V7K 12

12

PC321

0.1U_0603_25V7K

ACN

PC309

1 2

PC312

0.1U_0603_25V7K

10K_0603_1%@

2

ACP

CMPOUT

GND

SRP

14

PR327

10_0603_5%

3

PC310

0.1U_0603_25V7K

12

1

ACN

TP

VCC

PHASE

HIDRV

BTST

REGN

LODRV

15

DL_CHG

12

21

20

19

18

17

16

12

PC322

0.1U_0603_25V7K

1 2

PC305

4.7U_0805_25V6-K

BQ24727VCC-1

LX_CHG

DH_CHG

BST_CHG

PD301

RB751V-40_SOD323-2

12

PC318

PC318 1U_0603_25V6M

1U_0603_25V6M

1 2

PC306

4.7U_0805_25V6-K

P2

PR317

10_1206_5%

2.2_0603_5%

12

BQ24737_VDD

1 2

PC307

4.7U_0805_25V6-K

1 2

PC314

1 2

1U_0603_25V6M

PR324

1 2

0.047U_0603_25V7M

2

PQ302

AO4407AL_SO8

AO4407AL_SO8 1 2 3 6

B+

1

RFC32

PC308

2

RFC33

47P_0402_50V8J

2200P_0402_50V7K

PC315

PQ312

12

68P_0402_50V8J

4

5

6

578

PR307

123

1 2

10K_0402_1%

DISCHG_G-1 13

PQ308

LTC015EUBFS8TL_UMT3F

TPCA8065-H_PPAK56-8-5

PQ314

TPC8A03-H_SO8

8 7

5

4

VIN

PR305

47K_0402_1%

1 2

ACOFF-1

PD302

1SS355_SOD323-2

1 2

2

1 2

PD303

PD303 1SS355_SOD323-2

1SS355_SOD323-2

PC311

PL302

PR322

4.7_1206_5%

PC319

680P_0603_50V7K

PC319

680P_0603_50V7K

PL302

1 2

10UH_PCMB104T-100MS_6A_20%

12

24727_SN

12

1 2

12

0.1U_0603_25V7K

PR308

PR308 200K_0402_1%

200K_0402_1%

61

2N7002KDW-2N_SOT363-6

0.01_1206_1%

1

CHG

2

SRP

PQ311A

PQ311A 2

PR320

PACIN

SRN

1

4

3

12

PC317

PC316

10U_0805_25V6K

BATT+

12

10U_0805_25V6K

2N7002KDW-2N_SOT363-6

For disable pre-charge circuit.

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

3

LC Future Center Secret Data

Deciphered Date

2014/07/01

2

Title

PWR-CHARGER-BQ24737

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

1

of

47 59

1.A

5

D D

4

PR402

13K_0402_1%

1 2

PC411

0.1U_0402_25V6

1 2

+3VLP

PR404

20K_0402_1%

1 2

PR419

0_0603_5%~D

1 2

3

12

PC402

1U_0603_10V6K

PC425

0.1U_0402_25V6

1 2

PR403

30K_0402_1%

1 2

PR405

20K_0402_1%

1 2

2

PJ402

+3VALWP +3VALW

+5VALWP +5VALW

2

JUMP_43X118@

PJ403

2

JUMP_43X118@

1

112

TPS51225_B+

PR407

Name = TPS51225_B+

PJ401

2

B+

PC401

C C

PC401

+3VALWP

B B

JUMP_43X118@

12

0.1U_0603_25V7K

1

+

2

112

12

PC403

0.1U_0603_25V7K

4.7UH +-20% PCMB063T-4R7MS 5.5A

PC414

PC414 150U_B2_6.3VM_R45M

150U_B2_6.3VM_R45M

PC404

PC405

4.7U_0805_25V6-K

PL401

1 2

12

PC406

4.7U_0805_25V6-K

4.7U_0805_25V6-K 2200P_0402_50V7K

2200P_0402_50V7K

PR401

4.7_1206_5%

PC416

680P_0603_50V7K

1

2

12

SNUB_3V

12

6

RFC34

47P_0402_50V8J

123

3 6

241

578

PQ401

AO4466L_SO8

4

578

PQ403

PQ403 AO4712L_SO8

AO4712L_SO8

PC412

0.1U_0603_25V7K

1 2

SPOK46

PR408

2.2_0603_5%

1 2

TPS51225_B+

PR406

1 2

100K_0402_1%

3V_EN

UG_3V

BST_3V

SW2_3V

LG_3V

FB_3V

PU401

5

CS2

6

EN2

7

PGOOD

10

TPS51225CRUKR_QFN20_3X3

DRVH2

9

VBST2

8

SW2

DRVL211VIN12VREG5

PC420

3

4

VFB2

VREG3

13

12

0.1U_0603_25V7K

FB_5V

2

VFB1

EN1

20

5V_EN

12

PC419

1U_0603_10V5K

1

CS1

DRVH1

VBST1

DRVL1

15

PR407

1 2

100K_0402_1%

PAD

VO1

VCLK

SW1

PR412

0_0603_5%

1 2

1

12

21

14

19

16

UG_5V

17

BST_5V

18

SW1_5V

LG_5V

PR409

2.2_0603_5%

1 2

PC413

0.1U_0603_25V7K

1 2

PQ402

5

PQ404TPC8A03-H_SO8 PQ404TPC8A03-H_SO8

4

678

35241

786

123

47P_0402_50V8J

RFC35

2

TPC8065-H_1N_SOP-8

VL

12

PC410

PC409

0.1U_0402_25V6

2200P_0402_50V7K

PL402

1 2

12

2.2UH_PCMB063T-2R2MS_8A_20%

PR410

4.7_1206_5%

SNUB_5V

12

PC417

680P_0603_50V7K

12

PC407

PC408

10U_0805_25V6K

12

10U_0805_25V6K

+5VALWP

1

+

PC415

PC415 150U_B2_6.3VM_R45M

150U_B2_6.3VM_R45M

2

EC_ON40,41

MAINPWON39,41,45,46

A A

5

PR413

1 2

47K_0402_1%

PR411

1 2

0_0402_5%

VS

1 2

PR418

100K_0402_1%

@

12

@

PR414

12

PC421

40.2K_0402_1%

4

1U_0603_10V6K

5V_EN

3V_EN

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

2014/07/01

2

Title

PWR-3VALWP/5VALWP

Size Document Number Rev

Custom

Date: Sheet

Thursday, November 01, 2012

ON.B152

ON.B152ON.B152

1

of

48 59

1.A

A

PJ501

2

B+

1 1

+1.5VP

2 2

112

JUMP_43X118@

1

12

PC519

RFC36

2

68P_0402_50V8J

47P_0402_50V8J

1UH_+-20%_MMD-10DZ-1R0M- X1A_18A

1 2

1

+

PC508

PC508 220U_D2_4VY_R15M

220U_D2_4VY_R15M

2

12

PC504

PL501

12

0.1U_0402_25V6

B+_1.5V

12

PC502

PC505

10U_0805_25V6K

2200P_0402_50V7K

TPC8065-H_1N_SOP-8

PQ501

12

PR504

4.7_1206_5%

SNB_1.5V 12

PC509

680P_0603_50V7K

12

PQ502

PC503

10U_0805_25V6K

123

678

35241

786

5

4

TPC8A03-H_SO8

SYSON41

SUSP31,43,52,9

3 3

2011_0801 JP504 form 43x118 change to 43x79

PJ504

+5VALW

4 4

2

112

JUMP_43X79@

SUSP#31,41,43,51,9

1 2

0_0402_5%

PR511

2011_0829 change and mount

12

EN_1.8VSP

PR512

PR512 1M_0402_5%

1M_0402_5%

12

PC520

PC510

PC520

@

22U_0805_6.3VAM

12

PC515

1 2

0.1U_0402_10V7K

PU502

4

IN

5

PG

FB6EN

SY8032ABC_SOT23-6

PR501

0_0402_5%

1 2

49.9K_0402_1%

1 2

3

LX

2

GND

1

B

PR701

5.1_0603_5%

1 2

@PR505

@

PR505

47K_0402_5%

PR702

1.8VSP_LX

1 2

+5VALW

12

PC706

0.1U_0402_10V7K

FB=0.6Volt

PC506

0.22U_0402_10V6K

1 2

PR1213

PR1213 0_0402_5%

0_0402_5%

1 2

PR503

15.8K +-1% 0402

1 2

PC701

PC701 1U_0603_10V6K

1U_0603_10V6K

PC501

.1U_0402_16V7K

PQ701

PQ701 2N7002KW_SOT323-3

2N7002KW_SOT323-3

13

D

2

G

S

1UH_PH041H-1R0MS_3.8A_20%

12

PR509

4.7_1206_5%

12

PC512

680P_0603_50V7K

C

PR502

2.2_0603_5%

1 2

DH_1.5V

VIN_1.5V

VIN_0.75V

BST_1.5V

LX_1.5V

16

17

PHASE

15

DL_1.5V

CS_1.5V

VDDP_1.5V

VDD_1.5V VDDQ_1.5V

12

PC702

PC702 1U_0603_10V6K

1U_0603_10V6K

B+_1.5V

1 2

2011_0826 mount for EMI

PR506

PR506 887K_0402_1%

887K_0402_1%

1 2

+5VALW

1 2

PL502

PR510

20K_0402_1%

PR513

10K_0402_1%

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

PR705

PR705 100K_0402_5%

100K_0402_5%

UGATE

RT8207MZQW_W QFN20_3X3

PGOOD

TON

9

10

TON_1.5V

12

PC511

68P_0402_50V8J

12

18

8

S5_1.5V

BOOT

S5

12

19

VLDOIN

S3

7

S3_1.5V

PC513

22U_0805_6.3VAM

20

PU501

VTT

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

6

FB_1.5V

12

PAD

PC514

21

1

2

3

4

5

22U_0805_6.3VAM

VTTSNS_0.75V

VTTREF_0.75V

12

PC516

2200P_0402_50V7K

PR508

PR508 10K_0402_1%

10K_0402_1%

PC518

12

68P_0402_50V8J

+1.5VP

12

+1.5VP+5VALW

PR507

PR507 10K_0402_1%

10K_0402_1% 1 2

PC705

<BOM Structure>PC705

.1U_0402_16V7K

1 2

12

PC517

0.1U_0402_25V6

12

PC703

10U_0805_6.3V6K

+1.8VSP

2011_0826 add for EMI

PC704

10U_0805_6.3V6K

+0.75VSP

+1.5VP

12

PC507

0.033U_0402_16V7K

+1.5VP

D

PJ502

2

112

JUMP_43X118@

PJ503

2

112

JUMP_43X118@

PJ702

2

112

JUMP_43X118@

2011_0801 JP505 form 43x118 change to 43x79

PJ505

2

112

JUMP_43X79@

1.8VSP max current=4A

+1.5V

+0.75VS+0.75VSP

+1.8VS+1.8VSP

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

C

2014/07/01

Title

PWR-+1.5VP/+1.8VSP

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

D

of

49 59

1.A

5

4

3

2

1

VID [0] VID[1] VCCSA Vout 0 0 0.9V 0 1 0.8V 1 0 0.725V

+VCC_SAP TDC 4.2A Peak Current 6A OCP current 7.2A

+VCCSAP

PJ602

2

112

JUMP_43X118@

+VCCSA

1 1 0.675V

output voltage adjustable network

D D

PU601

VCCSA_SVIN

PC1208

1 2

PU601

12

PVIN

11

PVIN

10

SVIN

9

FB

8

VOUT

7

VID1

VID0

GND

13

1M_0402_5%

1

LX

2

LX

3

LX

4

PG

5

EN

6

PR604

+VCCSA_PWRGD

1 2

PR603

100K_0402_5%

1 2

PR605

0_0402_5%

@

12

PC619

1 2

0.1U_0603_25V7K

0.1U_0603_25V7K H_VCCSA_VID0 9

PJ601

+5VALW

C C

2

112

JUMP_43X118@

1

PC613

PC601

2

2200P_0402_50V7K

0.1U_0603_25V7K

12

PC615

PC614

1 2

22U_0805_6.3VAM

H_VCCSA_VID19

PR1206

1 2

10_0402_5%

+VCCSA_PWR_SRC+VCCSA_PWR_SRC

@

12

68P_0402_50V8J

PC617

.1U_0402_16V7K

12

PR602

PR602 1M_0402_5%

1M_0402_5%

SY8037BDCC_DFN12_3X3

0.47UH_FDVE0630-H-R47M=P3_17.7A_20%

12

SA_PGOOD 41

+3VS

+VCCSA_EN

1.05VS_VCCP_PWRGOOD 51

12

The 1k PD on the VCCSA VIDs are empty. These should be stuffed to ensure that VCCSA VID is 00 prior to VCCIO stability.

PL601

1 2

22U_0805_6.3V6M

PC605

PR607

4.7_1206_5%

PC616

680P_0603_50V7K

PC605

2011_0826 add for EMI

22U_0805_6.3V6M

PC608

PC609

1

12

PC607

2

0.1U_0402_10V7K

PR609

100_0402_5%

PR611

0_0402_5%

1

12

2

PC610

2200P_0402_50V7K

2011_1012 PC607 PC610 mount for RF

12

2200P_0402_50V7K

22U_0805_6.3V6M

PC612

PC611

1

2

+VCCSA_SENSE 9

22U_0805_6.3V6M

1

2

12

PC620

68P_0402_50V8J

+VCCSAP

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

PWR-VCCSAP

Size D ocument Number Rev

C

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

1

50 59

of

1.A

5

D D

1.05VS_VCCP_PWRGOOD50

PR708

SUSP#31,41,43,49,9

C C

2011_1202 PR708 change from 0 to 60.4K PC713 mount

PR708

1 2

60.4K_0402_1%

PR709

12

10K_0402_1%@

1 2

4

2011_0801 mount PR704, PR706

PC713

.1U_0402_16V7K

12

PR712

2011_1007 PR712 form 88.7K change to 75K

1 2

PR714

4.99K_0402_1%

PR715

10K_0402_1%

PR706

0_0402_5%

1 2

TRIP_1.05VS_VCCP

12

75K_0402_1%

+3VS

1 2

PR713

1 2

470K_0402_1%

PR704

PR704 100K_0402_5%

100K_0402_5%

1

PGOOD

2

TRIP

3

EN

4

VFB

5

RF

TPS51212DSCR_SON10_3X3

VFB=0.7V

PU702

2011_0829 PU702 PN error,change

VBST

DRVH

SW

V5IN

DRVL

TP

10

9

8

7

6

11

3

2011_0926 change part to TPC8065 del PR705

PQ702

2011_1129 Change 2.2

PC712

0.22U_0603_16V7K

+5VALW

12

PC715

1U_0603_10V6K

PC712

1 2

PR707

2.2_0603_5%

1 2

BST_1.05VS_VCCP

DH_1.05VS_VCCP

LX_1.05VS_VCCP

DL_1.05VS_VCCP

2011_1005 PQ805 change form SB00000Q600(TPCA8059-H_PPAK56-8-5) to SB00000Q400(TPCA8057-H_PPAK56-8-5)

2011_1007 PL701 form SH000004S00(S COIL 1.0UH +-20% PCMC104T1R0MN 20A) change to SH00000CN00(S COIL 1UH +20% MMD-10DZ-1R0M-X1A 18A)

PQ702

4

2

+1.05VS_VCCPP OCP(min)=20.75A

1.05VS_B+

12

1

5

PC707

RFC37

2

0.1U_0402_25V6

47P_0402_50V8J

TPCA8065-H_PPAK56-8-5

123

PQ703

5

123

1UH_+-20%_MMD-10DZ-1R0M-X1A_18A

12

PR710

4.7_1206_5%

12

PC716

680P_0603_50V7K

TPCA8057-H_PPAK56-8-5

PR716

10_0402_5%

12

PC709

PC708

4.7U_0805_25V6-K

2200P_0402_50V7K

PL701

@PR716

@

12

2011_1127 Change PC711 from Sanyo SF000000S80 to panasonic SF000000I80

12

PC717

PC710

4.7U_0805_25V6-K

12

1

12

+

PR711

2 3

0_0402_5%

VCCIO_SENSE 8

1

PJ706

2

112

JUMP_43X118@

12

2011_0826 add

68P_0402_50V8J

for EMI

2011_0929 PC1166 non-mount

330U_D2_2VM_R9M

2011_0815 PC1166, PC1167 PC1168 change place form"+1.05VS" to"+1.05VS_VCCPP"

330U_D2_2VM_R9M

1

PC1167

2011_1005 PC1167,PC1168 change to 330U_2V_R9M

PC1168

+

2 3

B+

1

+

PC711

2

68U_25V_M_R0.36

+1.05VS_VCCPP

B B

PJ703

2

112

JUMP_43X118@

JUMP_43X118@ PJ704

PJ704

2

112

JUMP_43X118@

+1.05VS+1.05VS_VCCPP

2011_0801 del PJ705 and "+V1.05S_VCCP"

Ivy Bridge CPU ES2 Using

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

3

LC Future Center Secret Data

Deciphered Date

2014/07/01

2

Title

PWR-+1.05VS_VCCP/+0.75VSP

Size Document Number Rev

Custom

Date: Sheet

Thursday, November 01, 2012

ON.B152

ON.B152ON.B152

1

51 59

of

1.A

A

+VGA_CORE

1 1

+VGA_CORE

PR834

PR833

3K_0402_1%

39K_0402_1%

2 2

N14MGL@

39K_0402_1% N14MGL@

N14MGL@

Under VGA Core

12

PC834

PC835

4.7U_0603_6.3V6M

12

PC816

PC819

0.1U_0402_10V7K

Near VGA Core

1

12

PC825

PC824

2

47U_0805_6.3V6M

22U_0805_6.3V6M

PR832

30K_0402_1%

30K_0402_1% N14MGL@

N14MGL@

12

PC836

4.7U_0603_6.3V6M

12

PC817

0.1U_0402_10V7K

12

PC826

STDBY_EN

PR844

3K_0402_1%

3K_0402_1% N14MGL@

N14MGL@

4.7U_0603_6.3V6M

PC837

PC818

12

PC838

4.7U_0603_6.3V6M

0.1U_0402_10V7K

12

PC827

4.7U_0603_6.3V6M

PR846

24K_0402_1%

24K_0402_1% N14MGL@

N14MGL@

4.7U_0603_6.3V6M

12

PC1216

4.7U_0603_6.3V6M

PRV11 = 71.5K ==>Fsw = 450KHz

PR859 0_0402_5%PR859 0_0402_5%

VSSSENSE_VGA23

VCCSENSE_VGA23

3 3

1 2

PC853

1000P_0402_50V7K

1 2

PR865 0_0402_5%PR865 0_0402_5%

12

47P_0402_50V8J

N14P-GT 35W Ipeak=50A Imax=35A Iocp=64.8A Fsw=450KHz bulk cap 330uF 9m *4

GB4-128 package

12

PC840

PC839

PC1209

4.7U_0603_6.3V6M

12

100K_0402_1%

PC1217

4.7U_0603_6.3V6M

PR866

PC863

1 2

12

PC1218

12

G

2

S

PR854

10K_0402_1%

1 2

4.7U_0603_6.3V6M

12

@

4.7U_0603_6.3V6M

SSM3K7002FU_SC70-3

PQ801

13

D

PR844

0_0402_5%

1 2

0.01U_0603_50V7K

51_0402_1%

1 2

N14P-GS 25W Ipeak=36A Imax=25A Iocp=64.8A Fsw=450KHz bulk cap 330uF 9m *3

12

PC1211

PC1210

4.7U_0603_6.3V6M

12

PC1221

PC1219

PC1220

@

4.7U_0603_6.3V6M

PR868

9.1K_0402_1%

9.1K_0402_1% 12

PR846

18K_0402_1%

12

PC843 10P_0402_50V8JPC843 10P_0402_50V8J

1 2

PC841

100P_0402_50V8J

100P_0402_50V8J <BOM Structure>

Thermistor near MOSFET trigger point 97 degree C.

PC855

PR852

4.7U_0603_6.3V6M

12

PC1212

4.7U_0603_6.3V6M

12

PC1222

@

VREF

12

PR849

34K_0402_1%

1 2

FB2_VGA

12

PC1213

4.7U_0603_6.3V6M

12

PC1223

@

4.7U_0603_6.3V6M

PR832

20K_0402_1%

12

PC854

2200P_0402_50V7K

12

1 2

PR845

82K_0402_1%

.1U_0402_16V7K

12

PC1214

4.7U_0603_6.3V6M

@

4.7U_0603_6.3V6M

20K_0402_1%

12

VREF

FB_VGA

COMP_VGAFB1_VGA

PC865

B

PC1215

4.7U_0603_6.3V6M

PC2428

470P_0402_50V7K

PC2428

470P_0402_50V7K

1

2

PR833

PR834

PR834 2K_0402_1%

2K_0402_1%

FS

10

11

12

+3VS

@

1 2

PR835 0_0402_5%PR835 0_0402_5%

GPU_VID

12

VIDBUF

6

5

7

VIDBUF

REFIN

8

VREF

9

NCP81172MNTWG_QFN24_4X4

FS

FBRTN

FB

COMP

TSNS13TALERT#14VCC15PGOOD16HG217BST2

GND

25

12

PH801

PR858 5.9K_0402_1%PR858 5.9K_0402_1%

100K_0402_1%_NCP15WF104F03RC

VREF

PD801

1 2

PR836 10K_0402_5%

PR837 0_0402_5%PR837 0_0402_5%

UGATE1_VGA

PSI_VGA

EN_VGA

2

3

4

EN

PSI

VID

HG1

PU801

VCC_VGA

PR831 10K_0402_5%PR831 10K_0402_5%

PR853 2.2_0402_5%PR853 2.2_0402_5%

1 2

PC856

1U_0402_10V6K

PR840 10K_0402_5%PR840 10K_0402_5%

12

RB751V-40_SOD323-2

1

BST1

18

UGATE2_VGA

12

PGND

PVCC

+3VS

PH1

LG1

LG2

PH2

PR864

1 2 100K_0402_5%

100K_0402_5%

PC802 .1U_0402_16V7KPC 802 .1U_0402_16V7K

1 2

0_0603_5%

BOOT1_VGA

24

23

22

21

PVCC_VGA

20

19

BOOT2_VGA

DGPU_PWROK 18,31

+3VS

12

+5VS

12

NVVDD PWM_VID 22

DPRSLPVR_VGA 22

NVDD_PWR_EN 17

PR821

12

BOOT1_2_VGA

LGATE1_VGA

PHASE1_VGA

PC809

0.22U_0603_10V7K

0.22U_0603_10V7K 1 2

PR867

0_0402_5%

12

PC815

4.7U_0603_10V6K

1 2

PR843 0_0402_5%PR843 0_0402_5%

PR857

0_0603_5%

PHASE2_VGA

LGATE2_VGA

12

PR855

0_0402_5%

BOOT2_2_VGA

+5VS

12

MDU1512, Rdson(max)=5mohm

C

UGATE1_2_VGA

UGATE2_2_VGA

PC862

0.22U_0603_10V7K

0.22U_0603_10V7K 1 2

PQ804

PQ806

4

5

123

5

PQ805

123

TPCA8057-H_PPAK56-8-5

5

123

5

123

TPCA8057-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

PR1212

@ PR1212

@

4.7_1206_5%

TPCA8065-H_PPAK56-8-5

PQ807

4.7_1206_5%

+VGA_B+

12

PR1207

PC805

0.1U_0402_25V6

12

SNUB1_VGA 12

680P_0402_50V7K@

PC858

@

12

PC1224

12

0.1U_0402_25V6

12

SNUB2_VGA 12

680P_0402_50V7K@

12

PC806

PC807

2200P_0402_50V7K

1

2

12

PC859

2200P_0402_50V7K

1

2

PC1225

12

10U_0805_25V6K

4

3

PL802PL802

12

PC860

10U_0805_25V6K

PL801PL801

PC808

10U_0805_25V6K

+VGA_B+

PC861

10U_0805_25V6K

4

3

1

2

1

+

2

1

2

PL1202

HCB2012KF-121T50_0805

1 2

PL1203

HCB2012KF-121T50_0805

1 2

RFC38

47P_0402_50V8J

1

+

PC811

PC812

2

330U_D2_2V_Y

RFC39

47P_0402_50V8J

1

+

PC866

2

330U_D2_2V_Y

D

+VGA_CORE

1

+

PC867

2

+VGA_CORE

330U_D2_2V_Y

B+

2011_1007 N13M-GE1 VID: 0110100

0.85V

+5VALW

10U_0805_10V6K

PR818

PR818 0_0402_5%

4 4

DGPU_PWROK#31,52

SUSP31,43,49,52,9

A

SUSP

0_0402_5%

1 2

PR819 0_0402_5%

0_0402_5%

2

G

@PR819

@

+1.05VS +1.05VS_VGA

8 7

12

6

PC801

PR814

PR814 20K_0402_1%

20K_0402_1%

1 2

2011_0727 PR816 modfiy 10K to 100K.

13

D

PQ808

PQ808 2N7002KW_SOT323-3

2N7002KW_SOT323-3

S

5

PR816

100K_0402_5%

1 2

1 2 3

PQ802TPC8A03-H_SO8 PQ802TPC8A03-H_SO8

4

12

PC804

0.01U_0603_50V7K

12

PC803

10U_0805_10V6K

2N7002KW_SOT323-3

B

@

@ 12 PC810

PC810

PR813

PR813 470_0603_5%

470_0603_5%

1U_0603_10V6K

1 2

@

13

D

PQ803

S

Confirm with HW

2011_1129 Change 2.2

PJ802

2

+1.05VS +1.05VS_VGA

2

G

JUMP_43X118@

2011_0830 change P/N

PR815

PR815 0_0402_5%

0_0402_5%

1 2

112

SUSP

PR817

@PR817

@

0_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF LC FUTURE CENTER.

DGPU_PWROK# 31,52 SUSP 31,43,49,52,9

2012/07/01

C

LC Future Center Secret Data

Deciphered Date

2014/07/01

Title

PWR-VGA_COREP-ISL62883

Size D ocument Number Rev

C

Thursday, November 01, 2012

Date: Sheet

D

ON.B152

ON.B152ON.B152

52 59

of

1.A

5

PC901

0.033U_0402_16V7

PR901

D D

TRBSTA#

1 2

10_0402_1%

1 2

8.2K_0402_1%

VCC_AXG_SENSE9

VSS_AXG_SENSE9

+1.05VS

C C

12

PC915

VR_SVID_DAT8

VR_SVID_ALRT#8

VR_SVID_CLK8

PR921

.1U_0402_16V7K

130_0402_1%

1 2

+1.05VS

12

PR932

PR932 75_0402_1%

PC936

47P_0402_50V8J

VR_HOT#41,46

VSSSENSE8

VCCSENSE8

B B

A A

75_0402_1%

TRBST#

FBA3

PR903

0.033U_0402_16V7

PR922

1 2

VGATE15

1 2

PC905

VR_RDYA

12

PC916

PR926 0_0402_5%PR926 0_0402_5%

54.9_0402_1%

1 2

PR943

1 2

10_0402_1%

FBA1

12

.1U_0402_16V7K

VR_SVID_DAT1

+3VS

12

FB_CPU3

0.033U_0402_25V7K

PR946

1 2

1.21K_0402_1%

PR953

1 2

1K_0402_1%

1 2

10.7K_0402_1%

CPU_B+

PR933

PR933 10K_0402_5%

10K_0402_5%

1 2

0_0402_5%

1 2

0_0402_5%

PC928

1 2

PR904

+3VS

PR936

PR937

FB_CPU2

DROOP

12

VR_ON41

PC931

PR908

1 2

10_0402_1%

PR909

1 2

1K_0402_1%

PR917

PR917 10K_0402_1%

10K_0402_1%

+5VS

PR927

69.8K_0402_1%

1 2

PR930 1K_0402_1%PR930 1K_0402_1%

PC920

VSN

12

PC922

PC922 1000P_0402_50V7K

1000P_0402_50V7K

VSP

PR941

1 2

FB_CPU1

49.9_0402_1%

1 2

12

9.53K_0402_1%

0.033U_0402_25V7K

PC935

1 2

1000P_0402_50V7K

4

FBA2

PR913

1 2

0_0402_5%

PR916

1 2

0_0402_5%

1 2

2_0603_5%

1 2

2.2U_0603_10V7K

1 2

0_0402_5%

PR939

1 2

1K_0402_1%

560P_0402_50V7K

PR947

CSREFCSCOMP

PC907

1 2

560P_0402_50V7K

PR919

PC914

PR923

VR_ON_CPU

PR925

1 2

10K_0402_1%

12

0.01U_0402_25V7K

PC926

1 2

IMVP_IMON41

PR910

1 2

5.11K_0402_1%

1000P_0402_50V7K

6132_VCC

VR_RDYA

VR_SVID_DAT1 VR_SVID_ALRT# VR_SVID_CLK

VBOOT

ROSC_CPU VRMP VR_HOT# VGATE

DIFF_CPU

PR942

6.04K_0402_1%

PC908

1 2

10P_0402_50V8J

COMPA1

PC912

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15

PC924

10P_0402_50V8J

12

COMP_CPU1

1 2

.1U_0402_16V7K

1 2

PR902

24.9K_0402_1%

PC909

1 2

1500P_0402_50V7K

1 2

59

61

60

PU901

PAD

VSNA

VCC VDDBP VRDYA EN SDIO ALERT# SCLK VBOOT

NCP6132AMNR2G_QFN60_7X7

ROSC VRMP VRHOT# VRDY VSN VSP DIFF

TRBST#

17

16

FB_CPU

TRBST#

12

PC927

12

2200P_0402_50V7K

PR949

1 2

24.9K_0402_1%

PUT COLSE TO VCORE Phase 1 Inductor

DIFFA

58

VSPA

FB

18

COMP_CPU

PC933

PC902

DIFFA

COMP

57

19

1 2

TRBSTA#

IMON

IMVP_IMON IMON

FBA

56

TRBSTA#

IOUT

20

ILIM_CPU

1 2

COMPA

IMONAIMONA

54

55

FBA

COMPA

DROOP

ILIM

21

DROOP

PR938 12.4K_0402_1%PR938 12.4K_0402_1%

CSCOMPCSCOMPCSCOMPCSCOMPCSCOMPCSCOMP

.1U_0402_16V7K

IOUTA

CSCOMP22CSP325CSREF24CSSUM

3

1 2

PC903

@

1200P_0402_50V7K

PR911

1 2

CSSUMA

66.5K_0603_1%

PC911

PC911 1000P_0402_50V7K

1000P_0402_50V7K

1 2

CSCOMPA

PR914

1 2

15.8K_0402_1%

CSP1A

DROOPA

ILIMA

50

51

49

53

48

47

52

ILIMA

CSP2A

CSREFA

CSSUMA

DROOPA

CSCOMPA

CSP1

CSP2

TSNS

23

27

29

26

28

TSENSETSENSE CSP2A

PC929

PC929 1000P_0402_50V7K

1000P_0402_50V7K

1 2

PC932

1 2

1200P_0402_50V7K

1 2

PR951

1 2

75K_0402_1%

PH904

12

220K_0402_5%_ERTJ0EV224J

1 2

PC904

165K_0402_1%

1 2

.1U_0402_16V7K

TSENSEA

46

CSP1A

TSNSA

PWMA

BSTA

HGA SWA

LGA

BST2

HG2

SW2

LG2

PVCC

PGND

LG1

SW1

HG1

BST1

DRVEN

PWM

30

PC923

1 2

CSP1 CSP2 CSP3

CSSUM

NTC_PH201

PR905

PR907

820P_0402_25V7

12

SWN1A

PC913

45 44 43 42 41 40 39 38 37 36

6132P_VCCP

35 34 33 32 31

PR934

1 2

41.2K_0402_1%

.1U_0402_16V7K

PC934

@PC934

@

820P_0402_25V7

1 2

PR952

165K_0402_1%

75K_0402_1%

1 2

NTC_PH203

CSREFA 54

BSTA1

BST2

BST1

6132_PWM

CSREF 54

12

PH901

220K_0402_5%_ERTJ0EV224J

220K_0402_5%_ERTJ0EV224J <BOM Structure>

CSREFA

CSP1A

PR918

1 2

26.1K_0402_1%

1 2

HG1A 54

LG1A 54

1 2

HG2 54

LG2 54

LG1 54

HG1 54

1 2

0.047U_0402_16V7K

1 2

PUT COLSE TO GT Inductor

PC910

0.047U_0402_16V7K

1 2

PR920

2.2_0603_5%

PR924

2.2_0603_5%

PR931

2.2_0603_5%

CSP2

PC925

CSREF

CSP1

0.047U_0402_16V7K

CSREF

PR948

127K_0603_1%

PR950

127K_0603_1%

PR912 4. 32K_0402_1%PR912 4.32K_0402_1%

1 2

6132_PWMA

PC917

1 2

BSTA1_1

PC918

1 2

BST2_1

PC919

1 2

PR928

1 2

0_0402_5%

PC921

1 2

BST1_1

12

PR954

PR954 20K_0402_1%

20K_0402_1% @

@

12

PC930

SWN1

SWN2

2

SWN1A 54

0.22U_0603_25V7K

2.2U_0603_10V7K

0.22U_0603_25V7K

1 2

PR955

PR955 20K_0402_1%

20K_0402_1% @

@

+5VS

PR940

4.32K_0402_1%

PR944

1 2

4.32K_0402_1%

1 2

1K_0402_1%

SW1A 54

SW2 54

SW1 54

PR906

SWN2 54

SWN1 54

Option for 1 phase GFX

Option for 2 phase CPU

PC906

1 2

1000P_0402_50V7K

TSENSEA

12

PR915

13.7K_0402_1%

PUT COLSE TO V_GT HOT SPOT

CSP2A

CSP3

TSENSE

12

PR945

13.7K_0402_1%

PUT COLSE TO VCORE HOT SPOT

+5VS

1

CSREFACSCOMPA DROOPA

PH902

100K_0402_1%_TSM0B104F4251RZ

1 2

12

PR929

PR929 0_0402_5%

0_0402_5%

12

PR935

PR935 0_0402_5%

0_0402_5%

PH903

100K_0402_1%_TSM0B104F4251RZ

1 2

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRI ETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRI ETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE CO MPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE CO MPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE CO MPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATIO N IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATIO N IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATIO N IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

PWR-CPU_CORE1

Size Docum ent Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

1

53 59

of

1.A

5

PQ1001

PQ1003

4

5

4

123

TPCA8065-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

123

HG153

D D

SW153

LG153

2011_0826 add for EMI

1

RFC40

2

47P_0402_50V8J

4

12

PC1017

PC1001

68P_0402_50V8J

12

PR1003

4.7_1206_5%

SNUB_CPU1 12

PC1010

680P_0603_50V7K

CPU_B+ CPU_B+

12

PC1003

PC1002

PC1005

10U_0805_25V6K

PC1005

10U_0805_25V6K

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_25V7K

2200P_0402_25V7K

1

4

3

2

PL1001PL1001

V1N_CPU

2012_0725 Change PL1001,PL1003,PL1004 should change to Panasonic parts

3

2011_0926

2011_0801 PC1009 form SF22004M210_220U 25V M 8X10.2 CE-AX change to SF000000S80_100U 25V M

6.3X7.7 CE-LX and place

B+

+CPU_CORE +CPU_CORE

PR1005

10_0402_1%

1

+

PC1020

2

2011_1005 PC1009 change form SF000000S80 (100U 25V M 6.3X7.7 CE-LX ) to SF000000W00

12

( 68U 25V M 6.3X5.8 ESR0.36 FK)

PL1002

HCB4532VF-800T90_1812

1 2

1

+

2011_0815 change PC1009 of place form"CPU_B+" change to "B+"

PC1009

2

68U_25V_M_R0.36

SWN1 53

CPU_B+

HG253

SW253

LG253CSREF 53

change part to TPC8065 del PR1002

PQ1002

PQ1004

2

5

4

5

4

123

TPCA8065-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

123

1

RFC41

2

2011_0826 add for EMI

PC1018

47P_0402_50V8J

12

4.7_1206_5%

SNUB_CPU2

12

680P_0603_50V7K

12

PC1006

68P_0402_50V8J

PR1004

PC1011

12

PC1007

10U_0805_25V6K

1

2

12

PC1004

10U_0805_25V6K

PL1003PL1003

12

0.1U_0402_25V6

4

3

V2N_CPU

1

12

PC1008

2200P_0402_25V7K

PR1006

10_0402_1%

2011_0727 chang net name

12

CSREF

SWN2 53

C C

2011_0826 add

PQ1005

PQ1006

for EMI

5

4

5

4

1

RFC42

2

47P_0402_50V8J

123

TPCA8065-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

123

12

PC1012

PC1019

68P_0402_50V8J

12

SNUB_GFX1

12

PC1013

10U_0805_25V6K

PR1008

4.7_1206_5%

PC1016

680P_0603_50V7K

2011_0926 change part

B B

A A

to TPC8065 del PR1007

HG1A53

SW1A53

LG1A53

CPU_B+

12

PC1014

PC1015

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_25V7K

2200P_0402_25V7K

+VCC_GFXCORE_AXG

1

4

3

2

PL1004PL1004

V1N_GFX

12

PR1009

10_0402_1%

CSREFA 53

SWN1A 53

QC 45W CPU VID1=0.9V IccMax=94A Icc_Dyn=66A Icc_TDC=52A R_LL=1.9m ohm OCP~110A

DC 35W CPU VID1=1.05V IccMax=53A Icc_Dyn=43A Icc_TDC=36A R_LL=1.9m ohm OCP~65A

QC 45W GT2 VID1=1.23V IccMax=46A Icc_Dyn=37A Icc_TDC=38A R_LL=3.9m ohm OCP~55A

5

4

DC 35W GT2 VID1=1.23V IccMax=33A Icc_Dyn=20.2A Icc_TDC=21.5A R_LL=3.9m ohm OCP~40A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

PWR-CPU_CORE2

Size D ocument Number Rev

C

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

1

54 59

of

1.A

5

+CPU_CORE

1

PC1101

10U_0805_6.3V7K

2

D D

1

PC1106

PC1106 10U_0805_6.3V7K

10U_0805_6.3V7K

2

+CPU_CORE

1

PC1120

PC1120 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1144

PC1144 22U_0805_6.3V6M

22U_0805_6.3V6M

2

C C

1

PC1161

PC1161 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1169

PC1169 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+CPU_CORE

B B

2011_0727 chang net name

1

PC1102

PC1102 10U_0805_6.3V7K

10U_0805_6.3V7K

2

1

PC1107

PC1107 10U_0805_6.3V7K

10U_0805_6.3V7K

2

2011_0727 chang net name

1

PC1121

PC1121 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1145

PC1145 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1162

PC1162 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

<BOM Structure> PC1170

PC1170 22U_0805_6.3V6M

22U_0805_6.3V6M

2

2011_0727 chang net name

1

+

PC1174

330U_D2_2VM_R9M

2 3

1

PC1103

PC1103 10U_0805_6.3V7K

10U_0805_6.3V7K

2

1

PC1108

PC1108 10U_0805_6.3V7K

10U_0805_6.3V7K

2

1

PC1122

PC1122 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1146

PC1146 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1163

PC1163 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

<BOM Structure> PC1171

PC1171 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

+

PC1175

330U_D2_2VM_R9M

2 3

2011_0727 chang net name

1

PC1104

PC1104 10U_0805_6.3V7K

10U_0805_6.3V7K

2

1

PC1109

PC1109 10U_0805_6.3V7K

10U_0805_6.3V7K

2

1

PC1123

PC1123 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1147

PC1147 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1164

PC1164 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

<BOM Structure> PC1172

PC1172 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

+

330U_D2_2VM_R9M

2 3

PC1176

4

3

+CPU_CORE +VCC_GFXCORE_AXG

1

PC1105

PC1105 10U_0805_6.3V7K

10U_0805_6.3V7K

2

1

PC1110

PC1110 10U_0805_6.3V7K

10U_0805_6.3V7K

2

1

PC1124

PC1124 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1148

PC1148 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1165

PC1165 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

<BOM Structure> PC1111

PC1111 10U_0805_6.3V7K

10U_0805_6.3V7K

2

+VCC_GFXCORE_AXG

22U_0805_6.3V6M

PC1113

PC1112

1

2

2011_0901 unmount PC1114,PC1115 PC1118,PC1119

22U_0805_6.3V6M

1

2

2011_0901 mount PC1140,PC1141 PC1142,PC1143

2011_0815 del PC1157

22U_0805_6.3V6M

PC1137

PC1136

1

2

330U_D2_2VM_R9M

1

@

PC1158

+

2 3

2011_07929 PC1158 non-mount

22U_0805_6.3V6M

PC1114

1

2

22U_0805_6.3V6M

PC1138

1

2

1

+

2 3

22U_0805_6.3V6M

PC1117

PC1115

PC1139

330U_D2_2VM_R9M

PC1159

PC1117

PC1116

1

2

22U_0805_6.3V6M

PC1141

PC1140

1

2

330U_D2_2VM_R9M

1

PC1160

+

2 3

2011_0815 PC1160 change form unmount to mount

22U_0805_6.3V6M

PC1118

1

2

22U_0805_6.3V6M

PC1142

1

2

22U_0805_6.3V6M

PC1119

22U_0805_6.3V6M

PC1143

2

1

Below is 458544_CRV_PDDG_0.5 Table 5-8.

5 x 22 ȝF (0805)

Socket Bottom

5 x (0805) no-stuff sites

7 x 22 ȝF (0805)

Socket Top

+1.05VS

22U_0805_6.3V6M

1

PC1125

2

22U_0805_6.3V6M

1

PC1126

PC1127

2

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

1

2

2 x (0805) no-stuff sites

2011_0808 place power name change form +V1.05S_VCCP to +1.05VS

22U_0805_6.3V6M

1

PC1129

PC1128

2

22U_0805_6.3V6M

1

PC1149

PC1150

2

22U_0805_6.3V6M

1

PC1130

2

22U_0805_6.3V6M

1

PC1151

2

2011_0815 PC714 change place form "+1.05VS_VCCPP" to "+1.05VS"

2011_1005 PC714 change to 330uF_2V_R9M

2011_1007 PC714 form SGA00001Q802 (S POLY C 330U 2V M X LESR6M SX H1.9) change to SGA00002680 (330U_D2_2.5VY_R9M)

1

PC1131

2

22U_0805_6.3V6M

1

PC1152

2

22U_0805_6.3V6M

PC1132

22U_0805_6.3V6M

PC1153

1

2

1

2

+1.05VS

22U_0805_6.3V6M

1

PC1133

PC1134

2

22U_0805_6.3V6M

1

PC1155

PC1154

2

22U_0805_6.3V6M

1

PC1135

2

22U_0805_6.3V6M

1

PC1156

2

1

+

PC714

2

330U_D2_2.5VY_R9M

2011_1230 PC1173 unmount

@

1

+

PC1177

470U_D2_2VM_R4.5M

2 3

A A

5

1

+

PC1178

330U_D2_2VM_R9M

2 3

2011_1005 chang to 330uF_2V_R9M

2011_1230 PC1175,PC1176 change to SGA00006100

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

3

LC Future Center Secret Data

Deciphered Date

2014/07/01

2

Title

PWR-PROCESSOR DECOUPLING

Size Document Number Rev

Custom

Date: Sheet

Thursday, November 01, 2012

ON.B152

ON.B152ON.B152

1

55 59

of

1.A

A

2011_0923 JUMP form 43X79 change to 43X79

B

C

D

1 1

PJ1201

+5VALW

2 2

3 3

2

112

JUMP_43X39

JUMP_43X39 @

@

22U_0805_6.3V6M

M_PWR_ON41,43

PC1207

1

2

PR1203

1 2

0_0402_5%

1.05VMP_VIN

12

PC1201

PC1201 22U_0805_6.3VAM

22U_0805_6.3VAM

EN_1.05VMP

PR1204

PR1204 1M_0402_5%

1M_0402_5%

1 2

12

PC1206

4

5

0.1U_0402_10V7K

PU1201

IN

LX

PG

GND

FB6EN

SY8032ABC_SOT23-6

3

2

1

1.05VMP_LX

FB=0.6Volt

PL1201

1UH_PH041H-1R0MS_3.8A_20%

1 2

12

PR1202

7.5K_0402_1%

PR1201

4.7_1206_5%

12

PC1203

680P_0603_50V7K

1.05VMP_FB

PR1205

10K_0402_1%

12

PC1202

68P_0402_50V8J

12

PC1205

PC1204

22U_0805_6.3VAM

+1.05VMP

PJ1202

2

JUMP_43X79@

1.05VMP max current=1A

112

1

RFC55

2

47P_0402_50V8J

+1.05VM+1.05VMP

1

RFC56

2

47P_0402_50V8J

4 4

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

LC Future Center Secret Data

Deciphered Date

C

2014/07/01

Title

PWR-+1.05VMP

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

D

of

56 59

1.A

5

D D

C C

4

3

2

1

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

2

2014/07/01

Title

PWR-Thermal Protect-NA

Size Document Number Rev

Custom

Thursday, November 01, 2012

Date: Sh eet

ON.B152

ON.B152ON.B152

1

57 59

of

1.A

5

4

3

2

1

9HUVLRQFKDQJHOLVW3,5/LVW

5HDVRQIRUFKDQJH 3* 0RGLI\/LVW 'DWH 3KDVH,WHP







D D

















C C













B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2012/07/01

3

LC Future Center Secret Data

Deciphered Date

2014/07/01

2

Title

Size Document Number Rev

Custom

Date: Sheet

PWR-PIR

ON.B152

ON.B152ON.B152

Thursday, November 01, 2012

ON.B152ON.B152

of

58 59

1

1.A

1

2

3

4

5

9HUVLRQ&KDQJH/LVW3,5/LVW

Phase

2012/09/XX

A A

B B

No1 Add CXXX,CXXX

Sch Layout

V

DescriptionNo. BOMDate

VV

function

Add XXX function

C C

D D

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF LC FUTURE CENTER.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF LC FUTURE CENTER.

3

2012/07/01

LC Future Center Secret Data

Deciphered Date

4

2014/07/01

Title

EE P.I.R.

Size D ocument Number Rev

Custom

Thursday, November 01, 2012

Date: Sheet

ON.B152

ON.B152ON.B152

5

59 59

of

1.A

Compal NM-A043, NM-A044 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual