A
B
C
D
E
COMPAL CONFIDENTIAL
COVER SHEET
MODEL NAME :
1 1
COMPAL P/N :
PCB NO :
Revision :
DATE :
2 2
LS-1971
1.0
2003/10/22
DAT20
DA8AT20L110
DAT20 VGA Board Schematics Document
nVIDIA NV34M GeForce FX Go5200 Graphics Controller
3 3
4 4
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
DAT20 VGA Board Cover Sheet
Size Document Number Rev
Custom
DAT20 LS-1971
Date: Sheet
11 3 Tuesday, November 11, 2003
E
of
1.0
A
B
C
D
E
BLOCK DIAGRAM
nVIDIA Graphic Controller
1 1
TV-OUT
AGP CONN.
PAGE 3
CRT
AGP
nVIDIA NV34M
AGP, DAC & LVDS
INTERFACE
PAGE 4
LVDS
LCD
CONNECTOR
PAGE 10
2 2
nVIDIA NV34M
POWER REGULATOR
+VGA_CORE
POWER INTERFACE
PAGE 6,7
+2.5VS
PAGE 11
nVIDIA NV34M
3 3
MEMORY INTERFACE
PAGE 5
CHANNEL A,B
4M32x4
64MB DDR SDRAM
NV34M (GeForce FX Go5200)
NV34U (GeForce FX Go5250)
NV31M (GeForce FX Go5600)
4 4
(BGA144)
PAGE 8,9
NV31FC (GeForce FX Go5650)
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
DAT20 VGA Board Block Diagram
Size Document Number Rev
Custom
DAT20 LS-1971
Date: Sheet
21 3 Wednesday, October 22, 2003
E
of
1.0
A
B
C
D
E
ON/OFFBTN#
AGP_ST[0..2] 4
AGP_AD[0..31] 4
AGP_C/BE#[0..3] 4
1 1
2 2
3 3
4 4
AGP_SBA[0..7] 4
H2
H_S473X473D138L
1
H3
H_R315X310D138
1
H5
H_R250X245D158
1
H7
H_C166D166N
1
Change 08/15
(New add)
(EMI request)
AGP_ST[0..2]
AGP_AD[0..31]
AGP_C/BE#[0..3]
AGP_SBA[0..7]
PID3 10
PID2 10
PID1 10
PID0 10
H1
H_R473X315D138
1
H4
H_R315X345D177
1
H6
H_R354X355D158
1
A
DACA_VSYNC 4
DACA_HSYNC 4
DDC_CLK 4
DDC_DATA 4
AGP_PIPE# 4
AGP_GNT# 4
AGP_REQ# 4
AGP_RBF# 4
AGP_WBF# 4
AGP_ADSTB1 4
AGP_ADSTB1# 4
AGP_STOP# 4
AGP_PAR 4
AGP_DEVSEL# 4
C3_STAT# 4
PCI_PIRQA# 4
B_PCIRST# 4,10
SUS_STAT# 4
R112 0_0402_5%
R113 0_0402_5%
R114 0_0402_5%
R115 0_0402_5%
VS_ON 7,11
1 2
1 2
1 2
1 2
+5VALW
+12VALW
+5VS
+3VS
CF5
SMD40M80
CF2
SMD40M80
FD2
FIDUCAL
AGP_ST0
AGP_ST2
AGP_ST1
AGP_AD30
AGP_AD28
AGP_AD27
AGP_AD22
AGP_C/BE#3
AGP_AD26
AGP_AD18
AGP_C/BE#2
AGP_AD16
AGP_AD15
AGP_AD8
AGP_AD13
AGP_AD6
AGP_AD10
AGP_AD2
AGP_AD5
AGP_AD3
AGP_AD0
AGP_AD1
1
1
1
AGP 120 Pin Connector to M/B
JP5
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
81
83
83
85
85
87
87
89
89
91
91
93
93
95
95
97
97
99
99
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
QTC_CA-P4-010-120-SVN322
New : QTC_CA-P4-010-120-SVN322_120P
CF1
SMD40M80
CF9
SMD40M80
FD5
FIDUCAL
1
CF10
SMD40M80
1
1
CF7
SMD40M80
FD6
FIDUCAL
1
1
1
FD1
FIDUCAL
1
B
100
102
104
106
108
110
112
114
116
118
120
CF8
SMD40M80
1
CF3
SMD40M80
1
FD4
FIDUCAL
1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
CF6
SMD40M80
1
CF4
SMD40M80
1
FD3
FIDUCAL
1
AGP_SBA1
AGP_SBA0
AGP_SBA3
AGP_SBA2
AGP_SBA6
AGP_SBA7
AGP_SBA5
AGP_SBA4
AGP_AD31
AGP_AD29
AGP_AD24
AGP_AD19
AGP_AD20
AGP_AD25
AGP_AD21
AGP_AD23
AGP_AD17
AGP_C/BE#1
AGP_C/BE#0
AGP_AD9
AGP_AD11
AGP_AD14
AGP_AD7
AGP_AD12
AGP_AD4
LUMA 4
COMPS 4
CRMA 4
B4
G4
R4
AGP_SBSTB# 4
AGP_SBSTB 4
+5VALW
AGP_FRAME# 4
AGP_TRDY# 4
AGP_IRDY# 4
AGP_BUSY# 4
AGP_ADSTB0# 4
AGP_ADSTB0 4
CLK_AGP_66M 4
DAC_BRIG 10
ENBKL 4,10
BKOFF# 10
+1.5VS
B+ B+
B+
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+AGP_VREF
R116 0_0402_5%
1 2
Change 08/15 (New add)
C
LEOS_CD-ON_BTN#
HDD_LED#
CD_FDD_LED#
CAPS_LED#
PADS_LED#
NUM_LED#
LID_SW#
KSI2
KSO5
KSI3
KSO14
KSI7
KSI6
KSI5
KSI4
KSO9
KSI1
Switch Board CONN.
16
EC_UTXD/KSO17
KSI4
LEOS_CD-ON_BTN#
ON/OFFBTN#
14
12
10
8
6
4
2
ACES_88018-1610
INT_KBD CONN.
INVT_PWM 4,10
(Right)
KSO15
KSO10
KSO11
KSO14
KSO13
KSO12
KSO3
KSO6
KSO8
KSO7
KSO4
KSO2
KSI0
KSO1
KSO5
KSI3
KSI2
KSO0
KSI5
KSI4
KSO9
KSI6
KSI7
KSI1
(Left)
JP3
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
ACES_85202-2405
JP6
12
34
56
78
91 0
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
QTC_CA-P4-010-40-SVN322
(USERBTN_1) EC_UTXD/KSO17+KSI4
(USERBTN_2) EC_UTXD/KSO17+KSI5
JP1
KSI5
15
PWR_LED#
13
LID_SW#
11
NUM_LED#
9
PADS_LED#
7
CAPS_LED#
5
CD_FDD_LED#
3
HDD_LED#
1
D
PWR_LED#
TP_CLK
TP_DATA
EC_UTXD/KSO17
KSO3
KSO4
KSI0
KSO0
KSO1
KSO7
KSO2
KSO15
KSO6
KSO8
KSO13
KSO12
KSO11
KSO10
+5VS
New : QTC_CA-P4-010-40-SVN322_40P
(BLUE)/(GREEN)
(BLUE)/(GREEN)
(BLUE)/(GREEN)
(BLUE)/(GREEN)
(BLUE)/(GREEN)
(BLUE)/(GREEN)
(C38 / 030)
+5VALW
1
C1
0.1U_0402_16V4Z
2
Touch Pad Connector
+5VS
+5VS
1
C32
0.1U_0402_16V4Z
2
KSO8
KSO7
KSO4
KSO2
100P_1206_8P4C_50V8
KSI0
KSO1
KSO5
KSI3
100P_1206_8P4C_50V8
KSI2
KSO0
KSI5
KSI4
100P_1206_8P4C_50V8
Title
Size Document Number Rev
Custom
Date: Sheet
TP_DATA
TP_CLK
CP2
8 1
2
7
3
6
4 5
CP3
8 1
2
7
3
6
4 5
CP4
8 1
2
7
3
6
4 5
Compal Electronics, Inc.
DAT20 AGP CONNECTOR
DAT20 LS-1971
JP4
6
5
4
3
2
1
ACES_85201-0605
KSO15
8 1
KSO10
7
KSO11
6
KSO14
100P_1206_8P4C_50V8
KSO13
8 1
KSO12
7
KSO3
6
KSO6
100P_1206_8P4C_50V8
KSO9
8 1
KSI6
7
KSI7
6
KSI1
100P_1206_8P4C_50V8
E
CP6
CP1
CP5
2
3
4 5
2
3
4 5
2
3
4 5
31 3 Wednesday, October 22, 2003
1.0
of
A
+3VS +3VS
1 2
1 2
Place close
to U2
Pin 2 & 3
@2200P_0402_50V7K
1 1
2 2
C36
AGP_AD[0..31] 3
AGP_SBA[0..7] 3
AGP_C/BE#[0..3] 3
AGP_ST[0..2] 3
+3VS
1
NV_THERMDA
2
NV_THERMDC
I2CC_SCL
I2CC_SDA
R86
10K_0402_5%
1 2
1 2
R90
@10K_0402_5%
0.1U_0402_16V4Z
1
C9
2
R27
2.2K_0402_5%
I2CC_SCL
I2CC_SDA
U4
2
D+
3
D-
8
SCLK
7
SDATA
@ADM1032ARM_RM8
AGP_AD[0..31]
AGP_SBA[0..7]
AGP_C/BE#[0..3]
AGP_ST[0..2]
STP_AGP#
AGP_BUSY#
(20mil)
1
C3
2
4.7U_0805_10V4Z
1 2
R102 220K_0402_5%
1 2
R97 220K_0402_5%
Selection Table For W180
3 3
Modulation
Setting
SST
Ratio
SS%
0
1
XTALOUTBUFF
+3VS
R10
1K_0402_5%
1 2
1 2
4 4
R9
1K_0402_5%
1.25%
3.75%
+SVDD
PLACE COLSE TO VGA
6
VDD
CLKOUT
X2 FS1
SS%
GND
W180-01GT_SO8
3
A
Pin AJ5, AJ7,
U5
1
X1/CLK
8
FS2
R28
2.2K_0402_5%
1
VDD1
6
ALERT#
4
THERM#
5
GND
+SVDD
L1
1 2
FCM2012C-800_0805
1
C11
0.1U_0402_16V4Z
2
AGP_ADSTB0#
AGP_ADSTB1#
Close VGA ball
(AK29)
less than 250mils
+AGP_VREF
(20mil)
1
C124
0.1U_0402_16V4Z
2
1 2
5
R82 22_0402_5%
2 7
SPREAD_RATE
4
XTALSSIN
1 2
R14
10K_0402_5%
+3VS
NV_THERCTL#
+3VS
1 2
R11
@1K_0402_5%
+3VS
1 2
R30
10K_0402_5%
@0.1U_0402_16V4Z
Thermal
C81
1 2
10P_0402_50V8K
CLK_AGP_66M 3
+3VS
AF26
Pull high
Support
AGP4X
63.4_0603_1%
+3VS
SWAPRDY_B
NV31,NV34 use.
NV18 not use.
+SVDD
R109 2.2K_0402_5%
1 2
R110 2.2K_0402_5%
1 2
B
AGP_AD0
AGP_AD1
AGP_AD2
1 2
1 2
I2CB_SCL
I2CB_SDA
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31
AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3
CLK_AGP_66M
B_PCIRST#
AGP_REQ#
AGP_GNT#
AGP_PAR
AGP_STOP#
AGP_DEVSEL#
AGP_TRDY#
AGP_IRDY#
AGP_FRAME#
PCI_PIRQA#
AGP_WBF#
AGP_RBF#
AGP_SBSTB
AGP_SBSTB#
AGP_ADSTB0
AGP_ADSTB0#
AGP_ADSTB1
AGP_ADSTB1#
AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
AGP_ST0
AGP_ST1
AGP_ST2
AGP_BUSY#
STP_AGP#
CRMA
LUMA
COMPS
DACB_HSYNC
DACB_VSYNC
DACB_RSET
XTALIN
XTALOUT
XTALSSIN
XTALOUTBUFF
NV_THERMDA
NV_THERMDC
+3VS
1 2
R26
@200_0402_5%
1
C33
2
R85
1 2
10_0402_5%
B_PCIRST# 3,10
AGP_REQ# 3
AGP_GNT# 3
AGP_PAR 3
AGP_STOP# 3
AGP_DEVSEL# 3
AGP_TRDY# 3
AGP_IRDY# 3
AGP_FRAME# 3
PCI_PIRQA# 3
AGP_WBF# 3
AGP_RBF# 3
AGP_PIPE# 3
AGP_SBSTB 3
AGP_SBSTB# 3
AGP_ADSTB0 3
AGP_ADSTB0# 3
AGP_ADSTB1 3
AGP_ADSTB1# 3
R93 10K_0402_5%
AGP_BUSY# 3
C3_STAT# 3
CRMA 3
LUMA 3
COMPS 3
R39
1 2
R59 10K_0402_5%
B
+AGP_VREF
I2CB_SCL
I2CB_SDA
AJ28
AK28
AH27
AK27
AJ27
AH26
AJ26
AH25
AH23
AJ23
AH22
AJ22
AJ21
AK21
AH20
AJ20
AG26
AE24
AG25
AG24
AF24
AG23
AE22
AF22
AE21
AG20
AG19
AF19
AE19
AF18
AG18
AE18
AJ24
AH19
AF25
AG22
AG12
AF15
AF13
AE15
AK18
AH17
AJ16
AJ17
AG16
AK16
AG15
AE10
AG17
AG14
AJ18
AJ19
AK13
AJ13
AK24
AJ25
AG21
AF21
AJ11
AH11
AJ12
AH12
AJ14
AH14
AJ15
AH15
AG13
AE16
AE13
AK29
AF16
AF12
AG11
AE2
AD2
AD1
AF3
AE3
AD3
AE7
AF6
AD4
Y5
AC4
AJ6
AH6
AJ7
AJ5
H2
H3
C2
C1
D1
E2
D2
I2CB_SCL 10
I2CB_SDA 10
DAC2
SSC
C
CLK
C
FPBCLKOUT#
FPBCLKOUT
DVOHSYNC
DVOVSYNC
DVOCLKOUT
DVOCLKOUT#
I2CC_SCL
I2CC_SDA
ZV PORT / EXT TMDS / GPIO / ROM LVDS TMDS
DVOCLKIN
IFPATXDO#
IFPATXDO
IFPATXD1#
IFPATXD1
IFPATXD2#
IFPATXD2
IFPATXD3#
IFPATXD3
IFPATXC#
IFPBTXD4#
IFPBTXD4
IFPBTXD5#
IFPBTXD5
IFPBTXD6#
IFPBTXD6
IFPBTXD7#
IFPBTXD7
IFPBTXC#
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_HSYNC
DACA_VSYNC
DACA_RSET
I2CA_SCL
DAC1
I2CA_SDA
SWAPRDY_A
DACA_IDUMP
IFPCTXD0#
IFPCTXD0
IFPCTXD1#
IFPCTXD1
IFPCTXD2#
IFPCTXD2
IFPCTXC#
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
ROMA14
ROMA15
ROMCS#
VIPPCLK
VIPHCTL
VIPHCLK
VIPHAD0
VIPHAD1
VIPD0
VIPD1
VIPD2
VIPD3
VIPD4
VIPD5
VIPD6
VIPD7
DVOD0
DVOD1
DVOD2
DVOD3
DVOD4
DVOD5
DVOD6
DVOD7
DVOD8
DVOD9
DVOD10
DVOD11
DVODE
BUFRST#
STRAP0
STRAP1
STRAP2
STRAP3
IFPATXC
IFPBTXC
IFPCTXC
G5
F4
G4
H5
H4
J4
J5
J6
K4
K6
M2
M3
R2
R1
AF2
L4
M4
M5
P3
P2
J3
J2
K2
K1
L3
L2
N2
N1
AG2
AH1
AG3
AJ1
AH2
AK1
AJ3
AK3
AH4
AK4
AJ4
AH5
AD5
AD6
AE4
AJ2
AK2
AG6
AG7
B1
AG1
G1
G2
F2
F3
T4
U4
AA1
Y2
W3
V3
V4
U5
V1
W2
V5
W4
AB2
AB3
W6
Y6
AC2
AC3
Y3
AA2
AK10
AJ10
AJ9
DACA_HSYNC
AH9
DACA_VSYNC
AJ8
AG8
AG5
AF7
AF9
AG10
T2
R3
T3
U2
V2
U3
P4
P5
SPREAD_RATE
ENVDD
SUS_STAT#
POWER_SEL
NV_THERCTL#
GPIO9
TXOUT0TXOUT0+
TXOUT1TXOUT1+
TXOUT2TXOUT2+
TXCLKTXCLK+
TZOUT0TZOUT0+
TZOUT1TZOUT1+
TZOUT2TZOUT2+
TZCLKTZCLK+
DACA_RSET
DDC_CLK
DDC_DATA
ROMA14
ROMA15
VIPHCTL
VIPD2
VIPD3
VIPD4
VIPD5
VIPD6
VIPD7
DVOD2
DVOD3
DVOD8
DVOD9
DVO_HSYNC
I2CC_SCL
I2CC_SDA
DVOCLKIN
STRAP0
STRAP1
R
G
B
R80 10K_0402_5%
SWAPRDY_A
NV31,NV34 use.
NV18 not use.
R56
10K_0402_5%
Delete R38 & add R50.
TXOUT0- 10
TXOUT0+ 10
TXOUT1- 10
TXOUT1+ 10
TXOUT2- 10
TXOUT2+ 10
TXCLK- 10
TXCLK+ 10
TZOUT0- 10
TZOUT0+ 10
TZOUT1- 10
TZOUT1+ 10
TZOUT2- 10
TZOUT2+ 10
TZCLK- 10
TZCLK+ 10
R3
G3
B3
DACA_HSYNC 3
DACA_VSYNC 3
1 2
R83 130_0603_1%
1 2
U1A
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE#0
C/BE#1
C/BE#2
C/BE#3
PCICLK
PCIRST#
PCIREQ#
PCIGNT#
PCIPAR
PCISTOP#
PCIDEVSEL#
PCITRDY#
PCIIRDY#
PCIFRAME#
PCIINTA#
NC
AGPWBF#
AGPRBF#
AGPPIPE/ DBI_HI
NC/ DBI_LO
AGPSB_STB/ ADSTBF
AGPSB_STB#/ ADSTBS
AGPADSTB0/ ADSTBF0
AGPADSTB0#/ADSTBS0
AGPADSTB1/ ADSTBF1
AGPADSTB1#/ADSTBS1
AGPSBA0
AGPSBA1
AGPSBA2
AGPSBA3
AGPSBA4
AGPSBA5
AGPSBA6
AGPSBA7
AGPST0
AGPST1
AGPST2
AGPVREF
NC/AGPMBDET#
AGP_BUSY#
STP_AGP#
DACB_RED/CHROMA
DACB_GREEN/LUMA
DACB_BLUE/COMPOSITE
DACB_HSYNC
DACB_VSYNC
DACB_RSET
I2CB_SCL
I2CB_SDA
SWAPRDY_B
STEREO
DACB_IDUMP
XTALIN
XTALOUT
XTALSSIN
XTALOUTBUFF
THERMDA
THERMDC
JTAG[0]
JTAG[1]
JTAG[2]
JTAG[3]
JTAG[4]
NV34M_EPBGA701
nVIDIA
NV31/34
PCI/AGP
AGP4X/8X
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
R118 @0_0402_5%
1 2
R117 0_0402_5%
1 2
ENVDD 10
R69 10K_0402_5%
DDC_CLK 3
DDC_DATA 3
ENBKL GPIO2
1 2
R119 @0_0402_5%
1 2
R73 10K_0402_5%
Change 08/15 (New add)
Low
High
Low
High
Low
High
1 2
Low
High
Low
High
+3VS
D
E
INVT_PWM 3,10
ENBKL 3,10
POWER_SEL 11
+3VS
ENBKL GPIO9
1 2
PCI_AD_SWAP: 0-RVSERSED 1-NORMAL
1
SUB_VENDOR: 0-SYSTEM BIOS 1-ADAPTER BIOS
2
R42 10K_0402_5%
RAM_CFG[3:0]
3
R48 @10K_0402_5%
0
R49 10K_0402_5%
4
SUS_STAT#
ENBKL
R41 10K_0402_5%
ENVDD
R43 10K_0402_5%
POWER_SEL
R66 @10K_0402_5%
L: Maximum battery savings
H: Maximum performance
STRAP0
1 2
1 2
1 2
STRAP1
(1101 = 4Mx32 DDR, DQS per byte)
(X000 = 8Mx32 DDR, DQS per byte) -Samsung
(X001 = 8Mx32 DDR, DQS per byte) -Hynix
DVOD2
DVOD3
1 2
R60 10K_0402_5%
1 2
1 2
1 2
SUS_STAT# 3
R4 10K_0402_5%
R36 10K_0402_5%
R37 @10K_0402_5%
1
5
R29 @10K_0402_5%
2
R53 @10K_0402_5%
3
CRYSTAL: (10)-27MHz
6
R44 10K_0402_5%
0
1 2
1 2
1 2
1
TVMODE: (01)-NTSC
7
0
R47 10K_0402_5%
1
AGP8X/4X: (0)-8X / (1)-4X
8
R50 10K_0402_5%
AGP_SIDEBAND: (0)-ENABLE
9
R6 10K_0402_5%
AGP_FASTWRITE: (0)-ENABLE
10
R65 10K_0402_5%
PCI_DEVID[3:0]
11
R45 10K_0402_5%
0
R7 10K_0402_5%
1
R8 @10K_0402_5%
2
R51 10K_0402_5%
3
BUS_TYPE: (1)-AGP
12
13
ROM TYPE: (00)-PARALLEL
0
R46 10K_0402_5%
1
R5 10K_0402_5%
1 2
1 2
1 2
1 2
(0100 NV34M / 1101 NV33M)
1 2
1 2
1 2
1 2
1 2
1 2
Compal Electronics, Inc.
Title
Size Document Number Rev
Custom
Date: Sheet
(0101 NV34M-Ultra / 1010 NV31M)
1
C41
22P_0402_50V8J
2
nVIDIA NV34M GeForce FX Go5200 AGP Interface
DAT20 LS-1971
DACA_VSYNC
DACA_HSYNC
VIPD2
VIPD6
DACB_VSYNC
DACB_HSYNC
DVOD9
VIPD7
DVOD8
VIPD4
VIPD5
VIPD3
DVO_HSYNC
VIPHCTL
ROMA14
ROMA15
1 2
27MHZ_16PF
1 2
R54 @2M_0402_5%
R31 10K_0402_5%
R57 10K_0402_5%
R34 10K_0402_5%
R35 10K_0402_5%
R38 @10K_0402_5%
R1 @10K_0402_5%
R63 @10K_0402_5%
R33 @10K_0402_5%
R2 @10K_0402_5%
R3 10K_0402_5%
R40 @10K_0402_5%
R55 10K_0402_5%
Y1
XTALOUT XTALIN
1
2
E
C38
22P_0402_50V8J
+3VS
+3VS
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1.0
41 3 Wednesday, October 22, 2003
of
A
B
C
D
E
NMDA0
NMDA1
NMDA2
NMDA3
NMDA4
NMDA5
NMDA6
NMDA7
NMDA8
NMDA9
NMDA10
NMDA11
NMDA12
NMDA13
NMDA14
NMDA15
NMDA16
NMDA17
NMDA18
NMDA19
NMDA20
NMDA21
NMDA22
NMDA23
NMDA24
NMDA25
NMDA26
NMDA27
NMDA28
NMDA29
NMDA30
NMDA31
NMDA32
NMDA33
NMDA34
NMDA35
NMDA36
NMDA37
NMDA38
NMDA39
NMDA40
NMDA41
NMDA42
NMDA43
NMDA44
NMDA45
NMDA46
NMDA47
NMDA48
NMDA49
NMDA50
NMDA51
NMDA52
NMDA53
NMDA54
NMDA55
NMDA56
NMDA57
NMDA58
NMDA59
NMDA60
NMDA61
NMDA62
NMDA63
NDQMA[0..7]
NDQSA[0..7]
NMAA[0..11]
NMDA[0..63]
U1B
N25
N27
N26
M25
K26
K27
J27
H27
N29
M29
M28
L29
J29
J28
H29
G30
K25
J26
J25
G26
F28
F26
E27
D27
H28
G29
F29
E29
C30
C29
B30
A30
AJ29
AJ30
AH29
AH30
AF29
AE29
AD29
AC28
AG28
AF27
AE26
AE28
AD25
AB25
AB26
AA25
AD30
AC29
AB28
AB29
Y29
W28
W29
V29
AC27
AB27
AA27
AA26
W25
V26
V27
V25
NV34M_EPBGA701
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
FBAA0
FBAA1
FBAA2
FBAA3
FBAA4
FBAA5
FBAA6
FBAA7
FBAA8
FBAA9
FBAA10
FBAA11
FBAA12
FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7
FBADQS0
FBADQS1
FBADQS2
FBADQS3
FBADQS4
FBADQS5
FBADQS6
FBADQS7
FBARAS#
MEMORY
INTERFACE A
FBACAS#
FBAWE#
FBACS0#
FBACS1#
FBACKE
FBACLK0
FBACLK0#
FBACLK1
FBACLK1#
FBABA0
FBABA1
FB_VREF
V30
U28
U29
T28
T29
T27
T30
T26
T25
R27
R25
R30
U24
L27
K29
G25
E28
AF28
AD27
AA30
Y27
M27
K30
G27
D30
AG30
AD26
AA29
W27
P28
P29
R28
U27
P27
N30
U21
V21
N21
P21
R26
R29
C28
NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NDQMA0
NDQMA1
NDQMA2
NDQMA3
NDQMA4
NDQMA5
NDQMA6
NDQMA7
NDQSA0
NDQSA1
NDQSA2
NDQSA3
NDQSA4
NDQSA5
NDQSA6
NDQSA7
NMRASA#
NMCASA#
NMWEA#
NMCSA0#
NMCSA1#
NMCKEA
NMCLKA0
NMCLKA0#
NMCLKA1
NMCLKA1#
NMA_BA0
NMA_BA1
A_REF
(20 mil)
NMRASA# 8
NMCASA# 8
NMWEA# 8
NMCSA0# 8
NMCSA1# 8
NMCKEA 8
NMA_BA0 8
NMA_BA1 8
1
C123
0.1U_0402_16V4Z
2
NDQMA[0..7] 8
NDQSA[0..7] 8
NMAA[0..11] 8
1 1
2 2
3 3
4 4
NMDA[0..63] 8
+2.5VS
1 2
1 2
NDQMB[0..7] 9
NDQSB[0..7] 9
NMDB[0..63] 9
1 2
R99
@120_0402_5%
1 2
R98
@120_0402_5%
R104
1K_0402_1%
R103
1K_0402_1%
NMAB[0..11] 9
NDQMB[0..7]
NDQSB[0..7]
NMAB[0..11]
NMDB[0..63]
NMCLKA0 8
NMCLKA0# 8
NMCLKA1 8
NMCLKA1# 8
1 2
R105 1K_0402_5%
1 2
R87 1K_0402_5%
NMDB0
NMDB1
NMDB2
NMDB3
NMDB4
NMDB5
NMDB6
NMDB7
NMDB8
NMDB9
NMDB10
NMDB11
NMDB12
NMDB13
NMDB14
NMDB15
NMDB16
NMDB17
NMDB18
NMDB19
NMDB20
NMDB21
NMDB22
NMDB23
NMDB24
NMDB25
NMDB26
NMDB27
NMDB28
NMDB29
NMDB30
NMDB31
NMDB32
NMDB33
NMDB34
NMDB35
NMDB36
NMDB37
NMDB38
NMDB39
NMDB40
NMDB41
NMDB42
NMDB43
NMDB44
NMDB45
NMDB46
NMDB47
NMDB48
NMDB49
NMDB50
NMDB51
NMDB52
NMDB53
NMDB54
NMDB55
NMDB56
NMDB57
NMDB58
NMDB59
NMDB60
NMDB61
NMDB62
NMDB63
F13
D13
E13
F12
E10
D10
D9
D8
B13
B12
C12
B11
B9
C9
B8
A7
F10
E9
F9
F7
C6
E6
D5
C4
C8
B7
B6
B5
A3
B3
A2
B2
B29
A29
B28
A28
B26
B25
B24
C23
E26
D26
E25
C25
E24
F22
E22
F21
A24
B23
C22
B22
B20
C19
B19
B18
D23
D22
D21
E21
F19
E18
D18
F18
NMCKEA
NMCKEB
U1C
FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63
NV34M_EPBGA701
FBCA0
FBCA1
FBCA2
FBCA3
FBCA4
FBCA5
FBCA6
FBCA7
FBCA8
FBCA9
FBCA10
FBCA11
FBCA12
FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7
FBCDQS0
FBCDQS1
FBCDQS2
FBCDQS3
FBCDQS4
FBCDQS5
FBCDQS6
FBCDQS7
FBCRAS#
FBCCAS#
MEMORY INTERFACE
B
FBCWE#
FBCCS0#
FBCCS1#
FBCCKE
FBCCLK0
FBCCLK0#
FBCCLK1
FBCCLK1#
FBCBA0
FBCBA1
C17
B17
C16
B16
D16
A16
E16
F16
D15
F15
A15
G17
D11
B10
D7
C5
C26
F24
B21
D20
D12
A10
E7
A4
A27
D24
A21
D19
C14
B14
C15
D17
D14
A13
K18
K17
K13
K14
E15
B15
NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11
NDQMB0
NDQMB1
NDQMB2
NDQMB3
NDQMB4
NDQMB5
NDQMB6
NDQMB7
NDQSB0
NDQSB1
NDQSB2
NDQSB3
NDQSB4
NDQSB5
NDQSB6
NDQSB7
NMRASB#
NMCASB#
NMWEB#
NMCSB0#
NMCSB1#
NMCKEB
NMCLKB0
NMCLKB0#
NMCLKB1
NMCLKB1#
NMB_BA0
NMB_BA1
NMAB0
A18
NMB_BA0 9
NMB_BA1 9
NMRASB# 9
NMCASB# 9
NMWEB# 9
NMCSB0# 9
NMCSB1# 9
NMCKEB 9
1 2
R94
@120_0402_5%
1 2
R88
@120_0402_5%
NMCLKB0 9
NMCLKB0# 9
NMCLKB1 9
NMCLKB1# 9
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
nVIDIA NV34M GeForce FX Go5200 DDR Interface
Size Document Number Rev
Custom
DAT20 LS-1971
Date: Sheet
51 3 Wednesday, October 22, 2003
E
of
1.0