Compal LA-H271P Schematics Rev1.0

A
B
C
D
E
MODEL NAME :
1 1
PCB NO :
LA-H271P
BOM P/N : GPIO MAP:
EDA50
451AG331L01
X10_CFLH_GPIO map Rev1.5_20181224
WHITEHAVEN MLK 15
2 2
3 3
Coffee Lake H-type (2 chip)
REV : 1.0(A00)
2019.4.10
Pop Component
EMI@, RF@, ESD@ : EMI/ESD/RF part POP
CONN@ : Connector Component XDP@ : Total debug Component (pop them until ST) NDS3@ : non Deep sleep support eSPI@ : eSPI interface RTD3@ : TBT RTD3 support
Layout Dell logo
@ : Nopop Component
@EMI@, @RF@, @ESD@ : EMI/ESD/RF part nopop
DS3@ : Deep sleep support
COPYRIGHT 2017 ALL RIGHT RESERVED REV: X00 PWB: XXXXX
4 4
DATE: 1707-03
PCB 26J LA-H271P REV0 MB 3
Part Number
DAB0004C000
Power CKT: 0108
Description
PCB 26J LA-H271P REV0 MB 3
A
B
LPC@ : LPC interface NRTD3@ : non TBT RTD3 support
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
C
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Cover
Cover
Cover
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
E
1 103
1 103
1 103
1.0
1.0
1.0
A
B
C
D
E
SW3_DP1
SW4_DP2
DGFF CARD
I_eDP
D_eDP
A=C, N=D
DP MUX1 PS8461 DP1.4
DP MUX2 PS8461 DP1.4
UMA
PS175
PS8330
P.31
P.31
P.28
CPU_DP1
GPU_DP1
SW2_DP2_2_1
GPU_DP2
JIO1
HDMI
mDP
CPU_DP2
PEG x8
HDMI
DSC
CPU_DP3
JDGFF2
(0~7)
PEG x8 (8~15)
JDGFF3
DP DEMUX PS8338
P.30
mDP
SW2_DP2_2_2
JDGFF1 JDGFF2 JDGFF3
JDGFF1
HDMI2.0 Conn
mDP 1.4 Conn
JDGFF4
P.27
DGFF CARD
A=E, N=C
A=D, N=E
eDP Panel Conn
1 1
Type-C Conn
Type-C Conn
2 2
SW1_eDP
P.38
P.45
P.45
PD Cypress
CCG5
CYPD5225
eDP MUX PS8331
P.44
USB2 Port4~ 5
P.29
TBT Titan Ridge DP
P.42~45
HDMI2.0 Conn
mDP 1.2 Conn
eDP
DDI1
Intel
DDI2
CoffeeLake-H
DDI3
6+2e BGA CPU
PEG
1440 Pins
42X28mm 45W
P.6~13
DMI x4 gen 3
Intel CannonLake-H CM246 BGA
(DDR4) Memory Bus
1.2V DDR4 2400/2667 MHz (Overclocking)
USB3 Port 1
USB2 Port 1
USB3 Port 3
USB2 Port 2
USB3.1
DDR4 ECC-SO-DIMM X4
USB Power Share SLGC55544CVTR
USB Power Share SLGC55544CVTR
P.23~26BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
USB 3.1 JUSB1 Right side
P.71
P.71 P.71
USB Charger
USB 3.1 JUSB2 Right Side
P.71
USB Charger
874 Pins
Port 5 Port8Port 6
P.70
P.70
Intel Jacksonville WGI219LM
RJ45
P.51
P.51
RTS5243 SD5.1/MMC
SDXC
3 3
4 4
Port 1~4 Port 7
TBT DP Titan Ridge
P.42~45
Port 13~16
SATA Interposer board
SATA redriver PI3EQX6741ST
Port 21~24
M.2 Card slot_5 SSD/ Optane
P.68
Golden Finger
M.2 Card slot_4 SSD/ Optane
SATA Port4 SATA Port1A
GPIO Expander ITE IT8306
Port 17~20
P.67
PCIE BUS
Port 9~12
M.2 Card slot_3 SSD/ Optane
P.67
P.59
M.2 Card slot_2 WWAN/LTE /Cache
M.2 Card slot_1 WLAN/BT /WiGig
P.52
USB2 Port8 USB2 Port 6
USB3 Port2
Micro SIM Card
P.52
I2C BUS
SMSC KBC MEC5106
change model name
FAN CONN
P.77
P.52
P.58
KB/TP CONN
I2C BUS
P.62
24X25mm
eSPI
SPI
Free Fall Sensor
LNG2DMTR
P.14~22
Winbon sop8
W25Q256FVFIQ
256Mb 4K sector
TPM2.0 NPCT750JABYXF
change model name
P.54
USB2.0
HD Audio
P.17
P.65
Audio Codec ALC3281
P.56
USB2 Port 11
USB2 Port 9
USB Port 10
P.41
On USH/B
Universal Jack
Digital Camera
Touch screen
LYNX(CV2) BRCM58102
Int. Speaker
P.56
P.56
P.38
P.38
TDA8034HN
Smart Card
SPI
RFID/NFC
SPI
Fingerprint CONN
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Block Diagram
Block Diagram
Block Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
E
2 103
2 103
2 103
1.0
1.0
1.0
5
4
3
2
1
POWER STATES
State
S0 (Full ON) / M0
D D
S3 (Suspend to RAM) / M1 LOW HIGH HIGH HIGH
S4 (Suspend to DISK) / M1 LOW HIGH LOW
S5 (SOFT OFF) / M1 LOW LOWLOW
S3 (Suspend to RAM) / M-OFF
S4 (Suspend to DISK) / M-OFF HIGH
S5 (SOFT OFF) / M-OFF
Signal
SLP S3#
HIGH
LOW HIGH HIGH HIGH
LOW LOW LOW
LOW LOW LOW LOW
SLP
SLP S4#
HIGH HIGH HIGH
LOW
LOW
S5#
S4 STATE#
ALWAYS PLANE
ON
ON
ON
ON
ON
ON
ON
RUN
CLOCKS
PLANE
ON ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF OFF
OFF
OFF
OFF OFF
PCH
PM TABLE
+PWR_SRC
C C
State
S0
S3
S5 S4/AC
S5 S4/AC don't exist
B B
power plane
+5V_ALW
+3.3V_ALW
+3.3V_ALW2 +1.0V_VCCST
+3.3V_ALW_DSW
+3.3V_ALW_PCH
+3.3V_RTC_LDO
+1.8V_ALW
+1.0V_PRIM
+1.8V_PRIM
ON
ON
OFF
+3.3V_SUS
+1.2V_MEM
+2.5V_MEM +VCC_GT
ON ON
ON
OFF
OFF
+5V_RUN
+3.3V_RUN
+1.2V_RUN
+3.3V_DGFF
+5V_DGFF +VCC_SA
+DGFF_PWR_SRC
+0.675V_DDR_VTT
OFFON
OFF
OFF
(M-OFF)
+VCC_CORE
+VCC_IO
+1.0V_VCCSTG
+1.8V_RUN
ON
OFF
OFF
OFF
USH
USB2 PORT# DESTINATION
1
2
3
4
5
6
7
JUSB1
JUSB2
NA
Cypress PD
Cypress PD
NA
NA
M.2 Slot-2 (WWAN/LTE)8
9
10
11
12
13
14
0
1
PCI EXPRESS
PORT 1~4
17" NA/ 15" Touch screen
USH
Camera
NA
NA
M.2 Slot-1 (BT)
BIO
NA
DESTINATION
TBT-Titan Ridge
USB3.0 DESTINATION
Port 1
Port 2
Port 3
Port 4
Port 5
A A
5
Port 6
JUSB1
M.2 Slot-2 (WWAN/LTE)
JUSB2
NA
NA
NA
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
SATA
SATA 0B
SATA 1A
SATA 2
SATA 3
SATA 4
SATA 5
2016/01/01
2016/01/01
2016/01/01
DESTINATION
NA
SLOT3 SSD
NA
NA
SATA HDD
NA
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
PORT 5
PORT 6
PORT 7
PORT 8
PORT9~12
PORT13~16
PORT17~20
PORT21~24
2017/01/01
2017/01/01
2017/01/01
2
10/100/1G LOM
MMI(Card reader)
M.2 Slot-1 (WLAN/Wigig)
M.2 Slot-2 (WWAN/LTE)
SLOT3 SSD 2280/ Optane
NA
SLOT4 SSD 2280/ Optane
SLOT5 PCIE ONLY 2280/ Optane
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Notes List
Notes List
Notes List
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
3 103
3 103
3 103
1.0
1.0
1.0
5
4
3
2
1
TYPE-C
+5V_ALW
+Vbus_1(5V~20V) +Vbus_2(5V~20V)
CYPD5225 (UT5)
+TBTB_VBUS(5V~20V)
+TBTA_VBUS(5V~20V)
D D
ADAPTER
BATTERY
C C
CHARGER
+PWR_SRC
EN_INVPWR
3.3V_RUN_GFX_ON
IMVP_VR_ON
RUN_ON_EC
SIO_SLP_S3#
PCH_PRIM_EN
+3.3V_ALW_R
SIO_SLP_S4#
RT8207 (PU200)
SLOT5_SSD_PWR_EN
+3.3V_SSD5
SLOT4_SSD_PWR_EN
AOZ1336 (UZ58)
+3.3V_SSD4
3.3V_RUN_GFX_ON_EC
EM5209VF
(UZ41)
+3.3V_DGFF
B B
+0.6V_DDR_VTT
+1.2V_MEM
SLOT3_SSD_PWR_EN
EM5209VF
(UZ9)
+3.3V_SSD3
NCP81215MNTXG
SY8288BRAC
(PU501)
EM5209VF
(UZ40)
+3.3V_RUN
DMP3050LVT
(QV1)
AO4435L
(QZ19)
(PU1100)
RUN_ON
TPS51212
(PU800)
+3.3V_ALW
RUN_ON
ALWON
TPS51285B
(PU100)
SIO_SLP_LAN#
SIO_SLP_WLAN#
AUX_EN_WOWL
EM5209VF
(UZ44)
+3.3V_WWAN
+3.3V_WLAN
+BL_PWR_SRC
+DGFF_PWR_SRC
+VCC_CORE
SY8288RAC
(PU300)
ALWON
PCH_ALW_ON
AOZ1336
(UZ42)
+3.3V_ALW_PCH
+VCC_GT
3.3V_WWAN_EN
AOZ1336
(UZ7)
+3.3V_LAN
+1.0VS_VCCIO
+1.0V_PRIM
TPS51285B
(PU101)
+5V_ALW2 +3.3V_ALW2
(PU500)
+VCC_SA
SIO_SLP_S0#
RUN_ON
SIO_SLP_S4#
+5V_ALW
+5V_ALW_RSY8288CRAC
ENVDD_PCH
DGFF_ENVDD
LCD_VCC_TEST_EN
G524B1T11U
(UV24)
+LCDVDD
TPS22961
TPS22961
(UZ21)
PCH_PRIM_EN
SY8003DFC
(PU900)
+1.8V_PRIM
+3.3V_ALW
+3.3V_TBT_SX
+1.0V_VCCSTG(UZ19)
+1.0V_VCCST
RUN_ON
USB_POWERSHARE_E N#
USB_POWERSHARE_E N#
USB_POWERSHARE_E N#
EM5209VF
HDD_IFDET RUN_ON
3.3V_RUN_GFX_ON_EC
SIO_SLP_S4#
SY8003DFC
(PU400)
+2.5V_MEM
(UZ40)
AOZ1336
SLGC55544CVTR
SLGC55544CVTR
SLGC55544CVTR
+TBTA_VBUS
+TBTB_VBUS
+DC_IN
+PWR_SRC
(UZ23)
(UI3)
EM5209VF
(UZ41)
(UI1)
(UI2)
+5V_RUN
+5V_HDD
RT9069 (UT7)
+5V_RUN_AUDIO
+5V_USB_PWR1
+5V_DGFF
+5V_USB_PWR2
+5V_USB_PWR3
+3.3V_VDD_PIC
PCH_PRIM_EN
SIO_SLP_S4#
AOZ1336 (UZ26)
+VCC_SFR_OC
SIO_SLP_S4#
AOZ1336
(UZ43)
+1.2V_RUN
3.3V_CAM_EN#
LP2301ALT1G
(QZ1)
RUN_ON
+3.3V_RUN_AUDIO
AOZ1336
(UZ45)
+1.8V_RUN
+CAMERA_VDD
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Power MAP
Power MAP
Power MAP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
4 103
4 103
4 103
1.0
1.0
1.0
5
4
3
2
1
Timing Diagram for S5 to S0 mode
VCCST_PWRGD
D D
12
15
17
12
H_PWRGD
PCH_PLTRST#
0.6V_DDR_VTT_ON
CPU
VCCST_PWRGD
PROCPWRGD
PLTRST#
DDR_VTT_CNTL
VDDQ VDDQC VCCPLL_OC
+1.0V_PRIM
VCCPRIM_1P0 VCCPRIM_CORE DCPDSW_1P0
VCCAPLL_1P0 VCCCLK1~6 VCCMPHYGT_1P0
C C
3
+3.3V_ALW
+3.3V_SPI
+3.3V_ALW_DSW
+3.3V_ALW_PCH
5
+1.8V_PRIM
6
+RTC_CELL
PCH_PLTRST#
17
PCH_DPWROK
4
VCCSRAM_1P0 VCCAMPHYPLL_1P0 VCCAPLLEBB
VCCDSW_3P3
VCCHDA VCCSPI VCCPRIM_3P3 VCCPGPPA~E VCCRTCPRIM
VCCPGPPA
VCCRTC
PLTRST#
DSW_PWROK
PCH
+VCC_CORE
VCC
+1.0VS_VCCIO
VCCIO
+VCC_GT
VCCGT
+1.35V_MEM
+1.0V_VCCST
VCCST VCCSTG VCCPLL
+VCC_SA
VCCSA
PWRBTN#
RSMRST#
SLP_SUS#
SLP_S5#
SLP_S4#
SLP_S3#
SLP_A#
SLP_LAN#
SLP_WLAN#/GPD9
SYS_PWROK
PCH_PWROK
VCCST_PWRGD
PROCPWRGD
SIO_PWRBTN#
PCH_RSMRST#
SIO_SLP_SUS#
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_LAN#
SIO_SLP_WLAN#
RESET_OUT#
PCH_PWROK
VCCST_PWRGD
H_PWRGD
11
+1.0V_PRIM
8
5
10
11
16
14
12
15
TPS22961
7
9
SIO_SLP_S0#
RUN_ON
13
+VCC_SA
+VCC_CORE
+VCC_GT
10
+PWR_SRC
ISL95857
PCH_PWROK
14
ADAPTER
BATTERY
7
4
16
SIO_SLP_SUS#
5
SIO_SLP_S4#
SIO_SLP_S5#
9
SIO_SLP_LAN#
SIO_SLP_S3#
11
SIO_SLP_A#SIO_SLP_A#
PCH_RSMRST#
PCH_DPWROK
RESET_OUT#
IMVP_VR_ON
12
Power Button
2AC1BAT
+PWR_SRC
ALWON
+PWR_SRC
5
SIO_SLP_SUS#
@PCH_ALW_ON
EN_INVPWR
SIO_SLP_S4#
0.6V_DDR_VTT_ON
SYX198EC 5105
SYX198
+3.3V_ALW
EM5209VF
+PWR_SRC
AO6405
+5V_ALW2 +5V_ALW
+3.3V_ALW2 +3.3V_ALW
+PWR_SRC
RT8207MZ
+3.3V_RTC_LDO
+3.3V_ALW_PCH
+BL_PWR_SRC
+1.2V_MEM
+0.6V_DDR_VTT
12
1BAT
2AC
5
Pop option
+3.3V_SPI
18
VDDQ
VTT
DDR
+3.3V_ALW
B B
+LCDVDD
AP2821K
ENVDD_PCH
+3.3V_ALW
11
EM5209VF+3.3V_LAN
SIO_SLP_LAN#
+3.3V_RUN
LP2301ALT1G+3.3V_CAM
3.3V_CAM_EN#
EDP_VDDEN
SLP_LAN#
GPD7
11
SIO_SLP_WLAN#
EC 5105
11
RUN_ON
+5V_ALW
EM5209VF
+3.3V_ALW
EM5209VF
+5V_RUN
+3.3V_RUN
+5V_HDD
+3.3V_HDD
+PWR_SRC
+PWR_SRC
+1.0V_PRIM
6
A A
5
6
+1.8V_PRIM
TLV62130
+3.3V_ALW
TLV62130
SIO_SLP_SUS#
4
+3.3V_WLAN EM5209VF
11
3
+3.3V_ALW
@SIO_SLP_WLAN#
AUX_EN_WOWL
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
Deciphered Date
Deciphered Date
Deciphered Date
TLV62130
2017/01/01
2017/01/01
2017/01/01
+1.0VS_VCCIO
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Power Sequence
Power Sequence
Power Sequence
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
5 103
5 103
5 103
1.0
1.0
1.0
5
4
3
2
1
D D
PEG_CRX _GTX_P[0..15]
PEG_CRX _GTX_N[0..15]
PEG_CTX _C_GRX_P[0..15]
PEG_CTX _C_GRX_N[0..15]
C C
+1.0VS_V CCIO
RC2 24.9_040 2_1%
Trace width=5 mils ,Spacing=15mil
B B
Max length= 600 mils.
PEG_CRX _GTX_P[0..15] <27>
PEG_CRX _GTX_N[0..15] <27>
PEG_CTX _C_GRX_P[0..15] <27>
PEG_CTX _C_GRX_N[0..15] <27>
1 2
PEG_COM P
DMI_CRX_P TX_P0<15> DMI_CRX_P TX_N0<15>
DMI_CRX_P TX_P1<15> DMI_CRX_P TX_N1<15>
DMI_CRX_P TX_P2<15> DMI_CRX_P TX_N2<15>
DMI_CRX_P TX_P3<15> DMI_CRX_P TX_N3<15>
PEG_CRX _GTX_P15 PEG_CRX _GTX_N15
PEG_CRX _GTX_P14 PEG_CRX _GTX_N14
PEG_CRX _GTX_P13 PEG_CRX _GTX_N13
PEG_CRX _GTX_P12 PEG_CRX _GTX_N12
PEG_CRX _GTX_P11 PEG_CRX _GTX_N11
PEG_CRX _GTX_P10 PEG_CRX _GTX_N10
PEG_CRX _GTX_P9 PEG_CRX _GTX_N9
PEG_CRX _GTX_P8 PEG_CRX _GTX_N8
PEG_CRX _GTX_P7 PEG_CRX _GTX_N7
PEG_CRX _GTX_P6 PEG_CRX _GTX_N6
PEG_CRX _GTX_P5 PEG_CRX _GTX_N5
PEG_CRX _GTX_P4 PEG_CRX _GTX_N4
PEG_CRX _GTX_P3 PEG_CRX _GTX_N3
PEG_CRX _GTX_P2 PEG_CRX _GTX_N2
PEG_CRX _GTX_P1 PEG_CRX _GTX_N1
PEG_CRX _GTX_P0 PEG_CRX _GTX_N0
DMI_CRX_P TX_P0 DMI_CRX_P TX_N0
DMI_CRX_P TX_P1 DMI_CRX_P TX_N1
DMI_CRX_P TX_P2 DMI_CRX_P TX_N2
DMI_CRX_P TX_P3 DMI_CRX_P TX_N3
E25 D25
E24
F24
E23 D23
E22
F22
E21 D21
E20
F20
E19 D19
E18
F18
D17 E17
F16
E16
D15 E15
F14
E14
D13 E13
F12
E12
D11 E11
F10
E10
G2
D8 E8
E6 F6
D5 E5
J8 J9
CFL-H_BG A1440
UC1C
PEG_RXP_0 PEG_RXN_0
PEG_RXP_1 PEG_RXN_1
PEG_RXP_2 PEG_RXN_2
PEG_RXP_3 PEG_RXN_3
PEG_RXP_4 PEG_RXN_4
PEG_RXP_5 PEG_RXN_5
PEG_RXP_6 PEG_RXN_6
PEG_RXP_7 PEG_RXN_7
PEG_RXP_8 PEG_RXN_8
PEG_RXP_9 PEG_RXN_9
PEG_RXP_10 PEG_RXN_10
PEG_RXP_11 PEG_RXN_11
PEG_RXP_12 PEG_RXN_12
PEG_RXP_13 PEG_RXN_13
PEG_RXP_14 PEG_RXN_14
PEG_RXP_15 PEG_RXN_15
PEG_RCOMP
DMI_RXP_0 DMI_RXN_0
DMI_RXP_1 DMI_RXN_1
DMI_RXP_2 DMI_RXN_2
DMI_RXP_3 DMI_RXN_3
CFL-H
PEG_TXP_10 PEG_TXN_10
PEG_TXP_11 PEG_TXN_11
PEG_TXP_12 PEG_TXN_12
PEG_TXP_13 PEG_TXN_13
PEG_TXP_14 PEG_TXN_14
PEG_TXP_15 PEG_TXN_15
3 OF 13
PEG_TXP_0 PEG_TXN_0
PEG_TXP_1 PEG_TXN_1
PEG_TXP_2 PEG_TXN_2
PEG_TXP_3 PEG_TXN_3
PEG_TXP_4 PEG_TXN_4
PEG_TXP_5 PEG_TXN_5
PEG_TXP_6 PEG_TXN_6
PEG_TXP_7 PEG_TXN_7
PEG_TXP_8 PEG_TXN_8
PEG_TXP_9 PEG_TXN_9
DMI_TXP_0 DMI_TXN_0
DMI_TXP_1 DMI_TXN_1
DMI_TXP_2 DMI_TXN_2
DMI_TXP_3 DMI_TXN_3
B25 A25
B24 C24
B23 A23
B22 C22
B21 A21
B20 C20
B19 A19
B18 C18
A17 B17
C16 B16
A15 B15
C14 B14
A13 B13
C12 B12
A11 B11
C10 B10
B8 A8
C6 B6
B5 A5
D4 B4
PEG_CTX _GRX_P15 PEG_CTX _GRX_N15
PEG_CTX _GRX_P14 PEG_CTX _GRX_N14
PEG_CTX _GRX_P13 PEG_CTX _GRX_N13
PEG_CTX _GRX_P12 PEG_CTX _GRX_N12
PEG_CTX _GRX_P11 PEG_CTX _GRX_N11
PEG_CTX _GRX_P10 PEG_CTX _GRX_N10
PEG_CTX _GRX_P9 PEG_CTX _GRX_N9
PEG_CTX _GRX_P8 PEG_CTX _GRX_N8
PEG_CTX _GRX_P7 PEG_CTX _GRX_N7
PEG_CTX _GRX_P6 PEG_CTX _GRX_N6
PEG_CTX _GRX_P5 PEG_CTX _GRX_N5
PEG_CTX _GRX_P4 PEG_CTX _GRX_N4
PEG_CTX _GRX_P3 PEG_CTX _GRX_N3
PEG_CTX _GRX_P2 PEG_CTX _GRX_N2
PEG_CTX _GRX_P1 PEG_CTX _GRX_N1
PEG_CTX _GRX_P0 PEG_CTX _GRX_N0
DMI_CTX_P RX_P0 DMI_CTX_P RX_N0
DMI_CTX_P RX_P1 DMI_CTX_P RX_N1
DMI_CTX_P RX_P2 DMI_CTX_P RX_N2
DMI_CTX_P RX_P3 DMI_CTX_P RX_N3
1 2
CC34 0.22U_040 2_16V7K
1 2
CC35 0.22U_040 2_16V7K
1 2
CC36 0.22U_040 2_16V7K
1 2
CC37 0.22U_040 2_16V7K
1 2
CC38 0.22U_040 2_16V7K
1 2
CC39 0.22U_040 2_16V7K
1 2
CC40 0.22U_040 2_16V7K
1 2
CC41 0.22U_040 2_16V7K
1 2
CC42 0.22U_040 2_16V7K
1 2
CC43 0.22U_040 2_16V7K
1 2
CC44 0.22U_040 2_16V7K
1 2
CC45 0.22U_040 2_16V7K
1 2
CC46 0.22U_040 2_16V7K
1 2
CC47 0.22U_040 2_16V7K
1 2
CC48 0.22U_040 2_16V7K
1 2
CC49 0.22U_040 2_16V7K
1 2
CC50 0.22U_040 2_16V7K
1 2
CC51 0.22U_040 2_16V7K
1 2
CC52 0.22U_040 2_16V7K
1 2
CC53 0.22U_040 2_16V7K
1 2
CC54 0.22U_040 2_16V7K
1 2
CC55 0.22U_040 2_16V7K
1 2
CC56 0.22U_040 2_16V7K
1 2
CC57 0.22U_040 2_16V7K
1 2
CC58 0.22U_040 2_16V7K
1 2
CC59 0.22U_040 2_16V7K
1 2
CC60 0.22U_040 2_16V7K
1 2
CC61 0.22U_040 2_16V7K
1 2
CC62 0.22U_040 2_16V7K
1 2
CC63 0.22U_040 2_16V7K
1 2
CC64 0.22U_040 2_16V7K
1 2
CC65 0.22U_040 2_16V7K
DMI_CTX_P RX_P0 <15> DMI_CTX_P RX_N0 <15>
DMI_CTX_P RX_P1 <15> DMI_CTX_P RX_N1 <15>
DMI_CTX_P RX_P2 <15> DMI_CTX_P RX_N2 <15>
DMI_CTX_P RX_P3 <15> DMI_CTX_P RX_N3 <15>
PEG_CTX _C_GRX_P15 PEG_CTX _C_GRX_N15
PEG_CTX _C_GRX_P14 PEG_CTX _C_GRX_N14
PEG_CTX _C_GRX_P13 PEG_CTX _C_GRX_N13
PEG_CTX _C_GRX_P12 PEG_CTX _C_GRX_N12
PEG_CTX _C_GRX_P11 PEG_CTX _C_GRX_N11
PEG_CTX _C_GRX_P10 PEG_CTX _C_GRX_N10
PEG_CTX _C_GRX_P9 PEG_CTX _C_GRX_N9
PEG_CTX _C_GRX_P8 PEG_CTX _C_GRX_N8
PEG_CTX _C_GRX_P7 PEG_CTX _C_GRX_N7
PEG_CTX _C_GRX_P6 PEG_CTX _C_GRX_N6
PEG_CTX _C_GRX_P5 PEG_CTX _C_GRX_N5
PEG_CTX _C_GRX_P4 PEG_CTX _C_GRX_N4
PEG_CTX _C_GRX_P3 PEG_CTX _C_GRX_N3
PEG_CTX _C_GRX_P2 PEG_CTX _C_GRX_N2
PEG_CTX _C_GRX_P1 PEG_CTX _C_GRX_N1
PEG_CTX _C_GRX_P0 PEG_CTX _C_GRX_N0
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CFL-H(1/8) DMI,PEG
CFL-H(1/8) DMI,PEG
CFL-H(1/8) DMI,PEG
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
A
A
A
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
6 103
6 103
6 103
1.0
1.0
1.0
5
+1.05V_PRIM
1 2
+3.3V_ALW_PCH
XDP@
1.5K_0402_5%
12
RC133
SYS_PWROK_R
0.1U_0402_25V6
@
1
D D
CC33
Place near JXDP1.47
2
RC216 0_0603_5%@
+1.0V_PRIM_XDP
0.1U_0402_25V6
@
1
CC28
2
+1.0V_PRIM_XDP
0.1U_0402_25V6
@
1
CC29
2
Place near JXDP1
+3.3V_ALW
1.5K_0402_5%
XDP@
12
RC241
SIO_PWRBTN#
XDP@
0.1U_0402_25V6
1
Place near JXDP1.41
CC269
2
C C
+1.0V_PRIM_XDP
CPU_XDP_PREQ#
1 2
RC138 51 _0402_5%@
+1.0VS_VCCIO
FIVR_EN_R
1 2
RC132 150_0402_ 5%
+1.0V_VCCSTG
1 2
1 2
1 2
1 2
1 2
1 2
1 2
VR_SVID_DATA
VR_SVID_ALERT#
100P_0402_50V8J
12
CC301ESD@
ESD Request:place near CPU side
PROCHOT#
H_THERMT RIP#
PCH_JTAGX
VCCST_PWR GD
H_CATERR#
FIVR_EN
FIVR_EN
+1.0V_VCCST
5
RC83 1K_0402_5%
+1.0V_VCCST
RC80 1K_0402_5%
RC166 1K_0402_5%@
RC71 1K_0402_5%
RC79 49.9_0402_1%@
+1.0V_VCCST
RC218 15 0_0402_5%@
B B
A A
RC219 10 K_0402_5%@
VR_SVID_DATA<90>
VR_SVID_ALERT#<90>
H_PWRGD VCCST_PW RGD
100P_0402_50V8J
12
CC300ESD@
56.2_0402_1%
12
220_0402_5%
12
H_THERMT RIP#
12
RC152
RC153
@ESD@
0.1U_0402_25V6
CC323
PCH_RSMRST #_AND<18,62>
SIO_PWRBTN#<18,58>
PCH_SPI_D0<17> SYS_PWROK<18,58 >
CPU_XDP_TMS
CPU_XDP_TDI
CPU_XDP_TDO
CPU_XDP_TCLK
CPU_XDP_PRDY#
CPU_XDP_PREQ#
100_0402_5%
12
RC157
VR_SVID_DATA
CPU_VIDALERT#
FIVR_EN CFG0
CPU_XDP_TDO H_VCCST_PWRGD_ XDP CPU_XDP_TRS T#
@ESD@
0.1U_0402_25V6
12
CC306
PCH_JTAG_TMS PCH_XDP_PR DY# P CH_XDP_PREQ#
@ESD@
0.1U_0402_25V6
12
CC336
ESD request,Place near JXDP1 side.
1 2
@
RC228
1 2
@
RC229
1 2
@
RC230
1 2
@
RC143
1 2
@
RC314
1 2
@
RC315
PCH_JTAGX
PCH_JTAG_TD I
PCH_JTAG_TD O
12
1 2
CC305 0.1U_0201_ 25V6K@ESD@
1 2
CC304 0.1U_0201_ 25V6K@ESD@
1 2
CC303 0.1U_0201_ 25V6K@ESD@
ESD request,Place near JXDP1 side
PROCHOT#
@ESD@
0.1U_0402_25V6
CC324
12
0.1U_0402_25V6
12
PCH_JTAG_TMS
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
PCH_XDP_PRDY#
0_0402_5%
PCH_XDP_PREQ#
0_0402_5%
VR_SVID_CLK
@ESD@
0.1U_0402_25V6
CC307
@ESD@
CC337
4
CPU_XDP_PREQ# CPU_XDP_PRDY#
XDP_OBS0_R XDP_OBS1_R
12
0.1U_0402_25V6
@ESD@
0.1U_0402_25V6
CC308
@ESD@
CC338
Add ESD part
VR_SVID_CLK<90>
PROCHOT#<27,58,82,85,90>
DDR_VTT_CTRL<2 3>
VCCST_PWRGD<5 9>
H_PWRGD<18> PLTRST_CPU#<14> H_PM_SYNC<14> H_PM_DOWN<14> H_PECI<14,58> H_THERMTRIP#<14,23,24,25,26,59>
H_VCCST_PWRGD_XDP
SIO_PWRBTN#
1 2
RC124 1K_0402_5%XDP@
1 2
RC217 0_0402_5%@
1 2
RC126 1K_0402_5%XDP@
1 2
RC128 1K_0402_5%XDP@
1 2
RC129 0_0402_5%@
DDR_XDP_WAN_SMBDAT<18,23,24,25,26,54> DDR_XDP_WAN_SMBCLK<18,23,24,25,26,54> PCH_JTAG_TCK<1 8>
12
PCH_JTAG_TMS <18>
PCH_JTAG_TDI <18>
PCH_JTAG_TDO < 18>
PCH_JTAGX <18>
PCH_XDP_PRDY# <20>
PCH_XDP_PREQ# <20>
pop RC171 for CNL depop RC171 for SKL & KBL (CFL CRB rev0.7)
RF Request
1 2
CC325@RF@ 33P_ 0402_50V8J
Place close CPU side
4
CPU XDP
+1.0V_PRIM_XDP
XDP_PRSNT_PIN1
CFG0 CFG1
CFG2 CFG3
CFG4 CFG5
CFG6 CFG7
FIVR_EN_R SYS_PWROK_R
CPU_XDP_TCLK
PCH_CPU_BCLK_R_D<16> PCH_CPU_BCLK_R_D#<16>
PCH_CPU_PCIBCLK_R_D<16> PCH_CPU_PCIBCLK_R_D#<16>
CPU_24MHZ_R_D<16> CPU_24MHZ_R_D#<16>
VR_SVID_CLK
PROCHOT#
RC84 499_0402_1%
DDR_VTT_C TRL
VCCST_PWR GD VCCST_PWR GD_CPU
RC78 60.4_0402_1%
H_PWRGD PLTRST_C PU# H_PM_SYNC
H_PECI
RC168 20_0402_5 %
H_THERMT RIP# H_TH ERMTRIP#_R
RC169 0_0402_5%@ RC319 0_0402_5%@
RC171 0_0402_5%@
XDP@
1 2
RC121 1K _0402_5%
1 2
RC122 0_0 402_5%@
CONN@
JXDP1
112 334 556 778 9910 111112
13
14
13
15
16
15
17
18
17
19
20
19
21
22
21
23
24
23
25
26
25
27
28
27
29
30
29
31
32
31
33
34
33
35
36
35
37
37
38
39
39
40
41
41
42
43
43
44
45
45
46
47
47
48
49
49
50
51
51
52
53
53
54
55
55
56
57
57
58
595960
61
61
GND62GND
JXT_FP270H-06 1G1AM
PCH_CPU_BC LK_R_D PCH_CPU_BC LK_R_D#
PCH_CPU_PC IBCLK_R_D PCH_CPU_PC IBCLK_R_D#
CPU_24MHZ_ R_D CPU_24MHZ_ R_D#
CPU_VIDALERT#
VR_SVID_DATA
1 2
1 2
1 2
1 2
1 2 1 2
H_PROCHOT# _R
T26PAD~D @ T25PAD~D @
T31PAD~D @ T32PAD~D @
CFG3
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60
63
CPU_XDP_HOOK6
XDP_DBRESET#
CPU_XDP_TDO
CPU_XDP_TRST#
CPU_XDP_TCLK
1 1
1 1
3
CFG11
12
@
RC441 1K_0402_5%
+1.0V_PRIM_XDP
CFG17 CFG16
CFG8 CFG9
CFG10 CFG11
CFG19 CFG18
CFG12 CFG13
CFG14 CFG15
PCH_XDP_CLK_ DP PCH_XDP_CLK_ DN
CPU_XDP_HOOK6 XDP_DBRESET#
CPU_XDP_TDO CPU_XDP_TRST# CPU_XDP_TDI CPU_XDP_TMS CPU_XDP_PRS
1 2
1 2
1 2
B31 A32
D35 C36
E31 D31
BH31 BH32 BH29 BR30
BT13
H13
BT31 BP35
BM34
BP31 BT34
J31
BR33
BN1
BM30
AT13
AW13
AU13 AY13
+1.0V_PRIM_XDP
+3.3V_ALW_PCH
+1.0V_VCCSTG
UC1E
BCLKP BCLKN
PCI_BCLKP PCI_BCLKN
CLK24P CLK24N
VIDALERT# VIDSCK VIDSOUT PROCHOT#
DDR_VTT_CNTL
VCCST_PWRGD
PROCPWRGD RESET# PM_SYNC PM_DOWN PECI THERMTRIP#
SKTOCC# PROC_SELECT#
CATERR#
ZVM# MSM#
RSVD1 RSVD2
CFL-H_BGA1440
CFL-H
5 OF 13
1 2
RC115 2.2K_ 0402_5%XDP@
1 2
RC137 3K_0 402_5%
RC135 51 _0402_5%
RC136 51 _0402_5%@
RC139 51 _0402_5%
H_PM_DOW N_RH_PM_DOW N
H_SKTOCC# SKL_CNL#
H_CATERR#
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
CFG12
PCH_XDP_CLK_DP <16> PCH_XDP_CLK_DN <16>
1 2
RC144 0_0402_5%
@XDP@
XDP_DBRESET# <15>
CPU_XDP_TRST# <20>
1 2
RC127 0_0402_5%
XDP@
Change to 0 ohm 3/29
CFG13
BN25
CFG_0
BN27
CFG_1
BN26
CFG_2
BN28
CFG_3
BR20
CFG_4
BM20
CFG_5
BT20
CFG_6
BP20
CFG_7
BR23
CFG_8
BR22
CFG_9
BT23
CFG_10
BT22
CFG_11
BM19
CFG_12
BR19
CFG_13
BP19
CFG_14
BT19
CFG_15
BN23
CFG_17
BP23
CFG_16
BP22
CFG_19
BN22
CFG_18
BR27
BPM#_0
BT27
BPM#_1
BM31
BPM#_2
BT30
BPM#_3
BT28
PROC_TDO
BL32
PROC_TDI
BP28
PROC_TMS
BR28
PROC_TCK
CFG_RCOMP
2016/01/01
2016/01/01
2016/01/01
BP30 BL30 BP27
BT25
PROC_TRST# PROC_PREQ# PROC_PRDY#
12
@
RC442 1K_0402_5%
ITP_PMODE_CPU
PCH_SPI_D2_XDP
12
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15
CFG17 CFG16 CFG19 CFG18
XDP_OBS0 XDP_OBS1
CPU_XDP_TDO CPU_XDP_TDI CPU_XDP_TMS CPU_XDP_TCL K
CPU_XDP_TRST# CPU_XDP_PREQ# CPU_XDP_PRDY#
Compal Secret Data
Compal Secret Data
Compal Secret Data
*
*
@
RC443
*
1K_0402_5%
12
RC114
49.9_0402_1 %
Deciphered Date
Deciphered Date
Deciphered Date
2
RC239 0_0402_5%@ RC240 0_0402_5%@
1 1 1 1
1 1 1
2
DMI_AC_coupled
HALF-SWING DC coupled
FULL-SWING AC coupling
PMSYNC2.0
LEGACY
ITP_PMODE_CPU <18>
PCH_SPI_D2_XDP <17>
SYNC & AYNC MODE
ASYNCHRONOUS
SYNCHRONOUS
XDP_DBRESET#
1 2 1 2
@
T184
PAD~D
@
T185
PAD~D
@
T180
PAD~D
@
T181
PAD~D
@
T179
PAD~D
@
T190
PAD~D
@
T189
PAD~D
2017/01/01
2017/01/01
2017/01/01
1
0
1
0
1
0
0.1U_0402_25V6
1
2
XDP_OBS0_R XDP_OBS1_R
1
CFG10
12
@
RC440 1K_0402_5%
SAFE mode boot
enable
*
disable
CFG9
1K_0402_5%
12
RC438
@
1K_0402_5%
SVID NOT Present
*
Present
+1.0VS_VCCIO
RC439
@
1 2
Not presnet10
CFG8
12
@
RC437 1K_0402_5%
*
CFG UNLOCK
disable
enable10
CFG1
12
PCHLESS MODE (CRB) Reserved CFG lane (EDS)
@
RC436
*
1K_0402_5%
NORMAL
PCHLESS
CFG0
12
Stall reset sequence after PCU PLL lock until de-asserted
@
RC321
*
1K_0402_5%
No Stall
Stall
CFG2
CFG4
CFG5
CFG6
CFG7
12
12
12
12
12
XDP@
CC32
RC181 1K_0402_5%
RC322 1K_0402_5%
@
RC323 1K_0402_5%
@
RC324 1K_0402_5%
@
RC325 1K_0402_5%
*
*
*
*
PEG LANE REVERSAL
NORMAL
LANE REVERSED
eDP enable
Disabled
Enabled
PCI Express* Bifurcation
1x8, 2x4
Reserved
2x8
1x16
PEG Training
(default) PEG Train immediately following RESET# de-assertion
PEG Wait for BIOS for training
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CFL-H(2/8) XDP
CFL-H(2/8) XDP
CFL-H(2/8) XDP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1
0
1
0
1
0
1
0
[6:5]
00
01
10
11
7 103
7 103
7 103
1
0
1
0
1.0
1.0
1.0
5
4
3
2
1
D D
UC1A
DDR_A_D[0..63]<23,24>
C C
B B
DDR_A_CB[0..7]< 23,24>
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
DDR_A_CB0 DDR_A_CB1 DDR_A_CB2 DDR_A_CB3 DDR_A_CB4 DDR_A_CB5 DDR_A_CB6 DDR_A_CB7
DDR4(IL)/LP3-DDR4(NIL) LP3/DDR4
BR6
DDR0_DQ_0/DDR0_DQ_0
BT6
DDR0_DQ_1/DDR0_DQ_1
BP3
DDR0_DQ_2/DDR0_DQ_2
BR3
DDR0_DQ_3/DDR0_DQ_3
BN5
DDR0_DQ_4/DDR0_DQ_4
BP6
DDR0_DQ_5/DDR0_DQ_5
BP2
DDR0_DQ_6/DDR0_DQ_6
BN3
DDR0_DQ_7/DDR0_DQ_7
BL4
DDR0_DQ_8/DDR0_DQ_8
BL5
DDR0_DQ_9/DDR0_DQ_9
BL2
DDR0_DQ_10/DDR0_DQ_10
BM1
DDR0_DQ_11/DDR0_DQ_11
BK4
DDR0_DQ_12/DDR0_DQ_12
BK5
DDR0_DQ_13/DDR0_DQ_13
BK1
DDR0_DQ_14/DDR0_DQ_14
BK2
DDR0_DQ_15/DDR0_DQ_15
BG4
DDR0_DQ_16/DDR0_DQ_32
BG5
DDR0_DQ_17/DDR0_DQ_33
BF4
DDR0_DQ_18/DDR0_DQ_34
BF5
DDR0_DQ_19/DDR0_DQ_35
BG2
DDR0_DQ_20/DDR0_DQ_36
BG1
DDR0_DQ_21/DDR0_DQ_37
BF1
DDR0_DQ_22/DDR0_DQ_38
BF2
DDR0_DQ_23/DDR0_DQ_39
BD2
DDR0_DQ_24/DDR0_DQ_40
BD1
DDR0_DQ_25/DDR0_DQ_41
BC4
DDR0_DQ_26/DDR0_DQ_42
BC5
DDR0_DQ_27/DDR0_DQ_43
BD5
DDR0_DQ_28/DDR0_DQ_44
BD4
DDR0_DQ_29/DDR0_DQ_45
BC1
DDR0_DQ_30/DDR0_DQ_46
BC2
DDR0_DQ_31/DDR0_DQ_47
AB1
DDR0_DQ_32/DDR1_DQ_0
AB2
DDR0_DQ_33/DDR1_DQ_1
AA4
DDR0_DQ_34/DDR1_DQ_2
AA5
DDR0_DQ_35/DDR1_DQ_3
AB5
DDR0_DQ_36/DDR1_DQ_4
AB4
DDR0_DQ_37/DDR1_DQ_5
AA2
DDR0_DQ_38/DDR1_DQ_6
AA1
DDR0_DQ_39/DDR1_DQ_7
V5
DDR0_DQ_40/DDR1_DQ_8
V2
DDR0_DQ_41/DDR1_DQ_9
U1
DDR0_DQ_42/DDR1_DQ_10
U2
DDR0_DQ_43/DDR1_DQ_11
V1
DDR0_DQ_44/DDR1_DQ_12
V4
DDR0_DQ_45/DDR1_DQ_13
U5
DDR0_DQ_46/DDR1_DQ_14
U4
DDR0_DQ_47/DDR1_DQ_15
R2
DDR0_DQ_48/DDR1_DQ_32
P5
DDR0_DQ_49/DDR1_DQ_33
R4
DDR0_DQ_50/DDR1_DQ_34
P4
DDR0_DQ_51/DDR1_DQ_35
R5
DDR0_DQ_52/DDR1_DQ_36
P2
DDR0_DQ_53/DDR1_DQ_37
R1
DDR0_DQ_54/DDR1_DQ_38
P1
DDR0_DQ_55/DDR1_DQ_39
M4
DDR0_DQ_56/DDR1_DQ_40
M1
DDR0_DQ_57/DDR1_DQ_41
L4
DDR0_DQ_58/DDR1_DQ_42
L2
DDR0_DQ_59/DDR1_DQ_43
M5
DDR0_DQ_60/DDR1_DQ_44
M2
DDR0_DQ_61/DDR1_DQ_45
L5
DDR0_DQ_62/DDR1_DQ_46
L1
DDR0_DQ_63/DDR1_DQ_47
LP3/DDR4
BA2
NC/DDR0_ECC_0
BA1
NC/DDR0_ECC_1
AY4
NC/DDR0_ECC_2
AY5
NC/DDR0_ECC_3
BA5
NC/DDR0_ECC_4
BA4
NC/DDR0_ECC_5
AY1
NC/DDR0_ECC_6
AY2
NC/DDR0_ECC_7
CFL-H_BGA1440
CFL-H
DDR CHANNEL A
DDR0_CKP_0/DDR0_CKP_0 DDR0_CKN_0/DDR0_CKN_0 DDR0_CKP_1/DDR0_CKP_1 DDR0_CKN_1/DDR0_CKN_1
NC/DDR0_CKP_2 NC/DDR0_CKN_2 NC/DDR0_CKP_3 NC/DDR0_CKN_3
DDR0_CKE_0/DDR0_CKE_0 DDR0_CKE_1/DDR0_CKE_1 DDR0_CKE_2/DDR0_CKE_2 DDR0_CKE_3/DDR0_CKE_3
DDR0_CS#_0/DDR0_CS#_0 DDR0_CS#_1/DDR0_CS#_1
NC/DDR0_CS#_2 NC/DDR0_CS#_3
DDR0_ODT_0/DDR0_ODT_0
NC/DDR0_ODT_1 NC/DDR0_ODT_2 NC/DDR0_ODT_3
DDR0_CAB_4/DDR0_BA_0 DDR0_CAB_6/DDR0_BA_1 DDR0_CAA_5/DDR0_BG_0
DDR0_CAB_3/DDR0_MA_16 DDR0_CAB_2/DDR0_MA_14 DDR0_CAB_1/DDR0_MA_15
DDR0_CAB_9/DDR0_MA_0 DDR0_CAB_8/DDR0_MA_1 DDR0_CAB_5/DDR0_MA_2
NC/DDR0_MA_3
NC/DDR0_MA_4 DDR0_CAA_0/DDR0_MA_5 DDR0_CAA_2/DDR0_MA_6 DDR0_CAA_4/DDR0_MA_7 DDR0_CAA_3/DDR0_MA_8 DDR0_CAA_1/DDR0_MA_9
DDR0_CAB_7/DDR0_MA_10 DDR0_CAA_7/DDR0_MA_11 DDR0_CAA_6/DDR0_MA_12 DDR0_CAB_0/DDR0_MA_13
DDR0_CAA_9/DDR0_BG_1 DDR0_CAA_8/DDR0_ACT#
NC/DDR0_ALERT#
DDR4(IL)/LP3-DDR4(NIL)
DDR0_DQSN_0/DDR0_DQSN_0 DDR0_DQSN_1/DDR0_DQSN_1 DDR0_DQSN_2/DDR0_DQSN_4 DDR0_DQSN_3/DDR0_DQSN_5 DDR0_DQSN_4/DDR1_DQSN_0 DDR0_DQSN_5/DDR1_DQSN_1 DDR0_DQSN_6/DDR1_DQSN_4 DDR0_DQSN_7/DDR1_DQSN_5
DDR0_DQSP_0/DDR0_DQSP_0 DDR0_DQSP_1/DDR0_DQSP_1 DDR0_DQSP_2/DDR0_DQSP_4 DDR0_DQSP_3/DDR0_DQSP_5 DDR0_DQSP_4/DDR1_DQSP_0 DDR0_DQSP_5/DDR1_DQSP_1 DDR0_DQSP_6/DDR1_DQSP_4 DDR0_DQSP_7/DDR1_DQSP_5
DDR0_DQSP_8/DDR0_DQSP_8 DDR0_DQSN_8/DDR0_DQSN_8
1 OF 13
NC/DDR0_PAR
AG1 AG2 AK2 AK1 AL3 AK3 AL2 AL1
AT1 AT2 AT3 AT5
AD5 AE2 AD2 AE5
AD3 AE4 AE1 AD4
AH5 AH1 AU1
AH4 AG4 AD1
AH3 AP4 AN4 AP5 AP2 AP1 AP3 AN1 AN3 AT4 AH2 AN2 AU4 AE3 AU2 AU3
AG3 AU5
BR5 BL3 BG3 BD3 AA3 U3 P3 L3
BP5 BK3 BF3 BC3 AB3 V3 R3 M3
AY3 BA3
DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK1 DDR_A_CLK#1 DDR_A_CLK2 DDR_A_CLK#2 DDR_A_CLK3 DDR_A_CLK#3
DDR_A_CKE0 DDR_A_CKE1 DDR_A_CKE2 DDR_A_CKE3
DDR_A_CS#0 DDR_A_CS#1 DDR_A_CS#2 DDR_A_CS#3
DDR_A_ODT0 DDR_A_ODT1 DDR_A_ODT2 DDR_A_ODT3
DDR_A_BA0 DDR_A_BA1 DDR_A_BG0
DDR_A_MA16 DDR_A_MA14 DDR_A_MA15
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_BG1 DDR_A_ACT#
DDR_A_PARITY DDR_A_ALERT#
DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
DDR_A_DQS8 DDR_A_DQS#8
DDR_A_CLK0 <24> DDR_A_CLK#0 <24 > DDR_A_CLK1 <24> DDR_A_CLK#1 <24 > DDR_A_CLK2 <23> DDR_A_CLK#2 <23 > DDR_A_CLK3 <23> DDR_A_CLK#3 <23 >
DDR_A_CKE0 <24 > DDR_A_CKE1 <24 > DDR_A_CKE2 <23 > DDR_A_CKE3 <23 >
DDR_A_CS#0 <24> DDR_A_CS#1 <24> DDR_A_CS#2 <23> DDR_A_CS#3 <23>
DDR_A_ODT0 <24> DDR_A_ODT1 <24> DDR_A_ODT2 <23> DDR_A_ODT3 <23>
DDR_A_BA0 <23,24> DDR_A_BA1 <23,24> DDR_A_BG0 <23,24>
DDR_A_MA16 <23,24> DDR_A_MA14 <23,24> DDR_A_MA15 <23,24> DDR_A_MA[0..13] <23 ,24>
DDR_A_BG1 <23,24> DDR_A_ACT# <23,24>
DDR_A_PARITY <23,24 > DDR_A_ALERT# <23 ,24>
DDR_A_DQS#[0..3] <23,24 >
DDR_A_DQS#[4..7] <23,24 >
DDR_A_DQS[0..3] <23,24>
DDR_A_DQS[4..7] <23,24>
DDR_A_DQS8 <23 ,24> DDR_A_DQS#8 <2 3,24>
DDR_B_D[0..63 ]<25,26>
DDR_B_CB[0..7 ]<25,26>
RC5 121_0402_1% RC6 75_0402_1% RC7 100_0402_1%
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39
DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
1 2 1 2 1 2
Trace width=12-15 mils ,Spacing=20mil Max length= 500 mils.
DDR_B_CB0 DDR_B_CB1 DDR_B_CB2 DDR_B_CB3 DDR_B_CB4 DDR_B_CB5 DDR_B_CB6 DDR_B_CB7
DDR_RCOMP0 DDR_RCOMP1 DDR_RCOMP2
UC1B
DDR4(IL)/LP3-DDR4(NIL)
BT11
DDR1_DQ_0/DDR0_DQ_16
BR11
DDR1_DQ_1/DDR0_DQ_17
BT9
DDR1_DQ_2/DDR0_DQ_18
BR8
DDR1_DQ_3/DDR0_DQ_19
BP11
DDR1_DQ_4/DDR0_DQ_20
BN11
DDR1_DQ_5/DDR0_DQ_21
BP8
DDR1_DQ_6/DDR0_DQ_22
BN8
DDR1_DQ_7/DDR0_DQ_23
BL12
DDR1_DQ_8/DDR0_DQ_24
BL11
DDR1_DQ_9/DDR0_DQ_25
BL8
DDR1_DQ_10/DDR0_DQ_26
BJ8
DDR1_DQ_11/DDR0_DQ_27
BJ11
DDR1_DQ_12/DDR0_DQ_28
BJ10
DDR1_DQ_13/DDR0_DQ_29
BL7
DDR1_DQ_14/DDR0_DQ_30
BJ7
DDR1_DQ_15/DDR0_DQ_31
BG11
DDR1_DQ_16/DDR0_DQ_48
BG10
DDR1_DQ_17/DDR0_DQ_49
BG8
DDR1_DQ_18/DDR0_DQ_50
BF8
DDR1_DQ_19/DDR0_DQ_51
BF11
DDR1_DQ_20/DDR0_DQ_52
BF10
DDR1_DQ_21/DDR0_DQ_53
BG7
DDR1_DQ_22/DDR0_DQ_54
BF7
DDR1_DQ_23/DDR0_DQ_55
BB11
DDR1_DQ_24/DDR0_DQ_56
BC11
DDR1_DQ_25/DDR0_DQ_57
BB8
DDR1_DQ_26/DDR0_DQ_58
BC8
DDR1_DQ_27/DDR0_DQ_59
BC10
DDR1_DQ_28/DDR0_DQ_60
BB10
DDR1_DQ_29/DDR0_DQ_61
BC7
DDR1_DQ_30/DDR0_DQ_62
BB7
DDR1_DQ_31/DDR0_DQ_63
AA11
DDR1_DQ_32/DDR1_DQ_16
AA10
DDR1_DQ_33/DDR1_DQ_17
AC11
DDR1_DQ_34/DDR1_DQ_18
AC10
DDR1_DQ_35/DDR1_DQ_19
AA7
DDR1_DQ_36/DDR1_DQ_20
AA8
DDR1_DQ_37/DDR1_DQ_21
AC8
DDR1_DQ_38/DDR1_DQ_22
AC7
DDR1_DQ_39/DDR1_DQ_23
DDR4(IL)/LP3-DDR4(NIL)
W8
DDR1_DQ_40/DDR1_DQ_24
W7
DDR1_DQ_41/DDR1_DQ_25
V10
DDR1_DQ_42/DDR1_DQ_26
V11
DDR1_DQ_43/DDR1_DQ_27
W11
DDR1_DQ_44/DDR1_DQ_28
W10
DDR1_DQ_45/DDR1_DQ_29
V7
DDR1_DQ_46/DDR1_DQ_30
V8
DDR1_DQ_47/DDR1_DQ_31
R11
DDR1_DQ_48/DDR1_DQ_48
P11
DDR1_DQ_49/DDR1_DQ_49
P7
DDR1_DQ_50/DDR1_DQ_50
R8
DDR1_DQ_51/DDR1_DQ_51
R10
DDR1_DQ_52/DDR1_DQ_52
P10
DDR1_DQ_53/DDR1_DQ_53
R7
DDR1_DQ_54/DDR1_DQ_54
P8
DDR1_DQ_55/DDR1_DQ_55
L11
DDR1_DQ_56/DDR1_DQ_56
M11
DDR1_DQ_57/DDR1_DQ_57
L7
DDR1_DQ_58/DDR1_DQ_58
M8
DDR1_DQ_59/DDR1_DQ_59
L10
DDR1_DQ_60/DDR1_DQ_60
M10
DDR1_DQ_61/DDR1_DQ_61
M7
DDR1_DQ_62/DDR1_DQ_62
L8
DDR1_DQ_63/DDR1_DQ_63
LP3/DDR4
AW11
NC/DDR1_ECC_0
AY11
NC/DDR1_ECC_1
AY8
NC/DDR1_ECC_2
AW8
NC/DDR1_ECC_3
AY10
NC/DDR1_ECC_4
AW10
NC/DDR1_ECC_5
AY7
NC/DDR1_ECC_6
AW7
NC/DDR1_ECC_7
G1
DDR_RCOMP_0
H1
DDR_RCOMP_1
J2
DDR_RCOMP_2
CFL-H_BGA1440
CFL-H
DDR CHANNEL B
DDR1_CKP_0/DDR1_CKP_0 DDR1_CKN_0/DDR1_CKN_0 DDR1_CKP_1/DDR1_CKP_1 DDR1_CKN_1/DDR1_CKN_1
DDR1_CKE_0/DDR1_CKE_0 DDR1_CKE_1/DDR1_CKE_1 DDR1_CKE_2/DDR1_CKE_2 DDR1_CKE_3/DDR1_CKE_3
DDR1_ODT_0/DDR1_ODT_0
DDR1_CAB_3/DDR1_MA_16 DDR1_CAB_2/DDR1_MA_14 DDR1_CAB_1/DDR1_MA_15
DDR1_CAB_7/DDR1_MA_10 DDR1_CAA_7/DDR1_MA_11 DDR1_CAA_6/DDR1_MA_12 DDR1_CAB_0/DDR1_MA_13
DDR1_DQSN_0/DDR0_DQSN_2 DDR1_DQSN_1/DDR0_DQSN_3 DDR1_DQSN_2/DDR0_DQSN_6 DDR1_DQSN_3/DDR0_DQSN_7 DDR1_DQSN_4/DDR1_DQSN_2 DDR1_DQSN_5/DDR1_DQSN_3 DDR1_DQSN_6/DDR1_DQSN_6 DDR1_DQSN_7/DDR1_DQSN_7
DDR1_DQSP_0/DDR0_DQSP_2 DDR1_DQSP_1/DDR0_DQSP_3 DDR1_DQSP_2/DDR0_DQSP_6 DDR1_DQSP_3/DDR0_DQSP_7 DDR1_DQSP_4/DDR1_DQSP_2 DDR1_DQSP_5/DDR1_DQSP_3 DDR1_DQSP_6/DDR1_DQSP_6 DDR1_DQSP_7/DDR1_DQSP_7
DDR1_DQSP_8/DDR1_DQSP_8 DDR1_DQSN_8/DDR1_DQSN_8
2 OF 13
LP3/DDR4
NC/DDR1_CKP_2 NC/DDR1_CKN_2 NC/DDR1_CKP_3 NC/DDR1_CKN_3
DDR1_CS#_0/DDR1_CS#_0 DDR1_CS#_1/DDR1_CS#_1
NC/DDR1_CS#_2 NC/DDR1_CS#_3
NC/DDR1_ODT_1 NC/DDR1_ODT_2 NC/DDR1_ODT_3
DDR1_CAB_4/DDR1_BA_0 DDR1_CAB_6/DDR1_BA_1 DDR1_CAA_5/DDR1_BG_0
DDR1_CAB_9/DDR1_MA_0 DDR1_CAB_8/DDR1_MA_1 DDR1_CAB_5/DDR1_MA_2
NC/DDR1_MA_3
NC/DDR1_MA_4 DDR1_CAA_0/DDR1_MA_5 DDR1_CAA_2/DDR1_MA_6 DDR1_CAA_4/DDR1_MA_7
DDR1_CAA_3/DDR1_MA_8 DDR1_CAA_1/DDR1_MA_9
DDR1_CAA_9/DDR1_BG_1 DDR1_CAA_8/DDR1_ACT#
NC/DDR1_PAR
NC/DDR1_ALERT#
DDR4(IL)/LP3-DDR4(NIL)
DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ
AM9 AN9 AM7 AM8 AM11 AM10 AJ10 AJ11
AT8 AT10 AT7 AT11
AF11 AE7 AF10 AE10
AF7 AE8 AE9 AE11
AH10 AH11 AF8
AH8 AH9 AR9
AJ9 AK6 AK5 AL5 AL6 AM6 AN7 AN10
AN8 AR11 AH7 AN11 AR10 AF9 AR7 AT9
AJ7 AR8
BN9 BL9 BG9 BC9 AC9 W9 R9 M9
BP9 BJ9 BF9 BB9 AA9 V9 P9 L9
AW9 AY9
BN13 BP13 BR13
DDR_B_CLK 0 DDR_B_CLK #0 DDR_B_CLK 1 DDR_B_CLK #1 DDR_B_CLK 2 DDR_B_CLK #2 DDR_B_CLK 3 DDR_B_CLK #3
DDR_B_CKE0 DDR_B_CKE1 DDR_B_CKE2 DDR_B_CKE3
DDR_B_CS# 0 DDR_B_CS# 1 DDR_B_CS# 2 DDR_B_CS# 3
DDR_B_ODT 0 DDR_B_ODT 1 DDR_B_ODT 2 DDR_B_ODT 3
DDR_B_MA16 DDR_B_MA14 DDR_B_MA15
DDR_B_BA0 DDR_B_BA1 DDR_B_BG0
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7
DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_BG1 DDR_B_ACT#
DDR_B_PARITY DDR_B_ALERT #
DDR_B_DQS# 0 DDR_B_DQS# 1 DDR_B_DQS# 2 DDR_B_DQS# 3 DDR_B_DQS# 4 DDR_B_DQS# 5 DDR_B_DQS# 6 DDR_B_DQS# 7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
DDR_B_DQS8 DDR_B_DQS# 8
+DDR_VREF_C A
1
PAD~D
+DDR_VREF_B_ DQ
DDR_B_CLK 0 <2 6> DDR_B_CLK #0 < 26> DDR_B_CLK 1 <2 6> DDR_B_CLK #1 < 26> DDR_B_CLK 2 <2 5> DDR_B_CLK #2 < 25> DDR_B_CLK 3 <2 5> DDR_B_CLK #3 < 25>
DDR_B_CKE0 <26 > DDR_B_CKE1 <26 > DDR_B_CKE2 <25 > DDR_B_CKE3 <25 >
DDR_B_CS# 0 <2 6> DDR_B_CS# 1 <2 6> DDR_B_CS# 2 <2 5> DDR_B_CS# 3 <2 5>
DDR_B_ODT 0 <26> DDR_B_ODT 1 <26> DDR_B_ODT 2 <25> DDR_B_ODT 3 <25>
DDR_B_MA16 <25,26> DDR_B_MA14 <25,26> DDR_B_MA15 <25,26>
DDR_B_BA0 <25,26> DDR_B_BA1 <25,26> DDR_B_BG0 <25,26>
DDR_B_MA[0..13] <25 ,26>
DDR_B_BG1 <25,26> DDR_B_ACT# <25,26>
DDR_B_PARITY <25,26 > DDR_B_ALERT # <25,2 6>
DDR_B_DQS# [0..7] <25,26>
DDR_B_DQS[0..7 ] < 25,26>
DDR_B_DQS8 <2 5,26> DDR_B_DQS# 8 < 25,26>
@
T199
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CFL-H(3/8) DDR4
CFL-H(3/8) DDR4
CFL-H(3/8) DDR4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
8 103
8 103
8 103
1.0
1.0
1.0
5
D D
4
3
2
1
UC1D
CPU_DP1 _P0<31> CPU_DP1 _N0<3 1> CPU_DP1 _P1<31> CPU_DP1 _N1<3 1>
MUX PS8461
C C
DEMUX PS8338
UMA DGFF
B B
CPU_DP1 _P2<31> CPU_DP1 _N2<3 1> CPU_DP1 _P3<31> CPU_DP1 _N3<3 1>
CPU_DP1 _AUXP<31 > CPU_DP1 _AUXN<31>
CPU_DP2 _P0<30> CPU_DP2 _N0<3 0> CPU_DP2 _P1<30> CPU_DP2 _N1<3 0> CPU_DP2 _P2<30> CPU_DP2 _N2<3 0> CPU_DP2 _P3<30> CPU_DP2 _N3<3 0>
CPU_DP2 _AUXP<30 > CPU_DP2 _AUXN<30>
CPU_DP3 _P0<28> CPU_DP3 _N0<2 8> CPU_DP3 _P1<28> CPU_DP3 _N1<2 8> CPU_DP3 _P2<28> CPU_DP3 _N2<2 8> CPU_DP3 _P3<28> CPU_DP3 _N3<2 8>
CPU_DP3 _AUXP<28 > CPU_DP3 _AUXN<28>
CPU_DP1 _P0 CPU_DP1 _N0 CPU_DP1 _P1 CPU_DP1 _N1 CPU_DP1 _P2 CPU_DP1 _N2 CPU_DP1 _P3 CPU_DP1 _N3
CPU_DP1 _AUXP CPU_DP1 _AUXN
CPU_DP2 _P0 CPU_DP2 _N0 CPU_DP2 _P1 CPU_DP2 _N1 CPU_DP2 _P2 CPU_DP2 _N2 CPU_DP2 _P3 CPU_DP2 _N3
CPU_DP2 _AUXP CPU_DP2 _AUXN
CPU_DP3 _P0 CPU_DP3 _N0 CPU_DP3 _P1 CPU_DP3 _N1 CPU_DP3 _P2 CPU_DP3 _N2 CPU_DP3 _P3 CPU_DP3 _N3
CPU_DP3 _AUXP CPU_DP3 _AUXN
K36
DDI1_TXP_0
K37
DDI1_TXN_0
J35
DDI1_TXP_1
J34
DDI1_TXN_1
H37
DDI1_TXP_2
H36
DDI1_TXN_2
J37
DDI1_TXP_3
J38
DDI1_TXN_3
D27
DDI1_AUXP
E27
DDI1_AUXN
H34
DDI2_TXP_0
H33
DDI2_TXN_0
F37
DDI2_TXP_1
G38
DDI2_TXN_1
F34
DDI2_TXP_2
F35
DDI2_TXN_2
E37
DDI2_TXP_3
E36
DDI2_TXN_3
F26
DDI2_AUXP
E26
DDI2_AUXN
C34
DDI3_TXP_0
D34
DDI3_TXN_0
B36
DDI3_TXP_1
B34
DDI3_TXN_1
F33
DDI3_TXP_2
E33
DDI3_TXN_2
C33
DDI3_TXP_3
B33
DDI3_TXN_3
A27
DDI3_AUXP
B27
DDI3_AUXN
CFL-H_BG A1440
CFL-H
EDP_TXP_0 EDP_TXN_0 EDP_TXP_1 EDP_TXN_1 EDP_TXP_2 EDP_TXN_2 EDP_TXP_3 EDP_TXN_3
EDP_AUXP EDP_AUXN
EDP_DISP_UTIL
DISP_RCOMP
PROC_AUDIO_CLK
PROC_AUDIO_SDI
PROC_AUDIO_SDO
4 of 13
D29 E29 F28 E28 A29 B29 C28 B28
C26 B26
A33
D37
G27 G25 G29
EDP_TXP 0 EDP_TXN 0 EDP_TXP 1 EDP_TXN 1 EDP_TXP 2 EDP_TXN 2 EDP_TXP 3 EDP_TXN 3
EDP_AUX P EDP_AUX N
1
PAD~D
EDP_COM P
AUD_AZA CPU_SCLK AUD_AZA CPU_SDO AUD_AZA CPU_SDI
EDP_TXP 0 <29> EDP_TXN 0 <29> EDP_TXP 1 <29> EDP_TXN 1 <29> EDP_TXP 2 <29> EDP_TXN 2 <29> EDP_TXP 3 <29> EDP_TXN 3 <29>
EDP_AUX P <29> EDP_AUX N <29 >
@
T194
AUD_AZA CPU_SCLK <18> AUD_AZA CPU_SDO <18>
AUD_AZA CPU_SDI
RC66 20_0402_ 5%
1 2
MUX PS8331
AUD_AZA CPU_SDI_R
EDP_COM P
min Trace width=5 mils ,Spacing=20mil Max length= 600 mils.
AUD_AZA CPU_SDI_R <18>
+1.0VS_V CCIO
1 2
RC1 2 4.9_0402_1%
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CFL-H(4/8) DDI,eDP
CFL-H(4/8) DDI,eDP
CFL-H(4/8) DDI,eDP
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
A
A
A
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
9 103
9 103
9 103
1.0
1.0
1.0
5
VSS_A36
VSS_A37
BR1 BT2
BN35
H24 BN33 BL34
N29
R14 AE29 AA14 AP29 AP14
A36
H23
F30
E30
B30
C30
BR35 BR31 BH30
J24
A37
J23
E2
E3
E1
D1
G3
J3
1
T4PAD~D @ T3PAD~D @ T2PAD~D @
D D
PCH_2_C PU_TRIGGER<20>
C C
T1PAD~D @
T5PAD~D @ T6PAD~D @
T7PAD~D @
T9PAD~D @ T10PAD~D @ T11PAD~D @ T8PAD~D @
T14PAD~D @ T13PAD~D @ T15PAD~D @
T12PAD~D @ T28PAD~D @ T27PAD~D @
T285PAD~D @
T281PAD~D @
T18PAD~D @ T19PAD~D @
T21PAD~D @ T20PAD~D @
T23PAD~D @ T24PAD~D @ T22PAD~D @
IST_TRIG
1 1 1
1 1
1
1 1 1 1
1 1 1 1 1 1
PCH_2_C PU_TRIGGER CPU_2_P CH_TRIGGER_R
TP_SKL_ F30
1
TP_SKL_ E30
1
1 1
1 1
1 1 1
4
UC1M
RSVD_TP5 IST_TRIG RSVD_TP4 RSVD_TP3
RSVD_TP1 RSVD_TP2
RSVD15
RSVD28 RSVD27 RSVD14 RSVD13
RSVD30 RSVD31 RSVD2 RSVD1 RSVD5 RSVD4 VSS_A36
VSS_A37
PROC_TRIGIN PROC_TRIGOUT
RSVD24
RSVD23
RSVD7 RSVD21
RSVD26 RSVD29
RSVD19 RSVD18 RSVD9
CFL-H_BG A1440
CFL-H
13 OF 13
RSVD11 RSVD10
RSVD12
RSVD3
RSVD25
RSVD22 RSVD20 RSVD17 RSVD16
RSVD8 RSVD6
BK28 BJ28
BL31 AJ8 G13
C38 C1 BR2 BP1 B38 B2
1 1
1 1 1
1 1 1 1 1 1
T29 PAD~D@ T30 PAD~D@
T297 PAD~ D
@
T298 PAD~ D
@
T299 PAD~ D
@
T300 PAD~ D
@
T301 PAD~ D
@
T302 PAD~ D
@
T303 PAD~ D
@
T304 PAD~ D
@
T305 PAD~ D
@
3
FOLLOW PDG V1P8 P.616 downsize to SE00000UD00 11x 10uF 0402
close to UC1.Y12
10U_0402_6.3V6M
1
CC185
2
+1.0VS_V CCIO
PLACE CAP BACKSIDE
10U_0603_6.3V6M
12
+1.0V_VC CST
1U_0201_10V6M
2
1
2
1U_0201_6.3V6M
2
1
10U_0603_6.3V6M
1U_0201_6.3V6M
2
CC186
1
10U_0603_6.3V6M
CC187
12
PLACE CAP BACKSIDE
1U_0201_6.3V6M
@
2
CC195
1
+1.0V_VCCSFR
@
CC272
1
CC192
2
PLACE CAP BACKSIDE or BOARD EDGE
+1.0V_VC CSTG +1.0V_VCCSF R_R +1.0V _VCCST
10U_0603_6.3V6M
CC188
CC189
12
12
1U_0201_10V6M
2
CC193
CC194
1
22U_0603_6.3V6M
1U_0201_6.3V6M
CC333
2
CC191
1
follow Berlineeta add 22uF to solve PS4 idle hang location:CC568 CC569 3/21
LC562
BLM18EG 221TN1D_2P~D
1 2
Change LC422 from 0_0603_5% to Beads
@
1
CC569
2
+VCC_SF R_OC+1.2V_ME M
22U_0603_6.3V6M
+1.0V_VC CSFR_R
1
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
2
CC210
1
22U_0603_6.3V6M
2
1
@
1
2
CC568
CC209
2
1
CC335
downsize
+1.2V_ME M
B B
A A
5
CPU_2_P CH_TRIGGER<20>
VSS_A36 VSS_A37
1 2
RC177 30_0402 _5%
1 2
RC178 0_0402_ 5%@
1 2
RC179 0_0402_ 5%@
4
CPU_2_P CH_TRIGGER_RCPU_2_P CH_TRIGGER
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
+1.2V_MEM DECOUPLING
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1
1
1
CC161
2
2
22U_0603_6.3V6M
12
CC81
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
1
CC170
CC164
2
2
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
CC83
CC82
CC168
12
10U_0402_6.3V6M
1
CC163
2
22U_0603_6.3V6M
CC84
PLACE CAP BACKSIDE
10U_0402_6.3V6M
10U_0402_6.3V6M
1
1
CC166
CC171
2
2
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1
1
1
CC165
CC172
CC167
2
2
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CFL-H(5/8) RSVD,Decoupling
CFL-H(5/8) RSVD,Decoupling
CFL-H(5/8) RSVD,Decoupling
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
10 103
10 103
10 103
1.0
1.0
1.0
5
4
3
2
1
+VCCPLL_OC source
+VCC_GT
AT14
D D
C C
B B
AT31 AT32 AT33 AT34 AT35 AT36 AT37
AT38 AU14 AU29 AU30 AU31 AU32 AU35 AU36 AU37 AU38 AV29 AV30 AV31 AV32 AV33 AV34 AV35 AV36
AW14 AW31 AW32 AW33 AW34 AW35 AW36 AW37 AW38
AY29 AY30 AY31 AY32 AY35 AY36 AY37 AY38 BA13 BA14 BA29 BA30 BA31 BA32 BA33 BA34 BA35 BA36 BB13 BB14 BB31 BB32 BB33 BB34 BB35 BB36 BB37 BB38 BC29 BC30 BC31 BC32 BC35 BC36 BC37 BC38 BD13 BD14 BD29 BD30 BD31 BD32 BD33 BD34 BP37 BP38 BR15 BR16 BR17
UC1K
VCCGT1 VCCGT2 VCCGT3 VCCGT4 VCCGT5 VCCGT6 VCCGT7 VCCGT8 VCCGT9 VCCGT10 VCCGT11 VCCGT12 VCCGT13 VCCGT14 VCCGT15 VCCGT16 VCCGT17 VCCGT18 VCCGT19 VCCGT20 VCCGT21 VCCGT22 VCCGT23 VCCGT24 VCCGT25 VCCGT26 VCCGT27 VCCGT28 VCCGT29 VCCGT30 VCCGT31 VCCGT32 VCCGT33 VCCGT34 VCCGT35 VCCGT36 VCCGT37 VCCGT38 VCCGT39 VCCGT40 VCCGT41 VCCGT42 VCCGT43 VCCGT44 VCCGT45 VCCGT46 VCCGT47 VCCGT48 VCCGT49 VCCGT50 VCCGT51 VCCGT52 VCCGT53 VCCGT54 VCCGT55 VCCGT56 VCCGT57 VCCGT58 VCCGT59 VCCGT60 VCCGT61 VCCGT62 VCCGT63 VCCGT64 VCCGT65 VCCGT66 VCCGT67 VCCGT68 VCCGT69 VCCGT70 VCCGT71 VCCGT72 VCCGT73 VCCGT74 VCCGT75 VCCGT76 VCCGT77 VCCGT78 VCCGT79 VCCGT159 VCCGT160 VCCGT161 VCCGT162 VCCGT163
CFL-H_BGA1440
CFL-H
VSSGT_SENSE
11 OF 13
VCCGT_SENSE
VCCGT80 VCCGT81 VCCGT82 VCCGT83 VCCGT84 VCCGT85 VCCGT86 VCCGT87 VCCGT88 VCCGT89 VCCGT90 VCCGT91 VCCGT92 VCCGT93 VCCGT94 VCCGT95 VCCGT96 VCCGT97 VCCGT98
VCCGT99 VCCGT100 VCCGT101 VCCGT102 VCCGT103 VCCGT104 VCCGT105 VCCGT106 VCCGT107 VCCGT108 VCCGT109 VCCGT110 VCCGT111 VCCGT112 VCCGT113 VCCGT114 VCCGT115 VCCGT116 VCCGT117 VCCGT118 VCCGT119 VCCGT120 VCCGT121 VCCGT122 VCCGT123 VCCGT124 VCCGT125 VCCGT126 VCCGT127 VCCGT128 VCCGT129 VCCGT130 VCCGT131 VCCGT132 VCCGT133 VCCGT134 VCCGT135 VCCGT136 VCCGT137 VCCGT138 VCCGT139 VCCGT140 VCCGT141 VCCGT142 VCCGT143 VCCGT144 VCCGT145 VCCGT146 VCCGT147 VCCGT148 VCCGT149 VCCGT150 VCCGT151 VCCGT152 VCCGT153 VCCGT154 VCCGT155 VCCGT156 VCCGT157 VCCGT158 VCCGT164 VCCGT165 VCCGT166 VCCGT167 VCCGT168
BD35 BD36 BE31 BE32 BE33 BE34 BE35 BE36 BE37 BE38 BF13 BF14 BF29 BF30 BF31 BF32 BF35 BF36 BF37 BF38 BG29 BG30 BG31 BG32 BG33 BG34 BG35 BG36 BH33 BH34 BH35 BH36 BH37 BH38 BJ16 BJ17 BJ19 BJ20 BJ21 BJ23 BJ24 BJ26 BJ27 BJ37 BJ38 BK16 BK17 BK19 BK20 BK21 BK23 BK24 BK26 BK27 BL15 BL16 BL17 BL23 BL24 BL25 BL26 BL27 BL28 BL36 BL37 BM15 BM16 BM17 BM36 BM37 BN15 BN16 BN17 BN36 BN37 BN38 BP15 BP16 BP17 BR37 BT15 BT16 BT17 BT37
AH37 AH38
+VCC_GT
+1.0VS_VCCIO
VSS_GT_SENSE <90> VCC_GT_SENSE <90>
+VCC_SA
CFL-H
UC1L
J30
VCCSA1
K29
VCCSA2
K30
VCCSA3
K31
VCCSA4
K32
VCCSA5
K33
VCCSA6
K34
VCCSA7
K35
VCCSA8
L31
VCCSA9
L32
VCCSA10
L35
VCCSA11
L36
VCCSA12
L37
VCCSA13
L38
VCCSA14
M29
VCCSA15
M30
VCCSA16
M31
VCCSA17
M32
VCCSA18
M33
VCCSA19
M34
VCCSA20
M35
VCCSA21
M36
VCCSA22
AG12
VCCIO1
G15
VCCIO2
G17
VCCIO3
G19 G21 H15 H16 H17 H19 H20 H21 H26 H27
J15 J16 J17 J19 J20 J21 J26 J27
CFL-H_BGA1440
VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8 VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21
VCCPLL_OC1 VCCPLL_OC2 VCCPLL_OC3
VCCSA_SENSE VSSSA_SENSE
VCCIO_SENSE VSSIO_SENSE
12 OF 13
+1.0V_VCCSTG +1.0V_VCCST
RZ151 0_0402_5%@
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8
VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VDDQ23 VDDQ24 VDDQ25
VCCST
VCCSTG2
VCCSTG1
VCCPLL1 VCCPLL2
1 2
AA6 AE12 AF5 AF6 AG5 AG9 AJ12 AL11 AP6 AP7 AR12 AR6 AT12 AW6 AY6 J5 J6 K12 K6 L12 L6 R6 T6 W6 Y12
BH13 BJ13 G11
H30
H29
G30
H28 J28
M38 M37
H14 J14
12A
+1.2V_MEM
+VCC_SFR_OC
0.1U_0402_25V6
12
+VCC_SFR_OC
+1.0V_VCCST
+1.0V_VCCSTG
+VCC_FUSEPRG
+1.0V_VCCSFR_R
VCC_SA_SENSE <90 > VSS_SA_SENSE <90>
VCC_IO_SENSE < 89> VSS_IO_SENSE <89>
+VCC_SFR_OC
RF Request
1 2
CZ102 1U_0 201_10V6M
VCCSTG_EN
ESD@
CC334
RZ543 10K_0402_5 %
1 2
CPU_C10_GATE#<14,89>
PCH_PRIM_EN<18 ,22,89>
SIO_SLP_S4#<11,18,19,88 >
0.1U_0201_ 25V6K
1
2
3
RC562 0_0201_5%
@
CZ544
12
UZ61
NC
A
GND
74AUP1G07GW _TSSOP5
1 2
@
1 2
RZ120 0_04 02_5%@
1
2
1U_0201_1 0V6M
+1.8V_PRIM
5
VCC
4
Y
+5V_ALW_R
+3.3V_ALW
5
IN1
IN2
3
CZ105
+3.3V_RUN+1.8V_PRIM
Reserve for SIO_SLP_S0#
+1.05V_PRIM
1
1
2
1U_0201_10V6M
CZ100
+5V_ALW_R
2
CC322
RF@
2.2P_0402_50V8C
+1.2V_MEM
@
CZ200
1 2
0.1U_0201_ 10V6K
VCC
4
OUT
GND
UZ34
@
MC74VHC1G08D FT2G_SC70-5
+1.0V_VCCSTG source
12
+5V_ALW_R
RZ542
10K_0402_5 %
1 2
C10_PWR _GATE#
RUN_ON<22,58,59,67,70,89>
+3.3V_ALW
1
IN1
2
IN2
+1.0V_VCCST source
Change CPN from SA00007XR00 to SA00008R600 3/12
UZ21
1
VIN1
2
VIN2
7
VIN thermal
3
VBIAS
4
ON
EM5201V_DFN3X3- 8-X
4.4mohm/6A TR=12.5us@Vin=1.05V
PDDG page19, if don`t support DS3, connect to VDDQ directly
+VCC_SFR_OC
1 2
RZ119 0_0402_5%@
Change CPN from SA00007XR00 to SA00008R600 3/12
UZ26
1
VIN1
2
VIN2
7
VIN thermal
3
VBIAS
4
ON
EM5201V_DFN3X3- 8-X
+1.05V_PRIM
Change CPN from SA00007XR00 to SA00008R600 3/12
5
VCC
VCCSTG_EN
4
OUT
GND
UZ35
3
MC74VHC1G08D FT2G_SC70-5
6
VOUT
5
GND
6
VOUT
5
GND
UZ19
1
VIN1
2
VIN2
7
VIN thermal
3
VBIAS
4
ON
EM5201V_DFN3X3- 8-X
4.4mohm/6A TR=12.5us@Vin=1.05V
+1.0V_VCCST_C
VOUT
0.1U_0201_10V6K
1
CZ101
2
6
5
GND
JUMP@
PJP1
PAD-OPEN1x1m
1 2
CZ199 0.1U_0 201_10V6K
+1.0V_VCCSTG
12
JUMP@
PJP2
PAD-OPEN1x1m
+1.0V_VCCSTG_C
1 2
12
RC304
@
+VCC_FUSEPRG
12
RC3260_0402_5% @
1 2
CZ106
0.1U_0201_ 10V6K
+1.0V_VCCSFR+1.0V_VCCST
0_0402_5%
SIO_SLP_S4#<11,18,19,88 >
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CFL-H(6/8) PWR
CFL-H(6/8) PWR
CFL-H(6/8) PWR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
11 103
11 103
11 103
1.0
1.0
1.0
5
4
3
2
1
+VCC_CO RE
AA13 AA31 AA32 AA33 AA34 AA35 AA36 AA37 AA38 AB29 AB30 AB31 AB32 AB35 AB36 AB37 AB38 AC13 AC14 AC29 AC30 AC31 AC32 AC33 AC34 AC35 AC36 AD13 AD14 AD31 AD32 AD33 AD34 AD35 AD36 AD37 AD38 AE13 AE14 AE30 AE31 AE32 AE35 AE36 AE37 AE38 AF29 AF30 AF31 AF32 AF33 AF34 AF35 AF36 AF37 AF38 AG14 AG31 AG32 AG33 AG34 AG35 AG36
UC1I
VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63
CFL-H_BG A1440
CFL-H
9 OF 13
VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98
VCC99 VCC100 VCC101 VCC102 VCC103 VCC104 VCC105 VCC106 VCC107 VCC108 VCC109 VCC110 VCC111 VCC112 VCC113 VCC114 VCC115 VCC116 VCC117 VCC118 VCC119 VCC120 VCC121 VCC122 VCC123 VCC124
VCC_SENSE VSS_SENSE
W35 W36 W37 W38 Y29 Y30 Y31 Y32 Y33 Y34 Y35 Y36
+VCC_CO RE
+VCC_CO RE
CFL-H
D D
C C
B B
K14
L13
L14 N13 N14 N30 N31 N32 N35 N36 N37 N38 P13 P14 P29 P30 P31 P32 P33 P34 P35 P36 R13 R31 R32 R33 R34 R35 R36 R37 R38 T29 T30 T31 T32 T35 T36 T37 T38 U29 U30 U31 U32 U33 U34 U35 U36 V13 V14 V31 V32 V33 V34 V35 V36 V37 V38
W13 W14 W29 W30 W31 W32
CFL-H_BG A1440
UC1J
VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63
10 OF 13
VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75
AH13 AH14 AH29 AH30 AH31 AH32 AJ14 AJ29 AJ30 AJ31 AJ32 AJ33 AJ34 AJ35 AJ36 AK31 AK32 AK33 AK34 AK35 AK36 AK37 AK38 AL13 AL29 AL30 AL31 AL32 AL35 AL36 AL37 AL38 AM13 AM14 AM29 AM30 AM31 AM32 AM33 AM34 AM35 AM36 AN13 AN14 AN31 AN32 AN33 AN34 AN35 AN36 AN37 AN38 AP13 AP30 AP31 AP32 AP35 AP36 AP37 AP38 K13
AG37 AG38
+VCC_CO RE
VCC_SEN SE
VSS_SEN SE
VCC_SEN SE <90> VSS_SEN SE <90>
CFL change form +VCCGT to +VCC_CORE
A A
VSS_SEN SE VCC _SENSE
RC221 49.9_040 2_1%@
1 2
DELL CONFIDENTIAL/PROPRIETARY
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CFL-H(7/8) +VCC_CORE
CFL-H(7/8) +VCC_CORE
CFL-H(7/8) +VCC_CORE
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
12 103
12 103
12 103
1.0
1.0
1.0
5
4
3
2
1
CFL-H
UC1F
A10
VSS_1
A12
VSS_2
A16
VSS_3
A18
VSS_4
A20
VSS_5
A22
VSS_6
A24
VSS_7
A26
VSS_8
D D
C C
B B
A28 A30
AA12 AA29 AA30 AB33 AB34
AB6 AC1
AC12
AC2
AC3 AC37 AC38
AC4
AC5
AC6 AD10 AD11 AD12 AD29 AD30
AD6
AD8
AD9 AE33 AE34
AE6
AF1 AF12 AF13 AF14
AF2
AF3
AF4 AG10 AG11 AG13 AG29 AG30
AG6 AG7
AG8 AH12 AH33 AH34 AH35 AH36
AH6
AJ1
AJ13
AJ2
AJ3 AJ37 AJ38
AJ4
AJ5
AJ6
Y10 Y11 Y13 Y14 Y37 Y38
AK29 AK30
A6 A9
W4 W5
Y7 Y8 Y9
VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80
6 OF 13
VSS_81
CFL-H_BG A1440
VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98
VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162
AK4 AL10 AL12 AL14 AL33 AL34 AL4 AL7 AL8 AL9 AM1 AM12 AM2 AM3 AM37 AM38 AM4 AM5 AN12 AN29 AN30 AN5 AN6 AP10 AP11 AP12 AP33 AP34 AP8 AP9 AR1 AR13 AR14 AR2 AR29 AR3 AR30 AR31 AR32 AR33 AR34 AR35 AR36 AR37 AR38 AR4 AR5 AT29 AT30 AT6 AU10 AU11 AU12 AU33 AU34 AU6 AU7 AU8 AU9 AV37 AV38 AW1 AW12 AW2 AW29 AW3 AW30 AW4 U6 V12 V29 V30 A14 AD7 V6 W1 W12 W2 W3 W33 W34
AW5 AY12 AY33 AY34
BA10 BA11 BA12 BA37 BA38
BA6 BA7 BA8 BA9 BB1
BB12
BB2
BB29
BB3
BB30
BB4 BB5
BB6 BC12 BC13 BC14 BC33 BC34
BC6 BD10 BD11 BD12 BD37
BD6
BD7
BD8
BD9
BE1
BE2 BE29
BE3 BE30
BE4
BE5
BE6 BF12 BF33 BF34
BF6 BG12 BG13 BG14 BG37 BG38
BG6
BH1 BH10 BH11 BH12 BH14
BH2
BH3
BH4
BH5
BH6
BH7
BH8
BH9
T33 T34
U37
U38 BJ12 BJ14
UC1G
VSS_163 VSS_164 VSS_165 VSS_166
B9
VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230
T2
VSS_231
T3
VSS_232 VSS_233 VSS_234
T4
VSS_235
T5
VSS_236
T7
VSS_237
T8
VSS_238
T9
VSS_239 VSS_240 VSS_241 VSS_242 VSS_243
CFL-H_BG A1440
CFL-H
7 OF 13
VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324
BJ15 BJ18 BJ22 BJ25 BJ29 BJ30 BJ31 BJ32 BJ33 BJ34 BJ35 BJ36 BK13 BK14 BK15 BK18 BK22 BK25 BK29 BK6 BL13 BL14 BL18 BL19 BL20 BL21 BL22 BL29 BL33 BL35 BL38 BL6 BM11 BM12 BM13 BM14 BM18 BM2 BM21 BM22 BM23 BM24 BM25 BM26 BM27 BM28 BM29 BM3 BM33 BM35 BM38 BM5 BM6 BM7 BM8 BM9 BN12 BN14 BN18 BN19 BN2 BN20 BN21 BN24 BN29 BN30 BN31 BN34 P38 P6 R12 R29 AY14 BD38 R30 T1 T10 T11 T12 T13 T14
BN4
BN7 BP12 BP14 BP18 BP21 BP24 BP25 BP26 BP29 BP33 BP34
BP7 BR12 BR14 BR18 BR21 BR24 BR25 BR26 BR29 BR34 BR36
BR7
BT12 BT14 BT18 BT21 BT24 BT26 BT29 BT32
M14
BT5 C11 C13 C15 C17 C19 C21 C23 C25 C27 C29 C31 C37
D10 D12 D14 D16 D18 D20 D22 D24 D26 D28
D30 D33
E34 E35 E38
N33 N34
P12 P37
F11 F13
UC1H
VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359 VSS_360 VSS_361 VSS_362 VSS_363 VSS_364 VSS_365 VSS_366 VSS_367 VSS_368 VSS_369
C5
VSS_370
C8
VSS_371
C9
VSS_372 VSS_373 VSS_374 VSS_375 VSS_376 VSS_377 VSS_378 VSS_379 VSS_380 VSS_381 VSS_382
D3
VSS_383 VSS_384 VSS_385
D6
VSS_386
D9
VSS_387 VSS_388 VSS_389 VSS_390
E4
VSS_391
E9
VSS_392
N3
VSS_393 VSS_394 VSS_395
N4
VSS_396
N5
VSS_397
N6
VSS_398
N7
VSS_399
N8
VSS_400
N9
VSS_401 VSS_402 VSS_403 VSS_404
M6
VSS_405
N1
VSS_406 VSS_407 VSS_408
CFL-H_BG A1440
CFL-H
VSS_409 VSS_410 VSS_411 VSS_412 VSS_413 VSS_414 VSS_415 VSS_416 VSS_417 VSS_418 VSS_419 VSS_420 VSS_421 VSS_422 VSS_423 VSS_424 VSS_425 VSS_426 VSS_427 VSS_428 VSS_429 VSS_430 VSS_431 VSS_432 VSS_433 VSS_434 VSS_435 VSS_436 VSS_437 VSS_438 VSS_439 VSS_440 VSS_441 VSS_442 VSS_443 VSS_444 VSS_445 VSS_446 VSS_447 VSS_448 VSS_449 VSS_450 VSS_451 VSS_452 VSS_453 VSS_454 VSS_455 VSS_456 VSS_457 VSS_458 VSS_459 VSS_460 VSS_461 VSS_462 VSS_463 VSS_464 VSS_465 VSS_466 VSS_467 VSS_468 VSS_469 VSS_470 VSS_471 VSS_472 VSS_473 VSS_474 VSS_475 VSS_476 VSS_477 VSS_478 VSS_479
VSS_A34
VSS_B37
VSS_BR38
VSS_BT3 VSS_BT35 VSS_BT36
VSS_BT4
8 OF 13
VSS_D38
VSS_A3
VSS_A4 VSS_B3
VSS_C2
F15 F17 F19 F2 F21 F23 F25 F27 F29 F3 F31 F36 F4 F5 F8 F9 G10 G12 G14 G16 G18 G20 G22 G23 G24 G26 G28 G4 G5 G6 G8 G9 H11 H12 H18 H22 H25 H32 H35 J10 J18 J22 J25 J32 J33 J36 J4 J7 K1 K10 K11 K2 K3 K38 K4 K5 K7 K8 K9 L29 L30 L33 L34 M12 M13 N10 N11 N12 N2 BT8 BR9
A3 A34 A4 B3 B37 BR38 BT3 BT35 BT36 BT4 C2 D38
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CFL-H(8/8) GND
CFL-H(8/8) GND
CFL-H(8/8) GND
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
A
A
A
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
13 103
13 103
13 103
1.0
1.0
1.0
5
4
3
2
1
38.4/19.2MHz (default)
Integrated CNVi disable
Integrated CNVi enable
+1.8V_PRIM
12
RH604
4.7K_0201_5%
12
@
RH603
10K_0201_5%
+1.8V_PRIM
1 2
RH605
20K_0201_5%
12
@
RH606
100K_0201_5%
0=SATA
1=PCIE
0=SATA 1=PCIE
0=SATA 1=PCIE
0=SATA 1=PCIE
+1.8V_PRIM
12
@
RH607
CNV_COEX1
D D
1 2
@
CNV_COEX2<52> CNV_COEX1<52>
1 2
RH6 0_0402_ 5%@
CAM_MIC_CBL _DET#
CONTACTLESS_DET#
HOST_SD_W P#
1 2
RH616 0_0402_5%@
CNV_BRI_PTX_D RX
CNV_BRI_PRX _DTX
CNV_RGI_PTX_DR X
CNV_RGI_PRX_ DTX
BIOS_REC
GPP_J1 CNV_W T_RCOMP
CAM_MIC_CBL _DET#<38>
GPU_EVENT#<27 >
TBT_CIO_PLUG_EVE NT#<42>
GPU_GC6_FB_EN<27>
CONTACTLESS_DE T#<65>
HOST_SD_W P#<7 0>
SMART_SPK_DET0#<56>
FOLLOW X10 H Dell GPIO map
CNV_COEX3<52>
CPU_C10_GA TE#<11,89>
RH446
SIO_SLP_S0#<1 8,19,65>
+1.8V_PRIM
RH614 20K_0 402_5%@
RH613 20K_0 402_5%@
CFL PDG rev0.5 To avoid floating input at the I/O pin it is recommended to add a weak pull up resistor to the SOC pi n with a recommended value of 20K ohm.
C C
+3.3V_RUN
1 2
RH319 10K_ 0201_5%
1 2
RH214 100K _0402_5%
1 2
RH324 10K_ 0402_5%
1 2
RH76 10K_0402_5 %
@RTD3@
RT644 100K_0402_5 %
1 2
RH90 10K_0402_5 %
1 2
RH380 10K_ 0402_5%
B B
1 2
RH325 10K_ 0201_5%@
1 2
RH326 10K_ 0201_5%@
1 2
RH344 10K_ 0402_5%
1 2
RT616 100K_0402_5%@
+3.3V_ALW _PCH
RTD3@
RT615 100K_0402_5 %
1 2
1 2
CAM_MIC_CBL _DET#
HOST_SD_W P#
HDD_DET#
BIOS_REC
Reserve +3.3V_RUN for PCH_TBT_PERST# 4/8
1 2
CONTACTLESS_DE T#
SATALED#
SATAGP5
SATAGP6
SATAGP0
PCH_TBT_PERST#
FOLLOW X10 H Dell GPIO map
FOLLOW X10 H Dell GPIO map
1 2
CNV_BRI_PRX _DTX
CNV_RGI_PRX_ DTX
PCH_TBT_PERST#
PCH_TBT_PERST#
M.2 SSD Slot#3
Tell EC don't read GFX Temp.in GC6 High: Read; Low: Don`t read
M.2 SSD Slot#6
HDD
M.2 SSD Slot#3
M.2 SSD Slot#4
0_0201_5%
CNV_BRI_PTX_D RX<52>
CNV_BRI_PRX_DTX< 52>
CNV_RGI_PTX_DR X<52 >
CNV_RGI_PRX_DTX<52>
PCH_CL_CLK 1<52>
PCH_CL_DA TA1<52>
PCH_CL_RS T1#<52>
PCIE_PTX_DRX _P11<67> PCIE_PTX_DRX _N11<67>
PCIE_PRX_DTX _P11<67> PCIE_PRX_DTX _N11<67>
GC6_THM_ON< 59>
PCIE_PTX_DRX _P12<67> PCIE_PTX_DRX _N12<67>
PCIE_PRX_DTX _P12<67> PCIE_PRX_DTX _N12<67>
PCIE_PTX_DRX _P20<67> PCIE_PTX_DRX _N20<67> PCIE_PRX_DTX _P20<67> PCIE_PRX_DTX _N20<67> PCIE_PTX_DRX _P19<67> PCIE_PTX_DRX _N19<67> PCIE_PRX_DTX _P19<67> PCIE_PRX_DTX _N19<67>
UH1M
AW13
GPP_G0/SD_CMD
BE9
GPP_G1/SD_DATA0
BF8
GPP_G2/SD_DATA1
BF9
GPP_G3/SD_DATA2
BG8
GPP_G4/SD_DATA3
BE8
GPP_G5/SD_CD#
BD8
GPP_G6/SD_CLK
AV13
GPP_G7/SD_WP
AP3
GPP_I11/M2_SKT2_CFG0
AP2
GPP_I12/M2_SKT2_CFG1
AN4
GPP_I13/M2_SKT2_CFG2
AM7
GPP_I14/M2_SKT2_CFG3
AV6
GPP_J0/CNV_PA_BLANKING
AY3
GPP_J1/CPU_C10_GATE#
AR13
GPP_J11/A4WP_PRESENT
AV7
GPP_J10
AW3
GPP_J_2
AT10
GPP_J_3
AV4
GPP_J4/CNV_BRI_DT/UART0B_RTS#
AY2
GPP_J5/CNV_BRI_RSP/UART0B_RXD
BA4
GPP_J6/CNV_RGI_DT/UART0B_TXD
AV3
GPP_J7/CNV_RGI_RSP/UART0B_CTS#
AW2
GPP_J8/CNV_MFUART2_RXD
AU9
GPP_J9/CNV_MFUART2_TXD
CNP-H_BGA87 4
UH1C
AR2
CL_CLK
AT5
CL_DATA
AU4
CL_RST#
P48
GPP_K8
V47
GPP_K9
V48
GPP_K10
W47
GPP_K11
L47
GPP_K0
L46
GPP_K1
U48
GPP_K2
U47
GPP_K3
N48
GPP_K4
N47
GPP_K5
P47
GPP_K6
R46
GPP_K7
C36
PCIE11_TXP/SATA0A_TXP
B36
PCIE11_TXN/SATA0A_TXN
F39
PCIE11_RXP/SATA0A_RXP
G38
PCIE11_RXN/SATA0A_RXN
AR42
GPP_F10/SATA_SCLOCK
AR48
GPP_F11/SATA_SLOAD
AU47
GPP_F13/SATA_SDATAOUT0
AU46
GPP_F12/SATA_SDATAOUT1
C39
PCIE14_TXN/SATA1B_TXN
D39
PCIE14_TXP/SATA1B_TXP
D46
PCIE14_RXN/SATA1B_RXN
C47
PCIE14_RXP/SATA1B_RXP
B38
PCIE13_TXN/SATA0B_TXN
C38
PCIE13_TXP/SATA0B_TXP
C45
PCIE13_RXN/SATA0B_RXN
C46
PCIE13_RXP/SATA0B_RXP
E37
PCIE12_TXP/SATA1A_TXP
D38
PCIE12_TXN/SATA1A_TXN
J41
PCIE12_RXP/SATA_1A_RXP
H42
PCIE12_RXN/SATA1A_RXN
B44
PCIE20_TXP/SATA7_TXP
A44
PCIE20_TXN/SATA7_TXN
R37
PCIE20_RXP/SATA7_RXP
R35
PCIE20_RXN/SATA7_RXN
D43
PCIE19_TXP/SATA6_TXP
C44
PCIE19_TXN/SATA6_TXN
N42
PCIE19_RXP/SATA6_RXP
M44
PCIE19_RXN/SATA6_RXN
CNP-H_BGA87 4
CNP-H
CNV_WR_CLKN
CNV_WR_CLKP
CNV_WR_D0N CNV_WR_D0P CNV_WR_D1N CNV_WR_D1P
CNV_WT_CLKN CNV_WT_CLKP
CNV_WT_D0N CNV_WT_D0P CNV_WT_D1N CNV_WT_D1P
CNV_WT_RCOMP
PCIE_RCOMPN
PCIE_RCOMPP SD_1P8_RCOMP SD_3P3_RCOMP
GPPJ_RCOMP_1P81 GPPJ_RCOMP_1P82 GPPJ_RCOMP_1P83
RSVD2 RSVD3
13 OF 13
CNP-H
GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1 GPP_E2/SATAXPCIE2/SATAGP2
GPP_F0/SATAXPCIE3/SATAGP_3
GPP_F1/SATAXPCIE4/SATAGP4 GPP_F2/SATAXPCIE5/SATAGP5 GPP_F3/SATAXPCIE6/SATAGP6 GPP_F4/SATAXPCIE7/SATAGP7
3 OF 13
RSVD1
PCIE9_RXN PCIE9_RXP PCIE9_TXN PCIE9_TXP
PCIE10_RXN PCIE10_RXP PCIE10_TXN PCIE10_TXP
PCIE15_RXN/SATA2_RXN PCIE15_RXP/SATA2_RXP
PCIE_15_SATA_2_TXN
PCIE15_TXP/SATA2_TXP
PCIE16_RXN/SATA3_RXN PCIE16_RXP/SATA3_RXP PCIE16_TXN/SATA3_TXN
PCIE16_TXP/SATA3_TXP
PCIE17_RXN/SATA4_RXN PCIE17_RXP/SATA4_RXP PCIE17_TXN/SATA4_TXN
PCIE17_TXP/SATA4_TXP
PCIE18_RXN/SATA5_RXN PCIE18_RXP/SATA5_RXP PCIE18_TXN/SATA5_TXN
PCIE18_TXP/SATA5_TXP
GPP_E8/SATA_LED#
GPP_F21/EDP_BKLTCTL
GPP_F20/EDP_BKLTEN
GPP_F19/EDP_VDDEN
THRMTRIP#
PM_SYNC
PLTRST_CPU#
PM_DOWN
BD4 BE3
BB3 BB4 BA3 BA2
BC5 BB6
BE6 BD7 BG6 BF6 BA1
B12
PCIECOMP#
A13
PCIECOMP SD_RCOMP_1 P8
BE5
SD_RCOMP_3 P3
BE4 BD1
GPPJ_RCOMP
BE1 BE2
Y35 Y36
BC1 AL35
TP
Rev1.0
G36 F36 C34 D34
K37 J37 C35 B35
F44 E45 B40 C40
L41 M40 B41 C41
K43 K44 A42 B42
P41 R40 C42 D42
AK48
AH41 AJ43 AK47 AN47 AM46 AM43 AM47 AM48
AU48 AV46 AV44
AD3 AF2
PECI
AF3 AG5 AE2
Rev1.0
CLK_CNV_PRX_DTX_N <52> CLK_CNV_PRX_DTX_P <52>
CNV_PRX_DTX_N0 <52>
CNV_PRX_DTX_P0 <52>
CNV_PRX_DTX_N1 <52>
CNV_PRX_DTX_P1 <52>
CLK_CNV_P TX_DRX_N <5 2> CLK_CNV_P TX_DRX_P <52>
CNV_PTX_DRX _N0 <52> CNV_PTX_DRX _P0 <52> CNV_PTX_DRX _N1 <52> CNV_PTX_DRX _P1 <52>
12
RH612 150_0402_1%
12
RH192 100_0402_1%
12 12
RH611 200_040 2_1%
200_0402_1 %
RH610
12
RH609 200_0402_1 %
1
T34 PAD ~D@
1
T33 PAD ~D@
1
T36 PAD ~D@
1
T35 PAD ~D@
PCIE_PRX_DTX _N9 <67> PCIE_PRX_DTX _P9 <67> PCIE_PTX_DRX _N9 <67> PCIE_PTX_DRX _P9 <67>
PCIE_PRX_DTX _N10 <67>
PCIE_PRX_DTX _P10 <67> PCIE_PTX_DRX _N10 <67> PCIE_PTX_DRX _P10 <67>
PCIE_PRX_DTX _N17 <67>
PCIE_PRX_DTX _P17 <67> PCIE_PTX_DRX _N17 <67> PCIE_PTX_DRX _P17 <67>
PCIE_PRX_DTX _N18 <67>
PCIE_PRX_DTX _P18 <67> PCIE_PTX_DRX _N18 <67>
SATALED#
SATAGP0
HDD_DET#
SATAGP5 SATAGP6 PCH_TBT_PERST#
PCH_THERMTRIP# PCH_PECI H_PECI H_PM_SYNC_ R H_PM_SYNC
PCIE_PTX_DRX _P18 <67>
SATALED# <67,68>
M2_SLOT3_PE DET <67>
HDD_DET# <67 >
M2_SLOT5_PE DET <68>
M2_SLOT4_PE DET <67>
Reserved
PCH_TBT_PERST# <42>
FOLLOW X10 H Dell GPIO map
BIA_PW M_PCH <38> PANEL_BK EN_PCH <3 8> ENVDD_PCH <38>
1 2 1 2
RH75 620_0402_5 %
1 2
RH73 13_0402_5% RH156 30_040 2_5%
PLTRST_CPU# <7>
H_PM_DOW N <7>
PCH_PECI
VCCSPI hard strap
LOW
*
M.2 SSD Slot#3
M.2 SSD Slot#6
M.2 SSD Slot#4
H_THERMTRIP# <7,23,24,25,26,59 > H_PECI <7,58>
H_PM_SYNC < 7>
12
RH74
@
10K_0402_5 %
1.8VHIGH
3.3V
100K_0201_5%
12
RH608
100K_0201_5%
SPSGP0
SPSGP1
10M2_SLOT3_PEDET
SPSGP2
1
1
SPSGP3
1 0=SATA 1=PCIE
SPSGP4 M2_SLOT4_PEDET
CNV_BRI_PTX_D RX
Xtal Frequency select
HIGH 24MHz
*
LOW
CNP EDS rev0.7 An external pull-up is required on this strap since 38.4 MHz XTAL is not supported on the PCH.
CNV_RGI_PTX_DR X
M.2 CNV Mode Select
HIGH
*
LOW
SATAGP0
HDD_DET#
M2_SLOT5_PEDET
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CNP-H(1/9) PCIE,CNV
CNP-H(1/9) PCIE,CNV
CNP-H(1/9) PCIE,CNV
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
C
C
C
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
14 103
14 103
14 103
1.0
1.0
1.0
5
D D
XDP_DBRESET#<7>
RH70 8.2K_0402_5%@
4
ME_RESET#
12
CIS LINK OK
UC3
@
1
IN B
VCC
2
IN A
GND3OUT Y
TC7SH09FU_SSOP5
12
RH660_0402_5% @
+3.3V_RUN
5
4
CH10
@
1 2
0.1U_0201_25V6K
3
SYS_RESET#
SYS_RESET# <18,19>
2
1
UH1B
DMI_CTX_PRX_N0<6> DMI_CTX_PRX_P0<6> DMI_CRX_PTX_N0<6> DMI_CRX_PTX_P0<6> DMI_CTX_PRX_N1<6> DMI_CTX_PRX_P1<6> DMI_CRX_PTX_N1<6>
C C
B B
TR TBT
LAN
SD CARD
WLAN
WWAN
DMI_CRX_PTX_P1<6> DMI_CTX_PRX_N2<6> DMI_CTX_PRX_P2<6> DMI_CRX_PTX_N2<6> DMI_CRX_PTX_P2<6> DMI_CTX_PRX_N3<6> DMI_CTX_PRX_P3<6> DMI_CRX_PTX_N3<6> DMI_CRX_PTX_P3<6>
PCIE_PRX_TTX_N1<42> PCIE_PRX_TTX_P1<42> PCIE_PTX_TRX_N1<42> PCIE_PTX_TRX_P1<42> PCIE_PRX_TTX_N2<42> PCIE_PRX_TTX_P2<42> PCIE_PTX_TRX_N2<42> PCIE_PTX_TRX_P2<42> PCIE_PRX_TTX_N3<42> PCIE_PRX_TTX_P3<42> PCIE_PTX_TRX_N3<42> PCIE_PTX_TRX_P3<42> PCIE_PRX_TTX_N4<42> PCIE_PRX_TTX_P4<42> PCIE_PTX_TRX_N4<42> PCIE_PTX_TRX_P4<42> PCIE_PRX_DTX_N5<51> PCIE_PRX_DTX_P5<51> PCIE_PTX_DRX_N5<51> PCIE_PTX_DRX_P5<51> PCIE_PRX_DTX_N6<70> PCIE_PRX_DTX_P6<70> PCIE_PTX_DRX_N6<70> PCIE_PTX_DRX_P6<70> PCIE_PTX_DRX_P7<52> PCIE_PTX_DRX_N7<52> PCIE_PRX_DTX_P7<52> PCIE_PRX_DTX_N7<52> PCIE_PRX_DTX_N8<52> PCIE_PRX_DTX_P8<52> PCIE_PTX_DRX_N8<52> PCIE_PTX_DRX_P8<52>
1
@
T286PAD~D
1
@
T78PAD~D
1
@
T79PAD~D
1
@
T80PAD~D
1
@
T81PAD~D
1
@
T82PAD~D
1
@
T83PAD~D
1
@
T84PAD~D
1
@
T85PAD~D
1
@
T86PAD~D
1
@
T87PAD~D
1
@
T88PAD~D
1
@
T89PAD~D
1
@
T90PAD~D
1
@
T91PAD~D
1
@
T92PAD~D
K34
DMI0_RXN
J35
DMI0_RXP
C33
DMI0_TXN
B33
DMI0_TXP
G33
DMI1_RXN
F34
DMI1_RXP
C32
DMI1_TXN
B32
DMI1_TXP
K32
DMI2_RXN
J32
DMI2_RXP
C31
DMI2_TXN
B31
DMI2_TXP
G30
DMI3_RXN
F30
DMI3_RXP
C29
DMI3_TXN
B29
DMI3_TXP
A25
RSVD1
B25
RSVD2
P24
RSVD3
R24
RSVD4
C26
RSVD5
B26
RSVD6
F26
RSVD7
G26
RSVD8
B27
RSVD9
C27
RSVD10
L26
RSVD11
M26
RSVD12
D29
RSVD13
E28
RSVD14
K29
RSVD15
M29
RSVD16
G17
PCIE1_RXN/USB31_7_RXN
F16
PCIE1_RXP/USB31_7_RXP
A17
PCIE1_TXN/USB31_7_TXN
B17
PCIE1_TXP/USB31_7_TXP
R21
PCIE2_RXN/USB31_8_RXN
P21
PCIE2_RXP/USB31_8_RXP
B18
PCIE2_TXN/USB31_8_TXN
C18
PCIE2_TXP/USB31_8_TXP
K18
PCIE3_RXN/USB31_9_RXN
J18
PCIE3_RXP/USB31_9_RXP
B19
PCIE3_TXN/USB31_9_TXN
C19
PCIE3_TXP/USB31_9_TXP
N18
PCIE4_RXN/USB31_10_RXN
R18
PCIE4_RXP/USB31_10_RXP
D20
PCIE4_TXN/USB31_10_TXN
C20
PCIE4_TXP/USB31_10_TXP
F20
PCIE5_RXN
G20
PCIE5_RXP
B21
PCIE5_TXN
A22
PCIE5_TXP
K21
PCIE6_RXN
J21
PCIE6_RXP
D21
PCIE6_TXN
C21
PCIE6_TXP
B23
PCIE7_TXP
C23
PCIE7_TXN
J24
PCIE7_RXP
L24
PCIE7_RXN
F24
PCIE8_RXN
G24
PCIE8_RXP
B24
PCIE8_TXN
C24
PCIE8_TXP
CNP-H_BGA874
CNP-H
GPP_E9/USB2_OC0# GPP_E10/USB2_OC1# GPP_E11/USB2_OC2# GPP_E12/USB2_OC3#
GPP_F15/USB2_OC4# GPP_F16/USB2_OC5# GPP_F17/USB2_OC6# GPP_F18/USB2_OC7#
USB2_VBUSSENSE
2 OF 13
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9 USB2N_10 USB2P_10 USB2N_11 USB2P_11 USB2N_12 USB2P_12 USB2N_13 USB2P_13 USB2N_14 USB2P_14
USB2_COMP
RSVD_1
USB2_ID
GPD7
PCIE24_TXP PCIE24_TXN PCIE24_RXP PCIE24_RXN PCIE23_TXP PCIE23_TXN PCIE23_RXP PCIE23_RXN PCIE22_TXP PCIE22_TXN PCIE22_RXP PCIE22_RXN PCIE21_TXP PCIE21_TXN PCIE21_RXP PCIE21_RXN
Rev1.0
J3 J2 N13 N15 K4 K3 M10 L9 M1 L2 K7 K6 L4 L3 G4 G5 M6 N8 H3 H2 R10 P9 G1 G2 N3 N2 E5 F6
AH36 AL40 AJ44 AL41 AV47 AR35 AR37 AV43
F4 F3 U13 G3
BE41
G45 G46 Y41 Y40 G48 G49 W44 W43 H48 H47 U41 U40 F46 G47 R44 T43
USB20_N6
1
USB20_P6
1
USB_OC0# USB_OC1# USB_OC2# USB_OC3#
USB_OC4# USB_OC5# USB_OC6# USB_OC7#
USB2_COMP
USB2_VBUSSENSE
1
USB2_ID
TBT_RTD3_WAKE#_GPD 7
T40 PAD~D@
USB20_N1 <71> USB20_P1 <71> USB20_N2 <71> USB20_P2 <71>
USB20_N4 <44> USB20_P4 <44> USB20_N5 <44>
USB20_P5 <44>
T313 PAD~D@ T314 PAD~D@
USB20_N8 <52>
USB20_P8 <52> USB20_N9 <38>
USB20_P9 <38>
USB20_N10 <65>
USB20_P10 <65>
USB20_N11 <38>
USB20_P11 <38>
USB20_N14 <52>
USB20_P14 <52>
Reserve Reserve
RH735 0_0402_5%@
----->JUSB1
----->JUSB2
----->Cypress PD
----->Cypress PD
-----> M.2 2230 (BT)
----->M.2 Slot-2 (WWAN/LTE/HCA)
----->Touch Screen
----->USH
----->Camera
CNVi
Reserve
USB_OC1# <71> USB_OC2# <71>
Reserve
USB_OC4# <44> USB_OC5# <44>
1 2
RH193 113_0402_1%
1 2
RH364 1K_0402_5%
1 2
RH365 0_0402_5%@
1 2
PCIE_PTX_DRX_P24 <68> PCIE_PTX_DRX_N24 <68>
PCIE_PRX_DTX_P24 <68> PCIE_PRX_DTX_N24 <68> PCIE_PTX_DRX_P23 <68> PCIE_PTX_DRX_N23 <68>
PCIE_PRX_DTX_P23 <68> PCIE_PRX_DTX_N23 <68> PCIE_PTX_DRX_P22 <68> PCIE_PTX_DRX_N22 <68>
PCIE_PRX_DTX_P22 <68> PCIE_PRX_DTX_N22 <68>
PCIE_PTX_DRX_P21 <68> PCIE_PTX_DRX_N21 <68>
PCIE_PRX_DTX_P21 <68>
PCIE_PRX_DTX_N21 <68>
----->M.2 Slot-1 (WLAN/BT/WiGig)
----->JUSB1
----->JUSB2
----->TypeC PortA
----->TypeC PortB
TBT_RTD3_WAKE# <18,42>
M.2 SSD Slot#5
USB_OC1# USB_OC2# USB_OC3# USB_OC0#
RH710 10K_0402_5%1 2 RH711 10K_0402_5% RH712 10K_0402_5% RH713 10K_0402_5%1 2
USB_OC4#
RH714 10K_0402_5%
USB_OC5#
RH715 10K_0402_5%
USB_OC6#
RH716 10K_0402_5%
USB_OC7#
RH717 10K_0402_5%1 2
1 2 1 2
1 2 1 2 1 2
RP change to single Resistor
USB_OC3# USB_OC1# USB_OC0# USB_OC2#
TBT_RTD3_WAKE#_GPD 7
HIGH(DEFAULT) LOW
CFL CRB rev0.5 Xtal input High : differential Low : single-end
CNL- PCH EDS rev0.5 External pull-up is required. Recommend 100K if pulled up to 3.3V
1 2 1 2
RH718 15K_0402_5%@
1 2
RH719 15K_0402_5%@
1 2
RH720 15K_0402_5%@ RH721 15K_0402_5%@
RP change to single Resistor
1 2
RH602
Xtal input
100K_0402_5%
differential single-end
+3.3V_ALW_PCH
+3.3V_DSW
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
5
4
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CNP-H(2/9) PCIE,DMI,USB
CNP-H(2/9) PCIE,DMI,USB
CNP-H(2/9) PCIE,DMI,USB
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
15 103
15 103
15 103
1
1.0
1.0
1.0
5
4
3
2
1
UH1G
BE33
CPU_24MHZ_R_D P CH_CPU_NSSC_CLK_D CPU_24MHZ_R_D#
PCH_CPU_BCLK_R_D PCH_CPU_BCLK_R_D#
+1.0V_ALW_PCH
RH123 10K_0201_5%
+3.3V_RUN
RH124 10K_0201_5%
+3.3V_RUN
RH126 10K_0201_5%
+3.3V_RUN
RH127 10K_0201_5%
+3.3V_RUN
RH128 10K_0201_5%
+3.3V_RUN
RH130 10K_0201_5%
+3.3V_RUN
RH131 10K_0201_5%
+3.3V_RUN
RH132 10K_0201_5%
+3.3V_RUN
RH133 10K_0201_5%
+3.3V_RUN
RH134 10K_0201_5%
+3.3V_RUN
CH4
CH5
PCH_RTCX1_R
@
RH43 0_0402_5%
12
YH1
32.768KHZ_12.5PF_9H03200042
1 2
1 2
LAN
TBT
CPU_24MHZ_R_D<7> CPU_24MHZ_R_D#<7>
PCH_CPU_BCLK_R_D<7> PCH_CPU_BCLK_R_D#<7>
CLKREQ_PEG#0<27>
CLKREQ_PCIE#1<70>
CLKREQ_PCIE#2<52>
CLKREQ_PCIE#3<51>
CLKREQ_PCIE#4<42>
CLKREQ_PCIE#6<52>
CLKREQ_PCIE#7<67>
CLKREQ_PCIE#8<67>
CLKREQ_PCIE#9<68>
change from 15P to 18P 1/15
18P_0402_50V8J
18P_0402_50V8J
D D
DGFF
Card reader
M.2 Slot2 WWAN
M.2 Slot1 WLAN
M.2 Slot3
M.2 Slot4
C C
B B
M.2 Slot5
1 2
RH169 0_0402_5%@
1 2
RH170 0_0402_5%@
1 2
RH161 0_0402_5%@
1 2
RH166 0_0402_5%@
pop RH171 for KBL-H pop RH435 for CFL-H , PDG 0.5
RH171 2.7K_0402_1%@
1 2 1 2
RH435
12
12
12
12
12
12
12
12
12
12
1 2
CLKREQ_PEG#0
CLKREQ_PCIE#1
CLKREQ_PCIE#2
CLKREQ_PCIE#3
CLKREQ_PCIE#4
CLKREQ_PCIE#6
CLKREQ_PCIE#7
CLKREQ_PCIE#8
CLKREQ_PCIE#9
CLKREQ_PCIE#10
60.4_0402_1%
PCH_RTCX1
12
RH44 10M_0402_5%
PCH_RTCX2
PCH_CPU_NSSC_CLK_D #
PCH_CPU_BCLK_D PCH_CPU_BCLK_D#
XTAL24_OUT_R1 XTAL24_IN_R1
XCLK_RBIAS
PCH_RTCX1 PCH_RTCX2
FOLLOW X10 H Dell GPIO map
GPP_A16/CLKOUT_48
D7
CLKOUT_CPUNSSC_P
C6
CLKOUT_CPUNSSC#
B8
CLKOUT_CPUBCLK_P
C8
CLKOUT_CPUBCLK#
U9
XTAL_OUT
U10
XTAL_IN
T3
XCLK_BIASREF
BA49
RTCX1
BA48
RTCX2
BF31
GPP_B5/SRCCLKREQ0#
BE31
GPP_B6/SRCCLKREQ1#
AR32
GPP_B7/SRCCLKREQ2#
BB30
GPP_B8/SRCCLKREQ3#
BA30
GPP_B9/SRCCLKREQ4#
AN29
GPP_B10/SRCCLKREQ5#
AE47
GPP_H0/SRCCLKREQ6#
AC48
GPP_H1/SRCCLKREQ7#
AE41
GPP_H2/SRCCLKREQ8#
AF48
GPP_H3/SRCCLKREQ9#
AC41
GPP_H4/SRCCLKREQ10#
AC39
GPP_H5/SRCCLKREQ11#
AE39
GPP_H6/SRCCLKREQ12#
AB48
GPP_H7/SRCCLKREQ13#
AC44
GPP_H8/SRCCLKREQ14#
AC43
GPP_H9/SRCCLKREQ15#
V2
CLKOUT_PCIE_N15
V3
CLKOUT_PCIE_P15
T2
CLKOUT_PCIE_N14
T1
CLKOUT_PCIE_P14
AA1
CLKOUT_PCIE_N13
Y2
CLKOUT_PCIE_P13
AC7
CLKOUT_PCIE_N12
AC6
CLKOUT_PCIE_P12
CNP-H_BGA874
XTAL24_IN_R1
XTAL24_OUT_R1
RH152 0_0201_5%
CNP-H
CLKOUT_ITPXDP#
CLKOUT_ITPXDP_P
CLKOUT_CPUPCIBCLK#
CLKOUT_CPUPCIBCLK_P
CLKOUT_PCIE_N0 CLKOUT_PCIE_P0
CLKOUT_PCIE_N1 CLKOUT_PCIE_P1
CLKOUT_PCIE_N2 CLKOUT_PCIE_P2
CLKOUT_PCIE_N3 CLKOUT_PCIE_P3
CLKOUT_PCIE_N4 CLKOUT_PCIE_P4
CLKOUT_PCIE_N5 CLKOUT_PCIE_P5
CLKOUT_PCIE_N6 CLKOUT_PCIE_P6
CLKOUT_PCIE_N7 CLKOUT_PCIE_P7
CLKOUT_PCIE_N8 CLKOUT_PCIE_P8
CLKOUT_PCIE_N9 CLKOUT_PCIE_P9
CLKOUT_PCIE_N10
CLKOUT_PCIE_P10
CLKOUT_PCIE_N11
CLKOUT_PCIE_P11
7 OF 13
CLKIN_XTAL
1 2
RH436 0_0201_5%
1 2
Rev1.0
Y3 Y4
B6 A6
AJ6 AJ7
AH9 AH10
AE14 AE15
AE6 AE7
AC2 AC3
AB2 AB3
W4 W3
W7 W6
AC14 AC15
U2 U3
AC9 AC11
AE9 AE11
R6
12
XTAL24_IN_R
RH153 1M_0402_1%
Remove RH437
PCH_XDP_CLK_DN_R PCH_XDP_CLK_DP_R
PCH_CPU_PCIBCLK_D# PCH_CPU_PCIBCLK_D
RH110 10K_0402_5%
1 2
XTAL24_OUT
1 2
RH154 0_0402_5%@
1 2
RH155 0_0402_5%@
1 2
RH168 0_0402_5%@
1 2
RH167 0_0402_5%@
CLK_PEG_N0 <27> CLK_PEG_P0 <27>
CLK_PCIE_N1 <70> CLK_PCIE_P1 <70>
CLK_PCIE_N2 <52> CLK_PCIE_P2 <52>
CLK_PCIE_N3 <51> CLK_PCIE_P3 <51>
CLK_PCIE_N4 <42> CLK_PCIE_P4 <42>
CLK_PCIE_N6 <52> CLK_PCIE_P6 <52>
CLK_PCIE_N7 <67> CLK_PCIE_P7 <67>
CLK_PCIE_N8 <67> CLK_PCIE_P8 <67>
CLK_PCIE_N9 <68> CLK_PCIE_P9 <68>
REFCLK_CNV <52>
XTAL downsize
YH2 24MHZ_12PF_8Y24000034
DGFF
Card reader
M.2 Slot2 WWAN
LAN
TBT
M.2 Slot1 WLAN
M.2 Slot3
M.2 Slot4
M.2 Slot5
M.2 Slot6
123
4
PCH_XDP_CLK_DN PCH_XDP_CLK_DP
PCH_CPU_PCIBCLK_R_D# PCH_CPU_PCIBCLK_R_D
PCH_XDP_CLK_DN <7> PCH_XDP_CLK_DP <7>
PCH_CPU_PCIBCLK_R_D# <7> PCH_CPU_PCIBCLK_R_D <7>
follow intel CFL-H PDG rev0.5, but CRB rev0.5
1
CH14
15P_0402_50V8J
2
CH13 change from 12P to 15P
1
CH13 15P_0402_50V8J
2
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CNP-H(3/9) CLK
CNP-H(3/9) CLK
CNP-H(3/9) CLK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
16 103
16 103
16 103
1.0
1.0
1.0
5
4
3
2
1
+3.3V_ALW_PC H
100K_0402_ 5%
RTC_DET#
TOUCH_SCR EEN_PD#
TOUCHPAD_INTR #
SIO_EXT_SMI#
RTD3_CIO_PW R_EN
3.3V_CAM_EN#
PCH_SPI_D2_XDP<7>
CFL-H PDG rev0.7 pop 20K for SPI0_IO2/3
CNL- PCH EDS rev0.5 Reserved External pull-up is required. Recommend 100K if pulled up to 3.3V
Change to 1K 3/29
RH180 1K_0402_5%XDP@
Change net location from EC to PCH GPP_D3
PCH_SPI_D0<7>
1 2
PCH_SPI_CS#2<65>
WWAN_FULL_PWR_ EN<52>
3.3V_CAM_EN#< 38>
RTC_DET#<8 4>
1
PME#
T178PAD~D @
1
T60PAD~D @
1
T61PAD~D @
1
T63PAD~D @
1
T62PAD~D @
PCH_SPI_D0 PCH_SPI_D1 PCH_SPI_CS#0 PCH_SPI_CLK PCH_SPI_CS#1
PCH_SPI_D2PCH_SPI_D2_XDP PCH_SPI_D3
Add WWAN_FULL_PWR_EN 3/6 Change net name 3/20
WWAN_FU LL_PWR_EN RTC_DET#
3.3V_CAM_EN#
Change net location from BE41 to BE18
PCH_SPI_D1_R1<65> PCH_SPI_D0_R1<65> PCH_SPI_CLK_R1<65>
PCH_PLTRS T#
BE36
R15 R13
AL37
AN35
AU41
BA45
AY47 AW47 AW48
AY48
BA46
AT40
BE19
BF19
BF18
BE18
BC17 BD17
PCH_SPI_D1_R1 PCH_SPI_D0_R1 PCH_SPI_CLK_R1 PCH_SPI_D3_R1
PCH_SPI_D1_R1 PCH_SPI_D1_1_R PCH_SPI_D0_R1 PCH_SPI_CLK_R1 PCH_SPI_D3_R1
1 2
RH310 10 K_0402_5%LPC@
1 2
RH730 10 K_0402_5%LPC@
FOLLOW X10 H Dell GPIO map
1 2
D D
+3.3V_RUN
C C
9/5 MOW Option 1: Implement a 1 kOhm pull-down resistor on the signal and de-populate the required 1 kOhm pull-up resistor. In this case, customers must ensure that the SPI flash device on the platform has HOLD functionality disabled by default.
Note that the pull down resistor on SPI0_IO3 is only needed for SKL U/Y platforms with ES and SKL S/H platforms with pre-ES1/ES1 samples.
RH736
1 2
RH734 10 K_0402_5%
for RTC_DET#
TOUCH_SCREEN_PD# don't move to RPC,
1 2
RH348 10K_ 0402_5%@
1 2
RH402 10K_ 0402_5%
+3.3V_SPI
GPP_H12
1 2
2.2K_0402_5 %@
RH615
eSPI Flash sharing mode (GPP_H12) 0 = Master Attached Flash Sharing (MAFS) enabled (Default) 1 = Slave Attached Flash Sharing (SAFS) enabled.
RH601
RH600
RH30 20K_0402_ 5%
RH335 20K_040 2_5%
RH334 1K_0402 _5%@
1 2
1 2
1 2
1 2
1 2
GPP_H15
100K_0402_ 5%
PCH_SPI_D0
100K_0402_ 5%
PCH_SPI_D2
PCH_SPI_D3
PCH_SPI_D3
+3.3V_ALW_PC H
5
1
IN1
VCC
4
OUT
2
IN2
GND
3
UH7
MC74VHC1G08D FT2G_SC70-5
1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
CNP-H
1 OF 13
UH1A
GPP_A11/PME#/SD_VDD2_PWR_EN#
RSVD2 RSVD1
VSS TP
SPI0_MOSI SPI0_MISO SPI0_CS0# SPI0_CLK SPI0_CS1#
SPI0_IO2 SPI0_IO3 SPI0_CS2#
GPP_D1/SPI1_CLK/SBK1_BK1 GPP_D0/SPI1_CS#/SBK0_BK0 GPP_D3/SPI1_MOSI/SBK3_BK3 GPP_D2/SPI1_MISO/SBK2_BK2 GPP_D22/SPI1_IO3 GPP_D21/SPI1_IO2
CNP-H_BGA874
RH722 33_0402_5 % RH723 33_0402_5 % RH724 33_0402_5 % RH725 33_0402_5 %
RH726 33_0402_5 %@ RH727 33_0402_5 %@ RH728 33_0402_5 %@ RH729 33_0402_5 %@
PCH_PLTRS T#_AND
12
RH65
@
GPP_B13/PLTRST#
GPP_K16/GSXCLK
GPP_K12/GSXDOUT
GPP_K13/GSXSLOAD
GPP_K14/GSXDIN
GPP_K15/GSXSRESET#
GPP_E3/CPU_GP0 GPP_E7/CPU_GP1 GPP_B3/CPU_GP2 GPP_B4/CPU_GP3
GPP_H18/SML4ALERT#
GPP_H17/SML4DATA
GPP_H16/SML4CLK
GPP_H15/SML3ALERT#
GPP_H14/SML3DATA
GPP_H13/SML3CLK
GPP_H12/SML2ALERT#
GPP_H11/SML2DATA
GPP_H10/SML2CLK
PCH_SPI_D1_0_R PCH_SPI_D0_0_R PCH_SPI_CLK_0_R PCH_SPI_D3_0_R
PCH_SPI_D0_1_R PCH_SPI_CLK_1_R PCH_SPI_D3_1_R
100K_0402_5%
INTRUDER#
Rev1.0
1 2
RH619 0_0402_5%@
1
CH350
2
ESD@
0.047U_0201_10V6K
AV29
Y47 Y46 Y48 W46 AA45
AL47 AM45 BF32 BC33
AE44 AJ46 AE43 AC47 AD48 AF47 AB47 AD47 AE48
BB44
1 2
RH622 0_0402_5%@
PCH_PLTRS T#
SIO_EXT_SMI# TOUCH_SCR EEN_PD# TOUCHPAD_INTR #
RTD3_CIO_PW R_EN
GPP_H15
GPP_H12
PCH_INTRUDE R_HDR#
FOLLOW X10 H Dell GPIO map
PCH_PLTRST#_R < 42,52,67,68>
PLTRST_T PM#
1
CH349
2
ESD@
0.047U_0201_10V6K
TOUCH_SCREEN_PD# < 38>
TOUCHPAD_INTR # <58,62>
TOUCH_SCREEN_DET# <38>
RTD3_CIO_PWR_EN <42 >
RH623
@
RH624 0_0201_5%@ RH625 0_0201_5%@ RH626 0_0201_5%@
+RTC_CEL L_PCH
1 2
12
RH198 1M_0402_5 %
12 12 12
0_0201_5%
PLTRST_TPM# <65> PLTRST_LAN# <51> PLTRST_GPU# <27> PLTRST_MMI# <70>
PCH Signal Glitch Free Implementation Requirements
PCH_PLTRS T#
PCH_SPI_CLK
RH641 100K_0201_5%@
RH640 100K_0201_5%@
1 2
1 2
RP change to single Resistor
256Mb Flash ROM
PCH_SPI_CS#0_R1
B B
ESPI LPC
RH37 0_0402_5%@
RH351
1 2
1 2
33_0402_5 %
PCH_SPI_CS#0_R2 PCH_SPI_D1_0_R PCH_SPI_D3_0_R PCH_SPI_D2_0_R
15 ohm33 ohmRH351
RPC1
RH178,RH179,RH181, RH182,RH183,RH184
A A
0 ohm
15 ohm33 ohm
25 ohm
PCH_SPI_CS#0_R1
PCH_SPI_CLK_0_RPCH_SPI_CLK_1_R
33_0402_5%
@EMI@
12
RH28
33P_0402_50V8J
@EMI@
12
CH321
33_0402_5%
@EMI@
12
RH29
33P_0402_50V8J
@EMI@
12
CH322
PCH_SPI_D2_R1
RH352 0_0402_5%@
RH353 33_0402_5 %@
1 2
1 2
PCH_SPI_CS#0_R3
PCH_SPI_D1_1_R PCH_SPI_D3_1_R
PCH_SPI_D2_1_R
UC5
1
CS#
2
DO
3
IO2
4
GND
ThemalPad
W25Q256J VEIQ_WSON8_8X6
reserve SO8 Flash ROM for colay
UC6
@
1
CS#
2
RESET#/SIO3
SO/SIO1
3
WP#/SIO2
4
GND
MX25L25645GM2 I-10G_SO8
VCC
SCLK
SI/SIO0
IO3
CLK
VCC
DI
+3.3V_SPI
8 7
PCH_SPI_CLK_0_RPCH_SPI_D2_R1
6
PCH_SPI_D0_0_R
5 9
+3.3V_SPI
8
7
PCH_SPI_CLK_1_R
6
PCH_SPI_D0_1_R
5
CH9
1 2
0.1U_0201_ 10V6K
CH270
@
1 2
0.1U_0201_ 10V6K
+3.3V_SPI
+3.3V_ALW_PC H
12
12
12
12
12
12
12
12
RH1850_0402_5%
RH1770_0201_5% @
RH1784.99_0402_1%
RH1794.99_0402_1%
RH1814.99_0402_1%
RH1820_0201_5% @
RH1834.99_0402_1%
RH1844.99_0402_1%
PCH_SPI_CS#1_ R1
PCH_SPI_CS#1
PCH_SPI_D0_R1
PCH_SPI_D0
PCH_SPI_D1_R1
PCH_SPI_D1
PCH_SPI_CLK_R 1
PCH_SPI_CLK
PCH_SPI_CS#0_ R1
PCH_SPI_CS#0
PCH_SPI_D2_R1
PCH_SPI_D2
PCH_SPI_D3_R1
PCH_SPI_D3
CONN@
JSPI1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
GND1
22
GND2
CVILU_CF5020FD0 R0-05-NH
CIS link OK
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CNP-H(4/9) SPI,PLTRST
CNP-H(4/9) SPI,PLTRST
CNP-H(4/9) SPI,PLTRST
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
17 103
17 103
17 103
1.0
1.0
1.0
+3.3V_ALW_PC H
1 2
RH56 1K_0 402_5%
1 2
RH57 1K_0 402_5%
1 2
RH67 49 9_0402_1%
1 2
RH77 49 9_0402_1%
1 2
RH80 1K_ 0402_5%
1 2
RH81 1K_ 0402_5%
1 2
RH731 10 K_0402_5%
D D
correct status is 10K 3/29
+3.3V_ALW_PC H
1 2
RH61 4.7K _0402_5%
TLS CONFIDENTIALITY HIGH LOW(DEFAULT)
+3.3V_ALW_PC H
1 2
RH78 4.7K _0402_5%ESPI@
EC interface HIGH LOW(DEFAULT)
+3.3V_ALW_PC H
1 2
RH86 4.7K _0402_5%@
TOP SWAP STRAP HIGH LOW(DEFAULT)
C C
+3.3V_ALW_PCH
1 2
RC74 10K_0402_5%
Add pull down 75K
If USB 3.0 Port 1 is used for 4-wire DCI.OOB (BSSB), and alternate functionality is also used on the pin, pull up to V3.3S with >100K resistor to avoid noise.
B B
If USB 3.0 Port 1 is used for DCI.OOB (BSSB) 4-wire BSSB, and NO alternate functionalityis used, leave float.
If DCI.OOB (BSSB) 2+2 functionality is used, pull up to V3.3S with a 4.7K resistor.
1 2
CH41 1U_0 201_6.3V6M
1 2
CH40 1U_0 201_6.3V6M
PCH_RTCRST#<19,58>
1
1
CMOS1 SHORT PADS~D@
RH215
NO Support Deep sleep
POP
Support Deep sleep
DE-POP
1 2
RH215 0_0402_ 5%
@NDS3@
100K_0402_5%
0.01U_0402_16V7K
12
1
A A
@
RH308
CH266
2
5
MEM_SMBCLK
MEM_SMBDATA
SML0_SMBCLK
SML0_SMBDATA
SML1_SMBCLK
SML1_SMBDATA
TBT_RTD 3_WAKE#_R
PCH_SMB_ALERT #
ENABLE DISABLE
GPP_C5
ESPI LPC
SPKR
ENABLE DISABLE
KB_DET#
12
RH61775K_0402_5 %
12
RH73375K_0402_5 %
GPP_B23
WEAK INTERNAL PD ~20K
Intel DCI-OOB
HIGH LOW(DEFAULT)
2
2
PCH_RSMRST #_ANDPCH_DPW ROK
5
CNV_RF_RESET#
CLKREQ_CNV
+3.3V_ALW_PCH
ENABLED DIABLED
SRTCRST#
PCH_RTCR ST#
10K_0402_5%
12
RC75
JUSB1
WWAN
JUSB2
1 2
RF@
HDA_BIT_CLK_R<56>
HDA_SDIN0<56>
HDA_SDOUT_R<56>
HDA_SYNC_R<56> HDA_RST#_R<56>
AUD_AZACPU_SDO<9 > AUD_AZACPU_SDI_R<9> AUD_AZACPU_SCLK<9>
RH329 150K_0402_ 5%
1 2
HDA_SDIN0 HDA_SYNC HDA_SDOUT
@
2P_0402_50V8C
12
CA73
place close to UH1 place close to UH1 place close to UH1 place close to UH1
Service Mode Switch: Add a switch to ME_FWP signal to unlock the ME region and allow the entire region of the SPI flash to be updated using FPT.
12
de-pop for MP 3/6
RH101
@
1K_0402_5%
pop for MP 3/6
ME_FWP
ME_FWP<58>
+3.3V_ALW_PCH
ME_FWP PCH has internal 20K PD. (suspend power rail)
FLASH DESCRIPTOR SECURITY OVERRIDE
LOW = ENABLE (DEFAULT) -->Pin1 & Pin3 short HIGH = DISABLE (ME can update) -->Pin2 & Pin3 short
CH268 47P_0 402_50V8J
ME_FWP_PC H
+RTC_CEL L_PCH
@
2P_0402_50V8C
12
CA74
ME_FWP_PCH
1 2
RH100 0_04 02_5%@
PT,ST pop RH101 and SW1; MP pop RH100
ME_FWP_PCH
4
USB3_PTX_DR X_N1<71> USB3_PTX_DR X_P1<71> USB3_PRX_DT X_N1<71> USB3_PRX_DT X_P1<71>
USB3_PTX_DR X_N2<52> USB3_PTX_DR X_P2<52> USB3_PRX_DT X_N2<52> USB3_PRX_DT X_P2<52>
USB3_PTX_DR X_P3<71> USB3_PTX_DR X_N3<71> USB3_PRX_DT X_P3<71> USB3_PRX_DT X_N3<71>
RH46 33_0402_5%EMI@
RH45 33_0402_5% RH328 1K_0402_5% RH48 33_0402_5% RH50 33_0402_5%
RH39 30 _0402_5%
RH38 30 _0402_5%
CLKREQ_CNV<52>
CNV_RF_RESET#<52>
RH200 20 K_0402_5% RH201 20 K_0402_5%
SW1
@
1
A
2
B
3
C
4
G1
5
G2
SS3-CMFTQR9_ 3P
4
1 2
1 2 1 2 1 2 1 2
1 2
1 2
T269
IR_CAM_DET#<38 > DGPU_PWR OK<27,58>
KB_DET#<62>
1 2 1 2
PCH_PWR OK<90> PCH_RSMRST #_AND<7,62>
PCH_DPW ROK<58>
SML0_SMBCLK<42,51> SML0_SMBDATA<42,51>
SML1_SMBCLK<58> SML1_SMBDATA<58>
@
PAD~D
USB3_PTX_DR X_P3 USB3_PTX_DR X_N3 USB3_PRX_DT X_P3 USB3_PRX_DT X_N3
1 2
RH637 100K_02 01_5%@
1 2
RH636 100K_02 01_5%@
CLKREQ_CNV
CNV_RF_RESET#
1
PCH_DPW ROK PCH_SMB_ALERT # MEM_SMBCLK MEM_SMBDATA GPP_C5 SML0_SMBCLK SML0_SMBDATA GPP_B23 SML1_SMBCLK SML1_SMBDATA
@
2P_0402_50V8C
12
CA76
HDA_BIT_CLK HDA_SDIN0 HDA_SDOUT
HDA_SYNC HDA_RST#
AUD_AZACPU_SDO_RAUD_AZACPU_SDO
AUD_AZACPU_SCLK_RAUD_AZACPU_SCLK
TBT_PW R_EN IR_CAM_DET#
KB_DET#
PCH_RTCR ST# SRTCRST#
PCH_PWR OK PCH_RSMRST #_AND
MEM_SMBCLK
MEM_SMBDATA
UH1F
F9
USB31_1_TXN
F7
USB31_1_TXP
D11
USB31_1_RXN
C11
USB31_1_RXP
C3
USB31_2_TXN
D4
USB31_2_TXP
B9
USB31_2_RXN
C9
USB31_2_RXP
C17
USB31_6_TXN
C16 G14
F14 C15 B15
J13 K13
G12
F11 C10 B10
C14 B14
J15 K16
CNP-H_BGA874
BD11
BE11 BF12
BG13
BE10 BF10 BE12
BD12
AM2 AN3 AM3
AV18
AW18
BA17 BE16 BF15
BD16
AV16
AW15
BE47
BD46
AY42 BA47
AW41
BE25 BE26 BF26 BF24 BF25 BE24
BD33
BF27 BE27
+3.3V_RUN
QH4B L2N7002DW 1T1G_SC88-6
GPP_A14/SUS_STAT#/ESPI_RESET# USB31_6_TXP USB31_6_RXN USB31_6_RXP USB31_5_TXN USB31_5_TXP USB31_5_RXN USB31_5_RXP
USB31_3_TXP USB31_3_TXN USB31_3_RXP USB31_3_RXN
USB31_4_TXP USB31_4_TXN USB31_4_RXP USB31_4_RXN
UH1D
HDA_BCLK/I2S0_SCLK HDA_SDI0/I2S0_RXD HDA_SDO/I2S0_TXD HDA_SYNC/I2S0_SFRM
HDA_RST#/I2S1_SCLK HDA_SDI1/I2S1_RXD I2S1_TXD/SNDW2_DATA I2S1_SFRM/SNDW2_CLK
HDACPU_SDO HDACPU_SDI HDACPU_SCLK
GPP_D8/I2S2_SCLK GPP_D7/I2S2_RXD GPP_D6/I2S2_TXD/MODEM_CLKREQ GPP_D5/I2S2_SFRM/CNV_RF_RESET# GPP_D20/DMIC_DATA0/SNDW4_DATA GPP_D19/DMIC_CLK0/SNDW4_CLK GPP_D18/DMIC_DATA1/SNDW3_DATA GPP_D17/DMIC_CLK1/SNDW3_CLK
RTCRST# SRTCRST#
PCH_PWROK RSMRST#
DSW_PWROK GPP_C2/SMBALERT# GPP_C0/SMBCLK GPP_C1/SMBDATA GPP_C5/SML0ALERT# GPP_C3/SML0CLK GPP_C4/SML0DATA GPP_B23/SML1ALERT#/PCHHOT# GPP_C6/SML1CLK GPP_C7/SML1DATA
CNP-H_BGA874
VCCDSW_EN_GPIO<20 >
VCCDSW_EN<58>
ALW_PWR GD_3V_5V<43,62,8 6>
2
5
QH4A L2N7002DW 1T1G_SC88-6
43
3
For DATA lines: microstrip routing, R1 = 15 Ohm. Otherwise, R1 = 0 Ohm For Clock line: R1 = 33 Ohm
CNP-H
GPP_A1/LAD0/ESPI_IO0 GPP_A2/LAD1/ESPI_IO1 GPP_A3/LAD2/ESPI_IO2 GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS0#
GPP_A6/SERIRQ/ESPI_CS1#
GPP_A7/PIRQA#/ESPI_ALERT0#
GPP_A0/RCIN#/ESPI_ALERT1#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
GPP_K19/SMI# GPP_K18/NMI#
GPP_E6/SATA_DEVSLP2 GPP_E5/SATA_DEVSLP1 GPP_E4/SATA_DEVSLP0
GPP_F9/SATA_DEVSLP7 GPP_F8/SATA_DEVSLP6 GPP_F7/SATA_DEVSLP5 GPP_F6/SATA_DEVSLP4 GPP_F5/SATA_DEVSLP3
6 OF 13
GPP_A12/BM_BUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
16
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Rev1.0
CNP-H
GPP_B1/GSPI1_CS1#/TIME_SYNC1
GPP_A13/SUSWARN#/SUSPW RDNACK
4 OF 13
1 2
RH445 0_0402_ 5%@
DDR_XDP_W AN_SMBCLK <7,23 ,24,25,26,54>
DDR_XDP_W AN_SMBDAT <7,23,24,2 5,26,54>
Issued Date
Issued Date
Issued Date
571391_CFL_H_PDG_Rev1p8 Table 26-2. 9/5
ESPI_IO0_R
BB39
ESPI_IO1_R
AW37
ESPI_IO2_R
AV37
ESPI_IO3_R
BA38
BE38
ESPI_ALERT#
AW35 BA36
SIO_RCIN#
BE39
ESPI_RESET#
BF38
ESPI_CLK
BB36
PCI_CLK_LPC1
BB34
T48
TBT_RTD 3_WAKE#_R
T47
AH40 AH35 AL48 AP47 AN37 AN46 AR47 AP48
BF36
SYS_PWROK
WAKE#
GPD6/SLP_A#
SLP_LAN#
SLP_SUS#
SYS_RESET#
CPUPWRGD
ITP_PMODE PCH_JTAGX
DH1
DH2
2016/01/01
2016/01/01
2016/01/01
Rev1.0
21
AV32
BF41
BD42
BB46 BE32 BF33 BE29 R47 AP29 AU3
BB47 BE40 BF40 BC28 BF42 BE42 BC42
BE45 BF44 BE35 BC37
BG44 BG42 BD39 BE46 AU2 AW29 AE3
AL3 AH4 AJ4 AH3 AH2 AJ3
SIO_SLP_SUS#
VCCDSW_EN _Q
GPP_A8/CLKRUN#
GPD11/LANPHYPC
GPD9/SLP_WLAN#
DRAM_RESET#
GPP_B2/VRALERT#
GPP_B0/GSPI0_CS1#
GPP_K17/ADR_COMPLETE
GPP_B11/I2S_MCLK
GPP_B12/SLP_S0#
GPD4/SLP_S3# GPD5/SLP_S4#
GPD10/SLP_S5#
GPD8/SUSCLK
GPD0/BATLOW#
GPP_A15/SUSACK#
GPD2/LAN_WAKE#
GPD1/ACPRESENT
GPD3/PWRBTN#
GPP_B14/SPKR
PCH_JTAG_TMS PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TCK
NDS3@
2 1
RB751S-40_S OD523-2
NDS3@
RB751S-40_S OD523-2
For DS3: Pop RE349, RE536, RH439, RH441, RH443 Depop DH1, RH215, RH440, RH442
For NDS3 : Pop DH1, RH215, RH440, RH442 Depop RE349, RE536, RH439, RH441, RH443
RC366 15_0402_5% RC367 15_0402_5% RC368 15_0402_5% RC369 15_0402_5%
RH97 33_0402_5%EMI@ RH99 22_0402_5%@
RH732 0_04 02_5%@
FOLLOW X10 H Dell GPIO map
SLOT3_DEVSLP <67>
SLOT4_DEVSLP <67>
CLKRUN#
VRALERT#
SYS_PWROK
PCH_PCIE_W AKE# SIO_SLP_A# SIO_SLP_LAN#
SUSCLK PCH_BATLOW # SUSACK#_R ME_SUS_PW R_ACK_R
LAN_WAKE# AC_PRESENT
SYS_RESET# SPKR
PCH_JTAGX PCH_JTAG_TMS PCH_JTAG_TD O PCH_JTAG_TD I PCH_JTAG_TC K
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
1 2 1 2 1 2 1 2
1 2 1 2
CHECK,LPC_CLK FOR DEBUG CARD?
CHECK,LPC_CLK FOR DEBUG CARD?
1 2
@
RH443
RH441 0_0402_5%
1 2
DS3@
1 2
RH442 0_0402_5%
@NDS3@
Deciphered Date
Deciphered Date
Deciphered Date
2
ESPI_IO0 <58,59> ESPI_IO1 <58,59> ESPI_IO2 <58,59> ESPI_IO3 <58,59>
ESPI_CS# <58,59> ESPI_ALERT# <58>
ESPI_RESET# <58,59>
ESPI_CLK_5105 <58,59>
TBT_RTD3_WAKE# <15,42>
PM_LANPHY_ENABLE <51>
SIO_SLP_WLAN# <5 4,58>
DDR4_DRAMR ST#_PCH <23>
MACO_EN <27>
SYS_PWROK <7,58 >
PCH_PCIE_W AKE# <42,58,59> SIO_SLP_A# <19,58> SIO_SLP_LAN# <54,58> SIO_SLP_S0# <14,19,65> SIO_SLP_S3# <19,42,59> SIO_SLP_S4# <11,19,88> SIO_SLP_S5# <19>
SUSCLK < 52,67,68>
1 2
1
PAD~D
CFL-H CRB rev0.5
LAN_WAKE# <51,58> AC_PRESENT <58> SIO_SLP_SUS# <58> SIO_PWRBTN# <7,58> SYS_RESET# <15,19> SPKR <56> H_PWRGD <7>
ITP_PMODE_CPU <7> PCH_JTAGX <7> PCH_JTAG_TMS <7> PCH_JTAG_TD O <7> PCH_JTAG_TD I <7> PCH_JTAG_TC K <7>
2017/01/01
2017/01/01
2017/01/01
0_0402_5%
@
T319
PCH_PRIM_EN <11,22,89>
SIO_SLP_S3#
CH341 0.033U _0402_16V7@
SIO_SLP_S4#
CH342 0.033U _0402_16V7@
SIO_SLP_A#
CH343 0.033U _0402_16V7@
SIO_SLP_WLAN#
CH344 0.033U _0402_16V7@
SIO_SLP_SUS#
CH345 0.033U _0402_16V7@
SIO_SLP_LAN#
CH346 0.033U _0402_16V7@
SIO_SLP_S5#
CH347 0.033U _0402_16V7@
ESPI_RESET#
CH348 0.033U _0402_16V7@
1
ESPI_RESET#
ESPI_ALERT#
SUSACK#_R
1 2
RH95 10K_0402_ 5%@
1 2
RH340 8.2K_040 2_1%
1 2
RH327 1K_0402 _5%@
SYS_RESET#
ESD Request:place near PCH side
RF Request
SML0_SMBCLK
SML1_SMBCLK
MEM_SMBCLK
VRALERT#
SIO_SLP_LAN#
PCH_PCIE_W AKE#
LAN_WAKE#
SUSACK# <58>
PCH Signal Glitch Free Implementation Requirements
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
PCH_BATLOW #
AC_PRESENT
SIO_RCIN#
CLKRUN#
SYS_PWROK
IR_CAM_DET#
PCH_JTAG_TC K
PCH_PWR OK
SUSCLK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
DDR_XDP_WAN_SMBDAT
DDR_XDP_WAN_SMBCLK
SIO_SLP_S3#
SIO_SLP_S4#
SIO_SLP_A#
SIO_SLP_WLAN#
SIO_SLP_SUS#
SIO_SLP_LAN#
SIO_SLP_S5#
ESPI_RESET#
1 2
CC318@RF@ 33P_04 02_50V8J
1 2
CC319@RF@ 33P_04 02_50V8J
1 2
CC320@RF@ 33P_04 02_50V8J
Place close PCH side
1 2
RH203 10K_040 2_5%@
1 2
RH204 10K_040 2_5%@
1 2
RH92 1K_0201_5 %
1 2
RH93 10K_ 0201_5%
1 2
RH94 8.2K_0402_5 %
1 2
RH243 10K_040 2_5%
1
PAD~D
1
PAD~D
1 2
RH199 100K_04 02_5%
1 2
RH373 100K_04 02_5%
1 2
RH313 51_0402 _5%@
1 2
RH424 10K_040 2_5%@
1 2
RH83 1K_0402_5 %@
1 2
RH312 51_04 02_5%
1 2
RH314 51_04 02_5%
1 2
RH315 51_04 02_5%
1 2
RH374 2.2K_ 0402_5%
1 2
RH333 2.2K_ 0402_5%
1 2
RH634 100K_ 0201_5%@
1 2
RH635 100K_ 0201_5%@
1 2
RH638 100K_ 0201_5%@
1 2
RH629 100K_ 0201_5%@
1 2
RH639 100K_ 0201_5%@
1 2
RH631 100K_ 0201_5%@
1 2
RH632 100K_ 0201_5%@
1 2
RH633 75K_0201_5%@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CNP-H(5/9) USB,HDA,SMB
CNP-H(5/9) USB,HDA,SMB
CNP-H(5/9) USB,HDA,SMB
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
18 103
18 103
18 103
+3.3V_1.8V_GPPA
@ESD@
0.1U_0201_25V6K
12
CC302
+3.3V_ALW_PCH
+3.3V_DSW
+3.3V_RUN
@
T317
@
T318
+1.0V_VCCSTG
+3.3V_RUN
1.0
1.0
1.0
5
+3.3V_RUN
1 2
RH378 10K_0 402_5%
1 2
RH375 100K_ 0402_5%@
1 2
RH360 49.9K_0 402_1%@
1 2
D D
RH361 49.9K_0 402_1%@
1 2
RH355 10K_0 402_1%
1 2
RH339 10K_0 402_5%
1 2
RH331 4.7K_04 02_5%@
PCH STRAPS IF SAMPLED HIGH[ NO REBOOT ]
+3.3V_ALW_PCH
1 2
RH309 10K_0 402_5%
1 2
RH330 49.9K_0 402_1%
1 2
RH376 49.9K_0 402_1%
1 2
RH1 100K_0402_5%
FFS_INT2
PCH_3.3V_TS_ EN
UART2_TXD
UART2_RXD
HDD_FALL_INT
SIO_EXT_SCI#
NRB_BIT
SIO_EXT_WAKE#
UART2_TXD
UART2_RXD
CPU_EDP_HP D
PCH_3.3V_TS_ EN<38>
RC561 0_0402_5%@
TPM_PIRQ#< 65>
8/20
RC560 0_ 0402_5%
MEDIACARD_IRQ#<70>
SBIOS_TX<59>
LCD_CBL_D ET#<38>
SIO_EXT_WAKE#<5 8>
UART2_TXD<44>
UART2_RXD<44 >
I2C1_SCK_TP<6 2> I2C1_SDA_TP<6 2>
T307 T306
TBT_FORCE_ PWR<42>
FFS_INT2<54>
4
BBS_BIT6
NRB_BIT
TPM_PIRQ#_R
TBT_ID
TYPEC_CON_SEL 2 TYPEC_CON_SEL 1
Align BH 1/221
LCD_CBL_D ET#
SIO_EXT_WAKE#
UART2_TXD UART2_RXD
1 1
FFS_INT2
SIO_EXT_SCI# HDD_FALL_INT
12
HDD_FALL_INT<54>
12
@
PAD~D
@
PAD~D
UH1K
BA26
GPP_B22/GSPI1_MOSI
BD30
GPP_B21/GSPI1_MISO
AU26
GPP_B20/GSPI1_CLK
AW26
GPP_B19/GSPI1_CS0#
BE30
GPP_B18/GSPI0_MOSI
BD29
GPP_B17/GSPI0_MISO
BF29
GPP_B16/GSPI0_CLK
BB26
GPP_B15/GSPI0_CS0#
BB24
GPP_C9/UART0A_TXD
BE23
GPP_C8/UART0A_RXD
AP24
GPP_C11/UART0A_CTS#
BA24
GPP_C10/UART0A_RTS#
BD21
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
AW24
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
AP21
GPP_C13/UART1_TXD/ISH_UART1_TXD
AU24
GPP_C12/UART1_RXD/ISH_UART1_RXD
AV21
GPP_C23/UART2_CTS#
AW21
GPP_C22/UART2_RTS#
BE20
GPP_C21/UART2_TXD
BD20
GPP_C20/UART2_RXD
BE21
GPP_C19/I2C1_SCL
BF21
GPP_C18/I2C1_SDA
BC22
GPP_C17/I2C0_SCL
BF23
GPP_C16/I2C0_SDA
BE15
GPP_D4/ISH_I2C2_SDA/I2C3_SDA/SBK4_BK4
BE14
GPP_D23/ISH_I2C2_SCL/I2C3_SCL
CNP-H_BGA874
GPP_D11/ISH_SPI_MISO/GP_BSSB_CLK/GSPI2_MISO
GPP_D12/ISH_SPI_MOSI/GP_BSSB_DI/GSPI2_MOSI
GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/CNV_WFEN
3
CNP-H
GPP_D9/ISH_SPI_CS#/GSPI2_CS0# GPP_D10/ISH_SPI_CLK/GSPI2_CLK
GPP_D16/ISH_UART0_CTS#/CNV_WCEN
GPP_D14/ISH_UART0_TXD/I2C2_SCL
GPP_D13/ISH_UART0_RXD/I2C2_SDA
GPP_H20/ISH_I2C0_SCL GPP_H19/ISH_I2C0_SDA
GPP_H22/ISH_I2C1_SCL GPP_H21/ISH_I2C1_SDA
GPP_A23/ISH_GP5 GPP_A22/ISH_GP4 GPP_A21/ISH_GP3 GPP_A20/ISH_GP2 GPP_A19/ISH_GP1
GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7
11 OF 13
GPP_A18/ISH_GP0
Rev1.0
BA20 BB20 BB16 AN18
BF14 AR18 BF17 BE17
AG45 AH46
AH47 AH48
AV34 AW32 BA33 BE34 BD34 BF35 BD38
MEM_INTERLEAVED DGPU_HOLD_R ST# AR_DET# GPP_D12
LID_CL#_PCH TPM_TYPE
CLKDET#
2
DGPU_HOLD_R ST# <27>
ISH_UART0_CTS # <5 2> ISH_UART0_RTS# <52> ISH_UART0_TXD <52> ISH_UART0_RXD <52>
1
PAD~D
1
PAD~D
1
+3.3V_RUN
LCD_CBL_D ET#
PCH_DPB_CT RL_CLK PCH_DPB_CT RL_DATA PCH_DPC_C TRL_CLK PCH_DPC_C TRL_DATA PCH_DPD_C TRL_CLK PCH_DPD_C TRL_DATA
DGPU_HOLD_R ST#
@
T268
@
T258
Reserved
GPP_D12
TPM_TYPE
1 2
RC370 10K_0201_5%
1 2
RH628 2.2K_0402_5%
1 2
RH221 2.2K_0402_5%
1 2
RH222 2.2K_0402_5%
1 2
RH223 2.2K_0402_5%
1 2
RH224 2.2K_0402_5%
1 2
RH225 2.2K_0402_5%
Change to pop 4/1
1 2
RH350 100K_0402_5 %@
1 2
RH349 100K_0402_5 %@
1 2
RH379 100_0402_1%@
C C
B B
A A
+3.3V_ALW_PC H
12
RH311
@
8.2K_0402_5 %
BBS_BIT6
BOOT BIOS Destination(Bit 6)
HIGH LOW(DEFAULT)
LPC SPI
TBT_ID
HIGH LOW
+3.3V_RUN
1 2
12
10K_0402_5%
10K_0402_5%
RH267@
RH268
TBT_ID
Alpine Redge Titan Redge
PCH_DPB_HP D<31> PCH_DPC_H PD<3 0> PCH_DPD_H PD<2 8>
1 2
RH630 100K_0402_ 5%@
CPU_EDP_HP D<29>
MEM_INTERLEAVED
CPU_EDP_HP D
1 2
12
RH371 10K_0402_5 %
@
RH372 10K_0402_5 %
UH1E
AT6
GPP_I0/DDPB_HPD0/DISP_MISC0
AN10
GPP_I1/DDPC_HPD1/DISP_MISC1
AP9
GPP_I2/DDPD_HPD2/DISP_MISC2
AL15
GPP_I3/DDPF_HPD3/DISP_MISC3
AN6
GPP_I4/EDP_HPD/DISP_MISC4
CNP-H_BGA874
DIMM TYPE
HIGH Interleave
Non-InterleaveLOW
CNP-H
GPP_I6/DDPB_CTRLDATA
GPP_I8/DDPC_CTRLDATA
GPP_I10/DDPD_CTRLDATA
GPP_F23/DDPF_CTRLDATA
GPP_F22/DDPF_CTRLCLK
5 OF 13
AR_DET#
GPP_I5/DDPB_CTRLCLK
GPP_I7/DDPC_CTRLCLK
GPP_I9/DDPD_CTRLCLK
GPP_F14/PS_ON#
GPP_K23/IMGCLKOUT1 GPP_K22/IMGCLKOUT0
GPP_K21 GPP_K20
GPP_H23/TIME_SYNC0
+3.3V_ALW_PCH+3.3V_ALW_PCH
Rev1.0
1 2
12
AL13 AR8 AN13 AL10 AL9 AR3 AN40 AT49
AP41
M45 L48 T45 T46 AJ47
RH400
@
10K_0402_5 %
RH401
10K_0402_5 %
PCH_DPB_CT RL_CLK PCH_DPB_CT RL_DATA PCH_DPC_C TRL_CLK PCH_DPC_C TRL_DATA PCH_DPD_C TRL_CLK PCH_DPD_C TRL_DATA
GPP_F22
RC444 10K_0402_5 %@
AR_DET#
1 2
NON TBTHIGH
TBTLOW
PCH_DPC_C TRL_CLK <1 9,30>
PCH_DPC_C TRL_CLK <1 9,30>
PCH_DPC_C TRL_DATA <19,30 >
PCH_DPC_C TRL_DATA <19,30 >
+3.3V_RUN
1 2
12
CRB RV0.7
Align BH 1/221
Vendor FOXCON TBD TBD
TYPEC_CON_SEL2
Check ME about wire to board PN
+3.3V_ALW_PC H
SIO_SLP_S3#<18,42,59>
+3.3V_ALW
SIO_SLP_S5#<18> SIO_SLP_S4#<11,18,88> SIO_SLP_A#<18,58>
+3.3V_ALW
PCH_RTCR ST#< 18,58>
POWER_SW #_MB<59,7 7>
SYS_RESET#<15,18>
SIO_SLP_S0#<14,18,65>
Intel Management Engine Test Suite
RH555
@
10K_0402_5 %
TYPEC_CON_SEL 2TYPEC_CON_SEL 1
RH556
@
10K_0402_5 %
JAE
LOWTYPEC_CON_SEL1
LOW
+3.3V_ALW_PCH+3.3V_ALW_PCH
RH553
@
10K_0402_5 %
1 2
12
RH554
@
10K_0402_5 %
LOW
HIGH
LOWHIGH
JAPS1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
GND_1
20
GND_2
CONN@
ACES_50506-01 841-P01
HIGH
HIGH
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CNP-H(5/9) USB,HDA,SMB
CNP-H(5/9) USB,HDA,SMB
CNP-H(5/9) USB,HDA,SMB
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
19 103
19 103
19 103
1.0
1.0
1.0
5
1 2
@ESPI@
RH294 0_040 2_5%
RH296 0_0402_5%@
1 2
RH250 0_0402_5%@
RH295 0_040 2_5%@
+1.8V_PRIM
+1.8V_ALW_PC HRES
+1.8V_ALW_PC HRES
+1.0V_ALW_PC H+1.05V_PRIM
1 2
RH254 0_ 1206_5%@
+1.0V_ALW_PC H
0.0454A
@
@
@
@
@
@
@
@
@
@
RH255 0_ 0402_5%@
RH256
RH257
RH258
RH259
RH286
RH287
RH288
RH290
RH260
RH240
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
JUMP@
PJP3
2
JUMP_43X79
1 2
1 2
1 2
112
0.0012A
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0.0085A
0_0402_5%
0_0402_5%
D D
C C
B B
+3.3V_ALW_PC HRES
+1.0V_DSW
+1.0V_PRIM_FUSE
+1.0V_PRIM_CNV_HVLO
0.2A
+1.0V_SRC
0.169A
+1.0V_BCLKPLL 2
0.021A
+1.0V_DUSB
0.42A
+2.8V_FHV0
0.0859A
+2.8V_FHV1
0.193A
+1.0V_MPHY
6.66A
+1.0V_CLPLLEB B
0.109A
+1.0V_OC
+1.0V_OCPLL1
0.0198A
RH279 0_ 1206_5%@
RH291 0_0402_5%
LPC@
@
RH304
@
RH293
@
RH303
@
RH305
@
RH306
@
RH246
@
RH292
@
RH300
@
RH299
RH298 0_ 0603_5%@
@
RH302
571182-cnl-pch-h-eds-rev2p2 P65 Table 10-6.
+3.3V_ALW_PC HRES+3.3V_ALW_P CH +RTC_CEL L_PCH
1 2
eSPI Power
+3.3V_1.8V_GPPA
0.101A
1 2
+3.3V_PGPPBC
0.343A
1 2
0_0402_5%
+3.3V_1.8V_GPPD
0.14A
1 2
0_0402_5%
+3.3V_PGPPEF
0.174A
1 2
0_0402_5%
+3.3V_PGPPG
0.145A
1 2
0_0402_5%
+3.3V_PGPPHK
0.262A
1 2
0_0402_5%
+3.3V_1.8V_SPI
0.05A
1 2
0_0402_5%
+3.3V_1.8V_AZIO
0.00767A
1 2
0_0402_5%
+3.3V_FUSE
0.106A
1 2
0_0402_5%
+3.3V_PHVC
0.182A
1 2
0_0402_5%
+3.3V_PHVLDO
0.97A
1 2
+3.3V_PUSB2
0.536A
1 2
0_0402_5%
RF Request
+3.3V_1.8V_AZIO_R +1.0V_CLPLLEBB
1
2
CC327
RF@
1
2
CC328
2.2P_0402_50V8C
RF@
2.2P_0402_50V8C
1 2
RH247 0_06 03_5%@
+1.8V_ALW_PC HRES
+1.8V_ALW_PC HRES
12
12
+3.3V_DSW
4
+1.8V_ALW_PC HRES
0.113A
@NDS3@
RH440
DS3@
+3.3V_ALW_DS W_R
1 2
RH439 0_040 2_5%
1 2
+1.8V_PRIM
+1.8V_PHVLDO
+1.24V_DPHY
0_0402_5%
12
1 2
@
RH297
1 2
RH242 0_ 0603_5%@
0.882A
1 2
RH239 0_0603_ 5%@
1 2
@
RH237
+1.0V_OCPLL1
+1.0V_BCLKPLL 2
+3.3V_ALW_PC H
+3.3V_ALW
Material shortage SB00000QP00 change to SB00000T900 1/15
QH7
DS3@
PJ2301_SOT2 3-3
1 3
S
D
0.1U_0201_25V6K
@
CH340
DS3@
L2N7002WT1G_SC-70-3
QH6
G
2
DS3@
49.9K_0402_1%
12
RH433
13
D
2
G
S
Change to DS3 4/1
499K_0402_1%
12
+3.3V_PRTC
0.000416A
0_0402_5%
+1.8V_PRIM_PCH
+1.24V_LDOSRAM
0_0402_5%
1
2
@
1
2
@
DS3@
RH432
100K_0402_5%
1 2
BLM15GA750SN1 D_2P
CC332
BLM15GA750SN1 D_2P
CC330
RH431
3
1 2
LC3
0.1U_0201_10V6K
1 2
LC2
0.1U_0201_10V6K
VCCDSW_EN_GPIO <18 >
1
CC331
2
1
CC311
2
571182-cnl-pch-h-eds-rev2p2 P65 Table 10-6.
+1.0V_PRIM_CNV_HVLO
+1.0V_OCPLL1_ R
0.1U_0201_10V6K
+1.0V_BCLKPLL 2_R
0.1U_0201_10V6K
+1.05V_PRIM
+1.0V_MPHY
+1.0V_PRIM_FUSE
+1.0V_DUSB
+1.0V_DSW
+1.0V_CLPLLEB B
+1.0V_AZPLL
+1.0V_AMPHYPLL
+1.0V_XTAL
+1.0V_SRC
+1.0V_OCPLL1_ R
+1.0V_OC
8.21A
UH1H
AA22
VCCPRIM_1P051
AA23
VCCPRIM_1P052
AB20
VCCPRIM_1P053
AB22
VCCPRIM_1P054
AB23
VCCPRIM_1P055
AB27
VCCPRIM_1P056
AB28
VCCPRIM_1P057
AB30
VCCPRIM_1P058
AD20
VCCPRIM_1P059
AD23
VCCPRIM_1P0510
AD27
VCCPRIM_1P0511
AD28
VCCPRIM_1P0512
AD30
VCCPRIM_1P0513
AF23
VCCPRIM_1P0516
AF27
VCCPRIM_1P0517
AF30
VCCPRIM_1P0518
U26
VCCPRIM_1P0523
U29
VCCPRIM_1P0524
V25
VCCPRIM_1P0525
V27
VCCPRIM_1P0526
V28
VCCPRIM_1P0527
V30
VCCPRIM_1P0528
V31
VCCPRIM_1P0529
AD31
VCCPRIM_1P0514
AE17
VCCPRIM_1P0515
W22
VCCDUSB_1P051
W23
VCCDUSB_1P052
BG45
VCCDSW_1P051
BG46
VCCDSW_1P052
W31
VCCPRIM_MPHY_1P05
D1
VCCPRIM_1P0521
E1
VCCPRIM_1P0522
C49
VCCAMPHYPLL_1P051
D49
VCCAMPHYPLL_1P052
E49
VCCAMPHYPLL_1P053
P2
VCCA_XTAL_1P051
P3
VCCA_XTAL_1P052
W19
VCCA_SRC_1P051
W20
VCCA_SRC_1P052
C1
VCCAPLL_1P054
C2
VCCAPLL_1P055
V19
VCCA_BCLK_1P05
B1
VCCAPLL_1P051
B2
VCCAPLL_1P052
B3
VCCAPLL_1P053
CNP-H_BGA874
CNP-H
UH1J
RSVD7 RSVD8 RSVD6 RSVD5
RSVD3 RSVD4
RSVD2 RSVD1
PREQ# PRDY#
CPU_TRST#
TRIGGER_OUT
TRIGGER_IN
10 OF 13
CNP-H_BGA874
RH42 30 _0402_5%
Y14 Y15 U37 U35
N32 R32
AH15 AH14
AL2 AM5 AM4 AK3 AK2
Rev1.0
1 2
2
CNP-H
VCCPRIM_3P32
VCCPRIM_3P35
VCCPGPPG_3P3
VCCPRIM_3P33 VCCPRIM_3P34
VCCPGPPHK1 VCCPGPPHK2
VCCPGPPEF1 VCCPGPPEF2
VCCPGPPD VCCPGPPBC1 VCCPGPPBC2
VCCPGPPA
VCCPRIM_3P31 VCCDSW_3P31 VCCDSW_3P32
VCCPRIM_1P83 VCCPRIM_1P84 VCCPRIM_1P85 VCCPRIM_1P86 VCCPRIM_1P87
VCCPRIM_1P81 VCCPRIM_1P82
VCCPRIM_1P0520 VCCPRIM_1P0519
VCCPRIM_1P241 VCCPRIM_1P242
VCCDPHY_1P241 VCCDPHY_1P242 VCCDPHY_1P243
VCCMPHY_SENSE VSSMPHY_SENSE
8 OF 13
1
PAD~D
1
PAD~D
1
PAD~D
1
PAD~D
1
PAD~D
1
PAD~D
1
PAD~D
1
PAD~D
PCH_XDP_PREQ# PCH_XDP_PRDY# CPU_XDP_TRS T# PCH_2_CPU _TRIGGER_R CPU_2_PCH _TRIGGER
PCH_2_CPU _TRIGGERPCH_2_CPU _TRIGGER_R
DCPRTC1 DCPRTC2
VCCSPI
VCCRTC1 VCCRTC2
VCCHDA
@ @ @ @
@ @
@ @
Rev1.0
T288 T289 T290 T291
T292 T293
T294 T295
AW9
BF47 BG47
+VCCRTCEXT
V23
AN44
BC49 BD49
AN21 AY8 BB7
AC35 AC36 AE35 AE36
AN24 AN26 AP26
AN32
AT44 BE48 BE49
BB14 AG19 AG20 AN15 AR15 BB11
AF19 AF20
AG31 AF31 AK22 AK23
AJ22 AJ23 BG5
K47 K46
+1.8V_PRIM_PCH
0.766A
+1.8V_PHVLDO
+2.8V_FHV1
+1.24V_DPHY
1 1
PCH_XDP_PREQ# <7> PCH_XDP_PRDY# <7> CPU_XDP_TRS T# <7>
CPU_2_PCH _TRIGGER <10>
PCH_2_CPU _TRIGGER < 10>
+3.3V_PHVC
+3.3V_PUSB2
+3.3V_1.8V_SPI
+3.3V_PRTC
+3.3V_PGPPG
+3.3V_PHVLDO
+3.3V_PGPPHK
+3.3V_PGPPEF
+3.3V_1.8V_GPPD
+3.3V_PGPPBC
+3.3V_1.8V_GPPA
+3.3V_FUSE
+3.3V_DSW
+2.8V_FHV0
+1.24V_DPHY_MAR
VCCMPHY_SENSE <89> VSSMPHY_SENSE <89>
@
T76
PAD~D
@
T77
PAD~D
+3.3V_1.8V_AZIO_R
0.1U_0201_10V6K
+1.24V_LDOSRAM
1
0.1U_0201_10V6K
CH68
1
2
BLM15GA750SN1 D_2P
1
CC310
2
1
1
12
PAD~D
PAD~D
0.1U_0201_10V6K
CC329
@
@
@
+3.3V_1.8V_AZIO
1
2
T287
T75
LC1
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CNP-H(7/9) PWR,RSVD
CNP-H(7/9) PWR,RSVD
CNP-H(7/9) PWR,RSVD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
20 103
20 103
20 103
1.0
1.0
1.0
5
4
3
2
1
CNP-H
UH1I
AA19 AA20 AA25 AA27 AA28 AA30 AA31 AA49
AB19 AB25
AB31 AC12 AC17 AC33 AC38
AC46
AD19
AD22 AD25 AD49
AE12
AE33
AE38
AE46
AF22
AF25
AF28
AG1 AG22 AG23 AG25 AG27 AG28 AG30 AG49 AH12 AH17 AH33 AH38
AJ19 AJ20 AJ25 AJ27 AJ28 AJ30 AJ31 AK19 AK20 AK25 AK27 AK28 AK30 AK31
AK46
A28
A33 A37
A45 A46 A47 A48
AA5
AC4
AD1
AD2
AE4
AK4
A2
A3
A4
A5 A8
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71
9 OF 13
VSS72
CNP-H_BGA874
PDG V1P8 Table 50-8 +1.0V_AMPHYPLL
D D
C C
B B
+1.0V_ALW_PCH +1.0V_AMPHYPLL
Align Northbay pop LH423,CH560,CH324 RH289 change to LH423 CH324 change to pop Add CH560 11/28
PDG V1P8 Table 50-8 +1.05V_PRIM 1x 1uF, 0402, close PCH 3mm
8/17 downsize to SE00000UC00
PDG V1P8 Table 50-8 +VCCRTC 1x 0.1uF 0402, close PCH 3mm 1x 1uF 0402, close PCH 5mm
+3.3V_PRTC
1x 1uF 0402, close PCH 3mm
LH423
1 2
+1.05V_PRIM
1U_0201_6.3V6M
1
CH36
2
1U_0201_6.3V6M
1
CH33
2
8/17 downsize to SE00000UC00
LQM18PN2R2NC0L_2P~D
22U_0603_6.3V6M
1
2
0.1U_0201_10V6K
1
CH65
2
8/17 downsize to SE00000SV00
0.213A
22U_0603_6.3V6M
1
CH560
CH324
2
PDG V1P8 Table 50-8 +VCCPRIM_1P8 1x 4.7uF 0603, close PCH 3mm 1x 1uF 0402, close PCH 3mm
PDG V1P8 Table 50-8 +VCCDPHY_1P24 1x 4.7uF 0402, close PCH 5mm
+1.24V_DPHY_MAR
1U_0201_6.3V6M
1U_0201_6.3V6M
CH555
CH267
1
1
2
2
8/17 downsize to SE00000UC01, and add 1 uF
+1.8V_PRIM_PCH
4.7U_0402_6.3V6M
1U_0201_6.3V6M
1
1
CH21
2
2
8/17 downsize to SE00000UC00
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
1
CH30
2
2
8/17 Add CH559
1
2
CH22
CH559
PDG V1P8 Table 50-8. +1.0V_AZPLL 1x 4.7uF, 0402, close PCH 5mm
1 2
RH241 0_0603_5%
1U_0201_6.3V6M
@
CH29
PDG V1P8 Table 50-8 VCCAPLL_1P05 1x 1uF, 0402, close PCH 5mm
+1.0V_OCPLL1_R
1
2
8/17 downsize to SE00000UC00
PDG V1P8 Table 50-8 +VCCPRIM_3P3 1x 1uF, 0603, close PCH 3mm Place close to AY8, BB7 pins.
+3.3V_PHVLDO
1
2
8/17 downsize to SE00000UC00
CFL-H PDG rev0.5 4.7uF x1 CRB-H rev0.7 0.1uF x1, 1uF x1
0.0015A
8/17 downsize to SE00000UC00
1U_0201_6.3V6M
CH20
8/17 downsize to SE00000UC00
1U_0201_6.3V6M
1
CH37
2
8/17 downsize to SE00000SV00
PDG V1P8 Table 50-9. +1.0V_XTAL
+1.0V_AZPLL+1.0V_ALW_PCH
1U_0201_6.3V6M
4.7U_0402_6.3V6M
1
1
@
CH46
CH32
2
2
PDG V1P8 Table 50-8 +VCCPRIM_1P05 1x 1uF 0402, 3mm, close PCH 5mm 1x 22uF 0805, 5mm, close PCH 5mm
+1.0V_MPHY+1.0V_BCLKPLL2_R
1U_0201_6.3V6M
1
CH31
2
8/17 downsize to SE00000UC00
4.7U_0402_6.3V6M
0.1U_0201_10V6K
@
1
CH323
CH67
2
1x 22uF 0603 depop
+1.0V_ALW_PCH
LQM18PN2R2NC0L_2P~D
LH421
1 2
Intel recommend to follow 2% spec
22U_0603_6.3V6M
1U_0201_6.3V6M
1
1
2
CH47
CH34
2
+1.0V_XTAL
0.00428A
47U_0603_6.3V6M
CH45
2
1
VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144
Rev1.0
AL12 AL17 AL21 AL24 AL26 AL29 AL33 AL38 AM1 AM18 AM32 AM49 AN12 AN16 AN34 AN38 AP4 AP46 AR12 AR16 AR34 AR38 AT1 AT16 AT18 AT21 AT24 AT26 AT29 AT32 AT34 AT45 AV11 AV39 AW10 AW4 AW40 AW46 B47 B48 B49 BA12 BA14 BA44 BA5 BA6 BB41 BB43 BB9 BC10 BC13 BC15 BC19 BC24 BC26 BC31 BC35 BC40 BC45 BC8 BD43 BE44 BF1 BF2 BF3 BF48 BF49 BG17 BG2 BG22 BG25 BG28
BG33 BG37
BG48
BG3
BG4
C12 C25 C30
C4
C48
C5 D12 D16 D17 D30 D33
D8 E10 E13 E15 E17 E19 E22 E24 E26 E31 E33 E35 E40 E42
E8 F41 F43 F47 G44
G6
H8
J10 J26 J29
J4 J40 J46 J47 J48
J9
K11 K39 M16 M18 M21
CNP-H_BGA874
UH1L
VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195
CNP-H
12 OF 13
VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246
Rev1.0
M24 M32 M34 M49 M5 N12 N16 N34 N35 N37 N38 P26 P29 P4 P46 R12 R16 R26 R29 R3 R34 R38 R4 T17 T18 T32 T4 T49 T5 T7 U12 U15 U17 U21 U24 U33 U38 V20 V22 V4 V46 W25 W27 W28 W30 Y10 Y12 Y17 Y33 Y38 Y9
+1.0V_OC
5
0.1U_0201_10V6K
1
2
+3.3V_PGPPHK
@
CH44
+3.3V_PGPPEF
0.1U_0201_10V6K
@
CH62
1
2
A A
0.1U_0201_10V6K
@
CH64
1
2
8/17 downsize to SE00000SV00
+3.3V_DSW
1
2
0.1U_0201_10V6K
@
CH63
PDG V1P8 Table 50-8 depop, but reserved
+1.0V_DSW +1.0V_CLPLLEBB+1.0V_DUSB
1U_0201_6.3V6M
1
CH35
2
8/17 downsize to SE00000UC00
4
0.1U_0201_10V6K
1
CH38
2
8/17 downsize to SE00000SV00
8/17 downsize to SE00000SV00
0.1U_0201_10V6K
1
CH66
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CNP-H(8/9) PWR,CAP
CNP-H(8/9) PWR,CAP
CNP-H(8/9) PWR,CAP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
21 103
21 103
21 103
1.0
1.0
1.0
5
4
3
2
1
+1.2V_RUN Source
UZ43
+1.2V_MEM
RUN_ON
D D
PCH_PRIM_EN<11,18,89>
C C
B B
1 2
@
RZ509
3.3V_RUN_GFX_ON
0_0402_5%
follow naming rule
+19.5VB_DGFF + 19.5VB_DGFF
QZ20
2
100K_0402_5%
G
12
RZ547
+5V_ALW_R
+3.3V_ALW
+5V_ALW
100K_0402_5%
0.47U_0402_25V6K
12
RZ512
20K_0402_5%
12
RZ514
Material shortage SB00000J500 change to SB00001OO00 1/15
13
D
DMN3150LW -7_SOT323-3
S
VGS max =1.4V Special for EC VTR3 rail 1.8V.
1 2
3
4
AOZ1336DI_DFN8_2 X2
+3.3V_ALW_PCH Source
UZ42
1 2
3
4
AOZ1336DI_DFN8_2 X2
DGFF_PWR_SRC Source
QZ19 AOSP21357L_SO8
12
1 2
CZ526
3 6
+DGFF_SRC_EN #
7
VOUT1
VIN1
8
VOUT2
VIN2
6
CT
ON
VBIAS
5
GND1
9
GND2
7
VOUT1
VIN1
8
VOUT2
VIN2
6
CT
ON
VBIAS
5
GND1
9
GND2
8 7
5
4
PWR change AO4455 to AOSP21357L
+1.2V_RUN_PW R + 1.2V_RUN
470P_0402_50V7K
2
1
470P_0402_50V7K
2
1
1
2
CZ515
CZ521
JUMP@
PJP67
JUMP_43X118
112
0.1U_0201_10V6K
JUMP@
2
JUMP_43X79
CZ514
0.1U_0201_10V6K
1
2
2
82P_0402_50V8J
PJP66
2
CZ520
1
2
112
JUMP@
PJP38
JUMP_43X79
RF@
12
CZ545
+5V_ALW_R
RUN_ON<11,22,58,59,6 7,70,89>
3.3V_RUN_GFX_ON<58>
+3.3V_ALW_PC H+3.3V_ALW _PCH_PWR
112
+DGFF_PWR _SRC+DGFF_PWR
0.1U_0201_25V6K
100K_0402_5%
12
CZ525
RZ513
+3.3V_RUN /+5V_RUN Source
RUN_ON<11,22,58,59,6 7,70,89>
@
RZ549
RZ548 0 _0402_5%@
+5V_ALW_R
+3.3V_ALW_R
+5V_ALW_R
1 2
@
RZ510
+5V_ALW_R
+3.3V_ALW_R
+1.8V_PRIM
1 2
1 2
RUN_ON
+5V_ALW_R
+3.3V_ALW to +3.3V_DGFF +5V_ALW to +5V_DGFF
UZ41
1
VIN1_1
2
VIN1_2
RUN_ON_R
3
ON1
4
VBIAS
5
ON2
6
VIN2_1
7
VIN2_2
EM5209VF_DFN14 _3X2
UZ40
1
VIN1_1
2
VIN1_2
3
ON1
4
VBIAS
5
ON2
6
VIN2_1
7
VIN2_2
EM5209VF_DFN14 _3X2
0_0402_5%
0_0402_5%
+1.8V_RUN Source
UZ45
1
VIN1
2
VIN2
3
ON
4
VBIAS
AOZ1336DI_DFN8_2 X2
VOUT1_1 VOUT1_2
GND
VOUT2_1 VOUT2_2
GPAD
VOUT1_1 VOUT1_2
GND
VOUT2_1 VOUT2_2
GPAD
VOUT1 VOUT2
CT
GND1 GND2
+5V_DGFF+ 5V_DGFF_PWR
14
+5V_DGFF_PWR
13
12
CT1
11
10
CT2
9 8
15
14 13
12
CT1
11
10
CT2
9 8
15
7 8
6
5 9
0.1U_0201_10V6K CZ513
470P_0402_50V7K
2
CZ516
1
+5V_RUN_PW R
1000P_0402_50V7K
CZ522
2
1
+1.8V_RUN_PW R
470P_0402_50V7K
CZ121
1
2
JUMP@
PJP65
2
82P_0402_50V8J
1
2
470P_0402_50V7K
2
1
470P_0402_50V7K
2
1
112
1
JUMP_43X79
CZ529
RF@
2
+3.3V_DGFF_PW R +3.3V_DGFF
+3.3V_DGFF_PW R
82P_0402_50V8J
CZ517
CZ523
1
2
+5V_RUN+5V_RUN_ PWR
PJP40
PAD-OPEN 4x4m
JUMP@
CZ519
0.1U_0201_10V6K
1
2
12
+3.3V_RUN_PW R
JUMP@
2
JUMP_43X79
CZ120
0.1U_0201_10V6K
1
2
+1.8V_RUN_PW R + 1.8V_RUN
JUMP@
PJP43
2
112
0.1U_0201_10V6K JUMP_43X79
RF@
CZ518
1
CZ528
2
+3.3V_RUN_PW R +3.3V_RU N
JUMP@
PJP39
2
112
0.1U_0201_10V6K JUMP_43X79
CZ524
1
2
PJP42
112
Discharg Circuit
+5V_RUN
12
RZ518 20_0603_5 %
+5V_RUN_CHG
13
D
2
RUN_ON#<58>
A A
5
QZ21
G
L2N7002W T1G_SC-70-3
S
change SB00000UO00 to SB000009Q80/ SB00000ST00 as main source, SB00000UO00 as 3rd source
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CNP-H(9/9) Power Control
CNP-H(9/9) Power Control
CNP-H(9/9) Power Control
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
22 103
22 103
22 103
1.0
1.0
1.0
5
4
3
2
1
All VREF traces should have 10 mil trace width
DDR_A_CB[0 ..7]<8,24>
DDR_A_DQS# [0..3]<8 ,24>
DDR_A_DQS[0 ..3]< 8,24>
D D
C C
B B
*
A A
DDR_A_DQS# [4..7]<8 ,24>
DDR_A_DQS[4 ..7]< 8,24>
DDR_A_D[0..6 3]<8,24>
DDR_A_MA[ 0..13]<8,24>
+2.5V_MEM
+1.2V_MEM
DIMM Select
SA0 SA1
0
DIMM4
DIMM1
1100
1
DIMM3
10U_0603_6.3V6M
1U_0201_10V6M
1U_0201_10V6M
1
1
1
CD3
CD1
CD2
2
2
2
downsize
change package to 0603
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CD7
CD6
CD8
1
1
1
2
2
2
1U_0201_10V6M
1U_0201_10V6M
1U_0201_10V6M
1
1
1
2
downsize
Layout Note: Place near JDIMM1.258
0DIMM2
1
CD18
CD17
2
+0.6V_DDR_ VTT
10U_0603_6.3V6M
1
2
SA2
0
0
0
0
2
CD27
downsize
1
2
1 2
12
CD19
1U_0201_10V6M
@
0_0402_5%
@
0_0402_5%
10U_0603_6.3V6M
1
CD4
2
CD14 change to SGA20331E10
10U_0603_6.3V6M
CD10
1U_0201_10V6M
CD21
RD14
@
0_0402_5%
@
RD79
0_0402_5%
10U_0603_6.3V6M
10U_0603_6.3V6M
CD12
CD11
1
1
2
2
1U_0201_10V6M
1U_0201_10V6M
1
1
CD23
CD22
2
2
+3.3V_RUN+3.3V_RUN +3.3V_ RUN
12
RD15
@
0_0402_5%
DIMM1_SA0 DIMM1_SA1 DIMM1_SA2
@
RD80
0_0402_5%
1 2
10U_0603_6.3V6M
CD9
1
1
2
2
1U_0201_10V6M
1
1
CD20
2
2
1U_0201_10V6M
1
CD30
CD31
2
12
RD78
RD18
1 2
10U_0603_6.3V6M
330U_D2_2V_Y
1
CD13
1
+
2
2
1U_0201_10V6M
1
CD24
2
+V_DDR_RE FCA_A
1
2
+3.3V_RUN
CD14
0.1U_0402_10V6K
CD28
1 2
1
2
DDR_A_CB0<8, 24>
DDR_A_CB5<8, 24>
DDR_A_DQS# 8<8,24> DDR_A_DQS8<8,24>
DDR_A_CB3<8, 24>
DDR_A_CB2<8, 24>
DDR_A_CKE 2<8>
DDR_A_BG0<8,24>
DDR_A_CLK 2<8> DDR_A_CLK #2<8>
DDR_A_PAR ITY<8,24>
DDR_A_BA1< 8,24>
DDR_A_CS# 2<8>
DDR_A_MA1 4<8,24 >
DDR_A_ODT2<8>
2.2U_0402_6.3V6M
@
1
CD29
2
RD16
@
0_0603_5%
+3.3V_RUN_ DIMM1
0.1U_0402_10V6K
2.2U_0603_10V7K
1
CD32
2
DDR_A_CS# 3<8>
DDR_A_ODT3<8>
T47PAD~D @
CD33
DDR_XDP_W AN_SMB CLK<7 ,18,24,25,26,54 > DDR_XDP_W AN_SMB DAT <7,18,2 4,25,26,54>
JDIMM1 REV Type H=5.2
+1.2V_MEM +1.2V_MEM
JDIMM1
1
DDR_A_D4
DDR_A_D0
DDR_A_DQS# 0 DDR_A_DQS0
DDR_A_D7
DDR_A_D3
DDR_A_D13
DDR_A_D12
DDR_A_D15
DDR_A_D14
DDR_A_D21
DDR_A_D20
DDR_A_DQS# 2 DDR_A_DQS2
DDR_A_D22
DDR_A_D18
DDR_A_D29
DDR_A_D28
DDR_A_D27
DDR_A_D30
DDR_A_CB0
DDR_A_CB5
DDR_A_DQS# 8 DDR_A_DQS8
DDR_A_CB3
DDR_A_CB2
DDR_A_CKE 2
DDR_A_BG1 DDR_A_BG0
DDR_A_MA1 2 DDR_A_MA9
DDR_A_MA8 DDR_A_MA6
DDR_A_MA3 DDR_A_MA1
DDR_A_CLK 2 DDR_A_CLK #2
DDR_A_PAR ITY
DDR_A_BA1
DDR_A_CS# 2 DDR_A_MA1 4
DDR_A_ODT2 DDR_A_CS# 3
DDR_A_ODT3
1
DDR_A_D33
DDR_A_D37
DDR_A_DQS# 4 DDR_A_DQS4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D41
DDR_A_D43
DDR_A_D46
DDR_A_D50
DDR_A_D52
DDR_A_DQS# 6 DDR_A_DQS6
DDR_A_D54
DDR_A_D51
DDR_A_D57
DDR_A_D61
DDR_A_D62
DDR_A_D58
+3.3V_RUN_ DIMM1
VSS1
3
DQ5
5
VSS3
7
DQ1
9
VSS5 DQS0_c11DM0_n/DBI0_n
13
DQS0_t
15
VSS8
17
DQ7
19
VSS10
21
DQ3
23
VSS12
25
DQ13
27
VSS14
29
DQ9
31
VSS16 DM1_n/DBI_n33DQS1_t
35
VSS17
37
DQ15
39
VSS19
41
DQ10
43
VSS21
45
DQ21
47
VSS23
49
DQ17
51
VSS25 DQS2_c53DM2_n/DBI2_n
55
DQS2_t
57
VSS28
59
DQ23
61
VSS30
63
DQ19
65
VSS32
67
DQ29
69
VSS34
71
DQ25
73
VSS36 DM3_n/DBI3_n75DQS3_t
77
VSS37
79
DQ30
81
VSS39
83
DQ26
85
VSS41
87
CB5/NC
89
VSS43
91
CB1/NC
93
VSS45 DQS8_c95DM8_n/DBI_n/NC
97
DQS8_t
99
VSS48
101
CB2/NC
103
VSS50
105
CB3/NC
107
VSS52
109
CKE0
111
VDD1
113
BG1
115
BG0
117
VDD3
119
A12
121
A9
123
VDD5
125
A8
127
A6
129
VDD7
131
A3
133
A1
135
VDD9
137
CK0_t
139
CK0_c
141
VDD11
143
PARITY
145
BA1
147
VDD13
149
CS0_n
151
WE_n/A14
153
VDD15
155
ODT0
157
CS1_n
159
VDD17
161
ODT1
163
VDD19
165
C1, CS3_n,NC
167
VSS53
169
DQ37
171
VSS55
173
DQ33
175
VSS57
177
DQS4_c
179
DQS4_t
181
VSS60
183
DQ38
185
VSS62
187
DQ34
189
VSS64
191
DQ44
193
VSS66
195
DQ40
197
VSS68
199
DM5_n/DBI5_n
201
VSS69
203
DQ46
205
VSS71
207
DQ42
209
VSS73
211
DQ52
213
VSS75
215
DQ49
217
VSS77
219
DQS6_c
221
DQS6_t
223
VSS80
225
DQ55
227
VSS82
229
DQ51
231
VSS84
233
DQ61
235
VSS86
237
DQ56
239
VSS88
241
DM7_n/DBI7_n
243
VSS89
245
DQ62
247
VSS91
249
DQ58
251
VSS93
253
SCL
255
VDDSPD
257
VPP1
259
VPP2
261
GND1
263
NPTH1
ADDR0208-P0 01A02
CONN@
SP07001 JH0L
DM4_n/DBI4_n
DM6_n/DBI6_n
VSS2
VSS4
VSS6
VSS7
VSS9
VSS11
DQ12
VSS13
VSS15
DQS1_c
VSS18
DQ14
VSS20
DQ11
VSS22
DQ20
VSS24
DQ16
VSS26
VSS27
DQ22
VSS29
DQ18
VSS31
DQ28
VSS33
DQ24
VSS35
DQS3_c
VSS38
DQ31
VSS40
DQ27
VSS42
CB4/NC
VSS44
CB0/NC
VSS46
VSS47
CB6/NC
VSS49
CB7/NC
VSS51
RESET_n
CKE1 VDD2
ACT_n
ALERT_n
VDD4
VDD6
VDD8
EVENT_n/NF
VDD10
CK1_t/NF
CK1_c/NF
VDD12
A10/AP VDD14
RAS_n/A16
VDD16
CAS_n/A15
VDD18
C0/CS2_n/NC
VREFCA
VSS54
DQ36
VSS56
DQ32
VSS58
VSS59
DQ39
VSS61
DQ35
VSS63
DQ45
VSS65
DQ41
VSS67
DQS5_c
DQS5_t
VSS70
DQ47
VSS72
DQ43
VSS74
DQ53
VSS76
DQ48
VSS78
VSS79
DQ54
VSS81
DQ50
VSS83
DQ60
VSS85
DQ57
VSS87
DQS7_c
DQS7_t
VSS90
DQ63
VSS92
DQ59
VSS94
GND2
NPTH2
2
DDR_A_D1
4
DQ4
6
DDR_A_D5
8
DQ0
10 12 14
DDR_A_D6
16
DQ6
18
DDR_A_D2
20
DQ2
22
DDR_A_D9
24 26
DDR_A_D8
28
DQ8
30
DDR_A_DQS# 1
32
DDR_A_DQS1
34 36
DDR_A_D10
38 40
DDR_A_D11
42 44
DDR_A_D16
46 48
DDR_A_D17
50 52 54 56
DDR_A_D19
58 60
DDR_A_D23
62 64
DDR_A_D24
66 68
DDR_A_D25
70 72
DDR_A_DQS# 3
74
DDR_A_DQS3
76 78
DDR_A_D26
80 82
DDR_A_D31
84 86
DDR_A_CB1
88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120
A11
122
A7
124 126
A5
128
A4
130 132
A2
134 136 138 140 142 144
A0
146 148 150
BA0
152 154 156 158
A13
160 162 164 166
SA2
168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 242 244 246 248 250 252 254
SDA
256
SA0
258
VTT
260
SA1
262
264
DDR_A_CB4
DDR_A_CB7
DDR_A_CB6
DDR_A_DRA MRST# DDR_A_CKE 3
DDR_A_ACT# DDR_A_ALE RT#
DDR_A_MA1 1 DDR_A_MA7
DDR_A_MA5 DDR_A_MA4
DDR_A_MA2 JDIMM1_EVE NT#
DDR_A_CLK 3 DDR_A_CLK #3
DDR_A_MA0
DDR_A_MA1 0
DDR_A_BA0 DDR_A_MA1 6
DDR_A_MA1 5 DDR_A_MA1 3
1
DIMM1_SA2
DDR_A_D36
DDR_A_D32
DDR_A_D35
DDR_A_D34
DDR_A_D40
DDR_A_D45
DDR_A_DQS# 5 DDR_A_DQS5
DDR_A_D47
DDR_A_D42
DDR_A_D48
DDR_A_D49
DDR_A_D53
DDR_A_D55
DDR_A_D56
DDR_A_D60
DDR_A_DQS# 7 DDR_A_DQS7
DDR_A_D59
DDR_A_D63
DIMM1_SA0
DIMM1_SA1
DDR_A_CB1 <8,24>
DDR_A_CB4 <8,24>
DDR_A_CB7 <8,24>
DDR_A_CB6 <8,24>
1 2
CD15 0.1U_0201 _10V6K@
DDR_A_CKE 3 <8>
DDR_A_ACT# <8,24>DDR_A_BG1<8,24> DDR_A_ALE RT# <8,24>
DDR_A_CLK 3 <8> DDR_A_CLK #3 <8>
DDR_A_BA0 < 8,24> DDR_A_MA1 6 <8,2 4>
DDR_A_MA1 5 <8,24 >
T46 PAD ~D@
+V_DDR_RE FCA_A
+0.6V_DDR_ VTT+2.5V_MEM
+V_DDR_RE FCA_A
DDR_VTT_CTRL<7>
CPU
JDIMM4
B A
JDIMM3
+1.2V_MEM
JDIMM1_EVE NT#
+DDR_VREF _CA
STD
12
1
2
12
REV
D
C
RD4 470_0402_1 %
0.1U_0402_10V6K
@
CD5
RD7 1K_0402 _5%@
0.022U_0402_16V7K
1
2
24.9_0402_1%
CH-ACH-B
STD
-->CKE0,1-->CKE0,1
JDIMM2
Top Side
B
A
JDIMM1
REV
H_THERMTRIP#
+V_DDR_RE FCA_B
+V_DDR_RE FCA_A
5
VCC
4
Y
Bottom Side
DDR_A_DRA MRST# DDR_B_DRA MRST#
+V_DDR_RE FCA_B
+3.3V_RUN
330K_0402_5%
12
-->CKE2,3 -->CKE2,3
@
1 2
RD76 0_0402_5%
@
1 2
RD77 0_0402_5%
1 2
1 2
RD9 2_0 402_1%@
1 2
RD10 2_0402 _1%
CD25
RD12
UD1
1
NC
2
A
3
GND
74AUP1G07GW _TSSOP5
DDR_A_DRA MRST# <24>DDR4_DRAMR ST#_PCH<1 8> DDR_B_DRA MRST# <25,26>
H_THERMTRIP# <7,14,24,25,26,59 >
+1.2V_MEM
12
0.1U_0402_10V6K
@
12
CD26
1
2
RD17
+1.2V_MEM
1 2
CD34@ 0.1U_0402_2 5V6
0.6V_DDR_VTT_ON
0.1U_0402_10V6K
@
1K_0402_5%
CD16
RD8
1
2
1K_0402_5%
RD11
0.6V_DDR_VTT_ON <88>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DDR4_DIMM1
DDR4_DIMM1
DDR4_DIMM1
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
23 103
23 103
23 103
1.0
1.0
1.0
5
4
3
2
1
JDIMM2 STD Type H=4
DDR_A_CB[0. .7]<8,23>
DDR_A_DQS #[0..3]<8,23>
DDR_A_DQS [0..3]<8,23>
DDR_A_DQS #[4..7]<8,23>
DDR_A_DQS [4..7]<8,23>
D D
C C
B B
DIMM2
*
DIMM4
DIMM1
DIMM3
A A
5
DDR_A_D[0..63 ]<8,23>
DDR_A_MA[0..13]<8,23>
+2.5V_MEM
1
2
downsize
+1.2V_MEM
1
2
1
2
downsize
Layout Note: Place near JDIMM2.258
DIMM Select
SA2
SA0 SA1
0
0
0 1
1
0
1 1
1U_0201_10V6M
1
CD36
2
10U_0603_6.3V6M
CD39
1
2
1U_0201_10V6M
1
CD49
2
+0.6V_DDR_VT T
0
0
0
0
10U_0603_6.3V6M
1U_0201_10V6M
10U_0603_6.3V6M
1
1
CD35
CD37
CD38
2
2
CD25 change to SGA20331E10
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CD41
CD42
CD40
1
1
2
2
1U_0201_10V6M
1U_0201_10V6M
1U_0201_10V6M
1
1
CD50
CD51
CD52
2
2
1U_0201_10V6M
1U_0201_10V6M
10U_0603_6.3V6M
CD57
1
1
1
CD58
2
2
2
downsize
12
RD22
@
0_0402_5%
@
RD81
0_0402_5%
1 2
1
2
1
2
CD59
12
1 2
10U_0603_6.3V6M
CD43
1U_0201_10V6M
CD53
RD23
@
0_0402_5%
@
RD82
0_0402_5%
1
2
1
2
+3.3V_RUN+3.3V_R UN+3.3V_RUN
10U_0603_6.3V6M
CD44
1U_0201_10V6M
CD54
12
1 2
10U_0603_6.3V6M
CD45
1
1
2
2
1U_0201_10V6M
1
1
CD55
2
2
+V_DDR_RE FCA_A
RD24
@
0_0402_5%
DIMM2_SA0 DIMM2_SA1 DIMM2_SA2
@
RD83
0_0402_5%
10U_0603_6.3V6M
330U_D2_2V_Y
@
1
CD46
CD47
+
2
1U_0201_10V6M
CD56
0.1U_0402_10V6K
2.2U_0402_6.3V6M
@
1
1
CD60
CD61
2
2
+3.3V_RUN
RD92
@
0_0603_5%
1 2
+3.3V_RUN_D IMM2
0.1U_0402_10V6K
2.2U_0603_10V7K
1
1
CD62
2
2
4
DDR_A_CB0<8,23>
DDR_A_CB5<8,23>
DDR_A_DQS #8<8,23> DDR_A_DQS 8<8,23>
DDR_A_CB3<8,23>
DDR_A_CB2<8,23>
DDR_A_CKE 0<8>
DDR_A_BG1<8,23> DDR_A_BG0<8,23>
DDR_A_CLK0<8> DDR_A_CLK# 0<8>
DDR_A_PAR ITY<8,23>
DDR_A_BA1<8,23>
DDR_A_CS#0<8>
DDR_A_MA14<8,23>
DDR_A_ODT 0<8>
DDR_A_CS#1<8>
DDR_A_ODT 1<8>
T49PAD~D @
CD63
DDR_XDP_W AN_SMBCLK<7,18,23,25,26,54>
+2.5V_MEM
+1.2V_MEM +1.2V_MEM
DDR_A_D1
DDR_A_D5
DDR_A_DQS #0 DDR_A_DQS 0
DDR_A_D6
DDR_A_D2
DDR_A_D9
DDR_A_D8
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS #2 DDR_A_DQS 2
DDR_A_D19
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D31
DDR_A_CB0
DDR_A_CB5
DDR_A_DQS #8 DDR_A_DQS 8
DDR_A_CB3
DDR_A_CB2
DDR_A_CKE 0
DDR_A_BG1 DDR_A_BG0
DDR_A_MA12 DDR_A_MA9
DDR_A_MA8 DDR_A_MA6
DDR_A_MA3 DDR_A_MA1
DDR_A_CLK0 DDR_A_CLK# 0
DDR_A_PAR ITY
DDR_A_BA1
DDR_A_CS#0 DDR_A_MA14
DDR_A_ODT 0 DDR_A_CS#1
DDR_A_ODT 1
1
DDR_A_D36
DDR_A_D32
DDR_A_DQS #4 DDR_A_DQS 4
DDR_A_D35
DDR_A_D34
DDR_A_D40
DDR_A_D45
DDR_A_D47
DDR_A_D42
DDR_A_D48
DDR_A_D49
DDR_A_DQS #6 DDR_A_DQS 6
DDR_A_D53
DDR_A_D55
DDR_A_D56
DDR_A_D60
DDR_A_D59
DDR_A_D63
+3.3V_RUN_D IMM2
JDIMM2
1
VSS1
3
DQ5
5
VSS3
7
DQ1
9
VSS5 DQS0_c11DM0_n/DBI0_n
13
DQS0_t
15
VSS8
17
DQ7
19
VSS10
21
DQ3
23
VSS12
25
DQ13
27
VSS14
29
DQ9
31
VSS16
33
DM1_n/DBI_n
35
VSS17
37
DQ15
39
VSS19
41
DQ10
43
VSS21
45
DQ21
47
VSS23
49
DQ17
51
VSS25 DQS2_c53DM2_n/DBI2_n
55
DQS2_t
57
VSS28
59
DQ23
61
VSS30
63
DQ19
65
VSS32
67
DQ29
69
VSS34
71
DQ25
73
VSS36 DM3_n/DBI3_n75DQS3_t
77
VSS37
79
DQ30
81
VSS39
83
DQ26
85
VSS41
87
CB5/NC
89
VSS43
91
CB1/NC
93
VSS45 DQS8_c95DM8_n/DBI_n/NC
97
DQS8_t
99
VSS48
101
CB2/NC
103
VSS50
105
CB3/NC
107
VSS52
109
CKE0
111
VDD1
113
BG1
115
BG0
117
VDD3
119
A12
121
A9
123
VDD5
125
A8
127
A6
129
VDD7
131
A3
133
A1
135
VDD9
137
CK0_t
139
CK0_c
141
VDD11
143
PARITY
145
BA1
147
VDD13
149
CS0_n
151
WE_n/A14
153
VDD15
155
ODT0
157
CS1_n
159
VDD17
161
ODT1
163
VDD19
165
C1, CS3_n,NC
167
VSS53
169
DQ37
171
VSS55
173
DQ33
175
VSS57
177
DQS4_c
179
DQS4_t
181
VSS60
183
DQ38
185
VSS62
187
DQ34
189
VSS64
191
DQ44
193
VSS66
195
DQ40
197
VSS68
199
DM5_n/DBI5_n
201
VSS69
203
DQ46
205
VSS71
207
DQ42
209
VSS73
211
DQ52
213
VSS75
215
DQ49
217
VSS77
219
DQS6_c
221
DQS6_t
223
VSS80
225
DQ55
227
VSS82
229
DQ51
231
VSS84
233
DQ61
235
VSS86
237
DQ56
239
VSS88
241
DM7_n/DBI7_n
243
VSS89
245
DQ62
247
VSS91
249
DQ58
251
VSS93
253
SCL
255
VDDSPD
257
VPP1
259
VPP2
261
GND1
263
NPTH1
BELLW_80888-20 21 CONN@
SP07001GA0L
3
VSS2
VSS4
VSS6
VSS7
VSS9
VSS11
DQ12
VSS13
VSS15
DQS1_c
DQS1_t
VSS18
DQ14
VSS20
DQ11
VSS22
DQ20
VSS24
DQ16
VSS26
VSS27
DQ22
VSS29
DQ18
VSS31
DQ28
VSS33
DQ24
VSS35
DQS3_c
VSS38
DQ31
VSS40
DQ27
VSS42
CB4/NC
VSS44
CB0/NC
VSS46
VSS47
CB6/NC
VSS49
CB7/NC
VSS51
RESET_n
CKE1 VDD2
ACT_n
ALERT_n
VDD4
VDD6
VDD8
EVENT_n/NF
VDD10
CK1_t/NF
CK1_c/NF
VDD12
A10/AP VDD14
RAS_n/A16
VDD16
CAS_n/A15
VDD18
C0/CS2_n/NC
VREFCA
VSS54
DQ36
VSS56
DQ32
VSS58
DM4_n/DBI4_n
VSS59
DQ39
VSS61
DQ35
VSS63
DQ45
VSS65
DQ41
VSS67
DQS5_c
DQS5_t
VSS70
DQ47
VSS72
DQ43
VSS74
DQ53
VSS76
DQ48
VSS78
DM6_n/DBI6_n
VSS79
DQ54
VSS81
DQ50
VSS83
DQ60
VSS85
DQ57
VSS87
DQS7_c
DQS7_t
VSS90
DQ63
VSS92
DQ59
VSS94
GND2
NPTH2
2
DDR_A_D4
4
DQ4
6
DDR_A_D0
8
DQ0
10 12 14
DDR_A_D7
16
DQ6
18
DDR_A_D3
20
DQ2
22
DDR_A_D13
24 26
DDR_A_D12
28
DQ8
30
DDR_A_DQS #1
32
DDR_A_DQS 1
34 36
DDR_A_D15
38 40
DDR_A_D14
42 44
DDR_A_D21
46 48
DDR_A_D20
50 52 54 56
DDR_A_D22
58 60
DDR_A_D18
62 64
DDR_A_D29
66 68
DDR_A_D28
70 72
DDR_A_DQS #3
74
DDR_A_DQS 3
76 78
DDR_A_D27
80 82
DDR_A_D30
84 86
DDR_A_CB1
88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120
A11
122
A7
124 126
A5
128
A4
130 132
A2
134 136 138 140 142 144
A0
146 148 150
BA0
152 154 156 158
A13
160 162 164 166
SA2
168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 242 244 246 248 250 252 254
SDA
256
SA0
258
VTT
260
SA1
262
264
DDR_A_CB1 <8,23>
DDR_A_CB4
DDR_A_CB4 <8,23>
DDR_A_CB7
DDR_A_CB7 <8,23>
DDR_A_CB6
DDR_A_CB6 <8,23> DDR_A_DR AMRST# DDR_A_CKE 1
DDR_A_ACT # DDR_A_ALER T#
DDR_A_MA11 DDR_A_MA7
DDR_A_MA5 DDR_A_MA4
DDR_A_MA2 JDIMM2_EVENT#
DDR_A_CLK1 DDR_A_CLK# 1
DDR_A_MA0
DDR_A_MA10
DDR_A_BA0 DDR_A_MA16
DDR_A_MA15 DDR_A_MA13
DIMM2_SA2
DDR_A_D33
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D41
DDR_A_DQS #5 DDR_A_DQS 5
DDR_A_D43
DDR_A_D46
DDR_A_D50
DDR_A_D52
DDR_A_D54
DDR_A_D51
DDR_A_D57
DDR_A_D61
DDR_A_DQS #7 DDR_A_DQS 7
DDR_A_D62
DDR_A_D58
DIMM2_SA0
DIMM2_SA1
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
CD48 0.1U_0201_10V6K@
DDR_A_CKE 1 <8>
DDR_A_ACT # <8,23> DDR_A_ALER T# <8,23>
DDR_A_CLK1 <8> DDR_A_CLK# 1 <8>
DDR_A_BA0 <8,23> DDR_A_MA16 <8,23>
DDR_A_MA15 <8,23>
1
T48 P AD~D@
+V_DDR_RE FCA_A
DDR_XDP_W AN_SMBDAT <7,18,23,25,26,54>
+0.6V_DDR_VT T
Issued Date
Issued Date
Issued Date
+V_DDR_RE FCA_A
2016/01/01
2016/01/01
2016/01/01
CPU
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
REV
JDIMM4
D
B A
C
JDIMM3
STD REV
RD21 1K_0402_5%@
Deciphered Date
Deciphered Date
Deciphered Date
CH-ACH-B
JDIMM1
DDR_A_DR AMRST#
H_THERMT RIP#JDIMM2_EVENT#
2017/01/01
2017/01/01
2017/01/01
STD
JDIMM2
B
A
DDR_A_DR AMRST# <23>
Top Side
Bottom Side
-->CKE2,3-->CKE2,3
-->CKE0,1 -->CKE0,1
1 2
H_THERMT RIP# <7,14,23,25,26,59>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DDR4_DIMM2
DDR4_DIMM2
DDR4_DIMM2
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
24 103
24 103
24 103
1.0
1.0
1.0
5
4
3
2
1
JDIMM3 STD Type H=5.2
JDIMM3
1
DDR_B_D4
DDR_B_D1
DDR_B_BA1<8,26>
DDR_B_MA1 4<8, 26>
+2.5V_MEM
DDR_B_DQS# 0 DDR_B_DQS0
DDR_B_D6
DDR_B_D3
DDR_B_D10
DDR_B_D9
DDR_B_D12
DDR_B_D13
DDR_B_D18
DDR_B_D22
DDR_B_DQS# 2 DDR_B_DQS2
DDR_B_D19
DDR_B_D20
DDR_B_D25
DDR_B_D30
DDR_B_D29
DDR_B_D31
DDR_B_CB4
DDR_B_CB2
DDR_B_DQS# 8 DDR_B_DQS8
DDR_B_CB7
DDR_B_CB5
DDR_B_CKE 2
DDR_B_BG1 DDR_B_BG0
DDR_B_MA1 2 DDR_B_MA9
DDR_B_MA8 DDR_B_MA6
DDR_B_MA3 DDR_B_MA1
DDR_B_CLK 2 DDR_B_CLK #2
DDR_B_PAR ITY
DDR_B_BA1
DDR_B_CS# 2 DDR_B_MA1 4
DDR_B_ODT2 DDR_B_CS# 3
DDR_B_ODT3
1
T51PAD~D @
DDR_B_D35
DDR_B_D34
DDR_B_DQS# 4 DDR_B_DQS4
DDR_B_D33
DDR_B_D32
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D46
DDR_B_D48
DDR_B_D52
DDR_B_DQS# 6 DDR_B_DQS6
DDR_B_D50
DDR_B_D55
DDR_B_D57
DDR_B_D61
DDR_B_D56
DDR_B_D60
+3.3V_RUN_ DIMM3
DDR_B_CB[0 ..7]<8,26>
DDR_B_DQS# [0..7]<8 ,26>
D D
C C
B B
A A
DDR_B_DQS[0 ..7]<8 ,26>
DDR_B_D[0..6 3]<8,26>
DDR_B_MA[ 0..13]<8,26>
DIMM Select
SA0 SA1
DIMM2
DIMM4
DIMM1
DIMM3
*
+2.5V_MEM
1U_0201_10V6M
1
1
CD64
2
2
downsize
+1.2V_MEM
10U_0603_6.3V6M
CD68
1
1
2
2
1U_0201_10V6M
1
1
CD79
2
2
downsize
Layout Note: Place near JDIMM3.258
+0.6V_DDR_ VTT
SA2
0
0
0
0
0 1
0
1
0
0
1 1
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0201_10V6M
1
1
CD67
CD66
CD65
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
CD69
CD70
1
1
2
2
1U_0201_10V6M
1U_0201_10V6M
1
1
CD80
CD81
2
2
1U_0201_10V6M
10U_0603_6.3V6M
CD91
1
1
CD92
2
2
downsize
@
0_0402_5%
1 2
12
@
0_0402_5%
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CD72
CD71
1
1
2
2
1U_0201_10V6M
1U_0201_10V6M
1
1
CD82
CD83
2
2
1U_0201_10V6M
1
CD93
2
@
RD85
RD86
0_0402_5%
1 2
12
RD42
RD43
@
0_0402_5%
CD73
1U_0201_10V6M
CD84
+3.3V_RUN+3.3 V_RUN+3.3V_RU N
10U_0603_6.3V6M
CD74
1
1
2
2
1U_0201_10V6M
1
1
CD85
2
2
+V_DDR_RE FCA_B
12
RD40
@
0_0402_5%
DIMM3_SA0 DIMM3_SA1 DIMM3_SA2
@
RD87
0_0402_5%
1 2
10U_0603_6.3V6M
330U_D2_2V_Y
1
CD76
CD75
+
2
1U_0201_10V6M
CD86
0.1U_0402_10V6K
2.2U_0402_6.3V6M
@
1
1
CD95
CD94
2
2
+3.3V_RUN
RD93
@
0_0603_5%
1 2
+3.3V_RUN_ DIMM3
0.1U_0402_10V6K
2.2U_0603_10V7K
1
1
CD98
2
2
DDR_B_CB4<8, 26>
DDR_B_CB2<8, 26>
DDR_B_DQS# 8<8,26> DDR_B_DQS8<8,26>
DDR_B_CB7<8, 26>
DDR_B_CB5<8, 26>
DDR_B_CKE 2<8>
DDR_B_BG1<8,26> DDR_B_BG0<8,26>
DDR_B_CLK 2<8> DDR_B_CLK #2<8>
DDR_B_PAR ITY<8,26>
DDR_B_CS# 2<8>
DDR_B_ODT2<8>
DDR_B_CS# 3<8>
DDR_B_ODT3<8>
CD99
VSS1
3
DQ5
5
VSS3
7
DQ1
9
VSS5 DQS0_c11DM0_n/DBI0_n
13
DQS0_t
15
VSS8
17
DQ7
19
VSS10
21
DQ3
23
VSS12
25
DQ13
27
VSS14
29
DQ9
31
VSS16 DM1_n/DBI_n33DQS1_t
35
VSS17
37
DQ15
39
VSS19
41
DQ10
43
VSS21
45
DQ21
47
VSS23
49
DQ17
51
VSS25 DQS2_c53DM2_n/DBI2_n
55
DQS2_t
57
VSS28
59
DQ23
61
VSS30
63
DQ19
65
VSS32
67
DQ29
69
VSS34
71
DQ25
73
VSS36 DM3_n/DBI3_n75DQS3_t
77
VSS37
79
DQ30
81
VSS39
83
DQ26
85
VSS41
87
CB5/NC
89
VSS43
91
CB1/NC
93
VSS45 DQS8_c95DM8_n/DBI_n/NC
97
DQS8_t
99
VSS48
101
CB2/NC
103
VSS50
105
CB3/NC
107
VSS52
109
CKE0
111
VDD1
113
BG1
115
BG0
117
VDD3
119
A12
121
A9
123
VDD5
125
A8
127
A6
129
VDD7
131
A3
133
A1
135
VDD9
137
CK0_t
139
CK0_c
141
VDD11
143
PARITY
145
BA1
147
VDD13
149
CS0_n
151
WE_n/A14
153
VDD15
155
ODT0
157
CS1_n
159
VDD17
161
ODT1
163
VDD19
165
C1, CS3_n,NC
167
VSS53
169
DQ37
171
VSS55
173
DQ33
175
VSS57
177
DQS4_c
179
DQS4_t
181
VSS60
183
DQ38
185
VSS62
187
DQ34
189
VSS64
191
DQ44
193
VSS66
195
DQ40
197
VSS68
199
DM5_n/DBI5_n
201
VSS69
203
DQ46
205
VSS71
207
DQ42
209
VSS73
211
DQ52
213
VSS75
215
DQ49
217
VSS77
219
DQS6_c
221
DQS6_t
223
VSS80
225
DQ55
227
VSS82
229
DQ51
231
VSS84
233
DQ61
235
VSS86
237
DQ56
239
VSS88
241
DM7_n/DBI7_n
243
VSS89
245
DQ62
247
VSS91
249
DQ58
251
VSS93
253
SCL
255
VDDSPD
257
VPP1
259
VPP2
261
GND1
263
NPTH1
BELLW _80888-2021
CONN@
SP07001GT0L
EVENT_n/NF
RAS_n/A16
CAS_n/A15
C0/CS2_n/NC
DM4_n/DBI4_n
DM6_n/DBI6_n
VSS2
VSS4
VSS6
VSS7
VSS9
VSS11
DQ12
VSS13
VSS15
DQS1_c
VSS18
DQ14
VSS20
DQ11
VSS22
DQ20
VSS24
DQ16
VSS26
VSS27
DQ22
VSS29
DQ18
VSS31
DQ28
VSS33
DQ24
VSS35
DQS3_c
VSS38
DQ31
VSS40
DQ27
VSS42
CB4/NC
VSS44
CB0/NC
VSS46
VSS47
CB6/NC
VSS49
CB7/NC
VSS51
RESET_n
CKE1 VDD2
ACT_n
ALERT_n
VDD4
VDD6
VDD8
VDD10
CK1_t/NF
CK1_c/NF
VDD12
A10/AP
VDD14
VDD16
VDD18
VREFCA
VSS54
DQ36
VSS56
DQ32
VSS58
VSS59
DQ39
VSS61
DQ35
VSS63
DQ45
VSS65
DQ41
VSS67 DQS5_c DQS5_t
VSS70
DQ47
VSS72
DQ43
VSS74
DQ53
VSS76
DQ48
VSS78
VSS79
DQ54
VSS81
DQ50
VSS83
DQ60
VSS85
DQ57
VSS87 DQS7_c DQS7_t
VSS90
DQ63
VSS92
DQ59
VSS94
GND2
NPTH2
+1.2V_MEM+1.2V_MEM
2
DDR_B_D5
4
DQ4
6
DDR_B_D0
8
DQ0
10 12 14
DDR_B_D2
16
DQ6
18
DDR_B_D7
20
DQ2
22
DDR_B_D8
24 26
DDR_B_D14
28
DQ8
30
DDR_B_DQS# 1
32
DDR_B_DQS1
34 36
DDR_B_D11
38 40
DDR_B_D15
42 44
DDR_B_D17
46 48
DDR_B_D16
50 52 54 56
DDR_B_D23
58 60
DDR_B_D21
62 64
DDR_B_D28
66 68
DDR_B_D27
70 72
DDR_B_DQS# 3
74
DDR_B_DQS3
76 78
DDR_B_D26
80 82
DDR_B_D24
84 86
DDR_B_CB1
88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120
A11
122
A7
124 126
A5
128
A4
130 132
A2
134 136 138 140 142 144
A0
146 148 150
BA0
152 154 156 158
A13
160 162 164 166
SA2
168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 242 244 246 248 250 252 254
SDA
256
SA0
258
VTT
260
SA1
262
264
DDR_B_CB3
DDR_B_CB6
DDR_B_CB0
DDR_B_DRA MRST# DDR_B_CKE 3
DDR_B_ACT# DDR_B_ALE RT#
DDR_B_MA1 1 DDR_B_MA7
DDR_B_MA5 DDR_B_MA4
DDR_B_MA2 JDIMM3_EVE NT#
DDR_B_CLK 3 DDR_B_CLK #3
DDR_B_MA0
DDR_B_MA1 0
DDR_B_BA0 DDR_B_MA1 6
DDR_B_MA1 5 DDR_B_MA1 3
1
DIMM3_SA2
DDR_B_D38
DDR_B_D39
DDR_B_D36
DDR_B_D37
DDR_B_D44
DDR_B_D45
DDR_B_DQS# 5 DDR_B_DQS5
DDR_B_D47
DDR_B_D43
DDR_B_D51
DDR_B_D54
DDR_B_D53
DDR_B_D49
DDR_B_D59
DDR_B_D62
DDR_B_DQS# 7 DDR_B_DQS7
DDR_B_D58
DDR_B_D63
DIMM3_SA0
DIMM3_SA1
DDR_B_CB1 <8,26>
DDR_B_CB3 <8,26>
DDR_B_CB6 <8,26>
DDR_B_CB0 <8,26>
1 2
CD78 0.1U_0201 _10V6K@
DDR_B_CKE 3 <8>
DDR_B_ACT# <8,26> DDR_B_ALE RT# <8,26>
DDR_B_CLK 3 <8> DDR_B_CLK #3 <8>
DDR_B_BA0 < 8,26> DDR_B_MA1 6 <8,2 6>
DDR_B_MA1 5 <8,2 6>
T50 PAD ~D@
+V_DDR_RE FCA_B
DDR_XDP_W AN_SMB DAT <7,18,2 3,24,26,54>DDR_XDP_W AN_SMB CLK< 7,18,23,24,26, 54>
+0.6V_DDR_ VTT
+V_DDR_RE FCA_B
CH-B CH-A
REV
CPU
B A
JDIMM3
D
C
-->CKE0,1 -->CKE0,1
JDIMM4
STD REV
RD29 1K_0402 _5%@
+DDR_VREF _B_DQ
RD31 2_0402 _1%
0.022U_0402_16V7K
1
CD87
2
24.9_0402_1%
12
RD33
@
+DIMM_DQ_R_V REF_B +V_DDR_REFCA_B
RD84
0_0402_5%
JDIMM2
JDIMM1
DDR_B_DRA MRST#
1 2
1 2
12
1
2
STD
Top Side
B
A
Bottom Side
-->CKE2,3-->CKE2,3
DDR_B_DRA MRST# <23,26>
H_THERMTRIP#JDIMM3_EVE NT#
+DIMM_DQ_R_V REF_B
0.1U_0402_10V6K
@
CD88
1
1
2
2
1 2
RD36 0_040 2_5%@
0.1U_0402_10V6K
@
CD97
H_THERMTRIP# <7,14,23,24,26 ,59>
+1.2V_MEM
0.1U_0402_10V6K
1K_0402_5%
12
RD30
1
2
0.1U_0402_10V6K
0.1U_0402_10V6K
@
1K_0402_5%
12
RD32
CD89
1
2
+1.2V_MEM
1K_0402_5%
12
1K_0402_5%
12
@
CD77
@
CD90
0.1U_0402_10V6K
@
@
CD96
RD34
1
2
@
RD37
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
DELL CONFIDENTIAL/PROPRIETARY
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DDR4_DIMM3
DDR4_DIMM3
DDR4_DIMM3
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
25 103
25 103
25 103
1.0
1.0
1.0
5
4
3
2
1
JDIMM4 REV Type H=4
+1.2V_MEM
JDIMM4
1
VSS1
3
DQ5
5
VSS3
7
DQ1
9
VSS5 DQS0_c11DM0_n/DBI0_n
13
DQS0_t
15
VSS8
17
DQ7
19
VSS10
21
DQ3
23
VSS12
25
DQ13
27
VSS14
29
DQ9
31
VSS16 DM1_n/DBI_n33DQS1_t
35
VSS17
37
DQ15
39
VSS19
41
DQ10
43
VSS21
45
DQ21
47
VSS23
49
DQ17
51
VSS25 DQS2_c53DM2_n/DBI2_n
55
DQS2_t
57
VSS28
59
DQ23
61
VSS30
63
DQ19
65
VSS32
67
DQ29
69
VSS34
71
DQ25
73
VSS36 DM3_n/DBI3_n75DQS3_t
77
VSS37
79
DQ30
81
VSS39
83
DQ26
85
VSS41
87
CB5/NC
89
VSS43
91
CB1/NC
93
VSS45 DQS8_c95DM8_n/DBI_n/NC
97
DQS8_t
99
VSS48
101
CB2/NC
103
VSS50
105
CB3/NC
107
VSS52
109
CKE0
111
VDD1
113
BG1
115
BG0
117
VDD3
119
A12
121
A9
123
VDD5
125
A8
127
A6
129
VDD7
131
A3
133
A1
135
VDD9
137
CK0_t
139
CK0_c
141
VDD11
143
PARITY
145
BA1
147
VDD13
149
CS0_n
151
WE_n/A14
153
VDD15
155
ODT0
157
CS1_n
159
VDD17
161
ODT1
163
VDD19
165
C1, CS3_n,NC
167
VSS53
169
DQ37
171
VSS55
173
DQ33
175
VSS57
177
DQS4_c
179
DQS4_t
181
VSS60
183
DQ38
185
VSS62
187
DQ34
189
VSS64
191
DQ44
193
VSS66
195
DQ40
197
VSS68
199
DM5_n/DBI5_n
201
VSS69
203
DQ46
205
VSS71
207
DQ42
209
VSS73
211
DQ52
213
VSS75
215
DQ49
217
VSS77
219
DQS6_c
221
DQS6_t
223
VSS80
225
DQ55
227
VSS82
229
DQ51
231
VSS84
233
DQ61
235
VSS86
237
DQ56
239
VSS88
241
DM7_n/DBI7_n
243
VSS89
245
DQ62
247
VSS91
249
DQ58
251
VSS93
253
SCL
255
VDDSPD
257
VPP1
259
VPP2
261
GND1
263
NPTH1
ADDR0206-P0 01A02
CONN@
SP07001 CY0L
EVENT_n/NF
RAS_n/A16
CAS_n/A15
C0/CS2_n/NC
DM4_n/DBI4_n
DM6_n/DBI6_n
DDR_B_BA1<8,25>
DDR_B_MA1 4<8, 25>
+2.5V_MEM
DDR_B_D5
DDR_B_D0
DDR_B_DQS# 0 DDR_B_DQS0
DDR_B_D2
DDR_B_D7
DDR_B_D8
DDR_B_D14
DDR_B_D11
DDR_B_D15
DDR_B_D17
DDR_B_D16
DDR_B_DQS# 2 DDR_B_DQS2
DDR_B_D23
DDR_B_D21
DDR_B_D28
DDR_B_D27
DDR_B_D26
DDR_B_D24
DDR_B_CB4
DDR_B_CB2
DDR_B_DQS# 8 DDR_B_DQS8
DDR_B_CB7
DDR_B_CB5
DDR_B_CKE 0
DDR_B_BG1 DDR_B_BG0
DDR_B_MA1 2 DDR_B_MA9
DDR_B_MA8 DDR_B_MA6
DDR_B_MA3 DDR_B_MA1
DDR_B_CLK 0 DDR_B_CLK #0
DDR_B_PAR ITY
DDR_B_BA1
DDR_B_CS# 0 DDR_B_MA1 4
DDR_B_ODT0 DDR_B_CS# 1
DDR_B_ODT1
1
T53PAD~D @
DDR_B_D38
DDR_B_D39
DDR_B_DQS# 4 DDR_B_DQS4
DDR_B_D36
DDR_B_D37
DDR_B_D44
DDR_B_D45
DDR_B_D47
DDR_B_D43
DDR_B_D51
DDR_B_D54
DDR_B_DQS# 6 DDR_B_DQS6
DDR_B_D53
DDR_B_D49
DDR_B_D59
DDR_B_D62
DDR_B_D58
DDR_B_D63
+3.3V_RUN_ DIMM4
DDR_B_CB[0 ..7]<8,25>
DDR_B_DQS# [0..7]<8 ,25>
DDR_B_DQS[0 ..7]< 8,25>
DDR_B_D[0..6 3]<8,25>
D D
C C
B B
A A
DDR_B_MA[ 0..13]<8,25>
DIMM Select
SA0 SA1
DIMM2
DIMM4
*
DIMM1
DIMM3
+2.5V_MEM
1U_0201_10V6M
1
CD100
2
downsize
+1.2V_MEM
10U_0603_6.3V6M
CD104
1
2
1U_0201_10V6M
1
CD114
2
downsize
Layout Note: Place near JDIMM4.258
+0.6V_DDR_ VTT
SA2
0
0
0
0 1
0
1
0
0
0
1 1
10U_0603_6.3V6M
1U_0201_10V6M
10U_0603_6.3V6M
1
1
1
CD102
CD101
CD103
2
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CD108
CD106
CD107
CD105
1
2
1U_0201_10V6M
1
CD115
2
10U_0603_6.3V6M
CD122
1
2
1
2
1U_0201_10V6M
1
2
1
2
downsize
12
1 2
CD116
1U_0201_10V6M
CD123
@
0_0402_5%
@
0_0402_5%
1
1
1
2
2
2
1U_0201_10V6M
1U_0201_10V6M
1
1
1
CD118
CD117
2
2
2
1U_0201_10V6M
1
CD124
2
@
RD88
RD46
0_0402_5%
1 2
12
RD51
@
RD89
0_0402_5%
10U_0603_6.3V6M
1U_0201_10V6M
CD119
+3.3V_RUN+3 .3V_RUN+3.3V_RU N
CD109
1
2
1
2
12
1 2
10U_0603_6.3V6M
10U_0603_6.3V6M
CD110
1
2
1U_0201_10V6M
1U_0201_10V6M
1
CD120
2
+V_DDR_RE FCA_B
RD48
@
0_0402_5%
DIMM4_SA0 DIMM4_SA1 DIMM4_SA2
@
RD90
0_0402_5%
330U_D2_2V_Y
@
1
CD112
CD111
+
2
CD121
0.1U_0402_10V6K
2.2U_0402_6.3V6M
@
1
1
CD125
CD126
2
2
+3.3V_RUN
RD94
@
0_0603_5%
1 2
+3.3V_RUN_ DIMM4
0.1U_0402_10V6K
2.2U_0603_10V7K
1
1
CD128
CD127
2
2
DDR_B_CB4<8, 25>
DDR_B_CB2<8, 25>
DDR_B_DQS# 8<8,25> DDR_B_DQS8<8,25>
DDR_B_CB7<8, 25>
DDR_B_CB5<8, 25>
DDR_B_CKE 0<8>
DDR_B_BG1<8,25> DDR_B_BG0<8,25>
DDR_B_CLK 0<8> DDR_B_CLK #0<8>
DDR_B_PAR ITY<8,25>
DDR_B_CS# 0<8>
DDR_B_ODT0<8>
DDR_B_CS# 1<8>
DDR_B_ODT1<8>
DDR_XDP_W AN_SMB CLK< 7,18,23,24,25, 54>
VSS2
VSS4
VSS6
VSS7
VSS9
VSS11
DQ12
VSS13
VSS15
DQS1_c
VSS18
DQ14
VSS20
DQ11
VSS22
DQ20
VSS24
DQ16
VSS26
VSS27
DQ22
VSS29
DQ18
VSS31
DQ28
VSS33
DQ24
VSS35
DQS3_c
VSS38
DQ31
VSS40
DQ27
VSS42
CB4/NC
VSS44
CB0/NC
VSS46
VSS47
CB6/NC
VSS49
CB7/NC
VSS51
RESET_n
CKE1 VDD2
ACT_n
ALERT_n
VDD4
VDD6
VDD8
VDD10
CK1_t/NF
CK1_c/NF
VDD12
A10/AP
VDD14
VDD16
VDD18
VREFCA
VSS54
DQ36
VSS56
DQ32
VSS58
VSS59
DQ39
VSS61
DQ35
VSS63
DQ45
VSS65
DQ41
VSS67 DQS5_c DQS5_t
VSS70
DQ47
VSS72
DQ43
VSS74
DQ53
VSS76
DQ48
VSS78
VSS79
DQ54
VSS81
DQ50
VSS83
DQ60
VSS85
DQ57
VSS87 DQS7_c DQS7_t
VSS90
DQ63
VSS92
DQ59
VSS94
GND2
NPTH2
+1.2V_MEM
2
DDR_B_D4
4
DQ4
6
DDR_B_D1
8
DQ0
10 12 14
DDR_B_D6
16
DQ6
18
DDR_B_D3
20
DQ2
22
DDR_B_D10
24 26
DDR_B_D9
28
DQ8
30
DDR_B_DQS# 1
32
DDR_B_DQS1
34 36
DDR_B_D12
38 40
DDR_B_D13
42 44
DDR_B_D18
46 48
DDR_B_D22
50 52 54 56
DDR_B_D19
58 60
DDR_B_D20
62 64
DDR_B_D25
66 68
DDR_B_D30
70 72
DDR_B_DQS# 3
74
DDR_B_DQS3
76 78
DDR_B_D29
80 82
DDR_B_D31
84 86
DDR_B_CB1
88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120
A11
122
A7
124 126
A5
128
A4
130 132
A2
134 136 138 140 142 144
A0
146 148 150
BA0
152 154 156 158
A13
160 162 164 166
SA2
168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 242 244 246 248 250 252 254
SDA
256
SA0
258
VTT
260
SA1
262
264
DDR_B_CB3
DDR_B_CB6
DDR_B_CB0
DDR_B_DRA MRST# DDR_B_CKE 1
DDR_B_ACT# DDR_B_ALE RT#
DDR_B_MA1 1 DDR_B_MA7
DDR_B_MA5 DDR_B_MA4
DDR_B_MA2 JDIMM4_EVE NT#
DDR_B_CLK 1 DDR_B_CLK #1
DDR_B_MA0
DDR_B_MA1 0
DDR_B_BA0 DDR_B_MA1 6
DDR_B_MA1 5 DDR_B_MA1 3
1
DIMM4_SA2
DDR_B_D35
DDR_B_D34
DDR_B_D33
DDR_B_D32
DDR_B_D40
DDR_B_D41
DDR_B_DQS# 5 DDR_B_DQS5
DDR_B_D42
DDR_B_D46
DDR_B_D48
DDR_B_D52
DDR_B_D50
DDR_B_D55
DDR_B_D57
DDR_B_D61
DDR_B_DQS# 7 DDR_B_DQS7
DDR_B_D56
DDR_B_D60
DIMM4_SA0
DIMM4_SA1
DDR_B_CB1 <8,25>
DDR_B_CB3 <8,25>
DDR_B_CB6 <8,25>
DDR_B_CB0 <8,25>
1 2
CD113 0.1U_02 01_10V6K@
DDR_B_CKE 1 <8>
DDR_B_ACT# <8,25> DDR_B_ALE RT# <8,25>
DDR_B_CLK 1 <8> DDR_B_CLK #1 <8>
DDR_B_BA0 < 8,25> DDR_B_MA1 6 <8,2 5>
DDR_B_MA1 5 <8,2 5>
+V_DDR_RE FCA_B
T52 PAD ~D@
+V_DDR_RE FCA_B
DDR_XDP_W AN_SMB DAT <7,18,2 3,24,25,54>
+0.6V_DDR_ VTT
CPU
B A
REV
JDIMM4
RD45 1K_0402 _5%@
D
C
CH-ACH-B
JDIMM1JDIMM3
DDR_B_DRA MRST#
STD
JDIMM2
B
A
H_THERMTRIP#JDIMM4_EVEN T#
REVSTD
-->CKE0,1
Top Side
Bottom Side
DDR_B_DRA MRST# < 23,25>
-->CKE0,1
-->CKE2,3 -->CKE2,3
1 2
H_THERMTRIP# <7,14,23,24,25,59 >
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DDR4_DIMM4
DDR4_DIMM4
DDR4_DIMM4
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
26 103
26 103
26 103
1.0
1.0
1.0
5
40mil(1A)
+5V_DGFF
0.1U_0201_16V6K
82P_0402_50V8J
RF@
1
1
CV957
2
2
D D
100mil(2.5A, 5VIA)
+3.3V_DGFF
JDG1
CV806
1
CV805
1
2
2
1
1
CV903
CV902
2
2
0.1U_0201_10V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
CONN@
GND_1 GND_2 GND_3 GND_4
1
1
2
2
3
3
4
4
5
5
6 7 8 9
82P_0402_50V8J
RF@
CV956
BELLW _80252-0521
2 DP channels from GPU
4
+DGFF_PW R_SRC
+3.3V_DGFF
Cancel double pull high
1 2
RV806 10K_0402_5%@
1 2
RV807 10K_0402_5%@
DGPU_PW ROK
DGFF_CLK_RE Q#
DGFF_ALERT#
3
+3.3V_DGFF
10K_0402_5%
RV803
+3.3V_RUN
12
DGPU_PEX_RST#
G
2
13
D
S
QV41 L2N7002W T1G_SC-70-3
change SB00000UO00 to SB000009Q80/ SB00000ST00 as main source, SB00000UO00 as 3rd source
100K_0402_5%
12
RV904
DGPU_ALERT# <5 9>
GPU_SMBDA T_R
GPU_SMBCL K_R
2
+3.3V_DGFF
4.7K_0402_5%
12
@
RV804
4.7K_0402_5%
12
@
RV805
S
QV30B 2N7002KDW _SOT363-6
+3.3V_DGFF
S
G
5
34
D
G
2
61
D
QV30A
2N7002KDW _SOT363-6
CLKREQ_PE G#0<16>
GPU_SMDAT <58>
GPU_SMCLK <58>
1
CLKREQ_PE G#0
L2N7002W T1G_SC-70-3
DGPU_PWROK
2
G
DGFF_CLK_RE Q#
1 3
D
S
QV42
change SB00000UO00 to SB000009Q80/ SB00000ST00 as main source, SB00000UO00 as 3rd source
( A & B & EDP)
PCIe x8 Lanes 0-7
PEG_CRX_C_ GTX_P7 PEG_CRX_C_ GTX_N7
PEG_CRX_C_ GTX_P6 PEG_CRX_C_ GTX_N6
PEG_CRX_C_ GTX_P5 PEG_CRX_C_ GTX_N5
PEG_CRX_C_ GTX_P4 PEG_CRX_C_ GTX_N4
PEG_CRX_C_ GTX_P3 PEG_CRX_C_ GTX_N3
PEG_CRX_C_ GTX_P1 PEG_CRX_C_ GTX_N1
GPU_SMBCL K_R GPU_SMBDA T_R
PEG_CRX_C_ GTX_P2 PEG_CRX_C_ GTX_N2
PEG_CRX_C_ GTX_P0 PEG_CRX_C_ GTX_N0 DGFF_CLK_RE Q#
DGFF_ENVDD< 38>
DGFF_PANEL_ BKEN<3 8>
+5V_DGFF +3.3V_DGFF
DV43
DV32
DV33
DGPU_HOLD_R ST# < 19>
PLTRST_GPU# <17>
5
4
M74VHC1GT125 DF2G_SC70-5
12
ACAV_IN<58 ,62,85>
UV68
1
OE
Vcc
2
IN A
GND3OUT Y
3
PEG_CRX_GTX_ P[0..15]<6>
PEG_CRX_GTX_ N[0..15]<6>
A1 A2 A3 A4 A5 A6 A7 A8 A9
A10
B1 B2 B3 B4 B5 B6 B7 B8 B9
B10
C1 C2 C3 C4 C5 C6 C7 C8 C9
C10
D1 D2 D9
D10
1 2
PEG_CTX_C_GRX _P[0..15]< 6>
PEG_CTX_C_GRX _N[0..15]<6>
JDGFF1
P
A1
N
A2
G
A3
P
A4
N
A5
G
A6
P
A7
N
A8
G
A9 A10
B1
P
B2
N
B3
G
B4
P
B5
N
B6
G
B7
P
B8
N
B9
G
B10
P
C1
N
C2
G
C3
P
C4
N
C5
G
C6
P
C7
N
C8 C9 C10
D1 D2 D9 D10
NPTH1
NPTH3
NPTH2
NPTH4
UNIMI_FBGCAX01 1
CONN@
PEG_CRX_C_ GTX_P0
PEG_CRX_C_ GTX_N0
PEG_CRX_C_ GTX_N1
PEG_CRX_C_ GTX_P2
PEG_CRX_C_ GTX_N2
PEG_CRX_C_ GTX_P3
PEG_CRX_C_ GTX_N3
PEG_CRX_C_ GTX_P4 PEG_CRX_C_ GTX_N4
PEG_CRX_C_ GTX_P5 PEG_CRX_C_ GTX_N5
PEG_CRX_C_ GTX_P6 PEG_CRX_C_ GTX_N6
PEG_CRX_C_ GTX_P7 PEG_CRX_C_ GTX_N7
PEG_CRX_C_ GTX_P8 PEG_CRX_C_ GTX_N8
PEG_CRX_C_ GTX_P9 PEG_CRX_C_ GTX_N9
PEG_CRX_C_ GTX_P10 PEG_CRX_C_ GTX_N10
PEG_CRX_C_ GTX_P11 PEG_CRX_C_ GTX_N11
PEG_CRX_C_ GTX_P12 PEG_CRX_C_ GTX_N12
PEG_CRX_C_ GTX_P13 PEG_CRX_C_ GTX_N13
PEG_CRX_C_ GTX_P14 PEG_CRX_C_ GTX_N14
PEG_CRX_C_ GTX_P15 PEG_CRX_C_ GTX_N15
H1
P
H1
H2
N
H2
H3
G
H3
H4
P
H4
H5
N
H5
H6
G
H6
H7
P
H7
H8
N
H8
H9
G
H9
H10
H10
G1
GG
G1
G2
P
G2
G3
N
G3
G4
G
G4
G5
P
G5
G6
N
G6
G7
G
G7
G8
P
G8
G9
N
G9
G10
G
G10
F1
P
F1
F2
N
F2
F3
G
F3
F4
P
F4
F5
N
F5
F6
G
F6
F7
P
F7
F8
N
F8
F9
F9
F10
F10
E1
E1
E2
E2
E9
E9
E10
E10
3 4
GPU_DP2_P1 GPU_DP2_N1
GPU_DP2_P2 GPU_DP2_N2
GPU_DP2_HP D_GATE
GPU_DP1_P2 GPU_DP1_N2
GPU_DP1_P3 GPU_DP1_N3
GPU_EDP_P 0 GPU_EDP_N0
DGPU_PEX_ RST#
GPU_DP1_AU XP GPU_DP1_AU XN
GPU_DP1_P0 GPU_DP1_N0
GPU_EDP_HP D
PEG_CRX_GTX_ P[0..15]
PEG_CRX_GTX_ N[0..15]
PEG_CTX_C_GRX _P[0..15]
PEG_CTX_C_GRX _N[0..15]
GPU_EDP_HP D <29>
DGPU_PEX_ RST#
12
DGFF_PW R_LEVEL
4
GPU_DP2_P1 <3 1> GPU_DP2_N1 < 31>
GPU_DP2_P2 <3 1> GPU_DP2_N2 < 31>
CLK_PEG_P 0 <16> CLK_PEG_N0 <16>
GPU_DP1_P2 <3 1>
GPU_DP1_N2 <31>
GPU_DP1_P3 <31> GPU_DP1_N3 < 31>
GPU_EDP_P 0 <29> GPU_EDP_N0 < 29>
GPU_DP1_AU XP <3 1> GPU_DP1_AU XN <31>
GPU_DP1_P0 <3 1>
GPU_DP1_N0 <31>
DGPU_PW ROK <18,58>
PCIE_WA KE# <42 ,52,59,67,68>
+3.3V_ALW
4
100K_0402_5%
O
RV813
+3.3V_ALW _R
+3.3V_DGFF
12
RV819
4.7K_0402_5%
4
Y
UV60
MC74VHC1G0 9DFT2G_SC70-5
DGFF_IFP_HPD
GPU_DP1_HP D
GPU_DP2_HP D
CV810
@
1 2
0.1U_0201_1 0V6K
5
1
P
IN1
2
IN2
G
UV63
3
SN74AHC1G0 8DCKR_SC70-5
CV811
@
1 2
0.1U_0201_1 0V6K
5
1
B
VCC
2
A
G
change net name
3
2 1
RB751VM-40 TE-17_SOD323-2
2 1
RB751VM-40 TE-17_SOD323-2
2 1
RB751VM-40 TE-17_SOD323-2
100K_0402_5%
12
12
RV821
10K_0402_5%
GPU_PW R_LEVEL <58>
RV812
GPU_DP1_P1<31> GPU_DP1_N1<31>
GPU_DP2_AU XP<31>
GPU_DP2_AU XN<31>
GPU_DP2_P0<31> GPU_DP2_N0<3 1>
GPU_EDP_P 1<2 9> GPU_EDP_N1<29>
GPU_DP2_P3<31>
GPU_DP2_N3<31>
C C
HDR monitor for AMD/NV/UMA edp output detect 1/29
GPU_EDP_A UXP<29> GPU_EDP_A UXN<29>
GPU_EDP_P 3< 29> GPU_EDP_N3<29>
GPU_EDP_P 2<2 9>
GPU_EDP_N2<29>
DGFF_VGA_DIS#<59> DGPU_TYPE#<38>
X-Beam I/per pi n=0.5A I/per connector =0.75A
TBT/DP MUX1
TBT/DP MUX2
eDP MUX
B B
PEG_CRX_GTX_ P0 PEG_CRX_GTX_ N0
PEG_CRX_GTX_ P1 PEG_CRX_C_ GTX_P1 PEG_CRX_GTX_ N1
PEG_CRX_GTX_ P2 PEG_CRX_GTX_ N2
PEG_CRX_GTX_ P3 PEG_CRX_GTX_ N3
PEG_CRX_GTX_ P4 PEG_CRX_GTX_ N4
PEG_CRX_GTX_ P5 PEG_CRX_GTX_ N5
PEG_CRX_GTX_ P6 PEG_CRX_GTX_ N6
PEG_CRX_GTX_ P7 PEG_CRX_GTX_ N7
PEG_CRX_GTX_ P8 PEG_CRX_GTX_ N8
PEG_CRX_GTX_ P9 PEG_CRX_GTX_ N9
PEG_CRX_GTX_ P10 PEG_CRX_GTX_ N10
PEG_CRX_GTX_ P11 PEG_CRX_GTX_ N11
PEG_CRX_GTX_ P12
A A
PEG_CRX_GTX_ N12
PEG_CRX_GTX_ P13 PEG_CRX_GTX_ N13
PEG_CRX_GTX_ P14 PEG_CRX_GTX_ N14
PEG_CRX_GTX_ P15 PEG_CRX_GTX_ N15
5
GPU_DP1_P1 GPU_DP1_N1 PEG_CTX_C_GRX _N13
GPU_DP2_AU XP GPU_DP2_AU XN
GPU_DP2_P0 GPU_DP2_N0
DGFF_ALERT#
GPU_EDP_P 1 GPU_EDP_N1
GPU_DP2_P3 GPU_DP2_N3
GPU_EDP_A UXP GPU_EDP_A UXN
DGFF_OVERT# DGFF_IFP_HPD
GPU_EDP_P 3 GPU_EDP_N3
GPU_EDP_P 2 GPU_EDP_N2 GPU_DP1_HP D_GATE
+5V_DGFF +3.3V_DGFF
PortA
PortB
PortC
12
CV427 0.2 2U_0201_6.3V 6K
12
CV428 0.22U_0201_6.3V6K
12
CV429 0.2 2U_0201_6.3V 6K
12
CV430 0.22U_0201_6.3V6K
12
CV431 0.2 2U_0201_6.3V 6K
12
CV432 0.22U_0201_6.3V6K
12
CV433 0.2 2U_0201_6.3V 6K
12
CV434 0.22U_0201_6.3V6K
12
CV435 0.2 2U_0201_6.3V 6K
12
CV436 0.22U_0201_6.3V6K
12
CV437 0.2 2U_0201_6.3V 6K
12
CV438 0.22U_0201_6.3V6K
12
CV439 0.2 2U_0201_6.3V 6K
12
CV440 0.22U_0201_6.3V6K
12
CV441 0.2 2U_0201_6.3V 6K
12
CV442 0.22U_0201_6.3V6K
12
CV443 0.2 2U_0201_6.3V 6K
12
CV444 0.22U_0201_6.3V6K
12
CV445 0.2 2U_0201_6.3V 6K
12
CV446 0.22U_0201_6.3V6K
12
CV447 0.2 2U_0201_6.3V 6K
12
CV448 0.22U_0201_6.3V6K
12
CV449 0.2 2U_0201_6.3V 6K
12
CV450 0.22U_0201_6.3V6K
12
CV451 0.2 2U_0201_6.3V 6K
12
CV452 0.22U_0201_6.3V6K
12
CV453 0.2 2U_0201_6.3V 6K
12
CV454 0.22U_0201_6.3V6K
12
CV455 0.2 2U_0201_6.3V 6K
12
CV456 0.22U_0201_6.3V6K
12
CV457 0.2 2U_0201_6.3V 6K
12
CV458 0.22U_0201_6.3V6K
DGFF_DP_HDM I_HPD < 58>
100K_0402_5%
RV905
+1.0V_VCCST+3.3V_ALW _R
10K_0402_5%
RV820
JDGFF2
A1
A1
A2
A2
A3
A3
A4
A4
A5
A5
A6
A6
A7
A7
A8
A8
A9
A9
A10
A10
B1
B1
B2
B2
B3
B3
B4
B4
B5
B5
B6
B6
B7
B7
B8
B8
B9
B9
B10
B10
C1
C1
C2
C2
C3
G
C3
C4
C4
C5
C5
C6
C6
C7
C7
C8
C8
C9
C9
C10
C10
D1
D1
D2
D2
D9
D9
D10
D10
1
NPTH1
2
NPTH2
UNIMI_FBGCAX01 1
CONN@
12
5
4
74AUP1G07GW _TSSOP5
PEG_CTX_C_GRX _P3
H1
P
P
H1
PEG_CTX_C_GRX _N3
H2
N
N
H2
H3
G
G
H3
PEG_CTX_C_GRX _P1
H4
P
P
H4
PEG_CTX_C_GRX _N1
H5
N
N
H5
H6
G
G
H6
PEG_CTX_C_GRX _P0
H7
P
P
H7
PEG_CTX_C_GRX _N0
H8
N
N
H8
H9
G
G
H9
DGFF_PW R_LEVEL
H10
H10
G1
GG
G1
PEG_CTX_C_GRX _P5
G2
P
P
G2
PEG_CTX_C_GRX _N5
G3
N
N
G3
G4
G
G
G4
PEG_CTX_C_GRX _P2
G5
P
P
G5
PEG_CTX_C_GRX _N2
G6
N
N
G6
G7
G
G
G7
PEG_CTX_C_GRX _P4
G8
P
P
G8
PEG_CTX_C_GRX _N4
G9
N
N
G9
G10
G
G
G10
F1
P
P
F1
F2
N
N
F2
F3
G
F3
PEG_CTX_C_GRX _P6
F4
P
P
F4
PEG_CTX_C_GRX _N6
F5
N
N
F5
F6
G
G
F6
PEG_CTX_C_GRX _P7
F7
P
P
F7
PEG_CTX_C_GRX _N7
F8
N
N
F8
MACO_EN
F9
F9
GPU_GC6_FB_ EN_R
F10
F10
E1
E1
E2
E2
E9
E9
E10
E10
3
NPTH3
4
NPTH4
UV69
VCC
Y
DGPU_PEX_ RST# D GPU_PEX_RS T#_D DGPU_PW ROK
1
NC
2
PROCHOT# <7,58,8 2,85,90>
A
3
GND
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VGA_IDENTIFY <28, 58>
DGPU_PW R_EN_R <59>
MACO_EN < 18>
1 2
@
RV485 0_0402_5%
DGFF_BIA_PW M <38>
2 1
DV44
RB751VM-40 TE-17_SOD323-2
GPU_DP2_HP D_GATE
DV34
@
RB751VM-40 TE-17_SOD323-2
GPU_GC6_FB_ EN <14 >
FOR NV GC6_FB_EN
GPU_EVENT# <14>
+3.3V_DGFF
5
IN1
4
O
IN2
3
21
2016/01/01
2016/01/01
2016/01/01
DGPU_PEX_ RST#_D
1
P
2
G
UV61
SN74AHC1G0 8DCKR_SC70-5
12
1
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
10K_0402_5%
1000P_0402_50V7K
PCIe x8 Lanes 8-15
PEG_CTX_C_GRX _P13
PEG_CTX_C_GRX _P15 PEG_CTX_C_GRX _N15
PEG_CTX_C_GRX _P14 PEG_CTX_C_GRX _N14
PEG_CTX_C_GRX _P10 PEG_CTX_C_GRX _N10
PEG_CTX_C_GRX _P11 PEG_CTX_C_GRX _N11
PEG_CTX_C_GRX _P12 PEG_CTX_C_GRX _N12
PEG_CTX_C_GRX _P9 PEG_CTX_C_GRX _N9
PEG_CTX_C_GRX _P8 PEG_CTX_C_GRX _N8
@
RV815
@
1 2
RV800
0_0402_5%
@
CV812
2017/01/01
2017/01/01
2017/01/01
JDGFF3
A1
P
A1
A2
N
A2
A3
G
A3
A4
P
A4
A5
N
A5
A6
G
A6
A7
P
A7
A8
N
A8
A9
G
A9
A10
A10
B1
B1
B2
P
B2
B3
N
B3
B4
G
B4
B5
P
B5
B6
N
B6
B7
G
B7
B8
P
B8
B9
N
B9
B10
G
B10
C1
P
C1
C2
N
C2
C3
G
C3
C4
P
C4
C5
N
C5
C6
G
C6
C7
P
C7
C8
N
C8
C9
C9
C10
C10
D1
D1
D2
D2
D9
D9
D10
D10
1
NPTH1
2
NPTH2
UNIMI_FBGCAX01 1
CONN@
GPU_DP1_HP D_GATE
100K_0402_5%
12
RV818
PEG_CRX_C_ GTX_P10
H1
P
H1
PEG_CRX_C_ GTX_N10
H2
N
H2
H3
G
H3
PEG_CRX_C_ GTX_P9
H4
P
H4
PEG_CRX_C_ GTX_N9
H5
N
H5
H6
G
H6
PEG_CRX_C_ GTX_P8
H7
P
H7
PEG_CRX_C_ GTX_N8
H8
N
H8
H9
G
H9
H10
H10
G1
GG
G1
PEG_CRX_C_ GTX_P12
G2
P
G2
PEG_CRX_C_ GTX_N12
G3
N
G3
G4
G
G4
PEG_CRX_C_ GTX_P11
G5
P
G5
PEG_CRX_C_ GTX_N11
G6
N
G6
G7
G
G7
PEG_CRX_C_ GTX_P13
G8
P
G8
PEG_CRX_C_ GTX_N13
G9
N
G9
G10
G
G10
F1
P
F1
F2
N
F2
F3
G
F3
PEG_CRX_C_ GTX_P14
F4
P
F4
PEG_CRX_C_ GTX_N14
F5
N
F5
F6
G
F6
PEG_CRX_C_ GTX_P15
F7
P
F7
PEG_CRX_C_ GTX_N15
F8
N
F8
F9
F9
F10
F10
E1
E1
E2
E2
E9
E9
E10
E10
3
NPTH3
4
NPTH4
+3.3V_DGFF
CV809
@
1 2
0.1U_0201_1 0V6K
5
DGPU_PEX_ RST#_D
1
P
IN1
4
O
2
IN2
G
UV62
3
SN74AHC1G0 8DCKR_SC70-5
+3.3V_DGFF
10K_0402_5%
12
RV816
DGPU_PEX_RST#
DGFF_OVERT#
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
G
S
QV40 L2N7002W T1G_SC-70-3
change SB00000UO00 to SB000009Q80/ SB00000ST00 as main source, SB00000UO00 as 3rd source
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DGFF CONN.
DGFF CONN.
DGFF CONN.
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
GPU_DP1_HP D <31>GPU_DP2_HP D <31>
+3.3V_ALW+3.3V_DGFF
10K_0402_5%
12
RV817
2
13
THERMTRIP1# <58>
D
27 103
27 103
1
27 103
1.0
1.0
1.0
5
4
3
2
1
D D
CPU_DP3_P0<9> CPU_DP3_N0<9>
CPU_DP3_P1<9>
CPU
HDMI2.0
C C
PS8338
B B
mDP
CPU_DP3_N1<9>
CPU_DP3_P2<9> CPU_DP3_N2<9>
PCH_DPD_HPD<19>
CPU_DP3_P3<9> CPU_DP3_N3<9>
CPU_DP3_AUXP<9>
CPU_DP3_AUXN<9>
SW2_DP2_ 2_P0<30>
SW2_DP2_ 2_N0<30>
SW2_DP2_ 2_HPD<30>
SW2_DP2_ 2_P1<30>
SW2_DP2_ 2_N1<30>
SW2_DP2_ 2_P2<30>
SW2_DP2_ 2_N2<30>
+3.3V_RU N +3.3V_RU N
UMA DGFF CON.
CPU_DP3 _P0 CPU_DP3 _N0
CPU_DP3 _P1 CPU_DP3 _N1
CPU_DP3 _P2 CPU_DP3 _N2
CPU_DP3 _P3 CPU_DP3 _N3
JDGFF4
A1
A1
A2
A2
A3
A3
A4
A4
A5
A5
A6
A6
A7
A7
A8
A8
A9
A9
A10
A10
B1
B1
B2
B2
B3
B3
B4
B4
B5
B5
B6
B6
B7
B7
B8
B8
B9
B9
B10
B10
C1
C1
C2
C2
C3
C3
C4
C4
C5
C5
C6
C6
C7
C7
C8
C8
C9
C9
C10
C10
D1
D1
D2
D2
D9
D9
D10
D10
1
NPTH1
2
NPTH2
UNIMI_FBGCAX 011
CONN@
P N G P N G P N G
P N G P N G P N G
P N
G
P N G P N
NPTH3 NPTH4
H1
P
H1
H2
N
H2
H3
G
H3
H4
P
H4
H5
N
H5
H6
G
H6
H7
P
H7
H8
N
H8
H9
G
H9
H10
H10
G1
GG
G1
G2
P
G2
G3
N
G3
G4
G
G4
G5
P
G5
G6
N
G6
G7
G
G7
G8
P
G8
G9
N
G9
G10
G
G10
F1
P
F1
MDP_CA_ DET
F2
N
F2
F3
G
F3
F4
P
F4
F5
N
F5
F6
G
F6
F7
P
F7
F8
N
F8
F9
F9
F10
F10
E1
E1
E2
E2
E9
E9
E10
E10
3 4
VGA_IDENTIFY <27,58>
MDP_CA_DET <30>
SW2_DP2_ 2_AUXP <30> SW2_DP2_ 2_AUXN <30>
SW2_DP2_ 2_P3 <30> SW2_DP2_ 2_N3 <3 0>
+3.3V_RU N
+5V_RUN+3.3V_RU N
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DGFF CONN.
DGFF CONN.
DGFF CONN.
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
28 103
28 103
28 103
1.0
1.0
1.0
5
+3.3V_RUN
D D
EDP_TXP0<9> EDP_TXN0<9> EDP_TXP1<9> EDP_TXN1<9>
CPU
C C
DSC DGFF
EDP_TXP2<9> EDP_TXN2<9> EDP_TXP3<9> EDP_TXN3<9>
EDP_AUXP<9> EDP_AUXN<9>
GPU_EDP_P0<27> GPU_EDP_N0<27> GPU_EDP_P1<27> GPU_EDP_N1<27> GPU_EDP_P2<27> GPU_EDP_N2<27> GPU_EDP_P3<27> GPU_EDP_N3<27>
GPU_EDP_AUXP<27> GPU_EDP_AUXN<27>
EDP_TXP0 EDP_TXN0 EDP_TXP1 EDP_TXN1 EDP_TXP2 EDP_TXN2 EDP_TXP3 EDP_TXN3
EDP_AUXP EDP_AUXN
GPU_EDP_P0 GPU_EDP_N0 GPU_EDP_P1 GPU_EDP_N1 GPU_EDP_P2 GPU_EDP_N2 GPU_EDP_P3 GPU_EDP_N3
GPU_EDP_AUXP GPU_EDP_AUXN
1 2
CV829 0.1U_0201_10V6K
1 2
CV830 0.1U_0201_10V6K
1 2
CV831 0.1U_0201_10V6K
1 2
CV832 0.1U_0201_10V6K
1 2
CV833 0.1U_0201_10V6K
1 2
CV834 0.1U_0201_10V6K
1 2
CV835 0.1U_0201_10V6K
1 2
CV836 0.1U_0201_10V6K
1 2
CV837 0.1U_0201_10V6K
1 2
CV838 0.1U_0201_10V6K
1 2
CV819 0.1U_0201_10V6K
1 2
CV820 0.1U_0201_10V6K
1 2
CV821 0.1U_0201_10V6K
1 2
CV822 0.1U_0201_10V6K
1 2
CV823 0.1U_0201_10V6K
1 2
CV824 0.1U_0201_10V6K
1 2
CV825 0.1U_0201_10V6K
1 2
CV826 0.1U_0201_10V6K
1 2
CV827 0.1U_0201_10V6K
1 2
CV828 0.1U_0201_10V6K
4
4.7U_0402_6.3V6M
0.1U_0201_10V6K
1
1
CV813
CV814
2
2
CPU_EDP_HPD<19>
GPU_EDP_HPD<27>
1
2
0.1U_0201_10V6K
CV815
0.1U_0201_10V6K
1
1
CV816
2
2
EDP_IN2_PEQ EDP_IN1_PEQ EDP_IN1_AEQ# EDP_IN2_AEQ#
EDP_TXP0_C EDP_TXN0_C EDP_TXP1_C EDP_TXN1_C EDP_TXP2_C EDP_TXN2_C EDP_TXP3_C EDP_TXN3_C
EDP_AUXP_C EDP_AUXN_C
GPU_EDP_P0_C GPU_EDP_N0_C GPU_EDP_P1_C GPU_EDP_N1_C GPU_EDP_P2_C GPU_EDP_N2_C GPU_EDP_P3_C GPU_EDP_N3_C
GPU_EDP_AUXP_C GPU_EDP_AUXN_C
CPU_EDP_HPD GPU_EDP_HPD
0.1U_0201_10V6K 82P_0402_50V8J
RF@
1
CV817
CV955
2
UV64
21
VDD33_1
26
VDD33_2
35
VDD33_3
49
VDD33_4
60
VDD33_5
51
IN2_PEQ/SCL_CTL
52
IN1_PEQ/SDA_CTL
59
IN1_AEQ#
58
IN2_AEQ#
1
IN1_D0p
2
IN1_D0n
4
IN1_D1p
5
IN1_D1n
6
IN1_D2p
7
IN1_D2n
9
IN1_D3p
10
IN1_D3n
28
IN1_AUXp
27
IN1_AUXn
23
IN1_SCL
22
IN1_SDA
11
IN2_D0p
12
IN2_D0n
14
IN2_D1p
15
IN2_D1n
16
IN2_D2p
17
IN2_D2n
19
IN2_D3p
20
IN2_D3n
30
IN2_AUXp
29
IN2_AUXn
25
IN2_SCL
24
IN2_SDA
3
IN1_HPD
13
IN2_HPD
PN change to SA000060U10
3
OUT_AUXp_SCL OUT_AUXn_SDA
I2C_CTL_EN
PI0 PC0 PC1
CA_DET
OUT_D0p OUT_D0n OUT_D1p
OUT_D1n OUT2_D2p OUT2_D2n
OUT_D3p
OUT_D3n
SW
OUT_HPD
REXT CEXT
GND1 GND2 GND3 GND4 GND5
Epad
PS8331BQFN60GTR-A0_QFN60_5X9
PD
SW1_EDP_AUXP
32
SW1_EDP_AUXN
31
53
EDP_SW1_PI0
56
EDP_SW1_PC0
38
EDP_SW1_PC1
55
48
RV832 1M_0402_5%
SW1_EDP_P0
46
SW1_EDP_N0
45
SW1_EDP_P1
43
SW1_EDP_N1
42
SW1_EDP_P2
40
SW1_EDP_N2
39
SW1_EDP_P3
37
SW1_EDP_N3
36
54
SW1_EDP_HPD
44
SW1_REXT
34
SW1_CET
47
8 18 33 41 57 61 50
1 2
SW1_EDP_AUXP <38> SW1_EDP_AUXN <38>
SW1_EDP_HPD <38>
1 2
SW
H
(Default)
L
SW1_EDP_P0 <38> SW1_EDP_N0 <38> SW1_EDP_P1 <38> SW1_EDP_N1 <38> SW1_EDP_P2 <38> SW1_EDP_N2 <38> SW1_EDP_P3 <38> SW1_EDP_N3 <38>
RV835
4.99K_0402_1%
Input
IN2
IN1
2
eDP Conn
L2N7002WT1G_SC-70-3
change SB00000UO00 to SB000009Q80/ SB00000ST00 as main source, SB00000UO00 as 3rd source
QV43
+3.3V_RUN
12
10K_0402_5%
13
D
S
EDP_SW1_PC0
EDP_SW1_PC1
EDP_IN1_AEQ#
EDP_IN2_AEQ#
EDP_IN1_PEQ
EDP_IN2_PEQ
EDP_SW1_PI0
SW1_CET
EDP_SW1_PI0
EDP_SW1_PC0
EDP_SW1_PC1
EDP_IN1_PEQ
EDP_IN2_PEQ
+3.3V_RUN
RV900
2
G
DGPU_SELECT#: 0=DGFF ; 1=i-GPU
1 2
RV822 4.7K_0402_5%@
1 2
RV823 4.7K_0402_5%@
1 2
RV824 4.7K_0402_5%@
1 2
RV825 4.7K_0402_5%@
1 2
RV826 4.7K_0402_5%@
1 2
RV827 4.7K_0402_5%@
1 2
RV828 4.7K_0402_5%@
12
CV818 2.2U_0402_6.3V6M
1 2
RV829 4.7K_0402_5%@
1 2
RV830 4.7K_0402_5%@
1 2
RV831 4.7K_0402_5%@
1 2
RV833 4.7K_0402_5%@
1 2
RV834 4.7K_0402_5%@
8.2K_0402_5%
12
RV901
DGPU_SELECT# <38,59>
From EC
1
+3.3V_RUN
INy_PEQ = Programmable input equalization levels L: default, LEQ, compensate channel loss up to 11.5dB @ HBR2 H: HEQ, compensate channel loss up to 14.5dB @ HBR2 M: LLEQ, compensate channel loss up to 8.5dB @ HBR2
B B
A A
5
INy_AEQ# = Automatic EQ disable L: Automatic EQ enable (default) H: Automatic EQ disable
PI0 = Auto test enable L: Auto test disable & input offset cancellation enable (default) H: Auto test enable & input offset cancellation enable M: Auto test disable & input offset cancellation disable
PC0 = AUX interception disable L: AUX interception enable, driver configuration is set by link training (default) H: AUX interception disable, driver output with fixed 800mV and 0dB M: AUX interception disable, driver output with fixed 400mV and 0dB
PC1 = Output swing adjustment L: default H: +20% M: -16.7%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
eDP MUX (PS8331)
eDP MUX (PS8331)
eDP MUX (PS8331)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
29 103
29 103
29 103
1.0
1.0
1.0
5
4
3
2
1
+3.3V_RUN
1 2
RV125 4.7K_0402_5%
D D
+3.3V_RUN
RV55
C C
RV56
B B
1 2
@
RV126 4.7K_0402_5%
1 2
RV127 4.7K_0402_5%
1 2
RV130 1M_0402_5%
1 2
RV131 1M_0402_5%
12
12
RV57
@
4.7K_0402_5%
4.7K_0402_5%
12
12
RV58
@
4.7K_0402_5%
4.7K_0402_5%
DP1_SW2_CFG0
DP1_SW2_SW
DP1_SW2_PI0
OUT1_CA_DET
MDP_CA_DET
CPU
12
12
RV59
RV61
@
4.7K_0402_5%
4.7K_0402_5%
12
12
RV62
RV60
@
@
4.7K_0402_5%
4.7K_0402_5%
12
12
RV65
RV63
@
@
4.7K_0402_5%
4.7K_0402_5%
12
RV64
RV66
@
@
4.7K_0402_5%
DP1_SW2_PI1
DP1_SW2_PC10
DP1_SW2_PC11
DP1_SW2_PC20
DP1_SW2_PC21
12
4.7K_0402_5%
CPU_DP2_P0<9> CPU_DP2_N0<9>
CPU_DP2_P1<9> CPU_DP2_N1<9>
CPU_DP2_P2<9> CPU_DP2_N2<9>
CPU_DP2_P3<9> CPU_DP2_N3<9>
PCH_DPC_CTRL_CLK<19> PCH_DPC_CTRL_DATA<19>
CPU_DP2_AUXP<9> CPU_DP2_AUXN<9>
CPU_DP2_P0 CPU_DP2_N0
CPU_DP2_P1 CPU_DP2_N1
CPU_DP2_P2 CPU_DP2_N2
CPU_DP2_P3 CPU_DP2_N3
PCH_DPC_CTRL_CLK PCH_DPC_CTRL_DATA CPU_DP2_AUXP
Port switching control or priority configuration. Internal pull down ~150KΩ, 3.3V I/O For Control Switching Mode (CFG0 = L): SW = L: Port1 is selected (default) SW = H: Port2 is selected
For Automatic Switching Mode (CFG0 = H): (By OUT1_HPD and OUT2_HPD) SW = L: Port1 has higher priority when both ports are plugged (default)
SW = H: Port2 has higher priority when both ports are plugged
CV65 0.1U_0201_10V6K CV66 0.1U_0201_10V6K
CV67 0.1U_0201_10V6K CV68 0.1U_0201_10V6K
CV69 0.1U_0201_10V6K CV70 0.1U_0201_10V6K
CV71 0.1U_0201_10V6K CV72 0.1U_0201_10V6K
CV73 0.1U_0201_10V6K CV74 0.1U_0201_10V6K
CV62 CV90 close to pin30 &57 CV66,CV69,CV70 close to pin5,21,51
0.01U_0402_16V7K
0.01U_0402_16V7K
12
12
CV61
CV60
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
PCH_DPC_HPD<19>
1 2 1 2
0.1U_0201_25V6K
12
12
CV62
CPU_DP2_P0_C CPU_DP2_N0_C
CPU_DP2_P1_C CPU_DP2_N1_C
CPU_DP2_P2_C CPU_DP2_N2_C
CPU_DP2_P3_C CPU_DP2_N3_C
CPU_DP2_AUXP_C CPU_DP2_AUXN_CCPU_DP2_AUXN
0.1U_0201_25V6K
0.1U_0201_25V6K
12
CV63
DP1_SW2_PI1 DP1_SW2_PI0
DP1_SW2_CFG0
DP1_SW2_PC10 DP1_SW2_PC11 DP1_SW2_PC20 DP1_SW2_PC21
+3.3V_RUN
CV64
UV8
5
VDD33_1
21
VDD33_2
30
VDD33_3
51
VDD33_4
57
VDD33_5
6
IN_D0p
7
IN_D0n
9
IN_D1p
10
IN_D1n
12
IN_D2p
13
IN_D2n
15
IN_D3p
16
IN_D3n
4
IN_CA_DET
3
IN_HPD
2
I2C_CTL_EN
1
Pl1/SCL_CTL
60
Pl0/SDA_CTL
22
IN_DDC_SCL
23
IN_DDC_SDA
24
IN_AUXp
25
IN_AUXn
59
CFG0
58
CFG1
56
PC10
55
PC11
54
PC20
53
PC21
11
GND_1
19
GND_2
52
GND_3
61
PAD(GND)
PS8338BQFN60GTR-A1_QFN60_5X9
H L
CFG0
V
VSW
OUT1_D0p OUT1_D0n
OUT1_D1p OUT1_D1n
OUT1_D2p OUT1_D2n
OUT1_D3p OUT1_D3n
OUT2_D0p OUT2_D0n
OUT2_D1p OUT2_D1n
OUT2_D2p OUT2_D2n
OUT2_D3p OUT2_D3n
OUT1_AUXp_SCL
OUT1_AUXn_SDA
OUT2_AUXp_SCL
OUT2_AUXn_SDA
OUT1_CA_DET
OUT1_HPD
OUT2_CA_DET
OUT2_HPD
PEQ
CEXT REXT
SW
PD
50 49
47 46
45 44
42 41
40 39
37 36
35 34
32 31
26 27
28 29
43 48
33 38
18 8 14 17 20
DP1_SW2_SW DP1_SW2_PEQDP1_SW2_PEQ
RV50
SW2_DP2_1_P0 SW2_DP2_1_N0
SW2_DP2_1_P1 SW2_DP2_1_N1
SW2_DP2_1_P2 SW2_DP2_1_N2
SW2_DP2_1_P3 SW2_DP2_1_N3
SW2_DP2_1_AUXP
SW2_DP2_1_AUXN
OUT1_CA_DET SW2_DP2_1_HPD
MDP_CA_DET
2.2U_0402_6.3V6M
12
12
4.99K_0402_1%
SW2_DP2_1_P0 <31> SW2_DP2_1_N0 <31>
SW2_DP2_1_P1 <31> SW2_DP2_1_N1 <31>
SW2_DP2_1_P2 <31> SW2_DP2_1_N2 <31>
SW2_DP2_1_P3 <31> SW2_DP2_1_N3 <31>
SW2_DP2_2_P0 <28> SW2_DP2_2_N0 <28>
SW2_DP2_2_P1 <28> SW2_DP2_2_N1 <28>
SW2_DP2_2_P2 <28> SW2_DP2_2_N2 <28>
SW2_DP2_2_P3 <28> SW2_DP2_2_N3 <28>
SW2_DP2_1_AUXP <31> SW2_DP2_1_AUXN <31>
SW2_DP2_2_AUXP <28>
SW2_DP2_2_AUXN <28>
SW2_DP2_1_HPD <31>
MDP_CA_DET <28> SW2_DP2_2_HPD <28>
CV75
TBT/MUX2
UMA DGFF
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DP DeMUX (PS8338)
DP DeMUX (PS8338)
DP DeMUX (PS8338)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
30 103
30 103
30 103
1.0
1.0
1.0
5
4
3
2
1
+3.3V_RUN
GPU_DP1_P0<27> GPU_DP1_N0<27>
GPU_DP1_P1<27>
D D
DSC DGFF
CPU
GPU_DP1_AU XP<27> GPU_DP1_AU XN<27>
CPU_DP1_A UXP<9>
C C
CPU_DP1_A UXN<9>
GPU_DP1_N1<27>
GPU_DP1_P2<27> GPU_DP1_N2<27>
GPU_DP1_P3<27> GPU_DP1_N3<27>
CPU_DP1_P 0<9> CPU_DP1_N 0<9>
CPU_DP1_P 1<9> CPU_DP1_N 1<9>
CPU_DP1_P 2<9> CPU_DP1_N 2<9>
CPU_DP1_P 3<9> CPU_DP1_N 3<9>
SW
GPU_DP1_P0 GPU_DP1_N0 GPU_DP1_N0 _C
GPU_DP1_P1 GPU_DP1_N1
GPU_DP1_P2 GPU_DP1_N2
GPU_DP1_P3 GPU_DP1_N3
CPU_DP1_P 0 CPU_DP1_P 0_C CPU_DP1_N 0
CPU_DP1_P 1 CPU_DP1_N 1
CPU_DP1_P 2 CPU_DP1_N 2 CPU_DP1_N2_C
CPU_DP1_P 3 CPU_DP1_N 3 CPU_DP1_N3_C
CV945 0.1U_0201_10V6K CV946 0.1U_0201_10V6K
CPU_DP1_A UXP CPU_DP1_A UXN
CV876 0.1U_0201_10V6K CV877 0.1U_0201_10V6K
DP1_GPU_SEL#
0 DGFF
(Default)
CPU1
12
CV860 0.22U_0201_6.3V 6K
12
CV861 0.22U_0201_6.3V 6K
12
CV862 0.22U_0201_6.3V 6K
12
CV863 0.22U_0201_6.3V 6K
12
CV864 0.22U_0201_6.3V 6K
12
CV865 0.22U_0201_6.3V 6K
12
CV866 0.22U_0201_6.3V 6K
12
CV867 0.22U_0201_6.3V 6K
12
CV868 0.22U_0201_6.3V 6K
12
CV869 0.22U_0201_6.3V 6K
12
CV870 0.22U_0201_6.3V 6K
12
CV871 0.22U_0201_6.3V 6K
12
CV872 0.22U_0201_6.3V 6K
12
CV873 0.22U_0201_6.3V 6K
12
CV874 0.22U_0201_6.3V 6K
12
CV875 0.22U_0201_6.3V 6K
DP1_SW 1_REXT
RV861
4.99K_0402 _1%
1 2
1 2 1 2
1 2 1 2
GPU_DP1_HP D<27>
PCH_DPB_H PD<19>
DP1_GPU_SE L#<59>
GPU_DP1_P0 _C
GPU_DP1_P1 _C GPU_DP1_N1 _C
GPU_DP1_P2 _C GPU_DP1_N2 _C
GPU_DP1_P3 _C GPU_DP1_N3 _C
CPU_DP1_N 0_C
CPU_DP1_P 1_C CPU_DP1_N 1_C
CPU_DP1_P 2_C
CPU_DP1_P 3_C
I2C_ADDR_MUX 1
GPU_DP1_AU XP_C GPU_DP1_AU XN_C
CPU_DP1_A UXP_C CPU_DP1_A UXN_C
GPU_DP1_HP D
PCH_DPB_H PD
MUX1_IN1_EQ0 MUX1_IN1_EQ1 MUX1_IN2_EQ0 MUX1_IN2_EQ1
DP1_GPU_SE L#
0.1U_0201_10V6K
1U_0201_10V6M
CV940
1
1
CV939
2
2
UV66
4
IN1_D0p
5
IN1_D0n
7
IN1_D1p
8
IN1_D1n
10
IN1_D2p
11
IN1_D2n
12
IN1_D3p
13
IN1_D3n
14
IN2_D0p
15
IN2_D0n
17
IN2_D1p
18
IN2_D1n
20
IN2_D2p
21
IN2_D2n
22
IN2_D3p
23
IN2_D3n
31
REXT
34
CSCL
33
CSDA
6
I2C_ADDR
66
IN1_SCL
65
IN1_SDA
62
IN1_AUXp
61
IN1_AUXn
64
IN2_SCL
63
IN2_SDA
60
IN2_AUXp
59
IN2_AUXn
16
IN1_HPD
19
IN2_HPD
40
IN1_EQ0
41
IN1_EQ1
38
IN2_EQ0
39
IN2_EQ1
9
SW
30
PD#
PS8461QFN66 GTR-A0_QFN66_5X1 0
PS8461QFN66GTR-A0 change to A4
DSC DGFF
B B
A A
+3.3V_RUN
1 2
5
12
RV8624.7K _0402_5% @
12
RV8644.7K _0402_5%
12
RV8654.7K _0402_5% @
12
RV8664.7K _0402_5% @
12
RV8674.7K _0402_5% @
12
RV869100K_0402_5%
12
RV8874.7K _0402_5%
12
RV8884.7K _0402_5%
12
RV8864.7K _0402_5% @
12
RV8854.7K _0402_5% @
12
RV8934.7K _0402_5%
12
RV8714.7K _0402_5%
12
RV8724.7K _0402_5% @
12
RV8734.7K _0402_5% @
12
RV8744.7K _0402_5% @
12
RV8944.7K _0402_5%
12
RV8754.7K _0402_5% @
12
RV8684.7K _0402_5% @
12
RV8634.7K _0402_5% @
12
RV8844.7K _0402_5% @
12
RV889100K_0402_5%
12
RV897100K_0402_5% @
12
RV903100K_0402_5% @
RV8961M _0402_5%
I2C_ADDR_MUX 2
MUX2_IN1_EQ0
MUX2_IN1_EQ1
MUX2_IN2_EQ0
MUX2_IN2_EQ1
SW4_D P2_AUXN
MUX2_CFG0
MUX2_CFG1
MUX2_CFG2
MUX2_CFG3
MUX2_CFG4
MUX2_CFG0
MUX2_CFG1
MUX2_CFG2
MUX2_CFG3
MUX2_CFG4
MUX2_IN1_EQ0
MUX2_IN1_EQ1
MUX2_IN2_EQ0
MUX2_IN2_EQ1
MID2_CA_DET
SW4_D P2_AUXP
GPU_DP2_HP D
SW2_D P2_1_HPD
DEMUX
VDDA12_A VDDRX12_ A VDD12_A
VDD33_A
1
VDD33_12VDD33_229VDD12_132VDD12_2
VDD_DDC
MUX1
GPU_DP2_P0<27> GPU_DP2_N0<27>
GPU_DP2_P1<27> GPU_DP2_N1<27>
GPU_DP2_P2<27> GPU_DP2_N2<27>
GPU_DP2_P3<27> GPU_DP2_N3<27>
GPU_DP2_AU XP<27> GPU_DP2_AU XN<27>
SW2_D P2_1_AUXP<30> SW2_D P2_1_AUXN<30>
4
VDDTX12_A
1 2
LV4 BLM18KG331SN1D_2P
56
43
24
55
VDDA12
VDDTX12_142VDDTX12_2
VDDRX12_13VDDRX12_2
OUT_AUXn_SDA
GPU_DP2_P0 GPU_DP2_N0 GPU_D P2_N0_C
GPU_DP2_P1 GP U_DP2_P1_C GPU_DP2_N1
GPU_DP2_P2 GPU_DP2_N2
GPU_DP2_P3 GP U_DP2_P3_C GPU_DP2_N3
SW2_D P2_1_P0<30>
SW2_D P2_1_N0<30>
SW2_D P2_1_P1<30>
SW2_D P2_1_N1<30>
SW2_D P2_1_P2<30>
SW2_D P2_1_N2<30>
SW2_D P2_1_P3<30>
SW2_D P2_1_N3<30>
SW2_D P2_1_P0
SW2_D P2_1_P1
SW2_D P2_1_P2 SW2_D P2_1_N2
SW2_D P2_1_P3 SW2_D P2_1_N3
SW2_D P2_1_AUXP SW2_D P2_1_AUXN S W2_DP2 _1_AUXN_C
54
OUT_D0p
53
OUT_D0n
51
OUT_D1p
50
OUT_D1n
48
OUT_D2p
47
OUT_D2n
45
OUT_D3p
44
OUT_D3n
28
CFG0
27
CFG1
26
CFG2
25
CFG3
46
CFG4
58
OUT_AUXp_SCL
57
52
DP_CADET
49
OUT_HPD
37
RSV0
36
RSV1
35
RSV2
67
EPAD(GND)
CV883 0.22U_0201_6.3V6K CV884 0.22U_0201_6.3V6K
CV885 0.22U_0201_6.3V6K CV886 0.22U_0201_6.3V6K
CV887 0.22U_0201_6.3V6K CV888 0.22U_0201_6.3V6K
CV889 0.22U_0201_6.3V6K CV890 0.22U_0201_6.3V6K
CV891 0.22U_0201_6.3V6K CV892 0.22U_0201_6.3V6K
CV893 0.22U_0201_6.3V6K CV894 0.22U_0201_6.3V6K
CV895 0.22U_0201_6.3V6K CV896 0.22U_0201_6.3V6K
CV897 0.22U_0201_6.3V6K CV898 0.22U_0201_6.3V6K
1 2
CV944 0.1U_0201_10V6K
1 2
CV943 0.1U_0201_10V6K
1 2
@
1 2
RV808 0_04 02_5%
@
RV809 0_04 02_5%
SW2_D P2_1_HPD<30>
MUX1_CFG0 MUX1_CFG1 MUX1_CFG2 MUX1_CFG3 MUX1_CFG4
SW3_D P1_AUXP SW3_D P1_AUXN
MID1_CA_DET
1
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
4.99K_0402 _1%
GPU_DP2_HP D<27>
SW3_DP1_P0 <42> SW3_DP1_N0 <42>
SW3_DP1_P1 <42> SW3_DP1_N1 <42>
SW3_DP1_P2 <42> SW3_DP1_N2 <42>
SW3_DP1_P3 <42> SW3_DP1_N3 <42>
@
T315
PAD~D
RV870
DP2_GPU_SE L#<59>
SW3_D P1_AUXP <4 2> SW3_D P1_AUXN <42>
SW3_D P1_HPD <42>
+3.3V_RUN
GPU_DP2_P0 _C
GPU_DP2_N1 _C
GPU_DP2_P2 _C GPU_DP2_N2 _C
GPU_DP2_N3 _C
SW2_D P2_1_P0_C SW2_D P2_1_N0_CSW2_DP2 _1_N0
SW2_D P2_1_P1_C SW2_D P2_1_N1_CSW2_DP2 _1_N1
SW2_D P2_1_P2_C SW2_D P2_1_N2_C
SW2_D P2_1_P3_C SW2_D P2_1_N3_C
DP2_SW 1_REXT
I2C_ADDR_MUX 2
1 2
GPU_DP2_AU XP_C GPU_DP2_AU XN_C
SW2_D P2_1_AUXP_ C
GPU_DP2_HP D
SW2_D P2_1_HPD
MUX2_IN1_EQ0 MUX2_IN1_EQ1 MUX2_IN2_EQ0 MUX2_IN2_EQ1
DP2_GPU_SE L#
3
0.1U_0201_10V6K
4.7U_0402_6.3V6M
1
1
CV854
2
2
TBT/DP
0.1U_0201_10V6K
1
CV941
2
UV67
4
IN1_D0p
5
IN1_D0n
7
IN1_D1p
8
IN1_D1n
10
IN1_D2p
11
IN1_D2n
12
IN1_D3p
13
IN1_D3n
14
IN2_D0p
15
IN2_D0n
17
IN2_D1p
18
IN2_D1n
20
IN2_D2p
21
IN2_D2n
22
IN2_D3p
23
IN2_D3n
31
REXT
34
CSCL
33
CSDA
6
I2C_ADDR
66
IN1_SCL
65
IN1_SDA
62
IN1_AUXp
61
IN1_AUXn
64
IN2_SCL
63
IN2_SDA
60
IN2_AUXp
59
IN2_AUXn
16
IN1_HPD
19
IN2_HPD
40
IN1_EQ0
41
IN1_EQ1
38
IN2_EQ0
39
IN2_EQ1
9
SW
30
PD#
PS8461QFN66 GTR-A0_QFN66_5X1 0
PS8461QFN66GTR-A0 change to A4
+3.3V_RUN
0.01U_0402_16V7K
0.1U_0201_10V6K
1
CV855
0.01U_0402_16V7K
12
12
CV857
CV856
CV858
2
1U_0201_10V6M
1
VDD33_B
VDDA12_B VDDRX1 2_B
CV942
VDD12_B
2
1
56
43
VDDA12
VDD33_12VDD33_229VDD12_132VDD12_2
VDD_DDC
MUX2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
I2C_ADDR_MUX 1
MUX1_IN1_EQ1
MUX1_IN2_EQ1
MUX1_IN1_EQ0
MUX1_IN2_EQ0
SW3_D P1_AUXN
MUX1_CFG0
MUX1_CFG1
MUX1_CFG2
MUX1_CFG3
MUX1_CFG4
MUX1_CFG0
MUX1_CFG1
MUX1_CFG2
MUX1_CFG3
MUX1_CFG4
MUX1_IN1_EQ1
MUX1_IN2_EQ1
MUX1_IN1_EQ0
MUX1_IN2_EQ0
MID1_CA_DET
SW3_D P1_AUXP
GPU_DP1_HP D
PCH_DPB_H PD
1 2
LV9 BLM18KG331SN1D_2P
VDDTX12_B
24
55
VDDTX12_142VDDTX12_2
VDDRX12_13VDDRX12_2
OUT_D0p OUT_D0n
OUT_D1p OUT_D1n
OUT_D2p OUT_D2n
OUT_D3p OUT_D3n
CFG0 CFG1 CFG2 CFG3 CFG4
OUT_AUXp_SCL OUT_AUXn_SDA
DP_CADET
OUT_HPD
RSV0 RSV1 RSV2
EPAD(GND)
2016/01/01
2016/01/01
2016/01/01
54 53
51 50
48 47
45 44
28 27 26 25 46
58 57
52
49
37 36 35
67
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
1 2
RV849 4.7K _0402_5%@
1 2
RV850 4.7K _0402_5%@
1 2
RV851 4.7K _0402_5%@
1 2
RV852 4.7K _0402_5%
1 2
RV853 4.7K _0402_5%@
1 2
RV855 100K _0402_5%
1 2
RV879 4.7K _0402_5%
1 2
RV878 4.7K _0402_5%
1 2
RV877 4.7K _0402_5%@
1 2
RV848 4.7K _0402_5%@
1 2
RV891 4.7K _0402_5%
1 2
RV876 4.7K _0402_5%
1 2
RV856 4.7K _0402_5%@
1 2
RV857 4.7K _0402_5%@
1 2
RV858 4.7K _0402_5%@
1 2
RV892 4.7K _0402_5%
1 2
RV882 4.7K _0402_5%@
1 2
RV880 4.7K _0402_5%@
1 2
RV881 4.7K _0402_5%@
1 2
RV883 4.7K _0402_5%@
1 2
RV895 1M_ 0402_5%
1 2
RV890 100K _0402_5%
1 2
RV898 100K _0402_5%@
1 2
RV902 100K _0402_5%@
4.7U_0402_6.3V6M
1
1
CV878
2
2
SW4_DP2_P0 <42> SW4_DP2_N0 < 42>
SW4_DP2_P1 <42> SW4_DP2_N1 < 42>
SW4_DP2_P2 <42> SW4_DP2_N2 < 42>
SW4_DP2_P3 <42> SW4_DP2_N3 < 42>
MUX2_CFG0 MUX2_CFG1 MUX2_CFG2 MUX2_CFG3 MUX2_CFG4
SW4_D P2_AUXP SW4_D P2_AUXN
MID2_CA_DET
1
Deciphered Date
Deciphered Date
Deciphered Date
0.1U_0201_10V6K
CV879
PAD~D
+3.3V_RUN
0.1U_0201_10V6K
1
12
CV880
2
SW4_D P2_HPD <42>
@
T316
+3.3V_RUN
0.01U_0402_16V7K
0.01U_0402_16V7K
12
CV882
CV881
TBT/DP
SW4_D P2_AUXP < 42> SW4_D P2_AUXN <42>
2017/01/01
2017/01/01
2017/01/01
VDD12_A
VDDRX12_A
VDDTX12_A
VDDA12_A
VDD12_B
VDDRX12_B
VDDTX12_B
VDDA12_B
+1.2V_RUN
1 2
LV5
BLM18KG33 1SN1D_2P
0.01U_0402_16V7K
0.1U_0201_10V6K
4.7U_0402_6.3V6M
1
1
1
CV951
CV950
2
2
2
4.7U_0402_6.3V6M
0.1U_0201_10V6K
1
1
1
CV910
CV908
2
2
2
4.7U_0402_6.3V6M
0.1U_0201_10V6K
1
1
1
CV914
CV913
2
2
2
4.7U_0402_6.3V6M
0.1U_0201_10V6K
1
1
1
CV919
CV918
2
2
2
4.7U_0402_6.3V6M
0.1U_0201_10V6K
1
1
CV924
CV922
2
2
0.1U_0201_10V6K
4.7U_0402_6.3V6M
1
1
CV927
CV928
2
2
0.1U_0201_10V6K
4.7U_0402_6.3V6M
1
1
CV932
CV933
2
2
0.1U_0201_10V6K
4.7U_0402_6.3V6M
1
1
CV937
CV936
2
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
MUX PS8461
MUX PS8461
MUX PS8461
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
0.01U_0402_16V7K
0.1U_0201_10V6K
12
12
CV947
CV901
CV948
+1.2V_RUN
1 2
LV6
BLM18KG33 1SN1D_2P
0.01U_0402_16V7K
0.1U_0201_10V6K
0.01U_0402_16V7K
12
12
CV949
CV909
CV952
+1.2V_RUN
1 2
LV7
BLM18KG33 1SN1D_2P
0.01U_0402_16V7K
0.01U_0402_16V7K
0.1U_0201_10V6K
12
12
CV912
CV911
CV915
+1.2V_RUN
1 2
LV8
BLM18KG33 1SN1D_2P
0.01U_0402_16V7K
1U_0201_10V6M
CV917
12
CV916
+1.2V_RUN
1 2
LV10
BLM18KG33 1SN1D_2P
0.1U_0201_10V6K
0.01U_0402_16V7K
0.01U_0402_16V7K
1
12
12
CV923
CV921
CV920
2
0.1U_0201_10V6K
1
12
CV929
2
0.1U_0201_10V6K
1
12
CV934
2
1U_0201_10V6M
CV938
1
12
LV11
0.01U_0402_16V7K
CV925
LV12
0.01U_0402_16V7K
CV930
LV13
0.01U_0402_16V7K
CV935
1 2
BLM18KG33 1SN1D_2P
0.01U_0402_16V7K
12
CV926
1 2
BLM18KG33 1SN1D_2P
0.01U_0402_16V7K
12
CV931
1 2
BLM18KG33 1SN1D_2P
+1.2V_RUN
+1.2V_RUN
+1.2V_RUN
2
31 10 3
31 10 3
1
31 10 3
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DGPU
DGPU
DGPU
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
32 103
32 103
32 103
1
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DGPU
DGPU
DGPU
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
33 103
33 103
33 103
1
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DGPU
DGPU
DGPU
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
34 103
34 103
34 103
1
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DGPU
DGPU
DGPU
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
35 103
35 103
35 103
1
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DGPU
DGPU
DGPU
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
36 103
36 103
36 103
1
1.0
1.0
1.0
2
B B
1
Reserve
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DGPU
DGPU
DGPU
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
37 103
37 103
37 103
1.0
1.0
1.0
A
same 111H40-100100-G4-R
CONN@
ACES_50398-04 041-001
1 1
41 42 43 44 45
2 2
+BL_PWR _SRC +LC DVDD
0.1U_0402_50V7K
2
CV849
1
Close to JEDP1
Close to JEDP1
DMIC_CLK
DMIC0
3 3
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
G1
37
37
G2
38
38
G3
39
39
G4
40
40
G5
JEDP1
0.1U_0201_25V6K
CV20
1
2
ESD@
DV4
2
3
AZ5125-02S.R7G_ SOT23-3
1
USB20_N11<15>
USB20_P11<15>
USB20_N11_ R USB20_P11_ R
DISP_ON
+BL_PWR _SRC
+LCDVDD
+CAMERA_VDD
+3.3V_RUN_R
DMIC_CLK
DMIC0
1 2
LV1
EMI@
SW1_EDP_ AUXP_C
SW1_EDP_ AUXN_C
SW1_EDP_ N3_C
SW1_EDP_ P3_C
SW1_EDP_ N2_C
SW1_EDP_ P2_C
SW1_EDP_ N1_C
SW1_EDP_ P1_C
SW1_EDP_ N0_C
SW1_EDP_ P0_C
BLM15PX221SN1 D_2P
LCD_CBL_D ET# <19>
LCD_TST <58>
SW1_EDP_ HPD <2 9>
DID2_GPIO1_MUX
DID2_GPIO2 <59>
1 2
EMC request change main source to SM070003Z00
DMIC_CLK <56>
DMIC0 <5 6>
CAM_MIC_CBL_DET # <14>
BIA_PWM
1 2
RV737 0_0201_ 5%
1 2
RV738 0_0201_ 5%@
12
CV10 .1U_0201_10V6K
12
CV20 .1U_0201_10V6K
12
CV30 .1U_0201_10V6K
12
CV40 .1U_0201_10V6K
12
CV50 .1U_0201_10V6K
12
CV60 .1U_0201_10V6K
12
CV8450.1U_02 01_10V6K
12
CV8460.1U_02 01_10V6K
12
CV8470.1U_02 01_10V6K
12
CV8480.1U_02 01_10V6K
LV2
EMI@
MCM1012B90 0F06BP_4P
SW1_EDP_ AUXN
SW1_EDP_ AUXP
SW1_EDP_ HPD
PS8331 HPD input internal PD 150K
34
DID2_GPIO1_HDR
DID2_GPIO1_HDR
DID2_GPIO1
SW1_EDP_ AUXP <29>
SW1_EDP_ AUXN <29>
SW1_EDP_ N3 <29> SW1_EDP_ P3 <29> SW1_EDP_ N2 <29> SW1_EDP_ P2 <29> SW1_EDP_ N1 <29> SW1_EDP_ P1 <29> SW1_EDP_ N0 <29> SW1_EDP_ P0 <29>
B
+3.3V_RUN
12
QV44A
1 6
L2N7002DW 1T1G_SC88-6
2
3
1
+3.3V_RUN
12
RV840100K_0402_ 5%
12
RV842100K_0402_ 5%
+LCDVDD
12
RV74.7K_0402 _5% @
10K_0402_5 %
2
RV742 0_0201_ 5%
USB20_N11_ R
USB20_P11_ R
ESD@
PESD5V0U2BT_ SOT23-3
12
DID2_GPIO1_R
4 3
1 2
HDR monitor for AMD/NV/UMA edp output detect 1/29
DV41
+3.3V_RUN
RV739
@
RV740 10K_0402_5 %
1 2
5
RV741 1K_0402 _5%
QV44B L2N7002DW 1T1G_SC88-6
DGPU_TYPE# <27>
BIA_PWM
RV839
4.7K_0402_5%
C
21
DV35
RB751VM-40TE -17_SOD323-2
DV36
RB751VM-40TE -17_SOD323-2
DV37
RB751VM-40TE -17_SOD323-2
DMIC_CLK
CV842 100P _0402_50V8J@EMI@
DMIC0
CV843 100P _0402_50V8J@EMI@
21
UV65
1
OE
Vcc
2
IN A
3
GND
OUT Y
21
21
21
1 2
1 2
12
DISP_ON
12
RV836
4.7K_0402_5%
DID2_GPIO1 <59>
RB751VM-40TE -17_SOD323-2
CV844
0.1U_0201_ 10V6K
DV39
RB751VM-40TE -17_SOD323-2
RB751VM-40TE -17_SOD323-2
DV38
+3.3V_RUN
5
12
4
21
M74VHC1GT12 5DF2G_SC70-5
PN change to SA00000RY00
DV40
For BL_PWR_SRC & LCDVDD monitor
+BL_PWR _SRC +LC DVDD+3.3V_ALW
12
RV907
4.3M_0402_1 %
12
2
RV908 3M_0402_1 %
RV907 change to 4.3M 1/21 RV908 change to 3M 4/8
12
RV909 100K_0402_ 5%
QV23A
1 6
L2N7002DW 1T1G_SC88-6
12
5
QV23B
4 3
L2N7002DW 1T1G_SC88-6
RV910 100K_0402_ 5%
PANEL_BKEN_PC H <14>
DGFF_PANEL_BKEN <2 7>
PANEL_BKEN_EC <5 8>
BIA_PWM_PCH <14 >
DGPU_SELECT # <29,59 >
DGFF_BIA_PWM <27>
BIA_PWM_EC <58>
12
RV911 1M_0402_1 %
Keep PANEL_MONITOR voltage on 3V,Change to 1M 3/29
PANEL_MONITOR <58>
D
TOUCH_SCR EEN_DET#
+3.3V_RUN
3.3V_TS_EN<58>
PCH_3.3V_TS_EN<19>
12
RV8 10K_04 02_5%
USB20_N9_R USB20_P9_R
TOUCH_SCR EEN_PD#<17>
TOUCH_SCR EEN_DET#<17>
+5V_TSP_+3.3 V_TSP
140mA
1 2
RV326 10 0K_0402_5%
USB20_P9<15 >
USB20_N9<15>
3.3V_TS_EN_R
@
1 2
RV323 0_0402_ 5%
@
1 2
RV324 0_0402_ 5%
Close to JTS1
+3.3V_RUN
0.1U_0201_25V6K
1
CV850
2
USB20_N9_R
USB20_P9_R
Touch Screen
TOUCH_SCR EEN_PD# TOUCH_SCR EEN_DET#
+5V_TSP_+3.3V_TSP
Reserve for FUSE locatiom
+5V_RUN
47K_0402_5%
2 1
RV6
+5V_TSP_+3.3 V_TSP_F
1 2
RZ546 0_02 01_5%@
L2N7002WT1G_SC-70-3
13
D
QV7
2
G
S
MCM1012B90 0F06BP_4P
1 2
LV3
EMI@
@ESD@
DV30
2
1
3
PESD5V0U2BT_ SOT23-3
E
JTS1
1
1
2
2
3
3
4
4
5
5
G1
6
6
G2
CVILU_CI1106M1HR G-NH
CONN@
back to TS only
1A_65V_T0603FF1000TM
FV3
Remove RV899
Material shortage SB00000QP00 change to SB00000T900 1/15
12
34
7 8
QV8 PJ2301_SOT2 3-3
1 3
D
2
USB20_P9_R
USB20_N9_R
+5V_RUN
S
G
@
0.1U_0201_25V6K
1
CV953
2
Webcam PWR CTRL
1 2
10U_0402_6.3V6M
@
CZ510
1
2
Close to JEDP1
+CAMERA_VDD
RF@
0.1U_0201_25V6K
10P_0402_50V8J
CZ511
CZ512
1
1 2
2
+19.5VB
follow naming rule
+BL_PWR _SRC
Change fuse to 0603 package T0603FF1000TM 1/18
21
Material shortage SB000010C00
60mil
follow naming rule
+19.5VB
1U_0603_50V6K
CV13
1
2
0.01U_0402_50V7K
1
CV14
2
Panel backlight power control by EC
B
change to SB000008S80 1/15
100K_0402_5%
12
RV4
BL_PWR_ SRC_ON
1 2
RV5 47K_04 02_5%
EN_INVPWR<58>
QV1 AO6405_TSOP6
S
4
G
3
D
6 5 2 1
QV2 L2N7002W T1G_SC-70-3
1 3
D
FV1 1A_65V_T0603FF1 000TM
Add net name
+BL_PWR _SRC_F
60mil
0.1U_0402_50V7K
82P_0402_50V8J
CV839
CV15
1
2
1
Issued Date
Issued Date
Issued Date
RF@
2
S
change SB00000UO00 to SB000009Q80/
G
2
SB00000ST00 as main source, SB00000UO00 as 3rd source
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
RF require
+BL_PWR _SRC
82P_0402_50V8J
RF@
1
CV840
2
2016/01/01
2016/01/01
2016/01/01
22P_0402_50V8J
1
2
LCD Power
RF@
RF@
CV851
CV841
1 2
Compal Secret Data
Compal Secret Data
Compal Secret Data
RF require
+LCDVDD
10P_0402_50V8J
RF@
82P_0402_50V8J
1
CV852
2
Deciphered Date
Deciphered Date
Deciphered Date
+LCDVDD
CV16
10U_0402_ 6.3V6M
12
RF@
2.2P_0402_50V8C
1
CV853
2
RV843 100K _0402_5%@
ENVDD_PCH<14>
LCD_VCC_TE ST_EN<58 >
DGFF_ENVDD<27>
+EDP_VDD JUMP@
PJP12
1 2
PAD-OPEN1x1m
1 2
DV42
RB751VM-40TE -17_SOD323-2
2 1
2
3
DV3
BAT54CW_ SOT323-3
1
VOUT
2
GND
3
/OC
G524B1T11U _SOT23-5
1
+3.3V_ALW
UV24
5
VIN
4
EN
100K_0402_5%
12
RV3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2017/01/01
2017/01/01
2017/01/01
D
Title
eDP / CAM / TS
eDP / CAM / TS
eDP / CAM / TS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
E
38 103
38 103
38 103
1.0
1.0
1.0
Align NB reserve fuse FZ3, FZ4 location and netname 3/29
+3.3V_RUN_R
1 2
RZ551 0 _0603_5%
+3.3V_RUN
FZ1
1A_65V_T0603FF1 000TM
Reserve for FUSE locatiom
0.1U_0201_25V6K
0.1U_0201_25V6K
CZ509
1
1
2
2
JIR1
4 4
1
1
2
2
3
3
4
4
5
5
6
6
7
GND1
8
GND2
ACES_50208-00 60N-P01
CONN@
21
@
CV954
IR_CAM_DET# <18 >
+IR_F
Add net name
+3.3V_RUN_R_ F
QZ1
PJ2301_SOT2 3-3
S
Material shortage SB00000QP00 change to SB00000T900 1/15
A
G
RZ550 0_0603_5%
D
+CAMERA_VDD_F
13
2
RZ545
@
0_0201_5%
1 2
3.3V_CAM_EN# <17>
Reserve for FUSE locatiom
FZ2
21
1A_65V_T0603FF1 000TM
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DP
DP
DP
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
39 103
39 103
39 103
1
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
HDMI2.0
HDMI2.0
HDMI2.0
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
40 103
40 103
40 103
1
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
CRT
CRT
CRT
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
41 103
41 103
41 103
1
1.0
1.0
1.0
5
4
3
2
1
+3.3V_TBT_LC
12
CT1
RT1
1 2
3.3K_0402_5%
0.1U_0201_10V6K
PCIE_PTX_TRX_N1
PCIE_PTX_TRX_P 2 PCIE_PTX_TRX_N2
PCIE_PTX_TRX_P 3 PCIE_PTX_TRX_N3
PCIE_PTX_TRX_P 4 PCIE_PTX_TRX_N4
SW3_D P1_N0< 31> SW3_D P1_P0<31>
SW3_D P1_P1<31> SW3_D P1_N1< 31>
SW3_D P1_P2<31> SW3_D P1_N2< 31>
SW3_D P1_P3<31> SW3_D P1_N3< 31>
SW3_D P1_AUXP<31> SW3_D P1_AUXN<31>
SW4_D P2_P0<31> SW4_D P2_N0< 31>
SW4_D P2_P1<31> SW4_D P2_N1< 31>
SW4_D P2_P2<31> SW4_D P2_N2< 31>
SW4_D P2_P3<31> SW4_D P2_N3< 31>
SW4_D P2_AUXP<31> SW4_D P2_AUXN<31>
TBT_A_TRX_DTX_P1<45> TBT_A_TRX_DTX_N1<45>
TBT_A_TTX_DRX_P1<45> TBT_A_TTX_DRX_N1<45>
TBT_A_TRX_DTX_P2<45> TBT_A_TRX_DTX_N2<45>
TBT_A_TTX_DRX_P2<45> TBT_A_TTX_DRX_N2<45>
8 7 6 5
TBT_ROM_HOLD#
D D
TBT_ROM_CLK TBT_ROM_DI
PCIE_PTX_TRX_P 1<15> PCIE_PTX_TRX_N1<15>
PCIE_PTX_TRX_P 2<15> PCIE_PTX_TRX_N2<15>
PCIE_PTX_TRX_P 3<15> PCIE_PTX_TRX_N3<15>
PCIE_PTX_TRX_P 4<15> PCIE_PTX_TRX_N4<15>
MUX1 PS8461
C C
MUX2 PS8461
Place holder for future VBUS-short fix (reduce current surge) 11/28
TypeC CONN1
B B
To PD
TBTA_HPD<44>
A A
UT2
CS#
VCC
DO(IO1)
HOLD#(IO3)
WP#(IO2)
CLK
GND
DI(IO0)
W25Q80 DVSSIG_SO8
CLK_PCIE_P4<16> CLK_PCIE_N4<16>
CLKREQ_PCIE #4<16>
RT595 2.2_0201_ 1% RT594 2.2_0201_ 1%
RT623 2.2_0201_ 1% RT624 2.2_0201_ 1%
RT597 2.2_0201_ 1% RT596 2.2_0201_ 1%
RT625 2.2_0201_ 1% RT626 2.2_0201_ 1%
TBT_A_SBU1<44> TBT_A_SBU2<44>
USB20_NA< 44>
TBTA_HPD TBTA_HPD_R TBTB_HPD_R TBTB_HPD
TBTA_I2C_INT#< 44>
1 2
RT41 200_0402_ 1%
1 2 3 4
SW3_D P1_HPD<31>
SW4_D P2_HPD<31>
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
RT619 0_0201_5%@
TBT_ROM_CS# TBT_ROM_DO TBT_ROM_WP #
12 12
12 12
12 12
12 12
1 2
1 2
RT2
2.2K_0402_5%
CT20.22U _0201_6.3V6K CT30.22U _0201_6.3V6K
CT40.22U _0201_6.3V6K CT50.22U _0201_6.3V6K
CT1230.22U_0201_6.3V 6K CT1240.22U_0201_6.3V 6K
CT1250.22U_0201_6.3V 6K CT1260.22U_0201_6.3V 6K
12
CT110.2 2U_0201_6.3V 6K
12
CT100.2 2U_0201_6.3V 6K
12
CT120.2 2U_0201_6.3V 6K
12
CT130.2 2U_0201_6.3V 6K
12
CT140.2 2U_0201_6.3V 6K
12
CT150.2 2U_0201_6.3V 6K
12
CT160.2 2U_0201_6.3V 6K
12
CT170.2 2U_0201_6.3V 6K
12
CT180.2 2U_0201_6.3V 6K
12
CT190.2 2U_0201_6.3V 6K
12
CT1860.22U_0201_6.3V 6K
12
CT1870.22U_0201_6.3V 6K
12
CT1830.22U_0201_6.3V 6K
12
CT1800.22U_0201_6.3V 6K
12
CT1850.22U_0201_6.3V 6K
12
CT1790.22U_0201_6.3V 6K
12
CT1820.22U_0201_6.3V 6K
12
CT1810.22U_0201_6.3V 6K
12
CT1780.22U_0201_6.3V 6K
12
CT1840.22U_0201_6.3V 6K
RT3
1 2
1 2
2.2K_0402_5%
PCIE_PTX_C_TRX_ P1PCIE_PTX_TRX_P1 PCIE_PTX_C_TRX_ N1
PCIE_PTX_C_TRX_ P2 PCIE_PTX_C_TRX_ N2
PCIE_PTX_C_TRX_ P3 PCIE_PTX_C_TRX_ N3
PCIE_PTX_C_TRX_ P4 PCIE_PTX_C_TRX_ N4
SW3_D P1_N0_C SW3_D P1_P0_C
SW3_D P1_P1_C SW3_D P1_N1_C
SW3_D P1_P2_C SW3_D P1_N2_C
SW3_D P1_P3_C SW3_D P1_N3_C
SW3_D P1_AUXP_C SW3_D P1_AUXN_C
SW3_D P1_HPD
SW4_D P2_P0_C SW4_D P2_N0_C
SW4_D P2_P1_C SW4_D P2_N1_C
SW4_D P2_P2_C SW4_D P2_N2_C
SW4_D P2_P3_C SW4_D P2_N3_C
SW4_D P2_AUXP_C SW4_D P2_AUXN_C
SW4_D P2_HPD
TBT_JTAG_TDI TBT_JTAG_TMS TBT_JTAG_TCK TBT_JTAG_TDO
TBT_RSENSE
RT394.75K_0 402_0.5%
TBT_A_TRX_DTX_P1_ R TBT_A_TRX_DTX_N1_R
TBT_A_TTX_DRX_P1_ R TBT_A_TTX_DRX_N1_R
TBT_A_TRX_DTX_P2_ R TBT_A_TRX_DTX_N2_R
TBT_A_TTX_DRX_P2_ R TBT_A_TTX_DRX_N2_R
DG_PA_USB 2_MXCTL TBTA_USB2_RB IAS
RT4
3.3K_0402_5%
TBT_RBIAS
RT5
RT6
10K_0402_5%
1 2
10K_0402_5%
1 2
Rework Debug Pin1 +3.3V_TBT_LC, Pin6 GND
UT1A
Y23
PCIE_RX0_P
Y22
PCIE_RX0_N
T23
PCIE_RX1_P
T22
PCIE_RX1_N
M23
PCIE_RX2_P
M22
PCIE_RX2_N
H23
PCIE_RX3_P
H22
PCIE_RX3_N
V19
REFCLK_100_IN_P
T19
REFCLK_100_IN_N
Y6
PCIE_CLKREQ#
AB7
DPSNK1_ML0_N
AC7
DPSNK1_ML0_P
AB9
DPSNK1_ML1_P
AC9
DPSNK1_ML1_N
AC11
DPSNK1_ML2_P
AB11
DPSNK1_ML2_N
AB13
DPSNK1_ML3_P
AC13
DPSNK1_ML3_N
N1
DPSNK1_AUX_P
N2
DPSNK1_AUX_N
AA2
DPSNK1_HPD
A5
DPSNK2_ML0_P
B5
DPSNK2_ML0_N
B3
DPSNK2_ML1_P
A3
DPSNK2_ML1_N
C2
DPSNK2_ML2_P
C1
DPSNK2_ML2_N
E2
DPSNK2_ML3_P
E1
DPSNK2_ML3_N
P1
DPSNK2_AUX_P
P2
DPSNK2_AUX_N
Y4
DPSNK2_HPD
AC3
U0_SSRXp1
AB3
U0_SSRXn1
AB5
U0_SSTXn1
AC5
U0_SSTXp1
W20
TDI
Y20
TMS
W19
TCK
Y19
TDO
J6
RBIAS
J5
RSENSE
B21
ASSRXp1
A21
ASSRXn1
A19
ASSTXp1
B19
ASSTXn1
A15
ASSRXp2
B15
ASSRXn2
A17
ASSTXp2
B17
ASSTXn2
H4
ASBU1
J4
ASBU2
E20
PA_USB2_D_P
D20
PA_USB2_D_N
T2
PA_HPD
M4
PA_I2C_INT
R2
PA_USB2_MXCTL
H19
PA_USB2_RBIAS
V8
THERMDA
D4
TEST_EDM
L8
FUSE_VQPS_64
A23
PA_MONDC
A1
PB_MONDC
AC23
PC_MONDC
AC1
USB_MONDC
D5
MONDC_SVR
RT8
RT7
10K_0402_5%
10K_0402_5%
1 2
1 2
1 2
TBT_JTAG_TDI TBT_JTAG_TMS TBT_JTAG_TCK TBT_JTAG_TDO
PCIe GEN3
DPSRC_ML0_P
DPSRC_ML0_N
DPSRC_ML1_P
DPSRC_ML1_N
DPSRC_ML2_P
DPSRC_ML2_N
DPSRC_ML3_P
DPSRC_ML3_N
DPSRC_AUX_P DPSRC_AUX_N
SINK PORT 1
SOURCE PORT 0
TMU_CLKOUT
CIO_PLUG_EVENT#
LC GPIOPOC GPIO
USB_FORCE_PWR
SINK PORT 2
RTD3_PWR_EN
XTAL_25_OUT
USB
Misc
MISC
Port A
PORT B
PB_USB2_D_P
TBT PORTS
PB_USB2_D_N
PB_USB2_MXCTL
PB_USB2_RBIAS
TEST_PWR_GOOD
DEBUG
THUNDERBOLT_BGA 337
Titan Redge DP
+3.3V_TBT_FLAS H_R +3 .3V_TBT_LC+3.3V_TBT_FLAS H_R + 3.3V_TBT_FLASH_R
RT9 0_0402_5%@
RT578 0_0402_5%
PCIE_PRX_C_ TTX_P1
V23
PCIE_TX0_P PCIE_TX0_N
PCIE_TX1_P PCIE_TX1_N
PCIE_TX2_P PCIE_TX2_N
PCIE_TX3_P PCIE_TX3_N
PCIE_RBIAS
PEWAKE#
DPSRC_HPD
TMU_CLKIN
I2C_SDA I2C_SCL
FORCE_PWR
BATLOW#
SLP_S3#
XTAL_25_IN
EE_WP#
BSSRXp1 BSSRXn1
BSSTXp1 BSSTXn1
BSSRXp2 BSSRXn2
BSSTXp2 BSSTXn2
PB_HPD
PB_I2C_INT
TEST_EN
USB2_ATEST
PCIE_ATEST
ATEST_P ATEST_N VGA_RES
PCIE_PRX_C_ TTX_N1
V22
PCIE_PRX_C_ TTX_P2
P23
PCIE_PRX_C_ TTX_N2
P22
PCIE_PRX_C_ TTX_P3
K23
PCIE_PRX_C_ TTX_N3
K22
PCIE_PRX_C_ TTX_P4
F23
PCIE_PRX_C_ TTX_N4
F22
TBT_PERST#
T4
PERST#
GPIO_0 GPIO_1
RESET#
EE_DI
EE_DO EE_CS# EE_CLK
BSBU1 BSBU2
TBT support RTD3,Follow NB
N16 Y2
TBT_PCIE_RBIAS
AB21
PCIE_WA KE#_AR
AC21
TBT support RTD3,Follow NB
AC19 AB19
AB17 AC17
AC15 AB15
N4 N5
DPSRC_HPD
R5
GPIO_0
W1
GPIO_1
W2
GPIO_3
Y1
TBT_CIO_PLUG_EVE NT#
AA1
DG_GPIO8
W6
V1 V2
RTD3_USB_PW R_EN
V5
TBT_FORCE_PW R
V4
TDOCK_BATLOW #
U2
SIO_SLP_S3#
U1
RTD3_CIO_PW R_EN_R
T5
TBT_RESET_N_EC
E5
XTAL_25_IN
D22
XTAL_25_OUT XTAL_25_OUT_R
D23
TBT_ROM_DI
Y18
TBT_ROM_DO
W16
TBT_ROM_CS#
W18
TBT_ROM_CLK
Y16
TBT_ROM_WP #
W4
Place holder for future VBUS-short fix (reduce current surge) 11/28
TBT_B_TRX_DTX_P1_ R
A13
TBT_B_TRX_DTX_N1_R
B13
TBT_B_TTX_DRX_P1_ R
A11
TBT_B_TTX_DRX_N1_R
B11
TBT_B_TRX_DTX_P2_ R
B7
TBT_B_TRX_DTX_N2_R
A7
TBT_B_TTX_DRX_P2_ R
A9
TBT_B_TTX_DRX_N2_R
B9
L4 L5
E19 D19
T1 M5 R1 F19
W5 R4 B23 AB23 J9 J11 H5
RT620 0_0201_5%@
DG_PB_USB 2_MXCTL TBTB_USB2_RB IAS
TEST_PWRGD
1 2
+3.3V_VDD _PIC
1 2
1 2
RT34 3.01 K_0402_1%
TBT_CIO_PLUG_EVE NT# < 14>
TBT_I2C_SDA <44> TBT_I2C_SCL <44>
TBT_FORCE_PW R <19>
SIO_SLP_S3# <18,1 9,59>
1 2
RT392 0_0201_5%@
1 2
RT37 0_0402_5 %@
1 2
RT40 0_0 402_5%
1 2
RT599 2.2_0201_ 1%
1 2
RT598 2.2_0201_ 1%
1 2
RT627 2.2_0201_ 1%
1 2
RT628 2.2_0201_ 1%
1 2
RT601 2.2_0201_ 1%
1 2
RT600 2.2_0201_ 1%
1 2
RT629 2.2_0201_ 1%
1 2
RT630 2.2_0201_ 1%
TBT_B_SBU1 <44> TBT_B_SBU2 <44>
USB20_PB <44>USB20_PA<44> USB20_NB <44>
1 2
TBTB_I2C_INT# <44 >
12
RT42200_0402_ 1%
1 2
RT36 100 _0402_5%
PCIE_PRX_TTX_P 1
12
CT60.22 U_0201_6.3V6 K
PCIE_PRX_TTX_N1
12
CT70.22 U_0201_6.3V6 K
PCIE_PRX_TTX_P 2
12
CT80.22 U_0201_6.3V6 K
PCIE_PRX_TTX_N2
12
CT90.22 U_0201_6.3V6 K
PCIE_PRX_TTX_P 3
12
CT1270.22U_0201_6.3V 6K
PCIE_PRX_TTX_N3
12
CT1280.22U_0201_6.3V 6K
PCIE_PRX_TTX_P 4
12
CT1290.22U_0201_6.3V 6K
PCIE_PRX_TTX_N4
12
CT1300.22U_0201_6.3V 6K
RTD3_CIO_PW R_EN <17>
CCG5_AR_RS T# <44> TBT_RESET_N_EC <58>
20P_0402_5 0V8
TBT_B_TRX_DTX_P1 <4 5> TBT_B_TRX_DTX_N1 <45>
TBT_B_TTX_DRX_P1 < 45> TBT_B_TTX_DRX_N1 <45>
TBT_B_TRX_DTX_P2 <4 5> TBT_B_TRX_DTX_N2 <45>
TBT_B_TTX_DRX_P2 < 45> TBT_B_TTX_DRX_N2 <45>
TBTB_HPD < 44>
CT20
PCIE_PRX_TTX_P 1 <15> PCIE_PRX_TTX_N1 <15>
PCIE_PRX_TTX_P 2 <15> PCIE_PRX_TTX_N2 <15>
PCIE_PRX_TTX_P 3 <15> PCIE_PRX_TTX_N3 <15>
PCIE_PRX_TTX_P 4 <15> PCIE_PRX_TTX_N4 <15>
1 2
RT394 0_0402_5%
YT1
1
3
IN
OUT
2
4
GND1
GND2
12
25MHZ_20PF_ FL2500123Z
TypeC CONN2
TBT support RTD3,Follow NB
TBT RTD3 Support
To PD
PCH_PLTRST#_R<17,52,67,68>
PCH_TBT_PERST#<14>
Reserve RT621,RT622 0 ohm(align Northbay) 11/28
TBT_RTD3_WAK E#<15,18>
PCH_PCIE_W AKE#<18, 58,59>
PCIE_WA KE#<27,52,59,6 7,68>
RTD3_SELECT<59>
For backdrive issue
correct status is down change to @ 3/2 9
12
CT21
20P_0402_5 0V8
+3.3V_ALW
RT621 0_0201_5%@
RT622 0_0201_5%@
RT447 10K_0201_5 %
1 2
1 2
1 2
RTD3@
1
IN1
2
IN2
UT34
RTD3@
MC74VHC1G0 8DFT2G_SC70-5
RTD3@
1
NO
NC3COM
6
IN
TS5A3159ADC KR_SC70-6
1 2
RT499 0 _0201_5%@RTD3@
1 2
RT500 0 _0201_5%@RTD3@
TBT_RTD3_WAK E#
PCH_PCIE_W AKE#
PCIE_WA KE# PCIE_WA KE#_AR
RT445 0_0201_5%@
RT456 0_0201_5%@RTD3@
RT448 0_0201_5%@RTD3@
1 2
1 2
1 2
TBT_CIO_PLUG_EVE NT#
RTD3_CIO_PW R_EN_R
Reserve +3.3V_T BT_S0 for RTD3_CIO_PWR_EN _R 4/9
PCIE_WA KE#_AR
TBTA_I2C_INT# TBTB_I2C_INT# TBT_RESET_N_EC RTD3_USB_PW R_EN TBT_FORCE_PW R SIO_SLP_S3# CLKREQ_PCIE #4 TDOCK_BATLOW #
RTD3_CIO_PW R_EN_R
DG_GPIO8
RTD3_CIO_PW R_EN_R
DPSRC_HPD TBTA_HPD TBTB_HPD
RTD3_USB_PW R_EN TBT_FORCE_PW R
GPIO_0 GPIO_1 GPIO_3 DG_GPIO8
DG_PA_USB 2_MXCTL DG_PB_USB 2_MXCTL
support vpro on docking side reserve
TBTA_HPD_R
TBTB_HPD_R
1 2
RT612 0_0201_5%NRTD3@
CT389
RTD3@
0.1U_0201_1 0V6K
1 2
5
VCC
TBT_PERST#_R TBT_PERST#
4
OUT
GND
V+
+3.3V_ALW
5
4
2
RT611
1 2
100K_0201_5%
RTD3@
RTD3@
CT237
0.1U_0201_1 0V6K
1 2
PCIE_WA KE#_AR_R
3
UT32
GND
@
1 2
1 2
RT501 0_0201_5%@RTD3@
RT441 0_0201_5%@RTD3@
RT440 1M_0201_5%
RT391 1 0K_0402_5%
RT643 1 0K_0201_5%@
RT613 1 0K_0201_5%RTD3@
RT16 10K_020 1_5%@ RT17 10K_020 1_5%@ RT11 10K_040 2_5%@ RT591 1 0K_0201_5%@ RT592 1 0K_0201_5%@ RT593 1 0K_0402_5%@ RT502 1 0K_0402_5%@ RT20 10K_040 2_5% RT372 1 0K_0402_5%@ RT503 2 .2K_0402_5%
Change to depop Change BOM Structure to @
Change BOM Structure
RT614 1 00K_0402_5% RT184 1 00K_0402_5% RT23 100K_04 02_5% RT33 100K_04 02_5%
RT26 100K_04 02_5% RT27 100K_04 02_5%
RT505 1 00K_0402_5% RT506 1 00K_0402_5% RT507 1 00K_0402_5% RT553 1 0K_0402_5%@
RT508 1 00K_0402_5% RT509 1 00K_0402_5%
1 2
1 2
1 2
1 2
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
1 2 1 2
1 2 1 2 1 2 1 2
1 2 1 2
12
12
RT6410_0201_5% @
RT6420_0201_5% @
+3.3V_ALW _PCH
+3.3V_RUN
+3.3V_TBT_SX
SML0_SMB CLK <18,51>
SML0_SMB DATA <18,51>
IN
NC
L
COM
H
X
NO
X
COM
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
TBT-TR(1/2) DP, PCIE
TBT-TR(1/2) DP, PCIE
TBT-TR(1/2) DP, PCIE
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
42 103
42 103
42 103
1.0
1.0
1.0
5
+3.3V_RUN +3.3V_TBT
JUMP@
PJP5
2
112
JUMP_43X79
D D
+20V_TBTA_VBUS
Use RB520SM Vf=0.51V@200mA, for 5V input
+20V_TBTB_VBUS
+19.5V_DC_IN
QT10
+19.5VB
follow naming rule
LPS_OFF_BATT_R<8 5>
Normal S5 on DC mode , LPS_OFF_BATT_R = +PWR_SRC, and PMOS open,so without +3.3V_VDD_PIC single fault S5 on DC mode , LPS_OFF_BATT=0, LPS_OFF_BATT_R = +PWR_SRC/2 ,PMOS close ,so +3.3V_VDD_PIC can latch
+3.3V_VDD_PICP
C C
S
EMB80P03JS_S OT-23-3
G
2
Change CPN from SB000016O00 to SB00001GQ00 3/12
12
RT546
10K_0402_1%
CT67
1U_0201_10V6M
DT62
RB520SM-30T 2R_EMD2-2
2 1
DT60
RB520SM-30T 2R_EMD2-2
2 1
DT63
RB520SM-30T 2R_EMD2-2
2 1
DT64
RB520SM-30T 2R_EMD2-2
D
13
2 1
+3.3V_ALW
61
D
S
1 2
@
RT550
0_0402_5%
1
2
10U_0402_6.3V6M
5
2
G
5
12
CT376
0.1U_0201_25V6K
1
CT307
CT318
CT326
CT308
2
Pin H13
1U_0201_6.3V6M
1
CT319
Pin R8
2
1U_0201_6.3V6M
+3.3V_TBT_S0
1
CT327
2
1U_0201_6.3V6M
10U_0402_6.3V6M
1
CT334
CT335
2
47U_0603_6.3V6M
47U_0603_6.3V6M
2N7002KDW _SOT363-6
ALW_PWR GD_3V_5V<18,43 ,62,86>
B B
A A
1
CT305
Pin E8
2
1U_0201_6.3V6M
1
CT316
Pin N6
2
1U_0201_6.3V6M
CT323
10U_0402_6.3V6M
+TBT_SVR_IND
LT10
0.6UH_MND-0 4ABIR60M-XGL_20%
QT4A
1
CT306
2
Pin H11
1U_0201_6.3V6M
1
CT317
2
Pin N11
1U_0201_6.3V6M
1
1
CT325
CT324
2
2
10U_0402_6.3V6M
VCC0P9_SVR:0.9V @ 1.8A max Minimum of 4vias must be used
1 2
1
12
S TR AO7401 1P SC70-3
S TR AO7401 1P SC70-3
G
1U_0201_6.3V6M
1U_0201_6.3V6M
1
2
1
2
CT69
CT68
2
47U_0603_6.3V6M
1 2
change to 1000pF for solving high pulse when AC plug in to system 4/3
DT63,DT64 for keeping +3.3V_VDD_PIC stable under abnormal haywire circumstance between +TBTA_VBUS and 19V power source. (LPS_OFF must keep low when haywire happened)
QT2
1 3
D
S
RT545
1M_0402_1 %
G
2
1 2
CT375
0.01U_0402_16V7K
1 2
QT3
1 3
D
S
RT548
G
2
100K_0402_ 1%
1 2
12
@
RT549
0_0402_5%
34
DSQT4B
2N7002KDW _SOT363-6
1
CT309
2
Pin H16
1
CT320
2
Pin R16
1
CT328
2
Pin E6
Pin L6
1U_0201_6.3V6M
+0.9V_TBT_SVR
1
CT336
2
47U_0603_6.3V6M
1 2
LT2 1UH_LQM18 PN1R0MFHD_20%
1
2
47U_0603_6.3V6M
LDO_IN
CT374
1000P_0402 _50V7K
1
2
1U_0201_6.3V6M
1
2
1U_0201_6.3V6M
2
3
300K_0402_ 5%
1 2
RT547
@
0_0805_5%
1 2
change footprint from 0402 to 0805
1
CT310
2
Pin J13
1U_0201_6.3V6M
1
CT321
Pin T8
2
1U_0201_6.3V6M
Share same GND plane
4
UT7
VCC1VOUT
GND
EN
NC
RT9069-33 GB_SOT23-5
RT543
RT544
+3.3V_VDD_PIC
1
CT311
2
Pin L11
1U_0201_6.3V6M
1
CT322
2
Pin T13
1U_0201_6.3V6M
4
+3.3V_TBT+3.3V_TBT_S0
5
4
12
300K_0402_5%
+0.9V_TBT_SVR
Pin M11
Pin T16
1
CT337
2
10U_0402_6.3V6M
+0.9V_TBT_L C
CT333
1U_0201_6.3V6M
RT542
@
0_0805_5%
1 2
change footprint from 0402 to 0805
1
2
CT372
1U_0201_10V6M
1
13
D
2
2
CT373
G
L2N7002W T1G_SC-70-3
S
QT1
@
1U_0201_10V6M
change SB00000UO00 to SB000009Q80/ SB00000ST00 as main source, SB00000UO00 as 3rd source
ALW_PWR GD_3V_5V <18,43,62,86>
SVR_VSS:Minimum of 4 vias must be used.
1
1
CT329
CT330
2
2
10U_0402_6.3V6M
10U_0402_6.3V6M
+0.9V_TBT_SVR
+0.9V_TBT_PC IE
1
CT338
2
1U_0201_6.3V6M
1
1
CT314
2
2
1U_0201_6.3V6M
Pin J8
Pin F18
Pin L19
+3.3V_TBT_SX
1
CT315
2
1U_0201_6.3V6M
1
CT339
2
Pin M19
1U_0201_6.3V6M
Pin R6
+3.3V_TBT_SX
+3.3V_VDD_PICP
+0.9V_TBT_L VR_OUT
1
CT331
Pin H6
2
1U_0201_6.3V6M
1
CT340
2
Pin L18
1U_0201_6.3V6M
3
+3.3V_TBT_ANA
RT554
10K_0402_5%
Pin L16
1 2
Compal Secret Data
Compal Secret Data
Compal Secret Data
+0.9V_TBT_SVR
+0.9V_TBT_PC IE
CT302
1U_0201_6.3V6M
+3.3V_ALW
+0.9V_TBT_L VR_OUT
CT300
1U_0201_6.3V6M
+3.3V_TBT_ANA_PC IE
1
2
Pin H18
1
CT301
2
1U_0201_6.3V6M
2016/01/01
2016/01/01
2016/01/01
+3.3V_TBT_ANA_U SB2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
PAD-OPEN1x1m
1
CT332
2
1U_0201_6.3V6M
1
CT341
2
1U_0201_6.3V6M
JUMP@
PJP6
Pin H8
Pin M16
3
Output
+0.9V_TBT_L C
+3.3V_TBT_L C
1
CT303
2
Pin E16
1U_0201_6.3V6M
Deciphered Date
Deciphered Date
Deciphered Date
2
UT1B
H9
VCC0P9_SVR_PAB_ANA1
H11
VCC0P9_SVR_PAB_ANA2
H12
VCC0P9_SVR_PAB_ANA3
H13
VCC0P9_SVR_PAB_ANA4
H15
VCC0P9_SVR_PAB_ANA5
H16
VCC0P9_SVR_PAB_ANA6
T12
VCC0P9_SVR_PC_ANA1
T13
VCC0P9_SVR_PC_ANA2
T15
VCC0P9_SVR_PC_ANA3
T9
VCC0P9_SVR_USB_ANA1
T11
VCC0P9_SVR_USB_ANA2
N6
VCC0P9_SVR_DPAUX_ANA
J18
VCC0P9_PCIE
L19
VCC0P9_ANA_PCIE_1_1
M19
VCC0P9_ANA_PCIE_1_2
L18
VCC0P9_ANA_PCIE_2_1
M16
VCC0P9_ANA_PCIE_2_2
M18
VCC0P9_ANA_PCIE_2_3
J8
VCC0P9_LC
H8
VCC0P9_LVR
H6
VCC0P9_LVR_SENSE
H18
VCC3P3_ANA_USB2
L16
VCC3P3_ANA_PCIE
E16
VCC3P3_ANA
V6
VCC3P3_LC
Output
A6
1
2
Pin V6
2
W13
W12
D11 D12 D13 D15 D16 D18
H20
G22 G23
M20 N20 N22 N23 C22
AB2
AC4 AB4
AB1 AC2
A8 A10 A12 A14 A16 A18 A20 A22
B6
B8 B10 B12 B14 B16 B18 B20 B22
D8 D9
E9 E11 E15
E22 E23
F9 F16 F20
L20 L22 L23 J19 J20 J22 J23
E18
A4
B4
Y8
F2
D2
F1
Y5 Y12
D6
VSS_ANA1 VSS_ANA2 VSS_ANA3 VSS_ANA4 VSS_ANA5 VSS_ANA6 VSS_ANA7 VSS_ANA8 VSS_ANA9 VSS_ANA10 VSS_ANA11 VSS_ANA12 VSS_ANA13 VSS_ANA14 VSS_ANA15 VSS_ANA16 VSS_ANA17 VSS_ANA18 VSS_ANA19 VSS_ANA20 VSS_ANA21 VSS_ANA22 VSS_ANA23 VSS_ANA24 VSS_ANA25 VSS_ANA26 VSS_ANA27 VSS_ANA28 VSS_ANA29 VSS_ANA30 VSS_ANA31 VSS_ANA32 VSS_ANA33 VSS_ANA34 VSS_ANA35 VSS_ANA36 VSS_ANA37 VSS_ANA38 VSS_ANA39 VSS_ANA40 VSS_ANA41 VSS_ANA42 VSS_ANA43 VSS_ANA44 VSS_ANA45 VSS_ANA46 VSS_ANA47 VSS_ANA48 VSS_ANA49 VSS_ANA50 VSS_ANA51 VSS_ANA52 VSS_ANA53 VSS_ANA54 VSS_ANA55 VSS_ANA56 VSS_ANA57 VSS_ANA58 VSS_ANA59 VSS_ANA60 VSS_ANA61 VSS_ANA62 VSS_ANA63 VSS_ANA64 VSS_ANA65 VSS_ANA66
2017/01/01
2017/01/01
2017/01/01
VSS1
VSS2
VSS3
L12
V16
R15
M15
1
+3.3V_TBT_S0
input
input
Output
VCC0P9_SVR_BRD_SENSE
VCC
GND
VSS9
VSS4
VSS5R9VSS6
VSS7L9VSS8
VSS10
VSS11
F4
M9
L15
V18
R12
THUNDERBO LT_BGA337
VSS12
N15
VCC0P9_SVR10 VCC0P9_SVR11 VCC0P9_SVR12 VCC0P9_SVR13 VCC0P9_SVR14 VCC0P9_SVR15
VSS13M1VSS14M2VSS15
N12
VCC3P3_SVR1 VCC3P3_SVR2 VCC3P3_SVR3
VCC3P3A
VCC3P3_S0
VCC3P3_SX1 VCC3P3_SX2
VCC0P9_SVR1 VCC0P9_SVR2 VCC0P9_SVR3 VCC0P9_SVR4 VCC0P9_SVR5 VCC0P9_SVR6 VCC0P9_SVR7 VCC0P9_SVR8 VCC0P9_SVR9
SVR_IND1 SVR_IND2 SVR_IND3 SVR_IND4
SVR_VSS1 SVR_VSS2 SVR_VSS3
VSS_ANA67 VSS_ANA68 VSS_ANA69 VSS_ANA70 VSS_ANA71 VSS_ANA72 VSS_ANA73 VSS_ANA74 VSS_ANA75 VSS_ANA76 VSS_ANA77 VSS_ANA78 VSS_ANA79 VSS_ANA80 VSS_ANA81 VSS_ANA82 VSS_ANA83 VSS_ANA84 VSS_ANA85 VSS_ANA86 VSS_ANA87 VSS_ANA88 VSS_ANA89 VSS_ANA90 VSS_ANA91 VSS_ANA92 VSS_ANA93 VSS_ANA94 VSS_ANA95 VSS_ANA96 VSS_ANA97 VSS_ANA98
VSS_ANA99 VSS_ANA100 VSS_ANA101 VSS_ANA102 VSS_ANA103 VSS_ANA104 VSS_ANA105 VSS_ANA106 VSS_ANA107 VSS_ANA108 VSS_ANA109 VSS_ANA110 VSS_ANA111 VSS_ANA112 VSS_ANA113 VSS_ANA114 VSS_ANA115 VSS_ANA116 VSS_ANA117 VSS_ANA118 VSS_ANA119 VSS_ANA120 VSS_ANA121 VSS_ANA122 VSS_ANA123 VSS_ANA124 VSS_ANA125 VSS_ANA126 VSS_ANA127 VSS_ANA128 VSS_ANA129 VSS_ANA130 VSS_ANA131
VSS19
VSS18
VSS16T6VSS17
N9
T18
M12
G1 G2 H2 E6
L6
F18 R6
J13 L11 L13 M8 M11 M13 N8 N11 N13 R8 R11 R13 R16 T8 T16 E8
K1 K2 L1 L2
H1 J1 J2
AB18 AB20 AB22 AC6 AC8 AC10 AC12 AC14 AC16 AC18 AC20 AC22 E4 F5 J12 F6 J15 B2 B1 D1 A2 J16 V13 V12 V11 M6 U23 U22 T20 R23 R22 R20 R19 R18 W11 Y11 C23 F15 V9 V15 V20 W8 W9 W22 W23 Y9 Y13 AA22 AA23 AB6 AB8 AB10 AB12 AB14 AB16 N19 N18 F8 F13 F12 F11 E13 E12 W15 Y15
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
TBT-TR(2/2) PWR,VSS
TBT-TR(2/2) PWR,VSS
TBT-TR(2/2) PWR,VSS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
+3.3V_TBT_SX
+TBT_SVR_IND
43 103
43 103
43 103
+0.9V_TBT_SVR
1.0
1.0
1.0
5
follow naming rule
+20V_TBTA_VBUS + 20V_TBTB_VBUS
12
RT565
100_0603_5%
13
CCG5_VBUS_ DISCHARGE_P1 CCG5_VBUS_DISCHARG E_P2
D D
D
2
QT6 L2N7002W T1G_SC-70-3
G
S
12
RT567
100K_0201_5%
12
13
D
2
G
S
12
RT568
100K_0201_5%
3/3: follow Cyp ress suggest
+VDD_SUPPLY
1 2
1 2
CCG5_VBUS_ 5V_ON1#
CCG5_VBUS_ 5V_ON2#
VBUS_C_CTRL _P1#
VBUS_C_CTRL _P2#
CCG5_XRES1
1 2
RT517 1 0K_0201_5%
1 2
RT519 1 0K_0201_5%
1 2
RT521 1 0K_0201_5%
1 2
RT522 1 0K_0201_5%
+VDD_SUPPLY
C C
RT525 4.7K_0402 _5%
CT350 0 .1U_0201_10V 6K
To configure CCG5 I2C address
CCG5_SW D_CLK1
12
12
To configure CCG5 I2C address Don't mount RT526 and RT527 for the I2C address 0x08. This is the default one. Mount RT527 for the I2C address 0x40. Mount RT526 for the I2C address 0x42.
1 2 1 2
UT9
13
OUT
12
VLIM
11
ILIM
10
DV/DT
9
IMON
8
FAULTB
14
SRC
UT11
13
OUT
12
VLIM
11
ILIM
10
DV/DT
9
IMON
8
FAULTB
14
SRC
5
DISC1 DISC2
VREG
DISC1 DISC2
VREG
1
IN
2
EN
3
FRS
6 7
5
4
GND
1
IN
2
EN
3
FRS
6 7
5
4
GND
+VDD_SUP PLY
+5V_ALW
UART2_TXD < 19>
UART2_RXD <19>
FRS_ON1_R
1
CT377
2
0.1U_0201_1 0V6K
FRS_ON2_R
1
CT379
2
0.1U_0201_1 0V6K
+5V_ALW
+5V_ALW
1 2
1 2
@
0_0402_5%
@
0_0402_5%
RT570
FRS_ON_P1
RT574
FRS_ON_P2
+3.3V_VDD _PIC
0.1U_0201_1 0V6K
5
UT10
B
4
Vcc
Y
A
G
74AUP1G02GW _TSSOP5
3
+3.3V_VDD _PIC
0.1U_0201_1 0V6K
5
UT12
B
4
Vcc
Y
A
G
74AUP1G02GW _TSSOP5
3
CT370
12
USB_POW ERSHARE_ VBUS_EN#
1
CCG5_VBUS_ 5V_ON1#
2
CT371
12
USB_POW ERSHARE_ VBUS_EN#
1
CCG5_VBUS_ 5V_ON2#
2
CCG5_XRES1 CCG5_SW D_CLK1 CCG5_SW D_IO1 CCG5_SMBDA T CCG5_SMBCL K
UART2TXD UART2RXD
USB_ILIM1
1 2
RT526 1K_0402_ 5%@
RT527 1K_0402_ 5%
RT551 0 _0201_5%@ RT552 0 _0201_5%@
RT57151K_0201_ 1%
CT3781000P_020 1_25V7K
RT573100K_0201 _5%
DPS1113FIA-13 _QFN18_4X4
+VDD_SUPPLY
CCG5 debug
AMI still suggest us to reserve it for source level debug.
JCCG1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
GND1
B B
12
GND2
ACES_5052 1-01041-P01
CONN@
Type-C port1 USB2 Power Share
+5V_VBUS 1
1 2
1 2
USB_OC4#<15>
1 2
CT383 0.1U _0201_10V6K
Type-C port2 USB2 Power Share
+5V_VBUS 2
1 2
RT57551K_0201_ 1%
A A
USB_ILIM2
1 2
1 2
USB_OC5#<15>
1 2
CT384 0.1U _0201_10V6K
CT3801000P_020 1_25V7K
RT577100K_0201 _5%
DPS1113FIA-13 _QFN18_4X4
RT566
100_0603_5%
QT7 L2N7002W T1G_SC-70-3
@
@
4
I2C_SLAVE TO COMMUNICATE WITH TR
Pull up at EC side
RT610 10K_0201_5 %
1 2
4
+5V_ALW + VDD_SUPPLY
1
1
CT342
2
0.1U_0201_10V6K
CCG5_SMBCLK<58>
I2C_SLAVE TO COMMUNICATE WITH EMBEDDED CONTROLLER
TBT PORT B
+5V_ALW
CT355
10U_0603_10V6M
+5V_ALW
CT357
10U_0603_10V6M
1
CT343
CT344
2
2
1U_0201_6.3V6M
0.1U_0201_10V6K
TBT_I2C_SDA<42>
TBT_I2C_SCL<42>
TBTA_I2C_INT#<42 >
TBTB_I2C_INT#< 42>
CCG5_I2C_INT1#<58>
CCG5_SMBDAT<58>
TBT_B_SBU1<42>
TBT_B_SBU2<42>
USB20_P5<15> USB20_N5<15> USB20_PB<42> USB20_NB<42>
SW_TBT_B_ USB20_P2<45 > SW_TBT_B_ USB20_N2<45> SW_TBT_B_ USB20_P1<45 > SW_TBT_B_ USB20_N1<45>
1
1
2
1
2
+3.3V_VDD _PIC
2
CT356
1U_0201_10V6M
1
2
CT358
1U_0201_10V6M
3
1
1
CT346
CT345
2
2
1U_0201_6.3V6M
0.1U_0201_10V6K
+3.3V_ALW
2.2K_0402_5%
1 2
CCG5_I2C_INT1#
CCG5_SMBDA T
CCG5_SMBCL K
CCG5_VBUS_ 5V_ON2#<84> CCG5_VBUS_ 5V_ON1# <84>
VBUS_C_CTRL _P2#<82> VBUS_C_CTRL _P1# <82 >
+5V_ALW
CCG5_AR_RS T#<4 2>
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
RT514
RT511
RT510
1 2
1 2
1 2
CCG5_VBUS_ 5V_ON2# CCG5_ VBUS_5V_ON1 #
VBUS_C_CTRL _P2# VBUS_C_CTRL _P1#
(0 - VBUS Path on, Z- VBUS Path off)
TBTB_CC1<45>
TBTB_CC2<45>
+3.3V_ALW +3.3V_ALW
TBTB_HPD<42>
RT385 0_0201_5%@
RT386 0_0201_5%@
RT555 0 _0201_5%@ RT556 0 _0201_5%@ RT557 0 _0201_5%@ RT558 0 _0201_5%@
1 2
1 2
CCG5_SMBCL K CCG5_SMBDA T
1 2 1 2 1 2 1 2
RT528 1 0K_0201_5%@
+VDD_SUPPLY
Output
3.3V
CT348 1U_0201_10V 6M
+5V_ALW
CCG5_XRES1
RT515
1 2
CT351 390P_0402_5 0V7K
1 2
CT353 390P_0402_5 0V7K
1 2
RT608 0_0201_5%@ RT609 0_0201_5%@
TBTB_SBU1<45> TBTB_SBU2<45>
RT582 0_0201_5%@ RT581 0_0201_5%@
CCG5_SW D_IO1
CCG5_SW D_CLK1
FRS_ON_P2
MOD_ID1
1 2 1 2
TBTB_DPSRC_AU X_P_C
TBTB_DPSRC_AU X_N_C TBTA_DPSRC_AU X_N_C
TBTB_SBU1 TBTB_SBU2
1 2 1 2
TBT_B_USB20P TBT_B_USB20N
ILIM(A)=100/RILIM
@
100K_0402_5%
12
RT564
13
D
2
USB_POW ERSHARE_ VBUS_EN <5 8,71>
G
L2N7002W T1G_SC-70-3
S
QT5
@
change SB00000UO00 to SB000009Q80/ SB00000ST00 as main source, SB00000UO00 as 3rd source
From EC
3
UT5
D10
VDDD
C10
VDD_IO
1 2
B10
VCCD
J2
V5V_P1
input
L9
V5V_P2
H6
XRES
B2
SWD_IO/AR_RST# /GPIO_B2
C2
SWD_CLK/I2C_CFG_EC/GPIO_C2
D2
I2C_SDA_SCB2_AR/GPIO_D2
E2
I2C_SCL_SCB2_AR/GPIO_E2
F2
I2C_INT_AR_P1/GPIO_F2
G2
I2C_INT_AR_P2/GPIO_G2
L5
I2C_INT_EC/GPIO_L5
K6
I2C_SDA_SCB1_EC/GPIO_K6
L6
I2C_SCL_SCB1_EC/GPIO_L6
L8
OVP_TRIP_P2 / GPIO_L8
L10
SCL_3 / VSEL_1_P1 /GPIO_L10
B4
VBUS_P_CTRL_P2/ P4_2
B5
VBUS_C_CTRL_P2/ P4_1
K9
CC1_P2
K10
CC2_P2
E10
HPD_P2/GPIO_E10
K11
LSTX_P2/GPIO_K11
L11
LSRX_P2/GPIO_L11
D11
AUX_P_P2/GPIO_D11
E11
AUX_N_P2/GPIO_E11
E1
SBU1_P2
F1
SBU2_P2
H11
UART_TX_P2/GPIO_H11
J11
UART_RX_P2/GPIO_J11
F11
D+_SYS_P2
G11
D-_SYS_P2
K1
D+_B_P2
L1
D-_B_P2
G1
D+_T_P2
H1
D-_T_P2
D5
GND1
D6
GND2
D7
GND3
D8
GND4
E4
GND5
E5
GND6
E6
GND7
E7
GND8
E8
GND9
CYPD5225-96B ZXI_BGA96_6X6
RILIM (Kohm)
56
USB_ILIM2 USB_ILIM1
30.06
12
12
64.9K_0402_1%
13
D
RT585
QT8
56K_0402_1%
S
L2N7002W T1G_SC-70-3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ILIM(A)
Min
Typ Max
1.785
3.326
RT586
CCG5_ILIM2#
2
RT583
G
1 2
100K_0201_5%
2017/04/07 2018/12/31
2017/04/07 2018/12/31
2017/04/07 2018/12/31
2
VBUS_P1
VBUS_P2
CSP_P1
CSP_P2
CSN_P1
CSN_P2
VSEL_1_P2 / GPIO_L4
VSEL_2_P2 / GPIO_H10 UV_OCP_TRIP_P1 / GPIO_B6 UV_OCP_TRIP_P2 / GPIO_B7
VCON_OCP_TRIP_P1 / GPIO_B8 VCON_OCP_TRIP_P2 / GPIO_B9
SDA_4/GPIO_G10 SCL_4/GPIO_F10
GPIO_L7
OVP_TRIP_P1 / GPIO_K5
SDA_3 / VSEL_2_P1 / GPIO_J10
VBUS_P_CTRL_P1
VBUS_C_CTRL_P1
CC1_P1
CC2_P1
HPD_P1/GPIO_K7
LSTX_P1/GPIO_A10 LSRX_P1/GPIO_A11
AUX_P_P1/GPIO_B11
AUX_N_P1/GPIO_C11
SBU1_P1 SBU2_P1
UART_TX_P1/GPIO_A8 UART_RX_P1/GPIO_A9
D+_SYS_P1
D-_SYS_P1
D+_B_P1
D-_B_P1
D+_T_P1
D-_T_P1
GND19 GND18
GND17 CSP_GND_P2 CSP_GND_P1
GND14
GND13
GND12
GND11
GND10
CCG5_ILIM1# CCG5_ILIM2#
LOW
HIGH
12
12
RT587
13
D
56K_0402_1%
S
L2N7002W T1G_SC-70-3
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
follow naming rule
D1
input
L3
input
A5
+Vsys
VSYS
J1
L2
B3
K8
H4
NC1
H5
NC2
H8
NC3
G8
NC4
MOD_ID2
L4
CCG5_VBUS_ DISCHARGE_P2
H10 B6 B7 B8
RT589 0_0201_5%@
B9
RT590 0_0201_5%@
G10 F10 L7
K5
CCG5_VBUS_ DISCHARGE_P1
J10
K3
K4
(0 - VBUS Path on, Z- VBUS Path off)
K2
H2
K7
A10
RT606 0_0201_5%@
A11
RT607 0_0201_5%@
TBTA_DPSRC_AU X_P_C
B11 C11
TBTA_SBU1
A3
TBTA_SBU2
A4
A8 A9
A6 A7
B1 C1 A1 A2
H7 G7 G6 G5 G4 F8 F7 F6 F5 F4
RT588
64.9K_0402_1%
QT9
2
G
Deciphered Date
Deciphered Date
Deciphered Date
+20V_TBTA_VBUS +20V_TBTB_VBUS
+3.3V_ALW
1 2
RT512 0_ 0603_5%@
1 2
RT569 0_ 0603_5%
1 2
1 2
CCG5_ILIM1# CCG5_ILIM2#
12
RT387 0 _0201_5%@
RT388 0 _0201_5%@
RT559 0 _0201_5%@ RT560 0 _0201_5%@ RT561 0 _0201_5%@ RT562 0 _0201_5%@
1 2 1 2
FRS_ON_P1
CT352 390P_0402_5 0V7K
CT354 390P_0402_5 0V7K RT529 1 0K_0402_5%@
1 2 1 2
1 2
RT580 0 _0201_5%@
1 2
RT579 0 _0201_5%@
TBT_A_USB20P TBT_A_USB20N
MOD_ID1=L7,MOD_ID2=L4, the Dedicated ID for Whitehaven DVT TR+CCG5.
CCG5_ILIM1#
RT584
1 2
100K_0201_5%
+Vsys
+3.3V_VDD_PIC
1
CT347
2
0.1U_0201_10V6K
TBTA_DPSRC_AU X_N_C
TBTB_DPSRC_AU X_N_C
TBTA_DPSRC_AU X_P_C
TBTB_DPSRC_AU X_P_C
FRS_ON_P1
FRS_ON_P2
FRS_ON_P1 and FRS_ON_P2 have a spike to turn on 5V VBUS when CCG5 get power. RT617,RT618 change to pop
TBTA_CC1 <4 5>
TBTA_CC2 <4 5>
TBTA_HPD < 42>
change C to R 1/15change C to R 1/15
1 2
1 2
CCG5_SMBCL K CCG5_SMBDA T
1 2 1 2 1 2 1 2
+VDD_SUPPLY +VDD_SUPPLY
12
RT534
1.3K_0402_ 1%
12
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Documen t Number Rev
Size Documen t Number Rev
Size Documen t Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1
CT349
2
1U_0201_6.3V6M
1 2
RT516 1 00K_0201_5%@
1 2
RT518 1 00K_0201_5%@
1 2
RT523 1 00K_0201_5%@
1 2
RT524 1 00K_0201_5%@
1 2
RT617 1 00K_0201_5%
1 2
RT618 1 00K_0201_5%
TBT_A_SBU1 < 42>
TBT_A_SBU2 < 42>
TBTA_SBU1 < 45> TBTA_SBU2 < 45>
USB20_P4 <15> USB20_N4 <15> USB20_PA <42> USB20_NA <42>
SW_TBT_A_ USB20_P2 <45> SW_TBT_A_ USB20_N2 <45> SW_TBT_A_ USB20_P1 <45> SW_TBT_A_ USB20_N1 <45>
MOD_ID1 MOD_ID2USB_POW ERSHARE_ VBUS_EN#
RT536
9.1K_0402_ 1%
Resistor values for MOD_ID settings are decides based on the table shown
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
P044 - TYPE-C_Port1 (1/2) PD
P044 - TYPE-C_Port1 (1/2) PD
P044 - TYPE-C_Port1 (1/2) PD
LA-H271P
LA-H271P
LA-H271P
1
TBT PORT A
12
L4 =1.650VL7 =2.887V
12
RT535
13.3K_0402 _1%
RT537
13.3K_0402 _1%
44 103Tuesday, April 09, 2019
44 103Tuesday, April 09, 2019
44 103Tuesday, April 09, 2019
+3.3V_ALW
1.0
1.0
1.0
5
Reply to the original cap value 1/15
1 2
TBT_A_TTX_DRX_P1<42> TBT_A_TTX_DRX_N1<42>
D D
C C
B B
TBTA_CC1<44>
SW_TBT_A_ USB20_P1<44 > SW_TBT_A_ USB20_N1<44>
TBTA_SBU1<44> TBTA_CC2 < 44>
TBT_A_TRX_DTX_N2<42> TBT_A_TRX_DTX_P2<4 2>
RF Request
follow naming rule
12P_0402_50V8J
82P_0402_50V8J
RF@
RF@
1
1
CT189
CT190
2
2
TBT_B_TTX_DRX_P1<42> TBT_B_TTX_DRX_N1< 42>
TBTB_CC1<44> TBTB_SBU2 < 44>
SW_TBT_B_ USB20_P1<44 > SW_TBT_B_ USB20_N1<44>
TBT_B_TRX_DTX_N2<42> TBT_B_TRX_DTX_P2<42>
RF Request
follow naming rule
12P_0402_50V8J
82P_0402_50V8J
RF@
RF@
1
1
CT367
CT368
2
2
CT95 0.22U_0201_ 6.3V6K
1 2
CT96 0.22U_0201_ 6.3V6K
12
CT91 0.47U_0201_ 25V6M
@EMI@
1 2
RT120 0 _0402_5%
@EMI@
1 2
RT121 0 _0402_5%
1 2
CT390 0.33U_0201_2 5V6K
1 2
CT391 0.33U_0201_2 5V6K
AC coupling is recommended for VBUS-short protection on SSRX lines. If not needed, place 0 Ohm resistor instead. 11/28
+20V_TBTA_VB US+20V_TBTA_VB US
3
DT4
1
ESD@
AZ4024_02S_R7G_SOT23-3
Reply to the original cap value 1/15
CT359 0.22U_0201_6 .3V6K CT360 0.22U_0201_6 .3V6K
CT361 0.47U_0201_2 5V6M
@EMI@
RT538 0 _0402_5%
@EMI@
RT540 0 _0402_5%
CT363 0.47U_0201_2 5V6M CT395 0.33U_0201_25V 6K CT394 0.33U_0201_25V 6K
AC coupling is recommended for VBUS-short protection on SSRX lines. If not needed, place 0 Ohm resistor instead. 11/28
+20V_TBTB_VB US+20V_TBTB_VBUS
2
3
DT59
1
ESD@
AZ4024_02S_R7G_SOT23-3
2
1 2 1 2
1 2 1 2
1 2 1 2
12
12
Align BH 11/28
TBT_A_TTX_C_DRX_P 1
TBT_A_TTX_C_DRX_N1
TBT_A_TRX_C_DTX_N2
TBT_A_TRX_C_DTX_P 2
Align BH 11/28
TBT_B_TTX_C_DRX_P 1
TBT_B_TTX_C_DRX_N1
TBT_B_TRX_C_DTX_N2
TBT_B_TRX_C_DTX_P 2
SW_TBT_A_ USB20_P1_R SW_TBT_A_ USB20_N1_R
12
TBTB_CC1
SW_TBT_B_ USB20_P1_R SW_TBT_B_ USB20_N1_R
TBTB_SBU1 TBTB_CC2
follow naming rule
TBT_A_TTX_C_DRX_P 1 TBT_A_TTX_C_DRX_N1
TBTA_CC1
TBTA_SBU1 TBTA_CC2
CT1090.47U _0201_25V6M
TBT_A_TRX_C_DTX_N2 TBT_A_TRX_C_DTX_P 2
1 2
RT491 221K_0201_1%
1 2
RT490 221K_0201_1%
1 2
RT488 221K_0201_1%
1 2
RT489 221K_0201_1%
follow naming rule
TBT_B_TTX_C_DRX_P 1 TBT_B_TTX_C_DRX_N1
TBT_B_TRX_C_DTX_N2 TBT_B_TRX_C_DTX_P 2
Discharge SSTX/SSRX resistors - must be placed if 330nF cap is being used.
1 2
RT633 2 21K_0201_1%
1 2
RT634 2 21K_0201_1%
1 2
RT635 2 21K_0201_1%
1 2
RT636 2 21K_0201_1%
4
Change part number / foorprint
11
5 4
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11 B12
Discharge SSTX/SSRX resistors - must be placed if 330nF cap is being used.
Change part number / foorprint
12 10
9
1B1 1B2 1B3 1B4 1B5 1B6 1B7 1B8
1B9 1B10 1B11 1B12
CONN@
JUSBC1A
NPTH1 GND7 GND5
Bottom
GND3
SSRXp2
SSTXp2
TOP
SSRXn2
SSTXn2 VBUS3 CC2 Dp2 Dn2 SBU2 VBUS1 SSRXn1 SSRXp1 GND1
FOX_UT12113-116 0D-7H~D
CONN@
JUSBC1B
GND9
NPTH1
GND8
GND7
GND6
GND5
Bottom
GND4
GND3
SSRXp2
SSTXp2
TOP
SSRXn2
SSTXn2
VBUS4
VBUS3 CC2 Dp2 Dn2 SBU2
VBUS2
VBUS1
SSTXn1
SSRXn1
SSTXp1
SSRXp1
GND2
GND1
FOX_UT12113-116 0D-7H~D
3
GND9
2
GND8
1
GND6
A12
GND4
A11 A10 A9
VBUS4
A8
SBU1
A7
Dn1
A6
Dp1
A5
CC1
A4
VBUS2
A3
SSTXn1
A2
SSTXp1
A1
GND2
TBT_A_TRX_C_DTX_P 1
TBT_A_TRX_C_DTX_N1
TBT_A_TTX_C_DRX_N2
TBT_A_TTX_C_DRX_P 2
8 7 6
1A12 1A11 1A10 1A9 1A8
SBU1
1A7
Dn1
1A6
Dp1
1A5
CC1
1A4 1A3 1A2 1A1
TBT_B_TRX_C_DTX_P 1
TBT_B_TRX_C_DTX_N1
TBT_B_TTX_C_DRX_N2
TBT_B_TTX_C_DRX_P 2
+20V_TBTA_VB US+20V_TBTA_VB US
TBT_A_TRX_C_DTX_P 1 TBT_A_TRX_C_DTX_N1
TBTA_SBU2
SW_TBT_A_ USB20_N2_R SW_TBT_A_ USB20_P2_R
TBT_A_TTX_C_DRX_N2 TBT_A_TTX_C_DRX_P 2
1 2
RT504 2 21K_0201_1%
1 2
RT631 2 21K_0201_1%
1 2
RT219 2 21K_0201_1%
1 2
RT632 2 21K_0201_1%
+20V_TBTB_VB US+20V_TBTB_VB US
TBT_B_TRX_C_DTX_P 1 TBT_B_TRX_C_DTX_N1
TBTB_SBU2
SW_TBT_B_ USB20_N2_R SW_TBT_B_ USB20_P2_R
TBT_B_TTX_C_DRX_N2 TBT_B_TTX_C_DRX_P 2
1 2
RT637 2 21K_0201_1%
1 2
RT638 2 21K_0201_1%
1 2
RT639 2 21K_0201_1%
1 2
RT640 2 21K_0201_1%
AC coupling is recommended for VBUS-short protection on SSRX lines. If not needed, place 0 Ohm resistor instead. 11/28
1 2
CT393 0.33U_0201_25V 6K
1 2
CT392 0.33U_0201_25V 6K
1 2
CT101 0.47U_0201_2 5V6M
1 2
CT102 0.47U_0201_2 5V6M
Reply to the original cap value 1/15
1 2
CT362 0.47U_0201_2 5V6M
1 2
CT364 0.47U_0201_2 5V6M
Reply to the original cap value 1/15
@EMI@
1 2
0_0402_5%
1 2
0_0402_5%
@EMI@
AC coupling is recommended for VBUS-short protection on SSRX lines. If not needed, place 0 Ohm resistor instead. 11/28
1 2
CT397 0.33U_0201_25V 6K
1 2
CT396 0.33U_0201_25V 6K
@EMI@
1 2
RT539 0 _0402_5%
1 2
RT541 0 _0402_5%
@EMI@
RT122
RT123
12
CT980.22U_0201_6. 3V6K
12
CT970.22U_0201_6. 3V6K
12
CT3650.22U_0 201_6.3V6K
12
CT3660.22U_0 201_6.3V6K
3
TBT_A_TRX_DTX_P1 <42>
TBT_A_TRX_DTX_N1 < 42>
TBTA_SBU2 < 44>
SW_TBT_A_ USB20_N2 <44> SW_TBT_A_ USB20_P2 <44>
TBT_A_TTX_DRX_N2 <42>
TBT_A_TTX_DRX_P2 <4 2>
TBT_B_TRX_DTX_P1 <42> TBT_B_TRX_DTX_N1 <42>
SW_TBT_B_ USB20_N2 <44> SW_TBT_B_ USB20_P2 <44>
TBTB_CC2 <4 4>TBTB_SBU1<44>
TBT_B_TTX_DRX_N2 <42> TBT_B_TTX_DRX_P2 < 42>
2
TBT_A_TTX_DRX_P1
TBT_A_TTX_DRX_N1
TBT_A_TRX_DTX_N2
TBT_A_TRX_DTX_P2
TBTA_CC1 TBTA_CC1
SW_TBT_A_ USB20_P1_R S W_TBT_A_US B20_P1_R
SW_TBT_A_ USB20_N1_R SW _TBT_A_USB2 0_N1_R
TBTA_SBU1 TBTA_SBU 1
TBT_B_TTX_DRX_P1
TBT_B_TTX_DRX_N1
TBT_B_TRX_DTX_N2
TBT_B_TRX_DTX_P2
DT5 AZ5B7 5-01B.R7G_CSP 0603P2Y2ESD@
1 2
DT6 AZ5B7 5-01B.R7G_CSP 0603P2Y2ESD@
1 2
DT9 AZ5B7 5-01B.R7G_CSP 0603P2Y2ESD@
1 2
DT10 AZ5B7 5-01B.R7G_CSP 0603P2Y2ESD@
1 2
DT7
ESD@
ESD@
10
9
7
6 5
1
1
2
2
4
4
5
3
3
8
DT11
1
1
2
2
4
4
5
3
3
8
9
10
8
9
7
7
6
6 5
AZ1045-04F_D FN2510P10E-10 -9
DT43 AZ5B7 5-01B.R7G_CSP 0603P2Y2ESD@
1 2
DT48 AZ5B7 5-01B.R7G_CSP 0603P2Y2ESD@
1 2
DT51 AZ5B7 5-01B.R7G_CSP 0603P2Y2ESD@
1 2
DT53 AZ5B7 5-01B.R7G_CSP 0603P2Y2ESD@
1 2
TBTB_CC1 TBTB_CC1
9
SW_TBT_B_ USB20_P1_R SW_TBT_B_US B20_P1_R
8
SW_TBT_B_ USB20_N1_R SW_TBT_B_USB 20_N1_R
7
TBTB_SBU1 TBTB_SBU1
6
AZ1045-04F_D FN2510P10E-10 -9
1
TBT_A_TRX_DTX_P1
TBT_A_TRX_DTX_N1
TBT_A_TTX_DRX_P2
TBT_A_TTX_DRX_N2
TBTA_SBU2 TBTA_SBU2
SW_TBT_A_ USB20_N2_R SW _TBT_A_USB20_ N2_R
SW_TBT_A_ USB20_P2_R SW _TBT_A_USB2 0_P2_R
TBTA_CC2 TBTA_CC2
TBT_B_TRX_DTX_P1
TBT_B_TRX_DTX_N1
TBT_B_TTX_DRX_P2
TBT_B_TTX_DRX_N2
TBTB_SBU2 TBTB_SBU2
SW_TBT_B_ USB20_N2_R SW_TBT_B_USB 20_N2_R
SW_TBT_B_ USB20_P2_R SW_TBT_B_US B20_P2_R
TBTB_CC2 TBTB_CC2
DT13 AZ5B7 5-01B.R7G_CSP 0603P2Y2ESD@
1 2
DT14 AZ5B7 5-01B.R7G_CSP 0603P2Y2ESD@
1 2
DT17 AZ5B7 5-01B.R7G_CSP 0603P2Y2ESD@
1 2
DT18 AZ5B7 5-01B.R7G_CSP 0603P2Y2ESD@
1 2
DT8
ESD@
9
1
10
8
2
9
7
7
4
6
6 5
3
8
AZ1045-04F_D FN2510P10E-10 -9
DT44 AZ5B75-0 1B.R7G_CSP06 03P2Y2ESD@
1 2
DT45 AZ5B75-0 1B.R7G_CSP06 03P2Y2ESD@
1 2
DT52 AZ5B75-0 1B.R7G_CSP06 03P2Y2ESD@
1 2
DT54 AZ5B75-0 1B.R7G_CSP06 03P2Y2ESD@
1 2
DT12
ESD@
9
10
8
9
7
7
6
6 5
AZ1045-04F_D FN2510P10E-10 -9
1
2
4
5
3
1
1
2
2
4
4
5
3
3
8
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
TYPE-C_Port1 (2/2) CONN
TYPE-C_Port1 (2/2) CONN
TYPE-C_Port1 (2/2) CONN
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
45 103
45 103
45 103
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
TYPE-C_Port2-1
TYPE-C_Port2-1
TYPE-C_Port2-1
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
46 103
46 103
46 103
1
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
TYPE-C_Port2-2
TYPE-C_Port2-2
TYPE-C_Port2-2
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
47 103
47 103
47 103
1
1.0
1.0
1.0
5
D D
4
3
2
1
Reserve
C C
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
TYPE-C_Port3-1
TYPE-C_Port3-1
TYPE-C_Port3-1
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
48 103
48 103
48 103
1
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
TYPE-C_Port3-2
TYPE-C_Port3-2
TYPE-C_Port3-2
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
49 103
49 103
49 103
1
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
TYPE-C_PWR Path
TYPE-C_PWR Path
TYPE-C_PWR Path
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
50 103
50 103
50 103
1
1.0
1.0
1.0
5
+3.3V_LAN
RL1 10K_0402_5 %@
RL2 10K_0402_5 %@
D D
@
PM_LANPH Y_ENABLE<18>
C C
RL7 0_0402_5%
XTALO_R
25MHZ_18PF_ 7V25000015
27P_0402_50V8J
CL13
1
2
TP_LAN_JTAG_TMS
1 2
TP_LAN_JTAG_TCK
1 2
+3.3V_LAN
1 2
1 2
RL34 0_040 2_5%
Y1
1
3
IN
OUT
2
4
GND1
GND2
10K_0402_5%
12
@
RL5
10K_0402_5%
@
12
RL9
LAN_DISABLE #_R
XTALO
XTALI
27P_0402_50V8J
CL14
1
2
SML0_SMB CLK<18,42>
SML0_SMB DATA<18,42>
4
CLKREQ_PCIE #3<16>
PLTRST_LAN#<17 >
CLK_PCIE_P3<16> CLK_PCIE_N3<16>
PCIE_PRX_DTX _P5< 15>
PCIE_PRX_DTX _N5<15 >
PCIE_PTX_DRX _P5< 15>
PCIE_PTX_DRX _N5<15>
SMBus Device Address 0xC8
@
LAN_W AKE#<18,58 >
RL10 0_0 402_5%
T73 PAD~ D@ T74 PAD~ D@
CLK_PCIE_P3 CLK_PCIE_N3
PCIE_PRX_C_ DTX_P5
12
CL1 0.1 U_0201_10V6K
PCIE_PRX_C_ DTX_N5
12
CL2 0.1 U_0201_10V6K
PCIE_PTX_C_DR X_P5
1 2
CL5 0.1 U_0201_10V6K
PCIE_PTX_C_DR X_N5
1 2
CL6 0.1 U_0201_10V6K
1 2
LAN_DISABLE #_R
LAN_ACTLED_ YEL# LED_100_ORG # LED_10_GRN#
TP_LAN_JTAG_TDI
1
TP_LAN_JTAG_TDO
1
TP_LAN_JTAG_TMS TP_LAN_JTAG_TCK
LAN_TEST_EN
RES_BIAS
3.01K_0402_1%
1K_0402_1%
12
12
RL13
RL12
+0.9V_LAN
XTALO XTALI
48 36
44 45
38 39
41 42
28 31
26 27 25
32 34 33 35
10
30
12
0.1U_0201_10V6K
1
CL12
2
UL1
CLK_REQ_N PE_RST_N
PE_CLKP PE_CLKN
PETp PETn
PERp PERn
SMB_CLK SMB_DATA
2
LANWAKE_N
3
LAN_DISABLE_N
LED0 LED1 LED2
JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TCK
9
XTAL_OUT XTAL_IN
TEST_EN
RBIAS
WGI219LM -SLKJ2-A0_QFN 48_6X6~D
0.1U_0201_10V6K
0.1U_0201_10V6K
1
1
CL10
CL9
2
2
PCIE
JTAG LED
1
2
MDI_PLUS0
MDI_MINUS0
MDI_PLUS1
MDI_MINUS1
MDI_PLUS2
MDI
MDI_MINUS2
MDI_PLUS3
MDI_MINUS3
SVR_EN_N
RSVD1_VCC3P3
SMBUS
VDD3P3_IN
VDD3P3_15 VDD3P3_19 VDD3P3_29
VDD0P9_47 VDD0P9_46 VDD0P9_37
VDD0P9_43
VDD0P9_11
VDD0P9_40 VDD0P9_22 VDD0P9_16
VSS_EPAD
0.1U_0201_10V6K
1
CL11
2
VDD3P3_4
VDD0P9_8
CTRL0P9
22U_0603_6.3V6M
CL8
3
13 14
17 18
20 21
23 24
6
1
5
4
15 19 29
47 46 37
43
11
40 22 16 8
7
49
LAN_MDIP0 LAN_MDIN0
LAN_MDIP1 LAN_MDIN1
LAN_MDIP2 LAN_MDIN2
LAN_MDIP3 LAN_MDIN3
VCT_LAN_R1
+RSVD_VC C3P3_2
+3.3V_LAN _OUT
+REGCTL_PNP 10
+3.3V_LAN
22U_0603_6.3V6M
0.1U_0201_10V6K
1
1
CL280
2
2
+0.9V_LAN
+REGCTL_PNP 10
CL28
change 15 to 0 ohm 1/15
@
1 2
RL71 0_0 402_5%
@
1 2
RL72 0_0 402_5%
@
1 2
RL73 0_0 402_5%
@
1 2
RL74 0_0 402_5%
@
1 2
RL75 0_0 402_5%
@
1 2
RL76 0_0 402_5%
@
1 2
RL77 0_0 402_5%
@
1 2
RL78 0_0 402_5%
@
1 2
RL3 0_0402_5%
12
RL50 4.7K _0402_5%@
12
RL6 4.7K_040 2_5%
1 2
RL8 0 _0603_5%@
1U_0201_10V6M
1
CL7
2
LL1
1 2
4.7UH_MPB 201210T-4R7M-NA2 _20%
Idc min=500mA DCR=100m ohm
LAN_MDIP0_L <51 > LAN_MDIN0_L <51>
LAN_MDIP1_L <51 > LAN_MDIN1_L <51>
LAN_MDIP2_L <51 > LAN_MDIN2_L <51>
LAN_MDIP3_L <51 > LAN_MDIN3_L <51>
+3.3V_LAN
+3.3V_LAN
+0.9V_LAN
10U_0402_6.3V6M
CL3
1
1
2
2
2
QL1A
2N7002KDW _SOT363-6
LAN_ACTLED_ YEL# LAN_ ACTLED_YEL#_Q
+3.3V_LAN
12
RL29 1M_0402_5%
2N7002KDW _SOT363-6
LED_100_ORG #
LED_100_ORG #
LED_10_GRN#
+3.3V_LAN
12
RL30 1M_0402_5%
LED_10_GRN#
0.1U_0201_10V6K
CL4
S
G
2
QL1B
S
G
5
+3.3V_LAN
1
2
S
D
61
D
LED_100_ORG #_Q
34
LED_MASK #
5
P
IN1
IN2
G
3
QL7 L2N7002W T1G_SC-70-3
D
13
G
2
1
LED_MASK #
CL15
@
1 2
0.1U_0201_1 0V6K
UL2 SN74AHC1G0 8DCKR_SC70-5
4
O
LED_10_GRN# _Q
LED_MASK #
LED_MASK # <58,62>
LOM_CABLE _DETECT# <58>
change SB00000UO00 to SB000009Q80/ SB00000ST00 as main source, SB00000UO00 as 3rd source
Note: +1.0V_LAN will work at 0.95V to
1.15V
Place C462, C463 and L29 close to U31
+3.3V_LAN/+3.3V_LAN_LOM:20mils
RJ45_MDIN3
RJ45_MDIP3
RJ45_MDIN1
RJ45_MDIN2
RJ45_MDIP2
RJ45_MDIP1
RJ45_MDIN0
RJ45_MDIP0
+3.3V_LAN
+3.3V_LAN
1U_0201_10V6M
1
CL199
2
Close to JLOM1
2016/01/01
2016/01/01
2016/01/01
JLOM1
A2
YELLOW_LED-
A1
YELLOW_LED+1
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
B1
GREEN_LED-
B3
ORANGE_LED-
B2
YELLOW_LED+
SANTA_13045 6-921
CONN@
Update symbol
0.1U_0201_10V6K
1
1
CL19
2
2
GND1
GND2
470P_0402_50V7K
CL18
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
10
9
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2017/01/01
2017/01/01
2017/01/01
Title
LAN / LAN SW
LAN / LAN SW
LAN / LAN SW
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
51 103
51 103
51 103
1.0
1.0
1.0
LAN_MDIP0_L<51>
B B
+TRM_CT1
+TRM_CT2
0.47U_0201_25V6M
0.47U_0201_25V6M
CL16
CL17
1
1
2
2
+TRM_CT3
+TRM_CT4
0.47U_0201_25V6M
0.47U_0201_25V6M
1
1
CL20
CL21
2
2
LAN_MDIN0_L<51>
LAN_MDIP1_L<51>
LAN_MDIN1_L<51>
LAN_MDIP2_L<51>
LAN_MDIN2_L<51>
LAN_MDIP3_L<51>
LAN_MDIN3_L<51>
LAN_MDIP0_L
LAN_MDIN0_L
LAN_MDIP1_L
LAN_MDIN1_L
LAN_MDIP2_L
LAN_MDIN2_L
LAN_MDIP3_L
LAN_MDIN3_L
TL1
1
TD1+
2
TD1-
3
TDCT1
4
TDCT2
5
TD2+
6
TD2-
7
TD3+
8
TD3-
9
TDCT3
10
TDCT4
11
TD4+
TD4-12TX4-
MHPC_NS69 2417
TXCT1
TXCT2
TXCT3
TXCT4
TX1+
TX1-
TX2+
TX2-
TX3+
TX3-
TX4+
24
23
22
21
20
19
18
17
16
15
14
13
9/5
CL22
EMI@
10P_1808_3 KV8J
RJ45_MDIP0
RJ45_MDIN0
RJ45_MDIP1
RJ45_MDIN1
RJ45_MDIP2
RJ45_MDIN2
RJ45_MDIP3
RJ45_MDIN3
1 2
Z2805
Z2807
Z2806
Z2808
GND_CHASSIS
LAN_ACTLED_ YEL#_Q
12
12
12
12
RL18 75_0402_1%
RL16 75_0402_1%
RL17 75_0402_1%
RL15 75_0402_1%
LED_10_GRN# _Q
LED_100_ORG #_Q
1 2
RL14 150_0402_5 %
1 2
RL19 150_0402_5 %
1 2
RL20 150_0402_5 %
GND CHASSIS
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
5
D D
Reserve for CNVI
1 2
CNV_PRX_DTX_N1<14> CNV_PRX_DTX_P1<14>
CNV_PRX_DTX_N0<14> CNV_PRX_DTX_P0<14>
CLK_CNV_PRX_DTX_N<14> CLK_CNV_PRX_DTX_P<14>
PCIE_PTX_DRX _P7<1 5> PCIE_PTX_DRX _N7<15>
WLAN
CNV_PTX_DRX_N1<14> CNV_PTX_DRX_P1<14>
CNV_PTX_DRX_N0<14> CNV_PTX_DRX_P0<14>
CLK_CNV_PTX_DRX_N<14> CLK_CNV_PTX_DRX_P<14>
C C
RZ529 0 _0201_5%@
1 2
RZ530 0 _0201_5%@
1 2
RZ527 0 _0201_5%@
1 2
RZ528 0 _0201_5%@
1 2
RZ526 0 _0201_5%@
1 2
RZ525 0 _0201_5%@
1 2
CZ12 0. 1U_0201_25V6 K
1 2
CZ13 0. 1U_0201_25V6 K
PCIE_PRX_DTX _P7<1 5> PCIE_PRX_DTX _N7<15>
CLK_PCIE_P6<16> CLK_PCIE_N6<16>
CLKREQ_PCIE #6<16>
PCIE_WA KE#<27,42,59,6 7,68>
1 2
CZ539 0.1U_0201_25 V6K@
1 2
CZ538 0.1U_0201_25 V6K@
1 2
CZ537 0.1U_0201_25 V6K@
1 2
CZ536 0.1U_0201_25 V6K@
1 2
RZ524 0 _0201_5%@
1 2
RZ523 0 _0201_5%@
USB20_P14 _R USB20_N14 _R
PCIE_PTX_C_DRX_P7 PCIE_PTX_C_DRX_N7
PCIE_WA KE#
CNV_PTX_C_D RX_N1 CNV_PTX_C_D RX_P1
CNV_PTX_C_D RX_N0 CNV_PTX_C_D RX_P0
CLK_CNV_P TX_DRX_N_R CLK_CNV_P TX_DRX_P_R
4
WLAN/BT
NGFF slot_1 Key A
JNGFF1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
GND_2
NPTH170NPTH2
BELLW _80148-4221
CONN@
GND_1
2 4 6
8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66
2 4 6
8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66
68
71
+3.3V_WLAN
WLAN_WIGIG60GHZ_DIS#_R
WLAN_ COEX3 WLAN_ COEX2 WLAN_ COEX1
WIGIG_32KHZ
PCH_PLTRST#_A ND
BT_RADIO_DIS#_R
Reserve for CNVI
1 2
RZ531 22_0402_5 %@
1 2
RZ532 22_0402_5 %@
1 2
RZ533 22_0402_5 %@
1 2
RZ534 22_0402_5 %@
1 2
RZ535 22_0402_5 %@
1 2
RZ536 22_0402_5 %@
PCH_CL_RS T1# <14>
PCH_CL_DA TA1 <14>
PCH_CL_CLK 1 <14>
1 2
RZ56 0_0402_5 %
PCH_PLTRST#_R <17,42,67,68 >
1 2
RZ371 0_0402_5%@
1 2
RZ78 0_0402_ 5%@
1 2
RZ79 0_0402_ 5%@
1 2
RZ80 0_0402_ 5%@
1 2
RZ81 0_0402_ 5%@
Reserve for CNVI
3
CNV_RF_RES ET#_R
CLKREQ_CNV _R
CNV_BRI_PRX _DTX <14>
CNV_RGI_PTX_DR X <14>
CNV_RGI_PRX_ DTX <14>
CNV_BRI_PTX_D RX <14>
SUSCLK < 18,52,67,68>
REFCLK_CNV <16>
ISH_UART0_RXD <19> ISH_UART0_TXD < 19>
ISH_UART0_CTS# <19>
ISH_UART0_RTS# <19>
USB20_N14<15>
USB20_P14<15>
WLAN_ WIGIG60GHZ_DIS#_R
BT_RADIO_DIS#_R
0.01U_0402_16V7K
0.01U_0402_16V7K
@
12
12
CZ542
CZ543
+3.3V_W LAN
0.1U_0201_10V6K
1
2
10U_0402_6.3V6M
1
CZ530
2
RF Request
1 2
RI49 0_0402_5 %@RF@
L1
1 2
MCM1012B9 00F06BP_4P
1 2
RI50 0_0402_5 %@RF@
DZ1
2 1
RB751S-40_ SOD523-2
DZ2
2 1
RB751S-40_ SOD523-2
12
CZ531
2
34
WLAN_ WIGIG60GHZ_DIS# <58 >
BT_RADIO_DIS# <58>
CLOSE TO PIN 64,66CLOSE TO PIN 2,4
0.01U_0402_16V7K
0.01U_0402_16V7K
@
1
12
CZ533
CZ532
2
2
QZ17A
2
QZ18A
1 2
1 2
+3.3V_ALW
+3.3V_ALW
12
1 6
12
1 6
100K_0402_5%
@
RZ377
@
100K_0402_5%
RZ381
0_0201_5%
1
+1.8V_PRIM_ PCH
5
+1.8V_PRIM_ PCH
5
CNV_RF_RES ET#_RCNV_RF_RES ET#
@
100K_0402_5%
RZ378
12
CNV_RF_RES ET#_R
QZ17B
@
L2N7002DW 1T1G_SC88-6
4 3
@
10K_0402_5%
12
RZ376
CLKREQ_CNV _R
QZ18B
@
L2N7002DW 1T1G_SC88-6
4 3
Reserve for CNVI
USB20_N14 _R
USB20_P14 _R
CNV_RF_RESET#<18>
330U_D2E_6.3VM_R25M
10U_0402_6.3V6M
0.1U_0201_10V6K
1
@
1
+
CZ535
CZ157
CZ534
2
2
Remove CNV_RF_RESET
CNV_RF_RES ET#
75K PD at P CH side
CLKREQ_CNV<18>
75K PD at P CH side
CLKREQ_CNV CLKREQ_CNV_R
@
L2N7002DW 1T1G_SC88-6
CLKREQ_CNV
@
L2N7002DW 1T1G_SC88-6
RZ3 0_0201_5%@
RZ4
@
WWAN/LTE
NGFF slot_2 Key B
JNGFF2
CONFIG_1
0
0
0
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
GND2
NPTH170NPTH2
LOTES_APCI0071 -P001A
CONN@
NGFF_CONFIG_3<58 >
USB20_P8<15 > USB20_N8<15>
NGFF_CONFIG_0<58 >
WWAN_W AKE#<58>
B B
PCIE_PTX_DRX_N8<15> PCIE_PTX_DRX_P8<15>
PCIE_PRX_DTX_P8<15> PCIE_PRX_DTX_N8<15>
1 2
CZ10 0. 1U_0201_10V6 K
1 2
CZ11 0. 1U_0201_10V6 K
CLK_PCIE_N2<16> CLK_PCIE_P2<16>
NGFF_CONFIG_1<58 >
NGFF_CONFIG_2<58 >
STATE #
0
A A
8
14
5
USB3_PRX _L_DTX_N2 USB3_PRX _L_DTX_P2
USB3_PTX_L_ DRX_N2 USB3_PTX_L_ DRX_P2
PCIE_PTX_C_DR X_N8
PCIE_PTX_C_DRX_P8
CONFIG_0 CONFIG_2
0
1
1
+3.3V_WW AN
2
2
4
4
WWAN_FULL_PW R_EN
6
6
WWAN_RADIO_DIS#_R
8
8
10
10
12
12
14
14
16
GND1
16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66
18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66
68
71
HW_GPS_DISABLE#_R
PCH_PLTRST#_R
PCIE_WA KE#
WW AN_COEX3 WW AN_COEX2 WW AN_COEX1 SIM_DET
SUSCLK <18,52,67,68>
CONFIG_3
0
0
1
0
0
1
UIM_RESET UIM_CLK UIM_DATA
Change net name 3/20
WWAN_FULL_PW R_EN <17>
WWAN_RADIO_DIS#_R
HW_GPS_DISABLE#_R
+SIM_PWR
CLKREQ_PCIE#2 <16>
7/4 update
1 2 1 2
RZ128 0_0402_5%@
1 2
RZ129 0_0402_5%@
RZ130 0_0402_5%@
RZ373 0 _0201_5%@RF@ RZ372 0 _0201_5%@RF@ RZ374 0 _0201_5%@RF@
Module Type
SSD-SATA
WWAN
HCA-PCIE
1 Cache15 1 11
4
1 2 1 2 1 2
+3.3V_WW AN
WLAN_ COEX3 WLAN_ COEX2 WLAN_ COEX1
Change RZ43 to depop 3/29
12
RZ43 10K _0402_5%@
DZ5
2 1
RB751S-40_ SOD523-2
DZ6
2 1
RB751S-40_ SOD523-2
CNV_COEX1 CNV_COEX2 CNV_COEX3
+3.3V_W WAN
0.047U_0201_10V6K
CZ17
1
2
Change net name 3/20
WWAN_FULL_PW R_EN
USB3_PTX_DR X_N2<18 >
USB3_PTX_DR X_P2< 18>
CNV_COEX1 <14> CNV_COEX2 <14> CNV_COEX3 <14>
0.047U_0201_10V6K
33P_0402_50V8J
CZ18
1
1
CZ19
2
2
C613 change to 0603 due to height limitation.
100P_0402_50V8J
1
CZ198
2
WWAN_RADIO_DIS# <58>
GPS_DISABLE# <58>
USB3_PTX_DR X_N2
USB3_PTX_DR X_P2
33P_0402_50V8J
22U_0603_6.3V6M
1
12
CZ20
2
C615 footprint change to C_APXK2R5ARA331MF451
3
USB3_PRX _DTX_N2<18>
USB3_PRX _DTX_P2<1 8>
1 2
CZ28 0. 1U_0201_10V6 K
1 2
CZ29 0. 1U_0201_10V6 K
330U_D2E_6.3VM_R25M
1
+
CZ21
CZ164
2
1 2
RI27 0_0402_5 %@RF@
1 2
RI28 0_0402_5 %@RF@
USB3_PRX _DTX_N2
USB3_PRX _DTX_P2
USB3_PTX_C_ DRX_N2
USB3_PTX_C_ DRX_P2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LI16RF@
2
2
3
3
DLW21H N900HQ2L_4P
LI17RF@
2
2
3
3
DLW21H N900HQ2L_4P
1 2
RI30 0_0402_5 %@RF@
1 2
RI29 0_0402_5 %@RF@
2016/01/01
2016/01/01
2016/01/01
1
1
4
4
1
1
4
4
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
USB3_PRX _L_DTX_N2
USB3_PRX _L_DTX_P2
USB3_PTX_L_ DRX_N2
USB3_PTX_L_ DRX_P2
SIM Card Push-Push
UIM_DATA
11
2017/01/01
2017/01/01
2017/01/01
JSIM1
NC21NC1
3
I/O
VPP5RST
GND37VCC
9
GND4
GND5
T-SOL_159-12013 00600
CONN@
CIS link OK
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Documen t Number Rev
Size Documen t Number Rev
Size Documen t Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
SIM_DET_R
2
4
CLK
6
8
10
GND1
12
GND2
UIM_RESET
UIM_CLK
UIM_DATA
For RF Team request
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
WLAN (w/ CNVi) / WWAN
WLAN (w/ CNVi) / WWAN
WLAN (w/ CNVi) / WWAN
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
1 2
@
RZ522 0_0402_5%
UIM_CLK
UIM_RESET
@RF@
33P_0402_50V8J
CZ39
1
2
1
1
2
+SIM_PWR
12
@RF@
33P_0402_50V8J
CZ38
SIM_DET
1U_0201_10V6M
CZ37
@RF@
33P_0402_50V8J
CZ40
1
2
52 103
52 103
52 103
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
WIGIG / WIDI
WIGIG / WIDI
WIGIG / WIDI
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
53 103
53 103
53 103
1
1.0
1.0
1.0
5
4
3
2
1
Power Control for WLAN &WWAN
Power Control for LAN
+5V_ALW_R
LNG2DM
+3.3V_ALW_R
RES
INT 1 INT 2
GND2 GND3
UZ7
1
VIN1
2
VIN2
3
ON
4
VBIAS
AOZ1336DI_DFN8_2X2
5
12 11
6 7 8
7
VOUT1
8
VOUT2
6
CT
5
GND1
9
GND2
HDD_FALL_INT <19>
FFS_INT2 <19>
UZ44
D D
WLAN_PWR _EN
100K_0402_5%
12
R127
3.3V_WWAN_EN<58>
C C
SLP_WLAN#_GATE<58>
SIO_SLP_WLAN#<18,58>
AUX_EN_WOW L<58>
EC request to reserve OR gate for WLAN power enable
+3.3V_ALW_R
+5V_ALW_R
100K_0402_5%
+3.3V_ALW_R
12
R129
+3.3V_ALW
10K_0402_5%
12
RZ375
2
G
SIO_SLP_WLAN#_Q
1 3
D
S
QZ15
L2N7002WT1G_SC-70-3
1
VIN1_1
2
VIN1_2
3
ON1
4
VBIAS
5
ON2
6
VIN2_1
7
VIN2_2
EM5209VF_DFN14_3X2
+3.3V_ALW_PCH
12
VOUT1_1 VOUT1_2
VOUT2_1 VOUT2_2
10K_0402_5%
@
RZ1385
GND
GPAD
14 13
12
CT1
11
10
CT2
9 8
15
20K_0402_5%
12
RZ379
+3.3V_WLAN_PW R +3.3V_WLAN
+3.3V_WLAN_PW R
470P_0402_50V7K
2
C192
1
1 2
RZ71 0_0402_5%@
3
2
BAT54CW_SOT323-3
1 2
@
RZ70 0_0402_5%
DZ9
2
1
1
2
470P_0402_50V7K
C193
1
JUMP@
PJP36
2
112
C190 10U_0402_6.3V6M
JUMP_43X79
+3.3V_WWAN_PW R +3.3V_W WAN
+3.3V_WWAN_PW R
WLAN_PWR _EN
10U_0402_6.3V6M
1
2
JUMP@
PJP37
2
JUMP_43X79
C194
SIO_SLP_LAN#<18,58>
112
+3.3V_RUN
10U_0402_6.3V6M
0.1U_0201_25V6K
1
1
CN1
CN2
2
2
DDR_XDP_WAN_ SMBDAT<7,18,23,24,25,26> DDR_XDP_WAN_ SMBCLK<7,18,23,24,25,26>
100K_0402_5%
12
R128
Free Fall Sensor
LGA1
10
VDD_IO
9
VDD
3
SDO/SA0
4
SDA/SDI/SDO SCL/SPC1GND1
2
CS
LNG2DMTR_LGA12_2X2
+3.3V_LAN
10U_0402_6.3V6M
1
C191
470P_0402_50V7K
C195
1
2
2
+5V_HDD
100K_0402_5%
12
+3.3V_RUN
100K_0402_5%
12
RN2
61
D
2
G
QN1A 2N7002KDW_SOT363-6
S
RN1
FFS_INT2_Q <6 7>
34
DSQN1B
5
G
2N7002KDW_SOT363-6
B B
+3.3V_ALW_R
Power Control for M.2 slot 3. Source Power Control for M.2 slot 5. Source
+3.3V_ALW
SLOT3_SSD_PWR_EN<58>
SLOT5_SSD_PWR_EN<59>
A A
+5V_ALW
+3.3V_ALW
12
100K_0402_5%
100K_0402_5%
12
RZ539
RZ538
5
UZ9
1
VOUT1_1
VIN1_1
2
VOUT1_2
VIN1_2
3
ON1
4
VBIAS
5
ON2
6
VIN2_1
VOUT2_1
7
VIN2_2
VOUT2_2
GPAD
EM5209VF_DFN14_3X2
CT1
GND
CT2
14 13
12
11
10
9 8
15
+3.3V_SSD3_PWR +3.3V_SSD3
470P_0402_50V7K
470P_0402_50V7K
2
2
C201
C202
1
1
4
JUMP@
PJP30
2
10U_0402_6.3V6M
JUMP_43X79
1
C200
2
112
+3.3V_SSD5+3.3V_SSD5_PWR
JUMP@
PJP64
2
C203
112
JUMP_43X79
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
10U_0402_6.3V6M
1
2
SLOT4_SSD_PWR_EN<58>
2016/01/01
2016/01/01
2016/01/01
3
100K_0402_5%
12
RZ537
+5V_ALW_R
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Power Control for M.2 slot 4. Source
UZ58
1
VOUT1
VIN1
2
VOUT2
VIN2
3
ON
4
VBIAS
GND1 GND2
AOZ1336DI_DFN8_2X2
2017/01/01
2017/01/01
2017/01/01
2
+3.3V_SSD4_PWR +3.3V_SSD4
7 8
6
CT
5 9
1
470P_0402_50V7K
C207
1
2
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
JUMP@
PJP62
2
10U_0402_6.3V6M
C206
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
WLAN / WWAN PWR
WLAN / WWAN PWR
WLAN / WWAN PWR
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
112
JUMP_43X79
1
54 103
54 103
54 103
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
PCIE device
PCIE device
PCIE device
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
55 103
55 103
55 103
1
1.0
1.0
1.0
5
1W x 1ch, 4ohm (Transducer spec is 8Ohm /0.5Watt per unit, there are two transducer units in one speaker box.)
Internal Speakers Header
INT_SPK_L+ INT_SPK_L­INT_SPK_R+ INT_SPK_R-
D D
40 mils trace keep 20 mil spacing
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
12
12
12
CA19@EMI@
CA22@EMI@
CA23@EMI@
1 2
LA6 BLM15P X330SN1D_2PE MI@
1 2
LA7 BLM15P X330SN1D_2PE MI@
1 2
LA8EMI@ BLM15PX 330SN1D_2P
1 2
LA9 BLM15P X330SN1D_2PE MI@
1000P_0402_50V7K
12
CA24@EMI@
@ESD@
2
3
AZ5125-02S.R7G_SOT23-3
DA6
AZ5125-02S.R7G_SOT23-3
1
2
3
@ESD@
DA7
1
INT_SPKR_L+ INT_SPKR_L­INT_SPKR_R+
SMART_SPK_DET0#<14>
FOLLOW X10 H Dell GPIO map
INT_SPKR_R-
1 2 3 4 5 6
ACES_5027 1-0060N-001
RA224
12
10K_0402_5 %
JSPK1
1
G1 2 3 4 5 6
G2
CONN@
+3.3V_RUN_ AUDIO
4
+1.8V_RUN +5V_RUN_AUDIO
7
8
+5V_RUN_AUDIO
RA201 0_06 03_5%@
1 2
LA27
BLM15PX6 00SN1D_2P
12
place close to pin20
12
place close to pin40
12
+1.8V_RUN_AUDIO
10U_0603_10V6M
0.1U_0201_10V6K
CA58
CA57
1
2
10U_0603_10V6M
+VDDA_AVDD1
0.1U_0201_10V6K
CA8
1
CA9
2
3
+3.3V_RUN_AUDIO_DVDD
0.1U_0201_10V6K
1
2
2
+3.3V_RUN_AUDIO
12
10U_0603_10V6M
+3.3V_RUN_AUDIO_IO
CA56
CA55
12
0.1U_0201_10V6K
1
2
10U_0603_10V6M
CA10
CA61
12
LA12 BLM15PX600 SN1D_2P
12
LA14 BLM15PX600 SN1D_2P
+5V_RUN_PVDD_L
place close to pin41 place close to pin46
10U_0603_10V6M
0.1U_0201_10V6K
1
2
0.1U_0201_10V6K
CA45
CA47
1
1
2
1
CA46
2
2
10U_0603_10V6M
CA48
LA21
1 2
HCB2012VF-6 01T20_2P
600 Ohm/2A
1
10U_0603_10V6M
0.1U_0201_10V6K CA60
1
1
CA59
2
2
Close to UA1 pin42~45
Close to UA1 pin14
HDA_BIT_CLK_R
33_0402_5%
12
RA17@EMI@
10P_0402_50V8J
12
CA33@EMI@
C C
AUD_SENSE_A
CLASS-D POWER DOWN CONTROL CIRCUIT
NB_MUTE#<58>
HDA_RST#_R<18>
JUMP@
B B
+3.3V_RUN +3.3V_RUN_AUDIO
place at AGND and DGND plane
@
RA221 0_0402_5%
@
RA222 0_0402_5%
@
RA223 0_0402_5%
@
RA226 0_0402_5%
@
RA227 0_0402_5%
@
A A
RA228 0_0402_5%
PJP17
1 2
PAD-OPEN1x2m
JUMP@
PJP18
1 2
PAD-OPEN1x1m
12
12
12
12
12
12
+5V_RUN_AUDIO+5V _RUN
2.5A
500mA
DMIC_CLK
68P_0402_50V8J
RF@
1
CA54
2
place close to UA1 pin6
Verb table configures as 1 JD mode with internal 47K pull high to save external rBOM.
13
D
2
0.1U_0201_25V6K
G
QA10
S
L2N7002WT1G_SC-70-3
@
RA48 0_0402 _5%
RA50 0_0402 _5%
@
@JUMP@
PJP19
1 2
PAD-OPEN1x1m
12
1 2
21
DA8
@
RB751S-40_ SOD523-2
1 2
@
CA41
AUD_HP_NB_SENSE
Add for solve pop noise and detect issue
PD#
HDA_SYNC_R<18>
HDA_BIT_CLK_R<18>
HDA_SDOUT_R<18>
HDA_SDIN0<18>
NO DOCK
RA52 100K_0402 _5%
DMIC0<38>
DMIC_CLK DMIC_CLK_CODEC
DMIC_CLK<38>
CA31 1U_02 01_6.3V6M
downsize
+3.3V_RUN_AUDIO_DVDD
Place CA29 close to Codec only Samsung,Taiyo,Murata can use
RA18 10K_0402_ 5%
AUD_SENSE_A
CA35 2.2U_0402_6 .3V6M
CA51 10U_0603_10 V6M
CA25 10U_0603_10 V6M
SLEEVE
RA6 2.2K_04 02_5%
RING2
RA5 2.2K_04 02_5%
downsize,and add CA232,CA233
CA233 1U_0201_6.3V6K
CA49 1U_0 201_6.3V6K
CA232 1U_0201_6.3V6K
CA29 1U_0 201_6.3V6K
CA52 10U_0603_10V6M
CA53 10U_0603_10 V6M
HDA_BIT_CLK_R
HDA_SDOUT_R
Place RA9 close to codec
HDA_SDIN0_R
1 2
RA9 33_0402 _5%
1 2
1 2
RA14EMI@ 22_0402 _5%
1 2
1 2
1 2
1 2
RA44 100K _0402_5%
1 2
1 2
12
+MIC2-VREFO-R
12
+MIC2-VREFO-L
1 2
1 2
1 2
1 2
1 2
1 2
UA1
6
I2C_DATA
7
I2C_CLK
15
SYNC
14
BCLK
17
SDATA-OUT
13
DC_DET/EPAD
16
SDATA-IN
11
I2S-MCLK/GPO3
10
I2S-BCLK/DSD-SCLK
9
I2S-OUT/DSD-R
12
I2S-LRCK/DSD-L
8
I2S-IN
1
I2S-EN/SPDIF-OUT/GPIO2/DMIC-DATA34/DM IC-CLK-IN
4
GPIO0/DMIC-DATA12
5
GPIO1/DMIC-CLK
2
PD#
PDB
48
JD1
47
JD2
38
VREF
39
LDO1-CAP
32
MIC2-CAP
29
MIC2-VREFO-R
28
MIC2-VREFO-L
25
CPVEE
24
CBN
23
CBP
21
LDO2-CAP
19
LDO3-CAP
SLEEVE RING2
AUD_HP_OUT_R AUD_HP_OUT_L
ESD@
1 2
CA1
220P_0402_50V8J
34
PCBEEP
30
MIC2-L/RING2
31
MIC2-R/SLEEVE
36
LINE2-L
35
LINE2-R
42
SPK-OUT-L+
43
SPK-OUT-L-
44
SPK-OUT-R-
45
SPK-OUT-R+
27
HPOUT-L
26
HPOUT-R
5VSTB/AUX_MODE
ALC3281-CG_M QFN48_6X6
ESD@ ESD@ EMI@ EMI@
ESD@
1 2
CA4
33
40
AVDD1
20
CPVDD/AVDD2
3
DVDD
18
DVDD-IO
41
PVDD1
46
PVDD2
49
G
37
AVSS1
22
AVSS2
1 2
LA11 BLM 15PX330SN1 D_2P
1 2
LA10 BLM 15PX330SN1 D_2P
1 2
LA16 BLM 15PX330SN1 D_2P
1 2
LA15 BLM 15PX330SN1 D_2P
220P_0402_50V8J
CA27 0.1U_ 0201_25V6K
AUD_PC_BEEP
CA28 0.1U_ 0201_25V6K
RING2
SLEEVE/RING2 please keep 40 mils trace width
SLEEVE
LINE1-L
CA43 10U_0603_10 V6M
LINE1-R
CA44 10U_0603_10 V6M
INT_SPK_L+
INT_SPK_L-
INT_SPK_R-
INT_SPK_R+
HP_OUT_L AUD_HP_OUT_L
HP_OUT_R AUD_HP_OUT_R
1
2
1 2
RA213 0_04 02_5%@
1 2
+VDDA_AVDD1
+1.8V_RUN_AUDIO
+3.3V_RUN_AUDIO_DVDD
+3.3V_RUN_AUDIO_IO
+5V_RUN_PVDD_L
SPKR_R
12
12
AUD_HP_OUT_L/ AUD_HP_OUT_Rplease keep 15 mils trace width
1 2
1 2
330P_0402_50V8J
330P_0402_50V8J
EMI@
EMI@
1
CA225
CA224
2
+RTC_CELL +VDDA _AVDD1
RA214
10K_0402_5 %
CA2 680P _0402_50V7K
1
2
RA12 1K_0402_5 %
BEEP_R
RA13 1K_0402_5 %
HP_OUT_L
HP_OUT_R
12
12
Change BOM Structure to EMI@ 1/21
SLEEVE_R RING2_R
AUD_HP_OUT_R1 AUD_HP_OUT_L1
EMI@
CA3 680P _0402_50V7K
EMI@
1
2
1 2
1 2
RA716 .2_0402_1%
RA816 .2_0402_1%
RF Request RF Request RF Request
+5V_RUN_A UDIO +1.8V_RUN +3.3V_RUN_AUDIO+ 1.8V_RUN_AUD IO
12P_0402_50V8J
1
2
ESD@
2
3
DA3
AZ5123-02S.R7G_SOT23-3
1
68P_0402_50V8J
RF@
RF@
1
CA63
CA64
2
+3.3V_RUN_ AUDIO
12
ESD@
2
3
DA2
1
SPKR <18>
BEEP <58>
RA219 10K_0402_5 %
AUD_HP_NB _SENSE
3
AZ5125-02S.R7G_SOT23-3
2
1
+3.3V_RUN_AUDIO_DVDD
Place CA70 close to codec
RF@
33P_0402_50V8J
CA69
1
2
ESD@
12
DA1
AZ5125-02S.R7G_SOT23-3
12P_0402_50V8J
RF@
1
1
CA65
2
2
HP-Out-Right Nokia-MIC
HP-Out-Left
RA220 100K_0402_ 5%
CA12 680P_0402_50V7K
@ESD@
CA13 680P_0402_50V7K
1
1
2
2
SPKR_R
0.1U_0201_25V6K
BEEP_R
CA226
12
68P_0402_50V8J
RF@
CA66
Global Headset
Universal Jack
JHP1
3 1
5 6 2 4
SINGA_2SJ30 88-024111F
CONN@
Update symbol
@ESD@
Place CA12 & CA13 close to Audio Jack
12
12
12P_0402_50V8J
RF@
1
CA67
2
iPhone-MIC
Normal Open
100P_0402_50V8J
10K_0402_5%
@
12
CA228@
RA225
100P_0402_50V8J
10K_0402_5%
@
12
RA209
CA227@
68P_0402_50V8J
RF@
1
CA68
2
10 9
7
G
8
G
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Codec _ALC3281
Codec _ALC3281
Codec _ALC3281
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
56 10 3
56 10 3
56 10 3
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Audio Ampfilper
Audio Ampfilper
Audio Ampfilper
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
57 103
57 103
57 103
1
1.0
1.0
1.0
A
+RTC_CELL
+3.3V_ALW_UE1
PJP22
JUMP@
+3.3V_ALW
+3.3V_ALW_UE1
1 1
+1.8V_PRIM
2 2
3 3
0.1U_0201_10V6K
0.1U_0201_10V6K
CE20
CE19
1
1
2
2
close to pin G8/M9
RF Request
+3.3V_ALW
68P_0402_50V8J
12P_0402_50V8J
RF@
RF@
1
1
CE60
CE59
2
2
JUMP@
1 2
1
PAD-OPEN1x1m
CE22
0.1U_0201_1 0V6K
2
Remove PJP21
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
12
RE10 100K_040 2_5%
12
RE11 100K_040 2_5%
12
RE365 100K_0402_ 5%
RP change to single Resistor
1 2
RE736 100K_0402_5%
1 2
RE737 100K_0402_5%
1 2
RE738 100K_0402_5%
1 2
RE95 100K_ 0402_5%
1 2
RE526 10K _0402_5%@
1 2
RE532 4.7K _0402_5%
RE557 10K_0402_5%
PJP20
WWAN_RADIO_DIS#
BT_RADIO_DIS#
BC_DAT_ECE1 117
CV2_ON_R
IMVP_VR_ON_ EC
RUN_ON_EC
TBT_RESET_N_EC_ R
USH_DET#
BCM5882_A LERT#
GPU_PW R_LEVEL
12
+3.3V_ALW
100K_0402_5%
FOLLOW X10 H Dell GPIO map
FOLLOW BR
1
0.1U_0201_1 0V6K
Close to pin N5
2
RE63
10U_0402_6.3V6M
12
0.1U_0201_10V6K
CE15
1
2
Close to pin H1
PCH_DPWROK<18>
SIO_EXT_W AKE#< 19>
SIO_SLP_SUS#<18>
PANEL_MON ITOR<38>
FOLLOW X10 H Dell GPIO map
SLP_WLAN#_GATE<54,58>
+1.8V_ALW_VTR3
CE21
+3.3V_ALW2
1 2
PAD-OPEN1x1m
CE16
RE314 100_ 0402_1%
+VSS_PLL
SUSACK#<18>
Remove VCCST_PWRGD and RE308
TBT_RESET_N_EC<42>
FOLLOW X10 H Dell GPIO map
SIO_SLP_WLAN#<18,54>
SLP_WLAN#_GATE<54,58 >
FOLLOW X10 H Dell GPIO map
M_BIST<62>
RE57 1K_0402_5%@
SYS_PWROK<7,18>
@
RE32 0_ 0402_5%
0.1U_0201_10V6K
CE13
1
2
12
22U_0603_6.3V6M
@
1
CE17
2
1 2
RE536 0_0402_5%DS3@
1 2
RE703 0_0402_5%@
1 2
RE349 43K_0402_1%DS3@
1 2
RE745 0_0402_5%@
@
RE552 0_0402_5%
Change to pop
@
RE506 0_0402_5%
RE569 0_0402_5 %@
RE570 0_0402_5 %@
RE362 100K_0402_5 %
+3.3V_ALW
12
1 2
@
RE548 0_0402_5%
12
1U_0201_10V6M
12
0.1U_0201_10V6K
1
2
12
1 2
1 2
0.1U_0201_10V6K
CE14
1
2
CE18
12
12
12
100K_0402_5%
RE58
CE23
FOLLOW X10 Brook Hollow
WLAN_WIGIG60GHZ_DIS#<52>
CLK_TP_SIO_I2C_DAT<62> DAT_TP_SIO_I2C_CLK<62>
Change GPIO map for RTC_DET#
1 2
YE1
1 2
1U_0201_10V6M
12
MEC_XTAL2_R
JTAG_RST#
100_0402_1%
12
CE30
RE65@
FOLLOW X10 Brook Hollow
+1.8V_ALW_VTR3
12
RE549 100K_0402_ 5%
ENABLE_D S#
12
@
RE550 100K_0402_ 5%
A
12
@
RE290
0_0402_5%
8/28 schematic review
12P_0402_50V8J
1
CE29
2
For EMI request
ESPI_CLK_5105
33_0402_5%
@EMI@
12
RE350
33P_0402_50V8J
@EMI@
12
CE57
1
@SHORT PADS~D
1
JTAG1@
2
2
4 4
32 KHz Clock
MEC_XTAL1 MEC_XTAL2
10P_0402_50V8J
32.768KHZ_9 PF_X1A00014 1000200
12
CE28
+3.3V_ALW_UE1
+1.8V_ALW_VTR3
RUN_ON_EC<59>
BT_RADIO_DIS#<52>
PBAT_PRES#<84,85>
AC_PRESENT<18>
SML1_SMBDATA<18>
SML1_SMBCLK<18> WWAN_W AKE#<52>
SIO_PWRBTN#<7,18>
LID_CL_SIO#<59>
JTAG_TDI< 59>
JTAG_TDO<59>
JTAG_CLK<59>
JTAG_TMS<59>
TACH_FAN1<77> TACH_FAN2<77>
PWM_FAN1<77> PWM_FAN2<77>
PCH_RSMRST#<62 >
BIA_PWM_EC<38>
HW_ACAVIN_NB<82>
PANEL_BKEN_EC<38>
BCM5882_A LERT#<65>
NB_MUTE#<56> EN_INVPWR<38>
IMVP_VR_ON_EC<59>
3.3V_RUN_GFX_ON<22>
VBUS3_ECOK<82>
AC_DISC#<8 2> USH_DET#<65>
GPU_PWR_LEVEL<27>
WWAN_RADIO_DIS#<52>
BC_DAT_ECE1117<62>
BC_CLK_EC E1117<62>
NGFF_CONFIG_3<52>
VBUS2_ECOK<82>
ESPI_RESET#<18,59>
ESPI_ALERT#<18>
ESPI_CLK_5105<18,59>
ESPI_CS#< 18,59>
DGPU_PWR_EN<59>
DCIN2_EN<8 2>
B
+RTC_CELL_VBAT
0.1U_0201_10V6K CE11
1
2
WLAN_ WIGIG60GHZ_DIS#
LCD_TST<38>
PS_ID<82>
BEEP<56>
SLP_W LAN#_GATE_R
AC_DIS< 82>
MSCLK<59>
MSDATA<59>
Remove RTC_DET#
Remove WWAN_GPIO_CTRL
ESPI_IO0<18,59> ESPI_IO1<18,59> ESPI_IO2<18,59> ESPI_IO3<18,59>
Deep Sleep support
non Deep Sleep
Deep Sleep10
B
+3.3V_EC_ PLL
PCH_DPW ROK_EC
RUN_ON_EC
BT_RADIO_DIS#
SIO_SLP_SUS#_R
WW AN_WA KE#
VCCST_PW RGD_EC
JTAG_RST#
LCD_TST
TBT_RESET_N_EC_ R
BEEP
AC_DIS BCM5882_A LERT#
EN_INVPW R RESET_IN# IMVP_VR_ON_ EC
GPU_PW R_LEVEL
RTCRST_ON
WWAN_RADIO_DIS#
BC_DAT_ECE1 117
ENABLE_D S#
SYS_PW ROK
MEC_XTAL1 MEC_XTAL2_R
GPIO223
eSPI
NA NANA
LPC
SHD_IO0
GPIO204
NA
eSPI
RSMRST#
LPC
UE1 MEC5105_W FBGA169_ 11X11
MEC5105 change CPN to SA00009GL30
A2
VBAT
B7
VTR_ANALOG
K2
VREF_ADC
F1
VTR_PLL
H1
VTR_REG
G8
VTR1
M9
VTR2
N5
VTR3
F8
GPIO020
E8
GPIO045
M12
GPIO120
C2
GPIO166
F9
GPIO175
N4
GPIO230
M8
GPIO231
K8
GPIO233
E11
GPIO007/SMB03_DATA/PS2_CLK0B
D8
GPIO010/SMB03_CLK/PS2_DAT0B
M13
GPIO110/PS2_CLK2
K12
GPIO111/PS2_DAT2
L13
GPIO112/PS2_CLK1A
K11
GPIO113/PS2_DAT1A
K10
GPIO114/PS2_CLK0A/nEC_SCI
N11
GPIO115/PS2_DAT0A
E10
GPIO154/SMB02_DATA/PS2_CLK1B
C12
GPIO155/SMB02_CLK/PS2_DAT1B
E9
GPIO145/SMB09_DATA/JTAG_TDI
F6
GPIO146/SMB09_CLK/JTAG_TDO
C8
GPIO147/SMB08_DATA/JTAG_CLK
C5
GPIO150/SMB08_CLK/JTAG_TMS
G13
JTAG_RST#
E3
GPIO050/FAN_TACH0/GTACH0
D1
GPIO051/FAN_TACH1/GTACH1
M2
GPIO052/FAN_TACH2/LRESET#
L10
GPIO053/PWM0/GPWM0
L11
GPIO054/PWM1/GPWM1
M5
GPIO055/PWM2/SHD_CS#/(RSMRST#)
J8
GPIO056/PWM3/SHD_CLK
N1
GPIO001/PWM4
L8
GPIO002/PWM5
N6
GPIO014/PWM6/GPTP-IN6
J9
GPIO015/PWM7
H11
GPIO035/PWM8/CTOUT1
D9
GPIO133/PWM9
H12
GPIO134/PWM10/UART1_RTS#
G10
GPIO135/UART1_CTS#
H10
GPIO170/TFDP_CLK/UART1_TX
G9
GPIO171/TFDP_DATA/UART1_RX
A4
GPIO022/GPTP-IN0
B2
GPIO023/GPTP-IN1
C1
GPIO024/GPTP-IN2
N7
GPIO031/GPTP-OUT1
K9
GPIO032/GPTP-OUT0
N8
GPI0040/GPTP-OUT2
F13
GPIO121/PVT_IO0
E13
GPIO124/GPTP-OUT6/PVT_CS#
C13
GPIO125/GPTP-OUT5/PVT_CLK
E12
GPIO126/PVT_IO3
F11
GPIO122/BCM0_DAT/PVT_IO1
F12
GPIO123/BCM0_CLK/PVT_IO2
D12
GPIO046/BCM1_DAT
D13
GPIO047/BCM1_CLK
F4
GPIO041/SYS_SHDN#
B1
SYSPWR_PRES
K7
GPIO011/nSMI
N3
GPIO021/LPCPD#
K6
GPIO061/LPCPD#/ESPI_RESET#
H7
GPIO063/SER_IRQ/ESPI_ALERT#
K1
GPIO064/LRESET#
G7
GPIO065/PCI_CLK/ESPI_CLK
H6
GPIO066/LFRAME#/ESPI_CS#
K5
GPIO070/LAD0/ESPI_IO0
L4
GPIO071/LAD1/ESPI_IO1
G6
GPIO072/LAD2/ESPI_IO2
L5
GPIO073/LAD3/ESPI_IO3
L2
GPIO067/CLKRUN#
M1
GPIO100/nEC_SCI
G4
GPIO106/PWROK
L12
GPIO107/nSMI
A1
XTAL1
A3
XTAL2
GPIO224
SHD_IO1
GPIO011
NA N A
SIO_EXT_SMI#
A6
RUN_ON#<22>
RUN_ON<11,22,59,67,70,89>
GPIO227
GPIO016
*PRIM_PW RGD NA
SHD_IO2
SHD_IO3
* For Version B IC
GPIO100
SIO_EXT_SCI#
GPIO141/SMB05_DATA/SPI1_CLK/UART0_DCD# GPIO142/SMB05_CLK/SPI1_MOSI/UART0_DSR#
GPIO143/SMB04_DATA/SPI1_MISO/UART0_DTR#
GPIO144/SMB04_CLK/SPI1_CS#/UART0_RI#
VSS1
VSS2
A13
VSS_ADCH4VR_CAPJ1VSS_PLL
VSS3
E6
+3.3V_ALW
RE68
2
C
GPIO056
GPIO055 PCH_RSMRS T#
SHD_CLK
SHD_CS#
GPIO021
GPIO067
SIO_RCIN#
NA
LPCPD#
CLKRUN#
GPIO034/RC_ID1/SPI0_CLK
GPIO036/RC_ID2/SPI0_MISO GPIO003/SMB00_DATA/SPI0_CS# GPIO004/SMB00_CLK/SPI0_MOSI
GPIO057/VCC_PWRGD
GPIO060/KBRST/48MHZ_OUT
GPIO104/UART0_TX GPIO105/UART0_RX
GPIO127/A20M/UART0_CTS#
GPIO225/UART0_RTS#
GPIO025/TIN0/nEM_INT/UART_CLK
GPIO017/GPTP-IN5
GPIO152/GPTP-OUT3
GPIO005/SMB01_DATA/GPTP-OUT4
GPIO006/SMB01_CLK/GPTP-OUT7
GPIO012/SMB07_DATA/TOUT3
GPIO013/SMB07_CLK/TOUT2
GPIO130/SMB10_DATA/TOUT1
GPIO131/SMB10_CLK/TOUT0
GPIO132/SMB06_DATA
GPIO140/SMB06_CLK/ICT5
GPIO222/SER_IRQ
GPIO224/GPTP-IN4/SHD_IO1
GPIO016/GPTP-IN7/SHD_IO3/ICT3
GPIO164/VCI_OVRD_IN
GPIO165/32KHZ_IN/CTOUT0
GPIO221/GPTP-IN3/32KHZ_OUT
GPIO044/VREF_VTT
GPIO042/PECI_DAT/SB-TSI_DAT
GPIO043/SB-TSI_CLK
GPIO103/THERMTRIP2#
GPIO160/PWM11/PROCHOT#
VSS_ANALOG
C4
G1
+VSS_PLL
+VR_CAP
12
CE31 1U_0201_10V6M
+3.3V_RUN
RE67
100K_0402_5%
1 2
RUNPWROK
1 2
RUN_ON#
5
4 3
L2N7002DW 1T1G_SC88-6 QE2A
1 6
C
GPIO033/RC_ID0
GPIO026/TIN1 GPIO027/TIN2 GPIO030/TIN3
GPIO151/ICT4
GPIO156/LED0 GPIO157/LED1 GPIO153/LED2 GPIO226/LED3
GPIO200/ADC00 GPIO201/ADC01 GPIO202/ADC02 GPIO203/ADC03 GPIO204/ADC04 GPIO205/ADC05 GPIO206/ADC06 GPIO207/ADC07 GPIO210/ADC08 GPIO211/ADC09 GPIO212/ADC10 GPIO213/ADC11 GPIO214/ADC12 GPIO215/ADC13 GPIO216/ADC14 GPIO217/ADC15
GPIO223/SHD_IO0
GPIO227/SHD_IO2
BGPO0
VCI_OUT GPIO163/VCI_IN0# GPIO162/VCI_IN1# GPIO161/VCI_IN2# GPIO000/VCI_IN3#
DN1_DP1A DP1_DN1A DN2_DP2A DP2_DN2A DN3_DP3A DP3_DN3A DN4_DP4A DP4_DN4A
VSET
THERMTRIP1#
10K_0402_5%
L2N7002DW 1T1G_SC88-6 QE2B
D
F2 J10 J13 E7 D7
G3 H5 G11 G12 B13 F10
N13 N12 M11 H9
L9 M10 N9
C11 D10 D11 E1
E5 B3 M7 M4 M3 N2 N10 A12 B6 F7 B4 C3
J4 J5 J6 G2 H2 J2 J3 K3 D3 D2 E2 G5 F5 K4 L1 L3
H8 J7 L6 L7 M6
D6 C7 A5 D5 B5 D4 E4
C6
F3
J11 K13 J12 A8 A7 A10 A9 B9 B8 A11 B10 C10
VIN
C9 B11
VCP
H3 B12 H13
RUNPW ROK GPS_DISABLE #
RTCRST_ON_POW ER CCG5_I2C_INT1#
PCIE_WA KE#_R PTP_DISABLE#
RE746 0_0201_5%@ RE743 0_0201_5%@
PBAT_CHARGE R_SMBDAT PBAT_CHARGE R_SMBCLK
LED_MASK #
GPU_SMDAT GPU_SMCLK
CCG5_SMBDA T CCG5_SMBCL K
I_BATT_R I_SYS_R
USB_POW ERSHARE_ VBUS_EN USB_POW ERSHARE_ EN#
LOM_CABLE _DETECT#
CV2_ON_R
SSD_SCP#
1 2
BGPO0
@
RE749 0_0402_5%
VCI_IN1# VCI_IN2# VCI_IN3#
32KHZ_OUT
+PECI_VREF
PECI_EC_R
m3042_PC IE#_SATA
REM_DIODE1_N REM_DIODE1_P REM_DIODE2_N REM_DIODE2_P REM_DIODE3_N REM_DIODE3_P REM_DIODE4_N REM_DIODE4_P
+VR_CAP
THERMTRIP1#
PROCHOT#_R1
L2N7002W T1G_SC-70-3
TYPEC_ID <59> SYSTEM_ID <59> BOARD_ID <59> BARREL_DISC <82> PSID_DISABLE# <82>
GPS_DISABLE# <52> HOST_DEBUG_TX <59> ME_FWP <18>
CCG5_I2C_INT1# <44>
PCIE_WAKE#_R <59>
1 2 1 2
VGA_IDENTIFY <27,28> NGFF_CONFIG_1 <52> NGFF_CONFIG_0 <52>
BREATH_LED# < 62> BAT1_LED# <62> BAT2_LED# <62> LCD_VCC_TEST_EN <38>
USH_EXPANDER_SMBDAT <59,6 5> USH_EXPANDER_SMBCLK <59,65> VCCDSW_EN <18> DGPU_PWROK <18,27> PBAT_CHARGER_SMBDAT <84,8 5> PBAT_CHARGER_SMBCLK <84,85> NGFF_CONFIG_2 <52>
LED_MASK# <51,62>
GPU_SMDAT <27> GPU_SMCLK <27> CCG5_SMBDAT <44> CCG5_SMBCLK <44>
1 2
RE64 300_0402_5%
1 2
RE312 300_0402_5%
RE539 100_ 0402_5%
CE54 10P _0402_50V8J@
12
@
12
RE3180 _0402_5%
USH_PWR_STATE# <65>
USB_POWERSHARE_VBUS_EN < 44,71> USB_POWERSHARE_EN# <71>
SLOT4_SSD_PWR_EN <54> AUX_EN_WOWL < 54> LOM_CABLE_DETECT# <51> BC_INT#_ECE1117 <62>
SLOT3_SSD_PWR_EN <54>
DGFF_DP_HDMI_HPD <27> DCIN1_EN <82> PCH_PCIE_WAKE# <18,42,59>
LAN_WAKE# <18,51>
1 2
3.3V_TS_EN <38> SSD_SCP# <67,68>
PRIM_PWRGD <89>
VBUS1_ECOK < 82>
ACAV_IN <27,62,85> ALWON <86,87> POWER_SW_IN# <59,62 >
3.3V_WWA N_EN <54>
1 2
1 2
RE60 33_0402_5%
1 2
CE24 22 00P_0402_50V 7K
1 2
CE26 22 00P_0402_50V 7K
1 2
CE270 2200P_0402_5 0V7K
1 2
CE27 22 00P_0402_50V 7K
VSET_5105 <59>
I_ADP <85>
THERMTRIP2# <59>
THERMTRIP1# <27>
1 2
RE288 100_0402_5%
1U_0201_10V6M
10K_0402_5%
12
RE546
CE63
13
D
2
QE17
G
S
12
FOLLOW X10 H Dell GPIO map
I_BATT <85 > I_SYS <85,90>
DCIN3_EN <82>
TOUCHPAD_INTR# < 17,62>
FOLLOW X10 H Dell GPIO map
1
T309 PAD~ D
DE2
2 1
RB751S-40_ SOD523-2
RTCRST_ON_R
1 2
22P_0402_50V8J
CE65
PTP_DISABLE# <62> SIO_SLP_A# <18,19> SIO_SLP_LAN# < 18,54>
CV2_ON <65>
RE59 close to UE2 at least 250mils
+PECI_VREF
0.1U_0201_10V6K
CE25
12
H_PECI <7,14>
@
REM_DIODE1_N
REM_DIODE1_P
REM_DIODE2_N REM_DIODE2_P REM_DIODE3_N REM_DIODE3_P REM_DIODE4_N REM_DIODE4_P
PROCHOT# <7,27,82,85,90>
Material shortage SB00000QP00 change to SB00000T900 1/15
QE15 PJ2301_SO T23-3
1 3
S
D
G
2
RE543
RTCRST_ON_R1
1M_0402_5%
100K_0402_5%
RE541
REM_DIODE1_N <59> REM_DIODE1_P <59> REM_DIODE2_N <59> REM_DIODE2_P <59> REM_DIODE3_N <59> REM_DIODE3_P <59> REM_DIODE4_N <59> REM_DIODE4_P <59>
+RTC_CELL+RTC_CE LL_PCH
@
0.1U_0201_25V6K
12
1 2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
VCCDSW _EN
0.1U_0201_25V6K
@
CE66
12
12
@
RE590_0402 _5%
RTCRST_ON_POW ER
1 2
RE747 0_0402_5%
@
CE64
2017/01/01
2017/01/01
2017/01/01
E
CCG5_SMBDA T
CCG5_SMBCL K
CCG5_I2C_INT1#
LOM_CABLE_DETECT#
PBAT_CHARGE R_SMBDAT
PBAT_CHARGE R_SMBCLK
SIO_SLP_SUS#_R
1 2
RE302 2.2K _0402_5%
1 2
RE303 2.2K _0402_5%
1 2
RE91 100K_ 0402_5%
1 2
@
RE505 100K_0402_5%
1 2
RE37 2.2K_0402_ 5%
1 2
RE43 2.2K_0402_ 5%
1 2
NDS3@
RE561 100K_0402_5%
RP change to single Resistor
GPU_SMCLK GPU_SMDAT
NGFF_CONFIG_1 NGFF_CONFIG_2 NGFF_CONFIG_0 NGFF_CONFIG_3
USB_POW ERSHARE_ VBUS_EN
USB_POW ERSHARE_ EN#
PTP_DISABLE#
AC_DIS
GPS_DISABLE #
WLAN_ WIGIG60GHZ_DIS#
WW AN_WA KE#
LED_MASK #
PCIE_WA KE#_R
3.3V_TS_EN
I_BATT_R
I_SYS_R
+1.0V_VCCST
USB_POW ERSHARE_ VBUS_EN
PCH_RSMRS T#
SYS_PW ROK
I_SYS_R
LCD_TST
EN_INVPWR
VCI_IN1#
VCI_IN2#
VCI_IN3#
12/7
RTCRST_ON
RE93
100K_0201_ 5%
VGA_IDENTIFY
Connect to GND on DSC CARD NC on UMA card.
Discrete
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
EC MEC5106
EC MEC5106
EC MEC5106
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 2
RE730 2.2K_0402_5 %
1 2
RE731 2.2K_0402_5 %
1 2
RE732 100K_0402_5 %
1 2
RE733 100K_0402_5 %
1 2
RE734 100K_0402_5 %
1 2
RE735 100K_0402_5 %
1 2
RE700
1 2
RE701 100K_0402_5%
1 2
RE748 100K_0402_5%
1 2
RE83 100K_ 0402_5%@
1 2
RE12 100K_ 0402_5%
1 2
RE8 100K_04 02_5%
1 2
RE38 10K_0402_ 5%
1 2
RE21 10K_0402_ 5%
1 2
RE35 10K_0402_ 5%
1 2
RE547 100K _0402_5%
1 2
CE3 2 200P_0402_5 0V7K
1 2
CE4 2 200P_0402_5 0V7K
1 2
RE702 1M_ 0402_5%@
1 2
RE342 10K _0402_5%
1 2
RE56 10K_0402_ 5%@
1 2
RE313@ 10K_04 02_5%
1 2
RE20 100K_0402 _5%
1 2
RE55 100K_0402 _5%
1 2
RE507 100K _0402_5%
1 2
RE508 100K _0402_5%
1 2
RE750 100K _0402_5%
RE551
@
1 2
0_0402_5%
RE94
1 2
75_0402_5%
13
D
2
QE12
G
L2N7002W T1G_SC-70-3
12
S
1 2
RE84 100K_0402 _5%
E
VGA_ID0
+3.3V_ALW
100K_0402_ 5%
+3.3V_RUN
+RTC_CELL
+RTC_CELL+RTC_CELL_P CH
PCH_RTCRST# <18,19>
+3.3V_ALW
0
1UMA
58 103
58 103
58 103
1.0
1.0
1.0
A
B
C
D
E
+RTC_CELL
100K_0402_5%
12
RE31
POWER_SW_IN#<58,62>
1 1
1.8V
+1.8V_ALW_VTR3
UE11
FOLLOW X10 Brook Hollow
1
UE1 1.8V(VTR3 WELL)
DGPU_PWR_EN<5 8>
CONN@
JESPI
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
11
9
GND1
9
12
10
GND2
10
JXT_FP241AH-010GAAM
2 2
NC
2
A
3
GND
74AUP1G07GW_TSS OP5
+3.3V_RUN
Remove RE375 and RE560
1
2
3
4
5
6
7
8
9
10
5
VCC
Y
PU at DGFF card
4
ESPI_RESET#
DGPU_PWR_EN_R <27>
ESPI_IO0 <18,58> ESPI_IO1 <18,58> ESPI_IO2 <18,58>
ESPI_IO3 <18,58> ESPI_CS# <18,58>
ESPI_RESET# <18,58>
ESPI_CLK_5105 <18,58>
ESPILPCLPC 80Port Debug
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
LPC_LAD0
ESPI_IO0
LPC_LAD1
ESPI_IO1
LPC_LAD2
ESPI_IO2
LPC_LAD3
ESPI_IO3
LPC_FRAME#
ESPI_CS#
PCH_PLTRST#
NA
GND
GND
LPC_CLOCK
ESPI_CLK
LID_CL_SIO#
LID_CL_SIO#<58>
PCIE_WAKE#_R<58>
Stuff RE275 and no stuff RE274 keep E5 design Stuff RE274 and no stuff RE275 to save two GPIOs on EC(PCH_PCIE_WAKE# should be output with OD)
+3.3V_ALW
12
TYPEC_ID<58>
33K_0402_5%
12
4700P_0402_25V7K
1 2
RE33 1K_0 402_5%
2.2U_0402_6.3V6M
12
CE12
+3.3V_ALW
100K_0402_5%
RE25
12
RE26
0.047U_0201_10V6K
10_0402_5 %
12
CE8
12
@
RE2750_0402_ 5%
RE343 CE62
240K 4700p 130K 4700p
4700p
62K
RE343
4700p
33K
*
8.2K
4700p 4700p
4.3K
CE62
4700p
2K
4700p
1K
TypeC_ID rise time is measured from 5%~68%. BOARD_ID rise time is measured from 5%~68%. PANEL_ID rise time is measured from 5%~68%.
CE10
@
1 2
1U_0201_10V6M
POWER_SW#_MB <19,77>
12
REV
Single Port ACE w/o AR
Single Port ACE w/AR
Dual Port ACE w/o AR
Dual Port ACE w/AR
Dual Port ACE (w/AR +w/o AR)
1 2
LID_CL# <62>
PCIE_WAKE# <27,42,52,67,6 8>
PCH_PCIE_WAKE# <18,42 ,58>
RE2740_0402_ 5% @
IMVP_VR_ON_EC<58>
SIO_SLP_S3#<18,19,42,59>
RF Request
+3.3V_ALW
1
CE61
2
RF@
+3.3V_ALW +3.3V_ALW
Change board ID to 2K for PVT 3/6
BOARD_ID<58> SYSTEM_ID<58>
2K_0402_5%
12
RE79
4700P_0402_25V7K
1
CE40
*
2
68P_0402_50V8J
RE79
240K 4700p 130K 4700p
4700p
62K
4700p33K
8.2K
4700p 4700p
4.3K 4700p
2K
4700p
1K
RUN_ON_EC<58>
CE40
REV
X01(DVT1.0) X01(DVT1.1) X02 X03 X00 A00
SIO_SLP_S3#
1
2
IN1
IN2
1 2
1
2
+3.3V_ALW
5
3
+3.3V_ALW
IN1
IN2
VCC
GND
12
@
RE3040 _0402_5%
@
CE53
1 2
0.1U_0201_2 5V6K
4
OUT
UE3
MC74VHC1G08DFT2G_SC7 0-5
@
RE2800_0402_ 5%
12
@
RE2920 _0402_5%
@
CE52
1 2
5
0.1U_0201_2 5V6K
VCC
4
OUT
GND
UE5
MC74VHC1G08DFT2G_SC7 0-5
3
8.2K_0402_5%
12
RE300
*
4700P_0402_25V7K
1
CE47
2
IMVP_VR_ON
R3754 C1465
8.2K
4.3K 2K
4700p240K 4700p130K 4700p 4700p 4700p 4700p
1
2
3
UE4
5
NC
VCC
A
4
Y
GND
74AUP1G07GW_TSS OP5
IMVP_VR_ON <90>
RUN_ON <11,22,58,67 ,70,89>
REV
*** *** 15" 17" *** ***1K
+3.3V_ALW
VCCST_PWRGD <7>
RP change to single Resistor
10K_0402_5%
10K_0402_5%
10K_0402_5%
12
12
RE739
DP1/DN1
DP1A/DN1A
DP2A/DN2A
DP3/DN3
DP4/DN4
10K_0402_5%
12
12
RE741
RE740
RE742
JTAG_TDI JTAG_TMS JTAG_CLK JTAG_TDO MSCLK MSDATA
HOST_DEBUG_TX
DEBUG_TX
SBIOS_TX<19>
12
@
RE300_ 0402_5%
LocationChannel
CPU OTP CPU VR
M.2 2280
DIMM(TOP)
WWAN
10_0402_1%
12
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9 10
RE71
+EC_DEBUG_VCC
3 3
SIO IT8306
+3.3V_ALW
USH_EXPANDER_SMBCLK<58,65>
USH_EXPANDER_SMBDAT<58,65>
4 4
+3.3V_ALW
10K_0402_5%
12
RE564
1U_0201_10V6M
12
CE343
WRST#
0.1U_0201_25V6K
0.1U_0201_25V6K
1
1
CE340
CE341
2
2
0.1U_0201_25V6K
1
CE342
2
WRST#
A_CHIP_ID0 A_CHIP_ID1
EXPANDER_ALERT#
+3.3V_ALW
10K_0402_5%
12
@
RE565
10K_0402_5%
12
RE567
A
USE DVT1.0 CPN : SA00009YF10 and apply new symbol 1/15
UE12
14
VSTBY1
24
VSTBY2
4
VCORE
12
SCL
13
SDA
19
WRST#
10
CHIP_ID0
23
CHIP_ID1
11
ALERT#
15
VSS
29
EPAD
IT8306FN-CX-R_QFN28 _4X4
10K_0402_5%
12
@
RE566
A_CHIP_ID0 A_CHIP_ID1
10K_0402_5%
12
RE568
1
GPA0
3
GPA1
6
GPA2
2
GPA3
7
GPA4
5
GPA5
8
GPA6
9
GPA7
16
GPE0
17
GPE2
18
GPE3
20
GPE4
21
GPE5
22
GPE6
25
GPC0
28
GPC1
27
GPC2
26
GPC3
RTD3_SELECT
DGPU_ALERT# <27>
GC6_THM_ON <14> TB_STAT# <85> DGFF_VGA_DIS# <27>
DP1_GPU_SEL# <31>
DP2_GPU_SEL# <31>
RTD3_SELECT <42>
SLOT5_SSD_PWR_EN <54>
DGPU_SELECT# <29,38> DID2_GPIO1 <38> DID2_GPIO2 <38>
EXPANDER_ALERT#
B
RE563
1 2
10K_0402_ 5%
+3.3V_ALW
0.1U_0201_25V6K
12
Rest=1.58K , Tp=96 degree
C
JXT_FP241AH-010GAAM
1.58K_0402_1%
12
RE77
CE38
11 12
CONN@
JDEG1
GND1 GND2
VSET_5105 <58>
10
+3.3V_ALW
100K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
12
12
12
12
@
RE75@
RE72
RE74
JTAG_TDI <58> JTAG_TMS <58> JTAG_CLK <58> JTAG_TDO <58>
RE306 0_04 02_5%@
HOST_DEBUG_TX <58> MSDATA <58> MSCLK <58>
Security Cla ssification
Security Cla ssification
Security Cla ssification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS , INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS , INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS , INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS MAY BE USED BY OR DI SCLOSED TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL E LECTRONICS, INC.
MAY BE USED BY OR DI SCLOSED TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL E LECTRONICS, INC.
MAY BE USED BY OR DI SCLOSED TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL E LECTRONICS, INC.
RE73
RE86
10K_0402_ 5%
1 2
1 2
DP1/DN1 for CPU OTP on QE3, place QE3 close to CPU and CE35 close to QE3.
DN1a/DP1a for CPU VR(PU1100) on QE26, place QE26 close to CPU and CE339 close to QE26
100P_0402_50V8J
QE26
@
2
E
31
LMBT3904WT1G_ SC70-3
CE339
B
2
C
1
DN2A/DP2A for M.2 2280 on QE7, place QE7 close to JNGFF3 and CE46 close to QE7
100P_0402_50V8J
QE7
@
1
E
31
LMBT3904WT1G_ SC70-3
CE46
B
2
C
2
+1.0VS_VCCIO
+1.0V_VCCST
REM_DIODE1_P
100P_0402_50V8J
QE3
@
1
LMBT3904WT1G_ SC70-3
C
CE35
2
B
2
E
3 1
REM_DIODE1_N
REM_DIODE2_P
REM_DIODE2_N
QE26,QE3,QE104,QE7,QE6 change from SB000008P00 to SB000013V00
Compal Secret Data
Compal Secret Data
Compal Secret Data
2016/01/01
2016/01/01
2016/01/01
D
Deciphered Date
Deciphered Date
Deciphered Date
CHECK
QE11
@
2
1 3
D
L2N7002WT1G_ SC-70-3
REM_DIODE1_P <58>
REM_DIODE1_N <58>
REM_DIODE2_P <58>
REM_DIODE2_N <58>
2017/01/01
2017/01/01
2017/01/01
SIO_SLP_S3# <18,19,42,59>
G
1 2
RE70 2.2 K_0402_5%
S
12
@
RE900_ 0402_5%
100P_0402_50V8J
@
CE272
100P_0402_50V8J
@
CE39
RE69
1 2
+3.3V_ALW
8.2K_0402_ 5%
H_THERMTRIP#<7,14,23,24,2 5,26>
DP3/DN3 for SODIMM(TOP) on QE104, place QE104 close to SODIMM(TOP) and CE272 close to QE104
1
2
DP4/DN4 for WWAN on QE6, place QE6 close to JNGFF1 and CE39 close to QE6
1
2
QE104 LMBT3904WT1G_ SC70-3
C
2
B
E
3 1
QE6 LMBT3904WT1G_ SC70-3
C
2
B
E
3 1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
EC MEC5106 SUPPORT
EC MEC5106 SUPPORT
EC MEC5106 SUPPORT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
E
12
C
2
B
E
QE4
3 1
LMBT3904WT1G_ SC70-3
Material shortage from SB000002R00 change to SB000013V00 1/15
REM_DIODE3_P
REM_DIODE3_N
REM_DIODE4_P
REM_DIODE4_N
0.1U_0201_25V6K
THERMTRIP2# <58>
CE36
REM_DIODE3_P <58>
REM_DIODE3_N <58>
REM_DIODE4_P <58>
REM_DIODE4_N <58>
59 103
59 103
59 103
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Secure & Reset IC
Secure & Reset IC
Secure & Reset IC
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
60 103
60 103
60 103
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
LEDs(Controller)
LEDs(Controller)
LEDs(Controller)
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
61 103
61 103
61 103
1.0
1.0
1.0
A
B
C
D
Touch Pad
+3.3V_RUN +3.3V_TP
JUMP@
PJP35
1 2
1 1
PAD-OPEN1x1m
+3.3V_TP
4.7K_0402_5%
4.7K_0402_5%
12
12
RZ18
RZ19
PS2
DAT_TP_SIO_I2C_CLK<58>
CLK_TP_SIO_I2C_DAT<58>
10P_0402_50V8J
10P_0402_50V8J
12
12
CZ81
CZ80
@
@
12
RZ22 0_0 402_5%@
12
RZ23 0_0 402_5%@
1 2
RZ346 0 _0402_5%
1 2
RZ347 0 _0402_5%
DAT_TP_SIO_R
CLK_TP_SIO_R
I2C1_SDA_TP_R
I2C1_SCK_TP_R
I2C From EC
I2C1_SDA_TP_R
I2C1_SCK_TP_R
+3.3V_TP
10K_0402_5%
10K_0402_5%
12
12
@
@
RZ116
RZ117
+3.3V_TP
2.2K_0402_5%
2.2K_0402_5%
12
12
RZ21
RZ20
2 2
I2C1_SDA_TP<19>
I2C1_SCK_TP<19>
1 2
@
RZ26 0_0 402_5%
1 2
@
RZ29 0_0 402_5%
I2C From PCH
Plan is for I2C to be driven by the EC for Win7 and Pre-OS (will u tilize Intel I2C drivers for Win7) For Win8.1 and 10 the EC wil l control TP over I2C Pre-OS and then the PCH will drive I2C when in Windows Route PS2 from EC to the touch pad also for c ontingency plan if I2C has issues
1
2
Link CIS
+3.3V_ALW
IN1
IN2
CZ82
@
1 2
0.1U_0201_1 0V6K
5
VCC
4
OUT
GND
UZ6
MC74VHC1G0 8DFT2G_SC70-5
3
PCH_RSMRST#_AND < 7,18>
Update symbol 11/29
RSMRST circuit
PCH_RSMRST#<58,62>
ALW_PW RGD_3V_5V<18,43,86>
3 3
Keyboard
JKBTP1
KB_DET#<18>
+5V_RUN
+3.3V_ALW
BC_INT#_ECE1117<58>
FOLLOW X10 H Dell GPIO map
PTP_DISABLE#<58>
+3.3V_TP
4 4
12
BC_DAT_ECE1117<58>
BC_CLK_ECE1117<58>
TOUCHPAD_INTR#<17,58>
+5V_RUN+3.3V_ALW+3.3V_TP
0.1U_0201_25V6K
CZ90@
0.1U_0201_25V6K
0.1U_0201_25V6K
12
12
CZ91@
RZ1484 0_0402_5 %@
DAT_TP_SIO_R CLK_TP_SIO_R
I2C1_SDA_TP_R I2C1_SCK_TP_R
CZ92@
12
Place close to JKBTP1
A
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
GND_1
22
GND_2
HRS_TF31-20S-0P 5SH-800
CONN@
B
M BIST
ACAV_IN<27,58,85>
RB751S40T1G_ SOD523-2
M_BIST< 58>
@
RZ1415 0_04 02_5%
+3.3V_ALW
PCH_RSMRST#<58,62>
RZ1482 1M_040 2_5%
RZ1413 330K_0 402_5%@
CZ218 2.2U _0201_6.3V6M
FOLLOW X10 H Dell GPIO map
BAT2_LED#<58>
BAT1_LED#<58>
Breath LED
QZ7
L2N7002W T1G_SC-70-3
D
S
BREATH_LED#_Q
BREATH_LED#<58>
13
change SB00000UO00 to SB000009Q80/
G
SB00000ST00 as main source,
2
SB00000UO00 as 3rd source
MASK_BASE_LEDS#
To LED/B Conn
+5V_ALW
0.1U_0201_10V6K
1
CZ527
2
LID_CL#<59,62>
+3.3V_ALW
Mask All LEDs (Sniffer Functi on) Mask Base MB LEDs (Lid Closed) Do not Mask LEDs (Lid Opened) 11
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DZ12
@
21
M_BIST_R
12
1 2
1 2
12
POWER_SW_IN#<58,59>
Battery LED
1 2
RZ361 470_0402_5%
1 2
RZ28 200_0402_5 %
BREATH_LED#_R
1 2
RZ32 470_0402_5 %
Update symbol 11/29
JLED1
1
BATT_YELLOW #
BATT_WHITE#
LED Circuit Control Table
C
1
2
2
3
3
4
4
5
5
6
6
GND1
GND2
HRS_TF31-6S-0P 5SH
CONN@
LED_MASK# LID_CL#
0 1 0
2016/01/01
2016/01/01
2016/01/01
BAT1_LED#_R
C
2
QZ22
B
LMBT3904W T1G_SC70-3
E
3 1
BATT_WHITE#
BATT_YELLOW#
BREATH_LED#_R <77>
7
8
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
BATT_YELLOW#
R1=10K;R2= 10K
R2
R1
1 3
QZ3 LMUN5111T1G_S C70-3
1 2
RZ25 150_0402 _5%
LED_MASK#<51,58>
LID_CL#<59,62>
+3.3V_ALW
5
1
IN1
VCC
OUT
2
IN2
GND
3
MC74VHC1G0 8DFT2G_SC70-5
CZ93
@
1 2
0.1U_0201_1 0V6K
MASK_BA SE_LEDS#
4
UZ10
2
X
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2017/01/01
2017/01/01
2017/01/01
Title
KB / TP / LED / LID
KB / TP / LED / LID
KB / TP / LED / LID
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
D
62 103
62 103
62 103
1.0
1.0
1.0
A
1 1
2 2
B
C
D
Reserve
3 3
4 4
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
2016/01/ 01
2016/01/ 01
2016/01/ 01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
2017/01/ 01
2017/01/ 01
2017/01/ 01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KB / TP / LED / LID
KB / TP / LED / LID
KB / TP / LED / LID
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
D
63 103
63 103
63 103
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KB / TP / LED / LID
KB / TP / LED / LID
KB / TP / LED / LID
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
64 103
64 103
64 103
1.0
1.0
1.0
5
4
3
2
1
+3.3V_ALW
@
1 2
+3.3V_ALW_PCH
D D
RZ369 0_0402_5%
1 2
@
RZ368 0_0402_5%
1 2
RZ69 10K_0402_5%
+3.3V_ALW +3.3V_M _TPM
place CZ51,CZ52 as close as UZ12.1
68P_0402_50V8J
12P_0402_50V8J
RF@
RF@
1
1
CZ58
CZ57
2
2
C C
B B
RF Request RF Request
+3.3V_RUN
SIO_SLP_S0#<14,18,19>
PCH_SPI_D1_R1<17>
PCH_SPI_D0_R1<17>
PCH_SPI_CLK_R1<17>
PCH_SPI_CS#2<17>
12
@
+3.3V_M_TPM
+3.3V_M_TPM
TPM_PIRQ#
12P_0402_50V8J
68P_0402_50V8J
RF@
RF@
1
1
CZ59
CZ60
2
2
RZ362
10K_0402_5%
1 2
@
RZ112 0_0402_5%
1 2
@
RZ363 0_0402_5%
1 2
RZ58 33_0402_5%
1 2
RZ59 33_0402_5%
RZ60 33_0402_5%EMI@
@
RZ61 0_0402_5%
1 2 1 2
T284
TPM_PIRQ#<19>
PLTRST_TPM#<17>
@
PAD~D
+3.3V_M_TPM
PCH_SPI_CLK_2_R
33_0402_5%
1 2
12
PCH_SPI_D1_2_R PCH_SPI_D0_2_R
PCH_SPI_CLK_2_R PCH_SPI_CS#2_R
1
10K_0402_5%
12
RZ62
@
+3.3V_RUN
@EMI@
RZ63
0.1U_0201_25V6K
@EMI@
CZ56
TPM_GPIO0
TPM_LPM#
TPM_GPIO4
1 2
RZ367 0_0402_5%@
1 2
@
RZ89 0_0402_5%
Change part number and need apply symbol 1/15
UZ12
29
GPIO0/SDA
30
GPIO1/SCL
3
GPIO2/GPX
6
GPIO3/BADD
24
LAD0/MISO
21
LAD1/MOSI
18
LAD2/SPI_IRQ#
15
LAD3
19
LCLK/SCLK
20
LFRAME#/SCS#
17
LRESET#/SPI_RST#/SRESET#
27
SERIRQ
13
CLKRUN#/GPIO4/SINT#
28
LPCPD#
4
PP
5
TEST
NPCT750JABYX_QFN32_5X5
VSB
VDD1 VHIO1 VHIO2
NC1 NC2 NC3 NC4 NC5 NC6 NC7
GND1
GND2
GND3
GND4 PGND
Reserved
+UZ12_TPM
CZ75
1
2
10U_0402_6.3V6M
+3.3V_ALW
1
8 14 22
2 7 10 11 25 26 31
9 16 23 32 33 12
0.1U_0201_25V6K
1
CZ50
2
1 2
JUMP@
PJP391 PAD-OPEN1x1m
+3.3V_ALW_UZ12
0.1U_0201_10V6K
1
CZ51
2
+UZ12_TPM +UZ12_VHIO
0.1U_0201_10V6K
1
CZ54
2
CZ53,CZ55 as close as UZ12.14 CZ54 as close as UZ12.22
follow naming rule
+19.5VB
CV2_ON<58>
JUSH1 FOLLOW X10 USH schmatic
1 2
RZ114 0_0402_5%@
DZ8
CONTACTLESS_DET#<14>
USH_DET#<58>
1
CZ52
2
10U_0402_6.3V6M
1 2
RZ366 0_0402_5%
@
RZ365 0_0402_5%
10U_0603_10V6M
0.1U_0201_10V6K
1
1
CZ53
2
2
@
1 2
CZ55
+3.3V_M_TPM
+3.3V_RUN
2 1
RB751S-40_SOD523-2
USH_RST#_R
0.047U_0201_10V6K
12
1 2
RZ85 0_0402_5%@
1 2
RZ364
1 2
RZ1483 0_0402_5%@
JUSH1 FOLLOW X10 USH schmatic
USH_EXPANDER_SMBC LK<58,59> USH_EXPANDER_SMBD AT<58,59>
BCM5882_ALERT#<58>
USH_PWR_STATE#<58>
CONTACTLESS_DET#_R
Remove DZ7, RZ87
CZ61
For ESD solution
RF Request
need check EA before POP
USH_EXPANDER_SM BCLK
USH_EXPANDER_SM BDAT
1 2
CZ62 68P_0402_50V8J@RF@
1 2
CZ63 68P_0402_50V8J@RF@
USH CONN
+PWR_SRC_R
100_0402_5%@
USB20_N10<15> USB20_P10<15 >
POA_WAKE#_R EC_FPM_EN
+3.3V_ALW
+5V_ALW +3.3V_RUN
+5V_RUN
USH_RST#_R
USH_DET#
JUSH1 FOLLOW X10 USH schmatic
+3.3V_ALW
0.1U_0201_10V6K
1
@
CZ64
2
+5V_ALW +5V_RUN +3.3V_RUN +3.3V_ALW
RF Request
68P_0402_50V8J
RF@
1
CZ69
2
JUSH1
28
GND2
27
GND1
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
CONN@
HRS_TF31C-26S-0P5SH-800
Update symbol Ver. 0725
1 2
RZ8 4.7K_0402_5%
1 2
RZ9 4.7K_0402_5%
1 2
RZ10 100K_0402_5%
Close to JUSH1
USH_EXPANDER_SMBC LK
USH_EXPANDER_SMBD AT
USH_PWR_STATE#
+3.3V_RUN +3.3V_ALW+5V_RUN+5V_ALW
0.1U_0201_10V6K
1
@
CZ66
2
68P_0402_50V8J
RF@
1
CZ71
2
1
2
1
2
0.1U_0201_10V6K
0.1U_0201_10V6K
1
@
@
CZ68
CZ67
2
68P_0402_50V8J
68P_0402_50V8J
RF@
RF@
1
CZ73
CZ72
2
Pop Comment
NPCT65x RZ89, RZ366, RZ62
NPCT75x RZ89, RZ365
NPCT75x
A A
5
RZ367, RZ366 RZ89, RZ365, RZ62
Depop
RZ365, RZ367
RZ367, RZ366, RZ62
4
VDD - V_RUN Power VHIO - V_SPI Power
Option1 (recommended) VDD and VHIO - V_RUN power
Option2 (for Z1 sample [early sample]) VDD and VHIO - V_SPI power
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.
Compal Secret Data
Compal Secret Data
Compal Secret Data
2016/01/01
2016/01/01
2016/01/01
3
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
TPM/USH
TPM/USH
TPM/USH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
65 103
65 103
65 103
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
HDD/ODD/FFS Conn
HDD/ODD/FFS Conn
HDD/ODD/FFS Conn
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
66 103
66 103
66 103
1.0
1.0
1.0
5
+3.3V_SSD 3
1 2
@
PCIE_PRX_DTX _N9<14>
PCIE_PTX_DRX _N9<14 >
D D
+3.3V_RUN
10K_0402_5%
RN200
1 2
M2_SLOT3_PEDET<14>
PCIE_PTX_DRX _P9< 14>
PCIE_PTX_DRX _N10<14> PCIE_PTX_DRX _P10<1 4>
PCIE_PTX_DRX _N11<14> PCIE_PTX_DRX _P11<1 4>
PCIE_PTX_DRX _N12<14> PCIE_PTX_DRX _P12<1 4>
PCIE_PRX_DTX _P9<1 4>
PCIE_PRX_DTX _N10<14> PCIE_PRX_DTX _P10<14 >
PCIE_PRX_DTX _N11<14> PCIE_PRX_DTX _P11<14 >
PCIE_PRX_DTX _P12<14 > PCIE_PRX_DTX _N12<14>
PEDET Module Type
0
C C
SATA
PCIE1
4
10K_0402_5%
RN37
SLOT3_DEVSL P
PCIE_PRX_DTX _N9 PCIE_PRX_DTX _P9
PCIE_PTX_C_DR X_N9
1 2
CN650 .22U_0201_6.3 V6K
PCIE_PTX_C_DR X_P9
1 2
CN660 .22U_0201_6.3 V6K
PCIE_PRX_DTX _N10 PCIE_PRX_DTX _P10
PCIE_PTX_C_DR X_N10
1 2
CN670 .22U_0201_6.3 V6K
PCIE_PTX_C_DR X_P10
1 2
CN680 .22U_0201_6.3 V6K
PCIE_PRX_DTX _N11 PCIE_PRX_DTX _P11
PCIE_PTX_C_DR X_N11
1 2
CN690 .22U_0201_6.3 V6K
PCIE_PTX_C_DR X_P11
1 2
CN700 .22U_0201_6.3 V6K
PCIE_PRX_DTX _P12 PCIE_PRX_DTX _N12
PCIE_PTX_C_DR X_N12
1 2
CN710 .22U_0201_6.3 V6K
PCIE_PTX_C_DR X_P12
1 2
CN720 .22U_0201_6.3 V6K
CLK_PCIE_N7<16> CLK_PCIE_P7<16>
NGFF slot_3 Key M
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57
59
63 65 67 70 71
SSD
JNGFF3
1
GND3
3
GND4
5
PERn3
7
PERp3
9
GND5 PETn3 PETp3 GND6 PERn2 PERp2 GND7 PETn2 PETp2 GND8 PERn1 PERp1 GND9 PETn1 PETp1 GND10 PERn0/SATA-B+ PERp0/SATA-B­GND11 PETn0/SATA-A­PETp0/SATA-A+ GND12 REFCLKN REFCLKP GND13
NC19 PEDET(NC-PCIE/GND-SATA)613P3VAUX_7 GND14 GND15 GND16 NPTH1 NPTH2
BELLW _SD-80159-422 1
CONN@
SUSCLK(32kHz)
3P3VAUX_1 3P3VAUX_2
DAS/DSS# 3P3VAUX_3 3P3VAUX_4 3P3VAUX_5 3P3VAUX_6
CLKREQ#
3P3VAUX_8 3P3VAUX_9
NC10 NC11
DEVSLP
NC12 NC13 NC14 NC15 NC16
PERST#
PEWake#
NC17 NC18
GND1 GND2
3
+3.3V_SSD3
2 4 6
NC1
8
NC2
10 12 14 16 18 20
NC3
22
NC4
24
NC5
26
NC6
28
NC7
30
NC8
32
NC9
34 36 38 40 42 44 46 48 50 52 54 56 58
60 62 64 66
68 69
Follow X10 H Dell GPIO map 180705_Roger
@
1 2
RN219 0_0402 _5%
1 2
RN217 0_0402 _5%@
SLOT3_DEVSLP <18>
PCH_PLTRST#_R <17,42,52,67,68>
CLKREQ_PCIE#7 <16>
PCIE_WAKE# <27,42,52,59,67,68>
SUSCLK_R3
1 2
@
RN99 0_0402_5 %
SUSCLK
SSD_SCP# <58,67,68>
SATALED# <14,67,68>
SUSCLK <18,52,68>
2
+3.3V_SSD 3
0.01U_0402_16V7K
12
+3.3V_SSD 3
0.01U_0402_16V7K
12
+3.3V_SSD 3
0.01U_0402_16V7K
12
CLOSE TO PIN 62,64,66
@
12
CN175
CLOSE TO PIN 2,4
@
12
CN279
CLOSE TO PIN 12,14,16,18
1
CN282
2
10U_0402_6.3V6M
0.01U_0402_16V7K
0.1U_0201_10V6K
1
1
CN178
CN176
CN177
Remove CN179
2
2
10U_0402_6.3V6M
0.1U_0201_10V6K
0.01U_0402_16V7K
1
1
CN174
CN276
CN277
2
2
0.1U_0201_10V6K
10U_0402_6.3V6M
1
CN280
CN281
2
1
Footprint same with APCI0107-P001A(listed)
+3.3V_SSD 4
10K_0402_5%
RN202
1 2
@
SLOT4_DEVSL P
PCIE_PRX_DTX _N20<14>
PCIE_PTX_DRX _N20<14> PCIE_PTX_DRX _P20<14 >
PCIE_PTX_DRX _N19<14> PCIE_PTX_DRX _P19<14 >
PCIE_PTX_DRX _N18<14>
B B
M2_SLOT4_PEDET<14>
+3.3V_RUN
1 2
10K_0402_5%
RN203
PEDET
0
1
A A
PCIE_PTX_DRX _P18<14 >
PCIE_PTX_DRX _N17<14> PCIE_PTX_DRX _P17<14 >
Module Type
SATA
PCIE
PCIE_PRX_DTX _P20<1 4>
PCIE_PRX_DTX _N19<14> PCIE_PRX_DTX _P19<1 4>
PCIE_PRX_DTX _N18<14> PCIE_PRX_DTX _P18<1 4>
PCIE_PRX_DTX _P17<1 4> PCIE_PRX_DTX _N17<14>
CLK_PCIE_N8<16> CLK_PCIE_P8<16>
PCIE_PRX_DTX _N20 PCIE_PRX_DTX _P20
PCIE_PTX_C_DR X_N20
1 2
CN1800.22U_ 0201_6.3V6K
PCIE_PTX_C_DR X_P20
1 2
CN1810.22U_ 0201_6.3V6K
PCIE_PRX_DTX _N19 PCIE_PRX_DTX _P19
PCIE_PTX_C_DR X_N19
1 2
CN1820.22U_ 0201_6.3V6K
PCIE_PTX_C_DR X_P19
1 2
CN1830.22U_ 0201_6.3V6K
PCIE_PRX_DTX _N18 PCIE_PRX_DTX _P18
PCIE_PTX_C_DR X_N18
1 2
CN1840.22U_ 0201_6.3V6K
PCIE_PTX_C_DR X_P18
1 2
CN1850.22U_ 0201_6.3V6K
PCIE_PRX_DTX _P17 PCIE_PRX_DTX _N17
PCIE_PTX_C_DR X_N17
1 2
CN1860.22U_ 0201_6.3V6K
PCIE_PTX_C_DR X_P17
1 2
CN1870.22U_ 0201_6.3V6K
HDD_IFDET Module Type
0
NGFF slot_4 Key M
Change part number / foorprint
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57
67
71 73 75 78 79
HDD_IFDET
RUN_ON
RUN_ON<11,22,58,59,70,89>
NVME
SSD
JNGFF4
1
GND3
3
GND4
5
PERn3
7
PERp3
9
GND5 PETn3 PETp3 GND6 PERn2 PERp2 GND7 PETn2 PETp2 GND8 PERn1 PERp1 GND9 PETn1 PETp1 GND10 PERn0/SATA-B+ PERp0/SATA-B­GND11 PETn0/SATA-A­PETp0/SATA-A+ GND12 REFCLKN REFCLKP GND13
NC PEDET(NC-PCIE/GND-SATA)693P3VAUX_7 GND14 GND15 GND16 NPTH1 NPTH2
LOTES_APCI0364 -P001A
CONN@
12
RZ541
1M_0201_5%
+3.3V_ALW _R
1
IN1
2
IN2
SUSCLK(32kHz)
5
P
G
3
2
3P3VAUX_1
4
3P3VAUX_2
6
NC1
8
NC2
10
DAS/DSS#
12
3P3VAUX_3
14
3P3VAUX_4
16
3P3VAUX_5
18
3P3VAUX_6
20
NC3
22
NC4
24
NC5
26
NC6
28
NC7
30
NC8
32
NC9
34
NC10
36
NC11
38
DEVSLP
40
NC12
42
NC13
44
NC14
46
NC15
48
NC16
50
PERST#
52
CLKREQ#
54
PEWake#
56
NC17
58
NC18
68 70 72
3P3VAUX_8
74
3P3VAUX_9
76
GND1
77
GND2
CZ540
@
1 2
0.1U_0201_1 0V6K
UZ60 SN74AHC1G0 8DCKR_SC70-5
4
O
+3.3V_SSD4
Follow X10 H Dell GPIO map 180705_Roger
@
1 2
RN220 0_0402_5%
1 2
RN218 0_0402_5%@
HDD_DET#
SLOT4_DEVSLP <18>
SUSCLK_R4
1 2
@
RN205 0_0402 _5%
SATALED# <14,67,68>
FFS_INT2_Q < 54>
HDD_DET# <14 >
PCH_PLTRST#_R <17,42,52,67,68> CLKREQ_PCIE#8 <16> PCIE_WAKE# <27,42,52,59,67,68>
SUSCLK
+5V_HDD source
+5V_ALW_R
SSD_SCP# <58,67,68>
+5V_HDD
UZ23
1
VOUT1
VIN1
2
VOUT2
VIN2
3
CT
ON
4
VBIAS
GND1 GND2
AOZ1336DI_DFN8 _2X2
7 8
6
5 9
+5V_HDD_U Z23
HDD1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
+3.3V_SSD 4
CLOSE TO PIN 62,64,66
0.01U_0402_16V7K
@
12
CN190
+3.3V_SSD 4
CLOSE TO PIN 2,4
0.01U_0402_16V7K
@
12
CN286
+3.3V_SSD 4
CLOSE TO PIN 12,14,16,18
0.01U_0402_16V7K
12
CN288
JUMP@
PJP32
1 2
PAD-OPEN1x1m
1 2
CZ129 0. 1U_0201_10V6 K
1 2
CZ130 47 0P_0402_50V 7K
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
0.1U_0201_10V6K
0.01U_0402_16V7K
10U_0402_6.3V6M
330U_D2E_6.3VM_R25M
@
1
CN192
CN283
CN289
2.0A
1
2
1
2
+5V_HDD
10U_0402_6.3V6M
+
CN188
2
CN189
2017/01/01
2017/01/01
2017/01/01
CN193
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
SSD SLOT3 / 4
SSD SLOT3 / 4
SSD SLOT3 / 4
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
67 103
67 103
67 103
1.0
1.0
1.0
1
12
CN191
2
0.01U_0402_16V7K
0.1U_0201_10V6K
1
12
CN285
2
10U_0402_6.3V6M
0.1U_0201_10V6K
1
1
CN287
2
2
5
4
3
2
1
SSD
NGFF slot_5 Key M
D D
JNGFF5
1
GND3
3
PCIE_PRX_ DTX_N24<15 >
PCIE_PTX_ DRX_N24<15 > PCIE_PTX_ DRX_P24<15>
PCIE_PTX_ DRX_N23<15 > PCIE_PTX_ DRX_P23<15>
PCIE_PTX_ DRX_N22<15 > PCIE_PTX_ DRX_P22<15>
SLOT5 NO SATA so +,- different from SLOT4
C C
PCIE_PTX_ DRX_N21<15 > PCIE_PTX_ DRX_P21<15>
PCIE_PRX_ DTX_P24<15>
PCIE_PRX_ DTX_N23<15 > PCIE_PRX_ DTX_P23<15>
PCIE_PRX_ DTX_N22<15 > PCIE_PRX_ DTX_P22<15>
PCIE_PRX_ DTX_N21<15 > PCIE_PRX_ DTX_P21<15>
CLK_PCIE_N9<16> CLK_PCIE_P9<16>
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
PCIE_PRX_ DTX_N24 PCIE_PRX_ DTX_P24
PCIE_PTX_ C_DRX_N24
CN1940.22U _0201_6.3V6K
PCIE_PTX_ C_DRX_P24
CN1950.22U _0201_6.3V6K
PCIE_PRX_ DTX_N23 PCIE_PRX_ DTX_P23
PCIE_PTX_ C_DRX_N23
CN1960.22U _0201_6.3V6K
PCIE_PTX_ C_DRX_P23
CN1970.22U _0201_6.3V6K
PCIE_PRX_ DTX_N22 PCIE_PRX_ DTX_P22
PCIE_PTX_ C_DRX_N22
CN1980.22U _0201_6.3V6K
PCIE_PTX_ C_DRX_P22
CN1990.22U _0201_6.3V6K
PCIE_PRX_ DTX_N21 PCIE_PRX_ DTX_P21
PCIE_PTX_ C_DRX_N21
CN2000.22U_02 01_6.3V6K
PCIE_PTX_ C_DRX_P21
CN2010.22U _0201_6.3V6K
GND4
5
PERn3
7
PERp3
9
GND5
11
PETn3
13
PETp3
15
GND6
17
PERn2
19
PERp2
21
GND7
23
PETn2
25
PETp2
27
GND8
29
PERn1
31
PERp1
33
GND9
35
PETn1
37
PETp1
39
GND10
41
PERn0/SATA-B+
43
PERp0/SATA-B-
45
GND11
47
PETn0/SATA-A-
49
PETp0/SATA-A+
51
GND12
53
REFCLKN
55
REFCLKP
57
GND13
3P3VAUX_1 3P3VAUX_2
NC1 NC2
DAS/DSS# 3P3VAUX_3 3P3VAUX_4 3P3VAUX_5 3P3VAUX_6
NC3 NC4 NC5 NC6 NC7 NC8
NC9 NC10 NC11
DEVSLP
NC12 NC13 NC14 NC15 NC16
PERST#
CLKREQ#
PEWake#
NC17 NC18
+3.3V_SSD5
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58
Follow X10 H Dell GPIO map 180705_Roger
@
1 2
RN221 0_0402_5%
1 2
RN216 0_0402_5%@
PCH_PLTRST#_R < 17,42,52,67>
CLKREQ_PCIE#9 <16>
PCIE_WAKE# < 27,42,52,59,67>
SSD_SCP# <58,67>
SATALED# <14,67>
+3.3V_SS D5
CLOSE TO PIN 62,64,66
0.01U_0402_16V7K
@
12
12
CN203
CLOSE TO PIN 2,4
+3.3V_SS D5
0.01U_0402_16V7K
@
12
12
CN298
330U_D2E_6.3VM_R25M
@
0.01U_0402_16V7K
CN204
0.01U_0402_16V7K
CN297
10U_0402_6.3V6M
0.1U_0201_10V6K
1
CN205
2
0.1U_0201_10V6K
1
CN295
2
1
1
2
1
2
CN207
+
CN206
2
10U_0402_6.3V6M
CN202
59
+3.3V_RU N
10K_0402_5%
RN208
1 2
M2_SLOT5_PEDET<14 >
B B
PEDET
0
1
A A
5
Module Type
SATA
PCIE
4
NC19 PEDET(NC-PCIE/GND-SATA)613P3VAUX_7
63
GND14
65
GND15
67
GND16
70
NPTH1
71
NPTH2
BELLW _SD-80159-422 1
CONN@
Footprint same with APCI0107-P001A(listed)
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
SUSCLK(32kHz)
3P3VAUX_8 3P3VAUX_9
60 62 64 66
68
GND1
69
GND2
Compal Secret Data
Compal Secret Data
Compal Secret Data
SUSCLK_ R5
@
Deciphered Date
Deciphered Date
Deciphered Date
1 2
RN207 0_0402_ 5%
SUSCLK
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
SUSCLK <18,52,67>
+3.3V_SS D5
CLOSE TO PIN 12,14,16,18
0.01U_0402_16V7K
12
CN301
10U_0402_6.3V6M
0.1U_0201_10V6K
1
1
2
CN300
CN299
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
SSD SLOT5
SSD SLOT5
SSD SLOT5
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
68 103
68 103
68 103
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
eMMC / UFS
eMMC / UFS
eMMC / UFS
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
69 103
69 103
69 103
1.0
1.0
1.0
5
4
3
2
1
JUMP@
PJP69
MEDIACARD_IRQ#
+1.05V_PRIM
RUN_ON<11,22,58,59,67,89>
Voltage=3.3V
+3.3V_MV+3.3V_RUN
support D3 Hot(if D3 cold , need Add MOS on/of f 3V3AUX)
1 2
VOUT
GND
1 2
CR2030 .22U_0201_6.3V6K CR2050 .22U_0201_6.3V6K
6
5
PCIE_PTX_DRX_P6<15> PCIE_PTX_DRX_N6<15>
EN_SWR
1
2
1 2
RR232 0_04 02_5%@
1U_0201_10V6M
@
CR255
Change CPN from SA00007XR00 to SA00008R600 3/12
MEDIACARD_IRQ# <19>
UR4@
1
VIN1
2
VIN2
7
VIN thermal
3
VBIAS
4
ON
EM5201V_DFN3X3- 8-X
+3.3V_MMI_AUX
+3.3V_MV
+1.05V_VDD
PLTRST_MMI#<1 7>
PCIE_PTX_C_DRX_P6 PCIE_PTX_C_DRX_N6
CLK_PCIE_P1<1 6> CLK_PCIE_N1<16>
SD_1_CD#
SDWP EN_SWR
CLKREQ_PCIE#1<16 >
SD_1_D1 SD_1_D1_R
@
1 2
RR233 0_0402_5%
SD_1_D0 SD_1_D0_R
@
1 2
RR234 0_0402_5%
+1.05V_VDD
1A
1 2
RR227 0_0603_1%@
CR256
1 2
@
0.1U_0201_25V6K
MISO MOSI SCK
SD_1_CLK_R
UR1
12
HV_LC
18
MV33
39
HV_SWREG_1
40
HV_SWREG_2
45
AUX3V3
3
VDDRX
6
VDDCMU
9
VDDTX
16
SDV10
30
VDD_LN1
31
VDD_LN0
1
PERST#
4
HSIP
5
HSIN
7
REFCLKP
8
REFCLKN
47
SD_CD#
43
SD_WP
41
EN_SWR
2
CLKREQ#
14
MISO
15
MOSI
17
SCK
21
SD_D1/RCLK_N
22
SD_D0/RCLK_P
23
SD_CLK
RTS5243 QFN48
DV33_18
DV10 SDVDD1 SDVDD2
HSOP
HSON REG_OUT_1 REG_OUT_2
GPIO_0 WAKE#
SD_D2 SD_D3
SD_CMD
LN1_P LN1_N
SCS LN0_P LN0_N
RREF HG_SWREG_1 HG_SWREG_2
GND
E-PAD
RTS5243-GR _QFN48_6X6
1 2
CR244
DV33_18
24 46
DV10
19
SDVDD1
20
SDVDD2
PCIE_PRX_C_DTX_P6
10
PCIE_PRX_C_DTX_N6
11
REG_OUT
37 38
42
GPIO0 MEDIACARD_IRQ#
48
SD_1_D2_R SD_1_D2
27
SD_1_D3_R SD_1_D3
26
SD_1_CMD_R
25
SD_1_P1
28
SD_1_N1
29 34
SCS SD_1_P0
33
SD_1_N0
32
44
RREF
RR205 6.2K_0402_1 %
35 36 13 49
1U_0201_10V6M
12
CR204 0.22U_020 1_6.3V6K
12
CR206 0.22U_020 1_6.3V6K
1 2
@
1 2
RR228 0_0402_5%
@
1 2
RR229 0_0402_5%
@
RR230 0_0402_5%
1 2
1 2
1 2
CR246
CR245
1U_0201_10V6M
0.1U_0201_25V6K
PCIE_PRX_DTX_P6 <15> PCIE_PRX_DTX_N6 <15>
SD_1_CMD
HOST_SD_WP#<14>
SD_1_CLK_R SD_1_CLK
2.2UH_HPC2 52012NF-2R2M_1.3 A_20%
GPIO0
SDWP
RR213
1 2
10_0402_5 %
EMI@
LR1
1 2
12
+3.3V_MMI_AUX
RR20110K_040 2_5%
QR1 L2N7002W T1G_SC-70-3
1 3
D
SDWP_Q
S
change SB00000UO00 to SB000009Q80/ SB00000ST00 as main source,
G
2
SB00000UO00 as 3rd source
EMI depop location
12
CR200 5P_0402_50 V8C
@EMI@
+1.05V_VDD
CR214
1 2
1
CR215
2
0.1U_0201_25V6K
10U_0402_6.3V6M
Default short
1 2
+3.3V_MV +3.3V_MMI_AUX
D D
+3.3V_MV
+3.3V_MMI_AUX
C C
PAD-OPEN1x2m
1 2
RR200 0_0603_5%@
1 2
@
RR231 0_040 2_5%
EN_SWR: 1: Internal SWR output enable 0: Internal SWR output disable
1 2
RR211 10K_040 2_5%
+5V_ALW
B B
+3.3V_MV
Close PIN40
1
CR217
2
0.1U_0201_10V6K
1
2
22U_0603_6.3V6M
CR218
Close PIN12
2
1
CR229
1U_0201_6.3V6M
Close PIN18
1
2
1
CR230
0.1U_0201_10V6K
1
CR234
CR235
2
2
10U_0402_6.3V6M
0.1U_0201_10V6K
Close PIN9 Close PIN16
2
1
CR219
CR220
1U_0201_6.3V6M
100P_0402_50V8J
Close PIN3 Close PIN31
2
2
1
CR237
A A
5
+3.3V_MMI_AUX
Close PIN45
1
CR247
2
1 2
0.1U_0201_10V6K
100P_0402_50V8J
CR248
CR249
4.7U_0402_6.3V6M
100P_0402_50V8J
1
CR238
1U_0201_6.3V6M
Close PIN6 Close PIN30
2
2
1
1
CR250
1U_0201_6.3V6M
+1.05V_VDD
Change part number / foorprint
JSD1
2
1
CR221
1
2
0.1U_0201_10V6K
1
CR239
2
CR240
100P_0402_50V8J
0.1U_0201_10V6K
1
CR251
2
CR252
100P_0402_50V8J
0.1U_0201_10V6K
4
1
CR222
CR223
1 2
2
4.7U_0402_6.3V6M
0.1U_0201_10V6K
2
2
1
2
1
1
CR242
1
2
CR241
1U_0201_6.3V6M
CR253
1U_0201_6.3V6M
0.1U_0201_10V6K
2
1
CR254
1
2
0.1U_0201_10V6K
@
@
10K_0402_5%
10K_0402_5%
RR237
RR236
RR239
1 2
1 2
10K_0402_5%
1 2
+3.3V_MMI_AUX
1 2
RR235 0_ 0402_5%@
SPI ROM 512K recommand from sourcer
UR3 W25X40 CLSSIG_SO8@
1
SCS
3
CS#
2
MISO
DO(IO1)
3
WP#
4
GND
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+3.3V_CARD_SPI
VCC
HOLD#
CLK
DI(IO0)
8
7
6
5
2016/01/01
2016/01/01
2016/01/01
+3.3V_CARD_SPI+3.3V_CARD_SPI
@
10K_0402_5%
RR238
SCK
MOSI
Compal Secret Data
Compal Secret Data
Compal Secret Data
@
CR236
1 2
1 2
0.1U_0201_25V6K
close to pin8
Deciphered Date
Deciphered Date
Deciphered Date
2
SDVDD1
CR225
CR224
1 2
1 2
0.1U_0201_25V6K
4.7U_0402_6.3V6M
LN1_P/LN1_N are Differential signal pair
Zdiff of Differential Signal pair shoule be 100ohm
2017/01/01
2017/01/01
2017/01/01
SDVDD2
SD_1_CMD SD_1_CLK
SD_1_CD# SDWP_Q
CR228
CR227
1 2
1 2
0.1U_0201_25V6K
SD_1_D0 SD_1_D1 SD_1_D2
4.7U_0402_6.3V6M
SD_1_D3 SD_1_P0 SD_1_N0 SD_1_P1 SD_1_N1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Card reader
Card reader
Card reader
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
4
VDD/VDD1
14
VDD2
2
CMD
5
CLK
17
CARD DETECT
18
WRITE PROTEC
7
DAT0/RCLK+
8
DAT1/RCLK-
9
DAT2
1
CD/DAT3
11
D0+
12
D0-
16
D1+
15
D1-
3
VSS1
6
VSS2
10
VSS3
13
VSS4
T-SOL_156-1 110302600
CONN@
1
NPTH2 NPTH1
GND1 GND2 GND3 GND4 GND5 GND6 GND7
27 26
19 20 21 22 23 24 25
70 103
70 103
70 103
1.0
1.0
1.0
5
4
3
2
1
VOUT
DP_IN
DM_IN
ILIM_L
ILIM_HI
Thermal Pad
NC
GND
+5V_USB_ PWR1
12
CHR_USB20 _P1
10
CHR_USB20 _N1
11
15 16
RI14
9 14 17
12
22.1K_0402 _1%
LI3
CHR_USB20 _N1
CHR_USB20 _P1 USB2 0_P1_R
EMI@
3 4
MCM1012B9 00F06BP_4P
1 2
RI60 0_0402_5 %@
1 2
RI61 0_0402_5 %@
USB20_N1_ R
12
USB3_PTX_C_ DRX_P1
USB3_PTX_C_ DRX_N1 USB20_P1_ R
USB20_N1_ R USB3_PRX _DTX_P1
USB3_PRX _DTX_N1
For ESD request
DI1
12
USB3_PTX_DR X_N1<18 >
USB3_PTX_DR X_P1< 18>
USB3_PRX _DTX_N1<18> USB3_PRX _DTX_P1<1 8>
D D
CI16 0.1U_0201 _10V6K
12
CI13 0.1U_0201 _10V6K
USB3_PTX_C_ DRX_N1
USB3_PTX_C_ DRX_P1
USB3_PRX _DTX_N1 USB3_PRX _DTX_P1
USB3_PRX _DTX_N1 USB3_PRX _DTX_N1
USB3_PRX _DTX_P1 USB3_P RX_DTX_P1
USB3_PTX_C_ DRX_N1 U SB3_PTX_C_DR X_N1
USB3_PTX_C_ DRX_P1 USB3_PTX_C_ DRX_P1
ESD@
9
1
10
8
2
9
7
7
4
6
6 5
3
8
AZ1045-04F_D FN2510P10E-10 -9
1
2
4
5
3
+5V_USB_ PWR1
10U_0402_6.3V6M
150U_B2_6.3VM_R35M
1
CI32
1
+
2
2
Close to JUSB1
CI14
+5V_ALW_R
RI13
USB_POW ERSHARE_ VBUS_EN< 44,58,71>
USB_POW ERSHARE_ EN#< 58,71>
+5V_ALW _R
UI1
1
VIN
ILIM_SEL1
2
DM_OUT
3
DP_OUT
13
FAULT#
4
ILIM_SEL
5
EN
6
CTL1
7
CTL2
8
CTL3
SLGC55544CV TR_TQFN16_3X3
USB20_N1<15>
USB20_P1<15>
USB_OC1#<15>
12
10K_0402_5 %
+5V_USB_ PWR1
2
3
1
PESD5V0U2BT_SOT23-3
DI2
ESD@
Change part number / foorprint
JUSB1
9
SSTX+
1
VBUS
8
SSTX-
3
D+
7
GND1 D­SSRX+ GND2 SSRX-
GND3 GND4 GND5 GND6
10 11 12 13
2 6 4 5
LOTES_AUSB0 022-P009A
CONN@
JUSB1
VOUT
DP_IN
DM_IN
ILIM_L
ILIM_HI
Thermal Pad
NC
GND
+5V_USB_ PWR2
12
CHR_USB20 _P2
10
CHR_USB20 _N2
11
15 16
RI71
9 14 17
12
22.1K_0402 _1%
LI4
CHR_USB20 _N2
CHR_USB20 _P2 USB2 0_P2_R
EMI@
3 4
MCM1012B9 00F06BP_4P
1 2
RI68 0_0402_5 %@
1 2
RI70 0_0402_5 %@
USB20_N2_ R
12
USB3_PTX_C_ DRX_P3
USB3_PTX_C_ DRX_N3 USB20_P2_ R
USB20_N2_ R USB3_PRX _DTX_P3
USB3_PRX _DTX_N3
For ESD request
DI6
12
USB3_PTX_DR X_P3< 18> USB3_PTX_DR X_N3<18 >
USB3_PRX _DTX_P3< 18> USB3_PRX _DTX_N3<18>
C C
CI63 0.1U_02 01_10V6K
12
CI65 0.1U_02 01_10V6K
USB3_PTX_C_ DRX_P3 USB3_PTX_C_ DRX_N3
USB3_PRX _DTX_P3 USB3_PRX _DTX_N3
USB3_PRX _DTX_N3 USB3_PRX _DTX_N3
USB3_PRX _DTX_P3
USB3_PTX_C_ DRX_N3
USB3_PTX_C_ DRX_P3
ESD@
9
1
10
8
2
9
7
7
4
6
6 5
3
8
AZ1045-04F_D FN2510P10E-10 -9
1
USB3_PRX _DTX_P3
2
USB3_PTX_C_ DRX_N3
4
USB3_PTX_C_ DRX_P3
5
3
+5V_USB_ PWR2
150U_B2_6.3VM_R35M
10U_0402_6.3V6M
1
CI1
1
+
2
2
Close to JUSB2
CI3
+5V_ALW_R
RI67
USB_POW ERSHARE_ VBUS_EN< 44,58,71>
USB_POW ERSHARE_ EN#< 58,71>
+5V_ALW _R
USB20_N2<15>
USB20_P2<15>
USB_OC2#<15>
ILIM_SEL2
12
10K_0402_5 %
UI2
1
VIN
2
DM_OUT
3
DP_OUT
13
FAULT#
4
ILIM_SEL
5
EN
6
CTL1
7
CTL2
8
CTL3
SLGC55544CV TR_TQFN16_3X3
3
1
+5V_USB_ PWR2
PESD5V0U2BT_SOT23-3
2
DI3
ESD@
Change part number / foorprint
JUSB2
9
SSTX+
1
VBUS
8
SSTX-
3
D+
7
GND1 D­SSRX+ GND2 SSRX-
GND3 GND4 GND5 GND6
10 11 12 13
2 6 4 5
LOTES_AUSB0 022-P009A
CONN@
JUSB2
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
USB2/USB3 TYPEA
USB2/USB3 TYPEA
USB2/USB3 TYPEA
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
71 103
71 103
71 103
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
USB2/USB3 TYPEA
USB2/USB3 TYPEA
USB2/USB3 TYPEA
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
72 103
72 103
72 103
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
USB2/USB3 DB
USB2/USB3 DB
USB2/USB3 DB
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
73 103
73 103
73 103
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Dock
Dock
Dock
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
74 103
74 103
74 103
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
USB
USB
USB
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
75 103
75 103
75 103
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
USB
USB
USB
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
76 103
76 103
76 103
1.0
1.0
1.0
5
4
3
2
1
CZ507
CPU FAN
CONN@
ACES_50271-0040N-001
1
1
2
2
3
3
4
4
5
GND1
6
GND2
JFAN1
PWM_FAN2
PWM_FAN1
TACH_FAN2
TACH_FAN1
Power Button CONN
POWER_SW#_M B<19,59,77>
+5V_ALW
BREATH_LED#_R<62>
12
RZ50410K_0402_5%
12
RZ50510K_0402_5%
12
RZ50710K_0402_5%
12
RZ50810K_0402_5%
POWER_SW#_M B
BREATH_LED#_R
+3.3V_RUN
Update symbol 11/29
JPB1
1
1
2
2
3
3
4
4
5
5
6
6
HRS_TF31-6S-0P5SH
CONN@
GND_1
GND_2
7
8
DGFF FAN
CONN@
ACES_50271-0040N-001
1
D D
C C
PWM_FAN2<58> TACH_FAN2<58>
PWM_FAN2 TACH_FAN2
+5V_RUN +5V_RUN
2 1
BZX384-B5V6 SC76-2
10U_0402_6.3V6M
0.1U_0201_25V6K
CZ508
1
1
CZ505
DZ20
2
2
1
2
2
3
3
4
4
5
GND1
6
GND2
JFAN2
PWM_FAN1<58> TACH_FAN1<58>
PWM_FAN1 TACH_FAN1
2 1
BZX384-B5V6 SC76-2
0.1U_0201_25V6K
10U_0402_6.3V6M
CZ506
1
1
DZ21
@
2
2
Power Switch for debug
@
H_3P7
1
@
H_2P5
1
H12
H27
CLIP1
1
P1
YDM_DH792_1P-T
H13
@
H_5P0X2P5N
1
Change to NPTH
H28
@
H_3P3
1
@RF@
H14
@
H_3P3
1
@
H_3P3
1
POWER_SW#_M B<19,59,77>
H15
POWER_SW#_M B<19,59,77>
POWER_SW#_M B
100P_0402_50V8J
@
1
CZ541
2
@
@SHORT PADS~D
Place on Bottom
De-pop for MP 3/20
SW3
@
2
4
SKRBAAE010_4P
De-pop after MP
112
PWRSW1
2
1
3
CLIP2
1
P1
B B
Fiducial Mark
FD1
@
1
FIDUCIAL MARK~D
FD2
@
1
FIDUCIAL MARK~D
FD3
@
1
FIDUCIAL MARK~D
FD4
@
1
FIDUCIAL MARK~D
FD5
@
1
A A
FIDUCIAL MARK~D
FD6
@
1
FIDUCIAL MARK~D
@
H_3P2
H1
@
H_2P5
1
H16
1
@
H_3P2
H3
@
H4
@
H_3P7
H_3P3
1
1
H17
H18
@
H19@
H_2P5
H_3P6X2P1
1
1
1
H5
@
H_3P3
1
H20
@
H_2P5
1
@
H_2P5
1
@
H_3P7
1
H6
H7
@
H8
@
H_2P5
H_2P5
1
1
H22
@
H21
H_3P7
1
H23
@
H_2P5
1
@RF@
YDM_DH792_1P-T
Change from RF@ to @RF@
H9
@
H10
@
H_2P5
H_2P5
1
1
H24
@
H25
@
H_2P1
H_2P5
1
1
H11
@
H_2P5
1
H26
@
H_2P5
1
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LA-H271P 1.0
Custom
LA-H271P 1.0
Custom
LA-H271P 1.0
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
77 103Tuesday, April 09, 2019
77 103Tuesday, April 09, 2019
77 103Tuesday, April 09, 2019
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DC INTERFACE & Sequence
DC INTERFACE & Sequence
DC INTERFACE & Sequence
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
78 103
78 103
78 103
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
XDP/CMC/APS...debug
XDP/CMC/APS...debug
XDP/CMC/APS...debug
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
79 103
79 103
79 103
1.0
1.0
1.0
5
D D
C C
4
3
2
1
Reserve
B B
A A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 01
2016/01/ 01
2016/01/ 01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/ 01
2017/01/ 01
2017/01/ 01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Google Debug & INAs
Google Debug & INAs
Google Debug & INAs
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
LA-H271P
LA-H271P
LA-H271P
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Tuesday, April 09, 2019
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
80 103
80 103
80 103
1.0
1.0
1.0
5
D D
C C
4
3
2
1
B B
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-H271P
LA-H271P
LA-H271P
81
81
81
1
1.0
1.0
1.0
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
5
CONN@
JIO1
LPS_OFF2<82> LPS_OFF3<82>
AC_DISC#<58,82>
LPS_OFF_BATT<85>
PS_ID<58>
BARREL_DISC<58>
HW_ACAVIN_NB<58>
BATDRV_GATE<82,85>
D D
+19.5V_SDC_IN
C C
B B
+20V_TBTA_VBUS
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
NPTH1
FOX_QT510806-312 1-8H
1
2
EMI Part
+20V_TBTB_VBUS
1
2
A A
PWR_SRC_ILIMIT(6) removed PWR_SRC_ON (3) removed PWR_SRC_ON_PC (6) removed +PWR_SRC removed
Add PC34,PC35,PD18,PD19 PR2,PR17 change from 1M to 330K PU2B-->PU4B PQ17A-->PQ17
5
PC7
EMI@
100P_0402_50V8J
PC14
EMI@
100P_0402_50V8J
NPTH2
EMI@
5A_Z80_0805_2P
1 2 EMI@
5A_Z80_0805_2P
1 2
12
PC8
1000P_0402_50V7K
@EMI@
EMI Part
EMI@
5A_Z80_0805_2P
1 2 EMI@
5A_Z80_0805_2P
1 2
12
PC15
1000P_0402_50V7K
@EMI@
2
2 4 6
8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80
PL5
PL6
PL7
PL8
CMPOUT <85>
4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82
AC_DIS <58,82>
DCIN1_EN <58>
PSID_DISABLE# <58>
VBUS_C_CTRL_P1# <44,82> VBUS_C_CTRL_P2# <44,82>
VBUS1_ECOK <58> VBUS2_ECOK <58,82 >
VBUS3_ECOK <58,82 >
PROCHOT# <7,27,58,85,90>
+20V_TBTA_VBUS
+20V_TBTB_VBUS
+19.5V_DC_IN
+19.5V_DC_IN_SS
+3.3V_VDD_PIC
+3.3V_ALW
+5V_ALW
+20V_VBUS_1
12
1
12
PC9
0.1U_0603_25V7K
@EMI@
PC16
0.1U_0603_25V7K
@EMI@
PC10
PR27
2
100K_0402_5%
EMI@
100P_0402_50V8J
12
1
12
PC17
PR45
2
100K_0402_5%
EMI@
100P_0402_50V8J
4
3
2
DC_IN CIRCUIT MOVE TO POWER BOARD
SS5P10-M3-86A_TO277A3
+20V_VBUS_2
AC_DIS<58,82>
PR2163
Add AC_DIS pull down resister 11/30
4
1 2
100K_0402_5%
From PD, Active low
VBUS_C_CTRL_P1#<44,82>
AC_DIS<58,82>
PR36
@
1 2
DCIN2_EN<58 >
0_0402_5%
+3.3V_ALW
From PD, Active low
VBUS_C_CTRL_P2#<44,82>
AC_DIS<58,82>
@
PR54
1 2
DCIN3_EN<58 >
0_0402_5%
Normal floating OVP pull low
PD14 BAT54CW-7-F SOT-323
3
2
L2N7002DW1T1G_SC88-6
12
PR40
100K_0402_5%
Normal floating OVP pull low
PD15 BAT54CW-7-F SOT-323
3
2
L2N7002DW1T1G_SC88-6
12
PR59
100K_0402_5%
+3.3V_ALW
PQ17 AOSP21357L_SO8
S3
1 2
12
PR25
S
PQ19
G
2
100K_0402_5%
D
1 3
12
PR31
LPS_OFF2<82>
1
2
PQ4B
34
5
@
PR41 0_0402_5%
+3.3V_VDD_PIC
1 2
PR43
100K_0402_5%
PR48
100K_0402_5%
LPS_OFF3<82>
1
2
PQ7B
34
5
@
PR60 0_0402_5%
+3.3V_VDD_PIC
1 2
EMB80P03JS_SOT-23-3
100K_0402_5%
61
PQ4A
L2N7002DW1T1G_SC88-6
@
PR35
1 2
0_0402_5%
PR39
1 2
100K_0402_5%
12
S
PQ24
G
2
12
61
PQ7A
L2N7002DW1T1G_SC88-6
PR57
1 2
100K_0402_5%
1 3
D
1 2
3
EMB80P03JS_SOT-23-3
@
PR55
0_0402_5%
PC18
3 6
12
12
PC11
0.022U_0603_50V7K
PC13
12
PR46
0.022U_0603_50V7K
PC20
0.1U_0402_25V6
4
PR28
1M_0402_5%
12
PR33
1M_0402_5%
3
2
1 61
2
PQ6A
12
PR42
1 2
0.1U_0402_25V6 221K_0402_1%~D
S5 S6
1 2 3 6
12
1M_0402_5%
12
PR58
1 2
221K_0402_1%~D
PQ22 AOSP21357L_SO8
4
12
PR51
1M_0402_5%
2
1 61
2
L2N7002DW1T1G_SC88-6
8 7
5
3
PD13 BAT54CW-7-F SOT-323
PQ9A
L2N7002DW1T1G_SC88-6
+20V_VBUS_DC_SS1
8 7
5
BATDRV_GATE <82,85>
PD12 BAT54CW-7-F SOT-323
VBUS2_ECOK<58,82>
+20V_VBUS_DC_SS2
BATDRV_GATE <82,85>
VBUS3_ECOK<58,82>
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
S4
@
PR38
PR75 0_0402_5%
1 2
100K_0402_5%
@
PR53
0_0402_5%
PR76
1 2
100K_0402_5%
PQ18
AOSP21357L_SO8
8 7
5
SS5P10-M3-86A_TO277A3
PQ23
AOSP21357L_SO8
8 7
5
12
1
PD4
2
1
3
1 2 36
4
12
12
PR29
330K_0402_5%
12
PR34
+3.3V_VDD_PIC
10K_0402_5%
PR71
34
12
5
PD6
2
3
4
12
34
5
PQ6B
L2N7002DW1T1G_SC88-6
AC_DISC#<58,82>
1
PR52
10K_0402_5%
PQ9B
L2N7002DW1T1G_SC88-6
AC_DISC#<58,82>
1 2 36
12
PR47
330K_0402_5%
2
12
+3.3V_VDD_PIC
PR72
2
12
S
PQ20
PR26
G
PC12
2
100K_0402_5%
D
1 3
12
1500P_0402_50V7K
EMB80P03JS_SOT-23-3
PR32
100K_0402_5%
12
34
100K_0402_5%
5
61
PC19
1500P_0402_50V7K
12
100K_0402_5%
61
PQ5B
PQ5A
L2N7002DW1T1G_SC88-6
12
S
PR44
PQ25
G
2
100K_0402_5%
D
1 3
12
EMB80P03JS_SOT-23-3
PR50
100K_0402_5%
34
5
PQ8B
PQ8A
L2N7002DW1T1G_SC88-6
+19.5V_SDC_IN
12
PC2103
EMI@
0.1U_0402_25V6
4/3 only 15" add 0.1U for EMI test (near by JIO1)
L2N7002DW1T1G_SC88-6
L2N7002DW1T1G_SC88-6
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
TBTA/TBTB
TBTA/TBTB
TBTA/TBTB
LA-H271P
LA-H271P
LA-H271P
1
1.0
1.0
82 103Tuesday, April 09, 2019
82 103Tuesday, April 09, 2019
82 103Tuesday, April 09, 2019
1.0
5
D D
C C
4
3
2
1
PD COMPARATOR CIRCUIT MOVE TO POWER BOARD
B B
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Reserve
Reserve
Reserve
LA-H271P
LA-H271P
LA-H271P
1
1.0
1.0
83 103Tuesday, April 09, 2019
83 103Tuesday, April 09, 2019
83 103Tuesday, April 09, 2019
1.0
5
4
3
2
1
EMI Part (47.1)
PL9
EMI@
9A Z80 10M 1812_ 2P
+19.5VB
D D
1 2
ESD Diodes
1
12
12
12
+
PC21
@
0.1U_0603_25V7K
PC23
PC22
@
@
2
10U_0805_25V6K
100U_D3L_25VM_R60M
PC30
RF@
82P_0402_50V8J
+19.5VB_DGFF
ESD (47.2)
1
ESD@
PD9 AZ5A25-02R_SOT5 23-3
2
3
EMI Part (47.1)
C C
PC25
EMI@
Primary Battery Connector
Changed Battery
12
Connector (same as Berlinetta)
2200P_0402_50V7K
DEREN_40-4 2251-01001RHF
CONN@
PBATT1
1 2 3 4 5 6 7 8 9
10 GND1 GND2
1 2 3 4 5 6 7 8 9 10 11 12
Z4304 Z4305 Z4306
PR65 10 0_0402_5%
1 2
PR66 10 0_0402_5%
1 2
PR67 10 0_0402_5%
1 2
GND
GND
1
2
3
ESD@
PD10 AZ5A25-02R_SOT5 23-3
EMI Part (47.1)
FBMJ4516HS72 0NT_2P
+13.5VB_BATT_C
PBAT_CHARGER_SM BCLK <58,85> PBAT_CHARGER_SM BDAT <58,85>
FBMJ4516HS72 0NT_2P
PL11
EMI@
1 2
PL12
EMI@
1 2
+13.5VB_BATT
+3.3V_ALW
12
PR62
100K_0402_5%
PBAT_PRES# < 58,85>
+COINCELL
12
PR61
+3.3V_RTC_LDO
BAS40CW_SOT 323-3
1K_0402_5%
2
G
10M_0402_5%
12
Z4012
PR64
2
3
PD8
1
12
PC24
4.7U_0402_ 6.3V6M
downsize from 1 U_0603 to 4.7U _0402
COIN RTC Battery
RTC_DET# < 17>
13
D
S
Move to power schematic
+COINCELL
PQ26
L2N7002W T1G_SC70-3
+RTC_CELL
CONN@
JRTC1
1
1
2
2
3
GND
4
GND
ACES_50271-00 20N-001
+5V_Vbus circuit
5
PR2108 100K_0402_ 1%
+5V_VBUS1
+5V_VBUS2
5
4
12
PR2109 100K_0402_ 1%
Check parts, couldn't read from Merle's screen capture. Package is correct, symbol is wrong.
12
PC2102
0.022U_0402_25V7K
PQ2104 EMB12P03V_EDFN 8-5
1 2 3
+20V_VBUS_2
12
PR2104 300K_0402_ 1%
G
2
12
PR2142 100K_0402_ 1%
PR2106
CCG5_VBUS_5V_ON 2#<4 4>
1 2
0_0402_5%
@
61
2
PQ2106A
L2N7002DW1T1G_SC88-6
Check parts. Package is correct, schematic symbol is wrong.
12
PQ2105
S
PR2105
1M_0402_1%
D
1 3
EMB80P03JS_SOT-23-3
PQ2100
12
PC2100
0.022U_0402_25V7K
EMB12P03V_EDFN 8-5
1 2 3
4
12
+20V_VBUS_1
12
PR2100 300K_0402_ 1%
2
B B
PR2150
CCG5_VBUS_5V_ON 1#<44>
1 2
0_0402_5%
@
12
PR2134 100K_0402_ 1%
61
2
PQ2102A
L2N7002DW1T1G_SC88-6
Check parts. Package is correct, schematic symbol is wrong.
12
PQ2101
S
G
PR2101
1M_0402_1%
D
1 3
EMB80P03JS_SOT-23-3
Check parts. Package is correct, schematic symbol is wrong.
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
BATT/DGFF/RTC/5V_VBUS
BATT/DGFF/RTC/5V_VBUS
BATT/DGFF/RTC/5V_VBUS
LA-H271P
LA-H271P
LA-H271P
1
84 103Tuesday, April 09, 2019
84 103Tuesday, April 09, 2019
84 103Tuesday, April 09, 2019
1.0
1.0
1.0
A
PQ700 SI7149DP-T1-GE3 _POWERPAKSO8-5
+19.5V_SDC_IN
1 1
1 2 35
12
4
PR731
1M_0402_5%
12
PR732
1M_0402_5%
12
PR733
S
G
100K_0402_5%
2
12
PR734
100K_0402_5%
LPS_OFF_BATT_R <43>
Normal floating OVP pull low
LPS_OFF_BATT <82>
D
1 3
EMB80P03JS_SOT-23-3
PQ705
+19.5V_SDC_IN_C R
+20V_VBUS_DC_SS1
+19.5V_DC_IN_SS
BAT54CW-7 -F SOT-323
+13.5VB_BATT
49.9K_0402_ 1%
GNDA_CHG
PROCHOT#<7 ,27,58,82,90>
PBAT_PRES#<58,84>
+20V_VBUS_DC_SS2
+19.5V_SDC_IN
PR709
12
PC709
12
2200P_0402 _25V7K
PR717 0_0 402_5%@
1 2
1 2
@
PR719 0_0 402_5%
PR718 0_0402_ 5%@
PR706
274K_0402_1%
1 2
PC712
PC711
1 2
100P_0402_50V8J
1 2
1 2
PR724 0_0402_5%@
+3.3V_ALW_R
BAT54CW-7 -F SOT-323
12
PR707
4.12K_0603_1%
PR710 0_0402_ 5%@
1 2
100P_0402_50V8J
PROCHOT#_R
8/22 for charge r ACP/ACN leak age current is sue, change LPS cir cuit placement
AC Det (typ 2.4V) Max:16V Typ :15.58V Min :15.16V
2 2
BQ24780_REGN
12
PR712
100K_0402_ 1%
@
PR713
ACAV_IN<27,58,62>
Current limit Charger :7.5A Vilim=1.5V 6 Cell 97WH and 4Cell 64WH,
3 3
Max Boost Charger :7.8A, Vilim=0.39V Discharge max current:8.5A(1C)
1 2
0_0402_5%
121K_0402_ 1%
PR716
12
GNDA_CHG
PBAT_CHARGER_SM BDAT<58,84>
PBAT_CHARGER_SM BCLK<58,84>
GNDA_CHG
I_ADP<58>
I_BATT<58 >
I_SYS<58,90>
2
3
PD701
2
3
10_1206_5 %
1U_0603_2 5V6K
PR711 0_0402_5 %@
12
PR723
@
24.9K_0402_1%
PD700
1
1
PR705
PC707
12
1 2
1 2
PR725
10K_0402_5 %
TB_STAT#<59,85>
B
Iada=0~9.23A(180W)
ADP_I = 40*Iadapter*Rsense
CSSP_1
12
PR703
0_0402_5% @
PC700
1 2
0.1U_0402_ 25V6
12
PU700
28
+DCIN
VCC
3
CMSRC
6
ACDET
11
SDA
12
SCL
5
ACOK
7
IADP
8
CMPIN
GNDA_CHG
GNDA_CHG
IDCHG
9
PMON
10
PROCHOT#
13
CMPIN
14
CMPOUT
15
BATPRES#
16
TB_STAT#
29
PWPD
BQ24780SRUYR _QFN28_4X4
@
1 2
PR714
0_0402_5%
CMPOUT<82>
12
PR700
0.005_1206_ 1%
1
2
PR702
100_0402_ 1%
PC701
0.1U_0402_ 25V6
1 2
CSSP_2
4
2
ACP
ACDRV
PJP701
1 2
PAD-OPEN1x1m
JUMP@
4
3
CSSN_1
12
@
0.01U_0402 _25V6
CSSN_2
1
ACN
REGN
BTST
HIDRV
PHASE
LODRV
GND
ILIM
SRP
SRN
BATDRV
BATSRC
12
1 2
PC702
24
25
26
27
23
22
21
20
19
18
17
PR704 0_0402_5%
2.2_0603_5%
ILIM_CHG
BATDRV
BATSRC
BQ24780_REGN
PR708
1 2
PR720
+19.5VB
12
20K_0402_1%
PR726
2.74K_0402_1%
@
PD702
MM3Z22VST1G_SOD 323-2
1 2
PC706
1 2
0.047U_060 3_25V7M~D
PC708
12
+3.3V_ALW_R
12
PR721
3.92K_0402_1%
61
2
PQ704A
12
L2N7002DW1T1G_SC88-6
SRP_1
SRN_1
C
EMI@
PL700
1UH_6.6A_20% _5X5X3_M
PJP700 no short (-npm)
2.2U_0402_ 10V6K
TB_STAT# <59,8 5>
12
EMI Part (47.1)
@JUMP@
12
PAD-OPEN 43x118 PJP700
UGATE_CHG
LX_CHG
LGATE_CHG
PR727 10_0402_1 %
PR728 10_0402_1 %
+19.5VB_CHARGER
12
PC710
2200P_0402_50V7K
EMI@
EMI Part (47.1)
PQ702
5
4
4
12
12
EMI Part (35.33)
123
AON6380_DFN5X6-8-5
2.2UH_7.8A_20 %_7X7X3_M
PQ703
5
123
AON6314_DFN5X6-8
12
PC703
0.1U_0402_25V6
EMI@
PL701
1 2
12
EMI@
PR722
4.7_1206_5%
SNUB_CHG
12
PC717
EMI@
680P_0402_50V7K
PC718
0.1U_0402_ 25V6
1 2
GNDA_CHG
BATDRV_GATE< 82>
PC704
10U_0805_25V6K
12
PC705
1
2
CSOP_1
0.1U_0402_ 25V6
BATDRV
BATSRC
12
10U_0805_25V6K
PR715
0.01_1206_1 %
PC719
1 2
4.02K_0402_ 1%
10_0402_1 %
+13.5VB_CHG
4
3
CSON_1
0.1U_0402_ 25V6
PR701
1 2
PR735
1 2
PC713
10U_0805_25V6K
PC720
1 2
GNDA_CHG
D
4
12
PC725
0.01U_0402_25V7K
+13.5VB_BATT
12
12
PC715
PC714
10U_0805_25V6K
10U_0805_25V6K
5
AONS32306_DFN 5X6-8-5 PQ701
123
12
PC716
10U_0805_25V6K
12
PR729 0_0402_5%
12
CMPIN
PR730
@
100K_0402_ 1%
+3.3V_ALW_R
4 4
12
2016/7/22 For Temp voltag e test , +DC_IN setting for ACAVIN_NB need less than 17.55V , so change PR73 7 from SD03466 5380 (S RES 1/16W 66 5K +-1% 0402) to SD034634380(S R ES 1/16W 634K +-1% 0402)
CMP_REF=2.3V +DC_IN>17V then ACAV_IN_NB high for 3cell battery 13.05V
Crane and Miramar setting
(CMP_REF=2.3V +DC_IN>17.6V then ACAV_IN_NB high for 4cell battery 17.4V[Miramar setting])
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
A
B
C
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Charger
Charger
Charger
LA-H271P
LA-H271P
LA-H271P
D
85 103Tuesday, April 09, 2019
85 103Tuesday, April 09, 2019
85 103Tuesday, April 09, 2019
1.0
1.0
1.0
A
B
C
D
E
1 1
+19.5VB
PJP100
PAD-OPEN 1x2m~D
21
JUMP@
PC100
@EMI@
+3.3V_ALW
2 2
PGOOD_3V
PGOOD_5V
@
PR102
1 2
1 2
0_0402_5%
PR103
@
0_0402_5%
+19VB_3V
12
12
12
PC111
PC108
2200P_0402_50V7K
0.1U_0402_25V6
PR107 100K_0402_ 5%
1 2
ALW_PWR GD_3V_5V <18,43,62>
@EMI@
PGOOD_3V
10U_0805_25V6K
2
EN112EN2
IN23IN34IN4
FF13OUT14NC1
3V_FB
1
BS
IN1
20
LX2
19
LX1
18
GND3
17
LDO
16
NC2
21
GND4
15
PC112 1000P_0402 _50V7K
1 2
5
12
PC107
10U_0805_25V6K
LX_3V
EN_3V_5V
PU100
6
LX3
7
GND1
8
SY8288BRAC_QFN2 0_3X3
GND2
9
PG
10
NC
11
ENLDO_3V5V
+19.5VB
PJP102
21
PAD-OPEN 1x2m~D
JUMP@
12
PC138
3 3
4 4
RF@
82P_0402_50V8J
@
PR113
ALWON<58,8 7>
1 2
0_0402_5%
+19VB_5V
12
12
PC116
PC114
2200P_0402_50V7K
0.1U_0402_25V6
@EMI@
@EMI@
+3.3V_ALW
12
PR115
1M_0402_1%
EN1 and EN2 don t't floating
PC117
12
@
12
10U_0805_25V6K
PR110
100K_0402_ 5%
1 2
EN_3V_5V
PC129
4.7U_0402_6.3V6M
12
PC118
10U_0805_25V6K
PGOOD_5V
PU101
LX_5V
6
7
8
9
10
SY8288CRAC_QFN2 0_3X3
ENLDO_3V5V
LX3
GND1
GND2
PG
NC
@
PR101
BST_3V
1 2
0_0603_5%
@
PR104
1 2
PR105
@
0_0402_5%
1 2
0_0402_5%
3.3V LDO 150mA~ 300mA
12
PC113
4.7U_0402_ 6.3V6M
PR106
1K_0402_5%
1 2
2
5
IN1
IN23IN34IN4
EN112EN2
FF13OUT14LDO
11
EN_3V_5V
PC110
1 2
0.1U_0603_ 25V7K
LX_3V
+3.3V_ALW2
+3.3V_RTC_LDO
BST_5V
1
BS
20
LX2
19
LX1
18
GND3
VCC
NC1
GND4
15
12
PC119
17
1 2
16
21
+5V_ALW2
5V LDO 150mA~30 0mA
PC127
4.7U_0402_6.3V6M
PC128 1000P_0402 _50V7K
FB_5V
1 2
@EMI@
PR111
@
1 2
0_0603_5%
LX_5V
4.7U_0402_ 6.3V6M
PR114
1K_0402_5%
1 2
PR100
12
@EMI@
4.7_1206_5%
SNUB_3V
12
PC109
680P_0402_50V7K
0.1U_0603_ 25V7K
1.5UH_9A_20% _7X7X3_M
PC115
1 2
PL100
1 2
EMI@
EMI@
ENLDO_3V5V
12
PR112
4.7_1206_5%
SNUB_5V
12
PC126
680P_0402_50V7K
DELL CONFIDENTIAL/PROPRIETARY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
PR109 499K_0402_ 1%
1 2
12
PR108
499K_0402_1%
12
12
12
PC101
22U_0603_6.3V6M
12
PC104
PC103
22U_0603_6.3V6M
22U_0603_6.3V6M
Vout is 3.234V~3.366V
PL101
2.2UH_7.8A_20 %_7X7X3_M
1 2
+19.5VB
+3.3V_ALWP
12
12
PC106
PC102
PC105
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
3V_ALW TDC 3.585A Peak Current 5.122A Current limit :12A TYP MAX Choke DCR 14.0mohm , 15.0mohm
PJP101
2
112
JUMP_43X118
JUMP@
PJP103
2
112
JUMP_43X118
JUMP@
output MLCC size change from 0805 to 0603
12
12
PC120
22U_0603_6.3V6M
12
12
PC122
PC121
22U_0603_6.3V6M
22U_0603_6.3V6M
5V_ALW TDC 6.7A Peak Current 6.7 A Current limit :12A TYP MAX Choke DCR 21.0mohm , 23.0mohm
12
12
PC123
PC124
22U_0603_6.3V6M
22U_0603_6.3V6M
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
+3.3V_ALW+3.3V_ALWP
+5V_ALW+5V_ALWP
+5V_ALWP
PC125
22U_0603_6.3V6M
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
5V_ALW/3V_ALW
5V_ALW/3V_ALW
5V_ALW/3V_ALW
LA-H271P
LA-H271P
LA-H271P
E
1.0
1.0
86 103Tuesday, April 09, 2019
86 103Tuesday, April 09, 2019
86 103Tuesday, April 09, 2019
1.0
A
B
C
D
E
1 1
2 2
3 3
4 4
+19.5VB
PGOOD_3VR
PGOOD_5VR
@
0_0402_5%
+19.5VB
PAD-OPEN 1x2m~D
+3.3V_ALW_R
PR508
@
0_0402_5%
1 2
1 2
PR509
ALWON<58,86>
PJP503
JUMP@
21
12
PC524
PC528
2200P_0402_50V7K
0.1U_0402_25V6
@EMI@
@EMI@
PR515
@
100K_0402_ 5%
1 2
PGOOD_3VR
ALW_PWR GD_3VR_5VR
PJP500
PAD-OPEN 1x2m~D
JUMP@
+19VB_3VR
12
12
21
12
PC532
PC530
10U_0805_25V6K
10U_0805_25V6K
+19VB_5VR
12
12
PC502
PC500
0.1U_0402_25V6
@EMI@
PC503
2200P_0402_50V7K
@EMI@
10U_0805_25V6K
+3.3V_ALW_R
PR505
1 2
0_0402_5%
@
EN1 and EN2 don t't floating
EN_3VR_5VR
12
12
PR507
PC515
1M_0402_1%
@
LX_3VR
EN_3VR_5VR
12
PC504
PR500
@
100K_0402_ 5%
1 2
PGOOD_5VR
4.7U_0402_6.3V6M
5
PU501
6
LX3
7
GND1
8
SY8288BRAC_QFN2 0_3X3
GND2
9
PG
10
NC
11
ENLDO_3VR5VR
12
10U_0805_25V6K
2
1
BS
IN1
IN23IN34IN4
LX2
LX1
GND3
LDO
NC2
GND4
EN112EN2
FF13OUT14NC1
15
PC526 1000P_0402 _50V7K
FB_3VR
1 2
PU500
LX_5VR
6
7
8
9
10
SY8288CRAC_QFN2 0_3X3
ENLDO_3VR5VR
20
19
18
17
16
21
LX3
GND1
GND2
PG
NC
BST_3VR
1 2
3.3V LDO 150mA~ 300mA
12
PC533
4.7U_0402_ 6.3V6M
PR513
1K_0402_5%
1 2
2
5
IN23IN34IN4
EN112EN2
FF13OUT14LDO
11
EN_3VR_5VR
PR514
0_0603_5%
@
LX_3VR
BST_5VR
1
BS
IN1
20
LX2
19
LX1
18
GND3
17
VCC
16
NC1
21
GND4
15
5V LDO 150mA~30 0mA
12
PC513
4.7U_0402_6.3V6M
PC514 1000P_0402 _50V7K
FB_5VR
1 2
PC531
1 2
0.1U_0603_ 25V7K
PR501
1 2
0_0603_5%
@
LX_5VR
PC505
1 2
4.7U_0402_ 6.3V6M
1K_0402_5%
1 2
PR506
PR511
12
EMI@
SUNB_3VR
12
PC527
EMI@
0.1U_0603_ 25V7K
PL501
1.5UH_9A_20% _7X7X3_M
1 2
4.7_1206_5%
680P_0402_50V7K
PC501
1 2
@EMI@
ENLDO_3VR5VR
12
PR502
SNUB_5VR
12
PC512
@EMI@
4.7_1206_5%
680P_0402_50V7K
DELL CONFIDENTIAL/PROPRIETARY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
PR510 499K_0402_ 1%
1 2
12
PR512
499K_0402_1%
12
12
12
12
PC525
PC523
PC522
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
Vout is 3.234V~3.366V
PL500
2.2UH_7.8A_20 %_7X7X3_M
1 2
+19.5VB
+3.3V_ALW_RP
12
12
22U_0603_6.3V6M
PC520
PC529
22U_0603_6.3V6M
22U_0603_6.3V6M
+3.3V_ALW_RP
3V_ALW_R TDC 6.21A Peak Current 8.87A Current limit :12A TYP MAX Choke DCR 14.0mohm , 15.0mohm
PJP502
2
112
JUMP_43X118
JUMP@
PJP501
2
112
JUMP_43X118
JUMP@
PC521
output MLCC size change from 0805 to 0603
12
12
12
PC506
22U_0603_6.3V6M
12
PC508
PC507
22U_0603_6.3V6M
22U_0603_6.3V6M
5V_ALW_R TDC 6.371A Peak Current 7.388 A Current limit :12A TYP MAX Choke DCR 21.0mohm , 23.0mohm
12
12
PC510
PC509
22U_0603_6.3V6M
22U_0603_6.3V6M
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
+3.3V_ALW_R
+5V_ALW_R+5V_ALW_RP
+5V_ALW_RP
PC511
22U_0603_6.3V6M
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
5V_ALW_R/3V_ALW_R
5V_ALW_R/3V_ALW_R
5V_ALW_R/3V_ALW_R
LA-H271P
LA-H271P
LA-H271P
E
1.0
1.0
87 103Tuesday, April 09, 2019
87 103Tuesday, April 09, 2019
87 103Tuesday, April 09, 2019
1.0
5
4
3
2
1
PJP200
+19.5VB
D D
PAD-OPEN 1x2m
JUMP@
21
PC200
(+1.235V)
+1.2V_MEN_P
C C
+1.2V_MEM Ripple voltage ­Static load 3% / Dynamic load 5% TDC 11.088A Peak Current 15.84A OCP current 19.24A TYP MAX H/S Rds(on) 8.2mohm , 10.5mohm L/S Rds(on) 2.8mohm , 3.5mohm Choke DCR 7.4mohm Bulk cap ESR 9mohm Switching Frequency: 533kHz
B B
Mode S3 S5 +1.2V_MEN +V_DDR_REF +0.6V_P S5 L L off off off S3 L H on on off(Hi-Z) S0 H H on on on
A A
(+1.235V)
0.68UH_PCMC 063T-R68MN_15 .5A_20%
1 2
330U_D2_2VM_R9M
1
PC207
+
2
EMI Part (35.33)
+19VB_1.2V
12
12
10U_0805_25V6K
PL201
12
PC202
10U_0805_25V6K
12
EMI@
PR202
4.7_1206_5%
SNUB_1.2V
12
EMI@
PC210
680P_0402_50V7K
EMI Part (35.33)
SIO_SLP_S4#<1 1,18,19,88>
BST_1.2V_R
12
PC203
PC204
PQ200
EMI@
2200P_0402_50V7K
5
123
AON6380_DFN5X6-8-5
5
PQ201
AON6314_DFN5X6- 8
123
EMI@
0.1U_0402_25V6
4
4
100K_0402_ 1%
PR208
200K_0402_ 5%
1 2
PC201
0.22U_0603 _10V7K
1 2
+5V_ALW
+3.3V_ALW
PR205
@
PR200
1 2
2.2_0603_5%
30MA_30V_0.5UA_0.4 V_SOD323-2
PR203
5.1_0603_5%
1 2
12
downsize from 1 U_0603 to 4.7U _0402
12
@
4.7U_0402_ 6.3V6M
PR201
6.19K_0402_ 1%
1 2
12
PC209
4.7U_0402_ 6.3V6M
0.6V_DDR_VTT_ ON< 23>
PC213
BST_1.2V
UG_1.2V
LX_1.2V
LG_1.2V
CS_1.2V
PC206
4.7U_0402_ 6.3V6M
VDDP_1.2V
12
PD200
12
VDD_1.2V
+5V_ALW
1.2V_SUS_PW RGD
+19VB_1.2V
S5_1.2V
12
PR204
2.2_0603_5%
16
15
LGATE
14
PGND
13
CS
RT8207PGQW _WQFN20_3X3
12
VDDP
11
VDD
10
PR207
1 2
475K_0402_ 1%
PR210
100K_0402_ 5%
1 2
+1.2V_MEN_P
18
17
PHASE
UGATE
PU200
PGOOD
TON
9
S3_1.2V
20
19
VTT
BOOT
VLDOIN
VTTGND
VTTSNS
VTTREF
FB
S5
S3
6
8
7
shortage change from 1U_0402 to 4.7U_0402
FB sense trace
+3.3V_ALW_R
12
PR400
@
100K_0402_ 5%
PU400
1
+3.3V_ALW_R
+3.3VB_2.5V
12
PC400
10U_0603_6.3V6M
PG_2.5V
12
PC406
10U_0603_6.3V6M
PJP400
112
JUMP_43X79
JUMP@
2
Note:Iload(max)=3A
Note: When design Vin=5V, please stuff snubber to prevent Vin damage
2
3
4
FB=0.6V
VFB
PG
VIN
GND1
G5719CRC1U _TDFN8_2X2
+1.2V_MEN_P
21
PAD
1
2
3
GND
4
5
VDDQ
FB sense trace when FB pull down to GND
FB_1.2V
Change from 12K to 13K for Temp voltage test
12
PR209 20K_0402_1 %
9
TP
8
GND2
7
EN
6
LX
5
NC
+V_DDR_REF
+1.2V_MEN_P
PC211 220P_040 2_50V8J
1 2
PR206
13K_0402_1 %
1 2
EN_2.5V
1UH_PCMB04 2T-1R0MS_4.5A_20%
LX_2.5V
12
PR403
@EMI@
12
PC405
@EMI@
12
PC205 22U_0603_ 6.3V6M
+V_DDR_REF
12
PC212 .1U_0402_1 6V7K
@
PR401
1 2
12
PR404
PR405
PR402
1M_0402_5 %
12
Rup
12
Rdown
0_0402_5%
12
PC402
68P_0402_50V8J
12
PC401
@
0.1U_0402_16V7K
PL400
1 2
36.5K_0402_ 1%
4.7_0603_5%
FB_2.5V
11.5K_0402_ 1%
680P_0402_50V7K
Vout=0.6V* (1+Rup/Rdown)
+0.6V_P
PC208
0.033U_040 2_16V7K
+1.2V_MEN_P
+0.6V_P
SIO_SLP_S4# <11,18,19,88>
12
12
PC403
PC404
22U_0603_6.3V6M
+2.5V_MEMP
+2.5V_MEMP
22U_0603_6.3V6M
0.6Volt +/- 5% TDC 1.05A Peak Current 1.5A OCP Current 1.8A
JUMP@
PJP202
2
112
JUMP_1x3m
PJP203
2
112
JUMP_1x3m
JUMP@
PJP204
PAD-OPEN1x1m
JUMP@
2.5Volt TDC 2.218A Peak Current 3.168A Current Limit:3.5A
12
+1.2V_MEM
+0.6V_DDR_VTT
112
JUMP_43X79
JUMP@
PJP401
2
+2.5V_MEM
DELL CONFIDENTIAL/PROPRIETARY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1.2VP/0.6V/2.5V
1.2VP/0.6V/2.5V
1.2VP/0.6V/2.5V
LA-H271P
LA-H271P
LA-H271P
1
88 103Tuesday, April 09, 2019
88 103Tuesday, April 09, 2019
88 103Tuesday, April 09, 2019
1.0
1.0
1.0
5
VID1_VCCIO_VR
VID0_VCCIO_VR
@
1 2
CPU_C10_GA TE#<11,1 4>
PJP300
2
+19.5VB
D D
112
JUMP_43X 79
JUMP@
RUN_ON<11,22,58,59 ,67,70>
PC314
82P_0402_50V8J
RF@
@
PR304
1 2
0_0402_5%
12
PC302
0.1U_0402_25V6
@EMI@
PR307
1M_0402_1%
12
12
12
12
PC304
PC300
PC303
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
@EMI@
+3.3V_ALW_R
12
12
PC312
@
Switching frequency 750 kHz
0.1U_0402_25V6
+3.3V_ALW_R
12
@
PR311 10K_0402_1 %
C C
1 2
1 2
@
10K_0402_1 %
PR312
10K_0402_1 %
12
10K_0402_1 %
PR313
VID0_VCCIO_VR
VID1_VCCIO_VR
PR314
Vref mode =GND LP#=0, Vout=0V LP#=1, C1=0, C0=0, Vout=0.85V LP#=1, C1=0, C0=1, Vout=0.875V LP#=1, C1=1, C0=0, Vout=0.95V LP#=1, C1=1, C0=1, Vout=0.975V
4
PR308
PU300
VIN
EN
C1
C0
0_0402_5%
1 2
BST_IO BST_IO_R
MODE_IO
9
7
6
LP#
BST
SW
MODE
VOUT
PGND
AGND
PG133V3
NB681GD-Z_QFN1 3_2X3
10
PG_IO
12
PC313
4.7U_0402_6 .3V6M
8
12
2
11
PR309
0_0402_5%
+19VB_IO
EN_IO
LP#_VCCIO
1 2
PR300
@
100K_0402_ 1%
1
5
3
4
shortage change from 1U_0402 to 4.7U_0402
PR302
2.2_0603_5%
1 2
LX_IO
VOUT_IO
+3.3V_ALW_R
PC305
0.1U_0603_2 5V7K
1 2
3
PR301
EMI@
4.7_1206_5%
SNUB_IO
1 2
PL300
1UH_6.6A_2 0%_5X5X3_M
1 2
@
PR310
1 2
0_0402_5%
PJP301
JUMP_43X 118
112
JUMP@
2
PC301
EMI@
680P_0402_ 50V7K
1 2
+1.0VS_VCCIOP
+1.0VS_VCCIOP
12
12
PR303
100_0402_1%
PR306
@
1 2
0_0402_5%
PRIM_PW RGD<58,89>
+3.3V_ALW
Note: When design Vin =5V, please st uff snubber to prevent Vin damage
PC307
22U_0603_6.3V6M
12
PC308
22U_0603_6.3V6M
PJP900
1 2
PAD-OPEN1x1m
JUMP@
12
12
PC309
PC310
22U_0603_6.3V6M
VCC_IO_SENS E <11>
VSS_IO_SENS E <1 1>
+3.3V_ALW
@
PR906
1 2
0_0402_5%
+3.3VB_1.8 V
PC900
10U_0603_6.3V6M
22U_0603_6.3V6M
12
12
100K_0402_ 5%
PG_1.8V
12
PC901
10U_0603_6.3V6M
PR900
FB=0.6V
Note:Iload(max)=3A
2
+1.0VS_VCCIO
+1.0VS_VCCIO( 0.95V ) TDC 4.48 A Peak Current 6.4 A OCP Current 7.6 A MAX Choke DCR 14.0mohm
proximal PR303 0ohm PR306 100ohm PR310 100ohm
remote PR303 100ohm PR306 0ohm PR310 0ohm
EN_1.8V
PU900
9
TP
1
2
3
4
8
VFB
GND2
7
PG
EN
6
VIN
LX
5
NC
GND1
G5719CRC1U_ TDFN8_2X2
LX_1.8V
12
12
PJP901
1 2
PAD-OPEN1x1m
JUMP@
PR901
@
1 2
12
PR904
PR905
PR902
1M_0402_5%
12
Rup
12
Rdown
0_0402_5%
12
PC902
@
0.1U_0402_16V7K
PL900
1UH_PCMB0 42T-1R0MS_4.5A _20%
1 2
PR903
200K_0402_ 1%
4.7_0603_5%
@EMI@
FB_1.8V
PC903
100K_0402_ 1%
@EMI@
680P_0402_50V7K
Vout=0.6V* (1+R up/Rdown)
1
+1.8V_PRIM+1.8V_PRIMP
PCH_PRIM_EN <11,18,22,8 9>
+1.8V_PRIMP
12
PC904
68P_0402_50V8J
12
12
PC906
PC905
22U_0603_6.3V6M
22U_0603_6.3V6M
1.8V_PRIM TDC 0.25A Peak Current 0. 358A OCP Current 3.5 A
12
PC803
4.7U_0805_25V6K~D
@
1 2
@
1 2
PR810
0_0402_5%
PR811
0_0402_5%
PJP800
2 1
PAD-OPEN 1x2m
JUMP@
1
+
PC806
330U_D2_2V M_R9M
2
+1.05V_PRIMP
VCCMPHY_SE NSE < 20>
VSSMPHY_S ENSE <20>
+19.5VB
PJP801
2
1 2
PAD-OPEN 43 x118
JUMP@
+1.05V_PRIMP
+1.05V_PRIMP Ripple voltage ­Static load 3% / Dynamic load 5% Frequency 290kH z TDC 6.518A Peak Current 9 .31A OCP current 11. 3A TYP MAX H/S Rds(on) 22. 7mohm , 32moh m L/S Rds(on) 11. 6mohm , 14.5mo hm Choke DCR 13.5m ohm Bulk cap ESR 9m ohm
+1.05V_PRIM
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
VCC_IO/1.8V/1.0VPRIM
VCC_IO/1.8V/1.0VPRIM
VCC_IO/1.8V/1.0VPRIM
LA-H271P
LA-H271P
LA-H271P
1
89 103Tuesday, April 09, 2019
89 103Tuesday, April 09, 2019
89 103Tuesday, April 09, 2019
1.0
1.0
1.0
B B
PRIM_PW RGD<58,89>
PR801
PR803
499_0402_1%
1 2
5
1 2
118K_0402_ 1%
12
PC807
0.047U_0402_25V7K
S0 mode be high level
PCH_PRIM_EN< 11,18,22,89>
12/21 for HW request,
A A
adjust RC to control timing
PR812
@
1 2
0_0402_5%
TRIP_+1VSP
EN_+1VSP
FB_+1VSP
RF_+1VSP
12
PR804
470K_0402_ 1%
+3.3V_ALW
@
1 2
PG_1.0V
PR800
100K_0402_ 5%
PU800
1
PGOOD
2
TRIP
3
EN
4
VFB
5
TST
TPS51212DSC R_SON10_3X3
Vout=0.7V* (1+R 1/R2) =0.7V*(1+(4 .99/10))
VBST
DRVH
DRVL
BST_+1VSP
10
9
8
SW
7
V5IN
6
11
TP
Vout=1.0493V
PR802
1 2
UG_+1VSP
LX_+1VSP
LG_+1VSP
2.2_0603_5%
1 2
PC805
4.7U_0402_6 .3V6M
downsize from 1U_0603 to 4.7U_0402
4
PC804
.1U_0603_25 V7K
12
+5V_ALW
AON7752_DFN 3X3EP8-5
4
PQ801
+19VB_1V
12
12
5
PQ800 AON7408L_DF N8-5
123
12
5
4
12
123
PC801
PC800
0.1U_0402_25V6
@EMI@
@EMI@
EMI Part (35.33 )
PL801
1.5UH_MMD-0 6CZ-1R5M-V1_9A _20%
1 2
PR805
EMI@
4.7_1206_5%
SNUB_1V
PC808
EMI@
680P_0402_ 50V7K
4.99K_0402 _1%
1 2
12
PR808 10K_0402_1 %
3
2200P_0402_50V7K
PR807
12
PC802
4.7U_0805_25V6K~D
12
PR809
10_0402_1%
5
Place close to CPU side
PR1100 100_0402_1%
1 2
VSS_SA_S ENSE<11>
D D
VCC_SA_S ENSE<11>
+VCC_SA
+VCC_CORE
VCC_SENS E<12>
VSS_SENS E<12>
PC1113
15P_0402_5 0V8J
1 2
PR1133
3.65K_0402 _1%
1 2
12
PC1131
0.1U_0402_2 5V6
1 2
PC1133
0.1U_0402_2 5V6
1 2
PC1135
0.1U_0402_2 5V6
1 2
PC1136
0.1U_0402_2 5V6
1 2
2200P_0402 _50V7K
PR1142
174K_0402_1%
CSP1_4PH
CSP2_4PH
CSP3_4PH
CSP4_4PH
C C
Place close to Choke in VCORE first phase circuit
SW1_4 PH< 90,91>
SW2_4 PH< 90,91>
SW3_4 PH< 90,91>
SW4_4 PH< 90,91>
CSREF_4PH<91 >
SW1_4 PH< 90,91>
SW2_4 PH< 90,91>
B B
SW3_4 PH< 90,91>
SW4_4 PH< 90,91>
PH1101
220K_0402_ 5%_ERTJ0EV22 4J
PR1143
88.7K_0603 _1%
1 2
PR1146
88.7K_0603 _1%
1 2
PR1148
88.7K_0603 _1%
1 2
PR1149
88.7K_0603 _1%
1 2
PR1154
2.26K_0402 _1%
1 2
CSREF_4PH
PR1161
2.26K_0402 _1%
1 2
CSREF_4PH
PR1163
2.26K_0402 _1%
1 2
CSREF_4PH
PR1164
2.26K_0402 _1%
1 2
CSREF_4PH
PR1111
100_0402_1%
1 2
Place close to CPU side
PR1119
100_0402_1%
1 2
PR1125
100_0402_1%
1 2
49.9_0402_1 %
1 2
PC1115
12
12
PR1140
75K_0402_1%
12
1000P_0402 _50V7K
1000P_0402 _50V7K
PR1130
1 2
PR1131
1K_0402_1%
1 2
PC1121
56P_0402_50V8J
CSREF_4PH
@
PR1106
1 2
0_0402_5%
1 2
PR1108
@
0_0402_5%
PR1121
@
1 2
0_0402_5%
1 2
PR1122
@
0_0402_5%
470P_0402_ 50V8J
1 2
PC1122
1 2
1000P_0402_50V7K
PC1103
PC1109
PC1114
2200P_0402 _50V7K
1 2
1 2
1K_0402_5%
1 2
1.65K_0402 _1%
1 2
1 2
1000P_0402 _50V7K
1 2
1.21K_0402 _1%
1 2
1 2
2200P_0402 _50V7K
PC1140
PR1107
PR1109
PC1105
PR1123
PC1110
CSCOMP_4P H CSSUM_4P H
4
CSN_1PH<92>
VSN_1PH
VSP_1PH
VSP_4PH
VSN_4PH
+19.5VB_CPU
27.4K_0402 _1%
1 2
470P_0402_ 50V8J
1 2
30.1K_0402 _1%
PC1123
0.22U_0402_ 25V6K
1 2
FAE modify item_20170518
H62@
PR1132
PC1118
1 2
PR1138
PR1150
1K_0402_1%
1 2
PC1128
0.01U_0402_ 50V7K
1 2
+5V_ALW_R
downsize from 1U_0603 to 4.7U_0402
Place close to H-side,L-side MOS in VCORE first phase
3
Place close to Choke in VCCSA first phase circuit
PH1100
12
100K_0402_ 1%_TSM0B104F4 251RZ
PR1169
10_0402_1%
12
PC1137
3300P_0402 _50V7K~D
PR1118
1.5K_0402_ 1%
1 2
CSN_1PH_R
100P_0402_ 50V8J
1 2
1 2
PC1102
0.01UF_0402_ 25V7K
1 2
PC1104
2200P_0402 _50V7K
1000P_0402 _50V7K
12.4K_0402 _1%
1 2
PC1107
0.015U_0402 _25V7K
1 2
1 2
PC1108
VSN_1PH
VSP_1PH
53
12K_0402_1 %
1 2
PC1100
1 2
PR1116
PR1101
52
TAB
VSP_4PH
1
0.1U_0402_2 5V6
PR1151
PH1103
12
2 3 4 5 6 7 8
9 10 11 12 13
PC1127
12
PC1130
TSENSE_4PH
12
12
VSP_4PH VSN_4PH IMON_4PH DIFFOUT_4PH FB_4PH COMP_4PH ILIM_4PH CSCOMP_4PH CSSUM_4PH CSREF_4PH CSP1_4PH CSP2_4PH CSP3_4PH
TSENSE_4PH
4.7U_0402_6.3V6M
@
PR1165 0_0402_5%
12
VSN_4PH
DIFFOUT_4PH FB_4PH
COMP_4PH
ILIM_4PH COMP_2PH
CSP1_4PH CSP2_4PH CSP3_4PH
1 2
2.2_0603_5%
PWM1_ 4PH/ICCMAX4 <91>
PWM2_ 4PH/ADDR<9 1>
PWM3_ 4PH/VBOOT< 91>
PWM4_ 4PH/ROSCM<91>
220K_0402_ 5%_ERTJ0EV22 4J
VSP_1PH
15
DRON< 91,92>
12
PR1155
100K_0402_1%
H62@
Place close to H-side,L-side MOS in VCCGT first phase
PR1167
61.9K_0402 _1%
COMP_1PH
51
VSN_1PH
VCC16TSENSE_4PH14VRMP
ILIM_1PH
48
49
50
ILIM_1PH
COMP_1PH
PWM1_4PH/ICCMAX_4PH18PWM2_4PH/ADDR19PWM3_4PH/VBOOT20PWM4_4PH/ROSC_MPH21PWM2_2PH/ROSC_1PH22PWM1_2PH/ICCMAX_2PH
DRON
17
12
PR1156
4.3K_0402_1%
CSP_1PH
CSN_1PH
PR1102
7.5K_0603_ 1%
1 2
12
12
PC1106
470P_0402_ 50V8J
IMON_1PH
40
41
42EN43
44
45
46
47
SDIO
SCLK
ALERT#
VR_RDY
CSP_1PH
IMON_1PH
PWM_1PH/ICCMAX_1PH
TTSENSE_1PH/PSYS24TTSENSE_2PH25CSP4_4PH
23
26
TSENSE_2PH
PWM2_ 2PH/ROSC1
12
PR1158
PR1157
24.9K_0402_1%
220K_0402_ 5%_ERTJ0EV22 4J
PR1112
29.4K_0402 _1%
81215_SCLK 81215_ALE RT 81215_SDIO
IMON_2PH
DIFFOUT_2PH
COMP_2PH
CSCOMP_2PH
CSSUM_2PH
CSREF_2PH
CSP1_2PH CSP2_2PH
12
97.6K_0402_1%
SW_1P H <92>
+3.3V_RUN
12
10K_0402_1 %
PU1100 NCP81215DM NTXG_QFN52_6X6
VRHOT# VSP_2PH VSN_2PH
FB_2PH
ILIM_2PH
CSP4_4PH
1 2
PR1171
97.6K_0402_1%
PH1104
PR1114
PCH_PW ROK <18>
39 38 37 36 35 34 33 32 31 30 29 28 27
PR1170
1K_0402_1%
PC1129
0.1U_0402_2 5V6
12
TSENSE_2PH
12
@
PR1166 0_0402_5%
12
12
PR1168
61.9K_0402 _1%
81215_VR_H OT
CSP1_2PH
12
DIFFOUT_2PH
PWM1_ 1PH/ICCMAX1 <92>
PR1120
37.4K_0402 _1%
1 2
1 2
@
PR1198
0_0402_5%
VSP_2PH VSN_2PH
FB_2PH
ILIM_2PH
CSSUM_2P H
+5V_ALW_R
I_SYS < 58,85>
PR1153
24.9K_0402 _1%
1 2 1 2
PR1152
25.5K_0402 _1%
PWM1_ 2PH/ICCMAX2 <92>
2200P_0402 _50V7K
1 2
PR1139
11K_0402_1 %
12
PC1126
0.22U_0402_ 25V6K
IMVP_VR_ON <5 9>
PR1127
1.05K_0402 _1%
1 2
1 2
PC1112
PR1135
27.4K_0402 _1%
1 2
PC1120
470P_0402_ 50V8J
1 2
2
+1.0V_VCCST
81215_VR_H OT
81215_SCLK
81215_ALE RT
81215_SDIO
@
1 2
PC1111
12
1000P_0402 _50V7K
1 2
@
CSP1_2PH
PR1110
100_0402_1 %
1 2
1 2
49.9_0402_1 %
1 2
PR1115 0_0402 _5%@
1 2
PR1113 10_0 402_1%
PR1126
0_0402_5%
PR1128
0_0402_5%
CSCOMP_2P H
12
PC1124
100P_0402_50V8J
CSREF_2PH
PR1199 NA, need confirm
12
PR1103
PR1199
PR1105
100_0402_1%
1 2
@
499_0402_1%
@
PR1117
Place close to CPU side
PR1124
100_0402_1 %
1 2
PR1129
100_0402_1 %
1 2
49.9_0402_1 %
12
12
PR1141
75K_0402_1%
PC1125
12
1000P_0402_50V7K
PR1144
PR1160
2.26K_0402 _1%
1 2
PC1132
0.1U_0402_2 5V6
1 2
CSREF_2PH
1
12
12
PC1101 10U_0402_6. 3V6M
1 2
PR1104
45.3_0402_1%
45.3_0402_1%
PROCHOT# <7,27 ,58,82,85>
VR_SVID_CLK <7>
VR_SVID_ALE RT# <7>
VR_SVID_DATA <7>
+VCC_GT
VCC_GT_SENSE <11>
VSS_GT_SENSE <11>
PC1116
3.65K_0402 _1%
PR1145
61.9K_0603 _1%
1 2
15P_0402_5 0V8J
1 2
PR1137
PC1117
1 2
1 2
2200P_0402 _50V7K
SW1_2 PH <90,92>
PC1119
PR1134
470P_0402_ 50V8J
1 2
1 2
12
PR1136
1K_0402_1%
12
PH1102
220K_0402_ 5%_ERTJ0EV22 4J
Place close to Choke in VCCGT first phase circuit
174K_0402_1%
CSREF_2PH <92>
SW1_2 PH <90,92>
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DELL CONFIDENTIAL/PROPRIETARY
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
VCORE controller
VCORE controller
VCORE controller
LA-H271P
LA-H271P
LA-H271P
1
90 103Tuesday, April 09, 2019
90 103Tuesday, April 09, 2019
90 103Tuesday, April 09, 2019
1.0
1.0
1.0
5
4
3
2
1
D D
+19.5VB
PL1200
EMI@
5A_Z80_0805 _2P
1 2
PL1201
EMI@
5A_Z80_0805 _2P
1 2
+5V_ALW_R
1 2
PR1200 2_0603 _5%
12
PC1215
2.2U_0603_1 0V7K
PWM1_4PH/ICCMAX4 <90>
+5V_ALW_R
C C
+19.5VB_CPU
1
1
+
+
PC1204
PC1205
2
2
100U_D3L_25VM_R60M
100U_D3L_25VM_R60M
PC1213 1U_0603_16V 7K
1 2
PR1216 0_04 02_5%@
DRON< 90,91,92>
1 2
PR1217 0_04 02_5%
1 2
PU1200
3
VIN1
VCC
15
VCCD
VIN2
17
THWN
BOOT
16
DISB#
PHASE
1
PWM
2
SW1
SMOD#
SW2
4
CGND
10
PGND1
14
PGND2
13
GL1
19
NC
AGND
GL2
NCP302045M NTXG_PQFN33_5X 5
8 9
5 7
11 12
6 18
12
12
12
PC1208
PC1207
PC1206
2200P_0402_50V7K
3.9_0603_1%
0.1U_0402_25V7K
1 2
PR1201
10U_0805_25VAK
PC1214
1 2
0.22U_0603_ 25V7K
CORE_SW 1 CORE_SW 2
0.15UH_PCM E064T-R15MS_36 A_20%
12
PC1216 1000P_0603 _50V7K
12
PR1202
2.2_1206_1%
12
12
PC1209
10U_0805_25VAK
PL1202
1
2
12
PC1210
PC1211
10U_0805_25VAK
10U_0805_25VAK
4
3
PR1203
10_0402_1%
1 2
+VCC_CORE
CSREF_4PH <90,91>
SW1_4PH <90>
PC1225
2.2U_0603_1 0V7K
+5V_ALW_R
12
1 2
PR1205 2_0603 _5%
DRON<90,91,92>
PWM2_4PH/ADDR<90>
+5V_ALW_R
PC1223 1U_0603_16V 7K
1 2
PR1218 0_04 02_5%@
1 2
PR1219 0_04 02_5%
1 2
PU1201
3
VCC
15
VCCD
17
THWN
16
DISB#
1
PWM
2
SMOD#
4
CGND
10
PGND1
14
PGND2
13
GL1
19
GL2
NCP302045M NTXG_PQFN33_5X 5
BOOT
PHASE
AGND
VIN1 VIN2
SW1 SW2
NC
+19.5VB_CPU
8 9
5 7
11 12
6 18
12
12
PC1219
10U_0805_25VAK
PC1224
1 2
0.22U_0603_ 25V7K
12
12
12
PC1226 1000P_0603 _50V7K
PR1206
2.2_1206_1%
PC1220
10U_0805_25VAK
PL1203
1
2
0.15UH_PCM E064T-R15MS_36 A_20%
12
12
PC1217
PC1218
0.1U_0402_25V7K
2200P_0402_50V7K
1 2
PR1204
3.9_0603_1%
12
PC1221
PC1222
10U_0805_25VAK
10U_0805_25VAK
4
3
PR1207
10_0402_1%
1 2
+VCC_CORE
CSREF_4PH <90,91>
SW2_4PH <90>
+19.5VB_CPU
12
PC1229
10U_0805_25VAK
PC1233
1 2
0.22U_0603_ 25V7K
0.15UH_PCM E064T-R15MS_36 A_20%
12
PC1236 1000P_0603 _50V7K
12
PR1210
2.2_1206_1%
12
PC1230
10U_0805_25VAK
PL1204
1
2
12
12
+5V_ALW_R
B B
12
PR1208
1 2
2_0603_5%
DRON< 90,91,92>
PC1235
2.2U_0603_1 0V7K
PWM3_4PH/VBOOT<90> DRON< 90,91,92>
+5V_ALW_R
PC1234 1U_0603_16V 7K
1 2
PR1220 0_0402 _5%@
1 2
PR1221 0_0402 _5%
1 2
PU1202
3
VCC
15
VCCD
17
THWN
BOOT
16
DISB#
PHASE
1
PWM
2
SMOD#
4
CGND
10
PGND1
14
PGND2
13
GL1
19
AGND
GL2
NCP302045M N_PQFN33_5X5
8
VIN1
9
VIN2
5 7
11
SW1
12
SW2
6
NC
18
PC1228
PC1227
0.1U_0402_25V7K
2200P_0402_50V7K
1 2
PR1209
3.9_0603_1%
CORE_SW 3
12
12
PC1232
PC1231
4
3
10U_0805_25VAK
10U_0805_25VAK
+VCC_CORE
PR1214
10_0402_1%
1 2
CSREF_4PH <90,91>
SW3_4PH <90>
PC1245
2.2U_0603_1 0V7K
+5V_ALW_R
12
PR1212
1 2
2_0603_5%
PWM4_4PH/ROSCM< 90>
+5V_ALW_R
PC1244 1U_0603_16V 7K
1 2
PR1222 0_0402 _5%@
1 2
PR1223 0_0402 _5%
1 2
PU1203
3
VCC
15
VCCD
17
THWN
16
DISB#
1
PWM
2
SMOD#
4
CGND
10
PGND1
14
PGND2
13
GL1
19
GL2
NCP302045M N_PQFN33_5X5
BOOT
PHASE
AGND
VIN1 VIN2
SW1 SW2
NC
+19.5VB_CPU
PC1237
2200P_0402_50V7K
8 9
5 7
11 12
6 18
12
12
12
12
PC1239
PC1238
0.1U_0402_25V7K
1 2
PR1211
3.9_0603_1%
CORE_SW 4
10U_0805_25VAK
1 2
PC1243
0.22U_0603_ 25V7K
12
PC1240
10U_0805_25VAK
PL1205
1
2
0.15UH_PCM E064T-R15MS_36 A_20%
12
PC1246 1000P_0603 _50V7K
12
PR1213
2.2_1206_1%
12
PC1241
PC1242
10U_0805_25VAK
10U_0805_25VAK
4
3
PR1215
10_0402_1%
1 2
+VCC_CORE
CSREF_4PH <90,91>
SW4_4PH <90>
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/06 2017/01/06
2016/01/06 2017/01/06
2016/01/06 2017/01/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
+VCC_CORE
+VCC_CORE
+VCC_CORE
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
LA-H271P
LA-H271P
LA-H271P
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
91 103Tues day, April 09, 2 019
91 103Tues day, April 09, 2 019
91 103Tues day, April 09, 2 019
1.0
1.0
1.0
5
4
3
2
1
+19.5VB_CPU
12
12
+5V_ALW_R
D D
12
PC1708
2.2U_060 3_10V7K
C C
PR1700
1 2
2_0603_ 5%
PWM1_2PH/ICCMAX2<90>
+5V_ALW_R
PC1707 1U_0603 _16V7K
1 2
DRON<90,91,92>
PU1700
3
15
17 16
1 2
4 10 14 13 19
NCP3020 45MN_PQFN33_ 5X5
VCC VCCD
THWN DISB# PWM SMOD#
CGND PGND1 PGND2 GL1 GL2
VIN1 VIN2
BOOT
PHASE
SW1 SW2
AGND
NC
8 9
5 7
11 12
6 18
PC1701
PC1700
0.1U_0402_25V7K
2200P_0402_50V7K
1 2
PR1701
3.9_0603 _1%
GT_SW 1
12
12
PC1703
PC1702
10U_0603_25V6M
PC1706
1 2
0.22U_06 03_25V7K
1
2
0.15UH_P CME064T-R15MS _36A_20%
12
PC1709 1000P_0 603_50V7K
12
PR1702
2.2_1206 _1%
10U_0603_25V6M
PL1700
12
PC1713
PC1712
@
@
10U_0603_25V6M
10U_0603_25V6M
PC1705
10U_0603_25V6M
PR1703
10_0402 _1%
1 2
12
@
PC1710
10U_0603_25V6M
+VCC_GT
SW1_2PH <90>
12
12
PC1704
10U_0603_25V6M
4
3
12
PC1711
@
12
10U_0603_25V6M
CSREF_2PH <90>
+19.5VB_CPU
12
12
12
12
+5V_ALW_R
PC1802
PC1801
PR1801
1 2
2_0603_ 5%
B B
2.2U_060 3_10V7K
PC1808
12
PWM1_1PH/ICCMAX1<90>
PC1807 1U_0603 _16V7K
1 2
DRON<90,91,92>
PU1800
3
VCC
15
VCCD
17
THWN
16
DISB#
1
PWM
2
SMOD#
4
CGND
10
PGND1
14
PGND2
13
GL1
19
GL2
NCP3020 45MN_PQFN33_ 5X5
VIN1 VIN2
BOOT
PHASE
SW1 SW2
AGND
NC
8 9
5 7
11 12
6 18
PC1800
0.1U_0402_25V7K
2200P_0402_50V7K
1 2
3.9_0603 _1%
PR1800
SA_SW
10U_0805_25VAK
PC1806
1 2
0.22U_06 03_25V7K
12
12
2.2_1206 _1%
12
1
2
PC1804
10U_0805_25VAK
PL1800
PC1803
10U_0805_25VAK
0.47UH_M MD05CZR47M_1 2A_20%
PC1809 1000P_0 603_50V7K
PR1802
12
PC1805
10U_0805_25VAK
4
3
+VCC_SA
CSN_1PH <90>
SW_1PH <90>
A A
Security Class ification
Security Class ification
Security Class ification
2016/01/ 06 2017/01/ 06
2016/01/ 06 2017/01/ 06
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/ 06 2017/01/ 06
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
+VCC_GT/+VCC_SA
+VCC_GT/+VCC_SA
+VCC_GT/+VCC_SA
LA-H271P
LA-H271P
LA-H271P
1
1.0
1.0
1.0
92 103Tuesday, April 09, 2019
92 103Tuesday, April 09, 2019
92 103Tuesday, April 09, 2019
A A
B B
C C
D D
+VCC_CORE
H82@
PC1410
10U_0402_6.3VAM
H82@
PC1411
10U_0402_6.3VAM
H82@
PC1412
10U_0402_6.3VAM
H82@
PC1413
10U_0402_6.3VAM
H82@
PC1414
10U_0402_6.3VAM
H82@
PC1415
10U_0402_6.3VAM
H82@
PC1416
10U_0402_6.3VAM
H82@
PC1417
10U_0402_6.3VAM
H82@
PC1418
10U_0402_6.3VAM
H82@
PC1419
10U_0402_6.3VAM
H82@
PC1420
10U_0402_6.3VAM
H82@
PC1421
10U_0402_6.3VAM
12
12
12
12
12
12
12
12
12
12
12
12
PC1339
10U_0402_6.3VAM
PC1340
10U_0402_6.3VAM
PC1341
10U_0402_6.3VAM
PC1342
10U_0402_6.3VAM
PC1343
10U_0402_6.3VAM
PC1344
10U_0402_6.3VAM
H82@
PC1401
10U_0402_6.3VAM
H82@
PC1402
10U_0402_6.3VAM
H82@
PC1403
10U_0402_6.3VAM
H82@
PC1404
10U_0402_6.3VAM
H82@
PC1405
10U_0402_6.3VAM
H82@
PC1406
10U_0402_6.3VAM
H82@
PC1407
10U_0402_6.3VAM
H82@
PC1408
10U_0402_6.3VAM
H82@
PC1409
10U_0402_6.3VAM
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
PC1324
10U_0402_6.3VAM
PC1325
10U_0402_6.3VAM
PC1326
10U_0402_6.3VAM
PC1327
10U_0402_6.3VAM
PC1328
10U_0402_6.3VAM
PC1329
10U_0402_6.3VAM
PC1330
10U_0402_6.3VAM
PC1331
10U_0402_6.3VAM
PC1332
10U_0402_6.3VAM
PC1333
10U_0402_6.3VAM
PC1334
10U_0402_6.3VAM
PC1335
10U_0402_6.3VAM
PC1336
10U_0402_6.3VAM
PC1337
10U_0402_6.3VAM
PC1338
10U_0402_6.3VAM
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
2
PC1317
22U_0603_6.3VAM
2
PC1318
22U_0603_6.3VAM
2
PC1319
22U_0603_6.3VAM
2
PC1320
22U_0603_6.3VAM
2
PC1321
22U_0603_6.3VAM
2
PC1322
22U_0603_6.3VAM
2
PC1323
22U_0603_6.3VAM
H82@
2
PC1395
22U_0603_6.3VAM
H82@
2
PC1396
22U_0603_6.3VAM
H82@
2
PC1397
22U_0603_6.3VAM
H82@
2
PC1398
22U_0603_6.3VAM
H82@
2
PC1399
22U_0603_6.3VAM
H82@
2
PC1400
22U_0603_6.3VAM
1
1
1
1
1
1
1
1
1
1
1
1
1
2
PC1302
22U_0603_6.3VAM
2
PC1303
22U_0603_6.3VAM
2
PC1304
22U_0603_6.3VAM
2
PC1305
22U_0603_6.3VAM
2
PC1306
22U_0603_6.3VAM
2
PC1307
22U_0603_6.3VAM
2
PC1308
22U_0603_6.3VAM
2
PC1309
22U_0603_6.3VAM
2
PC1310
22U_0603_6.3VAM
2
PC1311
22U_0603_6.3VAM
2
PC1312
22U_0603_6.3VAM
2
PC1313
22U_0603_6.3VAM
2
PC1314
22U_0603_6.3VAM
2
PC1315
22U_0603_6.3VAM
2
PC1316
22U_0603_6.3VAM
1
1
@
1
1
1
1
1
1
1
1
1
1
1
1
1
2
+
PC1300
330U_D2_2.5V_R6M
2
+
PC1301
330U_D2_2.5V_R6M
2
+
PC1393
330U_D2_2.5V_R6M
2
+
PC1394
330U_D2_2.5V_R6M
1
1
1
1
10uF_0402 X 21
1uF_0201 X 48
10uF_0402 X 42
1uF_0201 X 48
5
VCC_CORE (H62)
330uF X3
22uF_0603 X 22
4
VCC_CORE (H82)
330uF X3
22uF_0603 X 28
12
PC1390
1U_0201_6.3VAM
12
PC1391
1U_0201_6.3VAM
5
4
PC1392
1U_0201_6.3VAM
12
PC1375
1U_0201_6.3VAM
PC1376
1U_0201_6.3VAM
PC1377
1U_0201_6.3VAM
PC1378
1U_0201_6.3VAM
PC1379
1U_0201_6.3VAM
PC1380
1U_0201_6.3VAM
PC1381
1U_0201_6.3VAM
PC1382
1U_0201_6.3VAM
PC1383
1U_0201_6.3VAM
PC1384
1U_0201_6.3VAM
PC1385
1U_0201_6.3VAM
PC1386
1U_0201_6.3VAM
PC1387
1U_0201_6.3VAM
PC1388
1U_0201_6.3VAM
PC1389
1U_0201_6.3VAM
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
PC1360
1U_0201_6.3VAM
PC1361
1U_0201_6.3VAM
PC1362
1U_0201_6.3VAM
PC1363
1U_0201_6.3VAM
PC1364
1U_0201_6.3VAM
PC1365
1U_0201_6.3VAM
PC1366
1U_0201_6.3VAM
PC1367
1U_0201_6.3VAM
PC1368
1U_0201_6.3VAM
PC1369
1U_0201_6.3VAM
PC1370
1U_0201_6.3VAM
PC1371
1U_0201_6.3VAM
PC1372
1U_0201_6.3VAM
PC1373
1U_0201_6.3VAM
PC1374
1U_0201_6.3VAM
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
PC1345
1U_0201_6.3VAM
PC1346
1U_0201_6.3VAM
PC1347
1U_0201_6.3VAM
PC1348
1U_0201_6.3VAM
PC1349
1U_0201_6.3VAM
PC1350
1U_0201_6.3VAM
PC1351
1U_0201_6.3VAM
PC1352
1U_0201_6.3VAM
PC1353
1U_0201_6.3VAM
PC1354
1U_0201_6.3VAM
PC1355
1U_0201_6.3VAM
PC1356
1U_0201_6.3VAM
PC1357
1U_0201_6.3VAM
PC1358
1U_0201_6.3VAM
PC1359
1U_0201_6.3VAM
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
3
3
+VCC_SA
+VCC_GT
12
PC1617
1U_0201_6.3VAM
2
Title
Size Document Number Rev
Date: Sheet of
Title
Size Document Number Rev
Date: Sheet of
Title
Size Document Number Rev
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
CPU_DECOUPLING
CPU_DECOUPLING
CPU_DECOUPLING
LA-H271P
LA-H271P
LA-H271P
1
93
93
93
12
PC1610
10U_0402_6.3VAM
12
PC1611
10U_0402_6.3VAM
12
PC1612
10U_0402_6.3VAM
12
PC1613
10U_0402_6.3VAM
12
PC1614
10U_0402_6.3VAM
12
PC1615
10U_0402_6.3VAM
12
PC1616
10U_0402_6.3VAM
2
PC1604
22U_0603_6.3VAM
2
PC1605
22U_0603_6.3VAM
2
PC1606
22U_0603_6.3VAM
2
PC1607
22U_0603_6.3VAM
2
PC1608
22U_0603_6.3VAM
2
PC1609
22U_0603_6.3VAM
1
10uF_0402 X 7
1uF_0201 X 1
2
PC1600
22U_0603_6.3VAM
2
PC1601
22U_0603_6.3VAM
2
PC1602
22U_0603_6.3VAM
2
PC1603
22U_0603_6.3VAM
VCC_SA
22uF_0603 X 4(VR output)
22uF_0603 X 6
12
PC1525
1
1
1
1U_0201_6.3VAM
PC1526
1U_0201_6.3VAM
PC1527
1U_0201_6.3VAM
PC1528
1U_0201_6.3VAM
PC1529
1U_0201_6.3VAM
PC1530
1U_0201_6.3VAM
PC1531
1U_0201_6.3VAM
PC1532
1U_0201_6.3VAM
PC1533
1U_0201_6.3VAM
PC1534
1U_0201_6.3VAM
PC1535
1U_0201_6.3VAM
PC1536
1U_0201_6.3VAM
12
12
12
12
12
12
12
12
12
12
12
PC1515
10U_0402_6.3VAM
PC1516
10U_0402_6.3VAM
PC1517
10U_0402_6.3VAM
PC1518
10U_0402_6.3VAM
PC1519
10U_0402_6.3VAM
PC1520
10U_0402_6.3VAM
PC1521
10U_0402_6.3VAM
PC1522
10U_0402_6.3VAM
PC1523
10U_0402_6.3VAM
PC1524
10U_0402_6.3VAM
12
12
12
12
12
12
12
12
12
12
2
PC1502
22U_0603_6.3VAM
2
PC1503
22U_0603_6.3VAM
2
PC1504
22U_0603_6.3VAM
2
PC1505
22U_0603_6.3VAM
2
PC1506
22U_0603_6.3VAM
2
PC1507
22U_0603_6.3VAM
2
PC1508
22U_0603_6.3VAM
2
PC1509
22U_0603_6.3VAM
2
PC1510
22U_0603_6.3VAM
2
PC1511
22U_0603_6.3VAM
2
PC1512
22U_0603_6.3VAM
2
PC1513
22U_0603_6.3VAM
2
PC1514
22U_0603_6.3VAM
1
470U_X_2VM_R6M
1
1
1
1
1
1
1
1
1
1
1
1
2
PC1500
1
+
2
VCC_GT
470uF X1
22uF_0603 X 13
10uF_0402 X 10
1uF_0201 X 12
1
1
1
1
1
1
1
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
1.0
1.0
1.0
5
D D
C C
4
3
2
1
B B
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
BOM option component
BOM option component
BOM option component
LA-H271P
LA-H271P
LA-H271P
94
94
94
1
1.0
1.0
1.0
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
5
D D
C C
4
3
2
1
B B
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-H271P
LA-H271P
LA-H271P
95
95
95
1
1.0
1.0
1.0
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
5
D D
C C
4
3
2
1
B B
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-H271P
LA-H271P
LA-H271P
96
96
96
1
1.0
1.0
1.0
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
5
D D
C C
4
3
2
1
B B
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-H271P
LA-H271P
LA-H271P
97
97
97
1
1.0
1.0
1.0
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
5
D D
C C
4
3
2
1
B B
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-H271P
LA-H271P
LA-H271P
98
98
98
1
1.0
1.0
1.0
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
5
D D
C C
4
3
2
1
B B
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-H271P
LA-H271P
LA-H271P
99
99
99
1
1.0
1.0
1.0
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
5
D D
C C
4
3
2
1
B B
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
Reserve
Reserve
Reserve
LA-H271P
LA-H271P
LA-H271P
100
100
100
1
1.0
1.0
1.0
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
103Tuesday, April 09, 2019
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