Compal LA-H131P Schematic

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LA-H131P

2018-11-05

Rev : 0.4

Compal Confidential

EL432/EL532

M/B Schematic Documents

AMD Picasso FP5 APU with DDR4

Title

Document Number

Date: of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPART MENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C D

Issued Date

Deciphered Date

LA-H131P

R e v

0.4

Cover Page

Size

B

1 46Monday,November 05, 2018 Sheet

E

2018/11/05 2019/11/05

Compal Electronics, Inc.

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AMD Picasso Ridge

1140pin BGA

eDP x2 HBR 2.7Gb/s

eDP Panel

FHD LCD

HDA

I2C

SPI

TouchPad

SPI ROM

8MB

PCIe x1 , Gen1 2.5Gb/s

Card

Reader

Realtek

RTS5232S

SDIO

SD Card Conn.

On Sub Board

CH-A DDR4-SO-DIMM X1
CH-B on board RAM x4

DDR4 2400MHz

USB3.0 Conn.

USB2.0 x1, 480Mb/s

SPK

DMIC

HP

Int. Array Mic *2

Int. Speaker

Combo Jack

FingerPrint

USB2.0 x1, 480Mb/s

USB2.0 Hub

USB3.1 x1, Gen1 5Gb/s

On Sub Board

USB3 redriver

Parade PS8713B

USB3.1 x1, 5Gb/s

NGFF (Key M)

PCIE/SATA SSD
2242/2280 conn.

PCIe x3 , Gen3 8Gb/s

DDI x4 , 2.97GT/s

LPC

Int. KBD

KBC

ENE KB9022

Hall Sensor x1

LED

Int. Camera

Touch Panel

USB2.0 x1, 480Mb/s

USB3.0 Conn.
with AOU

HDMI Conn.

HDMI1.4b

Audio Codec

Realtek
ALC3287-CG

Type-C Conn.

USB3.1 Gen1

MUX/CC

Realtek RTS5448

VBus

5V Switch

USB2.0 x1,480Mb/s

USB3.1x1, Gen1

CC/Vconn

USB3.1x1, Gen1

NGFF (Key E)

WLAN/BT5.0
2230 conn.

USB2.0 x1, 480Mb/s

PCIe x1 , Gen1 2.5Gb/s

PCIe/SATA Mux

Pericom PI3DBS12212A

PCIe x1 , Gen3 8Gb/s

SATA x1 , Gen3 6Gb/s

HDD Conn.

SATA x1 , Gen3 6Gb/s

USB3.1 x1, Gen1 5Gb/s

USB3 redriver

Parade PS8713B

USB3.1 x1, 5Gb/s

USB2.0 x1, 480Mb/s

TI SN1702001RTER

USB2.0 x1, 480Mb/s

USB Charger

Reserve

Tiiitttllle

Siiize DocumentttNumberrr

LA-H1 31P

Rev

0...4

Cover Page

D

Sheettt 2 o fff46Dattte::: Monday,,, Novemberrr 05,,,2018

Securrriiittty Clllassiiifffiiicatttiiion

Compalll Secrettt Dattta

IsII sued Datett

2018///11///05

Decipheii rrredDatett

2019/1// 1/0// 5

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THEPROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND TRADE
SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT EXCEPT AS
AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,,IIINC...

Compal Electronics, Inc.

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1

1

D D

C C

B B

A A

RTC_CLK RTC_CLK

T2 : 15ms~26ms

VCIN1_AC_IN

EC_ON

+3VLP

+5VALW

+3VALW

Boot

3V/5VALW_PG

+1.8VALW

+0.8VALW

AC Plug

ON/OFF#

EC_RSMRST#

PBTN_OUT#

PM_SLP_S5#

PM_SLP_S3#

SYSON

+1.2V_DDR

+2.5V_MEM

SUSP#

0.8VS_PWR_EN

+5VS

+3VS

+1.8VS

+0.8VS

+0.6VS

VR_ON

+APU_CORE

+APU_CORE_SOC

VGATE

PCH_PWROK

APU_PWRGD

PCIRST#

APU_RST#

CLK_PCIE

Power Sequence

EC Pin 110 Intput

EC Pin 112 Output

EC Pin 114 Intput
EC Pin 100 Output

EC Pin 122 Output

EC Pin 123 Intput

EC Pin 6 Intput

EC Pin 95 Output

EC Pin 116 Output

EC Pin 99 Output

EC Pin 121 Output

EC Pin 36 Intput

EC Pin 32 Output

PLT_RST#

EC Pin 13 Intput

Shut
Down

VCIN1_AC_IN

EC_ON

+3VLP

+5VALW

+3VALW

3V/5VALW_PG

+1.8VALW

+0.8VALW

ON/OFF#

EC_RSMRST#

PBTN_OUT#

PM_SLP_S5#

PM_SLP_S3#

SYSON

+1.2V_DDR

+2.5V_MEM

SUSP#

0.8VS_PWR_EN

+5VS

+3VS

+1.8VS

+0.8VS

+0.6VS

VR_ON

+APU_CORE

+APU_CORE_SOC

VGATE

PCH_PWROK

APU_PWRGD

PCIRST#

APU_RST#

CLK_PCIE

PLT_RST#

T1_Min : 10ms

T3 : 30us~64us

T5_Min : 1ms

T8 : 15ms~17ms

T9 : 12ms~14.6ms

Tiiitttllle

offf

Securiiity Clllassiiifiiicatiiion

Compal SecretData

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...

Issued Date

Decipherii ed Date

LA-H131P

Rev

0...4

Power Sequence

Siiize Documenttt Number C

Sheettt 4 46Dattte::: Monday,,, November 05,,, 2018

2018/11/05 2019/11/05

Compal Electronics,Inc.

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APU SM Bus address

EC SM Bus1 address EC SM Bus2 address

Voltage Rails

SIGNAL

STATE

SLP_S3#

SLP_S5#

+VALW +V +VS Clock

Full ON HIGH HIGH ON ON ON ON

S3 (Suspend to RAM) HIGH HIGH ON ON OFF OFF

S4 (Suspend to Disk) LOW HIGH ON OFF OFF OFF

S5 (Soft OFF) LOW LOW ON OFF OFF OFF

SMBUS Control Table

SOURCE

APU BATT EC S ODIMM WLAN

EC_SMB_CK1
EC_SMB_DA1

9022

+3VALW

X V

+3VALW

V

+3VALW

X X

APU_SCLK0
APU_SDATA0

APU

+3VS

X X X V

+3VS

X

EC_SMB_CK2
EC_SMB_DA2

9022

+3VS

V

+1.8VS

X V

+3VALW

X X

BOM STRUCTURE

USB2.0 Port

APU I2C Bus address

Device Address

I2C 3

Touch Pad (Synaptics ) $2C

Touch Pad (Elan)

0X15

Display Port

PORT FUNCTION

0

eDP

1

HDMI

USB3.0 Port (USB_0)

GPP Port

PORT FUNCTION

GPP0

SSD (PCIe x4)

GPP1

GPP2

GPP3

GPP4

Card Reader (PCIe x1)

GPP5

WLAN (PCIe x1)

GPP6

SSD (SATA x1)

GPP7

HDD (SATAx1)

Device

Smart Battery
Charger

Address

0001 011x b
0001 0010 b

HEX

16H
12H

Device Address HEX

SM Bus0

DDR DIMM1

1010 001Xb A2H

Device

APU

Address

1001 100X b

HEX

98H

Power Plane Description S0 S3 S5
VIN Adapter power supply

ON ON ON

B+

AC or battery power rail for power circuit.

ON ON ON

+APU_ CORE

Core voltage for APU

ON

OFF OFF

+APU _CO RE_SOC

Core voltage for APU

ON

OFF OFF

+RT C_APU

RTC power

ON ON ON

+3VALW 3.3V always on powerrail

ON ON ON

+3VS 3.3V switched power rail

ON

OFF OFF

+1.8VALW 1.8V always on powerrail

ON ON ON

+1.8VS 1.8V switched powerrail

ON

OFF OFF

+0.8VALW 0.95V always on power rail

ON ON ON

+0.8VS 0.95V switched power rail

ON

OFF OFF

+1.2V_DDR 1.2V power rail for APU and DDR

ON ON

OFF

+2.5V_MEM 2.5V power rail for DDR

ON ON

OFF

+0.6VS_VTT 0.6V switched power rail for DDRterminator

ON

OFF OFF

+5VALW 5V always on power rail

ON ON ON

+5VS 5V switched power rail

ON

OFF OFF

CARD READER (SUB BOARD)

*Main Source - Realtek
*Substitute - Genesys

PCB

CPU

PORT FUNCT ION

0

Type-C

1

Sub/B USB3.0 Type-A

2

Sub/B USB3.0 Type-A

3

Camera

4

USB2.0 Hub

5

Bluetooth

PORT FUNCT ION

1

Touch Screen

2

Finger Printer

USB2.0 Hub

PORT FUNCT ION

0

Type-C

1

Sub/B USB3.0 Type-A

2

Sub/B USB3.0 Type-A

3
4

BOM STRUCTURE D ESC RIP TIO N

14@

14" Only Components

15@

15" Only Components

OBR@

On Board RAM SKU Only

NO_OBR@

No On Board RAM SKU Only

SDP@

Memory Down - SDP Package

DDP@

Memory Down - DDP Package

SINGLE_MIC@

MIC Select Strap (1 MIC)

MULTI_MIC@

MIC Select Strap (2 MIC)

KBL@

Keyboard Backlight

TYPE2TYPE1

BOM STRUCTURE D ESCRIPTION

Ryzen5_PR@

Ryzen5 CPU (PR Sample)

Ryzen7_PR@

Ryzen7 CPU (PR Sample)

45@

HDMI Logo

14_DAZ_R0@

14" DAZ (Rev0 PCB)

15_DAZ_R0@

15" DAZ (Rev0 PCB)

X4E@

43J X4E Level

X76RAM@

On Board RAM X76 Resistors

S4G_MD@

On Board RAM (Samsung 4GB)

H4G_MD@

On Board RAM (Hynix 4GB)

M4G_MD@

On Board RAM (Micron 4GB)

HDT@

HDT Debugging

EMI@

EMI Components

ESD@

ESD Components

RF@

RF Components

TS@

Touch Screen

BOM STRUCTURE D ESCRIP TIO N

Ryzen3_PC@

Ryzen3 CPU (PC Sample)

Ryzen3_PR@

Ryzen3 CPU (PR Sample)

Ryzen5_PC@

Ryzen5 CPU (PC Sample)

Ryzen7_ES@

Ryzen7 CPU (ES Sample)

Ryzen7_PC@

Ryzen7 CPU (PC Sample)

@

Un-Mount Components

@EMI@

EMI Un-Mount Components

@ESD@

ESD Un-Mount Components

20V_PRTCT@

5448 EXT Voltage Protection

FP@

Finger Printer (Reserved)

ME@

ME Components

EX_THM@

Thermal Sensor

HUB@

USB2.0 HUB

DA_R0@

PCB Part Number (Rev0 PCB)

DA_R1@

PCB Part Number (Rev1 PCB)

14_DAZ_R1@

14" DAZ (Rev1 PCB)

15_DAZ_R1@

15" DAZ (Rev1 PCB)

RD@

USB3.0 Re-Driver BOM

TI@

TI Re-Driver Only

PARADE@

Parade Re-Driver Only

PERICOM@

Pericom Re-Driver Only

X76_TI@

TI Re-Driver X76 Level

X76_PARADE@

Parade Re-Driver X76 Level

X76_PERICOM@

Pericom Re-Driver X76 Level

Tiiitttllle

Sheettt

Securiiity Clllassiiifiiicatiiion

Compal SecretData

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...

Issued Date

Decipherii ed Date

LA-H131P

Rev

0...4

NOTES LIST

Siiize Documenttt Number C

3 offf 46Dattte::: Monday,,, November 05,,, 2018

2018/11/05 2019/11/05

Compal Electronics,Inc.

UC1 Ryzen7_ES@

S IC RYZEN7 2M370SC4T4MFB 2.2G ES APU

SA0000C7610

UC1 Ryzen5_PR@

S IC RYZEN5 YM3500C4T4MFG 2G BGA1140 APU

SA0000CCR20

UC1 Ryzen7_PR@

S IC RYZEN7 YM3700C4T4MFG 2.2G BGA APU

SA0000C7640

X4E EMC

X4EAF938L01

X4E

ZZZ X4E@

ZZZS4G_MD@

UC1 Ryzen7_PC@

S IC RYZEN7 ZM370SC4T4MFG 2.2G QS APU

SA0000C7620

ZZZ DA_R1@

Rev1 PCB

DA60023G010

ZZZ 14_DAZ_R0@

Rev0 DAZ_14

DAZ2GH00100

ZZZ DA_R0@

Rev0 PCB

DA60023G000

UC1 Ryzen3_PC@

S IC RYZEN3 ZM320SC4T2OFG 2.5G QS APU

SA0000CCS00

UC1 Ryzen3_PR@

S IC RYZEN3 YM3200C4T2OFG 2.5G BGA 1140 APU

SA0000CCS20

X76 HYNIX 4GB MD X76 MICRON 4GB MD X76 SAMSUNG 4GB MD

X7680438L51 X7680438L52 X7680438L53

ON BOARD RAM * 4

ZZZ H4G_MD@ ZZZM4G_MD@

ZZZ 14_DAZ_R1@

Rev1 DAZ_14

DAZ2GH00101

HDMI Logo

RO0000003HM

HDMI Logo

ZZZ 45@

ZZZ 15_DAZ_R0@

Rev0 DAZ_15

DAZ2GD00100

UC1 Ryzen5_PC@

S IC RYZEN5 ZM350SC4T4MFG 2G QS BGA APU

SA0000CCR00

ZZZ 15_DAZ_R1@

Rev1 DAZ_15

DAZ2GD00101

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5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

EVENT# pull high

Main Func = CPU

ESD

DDR _B_M A12
DDR _B_M A13

DDR _B_M A11

DDR _B_M A10

DDR_B_MA 6
DDR_B_MA 7

DDR_B_MA 2
DDR_B_MA 3

DDR_B_MA 8

DDR_B_MA 5

DDR_B_MA 4

DDR_B_MA 9

DDR_B_MA 0
DDR_B_MA 1

DDR_B_ DM6

DDR_B_ DM3

DDR_B_ DM5

DDR_B_ DM4

DDR_B_ DM2

DDR_B_ DM7

DDR_B_ DM0
DDR_B_ DM1

DDR _B_DQ 60

DDR _B_DQ 19

DDR _B_DQ 13

DDR _B_DQ 28
DDR _B_DQ 29

DDR _B_DQ 61

DDR _B_DQ 59

DDR _B_DQ 34

DDR _B_DQ 36

DDR_B_ DQ4

DDR_B_ DQ3

DDR _B_DQ 47

DDR _B_DQ 43

DDR _B_DQ 39

DDR _B_DQ 46

DDR _B_DQ 15

DDR _B_DQ 54

DDR_B_ DQ5
DDR_B_ DQ6

DDR _B_DQ 53

DDR_B_ DQ8
DDR_B_ DQ9

DDR _B_DQ 50

DDR _B_DQ 12

DDR _B_DQ 31

DDR _B_DQ 63

DDR _B_DQ 62

DDR _B_DQ 42

DDR _B_DQ 26

DDR _B_DQ 51

DDR_B_ DQ24
DDR_B_ DQ25

DDR_B_ DQ32
DDR_B_ DQ33

DDR_B_ DQ0
DDR_B_ DQ1

DDR _B_DQ 44

DDR_B_ DQ7

DDR _B_DQ 55

DDR_B_ DQ2

DDR _B_DQ 38

DDR _B_DQ 27

DDR _B_DQ 58

DDR _B_DQ 10

DDR _B_DQ 14

DDR_B_ DQ48
DDR_B_ DQ49

DDR _B_DQ 30

DDR _B_DQ 11

DDR _B_DQ 35

DDR _B_DQ 37

DDR _B_DQ 52

DDR _B_DQ 45

DDR_B_ DQ40
DDR_B_ DQ41

DDR_B_ DQ56
DDR_B_ DQ57

DDR _B_DQ 20

DDR _B_DQ 22

DDR _B_DQ 21

DDR _B_DQ 23

DDR_B_ DQ16
DDR_B_ DQ17
DDR _B_DQ 18

DDR _A_M A12
DDR _A_M A13

DDR _A_M A11

DDR _A_M A10

DDR_A_MA 6
DDR_A_MA 7

DDR_A_MA 2
DDR_A_MA 3

DDR_A_MA 8

DDR_A_MA 5

DDR_A_MA 4

DDR_A_MA 9

DDR_A_MA 0
DDR_A_MA 1

DDR_A_ DM6

DDR_A_ DM3

DDR_A_ DM5

DDR_A_ DM4

DDR_A_ DM2

DDR_A_ DM7

DDR_A_ DM0
DDR_A_ DM1

DDR _A_DQ 60

DDR _A_DQ 19

DDR _A_DQ 13

DDR _A_DQ 28
DDR _A_DQ 29

DDR _A_DQ 61

DDR _A_DQ 59

DDR _A_DQ 34

DDR _A_DQ 36

DDR_A_ DQ4

DDR_A_ DQ0

DDR_A_ DQ3

DDR _A_DQ 47

DDR _A_DQ 43

DDR _A_DQ 39

DDR _A_DQ 46

DDR _A_DQ 15

DDR _A_DQ 54

DDR_A_ DQ5
DDR_A_ DQ6

DDR _A_DQ 53

DDR_A_ DQ8
DDR_A_ DQ9

DDR _A_DQ 50

DDR _A_DQ 12

DDR _A_DQ 31

DDR _A_DQ 63

DDR _A_DQ 62

DDR _A_DQ 42

DDR _A_DQ 26

DDR _A_DQ 51

DDR_A_ DQ24
DDR_A_ DQ25

DDR_A_ DQ32
DDR_A_ DQ33

DDR_A_ DQ1

DDR _A_DQ 44

DDR_A_ DQ7

DDR _A_DQ 55

DDR_A_ DQ2

DDR _A_DQ 27

DDR _A_DQ 58

DDR _A_DQ 10

DDR _A_DQ 14

DDR_A_ DQ48
DDR_A_ DQ49

DDR _A_DQ 30

DDR _A_DQ 11

DDR _A_DQ 35

DDR _A_DQ 37

DDR _A_DQ 52

DDR _A_DQ 45

DDR_A_ DQ56
DDR_A_ DQ57

DDR _A_DQ 20

DDR _A_DQ 22

DDR _A_DQ 21

DDR _A_DQ 23

DDR_A_ DQ16
DDR_A_ DQ17

DDR _A_DQ 18
DDR_A_ BG0
DDR_A_ BG1

DDR_A_ ACT#

DDR_B_ BG0
DDR_B_ BG1

DDR_B_ ACT#

DDR_B_ EVENT#

DDR _A_P AR

DDR _B_P ARDDR_A_ EVENT#

DDR_B_ RST#

<13> DD R_B_ MA[1 3..0]

<13> DDR _B_B A0
<13> DDR _B_B A1

DDR _B_DQ [63. .0] < 13>

<12> DD R_A_ MA[1 3..0]

<12> DD R_A _CS0#

<12> DD R_A_ ODT0

<12> DD R_A _CKE0

<12> DDR _A_D QS0
<12> DD R_A_ DQS0#
<12> DDR _A_D QS1
<12> DD R_A_ DQS1#
<12> DDR _A_D QS2
<12> DD R_A_ DQS2#
<12> DDR _A_D QS3
<12> DD R_A_ DQS3#
<12> DDR _A_D QS4
<12> DD R_A_ DQS4#
<12> DDR _A_D QS5
<12> DD R_A_ DQS5#
<12> DDR _A_D QS6
<12> DD R_A_ DQS6#
<12> DDR _A_D QS7
<12> DD R_A_ DQS7#

<12> DDR _A_B A0
<12> DDR _A_B A1

<12> DDR _A_C LK0
<12> DDR _A_C LK0#

DDR _A_DQ [63. .0] < 12>

<12> DDR _A_B G0
<12> DDR _A_B G1

<12> D DR_A _ACT#
<12> D DR_A_DM [7..0]

<12> D DR_ A_W E#
<12> DDR _A_C AS#
<12> DDR _A_R AS#

<12> DD R_A_ RST#

<13> DDR _B_B G0
<13> DDR _B_B G1

<13> D DR_B _ACT#
<13> D DR_B_DM [7..0]

<13> DDR _B_D QS0
<13> DD R_B_ DQS0#
<13> DDR _B_D QS1
<13> DD R_B_ DQS1#
<13> DDR _B_D QS2
<13> DD R_B_ DQS2#
<13> DDR _B_D QS3
<13> DD R_B_ DQS3#
<13> DDR _B_D QS4
<13> DD R_B_ DQS4#
<13> DDR _B_D QS5
<13> DD R_B_ DQS5#
<13> DDR _B_D QS6
<13> DD R_B_ DQS6#
<13> DDR _B_D QS7
<13> DD R_B_ DQS7#

<13> DDR _B_C LK0
<13> DDR _B_C LK0#
<13> DDR _B_C LK1
<13> DDR _B_C LK1#

<13> DDR _B_C S0#
<13> DDR _B_C S1#

<13> DDR _B_C KE0
<13> DDR _B_C KE1

<13> DDR_ B_OD T0
<13> DDR_ B_OD T1

<13> D DR_ B_W E#
<13> DDR _B_C AS#
<13> DDR _B_R AS#

<13> DD R_B _EVEN T#
<13> D DR_B _RST#

<12> DD R_A_ ALER T#

<13> DD R_B_ ALER T#

DDR _A_P AR <12>

DDR _B_P AR <13>

+1.2 V

Tiiitttllle

Siiize DocumentttN umb er

Securiiity Clllassiiifiiicatiiion

Compal Secret Data

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D
DEPARTMENT EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...

Issued Date

Deciphii ered Date

LA-H131P

Re v

0...4

FP5 DDR4 MEMORY I/F

Custtt om

Sheettt 5 o fff46Dattte::: Monday,,, November 05,,, 2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

FP5 REV 0.90
PART 1OF 13

MEMORY A

UC1A

FP5 _BGA 1140 ~D

@

Y24

MA_RE SET_ L

AE24

MA_E VENT_ L

AA25

MA_A LERT_ L

AG24

MA_OD T0

AJ22

MA_OD T1

Y23

MA_C KE0

Y26

MA_C KE1

AJ27

MA_C S_L1

AG21

MA_C S_L0

AE27

MA_C LK_L1

AD24

MA_C LK_L0

AE26

MA_C LK_H1

V23

RSVD _40

AD25

MA_C LK_H0

AW20

MA_D QS_L7

V24

RSVD _41

AV20

MA_D QS_H7

AT23

MA_D QS_L6

AU23

MA_D QS_H6

AN24

MA_D QS_H5

AN25

MA_D QS_L5

AM27

MA_D QS_L4

AM26

MA_D QS_H4

P21

MA_D QS_L3

N26

MA_D QS_L2

R21

MA_D QS_H3

N27

MA_D QS_H2

H26

MA_D QS_L1

H27

MA_D QS_H1

G22

MA_D QS_L0

F22

MA_D QS_H0

T27

RSVD _36

AT21

MA_ DM7

AW25

MA_ DM6

AN27

MA_ DM5

AL24

MA_ DM4

N23

MA_ DM3

N24

MA_ DM2

G27

MA_ DM1

F21

MA_ DM0

AA22

MA_A CT_L

AA21

MA_B G0

AA27

MA_B G1

AF27

MA_B ANK1

AF21

MA_B ANK0

AG26

MA_RA S_L_ ADD 16

AG23

MA_C AS_L_ ADD 15

AG27

MA_W E_L_ ADD1 4

AJ25

MA_A DD13_ BAN K2

AC23

MA_A DD12

AA24

MA_A DD11

AF22

MA_A DD10

AC21

MA_A DD9

AD22

MA_A DD8

AC27

MA_A DD7

AD21

MA_A DD6

AC26

MA_A DD5

AC24

MA_A DD4

AD27

MA_A DD2

AE21

MA_A DD3

AE23

MA_A DD1

AF25

MA_A DD0

MA_ PAR OUT

AF24

RSV D_34

T24

RSV D_35

T25

RSVD _51

W25

RSVD _52

W27

RSVD _27

R26

RSVD _28

R27

RSVD _43

V27

RSVD _42

V26

MA_D ATA63

AR20

MA_D ATA62

AT20

MA_D ATA61

AN22

MA_D ATA59

AN20

MA_D ATA60

AR22

MA_D ATA58

AP21

MA_D ATA57

AU21

MA_D ATA56

AW21

MA_D ATA55

AT22

MA_D ATA54

AW23

MA_D ATA53

AV27

MA_D ATA52

AU26

MA_D ATA50

AV22

MA_D ATA51

AW22

MA_D ATA49

AV25

MA_D ATA48

AW26

MA_D ATA46

AP24

MA_D ATA47

AP23

MA_D ATA45

AL21

MA_D ATA44

AL22

MA_D ATA43

AU27

MA_D ATA42

AR25

MA_D ATA41

AM21

DDR _A_DQ 41

MA_D ATA40

AM23

DDR _A_DQ 40

MA_D ATA39

AP27

MA_D ATA38

AM24

DDR _A_DQ 38

MA_D ATA37

AK24

MA_D ATA36

AK26

MA_D ATA35

AR27

MA_D ATA34

AP26

MA_D ATA33

AL25

MA_D ATA32

AL27

MA_D ATA31

T21

MA_D ATA30

R23

MA_D ATA29

M20

MA_D ATA28

L21

MA_D ATA27

V21

MA_D ATA26

T22

MA_D ATA25

N21

MA_D ATA24

M22

MA_D ATA23

P25

MA_D ATA22

P24

MA_D ATA21

M24

MA_D ATA20

L27

MA_D ATA19

R24

MA_D ATA18

P27

MA_D ATA17

M27

MA_D ATA16

M25

MA_D ATA15

K27

MA_D ATA14

K25

MA_D ATA13

F25

MA_D ATA12

L23

MA_D ATA11

L26

MA_D ATA10

L24

MA_D ATA9

F26

MA_D ATA8

G25

MA_D ATA6

J22

MA_D ATA7

J23

MA_D ATA5

F20

MA_D ATA4

G20

MA_D ATA3

H23

MA_D ATA1

H21

MA_D ATA2

F23

MA_D ATA0

J21

CC97
100 P_04 02

1

2

@ES D@

_50 V8J

RC1 1

2 1K_ 0402 _5%

DDR _B_E VENT#

RC2 1 O BR@ 2 1K _04 02_5%

DDR _A_E VENT#

FP5 REV 0.90
PART 9OF 13

MEMORY B

UC1I

FP5 _BGA 1140 ~D

@

T31

MB_RE SET_ L

AG29

MB_E VENT_ L

AL29

MB1_O DT0

AM30

MB1_O DT1

W30

MB_A LERT_ L

AM32

MB0_O DT1

V32

MB1_C KE0

U31

MB1_C KE1

AL31

MB0_O DT0

T30

MB0_C KE1

U29

MB0_C KE0

AJ29

MB1_C S_L0

AM29

MB1_C S_L1

AM31

MB0_C S_L1

AJ31

MB0_C S_L0

AE30

MB_C LK_ H2

AE32

MB_C LK_ L2

AF29

MB_C LK_ H3

AF31

MB_C LK_L3

AD31

MB_C LK_L1

AD29

MB_C LK_H1

N31

RSVD _20

N29

RSVD _18

AC31

MB_C LK_H0

AD30

MB_C LK_L0

BC22

MB_D QS_H7

BA22

MB_D QS_L7

BA25

MB_D QS_L6

BC25

MB_D QS_H6

AW29

MB_D QS_L5

AR31

MB_D QS_L4

AW30

MB_D QS_H5

AR29

MB_D QS_H4

K29

MB_D QS_L3

K31

MB_D QS_H3

F29

MB_D QS_H2

F30

MB_D QS_L2

B25

MB_D QS_L1

D25

MB_D QS_H1

B22

MB_D QS_L0

D22

MB_D QS_H0

N32

RSVD _21

BD22

MB_ DM7

BB26

MB_ DM6

AW31

MB_ DM5

AP30

MB_ DM4

K30

MB_ DM3

E32

MB_ DM2

C25

MB_ DM1

C21

MB_ DM0

V30

MB_A CT_L

V29

MB_B G1

V31

MB_B G0

AG32

MB_B ANK1

AH31

MB_B ANK0

AJ30

MB_RA S_L_ ADD 16

AK32

MB_C AS_L_ ADD 15

AK30

MB_W E_L_ ADD1 4

AL30

MB_A DD13_ BAN K2

W31

MB_A DD12

Y32

MB_A DD11

AH29

MB_A DD10

W29

MB_A DD9

AA31

MB_A DD8

Y30

MB_A DD7

AA29

MB_A DD6

AA30

MB_A DD5

AB31

MB_A DD4

AB29

MB_A DD3

AC32

MB_A DD1

AC30

MB_A DD2

AG30

MB_A DD0

MB_ PAR OUT

AG31

RSV D_19

N30

RSV D_26

P31

RSV D_29

R32

RSV D_16

M30

RSV D_15

M29

RSV D_25

P30

RSVD _24

P29

RSVD _17

M31

MB_D ATA63

BA21

MB_D ATA62

BB21

MB_D ATA61

BA23

MB_D ATA60

BB23

MB_D ATA58

BC21

MB_D ATA59

BD20

MB_D ATA57

BB22

MB_D ATA56

BC23

MB_D ATA54

BB25

MB_D ATA55

BD25

MB_D ATA53

BB27

MB_D ATA52

BD28

MB_D ATA51

BC24

MB_D ATA49

BC27

MB_D ATA50

BA24

MB_D ATA48

BA27

MB_D ATA47

AY29

MB_D ATA45

AU31

MB_D ATA46

AY32

MB_D ATA44

AU30

MB_D ATA43

BA28

MB_D ATA42

BB30

MB_D ATA40

AU29

MB_D ATA41

AV30

MB_D ATA39

AT31

MB_D ATA38

AR30

MB_D ATA36

AN30

MB_D ATA37

AP31

MB_D ATA35

AU32

MB_D ATA34

AT29

MB_D ATA33

AP32

MB_D ATA32

AP29

MB_D ATA31

L32

MB_D ATA30

L30

MB_D ATA29

H32

MB_D ATA28

H30

MB_D ATA27

L31

MB_D ATA26

L29

MB_D ATA25

J31

MB_D ATA24

J29

MB_D ATA23

G30

MB_D ATA22

F31

MB_D ATA21

D28

MB_D ATA20

A28

MB_D ATA19

H31

MB_D ATA18

H29

MB_D ATA17

E29

MB_D ATA16

C30

MB_D ATA14

C26

MB_D ATA15

B27

MB_D ATA13

B24

MB_D ATA12

C23

MB_D ATA11

C27

MB_D ATA10

D27

MB_D ATA9

A25

MB_D ATA8

D24

MB_D ATA7

C22

MB_D ATA6

A22

MB_D ATA5

C20

MB_D ATA4

A20

MB_D ATA3

D23

MB_D ATA2

B23

MB_D ATA0

B21

MB_D ATA1

D21

5

5

4

4

3 2 1

1

D D

C C

B B

A A

Main Func = CPU

CardReader

WLAN

Main_SSD

Main_SSD

CardReader

WLAN

NGFF_SATA

SATA HDD

NGFF_SATA

SATA HDD

SATA_ARX_DTX_P0
SATA_ARX_DTX_N0

PCIE_ARX_DTX_P4
PCIE_ARX_DTX_N4

PCIE_ARX_DTX_P5
PCIE_ARX_DTX_N5

PCIE_ARX_DTX_P3
PCIE_ARX_DTX_N3

PCIE_ARX_DTX_P2
PCIE_ARX_DTX_N2

PCIE_ARX_DTX_P[0..3]
PCIE_ARX_DTX_N[0..3]

SATA_ATX_DRX_P0
SATA_ATX_DRX_N0

PCIE_ATX_C_DRX_P[0..3]
PCIE_ATX_C_DRX_N[0..3]

PCIE_ARX_DTX_P1
PCIE_ARX_DTX_N1

PCIE_ARX_DTX_P0
PCIE_ARX_DTX_N0

SATA_ARX_DTX_P1
SATA_ARX_DTX_N1

SATA_ATX_DRX_P1
SATA_ATX_DRX_N1

<17> PCIE_ARX_DTX_P[0..3]
<17> PCIE_ARX_DTX_N[0..3]

PCIE_ATX_C_DRX_P[0..3] <17>
PCIE_ATX_C_DRX_N[0..3] <17>

SATA_ATX_DRX_P0 <17>
SATA_ATX_DRX_N0 <17>

PCIE_ATX_C_DRX_P4 <20>
PCIE_ATX_C_DRX_N4 <20>

PCIE_ATX_C_DRX_P5 <16>
PCIE_ATX_C_DRX_N5 <16>

<20> PCIE_ARX_DTX_P4
<20> PCIE_ARX_DTX_N4

<16> PCIE_ARX_DTX_P5
<16> PCIE_ARX_DTX_N5

<17> SATA_ARX_DTX_P0
<17> SATA_ARX_DTX_N0

<19> SATA_ARX_DTX_P1
<19> SATA_ARX_DTX_N1

SATA_ATX_DRX_P1 <19>
SATA_ATX_DRX_N1 <19>

Title

Size

Document Number

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THEINFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3 2

Issued Date

Deciphered Date

LA-H131P

Rev

0.4

FP5 PCIE/UMI

Custom

6 46Monday, November 05, 2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

2 0.1U_0201_10V6K
2 0.1U_0201_10V6K

FP5 REV 0.90
PART 2 OF 13

PCIE

FP5_BGA1140~D

UC1B @

R10

P_ GP P _R X N7/ S ATA _ RX N1

R9

P_ GP P _R XP 7/ S AT A_ RX P1

R7

P_ GP P _R XN 6/ SA TA _ RX N0

R6

P_ GP P _R XP 6/ S AT A_ RX P0

T9

P_ GP P _R X N5

T8

P_ GP P _R XP 5

V7

P_ GP P _R X N4

V6

P_ GP P _R XP 4

P11

P_ GP P _R X N3

P12

P_ GP P _R XP 3

M11

P_ GP P _R X N2

L12

P_ GP P _R XP 2

L9

P_ GP P _R X N1

L10

P_ GP P _R XP 1

N9

P_ GP P _R X N0

N10

P_ GP P _R XP 0

G8

P_ GF X _R XP 7

F8

P_ GF X _R XN 7

G6

P_ GF X _R XP 6

F7

P_ GF X _R XN 6

H6

P_ GF X _R XP 5

H7

P_ GF X _R XN 5

K11

P_ GF X _R XP 4

J11

P_ GF X _R XN 4

L6

P_ GF X _R XP 3

L7

P_ GF X _R XN 3

M8

P_ GF X _R XP 2

M9

P_ GF X _R XN 2

N6

P_ GF X _R XP 1

N7

P_ GF X _R XN 1

P9

P_ GF X _R XN 0

P8

P_ GF X _R XP 0

P_ GPP _T XN 7/S AT A_ TX N1

U4

P_ GPP _T XP 7/ SA TA_ TX P1

U2

P_ GPP _T XN 6/S AT A_ TX N0

V3

P_ GPP _T XP 6/ SA TA_ TX P0

V1

P_ GP P _T XP
P_ GP P _T XN 5

V2

5

W3

PCIE_ATX_DRX_P5

CC11 1

P_ GPP_TX N

4

W4

PCIE_ATX_DRX_N4

CC10 1

P_ GP P _T XP 4

W2

PCIE_ATX_DRX_P4

CC9 1

P_ GP P _T XP 3

T4

P_ GP P _T XN 3

T2

P_ GP P _T XP 2

R3

P_ GP P _T XN 2

R1

P_ GP P _T XP 1

P4

P_ GP P _T XN 1

P2

P_ GP P _T XN 0

P3

P_ GP P _T XP 0

N2

P_ GF X _T XP 7

H2

P_ GF X _T XN 7

H4

P_ GF X _T XP 6

H1

P_ GF X _T XN 6

H3

P_ GF X _T XP 5

J2

P_ GF X _T XN 5

J4

P_ GF X _T XP 4

K2

P_ GF X _T XN 4

K4

P_ GF X _T XP 3

L1

P_ GF X _T XN 3

L3

P_ GF X _T XP 2

L2

P_ GF X _T XN 2

L4

P_ GF X _T XP 1

M2

P_ GF X _T XN 1

M4

P_ GF X _T XN 0

N3

P_ GF X _T XP 0

N1

PCIE_ATX_DRX_N5

CC12 1

2 0.1U_0201_10V6K
2 0.1U_0201_10V6K

PCIE_ATX_DRX_P1

CC3 1

PCIE_ATX_DRX_N1

CC4 1

PCIE_ATX_DRX_P3

CC7 1

PCIE_ATX_DRX_P0

CC1 1

PCIE_ATX_DRX_N3

CC8 1

PCIE_ATX_DRX_N0

CC2 1

PCIE_ATX_DRX_P2

CC5 1

PCIE_ATX_DRX_N2

CC6 1

2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P0
2 0.22U_0402_6.3V6K

PCIE_ATX_C_DRX_N0

2

0.22U_0402_6.3V6K

PCIE_ATX_C_DRX_P1

2 0.22U_0402_6.3V6K

PCIE_ATX_C_DRX_N1

2

0.22U_0402_6.3V6K

PCIE_ATX_C_DRX_P2

2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_N2
2

0.22U_0402_6.3V6K

PCIE_ATX_C_DRX_P3

2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_N3

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

DP0: eDP
DP1: HDMI
DP2: N/A
DP3: N/A

HDT+ (debug + HDT@)

Main Func = CPU

HDMI

eDP

HDMI

eDP

+LCDVDD_CONN PWR switch enable pinVIH=1.2V

ESD

Reserve for sequence tuning

APU_TMS

APU_TDO

APU_TCK

APU_TMS

APU_TDI

APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRS T#
APU _DBR EQ#

INVT PW M

ENV DD

ENB KL_R

APU_TEST31

APU_PW RG D

APU_RS T#

APU_TDI

APU_TCK

INVT PW M_R

ENB KL_R

APU _VDD P_RUN _FB_ H

APU _VDD _RUN_ FB_L
APU_VDDP _RUN_FB _L

APU_TEST470
APU_TEST471

APU_TEST41

APU_TEST31

APU_TEST17

APU_TEST16

APU_TEST14
APU_TEST15

APU_TEST6

APU_TEST5

APU_TEST4

DP_ STER EOSY NC

APU _RST #
APU_PW RG D

APU_AL ERT#

APU_TDI

APU _DBR EQ#

APU_TRST#_RAPU_TRS T#

APU_TEST16
APU_TEST17

APU_TEST14
APU_TEST15

INVT PW M_R
EDP _HPD

ENBKL

CORETYPE

SMU_ ZVDDP

SMU_ ZVDDP

ENB KL_R

APU_RS T#

INVT PW M_R

INVT PW M <14 >

<15> AP U_D P1_P2
<15> AP U_DP 1_N2

<15> AP U_D P1_P3
<15> AP U_DP 1_N3

<15> AP U_D P1_P0
<15> AP U_DP 1_N0

<15> AP U_D P1_P1
<15> AP U_DP 1_N1

<14> EDP _TX P0
<14> EDP _TXN 0

<14> EDP _TX P1
<14> EDP _TXN 1

EDP _AUX N <14>
EDP _HPD <14>

APU _DP1 _CTRL _CLK <15>
APU _DP1 _CTRL _DAT <15>

APU _DP1 _HPD < 15>

<38> AP U_S VC
<38> AP U_S VD
<38> AP U_SV T

<38> AP U_P WR GD

<28> E C_THERMTR IP#

<28 ,38> H_P ROCHO T#

APU _VDD P_RUN _FB_ H < 37>
APU _VDD SOC_ SEN < 38>
APU _VDD CR_SE N <38 >

ENB KL <1 4,2 8>

ENV DD
INVT PW M_R

ENV DD < 14>

<28> A PU_ RST#_ EC

<26 ,28> E C_SMB _CK2

<26 ,28> E C_SMB _DA2

APU _VDD _RUN_ FB_L < 38>
APU _VDD P_RUN _FB_ L <37>

+3V S

+1.8 VALW

+1.8 VS

+3V S

+1.8 VS

+1.8 VALW

+1.8 VS

+1.8 VS

+1.8 VS

+3VALW

+0.8 VS

+1.8 VS

+3V S

+1.8 VS

Tiiitttllle

Securiiity Clllassiiifiiicatiiion

Compal Secret Data

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D
DEPARTMENT EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...

Issued Date

Deciphii ered Date

LA-H131P

Re v

0...4

FP5 DISP/MISC/HDT

Siiize Documenttt Numbe r

Custttom

Sheettt 7 o fff 46Dattte::: Monday,,, November 05,,, 2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

RC4

1

2 4.7 K_0 402_5%

T15

APU _DBR EQ#

RHDT5 1 HD T@

RHDT81 HDT@ 2 10 K_04 02_5%

RC15 1 @ 2 1K _04 02_5%

APU_TRS T#

RHDT1 1 HDT@

RHDT71 HDT@ 2 10 K_04 02_5%

JHDT1

SAMTE_ASP-1 3644 6-07-B

DC0 21004 270

ME@

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

RC1 112 @ 1 0_0 402_5 %

RC31 1 2 1K _04 02_5%

APU _ALE RT#

RC28

1 2 1K _04 02_5%

H_PROC HOT#

RC5

1

2 2.2 K_04 02_5%

FP5 REV 0.90
PART 3OF 13

DISPLAY/ SVI2/JT AG/TES T

FP5 _BGA 1140 ~D

UC1 C @

J16

SVD0
SVT0

F16

SVC0

H16

L19

PROCH OT_L

AP16

THERM TRIP _L

J14

SID

J15

ALERT _L

H14

SIC

AW2

PW ROK

AW4

RESE T_L

AW3

DBRE Q_L

AV3

TRST_L

AU1

TCK

AU3

TMS

AU4

TDO

AU2

TDI

F2

DP1_ TXN3

F4

DP1_ TXP3

E4

DP1_ TXN2

F3

DP1_ TXP2

C1

DP1_ TXN1

E1

DP1_ TXP1

D5

DP1_TX N0

E6

DP1_ TXP0

C6

DP0_ TXP3

D6

DP0_ TXN3

B6

DP0_ TXP2

C7

DP0_ TXN2

B8

DP0_ TXN1

D8

DP0_ TXP1

A8

DP0_ TXN0

C8

DP0_ TXP0

AM11

VSS_ SENS E_B

J18

VSS_ SENS E_A

VDD CR _SE NSE

K18

VDDC R_SO C_S ENSE

J19

VDDP _SEN SE

AN11

CORETY PE

AW11

CORETYPE

SMU_ZV DD

V4

TEST4 71

AK21

TEST4 70

AJ21

TEST4 1

AR11

TEST3 1

W24

TEST1 6

F18

TEST1 7

F19

TEST1 5

H19

TEST1 4

G18

TEST6

F13

TEST5

AN14

TEST4

AP14

RSVD _2

F10

DP_S TERE OSY NC

K15

RSVD _4

F14

RSVD _3

F12

DP3_A UXP

J10

DP3_A UXN

H10

DP3_HPD

K8

H12
K13

DP2_A UXN

DP2_HP D

DP1_ AUXP

G11

DP1_ AUXN

F11

DP1_ HPD

G13

DP2_ AUXP

J12

DP0_ AUXN

B9

DP0_ HPD

C10

DP0_ AUXP

D9

EDP _AUX P <1 4>

DP_D IGON

F15

DP_V ARY_ BL

L14

DP_B LON

G15

QC1

LBSS139WT1 G_S C70-3

SB0 0001 GC00

Gate

2

Source

3

Drain

1

RHDT91 HDT@ 2 10 K_04 02_5%

UC22
74A UP1G 07GW _SC70 -5

SA000 07W E00

@

NC

1

A

2

3

Y

4

G P

5

T9

UC6
74A UP1G 07GW _SC70 -5

SA0 0005 U600

1

NC
A

2

3

Y

4

G P

5

RC6

1

2 100 K_0 402_5%

RC9 1

T16

RC11 1 @

RC30 1 @ 2 220_ 0402 _5%

APU _PW RGD

RC8

1

2 100 K_0 402_5%

DP_ STER EOSY NC

RC17 1

2 1K _040 2_5%

QC4

LBSS139WT1 G_S C70-3

SB0 0001 GC00

@

2

3

Gate

Drain

Source

1 IN VTPW M

RC10 1

2 100 K_0 402_5%
2 100 K_0 402_5%

T3

@

CHDT1 1 2 0 .01 U_04 02_16 V7K

ESD @ CC1 7 1

RC12 1 @
RC13 1 @

T8

T10
T11

RC24 1 2 3 00_ 0402_ 5%

APU _RST #

RC25

1 2 30 0_04 02_5%

APU_P WRGD

T1
T2

RC14 1 @

2

10K _040 2_5%

2

10K _040 2_5%

2

10K _040 2_5%

2

10K _040 2_5%

RC21 1 @ 2 0_0 402_ 5% THERMTRIP #

HDT@

APU _DBR EQ#

CHDT2 1

2 0.0 1U_0 402_1 6V7K

RHDT2 1 HDT@

T4
T5
T6
T7

RC22 1 2 196 _040 2_1%

ESD @ CC 18 1
ESD @ CC 19 1

2

100 P_04 02_50V 8J

H_P ROCH OT#

2

100 P_04 02_50V 8J

APU _PW RGD

2

100 P_04 02_50V 8J

APU _RST #

RC18 1 @ 2 1 K_0 402_5 %

HDT@

APU_TRS T#

CHDT3 1 2 0.0 1U_0 402_1 6V7K

RC23 1 @ 2 1 K_0 402_5%

RHDT3 1 HDT@

RC16 1 @ 2 1K _04 02_5%

RHDT61 HDT@ 2 33_ 0402 _5%

T12
T13
T14

RHDT4 1 HDT@

2

1K_ 0402 _5%

2

1K_ 0402 _5%21K_ 0402 _5%21K_ 0402 _5%21K_ 0402 _5%

RC29 1 2 1K _04 02_5% THE RMTRIP#

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Main Func = CPU

ESD

EMI

STRAPS

STRAPS

DEFINITION

SPI_CLK

1 : Use 48 MHZ Crystal Cl ock and Gene rate both internal
and external clocks (Default)

0 : Use 10 0MHZ PCIE clock as reference clock
and generate inter nal clocks o nly

SYS_RST#

1 : Normal reset m ode (Default) 0
: short reset mode

Not Implemented Need Pull down by SW

(

( )

( )

)

( )

___

(

( )

( )

)

Capaci

t

y

Description

WITHOUT ON-BOARD RAM

AGPIO11
MEM ID2

AGPIO9
MEM ID1

AGPIO6
MEM ID0

0 0 0

4GB

N/A 0 0 1

N/A 0 1 0

N/A 0 1 1

N/A 1 0 0

SAMSUNG 2666MHz K4A8G165WC-BCTD 1 0 1

MICRON 2666MHz MT40A512M16LY-075:E 1 1 0

HYNIX 2666MHz H5AN8G6NCJR-VKC 1 1 1

Function

MODEL ID

_

( )

S340-14

AGPIO69

0

S340-15 1

( )

Capaci

t

y

Description

WITHOUT ON-BOARD RAM

X76

N/A

PART NUMBER R1

N/A

PART NUMBER R3

N/A

4GB

SAMSUNG 2666MHz K4A8G165WC-BCTD X7680438L53 SA0000B6F00 SA0000B6F10

MICRON 2666MHz MT40A512M16LY-075:E X7680438L52 SA0000ARD20 SA0000ARD30

HYNIX 2666MHz H5AN8G6NCJR-VKC X7680438L51 SA0000BMN00 SA0000BMN10

N/A N/A N/A N/A

N/A N/A N/A N/A

N/A N/A N/A N/A

N/A N/A N/A N/A

_

( )

ON BOARD RAM ID

No On Board RAM Straps (NO_OBR@)

HDA_BIT_C LK

APU_ FCH_ PWRGD _R

SYS _PWRG D_EC

EC_RSMR ST#

SYS_RESET#

EC_RSMR ST#

PBTN_OUT#

SYS_RESET#
APU_PCIE _WAKE#

PM_SLP _S5#

HDA_BIT_ CLK
HDA_SDIN0

HDA_RST#
HDA_SYNC

HDA_SPKR

APU_PCIE0 _RST#
APU_PCIE1 _RST#

APU_PCIE _RST#_R

PM_SLP _S3#

I2C_2_SCL
I2C_2_SDA

MEM_ID 2

MEM_ID 0
MEM_ID 1

APU_PCIE _RST#_R

APU_PCIE _WAKE#

HDA_SYNC

HDA_BIT_ CLK
HDA_ SDOUT

HDA_RST#
HDA_SDIN0

SYS_RESET#

PCIE_D ET
PBTN_OUT#

MEM_ID 1

PCIE_DET
MEM_ID0

MEM_ID 2

I2C_3_SCL
I2C_3_SDA

MODEL_I D

MIC_SE LECT

MODEL_I D

I2C_3_SCL

I2C_3_SDA

I2C_3_SCL

I2C_2_SCL
I2C_2_SDAI2C_2_SDA_R

I2C_2 _SCL_R

<28> S YS_P WRGD _EC

<28> PB TN_O UT#

<28> PM_SL P_S3#

<28,3 3,36> PM_S LP_S5#

HDA_ SPKR <21>

<21> HDA_S DIN0

EC_RSMR ST# <28 >

APU_PCIE _RST# < 16,17, 20>

<21> HDA_BITC LK_AUDIO
<21> HDA_ SDOUT_AUDIO
<21> HD A_SYNC_AUDI O

<9> APU_SP I_CLK_ R

PCIE_D ET <17>

TP_INT# <27>

<27> I2C _3_SCL _R

I2C_2 _SCL <13>
I2C_2 _SDA <13>

<27> I2C _3_SDA_ R

+3VALW +3VALW

+3VALW

+1.8VALW

+3VALW

+3VALW

+3VS

+1.8VAL W +3VALW

+3VS

+3VS

Tiiitttllle

Siiize Documenttt Numberrr

SecuriiityClllassiiifiiicatiiion

Compalll Secret Data

LA-H131P

Re v

0...4

FP4 GPIO/AZ/MISC/STRAPS

Custttom

Sheettt 8 o fff 46Dattte::: Monday,,, Novemberrr 05,,,2018

Issued Date

2018/1// 1/0// 5

DeciiipheredDatett

2019///11///05

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND TRADE
SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT EXCEPT AS
AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIITCONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,,IIINC...

Compal Electronics, Inc.

Not Implemented Need Pull down by SW

T23

@

CC2 6

0.1U_0 201_1 0V6K

1

2

RC5 9
10K_0402_5%

1 2

T24

RC6 0
10K_0402_5%

1 2

RC117 1 @ 2 0_0402_5%

RC7 2
10K_0402_5%

12

RC6 5
2K_0402_5%

@

12

RC4 8 1 @ 2 10K _0402 _5%

RC6 6
2K_0402_5%

@

12

RC7 3 1 @ 2 0_0402_5%

2 1 0K_040 2_5%

2 2 .2K_04 02_5%

QC3 A
2N70 02KD W2N SC 88-6

SB000 00EO00

61

2

UC7

74AUP1G0 7GW_S C70-5

SA0000 7WE00

@

NC

1

A

2

3

Y

4

G P

5

RC5 0 1 2 1K_ 0402_ 5%

RC6 1 1
RC6 2 1

2 2 .2K_04 02_5%

RC6 8 1 2 33_0402_5%
RC6 9 1 2 33_0402_5%

RC3 8
10K_0402_5%

X76RAM@

1 2

RC112
10K_0402_5%

15@

1 2

1 2

RC5 3 1 @ 2 10K _0402 _5%

RC3 9
10K_0402_5%

X76RAM@

1 2

RC5 4 1 @ 2 10K _0402 _5%

RC6 7 1 EMI@ 2 33_0402_5%

RC118 1 @ 2 0_0402_5%

150 P_0 402 _50V 8J

@

CC2 1

1

2

RC115
10K_0402_5%

14@

1 2

FP5REV 0.90
PART 4 OF13

ACPI/AUDIO/I2C/GPIO/MISC

FP5_B GA1140~D

UC1D @

AT2

SW_MCLK/TDM_BCLK_BT

AT4

SW_DATA0/TDM_DOUT_BT

AR6

AGPIO7/FCH_ACP_I2S_SDIN_BT

AP6

AGPIO8/FCH_ACP_I2S_LRCLK_BT

HDA_ SDOUT

AR3

AZ_SDOUT/TDM_FRM_PLAYBACK

AR4

AZ_SYNC/TDM_FRM_MIC

AP3

AZ_RST_L/SW_DATA1A/SW_DATA 3/TDM_DATA_MIC

check list discuss unconnected if no used

AP4

AZ_SDIN2/SW_DATA2/TDM_DATA _PLAYBACK

AP7

AZ_SDIN0/CODEC_GPI

AP1

AZ_SDIN1/SW_DATA1B/TDM_BCL K_PLAYBACK

AR2

AZ_BITCLK/TDM_BCLK_MIC

AW 8

EGPIO42

AT10

AC_PRES/AGPIO23

AN6

LLB_L/AGPIO12

AR8

S0A3_GPIO/AGPIO10

AT14

SLP_S5_L

AV13

SLP_S3_L

AP10

SYS_RESET_L/AGPIO1

AV11

WAKE_L/AGPIO2

APU_ FCH_ PWRGD _R

AV6

PWR_GOOD

AR15

PWR_BTN_L/AGPIO0

BB6

PCIE_RST1_L/EGPIO27

AT16

RSMRST_L

BD5

PCIE_RST0_L/EGPIO26

FANOUT0/AGPIO85

AT18

FANIN0/AGPIO84

AR18

3.3VS input

GENINT1_L/AGPIO89

AW16

3.3VS input

GENINT2_L/AGPIO90

BD15

3.3VS Output

SPKR/AGPIO91

AU16

BLINK/AGPIO11

AV8

INTRUDER_ALERT

AU14

3.3VALW input

AGPIO69

AW13

3.3VS input

AGPIO86

AW15

3.3VALW input

AGPIO40

AU6

3.3VALW input

AGPIO9

AU7

3.3VALW input

AGPIO6/DEVSLP1

AU10

SATA_ACT_L/AGPIO130

AV15

AGPIO5/DEVSLP0

AP9

AGPIO4/SATAE_IFDET

AW10

AGPIO3

AT15

PSA_I2C_SCL

L16

PSA_I2C_SDA

M16

I2C3_SDA/AGPIO20/SDA1

AM10

I2C_3 _SDA

I2C3_SCL/AGPIO19/SCL1

AM9

I2C2_SDA/EGPIO114/SDA0

BA20

I2C2_SCL/EGPIO113/SCL0

BC20

I2C1_SCL/SFI1_I2C_SCL/EGPIO149

AN8

I2C1_SDA/SFI1_I2C_SDA/EGPIO150

AN9

I2C0_SCL/SFI0_I2C_SCL/EGPIO151

AR13

I2C0_SDA/SFI0_I2C_SDA/EGPIO152

AT13

AGPIO39/SFI_S5_AGPIO39

AU12

EGPIO41/SFI_S5_EGPIO41

AW12

Function MIC SELECT

AGPIO84

1 MIC 0

2 MIC 1

+3VS

RC113
10K_0402_5%

MULTI_MIC@

MIC_SE LECT

RC116
10K_0 402_5 %

SINGL E_MIC@

1 2

RC5 6 1
RC5 7 1

2 2.2 K_0402 _5%
2 2.2 K_0402 _5%

RC3 7
10K_0402_5%

X76RAM@

1 2

RC4 3
10K_0402_5%

X76RAM@

1 2

UC8

@

MC74VHC1 G08DFT2 G S C70 5P

SA0000 0OH00

B

2

A

1

Y

4

P

5

G

3

@ES D@

CC2 4 1 2 10 0P_040 2_50V8J

RC4 2
10K_0402_5%

X76RAM@

1 2

T21

150 P_0 402 _50V 8J

1

2

CC2 0

RC3 6 1 2 22K _0402_ 5%

RC64 2 @ 1 0_0402_5%

RC4 5 1
RC4 7 1

2 1 0K_040 2_5%

RC3 4 1 2 33_0402_5%
RC3 5 1 @ 2 33_0402_5%

RC41 NO_OB R@
10K_0 402_5 %

RC42 NO_OB R@
10K_0 402_5 %

RC4 3 NO_O BR@
10K_0 402_5 %

ESD @

CC2 3 1 2 10 0P_040 2_50V8J

T22

RC4 1
10K_0402_5%

X76RAM@

1 2

QC3 B
2N70 02KD W2N SC 88-6

SB000 00EO00

3

5

4

RC7 0 1
RC7 1 1

2 1K_ 0402_5 %
2 1K_ 0402_ 5%

1

CC2 2

0.1U_0 201_1 0V6K

2

RC5 5

8.2K _0402_5%

12

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Main Func = CPU

32.768KHz CRYSTAL

48MHz CRYSTAL

USB3.1 Type-A Po rt 2

USB3.1 Type-A Po rt 1

Type-A left port2

EMI

SPI ROM (XMC)

EMI

Type-A left port1

NGFF _BT

EMI

Came ra

USB3.1 Type- C

USB2.0 Hub

Main_SS D

CardReader

WLAN

TYPEC Right

Vendor Tuning Va lue was 3.9pF, Lack Source

48M_X1

48M_X2

LPC_AD0 _R
LPC_AD1 _R
LPC_AD2 _R
LPC_AD3 _R

32K_X2

32K_X1

LPC_CL K0

LPCP D#

LPC_RS T#

USB3_ARX _DTX_P2

USB3_ATX_ DRX_P2

USB20_P 1
USB20_N1

USB20_P 2
USB20_N2

RTC_CLK

USB_ OC0#
USB_ OC1#

KB_RST#

USB_ OC0#
USB_ OC1#

LPC_RS T#

APU_SPI_ MOSI
APU_SPI_ MISO
APU_SPI_ WP#
APU_SPI_HOLD#
APU_SPI_ CS1#

APU_SPI_ CLK

32K_X1

32K_X2

CLKRE Q_SSD1#
CLK REQ_S D#
CLKRE Q_W LAN#

USB3_ARX _DTX_P1

USB20_P 5
USB20_N5

USB20_P 3
USB20_N3

USB20_P 4
USB20_N4

USB20_P 0
USB20_N0

CLK_PC IE_SSD1 #

CLK_PC IE_SSD1

CLK_PC IE_SD
CLK_PC IE_SD#

CLK_PC IE_WL AN#

CLK_PC IE_WL AN

CLKRE Q_SSD1#
CLKRE Q_SD#
CLKRE Q_W LAN#

APU_BT_OF F#

SERIRQ <28>
LPC_FR AME# < 28>

LPC_RS T#_R <2 8>

USB3_ARX _DTX_N2 <20 >

USB3_ATX_ DRX_P2 <20>

USB3_ATX_ DRX_N2 <2 0>

<20> USB20 _P1
<20> USB2 0_N1

<20> USB20 _P2
<20> USB2 0_N2

<16> R TC_CLK_ R

KB_RST# <28>

EC_SCI # <28>

<20> USB_ OC0 #
<20> USB_ OC1 #

APU_SPI_ CLK_R <8 >

UART_0_ARX D_DTXD <16 >
UART_0_ATX D_DRXD <16 >

USB3_ATX_ DRX_P1 <20>
USB3_ATX_ DRX_N1 <2 0>

<16> USB20 _P5
<16> USB2 0_N5

LPC_AD0 <2 8>
LPC_AD1 <2 8>
LPC_AD2 <2 8>
LPC_AD3 <2 8>
LPC_CL K0_EC <28>
CLK RUN# <2 8>

<14> USB20 _P3
<14> USB2 0_N3

<22> USB20 _P4
<22> USB2 0_N4

<25> USB20 _P0
<25> USB2 0_N0

<17> CL K_PCIE_ SSD1
<17> CL K_PCIE_ SSD1#

<20> CLK _PCIE_ SD
<20> CLK _PCIE_ SD#

<16> CL K_PCIE_ WLAN
<16> CL K_PCIE_ WLAN#

<17> C LKRE Q_SSD 1#
<20> CLK REQ_S D#
<16> C LKRE Q_WL AN#

<16> AP U_BT_OFF #

SSD_RS T# < 17>

APU_ WL_O FF# <1 6>

USB3_ARX _DTX_P0 <24>
USB3_ARX _DTX_N0 <2 4>

USB3_ATX_ DRX_P0 <24>
USB3_ATX_ DRX_N0 <2 4>

+1.8VALW

+3VS

+3VALW

+3VS

+1.8VALW

Tiiitttllle

Siiize Documenttt Numberrr

SecuriiityClllassiiifiiicatiiion

Compalll Secret Data

LA-H131P

Re v

0...4

FP5 SATA/CLK/USB/SPI

Custttom

Sheettt 9 offf 46Dattte::: Monday,,, Novemberrr 05,,,2018

Issued Date

2018/1// 1/0// 5

DeciiipheredDatett

2019///11///05

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND TRADE
SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT EXCEPT AS
AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIITCONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,,IIINC...

Compal Electronics, Inc.

CC31
10P_0402_50V8J

1

2

FP5REV 0.90
PART 5 OF13

CLK/LPC/EMMC/SD/SPI/eSPI/UART

FP5_B GA1140~D

UC1E @

AY4

X32K_X2

AY1

X32K_X1

AW 14

RTCCLK

AF8

RSVD_76

AF9

RSVD_77

BA5

X48M_X2

BB3

X48M_X1

AN2

GPP_CLK4P

AN4

GPP_CLK4N

AN3

GPP_CLK5P

AP2

GPP_CLK5N

AJ2

GPP_CLK6P

AJ4

GPP_CLK6N

AJ3

48M_OSC

AL4

GPP_CLK3N

AL2

GPP_CLK3P

AM3

GPP_CLK2N

AM1

GPP_CLK2P

AM2

GPP_CLK1P

AM4

GPP_CLK1N

AK1

GPP_CLK0P

AK3

GPP_CLK0N

AW 18

CLK_REQ5_L/EGPIO120

AW 19

CLK_REQ6_L/EGPIO121

AU19

CLK_REQ4_L/OSCIN/EGPIO132

AT19

CLK_REQ3_L/SATA_IS1_L/SATA_Z P1_L/EGPIO131

AP19

CLK_REQ2_L/AGPIO116

AN19

CLK_REQ1_L/AGPIO115

AV18

CLK_REQ0_L/SATA_IS0_L/SATA_Z P0_L/AGPIO92

AGPIO144/UART1_INTR

BB16

APU_ WL_ OFF#

EGPIO140/UART1_CTS_L/UART3_TXD

BB19

EGPIO142/UART1_RTS_L/UART3_RXD

BC16

SSD_RS T#

EGPIO141/UART1_RXD

BC18

EGPIO143/UART1_TXD

BA17

UART0_INTR/AGPIO139

BD18

UART0_CTS_L/UART2_TXD/EGPIO135

BA18

UART0_RTS_L/UART2_RXD/EGPIO137

BC17

UART0_TXD/EGPIO138

BB18

UART_0_ATX D_DRXD

UART0_RXD/EGPIO136

BA16

UART_0_ARX D_DTXD

SPI_CS2_L/ESPI_CS_L/AGPIO30

BA8

Not Implemented Need Pull down bySW

SPI_CS3_L/AGPIO31

BA6

SPI_TPM_CS_L/AGPIO29

BD8

SPI_CS1_L/EGPIO118

BC9

APU_SPI_ CS1#

SPI_HOLD_L/ESPI_DAT3

BC10

APU_SPI_ HOLD#

SPI_WP_L/ESPI_DAT2

BA10

APU_SPI_ WP#

SPI_DO

BB10

APU_SPI_ MOSI

SPI_DI/ESPI_DATA

BA9

APU_SPI_ MISO

ESPI_RESET_L/KBRST_L/AGPIO129

BB11

ESPI_ALERT_L/LDRQ0_L/EGPIO108

BC6

SPI_ROM_REQ/EGPIO67

BC8

SPI_ROM_GNT/AGPIO76

BB8

LPC_PME_L/SD_PWR_CTRL/AGPIO22

BA13

AGPIO68/SD_CD

BA11

LPC_RST_L/SD_WP_L/AGPIO32

BD11 RC8 2 2 1 33_0402_5%

LFRAME_L/EGPIO109

BA12

SERIRQ/AGPIO87

BC12

LPCCLK1/EGPIO75

BB13

Not Implemented Need Pull down by SW

LPC_CLKRUN_L/AGPIO88

BC13 CLKRUN#

LPCCLK0/EGPIO74

BA15

LAD3/SD_DATA3/EGPIO107

BC15

LAD2/SD_DATA2/EGPIO106

BB15

LAD1/SD_DATA1/EGPIO105

BC11

LAD0/SD_DATA0/EGPIO104

BB12

EGPIO70/SD_CLK

BD13

LPC_PD_L/SD_CMD/AGPIO21

BB14

RC8 7 2 @ 1 22 +-5% 0402

1 10_0402_5%
1 10_0402_5%

RC7 7 2
RC7 8 2

48M_X2 _R

RC7 4 1 EMI@ 2 33_0402_5%

48M_X2

1 10_0402_5%RC7 9 2

CC2 9 2 1 150P_0 402_50 V8J

T17 Not Implemented Need Pull down by SW

USB

FP5REV 0.90

PART 10 OF13

FP5_B GA1140~D

UC1J @

AW 7

AGPIO14/USB_OC4_L

Not Implemented Pull down by SW

AT12

AGPIO13/USB_OC5_L

AL9

USB_OC2_L/AGPIO18

AL8

USB_OC3_L/AGPIO24

AK9

USB_OC1_L/AGPIO17

AK10

USB_OC0_L/AGPIO16

AM6

USBC_I2C_SCL

AM7

USBC_I2C_SDA

AD8

USB_1_DM1

AD9

USB_1_DP1

AJ11

USB_1_DM0

AJ12

USB_1_DP0

AE10

USB_0_DP3

AE9

USB_0_DM3

AF12

USB_0_DP2

AF11

USB_0_DM2

AG9

USB_0_DM1

AG10

USB_0_DP1

AE6

USB_0_DM0

AE7

USB_0_DP0

USB_1_RXP0

AK7

USB_1_RXN0

AK6

USB_1_TXP0

AH4

USB_1_TXN0

AH2

USBC1_A11/DP2_TXP0

AB2

USBC1_A10/DP2_TXN0

AB4

USBC1_B2/DP2_TXP1

AC1

USBC1_B3/DP2_TXN1

AC3

USB_0_RXN2

AG6

USBC1_A2/USB_0_TXP3/DP2_TXP2

AA2

USBC1_A3/USB_0_TXN3/DP2_TXNA2

A4

USBC1_B11/USB_0_RXP3/DP2_TXPY3

1

USBC1_B10/USB_0_RXN3/DP2_TXNY3

3

USB_0_RXP2

AG7

USB3_ARX _DTX_N2

USB3_ARX _DTX_P2 <20>

USB_0_TXN2

AG2

USB_0_TXP2

AG4

USB3_ATX_ DRX_N2

USB_0_RXN1

AJ8

USB3_ARX _DTX_N1 <2 0>

USB_0_RXP1

AJ9

USB3_ARX _DTX_N1

USB3_ARX _DTX_P1 <20>

USB_0_TXP1

AG3

USB3_ATX_ DRX_P1

USB_0_TXN1

AG1

USB3_ATX_ DRX_N1

USBC0_B2/DP3_TXP1

AF4

USBC0_B3/DP3_TXN1

AF2

USBC0_A11/DP3_TXP0

AE3

USBC0_A10/DP3_TXN0

AE1

USBC0_B11/USB_0_RXP0/DP3_TXPA3

C2

USB3_ARX _DTX_P0

USBC0_B10/USB_0_RXN0/DP3_TXNA3

C4

USB3_ARX _DTX_N0

USBC0_A2/USB_0_TXP0/DP3_TXP2

AD2

USB3_ATX_ DRX_P0

USBC0_A3/USB_0_TXN0/DP3_TXNA2

D4

USB3_ATX_ DRX_N0

Z_9PF_X1A0 0014100 0200

W00

1

CC30
10P_0402_50V8J

1

2

SPI_CLK/ESPI_CLK

BB7

APU_SPI_ CLK

RC8 4 2 EMI@ 1 10_0402_1%

1 10_0402_5%
1 22_0402_5%

RC8 0 2
RC8 1 2

1 1 0K_040 2_5%RC8 9 2

2 1 00K_04 02_5%

1

CC3 2

0.1U_0 201_1 0V6K

@

2

1

CC2 8

4.7P _0402_50V8C

2

SE071 47AB80

YC1
48MHZ_8PF_7V48000 010

SJ100 00JP0 0

1

1

2

2

3

3

4

4

RC8 5 2 @ 1 10K _0402_ 5%

RC8 3 2 @ 1 100 K_040 2_5%

UC2

APU_SPI_ CS1#

1

8

APU_SPI_ MISO

2

CS# VCC

7

APU_SPI_ HOLD#

APU_SPI_ WP#

3

DO(IO1) HOLD#(IO3)

6

APU_SPI_ CLK_R

4

WP#(IO2) CLK

5

APU_SPI_ MOSI GND

DI(IO0)

S IC FL 64M X M25QU64AHI GT SOP 8P SPI RO M

SA0000 BJU00

RC9 7 2 @EMI @ 1 10_0402_5%

1

CC2 7

4.7P _0402_50V8C

2

SE071 47AB80

1 10 K_0402 _5%
1 10 K_0402 _5%

RC9 0 2
RC9 1 2

T18
T19
T20

RC7 5 1M_040 2_5%

2

RC9 8 1
RC9 9 1

2 1 00K_04 02_5%

RC9 2 2 @ 1 10K _0402 _5%

1

48M_X1 _R

RC7 6 1 EMI@ 2 33_0402_5%

48M_X1

RC8 6

20

M_0402_5

2

YC2

32.768KH

SJ10000P

%

12

CC3 3
10P_0402_50V8J

@EMI @

1

2

1 10 K_0402 _5%
1 10 K_0402 _5%
1 10 K_0402 _5%
1 10 K_0402 _5%

RC9 3 2
RC9 4 2
RC9 6 2
RC9 5 2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

+VDDP_ALW

Main Func = CPU

All BU(on bottom side under SOC)

Across VDDIO & VSS split.

BO BU

BO B U BO BU

TDC: 35A
EDC: 45A

TDC :6A

TDC :10A
EDC: 13A

TDC :4A

Note : Cap placemet need to close APU

VDDIO_AUDIO

<28> EC_C LEAR_CMOS#

+1.8VALW

+3VS

+1.8VS

+0.8VALW

+1.8VS

+1.2V

+APU_CORE

+APU_CO RE_SOC

+1.2V

+1.8VS

+RTC_APU

+0.8VALW

+0.8VS

+0.8VS

+3VALW

+RTCBATT

+RTC_APU

+3VALW

+1.8VALW

+3VS

Tiiitllle

Security Classification

Compal Secret Data

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPER TY OF COM PAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
TRADE SECRE T IIINFORMATIIION... THIIIS SH EET MAY N OT BE TR ANSFER ED FROM THE CUS TODY OF THE COMP ETENT DIIIVIIISIIION OF R& D
DEPAR TMENT EXCE PT AS AUTHORIIIZED BY COM PAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHE ET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PA RTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMP AL ELECTRONIIICS,,, IIINC...

Issued Date

DecipheredDate

LA-H131P

R ev

0.4

FP4PWR

Siiize Document Number

Custom

Sheet 10 o f 46Date: Monday, November 05, 2018

2018/11/05 2019/11/05

Compal Electronics,Inc.

CC70

22U_0603_6.3

V6M

1

2

CC62 @

1U_0201_6.3V6M

1

2

1.5V

UC11

AP2138N-1.5TRG1_SOT23-3

SA000066U00

Vin

1

Vout
GND

2

CC78

10U_0402_6.3

V6M

1

2

CC74

1U_0201_6.3V6M

1

2

CC59

1U_0201_6.3V6M

1

2

CC80

1U_0201_6.3V6M

1

2

CC52

22U_0603_6.3

V6M

1

2

@

RC101 1

2 0_0402_5%

VDDIO_AU DIO

CC73

22U_0603_6.3

V6M

1

CC67

1U_0201_6.3V6M

1

2

CC79 @

1U_0201_6.3V6M

1

2

FP5 REV0.90
PART 6 OF13

POWER

FP5_BGA1140~D

UC1F @

TDC :4.5uA AT 11

VDDBT_RTC _G

AN13

VDDP_5

AN12

VDDP_4

AM13

VDDP_3

AM12

VDDP_2

AL13

VDDP_1

AM14

VDDP_S5_ 3

AL15

VDDP_S5 _2

TDC :1A AL14

VDDP_S5_1

AM16

VDD_33_ S5_2

TDC :0.25A AL17

VDD_33_ S5_1

AM18

VDD_18_ S5_2

TDC :0.5A AL1 9

VDD_18_ S5_1

AM19

VDD_18_ 2

TDC :2A AL20

VDD_18_ 1

AM17

VDD_33_ 2

TDC :0.25A AL18

VDD_33_ 1

TDC :0.2A AP12

VDDIO_AUDI O

AL32

VDDIO_ME M_S3_40

AL28

VDDIO_ME M_S3_39

AK28

VDDIO_ME M_S3_38

AJ32

VDDIO_ME M_S3_37

AJ28

VDDIO_ME M_S3_36

AJ26

VDDIO_ME M_S3_35

AJ23

VDDIO_ME M_S3_34

AJ20

VDDIO_ME M_S3_33

AG28

VDDIO_ME M_S3_32

AG25

VDDIO_ME M_S3_31

AG22

VDDIO_ME M_S3_30

AG20

VDDIO_ME M_S3_29

AF32

VDDIO_ME M_S3_2 8

AF28

VDDIO_ME M_S3_2 7

AF26

VDDIO_ME M_S3_2 6

AF23

VDDIO_ME M_S3_2 5

AE28

VDDIO_ME M_S3_24

AE25

VDDIO_ME M_S3_23

AE22

VDDIO_ME M_S3_22

AE20

VDDIO_ME M_S3_21

AD32

VDDIO_ME M_S3_20

AD28

VDDIO_ME M_S3_19

AD26

VDDIO_ME M_S3_18

AD23

VDDIO_ME M_S3_17

AC28

VDDIO_ME M_S3_16

AC25

VDDIO_ME M_S3_15

AC22

VDDIO_ME M_S3_14

AC20

VDDIO_ME M_S3_13

AA32

VDDIO_ME M_S3_12

AA28

VDDIO_ME M_S3_11

AA26

VDDIO_ME M_S3_10

AA23

VDDIO_ME M_S3_9

AA20

VDDIO_ME M_S3_8

Y28

VDDIO_ME M_S3_7

Y25

VDDIO_ME M_S3_6

Y22

VDDIO_ME M_S3_5

W3 2

VDDIO_ME M_S3_4

W2 8

VDDIO_ME M_S3_3

V28

VDDIO_ME M_S3_2

T32

VDDIO_ME M_S3_1

Y19

VDDCR_SOC _17

W2 0

VDDCR_SO C_16

W1 8

VDDCR_SO C_15

V19

VDDCR_SOC _14

U20

VDDCR_SOC _13

U18

VDDCR_SOC _12

T19

VDDCR_SOC _11

R20

VDDCR_SOC _10

R18

VDDCR_SOC _9

P19

VDDCR_SOC _8

P17

VDDCR_SOC _7

N20

VDDCR_SOC _6

N18

VDDCR_SOC _5

N16

VDDCR_SOC _4

M19

VDDCR_SO C_3

M18

VDDCR_SO C_2

M15

VDDCR_SO C_1

VDDCR_8 3

AK19

VDDCR_8 2

AK17

VDDCR_8 1

AK15

VDDCR_8 0

AK13

VDDCR_7 9

AJ18

VDDCR_7 8

AJ16

VDDCR_7 7

AJ14

VDDCR_7 6

AJ10

VDDCR_7 5

AJ7

VDDCR_7 4

AH19

VDDCR_7 3

AH17

VDDCR_7 2

AH15

VDDCR_7 1

AH13

VDDCR_7 0

AG18

VDDCR_6 9

AG16

VDDCR_6 8

AG14

VDDCR_6 7

AF19

VDDCR_6 6

AF17

VDDCR_6 5

AF15

VDDCR_6 4

AF13

VDDCR_6 3

AF10

VDDCR_6 2

AF7

VDDCR_61 AE18

VDDCR_60 AE16

VDDCR_5 9

AE14

VDDCR_5 8

AE8

VDDCR_5 7

AD19

VDDCR_5 6

AD17

VDDCR_5 5

AD15

VDDCR_5 4

AD13

VDDCR_5 3

AD10

VDDCR_5 2

AD7

VDDCR_5 1

AC18

VDDCR_50 AC16

VDDCR_49 AC14

VDDCR_4 8

AB19

VDDCR_4 7

AB17

VDDCR_4 6

AB15

VDDCR_4 5

AB13

VDDCR_4 4

AA18

VDDCR_4 3

AA16

VDDCR_4 2

AA14

VDDCR_4 1

AA10

VDDCR_4 0

AA7

VDDCR_39 Y17

VDDCR_38 Y15

VDDCR_37 Y13

VDDCR_3 6

Y8

VDDCR_3 5

W1 6

VDDCR_3 4

W1 4

VDDCR_3 3

W1 0

VDDCR_3 2

W7

VDDCR_3 1

V17

VDDCR_3 0

V15

VDDCR_29 V13

VDDCR_28 U16

VDDCR_27 U14

VDDCR_26 T17

VDDCR_2 5

T15

VDDCR_2 4

T13

VDDCR_2 3

T10

VDDCR_2 2

T7

VDDCR_2 1

R16

VDDCR_2 0

R14

VDDCR_19 R8

VDDCR_18 P15

VDDCR_17 P13

VDDCR_16 P10

VDDCR_15 P7

VDDCR_1 4

N14

VDDCR_1 3

M10

VDDCR_1 2

M7

VDDCR_1 1

L8

VDDCR_1 0

K14

VDDCR_9

K12

VDDCR_8

K7

VDDCR_7

H15

VDDCR_6

H11

VDDCR_5 H8

VDDCR_4 G14

VDDCR_3 G12

VDDCR_2 G10

VDDCR_1 G7

CC81

0.22U_0402_6.3V6K

1

2

CC43

1U_0201_6.3V6M

1

2

CC65 @

1U_0201_6.3V6M

CC63

180P_0402_50V8J

1

2

CC36

22U_0603_6.3

V6M

1

2

CC37

22U_0603_6.3

V6M

1

2

CC64

22U_0603_6.3

V6M

1 1

2 2

CC45

180P_0402_50V8J

1

2

CC75 @

22U_0603_6.3

V6M

1

2

CC40

22U_0603_6.3

V6M

1

2

CC46

180P_0402_50V8J

1

2

CC66

1U_0201_6.3V6M

1

2

CC58

1U_0201_6.3V6M

1

2

CC76

1U_0201_6.3V6M

1

2

CC56 @

1U_0201_6.3V6M

1

2

CC41

22U_0603_6.3

V6M

1

2

CC77

1U_0201_6.3V6M

1

2

CC42

22U_0603_6.3

V6M

1

2

CC57

1U_0201_6.3V6M

1

2

CC35

22U_0603_6.3

V6M

1

2

CLRP1
SHORT PADS

@

2 1

CC61 @

1U_0201_6.3V6M

1

2

CC55

1U_0201_6.3V6M

1

2

RC107 1 2 10K_0402_ 5%

+RTCBATT_R

3

CC69

1U_020 1_6.3V6M

2

CC49

.22U 6.3V K X5R 0402

1

2

CC39

22U_0603_6.3

V6M

1

2

CC72

1U_0201_6.3V6M

1

2

CC53

22U_0603_6.3

V6M

1

2

CC50

.22U 6.3V K X5R 0402

1

2

CC68

22U_06 03_6.3V6 M

1 1

2

CC60 @

1U_0201_6.3V6M

1

2

C1 @

1U_0201_6.3V6M

1

2 2

CC54

22U_0603_6.3

V6M

1

2

CC48

.22U 6.3V K X5R 0402

1

2

CC51

.22U 6.3V K X5R 0402

1

2

CC47

180P_0402_50V8J

1

2

CC71

1U_0201_6.3V6M

1

2

@

RC106 1 2 0_0402_5%

CC38

22U_0603_6.3

V6M

1

2

CC44

1U_0201_6.3V6M

1

2

CC82
1U_0201_6.3V 6M

2 1

5

5

4

4

3 2 1

1

D D

C C

B B

A A

Main Func = CPU

Title

Size

Document Number

Date: Sheet

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THEINFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3 2

Issued Date

Deciphered Date

LA-H131P

Rev

0.4

FP5 GND

Custom

11 of 46Monday, November 05, 2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

GND/RS VD

FP5 REV 0.90

PART 11 OF 13

FP5_BGA1140~D

UC1K @

BD14

BD12

BD10

BD7

BD3

BB32

BB20

BB1

AY27

AY26

AY25

AY23

AY22

AY21

AY20

AY19

AY18

AY16

AY15

AY14

AY13

AY12

AY11

AY10

AY8

AY7

AY6

AW28

AW5

AV32

AV28

AV26

AV23

AV21

AV19

AV16

AV14

AV12

AV10

AV7

AV5

AV1

AU28

AU25

AU22

AU20

AU18

AU15

AU13

AU11

AU8

AU5

AR32

AR28

AR26

AR21

AR19

AR16

AR14

VS S_ 25 1
VS S_ 25 2
VS S_ 25 3
VS S_ 25 4
VS S_ 25 5
VS S_ 25 6
VS S_ 25 7
VS S_ 25 8
VS S_ 25 9
VS S_ 26 0
VS S_ 26 1
VS S_ 26 2
VS S_ 26 3
VS S_ 26 4
VS S_ 26 5
VS S_ 26 6
VS S_ 26 7
VS S_ 26 8
VS S_ 26 9
VS S_ 27 0
VS S_ 27 1
VS S_ 27 2
VS S_ 27 3
VS S_ 27 4
VS S_ 27 5
VS S_ 27 6
VS S_ 27 7
VS S_ 27 8
VS S_ 27 9
VS S_ 28 0
VS S_ 28 1
VS S_ 28 2
VS S_ 28 3
VS S_ 28 4
VS S_ 28 5
VS S_ 28 6
VS S_ 28 7
VS S_ 28 8
VS S_ 28 9
VS S_ 29 0
VS S_ 29 1
VS S_ 29 2
VS S_ 29 3
VS S_ 29 4
VS S_ 29 5
VS S_ 29 6
VS S_ 29 7
VS S_ 29 8
VS S_ 29 9
VS S_ 30 0
VS S_ 30 1
VS S_ 30 2
VS S_ 30 3
VS S_ 30 4
VS S_ 30 5
VS S_ 30 6
VS S_ 30 7
VS S_ 30 8
VSS_309

AR12

VS S _2 50

AR7

VSS_249

AR5

VS S _2 48

RS V D_ 86

AN16

RS V D_ 85

AL11

RS V D_ 14

M14

RS V D_ 84

AL6

RS V D_ 87

AN29

RS V D_ 88

AN31

RS V D_ 83

AL3

RS V D_ 81

AK23

RS V D_ 82

AK27

RS V D_ 79

AJ6

RS V D_ 80

AJ24

RS V D_ 78

AF30

RS VD _70

AD3

RS VD _71

AD6

RS VD _74

AF3

RS V D_ 75

AF6

RS V D_ 69

AC29

RS V D_ 1

B20

RS V D_ 5

G3

RS V D_ 7

J20

RS V D_ 8

K3

RS V D_ 9

K6

RS V D_ 10

K20

RS V D_ 11

M3

RS V D_ 12

M6

RS V D_ 13

M13

RS V D_ 22

P6

RS V D_ 23

P22

RS V D_ 30

T3

RS V D_ 31

T6

RS V D_ 37

T29

RS V D_ 44

W6

RS V D_ 49

W21

RS V D_ 50

W22

RS V D_ 57

Y21

RS V D_ 58

Y27

RS V D_ 59

AA3

RS V D_ 60

AA6

5

BD30

4

BD26

3

BD23

2

BD21

VS S_ 31
VS S_ 31
VS S_ 31
VS S_ 31
VSS_31

1

BD19

VS S _3 10

BD16

FP5_BGA1140~D

UC1L @

T11

RSVD

RSVD_32 RSVD_6

RSV

D_6

RSVD_66 RSV

D_6

RS V D_ 55
R

SVD_56 RSVD_7

R

SVD_47 RSVD_6

R

SVD_48 RSVD_6

R

SVD_38 RSVD_3

R

SVD_39 RSVD_7

RSV

D_5

RSV

D_5

R

SVD_64 RSVD_4

R

SVD_68 RSVD_4

FP5 REV 0.90

PART 12 OF 13

2

AA9

AC7

1

AA8

5

AC6

Y9

2

AD11

Y10

W11

7

AC9

W12

3

AA11

V9

3

T12

V10

3

AD12

AA12

3

Y6

4

Y7

5

W8

A

C10

6

W9

FP5_BGA1140~D

UC1M @

A18

CAM ERAS

CAM0_CSI2_CLOCKP CAM0_CL

CA M 0_ CS I2 _ CL OC KN

CAM0_I2C_S

C

CAM0_CSI2_DATAP0 CAM0_I2C_S

D

CA M 0_ CS I2 _D AT AN 0

CAM0_SHUTDOW
CA M 0_ CS I2 _D AT AP 1
C

AM0_CSI2_DATAN1

CA M 0_ CS I2 _D AT AP 2
C

AM0_CSI2_DATAN2

CA M 0_ CS I2 _D AT AP 3
C

AM0_CSI2_DATAN3

CAM1_CSI2_CLOCKP CAM

1_CL

CA M 1_ CS I2 _ CL OC KN

CAM1_I2C_S

C

CAM1_CSI2_DATAP0 CAM1_I2C_S

D

CA M 1_ CS I2 _D AT AN 0

CAM1_SHUTDOW
CA M 1_ CS I2 _D AT AP 1

CAM1_CSI2_DATAN1 CAM_PRIV

_LE

CAM

_IR_ILL

RS V D_ 6 FP5 REV 0.90

PART 13 OF 13

K

B15

C18

L

D15

A15

A

C14

C15

N

B13

B16

K

B10

C16
C19

B18
B17

D17
D12

B12

L

A11

C13

A

C11

A13

N

D11

B11

D

D13

C12

J13

U

D10

FP5 REV 0.90
PART 7 OF 13

GND

FP5_BGA1140~D

UC1G @

K28

K22

K21

K19

K16

K5

K1

H28

H25

H22

H20

H18

H13

G32

G28

G23

G21

G19

G16

G5

G1

F28

F5

E27

E26

E25

E23

E21

E20

E19

E18

E16

E15

E14

E13

E12

E11

E10

E8

E7

D20

D18

D16

C32

C3

A26

A23

A21

A19

A16

A14

A12

A10

A7

A3

VS S _1

A5

VS S _2
VSS_3
VSS_4
VS S_ 5
VS S_ 6
VSS_7
VSS_8
VSS_9
VSS_1 0
VSS_11

A30

VS S _1 2

VSS_1 3
VSS_14
VS S_ 15
VS S_ 16
VSS_17
VSS_1 8
VSS_19
VS S_ 20
VS S_ 21
VSS_22
VSS_2 3
VSS_24
VS S_ 25
VS S_ 26
VSS_27
VSS_2 8
VSS_29
VS S _3 0

E22

VS S _3 1
VS S _3 2

VS S_ 33
VS S_ 34
VS S_ 35
VS S_ 36
VS S_ 37
VS S_ 38
VS S_ 39
VS S_ 40
VS S_ 41
VS S_ 42
VSS_43

G26

VS S _4 4
VSS_4 5
VSS_46

H5

VS S _4 7

VSS_4 8
VSS_49
VS S_ 50
VS S_ 51
VSS_52
VSS_5 3
VSS_54
VS S_ 55
VS S_ 56
VSS_57
VSS_5 8
VSS_59

K26

VS S _6 0

VS S _6 1

N12

VS S _3 16

2

U19

1

U17

0

U15

9

U13

8

T28

7

T26

6

T23

5

T20

4

T18

3

T16

2

T14

9

R30

8

R28

7

R25

6

R22

5

R19

4

R17

3

R15

2

R13

1

R12

VS S_ 10
VS S_ 10
VS S_ 10
VS S_ 10
VS S_ 10
VS S_ 10
VS S_ 10
VS S_ 10
VS S_ 10
VSS_10
VS S _1 10

T1

VS S _1 11

T5

VS S_ 11
VS S_ 11
VSS_11
VSS_1 1
VSS_11
VS S_ 11
VS S_ 11
VSS_11
VSS_1 2
VSS_12
VS S _1 2
VS S _1 23

V5

0

R11

R5

VSS_99

P32

VSS_98

P28

VSS_97

P26

VSS_96

P23

VSS_95

P20

VSS_94

VS S _9 3

P18

P16

VSS_92

P14

VSS_91

P5

VSS_90

P1

VSS_89

N28

VSS_88

N25

VSS_87

N22

VSS_86

N19

VSS_85

N17

VSS_84

N15

VSS_83

N13

VSS_82

N11

VSS_81

N8

VSS_80

N5

VSS_79

N4

VSS_78

M32

VSS_77

M28

VSS_76

M26

VSS_75

VS S _7 4

M23

M21

VSS_73

M12

VSS_72

M5

VSS_71

M1

VSS_70

L28

VSS_69

L25

VSS_68

L20

VSS_67

L18

VSS_66

L15

VSS_65

VS S _6 4

L13

L5

VSS_63

VS S _6 2

K32

FP5 REV 0.90
PART 8 OF 13

GND

FP5_BGA1140~D

UC1H @

AG5

AF20

AF18

AF16

AF14

AF5

AF1

AE19

AE17

AE15

AE13

AE12

AE11

AE5

AD20

AD18

AD16

AD14

AD5

AD1

AC19

AC17

AC15

AC13

AC12

AC11

AC8

AC5

AB20

AB18

AB16

AB14

AA19

AA17

AA15

AA13

AA5

AA1

Y20

Y18

Y16

Y14

Y12

Y11

Y5

W26

W23

W19

W17

W13

W5

W1

V25

V22

V20

V18

V16

V14

V11

VS S _1 25

V12

VS S _1 26

VSS_1 27
VSS_128
VS S_ 12 9
VS S_ 13 0
VSS_131
VSS_1 32
VSS_133
VSS_1 34
VSS_135

W15

VS S _1 36

VSS_1 37
VSS_138
VS S_ 13 9
VS S_ 14 0
VSS_141
VSS_1 42
VSS_143
VS S_ 14 4
VS S_ 14 5
VSS_146
VSS_1 47
VSS_148
VS S_ 14 9
VS S_ 15 0
VSS_151
VSS_1 52
VSS_153
VS S_ 15 4
VS S_ 15 5
VSS_156
VSS_1 57
VSS_158
VS S_ 15 9
VS S_ 16 0
VSS_161
VSS_1 62
VSS_163
VS S_ 16 4
VS S_ 16 5
VSS_166
VSS_1 67
VSS_168
VS S_ 16 9
VS S_ 17 0
VSS_171
VSS_1 72
VSS_173
VS S_ 17 4
VS S_ 17 5
VSS_176
VSS_1 77
VSS_178
VS S_ 17 9
VS S_ 18 0
VSS_181
VSS_1 82
VSS_183
VSS_1 84
VSS_185

V8

VS S _1 24

VS S _2 4
VS S _2 47

AR1

6

AP28

VS S _2 45

AP25

4

AP20

3

AP18

2

AP15

1

AP13

0

AP8

9

AP5

8

AN32

7

AN28

6

AN26

5

AN23

4

AN21

3

AN18

2

AN15

1

AN10

0

AN7

9

AN5

8

AN1

7

AM28

6

AM25

5

AM22

4

AM20

3

AM15

2

AM8

1

AM5

0

AL26

9

AL23

8

AL16

7

AL12

6

AL10

5

AL7

VS S_ 21
VS S_ 21
VS S_ 21
VS S_ 21
VS S_ 21
VS S_ 21
VS S_ 22
VS S_ 22
VS S_ 22
VS S_ 22
VS S_ 22
VS S_ 22
VS S_ 22
VS S_ 22
VS S_ 22
VS S_ 22
VS S_ 23
VS S_ 23
VS S_ 23
VS S_ 23
VS S_ 23
VS S_ 23
VS S_ 23
VS S_ 23
VS S_ 23
VS S_ 23
VS S_ 24
VS S_ 24
VS S_ 24
VS S_ 24
VSS_24

4

AL5

2

AK25

1

AK22

0

AK20

9

AK18

8

AK16

7

AK14

6

AK12

5

AK11

4

AK8

3

AK5

2

AJ19

1

AJ17

0

AJ15

9

AJ13

8

AJ5

7

AJ1

6

AH20

5

AH18

4

AH16

3

AH14

2

AG19

1

AG17

0

AG15

9

AG13

8

AG12

VS S_ 18
VS S_ 18
VS S_ 18
VS S_ 19
VS S_ 19
VS S_ 19
VS S_ 19
VS S_ 19
VS S_ 19
VS S_ 19
VS S_ 19
VS S_ 19
VS S_ 19
VS S_ 20
VS S_ 20
VS S_ 20
VS S_ 20
VS S_ 20
VS S_ 20
VS S_ 20
VS S_ 20
VS S_ 20
VS S_ 20
VS S_ 21
VS S_ 21
VSS_21

VSS_213 AL1

7

AG11

VS S _1 86

AG8

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Memory Side

VREF traces should be at least 20mils wide
20mils spacing to other signals

DRAM DOWN DECOU PLING

Closed toUD1 Closed to UD2 Closed toU D3

Closed toUD4

DDR4 - MEMORY DOWN (MEMORY CHANNEL A, x16 x4 PCS)

DDR_A_RST#

DDR_A_PAR

DDR_A_ALERT#

DDR_A_WE#

DDR_A_CKE0

DDR_A_CLK0
DDR_A_CLK0#

DDR_A_RAS#

DDR_A_ODT0
DDR_A_CS0#

DDR_A_BA0
DDR_A_BA1

DDR_A_CAS#

DDR_A_RST#

DDR_A_PAR

DDR_A_ALERT#

DDR_A_PAR

DDR_A_ALERT#

DDR_A_RST#

DDR_A_BG1_R DDR_A_BG1_R

DDR_A_DQ[63..0]

DDR_A_MA12
DDR_A_MA13

DDR_A_MA11

DDR_A_MA10

DDR_A_MA6
DDR_A_MA7

DDR_A_MA2
DDR_A_MA3

DDR_A_MA8

DDR_A_MA5

DDR_A_MA4

DDR_A_MA9

DDR_A_MA0
DDR_A_MA1

DDR_A_MA12
DDR_A_MA13

DDR_A_MA11

DDR_A_MA10

DDR_A_MA6
DDR_A_MA7

DDR_A_MA2
DDR_A_MA3

DDR_A_MA8

DDR_A_MA5

DDR_A_MA4

DDR_A_MA9

DDR_A_MA0
DDR_A_MA1

DDR_A_MA12
DDR_A_MA13

DDR_A_MA11

DDR_A_MA10

DDR_A_MA6
DDR_A_MA7

DDR_A_MA2
DDR_A_MA3

DDR_A_MA8

DDR_A_MA5

DDR_A_MA4

DDR_A_MA9

DDR_A_MA0
DDR_A_MA1

DDR_A_WE# DDR_A_WE#
DDR_A_BA0

DDR_A_BA1

DDR_A_BA0
DDR_A_BA1

DDR_A_BG1_R DDR_A_BG1_R

DDR_A_ACT#
DDR_A_BG0

DDR_A_ACT#
DDR_A_BG0

DDR_A_DM1
DDR_A_DM0

DDR_A_DM3
DDR_A_DM2

DDR_A_DM5
DDR_A_DM4

DDR_A_DM7
DDR_A_DM6

DDR_A_CKE0

DDR_A_CLK0
DDR_A_CLK0#

DDR_A_CKE0

DDR_A_CLK0
DDR_A_CLK0#

DDR_A_ODT0
DDR_A_CS0#

DDR_A_ODT0
DDR_A_CS0#

DDR_A_DM[7..0]

DDR_A_DQ12

DDR_A_DQ16

DDR_A_DQ25

DDR_A_DQ44

DDR_A_DQ48

DDR_A_DQ1

DDR_A_DQ32

DDR_A_DQ56

DDR_A_RAS#
DDR_A_CAS#

DDR_A_RAS#
DDR_A_CAS#

<5> DDR_A_RST#

<5>DDR_A_BA0
<5>DDR_A_BA1

<5> DDR_A_CLK0
<5> DDR_A_CLK0#
<5> DDR_A_CKE0

<5>DDR_A_ODT0
<5> DDR_A_CS0#
<5>DDR_A_RAS#
<5>DDR_A_CAS#

<5> DDR_A_BG0

<5> DDR_A_ACT#

<5> DDR_A_MA0
<5>DDR_A_MA1
<5>DDR_A_MA2
<5>DDR_A_MA3
<5>DDR_A_MA4
<5>DDR_A_MA5
<5>DDR_A_MA6
<5>DDR_A_MA7
<5>DDR_A_MA8
<5>DDR_A_MA9
<5>DDR_A_MA10
<5>DDR_A_MA11
<5>DDR_A_MA12
<5>DDR_A_MA13
<5> DDR_A_WE#

<5> DDR_A_DQS1#
<5> DDR_A_DQS1
<5> DDR_A_DQS0#
<5> DDR_A_DQS0

<5> DDR_A_DQS3#
<5> DDR_A_DQS3
<5> DDR_A_DQS2#
<5> DDR_A_DQS2

<5> DDR_A_DQS5#
<5> DDR_A_DQS5
<5> DDR_A_DQS4#
<5> DDR_A_DQS4

<5> DDR_A_DQS7#
<5> DDR_A_DQS7
<5> DDR_A_DQS6#
<5> DDR_A_DQS6

<5> DDR_A_ALERT#
<5> DDR_A_PAR

DDR_A_DQ[63..0]<5>
DDR_A_DM[7..0]<5>

DDR_A_BG1 <5>

+1.2V

+1.2V

+0.6VS

+0.6VS

+1.2V

+1.2V

+1.2V

+0.6VS

+1.2V+1.2V

+1.2V+1.2V

+2.5V +2.5V +2.5V +2.5V

+0.6VS

+1.2V

+2.5V +2.5V

+2.5V +2.5V

+0.6V_DDRA_VREFCA

+0.6V_DDRA_VREFCA +0.6V_DDRA_VREFCA

+0.6V_DDRA_VREFCA +0.6V_DDRA_VREFCA

+0.6V_DDRA_VREFCA

Tiiitttllle

Siiize Documenttt Numberrr

LA-H131P

Re v

0...4

Sheettt 12 o fff46Dattte::: Monday,,, Novemberrr 05,,,2018

Securiiittty Clllassiiifffiiicatttiiion Compalll Secret Data

IsII suedDatett

2018///11///05

Deciiiphererr d Dattte

2019///11///05

THIS SHEET OF ENGINEII ERING DRAWING ISII THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,,, INC.II AND CONTAINSII CONFIDENTIALII AND TRADE SECRET
INFOII RMATIOII N. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISII IOII N OF R&D DEPARTME NT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS,,, INC.II NEITII HER THIS SHEET NOR THE INFOII RMATIOII N ITII CONTAINSII
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,,,INC.II

Compal Electronics, Inc.

DDR4_CHAOnboard

RD14 1 OBR@ 2 39_0402_5%

DDR_A_MA11

CD47 OBR@

10U 6.3V M X5R0402

1

2

CD5

0.1U_0201_10V6K

@

1

2

CD52 @

1U_0201_6.3V6

M

CD13 0.22U_0402_6.3V6KOBR@

CD43 OBR@

1U_0201_6.3V6

M

1

2

CD8

.047U_0402_16V7K

OBR@

1

2

RD15 1 OBR@ 2 39_0402_5%

DDR_A_MA12

CD17 0.22U_0402_6.3V6KOBR@

CD19 0.22U_0402_6.3V6KOBR@

CD51 OBR@

1U_0201_6.3V6

M

1

2

RD30 1 DDP@ 2 0_0201_5%

RD5 1 OBR@ 2 39_0402_5%

DDR_A_MA2

RD16 1 OBR@ 2 39_0402_5%

DDR_A_MA13

CD24 0.22U_0402_6.3V6KOBR@

CD30 0.22U_0402_6.3V6K@

CD53 OBR@

10U 6.3V M X5R0402

1 1

2 2

@

CD4 12 0.1U_0201_10V6K

RD4 1 OBR@ 2 39_0402_5%

DDR_A_MA1

UD2

K4A8G165WB-BCPB_FBGA96

SA00008Z000

@

CAS

M8

RAS

L8

CS

CKE

K7
K2

CK_c

K8

CK_t

N2

BA1

N8

BA0

N7

A2

N3

A3

P8

A4

P2

A5

R8

A6

R2

A7

R7

A8

M3

A9

T2

A10/AP

G2

DQL0F7DDR_A_DQ19 DQL1

H3

DDR_A_DQ21 DQL2

H7

DDR_A_DQ22 DQL3

H2

DDR_A_DQ20

DQL4

H8

DDR_A_DQ23

DQL5

J3

DDR_A_DQ17

DQL7

DQL6 J7DDR_A_DQ18

C9

B2
E9

E1

L3

ACT

B3
B9

A1
A9
C1
D9

M2

T7

F8

F9

ZQ

RESET

P1

A2
A8

D2
D8
E3

B7

DQSU_c

A7

G1

E8
F1

G9
J2

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

H1

VREFCA

M1

G8

D1

L7

ODT

K3

P3
R3

A1

P7

A0

G7

M7

A11

K1

DQU7

DQU6 D7DDR_A_DQ27

DQU0B8DDR_A_DQ31 D QU1

C3

DDR_A_DQ30 DQ U2

C7

DDR_A_DQ26 DQ U3

C2

DDR_A_DQ24 DQ U4

C8

DDR_A_DQ29 DQ U5

D3

DDR_A_DQ28

A3

T8

A12/BC

A14/WE

L2

A13

B1

NC

J8

VPP
VPP

R9

J9
L1
L9
R1

K9
N1

VSS
VSS
VSS
VSS
VSS
VSS

M9

VSS
VSS
VSS

T1

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

F2

VDD
VDD
VDD
VDD

J1

VDD
VDD
VDD
VDD
VDD
VDD

T9

96-BALL

VSSQ

SDRAM DDR4

H9

F3

DQSU_t

DQSL_t

G3

DQSL_c

E2

DML/DBIL

E7

DMU/DBIU

N9

BG0

P9

TEN
ALERT
PAR

T3

240_0201_1%

DDR_A_ACT#
DDR_A_BG0

RD36 1 OBR@2

RD19 1 OBR@ 2 39_0402_5%

DDR_A_RAS#

CD18 0.22U_0402_6.3V6KOBR@

RD7 1 OBR@ 2 39_0402_5%

DDR_A_MA4

RD39 1 DDP@2 0_ 0201_5%

1 2

RD17 1 OBR@ 2 39_0402_5%

DDR_A_WE#

RD32
1K_0402_1%

OBR@

1 2

CD14 0.22U_0402_6.3V6KOBR@

CD44@

10U 6.3V M X5R0402

1

2

CD20 0.22U_0402_6.3V6KOBR@

CD25 0.22U_0402_6.3V6KOBR@

CD31 0.22U_0402_6.3V6KOBR@

UD1

K4A8G165WB-BCPB_FBGA96

SA00008Z000

@

CAS

M8

RAS

L8

CS

CKE

K7
K2

CK_c

K8

CK_t

N2

BA1

N8

BA0

N7

A2

N3

A3

P8

A4

P2

A5

R8

A6

R2

A7

R7

A8

M3

A9

T2

A10/AP

G2

DQL0F7DDR_A_DQ7 DQL1

H3

DDR_A_DQ4 DQL2H7DDR_A_DQ6

DQL3H2DDR_A_DQ5 DQL4

H8

DDR_A_DQ3 DQL5J3DDR_A_DQ0

DQL7

DQL6 J7DDR_A_DQ2

B2

VSS

E9

VSS

E1

L3

ACT

B3

VDD

B9

A1

VDDQ

A9

VDDQ

C1

VDDQ

D9

M2

T7

F9

ZQ

RESET

P1

VSSQ

C9

A2

VSSQ

A8

VSSQ

D2

VSSQ

D8

VSSQ

E3

B7

DQSU_c

A7

VDDQ

G1

VSSQ

E8

VDDQ

G9

VDDQ

J2

VREFCA

M1

VSS

G8

VDD

D1

L7

ODT

K3

P3
R3

A1

P7

A0

VDD

G7

M7

A11

VSS

K1

VDD

J1

DQU7

DQU6 D7DDR_A_DQ10

DQU0B8DDR_A_DQ11 D QU1

C3

DDR_A_DQ9 DQU2C7DDR_A_DQ14

DQU3C2DDR_A_DQ8 DQU4

C8

DDR_A_DQ15 DQ U5

D3

DDR_A_DQ13

A3

T8

A12/BC

A14/WE

L2

A13

B1

NC VSSQ

F1

VDDQ

VDDQ

J8

R9

VPP VSSQ

H1

VDD

J9

VDD

L1

VDD

L9

VDD

R1

VSS

K9

VSS

M9

VSS

N1

VSS

VSS

T1

VDDQ

F8

VDDQ

F2

VDD

VDD

T9

96-BALL

VSSQ

SDRAM DDR4

VPP VSSQ

H9

F3

DQSU_t

DQSL_t

G3

DQSL_c

E2

DML/DBIL

E7

DMU/DBIU

N9

BG0

P9

TEN

PAR

T3

ALERT

RD3 1 OBR@2 39_0402_5%

DDR_A_MA0

RD31 1 SDP@2 0_0201_5%

DDR_A_BG1_R

CD10 0.22U_0402_6.3V6KOBR@

RD18 1 OBR@ 2 39_0402_5%

DDR_A_CAS#

RD34 1 DDP@2 0_ 0201_5%

RD8 1 OBR@ 2 39_0402_5%

DDR_A_MA5

2 0.22U_0402_6.3V6K OBR@

UD3

K4A8G165WB-BCPB_FBGA96

SA00008Z000

@

L8

M8

K2

K7
K8

N2
N8

R3
N7

P2
R8
R2
R7
M3

G2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

F7

DDR_A_DQ39

H3

DDR_A_DQ33

H7

DDR_A_DQ37

H2

DDR_A_DQ38

H8

DDR_A_DQ35

J3

DDR_A_DQ36

J7

DDR_A_DQ34

C9

B2

E9

E1

B3

B9

A1

A9

C1

D9

L3

M2

F8

ZQ

F9

P1

A2

A8

D2

D8

E3

A7
B7

G1

E8

F1

G9

J2

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

H1

M1

G8

D1

ODT
CS
RAS
CAS

K3

L7

P3
P7

G7

T2
M7

K1

J1

B8

DDR_A_DQ42

C3

DDR_A_DQ45

C7

DDR_A_DQ47

C2

DDR_A_DQ40

C8

DDR_A_DQ43

D3

DDR_A_DQ41

D7

DDR_A_DQ46

A3

VREFCA

A0
A1
A2

N3

A3

P8

A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14/WE

T8

L2

T7
B1

J8

R9

J9
L1
L9
R1

K9
M9
N1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

T1

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

F2

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

T9

96-BALL

VSSQ

SDRAM DDR4

H9

DQSU_c
DQSU_t
DQSL_c
DQSL_t

RESET

F3

G3

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

BA0
BA1

DMU/DBIU
DML/DBIL

CK_t
CK_c
CKE

E2
E7

N9

P9

ACT
BG0
TEN
ALERT
PAR

NC
VPP
VPP

T3

CD11 0.22U_0402_6.3V6KOBR@

RD20 1 OBR@ 2 39_0402_5%

DDR_A_ODT0

CD32 0.22U_0402_6.3V6KOBR@

RD6 1 OBR@ 2 39_0402_5%

DDR_A_MA3

CD1.047U_0402_16V7K

OBR@

1

2

OBR@

CD3 12 0.1U_0201_10V6K RD28 1 OBR@2 39_0402_5%

DDR_A_CLK0

2 0.22U_0402_6.3V6KOBR@

RD21 1 OBR@2 39_0402_5%

DDR_A_CS0#

CD21 0.22U_0402_6.3V6KOBR@

CD26 0.22U_0402_6.3V6KOBR@

240_0201_1%

RD40 1 OBR@2

CD15 0.22U_0402_6.3V6KOBR@

UD4

K4A8G165WB-BCPB_FBGA96

SA00008Z000

@

CAS

M8

RAS

L8

CS

CKE

K7
K2

CK_c

K8

CK_t

N2

BA1

N8

BA0

N7

A2

N3

A3

P8

A4

P2

A5

R8

A6

R2

A7

R7

A8

M3

A9

T2

A10/AP

G2

DQL0F7DDR_A_DQ51 DQL1

H3

DDR_A_DQ49 DQL2

H7

DDR_A_DQ55 DQL3

H2

DDR_A_DQ53

DQL4

H8

DDR_A_DQ50

DQL5

J3

DDR_A_DQ52

DQL7

DQL6 J7DDR_A_DQ54

C9

B2
E9

E1

L3

B3
B9

A1
A9
C1
D9

M2

ACT

T7

F8

ZQ

F9

P1

A2
A8

D2
D8
E3

B7

DQSU_c

A7

G1

E8
F1

G9
J2

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

H1

VREFCA

M1

G8

D1

L7

ODT

K3

P3
R3

A1

P7

A0

G7

M7

A11

K1

J1

DQU7

DQU6 D7DDR_A_DQ59

DQU0B8DDR_A_DQ62 D QU1

C3

DDR_A_DQ60 DQ U2

C7

DDR_A_DQ63 DQ U3

C2

DDR_A_DQ57 DQ U4

C8

DDR_A_DQ58 DQ U5

D3

DDR_A_DQ61

A3

T8

A12/BC

A14/WE

L2

A13

B1

NC

J8

VPP
VPP

R9

J9
L1
L9
R1

K9
M9
N1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

T1

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

F2

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

T9

96-BALL

VSSQ

SDRAM DDR4

H9

F3

DQSU_t

DQSL_t

RESET

G3

DQSL_c

E2

DML/DBIL

E7

DMU/DBIU

N9

BG0

P9

TEN
ALERT
PAR

T3

RD27 1 DDP@ 2 39_0402_5%

2 0.22U_0402_6.3V6KOBR@

RD10 1 OBR@ 2 39_0402_5%

DDR_A_MA7

RD22 1 OBR@ 2 39_0402_5%

DDR_A_CKE0

RD37 CD7
1K_0402_1% 0.1U_0201_10V6K

OBR@ OBR@

1

2

CD9
.047U_0402_16V7K

OBR@

1

2

RD1 1 OBR@2 1K_0402_5%

DDR_A_ALERT#

2 0.22U_0402_6.3V6KOBR@

RD9 1 OBR@ 2 39_0402_5%

DDR_A_MA6

RD25 1 OBR@2 39_0402_5%

DDR_A_BA1

CD6

0.1U_0201_10V6K

OBR@

1

2

CD3

3

1

CD3

5

1

CD3

7

1

CD3

9

1

CD4

1

1

2 0.22U_0402_6.3V6KOBR@

CD22 0.22U_0402_6.3V6KOBR@

CD28 0.22U_0402_6.3V6KOBR@

240_0201_1%

RD35 1 OBR@2

CD12 0.22U_0402_6.3V6KOBR@

RD13 1 OBR@ 2 39_0402_5%

DDR_A_MA10

CD27 0.22U_0402_6.3V6KOBR@

RD23 1 OBR@2 39_0402_5%

DDR_A_ACT#

CD49 OBR@

1U_0201_6.3V6

M

1

2

RD11 1 OBR@ 2 39_0402_5%

DDR_A_MA8

CD46 OBR@

1U_0201_6.3V6

M

1

2

CD16 0.22U_0402_6.3V6KOBR@

RD26 1 OBR@ 2 39_0402_5%

DDR_A_BG0

RD29 1 OBR@2 39_0402_5%

DDR_A_CLK0#

RD38 1 DDP@2 0_0201_5%

RD33 1 DDP@2 0_ 0201_5%

CD48 OBR@

1U_0201_6.3V6

M

1

2

CD42 OBR@

1U_0201_6.3V6

M

1

2

RD12 1 OBR@ 2 39_0402_5%

DDR_A_MA9

CD34 1 2 0.1U_0201_10V6K OBR@

CD36 1 2 0.1U_0201_10V6K OBR@
CD38 1 2 0.1U_0201_10V6K OBR@
CD40 1 2 0.1U_0201_10V6K OBR@

CD23 0.22U_0402_6.3V6KOBR@

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

CD45 @

1U_0201_6.3V6

M

1

2

RD24 1 OBR@2 39_0402_5%

DDR_A_BA0

CD2

.047U_0402_16V7K

OBR@

1

2

RD2 1 OBR@ 2 39_0402_5%

DDR_A_PAR

240_0201_1%

RD41 1 OBR@2

CD29 0.22U_0402_6.3V6K@

1 1 1 1 1

2 2 2 2 2

CD50@

10U 6.3V M X5R0402

1

2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Layout Note:
Place near JDIMM1.257,259

Layout Note:
Place near JDIMM1.258

DIMM Side

ESD

DDR4 - SO-DIMM (MEMORY CHANNEL B)

DDR_B_DQ48
DDR_B_DQ53

DDR_B_DQ42
DDR_B_DQ43

DDR_B_DQ51

DDR_B_DQ61

DDR_B_DQ0

DDR_B_DQ50

DDR_B_DQ58

DDR_B_DQ45
DDR_B_DQ46

DDR_B_DQ54
DDR_B_DQ55

DDR_B_DQ56
DDR_B_DQ57

DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_BG0
DDR_B_BG1

DDR_B_CLK0
DDR_B_CLK0#

DDR_B_BA1

DDR_B_ODT0
DDR_B_ODT1

DDR_B_WE#
DDR_B_CAS#
DDR_B_RAS#

DDR_B_BA0

DDR_B_CLK1
DDR_B_CLK1#

DDR_B_EVENT#

DDR_B_ACT#
DDR_B_PAR

DDR_B_ALERT#

DDR_B_MA4
DDR_B_MA5

DDR_B_MA2

DDR_B_DQ14

DDR_B_MA0
DDR_B_MA1

DDR_B_DQ23

DDR_B_DQ5
DDR_B_DQ7

DDR_B_DQ1
DDR_B_DQ4

DDR_B_DQS0#

DDR_B_DQS2
DDR_B_DQS2#

DDR_B_DQS1#

DDR_B_DQS1

DDR_B_DQS3#

DDR_B_DQ2
DDR_B_DQS0

DDR_B_DQS5#

DDR_B_DQ47
DDR_B_DQS5

DDR_B_DQS7
DDR_B_DQS7#

DDR_B_DQS6
DDR_B_DQS6#

DDR_B_DQS4
DDR_B_DQS4#

DDR_B_MA13

DDR_B_DQ3
DDR_B_DQ6

DDR_B_DQ31
DDR_B_DQS3

DDR_B_DQ8
DDR_B_DQ9

DDR_B_DQ12
DDR_B_DQ13

DDR_B_DQ11
DDR_B_DQ15

DDR_B_DQ62
DDR_B_DQ63

DDR_B_DQ59
DDR_B_DQ60

DDR_B_RST#

DDR_B_CKE0
DDR_B_CKE1

DDR_B_DQ10

DDR_B_DQ20
DDR_B_DQ22

DDR_B_DQ40
DDR_B_DQ41

DDR_B_DM2

DDR_B_DM0
DDR_B_DM1

DDR_B_DM3
DDR_B_DM4

DDR_B_DQ21
DDR_B_DQ16

DDR_B_DQ35
DDR_B_DQ37

DDR_B_DQ18

DDR_B_DQ19
DDR_B_DQ17

DDR_B_DQ36

DDR_B_DQ52
DDR_B_DQ49

DDR_B_DQ24
DDR_B_DQ29

DDR_B_DQ32
DDR_B_DQ33

DDR_B_DQ25
DDR_B_DQ28

DDR_B_DQ38
DDR_B_DQ39

DDR_B_DQ30

DDR_B_DQ34

DDR_B_DQ26
DDR_B_DQ27

DDR_B_DQ44

DDR_B_MA11
DDR_B_MA12

DDR_B_MA9
DDR_B_MA10

DDR_B_MA8

DDR_B_MA6
DDR_B_MA7

DDR_B_MA3

DDR_B_DQ[0..63]
DDR_B_DM[0..7]
DDR_B_MA[0..13]

+VREFB_CA

DDR_B_RST#

DDR_B_CS0#
DDR_B_CS1#

<5> DDR_B_ODT0
<5> DDR_B_ODT1

<5> DDR_B_WE#
<5> DDR_B_CAS#
<5> DDR_B_RAS#

<5> DDR_B_BG0
<5> DDR_B_BG1
<5> DDR_B_BA0
<5> DDR_B_BA1

<5> DDR_B_CLK0
<5> DDR_B_CLK0#
<5> DDR_B_CLK1
<5> DDR_B_CLK1#

<5>DDR_B_ACT#

<8> I2C_2_SDA
<8> I2C_2_SCL

DDR_B_DQS3 <5>
DDR_B_DQS3# <5>

DDR_B_DQS1 <5>
DDR_B_DQS1# <5>

DDR_B_DQS5 <5>
DDR_B_DQS5# <5>

DDR_B_DQS7 <5>
DDR_B_DQS7# <5>

DDR_B_DQS0 <5>
DDR_B_DQS0# <5>

DDR_B_DQS2 <5>
DDR_B_DQS2# <5>

DDR_B_DQS4 <5>
DDR_B_DQS4# <5>

DDR_B_DQS6 <5>
DDR_B_DQS6# <5>

<5>DDR_B_PAR
<5> DDR_B_ALERT#
<5> DDR_B_EVENT#
<5>DDR_B_RST#

<5> DDR_B_CKE0
<5> DDR_B_CKE1

DDR_B_DQ[0..63] <5>
DDR_B_DM[0..7]<5>
DDR_B_MA[0..13]<5>

<5> DDR_B_CS0#
<5> DDR_B_CS1#

+3VS

+1.2V

+1.2V

+VREFB_CA

+3VS

+2.5V

+0.6VS

+1.2V+1.2V

+2.5V

+0.6VS

+1.2V

+VREFB_CA

+3VS

Tiiitttllle

Siiize Documenttt Number

Sheettt

Securiiity Clllassiiifiiicatiiion

Compal SecretData

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...

Issued Date

Decipherii ed Date

LA-H131P

Rev

0...4

DDR4SO-DIMM

C

13 o fff 46Dattte::: Monday,,, November 05,,,2018

2018/11/05 2019/11/05

Compal Electronics,Inc.

100P_0402_50V8J

1 2

CD69 ESD@

CD78

2.2U_0402_6.3V6

M

1

2

CD55 NO_OBR@

10U 6.3V M X5R 0402

1

2

RD42
1K_0402_1%

1 2

CD79 @

0.1U_0201_10V6

K

1

2

CD75

10U 6.3V M X5R 0402

1

2

1

+

CD68

330U_D3_2.5VY_R6M

@

2

CD80

0.1U_0201_10V6

K

1

2

CD61

1U_0201_6.3V6

M

12

RD43
1K_0402_1%

1 2

CD59 NO_OBR@

10U 6.3V M X5R 0402

1

2

REVE RSE

JDIMM1A

LOTES_ADDR0205-P001A02~D

SP07001HW0L

ME@

114

116

150
145

115
113

139

137

140

138

109
110

12
33
54

75
178
199
220

DM0#/DBI0#
DM1#/DBI1#
DM2#/DBI2#
DM3#/DBI3#
DM4#/DBI4#
DM5#/DBI5#
DM6#/DBI6#
DM7#/DBI7#

241

96

CB0_NC
CB1_NC
CB2_NC
CB3_NC
CB4_NC
CB5_NC
CB6_NC
CB7_NC
DQS8(T)
DQS8#(C)

92

91
101
105

88

87
100
104

97

95

155

ODT0
ODT1

BG0
BG1
BA0
BA1

161

143

149
157

253

144
133

146
120
119
158
151
156
152

132
131
128
126
127
122
125
121

8
7

41
42
24
25
38
37

50
49
62
63

20

46
45
58
59

70
71
83
84
66
67

21

79
80

174
173
187
186
170
169
183
182

4

195
194
207
208
191
190
203
204

216
215

3

228
229
211
212
224
225

237
236
249
250

16

232
233
245
246

17

28
29

11

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

DQS0(T)

DQS0#(C)

13

32

DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

DQS1(T)

DQS1#(C)

34

53

A0
A1 DQ16
A2 DQ17
A3 DQ18
A4 DQ19
A5 DQ20
A6 DQ21
A7 DQ22
A8 DQ23
A9 DQS2(T)
A10_AP DQS2#(C)
A11
A12
A13
A14_WE#
A15_CAS#
A16_RAS#

ACT#

55

74

DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

DQS3(T)

DQS3#(C)

76

177

DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39

DQS4(T)

DQS4#(C)

179

198

DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47

DQS5(T)

DQS5#(C)

200

DM8#/DBI8# DQS6#(C)

219

DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55

DQS6(T)

221

240

DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS7(T)

DQS7#(C)

242

134

PARITY
ALERT#
EVENT#
RESET#

108

CK0(T)
CK0#(C)
CK1(T)
CK1#(C)

CKE0
CKE1

S0#
S1#
S2#/C0
S3#/C1

162
165

256

260

166

SDA
SCL

SA2
SA1
SA0

254

CD77

0.1U_0201_10V6

K

1

2

CD76 @

10U 6.3V M X5R 0402

1

2

CD72

1U_0201_6.3V6

M

2 1

CD57

10U 6.3V M X5R 0402

1

2

CD62

1U_0201_6.3V6

M

12

CD60

1U_0201_6.3V6

M

12

CD63

1U_0201_6.3V6

M

12

CD81

1000P_0402_50V

7K

1

2

CD73

0.1U_0201_10V6

K

@

1

2

CD64

1U_0201_6.3V6

M

12

CD74

1U_0201_6.3V6

M

1

2

REVE RSE

JDIMM1B

LOTES_ADDR0205-P001A02~D

SP07001HW0L

ME@

111
112

VDD1

117

VDD2

118

VDD3

123

VDD4

124

VDD5

129

VDD6

130

VDD7

135

VDD8

VDD10

136

VDD9

VDDSPD

255

VREFCA

164

1
2

VSS1

5

VSS2

6

VSS3

9

VSS4

10

VSS5

14

VSS6

15

VSS7

18

VSS8

19

VSS9

22

VSS10

23

VSS11

26

VSS12

27

VSS13

30

VSS14

31

VSS15

35

VSS16

36

VSS17

39

VSS18

40

VSS19

43

VSS20

44

VSS21

47

VSS22

48

VSS23

51

VSS24

52

VSS25

56

VSS26

57

VSS27

60

VSS28

61

VSS29

64

VSS30

65

VSS31

68

VSS32

69

VSS33

72

VSS34

73

VSS35

77

VSS36

78

VSS37

81

VSS38

82

VSS39

85

VSS40

86

VSS41

89

VSS42

90

VSS43

93

VSS44

94

VSS45

VSS47

98

VSS46

262

141

VDD11

142

VDD12

147

VDD13

148

VDD14

153

VDD15

154

VDD16

159

VDD17

160

VDD19

VDD18

163

VTT

258
257

VPP2

VPP1

259

99

VSS48

102

VSS49

103

VSS50

106

VSS51

107

VSS52

167

VSS53

168

VSS54

171

VSS55

172

VSS56

175

VSS57

176

VSS58

180

VSS59

181

VSS60

184

VSS61

185

VSS62

188

VSS63

189

VSS64

192

VSS65

193

VSS66

196

VSS67

197

VSS68

201

VSS69

202

VSS70

205

VSS71

206

VSS72

209

VSS73

210

VSS74

213

VSS75

214

VSS76

217

VSS77

218

VSS78

222

VSS79

223

VSS80

226

VSS81

227

VSS82

230

VSS83

231

VSS84

234

VSS85

235

VSS86

238

VSS87

239

VSS88

243

VSS89

244

VSS90

247

VSS91

248

VSS92

251

VSS94

VSS93

252

GND1 GND2

261

CD54

10U 6.3V M X5R 0402

1

2

CD65 NO_OBR@

1U_0201_6.3V6M

12

CD56

10U 6.3V M X5R 0402

1

2

CD67 NO_OBR@

1U_0201_6.3V6M

12

CD71

10U 6.3V M X5R 0402

@

1

2

CD58 NO_OBR@

10U 6.3V M X5R 0402

1

2

CD66 NO_OBR@

1U_0201_6.3V6M

12

CD70

10U 6.3V M X5R 0402

1

2

5

5

4

4

3 2 1

1

D D

C C

B B

A A

From EC

W=20mils

eDP

W=20mils

W=60mils

Camera

Touch Screen

Microphone

EDP CONNECTOR

LCD POWER SWITCH

CAMERA POWER CIRCUIT

DISPLAY OFF

ESD COMPONENTS

DISPOFF#

DISPOFF#
EDP_HPD

DMIC_DAT

USB20_P3

USB20_N3

DMIC_CLK

From PCH

<7,28> ENBKL

<28> BKOFF#

<7> INVTPWM

<7>EDP_AUXN
<7>EDP_AUXP

<7> ENVDD

<7> EDP_TXP0
<7> EDP_TXN0

<7> EDP_TXP1
<7> EDP_TXN1

<7> EDP_HPD

<22> HUB_USB20_N1
<22> HUB_USB20_P1

<28> TS_DISABLE#

<9> USB20_N3
<9> USB20_P3

<21>DMIC_CLK
<21>DMIC_DAT

+3VS_CMOS

+3VS

+3VS

B+ +LEDVDD +LCDVDD_CONN

TOUCH SCREEN POWER CIRCUIT

+3VS +3VS_TS

+3VS +LCDVDD_CONN

+3VS_TS

+3VS_CMOS

+3VS

Title

Document Number

Date: Sheet

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPART MENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3 2

Issued Date

Deciphered Date

R e v

0.4

eDP/CAMERA

Size

B

14 of 46Monday, November 05,2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

LA-H131P

C4

1U_0201_6.3V6M

12

2

0.1U_0201_10V K X5R

EDP_AUXN_C

2 0.1U_0201_10V K X5R

EDP_AUXP_C

C230

0.1U_0201_10V6K

1

R3 1 @ 2 0_0603_5%

C3

4.7U_0402_6.3V6M

1

2

0_0805_5%@R9

1

2

C231
10U_0603_6.3V6M

@

1

2 2

DT6

L30ESDL5V0C6-4_SOT23-6

SC300004W00

@ESD@

6

I/O4

VDD

5

4

3

I/O2

GND

2

I/O1 I/O3

1

R7
100K_0402_5%

1

2

EM5203AJ-20 SOT23 5P

SA00008R900

OUT

3

OC

GND

4

EN

U5

5

IN

R264 1 @ 20_0603_5%

2 0.1U_0201_10V K X5R

EDP_TXP1_C

2 0.1U_0201_10V K X5R

EDP_TXN1_C

C7

4.7U_0805_25V6-K

@

1

2

R265
100K_0402_5%

@

1

2

C5

0.1U_0201_10V6K

1

1

+LCDVDD R21@

2

2

0_0805_5%

W=60mils

JEDP1

CVILU_CVS3402M1RM-NH

SP01002FV00

ME@

1

1

2
3

2

4

3

5

4

6

5

7

6

8

7

9

8

10

9

11

10

12

11

13

12

14

13

15

14

16

15

17

16

18

17

19

18

41

GND

42

GND

GND

43

44

GND

45

20

19

21

20

22

21

23

22

24

23

25

24

26

25

27

26

28

27

29

28

30

29

31

30

32

31

33

32

38

34

33

35

34

36

35

37

36

38

37

39

39
40 GND

40

C8 1
C9 1

C10

1

C11 1

C12

1

C13

1

2

0.1U_0201_10V K X5R

EDP_TXP0_C

2 0.1U_0201_10V K X5R

EDP_TXN0_C

C6
10U_0603_6.3V6M

@

1

2 2

U2
U74AHC1G08G-AL5-R_SOT353-5

SA00000OH00

@

2

B

A

1

4

Y

5

G P

3

R1

1

@ 20_0402_5%

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

W=40mils

HDMI DIFFERENTIAL SIGNALS

AUX LEVEL SHIFTER ESD COMPONENTS

EMI

HDMI CONNECTOR

HDMI POWER CIRCUIT

HDMI_HPDHDMI_HPD_R

HDMI_L_TX_P2

HDMI_L_TX_N2

HDMI_L_TX_P1

HDMI_L_TX_N1

HDMI_L_TX_N0

HDMI_L_TX_P0

HDMI_L_CLKP

HDMI_L_CLKN

HDMI_CTRL_DAT

HDMI_TX_N0

HDMI_TX_P0

HDMI_TX_P2

HDMI_TX_N2

HDMI_CLKN

HDMI_CLKP

HDMI_TX_N1

HDMI_TX_P1

HDMI_L_TX_P0
HDMI_L_TX_N1

HDMI_L_TX_P1
HDMI_L_TX_N2

HDMI_L_TX_P2

HDMI_L_CLKN
HDMI_L_CLKP

HDMI_L_TX_N0

HDMI_L_CLKP
HDMI_L_CLKN

HDMI_L_CLKP
HDMI_L_CLKN

HDMI_L_TX_N0HDMI_L_TX_N0

HDMI_L_TX_P0HDMI_L_TX_P0

HDMI_L_TX_N1

HDMI_L_TX_N2
HDMI_L_TX_P1

HDMI_L_TX_P2

+5V_Display +5V_Display

HDMI_HPD HDMI_HPD

<7>APU_DP1_HPD

<7>APU_DP1_CTRL_DAT

<7>APU_DP1_CTRL_CLK

<7>APU_DP1_P0

<7>APU_DP1_N0

<7>APU_DP1_P1

<7>APU_DP1_N1

<7>APU_DP1_P2

<7>APU_DP1_N2

<7>APU_DP1_P3

<7>APU_DP1_N3

+3VS

+5VS +5V_Display

+3VS

+5V_Display

HDMI_CTRL_DAT

HDMI_CTRL_CLK

+5V_Display+3VS

+3VS

Securiiity Clllassiiifiiicatiiion

Compal SecretData

Compal Electronics, Inc.

Issued Date

2018/11/05

Deciiiphered Date

2019/11/05

Tiiitttllle

HDMI

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...

Siiize

C

Documenttt

Number

LA-H131P

R ev

0...4

Dattte:::

Monday,,, November 05,,, 2018

Sheettt

15 o fff 46

L05ESDL5V0NA-4 SLP2510P8 ESD

SC300002C00

@ESD@

1

1

2

2

4

4

5

5

3

3

8

DH2

9

10

8

9

7

7

6

6

E

C

QH1

MMBT3904_NL_SOT23-3

SB000014T00

2

B

3 1

12

CH112 0.1U_0201_10V K X5R

RH14 RH15

2.2K_0402_5% 2.2K_0402_5%

HDMI_CTRL_CLK

12

JHDMI1

19
18

HP_DET

17

+5V

16

DDC/CEC_GND

15

SDA

14

SCL

13

Reserved

12

CEC

11

CK-

10

CK_shield GND

22

9

CK+ GND

21

8

D0- GND

20

7

D0_shield GND

6

D0+

5

D1-

4

D1_shield

3

D1+

2

D2-

1

D2_shield

D2+

LOTES_AHDM0064-P001A

DC232007B00

ME@

23

L05ESDL5V0NA-4 SLP2510P8 ESD

SC300002C00

@ESD@

1

1

2

2

4

4

5

5

3

3

8

DH3

HDMI_L_TX_P2

9

10

HDMI_L_TX_N2

8

9

HDMI_L_TX_P1

7

7

HDMI_L_TX_N1

6

6

RH2
200K_0402_5%

@

1 2

RH12

4.7K_0402_5%

12

CH10

0.1U_0201_10V K X5R

1

2

UH1

S IC AP2330W-7 SC59 3P PWR SW

SA00004ZA00

GND

2

OUT

3

IN

1

RH13

4.7K_0402_5%

12

CH312 0.1U_0201_10V K X5R

RH1 1 2 150K_0402_5%

CH412 0.1U_0201_10V K X5R

LH2

HCM1012GH900BP_4P

SM070002R00

EMI@

1 2

34

QH3B
2N7002KDW 2N SC88-6

SB00000EO00

3

5

4

CH712 0.1U_0201_10V K X5R

QH3A
2N7002KDW 2N SC88-6

SB00000EO00

61

2

CH612 0.1U_0201_10V K X5R

LH3

HCM1012GH900BP_4P

SM070002R00

EMI@

1 2

34

G

D

S

QH2
2N7002KW_SOT323-3

SB000009Q80

2

13

CH812 0.1U_0201_10V K X5R

RH8 1
RH9 1
RH10 1
RH11 1

2 499_0402_1%
2 499_0402_1%
2 499_0402_1%
2 499_0402_1%

HCM1012GH900BP_4P

SM070002R00

EMI@

1 2

LH4

4 3

CH512 0.1U_0201_10V K X5R

L05ESDL5V0NA-4 SLP2510P8 ESD

SC300002C00

@ESD@

1

1

HDMI_CTRL_CLK

2

2

HDMI_CTRL_DAT

7

7

6

6

4

4

5

5

3

3

8

DH1

HDMI_CTRL_CLK

9

10

HDMI_CTRL_DAT

8

9

RH3
100K_0402_5%

12

CH212 0.1U_0201_10V K X5R

CH9

0.1U_0201_10V K X5R

@

1

2

LH1

HCM1012GH900BP_4P

SM070002R00

EMI@

1 2

34

RH4 1
RH5 1
RH6 1
RH7 1

2 499_0402_1%
2 499_0402_1%
2 499_0402_1%
2 499_0402_1%

A

A

B

B

C D E

E

1 1

2 2

3 3

4 4

BT

WLAN

Note: The real behavior of BT_DISABLE are
BT_DISABLE=LOW, BT=OFF

BT_DISABLE=HIGH, BT=ON

NGFF - WLAN / BT CONNECTOR (KEY-E)

WLAN POWER CIRCUIT

SUSCLK_R
WL_RST#
BT_DISABLE_R
WLAN_DISABLE_R

<9> USB20_P5
<9> USB20_N5

<9> CLK_PCIE_WLAN
<9> CLK_PCIE_WLAN#

<9> CLKREQ_WLAN#

<6> PCIE_ARX_DTX_P5
<6> PCIE_ARX_DTX_N5

<6> PCIE_ATX_C_DRX_P5
<6> PCIE_ATX_C_DRX_N5

UART_0_ARXD_DTXD <9>

UART_0_ATXD_DRXD <9>

RTC_CLK_R <9>
APU_PCIE_RST# <8,17,20>
APU_BT_OFF# <9>

APU_WL_OFF# <9>

EC_TX<28>
EC_RX <28>

+3VS +3VS_WLAN

+3VS_WLAN

Title

Size

Document Number

Date: Sheet

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPART MENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C D

Issued Date

Deciphered Date

R e v

0.4

WLAN /BT

16 of 46Monday, November 05,2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

LA-H131P

RWL1 1 @ 20_0805_5%

RWL2 1@

2

0_0402_5%

CLKREQ_WLAN#_R

RWL6

1

@

2

0_0402_5%

RWL7 1 @ 2 0_0402_5%

JWLAN1

1
3

GND_1

5

USB_D+

7

USB_D-

9

GND_7

11

SDIO_CLK

13

SDIO_CMD

15

SDIO_DAT0

17

SDIO_DAT1

19

SDIO_DAT2

21

SDIO_DAT3

23

SDIO_WAKE

SDIO_RST

PER_TX_N0

25
27

GND_33

29

PET_RX_P0

31

PET_RX_N0

33

GND_39

35

PER_TX_P0

37

GND_45

39

REFCLK_P0

41

REFCLK_N0

43
45

GND_51

47

CLKREQ0#

49

PEWAKE0#

2

3.3VAUX_2

4

3.3VAUX_4

6

LED1#

8

PCM_CLK

10

PCM_SYNC

12

PCM_OUT

14

PCM_IN

16

LED2#

18

GND_18

20

UART_WAKE

22

UART_TX

COEX3

24

UART_RX

26

UART_RTS

28

UART_CTS

30

CLink_RST

32

CLink_DATA

34

CLink_CLK

36

38

COEX2

40

COEX1

42

SUSCLK(32KHz)

51

GND_57

53

RSVD/PCIE_RX_P1

55

RSVD/PCIE_RX_N1

57

GND_63

59

RSVD/PCIE_TX_P1

61

RSVD/PCIE_TX_N1

63

GND_69

65

RSVD_71

67

RSVD_73

GND_75

69

GND2

BELLW_80152-3221

SP070013E00

ME@

44

PERST0#

46

W_DISABLE2#

48

W_DISABLE1#

50

I2C_DAT

52

I2C_CLK

54

I2C_IRQ

56

RSVD_64

58

RSVD_66

60

RSVD_68

62

RSVD_70

64

3.3VAUX_72

66

3.3VAUX_74

68

GND1

RWL12
100K_0402_5%

1

2

@

UART_0_ATXD_R_DRXD

RWL5

1

2 0_0402_5%

CWL1

4.7U_0402_6.3V6M

1

@

UART_0_ARXD_R_DTXD

RWL4

1

2 0_0402_5%

CWL2

0.1U_0201_10V KX5R

@

1

2

2

RWL81 @ 2 0_0402_5%
RWL9 1 @ 2 0_0402_5% RWL10

1
@20_0402_5% RWL111 @
2 0_0402_5%

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

PU at APU side

PCIE / SATA MUX (PERICOM PI3PCIE3212ZBEX)

Reserved prevent power leakage.

NGFF - SSD CONNECTOR (KEY-M)SSD POWER CIRCUIT

PCIE RESET

PCIE_DET

PLT_RST_SSD#

CLK_PCIE_SSD1#
CLK_PCIE_SSD1

PLT_RST_SSD#

PCIE_ARX_RD_DTX_P6

PCIE_ATX_RD_DRX_N6
PCIE_ATX_RD_DRX_P6

PCIE_ARX_RD_DTX_P6
PCIE_ARX_RD_DTX_N6

SATA_ARX_DTX_P0
SATA_ARX_DTX_N0

SATA_ATX_C_DRX_P0
SATA_ATX_C_DRX_N0

SATA_ARX_C_DTX_P0
SATA_ARX_C_DTX_N0

PCIE_ATX_C_DRX_N1
PCIE_ATX_C_DRX_P1

PCIE_ARX_DTX_N1
PCIE_ARX_DTX_P1

PCIE_ATX_C_DRX_N2
PCIE_ATX_C_DRX_P2

PCIE_ARX_DTX_P2

PCIE_ARX_DTX_N2

PCIE_ATX_C_DRX_N3
PCIE_ATX_C_DRX_P3

PCIE_ARX_DTX_N3
PCIE_ARX_DTX_P3

PCIE_ARX_DTX_P0
PCIE_ARX_DTX_N0
PCIE_ATX_C_DRX_P0
PCIE_ATX_C_DRX_N0

PCIE_DET PCIE_DET_R

PCIE_DET_R

CLKREQ_SSD1# <9>
<9> CLK_PCIE_SSD1#
<9> CLK_PCIE_SSD1

<8,16,20> APU_PCIE_RST#

<9>SSD_RST#

<6> SATA_ARX_DTX_P0
<6> SATA_ARX_DTX_N0
<6> SATA_ATX_DRX_P0
<6> SATA_ATX_DRX_N0

<6> PCIE_ARX_DTX_N1
<6> PCIE_ARX_DTX_P1

<6> PCIE_ATX_C_DRX_N1
<6> PCIE_ATX_C_DRX_P1

<6> PCIE_ATX_C_DRX_N2
<6> PCIE_ATX_C_DRX_P2

<6> PCIE_ARX_DTX_N2
<6> PCIE_ARX_DTX_P2

<6> PCIE_ATX_C_DRX_N3
<6> PCIE_ATX_C_DRX_P3

<6> PCIE_ARX_DTX_N3
<6> PCIE_ARX_DTX_P3

<6> PCIE_ARX_DTX_P0
<6> PCIE_ARX_DTX_N0
<6> PCIE_ATX_C_DRX_P0
<6> PCIE_ATX_C_DRX_N0

<8>PCIE_DET

+3VS_SSD1

+3VS_SSD1

+3VS

+3VS_SSD1

+3VS_SSD1

+3VS

+3VS

Tiiitttllle

Siiize Documenttt Number

Securiiity Clllassiiifiiicatiiion

Compal SecretData

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...

Issued Date

Deciiiphered Date

LA-H131P

R ev

0...4

SSD

C

Sheettt 17 offf 46Dattte::: Monday,,, November 05,,,2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

CSSD1
10U 6.3V M X5R 0402

1

2

JSSD1

BELLW_80159-322 1

SP070018L00

ME@

1 2
3

GND 3P3VAUX

4

3P3VAUX

6

7

PERn3

5

GND

9

PERp3

11

GND

13

PETn3

NC

8

NC

10

DAS/DSS#

12

3P3VAUX

14

15

PETp3 3P3VAUX

16

17

GND 3P3VAUX

18

19

PERn2 3P3VAUX

20

21

PERp2

23

GND

25

PETn2

27

PETp2

29

GND

31

PERn1

33

PERp1

35

GND

37

PETn1

39

PETp1

41

GND

43

PERn0/SATA-B+

45

PERp0/SATA-B-

47

GND

49

PETn0/SATA-A-

51

PETp0/SATA-A+

NC

22

NC

24

NC

26

NC

28

NC

30

NC

32

NC

34

NC

36

NC

38

DEVSLP

40

NC

42

NC

44

NC

46

NC

48

NC

50

PERST#

52

53

GND CLKREQ#

54

55

REFCLKN PEWake#

56

GND

57

REFCLKP

NC

NC

58

59 60
61

NC SUSCLK(32kHz)

62

63

PEDET(NC-PCIE/GND-SATA) 3P3VAUX

64

65

GND

3P3VAUX

3P3VAUX

66

GND

67

GND

68

GND2

GND1

69

UMUX1

PI3PCIE3212ZBEX_TQFN20_2P5X4P5

SA00006EJ00

Function PD

SEL

Ax to Bx L

L

(SATA)

Ax to Cx L

H

(PCIe)

Hi-Z H X

1

PD

2

VDD

SEL

9

3

A0+ 4PCIE_ARX_RD_DTX_N6

A1-

A1+ 8PCIE_ATX_RD_DRX_N6

A0-

7

PCIE_ATX_RD_DRX_P6

13

C0-

14

C0+

15

B1-

5

PGND

21

19
18

B0+

16

B1+

17

B0-

C1-

12

C1+

GND

GND

20

GND

11

VDD

10

VDD

6

@

RSSD3
100K_0402_5%

12

RSSD2 1 @ 2 0_0402_5%

CSSD2

0.1U_0201_10V6K

1

2

U3
MC74VHC1G08DFT2G_SC70-5

SA00000OH00

@

1

IN1
IN2

2

3

O

4

G P

5

CSSD3

0.01U_0402_16V7K

@

1

2

CHD24 12 0.01U_0402_16V7K
CHD25 12 0.01U_0402_16V7K

1

2

RSSD8 1 @ 2 0_0402_5%

CSSD4 @ CSSD5 @ CSSD6

0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K

1 1

2 2

2 0.01U_0402_16V7K

RSSD9 1 @ 2 10K_0402_5%

SATA_ATX_DRX_P0

CHD271

SATA_ATX_DRX_N0 CHD261

2 0.01U_0402_16V7K

RSSD1 1 @ 2 0_0805_5%

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

580mA

HDD CONNECTOR

HDD POWER CIRCUIT

+5VS_HDD

+3V_HDD

SATA_ATX_C_DRX_P1
SATA_ATX_C_DRX_N1

SATA_ARX_C_DTX_N1
SATA_ARX_C_DTX_P1

<6> SATA_ATX_DRX_P1
<6> SATA_ATX_DRX_N1

<6> SATA_ARX_DTX_N1
<6> SATA_ARX_DTX_P1

+5VS_HDD+5VS

Tiiitttllle

Siiize Documenttt Number

Securiiity Clllassiiifiiicatiiion

Compal SecretData

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...

Issued Date

Deciiiphered Date

LA-H131P

R ev

0...4

HDD

C

Sheettt 19 offf 46Dattte::: Monday,,, November 05,,,2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

RHD5 1 @ 2 0_0805_5%

CHD5

10U_0402_6.3V6M

1

CHD6

0.1U_0201_10V6K

1

2 2

SATA_ATX_DRX_P1

CHD16 1 2 0.01U_0402_16V7K

SATA_ATX_DRX_N1

CHD18 1 2 0.01U_0402_16V7K

SATA_ARX_DTX_N1

CHD17 1 2 0.01U_0402_16V7K

SATA_ARX_DTX_P1

CHD19 1 2 0.01U_0402_16V7K

T2408

JHDD1

SDAN_603006-022041

DC01000CE00

ME@

1
2 GND
3 A+
4 A-
5 GND

6 B-
7 B+

GND

8
9

V33

10

V33

11

V33

12 GND
13 GND
14 GND
15 V5
16 V5
17 V5
18 GND
19 Reserved
20 GND

21

V12

22

V12

V12

24

GND

23

GND

IO ConnectorUSB Charger For Sub Board USB3.0 Connector

W=80mil s W=80mil s

USB Power Switch For Sub Board USB3.0 Connector (Non-AOU Port)

Caps on Sub Board

80mil

USB Charger Power Swit chesImprove +5 VAL W Power Rippl e

USB20_N1_ C
USB20_P1_C

PCIE_ATX _C_DRX_P4
PCIE_ATX _C_DRX_N4

CLKREQ_ SD#
NOVO#

ON/OFF#
PWR_L ED#

PWR_BATT_ LOW#

USB20_ N2

USB_EN#

APU_PCIE_RST#

CLK_PCI E_SD
CLK_PCIE_SD#

PCIE_AR X_DTX_P4
PCIE_ARX_DTX_ N4

USB3_ARX _DTX_P1

USB3_ATX_DRX_P2
USB3_ATX_DRX_N2

LID_SW#

<28,2 9,34,3 6> 3 V/5VALW_ PG

<28> PW R_LED#
<28> PWR _BATT_LOW#

<28> USB_E N#

USB20_ P2

<9> USB2 0_N2
<9> USB 20_P2

USB_OC1 # <9 >

<9> CLK _PCIE_SD
<9> CLK _PCIE_SD#
<9> CL KREQ_SD#

<28> NOVO#

<28,2 9> ON/O FF#

<6> PCI E_ARX_DTX_P4
<6> PC IE_ARX_DTX_ N4

<28> USB_ CHG_STATUS#

<9> USB_ OC0#

<28> USB _CHG_ILI M_SEL

<28> USB _CHG_EN
<28> USB_CHG_ CTL1
<28> USB_CHG_ CTL2
<28> USB_CHG_ CTL3

<9> USB3 _ATX_DRX_P1
<9> USB 3_ATX_DRX_N1

<9> USB3 _ARX_DTX_P1
<9> USB 3_ARX_DTX_N1

<9> USB3 _ATX_DRX_P2
<9> USB 3_ATX_DRX_N2

<9> USB3 _ARX_DTX_P2
<9> USB 3_ARX_DTX_N2

<26,2 8> LI D_SW#

<8,16,17> APU_PCI E_RST#

<6> PC IE_ATX_C_ DRX_P4
<6> PC IE_ATX_C_ DRX_N4

+5VALW

+VL

+5VALW_ CHG

+VL

+CHGRTC_R

+VL

+5VALW +5VALW_USB2

+3VALW

+3VS

+3VL

+5VALW_ USB1+5VALW_ CHG

+5VALW_ USB1

+5VALW_ USB2

Tiiitttllle

SecuriiitttyClllassiiifffiiicatttiiion

Compalll Secret Data

Rev

0...4

USB3.0 Type-A/IO_CONN

Siiize Documenttt Numberrr

Custttom

Sheettt 20 o fff 46Dattte::: Monday,,, Novemberrr 05,,,2018

IIIssued Dattte

2018/11/05////

Decipii he red Dattte

2019///11///05

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND TRADE
SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT EXCEPT
AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...

Compal Electronics, Inc.

LA-H131P

R110

10K_0402_5%

2 1

C56

22U_0603_6.3V6M

2 1

R108

10K_0402_5%

2 1

R117

10K_0402_5%

C52
22U_06 03_6.3V6M

1

2

R115 1 2 100K _0402_5%

R111 1 @ 2 0_06 03_5%

R112 2 @ 1 0_0402 _5%

USB_OC0 #_R

R122 1 @ 2 0 _0402_5 %

2A/Active Low

U9

G524B2T11U_ SOT23-5

SA0000 7BW00

3

2

OUT

GND

IN

5 1

EN(EN#) OC#

4

C64

22U_0603_6.3V6M

@

2

C54

1

0.1U_0 201_10V K X5R

@

2

C66

0.1U_0 201_10V K X5R

1

2

D

1

C53

0.1U_0 201_10V K X5R

2

@

SQ3

2N7002 KW_SOT323-3

SB000 009Q80

EC_ON_R

2

G

13

C63

22U_0603_6.3V6M

@

2

C48 @

22U_0603_6.3V6M

1

2

C62

22U_0603_6.3V6M

@

2

G

D

S

+5VALW

Q2
ME2301 DC-G_SOT23-3

SB000 013I00

2

13

C49 @

22U_0603_6.3V6M

1

2

C61

22U_0603_6.3V6M

@

2

C50

22U_0603_6.3V6M

1

2

C58

10U6.3 VM X5 R0402

@

2

C57

22U_0603_6.3V6M

2

R113 1 2 2.7M_ 0402_1%

U7

S ICS N170200 1RTERW QFN 16PLOAD SW ITCH

SA0000 B0V00

1
9

IN

13

STATUS#

4

FAULT#

5

ILIM_S EL

6

EN

7

CTL1

8

CTL2

12

OUT 10USB20_ P1_C

DP_IN 11USB20_ N1_C

DM_IN

2

DM_ OUT

3

USB20_ N1< 9>

DP_ OUT

15

USB20_ P1 <9>

ILIM_L O

16

ILIM_HI

14

T-PAD

CTL3 GN D

17

C59

10U6.3 VM X5 R0402

@

2

C55

22U_0603_6.3V6M

@ @ @

2 2

R118 1 @ 2 0_04 02_5%

C51

4.7U_04 02_6.3V6M

1

2

R114 1 2 24.9K _0402_1%

JIO1

ACES_51619-04501-001

SP011 807060

ME@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

22

23

21

22

20

21

19

20

G2

46

47

23

24

24

25

25

26

26

27

27

28

28

29

29

30

USB3_ARX _DTX_N2

30

31

USB3_ARX _DTX_P2

31

32

32

33

USB3_ATX_ DRX_N1

33

34

USB3_ATX_ DRX_P1

34

35

35

36

USB3_ARX _DTX_N1

36

37

37

38

38

39

43

44

42

43

41

42

40

41

39

40

44

45 G1

45

C60

47U_0805_6.3V6M

@

1 1 1 1 1 1 1 1 1 1

2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Place nea r Pin18

ALC3287

wide 40MIL

GND GNDA

Speaker Connector PN
SP020 00 RR0 0

Headpho ne

Speak er

wide 40MIL

Place nea r Pin20

Place nea rPi n3Place nea r Pin40

ESD protection need s to be placed near connector side

SPEAK 4 ohm : 40 MIL
SPEAK 8 ohm : 20 MIL

ESD

EMI

W=40m ils
W=40m ils

Place nea r Pin20

HGNDA / HGNDB , W=60mils

SPEAKER

EMI

PC Beep

MISC.

EMI

COMBO JACK (NORMAL OPEN)

+1.8VS -->+1.8VDD_CODEC

+5VS --> +5VDDA_CODEC +1.8VS --> +IOVDD_CODEC +3VS --> +3VDD_CODEC

PC_ BEEP

SPK_R2+

SPK_R1-

SPK_L1-

SPK _L2+

PC_ BEEP

DMIC_DA T

HP_O UTR

HP_O UTL

EXT_ MIC _SLE EVE

EXT_MIC_ RING2

+5V S_P VDD

PDB

SPK _L2+ _CONN

SPK _L1- _CON N

HP_O UTR

HP_O UTL

HGNDB

EXT_MIC_SL EEVE
EXT_MIC_ RING2

HPO UT_L
HPO UT_R

HGNDA

PLUG _IN

DMIC_ CLK_ R

HPO UT_R

PLUG _IN

SPK _R1- _CON N

SPK _R2+ _CONNSPK_ R2+

SPK _R1- _CON NSPK_ R1-

SPK_L1­SPK_L2+

SPK _L1- _CON N
SPK_L2+_CO NN

HGND A
HPO UT_L

HGNDB

<8> HDA _SDI N0

<8> HDA _SDO UT_A UDIO

<8> HDA _BITC LK_ AUDIO

<8> HDA _SY NC_AU DIO

<14> DMIC _DAT

<14> DMIC _CLK

<28> EC_ MUTE #

<28> BEEP#

<8> HDA _SP KR

+IOV DD_ CODE C+1.8 VS

GNDA

GNDAGNDAGNDA

+5V S

+5V DDA_ CODE C

+3V DD_C ODEC

+1. 8VDD _CODE C

+1. 8VDD _CODE C

+5V S +5V DDA_ CODE C

GNDA

+3V S + 3VD D_CO DEC

GNDA

+5V S

SPK _R2+ _CONN

GNDA GNDA

+1.8 VS +1. 8VDD _COD EC

GNDA

GNDA

GNDA

Tiiitttllle

Securiiity Clllassiiifiiicatiiion

Compal Secret Data

THIIIS SHEET O F ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PRO PERTY OF C OMPAL ELECTRONIIICS,,, IIINC... A ND CONTAIIINS CONFIIIDENTIIIAL AND
TRADE S ECR ET IIINFORMATIIION... THIIIS SHEE T MAY NOT B E TRAN SFER ED FR OM T HE C USTOD Y OF THE COM PETE NT DIIIVIIISIIION OF R& D DEP ARTMENT
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NO R T HE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSE NT OF COMPAL ELECTRONIIICS,,, IIINC...

Issued Date

Deciphii ered Date

LA-H131P

R ev

0...4

HD Audio Codec_ALC3287-CG

Size Documenttt Num ber

Custttom

Sheettt 21 o fff46Dattte::: Monday,,, November 05,,, 2018

2018/11/05 2019/11/05

Compal Electronics,Inc.

@ESD@

DA3 S CA00004 300

S ZEN ROW CEST23L C5VB

C/A S OT-23 USB2 .0

2

3

1

CA1 0 1 2 1U _02 01_6.3 V6M

CA7 1 2 2 .2U_ 0402 _6.3V 6M

RA9 10K_ 0402 _5%

1 2

33_ 0402_ 5%

1 RA6 2

1 BLM1 5BD 121SN 1D_2P S M010 009U00EMI@ RA 14 2

RA3 0
0_0 402_5 %

@

12

CA1 1 1 2 1U_ 0201 _6.3V 6M

SM0 1000 NY00

RA7 1 EMI @ 2 BLM 15PX 221SN 1D_2P

CA18

220P_0402_50V7

K

1 2

@EM I@

1 33_ 0402 _5%

CA8 1 2 2 .2U_ 0402 _6.3V 6M

SD0

284 70A8 0EMI@ R A15 1 2 47_ 0402 _5%

1 BLM1 5BD 121SN 1D_2P S M010 009U00EMI@ RA 13 2

JSPK1

ACE S_50 271- 0040N-001

SP0 2000 TS00

ME@

1

2
3
4

5

1
2
3
4

GND1
GND2

6

CA20

0.1U_0 201_10V

K X5R

1

2

CA9 1 2 2. 2U_ 0402_ 6.3V 6M

CA1 4

0.1 U_020 1_10V K X5R

1

2

CA19

220P_0402_50V7

K

1 2

RA1 9 1 @ 2 0 _06 03_5%

10K_0 402_5%

RA18

1 2

EMI@ CA2

1

2

@ES D@

1

CA3 0
100 0P_0 402_50 V7K

2

RA17

10K_0402_5%

@ @

1 2

CA28

2.2U_0 402_6.3V6M

2 1

1000P _0402_50V7K

1

2

SD0 2 847 0A80EMI@ RA 16 1 2 4 7_0 402_5%

EXT_ MIC _SLE EVE

RA1 0

1

2 2.2 K_0 402_5%

RA8 0_ 0402_ 5%@

1 2

CA6

2.2U_0 402_6.3V6M

12

1000P_0402_50V7

K

EMI@ CA 3

1

2

EXT_MIC_ RING2

RA1 1

1

2 2.2 K_0 402_5%

RA2 5 1 @ 2 0 _04 02_5%

CA16

1000P_0402_50V7

K

1000P_0402_50V7

K

EMI@ CA 5

1000P_0402_50V7

K

EMI@ CA 4

1

2

CA25

0.1U_0 201_10V

K X5R

1

2

RA1 1 @ 2 0_0 603_ 5%

RA2 1 1 @ 2 0 _04 02_5%

1

RA27

1

RA29

2

4.7 K_04 02_5%

2

4.7 K_04 02_5%

RA2 1 @ 2 0_0 603_ 5%

RA3 1 1 @ 2 0_0 402_ 5%

RA2 6 1 @ 2 0_0 402_ 5%

RA2 8 1 @ 2 0_0 402_ 5%

RA3 2 1 @ 2 0_0 402_ 5%

RA2 0 1 @ 2 0 _06 03_5%

CA1 22 P_04 02_50 V8J RA 32

@EMI@

JHP1

YUQIU_ PJ567-F07M1BE-F

SP0 1160 9088

ME@

6

6

3 G/M
1 L/R

4

M/G

2

R/L

5

5

7

GND

ALC 3287 -CG_M QFN4 8_6X 6

UAUDIO 1

SA0 000B YY00

I2C_DATA

6

I2C_C LK

7

SYNC

15

BCLK

14

SDATA-O UT

17

DC_DET/EPAD

13

NC

11

NC

10

NC

9

NC

12

SPDIF-O UT/GPI O2/DM IC-DA TA34/DM IC-CLK -IN

1

GPIO0/DM IC-DA TA12

4

GPIO1/DM IC-CLK

5
2

PDB

JD1

48

JD2

47

5VSTB

33

+5V DDA_ CODE C_5VS TB

AVDD1

40

AVSS1

37

CPVDD/AVDD2

20

DVDD

3

18

DVDD-IO

MIC2-VR EFO-R

29

AVSS2

22

PCBEEP

34

MIC2-L/ RING2

30

MIC2-R /SLEEVE

31

LINE2 -L

36

LINE2-R

35

SPK-OUT-L+

42

SPK-OUT-L-

43

SPK-OUT-R-

44

SPK-OUT-R+

45

HPO UT-L

27

HPO UT-R

26

VRE F

38

LDO 1-CAP

39

MIC2-CA P

32

MIC2-VR EFO-L

28

8

NC

PVDD1

41

PVDD2

46
49

Therma l_Pad

CPVEE

25

CBN

24
23

CBP

LDO 2-CAP

CA1 3 1 2 2.2 U_040 2_6. 3V6ML DO2 21

LDO 3-CAP

SDATA-IN

HDA _SDI N0_AU DIO

16

ESD@

DA4 S CA00004 300

S ZEN ROW CEST23L C5VB

C/A S OT-23 USB2 .0

2

3

1

RA4 1 @ 2 0_0 603_ 5%

AZC099-04S. R7G_S OT23-6

SC3 0000 1G00

@ES D@

I/O4

6

VDD

5

4

DA1

I/O2

3

GND

2

I/O3 I/O 1

1

CA2 9 0.1 U_02 01_10 V K X5 R

1 2

CA21

0.1U_0 201_10V

K X5R

1

2

CA1 5 1 2 2.2 U_040 2_6. 3V6ML DO3 19

+IOV DD_ CODE C

RA1 2 1 @ 2 0_0 805_ 5%

RA5 1 @ 2 0_0 603_ 5%

CA22

0.1U_0 201_10V

K X5R

1

2

CA17

1000P_0402_50V7

K

GNDA GND A GN DA GNDA

EMI@ EM I@ EMI @ EMI@

1 1

2 2

5

5

4

4

3 2 1

1

D D

C C

B B

A A

Pin 18 TEST:
1 : Switch mode.
2: Chip will be put in test mode. NC
: Normal hub operation.

TOUCH SCREEN

FINGER PRINTER

Close to P5Close to P9

Close to P14 Close to P28

Close to P21

APU

USB HUB POWER CIRCUIT

USB 2.0 HUB (GENESYS GL850G-OHY50)

CRYSTAL (12 MHz)

HUB MISC.

Touch Screen By Pass Circuit (Co-Layout with U SB HUB )
(Mount this BOM Structure (TS@) when US B HUB (HUB@ ) is not used)

Should Replace with 33pF

Should Replace with 33pF

RREF

HUB_X2

HUB_X1
HUB_X2

HUB_RESET#

HUB_RSELF

HUB_RESET#

HUB_RSELF

HUB_USB20_N1 <14>
HUB_USB20_P1 <14>

HUB_USB20_N2 <27>
HUB_USB20_P2 <27>

USB20_P4 <9>

USB20_N4<9>

+3VS_HUB

+3VS_HUB

+3VS

Title

Size

Document Number

Date: Sheet

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPART MENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3 2

Issued Date

Deciphered Date

R e v

0.4

USB2.0 HUB

B

22 of 46Monday, November 05,2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

LA-H131P

Y1
12MHZ_12PF_7V12000011

SJ10000C210

HUB@

3

3

1

HUB_X1

1

GND GND

2 4

CHUB3 HUB@

1U_0201_6.3V6M

1

2

CHUB2 HUB@

0.1U_0201_10V6K

1

2

CHUB4 HUB@

0.1U_0201_10V6K

1

2

RHUB4

100K_0402_5%

HUB@

1

2

CHUB11HUB@

0.1U_0201_10V6

K

1

2

CHUB6 HUB@

0.1U_0201_10V6K

1

2

CHUB8
1U_0201_6.3V6M

HUB@

1

2

CHUB7 HUB@

10U_0402_6.3V6M

1

2

CHUB5 HUB@

0.1U_0201_10V6

K

1

2

UHUB1

GL850G-OHY50_QFN28_5X5

SA000066320

HUB@

1

DM0

2

DP0

3

DP1

DM1

4

5

AVDD

6

DP2

DM2

7

8

9

AVDD

12

DP3

DM3

13

14

DP4

DM4

16

15

RESET#

17

18

OVCUR4#

21

AVDD

OVCUR3#

19

22

PGANG

23

PSELF

OVCUR1#/SMC

24

OVCUR2#/SMD

20

25

SDA

26

TEST/SCL

27

DVDD

V33

28

V5

GND RREF

29

10

X2

11

X1

RHUB61 HUB@ 2 10K_0402_5%

CHUB1 HUB@

1U_0201_6.3V6M

1

2

+3VALW +3VS_HUB

RHUB1

2

HUB@

1

0_0603_5%

RHUB2 2@ 10_0603_5%

USB20_TS_N1

RHUB10 1TS@ 2 0_0201_5%

USB20_N4

USB20_TS_P1

RHUB11 1TS@ 2 0_0201_5%

USB20_P4

USB20_TS_N1

RHUB12

1

TS@

2

0_0201_5%

HUB_USB20_N1

USB20_TS_P1

RHUB13

1

TS@

2

0_0201_5%

HUB_USB20_P1

CHUB9

20P_0402_50V8

HUB@

1

2

RHUB71 HUB@ 2 1K_0402_5%

1

CHUB10
20P_0402_50V8

HUB@

2

RHUB5
680_0402_1%

HUB@

1

2

RHUB3
47K_0402_5%

@

1

2

5

5

4

4

3 2 1

1

D D

C C

B B

A A

PD#_1_U1P3_U1_B_EQ1 P3_U1_A_DE1P3_U1_B_DE0 P3_U1_B_DE1 P3_U1_A_EQ0 P3_U1_A_EQ1 P3_U1_A_DE0P3_U1_B_EQ0 TEST3_U1 I2C_EN1_U1

USB3_ARX_RD_DTX_P0
USB3_ARX_RD_DTX_N0

USB3_ATX_RD_DRX_P0
USB3_ATX_RD_DRX_N0

P3_U1_A_EQ1
P3_U1_A_DE0

P3_U1_A_EQ0
P3_U1_A_DE1

P3_U1_B_EQ1
P3_U1_B_DE0

P3_U1_B_EQ0
P3_U1_B_DE1

PD#_1_U1
TEST3_U1

I2C_EN1_U1

+3VALW+3VALW +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW

+3VALW +3VALW

Title

Date: Sheet

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPART MENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3 2

Issued Date

Deciphered Date

Document Number

LA-H131P

R e v

0.4

Type-C_USB3.0_Re-Driver

Size

B

23 of 46Monday, November 05,2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

RT19

4.7K_0402_5%

@

1

2

ZZZ

USB3.0 Re-Driver_PERICOM

X76XXXXXXXX

X76_PERICOM@

RT34

4.7K_0402_5%

@

1

2

RT26

4.7K_0402_5%

@

1

2

ZZZ

USB3.0Re-Driver_PARADE

X76XXXXXXXX

X76_PARADE@

RT20

4.7K_0402_5%

@

1

2

UT4

PI3EQX7502AIZDEX_TQFN24_4X4

SA00006WV00

@

1

VDD

15

NC

16

19

13

VDD

GPAD

RXB-

RXB+

20

10

NC

NC

2425

EN_B#

21

EN_A#

NC

EQ_B

18

DE_B

17

NC

14

RXD_EN

7

5

NC

TXB-

USB3_ARX_C_RD_DTX_N0

11

TXB+

USB3_ARX_C_RD_DTX_P0

12

6

EQ_A

2

DE_A

RXA-

USB3_ATX_C_RD_DRX_N0

8

RXA+

USB3_ATX_C_RD_DRX_P0

9

22

TXA-

TXA+

23

3

NC

4

ZZZ

USB3.0Re-Driver_TI

X76XXXXXXXX

X76_TI@

RT35

4.7K_0402_5%

@

1

2

RT32

4.7K_0402_5%

@

1

2

CT37

0.1U_0201_10V KX5R

RD@

1

2

CT34

0.01U_0402_16V7K

RD@

1

2

RT21

4.7K_0402_5%

@

1

2

RT33

4.7K_0402_5%

@

1

2

RT22

4.7K_0402_5%

@

1

2

RT27

4.7K_0402_5%

@

1

2

2 0.33U_0402_10V6K RD@

RT31

4.7K_0402_5%

@

1

2

RT29

4.7K_0402_5%

@

1

2

1

0.22U_0402_6.3V6K RD@

RT38 1 @ 2 0_0402_5%

RT23

4.7K_0402_5%

@

1

2

RT30

4.7K_0402_5%

@

1

2

RT28

4.7K_0402_5%

@

1

2

CT38 1
CT40 1

2 0.33U_0402_10V6K RD@

CT35

1

1 0.22U_0402_6.3V6K RD@

CT39

2

CT41 2

RT39 1 @ 2 0_0402_5%

CT36 1

2

0.1U_0201_10V K X5R RD@

2 0.1U_0201_10V K X5R RD@

RT24

4.7K_0402_5%

@

1

2

RT17

4.7K_0402_5%

@

1

2

RT36

4.99K_0402_1%

@

1

2

TI@

UT4TI@
SN65LVPE512RGE
R SA00008M500

RT28TI@
0_0402_5%

RT20TI@
0_0402_5%

RT33TI@

4.7K_0402_5%

RT35TI@

4.7K_0402_5%

RT18TI@

4.7K_0402_5%

PARADE@

UT4PARADE@
PS8713BTQFN24GTR2-A2

SA00005OR30

RT23PARADE@

4.7K_0402_5%

PERICOM@

UT4 PERICOM@
PI3EQX7502AIZDEX

TQFN24

SA00006WV00

RT33

PERICOM@

4.7K_0402_5%

RT22

PERICOM@

4.7K_0402_5%

RT26

PERICOM@

4.7K_0402_5%

RT37

4.7K_0402_5%

@

1

2

RT18

4.7K_0402_5%

@

1

2

RT25

4.7K_0402_5%

@

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

TYPE-C - CC+MUX (RTS5448-GR)

Rp Configuration

MUX MISC.

For C_VBUS
(Power Switch Enable Pin)

For C_VBUS
(Power Switch OCP Pin)

CC1_5448_CONN CC2_5448_CONN

CC2_5448_CONN
VBUS_EN_5448
OCP_DET_5448_R
VMON_5448

TYPEC_LIMIT_CTL1 TYPEC_LIMIT_CTL2

USB3_MRX_C_DTX_P2
USB3_MRX_C_DTX_N1
USB3_MRX_C_DTX_P1
USB3_ARX_C_MTX_N0
USB3_ARX_C_MTX_P0
USB3_ATX_C_MRX_N0
USB3_ATX_C_MRX_P0
USB3_MTX_DRX_N1
USB3_MTX_DRX_P1
USB3_MTX_DRX_P2
USB3_MTX_DRX_N2

TYPEC_LIMIT_CTL1
TYPEC_LIMIT_CTL2
DIR_SET

USB3_MRX_DTX_P2
USB3_MRX_DTX_N1
USB3_MRX_DTX_P1
USB3_MRX_DTX_N2

USB3_MRX_DTX_P2
USB3_MRX_DTX_N1
USB3_MRX_DTX_P1
USB3_ARX_DTX_N0
USB3_ARX_DTX_P0
USB3_ATX_DRX_N0
USB3_ATX_DRX_P0

TYPEC_LIMIT_CTL1 <28>
TYPEC_LIMIT_CTL2 <28>

USB3_MRX_DTX_N2 <25>

CC2_5448_CONN <25>
VBUS_EN_5448 <25>

OCP_DET_5448_R <25>

<25> USB3_MRX_DTX_P2
<25> USB3_MRX_DTX_N1
<25> USB3_MRX_DTX_P1

<9> USB3_ARX_DTX_N0

<9> USB3_ARX_DTX_P0
<9> USB3_ATX_DRX_N0
<9> USB3_ATX_DRX_P0

<25> USB3_MTX_C_DRX_N1
<25> USB3_MTX_C_DRX_P1
<25> USB3_MTX_C_DRX_P2
<25> USB3_MTX_C_DRX_N2

<25> CC1_5448_CONN

+LDO_3V3_5448+VCON_IN_5448

+5V_IN_5448

+5VALW +VCON_IN_5448 +5VALW +5V_IN_5448

+LDO_3V3_5448 +LDO_3V3_5448

+5V_IN_5448

Tiiitttllle

Siiize Documenttt Number

Securiiity Clllassiiifiiicatiiion

Compal SecretData

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...

Issued Date

Decipherii ed Date

Rev

0...4

Type-C_RTS5448

C

Sheettt 24 o fff46Dattte::: Monday,,, November 05,,,2018

2018/11/05 2019/11/05

Compal Electronics,Inc.

LA-H131P

RT5

10K_0402_5%

1 2

RT1 1 @ 2 0_0603_5%

12

OCP_DET_5448

1 @ 2

OCP_DET_5448_R RT11

0_0603_5%

CT26

0.33U_0402_10V6K

DIR_SET

USB3_MRX_C_DTX_N2

1 2

RT14 @

10K_0402_5%

2 1

RT2 1 @ 2 0_0603_5%

12

RT6 @

10K_0402_5%

12

CT1
220P_0402_50V8J

12

CT2
220P_0402_50V8J

12

RT7 @

10K_0402_5%

12

CT6

4.7U_0402_6.3V6M

SE00000SO00

1

CT3
10U_0402_6.3V6M

SE00000UD00

1

2

CT10 1 2 0.22U_0402_6.3V6K

UT1

RTS5448-GR QFN 24P TYPE-C

SA0000AXR00

REXT

14

CC2

15

VBUS_EN

16

OCP_DET

17

VCON_IN

13

LDO_3V3

20

21

RP_SEL_M1

22

RP_SEL_M0

23

NC

24

C_RX2_1P/2N

25

GND

SSRX_1P/2N
SSRX_1N/2P

INPUT

SSTX_1P/2N
SSTX_1N/2P

1
2

C_RX2_1N/2P

3

C_RX1_1P/2N

4

C_RX1_1N/2P

5
6
7
8
9

C_TX1_1P/2N

10

C_TX1_1N/2P

11

C_TX2_1N/2P

12

C_TX2_1P/2N

CC1

5V_IN

19

12

VMON

18 RT3 1 2 6.2K_0402_1%

CT23 1 2 0.33U_0402_10V6K
CT24 1 2 0.33U_0402_10V6K
CT25 1 2 0.33U_0402_10V6K
CT7 1 2 0.33U_0402_10V6K
CT8 1 2 0.33U_0402_10V6K
CT9 1 2 0.22U_0402_6.3V6K

RT10

4.7K_0402_5%

12

USB3_MTX_C_DRX_N1

CT11 1 2 0.1U_0201_10V6K

USB3_MTX_C_DRX_P1

CT12 1 2 0.1U_0201_10V6K

USB3_MTX_C_DRX_P2

CT13 1 2 0.1U_0201_10V6K

USB3_MTX_C_DRX_N2

CT14 1 2 0.1U_0201_10V6K

CC1_5448_CONN

RT61

10K_0402_5%

1 2

CT4

0.1U_0201_10V K X5R

1

2

+VBUS_5448

RT8

200K_0402_1%

VMON_5448

RT12

10K_0402_1%

12

RT4

10K_0402_5%

1 2

RT62 1
RT63 1
RT64 1
RT65 1

2 220K_0402_5%
2 220K_0402_5%
2 220K_0402_5%
2 220K_0402_5%

CT5

0.1U_0201_10V KX5R

1

2 2

5

5

4

4

3 2 1

1

D D

C C

B B

A A

Over Current Protection Pin:
If O ver Current Occurred - F rom High to L ow.

20 Volts Protection Circuit

ESD

ESD COMPONENTS TYPE-C CONNECTOR

USB2.0

USB3_MTX_C_DRX_P1
USB3_MTX_C_DRX_N1

USB3_MRX_DTX_N2
USB3_MRX_DTX_P2

USB20_P0_R
USB20_N0_R

USB20_N0_R
USB20_P0_R

USB3_MRX_DTX_P1
USB3_MRX_DTX_N1

CC2_5448_CONN

USB3_MRX_DTX_P1
USB3_MRX_DTX_N1

USB3_MRX_DTX_P2
USB3_MRX_DTX_N2

USB20_N0_R

USB20_N0

USB20_P0

USB3_MTX_C_DRX_N1
USB3_MTX_C_DRX_P1

USB3_MTX_C_DRX_P2
USB3_MTX_C_DRX_N2

USB20_P0_R

USB20_N0_R

USB20_P0_R

CC2_5448_CONN

CC1_5448_CONN

<24> USB3_MRX_DTX_N2
<24> USB3_MRX_DTX_P2

USB3_MTX_C_DRX_N2 <24>
USB3_MTX_C_DRX_P2 <24>

<24> CC1_5448_CONN

<9> USB20_N0

<9> USB20_P0

<24> OCP_DET_5448_R
<24> VBUS_EN_5448

+VBUS_5448_R +VBUS_5448_R

+VBUS_5448 +VBUS_5448_R

+VBUS_5448

+VBUS_5448

+5VALW

Title

Document Number

Date: Sheet

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPART MENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3 2

Issued Date

Deciphered Date

R e v

0.4

Type-C_CONNECTOR

Size

B

25 of 46Monday, November 05,2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

LA-H131P

CT20 1

USB3_MRX_DTX_P1 <24>
USB3_MRX_DTX_N1 <24>

2 0.47U_0402_25V6K

CT15

10U_0402_6.3V6M

SE00000UD00

1

2

L05ESDL5V0NA-4 SLP2510P8 ESD

SC300005900

ESD@

1

1

USB3_MTX_C_DRX_N1

2

2

USB3_MTX_C_DRX_P1

4

4

USB3_MTX_C_DRX_P2

5

5

USB3_MTX_C_DRX_N2

3

3

8

DT1

9

10

8

9

7

7

6

6

RT16
16K_0402_1%

20V_PRTCT@

1

2

JUMP_43X79

1

JT1 @

1 2

2

CT17
10U_0603_25V6M

@

1

2

L05ESDL5V0NA-4 SLP2510P8 ESD

SC300005900

ESD@

1

1

USB3_MRX_DTX_P1

2

2

USB3_MRX_DTX_N1

4

4

USB3_MRX_DTX_P2

5

5

USB3_MRX_DTX_N2

3

3

8

DT2

9

10

8

9

7

7

6

6

UT3

B1 C2

VINT VBUS

FAULT

B3

A1

A2

ILIM

A3

GND

C3

EN GND

D3

GND

NX5P3090UK_WLCSP12

SA00009LF00

20V_PRTCT@

C1 D1

B2

VINT VBUS

D2

VINT

VBUS

CT16

10U_0603_25V6M

20V_PRTCT@

1

2

DT5

L30ESD24VC3-2_SOT23-3

SCA00001G00

ESD@

2

3

1

CT33 SGA00001E10

@

150U_B2_6.3VM_R35M

1

+

2

DRAPH_UB11245-B200B-1H

SP061806060

ME@

A2 B11

JUSBC1

A1

GND

GND

B1

B3

USB3_MTX_C_DRX_N2

GND

B12

A3

SSTXP1

SSTXN1

A4

VBUS

A5

CC1

A6
A7

DP1

DN1

A8

SBU1

A9

VBUS

A10
A11

SSRXN2

SSRXP2

A12

GND

SSTXP2

SSTXN2

B2

USB3_MTX_C_DRX_P2

SSRXP1

B10

SSRXN1

B9

VBUS

B8

SBU2

B7

DN2

B6

DP2

B5

CC2

B4

VBUS

1
2 GND
3 GND

GND

4

GND

5

GND

6

GND

DLM0NSN900HY2D_4P

SM070005U00

EMI@

1

1

4

3 4

3

LT1

2

2

RT15

10K_0402_5%

20V_PRTCT@

1

2

G517G1TO1U_TSOT23-5

SA00009XD00

UT2

5

IN

2

3

EN(#EN) GND

4

FLAG

OUT

1

<24> USB3_MTX_C_DRX_P1
<24> USB3_MTX_C_DRX_N1

CT19 1

2 0.47U_0402_25V6K

CC1_5448_CONN

CT22

1

CC2_5448_CONN <24>

2

10U_0402_6.3V6M

AZC099-04S.R7G_SOT23-6

SC300005Y00

ESD@

I/O4

6

VDD

5

4

DT4

I/O2

3

GND

2

I/O1 I/O3

1

CT21

1 2

0.47U_0402_25V6K

CT18
10U_0402_6.3V6M

1

2

FAN

THERMISTOR

Close to APU Close to DDR

Close to Charger

LID

Close to UTS1

Close to VRAM

Close to Charger CHOKE

Address 1001_101xb

+5VS_FAN1

LID_SW#

REMOTE1+

REMOTE1-

REMOTE2+

REMOTE2-

REMOTE1+
REMOTE1­REMOTE2+
REMOTE2-

<28> EC_FAN_PWM1
<28> EC_FAN_SPEED1

<20,28> LID_SW#

EC_SMB_CK2 <7,28>
EC_SMB_DA2 <7,28>

+5VS

+3VALW

THERMAL SENSOR

+3VS

+3VS

Tiiitllle

Siiize Document Number

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUT HORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

R ev

0.4

FAN/THERMISTOR

Custom

Sheet 26 o f 46Date: Monday, November 05, 2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

LA-H131P

12

RTS7
10K_0402_5%

@

12

CHS1
10P_0402_50V8J

1

14@

2

@

RF1 1 2 0_0603_5%

12

12

12

2200P_0402_25V7K

B

C

QTS2
MMST3904-7-F_SOT323-3

SB000002R00

E

EX_THM@

1

REMOTE2+

@ CTS2 2

3

+EC_VCCA

RTS3

16.5K_0402_1%

CUST_TEMP3

<28> CUST_TEMP3

RTS6
100K +-1% 0402 B25/50 4250K

SL200002H00

ECAGND

12

+EC_VCCA

RTS2

16.5K_0402_1%

CUST_TEMP2

<28> CUST_TEMP2

RTS5
100K +-1% 0402 B25/50 4250K

SL200002H00

ECAGND

12

CTS3

2200P_0402_25V7K

EX_THM@ REMOTE1-

1

2

EX_THM@

1

CTS5

0.1U_0201_10V6K

2

C

QTS1
MMST3904-7-F_SOT323-3

SB000002R00

E

EX_THM@

1

2

B

3

UHS1 14@
APX8132AI-TRG_SOT23-3

SA00008K800

VDD

2

GND

1

VOUT

3

CF1

10U 6.3V M X5R 0402

1

2

REMOTE1+

@ CTS1

2200P_0402_25V7K

2 1

CTS4

2200P_0402_25V7K

EX_THM@ REMOTE2-

1

2

JFAN1

1

ACES_50271-0040N-001

SP02000TS00

ME@

1

2

2

3

3

4

4

GND1

5

GND2

6

+EC_VCCA

RTS1

16.5K_0402_1%

CUST_TEMP1

<28> CUST_TEMP1

RTS4
100K +-1% 0402 B25/50 4250K

SL200002H00

ECAGND

12

UTS1 EX_THM@

DN1

3

DP1

2

VDD

1

6

ALERT#

8

DP2

4

DN2 GND

EMC1403-2-AIZL-TR_MSOP10

SA000046C00

5

THERM#

7

SMDATA

9

SMCLK

10

1

CHS2

0.1U_0201_10V6K

14@

2

KEYBOARD BACKLIGHT

ESD

TOUCH PAD

FINGER PRINTER (RESERVED)

KEYBOARD

ESD

BATTERY LED

Place on Top

S340_15"

S340_14"

+TP_VCC

TP_INT#

KSI[0..7]
KSO[0..17]

KSO15
KSO10
KSO11
KSO14
KSO13
KSO12

KSO3
KSO6
KSO8
KSO7
KSO4
KSO2
KSI0
KSO1
KSO5
KSI3
KSI2
KSO0
KSI5
KSI4
KSO9
KSI6
KSI7

KSO16

KSI1

PWR_CAPS_LED
CAPS_LED#_R

+3VALW_3VS_FP

<8>TP_INT#

<28> TP_DISABLE#

KSO[0..17] <28>

KSI[0..7]<28>

<28> KB_MUTLI_KEY

<28> NUM_LED#

<22> HUB_USB20_P2
<22> HUB_USB20_N2

<28> KB_BL_PWM

<8> I2C_3_SCL_R
<8> I2C_3_SDA_R

<28> BATT_CHG_LED#

<28> BATT_LOW_LED#

+3VS

+3VS

+3VS

+3VALW

+5VS

+5VS_KBL

+5VALW

+VL

+5VS

<28> CAPS_LED#

+5VS_KBL

Tiiitttllle

Siiize Documenttt Number

Securiiity Clllassiiifiiicatiiion

Compal SecretData

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...

Issued Date

Decipherii ed Date

Rev

0...4

KB/KBL/FP/TP/LED

C

Sheettt 27 offf 46Dattte::: Monday,,, November 05,,,2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

LA-H131P

12

CKBL2

0.1U_0201_10V KX5R

KBL@

1

2

RKB1 1 @ 2 0_0402_5%

JKB2

ACES_51612-0320M-001

SP011410151

ME@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

GND1

GND2

33

34

31

32

32

CKBL3

0.01U_0402_16V7K

KBL@

1

2

LED1

LTW-C193TS5-C_WHITE

SC50000BB10

21

JFP1

ACES_51522-00801-001

SP01001AE00

ME@

1
2

1

3

2

4

3

5

4

6

5

8

9

8

7 G2

7

6 G1

10

RKB2 1 2 470_0402_5%

JKBL2

ACES_51570-00401-P02

SP01002LF00

ME@

1
2
3
4
5

1
2
3
4
G1
G2

6

A

LED2

LTST-C191KFKT-2CA_ORANGE

SC500005930

21

RTP3

1K_0402_5%

12

@

CTP1

1

1U_0201_6.3V6M

2

CFP1

0.1U_0201_10V K X5R

FP@

RTP1 1 @ 2 0_0402_5%

DFP1

L03ESDL5V0CC3-2_SOT23-3

@ESD@

2

3

1

CKBL1

10U_0402_6.3V6M

@

1

2

RFP2 1 @ 2 0_0402_5%

RKBL1
10K_0402_5%

KBL@

12

RKB5 1

KSO17

2 470_0402_5%

NUM_LED#_R

KBL@

RKBL21 2 30K_0402_1%

RTP4 RTP2
1K_0402_5% 4.7K_0402_5%

12

CKB1

0.1U_0201_10V K X5R

@ESD@

1

2

JTP1

ACES_51522-00801-001

SP01001AE00

ME@

1

3

4

2

3

1

2

4

5

7

8

8

5

6 G1

6

7 G2

9

10

BATT_CHG_LED#

RS1 1

2 412_0402_1%

RFP1 1 @ 2 0_0402_5%

BATT_LOW_LED#

RS3 1

2 523_0402_1%

CTP2CTP3

150P_0402_50V8J 150P_0402_50V8J

1 1

2 2

JKBL1

ACES_52501-00401-W01

SP011806072

ME@

1
2
3 5

6

1
2
3 G1
4 G2

4

DTP1

PSOT24C_SOT23-3

@ESD@

2

3

1

G

D

S

QKBL1
ME2301DC-G_SOT23-3

KBL@

2

13

ESD

20mil

ESD

Embedded Controller

EMI

3V/5VALW_PG_R

3V/5VALW_PG_R

LID_SW#

KSO17

KSO16

SUSP#

SYS_PWRGD_EC

KSO1

KSO0
KSO2
KSO4

KSO3

KSI4

KSI1

KSI6

KSI5
KSI7

KSO15

KSO14

KSI2

KSI0

KSI3

KSO8

KSO12

KSO10

KSO13

KSO11

KSO9

LPC_RST#_R

KSO5
KSO6
KSO7

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2

EC_FAN_SPEED1

EC_SMB_DA2

KSI[0..7]

KSO[0..17]

NOVO#

CLKRUN#

1.8VS_PWR_EN

VCOUT1_PROCHOT#

VCIN1_AC_IN

USB_EN#

ON/OFF#

EC_MUTE#

0.8VS_PWR_EN

1.8VS_PWR_EN

VCIN1_BATT_TEMP

+VCC_IO2

EC_SMB_DA1
EC_SMB_CK1

0.8VS_PWR_EN

SYSON

EC_RST#

SYS_PWRGD_EC

ESD

KB_RST#

LPC_RST#_R

SYSON

LID_SW#

ON/OFF#

EC_RSMRST#

PWR_BATT_LOW#
EC_THERMTRIP#

EC_FAN_SPEED1
EC_SMB_CK2
EC_SMB_DA2

3V/5VALW_PG <20,29,34,36>

<8>PBTN_OUT#

<9>LPC_AD0

<9> LPC_AD3
<9> LPC_AD2
<9> LPC_AD1

<27> KSI[0..7]

<27> KSO[0..17]

<8>PM_SLP_S3#

BEEP# <21>
EC_FAN_PWM1 <26>

VCIN1_BATT_TEMP <32,33>

NOVO# <20>
TP_DISABLE# <27>

USB_EN# <20>

ENBKL <7,14>

0.8VS_PWR_EN <29>

1.8VS_PWR_EN <29>
VCIN0_PH1 <32>

CUST_TEMP1 <26>

EC_RSMRST# <8>

VCIN1_AC_IN <33>
EC_ON <34>
ON/OFF# <20,29>
LID_SW# <20,26>
SUSP# <29,35>
NUM_LED# <27>

<9>KB_RST#
<9>SERIRQ
<9>LPC_FRAME#

<9> EC_SCI#
<9> CLKRUN#

<9>LPC_RST#_R

<32,33> EC_SMB_CK1
<32,33> EC_SMB_DA1

<7,26> EC_SMB_CK2
<7,26> EC_SMB_DA2

<8,33,36>PM_SLP_S5#

<8>SYS_PWRGD_EC

<16> EC_RX

<16> EC_TX

<26> EC_FAN_SPEED1

<9>LPC_CLK0_EC

USB_CHG_ILIM_SEL <20>

<27> KB_BL_PWM

<20> USB_CHG_STATUS#

<20> USB_CHG_CTL1
<10> EC_CLEAR_CMOS#
<20> USB_CHG_CTL3
<20> USB_CHG_EN
<20> USB_CHG_CTL2

<27> KB_MUTLI_KEY

<20> PWR_BATT_LOW#

VCOUT0_MAIN_PWR_ON <34>
BKOFF#<14>
TYPEC_LIMIT_CTL1 <24>
TYPEC_LIMIT_CTL2 <24>

H_PROCHOT#<7,38>

<7>EC_THERMTRIP#

EC_MUTE# <21>
BATT_CHG_LED# <27>
CAPS_LED# <27>
PWR_LED# <20>
BATT_LOW_LED# <27>
SYSON <35,36>
VR_ON <37,38>
APU_RST#_EC <7>

<33> VCOUT1_PROCHOT#

ADP_I <33>
CUST_TEMP3 <26>
TS_DISABLE# <14>
CUST_TEMP2 <26>

ECAGND

+EC_VCCA

+3VALW_EC

ECAGND

+5VALW

+3VS

+3VALW

+3VALW_EC

+3VL

+3VL

+EC_VCCA

+3VL +3VL

+3VALW_EC

+3VL

Tiiitttllle

Siiize Documenttt Number

Securiiity Clllassiiifiiicatiiion

Compal SecretData

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...

Issued Date

Decipherii ed Date

R ev

0...4

EC_ENE_KB9022

C

Sheettt 28 o fff46Dattte::: Monday,,, November 05,,,2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

LA-H131P

C78

ESD@
1 2 100P_0402_50V8J

1 2

L2
BLM15AX601SN1D_0402_2P

SM01000KL00

R70 1 @ 2 100K_0402_5%

R59 1 @ 2 4.7K_0402_5%

1 10K_0402_5%R642

C72

C77

ESD@
1 2 100P_0402_50V8J

KB_MUTLI_KEY

R79

1

2 10K_0402_5%

C74

1 2 100P_0402_50V8J
1 2 100P_0402_50V8J

C71

@ESD@

2 1 0.1U_0201_10V6K

C79

ESD@
1 2 100P_0402_50V8J

C233

0.1U_0201_10V6

K

1

R551 2 100K_0402_5%
R56 1 @ 2 10K_0402_5%

R63

1

2 2.2K_0402_5%

VCOUT1_PROCHOT#

R270 1 @

2 0_0402_5%

C232
100P_0402_50V8J

@

1

2

EC_PCIE_WAKE#

R57

1

2 10K_0402_5%

R61 1 @ 2 0_0402_5%

R62

1

2 2.2K_0402_5%

100P_0402_50V8J

C234 @

1

2

R71 1 @ 2 0_0402_5%

1 47K_0402_5%R60 2 @

ESD@

C75 1 2 0.1U_0201_10V KX5R

R541 2 10K_0402_5%

C81

@ESD@
1 2 100P_0402_50V8J

R65

1

2 100K_0402_5%

C84

4.7U_0402_6.3V6M

1

2

@EMI@ @EMI@

C73 2 1 22P_0402_50V8J R58 2 1 10_0402_5%

GPIO

ADInput

PWMOutput

PS2 Interface

SPI FlashROM

GPIOGPO

GPI

UEC1

KB9022QD_LQFP128_14X14

SA000075S30

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

6

PM_SLP_S3#/GPIO04

7

LPC_AD2

8

LPC_AD1

V

10

LPC & MISC

LPC_AD0

12

CLK_PCI_EC

13

PCIRST#/GPIO05

14

GPIO07

15

GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

AC_PRESENT/GPIO0D

20

EC_SCI#/GPIO0E

21

EC_VCCST_PG/GPIO0F

23

BEEP#/GPIO10

25

PWM2/GPIO11

26

EC_FAN_PWM/GPIO12

27

AC_OFF/GPIO13

28

FAN_SPEED1/GPIO14

29
30 FANFB1/GPIO15

31 EC_TX/GPIO16
32

EC_RX/GPIO17

NUM_LED#/GPIO1A

34

PCH_PWROK/GPIO18

36

SUSP_LED#/GPIO19

37

EC_RST#

38

CLKRUN#/GPIO1D

40

KSO0/GPIO20

41

KSO1/GPIO21

42

KSO2/GPIO22

43

KSO3/GPIO23

44

KSO4/GPIO24

Int.K/B

45

KSO5/GPIO25

Matrix

46

KSO6/GPIO26

47

KSO7/GPIO27

48

KSO8/GPIO28

49

KSO9/GPIO29

50

KSO10/GPIO2A

51

KSO11/GPIO2B

52

KSO12/GPIO2C

53

KSO13/GPIO2D

54

KSO14/GPIO2E

55
56

KSI0/GPIO30

57

KSI1/GPIO31

58

KSI2/GPIO32

59

KSI3/GPIO33

60

KSI4/GPIO34

61

KSI5/GPIO35

39

KSI7/GPIO37

62

KSI6/GPIO36

63

VCIN1_BATT_TEMP/AD0/GPIO38

64

VCIN1_BATT_DROP/AD1/GPIO39

65

ADP_I/AD2/GPIO3A

66

AD_BID/AD3/GPIO3B

AVCC

67

68

DA0/GPIO3C

AGND

69

DA Output

EN_DFAN1/DA1/GPIO3D

70

71

DA3/GPIO3F

DA2/GPIO3E

72

73

75

AD4/GPIO42

76

AD5/GPIO43

77
78

EC_SMB_CLK1/GPIO44

79

EC_SMB_DAT1/GPIO45

EC_SMB_DAT2/GPIO47

SM Bus

80

EC_SMB_CLK2/GPIO46

81

KSO15/GPIO2F

KSO17/GPIO49

82

KSO16/GPIO48

83

EC_MUTE#/PSCLK1/GPIO4A

84

USB_EN#/PSDAT1/GPIO4B

85

TP_DATA/GPIO4F

PSCLK2/GPIO4C

86

PSDAT2/GPIO4D

87

TP_CLK/GPIO4E

88

EC_CIR_RX/AD6/GPIO40

74

SYS_PWROK/AD7/GPIO41

89

GPIO50

90

BATT_CHG_LED#/GPIO52

91

CAPS_LED#/GPIO53

92

PWR_LED#/GPIO54

93

BATT_LOW_LED#/GPIO55

95

97

ENKBL/GPXIOA00

98

WOL_EN/GPXIOA01

99

100

EC_RSMRST#/GPXIOA03

101

GPXIOA04

102

VCIN1_ADP_PROCHOT/GPXIOA05

103

VCOUT1_PROCHOT#/GPXIOA06

104

VCOUT0_MAIN_PWR_ON/GPXIOA07

105

BKOFF#/GPXIOA08

106

GPXIOA09

107

PCH_PWR_EN/GPXIOA10 EC_PCIE_WAKE#

108

PWR_VCCST_PG/GPXIOA11

VCIN0_PH1/GPXIOD00

SPI DeviceInterface

ME_EN/GPXIOA02

109

110

VCIN1_AC_IN/GPXIOD01

112

GND

GND

GND

GND

GND

112435

94

113

EC_ON/GPXIOD02

114

ON/OFF#/GPXIOD03

115

LID_SW#/GPXIOD04

116

SUSP#/GPXIOD05

117

PECI/GPXIOD07

GPXIOD06

118

119

SYSON/GPIO56

121

122

PM_SLP_S4#/GPIO5E

123

PBTN_OUT#/GPIO5D

V18R/VCC_IO2

124

CC_LPC

VCC

VCC

VCC

VCC0

VCC

9223396111

125

MISO/GPIO5B

120

MOSI/GPIO5C

126

DPWROK_EC/GPIO59

VR_ON/GPIO57

127

SPICS#/GPIO5A

SPICLK/GPIO58

128

C76

@ESD@
1 2 0.1U_0201_10V6K

C82

@ESD@
2 1 100P_0402_50V8J

R66

1

2 100K_0402_5%

C67

0.1U_0201_10V6K

1

2

0.1U_0201_10V6K

1

2

C70

C235

0.1U_0201_10V6

K

1

2

R273 1 2 1K_0402_5%

C80

@ESD@
1 2 0.1U_0201_10V6K

R67 1 @ 2 100K_0402_5%

R274 1 2 1K_0402_5%

R53 1 @ 2 0_0603_5%

+3VALW_EC

R68

1

2 100K_0402_5%

C69

1000P_0402_50V

7K

1

L1
BLM15AX601SN1D_0402_2P

SM01000KL00

1 2

R69

1

2 100K_0402_5%

C68

1000P_0402_50V

7K

1

2 @ 2 @2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

+3VALW to +3VS / +5VALW to +5VS

DISCHARGE CIRCUIT

MISC.

+1.8VALW to +1.8VS / +0.8VALW to +0.8VS

+1.8VALW Discharge Circuit (Reserved)

Laser Barcode Area DDR Shielding Clip (Small) ON/OFF# Short Pads

DDR Shielding Clip (Large) Optical Orientation Checking Point

CPU Screw Hole

SSD Screw Hole WLAN Screw Hole

MISC. Screw Hole

RF - BY PASS / CROSS MOAT CAPS

1.8VALW_PWR_EN#

+3VALW_3VS

+5VALW_5VS

+1.8VALW_1.8VS

+0.8VALW_0.8VS

1.8VS_PWR_EN

0.8VS_PWR_EN

<28,35> SUSP#

<20,28,34,36> 3V/5VALW_PG

ON/OFF# <20,28>

<28> 0.8VS_PWR_EN

<28> 1.8VS_PWR_EN

+VL

+1.8VALW+5VALW

+5VALW

+3VALW

+3VS

+5VS

+0.8VALW

+1.8VALW

+1.8VS

+0.8VS

+VL

+1.8VS

+VL

+3VS

+1.8VS

+3VALW +3VS +3VALW

+5VALW +1.8VS +1.8VALW +1.8VS

+3VALW

+VL

+1.8VS

+3VALW

+3VS

+3VALW

+19VB_CHG +5VALW

+3VALW +3VS

+5VS

+19VB_3VLX_DDR

Tiiitttllle

Siiize Documenttt Number

Securiiity Clllassiiifiiicatiiion

Compal SecretData

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...

Issued Date

Decipherii ed Date

LA-H131P

Rev

0...4

Sheettt 29 o fff46Dattte::: Monday,,, November 05,,,2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

DC_DC/DISCHARGE/RF/MISC.

@

1

H5
HOLEA

H_3P2

1

CC93

0.1U_0201_10V6K

RF@

1

2

C242

10U_0402_6.3V6

M

@

1

2

U10

S IC JW7110DFNC#TRPBF DFN14 DUAL LOAD SW

SA0000BEL00

GND

11

6

VBIAS

4

ON2

5

9

VIN2

7

VIN2

CT1

12

14

VOUT2

VOUT2

8

VOUT1

VOUT1

13

VIN1
ON1

3

2

VIN1

1

CT2

10

GPAD

15

CC101
10P_0402_50V8J

@RF@

1

2

CODE3 @

CC87

0.1U_0201_10V6K

RF@

1

2

C95

0.1U_0201_10V K X5R

1

2

C88

0.1U_0201_10V K X5R

1

2

1

SHORTPADS

@

JP2 2 1 ON/OFF#

CC94

0.1U_0201_10V6K

RF@

1

2

1

C90

10U_0402_6.3V6

M

1

@

2

JUMP_43X79

@

1

J3

2 1

2

1

1

C239

0.1U_0201_10V K X5R

1

2

@

1

1

C98

0.1U_0201_10V K X5R

1

2

CC88

0.1U_0201_10V6K

RF@

1

2

1

J6

JUMP_43X79

@

1

2 1

2

@

JP3 2 1 ON/OFF#

SHORTPADS

H1 H2 H3
HOLEA HOLEA HOLEA

H_3P3 H_3P3 H_3P3

1

R74
100K_0402_1%

@

12

CC98

0.1U_0201_10V6K

@RF@

1

2

CC95

0.1U_0201_10V6K

RF@

1

2

1

BARCODE_10X10 BARCODE_6X6

CODE4 @

C243

0.1U_0201_10V K X5R

1

2

CC102

0.1U_0201_10V6K

@RF@

1

2

R75
22_0603_1%

@

1

1

CC89

0.1U_0201_10V6K

RF@

1

2

C240

10U_0402_6.3V6

M

1

@

2

U19

S IC JW7110DFNC#TRPBF DFN14 DUAL LOAD SW

SA0000BEL00

GND

11

6

VBIAS

4

ON2

5

9

VIN2
VIN2

7

CT1

12

14

VOUT2
VOUT2

8

VOUT1
VOUT1

132

ON1

3

VIN1
VIN1

1

CT2

10

GPAD

15

C93 1 2 2200P_0402_25V7K

FD1 FD2 FD3 FD4

1

CC96

0.1U_0201_10V6K

RF@

1

2

1

CC104
10P_0402_50V8J

@RF@

1

2

1

C91

0.1U_0201_10V K X5R

1

2

CC103

0.1U_0201_10V6K

@RF@

1

2

C244 1 2 1000P_0402_50V7K

CC83

0.1U_0201_10V6K

RF@

1

2

@

1

CC90

0.1U_0201_10V6K

RF@

1

2

@

1

JUMP_43X79

@

1

J2

2 1

2

@

1

@

1

@

1

CLIP1 CLIP3 CLIP4 CLIP12 HOLEA
HOLEA HOLEAHOLEA

@

1

@

1

C236

10U_0402_6.3V6

M

@

1

2

1

C94 1 2 1000P_0402_50V7K

@

1

CC84

0.1U_0201_10V6K

RF@

1

2

D

Q5A
2N7002KDW_SOT363-6

SB00000EO00

S

@

2

G

6 2

1

@

1

CC91

0.1U_0201_10V6K

RF@

1

2

CLIP2 CLIP5 CLIP6 CLIP7 CLIP8 CLIP10 CLIP11 CLIP13 HOLEA HOLEA
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA

@

1

1

C97

10U_0402_6.3V6

M

@

1

2

C241

0.1U_0201_10V K X5R

1

2

C237

0.1U_0201_10V K X5R

1

2

D

S

@

5 Q5B

G

2N7002KDW_SOT363-6

SB00000EO00

34

CC85

0.1U_0201_10V6K

RF@

1

2

H7
HOLEA

H_3P2

1

C96

10U_0402_6.3V6

M

@

1

2

CC92

0.1U_0201_10V6K

RF@

1

2

1

JUMP_43X79

@

1

1

J5

2

2

CODE1 @

CC100
10P_0402_50V8J

@RF@

1

2

C238

10U_0402_6.3V6

M

1

@

2

C89

10U_0402_6.3V6

M

1

@

2

CC99

0.1U_0201_10V6K

@RF@

1

2

C245 1 2 1000P_0402_50V7K

BARCODE_8X8 BARCODE_12X4

CODE2 @

H8 H9 H10 H11 H12 H13 H14 H16 H17
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
HOLEA

H_2P8 H_2P3 H_2P5 H_2P5 H_2P5 H_3P0X2P5 H_5P7X4P5 H_4P4 H_6P0

1

CC86

0.1U_0201_10V6K

RF@

1

2

5

5

4

4

3 2 1

1

D D

C C

B B

A A

Compal Electronics, Inc.

LA-G241P

+19V_APDIN

APDIN

+CHGRTC

+RTCBATT

+3VL

+19V_VIN

Tiiitllle

Siiize Document Number

Date:

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAYBE USED BY OR DISCLOSED TO ANY THIRDPARTYW ITHOUT PRIOR WRITT EN CONSENT OF COMPALELECTRONICS, INC.

3 2

Issued Date

Deciphered Date

R ev

0.4

PWR- DCIN / Vin Detector

Custom

Sheet 31 o f 46Monday, November 05, 2018

2018/11/05 2019/11/05

EMI@ PC103

100P_0402_50V8J

2 1

PL101

EMI@

5A_Z80_0805_2P

1 2

PR109

1K_0603_5%

1 2

EMI@ PC101

1000P_0402_50V7K

2 1

PF101

7A_32VDC_0437007.WRML

1 2

PR108

1.5K_0603_5%

1 2

+CHGRTC_R

ACES_50278-00401-001

JDCIN1

CONN@

1

2

3

G2
G1

4
3
2
1

6
5
4

EMI@ PC102

100P_0402_50V8J

2 1

LRB715FT1G_SOT323-3

1

2

PD101

3

PR107

45.3K_0603_1%

1 2

5A_Z80_0805_2P

PL102

EMI@

1 2

EMI@ PC104

1000P_0402_50V7K

2 1

5

5

4

4

3 2 1

1

D D

C C

B B

A A

Compal Electronics, Inc.

LA-G241P

PH201 under CPU botten side :
CPU thermal protection at 93 +-3 degree C
Recovery at 56 +-3 degree C

EC_SMCA

EC_SMDA

EC_SMB_DA1 <28,33>

EC_SMB_CK1 <28,33>

<28> VCIN0_PH1

VCIN1_BATT_TEMP <28,33>

+12.6V_BATT+

+3VALW

VMB2

+EC_VCCA

ECAGND

+3VL

Tiiitllle

Siiize Document Number

Date:

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAYBE USED BY OR DISCLOSED TO ANY THIRDPARTYW ITHOUT PRIOR WRITT EN CONSENT OF COMPALELECTRONICS, INC.

3 2

Issued Date

Deciphered Date

R ev

0.4

PWR- BATTERY CONN/OTP

Custom

Sheet 32 o f 46Monday, November 05, 2018

2018/11/05 2019/11/05

PL202

EMI@

5A_Z80_0805_2P

1 2

12

PR201

100_0402_1%

PR204

@200K_0402_1%

1 2

PF201

F1206HB12V024TM 12A 24V ULFAST

1 2

PL201

EMI@

+8.4V_VMB

5A_Z80_0805_2P

1 2

PR203

200K_0402_1%

1 2

PR206

16.5K_0402_1%

12

PR205
10K_0402_5%

1 2

12

PR202

100_0402_1%

PH201
100K +-1% 0402 B25/50 4250K

12

1000P_0402_50V7K

PC201 EMI@

2 1

PC202 EMI@

0.01U_0402_25V7K

2 1

JBAT1

ACES_60757-00802-001

Conn@

1
3

4
5

2

6
7
8
9

1
2
3
4
5
6
7

8
G1
G2
G3
G4

10
11
12

A

A

B

B

C

C

D

D

1 1

2 2

3

4 4

Protection for reverse input

Vgs = 20V
Vds = 60V
Id = 250mA

Need check the SOA for inrush

max Power loss 0.22W for 90W;0.12W for 65W system;0.05W for 45W
CSR rating: 1W
VCSIP-VCSIN spec < 81mV

Rds(on) = 32mohm max
Vgs = 20V
Vds = 30V
ID = 8A (Ta=70C)

Support max charge 3.5A
Power loss: 0.245W
CSR rating: 1W
VCSPP-VCSON spec < 81mV

**Design Notes**
For 45W/65W /90W system, 2S/3S/4S battery

Maximum Charging current 3.5A
Maximum Battery discharge power 55W
#Register Setting

1. 0X3DH bit10 set 0 (default 1) to enable turbo boost function

2. Disable turbo when AC only
#Circuit Design

1. ACLIM and CCLIM are devider voltage control.

2.Use 7X7 choke and 3X3 H/L side MOSFET
Charge current 3A
Power loss : 1.79W (H/S=0.227W,L/S=1.2738W,Choke=0.297W)
Power density : 0.61 (23X16)
#Protect function

1. ACOVP : VCC voltage > 24V

2. SMBus timeout : 0X3DH bit15 set 0 (default 0) to enable 175s(default).
(default:Enable).3. ACOC : OX3CH bit4 set1 release adapter limit function

4. CHGOCP : based on charge current setting

5. BATOVP : 4.6V/Cell

6. BATLOWV : No.

7. TSHUT : 150C

Module model information

ISL95 52 0A_ Hyb ri d_B oo st_ V2.md d

Rds(on) = 15.8mohm max
Vgs = 20V
Vds = 30V
ID = 10.5A (Ta=70C)

Rds(on) = 32mohm max
Vgs = 20V
Vds = 30V
ID = 8A (Ta=70C)

PR729 and PR732 are ACDE T set t i ng base on your proj ect to set.

support Turbo boost : 2200P no
support Turbo boost : 0.1u

BAT GON E( BATT _T EMP )
logic high: above 2.4V
logic low: under 0.8V

Battery current limimed by CCLIm ~ 3.89A.
Adapter current limimed by ACLIm ~ 4.33A.
(PR779 and PQ741 are for change ACLIm when AC in)

Follow adapter and
battery wattage in
Vsys current source.
Base on CPU Core VR design.
The resistor is pop on CPU VR schematic.

(Rs1 = 10mΩ and Rs2 = 5mΩ or Rs 1 = 20m Ω an d Rs 2 = 10mΩ).
CC_LIM = VccLIM / 64 x Rs2
== == === == === == == === == == === == === == == === == == === == == === == === == ==
(Rs1 = 10mΩ and Rs2 = 10mΩ or Rs 1 = 20m Ω an d R s2 = 20mΩ).
CC_LIM = VccLIM / 32 x Rs2
== == === == === == == === == == === == === == == === == == === == == === == === == ==
AC_LIM = Vac_LIM / 32 x Rs1

0x3CH <BIT9> PSYS current gain
Rs1 = 10mΩ and Rs2 = 5mΩ or Rs1 = 10mΩ and Rs2 = 10Ωm BIT0
= 1.14uA/W
BIT1 = 0.285uA/W
== == === == === == == === == == === == === == == === == == === == == === == ===
Rs1 = 20mΩ and Rs2 = 10mΩ or Rs1 = 20mΩ and Rs2 = 20mΩ BIT0
= 2.28uA/W
BIT1 = 0.57uA/W

Ipsys = KPSYS x ( VAD P x IAD P + VBA T x IBAT )
R_Psys = 1.2V / Ipsys
KPSYS = 1.14uA/W
adapter wattage = 45W
Battery wattage = 40Wh
Ipsys = 1.14 x (45+40) = 96.9uA

3 R_Psys = 1.2V / 96.9uA = 12.3K-ohm.

== == === == === == == === == == === == === == == ==
adapter wattage = 65W
Battery wattage = 40Wh
Ipsys = 1.14 x (65+40) = 119.7uA
R_Psys = 1.2V / 96.9uA = 10K-ohm.

For A31 only.
Turn off Charger IC on batt ery only.
Depend on customer design for
system power consumption.

Fs=729KHZ ~ +/- 15%

Hybrid boost power mode
Cell = 3s

Close to
EC.

A31 connect to BA
Other team connect to bat t con n

Close to EC.

VDD=5V

VDD_CHG

ACIN_CHG

CCLIM_CHG

CSOP_CHG

ACLIM_CHG

PROG_CHG

COMP_CHG

CSIN_CHG

CSIP_CHG

VBAT_CHG

BGATE_CHG

ASGATE_CHG

CMSRC_CHG

CSON_CHG

CSOP_CHG_R

CSON_CHG_R

CSIP_CHG_R

CSIN_CHG_R

VDD_CHG

BA

ASGATE_CHG_R

FSET_CHG

<28> ADP_I

<28> VCIN1_AC_IN

<28,32> EC_SMB_DA1
<28,32> EC_SMB_CK1

<28> VCOUT1_PROCHOT#

<8,28,36> PM_SLP_S5#

VCIN1_BATT_TEMP <28,32>

+19V_VIN

B+

+19V_VIN

+12.6V_BATT+

+12.6V_BATT+

+19V_P1

+19V_P2 +19VB_CHG

BA

BA

Tiiitttllle

Siiize Documenttt Number

offf

Securiiity Clllassiiifiiicatiiion

Compal Secret Data

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL
AND TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D
DEPARTMENT EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...

Issued Date

Decipherii ed Date

Rev

0...4

Sheettt 33 46Dattte::: Monday,,, November 05,,, 2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

PWR_CHARGER

PR754

1

PC748

0.1U_0402_25V6

12

PC757

1U_0603_25V6K

1 2

PR741

100K_0402_1

%

12

PR752
162K_0402_1%

2 1

PR763 4.02K_0402_1%

PC765 @EMI@

0.1U_0402_25V7K

2 1

1 2

PR742 2_0402_5%

1 2

PR760 4.7_0402_5%

PQ711
LTC015EUBFS8TL_UMT3F

2

1

3

PR757
100K_0402_1%

12

RF@ PR766

4.7_1206_5

%

1

76.8K_0402_1%

1

PR751

2

G

D

S

PQ707
2N7002KW_SOT323-3

2

13

PQ706

4

5

321

PQ704

5

4

321

0.1U_0402_25V7K

@PC779

1 2

PQ710

LMUN5113T1G_SOT323-3

2

1

3

0_0402_5%

@

PR772

1

2

PR765

0.01_1206_1%

+17.4V_BATT_CHG

1

3

4

2

PR740

2_0402_5

%

12

0.033U_0402_25V7K

@

PC783

1 2

PC708

0.1U_0402_25V6

1 2

@

PR776 0_0402_5%

12

2 1 2

PR753

2 1

182K_0402_1%

PC775

10U_0603_25V6

M

2 1

@

PR769

1 2

0_0402_5%

PR749

200K_0402_1%

12

PU703
S IC ISL88739AHRZ-T QFN 32PCHARGER

AMON

ACIN

1

ACOK

2

CCLIM

11

COMP

10

OPCN

28

BOOT

LGATE

21

LG_CHG

VDDP

20

VDDP_CHG

BGATE

25

DCIN

18

PROG

9

SDA

3

SCL

4

PROCHOT#

5

UGATE

23

UG_CHG

PHASE

22

LX_CHG

VBAT

26

QPCP

27

CMSRC

29

ASGATE

30

CSIN

31

BMON

7

FSET

12

BATGONE

13

CSON

14

CSOP

15

VDD

19

VDD_CHG

AGND

33

CSIP

32

8

PSYS

ACLIM

16

17

NTC

0.1U_0402_25V6

PC747

1 2

PR703

0.01_1206_1%

1

3

4

2

AON7408L_DFN8-5

7X7X3
Isat: 6.5A
DCR: 28mohm

PL700

4.7UH_5.5A_20%_7X7X3_M

1 2

PR762 4.02K_0402_1%

2 1

12

PR729

287K_0402_1

%

12

PC769

1U_0402_16V6

K

12

PR732

49.9K_0402_1

%

12

PC776

10U_0603_25V6

M

2 1

PR750
200K_0402_1%

12

PC750 0.22U_0603_25V7K

1

OPCN_CHG2OPCP_CHG

PC705 EMI@

2200P_0402_25V7K

2 1

G

S

L2N7002WT 1G_SC70-3

@

PQ741

D

VCIN1_AC_2IN

13

PC721

PR771

0_0603_5% 0.22U_0603_25V7K

24

BST_CHG

1 2

BST_CHG_R

1 2

JUMP_43X118

1

@PJP701

1 2

2

PQ740
EMB04N03H_EDFN5X6-8-5

4

5

1
2
3

1 2

PR737

3M_0402_5%

1 2

PR738

1M_0402_1%

PC761

10U_0603_25V6

M

2 1

@

PR779

76.8K_0402_1%

1 2

PQ705
AON7506_DFN3X3-8-5

4

5

1
2
3

@

PR770

1 2

0_0402_5%

PC762

10U_0603_25V6

M

2 1

PR745

100_0402_1%

1 2

PR727

10K_0402_1

%

@

12

PC752

499_0402_1

% 0.015U_0402_25V7K

2 PR755 1

38.3K_0402_1%

2 1

PC715

2200P_0402_50V7

K

PC760

10U_0603_25V6

M

2 1

2

0_0402_5%

RF@ PC767

680P_0402_50V7K

AON7506_DFN3X3

-8-5

2 1 2

0.1U_0402_25V6

@PC782

1 2

PC768
1U_0402_16V6K

12

PQ712

AON7506_DFN3X3-8-5

4

5

1
2
3

@

PR777

1

PR780 1

2

1K_0402_1%

AMON_ISL95520

6

PR731

158K_0402_1

%

12

PD703

LRB715FT1G_SOT323-3

PR743 10_1206_5%

1 2 1

VF = 0.38V

2

3

PC751

560P_0402_50V7

K

2 1

PR778
10K_0402_1%

12

A

A

B

B

C D E

E

1 1

2 2

3 3

4 4

Compal Electronics, Inc.

Module model information

SY8 286C_V3_ singl e.mdd
SY8286C _V3_dual. mdd

Vout is 4.998V~5.202V

TDC=6A Io cp =10A

5V LDO 150mA ~300mA

Ioc p=10A

TDC =6A

Vout is 3.234V~3.366V

EN1 and EN2 dont't be floating.
EN :H>0.8V ; L<0.4V

3.3V LDO 150m A~300mA

Check pull up re sistor of SPOK at HW side

Fsw : 600K Hz

2 Cell battery : Cin=10uF*2pc s
3 Cell ~ 4 Cell battery : Cin=10uF*1p cs

EN1 and EN2 dont't be floating.
EN :H>0.8V ; L<0.4V

keep short pad,
snubber is for EMI only .

keep short pad,
snubber is for EMI on ly.

Use 7x7x3 size when the layout space is eno ugh.

ENLDO_3V5V

5V_3V_EN

LX_5V

3V/5VALW_PG

+19VB_5V

Fsw : 600K Hz

5V_3V_EN

LX_3V

ENLDO_3V5V

5V_3V_EN

+19VB_3V

BST_3V

LX_3V

<20,28,29,36> 3V/5VALW_PG

+5VLP

+5VALWP

B+

+5VALW+5VALWP

+19VB_5V

+3VLP

+3VALWP

B+

B+

+3VL

+3VALW+3VALWP

+3VL+3VLP

+VL+5VLP

+19VB_3V

<28> EC_ON

<28> VCOUT0_MAIN_PWR_ON

Tiiitllle

Siiize Document Number

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTYW ITHOUT PRIOR WRITTEN CONSENT OF COMPALELECTRONICS, INC.

C D

Issued Date

Deciphered Date

R ev

0.4

+3VALW/+5VALW

Custom

Sheet 34 o f 46Date: Monday, November 05, 2018

2018/11/05 2019/11/05

@EMI@ PC403

0.1U_0402_25V6

2 1

4.7_1206_5%

RF@

PR409

2 1

PR402
499K_0402_1%

1

2

ENLDO_3V5V

PL403

EMI@

5A_Z80_0805_2P

1 2

680P_0402_50V7K

RF@

PC426

1

5V_SN

2

2

@PR408

@ PJP402

JUMP_43X39

1

1 2

2

2 1

PC428

4.7U_0402_6.3V6M

2 1

PC414

10U_0603_25V6M

2 1

PL401

EMI@

5A_Z80_0805_2P

1 2

PC420

22U_0603_6.3V6M

2 1

PC425

22U_0603_6.3V6M

@

PL402

1.5UH_6A_20%_5X5X3_M

1 4
2 3

JUMP_43X118

1

@PJ401

1 2

2

PC427

4.7U_0603_6.3V6M

PC430
1U_0201_6.3V6M

12

PR410

2.2K_0402_5%

1 2

PR404
150K_0402_1%

12

2

EMI@ PC416

2200P_0402_50V7K

2 1

RF@

PR405

1

3V_SN

2

PC408

22U_0603_6.3V6M

2 1

JUMP_43X118

@PJ403

1

1 2

2

2.2U_0402_6.3V6M

PC419

VCC_5V

1 2

PC401

0.1U_0402_25V7K

2

PU401
SY8386BRHC_QFN16_2P5X2P5

IN23IN3

4

13

LDO

TEST

12

BS

1

IN1

2

16

LX2

LX1

15

GND1

14

OUT

11

FF

10

8

EN2

LX

5

6

GND

7

PG

EN1

9

EP

17

PC424

22U_0603_6.3V6M

2 1

2 1

PC402 PR403
1000P_0402_50V7K

1K_0402_1%

3V_FB

1 2

3V_FB_1

1

@PR401

0_0402_5%

1

2

BST_3V_R

1

@EMI@PC417

0.1U_0402_25V6

12

PC413 PR407
1000P_0402_50V7K

1K_0402_1%

5V_FB

1 2

5V_FB_1

1

PC415

10U_0603_25V6M

2 1

PC407

22U_0603_6.3V6M

2 1

2 1

PC418

0.1U_0402_25V7K

BST_5V

1 2

BST_5V_R

1

2

@PJP404

JUMP_43X39

1

1 2

2

PC405

10U_0603_25V6M

12

PC423

22U_0603_6.3V6M

PU402 IC SY8288CRAC QFN 20P PWM 0_0402_5%

IN

2

EN112EN2

11

NC

10

PG

9

BS

1

LX

20

19

LX

18

GND

IN3IN4IN

5

LX

LX_5V

6

7

GND

8

GND

FF13OUT

14

LDO

2 1 15

NC

16

VCC

17

GND

21

PC410

22U_0603_6.3V6M

PC409

22U_0603_6.3V6M

2 1

EMI@ PC404

2200P_0402_50V7K

2 1

680P_0402_50V7K

4.7_1206_5%

RF@

PC412

2 1

PR412

1M_0402_1%

12

PC422

22U_0603_6.3V6M

2 1

PC421

22U_0603_6.3V6M

2 1

PL404

2.2UH_7.8A_20%_7X7X3_M

1

3
4

2

PC411

4.7U_0603_6.3V6M

12

PR406

100K_0402_5%

12

@

PC429

10U_0603_25V6M

2 1

PR411

1 2

0_0402_5% @

5

5

4

4

3 2 1

1

D D

C C

B B

A A

0.675Volt +/- 5%
TDC 0.7A
Peak Current 1A

Mode Level +0.675VSP
S5 L

S3 L
S0 H

off
off
on

VTTREF_1.35V

off
on
on

Note: S3 - sleep ; S5 - power off

Choke: 7x7x3
Rdc=6.7mohm(Typ), 7.4mohm(Max)

Switching Frequency:540kHz
Ipeak=8A
Iocp~9.6A
OVP: 113%~120%
VFB=0.75V, Vout=1.3545V

ModulVeinmaodfiexl.cionmformation

RT8207P_single_V3.mdd For Single layer
RT8207P_dual_V3.mdd For Dual layer

+12.6VB_DDR

UG_DDR

LX_DDR

BST_DDR_R

LG_DDR

TON_DDR

Pin19 need pull separate from +1.35VP.
If you have +1.35V and +0.675V sequence question,
you can change from +1.35VP to +1.35VS.

BST_DDR

FB_DDR

VTTREF_DDR

EN_0.675VSP

EN_DDR

VDD_DDR

<28,36> SYSON

<28,29> SUSP#

B+

+1.2VP

+5VALW

+1.2VP

+0.6VSP

+1.2VP

+1.2VP

+1.2VP +1.2V

+0.6VSP +0.6VS

+12.6VB_DDR

LX_DDR

Tiiitllle

SecurityClassification

Compal SecretData

Compal Electronics, Inc.

Rev

0.4

Siiize Document Number

Custom

Sheet 35 of 46Date:

Monday, November 05, 2018

Issued Date

2018/11/05 Deciphered Date

2019/11/05

THIS SHEET OF ENGINEERING D RAW ING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS C ONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRA NSFERED F ROM THE CUSTO DY O F THE CO MPET ENT DIVISION OF R &D
DEPART MENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRO NICS, IN C. NEIT HER THIS SHEET NO R THE INFOR MATION IT CONTAINS
MAY BE US ED BY OR D ISCLOSED TO AN Y T HIRD PARTY WITHOUT PRIOR W RIT TEN CONS ENT OF COMPAL ELECTRONICS, INC .

3 2

1.2VP/0.6VSP

PC514

22U_0603_6.3V6

M

12

@EMI@PC501

0.1U_0402_25V6

2 1

PC515

0.033U_0402_16V7K

12

0.1U_0402_10V7K

@PC518

2 1

30MA_30V_0.5UA_0.4V_SOD323-2

2

PD501

1

PC513

22U_0603_6.3V6

M

2 1

PL501

EMI@

5A_Z80_0805_2P

1 2

PQ502

AON7506_DFN3X3-8-5

4

5

123

PC519

0.1U_0402_10V7K

@

2 1

PC503

10U_0603_25V6

M

2 1

PC504

10U_0603_25V6

M

2 1

PL502

1UH_6.6A_20%_5X5X3_M

1 4
2 3

PC510

22U_0603_6.3V6

M

2 1

PR504

5.1_0603_5%

1 2

PR507 470K_0402_1%

+12.6VB_DDR

1

2

PC507

10U_0603_6.3V6

M

2 1

RF@ PC517

680P_0402_50V7K

2

JUMP_43X118

@PJ501

1

122

RF@ PR503

4.7_1206_5%

1

1 2

PR501

2.2_0603_5%

1 2

PC511

22U_0603_6.3V6

M

2 1

PR509
10K_0402_1%

1

2

PR506

6.04K_0402_1%

1 2

PC509

22U_0603_6.3V6

M

2 1

PR505

2.2_0603_5%

+5VALW

1

2

EMI@ PC502

2200P_0402_50V7

K

2 1

PC512

22U_0603_6.3V6

M

2 1

PR502

16.5K_0402_1%

1

2

CS_DDR

JUMP_43X39

PJ503 @

1

122

PU501

VTTSNS

2

FB

6

S5

8

PGOOD

10

VDDP

12

PHASE

16

BOOT

18

VTTREF

4

PGND

14

VTTGND

1

RT8207PGQW_WQFN20_3X3

GND

3

VDDQ

5

S3

7

TON

9

VDD

11

CS

13

LGATE

15

UGATE

17

VTT

20

VLDOIN

19

PAD

21

0_0402_5%

1

PR508@

2

PC505

0.1U_0402_25V7K

12

PC516

1U_0402_10V6K

12

0_0402_5%

@PR510

1

2

PQ501

AON7408L_DFN8-5

5

4

123

PC508

1U_0402_10V6K

1 2

PC506

10U_0603_6.3V6

M

2 1

Vinafix.com

5

5

4

4

3 2 1

1

D D

C C

B B

A A

LA-G241P

Vout=0.8 V* (1+Rup/Rdown )

Rup

Rdow n

FB=0 .6V

Not e:Il oad (max )=3 A

Note:Iload (max )= 2. 5A

Rdow n

Note:
When des ign Vin=5V, ple ase stuff snubb er

to preve nt Vin dama ge

Vout=0.6 V* (1+ Rup/Rdown)

FB_1.8V

LX_1.8V

+1.8VSP_ON

<8,28,33> PM_SLP_S5#

<28,35> SYSON

<37> 1.8VALW_PG

3V/5VALW_PG <20,28,29,34>

+1.8VALWP +1.8VALW

+2.5VP +2.5V

+3VALW

+2.5VP

+5VALW

+3VALW

+3VALW

+1.8VALWP

Tiiitllle

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUT HORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3 2

Issued Date Deciphered Date

R ev

0.4

+1.8VALW/+2.5V_G9661

Siiize Document Number

Custom

46Date: Monday, November 05, 2018 Sheet 36 o f

2018/11/05 2019/11/05

Compal Electronics,Inc.

PJ804

@

JUMP_43X79

1 2

1 2

PU2002
G9661MF11U_SO8

POK

1

VEN

2

VIN

3

VPP

4

GND

ADJ

8

VO

7

NC

6

5

GND

9

JUMP_43X79

@

PJ802

1

1 2

2

PR2104

4.7_0603_5%

1

RF@

2

@

0.1U_0402_16V7K

PC2101

2 1

JUMP_43X79

@

PJ801

1

1 2

2

@ PR2102

0_0402_5%

1 2

PR2105

Rup

20K_0402_1%

12

PC2005

0.01U_0402_25V7K

2 1

PC2105

22U_0603_6.3V6M

2 1

PL2101

1 2

1UH_2.8A_30%_4X4X2_F

PU2101

SY8003ADFC_DFN8_2X2

5

3
4

2

1

6

7

8

PGND

FB SGND
PG EN
IN LX
PGND NC

9

PR2004

3.4K_0402_1%

2 1

PC2001

0.1U_0402_25V6

2 1

PR2103

1M_0402_5%

12

RF@

PC2103

680P_0402_50V7K

2 1

PC2102

22U_0603_6.3V6M

2 1

PC2008

4.7U_0603_6.3V6K

12

PR2106

10K_0402_1%

12

2 0_0402_5%

PR2008

47K_0402_5%

2 1

PC2106

22U_0603_6.3V6M

2 1

JUMP_43X79

@

PJ803

1

1

2

2

PR2002

1.6K_0402_1%

2 1

PC2006

1U_0402_6.3V6K

12

PR2223 1 @

@

PR2003

1

2

0_0402_5%

PC2010

22U_0603_6.3V6M

2 1

PR2101

100K_0402_5%

12

PC2104

68P_0402_50V8J

2 1

Vinafix.com

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

FB=0.6V

The current limit is set to 6A, 9A or 12A when this pin
is pull low, floating or pull high.

EN :H>0.8V ; L<0.4V

EN pin don't floating
If have pull down resistor at HW side,

please delete PR601.

R1

Vout=0.6V* (1+R1/R2) R2

=0.6*(1+(10/20))

Vout=0.9V

Confirm HW side

keep short pad,
snubber is for EMI only.

Use 7x7x3 size when the layout space is enough.

LX_1V

LDO_3V

+19VB_1V

ILMT_1V

BST_1V

FB_1V

EN_1V

LX_1V

<36> 1.8VALW_PG

APU_VDDP_RUN_FB_H <7>

VR_ON <28,38>

APU_VDDP_RUN_FB_L <7>

+3VALW

B+

+0.8VALWP

+0.8VALWP

+0.8VALW

+19VB_1V

+3VALW

+3VALW

Tiiitttllle

Siiize Documenttt Number

offf

Securiiity Clllassiiifiiicatiiion

Compal SecretData

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...

Issued Date

Decipherii ed Date

Rev

0...4

+0.9VALW_SY8386RAC

C

Sheettt 37 46Dattte::: Monday,,, November 05,,,2018

2018/11/05 2019/11/05

Compal Electronics,Inc.

PL602

1 2

1UH_6.6A_20%_5X5X3_M

PC606

10U_0603_25V6

M

@

EMI@ PC604

2200P_0402_50V

7K

2 1

@

PR621 0_0402_5%

1 2

@ PC601

0.1U_0402_25V6

12

PC612

22U_0603_6.3V6

M

2 1

PC11225

22U_0603_6.3V6

M

2 1

PC610

22U_0603_6.3V6

M

2 1

680P_0402_50V7K

RF@PC602

1 2

0_0402_5%

@

PR603

1 2

PR611
100K_0402_5%

@

12

@ PR609

0_0402_5%

12

PC609

22U_0603_6.3V6

M

2 1

PR612
1K_0402_1%

2

PC608

330P_0402_50V

7K

1 2 1

0_0402_5

%

1

@

PR607 2

PU601
SY8386RHC_QFN16_2P5X2P5

IN23IN3

4

VCC

13

BYP

12

BS

1

IN1

2

LX2

16

LX1

15

GND1

14

FB

11

ILMT

10

TEST

8

LX

5

GND

6

7

PG

EN

9

EP

17

PC11226

22U_0603_6.3V6

M

2 1

JUMP_43X79

1

@PJ602

1 2

2

PC611

22U_0603_6.3V6

M

2 1

@ PJ601

JUMP_43X118

1

122

PR601

1M_0402_1%

12

PQ601
LSK3541G1ET2L_VMT3

2

3

1 2

PR619 0_0402_5%

2

PC614

1U_0402_6.3V6K

12

PR610
20K_0402_1%

12

1

@PR606 PC603

0_0402_5% 0.1U_0402_25V7K

2

BST_1V_R

1 2

@EMI@ PC605

0.1U_0402_25V

6

2 1

PR608

10_0402_1

% 10K_0402_1%

PR2221

1 2 1

RF@ PR605

4.7_1206_5%

1

2

SNUB_1V

PC615

10U_0603_25V6

M

2 1

2 1

PC613

2.2U_0402_6.3V6M

2 1

@

PR620 0_0402_5%

1 2 1

Vinafix.com

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

H H

G G

F F

E E

D D

C C

B B

A A

LL(Rd roop) =0.7m

Near APU MOS

Near CORE_ NB CH OKE

Near APU CHO KE

LL_NB (Rdro op)=2. 1m

APU_CORE_NB
TDC 19A(1H1L)
Peak current 13A
OCP current > 16A

FSW=400kHz
DCR 1.19mohm +/-5%

TYP
H/S Rds(on) :6.8mohm ,
L/S Rds(on) :2.0mohm ,

MAX

8.6mohm

2.5mohm

APU_CORE
TDC 35A
Peak current 45A
OCP current 63A

FSW=400kHz
DCR 1.19mohm +/-5%

TYP
H/S Rds(on) :6.8mohm ,
L/S Rds(on) :2.0mohm ,

MAX

8.6mohm

2.5mohm

APU_SVD and APU_SVC RC filter put CPU side.
APU_SVT RC filter put controller side.

Near CORE_ NB MOS

9/26
Modif y for stard ust te st result

9/26
Modif y for stard ust te st result

LX2_CPU

ISENA1N_NB

UG1_NB

ISEN2P_C PU

SNB_APU2

UG2_CP U

LX1_CPU

UG1_CP U

ISEN1P_C PU

LX1_NB

UG2_CPU

BST2_CPU

LG1_NB

ISENA1P_NB

SNB_APU_NB

LG1_CPU

LG2_CPU

RGND_RT36 62

ISEN1P_CPU

APU_CORE_ SEN_ H_R

COMP_CPU

FB_CPU

TSEN_APU

TSEN_NB _R

TSEN_APU _R

SET_APU

TSEN_APU

TSEN_NB

SET_APU

TSEN_NB

IMON_NB

IMON_APU

IMON_NB

VCC_ CPU

EN_RT366 2

BST1_NB

FB_NB

COMP_NB

ISENA1P_NB

ISENA1N_NB

LX2_CPU

LG2_CPU

SVD_RT3662

ISEN2P_CPU

RGND_RT3662

ISEN1P_C PU

ISEN2P_C PU

ISEN1N_CPU

ISEN1N_CPU

<7> APU_SV T

VR_ON <28, 37>

<7,28> H_PROCHOT #

<7> APU_VD D_RU N_FB_L<7> APU_V DDCR_ SEN

<7> APU_SV D

<7> AP U_PW RGD < 7> APU_SVC

APU_VDD SOC_SE N

<7>

+APU_CORE

+APU_CORE _SOC

+APU_CORE

APU_B+

+1.8VS

+3VS

VREF_APU

VREF_APU

VREF_APU

+1.8VS

+1.8VS

APU_B+

+APU_CORE_SOC

APU_B+ B+

APU_B+

APU_B+

+5VALW

+5VALW

Tiiitttllle

Siiize DocumentttNumberrr

Rev

0...4

Sheettt 38 o fff46Dattte::: Monday,,, Novemberrr 05,,, 2018

Securrriiittty Clllassiiifffiiicatttiiion Compalll SecretttDattta

IsII sued Datett

2018///11///05

Decipheii rrredDatett

2019/1// 1/0// 5

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND TRADE
SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT EXCEPT AS
AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THEIIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,,IIINC...

Compal Electronics,Inc.

RT3662ACGQW

PC11 255

1U_0402_6.3 V6K

2 1

PC11265

33U_25V_NC_6.3X4.5

1

+

2

PC11266

33U_25V_NC_6.3X4.5

1

+

2

AON6962_D FN5X6 D-8-7

PQ1003

S24S2

5

G1

1

S23G2

6

D1

2

7

D2/S 1

10P_0402_ 50V8J

1 2

@EMI@ PC11248

2200P_0402_50V7K

2 1

PC11231

10U_0603_25V6M

2 1

PR2233
0_0402_5%

2 1

1 2

PR2232 100K _0402_5%

68P_0402_ 50V8J

PC11 253

2 1

PR2242

60.4K_0402_1%

1 2

@EMI@ PC11262

0.1U_0402_25V6

2 1

PC11258

0.1U_0402_25V6

2 1

PR1042

2.2_0402_5%

1 2

2 1

PR1046

54.9K_0402_1%

PR2228
0_0603_5%

1 2

PC11236@

330P_0402_ 50V7K

2 1

RF@ PR1059

4.7_1206_5%

1

@EMI@PC11263

2200P_0402_50V7K

2 1

RF@PC11267

680P_0402_50V7K

PR105 7

@PC112 37

0.1U_0402_2 5V6

2 1

2 1 1 2

PC11254 PR2241

0.47U_040 2_6.3V 6K 3.9_ 0402_1%

@PC112 64

0.1U_0402_2 5V6

2 1

PR2250

34K_0402

1 2

@ PC11260

10P_0402_ 50V8J

1 2

@PC112 59

0.1U_0402_2 5V6

2 1

PR1058

931_0402_1%

1

1

2

SVT_RT36 62

PR1041

0_0402_5%

PC11249

0.1U_0402_25V6

@

2 1

1

PR2253

33.2K_0402_1%

1 2

PH1003
100K_0402 _1%_B2 5/50 4250K

2 1

@ PR2238

1.1K_0402_1%

1 2

PR1053

16.5K_0402_1%

1 2

0_0402_5%

1 2

3

PL1003

0.24UH_22 A_+-20% _ 7X7X3_M

1 4

ISENA1P_ NB_R

2

10P_0402_ 50V8J

@ PC11250

PR1039

1 2

PR106 5

1.1K_0402 _1%

1 2

PC11 256

0.47U_040 2_25V6 K

1 2

PR2247

3.92K_0402_1%

1 2

PR1051
0_0402_5%

2 1

PC11240

10U_0603_25V6M

2 1

PC11247

0.1U_0402_25V6

2 1

PC11261

0.1U_0402_25V6

@

2 1

PR2251
68K_0402_ 1%

1

2

4.7_0603_5 %

2 1

PR104 4

PR106 2

1_0402_1%

ISEN1N_C PU_R

1 2

PC11 252

2.2_0603_5 % 0.22U_060 3_25V 7K

BST1_1NB2BST1_NB1_1R

2

PR2236

1.1K_0603_1%

1 2

PR1054
0_0402_5%

2 1

PR2244

69.8K_0402_1%

1 2

@ PR1043

0_0402_5%

1 2

RF@PC11234

680P_0402_50V7K

PR106 4

1_0402_1%

ISEN2N_C PU_R

1 2

PR1060

931_0402_1%

1 2

PR2245 PR2248
0_0402_5% 0_0402_5%

1

_1

%

2

2

PC11229

68P_0402_ 50V8J

2 1

PR2240 RF@

4.7_1206_5%

2 1 2 1

PR2227

60.4K_0402_1%

1 2

PC11251

220P_0402_ 50V8J

1 2

PL2104 EMI@

5A_Z80_0 805_2P

1

2

PC11 243

PC11269

2.2U_0402_1 0V6M

2 1

RF@ PR2249

4.7_1206_5%

1

2 1 2

PC112401.22U_0603_25V7K

PR1050

10_0402_5%

1 2

1 2

@ PR1040

1.1K_0402_1%

1 2

1 2 2 1

PR1048

15.8K_040 2_1% PH100 4
100K_0402 _1%_B2 5/50 4250K

3

PL2103

0.24UH_22 A_+-20% _ 7X7X3_M

1 4

ISEN1P_C PU_R

2

@PR2 246

4.7K_0402_1%

1 2

PR222 4

4.7_0603_5%

2 1

PR222 5

BST1_ CPU

2.2_0603_5 % 0.22U_060 3_25V7 K

1

2

BST1_CP1U_R

2

1 2

SNB_APU 1

PR2243

1.1K_0603 _1%

1 2

+APU_CORE

@PC112 35

0.1U_0402_2 5V6

2 1

1.65K_040 2_1%

1

2

IMON_APU

PR1049

PC11239

10U_0603_25V6M

2 1

PL2105 EMI@

5A_Z80_0 805_2P

1

2

PQ1004
AON6962_D FN5X6 D-8-7

S24S2

5

G1

1

S23G2

6

D1

2

D2/S 1

7

3

PL2102

0.24UH_22 A_+-20% _ 7X7X3_M

1 4

ISEN2P_C PU_R

2

@ PR1035

4.7K_0402_1%

12

PC11230

10U_0603_25V6M

2 1

PC11270

2.2U_0402_1 0V6M

2 1

PR1038 PR1037 PR1036
0_0402_5% 0_0402_5% 0_0402_5%

1 2

PR2235 2.2_060 3_5%

BST2_ CPU

1 2

BST2_CPU_ R

1 2

PC11233

0.1U_0402_25V6

@

2 1

PC11228

220P_0402_ 50V8J

1 2

PR2231
0_0402_5%

2 1

504250K

2 1

PH1006
100K_04 02_1 %_B25/

1 2 2 1

PR1055

9.76K_040 2_1% PH100 5
100K_0402 _1%_B2 5/50 4250K

PR2237

10K_0402_ 1%

2 1

@EMI@PC11245

0.1U_0402_25V6

2 1

PU2102
RT366 2ACGQW _W QFN40_ 5X5

SET1

13

IMON

14

VRHOT_L

11
12

TSEN

VREF _PIN SET

15

IMON_ NB

16

PW ROK

18

TSEN_ NB

23

SVT

21

26

FB_NB

VCC

17

SVD

20

ISE NP_NB

25

COMP_NB27ISE NN_NB

24

VDDIO

22

SVC

VIN

28EN29

BOOT_N B

30

UGATE_ NB

31

UG1_NB

PHAS E_NB

32

LX1_NB

LGATE_ NB

33

LG1_NB

PVCC

34

PVCC _CPU

LGATE1

35

LG1_CPU

PHAS E1

UGATE1

BOOT1

38

BST1_ CPU

37

UG1_CPU

36

LX1_CPU

LGATE2

39

40

PHAS E2

GND

41

UGATE2

1

BOOT2

2

PGOOD

3

RGND

4

COMP

5FB6

ISEN2P

7

VSEN

8

ISEN1P

9

ISEN1N

10

ISEN1N_CPU

PC11 244

0.47U_040 2_25V6 K

1 2

@PR2 254

0_0402_5%

1 2

PC11238

0.1U_0402_2 5V6

2 1

PC11246

10U_0603_25V6M

2 1

1 2

PR1056

13.3K_0402_1%

PR2230

6.65K_0402_1%

1 2

PR2226

261K_0402_1%

1 2

PR1063

1.1K_0402_1%

1 2

AON6962_D FN5X6 D-8-7

PQ1002

S24S2

5

G1

1

S23G2

6

D1

2

D2/S 1

7

PR2229

10_0402_5%

1 2

PR2239

24K_0402_1%

1 2

PR1047

10.7K_0402_1%

1 2

RF@PC11268

680P_0402_50V7K

2 1 2

PC11 257

0.47U_040 2_25V6 K

2 1 2

PR2234

10_0402_5%

1 2

PC11232

10U_0603_25V6M

12

2 1

PR1045

10K_0402_ 1%

@ PC11242

PR2252

0_0402_5%

1

2

SVC_RT36 62

19

5

5

4

4

3 2 1

1

D D

C C

B B

A A

near CPU

near CPU

APU_CORE
330uF*3

220uF*1

22uF*23

APU_CORENB
220uF*2

22uF*17+10uF*3

+APU_CORE +APU_CORE_SOC

+APUV_CinORaE

fix.com

+APU_CORE

+APU_CORE_SOC

Tiiitllle

Sheet

SecurityClassification

Compal SecretData

THIS SHEET OF ENGINEERING D RAW ING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS C ONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F ROM THE CUSTO DY O F THE CO MPET ENT DIVISION OF R &D
DEPART MENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRO NICS, IN C. NEIT HER THIS SHEET NO R THE INFOR MATION IT CONTAINS
MAY BE US ED BY OR D ISCLOSED TO AN Y T HIRD PARTY WITHOUT PRIOR W RIT TEN CONS ENT OF COMPAL ELECTRONICS, INC .

3 2

Issued Date

Deciphered Date

Rev

0.4

+APU_CORE Cap

Siiize Document Number

Custom

39 of 46Date: Monday, November 05,2018

2018/11/05 2019/11/05

Compal Electronics,Inc.

LA-H131P

PC9014

22U_0603_6.3V6

M

2 1

PC9060

22U_0603_6.3V6

M

2 1

PC9004

22U_0603_6.3V6

M

2 1

PC1245

0.22U_0402_10V6

K

PC1244

0.22U_0402_10V6

K

2 1

PC9019

22U_0603_6.3V6

M

2 1

PC9006

22U_0603_6.3V6

M

2 1

PC9057

22U_0603_6.3V6

M

2 1

PC1249

0.22U_0402_10V6

K

2 1

PC9030

22U_0603_6.3V6

M

2 1

PC9018

22U_0603_6.3V6

M

2 1

PC11272

22U_0603_6.3V6

M

2 1

PC9031

22U_0603_6.3V6

M

12

PC1246

0.22U_0402_10V6

K

2 1

PC9034

22U_0603_6.3V6

M

2 1

PC9038

22U_0603_6.3V6

M

2 1

PC1250

0.22U_0402_10V6

K

2 1

PC9059

22U_0603_6.3V6

M

2 1

PC9089

220U_D2SX_2VY_R9M

1

+

2

PC9084

330U_D1_2VY_R9

M

1

+

2

PC9009

22U_0603_6.3V6

M

2 1

PC9002

22U_0603_6.3V6

M

2 1

2 1

PC9016

22U_0603_6.3V6

M

2 1

PC11271

22U_0603_6.3V6

M

2 1

PC11273

22U_0603_6.3V6

M

12

PC9011

22U_0603_6.3V6

M

2 1

PC1252

0.22U_0402_10V6

K

2 1

PC1248

0.22U_0402_10V6

K

2 1

PC9007

22U_0603_6.3V6

M

2 1

PC1253

0.22U_0402_10V6

K

2 1

PC9083

330U_D1_2VY_R9M

1

+

2

PC1251

0.22U_0402_10V6

K

2 1

PC9008

22U_0603_6.3V6

M

2 1

PC9012

22U_0603_6.3V6

M

2 1

PC1239

0.22U_0402_10V6

K

2 1

PC1238

0.22U_0402_10V6

K

2 1

PC9058

22U_0603_6.3V6

M

2 1

PC9003

22U_0603_6.3V6

M

2 1

+

PC9087

330U_B2_2.5VM_R9M

1

2

+

PC9085

330U_B2_2.5VM_R9M

1

2

PC9063

22U_0603_6.3V6

M

12

PC9001

22U_0603_6.3V6

M

2 1

PC1247

0.22U_0402_10V6

K

2 1

PC1240

0.22U_0402_10V6

K

2 1

PC9020

22U_0603_6.3V6

M

2 1

PC9033

22U_0603_6.3V6

M

2 1

PC9017

22U_0603_6.3V6

M

2 1

PC1255

180P_0402_50V8

J

2 1

PC9056

22U_0603_6.3V6

M

12

PC9088

220U_D2SX_2VY_R9M

1

+

2

PC1241

0.22U_0402_10V6

K

2 1

PC9013

22U_0603_6.3V6

M

2 1

PC1243

0.22U_0402_10V6

K

2 1

PC1242

0.22U_0402_10V6

K

2 1

PC1254

180P_0402_50V8

J

2 1

PC9029

22U_0603_6.3V6

M

2 1

PC9015

22U_0603_6.3V6

M

2 1

PC9005

22U_0603_6.3V6

M

2 1

PC9010

22U_0603_6.3V6

M

2 1

PC9086

330U_D3_2.5VY_R6

M

1

+

CP2 U back side

PC9039

22U_0603_6.3V6

M

2 1

PC9062

22U_0603_6.3V6

M

2 1

5

5

4

4

3 2 1

1

D D

C C

B B

A A

Page 1 of 1

for PWR

Version change list
(P.I.R. List)

Reason for change

PG# Modify List

Date

PhaseItem

LA-XXXXP

1

Add 0.8VALW

remote sense for AMVDinreaqfiuexst

.com

P.37

Add

transistor PQ601 and 0 ohm PR619,PR620,PR621 for remote sense

2018.08.22

SIV

2

Change common part for 2nd source trail run

P.31

Change PD101 to SCS00008E00

2018.08.22

SIV

3

Change common part for sourcce suggestion

P.38 Change PC11265,PC11266 to SF000007200

2018.08.22

SIV

4

Change DDR choke from 7*7 to 5*5 for common M/B

P.35 Change PL502 to SH00000Z200

2018.08.22

SIV

5

Change VDDP voltage to 0.9Vfor AMD request

P.37

Change PR608 from 6.8K to 10K

2018.09.10

SIV

6

Change CPU_CORE_SOC

OCP setting and comparison

P.38

Change PR1046 from 100K to 54.9K
Change PR1056 from 23.2K to 13.3K
Change PR1053 from 20K to 16.5K
Change PR2226 from 316K to 261K
Change PR1055 from 6.49K to 9.76K

2018.09.10

SIV

7

Change

0 ohm to R short

P.33 Change PR769,PR770,PR772,PR776 to R short

2018.09.10

SIV

Tiiitllle

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

IssuedDate

DecipheredDate

R ev

0.4

PIR (PWR)

Siiize Document Number

Custom

Sheet 40 o f 46Date: Monday, November 05, 2018

2018/11/05 2019/11/05

Compal Electronics,Inc.

Vinafix.com

5

4

4

3 2 1

1

D D

C C

B B

A A

1

PG#

Modify List

Date Phase

2

2018/07/03 EVT

21

Change JHP1 symbol

Item

Page 1 of 6 for
HW

5

Version change list

(P.I.R. List)

Reason for change

3

4

5

6

7

9

8

10

11

12

CA25.2,UAUDIO1.22,UAUDIO1.37 change to AGND

21

Swape DT1 pin define

25

Layout request

UC6,U7,Q3,CD74,CD1,CD2,CD8,CD9,C92,C101,CD10~CD41,C99,Y1
chager to common part

Common part

Swape JIO1 pin define

20 2018/07/04

2018/07/04

2018/07/03

2018/07/03

Delete D2, R109

2018/07/0420

LT1 change to common part

25

EMI request

2018/07/05

Delete RTS6,RTS3

26

Thermal request

CT7~CT10 change value

24

AMD disign guide

2018/07/05

2018/07/05

Layout request

Add CT33

25 2018/07/09

Change JUSBC1 symbol

25 2018/07/10

13

14

Delete DFP2

2018/07/1027

U7 change PN to SA0000B0V00

20 2018/07/11

JIO1 change to 45 pin

R67 link to GND, R67,R70 un-pop

28

Delete RC114,RC117

8

TP_INT# change to AGPIO85

8

Add T21~T24,RC117,RC118,QC3,RTP3,RTP4

8,27

2018/07/12

2018/07/12

2018/07/12

2018/07/12

2018/07/12

15

16

17

18

JSSD1 PCIE pin define

17 2018/07/16

2018/07/16

QC3 change to common part
Change LED

2018/07/16

2018/07/16

2018/07/16

CT33 change PN
SATA_ARX_C_DTX_N1,SATA_ARX_C_DTX_P1 swap

Add J2,J3

2018/07/17

Tiiitllle

Sheet

SecurityClassification

Compal SecretData

THIS SHEET OF ENGINEERING D RAW ING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS C ONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F ROM THE CUSTO DY O F THE CO MPET ENT DIVISION OF R &D
DEPART MENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRO NICS, IN C. NEIT HER THIS SHEET NO R THE INFOR MATION IT CONTAINS
MAY BE US ED BY OR D ISCLOSED TO AN Y T HIRD PARTY WITHOUT PRIOR W RIT TEN CONS ENT OF COMPAL ELECTRONICS, INC .

3 2

Issued Date

Deciphered Date

LA-H131P

Rev

0.4

HW PIR

Siiize Document Number

Custom

41 of 46Date: Monday, November 05,2018

2018/11/05 2019/11/05

Compal Electronics, Inc.

Vinafix.com

5

4

4

3 2 1

1

D D

C C

B B

A A

1

PG#

Modify List

Date Phase

2

2018/07/17 EVT

26

Add RTS3,RTS6

Item

Page 2 of 6 for
HW

5

Version change list

(P.I.R. List)

Reason for change

3

4

5

6

7

9

8

10

11

12

13

14

15

16

17

18

Swap U10 pin define

2018/07/1721

EVT

EVT

2018/07/18

Remove R119, R120, R125, R126. (EMI By-Pass Resistor, USB2.0)

20

27

Add Net Name - +TP_VCC, +3VALW_3VS_FP

2018/07/18 EVT

10

Remove CC34 2018/07/18 EVT

Add U19 related circuits.

29

2018/07/18 EVT

Modify screw hole H5, H7, H14

29

2018/07/18 EVT

Remove CA12, RA22, RA23. (Codec)

21

2018/07/19 EVT

Add net name +5VDDA_CODEC_5VSTB

21 2018/07/19

EVT

20

Replace power rail of USB Charger's power ripple caps to +5VALW. 2018/07/19 EVT

20

Replace C51 from 22uF to 4.7uF. (USB Charger)

2018/07/19 EVT

14

Add BOM Structure TS@ for R264. 2018/07/19 EVT

22

Remove +3VS_DVDD, replace with +3VS_HUB. (UHUB1.21, 27 / CHUB11.1) 2018/07/19 EVT

22

Remove RHUB3, RHUB4. 2018/07/19 EVT

RFP1, CFP1 -> FP@, DFP1 -> @ESD@

27 2018/07/20

EVT

15

Replace JHDMI1 Symbol (DC232007B00)

2018/07/20 EVT

Remove Clip8

29

2018/07/20 EVT

19

Replace JSSD1 Symbol (SP070018L00), Pin Count different with before 2018/07/20 EVT

17

20

21

22

23

24

22

RHBU3~5 -> RHUB3~5, RHBU1 -> RHUB6, RHBU2 -> RHUB7

2018/07/20 EVT

2018/07/20 EVT

8 QC3.2 / QC3.5 -> From +3VALW to +3VS

Swap JIO1 USB3 Pin Define (TX/RX, P/N) -> Total 8 Traces

20 2018/07/20

EVT

17

Remove BOM Structure "SSD@"

2018/07/20

EVT

17

Add RSSD4~7

2018/07/20 EVT

29

Remove +0.6VS / +0.8VS Discharge Circuits.

Tiiitllle

Sheet

SecurityClassification

Compal SecretData

THIS SHEET OF ENGINEERING D RAW ING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS C ONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F ROM THE CUSTO DY O F THE CO MPET ENT DIVISION OF R &D
DEPART MENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRO NICS, IN C. NEIT HER THIS SHEET NO R THE INFOR MATION IT CONTAINS
MAY BE US ED BY OR D ISCLOSED TO AN Y T HIRD PARTY WITHOUT PRIOR W RIT TEN CONS ENT OF COMPAL ELECTRONICS, INC .

3 2

Issued Date

Deciphered Date

LA-H131P

Rev

0.4

HW PIR

Siiize Document Number

Custom

42 of 46Date: Monday, November 05,2018

2018/11/05 2019/11/05

2018/07/23 EVT

Compal Electronics,Inc.

Vinafix.com

5

4

4

3 2 1

1

D D

C C

B B

A A

1

PG#

Modify List

Date Phase

2

2018/07/23 EVT

Item

Page 3 of 6 for
HW

5

Version change list

(P.I.R. List)

Reason for change

3

4

5

6

7

9

8

10

11

12

13

14

15

16

17

18

17

Add RSSD8, RSSD9

19

20

21

22

23

24

Replace Clip9 with Clip8 (Remove Clip9)

29 2018/07/23

EVT

15

Swap DH2, DH3 nets to reduce via

2018/07/23

EVT

Replace Y1 Part Number. (to SJ10000C210)

22

2018/07/23 EVT

29

2018/07/23 EVT

Add CC83 ~ CC96 (RF By Pass / Cross Moat Caps)

27

2018/07/24 EVT

Replace Keyboard Power Rail from +5VALW to +5VS

8

2018/07/25 EVTRe-Name MODEL ID0 / ID1 with MODEL_ID / MIC_SELECT

Update Memory ID Matrix

8

2018/07/25 EVT

3

Update Note List Page

2018/07/25

EVT

19

2018/07/25 EVTRemove T2408 BOM Structure (TP@)

Pop CC83~CC96 (RF@) 2018/07/25 EVT

29

14

Remove R264, C230 BOM Structure (TS@) 2018/07/25 EVT

21 DA1.4 / DA1.6 Pin Swap

2018/07/26 EVT

2018/07/26 EVT

15 Swap DH1.4 / 7 to DH1.5 / 6

Update U7 Part Description (USB Charger)

20 2018/07/27

EVT

25

Update JUSBC1 footprint with DRAPH_UB11245-B200B-1H_24P-S 2018/07/27 EVT

9

2018/08/06 EVT

Replace ROM (UC2) Part Number to SA00008K400

27

Replace CTP1 from 0402 to 0201 (EVT Gerber Keep 0402)

2018/08/06 EVT

2018/08/08

EVT2

27

Replace CTP1 from 0201 to 0402

13

JDIMM1.162, 1.165 -> 1.149, 1.157

2018/08/08

EVT2

Replace CT33 part number with SGA00001E10

2018/08/10 DVT

Replace CTP1 from 0402 to 0201

2018/08/09

DVT

2018/08/09 DVTReplace RA13, RA14 footprint from 0603 to 0402

25

21

27

29

Add screw hole H16, H17

Tiiitllle

Sheet

SecurityClassification

Compal SecretData

THIS SHEET OF ENGINEERING D RAW ING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS C ONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F ROM THE CUSTO DY O F THE CO MPET ENT DIVISION OF R &D
DEPART MENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRO NICS, IN C. NEIT HER THIS SHEET NO R THE INFOR MATION IT CONTAINS
MAY BE US ED BY OR D ISCLOSED TO AN Y T HIRD PARTY WITHOUT PRIOR W RIT TEN CONS ENT OF COMPAL ELECTRONICS, INC .

3 2

Issued Date

Deciphered Date

LA-H131P

Rev

0.4

HW PIR

Siiize Document Number

Custom

43 of 46Date: Monday, November 05,2018

2018/11/05 2019/11/05

2018/08/16 DVT

Compal Electronics,Inc.

Vinafix.com

5

4

4

3 2 1

1

D D

C C

B B

A A

1

PG#

Modify List

Date Phase

2

Item

Page 4 of 6 for
HW

5

Version change list

(P.I.R. List)

Reason for change

3

4

5

6

7

9

8

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

29

Change Clip2 to small size

2018/08/16

DVT

Add UHS1, CHS1, CHS2 for LID switch

26 2018/08/16

DVT

9,24

Support type2 APU Change typeC USB3 to port0

2018/08/20

DVT

VSS_SENSE_B conntector to 1.8VALW

2018/08/21

DVT

7,37

Power request

Delete RSSD4~RSSD7 for PCIE/SATA MUX debug

17

2018/08/20

DVT

Reserve RHUB10~RHUB13 for touch scerrn co-lay

22 2018/08/20

DVT

Swap SPK pin define

21

Audio request

2018/08/21

DVT

28

R55 change to 15@

2018/08/23

DVT

Reserve Thermal Sensor. (UTS1 and related circuits)

26 2018/08/23

DVT

21

Swap HGNDA& HGNDB

2018/08/25

DVT

RC117/RC118/RTP1/RF1/R3/RHD5/R53/R111/
R264/RA12/RWL1/RSSD1 Change to R-short

2018/08/28

DVT

RC17 change to mount RC18 to un-mount

07 2018/08/28

DVTHDMI issue

Del RKB3/RKB4

Del U8/C85/C86/C87/J1/R72/C92/U18/C99/C100/C101/R73/J4

29

27

2018/08/31

DVT

2018/08/31

DVT

27

Add JKBL2 for KBL 14"/15" co-lay

2018/09/02

DVT

Reserve CC97ESD Request

5

2018/09/06

DVT

22

Replace USB2.0 HUB from Port0 to Port4

25

Replace USB2.0 Type-C from Port4 to Port0

2018/09/06

2018/09/06

DVT

DVT

28 R55 -> Always Pop (No matter 14" or 15")

2018/09/06

DVT

Replace CLIP12 with bigger size

29 2018/09/06

DVT

29

Modify H8 / H9 screw hole size

2018/09/06

DVT

27

Replace RFP1 with R-Short

2018/09/06

DVT

Remove RSSD4~7

17 2018/09/06

DVT

26

Add BOM Structure 14@ for 14" LID Switch (UHS1)

Tiiitllle

Sheet

SecurityClassification

Compal SecretData

THIS SHEET OF ENGINEERING D RAW ING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS C ONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F ROM THE CUSTO DY O F THE CO MPET ENT DIVISION OF R &D
DEPART MENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRO NICS, IN C. NEIT HER THIS SHEET NO R THE INFOR MATION IT CONTAINS
MAY BE US ED BY OR D ISCLOSED TO AN Y T HIRD PARTY WITHOUT PRIOR W RIT TEN CONS ENT OF COMPAL ELECTRONICS, INC .

3 2

Issued Date

Deciphered Date

LA-H131P

Rev

0.4

HW PIR

Siiize Document Number

Custom

44 of 46Date: Monday, November 05,2018

2018/11/05 2019/11/05

2018/09/07 DVT

Compal Electronics, Inc.

Vinafix.com

5

4

4

3 2 1

1

D D

C C

B B

A A

1

PG#

Modify List

Date Phase

2

Item

Page 5 of 6 for
HW

5

Version change list

(P.I.R. List)

Reason for change

3

4

5

6

7

9

8

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

Add BOM Structure HUB@

22 2018/09/07

DVT

8

Add BOM Structure NO_OBR@

2018/09/07

DVT

12

Add BOM Structure OBR@

2018/09/07

DVT

20

Un-Mount C48 / C49

2018/09/07

DVT

25 2018/09/07

DVT

Un-Mount CT33 / Replace CT22 from 0.47uF to 10uF

29

Mount C244, C245

2018/09/07

DVT

10

Un-Mount CC56, CC60, CC61, CC62, CC65, CC79, CC75, C1

2018/09/07

DVT

Cost Down Item

Cost Down Item

17

Un-Mount CSSD4, CSSD5

2018/09/07

DVT

13

Cost Down Item

Un-Mount CD76, CD79

2018/09/07

DVT

Cost Down Item

12

Un-Mount CD29, CD30, CD44, CD45, CD50, CD52

2018/09/07

DVT

13

Cost Down Item

Replace CD55, CD58, CD59, CD65, CD66, CD67 with NO_OBR@

2018/09/07

DVT

8 2018/09/07

DVTMODEL_ID -> RC112 (15@) / RC115 (14@)

9

Fine Tune Crystal Caps

2018/09/11

DVTCC27/CC28 -> Replace with 4.7pF (Vendor Suggestion: 3.9pF)

Fine Tune Crystal Caps

9

CC30/CC31 -> Replace with 10pF

2018/09/11

DVT

Fine Tune Crystal Caps

22

CHUB9 / CHUB10 -> Replace with 33pF (Not Replace it Yet)

2018/09/11

DVT

21

DA3 / DA4 -> Replace with SCA00004300 DVT

2018/09/11

27

Replace RTP3 / RTP4 with 1K Ohm

2018/09/14

DVT

27

Replace CTP2 / CTP3 with 150pF

2018/09/14

DVT

3 2018/10/03

PVTAdd DAZ and PR APU P/N, Modify DA BOM Structure

28

Replace KB_MUTLI_KEY - Pull Up +3VALW to +3VL

2018/10/03

PVT

29

Update CC94 cross moat caps power rail

2018/10/08

PVT

0 Ohm to R-Short -> R2, R9, RSSD2, RC64

2018/10/08

PVT

25

Remove DT3, Combine CC1/CC2 to DT4

2018/10/18

PVT

ESD Request

21

ESD Request

Add C246 (PLUG_IN)

Tiiitllle

Sheet

SecurityClassification

Compal SecretData

THIS SHEET OF ENGINEERING D RAW ING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS C ONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F ROM THE CUSTO DY O F THE CO MPET ENT DIVISION OF R &D
DEPART MENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRO NICS, IN C. NEIT HER THIS SHEET NO R THE INFOR MATION IT CONTAINS
MAY BE US ED BY OR D ISCLOSED TO AN Y T HIRD PARTY WITHOUT PRIOR W RIT TEN CONS ENT OF COMPAL ELECTRONICS, INC .

3 2

Issued Date

Deciphered Date

LA-H131P

Rev

0.4

HW PIR

Siiize Document Number

Custom

45 of 46Date: Monday, November 05,2018

2018/11/05 2019/11/05

2018/10/18 PVT

Compal Electronics, Inc.

Vinafix.com

5

4

4

3 2 1

1

D D

C C

B B

A A

1

PG#

Modify List

Date Phase

2

Item

Page 6 of 6 for
HW

5

Version change list

(P.I.R. List)

Reason for change

3

4

5

6

7

9

8

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

5 2018/10/18

PVT

RC2 -> OBR@

29 2018/10/19

PVTAdd 6x6 Laser Barcode Area

21

Remove C246, Rename it to CA30 (0.1uF), Reserve CA31

2018/10/22

PVT

25

DT4 Pin1 & 6 Swap

2018/10/23

PVT

27

Swap JKBL1 Pin Define

2018/10/24

PVT

21

CA16 / CA17 - 470pF to 1000pF, Remove CA31 & RA24 (Replace with CA30)

2018/10/26

PVT

ESD Request

ESD Request

7 2018/10/29

PVTJHDT1 Footprint add "-NPM" -> SAMTE_ASP-136446-07-B_20P-T-NPM

29 2018/10/29

PVTReserve CC98 ~ CC104 By-Pass Caps

RF Request

PVT

2018/10/29

Pop CD69

13

ESD Request

PVT

9

Replace ROM (UC2) Main Source with SA0000BJU00 (XMC)

2018/10/30

29

Replace Dual Load Switch (U10, U19) Main Source with SA0000BEL00

2018/10/30

PVT

29

PVT

29

PVT

23

PVT

29

PVT

23

PVT

7

PVT

25

Replace Small Clip Footprint (EMIST_SUL-15A3M_1P) - x8 PCS 2018/10/30

CC99 / CC102 / CC103 Replace with 0201, CC99 Power Replace with LX_DDR 2018/10/30

Add Type-C USB3.0 Re-Driver Related Circuit (RT17~39, CT34~41, UT4) 2018/10/31

Replace CC98 with 0201 footprint 2018/11/01

Modily BOM Structure of USB3 Re-Driver 2018/11/01

Reserve QC4 2018/11/01

Mount CT15 2018/11/05

PVT

Tiiitllle

Sheet

SecurityClassification

Compal SecretData

THIS SHEET OF ENGINEERING D RAW ING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS C ONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F ROM THE CUSTO DY O F THE CO MPET ENT DIVISION OF R &D
DEPART MENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRO NICS, IN C. NEIT HER THIS SHEET NO R THE INFOR MATION IT CONTAINS
MAY BE US ED BY OR D ISCLOSED TO AN Y T HIRD PARTY WITHOUT PRIOR W RIT TEN CONS ENT OF COMPAL ELECTRONICS, INC .

3 2

Issued Date

Deciphered Date

LA-H131P

Rev

0.4

HW PIR

Siiize Document Number

Custom

46 of 46Date: Monday, November 05,2018

2018/11/05 2019/11/05

Compal Electronics, Inc.