Compal LA-G172P Schematics Rev1.0

Vinaﬁx.com

A

B

C

D

E

MODEL NAME :

PCB NO :

LA-G172P

Centenario (DDP31)

BOM P/N :

1 1

ZZZ1 LA-G172P_MB

Dell/Compal Confidential

2 2

Schematic Document

(CENTENARIO ICE Lake U)

3 3

2019-05-29

Rev: 1.0 (A00)

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Date: Sheet of

Compal Electronics, Inc.

P001 - Cover

LA-G172P

E

1 101Wednesday, May 29, 2019

1.0 (A00)

Vinaﬁx.com

A

SSD 20x16 BGA 128G/256GB / 512GB

1 1

RFFEM

uSD Connector

M.2 SSD-Key B Debug

WLAN/BT 5.1 Solder down Harrison Peak AX 22560 &Killer 1435-S 1216 SIP

SD4.0/SDXC

SD_WP

p.52

p.68

p.67

6 1 2 1

GPIO (BIOS Controlled)

TBT ~4dB/2"

2SBU

Burnside Bridge TBT Re-Timer

TPS65987-DH

USB Type-C TBT with PD

2 2

(Left)

VBUS

USB (Top)

USB (Bottom)

p.43

VBUS

PP_HV1

PP_HV2

CC

2CC VCONN

I2C2

I2C1

p.42

SPI

USB2/I2C MUXES_L

p.50

CHRG_IN

5VALW

I2C

to EC

I2C

USB

TBT ~4dB/2"

2SBU

Burnside Bridge TBT Re-Timer

TPS65987-DH

USB Type-C TBT with PD (Right)

USB (Top)

VBUS

3 3

p.45

USB (Bottom)

VBUS

PP_HV1

PP_HV2

CC

VCONN2CC

I2C2

I2C1

p.44

SPI

USB2/I2C MUXES_R

p.50

CHRG_IN

5VALWB

I2C

to EC

I2C

USB

B

TPM1.2/2.0 ST ST33TPHF2XSPI

Card Reader 4.0 RealTek RTS5242 PCIe to SD

p.46,47

p.48,49

PCH SPI Flash ROM 32M

p.70p.70

SMBUS

TBT ~15dB / 7"

LSx / AUX

I2C

SMBUS

TBT ~15dB / 7"

LSx / AUX

I2C

p.9

p.66

PCIe Gen3 x 4lanes

PCIe Gen3 x 2lanes

PCIe Gen2 x 1lane

USB2.0

CNVi Gen2

PCIe Gen2 x 1lane

RT SPI Flash ROM 8M

p.46

PD SPI Flash ROM 8M

p.42

RT SPI Flash ROM 8M

p.48

PD SPI Flash ROM 8M

p.44

SPI

SPI#0

PCIe#9,10,11,12

PCIe#13,14

PCIe#3

USB2#3

CNVi Gen2

PCIe#16

SML#0

TBT#0

LSx / AUX

SML#1

USB2#8

IceLake-U 4+2

TBT#2

LSx / AUX

USB2#9

DDI#A

I2C#0

CSI2-E#1

I2C#3

ISH_I2C#1

SMB

DMIC

HDA

ISH_I2C#0

USB2#1

USB3#2

ISH_GP#5

C

eDP x4 lanes

I2C

Memory Bus (LPDDR4 / x)

Dual Channel 3733MHz

Memory Bus (LPDDR4 / x)

Dual Channel 3733MHz

MIPI CSI-2 x 1lanes

I2C ISH_I2C

SMB

DMIC

HDA

ISH_I2C

USB2.0

USB3.1

NB_LID#

D

LPDDR4 4GB X32x4 Memory Down LPDDR4x 8/16/32 GB X32x4 Memory Down

LPDDR4/x - ChA

p.23,24

LPDDR4/x - ChB

p.23,24

MIPI60 Debug

p.79

DMIC

Audio Codec with Amplifier ALC3281-CG

p.56

USB DCI Debug

p.79

Universal Headset Jack

2xSpeaker

p.57

Hinge up

13.3" 16:10 Sharp FHD+/UHD+ eDP v1.4b LED Driver Artic sand ARC3C0845

Touch Screen Controller Wacom G14T-W90xx

Middle Board

Gyro + Accelerometer ST LSM6DS3USTR

e-compass ST LIS2MDLTR

Sensor Board

Gyro + Accelerometer ST LSM6DS3USTR

e-compass ST LIS2MDLTR

p.38

E

UFCAM module

RGB camera OV01A

CAM LED

AMS TSL2584TSV

DMIC

2xDMIC

Fingerprint module

Fingerprint Controller

EC UART Debug/80 port

SPI Programmer

PD Programmer/I2C

DCI Debug

GOODIX GF5288+HT32

Power Button

MIPI60 Debug

APS Debug

BIOS UART Debug

JESPI Debug

p.77

PWRBTN#

p.77

to Battery Gauge FPC

to PD & USB2/I2C MUXES

4 4

RT Programmer

VCCIN Controller MP2940AGRT

Coin Cell

Charger

Battery Connector

A

B

USB2.0

USB2#5

GPP_D13 GPP_D14

SMBUS

ISH_GP#6

I2C#1

eSPI

SMB#03 GPIO

GPIO

p.91

p.83

BATBTN#

SMBUS

GPIO

EC MEC5105

SMB#04

SMB#05

SMB#10

GPIO

GPIO 161 (VCI_IN2#)

PWM#0

PWM#1

BCM#1

PS/2

SMB#00

LED

p.82

p.33

Hinge Down

TAB_LID#

I2C

TAB_LID#

NB_LID#

PWM

BC Bus

PS/2

SMBUS

C

Fan 1

Fan 2

p.77

KB Transfer Board

+3V_NB_LID

Hall Sensor BU52058

2nd Accelerometer ST LNG2DMTR

KB Controller ECE1117

+3V_NB_LID

Keyboard

Touchpad

Battery Gauge

LNG2DMTR

D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

P002 - Block Diagram

Size Document Number Rev

LA-G172P

Date: Sheet of

E

2 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

A

Board ID Table

3.3V +/- 5%Vcc

0 1 2 3 4 5 6 7

RBoard ID

240K +/- 5% 4700p 130K +/- 5% 62K +/- 5% 33K +/- 5%

8.2K +/- 5%

4.3K +/- 5% 2K +/- 5% 1K +/- 5% 4700p

C

4700p 4700p 4700p 4700p 4700p 4700p

SMBUS Control Table

SOURCE

PCH_SML0CLK PCH PCH_SML0DATA

PCH_SML1CLK PCH_SML1DATA

SMBCLK SMBDATA

EC_SMB03_CLK EC_SMB03_DAT

EC_SMB04_CLK EC_SMB04_DAT

EC_SMB05_CLK EC_SMB05_DAT

EC_SMB10_CLK EC_SMB10_DAT

EC_SMB00_CLK EC_SMB00_DAT

PCH

MEC5105

PCH

V

BATT Connector

V

Charger

V

REV

M00 X00 X01 X02 X03

VCCIN ControllerPDController

V

PCB Revision

0.1

0.2

0.3

0.4

0.5

V

MIPI60

V

USB/I2C MUX

V

BurnSide Bridge

V V

Accel+Gyro

V

PCIE/USB3.1

Flexible I/O

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

Interface DESTINATION

PCI-E#1 / USB 3.1#1

PCI-E#2 / USB 3.1#2

PCI-E#3 / USB 3.1#3

PCI-E#4 / USB 3.1#4

PCI-E#5 / USB 3.1#5

PCI-E#6 / USB 3.1#6

PCI-E#7

PCI-E#8

PCI-E#9

PCI-E#10

PCI-E#11 / SATA#0

PCI-E#12 / SATA#1a

PCI-E#13

PCI-E#14

PCI-E#15 / SATA#1b

None

USB DCI Debug

WLAN PCIe Gen2(Reserve)

None

BGA SSD PCIe x4 GEN3

M.2 SSD Debug(Reserve)

None

15

1 1

USB 2.0 CLK

DESTINATIONUSB 2.0 PORT#

1

2

3

4

5

6

7

8

9

10

USB DCI Debug

None

BT(Reserve)

None

FPR

None

Type-C_L

Type-C_R

None

CLK

DESTINATIONDIFFERENTIAL

CLKOUT_PCIE0

CLKOUT_PCIE1

CLKOUT_PCIE2

CLKOUT_PCIE3

CLKOUT_PCIE4

CLKOUT_PCIE5

WLAN(Reserve)

M.2 SSD(Reserve)

SSD

None

Card Reader

None

FLEX CLOCKS DESTINATION

ESPI_CLK

EC eSPI

Thunderbolt

TBT

Displayport

DDI

PCI-E#16 / SATA#2

Card Reader PCIE GEN2

TBT PORT# DESTINATION

0

1

USB Type-C_L

None

2 USB Type-C_R

3

None

DDI PORT# DESTINATION

A

B

4 Lane eDP

None

CSI2

C/D

F

G/H

DESTINATIONCSI2 PORT#

None

UFE

None

Symbol Note :

: means de-pop

@

: means Digital Ground

: means Analog Ground

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numb er Rev

Date: Sheet of

Compal Electronics, Inc.

P003 - Notes List

LA-G172P

3 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

Power Rail

Audio Power Rail

D D

Type-C Port-L

Type-C Port-R

C C

VCCIN

IMVP_VR_ON_EN

1.8V_PRIM_PG

0.6V_VDDQ_EN_P

B B

A A

1.1V_MEM_EN

SSD_PWR3_EN_P

SSD_PWR2_EN_P

TDC 36A Peak Current 62A (MP2940A) Page:91,92,93

VCCIN_AUX TDC 10A Peak Current 26A (MP2941) Page:89,90

+0.6V_VDDQ (LPDDR4X only) TDC 1.25A Peak Current 1.79A (NB691) Page:87

+1.1V_MEM TDC 4A Peak Current 5.7A (RT6243B) Page:86

+SSD_PWR3 TDC 1.4A Peak Current 2A (NB693) Page:95

+SSD_PWR2 TDC 1.4A Peak Current 2A (NB691) Page:94

+VCC1.05_OUT_FET

+1.1V_MEM

U735 AOZ1336D

U734 AOZ1336D

Q15 SI3457BDV

PD1 Controller TPS65987DH

EC MEC5105

PD2 Controller TPS65987DH

SSD_PWR3_EN

SSD_PWR2_EN

EN_INVPWR

B+B+

UC13 AOZ1334DI-01

UC12 AOZ1334DI-01

UC27 AOZ1334DI-01

+SSD_PWR_3

+1.8V_1.2V_SSD

+INV_PWR_SRC

Centenario POWER BLOCK DIAGRAM

VCCST_EN

VCCSTG_EN

VCC_SFR_OC_EN

+VCCST_CPU

+VCCSTG_CPU

+VCC_SFR_OC

2S2P Battery 51W

Buck-boost Charger ISL9538B (NVDC) Page:83

B+

ALWON_5VALW

ALWON_5VALW B

B+

PCH_PRIM_EN

ALWON_3VALW

B+

+5VALW TDC 5A Peak Current 7.2A (NB502) Page:85

+5VALWB TDC 3.5A Peak Current 5A (NB502) Page:85

+1.8VPRIM TDC 2.56A Peak Current 3.65A (NB691) Page:88

+3.3VALW TDC: 5.1A Peak Current 7.22A (NB502) Page:84

U36 AOZ1336DI

UPD1 TPS65987DH

UC28 AOZ1336DI

U55 SY6288

U60 AOZ1336DI

UPD2 TPS65987DH

UC22 AOZ1334DI-01

UC25 AOZ1336DI

UC24 AOZ1336DI

UC23 AOZ1334DI-01

U7 SY6288

U31 AOZ1331DI

U34 AOZ1331DI

UC30 AOZ1336DI

U51 AOZ1336DI

U733 AOZ1336DI

UC31 SY6288

UT1 AOZ1336DI

UT2 AOZ1336DI

AUD_PWR_EN

RUN_ON_P

3.3V_CAM_EN

RUN_ON_P

CPU_C10_GATE#

AUD_PWR_EN

RUN_ON_P

SUS_ON_P

ENVDD

VCCDSW_EN_GPIO

WLAN_PW R_EN

TS_EN_R

RUN_ON_P

AUD_PWR_EN

SSD_PWR1_EN

SD_PWR_EN

3.3V_TBT_L_EN

3.3V_TBT_R_EN

+5VS_AUDIO

+5VALWB_L_TBT

+5VS

+CAM_PWR

+5VBS

+5VALWB_R_TBT

+VCC1P8A

+1.8VS_AUDIO

+1.8VS

+1.8V_MEM

+LCDVDD

+3V_PRIM

+3VALW_DSW

+3VS_WLAN

+3VS_TS

+3VS

+3VS_AUDIO

+3.3VDX_SSD

+3VS_CR

+3.3V_TBT_L

+3.3V_TBT_R

UKBC26 AOZ1336DI

UMID1 RT9078N

UMID2 RT9078N

UMID3 RT9078N

Transfer Board

TP_EN

+TRN_3VS_TP

Middle Board

+MID_CAM_PWR

+MID_UF_AVDD_2.8V

+MID_UF_DVDD_1.2V

+MID_UF_VDD_1.8V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2

2017/08/24 2017/08/24

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

P004 - Power MAP

LA-G172P

1

4 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

Power On Sequence

[AC in] for VBU_L/VBU_R

TBT_VBUS

+3V_LDO

PD Output

+CHG_VIN_20V

PD Output

CHR Output

B+

ACAV_INEC Input

D D

EC Output ALWON

+3VALW

VR Output

+5VALW (+5VALWB)

VR Output

ALW_PWRGD_3V_5V

VR Output

EC Input

POWER_SW_IN#

EC pay attention timing

VCCDSW_EN_GPIO

+3VALW_DSW/+3V_PRIM(U31)

EC Output

PCH_DPWROK

PCH Output

SIO_SLP_SUS#

+1.8V_PRIM(PU500)

VR Output

PCH Output

+VCC1.05_OUT_PCH

PCH Output

+VCC1.05_OUT_FET

+VCCST_CPU(UC13)

1.8V_PRIM_PG

C C

B B

VR Output

+VCCIN_AUX(PU900)

PCH Output

VCCIN_AUX_VR_PG

VR Output

PCH_RSMRST#

EC Output

ESPI_RESET#

PCH Output

EC Output AC_PRESENT

POWER_SW_IN# 16ms < T < 4s

PCH Output

SIO_SLP_S5#

SIO_SLP_S4#PCH Output

SIO_SLP_S3#PCH Output

PCH Output

CPU_C10_GATE#

SIO_SLP_S0#PCH Output

RUN_ON_ECEC Output

+1.1V_MEM(PU700)

VR Output

+0.6V_VDDQ(PU800)

VR Output

+1.8V_MEM(UC23)

+VCCSTG_CPU(UC12)

+VCC1P8A(UC22)

+VCC_SFR_OC(UC27)

+3VS(UC30)

+1.8VS(UC24)

+5VS(UC28)/+5VBS(U60)

+3.3VDX_SSD(U733)

+SSD_PWR2(PU1500)

+SSD_PWR3(PU1400)

RUNPWROK(ALL_SYS_PWRGD)EC Input

EC Output

IMVP_VR_ON_P(VCCST_PWRGD)

+VCCIN(PU1100)VR Output

PCH_PWROK_PVR Output

CPUPWRGD

SYS_PWROKEC Output

PCH_PLTRST#_ECPCH Output

Ta

Tb

Tc

Td

Te

Tf +5VALW (+5VALWB) Tf

Tg Tg

Th

200ms < Th

T1

T2

T3

T4

T5

T6

T7

T8

T9

T10

T11

T12

T13

[Battery only, AC absent]

B+

CHR Output

PWR_SW_IN#

EC Output

ALWON Td

VR Output

+3VALW

VR Output

ALW_PWRGD_3V_5V

VR Output

T14

T15

T16

T17

T18

T19

T20

T21

T22

T23

T24

T25

T26

T27

T28

T29

T30

T31

T32

T33

T34

TBT_VBUS

Ta

+3V_LDO

Tb

+CHG_VIN_20V

Tc

200ms < Th

Te

T35

T36

T37

B+

Td Te

ALWON

Tf

ALWON

Tg

+3VALW

Th

ITEM Measure Point

VCCDSW_EN_GPIO

T1

+3VALW_DSW/+3V_PRIM

T2

PCH_DPWROK

T3

SIO_SLP_SUS#

T4

+1.8V_PRIM

T5

+1.8V_PRIM

T6

+VCC1.05_OUT_FET

T7

+1.8V_PRIM

T8

1.8V_PRIM_PG

T9

+VCCIN_AUX

T10

VCCIN_AUX_VR_PG

T11

PCH_RSMRST#

T12

ESPI_RESET#

T13

SIO_SLP_S5#

T14

SIO_SLP_S4#

T15

SIO_SLP_S4#

T16

SIO_SLP_S4#

T17

SIO_SLP_S4#

T18

SIO_SLP_S4#

T19

SIO_SLP_S4#

T20

SIO_SLP_S4#

T21

SIO_SLP_S4#

T22

SIO_SLP_S4#

T23

SIO_SLP_S4#

T24

RUN_ON_EC

T25

RUN_ON_EC

T26

RUN_ON_EC

T27

RUN_ON_EC

T28

RUN_ON_EC

T29

RUN_ON_EC

T30

+3VS

T31

RUNPWROK

T32

IMVP_VR_ON_P

T33

+VCCIN

T34

PCH_PWROK_P

T35

CPUPWRGD

T36

SYS_PWROK

T37

[AC in]

+3V_LDO

To

+CHG_VIN_20V

To

B+

To

ACAV_IN

To

ALWONACAV_IN

To

+3VALW

To

+5VALW (+5VALWB) ALWON

To

ALW_PWRGD_3V_5V

To

+3VALW_DSW/+3V_PRIM

To

PCH_DPWROK

To

SIO_SLP_SUS#

To

+1.8V_PRIM

To

+VCC1.05_OUT_PCH

To

+VCC1.05_OUT_FET

To

+VCCST_CPU

To

1.8V_PRIM_PG

To

+VCCIN_AUX

To

VCCIN_AUX_VR_PG

To

PCH_RSMRST#

To

ESPI_RESET#

To

AC_PRESENT

To

SIO_SLP_S4#

To

SIO_SLP_S3#

To

CPU_C10_GATE#

To

SIO_SLP_S0#

To

RUN_ON_EC

To

+1.1V_MEM

To

+0.6V_VDDQ

To

+1.8V_MEM

To

+1.8V_MEM

To

+VCC1P8A

To

+VCC_SFR_OC

To

+3VS

To

+1.8VS

To

+5VS/+5VBS

To

+3.3VDX_SSD

To

+SSD_PWR2

To

+SSD_PWR3

To

RUNPWROK

To

IMVP_VR_ON_P

To

+VCCIN

To

PCH_PWROK_P

To

CPUPWRGD

To

SYS_PWROK

To

PCH_PLTRST#_EC

To

TimeMeasure PointITEM

Time

[Battery only, AC absent]

Measure PointITEM Time

B+

Tc

POWER_SW_IN# Low pluse width

Th

POWER_SW_IN#

Td

ALWON +3VALW

Te Tf

+3VALW ALW_PWRGD_3V_5V

Tg

POWER_SW_IN#

To

ALWON

To To

+5VALW (+5VALWB)

To To

Power Down Sequence

EC pay attention timing

PCH_PLTRST#

CPUPWRGD

PCH_CLK_OUTPUTS

SIO_SLP_S3#

CPU_C10_GATE#

SYS_PWROK

PCH_PWROK_P

IMVP_VR_ON_P(VCCST_PWRGD)

RUNPWROK(ALL_SYS_PWRGD)

+VCCIN

3VS/+1.8VS/+5VS/+5VBS

+VCCSTG_CPU

SIO_SLP_S4#

+1.1V_MEM

+0.6V_VDDQ

+1.8V_MEM

+VCC_SFR_OC

SIO_SLP_S5#

+VCC1P05_OUTPUT_PLL

PCH_RSMRST#

PCH_DPWROK

+3VALW_DSW/+3V_PRIM

SIO_SLP_SUS#

ESPI_RESET#

SIO_SLP_S0#

+1.8V_PRIM

+VCC1.05_OUT_PCH

+VCCIN_AUX

+VCCST_CPU

SUSCLK

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

P005 - Power Sequence

Size Document Number Rev

LA-G172P

Date: Sheet of

1

5 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

D D

eDP

PVT_10

DVT1_76

+3V_PRIM

RH74210K_0201_5%

12

C C

RH60310K_0201_5%

12

RH675100K_0201_5%

12

RH717100K_0201_5% @

12

RH718100K_0201_5% @

12

DVT1_30

USB_OC1#

USB_OC2#

EDP_HPD

CPU_TCP0_HPD

USB_OC1#

DVT1_30

4

UC1A

EDP_TXN0(38) EDP_TXP0(38) EDP_TXN1(38) EDP_TXP1(38) EDP_TXN2(38) EDP_TXP2(38) EDP_TXN3(38) EDP_TXP3(38)

EDP_AUXN(38) EDP_AUXP(38)

TBT_0_LSX_TX(46) TBT_0_LSX_RX(46)

TBT_2_LSX_TX(48) TBT_2_LSX_RX(48)

EDP_HPD(38,58)

DVT1_30

TS_INT#(38)

ENVDD_PCH(38) PANEL_BKLEN(10,38) EDP_BIA_PWM(38)

TP99

TP69

TBT_0_LSX_RX

TBT_1_LSX_RX

TBT_2_LSX_RX

TBT_3_LSX_RX

EDP_HPD

CPU_TCP0_HPD

USB_OC1# USB_OC2#

PAD~D

1

PAD~D

1

RC3150_0201_1%

12

RSVD_1

TP@

DISP_UTILS KB_DET#

TP@

DP_RCOMP

Y5

DDIA_TXN_0

Y3

DDIA_TXP_0

Y1

DDIA_TXN_1

Y2

DDIA_TXP_1

V2

DDIA_TXN_2

V1

DDIA_TXP_2

V3

DDIA_TXN_3

V5

DDIA_TXP_3

W4

DDIA_AUX_N

W3

DDIA_AUX_P

AE3

DDIB_TXN_0

AE5

DDIB_TXP_0

AE2

DDIB_TXN_1

AE1

DDIB_TXP_1

AC5

DDIB_TXN_2

AC3

DDIB_TXP_2

AC1

DDIB_TXN_3

AC2

DDIB_TXP_3

AD3

DDIB_AUX_N

AD4

DDIB_AUX_P

DP15

GPP_E22/DDPA_CTRLCLK/PCIE_LNK_DOWN

DJ17

GPP_E23/DDPA_CTRLDATA/BK4/SBK4

DL40

GPP_H16/DDPB_CTRLCLK

DP42

GPP_H17/DDPB_CTRLDATA

DL17

GPP_E18/DDP1_CTRLCLK/TBT_LSX0_TXD

DK17

GPP_E19/DDP1_CTRLDATA/TBT_LSX0_RXD

DN17

GPP_E20/DDP2_CTRLCLK/TBT_LSX1_TXD

DP17

GPP_E21/DDP2_CTRLDATA/TBT_LSX1_RXD

DK34

GPP_D9/ISH_SPI_CS_N/DDP3_CTRLCLK/GSPI2_CS0_N/TBT_LSX2_TXD

DL34

GPP_D10/ISH_SPI_CLK/DDP3_CTRLDATA/GSPI2_CLK/TBT_LSX2_RXD

DN33

GPP_D11/ISH_SPI_MISO/DDP4_CTRLCLK/GSPI2_MISO/TBT_LSX3_TXD

DL33

GPP_D12/ISH_SPI_MOSI/DDP4_CTRLDATA/GSPI2_MOSI/TBT_LSX3_RXD

DW11

GPP_E14/DPPE_HPDA/DISP_MISCA

CV42

GPP_A18/DDSP_HPDB/DISP_MISCB

CV39

GPP_A19/DDSP_HPD1/DISP_MISC1

CY43

GPP_A20/DDSP_HPD2/DISP_MISC2

CR41

GPP_A14/USB_OC1_N/DDSP_HPD3/DISP_MISC3

CT41

GPP_A15/USB_OC2_N/DDSP_HPD4/DISP_MISC4

DV14

GPP_E17

DN21

EDP_VDDEN

DL19

EDP_BKLTEN

DU19

EDP_BKLTCTL

J3

RSVD_1

D2

DISP_UTILS

R2

DISP_RCOMP

ICL-U_BGA1526

@

3

GPP_A21 GPP_A22

BB5 BB6 AV6 AV5 BH2 BH1 BF1 BF2

AY5 AY6

AR5 AR6 AL5 AL3 BD2 BD1 BB1 BB2

AN3 AN5

BF6 BF5 BJ5 BJ6 BL1 BL2 BM2 BM1

BG6 BG5

BP6 BP5 BV5 BV6 BR1 BR2 BT2 BT1

BT6 BT5

AY1 AY2

CT38 CV43 CV41

TCRCOMP_DN TCRCOMP_DP

RTC_DET#

RH734 0_0201_5%

DVT1_62

TCP0_TX_N0 TCP0_TX_P0 TCP0_TX_N1

TCP0_TX_P1 TCP0_TXRX_N0 TCP0_TXRX_P0 TCP0_TXRX_N1 TCP0_TXRX_P1

TCP0_AUX_N

DDI

TBT / USB / DP

1 0f 19

TCP0_AUX_P

TCP1_TX_N0

TCP1_TX_P0

TCP1_TX_N1

TCP1_TX_P1 TCP1_TXRX_N0 TCP1_TXRX_P0 TCP1_TXRX_N1 TCP1_TXRX_P1

TCP1_AUX_N TCP1_AUX_P

TCP2_TX_N0

TCP2_TX_P0

TCP2_TX_N1

TCP2_TX_P1 TCP2_TXRX_N0 TCP2_TXRX_P0 TCP2_TXRX_N1 TCP2_TXRX_P1

TCP2_AUX_N TCP2_AUX_P

TCP3_TX_N0

TCP3_TX_P0

TCP3_TX_N1

TCP3_TX_P1 TCP3_TXRX_N0 TCP3_TXRX_P0 TCP3_TXRX_N1 TCP3_TXRX_P1

TCP3_AUX_N TCP3_AUX_P

TC_RCOMP_N TC_RCOMP_P

GPP_A17/DISP_MISCC

2

TBT_0_TTX_DRX_N0 (46) TBT_0_TTX_DRX_P0 (46) TBT_0_TTX_DRX_N1 (46) TBT_0_TTX_DRX_P1 (46) TBT_0_TRX_DTX_N0 (46) TBT_0_TRX_DTX_P0 (46) TBT_0_TRX_DTX_N1 (46) TBT_0_TRX_DTX_P1 (46)

TBT_0_DP_AUXN (46) TBT_0_DP_AUXP (46)

TBT_2_TTX_DRX_N0 (48) TBT_2_TTX_DRX_P0 (48) TBT_2_TTX_DRX_N1 (48) TBT_2_TTX_DRX_P1 (48) TBT_2_TRX_DTX_N0 (48) TBT_2_TRX_DTX_P0 (48) TBT_2_TRX_DTX_N1 (48) TBT_2_TRX_DTX_P1 (48)

TBT_2_DP_AUXN (48) TBT_2_DP_AUXP (48)

RC1 150_0201_1%

1 2

@

1 2

RTC_DET#_R (63)

3.3V_CAM_EN (71) KB_DET# (63)

TBT_L

TBT_R

1

+3V_PRIM

RH672 10K_0201_5%

1 2

+3V_PRIM +3V_PRIM +3V_PRIM +3V_PRIM

B B

12

R6172

@

4.7K_0201_5%

TBT_0_LSX_RX

RC691 20K_0201_5%

1 2

TBT LSX #0 PINS VCCIO CONFIGURATION

HIGH

LOW

3.3V

1.8V

12

R6173

@

4.7K_0201_5%

TBT_1_LSX_RX TBT_2_LSX_RX TBT_3_LSX_RX

RC692

@

20K_0201_5%

1 2

TBT LSX #1 PINS VCCIO CONFIGURATION

HIGH

LOW

3.3V

1.8V

12

R6174

@

4.7K_0201_5%

RC693 20K_0201_5%

1 2

TBT LSX #2 PINS VCCIO CONFIGURATION

HIGH

LOW

3.3V

1.8V

TBT LSX #3 PINS VCCIO CONFIGURATION

HIGH

LOW

12

RC694 20K_0201_5%

1 2

R6175

@

4.7K_0201_5%

@

3.3V

1.8V

PLACE CLOSE TO THE SIGNAL TO AVOID STUB

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2015/10/22 2013/10/28

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Numb er Rev

Date: Sheet of

Compal Electronics, Inc.

P006 - ICL-U(1/13)TCSS,EDP

LA-G172P

1

6 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

Memory connection follow J72913-201 Rev 01_20181217

D D

UC1B

LP4(NIL) / DDR4(NIL) LP4(NIL) / DDR4(NIL)

DDR_A_D0_0(23) DDR_A_D0_1(23) DDR_A_D0_2(23) DDR_A_D0_3(23) DDR_A_D0_4(23) DDR_A_D0_5(23) DDR_A_D0_6(23) DDR_A_D0_7(23) DDR_A_D1_0(23) DDR_A_D1_1(23) DDR_A_D1_2(23) DDR_A_D1_3(23) DDR_A_D1_4(23) DDR_A_D1_5(23) DDR_A_D1_6(23) DDR_A_D1_7(23) DDR_A_D2_0(23) DDR_A_D2_1(23) DDR_A_D2_2(23) DDR_A_D2_3(23)

C C

B B

A A

DDR_A_D2_4(23) DDR_A_D2_5(23) DDR_A_D2_6(23) DDR_A_D2_7(23) DDR_A_D3_0(23) DDR_A_D3_1(23) DDR_A_D3_2(23) DDR_A_D3_3(23) DDR_A_D3_4(23) DDR_A_D3_5(23) DDR_A_D3_6(23) DDR_A_D3_7(23) DDR_B_D0_0(23) DDR_B_D0_1(23) DDR_B_D0_2(23) DDR_B_D0_3(23) DDR_B_D0_4(23) DDR_B_D0_5(23) DDR_B_D0_6(23) DDR_B_D0_7(23) DDR_B_D1_0(23) DDR_B_D1_1(23) DDR_B_D1_2(23) DDR_B_D1_3(23) DDR_B_D1_4(23) DDR_B_D1_5(23) DDR_B_D1_6(23) DDR_B_D1_7(23) DDR_B_D2_0(23) DDR_B_D2_1(23) DDR_B_D2_2(23) DDR_B_D2_3(23) DDR_B_D2_4(23) DDR_B_D2_5(23) DDR_B_D2_6(23) DDR_B_D2_7(23) DDR_B_D3_0(23) DDR_B_D3_1(23) DDR_B_D3_2(23) DDR_B_D3_3(23) DDR_B_D3_4(23) DDR_B_D3_5(23) DDR_B_D3_6(23) DDR_B_D3_7(23)

DDR_COMP_0

RC12100_0201_1%

12

RC13100_0201_1% RC14100_0201_1%

DDR_COMP_1 DDR_COMP_2

12 12

CA48

DDRA_DQ0_0/DDR0_DQ0_0

CA47

DDRA_DQ0_1/DDR0_DQ0_1

CA49

DDRA_DQ0_2/DDR0_DQ0_2

BV49

DDRA_DQ0_3/DDR0_DQ0_3

CA45

DDRA_DQ0_4/DDR0_DQ0_4

BV47

DDRA_DQ0_5/DDR0_DQ0_5

BV45

DDRA_DQ0_6/DDR0_DQ0_6

BV48

DDRA_DQ0_7/DDR0_DQ0_7

CC42

DDRA_DQ1_0/DDR0_DQ1_0

CC39

DDRA_DQ1_1/DDR0_DQ1_1

CC43

DDRA_DQ1_2/DDR0_DQ1_2

CE38

DDRA_DQ1_3/DDR0_DQ1_3

CC38

DDRA_DQ1_4/DDR0_DQ1_4

CE39

DDRA_DQ1_5/DDR0_DQ1_5

CE42

DDRA_DQ1_6/DDR0_DQ1_6

CE43

DDRA_DQ1_7/DDR0_DQ1_7

BT48

DDRA_DQ2_0/DDR0_DQ2_0

BT47

DDRA_DQ2_1/DDR0_DQ2_1

BT49

DDRA_DQ2_2/DDR0_DQ2_2

BN49

DDRA_DQ2_3/DDR0_DQ2_3

BT45

DDRA_DQ2_4/DDR0_DQ2_4

BN47

DDRA_DQ2_5/DDR0_DQ2_5

BN45

DDRA_DQ2_6/DDR0_DQ2_6

BN48

DDRA_DQ2_7/DDR0_DQ2_7

BV42

DDRA_DQ3_0/DDR0_DQ3_0

BV39

DDRA_DQ3_1/DDR0_DQ3_1

BV43

DDRA_DQ3_2/DDR0_DQ3_2

BW38

DDRA_DQ3_3/DDR0_DQ3_3

BV38

DDRA_DQ3_4/DDR0_DQ3_4

BW39

DDRA_DQ3_5/DDR0_DQ3_5

BW42

DDRA_DQ3_6/DDR0_DQ3_6

BW43

DDRA_DQ3_7/DDR0_DQ3_7

AY48

DDRB_DQ0_0/DDR0_DQ4_0

AY47

DDRB_DQ0_1/DDR0_DQ4_1

AY49

DDRB_DQ0_2/DDR0_DQ4_2

AU45

DDRB_DQ0_3/DDR0_DQ4_3

AY45

DDRB_DQ0_4/DDR0_DQ4_4

AU47

DDRB_DQ0_5/DDR0_DQ4_5

AU48

DDRB_DQ0_6/DDR0_DQ4_6

AU49

DDRB_DQ0_7/DDR0_DQ4_7

AY42

DDRB_DQ1_0/DDR0_DQ5_0

AY38

DDRB_DQ1_1/DDR0_DQ5_1

AY43

DDRB_DQ1_2/DDR0_DQ5_2

BB39

DDRB_DQ1_3/DDR0_DQ5_3

AY39

DDRB_DQ1_4/DDR0_DQ5_4

BB38

DDRB_DQ1_5/DDR0_DQ5_5

BB42

DDRB_DQ1_6/DDR0_DQ5_6

BB43

DDRB_DQ1_7/DDR0_DQ5_7

AR48

DDRB_DQ2_0/DDR0_DQ6_0

AR47

DDRB_DQ2_1/DDR0_DQ6_1

AR49

DDRB_DQ2_2/DDR0_DQ6_2

AM45

DDRB_DQ2_3/DDR0_DQ6_3

AR45

DDRB_DQ2_4/DDR0_DQ6_4

AM47

DDRB_DQ2_5/DDR0_DQ6_5

AM48

DDRB_DQ2_6/DDR0_DQ6_6

AM49

DDRB_DQ2_7/DDR0_DQ6_7

AT42

DDRB_DQ3_0/DDR0_DQ7_0

AT39

DDRB_DQ3_1/DDR0_DQ7_1

AR43

DDRB_DQ3_2/DDR0_DQ7_2

AT38

DDRB_DQ3_3/DDR0_DQ7_3

AR38

DDRB_DQ3_4/DDR0_DQ7_4

AR39

DDRB_DQ3_5/DDR0_DQ7_5

AR42

DDRB_DQ3_6/DDR0_DQ7_6

AT43

DDRB_DQ3_7/DDR0_DQ7_7

D47

DDR_RCOMP_0

E46

DDR_RCOMP_1

C47

DDR_RCOMP_2

ICL-U_BGA1526

@

2 of 19

DDRA_CLK_N/DDR0_CLK_N_0 DDRA_CLK_P/DDR0_CLK_P_0 DDRB_CLK_N/DDR0_CLK_N_1 DDRB_CLK_P/DDR0_CLK_P_1

DDRA_CKE0/DDR0_CKE0

DDRA_CKE1/NC DDRB_CKE0/NC

DDRB_CKE1/DDR0_CKE1

DDRA_CS_0/DDR0_CS#0

DDRA_CS_1/NC DDRB_CS_0/NC

DDRB_CS_1/DDR0_CS#1

DDRB_CA4/DDR0_BA0

NC/DDR0_BA1

DDRA_CA5/DDR0_BG0

NC/DDR0_BG1

NC/DDR0_MA0 NC/DDR0_MA1

DDRB_CA5/DDR0_MA2

NC/DDR0_MA3

NC/DDR0_MA4 DDRA_CA0/DDR0_MA5 DDRA_CA2/DDR0_MA6 DDRA_CA4/DDR0_MA7 DDRA_CA3/DDR0_MA8 DDRA_CA1/DDR0_MA9

NC/DDR0_MA10 NC/DDR0_MA11 NC/DDR0_MA12

DDRB_CA0/DDR0_MA13

DDRB_CA2/DDR0_MA14WE# DDRB_CA1/DDR0_MA15CAS# DDRB_CA3/DDR0_MA16RAS#

NC/DDR0_ODT_0 NC/DDR0_ODT_1

DDRA_DQSN_0/DDR0_DQSN_0

DDRA_DQSP_0/DDR0_DQSP_0

DDRA_DQSN_1/DDR0_DQSN_1

DDRA_DQSP_1/DDR0_DQSP_1

DDRA_DQSN_2/DDR0_DQSN_2

DDRA_DQSP_2/DDR0_DQSP_2

DDRA_DQSN_3/DDR0_DQSN_3

DDRA_DQSP_3/DDR0_DQSP_3

DDRB_DQSN_0/DDR0_DQSN_4

DDRB_DQSP_0/DDR0_DQSP_4

DDRB_DQSN_1/DDR0_DQSN_5

DDRB_DQSP_1/DDR0_DQSP_5

DDRB_DQSN_2/DDR0_DQSN_6

DDRB_DQSP_2/DDR0_DQSP_6

DDRB_DQSN_3/DDR0_DQSN_7

DDRB_DQSP_3/DDR0_DQSP_7

NC/DDR0_PAR

NC/DDR0_ACT#

NC/DDR0_ALERT#

RSVD_73 DDR0_VREF_CA DDR1_VREF_CA

DDR_VTT_CTL

DRAM_RESET#

BL48 BL47 BF42 BF43

BG49 BJ47 BF38 BF41

BM38 BM42 BP42 BG42

BM43 BG39

BB49 BD47

BB48 BL49 BG38 BL45 BJ46 BG48 BE45 BG45 BG47 BE47 BJ38 BB47 BE48 BM39 BG43 BJ42 BM41

BJ39 BB45

BY47 BY46 CC41 CE41 BR47 BR46 BV41 BW41 AV46 AV47 AY41 BB41 AN46 AN47 AR41 AT41

BF39 BE49 BD46

M38 C44 B45 M39 DK47

DDR_A_CLK# (23) DDR_A_CLK (23) DDR_B_CLK# (23) DDR_B_CLK (23)

DDR_A_CKE0 (23) DDR_A_CKE1 (23) DDR_B_CKE0 (23) DDR_B_CKE1 (23)

DDR_A_CS#0 (23) DDR_A_CS#1 (23) DDR_B_CS#0 (23) DDR_B_CS#1 (23)

DDR_B_CA4 (23)

DDR_A_CA5 (23)

DDR_B_CA5 (23)

DDR_A_CA0 (23) DDR_A_CA2 (23) DDR_A_CA4 (23) DDR_A_CA3 (23) DDR_A_CA1 (23)

DDR_B_CA0 (23) DDR_B_CA2 (23) DDR_B_CA1 (23) DDR_B_CA3 (23)

DDR_A_DQS#0 (23) DDR_A_DQS0 (23) DDR_A_DQS#1 (23) DDR_A_DQS1 (23) DDR_A_DQS#2 (23) DDR_A_DQS2 (23) DDR_A_DQS#3 (23) DDR_A_DQS3 (23) DDR_B_DQS#0 (23) DDR_B_DQS0 (23) DDR_B_DQS#1 (23) DDR_B_DQS1 (23) DDR_B_DQS#2 (23) DDR_B_DQS2 (23) DDR_B_DQS#3 (23) DDR_B_DQS3 (23)

+1.1V_MEM

BF39,BE49 SDS CRB P.8 NC

M_0_ALERT_N

M38,C44,B45 SDS CRB P.8 NC

DDR_VTT_CTRL DDR_DRAMRST#

RH11 0_0201_5%@

1 2

1

TP37

TP@

PAD~D

RH12 470_0201_1%

1 2

RH42 0_0201_5%@

M39 (DDR_VTT_CTL) is DDR4 System Memory Power Gate Control Buffer use , LPDDR4/x don't use. Processor EDS Rev0p7 P.118,119 #572795 SDS CRB NC

C44(DDR0_VREF_CA),B45(DDR1_VREF_CA) for DDR4 used only LPDDR4/4x has all Vref Internal inside the DRAMS Rev.0.91 PDG P.112 #572907

1 2

1

CC740

0.1U_0201_10V6K

2

DVT1_34

DDR_DRAMRST#_R (23,24)

@

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P007 - ICL-U(2/13)LPDDR4/x

LA-G172P

1

7 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

D D

4

3

2

1

Memory connection follow J72913-201 Rev 01_20181217

UC1C

DDR_C_D0_0(24) DDR_C_D0_1(24) DDR_C_D0_2(24) DDR_C_D0_3(24) DDR_C_D0_4(24) DDR_C_D0_5(24) DDR_C_D0_6(24) DDR_C_D0_7(24) DDR_C_D1_0(24) DDR_C_D1_1(24) DDR_C_D1_2(24) DDR_C_D1_3(24) DDR_C_D1_4(24) DDR_C_D1_5(24) DDR_C_D1_6(24) DDR_C_D1_7(24)

C C

B B

DDR_C_D2_0(24) DDR_C_D2_1(24) DDR_C_D2_2(24) DDR_C_D2_3(24) DDR_C_D2_4(24) DDR_C_D2_5(24) DDR_C_D2_6(24) DDR_C_D2_7(24) DDR_C_D3_0(24) DDR_C_D3_1(24) DDR_C_D3_2(24) DDR_C_D3_3(24) DDR_C_D3_4(24) DDR_C_D3_5(24) DDR_C_D3_6(24) DDR_C_D3_7(24) DDR_D_D0_0(24) DDR_D_D0_1(24) DDR_D_D0_2(24) DDR_D_D0_3(24) DDR_D_D0_4(24) DDR_D_D0_5(24) DDR_D_D0_6(24) DDR_D_D0_7(24) DDR_D_D1_0(24) DDR_D_D1_1(24) DDR_D_D1_2(24) DDR_D_D1_3(24) DDR_D_D1_4(24) DDR_D_D1_5(24) DDR_D_D1_6(24) DDR_D_D1_7(24) DDR_D_D2_0(24) DDR_D_D2_1(24) DDR_D_D2_2(24) DDR_D_D2_3(24) DDR_D_D2_4(24) DDR_D_D2_5(24) DDR_D_D2_6(24) DDR_D_D2_7(24) DDR_D_D3_0(24) DDR_D_D3_1(24) DDR_D_D3_2(24) DDR_D_D3_3(24) DDR_D_D3_4(24) DDR_D_D3_5(24) DDR_D_D3_6(24) DDR_D_D3_7(24)

AK48 AK45 AK49 AG47 AK47 AG45 AG48 AG49

AJ38 AL39 AJ39 AL43 AL38 AJ42 AL42

AJ43 AB49 AB48 AE49 AE47 AE48 AB47 AB45 AE45 AD38 AD39 AE39 AE43 AE38 AD43 AD42 AE42

J48 J45 J49

G47

J47 G45 G48 E48

J38 G39 G38 G42

J39

J42 G43

J43 B43 D43 A43 C40 C43 D40 B40 A40 B35 D35 A35 D38 C35 C38 B38 A38

LP4(NIL) / DDR4(NIL)

DDRC_DQ0_0/DDR1_DQ0_0 DDRC_DQ0_1/DDR1_DQ0_1 DDRC_DQ0_2/DDR1_DQ0_2 DDRC_DQ0_3/DDR1_DQ0_3 DDRC_DQ0_4/DDR1_DQ0_4 DDRC_DQ0_5/DDR1_DQ0_5 DDRC_DQ0_6/DDR1_DQ0_6 DDRC_DQ0_7/DDR1_DQ0_7 DDRC_DQ1_0/DDR1_DQ1_0 DDRC_DQ1_1/DDR1_DQ1_1 DDRC_DQ1_2/DDR1_DQ1_2 DDRC_DQ1_3/DDR1_DQ1_3 DDRC_DQ1_4/DDR1_DQ1_4 DDRC_DQ1_5/DDR1_DQ1_5 DDRC_DQ1_6/DDR1_DQ1_6 DDRC_DQ1_7/DDR1_DQ1_7 DDRC_DQ2_0/DDR1_DQ2_0 DDRC_DQ2_1/DDR1_DQ2_1 DDRC_DQ2_2/DDR1_DQ2_2 DDRC_DQ2_3/DDR1_DQ2_3 DDRC_DQ2_4/DDR1_DQ2_4 DDRC_DQ2_5/DDR1_DQ2_5 DDRC_DQ2_6/DDR1_DQ2_6 DDRC_DQ2_7/DDR1_DQ2_7 DDRC_DQ3_0/DDR1_DQ3_0 DDRC_DQ3_1/DDR1_DQ3_1 DDRC_DQ3_2/DDR1_DQ3_2 DDRC_DQ3_3/DDR1_DQ3_3 DDRC_DQ3_4/DDR1_DQ3_4 DDRC_DQ3_5/DDR1_DQ3_5 DDRC_DQ3_6/DDR1_DQ3_6 DDRC_DQ3_7/DDR1_DQ3_7 DDRD_DQ0_0/DDR1_DQ4_0 DDRD_DQ0_1/DDR1_DQ4_1 DDRD_DQ0_2/DDR1_DQ4_2 DDRD_DQ0_3/DDR1_DQ4_3 DDRD_DQ0_4/DDR1_DQ4_4 DDRD_DQ0_5/DDR1_DQ4_5 DDRD_DQ0_6/DDR1_DQ4_6 DDRD_DQ0_7/DDR1_DQ4_7 DDRD_DQ1_0/DDR1_DQ5_0 DDRD_DQ1_1/DDR1_DQ5_1 DDRD_DQ1_2/DDR1_DQ5_2 DDRD_DQ1_3/DDR1_DQ5_3 DDRD_DQ1_4/DDR1_DQ5_4 DDRD_DQ1_5/DDR1_DQ5_5 DDRD_DQ1_6/DDR1_DQ5_6 DDRD_DQ1_7/DDR1_DQ5_7 DDRD_DQ2_0/DDR1_DQ6_0 DDRD_DQ2_1/DDR1_DQ6_1 DDRD_DQ2_2/DDR1_DQ6_2 DDRD_DQ2_3/DDR1_DQ6_3 DDRD_DQ2_4/DDR1_DQ6_4 DDRD_DQ2_5/DDR1_DQ6_5 DDRD_DQ2_6/DDR1_DQ6_6 DDRD_DQ2_7/DDR1_DQ6_7 DDRD_DQ3_0/DDR1_DQ7_0 DDRD_DQ3_1/DDR1_DQ7_1 DDRD_DQ3_2/DDR1_DQ7_2 DDRD_DQ3_3/DDR1_DQ7_3 DDRD_DQ3_4/DDR1_DQ7_4 DDRD_DQ3_5/DDR1_DQ7_5 DDRD_DQ3_6/DDR1_DQ7_6

DDRD_DQ3_7/DDR1_DQ7_7

ICL-U_BGA1526

@

3 of 19

LP4(NIL) / DDR4(NIL)

DDRC_CLK_N/DDR1_CLK_N_0 DDRC_CLK_P/DDR1_CLK_P_0 DDRD_CLK_N/DDR1_CLK_N_1 DDRD_CLK_P/DDR1_CLK_P_1

DDRC_CKE0/DDR1_CKE0

DDRC_CKE1/NC DDRD_CKE0/NC

DDRD_CKE1/DDR1_CKE1

DDRC_CS_0/DDR1_CS#0

DDRC_CS_1/NC DDRD_CS_0/NC

DDRD_CS_1/DDR1_CS#1

DDRD_CA4/DDR1_BA0

NC/DDR1_BA1

DDRC_CA5/DDR1_BG0

NC/DDR1_BG1

NC/DDR1_MA0 NC/DDR1_MA1

DDRD_CA5/DDR1_MA2

NC/DDR1_MA3

NC/DDR1_MA4 DDRC_CA0/DDR1_MA5 DDRC_CA2/DDR1_MA6 DDRC_CA4/DDR1_MA7 DDRC_CA3/DDR1_MA8 DDRC_CA1/DDR1_MA9

NC/DDR1_MA10 NC/DDR1_MA11

NC/DDR1_MA12

DDRD_CA0/DDR1_MA13

DDRD_CA2/DDR1_MA14WE# DDRD_CA1/DDR1_MA15CAS# DDRD_CA3/DDR1_MA16RAS#

NC/DDR1_ODT_0 NC/DDR1_ODT_1

DDRC_DQSN_0/DDR1_DQSN_0

DDRC_DQSP_0/DDR1_DQSP_0

DDRC_DQSN_1/DDR1_DQSN_1

DDRC_DQSP_1/DDR1_DQSP_1

DDRC_DQSN_2/DDR1_DQSN_2

DDRC_DQSP_2/DDR1_DQSP_2

DDRC_DQSN_3/DDR1_DQSN_3

DDRC_DQSP_3/DDR1_DQSP_3

DDRD_DQSN_0/DDR1_DQSN_4

DDRD_DQSP_0/DDR1_DQSP_4

DDRD_DQSN_1/DDR1_DQSN_5

DDRD_DQSP_1/DDR1_DQSP_5

DDRD_DQSN_2/DDR1_DQSN_6

DDRD_DQSP_2/DDR1_DQSP_6

DDRD_DQSN_3/DDR1_DQSN_7

DDRD_DQSP_3/DDR1_DQSP_7

NC/DDR1_PAR

NC/DDR1_ACT#

NC/DDR1_ALERT#

Y48 Y47 M43 M42

U45 V46 M41 P43

V42 V39 Y39 T39

T38 T42

R45 N47

P42 Y49 U48 Y45 U47 R49 U49 M47 M45 R47 P39 N46 R48 Y41 V41 Y42 V47

V43 V38

AH46 AH47 AJ41 AL41 AC47 AC46 AE41 AD41 H47 H46 G41 J41 C42 D42 D36 C36

P38 M48 M49

P38,M48 SSD CRB NC

M_1_ALERT_N

RH13 0_0201_5%@

DDR_C_CLK# (24) DDR_C_CLK (24) DDR_D_CLK# (24) DDR_D_CLK (24)

DDR_C_CKE0 (24) DDR_C_CKE1 (24) DDR_D_CKE0 (24) DDR_D_CKE1 (24)

DDR_C_CS#0 (24) DDR_C_CS#1 (24) DDR_D_CS#0 (24) DDR_D_CS#1 (24)

DDR_D_CA4 (24)

DDR_C_CA5 (24)

DDR_D_CA5 (24)

DDR_C_CA0 (24) DDR_C_CA2 (24) DDR_C_CA4 (24) DDR_C_CA3 (24) DDR_C_CA1 (24)

DDR_D_CA0 (24) DDR_D_CA2 (24) DDR_D_CA1 (24) DDR_D_CA3 (24)

DDR_C_DQS#0 (24) DDR_C_DQS0 (24) DDR_C_DQS#1 (24) DDR_C_DQS1 (24) DDR_C_DQS#2 (24) DDR_C_DQS2 (24) DDR_C_DQS#3 (24) DDR_C_DQS3 (24) DDR_D_DQS#0 (24) DDR_D_DQS0 (24) DDR_D_DQS#1 (24) DDR_D_DQS1 (24) DDR_D_DQS#2 (24) DDR_D_DQS2 (24) DDR_D_DQS#3 (24) DDR_D_DQS3 (24)

12

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P008 - ICL-U(3/13)LPDDR4/x

LA-G172P

1

8 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

BOOT HALT

SPI0_MOSI(NO INTERNAL PU/PD)

0 = Enable

1 = Disable

RH643 100K_0201_5%

PCH_SPI_SI

D D

1 2

RH641 4.7K_0201_5%@

1 2

CONSENT STRAP

SPI0_IO2(NO INTERNAL PU/PD)

0 = Enable

1 = Disable

RH141 100K_0201_5%

1 2

RH142 4.7K_0201_5%@

1 2

PCH_SPI_CLK_R(66) PCH_SPI_SI_R(66) PCH_SPI_SO_R(66)

PCH_SPI_CLK_R PCH_SPI_SI_R PCH_SPI_SO_R PCH_SPI_IO2_R PCH_SPI_IO3_R PCH_SPI_CS0#_R PCH_SPI_CS1#_R

+V3.3A_1 .8A_PCH_SPI +V3.3A_1 .8A_PCH_SPI+V3.3A_1 .8A_PCH_SPI

RH719 4.99_0201_1%

1 2

RH720 4.99_0201_1%

1 2

RH721 4.99_0201_1%

1 2

RH722 4.99_0201_1%

1 2

RH723 4.99_0201_1%

1 2

RH736 0_0201_5%@

1 2

RH735 0_0201_5%@

1 2

EVT2_28

RH6401K_0201_5%

RH6341K_0201_5%

1 2 1 2 1 2 1 2 1 2

PCH_SPI_CLK

PCH_SPI_SI

PCH_SPI_IO2

DVT1_36

PCH_SPI_SI_R PCH_SPI_CLK_R PCH_SPI_SO_R PCH_SPI_IO2_R PCH_SPI_IO3_R

RH687 100K_0201_5%

1 2

MIPI60_SPI0_MOSI(79)

MIPI60_SPI0_IO2(79)

C C

SPI_SI_VROM0 SPI_CLK_VROM0 SPI_SO_VROM0 SPI_IO2_VROM0 SPI_IO3_VROM0

1 2

MIPI60@

1 2

MIPI60@

Closed to ROM

RH23 49.9_0201_1% RH24 49.9_0201_1% RH25 49.9_0201_1% RH26 49.9_0201_1% RH27 49.9_0201_1%

A0 PERSONALITY STRAP

SPI0_IO3

0 = Enable

1 = Disable

RH635 100K_0201_5%

1 2

RH636 100K_0201_5%@

1 2

PCH_SPI_CLK PCH_SPI_SI PCH_SPI_SO PCH_SPI_IO2 PCH_SPI_IO3 PCH_SPI_CS0# PCH_SPI_CS1#

PCH_SPI_CS2#(66)

PCH_SPI_CS2#

Strap Pin

Strap Pin Strap Pin

NO support C-Link

Serial Peripheral Interface (SPI) Topology Guidelines

UC1E

DB42

SPI0_CLK

DD43

SPI0_MOSI

DF43

SPI0_MISO

DF42

SPI0_IO2

DD41

SPI0_IO3

DB43

SPI0_CS0#

DF41

SPI0_CS1#

DB41

SPI0_CS2#

DV16

GPP_E11/SPI1_CLK/BK1/SBK1

DT16

GPP_E13/SPI1_MOSI/BK3/SBK3

DU18

GPP_E12/SPI1_MISO/BK2/SBK2

DT18

GPP_E1/SPI1_IO2

DW18

GPP_E2/SPI1_IO3

DW16

GPP_E10/SPI1_CS_N/BK0/SBK0

DU16

GPP_E8/SATALED#/SPI1_CS1#

DV19

CL_CLK

DW19

CL_DATA

DT19

CL_RST#

ICL-U_BGA1526

@

TLS CONFIDENTIALITY

GPP_C2/SMBALERT#(INTERNAL PD 20K)

0 = TLS CONFIDENTIALITY DISABLE

1 = TLS CONFIDENTIALITY ENABLE

GPP_C2

RH692 4.7K_0201_5%

1 2

SMBUS

SPI 0

SML 0

GPP_C6/SML1CLK/SUSWARN_N/SUSPWRDNACK

SPI 1

MLINK

SML1

eSPI

5 of 19

GPP_C7/SML1DATA/SUSACK#

GPP_C5 (Internal 20 K internal Pull Down): SML0ALERT#

0 = Enable eSPI. (Default)

1 = Disable eSPI.

GPP_C0/SMBCLK

GPP_C1/SMBDATA

GPP_C2/SMBALERT#

GPP_C3/SML0CLK

GPP_C4/SML0DATA

GPP_C5/SML0ALERT#

GPP_A5/ESPI_CLK

GPP_A0/ESPI_IO0 GPP_A1/ESPI_IO1 GPP_A2/ESPI_IO2 GPP_A3/ESPI_IO3

GPP_A4/ESPI_CS#

GPP_A6/ESPI_RESET#

PCH SPI

TPM

JSPI

NPI pop D20

PCH_SPI_CS1#_R PCH_SPI_SI_R PCH_SPI_SO_R PCH_SPI_CLK_R PCH_SPI_CS0#_R

PROM_BIOS_R(78)

PCH_SPI_IO3_R

+3V_SPI

DVT1_36

Follow Pebble Creek MLK

RH40 10K_0201_5%@

+3VS

1 2

RH727 10K_0201_5%@

1 2

RH41 10K_0201_5%@

1 2

DVT1.2_02

RH39 10K_0201_5%

1 2

ACES_50521-01041-P01_10P

SPI ROM ( 32MByte ) ROM is Quad SPI

PCH_SPI_CS0#_R SPI_SO_VROM0 SPI_IO3_VROM0 SPI_IO2_VROM0 SPI_CLK_VROM0

UH8

1

CS#

2

DO

3

IO2

4

GND

W25Q256JVEIQ_WSON8_8X6

ThemalPad

VCC

CLK

8 7

IO3

6

SPI_SI_VROM0

5

DI

9

MP pop RC745

+3V_SPI

RB751S40T1G_SOD523-2

1

CH35

0.1U_0201_10V6K

2

D20

@

+3V_PRIM

21

12

RC7450_0402_5%

PVT_03

B B

PVT_02

CLK_PCIE_N0(52)

WLAN--->

Reserved debug SSD-->

SSD-->

Card Reader--->

A A

CLK_PCIE_P0(52)

CLKREQ_PCIE#0(52)

CLK_PCIE_N1(67) CLK_PCIE_P1(67)

CLKREQ_PCIE#1(67)

CLK_PCIE_N2(68) CLK_PCIE_P2(68)

CLKREQ_PCIE#2(68)

CLK_PCIE_N4(70) CLK_PCIE_P4(70)

CLKREQ_PCIE#4(70)

JSPI1

1

2

3

4

5

6

G1

7

G2

8

9

10

CONN@

DVT1.2_17

DVT1.2_16

EVT2_28

11 12

DK33

CL2

DN34

CL3

DP34

CK3 CK4

DP36

DN40

UC1J

CJ3

CLKOUT_PCIE_N0

CJ5

CLKOUT_PCIE_P0 GPP_D5/SRCCLKREQ0#

CLKOUT_PCIE_N1

CL1

CLKOUT_PCIE_P1 GPP_D6/SRCCLKREQ1#

CLKOUT_PCIE_N2

CL5

CLKOUT_PCIE_P2 GPP_D7/SRCCLKREQ2#

CLKOUT_PCIE_N3 CLKOUT_PCIE_P3 GPP_D8/SRCCLKREQ3#

CJ2

CLKOUT_PCIE_N4

CJ1

CLKOUT_PCIE_P4 GPP_H10/SRCCLKREQ4#

ICL-U_BGA1526

@

CLKOUT_PCIE_N5 CLKOUT_PCIE_P5

GPP_H11/SRCCLKREQ5#

RTC

XTAL

10 of 19

RTCX1 RTCX2

RTCRST#

SRTCRST#

GPD8/SUSCLK

XTAL_IN

XTAL_OUT

XCLK_BIASREF

CF5 CF3 DP40

DL48 DL49

DT47 DK46

DF49

DW8 DU8

DU6

ESPI OR EC LESS

RH666 4.7K_0201_5%@

GPP_C5PCH_SPI_IO2 PCH_SPI_IO3

RH98 20K_0201_5%@

DK27 DP24 DL24

DK24 DJ24 DP22

DN22 DL22

CR47 CN45 CN48 CN49 CN47 CT45 CR46

PCH_RTCX1 PCH_RTCX2

PCH_RTCRST# SRTCRST#

SUSCLK

XTAL_38P4M_IN_CPU XTAL_38P4M_OUT_CPU

CLK_BIASREF

GPP_C2

SML0_SMBCLK SML0_SMBDATA GPP_C5

SML1_SMBCLK_R SML1_SMBDATA_R

ESPI_CLK ESPI_IO0_R ESPI_IO1_R ESPI_IO2_R ESPI_IO3_R ESPI_CS# ESPI_RESET#

+3V_PRIM+3V_PRIM

1 2

SMB_CLK (79)

SMB_DATA (79)

SML0_SMBCLK (46,48)

SML0_SMBDATA (46,48)

RC569 49.9_0201_1% RC336 10_0201_1%

1 2

RC367 10_0201_1%

1 2

RC368 10_0201_1%

1 2

RC369 10_0201_1%

1 2

XTAL_38P4M_IN

XTAL_38P4M_OUT

10P_0201_50V8J

EVT1_30

PCH_RTCRST# (63,79)

SUSCLK (52,68)

RH14 0_0201_5%

1 2

RH15 0_0201_5%

1 2

RH475 60.4_0201_1%

1 2

SML1_SMBCLK_R SML1_SMBDATA_R

MIPI60

BB_L&BB_R (For support Vpro)

BB_L&BB_R PD_L&PD_R

12

2

CH10

1

Intel SPEC : CL = Specified Crystal Capacitive Load = 10 pF Series Resistance < or = 30 Ω Frequency Tolerance < or 100 PPM Aging ±3 PPM

SUSCLK

ESPI_CLK_5105 (58,79) ESPI_IO0 (58,79) ESPI_IO1 (58,79) ESPI_IO2 (58,79) ESPI_IO3 (58,79)

ESPI_CS# (58,79)

ESPI_RESET# (58,79)

RH17 200K _0201_1%

1 2

YH1

123

4

38.4MHZ_10PF_8Y38420005

1

CH49

@EMI@

0.1U_0201_10V6K

2

XTAL_38P4M_IN XTAL_38P4M_OUT

ESPI 1.8V

EMI Request

PCH_SPI_CLK

12

RC734

33_0201_5%

1

CC659

33P_0201_50V8J

2

@EMI@

2

1

CH11

10P_0201_50V8J

RH639 0_0201_5%@

1 2

RH638 0_0201_5%@

1 2

SML0_SMBDATA SML0_SMBCLK

SML1_SMBCLK_R SML1_SMBDATA_R

ESPI_CS# ESPI_RESET#

SMB_CLK

SML0_SMBCLK

SML1_SMBCLK_R

ESPI_CLK_5105

PCH_RTCX2

PCH_RTCX1

CH12

15P_0201_50V8J

CC655 33P_0201_50V8J

CC656 33P_0201_50V8J

CC657 33P_0201_50V8J

CC658 33P_0201_50V8J

RH16 10M_0201_1%

CRB XTAL ESR = 50K MAX

1

2

DVT1_06 DVT1_79

+RTCVCC_R

1U_0201_6.3V6K

1 2

RH573 20K_0201_5%

1 2

RH572 20K_0201_5%

1U_0201_6.3V6K

PDG_An RC delay circuit with a time delay in the range of 18–25 ms should be provided. The circuit should be connected to VCCRTC.

CH47

CH46

1

2

1

2

SML1_SMBCLK (42,44,46,48)

SML1_SMBDATA (42,44,46,48)

1 2 1 2

DVT1_61DVT1_32

RF Request

@RF@

1 2

@RF@

1 2

@RF@

1 2

@RF@

1 2

YC1

1 2

32.768KHZ_12.5PF_9H03200042

PCH_RTCRST#

SRTCRST#

PCH_RTCX2_R

RH144499_0201_1% RH143499_0201_1%

RH6061K_0201_5% RH6071K_0201_5%

RC71275K_0201_1% @ RC71175K_0201_1%

+3V_PRIM

RH637 0_0201_5%

1 2

1

CH13

15P_0201_50V8J

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Numb er Rev

Date: Sheet of

Compal Electronics, Inc.

P009 - ICL-U(4/13)SPI,SMB,ESPI

LA-G172P

1

9 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

+3VS

RC222 49.9K_0201_1% RC223 49.9K_0201_1% RC655 49.9K_0201_1% RC656 49.9K_0201_1% RH713 100K_0201_5%@

1 2

+3V_PRIM

RC682 10K_0201_5%@

1 2

RH646 100K_0201_5%@

1 2

5

EVT2_28

12 12 12 12

UART2_RXD UART2_TXD UART2_RTS# UART2_CTS# PCH_TBT_PERST#

MEDIACARD_IRQ# PCH_TBT_PERST#

NO REBOOT

GPP_B18/GSPI0_MOS (Internal 20 K Pull Down)

0 = REBOOT ENABLED

RH632 2.2K_0201_5%@

1 2

RH633 2.2K_0201_5%@

1 2

D D

EVT1_34

RH300 10K_0201_5%

1 2

RH688 100K_0201_5%@

I2C2_SDA I2C2_SCL

1 = NO REBOOT

EVT2_05

NRB_BIT

PCH_TBT_PERST#

12

HDA_BIT_CLK

RH621 4.7K_0201_5%@

1 2

4

CPUNSSC CLOCK FREQ

GPP_B23 (Internal 20 K Pull Down)

0 = 38.4 MHz clock (direct from crystal) (default)

+3VS

1 = 19.2 MHz clock (from internal divider)

GPP_B23

RH647 4.7K_0201_5%@

1 2

+3V_PRIM +3V_PRIM

3

TOP SWAP OVERRIDE

GPP_B14 / SPKR (Internal 20 K Pull Down)

0 = Disable "Top Swap" mode. (Default)

1 = Enable "Top Swap" mode.

RH667 8.2K_0201_5%@

SPKR

1 2

2

1

EVT1_15EVT1_15

+3VS

RC339 10K_0201_5%@

1 2

RC338 10K_0201_5%@

1 2

RC254 0_0201_5%@

TPM_PIRQ#_R(66)

1 2

RC255 0_0201_5%@

1 2

DVT1.2_10

C C

+3V_PRIM

RH745 100K_0201_5%@

1 2

RH746 100K_0201_5%@

1 2

RH747 100K_0201_5%@

1 2

RH748 100K_0201_5%@

1 2

TPM_GPP_B17_SMI#_NMI TPM_PIRQ#

For TS lid open reserved

CPU_ID_0 CPU_ID_1

TS

TP

Reserved

UFCAM

MEDIACARD_IRQ#_R(70)

PCH_TBT_PERST#(46,48)

PANEL_BKLEN(6,38)

I2C_3_SDA_UFCAM(39) I2C_3_SCL_UFCAM(39)

0_0201_5% @

SPKR(56)

TPM_PIRQ# TPM_PIRQ#_B20

PCH_3.3V_TS_EN(71)

SBIOS_TX(79)

DVT1.2_18

UART2_RXD(79) UART2_TXD(79) UART2_RTS#(79) UART2_CTS#(79)

TS_I2C_SDA(38) TS_I2C_SCL(38)

I2C1_SDA_TP(63) I2C1_SCK_TP(63)

RH645

RH7300_0201_5% @

12

RH7310_0201_5% @

12

NRB_BIT TPM_GPP_B17_SMI#_NMI

MEDIACARD_IRQ#

12

@

12

RH7370_0201_5%

GPP_B23

PCH_TBT_PERST#

@

12

UART2_RXD UART2_TXD UART2_RTS# UART2_CTS#

I2C2_SDA I2C2_SCL

CPU_ID_0 CPU_ID_1

RH7320_0201_5%

Strap Pin

ENBKL_TS

CPU I3/I5/I7 Option for different thermal table

Pin Name

CPU_ID_0

CPU_ID_1

I3

0

I5 I7

0

1

0

UC1F

CH48

GPP_B16/GSPI0_CLK

CF48

GPP_B18/GSPI0_MOSI

CF47

GPP_B17/GSPI0_MISO

CH49

GPP_B15/GSPI0_CS0#

CH47

GPP_B14/SPKR/TIME_SYNC1/GSPI0_CS1#

CL47

GPP_B20/GSPI1_CLK

CK47

GPP_B22/GSPI1_MOSI

CK46

GPP_B21/GSPI1_MISO

CH45

GPP_B19/GSPI1_CS0#

CL48

GPP_B23/SML1ALERT#/PCHHOT#/GSPI1_CS1#

DP21

GPP_C8/UART0_RXD

DK21

GPP_C9/UART0_TXD

DL21

GPP_C10/UART0_RTS#

DJ22

GPP_C11/UART0_CTS#

DT22

GPP_C20/UART2_RXD

DW22

GPP_C21/UART2_TXD

DV22

GPP_C22/UART2_RTS#

DU22

GPP_C23/UART2_CTS#

DT24

GPP_C16/I2C0_SDA

DT23

GPP_C17/I2C0_SCL

DW23

GPP_C18/I2C1_SDA

DU23

GPP_C19/I2C1_SCL

DU41

GPP_H4/I2C2_SDA

DV41

GPP_H5/I2C2_SCL

DW41

GPP_H6/I2C3_SDA

DT41

GPP_H7/I2C3_SCL

DT40

GPP_H8/I2C4_SDA/CNV_MFUART2_RXD

DW40

GPP_H9/I2C4_SCL/CNV_MFUART2_TXD

ICL-U_BGA1526

@

GPP_D15/ISH_UART0_RTS_N/GSPI2_CS1_N/IMGCLKOUT5

GSPI

UART

I2C

6 of 19

GPP_D16/ISH_UART0_CTS_N/CNV_WCEN

UART

I2C / ISH

GPP_C12/UART1_RXD/ISH_UART1_RXD

GPP_C13/UART1_TXD/ISH_UART1_TXD GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_C15/UART1_CTS#/ISH_UART1_CTS#

GPP_B9/I2C5_SDA/ISH_I2C2_SDA

GPP_B10/I2C5_SCL/ISH_I2C2_SCL

ISH

GPP_D13/ISH_UART0_RXD GPP_D14/ISH_UART0_TXD

GPP_B5/ISH_I2C0_SDA GPP_B6/ISH_I2C0_SCL

GPP_B7/ISH_I2C1_SDA GPP_B8/ISH_I2C1_SCL

GPP_D0/ISH_GP0 GPP_D1/ISH_GP1 GPP_D2/ISH_GP2

GPP_D3/ISH_GP3 GPP_D17/ISH_GP4 GPP_D18/ISH_GP5 GPP_E15/ISH_GP6 GPP_E16/ISH_GP7

DV33 DW33 DT33 DU33

DK22 DW24 DV24 DU24

CN43 CN42

CN41 CL43

CL41 CJ39 DU36 DV36 DW36 DT36 DU34 DW34 DT14 DU14

SML0B_SMBDATA SML0B_SMBCLK

SML0BALERT#

SIO_EXT_WAKE#

UFCAM_RESET#

ISH_I2C1_SDA ISH_I2C1_SCL

ACC2_INT# ACC1_INT2# NB_MODE# TABLE_MODE# ISH_LID_CL_NB# ISH_LID_CL_TAB#

ISH_GP0 for Main A ccelerometer (Sensor Board)INT1# ISH_GP1 for 2n d Accelerometer (MB) ISH_GP2 for Main A ccelerometer (Sensor Board)INT2# ISH_GP3 for NB _MODE ISH_GP4 for ISH_ GP4# (ON TABLE) ISH_GP5 for NB _LID# ISH_GP6 for TA B_LID# ISH_GP7 for AL S_ALERT#

RC727 0_0201_5%@

SML0B_SMBDATA (58)

SML0B_SMBCLK (58)

1 2

SIO_EXT_WAKE# (58)

DBC_EN (38)

UFCAM_RESET# (39)

ISH_I2C0_SDA (63)

ISH_I2C0_SCL (63)

ISH_I2C1_SDA (39)

ISH_I2C1_SCL (39)

ACC1_INT1# (39) ACC2_INT# (63) ACC1_INT2# (39)

NB_MODE# (58)

TABLE_MODE# (58) ISH_LID_CL_NB# (58) ISH_LID_CL_TAB# (58) ALS_ALERT# (39)

EC

2nd Accelerometer

ALS,Ecompass,Main Acceleromete on SDB. Ecompass,Main Accelerometer on DB.

DVT1_04

DVT1.2_11

SIO_EXT_WAKE#

SML0B_SMBDATAACC1_INT1# SML0B_SMBCLK TABLE_MODE#

ISH_LID_CL_NB# ISH_LID_CL_TAB#

DVT1.2_11

UFCAM_RESET# TABLE_MODE# NB_MODE# ACC1_INT1# ACC1_INT2# ACC2_INT#

ACC1_INT1# ACC1_INT2# ACC2_INT#

DDR_CHA_EN DDR_CHB_EN

ISH_I2C0_SDA ISH_I2C0_SCL ISH_I2C1_SDA ISH_I2C1_SCL

HOST_SD_WP#

RC665 1K_0201_5% RC666 1K_0201_5% RC667 1K_0201_5% RC668 1K_0201_5%

RC717 10K_0201_5%

RC671 10K_0201_5%

RC672 1K_0201_5% RC673 1K_0201_5% RC680 10K_0201_5%

RC751 10K_0201_5% RC752 10K_0201_5%

RH658 100K_0201_5% RC679 10K_0201_5%@ RH610 10K_0201_5% RC738 10K_0201_5%@ RC739 10K_0201_5%@ RC740 10K_0201_5%@

RC741 10K_0201_5% RC742 10K_0201_5% RC743 10K_0201_5%

RH738 100K_0201_5%@ RH739 100K_0201_5%@

RH740 100K_0201_5%@ RH741 100K_0201_5%@

1 2 1 2

1 2 1 2 1 2

1 2 1 2

12 12 12 12

12

12 12 12

12 12

12

12 12 12

+3VS

+3V_PRIM

+3VS

EVT2_32

UC1G

HDA_BIT_CLK HDA_SYNC HDA_SDOUT

EVT2_06

Reserved for debug

B B

SPCE p.30 PU or PD 100K-180K PDG define only JFP need to PD 10K.

12 12 12 12

12 12

RH20310K_0201_5% @ RH20210K_0201_5% @ RH20110K_0201_5% @ RH20010K_0201_5% @

RH11475K_0201_5% RH72810K_0201_5% @

GPP_A23 GPP_R5 GPP_S4 GPP_S5

CNV_RF_RESET# CLKREQ_CNV#

EVT1_23

DVT1_59

HDA_SDIN0(56)

CAM_DET#(39)

CNV_RF_RESET#(52) TS_RST#(38) CLKREQ_CNV#(52)

HDA_SDIN0

GPP_A23

RH7150_0201_5% @

12

GPP_R5

Reserved for debug

CNV_RF_RESET#

EVT2_43

GPP_S4

RH7160_0201_5% @

12

GPP_S5

Reserved for debug

HDA for AUDIO

RH113 33_0201_1%

HDA_BIT_CLK_L(56) HDA_SYNC_L(56) HDA_SDOUT_L(56)

A A

1

2

@RF@

CH50

56P_0201_25V8J

@RF@

1

CH51

2

1

2

56P_0201_25V8J

EVT1_36

1 2

RH111 33_0201_1%

1 2

RH112 33_0201_1%

1 2

CH40

@

22P_0201_50V8J

HDA_BIT_CLK HDA_SYNC HDA_SDOUT

CY46

GPP_R0/HDA_BCLK/I2S0_SCLK

CV49

GPP_R1/HDA_SYNC/I2S0_SFRM

CY47

GPP_R2/HDA_SDO/I2S0_TXD

CV45

GPP_R3/HDA_SDI0/I2S0_RXD

DA47

GPP_R4/HDA_RST#

DP33

GPP_D19/I2S_MCLK

DC45

GPP_A23/I2S1_SCLK

DA49

GPP_R5/HDA_SDI1/I2S1_SFRM

DA45

GPP_R6/I2S1_TXD

DA48

GPP_R7/I2S1_RXD

CT49

GPP_A7/I2S2_SCLK

CT48

GPP_A8/I2S2_SFRM/CNV_RF_RESET#

CV47

GPP_A10/I2S2_RXD

CT47

GPP_A9/I2S2_TXD/MODEM_CLKREQ

CY39

GPP_S0/SNDW1_CLK

CY38

GPP_S1/SNDW1_DATA

DB39

GPP_S2/SNDW2_CLK

DD38

GPP_S3/SNDW2_DATA

DF38

GPP_S4/SNDW3_CLK/DMIC_CLK1

DD39

GPP_S5/SNDW3_DATA/DMIC_DATA1

ICL-U_BGA1526

@

GPP_H1/SD_PWR_EN_N/CNV_BT_I2S_SDO

GPP_S6/SNDW4_CLK/DMIC_CLK0

GPP_S7/SNDW4_DATA/DMIC_DATA0

AUDIO

7 of 19

FLASH DESCRIPTOR SECURITY OVERRIDE

GPP_R2/HDA_SDO (Internal 20 K Pull Down)

0 = ENABLE (DEFAULT)

1 = DISABLE (ME can update)

@

ME_FWP(58)

1 2

RH218 0_0201_5%

1 2

RH217 1K_0201_1%

GPP_G6/SD_CLK GPP_G1/SD_DATA0 GPP_G2/SD_DATA1 GPP_G3/SD_DATA2 GPP_G4/SD_DATA3

GPP_G0/SD_CMD

SD3.0

GPP_G7/SD_WP

GPP_G5/SD_CD#

GPP_H0/CNV_BT_I2S_SDO

SD3_RCOMP

SNDW_RCOMP

HDA_SDOUTME_FWP_PCH

CE46 CC48 CC49 CC47 CF45 CC45 CF49 CE47

DK38 DG38

CJ43

DG36 DG34

CV38

TBT_CIO_PLUG_EVENT# DDR_CHA_EN DDR_CHB_EN CNVI_EN#_R

GPP_H0 GPP_H1

SD3_RCOMP

WOV_DMIC_CLK0 WOV_DMIC_DATA0

SNDW_RCOMP

RH729 0_0201_5%@

RC20 200_0201_1%

DVT1_31

RH705 33_0201_5%@ RH706 33_0201_5%@

RC16 200_0201_1%

1

EVT2_32

1 2

1 1

1 2

1 2 1 2

1 2

AUD_PWR_EN (71)

TP53 PAD~D

TP@

SPK_DET# (57)

HOST_SD_WP# (70)

TP55 TP56

RF Request. Place near CPU side

EVT2_09

HDA_SDIN0

@RF@

CC727 2.2P_0201_50V8B

1 2

TP@ TP@

PAD~D PAD~D

CNVI_EN# (52,71)

PVT_08

Intel DMIC for WOV reserved

1

CC654

@

27P_0201_25V8

2

PCH_DMIC_CLK12 (39)

PCH_DMIC_DATA12 (39)

DVT1_82

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Numb er Rev

Date: Sheet of

Compal Electronics, Inc.

P010 - ICL-U(5/13)HDA,I2C,ISH

LA-G172P

1

10 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

3V SELECT STRAP

INPUT3VSEL

0 = 3.3V +/-5%

1 =3.0V +/-5%

RH301 4.7K_0201_5%@

D D

INPUT3VSEL

RH298

1 2

+3VALW_D SW

100K_0201_5%

STRAP FOR SPI 1.8V/3.3V SEL

INTRUDER#

0 = SPI voltage is 3.3V

1 = SPI voltage is 1.8V

+RTCVCC

RH641M_0201_1% @

12

INTRUDER#

RH67110K_0201_1%

12

CC6530.1U_0201_10V6K @

12

DVT1_81

UC1K

RH5940_0201_5% @

12

MIPI60_DBRESET#_R(79)

1 2

SIO_SLP_SUS# SIO_SLP_S5# SIO_SLP_S4# SIO_SLP_S3# SIO_SLP_A# SIO_SLP_S0#

SIO_SLP_WLAN#

PCH_RSMRST#_AND SYS_RESET# PCH_PLTRST#

PCH_DPWROK PCH_PWROK

INPUT3VSEL INTRUDER#

12 12 12 12

SIO_SLP_SUS#(16,47,49,58)

Microchip suggest 100K on RH575

RH5751M_0201_1%

H_THERMTRIP#

H_CATERR#

VCCST_PWRGD

H_PROCHOT#

PCH_TOUCHPAD_INTR#

SIO_SLP_S0#

PCH_DPWROK

MIPI60@

DVT1_43

RH5840_0201_5% @

12

RH5860_0201_5% @

12

RC6471K_0201_5% @

12

RC2471K_0201_5%

12

PCH_DPWROK(58)

SYS_PWROK(58,79)

VCCST_OVERRIDE

VCCSTPWRGOOD_TCSS

VCCST_PWRGD PCH_RSMRST#_AND

PECI_EC(58)

H_THERMTRIP#(58)

PCH_TOUCHPAD_INTR#(63)

SYS_PWROK SYS_PWROK_R

H_PROCHOT#(16,58,91)

DBG_PMODE(79)

12

CH480.01U_0402_16V7K

@

C C

VCCST_OVERRIDE_R(78)

PM_RSMRST_PWRGD_MIPI60(79)

+1.05V_VCCST

RH95 1K_0201_1%

RH80 49.9_0201_1%

RH588 1K_0201_5%

PLACE 'RA' CLO SE TO MCP - WIT HIN 1.5 INCH C RB P.35

VCCST_OVERRIDE_R

PLACE 1K SERIE S RESISTOR NEAR RSMRST_N AND VCCST_PWRGD “T” JUNCTION P OINT, NOT NEAR MIPI60

12

+1.05V_V CCSTG

RH96 1K_0201_5%

12

+3VS

RH631 10K_0201_5%

1 2

+3V_PRIM

RH709 100K_0201_5%

B B

1 2

SIO_SLP_S5#(79) SIO_SLP_S4#(58,78,79) SIO_SLP_S3#(58,78,79)

SIO_SLP_A#(79)

SIO_SLP_S0#(66,79) CPU_C10_GATE# (78)

SIO_SLP_WLAN#(71)

PCH_RSMRST#_AND(63,78) SYS_RESET#(79)

+3VS

RC433 8.2K_0201_5%@

RC434 8.2K_0201_5%@

H_PROCHOT# H_PROCHOT#_R

RC614 499_0201_1%

RH4 49.9_0201_1% RH5 49.9_0201_1% RH6 49.9_0201_1%@ RH7 49.9_0201_1%@

+3VS

RH655

DVT1_46 DVT1_50

D468

@

TOUCH_SCREEN_PD#_R(38)

2 1

RB751S40T1G_SOD523-2

DVT1_78

DVT1.2_19

A A

RH743

@

12

0_0201_5%

+3VALW

RC147 100K_0201_5%

1 2

3

D2

PMDXB600UNE_DFN1010B-6

S2

4

QC2B

6

D1

5

G2

G1

PMDXB600UNE_DFN1010B-6

S1

1

100K_0201_5%

1 2

TOUCH_SCREEN_PD#

12

LID_CL_TS_FP# (58,77)

2

DISPOFF_R#

QC2A

1 2

@

RH6540_0201_5% @

EVT1_19DVT1_04

RH744 0_0201_5%@

DISPOFF# (38)

PCH GLITCH ISSUE MITIGATION(PDG p.306)

RH683 100K_0201_5%

1 2

CH53 0.33U_0201_6.3V6M@

RH684 100K_0201_5%

1 2

CH54 0.33U_0201_6.3V6M@

RH685 100K_0201_5%

1 2

CH55 0.33U_0201_6.3V6M@

RH682 100K_0201_5%

1 2

CH52 0.33U_0201_6.3V6M@

RH686 100K_0201_5%

1 2

CH56 0.33U_0201_6.3V6M@

RH689 100K_0201_5%@

1 2

RH690 100K_0201_5%@

1 2

RH691 100K_0201_5%@

1 2

CH57 0.33U_0201_6.3V6M@

DVT1_32

1 2

SIO_SLP_S3#

SIO_SLP_S4#

SIO_SLP_A#

SIO_SLP_WLAN#

SIO_SLP_SUS#

SIO_SLP_S0#

PCH_PLTRST#

SIO_SLP_S5#

DM49

SLP_SUS#

DF45

GPD10/SLP_S5#

DC48

GPD5/SLP_S4#

DF47

GPD4/SLP_S3#

DH47

GPD6/SLP_A#

CL45

GPP_B12/SLP_S0#

DE49

GPD9/SPL_WLAN#

DN48

SLP_LAN#

DG49

RSMRST#

DK19

SYS_RESET#

CM49

GPP_B13/PLTRST#

DR48

DSW_PWROK

DN47

PCH_PWROK

DP19

SYS_PWROK

DN49

INPUT3VSEL

DR47

Strap Pin

INTRUDER#

ICL-U_BGA1526

@

if pop UC29, RC244 also need pop

RC430

@

1 2

+3VS

@

UC29

5

1

P

ME_RESET#

B

2

A

G

3

GPP_H3/SX_EXIT_HOLDOFF_N/CNV_BT_I2S_SDO

0_0201_5%

CC77

@

12

0.1U_0201_10V6K

SYS_RESET#_R SYS_RESET#

4

O

MC74VHC1G08DFT2G_ SC70-5

GPP_H18/CPU_C10_GATE#

GPD11/LANPHYPC/DSWLDO_MON

11 of 19

RC432 1K_0201_5%

DVT1_28

UC1D

H_CATERR# PECI_EC

H_THERMTRIP#

CPU_POPI_RCOMP PCH_OPI_RCOMP EDRAM_OPIO_RCOMP CPU_EOPIO_RCOMP

MEM_INTERLEAVED TOUCH_SCREEN_PD# PCH_TOUCHPAD_INTR#

GPP_E6 GPP_H2

Strap Pin

Strap Pin Strap Pin

J4

CATERR#

CD5

PECI

C3

PROCHOT#

E3

THRMTRIP#

CJ41

PROC_POPIRCOMP

DU3

PCH_OPIRCOMP

A14

RSVD_25

B14

RSVD_26

DL15

DBG_PMODE

DV11

GPP_E3/CPU_GP0

DT11

GPP_E7/CPU_GP1

CR38

GPP_B3/CPU_GP2

CR39

GPP_B4/CPU_GP3

DT12

GPP_E6

DJ38

GPP_H2/CNV_BT_I2S_SDO

DL38

GPP_H19/TIME_SYNC0

ICL-U_BGA1526

@

EMI request,Place near CPU side.

MIPI60_PCH_JTAG_TDO

MIPI60_PCH_JTAG_TDI

MIPI60_PCH_JTAGX

H_THERMTRIP#

H_PROCHOT#_R

@EMI@

CC735 0.1U_0201_25V6K

1 2

@EMI@

CC736 0.1U_0201_25V6K

1 2

@EMI@

CC737 0.1U_0201_25V6K

1 2

@EMI@

CC738 0.1U_0201_25V6K

1 2

@EMI@

CC739 0.1U_0201_25V6K

1 2

GPD3/PWRBTN#

GPD1/ACPRESENT

GPD0/BATLOW#

GPP_B11/PMCALERT#

WAKE#

GPD2/LAN_WAKE#

VCCST_OVERRIDE

VCCST_PWRGD

VCCSTPWRGOOD_TCSS

PROCPWRGD

GPD7

+3VS

RC244 10K_0201_5%

1 2

12

PROC_TCK

PROC_TDI PROC_TDO PROC_TMS

PROC_TRST#

PCH_TRST#

JTAG

PCH_TCK

PCH_TDI PCH_TDO PCH_TMS

PCH_JTAGX

PROC_PRDY#

PROC_PREQ#

4 of 19

DVT1_77

5

4

3

SIO_PWRBTN#_R

CY42

AC_PRESENT_R AC_PRESENT

DE46

PCH_BATLOW#

DH48

GPP_B11

CL39

CPU_C10_GATE#_R

DU40

GPP_H3

DG40

DL45

WAKE#

LAN_WAKE#_R LAN_WAKE#

DE47 DF48

VCCST_OVERRIDE

CE4

VCCST_PWRGD_CPU VCCST_PWRGD

CF2

VCCSTPWRGOOD_TCSS

CE3 CF1

CPUPWRGD

DC47

GPD7

@

RH57 0_0201_5%@ RH312 0_0201_5%@

RH659 0_0201_5%@ RH280 0_0201_5%@

RH207 0_0201_5%@

RH600 0_0201_5%@

RH587 60.4_0201_1%

RH595 1K_0201_5%

VCCST_PWRGD

CPUPWRGD

SYS_RESET#

1 2 1 2

1 2 1 2 1

PAD~D

TP57

1 2

1

CC649 100P_0201_50V8J

CC650 100P_0201_50V8J

CC651 0.1U_0201_10V6K

@

TP101

1 2

EMI@

@EMI@

CPUPWRGD_R

PAD~D TP@

ESD Request:place near CPU side

P3 K5 K3 P4 N1

N5 R5 K1 K2 N3 N2

P6 M6

MIPI60_CPU_JTAG_TCLK MIPI60_CPU_JTAG_TDI MIPI60_CPU_JTAG_TDO MIPI60_CPU_JTAG_TMS

MIPI60_PCH_JTAG_TRST# MIPI60_PCH_JTAG_TCLK MIPI60_PCH_JTAG_TDI MIPI60_PCH_JTAG_TDO MIPI60_PCH_JTAG_TMS MIPI60_PCH_JTAGX

MIPI60_CPU_JTAG_TCLK (79) MIPI60_CPU_JTAG_TDI (79 ) MIPI60_CPU_JTAG_TDO (79) MIPI60_CPU_JTAG_TMS (79) MIPI60_CPU_JTAG_TRST# (79)

MIPI60_PCH_JTAG_TRST# (79) MIPI60_PCH_JTAG_TCLK (79) MIPI60_PCH_JTAG_TDI (79 ) MIPI60_PCH_JTAG_TDO (79) MIPI60_PCH_JTAG_TMS (79) MIPI60_PCH_JTAGX (79)

MIPI60_PRDY# (79 ) MIPI60_PREQ# (79)

JTAG ODT DISABLE

GPP_E6

0 = JTAG ODT DISABLED

1 = JTAG ODT ENABLED

GPP_E6

RH660

RH661 4.7K_0201_5%@

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3V_PRIM

100K_0201_5%

SIO_PWRBTN# (58,79)

AC_PRESENT (58)

TP@

TBT_I2C_INT#

1

TP70

PAD~D TP@

TBT_I2C_INT# (42,44,46,48)

PCH_PCIE_WAKE# (58)

LAN_WAKE# (58)

VCCST_PWRGD (78)

PCH_PWROK_P(91)

IMVP_VR_ON_P(78)

RH733

100K_0201_5%

PCH_PLTRST#

MC74VHC1G08DFT2G_ SC70-5

DVT1_28

MAF/SAF STRAP(eSPI Flash Sharing Mode)

GPP_H2/CNV_BT_I2S_SDI(INTERNAL PD 20K)

0 = MAF (Master Attached Flash)

1 = SAF (Slave Attached Flash)

RH618 2.2K_0201_5%@

GPP_H2

1 2

RH617 20K_0201_5%@

1 2

EVT2_33

Compal Secret Data

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

2

+3V_PRIM

PCH_RSMRST#_AND TBT_I2C_INT#

PCH_RSMRST#_AND

LAN_WAKE# PCH_BATLOW# AC_PRESENT PCH_PCIE_WAKE#

DVT1_41

+3VS

1 2

RH625 0_0201_5%@

1 2

+3VS

1

B

2

A

+3V_PRIM

1

B

2

A

EVT1_31

MIPI60_PCH_JTAG_TDI MIPI60_PCH_JTAG_TMS MIPI60_PCH_JTAG_TDO

MIPI60_CPU_JTAG_TDI MIPI60_CPU_JTAG_TMS MIPI60_CPU_JTAG_TDO

MIPI60_CPU_JTAG_TCLK MIPI60_PCH_JTAG_TCLK MIPI60_PCH_JTAG_TRST# MIPI60_PCH_JTAGX

@

UH6

5

P

4

O

MC74VHC1G08DFT2G_ SC70-5

G

3

+3V_PRIM

5

UH1

P

4

O

12

G

3

RH46

100K_0201_5%

TDI&TMS KEEP S TUB TO MINIMUM

TDO PLACE WITH IN 1.1INCH OF S OC

MEM_INTERLEAVED

DVT1_63

Title

Size Document Number Rev

Date: Sheet of

RH592 10K_0201_5%@

1 2

RC687 10K_0201_5%

1 2

RH591 100K_0201_5%

1 2

RH601 10K_0201_5%

1 2

RH460 100K_0201_5%

1 2

RH297 10K_0201_5%

1 2

RH653 1K_0201_5%

1 2

PCH_PWROK

DVT1_28

2

CC652

0.1U_0201_10V6K

1

PCH_PLTRST#_EC (46,48,52,58,66,67,68,70,79)

DVT1_52

PLACE WITHIN 1 .1INCH OF MCP

RC151 51_0201_5%MIPI60@

1 2

RC203 51_0201_5%MIPI60@

1 2

RC202 100_0201_5%

1 2

RC146 51_0201_5%@

1 2

RC181 51_0201_5%@

1 2

RC150 100_0201_5%

1 2

PLACE WITHIN 1 .1INCH OF SOC

RC145 51_0201_5%

1 2

RC180 51_0201_5%@

1 2

RC201 51_0201_5%@

1 2

RC344 51_0201_5%@

1 2

RH629 10K_0201_5%@

1 2

RH630 10K_0201_5%@

1 2

DIMM TYPE

HIGH

Interleave

LOW

Non-Interleave

Compal Electronics, Inc.

P011 - ICL-U(6/13)GPIO

LA-G172P

1

+3V_PRIM

+3VALW_D SW

+1.05V_VCCSTG

+3V_PRIM

1.0 (A00)

11 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

D D

PCIE_PRX_DTX_N9(68) PCIE_PRX_DTX_P9(68) PCIE_PTX_DRX_N9(68) PCIE_PTX_DRX_P9(68)

PCIE_PRX_DTX_N10(68) PCIE_PRX_DTX_P10(68) PCIE_PTX_DRX_N10(68)

PCIe SSDX4 PCIe Gen3

C C

SSD X 2 PCIe Gen3 Reserved for debug

CardreaderX1

DVT1_76

+3V_PRIM

B B

12 12

PCIe Gen2

RH60410K_0201_5% RH60510K_0201_5%

USB_OC0# USB_OC3#

PVT_10

PCIE_PTX_DRX_P10(68)

PCIE_PRX_DTX_N11(68) PCIE_PRX_DTX_P11(68) PCIE_PTX_DRX_N11(68) PCIE_PTX_DRX_P11(68) PCIE_PRX_DTX_N12(68)

PCIE_PRX_DTX_P12(68) PCIE_PTX_DRX_N12(68)

PCIE_PTX_DRX_P12(68) PCIE_PRX_DTX_N13(67) PCIE_PRX_DTX_P13(67) PCIE_PTX_DRX_N13(67) PCIE_PTX_DRX_P13(67)

PCIE_PRX_DTX_N14(67) PCIE_PRX_DTX_P14(67) PCIE_PTX_DRX_N14(67) PCIE_PTX_DRX_P14(67)

PCIE_PRX_DTX_N16(70) PCIE_PRX_DTX_P16(70) PCIE_PTX_DRX_N16(70) PCIE_PTX_DRX_P16(70)

USB_OC0# USB_OC3#

SD_PWR_EN(71)

UFCAM_LED(39)

PCIE_RCOMPN

RH1100_0201_1%

12

PCIE_RCOMPP

UC1H

CV7

PCIE7_RXN

CV6

PCIE7_RXP

DD3

PCIE7_TXN

DD5

PCIE7_TXP

CT6

PCIE8_RXN

CT7

PCIE8_RXP

DA3

PCIE8_TXN

DA5

PCIE8_TXP

CP7

PCIE9_RXN

CP6

PCIE9_RXP

DA2

PCIE9_TXN

DA1

PCIE9_TXP

CM7

PCIE10_RXN

CM6

PCIE10_RXP

CY3

PCIE10_TXN

CY4

PCIE10_TXP

CK7

PCIE11_RXN/SATA0_RXN

CK6

PCIE11_RXP/SATA0_RXP

CW2

PCIE11_TXN/SATA0_TXN

CW1

PCIE11_TXP/SATA0_TXP

CJ6

PCIE12_RXN/SATA1A_RXN

CJ7

PCIE12_RXP/SATA1A_RXP

CW5

PCIE12_TXN/SATA1A_TXN

CW3

PCIE12_TXP/SATA1A_TXP

CG7

PCIE13_RXN

CG6

PCIE13_RXP

CT3

PCIE13_TXN

CT5

PCIE13_TXP

CE6

PCIE14_RXN

CE7

PCIE14_RXP

CT2

PCIE14_TXN

CT1

PCIE14_TXP

CC5

PCIE15_RXN/SATA1B_RXN

CC6

PCIE15_RXP/SATA1B_RXP

CR3

PCIE15_TXN/SATA1B_TXN

CR4

PCIE15_TXP/SATA1B_TXP

CA6

PCIE16_RXN/SATA2_RXN

CA5

PCIE16_RXP/SATA2_RXP

CP1

PCIE16_TXN/SATA2_TXN

CP2

PCIE16_TXP/SATA2_TXP

DW12

GPP_E0/SATAXPCIE0/SATAGP0

CR42

GPP_A12/SATAXPCIE1/SATAGP1

CR43

GPP_A13/SATAXPCIE2/SATAGP2

DW14

GPP_E9/USB_OC0#

CT43

GPP_A16/USB_OC3#

DU12

GPP_E4/DEVSLP0

DU11

GPP_E5/DEVSLP1

CV48

GPP_A11/SATA_DEVSLP2

DT38

GPP_H12/M2_SKT2_CFG0

DW38

GPP_H13/M2_SKT2_CFG1

DV38

GPP_H14/M2_SKT2_CFG2

DU38

GPP_H15/M2_SKT2_CFG3

DN1

PCIE_RCOMPN

DN3

PCIE_RCOMPP

ICL-U_BGA1526

@

PCIe

PCIe / SATA

PCIe / USB3.1

PCIe / SATA

8 of 19

PCIE1_RXN/USB31_1_RXN PCIE1_RXP/USB31_1_RXP

PCIE1_TXN/USB31_1_TXN

PCIE1_TXP/USB31_1_TXP

PCIE2_RXN/USB31_2_RXN PCIE2_RXP/USB31_2_RXP

PCIE2_TXN/USB31_2_TXN

PCIE2_TXP/USB31_2_TXP

PCIE3_RXN/USB31_3_RXN PCIE3_RXP/USB31_3_RXP

PCIE3_TXN/USB31_3_TXN

PCIE3_TXP/USB31_3_TXP

PCIE4_RXN/USB31_4_RXN PCIE4_RXP/USB31_4_RXP

PCIE4_TXN/USB31_4_TXN

PCIE4_TXP/USB31_4_TXP

PCIE5_RXN/USB31_5_RXN PCIE5_RXP/USB31_5_RXP

PCIE5_TXN/USB31_5_TXN

PCIE5_TXP/USB31_5_TXP

PCIE6_RXN/USB31_6_RXN PCIE6_RXP/USB31_6_RXP

PCIE6_TXN/USB31_6_TXN

PCIE6_TXP/USB31_6_TXP

USB2.0

USB_VBUSSENSE

USB2_COMP

USB2N_1 USB2P_1

USB2N_2 USB2P_2

USB2N_3 USB2P_3

USB2N_4 USB2P_4

USB2N_5 USB2P_5

USB2N_6 USB2P_6

USB2N_7 USB2P_7

USB2N_8 USB2P_8

USB2N_9 USB2P_9

USB2N_10 USB2P_10

USB_ID

RSVD_81

DJ8 DJ6 DJ2 DJ1

DG9 DG7 DJ3 DJ5

DE7 DE9 DF3 DF5

DC7 DC9 DF2 DF1

DA6 DA7 DE4 DE3

CY7 CY6 DD1 DD2

DN8 DP8

DK11 DJ11

DP13 DN13

DK10 DJ10

DL5 DL3

DP11 DN11

DK13 DJ13

DN6 DP6

DL2 DL1

DP10 DN10

USB2_ID

DL6

USB2_VBUSSENSE

DL11

USB2_COMP

DN5

CD3

USB3_PRX_DTX_N2 (79)

USB3_PRX_DTX_P2 (79)

USB3_PTX_DRX_N2 (79)

USB3_PTX_DRX_P2 (79)

PCIE_PRX_DTX_N3 (52)

PCIE_PRX_DTX_P3 (52)

PCIE_PTX_DRX_N3 (52)

PCIE_PTX_DRX_P3 (52)

USB20_N1 (79) USB20_P1 (79)

USB debug

DVT1_03

USB20_N5 (77) USB20_P5 (77)

USB20_N8 (50) USB20_P8 (50)

USB20_N9 (50) USB20_P9 (50)

USB20_N10 (52) USB20_P10 (52)

RH8 10K_0201_5%

1 2

RH9 10K_0201_5%

1 2

RH10 113_0201_1%

1 2

FPR

Type-C_L Type-C_R

BT

USB debug

WLAN

DVT1_05

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P012 - ICL-U(7/13)PCIE,USB

LA-G172P

1

12 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

EVT1_14

UC1I

Strap Pin Strap Pin

MEM_CONFIG0 MEM_CONFIG1 MEM_CONFIG2 MEM_CONFIG3 MEM_CONFIG4

EMMC_RCOMP

CNV_WT_RCOMP

CNV_BRI_PRX_DTX CNV_RGI_PTX_DRX CNV_BRI_PTX_DRX CNV_RGI_PRX_DTX

GPP_F4

GPP_F19 GPP_F5

DVT2_02

RC17 200_0201_1%

1 2

CNV_PTX_DRX_N0 (52) CNV_PTX_DRX_P0 (52) CNV_PTX_DRX_N1 (52) CNV_PTX_DRX_P1 (52) CLK_CNV_PTX_DRX_N (52) CLK_CNV_PTX_DRX_P (52)

CNV_PRX_DTX_N0 (52) CNV_PRX_DTX_P0 (52) CNV_PRX_DTX_N1 (52) CNV_PRX_DTX_P1 (52) CLK_CNV_PRX_DTX_N (52)

RC15 150_0201_1%

RC503 22_0201_1% RC504 22_0201_1%

@

12

RC7460_0201_5%

CLK_CNV_PRX_DTX_P (52)

1 2

1 2 1 2

EVT1_15

Pin Name

MEM_CONFIG0

MEM_CONFIG1

MEM_CONFIG2

DVT1_54

CNV_BRI_PRX_DTX CNV_RGI_PRX_DTX

Micron 8GB SA0000BX51L

0 1

0

CNV_BRI_PRX_DTX (52)

CNV_RGI_PTX_R_DRX (52) CNV_BRI_PTX_R_DRX (52)

CNV_RGI_PRX_DTX (52)

Micron 16GB SA0000BX61L

0

CNVi

RH724 20K_0201_5%@

1 2

RH725 20K_0201_5%@

1 2

Micron 32GB SA0000BX71L

0

1

0

Hynix 8GB SA0000BYX1L

1

0

+1.8V_PRIM

Hynix 16GB SA0000AW20L

OLD and NO SUPPORT

0

1

0

Memory Type Configuration Strap pin

+1.8V_PRIM

MEM_CONFIG0

MEM_CONFIG1

MEM_CONFIG2

MEM_CONFIG3

MEM_CONFIG4

0

1

0

Hynix 32GB SA0000C7V1L

3733

1

0

RH612 10K_0201_5%@

RH613 10K_0201_5%@

RH614 10K_0201_5%@

RH615 10K_0201_5%@

RH616 10K_0201_5%@

Samsung 8GB SA0000C6K1L

01

1

11

0 00000MEM_CONFIG3

0 0000MEM_CONFIG4

1 2

Samsung 16GB SA0000AU40L

OLD and NO SUPPORT

1

Samsung 32GB SA0000CGN1L

Samsung 16GB SA0000C6L1L

NEW NEW

1

0

1

0

GPP_F19

RH129 10K_0201_5%@

RH139 10K_0201_5%@

RH145 10K_0201_5%@

RH185 10K_0201_5%@

RH665 10K_0201_5%@

Hynix 16GB SA0000BYW1L

0

1

0

1

0 0

RH749 75K_0201_5%

1 2

Samsung 4GB SA0000AV71L

1

0

1

DVT2_02

Micron 4GB SA0000BWF0L

Micron 4GB EOL

0

1

0

Hynix 4GB SA0000AD11L

1

0

1

0

Hynix 32GB SA0000BWU1L

P-RTS(4266)

0

1

0

MCSI_E_CLKN MCSI_E_CLKP MCSI_E_DN0 MCSI_E_DP0

UF CAMERA

MCSI_E_CLKN(39) MCSI_E_CLKP(39) MCSI_E_DN0(39) MCSI_E_DP0(39)

DVT1_11

D D

RC8100_0201_1%

12

RT_FORCE_PWR(42,44,46,48)

UFCAM_MCLK(39)

CSI_RCOMP

For EA MIPI signal measure use

DVT1_11

MCSI_E_CLKP MCSI_E_CLKN MCSI_E_DP0

C C

MCSI_E_DN0

Need to close CPU

@

12

@

RC7480_0201_5%

12

RC7490_0201_5%

@

12

RC7500_0201_5%

D12

CSI_E_CLK_N

C12

CSI_E_CLK_P

B12

CSI_E_DN_0

A12

CSI_E_DP_0

G13

CSI_E_DN_1

F13

CSI_E_DP_1

K10

CSI_F_CLK_N

L10

CSI_F_CLK_P

L8

CSI_F_DN_0

M8

CSI_F_DP_0

M11

CSI_F_DN_1

L11

CSI_F_DP_1

D9

CSI_D_CLK_N

C9

CSI_D_CLK_P

A7

CSI_D_DN_0

B7

CSI_D_DP_0

B9

CSI_D_DN_1

A9

CSI_D_DP_1

D7

CSI_D_DN_2/CSI_C_DN_0

C7

CSI_D_DP_2/CSI_C_DP_0

D8

CSI_D_DN_3/CSI_C_CLK_N

C8

CSI_D_DP_3/CSI_C_CLK_P

G11

CSI_H_CLK_N

J11

CSI_H_CLK_P

F6

CSI_H_DN_0

G6

CSI_H_DP_0

G10

CSI_H_DN_1

F10

CSI_H_DP_1

G8

CSI_H_DN_2/CSI_G_DN_0

J8

CSI_H_DP_2/CSI_G_DP_0

K6

CSI_H_DN_3/CSI_G_CLK_N

L6

CSI_H_DP_3/CSI_G_CLK_P

B4

CSI_RCOMP

DT34

GPP_D4/IMGCLKOUT0

DP38

GPP_H20/IMGCLKOUT1

DK36

GPP_H21/IMGCLKOUT2

DL36

GPP_H22/IMGCLKOUT3

DN38

GPP_H23/IMGCLKOUT4

ICL-U_BGA1526

@

eMMC

GPP_F18/EMMC_RESET#

CSI2

CNVi

GPP_F1/CNV_BRI_RSP/UART0_RXD

GPP_F2/CNV_RGI_DT/UART0_TXD

GPP_F0/CNV_BRI_DT/UART0_RTS#

GPP_F3/CNV_RGI_RSP/UART0_CTS#

GPP_F4/CNV_RF_RESET#

GPP_F6/CNV_PA_BLANKING

GPP_F19/A4WP_PRESENT GPP_F5/MODEM_CLKREQ

9 of 19

GPP_F8/EMMC_DATA0

GPP_F9/EMMC_DATA1 GPP_F10/EMMC_DATA2 GPP_F11/EMMC_DATA3 GPP_F12/EMMC_DATA4 GPP_F13/EMMC_DATA5 GPP_F14/EMMC_DATA6 GPP_F15/EMMC_DATA7

GPP_F7/EMMC_CMD

GPP_F16/EMMC_RCLK

GPP_F17/EMMC_CLK

EMMC_RCOMP

CNV_WT_D0N CNV_WT_D0P CNV_WT_D1N

CNV_WT_D1P CNV_WT_CLKN CNV_WT_CLKP

CNV_WR_D0N

CNV_WR_D0P

CNV_WR_D1N

CNV_WR_D1P

CNV_WR_CLKN CNV_WR_CLKP

CNV_WT_RCOMP

DP27 DU30 DT30 DT29 DV30 DU29 DW30 DW29 DV28 DW28 DN27 DT28 DU28

DV45 DU45 DU44 DT44 DL42 DK42

DP44 DN44 DG42 DG44 DK44 DJ44

DT45

DL29 DP31 DL31 DN29

DJ29 DP29 DL27 DK29

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

P013 - ICL-U(8/13)CSI,CNVi,EMMC

LA-G172P

1

13 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

D D

4

3

2

1

+VCCIN

Max1.89V/62A(Processor EDS 572795 rev 1.2)

UC1L

A19

AC12

V13

W12

Y13 K29 K31 B19 B23 B27 B29

C C

B B

SOC_SVID_ALERT# SOC_SVID_CLK SOC_SVID_DAT

BN10 BP11

BP9

BR10

BT11

A21

BT9 BU10 BV36

BV9

BW10 BW36

BW9

BY10

C19

C23

A23 C27 C29

CA36

CA9

CB10 CC11 CC36

CC9

CD10

CE11

A24 CE34 CE35 CF10 CF33

CG11 CG34 CG35 CH10

J30

CJ11

A27

CJ34

H1 H2 H3

CPU POWER 1 OF 3

VCCIN_1 VCCIN_2 VCCIN_3 VCCIN_4 VCCIN_5 VCCIN_6 VCCIN_7 VCCIN_8 VCCIN_9 VCCIN_10 VCCIN_11 VCCIN_12 VCCIN_13 VCCIN_14 VCCIN_15 VCCIN_16 VCCIN_17 VCCIN_18 VCCIN_19 VCCIN_20 VCCIN_21 VCCIN_22 VCCIN_23 VCCIN_24 VCCIN_25 VCCIN_26 VCCIN_27 VCCIN_28 VCCIN_29 VCCIN_30 VCCIN_31 VCCIN_32 VCCIN_33 VCCIN_34 VCCIN_35 VCCIN_36 VCCIN_37 VCCIN_38 VCCIN_39 VCCIN_40 VCCIN_41 VCCIN_42 VCCIN_43 VCCIN_44 VCCIN_45 VCCIN_46 VCCIN_47 VCCIN_48 VCCIN_49 VCCIN_50 VCCIN_51

VIDALERT# VIDSCK VIDSOUT

ICL-U_BGA1526

@

12 of 19

VCCIN_52 VCCIN_53 VCCIN_54 VCCIN_55 VCCIN_56 VCCIN_57 VCCIN_58 VCCIN_59 VCCIN_60 VCCIN_61 VCCIN_62 VCCIN_63 VCCIN_64 VCCIN_65 VCCIN_66 VCCIN_67 VCCIN_68 VCCIN_69 VCCIN_70 VCCIN_71 VCCIN_72 VCCIN_73 VCCIN_74 VCCIN_75 VCCIN_76 VCCIN_77 VCCIN_78 VCCIN_79 VCCIN_80 VCCIN_81 VCCIN_82 VCCIN_83 VCCIN_84 VCCIN_85 VCCIN_86 VCCIN_87 VCCIN_88 VCCIN_89 VCCIN_90 VCCIN_91 VCCIN_92 VCCIN_93 VCCIN_94 VCCIN_95 VCCIN_96 VCCIN_97 VCCIN_98

VCCIN_99 VCCIN_100 VCCIN_101 VCCIN_102 VCCIN_103 VCCIN_104

VCCIN_SENSE

VSSIN_SENSE

CJ35 CK10 J32 CL34 CL35 CN34 CN35 CP33 CR34 A29 CR35 CT33 CT34 CT35 CU33 D19 D21 D23 D24 D27 AA12 D29 F19 F21 F23 F24 F27 F29 G1 G19 G23 AB1 G27 G29 H19 H23 H27 H29 J18 J20 J22 J23 AB13 J26 J28 K17 K19 K21 K23 K24 K27 M1 U1

F17 G17

VCCIN_SENSE_R VSSIN_SENSE_R

RC683 0_0201_5%@

1 2

RC684 0_0201_5%@

1 2

Trace Length Match<25 mils Must be routed as differential pair to VR

VCCIN_SENSE (91) VSSIN_SENSE (91)

1.The total Length of Data and Clock (from CPU to each VR) must be equal (±0.1 inch).

2.Route the Alert signal between the Clock and the Data signals. CAD Note: Place the PU resistors close to CPU

+1.05V_VCCST

12

SVID DATA

SOC_SVID_DAT

SVID ALERT#

SOC_SVID_ALERT#

SVID CLK

SOC_SVID_CLK

@

12

RC6030_0201_5%

+1.05V_VCCST

@

12

RC6010_0201_5%

+1.05V_VCCST

@

12

RC6050_0201_5%

RC604 100_0201_1%

12

RC602 56_0201_5%

12

RC606

100_0201_5%

1

C4195 33P_0201_50V8J

2

@

@RF@

SVID_DAT (91)

SVID_ALERT# (91)

SVID_CLK (91)

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P014 - ICL-U(9/13)CPU PWR,SVID

LA-G172P

1

14 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

+1.1V_MEM

EMC CAPS

+1.1V_MEM

PLACE <160mil FROM SOC VDDQ, WITH EACH PAIR <470mil APART

CC14010U_0402_10V6M

CC1311U _0201_6.3V6K

CC1301U _0201_6.3V6K

D D

1

2

CC1331U _0201_6.3V6K

CC1321U _0201_6.3V6K

1

2

CC1341U _0201_6.3V6K

1

2

CC1351U _0201_6.3V6K

1

2

CC13710U_0402_10V6M

CC13610U_0402_10V6M

1

2

CC13910U_0402_10V6M

CC13810U_0402_10V6M

1

2

@

CC14122U_0603_6.3V6M

1

2

@

CC14222U_0603_6.3V6M

1

2

CC64312P_0201_25V8JEMI@

1

2

CC64412P_0201_25V8JEMI@

CC6462.2P_0201_25V8CEMI@

1

2

CC6472.2P_0201_25V8CEMI@

1

2

CC6482.2P_0201_25V8CEMI@

CC64512P_0201_25V8JEMI@

1

2

CC66012P_0201_25V8J@EMI@

CC6632.2P_0201_25V8C@EMI@

1

2

Primary side cap

Follow PDG rev1.1 P.545

+1.1V_MEM

1.1V/3.5A(Processor EDS 572795 rev 1.2)

UC1M

AA37

VDDQ_1

AG36

VDDQ_2

AJ36

VDDQ_3

AL36

VDDQ_4

AL49

+VCCST_CPU +VCCSTG_CPU

C C

1

CC154

@

1U_0201_6.3V6M

2

1

CC153 1U_0201_6.3V6M

2

1

CC155

@

1U_0201_6.3V6M

2

1

CC156 1U_0201_6.3V6M

2

DVT1_19

+VCCST_CPU +1.05V_VCCST

@

1 2

RC592 0_0603_5%

+1.05V_VCCSTG+VCCSTG_OUT_LGC

@

1 2

RC659 0_0603_5%

B B

DVT1.2_12

1U_0201_6.3V6M

+VCCSTG_OUT

CC191

@

1

2

+VCCSTG_OUT_LGC

+VCCSTG_CPU

+VCCSTG_OUT

+VCCST_CPU

1.05V/0.8A

1.05V/0.15A

VDDQ_5

AN36

VDDQ_6

AP37

VDDQ_7

AR36

VDDQ_8

AR37

VDDQ_9

AT36

VDDQ_10

AT49

VDDQ_11

AA49

VDDQ_12

AV36

VDDQ_13

AW37

VDDQ_14

AY36

VDDQ_15

BA37

VDDQ_16

BA49

VDDQ_17

BB36

VDDQ_18

BD36

VDDQ_19

BE37

VDDQ_20

BF36

VDDQ_21

BF37

VDDQ_22

AB36

VDDQ_23

BF49

VDDQ_24

BG36

VDDQ_25

BJ36

VDDQ_26

BL37

VDDQ_27

BM49

VDDQ_28

BN37

VDDQ_29

BP38

VDDQ_30

CB1

VCCST

BY1

VCCSTG

F33

VCCSTG_OUT_1

G33

VCCSTG_OUT_2

E5

VCCSTG_OUT_LGC

ICL-U_BGA1526

@

CPU POWER 2 OF 3

VCCSTG_OUT_3 VCCSTG_OUT_4 VCCSTG_OUT_5 VCCSTG_OUT_6 VCCSTG_OUT_7

VCCPLL_OC_1 VCCPLL_OC_2 VCCPLL_OC_3 VCCPLL_OC_4

13 of 19

VDDQ_31 VDDQ_32 VDDQ_33 VDDQ_34 VDDQ_35 VDDQ_36 VDDQ_37 VDDQ_38 VDDQ_39 VDDQ_40 VDDQ_41 VDDQ_42 VDDQ_43 VDDQ_44 VDDQ_45 VDDQ_46 VDDQ_47

RSVD_78

RSVD_2 RSVD_3

VCC1P8A_1 VCC1P8A_2 VCC1P8A_3 VCC1P8A_4 VCC1P8A_5

RSVD_74 RSVD_75 RSVD_76

VCCPLL

VCCIO_OUT

BP39 BR37 BT38 AC35 BU37 BU49 CA39 CB49 L38 L49 N36 T49 AC37 AD35 AD36 AE36 AF49

C33

A33 B33

BG9 BJ9 BM9 BW1 BW2

R35 V34 T34 U35 AB34 W35 AA35 Y34

CD2

CG38 CG41 CG42 CG49

AD7

C33,A33,B33 is RSVD Intel recommended NC

1.8V/0.7A

+VCCSTG_OUT

DVT1.2_12

RSVD_W35 RSVD_AA35 RSVD_Y34

1

TP72

1

TP71

1

TP73

1.05V/0.09A

1.1V/0.16A

+VCCIO_OUT

TP@ TP@ TP@

PAD~D PAD~D PAD~D

+VCC1P05_OUTPUT_PLL

+VCC1P8A

+VCC_SFR_OC

VCC1P8A shape from VR to VCC1P8A pins should have: a. total length L of < 22mm between VR and BGA. b. Average width W of 1.8mm.

1

CC129 10U_0402_10V6M

2

1

CC308 22U_0603_6.3V6M

2

DVT1_18

1

CC144 1U_0201_6.3V6M

2

1

CC145 1U_0201_6.3V6M

2

+VCC1P8A

@

+VCC_SFR_OC

1

@

CC189 1U_0201_6.3V6M

2

1

CC188 10U_0402_10V6M

2

CC6642.2P_0201_25V8C@EMI@

CC66212P_0201_25V8J@EMI@

1

2

@

CC6652.2P_0201_25V8C@EMI@

CC66112P_0201_25V8J@EMI@

1

2

DVT1_19

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

+VCC1P05_OUTPUT_PLL

2

DVT1_18

1

CC147 1U_0201_6.3V6M

2

Title

Size Document Number Rev

Date: Sheet of

1

@

CC148 1U_0201_6.3V6M

2

Compal Electronics, Inc.

P015 - ICL-U(10/13)CPU PWR

LA-G172P

1.0 (A00)

15 101Friday, May 24, 2019

1

15 101Friday, May 24, 2019

Vinaﬁx.com

5

4

3

2

1

+VCCPRIM_1P8

DVT1_19

+3V_PRIM

breakout with a 3.8mm width plane

1

CC170 1U_0201_6.3V6M

2

@

1

CC171

@

0.1U_0201_10V6K

2

PLACE NEAR DG26

breakout with a 5mm width pl ane

1

CC173 1U_0201_6.3V6M

2

@

1

CC174

@

1U_0201_6.3V6M

2

1

CC175 1U_0201_6.3V6M

2

PDG p.545 use XFL4012-601ME

SDS p.23 use UHP252012 , now use

CRB p.62 use 0.6UH/5A

GND shield around the VCC tr ace routing

1 2

@

1 2

12

1

CC177 1U_0201_6.3V6M

2

+3VALW_DSW

@

RC120 0_0603_5%

RC589

0.1_0402_1%

1

CC176 47U_0603_6.3V6M

2

breakout with a 1.4mm width plane

1

CC180

@

1U_0201_6.3V6M

2

PLACE NEAR DE31

DVT1_19

+1.8V_PRIM

@

1 2

RC587 0_0603_5%

@

DVT1_19

+1.8V_PRIM

LC10.68UH_UHP252012NF-R68M_3A_20% @

1.8V/27 A(PCH EDS 572631 rev 1.0)

D D

Trace Length Match<25 mils Must be routed as differential pair to VR

VCCIN_AUX_VCCSENSE(89) VCCIN_AUX_VSSSENSE(89)

C C

RC685 0_0201_5%@

1 2

RC686 0_0201_5%@

1 2

EVT2_35

+VCCPFUSE_3P3

+VCCPRIM_1P8

+V3.3A_1.8A_PCH_SPI

VCCDSW_EN_GPIO(78)

VCCDSW_EN(58)

ALW_PWRGD_3V_5V(58,78)

+V1.05A_BYPASS

+VNN_BYPASS

VCCIN_AUX_VCCSENSE_R VCCIN_AUX_VSSSENSE_R

RC697 0_0201_5%@

+VCCIN_AUX

1.05V/0.2A

3.3V/0.003A

1 2

UC1N

AH1

VCCIN_AUX_1

AW10

VCCIN_AUX_2

AY11

VCCIN_AUX_3

AY9

VCCIN_AUX_4

BA10

VCCIN_AUX_5

BB9

VCCIN_AUX_6

CH1

VCCIN_AUX_7

CK11

VCCIN_AUX_8

CL10

VCCIN_AUX_9

CM11

VCCIN_AUX_10

CN1

VCCIN_AUX_11

AJ1

VCCIN_AUX_12

CN10

VCCIN_AUX_13

CP11

VCCIN_AUX_14

CR10

VCCIN_AUX_15

CT11

VCCIN_AUX_16

CU10

VCCIN_AUX_17

CV1

VCCIN_AUX_18

CV11

VCCIN_AUX_19

CW10

VCCIN_AUX_20

CY11

VCCIN_AUX_21

DC1

VCCIN_AUX_22

AL1

VCCIN_AUX_23

P13

VCCIN_AUX_24

R12

VCCIN_AUX_25

T13

VCCIN_AUX_26

U12

VCCIN_AUX_27

DC11

VCCIN_AUX_28

DE12

VCCIN_AUX_29

DF12

VCCIN_AUX_30

AM1

VCCIN_AUX_31

AN1

VCCIN_AUX_32

AT11

VCCIN_AUX_33

AT9

VCCIN_AUX_34

AU10

VCCIN_AUX_35

AV9

VCCIN_AUX_36

BF9

VCCIN_AUX_VCCSENSE

BD9

VCCIN_AUX_VSSSENSE

DJ15

VCC_V1P05EXT_1P05

CY34

VCC_VNNEXT_1P05

DC33

VCCPRIM_3P3_1

DD35

VCCPRIM_1P8_1

DB34

VCCSPI

ICL-U_BGA1526

@

CPU POWER 3 OF 3

14 of 19

SIO_SLP_SUS#(11,47,49,58)

DC1

2 1

RB751S40T1G_SOD523-2

DC2

21

RB751S40T1G_SOD523-2

VCCPRIM_3P3_2 VCCPRIM_3P3_3 VCCPRIM_3P3_4

VCCPRIM_1P8_2 VCCPRIM_1P8_3 VCCPRIM_1P8_4 VCCPRIM_1P8_5 VCCPRIM_1P8_6 VCCPRIM_1P8_7 VCCPRIM_1P8_8 VCCPRIM_1P8_9

VCCLDOSTD_0P85

VCCA_CLKLDO_1P8

VCCDPHY_1P24

VCCDSW_1P05

VCC1P05_1 VCC1P05_2 VCC1P05_3

VCCPLL

VCCPRIM_1P05_1

VCCPRIM_1P05_2

VCCPRIM_1P05_3

VCCPRIM_1P05_4

VCCRTC

VCCDSW_3P3

VCCPGPPR

GPP_B0/CORE_VID0 GPP_B1/CORE_VID1

GPP_B2/VRALERT#

VCCDSW_EN_Q

DF23 DG26 DG28

DF15 DF17 DF18 DF20 DG17 DG18 DG20 DF34

DW37

DW15

DW32

DD34

BY2 CB2 CC1

CD1

DG31

DG29

DF29

DF31

DG33

DE31

DF26

CL38 CJ38 CN38

RC699 0_0201_5%@

1 2

RC698 0_0201_5%@

1 2

+3V_PRIM

3.3V/0.202A

+VCCPRIM_1P8

1.8V/1.3A

+VCCLDOSTD_OUT_0P85

0.85V/TBDA

1.8V/0.165A

1.24V/TBDA

1.05V/TBDA

1.05V/0.09A

1

TP100

TP@

1.05V/TBDA

3.3V/0.002A

3.3V/0.004 A

3.3V,1.8V,1.5V/0.005A

CORE_VID0_R CORE_VID1_R VRALERT#

RC690 0_0201_5%@ RC689 0_0201_5%@ RC688 0_0201_5%@

PCH_PRIM_EN_R

+VCCA_CLKLDO_1P8

+VCCDPHY_1P24

+VCC1P05_OUTPUT_PLL

PAD~D

+VCC1.05_OUT_PCH

+VCCPRTC_3P3

1 2 1 2 1 2

1 2

0_0402_5%

RC505

@

+VCCDSW_1P05

+3VALW_DSW

CORE_VID0 CORE_VID1 VRALERT#_R

12

RC508

1M_0201_5%

@

12

CC511

@

0.1U_0402_25V6

+VCC1.05_OUT_FET

+3V_1.8V_HDA

CORE_VID0 (78,89) CORE_VID1 (78,89) VRALERT#_R (83)

PCH_PRIM_EN (88)

DVT1_03

1U_0201_6.3V6K

PLACE NEAR DG33

0.1uF cap should place befor e the 1uF cap.

+VCCDSW_1P05

+VCCDPHY_1P24

+VCCLDOSTD_OUT_0P85

1

CC260

2

EVT2_47

2.6mm width plane

1

CC181

0.1U_0201_10V6K

2

1uF cap should place after t he 0.1uF cap.

1

CC183 1U_0201_6.3V6M

2

PLACE NEAR DD34

DVT1_19

1

CC184

4.7U_0201_6.3V6M

2

PLACE NEAR DW32 WITHIN 3MM FROM PACKAGE

1

CC185 1U_0201_6.3V6K

2

PLACE NEAR DW37 WITHIN 3MM FROM PACKAGE

RC696

@

1 2

0_0402_5%

1

CC182 1U_0201_6.3V6M

2

PLACE NEAR DF23

PLACE NEAR DG20

0.8mm width plane

+RTCVCC+VCCPRTC_3P3

DVT1_19

+VCCA_CLKLDO_1P8

PLACE NEAR DW15

Power reserved

RC744

20K_0201_5%

+3V_PRIM

1 2

VRALERT#_R

D21

21

RB751S40T1G_SOD523-2

H_PROCHOT# (11,58,91)

CORE_VID0 CORE_VID1

RC663 RC664

12

10K_0201_5%

12

10K_0201_5%

+3VALW

CORE_VID0

CORE_VID1

@

RC609

RC611

RC610

RC612

12

10K_0201_5%

12

10K_0201_5%

12

10K_0201_5%

12

10K_0201_5%

For volume segment platform this rail is disabled.

B B

Keep the pin floating (do no t short this pin to ground).

+V1.05A_BYPASS

RC595 100K_0201_5%@

1 2

RC648 100K_0201_5%@

1 2

+VNN_BYPASS

+1.8V_PRIM

RC583

@

1 2

0_0402_5% RC582 0_0402_5%

@

1 2

+V3.3A_1.8A_PCH_SPI+3V_PRIM

1

CC30

@

0.1U_0201_10V6K

2

+1.8V_PRIM

Follow #575759 p.32

+3V_PRIM

Close to RC164

1

CC164

@

10P_0201_25V8

2

A A

5

+1.8V_PRIM

RC168 0_0402_5%

1 2

RC165 0_0402_5%

1 2

@

+3V_1.8V_HDA_R

LC2

BLM18EG221TN1D_2P~D

1 2

2

RF@

CC167

2.2P_0201_25V

1

EVT2_35

2

RF@

1

RC747 0_0402_5%

@

1 2

+3V_1.8V_HDA

CC168

2.2P_0201_25V

+VCCPFUSE_3P3+3V_PRIM

4

1

CC23

0.1U_0201_10V6K

2

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet of

Compal Electronics, Inc.

P016 - ICL-U(11/13)PCH Power

LA-G172P

1

16 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

UC1O

D D

C C

B B

A11

A46 BA45 BA47 BB11

BB3 BB7

BC37

BD3 BD38 BD39 BD41

A48 BD42 BD43 BD45 BD49

BD5 BD6 BD7 BE1 BE2 BF3

A49

BF45 BF47

BF7

BG3

BG41

BG7

BH37

BJ1

BJ2

BJ3 AA45

BJ41 BJ43 BJ45 BJ49

BJ7

BM11

BM3 BM45 BM47

BM5

AA47

BM6

BM7

BP1 BP2 BP3

BP43

BP7 BR45 BR49 AB11

AB3 AB38 AB39 AB41

A17 AB42 AB43

AB5

AB6 AC45 AC49 AD10 AD11 AD34 AD37

AE6

AF37

A3

GND 1 OF 3

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74

15 of 19

ICL-U_BGA1526

@

VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98

VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148

AF45 AF47 AG1 AG11 AG3 AG38 AG39 AG41 A31 AG42 AG43 AG5 AG9 AH2 AH37 AH45 AH49 AJ2 AJ3 A34 AK37 AL2 AL45 AL47 AL6 AM2 AM37 AN2 AN38 AN39 A36 AN41 AN42 AN43 AN45 AN49 AN6 AR1 AR11 AR2 AR3 A39 AR7 AR9 AT3 AT45 AT47 AT5 AT6 AT7 AU37 AV11 A42 AV3 AV38 AV39 AV41 AV42 AV43 AV45 AV49 AV7 AY3 A44 AY7 B17 B2 B21 B24 B3 B31 B48 BA1 BA2

BT3 BT39 BT41 BT42 BT43

BT7

BU45 BU47

BV1 BV11

BV2

BV3

BV7

BW3

BW37

BW5 BW6

BW7 BY37 BY45

BY49

C11 C13 C14 C17 C21 C24 C31 C34 C39 C48 C49

CA3 CA38 CA41 CA42 CA43

CA7 CB37 CB45 CB47

CC3

CC7 CE37 CE45 CE49

CE9

CG37 CG39 CG43 CG45 CG47

CG9

CH3

CH5

CJ37 CJ42

CJ9 CK45 CK49

CK9 CL37 CL42 CL49

CM45 CM47

CM9

CN3

CN37 CN39

CN5

CP9

CR32

C6

UC1P

GND 2 OF 3

VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222

16 of 19

ICL-U_BGA1526

@

VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296

CR37 CR45 CR49 CT37 CT39 CT42 CT9 CU45 CU47 CU49 CV3 CV34 CV35 CV5 CV9 CY41 CY45 CY49 CY9 D13 D17 D31 D44 D49 DA10 DA33 DA9 DB32 DB35 DB38 DB45 DB47 DB49 DC3 DC49 DC5 DC6 DD37 DD42 DE10 DE13 DE17 DE18 DE20 DE22 DE23 DE26 DE28 DE29 DE33 DE45 DE6 DF13 DF22 DF28 DF33 DF35 DF39 DG10 DG12 DG13 DG15 DG22 DG23 DG47 DG6 DH1 DH3 DH45 DH5 DJ19 DJ21 DJ27 DJ31

DJ33 DJ36 DJ42

DK3 DK4

DK49

DK6

DK8 DL10 DL13 DL44 DL47

DM47

DN15 DN19 DN24 DN31 DN36 DN42 DP45 DR49

DT1 DT10 DT15 DT20 DT27

DT3 DT32 DT37 DT42 DT49

DT6

DT7

DT8

DU1 DU10 DU15

DU2 DU20 DU27 DU32 DU37 DU48 DU49

DU7

DV2 DV44 DV48

DV8

DW1

DW10

DW2 DW20 DW27 DW44 DW46 DW48 DW49

DW7

E11 E34 E36 E39 E42

E6

UC1Q

GND 3 OF 3

VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359 VSS_360 VSS_361

17 of 19

ICL-U_BGA1526

@

VSS_362 VSS_363 VSS_364 VSS_365 VSS_366 VSS_367 VSS_368 VSS_369 VSS_370 VSS_371 VSS_372 VSS_373 VSS_374 VSS_375 VSS_376 VSS_377 VSS_378 VSS_379 VSS_380 VSS_381 VSS_382 VSS_383 VSS_384 VSS_385 VSS_386 VSS_387 VSS_388 VSS_389 VSS_390 VSS_391 VSS_392 VSS_393 VSS_394 VSS_395 VSS_396 VSS_397 VSS_398 VSS_399 VSS_400 VSS_401 VSS_402 VSS_403 VSS_404 VSS_405 VSS_406 VSS_407 VSS_408 VSS_409 VSS_410 VSS_411 VSS_412 VSS_413 VSS_414 VSS_415 VSS_416 VSS_417 VSS_418 VSS_419 VSS_420 VSS_421 VSS_422 VSS_423 VSS_424 VSS_425 VSS_426 VSS_427

F11 F31 F45 F47 F8 G21 G24 G3 G31 G36 G49 G5 H17 H21 H24 H31 H33 H36 H45 H49 J10 J13 J16 J36 J6 K11 K33 K8 L36 L39 L41 L42 L43 L45 L47 M10 M3 M36 M5 N45 N49 P11 P41 P8 R3 R37 T11 T36 T41 T43 T45 T47 U3 U37 U5 V11 V36 V45 V49 V9 W37 Y36 Y38 Y43 Y9 DE15

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Compal Electronics, Inc.

P017 - ICL-U(12/13)GND

LA-G172P

1

1.0 (A00)

17 101Friday, May 24, 2019

Vinaﬁx.com

5

MIPI60_CFG0#(79) MIPI60_CFG1#(79) MIPI60_CFG2#(79) MIPI60_CFG3#(79) MIPI60_CFG4#(79) MIPI60_CFG5#(79) MIPI60_CFG6#(79) MIPI60_CFG7#(79) MIPI60_CFG8#(79) MIPI60_CFG9#(79)

D D

MIPI60_CFG10#(79) MIPI60_CFG11#(79) MIPI60_CFG12#(79) MIPI60_CFG13#(79) MIPI60_CFG14#(79) MIPI60_CFG15#(79)

MIPI60_CFG_STB0_DN(79) MIPI60_CFG_STB0_DP(79)

MIPI60_CFG_STB1_DN(79) MIPI60_CFG_STB1_DP(79)

1 2

MIPI60_MBP0#(79) MIPI60_MBP1#(79)

EVT1_35

+VCCIO_OUT

TP27

TP@

RC723 10K_0201_5%@

1 2

RC724 10K_0201_5%@

1 2

C C

MBP2# MBP3#

PAD~D

TP@ TP@ TP@ TP@

TP@

TP28PAD~D TP29PAD~D TP30PAD~D TP31PAD~D

TP32PAD~D

4

UC1S

AG6

CFG_0

AE7

CFG_1

AG7

CFG_2

AD9

CFG_3

AE9

CFG_4

AB9

CFG_5

AJ6

CFG_6

AB7

CFG_7

V10

CFG_8

AJ5

CFG_9

Y10

CFG_10

AJ7

CFG_11

AB10

CFG_12

AL7

CFG_13

AL9

CFG_14

AJ9

CFG_15

V6

CFG_16

V7

CFG_17

Y6

CFG_18

Y7

RC249.9_0201_1%

1

1 1 1 1

1

CFG_RCOM

MBP2# MBP3#

TP_AV1

TP_AT2 TP_AT1 TP_AU1 TP_AU2

TP_AV2

AD6

T10

BJ11

BL10

AV1

AT2

AT1 AU1 AU2

AV2

DP3 DT2

AR10 AP10 BP36

BM36

J15

K15

C5 D4

T9 T7

T6

A5

CFG_19

CFG_RCOMP

BPM#0 BPM#1 BPM#2 BPM#3

RSVD_62 RSVD_63

RSVD_TP_17

RSVD_TP_18 RSVD_TP_20 RSVD_TP_19 RSVD_TP_21

RSVD_TP_22

RSVD_67 RSVD_68

RSVD_69 RSVD_71 RSVD_70 RSVD_72

VSS_430 VSS_431

SKTOCC# RSVD_77 RSVD_64

ICL-U_BGA1526

@

RESERVED SIGNALS

19 of 19

3

RSVD_TP_1 RSVD_TP_2

RSVD_57 RSVD_58

RSVD_TP_10 RSVD_TP_11

RSVD_79 RSVD_80

RSVD_TP_5 RSVD_TP_6

VSS_428 VSS_429

RSVD_55 RSVD_56

RSVD_65 RSVD_66

RSVD_59 RSVD_60

RSVD_TP_13 RSVD_TP_14

RSVD_TP_24 RSVD_TP_25

RSVD_TP_15 RSVD_TP_16

TP_3 TP_4

RSVD_TP_12

RSVD_TP_7 RSVD_TP_8

RSVD_TP_9

RSVD_TP_23

TP_1 TP_2

VSS_432

RSVD_TP_26

A47 B47

C1 E1

CT32 CV32

G15 F15

BW11 CA11

C16 A16

C2 A4

DP5 DR5

D14 E16

DV6 DW6

DP2 DP1

DW4 DV4

CM33 DB10

R1

DW3 DV3

DH49

DL8

DW47 DV47 DU47

P10

TP_A47 TP_B47

TP_C1 TP_E1

TP_CT32 TP_CV32

TP_G15 TP_F15

TP_BW11 TP_CA11

TP_DV6 TP_DW6

TP_DP2 TP_DP1

TP_DW4 TP_DV4

TP_CM33 TP_DB10

TP_R1

TP_DW3 TP_DV3

TP_DH49

TP_DL8

TP_DW47 TP_DV47

TP_P10

2

1

TP1

1

TP2

1

TP59 PAD~D

1

TP60 PAD~D

1

TP6

1

TP5

1

TP8 PAD~D

1

TP7 PAD~D

1

TP3 PAD~D

1

TP4 PAD~D

1

TP10

1

TP9

1

TP12

1

TP11

1

TP13

1

TP14

1

TP16

1

TP15

1

TP18

1

TP17 PAD~D

1

TP19 PAD~D

1

TP20

1

TP22

1

TP23

1

TP24

1

TP87

TP@ TP@

TP@

TP@ TP@

TP@

TP@ TP@

TP@

PAD~D PAD~D

PAD~D

PAD~D PAD~D

PAD~D

1

PAD~D

TP@

PAD~D

TP@

PAD~D

TP@

PAD~D

TP@

B B

A A

PAD~D

PAD~D PAD~D PAD~D

PAD~D

TP@ TP@ TP@

TP@

TP89

TP90 TP91 TP92

TP93 TP94 TP95

TP67

TP68

1

1 1 1

1

TP88

TP@

TP_N34 TP_AK10

TP_AH10 TP_BC10 TP_CH33

TP_AM10 TP_BH10 TP_J34

RSVD_L34

RSVD_M34

N34

AK10 BT36 AH10 BC10

CH33

CJ32

AM10

BH10

J34

Y11

L34

AJ11

CG32

CK33 BP41 AL11

BG11

AN11

M13 M34

DU42

DW42

D33

L13

K13

UC1R

RSVD_TP_28 RSVD_TP_29 RSVD_7 RSVD_TP_30 RSVD_TP_31 RSVD_TP_32

RSVD_12 RSVD_TP_33 RSVD_TP_34 RSVD_TP_27

RSVD_9 RSVD_10

RSVD_17 RSVD_21

RSVD_22 RSVD_20 RSVD_23 RSVD_24 RSVD_16 RSVD_18 RSVD_19

RSVD_42 RSVD_43 RSVD_44 RSVD_45 RSVD_47

ICL-U_BGA1526

@

RESERVED SIGNALS

RSVD_TP_35 RSVD_TP_36 RSVD_TP_37

RSVD_32 RSVD_33 RSVD_34

IST_TP_0

IST_TP_1 IST_TRIG_0 IST_TRIG_1

PCH_IST_TP_0 PCH_IST_TP_1

RSVD_27

RSVD_28

RSVD_35

RSVD_46

RSVD_48

RSVD_49

RSVD_50

RSVD_51

RSVD_52

RSVD_53

RSVD_54

RSVD_36

RSVD_37

RSVD_38

RSVD_39

RSVD_40

RSVD_41

DA11 CL32 CN32 CY35 DB37 DF37

BF11 BD11 BE10 BF10

CW33 CY32

CY37 CV37

G34 H34 DJ34 DK31 DK15 CP3 CP5 AN9 AN7 AF10 AE11 H5 D1 DJ40 DK40

TP_DA11 TP_CL32 TP_CN32

IST_TP_0 IST_TP_1 IST_TRIG_0 IST_TRIG_1

PCH_IST_TP_0 PCH_IST_TP_1

1

TP96

1

TP97

1

TP98

1

TP62

1

TP61

1

TP64

1

TP63

1

TP66

1

TP65

CLKIN_XTAL (52)

TP@ TP@ TP@

TP@ TP@ TP@ TP@

TP@ TP@

PAD~D PAD~D PAD~D

PAD~D PAD~D PAD~D PAD~D

PAD~D PAD~D

CLKIN_XTAL for Jefferson Peak reserved

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P018 - ICL-U(13/13)RSVD,MIPI60

LA-G172P

1

18 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P019 - Reserve

LA-G172P

1.0 (A00)

19 101Friday, May 24, 2019

1

19 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P020 - Reserve

LA-G172P

1.0 (A00)

20 101Friday, May 24, 2019

1

20 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P021 - Reserve

LA-G172P

1.0 (A00)

21 101Friday, May 24, 2019

1

21 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P022 - Reserve

LA-G172P

1.0 (A00)

22 101Friday, May 24, 2019

1

22 101Friday, May 24, 2019

Vinaﬁx.com

5

4

3

2

1

Memory connection follow J72913-201 Rev 01_20181217

+VDDQ_MEM

D D

+1.1V_MEM

RD25

0_0201_5%@

1 2

DDR_A_ODTA

12

RD26

@

0_0201_5%

ODT PD reserved -- CRB P.83

+1.1V_MEM +1.1V_MEM

RD27

0_0201_5%@

1 2

DDR_A_ODTB DDR_B_ODTB

+1.8V_MEM

95mA

+1.1V_MEM

422mA

DDR_A_D2_4(7) DDR_A_D2_1(7) DDR_A_D2_3(7) DDR_A_D2_6(7) DDR_A_D2_7(7) DDR_A_D2_5(7) DDR_A_D2_2(7) DDR_A_D2_0(7) DDR_A_D3_0(7) DDR_A_D3_2(7) DDR_A_D3_1(7) DDR_A_D3_4(7) DDR_A_D3_3(7) DDR_A_D3_5(7) DDR_A_D3_6(7) DDR_A_D3_7(7)

DDR_A_DQS2(7) DDR_A_DQS#2(7)

DDR_A_DQS3(7) DDR_A_DQS#3(7)

12

RD28

@

0_0201_5%

C C

B B

ODT PD reserved -- CRB P.83

1 2

RD2 240_0201_1%

1 2

RD1 240_0201_1%

DDR_A_CA0(7) DDR_A_CA1(7) DDR_A_CA2(7) DDR_A_CA3(7) DDR_A_CA4(7) DDR_A_CA5(7)

F1

F12

G4 G9

T4 T9 U1

U12

A4 A9 F5 F8 H1 H5 H8

H12

K1

K3 K10 K12

N1

N3 N10 N12

R1

R5

R8 R12

U5

U8 AB4 AB9

H9HCNNNBUUMLHR-NLM_FBGA200

DDR_A_CA0 DDR_A_CA1 DDR_A_CA2 DDR_A_CA3 DDR_B_CA3 DDR_A_CA4 DDR_A_CA5

DDR_A_CA0 DDR_A_CA1 DDR_A_CA2 DDR_A_CA3 DDR_A_CA4 DDR_A_CA5

DDR_A_ODTA

DDR_A_ODTB

UD1C

VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8

VDD2_1 VDD2_2 VDD2_3 VDD2_4 VDD2_5 VDD2_6 VDD2_7 VDD2_8 VDD2_9 VDD2_10 VDD2_11 VDD2_12 VDD2_13 VDD2_14 VDD2_15 VDD2_16 VDD2_17 VDD2_18 VDD2_19 VDD2_20 VDD2_21 VDD2_22 VDD2_23 VDD2_24

@

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8

VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12 VDDQ_13 VDDQ_14 VDDQ_15 VDDQ_16 VDDQ_17 VDDQ_18 VDDQ_19 VDDQ_20

NC_1 NC_2 NC_3 NC_4 NC_5

B3 B5 B8 B10 D1 D5 D8 D12 F3 F10 U3 U10 W1 W5 W8 W12 AA3 AA5 AA8 AA10

G11 K5 K8 N5 N8

UD1 UD2

+1.8V_MEM

12

CD67

12

CD69

CD68

1U_0201_10V6M

+1.1V_MEM

12

CD70

1U_0201_10V6M

12

CD72

CD71

1U_0201_10V6M

12

CD74

CD73

1U_0201_10V6M

DDRA DDRB

UD1A

A5

ZQ0

A8

ZQ1

H2

CA0a

J2

CA1a

H9

CA2a

H10

CA3a

H11

CA4a

J11

CA5a

R2

CA0b

P2

CA1b

R9

CA2b

R10

CA3b

R11

CA4b

P11

CA5b

G2

ODTa

T2

ODTb

A1

DNU_1

A2

DNU_2

A11

DNU_3

A12

DNU_4

B1

DNU_5

B12

DNU_6

AA1

DNU_7

AA12

DNU_8

AB1

DNU_9

AB2

DNU_10

AB11

DNU_11

AB12

DNU_12

B2

DQ0a

C2

DQ1a

E2

DQ2a

F2

DQ3a

F4

DQ4a

E4

DQ5a

C4

DQ6a

B4

DQ7a

B11

DQ8a

C11

DQ9a

E11

DQ10a

F11

DQ11a

F9

DQ12a

E9

DQ13a

C9

DQ14a

B9

DQ15a

D3

DQS0_ta

E3

DQS0_ca

D10

DQS1_ta

E10

DQS1_ca

H9HCNNNBUUMLHR-NLM_FBGA200

@

+VDDQ_MEM

323mA

12

CD76

CD75

1U_0201_10V6M

+VDDQ_MEM

12

CK_ta

CK_ca

CK_tb

CK_cb

CKE0a

CKE1a

CKE0b

CKE1b

DMI0a DMI1a

DMI0b DMI1b

RESET

DQ10b DQ11b DQ12b DQ13b DQ14b DQ15b

DQS0_tb

DQS0_cb

DQS1_tb

DQS1_cb

A3

A10

C1 C5 C8

C12

D2 D4 D9

D11

E1 E5 E8

E12

G1 G3 G5

G8 G10 G12

J1

J3 J10 J12

K2 K4 K9

K11

N2

H9HCNNNBUUMLHR-NLM_FBGA200

@

12

CD77

CD78

1U_0201_10V6M

DDR_A_CLK

J8

DDR_A_CLK#

J9

DDR_A_CLK

P8

DDR_A_CLK#

P9

DDR_A_CKE0

J4

DDR_A_CKE1

J5

DDR_A_CKE0

P4

DDR_A_CKE1

P5

DDR_A_CS#0

H4

CS0a

DDR_A_CS#1

H3

CS1a

DDR_A_CS#0

R4

CS0b

DDR_A_CS#1

R3

CS1b

C3 C10

Y3

SHORTEST PATH TO GND

Y10

DDR_DRAMRST#_R

T11

DVT1.2_03DVT1.2_03 DVT1.2_03 DVT1.2_03

AA2

DQ0b

Y2

DQ1b

V2

DQ2b

U2

DQ3b

U4

DQ4b

V4

DQ5b

Y4

DQ6b

AA4

DQ7b

AA11

DQ8b

Y11

DQ9b

V11 U11 U9 V9 Y9 AA9

W3 V3

W10 V10

UD1B

VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58

12

CD80

N4 N9 N11 P1 P3 P10 P12 T1 T3 T5 T8 T10 T12 V1 V5 V8 V12 W2 W4 W9 W11 Y1 Y5 Y8 Y12 AB3 AB5 AB8 AB10

1U_0201_10V6M

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29

12

CD79

1U_0201_10V6M

DDR_A_CLK (7) DDR_A_CLK# (7)

DDR_A_CKE0 (7)

DDR_A_CKE1 (7)

DDR_A_CS#0 (7)

DDR_A_CS#1 (7)

DDR_DRAMRST#_R (7,24)

DDR_A_D0_1 (7) DDR_A_D0_0 (7) DDR_A_D0_2 (7) DDR_A_D0_5 (7) DDR_A_D0_3 (7) DDR_A_D0_7 (7) DDR_A_D0_4 (7) DDR_A_D0_6 (7) DDR_A_D1_7 (7) DDR_A_D1_3 (7) DDR_A_D1_1 (7) DDR_A_D1_4 (7) DDR_A_D1_0 (7) DDR_A_D1_2 (7) DDR_A_D1_6 (7) DDR_A_D1_5 (7)

DDR_A_DQS0 (7)

DDR_A_DQS#0 (7)

DDR_A_DQS1 (7)

DDR_A_DQS#1 (7)

+1.1V_MEM

RD29

0_0201_5%@

1 2

DDR_B_ODTA

12

RD30 0_0201_5%

ODT PD reserved -- CRB P.84

DVT1_34 DVT1_34

1 2

12

RD31

0_0201_5%@

RD32 0_0201_5%

ODT PD reserved -- CRB P.84

+VDDQ_MEM

CD45

CD46

CD47

1

2

@EMI@

+VDDQ_MEM

1

2

@EMI@

CD27

1

12P_0201_50V8J

2

@EMI@

1

CD28

2.2P_0201_50V8B

2

@EMI@

CD48

1

12P_0201_50V8J

2

@EMI@

1

CD44

CD43

2.2P_0201_50V8B

2

@EMI@

+VDDQ_MEM

RD21 240_0201_1%

1 2

RD22 240_0201_1%

1 2

95mA

+1.1V_MEM

422mA

+1.8V_MEM

DDR_B_CA0 DDR_B_CA1 DDR_B_CA2

DDR_B_CA4 DDR_B_CA5

DDR_B_CA0 DDR_B_CA1 DDR_B_CA2 DDR_B_CA3 DDR_B_CA4 DDR_B_CA5

DDR_B_ODTA

DDR_B_ODTB

F1

F12

G4 G9 T4 T9 U1

U12

A4 A9 F5 F8 H1 H5 H8

H12

K1

K3 K10 K12

N1

N3

N10 N12

R1

R5

R8

R12

U5

U8

AB4 AB9

H9HCNNNBUUMLHR-NLM_FBGA200

DDR_B_CA0(7) DDR_B_CA1(7) DDR_B_CA2(7) DDR_B_CA3(7) DDR_B_CA4(7) DDR_B_CA5(7)

@

DDR_B_D0_4(7) DDR_B_D0_1(7)

@

DDR_B_D0_6(7) DDR_B_D0_5(7) DDR_B_D0_7(7) DDR_B_D0_3(7) DDR_B_D0_2(7) DDR_B_D0_0(7) DDR_B_D1_0(7) DDR_B_D1_2(7) DDR_B_D1_4(7) DDR_B_D1_1(7) DDR_B_D1_5(7) DDR_B_D1_3(7) DDR_B_D1_6(7) DDR_B_D1_7(7)

DDR_B_DQS0(7) DDR_B_DQS#0(7)

DDR_B_DQS1(7) DDR_B_DQS#1(7)

CD50

CD49

1

12P_0201_50V8J

2

1

CD65

2

CD91

1

12P_0201_50V8J

2

@EMI@

1

CD81

CD66

2.2P_0201_50V8B

2

@EMI@

UD2A

A5

ZQ0

A8

ZQ1

H2

CA0a

J2

CA1a

H9

CA2a

H10

CA3a

H11

CA4a

J11

CA5a

R2

CA0b

P2

CA1b

R9

CA2b

R10

CA3b

R11

CA4b

P11

CA5b

G2

ODTa

T2

ODTb

A1

DNU_1

A2

DNU_2

A11

DNU_3

A12

DNU_4

B1

DNU_5

B12

DNU_6

AA1

DNU_7

AA12

DNU_8

AB1

DNU_9

AB2

DNU_10

AB11

DNU_11

AB12

DNU_12

B2

DQ0a

C2

DQ1a

E2

DQ2a

F2

DQ3a

F4

DQ4a

E4

DQ5a

C4

DQ6a

B4

DQ7a

B11

DQ8a

C11

DQ9a

E11

DQ10a

F11

DQ11a

F9

DQ12a

E9

DQ13a

C9

DQ14a

B9

DQ15a

D3

DQS0_ta

E3

DQS0_ca

D10

DQS1_ta

E10

DQS1_ca

H9HCNNNBUUMLHR-NLM_FBGA200

@

UD2C

VDD1_1

VDDQ_1

VDD1_2

VDDQ_2

VDD1_3

VDDQ_3

VDD1_4

VDDQ_4

VDD1_5

VDDQ_5

VDD1_6

VDDQ_6

VDD1_7

VDDQ_7

VDD1_8

VDDQ_8 VDDQ_9

VDDQ_10

VDD2_1

VDDQ_11

VDD2_2

VDDQ_12

VDD2_3

VDDQ_13

VDD2_4

VDDQ_14

VDD2_5

VDDQ_15

VDD2_6

VDDQ_16

VDD2_7

VDDQ_17

VDD2_8

VDDQ_18

VDD2_9

VDDQ_19

VDD2_10

VDDQ_20 VDD2_11 VDD2_12 VDD2_13 VDD2_14 VDD2_15 VDD2_16 VDD2_17 VDD2_18 VDD2_19 VDD2_20 VDD2_21 VDD2_22 VDD2_23 VDD2_24

@

+1.8V_MEM

12

CD51

1U_0201_10V6M

NC_1 NC_2 NC_3 NC_4 NC_5

DDR_B_CLK

J8

CK_ta

DDR_B_CLK#

J9

CK_ca

DDR_B_CLK

P8

CK_tb

DDR_B_CLK#

P9

CK_cb

DDR_B_CKE0

J4

CKE0a

CKE1a

CKE0b

CKE1b

RESET

DQ10b DQ11b DQ12b DQ13b DQ14b DQ15b

DQS0_tb

DQS0_cb

DQS1_tb

DQS1_cb

+VDDQ_MEM

B3 B5 B8 B10 D1 D5 D8 D12 F3 F10 U3 U10 W1 W5 W8 W12 AA3 AA5 AA8 AA10

G11 K5 K8 N5 N8

12

CD52

1U_0201_10V6M

323mA

+1.1V_MEM

12

CD54

CD53

1U_0201_10V6M

CS0a

CS1a

CS0b

CS1b

DMI0a DMI1a

DMI0b DMI1b

DQ0b DQ1b DQ2b DQ3b DQ4b DQ5b DQ6b DQ7b DQ8b DQ9b

12

CD55

1U_0201_10V6M

DDR_B_CKE1

J5

DDR_B_CKE0

P4

DDR_B_CKE1

P5

DDR_B_CS#0

H4

DDR_B_CS#1

H3

DDR_B_CS#0

R4

DDR_B_CS#1

R3

C3 C10

Y3 Y10

DDR_DRAMRST#_R

T11

AA2 Y2 V2 U2 U4 V4 Y4 AA4 AA11 Y11 V11 U11 U9 V9 Y9 AA9

W3 V3

W10 V10

12

SHORTEST PATH TO GND

UD2B

A3

VSS_1

A10

VSS_2

C1

VSS_3

C5

VSS_4

C8

VSS_5

C12

VSS_6

D2

VSS_7

D4

VSS_8

D9

VSS_9

D11

VSS_10

E1

VSS_11

E5

VSS_12

E8

VSS_13

E12

VSS_14

G1

VSS_15

G3

VSS_16

G5

VSS_17

G8

VSS_18

G10

VSS_19

G12

VSS_20

J1

VSS_21

J3

VSS_22

J10

VSS_23

J12

VSS_24

K2

VSS_25

K4

VSS_26

K9

VSS_27

K11

VSS_28

N2

VSS_29

H9HCNNNBUUMLHR-NLM_FBGA200

@

12

CD56

1U_0201_10V6M

CD57

1U_0201_10V6M

DDR_B_CLK (7) DDR_B_CLK# (7)

DDR_B_CKE0 (7)

DDR_B_CKE1 (7)

DDR_B_CS#0 (7)

DDR_B_CS#1 (7)

DDR_B_D3_6 (7) DDR_B_D3_2 (7) DDR_B_D3_4 (7) DDR_B_D3_5 (7) DDR_B_D3_3 (7) DDR_B_D3_1 (7) DDR_B_D3_0 (7) DDR_B_D3_7 (7) DDR_B_D2_7 (7) DDR_B_D2_3 (7) DDR_B_D2_2 (7) DDR_B_D2_1 (7) DDR_B_D2_4 (7) DDR_B_D2_0 (7) DDR_B_D2_5 (7) DDR_B_D2_6 (7)

DDR_B_DQS3 (7)

DDR_B_DQS#3 (7)

DDR_B_DQS2 (7)

DDR_B_DQS#2 (7)

VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58

12

CD58

1U_0201_10V6M

N4 N9 N11 P1 P3 P10 P12 T1 T3 T5 T8 T10 T12 V1 V5 V8 V12 W2 W4 W9 W11 Y1 Y5 Y8 Y12 AB3 AB5 AB8 AB10

CD59

+VDDQ_MEM

12

CD60

1U_0201_10V6M

CD61

CD62

1U_0201_10V6M

12

CD64

CD63

1U_0201_10V6M

+1.8V_MEM

1

CD303

CD305

10U_0402_10V6M

2

A A

5

+1.1V_MEM

1

2

CD308

10U_0402_10V6M

1

CD306

10U_0402_10V6M

2

4

+VDDQ_MEM

1

2

CD89

1

CD90

10U_0402_10V6M

2

EMC CAPS

+1.8V_MEM

1

CD304

CD12

10U_0402_10V6M

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.1V_MEM

1

CD7

CD307

10U_0402_10V6M

2

Compal Secret Data

2014/09/08 2013/10/28

2

Compal Secret Data

Deciphered Date

+VDDQ_MEM

1

2

CD87

1

CD88

10U_0402_10V6M

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

P023 - LPDDR4/x Channel A/B

LA-G172P

1

23 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

Memory connection follow J72913-201 Rev 01_20181217

D D

+1.1V_MEM

RD33

0_0201_5%@

1 2

DDR_C_ODTA

12

RD34

@

0_0201_5%

ODT PD reserved -- CRB P.85

+1.1V_MEM

RD35

0_0201_5%@

1 2

DDR_C_ODTB

12

RD36

C C

0_0201_5%

@

ODT PD reserved -- CRB P.85

B B

+VDDQ_MEM +VDDQ_MEM

1 2

RD4 240_0201_1%

1 2

RD3 240_0201_1%

DDR_C_CA0(8) DDR_C_CA1(8) DDR_C_CA2(8) DDR_C_CA3(8) DDR_C_CA4(8) DDR_C_CA5(8)

DDR_C_CA0 DDR_C_CA1 DDR_C_CA2 DDR_C_CA3 DDR_C_CA4 DDR_C_CA5

DDR_C_ODTA

DDR_C_ODTB

DVT1.2_03 DVT1.2_03 DVT1.2_03 DVT1.2_03

DDR_C_D1_4(8) DDR_C_D1_1(8) DDR_C_D1_2(8) DDR_C_D1_0(8) DDR_C_D1_5(8) DDR_C_D1_7(8) DDR_C_D1_6(8) DDR_C_D1_3(8) DDR_C_D0_0(8) DDR_C_D0_2(8) DDR_C_D0_5(8) DDR_C_D0_6(8) DDR_C_D0_3(8) DDR_C_D0_7(8) DDR_C_D0_4(8) DDR_C_D0_1(8)

DDR_C_DQS1(8) DDR_C_DQS#1(8)

DDR_C_DQS0(8) DDR_C_DQS#0(8)

+1.8V_MEM

95mA

+1.1V_MEM

422mA

F1

F12

G4 G9 T4 T9 U1

U12

A4 A9 F5 F8 H1 H5 H8

H12

K1

K3 K10 K12

N1

N3 N10 N12

R1

R5

R8 R12

U5

U8 AB4 AB9

H9HCNNNBUUMLHR-NLM_FBGA200

UD3A

A5

ZQ0

A8

ZQ1

H2

CA0a

J2

CA1a

H9

CA2a

H10

CA3a

H11

CA4a

J11

CA5a

R2

CA0b

P2

CA1b

R9

CA2b

R10

CA3b

R11

CA4b

P11

CA5b

G2

ODTa

T2

ODTb

A1

DNU_1

A2

DNU_2

A11

DNU_3

A12

DNU_4

B1

DNU_5

B12

DNU_6

AA1

DNU_7

AA12

DNU_8

AB1

DNU_9

AB2

DNU_10

AB11

DNU_11

AB12

DNU_12

B2

DQ0a

C2

DQ1a

E2

DQ2a

F2

DQ3a

F4

DQ4a

E4

DQ5a

C4

DQ6a

B4

DQ7a

B11

DQ8a

C11

DQ9a

E11

DQ10a

F11

DQ11a

F9

DQ12a

E9

DQ13a

C9

DQ14a

B9

DQ15a

D3

DQS0_ta

E3

DQS0_ca

D10

DQS1_ta

E10

DQS1_ca

H9HCNNNBUUMLHR-NLM_FBGA200

@

UD3C

VDD1_1

VDDQ_1

VDD1_2

VDDQ_2

VDD1_3

VDDQ_3

VDD1_4

VDDQ_4

VDD1_5

VDDQ_5

VDD1_6

VDDQ_6

VDD1_7

VDDQ_7

VDD1_8

VDDQ_8 VDDQ_9

VDDQ_10

VDD2_1

VDDQ_11

VDD2_2

VDDQ_12

VDD2_3

VDDQ_13

VDD2_4

VDDQ_14

VDD2_5

VDDQ_15

VDD2_6

VDDQ_16

VDD2_7

VDDQ_17

VDD2_8

VDDQ_18

VDD2_9

VDDQ_19

VDD2_10

VDDQ_20 VDD2_11 VDD2_12 VDD2_13 VDD2_14 VDD2_15 VDD2_16 VDD2_17 VDD2_18 VDD2_19 VDD2_20 VDD2_21 VDD2_22 VDD2_23 VDD2_24

@

NC_1 NC_2 NC_3 NC_4 NC_5

B3 B5 B8 B10 D1 D5 D8 D12 F3 F10 U3 U10 W1 W5 W8 W12 AA3 AA5 AA8 AA10

G11 K5 K8 N5 N8

+VDDQ_MEM

323mA

CK_ta

CK_ca

CK_tb

CK_cb

CKE0a

CKE1a

CKE0b

CKE1b

CS0a

CS1a

CS0b

CS1b

DMI0a DMI1a

DMI0b DMI1b

RESET

DQ0b DQ1b DQ2b DQ3b DQ4b DQ5b DQ6b DQ7b DQ8b

DQ9b DQ10b DQ11b DQ12b DQ13b DQ14b DQ15b

DQS0_tb DQS0_cb

DQS1_tb DQS1_cb

DDR_C_CLK

J8

DDR_C_CLK#

J9

DDR_C_CLK

P8

DDR_C_CLK#

P9

DDR_C_CKE0

J4

DDR_C_CKE1

J5

DDR_C_CKE0

P4

DDR_C_CKE1

P5

DDR_C_CS#0

H4

DDR_C_CS#1

H3

DDR_C_CS#0

R4

DDR_C_CS#1

R3

C3 C10

Y3 Y10

DDR_DRAMRST#_R DDR_DRAMRST#_R

T11

AA2 Y2 V2 U2 U4 V4 Y4 AA4 AA11 Y11 V11 U11 U9 V9 Y9 AA9

W3 V3

W10 V10

A3

A10

C1 C5 C8

C12

D2 D4 D9

D11

E1 E5 E8

E12

G1 G3 G5

G8 G10 G12

J1

J3 J10 J12

K2 K4 K9

K11

N2

H9HCNNNBUUMLHR-NLM_FBGA200

UD3B

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29

@

DDR_C_CLK (8) DDR_C_CLK# (8)

DDR_C_CKE0 (8)

DDR_C_CKE1 (8)

DDR_C_CS#0 (8)

DDR_C_CS#1 (8)

DDR_DRAMRST#_R (7,23)

DDR_C_D3_6 (8) DDR_C_D3_5 (8) DDR_C_D3_1 (8) DDR_C_D3_0 (8) DDR_C_D3_4 (8) DDR_C_D3_2 (8) DDR_C_D3_7 (8) DDR_C_D3_3 (8) DDR_C_D2_7 (8) DDR_C_D2_3 (8) DDR_C_D2_1 (8) DDR_C_D2_5 (8) DDR_C_D2_0 (8) DDR_C_D2_6 (8) DDR_C_D2_4 (8) DDR_C_D2_2 (8)

DDR_C_DQS3 (8)

DDR_C_DQS#3 (8)

DDR_C_DQS2 (8)

DDR_C_DQS#2 (8)

N4

VSS_30

N9

VSS_31

N11

VSS_32

P1

VSS_33

P3

VSS_34

P10

VSS_35

P12

VSS_36

T1

VSS_37

T3

VSS_38

T5

VSS_39

T8

VSS_40

T10

VSS_41

T12

VSS_42

V1

VSS_43

V5

VSS_44

V8

VSS_45

V12

VSS_46

W2

VSS_47

W4

VSS_48

W9

VSS_49

W11

VSS_50

Y1

VSS_51

Y5

VSS_52

Y8

VSS_53

Y12

VSS_54

AB3

VSS_55

AB5

VSS_56

AB8

VSS_57

AB10

VSS_58

+1.1V_MEM

RD37

0_0201_5%@

1 2

DDR_D_ODTA

12

RD38

@

0_0201_5%

ODT PD reserved -- CRB P.86

+1.1V_MEM

RD39

0_0201_5%@

1 2

DDR_D_ODTB

12

RD40

@

0_0201_5%

ODT PD reserved -- CRB P.86

DDR_D_D1_3(8) DDR_D_D1_6(8) DDR_D_D1_7(8) DDR_D_D1_5(8) DDR_D_D1_0(8) DDR_D_D1_4(8) DDR_D_D1_1(8) DDR_D_D1_2(8) DDR_D_D0_2(8) DDR_D_D0_0(8) DDR_D_D0_5(8) DDR_D_D0_6(8) DDR_D_D0_7(8) DDR_D_D0_3(8) DDR_D_D0_4(8) DDR_D_D0_1(8)

DDR_D_DQS#1(8)

DDR_D_DQS0(8) DDR_D_DQS#0(8)

+1.8V_MEM

95mA

+1.1V_MEM

422mA

DDR_D_CA0(8) DDR_D_CA1(8) DDR_D_CA2(8) DDR_D_CA3(8) DDR_D_CA4(8) DDR_D_CA5(8)

RD23 240_0201_1%

1 2

RD24 240_0201_1%

1 2

DDR_D_CA0 DDR_D_CKE0 DDR_D_CA1 DDR_D_CA2 DDR_D_CA3 DDR_D_CA4 DDR_D_CA5

DDR_D_CA0 DDR_D_CA1 DDR_D_CA2 DDR_D_CA3 DDR_D_CA4 DDR_D_CA5

DDR_D_ODTA

DDR_D_ODTB

UD4C

F1

VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8

VDD2_1 VDD2_2 VDD2_3 VDD2_4 VDD2_5 VDD2_6 VDD2_7 VDD2_8 VDD2_9 VDD2_10 VDD2_11 VDD2_12 VDD2_13 VDD2_14 VDD2_15 VDD2_16 VDD2_17 VDD2_18 VDD2_19 VDD2_20 VDD2_21 VDD2_22 VDD2_23 VDD2_24

@

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8

VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12 VDDQ_13 VDDQ_14 VDDQ_15 VDDQ_16 VDDQ_17 VDDQ_18 VDDQ_19 VDDQ_20

NC_1 NC_2 NC_3 NC_4 NC_5

F12

G4 G9

T4 T9

U1

U12

A4 A9 F5

F8 H1 H5 H8

H12

K1

K3

K10 K12

N1 N3

N10 N12

R1 R5 R8

R12

U5 U8

AB4 AB9

H9HCNNNBUUMLHR-NLM_FBGA200

DDRDDDRC

UD4A

A5

ZQ0

A8

ZQ1

H2

CA0a

J2

CA1a

H9

CA2a

H10

CA3a

H11

CA4a

J11

CA5a

R2

CA0b

P2

CA1b

R9

CA2b

R10

CA3b

R11

CA4b

P11

CA5b

G2

ODTa

T2

ODTb

A1

DNU_1

A2

DNU_2

A11

DNU_3

A12

DNU_4

B1

DNU_5

B12

DNU_6

AA1

DNU_7

AA12

DNU_8

AB1

DNU_9

AB2

DNU_10

AB11

DNU_11

AB12

DNU_12

B2

DQ0a

C2

DQ1a

E2

DQ2a

F2

DQ3a

F4

DQ4a

E4

DQ5a

C4

DQ6a

B4

DQ7a

B11

DQ8a

C11

DQ9a

E11

DQ10a

F11

DQ11a

F9

DQ12a

E9

DQ13a

C9

DQ14a

B9

DQ15a

D3

DQS0_ta

E3

DQS0_ca

D10

DQS1_ta

E10

DQS1_ca

H9HCNNNBUUMLHR-NLM_FBGA200

@

+VDDQ_MEM

B3 B5 B8 B10 D1 D5 D8 D12 F3 F10 U3 U10 W1 W5 W8 W12 AA3 AA5 AA8 AA10

G11 K5 K8 N5 N8

323mA

CK_ta

CK_ca

CK_tb

CK_cb

CKE0a

CKE1a

CKE0b

CKE1b

DMI0a DMI1a

DMI0b DMI1b

RESET

DQ0b DQ1b DQ2b DQ3b DQ4b DQ5b DQ6b DQ7b DQ8b

DQ9b DQ10b DQ11b DQ12b DQ13b DQ14b DQ15b

DQS0_tb

DQS0_cb

DQS1_tb

DQS1_cb

A10

C1

C5

C8 C12

D2

D4

D9 D11

E12

G1

G3

G5

G8 G10 G12

J10 J12

K11

N2

H9HCNNNBUUMLHR-NLM_FBGA200

CS0a

CS1a

CS0b

CS1b

A3

E1 E5 E8

J1 J3

K2 K4 K9

UD4B

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29

@

J9

P8 P9

J4

J5

P4

P5

H4

H3

R4

R3

C3 C10

Y3 Y10

T11

AA2 Y2 V2 U2 U4 V4 Y4 AA4 AA11 Y11 V11 U11 U9 V9 Y9 AA9

W3 V3

W10 V10

DDR_D_CLK#

DDR_D_CLK DDR_D_CLK#

DDR_D_CKE1

DDR_D_CKE0

DDR_D_CKE1

DDR_D_CS#0

DDR_D_CS#1

DDR_D_CS#0

DDR_D_CS#1

VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58

DDR_D_CLK

J8

N4 N9 N11 P1 P3 P10 P12 T1 T3 T5 T8 T10 T12 V1 V5 V8 V12 W2 W4 W9 W11 Y1 Y5 Y8 Y12 AB3 AB5 AB8 AB10

DDR_D_CLK (8) DDR_D_CLK# (8)

DDR_D_CKE0 (8)

DDR_D_CKE1 (8)

DDR_D_CS#0 (8)

DDR_D_CS#1 (8)

DVT1_34DVT1_34

DDR_D_D3_6 (8) DDR_D_D3_7 (8) DDR_D_D3_2 (8) DDR_D_D3_0 (8) DDR_D_D3_1 (8) DDR_D_D3_4 (8) DDR_D_D3_5 (8) DDR_D_D3_3 (8) DDR_D_D2_1 (8) DDR_D_D2_4 (8) DDR_D_D2_3 (8) DDR_D_D2_5 (8) DDR_D_D2_7 (8) DDR_D_D2_6 (8) DDR_D_D2_0 (8) DDR_D_D2_2 (8)

DDR_D_DQS3 (8)DDR_D_DQS1(8)

DDR_D_DQS#3 (8)

DDR_D_DQS2 (8)

DDR_D_DQS#2 (8)

UD4UD3

12

Issued Date

CD16

1U_0201_10V6M

+1.1V_MEM+1.8V_MEM

12

+1.1V_MEM

1

2

+VDDQ_MEM

12

CD17

CD18

1U_0201_10V6M

1

CD3

CD4

10U_0402_10V6M

2

2014/09/08 2013/10/28

2

12

CD19

CD20

1U_0201_10V6M

Compal Secret Data

12

CD21

1U_0201_10V6M

Deciphered Date

CD22

1U_0201_10V6M

+VDDQ_MEM

12

CD24

CD23

1U_0201_10V6M

1

CD83

CD84

10U_0402_10V6M

2

12

CD26

CD25

1U_0201_10V6M

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

P024 - LPDDR4/x Channel C/D

LA-G172P

1

24 101Friday, May 24, 2019

1.0 (A00)

+1.8V_MEM

12

CD30

CD29

1U_0201_10V6M

1

CD11

CD10

10U_0402_10V6M

2

A A

5

12

CD32

CD31

1U_0201_10V6M

+1.1V_MEM+1.8V_MEM

12

CD33

1U_0201_10V6M

1

CD5

10U_0402_10V6M

2

12

CD34

CD35

1U_0201_10V6M

1

CD6

10U_0402_10V6M

2

4

12

CD37

CD36

1U_0201_10V6M

+VDDQ_MEM+1.1V_MEM

12

CD38

1U_0201_10V6M

+VDDQ_MEM

12

CD39

CD40

1U_0201_10V6M

1

CD86

CD85

10U_0402_10V6M

2

12

CD42

CD41

1U_0201_10V6M

3

12

CD13

+1.8V_MEM

1U_0201_10V6M

1

CD8

10U_0402_10V6M

2

12

CD15

CD14

1U_0201_10V6M

1

CD9

10U_0402_10V6M

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Vinaﬁx.com

A

1 1

B

C

D

E

RD41 0_0201_5%LPDDR4X@

MEM_PG(58)

2 2

1 2

RD42 0_0201_5%@

1 2

1.1V_MEM_EN (78,86)

0.6V_VDDQ_PG (87)

1.1V_MEM_PG (86)

0.6V_VDDQ_EN

+0.6V_VDDQP:LPDDR4X

RD43 0_0201_5%LPDDR4X@

1 2

0.6V_VDDQ_EN

RD44 0_0201_5%LPDDR4@

1 2

+0.6V_VDDQ

+1.1V_MEM:LPDDR4

LPDDR4X@

RD45

0_1206_5%

1 2

+1.1V_MEM

LPDDR4@

RD46

0_1206_5%

1 2

+VDDQ_MEM

RD400

@

1 2

0_0402_5%

12

RD300

CD309

1M_0201_5%

@

0.1U_0402_25V6

0.6V_VDDQ_EN_P (87)

RD43 RD45 RD44 RD46 LPDDR4(1.1V) : @ @ LPDDR4X(1.1v&0.6V): @ @

3 3

4 4

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

A

B

2014/09/08 2013/10/28

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

P025 - LPDDR4&4X BOM OPTION

1.0 (A00)

LA-G172P

25 101Friday, May 24, 2019

E

25 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P026 - Reserve

LA-G172P

1.0 (A00)

26 101Friday, May 24, 2019

1

26 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P027 - Reserve

LA-G172P

1.0 (A00)

27 101Friday, May 24, 2019

1

27 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P028 - Reserve

LA-G172P

1.0 (A00)

28 101Friday, May 24, 2019

1

28 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P029 - Reserve

LA-G172P

1.0 (A00)

29 101Friday, May 24, 2019

1

29 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P030 - Reserve

LA-G172P

1.0 (A00)

30 101Friday, May 24, 2019

1

30 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P031 - Reserve

LA-G172P

1.0 (A00)

31 101Friday, May 24, 2019

1

31 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P032 - Reserve

LA-G172P

1.0 (A00)

32 101Friday, May 24, 2019

1

32 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P033 - Reserve

LA-G172P

1.0 (A00)

33 101Friday, May 24, 2019

1

33 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P034 - Reserve

LA-G172P

1.0 (A00)

34 101Friday, May 24, 2019

1

34 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P035 - Reserve

LA-G172P

1.0 (A00)

35 101Friday, May 24, 2019

1

35 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P036 - Reserve

LA-G172P

1.0 (A00)

36 101Friday, May 24, 2019

1

36 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P037 - Reserve

LA-G172P

1.0 (A00)

37 101Friday, May 24, 2019

1

37 101Friday, May 24, 2019

Vinaﬁx.com

5

OCP : 1.5A

+3VALW

2

3

RON : 70m ohm VIH : 1.2V Rising time : 2 ms

U7

5

OUT

IN

GND

4

OC

EN

SY6288C20AAC_SOT23-5

EVT1_03

D1

1

BAT54CW_SOT323-3

R24

+LCDVDD_R

1

2

3

ENVDD

12

R25

90.9K_0201_1%

@

1 2

0_0603_5%

2

1

C760

@

0.33U_0201_6.3V6M

LCD VDD POWER

+3VALW

1

C37

1U_0201_6.3V6M

2

DVT1_18

D D

LCD_VCC_TEST_EN(58)

ENVDD_PCH(6)

ENVDD

EVT2_29

eDP BackLight Power

DVT1_38

B+

1

C1224

0.1U_0402_25V7K

2

EN_INVPWR(58)

C C

100K_0201_5%

12

2

R29

12

R231 1M_0402_5%

EN_INVPWR_R

12

R30

100K_0402_5%

Q16A

L2N7002DW1T1G_SC88-6

1 6

DVT1.2_07

R87 0.01_0603_1%@

1 2

S TR AO6405 1P TSOP6

D

S

4 5

Q15

G

3

+INV_PWR_SRC_R

6

60mil60mil

2 1

@

1

12

C87

C1223

2

0.1U_0402_25V6 10U_0603_25V6M

@

12

R633 0_0201_5%

L2N7002DW1T1G_SC88-6

DVT1_69

+INV_PWR_SRC

F3

21

3A_32V_F0603FA3000V032T

R931 2.1K_0402_1%

12

5

Q16B

Discharge circuit

R932 2.1K_0402_1%

12

4 3

BackLight PWM Control

EVT1_03

D2

PANEL_BKEN_EC(58)

PANEL_BKLEN(6,10)

BIA_PWM_EC(58)

EDP_BIA_PWM(6)

2

3

BAT54CW_SOT323-3

D3

2

3

BAT54CW_SOT323-3

1

1 2

1

12

DISPOFF#

R31 100K_0201_5%

BIA_PWM

R32

10K_0201_5%

DVT1_76

2

C761

0.33U_0201_6.3V6M

1

2

DISPOFF# (11)

@

C750

680P_0402_50V7K

DVT1_16

+LCDVDD+LCDVDD

1

2

+LCDVDD

1

2

4

C41 10U_0402_6.3V6M

C38

0.1U_0201_10V6K

3

2

1

eDP Conn

EVT2_14

C1 0.1U_0201_10V6K

EDP_TXP0(6)

EDP_TXN0(6)

EDP_TXP1(6)

EDP_TXN1(6)

EDP_TXP2(6)

EDP_TXN2(6)

EDP_TXP3(6)

EDP_TXN3(6)

EDP_AUXP(6)

EDP_AUXN(6)

1 2

C2 0.1U_0201_10V6K

1 2

C3 0.1U_0201_10V6K

1 2

C4 0.1U_0201_10V6K

1 2

C5 0.1U_0201_10V6K

1 2

C6 0.1U_0201_10V6K

1 2

C7 0.1U_0201_10V6K

1 2

C8 0.1U_0201_10V6K

1 2

C9 0.1U_0201_10V6K

1 2

C10 0.1U_0201_10V6K

1 2

DVT1_38

+LCDVDD +3VS_TS

0.1U_0201_10V6K

1

C46

2

33P_0402_50V8J

10U_0402_10V6M

1

C48

C47

2

RF@

0.1U_0201_10V6K

1

2

+INV_PWR_SRC

15P_0201_50V8J

1

C451

C452

2

EDP_TXP0_CONN

EDP_TXN0_CONN

eDP* Bit Rates 8.1 Gb/s (HBR3) In TCON side , RX Equalization is CTLE + DFE

EDP_TXP1_CONN

EDP_TXN1_CONN

DBC_EN(10)

RH622 0_0201_5%

EDP_TXP2_CONN

EDP_TXN2_CONN

EVT1_11

TP@

LCD_TST(58) EDP_HPD(6,58) SOLC(58)

BIA_PWM

TP115PAD~50 TP116PAD~50 TP117PAD~50 TP118PAD~50 TP119PAD~50 TP120PAD~50 TP121PAD~50 TP122PAD~50 TP123PAD~50 TP124PAD~50 TP125PAD~50 TP126PAD~50 TP127PAD~50 TP128PAD~50

TOUCH_SCREEN_PD#_R(11)

DBC_EN_R

1

LCD_TST

1

EDP_HPD

1 1

SOLC

1

DISPOFF# BIA_PWM_R

1

TS_I2C_SDA_R

1

TS_I2C_SCL_R

1

TOUCH_SCREEN_PD#_R

1

TS_INT#

1

TS_RST#

1 1 1 1

EDP_TXP3_CONN

EDP_TXN3_CONN

EDP_AUXP_CONN

EDP_AUXN_CONN

0.1U_0402_25V6

1

C58

@EMI@

2

0.1U_0402_25V6

1

C52

2

EVT2_13 For factory test request

TP@ TP@ TP@ TP@ TP@ TP@ TP@ TP@ TP@ TP@ TP@ TP@ TP@ TP@

1U_0603_25V6K

12

C50

C49

EMI@

1 2

LV1 BLM15PX221SN1D_2P

TS_INT#(6)

TS_RST#(10)

EVT1_11

TP@

+3VS_TS

+LCDVDD

+INV_PWR_SRC

DFE=Decision feedback equalizer CTLE=Continuous Time Linear Equalizer

@

1 2

TP113PAD~50

1

TOUCH_SCREEN_PD#_R

TP114PAD~50

1

+3VS_TS

+LCDVDD

+INV_PWR_SRC

EVT1_10

DBC_EN_R

EDP_TXN3_CONN EDP_TXP3_CONN

EDP_TXN2_CONN EDP_TXP2_CONN

EDP_TXN1_CONN EDP_TXP1_CONN

EDP_TXN0_CONN EDP_TXP0_CONN

EDP_AUXP_CONN EDP_AUXN_CONN

I2C_SDA_EDP LCD_TST EDP_HPD SOLC DISPOFF# BIA_PWM_R

TS_I2C_SDA_R TS_I2C_SCL_R

TS_INT# TS_RST#

I2C_SCK_EDP

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

I-PEX_20879-040E-01

DVT1_39

JEDP1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

CONN@

GND_1 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8

GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 GND_33 GND_34

41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

EVT2_12

B B

+3VS_TS

12

2200P_0402_50V7K

12

2200P_0402_50V7K

12

2

B

CV633

R652 0_0201_5%@

2

B

CV651

B+

3

E

QV18 LMBT3906N3T5G_SOT883-3

C

1

DVT1_24

47K_0201_5%

R627

1 2

BL_PWR_MONITOR

LMBT3904N3T5G_SOT883-3

12

3

E

QV20 LMBT3906N3T5G_SOT883-3

C

1

DVT1_24

47K_0201_5%

R628

1 2

LCDVDD_MONITOR

LMBT3904N3T5G_SOT883-3

2

B

E

QV19

DVT1_25

+3VALW

C

3 1

QV21

+LCDVDD

2

B

12

PANEL_PWRGD

C

E

3 1

R658

100K_0201_5%

1M_0201_5%

12

R677

R651 0_0201_5%@

0.1U_0201_10V6K

C418

1

2

12

PANEL_MONITOR (58)

For BL_PWR_SRC & LCDVDD monitor

+INV_PWR_SRC

2 1

0.1U_0201_25V6K

12

C419

DV11

RB751S40T1G_SOD523-2

+LCDVDD

A A

12

0.1U_0201_25V6K

C420

2 1

DV12

RB751S40T1G_SOD523-2

R621

10K_0201_5%

200K_0201_5%

12

R622

10K_0201_5%

200K_0201_5%

12

R624

R623

DVT1_25

5

4

TS_I2C_SCL_R TS_I2C_SDA_R TS_RST# TS_INT#

TS_I2C_SCL_R TS_I2C_SDA_R

TS_INT#

TS_RST#

TOUCH_SCREEN_PD#_R

3

R239 2.2K_0201_1%

1 2

R238 2.2K_0201_1%

1 2

R245 100K_0201_5%

1 2

R288 100K_0201_5%

1 2

R1015 0_0201_5%@ R1016 0_0201_5%@

12 12

D465

21

PESD5V0H1BSF_SOD962-2-2

EMI@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

21

EMI@

TS_I2C_SCL (10)

TS_I2C_SDA (10)

D466

PESD5V0H1BSF_SOD962-2-2

2014/09/08 2013/10/28

21

PESD5V0H1BSF_SOD962-2-2

EMI@

D471

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

P038 - eDP,Touch Screen

LA-G172P

1

38 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

For factory test requestEVT2_11

TP@ TP@ TP@ TP@ TP@ TP@ TP@ TP@ TP@ TP@ TP@

D D

TP@ TP@

TP@

TP132P AD~50 TP133P AD~50 TP134P AD~50 TP135P AD~50 TP136P AD~50 TP137P AD~50 TP138P AD~50 TP139P AD~50 TP140P AD~50 TP141P AD~50 TP142P AD~50 TP143P AD~50 TP144P AD~50

TP145P AD~50

I2C_3_SCL_UFCAM_R

1

I2C_3_SDA_UFCAM_R

1

ISH_I2C1_SCL_R

1

ISH_I2C1_SDA_R

1

UFCAM_LED_R

1

UFCAM_RESET#_R

1

ALS_ALERT#_R

1

UFCAM_MCLK_R

1

ACC1_INT1#

1

ACC1_INT2#

1 1 1 1

CAM_DET#_R

1

+CAM_PWR

+DVDD_MIC

+3VS_MID

DVT1_59

+3VS +3VS_MID

F5

21

0.5A_65V_T0603FF0500TM

UF Camera HD (720p) ALS Accelerometer+Gyro Ecompass DMIC

EVT1_12

EVT2_10

UFCAM_RESET# I2C_3_SDA_UFCAM_R I2C_3_SCL_UFCAM_R

EVT1_14

MCSI_E_DP0 MCSI_E_DN0

MCSI_E_CLKP MCSI_E_CLKN

D444

C C

21

PESD5V0H1BSF_SOD962-2-2

@EMI@

D445

21

PESD5V0H1BSF_SOD962-2-2

@EMI@

D446

21

PESD5V0H1BSF_SOD962-2-2

@EMI@

D447

21

PESD5V0H1BSF_SOD962-2-2

@EMI@

D448

21

PESD5V0H1BSF_SOD962-2-2

@EMI@

D449

21

@EMI@

21

PESD5V0H1BSF_SOD962-2-2

@EMI@

Camera vendor detect

0 = Liteon

1 = Azurewave

I2C_3_SCL_UFCAM(10)

D450

PESD5V0H1BSF_SOD962-2-2

I2C_3_SDA_UFCAM(10)

DVT1_59

ISH_I2C1_SCL(10) ISH_I2C1_SDA(10)

CAM_DET#(10)

UFCAM_RESET#(10)

ALS_ALERT#(10)

+CAM_PWR

+DVDD_MIC

EVT1_14

R6114 0_0201_5%@

1 2

R6115 0_0201_5%@

1 2

R6116 0_0201_5%@

1 2

R6117 0_0201_5%@

1 2

R6208 100K_0201_5%

1 2

R6142 0_0201_5%@

1 2

R6118 0_0201_5%@

1 2

R6141 0_0201_5%@

UFCAM_MCLK(13)

1 2

+3VS_MID

MCSI_E_CLKP(13) MCSI_E_CLKN(13)

MCSI_E_DP0(13) MCSI_E_DN0(13)

DMIC_CLK12(56)

DMIC_DATA12(56)

ACC1_INT1#(10) ACC1_INT2#(10)

MCSI_E_CLKP MCSI_E_CLKN

MCSI_E_DP0 MCSI_E_DN0

DMIC_CLK12 DMIC_DATA12

I2C_3_SCL_UFCAM_R I2C_3_SDA_UFCAM_R

ISH_I2C1_SCL_R ISH_I2C1_SDA_R CAM_DET#_R UFCAM_LED_R UFCAM_RESET#_R ALS_ALERT#_R UFCAM_MCLK_R

ACC1_INT1# ACC1_INT2#

JUFC1

1

2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

I-PEX_20879-030E-01

CONN@

GND_1

2

GND_2

3

GND_3

4

GND_4

5

GND_5

6

GND_6

7

GND_7

8

GND_8

9

GND_9

10

GND_10

11

GND_11

12

GND_12

13

GND_13

14

GND_14

15

GND_15

16

GND_16

17

GND_17

18

GND_18

19

GND_19

20

GND_20

21

GND_21

22

GND_22

23

GND_23

24

GND_24

25

GND_25

26

GND_26 27 28 29 30

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

DVT1_40

EVT1_24

+3VS

ALS_ALERT#

R615710K_0201_5%

12

+1.8VS

R61282.2K_0201_5%

Camera module

B B

A A

LED control

+5VALW

UFCAM_LED(12)

EVT1_04

R6207 0_0201_5%@

1 2

1 3

D

12

R709 10K_0201_5%

QC1 PJQ1900_DFN3L

G

2

12

R61292.2K_0201_5%

12

R710 680_0201_5%

S

DVT1_44

I2C_3_SDA_UFCAM_R I2C_3_SCL_UFCAM_R

1 2

UFCAM_LED_R

Bypass cap close to CONN

+3VS

CC17

1

2

+DVDD_MIC

C1540

1U_0201_6.3V6M

1

2

0.1U_0201_10V6K

+CAM_PWR

1

C1539

2

DVT1_18

0.1U_0201_10V6K

Intel DMIC for WOV reserved

R6205 0_0201_5%@

1 2

+1.8V_PRIM

R6206 0_0201_5%@

+DVDD

R636 0_0201_5%@

1 2

PCH_DMIC_DATA12(10)

PCH_DMIC_CLK12(10)

R655 0_0402_5%@

1 2

R634 0_0402_5%@

1 2

F1

21

0.5A_65V_T0603FF0500TM

+DVDD_MIC+3V_PRIM

12

DMIC_DATA12

R618

@

10K_0201_5%

DMIC_CLK12

+5VS_AUDIO

R612

@

1 2

PVT_08

0.1U_0201_16V6K

0.01_0402_1% C635

1

2

@

10U_0402_10V6M

C625

1

2

@

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P039 - UF Camera,MIC,ALS

LA-G172P

1

39 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P040 - Reserve

LA-G172P

1.0 (A00)

40 101Friday, May 24, 2019

1

40 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P041 - Reserve

LA-G172P

1.0 (A00)

41 101Friday, May 24, 2019

1

41 101Friday, May 24, 2019

Vinaﬁx.com

5

4

3

2

1

+TBT_VBUS_L

TP110

EVT1_07 EVT1_07

CT338

D D

+3VALW

+3.3V_BAT_LDO

+5VALW

RPD84 0_0402_5%@

1 2

RPD114

1 2

RPD121 0_1206_5%@

1 2

@

+VIN_3V3_L_TBT

EVT2_40

0_0201_5%

+5VALW_L_TBT

EMI@

2200P_0201_25V7K

DVT2_14

EVT1_08

RPD187 0_0201_5%@

PD_L_USB_MUX1_EN(50)

TCP0_RST#(46)

PD_TCP0_LS_EN(47)

I2C3_PD_L_CLK_R(46) I2C3_PD_L_DAT_R(46) I2C3_PD_L_INT#_R(46)

PD_L_DDM_MUX1_EN(50)

PD_L_R_PROCHOT#(44,82) MUX_L_FLIP#(50)

RT_FORCE_PWR(13,44,46,48)

PD_R_SLAVE_IN(44)

PD_L_SLAVE_IN(44)

PVT_07

DVT1_51

RPD19810K_0201_5% @

12

RPD19710K_0201_5% @

12

RPD19610K_0201_5% @

12

RPD18310K_0201_5% @

12

RPD12910K_0201_5%

12

RPD17010K_0201_5%

12

RPD18910K_0201_5%

12

RPD190100K_0201_5%

12

RPD191100K_0201_5%

12

RPD1691M_0201_5% @

12

RPD128100K_0201_5% @

12

I2C3 on TGL

I2C3_PD_L_CLK_R

I2C3_PD_L_DAT_R

I2C3_PD_L_INT#_R

PD_L_PROCHOT#

MUX_L_FLIP#

TCP0_RST#

PD_L_SINK_ARB_SLAVE_IN

PD_L_USB_MUX1_EN_R

PD_L_DDM_MUX1_EN_R

TCP0_RST#

MUX_L_FLIP#

C C

+VCC3V3_TBT_L_LDO

EVT1_08

I2C3_PD_L_CLK_R I2C3_PD_L_DAT_R I2C3_PD_L_INT#_R I2C3_PD_L_INT#

1 2

RPD124 0_0201_5%@

1 2

RPD126 0_0201_5%@

1 2

RPD194 0_0201_5%@

1 2

RPD142 0_0201_5%@

1 2

RPD155 0_0201_5%@

1 2

RPD185 0_0201_5%@

1 2

RPD127 0_0201_5%@

1 2

RPD123 0_0201_5%@

1 2

RPD130 0_0201_5%@

1 2

RPD174 0_0201_5%@

1 2

RPD172 0_0201_5%@

1 2

RPD152 0_0201_5%@

1 2

RPD153 0_0201_5%@

1 2

RPD154 0_0201_5%@

1 2

Pin 45,46,47 In TPS65987DH need to connect to GND

EVT1_08

Reserved for debug

B B

PD_L_GPIO18 PD_L_GPIO19 PD_L_GPIO17 PD_L_GPIO4

RPD204 0_0201_5%@

1 2

RPD139 0_0201_5%@

1 2

RPD141 0_0201_5%@

1 2

PD_L_GPIO2 PD_L_GPIO16

DVT1_14

TP@

PAD~D

1

CT340

CT339

2

EMI@

0.01U_0201_25V6K

+VIN_3V3_ L_TBT

+VCC3V3 _TBT_L_LDO +VCC1V8 _TBT_L_LDO

BUSPOWER I2C Address

EVT2_39

1

CT341

CT318

2

0.1U_0201_25V6K

+5VALW _L_TBT

1U_0402_25V6K

100P_0201_50V8J

EMI@

20V/3.5A 3.5A

5V/3.5A

3V/25 mA

ADCIN1_L_PD ADCIN2_L_PD

PD_L_USB_MUX1_EN_R TCP0_RST#_R PD_L_GPIO2 PD_TCP0_LS_EN_R PD_L_GPIO4 I2C3_PD_L_CLK I2C3_PD_L_DAT

PD_L_PROCHOT# MUX_L_FLIP#_RMUX_L_FLIP# PD_L_DDM_MUX1_EN_R RT_L_FORCE_PWR PD_L_SINK_ARB_MASTER_OUT PD_L_SINK_ARB_SLAVE_IN

EMI@

1 2

HCB2012KF-800T50_2P

EMI@

1 2

HCB2012KF-800T50_2P

2

CT34

1

EMI@

10U_0603_25V6M

PD_L_GPIO17 PD_L_GPIO16

UPD1

11

PP_HV1_1

12

PP_HV1_2

1

PP_HV2_1

2

PP_HV2_2

25

PP1_CABLE

5

VIN_3V3

9

LDO_3V3

35

LDO_1V8

6

ADCIN1

10

ADCIN2

16

GPIO0

17

GPIO1

18

GPIO2

30

HPD1(GPIO3)

31

GPIO4

21

GPIO5

22

GPIO6

23

GPIO7

40

GPIO12

41

GPIO13

42

GPIO14(PWM)

43

GPIO15(PWM)

54

GPIO20

55

GPIO21

20

GND_1

45

GND_4

46

GND_5

47

GND_6

51

GND_2

59

GND_3

SA0000CM71L

SN1806026RSHR VQFN 56P

LT11

LT13

48

GPIO16(PEXT1)49GPIO17(PEXT2)

@

1

CT319

CT342

2

EMI@

1U_0402_25V6K

2200P_0201_25V7K

VBUS2_1 VBUS2_2

VBUS1_1 VBUS1_2

C1_CC1 C1_CC2

C1_USB_P(GPIO18) C1_USB_N(GPIO19)

I2C1_SCL

I2C1_SDA

I2C1_IRQ

I2C2_SCL

I2C2_SDA

I2C2_IRQ

SPI_MISO(GPIO8) SPI_MOSI(GPIO9)

SPI_CLK(GPIO10)

SPI_SS(GPIO11)

HRESET

DRAIN1_1 DRAIN1_2 DRAIN1_3 DRAIN1_4

DRAIN2_1 DRAIN2_2 DRAIN2_3 DRAIN2_4

1

CT344

CT343

2

EMI@

1000P_0201_50V7K

3 4

13 14

24 26

50 53

27 28 29

32 33 34

36 37 38 39

44

PD_L_DRAIN1

8 15 19 58

PD_L_DRAIN2 TBT_L_CC1

7 52 56 57

EVT2_38

PVT_14

BUSPOWER Config BP_NoWait value 0.7~0.78

+VCC3V3 _TBT_L_LDO

12

R1

ADCIN1_L_PD

12

R2

+TBT_VBUS_L_PD

1

CT345

2

EMI@

100P_0201_50V8J

0.1U_0201_25V6K

TBT_L_CC1 TBT_L_CC2

PD_L_GPIO18 PD_L_GPIO19

I2C1_PD_L_CLK I2C1_PD_L_DAT I2C1_PD_L_INT#

I2C2_PD_L_CLK I2C2_PD_L_DAT I2C2_PD_L_INT#

PD_EE_MISO_L PD_EE_MOSI_L PD_EE_CLK_L PD_EE_CS#_L

HRESET_L_PD

RPD92

100K_0201_1%

RPD91 300K_0201_1%

1

CT346

2

EMI@

1U_0402_25V6K

TBT_L_CC1 (43) TBT_L_CC2 (43)

DVT1_14

RPD88 0_0201_5%@

DVT1_09

12

RT150

1M_0201_1%

@EMI@

Close pin 3,4 Close pin 13 ,14

CPD42

1U_0402_25V6K

EVT1_18

I2C Port 1 to System Control

I2C Port 2 to Thunderbolt Con troller

1 2

+TBT_VB US_L_PD

1

2

+TBT_VB US_L_PD+CHG_VIN_ 20V

12

JDB1

GND1 GND2

ACES_50521-01041-P01

CONN@

EVT1_01

1

CPD49

1U_0402_25V6K

2

D461

ESD@

LMBR4010H3T5G DFN-1608

DVT2_05

+VCC3V3_TBT_L_LDO

1

PD_EE_CLK_L

2

PD_EE_MOSI_L

3

PD_EE_MISO_L

4

PD_EE_CS#_L

5

6

I2C1_PD_L_CLK

7

I2C1_PD_L_DAT

8

I2C2_PD_L_CLK

9

I2C2_PD_L_DAT

10

11 12

PVT_11

+CHG_VIN_ 20V +5VALW _L_TBT+VIN_3V3_ L_TBT

1

CPD5 10U_0402_10V6M

2

1

CPD40 10U_0603_35V6M

2

+VCC1V8 _TBT_L_LDO+VCC3V3 _TBT_L_LDO

1

CPD4 10U_0402_10V6M

2

Close pin 35Close pin 9

1

CPD6

4.7U_0402_6.3V6M

2

EVT2_44

+VCC3V3_TBT_L_LDO

RPD11 3.3K_0201_5%

1 2

RPD12 3.3K_0201_5%

1 2

RPD13 3.3K_0201_5%

1 2

RPD14 3.3K_0201_5%

1 2

RPD181 10K_0201_5%@

1 2

PD_EE_CS#_L PD_EE_MISO_L PD_EE_WP#_L

UPD3

1

/CS

2

DO(IO1)

3 4

/HOLD(IO3) /WP(IO2) GND

thermal pad

W25Q64JVZPIQ_WSON8_6X5

Left PD Controller SPI FLASH

TBT_L_CC2

I2C1_PD_L_CLK I2C1_PD_L_DAT I2C1_PD_L_INT#

I2C2_PD_L_CLK I2C2_PD_L_DAT I2C2_PD_L_INT#

RPD163 0_0201_5%@ RPD164 0_0201_5%@ RPD17 0_0201_5%@

RPD21 0_0201_5%@ RPD22 0_0201_5%@ RPD112 0_0201_5%@

I2C Address Divider:010b

+VCC3V3 _TBT_L_LDO

12

RPD90

R1

ADCIN2_L_PD

R2

100K_0201_1%

12

RPD100

100K_0201_1%

1

CPD47 10U_0603_35V6M

2

1

CPD7 10U_0402_10V6M

2

PVT_04

PD_EE_CS#_L PD_EE_MISO_L PD_HOLD#_L PD_EE_WP#_L PD_EE_MISO_L

+VCC3V3_TBT_L_LDO +VCC3V3_TBT_L_LDO

8

VCC

CLK

DI(IO0)

7 6 5 9

PD_HOLD#_L PD_EE_CLK_L PD_EE_MOSI_L

(36) PD_EE_MISO:

'0' - SPI-less

'1' - SPI

DVT1_13

CPD3 220P_0201_25V6K

1 2

CPD2 220P_0201_25V6K

1 2

1 2 1 2 1 2

UPD_SMBCLK_Q (44,50,58) UPD_SMBDAT_Q (44,50,58 ) UPD_L_SMBINT# (58 )

SML1_SMBCLK (9,44,46,48) SML1_SMBDATA (9,44,46,48) TBT_I2C_INT# (11,44,46,48 )

Close pin 25Close pin 5 Close pin 11,12 C lose pin 1,2

1

CPD8 22U_0603_10V6M

2

1

CPD1

0.1U_0201_10V6K

2

EVT2_45

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

P042 - TYPE-C Port L_PD

LA-G172P

1

42 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

LEFT Type-C Connector

CT347

EVT2_08

+TBT_VBUS_L

1 2

+TBT_VBUS_L

AZ4520-01F.R7G_DFN1610P2E2

12

D459

ESD@

DVT1_23

EVT1_26

DVT1_02

EVT2_08

D D

CT30 0.22U_0201_6.3V6M

TBT_0_TTX_CD_DRX_P0(46) TBT_0_TTX_CD_DRX_N0(46)

TBT_0_TTX_CD_DRX_P1(46) TBT_0_TTX_CD_DRX_N1(46)

1 2

CT31 0.22U_0201_6.3V6M

1 2

CT32 0.22U_0201_6.3V6M

1 2

CT33 0.22U_0201_6.3V6M

1 2

EVT1_05

TBT_0_TTX_C_DRX_P0 TBT_0_TTX_C_DRX_N0

TBT_0_TTX_C_DRX_P1 TBT_0_TTX_C_DRX_N1

TBT_0_TRX_RT_DTX_N1(46) TBT_0_TRX_RT_DTX_P1(46)

EVT2_08

TBT_L_CC1(42)

TBT_0_SBU1(46)

EVT1_18 EVT1_18

TBT_0_TTX_C_DRX_P0 TBT_0_TTX_C_DRX_N0

CT310

0.1U_0201_25V6K

TBT_L_CC1

SW_TBT_L_USB20_P1_R SW_TBT_L_USB20_N1_R

TBT_0_SBU1

CT312

0.1U_0201_25V6K

TBT_0_TRX_RT_DTX_N1 TBT_0_TRX_RT_DTX_P1

+TBT_VBUS_L +TBT_VBUS_L

1 2

JUSBC1_GND

EVT2_22

JUSBC1

A1

GND_1

A2

SSTXp1

A3

SSTXn1

A4

VBUS_1

A5

CC1

A6

Dp1

A7

Dn1

A8

SBU1

A9

VBUS_2

A10

SSRXn2

A11

SSRXp2

A12

GND_2

1

GND_5

2

GND_7

3

GND_9

4

GND_11

FOX_UT12123-10001-7H CONN@

TOP

10U_0603_25V6M

B12

GND_4

B11

SSRXp1

B10

SSRXn1

B9

VBUS_4

B8

SBU2

B7

Dn2

B6

Dp2

B5

CC2

B4

VBUS_3

B3

SSTXn2

BOTTOM

SSTXp2

GND_3

GND_6

GND_8 GND_10 GND_12

B2

B1

5 6 7 8

TBT_0_TRX_RT_DTX_P0 TBT_0_TRX_RT_DTX_N0

TBT_0_SBU2

SW_TBT_L_USB20_N2_R SW_TBT_L_USB20_P2_R

TBT_L_CC2

TBT_0_TTX_C_DRX_N1 TBT_0_TTX_C_DRX_P1

JUSBC1_GND

CT313

12

0.1U_0201_25V6K

CT311

12

0.1U_0201_25V6K

EVT2_08

TBT_0_TRX_RT_DTX_P0 (46) TBT_0_TRX_RT_DTX_N0 (46)

TBT_0_SBU2 (46)

TBT_L_CC2 (42)

EVT1_18

12

C C

EMI@

0.1U_0201_25V6K

CT35

1

2

LT1

EMI@

HCB2012KF-800T50_2P

TBT_0_SBU1 TBT_0_SBU2JUSBC1_GND

@

100P_0201_50V8J

CT206

12

1

RT118

@

1M_0201_1%

2

CT207

@

100P_0201_50V8J

12

1

RT119

@

1M_0201_1%

2

PVT_05

ML6

EMI@

SW_TBT_L_USB20_N1(50)

SW_TBT_L_USB20_P1(50)

B B

SW_TBT_L_USB20_N2(50)

SW_TBT_L_USB20_P2(50)

1 2

HCM1012GH900BP_4P

ML7

EMI@

1 2

HCM1012GH900BP_4P

34

SW_TBT_L_USB20_N1_R

SW_TBT_L_USB20_P1_R

SW_TBT_L_USB20_N2_R

SW_TBT_L_USB20_P2_R

TBT_0_TTX_C_DRX_P0

TBT_0_TTX_C_DRX_N0

TBT_0_TRX_RT_DTX_P0

TBT_0_TRX_RT_DTX_N0

EVT2_08

D75

ESD@

PESD5V0H1BSF_SOD962-2-2

D77

ESD@

PESD5V0H1BSF_SOD962-2-2

D79

ESD@

PESD5V0H1BSF_SOD962-2-2

D81

ESD@

PESD5V0H1BSF_SOD962-2-2

ESD Diodes should be located as close as possible to USBC.

D408

D76

ESD@

21

PESD5V0H1BSF_SOD962-2-2 D78

ESD@

21

PESD5V0H1BSF_SOD962-2-2 D80

ESD@

21

PESD5V0H1BSF_SOD962-2-2 D82

ESD@

21

PESD5V0H1BSF_SOD962-2-2

TBT_0_TTX_C_DRX_P1

21

TBT_0_TTX_C_DRX_N1

21

TBT_0_TRX_RT_DTX_P1

21

TBT_0_TRX_RT_DTX_N1

21

SW_TBT_L_USB20_P1_R SW_TBT_L_USB20_N1_R

TBT_L_CC1 TBT_0_SBU1

D407

ESD@

21

PESD5V0H1BSF_SOD962-2-2

D409

ESD@

21

PESD5V0H1BSF_SOD962-2-2

D411

ESD@

21

PESD5V0H1BSF_SOD962-2-2

D413

ESD@

21

PESD5V0H1BSF_SOD962-2-2

ESD@

21

PESD5V0H1BSF_SOD962-2-2 D410

ESD@

SW_TBT_L_USB20_N2_RSW_TBT_L_USB20_P2_R

21

PESD5V0H1BSF_SOD962-2-2

D412

ESD@

21

PESD5V0H1BSF_SOD962-2-2

D414

ESD@

TBT_L_CC2TBT_0_SBU2

21

PESD5V0H1BSF_SOD962-2-2

EVT1_18

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet of

Compal Electronics, Inc.

P043 - TYPE-C Conn L

LA-G172P

1

1.0 (A00)

43 101Friday, May 24, 2019

Vinaﬁx.com

5

4

3

2

1

100P_0201_50V8J

1

CT355

2

EMI@

+TBT_VBUS_R_PD+TBT_VBUS_R

1

CT356

2

EMI@

1U_0402_25V6K

0.1U_0201_25V6K

EVT1_18

TBT_R_CC1 (45) TBT_R_CC2 (45)

DVT1_14

RPD97 0_0201_5%@

DVT1_09

12

1

RT151

2

1M_0201_1%

Close pin 3,4 Close pin 13,14

@EMI@

I2C Port 1 to System Control

I2C Port 2 to Thunderbolt Con troller

1 2

+TBT_VBUS_R_PD

1

CPD41

1U_0402_25V6K

ACES_50521-01041-P01

JDB2

CONN@

GND1 GND2

2

1

2

3

4

5

6

7

8

9

10

11 12

EVT1_02

1

CPD51

1U_0402_25V6K

2

+TBT_VBUS_R_PD

12

D462

ESD@

LMBR4010H3T5G DFN-1608

+VCC3V3_TBT_R_LDO

PD_EE_CLK_R PD_EE_MOSI_R PD_EE_MISO_R PD_EE_CS#_R

I2C1_PD_R_CLK I2C1_PD_R_DAT I2C2_PD_R_CLK I2C2_PD_R_DAT

DVT2_05

PVT_11

1

CP10 10U_0402_10V6M

2

1

CPD14 10U_0402_10V6M

2

+CHG_VIN_20V +5VALW B_R_TBT+VIN_3V3_R_TBT

+VCC1V8_TBT_R_L DO+V CC3V3_TBT_R_LDO

EVT2_44

+VCC3V3_TBT_R_LDO

PD_EE_CS#_R PD_EE_MISO_R PD_EE_WP#_R

I2C1_PD_R_CLK I2C1_PD_R_DAT I2C1_PD_R_INT#

I2C2_PD_R_CLK I2C2_PD_R_DAT I2C2_PD_R_INT#

1

CPD19 10U_0603_35V6M

2

1

2

PVT_04

Close pin 35Close pin 9

1

CPD16

4.7U_0402_6.3V6M

2

RPD59 3.3K_0201_5%

1 2

RPD60 3.3K_0201_5%

1 2

RPD61 3.3K_0201_5%

1 2

RPD62 3.3K_0201_5%

1 2

RPD182 10K_0201_5%@

1 2

UPD4

1

/CS

2

DO(IO1)

3 4

/HOLD(IO3) /WP(IO2) GND

thermal pad

W25Q64JVZPIQ_WSON8_6X5

Right PD Controller SPI FLASH

DVT1_13

TBT_R_CC1

CPD12 220P_0201_25V6K

TBT_R_CC2

CPD13 220P_0201_25V6K

RPD165 0_0201_5%@ RPD166 0_0201_5%@ RPD109 0_0201_5%@

RPD105 0_0201_5%@ RPD106 0_0201_5%@ RPD113 0_0201_5%@

CPD48 10U_0603_35V6M

1

CPD17 10U_0402_10V6M

2

(36) PD_EE_MISO:

PD_EE_CS#_R PD_EE_MISO_R PD_HOLD#_R PD_EE_WP#_R PD_EE_MISO_R

+VCC3V3_TBT_R_LDO +VCC3V3_TBT_R_LDO

8

VCC

CLK

DI(IO0)

1 2 1 2

1 2 1 2 1 2

7 6 5 9

PD_HOLD#_R

PD_EE_CLK_R PD_EE_MOSI_R

'0' - SPI-less

'1' - SPI

UPD_SMBCLK_Q (42,50,58) UPD_SMBDAT_Q (42,50,58 )

UPD_R_SMBINT# (58)

SML1_SMBCLK (9,42,46,48) SML1_SMBDATA (9,42,46,48) TBT_I2C_INT# (11,42,46,48 )

Close pin 25Close pin 5 Close pin 11,12 Close pin 1,2

1

CPD18 22U_0603_10V6M

2

1

CPD11

0.1U_0201_10V6K

2

TP111

EVT1_07 EVT1_07

CT348

EMI@

2200P_0201_25V7K

D D

EVT2_40

0_0201_5%

PVT_07

+VIN_3V3_R_TBT

+5VALWB_R_TBT

BUSPOWER I2C Address

RPD188 0_0201_5%@

1 2

RPD132 0_0201_5%@

1 2

RPD134 0_0201_5%@

I2C3_PD_R_CLK_R I2C3_PD_R_DAT_R I2C3_PD_R_INT#_R I2C3_PD_R_INT#

1 2

RPD199 0_0201_5%@

1 2

RPD146 0_0201_5%@

1 2

RPD131 0_0201_5%@

1 2

RPD186 0_0201_5%@

1 2

RPD135 0_0201_5%@

1 2

RPD157 0_0201_5%@

1 2

RPD138 0_0201_5%@

1 2

RPD171 0_0201_5%@

1 2

RPD173 0_0201_5%@

1 2

RPD149 0_0201_5%@

1 2

RPD150 0_0201_5%@

1 2

RPD151 0_0201_5%@

1 2

Pin 45,46,47 In TPS65987DH need to connect to GND

+3VALW

RPD93 0_0402_5%@

+3.3V_BAT_LDO

+5VALWB

1 2

RPD115

1 2

RPD96 0_1206_5%@

1 2

@

DVT2_14

EVT1_08

PD_R_USB_MUX1_EN(50)

TCP2_RST#(48)

PD_TCP2_LS_EN(49)

I2C3_PD_R_CLK_R(48) I2C3_PD_R_DAT_R(48)

I2C3 on TGL

C C

+VCC3V3_TBT_R_LDO

I2C3_PD_R_INT#_R(48)

PD_L_R_PROCHOT#(42,82)

MUX_R_FLIP#(50)

PD_R_DDM_MUX1_EN(50)

RT_FORCE_PWR(13,42,46,48)

PD_L_SLAVE_IN(42) PD_R_SLAVE_IN(42)

EVT1_08

I2C3_PD_R_CLK_R

RPD20310K_0201_5% @

12

RPD20110K_0201_5% @

RPD20210K_0201_5% @

RPD18410K_0201_5% @

RPD13710K_0201_5%

RPD16810K_0201_5%

RPD193100K_0201_5%

RPD192100K_0201_5%

RPD177100K_0201_5%

RPD1671M_0201_5% @

RPD136100K_0201_5% @

I2C3_PD_R_DAT_R

I2C3_PD_R_INT#_R

PD_R_PROCHOT#

MUX_R_FLIP#

TCP2_RST#

PD_R_USB_MUX1_EN_R

PD_R_DDM_MUX1_EN_R

PD_R_SINK_ARB_SLAVE_IN

TCP2_RST#

MUX_R_FLIP#

TP@

PAD~D

1

CT350

CT349

2

0.1U_0201_25V6K

EMI@

0.01U_0201_25V6K

+5VALWB_ R_TBT

5V/3.5A

+VCC3V3_TBT_R_L DO +VCC1V8_TBT_R_L DO

PD_R_USB_MUX1_EN_R TCP2_RST#_R PD_R_GPIO2 PD_TCP2_LS_EN_R PD_R_GPIO4 I2C3_PD_R_CLK I2C3_PD_R_DAT

PD_R_PROCHOT# MUX_R_FLIP#_RMUX_R_FLIP# PD_R_DDM_MUX1_EN_R RT_R_FORCE_PWR PD_R_SINK_ARB_MASTER_OUT PD_R_SINK_ARB_SLAVE_IN

EVT2_39

EMI@

1 2

HCB2012KF-800T50_2P

EMI@

1 2

HCB2012KF-800T50_2P

1

C4227

CT351

2

100P_0201_50V8J

EMI@

+CHG_VIN_20V

20V/3.5A 3.5A

3V/25 mA

ADCIN1_R_PD ADCIN2_R_PD

1

CT37

2

1U_0402_25V6K

10U_0603_25V6M

EMI@

PD_R_GPIO17 PD_R_GPIO16

11 12

1 2

25

5

9

35

6

10

16 17 18 30 31 21 22 23 40 41 42 43 54 55

20 45 46 47 51 59

2

1

UPD2

PP_HV1_1 PP_HV1_2

PP_HV2_1 PP_HV2_2

PP1_CABLE

VIN_3V3

LDO_3V3 LDO_1V8

ADCIN1 ADCIN2

GPIO0 GPIO1 GPIO2 HPD1(GPIO3) GPIO4 GPIO5 GPIO6 GPIO7 GPIO12 GPIO13 GPIO14(PWM) GPIO15(PWM) GPIO20 GPIO21

GND_1 GND_4 GND_5 GND_6 GND_2 GND_3

SA0000CM71L

@

SN1806026RSHR VQFN 56P

LT12

LT14

48

GPIO16(PEXT1)49GPIO17(PEXT2)

C1_USB_P(GPIO18) C1_USB_N(GPIO19)

SPI_MISO(GPIO8) SPI_MOSI(GPIO9)

SPI_CLK(GPIO10)

SPI_SS(GPIO11)

CT325

EMI@

1U_0402_25V6K

VBUS2_1 VBUS2_2

VBUS1_1 VBUS1_2

C1_CC1 C1_CC2

I2C1_SCL

I2C1_SDA

I2C1_IRQ

I2C2_SCL

I2C2_SDA

I2C2_IRQ

HRESET

DRAIN1_1 DRAIN1_2 DRAIN1_3 DRAIN1_4

DRAIN2_1 DRAIN2_2 DRAIN2_3 DRAIN2_4

EVT2_38

PVT_14

1

CT353

CT352

2

EMI@

2200P_0201_25V7K

3 4

13 14

24 26

50 53

27 28 29

32 33 34

36 37 38 39

44

8 15 19 58

7 52 56 57

2

EMI@

1000P_0201_50V7K

TBT_R_CC1 TBT_R_CC2

PD_R_GPIO18 PD_R_GPIO19

I2C1_PD_R_CLK I2C1_PD_R_DAT I2C1_PD_R_INT#

I2C2_PD_R_CLK I2C2_PD_R_DAT I2C2_PD_R_INT#

PD_EE_MISO_R PD_EE_MOSI_R PD_EE_CLK_R PD_EE_CS#_R

HRESET_R_PD

PD_R_DRAIN1

PD_R_DRAIN2

CT354

2

EMI@

EVT1_08

Reserved for debug

PD_R_GPIO18 PD_R_GPIO19 PD_R_GPIO17 PD_R_GPIO4

B B

DVT1_14

RPD205 0_0201_5%@

1 2

RPD144 0_0201_5%@

1 2

RPD147 0_0201_5%@

1 2

PD_R_GPIO2 PD_R_GPIO16

BUSPOWER Config BP_NoWait value 0.7~0.78

+VCC3V3_TBT_R_L DO

12

RPD102

R1

ADCIN1_R_PD

R2

100K_0201_1%

12

RPD101 300K_0201_1%

I2C Address Divider:000b

+VCC3V3_TBT_R_L DO

12

RPD99

R1

ADCIN2_R_PD

R2

100K_0201_1%

12

RPD89 10K_0201_1%

EVT2_45

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

P044 - TYPE-C Port R_PD

LA-G172P

1

44 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

EVT2_08

A

RIGHT Type-C Connector

DVT1_02

EVT2_22

JUSBC2

A1

A10 A11

A12

GND_1

A2

SSTXp1

A3

SSTXn1

A4

VBUS_1

A5

CC1

A6

Dp1

A7

Dn1

A8

SBU1

A9

1 2 3 4

VBUS_2

SSRXn2 SSRXp2

GND_2

GND_5 GND_7 GND_9 GND_11

TOP

TBT_2_TTX_C_DRX_P0

EVT1_18

CT38 0.22U_0201_6.3V6M

TBT_2_TTX_CD_DRX_P0(48) TBT_2_TTX_CD_DRX_N0(48)

TBT_2_TTX_CD_DRX_P1(48) TBT_2_TTX_CD_DRX_N1(48)

1 2

CT39 0.22U_0201_6.3V6M

1 2

CT40 0.22U_0201_6.3V6M

1 2

CT41 0.22U_0201_6.3V6M

1 2

EVT1_06

TBT_2_TTX_C_DRX_P0 TBT_2_TTX_C_DRX_N0

TBT_2_TTX_C_DRX_P1 TBT_2_TTX_C_DRX_N1

TBT_R_CC1(44)

TBT_2_SBU1(48)

TBT_2_TRX_RT_DTX_N1(48) TBT_2_TRX_RT_DTX_P1(48)

TBT_2_TTX_C_DRX_N0

CT314

0.1U_0201_25V6K

SW_TBT_R_USB20_P1_R SW_TBT_R_USB20_N1_R

0.1U_0201_25V6K

TBT_2_TRX_RT_DTX_N1 TBT_2_TTX_C_DRX_N1 TBT_2_TRX_RT_DTX_P1

1 2

TBT_R_CC1

TBT_2_SBU1

CT316

1 2

EVT2_08

JUSBC2_GND

GND_4

SSRXp1 SSRXn1

VBUS_4

SBU2

Dn2 Dp2

CC2

VBUS_3

SSTXn2

BOTTOM

SSTXp2

GND_3

GND_6

GND_8 GND_10 GND_12

B12

B11 B10

B9

B8

B7 B6

B5

B4

B3 B2

B1

5 6 7 8

+TBT_VBUS_R+TBT_VBUS_R

TBT_2_TRX_RT_DTX_P0 TBT_2_TRX_RT_DTX_N0

TBT_2_SBU2

SW_TBT_R_USB20_N2_R SW_TBT_R_USB20_P2_R

TBT_R_CC2

TBT_2_TTX_C_DRX_P1

JUSBC2_GND

CT317

12

0.1U_0201_25V6K

CT315

12

0.1U_0201_25V6K

EVT2_08

TBT_2_TRX_RT_DTX_P0 (48) TBT_2_TRX_RT_DTX_N0 (48)

TBT_2_SBU2 (48)

TBT_R_CC2 (44)

EVT1_18

EVT2_08

+TBT_VBUS_R

12

CT357 10U_0603_25V6M

EMI@

+TBT_VBUS_R

AZ4520-01F.R7G_DFN1610P2E2

12

D460

ESD@

DVT1_23DVT1_22

EVT1_26

EVT1_18

FOX_UT12123-10001-7H CONN@

JUSBC2_GND TBT_2_SBU1

12

CT36

EMI@

0.1U_0201_25V6K

1

2

LT2

EMI@

HCB2012KF-800T50_2P

CT306

@

100P_0201_50V8J

PVT_05

ML16

EMI@

SW_TBT_R_USB20_N1(50)

1 1

SW_TBT_R_USB20_P1(50)

SW_TBT_R_USB20_N2(50)

SW_TBT_R_USB20_P2(50)

1 2

HCM1012GH900BP_4P

ML17

EMI@

1 2

HCM1012GH900BP_4P

34

SW_TBT_R_USB20_N1_R

SW_TBT_R_USB20_P1_R

SW_TBT_R_USB20_N2_R

SW_TBT_R_USB20_P2_R

TBT_2_TTX_C_DRX_P0

TBT_2_TTX_C_DRX_N0

TBT_2_TRX_RT_DTX_P0

TBT_2_TRX_RT_DTX_N0

12

1

RT120

@

1M_0201_1%

2

EVT2_08

D83

ESD@

PESD5V0H1BSF_SOD962-2-2

D85

ESD@

PESD5V0H1BSF_SOD962-2-2

D87

ESD@

PESD5V0H1BSF_SOD962-2-2

D89

ESD@

PESD5V0H1BSF_SOD962-2-2

ESD Diodes should be located as close as possible to USBC.

21

TBT_2_SBU2

100P_0201_50V8J

12

1

CT307

@

2

D84

ESD@

21

PESD5V0H1BSF_SOD962-2-2 D86

ESD@

21

PESD5V0H1BSF_SOD962-2-2 D88

ESD@

21

PESD5V0H1BSF_SOD962-2-2 D90

ESD@

21

PESD5V0H1BSF_SOD962-2-2

RT121

@

1M_0201_1%

TBT_2_TTX_C_DRX_P1

TBT_2_TTX_C_DRX_N1

TBT_2_TRX_RT_DTX_P1

TBT_2_TRX_RT_DTX_N1

SW_TBT_R_USB20_P1_R

SW_TBT_R_USB20_P2_R

TBT_R_CC1

TBT_2_SBU2

D415

ESD@

21

PESD5V0H1BSF_SOD962-2-2

D417

ESD@

21

PESD5V0H1BSF_SOD962-2-2

D420

ESD@

21

PESD5V0H1BSF_SOD962-2-2

D422

ESD@

21

PESD5V0H1BSF_SOD962-2-2

D416

ESD@

SW_TBT_R_USB20_N1_R

21

PESD5V0H1BSF_SOD962-2-2 D418

ESD@

SW_TBT_R_USB20_N2_R

21

PESD5V0H1BSF_SOD962-2-2

D419

ESD@

TBT_2_SBU1

21

PESD5V0H1BSF_SOD962-2-2

D421

ESD@

TBT_R_CC2

21

PESD5V0H1BSF_SOD962-2-2

EVT1_18

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet of

Compal Electronics, Inc.

P045 - TYPE-C Conn R

LA-G172P

45 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

CT1 0.22U_0201_6.3V6M

TBT_0_TTX_DRX_P0(6) TBT_0_TTX_DRX_N0(6)

TBT_0_TRX_DTX_P0(6) TBT_0_TRX_DTX_N0(6)

TBT_0_TTX_DRX_P1(6) TBT_0_TTX_DRX_N1(6)

D D

TBT_0_TRX_DTX_P1(6) TBT_0_TRX_DTX_N1(6)

TBT_0_LSX_TX(6) TBT_0_LSX_RX(6)

TBT_0_DP_AUXP(6) TBT_0_DP_AUXN(6)

1 2

CT2 0.22U_0201_6.3V6M

1 2

CT3 0.22U_0201_6.3V6M

1 2

CT4 0.22U_0201_6.3V6M

1 2

CT5 0.22U_0201_6.3V6M

1 2

CT6 0.22U_0201_6.3V6M

1 2

CT7 0.22U_0201_6.3V6M

1 2

CT8 0.22U_0201_6.3V6M

1 2

RT164 0_0201_5%@

1 2

RT165 0_0201_5%@

1 2

RT112 0_0201_5%@

1 2

RT113 0_0201_5%@

1 2

4

TBT_0_TTX_C_RD_DRX_P0 TBT_0_TTX_C_RD_DRX_N0

TBT_0_TRX_C_RD_DTX_P0 TBT_0_TRX_C_RD_DTX_N0

TBT_0_TTX_C_RD_DRX_P1 TBT_0_TTX_C_RD_DRX_N1

TBT_0_TRX_C_RD_DTX_P1 TBT_0_TRX_C_RD_DTX_N1

TBT_0_LSX_TX_R TBT_0_LSX_RX_R

TBT_0_DP_AUXP_R TBT_0_DP_AUXN_R

URT1D

J1

ASSRXp1

J2

ASSRXn1

G1

ASSTXp1

G2

ASSTXn1

C1

ASSRXp2

C2

ASSRXn2

E1

ASSTXp2

E2

ASSTXn2

M7

PA_LSTX_SBU1

L7

PA_LSRX_SBU2

L8

PA_AUX_P

M8

PA_AUX_N

@

TBT PORTS

Port A - Host Side

3

2

1

EVT2_08

BSSTXp1 BSSTXn1

BSSTXp2 BSSTXn2

BSBU1 BSBU2

J12 J11

G12 G11

C12 C11

E12 E11

M10 L10

BSSRXp1 BSSRXn1

BSSRXp2 BSSRXn2

Port B - TypeC Side

TBT_0_TRX_RT_DTX_P0 (43) TBT_0_TRX_RT_DTX_N0 (43)

TBT_0_TTX_CD_DRX_P0 (43) TBT_0_TTX_CD_DRX_N0 (43)

TBT_0_TRX_RT_DTX_P1 (43) TBT_0_TRX_RT_DTX_N1 (43)

TBT_0_TTX_CD_DRX_P1 (43) TBT_0_TTX_CD_DRX_N1 (43)

TBT_0_SBU1 (43) TBT_0_SBU2 (43)

EVT1_18

PVT_14

TBT_0_LSX_TX_R

TBT_0_LSX_RX_R

BURNSIDE-BRIDGE_BGA105

+3.3V_TBT_L +3VALW

RT222

RT2

@

1M_0201_1%

+3.3V_TBT_L_FLASH_R

RT176 0_0201_5%@

1 2

RT169 0_0201_5%@

1 2

C C

+3.3V_TBT_L_FLASH_R +3.3V_TBT_L_FLASH

RT168 0_0201_5%@

1 2

RT186 0_0201_5%@

1 2

DT1

1N4148WS-L_SOD323-2

12

DVT1_66

JDB3

1

2

3

4 7 8

JXT_FP241AH-006GAAM

B B

TBT_L_ROM_CS# TBT_L_ROM_DO TBT_L_ROM_WP# TBT_L_ROM_HOLD#

TBT_L_ROM_CS# TBT_L_ROM_DO TBT_L_ROM_HOLD# TBT_L_ROM_WP# TBT_L_ROM_CLK

1 2 3 4

UTS1

/CS DO(IO1) /WP(IO2) GND

4 5 6

CONN@

1 2 1 2 1 2 1 2

/HOLD(IO3)

thermal pad

5

6

+3.3V_TBT_L_FLASH

VCC

CLK

DI(IO0)

GND1 GND2

RT20 2.2K_0201_1% RT21 2.2K_0201_1% RT22 3.32K_0201_1% RT23 3.32K_0201_1%

W25Q64JVZPIQ_WSON8_6X5

+3.3V_TBT_L_LC

+VCC3V3_TBT_L_LDO

+3.3V_TBT_L

+3V_PRIM

+3.3V_TBT_L_FLASH

TBT_L_ROM_CLK TBT_L_ROM_DI TBT_L_ROM_DO TBT_L_ROM_CS#

+3.3V_TBT_L_FLASH

8 7 6

TBT_L_ROM_DI

5 9

Follow CSLP

Intel suggestion

A12: DB connect to GND. BB is NC.

RT101 0_0201_5%

DLB@

1 2

RT7

1 2

100_0201_1%

PVT_04

A A

5

RT1

@

1M_0201_1%

1 2

TBT_L_ROM_DI TBT_L_ROM_DO TBT_L_ROM_CS# TBT_L_ROM_CLK

TBT_L_JTAG_TDI TBT_L_JTAG_TMS TBT_L_JTAG_TCK TBT_L_JTAG_TDO

TP6A4

TP@

PAD~D

TBT_L_TEST_PWR_GOOD

TBT_L_THERMDA

1

B3 PD 100 ohm

A1,A2 SDS,CRB is NC

TBT_L_XTAL_25_IN_R

27P_0201_25V8

CT42

M11

M12

A11 A12

L12

B11

C6 B4 B6 C7

A3 C3 B5 C5

B2

B3

A1 A2

1

2

DVT1_35

EVT2_26

Debug

DVT1.2_13

DVT1_49

For BBR-A0 PLL Issue Workaround reserved

TBT_L_JTAG_TCK

DVT1_49

DVT1_80

4

RT218 10K_0201_5%@

DVT1_80

TBT_L_JTAG_TDI TBT_L_JTAG_TCK TBT_L_JTAG_TMS TBT_L_JTAG_TDO

1 2

URT1A

@

EE_DI EE_DO EE_CS# EE_CLK

FLASHJTAG

MISC &

TDI TMS TCK TDO

THERMDA

TEST_EDM FUSE_VQPS_64

MONDC NC_A12 MONDC_SVR

TEST_PWR_GOOD TEST_EN

ATEST_P ATEST_N

BURNSIDE-BRIDGE_BGA105

RT ref p.5 XTAL Recommended FW2500025Z by Pericom XRCGB25M000F3L12R0 by Murata

Suggest adding GND shield across Crystal and 18pF caps for better RFI.

DEBUG

YT1

4

GND_1

1

25MHZ_20PF_FW2500025Z

TBT_L_JTAG_TDI

TBT_L_JTAG_TCK

TBT_L_JTAG_TMS

TBT_L_JTAG_TDO

OUT

GND_2

IN

RT63 10K_0201_5%

1 2

RT64 10K_0201_5%

1 2

RT65 10K_0201_5%

1 2

RT97 10K_0201_5%

1 2

+3.3V_TBT_L

3

2

TP@

POC GPIO

Main

TP45

1

TP46

1

TP47

1

TP48

1

I2C_SCL I2C_SDA

I2C_INT

FORCE_PWR

FLASH_BUSY#

POC_GPIO_5 POC_GPIO_6

PERST#

SMBUS_SCL

SMBUS_SDA POC_GPIO_10 POC_GPIO_11 POC_GPIO_12

NC_L3

RESET#

XTAL_25_IN

XTAL_25_OUT

RSENSE

RBIAS

TBT_L_XTAL_25_OUT_R

1

CT43

27P_0201_25V8

2

PAD~12

+3.3V_TBT_L_LC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

I2C_RT_L_SDA

E7

I2C_RT_L_INT#

A10

RT_FORCE_PWR

B10

TBT_L_FLASH_BUSY#

A9

TBT_L_GPIO_5

B9

TBT_L_GPIO_6

A8

TBT_L_PERST#

B8

TBT_L_SMBCLK

A7

TBT_L_SMBDAT

B7

TBT_L_FLASH_SHARE_EN

A4

TBT_L_FLASH_MSTR_SLV

A5

TBT_L_GPIO_12

A6 L3

POC_GPIO_12 have iPU

TBT_L_RESET#

L11

TBT_L_XTAL_25_IN TBT_L_XTAL_25_IN_R

L9

TBT_L_XTAL_25_OUT

M9

TBT_L_RSENSE

L5

TBT_L_RBIAS

L4

TBT_L_GPIO_5

TBT_L_FLASH_SHARE_EN

TBT_L_FLASH_MSTR_SLV

TBT_L_GPIO_12

RT53 0_0201_5% RT54 0_0201_5%

RT19 4.75K_0402_0.5%

RT_FORCE_PWR (13,42,44 ,48)

1 2 1 2

1 2

RT172 10 K_0201_5%@

1 2

RT13 10K_0201_5%@

1 2

RT16 10K_0201_5%@

1 2

RT18 10K_0201_5%@

1 2

TBT_L_XTAL_25_OUT_R

EVT1_37

TBT_L_GPIO_6

RT_FORCE_PWR

TBT_L_FLASH_BUSY#

RT12 10K_0201_5%

1 2

RT109 10 K_0201_5%@

1 2

RT8 10K_0201_5%

1 2

PVT_09

RT_FORCE_PWR

TBT_L_FLASH_BUSY#

TBT_L_GPIO_5

TBT_L_GPIO_6

TBT_L_FLASH_SHARE_EN

TBT_L_FLASH_MSTR_SLV

TBT_L_GPIO_12

2014/09/08 2013/10/28

RT6 10K_0201_5%

1 2

RT9 10K_0201_5%@

1 2

RT10 100K_0201_5%

1 2

RT11 10K_0201_5%@

1 2

RT14 10K_0201_5%

1 2

RT15 10K_0201_5%@

1 2

RT17 10K_0201_5%@

1 2

Compal Secret Data

Deciphered Date

TBT_L_PERST#

+3.3V_TBT_L

+3VS

+3V_PRIM

2

I2C_RT_L_SCL

C9

10K_0201_5%

1 2

TBT_L_RESET#

RT174 0_0201_5%@

EVT1_10

I2C_RT_L_SCL I2C_RT_L_SDA I2C_RT_L_INT#

TBT_L_SMBCLK TBT_L_SMBDAT

SMBUS: No support Vpro Intel recommended PD 100K

RT212 0_0201_5%@ RT213 0_0201_5%@ RT214 0_0201_5%@

RT124 0_0201_5%@ RT125 0_0201_5%@ RT152 0_0201_5%@

RT159 0_0201_5%@ RT160 0_0201_5%@

RT193 100K_0201_5% RT194 100K_0201_5%

RT59 0_0201_5%@

1 2

RT162 0_0201_5%@

1 2

(L11) DG_P1_RST#:

For PD based systems, DG_P1_RST# should be output from PD.

For TCPC based systems, DG_P1_RST# should be output from SOC/EC.

(B10) FORCE_PWR:Connect to PCH for FW update

'0' - by default

'1' - for debug only

(A9) DG_FLASH_BUSY#:conenction to PU

(A4) DG_FLSH_SHARE_EN (iPU):

'0' - Flash isn't shared. 1 Flash per Re-timer. Can be left NC.

'1' - Flash is shared between 2 Re-timers.

(A5) DG_FLSH_MSTR_SLV (iPU):

'0' - Set Re-timer to be Slave on shared flash SPI I/F.

'1' - Set Re-timer to be Master on shared flash SPI I/F.

(A8) DG_POC_GPIO6:

'0' -Reserved for debug

'1' -Indication to S0 state for Re-timer

Size Doc ument Number Rev

Date: Sheet of

RT223 100K_0201_5%

1 2

G

2

13

D

S

QT1 PJQ1900_DFN3L

1 2

TCP0_RST# (42)

PD I2C3 on TGL

1 2 1 2 1 2

1 2 1 2

I2C3_PD_L_CLK_R (42) I2C3_PD_L_DAT_R (42)

I2C3_PD_L_INT#_R (42)

SML1_SMBCLK (9,42,44,48) SML1_SMBDATA (9,42,44,48)

TBT_I2C_INT# (11,42,44,48)

SML0_SMBCLK (9,48) SML0_SMBDATA (9,48)

DVT1_47

Reserve for TBT RTD3 Support

PCH_TBT_PERST# (10,48)

PCH_PLTRST#_EC (11,48,52,58,66,67,68,70 ,79)

Compal Electronics, Inc.

Title

Compal Electronics, Inc.

P046 - TYPE-C TBT_BB L_TCSS

LA-G172P

1

PCH

1.0 (A00)

46 101Friday, May 24, 2019

Vinaﬁx.com

5

EVT2_41

4

3

2

1

+3.3V_TBT_L_ANA+3.3V_TBT_L_LC

CT58

CT57

1U_0201_6.3V6K

1

D D

2

Place near Pin L2Place near Pin E5

+0.9V_TBT_L_LC+0.9V_TBT_L_LVR

CT60

1U_0201_6.3V6K

CT200

10U_0402_10V6M

1

2

Place near Pin J3

Place near Pin L6,M6

C C

1U_0201_6.3V6K

CT62

1U_0201_6.3V6K

CT63

1U_0201_6.3V6K

CT365

1

2

+3.3V_TBT_L_ANA

+3.3V_TBT_L_LC

EVT2_41EVT2_41

CT59

1U_0201_6.3V6K

1

2

+0.9V_TBT_L_SVR

+0.9V_TBT_L_LC

+0.9V_TBT_L_LVR

URT1B

@

L2

VCC3P3_ANA

E5

VCC3P3_LC

F6

VCC0P9_SVR_ANA_1

G6

VCC0P9_SVR_ANA_2

E3

VCC0P9_SVR_1

G3

VCC0P9_SVR_2

E9

VCC0P9_SVR_PB_ANA_1

G9

VCC0P9_SVR_PB_ANA_2

J3

VCC0P9_LC

L6

VCC0P9_LVR

M6

VCC0P9_LVR_SENSE

BURNSIDE-BRIDGE_BGA105

Power

VCC3P3_SX

VCC3P3_SVR_1 VCC3P3_SVR_2 VCC3P3_SVR_3

VCC3P3A

SVR_IND_1 SVR_IND_2

SVR_VSS_1 SVR_VSS_2

NC_J6

E6

M4 M5 J5 J7

L1 M1

M2 M3

J6

J6: DB connect to GND.

DB connect to +3.3V_TBT_L. BB is NC.

+3.3V_TBT_L_SX

+3.3V_TBT_L_SVR

+3.3V_TBT_L_DB

1 2

RT180

1 2

RT181

1 2

RT203 0_0201_5%DLB@

connect via inductor to VCC0P9_SVR

RT122 0_0201_5%DLB@

1 2

J5:

0_0402_5%@

+3.3V_TBT_L

+3.3VA_TBT_L

+TBT_L_SVR_IND

BB is NC.

+TBT_L_SVR_IND +0.9V_TBT_L_SVR

0.68UH_MLV-YT10NR68N-M1L_2.7A_30%

LT8

1 2

EVT2_41

1

CT491U_0201_6.3V6K

2

1

CT501U_0201_6.3V6K

CT511U_0201_6.3V6K

@

2

1

CT521U_0201_6.3V6K

CT531U_0201_6.3V6K

@

2

1

CT541U_0201_6.3V6K

2

CT5618P_0201_25V8J

CT5547U_0603_6. 3V6M

2

47U_0603_6.3V6M

1

2

Place near Pin M4, M5, J5 GND share with Pin M2, M3

3.3v @ 290mA

+3.3V_TBT_L +3.3VA_TBT_L

RT79 0_0402_5%@

1 2

CT303

1

@

2

Place near Pin J7

3.3v @ 50mA

EVT2_41

+3.3V_TBT_L_SX+3.3V_TBT_L_SVR

CT61

1U_0201_6.3V6K

1

2

Place near Pin E6

3.3v @ 80mA

10U_0402_10V6M

CT302

18P_0201_25V8J

CT64

1U_0201_6.3V6K

1

2

EVT2_41

Place near Pin F6,G6,E3,G3,E9,G9

DVT1_06

GND share with Pin M2, M3

0.9v @ 850mA

DVT1_53

BB ref sch Rev 1.4 change to CAP Place near Pin F6,E3,E9 G3,G6,G9 CAP change to NC

+3VALW

B B

CT361

1U_0201_6.3V6K

RT83 0_0201_5%@

PD_TCP0_LS_EN(42)

SIO_SLP_SUS#(11,16,49,58)

3.3V_TBT_L_EN

1 2

RT84 0_0201_5%@

1 2

RT178 100K_0201_5%

1 2

RT179 10K_0201_5%@

1 2

3.3V_TBT_L_EN

+3VALW

1

+3VALW

2

UT1

1 2

3

4

VOUT_1

VIN_1

VOUT_2

VIN_2

ON

VBIAS

GND_1 GND_2

AOZ1336DI_DFN8_2X2

CT

+3.3V_TBT_L_B

7 8

CT362 470P_0402_50V7K

6

5 9

1 2

LT3 BLM18KG331SN1D_2P

1 2

EMI@

3.3v @ 370mA

+3.3V_TBT_L

2

1

CT363

0.1U_0201_10V6K

URT1C

B1

VSS_ANA_1

B12

VSS_ANA_2

D1

VSS_ANA_3

D2

VSS_ANA_4

D11

VSS_ANA_5

D12

VSS_ANA_6

F1

VSS_ANA_7

F2

VSS_ANA_8

F7

VSS_ANA_9

F9

VSS_ANA_10

F11

VSS_ANA_11

BURNSIDE-BRIDGE_BGA105

@

GND

VSS_ANA_12 VSS_ANA_13 VSS_ANA_14 VSS_ANA_15 VSS_ANA_16 VSS_ANA_17 VSS_ANA_18 VSS_ANA_19 VSS_ANA_20 VSS_ANA_21 VSS_ANA_22

VSS_1 VSS_2 VSS_3

F12 G7 H1 H2 H11 H12 J9 K1 K2 K11 K12

G5 F5 F3

EVT2_34

BB ref sch p.6 note DG_P1_PWR_GATE_EN:

For PD based systems, DG_P1_PWR_GATE_EN should be output from PD.

A A

For TCPC based systems, DG_P1_PWR_GATE_EN should be output from SOC/EC.

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P047 - TYPE-C TBT_BB L_PWR,GND

1.0 (A00)

LA-G172P

47 101Friday, May 24, 2019

1

47 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

CT9 0.22U_0201_6.3V6M

TBT_2_TTX_DRX_P0(6) TBT_2_TTX_DRX_N0(6)

TBT_2_TRX_DTX_P0(6) TBT_2_TRX_DTX_N0(6)

TBT_2_TTX_DRX_P1(6)

D D

TBT_2_TTX_DRX_N1(6)

TBT_2_TRX_DTX_P1(6) TBT_2_TRX_DTX_N1(6)

TBT_2_LSX_TX(6) TBT_2_LSX_RX(6)

TBT_2_DP_AUXP(6) TBT_2_DP_AUXN(6)

1 2

CT10 0.22U_0201_6.3V6M

1 2

CT11 0.22U_0201_6.3V6M

1 2

CT12 0.22U_0201_6.3V6M

1 2

CT13 0.22U_0201_6.3V6M

1 2

CT14 0.22U_0201_6.3V6M

1 2

CT15 0.22U_0201_6.3V6M

1 2

CT16 0.22U_0201_6.3V6M

1 2

RT167 0_0201_5%@

1 2

RT166 0_0201_5%@

1 2

RT116 0_0201_5%@

1 2

RT117 0_0201_5%@

1 2

4

TBT_2_TTX_C_RD_DRX_P0 TBT_2_TTX_C_RD_DRX_N0

TBT_2_TRX_C_RD_DTX_P0 TBT_2_TRX_C_RD_DTX_N0

TBT_2_TTX_C_RD_DRX_P1 TBT_2_TTX_C_RD_DRX_N1

TBT_2_TRX_C_RD_DTX_P1 TBT_2_TRX_C_RD_DTX_N1

TBT_2_LSX_TX_R TBT_2_LSX_RX_R

TBT_2_DP_AUXP_R TBT_2_DP_AUXN_R

URT2D

J1

ASSRXp1

J2

ASSRXn1

G1

ASSTXp1

G2

ASSTXn1

C1

ASSRXp2

C2

ASSRXn2

E1

ASSTXp2

E2

ASSTXn2

M7

PA_LSTX_SBU1

L7

PA_LSRX_SBU2

L8

PA_AUX_P

M8

PA_AUX_N

@

TBT PORTS

Port A - Host Side

3

2

1

EVT2_08

J12

BSSRXp1

J11

BSSRXn1

G12

BSSTXp1

G11

BSSTXn1

C12

BSSRXp2

C11

BSSRXn2

E12

BSSTXp2

E11

BSSTXn2

M10

BSBU1

L10

BSBU2

Port B - TypeC Side

TBT_2_TRX_RT_DTX_P0 (45) TBT_2_TRX_RT_DTX_N0 (45)

TBT_2_TTX_CD_DRX_P0 (45) TBT_2_TTX_CD_DRX_N0 (45)

TBT_2_TRX_RT_DTX_P1 (45) TBT_2_TRX_RT_DTX_N1 (45)

TBT_2_TTX_CD_DRX_P1 (45) TBT_2_TTX_CD_DRX_N1 (45)

TBT_2_SBU1 (45) TBT_2_SBU2 (45)

EVT1_18

PVT_14

TBT_2_LSX_TX_R

TBT_2_LSX_RX_R

BURNSIDE-BRIDGE_BGA105

+3.3V_TBT_R +3VALW

RT224

10K_0201_5%

RT4

@

1M_0201_1%

+3.3V_TBT_R_FLASH_R

RT177 0_0201_5%@

1 2

RT170 0_0201_5%@

1 2

RT171 0_0201_5%@

C C

+3.3V_TBT_R_FLASH_R

1 2

RT187 0_0201_5%@

1 2

DT2

1N4148WS-L_SOD323-2

+3.3V_TBT_R_FLASH

12

DVT1_66

JDB4

1

2

3

4 7 8

JXT_FP241AH-006GAAM

B B

TBT_R_ROM_CS# TBT_R_ROM_DO TBT_R_ROM_WP# TBT_R_ROM_HOLD#

TBT_R_ROM_CS# TBT_R_ROM_DO TBT_R_ROM_WP#

1 2 3 4

4 GND1 GND2

UTS2

5

6

CONN@

RT42 2.2K_0201_1%

1 2

RT43 2.2K_0201_1%

1 2

RT44 3.32K_0201_1%

1 2

RT45 3.32K_0201_1%

1 2

/CS DO(IO1)

/HOLD(IO3) /WP(IO2) GND

thermal pad

W25Q64JVZPIQ_WSON8_6X5

+3.3V_TBT_R_LC

+VCC3V3_TBT_R_LDO

+3.3V_TBT_R

+3V_PRIM

+3.3V_TBT_R_FLASH

TBT_R_ROM_CLK TBT_R_ROM_DI TBT_R_ROM_DO TBT_R_ROM_CS#

+3.3V_TBT_R_FLASH

8

VCC

7 6

CLK

5

DI(IO0)

9

Follow CSLP

Intel suggestion

A12: DB connect to GND. BB is NC.

+3.3V_TBT_R_FLASH

TBT_R_ROM_HOLD# TBT_R_ROM_CLK TBT_R_ROM_DI

RT102 0_0201_5%DLB@

1 2

RT30

1 2

100_0201_1%

PVT_04

A A

5

RT3

@

1M_0201_1%

1 2

TBT_R_ROM_DI TBT_R_ROM_DO TBT_R_ROM_CS# TBT_R_ROM_CLK

TBT_R_JTAG_TDI TBT_R_JTAG_TMS TBT_R_JTAG_TCK TBT_R_JTAG_TDO

TP6A5

TP@

PAD~D

TBT_R_TEST_PWR_GOOD

TBT_R_THERMDA

1

B3 PD 100 ohm

A1,A2 SDS,CRB is NC

C6 B4 B6 C7

A3 C3 B5 C5

M11

M12

B2

A11 A12 L12

B3

B11

A1 A2

TBT_R_XTAL_25_IN_R

27P_0201_25V8

DVT1_35

EVT2_26

Debug

DVT1_49

TBT_R_JTAG_TDI TBT_R_JTAG_TCK TBT_R_JTAG_TMS TBT_R_JTAG_TDO

For BBR-A0 PLL Issue Workaround reserved

TBT_R_JTAG_TCK

DVT1_49

DVT1_80

4

RT219 10K_0201_5%@

URT2A

@

EE_DI EE_DO EE_CS# EE_CLK

FLASHJTAG

MISC &

TDI TMS TCK TDO

THERMDA

TEST_EDM FUSE_VQPS_64

MONDC NC_A12 MONDC_SVR

TEST_PWR_GOOD TEST_EN

ATEST_P ATEST_N

BURNSIDE-BRIDGE_BGA105

CT45

DVT1.2_13

1 2

1

2

DVT1_80

DEBUG

RT ref p.5 XTAL Recommended FW2500025Z by Pericom XRCGB25M000F3L12R0 by Murata

Suggest adding GND shield across Crystal and 18pF caps for better RFI.

25MHZ_20PF_FW2500025Z

TBT_R_JTAG_TDI

TBT_R_JTAG_TCK

TBT_R_JTAG_TMS

TBT_R_JTAG_TDO

FORCE_PWR

FLASH_BUSY#

POC GPIO

POC_GPIO_10 POC_GPIO_11 POC_GPIO_12

DEBUG

YT2

4

GND_1

1

IN

Main

OUT

GND_2

TP@

RT71 10K_0201_5%

1 2

RT98 10K_0201_5%

1 2

RT72 10K_0201_5%

1 2

RT73 10K_0201_5%

1 2

+3.3V_TBT_R

XTAL_25_OUT

3

2

PAD~12

TP49

1

PAD~12

TP51

1

PAD~12

TP50

1

PAD~12

TP52

1

TBT_R_RESET#

I2C_RT_R_SCL

C9

I2C_SCL I2C_SDA

I2C_INT

POC_GPIO_5 POC_GPIO_6

PERST#

SMBUS_SCL

SMBUS_SDA

NC_L3

RESET#

XTAL_25_IN

RSENSE

RBIAS

I2C_RT_R_SDA

E7

I2C_RT_R_INT#

A10 B10

TBT_R_FLASH_BUSY#

A9

TBT_R_GPIO_5

B9

TBT_R_GPIO_6

A8

TBT_R_PERST#

B8

TBT_R_SMBCLK

A7

TBT_R_SMBDAT

B7

TBT_R_FLASH_SHARE_EN

A4

TBT_R_FLASH_MSTR_SLV

A5

TBT_R_GPIO_12

A6 L3

POC_GPIO_12 have iPU

TBT_R_RESET#

L11

TBT_R_XTAL_25_IN TBT_R_XTAL_25_IN_R

L9

TBT_R_XTAL_25_OUT

M9

TBT_R_RSENSE

L5

TBT_R_RBIAS

L4

RT55 0_0201_5% RT56 0_0201_5%

RT50 4.75K_0402_0.5%

RT_FORCE_PWR (13,42,44 ,46)

1 2 1 2

1 2

TBT_R_XTAL_25_OUT_R

EVT1_09

I2C_RT_R_SCL I2C_RT_R_SDA I2C_RT_R_INT#

TBT_R_SMBCLK TBT_R_SMBDAT

SMBUS: No support Vpro Intel recommended PD 100K

TBT_R_PERST#

(L11) DG_P1_RST#:

For PD based systems, DG_P1_RST# should be output from PD.

TBT_R_XTAL_25_OUT_R

1

CT44 27P_0201_25V8

2

TBT_R_GPIO_5

TBT_R_FLASH_SHARE_EN

TBT_R_FLASH_MSTR_SLV

TBT_R_GPIO_12

EVT1_37

RT173 10K_0201_5%@

1 2

RT37 10K_0201_5%@

1 2

RT38 10K_0201_5%@

1 2

RT41 10K_0201_5%@

1 2

+3.3V_TBT_R

+3V_PRIM

For TCPC based systems, DG_P1_RST# should be output from SOC/EC.

(B10) FORCE_PWR:Connect to PCH for FW update

'0' - by default

'1' - for debug only

(A9) DG_FLASH_BUSY#:conenction to PU

RT189 10K_0201_5%

1 2

RT35 10K_0201_5%

1 2

RT190 10K_0201_5%@

1 2

RT33 100K_0201_5%

1 2

RT34 10K_0201_5%@

1 2

RT36 10K_0201_5%

1 2

RT39 10K_0201_5%@

1 2

RT40 10K_0201_5%@

1 2

+3VS

(A4) DG_FLSH_SHARE_EN (iPU):

'0' - Flash isn't shared. 1 Flash per Re-timer. Can be left NC.

'1' - Flash is shared between 2 Re-timers.

(A5) DG_FLSH_MSTR_SLV (iPU):

'0' - Set Re-timer to be Slave on shared flash SPI I/F.

'1' - Set Re-timer to be Master on shared flash SPI I/F.

(A8) DG_POC_GPIO6:

'0' -Reserved for debug

+3.3V_TBT_R_LC

TBT_R_FLASH_BUSY#

TBT_R_GPIO_6

PVT_09

TBT_R_FLASH_BUSY#

TBT_R_GPIO_5

TBT_R_GPIO_6

TBT_R_FLASH_SHARE_EN

TBT_R_FLASH_MSTR_SLV

TBT_R_GPIO_12

'1' -Indication to S0 state for Re-timer

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

2

1 2

RT175 0_0201_5%@

RT215 0_0201_5%@

1 2

RT216 0_0201_5%@

1 2

RT217 0_0201_5%@

1 2

RT197 0_0201_5%@

1 2

RT198 0_0201_5%@

1 2

RT199 0_0201_5%@

1 2

RT200 0_0201_5%@

1 2

RT201 0_0201_5%@

1 2

RT196 100K_0201_5%

1 2

RT195 100K_0201_5%

1 2

RT62 0_0201_5%@

1 2

RT163 0_ 0201_5%@

1 2

Size Doc ument Number Rev

Date: Sheet of

RT225 100K_0201_5%

1 2

G

2

13

D

S

QT2 PJQ1900_DFN3L

1 2

TCP2_RST# (44)

PD I2C3 on TGL

I2C3_PD_R_CLK_R (44) I2C3_PD_R_DAT_R (44)

I2C3_PD_R_INT#_R (44)

SML1_SMBCLK (9,42,44,46) SML1_SMBDATA (9,42,44,46)

TBT_I2C_INT# (11,42,44,46)

SML0_SMBCLK (9,46) SML0_SMBDATA (9,46)

DVT1_47

Reserve for TBT RTD3 Support

PCH_TBT_PERST# (10,46)

PCH_PLTRST#_EC (11,46,52,58,66,67,68,70 ,79)

Compal Electronics, Inc.

Title

Compal Electronics, Inc.

P048 - TYPE-C TBT_BB R_TCSS

LA-G172P

1

PCH

1.0 (A00)

48 101Friday, May 24, 2019

Vinaﬁx.com

5

4

3

2

1

EVT2_41

+3.3V_TBT_R_ANA+3.3V_TBT_R_LC

CT68

1U_0201_6.3V6K

1

D D

2

+0.9V_TBT_R_LVR +0.9V_TBT_R_LC

EVT2_41

CT201

10U_0402_10V6M

CT84

1U_0201_6.3V6K

1

2

Place near Pin L6,M6

C C

CT69

1

2

Place near Pin L2Place near Pin E5

Place near Pin J3

1U_0201_6.3V6K

CT82

1

2

EVT2_41

1U_0201_6.3V6K

+0.9V_TBT_R_SVR

+0.9V_TBT_R_LVR

+3.3V_TBT_R_LC

+0.9V_TBT_R_LC

+3.3V_TBT_R_ANA

URT2B

@

L2

VCC3P3_ANA

E5

VCC3P3_LC

F6

VCC0P9_SVR_ANA_1

G6

VCC0P9_SVR_ANA_2

E3

VCC0P9_SVR_1

G3

VCC0P9_SVR_2

E9

VCC0P9_SVR_PB_ANA_1

G9

VCC0P9_SVR_PB_ANA_2

J3

VCC0P9_LC

L6

VCC0P9_LVR

M6

VCC0P9_LVR_SENSE

BURNSIDE-BRIDGE_BGA105

Power

VCC3P3_SX

VCC3P3_SVR_1 VCC3P3_SVR_2 VCC3P3_SVR_3

VCC3P3A

SVR_IND_1 SVR_IND_2

SVR_VSS_1 SVR_VSS_2

NC_J6

J5: DB connect to +3.3V_TBT_R.

E6

+3.3V_TBT_R_SVR

M4 M5

+3.3V_TBT_R_DB

J5 J7

L1 M1

M2 M3

J6

RT184

RT185

RT202 0_0201_5%

connect via inductor to VCC0P9_SVR

RT123 0_0201_5%DLB@

BB is NC.

+3.3V_TBT_R_SX

J6: DB connect to GND. BB is NC.

1 2

DLB@

1 2

0_0402_5%@

+3.3V_TBT_R

+3.3VA_TBT_R

+TBT_R_SVR_IND

+3.3V_TBT_R_SVR

CT71

1U_0201_6.3V6K

CT72

1U_0201_6.3V6K

CT366

47U_0603_6.3V6M

1

2

Place near Pin M4, M5, J5 GND share with Pin M2, M3

3.3v @ 290mA

+3.3V_TBT_R +3.3VA_TBT_R

RT88 0_0402_5%@

1 2

CT304

1

2

@

EVT2_41

+3.3V_TBT_R_SX

1

2

Place near Pin E6

3.3v @ 80mA

10U_0402_10V6M

CT305

18P_0201_25V8J

CT81

1

2

CT70

1U_0201_6.3V6K

EVT2_41

Place near Pin J7

+TBT_R_SVR_IND +0.9V_TBT_R_SVR

0.68UH_MLV-YT10NR68N-M1L_2.7A_30%

LT5

1 2

EVT2_41

1

CT731U_0201_6.3V6K

@

2

1

CT741U_0201_6.3V6K

CT751U_0201_6.3V6K

@

2

1

2

CT771U_0201_6.3V6K

CT761U_0201_6.3V6K

2

CT781U_0201_6.3V6K

@

2

1

CT7947U_0603_6. 3V6M

CT8018P_0201_25V8J

2

3.3v @ 50mA

DVT1_06

Place near Pin F6,G6,E3,G3,E9,G9 GND share with Pin M2, M3

0.9v @ 850mA

DVT1_53

CT211

+3VALW

1

+3VALW

2

B B

1U_0201_6.3V6K

RT94 0_0201_5%@

PD_TCP2_LS_EN(44)

SIO_SLP_SUS#(11,16,47,58)

3.3V_TBT_R_EN

1 2

RT95 0_0201_5%@

1 2

RT93 100K_0201_5%

1 2

RT158 10K_0201_5%@

1 2

3.3V_TBT_R_EN

+3VALW

EVT2_34

BB ref sch p.6 note DG_P1_PWR_GATE_EN:

BB ref sch Rev 1.4 change to CAP Place near Pin F6,E3,E9 G3,G6,G9 CAP change to NC

UT2

1 2

3

4

VOUT_1

VIN_1

VOUT_2

VIN_2

ON

VBIAS

GND_1 GND_2

AOZ1336DI_DFN8_2X2

CT

+3.3V_TBT_R_B

7 8

CT210 470P_0402_50V7K

6

5 9

LT15 BLM18KG331SN1D_2P

1 2

EMI@

1 2

3.3v @ 370mA

+3.3V_TBT_R

2

CT212

0.1U_0201_10V6K

1

URT2C

B1

VSS_ANA_1

B12

VSS_ANA_2

D1

VSS_ANA_3

D2

VSS_ANA_4

D11

VSS_ANA_5

D12

VSS_ANA_6

F1

VSS_ANA_7

F2

VSS_ANA_8

F7

VSS_ANA_9

F9

VSS_ANA_10

F11

VSS_ANA_11

BURNSIDE-BRIDGE_BGA105

@

GND

VSS_ANA_12 VSS_ANA_13 VSS_ANA_14 VSS_ANA_15 VSS_ANA_16 VSS_ANA_17 VSS_ANA_18 VSS_ANA_19 VSS_ANA_20 VSS_ANA_21 VSS_ANA_22

VSS_1 VSS_2 VSS_3

F12 G7 H1 H2 H11 H12 J9 K1 K2 K11 K12

G5 F5 F3

For PD based systems, DG_P1_PWR_GATE_EN should be output from PD.

A A

For TCPC based systems, DG_P1_PWR_GATE_EN should be output from SOC/EC.

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P049 - TYPE-C TBT_BB R_PWR,GND

1.0 (A00)

LA-G172P

49 101Friday, May 24, 2019

1

49 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

USB2/I2C MUXES_L

CM1

RM13 0_0201_5%@

1 2

RM2 0_0201_5%@

1 2

RM14 0_0201_5%@

1 2

RM1 0_0201_5%@

1 2

+3VALW

2

1

3.3V/0.1A SPEC p.4

+3VALW

13

1 2

MUX_L_SAI MUX_L_ENA_R

MUX_L_SBI MUX_L_ENB_R

14 16

3 4

12 10

5

21

UM1

VCC

A_INp A_INn

SAI EN_A

B_INp B_INn

SBI EN_B

GND Thermal pad

TS3DS10224RUKR_WQFN20_3X3

A1_OUTp A1_OUTn

A0_OUTp A0_OUTn

SAO

B1_OUTp B1_OUTn

B0_OUTp B0_OUTn

SBO

20 19

18 17

15

6 7

8 9

11

EVT2_04

@

RM19 0_0201_5%@ RM20 0_0201_5%@

UPD_L_SMBCLK UPD_L_SMBDAT

1 2

RM9 0_0201_5%

1 2

RM10 0_0201_5%

1 2 1 2

UPD_SMBCLK_Q (42,44,50,58) UPD_SMBDAT_Q (42,44,50,58)

USB20_P8 (12) USB20_N8 (12)

EVT1_17EVT2_03

D D

0.1U_0201_25V6K

SW_TBT_L_USB20_P1(43) SW_TBT_L_USB20_N1(43)

MUX_L_FLIP#(42)

PD_L_DDM_MUX1_EN(42)

SW_TBT_L_USB20_P2(43) SW_TBT_L_USB20_N2(43)

PD_L_USB_MUX1_EN(42)

C C

MUX_L_FLIP#

USB2/I2C MUXES_R

+3VALW

2

CM2

0.1U_0201_25V6K

SW_TBT_R_USB20_P1(45)

SW_TBT_R_USB20_N1(45)

MUX_R_FLIP#(44)

PD_R_DDM_MUX1_EN(44)

SW_TBT_R_USB20_P2(45)

SW_TBT_R_USB20_N2(45)

PD_R_USB_MUX1_EN(44)

B B

RM15 0_0201_5%@ RM18 0_0201_5%@

RM16 0_0201_5%@ RM17 0_0201_5%@

1

1 2 1 2

3.3V/0.1A SPEC p.4

+3VALW

UM2

EVT2_03 EVT2_04

MUX_R_SAI MUX_R_ENA_R

MUX_R_SBIMUX_R_FLIP# MUX_R_ENB_R

13

VCC

1

A_INp

2

A_INn

14

SAI

16

EN_A

3

B_INp

4

B_INn

12

SBI

10

EN_B

5

GND

21

Thermal pad

TS3DS10224RUKR_WQFN20_3X3

A1_OUTp A1_OUTn

A0_OUTp A0_OUTn

SAO

B1_OUTp B1_OUTn

B0_OUTp B0_OUTn

SBO

20 19

18 17

15

6 7

8 9

11

UPD_R_SMBCLK UPD_R_SMBDAT

1 2

RM11 0_0201_5%

1 2

RM12 0_0201_5%

@

RM21 0_0201_5%@

1 2

RM22 0_0201_5%@

1 2

UPD_SMBCLK_Q (42,44,50,58) UPD_SMBDAT_Q (42,44,50,58)

USB20_P9 (12) USB20_N9 (12)

Channel

Signal Name

INA INB

TOP BOT

I2C USB

OUTA0

ENA ENB SAI SBI

0 - 01

0 - 1

1

SAO

-

0

1 1 1 1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

0

2014/09/08 2013/10/28

OUTB0

Hi-Z

TOP

BOTHi-Z

TOP1 1 0 0 BOT

TOP BOT

Mux Functional Mode PD Controller W/DDM

-

Crosspoint Switch

Compal Secret Data

Deciphered Date

2

USB only on TOP

USB only on BOT

USB on TOP W/DDM

USB on BOT W/DDM

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet of

Compal Electronics, Inc.

P050 - TYPE-C USB/I2C MUX

LA-G172P

1

50 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P051 - Reserve

LA-G172P

1.0 (A00)

51 101Friday, May 24, 2019

1

51 101Friday, May 24, 2019

Vinaﬁx.com

5

Reserved for RF Antenna L debug

4

3

2

1

JANTL3

2

GND_2

3

GND_3

4

GND_4

BELLW_10093-1021

CONN@

D D

50 ohm traces 50 ohm traces

1

DVT1_71

L24 1.8NH +-0.1NH LQP03TN1N8B02D

1 2

RF@

@RF@

CW5

2P_0201_25V8B

12

2P_0201_25V8B

@RF@

CW6

DVT2_06

1

JANTL1

1

RF_Spring

CONN@

+3VS_WLAN +3VS_WLAN

10U_0402_10V6M

1

CW3

2

RF Reserved.

15P_0201_50V8J

1

CW4

2

RF@

Close to UWL1 pin72,73

1

2

Close to UWL1 pin4,5

0.1U_0201_10V6K

1

2

0.01U_0201_16V7

1

CW1

CW2

2

RF Reserved.

0.1U_0201_10V6K

0.01U_0201_16V7

1

CW12

2

10U_0402_10V6M

1

CW10

2

15P_0201_50V8J

1

CW9

CW11

2

RF@

Reserved for RF Antenna R debug

DVT1_55 DVT1_55

+3VS_WLAN

CLK_PCIE_N0_R CLK_PCIE_P0_R

PCIE_PRX_C_DTX_N3 PCIE_PRX_C_DTX_P3

PCIE_PTX_C_DRX_N3 PCIE_PTX_C_DRX_P3

CNV_BRI_PTX_R_DRX CNV_BRI_PRX_R_DTX_R CNV_RGI_PTX_R_DRX_R CNV_RGI_PRX_R_DTX

CNV_RF_RESET# CLKREQ_CNV#_R

USB20_N10_R USB20_P10_R

DVT1_05

CNV_RF_RESET#_R

CLKREQ_CNV#_R CLKIN_XTAL_R

CLK_PCIE_P0_RUSB20_N10_R

CLK_PCIE_N0_R

UWL1

4

3.3V_1

5

3.3V_2

72

3.3V_3

73

3.3V_4

A48

3.3V_5

A49

3.3V_6

1

UIM_POWER_SRC/GPIO1

2

UIM_POWER_SNK

3

UIM_SWP

11

COEX_TXD

12

COEX_RXD

13

COEX3

16

RESERVED_1

18

RESERVED_2

19

RESERVED_3

66

RESERVED_4

67

RESERVED_5

21

RESERVED_6

22

RESERVED_7

24

RESERVED_8

25

RESERVED_9

33

REFCLKN0

34

REFCLKP0

36

PETN0

37

PETP0

39

PERN0

40

PERP0

42

CLINK_CLK

43

CLINK_DATA

44

CLINK_RESET

45

SDIO_RESET#

46

SDIO_WAKE#

47

SDIO_DATA3

48

SDIO_DATA2

49

SDIO_DATA1

50

SDIO_DATA0

51

SDIO_CMD

52

SDIO_CLK

53

UART WAKE#(3.3V)

54

LPSS_UART_RTS/BRI_DT

55

LPSS_UART_RXD/BRI_RSP

56

LPSS_UART_TXD/RGI_DT

57

LPSS_UART_CTS/RGI_RSP

58

PCM_SYNC/I2S_WS

59

PCM_OUT/I2S_SD_OUT

60

PCM_IN/I2S_SD_IN

61

PCM_CLK/I2S_SCK

28

W_DISABLE1#

63

W_DISABLE2#

65

LED1#

64

LED2#

69

USB_D-

70

USB_D+

8

ALERT#

9

I2C_CLK

10

I2C_DATA

A42

RF_RESET_B

A43

CLKREQ0

A44

REFCLK0

A45

NC

@

3

29

PEWAKE#

30

CLKREQ#

31

PERST#

SUSCLK_R

GND_1 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8

GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 GND_49 GND_50 GND_51

LNA_EN

C_P32K

WT_CLKP

WT_CLKN

WT_D0P WT_D0N WT_D1P WT_D1N

WGR_D0P WGR_D0N WGR_D1P WGR_D1N

BRI_DT

BRI_RSP

RGI_DT

RGI_RSP

27

14 15

7

6 17 20 23 26 32 35 38 41 62 68 71 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 G1 G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 G12 A07 A26 A31 A50

A11 A12 A13 A14 A16 A17 A18 A27 A28 A29 A30 A46 A47

A08 A09 A10 A15 A25

A19 A20 A21 A22 A23 A24

A32 A33 A34 A35 A36 A37

A38 A39 A40 A41

CNVi

SUSCLK_R

CNV_BRI_PTX_R_DRX CNV_BRI_PRX_R_DTX CNV_RGI_PTX_R_DRX CNV_RGI_PRX_R_DTX

2014/09/08 2013/10/28

SUSCLK(32KHZ)(3.3V)

SYSCLK/GNSS0

TX_BLANKING/GNSS1

RESERVED

RESERVED_10 RESERVED_11 RESERVED_12 RESERVED_13 RESERVED_14 RESERVED_15 RESERVED_16 RESERVED_17 RESERVED_18 RESERVED_19 RESERVED_20 RESERVED_21 RESERVED_22

A4WP_IRQ#

A4WP_CLK

A4WP_DATA

WGR_CLKP WGR_CLKN

9560.D2WGE2_152P

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCIE_WAKE# (58) CLKREQ_PCIE#0 (9)

PCH_PLTRST#_EC (11,46,48,58,66,67,68,70,79)

RW8 0_0201_5%@

1 2

SUSCLK

XTAL SEL

GPP_F0/CNV_BRI_DT (Internal 20 K Pull Down)

0 = 38.4/19.2MHZ (DEFAULT)

1 = 24MHZ (25 MHZ WHEN XTAL FREQ DIVIDER NON ZERO)

RW32 10K_0201_5%@

CNV_BRI_P TX_R_DRX

RW28 22_0201_1%

1 2

RW31 22_0201_1%

1 2

Compal Secret Data

Deciphered Date

2

1 2

RW33 20K_0201_5%@

1 2

CLK_CNV_PTX_DRX_P (13) CLK_CNV_PTX_DRX_N (13) CNV_PTX_DRX_P0 (13) CNV_PTX_DRX_N0 (13) CNV_PTX_DRX_P1 (13) CNV_PTX_DRX_N1 (13)

CLK_CNV_PRX_DTX_P (13) CLK_CNV_PRX_DTX_N (13) CNV_PRX_DTX_P0 (13) CNV_PRX_DTX_N0 (13) CNV_PRX_DTX_P1 (13) CNV_PRX_DTX_N1 (13)

CNV_BRI_PTX_R_DRX (13)

CNV_BRI_PRX_DTX (13)

CNV_RGI_PTX_R_DRX (13)

CNV_RGI_PRX_DTX (13)

SUSCLK (9,68)

M.2 CNVI MODES

GPP_F2/CNV_RGI_DT

0 = INTEGRATED CNVI ENABLE

1 = INTEGRATED CNVI DISABLE

RW29 100K_0201_1%

CNV_RGI_PTX_R_DRX

Title

P052 - WLAN/BT (w/ CNVi)

Size Document Numb er Rev

LA-G172P

Date: Sheet of

1 2

RW30 4.7K_0201_5%@

1 2

Compal Electronics, Inc.

1

+1.8V_PR IM+1.8V_PR IM

52 101Friday, May 24, 2019

1.0 (A00)

JANTR1

2

GND_2

3

GND_3

4

GND_4

BELLW_10093-1021

CONN@

50 ohm traces 50 ohm traces

L27 1.2NH_LQP03TN1N2B02D_0.1NH

1 2

1

DVT1_71

RF@

@RF@

CW7

2P_0201_25V8B

12

2P_0201_25V8B

@RF@

CW8

DVT2_06

1

JANTR3

1

RF_Spring

CONN@

+3VALW

CNVI_EN#(10,71)

RW46

@

0_0201_5%

C C

CNV_RF_RST(58)

DVT1_75

1 2

CNV_RF_RESET#

RW19 100K_0201_5%

EVT1_04

1 2

13

D

QW1

2

PJQ1900_DFN3L

G

S

DVT1_44

PCIE_PRX_DTX_N3(12) PCIE_PRX_DTX_P3(12)

PCIE_PTX_DRX_N3(12) PCIE_PTX_DRX_P3(12)

CH1 0.1U_0402_10V7K~D

1 2

@

CH2 0.1U_0402_10V7K~D

1 2

@

CH3 0.1U_0402_10V7K~D

1 2

@

CH4 0.1U_0402_10V7K~D

1 2

@

NO support C-Link

CNVi&KILLER BOM option co-lay

EC Side MSCLK:TX MSDATA:RX If pop KIEER@ components , RE205 need de-pop

MSCLK(58,79)

B B

3.3V

MSDATA(58,79)

RW45 0_0201_5%

DVT1.2_17

A A

DVT1_05

USB20_N10(12)

USB20_P10(12)

CNV_BRI_PRX_R_DTX CNV_BRI_PRX_R_DTX_R

CNV_RGI_PTX_R_DRX CNV_RGI_PTX_R_DRX_R

UW2

NC11VCC

2

A

3

GND

74AUP1G07FZ4-7_X2-DFN1410-6

@

NC2

Y

RW35 0_0201_5%@

1 2

RW37 0_0201_5%@

1 2

6

5

4

+1.8V_PRIM+3VALW

RW1 10K_0201_1%

1 2

RW36 0_0201_5%

1.8V

+3VALW+3V ALW

RW39 100K_0201_5%

@

1 2

3

D2

5

G2

@

S2

QW2B PMDXB600UNE_DFN1010B-6

4

0_0402_ 5%@

34

@

1 2

QW2A

@

PMDXB600UNE_DFN1010B-6

5

RW40 100K_0201_5%

@

1 2

6

D1

2

G1

S1

1

RW4

1 2

ML1

1 2

HCM1012GH900BP_4P

RW5 0_0402_5%@

1 2

@EMI@

@

CNV_RGI_PTX_R_DRX_R

@

1 2

1.8V

CNV_BRI_PRX_R_DTX_R

USB20_P10_R

+1.8V_PR IM

1 2

RW43 100K_0201_5%

@

DZ4

WLAN_WIGIG60GHZ_DIS#_R

WLAN_WIGIG60GHZ_DIS#(58)

BT_RADIO_DIS#(58)

CNV_RF_RESET#(10)

CLKREQ_CNV#(10)

CLKIN_XTAL(18)

CLKIN_XTAL

21

RB751S40T1G_SOD523-2

DZ3

21

RB751S40T1G_SOD523-2

RW13 0_0201_5%@

1 2

RW17 0_0201_5%@

1 2

RW15 0_0201_5%@

1 2

BT_RADIO_DIS#_R

CLKIN_XTAL for Jefferson Peak reserved

CLKIN_XTAL

RW34

@

10K_0201_5%

1 2

RW6 0_0402_5%@

1 2

L26

CLK_PCIE_P0(9)

CLK_PCIE_N0(9)

4

@EMI@

1 2

HCM1012GH900BP_4P

RW7 0_0402_5%@

1 2

34

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P053 - Reserve

LA-G172P

1.0 (A00)

53 101Friday, May 24, 2019

1

53 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P054 - Reserve

LA-G172P

1.0 (A00)

54 101Friday, May 24, 2019

1

54 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P055 - Reserve

LA-G172P

1.0 (A00)

55 101Friday, May 24, 2019

1

55 101Friday, May 24, 2019

Vinaﬁx.com

5

Beep sound

RC filter for PWM square to sine-wave

RA8

BEEP(58)

D D

RA29 0_0402_5%@

+3VS_AUDIO

C C

+3VS_AUDIO

+1.8VS_AUDIO

JACK DETECTION NETWORK

B B

1 2

@

RA36 0_0402_5%

RA18 0_0402_5%@

1 2

@

RA41 0_0402_5%

+DVDD

RA13

100K_0201_1%

1 2

12

RA14

200K _0201_1%

HP_PLUG#(57)

10U_0402_6.3V6M

CA39

12

CA39, CA33 close with UA1 Pin3

10U_0402_6.3V6M

CA38

12

CA38,CA36close with UA1 Pin18

JACK_PLUG#

1

CA40

@

0.1U_0201_10V6K

2

10 mA

+DVDD+1.8VS_AUDIO

0.1U_0201_10V6K CA33

1

2

5 mA

+DVDDIO

0.1U_0201_10V6K CA36

1

2

1 2

1K_0201_5%

Add this Filter to avoid other components/chips be influenced

3 A

+5VS_AUDIO

Internal pull high to +DVDD

RA660_0201_5% @

12

DA10

NB_MUTE#(58)

RB751S40T1G_SOD523-2

21

1K_0201_5%

RA21

@

CODEC_M UTE#

12

RA27

@

1 2

0_0201_5%

0.22U_0201_6.3V6M

@

1

CA46

2

SPKR(10)

Close to UA1 Pin32

LA2 HCB1608KF-121T30_0603

1 2

CA52

0.1U_0201_10V6K

10U_0402_10V6M

CA53

1

2

4

RA28

@

1 2

0_0201_5%

0.22U_0201_6.3V6M

@

1

CA47

2

RA9

1 2

1K_0201_5%

200 mA

+AVDD1

Place next to CODEC

10U_0402_10V6M

CA22

1

2

AGND

1

2

CA25,CA26 close to UA1 pin41

1

2

CA31,CA30 close to UA1 pin46

3

CA14

MONO_IN

1 2

0.1U_0201_10V6K

0.22U_0201_6.3V6M

@

1

CA48

2

12

RA30

1K_0201_5%

CA23

0.1U_0201_10V6K

1

2

AGND

EVT1_21

AGND

10U_0402_10V6M

CA26

0.1U_0201_10V6K

CA25

1

2

10U_0402_10V6M

CA30

0.1U_0201_10V6K

CA31

1

2

1

2

CA17

1 2

2.2U_0201_10V6K

RA10

1 2

100K_0201_5%

CA20

1 2

4.7U_0402_10V6M

+PVDD

1.5 A

+PVDD

1.5 A

@

CA13

100P_0201_25V7K

DMIC_DATA12(39) DMIC_CLK12(39)

10P_0201_50V8J

Near Codec pin5

AGND

Powered by PVDD

SPK_-OUT-L+(57)

SPK_-OUT-L-(57)

SPK_-OUT-R-(57)

SPK_-OUT-R+(57)

JACK_PLUG#

RA63

+DVDD

DVT1_19

1

CA57

2

EMI@

Powered by AVDD1

35

36

AVSS1

VREF

LDO1_CAP

AVDD1

PVDD1

SPK-L+

SPK-L-

SPK-R-

SPK-R+

PVDD2

JD2

JD1

GND

0_0201_ 5%

LINE2-L

E O S 2

I

/ 4 3

- A T A D

- C

I M D

GPIO2/SPDIFO

1

2

37

38

39

40

41

42

43

44

45

46

47

48

49

Powered by DVDD

@

1 2

100K Necessary

RA57

1 2

100K_0201_5%

CODEC_MUTE#

CA55

@

1U_0201_6.3V6M

RA58 0_0201_5%@

1 2

RA62 22_0201_5%

1 2

1

CA64

@EMI@

33P_0201_50V8J

2

+AVDD1

AGND

2

1

1 2

MONO_IN

CA15 10U_0402_10V6M

RA64 10K_0201_5%

32

29

30

31

33

34

LINE2-R

PCBEEP

MIC_CAP

AGND

AUX MODE

DGND

MIC2-R/SLEEVE

27

28

HP-OUT-L

MIC2-L/RING2

MIC2-VREFO-L

MIC2-VREFO-R

ALC3281-CG

QFN48(6*6)

Thermal pad=DGND

0.1U_0201_10V6K

1

2

GPIO0/DMIC-DATA-124GPIO1/DMIC-CLK5I2C_SDA6I2C_SCL

DVDD3PDB

CA54

1

2

DMIC_DATA12_R

DMIC_CLK12_R

I2S_DIN

I2S_SCLK10I2S_LRCLK

I2S_DOUT

7

8

9

The PDB control timing by EC_MUTE#

HPOUT-L

HPOUT-R

CPVEE

26

25

CPVEE

HP-OUT-R

CBN

CBP

AVSS2

LDO2_CAP

CPVDD/AVDD2

LDO3_CAP

DVDD_IO

SDATA_OUT

SDATA_IN

SYNC

BCLK

DC_DET/EAPD

I2S_MCLK

11

12

LINE2-L (57)

LINE2-R (57)

SLEEVE (57)

RING2 (57)

MIC2-VREFO-R (57)

MIC2-VREFO-L (57)

HPOUT-L (57)

HPOUT-R (57)

Don't short this pad to USB digital ground, and should be far away from any power traces.

0603 type

CA18 2.2U_0603_10V7K

1 2

UA1

Powered by CPVDD/AVDD2

24

23

22

21

20

19

18

17

16

15

14

13

0603 type

CBN

CA21 2.2U_0603_10V7K

CBP

LDO2_CAP

LDO3_CAP

Powered by DVDD-IO

HDA_SDIN0_L

1 2

CA51 10U_0402_10V6M

1 2

CA32 10U_0402_10V6M

1 2

RA17 33_0201_5%

@

CA37 22P_0201_25V8

1 2

GND

AGND

+DVDDIO

2

RA22 0_0402_5%@

1 2

CA78 0.1U_0402_10V7K

RA23 0_0402_5%@

CA79 0.1U_0402_10V7K

RA25 0_0402_5%@

CA80 0.1U_0402_10V7K

CA81 0.1U_0402_10V7K

CA83 0.1U_0402_10V7K

CA82 0.1U_0402_10V7K

@EMI@

1 2

@EMI@

1 2

@EMI@

1 2

@EMI@

1 2

@EMI@

1 2

@EMI@

1 2

Moat

Place near UA1 pin26/27

AGND

Near Codec

HDA_SDOUT_L (10)

HDA_SDIN0 (10)

HDA_SYNC_L (10)

HDA_BIT_CLK_L (10)

Near Codec

TOP

Close Audio jack

BOT

Close Codec

Place on Codec to Audio Jack Path

AGND

HPOUT-LHPOUT-R

330P_0201_50V7K

1

@

CA9

2

1.8V power rail should be supplied by linear regulator, not switching regulator. if switching regulator is unavoidable, Please make sure that switching frequency operates at out- band(over 20KHz).

50 mA

0.1U_0201_10V6K 10U_0402_10V6M

CA24

1

2

CA29

2

AGND

330P_0201_50V7K

1

@

CA11

2

AGNDAGND

+1.8VS_A UDIO

1

Codec AVDD ( Placement near Audio Codec)

+AVDD1

ANALOG

LA1 HCB2012KF-600T30

1

CA19

10U_0402_10V6M

2

AGND

In order to prevent the built-in LDO damaged from over-voltage on +5VD or Standby power line, we suggested using this Voltage suppressing device.

DIGITAL

1 2

AZ5125-01H.R7G_SOD523-2

Moat

+5VS_AUDIO

DA11

EMI@

12

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Numb er Rev

Date: Sheet of

Compal Electronics, Inc.

P056 - Audio ALC3281

LA-G172P

1

56 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

Int. Speaker Conn.

SPK L+ L- R+ R- trace width Speaker 4 ohm ==> 40 mils

SPK_-OUT-L+(56)

D D

SPK_-OUT-L-(56)

1 A

EMI@

LA8 BLM18SG260TN1D_2P

1 2

LA7 BLM18SG260TN1D_2P

1 2

EMI@

1000P_0201_25V7K

CA44

1

2

CA45

1

2

Speaker 8 ohm ==> 20 mils

SPK_DET#

RA65 10K_0201_5%

1 2

+3VS_AUDIO

SPK_L+ SPK_LSPK_R+ SPK_R-

SPK_DET#(10)

SPK_-OUT-R+(56) SPK_-OUT-R-(56)

C C

1 A

PCB trace width of MIC2-R(SLEEVE)/MIC2-L(RING2) are required at least 40 mil for HP crosstalk consideration and, its length should be as short as possible.

LA19/L15 should choose DC resistance (Rdc) < 30m-ohm to get the best audio performance for HP crosstalk.

EMI@

LA6 BLM18SG260TN1D_2P

1 2

LA5 BLM18SG260TN1D_2P

1 2

EMI@

1000P_0201_25V7K

CA50

1

2

CA49

1

2

12

DA8

EMI@

12

DA9

EMI@

AZ5B75-01B.R7G_CSP0603P2Y2

12

DA15

EMI@

AZ5B75-01B.R7G_CSP0603P2Y2

EVT2_17

SPK_L+ SPK_LSPK_R+ SPK_R-

12

DA14

EMI@

AZ5B75-01B.R7G_CSP0603P2Y2

Universal Audio Jack CONN

SPK_L+ SPK_LSPK_R+ SPK_RSPK_DET#

JSPK1

1

2

3

4

5

6

7

8

9

GND_1

10

GND_2

ACES_50208-00801-003

CONN@

Universal Audio Jack

change RA6/RA3 to 5.6 ohm to meet Dell Grade A heapdhone output power > 25 mW setting

RA6 20_0201_1%

HPOUT-L(56)

HPOUT-R(56)

CA12 10U_0603_6.3V6M

LINE2-L(56)

LINE2-R(56)

1 2

CA10 10U_0603_6.3V6M

1 2

use X5R for better performance

1 2

RA3 20_0201_1%

1 2

EVT1_28

DVT1_64

HPOUT-L_L HPOL_CONN

HPOUT-R_L

330P_0201_50V7K

CA60

1

2

EMI@

LA19 BLM15AX 700SN1D_2P

1 2

LA18 BLM15AX 700SN1D_2P

1 2

EMI@

330P_0201_50V7K

CA61

12

HPOR_CONN

ESD207-B1-02EL_TSLP-2-19-2

DA5

EMI@

ESD207-B1-02EL_TSLP-2-19-2

330P_0201_50V7K

CA85

1

2

12

CA84

DA4

EMI@

B B

RA2 2.2K_0201_5%

MIC2-VREFO-L(56)

MIC2-VREFO-R(56)

SLEEVE(56)

RING2(56)

1 2

RA1 2.2K_0201_5%

1 2

40mil

1

2

A A

5

AGNDAGND

EMI@

L12 BLM1 5PX330SN1D_2P

1 2

L15 BLM1 5PX330SN1D_2P

1 2

EMI@

330P_0201_50V7K

CA62

CA63

1

2

AGNDAGND

4

AGNDAGND

HPOL_CONN RING2_CONN

HP_PLUG#(56)

SLEEVE_CONN

ESD207-B1-02EL_TSLP-2-19-2

330P_0201_50V7K

CA59

1

2

AGNDAGND

12

CA58

DA3

EMI@

RING2_CONN

ESD207-B1-02EL_TSLP-2-19-2

12

DA1

EMI@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2014/09/08 2013/10/28

HP_PLUG#

Compal Secret Data

JHP1

112 334 556

UNIMI_FCECBE015

CONN@

Deciphered Date

2

2 4 6

HP_PLUG#

HPOR_CONN SLEEVE_CONN

Contact with PC BEAN

AGND

12

DA13

EMI@

ESD207-B1-02EL_TSLP-2-19-2

Title

P057 - Audio Jack/Speaker

Size Doc ument Number Rev

LA-G172P

Date: Sheet of

Compal Electronics, Inc.

1.0 (A00)

57 101Friday, May 24, 2019

1

57 101Friday, May 24, 2019

Vinaﬁx.com

5

+3.3V_ALW_UE1

0.1U_0201_10V6K

CE51

CE50

1

2

close to pin G8/M9

RF Request

D D

+3VALW

1

2

EVT1_33

12P_0402_50V8J

68P_0402_50V8J

RF@

1

CE52

CE53

2

+3.3V_ALW_UE1

EVT2_07

+RTCVCC_R

DVT1_16

+3VALW

RE49

1 2

10U_0402_6.3V6M

1

0_0603_5%

CE46

2

RE113 100_0201_5%

1

2

Close to pin H1

@

0.1U_0201_10V6K

CE49

1 2

+3.3V_ALW_UE1

+VSS_PLL

PCH_DPWROK(11)

SIO_EXT_WAKE#(10)

SIO_SLP_SUS#(11,16,47,49)

DVT1_72

RE106 0_0402_5%@

22U_0603_6.3V6M

@

1

CE47

2

0.1U_0201_10V6K

1

2

1 2

CE48

0.1U_0201_10V6K

CE43

1

2

RE248 0_0201_5%@

1 2

RE482 0_0201_5%@

1 2

RE115 43K_0402_1%

DVT1_15

Connect to PCH

+3VALW

DVT2_11

RE133 100K_0201_5%

1 2

RE208 100K_0201_5%

1 2

RE130 100K_0201_5%

1 2

RE102 100K_0201_5%

1 2

RE101 100K_0201_5%

1 2

RE100 100K_0201_5%

1 2

RE99 100K_0201_5%

1 2

RE98 100K_0201_5%

1 2

RE97 100K_0201_5%

1 2

RE96 100K_0201_5%

1 2

RE247 100K_0201_5%

1 2

DVT1_33

RE472 100K_0201_5%

C C

1 2

RE95 100K_0201_5%

1 2

RE160 100K_0201_5%

1 2

RE157 100K_0201_5%

1 2

RE473 100K_0201_5%

1 2

RE475 100K_0201_5%

1 2

BT_RADIO_DIS# WLAN_WIGIG60GHZ_DIS# BC_DAT_ECE1117 BAT1_LED# BAT2_LED# BATT_LED#_LV1 BATT_LED#_LV2 BATT_LED#_LV3 BATT_LED#_LV4 BATT_LED#_LV5 RESET_IN#

PCH_RSMRST#

SUS_ON_EC

LCD_TST

EVT1_13

SYS_PWROK

IMVP_VR_ON_EC

DVT1_33

RUN_ON_EC

EVT2_15

+3.3V_BAT_LDO

12

10M_0201_1% RE520

+3VALW

2

G

12

100K_0201_5% RE521

PBAT_PRES#

13

D

QE23 L2N7002WT1G_SC-70-3

S

DVT1_73

Touch Pad PS2

SLP_WLAN#_GATE(71)

PS2_CLK1B_TP(63) PS2_DAT1B_TP(63)

EVT1_13

EVT2_24

EVT1_13

3.6V

+3.3V_ALW2

RE152 1K_0201_5%@

1 2

RE154

RE471 0_0201_5%@

+1.8V_3.3V_ALW_VTR3

CE88

1

0.1U_0201_10V6K

2

6

5

NC2

4

Y

+3VALW

EVT2_01

12

RE194 2K_0402_5%

12

CE75

4700P_0402_25V7K

DVT2_01

TAP_SMBCLK_R (63)

TAP_SMBDAT_R (63)

100K_0201_5%

1 2

EVT1_13

Reserved for debug

1 2

Close to pin N5

+1.8V_3.3V_ALW_VTR3

+3VALW

1 2

PVT_01

POWER SW

DVT1_04

+RTCVCC_R

RE178

0_0402_5%

CE89

5

12

RE184 100K_0201_5%

POWER_SW_IN#

1

CE104

2.2U_0201_6.3V6M

2

+1.8V_PRIM

PCH_PLTRST#_EC(11,46,48,52,66,67,68,70,79)

CE75

4700p 4700p

4700p 4700p 4700p 4700p1K

REV

M00 X00 X01 X02 X03 X04

@

RE194

240K 4700p 130K 62K 33K 4700p

8.2K

4.3K 2K

BOARD_ID rise time is measured from 5%~68%.

DVT1_68

DVT2_12

DVT1.2_02

TAP_SMBCLK

TAP_SMBDAT

@

CE681U_0201_10V6M

1 2

RE187 1K_0201_5%

+3VALW

1 2

1U_0201_6.3V6M

12

CE63

1

2

MEC_XTAL2_R

1 2

RE156 100K_0201_5%

JTAG_RST#

100_0201_1%

@

RE164

12

DVT1_17

10P_0402_50V8J

PWRBTN#(77,79,96)

B B

1

JTAG2 @JUMP@

@SHORT PADS~D

2

DVT1_15

2

32 KHz Clock

MEC_XTAL1 MEC_XTAL2

12

A A

YE2

1 2

10P_0402_50V8J

32.768KHZ_9PF_X1A000141000200

CE66

CNV_RF_RST(52)

ESPI only supp ort 1.8V

RH565

@

1 2

0_0402_5%

1

CE54

0.1U_0201_10V6K

2

UE5

NC11VCC

2

A

3

GND

74AUP1G07FZ4-7_X2-DFN1410-6

DVT1.2_01

R

BOARD_ID

DVT1_01

DVT1_56

12

RE5230_0201_5%

12

RE5240_0201_5%

C

1U_0201_6.3V6M

CE44

1

2

SML0B_SMBDATA(10)

WLAN_WIGIG60GHZ_DIS#(52)

RE476 0_0201_5%@

RE467 0_0201_5%@ RE468 0_0201_5%@

DVT1_58

BC_DAT_ECE1117(63) BC_CLK_ECE1117(63)

TP_DISABLE#(63)

PAD~D

PCH_PLTRST#_5105

0_0201_5%

RE183 10K_0201_1%

PCH_PLTRST#_5105

For EMI request

ESPI_CLK_5105

33_0201_5%

12

RE172

33P_0201_50V8J

1

2

DVT1_37

4

0.1U_0201_10V6K

CE45

1

2

+3.3V_ALW_UE1

+1.8V_3.3V_ALW_VTR3

RUN_ON_EC(67,78)

BT_RADIO_DIS#(52)

EVT2_15

PANEL_MONITOR(38)

AC_PRESENT(11)

SML0B_SMBCLK(10)

BATT_LED#_LV5(63)

SIO_PWRBTN#(11,79)

1 2

1 2 1 2

JTAG_TDI(79)

JTAG_TDO(79)

JTAG_CLK(79)

JTAG_TMS(79)

TACH_FAN1(77) TACH_FAN2(77)

LCD_TST(38) PWM_FAN1(77) PWM_FAN2(77)

PCH_RSMRST#(78)

BIA_PWM_EC(38)

FPR_SCAN_INT#(77)

SSD_SCP_PWR_EN(71,78)

PANEL_BKEN_EC(38)

BEEP(56)

FPR_DET#(77)

AC_DIS(83)

BATT_LED#_LV2(63)

MSCLK(52,79)

MSDATA(52,79)

NB_MUTE#(56)

EN_INVPWR(38)

IMVP_VR_ON_EC(78)

M_BIST(63)

AC_DISC#(82)

EDP_HPD(6,38)

RTCRST_ON(63)

BATT_LED#_LV1(63)

EVT1_13

TP84

TP@

ESPI_RESET#(9,79)

TP74

TP@

@

0_0201_5%

ESPI_CLK_5105(9,79)

ESPI_CS#(9,79)

ESPI_IO0(9,79)

ESPI_IO1(9,79)

ESPI_IO2(9,79)

ESPI_IO3(9,79)

@

SYS_PWROK(11,79)

PCH_PLTRST#_5105(68)

@EMC@

CE65

4

+RTC_CELL_VBAT

0.1U_0201_10V6K CE42

1

2

A2

B7

EVT1_13

M12

E11

M13 K12

K11 K10 N11 E10 C12

G13

H11

H12 G10 H10

EVT1_13

F13 E13 C13 E12

F11 F12 D12 D13

PRIM_PWRGD

GPIO024 use for PRIM_PWRGD(eSPI)

K2

F1

H1

G8

M9

N5

F8 E8

C2 F9 N4

M8

K8

D8

L13

E9 F6 C8 C5

E3

D1 M2 L10 L11 M5

J8

N1

L8

N6

J9

D9

G9

A4

B2

C1

N7

K9

N8

F4

B1

K7

N3

K6

H7

K1

G7

H6

K5

L4

G6

L5

L2 M1

G4 L12

A1

A3

@

UPD_SMBCLK_Q(42,44,50)

UPD_SMBDAT_Q(42,44,50)

+3.3V_EC_PLL

PCH_DPWROK_EC

RUN_ON_EC SIO_EXT_WAKE#_EC BT_RADIO_DIS# PBAT_PRES# SIO_SLP_SUS#_EC

BATT_LED#_LV5

WLAN_WIGIG60GHZ_DIS#

SLP_WLAN#_GATE_R LID_CL_SIO# CLK_TP_SIO_I2C_DAT DAT_TP_SIO_I2C_CLK

JTAG_RST#

LCD_TST

PCH_RSMRST#

FPR_SCAN_INT#

FPR_DET#

RESET_IN# IMVP_VR_ON_EC

LID_CL_SIO_TAB#

BATT_LED#_LV1 BC_DAT_ECE1117

SYSPWR_PRES

1

GPIO011

ESPI_ALERT#

1

RE494

12

ESPI_CLK_5105

GPIO167

RE487

12

GPIO100 SYS_PWROK CNV_DET#_EC

MEC_XTAL1 MEC_XTAL2_R

DVT1_04

NB LID/TAB LID

DVT1_74

+3VALW

RE122 100K_0201_5% RE123 100K_0201_5%

DVT1.2_11

DVT1_78

DVT1.2_11

UE1

VBAT

VTR_ANALOG

VREF_ADC

VTR_PLL

VTR_REG

VTR1 VTR2 VTR3

GPIO020 GPIO045 GPIO120 GPIO166 GPIO175 GPIO230 GPIO231 GPIO233

GPIO007/SMB03_DATA/PS2_CLK0B GPIO010/SMB03_CLK/PS2_DAT0B GPIO110/PS2_CLK2 GPIO111/PS2_DAT2 GPIO112/PS2_CLK1A GPIO113/PS2_DAT1A GPIO114/PS2_CLK0A/nEC_SCI GPIO115/PS2_DAT0A GPIO154/SMB02_DATA/PS2_CLK1B GPIO155/SMB02_CLK/PS2_DAT1B

GPIO145/SMB09_DATA/JTAG_TDI GPIO146/SMB09_CLK/JTAG_TDO GPIO147/SMB08_DATA/JTAG_CLK GPIO150/SMB08_CLK/JTAG_TMS JTAG_RST#

GPIO050/FAN_TACH0/GTACH0 GPIO051/FAN_TACH1/GTACH1 GPIO052/FAN_TACH2/LRESET# GPIO053/PWM0/GPWM0 GPIO054/PWM1/GPWM1 GPIO055/PWM2/SHD_CS#/(RSMRST#) GPIO056/PWM3/SHD_CLK GPIO001/PWM4 GPIO002/PWM5 GPIO014/PWM6/GPTP-IN6 GPIO015/PWM7 GPIO035/PWM8/CTOUT1 GPIO133/PWM9 GPIO134/PWM10/UART1_RTS# GPIO135/UART1_CTS# GPIO170/TFDP_CLK/UART1_TX GPIO171/TFDP_DATA/UART1_RX

GPIO022/GPTP-IN0 GPIO023/GPTP-IN1 GPIO024/nRESETI GPIO031/GPTP-OUT1 GPIO032/GPTP-OUT0 GPI0040/GPTP-OUT2

GPIO121/PVT_IO0 GPIO124/GPTP-OUT6/PVT_CS# GPIO125/GPTP-OUT5/PVT_CLK GPIO126/PVT_IO3

GPIO122/BCM0_DAT/PVT_IO1 GPIO123/BCM0_CLK/PVT_IO2 GPIO046/BCM1_DAT GPIO047/BCM1_CLK

GPIO041/SYS_SHDN# SYSPWR_PRES GPIO011/nSMI GPIO021/LPCPD# GPIO061/LPCPD#/ESPI_RESET# GPIO063/SER_IRQ/ESPI_ALERT# GPIO064/LRESET# GPIO065/PCI_CLK/ESPI_CLK GPIO066/LFRAME#/ESPI_CS# GPIO070/LAD0/ESPI_IO0 GPIO071/LAD1/ESPI_IO1 GPIO072/LAD2/ESPI_IO2 GPIO073/LAD3/ESPI_IO3 GPIO067/CLKRUN# GPIO100/nEC_SCI GPIO106/PWROK GPIO107/nSMI

XTAL1 XTAL2

RE461 0_0201_5%@

RE245 0_0201_5%@

1 2 1 2

Connect to PCH

ISH_LID_CL_NB#(10)

Connect to EC

Connect to TS/FPR

Connect to EC

LID_CL_SIO_TAB#

Connect to PCH

ISH_LID_CL_TAB#(10)

1 2

LID_CL_SIO#

LID_CL_TS_FP#(11,77)

VSS1

A6

GPIO141/SMB05_DATA/SPI1_CLK/UART0_DCD# GPIO142/SMB05_CLK/SPI1_MOSI/UART0_DSR#

GPIO143/SMB04_DATA/SPI1_MISO/UART0_DTR#

GPIO144/SMB04_CLK/SPI1_CS#/UART0_RI#

VSS_ADCH4VR_CAP

VSS2

VSS3

J1

E6

A13

+VR_CAP

DVT1_15

+3VALW

RE488 100K_0201_5%

1 2

+3VALW

5

G2

3

D2

S2

12

LID_CL_SIO# LID_CL_SIO_TAB#

2 1

RB520SM-30T2R_EMD2-2

LID_CL_SIO#

LID_CL_TS_FP#

LID_CL_SIO_TAB#

2 1

RB520SM-30T2R_EMD2-2

2 1

RB520SM-30T2R_EMD2-2

2 1

RB520SM-30T2R_EMD2-2

2 1

RB520SM-30T2R_EMD2-2

GPIO034/RC_ID1/SPI0_CLK

GPIO036/RC_ID2/SPI0_MISO

GPIO003/SMB00_DATA/SPI0_CS#

GPIO004/SMB00_CLK/SPI0_MOSI

GPIO057/VCC_PWRGD

GPIO060/KBRST/48MHZ_OUT

GPIO104/UART0_TX GPIO105/UART0_RX

GPIO127/A20M/UART0_CTS#

GPIO225/UART0_RTS#

GPIO025/TIN0/nEM_INT/UART_CLK

GPIO152/GPTP-OUT3

GPIO005/SMB01_DATA/GPTP-OUT4

GPIO006/SMB01_CLK/GPTP-OUT7

GPIO012/SMB07_DATA/TOUT3

GPIO013/SMB07_CLK/TOUT2

GPIO130/SMB10_DATA/TOUT1

GPIO131/SMB10_CLK/TOUT0

GPIO132/SMB06_DATA

GPIO140/SMB06_CLK/ICT5

GPIO224/GPTP-IN4/SHD_IO1

GPIO016/GPTP-IN7/SHD_IO3/ICT3

GPIO164/VCI_OVRD_IN

GPIO165/32KHZ_IN/CTOUT0

GPIO221/GPTP-IN3/32KHZ_OUT

GPIO044/VREF_VTT

GPIO042/PECI_DAT/SB-TSI_DAT

GPIO043/SB-TSI_CLK

GPIO103/THERMTRIP2#

GPIO160/PWM11/PROCHOT#

VSS_PLL

VSS_ANALOG

C4

G1

1

+VSS_PLL

2

CE64 1U_0201_6.3V6M

VCCIN_AUX_VR_PG (58,89)

1.8V_PRIM_PG (58,88,89)

1.8V_PRIM_PWRGD

+3VALW

6

D1G1S1

Q30B

@

PMDXB600UNE_DFN1010B-6

UPD_SMBDAT

4

RE4630_0201_5% @

DVT1_78

+3VS

RE237 100K_0201_5%

DE5

DE1

DE3

DE2

DE4

1 2

3

GPIO033/RC_ID0

GPIO026/TIN1 GPIO027/TIN2 GPIO030/TIN3

GPIO017/GPTP-IN5

GPIO151/ICT4

GPIO156/LED0 GPIO157/LED1 GPIO153/LED2 GPIO226/LED3

GPIO200/ADC00 GPIO201/ADC01 GPIO202/ADC02 GPIO203/ADC03 GPIO204/ADC04 GPIO205/ADC05 GPIO206/ADC06 GPIO207/ADC07 GPIO210/ADC08 GPIO211/ADC09 GPIO212/ADC10 GPIO213/ADC11 GPIO214/ADC12 GPIO215/ADC13 GPIO216/ADC14 GPIO217/ADC15

GPIO222/SER_IRQ GPIO223/SHD_IO0

GPIO227/SHD_IO2

BGPO0

VCI_OUT GPIO163/VCI_IN0# GPIO162/VCI_IN1# GPIO161/VCI_IN2# GPIO000/VCI_IN3#

DN1_DP1A DP1_DN1A DN2_DP2A DP2_DN2A DN3_DP3A DP3_DN3A DN4_DP4A DP4_DN4A

VIN

VSET

VCP

THERMTRIP1#

MEC5105_WFBGA169_11X11

2

PMDXB600UNE_DFN1010B-6

UPD_SMBCLK

1

RE4620_0201_5% @

12

NB_LID# (63)

TAB_LID# (63)

3

DVT2_08

CPU_RC_ID

F2

PD_ID

J10

BOARD_ID

J13

TAP_SMBDAT

E7

TAP_SMBCLK

D7

G3

RUNPWROK SSD_SCP#

H5 G11 G12 B13

UPD_L_SMBINT#

F10

PCIE_WAKE#_R

N13 N12 M11 H9

L9 M10 N9

C11

BAT1_LED#

D10

BAT2_LED#

D11 E1

E5 B3

VCCDSW_EN

M7 M4

PBAT_CHARGER_SMBDAT

M3

PBAT_CHARGER_SMBCLK

N2 N10 A12

GPIO140 IMVP_SMBDAT

B6

IMVP_SMBCLK

F7

UPD_SMBDAT

B4

UPD_SMBCLK

C3

I_BATT_R

J4

I_SYS_R

J5 J6

EC_TOUCHPAD_INTR#

G2 H2

BATT_LED#_LV4

J2 J3 K3 D3

SUS_ON_EC

D2 E2 G5

UPD_R_SMBINT#

F5 K4

PCH_PCIE_WAKE#

L1 L3

TABLE_MODE#_EC

H8 J7 L6

PRIM_PWRGD

L7 M6

D6

BGPO0

C7 A5

ALWON

POWER_SW_IN#

D5 B5

BATBTN#

LID_POWER_ON#

D4

VCI_IN3#

E4

BATT_LED#_LV3

C6

32KHZ_OUT

F3

+PECI_VREF

J11

PECI_EC_R

K13 J12

GPIO043

REM_DIODE1_N

A8

REM_DIODE1_P

A7

REM_DIODE2_N

A10

REM_DIODE2_P

A9

REM_DIODE3_N

B9

REM_DIODE3_P

B8

REM_DIODE4_N

A11

REM_DIODE4_P

B10

+VR_CAP

C10

VSET_5105

C9 B11 H3

THERMTRIP2#

B12

THERMTRIP1#

PROCHOT#_R1

H13

+1.05V_VCCST

ALLSYS_PWRGD

Q30A

@

LID_CL_TS_FP#

DVT1.2_09

DVT2_10

RE448 0_0201_5%@

1 2

SSD_PWR3_EN (71) TAP_FW_RDY# (63)

EVT1_13

RE485

@

12

RE125 300_0402_5%

1 2

RE126 300_0402_5%

1 2

NB_MODE# (10) EC_TOUCHPAD_INTR# (63)

RE431 0_0201_5%@

1 2

EVT1_13

1

DVT1_67

CE105 10P_0402_50V8J@

1 2

RE153 43_0402_5%

1 2

CE76 2200P_0402_50V7K

1 2

CE93 2200P_0402_50V7K

1 2

CE39 2200P_0402_50V7K

1 2

CE86 2200P_0402_50V7K

RE158 100_0402_1%

1 2

+VCCIO_OUT

@

RE477 0_0201_5%@

1 2

+3VS

RE1 10K_0201_5%

1 2

2 1

RB751S40T1G_SOD523-2

RE457 0_0201_5%@

1 2

2 1

RB751S40T1G_SOD523-2

@

2 1

RB751S40T1G_SOD523-2

RE464 0_0201_5%@

1 2

PCIE_WAKE#(52)

RE185 0_0201_5%@

Stuff RE185 and no stuff RE186 keep E5 design Stuff RE186 and no stuff RE185 to save two GPIOs on EC(PCH_PCIE_WAKE# should be output with OD)

TAP_SMBDAT TAP_SMBCLK

System crash p rotection

SSD_SCP# (68) HOST_DEBUG_TX (79) ME_FWP (10)

UPD_L_SMBINT# (42)

SIO_SLP_S4# (11,78,79) TAP_RESET# (63)

TP_EN (63)

1 2

ALLSYS_PWRGD (79)

DVT1_60

RE186 0_0201_5%@

1 2

DVT1.2_05

BAT1_LED# (63)

LCD_VCC_TEST_EN (38)

VCCDSW_EN (16) SSD_PWR2_EN (71) PBAT_CHARGER_SMBDAT(82,83) PBAT_CHARGER_SMBCLK(82,83) RTCRST_ON_POWER (63)

0_0201_5%

IMVP_SMBDAT (91) IMVP_SMBCLK (91)

PD

BATT_LED#_LV4 (63)

SOLC (38) AUX_EN_WOWL (71) SUS_ON_EC (78) BC_INT#_ECE1117(63)

UPD_R_SMBINT# (44)

LAN_WAKE# (11)

3.3V_TS_EN (71)

ACAV_IN (63,83)

POWER_SW_IN# (63) BATBTN# (63,96)

BATT_LED#_LV3 (63)

I_ADP (83)

1 3

D

TP58PAD~D TP@

2

G

S

QE15L2N7002WT1G_SC-70-3

RE492 0_0201_5%@

1 2

Charger and Battery

PVT_12

VCCIN VR

I_BATT (83) I_SYS (83,91)

TABLE_MODE# (10)

DVT1_58

PECI_EC (11)

1

RE219 2.2K_0201_5%

TP112PAD~D TP@

H_PROCHOT# (11,16,91)

+3VALW

SIO_SLP_S3# (11,78,79)

1 2

H_THERMTRIP#(11)

1 2

BAT2_W_LED# (63)

S5 LID OPEN POWER ON

DVT1_04

RE147 close to UE1 at least 250mils

RE147 0_0201_5%@

0.1U_0201_10V6K

CE56

12

RE215

8.2K_0201_1% LMBT3904WT1G_SC70-3

C

2

QE16

B

E

3 1

DVT2_03

D438

D474

D475

EVT1_25

@

10K_0201_5%

ALLSYS_PWRGD_R

DVT1_22

ALW_PWRGD_3V_5V (16,78)

MEM_PG (25)

VCCIN_AUX_VR_PG (58,89)

DVT1.2_14

1.8V_PRIM_PG (58,88,89)

+3VS

RE93

1 2

QE18A

2N7002KDW_SOT363-6

61

D

2

G

S

RUN_ON#

2N7002KDW_SOT363-6

+3VALW

QE18B

D

1 2

34

S

RE87

100K_0201_5%

G

DVT1.2_09

CE432

4700p 4700p

4700p 4700p 4700p 4700p1K

CPU TYPE

Non V-PRO I3 Non V-PRO I5130K

CPU_RC_ID

DVT2_08

RE525

240K 4700p

62K Non V-PRO I7 33K 4700p

8.2K

4.3K 2K

2

SSD_SCP#

DVT1_57

BATBTN#

LID_POWER_ON#

DVT1_67

VCI_IN3#

TAP_SMBDAT

RE486 100K_0201_5%@

RE526 100K_0201_5%@

12

100K_0201_1% RE478

NB_LID#

DVT1.2_02

EVT1_13

DVT1.2_05

DVT1_70

RE411 0_0402_5%

SN74LVC1G123DCUR_VSSOP8

0.1U_0402_25V6

1.58K_0402_1%

12

CE79

TAP_SMBCLK

UPD_L_SMBINT#

UPD_R_SMBINT#

PBAT_CHARGER_SMBDAT

PBAT_CHARGER_SMBCLK

THERMTRIP1#

SSD_SCP#

IMVP_SMBDAT

IMVP_SMBCLK

UPD_SMBDAT

UPD_SMBCLK

EC_TOUCHPAD_INTR#

FPR_DET#

FPR_SCAN_INT#

PCIE_WAKE#_R

TAP_FW_RDY#

VCCDSW_EN

I_BATT_R

I_SYS_R

SSD_SCP#

@

1 2

UE6

1

A#

2

B

R/CEXT

3

CLR#

GND4Q

VSET_5105

RE199

CEXT

+3V_NB_LID

+3V_NB_LID_R

8

VCC

7

6

5

Amber

White

1 2

PCH_PCIE_WAKE#PCIE_WAKE#_R

DVT2_10

+1.05V_VCCST

PCH_PCIE_WAKE# (11)

+3VALW

1 2

PD_ID

1 2

Rest=1.58K , Tp=96 degree

Setting for Thermal Design

Thermal diode mapping

THERMTRIP2#

0.1U_0402_25V6

12

CE61

MEC5105 pins thermal diode

DP1/DN1 QE4

QE14

DP2/DN2 QE17

DN2a/DP2a

DP3/DN3

DN3a/DP3a

DP4/DN4

QE8

QE10

QE3

Reserved

DN4a/DP4a ---

1

2

PMBT3904MB_SOT883B

E

31

QE14

B

2

C

100P_0201_50V8J

@

CE58

DDR

100P_0201_50V8J

@

CE55

5

RUN_ON_P (71,78)

+3VALW

12

RE525

R

240K_0402_5%@

12

CE432

C

4700P_0402_25V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2

100P_0201_50V8J

@

CE60

2014/09/08 2013/10/28

PMBT3904MB_SOT883B

1

E

31

QE8

B

2

C

2

WLAN SSD

PMBT3904MB_SOT883B

1

E

31

QE3

B

2

C

2

Ambient Charger

Compal Secret Data

Deciphered Date

Location

CPU(OTP)

DDRDN1a/DP1a

SSD

WLAN

Charger

Ambient

Reserved

---

100P_0201_50V8J

1

@

CE57

2

100P_0201_50V8J

1

@

CE69

2

100P_0201_50V8J

1

@

CE67

2

C

RE522 100K_0201_5%@

1 2

RE137 100K_0201_5%

1 2

RE142 100K_0201_5%

1 2

RE244 100K_0201_5%

1 2

RE484 2.2K_0201_5%@

1 2

RE483 2.2K_0201_5%@

1 2

RE108 100K_0201_5%

1 2

RE109 100K_0201_5%

1 2

RE111 2.2K_0201_5%

1 2

RE112 2.2K_0201_5%

1 2

RE124 10K_0201_1%

1 2

RE426 100K_0201_5%@

1 2

RE459 2.2K_0201_5%

1 2

RE458 2.2K_0201_5%

1 2

RE446 2.2K_0201_5%

1 2

RE445 2.2K_0201_5%

1 2

RE449 100K_0201_5%

1 2

RE470 100K_0201_5%

1 2

RE469 100K_0201_5%

1 2

RE481 10K_0201_5%

1 2

RE493 10K_0201_5%@

1 2

@

CE108 0.1U_0201_10V6K

1 2

CE106 2200P_0402_50V7K

1 2

CE107 2200P_0402_50V7K

1 2

RE159 10K_0201_5%@

1 2

RE48 100K_0201_5%@

1 2

DVT1_10

12

RE479 390K_0402_1%

1

CE109

2

10U_0402_10V6M

2

B

QE4

E

3 1

PMBT3904MB_SOT883B

CPU

2

B

QE17

E

3 1

PMBT3904MB_SOT883B

2

B

QE10

E

3 1

PMBT3904MB_SOT883B

DVT1_67

LID_POWER_ON#

13

D

2

QE19

G

L2N7002WT1G_SC-70-3

S

12

RE480

1M_0201_1%

ALWON

12

RE312

1M_0201_5%

REM_DIODE1_P

REM_DIODE1_N

REM_DIODE2_P

REM_DIODE2_N

REM_DIODE3_P

REM_DIODE3_N

Title

Size Document Number Rev

Date: Sheet of

1

+1.8V_PRIM

+RTCVCC_R

+3VALW

DVT2_11

LID_POWER_ON# (96)

@

1 2

0_0402_5%

RE305

12

CE312

@

RE405

0.1U_0402_25V6

0_0402_5%

@

1 2

12

CE413

@

RE417

0.1U_0402_25V6

0_0402_5%

@

1 2

12

CE429

@

0.1U_0402_25V6

100P_0201_50V8J

1

C

@

CE110

2

QE22

E

3 1

PMBT3904MB_SOT883B

Reserved

Compal Electronics, Inc.

P058 - EC_MEC5105

LA-G172P

1

2

B

@

ALWON_3VALW (84,96)

ALWON_5VALW (85)

ALWON_5VALWB (85)

REM_DIODE4_P

REM_DIODE4_N

58 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P059 - Reserve

LA-G172P

1.0 (A00)

59 101Friday, May 24, 2019

1

59 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P060 - Reserve

LA-G172P

1.0 (A00)

60 101Friday, May 24, 2019

1

60 101Friday, May 24, 2019

Vinaﬁx.com

5

I2C/ISH_I2C/SML

I2C0

4

+3VS_TS

2.2K-ohm

DT24

TS_I2C_SDA

DT23

TS_I2C_SCL

0-ohm

2.2K-ohm

TS_I2C_SDA_R

TS_I2C_SCL_R

Touch screen

[ 0x0A ]

3

0-ohm

+3VALW

G

USB/I2C MUX_L

USB/I2C MUX_R

B_IN

UPD_L_SMBDAT

UPD_L_SMBCLK

UPD_R_SMBDAT

UPD_R_SMBCLK

UPD_SMBDAT_Q

0-ohm

UPD_SMBCLK_Q

0-ohm

UPD_SMBDAT_Q

0-ohm

UPD_SMBCLK_Q

0-ohm

D S

0-ohm

+3VALW

D S

NC

G

NC

2

+3VALW

2.2K-ohm 2.2K-ohm

UPD_SMBDAT

UPD_SMBCLK

SMBus

B4

SMB04

C3

1

+VCC3V3_TBT_L_LDO

NC NC

2.2K-ohm

1K-ohm

499-ohm

+3V_PRIM

2.2K-ohm

1K-ohm

499-ohm

1K-ohm

NC

0-ohm

NC

0-ohm

+3V_PRIM

Reserved

SML1_SMBDATA

SML1_SMBCLK

10K-ohm

0-ohm

NC

0-ohm

[ 0x40 ]

0-ohm I2C_RT_L_SDA

0-ohm TBT_L_SMBDAT

NC

0-ohm

NC

0-ohm

[ 0x42 ]

0-ohm I2C_RT_R_SDA

0-ohm

100K-ohm

100K PD for non-Vpro use

0-ohm

NC

0-ohm

KB Transfer Board

I2C_RT_L_SCL

TBT_L_SMBCLK

I2C_RT_R_SCL

TBT_R_SMBDAT

TBT_R_SMBCLK

100K-ohm

+3VS_TP

E7

I2C

C9

BB_L

B7

SMB I2C_INT#

A7

E7

I2C

C9

BB_R

B7

SMB

A7

I2C_INT#

A10

I2C_RT_L_INT#

I2C_RT_R_INT#

I2C3_PD_L_CLK_R

I2C3_PD_L_DAT_R

I2C3_PD_L_INT#_R

0-ohm

NC

0-ohm

NC

I2C3_PD_R_INT#_R

I2C3_PD_R_DAT_R

I2C3_PD_R_CLK_R

D D

PCH

C C

I2C2

SML1

SML0

GPP_B11

GPP_D13

GPP_D14

DU41

I2C2_SDA

DV41

I2C2_SCL

DL22

SML1_SMBDATA_R

DN22

SML1_SMBCLK_R

DJ24

SML0_SMBDATA

DK24

SML0_SMBCLK

CL39

GPP_B11 0-ohm TBT_I2C_INT#

DV33

SML0B_SMBDATA

DW33

SML0B_SMBCLK

+3VS

GPP_B3

CR38

PCH_TOUCHPAD_INTR#

10K-ohm

PCH_TOUCHPAD_INTR#

+3V_PRIM

D S

G

100K-ohm

+3VS_TP

DGS

10K-ohm

0-ohm

NC

0-ohm

NC

0-ohm

NC

[ 0X44 ](7bit: 0x22)

0-ohm I2C1_PD_L_DAT

UPD_SMBDAT_Q

UPD_SMBCLK_Q

0-ohm

0-ohm I2C2_PD_L_DAT

SML1_SMBDATA

SML1_SMBCLK

0-ohm

[ 0X44 ](7bit: 0x22)

[ 0X40 ](7bit: 0x20)

0-ohm I2C1_PD_R_DAT

UPD_SMBDAT_Q

UPD_SMBCLK_Q

0-ohm

0-ohm I2C2_PD_R_DAT

SML1_SMBDATA

SML1_SMBCLK

0-ohm

[ 0X40 ](7bit: 0x20)

+VCC3V3_TBT_R_LDO

10K-ohm

0-ohm

NC

0-ohm

NC

0-ohm

NC

I2C1_PD_L_CLK

I2C2_PD_L_CLK

I2C1_PD_R_CLK

I2C2_PD_R_CLK

I2C3_PD_L_INT#

I2C3_PD_L_CLK

I2C3_PD_L_DAT

22

21

23

PD I2C3 for TGL use

I2C3

I2C3_INT#

28

27

I2C1

PD_L

33

32

I2C2

28

I2C1

27

PD_R

33

I2C3_INT#

I2C2

32

22

I2C3_PD_R_DAT23I2C3_PD_R_INT#

I2C1_INT#

I2C2_INT#

I2C1_INT#

I2C2_INT#

I2C3

21

PD I2C3 for TGL use

I2C3_PD_R_CLK

29

34

29

34

I2C1_PD_L_INT#

I2C2_PD_L_INT#

I2C1_PD_R_INT#

I2C2_PD_R_INT#

0-ohm

UPD_L_SMBINT#

UPD_R_SMBINT#

SML0B_SMBDATA

SML0B_SMBCLK

F10

F5

E11

D8

GPIO225

GPIO214

EC

SMB03

SMB10

SMB05

M3

PBAT_CHARGER_SMBDAT

N2

PBAT_CHARGER_SMBCLK

B6

IMVP_SMBDAT

F7

IMVP_SMBCLK

2.2K-ohm 2.2K-ohm

+3VALW

2.2K-ohm

+3VALW

2.2K-ohm 10K-ohm

0-ohm

NC

0-ohm

100-ohm

+3VALW

CHG_DAT

CHG_CLK

DAT_SMB

CLK_SMB

NCNC

10K-ohm

IMVP_SMBDAT_VR

IMVP_SMBCLK_VR

[ 0X12 ]

Charger

Battery Connector

[ 0X16 ]

VCCIN Controller

MP2940AGRT

+3VALW

100K-ohm

EC_TOUCHPAD_INTR#

G2

GPIO203

+3VS_TP

4.7K-ohm

1K-ohm 1K-ohm

DP24

SMB_DATA

SMB

DK27

SMB_CLK

B B

MIPI60@

0-ohm

SMB_DATA_MIPI60

SMB_CLK_MIPI60 M IPI60 Debug

+3VS_TP

4.7K-ohm

TOUCHPAD_INTR#

TouchPad

[ 0x2c ]

PS2_DAT1B_TP

+RTCVCC_R

4.7K-ohm 4.7K-ohm

0-ohmPS2_CLK1B_TP

0-ohm

+3VALW

NCNC

CLK_TP_SIO_I2C_DAT

DAT_TP_SIO_I2C_CLK

E10

PS2_1B

C12

DW23

I2C1_SDA_TP

I2C1

DU23

I2C1_SCK_TP

CN43

ISH_I2C0

A A

ISH_I2C1

ISH_I2C2

ISH_I2C0_SDA

CN42

ISH_I2C0_SCL

DW41

I2C_3_SDA_UFCAM

I2C3

DT41

I2C_3_SCL_UFCAM

DT40

I2C4

DW40

CN41

ISH_I2C1_SDA

CL43

ISH_I2C1_SCL

CL41

CJ39

NC

+3VS

1K-ohm 1K-ohm

+3VS

1K-ohm 1K-ohm

0-ohm

ACC2_I2C_SDA

ACC2_I2C_SCK

0-ohm

2.2K-ohm 2.2K-ohm

0-ohm I2C_3_SDA_UFCAM_R

0-ohm

+1.8VS

ISH_I2C1_SDA_R

ISH_I2C1_SCL_R

I2C_3_SCL_UFCAM_R

0-ohm

NC

0-ohm

NC

0-ohm

2.2K-ohm 2.2K-ohm

0-ohm

TRN_ACC2_I2C_SDA

TRN_ACC2_I2C_SCK

0-ohm

[ 0x3A ]

Middle Board

I2C_3_SDA_UFCAM_R

I2C_3_SCL_UFCAM_R

ISH_I2C1_SDA_ALS

ISH_I2C1_SCL_ALS

ISH_I2C1_SDA_ACC1_2

ISH_I2C1_SCL_ACC1_2

ISH_I2C1_SDA_ECOM1_2

ISH_I2C1_SCL_ECOM1_2

ISH_I2C1_SDA_ACC1_1

ISH_I2C1_SCL_ACC1_1

ISH_I2C1_SDA_ECOM1_1

ISH_I2C1_SCL_ECOM1_1

I2C1_SDA_TP_R

I2C1_SCK_TP_R

[ 0x28 ]

2nd Accelerometer

Battery Gauge 2nd

MC3451

Gyro + Accelerometer

Ecompass

Gyro + Accelerometer

Ecompass

Keyboard Controller

Battery Gauge 1st

MC3451

Double TAP FPC

[ 0x5A ]

[ 0x6b ]

[ 0x1e ]

ECE1117

UFCAM module

UF Camera

ALS

TAP_SMBCLK_R

[ 0x36 ]

[ 0x29 ]

0-ohmTAP_SMBDAT_R

0-ohm

Sensor Board

5

4

3

2.2K-ohm

100K-ohm

2.2K-ohm TAP_SMBDAT

TAP_SMBCLK

BATBTN#

E7

D7

B5

SMB00

VCI_IN1#

+3VALW

100K-ohm

BC_DAT_ECE1117

BC_CLK_ECE1117

BC_INT#_ECE1117

2

D12

BCM1

D13

E2

GPIO212

Security Class ification

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

2014/09/08 2013/10/28

Deciphered Date

1

Compal Electronics, Inc.

Title

P061 - SMB/I2C Block Diagram

Size Document Number Rev

LA-G172P

LA-G172PLA-G172P

Date: Sheet of

61 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P062 - Reserve

LA-G172P

1.0 (A00)

62 101Friday, May 24, 2019

1

62 101Friday, May 24, 2019

Vinaﬁx.com

5

4

3

2

1

KB Controller & TP transfer Conn

TAP_SMBDAT_R

TAP_SMBCLK_R

D476

21

PESD5V0H1BSF_SOD962-2-2

1

C628

2

0.1U_0201_16V6K

10U_0402_10V6M

1

C4221

2

C4222

2

0.1U_0201_16V6K

10U_0402_10V6M

PS2_DAT1B_TP

@EMI@

PS2_DAT1B_TP

PS2_CLK1B_TP

1

2

21

@EMI@

D477

21

PESD5V0H1BSF_SOD962-2-2

@EMI@

680P_0201_25V7K

C1229

C1226

1

@EMI@

2

D50

PESD5V0H1BSF_SOD962-2-2

D51

21

PESD5V0H1BSF_SOD962-2-2

@EMI@

DVT1_68

DVT1_60

D472

PESD5V0H1BSF_SOD962-2-2

21

+3VALW

1

C622

2

+5VALW B

D473

PESD5V0H1BSF_SOD962-2-2

@EMI@

JIO1

1

3

BC_INT#_ECE1117(58)

KB_DET#(6)

BATT_LED#_LV1(58)

D D

DVT1.2_04

BATT_LED#_LV2(58) BATT_LED#_LV3(58) BATT_LED#_LV4(58) BATT_LED#_LV5(58) BAT1_LED#(58) BAT2_W_LED#(58)

BATBTN#(58,96)

B+_FLAG(96) PCH_TOUCHPAD_INTR#(11) EC_TOUCHPAD_INTR#(58)

TP_DISABLE#(58)

TP_EN(58)

TAB_LID#(58) ACC2_INT#(10) NB_LID#(58)

BC_CLK_ECE1117(58) BC_DAT_ECE1117(58)

DVT1_04

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND_1

ACES_51515-0510M-P01

CONN@

GND_2

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

+5VALW B

+3VALW

TAP_SMBCLK_R TAP_SMBDAT_R

I2C1_SDA_TP I2C1_SCK_TP

PS2_DAT1B_TP PS2_CLK1B_TP

+3VS

+3V_NB_LID

DVT1.2_05

TAP_FW_RDY# (58)

TAP_SMBCLK_R (58) TAP_SMBDAT_R (58)

TAP_RESET# (58)

I2C1_SDA_TP (10)

I2C1_SCK_TP (10)

PS2_DAT1B_TP (58)

PS2_CLK1B_TP (58)

ISH_I2C0_SDA (10) ISH_I2C0_SCL (10)

I2C1_SDA_TP

I2C1_SCK_TP PS2_CLK1B_TP

+3VS

21

EMI@

1

C640

C4180

2

C C

15P_0201_25V8J

1U_0201_6.3V6M

@EMI@

For manufacturer process use only

M-BIST

B B

DVT1_58 DVT1_62

+3VALW

12

R283

D481

@

RB751V40_SC76-2

ACAV_IN(58,83)

M_BIST(58)

PCH_RSMRST#_AND(11,78)

1 2

R273 0_0201_5%@

1 2

R272 330K_0201_1%@

1 2

12

C92 2.2U_0201_6.3V6M

POWER_SW_IN#(58)

LMBT3904WT1G_SC70-3

1M_0201_5%

M_BITS_R

QE25

2

B

BAT1_LED#_Q

C

E

3 1

DVT1.2_07

31

R2

2

R1

DVT1.2_15

BAT1_LED#

R1=10K;R 2=10K

QZ20

LMUN5111T1G_SC70-3

1 2

R789 150_0201_1%

RTC

RTCD5

DVT2_04

EVT1_27

RTCD3

RB520SM-30T2R_EMD2-2

+RTCBATT

1 2

DVT2_07

W=20milsW=20mils W=20mils

RTCR1

1.3K_0402_5%@ RTCD6

@

1 2

BAT54HT1G_SOD323-2

EVT2_36

+RTCBATT

JRTC1

1

2

3

G1

4

G2

ACES_50278-00201-001

CONN@

@

100K_0201_5%

+RTCBATT

RTCR3

1 2

+VCC3V3_TBT_L_LDO+VCC3V3_TBT_R_LDO

21

LBAT54HT1G_SOD323-2

RTCD4

21

+3.3V_BAT_LDO +3VALW

W=20milsW=20mils

LBAT54HT1G_SOD323-2

W=20mils

RTCD2

21

1

2

LBAT54HT1G_SOD323-2

C112 1U_0201_6.3V6M

21

+RTCVCC_R

+3VS

2

G

RTCR2

@

100K_0201_5%

1 2

13

D

QRTC1 L2N7002WT1G_SC-70-3

S

RTC_DET#_R (6)

@

DVT1_15

Gen 8 reserved

R2751

@

0_0402_5%

1 2

+RTCVCC_R+RTCVCC

Gen 9

Q349 PJ2301_SOT23-3

1 3

D

S

1U_0201_6.3V6M

1

C1040

DVT1_15

L2N7002WT1G_SC-70-3

A A

12

Q348

13

D

S

R5768 10K_0402_5%

RTCRST_ON_R

2

G

2

D116

RB751S40T1G_SOD523-2

2 1

R5769

1 2

1M_0402_5%~D

22P_0402_50V8J

12

C1132

G

2

DVT1_65

PVT_12

R5779

0_0402_5%

@

1 2

100K_0201_1%

12

R2745

0.1U_0402_25V6K~D

@

C1131

1

2

RTCRST_ON_POWER (58)

PVT_12

RTCRST_ON(58)

RTCR4

100K_0201_5%

1 2

R271 75_0201_1%

13

D

L2N7002WT1G_SC-70-3

2

Q3

G

S

1 2

PCH_RTCRST# (9,79)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Numb er Rev

Date: Sheet of

Compal Electronics, Inc.

P063 - KB/TP/RTC

LA-G172P

1

63 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P064 - Reserve

LA-G172P

1.0 (A00)

64 101Friday, May 24, 2019

1

64 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P065 - Reserve

LA-G172P

1.0 (A00)

65 101Friday, May 24, 2019

1

65 101Friday, May 24, 2019

Vinaﬁx.com

5

4

3

2

1

D D

For ST TPM

EVT1_16

DVT1.2_08

@

1 2

R626 0.01_0603_1%

@

1 2

R5717 0_0603_5%

1 2

R687 0_0402_5%

R200 0_0402_5%

R688 0_0402_5%

@

1 2

@

1 2

@

+3.3V_VPS_TPM

+3VS_TPM

+3VALW_TPM

+3V_PRIM

1 2

R656 10K_0201_5%

TPM_PIRQ#_R

+3VALW

+3V_PRIM

+3VS

+3VALW

DVT1_16

U712

PCH_PLTRST#_EC(11,46,48,52,58,67,68,70,79)

C C

R703 49.9_0201_1%EMI@

PCH_SPI_CLK_R(9)

PCH_SPI_CS2#(9)

PCH_SPI_SI_R(9)

PCH_SPI_SO_R(9)

+3VS

SIO_SLP_S0#(11,79)

1 2

R702 0_0201_5%@

1 2

R700 49.9_0201_1%

1 2

R701 49.9_0201_1%

1 2

@

1 2

R649 10K_0201_5%

R747 0_0201_5%

R54 0_0201_5%

TPM_PIRQ#_R(10)

@

1 2

@

1 2

TPM_GPIO0

TPM_GPIO0_NU

TPM_PIRQ#_R

PCH_SPI_CLK_TPM

PCH_SPI_CS2#_TPM

PCH_SPI_SI_TPM

PCH_SPI_SO_TPM

17

RST#

18

PIRQ#

19

SCLK

20

CS#

21

MOSI

24

MISO

6

GPIO

29

NC19

7

PP

9

NC6

16

NC13

23

NC14

32

NC22

2

GND

33

PAD

ST33HTPH2032AHC1_VQFN32_5X5

VPS

NC11

NC1

NC5

NC2 NC3 NC4 NC7 NC8

NC9 NC10 NC12 NC15 NC16 NC17 NC18 NC20 NC21

22 14

1

8

3 4 5 10 11 12 13 15 25 26 27 28 30 31

EVT2_46

+3.3V_VPS_TPM

+3VALW_TPM

+3VS_TPM

10U_0402_6.3V6M

@

C94

1

2

10U_0402_6.3V6M

0.1U_0201_10V6K

@

C95

1

2

@

C421

1

2

0.1U_0201_10V6K

1

@

C422

2

place C96,C97,C1387 as close as U712.22

place C421, C422 as close as U712.1

place C94, C95 as close as U712.8

For NPTC750 Depop R747,R5717 Pop C94,C95,C97,C421,C422,R54,R687,R200,R688

10U_0402_6.3V6M

C96

1

2

@

0.1U_0201_10V6K

C1387

C97

1

2

DVT1_45

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

PCH_SPI_CLK_TPM

R648

33_0201_5%

@EMI@

1 2

C453

0.1U_0201_10V6K

1

@EMI@

2

2014/09/08 2013/10/28

3

Close to U712

RF Request

+3VALW

C454

12P_0201_50V8J

1

2

Compal Secret Data

C455

68P_0201_50V8J

1

RF@

2

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P066 - TPM

LA-G172P

1.0 (A00)

66 101Friday, May 24, 2019

1

66 101Friday, May 24, 2019

Vinaﬁx.com

5

4

+3VALW

3

2

1

CS94

@

1U_0201_6.3V6M

2

D D

RUN_ON_EC(58,78)

RS378 0_0201_5%@

DVT1_19

1 2

+3VALW

3VS_SSD_EN

+5VALWB

JNGFF1

1

CONFIG_3

3

GND_1

5

GND_2

7 8

USB_D+

9 10

USB_D-

11

GND_3

US1

1 2

3

4

@

VOUT_1

VIN_1

VOUT_2

VIN_2

ON

VBIAS

GND_1 GND_2

AOZ1336DI_DFN8_2X2

1.8V

FULL_CARD_PWR_OFF#

3.3V

GPIO_9/DAS/DSS#/LED#1

3.3V

7 8

6

CT

5 9

W_DISABLE#

+3VS_SSD_R

RS200 0_0805_5%@

CS95 0.01U_0201_16V7@

1 2

3.3V_1

3.3V_2

2 4 6

1 2

+3VS_SSD

Solt B & Key B

NC_1 NC_2

COEX3 COEX2 COEX1

3.3V_3

3.3V_4

3.3V_5

12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66

68

1 2

RS377 10K_0201_5%

+3VS_SSD

GPIO_5

13

C C

PCIE_PRX_DTX_N14(12) PCIE_PRX_DTX_P14(12)

CS26 0.22U_0201_6.3V6M@

PCIE_PTX_DRX_N14(12) PCIE_PTX_DRX_P14(12)

PCIE_PRX_DTX_N13(12) PCIE_PRX_DTX_P13(12)

PCIE_PTX_DRX_N13(12) PCIE_PTX_DRX_P13(12)

CLK_PCIE_N1(9) CLK_PCIE_P1(9)

B B

RS207 0_0201_5%@ RS208 0_0201_5%@

1 2

CS27 0.22U_0201_6.3V6M@

1 2

CS25 0.22U_0201_6.3V6M@

1 2

CS24 0.22U_0201_6.3V6M@

1 2

1 2 1 2

PCIE_PTX_C_DRX_N14 PCIE_PTX_C_DRX_P14

PCIE_PTX_C_DRX_N13 PCIE_PTX_C_DRX_P13

CLK_PCIE_N1_R CLK_PCIE_P1_R

CONFIG_0

15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67

69

1.8V

GPIO_11

1.8V

DPR GND_4 PERn1/USB3RxN/SSIC-RxN PERp1/USB3RxP/SSIC-RxP GND_5 PETn1/USB3TxN/SSIC-TxN PETp1/USB3TxP/SSIC-TxP GND_6 PERn0/SATA_B+ PERp0/SATA_BGND_7 PETn0/SATA_APETp0/SATA_A+ GND_8 REFCLKN REFCLKP GND_9 ANTCTL0 ANTCTL1 ANTCTL2 ANTCTL3 RESET# CONFIG_1 GND_10 GND_11 CONFIG_2

GND_13

1.8V

1.8V/3.3V

1.8V

1.8V (26MHZ)

1.8V

PU.1.8V

SIM DETECT

(low active)

GPIO_6 GPIO_7

GPIO_10

GPIO_8

UIM-RESET

UIM-CLK

UIM-DATA

UIM-PWR

DEVSLP

GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4

PERST# CLKREQ# PEWAKE#

SUSCLK

GND_12

@

+3VS_SSD

33P_0201_25V8J

1

@

2

DVT1_07

PCH_PLTRST#_EC (11,46,48,52,58,66,68,70,79) CLKREQ_PCIE#1 (9)

+3VS_SSD

1

C4230

@

0.1U_0201_10V6K

2

CS89

@

4.7U_0402_10V6M

1

2

CS90

0.1U_0201_10V6K

1

@

2

+3VS_SSD

CS92

0.01U_0201_16V7

CS91

1

@

2

CS93

47P_0201_25V8J

1

@

2

BELLW_80149-2021

CONN@

DVT1.2_16

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P067 - M.2 SSD CONN Reserve

LA-G172P

1

67 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

D D

PWR2 BOM option power select table

R1142+SSD_PWR2P

1.8V 49.9K

100K1.2V

PWR2 SSD C14 power select table

C C

(All component POP)

SSD_C14+SSD_PWR2P

1.8V

GND

NC1.2V

R1143

Non-POP

SSD_PWR2_FB(94)

PWR3 BOM option power select table

+SSD_PWR3P

0.9V

1.1V 120K

1.2V

B B

PWR3 SSD CFG power select table

R1136

200K

100K

R1133 R1134

Non-POP

R1135

POP

R1150

Non-POP

SSD_PWR3_FB(95)

(All component POP , except R1135)

SSD_F15SSD_D15

GND

NC GNDNC

SSD_ALERT#

SSD_FORCE_ROM_H_R SSD_FORCE_ROM_I SSD_FORCE_ROM_T1_S SSD_FORCE_ROM_T2_R

SSD_H14

NCNC

+1.8VS

+SSD_PWR3P

0.9V

1.1V

1.2V

GND NC NC

R724100K_0201_5%

12

R6811M_0201_5% @

12

R6781M_0201_5% @

12

R6791M_0201_5% @

12

R6801M_0201_5% @

12

SSD Debug

TP@

TP41

TP@

TP42

TP@

TP43

TP@

TP44

TP@

TP38 PAD~D

TP@

A A

TP39 PAD~D

TP@

TP85 PAD~D

TP@

PAD~50

1

PAD~50

1

PAD~50

1

PAD~50

1

1 1

1

+1.8V_1.2VDX_SSD

+3.3VDX_SSD +SSD_PWR_3

PAD~50

1

TP40

SSD_JTAG_TRST# SSD_JTAG_TCK SSD_JTAG_TMS SSD_JTAG_TDI SSD_JTAG_TDO UART_RX_I_S UART_TX_I_S DIAG0_I2C_SCL_I DIAG1_I2C_SDA_I

SSD_CLK_T SSD_DATA_T SSD_FORCE_ROM_I SSD_FORCE_ROM_H_R SSD_FORCE_ROM_T1_S SSD_FORCE_ROM_T2_R

SSD_ALERT#

5

R1135

Non-POP

R609 0_0201_5%@

1 2

R610 0_0201_5%@

1 2

JSSD1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

GND_1

23

24

GND_2

24

ACES_51524-0240N-001

CONN@

R1150

POP

SSD_FORCE_ROM_H

SSD_FORCE_ROM_T2

25 26

4

+1.8V_1.2V_SSD +1.8V_1.2VDX_SSD

PWR2

Vout

+SSD_PWR2P

Vfb R1

R1141 100K_0201_1%

1 2

R2

R1142 100K_0201_1%

1 2

PWR3

Vout

+SSD_PWR3P

Vfb R1

R1000 100K_0201_1%

1 2

R2

R1136 100K_0201_1%

1 2

R1135 0_0201_1%

1 2

C16901U_0201_6.3V6K

C16911U_0201_6.3V6K

CC38722U_0603_6.3V6M

CC38822U_0603_6.3V6M

1

2

4

+1.8VS

RE451 10K_0201_1%

1 2

CLKREQ_PCIE#2_R

1.8V

No need level shift due to GPP_D7 BIOS voltage setting change from 3.3V to 1.8V

DVT1.2_06

@

1 2

LS2 HCB1608KF-121T30_0603

R2=

R1143 100K_0201_1%

1 2

SSD_C14

R2=

R1133 120K_0201_1%

1 2

INTEL@

+3.3VDX_SSD

C16880.1U_0201_6.3V6K

C168710P_0201_25V8

C168610P_0201_25V8

C16890.1U_0201_6.3V6K

1

2

1

2

level shift for CLKREQ_PCIE#2

+1.8V_PR IM

UE10

@

NC2

1 2

6

5

4

Y

PCIE_PTX_DRX_P9(12) PCIE_PTX_DRX_N9(12)

PCIE_PRX_DTX_P9(12) PCIE_PRX_DTX_N9(12)

PCIE_PTX_DRX_P10(12) PCIE_PTX_DRX_N10(12)

PCIE_PRX_DTX_P10(12) PCIE_PRX_DTX_N10(12)

NC11VCC

2

A

3

GND

74AUP1G07FZ4-7_X2-DFN1410-6

R456 0_0201_5%@

Vfb=0.6V

R1x0.6

VOUT-0.6

+1.8VS

Vfb=0.6V

R1x0.6

VOUT-0.6

12

R1134 200K _0201_1%

SSD_D15

SSD_F15

SSD_H14_R

R1150 0_0201_5%

C17071U_0201_6.3V6K

C17061U_0201_6.3V6K

CC38922U_0603_6.3V6M

CC39022U_0603_6.3V6M

1

2

C17001U_0201_6.3V6K

1

2

SSD_H14

@

12

+1.8V_1.2VDX_SSD

C16980.1U_0201_6.3V6K

C16970.1U_0201_6.3V6K

C17050.1U_0201_6.3V6K

C17040.1U_0201_6.3V6K

C16991U_0201_6.3V6K

1

2

C169610P_0201_25V8

C169510P_0201_25V8

1

2

1

2

3

CLKREQ_PCIE#2 (9)

3.3V

EVT2_19

1 2 1 2

SSD_SCP#(58)

DVT1_57

3

CS1 0.22U_0201_6.3V6M CS2 0.22U_0201_6.3V6M

CS3 0.22U_0201_6.3V6M CS4 0.22U_0201_6.3V6M

CS5 0.22U_0201_6.3V6M CS6 0.22U_0201_6.3V6M

CS7 0.22U_0201_6.3V6M CS8 0.22U_0201_6.3V6M

SUSCLK(9,52)

SSD_CLK_T

R4441K_0201_5% @

SSD_DATA_T

R4451K_0201_5% @

R787 0_0201_5%

C17221U_0201_6.3V6K

C17231U_0201_6.3V6K

CC39222U_0603_6.3V6M

CC39122U_0603_6.3V6M

1

2

PCH_PLTRST#_5105(58) PCH_PLTRST#_EC(11,46,48,52,58,66,67,70,79)

1 2 1 2

@

1 2

R6152 0_0201_5%

@

1 2

R6155 0_0201_5%

@

1 2

R452 0_0201_5%

@

1 2

SSD_SCP# in EC setting open drain , no exteral PU/PD

PCIE_PTX_DRX_P11(12) PCIE_PTX_DRX_N11(12) PCIE_PRX_DTX_P11(12) PCIE_PRX_DTX_N11(12) PCIE_PTX_DRX_P12(12) PCIE_PTX_DRX_N12(12) PCIE_PRX_DTX_P12(12) PCIE_PRX_DTX_N12(12)

+SSD_PWR_3

C171510P_0201_25V8

C17160.1U_0201_6.3V6K

C17170.1U_0201_6.3V6K

C17190.1U_0201_6.3V6K

C17180.1U_0201_6.3V6K

C17201U_0201_6.3V6K

C17211U_0201_6.3V6K

1

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

Issued Date

C171410P_0201_25V8

1

2

1.8V

R470 0_0201_5%@

1 2

R471 0_0201_5%@

1 2

3.3V

CLKREQ_PCIE#2_RSSD_PERST#

1.8V 1.8V GND

CLK_PCIE_ P2_R CLK_PCIE_ N2_R

PCIE_PTX_C_DRX_P9 PCIE_PTX_C_DRX_N9

PCIE_PRX_C_DTX_P9 PCIE_PRX_C_DTX_N9

PCIE_PTX_C_DRX_P10 PCIE_PTX_C_DRX_N10

PCIE_PRX_C_DTX_P10 PCIE_PRX_C_DTX_N10

SSD_PERST# CLKREQ_PCIE#2_R

DIAG0_I2C_SCL_I DIAG1_I2C_SDA_I

SSD_SUSCLK

TESMODE

SSD_JTAG_TRST# SSD_JTAG_TCK SSD_JTAG_TMS SSD_JTAG_TDI SSD_JTAG_TDO

SSD_CLK_T SSD_DATA_T

SSD_C14 SSD_D15 SSD_F15 SSD_H14 SSD_SCP#_R

SSD_SUSCLK

USSD1A

C8

XTAL-IN

C7

XTAL-OUT

D4

REFCLKP

D5

REFCLKN

F4

SATA-A+/PERp0

F5

SATA-A-/PERn0

H4

SATA-B+/PETp0

H5

SATA-B-/PETn0

K4

PERp1

K5

PERn1

M4

PETp1

M5

PETn1

D7

PERST#

D8

CLKREQ#

E13

DIAG0

D13

DIAG1

D14

SUSCLK

W7

LED#DAS

Y6

TESMODE

W12

V_SELECT0

W13

V_SELECT1

L18

JTAG_TRST

N17

JTAG_TCK

N18

JTAG_TMS

R17

JTAG_TDI

R18

JTAG_TDO

U17

SMB_CLK

U18

SMB_DATA

C13

RFU_1

C14

RFU_2

D15

RFU_3

F15

RFU_4

H14

RFU_6

H15

RFU_7

K14

RFU_8

K15

RFU_9

L7

RFU_10

L8

RFU_11

L9

RFU_12

L10

RFU_13

L11

RFU_14

L12

RFU_15

M7

RFU_16

M8

RFU_17

S-SUN_PM971 @

PCIEX4 SSD

CS22 0.22U_0201_6.3V6M

1 2

CS23 0.22U_0201_6.3V6M

1 2

CS20 0.22U_0201_6.3V6M

1 2

CS21 0.22U_0201_6.3V6M

1 2

CS18 0.22U_0201_6.3V6M

1 2

CS19 0.22U_0201_6.3V6M

1 2

CS16 0.22U_0201_6.3V6M

1 2

CS17 0.22U_0201_6.3V6M

1 2

TP80 PAD~D

TP@

2014/09/08 2013/10/28

1

TP77 PAD~D

1

TP76 PAD~D

1

TP78 PAD~D

1

PCIE_PTX_C_DRX_P11 PCIE_PTX_C_DRX_N11 PCIE_PRX_C_DTX_P11 PCIE_PRX_C_DTX_N11 PCIE_PTX_C_DRX_P12 PCIE_PTX_C_DRX_N12 PCIE_PRX_C_DTX_P12 PCIE_PRX_C_DTX_N12

Compal Secret Data

Deciphered Date

2

1.8V

SSD_PERST#

CLK_PCIE_P2(9)

CLK_PCIE_N2(9)

R1095 0_0402_5%@

R1096 0_0402_5%@

PVT_06

3.3V/2A

+3.3VDX_SSD

D9

3P3V_1

D10

3P3V_2

E9

3P3V_3

E10

3P3V_4

W9

3P3V_5

W10

3P3V_6

Y9

3P3V_7

Y10

3P3V_8

R7

1P8V_1

R8

1P8V_2

R11

1P8V_3

R12

1P8V_4

T7

1P8V_5

T8

1P8V_6

T11

1P8V_7

T12

1P8V_8

U7

1P8V_9

U8

1P8V_10

U11

1P8V_11

U12

1P8V_12

VSF_1 VSF_2 VSF_3 VSF_4 VSF_5 VSF_6 VSF_7

ALERT#

RFU_18 RFU_19 RFU_20 RFU_21 RFU_22 RFU_23 RFU_24 RFU_25 RFU_26 RFU_27 RFU_28 RFU_29 RFU_30 RFU_31 RFU_32 RFU_33 RFU_34

G7 G8 G11 G12 H7 H8 H11 H12 J7 J8 J11 J12

L16 L17 N16 R16 U16 W16 W17

W18

M11 M12 M14 M15 N7 N8 N9 N10 N11 N12 P14 P15 T14 T15 V14 V15 W8

E12 F14

AA6 AA7 AA8

AA9 AA10 AA11 AA12 AA13 AA16

AA17 AA18

AB1

AB2

AB4

AB6

AB8 AB11 AB13 AB15 AB17

AB18

AC1 AC2 AC4 AC6

AC8 AC11 AC13 AC15 AC17 AC18

E8

P4 P5 T4 T5 V4 V5 Y4 Y5

1P2V/1P1V_1 1P2V/1P1V_2 1P2V/1P1V_3 1P2V/1P1V_4 1P2V/1P1V_5 1P2V/1P1V_6 1P2V/1P1V_7 1P2V/1P1V_8

1P2V/1P1V_9 1P2V/1P1V_10 1P2V/1P1V_11 1P2V/1P1V_12

SSD_FORCE_ROM_H FSH_VREF_I

UART_RX_I_S UART_TX_I_S

SSD_FORCE_ROM_T2

VCCFQ_I

VCCF_I

VDD_I VDDQ_I

1.8V/1.2V 2A

+1.8V_1.2VDX_SSD

0.9V/1.1V/1.2V 2A

SSD_ALERT#

USSD1C

NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11

DNU_41 DNU_42 DNU_43 DNU_44 DNU_45 DNU_46 DNU_47 DNU_48 DNU_49

DNU_50 DNU_51 DNU_52 DNU_53 DNU_54 DNU_55 DNU_56 DNU_57 DNU_58 DNU_59 DNU_60

DNU_61 DNU_62 DNU_63 DNU_64 DNU_65 DNU_66 DNU_67 DNU_68 DNU_69 DNU_70 DNU_71

S-SUN_PM971

@

+SSD_PWR_3

A1

DNU_1

A2

DNU_2

A4

DNU_3

A6

DNU_4

A8

DNU_5

A11

DNU_6

A13

DNU_7

A15

DNU_8

A17

DNU_9

A18

DNU_10

B1

DNU_11

B2

DNU_12 DNU_13 DNU_14 DNU_15 DNU_16 DNU_17 DNU_18 DNU_19 DNU_20

DNU_21 DNU_22 DNU_23 DNU_24 DNU_25 DNU_26 DNU_27 DNU_28 DNU_29 DNU_30

DNU_31 DNU_32 DNU_33 DNU_34 DNU_35 DNU_36 DNU_37 DNU_38 DNU_39 DNU_40

DNU_72 DNU_73 DNU_74

SSD_FORCE_ROM_I

B4 B6 B8 B11 B13 B15 B17 B18

C6 C9 C10 C11 C12 D12 E16 E17 E18

SSD_FORCE_ROM_T1_S

G16

G17 G18 J16 J17 J18 Y7 Y8 Y12

DDR_VREF_I

Y14 Y15

C16

VCCK_I

C17 C18

Title

P068 - 1620 BGA SSD

Size Document Numb er Rev

LA-G172P

Date: Sheet of

1

GND_53 GND_54

GND_55 GND_56 GND_57 GND_58 GND_59

GND_60 GND_61

GND_62 GND_63 GND_64 GND_65 GND_66 GND_67

GND_68 GND_69 GND_70 GND_71 GND_72

GND_73 GND_74

GND_75 GND_76

GND_77 GND_78

GND_79 GND_80 GND_81 GND_82 GND_83

GND_84 GND_85

GND_86 GND_87

GND_88 GND_89 GND_90 GND_91 GND_92 GND_93

GND_94

GND_95 GND_96

GND_97

GND_98

GND_99 GND_100 GND_101 GND_102 GND_103

GND_104 GND_105

1

1 1

CLK_PCIE_P2_R

CLK_PCIE_N2_R

TP81

TP79 TP86

68 101Friday, May 24, 2019

1 2

USSD1B

C1

GND_1

C2

GND_2

C3

GND_3

C4

GND_4

C5

GND_5

C15

GND_6

D6

GND_7

D11

GND_8

E1

GND_9

E2

GND_10

E3

GND_11

E4

GND_12

E5

GND_13

E6

GND_14

E7

GND_15

E11

GND_16

E14

GND_17

E15

GND_18

F6

GND_19

G1

GND_20

G2

GND_21

G3

GND_22

G4

GND_23

G5

GND_24

G9

GND_25

G10

GND_26

G14

GND_27

G15

GND_28

H9

GND_29

H10

GND_30

J1

GND_31

J2

GND_32

J3

GND_33

J4

GND_34

J5

GND_35

J9

GND_36

J10

GND_37

J14

GND_38

J15

GND_39

K7

GND_40

K8

GND_41

K9

GND_42

K10

GND_43

K11

GND_44

K12

GND_45

L1

GND_46

L2

GND_47

L3

GND_48

L4

GND_49

L5

GND_50

L14

GND_51

L15

GND_52

S-SUN_PM971 @

Compal Electronics, Inc.

1

M9 M10

N1 N2 N3 N4 N5

N14 N15

P7 P8 P9 P10 P11 P12

R1 R2 R3 R4 R5

R9 R10

R14 R15

T9 T10

U1 U2 U3 U4 U5

U9 U10

U14 U15

W1 W2 W3 W4 W5 W6

W11

W14 W15

Y11

Y13

AA1 AA2 AA3 AA4 AA5

AA14 AA15

PAD~D

PAD~D PAD~D

TP@

TP@ TP@

1.0 (A00)

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P065 - Reserve

LA-G172P

1.0 (A00)

69 101Friday, May 24, 2019

1

69 101Friday, May 24, 2019

Vinaﬁx.com

5

4

3

2

1

Card Reader

D D

@

CLK_PCIE_N4(9)

CLK_PCIE_P4(9)

1 2

R6090 0_0402_5%

@

1 2

R6089 0_0402_5%

CLK_PCIE_N4_R

CLK_PCIE_P4_R

PVT_06

C C

0.1U_0201_10V6K

1

CR6

2

PCIE_PTX_DRX_P16(12)

PCIE_PTX_DRX_N16(12) PCIE_PRX_DTX_P16(12) PCIE_PRX_DTX_N16(12)

MEDIACARD_IRQ#_R(10)

4.7U_0402_6.3V6M

CR5

1

2

1)Placing the RTS5242 chip and flash card socket locate to suit trace routing for SI / EMI / ESD.

2)Keep bulk and de-coupling capacitors as close as possible to the RTS5242 chip and flash card socket.

■ Bulk capacitor for Card_3V3 place closed to flash card socket.

■ Bulk capacitor for 3V3_IN / 3V3aux / DV12S place closed to RTS5242 chip.

3)Keep damping resistor (ex, for SD CLK / MS CLK) as close as possible to the RTS5242 chip.

4)Keep these capacitors for SD card / MS card signals as close as possible to flash card socket.

+3VS_CR +3VS_CR

0.1U_0201_10V6K

4.7U_0402_6.3V6M

1

CR20

CR23

2

11

UCR1

27

12

0.1U_0201_10V6K

10U_0402_6.3V6M

1

CR8

CR7

2

DVT1_19

PCH_PLTRST#_EC(11,46,48,52,58,66,67,68,79)

CLKREQ_PCIE#4(9)

CR1 0.1U_0201_10V6K

1 2

CR2 0.1U_0201_10V6K

1 2

CR3 0.1U_0201_10V6K

1 2

CR4 0.1U_0201_10V6K

1 2

RR12 0_0201_5%@

1 2

+3VS_CR

1 2

RR11 10K_0201_1%

Close to UR1

CR9 0.1U_0201_10V6K

1 2

+SD_VDD2

1 2

RR1 6.2K_0402_1%

CLK_PCIE_P4_R CLK_PCIE_N4_R

PCIE_PTX_C_DRX_P16 PCIE_PTX_C_DRX_N16 PCIE_PRX_C_DTX_P16 PCIE_PRX_C_DTX_N16

CD_WAKE#

SD_CD#

DV12S

RREF

Close to UR1

1 2

5 6

3 4 7 8

32 31 30

10 14

13

9

PERST# CLK_REQ#

REFCLKP REFCLKN

HSIP HSIN HSOP HSON

WAKE# MS_INS# SD_CD#

AV12 DV12S

SD_VDD2

RREF

CARD_3V3

3V3_IN

3V3aux

RTS5242

SD_LN1_P

SD_LN1_M

SD_LN0_P

SD_LN0_M

E-PAD

RTS5242-GR_QFN32_4X4-S

33

12

DV33_18

18

DV33_18

SP1 SP2 SP3 SP4 SP5 SP6 SP7

SDREG2

GPIO

SD_RCLK_P_L

16

SD_CLK_L

17

SD_CMD_L

19

SD_D3_L

20

SD_D2_L

21

SP7_SDWP

29

22 23

26 25

24 28

If GPIO not use for LED function, must be pull-high (Layout guide)

SD_RCLK_M_L

15

RR2 0_0201_5%@

1 2

RR3 0_0201_5%@

1 2

RR4 0_0201_5%@

1 2

RR6 0_0201_5%@

1 2

RR8 0_0201_5%@

1 2

RR9 0_0201_5%@

1 2

SD_LN1_P SD_LN1_M

SD_LN0_P SD_LN0_M

1 2

12

+SD_VDD1

CR151U_0201_6.3V6M

EMC@

SD_REG2

RR1010K_0201_1%

SD_RCLK_M SD_RCLK_P SD_CLK SD_CMD SD_D3 SD_D2

+3VS_CR

1

2

1

CR19 1U_0201_6.3V6M

2

DVT1_19

2.2P_0201_50V8C

CR18

@EMC@

EMC@

CR16

2.2P_0201_50V8C

CR17

2.2P_0201_50V8C

1

@EMC@

2

1

@EMC@

2

CR11

2.2P_0201_50V8C

CR13

2.2P_0201_50V8C

1

@EMC@

2

CR10

2.2P_0201_50V8C

1

@EMC@

2

DVT1_12

B B

+SD_VDD1

EVT1_04

For GPIO control SD_WP

SP7_SDWP

HOST_SD_WP#(10)

A A

5

4

QR1 PJQ1900_DFN3L

1 3

D

S

G

2

DVT1_44

Close to JCR1

0.1U_0402_10V7K

10U_0402_6.3V6M

CR21

2

12

3

+SD_VDD2

CR25

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.1U_0402_10V7K

4.7U_0402_6.3V6M

CR24

1

CR22

2

SD_D2 SD_D3 SD_CMD

SD_CLK

SD_RCLK_P SD_RCLK_M SD_CD#

SD_LN0_P SD_LN0_M

SD_LN1_M SD_LN1_P

Compal Secret Data

2014/09/08 2013/10/28

Compal Secret Data

JCR1

1

DAT2

2

CD/DAT3

3

CMD

4

VDD1

5

CLK

6

VSS_1

7

DAT0/RCLK+

8

DAT1/RCLK-

9

CD

10

VDD2

11

SWIO

12

VSS_2

13

D0+

14

D0-

15

VSS_3

16

D1-

17

D1+

18

VSS_4

T-SOL_158-9090302600

CONN@

Deciphered Date

2

GND_1 GND_2 GND_3 GND_4

19 20 21 22

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet of

Compal Electronics, Inc.

P070 - Card reader uSD RTS5242

LA-G172P

1

70 101Friday, May 24, 2019

1.0 (A00)

EVT2_02

Vinaﬁx.com

A

TS&WLAN

+3VALW

1

C240 1U_0201_6.3V6M

2

+3VALW

1

C235 1U_0201_6.3V6M

2

TS_EN_R

3.3V_TS_EN( 58)

PCH_3.3V_TS_EN(1 0)

DVT1_19

EC PCH

1 1

SLP_WLAN#_GATE(58)

SIO_SLP_WLAN#(11,71)

AUX_EN_WOWL(58)

100K_0201_5%

EVT1_04

DVT1_44

R322

+3VALW

1 3

D

12

100K_0201_5%

2

G

SLP_WLAN#_M

S

Q124 PJQ1900_DFN3L

+3V_PRIM

12

R617

R616

@

20K_0201_5%

R6168 0_0 201_5%@ R672 0_0201_5%@

DVT1_21

+3VS

R220100K_0201_5% @

12

R6194100K_ 0201_5%

12

1 2 1 2

RE321 0_0201_1%

1 2

@

D23

2

1

3

BAT54CW_SOT323-3

@

1 2

RE322 0_0201_1%

+3VALW

TS_EN_R

+5VALWB

WLAN_PWR_EN

+3VALW

WLAN_PWR_EN_EC

R6137

100K_0201_5%

1 2

DVT2_13

U34

1

VOUT1_1

VIN1_1

2

VOUT1_2

VIN1_2

3

CT1

ON1

4

GND

VBIAS

5

ON2

CT2

6

VIN2_1

VOUT2_1

7

VIN2-2

VOUT2_2

GPAD

JW7110DFNC-TRPBF_DFN14_3X2

WLAN_PWR_EN

@

1 2

R533 0_0201_5%

+3VS_TS_R

14 13

C224 2200P_0402_25V7K

12

11

C237 2200P_0402_25V7K

10

+3VS_WLAN_R

9

R222 0_0402_ 5%@

8

R620 0_0402_ 5%@

15

1 2

1 2 1 2

EC request to reserve OR gate for WLAN power enable

SSD_PWR_1

+3VALW

DVT1_19

EVT2_24

SSD_SCP_PWR_EN rise time same as RUN_ON _P

1

C1678 1U_0201_6.3V6M

2

SSD_SCP_PWR_EN(58,78)

SSD_PWR1_EN_R

R6166 0_0201_ 5%@

1 2

+3VALW

SSD_PWR1_EN_R

R61851 00K_0201_5%

12

+5VALWB

VIN_1

2

VIN_2

3

ON

4

VBIAS

AOZ1336DI_DFN8_2X2

U733

1

VOUT_1 VOUT_2

GND_1 GND_2

7 8

6

CT

5 9

+3.3VDX_SSD_R

R6133 0_0603_5%@

1 2

C1676 0.01 U_0402_16V7K

1 2

B

F4 1A_65V_T0603FF1000T M

21

+3.3VDX_SSD

+3VS_TS

+3VS_WLAN

SIO_SLP_WLAN#(11,71)

CNVI_EN#(10,52)

+3.3VDX_SSD

+3VS_TS

1

2

+3VS_WLAN

1

2

1

C1675

0.1U_0201_10V6K

2

C223

0.1U_0201_10V6K

C233

0.1U_0201_10V6K

R529

75K_0201_5%

12

+3VALW

12

R532

75K_0201_5%

WLAN_PWR_EN_PCH WLAN_PWR_EN

13

D

Q350

2

PJQ1900_DFN3L

G

S

EVT1_04

@

1 2

R534 0_0201_5%@

DVT1_44

C

1.8VS

1.8VS_AUDIO

5VS_AUDIO

1 2

D

+5VS_AUDIO

+1.8VS

1

2

+1.8VS_AUDIO

1

2

C248

0.1U_0201_10V6K

C276

0.1U_0201_10V6K

+5VS_AUDIO

1

2

+1.8V_PRIM +1.8VS

UC24

1

VIN_1

2

RUN_ON_P_1P8VS

+5VALW

AUD_PWR_EN(10,71)

+5VALW

AUD_PWR_EN

VIN_2

3

ON

4

VBIAS

AOZ1336DI_DFN8_2X2

+1.8V_PRIM +1.8VS_AUDIO

UC25

1

VIN_1

2

VIN_2

3

ON

4

VBIAS

AOZ1336DI_DFN8_2X2

U36

1

+5VALW

VIN_1

2

VIN_2

3

ON

4

VBIAS

AOZ1336DI_DFN8_2X2

VOUT_1 VOUT_2

GND_1 GND_2

VOUT_1 VOUT_2

GND_1 GND_2

VOUT_1 VOUT_2

GND_1 GND_2

CT

+1.8VS_R

7

R441 0_0603_5%@

8

6

5 9

+1.8VS_AUDIO_R

7

R211 0_0603_5%@

8

6

5 9

+5VS_AUDIO_R

7 8

C245 3300P_0402_25V7K

6

CT

5 9

1 2

C4189 22 00P_0402_25V7K

1 2

C234 4700P_0402_16V7K

1 2

R716

@

1 2

0_0805_5%

1 2

EVT1_22

DVT1_08

DVT1_19

+1.8V_PRIM

1

C252 1U_0201_6.3V6M

2

RUN_ON_P

C256

1U_0201_6.3V6M

R6170 0_0 201_5%@

+1.8V_PRIM

1

2

RUN_ON_P(58,71,78)

DVT1_19

+5VALW

1

C246 1U_0201_10V6M

2

DVT1_20

C278

0.1U_0201_10V6K

E

2 2

+3VS

R232 10K_0201_5%

1 2

R600 10K_0201_5%@

1 2

AUD_PWR_EN

5VBS

SSD_PWR_3

C4204 1U_0201_10V6M

RUN_ON_P_5VBSRUN_ON_P

RUN_ON_P_5VS

+5VALWB

U735

1

VIN_1

2

VIN_2

3

ON

4

+5VALWB

VBIAS

AOZ1336DI_DFN8_2X2

+SSD_PWR2 +1.8V_1.2V_SSD

U734

1

VIN_1

2

VIN_2

3

ON

4

VBIAS

AOZ1336DI_DFN8_2X2

R61841 00K_0201_5%

12

+SSD_PWR2

+SSD_PWR3

SSD_PWR3_EN_RSSD_PWR3_EN

1

C4211 1U_0201_6.3V6M

2

1

C1684 1U_0201_6.3V6M

2

SSD_PWR3_EN(58)

DVT1_19

3 3

SSD_PWR3_EN_R

R6164 0_0 201_5%@

1 2

DVT1_19

R6193 0_0 201_5%@

SSD_PWR2_EN(58)

SSD_PWR2_EN_R

1 2

12

SSD_PWR2_EN_RSSD_PWR2_EN

R61831 00K_0201_5%

VOUT_1 VOUT_2

GND_1 GND_2

VOUT_1 VOUT_2

GND_1 GND_2

CT

+SSD_PWR_3_R

7 8

R6136 0_0603_5%@

1 2

6

C1683 0.01U_0402_16V7K

1 2

5 9

+1.8V_1.2V_SSD_R

7

R6135 0_0603_ 5%@

8

1 2

C4209 470P_0402_50V7K

6

1 2

5 9

EVT1_28

+SSD_PWR_3 +SSD_PWR_3+SSD_PWR3

1

C1681

0.1U_0201_10V6K

2

5VSSSD_PWR_2(GEN 2)

+1.8V_1.2V_SSD

1

C4210

0.1U_0201_10V6K

2

+5VALWB

DVT1_20

1

C4212 1U_0201_10V6M

2

RUN_ON_P(58,71,78)

RUN_ON_P

R6199 0_0 201_5%@

1 2

R6181 0_0 201_5%@

+5VALW

1

2

DVT1_20

1 2

U60

1

VIN_1

2

VIN_2

3

ON

4

VBIAS

AOZ1336DI_DFN8_2X2

+5VALW +5VS +5VS

UC28

1

VIN_1

2

VIN_2

3

ON

4

VBIAS

AOZ1336DI_DFN8_2X2

VOUT_1 VOUT_2

GND_1 GND_2

VOUT_1 VOUT_2

GND_1 GND_2

CT

+5VBS_R

7

R670 0_0603_5%@

8

C4213 220P_0402_50V8K

1 2

6

5 9

+5VS_R

7

1 2

8

R6182 0_0603_5%

C4205 2200P_0402_25V7K

1 2

6

5 9

1 2

@

+5VBS

1

C4207

0.1U_0201_10V6K

2

1

C801

0.1U_0201_10V6K

2

CAMERA

DVT1_20

R704 10K_0201_5%@

3.3V_CAM_EN_R

R6162 10K_ 0201_5%

3.3V_CAM_EN(6)

4 4

Card Reader

+3VS

R666 100K_0 201_5%

1 2

R667 100K_0 201_5%

@

1 2

SD_PWR_EN(12)

SD_PWR_EN_R

A

+3VALW+5VALW

1

C4231 1U_0201_10V6M

2

1

C4199 1U_0201_6.3V6M

2

DVT1_19

+3VS

12 12

3.3V_CAM_EN 3.3V_CAM_EN_R

R6163 0_0 201_5%@

1 2

+3VALW

1

C4216 1U_0201_6.3V6M

2

DVT1_19

R6171 0_0 201_5%@

1 2

+3V_5V_CAM_PWR

SD_PWR_EN_R

+3VALW

+5VALW

+3VALW

R694 0_0402_5%@

1 2

R720 0_0402_5%@

1 2

U55

5

OUT

IN

GND

4

EN

SY6288C20AAC_SOT23-5

UC31

5

OUT

IN

GND

4

OC

EN

SY6288C20AAC_SOT23-5

1

2

3

OC

1

2

3

+3V_5V_CAM_PWR

+CAM_PWR_R

+3VS_CR_R

1 2

R669 0_0603_5%

+CAM_PWR

R6161 0_0603_5%@

1 2

+3VS_CR +3VS_CR

@

B

+3VS_CR

+CAM_PWR

1

2

1

C4217 10U_0402_10V6M

2

C4197 10U_0402_10V6M

+CAM_PWR

1

C800

0.1U_0201_10V6K

2

1

C4198

0.1U_0201_10V6K

2

3VS

3VS_AUDIO

C

+3VALW

DVT1_19

1

C229 1U_0201_6.3V6M

2

+3VALW

UC30

1

VIN_1

2

RUN_ON_P

R6169 0_0 201_5%@

+3VALW

1 2

1

C243 1U_0201_6.3V6M

2

RUN_ON_P(58,71,78)

RUN_ON_P_3VS

AUD_PWR_EN

DVT1_19

D

VIN_2

3

ON

4

VBIAS

AOZ1336DI_DFN8_2X2

+3VALW

U51

1

VIN_1

2

VIN_2

3

ON

4

VBIAS

AOZ1336DI_DFN8_2X2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS_R

7

VOUT_1 VOUT_2

GND_1 GND_2

R216 0_0603_5%@

8

1 2

C227 1000P_0402_25V8J

1 2

6

CT

5 9

+3VS_AUDIO_R

7 8

6

CT

5 9

R227 0_0603_5%@

1 2

C244 1000P_0402_25V8J

1 2

Compal Secret Data

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

+3VS

+3VS_AUDIO

+3VS

1

C230

0.1U_0201_10V6K

2

+3VS_AUDIO

1

C277

0.1U_0201_10V6K

2

Compal Electronics, Inc.

Title

P071 - DC/DC

Size Document Number Rev

LA-G172P

Date: Sheet of

E

71 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2014/09/08 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P072 - Reserve

LA-G172P

1.0 (A00)

72 101Friday, May 24, 2019

1

72 101Friday, May 24, 2019

Vinaﬁx.com

A

To LEFT Type-C Connector

To RIGHT Type-C Connector

SW_TBT_L_USB20_P1

SW_TBT_L_USB20_N1

SW_TBT_L_USB20_P2

SW_TBT_L_USB20_N2

SW_TBT_R_USB20_P1

SW_TBT_R_USB20_N1

SW_TBT_R_USB20_P2

SW_TBT_R_USB20_N2

NC

0-ohm

1

A_IN

2

B0_OUT

8

9

USB20_P8

USB20_N8

To PCH & PD_L

USB/I2C

B_IN

A_IN

MUX_L

A0_OUT

B0_OUT

3

4

1

2

17

UPD_L_SMBDAT

18

UPD_L_SMBCLK

8

USB20_P9

9

USB20_N9

0-ohm

To PCH & PD_R

USB/I2C

B_IN

MUX_R

A0_OUT

4

3

17

UPD_R_SMBDAT

18

UPD_R_SMBCLK

0-ohm

+3VALW

G

D S

0-ohm

+3VALW

G

D S

NC

+3VALW

2.2K-ohm 2.2K-ohm

UPD_SMBDAT

UPD_SMBCLK

B4

C3

SMB04

EC

GPIO225

GPIO214

F10

UPD_L_SMBINT#

F5

UPD_R_SMBINT#

100K-ohm

+3VALW

100K-ohm

+VCC3V3_TBT_L_LDO

10K-ohm

I2C3_PD_L_CLK_R

I2C3_PD_L_DAT_R

I2C3_PD_L_INT#_R0-ohm

0-ohm

NC

I2C3_PD_L_INT#

I2C3_PD_L_DAT

I2C3_PD_L_CLK

21

22

23

I2C3_INT#

SML1_SMBDATA

1 1

+3V_PRIM

SML1

DL22

DN22

1K-ohm

SML1_SMBCLK_R

+3V_PRIM

1K-ohm

0-ohmSML1_SMBDATA_R

0-ohm

SML1_SMBCLK

0-ohm TBT_L_SMBDAT

NC

0-ohm

NC

PCH

NC

0-ohm

SML0

DJ24

DK24

SML0_SMBDATA

SML0_SMBCLK

499-ohm

0-ohm I2C_RT_L_SDA

I2C_RT_L_SCL

0-ohm

TBT_L_SMBCLK

0-ohm I2C_RT_R_SDA

I2C_RT_R_SCL

0-ohm

TBT_R_SMBDAT

TBT_R_SMBCLK

100K-ohm

E7

I2C

C9

B7

A7

E7

C9

B7

A7

BB_L

SMB I2C_INT#

I2C

BB_R

SMB

I2C_INT#

A10

I2C_RT_L_INT#

A10

I2C_RT_R_INT#

NC

0-ohm

UPD_SMBDAT_Q

UPD_SMBCLK_Q

SML1_SMBDATA

SML1_SMBCLK

UPD_SMBDAT_Q

UPD_SMBCLK_Q

SML1_SMBDATA

SML1_SMBCLK

+VCC3V3_TBT_R_LDO

10K-ohm

0-ohm I2C1_PD_L_DAT

I2C1_PD_L_CLK

0-ohm

0-ohm I2C2_PD_L_DAT

I2C2_PD_L_CLK

0-ohm

0-ohm I2C1_PD_R_DAT

I2C1_PD_R_CLK

0-ohm

0-ohm I2C2_PD_R_DAT

I2C2_PD_R_CLK

0-ohm

28

I2C1

27

33

32

28

27

PD_L

I2C2

I2C1

PD_R

I2C2

I2C3_INT#

22

23

I2C3_PD_R_DAT

I2C3_PD_R_INT#

33

32

PD I2C3 for TGL use

I2C3

I2C1_INT#

I2C2_INT#

I2C1_INT#

I2C2_INT#

I2C3

21

PD I2C3 for TGL use

I2C3_PD_R_CLK

29

I2C1_PD_L_INT#

34

I2C2_PD_L_INT#

29

I2C1_PD_R_INT#

34

I2C2_PD_R_INT#

0-ohm

100K PD for non-Vpro use

GPP_B11

+3V_PRIM

10K-ohm

CL39

GPP_B11 0-ohm TBT_I2C_INT#

NC

0-ohm

I2C3_PD_R_INT#_R

I2C3_PD_R_DAT_R

I2C3_PD_R_CLK_R

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0-ohm

NC

0-ohm

NC

0-ohm

NC

Compal Secret Data

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Date: Sheet of

Compal Electronics, Inc.

P073 -TBT I2C/SML block diagram

LA-G172P

73 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

A

ACC2

ACC2_INT#

NB_MODE#

ISH_GP4#

ISH_GP0

ISH_GP1

ISH_GP2

PCH

ISH_GP3

ISH_GP4

ISH_GP5

ISH_GP6

ACC1_INT1#

ACC1

ACC1_INT2#

+3V_NB_LID

NB LID

NB_LID#

TAB_LID#

TAB LID

ISH_GP7

UFCAM moduleMiddle Board

ALS_ALERT#

1 1

non-RGB ALS AMS2591

ESPI

EC

ISH_GP4#

NB_MODE#

GPIO222

GPIO202

GPIO126

GPIO115

TAB_LID#

NB_LID#

GPIO161 (VCI_IN2#)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Nu mber Rev

Date: Sheet of

Compal Electronics, Inc.

P074 - Sensor block diagram

LA-G171P

74 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

(8) +3VALW

100k-ohm

(5) B+

(4) +CHG_VIN_20V

D D

VIN

CHARGER

VOUT

ACOK

(6) ACAV_IN

(8) 3VALW_PG

(8) 5VALW_PG

(8) 5VALWB_PG

0-ohm

(8) ALW_PWRGD_3V_5V

(7) ALWON

(1) +TBT_VBUS_L_PD

Type-C Port-L

(4) +CHG_VIN_20V

VIN

LDO_3V3

PD_L

VIN_3V3

(1) +TBT_VBUS_R_PD

(0) +3.3V_BAT_LDO

(8) +3VALW

(2)+VCC3V3_TBT_L_LDO

Type-C Port-R

VIN_3V3

Level Shifter

VIN

LDO_3V3

PD_R

(11) PCH_DPWROK

(12) SIO_SLP_SUS#

(18) PCH_RSMRST#

(8) ALW_PWRGD_3V_5V

(20) ESPI_RESET#

(21) ESPI_IO

(22) AC_PRESENT

(24) SIO_PWRBTN#

(25) SIO_SLP_S5#

(26) SIO_SLP_S4#

(27) SIO_SLP_S3#

(35) IMVP_VR_ON_P

(4) +CHG_VIN_20V

(9) +3VALW_DSW

(9) +3V_PRIM

C C

ROM

(13) +1.8V_PRIM

(14) +VCC1.05_OUT_PCH

(14) +VCC1.05_OUT_FET

(27) SIO_SLP_S0#

(8) +3VALW

10k-ohm

(15) CORE_VID0

10k-ohm

(15) CORE_VID1

B B

(27) CPU_C10_GATE#

(15) CORE_VID0

(15) CORE_VID1

VCCST_OVERRIDE_R

(26) +3VS

100k-ohm

VCC_DSW3P3

VCC_PRIM3P3

SPI

VCCPRIM_1P8

VCCPRIM_1P05

VCC1P05

SLP_S0#

CPU_C10_GATE#

ICL U PCH

CORE_VID0

CORE_VID1

VCCST_OVERRIDE

(38) CPUPWRGD

DSW_PWR OK

SLP_SUS#

(19) PCH_RSMRST#_AND

RSMRST#

ESPI_RESET#

ESPI_IO

ACPRESENT

PWRBTN#

SLP_S5#

SLP_S4#

SLP_S3#

(35) VCCST_PWRGD

VCCST_PWRGD

(2)+VCC3V3_TBT_R_LDO

(34) IMVP_VR_ON_EC

(3) +RTCVCC_R

VBAT

GPIO_020

GPIO_230

RSMRST#

GPIO_061 ESPI_RESET#

ESPI_IO

GPIO_233

GPIO_113

GPI0_040

GPIO_026

GPIO_032

GPIO_031

(8) +3VALW

100K-ohm

GPIO_024 nRESETI

(10) RESET_IN# 10ms Delay

EC 5105

GPIO_164 VCI_OVRD_IN

GPIO_163/VCI_IN0#

VCI_OUT

(7) ALWON

GPIO_012

GPIO_227

GPIO_045

(8)VCCDSW_EN

(17) PRIM_PWRGD

(23) POWER_SW_IN#

(5) B+

VIN

+3VALW

VOUTEN

(5) B+

VIN

+5VALW

VOUTEN

(5) B+

VIN

+5VALWB

VOUTEN

(8) +3VALW

100K-ohm

(15) CORE_VID0 (15) CORE_VID1

(27) SIO_SLP_S3# VCCST_OVERRIDE_R

(MIPI60 debug use only)

(28) RUN_ON_EC

(27) SIO_SLP_S3#

(8) 3VALW_PG

PG

(8) +3VALW

(8) 5VALW_PG

PG

(8) +5VALW

(8) 5VALWB_PG

PG

(8) +5VALWB

0-ohm

(8)VCCDSW_EN_GPIO

0-ohm

Power Button

(16)VCCIN_AUX_CORE_VID

SLP_VCCST_OVRD

(27) CPU_C10_GATE#

(29) RUN_ON_P

(8)VCCDSW_EN_GPIO (9)+3VALW_DSW

(8)VCCDSW_EN_GPIO

(12) SIO_SLP_SUS#

(14) 1.8V_PRIM_PG

(26) SIO_SLP_S4#

LPDDR4x POP

0-ohm

(17) VCCST_EN

(30) VCCSTG_EN

(27) CPU_C10_GATE#

(37) PCH_PWROK_P

(39) SYS_PWROK

PCH_PWROK

SYS_PWROK

PLTRST#

(41) PCH_PLTRST#_EC(40) PCH_PLTRST#

GPIO_064/LRESET#

(32) +3VS

(39) SYS_PWROK

GPIO_106/PWROK

GPIO_057/VCC_PWRGD

(33) RUNPWROK (ALL_SYS_PWRGD)

10K-ohm

MOS

(29) RUN_ON_P (32) +5VS/+5VBS

(29) RUN_ON_P

(8) +3VALW

VIN

+3VALW_DSW

VOUT

EN

(8) +3VALW

VIN

+3V_PRIM

(9) +3V_PRIM

VOUTEN

(5) B+

VIN

(14) 1.8V_PRIM_PG

PG

+1.8V_PRIM

EN

VOUT

(13) +1.8V_PRIM

(5) B+

VIN

(17) VCCIN_AUX_VR_PG

PG

+VCCIN_AUX

(16) +VCCIN_AUX

VOUT

EN

(5) B+

VIN VIN

+1.1V_MEM

(31) +1.1V_MEM

VOUT

EN

(5) B+

VIN

(26) SIO_SLP_S4#

+0.6V_VDDQ

(31) +0.6V_VDDQ

VOUT

EN

(14) +VCC1.05_OUT_FET

VIN

+VCCST_CPU

EN

(14) +VCC1.05_OUT_FET

+VCCSTG_CPU

EN

(13) +1.8V_PRIM

+VCC1P8A

EN

(7) +3VALW

EN

(5) B+

+SSD_PWR2

EN

(18) +VCCST_CPU

VOUT

VIN

(32) +VCCSTG_CPU

VOUT

VIN

(32) +VCC1P8A

VOUT

VIN VIN

(30) VCCSTG_EN

(29) RUN_ON_P

+3VS

VOUT

(32) +3VS

(32) +SSD_PWR2

(29) RUN_ON_P

(8) +3VALW

100k -ohm

(13) +1.8V_PRIM

+1.8V_MEM

EN

(27) +1.1V_MEM

+VCC_SFR_OC

EN

(13) +1.8V_PRIM

EN

(7) +5VALW

+5VS/+5VBS

EN

+SSD_PWR3

EN

VIN

+1.8VS

(5) B+

VINVIN

(31) +1.8V_MEM

VOUT

(32) +VCC_SFR_OC

VOUT

(32) +1.8VS

VOUT

(32) +SSD_PWR3

VOUT

(5) B+

A A

VIN

(37) PCH_PWROK_P

PG

+VCCIN

(35) IMVP_VR_ON_P

EN

VOUT

(36) +VCCIN

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

P075 - AC_Power up Sequence

LA-G172P

1

75 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

(5) +3VALW

100k-ohm

(5) 3VALW_PG

(5) 5VALW_PG

(5) 5VALWB_PG

D D

(2) B+

VOUT

0-ohm

(5) ALW_PWRGD_3V_5V

(4) ALWON

CHARGER

(4) ALWON

(1) +RTCVCC_R

(2) B+

VIN

+3VALW

(2) B+

VIN

+5VALW

(2) B+

PG

VOUTEN

PG

VOUTEN

(5) 3VALW_PG

(5) +3VALW

(5) 5VALW_PG

(5) +5VALW

(5) VCCDSW_EN_GPIO (6) +3VALW_DSW

(5) VCCDSW_EN_GPIO

(0) +3.3V_BAT_LDO

(5) +3VALW

VBAT

(6) +3VALW_DSW

(6) +3V_PRIM

C C

ROM

VCC_DSW3P3

VCC_PRIM3P3

SPI

DSW_PWR OK

SLP_SUS#

RSMRST#

ESPI_RESET#

ESPI_IO

(16) PCH_RSMRST#_AND

(8) PCH_DPWROK

(9) SIO_SLP_SUS#

(15) PCH_RSMRST#

(5) ALW_PWRGD_3V_5V

(17) ESPI_RESET#

(18) ESPI_IO

GPIO_020

GPIO_230

RSMRST#

GPIO_061 ESPI_RESET#

ESPI_IO

(5) +3VALW

100K-ohm

GPIO_024 nRESETI

(7) RESET_IN# 10ms Delay

VCI_OUT

(4) ALWON

GPIO_012

GPIO_227

(5) VCCDSW_EN

(14) PRIM_PWRGD

VIN

+5VALWB

(5) +3VALW

100K-ohm

PG

VOUTEN

0-ohm

(5) 5VALWB_PG

(5) +5VALWB

0-ohm

(5)VCCDSW_EN_GPIO

(9) SIO_SLP_SUS#

(11) 1.8V_PRIM_PG

(21) SIO_SLP_S4#

LPDDR4x POP

0-ohm

(5) +3VALW

VIN

+3VALW_DSW

VOUT

EN

(5) +3VALW

VIN

+3V_PRIM

VOUTEN

(6) +3V_PRIM

(5) +3VALW

(2) B+

VIN

+1.8V_PRIM

EN

(2) B+

VIN

(11) 1.8V_PRIM_PG

PG

(10) +1.8V_PRIM

VOUT

(14) VCCIN_AUX_VR_PG

PG

100k -ohm

(5) +3VALW

100k -ohm

+VCCIN_AUX

(13) +VCCIN_AUX

VOUT

EN

(2) B+

VIN VIN

+1.1V_MEM

(26) +1.1V_MEM

VOUT

EN

(2) B+

VIN

(21) SIO_SLP_S4#

(11) +1.8V_PRIM

+1.8V_MEM

VOUT

EN

(26) +1.8V_MEM

+0.6V_VDDQ

(26) +0.6V_VDDQ

VOUT

EN

(11) +VCC1.05_OUT_FET

VIN

+VCCST_CPU

(15) +VCCST_CPU

VOUT

EN

(11) +VCC1.05_OUT_FET

VIN

+VCCSTG_CPU

EN

(27) +VCCSTG_CPU

VOUT

(25) VCCSTG_EN

(10) +1.8V_PRIM

VIN

+VCC1P8A

(27) +VCC1P8A

VOUT

EN

(24) RUN_ON_P

(7) +3VALW

VIN VIN

+3VS

(27) +3VS

VOUT

EN

(24) RUN_ON_P

(2) B+

+SSD_PWR2

(27) +SSD_PWR2

VOUT

EN

(24) RUN_ON_P

(2) B+

VIN

(32) PCH_PWROK_P

PG

+VCCIN

(31) +VCCIN

VOUT

EN

(22) +1.1V_MEM

VIN

+VCC_SFR_OC

VOUT

EN

(10) +1.8V_PRIM

VIN

+1.8VS

VOUT

EN

(5) +5VALW

+5VS/+5VBS

VOUT

EN

(2) B+

VINVIN

+SSD_PWR3

VOUT

EN

(27) +VCC_SFR_OC

(27) +1.8VS

(27) +SSD_PWR3

GPIO_045

(3) POWER_SW_IN#

(12) CORE_VID0 (12) CORE_VID1

(22) SIO_SLP_S3# VCCST_OVERRIDE_R

(MIPI60 debug use only)

(23) RUN_ON_EC

(22) SIO_SLP_S3#

Power Button

(13)VCCIN_AUX_CORE_VID

SLP_VCCST_OVRD

(24) RUN_ON_P

(22) CPU_C10_GATE#

(14) VCCST_EN

(25) VCCSTG_EN

(10) +1.8V_PRIM

(11) +VCC1.05_OUT_PCH

(11) +VCC1.05_OUT_FET

(22) SIO_SLP_S0#

(5) +3VALW

10k-ohm

(12) CORE_VID0

(12) CORE_VID1

(22) CPU_C10_GATE#

(12) CORE_VID0

(12) CORE_VID1

VCCST_OVERRIDE_R

B B

(26) +3VS

100k-ohm

VCCPRIM_1P8

VCCPRIM_1P05

VCC1P05

SLP_S0#

CPU_C10_GATE#

ICL U PCH

CORE_VID0

CORE_VID1

VCCST_OVERRIDE

(33) CPUPWRGD

PWRBTN#

SLP_S5#

SLP_S4#

SLP_S3#

VCCST_PWRGD

(30) VCCST_PWRGD

Level Shifter

(19) SIO_PWRBTN#

(20) SIO_SLP_S5#

(21) SIO_SLP_S4#

(22) SIO_SLP_S3#

(30) IMVP_VR_ON_P

(29) IMVP_VR_ON_EC

GPIO_113

GPI0_040

GPIO_026

GPIO_032

GPIO_031

EC 5105

GPIO_163/VCI_IN0#

(22) CPU_C10_GATE#

(32) PCH_PWROK_P

(34) SYS_PWROK

PCH_PWROK

SYS_PWROK

PLTRST#

(36) PCH_PLTRST#_EC(35) PCH_PLTRST#

GPIO_064/LRESET#

(27) +3VS

(34) SYS_PWROK

GPIO_106/PWROK

GPIO_057/VCC_PWRGD

(28) RUNPWROK (ALL_SYS_PWRGD)

10K-ohm

MOS

(24) RUN_ON_P (27) +5VS/+5VBS

(24) RUN_ON_P

A A

(30) IMVP_VR_ON_P

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2

2014/09/08 2013/10/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

P076 - DC_Power up Sequence

LA-G172P

1

76 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

Screw Hole

5

4

3

2

1

ME Spring for 1.13mm cable

JSP1

1

EMIST_SU-15AG

CONN@

D D

ME Spring for 2.50mm cable

JSP4

1

EMIST_CL-XXG0629_1P

CONN@

JSP2

1

EMIST_SU-15AG

CONN@

JSP5

1

EMIST_CL-XXG0629_1P

CONN@

JSP3

1

EMIST_SU-15AG

CONN@

JSP6

1

EMIST_CL-XXG0629_1P

CONN@

Fiducial Mark

FD1

@

1

FIDUCIAL_C40 M80

JSP7

1

EMIST_CL-XXG0629_1P

CONN@

FD2

@

1

FIDUCIAL_C40 M80

1

FD3

@

1

FIDUCIAL_C40 M80

JSP8

1

EMIST_CL-XXG0629_1P

CONN@

FD4

@

1

JSP9

1

EMIST_CL-XXG0629_1P

CONN@

JSP10

1

EMIST_CL-XXG0629_1P

CONN@

DVT1_48

@

CPU X 5

H9

H10

@

H_2P0

1

H_2P0

1

H11

H12

H13

@

H_2P0

1

@

H_2P0

1

@

H_2P4

1

PCB X 17(PTH)

H3

H2

H1

@

H_2P0

1

H_2P0

1

H4

@

H_2P0

1

H6

H5

@

1

@

H_2P4

H_2P0

1

H7

@

1

@

H_2P0

1

H8

H_2P9

1

EVT2_27

H17

@

H_1P9

1

PCB X 2(NPTH)

EVT2_18

C C

H27

@

H_1P3N

1

H19

H18

@

H_1P9

1

H20

@

H_1P9

1

@

H_1P9

1

EVT1_20

H22

H21

@

H_1P9

1

H23

H24

@

H_2P4

1

H25

@

H_2P4

1

@

H_2P4

1

RF X 3

H14

H15

@

H_2P6

1

@

H_2P6

Battery X 1

H16

H_2P6

1

H26 is Battery conn NUT

@

H_2P6

CPU X 1

H44 is CPU NUT

H_2P4

H29

@

H_2P5X5 P5N

EVT2_16

1

EVT2_37

Shielding Frame X 6(NPTH)

H33

H_0P5X2 P3N

1

@

H_0P4X2 P2N

H35

1

H34

@

1

@

H_0P5X2 P3N

H36

1

H_0P5X2 P3N

H37

@

H_0P5X2 P3N

1

PVT_13

EVT2_31

Power button & Finger print

B B

PVT_06

ML18

F2

1 2

HCM1012GH900BP_4P

+3VS_FP

DVT2_09

USB20_P5(12)

USB20_N5(12)

+3VS

+3V_NB_LID

R638 0_0402_5%

R390 0_0402_5%@

+3VS_FP_R

@

12

C2990

1 2

0438.500WR 0.5A 32V UL/CSA

1U_0201_6.3V6M

1

2

EVT2_41

DVT1_19

A A

5

H38

@

H_0P5X2 P3N

1

DVT1_26

R2080_0201_5% @

12

1

2

EMI@

0.1U_0201_10V6K

+3V_NB_LID

2

G

12

1 3

D

QF1

@

PJQ1900_DFN3L

EVT1_04

EVT1_13

2

LID_CL_TS_FP#(11,58)

FPR_DET#(58)

3

1

PWRBTN#(58,79,96)

USB20_P5_R

34

+3VS_FP

C4186

USB20_N5_R

12

D13

D14

100P_0201_50V8J

1

C4183

2

AZ5B75-01B.R7G_CSP0603P2Y2

@EMI@

EMI@

AZ5B75-01B.R7G_CSP0603P2Y2

DVT1_44

PWRBTN#_FPR

S

FPR_SCAN#_R FPR_DET#_R

D16

EMI@

TVNST52302AB0_SOT523-3

DVT1_04

DVT1_78

12

R8080_0201_5% @

R8000_0201_5% @

+3VS_FP

PWRBTN#_FPR USB20_N5_R USB20_P5_R

NB_LID#_FPR FPR_SCAN#_R FPR_DET#_R

JFP1

10

GND_2

9

GND_1

8

7

6

5

4

3

2

1

TWVM_FPC0510-08RC-TAGHA

CONN@

DVT1_29

+3VS_FP

R629

2

G

FPR_SCAN_INT#(58)

1 3

D

QF2 PJQ1900_DFN3L

S

100K_0201_5%

1 2

FPR_SCAN#_R

12

R8010_0201_5% @

4

3

FAN1

FAN2

+3VS

R37

R36

10K_0201_1%

1 2

PWM_FAN1(58)

TACH_FAN1(58)

+3VS

R40

R39

10K_0201_1%

1 2

PWM_FAN2(58)

TACH_FAN2(58)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/09/08 2013/10/28

D132

12

RB751V40_SC76-2

BZT52C6V2LP-7_X1-DFN1006-2-2

1 2

D12

12

RB751V40_SC76-2

BZT52C6V2LP-7_X1-DFN1006-2-2

Compal Secret Data

2

+5VS

R38

10K_0201_1%

1 2

D469

2 1

+5VBS

R41

10K_0201_1%

1 2

D470

2 1

Deciphered Date

2

C4181

1

C1124

0.1U_0402_25V6K~D

LT9

EMI@

1 2

HCB2012KF-800T50_2P

2

C4182

1

0.1U_0402_25V6K~D

C1125

LT10

EMI@

1 2

HCB2012KF-800T50_2P

1 2

10U_0603_25V6M

+5VS_FAN1

10U_0603_25V6M

+5VBS_FAN2

EVT2_23

JFAN1

1

2

3

4

CVILU_CF35042D0RD-NH

CONN@

EVT2_23

JFAN2

1

2

3

4

CVILU_CF35042D0RD-NH

CONN@

5

GND_1

6

GND_2

5

GND_1

6

GND_2

Compal Electronics, Inc.

Title

Size Document Numb er Rev

Date: Sheet of

Compal Electronics, Inc.

P077 - PWRBTN&FPR/SCREW/FAN

LA-G172P

1

77 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

+3VALW_DSW&+3V_PRIM

DVT2_13

+3VALW

1

C216 1U_0201_6.3V6M

+3VALW

2

1

C1469 1U_0201_6.3V6M

2

D D

VCCDSW_EN_GPIO(16)

DVT1_19

VCCDSW_EN_GPIO 3VALW_DSW_EN

+3VALW

R375 100K_0201_5%

1 2

R374 100K_0201_5%@

1 2

+3VALW

@

1 2

RC651 0_0201_5%

+5VALWB

3V_PRIM_EN

@

1 2

RC657 0_0201_5%

+3VALW

DVT1_19

U31

1

VOUT1_1

VIN1_1

2

VOUT1_2

VIN1_2

3

ON1

4

VBIAS

5

ON2

6

VIN2_1

VOUT2_1

7

VIN2-2

VOUT2_2

JW7110DFNC-TRPBF_DFN14_3X2

VCCDSW_EN_GPIO

GND

GPAD

14 13

12

CT1

11

10

CT2

9 8

15

4

+3VALW_DSW_R

R204 0_0603_5%@

1 2

C217 2200P_0402_25V7K

1 2

C1467 2200P_0402_25V7K

1 2

+3V_PRIM_R

R6048 0_0603_5%@

1 2

+3VALW_DSW

+3V_PRIM

+3VALW_DSW

1

2

+3V_PRIM

1

2

C218

0.1U_0201_10V6K

C1468

0.1U_0201_10V6K

3

RSMRST#

@

3VALW_PG(84)

5VALW_PG(85)

5VALWB_PG( 85)

1 2

RC702 0_0201_5%

@

1 2

RC703 0_0201_5%

@

1 2

RC704 0_0201_5%

SUS_ON(DDR EN)

ALW_PWRGD_3V_5V

R6204

100K_0201_5%

ALW_PWRGD_3V_5V(16,58)

+3VALW

PCH_RSMRST#(58)

2

PROM_BIOS_R (9)

12

R466

1K_0201_5%

1 2

EVT2_28

ALW_PWRGD_3V_5V

RC695 0_0201_5%@

1 2

+3VALW

5

@

1

SIO_SLP_S4#(11,58,79)

SUS_ON_EC( 58)

2

RE22 0_0201_5%@

P

B

A

G

3

1 2

FOLLOW CSLP

@

1 2

RC644 0_0201_5%

+3VALW

UC2 MC74VHC1G08DFT2G_SC70-5

5

1

P

B

4

O

2

A

G

3

UC5 MC74VHC1G08DFT2G_SC70-5

4

O

DVT1_28

12

RE21 100K_0201_5%

DVT1_28

+3VALW

1

2

SUS_ON_P

@

C4201

0.1U_0201_10V6K

+3VALW

1

CC1

0.1U_0201_10V6K

2

PCH_RSMRST#_AND (11,63)

RC736 0_0402_5%

@

1 2

1

CC707

@

1.1V_MEM_EN (25,86)

12

0.1U_0402_10V7K

12

RC737

1M_0201_5%

@

DVT1_28

+3VALW

IMVP_VR_ON_P

12

100K_0201_5% RE29

+3VALW

1 2

1

C4203

0.1U_0201_10V6K

2

1

C4202

0.1U_0201_10V6K

2

RUN_ON_P

RE14 100K_0201_5%

RC351 0_0201_5%@

UC22

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

AOZ1334DI-01_DFN8-7_3X3

@

1 2

VCC_SFR_OC(VCCPLL_OC)

+1.1V_MEM

1

CC395 1U_0201_6.3V6M

2

DVT1_15

C C

VCCSTG_EN VCC_SFR_OC_EN

RC640 0_0201_5%

VCCSTG

100K_0201_5%

RC631

CPU_C10_GATE#(11)

SIO_SLP_S3#(11,58,78,79)

RUN_ON_P

VCCSTG_EN_R VCCSTG_EN_MIPI

12

RC701

@

B B

100K_0201_5%

+3V_PRIM

1

CC633

0.1U_0201_10V6K

2

RC730 0_0201_5%

RC731 0_0201_5%

UC11

MIPI60@

3

A

2

GND

1

B

SN74AUP1G97DRLR_SOT6

@

1 2

+3VS

@

1 2

@

1 2

4

Y

5

Vcc

6

C

+1.1V_MEM

+5VALW

12

RUN_ON_R

RC634 0_0201_5%

MIPI60_OVERRIDE# (78,79)

1 2

7

3

4

+3V_PRIM

UC10

5

MC74VHC1G08DFT2G_SC70-5

1

P

B

O

2

A

G

3

MIPI60@

1 2

+3V_PRIM

UC27

VIN1 VIN2

VIN thermal

VBIAS

ON

AOZ1334DI-01_DFN8-7_3X3

4

VOUT

+3V_PRIM

1

CC632

0.1U_0201_10V6K

2

VCCSTG_EN_R

RC636 0_0201_5%

DVT1_28

GND

1 2

6

5

@

+VCC_SFR_OC_R

RC643 0_0603_5%@

1 2

+VCC1.05_OUT_FET

1

CC638 1U_0201_6.3V6M

2

DVT1_17

+VCC_SFR_OC

+VCC1.05_OUT_FET

+5VALW

VCCSTG_EN

+VCC_SFR_OC

1

2

CC721

0.1U_0201_10V6K

UC12

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

AOZ1334DI-01_DFN8-7_3X3

VOUT

GND

6

5

+VCCSTG_R

RC639

@

1 2

0_0603_5%

+VCCSTG_CPU

1

2

+VCCSTG_CPU

CC667

0.1U_0201_10V6K

RUN_ON(VS EN)

SIO_SLP_S3#(11,58,78,79)

RUN_ON_EC(58,67)

IMVP_VR_ON&VCCST_PWRGD

SIO_SLP_S3#

IMVP_VR_ON_EC(58)

+VCC1P8A

PDG p.615 TCSS and AGSH Type C Sub system and processor analog supply.

+1.8V_PRIM

1

2

CC386

1U_0201_6.3V6M

DVT1_17

RE460 0_0201_5%

+3VALW

UC4

5

1

P

B

4

O

2

A

G

3

MC74VHC1G08DFT2G_SC70-5

1 2

RE15 0_0201_5%@

+3VALW

U15 MC74VHC1G08DFT2G_SC70-5

5

1

P

B

2

A

G

3

1 2

RE10 0_0201_5%@

DVT1_28

4

O

VCC1P8A shape from VR to VCC1P8A pins should have: a. total length L of < 22mm between VR and BGA. b. Average width W of 1.8mm.

+1.8V_PRIM

+5VALWB

CPU_C10_GATE# VCC1P8A_EN

RC226

@

1 2

0_0201_5%

EVT2_24

SSD_SCP_PWR_EN(58,71)

RUN_ON_P (58,71)

1

NC

VCC

2

A

3

GND

74AUP1G07SE-7_SOT353-5

1 2

VOUT

GND

UE8

5

4

Y

DVT1_27

6

5

RE402

1 2

0_0402_5%

RE490

1 2

0_0402_5%

+3VALW

VCCST_PWRGD (11)

IMVP_VR_ON_P

+VCC1P8A_R

@

RC718

1 2

0_0603_5%

12

CE410

@

0.1U_0402_25V6

12

CE431

@

0.1U_0402_25V6

RE489

@

1 2

0_0402_5%

@

12

+VCC1P8A

RE412

1M_0201_5%

@

RE491

1M_0201_5%

@

12

CE430

SSD_PWR3_EN_P (95)

SSD_PWR2_EN_P (94)

IMVP_VR_ON_EN (91)IMVP_VR_ON_P (11)

0.1U_0402_25V6

+VCC1P8A

1

CC668

0.1U_0201_10V6K

2

+3V_PRIM

@

UC7

O

4

+3V_PRIM

1

2

1

CC620

0.1U_0201_10V6K

2

SLP_VCCST_OVRD

CC621

0.1U_0201_10V6K

1U_0201_6.3V6M

DVT1_17

4

@

1 2

RC619 0_0201_5%

+VCC1.05_OUT_FET

1

CC629

2

+VCC1.05_OUT_FET

SN74AUP1G97DRLR truth table

+5VALW

VCCST_EN

SLP_VCCST_MIPI60_OVRD

VCCIN_AUX_CORE_VID

UC13

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

AOZ1334DI-01_DFN8-7_3X3

VCCST

+3V_PRIM

12

RC616

100K_0201_5%

QM1B

34

D

5

G

S

UC8

MIPI60@

A3Y

2

GND

Vcc

1

B

SN74AUP1G97DRLR_SOT6

5

C

12

RC615

100K_0201_5%

+3V_PRIM

CORE_VID0(16,89)

CORE_VID1(16,89)

2N7002KDW_SOT363-6

12

VCCST_OVERRIDE_R(11)

SLP_VCCST_OVRD SLP_VCCST_MIPI60_OVRD

A A

RC700

@

100K_0201_5%

12

61

2

G

S

4

1 2

RC623 0_0201_5%MIPI60@

5

6

+3V_PRIM

5

UC6

1

P

INB

O

2

INA

G

MC74VHC1G32DFT2G_SC70-5

3

RC617

100K_0201_5%

SIO_SLP_S3#(11,58,78,79)

3.3_VCCST_OVERRIDE

D

QM1A 2N7002KDW_SOT363-6

+3V_PRIM

MIPI60_OVERRIDE# (78,79)

+3V_PRIM

1

CC622

0.1U_0201_10V6K

2

@

1 2

4

RC624 0_0201_5%

VCCIN_AUX_CORE_VID

12

RC626 100K_0201_5%

12

1

2

+3V_PRIM

5

P

INB

INA

G

MC74VHC1G32DFT2G_SC70-5

3

@

RC735 100K_0201_5%

1

2

+3V_PRIM

INB

INA

VOUT

+3V_PRIM+3V_PRIM

5

UC9

P

1 2

4

O

RC627 0_0201_5%

G

MC74VHC1G32DFT2G_SC70-5

3

+VCCST_R

6

RC630 0_0603_5%

5

GND

3

1

CC625

0.1U_0201_10V6K

2

1 2

+VCCST_CPU

VCCST_EN

@

1

CC666

0.1U_0201_10V6K

2

+VCCST_CPU

+1.8_MEM

+1.8V_PRIM

2

C3011

1U_0201_6.3V6M

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DVT1_19

Issued Date

1

+1.8V_PRIM

+5VALWB

SUS_ON_P

2014/09/08 2013/10/28

2

UC23

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

AOZ1334DI-01_DFN8-7_3X3

Compal Secret Data

Deciphered Date

VOUT

GND

6

5

+1.8V_MEM_R

RC139 0_0603_5%@

1 2

+1.8V_MEM

1

CC394

0.1U_0201_10V6K

+1.8V_MEM

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

P078 - DC/DC & Sequence Logic

LA-G172P

2

78 101Friday, May 24, 2019

1

78 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

PLACE WITHIN 1.1INCH OF MERGED MIPI60 CONNECTOR

MIPI 60

+VCCIO_OUT

CFG TERMINATIONS(CRB p.69/SDS p.110 reserved )

R360

@

0_0402_5%

1 2

R160 10K_0201_5%@ R161 10K_0201_5%@ R162 10K_0201_5%@ R163 10K_0201_5%@

D D

R164 10K_0201_5%@ R165 10K_0201_5%@ R166 10K_0201_5%@ R167 10K_0201_5%@ R168 10K_0201_5%@ R169 10K_0201_5%@ R170 10K_0201_5%@ R171 10K_0201_5%@ R172 10K_0201_5%@ R173 10K_0201_5%@ R174 10K_0201_5%@ R175 10K_0201_5%@

CRB p.74,75/SDS p.31,32 reserved Except CFG 4

DVT1_42

R140 1K_0201_5%@ R141 1K_0201_5%@ R142 1K_0201_5%@ R143 1K_0201_5%@ R144 1K_0201_5% R145 1K_0201_5%@ R146 1K_0201_5%@ R147 1K_0201_5%@ R148 1K_0201_5%@ R149 1K_0201_5%@ R150 1K_0201_5%@ R151 1K_0201_5%@ R152 1K_0201_5%@ R153 1K_0201_5%@ R154 1K_0201_5%@ R155 1K_0201_5%@

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12

MIPI60_CFG0# MIPI60_CFG1# MIPI60_CFG2# MIPI60_CFG3# MIPI60_CFG4# MIPI60_CFG5# MIPI60_CFG6# MIPI60_CFG7# MIPI60_CFG8# MIPI60_CFG9# MIPI60_CFG10# MIPI60_CFG11# MIPI60_CFG12# MIPI60_CFG13# MIPI60_CFG14# MIPI60_CFG15#

MIPI60_SPI0_MOSI(9)

SIO_PWRBTN#(11,58)

EVT1_35

+VCCIO_OUT

SYS_PWROK(11,58)

R274 10K_0201_5%@ R178 10K_0201_5%@

MIPI60_CPU_JTAG_TD I(11) MIPI60_PCH_JTAG_TD I(11)

MIPI60_CPU_JTAG_TD O(11) MIPI60_PCH_JTAG_TD O(11)

MIPI60_CPU_JTAG_TM S(11) MIPI60_PCH_JTAG_TM S(11)

MIPI60_CPU_JTAG_TC LK(11) MIPI60_PCH_JTAGX(11)

MIPI60_CPU_JTAG_TR ST#(11) MIPI60_PCH_JTAG_TR ST#(11)

EVT1_32

+V3.3A_1.8A_PCH_SPI

12

CRB P.73

R261

1.5K_0201_5%

1 2 1 2

@

1 2 1 2

1 2 MIPI60@

R2600_0201_5% MIPI60@ R6440_0201_5% @

SMC_ONOFF_MIPI60_N

R2570_0201_5%

MIPI60_MBP0# MIPI60_MBP1#

4

R191 0_0201_5%@ R312 0_0201_5%@

R201 0_0201_5%@ R156 0_0201_5%@

R300 0_0201_5%@ R247 0_0201_5%@

R190 0_0201_5%@ R244 0_0201_5%@

R192 0_0201_5%@ R213 0_0201_5%@

SPI0_MOSI_SYS_PWROK_MIPI60

1

C220

0.1U_0201_16V6K

2

+3VALW_DSW

12 12

@

R267 1K_0201_5%

1 2

1

C285

0.1U_0201_16V6K

2

@

MIPI60@

MIPI60_TDI

MIPI60_TDO

MIPI60_TMS

MIPI60_TCLK

MIPI60_TRST#

PLACE WITHIN 1.1INCH OF MERGED MIPI60 CONNECTOR

PCH_PLTRST#_EC(11,46,48,52,58,66,67,68,70,79) DBG_PMODE(11)

MIPI60_PRDY#(11)

MIPI60_CFG_STB0_DP(18)

MIPI60_SPI0_IO2(9)

MIPI60_OVERRIDE#(78)

MIPI60_CFG0#(18) MIPI60_CFG1#(18) MIPI60_CFG2#(18) MIPI60_CFG3#(18) MIPI60_CFG4#(18) MIPI60_CFG5#(18) MIPI60_CFG6#(18) MIPI60_CFG7#(18) MIPI60_CFG8#(18)

MIPI60_CFG9#(18) MIPI60_CFG10#(18) MIPI60_CFG11#(18) MIPI60_CFG12#(18) MIPI60_CFG13#(18) MIPI60_CFG14#(18) MIPI60_CFG15#(18)

MIPI60_PCH_JTAG_TCLK(11)

MIPI60_MBP1#(18) MIPI60_MBP0#(18)

MIPI60_CFG_STB1_DP(18)

R544 0_0201_5%@ R545 0_0201_5%MIPI60@

R188 0_0201_5%MIPI60@ R335 0_0201_5%MIPI60@

R193 0_0201_5%MIPI60@ R194 0_0201_5%MIPI60@ R195 0_0201_5%MIPI60@

+V1.05A_MIPI60

12 12

1 2 1 2

12 12 12

3

+VCC1.05_OUT_FET +V1.05A_MIPI60

R123 0.01_0402_1%

1 2

MIPI60@

R111

MIPI60@

0_0201_5%

1 2

1

C1544

MIPI60@

0.1U_0201_10V6K

2

+V1.05A_VREF_DEBUG

MIPI60_TCLK MIPI60_TDI DBG_PMODE_MIPI60_RST# MIPI60_TRST#

MIPI60_PRESENT1#MIPI60_SPI0_IO2 MIPI60_PRESENT2#MIPI60_OVERRIDE#

MIPI60_TCLK1 MIPI60_MBP1#_R MIPI60_MBP0#_R

JMIPI60

1

VREF_DEBUG

3

TCK0

5

TDI

7

HOOK6

9

TRST_N

11

PRDY_N

13

PTI_0_CLK

15

POD_PRESENT1_N POD_PRESENT2_N17PTI_1_DATA0

19

PTI_0_DATA0

21

PTI_0_DATA1

23

PTI_0_DATA2

25

PTI_0_DATA3

27

PTI_0_DATA4

29

PTI_0_DATA5

31

PTI_0_DATA6

33

PTI_0_DATA7

35

PTI_0_DATA8

37

PTI_0_DATA9

39

PTI_0_DATA10

41

PTI_0_DATA11

43

PTI_0_DATA12

45

PTI_0_DATA13

47

PTI_0_DATA14

49

PTI_0_DATA15

51

TCK1

53

HOOK9

55

HOOK8

57

GND2

59

PTI_3_CLK

61

GND_4

63

GND_6

65

GND_8

SAMTE_QSH-030- 01-L-D-A

DFXTESTMODE(ITP_PMODE)

DBG_PMODE (Internal 20 K Pull UP)

0 = DFXTESTMODE ENABLED

1 = DFXTESTMODE DISABLED(DEFAULT)

R270 1K_0201_5%MIPI60@

DBG_PMODE

CONN@

TMS TDO

HOOK7

TRST_PD

PREQ_N

VREF_TRACE

PTI_1_CLK

GND1

PTI_1_DATA1 PTI_1_DATA2 PTI_1_DATA3 PTI_1_DATA4 PTI_1_DATA5 PTI_1_DATA6 PTI_1_DATA7

RSVD1 HOOK3 HOOK2 HOOK1 HOOK0

RSVD2

RSVD3

I2C_SCL

I2C_SDA

RSVD4

DBG_UART_TX DBG_UART_RX

GND3

PTI_2_CLK

GND_5 GND_7 GND_9

1 2

R6143 1K_0201_5%@

1 2

MIPI60_TMS

2

MIPI60_TDO

4

MIPI60_DBRESET# MIPI60_DBRESET#_R

6

MERGED_TRST_PD

8 10 12 14

Pin 16 PDG no define,CRB tie GND P.71

16 18 20 22 24 26 28 30 32 34

SPI0_MOSI_SYS_PWROK_MIPI60

36

MIPI60_HOOK2_CPU_BOOT_STALL MIPI60_CFG0#

38

SMC_ONOFF_MIPI60_N

40 42 44 46

SMB_CLK_MIPI60

48

SMB_DATA_MIPI60

50

V3.3A_CPU_NOA_LA_VAL

52

SOC_UART2_MIPI60_TXD

54

SOC_UART2_MIPI60_RXD

56 58 60 62 64 66

+V1.05A_MIPI60

R236 0_0201_5%MIPI60@

12

R725 0_0201_5%MIPI60@

1 2

R726 0_0201_5%MIPI60@

1 2

R249 0_0201_5%@

1 2

R157 0_0201_5%@

1 2

2

UNSTUFF RC AND STUFF RD FOR MIPI60 TO XDP60 ADAPTOR COMPATIBILITY

MIPI60_DBRESET#_R (11)

RA

PM_RSMRST_ PWRGD_MIPI60 (11)

SMB_CLK (9) SMB_DATA (9)

UART2_TXD (10,79)

UART2_RXD (10,79)

+3V_PRIM

1

MIPI60_DBRESET#_R

+1.05V_VCCSTG

12

RC

R112

@

51_0201_5%

MIPI60_PREQ# (11)

+VCCIO_OUT

12

R246

@

150_0201_1%

PLACE STRAPPING RESISTOR RB WITHIN 0.25" OF MAIN_NOA0_N_ROUT

RB

1 2

R230 1K_0201_5%MIPI60@

+VCCIO_OUT

12

RD

R113 0_0201_5%

MIPI60@

+V1.05A_MIPI60

12

R114

@

0_0201_5%

1

C100

MIPI60@

0.1U_0201_10V6K

2

connect to MIPI60_CFG0_N PDG no define

MIPI60@

RA SHOULD BE STUFFED ONLY FOR MIPI60 TO XDP60 ADAPTOR COMPATIBILITY

NEED SINGLE ENDED 50OHM ROUTING , FOR STB0, STB1 SIGNALS

R614 51_0201_5%MIPI60@

R210 1K_0201_5%MIPI60@ R311 1K_0201_5%MIPI60@ R410 100K_0201_5%MIPI60@ R138 0_0402_5%MIPI60@

1 2 1 2 1 2 1 2

SMB_CLK_MIPI60 SMB_DATA_MIPI60 MIPI60_OVERRIDE# V3.3A_CPU_NOA_LA_VAL

1 2

R660 51_0201_5%MIPI60@

1 2

R137 10K_0201_5%MIPI60@

1 2

MERGED_TRST_PD

+3VS

R1761K_0201_5%

12

C2000.1U_0201_16V6K

12

MIPI60_CFG_STB0_DN (18)

MIPI60_CFG_STB1_DN (18)

JESPI

C C

LPC 80Port Debug

B B

1

+3VS

2

+3VS

3

LPC_LAD0

4

LPC_LAD1

5

LPC_LAD2

6

LPC_LAD3

7

LPC_FRAME#

8

PCH_PLTRST#

9

GND

10

LPC_CLK

LPC ESPI

+3VS

ESPI_IO0

ESPI_IO1

ESPI_IO2

ESPI_IO3

ESPI_CS#

NA

GND

ESPI_CLK

JDEBUG2

1 2 3 4 5 6 7 8 9

10

GND1 GND2

ACES_50521-01041-P01

CONN@

1 2 3 4 5 6 7 8 9 10

11 12

+3VS

RE193 0_0201_5%@ RE428 0_0201_5%@

ESPI_IO0 (9 ,58) ESPI_IO1 (9 ,58) ESPI_IO2 (9 ,58)

ESPI_IO3 (9 ,58)

12 12

ESPI_CS# ( 9,58) PCH_PLTRS T#_EC (11,46,4 8,52,58,66,67,68,70,79 ) ESPI_RESET# (9,58)

ESPI_CLK_5105 (9,58)

APS

+3V_PRIM+3VALW

JAPS1

1

SIO_SLP_S3#(11,58,78)

SIO_SLP_S5#(11) SIO_SLP_S4#(11,58,78) SIO_SLP_A#(11)

+3V_PRIM

PCH_RTCRST#(9,63)

PWRBTN#(58,77,79,96)

SYS_RESET#(11)

SIO_SLP_S0#(11,66)

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

GND_1

20

GND_2

ACES_50506-01841-P01

CONN@

BIOS UART Debug

UART2_RTS#(10)

UART2_TXD(10,79)

UART2_RXD(10,79)

UART2_CTS#(10)

UART2_RTS#

UART2_TXD UART2_RXD UART2_CTS#

JUART1

1

2

3

4

5

GND_1

6

GND_2

CVILU_CI1804M1VRA-NH

CONN@

Power Button Debug

TOP BOT

SW1

2

LED1

+3VS +3VS

12

21

1

3

SKSFABE010_4P

DB@

12

DB@

R531 200_0201_1%

21

DB@

LED2

HT-F196BP5_WHITE

4

PWRBTN#(58,77,79,96)

Debug LED

DB@

R530

200_0201_1%

DB@

HT-F196BP5_WHITE

SW2

2

PWRBTN#(58,77,79,96)

1

3

SKSFABE010_4P

DB@

4

DCI Debug

EVT2_20

ALLSYS_PWRGD(58)

PCH_PLTRST#_EC(11,46,48,52,58,66,67,68,70,79)

USB3_PTX_C_DRX_P2

USB3_PTX_DRX_P2(12)

USB3_PTX_DRX_N2(12)

A A

1 2

CH44 0.1U_0201_10V6K

USB3_PTX_C_DRX_N2

1 2

CH45 0.1U_0201_10V6K

5

+5VALWB

JDEBUG1

1

2

USB20_P1(12) USB20_N1(12)

USB3_PRX_DTX_P2(12) USB3_PRX_DTX_N2(12)

4

USB3_PTX_C_DRX_P2 USB3_PTX_C_DRX_N2

3

4

5

6

7

8

9

10

11

GND1

12

GND2

ACES_50521-01041-P01

CONN@

3

JDEG1 EC UART Debug/80 port

+3VALW

10K_0201_5%

12

@

1 2

RE206

0_0201_5%

Compal Secret Data

Deciphered Date

10K_0201_5%

100K_0201_5%

12

RE204

RE203

RE202

RE201

@

RE205 10K_0201_5%

1 2

JDEG1

+EC_DEBUG_VCC

1

2

3

4

5

6

11

6

G1

7

12

7

G2

8

9

10

ACES_50521-01 041-P01_10P

CONN@

EVT2_21

RE210

10K_0201_5%

RE213

RE211

RE212

1 2

JTAG_TDI JTAG_TMS JTAG_CLK JTAG_TDO MSCLK MSDATA HOST_DEBUG_ TX

@

1 2

RE209

0_0201_5%

2

JTAG_TDI (58) JTAG_TMS (58) JTAG_CLK (58 ) JTAG_TDO (58)

SBIOS_TX(1 0)

HOST_DEBUG_ TX (5 8) MSDATA (52,58) MSCLK (52,58)

2014/09/08 2013/10/28

10K_0201_5%

RE200

10_0201_1%

1 2

DEBUG_TX

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

Size Docu ment Number Rev

Date: Sheet of

Compal Electronics, Inc.

P079 - Debug APS,DEG,eSPI,LED

LA-G172P

1

79 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

A

B

C

D

E

FPC 6pin

1 1

DMIC module

Middle Board

Sensor Board

LS-G171P

FPC 30pin

UFCAM module

FPC 24pin

LS-G172P

IPEX Wire 8pin

IPEX Wire 30pin

2 2

JUFC1

p.25

M/B LA-G172P

JIO1

3 3

Keyboard

KB Transfer Board

FPC 8pin

Touchpad

LS-G173P

p.36

FPC 51pin

FPC 20pin30pin

Battery Gauge LNG2DMTR

4 4

Security Classification

2014/09/08 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

A

B

2014/09/08 2013/10/28

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

P080 - DaughterB Block Diagram

LA-G172P

LA-G172PLA-G172P

E

80 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

Centenario POWER BLOCK DIAGRAM

D D

Power Rail

2S2P Battery 51W

Power Trace

PD1

Type-C Port-L

C C

Controller TPS65987DJ

EC MEC5105

Buck-boost Charger ISL9538B (NVDC) Page:83

B+

ALWON_3VALW

ALWON_5VALW

+3.3VALW TDC: 5.1A Peak Current 7.22A (NB502) Page:84

+5VALW TDC 5A Peak Current 7.2A (NB502) Page:85

+5VALWB TDC 3.5A Peak Current 5A (NB502) Page:85

Type-C Port-R

PD2

ALWON_5VALWB

Controller TPS65987DJ

B+

B+B+

B B

IMVP_VR_ON_EN PCH_PRIM_EN

VCCIN TDC 36A

1.1V_MEM_EN

Peak Current 70A (MP2940A) Page:91,92,93

VCCIN_AUX

1.8V_PRIM_PG 0.6V_VDDQ_EN_P

TDC 10A Peak Current 32A (MP2941) Page:89,90

+1.1V_MEM TDC 4A Peak Current 5.7A (RT6243B) Page:86

+0.6V_VDDQ (LPDDR4X only) TDC 1.25A Peak Current 1.79A (NB691) Page:87

SSD_PWR2_EN_P

+1.8VPRIM TDC 2.56A Peak Current 3.65A (NB691) Page:88

+SSD_PWR2 TDC 1.4A Peak Current 2A (NB691) Page:94

B+

+SSD_PWR3

SSD_PWR3_EN_P

TDC 1.4A Peak Current 2A (NB693)

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2017/08/24 2017/08/24

Compal Secret Data

Page:95

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_POWER BLOCK DIAGRAM

LA-G172P

1

81 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

+BATT

D D

JT101

CONN@

+BATT

12

PC100

2200P_0402_50V7K

@EMC@

1

6

UNIMI_LLGCBE018

NC_1 NC_2 NC_3

2

2 3 4 5

CLK_SMB

3

BAT_3V3

4

DAT_SMB

5

7 8 9

4

EMC@

HCB2012KF-800T50_2P

1 2

EMC@

HCB2012KF-800T50_2P

1 2

EMC@

HCB2012KF-800T50_2P

1 2

12

PC101

@EMC@

1000P_0402_50V7K

SYS_PRES# (96)

PL102

+VBATT

PL100

PL101

12

PC102

@EMC@

0.01U_0402_25V7K

PR106 100_0402_1%

1 2

PR110 0_0402_5%

1 2

PR108 100_0402_1%

1 2

3

12

PR134

1M_0402_5%

1

2

3

1

PD100

EMC@

TVNST52302AB0_SOT523-3

PD101

2

3

EMC@

TVNST52302AB0_SOT523-3

PBAT_CHARGER_SMBCLK (58,83)

2

1

+3.3V_BAT_LDO

PBAT_CHARGER_SMBDAT (58,83)

C C

+3VALW

12

+3VALW

12

PVT_01

PR100

@

0_0402_5%

B B

PD_L_R_PROCHOT#(42,44)

PR104

@

0_0402_5%

1 2

AC_DISC# (58)

PR103

200K_0201_5%

PR101

200K_0201_5%

2

G

34

5

G

D

S

PQ100B

2N7002KDW_SOT363-6

61

D

S

PVT_01

PR102

@

0_0402_5%

1 2

PQ100A

2N7002KDW_SOT363-6

CHG_PROCHOT# (83)

PR105

@

0_0402_5%

1 2

A A

Security Classification

2017/08/24 2017/08/24

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2017/08/24 2017/08/24

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR DCIN

LA-G172P

1.0 (A00)

82 101Friday, May 24, 2019

1

82 101Friday, May 24, 2019

Vinaﬁx.com

A

B

C

D

Charger controller(40.1), Support component(40.2)

PT200

+CHG_VIN_20V

PL200

1 1

12

EMC@

1UH_1277AS-H-1R0N-P2_3.3A_30%

1 2

PD200

SMF4L22A_SOD123FL2

@

PR201

1

12

442K_0402_1%

PAD~D

CHG_VIN_20V

4.5V

PR200

0.01_1206_1%

1

12

PC200

@

0.1U_0402_25V6

2

12

PR202

1_0402_1%

4

3

12

PR203

1_0402_1%

+CHG_SRC_20V

PC201

@EMC@

0.1U_0402_25V6

Low noise MLCC SE00000X210

12

PC202

PC203

@

@EMC@

2200P_0402_50V7K

10U_0603-H1_2_25V6M

PC204

10U_0603-H1_2_25V6M

PC206

10U_0603-H1_2_25V6M

12

PC205

12

PC207

10U_0603-H1_2_25V6M

12

PC208

PC209

10U_0603-H1_2_25V6M

CHG_ACIN

12

PC211

PR204

100K_0402_1%

0.1U_0402_25V6

+CHG_VIN_20V

2 2

+CHG_VIN_20V

B+

PD201

RB520SM -30T2R_EMD2-2

2 1

PD202

RB520SM -30T2R_EMD2-2

2 1

1U_0402_25V6K

2_1206_5%

1 2

PC229

2.2U_0402_6.3V6M

1 2

PR208

PC227

1 2

VDD

2_1206_5%

1 2

PVT_02

PR212 0_0201_5%

1 2

@

PR213 0_0402_5%

1 2

PBAT_CHARGER_SMBDAT(58,82)

PBAT_CHARGER_SMBCLK(58,82)

VRALERT#_R(16)

CHG_PROCHOT#(82)

ACAV_IN(58,63)

PR223

@

0_0402_5%

1 2

AC_DIS(58)

PVT_02

3 3

VDD

3V

12

PR227

1M_0402_5%

For Battery 60% RSOC stop charging in Factory

@

PR214 0_0402_5%

@

PR217 75_0402_5%

1 2

PR219

100K_0402_5%

13

D

2

G

PQ205

S

L2N7002WT1G_SC70-3

1 2

12

PR225

154K_0402_1%

PR220

@

0_0402_5%

1 2

PVT_02

PR206

CHG_DCIN

CHG_ACIN

CHG_CMIN

CHG_DAT

CHG_CLK

PR231

499_0402_1%

PC243

0.01U_0402_16V7K

12

PC212

1U_0402_25V6K

PC226

1U_0402_25V6K

17

18

19

20

21

22

23

24

PR224

1M_0402_5%

1 2

CHG_COMP

12

PC241

@

12

560P_0402_50V7K

PC210

4.7U_0402_16V6M

1 2

CHG_ADP

CHG_CSIP

15

16

ADP

CSIP

DCIN

VDD

5V

ACIN

CMIN

ISL9538BHRTZ-T_TQFN32_4X4

SDA

SCL

PROCHOT#

ACOK

BATGONE

CMOUT26PROG27AMON/BMON29PSYS30VBAT

25

2-CELL

12

PR233

PC244

@

0.1U_0402_25V6

12

PC213

1U_0402_25V6K

12

PC225

PR205

2.2_0603_5%

0.22U_0603_25V7K

CHG_CSIN

11

10

BOOT1

UGATE1

CHG_PSYS

12

PR229

0_0201_5%

@

PR232

10K_0201_5%

@

PVT_02

(58)

I_ADP

PHASE1

31

CHG_VBAT1

12

(58)

9

33

LGATE1

VDDP

LGATE2

PHASE2

UGATE2

BOOT2

VSYS

CSOP

CSON

BGATE

PU200

32

CHG_BGATE

PVT_02

I_SYS

PAD

8

7

6

5

4

3

2

1

(58,91)

CHG_VDDP

CHG_LG2

CHG_LX2

CHG_UG2

CHG_BST2

CHG_CSOP

CHG_CSON

100_0402_1%

1 2

12

@

0.1U_0402_25V6

12

13

14

CSIN

ASGATE

COMP

28

12

PR226

CHG_AMON

93.1K_0402_1%

12

PR230

1K_0402_1%

12

PR234

0_0402_5%

@

I_BATT

5V

PR236

PC245

4.7_0402_5%

1 2

2.2U_0402_6.3V6M

1 2

2.2_0603_5%

1 2

0.22U_0603_25V7K

@

0_0402_5%

1 2

12

PC235

@

0.1U_0402_25V6

PR207

PC228

PR210

PC230

PR218

PVT_02

VDD

B+

+VBATT

CHG_UG1

1

2

D1

G1

PQ201

D2/S1

S2_24S2_3

S2_1

AON6962_DFN5X6D-8-7

3

G2

5

6

CHG_LG1

CHG_LX1

CHG_LG1

CHG_UG1

CHG_BST1

Main: ML, 2nd: CLSN Package: 11.5 x 10.3 x 2 Idc=10A, Isat=11A Rdc=14mohm (Typ.)

PR215

4.7_1206_5%

@EMC@

PC236

680P_0402_50V7K

@EMC@

PL201

1 2

12

SNUB_CHG1

12

2.2UH_MMD-10BZN2R2M-M1L_10A_20%

7

CHG_UG2

1

2

CHG_LX2CHG_LX1

12

PR216

4.7_1206_5%

@EMC@

G1

7

D2/S1

S2_24S2_3

G2

5

6

CHG_LG2

SNUB_CHG2

12

PC237

680P_0402_50V7K

@EMC@

@

1U_0402_25V6K

1 2

D1

3

PC238

B+

PQ203

S2_1

AON6962_DFN5X6D-8-7

12

PR221

1_0402_1%

Low noise MLCC SE00000X210

12

PC215

10U_0603-H1_2_25V6M

PR211

0.005_1206_1%

PC239

1 2

12

10U_0603-H1_2_25V6M

4

3

12

PC214

1

2

1U_0402_25V6K

12

PC216

10U_0603-H1_2_25V6M

PR222

1_0402_1%

PC240

@

1U_0402_25V6K

1 2

PC217

10U_0603-H1_2_25V6M

PC231

10U_0603_25V6M

12

PC221

@

10U_0603-H1_2_25V6M

+8.4V_BATT+

12

PC232

1

12

PC222

@

12

10U_0603_25V6M

12

PC224

PC223

0.1U_0402_25V6

@EMC@

10U_0603-H1_2_25V6M

1 2 3 5

1

12

+

PC218

2

33U_B3_16VM_R45M

2200P_0402_50V7K

PQ202

AON7405 _DFN8-5

4

CHG_BGATE

+

PC219

2

33U_B3_16VM_R45M

+VBATT

12

PC233

4700P_0402_25V7K

12

PC234

2200P_0402_50V7K

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2017/08/24 2017/08/24

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_Charger

LA-G172P

D

83 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

3VALW TDC 5.05A Peak Current 7.22A

12

PC307

22U_0603_6.3V6M

OCP 10A 700kHz

12

PC309

PC308

22U_0603_6.3V6M

+3VALW

+3VALWP

12

PC310

PC311

22U_0603_6.3V6M

D D

MODE2 SetV CC

0

Connect to VIN

PVT_03

PR300

@

0_0402_5%

12

PR301

90.9K_0201_1%

B+

PL302

EMC@

HCB2012KF-800T50_2P

1 2

PL300

EMC@

HCB2012KF-800T50_2P

1 2

INT VCC

EXT VCC

7A

10A

13A

16.5A

BST_3V

Resistor to GNDCLM 0

90K

150K >230K or float

PR303

0_0603_5%

1 2

PC300

0.22U_0402_16V7K

1 2

Main: CLSN, 2nd: Package: 7.3 x 6.8 x 1.5

12

PC302

PC301

0.1U_0402_25V6

@EMC@

C C

2200P_0402_50V7K

ALWON_3VALW(58,96)

+3.3V_ALW2

12

1

15

12

3

2

PU300

VIN

EN

NB502GQ-Z_QFN16_3X3

PG

3V3

3.6V

PGND

PR310

@

0_0402_5%

PC303

PC304

10U_0603_25V6M

3VALW_PG(78)

PR308

@

150K_0201_5%

PC313

2.2U_0402_6.3V6M

M1

Vo<3V

M2

Vo<3V

M3

Vo>=3V 1000kHz

M4

Vo>=3V

FsVOU T 700kHz 1000kHz

700kHz

12

Resistor to GNDState 0 90K 150K

>230K or float

11

16

MODE2

MODE1

14

12

10

BST

CLM

8

SW

FB

GND_1 GND_2 GND_3 GND_4

NC

LX_3V

9

FB_3V

13

4 5 6 7

LX_3V

12

PR311

4.7_0805_5%

@EMC@

12

PC314

Idc=6.5A, Isat=12A DCR=20mohm (Typ.)

1.5UH_MHCB06015-1R5M-C1_6.5A_20%

R4

PR306

768K_0402_1%

1 2

PL301

1 2

PC305

220P_0201_25V7K

1 2

12

PR307

499_0402_1%

R1=

VOUT-VREF

MODE Vo<3V

Vo>3V

VREF

1

VREF

0.6V

1.8V

12

PR304

R1

12

R2

26.1K_0402_1%

PR309

30.1K_0402_1%

12

PC306

22U_0603_6.3V6M

+3VALWP

PJP300

@

1 2

JUMP_43X118

X R2

R2

R4

@EMC@

680P_0603_50V7K

B B

A A

Security Classification

2017/08/24 2017/08/24

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2017/08/24 2017/08/24

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR_+3VALW

LA-G172P

1.0 (A00)

84 101Friday, May 24, 2019

1

84 101Friday, May 24, 2019

Vinaﬁx.com

5

4

3

2

1

CLM Resistor to GND 7A

0

10A

PR401

13A

16.5A

BST_5V

10

BST

GND_1 GND_2 GND_3 GND_4

90K

150K >230K or float

SW

FB

9

13

4 5 6 7

PR403

0_0603_5%

1 2

LX_5V

FB_5V

PC400

0.22U_0402_16V7K

1 2

Main: ML, 2nd: CLSN Package: 5.7 x 5.4 x 1.8 Idc=6.2A, Isat=8.4A DCR=29mohm (Typ.)

1.5UH_MMD-05AHN1R5M-M1L_6.2A_20%

R4

PR406

274K_0402_1%

1 2

LX_5V

12

PR410

4.7_0805_5%

@EMC@

12

PC415

PL401

1 2

PC405

220P_0201_25V7K

1 2

12

PR407

499_0402_1%

R1=

MODE Vo<3V

Vo>3V

1

VREF

VOUT-VREF

VREF

0.6V

1.8V

R1

R2

12

X R2

R2

R4

PR404

26.1K_0402_1%

PR409

13.3K_0402_1%

12

PC406

22U_0603_6.3V6M

MODE2 SetVCC

0

INT VCC

Connect to VIN

12

PC404

10U_0603_25V6M

PR408

@

150K_0201_5%

PC414

VOUT Fs Vo<3V Vo<3V Vo>=3V

Vo>=3V

EXT VCC

12

700kHz 0 1000kHz 1000kHz

700kHz

PVT_04

90K 150K

>230K or float

PR400

@

0_0402_5%

PU400

1

VIN

15

EN

12

PG

3

3V3

2

PGND

@

0_0402_5%

12

90.9K_0201_1%

11

16

CLM

MODE2

NB502GQ-Z_QFN16_3X3

3.6V

MODE1

NC

8

14

12

PR411

PL404

EMC@

HCB2012KF-800T50_2P

B+

D D

C C

1 2

PL400

EMC@

HCB2012KF-800T50_2P

1 2

1

PC401

+

PC432

2

@EMC@

@

33U_B3_16VM_R45M

12

PC402

0.1U_0402_25V6

@EMC@

ALWON_5VALW(58)

5VALW_PG(78)

12

PC403

10U_0603_25V6M

2200P_0402_50V7K

2.2U_0402_6.3V6M

State Resistor to GND M1 M2 M3

M4

5VALW TDC 5A Peak Current 7.2A OCP 10A 700kHz

12

PC407

PC408

22U_0603_6.3V6M

12

PC410

22U_0603_6.3V6M

12

PC412

PC411

22U_0603_6.3V6M

+5VALWP

12

22U_0603_6.3V6M

PJP400

@

1 2

JUMP_43X118

+5VALW

@EMC@

680P_0603_50V7K

CLM Resistor to GND

7A

MODE2 SetVCC

0

INT VCC

Connect to VIN

12

PC420

10U_0603_25V6M

PR420

@

150K_0201_5%

PC430

700kHz 0 1000kHz 1000kHz

700kHz

EXT VCC

12

90K 150K

>230K or float

PL405

EMC@

HCB2012KF-800T50_2P

B+

B B

1 2

PL402

EMC@

HCB2012KF-800T50_2P

1 2

1

12

PC417

+

PC433

2

@

33U_B3_16VM_R45M

PC418

0.1U_0402_25V6

@EMC@

ALWON_5VALWB(58)

5VALWB_PG(78)

12

PC419

10U_0603_25V6M

2200P_0402_50V7K

2.2U_0402_6.3V6M

State Resistor to GND

VOUT Fs

M1

Vo<3V

M2

Vo<3V

M3

Vo>=3V

M4

Vo>=3V

PR412

@

0_0402_5%

PU401

1

VIN

15

EN

12

PG

3

3V3

2

PGND

@

0_0402_5%

PVT_04

12

16

NB502GQ-Z_QFN16_3X3

3.6V

PR423

@

0_0201_5%

11

CLM

MODE2

MODE1

NC

8

14

12

PR413

10A 13A

16.5A

BST_5VB

10

BST

SW

FB

GND_1 GND_2 GND_3 GND_4

0

90K 150K >230K or float

PR415

0_0603_5%

1 2

LX_5VB

9

FB_5VB

13

4 5 6 7

PC416

0.22U_0402_16V7K

1 2

Main: ML, 2nd: CLSN Package: 5.7 x 5.4 x 1.8 Idc=6.2A, Isat=8.4A DCR=29mohm (Typ.)

1.5UH_MMD-05AHN1R5M-M1L_6.2A_20%

R4

PR418

274K_0402_1%

1 2

LX_5VB

12

PR422

4.7_0805_5%

@EMC@

12

PC431

PL403

1 2

PC421

220P_0201_25V7K

1 2

12

PR419

499_0402_1%

R1=

MODE Vo<3V

Vo>3V

1

VREF

VOUT-VREF

VREF

0.6V

1.8V

R1

R2

R4

12

PR416

26.1K_0402_1%

12

PR421

13.3K_0402_1%

X R2

PVT_16

5VALWB TDC 3.5A Peak Current 5A OCP 7A 700kHz

12

PC422

PC423

22U_0603_6.3V6M

12

PC426

PC425

22U_0603_6.3V6M

+5VALWBP

12

PC427

22U_0603_6.3V6M

12

PC428

22U_0603_6.3V6M

PJP401

@

1 2

JUMP_43X118

12

22U_0603_6.3V6M

+5VALWB

A A

5

4

@EMC@

680P_0603_50V7K

Security Classification

2017/08/24 2017/08/24

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2017/08/24 2017/08/24

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_+5VALW/+5VALWB

LA-G172P

1

85 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

D D

4

3

2

1

1.1V_MEM TDC 4A Peak Current 5.7A OCP 11.5A 800KHz

B+

C C

PL700

EMC@

HCB2012KF-800T50_2P

1 2

12

PC700

22U_0805_25V6M

12

PC703

PC702

@

22U_0805_25V6M

1.1V_MEM_EN(25,78)

1.1V_MEM_PG(25)

PR703

@

10K_0201_5%

Rm1

PR705

91K_0402_1%

Rm2

PR706

51K_0201_1%

12

PC701

@

22U_0805_25V6M

12

PC704

PC705

0.1U_0402_25V6

EMC@

12

PC713

4.7U_0402_16V6M

PU700

RT6243BGQVF_VQFN18_3P5X3P5

0.1U_0402_25V6

2

VIN_1

11

VIN_2

15

EN

16

PGOOD

17

VCC

18

MODE

AGND

12

4.7V

PVT_11

BOOT

SW_2 SW_1

PGND_13PGND_24PGND_3

5

FB

SS

PGND_48PGND_59PGND_6

10

1

7 6

13

14

BST_1.1V

LX_1.1V

FB_1.1V

12

PR708

2.2_0603_5%

1 2

PC714

0.1U_0402_25V6

LX_1.1V

12

PR707

4.7_0805_5%

@EMC@

PC706

0.1U_0402_25V6

1 2

0.47UH_MMD-04AE-R47M-M1L_8A_20%

Main: ML, 2nd: Package: 4.7 x 4.3 x 1.5 Idc=8A, Isat=11A DCR=18mohm (Typ.)

PL701

1 2

12

PR702

10K_0201_1%

1 2

12

PR712

@

PR704

12K_0201_1%

0_0402_5%

+1.1V_MEMP

12

PC711

@

100P_0402_50V8J

12

PC709

PC708

47U_0603_6.3V6M

PC710

47U_0603_6.3V6M

12

PC712

47U_0603_6.3V6M

12

PC716

47U_0603_6.3V6M

B B

A A

5

4

1 2 3 4 5 6 7 8

9

10 11 12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

Rm2 (kohm) O CP (A, Typ.)Fsw (kHz) 300 200 160 120 200 180 150 120

91

82 62 51

5.1 10 20 20 51 51 51 51

51

51 51 51

Light Load ModeRm1 (kohm)

FCCM FCCM FCCM FCCM FCCM FCCM DCM DCM

DCM

DCM DCM DCM

2017/08/24 2017/08/24

3

11.5

13.8

11.5

13.8

11.5

13.8

11.5

13.8

11.5

13.8

11.5

13.8

400 400 800 800 1200 1200 400 400

800

800 1200 1200

Compal Secret Data

Deciphered Date

12

PC715

@EMC@

680P_0603_50V7K

2

+1.1V_MEMP

JUMP_43X118

1 2

PJP700

@

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_+1.1V_MEM

LA-G172P

+1.1V_MEM

1

86 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

D D

4

3

2

1

0.6V_VDDQ TDC 1.25A Peak Current 1.79A OCP 7.5 (Typ.) 750kHz

2200P_0402_25V7K

PR802

0.6V_VDDQ_EN_P(25)

PR801

SW

FB

0_0603_5%

1 2

LX_0.6V

6

FB_0.6V

10

2 3 4

BST_0.6V

12

PU800

1

VIN

5

12

PG

8

VCC

11

EN

NB691GG-Z_QFN11_2X2

3.6V

7

BST

PGND_1 PGND_2 PGND_3

AGND

9

PC801

0.22U_0402_16V7K

1 2

Main: CYN, 2nd: Package: 3.5 x 2.8 x 1.2 Idc=3.7A, Isat=5.7A DCR=27.5mohm (Typ.)

1UH_HEI322512A-1R0M-Q8_3.7A_20%

PR804

@EMC@

PC811

@EMC@

1 2

LX_0.6V

12

4.7_0603_5%

12

680P_0402_50V7K

PL801

12

PR803

@

0_0402_5%

PVT_05

12

PC806

PC807

22U_0603_6.3V6M

+0.6V_VDDQP

12

PC809

PC808

22U_0603_6.3V6M

PJP800

@

112

JUMP_43X79

+0.6V_VDDQ

2

B+

C C

B B

PL800

EMC@

HCB1608KF-121T30_0603

1 2

12

PC803

PC802

10U_0603_25V6M

0.6V_VDDQ_PG(25)

12

PC804

PC805

0.1U_0402_25V6

EMC@

@

150K_0201_5%

PC810

2.2U_0402_6.3V6M

A A

Security Classification

2017/08/24 2017/08/24

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2017/08/24 2017/08/24

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR_VDDQ4x

LA-G172P

1.0 (A00)

87 101Friday, May 24, 2019

1

87 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

1.8V_PRIM TDC 2.56A Peak Current 3.65A OCP 7.5A (Typ.) 750kHz

0_0603_5%

1 2

BST_1.8V

7

BST

SW

PGND_1 PGND_2 PGND_3

PR507

FB

Main: TOKO, 2nd: Package: 4.2 x 4.2 x 1.2

12

PC500

LX_1.8V

PR510

0.22U_0402_16V7K

6

FB_1.8V

10

2 3 4

@

274K_0402_1%

1 2

@EMC@

Idc=3.3A, Isat=6.2A Rdc=50mohm (Typ.)

PL500

1UH_FDSD0412-H-1R0M-P3_3.3A_20%

1 2

220P_0201_25V7K

12

PR501

499_0402_1%

LX_1.8V

12

PR506

4.7_0805_5%

12

PC512

680P_0603_50V7K

R1=

PC505

1 2

VOUT-0.6

0.6

X R2

+1.8V_PRIMP

12

R1

PR502

40.2K_0402_1%

12

R2

PR504

20K_0402_1%

+1.8V_PRIMP

12

PC506

22U_0603_6.3V6M

PC508

PC507

22U_0603_6.3V6M

JUMP_43X118

1 2

PJP500

@

22U_0603_6.3V6M

12

PC509

@

22U_0603_6.3V6M

+1.8V_PRIM

2200P_0402_25V7K

PR503

PCH_PRIM_EN(16)

12

PU500

1

VIN

5

12

PG

8

VCC

11

EN

NB691GG-Z_QFN11_2X2

3.6V

AGND

9

B+

C C

1.8V_PRIM_PG(58,89)

B B

PL501

EMC@

HCB1608KF-121T30_0603

1 2

+3VALW

12

PR509

100K_0201_5%

12

PC502

PC501

10U_0603_25V6M

12

PC504

PC503

0.1U_0402_25V6

EMC@

@

150K_0201_5%

PC510

2.2U_0402_6.3V6M

A A

Security Classification

2017/08/24 2017/08/24

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2017/08/24 2017/08/24

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR_+1.8VPRIM

LA-G172P

1.0 (A00)

88 101Friday, May 24, 2019

1

88 101Friday, May 24, 2019

Vinaﬁx.com

5

4

3

2

1

VCCIN_AUX (Base on PDG rev 1.35) Peak Current 32A (ICCmax) TDC :14A

D D

B+

PL902

EMC@

HCB2012KF-800T50_2P

1 2

PL903

EMC@

HCB2012KF-800T50_2P

1 2

VIN_AUX

PVT_13

OCP Current 32A "valley" current-sensing Fsw=1MHz

+3VALW

PR900

5.1_0402_1%

1 2

VIN_AUX

1

+

PC903

PC904

C C

2

10U_0603_25V6M

33U_B3_16VM_R45M

12

PC905

10U_0603_25V6M

12

PC902

PC906

10U_0603_25V6M

CORE_VID1(16,78)

CORE_VID0(16,78)

12

PC907

10U_0603_25V6M

PC908

10U_0603_25V6M

PVT_13

12

PC909

1U_0402_16V6K

12

2

1

3

4

5

6

PVT_06

PR912

@

0_0201_5%

1.8V_PRIM_PG( 58,88)

B B

1 2

PC911

@

0.1U_0201_25V6K

1U_0402_16V6K

VIN

PGND_1

PGND_2

PGND_3

VID1

VID0

12

PC900

1 2

19

18

3V3

PGND_4

PU900

MP2941GL-Z_QFN19_3X4

EN

8

@

0_0201_5%

14

12

PR907

12

PR901

150K_0201_1%

7

FS

CLM

13

BST1

VOUT

RGND

MODE

15

12

PR908

0_0201_5%

SW1

SW2

BST2

PG

BST1_AUX

LX_AUX

12

11

BST2_AUX

10

VCCIN_AUX_VCCSENSE_VR

16

VCCIN_AUX_VSSSENSE_VR

17

9

VCCIN_AUX_VR_PG (58)

PR902

2.2_0603_5%

1 2

PR904

2.2_0603_5%

1 2

PC901

1U_0402_25V6K

1 2

PC910

1U_0402_25V6K

1 2

Main: CLSN, 2nd: Package: 7.5 x 6.9 x 2.4 Idc=27A, Isat=42A Rdc=0.88mohm +/-5%

PL900

0.15UH_MHCB06024-R15M-C1R885_27A_20%

1 2

PVT_06

PR915

@

0_0402_5%

1 2

PR916

@

0_0402_5%

LX_AUX

12

PR910

4.7_0805_5%

@EMC@

12

PC912

+VCCIN_AUX

12

PR903 100_0201_1%

12

PR906 100_0201_1%

VCCIN_AUX_VCCSENSE (16)

VCCIN_AUX_VSSSENSE (16)

@EMC@

680P_0603_50V7K

Table---1:VID control Bit logics

VID1 VID0 VOUT(V)

0 0 0

10 1.1

1 0 1.65

11 1.8

A A

5

Table---2:CLM Select

State CLM Resistor to GND

M1 7A 0

M3 13A 150k

4

10AM2 90k

16AM4 >230k or float

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

Table---3:MODE Select

State Interleaving VID Down option Resistor to GND

M1 N Slew down 0

YM2 90k

M3 Y Decay 150k

NM4 >230k or float

3

Slew down

Decay

Compal Secret Data

2017/08/24 2017/08/24

Deciphered Date

Table---4:FS Select

State Fs(kHz) Resistor to GND

M1 500 0

700M2 90k

M3 1000 150k

1200M4 >230k or float

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_VCCIN_AUX

LA-G172P

89 101Friday, May 24, 2019

1

89 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

D D

150U_B3 * 4 (POP*2, NC*2) 10U_0402 * 19 (POP*14, NC*5) 22U_0603 * 10 (POP*1, NC*9) 47U_0603 * 7 (POP*1, NC*6)

Primary side

1U_0201 * 5 (NC*5)

0.1U_0201 * 5 (NC*5)

+VCCIN_AUX

1

+

PC1001

PC1000

2

150U_B3_6.3VM_R35M

C C

12

PC1014

@

10U_0402_6.3V6M

12

PC1015

10U_0402_6.3V6M

1

+

PC1050

PC1002

2

@

PC1016

150U_B3_6.3VM_R35M

12

PC1018

PC1017

10U_0402_6.3V6M

12

PC1019

PC1020

10U_0402_6.3V6M

12

PC1021

@

10U_0402_6.3V6M

12

PC1022

PC1023

@

10U_0402_6.3V6M

+VCCIN_AUX

12

PC1004

@

22U_0603_6.3V6M

12

PC1024

47U_0603_6.3V6M

12

PC1005

@

22U_0603_6.3V6M

12

PC1025

@

47U_0603_6.3V6M

12

PC1006

@

22U_0603_6.3V6M

12

PC1026

@

47U_0603_6.3V6M

12

PC1007

PC1008

@

22U_0603_6.3V6M

12

PC1028

PC1027

@

47U_0603_6.3V6M

12

PC1010

PC1009

@

22U_0603_6.3V6M

12

PC1030

PC1029

@

47U_0603_6.3V6M

12

PC1012

PC1011

@

22U_0603_6.3V6M

PDG ver 1.35 Primary side: 2x 330uF 7343 3x 22uF 0603 12x 10uF 0402 1x 47uF 0805

12

PC1013

@

22U_0603_6.3V6M

12

PC1031

PC1032

@

10U_0402_6.3V6M

B B

12

PC1051

@

15P_0201_50V8J

PC1033

10U_0402_6.3V6M

12

PC1052

PC1053

@

15P_0201_50V8J

12

PC1034

10U_0402_6.3V6M

12

PC1054

@

15P_0201_50V8J

PC1036

PC1035

10U_0402_6.3V6M

PC1055

@

15P_0201_50V8J

12

PC1037

PC1038

@

10U_0402_6.3V6M

PC1039

10U_0402_6.3V6M

A A

Security Classification

2017/08/24 2017/08/24

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2017/08/24 2017/08/24

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR_DECOUPLING-VCCIN_AUX

LA-G172P

1

90 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

VCCIN (Base on PDG rev 1.35) Peak Current 70A (ICCmax) PL2 TDC :39A DC Load line :2mV/A

D D

AC Load line :4.2mV/A OCP Current 90A Fsw=600kHz

VRACPU_VTEMP(92)

PR1101

49.9K_0402_1%

PR1103

PVT_07

I_SYS(58,83)

CPU_B+

C C

PVT_07

PR1110

@

0_0402_5%

CS2(92)

CS1(92)

+VCCIN

VCCIN_SENSE(14)

VSSIN_SENSE(14)

B B

1 2

PR1116

@

0_0402_5%

PR1119

1 2

100_0201_1%

PR1126

1 2

100_0201_1%

PC1105

@

390P_0402_50V7K

1 2

PR1120

@

4.99K_0402_1%

1 2

PR1122 0_0402_5%

@

PR1124 0_0402_5%

@

PVT_07

Psys=65+51=116W

CSSUM

12

1 2

12

PR1107

1.5K_0402_1%

PR1117 806_0402_1%

@

0_0201_5%

1 2

PR1104

2M_0402_1%

PR1108

1.5K_0402_1%

1 2

PC1103 150P_0402_50V8J@

12

PR1106

133K_0402_1%

VFB

VCCIN_SENSE_VR

VSSIN_SENSE_VR

12

PC1100

2.2U_0402_6.3V6M

12

PC1104

0.1U_0402_25V7K

12

PR1100

PR1133

60.4K_0402_1%

9.09K_0402_1%

PU1100

1

2

3

4

5

6

7

CSSUM

IMON

12

PC1102

1000P_0402_25V8J

27

28

PSYS

CS3

CS2

CS1

VDIFF

VFB

VOSEN

VORTN

VIN_SEN

MP2940AGRT-0010-Z_TQFN28_4X4

IMON

CSSUM

9

8

10

12

PC1107

PR1134

61.9K_0402_1%

330P_0402_50V8J

+3VALW

25

24

26

TEMP

VDD33

3.3V

1.8V

VDD1811IREF

SCLK/VID012SDIO/VID113ALT#14AGND

VDD18

12

PC1108

2.2U_0402_6.3V6M

12

PR1102

4.7_0402_5%

12

PC1101

4.7U_0402_6.3V6M

PWM1 (92)

PWM2 (92)

22

PWM3

PWM223PWM1

EN

PE

STB

SCL_P

SDA_P

VRHOT#

VRRDY

29

SVID_ALERT#_VR

SVID_DAT_VR

SVID_CLK_VR

IMVP_VR_ON_EN (78)

+3VALW

12

21

20

19

18

17

16

15

@

PR1130 0_0402_5%

PR1131 0_0402_5%

@

PR1132 0_0402_5%

@

PR1111

10K_0201_5%

@

PE

IMVP_SMBCLK_VR

IMVP_SMBDAT_VR

PR1123 75_0402_5%

1 2

SYNC (92)

PVT_07

PR1115

@

0_0201_5%

1 2

+1.05V_VCCSTG +3VALW

12

PR1109

PR1112

10K_0201_5%

@

10K_0201_5%

@

+1.05V_VCCST

12

PR1127

PR1128

@

45.3_0402_1%

PR1129

45.3_0402_1%

100_0402_1%

12

PR1113

10K_0201_5%

@

12

PC1106

0.1U_0201_25V6K

SVID_ALERT# (14)

SVID_DAT (14)

SVID_CLK (14)

12

PR1114

@

1.91K_0402_1%

PR1118 0_0402_5%

@

1 2

PR1121 0_0402_5%

1 2

PR1125 0_0201_5%

1 2

PVT_07

IMVP_SMBCLK (58)

IMVP_SMBDAT (58)

H_PROCHOT# (11,16,58)

PCH_PWROK_P (11)

A A

Security Classification

2017/08/24 2017/08/24

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2017/08/24 2017/08/24

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR_VCCIN_CTRL

LA-G172P

1

1.0 (A00)

91 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

PC1201

EMC@

1000P_0402_50V7K

PC1211

33U_B3_16VM_R45M

PVT_14

12

PC1202

1U_0402_16V6K

1

+

PC1212

2

33U_B3_16VM_R45M

Low noise MLCC SE00000X210

12

PC1203

PC1204

PC1222

10U_0603-H1_2_25V6M

1

+

2

+3VS

VRACPU_VTEMP(91,92)

PR1200

@

0_0402_5%

1 2

PVT_08

PWM1(91)

SYNC(91,92)

CS1(91)

PVT_14

12

PC1206

1U_0402_16V6K

PR1204

@

1 2

0_0201_5%

PU1200

14

VCC

13

AGND

9

PWM

11

VTEMP/FLT

10

SYNC

12

CS

MP86902-BGLT-Z_TQFN21-15_3X4

VIN VIN

BST

SW SW SW

PGND PGND PGND

1 8

15

2 3 4

5 6 7

BST1_VCCIN

LX1_VCCIN

PC1207

0.22U_0603_25V7K

1 2

Main: CLSN, 2nd: Package: 7.5 x 6.9 x 2.4 Idc=27A, Isat=42A Rdc=0.88mohm +/-5%

PL1200

0.15UH_MHCB06024-R15M-C1R885_27A_20%

1 2

12

PR1201

4.7_1206_5%

@EMC@

12

PC1208

680P_0603_50V7K

@EMC@

+VCCIN

CPU_B+

12

PC1200

EMC@

0.1U_0402_25V6

PL1202

EMC@

HCB2012KF-800T50_2P

1 2

PL1203

EMC@

HCB2012KF-800T50_2P

1 2

PL1204

EMC@

HCB2012KF-800T50_2P

C C

B+

1 2

PL1205

EMC@

HCB2012KF-800T50_2P

1 2

PC1209

33U_B3_16VM_R45M

CPU_B+

1

+

PC1210

2

33U_B3_16VM_R45M

1

+

2

PC1214

EMC@

1000P_0402_50V7K

PVT_14

12

PC1215

1U_0402_16V6K

Low noise MLCC SE00000X210

12

PC1216

PC1217

10U_0603-H1_2_25V6M

12

PC1223

10U_0603-H1_2_25V6M

+3VS

VRACPU_VTEMP(91,92)

PR1202

@

0_0402_5%

1 2

PVT_08

PWM2(91)

SYNC(91,92)

CS2(91)

PVT_14

12

PC1219

1U_0402_16V6K

PR1205

@

1 2

0_0201_5%

PU1201

14

VCC

13

AGND

9

PWM

11

VTEMP/FLT

10

SYNC

12

CS

MP86902-BGLT-Z_TQFN21-15_3X4

VIN VIN

BST

SW SW SW

PGND PGND PGND

1 8

15

2 3 4

5 6 7

BST2_VCCIN

LX2_VCCIN

PC1220

0.22U_0603_25V7K

1 2

Main: CLSN, 2nd: Package: 7.5 x 6.9 x 2.4 Idc=27A, Isat=42A Rdc=0.88mohm +/-5%

PL1201

0.15UH_MHCB06024-R15M-C1R885_27A_20%

1 2

12

PR1203

4.7_1206_5%

@EMC@

12

PC1221

680P_0603_50V7K

@EMC@

+VCCIN

CPU_B+

B B

A A

12

PC1213

EMC@

0.1U_0402_25V6

Security Classification

2017/08/24 2017/08/24

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2017/08/24 2017/08/24

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR_VCCIN_Driver MOS

LA-G172P

1

92 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

4

3

2

1

D D

Primary side

150U_B3 * 4 (pop*2, NC*2) 10U_0402 * 8 (pop*4, NC*4) 22U_0603 * 8 (pop*7, NC*1)

PDG ver 1.35 Primary side: 2x 1uF 0402

47U_0603 * 2 (NC*2)

+VCCIN

For no CPU debug

1U0402 * 2 1U_0201 * 5 (NC*5)

0.1U_0201 * 5 (NC*5)

4x 10uF 0402 8x 22uF 0603 1x 47uF 0805

1

+

PC1302

PC1301

PC1300

2

@

150U_B3_6.3VM_R35M

2

@

150U_B3_6.3VM_R35M

12

PR1300

@

1K_0402_5%

PC1334

150U_B3_6.3VM_R35M

PVT_15

Low noise MLCC SE00000UD10

C C

12

PC1312

10U_0402_6.3V6M

12

PC1313

PC1314

PC1315

10U_0402_6.3V6M

12

PC1316

@

10U_0402_6.3V6M

12

PC1317

PC1318

@

10U_0402_6.3V6M

PC1319

@

10U_0402_6.3V6M

+VCCIN

Low noise MLCC SE00000M020

12

PC1305

PC1304

@

22U_0603_6.3V6M

12

PC1320

PC1321

@

47U_0603_6.3V6M

12

PC1306

22U_0603_6.3V6M

PVT_12

12

PC1308

PC1307

22U_0603_6.3V6M

PC1309

22U_0603_6.3V6M

12

PC1311

PC1310

22U_0603_6.3V6M

2x 330uF 7343

12

PC1323

PC1322

@

B B

12

PC1335

@

1U_0402_6.3V6K

12

PC1336

PC1337

@

15P_0201_50V8J

12

PC1339

PC1338

@

15P_0201_50V8J

BOT side

+VCCIN

12

PC1340

PC1341

@

15P_0201_50V8J

12

PC1343

PC1342

@

15P_0201_50V8J

12

PC1345

PC1344

@

15P_0201_50V8J

A A

Security Classification

2017/08/24 2017/08/24

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2017/08/24 2017/08/24

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR_DECOUPLING-VCCIN

LA-G172P

1

93 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

D D

4

3

2

1

+1.2VDX_SSD TDC 1.4A Peak Current 2A OCP 7.5A (Typ.) 750kHz

12

2200P_0402_25V7K

PR1507

SSD_PWR2_EN_P(78)

PU1500

1

5

12

8

12

11

EN

VIN

NB691GG-Z_QFN11_2X2

PG

VCC

3.6V

AGND

9

B+

C C

B B

PL1500

EMC@

HCB1608KF-121T30_0603

1 2

12

PC1504

PC1503

10U_0603_25V6M

12

PC1505

PC1501

0.1U_0402_25V6

EMC@

150K_0201_5%

PC1511

2.2U_0402_6.3V6M

1 2

BST_PWR2

7

BST

PGND_1 PGND_2 PGND_3

PR1502

0_0603_5%

6

SW

10

FB

2 3 4

12

Main: TOKO, 2nd: Package: 4.2 x 4.2 x 1.2

PC1502

0.22U_0402_16V7K

Idc=3.3A, Isat=6.2A Rdc=50mohm (Typ.)

PL1501

1UH_FDSD0412-H-1R0M-P3_3.3A_20%

LX_PWR2

1 2

LX_PWR2

12

PR1509

4.7_0805_5%

@EMC@

12

PC1512

@EMC@

680P_0603_50V7K

12

PC1506 220P_0201_25V7K

12

PR1503

499_0402_1%

VOUT-0.6

R1=

0.6

R1

SSD_PWR2_FB (68)

R2

X R2

R1 100k 100k

+SSD_PWR2P

R2 Vout

1.2V

100k

49.9k

1.8V

12

PC1508

PC1507

22U_0603_6.3V6M

JUMP_43X118

1 2

PJP1500

@

+SSD_PWR2P

12

PC1509

@

22U_0603_6.3V6M

12

PC1510

22U_0603_6.3V6M

+SSD_PWR2

A A

Security Classification

2017/08/24 2017/08/24

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2017/08/24 2017/08/24

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR_+1.2/+1.8V

LA-G172P

1.0 (A00)

94 101Friday, May 24, 2019

1

94 101Friday, May 24, 2019

Vinaﬁx.com

5

4

3

2

1

SSD_PWR3

D D

TDC 1.4A Peak Current 2A OCP 8.5A

State CLM Resistor to GND

M1

8.5A

10A 13A

16.5A

0

90K 150K >230K or float

M2 M3 M4

700kHz

12

B+

C C

PL1400

EMC@

HCB2012KF-800T50_2P

1 2

+3VALW

PC1401

0.1U_0402_25V6

@EMC@

12

PC1402

@EMC@

2200P_0402_50V7K

PR1409

5.1_0402_1%

1 2

12

PC1403

10U_0603_25V6M

SSD_PWR3_EN_P(78)

PR1406

100K_0201_5%

PC1411

2.2U_0402_6.3V6M

12

PC1404

10U_0603_25V6M

12

1

15

12

3

2

16

PU1400

NC_2

VIN

NB693GQ-Z_QFN16_3X3

EN

PG

3V3

PGND_1

4

@

0_0201_5%

11

CLM

PGND_35PGND_4

PGND_5

PGND_2

6

7

PR1400

10

MODE

8

LX_PWR3

PVT_09

BST_PWR3

BST

9

SW

13

FB

14

NC_1

PR1401

2.2_0603_5%

1 2

LX_PWR3

PR1408

@

0_0402_5%

1 2

PVT_09

PC1400

0.22U_0402_16V7K

1 2

Main: CLSN, 2nd: Package: 4.8 x 4.3 x 1.5 Idc=5A, Isat=8A Rdc=30mohm (Typ.)

PL1401

0.68UH_MHCI04015-R68M-R8_5A_20%

1 2

12

PC1405 220P_0201_25V7K

12

PR1403

499_0402_1%

LX_PWR3

12

PR1411

4.7_0805_5%

@EMC@

R1

SSD_PWR3_FB (68)

R2

R1 100k 100k 100k

R1=

R2 Vout 200k

0.9V

120k

1.1V

100k

1.2V

VOUT-0.6

0.6

+SSD_PWR3P

12

PC1407

PC1406

22U_0603_6.3V6M

X R2

PC1408

22U_0603_6.3V6M

12

PC1409

@

22U_0603_6.3V6M

B B

A A

5

4

State Resistor to GND

VOUT Fs

Vo<3V

Vo<3V Vo>=3V Vo>=3V

700kHz 0

1000kHz 1000kHz 700kHz

90K 150K >230K or float

2017/08/24 2017/08/24

3

M1

M2 M3 M4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

12

PC1412

@EMC@

680P_0603_50V7K

Compal Secret Data

Deciphered Date

+SSD_PWR3P

2

JUMP_43X118

1 2

PJP1400

@

Title

Size Document Number Rev

Date: Sheet of

+SSD_PWR3

Compal Electronics, Inc.

PWR_+1.2/+1.1/+0.9V

LA-G172P

1

95 101Friday, May 24, 2019

1.0 (A00)

Vinaﬁx.com

5

D D

4

3

2

1

+3V_NB_LID

+3VALW

PD603

2 1

+3.3V_BAT_LDO

RB520SM-30T2R_EMD2-2

PD604

2 1

LBAT54HT1G_SOD323-2

C C

12

PR606

B+

12

PR600

100K_0402_5%

12

PR603

100K_0402_5%

PR604

100K_0402_5%

B B

B+_FLAG(63)

2

G

12

PWRBTN#(58,77,79)

LID_POWER_ON#(58)

BATBTN#(58,63)

@

100K_0402_5%

13

D

PQ600 L2N7002WT1G_SC70-3

S

RB520SM-30T2R_EMD2-2

PR601

@

12

PD600

21

PD601

21

PD602

21

@

100K_0402_5%

PU600

SN74LVC1G123DCUR_VSSOP8

1

A#

B

A#

B

CLR#

GND

VCC

R/CEXT

CEXT

ALWON_3VALW(58,84)

2

3

4

8

7

6

5

Q

12

PR605

1M_0402_5%

PR607

@

0_0402_5%

1 2

PR608

@

0_0402_5%

1 2

12

PR602

549K_0402_1%

12

2.2U_0402_10V6M

A#

B

PVT_17

PC600

SYS_PRES# (82)

PVT_10

A A

Security Classification

2017/08/24 2017/08/24

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2017/08/24 2017/08/24

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR_SHIP_MODE

LA-G172P

1

1.0 (A00)

96 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2017/08/24 2017/08/24

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2017/08/24 2017/08/24

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

RESERVE

LA-G172P

1.0 (A00)

97 101Friday, May 24, 2019

1

97 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2017/08/24 2017/08/24

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2017/08/24 2017/08/24

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

RESERVE

LA-G172P

1.0 (A00)

98 101Friday, May 24, 2019

1

98 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2017/08/24 2017/08/24

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2017/08/24 2017/08/24

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

RESERVE

LA-G172P

1.0 (A00)

99 101Friday, May 24, 2019

1

99 101Friday, May 24, 2019

Vinaﬁx.com

5

D D

4

3

2

1

C C

B B

A A

Security Classification

2017/08/24 2017/08/24

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

2017/08/24 2017/08/24

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

RESERVE

LA-G172P

1.0 (A00)

100 101Friday, May 24, 2019

1

100 101Friday, May 24, 2019

Compal LA-G172P Schematics Rev1.0

Specifications and Main Features

Frequently Asked Questions

User Manual