Compal LA-F803P Schematics

A

1 1

B

C

D

E

Compal Confidential

2 2

KBL-Y MB Schematic Document

EPS30 LA-F803P

3 3

4 4

Security Class ification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev: 0.3

2018.06.08

2017/03/ 20 2020/03/ 20

Issued Date

2017/03/ 20 2020/03/ 20

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Cover Sheet

Size Document N umber Rev

Custom

LA-F803P

Date: Sheet of

D

Date: Sheet of

1 55Friday, June 08, 201 8

E

0.1

A

Compal Confidential

Model Name: KBL-Y

Project Name: LA-F803P

B

C

D

E

Kaby Lake Y Block Diagram

(KBL-Y 2+2 w/ LPDDR3L x64, Modern Standby )

1 1

A

FPC

Combo Jack

Sub-Board LS-F803P

Sub-Board

LS-F801P

2 2

eDP conn

JSIM

WWAN M.2 Conn.

TouchScreen Controller

eKTH6315

JTS2

eDP Redriver SN75DP130

HD + IR Camera

G-Sensor

Speaker AMP

TAS2557 T

Speaker_L

40 pin

40pin Conn.

40 pin

HP9DS1TR

PCIe Redriver

P. 26

udio Codec

Realtek ALC3292

P. 28

JLCD1

P

PCIe Redriver

SN75LVPE801DRFR

3 3

Follow Premiun Power Segment, S0ix & C10 optimized

HDA

I2S

P. 27

Speaker AMP

AS2557

P. 28

Speaker_R

. 22

P. 28

Headphone

eDP 1.3 x4

Intel Kaby Lake Y

2 + 2

I2C

Dual Core

USB2.0

ISH I2C

P. 25

USB2.0

Port 9

PCIe

Port 9

Port 1,5

TPD 4.5W

Memory Bus

Dual Channel 1866HMz

PCIe x4

Port 5 ~ 8

SPI0_CS0#

PCIe

U

SB2.0

USB2.0

USB3.1

Port 3

LPDDR3L Memory Down 64bit x 2

SSD (PCIe)

NGFF Key M

System BIOS ROM

8MB (TBD)

Port 10

Port 3

Port 7

W

LAN + BT

Windstorm Peak

SD1216

USB3.1 / DP Mux & Redriver

TI TUSB546A-DCIRNQR

DP

P. 24

I2C

P. 7

P. 23

P. 37

P. 19 ~ 21

TX/RX

SUB1/2

USB3.1 Type-C Conn.

P. 36

t

CC1 / CC2

Power Path

DC/DC Circuit

Power Circuit

Compal Electronics, Inc.

Title

CNL-Y_2+2 Block Diagrams

Size Document Number Rev

Custom

LA-F803P

Date: Sheet of

P. 39

P. 40 ~ 53

2 55Friday, June 08, 2018

E

2 55Friday, June 08, 2018

0.1

Port 1

Port 5

4 4

USB3.1

Type-C Conn.

P. 38

USB3.1

Type-C Conn.

P. 38

A

SBU1/2

TX/RX

MUX/DEMUX

TS3DS10224RUKR

P. 38

TX/RX

MUX/DEMUX

TS3DS10224RUKR

P. 38

CC1/2

C1/2

C

AUX

LSTX/RX

Thunderbolt 3

lpine Ridge DP

A

AUX

LSTX/RX

I2C

SB3.1 Type-C PD Controller

U

SPI ROM

8M-bi

TI TPS65988

B

P. 33~34

t

P. 35

PCIe x4

Port 1~4

DDI_1

DP

DI_2

D

I2C/SMBus

LPC

KBC

ENE KB9022

PS/2

P. 30 P

Int. KBDClickPad

C

P. 5 ~ 18

P. 29

SMBus

. 30

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NTDI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NTDI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NTDI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUTPRIOR WRI TTEN CONSENT OFCOMPA L ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUTPRIOR WRI TTEN CONSENT OFCOMPA L ELECTRONICS, INC.

USB3.1 Type-C PD Controller

TI TPS65987D

SPI ROM

2M-bi

Thermal Sensor

F75303M

2017/03/20 2020/03/20

P. 31

Compal Secret Data

Deciphered Date

D

A

+3VS

(TBC)

Device Address (7 bit)

Track PAD

TBC

N/A N/A N/A N/A

EC TBC TBC

TBC

(TBC)

BATT

Charger 0x09 0x12

TPS65988(1)

TPS65988(2)

TPS65987D

F75303M

Power CHIP

SN75DP130

Codec

SPK AMP

0x0B 0x16

0x25 TBC TBC

0x21

1001_101xb

TBC TBC TBC

(TBC)

+3V_PCH +1.8V_PRIM+5VALW +1.0V_PRIM +1.0VA_GATE +VCC_PRIM

X7676632L24

+1.2V_DDR +3.3V_CV2 +1.8V_MEM +

ON ON

OFF

R1Sam@

ZZZ

1.0V_VCCST

ON

ONOFF

Compal Electronics, Inc.

Title

Notes List

Size Document Number Rev

Custom

LA-F803P

Date: Sheet of

0x2C

0x10b TBC

1101011xb 0011110xb

+5VS +3VS +1.8VS +1.0V_VCCSTG +0.85VS_VCCIO +0.6VS_VTT +VCC_SA +VCC_GT +VCC_CORE

ON

OFF

Address (8bit)

Read

Write

TBC TBC

Address (8bit) Write

Read

0x17

0x13

TBC TBC

TBC0x23

TBC

TBCTBC TBC

Address (8bit)

Write Read

TBC TBC

TBC

3 55Friday, June 08, 2018

Board ID Table for AD channel

Vcc 3.3V

Ra

Board ID /

PCB Revision

0 / 0.2 0 1 / 0.3 2 / 0.4 4 / 1.0

100K +/- 1%

Rb

15K +/- 1% 27K +/- 1% 43K +/- 1%

BOM Structure Table

Function

S0IX Mode S0IX@ NDSX@ Non-S0IX Mode LPC 1.8V LPC 3.3V

RF Componets RF@ @RF@ EMI Components ESD Components ESD@ @ESD@ ME Cnnector CONN@

Stuff

NDSX@

LPC@

@CPUPWM@Panel PWM control

EMI@ @EMI@

Un-Stuff

S0IX@ LPC@

@ECPWM@

V min

BID

0.423 V

0.978 V

V TYP

BID

0 V 0.300 V

0.430 V 0.438 V

0.702 V

0.992 V 1.006 V

HSIO Port Table

HSIO Port Capable

0

USB3.1 #1

1

USB3.1 #2

2 USB3.1 #3

3 USB3.1 #4

V

BID

0.713 V

Max

EC AD3

0x00 - 0x0B 0x1D - 0x26 0x31 - 0x3B0.691 V

0x47 - 0x54

Device PCIe CLK

USB3.1 Type-C

NOTE

USB3.1 Type-C DP with Mux + PD

USB2.0 Port Table

USB2.0 Port Device

USB2.0 (MB)1

5

USB2.0 (MB)

7

USB2.0 (MB)

3

Blue Tooth

9

IR Camera

2

X

NOTE

USB3.1 Type-C + PD

WLAN 8265

SOC SMBUS Address Table

SOC_SMBUS Net Name

SOC_SMBCLK SOC_SMBDATA

SOC_SML0CLK SOC_SML0DATA

SML1_SMBCLK SML1_SMBDAT

Power Rail

+3V_PRIM

+3VS

EC SMBUS Address Table

EC_SMBUS Port

SMBUS Port 1

SMBUS Port 2

Power Rail Device Address (7 bit)

+3V_SMBUS

+3VL_EC

4 USB3.1 #5 / PCIE #1

5 USB3.1 #6 / PCIE #2

Un-stuff Components

@ TP@ Rshort@

Remove in MP MP@

6 PCIE #3

7 PCIE #4

8 PCIE #5

/ GbE

9 PCIE #6

10 PCIE #7

11 PCIE #8

1 1

12 PCIE #9

13 PCIE #10 WLAN CLK3 &

Power State

STATE

/ SATA #0

/ SATA #1

/ GbE

SIGNAL

S0 (Full ON)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

Load BOM Option Table

S5 (Soft OFF)

BOM Number Load BOM Option

431ACZ32L01

431ACZ32L02

431ACZ32L03

431ACZ32L04

431ACZ32L05

431ACZ32L06

431ACZ32L07

@CPUPWM@/LPC@/MP@/S0IX@/X4E@/RF@/R1Mi@/R1I7@

@CPUPWM@/LPC@/MP@/S0IX@/X4E@/RF@/R1Hy@/R1I5@

@CPUPWM@/LPC@/MP@/S0IX@/X4E@/RF@/R1Mi16@/R1I7@

@CPUPWM@/LPC@/MP@/S0IX@/X4E@/RF@/R1Sam@/R1I5@

@CPUPWM@/LPC@/MP@/S0IX@/X4E@/RF@/R1Mi16@/R1I7R@

@CPUPWM@/LPC@/MP@/S0IX@/X4E@/RF@/R1Mi16@/R1I5R@

@CPUPWM@/LPC@/MP@/S0IX@/X4E@/RF@/R1Hy@/R1I7R@

431ACZ32L08 @CPUPWM@/LPC@/MP@/S0IX@/X4E@/RF@/R1Mi@/R1I5R@

431ACZ32L09

431ACZ32L10

431ACZ32L11

@CPUPWM@/LPC@/MP@/S0IX@/X4E@/RF@/R1Sam@/R1I7R@

@CPUPWM@/LPC@/MP@/S0IX@/X4E@/RF@/R1Hy@/R1I5R@

@CPUPWM@/LPC@/MP@/S0IX@/X4E@/RF@/R1Mi@/R1I7R@

431ACZ32L12 @CPUPWM@/LPC@/MP@/S0IX@/X4E@/RF@/R1Sam@/R1I5R@

Thunderbolt, Alpine Rodge

SSD (NGFF_Key M)

WWAN CLK1 &

SLP_S4#

SLP_S3#

LOW HIGH

SLP_S5#

HIGH

LOWLOW

HIGH

+VALW

ON ON ON ONHIGH HIGH HIGH

ONONON

ON

+V

OFF

OFFLOW LOW LOW

CLK4 & CLKREQ#4

CLK2 & CLKREQ#2

CLKREQ#1

CLKREQ#3

+VS Clock

OFF

PCIe/SATA interface

OFF

SA0000ADW00 S IC HE8067702739826 SR345 H0 1.2G BGA

SA0000ADW10 S IC HE8067702739826 SR345 H0 1.2G A32 !

SA0000C4Q00 S IC A32 HE8067702739846 QLKW H0 1.3G BGA 1515

DAX

PCB

Part Number = DAA000H5000 PCB 2DC LA-F803P REV0 M/B

X4E@

ZZZ

X4EACZ32L01

R1I5@

UC1

R3I5@

UC1

R1I5R@

UC1

SMBUS Port 3

+3VALW

I2C/ISH Address Table

I2C Port

I2C 0

I2C 1

ISH_I2C 0

State

R1I7@

UC1

SA0000ADS30 S IC HE8067702739526 SR33X H0 1.3G BGA

R3I7@

UC1

SA0000ADS40 S IC HE8067702739526 SR33X H0 1.3G A32 !

R1I7R@

UC1

SA0000C4P00 S IC A32 HE8067702739858 QQF4 H0 1.5G BGA 1515

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NTDI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NTDI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NTDI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUTPRIOR WRI TTEN CONSENT OFCOMPA L ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUTPRIOR WRI TTEN CONSENT OFCOMPA L ELECTRONICS, INC.

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUTPRIOR WRI TTEN CONSENT OFCOMPA L ELECTRONICS, INC.

S0

S3 /AC

DS3

S5 S4/AC doesn't exist OFFO

R1Mi@

ZZZ

X7676632L21

2017/03/20 2020/03/20

Power Rail Device Address (7 bit)

+3VS

+3V_PRIM

+3VALW

Power plane

R1Hy@

ZZZ

X7676632L22

Compal Secret Data

Deciphered Date

Track PAD(Reserved)

Touch Screen

HP9DS1TR

+3VALW_D SW

+3VALW +1.8VALW +3VLP

ON

ON ON

ON

ONS5 S4/AC OFF

FF OFF

R1Mi16@

ZZZ

X7676632L23

0.1

5

4

[EPDS30-Power Map_KBL-Y2+2_LPDDR3L_Premium_S0ix]

3

2

1

+8.4V PUZ1

PWM

+3V_LID(Battery Cell)

D D

DC1

DC2

+3VL_RTC

+3VL

D2

D4

+3V_SMBUS

C C

[EPS30-SMBus Map]

UC1

SOC_SMBCLK

AC12 W6

SOC_SMBDATA

CPU

B B

AA4 W10

W4 AC10

CY10 CW9

AB11 AB9

SOC_SML0CLK SOC_SML0DATA

I2C_0_SCL I2C_0_SDA

I2C_1_SCL_TS I2C_1_SDA_TS

SOC_SML1CLK SOC_SML1DATA

+3VL

+3V_PRIM

R=1K

+3V_PRIM

R=1K

+3V_PRIM

R=1K

+3V_PRIM

R=1K

+3VALW_TP

QC3 @

Q2

+3VS

R=1K

SMB_CK2 SMB_DA2

+3VALW_TP

R=2.2K

+3VALW_TP

Q3

@

+3VS

R=2.2K

Thermal Sensor :F75303M

TP_SMBCLK TP_SMBDAT

Address : 1001_101x b

Touch Pad

Touch Screen

MP2940-0020

PU1001

SY8286RAC

PUH1 PWM NB681GD-Z

PUM1 PWM SY8210DQVC

PU301 Regulator SY8286BRAC

PU302 Regulator SY8286BRAC

Page. 50

Page. 48

Page. 44

Page. 39

Page. 33

+VCCIN

(33A)

+1.05V_PRIM

(4.91A)PWM

+1.05V_PRIM_COR E

(2.31A)

Premium

+0.6VS_VTT

+1.1V_VDDQ

+3VALW

PU1801 PWM G5719CTB1U

UC18 Loadswitch TPS22907YZTR

+5VALW

UV2 MOSFET G527ATP1U

Page. 40

Page. 29

+1.8PRIM

+3V_PRIM

(3.2A)

+5VS_SUB

(2A)

(0.15A)

+1.0V_PRIM

C10

+1.8V_PRIM

SYSON (PM_SLP_S4#)

UC5 +1.0VS_VCCST G Loadswitch TPS22922YZPR

Loadswitch TPS22907YZTR

UD5 Loadswitch TPS22913CYZVR

UA4

+3VALW

LDO G9090-180TO1U

Page. 12

+1.2V_VCCPLL_OCUC7+1.2V_VDDQ

Page. 12

+1.8V_MEM

Page. 21

+1.8VALW_AUDIO

Page. 28

For SPK AMP register value kee p.

Page. 39

Page. 24

Page. 23

+3VS_AUDIO

+1.8VS_AUDIO

+3VS_SSD

+3VS_WLAN

+3VALW

SUSP# (AUDIO_PWREN)

+3VALW

NGFF_SSD_PWREN

+3VALW

WLAN_PWR_EN

U7 Loadswitch TPS22907YZTR

US1 Loadswitch TPS22922YZPR

UN2 Loadswitch TPS22922YZPR

Premium

+3VS+3VALW

+5VS

+5VALW

SUSP#

(PM_SLP_S3#)

U6 Load Switch

EM5209VF

+3VS

UK1:+3VALW_EC

A A

Address : 0x1A/0X19

EC

(+3VL)

EC_SMB_CK2

B8 A6

EC_SMB_DA2

EC_SMB_CK1

A8 A7

EC_SMB_DA1

D6 E7

EC_SMB_CK3 EC_SMB_DA3

5

+3VL_EC

R=2.2K

+3V_SMBUS

R=2.2K

+3VALW

R=4.7K

EC_SMB_CK1_R EC_SMB_DA1_R

R=100

R=0

SPK AMP*2

R=0@

SCL_CHG SDA_CHG

QK3

BAT

Charger

Codec:ALC3292

0x09

TPS65988/TPS65987

+3VALW

4

QK5

JTYPEC1

JTYPEC2

JTYPEC3

SMB_BS_CLK SMB_BS_DAT

Address : 0x25

Address : 0x21

Address : 0x23

SCL_P_MP2940 SDA_P_MP2940

R=0

RE_CL RE_DA

R=0

R: Address : 0x4B W: Address : 0x4A

R: Address : 0x43 W: Address : 0x42

R: Address : 0x47 W: Address : 0x46

+3VALW

R=10K

+3VS_EDP_RE

R=10K

MP2940

SN75DP130

3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NTDI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NTDI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NTDI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUTPRIOR WRI TTEN CONSENT OFCOMPA L ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUTPRIOR WRI TTEN CONSENT OFCOMPA L ELECTRONICS, INC.

2017/03/20 2020/03/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Power MAP

LA-F801P

1

4 55Friday, June 08, 2018

0.1

5

+3VS

1 2

RC6 2.2K_0201_5%@

1 2

RC16 2.2K_0201_5%

1 2

RC32 2.2K_0201_5%@

1 2

RC33 2.2K_0201_5%

SOC_DP1_CT RL_CLK SOC_DP1_CT RL_DATA SOC_DP2_CT RL_CLK SOC_DP2_CT RL_DATA

PV: HPD double pull down

Functional Strap Definitions

D D

GPP_E19 (Internal Pull Down): DDPB_CTRLDATA

0 = Port B is not detected.

1 = Port B is detected.

GPP_E21 (Internal Pull Down): DDPC_CTRLDATA

0 = Port C is not detected.

1 = Port C is detected.

+3VS

1 2

RC1 100K_0201_5%@

1 2

RC71 10K_0201_5%@

1 2

RC485 10K_ 0201_5%

+1.0V_VCCST

C C

+1.0VS_VCCSTG

1 2

RC95 1K_0201_5%

1 2

RC80 49.9_0402_1%@

1 2

RC13 1K_0201_5%

+3V_PRIM

1 2

RC490 10K_ 0201_5%

TP_INT#

TS_INT#

EC_SCI#

H_THERMT RIP#

H_CATERR#

H_PROCHOT#

NMI_DBG#_CPU

4

Alpine Ridge

+0.85VS_VCCIO

3

PDG_Processor strap CFG[4] should be pulled

UC1A

NMI_DBG#_CPU(29)

@

A46

DDI1_TXN[0]

C46

DDI1_TXP[0]

C48

DDI1_TXN[1]

A48

DDI1_TXP[1]

B45

DDI1_TXN[2]

D45

DDI1_TXP[2]

B47

DDI1_TXN[3]

D47

DDI1_TXP[3]

A42

DDI2_TXN[0]

C42

DDI2_TXP[0]

A44

DDI2_TXN[1]

C44

DDI2_TXP[1]

B41

DDI2_TXN[2]

D41

DDI2_TXP[2]

B43

DDI2_TXN[3]

D43

DDI2_TXP[3]

L6

GPP_E18/DDPB_CTRLCLK

H6

GPP_E19/DDPB_CTRLDATA

H4

GPP_E20/DDPC_CTRLCLK

F4

GPP_E21/DDPC_CTRLDATA

M5

GPP_E22

L4

GPP_E23

A50

EDP_RCOMP

KBL-Y_BGA1515

12

@

TC69 @ TC68 @ TC6 @ TC7 @

TS_INT#(22) TP_INT#(30)

12 12

H_CATERR#

H_PROCHOT# _R H_THERMT RIP#

XDP_BPM#0_R XDP_BPM#1_R XDP_BPM#2_R XDP_BPM#3_R

TS_INT# TP_INT# NMI_DBG#_CPU

CPU_POPIRCOMP PCH_OPIRCOMP

SOC_DP1_N0(33) SOC_DP1_P0(33) SOC_DP1_N1(33) SOC_DP1_P1(33) SOC_DP1_N2(33) SOC_DP1_P2(33) SOC_DP1_N3(33) SOC_DP1_P3(33)

SOC_DP2_N0(33) SOC_DP2_P0(33) SOC_DP2_N1(33) SOC_DP2_P1(33) SOC_DP2_N2(33) SOC_DP2_P2(33) SOC_DP2_N3(33) SOC_DP2_P3(33)

P

RC4

RC4 Width 20 mils, Spacing 25 mils, Length < 100 mil

H_PECI(29)

H_PROCHOT#(29,49)

SOC_DP1_N0 SOC_DP1_P0 SOC_DP1_N1 SOC_DP1_P1 SOC_DP1_N2 SOC_DP1_P2 SOC_DP1_N3 SOC_DP1_P3

SOC_DP2_N0 SOC_DP2_P0 SOC_DP2_N1 SOC_DP2_P1 SOC_DP2_N2 SOC_DP2_P2 SOC_DP2_N3 SOC_DP2_P3

SOC_DP1_CT RL_CLK SOC_DP1_CT RL_DATA

SOC_DP2_CT RL_CLK SOC_DP2_CT RL_DATA

V: delete TS_RS T#_PCH

H_PECI H_PROCHOT#

24.9_0402_1 %

12

+EDP_COM

1 2

RC8 499_0402_1%

RC67 0_0402_5%

RC14 4 9.9_0402_1% RC15 4 9.9_0402_1%

SKYLAKE_ULX

DDI

<DDI1>

<DDI2>

DISPLAY SIDEBANDS

SKTOCC#

low to enable embedded DisplayPort*

DISPLAY

eDP

<DDI1>

<DDI2>

<DDI1>

GPP_E13/DDPB_HPD0

<DDI2>

GPP_E14/DDPC_HPD1 GPP_E15/DDPD_HPD2 GPP_E16/DDPE_HPD3

GPP_E17/EDP_HPD

1 OF 20

SKYLAKE_ULX

UC1D

@

H49

CATERR#

F49

PECI

J48

PROCHOT#

H47

THERMTRIP#

B62

SKTOCC#

H51

BPM#[0]

J50

BPM#[1]

F51

BPM#[2]

G50

BPM#[3]

E11

GPP_E3/CPU_GP0

M9

GPP_E7/CPU_GP1

BD8

GPP_B3/CPU_GP2

BC11

GPP_B4/CPU_GP3

BN17

PROC_POPIRCOMP

BP16

PCH_OPIRCOMP

CPU MISC

KBL-Y_BGA1515

EDP_DISP_UTIL

Rev0.87

EDP_TXN[0] EDP_TXP[0] EDP_TXN[1] EDP_TXP[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3]

EDP_AUXN EDP_AUXP

DDI1_AUXN DDI1_AUXP DDI2_AUXN DDI2_AUXP

EDP_BKLEN

EDP_BKLCTL

EDP_VDDEN

JTAG

4 OF 20

2

EDP_TXN0

H45

EDP_TXP0

F45

EDP_TXN1

J44

EDP_TXP1

G44

EDP_TXN2

J46

EDP_TXP2

G46

EDP_TXN3

H43

EDP_TXP3

F43

EDP_AUXN

J42

EDP_AUXP

G42

EDP_DISP

A40

SOC_DP1_AUXN

H41

SOC_DP1_AUXP

F41

SOC_DP2_AUXN

J40

SOC_DP2_AUXP

G40

SOC_DP1_HPD

C11

SOC_DP2_HPD

L10

EC_SCI#

M7 F6

EDP_HPD

A7

SOC_ENBKL

D4

SOC_BKL_PW M

B6

SOC_ENVDD

D3

Rev0.87

PROC_TCK

PROC_TDI PROC_TDO PROC_TMS

PROC_TRST#

PCH_JTAG_TCK

PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS

PCH_TRST#

JTAGX

1

EDP_TXN0 (22) EDP_TXP0 (22) EDP_TXN1 (22) EDP_TXP1 (22) EDP_TXN2 (22) EDP_TXP2 (22) EDP_TXN3 (22) EDP_TXP3 (22)

EDP_AUXN (22) EDP_AUXP (22)

@

0_0201_5%

CPU_XDP_TCK 0 SOC_XDP_TDI SOC_XDP_TDO SOC_XDP_TMS SOC_XDP_TRST #

PCH_JTAG_TC K1 SOC_XDP_TDI

SOC_XDP_TDO SOC_XDP_TMS SOC_XDP_TRST # CPU_XDP_TCK 0

12

SOC_DP1_AUXN (33) SOC_DP1_AUXP (33) SOC_DP2_AUXN (33) SOC_DP2_AUXP (33)

SOC_DP1_HPD (33) SOC_DP2_HPD (33) EC_SCI# (29 )

EDP_HPD (22)

SOC_ENBKL ( 22,29) SOC_BKL_PW M (22) SOC_ENVDD (22)

RC2

D53 C54 G48 C59 F47

B53 C50 B51 A52 C52 B49

<eDP>

TBT

+1.0VS_VCCSTG

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2041/09/08 2013/10/28

Compal Secret Data

Deciphered Date

2

Place to CPU si de

1

SOC_XDP_TMS

SOC_XDP_TDI

SOC_XDP_TDO

PCH_JTAG_TC K1

CPU_XDP_TCK 0

of

5 55Friday, June 08, 2018

RC390 51_0402_5 %@

RC389 51_0402_5 %@

RC391 51_0402_1 %

RC399 51_0402_5 %@

RC398 51_0402_1 %

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

12

Compal Electronics, Inc.

SKL Y(1/13) DDI,MSIC,XDP

LA-F803P

0.1

5

4

3

2

1

Non-Interleave Memory

D D

UC1B

DDR_A_D[0..15](19)

DDR_A_D[16..31 ](19)

C C

DDR_A_D[32..47 ](19)

DDR_A_D[48..63 ](19)

B B

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15

DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

@

AG61

DDR0_DQ[0]

AH60

DDR0_DQ[1]

AK62

DDR0_DQ[2]

AK60

DDR0_DQ[3]

AH62

DDR0_DQ[4]

AG63

DDR0_DQ[5]

AL61

DDR0_DQ[6]

AL63

DDR0_DQ[7]

AM60

DDR0_DQ[8]

AM62

DDR0_DQ[9]

AT60

DDR0_DQ[10]

AR61

DDR0_DQ[11]

AN61

DDR0_DQ[12]

AN63

DDR0_DQ[13]

AR63

DDR0_DQ[14]

AT62

DDR0_DQ[15]

Interleave/Non-lnterleaved

AT56

DDR1_DQ[0]/DDR0_DQ[16]

AR55

DDR1_DQ[1]/DDR0_DQ[17]

AN57

DDR1_DQ[2]/DDR0_DQ[18]

AN55

DDR1_DQ[3]/DDR0_DQ[19]

AR57

DDR1_DQ[4]/DDR0_DQ[20]

AT58

DDR1_DQ[5]/DDR0_DQ[21]

AM58

DDR1_DQ[6]/DDR0_DQ[22]

AM56

DDR1_DQ[7]/DDR0_DQ[23]

AL55

DDR1_DQ[8]/DDR0_DQ[24]

AL57

DDR1_DQ[9]/DDR0_DQ[25]

AH58

DDR1_DQ[10]/DDR0_DQ[26]

AH56

DDR1_DQ[11]/DDR0_DQ[27]

AK58

DDR1_DQ[12]/DDR0_DQ[28]

AK56

DDR1_DQ[13]/DDR0_DQ[29]

AG55

DDR1_DQ[14]/DDR0_DQ[30]

AG57

DDR1_DQ[15]/DDR0_DQ[31]

BE55

DDR0_DQ[16]/DDR0_DQ[32]

BC55

DDR0_DQ[17]/DDR0_DQ[33]

BG53

DDR0_DQ[18]/DDR0_DQ[34]

BE53

DDR0_DQ[19]/DDR0_DQ[35]

BC53

DDR0_DQ[20]/DDR0_DQ[36]

BG55

DDR0_DQ[21]/DDR0_DQ[37]

BD52

DDR0_DQ[22]/DDR0_DQ[38]

BF52

DDR0_DQ[23]/DDR0_DQ[39]

BC51

DDR0_DQ[24]/DDR0_DQ[40]

BE51

DDR0_DQ[25]/DDR0_DQ[41]

BC49

DDR0_DQ[26]/DDR0_DQ[42]

BE49

DDR0_DQ[27]/DDR0_DQ[43]

BG51

DDR0_DQ[28]/DDR0_DQ[44]

BG49

DDR0_DQ[29]/DDR0_DQ[45]

BF48

DDR0_DQ[30]/DDR0_DQ[46]

BD48

DDR0_DQ[31]/DDR0_DQ[47]

BJ55

DDR1_DQ[16]/DDR0_DQ[48]

BL55

DDR1_DQ[17]/DDR0_DQ[49]

BJ53

DDR1_DQ[18]/DDR0_DQ[50]

BL53

DDR1_DQ[19]/DDR0_DQ[51]

BN55

DDR1_DQ[20]/DDR0_DQ[52]

BN53

DDR1_DQ[21]/DDR0_DQ[53]

BM52

DDR1_DQ[22]/DDR0_DQ[54]

BK52

DDR1_DQ[23]/DDR0_DQ[55]

BL51

DDR1_DQ[24]/DDR0_DQ[56]

BJ51

DDR1_DQ[25]/DDR0_DQ[57]

BL49

DDR1_DQ[26]/DDR0_DQ[58]

BJ49

DDR1_DQ[27]/DDR0_DQ[59]

BN49

DDR1_DQ[28]/DDR0_DQ[60]

BN51

DDR1_DQ[29]/DDR0_DQ[61]

BK48

DDR1_DQ[30]/DDR0_DQ[62]

BM48

DDR1_DQ[31]/DDR0_DQ[63]

KBL-Y_BGA1515

Reserve

DDR0_ALERT #

SKYLAKE_ULX

DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]

DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]

DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]

DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]

DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]

DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]

DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]

DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]

DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]

DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]

DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]

DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]

DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]

DDR CH-A

2 OF 20

1 2

RC540 0_0201_5 %short@

DDR0_CKN[0] DDR0_CKP[0] DDR0_CKN[1] DDR0_CKP[1]

DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3]

DDR0_CS#[0] DDR0_CS#[1]

DDR3L / LPDDR3 / DDR4

DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQSP[1]/DDR0_DQSP[3] DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQSP[2]/DDR0_DQSP[4] DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQSP[3]/DDR0_DQSP[5] DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQSP[2]/DDR0_DQSP[6] DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQSP[3]/DDR0_DQSP[7]

DDR0_ODT[0]

DDR0_MA[3]

DDR0_MA[4] DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1]

Interleave/Non-lnterleaved

DDR0_ALERT#

DDR_VREF_CA

DDR0_VREF_DQ DDR1_VREF_DQ

DDR_VTT_CNTL

Rev0.87

DDR0_PAR

M_CLK_A_DDR #0

BC62

M_CLK_A_DDR 0

BC60

M_CLK_A_DDR #1

BA60

M_CLK_A_DDR 1

BA62

DDR_A_CKE0

BB57

DDR_A_CKE1

BC58

DDR_A_CKE2

BE57

DDR_A_CKE3

AW61

DDR_A_CS0#

AW63

DDR_A_CS1#

BJ57

DDR_A_ODT0

BN61

DDR_A_CAA_0

AW59

DDR_A_CAA_1

AW55

DDR_A_CAA_2

BF62

DDR_A_CAA_3

AV56

DDR_A_CAA_4

AW57

DDR_A_CAA_5

AV58

DDR_A_CAA_6

BA56

DDR_A_CAA_7

BD59

DDR_A_CAA_8

BD61

DDR_A_CAA_9

BG61

DDR_A_CAB_0

BK59

DDR_A_CAB_1

BL62

DDR_A_CAB_2

BJ61

DDR_A_CAB_3

AV60

DDR_A_CAB_4

BN62

DDR_A_CAB_5

BB61

DDR_A_CAB_6

BL61

DDR_A_CAB_7

BM59

DDR_A_CAB_8

BN58

DDR_A_CAB_9

AV62

BB63 BL57

DDR_A_DQS#0

AJ61

DDR_A_DQS0

AJ63

DDR_A_DQS#1

AP62

DDR_A_DQS1

AP60

DDR_A_DQS#2

AP56

DDR_A_DQS2

AP58

DDR_A_DQS#3

AJ57

DDR_A_DQS3

AJ55

DDR_A_DQS#4

BD54

DDR_A_DQS4

BF54

DDR_A_DQS#5

BF50

DDR_A_DQS5

BD50

DDR_A_DQS#6

BM54

DDR_A_DQS6

BK54

DDR_A_DQS#7

BK50

DDR_A_DQS7

BM50

DDR0_ALERT #

BG57 BM56

AR53 AN53 AW53

DDR_VTT_C NTL SM_RCOMP2

BN47

DDR_VTT_C NTL

M_CLK_A_DDR #0 (19) M_CLK_A_DDR 0 (19) M_CLK_A_DDR #1 (19) M_CLK_A_DDR 1 (19)

DDR_A_CKE0 (19) DDR_A_CKE1 (19) DDR_A_CKE2 (19) DDR_A_CKE3 (19)

DDR_A_CS0# (19) DDR_A_CS1# (19) DDR_A_ODT0 (19)

DDR_A_CAA_0 (19) DDR_A_CAA_1 (19) DDR_A_CAA_2 (19) DDR_A_CAA_3 (19) DDR_A_CAA_4 (19) DDR_A_CAA_5 (19) DDR_A_CAA_6 (19) DDR_A_CAA_7 (19) DDR_A_CAA_8 (19) DDR_A_CAA_9 (19) DDR_A_CAB_0 (19) DDR_A_CAB_1 (19) DDR_A_CAB_2 (19) DDR_A_CAB_3 (19) DDR_A_CAB_4 (19) DDR_A_CAB_5 (19) DDR_A_CAB_6 (19) DDR_A_CAB_7 (19) DDR_A_CAB_8 (19) DDR_A_CAB_9 (19)

DDR_A_DQS#0 (19) DDR_A_DQS0 (19) DDR_A_DQS#1 (19) DDR_A_DQS1 (19)

DDR_A_DQS#2 (19) DDR_A_DQS2 (19) DDR_A_DQS#3 (19) DDR_A_DQS3 (19) DDR_A_DQS#4 (19) DDR_A_DQS4 (19) DDR_A_DQS#5 (19) DDR_A_DQS5 (19) DDR_A_DQS#6 (19) DDR_A_DQS6 (19) DDR_A_DQS#7 (19) DDR_A_DQS7 (19) DDR_B_DQS# 6 (20)

T273TP@ T86TP@

+0.6V_VREFCA +0.6V_A_VREFDQ +0.6V_B_VREFDQ

Trace width/Spacing >= 20mils

1 2

RC48 0_0201_5%short@

DDR_B_D[0..15 ](20)

DDR_B_D[16 ..31](20)

DDR_B_D[32 ..47](20)

DDR_B_D[48 ..63](20)

SM_PG_CTRL (44)

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47

DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

UC1C

@

interleave / Non-lnterleaved

BC41

DDR0_DQ[32]/DDR1_DQ[0]

BC39

DDR0_DQ[33]/DDR1_DQ[1]

BG41

DDR0_DQ[34]/DDR1_DQ[2]

BE39

DDR0_DQ[35]/DDR1_DQ[3]

BF42

DDR0_DQ[36]/DDR1_DQ[4]

BD42

DDR0_DQ[37]/DDR1_DQ[5]

BG39

DDR0_DQ[38]/DDR1_DQ[6]

BE41

DDR0_DQ[39]/DDR1_DQ[7]

BC43

DDR0_DQ[40]/DDR1_DQ[8]

BD46

DDR0_DQ[41]/DDR1_DQ[9]

BG43

DDR0_DQ[42]/DDR1_DQ[10]

BG45

DDR0_DQ[43]/DDR1_DQ[11]

BC45

DDR0_DQ[44]/DDR1_DQ[12]

BE43

DDR0_DQ[45]/DDR1_DQ[13]

BE45

DDR0_DQ[46]/DDR1_DQ[14]

BF46

DDR0_DQ[47]/DDR1_DQ[15]

BM28

DDR1_DQ[32]/DDR1_DQ[16]

BN27

DDR1_DQ[33]/DDR1_DQ[17]

BK28

DDR1_DQ[34]/DDR1_DQ[18]

BL25

DDR1_DQ[35]/DDR1_DQ[19]

BN25

DDR1_DQ[36]/DDR1_DQ[20]

BL27

DDR1_DQ[37]/DDR1_DQ[21]

BJ25

DDR1_DQ[38]/DDR1_DQ[22]

BJ27

DDR1_DQ[39]/DDR1_DQ[23]

BM24

DDR1_DQ[40]/DDR1_DQ[24]

BK24

DDR1_DQ[41]/DDR1_DQ[25]

BN21

DDR1_DQ[42]/DDR1_DQ[26]

BJ23

DDR1_DQ[43]/DDR1_DQ[27]

BL23

DDR1_DQ[44]/DDR1_DQ[28]

BN23

DDR1_DQ[45]/DDR1_DQ[29]

BJ21

DDR1_DQ[46]/DDR1_DQ[30]

BL21

DDR1_DQ[47]/DDR1_DQ[31]

BN45

DDR0_DQ[48]/DDR1_DQ[32]

BM46

DDR0_DQ[49]/DDR1_DQ[33]

BL43

DDR0_DQ[50]/DDR1_DQ[34]

BK46

DDR0_DQ[51]/DDR1_DQ[35]

BN43

DDR0_DQ[52]/DDR1_DQ[36]

BL45

DDR0_DQ[53]/DDR1_DQ[37]

BJ45

DDR0_DQ[54]/DDR1_DQ[38]

BJ43

DDR0_DQ[55]/DDR1_DQ[39]

BM42

DDR0_DQ[56]/DDR1_DQ[40]

BN41

DDR0_DQ[57]/DDR1_DQ[41]

BJ41

DDR0_DQ[58]/DDR1_DQ[42]

BN39

DDR0_DQ[59]/DDR1_DQ[43]

BK42

DDR0_DQ[60]/DDR1_DQ[44]

BL41

DDR0_DQ[61]/DDR1_DQ[45]

BL39

DDR0_DQ[62]/DDR1_DQ[46]

BJ39

DDR0_DQ[63]/DDR1_DQ[47]

BF28

DDR1_DQ[48]

BD28

DDR1_DQ[49]

BG25

DDR1_DQ[50]

BC27

DDR1_DQ[51]

BG27

DDR1_DQ[52]

BE27

DDR1_DQ[53]

BE25

DDR1_DQ[54]

BC25

DDR1_DQ[55]

BF24

DDR1_DQ[56]

BD24

DDR1_DQ[57]

BG21

DDR1_DQ[58]

BC23

DDR1_DQ[59]

BE23

DDR1_DQ[60]

BG23

DDR1_DQ[61]

BC21

DDR1_DQ[62]

BE21

DDR1_DQ[63]

KBL-Y_BGA1515

SKYLAKE_ULX

DDR3L / LPDDR3 / DDR4

DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]

DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]

DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]

DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]

DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]

DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]

DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]

DDR1_BA[0] /DDR1_CAB[4]/DDR1_BA[0]

DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]

DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]

DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]

DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]

interleave / Non-lnterleaved

DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_DQSP[5]/DDR1_DQSP[1] DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_DQSN[5]/DDR1_DQSN[3] DDR1_DQSP[5]/DDR1_DQSP[3] DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQSN[7]/DDR1_DQSN[5] DDR0_DQSP[7]/DDR1_DQSP[5]

DDR CH-B

3 OF 20

Rev0.87

DDR1_CKN[0] DDR1_CKP[0] DDR1_CKN[1] DDR1_CKP[1]

DDR1_CKE[0] DDR1_CKE[1] DDR1_CKE[2] DDR1_CKE[3]

DDR1_CS#[0] DDR1_CS#[1] DDR1_ODT[0]

DDR1_MA[3] DDR1_MA[4]

DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7]

DDR1_ALERT#

DDR1_PAR DRAM_RESET# DDR_RCOMP[0] DDR_RCOMP[1] DDR_RCOMP[2]

BK36 BM36 BD32 BF32

BN33 BK32 BG33 BH30

BM30 BJ33 BC35

BK30 BN31 BM32 BL37 BG31 BN37 BJ37 BJ35 BM34 BN35 BG37 BE37 BC37 BF34 BC33 BF30 BD36 BG35 BC31 BF36

BJ31 BK34

BD40 BF40 BD44 BF44 BK26 BM26 BM22 BK22 BK44 BM44 BM40 BK40

BD26 BF26 BF22 BD22 BD34 BD30 BP20 BF64 BJ64 BC64

M_CLK_B_DD R#0 M_CLK_B_DD R0 M_CLK_B_DD R#1 M_CLK_B_DD R1

DDR_B_CKE0 DDR_B_CKE1 DDR_B_CKE2 DDR_B_CKE3

DDR_B_CS0 # DDR_B_CS1 # DDR_B_ODT 0

DDR_B_CAA_0 DDR_B_CAA_1 DDR_B_CAA_2 DDR_B_CAA_3 DDR_B_CAA_4 DDR_B_CAA_5 DDR_B_CAA_6 DDR_B_CAA_7 DDR_B_CAA_8 DDR_B_CAA_9 DDR_B_CAB_0 DDR_B_CAB_1 DDR_B_CAB_2 DDR_B_CAB_3 DDR_B_CAB_4 DDR_B_CAB_5 DDR_B_CAB_6 DDR_B_CAB_7 DDR_B_CAB_8 DDR_B_CAB_9

DDR_B_DQS# 0 DDR_B_DQS0 DDR_B_DQS# 1 DDR_B_DQS1 DDR_B_DQS# 2 DDR_B_DQS2 DDR_B_DQS# 3 DDR_B_DQS3 DDR_B_DQS# 4 DDR_B_DQS4 DDR_B_DQS# 5 DDR_B_DQS5

DDR_B_DQS# 6 DDR_B_DQS6 DDR_B_DQS# 7 DDR_B_DQS7 DDR1_ALERT #

DDR3_DRAMR ST# SM_RCOMP0 SM_RCOMP1

SC03

0.1U_0201_ 16V6K

@ESD@

M_CLK_B_DD R#0 (20) M_CLK_B_DD R0 (20) M_CLK_B_DD R#1 (20) M_CLK_B_DD R1 (20)

DDR_B_CKE0 (20) DDR_B_CKE1 (20) DDR_B_CKE2 (20) DDR_B_CKE3 (20)

DDR_B_CS0 # (20) DDR_B_CS1 # (20) DDR_B_ODT 0 (20)

DDR_B_CAA_0 (20) DDR_B_CAA_1 (20) DDR_B_CAA_2 (20) DDR_B_CAA_3 (20) DDR_B_CAA_4 (20) DDR_B_CAA_5 (20) DDR_B_CAA_6 (20) DDR_B_CAA_7 (20) DDR_B_CAA_8 (20) DDR_B_CAA_9 (20) DDR_B_CAB_0 (20) DDR_B_CAB_1 (20) DDR_B_CAB_2 (20) DDR_B_CAB_3 (20) DDR_B_CAB_4 (20) DDR_B_CAB_5 (20) DDR_B_CAB_6 (20) DDR_B_CAB_7 (20) DDR_B_CAB_8 (20) DDR_B_CAB_9 (20)

DDR_B_DQS# 0 (20) DDR_B_DQS0 (20) DDR_B_DQS# 1 (20) DDR_B_DQS1 (20) DDR_B_DQS# 2 (20) DDR_B_DQS2 (20) DDR_B_DQS# 3 (20) DDR_B_DQS3 (20) DDR_B_DQS# 4 (20) DDR_B_DQS4 (20) DDR_B_DQS# 5 (20) DDR_B_DQS5 (20)

DDR_B_DQS6 (20) DDR_B_DQS# 7 (20) DDR_B_DQS7 (20)

T91 T87TP@ T274TP@

1 2

RC45 200_0402_1%

1 2

RC46 80.6_0402_1%

1 2

RC47 162_0402_1%

12

DDR3_DRAMR ST#

DDR1_ALERT #

A A

5

1 2

RC524 0_0201_5 %short@

2016-08-24 Modify-Follow TD team

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2041/09/08 2013/10/28

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

SKL Y(2/13) DDRIII

LA-F803P

1

6 55Friday, June 08, 2018

0.1

5

4

3

2

1

Functional Strap Definitions

GPP_C2 (Internal Pull Down): SMBALERT#

0 = Disable Intel ME Crypto Transport Layer Security

(TLS) cipher suite (no confidentiality).

1 = Enable Intel ME Crypto Transport Layer Security

(TLS) cipher suite (with confidentiality). Must be pulled up to support Intel AMT with TLS and Intel SBA (Small Business Advantage) with TLS.

+3V_PRIM

CLK_LPC _EC_R (29)

LPC_CLK RUN# (29)

RH101

2.2K_020 1_5%

@

SOC_SMB ALERT#

12

C LINK

SKYLAKE_ULX

LPC

5 OF 20

Rev0.87

GPP_C0/SMBCLK

GPP_C1/SMBDATA

GPP_C2/SMBALERT#

GPP_C3/SML0CLK

GPP_C4/SML0DATA

GPP_C5/SML0ALERT#

GPP_C6/SML1CLK

GPP_B23/SML1ALERT#/PCHHOT#

GPP_A14/SUS_STAT#/ESPI_RESET#

GPP_A9/CLKOUT_LPC0/ESPI_CLK

GPP_C7/SML1DATA

GPP_A1/LAD0/ESPI_IO0 GPP_A2/LAD1/ESPI_IO1 GPP_A3/LAD2/ESPI_IO2 GPP_A4/LAD3/ESPI_IO3

GPP_A5/LFRAME#/ESPI_CS#

GPP_A10/CLKOUT_LPC1

GPP_A8/CLKRUN#

AC12 W6 W8

W4 AC10 AA6

AA4 W10 BB6

BK11 BJ8 BG10 BP5 BP7 BJ6

BJ10 BF5 BH11

SOC_SMB ALERT#

SOC_SML 0CLK SOC_SML 0DATA GPP_C5

PCH_TBT _RST# TBT_W AKE# SOC_SML 1ALERT#

LPC_AD0

RC446 0_0201_ 5%LPC@

LPC_AD1

RC447 0_0201_ 5%LPC@

LPC_AD2

RC448 0_0201_ 5%LPC@

LPC_AD3

RC449 0_0201_ 5%LPC@

CLK_LPC _EC CLKOUT_ LPC1 LPC_CLK RUN#

SOC_SMB CLK (30) SOC_SMB DATA (30)

PCH_TBT _RST# (33) TBT_W AKE# (33)

1 2 1 2 1 2 1 2

1 2

RH20 22_0201 _5%EMI@

T23TP@

PIR29 SI: pop CH47

LPC_AD0 _R LPC_AD1 _R LPC_AD2 _R LPC_AD3 _R

CH47

RF@

68P_0201_50V8J

Connect TP

P

V: modify for RTD3

LPC_AD0 _R (29) LPC_AD1 _R (29) LPC_AD2 _R (29) LPC_AD3 _R (29)

LPC_FRA ME# (29)

CLK_LPC _EC_R

1

2

UC1E

50MHz

D D

T13 TP@ T369 TP@

WW AN_DISABLE#(26)

WW AN_PWRE N(26) CAMERA_ PWREN(26) WW AN_PREN(25 )

PV: control WWAN

To EC

T21 TP@ T22 TP@ T24 TP@

EC_KBRS T#(29) LPC_SER IRQ(29)

PCH_SPI_C LK PCH_SPI_S O PCH_SPI_S I PCH_SPI_IO2 PCH_SPI_IO3 PCH_SPI_C S0# PCH_SPI_C S1# PCH_SPI_C S2#

T15 TP@

WW AN_DISABLE# WW AN_PWRE N

T370 TP@

CL_CK CL_DATA CL_RST_ N

EC_KBRS T# LPC_SER IRQ

LPC Mode

@

AU10

SPI0_CLK

AU12

SPI0_MISO

AT3

SPI0_MOSI

AV11

SPI0_IO2

AV13

SPI0_IO3

AU4

SPI0_CS0#

AU6

SPI0_CS1#

AU8

SPI0_CS2#

P9

GPP_D1

N8

GPP_D2/SPI1_MISO

P3

GPP_D3

W12

GPP_D21

V7

GPP_D22

N6

GPP_D0

F12

CL_CLK

D12

CL_DATA

B12

CL_RST#

BL10

GPP_A0/RCIN#

BN8

GPP_A6/SERIRQ

KBL-Y_BGA1515

SPI - FLASH SMBUS, SMLINK

SPI - TOUCH

Functional Strap Definitions

C C

+3V_PRIM +3.3 V_SPI

Closed to ROM

PCH_SPI_S I PCH_SPI_C LK

From CPU

EC_SPI_SO(29)

From EC

(For share ROM)

B B

EC_SPI_SI(29) EC_SPI_CL K_R(29) EC_SPI_CS #0(29)

PCH_SPI_S O PCH_SPI_IO2 PCH_SPI_IO3

EC_SPI_SO EC_SPI_SI EC_SPI_CL K_R EC_SPI_CS #0

RC454 33_02 01_5% RC455 33_02 01_5% RC456 33_02 01_5% RC457 33_02 01_5% RC539 33_02 01_5%

RC458 33_02 01_5% RC459 33_02 01_5% RC460 33_02 01_5% RC461 33_02 01_5%

EMI@

LPC@ LPC@ LPC@ LPC@

12 12 12 12 12

12 12 12 12

SPI_SI_VROM0 SPI_CLK_V ROM0 SPI_SO_VR OM0 SPI_IO2_VROM 0 SPI_IO3_VROM 0

SPI_SO_VR OM0 SPI_SI_VROM0 SPI_CLK_V ROM0 PCH_SPI_C S0#

To SPI ROM

16M SPI ROM(Support ISH)

PCH_SPI_C S0# SPI_SO_VR OM0 SPI_IO3_VROM 0 SPI_IO2_VROM 0 SPI_CLK_V ROM0

UC2

1

CS#

2

HOLD#_RESET#

DO

3

WP#

4

GND

W25 Q128FVPIQ_W SON8_6X5

SA00007 XA10

ThemalPad

VCC

CLK

8 7 6

SPI_SI_VROM0

5

DI

9

RH470

1 2

+3.3V_SP I

1

2

0_0402_ 5%@

CH35

0.1U_020 1_10V6K

GPP_B23 :SML1ALERT#

If USB 3.0 Port 1 is used for 4-wire DCI.OOB (BSSB), and

‧‧‧‧

alternate functionality is also used on the pin, pull up to V3.3S with >100K resistor to avoid noise.

If USB 3.0 Port 1 is used for DCI.OOB (BSSB) 4-wire

‧‧‧‧

BSSB, and NO alternate functionality is used, leave float.

If DCI.OOB (BSS B) 2+2 functio nality is used, pull up to

‧‧‧‧

V3.3S with a 4.7K resistor.

PIR24 SI: Change to 16M

GPP_C5 (Internal Pull Down): SML0ALERT#

0 = LPC Is selected for EC.

1 = eSPI Is selected for EC.

SOC_SML 1ALERT#

PCH_TBT _RST# TBT_W AKE#

SOC_SML 0CLK SOC_SML 0DATA

SOC_SMB CLK SOC_SMB DATA

+3V_PRIM

RH102 4.7K_040 2_5%

RH96 10K_020 1_5%@ RH97 10K_020 1_5%

RH99 1K_0201 _5% RH100 1K_0201 _5%

RH94 1K_0201 _5% RH95 1K_0201 _5%

RH98

@

10K_020 1_5%

1 2

1 2 1 2

GPP_C5

12

+3V_PRIM

+3VS

LPC_CLK RUN#

LPC_SER IRQ

A A

Security Class ification

2041/09/ 08 2013/10/ 28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2041/09/ 08 2013/10/ 28

3

Compal Secret Data

Deciphered Date

2

EC_KBRS T#

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet of

Compal Electronics, Inc.

SKL Y(3/13) SPI,SMB

LA-F803P

1 2

RH13 8.2K_020 1_5%

1 2

RH472 10K_020 1_5%

1 2

RH473 10K_020 1_5%

7 55Friday, June 08, 201 8

1

0.1

5

4

3

2

1

AUDIO

<+3V_1.8V_PGPPD>

12

EMI@

12 12 12

SKYLAKE_ULX

7 OF 20

SDIO/SDXC

GPP_A17/SD_PWR_EN#/ISH_GP7

MP@

1

CC171

2.2P_0201_25V

2

GPP_G0/SD_CMD GPP_G1/SD_DATA0 GPP_G2/SD_DATA1 GPP_G3/SD_DATA2 GPP_G4/SD_DATA3

GPP_G5/SD_CD# GPP_G6/SD_CLK

GPP_G7/SD_WP

GPP_A16/SD_1P8_SEL

SD_RCOMP

HDA_BIT_C LK HDA_SYNC HDA_SDO UT HDA_RST #

RF@

1

CC140

10P_0201_25V8

CC170

2

HDA_SDIN0

Rev0.87

GPP_F23

AH9 AH11 AG12 AF9 AF11 AG8 AG10 AE12

BL4 BN4

BF1

AJ8

SDIO_RCOM P

RC60 200_020 1_1%

@

12

561280_KBL UY PDG Rev2_0 if SDXC interface is not used, the SD_RCOMP pin does not need to be connected to a RCOMP resistor.

To Enable ME Override

ME_EN(29)

+3V_HDA

1 2

RC500 1K _0201_1%

VGS(Max) : <1.5 V

HDA_SDO / I2S0_TXD (Internal Pull Down)(Primary well): Flash Descriptor Security Override 0 = Enable (Default) 1 = Disable (Override) The internal pull-down is disabled after PCH_PWROK is High.

1

QC1 PJE138K 1N SOT-523-3

1 2

@

RC501 100K_0201_5 %

1 2

RC507 0_0201_ 5%@

2

HDA_SDO UT

3

UC1G

A00_0906: EMI Request RH109 33chnage 56ohm

HDA_SYNC HDA_BIT_C LK HDA_SDO UT HDA_SDIN0

HDA_RST #

D D

Camera

RTD3_US B_PWR_EN(33)

WLA N_TRANSMIT_OFF#(23)

T30 TP@

BT_ON(23 )

T127 TP@

SOC_DMIC_ CLK0(22) SOC_DMIC_ DATA0(22)

AUDIO_PW REN(39)

WW AN_ASPM_CT RL(26)

SPKR(27)

RTD3_US B_PWR_EN

WLA N_TRANSMIT_OFF#

SOC_GPIOF 0

BT_ON

SOC_GPIOF 3

SOC_DMIC_ CLK0 SOC_DMIC_ DATA0

AUDIO_PW REN WW AN_ASPM_CT RL

SPKR

@

BJ19

HDA_SYNC/I2S0_SFRM

BK18

HDA_BLK/I2S0_SCLK

BK16

HDA_SDO/I2S0_TXD

BL15

HDA_SDI0/I2S0_RXD

BL17

HDA_SDI1/I2S1_RXD

BL19

HDA_RST#/I2S1_SCLK

V5

GPP_D23/I2S_MCLK

BL12

I2S1_SFRM

BK14

I2S1_TXD

AT13

GPP_F1/I2S2_SFRM

AT11

GPP_F0/I2S2_SCLK

AP11

GPP_F2/I2S2_TXD

AT5

GPP_F3/I2S2_RXD

V3

GPP_D19/DMIC_CLK0

V11

GPP_D20/DMIC_DATA0

U12

GPP_D17/DMIC_CLK1

U8

GPP_D18/DMIC_DATA1

AV3

GPP_B14/SPKR

KBL-Y_BGA1515

Functional Strap Definitions

GPP_B14 (Internal Pull Down): SPKR TOP Swap Override 0 = Disable TOP Swap mode.---> AAU30 Use 1 = Enable TOP Swap Mode.

C C

+3V_PRIM

RC83

1 2

@

100K_02 01_5%

RTD3_US B_PWR_EN

SPKR

+3V_PRIM

1 2

@

RC577 49 .9K_0201_1%

HDA for AUDIO

HDA_BIT_C LK_R(27) HDA_SYNC_ R(27) HDA_SDO UT_R(27) HDA_RST #_R(27)

HDA_SDIN0(27)

RC462 33_0201 _5% RC463 33_0201 _5% RC464 33_0201 _5% RC499 33_0201 _5%

UC1I

G30

G32

H29 F29 F33 H33

D29 B29 C32 A32 C30 A30 D33 B33

D35 B35 C36 A36 D37 B37 C38 A38

J30

J32

@

CSI2_DN0 CSI2_DP0 CSI2_DN1 CSI2_DP1 CSI2_DN2 CSI2_DP2 CSI2_DN3 CSI2_DP3

CSI2_DN4 CSI2_DP4 CSI2_DN5 CSI2_DP5 CSI2_DN6 CSI2_DP6 CSI2_DN7 CSI2_DP7

CSI2_DN8 CSI2_DP8 CSI2_DN9 CSI2_DP9 CSI2_DN10 CSI2_DP10 CSI2_DN11 CSI2_DP11

KBL-Y_BGA1515

B B

A A

SKYLAKE_ULX

CSI-2

eMMC

GPP_F13/EMMC_DATA0 GPP_F14/EMMC_DATA1 GPP_F15/EMMC_DATA2 GPP_F16/EMMC_DATA3 GPP_F17/EMMC_DATA4 GPP_F18/EMMC_DATA5 GPP_F19/EMMC_DATA6 GPP_F20/EMMC_DATA7

GPP_F21/EMMC_RCLK

GPP_F12/EMMC_CMD

9 OF 20

5

Rev0.87

CSI2_CLKN0

CSI2_CLKP0

CSI2_CLKN1

CSI2_CLKP1

CSI2_CLKN2

CSI2_CLKP2

CSI2_CLKN3

CSI2_CLKP3 CSI2_COMP

GPP_D4/FLASHTRIG

GPP_F22/EMMC_CLK

EMMC_RCOMP

H31 F31 D31 B31 C34 A34 D39 B39 A11 N4

AN12 AP9 AN10 AJ10 AM9 AL12 AJ12 AN8

AL10 AL8 AM11

BC1

CSI2_COMP

RAM_ID0 RAM_ID1 RAM_ID2

EMMC_RC OMP

4

RC64 100_020 1_1%

12

RC61 200_020 1_1%

12

Security Class ification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

RAM ID

3

DDR Memory Configuratino Type Strap pin

+1.8V_PR IM

1K_0201_1%

RC138

@

RAM_ID0 RAM_ID1 RAM_ID2

2041/09/ 08 2013/10/ 28

1 2

1K_0201_1%

RC509

@

1 2

Compal Secret Data

1K_0201_1%

RC510

@

1 2

1K_0201_1%

RC508

@

1 2

Deciphered Date

RC511

1 2

RC512

1 2

L01

@

L02

L04

2

RAM_ID2/1/0

000

001

010

011L03 Micron 16G

P/N DescribtionConfig

S IC D3 512M64 Micron 8G LPDDR3L

Hynix 8G LPDDR3L

SAMSUNG 8GB LPDDR3L

LPDDR3L

Micron 8GB LPDDR3L

Hynix 4GB LPDDR3L

SAMSUNG 4GB LPDDR3L

R1 SA00009Z800

R1 SA000092J20

R1 SA00009DC00

SA0000C1800

R3 SA00009Z810

R3 SA000092J30

R3 SA00009DC10

Title

SKL Y(4/13) HDA,EMMC,SDIO

Size Document N umber Rev

LA-F803P

Date: Sheet of

Date: Sheet

MT52L512M64D4PQ-107WT:B

S IC D3 32G/1866

H9CCNNNCPTALBR-NUD

FBGA

S IC D3 32G/1866

K3QF4F40BM-AGCF

FBGA

S IC D3 64G/1866

MT52L1G64D8QC-107 WT:B

S IC D3

MT52L512M64D4PQ-107WT:B

A32!

S IC D3 32G/1866

H9CCNNNCPTALBR-NUD

FBGA A32 !

S IC D3 32G/1866

K3QF4F40BM-AGCF

A32 !

Compal Electronics, Inc.

Matched ResisterSKU

RC509 RC508 RC512

RC138

RC509 RC510 RC512

1

8 55Friday, June 08, 201 8

RC508 RC512

RC512RC510RC138R1

of

0.1

5

+3VL_RT C

1 2

RC514 20K_0 201_5%

1 2

CC6 1U_0201_6 .3V6M

1 2

CLRP1 S HORT PADS

1 2

D D

+3VS

+3V_PRIM

C C

+3VALW _DSW

B B

RC513 20K_0 201_5%

1 2

CC277 1U_02 01_6.3V6M

1 2

CLRP2 S HORT PADS

1 2

RC54 1M_020 1_5%

1 2

RC474 10K_020 1_5%@

1 2

RC475 10K_020 1_5%

1 2

RC476 10K_020 1_5%

1 2

RC477 10K_020 1_5%@

1 2

RC478 10K_020 1_5%

1 2

RH114 10K_020 1_5%@

1 2

RH208 10K_020 1_5%

1 2

RH132 10K_020 1_5%

1 2

RH44 100K_02 01_5%

1 2

RH115 10K_020 1_5%

1 2

RH210 10K_020 1_5%

1 2

RH117 10K_020 1_5%

1 2

RH82 10K_020 1_5%

1 2

RH471 1K_0201 _5%

1 2

RH68 2.2K_020 1_5%

1 2

RH50 100K_02 01_5%

1 2

RH49 10K_020 1_5%

1 2

CC278 100P_02 01_50V8J

ESD@

PCH_SUS WARN#(29)

SOC_SRT CRST#

SOC_RTC RST#

SM_INTRUD ER#

CLKREQ_ PCIE#1

CLKREQ_ PCIE#2

CLKREQ_ PCIE#3

CLKREQ_ PCIE#4

PCH_SUS WARN# VRALERT #

SYS_RESET #

PCH_PW ROK

AC_PRES ENT_R PCH_GPD 11 BATLOW # LAN_W AKE# SOC_PCIE_ WAKE# PBTN_OU T#_R

PCH_DPW ROK_R EC_RSMR ST#

SUSACK#(29 )

CLR ME

N

CLR CMOS

Wireless LAN

CLKREQ_PCIE#3 use PU RN19.

CLRP4 SHORT PA DS

1 2

RH60 0_0201_ 5%short@

PV: remove TBT_WAKE#

PBTN_OU T#(29 )

ACIN(29)

DPWR OK_EC(29 )

A A

RC516 0_020 1_5%

RC515 0_020 1_5%

RC69 0_0 201_5%

12

PBTN_OU T#_R

AC_PRES ENT_R

PCH_DPW ROK_R

RH66

1K_0201 _5%

R03_0629 For Thermal diode placement del UH2 RH4

EC_VCCS T_PG_R(29)

5

WWAN

VMe SSD

12

PLT_RST#(22,23,24,29,31,33)

EC_RSMR ST#(29)

SYS_PW ROK(29) PCH_PW ROK(29 )

+1.0V_VC CST

4

AR

SYS_RESET #

TC67 @

12

RC79

1 2

60.4_040 2_1%

4

3

@

CLK_PCIE_ N1(26) CLK_PCIE_ P1(26 ) CLKREQ_ PCIE#1(26)

CLK_PCIE_ N2(24) CLK_PCIE_ P2(24 ) CLKREQ_ PCIE#2(24)

CLK_PCIE_N3(23) CLK_PCIE_P3(23)

CLKREQ_ PCIE#3(23)

CLK_PCIE_N4(33) CLK_PCIE_P4(33)

CLKREQ_ PCIE#4(33)

+3VS

T33 TP@ T34 TP@

1 2

RC75 10K_020 1_5%@

CLK_PCIE_ N1 CLK_PCIE_ P1 CLKREQ_ PCIE#1

CLK_PCIE_ N2 CLK_PCIE_ P2 CLKREQ_ PCIE#2

CLK_PCIE_ N3 CLK_PCIE_ P3 CLKREQ_ PCIE#3

CLK_PCIE_ N4 CLK_PCIE_ P4 CLKREQ_ PCIE#4

CLK_PCIE_ N5CLKREQ_ PCIE#5 CLK_PCIE_ P5 CLKREQ_ PCIE#5

D15

2 1

H35

F35

AV9

J36

G36

BD10

J38 G38 AV5

H37

F37 AV7

H39

F39 BC5

BB10

KBL-Y_BGA1515

D16

RB751S4 0T1G_SOD523-2

PCH_PW ROKEC_RSMR ST#

21

RB751S4 0T1G_SOD523-2

PV: D15,D16 pop

+3V_PRIM

TC7SH08 FU_SSOP5

5

UH1

P

4

O

12

BB8

BJ12

A62 B61

BP14 BN15

BL6 BF9

BP9 BE15 BC15 BB16

G

3

H2

J1

RH46

100K_02 01_5%

PCH_PLT RST# SYS_RESET # EC_RSMR ST#

H_CPUPW RGD_R EC_VCCS T_PG

PCH_PW ROK PCH_DPW ROK_R

PCH_SUS WARN# SUSACK# _R

SOC_PCIE_ WAKE# LAN_W AKE# PCH_GPD 11

PDG_DPWROK connect to VccDSW3_3 power rail monitoring circuit to support Deep Sx state.This signal can be tied to RSMRST# for platforms that do not support the Deep Sx state.The DSW rails must be stable for at least 10 ms before DPWROK is asserted to PCH.

PDG_SUSACK#, this signal is driven from the platform EC to PCH to acknowledge that EC has received the SUSWARN# signals and it is preparing to go into DeepSx mode.for at least 10 ms before DPWROK is asserted to PCH.

PDG_SLP_SUS#, a low on this signal indicates that PCH is in Deep Sx state and that EC/platform logic does not need to keep the Primary Rails ON.

EC_VCCS T_PG

PCH_PLT RST#

1

B

2

A

UC1K

@

GPP_B13/PLTRST# SYS_RESET# RSMRST#

PROCPWRGD VCCST_PWRGD

SYS_PWROK PCH_PWROK DSW_PWROK

GPP_A13/SUSWARN#/SUSPWRDNACK GPP_A15/SUSACK#

WAKE# GPD2/LAN_WAKE# GPD11/LANPHYPC GPD7/RSVD

KBL-Y_BGA1515

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SKYLAKE_ULX

SYSTEM POWER MANAGEMENT

11 OF 20

2041/09/ 08 2013/10/ 28

3

UC1J

CLKOUT_PCIE_N1 CLKOUT_PCIE_P1 GPP_B6/SRCCLKREQ1#

CLKOUT_PCIE_N2 CLKOUT_PCIE_P2 GPP_B7/SRCCLKREQ2#

CLKOUT_PCIE_N3 CLKOUT_PCIE_P3 GPP_B8/SRCCLKREQ3#

CLKOUT_PCIE_N4 CLKOUT_PCIE_P4 GPP_B9/SRCCLKREQ4#

CLKOUT_PCIE_N5 CLKOUT_PCIE_P5 GPP_B10/SRCCLKREQ5#

GPP_B5/SRCCLKREQ0#

XTAL24_ OUT

XTAL24_ IN

GPP_B11/EXT_PWR_GATE#

Compal Secret Data

SKYLAKE_ULX

CLOCK SIGNALS

10 OF 20

PWR_ 3V5V_PG (43)

1 2

RC50

EMI@

33_0201 _1%

1 2

RC195

EMI@

33_0201 _1%

Rev0.87

GPP_B12/SLP_S0#

GPD4/SLP_S3# GPD5/SLP_S4#

GPD10/SLP_S5#

SLP_SUS# SLP_LAN#

GPD9/SLP_WLAN#

GPD6/SLP_A#

GPD3/PWRBTN#

GPD1/ACPRESENT

GPD0/BATLOW#

GPP_A11/PME#

INTRUDER#

GPP_B2/VRALERT#

SLP_W LAN#

Deciphered Date

CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P

XTAL24_ OUT_R

XTAL24_ IN_R

CC8

BC9 AY14 BF16 BH14

BN10 BP11 BH16 BE17

BF14 BD14 BD16

BF7 BG19

BC7 BD6

Rev0.87

GPD8/SUSCLK

XTAL24_IN

XTAL24_OUT

XCLK_BIASREF

RTCX1 RTCX2

SRTCRST#

RTCRST#

22P_0402_50V8J

PM_SLP_ S0# PM_SLP_ S3# PM_SLP_ S4# PM_SLP_ S5#

SLP_SUS # SLP_LAN # SLP_W LAN# PM_SLP_ A#

PBTN_OU T#_R AC_PRES ENT_R BATLOW #

SM_INTRUD ER#

VRALERT #

2

J34 G34

BA15

M1 L2

P1

BN19 BP18

BH18 BN12

1 2

RC563 1M_0402 _1%

YC1

1

X'tal

G

2

G

X'tal

24MHZ_8 PF_8Y24080002

SJ10000 PS00

TC11@

2

1

SUSCLK_ S

XTAL24_ IN XTAL24_ OUT

XCLK_BIAS REF

PCH_RTC X1 PCH_RTC X2

SOC_SRT CRST# SOC_RTC RST#

RH76

1 2

0_0402_ 5%

RH78

1 2

2.7K_020 1_1%

SUSCLK

+1.0V_PR IM

SOC_SRT CRST# (29 ) SOC_RTC RST# (29)

CH46

0.1U_0201_10V6K

RTC_RST# by PWR BTN

PCH_RTC X2

PCH_RTC X1

1 2

RC58 10M_0402_5 %

1 2

YC2

4

3

PM_SLP_ S0# (11,12,29,47,49) PM_SLP_ S3# (12,29,33,39) PM_SLP_ S4# (21,29)

TP@

SLP_SUS # (29) TP@ SLP_W LAN# (23)

TC63@

22P_0402_50V8J

CC7

T392

T35

T395TP@

Title

SKL Y(5/13) CLK,GPIO

Size Document N umber Rev

LA-F803P

Date: Sheet of

Date: Sheet

PDG_ internal pull-up resistor, nterna 16 ms de-bounce on the input.

Compal Electronics, Inc.

6.8P_0402_50V8C

1

CC14

2

SJ10000 SK00

32.768KH Z_9PF

1

SUSCLK (23)

1

@EMI@

2

6.8P_0402_50V8C

1

CC12

2

0.1

of

9 55Friday, June 08, 201 8

5

4

3

2

1

UC1F

@

Strap Pin

BC3

GPP_B15/GSPI0_CS#

AW10

GPP_B16/GSPI0_CLK

AW6

GPP_B17/GSPI0_MISO

BB4

GPP_B18/GSPI0_MOSI

BB2

GPP_B19/GSPI1_CS#

AW12

GPP_B20/GSPI1_CLK

AW4

GPP_B21/GSPI1_MISO

AW8

GPP_B22/GSPI1_MOSI

AC8

GPP_C8/UART0_RXD

AA8

GPP_C9/UART0_TXD

AA10

GPP_C10/UART0_RTS#

AA12

GPP_C11/UART0_CTS#

AD5

GPP_C20/UART2_RXD

AD7

GPP_C21/UART2_TXD

AD3

GPP_C22/UART2_RTS#

AD9

GPP_C23/UART2_CTS#

AD11

GPP_C16/I2C0_SDA

AB3

GPP_C17/I2C0_SCL

AB9

GPP_C18/I2C1_SDA

AB11

GPP_C19/I2C1_SCL

AP3

GPP_F4/I2C2_SDA

AP7

GPP_F5/I2C2_SCL

AP5

GPP_F6/I2C3_SDA

AT7

GPP_F7/I2C3_SCL

AN4

GPP_F8/I2C4_SDA

AN6

GPP_F9/I2C4_SCL

KBL-Y_BGA1515

Functional Strap Definitions

GPP_B22 (Internal Pull Down): GSSPI1_MOSI Boot BIOS Strap Bit 0 = SPI Mode --> AAU30 Use 1 = LPC Mode

PV: delete TS_STOP#_PCH

GPP_B18

D D

WW AN_WAKE #(26)

PV: delete TS_PWREN_PCH

TBT_CIO_P LUG_EVENT#(33)

To TBT.

Track Pad (Reserved)

Touch Screen

C C

+3V_PRIM

B B

TBT_FOR CE_PWR(33)

PM_BATL OW#(33)

RTD3_CIO_ PWR_EN(33)

I2C_0_SDA(30) I2C_0_SCL(30)

I2C_1_SDA _TS(22) I2C_1_SCL _TS(22)

COEX1(23,26)

COEX2(23,26) COEX3(23,26)

PIR1 SI: PU 10Kohm

PV: change PU +3V_PRIM

1 2

RC580 10K_020 1_5%

1 2

RC200 49.9K_02 01_1%

1 2

RC201 49.9K_02 01_1%

PV: delete TS_STOP#_PCH PV: delete TS_PWREN_PCH

WW AN_WAKE #

GPP_B22

UART_2_ CRXD_DTXD UART_2_ CTXD_DRXD

I2C_0_SDA I2C_0_SCL

I2C_1_SDA _TS I2C_1_SCL _TS

PM_BATL OW# UART_2_ CRXD_DTXD UART_2_ CTXD_DRXD

Functional Strap Definitions

GPP_B18 (Internal Pull Down): GSSPIO_MOSI No Reboot 0 = Disable No Reboot mode. --> AAU30 Use 1 = Enable No Reboot Mode. (PCH will disable the TCO

Timer system reboot feature). This function is useful when running ITP/XDP.

+3V_PRIM +3V_PRIM

RC84

1 2

150K_02 01_5%

GPP_B18 GPP_B22

@

SKYLAKE_ULX

1.8V

6 OF 20

+3V_PRIM

DMN63D8 LV-7_SOT563-6

RC85

1 2

@

150K_02 01_5%

ISHLPSS

GPP_D5/ISH_I2C0_SDA

GPP_D6/ISH_I2C0_SCL

GPP_D7/ISH_I2C1_SDA

GPP_D8/ISH_I2C1_SCL

GPP_F10/I2C5_SDA/ISH_I2C2_SDA

1.8V

GPP_F11/I2C5_SCL/ISH_I2C2_SCL

GPP_D13/ISH_UART0_RXD/SML0BDATA

GPP_D14/ISH_UART0_TXD/SML0BCLK

GPP_D16/ISH_UART0_CTS#/SML0BALERT#

Sx_EXIT_HOLDOFF# / GPP_A12 / BM_BUSY#/ISH_GP6

1

S1

2

G1

6

D1

4

S2

5

G2

D2

QC4

3

GPP_D15/ISH_UART0_RTS#

GPP_C12/UART1_RXD/ISH_UART1_RXD

GPP_C13/UART1_TXD/ISH_UART1_TXD GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_C15/UART1_CTS#/ISH_UART1_CTS#

GPP_A18/ISH_GP0 GPP_A19/ISH_GP1 GPP_A20/ISH_GP2 GPP_A21/ISH_GP3 GPP_A22/ISH_GP4 GPP_A23/ISH_GP5

ISH_I2C_0_SC L_R

ISH_I2C_0_SD A_R

Rev0.87

GPP_D9 GPP_D10 GPP_D11 GPP_D12

P11 T7 T5 T11

ISH_I2C_0_SD A_R

P7

ISH_I2C_0_SC L_R

P5

T9 T3

AM7 AT9

U10 U4 U6 V9

AC6 AC4 AB7 AB5

BF11 BD2 BJ1 BL3 BJ3 BD4 BJ4

ISH_I2C_0_SC L (26)

TC41@ TC42@

DDR_CHB _EN DDR_CHA _EN BID_BC

NGFF_SS D_WAKE# NGFF_SS D_PWREN

INT1_A_G WW AN_RESET# INT2_A_G

To Sub/B (In +3VALW plan)

ISH_I2C_0_SD A (26)

MUX_DCI_C LK (37) MUX_DCI_D AT (37)

9x-Sensor,

NGFF_SS D_WAKE# (24 )

NGFF_SS D_PWREN (24)

INT1_A_G (26) WW AN_RESET# (26) INT2_A_G (26)

P

V: change pin define from GPP_F4 to GPP_A19

WW AN_WAKE # NGFF_SS D_WAKE# DDR_CHA _EN DDR_CHB _EN INT1_A_G INT2_A_G

DDR_CHA _EN DDR_CHB _EN

ISH_I2C_0_SD A_R

ISH_I2C_0_SC L_R

RTD3_CIO_ PWR_EN

TBT_CIO_P LUG_EVENT#

WW AN_WAKE #

ACCEL2

PIR5 PV: Add PU 10Kohm

IR6 PV: PU +3V_PRIM 10K

P

+3V_PRIM

RH142 100K_02 01_5%

BID_BC

1 2

RC572 10K_020 1_5%@

1 2

RC570 10K_020 1_5%@

1 2

RH140 100K_0 201_5%

1 2

RH141 100K_0 201_5%

1 2

RC441 10K_020 1_5%

1 2

RC440 10K_020 1_5%

1 2

RH61 SH ORT PADS@

1 2

RH65 SH ORT PADS@

1 2

RC78 1K_ 0201_5%

1 2

RC503 1K_0 201_5%

1 2

RC145 10K_ 0201_5%

1 2

RC582 10K_ 0201_5%

1 2

RC583 10 K_0201_5%

1 2

RH143 100K_02 01_5%

1 2

+3V_PRIM

@

+3VS

A A

Security Class ification

2041/09/ 08 2013/10/ 28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2041/09/ 08 2013/10/ 28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

SKL Y(6/13) GPIO,LPIO,I2C

LA-F803P

10 55Friday, June 08, 20 18

1

0.1

of

5

4

3

2

1

UC1H

@

PCIE_CRX_ TTX_N1(33)

D D

Alpine Ridge PCIe Gen3 x 4

NVMe SSD (PICe Interface)

M.2 SSD PCIe Gen3 x 4

C C

WWAN

WLAN PCIe Gen2 x 1

B B

PCIE_CRX_ TTX_P1(33) PCIE_CTX_ TRX_N1(33) PCIE_CTX_ TRX_P1(33)

PCIE_CRX_ TTX_N2(33) PCIE_CRX_ TTX_P2(33) PCIE_CTX_ TRX_N2(33) PCIE_CTX_ TRX_P2(33)

PCIE_CRX_ TTX_N3(33) PCIE_CRX_ TTX_P3(33) PCIE_CTX_ TRX_N3(33) PCIE_CTX_ TRX_P3(33)

PCIE_CRX_ TTX_N4(33) PCIE_CRX_ TTX_P4(33) PCIE_CTX_ TRX_N4(33) PCIE_CTX_ TRX_P4(33)

PCIE_CRX_ DTX_N5(24) PCIE_CRX_ DTX_P5(24) PCIE_CTX_ DRX_N5(24) PCIE_CTX_ DRX_P5(24)

PCIE_CRX_ DTX_N6(24) PCIE_CRX_ DTX_P6(24) PCIE_CTX_ DRX_N6(24) PCIE_CTX_ DRX_P6(24)

PCIE_CRX_ DTX_N7(24) PCIE_CRX_ DTX_P7(24) PCIE_CTX_ DRX_N7(24) PCIE_CTX_ DRX_P7(24)

PCIE_CRX_ DTX_N8(24) PCIE_CRX_ DTX_P8(24) PCIE_CTX_ DRX_N8(24) PCIE_CTX_ DRX_P8(24)

PCIE_CRX_ DTX_N9(25) PCIE_CRX_ DTX_P9(25) PCIE_CTX_ DRX_N9(26) PCIE_CTX_ DRX_P9(26)

PCIE_CRX_ DTX_N10(23) PCIE_CRX_ DTX_P10(2 3) PCIE_CTX_ DRX_N10(23 ) PCIE_CTX_ DRX_P10(23)

1 2

RC88 100_ 0201_1%

PCIE_RCOM PN PCIE_RCOM PP

PCH_GPIOA 7

C20

PCIE1_RXN/USB3_5_RXN

A20

PCIE1_RXP/USB3_5_RXP

G20

PCIE1_TXN/USB3_5_TXN

J20

PCIE1_TXP/USB3_5_TXP

B19

PCIE2_RXN/USB3_6_RXN

D19

PCIE2_RXP/USB3_6_RXP

F19

PCIE2_TXN/USB3_6_TXN

H19

PCIE2_TXP/USB3_6_TXP

C22

PCIE3_RXN

A22

PCIE3_RXP

G22

PCIE3_TXN

J22

PCIE3_TXP

B21

PCIE4_RXN

D21

PCIE4_RXP

F21

PCIE4_TXN

H21

PCIE4_TXP

C24

PCIE5_RXN

A24

PCIE5_RXP

G24

PCIE5_TXN

J24

PCIE5_TXP

B23

PCIE6_RXN

D23

PCIE6_RXP

F23

PCIE6_TXN

H23

PCIE6_TXP

C26

PCIE7_RXN/SATA0_RXN

A26

PCIE7_RXP/SATA0_RXP

G26

PCIE7_TXN/SATA0_TXN

J26

PCIE7_TXP/SATA0_TXP

B25

PCIE8_RXN/SATA1A_RXN

D25

PCIE8_RXP/SATA1A_RXP

F25

PCIE8_TXN/SATA1A_TXN

H25

PCIE8_TXP/SATA1A_TXP

C28

PCIE9_RXN

A28

PCIE9_RXP

G28

PCIE9_TXN

J28

PCIE9_TXP

B27

PCIE10_RXN

D27

PCIE10_RXP

F27

PCIE10_TXN

H27

PCIE10_TXP

A9

PCIE_RCOMPN

B10

PCIE_RCOMPP

D51

PROC_PRDY#

B55

PROC_PREQ#

BF3

GPP_A7/PIRQA#

KBL-Y_BGA1515

PCIE/USB3/SATA

SKYLAKE_ULX

8 OF 20

SSIC / USB3

USB3_2_RXN/SSIC_1_RXN

USB3_2_RXP/SSIC_RXP USB3_2_TXN/SSIC_TXN

USB3_2_TXP/SSIC_TXP

USB3_3_RXP/SSIC_2_RXP

USB2

GPP_E10/USB2_OC1# GPP_E11/USB2_OC2# GPP_E12/USB2_OC3#

GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1 GPP_E2/SATAXPCIE2/SATAGP2

Rev0.87

USB3_1_RXN USB3_1_RXP USB3_1_TXN USB3_1_TXP

USB3_3_RXN

USB3_3_TXN USB3_3_TXP

USB3_4_RXN USB3_4_RXP USB3_4_TXN USB3_4_TXP

USB2N_1 USB2P_1

USB2N_5 USB2P_5

USB2N_7 USB2P_7

USB2N_3 USB2P_3

USB2N_9 USB2P_9

USB2N_2 USB2P_2

USB2_COMP

USB2_ID

USB2_VBUSSENSE

GPP_E9/USB2_OC0#

GPP_E4/DEVSLP0 GPP_E5/DEVSLP1 GPP_E6/DEVSLP2

GPP_E8/SATALED#

C16 A16 G16 J16

B15 D15 F15 H15

C18 A18 G18 J18

B17 D17 F17 H17

AJ6 AJ4

AH5 AH3

AF5 AF3

AL6 AL4

AG6 AG4

AM3 AM5

N2 AF7 AE6

N12 M11 F8 B8

F10 H10 L8

G11 J11 N10

H8

USB3_CR X_DTX_N1 USB3_CR X_DTX_P1 USB3_CT X_DRX_N1 USB3_CT X_DRX_P1

USB3.1 Type-C Full function (SUB/B)

USB2_CO MP USB_ID USB2_VB USSENSE

USB_OC0 # USB_OC1 # USB_OC2 # PRIM_CORE _OPT

USB_OC0 # USB_OC1 # USB_OC2 # PRIM_CORE _OPT DEVSLP1 SATA_GP 0

PCH_GPIOA 7 SATA_GP 2

USB_ID USB2_VB USSENSE

RC87 113 _0402_1%

DEVSLP0 DEVSLP1

SATA_GP 0 SATA_GP 1 SATA_GP 2

+3V_PRIM

1 2

RC203 0_0201_ 5%@

1 2

RC204 0_0201_ 5%@

USB3_CR X_DTX_N3 (37)

USB3_CR X_DTX_P3 (37)

USB3_CT X_DRX_N3 (37)

USB3_CT X_DRX_P3 (37)

USB20_N 1 (35,38) USB20_P 1 (35,38)

USB20_N 5 (35,38) USB20_P 5 (35,38)

USB20_N 7 (36) USB20_P 7 (36)

USB20_N 3 (23) USB20_P 3 (23)

USB20_N 9 (26) USB20_P 9 (26)

1 2

T60 T P@

DEVSLP1 (24)

SATA_GP 1 (24)

T371 TP@

1 2

RH122 10K_020 1_5%

1 2

RH123 10K_020 1_5%

1 2

RH124 10K_020 1_5%

1 2

RH125 10K_020 1_5%

1 2

RH155 10K_020 1_5%

1 2

RH469 10K_020 1_5%

PIR11 SI: pop RH125

1 2

RC90 10K_020 1_5%

1 2

RC569 10K_020 1_5%@

1 2

RH153 1K_0201 _5%

1 2

RH154 1K_0201 _5%

USB3.1 Type-C

Bluetooth

IR Camera

for SATA SSD

+3V_PRIM

+3VS

PIR26 SI: pop UH3 , un-pop RC579

PRIM_CORE _OPT

PM_SLP_ S0#(9,12,29,47 ,49)

A A

Security Class ification

2041/09/ 08 2013/10/ 28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2041/09/ 08 2013/10/ 28

3

Compal Secret Data

Deciphered Date

2

PM_SLP_ S0#

Title

Size Document N umber Rev

Date: Sheet of

5

UH3

1

P

INA

4

O

2

INB

G

MC74VHC 1G32DFT2G_SC 70-5

3

RC579 0_0201_ 5%@

SKL Y(7/13) PCIE,USB

LA-F803P

12

Compal Electronics, Inc.

1

PRIM_CORE _LPM (4 8)

11 55Friday, June 08, 20 18

0.1

5

4

3

2

1

CC314

1.8P_0201_50V8J

1U_0201_6.3V6M

RF@

1

2

C285

+0.85VS_ VCCIO +1.2V_VD DQ +3VALW +3V_PRIM +1.0V_VC CST

+1.0V_PR IM +1.0VS_V CCSTG

68P_0201_50V8J

CC387

RF@

1

2

0.1U_0201_10V6K CC357

1

@RF@

2

0.1U_0201_6.3V6K

CC388

RF@

0.1U_0201_10V6K CC358

@RF@

VOUT VOUT

GND GND

CT

+0.85VS_ VCCIO(5,18,47) +1.2V_VD DQ(18,19,20,21,44) +3VALW(13,23,24,2 5,28,29,30,33,34,38 ,39,43,44,45,47,48 ,49,50) +3V_PRIM(5,7,8,9,10,1 1,13,24,25,26,29,30 ,33) +1.0V_VC CST(5,9,1 4,49)

+1.0V_PR IM(9 ,13,17,46) +1.0VS_V CCSTG(5 ,14)

7 8

6

1000P_0 402_50V7K

5 9

CC315

1 2

+3V_PRIM

0.1U_0402_25V6

CC316

1

2

PIR30 SI: pop CC387,CC388

+1.0V_VC CST

0.1U_0201_10V6K C279

1

12

2

+1.2V_VD DQ

D D

VDDQC trace filter width = 6mm Total etch length = 186.94mils PDG P597

+1.2V_VD DQ

VCCST : Sustain voltage for processor standby modes

VCCSTG : Gated sustain voltage for processor standby modes

C C

BSC Side

0.1U_020 1_10V6K

+1.0V_VC CST

RC106 0_0201_ 5%short@

1

CC280

2

+1.0V_VC CPLL

1 2

CC17

0.1U_020 1_10V6K

LC1

1 2

1NH +-0.3N H HCI1005F-1N0S

1

2

+VDDQ_C PU_CLK

CC9

0.1U_020 1_10V6K

Backside cap

+1.0VS_V CCSTG

+1.2V_VC CPLL_OC

+1.0V_VC CPLL

1

2

+1.0V_VC CST

AH64 BA27 BA37 BA49 BP32 BP50 AK64 BA29 BA41 BA51 BP34 BP56

AT64 BA31 BA43 BN64 BP40 BP58 AV64 BA33 BA45 BP24 BP42 BP64 BA25 BA35 BA47 BP26 BP48 BA39

AE27

AF27

V26 Y26

R26 T26

R27 T27

@

KBL-Y_BGA15 15

SKYLAKE_ULX

UC1N

VDDQ VDDQ

1.2V@ 2A

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQC

VCCST

1.0V@100mA (60mA)

VCCST

VCCSTG

1.0V@20mA

VCCSTG

VCCPLL_OC VCCPLL_OC

VCCPLL

1.0V@100mA

VCCPLL

CPU POWER 3 OF 4

1.2V@100mA

14 OF 20

0.85V@3A

VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR VCCIO_DDR

VCCIO_SENSE

VSSIO_SENSE

+0.85VS_ VCCIO

Rev0.87

AC23

VCCIO

AF24

VCCIO

AN26

VCCIO

AC24

VCCIO

AF26

VCCIO

AR26

VCCIO

AE23

VCCIO

AH26

VCCIO

AT26

VCCIO

AE24

VCCIO

AK26

VCCIO

AE26

VCCIO

AL26

VCCIO

AV26 AV36 AV46 AW31 AW41 AW51 AV28 AV38 AV48 AW33 AW43 AV30 AV40 AV50 AW35 AW45 AV32 AV42 AW27 AW37 AW47 AV34 AV44 AW29 AW39 AW49

AT24 AR24

PCH_PW R_EN(29,39,45,4 6,48)

+0.85VS_ VCCIO

12

RC538 100_020 1_1%@

12

RC98

@

0_0201_ 5%

+5VALW

Intel recommand RON(Max) : 70m ohm

+3VALW TO +3V_PRIM

+3VALW

12

CC50

1U_0201_6.3V6M

UC9

1

VIN

2

CC317

VIN

3

ON

4

VBIAS

SA00006 U600

AOZ1336 _DFN8_2X2

1 2

RC562 0_ 0201_5%

EN_3V_P RIM

short@

12

VCCIO_SEN SE (47) VSSIO_SEN SE (47)

1U_0201_6.3V6M

PIR8 SI: From SE000000K80 to SE00000QL10

1 2

@

+1.2V_VD DQ

+1.0V_VC CST

S0IX@

1 2

RC136 0_0402_ 5%

NDSX@

1 2

RC137 0_0402_ 5%

BSC Side

Title

SKL Y(8/13) Power

Size Document N umber Rev

LA-F803P

Date: Sheet of

CC321

1U_0201_6.3V6M

1

2

Compal Electronics, Inc.

0.1U_0201_10V6K CC337

1

RF@

2

1

0.1U_0201_10V6K

CC338

1

2

CC339

1

@RF@

2

0.1

12 55Friday, June 08, 20 18

+1.0V_PR IM

+1.0V_PRIM TO +1.0VS_VCCSTG

tCPU26:CPU_C10_GATE# de-assertion

+1.0V_PR IM

B B

EN_VCCS TG_VCCPLL_OC

A A

to VCCSTG stable = 10us<Tr<65us(S0i3)

VOUT

VIN

VOUT

VIN

CTC2PG

ON

SUSP#

PM_SLP_ S3#

PM_SLP_ S0#

UC5

GND

1U_0201_6.3V6M

1

CC319

2

PM_SLP_ S3#(9,29,33,39 )

PM_SLP_ S0#(9,11,29,47 ,49)

A2 B2

D2

TPS2297 1YZPT_DSBGA8

SUSP#(29,39,44 ,47)

5

+1.0VS_V CCSTG

A1 B1

C1

D1

1 2

RC108 0_020 1_5%

1 2

RC109 0_020 1_5%

1 2

RC110 0_020 1_5%S0 IX@

1U_0201_6.3V6M

CC30

1

2

@

0.1U_0201_10V6K

0.1U_0201_10V6K CC360

CC359

1

@RF@

2

AND GATE

UC6

1

A

2

B

3

GND

74LVC1G 08FZ4-7_X2-DFN 1410-6

SA00007 YD00 S0IX@

4

+1.0VS_V CCSTG

BSC Side

0.1U_020 1_10V6K

RC578 0_020 1_5%

VCC

NC

CC18

NDSX@

1 2

6

5

4

Y

1

2

+3V_PRIM

SYSON(21,29,44)

CC318

1 2

0.1U_020 1_10V6KS0IX@

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EN_VCCS TG_VCCPLL_OC

2041/09/ 08 2013/10/ 28

3

C5245

1U_0402 _10V6K

1 2

+3VALW

+1.2V_VD DQ +1.2V_VC CPLL_OC

1

CC320 1U_0201 _6.3V6M

2

EN_VCCS TG_VCCPLL_OC

Compal Secret Data

U27

1

VIN

2

VIN

3

ON

4

VBIAS

AOZ1336 DI_DFN8_2X2

SA00006 U600

For Modern Stan dby

S0IX@

A2

VIN

B2

VIN

CTC2PG

D2

ON

TPS2297 1YZPT_DSBGA8

Deciphered Date

VOUT VOUT

GND GND

VOUT VOUT

GND

UC7

7 8

6

CT

C284 1000P_0402_50 V7K

5 9

+1.1V_VC CPLL_OC

A1 B1

C1

D1

2

5

+1.0V_PRIM

1

CC32

0.1U_0201_10V6K

2

1

CC48

0.1U_0201_10V6K

2

1

CC34

0.1U_0201_10V6K

2

Close to Pin AH18 Close to Pin V1Close to Pin AH13 Close to Pin AR21 Close to Pin AA15

D D

+VCCPRIM_CORE

+1.0V_PRIM

1

CC129

0.1U_0201_10V6K

2

Close to Pin AE18 and AR16

1

CC332 22U_0402_6.3V6M

2

1

CC130

0.1U_0201_10V6K

2

1

CC1

0.1U_0201_6.3V6K

2

R213 0_0402_5% R212 0_0402_5%

1

CC19

0.1U_0201_10V6K

2

1 2 1 2

Close to Pin T1 and T15

+1.0V_PRIM

C C

1

2

Close to Pin V15

+1.0V_APLL

1

2

PIR20 SI: pop C ap.

1

CC393

CC394

RF@

68P_0201_50V8J

2

1

K

1

K

CC281

0.1U_0201_10V6K

CC322

0.1U_0201_10V6K

1

CC395

RF@

68P_0201_50V8J

2

FF:38.2

W=40mils

1

2

CC396

RF@

0.1U_0201_6.3V6K

CC391

RF@

0.1U_0201_6.3V6K

1

2

CC392

RF@

1

CC284

22U_0603_6.3V6M

2

1

CC328 22U_0402_6.3V6M

2

1

CC323

0.1U_0201_10V6K

2

1

0.1U_0201_6.3V6K

2

1

CC285

0.1U_0201_10V6K

2

+1.0V_PRIM

+3V_PRIM +1.0V_PRIM

B B

+1.8V_PRIM +VCCPRIM_CORE

PIR7 SI: From S M01000HC00 to SM01000NY00

LC3

1 2

BLM15PX221SN1D

CC399

RF@

68P_0201_50V8J

1

CC329 22U_0402_6.3V6M

2

1

CC324

0.1U_0201_10V6K

2

Close to Pin AH21 Close to Pin AK19Close to Pin AC2

1

CC390

RF@

68P_0201_50V8J

2

CC389

RF@

RTC Battery

Battery Module

+3V_LID

A A

+3VL

W=20mils

1 2

RC116 1K_0402_5%

W=20mils

5

MAX. 8000mil

2

DC1

A

BAT54LPS-7_X2-DFN100 6-2-2

SCS0000AO00

DC2

A

BAT54LPS-7_X2-DFN100 6-2-2

SCS0000AO00

1

CC35

0.1U_0201_10V6K

2

@

0.1U_0201_10V6K

1

CC286

0.1U_0201_10V6K

2

12

CC333

1U_0201_6.3V6M

Close to Pin AK19

1

CC397

RF@

0.1U_0201_6.3V6K

2

+3VL_RTC

2mA

1

2

4

1

CC325

0.1U_0201_10V6K

2

DCPDSW _1P0

1

CC334

0.1U_0201_6.3V6K

2

Close to Pin AL2

CC289

0.1U_0201_10V6K

Close to Pin AT15

+1.0V_PRIM

+3VALW_D SW+3VALW+3V_PRIM

+3VALW_D SW

CC131

1

Close to Pin AL15

+3V_PRIM

2

1

2

PIR7 SI: From S M01000HC00 to SM01000NY00

CC398

RF@

4

0.1U_0201_6.3V6K

1

CC53

0.1U_0201_10V6K

2

1

2

+1.0V_PRIM

BLM15PX221SN1D

2

CC169

2.2P_0201_25V

1

CC39

0.1U_0201_10V6K

2

Close to Pin R21

1

CC24

0.1U_0201_10V6K

2

Close to Pin V19 Close to Pin V23

3

+3V_PRIM(5,7 ,8,9,10,11,12,24,25,26,29,30,33) +1.0V_PRIM(9, 12,17,46) +VCCPRIM_CORE(48)

UC1P

+1.0V_PRIM

1.0V/0.599A

+VCCPRIM_CORE

1.1A

DCPDSW _1P0

+1.0V_PRIM

1.0V/0.022A

1.0V/1.6A

+1.0V_PRIM

1.0V/0.088A

+1.0V_APLL

1.0V/0.026A

+1.0V_PRIM

1.0V/0.599A

3.3V/0.071A

+3V_HDA

3.3V/0.068A

3.3V/0.011A

1.0V/0.565A

1

CC29

0.1U_0201_10V6K

2

Close to Pin AA21

+3V_PRIM

3.3V/0.075A

+1.0V_PRIM

1.0V/0.033A

L24

1 2

+3V_HDA+3V_PRIM

1

2

1

CC282

0.1U_0201_10V6K

2

Close to Pin V21

1

CC38

0.1U_0201_10V6K

2

Close to Pin V18

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

AH18 AH19

AK18 AL18

AE18 AE19 AF18 AF19 AR16 AT16

AL2

AM1

V1

W2

T1 T15 T16

U2

V15 V16

AA18 AA19

AH13 AH15

AL15

AM13

AT23 AV22

AT15 AV15

AA21 AA23 AK23

AL23 AN23 AR23

AH21

AK21

AR21

AT21

R15 R16

Close to Pin AT23

CC23

0.1U_0201_10V6K

3

@

VCCPRIM_1P0 VCCPRIM_1P0 VCCPRIM_1P0 VCCPRIM_1P0

VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE

DCPDSW_1P0 DCPDSW_1P0

VCCMPHYAON_1P0 VCCMPHYAON_1P0

VCCMPHYGT_1P0 VCCMPHYGT_1P0 VCCMPHYGT_1P0 VCCMPHYGT_1P0

VCCAMPHYPLL_1P0 VCCAMPHYPLL_1P0

VCCAPLL_1P0 VCCAPLL_1P0

VCCPRIM_1P0 VCCPRIM_1P0

VCCDSW_3P3 VCCDSW_3P3

VCCHDA VCCHDA

VCCSPI VCCSPI

VCCSRAM_1P0 VCCSRAM_1P0 VCCSRAM_1P0 VCCSRAM_1P0 VCCSRAM_1P0 VCCSRAM_1P0

VCCPRIM_3P3 VCCPRIM_3P3

VCCPRIM_1P0 VCCPRIM_1P0

VCCAPLLEBB_1P0 VCCAPLLEBB_1P0

KBL-Y_BGA1515

+3V_PRIM

1

2

1

2

Primary Well 1.0 V : For I/O blocks, ungated ISH SRAM power, USB AFE Digital Logic, JTAG, Thermal Sensor and MIPI DPHY.

1.0V@

1.0V/0.85V@

Analog supply for OPI, USB2 and Audio PLL Primary 1.0V: Filtering required.

HD Audio Power 3.3 V, 1.8 V, 1.5 V. For Intel High Definition Audio

SPI Primary Well 3.3 V or 1.8 V

SRAM Primary Well 1.0 V. Dedicated SRAM rail and can have on board power down gate control.

PDG_place as close as ball

PDG_VCCHDA design for HD Audio VCCHDA should be connected to 3.3V or 1.5V, or designed for I2S VCCHDA should be connected to 1.8V or 3.3V.

CC330 22U_0402_6.3V6M

Close to Pin R19

CC331 22U_0402_6.3V6M

2041/09/08 2013/10/28

SKYLAKE_ULX

DCPDSW_1P0 Deep Sx Well 1.0 V: This rail is generated by on die DSW low dropout (LDO) linear voltage regulator to supply DSW GPIOs, DSW core logic and DSW USB2 logic. Board needs to connect 1 uF capacitor to this rail and power should NOT be driven from the board. When primary well power is up, this rail is ypassed from VCCPRIM_1p0.

Mod PHY Always On Primary 1.0 V: Always on primary supply for PCIe/DMI/USB3/SATA/MIPI MPHY logic

Mod PHY Externally Gated Primary 1.0 V: Externally gated primary supply for PCIe/DMI/USB3/SATA/MIPI MPHY logic.

Analog supply for USB3, PCIe Gen 2/Gen 3, SATA3 and MIPI PLL 1.0V: This rail is from externally gated domain. Filtering required.

Deep Sx Well for GPD GPIOs and USB2

Primary Well 3.3 V

1.0V/0.599A

PCH POWER

16 OF 20

1

CC291

0.1U_0201_10V6K

2

Close to Pin AV1 Close to Pin AH1 Close to Pin AF1 Close to Pin AA2

+1.8V_PRIM

Compal Secret Data

Deciphered Date

2

+3V_PRIM +1.0V_PRIM +VCCPRIM_CORE

RTC Logic Primary Well 3.3 V. This power supplies the RTC internal VRM. It will be off during Deep Sx mode.

VCCRTCPRIM_3P3 VCCRTCPRIM_3P3

RTC de-coupling capacitor only. This rail should NOT be driven.

1.0V/0.035A

Clock Buffers Primary 1.0 V

1.0V/0.029A

Clock Buffers Primary 1.0 V

1.0V/0.024A

Clock Buffers Primary 1.0 V

1.0V/0.033A

Clock Buffers Primary 1.0 V

1.0V/0.004A

Clock Buffers Primary 1.0 V

1.0V/0.010A

GPP_B0/CORE_VID0 GPP_B1/CORE_VID1

+3VL_RTC

1

CC292

0.1U_0201_10V6K

2

1

CC297

0.1U_0201_10V6K

2

Close to Pin AN2

2

Rev0.87

VCCPGPPA VCCPGPPA VCCPGPPB VCCPGPPB VCCPGPPC VCCPGPPC VCCPGPPD VCCPGPPD VCCPGPPE VCCPGPPE

VCCPGPPF

VCCPGPPF VCCPGPPG VCCPGPPG

VCCPRIM_3P3 VCCPRIM_3P3

VCCPRIM_1P0 VCCPRIM_1P0

VCCATS_1P8 VCCATS_1P8

VCCRTC VCCRTC

DCPRTC DCPRTC

VCCCLK1 VCCCLK1

VCCCLK2 VCCCLK2

VCCCLK3 VCCCLK3

VCCCLK4 VCCCLK4

VCCCLK5 VCCCLK5

VCCCLK6 VCCCLK6

1

CC336

0.1U_0201_6.3V6K

2

Close to Pin AR19

1

CC293

0.1U_0201_10V6K

2

1

CC335

0.1U_0201_6.3V6K

2

Close to Pin AE15

1

+1.0V_PRIM

1

CC290

0.1U_0201_10V6K

2

1

2

1 2

2.2P_0201_25V

1 2

2.2P_0201_25V

+3VL_RTC +3VALW_D SW +1.8V_PRIM

Close to Pin R15

CC296

0.1U_0201_10V6K

Close to Pin AN15Close to Pin AT1

EMI@

13 55Friday, June 08, 2018

+3VL_RTC(9) +3VALW_D SW(9) +1.8V_PRIM(8,21,26,39,45)

+3V_PRIM

AT1 AU2 AV1 AW2 AH1 AJ2 AF1 AG2 AA2 AB1

+1.8V_PRIM

AN2 AP1 AN15 AP13

+3V_PRIM

AC2 AD1

3.3V/0.075A

+1.0V_PRIM

AA15 AA16

1.0V/0.599A

Thermal Sensor Primary Well 1.8 V

+1.8V_PRIM

AE15 AE16

1.8V/0.006A

+3V_PRIM

AK19 AL19

3.3V/0.001A

AR19 AT19

3.3V/0.001A

AT18 AV18

CC326 0.1U_0201_10V6K

V18 Y18

1.0V/0.035A

V19 Y19

1.0V/0.029A

V23 Y23

1.0V/0.024A

V21 Y21

1.0V/0.033A

R21 R23

1.0V/0.004A

R19 T19

1.0V/0.01A

BA13 BB12

1

CC327

0.1U_0201_10V6K

2

1

CC294

0.1U_0201_10V6K

2

Title

Size Document Number Rev

Date: Sheet of

1.8V/0.009A

3.3V/0.004A

3.3V/0.006A

3.3V/0.008A

3.3V/0.006A

1.8V/0.033A

3.3V/0.041A

RTC Well Supply. This rail can drop to 2.0 V if all other planes are off. This power is not expected to be shut off unless the RTC battery is removed or drained.

+3VL_RTC

1 2

Close to Pin AT18

CORE_VID0 (48) CORE_VID1 (48)

1

CC295

0.1U_0201_10V6K

2

+3V_HDA

+1.0V_APLL

Compal Electronics, Inc.

SKL Y(9/13) Power

LA-F803P

CC283

CC168

1

0.1

5

4

3

2

1

12

RC139

100_020 1_1%

RC141

100_020 1_1%

1 2

+VCC_CO RE +VCC_GT +1.0V_VC CST

VCCGT_S ENSE (49 ) VSSGT_S ENSE (49)

+VCC_CO RE(49,5 0,51) +VCC_GT(4 9,50,51) +1.0V_VC CST(5,9,1 2,49)

+VCC_CO RE +VCC_CO RE

D D

C C

B B

A64 AE32 AE40 AH41 AN32

AT33 AT41

M33 M43 M53 M64

N40

N59

P60

R57

AA32 AE33 AE41 AK32 AN41

AT35

B64

M35 M45 M56

N32

N42

N61

P62

R59

V32 AA41 AE35

AF32 AK41 AR32

AT36

D64

M37 M47

R63 P56 R32 Y32

J64 L48

T41

L40 L50

L42 L52

UC1L

@

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

KBL-Y_BGA1515

SKYLAKE_ULX

1

.5V@24A

CPU POWER 1 OF 4

12 OF 20

Rev0.87

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCC_SENSE VSS_SENSE

VIDALERT#

VIDSCK

VIDSOUT

VCCSTG VCCSTG

M58 N34 N54 N63 P64 R61 V41 AC41 AE38 AH32 AL41 AT32 AT40 H63 L46 L63 M41 M51 M62 N38 N57 P58 R41 T32 Y41 AC32 AE36 AF41 AL32 AR41 AT38 F64 L44 L54 M39 M49 M60 N36 N55

L34 L32

B58 A56 A58

AA26 AC26

Trace Length < 25 mils

SOC_SVID_ ALERT# SOC_SVID_ CLK_R SOC_SVID_ DAT_R

RC526

1 2

short@

0_0201_ 5%

+VCC_CO RE

12

RC147

@

100_020 1_1%

RC148

@

100_020 1_1%

1 2

+1.0VS_V CCSTG

PIR21 SI: un-pop RC147,RC148

VCCSENS E (49) VSSSENS E (4 9)

+VCC_GT

AA53 AB62 AC47 AC55 AD54 AD64 AE61

AF47

AJ53 AK49 AN46

AT43

AT50

N50

U61 V60

W57

Y44 Y51

Y62 AB54 AB64 AC49 AC57 AD56 AE53 AE63

AF49 AK43 AK50 AN47

AT44

AT51

R51

U53 U63 V62

W59

Y46 Y54

Y64 AB58 AC44 AC51 AC61 AD60 AE57

AF44

AF51 AK46 AB60 AC46

T46 T54

T47

UC1M

@

VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT

KBL-Y_BGA1515

SKYLAKE_ULX

1.5V@24A

CPU POWER 2 OF 4

13 OF 20

Rev0.87

VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT

VCCGT_SENSE

VSSGT_SENSE

+VCC_GT

AC53 AC63 AD62 AE59 AF46 AG53 AK47 AN44 AN51 AT49 N48 T44 T51 U59 V58 W55 Y43 Y50 Y60 AB56 AC43 AC50 AC59 AD58 AE55 AF43 AF50 AK44 AK51 AN49 AT46 N44 R53 T49 U55 V54 V64 W61 Y47 Y56 AN50 AT47 N46 T43 T50 U57 V56 W53 W63 Y49 Y58 AN43

Close CPU

N52 P52

Trace Length < 25 mils

+VCC_GT

@

SVID ALERT

+1.0V_VC CST

SOC_SVID_ ALERT# SOC_SVID_ALE RT#_R

RC143

1 2

220_020 1_5%

SVID DATA

+1.0V_VC CST

A A

SOC_SVID_ DAT_R

5

RC146

1 2

short@

0_0201_ 5%

Place the PU resistors close to CPU

12

RC142

56_0201 _5%

Place the PU resistors close to CPU

RC144

100_020 1_1%

1 2

SOC_SVID_ DAT

(To VR)

SOC_SVID_ DAT (49)

4

Security Class ification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

SVID CLK

SOC_SVID_ CLK_R SVID_CLK

RC525

1 2

short@

0_0201_ 5%

2041/09/ 08 2013/10/ 28

3

Compal Secret Data

Deciphered Date

SOC_SVID_ CLK (49)SOC_SVID_ ALERT#_R (4 9)

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SKL Y(10/13) Power

LA-F803P

0.1

of

14 55Friday, June 08, 20 18

1

5

4

3

2

1

D D

1.0V@4.1A

+VCC_SA

CC61

CC60

2

1

2

@

22U_0603_6.3V6M

0.1U_0201_10V6K

2

1

RC149

RC150

CC59

0.1U_0201_10V6K

+VCC_SA

12

1 2

C C

100_020 1_1%

VCCSA_S ENSE(49) VSSSA_S ENSE(49)

100_020 1_1%

B B

AA29

AF30

AN29

T30 AC29 AH29 AN30

M31

V29 AC30 AK29 AR29

N30

Y29 AE29 AK30

R29

Y30

AF29 AL29

T29

AT29 AT30

M29

N28

@

L30

KBL-Y_BGA1515

UC1O

VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA

VCCSA_DDR VCCSA_DDR

VCCSA_SENSE VSSSA_SENSE

SKYLAKE_ULX

CPU POWER 4 OF 4

15 OF 20

Rev0.87

VCCG0 VCCG0 VCCG0 VCCG0 VCCG0 VCCG0 VCCG0 VCCG0 VCCG0 VCCG0 VCCG0 VCCG0

VCCG1 VCCG1 VCCG1 VCCG1 VCCG1 VCCG1 VCCG1 VCCG1 VCCG1 VCCG1 VCCG1 VCCG1

AA35 R38 Y35 AA38 T35 Y38 AC35 T38 AC38 V35 R35 V38

AF35 AK38 AR35 AF38 AL35 AR38 AH35 AL38 AH38 AN35 AK35 AN38

+VCC_SA(49,50,51 ) +VCCCOR EG0(18) +VCCCOR EG1(18)

+VCCCOR EG0

+VCCCOR EG1

+VCC_SA +VCCCOR EG0 +VCCCOR EG1

A A

Security Class ification

2041/09/ 08 2013/10/ 28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2041/09/ 08 2013/10/ 28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SKL Y(11/13) Power

LA-F803P

0.1

of

15 55Friday, June 08, 20 18

1

5

4

3

2

1

SKYLAKE_ULX

UC1Q

D D

C C

B B

AA36 AA47 AA57 AC15 AC27 AE10 AE43 AE50 AF16 AF40 AF62 AH24 AH40 AH49

AK24 AK40 AL16 AL33 AL46 AL53 AN18 AN33 AP64

AR47

AU55 AV16

AW17

AY16 AY32 AY42 AY52

BB28 BB38 BB48 BC17 BD56 BE33 BF56

BG2

BG8 BH28 BH40 BH50 BJ29 BK56 BL35

BM16

BP36 BP54

AH47 AJ59 AK16 AK36

A14

AK1

AR2 AR4

AR6

BA5 BA9

D10 E14 E24 E34 E44 E54

AK9

J14

V24

J9

@

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

KBL-Y_BGA1515

GND 1 OF 3

17 OF 20

Rev0.87

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

K23 K33 K43 K53 L61 N20 R10 R24 R40 R49 T13 T33 T60 V27 V43 V50 Y15 Y33 Y9 AA24 AA40 AA49 AA59 AC16 AC33 AE2 AE44 AE51 AF21 AF54 AF64 AH27 AH43 AH50 AK11 AK27 AK5 AL21 AL36 AL47 AL59 AN19 AN36 AR10 AR27 AR40 AR49 AR8 AU57 AV20 AW19 AY24 AY34 AY44 BA53 BB20 BB30 BB40 BB50 BC29 BD63 BE35 BF59 BG29 AL30 AL44 AL51 AN16 AN27 BA7

BH20 BH32 BH42 BH52

BJ47

BL1

BL47

BM18

BN6 BP38 BP60

E16

E26

E36

E46

E56

K15

K25

K35

K45

K55

N22

R30

R43

R50

V30

V44

V51

Y16

Y36

AA27 AA43 AA50 AA61 AC18 AC36 AE21 AE46

AE8

AF23

AF56 AG59 AH30 AH44 AH51 AK13

AK3

AK54

AL24

AL40

AL49

AM54

AN21 AN40 AR12 AR30 AR43 AP54 AR18 AR36 AR46 AR59

BA3

J3

M3

T18 T36 T62

Y7

UC1R

@

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

KBL-Y_BGA1515

SKYLAKE_ULX

GND 2 OF 3

18 OF 20

Rev0.87

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AR50 AT27 AU59 AV24 AW21 AY26 AY36 AY46 BA1 BA58 BB22 BB32 BB42 BB52 BC47 BE12 BE47 BG12 BG4 BH22 BH34 BH44 BH54 BJ62 BL29 BL8 BM20 BP22 BP44 D6 E18 E28 E38 E48 E59 J5 K17 K27 K37 K47 L14 N14 N24 R33 R44 R55 T21 T40 T64 V33 V46 Y1 Y24 Y40 AA30 AA44 AA51 AA63 AC19 AC40 AE30 AE47 AF13 AU53 AU63 AV54 AW25 AY30 AY50

AF33

AF58 AH16 AH33 AH46 AH54 AK15 AK33

AK7 AL27 AL43 AL50

AM64 AN24 AN59 AR15 AR33 AR44 AR51

AT54

AU61 AV52

AW23

AY28 AY38 AY48 BA11 BA64 BB24 BB34 BB44 BB54 BD20 BE29

BF20

BG15

BG6

BH24 BH36 BH46 BH56 BK20

BL31

BM11 BM38 BP28 BP46

AY40

AH36

C14 D62 E20 E30 E40 E50 F62

K19 K29 K39 K49 L57 N16 N26 R18 R36

V49 Y13

V40

J62

UC1S

@

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

KBL-Y_BGA1515

SKYLAKE_ULX

GND 3 OF 3

19 OF 20

Rev0.87

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS

R46 R6 T23 T56 V13 V36 V47 Y11 Y27 Y5 BB26 BB36 BB46 BB59 BD38 BE31 BF38 BG17 BG63 BH26 BH38 BH48 BH59 BK38 BL33 BM14 BN29 BP30 BP52 C40 D8 E22 E32 E42 E52 G14 J7 K21 K31 K41 K51 L59 N18 P54 R2 R4 R47 R8 T24 T58 Y3 AA33 AA46 AA55 AB13 AC21 AD13 AE4 AE49 AF15 AF36 AF60 AH23 BP1 A5 D1

BP62

A A

Security Class ification

2041/09/ 08 2013/10/ 28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2041/09/ 08 2013/10/ 28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SKL Y(12/13) GND

LA-F803P

0.1

16 55Friday, June 08, 20 18

1

5

D D

4

3

2

1

UC1T

@

G52

CFG[0]

F53

CFG[1]

J52

G58

G54

G56

BA19 BB18

BC19 BD18

M21

M19

H53 H55 D55 C56 F55 D61

D57 F61 J60 J58 H61 H59

J54

J56

A54

A60

L36 L38

D49

L20

L26

B4 B3

F3 F1

KBL-Y_BGA1515

CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15]

CFG[16] CFG[17]

CFG[18] CFG[19]

CFG_RCOMP

ITP_PMODE

RSVD RSVD

RSVD RSVD RSVD RSVD

RSVD

+1.0V_PR IM

XDP_ITP_P MODE

C C

1 2

@

RC567 1K_0 201_5%

RC151 49.9_040 2_1%

RC152 1K_0201 _1%

12

1 2

CFG4

CFG_RCO MP

XDP_ITP_P MODE

CFG4

Functional Strap Definitions

CFG[4] : Display Port Presence strap 0 = Enabled - A Display Port device is connected to the Embedded Display Port. No connect for disable. 1 = Disabled - No Physical Display Port attached to Embedded DisplayPort*. Pull-down to GND through a 1 K? +-5% resistor to enable port.

B B

SKYLAKE_ULX

RESERVED SIGNALS

20 OF 20

Rev0.87

RSVD_TP RSVD_TP

RSVD RSVD

RSVD RSVD RSVD RSVD

RSVD RSVD

RSVD

RSVD RSVD

RSVD

RSVD RSVD

TP5 TP6

TP4

TP1 TP2

BL64 BG47

BA17 AY18

BF18 BE19

BA23 AY22

R12 P13 M15 L16

L18 M17

AH7

K12 H12

BN3 BP3

L22 M23

BN1

AY20 BA21

BB14

M25 L24

L28 M27

BJ15 BJ17

1 2

RC153 0_0201_ 5%short@

A A

Security Class ification

2041/09/ 08 2013/10/ 28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2041/09/ 08 2013/10/ 28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

SKL Y(13/13) RSVD

LA-F803P

0.1

of

17 55Friday, June 08, 20 18

1

A

B

C

D

E

2

1

CC90

+VCCCOR EG0 +VCCCOR EG1 +1.2V_VD DQ +0.85VS_ VCCIO

2

CC91

0.1U_0201_10V6K

1

2

0.1U_0201_10V6K

1

+VCCCOR EG0(15) +VCCCOR EG1(15) +1.2V_VD DQ(12,19,20,21,44) +0.85VS_ VCCIO(5,12,47)

1 1

+VCCCOR EG0

2

CC62

CC63

0.1U_0201_10V6K

1

+VCCCOR EG1

2

CC64

0.1U_0201_10V6K

1

2

CC65

0.1U_0201_10V6K

1

Backside cap

CC66

+1.2V_VD DQ

2

CC67

0.1U_0201_10V6K

1

2

CC69

CC70

CC68

0.1U_0201_10V6K

1

CC71

0.1U_0201_10V6K

1

2

CC72

0.1U_0201_10V6K

1

2

CC73

0.1U_0201_10V6K

1

CC74

1

2

CC75

CC76

0.1U_0201_10V6K

1

2

CC77

0.1U_0201_10V6K

1

2

CC79

CC78

0.1U_0201_10V6K

1

2

CC80

0.1U_0201_10V6K

1

2

CC81

CC82

0.1U_0201_10V6K

1

2

CC83

CC84

0.1U_0201_10V6K

1

2

CC86

CC85

0.1U_0201_10V6K

1

2

CC87

0.1U_0201_10V6K

1

2

CC88

CC89

0.1U_0201_10V6K

1

0.1U_0201_10V6K

1

Backside cap

+0.85VS_ VCCIO +0.85VS_ VCCIO

PIR8 SI: From SE000000K80 to SE00000QL10

2 2

CC92

2

CC93

0.1U_0201_10V6K

1

CC95

CC94

0.1U_0201_10V6K

1

Backside cap Primary side

2

CC96

CC97

0.1U_0201_10V6K

1

2

CC98

0.1U_0201_10V6K

1

2

CC99

CC100

0.1U_0201_10V6K

1

2

1

CC101

2

CC102

0.1U_0201_10V6K

1

2

CC103

0.1U_0201_10V6K

1

CC104

1

2

CC105

CC106

0.1U_0201_10V6K

1

2

CC107

CC108

0.1U_0201_10V6K

1

2

CC109

CC110

0.1U_0201_10V6K

1

2

CC111

0.1U_0201_10V6K

1

2

CC112

CC113

0.1U_0201_10V6K

1

2

CC114

0.1U_0201_10V6K

1

2

CC115

CC116

0.1U_0201_10V6K

1

0.1U_0201_10V6K

1

CC117

1

CC118

@

22U_0603_6.3V6M

1U_0402_10V6K

2

Backside cap

cap

Issued Date

+1.2V_VD DQ+ 0.85VS_VCCIO

CC349

RF@

CC374

RF@

2

CC345

RF@

0.1U_0201_10V6K

1

2

CC341

CC354

RF@

0.1U_0201_10V6K

1

2

1

CC340

RF@

CC353

RF@

0.1U_0201_10V6K

1

CC355

CC350

RF@

0.1U_0201_10V6K

RF@

0.1U_0201_10V6K

1

0.1U_0201_10V6K

1

PIR19 SI: pop Cap.

1

CC375

CC376

RF@

68P_0201_50V8J

2

C

1

CC377

RF@

68P_0201_50V8J

2

2041/09/ 08 2013/10/ 28

1

CC378

CC379

RF@

68P_0201_50V8J

RF@

68P_0201_50V8J

2

Compal Secret Data

1

CC380

RF@

0.1U_0201_6.3V6K

2

Deciphered Date

1

CC381

RF@

0.1U_0201_6.3V6K

2

CC346

RF@

0.1U_0201_10V6K

1

CC382

RF@

0.1U_0201_6.3V6K

2

CC356

RF@

0.1U_0201_10V6K

1

PIR18 SI: Add CC400~CC404

close to CC379~CC383

1

2

1

CC402

RF@

CC403

RF@

12P_0201_50V8J

2

1

CC404

RF@

12P_0201_50V8J

2

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet of

Compal Electronics, Inc.

SKL Y -PROCESSOR DECOUPLING

LA-F803P

E

0.1

18 55Friday, June 08, 20 18

1

CC383

RF@

0.1U_0201_6.3V6K

2

1

CC400

CC401

RF@

12P_0201_50V8J

0.1U_0201_6.3V6K

2

12P_0201_50V8J

2

D

PIR19 SI: pop Cap. PIR19 SI: pop Cap.

2

CC365

3 3

4 4

A

RF@

CC363

RF@

0.1U_0201_10V6K

1

2

CC362

RF@

0.1U_0201_10V6K

1

2

CC368

CC369

RF@

0.1U_0201_10V6K

1

2

CC366

RF@

0.1U_0201_10V6K

1

2

CC361

RF@

0.1U_0201_10V6K

1

2

CC364

CC367

RF@

0.1U_0201_10V6K

1

B

2

CC370

RF@

0.1U_0201_10V6K

1

Security Class ification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

1

1 2

R114 243_0 201_1%@

1 2

R115 243_0 201_1%

1 2

R116 243_0 201_1%@

1 2

D D

C C

R110 243_0 201_1%

32-39

56-63

48-55

40-47

DDR_A_CAA_0(6) DDR_A_CAA_1(6) DDR_A_CAA_2(6) DDR_A_CAA_3(6) DDR_A_CAA_4(6) DDR_A_CAA_5(6) DDR_A_CAA_6(6) DDR_A_CAA_7(6) DDR_A_CAA_8(6) DDR_A_CAA_9(6)

DDR_A_CAB_0(6) DDR_A_CAB_1(6) DDR_A_CAB_2(6) DDR_A_CAB_3(6) DDR_A_CAB_4(6) DDR_A_CAB_5(6) DDR_A_CAB_6(6) DDR_A_CAB_7(6) DDR_A_CAB_8(6) DDR_A_CAB_9(6)

DDR_A_ODT0(6)

DDR_A_D34(6) DDR_A_D35(6) DDR_A_D38(6) DDR_A_D36(6) DDR_A_D39(6) DDR_A_D37(6) DDR_A_D32(6) DDR_A_D56(6) DDR_A_D61(6) DDR_A_D60(6) DDR_A_D58(6) DDR_A_D57(6) DDR_A_D59(6) DDR_A_D63(6) DDR_A_D62(6) DDR_A_D55(6) DDR_A_D51(6) DDR_A_D52(6) DDR_A_D49(6) DDR_A_D54(6) DDR_A_D53(6) DDR_A_D50(6) DDR_A_D48(6) DDR_A_D40(6) DDR_A_D41(6) DDR_A_D44(6) DDR_A_D43(6) DDR_A_D45(6) DDR_A_D46(6) DDR_A_D42(6) DDR_A_D47(6)

M0_A_ZQ0

M0_B_ZQ0

UD1A

C11

NC

B11

ZQ0_A

E3

NC

E2

ZQ0_B

B5

CA0_A

C5

CA1_A

D5

CA2_A

B6

CA3_A

C6

CA4_A

C9

CA5_A

D9

CA6_A

B10

CA7_A

C10

CA8_A

D10

CA9_A

L2

CA0_B

L3

CA1_B

L4

CA2_B

K2

CA3_B

K3

CA4_B

G3

CA5_B

G4

CA6_B

F2

CA7_B

F3

CA8_B

F4

CA9_B

N8

ODT_A

H13

ODT_B

N4

DQ0_A

T5

DQ1_A

R5

DQ2_A

P5

DQ3_A

N5

DQ4_A

T6

DQ5_A

R6

DQ6_A

P6

DQ7_A

T9

DQ8_A

R9

DQ9_A

T10

DQ10_A

R10

DQ11_A

P10

DQ12_A

N10

DQ13_A

T11

DQ14_A

R11

DQ15_A

T2

DQ16_A

R2

DQ17_A

P2

DQ18_A

N2

DQ19_A

T3

DQ20_A

R3

DQ21_A

P3

DQ22_A

N3

DQ23_A

N11

DQ24_A

N12

DQ25_A

P12

DQ26_A

T13

DQ27_A

R13

DQ28_A

P13

DQ29_A

T14

DQ30_A

R14

DQ31_A

CK_C_A CK_T_A

CK_C_B CK_T_B

CKE0_A

CKE0_B

CS0_N_A

CS0_N_B

DM0_A DM1_A DM2_A DM3_A

DM0_B DM1_B DM2_B DM3_B

DQ0_B DQ1_B DQ2_B DQ3_B DQ4_B DQ5_B DQ6_B DQ7_B DQ8_B

DQ9_B DQ10_B DQ11_B DQ12_B DQ13_B DQ14_B DQ15_B DQ16_B DQ17_B DQ18_B DQ19_B DQ20_B DQ21_B DQ22_B DQ23_B DQ24_B DQ25_B DQ26_B DQ27_B DQ28_B DQ29_B DQ30_B DQ31_B

C8 B8

H2 H3

C7 D7

NC

J3 J4

NC

D6 B7

NC

DDR_A_CS0#

K4

DDR_A_CS1#

J2

N6 P8 P4 P11

H14 F13 L14 D14

L15 L16 K13 K14 K15 K16 J15 J16 F14 F15 F16 E13 E14 E15 E16 D13 P15 P16 N14 N15 N16 M13 M14 L13 C13 C14 C15 C16 B13 B14 B15 B16

M_CLK_A_DDR #0 (6) M_CLK_A_DDR 0 (6)

M_CLK_A_DDR #1 (6) M_CLK_A_DDR 1 (6)

DDR_A_CKE0 (6) DDR_A_CKE1 (6)

DDR_A_CKE2 (6) DDR_A_CKE3 (6)

DDR_A_CS0# (6) DDR_A_CS1# (6)

DDR_A_D5 (6)DDR_A_D33(6) DDR_A_D0 (6) DDR_A_D7 (6) DDR_A_D6 (6) DDR_A_D4 (6) DDR_A_D1 (6) DDR_A_D3 (6) DDR_A_D2 (6) DDR_A_D29 (6) DDR_A_D30 (6) DDR_A_D31 (6) DDR_A_D24 (6) DDR_A_D28 (6) DDR_A_D27 (6) DDR_A_D26 (6) DDR_A_D25 (6) DDR_A_D22 (6) DDR_A_D23 (6) DDR_A_D21 (6) DDR_A_D18 (6) DDR_A_D19 (6) DDR_A_D16 (6) DDR_A_D17 (6) DDR_A_D20 (6) DDR_A_D10 (6) DDR_A_D11 (6) DDR_A_D13 (6) DDR_A_D9 (6) DDR_A_D15 (6) DDR_A_D14 (6) DDR_A_D12 (6) DDR_A_D8 (6)

0-7

24-31

16-23

8-15

+1.8V_MEM

+1.2V_VDDQ

C4059

+1.2V_VDDQ

12

+1.2V_VDDQ

C4060

0.047U_0402_25V7K

+VREFDQ_A

12

UD1C

A15

VDD1_0

A16

VDD1_1

B2

VDD1_2

R1

VDD1_3

T1

VDD1_4

T16

VDD1_5

A7

VDD2_0

A11

VDD2_1

B17

VDD2_2

C3

VDD2_3

C17

VDD2_4

H1

VDD2_5

H16

VDD2_6

L1

VDD2_7

R15

VDD2_8

T8

VDD2_9

U2

VDD2_10

U3

VDD2_11

D8

RFU0

D11

RFU1

E4

RFU2

H4

RFU3

J12

RFU4

M9

RFU5

A1

NC0

A17

NC1

U1

NC2

U17

NC3

H9CCNNN8 KTMLBR-NTM FBGA

@

VDDCA0 VDDCA1 VDDCA2 VDDCA3 VDDCA4 VDDCA5

VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20

VREF_CA_A VREF_CA_B

VREF_DQ_A VREF_DQ_B

A6 A9 B9 E1 G2 K1

A13 B12 C12 E17 G12 G17 U14 K12 K17 L17 M2 M3 M7 M10 M12 N1 P17 U5 U7 U10 U11

A10 J1

U8 H17

follow 561280_KBL UY PDG Rev2_0, remove RTT & VTT

+1.2V_VDDQ(12,18,20,21 ,44)

+1.8V_MEM(20,21)

+VREFCA(20,21 )

+VREFDQ_A(21)

+VREFCA

12

C4058

C4057

0.047U_0402_25V7K

+1.2V_VDDQ

+1.8V_MEM

+VREFCA

+VREFDQ_A

DDR_A_DQS#4(6)

B B

A A

DDR_A_DQS4(6)

DDR_A_DQS#7(6) DDR_A_DQS7(6)

DDR_A_DQS#6(6) DDR_A_DQS6(6)

DDR_A_DQS#5(6) DDR_A_DQS5(6)

5

N7

DQS0_C_A

P7

DQS0_T_A

N9

DQS1_C_A

P9

DQS1_T_A

R4

DQS2_C_A

T4

DQS2_T_A

R12

DQS3_C_A

T12

DQS3_T_A

H9CCNNN8 KTMLBR-NTM FBGA

@

DQS0_C_B DQS0_T_B

DQS1_C_B DQS1_T_B

DQS2_C_B DQS2_T_B

DQS3_C_B DQS3_T_B

4

J13 J14

G13 G14

M15 M16

D15 D16

DDR_A_DQS#0 (6) DDR_A_DQS0 (6)

DDR_A_DQS#3 (6) DDR_A_DQS3 (6)

DDR_A_DQS#2 (6) DDR_A_DQS2 (6)

DDR_A_DQS#1 (6) DDR_A_DQS1 (6)

UD1B

A2

VSS0

A3

VSS1

A4

VSS2

A5

VSS3

A8

VSS4

A12

VSS5

A14

VSS6

B1

VSS7

B3

VSS8

B4

VSS9

C1

VSS10

C2

VSS11

C4

VSS12

D1

VSS13

D2

VSS14

D3

VSS15

D4

VSS16

D12

VSS17

D17

VSS18

E5

VSS19

E6

VSS20

E7

VSS21

E8

VSS22

E9

VSS23

E10

VSS24

E11

VSS25

E12

VSS26

F1

VSS27

F5

VSS28

F12

VSS29

F17

VSS30

G1

VSS31

G5

VSS32

G15

VSS33

H9CCNNN8 KTMLBR-NTM FBGA

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2015/10/22 2017/10/22

G16

VSS34

H5

VSS35

H12

VSS36

H15

VSS37

J5

VSS38

K5

VSS39

L5

VSS40

L12

VSS41

M1

VSS42

M4

VSS43

M5

VSS44

M6

VSS45

M8

VSS46

M11

VSS47

M17

VSS48

N13

VSS49

N17

VSS50

P1

VSS51

P14

VSS52

R7

VSS53

R8

VSS54

R16

VSS55

R17

VSS56

T7

VSS57

T15

VSS58

T17

VSS59

U4

VSS60

U6

VSS61

U9

VSS62

U12

VSS63

U13

VSS64

U15

VSS65

U16

VSS66

J17

VSS67

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

LPDDR3 (CH0)

LA-F803P

1

19 55Friday, June 08 , 2018

of

0.1

5

4

3

2

1

+1.2V_VDDQ(12,18,19,21,44 )

+1.8V_MEM(19,21)

+VREFCA(19,21)

1 2

D D

C C

B B

R121 243_0 201_1%@

1 2

R122 243_0 201_1%

1 2

R124 243_0 201_1%@

1 2

R126 243_0 201_1%

DDR_B_CAA_0(6) DDR_B_CAA_1(6) DDR_B_CAA_2(6) DDR_B_CAA_3(6) DDR_B_CAA_4(6) DDR_B_CAA_5(6) DDR_B_CAA_6(6) DDR_B_CAA_7(6) DDR_B_CAA_8(6) DDR_B_CAA_9(6)

DDR_B_CAB_0(6) DDR_B_CAB_1(6) DDR_B_CAB_2(6) DDR_B_CAB_3(6) DDR_B_CAB_4(6) DDR_B_CAB_5(6) DDR_B_CAB_6(6) DDR_B_CAB_7(6) DDR_B_CAB_8(6) DDR_B_CAB_9(6)

DDR_B_ODT 0(6 )

24-31

56-63

48-55

16-23

M1_A_ZQ0

M1_B_ZQ0

DDR_B_D28(6) DDR_B_D25(6) DDR_B_D31(6) DDR_B_D29(6) DDR_B_D24(6) DDR_B_D30(6) DDR_B_D27(6) DDR_B_D26(6) DDR_B_D60(6) DDR_B_D61(6) DDR_B_D58(6) DDR_B_D63(6) DDR_B_D57(6) DDR_B_D56(6) DDR_B_D59(6) DDR_B_D62(6) DDR_B_D50(6) DDR_B_D54(6) DDR_B_D53(6) DDR_B_D51(6) DDR_B_D55(6) DDR_B_D52(6) DDR_B_D48(6) DDR_B_D49(6) DDR_B_D20(6) DDR_B_D23(6) DDR_B_D19(6) DDR_B_D22(6) DDR_B_D21(6) DDR_B_D17(6) DDR_B_D18(6) DDR_B_D16(6)

DDR_B_DQS# 3(6)

DDR_B_DQS3(6)

DDR_B_DQS# 7(6) DDR_B_DQS7(6)

DDR_B_DQS# 6(6) DDR_B_DQS6(6)

DDR_B_DQS# 2(6)

DDR_B_DQS2(6)

UD2A

C11

NC

B11

ZQ0_A

E3

NC

E2

ZQ0_B

B5

CA0_A

C5

CA1_A

D5

CA2_A

B6

CA3_A

C6

CA4_A

C9

CA5_A

D9

CA6_A

B10

CA7_A

C10

CA8_A

D10

CA9_A

L2

CA0_B

L3

CA1_B

L4

CA2_B

K2

CA3_B

K3

CA4_B

G3

CA5_B

G4

CA6_B

F2

CA7_B

F3

CA8_B

F4

CA9_B

N8

ODT_A

H13

ODT_B

N4

DQ0_A

T5

DQ1_A

R5

DQ2_A

P5

DQ3_A

N5

DQ4_A

T6

DQ5_A

R6

DQ6_A

P6

DQ7_A

T9

DQ8_A

R9

DQ9_A

T10

DQ10_A

R10

DQ11_A

P10

DQ12_A

N10

DQ13_A

T11

DQ14_A

R11

DQ15_A

T2

DQ16_A

R2

DQ17_A

P2

DQ18_A

N2

DQ19_A

T3

DQ20_A

R3

DQ21_A

P3

DQ22_A

N3

DQ23_A

N11

DQ24_A

N12

DQ25_A

P12

DQ26_A

T13

DQ27_A

R13

DQ28_A

P13

DQ29_A

T14

DQ30_A

R14

DQ31_A

N7

DQS0_C_A

P7

DQS0_T_A

N9

DQS1_C_A

P9

DQS1_T_A

R4

DQS2_C_A

T4

DQS2_T_A

R12

DQS3_C_A

T12

DQS3_T_A

H9CCNNN8 KTMLBR-NKM_FBGA253

@

CK_C_A CK_T_A

CK_C_B CK_T_B

CKE0_A

CKE0_B

CS0_N_A

CS0_N_B

DM0_A DM1_A DM2_A DM3_A

DM0_B DM1_B DM2_B DM3_B

DQ0_B DQ1_B DQ2_B DQ3_B DQ4_B DQ5_B DQ6_B DQ7_B DQ8_B

DQ9_B DQ10_B DQ11_B DQ12_B DQ13_B DQ14_B DQ15_B DQ16_B DQ17_B DQ18_B DQ19_B DQ20_B DQ21_B DQ22_B DQ23_B DQ24_B DQ25_B DQ26_B DQ27_B DQ28_B DQ29_B DQ30_B DQ31_B

DQS0_C_B

DQS0_T_B

DQS1_C_B

DQS1_T_B

DQS2_C_B

DQS2_T_B

DQS3_C_B

DQS3_T_B

C8 B8

H2 H3

C7 D7

NC

J3 J4

NC

D6 B7

NC

DDR_B_CS0 #

K4

DDR_B_CS1 #

J2

N6 P8 P4 P11

H14 F13 L14 D14

L15 L16 K13 K14 K15 K16 J15 J16 F14 F15 F16 E13 E14 E15 E16 D13 P15 P16 N14 N15 N16 M13 M14 L13 C13 C14 C15 C16 B13 B14 B15 B16

J13 J14

G13 G14

M15 M16

D15 D16

M_CLK_B_DD R#0 (6) M_CLK_B_DD R0 (6)

M_CLK_B_DD R#1 (6) M_CLK_B_DD R1 (6)

DDR_B_CKE0 (6) DDR_B_CKE1 (6)

DDR_B_CKE2 (6) DDR_B_CKE3 (6)

DDR_B_CS0 # (6) DDR_B_CS1 # (6)

DDR_B_D35 (6) DDR_B_D38 (6) DDR_B_D34 (6) DDR_B_D33 (6) DDR_B_D32 (6) DDR_B_D37 (6) DDR_B_D36 (6) DDR_B_D39 (6) DDR_B_D6 (6) DDR_B_D2 (6) DDR_B_D4 (6) DDR_B_D0 (6) DDR_B_D3 (6) DDR_B_D7 (6) DDR_B_D5 (6) DDR_B_D1 (6) DDR_B_D9 (6) DDR_B_D15 (6) DDR_B_D12 (6) DDR_B_D14 (6) DDR_B_D11 (6) DDR_B_D10 (6) DDR_B_D8 (6) DDR_B_D13 (6) DDR_B_D42 (6) DDR_B_D46 (6) DDR_B_D41 (6) DDR_B_D40 (6) DDR_B_D47 (6) DDR_B_D43 (6) DDR_B_D45 (6) DDR_B_D44 (6)

DDR_B_DQS# 4 (6)

DDR_B_DQS4 (6)

DDR_B_DQS# 0 (6) DDR_B_DQS0 (6)

DDR_B_DQS# 1 (6) DDR_B_DQS1 (6)

DDR_B_DQS# 5 (6) DDR_B_DQS5 (6)

32-39

0-7

8-15

40-47

+1.8V_MEM

+1.2V_VDDQ

UD2C

A15

VDD1_0

A16

VDD1_1

B2

VDD1_2

R1

VDD1_3

T1

VDD1_4

T16

VDD1_5

A7

VDD2_0

A11

VDD2_1

B17

VDD2_2

C3

VDD2_3

C17

VDD2_4

H1

VDD2_5

H16

VDD2_6

L1

VDD2_7

R15

VDD2_8

T8

VDD2_9

U2

VDD2_10

U3

VDD2_11

D8

RFU0

D11

RFU1

E4

RFU2

H4

RFU3

J12

RFU4

M9

RFU5

A1

NC0

A17

NC1

U1

NC2

U17

NC3

H9CCNNN8 KTMLBR-NKM_FBGA253

@

VDDCA0 VDDCA1 VDDCA2 VDDCA3 VDDCA4 VDDCA5

VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20

VREF_CA_A VREF_CA_B

VREF_DQ_A VREF_DQ_B

A6 A9 B9 E1 G2 K1

A13 B12 C12 E17 G12 G17 U14 K12 K17 L17 M2 M3 M7 M10 M12 N1 P17 U5 U7 U10 U11

A10 J1

U8 H17

C4063

+1.2V_VDDQ

+VREFCA

+VREFDQ_B

12

C4064

0.047U_0402_25V7K

C4061

12

0.047U_0402_25V7K

12

C4062

0.047U_0402_25V7K

follow 561280_KBL UY PDG Rev2_0, remove RTT & VTT

UD2B

A2

VSS0

A3

VSS1

A4

VSS2

A5

VSS3

A8

VSS4

A12

VSS5

A14

VSS6

B1

VSS7

B3

VSS8

B4

VSS9

C1

VSS10

C2

VSS11

C4

VSS12

D1

VSS13

D2

VSS14

D3

VSS15

D4

VSS16

D12

VSS17

D17

VSS18

E5

VSS19

E6

VSS20

E7

VSS21

E8

VSS22

E9

VSS23

E10

VSS24

E11

VSS25

E12

VSS26

F1

VSS27

F5

VSS28

F12

VSS29

F17

VSS30

G1

VSS31

G5

VSS32

G15

VSS33

H9CCNNN8 KTMLBR-NKM_FBGA253

@

VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67

G16 H5 H12 H15 J5 K5 L5 L12 M1 M4 M5 M6 M8 M11 M17 N13 N17 P1 P14 R7 R8 R16 R17 T7 T15 T17 U4 U6 U9 U12 U13 U15 U16 J17

+1.2V_VDDQ

+1.8V_MEM

+VREFCA

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2015/10/22 2017/10/22

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LPDDR3 (CH1)

LA-F803P

1

20 55Friday, June 08 , 2018

0.1

of

5

4

3

2

1

<LPDDR3_A_DQ> <LPDDR3_B_DQ> <LPDDR3_A_CA>

<LPDDR3_B_CA>

+1.2V_VD DQ +0.6V_B_ VREFDQ

12

RD97

8.2K_020 1_1%

D D

+VREFDQ _A

12

RD110

8.2K_020 1_1%

+0.6V_A_ VREFDQ

RD99

1 2

10_0201 _1%

PIR6 SI: change from 6.3V to 10V

1

CD248

0.022U_0 201_10V5R

2

12

RD103

24.9_040 2_1%

+VREFDQ _B

+1.2V_VD DQ +1.2V_VD DQ

12

RD111

8.2K_020 1_1%

RD115

RD112

8.2K_020 1_1%

12

1 2

10_0201 _1%

1

CD122

0.022U_0 201_10V5R

2

12

RD108

24.9_040 2_1%

+VREFCA

RD113

8.2K_020 1_1%

RD114

8.2K_020 1_1%

12

RD100

1 2

5.11_040 2_1%

+0.6V_VR EFCA

1

CD249

0.022U_0 201_10V5R

2

12

RD104

24.9_040 2_1%

PIR6 SI: change from 6.3V to 10VPIR6 SI: change from 6.3V to 10V

+1.2V_VD DQ(12,18,19,20,44)

+1.8V_ME M(19,20)

+VREFCA(1 9,20)

+VREFDQ _B(20)

+VREFDQ _A(19)

+1.2V_VD DQ

+1.8V_ME M

+VREFCA

+VREFDQ _B

+VREFDQ _A

CD212

10U_0402_6.3V6M

CD213

1

2

VDDQ DECAPS

CD215

10U_0402_6.3V6M

CD214

1

2

10U_0402_6.3V6M

CD216

10U_0402_6.3V6M

1

2

CD217

10U_0402_6.3V6M

CD218

10U_0402_6.3V6M

1

2

10U_0402_6.3V6M

1

2

VDD1 DECAPS

C C

+1.8V_ME M

CD10 10U_0402_6.3V6M

CD250 68P_0201_50V8J

@RF@

1

2

B B

CD251 68P_0201_50V8J

CD170 10U_0402_6.3V6M

@RF@

1

2

+1.8V_ME M

CD199 10U_0402_6.3V6M

CD252 68P_0201_50V8J

CD171 10U_0402_6.3V6M

1

2

CD196 10U_0402_6.3V6M

@RF@

1

2

CD254 68P_0201_50V8J

CD197 10U_0402_6.3V6M

CD253 68P_0201_50V8J

1

2

CD198 10U_0402_6.3V6M

@RF@

1

2

1

2

CD256 68P_0201_50V8J

CD255 68P_0201_50V8J

@RF@

1

2

1

2

+1.2V_VD DQ

CD244

10U_0402_6.3V6M

CD245

CD200 10U_0402_6.3V6M

CD246

10U_0402_6.3V6M

CD257 68P_0201_50V8J

@RF@

1

2

1

2

10U_0402_6.3V6M

CD247

10U_0402_6.3V6M

CD236

10U_0402_6.3V6M

CD237

10U_0402_6.3V6M

CD238

10U_0402_6.3V6M

1

2

CD239

1

2

CD241

10U_0402_6.3V6M

CD242

10U_0402_6.3V6M

CD240

10U_0402_6.3V6M

1

2

CD243

1

2

+1.2V_VD DQ+1.2V_VD DQ

10U_0402_6.3V6M

CD211

10U_0402_6.3V6M

1

2

1

2

+1.8V_PRIM TO +1.8V_MEM

+1.8V_ME M_OUT

A1

B1

Imax : 0.38 A

1 2

RD30 0_ 0402_5%

@

+1.8V_ME M

1

2

CD168

@

1U_0201 _6.3V6M

+1.8V_PR IM

1 2

CD169 1 U_0201_6.3V6M

SYSON(12,29,44)

PM_SLP_ S4#(9 ,29)

SYSON PM_SLP_ S4#

I (Max) : 0.38 A (95mA x4 pcs) RON(Max) : 130m ohm @ 1.8V V drop : 0.05 V(2.74%)

1 2

RD28 0_0 402_5%@

1 2

RD29 0_0 402_5%

UD5

A2

B2

G5178BB E1U_WLCSP 2X2-4

VOUT

VIN

GND

EN

A A

Security Class ification

2015/10/22

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2015/10/22

3

Compal Secret Data

Deciphered Date

2017/10/22

2

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

LPDDR3 VREF

LA-F803P

Friday, June 08, 201 8

1

5521

of

0.1

5

4

3

2

1

+5VS(27,29,30,3 9)

+3VS(5,7,9,10,11 ,24,27,29,31,36,37,3 9,47,48)

eDP Control:1.2/4.12

D D

<CPU>

C C

<CPU>

B B

TS_INT#(5)

EC_BKOF F#(29)

SOC_BKL _PWM(5)

EDP_HPD(5)

RV9

1 2

@

0_0201_ 5%

RV12

1 2

@

0_0201_ 5%

1 2

RV16 0 _0201_5%

@CPUPW M@

EDP_HPD

12

RV19 100K_02 01_5%

SOC_DMIC_ DATA0(8 )

SOC_DMIC_ CLK0(8)

CODEC_D MIC_DATA(27 )

CODEC_D MIC_CLK(27)

TS_INT#_R

CV14

1

68P_020 1_25V8

@RF@

2

12

@

DISPOFF#

RV15 10K_020 1_5%

INVTPW M

RV17 100K_02 01_5%

PV: change from TS_PWREN_PCH to PLT_RST#

1 2

PLT_RST #(9,23 ,24,29,31,33)

RV30 0 _0201_5%

PV: delete TS_PWREN_EC

PV: delete TS_RST#_PCH

1 2

TS_RST# _EC(29)

RV28 0 _0201_5%

PV: delete TS_STOP#_PCH

1 2

TS_STOP #_EC(29)

RA59 0 _0402_5%

RA60 0 _0402_5%

1 2

RV26 0 _0201_5%

12

LA5BLM15PX 221SN1D

EMI@

12

LA11BLM15PX 221SN1D

EMI@

CV25

22P_020 1_25V8

@RF@

I (Max) : 2A RON(Max) : 70m ohm V drop : 0.14 V(=2.8%)

+5VALW TO +5VS_SUB For IR camera & HP AMP

WW AN_PLT_RST #

Touch Screen

TS_RST#

TS_STOP #

SOC_DMIC_ DATA0_R

SOC_DMIC_ CLK0_R

1

CV26

22P_020 1_25V8

2

@EMI@

PIR38 SI: Remove +5VS_SUB

PV: delete +5V_SUB critical

PLUG_IN#(27)

IR_GPIO(29)

I2C_1_SDA _TS(10)

I2C_1_SCL _TS(10)

SOC_ENB KL(5,29) SOC_ENV DD(5)

Pin swap.

EDP_AUX N(5) EDP_AUX P(5)

EDP_TXP 0(5) EDP_TXN 0(5)

EDP_TXP 1(5) EDP_TXN 1(5)

EDP_TXP 2(5) EDP_TXN 2(5) EDP_TXP 3(5)

+3VL

RV29 100K_ 0201_5%

EDP_TXN 3(5)

LID_SW 1#(29)

1 2

Head phone AMP

HP_OUT_ L(27 ) HP_OUT_ R(27)

INT_MIC(27)

+5VS

+3VS

PV: remove TS_INT#_EC PV: delete +5V_SUB critical

SOC_DMIC_ DATA0_R SOC_DMIC_ CLK0_R I2C_1_SDA _TS I2C_1_SCL _TS TS_INT#_R TS_RST# TS_STOP # WW AN_PLT_RST #

INVTPW M

DISPOFF#

1 2

RV10 0_0201_ 5%@

eDP capacitor move to Sub/B

2

CC372

0.1U_0201_10V6K

CC373

0.1U_0201_10V6K

1

@RF@

I2C_1_SCL _TS

I2C_1_SDA _TS

TS_RST#

TS_STOP #

EDP_AUX N EDP_AUX P

EDP_TXP 0 EDP_TXN 0

EDP_TXP 1 EDP_TXN 1

EDP_TXP 2 EDP_TXN 2 EDP_TXP 3 EDP_TXN 3

LID_SW 1#

CV32

1

100P_02 01_25V7K

RF@

2

@ESD@

DV1

1

2

4

5

3

8

L05ESDL 5V0NA-4_SLP25 10P8-10-9

SC30000 2C00

+3VS_ED P_HPDEDP_HPD

10

9

7

6

GNDA

9

8

7

6

ESD request

I2C_1_SCL _TS

I2C_1_SDA _TS

TS_RST#TS_RST#

TS_STOP #

JLCD1

40

39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

G5

39

G4

38

G3

37

G2

36

G1 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9

8

7

6

5

4

3

2

1

ACES_50 398-04041-001

CONN@

45 44 43 42 41

A A

EDP_AUX N EDP_AUX P

5

@RF@

12

CV2822P_ 0201_25V8

12

COMPAL confidential circuit for HP

CV2922P_ 0201_25V8

@RF@

4

Security Class ification

2017/03/20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/03/20

3

Compal Secret Data

Deciphered Date

2020/03/20

2

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet of

LVDS/eDP CONN

LA-F803P

Friday, June 08, 201 8

LA-F803P

5522

1

5522

0.1

5

1 2 1 2

12 12 12

RN240_0201_5% RN250_0201_5% RN260_0201_5%

+3VS_WLAN

WLAN_COEX1 WLAN_COEX2 WLAN_COEX3

PCIE_CTX_C_DR X_N10 PCIE_CTX_C_DR X_P10

FF:30.3

D D

COEX1(10,26 ) COEX2(10,26) COEX3(10,26)

To WWAN module.

CLK_PCIE_N3(9)

CLK_PCIE_P3(9)

PCIE_CRX_DTX_N10(11) PCIE_CRX_DTX_P10(11)

PCIE_CTX_DRX_N10(11) PCIE_CTX_DRX_P10(11)

C C

CLK_PCIE_N3 CLK_PCIE_P3

PCIE_CRX_DTX_N10 PCIE_CRX_DTX_P10

PCIE_CTX_DRX_N10 PCIE_CTX_DRX_P10

CN12 0.1U_0201_6 .3V6K CN13 0.1U_0201_6 .3V6K

C-LINK is for Intel AMT

SDIO is not support for JfP

WLAN_TRANS MIT_OFF#(8)

+3VS_WLAN

B B

BT_ON(8)

WLAN_TRANS MIT_OFF# BT_ON

1 2

RN10 10K_0201_5%

1 2

RN21 10K_0201_5%

USB20_N3_R USB20_P3_R

4

UN1

4

3.3V

5

3.3V

72

3.3V

73

3.3V

1

UIM_POWER_SRC/GPIO1

2

UIM_POWER_SNK

3

UIM_SWP

11

COEX1

12

COEX2

13

COEX3

16

RESERVED/VDDIO18

18

RESERVED/ISH2_UART_RXD(I)(0/1.8V)

19

RESERVED/ISH2_UART_TXD(O)(0/1.8V)

66

RESERVED/ISH2_UART_RTS(O)(0/1.8V)

67

RESERVED/ISH2_UART_CTS(I)(0/1.8V)

21

ISH1_UART_CTS(I)(0/1.8V)

22

ISH1_UART_RTS(O)(0/1.8V)

24

ISH1_UART_RXD(I)(0/1.8V)

25

ISH1_UART_TXD(O)(0/1.8V)

33

REFCLKN0

34

REFCLKP0

36

PETN0

37

PETP0

39

PERN0

40

PERP0

42

CLINK_CLK

43

CLINK_DATA

44

CLINK_RESET

45

SDIO_RESET#(I)

46

SDIO_WAKE#(O)

47

SDIO_DATA3(IO)/WIGIG_UART_RXD(I)

48

SDIO_DATA2(IO)/WIGIG_UART_TDX(O)

49

SDIO_DATA1(IO)/WIGIG_UART_RTS(O)

50

SDIO_DATA0(IO)/WIGIG_UART_CTS(I)

51

SDIO_CMD(IO)

52

SDIO_CLK(I)

53

UART WAKE#(3.3V)

54

LPSS_UART_CTS

55

LPSS_UART_TXD

56

LPSS_UART_RXD

57

LPSS_UART_RTS

58

PCM_SYNC/I2S_WS

59

PCM_IN/I2S_SD_IN

60

PCM_OUT/I2S_SD_OUT

61

PCM_CLK/I2S_SCK

28

W_DISABLE1#

63

W_DISABLE2#

65

LED1#

64

LED2#

69

USB_D-

70

USB_D+

8

ALERT#

9

I2C_CLK

10

I2C_DATA

PK32000HP0 0

W/L_BT 82 65.D2WMLG.NVH _ 95 3395 0FH

PEWAKE#

CLKREQ#

PERST#

SUSCLK(32KHZ)

SYSCLK/GNSS0

TX_BLANKING/GNSS1

NFC_RESET#

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

EC_PCIE_WAKE# _WLAN

29

CLKREQ_PCIE#3_ WLAN

30

PLT_RST#_ WLAN

31

27

14 15

7

6 17 20 23 26 32 35 38 41 62 68 71 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108

3

+3VS_WLAN

RN1

10K_0201_5%

12

2

+3VALW(12,13,24,25,28,29,30 ,33,34,38,39,43,44,45,4 7,48,49,50)

RN19

10K_0201_5%

RN20

10K_0201_5%

12

@

EC_PCIE_WAKE#

12

CLKREQ_PCIE#3

12

RN20_0201_5%

PLT_RST#

12

RN30_0201_5% RN140_0201 _5%

SUSCLK

+3VALW

@

1

2

WLAN_PW R_EN(29)

CN1

4.7U_0402_6.3V6M

CN4

10U_0402_6.3V6M

2

SLP_WLAN#(9 )

1

CN3

CN2

0.1U_0201_6.3V6K

0.1U_0201_ 6.3V6K

@

2

WLAN_PW R_EN W LAN_PWR_EN_R

EC_PCIE_WAKE# (29 ) CLKREQ_PCIE#3 (9)

PLT_RST# (9,22,24,29,31,33 )

SUSCLK (9)

+3VALW

12

RN150_0201 _5%

12

@

RN160_0201 _5%

@

112

JUMP_43X79

UN2

A2

VIN

B2

EN

G5192DB11U _WLCSP4

I (Max) : 2A RON(Max) : 43m ohm @3.6V V drop : 0.086 V(=2.6%)

DMN63D8LV-7_ SOT563-6

JPHW10

2

VOUT

GND

+3VS_WLAN

A1

B1

2

5

QN1

+3VS_WLAN

1

2

CLKREQ_PCIE#3_ WLAN

1

S1

G1

6

D1

4

S2

G2

D2

3

@

CN6

CN5

0.01U_0402_16V7K

0.1U_0201_6.3V6K

1

2

1

CLKREQ_PCIE#3 EC_PCIE_WAKE# _WLAN

EC_PCIE_WAKE#

CN8

0.1U_0201_6.3V6K

CN9

0.01U_0402_16V7K

1

2

CN10

RF@

+3VALW

CN14

CN15

10P_0201_50V8J

10U_0402_6.3V6M

1

2

+3VALW TO +3VS_WLAN

Spec:3.3V +/-0.165V , 2A. Rise time:<10ms Max ripple:200mV,10-500KHz Noise:300mV

Co-Lay

1 2

RN8 0_0402_5 %

1 2

RN9 0_0402_5 %

LN1

USB20_P3(11)

USB20_N3(11)

1 2

DLP11TB80 0UL2L_4P

@RF@

34

USB20_P3_R

USB20_N3_R

A A

COMPAL confidential circuit for HP

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2017/03/20 2020/03/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

WLAN+BT

LA-F803P

1

23 55Friday, June 08 , 2018

of

0.1

5

4

3

2

1

+3VS(5,7,9,1 0,11,27,29,31,36,37 ,39,47,48)

It inverted the PCIe lane polarity of pin41 and pin43 for PCIe/SATA auto switchable.

D D

PCIE_CRX_ DTX_N5(1 1)

PCIE_CRX_ DTX_P5(11)

PCIE_CTX_ DRX_N5(1 1)

PCIE_CTX_ DRX_P5(11)

PCIE_CRX_ DTX_N6(1 1)

PCIE_CRX_ DTX_P6(11)

PCIE_CTX_ DRX_N6(1 1)

PCIE_CTX_ DRX_P6(11)

PCIE_CRX_ DTX_N7(1 1)

PCIE_CRX_ DTX_P7(11)

PCIE_CTX_ DRX_N7(1 1)

PCIE_CTX_ DRX_P7(11)

PCIE_CRX_ DTX_P8(11)

PCIE_CRX_ DTX_N8(1 1)

PCIE_CTX_ DRX_N8(1 1)

PCIE_CTX_ DRX_P8(11)

CLK_PCIE_ N2(9)

CLK_PCIE_ P2(9)

C C

SATA_GP 1(11)

B B

NGFF_SS D_PWREN(10)

RS21

100K_02 01_5%

+3V_PRIM

1 2

RS49 0_0201 _5%

1

3

+3VS

RS48

1 2

CS11 0.22U_ 0201_6.3V6M

1 2

CS12 0.22U_ 0201_6.3V6M

1 2

CS13 0.22U_ 0201_6.3V6M

1 2

CS14 0.22U_ 0201_6.3V6M

1 2

CS21 0.22U_ 0201_6.3V6M

1 2

CS22 0.22U_ 0201_6.3V6M

1 2

CS23 0.22U_ 0201_6.3V6M

1 2

CS24 0.22U_ 0201_6.3V6M

1 2

RS22 100K_0 201_5%

SSD_PDE T

1 2

@

2

QS1 PJE138K 1N SOT-523-3

SB00001 KM00

I (Max) : 3 A RON(Max) : 43m ohm @ 3.6V V drop : 0.129V (=3.9%)

+3VALW

US1

A2

VIN

B2

EN

G5192DB 11U_WLCSP 4

VOUT

GND

+3VS

PCIE_CRX_ DTX_N5 PCIE_CRX_ DTX_P5

PCIE_CTX_ C_DRX_N5 PCIE_CTX_ C_DRX_P5

PCIE_CRX_ DTX_N6 PCIE_CRX_ DTX_P6

PCIE_CTX_ C_DRX_N6 PCIE_CTX_ C_DRX_P6

PCIE_CRX_ DTX_N7 PCIE_CRX_ DTX_P7

PCIE_CTX_ C_DRX_N7 PCIE_CTX_ C_DRX_P7

PCIE_CRX_ DTX_P8 PCIE_CRX_ DTX_N8

PCIE_CTX_ C_DRX_N8 PCIE_CTX_ C_DRX_P8

CLK_PCIE_ N2 CLK_PCIE_ P2

@EMI@

DS1 CK04021 01V05_0402-2

1 2

A1

B1

+3VS_SS D

JSSD1

1

GND

3

GND

5

PERn3

7

PERp3

9

GND

11

PETn3

13

PETp3

15

GND

17

PERn2

19

PERp2

21

GND

23

PETn2

25

PETp2

27

GND

29

PERn1

31

PERp1

33

GND

35

PETn1

37

PETp1

39

GND

41

PERn0/SATA B+

43

PERp0/SATA B-

45

GND

47

PETn0/SATA A-

49

PETp0/SATA A+

51

GND

53

REFCLKn

55

REFCLKp

57

GND

67

N/C

69

PEDET

71

GND

73

GND

75

GND

77

MTG77

CONN@

LOTES_A PCI0146-P008A

3.3VAUX

3.3VAUX N/C N/C

DAS/DSS#

3.3VAUX

3.3VAUX N/C N/C N/C N/C N/C N/C N/C N/C N/C

DEVSLP

N/C N/C N/C N/C N/C

PERST#

CLKREQ#

PEWake#

N/C N/C

SUSCLK

3.3VAUX

MTG76

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58

68 70 72 74

76

+3VS_SS D

PLT_RST #_SSD CLKREQ_ PCIE#2

NGFF_SS D_WAKE#_R

DEVSLP1

CLKREQ_ PCIE#2

DEVSLP1 (11 )

12

RS200_0201 _5% @

12

RS470_0201 _5% @

PLT_RST # (9,22 ,23,29,31,33) CLKREQ_ PCIE#2 (9) NGFF_SS D_WAKE# (10)

1 2

@

RS46 10K_02 01_5%

RF@

1 2

CS25 10P_0 201_25V8

+3VS_SS D

CS8

CS7

10U_0603_6.3V6M

CS5

1

68P_0201_50V8J

A A

RF@

2

1

CS6

1

68P_0201_50V8J

2

COMPAL confidential circuit for HP

5

CS9

0.1U_0201_10V6K

1U_0201_6.3V6M

1

12

2

1

CS10

RF@

10P_020 1_25V8

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS T HE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS T HE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/03/20 2020/03/20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom 0.1

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

NGFF_M.2_SSD

LA-F803P

24 55F riday, June 08, 201 8

1

5

4

3

2

1

FF:32.3

+3VALW + 3VALW_W WAM

12

D D

+3V_PRIM

R5802 10K_020 1_5%

1 2

WW AN_PREN(7)

WW AN_PWRE N

UW1

A2

VIN

B2

EN

G5178BB E1U_WLCSP 2X2-4

RW3 50_0402_5%

@

Imax:40mA

A1

VOUT

I (Max) : 0.04A RON(Max) : 95m ohm @ 3.6V

GND

B1

V drop : 0.0038 V(=0.12%)

+3VALW TO +3VALW_WWAM

PV: un-pop RW35, UW1/R5802 pop

+3VALW _WW AM

1 2

CW2 1 0.01U_02 01_6.3V7K

1 2

CW2 2 0.1U_020 1_6.3V6K

1 2

CW2 3 1U_0201 _6.3V6M

C C

From module

CW1 70.47U_04 02_6.3V6K

CW1 80.47U_04 02_6.3V6K

PCIE_CRX_ RD_DTX_P9

PCIE_CRX_ RD_DTX_N9

PCIE_CRX_ C_DTX_P9(26)

RW37

51_0402_1%

RW36

51_0402_1%

12

B B

12

+3VALW _WW AM

WW AN_EQ

UW4

WW AN_DE

GND

GPAD

TX+

8

DE

7

6

5

9

1

VCC

2

RX+

RX-3TX-

4

EQ

SN75LVP E801DRFR_W SON8_2X2

PCIE_CRX_ C_RD_DTX_P9

PCIE_CRX_ C_RD_DTX_N9

12

CW1 90.22U_04 02_6.3V6K

12

CW2 00.22U_04 02_6.3V6K

PCIE_CRX_ DTX_P9 (11)

PCIE_CRX_ DTX_N9 (1 1)PCIE_CRX_ C_DTX_N9(26)

To CPU

PIR5 SI: WWAN Pcie change EQ setting

+3VALW _WW AM +3VALW _WW AM

12

RW6

@

10K_020 1_5%

WW AN_EQ W WAN_D E

A A

12

RW7 10K_020 1_5%

@

12

RW1 8 10K_020 1_5%

12

RW1 9 10K_020 1_5%

Security Class ification

COMPAL confidential circuit for HP

5

4

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/03/ 20 2020/03/ 20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Custom

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCIe redriver

LA-F803P

25 55Friday, June 08, 20 18

1

0.1

of

A

+3V_PRIM

12

RW3 2

1 1

WW AN_ASPM_CT RL(8)

100K_02 01_5%

PV: UW2 move to sub/B

B

12

RW30_0201_ 5%

WW AN_PCIE_RESE T#WW AN_ASPM_CT RL

To Module 50pin

C

12

RW3 8

@

100K_02 01_5%

D

+1.8V_PR IM

UW3

@

NC2

6

5

4

Y

NC11VCC

2

A

3

GND

74AUP1G 07FZ4-7_X2-DFN 1410-6

SA00007 YE00

12

@

RW3 1 100K_02 01_5%

E

WW AN_RESET#(10 )

WW AN_RESET#

12

RW3 40_0201_5%

WW AN_RESET#_ CONN

To Module 67pin

PV: delete RW29

2 2

WW AN_WAKE #(10)

WW AN_WAKE # WW AN_WAKE #_A

12

RW50_0201_ 5%

To Module 54pin

RC483 reserved PU

PV: add SUB_EN

5V_3V_E N(43)

12

@

RW4 00_0201_5%

12

RW3 90_0201_5%

To EC

From CPU

3 3

To Redriver

IR Camera

EMI@

LV1

USB20_N 9(11)

USB20_P 9(11)

1

4

DLM0NSN 900HY2D_4P

SM07000 5U00

2

3

USB20_N 9_R

2

USB20_P 9_R

3

SMB_BS_ CLK(29,49) SMB_BS_ DATA(29 ,49)

BATT_SH IP#(29) WW AN_PWRE N(7)SUB_EN(29) CAMERA_ PWREN(7)

PCIE_CTX_ DRX_P9(11)

PCIE_CTX_ DRX_N9(11 )

PCIE_CRX_ C_DTX_P9(25) PCIE_CRX_ C_DTX_N9(25)

CLK_PCIE_ P1(9)

CLK_PCIE_ N1(9 )

CLKREQ_ PCIE#1(9)

WW AN_SAR(2 9)

WW AN_DISABLE#(7)

COEX1(10,23) COEX2(10,23)

COEX3(10,23) ISH_I2C_0_SC L(10) ISH_I2C_0_SD A(10)

INT1_A_G(10) INT2_A_G(10)

WW AN_PWRE N

USB20_P 9_R USB20_N 9_R PCIE_CTX_ DRX_P9 PCIE_CTX_ DRX_N9

PCIE_CRX_ C_DTX_P9 PCIE_CRX_ C_DTX_N9

CLK_PCIE_ P1 CLK_PCIE_ N1

WW AN_PCIE_RESE T#

WW AN_WAKE #_A

WW AN_RESET#_ CONN

ISH_I2C_0_SC L ISH_I2C_0_SD A

+8.4VB +8 .4VB_CONN

1 2

RV32 0_080 5_5%@

1 2

RV33 0_080 5_5%@

1 2

RV34 0_080 5_5%@

1 2

RV35 0_080 5_5%@

1

RF@

CW2 5 68P_020 1_50V8J

2

1

RF@

CW2 4 68P_020 1_25V8

2

WW AN_SAR

WW AN_DISABLE#

JWW AN1

40

39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

G5

39

G4

38

G3

37

G2

36

G1 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9

8

7

6

5

4

3

2

1

ACES_50 398-04041-001

CONN@

45 44 43 42 41

4 4

Security Class ification

COMPAL confidential circuit for HP

PIR14 SI: remove D6

A

B

Security Class ification

2017/03/ 20 2020/03/ 20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/03/ 20 2020/03/ 20

C

Compal Secret Data

Deciphered Date

Title

Size Document N umber Rev

Custom

Date: Sheet

Date: Sheet of

D

Date: Sheet of

FF:32.3

Compal Electronics, Inc.

WWAN CONN

LA-F803P

26 55Friday, June 08, 20 18

E

0.1

of

5

4

3

2

1

Codec HDA-link powerCodec IO power

FF:10.6 RTD3 support

1 2

@

RA3

HP_OUTR HP_OUTL

GNDA

0_0603_5%

SPK_OUT_R+ (28) SPK_OUT_R- (28)

SPK_OUT_L+ (28) SPK_OUT_L- (28)

HDA_SDOUT_R (8) HDA_SDIN0 (8)

HDA_BIT_CLK_R (8)

PLUG_IN# (2 2)

+DVDD

MUTE_LED_IN (2 9)

To EC

+5VS_AVDD

D D

To SPK Amp

I2S_MCLK_R(28) I2S_BCLK_R(28) I2S_OUT_R(2 8) I2S_LRCK_R(28)

I2S_IN_R(28)

CA822P_0201_25V8

CA722P_0201_25V8

CA622P_0201_25V8

CA922P_0201_25V8

1

2

+MIC2_VREFO

I2S_MCLK_R I2S_BCLK_R I2S_OUT_R I2S_LRCK_R I2S_IN_R I2S_IN

RA1 33_0201_5% RA2 33_0201_5% RA5 33_0201_5% RA6 33_0201_5% RA7 33_0201_5%

1

CA1022P_0201_25V8

2

1 2 1 2 1 2 1 2 1 2

close to CODEC :ALC3292

C C

INT_MIC_R

1 2

RA4 2 .2K_0201_5%

CA5 10U_0402_6.3 V6M

GNDA

EC_SMB_CK3(28,29) EC_SMB_DA3(28,29)

1 2

RA14 100K_0201_5%

CA16 4.7U_0402_6.3V6M

GNDA

CA17 10U_0402_6.3V6M

GNDA

CA18 10U_0402_6.3V6M

HDA_SYNC_R(8)

GNDA

CODEC_DMIC_CLK(22 ) CODEC_DMIC_DATA(22)

1 2

CA23 2.2U_0402_6.3V6M

1 2

CA26 2.2U_0402_6.3V6M

1 2

RA8 0_0201_5%@ RA10 0_020 1_5%@

1 2 1 2 1 2

1 2 1 2

HDA_SYNC_R

GNDA

INT_MIC_R

AMIC2_CAP

LDO1_CAP LDO2_CAP LDO3_CAP

PC_BEEP

ACPVEE

CBN CBP

CODEC_DMIC_CLK CODEC_DMIC_DATA

I2S_MCLK I2S_BCLK I2S_OUT I2S_LRCK

UA1

33

5VSTB/AUX_MODE

30

MIC2_L/RING2

31

MIC2_R/SLEEVE

29

MIC2_VREFO_R

28

MIC2_VREFO_L

32

MIC2_CAP

11

I2S_MCLK/GPIO3

10

I2S_BCLK/DSD-SCLK

9

I2S_OUT/DSD-R

12

I2S_LRCK/DSD-L

8

I2S_IN

7

I2C_CLK

6

I2C_DATA

35

LINE2_R

36

LINE2_L

39

LDO1-CAP

21

LDO2-CAP

19

LDO3-CAP

34

PCBEEP

15

AUDIOLINK:SYNC

25

CPVEE

24

CBN

23

CBP

5

GPIO_1/DMIC_CLK

4

GPIO_0/DMIC_DATA12

1

I2S_EN/SPDIF_OUT/GPIO_2/DMIC_DATA34/DMIC_CLK_IN

ALC3292-CG_MQFN4 8_6X6

DVDD

DVDD_IO

AVDD1 AVDD2

PVDD1 PVDD2

SPK_OUT_R+

SPK_OUT_R-

SPK_OUT_L+

SPK_OUT_L-

HPOUT_R

HPOUT_L

AUDIOLINK:SDATA_OUT

AUDIOLINK:SDATA_IN

AUDIOLINK:BCLK

HP/LINE2_JD

I2S_IN/I2S_OUT_JD

VREF

AVSS1 AVSS2

DC_DET/EAPD

Thermal_Pad

3 18

40 20

41 46

45 44

42 43

HPOUT_R

26

HPOUT_L

27

17

HDA_SDIN0_R

16

HDA_BIT_CLK_R

14

2

PDB

PLUG_IN#_R

48

MUTE_LED_IN

47

38

VREF

37 22

13

49

+DVDD +3VDS_AUDIO

+5VS_AVDD +1.8VS_AVDD

+5VS_PVDD

RA9 33_0201_5% RA11 33_02 01_5%

RA12 33_02 01_5% CA93 2.2P_02 01_25V

CA15 22P_0 201_25V8@

RA15 0_020 1_5%@ RA17 0_020 1_5% RA16 100K_ 0201_5%@

CA19 2 .2U_0402_6.3V6M

CA20 0 .1U_0201_6.3V6K

GNDA

EC_AMP_EAPD

2

CA88

0.1U_0201_10 V6K

1

2014-09-18: HP_OUT With Headphone Amp. : 0 ohm No Amp. : 75 or 100 ohm

1 2 1 2

1 2

MP@

1 2

1 2 1 2 1 2

1 2

EC_AMP_EAPD (29 )

12

RA54100K_0201_5 %

+3VS

PC Beep

PC_BEEP_R

EC Beep

SB Beep

B B

EC_BEEP#(29 )

SPKR(8)

1 2

CA27

0.1U_0201_6.3 V6K

1 2

CA28

0.1U_0201_6.3 V6K

RA19 47K_0201_5%

1 2

12

RA20 10K_0201_5%

1 2

CA29

0.1U_0201_6.3 V6K

PC_BEEP

Close to Codec pin34

LA8

1 2

CA30

@EMI@

0.1U_0201_6.3 V6K

1 2

@

RA22 0_0603_5%

1 2

@

RA24 0_0603_5%

1 2

@

RA67 0_0603_5%

1 2

CA31

EMI@

0.1U_0201_6.3 V6K

1 2

CA32

EMI@

0.1U_0201_6.3 V6K

1 2

CA36

A A

@EMI@

0.1U_0201_6.3 V6K

1 2

CA37

EMI@

0.1U_0201_6.3 V6K

1 2

CA38

@EMI@

0.1U_0201_6.3 V6K

COMPAL confidential circuit for HP

GNDA

5

<CPU>

<EC>

HDA_RST#_R(8)

EC_MUTE#(29)

HDA_RST#_R

4

+3VDS_AUDIO +3VDS_AUDIO

12

RA25

@

10K_0201_5%

B

2

@

E

3 1

C

QA2

SB000008E10

MMBT3904W H_SOT323-3

DA3

21

LRB521S-40T 1G_SOD523-2-2

SCS00008100

12

100K_0201_5 % RA26

2

@

CA94

0.1U_0201_10 V6K

1

PDBPD B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

HP_OUTR

HP_OUTL

INT_MIC_R INT_MIC

2017/03/20 2020/03/20

EMI@

12

BLM15AX601SN1D_2 P

SM01000KL00

LA9

EMI@

12

BLM15AX601SN1D_2 P

SM01000KL00

LA10

EMI@

12

BLM15AX601SN1D_2 P

SM01000KL00

Compal Secret Data

Deciphered Date

1

2

PIR15 SI: remov e DA10,DA11

2

CA1

0.1U_0201_6.3V6K

1

2

Place near Pin3 Place near Pin18

Headphone

Codec Mixers/IO power

Codec Stage power

CA21

0.1U_0201_6.3V6K

1

2

Place near Pin41 Place near Pin46

CA97

@EMI@

100P_0201_2 5V8J

+3VDS_AUDIO+DVDD+3VS_AUDIO

CA2

10U_0402_6.3V6M

0.1U_0201_6.3V6K

1

2

1 2

LA1

CA4

10U_0402_6.3V6M

CA3

SUPPRE_ KC FBMA-10-10 0505-101T 0402

PCB Footprint = R_0402

1

2

Codec ADCs/DACs power

1 2

CA14

10U_0402_6.3V6M

CA13

0.1U_0201_6.3V6K

1

2

CA11

0.1U_0201_10V6K

CA12

10U_0402_10V6M

1

2

1

Place near Pin40

GNDA

CA22

0.1U_0201_6.3V6K

CA25

CA24

10U_0402_6.3V6M

2

1

2

CA96 10P_0201_25 V8

10U_0402_6.3V6M

1

2

1

HP_OUT_R

HP_OUT_L

1

@EMI@

CA95 10P_0201_25 V8

2

GNDAGNDAGNDA

Title

Size Document Number Rev

Custom

Date: Sheet of

0_0402_5%

2

1

Place near Pin20

GNDA

LA2 0_0603_5%

1 2

AZ5125-01H.R7G_SOD 523-2

SC400005Q00

LA13

@

1 2

FBMA-L11-2012096 01LMA20T_2P

LA4

1 2

FBMA-L11-2012096 01LMA20T_2P

600ohms @100MHz 2A P/N: SM01000EE00

@EMI@

Compal Electronics, Inc.

AUDIO ALC3292-CG

LA-F803P

+1.8VS_AUDIO+1.8VS_AVDD

@

LA3

@

DA1

HP_OUT_R (22)

HP_OUT_L (22)

INT_MIC (22)

1

+5VS+5VS_AVDD

+5VALW

+5VS+5VS_P VDD

CA91

0.1U_0201_6.3V6K

+3VS_AUDIO

12

10U_0402_6.3V6M

1

2

CA92

2

1

0.1

27 55Friday, June 08, 2018

0.1

5

4

3

2

1

FF:10.6

D D

I2S_MCLK_R(27) I2S_BCLK_R(27) I2S_LRCK_R(27) I2S_OUT_R(27) I2S_IN_R(27)

SI: pop RA38,RA39

EC_SMB_CK3(27,29) EC_SMB_DA3(27,29) SPK_OUT_L+(27)

To EC

C C

EC_AMP_RST#(29)

EC_AMP_RST#

I2S_MCLK_R I2S_BCLK_R I2S_LRCK_R I2S_OUT_R I2S_IN_R

1 2

RA38 4.7K_020 1_5%

1 2

RA39 4.7K_020 1_5%

1 2

RA43 0_0 201_5%

@

I2S_MCLK_R I2S_BCLK_R I2S_LRCK_R I2S_OUT_R I2S_IN_R

1 2

RA33 0_0 201_5%

1 2

RA34 0_0 201_5%

1 2

RA35 0_0 201_5%

1 2

RA36 0_0 201_5%

1 2

RA37 0_0 201_5%

+3VALW

EC_SMB_CK3 EC_SMB_DA3

+3VALW

12

RA42 10K_0201_5%

1

CA68

0.1U_0201_6.3V6K

2

1 2

RA44 0_0 201_5%

1 2

RA45 0_0 201_5%

1 2

RA46 0_0 201_5%

1 2

RA47 0_0 201_5%

1 2

RA48 0_0 201_5%

address

T356PAD @

I2S_MCLK_R_L I2S_BCLK_R_L I2S_LRCK_R_L I2S_OUT_R_L I2S_IN_R_L

ICC_RX_A ICC_CLK ICC_TX_A

I2S_MCLK_R_R I2S_BCLK_R_R I2S_LRCK_R_R I2S_OUT_R_R I2S_IN_R_R

PIR17 SI: pop RA48

EC_SMB_CK3

B B

address

+3VALW

EC_AMP_RST#

A A

ADR0_SLCKADR1_MISO

0 0

0 1

1 2

RA53 0_0201_5%

@

address

0x98(8bit) 0x4C(7bit)

0x9A(8bit) 0x4D(7bit)

Speaker Left

Speaker Right

EC_SMB_DA3

1 2

RA51 10K_0201 _5%

12

RA52 10K_0201_5%

1

CA87

0.1U_0201_6.3V6K

2

T357PAD @

ICC_TX_A ICC_CLK ICC_RX_A

COMPAL confidential circuit for HP

5

IC:10.2

UA3

C3

INP

D3

INM

D6

MCLK_GPI2

B6

BCLK1_GPIO1

A5

WBLK1_GPIO2

B5

DIN1_GPI1

A6

DOUT1_GPIO3

F6

BCLK2_GPIO5

E5

WCLK2_GPIO6

C5

DIN2_GPI8

E6

DOUT2_GPIO7

F3

SCL_SS#

E4

SDA_MOSI

B4

ICC_GPI3

A4

ICC_GPIO9

B3

ICC_GPIO10

G3

ADR1_MISO

F5

ADR0_SCLK

G4

SPI_SELECT

D5

IRQ_GPIO4#

G5

RESET#

G1

NC1

G2

NC2

UA5

C3

INP

D3

INM

D6

MCLK_GPI2

B6

BCLK1_GPIO1

A5

WBLK1_GPIO2

B5

DIN1_GPI1

A6

DOUT1_GPIO3

F6

BCLK2_GPIO5

E5

WCLK2_GPIO6

C5

DIN2_GPI8

E6

DOUT2_GPIO7

F3

SCL_SS#

E4

SDA_MOSI

B4

ICC_GPI3

A4

ICC_GPIO9

B3

ICC_GPIO10

G3

ADR1_MISO

F5

ADR0_SCLK

G4

SPI_SELECT

D5

IRQ_GPIO4#

G5

RESET#

G1

NC1

G2

NC2

4

VBOOST VBOOST

IOVDD

SPK_P

SPK_M

VSENSE_P

VSENSE_M

PGND PGND_B PGND_B

IOGND

AGND

DGND

SND032557_WCSP42

VBOOST VBOOST

IOVDD

SPK_P

SPK_M

VSENSE_P

VSENSE_M

PGND PGND_B PGND_B

IOGND

AGND

DGND

SND032557_WCSP42

VBAT

DVDD

AVDD

VREG

VBAT

DVDD

AVDD

VREG

B1

SW

B2

SW

C1 C2

A3

C6

F4

G6

D2

F1

D1

E2

F2

E1 A2 A1

D4 E3 C4

B1

SW

B2

SW

C1 C2

A3

C6

F4

G6

D2

F1

D1

E2

F2

E1 A2 A1

D4 E3 C4

1 2

LA6 1UH +-20% DFE252010F-1R0M=P2

SHI0000S500

+VBAT_L

Imax=50mA

Imax=30mA

Imax=5mA

1 2

RA56 0_0201_5%

VREG_L

1 2

CA60 0.01U_0201_16V7

SPK_P_L+

SPK_M_L-

1 2

LA7 1UH +-20% DFE252010F-1R0M=P2

SHI0000S500

+VBAT_R

Imax=50mA

Imax=30mA

Imax=5mA

1 2

RA58 0_0402_5%

VREG_R

1 2

CA79 0.01U_0402_16V7K

SPK_P_R+

SPK_M_R-

+VBOOST_L_8.5V

1 2

RA55 0_0402_5%

+1.8VALW_AUDIO

+3VALW

+IOVDD_L

+VBOOST_R_8.5V

1 2

RA57 0_0402_5%

+1.8VALW_AUDIO

+3VALW

+IOVDD_R

SM01000M700

+5VALW

Imax=3A

+VBOOST_L_8.5V

SM01000M700

1 2

RA40

BLM15PX471SN1D_2P EMI@

1 2

RA41

BLM15PX471SN1D_2P EMI@

close to Amp:TAS2557

+5VALW

Imax=1.5A

+VBOOST_R_8.5V

1 2

RA49

BLM15PX471SN1D_2P EMI@

1 2

RA50

BLM15PX471SN1D_2P EMI@

close to Amp:TAS2557

3

12

CA52 0.1U_0201_6.3V6K

12

CA49 1U_0201_6.3V6M

12

CA53 10U_0402_10VAK

12

CA54 22U_0402_6.3V6M

SPK_OUT_L-(27)

1 2

RA61 0_0 402_5%

1 2

RA62 0_0 402_5%

12

@EMI@

CA61 1000P_0201_16V7K

CA62 1000P_0201_16V7K

SPK_OUT_L+_CONN SPK_OUT_L-_CONN SPK_L+_CONN SPK_L-_CONN

JSPK1

1

2

3

4

ACES_50208-0040N-001

CONN@

PIR13 SI: remove CA98,CA99

2.2U_0402_6.3V6M

5

G1

6

G2

close to SPK CONN.

12

CA71 0.1U_0201_6.3V6K

12

CA72 1U_0201_6.3V6M

12

CA70 10U_0402_10VAK

12

CA73 22U_0402_6.3V6M

1 2

SPK_OUT_R+(27) SPK_OUT_R-(27)

RA64 0_0402_5%

1 2

RA63 0_0402_5%

12

CA80 1000P_0201_16V7K

12

@EMI@

RF@

CA81 1000P_0201_16V7K

CA100 22P_0201_25V8

SPK_OUT_R+_CONN SPK_OUT_R-_CONN

SPK_R+_CONN SPK_R-_CONN

12

RF@

CA101 22P_0201_25V8

JSPK2

1

2

3

G1

4

G2

4

ACES_50208-0040N-001

CONN@

5 6

close to SPK CONN.

SPK_R-_CONN

SPK_R+_CONN

2

3

@ESD@

L03ESDL5V0CG3-2 C/A SOT523

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DA5

SCA00002A00

1

Compal Secret Data

2017/03/20 2020/03/20

Compal Secret Data

2

Deciphered Date

L03ESDL5V0CG3-2 C/A SOT523

+3VALW +1.8VALW _AUDIO

CA50

1

2

UA4

1

VIN

VOUT

2

GND EN3NC

G9090-180TO1U_TSOT23-5

1

CA561U_0201_6.3V6M

CA5710U_0402_10VAK

CA550.1U_0201_6.3V6K

2

5

4

+1.8VALW_AUDIO

1

CA580.1U_0201_6.3V6K

CA591U_0201_6.3V6M

2

close to UA4 pinC6 close to UA4 pinF4

+3VALW

1

CA630.1U_0201_6.3V6K

CA641U_0201_6.3V6M

2

close to UA4 pinG6

+VBOOST_L_8.5V

1

CA670.1U_0201_16V6K

CA6522U_0805_16V6M

2

close to UA4 pinC1,C2

CA65 main:SE000016400 2nd:SE00000XH80

PIR16 SI: remove DA6,DA9

+1.8VALW_AUDIO

1

CA751U_0201_6.3V6M

CA740.1U_0201_6.3V6K

2

1

CA7610U_0402_10VAK

CA770.1U_0201_6.3V6K

CA781U_0201_6.3V6M

2

close to UA5 pinC6 close to UA5 pinF4

close to UA5 pinG6

3

@ESD@

DA8

SCA00002A00

1

+3VALW

1

CA820.1U_0201_6.3V6K

2

1

CA831U_0201_6.3V6M

2

SPK_OUT_R-

SPK_OUT_R+

+VBOOST_R_8.5V

1

CA860.1U_0201_16V6K

CA8422U_0805_16V6M

2

close to UA5 pinC1,C2

CA84 main:SE000016400 2nd:SE00000XH80

Title

Audio Front Speaker Amp:TAS2555

Size Document Number Rev

Custom

LA-F803P

Date: Sheet of

1

CA51 1U_0201_6.3V6M

2

1

2

1

2

Compal Electronics, Inc.

28 55Friday, June 08, 2018

1

28 55Friday, June 08, 2018

0.1

5

EC_RST#

EC_SMB_CK2 EC_SMB_DA2

EC_SMB_CK1 EC_SMB_DA1

SMB_CK2 SMB_DA2

SMB_CK2 (31)

SMB_DA2 (31)

SMB_BS_CLK (26,49 )

SMB_BS_DATA (26,49)

CK8 .1U_020 1_6.3V7K

@ESD@

SUB_EN(26)

EC_VCCST_PG_ R(9)

TBT_RST_ EC#(33)

BATT_SHIP#(26)

IR_GPIO(22)

EC_PCIE_WAKE#(23)

PLT_RST#

12

MUTE_LED_ OUT(30)

EC_KBRST#(7)

LPC_SERIRQ(7)

LPC_FRAME#(7)

LPC_AD3_R(7) LPC_AD2_R(7) LPC_AD1_R(7) LPC_AD0_R(7)

CLK_LPC_EC _R(7)

LPC_CLKRU N#(7)

KSI[0..7](30)

KSO[0..15](30)

TBTB_I2C_IRQ2Z(3 5) TBTC_I2C_IRQ2Z(36)

EC_SMB_CK1(41,42) EC_SMB_DA1(41,42) EC_SMB_CK2(35,36) EC_SMB_DA2(35,36)

PM_SLP_S3#(9,12,33,39)

SLP_SUS#(9)

PCH_SUSW ARN#(9)

E51TXD_P80D ATA(31) E51RXD_P80CL K(31)

PCH_PWR OK(9) AC_LED#(31) TP_EN(30)

PM_SLP_S4#(9,21)

10K_0201_5 %@

PWR_LED #

ON/OFF#

PLT_RST#(9,22,23,24,31,33 )

SUSACK#(9)

PBTN_OUT#(9 )

RK69

6 4

12

1 2

EC_SMB_CK2

EC_SMB_DA2

EC_SMB_CK2

EC_SMB_DA2

RK6 330K_0201_5 %@

+3VL_EC

CK4 .1U_ 0201_6.3V7K@

2014-09-25: Unpop RC for EC_RST# For KB9022, the ECRST# is internally pull-up to VCC via 40Kohm resistor, so you can remove external pull-up

D D

+3VL_EC

+3V_SMBUS

+3VS

C C

DMN63D8LV-7_ SOT563-6

PV: change PU + 3V_PRIM

DMN63D8LV-7_ SOT563-6

resistor and capacitor.

1 2

RK46 2.2K _0201_5%

1 2

RK43 2.2K _0201_5%

1 2

RK44 2.2K _0201_5%

1 2

RK45 2.2K _0201_5%

1 2

RK47 2.2K_0201_ 5%

1 2

RK48 2.2K_0201_ 5%

+3VS

1

S1

2

G1

D1

S2

5

G2

D2

3

QK3

+3V_PRIM

1

S1

2

G1

D1

S2

5

G2

D2

3

QK5

PIR9 SI: swaps pin for KB bac klight

PV: change net name from TS_I NT#_EC to SUB_ EN

SI:swap from pi n M9 to pin M7

B B

VCIN1_ACOK(42 )

A A

SI:Add TBT_RST_ EC#

VCIN1_ACOK VCIN1_AC_IN_R

1 2

@

RK29 0_0201_5 %

COMPAL confidential circuit for HP

5

4

+3VL

1 2

RK1

@

0_0603_5%

EC_SCI#(5)

2014-09-30: PM_SLP_S4# Change to from pin:84 to pin:123. PBTN_OUT# Change from pin:106 to 122. due to it needs to support BayTrial M 1.8V platform. This pin can support V1.8 power plan.

+3VALW

12

RC581

@

200_0201_ 1%

DC7

BAT54LPS-7_X2-D FN1006-2-2 SCS00 00AO00

DC8

BAT54LPS-7_X2-D FN1006-2-2 SCS00 00AO00

4

1

2

MUTE_LED_ OUT KBL_ON# EC_KBRST# LPC_SERIRQ LPC_FRAME# LPC_AD3_R LPC_AD2_R LPC_AD1_R LPC_AD0_R

CLK_LPC_EC _R PLT_RST# EC_RST# EC_SCI# LPC_CLKRU N#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3#

SUSACK# SLP_SUS# H_PROCHOT# _EC PCH_SUSW ARN# EC_VCCST_PG_ R

PCH_PWR OK AC_LED#

PBTN_OUT# PM_SLP_S4#

12

RK70 10K_0201_5 %@

2

A

2

A

1

0.1U_0201_6.3V6K

CK2

0.1U_0201_6.3V6K

2

PWR_LED #_PD (35,36)

+3VL_EC

CK3

UK1

M2

GATEA20/GPIO00

L2

KBRST#/GPIO01

M3

SERIRQ

K4

LPC_FRAME#

N3

LPC_AD3

M4

LPC_AD2

K5

LPC_AD1

N4

LPC_AD0

N5

CLK_PCI_EC

M5

PCIRST#/GPIO05

K13

EC_RST#

N6

EC_SCI#/GPIO0E

M6

CLKRUN#/GPIO1D

E9

KSI0/GPIO30

E12

KSI1/GPIO31

E13

KSI2/GPIO32

D12

KSI3/GPIO33

D13

KSI4/GPIO34

C12

KSI5/GPIO35

C13

KSI6/GPIO36

E10

KSI7/GPIO37

J13

KSO0/GPIO20

J12

KSO1/GPIO21

H12

KSO2/GPIO22

H13

KSO3/GPIO23

J10

KSO4/GPIO24

J9

KSO5/GPIO25

H9

KSO6/GPIO26

H10

KSO7/GPIO27

G13

KSO8/GPIO28

G12

KSO9/GPIO29

F13

KSO10/GPIO2A

F12

KSO11/GPIO2B

G10

KSO12/GPIO2C

G9

KSO13/GPIO2D

F10

KSO14/GPIO2E

F9

KSO15/GPIO2F

D9

KSO16/GPIO48

D10

KSO17/GPIO49

A8

EC_SMB_CK1/GPIO44

A7

EC_SMB_DA1/GPIO45

B8

EC_SMB_CK2/GPIO46

A6

EC_SMB_DA2/GPIO47

J5

PM_SLP_S3#/GPIO04

N9

PM_SLP_S5#/GPIO07

L13

EC_SMI#/GPIO08

K6

GPIO0A

N7

GPIO0B

M7

GPIO0C

N8

GPIO0D

K8

EC_INVT_PWM/GPIO11

M11

FANFB0/GPIO14

N11

FANFB1/GPIO15

K10

EC_TX/GPIO16

K9

EC_RX/GPIO17

N12

PCH_PWROK/GPIO18

M13

SUSP_LED#/GPIO19

L12

NUM_LED#/GPIO1A

HW Module OLB Define this function

J1

XCLKI/GPIO5D

K1

XCLKO/GPIO5E

KB9022GD_VFBGA124

SA000074G10

+3VL_EC

12

RK4 0_0402_5%

+EC_VCCLPC

LPC & MISC

Int. K/B Matrix

LK1 FBMA-L11-16080 8-800LMT_0603

1 2

J4

+3V_LID

+3VL_EC

K12

M12

J7

K7

EC_VCC0

EC_VDD/VCC

PWM Output

+EC_VCCA

B11

EC_VDD/VCC

EC_VDD/AVCC

BATT_TEMP/AD0/GPIO38

AD Input

DA Output

PS2 Interface

CPU1.5V_S3_GATE/GPXIOA00

SPI Device Interface

SPI Flash ROM

PECI_KB930/AD7/GPIO41

BATT_CHG_LED#/GPIO52

GPIO

BATT_LOW_LED#/GPIO55

SM Bus

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04 PROCHOT_IN/GPXIOA05

H_PROCHOT#_EC/GPXIOA06

VCOUT0_PH/GPXIOA07

GPO

GPIO

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

SA_PGOOD/GPXIOA11

GPI

PECI_KB9012/GPXIOD07

AGND

GND

GND0

G2

A11

N13

PIR2 SI: Add ty pe-C additiona l features by PD

@

1

K

@

1

K

ON/OFF#_988 (35)

ON/OFF#_987 (36)

3

+3VL_EC

RK2

1

CK1

0.1U_0201_6.3V6K

2

ECAGND

1

CK9

0.1U_0201_6.3V6K

2

PV: Add 0.1u

AD1/GPIO39

AD3/GPIO3B

AD4/GPIO42

BA0/GPIO3C DA1/GPIO3D DA2/GPIO3E DA3/GPIO3F

SPIDI/GPIO5B

GPXIOD06

V18R

M9 M8 M10 N10

B13 A13 B12 A12 D8 D7

B10 A9 A10 B9

D6 E7 E5 D5 A5 B5

B1 A1 C1 C2

K2 J2 L1 N2

B6 B7 B4 A4 B3 A3 A2 B2 H5 M1

D4 D1 D2 E2 E4 E1 F4 F2 F1

F5 G1 G5 H1 G4 H4 H2

N1

4.7U_0402_ 6.3V6M

PWM0/GPIO0F

PWM1/GPIO10 FANPWM0/GPIO12 FANPWM1/GPIO13

ADP_I/AD2/GPIO3A

IMON/AD5/GPIO43

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D PSCLK3/GPIO4E PSDAT3/GPIO4F

WOL_EN/GPXIOA01

ME_EN/GPXIOA02

VCIN0_PH/GPXIOD00

SPIDO/GPIO5C

SPICLK/GPIO58

SPICS#/GPIO5A

ENBKL/AD6/GPIO40

FSTCHG/GPIO50

CAPS_LED#/GPIO53

PWR_LED#/GPIO54

SYSON/GPIO56

VR_ON/GPIO57

PM_SLP_S4#/GPIO59

BKOFF#/GPXIOA08

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

20mil

LK2

ECAGND

FBMA-L11-16080 8-800LMT_0603

3

12

ECAGND (4 0)

10K_0201_5 %

NMI_DBG#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

100K_0201_ 1%

1 2

12

Board ID control

BOARD_ID

RK13 43K_0201_1 %

PIR31 SI: chang e from 15K to 27K

PV: change from 27K to 43K

PIR9 SI: swaps pin for KB bac klightPIR9 SI: swaps pin for KB bac klight

EC_BEEP#

PV: remove LID_ SW2#

B/I# HRESET_988 ADP_I BOARD_ID PM_SLP_S0# MUTE_LED_ IN

TS_STOP#_EC TS_RST#_E C VR_PWRGD EC_MUTE#

EC_SMB_CK3 EC_SMB_DA3 VR_ON AC_LED2# TP_CLK TP_DATA

SOC_ENBKL WLAN_PW R_EN ME_EN VCIN0_PH

EC_SPI_SO EC_SPI_SI EC_SPI_CLK EC_SPI_CS#0

EC_AMP_EAPD SYS_PWROK EC_AMP_RST# BAT_CHG_LED CAP_LOCK# PWR_LED # ACIN SYSON EC_RTC_R ST DPWROK_E C

EC_RSMRST#

VCIN1_PH

MAINPWON EC_BKOFF# BAT_CHG_LED2 PCH_PWR _EN RESET_987

VCIN1_AC_IN_R EC_ON ON/OFF# LID_SW# SUSP# NMI_DBG# EC_PECI

+V18R

CK6

+3VL_EC

RK22

SI:Rename from GPIO57 to EC_R TC_RST

1 2

RK16 43_0402_ 1%

RK17

@

1

2014-09-25: Add RK17 For 1.8V power plane: VCC_IO2 and VCC_LPC pull up +1.8VALW or +1.8VL(P). (ex: for Bay Trial M platform)

2

For 3.3V power plane: VCC_IO2 and VCC_LPC pull up +3.3VALW or +3.3VL(P).

12

2017/03/20 2020/03/20

KBL_ON# (30) EC_BEEP# (27) WWAN_S AR (26)

B/I# (41,42)

HRESET_988 (35 )

ADP_I (40,42)

PM_SLP_S0# (9,11,12,47,4 9) MUTE_LED_ IN (27 )

TS_STOP#_EC (22) TS_RST#_E C (22) VR_PWRGD (49) EC_MUTE# (27)

EC_SMB_CK3 (27 ,28) EC_SMB_DA3 (27 ,28) VR_ON (49) AC_LED2# (31) TP_CLK (3 0) TP_DATA (3 0)

SOC_ENBKL ( 5,22)

WLAN_PW R_EN (23 ) ME_EN (8 )

VCIN0_PH (40)

EC_SPI_SO (7) EC_SPI_SI (7)

EC_SPI_CS#0 (7)

EC_AMP_EAPD (27) SYS_PWROK (9) EC_AMP_RST# (28 )

BAT_CHG_LED (31) CAP_LOCK# (30)

PWR_LED # (31 ) ACIN (9) SYSON (12 ,21,44)

DPWROK_E C (9)

EC_RSMRST# (9 ) LID_SW1# (22) VCIN1_PH (40)

MAINPWON (43) EC_BKOFF# (22) BAT_CHG_LED2 (31) PCH_PWR _EN (12 ,39,45,46,48)

RESET_987 (36)

EC_ON (31,43)

ON/OFF# (31,36)

LID_SW# (3 1,36)

SUSP# (12,39,44,47)

12

0_0402_5%

DK2

21

LRB521S-40T 1G_SOD523-2-2

SCS0000810 0

Compal Secret Data

2

Board ID control for 13"

13"

DB

KBL-Y

PV: swap pin fo r right side L ED

PV: add right s ide LED

PV: swap pin fo r right side L ED

H_PECI (5 )

+3VL_EC

PIR12 SI: remov e RK18

NMI_DBG#_CPU (5)

Deciphered Date

2

+3VALW(12,13,23,24,25,28,30 ,33,34,38,39,43,44,45,4 7,48,49,50) +3VALW_TP(30) +3VL(13,22,31,33,35 ,36,41,42,43) +3VL_EC(40) +3VS(5,7,9,10,11,24,27 ,31,36,37,39,47,48)

+5VS(27,30,39)

+3V_SMBUS(31)

SI

PV MV

27K ohm 43K ohm

PROCHOT#(42)

EC_RTC_R ST

EC_SPI_CLK

1

+3VALW +3VALW_TP +3VL +3VL_EC +3VS

+5VS

+3V_SMBUS

75 ohm15K ohm

TP_CLK

TP_DATA

H_PROCHOT# _EC

MUTE_LED_ OUT

MUTE_LED_ IN

ACIN

CK5 100P_ 0201_50V8J

RK63 0_02 01_5%@

RK25 0_02 01_5%@

RK65 10 0K_0201_1%

RK64 10K_ 0201_5%@

1 2

RK7 4.7K_ 0201_5%

1 2

RK8 4.7K_ 0201_5%

12

1 2

H_PROCHOT# (5,49)

+5VS

PIR11 SI: un-po p RK64

1

S1

2

G1

6

D1

4

S2

5

G2

RK49

10K_0201_5%

12

1 2

RK54

EMI@

BATT_SHIP#

Title

EC ENE-KB9022

Size Document Number Rev

Custom

Date: Sheet of

D2

12

RK50

10K_0201_5%

3

15_0201_1 %

10P_0201_2 5V8

2

CK7

1

@EMI@

RK66 1M_ 0201_5%

SUSP#

RK30 100K_0201 _5%@

EC_ON PCH_PWR _EN

PV: delete RK60

E51TXD_P80D ATA

Compal Electronics, Inc.

LA-F803P

SOC_RTCRST # (9)

DMN63D8LV-7_ SOT563-6 QK4

SOC_SRTCRS T# (9)

EC_SPI_CLK_R (7)

1 2

RK58 100K_0201_ 5%

1 2

RK59 100K_0201_ 5%

1 2

RK61 100K_0201_ 5%

29 55Friday, June 08 , 2018

1

29 55Friday, June 08 , 2018

+3VALW_TP

0.1

5

+3VALW _TP

R26

2.2K_020 1_5%

+3V_PRIM

D D

DMN63D8 LV-7_SOT563-6

+3VALW

1

S1

2

G1

6

D1

4

S2

5

G2

D2

3

Q2

1 2

R5803 0_0402_5%

1 2

R27

2.2K_020 1_5%

1 2

+3VALW _TP

TP_SMBD AT

TP_SMBC LK

+3VALW _TP

0.1U_0201_6.3V6K

1

2

PCH_SMBus(+3V_PRIM)

SOC_SMB DATA (7)

SOC_SMB CLK (7) I2C_0_SDA (10 )

2

C49

CC371

0.1U_0201_10V6K

1

@RF@

+3VALW _TP

Touch pad conn

DC6

TP_DATA TP_CLK

TP_SMBC LK TP_SMBD AT

SCS0000 8100

TP_INT#_R TP_EN

1

RF@

C5243 10P_020 1_25V8

2

C C

Check RC1.

100K_0201_5%

12

TP_CLK

B B

R5798

TP_EN

EC PS2

TP_INT#(5) TP_EN(29)

1

RF@

C5236 10P_020 1_25V8

2

TP_DATA(29 ) TP_CLK(29)

@

2 1

LRB521S -40T1G_SOD523 -2-2

TP_DATA TP_SM BCLK TP_SMBDAT

1

RF@

C5242 10P_020 1_25V8

2

4

CONN@

ACES_51 539-0080M-001

10

GND

9

GND

8

7

6

5

4

3

2

1

JTP1

ACES_51 539-0080M-001_ 8P-T

PV: change symbol

1

RF@

C5244 10P_020 1_25V8

2

+3V_PRIM

DMN63D8 LV-7_SOT563-6

Q3

ESD request, change to SOT523

L03ESDL 5V0CG3-2 C/A SOT 523

2

5

@

2.2K_020 1_5%

1

S1

G1

D1

S2

G2

D2

3

1

6 4

ESD@

3

+3V_PRIM

@

R28

D8

2

3

D9

2

3

D7

2

3

1 2

TP_EN

TP_INT#_R

TP_DATA

TP_CLK

TP_SMBC LK

TP_SMBD AT

@

R29

2.2K_020 1_5%

PCH_I2C

I2C_0_SCL (10 )

TP_SMBC LK

TP_SMBD AT

KSI[0..7](29)

KSO[0..15](29)

PIR4 SI: From 1.3K to 1.8K

CAP_LOC K#(29 )

2

+3VALW(12,13,23,2 4,25,28,29,33,34,38 ,39,43,44,45,47,48 ,49,50) +3V_PRIM(5,7,8,9,10,1 1,12,13,24,25,26,29 ,33) +5VS(27,29 ,39) +5VALW(1 2,27,28,31,35,36,39 ,43,46) +3VS(5,7,9,10,11 ,24,27,29,31,36,37,3 9,47,48)

KSI7 KSI6 KSI5 KSI4 KSI3 KSI2 KSI1 KSI0

KSO15 KSO14 KSO13 KSO12 KSO11 KSO10

KSO9 KSO8 KSO7 KSO6 KSO5 KSO4 KSO3 KSO2 KSO1

KSO0

1 2

+5VS

C158100p_02 01_25V @ESD@

C157100p_02 01_25V @ESD@

1 2

MUTE_LE D_CTL MU TE_LED_R

R30 1.8 K_0402_1%

1 2

R31 3.3 K_0201_5%

Delete pin30,31 connection

KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15

CAP_LOC K#_R

MUTE_LE D_R

1

Keyboard conn

CVILU_CF5 532FD0R1-05-NH

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

G1

34

G2

JKB1

CONN@

+3VALW +3V_PRIM +5VS +5VALW +3VS

ESD request, change 0.1u

KB backlight Conn

+5VS

12

R34

+5VS

R5806 0_0603_ 5%

1 2

JKBL1

1

A A

KBL_ON_ GND

+5VS_KB

2 3 4

5 6

1 2 3 4

GND GND

JXT_FP2 72H-004G100M

CONN@ SP01002 GE00

COMPAL confidential circuit for HP

5

100K_02 01_5%

KBL_ON_ GND

Q1

1

AO3416L 1N SOT-23-3

KBL_ON High : Turn ON Low : Turn OFF

2

3

KBL_ON# (29)

PV: for EC control KBL PWM

Security Class ification

2017/03/ 20 2020/03/ 20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/03/ 20 2020/03/ 20

3

Compal Secret Data

Deciphered Date

MUTE_LE D_OUT(29)

2

RA68

1 2

0_0201_ 5%

Title

Size Document N umber Rev

Custom

Date: Sheet of

MUTE_LE D_CTL

Compal Electronics, Inc.

KB/TP/DB

LA-F803P

30 55Friday, June 08, 20 18

1

0.1

A

Power Button Conn(TBD)

B

C

D

+5VS(27,29,30,3 9) +3VS(5,7,9,1 0,11,24,27,29,36,37 ,39,47,48) +3VL(13,22,29,3 3,35,36,41,42,43) +3V_LID(13,29,4 1)

+5VS +3VS +3VL +3V_LID

E

Function Field:29.5

1 1

Debug Card Power

+3V_LID+3VS

+3VL +3V_LID

+5VALW

CONN@

JPW R

1

3

5

ON/OFF#_ R

1 2

RC522 0_0603_ 5%@

2 2

+3V_LID

LID_SW#_OUT

+3V_SMBUS

+8.4V

+3VL

ON/OFF#(29,36)

5

7

7 9910

GND11GND GND13GND

PANAS_A XT510124

SP02130 7180

R5804

100K_04 02_5%

ON/OFF#

2

4

6

8

10

12 14

12

1

+3VL+3V_LID

2

3

QC5

PJE138K 1N SOT-523-3

PWR_ LED# (29) E51TXD_ P80DATA (29 ) E51RXD_ P80CLK (29) PLT_RST # (9,22,23,24 ,29,33)

ON/OFF#_ R

PIR22 SI: Add CC405~CC410

+3VL +3V_ LID

1

2

CC406

RF@

CC407

RF@

0.1U_0201_6.3V6K

2

CC405

RF@

68P_0201_50V8J

D2

2 1

LRB521S -40T1G_SOD523 -2-2

SCS0000 8100

1

CC408

RF@

68P_0201_50V8J

2

1

CC409

RF@

68P_0201_50V8J

0.1U_0201_6.3V6K

2

CC410

RF@

1

0.1U_0201_6.3V6K

2

Unlock Storage mode by Lid open w/o AC.

Storage mode circuit

3 3

+3V_LID

1 2

R5801 200K_0201 _5%

SA0000A RR00

APX8132 HAI-TRG_SOT23-3

VDD2VOUT

UH2

GND

1

C5229

0.1U_020 1_6.3V6K

2

Charger LED

PIR3 SI: From 560 to 1.91K

10 mil

AC_LED#(2 9)

BAT_CHG _LED(29 )

PV: change erom 220 ohm to 825 ohm

AC_LED2 #(29)

BAT_CHG _LED2(29)

PV: add right side LED

1 2

3

C5228

10P_020 1_25V8

R381.91K_0402 _1%

12

R39825_0402_ 1%

R58081.91K_04 02_1%

12

R5807825_040 2_1%

LID_SW #

1

2

Side Light White: Vf=2.8~3.3V

LED1

Amber: Vf=1.8~2.0V

White

2

3

2

3

left side

1

Amber

HT-210UD 5-BP5_AMBER-W HITE

SC50000 7E00

LED2

White

right side

1

Amber

HT-210UD 5-BP5_AMBER-W HITE

SC50000 7E00

LID_SW # (29,36)

+5VL

10 mil

+5VL

10 mil

Address : 1001_101xb

+3VS

3300P_0201_16V7K

C

2

QT1

QT2

B

E

3 1

C

2

B

E

3 1

C

MMBT390 4WH_SOT32 3-3

SB00000 8E10

D17

EC_ON(29 ,43)

4 4

+3VL

A

2 1

LRB521S -40T1G_SOD523 -2-2

SCS0000 8100

D4

2 1

LRB521S -40T1G_SOD523 -2-2

SCS0000 8100

COMPAL confidential circuit for HP

+3V_SMB US

1

2

5.6P_0402_50V CC172

@RF@

B

MMBT390 4WH_SOT32 3-3

SB00000 8E10

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CC133

1

2

3300P_0201_16V7K

CC134

1

2

THERM_D P1

THERM_D N1

THERM_D P2

THERM_D N2

10mil

Compal Secret Data

UC14

1

VCC

2

DP1

3

DN1

4

DP2

5

DN2

F75303M _MSOP10

Deciphered Date

SCL

SDA

ALERT#

THERM#

GND

10

9

8

7

6

SMB_CK2 (29)

SMB_DA2 (29)

+3VS

0.1U_0201_6.3V6K CC279

1

2

FF:27.1

THERMAL SENSOR

Thermal sensor SMBus address -->100-1_100xb : 0x48

Compal Electronics, Inc.

Title

2020/03/202017/03/20

D

Title

Size Document N umber Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

LID/LED

LA-F803P

31 55Friday, June 08, 20 18

E

0.1

5

4

3

2

1

Remove HP2DC

D D

C C

Shielding Can Clip

CONN@

CLIP1 HOLEA

1

CONN@

CLIP11 HOLEA

1

CONN@

CLIP21 HOLEA

1

CONN@

CLIP31 HOLEA

1

CONN@

CLIP41 HOLEA

1

CONN@

CLIP2 HOLEA

1

CONN@

CLIP12 HOLEA

1

CONN@

CLIP22 HOLEA

1

CONN@

CLIP32 HOLEA

1

CONN@

CLIP42 HOLEA

1

CONN@

CLIP3 HOLEA

1

CONN@

CLIP13 HOLEA

1

CONN@

CLIP23 HOLEA

1

CONN@

CLIP33 HOLEA

1

CONN@

CLIP43 HOLEA

1

CONN@

CLIP4 HOLEA

1

CONN@

CLIP14 HOLEA

1

CONN@

CLIP24 HOLEA

1

CONN@

CLIP34 HOLEA

1

CONN@

CLIP44 HOLEA

1

CONN@

CLIP5 HOLEA

1

CONN@

CLIP15 HOLEA

1

CONN@

CLIP25 HOLEA

1

CONN@

CLIP35 HOLEA

1

CONN@

CLIP6 HOLEA

1

CONN@

CLIP16 HOLEA

1

CONN@

CLIP26 HOLEA

1

CONN@

CLIP36 HOLEA

1

CONN@

CLIP7 HOLEA

1

CONN@

CLIP17 HOLEA

1

CONN@

CLIP27 HOLEA

1

CONN@

CLIP37 HOLEA

1

CONN@

CLIP8 HOLEA

1

CONN@

CLIP18 HOLEA

1

CONN@

CLIP28 HOLEA

1

CONN@

CLIP38 HOLEA

1

CONN@

CLIP9 HOLEA

1

CONN@

CLIP19 HOLEA

1

CONN@

CLIP29 HOLEA

1

CONN@

CLIP39 HOLEA

1

CONN@

CLIP10 HOLEA

1

CONN@

CLIP20 HOLEA

1

CONN@

CLIP30 HOLEA

1

CONN@

CLIP40 HOLEA

1

B B

CPU

H1

H2

H_3P7

HOLEA

@

1

SSD

H3

@

H_3P7

HOLEA

1

@

A A

H_3P7

HOLEA

1

H13

H_3P2

HOLEA

1

@

H5

H_3P7

HOLEA

1

H12

H_3P2X4 P0

HOLEA

@

1

H4

H_4P2

HOLEA

@

Type-C

1

@

H7

H_3P2X4 P0

HOLEA

@

1

H17

H_3P7

HOLEA

1

COMPAL confidential circuit for HP

5

Screw Hole

WLAN

H6

H_3P7

HOLEA

@

1

TBT

H14

H15

H_3P2

H_3P2X4 P0

HOLEA

@

1

4

@

H8

H_4P5

HOLEA

1

@

H9

H_4P5

HOLEA

1

Hinge

FD1

H11

H_4P5

HOLEA

@

1

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

@

1

FIDUCIAL_C40 M80

FD3

@

1

FIDUCIAL_C40 M80

2017/03/ 20 2020/03/ 20

3

@

H10

H_4P5

HOLEA

FD2

@

1

FIDUCIAL_C40 M80

FD4

@

1

FIDUCIAL_C40 M80

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

TPM/G-SENSOR/13"Screw hole

LA-F803P

32 55Friday, June 08, 20 18

1

0.1

5

4

3

2

1

+VCC3V3_S0_TBT(34)

T358 PAD@

1 2

TBT_EE_CLK

TBT_SNK0_DDC_CLK

TBT_SNK0_DDC_DATA

TBT_SNK1_DDC_CLK

TBT_SNK1_DDC_DATA

TBT_FORCE_PWR

TBT_TMU_CLK_OUT

SOC_DP1_HPD

SOC_DP2_HPD

TBT_A_LSTX

TBT_A_HPD

TBT_A_LSRX

TBT_B_LSTX

TBT_B_HPD

TBT_B_LSRX

+3V_TBTB_PDLDO(35)

PCIE_CRX_TTX_P1 (11) PCIE_CRX_TTX_N1 (11)

PCIE_CRX_TTX_P2 (11) PCIE_CRX_TTX_N2 (11)

PCIE_CRX_TTX_P3 (11) PCIE_CRX_TTX_N3 (11)

PCIE_CRX_TTX_P4 (11) PCIE_CRX_TTX_N4 (11)

TBT_DP_ML0_P_C (37) TBT_DP_ML0_N_C (37)

TBT_DP_ML1_P_C (37) TBT_DP_ML1_N_C (37)

TBT_DP_ML2_P_C (37) TBT_DP_ML2_N_C (37)

TBT_DP_ML3_P_C (37) TBT_DP_ML3_N_C (37)

TBT_DP_AUX_P_C (37) TBT_DP_AUX_N_C (37)

TBT_DPSRC_HPD (36,37)

TBT_I2C_SDA (35)

TBT_I2C_SCL (35)

TBT_WAKE# (7)

TBT_CIO_PLUG_EVENT# (10)

TBT_I2C_INT (35) RTD3_USB_PWR_EN (8) TBT_FORCE_PWR (10) PM_BATLOW# (10) PM_SLP_S3# (9,12,29,39) RTD3_CIO_PWR_EN (10)

TBT_EE_DI (35)

TBT_EE_DO (35)

TBT_EE_CS_N (35)

TBT_EE_CLK (35)

TBT_B_TRX_R_DTX_P2 (38) TBT_B_TRX_R_DTX_N2 (38)

TBT_B_TTX_C_DRX_P2 (38)

TBT_B_TTX_C_DRX_N2 (38)

TBT_B_TTX_C_DRX_P1 (38)

TBT_B_TTX_C_DRX_N1 (38)

TBT_B_TRX_R_DTX_P1 (38) TBT_B_TRX_R_DTX_N1 (38)

TBT_B_SUB1_C (38) TBT_B_SUB2_C (38)

Delete

RT1101 100K_0201_5%

RT1100 100K_0201_5%

RT19 100K_0201_5%

RT20 100K_0201_5%

RT49 10K_0201_5%

RT81 100K_0201_5%

RT27 100K_0201_5%

RT28 100K_0201_5%

RT29 1M_0201_5%

RT30 100K_0201_5%

RT31 1M_0201_5%

RT32 1M_0201_5%

RT33 100K_0201_5%

RT34 1M_0201_5%

1 2

To TPS65988

From TPS65988

TBT_XTAL_25_OUT TBT_XTAL_25_OUT_R

JTAG

D D

C C

B B

+3VALW

TBT_TDI

TBT_TMS

TBT_TCK

TBT_TDO

1

CT41

2

0.1U_0402_16V4Z

TBT_SRC_CFG1

DP/HDMI CONFIGU RATION

TBT_SRC_CFG1 TBT_DPSRC_HPD

NOTE: ASSEMBLE RT35 & RT36 if DPSRC NOT IN USE

TBT_A_SUB2_C

TBT_B_SUB2_C

TBT_A_SUB1_C

TBT_B_SUB1_C

+3VALW_LC

RT1

12

RT4

RT3

RT2

1 2

10K_0201_5%

+TBT_PU_RAIL+3VL

12

RT5910_0402_5% short@

12

RT5920_0402_5% @

3.3K_0402_1%

RT41

3.3K_0402_1%

RT42

3.3K_0402_1%

12

TBT_EE_CS_N TBT_EE_DO TBT_EE_WP_N

1 2

RT755 10K_0201_5%@

PULL UP - HDMI MODE

RT35 1M_0201_5% RT36 1M_0201_5%

RT756 100K_0201_5%@

1 2

10K_0201_5%

From TPS65988

RT43

+TBT_PU_RAIL

1 2 1 2

1 2

TBT_HDMI_DDC_DATA TBT_HDMI_DDC_CLK RTD3_USB_PWR_EN_R

RTD3_CIO_PWR_EN_R

TBT_I2C_SDA TBT_I2C_SCL TBTA_I2C_INT TBT_I2C_INT

PM_SLP_S3# TBT_WAKE# TBT_CIO_PLUG_EVENT#

UT2

1

CS#

2

DO(IO1)

HOLD#(IO3)

3

WP#(IO2)

4

GND

thermal pad

W25Q80DVZPIG_WSON8

SA00008DZ00

+3V_TBTB_PDLDO

12

RT764100K_0201_5%

12

RT765100K_0201_5%

12

RT766100K_0201_5%

12

RT767100K_0201_5%

RT84 100K_0201_5% RT85 100K_0201_5%

RT1103 10K_0201_5%

RT1105 10K_0201_5%@

RT21 RT22

RT23 10K_0201_5% RT24 10K_0201_5%@

RT40 10K_0201_5%@

1 2

RT47 10K_0201_5%

1 2

RT48 10K_0201_5%@

PIR4 PV: RT48 un-pop

RF@

1 2

CT312 10P_0201_25V8

+3V_TBTB_PDLDO

8

VCC

TBT_HOLD_N

7

TBT_EE_CLK

6

CLK

TBT_EE_DI

5

DI(IO0)

9

12 12 12

12

2.2K_0201_1%

12

2.2K_0201_1%

12 12

12

3.3K_0402_1%

12

RT44

20P_0201_25V8

1

CT219

2

Change to SJ10000I800

+TBT_PU_RAIL

+3VL

RT47 follow intel checklist

JTYPEC2

90ohm 90ohm

UH4

TBT_RST#

4

SOC_DP1_AUXP(5) SOC_DP1_AUXN(5)

SOC_DP1_HPD(5)

SOC_DP2_AUXP(5) SOC_DP2_AUXN(5)

SOC_DP2_HPD(5)

+3V_PRIM

O

5

P

B

A

G

3

100K_0201_5%

PCIE_CTX_TRX_P1(11) PCIE_CTX_TRX_N1(11)

PCIE_CTX_TRX_P2(11) PCIE_CTX_TRX_N2(11)

PCIE_CTX_TRX_P3(11) PCIE_CTX_TRX_N3(11)

PCIE_CTX_TRX_P4(11) PCIE_CTX_TRX_N4(11)

CLKREQ_PCIE#4(9)

TBT_A_TRX_R_DTX_P2(38) TBT_A_TRX_R_DTX_N2(38)

TBT_A_TTX_C_DRX_P2(38) TBT_A_TTX_C_DRX_N2(38)

TBT_A_TTX_C_DRX_P1(38) TBT_A_TTX_C_DRX_N1(38)

TBT_A_TRX_R_DTX_P1(38) TBT_A_TRX_R_DTX_N1(38)

TBT_A_SUB1_C(38) TBT_A_SUB2_C(38)

TC7SH08FU_SSOP5

1

2

RH474

Crystal

3

OUT

GND

2

GND

25MHZ_10PF_8Y25000010

CLK_PCIE_P4(9) CLK_PCIE_N4(9)

SOC_DP1_P0(5) SOC_DP1_N0(5)

SOC_DP1_P1(5) SOC_DP1_N1(5)

SOC_DP1_P2(5) SOC_DP1_N2(5)

SOC_DP1_P3(5) SOC_DP1_N3(5)

SOC_DP1_AUXP SOC_DP1_AUXN

SOC_DP2_P0(5) SOC_DP2_N0(5)

SOC_DP2_P1(5) SOC_DP2_N1(5)

SOC_DP2_P2(5) SOC_DP2_N2(5)

SOC_DP2_P3(5) SOC_DP2_N3(5)

SOC_DP2_AUXP

PIR25 SI: Change size

12

YT2

4

1

IN

20P_0201_25V8

1

CT220

2

1 2

CT300 0.22U_0201 _6.3V6M

1 2

CT301 0.22U_0201 _6.3V6M

1 2

CT302 0.22U_0201 _6.3V6M

1 2

CT303 0.22U_0201 _6.3V6M

1 2

CT304 0.22U_0201 _6.3V6M

1 2

CT305 0.22U_0201 _6.3V6M

1 2

CT306 0.22U_0201 _6.3V6M

1 2

CT307 0.22U_0201 _6.3V6M

1 2

CT15 0.1U_0201_10V6K

1 2

CT16 0.1U_0201_10V6K

1 2

CT4 0.1U_0201_10V6K

1 2

CT18 0.1U_0201_10V6K

1 2

CT6 0.1U_0201_10V6K

1 2

CT7 0.1U_0201_10V6K

1 2

CT8 0.1U_0201_10V6K

1 2

CT23 0.1U_0201_10V6K

1 2

CT25 0.1U_0201_10V6K

1 2

CT28 0.1U_0201_10V6K

1 2

CT31 0.1U_0201_10V6K

1 2

CT32 0.1U_0201_10V6K

1 2

CT33 0.1U_0201_10V6K

1 2

CT34 0.1U_0201_10V6K

1 2

CT35 0.1U_0201_10V6K

1 2

CT36 0.1U_0201_10V6K

1 2

CT37 0.1U_0201_10V6K

1 2

CT38 0.1U_0201_10V6K

1 2

CT39 0.1U_0201_10V6K

1 2

CT40 0.1U_0201_10V6K

RT11 14K_0201_1%

RT12 4.75K_0201_0.5%

1 2

CT42 0.22U_0201_25V5K

1 2

CT44 0.22U_0201_25V5K

1 2

CT46 0.22U_0201_25V5K

1 2

CT49 0.22U_0201_25V5K

1 2

CT51 0.1U_0201_10V6K

1 2

CT53 0.1U_0201_10V6K

TBT_A_LSTX(38)

TBT_A_LSRX(38) TBT_A_HPD(35)

RT16 499_0201_1%

PLT_RST# (9,22,23,24,29,31)

PCH_TBT_RST# (7)

TBT_XTAL_25_IN

SOC_DP1_P0_C SOC_DP1_N0_CCLKREQ_PCIE#4

SOC_DP1_P1_C SOC_DP1_N1_C

SOC_DP1_P2_C SOC_DP1_N2_C

SOC_DP1_P3_C SOC_DP1_N3_C

SOC_DP1_AUXP_C SOC_DP1_AUXN_C

TBT_SNK0_DDC_CLK TBT_SNK0_DDC_DATA

SOC_DP2_P0_C SOC_DP2_N0_C

SOC_DP2_P1_C SOC_DP2_N1_C

SOC_DP2_P2_C SOC_DP2_N2_C

SOC_DP2_P3_C SOC_DP2_N3_C

SOC_DP2_AUXP_C SOC_DP2_AUXN_CSOC_DP2_AUXN

TBT_SNK1_DDC_CLK TBT_SNK1_DDC_DATA

1 2

TBT_TDI TBT_TMS TBT_TCK TBT_TDO

1 2

PV: remove 0ohm PV: remove 0ohm

PV: remove 0ohm

1 2

PV: for RTD3 function

A A

RT55

EMI@

RT80

EMI@

PCIE_CTX_C_TRX_P1 PCIE_CTX_C_TRX_N1

PCIE_CTX_C_TRX_P2 PCIE_CTX_C_TRX_N2

PCIE_CTX_C_TRX_P3 PCIE_CTX_C_TRX_N3

PCIE_CTX_C_TRX_P4 PCIE_CTX_C_TRX_N4

CLKREQ_PCIE#4

DPSNK_RBIAS

TBT_RBIAS TBT_RSENSE

TBT_A_TTX_DRX_P2 TBT_A_TTX_DRX_N2

TBT_A_TTX_DRX_P1 TBT_A_TTX_DRX_N1

TBT_A_SUB1 TBT_A_SUB2

PA_USB2_RBIAS

TBT_RESET#

12

33_0201_5%

12

33_0201_5%

Y23 Y22

T23 T22

M23 M22

H23 H22

V19 T19

AC5

AB7 AC7

AB9 AC9

AB11 AC11

AB13 AC13

Y11

W11

AA2

AB15 AC15

AB17 AC17

AB19 AC19

AB21 AC21

Y12

W12

Y18

W4

A15 B15

A17 B17

A19 B19

B21 A21

Y15

W15

E20

D20

M4

H19

AC23 AB23

V18

AC1

L15

N15

C23 C22

Y5 R4

Y6

Y8 N4

Y4 V4 T4

H6 J6

A5 A4

+3VALW

TBT_XTAL_25_IN_R

PCIE_RX0_P PCIE_RX0_N

PCIE_RX1_P PCIE_RX1_N

PCIE_RX2_P PCIE_RX2_N

PCIE_RX3_P PCIE_RX3_N

PCIE_REFCLK_100_IN_P PCIE_REFCLK_100_IN_N PCIE_CLKREQ_N

DPSNK0_ML0_P DPSNK0_ML0_N

DPSNK0_ML1_P DPSNK0_ML1_N

DPSNK0_ML2_P DPSNK0_ML2_N

DPSNK0_ML3_P DPSNK0_ML3_N

DPSNK0_AUX_P DPSNK0_AUX_N

DPSNK0_HPD

DPSNK0_DDC_CLK DPSNK0_DDC_DATA

DPSNK1_ML0_P DPSNK1_ML0_N

DPSNK1_ML1_P DPSNK1_ML1_N

DPSNK1_ML2_P DPSNK1_ML2_N

DPSNK1_ML3_P DPSNK1_ML3_N

DPSNK1_AUX_P DPSNK1_AUX_N

DPSNK1_HPD

DPSNK1_DDC_CLK DPSNK1_DDC_DATA

DPSNK_RBIAS

TDI TMS TCK TDO

RBIAS RSENSE

PA_RX1_P PA_RX1_N

PA_TX1_P PA_TX1_N

PA_TX0_P PA_TX0_N

PA_RX0_P PA_RX0_N

PA_DPSRC_AUX_P PA_DPSRC_AUX_N

PA_USB2_D_P PA_USB2_D_N

PA_LSTX PA_LSRX PA_DPSRC_HPD

PA_USB2_RBIAS

THERMDA THERMDA

PCIE_ATEST

TEST_EDM

FUSE_VQPS_64 FUSE_VQPS_128

MONDC_CIO_0 MONDC_CIO_1

UT1A

SA00009ZV30

RT1110 10K_0201_5%

1 2

2 1

LRB521S-40T1G_SOD523-2-2

SCS00008100

IC:46.1 FF:46.2

PCIE_TX0_P PCIE_TX0_N

PCIE_TX1_P PCIE_TX1_N

PCIE_TX2_P PCIE_TX2_N

PCIE_TX3_P PCIE_TX3_N

PCIe GEN3

PERST_N

PCIE_RBIAS

DPSRC_ML0_P

DPSRC_ML0_N

DPSRC_ML1_P

DPSRC_ML1_N

DPSRC_ML2_P

DPSRC_ML2_N

DPSRC_ML3_P

DPSRC_ML3_N

DPSRC_AUX_P

SINK PORT 0

DPSRC_AUX_N

SOURCE PORT 0

DPSRC_HPD

DPSRC_RBIAS

GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6

LC GPIOPOC GPIO

GPIO_7

GPIO_8 POC_GPIO_0 POC_GPIO_1 POC_GPIO_2 POC_GPIO_3 POC_GPIO_4 POC_GPIO_5

SINK PORT 1

POC_GPIO_6

TEST_EN

TEST_PWR_GOOD

Misc

RESET_N

XTAL_25_IN

TBT PORTS

XTAL_25_OUT

PB_DPSRC_AUX_P

PB_DPSRC_AUX_N

PORT B

PB_USB2_D_P PB_USB2_D_N

POC

PB_DPSRC_HPD

PB_USB2_RBIAS

MONDC_SVR

USB2_ATEST

MONDC_DPSNK_0

MONDC_DPSNK_1

MONDC_DPSRC

RT825 0_0201_ 5%

EE_CS_N

PB_RX1_P PB_RX1_N

PB_TX1_P PB_TX1_N

PB_TX0_P PB_TX0_N

PB_RX0_P PB_RX0_N

PB_LSTX PB_LSRX

ATEST_P ATEST_N

@

EE_DI

EE_DO

EE_CLK

12

MISC

Port A

POC

DEBUG

DT19

V22

P23 P22

K23 K22

F23 F22

L4

N16

R2 R1

N2 N1

L2 L1

J2 J1

W19 Y19

G1

N6

U1 U2 V1 V2 W1 W2 Y1 Y2 AA1 J4 E2 D4 H4 F2 D2 F1

E1

AB5

F4

D22 D23

AB3 AC4 AC3 AB4

B7 A7

A9 B9

A11 B11

A13 B13

Y16 W16

E19 D19

B4 B5 G2

F19

D6

A23 B23

E18

W13

W18

AB2

PCIe_RBIAS

TBT_XTAL_25_IN_R TBT_XTAL_25_OUT_R

TBT_EE_DI TBT_EE_DO TBT_EE_CS_N TBT_EE_CLK_R

PB_USB2_RBIAS

PCIE_CRX_C_TTX_N1

PCIE_CRX_C_TTX_P2 PCIE_CRX_C_TTX_N2

PCIE_CRX_C_TTX_P3 PCIE_CRX_C_TTX_N3

PCIE_CRX_C_TTX_P4 PCIE_CRX_C_TTX_N4

TBT_RST#

RT5 3.01K_0201_1%

TBT_DP_AUX_P TBT_DP_AUX_N

TBT_DPSRC_HPD

DPSRC_RBIAS

TBT_I2C_SDA TBT_I2C_SCL TBT_EE_WP_N TBT_TMU_CLK_OUT

RT582 0_0201_5%@

TBT_CIO_PLUG_EVENT# TBT_HDMI_DDC_DATA TBT_HDMI_DDC_CLK TBT_SRC_CFG1 TBTA_I2C_INT TBT_I2C_INT RTD3_USB_PWR_EN_R TBT_FORCE_PWR

RT584 0_0201_5%@ RT583 0_0201_5%@

RTD3_CIO_PWR_EN_R

TBT_TEST_EN

TBT_TEST_PWG

TBT_RESET#

TBT_B_TTX_DRX_P2 TBT_B_TTX_DRX_N2

TBT_B_TTX_DRX_P1 TBT_B_TTX_DRX_N1

TBT_B_SUB1 TBT_B_SUB2

TBT_RESET_N (35)

TBT_RST_EC# (29)

PCIE_CRX_C_TTX_P1

V23

1 2

CT9 0.22U_0201_6.3V6M

1 2

CT10 0.22U_0201_6.3V6M

1 2

CT1 0.22U_0201_6.3V6M

1 2

CT11 0.22U_0201_6.3V6M

1 2

CT12 0.22U_0201_6.3V6M

1 2

CT13 0.22U_0201_6.3V6M

1 2

CT2 0.22U_0201_6.3V6M

1 2

CT14 0.22U_0201_6.3V6M

1 2

PV: remove AR side 0.1u Cap

1 2

CT327 0.1U_0201_ 10V6K

1 2

CT321 0.1U_0201_ 10V6K

1 2

RT7 14K_0201_1%

12

RT1102 0_0201_5%

12 12

RT1104 0_0201_5%

1 2

RT9 100_0201_1%

1 2

RT10 100_0201_1%

12

RT13 0_0402_5%

EMI@

1 2

CT43 0.22U_0201_25V5K

1 2

CT45 0.22U_0201_25V5K

1 2

CT47 0.22U_0201_25V5K

1 2

CT50 0.22U_0201_25V5K

PV: remove 0ohm

1 2

CT52 0.1U_0201_10V6K

1 2

CT54 0.1U_0201_10V6K

TBT_B_LSTX (38) TBT_B_LSRX (38) TBT_B_HPD (35)

1 2

RT17 499_0201_1%

+VCC3V3_S0_TBT +3V_TBTB_PDLDO

For TUSB546A

TBTA_I2C_INT

TBT_I2C_INT

TBT_EE_CLK

CT48

10P_0402_50V8J

EMI request

JTYPEC1

12

RT823 0_0201_5%

1

2

@EMI@

COMPAL confidential circuit for HP

5

4

3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/03/20 2020/03/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Thunderbolt Alpinerid (1/2)

Size Document Number Rev

Custom

LA-F803P

Date: Sheet of

1

33 55Friday, June 08, 2018

0.1

5

+V0P9_DP

0.9V @ 700mA

1U_0201_6.3VM

1

2

D D

+V0P9_PCIE

0.9V @ 580mA

1U_0201_6.3VM

1

2

1U_0201_6.3VM

CT56

CT55

1

2

1U_0201_6.3VM

CT91

CT92

1

2

1U_0201_6.3VM

CT58

CT57

1

2

1U_0201_6.3VM

68P_0201_50V8J

CT93

CT151

1

2

1U_0201_6.3VM

CT59

CT299

CT65

CT60

1

2

RF@

SI:RF request

+V0P9_USB

0.9V @ 220mA

1U_0201_6.3VM

CT75

CT74

1

2

+V0P9_CIO

2

0.9V @ 280mA

1U_0201_6.3VM

CT105

1

2

1U_0201_6.3VM

CT107

CT106

1

2

+3VALW +VCC3V3_S0_TBT

1 2

LT32

1U_0201_6.3VM

47U_0603_6.3V6M

CT153

CT152

1

2

1

0_0603_5%

47U_0603_6.3V6M

CT154

C C

B B

A A

4

+V0P9_DP+V0P9_PCIE+ V0P9_USB+V0P9_CIO

L8

VCC0P9_DP

L11

VCC0P9_DP

L12

VCC0P9_DP

M8

VCC0P9_DP

T11

VCC0P9_DP

T12

VCC0P9_DP

L6

VCC0P9_ANA_DPSRC

M6

VCC0P9_ANA_DPSRC

V11

VCC0P9_ANA_DPSNK

V12

VCC0P9_ANA_DPSNK

V13

VCC0P9_ANA_DPSNK

M13

VCC0P9_PCIE

M15

VCC0P9_PCIE

M16

VCC0P9_PCIE

L19

VCC0P9_ANA_PCIE_1

N19

VCC0P9_ANA_PCIE_1

L18

VCC0P9_ANA_PCIE_2

M18

VCC0P9_ANA_PCIE_2

N18

VCC0P9_ANA_PCIE_2

R15

VCC0P9_USB

R16

VCC0P9_USB

R8

VCC0P9_CIO

R9

VCC0P9_CIO

R11

VCC0P9_CIO

R12

3.3V @ 100mA

1U_0201_6.3VM

CT103

1

2

3.3V @ 100mA

CT104

VCC0P9_CIO

L16

VCC3P3_ANA_PCIE

J16

VCC3P3_ANA_USB2

A6

VSS_ANA

A8

VSS_ANA

A10

VSS_ANA

A12

VSS_ANA

A14

VSS_ANA

A16

VSS_ANA

A18

VSS_ANA

A20

VSS_ANA

A22

VSS_ANA

B6

VSS_ANA

B8

VSS_ANA

B10

VSS_ANA

B12

VSS_ANA

B14

VSS_ANA

B16

VSS_ANA

B18

VSS_ANA

B20

VSS_ANA

B22

VSS_ANA

D8

VSS_ANA

D9

VSS_ANA

D11

VSS_ANA

D12

VSS_ANA

D13

VSS_ANA

D15

VSS_ANA

D16

VSS_ANA

D18

VSS_ANA

E8

VSS_ANA

E9

VSS_ANA

E11

VSS_ANA

E15

VSS_ANA

E16

VSS_ANA

E22

VSS_ANA

E23

VSS_ANA

F9

VSS_ANA

F16

VSS_ANA

F20

VSS_ANA

G22

VSS_ANA

G23

VSS_ANA

H1

VSS_ANA

H2

VSS_ANA

H12

VSS_ANA

H13

VSS_ANA

H15

VSS_ANA

H16

VSS_ANA

H20

VSS_ANA

J5

VSS_ANA

J18

VSS_ANA

J19

VSS_ANA

J20

VSS_ANA

J22

VSS_ANA

J23

VSS_ANA

K1

VSS_ANA

K2

VSS_ANA

L5

VSS_ANA

L20

VSS_ANA

L22

VSS_ANA

L23

VSS_ANA

M1

VSS_ANA

M2

VSS_ANA

M5

VSS_ANA

M19

VSS_ANA

M20

VSS_ANA

N5

VSS_ANA

N20

VSS_ANA

N22

VSS_ANA

N23

VSS_ANA

UT1B

S IC JHL6540 SLLS N C1 FC-CSP THUNDE RBOLT

SA00009ZV30

1

2

0.1U_0201_10V6K

CT66

R6

1

2

VCC3P3_LC

VSS_ANAP1VSS_ANAP2VSS_ANAR5VSS_ANA

3

3.3V @ 40mA

1U_0201_6.3VM

CT67

F8

R13

VCC3P3_S0

VCC3P3_SX

GND VCC

VSS_ANA

VSS_ANAT1VSS_ANAT2VSS_ANAT5VSS_ANA

R18

R19

R20

R22

R23

12

@RF@

1U_0201_6.3VM

1

2

H9

VCC3P3_SVR VCC3P3_SVR VCC3P3_SVR

VCC3P3A

VCC0P9_SVR

VCC0P9_SVR VCC0P9_SVR_ANA VCC0P9_SVR_ANA VCC0P9_SVR_ANA VCC0P9_SVR_ANA VCC0P9_SVR_ANA VCC0P9_SVR_ANA

VCC0P9_SVR_SENSE

SVR_IND SVR_IND SVR_IND

SVR_VSS SVR_VSS SVR_VSS

VCC0P9_LVR

VCC0P9_LVR_SENSE

VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA VSS_ANA

VSS_ANA

T20

U23

U22

RT970_04 02_5% @

+3VALW

1U_0201_6.3VM

@

CT68

1

2

A2 A3 B3

L9 M9 E12 E13 F11 F12 F13 F15 J9

C1 C2 D1

A1 B1 B2

SI:RF request

F18 H18 J11 H11

V5 V6 V8 V9 V15 V16 V20 W5 W6 W8 W9 W20 W22 W23 Y9 Y13 Y20 AA22 AA23 AB6 AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AC6 AC8 AC10 AC12 AC14 AC16 AC18 AC20 AC22 D5

VSS

E4

VSS

E5

VSS

E6

VSS

F5

VSS

F6

VSS

H5

VSS

H8

VSS

J8

VSS

J12

VSS

J13

VSS

J15

VSS

L13

VSS

M11

VSS

M12

VSS

N8

VSS

N9

VSS

N11

VSS

N12

VSS

N13

VSS

T6

VSS

T8

VSS

T9

VSS

T13

VSS

T15

VSS

T16

VSS

T18

VSS

AB1

VSS

AC2

VSS

12 12

12

CT69

RT11080_0402_5 % @ RT1000_0402_5%

CT29710P_0402_50 V8J

+TBT_SVR_IND

CT296

@RF@

3.3V @ 200mA

+VCC3V3_S0_T BT +3VALW

3.3V @ 700mA

10U_0402_6.3V6M

10U_0603_6.3V6M

10U_0402_6.3V6M

1

CT70

CT150

2

+V0P9_SVR

0.9V @ 2000mA

1U_0201_6.3VM

1

2

S COIL 0.6UH TMPC4 04012HB-R60MG-Z02 6.6A

1 2

LT1

SH00001BK0 0

10P_0201_50V

2

1

+V0P9_LVR_OUT

CT82

1

2

CT87

0.9V @ 55mA

10U_0402_6.3V6M

1

2

1U_0201_6.3VM

CT83

CT84

1

2

47U_0603_6.3V6M

2

1

10U_0402_6.3V6M

1

CT100

CT99

2

CT88

2

+VCC3V3_S0_T BT+3VALW_LC

10U_0402_6.3V6M

1

CT71

2

1U_0201_6.3VM

CT85

1

2

47U_0603_6.3V6M

1

CT72

2

1U_0201_6.3VM

CT86

1

2

82P_0402_50V8J

47U_0603_6.3V6M

CT298

1

CT149

CT73

RF@

2

1U_0201_6.3VM

CT140

CT139

1

2

Share same GND plane

1

with SVR_VSS of AR

47U_0603_6.3V6M

2

1

1U_0201_6.3VM

1

2

47U_0603_6.3V6M

2

CT89

1

1U_0201_6.3VM

CT101

CT102

1

2

COMPAL confidential circuit for HP

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2017/03/20 2020/03/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Thunderbolt AlpineRidge (2/2)

Size Document Number Rev

Custom

LA-F803P

Date: Sheet of

1

34 55Friday, June 08 , 2018

0.1

5

4

3

2

1

+5VALW +3V_TBTB_PD LDO

2

D D

1

CT225

CT226

4.7U_0402_10V

place near 16,37 pin

To Alpine Ridge

C C

TBT_EE_CL K(33)

+5VALW

FF:46.2

3A

CT224

2

1

CT227

1 2

10U_0603_ 6.3V6M

RT819

CT291

EC_SMB_CK2(29,36) EC_SMB_DA2(29,36)

TBTB_I2C_IRQ2Z(2 9)

TBT_I2C_SCL(33)

TBT_I2C_SDA(33)

TBT_I2C_INT(33)

TBT_EE_DO(33)

TBT_EE_DI(33 )

TBT_EE_CS_ N(33)

RT1109

1

2

10P_0201_25V8

To EC

HRESET_988(2 9)

EMI request

@EMI@

22U_0603_ 6.3V6M

+3VL

0_0402_5%

SI: Add RT826

TBT_EE_CL K_PD

12

0_0201_5%

1 2

CT232

1 2

RT826

EC_SMB_CK2 EC_SMB_DA2 TBTB_I2C_IRQ2Z

TBT_I2C_SCL TBT_I2C_SDA TBTB_I2C_INT

TBT_EE_DO TBT_EE_DI TBT_EE_CL K_PD TBT_EE_CS_ N

12

0_0201_5%

3A

+3VL_TBTAB

12

HRESET

UT3

7

PP_HV1

1

PP_HV2

3

VIN_3V3

18

I2C1_SCL

19

I2C1_SDA

20

I2C1_IRQ

23

I2C2_SCL

24

I2C2_SDA

25

I2C2_IRQ

27

SPI_MISO(GPIO8)

28

SPI_MOSI(GPIO9)

29

SPI_CLK(GPIO10)

30

SPI_SS(GPIO11)

35

HRESET

45

NC

46

NC

47

G-Pad

A1

NC1

A2

NC2

A3

NC3

A4

NC4

TPS65988C ERJTR_QFN48_6X6

SA0000ABQ60

VBUS1

VBUS2

LDO_3V3 LDO_1V8

C1_CC1 C1_CC2

C2_CC1 C2_CC2

ADCIN1 ADCIN2

PP1_CABLE PP2_CABLE

C1_USB_P(GPIO18) C1_USB_N(GPIO19)

C2_USB_P(GPIO20) C2_USB_N(GPIO21)

HPD1(GPIO3) HPD2(GPIO4)

GPIO12

GPIO13 GPIO14(PWM) GPIO15(PWM)

GPIO16(PP_EXT1) GPIO17(PP_EXT2)

GPIO0 GPIO1 GPIO2

GPIO5 GPIO6 GPIO7

8

2

5 26

15 17

36 38

4 6

16 37

41 42

43 44

9 10 11 21 22 12 13 14 31 32 33 34 39 40

3A

SI: CT223 CT230 change from SE000012900 t o SE000009R80

3A

1 2

CT228 10U_ 0402_6.3V6M

CT234 10U_ 0603_6.3V6M

1 2

+3V_TBTB_PD LDO +1.8V_TBTB_P DLDO

CT223

CT230

1

2

1U_0402_25V6K

1

2

1U_0402_25V6K

PIR39 SI: Chang e to SE00000XG 80

1

TBTB_ADCIN1 TBTB_ADCIN2

0.9A

USB20_P5 USB20_N5

USB20_P1 USB20_N1

TBT_RESET _N

TBT_A_HPD TBT_B_HPD TBT_A_DP_MOD E TBT_A_POL TBT_A_TBT_ MODE GPIO12 TBT_B_DP_ MODE TBT_B_POL TBT_B_TBT _MODE TBTA_PPEXT_EN TBTB_PPEXT_E N

+5VALW

CT235

CT236

2

220P_0201_50V7K

CT308

2

220P_0201_50V7K

@RF@

TBT_RESET _N (33) PWR_LED #_PD (29,36 ) ON/OFF#_988 (29) TBT_A_HPD (33) TBT_B_HPD (33) TBT_A_DP_MOD E (38) TBT_A_POL (38 ) TBT_A_TBT_ MODE (38)

T353TP@

TBT_B_DP_ MODE (38) TBT_B_POL (38 ) TBT_B_TBT _MODE (38) TBTA_PPEXT_EN (4 0) TBTB_PPEXT_E N (4 0)

1

2

10P_0402_50V8C

+TBTA_VBUS_L +TBT A_VBUS

JPHW3

@

2

1

CT221

2

1000P_0201_50V7K

1

CT229

2

1000P_0201_50V7K

1

CT309

2

10P_0402_50V8C

@RF@

JUMP_43X39

CT222

0.1U_0201_ 25V6K

+TBTB_VBUS_ L

JUMP_43X39

CT233

0.1U_0201_ 25V6K

1

CT237

2

220P_0201_50V7K

112

SI: Swap +TBTA_ VBUS & +TBTB_V BUS

+TBTB_VBUS

JPHW4

@

2

112

1

CT238

2

220P_0201_50V7K

1

CT310

CT311

2

10P_0402_50V8C

@RF@

PIR2 SI: Add ty pe-C additiona l features by PD

To Alpine Ridge

+TBTA_CC1 (38) +TBTA_CC2 (38)

+TBTB_CC 1 (38) +TBTB_CC 2 (38)

USB20_P5 (11,38) USB20_N5 (1 1,38)

USB20_P1 (11,38) USB20_N1 (1 1,38)

TBTB_ADCIN1

TBTB_ADCIN2

TBTB_ADCIN1

TBTB_ADCIN2

TBTA_PPEXT_EN

TBTB_PPEXT_E N

TBT_RESET _N

TBT_A_DP_MOD E

TBT_A_POL

TBT_A_TBT_ MODE

TBT_B_DP_ MODE

TBT_B_POL

TBT_B_TBT _MODE

TBTB_I2C_IRQ2Z

HRESET

12

RT76210K_0201_ 1%

1 2

RT763200K_0201 _5%

12

RT76810 0K_0201_1%

12

RT76910 0K_0201_1%

12

RT84210 0K_0201_5%

12

RT84310 0K_0201_5%

12

RT1093100K_0201 _1% @

12

RT1094100K_0201 _1% @

12

RT1095100K_0201 _1% @

12

RT1096100K_0201 _1% @

12

RT1097100K_0201 _1% @

12

RT1098100K_0201 _1% @

12

RT1099100K_0201 _1% @

+3V_TBTB_PD LDO

1 2

@

1 2

12

RT759 10K_0201_ 1%

RT760 100K _0201_5%@

RT761 1 00K_0201_5%

CT231 0.01U_0201 _6.3V7K

B B

TPS65988 I2C Address Setting

A A

COMPAL confidential circuit for HP

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2017/03/20 2020/03/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

TPS65988 PORT1/2

Size Document Number Rev

Custom

LA-F803P

Date: Sheet of

1

35 55Friday, June 08 , 2018

0.1

5

4

3

2

1

UT4

12 12

12

RT8280_0201_5 % RT8290_0201_5 %

12

+5VALW

3A

7

PP_HV1

3A 3A

1

PP_HV2

5.5mA

+3VL_TBTC

3

VIN_3V3

EC_SMB_CK2_ R EC_SMB_DA2_R

12 12 12

TBTC_EE_D O TBTC_EE_D I TBTC_EE_C LK_R TBTC_EE_C S_N

18

I2C1_SCL

19

I2C1_SDA

20

I2C1_IRQ

23

RT77410K_0201_5 % RT77510K_0201_5 % RT77610K_0201_5 %

I2C2_SCL

24

I2C2_SDA

25

I2C2_IRQ

27

SPI_MISO(GPIO8)

28

SPI_MOSI(GPIO9)

29

SPI_CLK(GPIO10)

30

SPI_SS(GPIO11)

35

HRESET

45

NC

46

NC

47

G-Pad

A1

NC1

A2

NC2

A3

NC3

A4

NC4

S IC PTPS65987D CERJTR VQFN 48P POWER SW

SA0000BL010

C1_USB_P(GPIO18) C1_USB_N(GPIO19)

C2_USB_P(GPIO20) C2_USB_N(GPIO21)

GPIO16(PP_EXT1) GPIO17(PP_EXT2)

LDO_3V3 LDO_1V8

C1_CC1 C1_CC2

C2_CC1 C2_CC2

ADCIN1

ADCIN2

PP1_CABLE PP2_CABLE

HPD1(GPIO3) HPD2(GPIO4)

GPIO12

GPIO13 GPIO14(PWM) GPIO15(PWM)

TBTC_ADCIN1 TBTC_ADCIN2

+20V_VIN_TBTC

+3VL

SI:Add 0ohm for debug

RT827

D D

To Port A

EC_SMB_CK2(29,35) EC_SMB_DA2(29,35)

+3V_TBTC_P DLDO

TBTC_EE_C LK

EMI request

@EMI@

RESET_987(29)

C C

0_0402_5%

TBTC_I2C_IRQ2Z(29)

RT786

0_0201_5%

1

CT251

2

RT777

10P_0201_25V8

100K_0201_ 5%

RT844

0_0201_5%

+TBTC_VBUS_ L

8

VBUS1

2

VBUS2

5 26

+TBTC_CC 1_CONN

15

+TBTC_CC 2_CONN

17

36 38

TBTC_ADCIN1

4

TBTC_ADCIN2

6

16 37

USB20_P7

41

USB20_N7

42

43 44

9

GPIO0

10

GPIO1

11

GPIO2

TBT_DPSRC _HPD

21 22

PIR2 SI: Add ty pe-C additiona l features by PD

12

GPIO5

13

GPIO6

14

GPIO7

31 32 33 34 39 40

RT778

10K_0201_1%

RT784

100K_0201_1%

+3V_TBTC_P DLDO +1 .8V_TBTC_PDLDO

+5VALW

0.9A

T159TP@ T160TP@

T366TP@ T367TP@ T154TP@ T155TP@ T156TP@

TBT_C_PPEXT _EN

T158TP@

12

+3V_TBTC_P DLDO

12

RT779

10K_0201_1%

12

RT785

100K_0201_1%

USB20_P7 (11) USB20_N7 (1 1)

MUX_AMSEL (37) MUX_EN (3 7) MUX_POL (37) TBT_DPSRC _HPD (33,37 )

PWR_LED #_PD (29,35 ) ON/OFF#_987 (29)

RT822 100K_0201_ 5%

+5VALW

place near pin7

CT239

22U_0603_6.3V6M

1

CT245

CT246

2

120P_0402_50V

RF@

CT313

1

2

1

CT241

4.7U_0402_6.3V6M

+3VL

RF@

1

CT314

2

0.1U_0201_25V6K

10U_0402_6.3V6M

SPI

RT782

3.3K_0201_1%

RT781

3.3K_0201_1%

RT780

3.3K_0201_1%

1

12

2

CT250

0.1U_0201_6.3V6K

12

TBTC_EE_C S_N TBTC_EE_D O TBTC_EE_W P_N

+TBTC_VBUS_ L +TBTC_VBUS

EMI@

1

CT243

CT242

1000P_0201_25V7K

1

CT315

2

82P_0402_50V8J

UT5

1

CS#

2

DO(IO1)

3

WP#(IO2)

4

GND

W25X20CLZP IG_WSON8

SA000063100

CT244

2

0.1U_0201_25V6K

+3V_TBTC_P DLDO +1.8V_TBTC_ PDLDO

1

2

CT247

10U_0402_6.3V6M

RF@

1

2

HOLD#(IO3)

DI(IO0)

thermal pad

RF@

1

CT317

2

0.1U_0201_25V6K

+3V_TBTC_P DLDO

8

VCC

7 6

CLK

5 9

RF@

CT316

10U_0402_6.3V6M

JUMP_43X118

1

2

1U_0402_25V6K

+3VL

CT248

10U_0402_6.3V6M

CT318

82P_0402_50V8J

TBTC_HOLD _N TBTC_EE_C LK TBTC_EE_D I

@

112

1

2

JPHW8

@RF@

1

2

1

2

CT249

4.7U_0402_6.3V6M

1

CT329

2

68P_0201_50V8J

RT783

3.3K_0201_1%

12

TBTC_I2C_IRQ2Z

MUX_AMSEL

MUX_EN

MUX_POL

USB20_N7

ON/OFF#(29 ,31)

LID_SW#(29,31)

RT770 10K_0201_5%

RT771 10K_0201_5%@

RT772 10K_0201_5%@

RT773 10K_0201_5%@

DP3_AUXN_SUB1

+TBTC_CC 1_CONN

DP3_AUXP_SUB2

+TBTC_CC 2_CONN

USB20_P7_R

USB20_N7_R

ON/OFF#

LID_SW#

DT1

1

2

4

5

3

8

L05ESDL5V0NA-4 _SLP2510P8-10-9

SC300001Y00 ESD@

LT33

1

4

DLM0NSN90 0HY2D_4P

SM070005U0 0

DT2

1

2

4

5

3

8

AZ1045-04F_DFN2 510P10E-10-9

SC300001Y00

EMI@

12

2

3

ESD@

+3V_TBTC_P DLDO

+3VS

9

10

8

9

7

6

USB20_P7_RUSB20_P7

2

USB20_N7_R

3

9

10

8

9

7

6

DP3_AUXN_SUB1

+TBTC_CC 1_CONN

DP3_AUXP_SUB2

+TBTC_CC 2_CONN

USB20_P7_R

USB20_N7_R

ON/OFF#

LID_SW#

1 2

+TBTC_VBUS

CT2540.33U_02 01_25V6K

CT2550.33U_02 01_25V6K

W = 200 mils

12

DT3 PESD24VS1UB_S OD523-2

ESD@

JTYPEC3

A1

GND

A2

SSTXP1

A3

SSTXN1

A4

VBUS

A5

CC1

A6

DP1

A7

DN1

A8

SBU1

A9

VBUS

A10

SSRXN2

A11

SSRXP2

A12

GND

1

GND

2

GND

3

GND

CONN@

SSTXP2 SSTXN2

SSRXN1 SSRXP1

SINGA_2UB1734-C0 0111F

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

GND

VBUS

CC2

DP2 DN2

SBU2

VBUS

GND

GND GND GND

Issued Date

B1

B2 B3

B4

B5

B6 B7

B8

B9

B10 B11

B12

4 5 6

USB3_DP3_M TX_C_DRX_P2 USB3_DP3_M TX_C_DRX_N2

1 2

CT256 0.33U_020 1_25V6K

+TBTC_CC 2_CONN

USB20_P7_R USB20_N7_R

DP3_AUXP_SUB2

1 2

CT257 0.33U_020 1_25V6K

USB3_DP3_M RX_R_DTX_N1 USB3_DP3_M RX_R_DTX_P1

2017/03/20 2020/03/20

USB3_DP3_M TX_C_DRX_P2 (37)

USB3_DP3_M TX_C_DRX_N2 (37)

DP3_AUXP_SUB2 (37)

Compal Secret Data

Deciphered Date

2

ESD@

USB3_DP3_M RX_DTX_P2

USB3_DP3_M RX_DTX_N2 USB 3_DP3_MRX_DTX_N2

USB3_DP3_M TX_C_DRX_P2

USB3_DP3_M TX_C_DRX_N2

USB3_DP3_M TX_C_DRX_N1

USB3_DP3_M TX_C_DRX_P1

USB3_DP3_M RX_DTX_N1

USB3_DP3_M RX_DTX_P1

DT4

1

2

4

5

3

8

AZ1045-04F_DFN2 510P10E-10-9

SC300001Y00

DT5

1

2

4

5

3

8

AZ1045-04F_DFN2 510P10E-10-9

SC300001Y00

Compal Electronics, Inc.

Title

Type-C PORT3-TPS65987D

Size Document Number Rev

Custom

LA-F803P

Date: Sheet of

10

9

7

6

ESD@

10

9

7

6

USB3_DP3_M RX_DTX_P2

9

8

USB3_DP3_M TX_C_DRX_P2

7

USB3_DP3_M TX_C_DRX_N2

6

USB3_DP3_M TX_C_DRX_N1

9

USB3_DP3_M TX_C_DRX_P1

8

USB3_DP3_M RX_DTX_N1

7

USB3_DP3_M RX_DTX_P1

6

1

36 55Friday, June 08 , 2018

0.1

B B

1

CT253

2

CT252

CT295

USB3_DP3_M TX_C_DRX_P1(37) USB3_DP3_M TX_C_DRX_N1(37)

PIR28 SI: Add I ntel request

Crx Rb

1 2

USB3_DP3_M RX_DTX_N2(37)

A A

USB3_DP3_M RX_DTX_P2(37)

USB3_DP3_M RX_DTX_N1(37)

USB3_DP3_M RX_DTX_P1(37)

RT1113 0.33U_0201_2 5V6K

1 2

RT1114 0.33U_0201_2 5V6K

1 2

RT1115 0.33U_0201_2 5V6K

1 2

RT1116 0.33U_0201_2 5V6K

USB3_DP3_M RX_R_DTX_N2 USB3_DP3_M RX_R_DTX_P2 USB3_DP3_M RX_R_DTX_N1 USB3_DP3_M RX_R_DTX_P1

COMPAL confidential circuit for HP

RT1120 200K _0201_5% RT1119 200K _0201_5% RT1118 200K _0201_5% RT1117 200K _0201_5%

USB3_DP3_M RX_R_DTX_N2 USB3_DP3_M RX_R_DTX_P2 USB3_DP3_M RX_R_DTX_N1 USB3_DP3_M RX_R_DTX_P1

1 2 1 2 1 2 1 2

EMI@

0.022U_0402_25V7K

DP3_AUXN_SUB1(37)

0.1U_0201_25V6K

1000P_0201_50V7K

EMI@

USB3_DP3_M TX_C_DRX_P1 USB3_DP3_M TX_C_DRX_N1

+TBTC_CC 1_CONN

USB20_P7_R USB20_N7_R

DP3_AUXN_SUB1

USB3_DP3_M RX_R_DTX_N2 USB3_DP3_M RX_R_DTX_P2

Intel request

5

4

5

+3VS_MUX

@

1 2

+3VS_MUX

TBT_DP_ML 0_P_C(33)

TBT_DP_ML 0_N_C(33)

TBT_DP_ML 1_P_C(33)

TBT_DP_ML 1_N_C(33)

TBT_DP_ML 2_P_C(33)

TBT_DP_ML 2_N_C(33)

TBT_DP_ML 3_P_C(33)

TBT_DP_ML 3_N_C(33)

TBT_DP_AUX_P_ C(33)

TBT_DP_AUX_N _C(33)

1

CT270

2

10U_0402_6.3V6M

USB3_CTX_DR X_P3(11)

USB3_CTX_DR X_N3(11) USB3_CRX_DT X_P3(11) USB3_CRX_DT X_N3(11)

2

CT272

CT271

0.1U_0201_6.3V6K

1 2

CT3 0.22U_0201_6 .3V6M

1 2

CT17 0.22U _0201_6.3V6M

1 2

CT5 0.22U_0201_6 .3V6M

1 2

CT19 0.22U _0201_6.3V6M

1 2

CT20 0.22U _0201_6.3V6M

1 2

CT21 0.22U _0201_6.3V6M

1 2

CT22 0.22U _0201_6.3V6M

1 2

CT24 0.22U _0201_6.3V6M

PV: remove MUX side 0.1u Cap

1 2

CT287 0.22U_0 201_6.3V6M

1 2

CT288 0.22U_0 201_6.3V6M

1 2

CT285 0.22U_0 201_6.3V6M

1 2

CT286 0.22U_0 201_6.3V6M

1

2

CT273

CT274

0.1U_0201_6.3V6K

USB3_CTX_DR X_P3_C USB3_CTX_DR X_N3_C USB3_CRX_DT X_P3_C USB3_CRX_DT X_N3_C

+3VS

RT6 0_0603_5 %

D D

C C

+3VS_MUX

SOC_DP3_P0_ C SOC_DP3_N0 _C SOC_DP3_P1_ C SOC_DP3_N1 _C SOC_DP3_P2_ C SOC_DP3_N2 _C SOC_DP3_P3_ C SOC_DP3_N3 _C

MUX_DP_EQ0 MUX_DP_EQ1 MUX_SS_EQ0 MUX_SS_EQ1

4

3

GPIO/I2C mode

UT11

1

VCC

6

VCC

20

VCC

28

VCC

9

DP0P

10

DP0N

12

DP1P

13

DP1N

15

DP2P

16

DP2N

18

DP3P

19

DP3N

24

AUXP

25

AUXN

8

SSTXP

7

SSTXN

5

SSRXP

4

SSRXN

14

DPEQ0/A1

2

DPEQ1

11

SSEQ0/A0

3

SSEQ1

TUSB546A-DCIRN QR_WQFN40_4X6

FLIP/SCL

CTL0/SDA

CTL1/HPDIN

CAD_SNK/RSVD1

HPDIN/RSVD2

RX1N

RX2N

I2C_EN

TX1P TX1N RX1P

TX2P TX2N RX2P

SBU1 SBU2

EQ0 EQ1

GND

MUX_CAD_SNK

USB3_DP3_M TX_DRX_P1

33

USB3_DP3_M TX_DRX_N1

34 30 31

USB3_DP3_M TX_DRX_P2

37

USB3_DP3_M TX_DRX_N2

36 40 39

DP3_AUXN_SUB1

27

DP3_AUXP_SUB2

26

MUX_USB3_EQ0

38

MUX_USB3_EQ1

35

MUX_I2C_EN

17

MUX_POL_R

21

MUX_AMSEL_R

22

MUX_EN_R

23

MUX_CAD_SNK

29

TBT_DPSRC _HPD

32

41

1 2

CT279 0.22U_020 1_25V5K

1 2

CT280 0.22U_020 1_25V5K

1 2

CT281 0.22U_020 1_25V5K

1 2

CT282 0.22U_020 1_25V5K

RT799 0_0201_5% RT800 0_0201_5% RT801 0_0201_5%

TBT_DPSRC _HPD (33,36)

1 2

RT1111 22_0 201_5%@

1 2

RT1112 22_0 201_5%@

1 2

RT859 100K_0201 _5%

1 2

RT860 100K_0201 _5%@

1 2 1 2 1 2

+3VS_MUX

Function Field:4.14

USB3_DP3_M TX_C_DRX_P1 (36) USB3_DP3_M TX_C_DRX_N1 (36)

USB3_DP3_M RX_DTX_P1 (3 6) USB3_DP3_M RX_DTX_N1 (36)

USB3_DP3_M TX_C_DRX_P2 (36) USB3_DP3_M TX_C_DRX_N2 (36)

USB3_DP3_M RX_DTX_P2 (3 6) USB3_DP3_M RX_DTX_N2 (36)

DP3_AUXN_SUB1 (36) DP3_AUXP_SUB2 (36)

MUX_POL (36) MUX_AMSEL (36) MUX_EN (3 6)

MUX_DCI_CLK (10)

MUX_DCI_DAT ( 10)

MUX_I2C_EN

12

@

RT857

20K_0201_5%

I2C@

RT856

RT858

+3VS_MUX

12

1K_0201_5%

12

1K_0201_5%

2

1

+3VS_MUX

TBT_DP_AUX_N _C

TBT_DP_AUX_P_ C

DP3_AUXN_SUB1

DP3_AUXP_SUB2

MUX_POL_R

MUX_AMSEL_R

B B

A A

MUX_EN_R

1 2

RT807 100K_0201 _5%

1 2

RT812 100K_0201 _5%

1 2

RT815 2M_0201_5 %

1 2

RT816 2M_0201_5 %

1 2

RT808 100K_0201 _5%

1 2

RT809 100K_0201 _5%

1 2

RT810 100K_0201 _5%

MUX_DP_EQ0

COMPAL confidential circuit for HP

5

+3VS_MUX +3VS_MU X + 3VS_MUX +3VS_MUX +3VS_MUX +3VS_MUX

12

@

RT813

1K_0201_5%

MUX_DP_EQ1 MUX_S S_EQ0 MUX_SS_EQ1 MUX_USB3 _EQ0 MUX_USB3_EQ1

12

@

RT817

RT818

1K_0201_5%

20K_0201_5%

4

12

@

RT814

1K_0201_5%

12

@

RT840

RT838

1K_0201_5%

20K_0201_5%

12

@

RT841

1K_0201_5%

12

@

RT846

RT845

1K_0201_5%

20K_0201_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

@

RT847

1K_0201_5%

12

@

RT848

RT849

1K_0201_5%

20K_0201_5%

2017/03/20 2020/03/20

12

@

RT851

20K_0201_5%

12

RT850

1K_0201_5%

12

@

RT852

1K_0201_5%

Compal Secret Data

Deciphered Date

12

@

RT853

1K_0201_5%

12

@

RT854

RT855

1K_0201_5%

20K_0201_5%

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

DP MUX

LA-F803P

1

0.1

37 53Friday, June 08 , 2018

0.1

A

1

2

CT258

CT293

1000P_0201_50V7K

0.022U_0402_25V7K

EMI@

LT35

1

4

DLM0NSN900HY2D_4P

SM070005U00

ESD@

DT8

1

10

2

9

4

7

4

5

6

5

3

8

AZ1045-04F_DFN2510P10E-10-9

SC300001Y00

EMI@

LT37

1

4

DLM0NSN900HY2D_4P

SM070005U00

USB20_N1_R

2

USB20_P1_R

3

USB20_N5_R

9

USB20_P5_R

8

USB20_N1_R

7

USB20_P1_R

6

1

CT265

2

CT294

CT264

EMI@

1000P_0201_50V7K

0.022U_0402_25V7K

USB20_N5_R

2

USB20_P5_R

3

USB20_N5_R

USB20_P5_R

USB20_N1_R

USB20_P1_R

USB20_N5

USB20_P5

USB20_N1

USB20_P1

USB20_N1(11,35)

1 1

USB20_P1(11,35)

2 2

USB20_N5(11,35)

USB20_P5(11,35)

3 3

4 4

COMPAL confidential circuit for HP

A

B

1

CT259

2

EMI@

TBT_A_TTX_C_DRX_P1 TBT_A_TTX_C_DRX_N1

TBT_A_TRX_N2 TBT_A_TRX_P2 TBT_A_TRX_P1

0.1U_0201_25V6K

EMI@

TBT_B_TTX_C_DRX_P1 TBT_B_TTX_C_DRX_N1

1 2

+TBTB_CC1

USB20_P1_R USB20_N1_R

TBTB_SBU1

1 2

TBT_B_TRX_N2 TBT_B_TRX_P2

1

+TBTA_VBUS

2

0.1U_0201_25V6K

1 2

CT2660.33U_0201_25V6K

+TBTA_CC1

USB20_P5_R USB20_N5_R

TBTA_SBU1

1 2

CT2680.33U_0201_25V6K

+TBTB_VBUS

CT2610.33U_0201_25V6K

CT2620.33U_0201_25V6K

W = 200 mils

12

DT7 PESD24VS1UB_SOD523-2

ESD@

JTYPEC1

A1

GND

A2

SSTXP1

A3

SSTXN1

A4

VBUS

A5

CC1

A6

DP1

A7

DN1

A8

SBU1

A9

VBUS

A10

SSRXN2

A11

SSRXP2

A12

GND

1

GND

2

GND

3

GND

CONN@

W = 200 mils

12

DT16 PESD24VS1UB_SOD523-2

ESD@

JTYPEC2

A1

GND

A2

SSTXP1

A3

SSTXN1

A4

VBUS

A5

CC1

A6

DP1

A7

DN1

A8

SBU1

A9

VBUS

A10

SSRXN2

A11

SSRXP2

A12

GND

1

GND

2

GND

3

GND

CONN@

SINGA_2UB1734-C00111F

SSTXP2 SSTXN2

SSRXN1

SSRXP1

SINGA_2UB1734-C00111F

VBUS

SBU2

VBUS

SSTXP2 SSTXN2

SSRXN1 SSRXP1

GND

CC2

DP2 DN2

GND

GND GND GND

VBUS

SBU2

VBUS

B1

GND

B2 B3

B4

CT260 0 .33U_0201_25V6K

B5

CC2

B6

DP2

B7

DN2

B8

B9

CT263 0 .33U_0201_25V6K

B10 B11

B12

GND

4

GND

5

GND

6

GND

B1

B2 B3

B4

B5

B6 B7

B8

B9

B10 B11

B12

4 5 6

TBT_A_TTX_C_DRX_P2 TBT_A_TTX_C_DRX_N2

CT267 0.33U_0201 _25V6K

CT269 0.33U_0201 _25V6K

TBT_A_TRX_N1

NX3DV221GM Function TableTS3DS10224 Function Table

B

C

TBT_B_TTX_C_DRX_P2 TBT_B_TTX_C_DRX_N2

1 2

+TBTB_CC2

USB20_P1_R USB20_N1_R

TBTB_SBU2

1 2

TBT_B_TRX_N1 TBT_B_TRX_P1

1 2

+TBTA_CC2

USB20_P5_R USB20_N5_R

TBTA_SBU2

1 2

C

D

+3VALW

TBTB_SBU1 TBTB_SBU2

1 2

RT792 0_0201_5%

TBT_B_DP_MODE

1 2

RT793 0_0201_5%

TBT_B_TBT_MODE

Crx Rb

TBT_B_TRX_R_DTX_N2 TBT_B_TRX_R_DTX_P2 TBT_B_TRX_R_DTX_N1 TBT_B_TRX_R_DTX_P1

TBT_B_TRX_N2 TBT_B_TRX_P2 TBT_B_TRX_N1 TBT_B_TRX_P1

TBT_A_TRX_R_DTX_N2 TBT_A_TRX_R_DTX_P2 TBT_A_TRX_R_DTX_N1 TBT_A_TRX_R_DTX_P1

TBT_A_TRX_N2 TBT_A_TRX_P2 TBT_A_TRX_N1 TBT_A_TRX_P1

UT8

13

VCC

1

A_INp

2

A_INn

14

SAI

16

EN_A

B_INp3B1_OUTp

4

B_INn

12

SBI

10

EN_B

5

GND

21

Thermal pad

TS3DS10224RUKR_WQFN20_3X3

1 2

RT1139 0.33U_0201_25V6K

1 2

RT1140 0.33U_0201_25V6K

1 2

RT1138 0.33U_0201_25V6K

1 2

RT1137 0.33U_0201_25V6K

1 2

RT1128 200K_0201_5%

1 2

RT1127 200K_0201_5%

1 2

RT1126 200K_0201_5%

1 2

RT1125 200K_0201_5%

1 2

RT1142 0.33U_0201_25V6K

1 2

RT1144 0.33U_0201_25V6K

1 2

RT1143 0.33U_0201_25V6K

1 2

RT1141 0.33U_0201_25V6K

1 2

RT1136 200K_0201_5%

1 2

RT1135 200K_0201_5%

1 2

RT1134 200K_0201_5%

1 2

RT1133 200K_0201_5%

A1_OUTp A1_OUTn

A0_OUTp A0_OUTn

B1_OUTn

B0_OUTp B0_OUTn

TBT_B_SUB2_C

20

TBT_B_SUB1_C

19

TBT_B_SUB1_C

18

TBT_B_SUB2_C

17

TBT_B_POL

15

SAO

SBO

TBT_B_LSRX

6

TBT_B_LSTX

7

TBT_B_LSTX

8

TBT_B_LSRX

9

11

TBT_B_TRX_N2 TBT_B_TRX_P2 TBT_B_TRX_N1 TBT_B_TRX_P1

TBT_A_TRX_N2 TBT_A_TRX_P2 TBT_A_TRX_N1 TBT_A_TRX_P1

TBT_B_SUB2_C (33)

TBT_B_SUB1_C (33)

TBT_B_POL (35)

TBT_B_LSRX (33) TBT_B_LSTX (33)

PIR27 SI: Add Intel request

Intel request

+3VALW

TBTA_SBU1 TBTA_SBU2

1 2

RT796 0_0201_5%

TBT_A_DP_MODE

1 2

RT797 0_0201_5%

TBT_A_TBT_MODE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

UT10

13

VCC

A1_OUTp

1 2

14 16

4

12 10

5

21

A1_OUTn A_INp A_INn

A0_OUTp

A0_OUTn SAI EN_A

B_INp3B1_OUTp B_INn

SBI EN_B

GND Thermal pad

TS3DS10224RUKR_WQFN20_3X3

SAO

B1_OUTn

B0_OUTp

B0_OUTn

SBO

TBT_A_DP_MODE(35) TBT_A_TBT_MODE(35) +TBTA_CC1(35) +TBTA_CC2(35)

+TBTB_CC1(35) +TBTB_CC2(35)

TBT_B_DP_MODE(35) TBT_B_TBT_MODE(35)

TBT_B_TRX_R_DTX_P1(33) TBT_B_TRX_R_DTX_N1(33)

TBT_B_TTX_C_DRX_P1(33) TBT_B_TTX_C_DRX_N1(33)

TBT_B_TRX_R_DTX_P2(33) TBT_B_TRX_R_DTX_N2(33)

TBT_B_TTX_C_DRX_P2(33) TBT_B_TTX_C_DRX_N2(33)

TBT_A_TRX_R_DTX_P1(33) TBT_A_TRX_R_DTX_N1(33)

TBT_A_TTX_C_DRX_P1(33) TBT_A_TTX_C_DRX_N1(33)

TBT_A_TRX_R_DTX_P2(33) TBT_A_TRX_R_DTX_N2(33)

TBT_A_TTX_C_DRX_P2(33) TBT_A_TTX_C_DRX_N2(33)

2017/03/20 2020/03/20

TBT_A_SUB2_C

20

TBT_A_SUB1_C

19

TBT_A_SUB1_C

18

TBT_A_SUB2_C

17

TBT_A_POL

15

TBT_A_LSRX

6

TBT_A_LSTX

7

TBT_A_LSTX

8

TBT_A_LSRX

9

11

Compal Secret Data

Deciphered Date

D

TBT_A_SUB2_C (33)

TBT_A_SUB1_C (33)

TBT_A_POL (35)

TBT_A_LSRX (33) TBT_A_LSTX (33)

TBT_A_DP_MODE TBT_A_TBT_MODE +TBTA_CC1 +TBTA_CC2

+TBTB_CC1 +TBTB_CC2

TBT_B_DP_MODE TBT_B_TBT_MODE

TBT_B_TRX_R_DTX_P1 TBT_B_TRX_R_DTX_N1

TBT_B_TTX_C_DRX_P1 TBT_B_TTX_C_DRX_N1

TBT_B_TRX_R_DTX_P2 TBT_B_TRX_R_DTX_N2

TBT_B_TTX_C_DRX_P2 TBT_B_TTX_C_DRX_N2

TBT_A_TRX_R_DTX_P1 TBT_A_TRX_R_DTX_N1

TBT_A_TTX_C_DRX_P1 TBT_A_TTX_C_DRX_N1

TBT_A_TRX_R_DTX_P2 TBT_A_TRX_R_DTX_N2

TBT_A_TTX_C_DRX_P2 TBT_A_TTX_C_DRX_N2

E

DT6

TBTB_SBU1

1

+TBTB_CC1

2

TBTB_SBU2

4

+TBTB_CC2

5

3

8

L05ESDL5V0NA-4_SLP2510P8-10-9

SC300001Y00

ESD@

TBT_B_TRX_R_DTX_P1

TBT_B_TRX_R_DTX_N1

TBT_B_TTX_C_DRX_P1

TBT_B_TTX_C_DRX_N1

TBT_B_TRX_R_DTX_P2

TBT_B_TRX_R_DTX_N2

TBT_B_TTX_C_DRX_P2

TBT_B_TTX_C_DRX_N2

DT18

TBTA_SBU1

1

+TBTA_CC1

2

TBTA_SBU2

4

+TBTA_CC2

5

3

8

L05ESDL5V0NA-4_SLP2510P8-10-9

SC300001Y00 ESD@

TBT_A_TRX_R_DTX_P1

TBT_A_TRX_R_DTX_N1

TBT_A_TTX_C_DRX_P1

TBT_A_TTX_C_DRX_N1

TBT_A_TRX_R_DTX_P2

TBT_A_TRX_R_DTX_N2

TBT_A_TTX_C_DRX_P2

TBT_A_TTX_C_DRX_N2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

TYPE-C Conn

LA-F803P

E

TBTB_SBU1

9

10

+TBTB_CC1

8

9

TBTB_SBU2

7

+TBTB_CC2

6

1 2

DT9

ESD@

ESD8011MUT5G_X3DFN2-2

SC40000DM00

1 2

DT10

ESD@

ESD8011MUT5G_X3DFN2-2

SC40000DM00

1 2

DT11

ESD@

ESD8011MUT5G_X3DFN2-2

SC40000DM00

1 2

DT12

ESD@

ESD8011MUT5G_X3DFN2-2

SC40000DM00

1 2

DT13

ESD@

ESD8011MUT5G_X3DFN2-2

SC40000DM00

1 2

DT14

ESD@

ESD8011MUT5G_X3DFN2-2

SC40000DM00

1 2

DT15

ESD@

ESD8011MUT5G_X3DFN2-2

SC40000DM00

1 2

DT17

ESD@

ESD8011MUT5G_X3DFN2-2

SC40000DM00

TBTA_SBU1

9

10

+TBTA_CC1

8

9

TBTA_SBU2

7

+TBTA_CC2

6

1 2

DT20

ESD@

ESD8011MUT5G_X3DFN2-2

SC40000DM00

1 2

DT21

ESD@

ESD8011MUT5G_X3DFN2-2

SC40000DM00

1 2

DT22

ESD@

ESD8011MUT5G_X3DFN2-2

SC40000DM00

1 2

DT23

ESD@

ESD8011MUT5G_X3DFN2-2

SC40000DM00

1 2

DT24

ESD@

ESD8011MUT5G_X3DFN2-2

SC40000DM00

1 2

DT25

ESD@

ESD8011MUT5G_X3DFN2-2

SC40000DM00

1 2

DT26

ESD@

ESD8011MUT5G_X3DFN2-2

SC40000DM00

1 2

DT27

ESD@

ESD8011MUT5G_X3DFN2-2

SC40000DM00

38 55Friday, June 08, 2018

0.1

A

1 1

SUSP#(12,29,44 ,47)

PM_SLP_ S3#(9,12,29,33 )

SUSP#

PM_SLP_ S3#

2 2

1 2

RC492 0_020 1_5%

1 2

RC493 0_020 1_5%@

EN_5VS

12

C5232

0.1U_0201_6.3V6K

1

2

B

1 2

RC491 0_020 1_5%

1 2

RC494 0_020 1_5%@

0.1U_020 1_6.3V6K

100K_0201_5%

R5793

C5230

1

2

EN_3.3VS

12

R5792 100K_02 01_5%

680P_02 01_25V7K

C67

+5VALW

1

2

+3VALW

EN_5VS

C

U6

1 2

3

4

5

6 7

C5233

0.1U_0201_6.3V6K

1

2

I (Max) : 6A RON(Max) : 5m ohm V drop : 0.03 V (=0.91%)

VOUT1

VIN1

VOUT1

VIN1

ON1

VBIAS

ON2

VIN2 VIN2

EM5209V F_DFN14_3X2

GND

VOUT2 VOUT2

GPAD

+3VALW TO +3VS

I (Max) : 3.5A RON(Max) : 33m ohm V drop : 0.1155 V(=2.31%)

CT1

CT2

14 13

12

11

10

9 8

15

1 2

C66 100P_ 0201_50V8J

1 2

C5237 10 0P_0201_50V8 J

D

+3VS

C70

0.1U_0201_16V6K

1

RF@

2

+5VS

10U_0402_6.3V6M

1

2

10U_0402_6.3V6M

C64

68P_0201_50V8J

1

2

1

2

C68

C65

RF@

68P_0201_50V8J

1

C69

@RF@

2

E

+5VALW TO +5VS

+3VALW

PIR23 SI: Add CC411~CC425

+1.8V_PR IM

+5VALW

3 3

AUDIO_PW REN_R

+3VALW

U7

1 2

3

4

5

6 7

VOUT1

VIN1

VOUT1

VIN1

ON1

VBIAS

ON2

VIN2

VOUT2

VIN2

VOUT2

EM5209V F_DFN14_3X2

CT1

GND

CT2

GPAD

14 13

12

11

10

9 8

15

1 2

C5238 47 0P_0201_50V7 K

1 2

C5239 47 0P_0201_50V7 K

+3VS_AU DIO

C5240

0.1U_0201_6.3V6K

1

2

+1.8VS_A UDIO

C5241

0.1U_0201_6.3V6K

1

2

CC411

RF@

1

CC413

CC412

RF@

12P_0201_50V8J

68P_0201_50V8J

2

1

CC414

CC415

RF@

0.1U_0201_6.3V6K

68P_0201_50V8J

2

1

CC416

RF@

0.1U_0201_6.3V6K

12P_0201_50V8J

2

1

CC418

CC417

RF@

0.1U_0201_6.3V6K

68P_0201_50V8J

2

1

CC419

RF@

2

1

CC420

CC421

RF@

68P_0201_50V8J

RF@

0.1U_0201_6.3V6K

2

1

CC422

CC423

RF@

68P_0201_50V8J

12P_0201_50V8J

2

1

CC424

RF@

0.1U_0201_6.3V6K

12P_0201_50V8J

2

1

CC425

RF@

12P_0201_50V8J

2

For +1.8V_PRIM Discharge

+1.8V_PR IM+5VALW

@

0.1U_0201_6.3V6K

1

2

AUDIO_PW REN_R

100K_0201_5%

12

C5234

R5795

12

R52 100K_02 01_1%

PCH_PW R_EN#

1

S1

PCH_PW R_EN(12,29,45,4 6,48)

DMN63D8 LV-7_SOT563-6

2

G1

6

D1

4

S2

5

G2

D2

3

Q5

12

R53 22_0402 _5%

SUSP#

AUDIO_PW REN(8)

4 4

AUDIO_PW REN

1 2

RC495 0_020 1_5%

1 2

RC496 0_020 1_5%@

Security Class ification

COMPAL confidential circuit for HP

A

B

Security Class ification

2017/03/ 20 2020/03/ 20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/03/ 20 2020/03/ 20

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DC Interface

LA-F803P

39 55Friday, June 08, 20 18

E

0.1

5

4

3

2

1

1 2 35

5

PR10 470K_0402_1%

ADP_I (2 9,42)

12

+20V_VIN

PQ5B METR3906KW-G_SOT3 63-6

3 4

12

PR11 47K_0402_1%

PR2

5.9K_0402_1%

PR3 10K_0402_1%

VCIN1_PH (29)

PQ19 AON7409_DFN8-5

ideal_1

5

PQ7B BSS84AKS_SOT363-6

2

6 1

12

PR9 47K_0402_1%

VCIN0_PH (29)

ECAGND(29)

4

12

1 2 35

5

PR7 470K_0402_1%

+20V_VIN

PQ6B METR3906KW-G_SOT3 63-6

3 4

12

PR23 47K_0402_1%

+TBTB_VBUS_L

TBTB_PPEXT_EN( 35)

12

PC14

PC5

1U_0402_25V6K

82P_0402_50V8J

EMI@

RF@

+20V_VIN

12

PC6

1U_0402_25V6K

EMI@

12

PC7

EMI@

1000P_0402_50V7K

PQ16

AON7409_DFN8-5

1 2

+TBTA_VBUS_L

D D

C C

TBTA_PPEXT_EN(35)

+20V_VIN_TBTC

13

D

2

B B

PQ2A METR3906KW-G_SOT3 63-6

A A

G

PQ1

S

LBSS84LT1G_SOT23-3

6 1

12

PR12 47K_0402_1%

12

PQ4 AON7409_DFN8-5

4

2

12

3 5

12

PC1

PR4

0.1U_0402_25V7K 499K_0402_1%

49.9K_0402_1%

2

1 2 35

5

PR13 470K_0402_1%

4

12

PR1809

L2N7002DW1T 1G_SC88-6 PQ3A

1 6

PQ2B

METR3906KW-G_SOT3 63-6

3 4

12

PR14 47K_0402_1%

61

PQ6A METR3906KW-G_SOT3 63-6

+20V_VIN

12

PQ17 AON7409_DFN8-5

ideal_1

2

PQ7A BSS84AKS_SOT363-6

2

6 1

12

PR6 47K_0402_1%

PD1 BZT52-B5V1S_SOD323-2

ideal_1

PR26

470K_0402_1%

4

12

1 2 3 5

12

PC2

PR5

0.1U_0402_25V7K 499K_0402_1%

49.9K_0402_1%

5

12

PC8

EMI@

1000P_0402_50V7K

PQ18 AON7409_DFN8-5

4

12

PR8

L2N7002DW1T 1G_SC88-6 PQ3B

4 3

+3VL_EC

12

34

PQ5A METR3906KW-G_SOT3 63-6

PR1

16.2K_0402_1%

PH1 100K_0402_1%_NCP15W F104F03RC

Security Classification

2018/2/2

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2018/2/2

3

Compal Secret Data

Deciphered Date

2022/2/2

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Date: Sheet of

2

Date: Sheet of

DC Conn

LA-F801P

Friday, June 08, 2018

0.1

5340

1

5340

COMPAL confidential circuit for HP

5

4

3

2

1

+8.4V_BA TT++

PJP1

@

JUMP_43 X79

2

@

PJPB1

D D

C C

CVILU_CF4 236DH0R2-05-NH

38

GND

37

GND

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

EC_SMB_ CK1_R EC_SMB_ DA1_R

+3V_LID_R

B/I#_R

PR17

0_0201_ 5%

1 2

PR18

100_040 2_5%

1 2

PR15 10 0_0402_5%

1 2

PR16 10 0_0402_5%

1 2

PR19 100K_02 01_5%

1 2

PC15

RF@

2.2U_0402_25V6M

+3V_LID

+3VL

B/I# (2 9,42)

12

PC16

RF@

100P_0201_50V8J

EC_SMB_ CK1 (29,42)

EC_SMB_ DA1 (29,42)

12

112

PC9

EMI@

1000P_0 402_50V7K

+8.4V_BA TT+

12

PC10

EMI@

1000P_0 402_50V7K

+3VL

5

+3V_LID

12

4 3

PR20 200K_02 01_5%

L2N7002 DW1T1G_S C88-6 PQ10B

PR21

2

+8.4VB

12

3.9K_0603_5%

1 6

12

PR22

3.9K_0603_5%

L2N7002 DW1T1G_S C88-6 PQ10A

B B

A A

Security Class ification

COMPAL confidential circuit for HP

5

4

Security Class ification

2018/2/2

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2018/2/2

3

Compal Secret Data

Deciphered Date

2022/2/2

2

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet of

Friday, June 08, 201 8

Date: Sheet of

Friday, June 08, 201 8

Date: Sheet of

Friday, June 08, 201 8

BATT Conn

LA-F801P

5341

1

5341

0.1

A

B

C

can not stuff 10V rated MLCC

★

D

+8.4VB +8.4VB +8.4VB +8.4VB +8.4VB +20V_ VIN +20V_VIN

PCB60

PCB40

RF@

0.1U_0201_25V6K

PRB1

+20V_CHG

1 1

+20V_VIN

12

PRB2

2.2_0201_1%

PCB1

@

0.1U_0402_25V6

1 2

DCIN_CHG

VDD_CHG

ACIN_CHG

CMIN_CHG

PROCHOT#_CHG

PCB28 10P_0402_50V8J

SDA_CHG

SCL_CHG

PRB19 200K_0201_5%

1 2

PRB21

@

1 2

100K_0201_1%

12

PRB5

432K_0402_1%

ACIN_CHG

2 2

PCB16

12

PRB7 120K_0201_1%

0.1U_0402_25V6

+20V_VIN

+8.4VB

12

PCB20 1U_0402_6.3V6K

PROCHOT#(29)

PRB4 2_1206_5%

12

PDB1 BAT54CW_SOT323-3

2

3

+3VL

EC_SMB_DA1(29,41)

EC_SMB_CK1(29,41)

PCB17 1U_0603_25V6K

DCIN_CHG_R

1

1 2

PRB15 0_0201_5%

VDD_CHG

PCB18 1U_0603_25V6K

PRB9 2_1206_5%

1 2

PRB11

100K_0201_5%

1 2

PRB12 0_0201_5%

1 2

PRB14 0_0201_5%

1 2

PRB18 100K_0201_1%

VCIN1_ACOK(29)

PRB23

3 3

100K_0201_1%

1 2

B/I#(29,41)

+3VL

4 4

COMPAL confidential circuit for HP

A

1

2

CSIP_CHG_R

12

4.7U_0603_25V6K

12

PCB9

1U_0402_25V6K

17

18

19

20

21

22

23

24

BATGONE_CHG

1 2

PRB24

1 2

100K_0201_5%

12

PRB27

499_0201_1%

PCB31

12

@

PCB32

0.01U_0402_25V7K

Close to EC ADP_I pin

0.02_1206_1%

PRB3

2.2_0201_1%

PCB8

1 2

ADP_CHG

CSIP_CHG

15

16

ADP

CSIP

DCIN

VDD

ACIN

ISL9538HRTZ-T_TQFN32_4X4

CMIN

SDA

SCL

PROCHOT#

ACOK

BATGONE

CMOUT26PROG27AMON/BMON29PSYS30VBAT

25

CMOUT_CHG

PRB22

71.5K_0201_1%

1 2

12

560P_0402_50V7K

ADP_I(29,40)

4

3

CSIN_CHG_R

12

CSIN_CHG

14

CSIN

PUB1

COMP_CHG

PROG_CHG

PRB29

1K_0201_1%

12

PCB34

B

12

PRB6

2.2_0603_5%

13

ASGATE

COMP

28

0.1U_0402_25V6

PCB2

EMI@

PCB10

1U_0402_25V6K

BST1_CHG_R

12

BST1_CHG

UG1_CHG

11

12

BOOT1

UGATE1

AMON_CHG

12

PCB3

0.1U_0402_25V6

EMI@

12

PCB12

LX1_CHG

LG1_CHG

10

9

LGATE1

PHASE1

LGATE2

PHASE2

UGATE2

BOOT2

BGATE

31

32

BGATE_CHG

VBAT1_CHG

0.1U_0402_25V6

2200P_0402_25V7K

0.22U_0603_25V7K

VDDP

VSYS

CSOP

CSON

@

12

33

PCB35

12

PCB5

10U_0603_25V6M

1 2

5V

VDDP_CHG

LG2_CHG

LX2_CHG

UG2_CHG

BST2_CHG

VSYS_CHG

CSOP_CHG

CSON_CHG

1 2

12

PCB6

10U_0603_25V6M

UG1_CHG

LG1_CHG

PRB8

4.7_0402_5%

1U_0603_25V6K

PRB30

100_0201_1%

12

VDD_CHG

PCB19

1U_0402_6.3V6K

1 2

2.2_0603_5%

1 2

0.22U_0603_25V7K

+8.4V_BATT+

PCB4

10U_0603_25V6M

PAD

8

7

6

5

4

3

2

1

12

PCB7

10U_0603_25V6M

RF@

0_0402_5%

1 2

RF@

0_0402_5%

1 2

PRB13

PCB21

0_0201_5%

1 2

PCB25 0.1U_0402_25V6@

PCB30

12

PCB36

PCB37

RF@

100P_0402_50V8J

RF@

2.2U_0402_25V6M

PRB31

UG1_CHG_R

PRB32

LG1_CHG_R

PQB1

9

FDPC8013S

8

V+

LG1_CHG_R

7

LSG

6

BST2_CHG_R

GND

5

GND

PRB20

+8.4VB

1 2

PCB29 1U_0402_25V6K@

PRB26

1 2

1_0201_1%

12

PRB28

1_0201_1%

1 2

PCB33 0.22U_0402_25V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

UG1_CHG_R

1

HSG

V+

2

SW

3

SW

4

SW

GND

10

1 2

RF@

PCB41

68P_0201_25V8

1 2

PCB42

RF@

2.2P_0201_25V8C

1 2

PCB43

@RF@

2.2U_0201_10V6K

1 2

+8.4VB

1 2

@RF@

82P_0201_50V8J

1 2

@RF@

2200P_0201_50V7K

1 2

@RF@

82P_0201_50V8J

1 2

@RF@

2200P_0201_50V7K

UG2_CHG

LG2_CHG

2.2UH_CMLE041B-2R2MS-70_3.3A_20%

1 2

LX1_CHG

2.2UH_CMLE041B-2R2MS-70_3.3A_20%

1 2

12

PRB16

RF@

SNUB_CHG1

12

RF@

2018/2/2 2022/2/2

C

PCB70

PCB71

PCB73

PCB72

RF@

0_0402_5%

1 2

RF@

0_0402_5%

1 2

PLB1

PLB2

4.7_1206_5%

PCB27

680P_0402_50V7K

Compal Secret Data

@RF@

0.22U_0201_10V6K

RF@

68P_0201_25V8

@RF@

0.22U_0201_10V6K

RF@

68P_0201_25V8

+8.4VB

PRB33

PRB34

12

SNUB_CHG2

12

PCB44

1 2

PCB45

1 2

PCB46

1 2

PCB47

1 2

PCB75

@RF@

82P_0201_50V8J

1 2

PCB74

@RF@

2200P_0201_50V7K

UG2_CHG_R

LG2_CHG_R

FDPC8013S

UG2_CHG_R

1

2

LX2_CHG

3

4

PRB17

4.7_1206_5%

RF@

PCB26

680P_0402_50V7K

RF@

Deciphered Date

@RF@

0.22U_0201_10V6K

1 2

RF@

PCB49

68P_0201_25V8

1 2

PCB50

@RF@

0.22U_0201_10V6K

1 2

RF@

PCB51

68P_0201_25V8

1 2

PQB2

9

HSG

SW

10

0.22U_0201_10V6K

1 2

RF@

PCB53

68P_0201_25V8

1 2

PCB54

@RF@

0.22U_0201_10V6K

1 2

RF@

PCB55

68P_0201_25V8

1 2

0.22U_0201_10V6K

1 2

RF@

PCB57

68P_0201_25V8

1 2

PCB58

@RF@

0.22U_0201_10V6K

1 2

RF@

PCB59

68P_0201_25V8

1 2

+8.4VB

PCB11

10U_0603_25V6M

1 2

PCB13

10U_0603_25V6M

1 2

PCB14

10U_0603_25V6M

1 2

PCB15

10U_0603_25V6M

1 2

8

V+

LG2_CHG_R

7

LSG

6

GND

5

GND

+8.4V_BATT

PRB10

0.005_1206_1%

1

4

3

2

PCB22

CSON_CHG_R

CSOP_CHG_R

Title

Size Document Number Rev

Custom

Date: Sheet of

PCB56

@RF@

PCB52

@RF@

PCB48

@RF@

0.22U_0201_10V6K

1 2

RF@

PCB61

68P_0201_25V8

1 2

PCB62

@RF@

0.22U_0201_10V6K

1 2

RF@

PCB63

68P_0201_25V8

1 2

PQB13 AON7401_DFN8-5

1 2 3

12

PCB24

10U_0603_25V6M

Compal Electronics, Inc.

CHARGER

LA-F801P

D

4

12

@RF@

0.22U_0201_10V6K

RF@

68P_0201_25V8

@RF@

0.22U_0201_10V6K

RF@

68P_0201_25V8

@RF@

0.22U_0201_10V6K

RF@

68P_0201_25V8

5

PCB23 4700P_0402_50V7K

BGATE_CHG

PCB64

1 2

PCB65

1 2

PCB66

1 2

PCB67

1 2

PCB68

1 2

PCB69

1 2

+8.4V_BATT+

12

PCB39

PCB38

RF@

2.2U_0402_25V6M

42 53

12

100P_0402_50V8J

0.1

A

B

C

D

E

1 1

2 2

+8.4VB

3 3

PR304

+8.4VB

499K_0201_1%

1 2

ENLDO_3V5V

12

PR306 499K_0201_1%

EC_ON(29,31)

MAINPWON(29)

4 4

A

+8.4VB

PJ301

@

2

112

JUMP_43X79

12

PC340

PC341

68P_0201_25V8

0.1U_0402_25V6

RF@

@RF@

PWR_3V5V_PG(9)

PJ304

@

2

112

JUMP_43X79

12

PC339

PC338

68P_0201_25V8

0.1U_0402_25V6

RF@

@RF@

PC313

2.2K_0201_5%

1 2

PR309

@

1 2

0_0201_5%

12

PC315

PC314

2200P_0402_50V7K

PR308

EMI@

10U_0603_25V6M

12

PR311

1M_0201_1%

10U_0603_25V6M

12

PC301

82P_0402_50V8J

RF@

12

PC316

@EMI@

5V_3V_EN

PC327

4.7U_0402_6.3V6M

12

PC332

RF@

0.1U 25V K X5R 0402

PR301

100K_0201_5%

LX_5V

12

0.1U_0402_25V6

SPOK_5V

PR307

0_0201_5%

PWR_3V5V_PG

ENLDO_3V5V

+3VALW

5V_3V_EN(26)

+8.4VB_5V

12

5V_3V_EN

12

PC303

PC304

2200P_0402_50V7K

EMI@

10U_0603_25V6M

12

1

2

LX

3

GND

4

PG

5

COMPAL confidential circuit for HP

B

LX_3V

6

7

8

9

10

ENLDO_3V5V

5V_3V_EN

IN

EN16EN2

FF7OUT8LDO

PU301 SY8286BRAC_QFN20_3X3

5

LX

GND

PG

NC

IN3IN4IN

EN112EN2

FF13OUT14NC

11

BST_5V

PU302

13

SY8270CTMC_QFN13_4X3

BS

12

LX

11

GND

10

VCC

9

+5VL

12

PC325

4.7U_0402_6.3V6M

PC326

1000P_0402_25V8J

1 2

5V_FB_15V_FB

PR313

BST_3V

2

1

IN

BS

LX

GND

LDO

NC

GND

15

3.3V LDO 150mA~300mA

PC329 1000P_0402_25V8J

1 2

0_0402_5%

VCC_5V

1K_0201_1%

1 2

0_0402_5%

1 2

20

19

18

17

16

21

3V_FB_13V_F B

PR312

LX_5V

PC317

1 2

2.2U_0402_6.3V6M

PR310

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

12

BST_5V_R

+3VLP

PC309

4.7U_0402_6.3V6M

PR303

1K_0201_1%

1 2

PC312

0.1U_0201_10V6K

1 2

C

PC302

0.1U_0201_10V6K

BST_3V_R+8.4VB_3V

1 2

PL301

LX_3V

1UH_PCMB041B-1R0MS_4.2A_20 %

12

RF@

PR314

3.3_0603_1%

5V_SN

12

RF@

PC337

1000P_0201_50V7K

2018/2/2 2022/2/2

2.2UH_CMLE041B-2R2MS-70_3.3A_20%

1 2

12

RF@

PR302

4.7_1206_5%

3V_SN

12

RF@

PC328

680P_0603_50V7K

PL302

1 2

PL303

1 2

Compal Secret Data

Deciphered Date

12

PC306

PC305

22U_0603_6.3V6M

12

PC318

22U_0603_6.3V6M

12

PC320

PC319

22U_0603_6.3V6M

D

+3VALWP

12

PC308

PC307

@

22U_0603_6.3V6M

PC310

RF@

2.2U_0402_25V6M

12

PC311

RF@

100P_0402_50V8J

PJ302

@

112

JUMP_43X118

PJ303

@

JUMP_43X39

112

12

PC343

RF@

12P_0201_50V8J

2

+3VALW+3VALWP

+3VL+3VLP

+5VALWP

12

PC322

PC321

22U_0603_6.3V6M

Custom

12

PC336

PC323

22U_0603_6.3V6M

Title

Size Document Number Rev

Date: Sheet of

12

PC333

PC334

22U_0603_6.3V6M

PJ305

@

2

112

JUMP_43X118

Compal Electronics, Inc.

3VALW/5VALW

12

22U_0603_6.3V6M

12

PC331

PC330

RF@

2.2U_0402_25V6M

PC342

RF@

12P_0201_50V8J

100P_0402_50V8J

+5VALW+5VALWP

43 53Friday, June 08, 2018

E

0.1

5

+8.4VB

D D

PJPM1

@

JUMP_43 X79

112

2

12

PCM24

0.1U_0402_25V6

@RF@

10U_0603_25V6M

RF@

0.1U_0402_25V6

PCM1

12

PCM25

68P_0201_25V8

RF@

12

PCM3

RF@

68P_0201_25V8

2.2U_0402_25V6M

12

+3VALW

PCM22

PCM4

+3VALW

@

PRM5 0_0201_ 5%

1 2

ILMT_DDR

C C

SYSON(12,21,29)

SM_PG_CTRL(6)

B B

SUSP#(12,29,39 ,47)

1 2

PRM7 0_0201_ 5%

PRM8

0_0201_ 5%

1 2

PRM10

0_0201_ 5%

1 2

@

PRM13

0_0201_ 5%

1 2

12

@

PRM12 0_0201_ 5%

+8.4VB_D DR

12

PCM7 1U_0402 _6.3V6K

12

PRM9

1M_0201_5%

4

PUM1

10

IN

13

BYP

14

VCC

2.2U_0402_6.3V6M

12

PCM8

ILMT_DDR

12

PCM20

@

0.1U_0402_10V7K

12

PRM11

PCM21

1M_0201_5%

@

4

VTTGND

9

PGND

15

SGND

17

ILMT

1

S5

2

S3

SY8210AQV C_QFN19_4X3

12

0.1U_0402_10V7K

VDDQSNS

VLDOIN

VTTSNS

VTTREF

VTT

3

@

PRM1

100K_02 01_1%

1 2

19

OT

18

PG

12

BS

11

LX

16

FB

8

7

6

5

3

PRM3

0_0402_ 5%

LX_DDR

FB_DDR

+1.2V_VD DQP

12

+3VALW

PCM6

0.1U_060 3_50V7K

1 2

PCM18

1U_0402_10V6K

12

RF@

PRM2

3.3_0603 _1%

1 2

PLM1

0.56UH_C MLE041B-R56MS -70_6A_20%

1 2

PCM9

22U_060 3_6.3V6M

1 2

+0.6VSP

22U_0603_6.3V6M

PCM19

2

RF@

PCM5

1000P_0 201_50V7K

1 2

330P_0402_50V7K

12

JUMP_43X118

PCM10

PJM1@

112

1

+1.2V_VDDQP

71.5K_0201_1%

12

PRM4

22U_0603_6.3V6M

PCM11

12

71.5K_0201_1%

12

PRM6

PCM12

12

22U_0603_6.3V6M

PCM14

PCM13

12

EMI@

2200P_0402_50V7K

PCM16

12

12P_0201_50V8J

100P_0402_50V8J

PCM17

12

PCM23

RF@

EMI@

+1.2V_VDDQ+1.2V_VDDQP

2

A A

Security Class ification

COMPAL confidential circuit for HP

5

4

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2018/2/2

Compal Secret Data

Deciphered Date

2022/2/2

2

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet of

Compal Electronics, Inc.

1.2V_VDDQ/0.6VS_VTT

LA-F801P

Friday, June 08, 2018

1

44 53

0.1Custom

5

D D

C C

+3VALW

PR1801

@

100K_0201_5%

1 2

4

+3VB_1.8V

22U_0603_6.3V6M

PJ1801

@

JUMP_43X79

112

PCH_PWR_EN(12,29,39,46,48)

PC1801

1 2

2

PC1809

RF@

0.22U_0402_6.3V6K

1 2

PC1810

RF@

68P_0402_50V8J

1 2

PG_1.8V

FB_1.8V

PU1801

4

PGND

3

IN

2

PG

1

FB

SY8003ADFC_DFN8_2X2

PR1804

0_0201_5%

1 2

SGND PGND

PR1805

1M_0201_1%

3

PC1806

PR1803

PR1806

RF@

680P_0402_50V7K

1 2

12

PC1802

12

68P_0402_50V8J

12

PC1803

22U_0603_6.3V6M

+1.8V_PRIMP

PR1802

RF@

4.7_0603_5%

SNB_1.8V

1 2

5

NC

LX_1.8V+3VB_1.8V

6

LX

EN_1.8V

7

EN

8 9

12

PL1801

1UH_DFE201612R-H-1R0M-P2_2.6A_20%

1 2

20K_0201_1%

10K_0201_1%

12

PC1805

@

0.1U_0201_6.3V6K

2

1

+1.8V_PRIMP

12

PC1804

22U_0603_6.3V6M

12

2.2U_0402_25V6M

PJ1802

@

JUMP_43X39

112

12

PC1808

RF@

PC1818

PC1807

12P_0201_50V8J

RF@

100P_0402_50V8J

2

+1.8V_PRIM

B B

A A

COMPAL confidential circuit for HP

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2018/2/2

Compal Secret Data

Deciphered Date

2

2022/2/2

Compal Electronics, Inc.

Title

Size Document Number Rev

Friday, June 08, 2018

Date: Sheet of

1.8VALW

1

45 53

0.1C

5

4

3

2

1

D D

+8.4VB

12

PCH_PWR_EN(12,29,39,45,48)

C C

high >1.35V

B B

A A

VCC_PRIM_PG(48)

+1.0V_PRIMP_PG

5

PJ1001

@

2

112

JUMP_43X79

12

PC1013

PC1014

68P_0201_25V8

0.1U_0402_25V6

RF@

@RF@

@

1 2

0_0201_5%

1 2

+5VALW

12

PR1001

PR1810

0_0201_5%

PR1004 10K_0201_1 %

12

PC1001

EMI@

2200P_0402_50V7K

12

PR1003

5.1_0402_1%

1 2

PR1010 10K_0201_1 %

12

PC1003

0.1U_0402_25V6

@EMI@

PR1005 1M_0201_1 %

12

PC1004

10U_0603_25V6M

PC1006

2.2U_0603_ 10V6K

12

PC1010

2.2U_0603_ 10V6K

PC1012

@

12

0.1U_0201_ 6.3V6K

VBYP_+1.0V

VIN_+1.0V

4

3

4

VIN

EN

2

VBYP

RT6219CGQW _WDFN10_3 X3

1

PGOOD

6

VCC

PC1005

0.1U_0603_ 25V7K

1 2

VFB=0.6V Vout=0.6V*(1+Rup/Rdown) =1.05V

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

PU1001

SW

FB

10

9

8

5

PR1009

1 2

0_0603_5%

LX_+1.0V

FB_+1.0V

BST_+1.0V BST_+1.0V_R SNUB_1V

7

BOOT

PGND

11

RF@

4.7_0805_5%

1 2

0.47UH_MMD -04AB-R47M-V2_6A_20%

Issued Date

PR1002

PL1001

PC1002

RF@

680P_0402_ 50V7K

1 2

IOCP=5A(min), 6A(typ)

12

Rup

Rdown

2018/2/2 2022/2/2

12

PR1006

15K_0201_1%

12

PR1007 20K_0201_1 %

Compal Secret Data

PC1011

22P_0402_50V8J

Deciphered Date

2

+1.0V_PRIMP

12

PC1007

22U_0603_6.3V6M

PJP10

@

JUMP_43X118

2

112

+1.0V_PRIM

+1.0V_PRIMP

12

PC1008

12

PC1015

PC1009

RF@

22U_0603_6.3V6M

12P_0201_50V8J

22U_0603_6.3V6M

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Date: Sheet of

Compal Electronics, Inc.

PWR-+1VALW

0.1Custom

46 53Friday, June 08 , 2018

1

46 53Friday, June 08 , 2018

0.1Custom

COMPAL confidential circuit for HP

5

D D

PJI1

@

JUMP_43X39

2

+8.4VB

12

C C

112

12

PCI14

PCI13

68P_0201_25V8

0.1U_0402_25V6

RF@

@RF@

12

PCI1

EMI@

0.1U_0402_25V6

12

PCI2

PCI3

@

10U_0603_25V6M

4

1 2

SUSP# (12,29 ,39,44)

PRI7

0_0201_5%

3

MODE=GND (VCCIO)

+3VS

PRI1

@

100K_0201_ 1%

1 2

PM_SLP_S0#(9,11,12,29,49)

7

6

PUI1

VIN_+VCCIOP

1

LP#

VIN

EN

C1

C0

MODE

PG133V3

5

12

PCI9

PRI8

@

1M_0201_1%

0.1U_0201_6.3V6K PRI2

1 2

20K_0201_1%

3

4

MODE=Float (VCCPCH) MODE=100Kohm to GND (EDRAM/EOPIO) MODE=150Kohm to GND (Others)

PRI4

SW

2.2_0402_1%

1 2

SW_VCCIOP

8

12

2

11

+3VALW

BST_+VCCIOP BST_R_+ VCCIOP

9

BST

VOUT

PGND

AGND

NB681GD-Z_QFN 13_2X3

10

12

PCI4 1U_0402_6 .3V6K

12

PRI12 0_0201_5%

PCI5

0.1U_0402_ 25V6

1 2

0.47UH_MMD -04AB-R47M-V2_6A_20%

PRI10

6.8_0402_5%

PRI9 0_0201_5%

1 2

PRI11

0_0201_5%

PLI1

1 2

12

2

IOCP=7A~8A(typ)

12

PCI6

22U_0603_6.3V6M

VCCIO_SENSE (12)

VSSIO_SENSE (12)

1

+0.85VS_VCCIOP

12

PCI8

PCI7

PCI10

RF@

22U_0603_6.3V6M

2.2U_0402_25V6M

+0.85VS_VCCIOP

12

PCI12

PCI11

@RF@

RF@

82P_0201_50V8J

100P_0402_50V8J

PJP11

@

JUMP_43X39

2

112

+0.85VS_VCCIO

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2018/2/2 2022/2/2

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Date: Sheet of

Compal Electronics, Inc.

PWR-+0.85VS_VCCIO

1

47 53Friday, June 08 , 2018

0.1Custom

COMPAL confidential circuit for HP

5

4

3

2

1

D D

+3VS

PRH2 100K_0201_ 1%

1 2

PRIM_CORE_LPM(11)

CORE_VID1_R

CORE_VID0_R

100K_0201_ 1%

PUH1

1

5

3

4

PRH5

+8.4VB

C C

PJH1

@

2

112

JUMP_43X79

12

PCH16

PCH15

68P_0201_25V8

0.1U_0402_25V6

RF@

@RF@

12

PCH5

PCH4

RF@

100P_0402_50V8J

2.2U_0402_25V6M

PCH_PWR_EN(12,29,39,45,46)

12

PCH8

EMI@

2200P_0402_50V7K

PCH6

0.1U_0201_25V6K

@EMI@

PRH6

1 2

0_0201_5%

12

PCH1

PCH2

@

10U_0603_25V6M

12

PRH7 1M_0201_1 %

CORE_VID1(13)

CORE_VID0(13)

12

PCH23

VCC_PRIM_PG(46)

@

0.1U_0201_6.3V6K

0_0201_5%

1 2

PRH8

1 2

PRH9

0_0201_5%

VIN

EN

C1

C0

6

LP#

PG133V3

1 2

0_0201_5%

1 2

7

MODE

MODE=GND (VCCIO) MODE=Float (VCCPCH) MODE=100Kohm to GND (EDRAM/EOPIO) MODE=150Kohm to GND (Others)

PRH14

@

BST_+VCCPRIMP BST_R_+VCCPRIMP

9

BST

VOUT

PGND

AGND

NB681GD-Z_QFN 13_2X3

10

12

PCH3 1U_0402_6 .3V6K

SW

PRH4

2.2_0402_1%

1 2

SW_VCCPRIMPVIN_+VCCPRIMP

8

12

2

11

+3VALW

PCH7

0.1U_0402_ 25V6

1 2

PLH1

0.47UH_MMD -04AB-R47M-V2_6A_20%

1 2

+VCCPRIMP_CORE +VCCPRIM_CORE

IOCP=7A~8A(typ)

12

PCH9

PCH10

22U_0603_6.3V6M

PJH2

@

JUMP_43X79

112

12

PCH12

PCH13

RF@

22U_0603_6.3V6M

2.2U_0402_25V6M

2

+VCCPRIMP_CORE

12

PCH17

PCH14

RF@

12P_0201_50V8J

100P_0402_50V8J

+3VALW

12

B B

PRH10

@

100K_0201_1%

12

PRH12

@

100K_0201_1%

PRH11

@

100K_0201_1%

CORE_VID1_R

CORE_VID0_R

12

PRH13

@

100K_0201_1%

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2018/2/2 2022/2/2

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Date: Sheet of

Compal Electronics, Inc.

PWR-+VCCPRIM

48 53Friday, June 08 , 2018

1

48 53Friday, June 08 , 2018

0.1Custom

COMPAL confidential circuit for HP

+3VALW

5

VRA_VDD18

+3VALW

4

3

2

1

PRZ1

0_0201_5%

@

1 2

D D

VRACPU_PE

PCZ1

PRZ4

1 2

0_0201_5%

1 2

0.1U_0402_10V6K

PRZ2

0_0201_5%

@

1 2

ADDRP

PRZ5

0_0201_5%

1 2

+3VALW

+1.0V_VCCST

PRZ13

PRZ12

@

C C

H_PROCHOT#(5,29)

VR_PWRGD(29)

SOC_SVID_CLK(14)

SOC_SVID_ALERT#_R(14)

SOC_SVID_DAT(14)

B B

12

PCZ6

PRZ17

PRZ18

1 2

47_0201_1%

100_0201_1%

12

Y@

1/20W 154K +-1% 0201

12

PRZ19

1 2

PRZ29

10K_0201_1%

PRZ38

1U_0402_6.3V6K

ADDRP

1 2

PRZ35 154K_0201_1%

PCZ8 220P_0402_50V8J

PRZ38 133K +-1% 0201YR@

1 2

PCZ9 220P_0402_50V8J

1 2

PRZ41 620K_0402_1%

PCZ10 47P_0402_50V8J

1 2

10K_0201_1%

PM_SLP_S0#(9,11,12,29,47)

SMB_BS_CLK(26,29)

SMB_BS_DATA(26,29)

12

1 2

10K_0201_1%

PRZ24 49.9_0201_1%

PRZ26 10_0201_1%

VRACPU_PE

PRZ30 0_0201_5%

1 2

PRZ32 61.9K_0201_1%

PRZ3

1 2

10K_0201_1%

VR_PWRGD

+3VALW

VR_ON(29)

PRZ14

@

1 2

10K_0201_1%

@

PRZ20

0_0201_5%

1 2

@

PRZ22

0_0201_5%

12

CSUMA

CSUMB

VRASA_CSUMC

VRACPU_VTEMP(50) VCCSA_SENSE (15)

12

PCZ5

1 2

0.1U_0402_10V6K

VRACPU_IREF

VRAGT_IMON

VRACPU_IMON

VRASA_IMON

PRZ7

0_0201_5%

PRZ39 0_0201_5%

1 2

+8.4VB

PRZ8

2M_0201_1%

PRZ11

133K_0201_1%

37

35

33

32

31

30

27

29

28

25

46

36

24

18

19

20

21

22

23

1U_0402_6.3V6K

1 2

EN

SLP_S0#

SCL_P

SDA_P

VRHOT#

VRRDY

SCLK

ALT#

SDIO

ADDR_P

PSYS

PE

IREF

CSSUMA

CSSUMB

CSSUMC

IMONA

IMONB

IMONC

12

PCZ11

PCZ2

PRZ9

4.7_0201_5%

1 2

VRA_VDD18

VRA_VDD33

12

0.01U_0402_50V7K

49

AGND

12

PCZ3

1U_0402_6.3V6K

26

47

VDD3344VDD18

VIN_SEN

PUZ1YR@

MP2949AGQKT-0026-Z

(Link SA0000AG630)

TEMP45VDIFFC14VFBC15VORTNC17VOSENC

12

PRZ42

49.9K_0201_1%

1 2

PRZ44

12.1K_0201_1%

PWM1

PCZ4

2.2U_0402_6.3V6K

41

PWM143PWM242PWM3

1 2 12

@

40

16

VRASA_VOSEN

VRASA_VORTN

@

PRZ55 10K_0201_1%

PCZ184

0.1U_0201_6.3V6K

PUZ1

Y@

MP2949AGQKT-0024

PWM5

0_0201_5%

34

PWM638PWM539PWM4

STB

5

CS1

4

CS2

3

CS3

2

CS4

1

CS5

48

CS6

6

VDIFFA

7

VFBA

8

VOSENA

9

VORTNA

10

VDIFFB

11

VFBB

12

VOSENB

13

VORTNB

PRZ6

0_0201_5%

PRZ10

0_0201_5%

PRZ54

VRAGT_VDIFF

VRAGT_VFB

VRACPU_VDIFF

VRACPU_VFB

PRZ40 0_0201_5%

1 2

PRZ43 0_0201_5%

1 2

12

1 2

PRZ27

3.65K_0402_1%

1 2

PRZ34

YR@

3.16K +-1% 0402

PRZ34

Y@

1/16W 3.65K +-1% 0402

100_0201_1%

PRZ62

1 2

12

PRZ63 100_0201_1%

VRAGT_PWM1 (50)

VRACPU_PWM1 (50)

VRASA_PWM1 (50)

VRACPU_STB (50)

PRZ21 1.5K_0201_1%

PRZ23 1.5K_0201_1%

PRZ25 1.5K_0201_1%

10K_0201_1%

@

PRZ56

10K_0201_1%

@

PRZ57

+VCC_SA

VSSSA_SENSE (15)

CS1

CS5

1 2

0.1U_0201_6.3V6K

@

PCZ185

12

1 2

0.1U_0201_6.3V6K

@

PCZ186

1 2

12

PRZ15

0_0201_5%

PRZ16

0_0201_5%

100_0201_1%

1 2

12

CSUMA

CSUMB

VRASA_CSUMC

PRZ58

PRZ59 100_0201_1%

100_0201_1%

PRZ60

1 2

12

PRZ61 100_0201_1%

VRAGT_CS1 (50)

VRACPU_CS1 (50)

VRASA_CS1 (50)

+VCC_GT

+VCC_CORE

VOSENA

VORTNA

VOSENB

VORTNB

PRZ28

0_0201_5%

PRZ33 0_0201_5%

PRZ36

0_0201_5%

PRZ37

0_0201_5%

CLOSE CPU SIDE

12

VCCGT_SENSE (14)

VSSGT_SENSE (14)

VCCSENSE (14)

VSSSENSE (14)

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

2018/2/2 2022/2/2

2

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Nu mber Rev

Date: Sheet of

Compal Electronics, Inc.

PWR-CORE IC

1

49 53Friday, June 08, 2018

0.1Custom

COMPAL confidential circuit for HP

5

4

3

2

1

+8.4VB_CPU

PJZ01

@

JUMP_43X79

2

112

12

+3VALW

D D

VRACPU_PWM1(49)

VRACPU_VTEMP(49)

VRACPU_STB( 49)

VRACPU_CS1( 49)

PCZ12

1U_0402_6.3V6K

PRZ47 0_0201_5%

1 2

12

PUZ2

14

VCC

13

AGND

9

PWM

11

VTEMP/FLT

10

SYNC

PGND

12

PGND

CS

PGND

MP86901-CGLT-Z_TQFN21_3X4

1

VIN

8

VIN

15

BST

2

SW

3

SW

4

SW

5 6 7

12

CORE_BST

PCZ13

1U_0603_25V7K

12

PCZ17 1U_0402_16V6K

12

PCZ254

PCZ15

PCZ14

@RF@

82P_0201_50V8J

10U_0603_25V6M

PRZ46

RF@

4.7_0603_5%

1 2

CORE_LX

12

0.12UH TMPC0512HP-R12MG-Z03 12A

1 2

Due to Z heihgt limitataion and Cost condition, use 47U_D3_16VM_R40M SGA0000AP00 x2 pcs.

PCZ266

PCZ265

68P_0201_25V8

0.1U_0402_25V6

RF@

@RF@

PCZ16

RF@

680P_0402_50V7K

1 2

PLZ1

+8.4VB

+VCC_CORE

CPU_CORE FSW = 800kHz

+8.4VB_CPU

C C

12

+3VALW

12

PCZ21

1U_0402_6.3V6K

VRAGT_PWM1(49)

VRACPU_VTEMP

VRACPU_STB

VRAGT_CS1(49)

PRZ50 0_0201_5%

1 2

PUZ3

14

VCC

13

AGND

9

PWM

11

VTEMP/FLT

10

SYNC

PGND

12

PGND

CS

PGND

MP86901-CGLT-Z_TQFN21_3X4

1

VIN

8

VIN

GT_BST

15

BST

2

SW

3

SW

4

SW

5 6 7

PCZ18

1U_0603_25V7K

12

PCZ23 1U_0402_16V6K

12

PCZ20

PCZ19

10U_0603_25V6M

PRZ49

RF@

4.7_0603_5%

1 2

0.12UH TMPC0412HP-R12MG-Z03 12A

GT_LX

1 2

PCZ22

RF@

680P_0402_50V7K

1 2

PLZ2

+VCC_GT

GT_CORE FSW = 800kHz

B B

12

SA_BST

PCZ24

1U_0603_25V7K

12

PCZ28 1U_0402_16V6K

+3VALW

12

PCZ26

1U_0402_6.3V6K

VRASA_PWM1(49)

VRACPU_VTEMP

VRACPU_STB

VRASA_CS1(49)

A A

PRZ53 0_0201_5%

1 2

PUZ4

12

VCC

11

AGND

7

PWM

9

VTEMP/FLT

8

SYNC

10

PGND

CS

MP86901-AGQT-Z_TQFN13_3X3

1

VIN

6

VIN

13

BST

2

SW

3

SW

4

5

COMPAL confidential circuit for HP

5

4

+8.4VB_CPU

12

PCZ25

10U_0603_25V6M

PCZ27

RF@

PRZ52

RF@

4.7_0603_5%

1 2

0.47UH_MMD-04AB-R47M-V2_6A_20%

SA_LX

680P_0402_50V7K

1 2

PLZ3

1 2

+VCC_SA

SA_CORE FSW = 800kHz

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2018/2/2 2022/2/2

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR-IA/GT/SA

50 53Friday, June 08, 2018

1

50 53Friday, June 08, 2018

0.1C

A

Place on secondary side, underneath the package

0.1U_0201*12 pcs Near Package 22U_0603 * 16 pcs+1U_0201*2 pcs 68p_0402*1+2200p_0402*1

B

C

Place on secondary side, underneath the package

0.1U_0201 * 20 pcs near package 22U_0603 * 16 pcss 68p_0402*1+2200p_0402*1

D

E

+VCC_CORE +VCC_GT

1

1 1

2 2

1

PCZ29

2

22U_0603_6.3V6M

1

PCZ69

2

YR@

47U 6.3V M X5R 0603

12

PCZ95

0.1U_0201_6.3V6K

12

PCZ217

0.1U_0201_6.3V6K

1

PCZ31

PCZ30

22U_0603_6.3V6M

PCZ72

47U 6.3V M X5R 0603

PCZ96

0.1U_0201_6.3V6K

PCZ218

0.1U_0201_6.3V6K

PCZ32

2

22U_0603_6.3V6M

47U 6.3V M X5R 0603

22U_0603_6.3V6M

12

PCZ229

YR@

12

PCZ97

12

PCZ215

22U_0603_6.3V6M

12

PCZ231

YR@

47U 6.3V M X5R 0603

12

PCZ98

0.1U_0201_6.3V6K

12

PCZ221

0.1U_0201_6.3V6K

1

PCZ35

PCZ34

2

YR@

47U 6.3V M X5R 0603

PCZ35

Y@

PCZ38

Y@

PCZ34

Y@

12

PCZ99

PCZ100

0.1U_0201_6.3V6K

12

PCZ219

PCZ216

0.1U_0201_6.3V6K

1

PCZ36

2

YR@

47U 6.3V M X5R 0603

Y@

22U_0603_6.3V6M

Y@

22U_0603_6.3V6M

Y@

22U_0603_6.3V6M

12

PCZ101

0.1U_0201_6.3V6K

12

PCZ220

0.1U_0201_6.3V6K

1

PCZ38

PCZ37

2

YR@

47U 6.3V M X5R 0603

PCZ69

PCZ37

PCZ51

12

PCZ102

PCZ103

0.1U_0201_6.3V6K

12

PCZ242

PCZ222

1U_0201_6.3V6M

0.1U_0201_6.3V6K

YR@

1

PCZ51

PCZ50

2

YR@

22U_0603_6.3V6M

47U 6.3V M X5R 0603

Y@

22U_0603_6.3V6M

Y@

22U_0603_6.3V6M

Y@

22U_0603_6.3V6M

12

PCZ105

PCZ104

0.1U_0201_6.3V6K

12

PCZ243

PCZ244

1U_0201_6.3V6M

YR@

1

2

PCZ229

PCZ36

PCZ231

12

PCZ52

47U 6.3V M X5R 0603

12

PCZ106

0.1U_0201_6.3V6K

12

PCZ245

1U_0201_6.3V6M

YR@

12

PCZ135

PCZ134

68P_0201_50V8J

@RF@

PCZ246

1U_0201_6.3V6M

YR@

PCZ192

PCZ191

68P_0201_50V8J

2200P_0201_50V7K

@RF@

12

PCZ247

1U_0201_6.3V6M

YR@

2200P_0201_50V7K

@RF@

12

PCZ249

PCZ248

1U_0201_6.3V6M

YR@

12

PCZ194

68P_0201_50V8J

@RF@

12

PCZ250

1U_0201_6.3V6M

YR@

12

PCZ196

PCZ193

68P_0201_50V8J

2200P_0201_50V7K

@RF@

12

PCZ251

PCZ252

1U_0201_6.3V6M

YR@

12

PCZ195

2200P_0201_50V7K

@RF@

PCZ253

1U_0201_6.3V6M

YR@

PCZ197

PCZ198

68P_0201_50V8J

2200P_0201_50V7K

@RF@

1

2

12

PCZ67

68P_0201_50V8J

@RF@

12

1

PCZ46

PCZ39

47U 6.3V M X5R 0603

12

PCZ82

0.1U_0201_6.3V6K

PCZ223

1U_0201_6.3V6M

PCZ41

PCZ40

2

PCZ68

2200P_0201_50V7K

@RF@

12

PCZ83

12

2

47U 6.3V M X5R 0603

12

PCZ199

68P_0201_50V8J

@RF@

12

0.1U_0201_6.3V6K

1

PCZ224

2

1U_0201_6.3V6M

@

2

47U 6.3V M X5R 0603

12

PCZ200

PCZ201

68P_0201_50V8J

@RF@

2200P_0201_50V7K

@RF@

12

PCZ86

PCZ88

0.1U_0201_6.3V6K

1

PCZ232

PCZ234

2

47U 6.3V M X5R 0603

1

PCZ48

PCZ54

2

@

47U 6.3V M X5R 0603

12

PCZ203

PCZ202

68P_0201_50V8J

@RF@

2200P_0201_50V7K

@RF@

12

PCZ91

PCZ89

0.1U_0201_6.3V6K

12

PCZ237

PCZ235

@RF@

82P_0201_50V8J

47U 6.3V M X5R 0603

@RF@

1

PCZ255

22U_0603_6.3V6M

12

PCZ108

0.1U_0201_6.3V6K

PCZ236

2200P_0201_50V7K

PCZ257

PCZ256

2

@

22U_0603_6.3V6M

12

PCZ204

@RF@

2200P_0201_50V7K

12

PCZ109

12

PCZ238

@RF@

PCZ206

PCZ205

68P_0201_50V8J

@RF@

2200P_0201_50V7K

@RF@

12

PCZ110

0.1U_0201_6.3V6K

12

PCZ239

0.1U_0201_6.3V6K

@RF@

82P_0201_50V8J

12

PCZ112

PCZ111

0.1U_0201_6.3V6K

PCZ240

@RF@

2200P_0201_50V7K

PCZ114

0.1U_0201_6.3V6K

12

PCZ241

0.1U_0201_6.3V6K

@RF@

3 3

22U_0603 * 7 pcs + 1U_0201 * 1 pcs 68p_0402*1+2200p_0402*1

+VCC_SA

1

PCZ258

2

47U 6.3V M X5R 0603

4 4

COMPAL confidential circuit for HP

A

1

PCZ260

PCZ259

2

22U_0603_6.3V6M

B

1

PCZ261

2

22U_0603_6.3V6M

12

PCZ263

PCZ262

2

22U_0603_6.3V6M

12

PCZ156

1U_0201_6.3V6M

12

PCZ158

PCZ157

68P_0201_50V8J

RF@

0.047U_0201_10V6K

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

12

PCZ207

68P_0201_50V8J

RF@

Issued Date

12

PCZ208

RF@

0.047U_0201_10V6K

C

12

PCZ209

PCZ210

68P_0201_50V8J

RF@

0.047U_0201_10V6K

12

PCZ212

PCZ211

68P_0201_50V8J

RF@

0.047U_0201_10V6K

2018/2/2 2022/2/2

12

PCZ213

68P_0201_50V8J

RF@

Compal Secret Data

PCZ264

PCZ214

RF@

12P_0201_50V8J

RF@

0.047U_0201_10V6K

Deciphered Date

D

Compal Electronics, Inc.

Title

PWR-CPU CAP

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR-CPU CAP

E

51 53Friday, June 08, 2018

0.1Custom

5

4

3

2

1

Power SwitchUSB PD

D D

Buck-Boost Charger

ISL9538

Battery RBFET

C C

+8.4VB

EC_ON

SYSON

1.05V_PRIMCORE_PG

+1.8V_PG

EN

EN_VDDQ

EN_VTT

SY8286

EN

NB681

EN

SY8286B

SY8288C

SY8210D

+3VALWP

+5VALWP

+1.1V_VDDQP

+1.05V_PRIMP

+1.5V_PRIM_COREP

Jumper

+3VALW

+5VALW

+1.1V_VDDQ

+0.6VS_VTT+0.6VSP

+1.05V_PRIM

+1.5V_PRIM_CORE

PCH_PWR_EN

SY8032

EN

Jumper

+1.8V_PRIM+1.8VALWP

MP2940-0020

+VCCIN

B B

A A

COMPAL confidential circuit for HP

5

VR_ON

EN

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2018/2/2

3

Compal Secret Data

Deciphered Date

2022/2/2

2

Compal Electronics, Inc.

Title

Size Document N umber Rev

Date: Sheet of

Power Block Diagram

LA-F801P

Friday, June 08, 201 8

LA-F801P

5352

1

5352

0.1

5

PV Version change list (P.I.R. List)

4

3

2

1

Item Material

1

D D

2

3

4

5

6 7

8

9

10

C C

11

12

13

14

15

16

Date

2018/05/30

2018/05/31

2018/06/04

2018/06/07

S RES 1/16W 3.16K +-1% 0402 to S RES 1/16W 3.65K +-1% 0402

S RES 1/20W 133K +-1% 0201 to S RES 1/20W 154K +-1% 0201

S RES 1/10W 4.7 +-5% 0603 to S RES 1/10W 3.3 +-1% 0603

S CER CAP 680P 50V K X7R 0201 to S CER CAP 1000P 50V K X7R 0201

S RES 1/20W 100K +-1% 0201to S

RES 1/20W 71.5K +-1% 0201 S CER CAP .1U 16V K X7R 0603 to S CER CAP 0.1U 50V K X7R 0603

S CER CAP 4700P 25V K X7R 0402 to S CER CAP 4700P 50V K X7R 0402

S CER CAP 12P 25V J NPO 0201 to

S CER CAP 12P 50V J NPO 0201

S CER CAP 220P 25V K NPO 0402

to S CER CAP 220P 50V J NPO 0402

Delete S RES 1/20W 0 +-5% 0201

S CER CAP 2200P 50V K X7R 0201to S CER CAP 0.047U 10V K X5R 0201

S CER CAP 82P 50V J NPO 0201 to S CER CAP 68P 25V J NPO 0201

S RES 1/20W 0 +-5% 0201 to

S RES 1/20W 20K +-1% 0201

add S RES 1/16W 6.8 +-5%

0402,S RES 1/20W 0 +-5% 0201

S CER CAP 100P 50V J NPO 0402 to S CER CAP 100P 50V J NPO 0201

Reson For Change

FAE recommend for KBL Y

RF MLCC shortage lead to change

shortage

KBL_YRefresh

local sense to remote sense PRI9,PRI10,PRI11,PRI12

connetor bigger PC16

shortage

Location

PRZ34

PRZ38

PRM2

、

PR314

PC337,PCM5

PRM4,PRM6

PCM6

PCB23shortage

PC342,PC343,PC1015,PC1818,PCH17,PCM23,PCZ264

PCZ8,PCZ9

PRI3KBL_YRefresh

PCZ158,PCZ208,PCZ210,PCZ212,PCZ214

PC339,PC341,PC1014,PCB41,PCB45,PCB47,PCB49,PCB51, PCB53,PCB55,PCB57,PCB59,PCB61,PCB63,PCB65,PCB67, PCB69,PCH16,PCI14,PCM22,PCM25,PCZ266

PRI2

PCZ156,PCZ223,PCZ2241U 6.3V K X5R 0402 to 1U 6.3V M X5R 0201

Phase

PV

17

B B

21

22 23

24

25 26

27 28

29

30

A A

31

COMPAL confidential circuit for HP

5

4

Security Classification

Issued Date

FAE recomment for IMON

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2018/2/2 2022/2/2

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PIR

LA-F801P

1

53 53Friday, June 08, 2018

0.1

5

Item

Item Issue Description

ItemItem

Page# Title

Page#Page#

Title

TitleTitle

Date

DateDate

4

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Request

RequestRequest Owner

Owner

OwnerOwner

Issue DescriptionDate

Issue DescriptionIssue Description

3

2

Page 1

Page 1Page 1

1

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

Rev.Page#

Rev.Rev.

D D

C C

B B

A A

1 10 18/3/16

2

3

4

30 change R38 From SD028560080 to SD000009O8018/3/22change R30 From 1.3K to 1.8K

5

25 WWAN Pcie change EQ setting 18/3/22 un-pop RW6,RW18 & pop RW7,RW19

6

21 change CD122,CD248,CD249

7

13 change LC3 & L24 PN 18/3/22 change from SM01000HC00 to SM01000NY00

8

12,18 change CC117 & C5245 PN 18/3/23 change from SE000000K80 to SE00000QL10 0.2

9

29 EC swaps pin for KB backlight 18/3/28

10

11 For Port 3 USB2.0 function 18/4/3 pop RH125

11

12

29 remove RK1818/4/3

13

28 18/4/10 remove CA98,CA99RF

14

26 remove D6ESD

15

27 remove DA10,DA11ESD

16

28 remove DA6,DA9ESD

17

28 pop RA4818/4/11 HW

18

18 18/4/16 Add CC400~CC404RF

19

18 pop more CapRF

20

13 remove CA98,CA99RF

21 HW

14 18/4/16 un-pop RC147,RC148

22

23

39 18/4/18 Add CC411~CC425RFRF request

24

25

33 Change RT12 size HW Change from (0402) SD000011980 to (0201) SD000024G0018/4/19

26

11 HW18/4/19 pop UH3 , un-pop RC579HW Design change

27

28

29

39 pop CH47RFRF request 18/4/19

30

39 RF request 18/4/19 RF pop CC387,CC388

31

29 18/4/20 HW change from15K to 27KChange board ID

change R38 From 560 to 1.91K

from 6.3V to 10V

For KB mute LED function29 un-pop RK6418/4/3

HW Design change

RF request

ESD request

HW Design change

RF request

HW Design change

RF request

Intel request

Intel request 36 By USB3.1 Type-C USB-IF ECN

18/3/22 change from SE000006E00 to SE00000TH00

18/4/10

18/4/16

18/4/19

HW

HW18/4/1938

HW

Add RC580 10Kohm PU to +3VALW_DSWPM_BATLOW# Add 10K PU HW

Add type-C additional featuresPM_BATLOW# Add 10K PU 18/3/1629,35,36 0.2

change R30 From SD034130180 to SD00000R58031 18/3/22 0.2

KBL_ON# change to M9 MUTE_LED_OUT change to M2 TS_INT#_EC change to N9

Add CC405~CC41018/4/1631 RF

Change from SA00005I950 to SA00007XA107 Change UC2 to 16M HW18/4/18

By USB3.1 Type-C USB-IF ECN

0.2

Security Class ification

COMPAL confidential circuit for HP

5

4

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/3/2 0 2020/3/2 0

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW PIR

LA-F803P

54 55Friday, June 08, 20 18

1

0.1

5

Item

Item Issue Description

ItemItem

Page# Title

Page#Page#

Title

TitleTitle

Date

DateDate

4

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Request

RequestRequest Owner

Owner

OwnerOwner

Issue DescriptionDate

Issue DescriptionIssue Description

3

2

Page 1

Page 1Page 1

1

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

Rev.Page#

Rev.Rev.

D D

C C

1 NA 17'_1019

NA HW 0.

B B

A A

Security Class ification

COMPAL confidential circuit for HP

5

4

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/3/2 0 2020/3/2 0

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW PIR

LA-F803P

55 55Friday, June 08, 20 18

1

0.1

Compal LA-F803P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual