Compal LA-E903P Schematics

A

1 1

B

C

D

E

Compal Confidential

2 2

C5V08/C5V09/D5PR8 Schematics Document

AMD Bristol Ridge/Stoney Ridge Platform

APU 15W/35W + Radeon R17M-P1-50/70/G1-70 25W/40W/50W

3 3

LA-E903P REV:1.A

2017-04-18

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

COVER PAGE

COVER PAGE

COVER PAGE

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

150Tuesday, May 02, 2017

150Tuesday, May 02, 2017

150Tuesday, May 02, 2017

E

1.A

1.A

1.A

A

Compal Confidential

Model Name : Wartortle_BS

B

C

D

E

(Channel A)

1 1

GPU
S4 Package

PEG x8

RX540 : R17M-P1-50
RX550 : R17M-P1-70
RX560 : R17M-G1-70

page 15~23

Display Port

USB2.0

eDP Conn.

page 27 page 26

Port 3

2 2

Port 1Port 0

HDMI Conn.

AMD

BRISTOL RIDGE
STONEY RIDGE
Co-Lay

Memory BUS(DDR4)

1.2V DDRIV
1866Mhz

USB2.0

S/B

2.0 Conn.

USB3.0

260pin DDRIV SO-DIMM

Port 1

page 31 page 31

S/B

2.0 Conn.

page 13

Port 2Port 0

WLAN/BT
Combo

page 29

Port 1,2

page 32

Type-C

3.0 Conn.

AMD FP4 APU

PCIE

BGA 968-balls

Port 2, 3

page 30

SSD
NGFF Conn.

Port 0

LAN+CR
RTL8411

page 28

USB2.0

Port 2

Transformer
RJ45

page 28 page 28

3 3

Fan Control

page 35

Card Reader
Conn.

Port 1

WLAN/BT
NGFF Conn.

page 29

page 10

BIOS (8M)

SPI

page 33

Discrete TPM

page 6~12

LPC

ENE
KBC9022

page 24 page 30

PS2

page 33

HD Audio(AZ)

SATA III

I2C

Port 1

G-Sensor

(Reserve)

Port 3

PTP
(BR/SR)

HDD
Conn.

page 33

Port 0

page 30

Port 1

SSD
NGFF Conn.

page 30

(Channel B) *SR only Ch B

260pin DDRIV SO-DIMM

Port 3

Camera

page 27

Port 3

page 31

M/B

3.0 Conn.

Port 5

Audio
ALC255

page 27

Int. DMIC
on Camera

Int. Speaker
Conn.

Port 7

page 34

page 34

page 14

page 31

UAJ
on Sub/B

Int.KBD

RTC CKT.

page 11

Power On/Off CKT.

DC/DC Interface CKT.

4 4

Power Circuit DC/DC

VRAM Config Table

page 33

page 25

page 38~51

page 23

A

Sub Board

LS-E901 USB2.0/B

LS-E892 Hall Sensor/B

page 31

page 33

www.schematic-x.blogspot.com

Security Classific ation

Security Classific ation

Security Classific ation

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

BLOCK DIAGRAMS

BLOCK DIAGRAMS

BLOCK DIAGRAMS

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

E

of

of

250Tuesday, May 02, 2017

of

250Tuesday, May 02, 2017

250Tuesday, May 02, 2017

1.A

1.A

1.A

5

PJP101
AC-IN

PU301

20493mA

+19VB

5416mA

2843mA

449mA

514mA

2311mA

+19V_VIN

+17.4V_BATT

D D

PJP201
DC-IN

C C

PU801

PU901

PU501

PU601

PU401

+APU_CORE

+APU_CORE_NB

+APU_GFX

+1.2V

6500mA

+0.6VS

1200mA

9300mA

+0.95VALW

(+1.05VALW)

+3VLP

KB9022

B B

+5VALW

14000mA3685mA 6500mA

PU401

L11

379mA
427mA

+INVPWR_B+

Panel BackLight

1500mA

A A

To VGA
+VGA_CORE
+VDDCI/VDD_08
+1.35VSDGPU

2969mA

13305mA

4

+3VALW

1753mA

212mA

PU602

PU902

7285mA

+1.8VALW

3213mA

+0.775VALW

U2

+3VS

+5VS

8500mA

1700mA

JRTC1

304mA

To VGA

1013mA

PU502

U2606

U1302

10mA

JUSB3

+0.95VS

U4

To VGA

+1.8VS

U3

U102

RM9

RL2

R463

U13

R212

U8

RW2

RW1

U45

R110

RS10

JPA8

U25

RO3

RF1/RF7

JPA1

U73

3

+RTC_APU_R

+2.5V

55000mA

17000mA

45000mA

200mA

1500mA

1500mA +0.95VS_GFX

7000mA

3000mA

200mA

500mA

200mA

800mA

900mA

45mA

400mA

3500mA

1200mA

125mA

3500mA

1400mA

200mA

1500mA

1500mA

50mA

1mA

200mA

290mA

250mA

3000mA

2000mA

2500mA

2000mA

2000mA

1500mA

1000mA

+VCC_FAN1

+APU_CORE

+APU_CORE_NB

+APU_GFX

+3VS

+1.8VS

+0.95VS

+1.2V

+3VALW

+1.8VALW

+1.8VS

+0.95VALW

+APU_CORE_FCH

+RTC_APU_R

+2.5V

+1.2V

+0.6VS

+3VS_SSD_NGFF

+3V_LAN

+TP_VCC

+3VS_WLAN

+LCDVDD

+3VS_TPM

+3VALW_TPM

+3VS_CAM

+1.2V_HDMI

+3VALW_CC

+5VALW_CC

+USB3_VCCA

+5VS_HDD

+VCC_FAN2

+VDDA

+5VS_DISP

2

APU Power Rail

VDDCR_CPU @0.75-1.5V

VDDCR_NB @0.75-1.2V

VDDCR_GFX @0.75-1.2V

VDD_33 @0.2A

VDD_18 @1.5A

VDDP_GFX @1.5A

VDDP @7.0A

VDDIO_MEM_S3 @3A

VDD_33_S5 @0.2A

VDD_18_S5 @0.5A

VDDIO_AUDIO @0.2A

VDDP_S5 @0.8A

VDDCR_FCH_S5 @0.9A

VDDBT_RTC_G @0.045A

DDR4 SO-DIMM/MEM-DOWN

+2.5V

+1.2V

+0.6VS

SATA Redriver

SSD

LAN RTL8411

Touch Pad

WLAN

Panel Logic

TPM

Camera

HDMI Redriver

Type C

USB3.0

USB/B

HDD

FAN1/FAN2

Audio

HDMI Logic

Group C, S0 domain

Group B, S0 domain

Group B, S3 domain

Group A, S5 domain

R17M-P1-50/70

+19VB

2969mA

+19VB

427mA

+3VS

10mA

+1.8VALW

1013mA

PU1401

PU1402

PU1001

UV7

UV8

6000mA

47000mA

10mA

1013mA

+VGA_CORE

+VDDCI+19VB 8000mA379mA

2000mA

+1.35VSDGPU

+3VSDGPU

+1.8VSDGPU

4000mA

+1.35VSDGPU

1

GPU Power Rail

VDDC @47A

@1.2V

VDDCI+VDD_08 @8A

VMEMIO @2A

VDD_GPIO33 @0.01A

VDD_18 @1A

TSVDD @13mA

VRAM x4pcs

@0.8~0.9V

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Tit le

Tit le

Tit le

Size

Size

Size

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

POWER MAP

POWER MAP

POWER MAP

Document Number Rev

Document Number Rev

Document Number Rev

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

1

350Tuesd ay, M ay 02 , 20 17

350Tuesd ay, M ay 02 , 20 17

350Tuesd ay, M ay 02 , 20 17

1.A

1.A

1.A

5

Bristol/Stoney Platform Power Sequence

4

3

2

1

AC-IN G3 --> S0

+3VLP

D D

ACIN

EC_ON

+5VALW

ON/OFFBTN#

3V_EN

+3VALW

+0.775VALW

0.95_1.8VALW_PWREN

+1.8VALW

+0.95VALW

PBTN_OUT#

EC_RSMRST#

SLP_S5#

SLP_S3#

SYSON

+1.2V

C C

+2.5V

SUSP#

+5VS

+3VS

+1.8VS

+0.6VS

KBRST#

0.95VS_PWR_EN#

+0.95VS

VR_ON

+APU_CORE

+APU_CORE_NB

+APU_GFX

VGATE

SYS_PWRGD_EC

APU_PWROK

LPC_RST#

B B

APU_PCIE_RST#

APU_RST#

VGA Sequence

PE_GPIO1

VGA_ON

+3VSDGPU

+1.8VSDGPU

VGA_ON_B

+VGA_CORE

+VDDCI

DGPU_PWROK

+1.35VSDGPU

PE_GPIO0

PLT_RST_VGA#

14.82us

227us

3.348ms, Tr = 637us

4.32us

91ms

91ms

160ms

1.033ms, Tr = 670us

1.108ms, Tr = 364us

2.385ms, Tr = 691us

841us, Tr = 382us

7ms

114ms

100ms

120us

120us

120ms

807us, Tr = 239us

1.456ms, Tr = 1.025ms

20ms

770us, Tr = 616us

823us, Tr = 599us

290us, Tr = 193us

20ms

19.97ms

317us, Tr = 146us 307us, Tr = 138us139us, Tf = 1.419ms 133us, Tf = 955us

20.2ms

1.089ms, Tr = 293us

1.103, Tr = 320us

1.112ms, Tr = 318us

1.254ms

39.81ms

14.61ms

13.38ms

1.005ms

6.709ms

228ms

1.399ms

2.769ms, Tr = 1.598ms 2.782ms, Tr = 1.598ms

6.571ms

5.880ms, Tr = 37.32us

5.943ms, Tr = 35.7us Tf = 16.42ms

5.976ms

Tr = 325us Tr = 257usTf = 8.199ms Tf = 9.667ms

206ms

1.008ns

S0 --> S3 S3 --> S0

57.1ms

Tf = 13.95ms

Tf = 21.44ms

Tf = 8.428ms

57.1ms

58.11ms

88.45ms

Tf = 4.119ms

Tf = 817us

Tf = 807us

28ms

1.418ms

2.06ms

108us

13.51ns

3.145ms

6.158ms

Tf = 754us

Tf = 3.864ms

10.6us

Tf = 5.215ms

395ns

16.7ns

6.871ns

14.88ms

733us, Tr = 575us

789us, Tr = 551us

282us, Tr = 174us

8.25us, Tr = 6.9us10.14us, Tr = 9.399us Tf = 662us Tf = 677us

19.98ms

20.22ms

21.37ms

1.098ms, Tr = 301us

1.083, Tr = 300us

1.108ms, Tr = 306us

1.249ms

39.61ms

14.6ms

13.4ms

1.004ms

6.708ms

113.9ms

1.404ms

3.568ms, Tr = 918us3.553ms, Tr = 917us

6.545ms

5.840ms, Tr = 37.84us

5.932ms, Tr = 35.6us

5.976ms

197.2ms

7.374ns

S0 --> S5

61ms

Tf = 1.135ms

Tf = 11.64ms

53.3ms

Tf = 14.83ms

Tf = 23.94ms

Tf = 8.909ms

53.27ms

53.3ms

83.5ms

Tf = 5.572ms

Tf = 698us

Tf = 803us

23.17ms

1.416ms

2.072ms

97us

36.63ns

3.001ms

6.039ms

Tf = 685us

Tf = 3.659ms

13.21us

Tf = 5.215ms

Tf = 16.42ms

390.7ns

17.79ns

8.908ns

8.532s

8.542s

Tf = 19.35ms

Tf = 9.193ms

Tf = 3.951ms

Tf = 14.24mss

9.041s

9.042s

+3VLP

ACIN

EC_ON

+5VALW

ON/OFFBTN#

3V_EN

+3VALW

+0.775VALW

0.95_1.8VALW_PWREN

+1.8VALW

+0.95VALW

PBTN_OUT#

EC_RSMRST#

SLP_S5#

SLP_S3#

SYSON

+1.2V

+2.5V

SUSP#

+5VS

+3VS

+1.8VS

+0.6VS

KBRST#

0.95VS_PWR_EN#

+0.95VS

VR_ON

+APU_CORE

+APU_CORE_NB

+APU_GFX

VGATE

SYS_PWRGD_EC

APU_PWROK

LPC_RST#

APU_PCIE_RST#

APU_RST#

VGA Sequence

PE_GPIO1

VGA_ON

+3VSDGPU

+1.8VSDGPU

VGA_ON_B

+VGA_CORE

+VDDCI

DGPU_PWROK

+1.35VSDGPU

PE_GPIO0

PLT_RST_VGA#

A A

Security Classification

Security Classificat ion

Security Classificat ion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Ele ctronics, Inc.

Compal Ele ctronics, Inc.

Compal Ele ctronics, Inc.

Title

Title

Title

Size

Size

Size

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

POWER SEQUENCE

POWER SEQUENCE

POWER SEQUENCE

Document Number Rev

Document Number Rev

Document Number Rev

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

1

450Tuesday, May 02, 2017

450Tuesday, May 02, 2017

450Tuesday, May 02, 2017

1.A

1.A

1.A

A

B

C

D

E

Vol tage R ails

Power Plane

+19V_VIN

+19VB

+APU_CORE

1 1

2 2

+APU_CORE_G FX

+APU_CORE_ FCH

+0.95VALW

+0.95VS

+1.8VALW

+1.8VS

+2.5V

+1.2V

+0.6VS

+3VALW

+3VS

+5VALW

+5VS

+RTC_APU

+3VSDGPU

+1.8VSDGPU

+VDDCI

+VGA_CORE

APU SMBus/I2C Address Table

Master

I2C Port 0
(+1.8VS)

I2C Port 1
(+1.8VS)

I2C Port 2
(+3VS)

SBMus Port 0

3 3

(+3VS)

I2C Port 3
(+3VALW)

SMBus Port 1
(+3VALW)

Description

Adapt er power s upply (19 V)

AC or ba ttery pow er rail for pow er c ircuit .

Core voltage for APU

Volt age fo r O n-di e V GA o f AP U

Volt age for GF X

Fusion Controller Hub Power Supply

0.95V always on power rail

0.95V switched power rail

1.8V always on power rail

1.8V switched power rail

2.5V power rail for AP U and DDR

1.2V power rail for AP U and DDR

0.6V switched power r ail for DDR terminator

0.775V always on power rail+0.775VALW

3.3V always on power rail

3.3V switched power rail

5V always on power rail

5V switched power rail

RTC power

VGA power

VGA power

VGA power

VGA power

Device

G-Sensor

(Reserver)

JDIMM1

JDIMM2

PTP

(Synaptics)

PTP
(ELAN)

Address [7:1]

0001 1000b

18h

0101 0000b

50h

0101 0001b

51h

0010 1100b
2Ch

0001 1111b

15h

Address [7:0]

Write

0011 0000b

30h

1010 0000b
A0h

1010 0010b
A2h

0101 1000b

58h

0011 1110b
3Eh

ON

ON

ON+APU_CORE_NB

ON

ON

ON

ON

ON ON

ON

ON ON

ON

ON

ON

ON

ON

ON

ON

S5S3S0

ONONON

ON ON

OFF

OFF

OFF

OFF

OFF OFF

ONONON

OFF

ONON

OFF OFF

OFF

ON

OFF OFF

OFF

OFF

ONON

OFF OFF

OFF

OFF

ONON

OFF OFF

AC:ON

ON

DC:OFF

OFF OFF

ONONON

OFF OFF

OFFOFF

OFFOFF

OFFOFF

Read

0011 0001b

31h

1010 0001b
A1h

1010 0011b
A3h

0101 1001b

59h

0011 1111b
3Fh

EC SMBus Address Table

SMBus Port 1
(+3VALW)

4 4

SMBus Port 2
(+3VS)

Smart Battery

Charger IC
(BQ24735)

APU Temp.

(TSI)

GPU Temp.

A

0000 1011b
0Bh

0000 1001b

09h

0100 1100b
4Ch

0100 0001b

41h

0001 0110b

16h

0001 0010b

12h

1001 1000b

98h

1000 0010b

82h

0001 0111b

17h

0001 0011b

13h

1001 1001b

99h

1000 0011b

83h

B

BOARD ID Table

Board ID

0
1
2
3

4
5
6
7
8

ZZZ

PCB

DA8001C0010

PCB 218 LA-E903P REV1 MB 2

@

PCB Revision

C5V08 EVT
C5V08 DVT
C5V08 PVT
C5V08 MP

D5PR8 DVT
D5PR8 PVT
D5PR8 MP
D5PR8_PVT_32P
D5PR8_MP_32P

ZZZ

PCB

DAZ21800201

PCB C5V08 LA-E903P LS-E901P/E892P

BOM Structure Table

BTO ItemBOM Structure

@
@EMC@
EMC@
45@
CONN@
JP@
RS@
TP@
TPM@
PCIE@
SATA@
T1@
T3@
GS@
LDO@
SWR@
2D@
PAR@
TI@
EVT@
CHG@
NCHG@
UMA@

EA@
VX@
DIS@
V2G_S@
V2G_H@
V2G_M@

RX540@
RX550@
RX560@

Unpop

EMI/ESD Unpop

EMI/ESD pop

HDMI Royalty

ME Connector

Jump

R-Short

Test Point

TPM Pop

PCIE SSD Device

SATA SSD Device

Bristol Pop

Stoney Pop

G-Sensor Circuits

RTL8411 LDO mode

RTL8411 Switching mode

For 2 SO-DIMM use

SATA Redriver PARADE solution

SATA Redriver TI solution

Only use on EVT

USB Charger

Non-USB Charger

UMA Config

CPU PN Refer p.6

EA Series

VX Series

VGA Circuits Pop

VRAM use SAMSUNG

VRAM use HYNIX

VRAM use MICRON

GPU PN Refer p.23

R17M-P1-50 GPU

R17M-P1-70 GPU

R17M-G1-70 GPU

Security Classific ation

Security Classific ation

Security Classific ation

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL
AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Board ID / SKU ID Table for AD channel

POWER SEQUENCE

G-A

G-B

G-C

G-D

+RTCBATT

EC_ON

+5VALW

3V_EN

+3VALW/+0.775VALW

0.95_1.8VALW_PWREN

+1.8VALW/+0.95VALW

S5_MUX_CTRL

+APU_CORE_FCH

SYSON

+1.2V/+2.5V

SUSP#

+5VS/+3VS/+1.8VS/+0.6VS

0.95VS_PWR_EN#

+0.95VS

VR_ON

+APU_CORE

+APU_CORE_NB

+APU_GFX

VGA POWER SEQUENCE

PE_GPIO1/VGA_ON

+3VSDGPU

+1.8VSDGPU

VGA_ON_B

+VGA_CORE

+VDDCI

DGPU_PWROK

+1.35VSDGPU

PE_GPIO0

Compal Secret Data

Compal Secret Data

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

NOTES LIST

NOTES LIST

NOTES LIST

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

E

550Tuesday, May 02, 2017

550Tuesday, May 02, 2017

550Tuesday, May 02, 2017

1.A

1.A

1.A

5

D D

R542 196_0402_1%

+0.95VS

4

PCIE_ARX_DTX_P0<28>
PCIE_ARX_DTX_N0<28>

PCIE_ARX_DTX_P1<29>
PCIE_ARX_DTX_N1<29>

PCIE_ARX_DTX_P2<30>
PCIE_ARX_DTX_N2<30>

PCIE_ARX_DTX_P3<30>
PCIE_ARX_DTX_N3<30>

1 2

U10

U9

T6
T5

T9
T8

P7
P6

U7

UAPU1B

P_GPP_RXP[0]

P_GPP_RXN[0]

P_GPP_RXP[1]

P_GPP_RXN[1]

P_GPP_RXP[2]

P_GPP_RXN[2]

P_GPP_RXP[3]

P_GPP_RXN[3]

P_ZVDDP

3

@

PCIE

PCIE_ATX_DRX_P0

LAN + CR

WLAN

PCIE SSD

P_GPP_TXP[0]

P_GPP_TXN[0]

P_GPP_TXP[1]

P_GPP_TXN[1]

P_GPP_TXP[2]

P_GPP_TXN[2]

P_GPP_TXP[3]

P_GPP_TXN[3]

P_ZVSS/P_RX_ZVDDP

R1

PCIE_ATX_DRX_N0

R2

PCIE_ATX_DRX_P1

R4

PCIE_ATX_DRX_N1

R3

PCIE_ATX_DRX_P2

N1

PCIE_ATX_DRX_N2

N2

PCIE_ATX_DRX_P3

N4

PCIE_ATX_DRX_N3

N3

U6

P_ZVSSP_ZVDDP

R541 196_0402_1%

1 2

C19 .1U_0402_16V7K

1 2

C20 .1U_0402_16V7K

1 2

C17 .1U_0402_16V7K

1 2

C18 .1U_0402_16V7K

1 2

C2702 .1U_0402_16V7K

1 2

C2701 .1U_0402_16V7K

1 2

C2704 .1U_0402_16V7K

1 2

C2703 .1U_0402_16V7K

1 2

2

PCIE_ATX_C_DRX_P0 <28>
PCIE_ATX_C_DRX_N0 <28>

PCIE_ATX_C_DRX_P1 <29>
PCIE_ATX_C_DRX_N1 <29>

PCIE_ATX_C_DRX_P2 <30>
PCIE_ATX_C_DRX_N2 <30>

PCIE_ATX_C_DRX_P3 <30>
PCIE_ATX_C_DRX_N3 <30>

1

P10

PEG_GTX_C_HRX_P0<15>
PEG_GTX_C_HRX_N0<15>

PEG_GTX_C_HRX_P1<15>
PEG_GTX_C_HRX_N1<15>

PEG_GTX_C_HRX_P2<15>
PEG_GTX_C_HRX_N2<15>

PEG_GTX_C_HRX_P3<15>
PEG_GTX_C_HRX_N3<15>

PEG_GTX_C_HRX_N4<15>

C C

PEG_GTX_C_HRX_P5<15>

PEG_GTX_C_HRX_N6<15>

PEG_GTX_C_HRX_P7<15>

CPU PN Table

CPU Platform

UAPU1 BR_A10@

S IC A10-9620P AM962PADY44AB 2.5G BGA 968P AP

SA0000AK010

B B

Bristol
15W

UAPU1 BR_A12@

S IC A12-9720P AM972PADY44AB 2.7G BGA 968P APU

SA0000AJY10

UAPU1 BR_FX@

PN R3(ABO!)PN R1(ROH)

UAPU1 BR_A10R3@

S IC A10-9620P AM962PADY44AB 2.5G ABO!

SA0000AK020

UAPU1 BR_A12R3@

S IC A12-9720P AM972PADY44AB 2.7G ABO!

SA0000AJY20

UAPU1 BR_FXR3@

P_GFX_RXP[0]

P9

P_GFX_RXN[0]

N6

P_GFX_RXP[1]

N5

P_GFX_RXN[1]

N9

P_GFX_RXP[2]

N8

P_GFX_RXN[2]

L7

P_GFX_RXP[3]

L6

P_GFX_RXN[3]

L10

P_GFX_RXP[4]

L9

P_GFX_RXN[4]

K6

P_GFX_RXP[5]

K5

P_GFX_RXN[5]

K9

P_GFX_RXP[6]

K8

P_GFX_RXN[6]

J7

P_GFX_RXP[7]

J6

P_GFX_RXN[7]

CPU PN Table

CPU Platform

Bristol
35W

FP4 REV 0.93

FP4_BGA968

UAPU1 BR_35WA10@

S IC A10-9630P AM963PAEY44AB 2.6G BGA968

SA0000AOQ00

UAPU1 BR_35WA12@

S IC A12-9730P AM973PAEY44AB 2.8G BGA968

SA0000AOR00

UAPU1 BR_35WFX@

P_GFX_TXP[0]

P_GFX_TXN[0]

P_GFX_TXP[1]

P_GFX_TXN[1]

P_GFX_TXP[2]

P_GFX_TXN[2]

P_GFX_TXP[3]

P_GFX_TXN[3]

P_GFX_TXP[4]

P_GFX_TXN[4]

P_GFX_TXP[5]

P_GFX_TXN[5]

P_GFX_TXP[6]

P_GFX_TXN[6]

P_GFX_TXP[7]

P_GFX_TXN[7]

M2
M1

L1
L2

L4
L3

J1
J2

J4
J3

H2
H1

G1
G2

G4
G3

PEG_HTX_C_GRX_P0 <15>
PEG_HTX_C_GRX_N0 <15>

PEG_HTX_C_GRX_P1 <15>
PEG_HTX_C_GRX_N1 <15>

PEG_HTX_C_GRX_P2 <15>
PEG_HTX_C_GRX_N2 <15>

PEG_HTX_C_GRX_P3 <15>
PEG_HTX_C_GRX_N3 <15>

PEG_HTX_C_GRX_P4 <15>PEG_GTX_C_HRX_P4<15>
PEG_HTX_C_GRX_N4 <15>

PEG_HTX_C_GRX_P5 <15>
PEG_HTX_C_GRX_N5 <15>PEG_GTX_C_HRX_N5<15>

PEG_HTX_C_GRX_P6 <15>PEG_GTX_C_HRX_P6<15>
PEG_HTX_C_GRX_N6 <15>

PEG_HTX_C_GRX_P7 <15>
PEG_HTX_C_GRX_N7 <15>PEG_GTX_C_HRX_N7<15>

PN R3(ABO!)PN R1(ROH)

S IC FX-9800P FM980PADY44AB 2.7G BGA 968P APU

SA00009LB00

S IC FX-9800P FM980PADY44AB 2.7G ABO!

SA00009LB40

S IC FX-9830P FM983PAEY44AB 3G BGA 968P

SA0000AOS00

CPU PN Table

CPU Platform

A A

Stoney

UAPU1 SR_A6@

S IC A6-9220 AM9220AVY23AC 2.5G BGA 968P

SA0000ALL00

5

PN R3(ABO!)PN R1(ROH)

UAPU1 SR_A6R3@

S IC A6-9220 AM9220AVY23AC 2.5G BGA ABO!

SA0000ALL10

4

Security Classification

Security Classification

Security Classification

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/04/18 2019/04/18

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

FP4 PCIE

FP4 PCIE

FP4 PCIE

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

650Tuesday, May 02, 2017

650Tuesday, May 02, 2017

650Tuesday, May 02, 2017

1

1.A

1.A

1.A

5

4

3

2

1

@

DDRA_SMA[13..0]<13>

D D

DDRA_BG1<13>

MEM_MA_ACT#<13> MEM_MB_ACT#<14>

DDRA_SBS0#<13>
DDRA_SBS1#<13>
DDRA_BG0<13>

DDRA_SDM[7..0]<13>

DDRA_SDQS0<13>
DDRA_SDQS0#<13>
DDRA_SDQS1<13>
DDRA_SDQS1#<13>

C C

B B

DDRA_SDQS2<13>
DDRA_SDQS2#<13>
DDRA_SDQS3<13>
DDRA_SDQS3#<13>
DDRA_SDQS4<13>
DDRA_SDQS4#<13>
DDRA_SDQS5<13>
DDRA_SDQS5#<13>
DDRA_SDQS6<13>
DDRA_SDQS6#<13>
DDRA_SDQS7<13>
DDRA_SDQS7#<13>

DDRA_CLK0<13>
DDRA_CLK0#<13>
DDRA_CLK1<13>
DDRA_CLK1#<13>

MEM_MA_RST#<13>

MEM_MA_EVENT#<13>

DDRA_CKE0<13>
DDRA_CKE1<13>

DDRA_ODT0<13>
DDRA_ODT1<13>

DDRA_SCS0#<13>
DDRA_SCS1#<13>

DDRA_SMA16<13>
DDRA_SMA15<13>
DDRA_SMA14<13>

T80
T4957

DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
DDRA_BG1
MEM_MA_ACT#

DDRA_SBS0#
DDRA_SBS1#
DDRA_BG0

DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7

DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#

DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_CLK1#

MEM_MA_RST#
MEM_MA_EVENT#

DDRA_CKE0
DDRA_CKE1

DDRA_ODT0
DDRA_ODT1

DDRA_SCS0#
DDRA_SCS1#

DDRA_SMA16
DDRA_SMA15
DDRA_SMA14

MA_VREFDQ
M_VREF

UAPU1A

AE28

MA_ADD[0]

Y27

MA_ADD[1]

Y29

MA_ADD[2]

Y26

MA_ADD[3]

W28

MA_ADD[4]

W29

MA_ADD[5]

W26

MA_ADD[6]

U29

MA_ADD[7]

W25

MA_ADD[8]

U26

MA_ADD[9]

AG29

MA_ADD[10]

U27

MA_ADD[11]

T28

MA_ADD[12]

AK26

MA_ADD[13]

T26

MA_ADD[14]/MA_BG[1]

T25

MA_ADD[15]/MA_ACT_L

AG26

MA_BANK[0]

AG27

MA_BANK[1]

T29

MA_BANK[2]/MA_BG[0]

E19

MA_DM[0]

D21

MA_DM[1]

K21

MA_DM[2]

F29

MA_DM[3]

AP28

MA_DM[4]

AV26

MA_DM[5]

AR22

MA_DM[6]

BC22

MA_DM[7]

K29

MA_DM[8]

H19

MA_DQS_H[0]

G19

MA_DQS_L[0]

B22

MA_DQS_H[1]

A22

MA_DQS_L[1]

F23

MA_DQS_H[2]

E23

MA_DQS_L[2]

G27

MA_DQS_H[3]

F27

MA_DQS_L[3]

AP25

MA_DQS_H[4]

AP26

MA_DQS_L[4]

AW27

MA_DQS_H[5]

AV27

MA_DQS_L[5]

AV22

MA_DQS_H[6]

AU22

MA_DQS_L[6]

BA21

MA_DQS_H[7]

AY21

MA_DQS_L[7]

L27

MA_DQS_H[8]

L26

MA_DQS_L[8]

AE25

MA_CLK_H[0]

AE26

MA_CLK_L[0]

AD26

MA_CLK_H[1]

AD27

MA_CLK_L[1]

AB28

MA_CLK_H[2]

AB29

MA_CLK_L[2]

AB25

MA_CLK_H[3]

AB26

MA_CLK_L[3]

N29

MA_RESET_L

AE29

MA_EVENT_L

P27

MA_CKE0

P29

MA_CKE1

AK27

MA0_ODT[0]

AL26

MA0_ODT[1]

AH25

MA1_ODT[0]

AL25

MA1_ODT[1]

AH26

MA0_CS_L[0]

AL29

MA0_CS_L[1]

AH29

MA1_CS_L[0]

AL28

MA1_CS_L[1]

AG24

MA_RAS_L/MA_RAS_L_ADD[16]

AK29

MA_CAS_L/MA_CAS_L_ADD[15]

AH28

MA_WE_L/MA_WE_L_ADD[14]

B19

MA_VREFDQ

T32

M_VREF

MEMORY A

FP4 REV 0.93

FP4_BGA968

MA_DATA[0]

MA_DATA[1]

MA_DATA[2]

MA_DATA[3]

MA_DATA[4]

MA_DATA[5]

MA_DATA[6]

MA_DATA[7]

MA_DATA[8]

MA_DATA[9]

MA_DATA[10]

MA_DATA[11]

MA_DATA[12]

MA_DATA[13]

MA_DATA[14]

MA_DATA[15]

MA_DATA[16]

MA_DATA[17]

MA_DATA[18]

MA_DATA[19]

MA_DATA[20]

MA_DATA[21]

MA_DATA[22]

MA_DATA[23]

MA_DATA[24]

MA_DATA[25]

MA_DATA[26]

MA_DATA[27]

MA_DATA[28]

MA_DATA[29]

MA_DATA[30]

MA_DATA[31]

MA_DATA[32]

MA_DATA[33]

MA_DATA[34]

MA_DATA[35]

MA_DATA[36]

MA_DATA[37]

MA_DATA[38]

MA_DATA[39]

MA_DATA[40]

MA_DATA[41]

MA_DATA[42]

MA_DATA[43]

MA_DATA[44]

MA_DATA[45]

MA_DATA[46]

MA_DATA[47]

MA_DATA[48]

MA_DATA[49]

MA_DATA[50]

MA_DATA[51]

MA_DATA[52]

MA_DATA[53]

MA_DATA[54]

MA_DATA[55]

MA_DATA[56]

MA_DATA[57]

MA_DATA[58]

MA_DATA[59]

MA_DATA[60]

MA_DATA[61]

MA_DATA[62]

MA_DATA[63]

MA_CHECK[0]

MA_CHECK[1]

MA_CHECK[2]

MA_CHECK[3]

MA_CHECK[4]

MA_CHECK[5]

MA_CHECK[6]

MA_CHECK[7]

MA_ZVDDIO_MEM_S

H17
J17
F20
H20
E17
F17
K18
E20

A21
C21
C23
D23
B20
B21
B23
A23

G22
H22
E25
G25
J20
E22
H23
J23

F26
E27
J26
J27
H25
E26
G28
G29

AN26
AP29
AR26
AP24
AN29
AN27
AR29
AR27

AU26
AV29
AU25
AW25
AU29
AU28
AW26
AT25

AV23
AW23
AV20
AW20
AR23
AT23
AR20
AT20

BB23
BB22
BB20
AY19
BA23
BC23
BC21
BB21

K26
K28
N26
N28
J29
K25
L29
N25

AD29

DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7

DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15

DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23

DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31

DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39

DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47

DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55

DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63

MEM_MA_ZVDDIO

DDRA_SDQ[63..0] <13>

R74

39.2_0402_1%

1 2

T1@

+1.2V

DDRB_SMA[13..0]<14>

DDRB_BG1<14>

DDRB_SBS0#<14>
DDRB_SBS1#<14>
DDRB_BG0<14>

DDRB_SDM[7..0]<14>

DDRB_SDQS0<14>
DDRB_SDQS0#<14>
DDRB_SDQS1<14>
DDRB_SDQS1#<14>
DDRB_SDQS2<14>
DDRB_SDQS2#<14>
DDRB_SDQS3<14>
DDRB_SDQS3#<14>
DDRB_SDQS4<14>
DDRB_SDQS4#<14>
DDRB_SDQS5<14>
DDRB_SDQS5#<14>
DDRB_SDQS6<14>
DDRB_SDQS6#<14>
DDRB_SDQS7<14>
DDRB_SDQS7#<14>

DDRB_CLK0<14>
DDRB_CLK0#<14>
DDRB_CLK1<14>
DDRB_CLK1#<14>

MEM_MB_RST#<14>

MEM_MB_EVENT#<14>

DDRB_CKE0<14>
DDRB_CKE1<14>

DDRB_ODT0<14>
DDRB_ODT1<14>

DDRB_SCS0#<14>
DDRB_SCS1#<14>

DDRB_SMA16<14>
DDRB_SMA15<14>
DDRB_SMA14<14>

T45

DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
DDRB_BG1
MEM_MB_ACT#

DDRB_SBS0#
DDRB_SBS1#
DDRB_BG0

DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7

DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#

DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#

MEM_MB_RST#
MEM_MB_EVENT#

DDRB_CKE0
DDRB_CKE1

DDRB_ODT0
DDRB_ODT1

DDRB_SCS0#
DDRB_SCS1#

DDRB_SMA16
DDRB_SMA15
DDRB_SMA14

MB_VREFDQ

UAPU1I

AG31

MB_ADD[0]

AC30

MB_ADD[1]

AC31

MB_ADD[2]

AB32

MB_ADD[3]

AA32

MB_ADD[4]

AA33

MB_ADD[5]

AA31

MB_ADD[6]

Y33

MB_ADD[7]

AA30

MB_ADD[8]

W32

MB_ADD[9]

AG32

MB_ADD[10]

Y32

MB_ADD[11]

W33

MB_ADD[12]

AL31

MB_ADD[13]

W30

MB_ADD[14]/MB_BG[1]

V32

MB_ADD[15]/MB_ACT_L

AH32

MB_BANK[0]

AG33

MB_BANK[1]

W31

MB_BANK[2]/MB_BG[0]

D25

MB_DM[0]

D29

MB_DM[1]

E33

MB_DM[2]

J33

MB_DM[3]

AR30

MB_DM[4]

AW30

MB_DM[5]

BC30

MB_DM[6]

BC26

MB_DM[7]

N33

MB_DM[8]

B26

MB_DQS_H[0]

A26

MB_DQS_L[0]

B30

MB_DQS_H[1]

A30

MB_DQS_L[1]

F32

MB_DQS_H[2]

E32

MB_DQS_L[2]

K32

MB_DQS_H[3]

J32

MB_DQS_L[3]

AR32

MB_DQS_H[4]

AR33

MB_DQS_L[4]

AW32

MB_DQS_H[5]

AW33

MB_DQS_L[5]

BA29

MB_DQS_H[6]

AY29

MB_DQS_L[6]

BA25

MB_DQS_H[7]

AY25

MB_DQS_L[7]

P32

MB_DQS_H[8]

N32

MB_DQS_L[8]

AE33

MB_CLK_H[0]

AE32

MB_CLK_L[0]

AE30

MB_CLK_H[1]

AE31

MB_CLK_L[1]

AD32

MB_CLK_H[2]

AD33

MB_CLK_L[2]

AC33

MB_CLK_H[3]

AC32

MB_CLK_L[3]

T33

MB_RESET_L

AG30

MB_EVENT_L

U32

MB_CKE0

U33

MB_CKE1

AL30

MB0_ODT[0]

AM32

MB0_ODT[1]

AJ32

MB1_ODT[0]

AM33

MB1_ODT[1]

AJ33

MB0_CS_L[0]

AL32

MB0_CS_L[1]

AJ30

MB1_CS_L[0]

AL33

MB1_CS_L[1]

AH33

MB_RAS_L/MB_RAS_L_ADD[16]

AK32

MB_CAS_L/MB_CAS_L_ADD[15]

AJ31

MB_WE_L/MB_WE_L_ADD[14]

A19

MB_VREFDQ

@

MEMORY B

FP4 REV 0.93

FP4_BGA968

MB_DATA[0]

MB_DATA[1]

MB_DATA[2]

MB_DATA[3]

MB_DATA[4]

MB_DATA[5]

MB_DATA[6]

MB_DATA[7]

MB_DATA[8]

MB_DATA[9]

MB_DATA[10]

MB_DATA[11]

MB_DATA[12]

MB_DATA[13]

MB_DATA[14]

MB_DATA[15]

MB_DATA[16]

MB_DATA[17]

MB_DATA[18]

MB_DATA[19]

MB_DATA[20]

MB_DATA[21]

MB_DATA[22]

MB_DATA[23]

MB_DATA[24]

MB_DATA[25]

MB_DATA[26]

MB_DATA[27]

MB_DATA[28]

MB_DATA[29]

MB_DATA[30]

MB_DATA[31]

MB_DATA[32]

MB_DATA[33]

MB_DATA[34]

MB_DATA[35]

MB_DATA[36]

MB_DATA[37]

MB_DATA[38]

MB_DATA[39]

MB_DATA[40]

MB_DATA[41]

MB_DATA[42]

MB_DATA[43]

MB_DATA[44]

MB_DATA[45]

MB_DATA[46]

MB_DATA[47]

MB_DATA[48]

MB_DATA[49]

MB_DATA[50]

MB_DATA[51]

MB_DATA[52]

MB_DATA[53]

MB_DATA[54]

MB_DATA[55]

MB_DATA[56]

MB_DATA[57]

MB_DATA[58]

MB_DATA[59]

MB_DATA[60]

MB_DATA[61]

MB_DATA[62]

MB_DATA[63]

MB_CHECK[0]

MB_CHECK[1]

MB_CHECK[2]

MB_CHECK[3]

MB_CHECK[4]

MB_CHECK[5]

MB_CHECK[6]

MB_CHECK[7]

MB_ZVDDIO_MEM_S

A25
C25
C27
D27
B24
B25
B27
A27

A29
C29
B32
D32
B28
B29
A31
C31

E30
E31
G33
G32
C33
D33
G30
G31

J30
J31
L33
L32
H32
H33
L30
L31

AN31
AP32
AT32
AU32
AN33
AN32
AR31
AT33

AU30
AV32
BA33
AY32
AU33
AU31
AW31
AY33

BC31
BB30
BB28
AY27
BB32
BA31
BC29
BB29

BB27
BB26
BB24
AY23
BA27
BC27
BC25
BB25

N30
N31
R33
R32
M32
M33
R30
R31

AF32

DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7

DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15

DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23

DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31

DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39

DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47

DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55

DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63

MEM_MB_ZVDDIO

DDRB_SDQ[63..0] <14>

R75

39.2_0402_1%

1 2

+1.2V

+1.2V

R3979

2D@

1K_0402_5%

MEM_MA_EVENT#

12

R3994
1K_0402_5%

MEM_MB_EVENT#

12

A A

Security Classific ation

Security Classific ation

Security Classific ation

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL
AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

FP4 MEMORY INTERFACE

FP4 MEMORY INTERFACE

FP4 MEMORY INTERFACE

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

1

750Tuesday, May 02, 2017

750Tuesday, May 02, 2017

750Tuesday, May 02, 2017

1.A

1.A

1.A

A

www.vinafix.com

B

C

D

E

+1.8VS

RP14

@

APU_SVT_R

18

APU_SVC

27

APU_SVD

36

1 1

45

1K_0804_8P4R_5%

RP17

@

GFX_SVC

18

GFX_SVD

27

GFX_SVT_R

36
45

1K_0804_8P4R_5%

1 2
1 2

1 2
1 2

1 2
1 2

APU_DP1_P0<26>
APU_DP1_N0<26>

APU_DP1_P1<26>
APU_DP1_N1<26>

APU_DP1_P2<26>
APU_DP1_N2<26>

APU_DP1_P3<26>
APU_DP1_N3<26>

EDP_TXP0<27>
EDP_TXN0<27>

EDP_TXP1<27>
EDP_TXN1<27>

EDP_TXP2<27>
EDP_TXN2<27>

EDP_TXP3<27>
EDP_TXN3<27>

APU_SVT_R
APU_SVC_R
APU_SVD_R

GFX_SVT_R
GFX_SVC_R
GFX_SVD_R

APU_SIC
APU_SID

APU_RST#
APU_PWROK

APU_PROCHOT#

APU_ALERT#

APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBRDY
APU_DBREQ#

C15
D17
D19

B15
B16
A18

B18
C17

D15
C19

A15
B17

H15
H14
D13
G15

C13
A11

J14

APU_PROCHOT#
APU_RST#
APU_PWROK

2 2

+1.8VS

3 3

RP25

1

EMC@

C2647
33P_0402_50V8J

2

APU_PROCHOT#

18

APU_SID

27

APU_ALERT#

36

APU_SIC

45

1

EMC@

C2648
33P_0402_50V8J

2

APU_SVT_R<44>
APU_SVC<44>
APU_SVD<44>

GFX_SVT_R<45>
GFX_SVC<45>
GFX_SVD<45>

APU_PROCHOT#<16,24,44,45>

Close to APU

1

@EMC@

C2649
.1U_040 2_16V7K

2

R2612 0_0402_5%
R2613 0_0402_5%

R2614 0_0402_5%T1@
R2615 0_0402_5%T1@

R80 300_0402_5%

+1.8VS

R82 300_0402_5%

+1.8VS

APU_PWROK<44,45>

1K_0804_8P4R_5%

+1.8VS

+3VS

1 2

R3969 2.2K_0402_5%

1 2

R3970 2.2K_0402_5%

EC_SMB_CK2

EC_SMB_DA2

EC_SMB_CK2<16,24>

EC_SMB_DA2<16,24>

EC_SMB_CK2

EC_SMB_DA2

5

3 4

SGD

Q79A

2

DMN63D8LDW_SOT363-6

G

6 1

S

D

Q79B
DMN63D8LDW_SOT363-6

VGS,on = 0.8~1.5V

APU_SIC

APU_SID

B6
A6

D7
C7

A7
B7

D9
C9

A2
A3

B4
A4

D5
C5

A5
B5

E2
E1

E3
E4

D1
D2

C1
B1

UAPU1C

DP2_TXP[0]

DP2_TXN[0]

DP2_TXP[1]

DP2_TXN[1]

DP2_TXP[2]

DP2_TXN[2]

DP2_TXP[3]

DP2_TXN[3]

DP1_TXP[0]

DP1_TXN[0]

DP1_TXP[1]

DP1_TXN[1]

DP1_TXP[2]

DP1_TXN[2]

DP1_TXP[3]

DP1_TXN[3]

DP0_TXP[0]

DP0_TXN[0]

DP0_TXP[1]

DP0_TXN[1]

DP0_TXP[2]

DP0_TXN[2]

DP0_TXP[3]

DP0_TXN[3]

SVT0

SVC0

SVD0

SVT1

SVC1

SVD1

SIC

SID

RESET_L

PWROK

PROCHOT_L

ALERT_L

TDI

TDO

TCK

TMS

TRST_L

DBRDY

DBREQ_L

@

DISPLAY/SV I2/JTAG/TES T

FP4 REV 0.93

FP4_BGA968

DP_ZVSS

DP_AUX_ZVSS

DP_BLON

DP_DIGON

DP_VARY_BL

DP2_AUXP

DP2_AUXN

DP2_HPD

DP1_AUXP

DP1_AUXN

DP1_HPD

DP0_AUXP

DP0_AUXN

DP0_HPD

RSVD_1

TEMPIN0

TEMPIN1

TEMPIN2

TEMPINRETURN

TEST410

TEST411

TEST28_H

TEST28_L

DP_STEREOSYNC/TEST36

VDDCR_GFX_SENSE

VDDCR_NB_SENSE

VDDCR_CPU_SENSE

VDDP_SENSE

VSS_SENSE

A9
B9
G5
G6
F11

H9
G9
E9

F7
E7
F5

F8
E8
G8

K24
E15
E14
E12
F14
AK24
AL24
P24

TEST4

N24

TEST5

AN24

TEST6

AB8

TEST9

Y9

TEST10

B10

TEST14

D11

TEST15

A10

TEST16

C11

TEST17

B11

TEST11

A14

TEST18

B14

TEST19

A13
B13
P26

TEST31

E11
A17

TEST37

H11
J12
G12
AY18

H12

APU_TRST#

DP_ZVSS
DP_AUX_ZVSS
ENBKL_R
ENVDD_R
INVT PWM_ R

APU_TEST410
APU_TEST411
APU_TEST4
APU_TEST5

1 2

R400 2K_0402_1%

1 2

R401 150_0402_1%

HDMI_SCLK <26>
HDMI_SDATA <26>
HDMI_HPD <26>

EDP_AUXP <27>
EDP_AUXN <27>

EDP_HPD <27>

TP@

T32

TP@

T33

TP@

T34

TP@

T35

ENVDD_R

ENBKL_R

+1.8VALW

5

U64

1

P

NC

2

A

G

NL17SZ07DFT2G_SC70-5

3

SA00004BV00

+1.8VALW

5

U2610

1

P

NC

2

A

G

NL17SZ07DFT2G_SC70-5

3

SA00004BV00

4

Y

@

Y

ENVDD <27>

4

ENBKL <24>

ENVDD

INVT PWM

ENBKL

APU_TEST14
APU_TEST15
APU_TEST16
APU_TEST17
APU_TEST11
APU_TEST18
APU_TEST19

APU_TEST28_H
APU_TEST28_L
APU_TEST31
APU_TEST36 APU_TEST36
APU_TEST37

APU_COREGFX_SEN_H <45>
APU_CORENB_SEN_H <44>
APU_CORE_SEN_H <44>

T40

T43
T42
T41

APU_VSS_SEN_L <44,45>

TP@

TP@
TP@
TP@

+1.8VS

APU_TEST11
APU_TEST17
APU_TEST16
APU_TEST14

APU_TEST37

1

3

5

7

1 2

R671 33_0402_5%

1 8
2 7
3 6
4 5

APU_TRST#_R

RP29

10K_0804_8P4R_5%

HDT_P11

HDT_P13

HDT_P15

9

11

13

15

17

19

1 2

1 2

HDT+

JHDT1

@

1

3

5

7

9

11

13

15

17

19

RP30

@

18
27
36
45

1K_0804_8P4R_5%

@

R117
1K_0402_5%

@

R118
1K_0402_5%

APU_TCK_R

2

2

APU_TMS_R

4

4

APU_TDI_R

6

6

APU_TDO_R

8

8

APU_PWROK_R

10

10

APU_RST#_R

12

12

APU_DBRDY_R

14

14

APU_DBREQ#_R

16

16

APU_TEST19

18

18

APU_TEST18

20

20

+1.8VS

1 2

@

R706 0_0402_5%

1 2

@

R694 0_0402_5%

1 2

@

R705 0_0402_5%

1 2

@

R704 0_0402_5%

1 2

@

R682 0_0402_5%

1 2

@

R707 0_0402_5%

1 2

@

R708 0_0402_5%

1 2

R672 33_0402_5%

SAMTE_ASP-136446-07-B

INVT PWM_ R

ENVDD_R

1 2

@

R1160

4.7K_0402_5%

1 2

R1161

4.7K_0402_5%

1 2

R3905

4.7K_0402_5%

1 2

R155
1K_0402_5%

1 2

R154
1K_0402_5%

APU_TCK

APU_TMS

APU_TDI

APU_TDO

APU_PWROK

APU_RST#

APU_DBRDY

APU_DBREQ#

+1.8VALW

5

1

P

NC

2

A

G

3

1 2

R683 0_0402_5%RS@

+3VS

@

APU_DBREQ#
APU_TDI
APU_TMS
APU_TCK

APU_TRST#
APU_TEST19
APU_TEST18

APU_TRST#

U2611

4

Y

NL17SZ07DFT2G_SC70-5

SA00004BV00

ENVDD_R

INVT PWM_ R

ENBKL_R

INVT PWM <27>

1 2

R3847
100K_0402_5%

1 2

@

R3835
100K_0402_5%

1 2

R3906
100K_0402_5%

+1.8VS

RP28

1 8
2 7
3 6
4 5

1K_0804_8P4R_5%

RP27

1 8
2 7
3 6
4 5

1K_0804_8P4R_5%

1 2

C141

0.01U_0402_16V7K

ENVDD

+1.8VS

+1.8VS

4 4

Security Classification

Security Classification

Security Classification

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/04/18 2019/04/18

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

FP4 DISP/MISC/HDT

FP4 DISP/MISC/HDT

FP4 DISP/MISC/HDT

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

850Tuesday, May 02, 2017

850Tuesday, May 02, 2017

850Tuesday, May 02, 2017

E

1.A

1.A

1.A

A

1 2

C912 150P_0402_50V8J

1 2

C615 150P_0402_50V8J

1 2

LPC_RST#<24,33>

APU_PCIE_RST#<15,28,29,30>

1 1

2 2

+3VALW

1 2

R930 10K_0402_5%@

1 2

R905 100K_0402_5%@

1 2

R3927 10K_0402_5%

1 2

R685 10K_0402_5%@

1 2

R686 10K_0402_5%@

1 2

R2616 2.2K_0402_5%@

3 3

4 4

1 2

R2618 1K_0402_5%@

1 2

R2617 2.2K_0402_5%@

1 2

R3948 10K_0402_5%

+3VS

1 2

R676 2.2K_0402_5%

1 2

R677 2.2K_0402_5%

1 2

R3863 10K_0402_5%@

1 2

R3864 10K_0402_5%@

1 2

R3975 10K_0402_5%@

+1.8VS

1 2

R3946 10K_0402_5%

1 2

R3947 10K_0402_5%

1 2

R3945 10K_0402_5%@

1 2

R3929 10K_0402_5%

1 2

R3928 10K_0402_5%

1 2

R3954 10K_0402_5%@

1 2

R3850 10K_0402_5%

1 2

R3879 0_0402_5%@

1 2

R40 15K_0402_5%

1 2

R41 15K_0402_5%

1 2

R42 15K_0402_5%

1 2

R3949 10K_0402_5%

1 2

R3950 10K_0402_5%

1 2

R3961 10K_0402_5%T3@

R602 33_0402_5%
R907 33_0402_5%

EC_RSMRST#<24>

PBTN_OUT#<24>

SYS_PWRGD_EC<24>

SLP_S3#<24>
SLP_S5#<24>

S5_MUX_CTRL<25>

KBRST#<24>
GATEA20<24>
EC_SCI#<24>

LAN_CLKREQ#<28>
WLAN_CLKREQ#<29>
DGPU_PWROK<47,48>
SSD_CLKREQ#<30>
PEG_CLKREQ#<16>

USB_OC0#<31>

APU_PCIE_WAKE#
USB_OC0#

EC_SCI#
APU_I2C3_SCL
APU_I2C3_SDA

APU_TEST0
APU_TEST1
APU_TEST2

AGPIO8

APU_SMB_CLK0
APU_SMB_DATA0
LAN_CLKREQ#
WLAN_CLKREQ#
SSD_CLKREQ#

APU_I2C1_SCL
APU_I2C1_SDA

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_BITCLK

PEG_CLKREQ#
HVB

APU_TEST0
APU_TEST1
APU_TEST2

APU_I2C0_SCL
APU_I2C0_SDA
VDDGFX_PWRGD

A

1 2

HDA_SDIN0<34>

APU_I2C1_SCL<30>
APU_I2C1_SDA<30>

1U_0402_6.3V6K

Length<1.0"

LPC_RST_A#
APU_PCIE_RST#_R

EC_RSMRST#

PBTN_OUT#
SYS_PWRGD_EC
SYS_RST#
APU_PCIE_WAKE#

SLP_S3#
SLP_S5#

AGPIO10

APU_TEST0
APU_TEST1
APU_TEST2

KBRST#
GATEA20

EC_SCI#

AGPIO12
LAN_CLKREQ#

WLAN_CLKREQ#
DGPU_PWROK
SSD_CLKREQ#
PEG_CLKREQ#
USB_OC0#

HDA_BITCLK
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_RST#
HDA_SYNC
HDA_SDOUT

APU_I2C0_SCL
APU_I2C0_SDA
APU_I2C1_SCL
APU_I2C1_SDA

RTC_CLK

32K_X1

32K_X2

HDA_BITCLK_AUDIO<34>
HDA_SDOUT_AUDIO<34>
HDA_SYNC_AUDIO<34>
HDA_RST#_AUDIO<34>

+1.8VALW +3VS

R346

22K_0402_1%

EC_RSMRST#

SYS_PWRGD_EC

C999

B

@

UAPU1D

BB12

LPC_RST_L

AN7

PCIE_RST_L/EGPIO26

AE4

RSMRST_L

AE1

PWR_BTN_L/AGPIO0

BC9

PWR_GOOD

AF2

SYS_RESET_L/AGPIO1

AG2

WAKE_L/AGPIO2

AK7

SLP_S3_L

AH5

SLP_S5_L

AE8

S0A3_GPIO/AGPIO10

AH8

S5_MUX_CTRL/EGPIO42

AH6

TEST0

AK8

TEST1/TMS

AE3

TEST2

AY15

ESPI_RESET_L/KBRST_L/AGPIO129

BC19

GA20IN/AGPIO126

AD7

LPC_PME_L/AGPIO22

BB13

LPC_SMI_L/AGPIO86

AG3

AC_PRES/USB_OC4_L/IR_RX0/AGPI O23

AD5

IR_TX0/USB_OC5_L/AGPIO13

AL8

IR_TX1/USB_OC6_L/AGPIO14

AN8

IR_RX1/AGPIO15

AE2

IR_LED_L/LLB_L/AGPIO12

BC15

CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92

BB17

CLK_REQ1_L/AGPIO115

BC17

CLK_REQ2_L/AGPIO116

BB18

CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131

BB16

CLK_REQG_L/OSCIN/EGPIO132

AH9

USB_OC0_L/TRST_L/AGPIO16

AG1

USB_OC1_L/TDI/AGPIO17

AH2

USB_OC2_L/TCK/AGPIO18

AL9

USB_OC3_L/TDO/AGPIO24

AU6

AZ_BITCLK/I2S_BCLK_MIC

AR8

AZ_SDIN0/I2S_DATA_MIC[ 0]

AP6

AZ_SDIN1/I2S_LR_PLAYBACK

AR5

AZ_SDIN2/I2S_DATA_MIC[ 1]

AU9

AZ_RST_L/I2S_LR_MIC

AT9

AZ_SYNC/I2S_BCLK_PLAYBACK

AR7

AZ_SDOUT/I2S_DATA_PLAYBACK

BB10

I2C0_SCL/EGPIO145

BB9

I2C0_SDA/EGPIO146

BB7

I2C1_SCL/EGPIO147

BC7

I2C1_SDA/EGPIO148

AG7

RTCCLK

AT1

X32K_X1

AT2

X32K_X2

EMC@

RP13

1 8
2 7
3 6
4 5

33_0804_8P4R_5%

T1@

RP68

1K_0804_8P4R_5%

12

12

R348

4.7K_0402_5%

2

2

C1000

0.22U_0402_16V7K

1

1

B

ACPI/SD/AZ/GPIO/RTC/I2C/UART/MISC

HDA_BITCLK
HDA_SDOUT
HDA_SYNC
HDA_RST#

18
27
36
45

C

SD0_WP/EGPIO101

SD0_PWR_CTRL/AGPIO102

SD0_CLK/EGPIO95

SD0_CMD/EGPIO96

SD0_DATA0/EGPIO97

SD0_DATA1/EGPIO98

SD0_DATA2/EGPIO99

SD0_DATA3/EGPIO100

SD0_LED/EGPIO93

SCL0/I2C2_SCL/EGPIO113

SDA0/I2C2_SDA/EGPIO114

SCL1/I2C3_SCL/AGPIO19

SDA1/I2C3_SDA/AGPIO20

AGPIO6/LDT_RST

AGPIO7/LDT_PWROK

VDDGFX_PD/AGPIO39

AGPIO66/SHUTDOWN_L

AGPIO68/SGPIO_CLK

AGPIO69/SGPIO_LOAD

AGPIO71/SGPIO_DATAOUT

AGPIO72/SGPIO_DATAIN

BLINK/USB_OC7_L/AGPIO11

GENINT1_L/AGPIO89

GENINT2_L/AGPIO90

FANOUT0/AGPIO85

UART0_CTS_L/EGPIO135

UART0_RXD/EGPIO136

UART0_RTS_L/EGPIO137

UART0_TXD/EGPIO138

UART0_INTR/AGPIO139

UART1_CTS_L/BT_I2S_BCLK/EGPIO140

UART1_RXD/BT_I2S_SDI/EGPIO141

UART1_RTS_L/EGPIO142

UART1_TXD/BT_I2S_SDO/EGPIO143

FP4 REV 0.93

FP4_BGA968

UART1_INTR/BT_I2S_LRCLK/AGPIO144

H

L

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BB2
BB5
BC2

SD0_CD/AGPIO25

BB4
AY5

BC3
BA3
BC5
BA5

PE_GPIO1

AGPIO3

AGPIO4

AGPIO5

AGPIO8

AGPIO9

AGPIO40

AGPIO64

AGPIO65

SPKR/AGPIO91

FANIN0/AGPIO84

BB6

APU_SMB_CLK0

BA15

APU_SMB_DATA0

AY17

APU_I2C3_SCL

AG5

APU_I2C3_SDA

AG4

AL5

AGPIO3

AL6
AJ1

AGPIO5

AJ3
AH1

AGPIO7

AJ4

AGPIO8

AK5
AD8

VDDGFX_PWRGD

AG8
AW15
AU15

G_INT#_APU

AT15
AU12
AT14

AGPIO69
PE_GPIO0

AR14
BC13

APU_SPKR

BA17

AN5

AGPIO11

BB14

HVB
TP_I2C_INT#_APU

BA19

BC18
BB19

AY9
AW8
AV5
AV8
AW9

AV11
AU7
AT11
AR11
AP9

PE_GPIO1 <25>

APU_SMB_CLK0 <13,14>
APU_SMB_DATA0 <13,14>

APU_I2C3_SCL <33>
APU_I2C3_SDA <33>

AGPIO8 <30>

VDDGFX_PWRGD <45>

G_INT#_APU <30>

PE_GPIO0 <15>

APU_SPKR <34>

TP_I2C_INT#_APU <33>

LPC_FRAME#LPC_CLK0_EC LPC_CLK1

BOOT FAIL
TIMER
ENABLED

BOOT FAIL
TIMER
DISABLED
(DEFAULT)

LPC_FRAME#<10,24,33>
LPC_CLK0_EC<10,24>
LPC_CLK1<10,33>

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

C

CLKGEN
ENABLE
(DEFAULT)

CLKGEN
DISABLED

+3VS

12

R902
10K_0402_5%

AGPIO3
RTC_CLK

SYS_RST#
AGPIO11

12

@

R903
2K_0402_5%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

SPI ROM
(DEFAULT)

LPC ROM

12

12

@

R904
10K_0402_5%

R926
2K_0402_5%

MEM_VOLT_SEL/AGPIO3
<INT PU>

CZL CZ

1.8V SPI ROM

3.3V SPI ROM
(Default)

12

12

D

If no use, need Config Low

H

L

ENHANCED
RESET
(DEFAULT)

TRADITION
RESET

+3VALW

R925
10K_0402_5%

@

R927
2K_0402_5%

D

12

R928
10K_0402_5%

12

@

R929
2K_0402_5%

E

T1@

10K_0402_5%

10K_0402_5%

VX

EASR

1 2

T3@

1 2

R3953

10K_0402_5%

R3952

10K_0402_5%

VX@

1 2

EA@

1 2

R3978

R936

UMA

DIS

R4002

UMA@

10K_0402_5%

SD028100280

AGPIO5

RX550xRX560

RX540

RX550@

RX560@

AGPIO5
AGPIO7
AGPIO10
AGPIO12
AGPIO69

R4001

10K_0402_5%

R4002

10K_0402_5%

1 2

RX540@

1 2

R3999

10K_0402_5%

R4000

10K_0402_5%

R3892

1 2

@

R2624

1 2

AGPIO7 AGPIO10 AGPI O12 AGPIO69

BR

32.768KMHz CRYSTAL

32K_X1

12

32.768KHZ_12.5PF_Q13FC135000040

12

R914
20M_0402_5%

1

C686
18P_0402_50V8J

2

RTC_CLK
<INT PU>

COIN BATT
ON BOARD
(DEFAULT)

COIN BATT
NOT ON
BOARD

12

12

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

BLINK/AGPIO11
<INT PU>

LDT_RST#/PG
OUTPUT TO
APU
(DEFAULT)

OUTPUT
TO PADS

12

R949
10K_0402_5%

@

R2619
2K_0402_5%

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

R951
10K_0402_5%

12

@

R2620
2K_0402_5%

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

FP4 GPIO/AZ/MISC/STRAPS

FP4 GPIO/AZ/MISC/STRAPS

FP4 GPIO/AZ/MISC/STRAPS

Y3

1

C682
22P_0402_50V8J

2

SYS_RST#
<INT PU>

NORMAL
RESET MODE
(DEFAULT)

SHORT RST
MODE

12

R954
10K_0402_5%

12

@

R2621
2K_0402_5%

E

32K_X2

950Tuesday, May 02, 2017

950Tuesday, May 02, 2017

950Tuesday, May 02, 2017

+3VALW

UMA@

10K_0402_5%

1 2

DIS@

10K_0402_5%

1 2

1.A

1.A

1.A

A

SATA_ATX_DRX_P0<30>

1 1

HDD

SSD

12

12

12

DEVSLP0

DEVSLP1

AGPIO130

R3852 1 0K_0402_5%

R3853 1 0K_0402_5%

R3882 1 0K_0402_5%

SATA_ATX_DRX_N0<30>

SATA_ARX_DTX_N0<30>
SATA_ARX_DTX_P0<30>

SATA_ATX_DRX_P1<30>
SATA_ATX_DRX_N1<30>

SATA_ARX_DTX_N1<30>
SATA_ARX_DTX_P1<30>

R90 1K_0402_1%
R96 1K_0402_1%

+0.95VS

DEVSLP1<30>

+3VS

12

CLKRUN#

@

R3872 1 0K_0402_5%

+3VALW

12

R3873 1 0K_0402_5%

2 2

+1.8VS

R634 10K_0402_5%

R635 10K_0402_5%

R636 10K_0402_5%

R637 10K_0402_5%

R638 10K_0402_5%

3 3

LPCPD#

APU_SPI_HOLD#

12

APU_SPI_WP#

12

APU_SPI_CS1#

12

APU_SPI_CS2#

12

APU_SPI_TPMCS#

12

VGA

LAN+CR

WLAN

PCIE_SSD

CLK_PEG_VGA<15>
CLK_PEG_VGA#<15>

CLK_PCIE_LAN<28>
CLK_PCIE_LAN#<28>

CLK_PCIE_WLAN<29>
CLK_PCIE_WLAN#<29>

CLK_PCIE_SSD<30>
CLK_PCIE_SSD#<30>

LPC_CLK0_EC<9,24>
LPC_CLK1<9,33>

LPC_AD0<24,33>
LPC_AD1<24,33>
LPC_AD2<24,33>
LPC_AD3<24,33>

LPC_FRAME#<9,24,33>

SERIRQ<24,33>
CLKRUN#<33>

APU_SPI_CLK APU_SPI_CLK_R

1 2

RS@

R106
0_0402_5%

8MB SPI ROM

12
12

1 2

R107 0_0402_5%RS@

1 2

R108 0_0402_5%RS@

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#

SERIRQ
CLKRUN#
LPCPD#

APU_SPI_CS1#
APU_SPI_CS2#
APU_SPI_MISO
APU_SPI_MOSI
APU_SPI_WP#
APU_SPI_HOLD#
APU_SPI_TPMCS#

B

SATA_ATX_DRX_P0
SATA_ATX_DRX_N0

SATA_ARX_DTX_N0
SATA_ARX_DTX_P0

SATA_ATX_DRX_P1
SATA_ATX_DRX_N1

SATA_ARX_DTX_N1
SATA_ARX_DTX_P1

SATA_ZVSS
SATA_ZVDD

DEVSLP0
DEVSLP1
AGPIO130

CLK_PEG_VGA
CLK_PEG_VGA#

CLK_PCIE_LAN
CLK_PCIE_LAN#

CLK_PCIE_WLAN
CLK_PCIE_WLAN#

CLK_PCIE_SSD
CLK_PCIE_SSD#

48M_X1

48M_X2

UAPU1E

AU3

SATA_TX0P

AU4

SATA_TX0N

AV1

SATA_RX0N

AV2

SATA_RX0P

AY2

SATA_TX1P

AY1

SATA_TX1N

AW4

SATA_RX1N

AW3

SATA_RX1P

AW1

SATA_ZVSS

AW2

SATA_ZVDDP

AT17

DEVSLP[0]/EGPIO67

AT12

DEVSLP[1]/EGPIO70

BB15

SATA_ACT_L/AGPIO130

AU2

SATA_X1

AU1

SATA_X2

U4

GFX_CLKP

U3

GFX_CLKN

U1

GPP_CLK0P

U2

GPP_CLK0N

W4

GPP_CLK1P

W3

GPP_CLK1N

W1

GPP_CLK2P

W2

GPP_CLK2N

Y2

GPP_CLK3P

Y1

GPP_CLK3N

BC10

X25M_48M_OSC

T2

X48M_X1

T1

X48M_X2

AW14

LPCCLK0/EGPIO74

AY13

LPCCLK1/EGPIO75

BB11

LAD0

BA11

LAD1

AY11

LAD2

BA13

LAD3

AV14

LFRAME_L

BA1

ESPI_ALERT_L/LDRQ0_L

BC14

SERIRQ/AGPIO87

BC11

LPC_CLKRUN_L/AGPIO88

AE9

LPC_PD_L/AGPIO21

BC6

SPI_CLK/ESPI_CLK/EGPIO117

BB8

SPI_CS1_L/EGPIO118

AW7

SPI_CS2_L/ESPI_CS_L/EGPIO119

BA9

SPI_DI/ESPI_DATA/EGPIO120

AY7

SPI_DO/EGPIO121

AW11

SPI_WP_L/EGPIO122

BA7

SPI_HOLD_L/EGPIO133

AW12

SPI_TPM_CS_L/AGPIO76

C

@

CLK/SATA/USB/SPI/LPC

FP4 REV 0.93

FP4_BGA968

USBCLK/25M_48M_OSC

USB_ZVSS

USB_HSD0P

USB_HSD0N

USB_HSD1P

USB_HSD1N

USB_HSD2P

USB_HSD2N

USB_HSD3P

USB_HSD3N

USB_HSD4P

USB_HSD4N

USB_HSD5P

USB_HSD5N

USB_HSD6P

USB_HSD6N

USB_HSD7P

USB_HSD7N

USB_SS_ZVSS

USB_SS_ZVDDP

USB_SS_0TXP

USB_SS_0TXN

USB_SS_0RXP

USB_SS_0RXN

USB_SS_1TXP

USB_SS_1TXN

USB_SS_1RXP

USB_SS_1RXN

USB_SS_2TXP

USB_SS_2TXN

USB_SS_2RXP

USB_SS_2RXN

USB_SS_3TXP

USB_SS_3TXN

USB_SS_3RXP

USB_SS_3RXN

AP8

AP5

AR2
AR1

AR3
AR4

AN2
AN1

AN3
AN4

AM1
AM2

AL2
AL1

AL3
AL4

AK2
AJ2

AD2
AD1

AA3
AA4

W9
W8

AA2
AA1

W5
W6

AC1
AC2

Y6
Y7

AC4
AC3

AB5
AB6

USB_ZVSS

USB20_P0
USB20_N0

USB20_P1
USB20_N1

USB20_P2
USB20_N2

USB20_P3
USB20_N3

USB20_P5
USB20_N5

USB20_P7
USB20_N7

USBSS_ZVSS
USBSS_ZVDD

1 2

R641 11.8K_0402_1%

USB20_P0 <31>
USB20_N0 <31>

USB20_P1 <31>
USB20_N1 <31>

USB20_P2 <29>
USB20_N2 <29>

USB20_P3 <27>
USB20_N3 <27>

USB20_P5 <32>
USB20_N5 <32>

USB20_P7 <31>
USB20_N7 <31>

1 2

R644 1K_0402_1%

1 2

R645 1K_0402_1%

USB3_ATX_DRX_P1 <32>
USB3_ATX_DRX_N1 <32>

USB3_ARX_DTX_P1 <32>
USB3_ARX_DTX_N1 <32>

USB3_ATX_DRX_P2 <32>
USB3_ATX_DRX_N2 <32>

USB3_ARX_DTX_P2 <32>
USB3_ARX_DTX_N2 <32>

USB3_ATX_DRX_P3 <31>
USB3_ATX_DRX_N3 <31>

USB3_ARX_DTX_P3 <31>
USB3_ARX_DTX_N3 <31>

D

S/B USB2.0 Conn.

S/B USB2.0 Conn.

WLAN/BT combo

Camera

Type -C Conn. (U3 p ort 1,2)

M/B USB3.0 Conn. (U3 port 3)

+0.95VALW

Type -C Con n.

Type -C Con n.

M/B USB3.0 Conn.

48MHz CRYSTAL

1 2

R938

1M_0402_5%

2

2

3

3

1

C794

2

4.7P_0402_50V8C

1

1

Y1
48MHZ_8PF_X3S048000D81H-W

Part Number = SJ10000AF00

4

4

1

C795

4.7P_0402_50V8C

2

E

R3980
0_0402_5%

1 2

1 2

R3981
0_0402_5%

48M_X2

48M_X1

+1.8VS

APU_SPI_CS1#
APU_SPI_MISO
APU_SPI_WP#

4 4

U56

1

CS#

2

DO(IO1)

HOLD#(IO3)

3

WP#(IO2)

4

GND

W25Q64FWSSIQ_SOIC_8P

APU_SPI_CLK

1 2

R617
10_0402_1%

DI(IO0)

@EMC@

8

VCC

7
6

CLK

5

1 2

C636
10P_0402_50V8J

APU_SPI_HOLD#
APU_SPI_CLK
APU_SPI_MOSI

@EMC@

12

@

C635 0.1U_0201_10V6K

Security Classification

Security Classification

Security Classification

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

2017/04/18 2019/04/18

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

FP4 SATA/CLK/USB/SPI

FP4 SATA/CLK/USB/SPI

FP4 SATA/CLK/USB/SPI

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

10 50Tuesday, May 02, 2017

10 50Tuesday, May 02, 2017

10 50Tuesday, May 02, 2017

E

1.A

1.A

1.A

A

C1008 22U_0603_6.3V6M

1

2

1 1

C1126 0.22U_0402_16V7K

C1124 10U_0603_6.3V6M

1

2 2

2

C1109 10U_0603_6.3V6M

C1108 10U_0603_6.3V6M

1

2

3 3

C1118 10U_0603_6.3V6M

1

2

C1060 22U_0603_6.3V6M

C1059 22U_0603_6.3V6M

C1058 22U_0603_6.3V6M

C1057 22U_0603_6.3V6M

1

1

2

2

C1062 22U_0603_6.3V6M

C1061 22U_0603_6.3V6M

1

1

1

1

2

2

2

2

+3VALW

1

C1066 22U_0603_6.3V6M

C1063 22U_0603_6.3V6M

C1065 22U_0603_6.3V6M

C1064 22U_0603_6.3V6M

1

1

1

1

2

2

2

2

@

@

@

1 2

RS@

R119
0_0402_5%

2

+APU_CORE_FCH

C1110 0.22U_0402_16V7K

1

1

2

2

+0.95VALW

C1119 0.22U_0402_16V7K

1

2

C1085 10U_0603_6.3V6M

1

2

C1080 10U_0603_6.3V6M

C949 10U_0603_6.3V6M

C950 10U_0603_6.3V6M

1

1

1

2

2

2

For VDDP_S5

1 2

T1@

R3880
0_0603_5%

4 4

C2700 0.22U_0402_16V7K

C2699 10U_0603_6.3V6M

1

2

T1DIS@

1

2

T1DIS@

BR+DIS need pop

+0.95VS_GFX+0.95VS

C1087 0.22U_0402_16V7K

C1090 0.22U_0402_16V7K

C1089 0.22U_0402_16V7K

C1088 0.22U_0402_16V7K

1

1

1

1

2

2

2

2

C1114 0.22U_0402_16V7K

C1111 0.22U_0402_16V7K

C1113 0.22U_0402_16V7K

C1112 0.22U_0402_16V7K

1

1

1

1

2

2

2

2

+3VS_APU+3VS

C1137 10U_0603_6.3V6M

1

2

+1.8VALW +1.8VS

C1086 0.22U_0402_16V7K

1

2

C1099 0.22U_0402_16V7K

C1083 10U_0603_6.3V6M

1

2

C2691 0.22U_0402_16V7K

C2690 0.22U_0402_16V7K

1

1

1

2

2

2

For VDDP

0.22U_0402_16V7K

For VDDP_GFX

A

B

C1092 0.22U_0402_16V7K

C1093 180P_0402_50V8J

C1091 0.22U_0402_16V7K

1

1

1

2

2

2

Under APU

C1115 180P_0402_50V8J

+1.2V

C1116 180P_0402_50V8J

1

1

2

2

DIMMS/GND

C1102 0.22U_0402_16V7K

C1101 10U_0603_6.3V6M

1

1

2

2

C2693 0.22U_0402_16V7K

C2694 0.22U_0402_16V7K

C2692 0.22U_0402_16V7K

1

1

1

2

2

2

RTC OF APU

+RTC_APU_R

1

1U_0402_6.3V6K

2

B

C923

C166

+1.2V

For Audio
Near to AR19

C1005 1U_0402_6.3V6K

1

2

C245 180P_0402_50V8J

1

2

W=20mil s

2

1

C

@

C1006 1U_0402_6.3V6K

C1007 1U_0402_6.3V6K

1

1

2

2

+0.95VS

1 2

R93 1K_0402_5%

12

CLRP1

@

0_0603_5%

+1.8VS

+1.2V

+1.8VS

+0.95VS_GFX

+3VS_APU

+1.8VS

+1.8VALW

+3VALW

+0.95VALW

+APU_CORE_FCH

0.2A/0.9A

+0.95VS

+APU_CORE_NB

+RTC_APU_R

Need OPEN

+RTC_APU

3A

0.2A

1.5A

0.2A

1.5A

0.5A

0.2A

0.8A

7A

17A

+RTC_APU_R

0.1U_0201_10V6K

AB24
AB27
AB30
AB33
AD25
AD28
AD30
AE24
AE27

AF30

AF33
AG25
AG28
AH24
AH27
AH30
AK25
AK28
AK30
AK33

AL27
AM30

AR19

AP19
AP21

AP16
AP18

AP10

AP15
AR15

AN12
AP12

AP13
AR12

AW19

AU17
AU19
AV17
AV19

AW17

AL12

AL13

AL15

AL18

AL21
AN13
AN16
AN19
AN22

AR17

+RTC_APU

C106

P25
P28

U25
U28
V30

V33
W24
W27

Y25

Y28

Y30

AE6

AE5

AR9

T24
T27

1

2

UAPU1F

VDDIO_MEM_S3_1

VDDIO_MEM_S3_2

VDDIO_MEM_S3_3

VDDIO_MEM_S3_4

VDDIO_MEM_S3_5

VDDIO_MEM_S3_6

VDDIO_MEM_S3_7

VDDIO_MEM_S3_8

VDDIO_MEM_S3_9

VDDIO_MEM_S3_10

VDDIO_MEM_S3_11

VDDIO_MEM_S3_12

VDDIO_MEM_S3_13

VDDIO_MEM_S3_14

VDDIO_MEM_S3_15

VDDIO_MEM_S3_16

VDDIO_MEM_S3_17

VDDIO_MEM_S3_18

VDDIO_MEM_S3_19

VDDIO_MEM_S3_20

VDDIO_MEM_S3_21

VDDIO_MEM_S3_22

VDDIO_MEM_S3_23

VDDIO_MEM_S3_24

VDDIO_MEM_S3_25

VDDIO_MEM_S3_26

VDDIO_MEM_S3_27

VDDIO_MEM_S3_28

VDDIO_MEM_S3_29

VDDIO_MEM_S3_30

VDDIO_MEM_S3_31

VDDIO_MEM_S3_32

VDDIO_MEM_S3_33

VDDIO_MEM_S3_34

VDDIO_MEM_S3_35

VDDIO_AUDIO

VDDP_GFX_2

VDDP_GFX_1

VDD_33_1

VDD_33_2

VDD_18_1

VDD_18_2

VDD_18_S5_1

VDD_18_S5_2

VDD_33_S5_1

VDD_33_S5_2

VDDP_S5_1

VDDP_S5_2

VDDCR_FCH_S5_1

VDDCR_FCH_S5_2

VDDP_6

VDDP_1

VDDP_2

VDDP_3

VDDP_4

VDDP_5

VDDCR_NB_1

VDDCR_NB_2

VDDCR_NB_3

VDDCR_NB_4

VDDCR_NB_5

VDDCR_NB_6

VDDCR_NB_7

VDDCR_NB_8

VDDCR_NB_9

VDDBT_RTC_G

AP2138N-1.5TRG1_SOT23-3

FP4 REV 0.93

FP4_BGA968

Vo=1.5V

3

Vout

2

GND

POWER

U102

Vin

680P_0603_50V8J

1

for Clear CMOS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE US ED BY OR D ISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE US ED BY OR D ISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE US ED BY OR D ISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Dat e

Deciphered Dat e

Deciphered Dat e

VDDCR_CPU_1

VDDCR_CPU_2

VDDCR_CPU_3

VDDCR_CPU_4

VDDCR_CPU_5

VDDCR_CPU_6

VDDCR_CPU_7

VDDCR_CPU_8

VDDCR_CPU_9

VDDCR_CPU_10

VDDCR_CPU_11

VDDCR_CPU_12

VDDCR_CPU_13

VDDCR_CPU_14

VDDCR_CPU_15

VDDCR_CPU_16

VDDCR_CPU_17

VDDCR_CPU_18

VDDCR_CPU_19

VDDCR_CPU_20

VDDCR_CPU_21

VDDCR_CPU_22

VDDCR_CPU_23

VDDCR_CPU_24

VDDCR_CPU_25

VDDCR_CPU_26

VDDCR_CPU_42

VDDCR_CPU_31

VDDCR_CPU_43

VDDCR_CPU_32

VDDCR_CPU_44

VDDCR_CPU_33

VDDCR_CPU_45

VDDCR_CPU_34

VDDCR_CPU_46

VDDCR_CPU_35

VDDCR_CPU_47

VDDCR_CPU_36

VDDCR_CPU_28

VDDCR_CPU_29

VDDCR_CPU_40

VDDCR_CPU_30

VDDCR_CPU_37

VDDCR_CPU_49

VDDCR_CPU_38

VDDCR_CPU_39

VDDCR_CPU_48

VDDCR_CPU_41

VDDCR_CPU_27

VDDCR_GFX_14

VDDCR_GFX_15

VDDCR_GFX_16

VDDCR_GFX_17

VDDCR_GFX_18

VDDCR_GFX_19

VDDCR_GFX_20

VDDCR_GFX_21

VDDCR_GFX_22

VDDCR_GFX_23

VDDCR_GFX_24

VDDCR_GFX_25

VDDCR_GFX_26

VDDCR_GFX_27

VDDCR_GFX_28

VDDCR_GFX_29

VDDCR_GFX_1

VDDCR_GFX_2

VDDCR_GFX_3

VDDCR_GFX_4

VDDCR_GFX_5

VDDCR_GFX_6

VDDCR_GFX_7

VDDCR_GFX_8

VDDCR_GFX_9

VDDCR_GFX_10

VDDCR_GFX_11

VDDCR_GFX_12

VDDCR_GFX_30

VDDCR_GFX_31

VDDCR_GFX_32

VDDCR_GFX_33

VDDCR_GFX_34

VDDCR_GFX_35

VDDCR_GFX_36

VDDCR_GFX_37

VDDCR_GFX_13

+RTCVCC

C105

D

U8
W7
W12
W15
W18
W21
Y8
Y10
Y13
Y16
Y19
Y22
AB7
AB9
AB12
AB15
AB18
AB21
AD6
AD10
AD13
AD16
AD19
AD22
AE7
AE12
AK9
AG10
AK10
AG13
AK13
AG16
AK16
AG19
AK19
AG22
AK22
AH7
AE18
AE21
AH21
AG6
AH12
AN6
AH15
AH18
AL7
AK6
AE15

L8
L13
L16
L19
L22
N7
N12
N15
N18
N21
P8
P13
P16
P19
P22
T7
F12
F15
G11
G14
J8
J9
J11
K7
K12
K13
K15
K16
T12
T15
T18
T21
U13
U16
U19
U22
K19

1

2

D

+APU_CORE

35A

+APU_GFX

35A

+RTCBATT

+RTCBATT

R4003

D103

1 2

3

1

1K_0402_5%

2

CHN202UPT_SC70-3

SC600000B00

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

+CHGRTC

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

FP4 PWR

FP4 PWR

FP4 PWR

Custom

Custom

Custom

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

1
2

3
4

E

JRTC1

1
2

GND
GND

ACES_50271-0020N-001

CONN@

SP02000RO00

11 50Tuesday, May 02, 2017

11 50Tuesday, May 02, 2017

11 50Tuesday, May 02, 2017

E

1.A

1.A

1.A

A

B

C

D

E

@

UAPU1G

A8

RS@

ORIENT_APU#

1 2

R157
0_0402_5%

1 1

2 2

3 3

A12
A16
A20
A24
A28
A32

B12
B33

D10
D12
D14
D16
D18
D20
D22
D24
D26
D28
D30

F19
F22
F25
F30
F33

G17
G20
G23
G26

H30

J15
J19
J22
J25
J28

K10
K22
K27
K30
K33

L12
L15
L18
L21
L25

VSS_1

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

B2

VSS_8

B8

VSS_9

VSS_10

VSS_11

C3

VSS_12

D4

VSS_13

D6

VSS_14

D8

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

F1

VSS_27

F2

VSS_28

F4

VSS_29

F9

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

G7

VSS_36

VSS_37

VSS_38

VSS_39

VSS_40

H4

VSS_41

VSS_42

J5

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_48

K1

VSS_49

K2

VSS_50

K4

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_56

L5

VSS_57

VSS_58

VSS_59

VSS_60

VSS_61

VSS_62

GND

FP4 REV 0.93

FP4_BGA968

VSS_63

VSS_64

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_72

VSS_73

VSS_74

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_80

VSS_81

VSS_82

VSS_83

VSS_84

VSS_85

VSS_86

VSS_87

VSS_88

VSS_89

VSS_90

VSS_91

VSS_92

VSS_93

VSS_94

VSS_95

VSS_96

VSS_97

VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106

VSS_107

VSS_108

VSS_109

VSS_110

VSS_111

VSS_112

VSS_113

VSS_114

VSS_115

VSS_116

VSS_117

VSS_118

VSS_119

VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

L28
M4
M30
N10
N13
N16
N19
N22
N27
P1
P2
P4
P5
P12
P15
P18
P21
P30
P33
T4
T10
T13
T16
T19
T22
T30
U5
U12
U15
U18
U21
U24
V1
V2
V4
W10
W13
W16
W19
W22
Y4
Y5
Y12
Y15
Y18
Y21
Y24
AB1
AB2
AB4
AB10
AB13
AB16
AB19
AB22
AD4
AD9
AD12
AD15
AD18
AD21
AD24

AE10
AE13
AE16
AE19
AE22

AF1
AF4

AG9
AG12
AG15
AG18
AG21

AH4
AH10
AH13
AH16
AH19
AH22

AK1

AK4
AK12
AK15
AK18

AL16
AL19
AL22

AM4

AN9
AN10
AN15
AN18
AN21
AN25
AN28

AP1

AP2

AP4

AP7
AP22
AP27
AP30
AP33

AR6
AR25
AR28

AT4
AT19
AT22
AT30

AU5

AU8
AU11
AU14
AU20
AU23
AU27

AV4

AV7

AV9

AV12
AV15
AV25

UAPU1H

VSS_125

VSS_126

VSS_127

VSS_128

VSS_129

VSS_130

VSS_131

VSS_132

VSS_133

VSS_134

VSS_135

VSS_136

VSS_137

VSS_138

VSS_139

VSS_140

VSS_141

VSS_142

VSS_143

VSS_144

VSS_145

VSS_146

VSS_147

VSS_148

VSS_149

VSS_150

VSS_151

VSS_152

VSS_153

VSS_154

VSS_155

VSS_156

VSS_157

VSS_158

VSS_159

VSS_160

VSS_161

VSS_162

VSS_163

VSS_164

VSS_165

VSS_166

VSS_167

VSS_168

VSS_169

VSS_170

VSS_171

VSS_172

VSS_173

VSS_174

VSS_175

VSS_176

VSS_177

VSS_178

VSS_179

VSS_180

VSS_181

VSS_182

VSS_183

VSS_184

VSS_185

VSS_186

@

GND

FP4 REV 0.93

FP4_BGA968

VSS_187

VSS_188

VSS_189

VSS_190

VSS_191

VSS_192

VSS_193

VSS_194

VSS_195

VSS_196

VSS_197

VSS_198

VSS_199

VSS_200

VSS_201

VSS_202

VSS_203

VSS_204

VSS_205

VSS_206

VSS_207

VSS_208

VSS_209

VSS_210

VSS_211

VSS_212

VSS_213

VSS_215

VSS_214

AV30
AV33
AW22
AY4
AY6
AY8
AY10
AY12
AY14
AY16
AY20
AY22
AY24
AY26
AY28
AY30
BB1
BB33
BC4
BC8
BC12
BC16
BC20
BC24
BC28
BC32

L24
AL10
AK21

U30
U31

AN30

UAPU1J

RSVD_2

RSVD_3

RSVD_4

@

FP4 REV 0.93

FP4_BGA968

4 4

Security Classification

Security Classification

Security Classification

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PR OPERTY O F COMPAL E LECTRO NICS, INC. AN D CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PR OPERTY O F COMPAL E LECTRO NICS, INC. AN D CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PR OPERTY O F COMPAL E LECTRO NICS, INC. AN D CONTAI NS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRIT TEN CONSENT OF COMPAL E LECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRIT TEN CONSENT OF COMPAL E LECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRIT TEN CONSENT OF COMPAL E LECTRONICS, INC.

A

2017/04/18 2019/04/18

B

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Titl e

Titl e

Titl e

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

C

Date: Sheet of

D

Compal Electronics, Inc.

FP4 GND

FP4 GND

FP4 GND

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

12 50Tuesday, May 02, 2017

12 50Tuesday, May 02, 2017

12 50Tuesday, May 02, 2017

E

1.A

1.A

1.A

A

B

C

D

E

Reverse Type-4H

2-3A to 1 DIMMs/channel

DDRA_CLK0<7>
DDRA_CLK0#<7>
DDRA_CLK1<7>

Address : A0

1 1

+3VS

12

RD5

0_0402_5%

@

12

RD8

0_0402_5%

RS@

Layout Note:
Place near JDIMM1

2 2

+1.2V

1U_0402_6.3V6K

1

2

+1.2V

10U_0603_6.3V6M

1

2

3 3

+1.2V

0.1U_0201_10V6K

2

1

12

12

12

CD2

CD10

CD61

RD7

0_0402_5%

RD6

0_0402_5%

@

@

DDRA_SA2 DDRA_SBS1#
DDRA_SA1
DDRA_SA0

12

RD9

0_0402_5%

RS@

RD10

0_0402_5%

RS@

Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket

CRB use 0.1uF x12 (6 pop,6 unpop),180pF x1,100uF x2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD3

1

1

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

CD11

1

1

2D@

2

2

0.1U_0201_10V6K

0.1U_0201_10V6K

CD62

2

2

1

1

1U_0402_6.3V6K

1U_0402_6.3V6K

CD4

1

2

10U_0603_6.3V6M

CD12

1

2D@

2

0.1U_0201_10V6K

CD63

2

1

1U_0402_6.3V6K

CD6

CD5

CD13

2D@

CD64

CD7

1

1

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

CD14

CD15

1

1

2D@

2D@

2

2

180P_0402_50V8J

2

1

DDR4 support Even Parity check in DRAMs.

+1.2V

@EMC@

CD1 .1U_0402_16V7K

Follow MA51

1

@

+

CD18
330U_D2_2V_Y

2

SGA00009S00
330U 2V H1.9
9mohm POLY

CD65

DDRA_CLK1#<7>

DDRA_CKE0<7>
DDRA_CKE1<7>

DDRA_SCS0#<7>
DDRA_SCS1#<7>

DDRA_ODT0<7>
DDRA_ODT1<7>

DDRA_BG0<7>

DDRA_BG1<7>
DDRA_SBS0#<7>
DDRA_SBS1#<7>

DDRA_SMA[16..0]<7>

MEM_MA_ACT#<7>

1 2

RD225 0_0402_5%RS@
RD1 1K_0402_1%

12

12

MEM_MA_EVENT#<7>

MEM_MA_RST#<7>

APU_SM B_DATA0<9,14>
APU_SM B_CLK0<9,14>

DDRA_SDM[7..0]<7>

DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_CLK1#

DDRA_CKE0
DDRA_CKE1

DDRA_SCS0#
DDRA_SCS1#

DDRA_ODT0
DDRA_ODT1

DDRA_BG0
DDRA_BG1
DDRA_SBS0#

DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
DDRA_SMA14
DDRA_SMA15
DDRA_SMA16

MEM_MA_ACT#

DDRA_PARITY
DDRA_ALERT#
MEM_MA_EVENT#
MEM_MA_RST#

APU_SM B_DATA0
APU_SM B_CLK0

DDRA_SA2
DDRA_SA1
DDRA_SA0

DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7

JDIMM1A

REVERSE

137

CK0(T)

139

CK0#(C)

138

CK1(T)

140

CK1#(C)

109

CKE0

110

CKE1

149

S0#

157

S1#

162

S2#/C0

165

S3#/C1

155

ODT0

161

ODT1

115

BG0

113

BG1

150

BA0

145

BA1

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10_AP

120

A11

119

A12

158

A13

151

A14_WE#

156

A15_CAS#

152

A16_RAS#

114

ACT#

143

PARITY

116

ALERT#

134

EVENT#

108

RESET#

254

SDA

253

SCL

166

SA2

260

SA1

256

SA0

92

CB0_NC

91

CB1_NC

101

CB2_NC

105

CB3_NC

88

CB4_NC

87

CB5_NC

100

CB6_NC

104

CB7_NC

97

DQS8(T)

95

DQS8#(C)

12

DM0#/DBI0#

33

DM1#/DBI1#

54

DM2#/DBI2#

75

DM3#/DBI3#

178

DM4#/DBI4#

199

DM5#/DBI5#

220

DM6#/DBI6#

241

DM7#/DBI7#

96

DM8#/DBI8#

LOTES_ADDR0206-P001A

CONN@

DQS0(T)

DQS0#(C)

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

DQS1(T)

DQS1#(C)

DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23

DQS2(T)

DQS2#(C)

DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

DQS3(T)

DQS3#(C)

DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39

DQS4(T)

DQS4#(C)

DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47

DQS5(T)

DQS5#(C)

DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55

DQS6(T)

DQS6#(C)

DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS7(T)

DQS7#(C)

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

DQ8
DQ9

DDRA_SDQ1

7

DDRA_SDQ2

20

DDRA_SDQ3

21

DDRA_SDQ4

4

DDRA_SDQ5

3

DDRA_SDQ6

16

DDRA_SDQ7

17

DDRA_SDQS0

13

DDRA_SDQS0#

11

DDRA_SDQ8

28

DDRA_SDQ9

29

DDRA_SDQ10

41

DDRA_SDQ11

42

DDRA_SDQ12

24

DDRA_SDQ13

25

DDRA_SDQ14

38

DDRA_SDQ15

37

DDRA_SDQS1

34

DDRA_SDQS1#

32

DDRA_SDQ16

50

DDRA_SDQ17

49

DDRA_SDQ18

62

DDRA_SDQ19

63

DDRA_SDQ20

46

DDRA_SDQ21

45

DDRA_SDQ22

58

DDRA_SDQ23

59

DDRA_SDQS2

55

DDRA_SDQS2#

53

DDRA_SDQ24

70

DDRA_SDQ25

71

DDRA_SDQ26

83

DDRA_SDQ27

84

DDRA_SDQ28

66

DDRA_SDQ29

67

DDRA_SDQ30

79

DDRA_SDQ31

80

DDRA_SDQS3

76

DDRA_SDQS3#

74

DDRA_SDQ32

174

DDRA_SDQ33

173

DDRA_SDQ34

187

DDRA_SDQ35

186

DDRA_SDQ36

170

DDRA_SDQ37

169

DDRA_SDQ38

183

DDRA_SDQ39

182

DDRA_SDQS4

179

DDRA_SDQS4#

177

DDRA_SDQ40

195

DDRA_SDQ41

194

DDRA_SDQ42

207

DDRA_SDQ43

208

DDRA_SDQ44

191

DDRA_SDQ45

190

DDRA_SDQ46

203

DDRA_SDQ47

204

DDRA_SDQS5

200

DDRA_SDQS5#

198

DDRA_SDQ48

216

DDRA_SDQ49

215

DDRA_SDQ50

228

DDRA_SDQ51

229

DDRA_SDQ52

211

DDRA_SDQ53

212

DDRA_SDQ54

224

DDRA_SDQ55

225

DDRA_SDQS6

221

DDRA_SDQS6#

219

DDRA_SDQ56

237

DDRA_SDQ57

236

DDRA_SDQ58

249

DDRA_SDQ59

250

DDRA_SDQ60

232

DDRA_SDQ61

233

DDRA_SDQ62

245

DDRA_SDQ63

246

DDRA_SDQS7

242

DDRA_SDQS7#

240

DDRA_SDQ0

8

DDRA_SDQ[7..0] <7>

DDRA_SDQS0 <7>
DDRA_SDQS0# <7>
DDRA_SDQ[15..8] <7>

DDRA_SDQS1 <7>
DDRA_SDQS1# <7>
DDRA_SDQ[23..16] <7>

DDRA_SDQS2 <7>
DDRA_SDQS2# <7>
DDRA_SDQ[31..24] <7>

DDRA_SDQS3 <7>
DDRA_SDQS3# <7>
DDRA_SDQ[39..32] <7>

DDRA_SDQS4 <7>
DDRA_SDQS4# <7>
DDRA_SDQ[47..40] <7>

DDRA_SDQS5 <7>
DDRA_SDQS5# <7>
DDRA_SDQ[55..48] <7>

DDRA_SDQS6 <7>
DDRA_SDQS6# <7>

DDRA_SDQ[63..56] <7>

DDRA_SDQS7 <7>
DDRA_SDQS7# <7>

Follow CRB design

+1.2V

RD3

1K_0402_1%

RD4

1K_0402_1%

1 2

CD20 4.7U_0402_6.3V6M

1 2

15mil

1

2D@

2

+VREFA_CA

CD22 0.1U_0201_10V6K

CD21 0.1U_0201_10V6K

CD19 1000P_0402_50V7K

2

2

1

1

1

2

Place near to SO-DIMM connector.

+1.2V +1.2V

JDIMM1B

REVERSE

111

VDD1

112
117
118
123
124
129
130

+3VS

135
136

255

164

1
2
5
6

9
10
14
15
18
19
22
23
26
27
30
31
35
36
39
40
43
44
47
48
51
52
56
57
60
61
64
65
68
69
72
73
77
78
81
82
85
86
89
90
93
94
98

262

Layout Note:
Place near JDIMM1.258

VDD11

VDD2

VDD12

VDD3

VDD13

VDD4

VDD14

VDD5

VDD15

VDD6

VDD16

VDD7

VDD17

VDD8

VDD18

VDD9

VDD19

VDD10

VDDSPD

VREFCA

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

GND

LOTES_ADDR0206-P001A

CONN@

VPP1
VPP2

GND

VTT

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

141
142
147
148
153
154
159
160

+0.6VS

163

258

257
259

99
102
103
106
107
167
168
171
172
175
176
180
181
184
185
188
189
192
193
196
197
201
202
205
206
209
210
213
214
217
218
222
223
226
227
230
231
234
235
238
239
243
244
247
248
251
252

261

+2.5V

CD31 1U_0402_6.3V6K

1

2

CRB use 1uF x1

CRB use 4.7uF x1,0.1uF x1

Layout Note:
Place near JDIMM1.257,259

CRB use 0.1uF x2,180pF x1

4 4

10U_0603_6.3V6M

1

2

+2.5V

1U_0402_6.3V6K

10U_0603_6.3V6M

CD23

CD25

CD24

1

1

2D@

2

2

A

Layout Note:
Place near JDIMM1.255

CRB use 1uF x1

+3VS

1U_0402_6.3V6K

CD26

1

2

1

2

Security Classific ation

Security Classific ation

Security Classific ation

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL
AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

+0.6VS

10U_0603_6.3V6M

10U_0603_6.3V6M

CD27

CD28

1

2D@

2D@

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

DDR4_SO-DIMM

DDR4_SO-DIMM

DDR4_SO-DIMM

1U_0402_6.3V6K

1U_0402_6.3V6K

CD30

CD29

1

1

2

2

13 50Tuesday, May 02, 2017

13 50Tuesday, May 02, 2017

E

13 50Tuesday, May 02, 2017

1.A

1.A

1.A

A

B

C

D

E

*Stoney Platform will use 4H on JDIMM2*
Need to confirm Footprint

Reverse Type-8H

2-3A to 1 DIMMs/channel

DDRB_CLK0<7>
DDRB_CLK0#<7>
DDRB_CLK1<7>

Address : A2

1 1

+3VS

RD244

12

RD247

0_0402_5%

@

12

RD252

0_0402_5%

RS@

Layout Note:
Place near JDIMM2

2 2

+1.2V

1U_0402_6.3V6K

CD86

1

2

+1.2V

10U_0603_6.3V6M

CD82

1

2

3 3

+1.2V

0.1U_0201_10V6K
CD91

2

1

10K_0402_5%

12

12

RD248

0_0402_5%

@

DDRB_SA2 DDRB_SBS1#
DDRB_SA1
DDRB_SA0

12

12

RD249

0_0402_5%

RD246

0_0402_5%

RS@

@

Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket

CRB use 0.1uF x12 (6 pop,6 unpop),180pF x1,100uF x2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

1

2

0.1U_0201_10V6K

2

1

1U_0402_6.3V6K

CD78

CD67

1

1

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

CD90

CD96

1

1

2

2

0.1U_0201_10V6K

0.1U_0201_10V6K

CD94

CD97

2

2

1

1

1U_0402_6.3V6K

1U_0402_6.3V6K

CD93

CD77

CD66

CD81

CD71

1

1

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

CD68

CD88

1

1

2

2

180P_0402_50V8J

CD85

2

1

DDR4 support Even Parity check in DRAMs.

+1.2V

@EMC@

CD73 .1U_0402_16V7K

DDRB_CLK1#<7>

DDRB_CKE0<7>
DDRB_CKE1<7>

DDRB_SCS0#<7>
DDRB_SCS1#<7>

DDRB_ODT0<7>
DDRB_ODT1<7>

DDRB_BG0<7>

DDRB_BG1<7>
DDRB_SBS0#<7>
DDRB_SBS1#<7>

DDRB_SMA[16..0]<7>

MEM_MB_ACT#<7>

1 2

RD250 0_0402_5%RS@
RD245 1K_0402_1%

12

12

MEM_MB_EVENT#<7>

MEM_MB_RST#<7>

APU_SM B_DATA0<9,13>
APU_SM B_CLK0<9,13>

DDRB_SDM[7..0]<7>

DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#

DDRB_CKE0
DDRB_CKE1

DDRB_SCS0#
DDRB_SCS1#

DDRB_ODT0
DDRB_ODT1

DDRB_BG0
DDRB_BG1
DDRB_SBS0#

DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
DDRB_SMA14
DDRB_SMA15
DDRB_SMA16

MEM_MB_ACT#

DDRB_PARITY
DDRB_ALERT#
MEM_MB_EVENT#
MEM_MB_RST#

APU_SM B_DATA0
APU_SM B_CLK0

DDRB_SA2
DDRB_SA1
DDRB_SA0

DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7

JDIMM2A

RESERVE

137

CK0(T)

139

CK0#(C)

138

CK1(T)

140

CK1#(C)

109

CKE0

110

CKE1

149

S0#

157

S1#

162

S2#/C0

165

S3#/C1

155

ODT0

161

ODT1

115

BG0

113

BG1

150

BA0

145

BA1

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10_AP

120

A11

119

A12

158

A13

151

A14_WE#

156

A15_CAS#

152

A16_RAS#

114

ACT#

143

PARITY

116

ALERT#

134

EVENT#

108

RESET#

254

SDA

253

SCL

166

SA2

260

SA1

256

SA0

92

CB0_NC

91

CB1_NC

101

CB2_NC

105

CB3_NC

88

CB4_NC

87

CB5_NC

100

CB6_NC

104

CB7_NC

97

DQS8(T)

95

DQS8#(C)

12

DM0#/DBI0#

33

DM1#/DBI1#

54

DM2#/DBI2#

75

DM3#/DBI3#

178

DM4#/DBI4#

199

DM5#/DBI5#

220

DM6#/DBI6#

241

DM7#/DBI7#

96

DM8#/DBI8#

LOTES_ADDR0070-P009A

CONN@

DQS0(T)

DQS0#(C)

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

DQS1(T)

DQS1#(C)

DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23

DQS2(T)

DQS2#(C)

DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

DQS3(T)

DQS3#(C)

DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39

DQS4(T)

DQS4#(C)

DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47

DQS5(T)

DQS5#(C)

DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55

DQS6(T)

DQS6#(C)

DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS7(T)

DQS7#(C)

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

DQ8
DQ9

DDRB_SDQ0

8

DDRB_SDQ1

7

DDRB_SDQ2

20

DDRB_SDQ3

21

DDRB_SDQ4

4

DDRB_SDQ5

3

DDRB_SDQ6

16

DDRB_SDQ7

17

DDRB_SDQS0

13

DDRB_SDQS0#

11

DDRB_SDQ8

28

DDRB_SDQ9

29

DDRB_SDQ10

41

DDRB_SDQ11

42

DDRB_SDQ12

24

DDRB_SDQ13

25

DDRB_SDQ14

38

DDRB_SDQ15

37

DDRB_SDQS1

34

DDRB_SDQS1#

32

DDRB_SDQ16

50

DDRB_SDQ17

49

DDRB_SDQ18

62

DDRB_SDQ19

63

DDRB_SDQ20

46

DDRB_SDQ21

45

DDRB_SDQ22

58

DDRB_SDQ23

59

DDRB_SDQS2

55

DDRB_SDQS2#

53

DDRB_SDQ24

70

DDRB_SDQ25

71

DDRB_SDQ26

83

DDRB_SDQ27

84

DDRB_SDQ28

66

DDRB_SDQ29

67

DDRB_SDQ30

79

DDRB_SDQ31

80

DDRB_SDQS3

76

DDRB_SDQS3#

74

DDRB_SDQ32

174

DDRB_SDQ33

173

DDRB_SDQ34

187

DDRB_SDQ35

186

DDRB_SDQ36

170

DDRB_SDQ37

169

DDRB_SDQ38

183

DDRB_SDQ39

182

DDRB_SDQS4

179

DDRB_SDQS4#

177

DDRB_SDQ40

195

DDRB_SDQ41

194

DDRB_SDQ42

207

DDRB_SDQ43

208

DDRB_SDQ44

191

DDRB_SDQ45

190

DDRB_SDQ46

203

DDRB_SDQ47

204

DDRB_SDQS5

200

DDRB_SDQS5#

198

DDRB_SDQ48

216

DDRB_SDQ49

215

DDRB_SDQ50

228

DDRB_SDQ51

229

DDRB_SDQ52

211

DDRB_SDQ53

212

DDRB_SDQ54

224

DDRB_SDQ55

225

DDRB_SDQS6

221

DDRB_SDQS6#

219

DDRB_SDQ56

237

DDRB_SDQ57

236

DDRB_SDQ58

249

DDRB_SDQ59

250

DDRB_SDQ60

232

DDRB_SDQ61

233

DDRB_SDQ62

245

DDRB_SDQ63

246

DDRB_SDQS7

242

DDRB_SDQS7#

240

DDRB_SDQ[7..0] <7>

DDRB_SDQS0 <7>
DDRB_SDQS0# <7>
DDRB_SDQ[15..8] <7>

DDRB_SDQS1 <7>
DDRB_SDQS1# <7>
DDRB_SDQ[23..16] <7>

DDRB_SDQS2 <7>
DDRB_SDQS2# <7>
DDRB_SDQ[31..24] <7>

DDRB_SDQS3 <7>
DDRB_SDQS3# <7>
DDRB_SDQ[39..32] <7>

DDRB_SDQS4 <7>
DDRB_SDQS4# <7>
DDRB_SDQ[47..40] <7>

DDRB_SDQS5 <7>
DDRB_SDQS5# <7>
DDRB_SDQ[55..48] <7>

DDRB_SDQS6 <7>
DDRB_SDQS6# <7>

DDRB_SDQ[63..56] <7>

DDRB_SDQS7 <7>
DDRB_SDQS7# <7>

Follow CRB design

+1.2V

RD243

1K_0402_1%

RD251

1K_0402_1%

1 2

CD84 4.7U_0402_6.3V6M

1 2

15mil

1

2D@

2

+VREFB_CA

CD80 0.1U_0201_10V6K

CD76 0.1U_0201_10V6K

CD87 1000P_0402_50V7K

2

2

1

1

1

2

Place near to SO-DIMM connector.

+1.2V +1.2V

JDIMM2B

RESERVE

111

VDD1

112
117
118
123
124
129
130

+3VS

135
136

255

164

1
2
5
6

9
10
14
15
18
19
22
23
26
27
30
31
35
36
39
40
43
44
47
48
51
52
56
57
60
61
64
65
68
69
72
73
77
78
81
82
85
86
89
90
93
94
98

262

Layout Note:
Place near JDIMM2.258

VDD11

VDD2

VDD12

VDD3

VDD13

VDD4

VDD14

VDD5

VDD15

VDD6

VDD16

VDD7

VDD17

VDD8

VDD18

VDD9

VDD19

VDD10

VDDSPD

VTT

VREFCA

VPP1
VPP2

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

GND

LOTES_ADDR0070-P009A

CONN@

GND

141
142
147
148
153
154
159
160

+0.6VS

163

258

257
259

99
102
103
106
107
167
168
171
172
175
176
180
181
184
185
188
189
192
193
196
197
201
202
205
206
209
210
213
214
217
218
222
223
226
227
230
231
234
235
238
239
243
244
247
248
251
252

261

+2.5V

CD89 1U_0402_6.3V6K

1

2

CRB use 1uF x1

CRB use 4.7uF x1,0.1uF x1

Layout Note:
Place near JDIMM2.257,259

CRB use 0.1uF x2,180pF x1

4 4

10U_0603_6.3V6M

1

2

+2.5V

1U_0402_6.3V6K

10U_0603_6.3V6M

CD79

CD75

CD83

1

1

2

2

A

Layout Note:
Place near JDIMM2.255

CRB use 1uF x1

+3VS

1U_0402_6.3V6K

CD95

1

2

1

2

Security Classific ation

Security Classific ation

Security Classific ation

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL
AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

+0.6VS

10U_0603_6.3V6M

10U_0603_6.3V6M

CD74

CD70

1

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

DDR4_SO-DIMM

DDR4_SO-DIMM

DDR4_SO-DIMM

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

1U_0402_6.3V6K

1U_0402_6.3V6K

CD72

CD92

1

1

2

2

14 50Tuesday, May 02, 2017

14 50Tuesday, May 02, 2017

E

14 50Tuesday, May 02, 2017

1.A

1.A

1.A

5

4

3

2

1

PEG_HTX_C_GRX_P[0..7]<6>

D D

PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_N0

PEG_HTX_C_GRX_P1 PEG_HTX_GRX_P1
PEG_HTX_C_GRX_N1

PEG_HTX_C_GRX_P2
PEG_HTX_C_GRX_N2

PEG_HTX_C_GRX_P3
PEG_HTX_C_GRX_N3 PEG_HTX_GRX_N3

PEG_HTX_C_GRX_P4
PEG_HTX_C_GRX_N4

PEG_HTX_C_GRX_P5
PEG_HTX_C_GRX_N5

PEG_HTX_C_GRX_P6
PEG_HTX_C_GRX_N6

PEG_HTX_C_GRX_P7
PEG_HTX_C_GRX_N7

C C

PEG_HTX_C_GRX_N[0..7]<6>

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

CV312 0.22U_0402_16V7KDIS@
CV306 0.22U_0402_16V7KDIS@

CV308 0.22U_0402_16V7KDIS@
CV305 0.22U_0402_16V7KDIS@

CV307 0.22U_0402_16V7KDIS@
CV309 0.22U_0402_16V7KDIS@

CV313 0.22U_0402_16V7KDIS@
CV304 0.22U_0402_16V7KDIS@

CV2710 0.22U_0402_16V7KT1DIS@
CV2707 0.22U_0402_16V7KT1DIS@

CV2711 0.22U_0402_16V7KT1DIS@
CV2709 0.22U_0402_16V7KT1DIS@

CV2717 0.22U_0402_16V7KT1DIS@
CV2714 0.22U_0402_16V7KT1DIS@

CV2704 0.22U_0402_16V7KT1DIS@
CV2706 0.22U_0402_16V7KT1DIS@

CLK_PEG_VGA<10>
CLK_PEG_VGA#<10>

PEG_HTX_C_GRX_P[0..7]

PEG_HTX_C_GRX_N[0..7]

PEG_HTX_GRX_P0
PEG_HTX_GRX_N0

PEG_HTX_GRX_N1

PEG_HTX_GRX_P2
PEG_HTX_GRX_N2

PEG_HTX_GRX_P3

PEG_HTX_GRX_P4
PEG_HTX_GRX_N4

PEG_HTX_GRX_P5
PEG_HTX_GRX_N5

PEG_HTX_GRX_P6
PEG_HTX_GRX_N6

PEG_HTX_GRX_P7
PEG_HTX_GRX_N7

CLK_PEG_VGA
CLK_PEG_VGA#

UV1B

@

AT41
AT40

AR41
AR40

AP41
AP40

AM41
AM40

AL41
AL40

AK41
AK40

AJ41
AJ40

AH41
AH40

AV33
AU33

symbol2

PCIE_RX0P
PCIE_RX0N

PCIE_RX1P
PCIE_RX1N

PCIE_RX2P
PCIE_RX2N

PCIE_RX3P
PCIE_RX3N

PCIE_RX4P
PCIE_RX4N

PCIE_RX5P
PCIE_RX5N

PCIE_RX6P
PCIE_RX6N

PCIE_RX7P
PCIE_RX7N

PCIE_REFCLKP
PCIE_REFCLKN

REV 0.91

2160896088A1R16M_FCBGA769P-NH

PCIE_TX0P

PCIE_TX0N

PCIE_TX1P

PCIE_TX1N

PCIE_TX2P

PCIE_TX2N

PCIE_TX3P

PCIE_TX3N

PCIE_TX4P

PCIE_TX4N

PCIE_TX5P

PCIE_TX5N

PCIE_TX6P

PCIE_TX6N

PCIE_TX7P

PCIE_TX7N

PERSTB

PX_EN

PCIE_ZVSS

PEG_GTX_C_HRX_P[0..7]<6>

PEG_GTX_C_HRX_N[0..7]<6>

PEG_GTX_HRX_P0

AV35

PEG_GTX_HRX_N0

AU35

PEG_GTX_HRX_P1

AU38

PEG_GTX_HRX_N1

AU39

PEG_GTX_HRX_P2

AR37

PEG_GTX_HRX_N2

AR38

PEG_GTX_HRX_P3

AN37

PEG_GTX_HRX_N3

AN38

PEG_GTX_HRX_P4

AL37

PEG_GTX_HRX_N4

AL38

PEG_GTX_HRX_P5

AJ37

PEG_GTX_HRX_N5

AJ38

PEG_GTX_HRX_P6

AG37

PEG_GTX_HRX_N6

AG38

PEG_GTX_HRX_P7

AE37

PEG_GTX_HRX_N7

AE38

PLT_RST_VGA#

AV41

PX_EN

AC41

AU41

1

@

For BACO mode(AMD PowerXpress) use, NC if not use

RV371

DIS@

200_0402_1%

1 2

T218

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

PEG_GTX_C_HRX_P[0..7]

PEG_GTX_C_HRX_N[0..7]

CV1 0.22U_0402_16V7KDIS@
CV2 0.22U_0402_16V7KDIS@

CV3 0.22U_0402_16V7KDIS@
CV4 0.22U_0402_16V7KDIS@

CV5 0.22U_0402_16V7KDIS@
CV6 0.22U_0402_16V7KDIS@

CV7 0.22U_0402_16V7KDIS@
CV8 0.22U_0402_16V7KDIS@

CV2715 0.22U_0402_16V7KT1DIS@
CV2708 0.22U_0402_16V7KT1DIS@

CV2713 0.22U_0402_16V7KT1DIS@
CV2703 0.22U_0402_16V7KT1DIS@

CV2705 0.22U_0402_16V7KT1DIS@
CV2712 0.22U_0402_16V7KT1DIS@

CV2716 0.22U_0402_16V7KT1DIS@
CV2702 0.22U_0402_16V7KT1DIS@

PEG_GTX_C_HRX_P0
PEG_GTX_C_HRX_N0

PEG_GTX_C_HRX_P1
PEG_GTX_C_HRX_N1

PEG_GTX_C_HRX_P2
PEG_GTX_C_HRX_N2

PEG_GTX_C_HRX_P3
PEG_GTX_C_HRX_N3

PEG_GTX_C_HRX_P4
PEG_GTX_C_HRX_N4

PEG_GTX_C_HRX_P5
PEG_GTX_C_HRX_N5

PEG_GTX_C_HRX_P6
PEG_GTX_C_HRX_N6

PEG_GTX_C_HRX_P7
PEG_GTX_C_HRX_N7

B B

APU_PCIE_RST#<9,28,29,30>

PE_GPIO0<9>

12

RV370

2.2K_0402_5%

DIS@

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

+3VSDGPU

UV2
MC74VHC1G08DFT2G_SC70-5

5

DIS@

1

P

IN1

O

2

IN2

G

3

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

3

4

PLT_RST_VGA#

12

RV4
100K_0402_5%

DIS@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

R17M-P1-50/70_(1/9)_PCIE

R17M-P1-50/70_(1/9)_PCIE

R17M-P1-50/70_(1/9)_PCIE

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

15 50Tuesday, May 02, 2017

15 50Tuesday, May 02, 2017

15 50Tuesday, May 02, 2017

1

1.A

1.A

1.A

5

4

3

2

1

VGA_AC_BATT

GPIO_21_PCC

0.1U_0201_10V6K

+3VSDGPU

RV409

10K_0402_5%

DIS@

GPIO_22_ROMCSb
GPIO_8_ROMSO

@

CV2718

DV1

RB751V-40_SOD323-2

1 2

@

NL17SZ07DFT2G_SC70-5

4

SA00004BV00

DV2

RB751V-40_SOD323-2

UV56

@

1

CS#

2

DO(IO1)

3

WP#(IO2)

4

GND

GD25Q40CTIGR_SOIC_8P

SA0000AE400

S IC FL 4M GD25Q40CTIGR SOP 8P SPI

Follow CRB material

1 2

RV90 1K_0402_1%

@

2

1

Peak Current C ontrol (PCC) CKT
Revers ed

DIS@

+1.8VALW

UV3

Y

DIS@

HOLD#(IO3)

DI(IO0)

+3VSDGPU

12

5

P

NC

A

G

3

12

VCC

CLK

@

RV91
10K_0402_5%

1 2

1

2

8
7
6
5

RV1640
0_0402_5%

RS@

GPU_PROCHOT#

GPIO_10_ROMSCK
GPIO_9_ROMSI

12

GPU_ACIN <24>

APU_PROCHOT# <8,24,44,45>

+3VSDGPU+3VSDGPU

1

DIS@

CV2721

0.1U_0201_10V6K

2

GPU_PROCHOT# <48>

+3VSDGPU

12

RV507
47K_0402_5%

6 1

0
1
0
1

2

G

S

D

QV1B

DIS@

Volt ag e
Selected (V)

DIS@

+1.8VSDGPU

RV412

CV314

1U_0402_6.3V6K

1.1

1.0

0.9

0.8

5

3 4

EC_SMB_DA2<8,24>

D D

EC_SMB_CK2<8,24>

C C

+1.8VSDGPU

RV84

DIS@

10K_0402_5%

1 2

@

RV89

10K_0402_5%

1 2

DMN66D0LDW-7_SOT363-6

@

RV87

RV410

10K_0402_5%

10K_0402_5%

1 2

RV88

DIS@

RV411

10K_0402_5%

10K_0402_5%

1 2

QV1A

DIS@

DMN66D0LDW-7_SOT363-6

Vgs = 1.2~2.0 V

@

1 2

GPU_SVC
GPU_SVD
GPU_SVT

@

1 2

SGD

Boot-VID Code

SVD

SVC

0
0
1
1

12

DIS@

1K_0402_5%

1

@

2

RV413

CV315

1U_0402_6.3V6K

SCL use 47k, CRB use 4.7k
AMD Confirm List_1027 use PU-47k

12

RV508
47K_0402_5%

DIS@

VGA_SMB_DA3

VGA_SMB_CK3

SCL PU-1k
CRB PU-10k/PD-1uF
AMD Confirm List_1027 use PU-1k

12

DIS@

1K_0402_5%

TEST_P G

TEST_P G_BA CO

1

@

2

+3VSDGPU

10mA

1

DIS@

CV26

1U_0402_6.3V6K

2

VGA_SMB_CK3
VGA_SMB_DA3

GPU_SVC
GPU_SVD

GPU_SVC<48>

GPU_SVT

GPU_SVD<48>
GPU_SVT<48>

1 2

RV155 0_0402_5%DIS@

1 2

RV156 0_0402_5%DIS@

1 2

RV157 0_0402_5%DIS@

TEST_P G
TEST_P G_BA CO

UV1E

@

AM31

VDD_33

GPIO_5_REG_HOT_AC_BATT

GPIO_16_8P_DETECT

GPIO_17_THERMAL_INT

AC35

SCL

AC34

SDA

AW40

SMBCLK

AW41

SMBDAT

AU17

GPIO_SVC

AV17

GPIO_SVD

AR17

GPIO_SVT

AN34

DDCVGACLK

AP31

DDCVGADATA

AY13

TEST_PG

BA13

TEST_PG_BACO

K41

RSVD#K41

R34

RSVD#R34

REV 0 .91

2160896088A1R16M_FCBGA769P-NH

symbol5

GPIO_6_TACH

GPIO_8_ROMSO

GPIO_9_ROMSI

GPIO_10_ROMSCK

GPIO_11
GPIO_12
GPIO_13

GPIO_14_HPD2

GPIO_15

GPIO_18_HPD3

GPIO_19_CTF

GPIO_20
GPIO_21

GPIO_22_ROMCSB

GPIO_29

GPIO_30
GENERICA
GENERICB
GENERICC
GENERICD

GENERICE_HPD4
GENERICF_HPD5

GENERICG

CLKREQB

BL_ENABLE

BL_PWM_DIM

SWAPLOCKA
SWAPLOCKB

GENLK_CLK

GENLK_VSYNC

GPIO_0
GPIO_1
GPIO_2

HPD1

WAKEB

DIGON

HSYNC
VSYNC

W40
AA40
AA35

AA34
U35

AP25
AM25
AM27
W41
Y40
Y41
AU21
AA41
U34
R37
AV25
R38
AB40
AB41
AP27
W37
W38
BA38
AV29
AU31
AV31
AU25
AV23
AM29

AV21

AV40
AU40

AC40

AC37
AC38

W34
W35

AG34
AE34
AR29
AP29

GPIO_0

GPIO_2

VGA_AC_BATT
GPIO_6_TACH

GPIO_8

RV1644 33_0402_5%DIS@

GPIO_9

RV1645 33_0402_5%DIS@

GPIO_10

RV1646 33_0402_5%DIS@

GPIO_11
GPIO_12
GPIO_13

GPIO_15

GPIO_19_CTF
GPIO_20
GPIO_21_PCC
GPIO_22

RV1647 33_0402_5%DIS@

GPIO_29

PEG_CLKREQ#_R

WAKEB

HSYNC
VSYNC

RV1631 10K_0201_5%@

1 2
1 2
1 2

1 2

RV153 0_0402_5%@

RV368 10K_0402_5 %@

12

GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK

GPIO_22_ROMCSb

12

12

+3VSDGPU

PEG_CLKREQ# <9>

+3VSDGPU

12

RV162

4.7K_0402_5%

@

WAKEB

12

RV430

4.7K_0402_5%

@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

R17M-P1-50/70_(2/9)_MSIC-1

R17M-P1-50/70_(2/9)_MSIC-1

R17M-P1-50/70_(2/9)_MSIC-1

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

1

16 50Tuesd ay, May 0 2, 2 017

16 50Tuesd ay, May 0 2, 2 017

16 50Tuesd ay, May 0 2, 2 017

1.A

1.A

1.A

GPIO_19_CTF

+3VSDGPU +1.8VSDGPU

RV152

RV502

10K_0201_5%@

10K_0201_5%@

1 2

1 2

DIS@

RV151
10K_0201_5%

1 2

SCL can leave ncVDD_33

Tit le

Tit le

Tit le

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

B B

A A

5

+3VSDGPU

RV416

5.1K_0201_1%

RV417

5.1K_0201_1%

12

12

12

@

DIS@

RV414

RV418

5.1K_0201_1%

5.1K_0201_1%

12

12

@

DIS@

RV419

RV415

5.1K_0201_1%

5.1K_0201_1%

12

12

12

@

@

DIS@

RV420

5.1K_0201_1%

12

@

RV421

5.1K_0201_1%

@

RV422

RV424

RV426

5.1K_0201_1%

5.1K_0201_1%

5.1K_0201_1%

12

12

12

@

DIS@

DIS@

RV425

RV427

RV423

5.1K_0201_1%

5.1K_0201_1%

5.1K_0201_1%

12

12

12

12

@

@

DIS@

DIS@

RV432

RV434

5.1K_0201_1%

RV431

5.1K_0201_1%

RV436

5.1K_0201_1%

5.1K_0201_1%

12

12

DIS@

DIS@

RV433

RV435

5.1K_0201_1%

5.1K_0201_1%

RV429

5.1K_0201_1%

12

12

@

@

RV428

5.1K_0201_1%

12

12

12

@

@

@

RV440

RV438

5.1K_0201_1%

5.1K_0201_1%

12

@

RV437

5.1K_0201_1%

4

GPIO_0
GPIO_2
GPIO_11
GPIO_12
GPIO_13
GPIO_15
GPIO_20
GPIO_29

HSYNC
VSYNC

GPIO_8
GPIO_9
GPIO_22

12

12

@

DIS@

RV439

5.1K_0201_1%

TX_HALF_SWING[0:disable,1 :enable]
BIF_GEN3_EN_A[0:disable,1 :enable]
ROM_CONFIG_[0]/MemoryAp erture
ROM_CONFIG_[1]/MemoryAp erture
ROM_CONFIG_[2]/MemoryAp erture
Reserved [PD for default]
TX_DEEMPH_EN[0:disable,1: enable]
BIF_VGA_DIS[0:VGA,1:Hea dless]
Special Usage[1] GPUdefault
Special Usage[0] GPUdefault
BIF_CLK_PM_EN[0:disable,1 :enable]
Reserved [PD for production]
BIOS_ROM_EN[0:disable,1: enable]

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

5

+1.8VSDGPU

DIS@

RV468

10K_0201_5%

1 2

D D

UV1F

@

symbol6

XTALOUT

REV 0. 91

PLLCHARZ_L

PLLCHARZ_H

ANALOGIO

C C

2160896088A1R16M_FCBGA769P-NH

RV467

XTALIN

DIS@

10K_0201_5%

1 2

4

RV101 33_0201_5%

1 2
1 2

RV100 33_0201_5%

1 2

RV469

10K_0402_5%

BA39

AY39

AV15
AU15

AY38

12

1
1

DIS@
DIS@

DIS@

RV83

16.2K_0402_1%@

XTALIN

XTALOUT

@
@

DNI

T229
T230

AA38
AA37

B2

UV1A

@

symbol1

BP_0
BP_1

TEST6

REV 0. 91

2160896088A1R16M_FCBGA769P-NH

JTAG_TDO

JTAG_TDI

JTAG_TMS

JTAG_TCK

TESTEN

JTAG_TRSTB

AF41
AD40
AD41
AE41

AE40
AF40

XTALOUT

XTALIN

JTAG_TDO_GPU
JTAG_TDI_GPU
JTAG_TMS_GPU
JTAG_TCK_GPU

JTAG_TESTEN_GPU
JTAG_TRSTB_GPU

RV503 0_0402_5%@

RV504 0_0402_5%@

3

18P_0402_50V8J

RV506
0_0402_5%

DIS@

JTAG_TDI_GPU
JTAG_TDO_GPU
JTAG_TMS_GPU
JTAG_TCK_GPU

JTAG_TRSTB_GPU

JTAG_TESTEN_GPU

12

12

1

DIS@

CV450

2

12

+3VSDGPU

@

18
27
36
45

RPV34

10K_0804_8P4R_5%

RV369 10K_0201_5%DIS@
RV1630 10K_0201_5%@

XTALOUT _R

XTALIN_R

27MHZ_10PF_XRCGB27M000F2P18R0

3

XTALOUT _R

XTALIN_1 00M

12
12

RV470 5.1K_0201_1%@
RV471 1K_0201_5%DIS@

YV1

3

12
12

RV20

DIS@

1M_0402_5%

DIS@

SJ10000UI00

1

1

NC

NC

2

4

DIS@

UV4

3

XOUT

4

SSCLK1/REFCLK/FSEL/SSONb/OE

SI51214-A1FAGMR_TDFN6_1P2X1P4

SA0000A4K00

S IC SI51214-A1FAGMR TDFN 6P CLK GEN

+3VSDGPU

+3VSDGPU

ESR:40ohm (Max)

1

DIS@

CV451
18P_0402_50V8J

2

XIN/CLKIN

SSCLK2/OE/SSONb/PD

VDD

VSS

SI_SS_SEL

2

1

5

6

2

XTALIN_R

SI_SS_SEL

+1.8VSDGPU

1 2

RV154 5.1K_0402_1%

DIS@

1 2

RV505 5.1K_0402_1%

@

0.1U_0201_10V6K

1

2

@

LV7

BLM15BD121SN1D_0402

1 2

10U_0603_6.3V6M

CV2723

CV449

1

DIS@

2

1

+1.8VSDGPU

DIS@

RV464 V4G_S@

B B

UV1K

@

symbol11

DBGDATA_0
DBGDATA_1
DBGDATA_2
DBGDATA_3
DBGDATA_4
DBGDATA_5
DBGDATA_6
DBGDATA_7
DBGDATA_8

DBGDATA_9
DBGDATA_10
DBGDATA_11
DBGDATA_12
DBGDATA_13
DBGDATA_14
DBGDATA_15

REV 0. 91

2160896088A1R16M_FCBGA769P-NH

A A

5

DBGDATA_0

L40

DBGDATA_1

L41

DBGDATA_2

M40

DBGDATA_3

M41

DBGDATA_4

N40

DBGDATA_5

N41

DBGDATA_6

P40

DBGDATA_7

P41

DBGDATA_8
DBGDATA_9
DBGDATA_10
DBGDATA_11
DBGDATA_12
DBGDATA_13
DBGDATA_14
DBGDATA_15

1

@

T221

1

@

T222

1

@

T223

1

@

T224

1

@

T225

1

@

T226

1

@

T227

1

@

T228

4

R40
R41
T40
T41
U40
U41
V40
V41

+1.8VSDGPU

12

DIS@

RV456

5.1K_0201_1%

12

@

RV455

5.1K_0201_1%

RV453

5.1K_0201_1%

RV454

5.1K_0201_1%

S RES 1/20W 5.1K +-1% 0201

AUD_PORT_CONN[2:0]

111: No usable endpoints

12

12

12

12

@

RV459

5.1K_0201_1%

RV460

5.1K_0201_1%

@

RV461

5.1K_0201_1%

12

12

@

@

RV462

5.1K_0201_1%

DIS@

DIS@

RV457

5.1K_0201_1%

12

12

@

@

RV458

5.1K_0201_1%

RV463

5.1K_0201_1%

RV464

5.1K_0201_1%

12

12

@

12

@

12

@

DIS@

RV465

RV442

5.1K_0201_1%

5.1K_0201_1%

DBGDATA_0

AUD_PORT_CONN[0]

DBGDATA_1

AUD_PORT_CONN[1]

DBGDATA_2

AUD_PORT_CONN[2]

DBGDATA_3

BOARD_CONFIG[0]

DBGDATA_4

BOARD_CONFIG[1]

DBGDATA_5

BOARD_CONFIG[2]

DBGDATA_6

SMBUS_ADDR[0]

DBGDATA_7

SMBUS_ADDR[1]

12

12

@

DIS@

RV441

RV466

5.1K_0201_1%

5.1K_0201_1%

Security Classific ation

Security Classific ation

Security Classific ation

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL
AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

110: One usable endpoint
101: Two usable endpoints
100: Three usable endpoints
011: Four usable endpoints
010: Five usable endpoints
001: Six usable endpoints
000: All endpoints are usable

BOARD_CONFIG[2:0]

000:SAM 256Mx32
001:HYN 256Mx32
010:SAM 128Mx32
011:HYX 128Mx32
100:MIC 256Mx32
101:
110:
111:

DBGDATA_[7:6]

00: 0× 40
01: 0× 41
10: 0× 42
11: 0× 43

Compal Secret Data

Compal Secret Data

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

SD000008900

RV464 V4G_H@

S RES 1/20W 5.1K +-1% 0201

SD000008900

RV464 V2G_S@

S RES 1/20W 5.1K +-1% 0201

SD000008900

RV464 V2G_H@

S RES 1/20W 5.1K +-1% 0201

SD000008900

RV463 V4G_M@

S RES 1/20W 5.1K +-1% 0201

SD000008900

2

RV462 V4G_S@

S RES 1/20W 5.1K +-1% 0201

SD000008900

RV462 V4G_H@

S RES 1/20W 5.1K +-1% 0201

SD000008900

RV461 V2G_S@

S RES 1/20W 5.1K +-1% 0201

SD000008900

RV461 V2G_H@

S RES 1/20W 5.1K +-1% 0201

SD000008900

RV462 V4G_M@

S RES 1/20W 5.1K +-1% 0201

SD000008900

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

RV460 V4G_S@

S RES 1/20W 5.1K +-1% 0201

SD000008900

RV459 V4G_H@

S RES 1/20W 5.1K +-1% 0201

SD000008900

RV460 V2G_S@

S RES 1/20W 5.1K +-1% 0201

SD000008900

RV459 V2G_H@

S RES 1/20W 5.1K +-1% 0201

SD000008900

RV460 V4G_M@

S RES 1/20W 5.1K +-1% 0201

SD000008900

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

R17M-P1-50/70_(3/9)_MSIC-2

R17M-P1-50/70_(3/9)_MSIC-2

R17M-P1-50/70_(3/9)_MSIC-2

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

1

17 50Tuesday, May 02, 2017

17 50Tuesday, May 02, 2017

17 50Tuesday, May 02, 2017

1.A

1.A

1.A

5

4

3

2

1

UV1C

MA0_D[0..31]<19> MA1_D[0..31] <19>

D D

MA0_A[0..8]<19> MA1_A[0..8] <19>

C C

MA0_WCK01<19>

MA0_WCK01#<19>

MA0_WCK23<19>

MA0_WCK23#<19>

MA0_EDC0<19> MA1_EDC0 <19>
MA0_EDC1<19>
MA0_EDC2<19>
MA0_EDC3<19>

MA0_DBI#0<19> MA1_DBI#0 <19>
MA0_DBI#1<19>
MA0_DBI#2<19>
MA0_DBI#3<19>

MA0_ADBI<19> MA1_ADBI <19>

MA0_CS#<19> MA1_CS# <19>

MA0_D0
MA0_D1
MA0_D2
MA0_D3
MA0_D4
MA0_D5
MA0_D6
MA0_D7
MA0_D8
MA0_D9
MA0_D10
MA0_D11
MA0_D12
MA0_D13
MA0_D14
MA0_D15
MA0_D16
MA0_D17
MA0_D18
MA0_D19
MA0_D20
MA0_D21
MA0_D22
MA0_D23
MA0_D24
MA0_D25
MA0_D26
MA0_D27
MA0_D28
MA0_D29
MA0_D30
MA0_D31

MA0_A0 MA1_A0
MA0_A1
MA0_A2
MA0_A3
MA0_A4
MA0_A5
MA0_A6
MA0_A7
MA0_A8

MA0_WCK01
MA0_WCK01# MA1_WCK01#

MA0_WCK23
MA0_WCK23#

MA0_EDC0
MA0_EDC1
MA0_EDC2
MA0_EDC3

MA0_DBI#0 MA1_DBI#0
MA0_DBI#1
MA0_DBI#2
MA0_DBI#3

MA0_ADBI MA1_ADBI

MA0_CS# MA1_CS#

L34
L37
L38

J35
G37
E38
E35
D35
H41
H40
G41
G40
E40
D41
D40
C41
C40
B39
A39
B38
B36
A36
B35
A35
B33
B32
A32
B31
A30
B29
B28
A28

G25
H25
E27
D27
D29
H27
H23
E23
D25
H29

D33
E33

A34
B34

G38
F41
B37
A31

J38
F40
A38
B30

H21

H31

@

DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31

MAA0_0
MAA0_1
MAA0_2
MAA0_3
MAA0_4
MAA0_5
MAA0_6
MAA0_7
MAA0_8
MAA0_9

WCKA0_0
WCKA0B_0

WCKA0_1
WCKA0B_1

EDCA0_0
EDCA0_1
EDCA0_2
EDCA0_3

DDBIA0_0
DDBIA0_1
DDBIA0_2
DDBIA0_3

ADBIA0

CSA0B_0

symbol3

DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8

DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31

MAA1_0

MAA1_1

MAA1_2

MAA1_3

MAA1_4

MAA1_5

MAA1_6

MAA1_7

MAA1_8

MAA1_9

WCKA1_0

WCKA1B_0

WCKA1_1

WCKA1B_1

EDCA1_0
EDCA1_1
EDCA1_2
EDCA1_3

DDBIA1_0
DDBIA1_1
DDBIA1_2
DDBIA1_3

ADBIA1

CSA1B_0

B27
A27
B26
A26
A24
B23
A23
B22
B20
A20
B19
A19
B17
A16
B16
A15
B15
A14
B14
B13
A11
B11
A10
B10
B8
A7
B7
A6
A4
B4
A3
B3

E15
H15
G13
D13
H11
H13
H17
G17
D15
E11

A22
B21

A8
B9

B24
A18
B12
B6

B25
B18
A12
B5

MA1_D0
MA1_D1
MA1_D2
MA1_D3
MA1_D4
MA1_D5
MA1_D6
MA1_D7
MA1_D8
MA1_D9
MA1_D10
MA1_D11
MA1_D12
MA1_D13
MA1_D14
MA1_D15
MA1_D16
MA1_D17
MA1_D18
MA1_D19
MA1_D20
MA1_D21
MA1_D22
MA1_D23
MA1_D24
MA1_D25
MA1_D26
MA1_D27
MA1_D28
MA1_D29
MA1_D30
MA1_D31

MA1_A1
MA1_A2
MA1_A3
MA1_A4
MA1_A5
MA1_A6
MA1_A7
MA1_A8

MA1_WCK01

MA1_WCK23
MA1_WCK23#

MA1_EDC0
MA1_EDC1
MA1_EDC2
MA1_EDC3

MA1_DBI#1
MA1_DBI#2
MA1_DBI#3

MA1_WCK01 <19>
MA1_WCK01# <19>

MA1_WCK23 <19>
MA1_WCK23# <19>

MA1_EDC1 <19>
MA1_EDC2 <19>
MA1_EDC3 <19>

MA1_DBI#1 <19>
MA1_DBI#2 <19>
MA1_DBI#3 <19>

H19

E7

MB0_D[0..31]<20>

MB0_A[0..8]<20>

MB0_WCK01<20>

MB0_WCK01#<20>

MB0_WCK23<20>

MB0_WCK23#<20>

MB0_EDC0<20>
MB0_EDC1<20>
MB0_EDC2<20>
MB0_EDC3<20>

MB0_DBI#0<20>
MB0_DBI#1<20>
MB0_DBI#2<20>
MB0_DBI#3<20>

MB0_ADBI<20>

MB0_CS#<20>

MB0_D0
MB0_D1
MB0_D2
MB0_D3
MB0_D4
MB0_D5
MB0_D6
MB0_D7
MB0_D8
MB0_D9
MB0_D10
MB0_D11
MB0_D12
MB0_D13
MB0_D14
MB0_D15
MB0_D16
MB0_D17
MB0_D18
MB0_D19
MB0_D20
MB0_D21
MB0_D22
MB0_D23
MB0_D24
MB0_D25
MB0_D26
MB0_D27
MB0_D28
MB0_D29
MB0_D30
MB0_D31

MB0_A0
MB0_A1
MB0_A2
MB0_A3
MB0_A4
MB0_A5
MB0_A6
MB0_A7
MB0_A8

MB0_WCK01
MB0_WCK01#

MB0_WCK23
MB0_WCK23#

MB0_EDC0
MB0_EDC1
MB0_EDC2
MB0_EDC3

MB0_DBI#0
MB0_DBI#1
MB0_DBI#2
MB0_DBI#3

MB0_ADBI

MB0_CS#

UV1D

@

C2

DQB0_0

C1

DQB0_1

D2

DQB0_2

D1

DQB0_3

F1

DQB0_4

G2

DQB0_5

G1

DQB0_6

H2

DQB0_7

K2

DQB0_8

K1

DQB0_9

L2

DQB0_10

L1

DQB0_11

N2

DQB0_12

P2

DQB0_13

P1

DQB0_14

R2

DQB0_15

R1

DQB0_16

T2

DQB0_17

T1

DQB0_18

U2

DQB0_19

W1

DQB0_20

W2

DQB0_21

Y1

DQB0_22

Y2

DQB0_23

AB2

DQB0_24

AC1

DQB0_25

AC2

DQB0_26

AD1

DQB0_27

AF1

DQB0_28

AF2

DQB0_29

AG1

DQB0_30

AG2

DQB0_31

R5

MAB0_0

R8

MAB0_1

N7

MAB0_2

N4

MAB0_3

L8

MAB0_4

N8

MAB0_5

U8

MAB0_6

U7

MAB0_7

R4

MAB0_8

L5

MAB0_9

H1

WCKB0_0

J2

WCKB0B_0

AB1

WCKB0_1

AA2

WCKB0B_1

F2

EDCB0_0

M2

EDCB0_1

V1

EDCB0_2

AD2

EDCB0_3

E2

DDBIB0_0

M1

DDBIB0_1

V2

DDBIB0_2

AE2

DDBIB0_3

ADBIB0W8ADBIB1

CSB0B_0G5CSB1B_0

symbol4

DQB1_0
DQB1_1
DQB1_2
DQB1_3
DQB1_4
DQB1_5
DQB1_6
DQB1_7
DQB1_8

DQB1_9
DQB1_10
DQB1_11
DQB1_12
DQB1_13
DQB1_14
DQB1_15
DQB1_16
DQB1_17
DQB1_18
DQB1_19
DQB1_20
DQB1_21
DQB1_22
DQB1_23
DQB1_24
DQB1_25
DQB1_26
DQB1_27
DQB1_28
DQB1_29
DQB1_30
DQB1_31

MAB1_0

MAB1_1

MAB1_2

MAB1_3

MAB1_4

MAB1_5

MAB1_6

MAB1_7

MAB1_8

MAB1_9

WCKB1_0

WCKB1B_0

WCKB1_1

WCKB1B_1

EDCB1_0
EDCB1_1
EDCB1_2
EDCB1_3

DDBIB1_0
DDBIB1_1
DDBIB1_2
DDBIB1_3

AH1
AH2
AJ2
AK1
AL2
AM1
AM2
AN2
AR1
AR2
AT1
AT2
AV2
AW1
AW2
AY3
BA3
AY4
BA4
AY5
BA7
AY7
AY8
BA8
AR4
AR5
AU4
AU7
AN8
AV11
AU11
AP11

AE7
AE8
AG5
AG4
AJ4
AG8
AC8
AC5
AE4
AJ8

AP1
AP2

AN4
AN5

AL1
AU2
BA6
AV7

AK2
AV1
AY6
AV9

AA8

AL8

MB1_D0
MB1_D1
MB1_D2
MB1_D3
MB1_D4
MB1_D5
MB1_D6
MB1_D7
MB1_D8
MB1_D9
MB1_D10
MB1_D11
MB1_D12
MB1_D13
MB1_D14
MB1_D15
MB1_D16
MB1_D17
MB1_D18
MB1_D19
MB1_D20
MB1_D21
MB1_D22
MB1_D23
MB1_D24
MB1_D25
MB1_D26
MB1_D27
MB1_D28
MB1_D29
MB1_D30
MB1_D31

MB1_A0
MB1_A1
MB1_A2
MB1_A3
MB1_A4
MB1_A5
MB1_A6
MB1_A7
MB1_A8

MB1_WCK01
MB1_WCK01#

MB1_WCK23
MB1_WCK23#

MB1_EDC0
MB1_EDC1
MB1_EDC2
MB1_EDC3

MB1_DBI#0
MB1_DBI#1
MB1_DBI#2
MB1_DBI#3

MB1_ADBI

MB1_CS#

MB1_D[0..31] <20>

MB1_A[0..8] <20>

MB1_WCK01 <20>
MB1_WCK01# <20>

MB1_WCK23 <20>
MB1_WCK23# <20>

MB1_EDC0 <20>
MB1_EDC1 <20>
MB1_EDC2 <20>
MB1_EDC3 <20>

MB1_DBI#0 <20>
MB1_DBI#1 <20>
MB1_DBI#2 <20>
MB1_DBI#3 <20>

MB1_ADBI <20>

MB1_CS# <2 0>

MA0_CAS#<19> MA1_CAS# <19>

B B

MA_VRAMRST#<19>

A A

MA0_RAS#<19> MA1_RAS# <19>

MA0_WE#<19> MA1_WE# <19>

MA0_CKE<19> MA1_CKE <19>

MA0_CLK<19>

MA0_CLK#<19> MA1_CLK# <19>

1 2

Place close to GPU (within 25mm)
and place componment within (5mm) close to eac h other

5

MA0_CAS# MA1_CAS#
MA0_RAS# MA1_RAS#
MA0_WE# MA1_W E#

MA0_CKE MA1_CKE

MA0_CLK
MA0_CLK# MA1_CLK#

1 2

RV39 120_0402_1%

DIS@

MA_VRAMRST#_G

RV36

49.9_0402_1%

DIS@

120P_0402_50V8J

DIS@

CV96

RV37
10_0402_1%

1

2

DIS@

12

DIS@

RV38

5.1K_0402_1%

D23

CASA0B

D21

RASA0B

G29

WEA0B

G21

CKEA0

E31

CLKA0

D31

CLKA0B

K15

MEM_CALRA

L32

DRAM_RSTA

2160896088A1R16M_FCBGA769P-NH

12

CASA1B
RASA1B

CLKA1B

MVREFDA

REV 0. 91

MA_VRAMRST#_G

1

@

CV97

68P_0402_50V8J

2

WEA1B

CKEA1

CLKA1

D17
D19
D11

E19

D7
D9

K17

4

MA_VREFD

MA1_CLK

MA_VREFD

40.2_0402_1%

100_0402_1%

+1.35VSDGPU

DIS@

RV32

DIS@

RV35

MA1_CLK <1 9>

12

12

DIS@

1

CV486
1U_0402_6.3V6K

2

MB_VRAMRST#<20>

Security Classific ation

Security Classific ation

Security Classific ation

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL
AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MB0_CAS#<20>
MB0_RAS#<20>

MB0_WE#<20>

MB0_CKE<20>

MB0_CLK<20>

MB0_CLK#<20>

Place close to GPU (within 25mm)
and place componment within (5mm) close to eac h other

MB0_CAS#
MB0_RAS#
MB0_WE#

MB0_CKE

MB0_CLK
MB0_CLK#

1 2

RV1633 120_0402_1%

DIS@

MB_VRAMRST#_G

RV1641

49.9_0402_1%

1 2

DIS@

120P_0402_50V8J

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

DIS@

CV2720

RV1642
10_0402_1%

DIS@

1

5.1K_0402_1%

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

12

CASB0BU4CASB1B
RASB0BW4RASB1B
WEB0BL4WEB1B

W5

CKEB0

G4

CLKB0

J4

CLKB0B

R10

MEM_CALRB

AM11

DRAM_RSTB

2160896088A1R16M_FCBGA769P-NH

12

DIS@

RV1643

Deciphered Date

Deciphered Date

Deciphered Date

2

MVREFDB

MB_VRAMRST#_G

1

@

CV2719

68P_0402_50V8J

2

CKEB1

CLKB1

CLKB1B

REV 0. 91

AC4
AA4
AJ7

AA7

AL5
AL4

U10

MB1_CAS#
MB1_RAS#
MB1_WE#

MB1_CKE

MB1_CLK
MB1_CLK#

MB_VREFD

40.2_0402_1%

MB_VREFD

100_0402_1%

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

MB1_CAS# <20 >
MB1_RAS# <20 >
MB1_WE# <20>

MB1_CKE <20>

MB1_CLK <2 0>
MB1_CLK# < 20>

+1.35VSDGPU

12

DIS@

RV1635

12

DIS@

RV1634

DIS@

1

CV487
1U_0402_6.3V6K

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

R17M-P1-50/70_(4/9)_MEM

R17M-P1-50/70_(4/9)_MEM

R17M-P1-50/70_(4/9)_MEM

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

1

1.A

1.A

18 50Tuesday, May 02, 2017

18 50Tuesday, May 02, 2017

18 50Tuesday, May 02, 2017

1.A

5

MA0_CLK

MA0_CLK#

MA0_D[0..31]

MA0_A[0..8]

MA1_D[0..31]

MA1_A[0..8]

MA0_EDC0<18>
MA0_EDC1<18>
MA0_EDC2<18>
MA0_EDC3<18>

MA0_DBI#0<18>
MA0_DBI#1<18>
MA0_DBI#2<18>
MA0_DBI#3<18>

MA0_CLK<18>
MA0_CLK#<18>
MA0_CKE<18>

MA0_ADBI<18>
MA0_RAS#<18>
MA0_CS#<18>
MA0_CAS#<18>
MA0_WE#<18>

MA0_WCK01#<18>
MA0_WCK01<18>

MA0_WCK23#<18>

VREFD1_A0 VREFD1_A0

VREFD2_A0

VREFC_A0

MA0_WCK23<18>

MA_VRAMRST#<18>

UV1001

MA0_EDC0
MA0_EDC1
MA0_EDC2
MA0_EDC3

MA0_DBI#0
MA0_DBI#1
MA0_DBI#2
MA0_DBI#3

MA0_CLK
MA0_CLK#
MA0_CKE

MA0_A2
MA0_A5
MA0_A4
MA0_A3

MA0_A7
MA0_A1
MA0_A0
MA0_A6
MA0_A8

RV134 1K_0402_1%DIS@
RV474 1K_0402_1%DIS@

1 2

RV123 120_0402_1%

DIS@

MA0_ADBI MA1_ADBI
MA0_RAS#
MA0_CS#
MA0_CAS#
MA0_WE#

MA0_WCK01#
MA0_WCK01

MA0_WCK23#
MA0_WCK23

VREFD2_A0
VREFC_A0

MA_VRAMRST#

+1.35VSDGPU

C2
C13
R13

R2

D2
D13
P13

P2

J12
J11

J3

H11
K10
K11
H10

K4

H5

H4

K5

J5

A5

U5

12

J1

J10

12

J13

J4

G3

G12

L3

L12

D5

D4

P5

P4

A10
U10
J14

J2

H1

K1

B5

G5

L5

T5
B10
D10

G10

L10
P10
T10
H14
K14

G1

L1

G4

L4

C5

R5
C10
R10
D11

G11

L11
P11

G14

L14

MA0_D[0..31]<18>

MA0_A[0..8]<18>

MA1_D[0..31]<18>

MA1_A[0..8]<18>

D D

RV79

60.4_0402_1%

1 2

DIS@

RV80

60.4_0402_1%

1 2

DIS@

Can NC For GDDR5 Spec. Can NC For GDDR5 Spec.

C C

+1.35VSDGPU

1 2

RV52 2.37K_0402_1%DIS@

1 2

RV53 5.49K_0402_1%DIS@

DIS@

1 2

CV394 1U_0402_6.3V6K

+1.35VSDGPU

1 2

RV478 2.37K_0402_1%DIS@

1 2

RV479 5.49K_0402_1%DIS@

DIS@

1 2

CV403 1U_0402_6.3V6K

+1.35VSDGPU

1 2

RV480 2.37K_0402_1%DIS@

1 2

RV481 5.49K_0402_1%DIS@

DIS@

1 2

CV404 1U_0402_6.3V6K

B B

4

A0 Channel

MF=0

@

MF=0 MF=1 MF=0MF=1

EDC0 EDC3
EDC1 EDC2
EDC2 EDC1
EDC3 EDC0

DBI0# DBI3#
DBI1# DBI2#
DBI2# DBI1#
DBI3# DBI0#

CK
CK#
CKE#

BA0/A2 BA2/A4
BA1/A5 BA3/A3
BA2/A4 BA0/A2
BA3/A3 BA1/A5

A8/A7 A10/A0
A9/A1 A11/A6
A10/A0 A8/A7
A11/A6 A9/A1
A12/RFU/NC

VPP/NC
VPP/NC

MF
SEN
ZQ

ABI#
RAS# CAS#
CS# WE#
CAS# RAS#
WE# CS#

WCK01# WCK23#
WCK01 WCK23

WCK23# WCK01#
WCK23 WCK01

VREFD
VREFD
VREFC

RESET#

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

170-BALL

SGRAM GDDR5

H5GC4H24AJR-R0C_BGA170

DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

3

2

1

A1 Channel

UV1002

+1.35VSDGPU

MA0_D6
MA0_D7
MA0_D5
MA0_D4
MA0_D2
MA0_D0
MA0_D1
MA0_D3
MA0_D10
MA0_D9
MA0_D11
MA0_D8
MA0_D15
MA0_D12
MA0_D14
MA0_D13
MA0_D23
MA0_D21
MA0_D22
MA0_D20
MA0_D19
MA0_D18
MA0_D16
MA0_D17
MA0_D24
MA0_D26
MA0_D25
MA0_D27
MA0_D28
MA0_D29
MA0_D31
MA0_D30

Byte 0

Byte 1

Byte 2

Byte 3

+1.35VSDGPU+1.35VSDGPU

RV1637

60.4_0402_1%

1 2

DIS@

RV1636

60.4_0402_1%

1 2

DIS@

+1.35VSDGPU

1 2

RV486 2.37K_0402_1%DIS@

1 2

RV487 5.49K_0402_1%DIS@

DIS@

1 2

CV407 1U_0402_6.3V6K

+1.35VSDGPU

1 2

RV482 2.37K_0402_1%DIS@

1 2

RV483 5.49K_0402_1%DIS@

DIS@

1 2

CV405 1U_0402_6.3V6K

+1.35VSDGPU

1 2

RV484 2.37K_0402_1%DIS@

1 2

RV485 5.49K_0402_1%DIS@

DIS@

1 2

CV406 1U_0402_6.3V6K

MA1_CLK

MA1_CLK#

VREFD1_A1

VREFD2_A1

VREFC_A1

+1.35VSDGPU

MA1_WCK01#<18>
MA1_WCK01<18>

MA1_WCK23#<18>
MA1_WCK23<18>

MA1_EDC0<18>
MA1_EDC1<18>
MA1_EDC3<18>
MA1_EDC2<18>

MA1_DBI#0<18>
MA1_DBI#1<18>
MA1_DBI#3<18>
MA1_DBI#2<18>

MA1_CLK<18>
MA1_CLK#<18>
MA1_CKE<18>

RV131 1K_0402_1%DIS@
RV475 1K_0402_1%DIS@
RV132 120_0402_1%

MA1_ADBI<18>
MA1_CAS#<18>
MA1_WE#<18>
MA1_RAS#<18>
MA1_CS#<18>

MA1_EDC0
MA1_EDC1
MA1_EDC3
MA1_EDC2

MA1_DBI#0
MA1_DBI#1
MA1_DBI#3
MA1_DBI#2

MA1_CLK
MA1_CLK#
MA1_CKE

MA1_A4
MA1_A3
MA1_A2
MA1_A5

MA1_A0
MA1_A6
MA1_A7
MA1_A1
MA1_A8

1 2

DIS@

MA1_CAS#
MA1_WE#
MA1_RAS#
MA1_CS#

MA1_WCK01#
MA1_WCK01

MA1_WCK23#
MA1_WCK23

VREFD1_A1
VREFD2_A1
VREFC_A1

MA_VRAMRST#

+1.35VSDGPU

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

H11

BA0/A2 BA2/A4

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

K4

A8/A7 A10/A0

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

K5

A11/A6 A9/A1

J5

A12/RFU/NC

A5

VPP/NC

U5

VPP/NC

J1

12
12

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

170-BALL

SGRAM GDDR5

A4
A2
B4
B2
E4
E2
F4
F2
A11
A13
B11
B13
E11
E13
F11
F13
U11
U13
T11
T13
N11
N13
M11
M13
U4
U2
T4
T2
N4
N2
M4
M2

B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14

A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14

MF=1

@

MF=0 MF=1 MF=0MF=1

DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

H5GC4H24AJR-R0C_BGA170

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

+1.35VSDGPU

MA1_D7
MA1_D5
MA1_D6
MA1_D4
MA1_D3
MA1_D2
MA1_D0
MA1_D1
MA1_D8
MA1_D10
MA1_D9
MA1_D11
MA1_D12
MA1_D13
MA1_D15
MA1_D14
MA1_D31
MA1_D30
MA1_D28
MA1_D29
MA1_D25
MA1_D26
MA1_D24
MA1_D27
MA1_D16
MA1_D17
MA1_D19
MA1_D18
MA1_D21
MA1_D22
MA1_D20
MA1_D23

Byte 0

Byte 1

Byte 3

Byte 2

A4
A2
B4
B2
E4
E2
F4
F2
A11
A13
B11
B13
E11
E13
F11
F13
U11
U13
T11
T13
N11
N13
M11
M13
U4
U2
T4
T2
N4
N2
M4
M2

B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14

A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14

Decoupling Caps for single-sided
1x 10uF /per DRAM
8x 1uF /per DRAM

1

CV2421U_0402_6.3V6K

2

DIS@

8x 0.1uF /per DRAM

1

1

CV2431U_0402_6.3V6K

CV2471U_0402_6.3V6K

2

2

DIS@

DIS@

1

1

CV2481U_0402_6.3V6K

CV3921U_0402_6.3V6K

2

2

DIS@

DIS@

5

+1.35VSDGPU +1.35VSDGPU+1.35VSDGPU

1

CV23810U_0603_6.3V6M

A A

2

DIS@

1

1

CV3971U_0402_6.3V6K

CV3961U_0402_6.3V6K

2

2

DIS@

Decoupling Caps for Clamshell
1x 10uF /per Clamshell DRAM
8x 1uF /per Clamshell DRAM

1

CV3981U_0402_6.3V6K

2

DIS@

DIS@

1

1

1

CV4140.1U_0201_10V6K

CV4150.1U_0201_10V6K

2

2

DIS@

1

1

CV4170.1U_0201_10V6K

CV4180.1U_0201_10V6K

CV4160.1U_0201_10V6K

2

2

2

DIS@

DIS@

DIS@

1

1

1

CV4210.1U_0201_10V6K

CV4190.1U_0201_10V6K

CV4200.1U_0201_10V6K

2

2

2

DIS@

DIS@

DIS@

DIS@

1

1

1

1

1

CV1580.1U_0201_10V6K

CV1550.1U_0201_10V6K

CV1570.1U_0201_10V6K

CV1980.1U_0201_10V6K

CV2100.1U_0201_10V6K

2

2

2

2

2

DIS@

DIS@

DIS@

DIS@

4

1

1

1

CV2110.1U_0201_10V6K

2

DIS@

1

1

CV2300.1U_0201_10V6K

CV2130.1U_0201_10V6K

CV2330.1U_0201_10V6K

CV2350.1U_0201_10V6K

2

2

2

2

DIS@

DIS@

DIS@

DIS@

1

CV46510U_0603_6.3V6M

2

DIS@

1

1

1

CV4611U_0402_6.3V6K

CV4601U_0402_6.3V6K

CV4621U_0402_6.3V6K

2

2

2

DIS@

DIS@

DIS@

3

1

1

1

CV4631U_0402_6.3V6K

2

DIS@

1

1

CV4661U_0402_6.3V6K

CV4681U_0402_6.3V6K

CV4671U_0402_6.3V6K

CV4641U_0402_6.3V6K

2

2

2

2

DIS@

DIS@

DIS@

DIS@

DIS@

1

1

1

CV4530.1U_0201_10V6K

CV4520.1U_0201_10V6K

2

2

DIS@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

1

1

CV4540.1U_0201_10V6K

CV4560.1U_0201_10V6K

CV4550.1U_0201_10V6K

2

2

2

DIS@

DIS@

DIS@

1

1

1

CV4590.1U_0201_10V6K

CV4570.1U_0201_10V6K

CV4580.1U_0201_10V6K

2

2

2

DIS@

DIS@

DIS@

DIS@

Compal Secret Data

Compal Secret Data

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Tit le

Tit le

Tit le

R17M-P1-50/70_(5/9)_CH A

R17M-P1-50/70_(5/9)_CH A

R17M-P1-50/70_(5/9)_CH A

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

Date: Sheet of

Date: Sheet of

Date: Sheet of

C5V08/D5PR8_LA-E903PR1A

1

19 50Tuesd ay, May 0 2, 2 017

19 50Tuesd ay, May 0 2, 2 017

19 50Tuesd ay, May 0 2, 2 017

1.A

1.A

1.A

5

MB0_CLK

MB0_CLK#

MB0_D[0..31]

MB0_A[0..8]

MB1_D[0..31]

MB1_A[0..8]

VREFD1_B0

VREFD2_B0

VREFC_B0

MB0_EDC1<18>
MB0_EDC0<18>
MB0_EDC2<18>
MB0_EDC3<18>

MB0_DBI#1<18>
MB0_DBI#0<18>
MB0_DBI#2<18>
MB0_DBI#3<18>

MB0_CLK<18>
MB0_CLK#<18>
MB0_CKE<18>

MB0_ADBI<18>
MB0_RAS#<18>
MB0_CS#<18>
MB0_CAS#<18>
MB0_WE#<18>

MB0_WCK01#<18>
MB0_WCK01<18>

MB0_WCK23#<18>
MB0_WCK23<18>

MB_VRAMRST#<18>

UV1003

MB0_EDC1
MB0_EDC0
MB0_EDC2
MB0_EDC3

MB0_DBI#1
MB0_DBI#0
MB0_DBI#2
MB0_DBI#3

MB0_CLK
MB0_CLK#
MB0_CKE

MB0_A2
MB0_A5
MB0_A4
MB0_A3

MB0_A7
MB0_A1
MB0_A0
MB0_A6
MB0_A8

RV116 1K_0402_1%DIS@
RV476 1K_0402_1%DIS@

1 2

RV120 120_0402_1%

DIS@

MB0_ADBI
MB0_RAS#
MB0_CS#
MB0_CAS#
MB0_WE#

MB0_WCK01#
MB0_WCK01

MB0_WCK23#
MB0_WCK23

VREFD1_B0 VREFD1_B1
VREFD2_B0
VREFC_B0

MB_VRAMRST#

+1.35VSDGPU

C2
C13
R13

R2

D2
D13
P13

P2

J12
J11

J3

H11
K10
K11
H10

K4

H5

H4

K5

J5

A5

U5

12

J1

J10

12

J13

J4

G3

G12

L3

L12

D5

D4

P5

P4

A10
U10
J14

J2

H1

K1

B5

G5

L5

T5
B10
D10

G10

L10
P10
T10
H14
K14

G1

L1

G4

L4

C5

R5
C10
R10
D11

G11

L11
P11

G14

L14

MB0_D[0..31]<18>

MB0_A[0..8]<18>

MB1_D[0..31]<18>

MB1_A[0..8]<18>

+1.35VSDGPU

D D

RV473

60.4_0402_1%

1 2

DIS@

RV472

60.4_0402_1%

1 2

DIS@

Can NC For GDDR5 Spec.

C C

+1.35VSDGPU

1 2

RV498 2.37K_0402_1%DIS@

1 2

RV499 5.49K_0402_1%DIS@

DIS@

1 2

CV413 1U_0402_6.3V6K

+1.35VSDGPU

1 2

RV494 2.37K_0402_1%DIS@

1 2

RV495 5.49K_0402_1%DIS@

DIS@

1 2

CV411 1U_0402_6.3V6K

+1.35VSDGPU

1 2

RV496 2.37K_0402_1%DIS@

1 2

RV497 5.49K_0402_1%DIS@

DIS@

1 2

CV412 1U_0402_6.3V6K

B B

4

B0 Channel

MF=0 MF=1

@

MF=0 MF=1 MF=0MF=1

EDC0 EDC3
EDC1 EDC2
EDC2 EDC1
EDC3 EDC0

DBI0# DBI3#
DBI1# DBI2#
DBI2# DBI1#
DBI3# DBI0#

CK
CK#
CKE#

BA0/A2 BA2/A4
BA1/A5 BA3/A3
BA2/A4 BA0/A2
BA3/A3 BA1/A5

A8/A7 A10/A0
A9/A1 A11/A6
A10/A0 A8/A7
A11/A6 A9/A1
A12/RFU/NC

VPP/NC
VPP/NC

MF
SEN
ZQ

ABI#
RAS# CAS#
CS# WE#
CAS# RAS#
WE# CS#

WCK01# WCK23#
WCK01 WCK23

WCK23# WCK01#
WCK23 WCK01

VREFD
VREFD
VREFC

RESET#

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

170-BALL

SGRAM GDDR5

H5GC4H24AJR-R0C_BGA170

DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

3

2

1

B1 Channel

UV1004

@

MF=0 MF=1 MF=0MF=1

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

H11

BA0/A2 BA2/A4

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

K4

A8/A7 A10/A0

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

K5

A11/A6 A9/A1

J5

A12/RFU/NC

A5

VPP/NC

U5

VPP/NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

170-BALL

SGRAM GDDR5

DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

H5GC4H24AJR-R0C_BGA170

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

A4
A2
B4
B2
E4
E2
F4
F2
A11
A13
B11
B13
E11
E13
F11
F13
U11
U13
T11
T13
N11
N13
M11
M13
U4
U2
T4
T2
N4
N2
M4
M2

B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14

A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14

+1.35VSDGPU

MB0_D15
MB0_D14
MB0_D12
MB0_D13
MB0_D10
MB0_D9
MB0_D11
MB0_D8
MB0_D0
MB0_D1
MB0_D3
MB0_D2
MB0_D6
MB0_D5
MB0_D7
MB0_D4
MB0_D23
MB0_D21
MB0_D22
MB0_D20
MB0_D19
MB0_D18
MB0_D16
MB0_D17
MB0_D24
MB0_D26
MB0_D25
MB0_D27
MB0_D28
MB0_D29
MB0_D31
MB0_D30

Byte 1

Byte 0

Byte 2

Byte 3

+1.35VSDGPU

RV1638

60.4_0402_1%

1 2

DIS@

RV1639

60.4_0402_1%

1 2

DIS@

Can NC For GDDR5 Spec.

+1.35VSDGPU

1 2

RV492 2.37K_0402_1%DIS@

1 2

RV493 5.49K_0402_1%DIS@

DIS@

1 2

CV410 1U_0402_6.3V6K

+1.35VSDGPU

1 2

RV488 2.37K_0402_1%DIS@

1 2

RV489 5.49K_0402_1%DIS@

DIS@

1 2

CV408 1U_0402_6.3V6K

+1.35VSDGPU

1 2

RV490 2.37K_0402_1%DIS@

1 2

RV491 5.49K_0402_1%DIS@

DIS@

1 2

CV409 1U_0402_6.3V6K

MB1_CLK

MB1_CLK#

VREFD1_B1

VREFD2_B1

VREFC_B1

+1.35VSDGPU

MB1_WCK01#<18>
MB1_WCK01<18>

MB1_WCK23#<18>
MB1_WCK23<18>

MB1_EDC0<18>
MB1_EDC1<18>
MB1_EDC2<18>
MB1_EDC3<18>

MB1_DBI#0<18>
MB1_DBI#1<18>
MB1_DBI#2<18>
MB1_DBI#3<18>

MB1_CLK<18>
MB1_CLK#<18>
MB1_CKE<18>

RV117 1K_0402_1%DIS@
RV477 1K_0402_1%DIS@
RV121 120_0402_1%

MB1_ADBI<18>
MB1_CAS#<18>
MB1_WE#<18>
MB1_RAS#<18>
MB1_CS#<18>

MB1_EDC0
MB1_EDC1
MB1_EDC2
MB1_EDC3

MB1_DBI#0
MB1_DBI#1
MB1_DBI#2
MB1_DBI#3

MB1_CLK
MB1_CLK#
MB1_CKE

MB1_A4
MB1_A3
MB1_A2
MB1_A5

MB1_A0
MB1_A6
MB1_A7
MB1_A1
MB1_A8

1 2

DIS@

MB1_ADBI
MB1_CAS#
MB1_WE#
MB1_RAS#
MB1_CS#

MB1_WCK01#
MB1_WCK01

MB1_WCK23#
MB1_WCK23

VREFD2_B1
VREFC_B1

MB_VRAMRST#

+1.35VSDGPU

12
12

A4
A2
B4
B2
E4
E2
F4
F2
A11
A13
B11
B13
E11
E13
F11
F13
U11
U13
T11
T13
N11
N13
M11
M13
U4
U2
T4
T2
N4
N2
M4
M2

B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14

A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14

+1.35VSDGPU

MB1_D7
MB1_D5
MB1_D6
MB1_D4
MB1_D3
MB1_D2
MB1_D0
MB1_D1
MB1_D8
MB1_D10
MB1_D9
MB1_D11
MB1_D12
MB1_D13
MB1_D15
MB1_D14
MB1_D20
MB1_D22
MB1_D21
MB1_D23
MB1_D16
MB1_D19
MB1_D17
MB1_D18
MB1_D25
MB1_D24
MB1_D26
MB1_D27
MB1_D29
MB1_D31
MB1_D30
MB1_D28

Byte 0

Byte 1

Byte 2

Byte 3

Decoupling Caps for single-sided
1x 10uF /per DRAM
8x 1uF /per DRAM
8x 0.1uF /per DRAM

1

A A

2

2

DIS@

1

1

CV4401U_0402_6.3V6K

CV44510U_0603_6.3V6M

1

1

CV4411U_0402_6.3V6K

2

DIS@

1

CV4421U_0402_6.3V6K

CV4431U_0402_6.3V6K

CV4441U_0402_6.3V6K

2

2

2

DIS@

DIS@

DIS@

DIS@

5

1

1

CV4471U_0402_6.3V6K

CV4461U_0402_6.3V6K

2

2

DIS@

Decoupling Caps for Clamshell
1x 10uF /per Clamshell DRAM
8x 1uF /per Clamshell DRAM

1

CV4481U_0402_6.3V6K

2

DIS@

DIS@

+1.35VSDGPU+1.35VSDGPU +1.35VSDGPU

1

1

1

1

CV4330.1U_0201_10V6K

CV4320.1U_0201_10V6K

CV4340.1U_0201_10V6K

2

2

2

DIS@

DIS@

1

1

1

1

CV4350.1U_0201_10V6K

CV4370.1U_0201_10V6K

CV4390.1U_0201_10V6K

CV4380.1U_0201_10V6K

CV4360.1U_0201_10V6K

2

2

2

2

2

DIS@

DIS@

DIS@

DIS@

DIS@

DIS@

1

1

CV4220.1U_0201_10V6K

2

1

1

CV4230.1U_0201_10V6K

2

DIS@

4

1

CV4250.1U_0201_10V6K

CV4240.1U_0201_10V6K

CV4260.1U_0201_10V6K

2

2

2

DIS@

DIS@

DIS@

1

1

1

CV4270.1U_0201_10V6K

2

DIS@

1

1

CV4290.1U_0201_10V6K

CV4280.1U_0201_10V6K

CV4300.1U_0201_10V6K

CV4310.1U_0201_10V6K

2

2

2

2

DIS@

DIS@

DIS@

DIS@

1

CV48110U_0603_6.3V6M

2

DIS@

DIS@

1

1

1

CV4851U_0402_6.3V6K

CV4801U_0402_6.3V6K

CV4821U_0402_6.3V6K

2

2

2

DIS@

DIS@

3

1

1

1

1

CV4771U_0402_6.3V6K

CV4831U_0402_6.3V6K

2

2

DIS@

DIS@

1

CV4841U_0402_6.3V6K

CV4791U_0402_6.3V6K

CV4781U_0402_6.3V6K

2

2

2

DIS@

DIS@

DIS@

1

1

1

CV4690.1U_0201_10V6K

2

DIS@

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

CV4700.1U_0201_10V6K

2

DIS@

Issued Date

Issued Date

Issued Date

1

CV4710.1U_0201_10V6K

CV4720.1U_0201_10V6K

2

2

DIS@

DIS@

1

1

1

CV4730.1U_0201_10V6K

2

DIS@

1

CV4750.1U_0201_10V6K

CV4740.1U_0201_10V6K

CV4760.1U_0201_10V6K

2

2

2

DIS@

DIS@

DIS@

DIS@

Compal Secret Data

Compal Secret Data

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Tit le

Tit le

Tit le

R17M-P1-50/70_(6/9)_CH B

R17M-P1-50/70_(6/9)_CH B

R17M-P1-50/70_(6/9)_CH B

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

Date: Sheet of

Date: Sheet of

Date: Sheet of

C5V08/D5PR8_LA-E903PR1A

1

20 50Tuesd ay, May 0 2, 2 017

20 50Tuesd ay, May 0 2, 2 017

20 50Tuesd ay, May 0 2, 2 017

1.A

1.A

1.A

5

4

3

2

1

UV1G

@

D D

C C

UV1O

@

symbol15

TX2P_DPE0P

TX2M_DPE0N

TX1P_DPE1P

TX1M_DPE1N

TX0P_DPE2P

TX0M_DPE2N

TXCEP_DPE3P

TXCEM_DPE3N

B B

DDCAUX5P

DDCAUX5N

REV 0.91

2160896088A1R16M_FCBGA769P-NH

AY18

BA18

AY16

BA16

AY15

BA15

AY14

BA14

AU27

AV27

DIS@

RV372

150_0402_1%

BA12

1 2

symbol7

TX2P_DPB0P

TX2M_DPB0N

TX1P_DPB1P

TX1M_DPB1N

TX0P_DPB2P

TX0M_DPB2N

TXCBP_DPB3P

TXCBM_DPB3N

DDCAUX3P

DDCAUX3N

TX5P_DPA0P

TX5M_DPA0N

TX4P_DPA1P

TX4M_DPA1N

TX3P_DPA2P

TX3M_DPA2N

TXCAP_DPA3P

TXCAM_DPA3N

AUX_ZVSS

REV 0.91

2160896088A1R16M_FCBGA769P-NH

DDCAUX4P

DDCAUX4N

AY32

BA32

AY31

BA31

AY30

BA30

AY28

BA28

AM21

AP21

AY36

BA36

AY35

BA35

AY34

BA34

AY33

BA33

AR23

AP23

UV1H

@

symbol8

TX2P_DPD0P

TX2M_DPD0N

TX1P_DPD1P

TX1M_DPD1N

TX0P_DPD2P

TX0M_DPD2N

TXCDP_DPD3P

TXCDM_DPD3N

AUX1P

AUX1N

DDC1CLK

DDC1DATA

TX5P_DPC0P

TX5M_DPC0N

TX4P_DPC1P

TX4M_DPC1N

TX3P_DPC2P

TX3M_DPC2N

TXCCP_DPC3P

TXCCM_DPC3N

AUX2P

AUX2N

DDC2CLK

REV 0.91

2160896088A1R16M_FCBGA769P-NH

DDC2DATA

AY22

BA22

AY21

BA21

AY20

BA20

AY19

BA19

AY11

BA11

AY10

BA10

AY27

BA27

AY26

BA26

AY25

BA25

AY24

BA24

AP19

AM19

AV19

AU19

Data Book:need
config even if not
use display function

A A

Security Classification

Security Classification

Security Classification

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2017/04/18 2019/04/18

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

R17M-P1-50/70_(7/9)_DISPLAY

R17M-P1-50/70_(7/9)_DISPLAY

R17M-P1-50/70_(7/9)_DISPLAY

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

21 50Tuesday, May 02, 2017

21 50Tuesday, May 02, 2017

21 50Tuesday, May 02, 2017

1

1.A

1.A

1.A

5

4

3

2

1

+VGA_CORE

CV32622U_0603_6.3V6M

CV32422U_0603_6.3V6M

CV32322U_0603_6.3V6M

CV32522U_0603_6.3V6M

DIS@

DIS@

DIS@

D D

C C

B B

A A

1 2

DIS@

DIS@

1 2

1 2

+1.35VSDGPU

DIS@

1 2

CV34722U_0603_6.3V6M

DIS@

1 2

1 2

1 2

SCL:22u x8, 1u x7

1

CV32722U_0603_6.3V6M

CV32922U_0603_6.3V6M

CV32822U_0603_6.3V6M

DIS@

DIS@

DIS@

1 2

1 2

1

CV34822U_0603_6.3V6M

CV3371U_0402_6.3V6K

DIS@

DIS@

2

5

CV621U_0402_6.3V6K

CV33022U_0603_6.3V6M

DIS@

1 2

2

SCL:22u x2, 1u x10 SCL:1u x3

1

1

1

1

CV3411U_0402_6.3V6K

CV3401U_0402_6.3V6K

CV3391U_0402_6.3V6K

CV3381U_0402_6.3V6K

DIS@

DIS@

DIS@

2

2

2

2

R17M-P1-50/70:45A,25W VDDCI+VDD_08:128b/12A,64b/7.5A

1

1

CV3181U_0402_6.3V6K

CV3171U_0402_6.3V6K

DIS@

DIS@

2

2

1

1

1

1

CV3211U_0402_6.3V6K

CV3191U_0402_6.3V6K

CV3201U_0402_6.3V6K

CV3221U_0402_6.3V6K

DIS@

DIS@

DIS@

DIS@

2

2

2

2

128b/14A,64b/8A 1A

1

CV3441U_0402_6.3V6K

DIS@

DIS@

2

CV316

DIS@

1U_0402_6.3V6K

1 2

1

1

CV3461U_0402_6.3V6K

CV3451U_0402_6.3V6K

DIS@

2

2

+1.8VSDGPU

SCL:No need to implement.

13mA

1

1

CV3421U_0402_6.3V6K

CV3431U_0402_6.3V6K

DIS@

DIS@

2

2

UV1I

@

AG13
AG15
AG21
AG23
AG29
AG31

AG10

AA13
AA15
AA21
AA23
AA29
AA31
AC13
AC15
AC21
AC23
AC29
AC31
AE13
AE15
AE21
AE23
AE29
AE31

AL13
AL15
AL17
AL19
AL21
AL23
AL25
AL27
AL29
AL31

AC10

N13
N15
N21
N23
N29
N31
R13
R15
R21
R23
R29
R31
U13
U15
U21
U23
U29
U31
W13
W15
W21
W23
W29
W31

AJ13
AJ15
AJ17
AJ19
AJ21
AJ23
AJ25
AJ27
AJ29
AJ31

N10
W10

symbol9

VDDC#0
VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC#33
VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58
VDDC#59
VDDC#60
VDDC#61
VDDC#62
VDDC#63
VDDC#64
VDDC#65
VDDC#66
VDDC#67

REV 0 .91

2160896088A1R16M_FCBGA769P-NH

UV1N

@

symbol14

K11

VMEMIO#0

K13

VMEMIO#1

K19

VMEMIO#2

K23

VMEMIO#3

K27

VMEMIO#4

K31

VMEMIO#5

L10

VMEMIO#6
VMEMIO#7
VMEMIO#8
VMEMIO#9
VMEMIO#10

REV 0 .91

2160896088A1R16M_FCBGA769P-NH

UV1J

@

symbol10

AM13

TSVDD

J8

TEMPIN0

J7

TEMPINRETURN

GPIO_28_FDO

N38

TS_A

REV 0 .91

2160896088A1R16M_FCBGA769P-NH

4

FB_VMEMIO

FB_VDDCI

VDD_18#0
VDD_18#1
VDD_18#2

VDD_08#0
VDD_08#1
VDD_08#2
VDD_08#3
VDD_08#4
VDD_08#5

DPLUS

DMINUS

FB_VDDC

VDDCI#0
VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8

FB_VSS

VDD_08

VSS
VSS

N35

N34

U38

L13
L17
L21
L25
L29
N11
U11
AA11
AE11

C3

GPU_VDDCI_SEN

AV13

GPU_VDDC_SE N

AR13

GPU_VSS_SE N_L

AU13

AM15
AP15
AR15

Merge to VDDCI

AC32
AG32
AG35
AJ32
AJ34
AL34

W32

AM23
AM17

DG:Thermal Die Temperature

GPIO_28_FDO

1

CV3341U_0402_6.3V6K

DIS@

2

1

1

CV3521U_0402_6.3V6K

CV3531U_0402_6.3V6K

DIS@

DIS@

2

2

Fan Drive Out option

RV21

@

10K_0201_5%

1 2

SCL:22u x2, 1u x4

1

CV3321U_0402_6.3V6K

CV3331U_0402_6.3V6K

DIS@

DIS@

2

1

CV3541U_0402_6.3V6K

DIS@

DIS@

2

1

2

SCL:1u x7

CV3551U_0402_6.3V6K

1

CV3311U_0402_6.3V6K

DIS@

1 2

DIS@

2

GPU_VDDCI_SEN <48>
GPU_VDDC_SE N <48>
GPU_VSS_SE N_L <48>

1

1

1

CV3571U_0402_6.3V6K

CV3561U_0402_6.3V6K

DIS@

DIS@

2

2

2

CV33622U_0603_6.3V6M

+VDDCI

DIS@

+VDDCI

DIS@

1

CV3581U_0402_6.3V6K

2

UV1L

@

symbol12

A2

VSS#0

A5

VSS#1

A9

VSS#2

CV33522U_0603_6.3V6M

1 2

0.24uH,<0.15moh m
CRB no use, reserve first

1

1

1

CV3501U_0402_6.3V6K

CV3511U_0402_6.3V6K

CV3491U_0402_6.3V6K

DIS@

DIS@

DIS@

2

2

2

3

+1.8VSDGPU

RV1632
0_0805_5%

1 2

DIS@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

A13

VSS#3

A17

VSS#4

A21

VSS#5

A25

VSS#6

A29

VSS#7

A33

VSS#8

A37

VSS#9

A40

VSS#10

B1

VSS#11

B40

VSS#12

B41

VSS#13

C5

VSS#14

C7

VSS#15

C9

VSS#16

C11

VSS#17

C13

VSS#18

C15

VSS#19

C17

VSS#20

C19

VSS#21

C21

VSS#22

C23

VSS#23

C25

VSS#24

C27

VSS#25

C29

VSS#26

C31

VSS#27

C33

VSS#28

C35

VSS#29

C37

VSS#30

C39

VSS#31

E1

VSS#32

E3

VSS#33

E4

VSS#34

E9

VSS#35

E13

VSS#36

E17

VSS#37

E21

VSS#38

E25

VSS#39

E29

VSS#40

E39

VSS#41

E41

VSS#42

G3

VSS#43

G7

VSS#44

G11

VSS#45

G15

VSS#46

G19

VSS#47

G23

VSS#48

G27

VSS#49

G31

VSS#50

G35

VSS#51

G39

VSS#52

J1

VSS#53

J3

VSS#54

J5

VSS#55

J34

VSS#56

J37

VSS#57

REV 0 .91

2160896088A1R16M_FCBGA769P-NH

UV1M

@

symbol13

AA5

VSS#115

AA10

VSS#116

AA17

VSS#117

AA19

VSS#118

AA25

VSS#119

AA27

VSS#120

AA32

VSS#121

AA39

VSS#122

AC3

VSS#123

AC7

VSS#124

AC11

VSS#125

AC17

VSS#126

AC19

VSS#127

AC25

VSS#128

AC27

VSS#129

AC39

VSS#130

AE1

VSS#131

AE3

VSS#132

AE5

VSS#133

AE10

VSS#134

AE17

VSS#135

AE19

VSS#136

AE25

VSS#137

AE27

VSS#138

AE32

VSS#139

AE35

VSS#140

AE39

VSS#141

AG3

VSS#142

AG7

VSS#143

AG11

VSS#144

AG17

VSS#145

AG19

VSS#146

AG25

VSS#147

AG27

VSS#148

AG39

VSS#149

AG40

VSS#150

AG41

VSS#151

AJ1

VSS#152

AJ3

VSS#153

AJ5

VSS#154

AJ10

VSS#155

AJ11

VSS#156

AJ35

VSS#157

AJ39

VSS#158

AL3

VSS#159

AL7

VSS#160

AL10

VSS#161

AL11

VSS#162

AL32

VSS#163

AL35

VSS#164

AL39

VSS#165

AN1

VSS#166

AN3

VSS#167

AN7

VSS#168

AN35

VSS#169

AN39

VSS#170

REV 0 .91

2160896088A1R16M_FCBGA769P-NH

Tit le

Tit le

Tit le

Size

Size

Size

Date: Sheet of

Date: Sheet of

Date: Sheet of

Custom

Custom

Custom

J39

VSS#58

J40

VSS#59

J41

VSS#60

K21

VSS#61

K25

VSS#62

K29

VSS#63

K40

VSS#64

L3

VSS#65

L7

VSS#66

L11

VSS#67

L15

VSS#68

L19

VSS#69

L23

VSS#70

L27

VSS#71

L31

VSS#72

L35

VSS#73

L39

VSS#74

N1

VSS#75

N3

VSS#76

N5

VSS#77

N17

VSS#78

N19

VSS#79

N25

VSS#80

N27

VSS#81

N32

VSS#82

N37

VSS#83

N39

VSS#84

R3

VSS#85

R7

VSS#86

R11

VSS#87

R17

VSS#88

R19

VSS#89

R25

VSS#90

R27

VSS#91

R32

VSS#92

R35

VSS#93

R39

VSS#94

U1

VSS#95

U3

VSS#96

U5

VSS#97

U17

VSS#98

U19

VSS#99

U25

VSS#100

U27

VSS#101

U32

VSS#102

U37

VSS#103

U39

VSS#104

W3

VSS#105

W7

VSS#106

W11

VSS#107

W17

VSS#108

W19

VSS#109

W25

VSS#110

W27

VSS#111

W39

VSS#112

AA1

VSS#113

AA3

VSS#114

AN40

VSS#171

AN41

VSS#172

AP13

VSS#173

AP17

VSS#174

AR3

VSS#175

AR7

VSS#176

AR11

VSS#177

AR19

VSS#178

AR21

VSS#179

AR25

VSS#180

AR27

VSS#181

AR31

VSS#182

AR35

VSS#183

AR39

VSS#184

AU1

VSS#185

AU3

VSS#186

AU9

VSS#187

AU23

VSS#188

AU29

VSS#189

AW3

VSS#190

AW5

VSS#191

AW7

VSS#192

AW9

VSS#193

AW11

VSS#194

AW13

VSS#195

AW15

VSS#196

AW17

VSS#197

AW19

VSS#198

AW21

VSS#199

AW23

VSS#200

AW25

VSS#201

AW27

VSS#202

AW29

VSS#203

AW31

VSS#204

AW33

VSS#205

AW35

VSS#206

AW37

VSS#207

AW39

VSS#208

AY1

VSS#209

AY2

VSS#210

AY9

VSS#211

AY12

VSS#212

AY17

VSS#213

AY23

VSS#214

AY29

VSS#215

AY37

VSS#216

AY40

VSS#217

AY41

VSS#218

BA2

VSS#219

BA5

VSS#220

BA9

VSS#221

BA17

VSS#222

BA23

VSS#223

BA29

VSS#224

BA37

VSS#225

BA40

VSS#226

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

R17M-P1-50/70_(8/9)_PWR/GND

R17M-P1-50/70_(8/9)_PWR/GND

R17M-P1-50/70_(8/9)_PWR/GND

Document Number Rev

Document Number Rev

Document Number Rev

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

1

22 50Tuesd ay, May 0 2, 2 017

22 50Tuesd ay, May 0 2, 2 017

22 50Tuesd ay, May 0 2, 2 017

1.A

1.A

1.A

5

D D

Power U p
Ready within 20ms

VGA_ON

4

3

APU

PCIE_RST_L

AGPIO71

EGPIO93

APU_PC IE_ RS T#

PE_GPIO0

PE_GPIO1

AND
GATE

Delay 2ms

VGA_ON

+3VS

VGA_ON

Delay 3ms

AND
GATE

PWR SW

2

PLT_RST_VGA#

+3VSDGPU

1

+1.8VALW

DL SW

2

PERSTB

+1.8VSDGPU

GPU

1

+3VSDGPU

+1.8VSDGPU

VGA_ON_B

+VGA_CORE

C C

+VDDCI

DGPU_PWROK

Delay 3ms

Delay +3VSDGPU 7ms

VGA_ON

+3VSDGPU

AND

VGA_ON_B

GATE

Delay +3VSDGPU 7ms

DGPU_PWROK

B+

PWM

Driver

B+

LDO

3

3

4

+VGA_CORE

DGPU_PWROK

+VDDCI

+1.35VSDGP U

+1.35VSDGPU

For AMD R17M-P1-50/70 VRAM Only

Memory ID/Vendor/Size

000
SAMSUNG
256M x32

B B

001
HYNIX
256M x32

010
SAMSUNG
128M x32

011
HYNIX
128M x32

100
MICRON
256M x32

A A

Memory PN R3(ABO!) A0

UV1001 V4G_S@

S IC D5 256M32 K4G80325FB-HC03 FBGA ABO!

SA000094R30

UV1001 V4G_H@

S IC D5 256M32 H5GC8H24MJR-T2C BGA ABO!

SA00009ZG20

UV1001 V2G_S@

S IC D5 128M32 K4G41325FE-HC28 FBGA ABO!

SA00009TT30

UV1001 V2G_H@

S IC D5 128M322.5G H5GC4H24AJR-T2C ABO!

SA000085V70

UV1001 V4G_M@

S IC D5 256M32 MT51J256M32HF-60A ABO!

SA000096K30

Memory PN R3(ABO!) A1

UV1002 V4G_S@

S IC D5 256M32 K4G80325FB-HC03 FBGA ABO!

SA000094R30

UV1002 V4G_H@

S IC D5 256M32 H5GC8H24MJR-T2C BGA ABO!

SA00009ZG20

UV1002 V2G_S@

S IC D5 128M32 K4G41325FE-HC28 FBGA ABO!

SA00009TT30

UV1002 V2G_H@

S IC D5 128M322.5G H5GC4H24AJR-T2C ABO!

SA000085V70

UV1002 V4G_M@

S IC D5 256M32 MT51J256M32HF-60A ABO!

SA000096K30

Memory PN R3(ABO!) B0 Memory PN R3(ABO!) B1

UV1003 V4G_S@

S IC D5 256M32 K4G80325FB-HC03 FBGA ABO!

SA000094R30

UV1003 V4G_H@

S IC D5 256M32 H5GC8H24MJR-T2C BGA ABO!

SA00009ZG20

UV1003 V2G_S@

S IC D5 128M32 K4G41325FE-HC28 FBGA ABO!

SA00009TT30

UV1003 V2G_H@

S IC D5 128M322.5G H5GC4H24AJR-T2C ABO!

SA000085V70

UV1003 V4G_M@

S IC D5 256M32 MT51J256M32HF-60A ABO!

SA000096K30

UV1004 V4G_S@

S IC D5 256M32 K4G80325FB-HC03 FBGA ABO!

SA000094R30

UV1004 V4G_H@

S IC D5 256M32 H5GC8H24MJR-T2C BGA ABO!

SA00009ZG20

UV1004 V2G_S@

S IC D5 128M32 K4G41325FE-HC28 FBGA ABO!

SA00009TT30

UV1004 V2G_H@

S IC D5 128M322.5G H5GC4H24AJR-T2C ABO!

SA000085V70

UV1004 V4G_M@

S IC D5 256M32 MT51J256M32HF-60A ABO!

SA000096K30

AMD GPU PN

R17M-P1-50 PN R1(ROH)

UV1 RX540@

S IC 216-0905018 A1 R17M-P1-50 FCBGA 769P 0FA

SA0000ALV10

R17M-P1-70 PN R1(ROH)

UV1 RX550@

S IC 216-0905004 A1 R17M-P1-70 FCBGA 769P 0FA

SA0000ALX10

R17M-G1-70 PN R1(ROH)

UV1 RX560@

S IC 216-0909004 A1 R17M-G1-70 FCBGA 0FA

SA0000APU00

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Tit le

Tit le

Tit le

R17M-P1-50/70_(9/9)_NOTE

R17M-P1-50/70_(9/9)_NOTE

R17M-P1-50/70_(9/9)_NOTE

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

23 50Tuesd ay, May 0 2, 2 017

23 50Tuesd ay, May 0 2, 2 017

23 50Tuesd ay, May 0 2, 2 017

1.A

1.A

1.A

5

+3VLP

JP2

112

JUMP_43X39

D D

1 2

KBRST#<9>

1 2

C1263
22P_0402_50V8J

C819 1000P_0402_50V7K

C C

B B

1 2

@EMC@

R1560

@EMC@

10_0402_1%

1 2

EMC@

1 2

@

R207 100K_0402_5%

1 2

C1279 100P_0402_50V8J

SYS_PWRGD_E C@1.8VAL W
EC can be OD pin
for reduce Level shifter

RS@

R3973
0_0402_5%

LPC_CLK0_EC

EC_RST#

LPC_RST# TP_SENOFF#

@EMC@

GATEA20<9>

SERIRQ<10,33>

LPC_FRAME#<9,10,33>

LPC_AD3<10,33>
LPC_AD2<10,33>
LPC_AD1<10,33>
LPC_AD0<10,33>

LPC_CLK0_EC<9,10>

LPC_RST#<9,33>

EC_RST#<35>
EC_SCI#<9>

WLAN_ON<29>

KSI[0..7]<33>

KSO[0..17]<33>

EC_SMB_CK1<39,40>
EC_SMB_DA1<39,40>
EC_SMB_CK2<8,16>
EC_SMB_DA2<8,16>

SLP_S3#<9>

TP_I2C_INT#<33>

USB_CEN<31>

TP_3V_EN<33>

WL_OFF#<29>

WLAN_WAKE#<29>

CAM_EN<27>

SPOK<41>
FAN_SPEED1<35>
FAN_SPEED2<35>

EC_TX<29>

EC_RX<29>

SYS_PWRGD_EC<9>

PWR_SUSP_LED#<31>

NUM_LED#<33>

PBTN_OUT#<9>

SLP_S5#<9>

+EC_VCC

@

2

C1255

0.1U_0201_10V6K

C1256

0.1U_0201_10V6K

2

1

GATEA20
KBRST#_R

SERIRQ
LPC_FRAME#

LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

LPC_CLK0_EC
LPC_RST#
EC_RST#
EC_SCI#
WLAN_ON

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

SLP_S3#
TP_I2C_INT#
USB_CEN
TP_3V_EN
WL_OFF#
WLAN_WAKE#
CAM_EN

SPOK
FAN_SPEED1

FAN_SPEED2
EC_TX
EC_RX
SYS_PWRGD_EC
PWR_SUSP_LED#
NUM_LED#

PBTN_OUT#
SLP_S5#

C1257

0.1U_0201_10V6K

C1258

0.1U_0201_10V6K

2

2

@

@

1

1

1
2
3
4
5
7
8

10

12
13
37
20
38

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

77
78
79
80

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

122
123

U44

KB9022QD_LQFP128_14X14

4

C1261

1000P_0402_50V7K

C1259

1000P_0402_50V7K

1

2

1

2

1

2

GATEA20/GPIO00
KBRST#/GPIO01
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1

LPC & MISC

LPC_AD0

CLK_PCI_EC
PCIRST#/GPIO05
EC_RST#
EC_SCI#/GPIO0E
CLKRUN#/GPIO1D

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24

Int. K/B

KSO5/GPIO25

Matrix

KSO6/GPIO26
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

EC_SMB_CLK1/GPIO44
EC_SMB_DAT1/GPIO45
EC_SMB_CLK2/GPIO46
EC_SMB_DAT2/GPIO47

PM_SLP_S3#/GPIO04
GPIO07
GPIO08
GPIO0A
GPIO0B
GPIO0C
AC_PRESENT/GPIO0D
PWM2/GPIO11
FAN_SPEED1/GPIO14
FANFB1/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
PCH_PWROK/G PIO18
SUSP_LED#/GPIO19
NUM_LED#/GPIO1A

PBTN_OUT#/ GPIO5D
PM_SLP_S4#/GPIO5E

L44

FBM-11-160808-601-T_0603

1 2

111

9

22

33

96

125

VCC

VCC

VCC

VCC

VCC0

VCC_LPC

PWM Output

VCIN1_BATT_T EMP/AD0/GPIO38

VCIN1_BATT_DRO P/AD1/GPIO39

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

SM Bus

VCIN1_ADP_PROCHOT /GPXIOA05

VCOUT1_PROCHO T#/GPXIOA06

VCOUT0_MAIN_PW R_ON/GPXIOA07

GPIO

GPO

PWR_VCCST _PG/GPXIOA11

GPI

GND

GND

GND

GND

GND

11

24

35

94

113

ECAGND

+EC_VCCA

2

C1262

0.1U_0201_10V6K

1

ECAGND

67

AVCC

EC_VCCST_PG/GPIO0 F

BEEP#/GPIO10

EC_FAN_PWM/GPIO12

AC_OFF/GPIO13

ADP_I/AD2/GPIO3A

AD_BID/AD3/GPIO3B

AD4/GPIO42
AD5/GPIO43

DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

DA2/GPIO3E
DA3/GPIO3F

EC_MUTE#/PSCLK1/GPIO4A

USB_EN#/PSDAT1/GPIO4B

PSCLK2/GPIO4C

PSDAT2/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

ENKBL/GPXIOA00

WOL_EN/GPXIOA01

ME_EN/G PXIOA0 2

VCIN0_PH1/GPXIOD00

MISO/G PIO5B

MOSI/G PIO5C
SPICLK/GPIO58
SPICS#/GPIO5A

EC_CIR_RX/AD6/GPIO40

SYS_PWROK/AD7/ GPIO41

BATT_CHG_LED #/GPIO52

BATT_LOW _LED#/GPIO55

PCH_PWR_EN/G PXIOA10

GPIO50

CAPS_LED#/GPIO53

PWR_LED#/GPIO 54

SYSON/GPIO56
VR_ON/GPIO57

DPWROK_EC/GPIO59

EC_RSMRST#/GPXIOA03

GPXIOA04

BKOFF#/GPXIOA08

GPXIOA09

VCIN1_AC_IN/GPXIOD01

EC_ON/GPXIOD02
ON/OFF#/GPXIOD03
LID_SW#/GPXIOD04

SUSP#/GPXIOD05

GPXIOD06

PECI/GPXIOD07

V18R/VCC_IO2

AGND

69

L43

FBM-11-160808-601-T_0603

20mil

12

LAN_PWR_EN

21

EC_BEEP#

23

FAN_PWM1

26

FAN_PWM2

27

BATT_TEMP

63

VCIN1_BATT_DROP

64

ADP_I

65

AD_BID

66
75

LAN_WAKE#

76

68
70
71

KBL_EN

72

EC_TYPEC_EN

83
84

EC_MUTE#

85

USB_EN

86

TP_CLK

87

TP_DATA

88

USB_CB

97

GPU_ACIN

98

0.95VS_PWR_EN#

99

9022_PH1

109

EC_RTCRST

119

BT_ON

120

TYPEC_3A_1P5A#

126
128

USB_CHARGE_2A

73
74

VGATE
BATT_4S

89

BATT_BLUE_LED#

90

CAPS_LED#

91

PWR_LED#

92

BATT_AMB_LED#

93
95

SYSON
VR_ON

121

0.95_1.8VALW_PWREN

127

EC_RSMRST#

100

USB_SELCDP

101

9022_VCIN

102

EC_THERM

103
104

MAINPWON

105

BKOFF#
LAN_GPO

106

3V_EN_R_EC

107

5V_393_EN

108

110

ACIN
EC_ON

112
114

ON/OFFBTN#
LID_SW#

115
116

SUSP#

117

ENBKL

118

124

3

LAN_PWR_EN <28>
EC_BEEP# <34>
FAN_PWM1 <35>
FAN_PWM2 <35>

BATT_TEMP <39>
VCIN1_BATT_DROP <39>

ADP_I <39,40>

LAN_WAKE# <28>

TP_SENOFF# <33>

KBL_EN <33>

EC_TYPEC_EN <32>

EC_MUTE# <34>
USB_EN <31>
TP_CLK <33>
TP_DATA <33>

USB_CB <31>

GPU_ACIN <16>

0.95VS_PWR_EN# <25>
9022_PH1 <39>

BT_ON <29>

TYPEC_3A_1P5A# <32>

USB_CHARGE_2A <31>
VGATE <44>

BATT_4S <40>
BATT_BLUE_LED# <31>
CAPS_LED# <33>
PWR_LED# <31>
BATT_AMB_LED# <31>

SYSON <42>

VR_ON <44,45>

0.95_1.8VALW_PWREN <43>

EC_RSMRST# <9>
USB_SELCDP <31>

9022_VCIN <39>

MAINPWON <35,39,41>
BKOFF# <27>
LAN_GPO <28>

5V_393_EN <25>

ACIN <40>

EC_ON <41>

ON/OFFBTN# <33>

LID_SW# <33>
SUSP# <25,40,42>
ENBKL <8>

+EC_VCC

PS2

Ra

Rb

+EC_VCC

12

12

R1562
100K_0402_5%

AD_BID

R1564
10K_0402_5%@

2

C1269

0.1U_0201_10V6K

@

1

2

PVT For EA

PVT For VX

R1564

15K_0402_1%

SD034150280

R1564

33K_0402_1%

SD034330280

EC_MUTE#
TP_I2C_INT#

EC_SMB_DA1
EC_SMB_CK1
LID_SW#

BATT_TEMP

ACIN

EC_RSMRST#

SYSON
3V_EN

EC_THERM

MAINPWON

3V_EN_R_EC

SPOK

EA@

VX@

R1565 10K_0402_5%@
R116 1K_0402_5%@

R1577 2.2K_0402_5%
R1574 2.2K_0402_5%
R344 47K_0402_5%

C1265 100P_0402_50V8J

C1266 100P_0402_50V8J

1 2

R3907 47K_0402_5%@

1 2

R1675 100K_0402_5%

1 2

R940 1M_0402_5%

1 2

RS@

R1690

0_0402_5%

1 2

D2012
RB751V-40_SOD323-2

1 2

R3926 1K_0402_5%

1 2

D2013
RB751V-40_SOD323-2

1 2

D2014
RB751V-40_SOD323-2

1 2
1 2

1 2
1 2
1 2

1 2

1 2

@

@

@

EC_RTCRST

EC_RSMRST#

SYS_PWRGD_EC

+RTC_APU_R

13

D

2

G

12

R1563
10K_0402_5%

+3VS

+EC_VCC

APU_PROCHOT# <8,16,44,45>

3V_EN

S

3V_EN <41>

1

Q91
2N7002K_SOT23-3

A A

Security Classification

Security Classification

Security Classification

Issued D ate

Issued D ate

Issued D ate

THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL

THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL

THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR W RITTEN CONSENT OF COM PAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR W RITTEN CONSENT OF COM PAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR W RITTEN CONSENT OF COM PAL ELECTRONICS, INC.

3

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Titl e

Titl e

Titl e

Size

Size

Size

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

EC ENE-KB9022

EC ENE-KB9022

EC ENE-KB9022

Document Number Rev

Document Number Rev

Document Number Rev

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

1

24 50Tuesday, May 02, 2017

24 50Tuesday, May 02, 2017

24 50Tuesday, May 02, 2017

1.A

1.A

1.A

A

B

C

D

E

12

@

1

OUT

2

GND

3

OC

1

C2622

4.7U_0402_6.3V6M

2

U2608B

8

TLC3702IDRG4 SOIC 8P

SA000088800

P

7

O

G

4

61

D

1 2

G

2

S

Q2516B
DMN66D0LDW-7_SOT363-6

34

D

S

R2636
100K_0402_5%

1 2

+5VALW_COM+5VALW

1

C2668

2

22U_0603_6.3V6M

1 2

R3903
1K_0402_5%

1 2

R3902
1K_0402_5%

@

C2733

0.1U_0201_10V6K

1 2

1

1

C2667

2

2

22U_0603_6.3V6M

CORE_NB_GATE

0.775VALW_GATE

+0.775MOS

+APU_CORE_FCH

1

C2620

C2621

2

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

1 2

1 2

+5VALW_COM

@

R3890
1K_0402_5%

+5VALW_COM

@

R3891
1K_0402_5%

R3998

VIN 5V and 3.3V (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm

+3VALW

+5VALW

+5VALW

C12
1U_0402_6.3V6K

C11
1U_0402_6.3V6K

1 2

SUSP#<24,40,42>

1 1

RS@

R1667
0_0402_5%

1 2

RS@

R1668
0_0402_5%

3VS_ON

5VS_ON

1 2

1 2

@

@

U2

1

VIN1

2

VIN1

3

ON1

4

VBIAS

5

ON2

6

VIN2

7

VIN2

EM5209VF_DFN14_3X2

VOUT1
VOUT1

VOUT2
VOUT2

GPAD

+3VS_LS

14
13

12

CT1

GND

CT2

1 2

C10

11

560P_0402_50V7K

1 2

10

C9

9

330P_0402_50V7K

+5VS_LS

8

15

VIN 1.8V and 1.5V (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm

U3

1 2

C24

@

1U_0402_6.3V6K

1

2

0.95VS_GATE

2

G

1

VIN1

2

VIN1

3

ON1

4

VBIAS

5

ON2

6

VIN2

7

VIN2

EM5209VF_DFN14_3X2

SB00000ZN00

S TR AO4354 1N SOIC-8

U4

AO4354 1N SOIC8

8
7
6
5

4

1

13

D

2

Q84

S

2N7002K_SOT23-3

VOUT1
VOUT1

VOUT2
VOUT2

C16

0.1U_0201_10V6K

+1.8VALW

R1669
0_0402_5%

1.8VS_ON

1 2

SUSP#

RS@

+5VALW

C940

0.95VS_PWR_EN#<24>

4.7U_0402_6.3V6M

+5VALW

R1674

4.7K_0402_5%

1 2

2 2

+1.8VS_LS CORE_NB_GATE

14
13

1 2

12

CT1

C21

11

330P_0402_50V7K

GND

10

CT2

9
8

15

GPAD

+0.95VS+0.95VALW

1
2

C939

4.7U_0402_6.3V6M

C46

1U_0402_6.3V6K

3

1

1

2

2

@

J7

JP@

JUMP_43X118

J8

JP@

JUMP_43X118

J9

JP@

JUMP_43X79

+3VS

1

2

+5VS

1

2

+1.8VS

1

2

C13

0.1U_0201_10V6K

C14

0.1U_0201_10V6K

C26

0.1U_0201_10V6K

C2618

4.7U_0402_6.3V6M

C2619

4.7U_0402_6.3V6M

S5_MUX_CTRL<9>

5V_393_EN<24>

+APU_CORE_NB

1

2

+0.775VALW

1

2

+APU_CORE_NB

+0.775MOS

0.1U_0201_10V6K

Q135
AO3416L_SOT23-3

1 3

D

2

Q2515
AO3416L_SOT23-3

1 3

D

2

+5VALW_COM

3

2

100K_0402_5%

S5_MUX_CTRL

@

C2734

1 2

5V_393_EN

S

G

S

G

U2608A

8

TLC3702IDRG4 SOIC 8P

SA000088800

P

+

O

-

G

4

R3936

@

10K_0402_5%

R2634

DMN66D0LDW-7_SOT363-6

0_0402_5%

20mils 0.5A

U2614

5

IN

4

EN

SY6288C20AAC_SOT23-5

Q2513
AO3416L_SOT23-3

D

S

13

G

2

Q2514
AO3416L_SOT23-3

D

S

13

G

2

0.775VALW_GATE

1

+5VALW_COM

5

+

6

-

1 2

+5VALW_COM

+3VALW +0.775VALW

R2635

100K_0402_5%

1 2

G

5

Q2516A

3 3

RV807
10K_0402_5%

1 2

RV913

@

1 2

RV833
33K_0402_5%

1 2

DIS@

CV2701

DIS@

0.22U_0402_16V7K

DIS@

CV626

DIS@

0.22U_0402_16V7K

Vih 2.1V
Delay 2ms

VGA_ON

1

Vih 2.1V

2

Delay 7ms

1

2

PE_GPIO1<9>

100K_0402_5%

+3VSDGPU

RV406

0_0402_5%

12

@

+3VALW

UV5
MC74VHC1G08DFT2G_SC70- 5

5

DIS@

1

P

IN1

O

2

IN2

G

3

+3VALW

UV6
MC74VHC1G08DFT2G_SC70- 5

5

DIS@

1

P

IN1

O

2

IN2

G

3

4

4

VGA_ON

1

DIS@

CV2698

0.1U_0201_10V6K

2

VGA_ON_B

2

@

CV2722
1U_0402_6.3V6K

1

VGA_ON_B <48>

VGA_ON

RV1629 33K_0402_5%

1 2

DIS@

DIS@

CV625

+1.8VALW TO +1.8VSDGPU

+5VALW

+1.8VALW

1

2

0.22U_0402_16V7K

1 2

@

CV2699 1U_0402_6.3V6K

Vih 1.2V
Delay 3ms

IMAX(per channel)=6A,Rds=18mohm

UV8

1

VIN1

2

VIN1

3

ON1

4

VBIAS

5

ON2

6

VIN2

7

VIN2

EM5209VF_DFN14_3X2

DIS@

VOUT1
VOUT1

VOUT2
VOUT2

GPAD

14
13

12

CT1

11

GND

10

CT2

9
8

15

DIS@

+1.8VSDGPU_LS

1 2

40mil(1.013A)

CV6222200P_0402_50V7K

J2503

112

JUMP_43X39

+1.8VSDGPU

JP@

2

2

CV31

DIS@

0.1U_0201_10V6K

1

+3VS TO +3VSDGPU

4 4

+3VS +3VSDGPU

UV7

5

CV620

4.7U_0402_6.3V6M

DIS@

A

1

2

VGA_ON

IN

4

EN

SY6288C20AAC_SOT23-5

20mil(10mA)

DIS@

OUT

GND

OC

1

2

3

1

CV621

4.7U_0402_6.3V6M

DIS@

2

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PRO PRIETARY PROPER TY O F C OMPAL ELEC TRO NIC S, IN C. AND CO NTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PRO PRIETARY PROPER TY O F C OMPAL ELEC TRO NIC S, IN C. AND CO NTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PRO PRIETARY PROPER TY O F C OMPAL ELEC TRO NIC S, IN C. AND CO NTAIN S CONFIDENTIAL
AND TRADE SEC RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D

AND TRADE SEC RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D

AND TRADE SEC RET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

DC INTERFACE

DC INTERFACE

DC INTERFACE

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

Date: Sheet of

Date: Sheet of

Date: Sheet of

25 50Tuesday, May 02, 2017

25 50Tuesday, May 02, 2017

25 50Tuesday, May 02, 2017

E

1.A

1.A

1.A

5

+3VS

+5VALW

1

2

D D

C2739

0.1U_0201_10V6K

C C

+3VS

1 2

1

2

12

B B

+3VS

12

12

+3VS

12

A A

C2736

10U_0603_6.3V6M

1

2

R4004
10K_0402_5%

C2747
1U_0402_6.3V6K

@

R4005

4.7K_0402_5%

@

R4009

4.7K_0402_5%

@

R4010

4.7K_0402_5%

@

R4011

4.7K_0402_5%

1

1

2

2

C2748

C2740

0.1U_0201_10V6K

0.1U_0201_10V6K

APU_DP 1_P0<8>
APU_DP 1_N0<8>

APU_DP 1_P1<8>
APU_DP 1_N1<8>

APU_DP 1_P2<8>
APU_DP 1_N2<8>

APU_DP 1_P3<8>
APU_DP 1_N3<8>

RESET# RESET#

HDMI_DCIN_EN

HDMI_EQ

HDMI_I2C_ADDR

DC c oupling enable; Internal pull up, 3.3V I/O.
L: DC coupling input
H: Default,AC coupling input

Receiver equalization setting(Internal 150K PD)
(*) L: programmable EQ for channel loss up to 5.3dB
( ) H: programmable EQ for channel loss up to 10dB
( ) M: programmable EQ for channel loss up to 14dB

I2C Slave Address select i on; I nternal pull do wn; 3. 3 V I / O
L: Default, Slave address 0x10-0x2F.
H: Alternative salve address 0x90-0x9F, 0xD0-0xDF.

8

VIN

7

NC

6

VDD

5

EN

U1302

1

RT9041E-15GQW_WDFN8_2X2

2

C2737

1U_0402_6.3V6K

1

1

2

2

C2743

C2742

C2741

0.01U_0402_16V7K

R4006 should be placed close to REXT pin.

Enhance Vswing

0.01U_0402_16V7K

0.01U_0402_16V7K

C505 .1U_0402_16V7K
C506 .1U_0402_16V7K

C507 .1U_0402_16V7K
C508 .1U_0402_16V7K

C509 .1U_0402_16V7K
C510 .1U_0402_16V7K

C511 .1U_0402_16V7K
C512 .1U_0402_16V7K

1 2

R4006 4.99K_0402_1%

PGOOD

PGND

+1.2V_HDMI

1

2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

+1.2V_HDMI

VOUT

ADJ

GND

1

2

3

4
9

HDMI_PRE

HDMI_DCIN_EN
HDMI_EQ
HDMI_I2C_ADDR

R4012

4.99K_0402_1%

R4013

10K_0402_1%

U2615

27

VDD12

30

VDD12

11

VDDA12

43

VDDRX12

46

VDDRX12

15

VDDTX12

18

VDDTX12

37

POWERSWITCH

38

IN_D2p

39

IN_D2n

41

IN_D1p

42

IN_D1n

44

IN_D0p

45

IN_D0n

47

IN_CKp

48

IN_CKn

3

DCIN_EN

5

EQ

31

I2C_ADDR

10

RSV1

25

NC

26

RSV2

36

REXT

4

PDB

35

RESETB

6

PRE

2

TESTMODEB

PS8409AQFN48GTR2-A0 QFN 48P_6X6

SA0000AC300

12

12

12

+3VS

12

@

R4008

4.7K_0402_5%

4

+1.2V_HDMI

1

2

C2738

10U_0603_6.3V6M

VDD33
VDD33

OUT_D2p
OUT_D2n

OUT_D1p
OUT_D1n

OUT_D0p
OUT_D0n

OUT_CKp
OUT_CKn

SDA_SRC/AUXN
SCL_SRC/AUXP

SDA_SNK

SCL_SNK

HPD_SRC
HPD_SNK

HDMI_ID

HDMI_CEC

CEC_EN

CSCL
CSDA

EPAD

HDMI_PRE

R4007

4.7K_0402_5%

HDMI_ID

+3VS

1

C2745

T4958
T4959

0.01U_0402_16V7K

2

C2746

1

2

0.1U_0201_10V6K

HDMI_SDATA <8>

HDMI_SCLK <8>

1

2

C2744

1
24

23
22

20
19

17
16

14
13

33
34
8
7

40
21

32
9
12

29
28

49

0.01U_0402_16V7K

HDMI_TX2+
HDMI_TX2-

HDMI_TX1+
HDMI_TX1-

HDMI_TX0+
HDMI_TX0-

HDMI_CLK+
HDMI_CLK-

HDMI_SDATA
HDMI_SCLK
HDMI_SDATA_R
HDMI_SCLK_R

HDMI_HPLUG
HDMI_HPD_CONN

HDMI_ID

Output pre-emp hasis setting;Internal pull-up 3.3V I/O
L: Pre-emphasis =2.5dB
H: Default, No Pre-em phasis

HDMI_ID enable ; Internal pull down;3.3V I/O
L: Default, HDMI ID enable
H: HDMI ID disable

3

+5VS_DISP

W=40mils

3

OUT

2

GND

1 2

L2512

SM070003V00

3 4

HCM1012GH900BP_4P

1 2

1 2

L2513

SM070003V00

3 4

HCM1012GH900BP_4P

1 2

1 2

L2514

SM070003V00

3 4

HCM1012GH900BP_4P

1 2

1 2

L2515

SM070003V00

3 4

HCM1012GH900BP_4P

1 2

12

R4015

2K_0402_5%

+3VS

C

2

B

E

Q18

3 1

MMBT3904_NL_SOT23-3

@

12

R915

@

1

C543

0.1U_0201_10V6K

2

12

12

12

12

1 2

@

R281 150K_0402_5%

+5VS

HDMI_SDATA_R

HDMI_HPD<8>

U73

1

IN

AP2330 W-7_S C59-3

HDMI_CLK-

HDMI_CLK+

HDMI_TX0-

HDMI_TX0+

HDMI_TX1-

HDMI_TX1+

HDMI_TX2-

HDMI_TX2+

2K_0402_5%

R756 0_0402_5%@

R765 0_0402_5%@

R769 0_0402_5%@

R779 0_0402_5%@

R781 0_0402_5%@

R782 0_0402_5%@

R783 0_0402_5%@

R794 0_0402_5%@

12

R4014

HDMI_HPD

100K_0402_5%

ZZZ

HDMI_ROYALTY

ROYALTY HDMI W/LOGO+HDCP

RO0000003HM

45@

HDMI_R_CLK-

2

C2749

@

3.3P_0402_50V8

1

HDMI_R_CLK+

HDMI_R_TX0-

R4020

@

150_0402_1%

1 2

HDMI_R_TX0+

HDMI_R_TX1-

R4021

@

150_0402_1%

1 2

HDMI_R_TX1+

HDMI_R_TX2-

R4022

@

150_0402_1%

1 2

HDMI_R_TX2+

R4016

47K_0402_5%@

HDMI_SDATA

HDMI_SCLKHDMI_SCLK_R

HDMI_HPLUG

12

@

2

Improve Intra-pair Skew on CLK+/-

+3VS+5VS_DISP

12

R4017

47K_0402_5%@

R283
365K_0402_1%

12

+5VS_DISP

1

For HDMI DDC Capacitance Leakage issue

D2016

HDMI_HPD_CONN

HDMI_SCLK_R HDMI_SDATA_R

HDMI_R_CLK-

HDMI_R_CLK+

HDMI_R_TX0-

HDMI_R_TX0+

HDMI_R_TX1-

HDMI_R_TX1+

HDMI_R_TX2-

HDMI_R_TX2+

+5VS_DISP

HDMI_HPD_CONN

HDMI_SDATA_R
HDMI_SCLK_R

HDMI_R_CLK-

HDMI_R_CLK+
HDMI_R_TX0-

HDMI_R_TX0+
HDMI_R_TX1-

HDMI_R_TX1+
HDMI_R_TX2-

HDMI_R_TX2+

EMC@

6

I/O4

I/O2

5

VDD

GND

4

I/O3

I/O1

AZC199 -04S.R7 G SOT23

SC300002900

D2017

@EMC@

1

1

2

4

5

3

8

SC300002C00

D2018

@EMC@

1

2

4

5

3

8

SC300002C00

10

9

7

6

10

9

7

6

2

4

5

3

L05ESDL5V0NA-4 SLP2510P8

1

2

4

5

3

L05ESDL5V0NA-4 SLP2510P8

HDMI connector

19
18
17
16
15
14
13
12
11
10

3

2

1

9

8

7

6

9

8

7

6

JHDMI1

HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CK­CK_shield
CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

CCM_C100042GR019M298ZL

CONN@

DC232003500

HDMI_R_CLK-

HDMI_R_CLK+

HDMI_R_TX0-

HDMI_R_TX0+

HDMI_R_TX1-

HDMI_R_TX1+

HDMI_R_TX2-

HDMI_R_TX2+

20

GND

21

GND

22

GND

23

GND

HDMI_HPD HDMI_HPLUG

Security Classific ation

Security Classific ation

Security Classific ation

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL
AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1 2

R4018 0_0402_5%

Compal Secret Data

Compal Secret Data

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

HDMI REDRIVER (PS8409)

HDMI REDRIVER (PS8409)

HDMI REDRIVER (PS8409)

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

1

26 50Tuesday, May 02, 2017

26 50Tuesday, May 02, 2017

26 50Tuesday, May 02, 2017

1.A

1.A

1.A

5

4

3

2

1

LCD POWER CIRCUIT

C2656

1U_0402_6.3V6K

1

2

D D

ENVDD<8>

+19VB_GFX

C C

W=60mils

SM01000EJ00 3000ma
220ohm@100mhz

DCR 0.04

EDP_TXP0<8>
EDP_TXN0<8>
EDP_TXP1<8>
EDP_TXN1<8>
EDP_TXP2<8>
EDP_TXN2<8>
EDP_TXP3<8>
EDP_TXN3<8>

U8

5

OUT

IN

GND

4

OC

EN

SY6288C20AAC_SOT23-5

L11

HCB2012KF-221T30_0805

1 2

1 2

C371 .1U_0402_16V7K

1 2

C372 .1U_0402_16V7K

1 2

C373 .1U_0402_16V7K

1 2

C374 .1U_0402_16V7K

1 2

C2695 .1U_0402_16V7K

1 2

C2696 .1U_0402_16V7K

1 2

C2698 .1U_0402_16V7K

1 2

C2697 .1U_0402_16V7K

1

2

3

W=60mils

+INVPWR_B+

C365

68P_0402_50V8J

@EMC@

+LCDVDD+3VS

1

2

C367

4.7U_0402_6.3V6M

W=60mils

C364

1000P_0402_50V7K

1

1

@EMC@

2

2

EDP_TXP0_C
EDP_TXN0_C
EDP_TXP1_C
EDP_TXN1_C
EDP_TXP2_C
EDP_TXN2_C
EDP_TXP3_C
EDP_TXN3_C

1

C368

0.1U_0201_10V6K

2

@

Place closed to JEDP1

+LCDVDD

1

C419

0.1U_0201_10V6K

2

@

+3VALW +3VS_CAM+3VS

C102

1U_0402_6.3V6K

1

@

2

CAM_EN<24>

1 2

R110 0_0603_5%

U45

@

5

OUT

IN

GND

4

OC

EN

SY6288C20AAC_SOT23-5

EDP_HPD

R364 100K_0402_5%

INVT PWM

R393 100K_0402_5%@

C549 220P_0402_50V7K

BKOFF#

C528 220P_0402_50V7K

R280 10K_0402_5%@

W=20mils

1

2

3

Place closed to JEDP1

1 2

1 2

@EMC@

1 2

@EMC@

1 2

1 2

C375

0.1U_0201_10V6K

1

2

LED PANEL Conn.

+INVPWR_B+

INVT PWM<8>

BKOFF#<24>

EDP_HPD<8>

+LCDVDD

DMIC_CLK_R<34>
DMIC_DATA<34>

+3VS_CAM

C2735

1U_0402_6.3V6K

1

@

2

For C amera

W=60mils

INVT PWM
BKOFF#

EDP_HPD

EDP_AUXN_C
EDP_AUXP_C

EDP_TXP0_C
EDP_TXN0_C

EDP_TXP1_C
EDP_TXN1_C

EDP_TXP2_C
EDP_TXN2_C

EDP_TXP3_C
EDP_TXN3_C

USB20_N3_CAMERA
USB20_P3_CAMERA

DMIC_CLK_R
DMIC_DATA

D2015

@EMC@

YSLC 05CH_ SOT2 3-3

2

3

1

JEDP1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37
38
39
40

G1

37

G2

38

G3

39

G4

40

G5

ACES_50398-04041-001

CONN@

SP010013I00

41
42
43
44
45

1 2

EDP_AUXP<8>
EDP_AUXN<8>

B B

USB20_P3<10>

USB20_N3<10>

A A

C370 .1U_0402_16V7K

1 2

C369 .1U_0402_16V7K

1 2

R3963 0_0402_5%@

L2511

1 2

MCM1012B900F06BP_4P

EMC@

1 2

R3964 0_0402_5%@

0402_0-ohm Co-Layout with 0504_Choke

5

EDP_AUXP_C
EDP_AUXN_C

USB20_P3_CAMERA

34

USB20_N3_CAMERA

Security Classification

Security Classification

Security Classification

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

2017/04/18 2019/04/18

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

eDP/Camera/DMIC

eDP/Camera/DMIC

eDP/Camera/DMIC

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

27 50Tuesday, May 02, 2017

27 50Tuesday, May 02, 2017

27 50Tuesday, May 02, 2017

1

1.A

1.A

1.A

5

LAN-RTL8411B

+3VALW +3V_LAN

D D

60mil

CL14

1U_0402_6.3V6K

2

1

From EC

High active.
EN threshold voltage min:1.2V
typ:1.6V max:2.0V
Current limit threshold 1.5~2.8A

+3V_LAN Rising time must >0.5ms and <100ms

C C

+3V_LAN

12

XTLI

CL18

1

2

15P_0402_50V8J

B B

LAN_TERMAL
LAN_MIDI0+
LAN_MIDI0- RJ45_MIDI0-

LAN_MIDI1+
LAN_MIDI1-

LAN_MIDI2+
LAN_MIDI2-

LAN_MIDI3+
LAN_MIDI3- RJ45_MIDI3-

1

.1U_0402 _16V7K

2

RL2
0_0805_5%

1 2

UL1

5

4

SY6288C20AAC_SOT23-5

@

LAN_PWR_EN

RL12
10K_0402_5%

@

GPO

YL1

SJ10000UP00

25MHZ_10PF_XRCGB25M000F2P34R0

1

1

NC

2

TL1

1
2
3

4
5
6

7
8
9

10
11
12

GST5009-E

CL26

SP050006B10

Place close to TCT pin

IN

EN

TCT1
TD1+
TD1-

TCT2
TD2+
TD2-

TCT3
TD3+
TD3-

TCT4
TD4+
TD4-

1

OUT

2

GND

3

OC

XTLO_R

3

3

NC

4

24

MCT1

23

MX1+

22

MX1-

21

MCT2

20

MX2+

19

MX2-

18

MCT3

17

MX3+

16

MX3-

15

MCT4

14

MX4+

13

MX4-

60mil

LAN_PWR_EN <24>

1

15P_0402_50V8J

CL19

2

MCT1

MCT2

MCT3

MCT4

182736

45

PU at PCH side

CL15,CL17 close to UL2

RL11 0_0402_5%SWR@

RL13 0_0402_5%LDO@

RJ45_MIDI0+

RJ45_MIDI1+
RJ45_MIDI1-

RJ45_MIDI2+
RJ45_MIDI2-

RJ45_MIDI3+

RPL1
75_0804_8P4R_1%

RJ45_GND

+3V_LAN

+3VS

12

1 2

SWR mode

1 2

1 2

LDO mode

RL15
1K_0402_5%

ISOLAT EB

RL18
15K_0402_5%

4

reserve EC_PME# pull high 100K to +3VALW_EC

RL3 0_0402_5%RS@

RL8 10K_0402_5%

+3V_LAN

CL17 .1U_0402_16V7K
CL15 .1U_0402_16V7K

XTLO_R

LAN_GPO<24>

for disable PHY
reserve 0 ohm

LAN Connector

JRJ45

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

SINGA_2RJ1660-000111F

CONN@

DC234009H00

CLK_PCIE_LAN<10>
CLK_PCIE_LAN#<10>

APU_PC IE_RST#<9,15,29,30>
LAN_CLKREQ#<9>

PCIE_ARX_DTX_P0<6>

PCIE_ARX_DTX_N0<6>
PCIE_ATX_C_DRX_P0<6>
PCIE_ATX_C_DRX_N0<6>

RJ45_MIDI3-

RJ45_MIDI3+

RJ45_MIDI1-

RJ45_MIDI2-

RJ45_MIDI2+

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

LAN_WAKE#<24>

ENSWREG

+REGOUT

1 2

1 2
1 2

RL16

2.49K_0402_1%

W=60mil

12

RL14
1K_0402_5%

1 2

+3V_LAN

12

GND

GND

GND

GND

LDO mode

1 2

ISOLAT EB
LAN_PME#

GPO

12

JP1

SWR@

@EMC@

B88069X9231T203_4P5X3P2-2

12

CL25
10P_0402_50V8J

3

RL1 0_0603_5%LDO@

LL1

2.2UH_HPC252012NF-2R2M_20%

0.1U_0201_10V6K

Using for Switch mode

CL2

1

The trace length from
Lx to PIN48 (REGOUT)

LDO@

2

and from C to Lx must
< 200mils.

11/2 7: P/N cha nge to S H000 00RT 00
( S COIL 2.2UH +-20%

HPC252012NF-2R2M 1.3A)

CLK_PCIE_LAN
CLK_PCIE_LAN#

APU_PC IE_RST#
LAN_CLKREQ#

PCIE_ARX_C_DTX_P0
PCIE_ARX_C_DTX_N0

LAN_MIDI0+
LAN_MIDI0­LAN_MIDI1+
LAN_MIDI1­LAN_MIDI2+
LAN_MIDI2­LAN_MIDI3+
LAN_MIDI3-

XTLI
XTLO

+REGOUT

ENSWREG

LAN_RST

TP@

T4950

1 2

RL17

@

0_0402_5%

TP@

T4951

TP@

T4952

12

11

10

LANGND

9

LANGND

3

IDC=1200 mA

4.7U_0402_6.3V6M
CL1

2

SWR@

1

UL2

Power Manahement/Isolation

31

ISOLATEBPIN

39

LANWAKEB

PCI-Express

23

REFCLK_P

24

REFCLK_N

30

PERSTBPIN

29

CLKREQBPIN

25

HSOP

26

HSON

21

HSIP

22

HSIN

Transceiver Interface

1

MDIP0

2

MDIN0

4

MDIP1

5

MDIN1

6

MDIP2

7

MDIN2

9

MDIP3

10

MDIN3

44

CKXTAL1

45

CKXTAL2

Regulator and Reference

36

REG_OUT

35

VDDREG

34

ENSWREG_H

46

AVDD10

47

RSET

41

LED0

38

LED1/GPO

37

LED3

40

LED_CR

RTL8411B-CGT_QFN48_6X6

40mil40mil

RJ45_GND

12

2

JUMP_43X118

EMC@

DL1

MESC5V02BD03_SOT23-3

1

0.1U_0201_10V6K

Clock

LEDs

@

JPL1

2

W=60mil

300mA

0.1U_0201_10V6K

0.1U_0201_10V6K

0.1U_0201_10V6K

CL28

1

SWR@

2

CL3

1

1

2

2

Place near Pin 3,8,33,46

Card Reader

SD_D0/MS_D1

SD_D1

SD_CLK/MS_D0

SD_CMD/MS_D2

SD_D3/MS_D3

SD_D2/MS_CLK

SD_WP/MS_BS

SD_CD#
MS_CD#

AVDD33
AVDD33
DVDD33
DVDD33

DVDD10
AVDD10
AVDD10

EVDD10

Card_3V3

DV33/18

E_Pad

0.1U_0201_10V6K

CL4

CL5

CL6

1

1

2

2

SD_D0 SD_D0_R

15
14
16
17
18
19
28

42
43

48
11
12
32

33
3
8

20

13

27

49

RL9 0_0402_5%@

SD_D1 SD_D1_R

RL4 0_0402_5%@

SD_CLK

RL10 10_0402_5%

SD_CMD

RL5 0_0402_5%@
RL6 0_0402_5%@

SD_D2

RL7 0_0402_5%@

SD_WP

SD_CD#

1400mA

300mA

800mA

+VDD33_18

0.1U_0201_10V6K

CL20

1

2

0.1U_0201_10V6K

CL7

1

2

Place near Pin 20

1 2
1 2
1 2
1 2
1 2
1 2

+3V_LAN

+LAN_VDD

CL21

4.7U_0402_6.3V6M

1

2

+LAN_VDD

1U_0402_6.3V6K

1

2

Card Uninsert

Card insert

1

CL22

0.1U_0201_10V6K

2

CL8

Using for Switch mode

The trace length
from C to
PIN34,35(VDDREG)
must < 200mils.

SD_CLK_R
SD_CMD_R
SD_D3_RSD_D3
SD_D2_R

+CARD_3V3+LAN_VDD

+3V_LAN

W=60mil

1.4A

0.1U_0201_10V6K

CL9

1

2

Protect cotact

Write prot ect
(Lock)

Open
Close

CL10

4.7U_0402_6.3V6M

1

2

Place near Pin 11,32,48

2

1

close to pin 17

Write Enable
(Unlock)

Open Open
Open

0.1U_0201_10V6K

CL11

1

2

CL16
5P_0402_50V8C

@EMC@

1

0.1U_0201_10V6K

0.1U_0201_10V6K

CL12

1

1

2

2

Card contact

Close

CL13

Place near Pin 27

Card Reader Connector

JSD1

6

VDD

3

CMD

7

CLK

5

VSS1

8

VSS2

9

DAT0

10

DAT1

1

DAT2

2

CD/DAT3

11

W/P

4

CD

TAITW_PSDATQ09GLBS1NN4H1

CONN@

SP011611110

RL19

1 2

0_0402_5%@EMC@

1 2

CL27

@EMC@

10P_0402_50V8J

GND
GND

12
13

100K_0402_5%

SD_WP#

RL21

WP is Normal Open

12

100K_0402_5%@

Connector side

RL20

+CARD_3V3

CL23

4.7U_0402_6.3V6M

1

+3VS+3V_LAN

12

IC side

SD_WP

13

D

QL1

2

2N7002K_SOT23-3

G

S

2

Close to Card Reader CONN

SD_CMD_R

CL24

0.1U_0201_10V6K

SD_CLK_R

1

SD_D0_R
SD_D1_R

2

SD_D2_R
SD_D3_R

SD_WP#
SD_CD#

DVT:02/17

SD_CLK_R

Close to JREAD1 for EMI

A A

Security Classific ation

Security Classific ation

Security Classific ation

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL
AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

LAN RTL8411-CG

LAN RTL8411-CG

LAN RTL8411-CG

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

28 50Tuesday, May 02, 2017

28 50Tuesday, May 02, 2017

28 50Tuesday, May 02, 2017

1

1.A

1.A

1.A

A

Wireless LAN

B

C

D

E

LED1#

LED2#

GND1

2
4
6
8
10
12
14
16
18
20
22

24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66

68

+3VS_WLAN

E51TXD_P80DATA_R
E51RXD_P80CLK_R

WL_RST#_R
BT_ON
WL_OFF#

T4947

R873 0_0402_5%RS@
R3955 0_0402_5%RS@

R874 100K_0402_5%

TP@

1 2

R440 0_0402_5%RS@

12
12

12

EC_TX <24>
EC_RX <24>

APU_PCIE _RST# < 9,15,28, 30>
BT_ON <24>
WL_OFF# <24>

60mil

+3VS +3VS_W LAN

1 2

1 1

2 2

R212
0_0805_5%

+3VALW

C2664

1U_0402_6.3V6K

1

@

2

WLAN_ON<24>

NGFF WL+BT (KEY E)

1

2

5

4

C458

4.7U_0402_6.3V6M

@

U2606

OUT

IN

GND

OC

EN

SY6288C20AAC_SOT23-5

1

@

C459

0.1U_0201_10V6K

2

W=60mi ls

1

2

3

1

C460

0.1U_0201_10V6K

2

+3VS_WLAN

PCIE_ATX_C_DRX_P1<6>
PCIE_ATX_C_DRX_N1<6>

PCIE_ARX_DTX_P1<6>
PCIE_ARX_DTX_N1<6>

CLK_PCIE_WLAN<10>
CLK_PCIE_WLAN#<10>

WLAN_CLKREQ#<9>
WLAN_WAKE#<24>

+3VS_WLAN

USB20_P2<10>

USB20_N2<10>

R3807

12

10K_0402_5%

1
3
5
7

9
11
13
15
17
19
21
23

25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67

69

KEY E

JNGFF1

GND_1
USB_D+
USB_D­GND_7
SDIO_CLK
SDIO_CMD
SDIO_DAT0
SDIO_DAT1
SDIO_DAT2
SDIO_DAT3
SDIO_WAKE
SDIO_RST

GND_33
PET_RX_P0
PET_RX_N0
GND_39
PER_TX_P0
PER_TX_N0
GND_45
REFCLK_P0
REFCLK_N0
GND_51
CLKREQ0#
PEWAKE0#
GND_57
RSVD/PCIE_RX_P1
RSVD/PCIE_RX_N1
GND_63
RSVD/PCIE_TX_P1
RSVD/PCIE_TX_N1
GND_69
RSVD_71
RSVD_73
GND_75

GND2

BELLW_80152-3221

CONN@

3.3VAUX_2

3.3VAUX_4

PCM_CLK

PCM_SYNC

PCM_OUT

PCM_IN

GND_18

UART_WAKE

UART_TX

UART_RX
UART_RTS
UART_CTS

CLink_RST

CLink_DATA

CLink_CLK

COEX3
COEX2
COEX1

SUSCLK(32KHz)

PERST0#
W_DISABLE2#
W_DISABLE1#

I2C_ DAT
I2C_ CLK

I2C_ IRQ
RSVD_64
RSVD_66
RSVD_68
RSVD_70

3.3VAUX_72

3.3VAUX_74

SP070013E00

3 3

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS TH E PROPRIETARY PRO PERTY OF COM PAL ELE CTRONI CS, INC. A ND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS TH E PROPRIETARY PRO PERTY OF COM PAL ELE CTRONI CS, INC. A ND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS TH E PROPRIETARY PRO PERTY OF COM PAL ELE CTRONI CS, INC. A ND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

C

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

M.2 Key E (WLAN)

M.2 Key E (WLAN)

M.2 Key E (WLAN)

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

29 50Tuesday, May 02 , 2017

29 50Tuesday, May 02 , 2017

29 50Tuesday, May 02 , 2017

E

1.A

1.A

1.A

A

B

C

SATA Re-Driver and cable HDD Conn.

D

E

F

G

H

G-Sensor (reserved)

+3VS

1 1

2 2

RZ4

GS@

2.2K_0402_5%

1 2

RZ5

GS@

2.2K_0402_5%

1 2

APU_I2C 1_SCL<9>

APU_I2C 1_SDA<9>

APU_I2C 1_SCL_ G

APU_I2C 1_SDA_G

APU_I2C 1_SCL

APU_I2C 1_SDA

SATA_ATX_DRX_P0<10>
SATA_ATX_DRX_N0<10>

SATA_ARX_DTX_N0<10>
SATA_ARX_DTX_P0<10>

+3VS

1 2

RO10 4.7K_0402_5%@

1 2

RO15 4.7K_0402_5%@

1 2

RO13 4.7K_0402_5%@

1 2

RO18 4.7K_0402_5%@

1 2

RO14 4.7K_0402_5%@

1 2

RO19 4.7K_0402_5%PAR@

1 2

RO11 4.7K_0402_5%@

1 2

RO16 4.7K_0402_5%@

1 2

RO12 4.7K_0402_5%@

1 2

RO17 4.7K_0402_5%PAR@

1 2

RO20 4.7K_0402_5%@

1 2

RO21 4.7K_0402_5%PAR@

1 2

RO22 4.7K_0402_5%TI@

+1.8VS

2

G

S

5

DMN63D8LDW-7_SOT363-6
QZ1B

34

SGD

DMN63D8LDW-7_SOT363-6
QZ1A

GS@

Vgs = 0.8~1.5 V

CO16 0.01U_0402_16V7K
CO17 0.01U_0402_16V7K

CO18 0.01U_0402_16V7K
CO19 0.01U_0402_16V7K

APU_I2C 1_SCL_ G
APU_I2C 1_SDA_G

1 2

RZ2 10K_0402_5%@

+3VS

1 2

RZ6 10K_0402_5%GS@

APU_I2C 1_SCL_ G

61

D

GS@

APU_I2C 1_SDA_G

SATA_ATX_C_DRX_P0

12

SATA_ATX_C_DRX_N0

12

SATA_ARX_C_DTX_N0

12

SATA_ARX_C_DTX_P0 RDSATA_CRX_DTX_P0

12

A_DE

A_EQ1

A_EQ2

B_DE

B_EQ1

B_EQ2

DEW

+3VS

UO2

SN75LVCP601RTJR_A.4_TQFN20_4X4

TI@

SA00003ZX00

+3VS

12

CO14

12

0.01U_0402_16V7K

1

A_INP

2

A_INN

3

GND1

4

B_OUTN

5

B_OUTP

21

GND2

RO6

4.99K_0402_1%

1 2

RO5

@

4.7K_0402_5%

USE 8527 re-driver
SA00007JU10

RZ1

GS@

10K_0402_5%

UZ1

8

CS

4

SCLSPC

6

SDA/SDI/SDO

7

SDO/SA0

16

ADC1

15

ADC2

13

ADC3

2

NC

3

NC

LIS3DHTR_LGA16_3X3

GS@

LIS3DH
SA0 ->0, Address is 0011 000 (0x30h)
SA0 ->1, Address is 0011 001 (0x32h)

DEW

A_EQ2

B_EQ1

A_EQ1

+3VS

17

20

16

DEW

VDD2

B_EQ119A_EQ218A_EQ1

A_OUTP
A_OUTN

REXT6EN7B_DE8A_DE9VDD1

10

12

1

CO15

B_DE

A_DE

0.1U_0201_10V6K

2

Vdd_IO

Vdd

INT1
INT2

RES

GND
GND

UO2
PS8527CTQFN20GTR2A_TQFN20_4X4

SA00007JU10
PAR@

RDSATA_CTX_DRX_P0

15

RDSATA_CTX_DRX_N0

14

B_EQ2

13

B_EQ2

B_INN
B_INP

+3VS

12
11

RDSATA_CRX_DTX_N0

+3VS

1

14

G_INT#

11
9

10

5
12

G_INT2

RZ7 0_0402_5%GS@

GS@

1 2

CZ1 10U_0603_6.3V6M

GS@

1 2

CZ2 0.1U_0201_10V6K

1 2

INT1/2 all High Active

G_INT#_APU <9>

+5VS_HDD

100mils

CO12

10U_0603_6.3V6M

12

1

CO13

0.1U_0201_10V6K

2

@

G_INT#

+3VS

12

RZ3
10K_0402_5%@

Check INT pin

RDSATA_CRX_DTX_P0
RDSATA_CRX_DTX_N0

RDSATA_CTX_DRX_N0
RDSATA_CTX_DRX_P0

DVT_0203: remove JHDD1

1 2

RO3 0_0805_5%RS@

+5VS

G_INT2 JHDD_P9

CO4 0.01U_0402_16V7K
CO3 0.01U_0402_16V7K

CO2 0.01U_0402_16V7K
CO1 0.01U_0402_16V7K

1 2

RO4 0_0402_5%@

12
12

12
12

RDSATA_CRX_C_DTX_P0
RDSATA_CRX_C_DTX_N0

RDSATA_CTX_C_DRX_N0
RDSATA_CTX_C_DRX_P0

close to CONN.

+3VS

+5VS_HDD

JHDD2

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

G1

22

G2

23

G3

24

G4

ACES_5 0406-0 2071-00 1

CONN@

SP010016L00

3 3

SATA NGFF SSD Conn.

LON/SAM:Pin9=NC

LON:Pin15=notch

SAM:Pin12-19 notch

PCIE_ARX_DTX_N3<6>
PCIE_ARX_DTX_P3<6>

PCIE_ATX_C_DRX_N3<6>

PCIE SSD

SATA SSD

4 4

PCIE_ATX_C_DRX_P3<6>

PCIE_ARX_DTX_N2<6>
PCIE_ARX_DTX_P2<6>

PCIE_ATX_C_DRX_N2<6>
PCIE_ATX_C_DRX_P2<6>

SATA_ARX_DTX_P1<10>
SATA_ARX_DTX_N1<10>

SATA_ATX_DRX_N1<10>
SATA_ATX_DRX_P1<10>

A

PCIE_ARX_DTX_N3
PCIE_ARX_DTX_P3

PCIE_ATX_C_DRX_N3
PCIE_ATX_C_DRX_P3

PCIE_ARX_DTX_N2
PCIE_ARX_DTX_P2

PCIE_ATX_C_DRX_N2
PCIE_ATX_C_DRX_P2

SATA_ARX_DTX_P1
SATA_ARX_DTX_N1

SATA_ATX_DRX_N1
SATA_ATX_DRX_P1

AGPIO8<9>

1 2

RM11 0_0402_5%PCIE@

1 2

RM12 0_0402_5%PCIE@

1 2

RM13 0_0402_5%PCIE@

1 2

RM14 0_0402_5%PCIE@

SATA@

1 2

CM7 0.01U_0402_16V7K

1 2

CM8 0.01U_0402_16V7K

SATA@

SATA@

1 2

CM9 0.01U_0402_16V7K

1 2

CM10 0.01U_0402_16V7K

SATA@

CLK_PCIE_SSD#<10>
CLK_PCIE_SSD<10>

1 2

RM22 0_0402_5%

SSD_DET# Function

10PCIE SSD Device

B

CLK_PCIE_SSD#
CLK_PCIE_SSD

SATA SSD Device

PCIE_ARX_R_DTX_N2
PCIE_ARX_R_DTX_P2

PCIE_ATX_R_DRX_N2
PCIE_ATX_R_DRX_P2

LON/SAM:Pin61=GND

SSD_DET#

C

JSSD1

1

GND

3

GND

5

PERn3

DTx3

7

PERp3

9

GND

11

PETn3

DRx3

13

PETp3

15

GND

17

PERn2

DTx2

19

PERp2

21

GND

23

PETn2

DRx2

25

PETp2

27

GND

29

PERn1

DTx1

31

PERp1

33

GND

35

PETn1

DRx1

37

PETp1

39

GND

41

PERn0/SATA-B+

43
45
47
49
51
53
55
57

59

63
65
67

DTx0

PERp0/SATA-B­GND
PETn0/SATA-A-

DRx0

PETp0/SATA-A+
GND
REFCLKN
REFCLKP
GND

Pin67 Pin68

NC

Pin69 Pin70

PEDET(NC-PCIE/GND-SATA)613P3VAUX

Pin71 Pin72

GND

Pin73 Pin74

GND

Pin75

GND

BELLW_80159-3221

CONN@

SUSCLK(32kHz)

SP070018L00

D

3P3VAUX
3P3VAUX

DAS/DSS#

3P3VAUX
3P3VAUX
3P3VAUX
3P3VAUX

DEVSLP

PERST#

CLKREQ#

PEWake#

3P3VAUX
3P3VAUX

GND1
GND2

2
4
6

NC

8

NC

10
12
14
16
18
20

NC

22

NC

24

NC

26

NC

28

NC

30

NC

32

NC

34

NC

36

NC

38
40

NC

42

NC

44

NC

46

NC

48

NC

50
52
54
56

NC

58

NC

60
62
64
66

68
69

+3VS_SSD_NGFF

LON/SAM:Pin10=Device_Active_Signal

SSD_LED#

LON:If system didn't support DEVSLP, set Device Sleep Signal high and
keep (from power on), device will ignore.

DEVSLP1_R

SSD_PCIE_RST#
SSD_CLKREQ#_R

Security Classific ation

Security Classific ation

Security Classific ation

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL
AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SUSCLK_SSD

Issued Date

Issued Date

Issued Date

T245@

1 2

RM21 0_0402_5%@

1 2

RM20 0_0402_5%

1 2

CM15 100P_0402_50V8JEMC@

1 2

RM18 0_0402_5%@

1 2

RM5 0_0402_5%@

+3VS_SSD_NGFF

T246@

E

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

DEVSLP1 <10>

APU_PC IE_RST# <9,15 ,28,29>
SSD_CLKREQ# <9>

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

F

RM9
0_0805_5%

1 2

RS@

+3VS_SSD_NGFF+3VS

CM14

1

CM13

2

10U_0603_6.3V6M

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

G

1

1

+

CS29
150U_B2_6.3VM_R35M

2

SGA00009M00

2

0.1U_0201_10V6K

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

HDD/SSD

HDD/SSD

HDD/SSD

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

1.A

1.A

30 50Tuesday, May 02, 2017

30 50Tuesday, May 02, 2017

30 50Tuesday, May 02, 2017

H

1.A

5

USB3.0 (Port 3)

USB3_ATX_C_DRX_N3

1 2

C482

USB3_ATX_DRX_N3<10>

USB3_ATX_DRX_P3<10>

D D

USB3_ARX_DTX_N3<10>

USB3_ARX_DTX_P3<10>

C C

USB Host Charger

SELCDP

CB

X

0

0

1

11

C484

DCP(Dedicated Charging Port)
autodetect with mouse/keyboard wakeup

1 2

.1U_0402_16V7K

USB3_ATX_C_DRX_P3

.1U_0402_16V7K

USB3_ARX_DTX_N3

USB3_ARX_DTX_P3

USB20_P7_G USB20_P7_L

USB20_N7_G USB20_N7_L

S0 charging wi th SDP(Standard Downstream Port) only

S0 charging with C DP(Charging Downstream Port) or

SDP only

1 2

R3968 0_0402_5%RS@

1 2

R3967 0_0402_5%RS@

1 2

R3966 0_0402_5%RS@

1 2

R3965 0_0402_5%RS@

3 4

MCM1012B 900F06BP_ 4P
L2508

EMC@

USB3_ATX_L_DRX_P3

USB3_ARX_L_DTX_N3

USB3_ARX_L_DTX_P3

12

4

USB20_N7<10>
USB20_P7<10>

USB_CB<24>

+5VALW

3

For ESD request

D15

USB3_ATX_L_DRX_P3

USB3_ATX_L_DRX_N3USB3_ATX_L_DRX_N3

USB3_ARX_L_DTX_P3

USB3_ARX_L_DTX_N3

+USB3_VCCA

USB20_N7
USB20_P7

USB20_N7 USB20_N7_G
USB20_P7

0.1U_0201_10V6K

CS89

CHG@

1 2

RS96 0_0402_5%NCHG@

1 2

RS97 0_0402_5%NCHG@

8
7
6
5

1

SLG55594AVTR_TDFN8_2X2

SA00006L600

2

US10

CB
TDM
TDP
VDD

CHG@

CEN

SELCDP

Thermal Pad

DM

DP

EMC@

1

1

2

2

4

4

5

5

3

3

8

L05ESDL5V0NA-4 SLP2510P8

D2010

EMC@

6

I/O4

5

VDD

4

I/O3

AZC099- 04S.R7G_S OT23-6

USB20_N7_G
USB20_P7_G

USB_CENUSB_CB

1
2

USB20_P7_G

3

USB_SELCDP

4
9

10

9

7

6

I/O2

GND

I/O1

+3VLP

USB3_ATX_L_DRX_P3

9

USB3_ATX_L_DRX_N3

8

USB3_ARX_L_DTX_P3

7

USB3_ARX_L_DTX_N3

6

USB20_P7_L

3

2

USB20_N7_L

1

12

CHG@

RS94
10K_0402_5%

USB_CEN <24>

USB_SELCDP <24>

USB_CHARGE_2A<24>

150U_B2_6.3VM_R35M

SGA00009M00

2

C483
1U_0402_6.3V6K

1 2

USB_CHARGE_2A

1

+

CS25

2

USB20_N7_L
USB20_P7_L

USB3_ARX_L_DTX_N3
USB3_ARX_L_DTX_P3

USB3_ATX_L_DRX_N3
USB3_ATX_L_DRX_P3

+5VALW

U25

5

IN

4

EN

SY6288C20AAC_SOT23-5

+USB3_VCCA

1

C487
.1U_0402_16V7K

2

EMC@

USB3.0 Conn.

1

OUT

2

GND

3

OC

JUSB1

1

VBUS

2

D-

3

D+

4

GND

5

SSRX-

6

SSRX+
GND
SSTX­SSTX+

GND
GND
GND
GND

7
8
9

ACON_TARB 5-9V1391

CONN@

DC23300NH00

+USB3_VCCA

1 2

R454 0_0402_5%@

10
11
12
13

1

80mils 2A

1

C612

0.1U_0201_10V6K

2

@

USB_OC0# <9>

HPOUT_L_1<34>
HPOUT_R_1<34>

SLEEVE<34>

BATT_AMB_LED#<24>

BATT_BLUE_LED#<24>

PWR_SUSP_LED#<24>

100mils 2.5A

RING2<34>
HP_PLUG#<34>

PWR_LED#<24>

USB_EN<24>

+5VALW

USB20_P0<10>

USB20_N0<10>

B B

USB20_P1<10>

USB20_N1<10>

A A

USB20_P0

USB20_N0

USB20_P1

USB20_N1

5

3 4

MCM1012B 900F06BP_ 4P
L2509

EMC@

3 4

MCM1012B 900F06BP_ 4P
L2510

EMC@

12

12

USB20_P0_L

USB20_N0_L

USB20_P1_L

USB20_N1_L

4

HPOUT_L_1
HPOUT_R_1

SLEEVE
RING2

HP_PLUG#

GNDA

USB20_P0_L
USB20_N0_L

USB20_P1_L
USB20_N1_L

BATT_AMB_LED#
BATT_BLUE_LED#
PWR_SUSP_LED#
PWR_LED#

USB_EN

GNDA

Security Classif ication

Security Classif ication

Security Classif ication

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOS ED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOS ED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOS ED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

JUSB3

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

GND

28

GND

ACES_51 522-02601 -001

CONN@

SP01001AO00

Compal Secret Data

Compal Secret Data

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

USB2.0/USB3.0

USB2.0/USB3.0

USB2.0/USB3.0

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

1

31 50Tuesday, May 02, 201 7

31 50Tuesday, May 02, 201 7

31 50Tuesday, May 02, 201 7

1.A

1.A

1.A

5

USB3.0 (Port 1)

USB3_ATX_DRX_N1<10>

USB3_ATX_DRX_P1<10>

D D

USB3_ARX_DTX_N1<10>

USB3_ARX_DTX_P1<10>

USB3.0 (Port 2)

USB3_ATX_DRX_N2<10>

USB3_ATX_DRX_P2<10>

USB3_ARX_DTX_N2<10>

USB3_ARX_DTX_P2<10>

CS1

CS2

CS3

CS4

1 2

1 2

USB3_ARX_DTX_N1

USB3_ARX_DTX_P1

1 2

1 2

USB3_ARX_DTX_N2

USB3_ARX_DTX_P2

USB3_ATX_C_DRX_N1

.1U_0402_16V7K

USB3_ATX_C_DRX_P1

.1U_0402_16V7K

USB3_ATX_C_DRX_N2

.1U_0402_16V7K

USB3_ATX_C_DRX_P2

.1U_0402_16V7K

1 2

RS1 0_0402_5%RS@

1 2

RS2 0_0402_5%RS@

1 2

RS3 0_0402_5%RS@

1 2

RS4 0_0402_5%RS@

1 2

RS5 0_0402_5%RS@

1 2

RS6 0_0402_5%RS@

1 2

RS7 0_0402_5%RS@

1 2

RS8 0_0402_5%RS@

C C

CS91

@

10U_0603_6.3V6M

CC_FAULT#
CC_DEBUG#
CC_CHG
TYPEC_ 3A_1 P5A
CC_EN

+5VALW_CC+5VALW

1

1

CS5

2

2

10U_0603_6.3V6M

TYPEC_ 3A_1 P5A

1

+

CS6
150U_B2_6.3VM_R35M

@

SGA00009M00

2

EC_TYPEC_EN<24>

1 2

RS10 0_0402_5%

+5VALW_CC

+3VALW_CC

RS37 0_0402_5 %

CC_EN

1 2

RS@

CC_CHG
TYPEC_ 3A_1 P5A

CC_REF

1 2

RS39 100K_0402_1%

120mils 3A

JPS2

2

112

JUMP_43X79

1

@

+

CS90
150U_B2_6.3VM_R35M

SGA00009M00

2

+3VALW_CC

RPS1
100K_0804_8P4R_5%

CC_AUDIO#

1 8

CC_POL#

2 7

CC_UFP#

3 6

CC_LD_DET#

4 5

+3VALW_CC

1 2

RS13 100K_0402_5%

1 2

RS18 100K_0402_5%

1 2

RS20 100K_0402_5%

1 2

RS40 0_0402_5%@

1 2

RS41 0_0402_5%@

1 2

B B

TYPEC_ 3A_1 P5A#<24>

RS38 0_0402_5%RS@

USB3_ATX_L_DRX_N1

USB3_ATX_L_DRX_P1

USB3_ARX_L_DTX_N1

USB3_ARX_L_DTX_P1

USB3_ATX_L_DRX_N2

USB3_ATX_L_DRX_P2

USB3_ARX_L_DTX_N2

USB3_ARX_L_DTX_P2

+3VALW_CC+3VALW

10U_0603_6.3V6M

0.1U_0201_10V6K

1

1

CS7

2

2

US1

2

IN1

3

IN1

4

IN2

5

AUX

6

EN

7

CHG

8

CHG_HI

10

REF

9

GND1

12

GND2

TPS25 810R VCR_Q FN20_ 4X3

4

USB20_P5<10>

USB20_N5<10>

+5VALW_CC_VOUT

1

0.01U_0402_16V7K

1

CS9

2

FAULTb

LD_DETb

DEBUGb

AUDIOb

POLb
UFPb

powerpad

CS8
10U_0603_6.3V6M

CS10

2

JPS1

@

112

G

+3VALW_CC

12

RS42

61

S

JUMP_43X118

30V 10mOhm

QS1 AON6405L 1P DFN@

10K_0402_5%@

5

G

D

QS2A
2N7002KDW_SOT363-6

@

4

34

D

S

+5VALW_CC_VOUT

120mils 3A120mils 3A 120mils 3A

14

OUT

15

OUT

CC_FAULT#

1

CC_LD_DET#

20

CC1_VCONN

11

CC2_VCONN

CC1

13

CC2

CC_DEBUG#

16

CC_AUDIO#

17

CC_POL#

18

CC_UFP#

19

21

2

3 4

2

1
2
35

RS15

100K_0402_5%

@

QS2B
2N7002KDW_SOT363-6

@

MCM1012B900F06BP_4P
LS7

EMC@

SM070003Z00

+USB3_VCCC

12

12

RS12
1M_0402_5%@

3

2

1

For ESD request

DS1

EMC@

1

1

2

CC1_VCONN CC1_VCONN

TBTA_S BU1 TBTA_S BU1

USB20_P5_LUSB20_P5

12

USB20_N5_LUSB20_N5

USB3_ATX_L_DRX_P1 USB3_ATX_L_DRX_P1

USB3_ATX_L_DRX_N1 USB3_ATX_L_DRX_N1

USB20_P5_L USB20_ P5_L

USB20_N5_L USB20_N5_L

USB3_ARX_L_DTX_N2 USB3_ARX_L_DTX_N2

USB3_ARX_L_DTX_P2 USB3_ARX_L_DTX_P2

2

4

4

5

5

3

3

8

L05ESDL5V0NA-4 SLP2510P8

DS2

EMC@

1

1

2

2

4

4

5

5

3

3

8

L05ESDL5V0NA-4 SLP2510P8

DS3

EMC@

1

1

2

2

4

4

5

5

3

3

8

L05ESDL5V0NA-4 SLP2510P8

DS4

EMC@

1

1

2

2

4

4

5

5

3

3

8

L05ESDL5V0NA-4 SLP2510P8

+USB3_VCCC

CC1_VCONN/CC2_VCONN 20mils

USB3_ATX_L_DRX_P1
USB3_ATX_L_DRX_N1

12

CS11 0.47U_0402_25V6K

CC1_VCONN

USB20_P5_L
USB20_N5_L

TBTA_S BU1

12

CS14 0.47U_0402_25V6K

USB3_ARX_L_DTX_N2
USB3_ARX_L_DTX_P2

CS13

10U_0805_25V6K

12

MESC5V02BD03_SOT23-3

EMC@

2

3

DS5

1

9

10

8

9

7

7

6

6

9

10

8

9

7

7

6

6

USB3_ATX_L_DRX_N2USB3_ATX_L_DRX_N2

9

10

USB3_ATX_L_DRX_P2USB3_ATX_L_DRX_P2

8

9

7

7

6

6

USB3_ARX_L_DTX_P1USB3_ARX_L_DTX_P1

9

10

USB3_ARX_L_DTX_N1USB3_ARX_L_DTX_N1

8

9

7

7

6

6

JUSB4

A1

GND

A2

SSTXP1

A3

SSTXN1

A4

VBUS

A5

CC1

A6

DP1

A7

DN1

A8

SBU1

A9

VBUS

A10

SSRXN2

A11

SSRXP2

A12

GND

1

GND

2

GND

3

GND

4

GND

LOTES_AUSB0181-P001A

DC021702230

CONN@

CC2_VCONNCC2_VCONN

TBTA_S BU2TBTA_S BU2

+USB3_VCCC

B12

SSRXP1
SSRXN1

VBUS

SBU2

VBUS

SSTXN2

SSTXP2

GND

DN2

DP2

CC2

GND

GND
GND
GND
GND

B11
B10

B9

B8

B7
B6

B5

B4

B3
B2

B1

5
6
7
8

USB3_ARX_L_DTX_P1
USB3_ARX_L_DTX_N1

1 2

CS12 0.47U_0402_25V6K

TBTA_S BU2

USB20_N5_L
USB20_P5_L

CC2_VCONN

1 2

CS15 0.47U_0402_25V6K

USB3_ATX_L_DRX_N2
USB3_ATX_L_DRX_P2

Note : 2017 BIOS SPEC define DC mode 30% stop charge

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROP ERTY OF COM PAL EL ECTRONI CS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECT RONICS, INC.

5

4

3

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Tit le

Tit le

Tit le

Type-C (TPS25810)

Type-C (TPS25810)

Size

Size

Size

Date: Sheet of

Date: Sheet of

Date: Sheet of

Type-C (TPS25810)

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

32 50Tuesd ay, May 0 2, 2 017

32 50Tuesd ay, May 0 2, 2 017

32 50Tuesd ay, May 0 2, 2 017

1

1.A

1.A

1.A

ON/OFF BTN

+3VLP

ON/OFFBTN#<24>

Test Only

BOT

R534
100K_0402_5%

12

ON/OFFBTN#

34

SWK1
SKRPABE010_4P

12

EVT@

TP/B Conn.

ACES_5 1524-0 0801-00 1

SP01001A910

Lid Switch

(Hall Effect Switch)

LID_SW#<24>

LID_SW#

+3VLP

JLID1

1

1

2

2

3

3

4

4

5

GND

6

GND

ACES_5 1524-0 040N-00 1

CONN@

SP010022M00

TPM

+3VALW +3VALW_TPM +3VS +3VS_TPM

RW1
0_0603_5%

1 2

RS@

BADD

1AEh(write), AFh(read)

*

LPC_FRAME#<9,10,24>

1 2

LPC_AD0<10,24>
LPC_AD1<10,24>
LPC_AD2<10,24>
LPC_AD3<10,24>

LPC_CLK1<9,10>

LPC_RST#<9,24>
SERIRQ<10,24>

CLKRUN#<10>

10U_0603_6.3V6M

CW1

1

2

TPM@

SELECTION

RW310K_0402_5% @

CLKRUN PH 10K to +3VS at APU side

LPCPD# had internal PH

CW2

0.1U_0201_10V6K

1

near pin5

2

TPM@

29

TPM_BADD

LPC_CLK1

30

24
21
18
15

19
20
17
27
13
28

SA00008EL40, S IC NPCT650AB1YX QFN 32P TPM1.2
SA00008ELB0, S IC NPCT650AB2YX QFN 32P TPM1.2 FW 5.81.2.1
SA00008ELC0, S IC NPCT650ABBYX QFN 32P TPM2.0 FW 1.3.1.0

RW4 33_0402_5%

RW2
0_0603_5%

1 2

RS@

UW1

TPM@

XOR_OUT/SDA/GPIO0
SCL/GPIO1

3

GPX/GPIO2

6

GPIO3/BADD

LAD0/MISO
LAD1/MOSI
LAD2/SPI_IRQ#
LAD3

LCLK/SCLK
LFRAME#/SCS#
LRESET#/SPI_RST#/S RESET#
SERIRQ
CLKRUN#/GPIO4/ SINT#
LPCPD#

4

PP

5

TEST

NPCT650ABBYX_QFN32_5X5

1 2

@EMC@

1

2

TPM@

1

2

2

TPM@

CW4

0.1U_0201_10V6K

10U_0603_6.3V6M

CW3

1

near pin10, 19, 24

1

VSB

8

VDD1

14

VDD2

22

VDD3

2

NC1

7

NC2

10

NC3

11

NC4

25

NC5

26

NC6

31

NC7

9

GND1

16

GND2

23

GND3

32

GND4

33

PGND

12

Reserved

1 2

CW7 22P_0402_50V8J

@EMC@

CW5

0.1U_0201_10V6K

1

2

TPM@

+3VALW_TPM

+3VS_TPM

0.1U_0201_10V6K

CW6

TPM@

JTP1

GND
GND

CONN@

20mil 0.1A

1
2
3
4
5
6
7
8

+TP_VCC

1

TP_CLK

2

TP_DATA

3
4

I2C_ DAT

5

I2C_ CLK

6

TP_I2C_INT#

7

TP_SENOFF#

8
9
10

KB BackLight

KBL_EN<24>

1 2

R463 0_0402_5%

C663

0.1U_0201_10V6K

1 2

+5VS

@

@

TP_SENOFF# <24>

4.7K_0402_5%

U1

5

OUT

IN

GND

4

EN

SY6288C20AAC_SOT23-5

+3VS

R2507

TP_CLK
TP_DATA

OC

+TP_VCC

4.7U_0402_6.3V6M

C2563

1

2

+TP_VCC

12

12

R2509

4.7K_0402_5%

+5VS_BL

1

2

3

+5VS_BL

Security Classific ation

Security Classific ation

Security Classific ation

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL
AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

TP_3V_EN<24>

1

C3

0.1U_0201_10V6K

2

U13

1

OUT

2

GND

3

OC

SY6288C20AAC_SOT23-5

TP_CLK <24>
TP_DATA <24>

JBL1

1

1

2

2

3

3

4

4

5

GND

6

GND

ACES_5 1524-0 040N-00 1

CONN@

SP010022M00

JBL2

1

1

2

2

3

3

4

4

5

GND

6

GND

ACES_5 1524-0 040N-00 1

CONN@

SP010022M00

+3VALW

5

IN

EN

1U_0402_6.3V6K

C2562

2

4

1

TP_I2C_INT#

I2C_ CLK

I2C_ DAT

KB Conn.

Compal Secret Data

Compal Secret Data

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

I2C_ DAT
I2C_ CLK
TP_I2C_INT#_APU

TP_I2C_INT#

R2622 0_0402_5%
R2623 0_0402_5%

30
29
28
27

ON/OFFBTN#

26

KSO0

25

KSO1

24

KSO2

23

KSO3

22

KSO4

21

KSO5

20

KSO6

19

KSO7

18

KSO8

17

KSO9

16

KSO10

15

KSO11

14

KSO12

13

KSO13

12

KSO14

11

KSO15

10

KSO16

9

KSO17

8

KSI0

7

KSI1

6

KSI2

5

KSI3

4

KSI4

3

KSI5

2

KSI6

1

KSI7

Deciphered Date

Deciphered Date

Deciphered Date

1 2

D22
RB751V-40_SOD323-2

2

S

Q2509B

DMN66D0LDW-7_SOT363-6

1 2
1 2

KSI[0..7]

KSO[0..17]

GND2
GND1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

ACES_8 5201-2 805

CONN@

SP01000GO00

+TP_VCC

RP20

1 8
2 7
3 6
4 5

2.2K_0804_8P4R_5%

R633
10K_0402_5%

+TP_VCC

5

VGS,on = 1.2~2.0V

34

SGD

Q2509A

@

DMN66D0LDW-7_SOT363-6

G

61

D

@

KSI[0..7] <24>

KSO[0..17] <24>

JKB1

+3VS

+TP_VCC

12

PU at APU side.
Use 0ohm for BR/SR.

CAPS_LED#<24>

+5VS

NUM_LED#<24>

TP_I2C_INT# <24>

TP_I2C_INT#_APU <9>

APU_I2C 3_SCL <9>

APU_I2C 3_SDA <9>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

To EC

To APU

To APU

JKB2

ON/OFFBTN#

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8

KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

KSI0

KSI1

KSI2

KSI3

KSI4

KSI5

KSI6

KSI7

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

ACES_5 0596-0 3201-P0 1

CONN@

SP010017J00

1 2

R3982 1K_0402_5%

1 2

R3983 0_0402_5%@

1 2

R3984 0_0402_5%@

1 2

R3985 1K_0402_5%

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

KB/TP/TPM/LID

KB/TP/TPM/LID

KB/TP/TPM/LID

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

33

27

GND

34

28

GND
29
30
31
32

33 50Tuesday, May 02, 2017

33 50Tuesday, May 02, 2017

33 50Tuesday, May 02, 2017

1.A

1.A

1.A

A

B

C

D

E

HD Audio Codec

SM01000EJ00 3000mA 220ohm@100mhz DCR 0.04

LA1

+VDDA

HCB2012KF-221T30_0805

1 1

Pin9 need to matching with SOC HDA
interface.

CA32
10P_0402_50V8J

2 2

GND

1 2

HP_PLUG#<31>

+1.8VS

@EMC@

+3VS

RA2 0_0402_5%@

RA5 0_0402_5%@

DMIC_CLK

+3VS

GND & GNDA moat

Pin20
ALC283 : NC
ALC255/256/233 : Power for combo jack depop
circuit at system shutdown mode

3 3

Pin4
ALC283 : DVSS
ALC255/256/233 : DC DET (For Japen customer only)

DOS mode

EC_BEEP#<24>

OS mode

APU_SP KR<9>

12

12

12

Combo MIC

DMIC_CLK_R<27>

EC_MUTE#<24>

HDA_RST#_AUDIO<9>

10mil

RA13 200K_0402_1%
RA14 100K_0402_1%

+3VS_DVDD

RA21
22K_0402_5%

12

RA22
22K_0402_5%

12

40mil

Close codec

+3VALW

BEEP#_R

DMIC_DATA<27>

GNDA

CA28

100P_0402_50V8J

@EMC@

10U_0603_6.3V6M

RING2
SLEEVE

CA1

12

Place near Pin41

CA10

10U_0603_6.3V6M

+MICBIAS

1 2

RA34 BLM15PX221SN1DEMC@

HDA_RST#_AUDIO

12
12

RA16 0_0402_5%@

1

4.7K_0402_5%

2

1 2

GND

GND & GNDA moat

JPA2
JUMP_43X39

2

112

4 4

@

JPA4
JUMP_43X39

112

@

CA31

.1U_0402 _16V7K

1 2

1 2

RA25 0_0402_5%@EMC@

2

@EMC@

JPA3
JUMP_43X39

2

112

@

JPA5
JUMP_43X39

2

112

@

JPA6 JUMP_4 3X39

2

112

@

JPA7 JUMP_4 3X39

2

112

@

GNDAGNDGND GNDA

A

40mil

CA2

0.1U_0201_10V6K

2

1

GND GND

CA5 10U_0603_6.3V6M

20mil

Place near Pin1

EC_MUTE#

1

2

1 2

RA23

Place near Pin46

1 2

12

CA6 0.1U_0201_10V6K

Place near Pin9

1

2

+1.8VS_DVDDIO

+3VS_DVDD

0.1U_0201_10V6K
CA11

1

2

GND

LINE1-L
LINE1-R

+MICBIAS

DMIC_DATA
DMIC_CLK

MONO_IN

SENSE_AHP_PLUG#

CA19

2.2U_0402_6.3V6M

22
21

24
23

17
18

31
30

2
3

47
11

12

13
14

37
35

36

20

12

19

CA2210U_0603_6.3V6M

4

49

GND

CA27

.1U_0402 _16V7K

MONO_IN

1 2

10/20 vendor review change to 0.1uF.

CA3

0.1U_0201_10V6K

2

@

1

UA1

LINE1-L(PORT-C-L)
LINE1-R(PORT-C-R)

LINE2-L(PORT-E-L)
LINE2-R(PORT-E-R)

MIC2-L(PORT-F-L) /RING2
MIC2-R(PORT-F-R) /SLEEVE

LINE1-VREFO-L
LINE1-VREFO-R

GPIO0/DMIC-DATA
GPIO1/DMIC-CLK

PDB
RESETB

PCBEEP

SENSE A
SENSE B

CBP
CBN

CPVDD

CPVREF

MIC-CAP

DVSS
Thermal PAD

ALC255 -CG_MQF N48_6X6

SA000082700

+PVDD_HDA

+AVDD1_HDA

GND

20mil

1 2

RA1

@

CA9

GND

GNDA

Place near Pin26

+1.8VS_VDDA

GNDA

26

41

9

1

DVDD

PVDD1

DVDD-IO

46

AVDD1

PVDD2

40

AVDD2

SPK-OUT-L-

SPK-OUT-L+

SPK-OUT-R+

SPK-OUT-R-

HPOUT-L(PORT-I-L)

HPOUT-R(PORT-I-R)

SYNC
BCLK

SDATA-OUT

SDATA-IN

SPDIF-OUT/GPIO2

MONO-OUT

MIC2-VREFO

LDO3-CAP
LDO2-CAP
LDO1-CAP

VREF

JDREF
CPVEE

AVSS1
AVSS2

Place near Pin40

43
42

45
44

32
33

10
6

5
8

48

16

29

7
39
27

28

15
34

25
38

10U_0603_6.3V6M

CA8

0.1U_0201_10V6K

1

12

@

2

CA12

0.1U_0201_10V6K

CA13

1

12

2

@

SPKL­SPKL+

SPKR+
SPKR-

HP_LEFT
HP_RIGHT

HDA_SYNC_AUDIO
HDA_BITCLK_AUDIO

1 2

@EMC@

RA10 0_0402_5%

HDA_SDOUT_AUDIO
HDA_SDIN0_AUDIO

CODEC_VREF

CPVEE

1

2

0_0603_5%

GND & GNDA moat

RA6

10U_0603_6.3V6M

0_0402_5%

1 2

CA15

22P_0402_50V8J

1 2

RA33
33_0402_5%

+MIC2_VREFO

12

12

12

1 2

RA15
100K_0402_5%

CA26

2.2U_0402_6.3V6M

GND

GNDA

Pin15
ALC283 : Ref. Resistor for Jack Detect
ALC255/256/233 : Jack Detect for SPDIF-OUT and SPK-OUT port

B

C

(output = 300 mA)

+5VS

40mil

CA4

.1U_0402_16V7K

1

2

@EMC@

+VDDA

12

@

HDA_SYNC_AUDIO <9>

HDA_BITCLK_AUDIO <9>

@EMC@

CA1810U_0603_6.3V6M

CA2010U_0603_6.3V6M

CA2110U_0603_6.3V6M

JPA1

112

JUMP_43X79

@

GND & GNDA moat

+1.8VS

GND

HDA_SDOUT_AUDIO <9>

HDA_SDIN0 <9>

GND

GNDA

GNDA

10mil

CA23

0.1U_0201_10V6K

@

Place near pin28

2

1

2

40mil

4.75V

2.2U_0402_6.3V6M

+VDDA

Int. Speaker Conn.

SPKR+
SPKR­SPKL+
SPKL-

EMI request for solve EMI noise, SM01000OW00.

CA24

1

2

Headphone Out

GNDA

HP_RIGHT HPOUT_R_1

LINE1-L

LINE1-R

+MICBIAS

DA5

1

BAT54A-7-F_SOT23-3

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF CO MPAL ELECT RONIC S, INC. AN D CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF CO MPAL ELECT RONIC S, INC. AN D CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF CO MPAL ELECT RONIC S, INC. AN D CON TAINS CONFIDENTIAL
AND TRAD E SECRET INFORMATION. THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D

AND TRAD E SECRET INFORMATION. THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D

AND TRAD E SECRET INFORMATION. THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

1 2

LA2EMC@ PBY160808T-121Y-N_2P

1 2

LA3EMC@ PBY160808T-121Y-N_2P

1 2

LA4EMC@ PBY160808T-121Y-N_2P

1 2

LA5EMC@ PBY160808T-121Y-N_2P

TVNST52302AB0_SOT523-3

2.2K_0402_5%

1 2

RA24 0_0603_5%@

1 2

RA27 0_0603_5%@

1 2

CA29 4.7U_0402_6.3V6M

1 2

CA30 4.7U_0402_6.3V6M

2

3

40mil

2

3

2

@EMC@

DA1

1

GND GND

+MIC2_VREFO

12

12

RA19

RA29

4.7K_0402_5%

RA32

4.7K_0402_5%

RA20

2.2K_0402_5%

HPOUT_L_1HP_LEFT

12

12

Title

Title

Title

Size

Size

Size

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

SPK_R+
SPK_R­SPK_L+
SPK_L-

3

GND
@EMC@

DA2
TVNST52302AB0_SOT523-3

1

SLEEVE

RING2

HD Audio Codec ALC255

HD Audio Codec ALC255

HD Audio Codec ALC255

Document Number Rev

Document Number Rev

Document Number Rev

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

SLEEVE <31>
RING2 <31>

HPOUT_L_1 <31>

HPOUT_R_1 <31>

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

JSPK1

1

1

2

2

3

3

4

4

5

G1

6

G2

ACES_5 0278-0 0401-00 1

CONN@

SP02000RR00

E

1.A

1.A

34 50Tuesday, May 02, 2017

34 50Tuesday, May 02, 2017

34 50Tuesday, May 02, 2017

1.A

5

FAN Conn

4

3

2

1

80mil

+5VS

D D

@EMC@

1000P_0402_50V7K

C C

B B

1

CF2

2

2

1

1 2

RF1 0_0603_5%RS@

1 2

RF7 0_0603_5%RS@

CF1

4.7U_0402_6.3V6M

+VCC_FAN1

+VCC_FAN2

FAN_SPEED1<24>

FAN_SPEED2<24>

+3VS

12

RF2
10K_0402_5%

1

CF3
1000P_0402_50V7K

@EMC@

2

+3VS

12

RF5
10K_0402_5%

1

CF10
1000P_0402_50V7K

@EMC@

2

40mil

+VCC_FAN1
FAN_SPEED1

FAN_PWM1<24>

FAN_PWM2<24>

FAN_PWM1

40mil

+VCC_FAN2
FAN_SPEED2
FAN_PWM2

JFAN1

1

1

2

2

3

3

4

4

5

G1

6

G2

ACES_50278-00401-001

CONN@

SP02000RR00

JFAN2

1

1

2

2

3

3

4

4

5

G1

6

G2

ACES_50278-00401-001

CONN@

SP02000RR00

Screw Hole

H34

H3

H4

H_3P0

H_3P0

H_3P0

1

1

1

@

@

@

CPU Hole

H14

H13

H15

H_3P8

H_3P8

H_3P8

1

1

1

@

@

@

H23

H_2P7X2P0N

Reset Circuit

BI_GATE PH to +RTCVCC at PWR s ide

H35

H_2P7X2P0N

@

@

1

1

H10

H_6P0

GPU Hole NGFF Stand-Off

H_3P8

H_2P0N

@

H39

H_6P4

1

@

@

H27

H38

H26

H_3P8

H_3P8

1

1

@

@

@

H25

1

BI_GATE<39>

H33

H_2P5

BI_GATE

H_3P2

1

@

H29

H30

H_3P2

1

@

@

Q2519A

1

1

DMN66D0LDW-7_SOT363-6

H37

H36

H_7P3

H_7P3

1

1

@

@

H31

H6

H_4P0

H_4P0

1

1

@

@

R349
100K_0402_5%

BI_GATE#

C347

0.1U_0201_10V6K

H32

1

@

G

2

R3925 0_0402_5%@

R3924 0_0402_5%RS@

61

D

S

Q2519B
DMN66D0LDW-7_SOT363-6

H5

H_4P0

H_4P0

1

1

@

+3VLP

1 2

34

1

D

G

5

S

2

PCB Fiducial Mark

1 2

1 2

FD1

@

1

FIDUCIAL_C40M80

FD3

@

1

FIDUCIAL_C40M80

FD2

@

1

FIDUCIAL_C40M80

FD4

@

1

FIDUCIAL_C40M80

MAINPWON <24,39,41>

EC_RST# <24>

Reset But t on

Reset But t on

SWG2

1 2

3 4

SKRPABE010_4P

A A

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPET ENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPET ENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAIN S

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAIN S

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAIN S
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2017/04/18 2019/ 04/18

2017/04/18 2019/ 04/18

2017/04/18 2019/ 04/18

Compal S ecret Data

Compal S ecret Data

Compal S ecret Data

Deciphered Date

Deciphered Date

Deciphered Date

BI_GATEBI_GATE

2

BI SW

SWG1

3

4

ATE-2-V-TR_4P

H : 3.8mm

Release : Bat t ery Off
Push : Bat t er y ON

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

FAN/BATT RESET_DEGUB SW

FAN/BATT RESET_DEGUB SW

FAN/BATT RESET_DEGUB SW

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

BI_S <39>

35 50Tuesday, May 02, 2017

35 50Tuesday, May 02, 2017

1

35 50Tuesday, May 02, 2017

1.A

1.A

1.A

5

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Request

Request

Item

Item Issue Description

ItemItem

Page#

Page#Page#

Date

DateDate

RequestRequest
Owner

Owner

OwnerOwner

102/03

D D

2

02/22

C C

02/233

02/244

03/015

4

Issue DescriptionDate

Issue DescriptionIssue Description

1. update SR PN

2. update VRAM strap (add MICRON)

3. R4000 --> @, R3999 --> RX560@, add R4002 for UMA@

4. QZ1 change to SB000013K00

5. H29,H30 change to H_3P2

6. CD11,CD12,CD13,CD14,CD15,CD24,CD27,CD28,R3979 change to VX@

7. change D103 to SC600000B00,add R4003

8. remove JHDD1

9. JPA8 change to JPS2

10.Q84,Q91,Q2511,QL1 change to SB00000PU10

1. Sync QL1 Symbol to Q84,Q91,Q2511

2. change SB00000PU10 to SB00000PU00

3. remove R4002 with UMA@, change R4002 to RX540@

4. add CV2722 and unpop at VGA_ON_B

5. update UV56 PCB Footprint to from SOP8207mil to SOP8-150mil

6. RO19 change to pop

7. CS25 change to B2 footprint (SGA00009M00)

8. Q91,R1563 change to pop

9. R1562 pop with 100k,R1564 pop with 12k for DVT Board ID

10.RV440,RV422 change to @, RV423,RV439 change to DIS@ (VBIOS in SBIOS)

11.Combine 02/22 Power

12.C794,C795 change to 4.7pF (SE07147AC80)

13.CL18,CL19 change to 15pF (SE071150J80),RL14 change to 1k (SD028100180)

1. Change to 0-ohm Short : RV1632,RO3,RM9,R3924,R683,RD8,RD9,RD10,RD246,RD252,RD225,RD250,RV1640,RS37,RS38

2. RS20 change with 100k

3. RA34 change with bead (SM01000NY00)

1. CLRP1 change to 0603 footprint

2. UV56 change to @

3. RV1632 change to 0-ohm

4. Add R106 EMC@

5. Combine Power 02/24

1. 0-ohm short:R106,R107,R108,R3963,R3964,RS1,RS2,RS3,RS4,RS5,RS6,RS7,RS8

2. CV2723 add to @

3. update JUSB4 Symbol (DC021702230)

4. L2509,L2510 add to EMC@

3

Page 1

Page 1

Page 1Page 1

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

2

1

Rev.Page#

Rev.Rev.

1.0

1.0

1.0

1.0

1.0

03/036

B B

03/078

03/089

1. CS90 add to pop, CS91 add to @, CS6 change to @

2. combine power 0303

1. C2735 add to @03/067

1. R4002 add to UMA@

2. RO17,RO21 pop with PAR@

3. R1564 add to VX@ with 27k (SD034270280)

4. update board ID table for VX

5. update UV1 PN, add DAZ PN

1. CD20,CD84 change to VX@

2. CM15 pop with 100pF (SE071101J80)

3. RM22 change to VX@

1.0

1.0

1.0

1.0

1. RM22 change to pop03/099 1.0

03/1110

A A

03/1311

5

1. Add HDMI Redriver circuits (PS8409)

2. combine power 0310

3. L11 change to pop (remove NON2S@)

1. add 35W APU PN

2. U2615 change to SA0000AC310

3. update PCB PN,DAZ PN

4. C2748 add to pop

4

Security Classific ation

Security Classific ation

Security Classific ation

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL
AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

1.0

1.0

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

HW PIR (1/2)

HW PIR (1/2)

HW PIR (1/2)

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

36 50Tuesday, May 02, 2017

36 50Tuesday, May 02, 2017

36 50Tuesday, May 02, 2017

1

1.A

1.A

1.A

5

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Request

Request

Item

Item Issue Description

ItemItem

Page#

Page#Page#

Date

DateDate

RequestRequest
Owner

Owner

OwnerOwner

4

Issue DescriptionDate

Issue DescriptionIssue Description

3

Page 2

Page 2

Page 2Page 2

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

2

1

Rev.Page#

Rev.Rev.

1. R3979,CD11,CD12,CD13,CD14,CD15,CD27,CD28,CD24,CD20,CD84 change to pop without VX@.03/1712

D D

13

04/10

1. U4 change main source to S TR AO4354 1N SOIC-8 (SB00000ZN00)

2. Combine power schematic with 0407

1.0

1.A

1.A1. L2512,L2513,L2514,L2515 add to pop with 90-ohm choke (SM070003V00)04/1114

1. R1564 change to 15k_0402_1% (SD034150280) for EA, 33K_0402_1% (SD034330280) for Vx

15 1.A

04/18

2. PCB change to Rev1A (DAZ21800201)

3. R4007 change to pop

1.A

C C

1.A

B B

A A

Security Classific ation

Security Classific ation

Security Classific ation

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PR OPERT Y OF C OMPAL EL ECTRO NICS, INC. AND CO NTAINS CONFIDENTIAL
AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND T RADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISC LOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW PIR (2/2)

HW PIR (2/2)

HW PIR (2/2)

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

C5V08/D5PR8_LA-E903PR1A

1

37 50Tuesday, May 02, 2017

37 50Tuesday, May 02, 2017

37 50Tuesday, May 02, 2017

1.A

1.A

1.A

A

B

C

D

1 1

@

ACES_50 299-00601 -001

1

1

2

2

3

3

4

4
G7
G8

PJP101

5

5

6

6

7
8

2 2

3 3

+19V_ADPIN

PR102

4.7_1206_5%

1 2

EMI@

PC103

0.1U_0603_25V7K

1 2

+19V_ADPIN

12

EMI@

100P_0603_50V8

PC101

PL101

EMI@

5A_Z120_25M_0805_2P

1 2

PL102

EMI@

5A_Z120_25M_0805_2P

1 2

+19V_VIN

12

PC102

EMI@

1000P_0603_50V7K

PR103

4.7_1206_5%

1 2

EMI@

PC104

0.1U_0603_25V7K

1 2

PR101

@

0_0603_5%

+3VLP

4 4

A

1 2

+CHGRTC

Security Classif ication

Security Classif ication

Security Classif ication

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, I NC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOS ED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOS ED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOS ED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DCIN

DCIN

DCIN

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

D

38 50Tuesday, May 02, 201 7

38 50Tuesday, May 02, 201 7

38 50Tuesday, May 02, 201 7

1.0

1.0

1.0

A

PR201 100_0402_1%

1 2

PR202 100_0402_1%

1 2

PR203

6.49K_0402_1%

@

PJP201

1

1

GND

GND

2
3
4
5
6
7
8

2
3
4
5
6
7
8
9
10

EC_SMB_DA1-1
EC_SMB_CK1-1
BATT_TS
BATT_B/I

1 1

CVILU_CI9908M2HR0-NH

+17.4V_BATT+

12

PC201

EMI@

2 2

1000P_0603_50V7K

1 2

1 2

PR204 1K_0402_1%

BI_GATE<35>

PL201

EMI@

5A_Z120_25M_0805_2P

1 2

1 2

PL202

EMI@

5A_Z120_25M_0805_2P

+3VLP

BATT_TEMP < 24>

PR208
100K_0402_5%

+17.4V_BATT

12

PC203

@EMI@

1000P_0603_50V7K

+RTCVCC

12

2

G

B

EC_SMB_DA1 <24,40>

EC_SMB_CK1 <24,40>

13

D

PQ201
LBSS139LT1G 1N SOT-23-3

S

12

PR212

@

0_0402_5%

BI_S <35>

C

D

+3VLP

12

PC202

@

<45,47>

MAINPWON<24,35,41>

For KB9022
OTP

@

100K_0402_1%

MAINPWON

12

PR207

0.1U_0603_25V7K

@

1

VCC

2

GND

3

OT1

4

OT2

G718TM1U_S OT23-8

RecoveryActive

PU201

10K_0402_1%

TMSNS1

RHYST1

TMSNS2

RHYST2

12

PR205

@

8

7

6

5

@

47K_0402_1%

12

12

12

PR209

For KB9012
sense 20mΩ

PR206

@

10K_0402_1%

PH201

@

100K_0402_1%_NCP15WF104F03RC

RecoveryActive

92C, 1V 56C, 2.VVCIN0 _PH(V)

PH202(o hm) 7.309 2K 26 .11K

SR 45W

BR 65W

58.5W, 0.61V

84.5W, 0.61V

58.5W, 0.61V

84.5W, 0.61V

PH202 under CPU botten side :
CPU thermal protection at 96 degree C ( shutdown )
Recovery at 56 degree C

2013/10/02

3 3

Add for ENE9022 Battery Voltage drop detection.
Connect to ENE9022 pin64 AD1.

Reserve for 2-cell design

9022_PH1<24>

+EC_VCCA

12

PR210

16.9K_0402_1%

65W@

PR211

4.53K_0402_1%

ADP_I <24,40>

12

PR211

135W@

20K_0402_1%

+19VB_5V

12

12

PR213

@

80.6K_0402_1%

PR214

@

0_0402_5%

1 2

PC204

@

0.1U_0402_25V6

4 4

1 2

12

PR216

@

10K_0402_1%

A

VCIN1_BATT_DROP <24>

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPET ENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPET ENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAIN S

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAIN S

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAIN S
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/04/18 2019/04/ 18

2017/04/18 2019/04/ 18

2017/04/18 2019/04/ 18

100K_0402_1%_B25/50 4250K

B value:4250K± 1%

Compal S ecret Data

Compal S ecret Data

Compal S ecret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

PH202

12

ECAGND

@

@

@

PR217

0_0402_5%

T1

T2

12

PR215
10K_0402_1%

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

9022_VCIN <24>

BATTERY CONN / OTP

BATTERY CONN / OTP

BATTERY CONN / OTP

39 50Tuesday, May 02, 2017

39 50Tuesday, May 02, 2017

D

39 50Tuesday, May 02, 2017

1.0

1.0

1.0

A

B

C

D

Protection for reverse input

PQ301
2N7002KW_SOT323- 3

2

G

1
2
3

PQ302

4

ACDRV_CHG_R

PR303
3M_0402_5%

1 2

12

PR302
1M_0402_5%

1 2

1 1

Need check the SOA for inrush

+19V_VIN

5

12

AON6366E_DFN5X6-8-5

PC301

2200P_0402_50V7K

2 2

PR301@

0_0402_5%

Vgs = 20V

13

D

Vds = 60V
Id = 250mA

S

12

PC302

0.1U_0402_25V6

12

PR309

4.12K_0603_1%

12

For 4S per cell 4.35V battery

ACDET_CHG

2

13

D

PQ308
2N7002KW_SOT323- 3

S

12

PR316
2M_0402_1%

12

PR320
1_0402_5%

13

PQ307
LTC015EUBFS8TL_UMT3F

3 3

PR322
100K_0402_1%

BATT_4S<24>

SUSP#<24,25,42>

4 4

1 2

2

G

A

max Power loss 0.22W for 90W,
(PR303 need change 10m ohm);

0.12W for 65W system
CSR rating: 1W
VACP-VACN spec < 80.64mV

Rds(on) typ=15.8mohm max
Vgs=20V
Vds=30V
ID= 10.5A (Ta=70C)

+3VLP

+19V_P2+19V_P1

PC308

0.1U_0402_25V6

+19V_VIN

12

1 2

PR315
100K_0402_1%

1
2
3 5

4

PQ303
AON7506_DFN33-8-5

PR310

4.12K_0603_1%

ACIN<24>

Vin Dectector

Min. Typ Max.
L-->H 17.16V 17.63V 18.12V
H-->L 16.76V 17.22V 17.70V

VILIM = 20*ILIM*Rsr
ILIM = 3.3*100/(100+316)/20/0.01
= 3.966 A

PR304

0.01_1206_1%

1

2

1 2

PC309

0.1U_0402_25V6

PR321

422K_0402_1%

1 2

PC321

2200P_0402_50V7K

ACP_CHG

CMSRC_CHG

ACDRV_CHG

12

Isat: 4A
DCR: 27mohm

4

3

12

ACN_CHG

1U_0603_25V6K

21

12

PR323

66.5K_0402_1%

B

+19V_VIN

VF = 0.5V

2

3

1
12

PC310

0.1U_0402_25V6
PR306

VCC_CHG

PC312

1 2

20

PU301

PAD

VCC

1

ACN

2

ACP

3

CMSRC

BQ24735RGRR_QFN20_3P5X3P5

4

ACDRV

5

ACOK

ACDET6IOUT7SDA8SCL9ILIM

ACDET_CHG

12

PC322

100P_0402_50V8J

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE T RANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE T RANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE T RANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PJ301

@

2

112

JUMP_43X79

PD301
BAS40CW_SOT323-3

PC311

0.047U_0402_25V7K

BST_CHG_R

1 2

12

10_1206_1%

PR307

2.2_0603_5%

LX_CHG

UG_CHG

BST_CHG

19

17

18

BTST

HIDRV

PHASE

IOUT_CHG

1 2

PR324

499_0402_1%

Issued Date

Issued Date

Issued Date

+19VB

+19VB_CHG

12

12

VF = 0.37V

12

PD302
RB751V-40_SOD323-2

UG_CHG

REGN_CHG

1U_0603_25V6K

16

REGN

LODRV

GND

SRP

SRN

BATDRV

10

ILIM_CHG

12

PR318

100K_0402_1%

12

PC323

2.2U_0402_6.3V6M

12

PC304

PC303

10U_0805_25V6K

10U_0805_25V6K

Rds(on) = 30mohm max
Vgs = 20V
Vds = 30V
ID = 7A (Ta=70C)

PR308

@

1 2

0_0402_5%

1 2

PC313

LG_CHG

15

14

PR313

10_0603_1%

SRP_CHG

1 2

13

PR314

6.8_0603_1%

SRN_CHG

1 2

12

BATDRV_CHG

11

PR319
316K_0402_1%

1 2

12

PC320

0.01U_0402_25V7K

EC_SMB_CK1 <24,39>

EC_SMB_DA1 <24,39>

ADP_I <24,39>

Close EC chip

CZ@ PR320 change to 499ohm for prochot delay

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

12

12

PC324

PC305

0.1U_0402_25V6

2200P_0402_25V7K

EMI@

EMI@

UG_CHG_R

PQ306
AON7506_DFN33-8-5

SRP_CHG_R

SRN_CHG_R

PC319

0.1U_0603_16V7K

+3VLP

Compal Secret Data

Compal Secret Data

Compal Secret Data

PC306

0.1U_0402_25V6

@EMI@

3 5

241

3 5

241

12

Deciphered Date

Deciphered Date

Deciphered Date

C

BATDRV_CHG

PQ305
AON7506_DFN33-8-5

LX_CHG LX_CHG_R

7X7X3
Isat: 3.8A

4.7UH_5.5A _20%_7X7X3_M

12

PR312

4.7_1206_5%

@EMI@

12

PC318@EMI@

680P_0402_50V7K

PL302

1 2

Rds(on) typ=15.8mohm max
Vgs=20V
Vds=30V
ID= 10.5A (Ta=70C)

PQ304
AON7506_DFN33-8-5

PR305

4.12K_0603_1%

1 2

4

BATDRV_CHG_R

Power loss: 0.32W for 3.5A
CSR rating: 1W
VSRP-VSRN spec < 81.28mV

PR311

0.01_1206_1%

1

2

SRP_CHG_R

12

PC316

0.1U_0402_25V6

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

1
2
35

12

PC307

0.01U_0402_50V7K

4

3

12

SRN_CHG_R

12

PC317

0.1U_0402_25V6

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

12

PC314

10U_0805_25V6K

CHARGER

CHARGER

CHARGER

D

PC315

10U_0805_25V6K

40 50Tuesday, May 02, 2017

40 50Tuesday, May 02, 2017

40 50Tuesday, May 02, 2017

+17.4V_BATT

1.0

1.0

1.0

A

B

C

D

E

1 1

PC402

@

100P_0402_50V8J

1 2

PR402

13.7K_0402_1%

1 2

PR403

20K_0402_1%

1 2

PR405

71.5K_0402_1%

PR408

LG_3V

+3VLP

1 2

+19VB

1 2

PR407
100K_0402_1%

LX_3V

BST_3V

UG_3V

10

PJ402

+19VB

2 2

3 3

@

JUMP_43X79

112

+3VALWP

2

12

12

PC407

0.1U_0402_25V6

@EMI@

PC409

PC408

EMI@

2200P_0402_50V7K

12

12

PC421

10U_0805_25V6K

10U_0805_25V6K

PL402

3.3UH_6.3A_20%_7X7X3_M

1

+

PC413

2

220U_6.3V_ESR18M_6.3X4.5

+19VB_3V

PQ402

AON7934_DFN3X3A8-10

12

12

PR410

@EMI@

4.7_1206_5%

12

PC416

@EMI@

680P_0603_50V8J

POK need pull high, it
will pull high on VS
transfer circuit

1

4

3

2

D1

D1

D1

G1

0.1U_0402_25V6

D110D2/S1

S2

5

9

S2

S2

G2

6

7

8

3V_EN<24>

SPOK<24>

PC410

1 2

BST_3V_R

2.2_0603_5%

1 2

VFB=2V

6

EN2

7

PGOOD

8

PHASE2

9

BOOT2

UGATE2

PR412

2.2_1206_1%

1 2

CS2_3V

5

11

+3VLP

CS2

LGATE2

PC418

@

1U_0603_25V6K

FB_3V

4

12

VIN_3/5V

12

FB2

VIN

PC401
1U_0402_10V6K

1 2

VFB=2V

FB_5V

2

3

FB1

LDO3

BYP1

LDO5

14

13

+5VLP

12

PC419
1U_0402_10V6K

PC403

@

100P_0402_50V8J

1 2

PR401

30.9K_0402_1%

1 2

PR404

20K_0402_1%

1 2

PR406
107K_0402_1%

1 2

CS1_5V

PU401

21

1

RT6575DGQW(2)_WQFN20_3X3

CS1

GND

20

EN1

19

VCLK

18

PHASE1

17

BOOT1

16

UGATE1

LGATE1

15

+5VALWP

5V_EN

LX_5V

BST_5V

UG_5V

Output capacitor ESR need follow
below equation to make sure feed back
loop stability
ESR=20mV*L*fsw/2V

+19VB

PR409

2.2_0603_5%

1 2

0.1U_0402_25V6

BST_5V_RLX_3V LX_5V

LG_5V

PC411

1 2

PJ401

@

JUMP_43X79

112

2

1

2

D1

G1

9

D2/S1

S2

G2

7

8

+19VB_5V

PC404

@EMI@

PQ401
AON7934_DFN3X3A8-10

4

3

D1

D1

10

D1

S2

S2

6

5

12

12

PC405

0.1U_0402_25V6

EMI@

2200P_0402_50V7K

3.3UH_PCMB103T-3R3MS_9A_20%

12

PR411

4.7_1206_5%

@EMI@

12

PC417

680P_0603_50V8J

@EMI@

12

PL401

12

PC422

PC406

10U_0805_25V6K

10U_0805_25V6K

12

1

+

PC414

2

220U_6.3V_ESR18M_6.3X4.5

+5VALWP

Due to buyer command.
PC401,PC419 need change to SE00000QL10.

PR413

Because 0603 change to 0402, PVT need change footprint.

2.2K_0402_5%

EC_ON<24>

MAINPW ON<24,35,39>

4 4

A

1 2

PR414

@

0_0402_5%

1 2

12

PR415

1M_0402_1%

5V_EN

12

PC420

4.7U_0402_6.3V6M

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

+3VALWP +3VALW

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PJ403

@

2

112

JUMP_43X118

PJ404

@

2

112

JUMP_43X118

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Custom

Custom

Custom

Compal Electronics, Inc.

+3VALW/+5VALW

+3VALW/+5VALW

+3VALW/+5VALW

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

E

+5VALW+5VALWP

1.0

1.0

41 50Tuesday, May 02, 2017

41 50Tuesday, May 02, 2017

41 50Tuesday, May 02, 2017

1.0

5

4

3

2

1

Pin19 need pull separate from +1.5VP.
If you have +1.5V and +0.75V sequence question,

PJ504

D D

+19VB

@

112

JUMP_43X79

2

12

PC525

EMI@

0.1U_0402_25V6

1UH_6.6A_20%_5X5X3_M

+1.2VP

12

12

C C

12

PC512

PC511

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

PC513

22U_0603_6.3V6M

12

PC515

PC514

22U_0603_6.3V6M

PC516

22U_0603_6.3V6M

22U_0603_6.3V6M

12

PC501

0.1U_0402_25V6

@EMI@

PL503

1 2

@EMI@

4.7_1206_5%

@EMI@

680P_0402_50V7K

+19VB_1.5V

12

PC502

EMI@

PR503

PC517

2200P_0402_50V7K

12

PC503

10U_0805_25V6K

12

AON7506_DFN3X3-8-5

12

PR501

PR502

25.5K_0402_1%

1 2

12

PC510
1U_0402_10V6K

2.2_0603_5%

1 2

PC508
1U_0402_10V6K

1 2

VDD_1.5V

PR505

2.2_0603_5%

LG_1.5V

CS_1.5V

1 2

PR504

5.1_0603_5%

1 2

BST_1.5V_R

12

PC504

10U_0805_25V6K

PQ501

PQ502

5

4

AON7408L_DFN8-5

123

5

12

0.1U_0603_25V7K

PC505

+5VALW

4

123

+5VALW

H/S AON7408 Rds(on) :typ:27mOhm, max:34mOhm

Mode Level +0.75VSP VTTREF_1.5V
S5 L off off
S3 L off on
S0 H on on

Note: S3 - sleep ; S5 - power off

B B

A A

+3VALW

SYSON

PJ505

@

112

JUMP_43X39

PR515

@

0_0402_5%

1 2

2

VIN_2.5VVIN_2.5V

12

PC521

4.7U_0402_6.3V6M

12

PC520

@

0.1U_0402_16V7K

EN_2.5V

12

Idsm(TA=25)=7.5A, Idsm(TA=70)=5.5A

L/S AON7506 Rds(on) :typ:13mOhm, max:15.8mOhm
Idsm(TA=25)=12A, Idsm(TA=70)=10.5A

Choke: 7x7x3
Rdc=8mohm(Typ), 11mohm(Max)

Switching Frequency: 530kHz
Ipeak=11.5A
Iocp~13.8A
OVP: 110%~120%
VFB=0.75V, Vout=1.515V

+5VALW

Due to buyer command.
PC508,PC510 need change to SE00000QL10.
Because 0603 change to 0402, PVT need change footprint.

5
6
7
8

PR512

21.5K_0402_1%

PR513

10K_0402_1%

PR511

1M_0402_5%

12

PC524

1U_0402_6.3V6K

4

VDD

3

VIN

2

EN

1

PGOOD

G9661MF11U _SO8PU502

NC

VOUT

ADJ

GND

GND

9

FB_2.5V

12

Rup

12

Rdown

12

12

PC522

PC523

22U_0603_6.3V6M

0.01U_0402_25V7K

+19VB_1.5V

SYSON<24>

SUSP#<24,25,40>

+2.5VP

you can change from +1.5VP to +1.5VS.

BST_1.5V

UG_1.5V

LX_1.5V

17

PU501

15

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

PR507
470K_0402_1%

1 2

PR509

@

0_0402_5%

1 2

0.1U_0402_10V7K

PR510

@

0_0402_5%

1 2

16

PHASE

RT8207PGQW_WQFN20_3X3

PGOOD

10

PC518

@

19

18

20

VTT

BOOT

UGATE

S5

TON

8

9

TON_1.5V

EN_1.5V

12

PAD

VLDOIN

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

S3

6

7

FB_1.5V

EN_0.75VSP

+1.2VP +1.2V

12

PC519

@

0.1U_0402_10V7K

+0.6VSP +0.6VS

+2.5VP

21

1

2

3

4

5

VTTREF_1.5V

6.19K_0402_1%

12

PR508
10K_0402_1%

PR506

1 2

+1.2VP

12

+1.2VP

0.75*(1+ 6.19/10) =1.21

PJ501

@

112

JUMP_43X118

PJ502

@

112

JUMP_43X39

PJ503

@

112

JUMP_43X39

PC506

10U_0603_6.3V6M

0.75Volt +/- 5%
TDC 0.7A
Peak Current 1A

12

PC507

10U_0603_6.3V6M

12

PC509

0.033U_0402_16V7K

+1.2VP

2

2

2

+0.6VSP

+2.5V

Vout=0.8V* (1+(21.5/10)) = 2.52V 0.8%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

+1.5VP/+0.75VSP

+1.5VP/+0.75VSP

+1.5VP/+0.75VSP

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

42 50Tuesday, May 02, 2017

42 50Tuesday, May 02, 2017

42 50Tuesday, May 02, 2017

1

1.0

1.0

1.0

5

4

3

2

1

EN pin don't floating

D D

+19VB

LDO_VDDP

12

PR604

@

0_0402_5%

ILMT_VDDP

12

PR605

@

0_0402_5%

C C

0.95_1.8VALW_PWREN<24>

PJ604

@

112

JUMP_43X79

2

PR601

@

0_0402_5%

1 2

PR607
1M_0402_1%

+19VB_VDDP

12

PC620

EMI@

0.1U_0402_25V6

12

PC604

0.1U_0402_25V6

@EMI@

12

0.22U_0402_10V6K

12

PC605

10U_0805_25V6K

PC614

@

12

PC601

EMI@

2200P_0402_50V7K

12

If have pull down resistor at HW side, pls delete PR2

PU601

2

IN

ILMT_VDDP

12

3

IN

4

IN

5

IN

7

GND

8

GND

18

GND

11

EN

13

ILMT

15

BYP

PC615
1U_0402_6.3V6K

SY8288RAC_QFN20_3X3

12

PC622

10U_0805_25V6K

+3VALW

PG

BS

LX

LX

LX

FB

VCC

NC

NC

NC

PAD

9

BST_VDDP

1

6

19

LX_VDDP

20

FB_VDDP

14

LDO_VDDP

17

10

12

16

21

PR603

@

0_0603_5%

1 2

12

PC612

2.2U_0402_6.3V6M

PC602

0.1U_0603_25V7K

1 2

@EMI@

4.7_1206_5%

1 2

PL602

.68UH_PCMC063T-R68MN_15.5A_20%

1 2

SNB_VDDP

680P_0603_50V7K

@EMI@

PR602

PC603

1 2

(R1)

12

PR606
16K_0402_1%

FB = 0.6V

PR609

BR@

20K_0402_1%

12

SR@

26.7K_0402_1%

PR609

Module model information

SY8208D_V1.md d

12

12

12

PC606

PC613

22U_0603_6.3V6M

330P_0402_50V7K

PC609, PC610 from 47U_0603_6.3V6M change to
22U_0603_6.3V6M 2013/10/23

PC607

22U_0603_6.3V6M

PC608

+0.95VALWP

12

12

12

PC609

22U_0603_6.3V6M

PC610

22U_0603_6.3V6M

JUMP_43X118

+0.95VALWP

12

PC611

22U_0603_6.3V6M

22U_0603_6.3V6M

PJ601

@

112

2

+0.95VALW

(R2)

VFB=0.6V
Vout = 0.6V*(1+R1/R2)

SR Vout = 0.96V
BR Vout = 1.08V

PC623

22U_0603_6.3V6M

0.95_1.8VALW_PWREN

+1.8VALWP

+1.8VALWP

PJ603

@

112

JUMP_43X79

2

+1.8VALW

1 2

PR611

FB=0.6V
Note:Iload(max)= 3.5A

PU602

9

PGND

1

PJ602

@

B B

+3VALWP

IN_1.8VALW

2

112

JUMP_43X79

22U_0603_6.3V6M

Note:
When design Vin=5V, please stuff snubber
to prevent Vin damage

PC617

12

2

3

4

FB=0.6V

Note:Il oad(max) =3A

8

FB

SGND

7

PG

EN

6

IN

LX

5

NC

PGND

SY8003ADFC_DFN8_2X2

LX_1.8VALW

@

1UH_2.8A_30%_4X4X2_F

12

PR613

@EMI@

12

PC621

@EMI@

12

12

PR612

PC616

0.1U_0402_16V7K

PL603

1 2

PR614

20K_0402_1%

4.7_0603_5%

FB_1.8VALW

PR615

10K_0402_1%

680P_0402_50V7K

1M_0402_5%

Note:Iload(max)= 2.5A

12

12

Rup

PC618

68P_0402_50V8J

12

Rdown

Vout=0.6V* (1+Rup/Rdown)

@

0_0402_5%

12

12

PC619

22U_0603_6.3V6M

A A

Security Classification

Security Classification

Security Classification

Issued D ate

Issued D ate

Issued D ate

THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL

THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL

THIS SHE ET OF ENGIN EERI NG DRAW ING IS THE P ROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR W RITTEN CONSENT OF COM PAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR W RITTEN CONSENT OF COM PAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR W RITTEN CONSENT OF COM PAL ELECTRONICS, INC.

3

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Titl e

Titl e

Titl e

Size

Size

Size

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

+0.95VALW/+1.8VALW

+0.95VALW/+1.8VALW

Document Number Rev

Document Number Rev

Document Number Rev

+0.95VALW/+1.8VALW

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

1

43 50Tuesday, May 02, 2017

43 50Tuesday, May 02, 2017

43 50Tuesday, May 02, 2017

1.0

1.0

1.0

5

PR801

1 2

35W_CPU@

16.9K_0402_1%

1 2

12

330P_0402_50V7K

APU_SVC<8>

APU_SVD<8>

APU_SVT_R<8>

PR825

VREF_CPU

PC827

@

0.47U_0402_6.3V6K

PR834

8.2K_0402_1%

1 2

PR836
470_0402_1%

1 2

1 2

PC801

1 2

1 2

12

@

APU_PWROK<8,45>

PR818

20.5K_0402_1%

7.32K_0402_1%

1 2

PR823

19.1K_0402_1%

PC828

APU_CORE_SEN_H <8>

PR802
10_0402_5%

1 2

LL(Rdroop)=2.079m

PR805
10K_0402_1%

1 2

PC807

470P_0402_50V8J

1 2

1 2

@

0_0402_5%

PR822

12

0.47U_0402_6.3V6K

SET2_CPU SET1_CPU

1U_0402_6.3V6K

PR815

PH802

APU_VSS_SEN_L<8,45>

10_0402_5%

1 2

D D

Iocp_spikea = (3.19375 - 0.64)* PR755/ (2*DCR*Rimona)

Iocp_TDCA has relation between ocp_spikea and ∆ VSET1

∆ VSET1 = +5VS*( PR788//PR784 )

SVD_CPU and SVC_CPURC filter put CPU side.
SVT_CPU RC filter put controller side.

15W_CPU@

PR816

28K_0402_1%

C C

B B

15W_CPU@

PR821

5.11K_0402_1%

15W_CPU@

21.5K_0402_1%

35W_CPU@

PR816

15K_0402_1%

35W_CPU@

PR821

9.76K_0402_1%

1 2

12

PR825

PH801

100K_0402_1%_B25/50 4250K

Iocp_spike = (3.19375 - 0.64)* PR709/ (DCR*Rimon)

Iocp_TDC has relation between ocp_spike and ∆ VSET1

∆ VSET1 = +5VS*( PR788//PR784 )

4

Av = PR766/PR769
= Gi/Rdroop

Gi = Rsense*Rimon*0.4/PR709

PC802

12

0.01U_0402_50V7K

Rimon (25 degree) = ( (RH704+PR742)//PR772 )+PR770

Rimona (25 degree)= ( (RH702+PR741)//PR721 )+PR740

+APU_CORE

15W_CPU@

PR806

78.7K_0402_1%

35W_CPU@

PR806

53.6K_0402_1%

1 2

PC808

68P_0402_50V8J

1 2

COMP_CPU

13

14

RGND

IMON_CPU

15

IMON

VREF_CPU

16

V064

IMONA_CPU

17

PC813

1 2

100K_0402_1%_B25/50 4250K

IMONA

+1.8VS

18

VDDIO

19

PWROK

APU_SVC

20

SVC

APU_SVD

21

SVD

APU_SVT

22

SVT

23

OFS

24

OFSA

SET1_CPU

25

SET1

SET2_CPU

26

SET2

APU_PROCHOT# <8,16,24,45>

Pull high at HW side

PC829

68P_0402_50V8J

1 2

1 2

PR831

84.5K_0402_1%

LL_NB(Rdroop)=3.992m

PR835

124K_0402_1%

1 2

PR837

33K_0402_1%

1 2

VCC_CPU

15W_CPU@

+5VS +5VS

PR807

97.6K_0402_1%

ISEN2N_CPU

ISEN2P_CPU

35W_CPU@

PR844 0_0402_5%15W_CPU@

PR846 0_0402_5%15W_CPU@

PR843 0_0402_5%35W_CPU@

PR845 0_0402_5%35W_CPU@

88.7K_0402_1%

1 2

1 2

1 2

1 2

1 2

+5VS

+5VS

FB_CPU

12

11

10

FB

VSEN

COMP

OCP_L27VCC28IBIAS29COMPA30FBA31VSENA32ISENA2P33ISENA2N34ISENA1N35ISENA1P36EN37PGOODA

IBIAS_CPU

VCC_CPU

12

COMPA_CPU

PR827

100K_0402_1%

+APU_CORE_NB

0.01U_0402_50V7K

FBA_CPU

9

ISEN1P_CPU

ISEN3P

ISEN1N_CPU

8

ISEN1P

+5VS

PC838

ISEN2P_CPU_IC

ISEN2N_CPU_IC

5

6

ISEN2P

ISEN2N

ISEN1N7ISEN3N

ISENA1N_CPU

PC830

470P_0402_50V8J

1 2

1 2

PR832

10K_0402_1%

PR833
10_0402_5%

1 2

12

TONSET_CPU

3

4

TONSET

ISENA1P_CPU

Module model information

RT8880C_CZ35W_V2A.mdd for IC portion

RT8880C_CZ35W_V2B.mdd for SW portion

PR807

+19VB_CPU

CORE SW= 430KHz

BST2_CPU

UG2_CPU

PU801

2

1

RT8880CGQW_WQFN52_6X6

53

PWM3

GND

BOOT2

UGATE2

LX2_CPU

52

PHASE2

LG2_CPU

51

LGATE2

PVCC_CPU

50

PVCC

LG1_CPU

49

LGATE1

LX1_CPU

48

PHASE1

UG1_CPU

47

UGATE1

BST1_CPU

46

BOOT1

LG1_NB

45

LGATEA1

LX1_NB

44

PHASEA1

UG1_NB

43

UGATEA1

BST1_NB

42

BOOTA1

41

PR819

+5VS

PWMA2

TONSETA

PGOOD

38

39

Confirm HW side the pull high resistor

PR828 100K_0402_5%

PC833

@

330P_0402_50V7K

1 2

APU_CORENB_SEN_H

40

CORE_NB SW= 454 KHz

VGATE <24>

1 2

+3VS

12

12

@

10K_0402_5%

PC831

@

0.1U_0402_25V6

APU_VSS_SEN_L

<8>

88.7K_0402_1%

1 2

VR_ON <24,45>

PR829

3

PR811

2.2_0402_5%

PVCC_CPU

1 2

VCC_CPU

1 2

12

12

PR812
10_0603_5%

PC814

PC815

2.2U_0603_10V6K

2.2U_0603_10V6K

+19VB_CPU

EN: high > 2V, Low < 0.8V
Can't be floating.

+5VALW

UG1_NB

1 2

PR804

2.2_0603_5%

BST1_NB BST1_NB1_R

1 2

LX1_NB

LG1_NB

35W_CPU@

PR8170_0603_5%

UG2_CPU

1 2

LX2_CPU

35W_CPU@

PR8202.2_0603_5%

BST2_CPU

1 2

LG2_CPU

UG1_CPU

1 2

LX1_CPU

PR839

2.2_0603_5%

BST1_CPU

1 2

LG1_CPU

PR803
0_0603_5%

UG1_NB_R

S TR AON6992 2N DFN5X6D

PC805

0.22U_0603_25V7K

1 2

S TR AON6992 2N DFN5X6D

35W_CPU@

PC8240.22U_0603_25V7K

BST2_CPU_R

PR838

0_0603_5%

PC841

0.22U_0603_25V7K

BST1_CPU_R

1 2

PQ801

7

UG2_CPU_ R

PQ802

35W_CPU@

1 2

7

UG1_CPU_ R

PQ804

S TR AON6992 2N DFN5X6D

7

2

35W Core_OCP=70A, NB_OCP=21A, GFX_OCP=57A
15W Core_OCP=44A, NB_OCP=21A, GFX_OCP=44A

+19VB_CPU

1

1

12

12

+

+

PC820

2

10U_0805_25V6K

12

PR808

4.7_1206_5%

SNB_APU_NB

@EMI@

12

PC811

@EMI@

680P_0603_50V7K

ISENA1P_CPU

ISENA1N_CPU

+19VB_CPU

PC818

PC819

12

12

35W_CPU@

35W_CPU@

10U_0805_25V6K

10U_0805_25V6K

12

PR824

4.7_1206_5%

@EMI@

SNB_APU

12

PC826

@EMI@

680P_0603_50V7K

ISEN2P_CPU

35W_CPU@

ISEN2N_CPU

S TR AON6992 2N DFN5X6D

2

1

G1

7

D2/S1

5

6

PC904

2

BR@

33U_25V_NC_6.3X4.5

33U_25V_NC_6.3X4.5

ISENA1P_CPU_R

PR809

2.49K_0402_1%

1 2

1 2

PR810

845_0402_1%

12

PC821

0.1U_0402_25V6

@EMI@

35W_CPU@

0.22UH_24A_20%_ 7X7X4_M

ISEN2P_CPU_R

35W_CPU@

PR8262.26K_0603_1%

1 2

PR830

1.1K_0402_1%

1 2

PQ803

15W_CPU@

D1

S24S2

S23G2

0.22UH_24A_20%_ 7X7X4_M

134

2

0.1U_0402_25V6

12

PC822

35W_EMI@

2200P_0402_50V7K

134

2

35W_CPU@

PC804

PC803

2

1

10U_0805_25V6K

D1

G1

D2/S1

S24S2

S23G2

5

6

1

2

D1

G1

D2/S1

S24S2

S23G2

5

6

2

1

D1

G1

D2/S1

S24S2

S23G2

5

6

PL803

1 2

PC806

12

PL804

1 2

0.1U_0402_25V6

12

PC832

@

0.1U_0402_25V6

12

SNB_APU2

12

PC812

@

PC825

ISEN2N_CPU_R

@EMI@

PR840

PC843

@EMI@

ISEN1P_CPU

ISEN1N_CPU

ISENA1N_CPU-1

0.1U_0402_25V6

4.7_1206_5%

680P_0603_50V7K

PL801

EMI@

5A_Z120_25M_0805_2P

1 2

PL802

EMI@

5A_Z120_25M_0805_2P

1 2

+APU_CORE_NB

+APU_CORE

+19VB_CPU

12

PC840

PC839

10U_0805_25V6K

ISEN1P_CPU_R

PR841

2.26K_0603_1%

1 2

1.1K_0402_1%

1 2

12

10U_0805_25V6K

PR842

PL805

134

2

1 2

PC842

0.1U_0402_25V6

12

PC844

@

+19VB

APU_CORE_ NB
TDC 12A
Peak Current 17 A
OCP current > 17A
Load line -4mV/A
FSW=450k Hz
DCR 0.98mohm +/-5%
TYP MAX
H/S Rds(on) :11.7mohm , 14mohm
L/S Rds(on) :2.7mohm , 3.3mohm

APU_core
TDC 39A(1H2L)
Peak Current 55A
OCP current > 71A
Load line -2.1mV/A
FSW=450k Hz
DCR 0.98mohm +/-5%
TYP MAX
H/S Rds(on) :11.7mohm , 14mohm
L/S Rds(on) :2.7mohm , 3.3mohm

0.22UH_24A_20%_ 7X7X4_M

+APU_CORE

ISEN1N_CPU_R

0.1U_0402_25V6

1

A A

Security Classif ication

Security Classif ication

Security Classif ication

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINEE RING DRAW ING IS THE P ROPRI ETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHE ET OF ENGINEE RING DRAW ING IS THE P ROPRI ETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHE ET OF ENGINEE RING DRAW ING IS THE P ROPRI ETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR D ISC LOSED TO A NY THIRD PARTY W ITHOUT PRIOR W RITTE N CONSE NT OF C OMPAL EL ECTRONIC S, INC.

MAY BE USED BY OR D ISC LOSED TO A NY THIRD PARTY W ITHOUT PRIOR W RITTE N CONSE NT OF C OMPAL EL ECTRONIC S, INC.

5

4

3

MAY BE USED BY OR D ISC LOSED TO A NY THIRD PARTY W ITHOUT PRIOR W RITTE N CONSE NT OF C OMPAL EL ECTRONIC S, INC.

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electro nics, Inc.

Compal Electro nics, Inc.

Compal Electro nics, Inc.

Title

Title

Title

RT8880CGQW

RT8880CGQW

RT8880CGQW

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

44 50Tuesday, May 02, 2017

44 50Tuesday, May 02, 2017

44 50Tuesday, May 02, 2017

1.0

1.0

1.0

5

4

3

2

1

APU_COREGFX_SEN_H<8>APU_VSS_SEN_L<8,44>

PR901

BR@

10_0402_5%

D D

C C

B B

BR_15W_CPU@

BR_15W_CPU@

PR917

5.11K_0402_1%

BR_15W_CPU@

PR919

21.5K_0402_1%

28K_0402_1%

1 2

1 2

PC902

@

330P_0402_50V7K

SVD_GFX and SVC_GFX RC filter put CPU side.
SVT_GFX RC filter put controller side.

APU_PWROK<8,44>

GFX_SVC<8>

GFX_SVD<8>

PR916

GFX_SVT_R<8>

BR_35W_CPU@

PR916

19.1K_0402_1%

1 2

BR_35W_CPU@

PR917

7.87K_0402_1%

1 2

12

BR_35W_CPU@

PH901

PR919

18.7K_0402_1%

1 2

BR@

12

100K_0402_1%_B25/50 4250K

PC927

BR@

0.47U_0402_6.3V6K

Iocp_spike = (3.19375 - 0.64)*PR709/ (DCR*Rimon)

Iocp_TDC has relation between ocp_spike and ∆ VSET1

∆ VSET1 = +5VS*( PR788//PR784 )

PR927

BR@

8.2K_0402_1%

1 2

PR929

BR@

470_0402_1%

1 2

12

PR902

BR@

10_0402_5%

1 2

LL(Rdroop)=2.04m

PR905

BR@

10K_0402_1%

1 2

PC908

BR@

470P_0402_50V8J

1 2

PC913

BR@

1U_0402_6.3V6K

1 2

1 2

PR915

@BR@

0_0402_5%

BR@

124K_0402_1%

1 2

SET1_GFXSET2_GFX

BR@

33K_0402_1%

1 2

Av = PR766/PR769
= Gi/Rdroop

PC901

BR@

0.01U_0402_50V7K

Gi = Rsense*Rimon*0.4/PR709

+APU_GFX

Rimon (25 degree)= ( (RH704+PR742)//PR772 )+PR770

BR_15W_CPU@

78.7K_0402_1%

71.5K_0402_1%

1 2

68P_0402_50V8J

IMON_GFX

VREF_GFX

+1.8VS

GFX_SVC

GFX_SVD

GFX_SVT

SET1_GFX

SET2_GFX

APU_PROCHOT# <8,16,24,44>

Pull high at HW side

PR928

PR930

PR903

BR_35W_CPU@

PR903

PC909

BR@

1 2

14

15

16

17

18

19

20

21

22

23

24

25

26

VCC_GFX

+5VS +5VS

ISEN2N_GFX

PR933 0_0402_5%BR_35W_CPU@

1 2

1 2

+5VS

FB_GFX

COMP_GFX

9

13

12

10

11

FB

VSEN

COMP

RGND

IMON

V064

IMONA

VDDIO

PWROK

SVC

SVD

SVT

OFS

OFSA

SET1

SET2

OCP_L27VCC28IBIAS29COMPA30FBA31VSENA32ISENA2P33ISENA2N34ISENA1N35ISENA1P36EN37PGOODA

IBIAS_GFX

VCC_GFX

12

PR920

BR@

100K_0402_1%

BR_15W_CPU@

PR906

97.6K_0402_1%

ISEN2P_GFX

BR_35W_CPU@

PR906

PR936 0_0402_5%BR_15W_CPU@

PR935 0_0402_5%BR_35W_CPU@

PR934 0_0402_5%BR_15W_CPU@

88.7K_0402_1%

+19VB_GFX

1 2

1 2

1 2

ISEN1P_GFX

ISEN1N_GFX

8

ISEN1P

ISEN3P

ISEN1N7ISEN3N

+5VS

Fsw(max) =451KHz

+5VS

TONSET_GFX

UG2_GFX

BST2_GFX

4

3

5

6

2

1

PWM3

GND

BOOT2

ISEN2P

ISEN2N

UGATE2

TONSET

PHASE2

LGATE2

PVCC

LGATE1

PHASE1

UGATE1

BOOT1

LGATEA1

PHASEA1

UGATEA1

BOOTA1

PWMA2

TONSETA

PGOOD

38

39

Confirm HW side the pull high resistor

12

@

Module model information

RT8880C_CZ_GFX35W_V2A.mdd for IC portion

RT8880C_CZ_GFX35W_V2B.mdd for SW portion

UG1_GFX

LX1_GFX

BST1_GFX

PU901

BR@

RT8880CGQW_WQFN52_6X6

53

LX2_GFX

52

LG2_GFX

51

PVCC_GFX

50

LG1_GFX

49

LX1_GFX

48

UG1_GFX

47

BST1_GFX

46

45

44

43

42

41

+5VS

40

VDDGFX_PWRGD<9>

1 2

+3VALW

PR921

BR@

100K_0402_5%

VR_ON <24,44>

12

PR923

@

10K_0402_5%

PC929

0.1U_0402_25V6

GFX_core
TDC 30A(1H2L)
Peak Current 45A
OCP current > 58.6A
Load line -2.1mV/A
FSW=450k Hz
DCR 0.98mohm +/-5%
TYP MAX
H/S Rds(on) :11.7mohm , 14mohm
L/S Rds(on) :2.7mohm , 3.3mohm

LG1_GFX

PVCC_GFX

VCC_GFX

12

12

PC914

PC915

BR@

BR@

2.2U_0603_10V6K

2.2U_0603_10V6K

EN: high > 2V, Low < 0.8V
Can't be floating.

BR@

2.2_0402_5%

1 2

1 2

BR@

BR@

2.2_0603_5%

1 2

PR910

BR@

10_0603_5%

0_0603_5%

1 2

PR907

PR911

PR904

BST1_GFX_R

0.22U_0603_25V7K

UG1_GFX _R

BR_15W_CPU@

S TR AON6992 2N DFN5X6D

1 2

PC910

BR@

+5VALW

+19VB_GFX

ISEN1P_GFX_R

PR909

1 2

BR@

1.1K_0402_1%

1 2

1 2

1 2

BR_35W_CPU@

0.22U_0603_25V7K

12

PC905

0.1U_0402_25V6

@EMI@

PL903

BR@

0.22UH_24A_20%_ 7X7X4_M

134

2

1 2

PC911

BR@

0.1U_0402_25V6

PR912

12

PC916

@

0.1U_0402_25V6

UG2_GFX _R

BR_35W_CPU@
S TR AON6992 2N DFN5X6D

PC926

12

UG2_GFX

LX2_GFX

BST2_GFX

LG2_GFX

PC903

BR@

12

SNB_GFX

12

1 2

2.2_0603_5%

10U_0805_25V6K

PR908

@EMI@

PC912

@EMI@

PR922

PC906

BR@

10U_0805_25V6K

4.7_1206_5%

680P_0603_50V7K

ISEN1P_GFX

ISEN1N_GFX

12

BR@

2.26K_0603_1%

BR_35W_CPU@

PR9180_0603_5%

BST2_GFX_R

PQ903

7

1

G1

D2/S1

6

2

D1

S24S2

5

PQ901

BR@
S TR AON6992 2N DFN5X6D

1

G1

7

D2/S1

S23G2

5

6

2

D1

S24S2

S23G2

BR_35W_CPU@

PC907

BR_EMI@

ISEN1N_GFX_R

12

2200P_0402_50V7K

+APU_GFX

BR_EMI@

5A_Z120_25M_0805_2P

1 2

BR_EMI@

5A_Z120_25M_0805_2P

1 2

1

PQ902

7

D2/S1

6

PL901

+19VB_CPU

PL902

+19VB_GFX

12

12

PC924

12

SNB_GFX2

12

BR_35W_CPU@

@EMI@

PR924

PC930

@EMI@

ISEN2P_GFX

ISEN2N_GFX

10U_0805_25V6K

4.7_1206_5%

680P_0603_50V7K

PC925

BR_35W_CPU@

ISEN2P_GFX_R

1 2

BR_35W_CPU@

PR925

2.26K_0603_1%

BR_35W_CPU@

PR9261.1K_0402_1%

1 2

10U_0805_25V6K

BR_35W_CPU@

0.22UH_24A_20%_ 7X7X4_M

134

2

1 2

BR_35W_CPU@

PC928

0.1U_0402_25V6

12

PC931

@

PL904

+APU_GFX

ISEN2N_GFX_R

0.1U_0402_25V6

2

D1

G1

S24S2

S23G2

5

+3VALW

PJ904

8

NC

7

NC

6

VCNTL

5

NC

9

TP

Compal Secret Data

Compal Secret Data

Compal Secret Data

@

112

JUMP_43X39

Deciphered Date

Deciphered Date

Deciphered Date

2

12

1U_0402_6.3V6K

+3VALW

PC934

+0.775VALW+0.775VALWP

Compal Electro nics, Inc.

Compal Electro nics, Inc.

Compal Electro nics, Inc.

Title

Title

Title

RT8880CGQW

RT8880CGQW

RT8880CGQW

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

45 50Tuesday, May 02, 2017

45 50Tuesday, May 02, 2017

45 50Tuesday, May 02, 2017

1

PJ903

@

1

JUMP_43X39

2

2

PC933

4.7U_0402_6.3V6M

1 2

A A

5

4

3

VIN_0.775VALW

12

PR932

3.24K_0402_1%

VREF_0.775VALW

12

PR931

1K_0402_1%

0.1U_0402_16V7K

Security Classif ication

Security Classif ication

Security Classif ication

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINEE RING DRAW ING IS THE P ROPRI ETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHE ET OF ENGINEE RING DRAW ING IS THE P ROPRI ETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHE ET OF ENGINEE RING DRAW ING IS THE P ROPRI ETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR D ISC LOSED TO A NY THIRD PARTY W ITHOUT PRIOR W RITTE N CONSE NT OF C OMPAL EL ECTRONIC S, INC.

MAY BE USED BY OR D ISC LOSED TO A NY THIRD PARTY W ITHOUT PRIOR W RITTE N CONSE NT OF C OMPAL EL ECTRONIC S, INC.

MAY BE USED BY OR D ISC LOSED TO A NY THIRD PARTY W ITHOUT PRIOR W RITTE N CONSE NT OF C OMPAL EL ECTRONIC S, INC.

2

PU902

1

VIN

2

GND

3

VREF

4

VOUT

G2992F1U

12

PC932

+0.775VALWP

12

PC935
10U_0603_6.3V6M

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

1.0

1.0

1.0

5

4

3

2

1

+APU_CORE +APU_CORE_NB

+APU_CORE

D D

12

12

12

12

PC9003

PC9002

PC9001

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

12

PC9029

PC9030

PC9031

22U_0603_6.3V6M

22U_0603_6.3V6M

C C

12

12

22U_0603_6.3V6M

12

12

PC9056

PC9057

0.22U_0402_10V6K

0.22U_0402_10V6K

APU_CORE
560uF*1

PC9081

220uF*2
22uF*20+0.22uF*8

180P_0402_50V8J

12

12

12

PC9004

PC9005

PC9006

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

12

PC9032

PC9033

22U_0603_6.3V6M

12

PC9059

PC9058

0.22U_0402_10V6K

12

12

PC9034

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

PC9060

0.22U_0402_10V6K

0.22U_0402_10V6K

PC9008

PC9007

22U_0603_6.3V6M

12

PC9035

PC9036

22U_0603_6.3V6M

12

PC9062

PC9061

0.22U_0402_10V6K

12

12

22U_0603_6.3V6M

12

22U_0603_6.3V6M

12

0.22U_0402_10V6K

12

PC9009

PC9010

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

PC9038

PC9037

22U_0603_6.3V6M

22U_0603_6.3V6M

PC9063

0.22U_0402_10V6K

180pF*1

B B

+APU_CORE

1

+

PC9084

PC9085

2

@

560U_D2_2VM_R4.5M

1

+

PC9086

2

220U_D2 SX_2VY_R9M

+

+

PC9087

2

2

220U_D2 SX_2VY_R9M

560U_D2_2VM_R4.5M

1

1

CPU back sidenear CPU

+APU_CORE_NB

12

PC9012

PC9011

22U_0603_6.3V6M

12

PC9040

PC9039

22U_0603_6.3V6M

12

PC9064

0.22U_0402_10V6K

12

1

+

PC9088

2

220U_D2 SX_2VY_R9M

near CPU

12

12

12

PC9013

PC9014

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

12

PC9041

PC9042

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

PC9066

PC9065

0.22U_0402_10V6K

12

PC9067

0.22U_0402_10V6K

0.22U_0402_10V6K

APU_CORENB
220uF*1
22uF*17+0.22uF*8

PC9082

180pF*1

180P_0402_50V8J

1

+

PC9089

2

@

220U_D2 SX_2VY_R9M

12

12

PC9015

22U_0603_6.3V6M

12

PC9043

22U_0603_6.3V6M

12

PC9068

0.22U_0402_10V6K

12

12

PC9018

PC9017

PC9016

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

PC9044

PC9045

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

PC9070

PC9069

0.22U_0402_10V6K

12

PC9071

0.22U_0402_10V6K

0.22U_0402_10V6K

12

12

PC9020

PC9019

22U_0603_6.3V6M

22U_0603_6.3V6M

+APU_GFX

1

+

2

CPU back side

+APU_GFX

+APU_GFX

12

PC9021

PC9022

22U_0603_6.3V6M

BR@

BR@

12

PC9046

PC9047

22U_0603_6.3V6M

BR@

BR@

12

PC9072

PC9073

0.22U_0402_10V6K

BR@

BR@

12

PC9083

BR@

1

+

PC9091

PC9090

2

BR@

560U_D2_2VM_R4.5M

560U_D2_2VM_R4.5M

@BR@

12

PC9023

22U_0603_6.3V6M

22U_0603_6.3V6M

BR@

12

PC9048

22U_0603_6.3V6M

22U_0603_6.3V6M

BR@

12

PC9074

0.22U_0402_10V6K

0.22U_0402_10V6K

BR@

180P_0402_50V8J

1

+

PC9092

2

220U_D2 SX_2VY_R9M

BR@

near CPU

12

12

12

PC9025

PC9024

22U_0603_6.3V6M

BR@

BR@

12

12

PC9049

PC9050

22U_0603_6.3V6M

BR@

BR@

12

12

PC9075

PC9076

BR@

0.22U_0402_10V6K

BR@

12

PC9026

22U_0603_6.3V6M

22U_0603_6.3V6M

BR@

12

12

PC9051

22U_0603_6.3V6M

22U_0603_6.3V6M

BR@

12

12

PC9077

0.22U_0402_10V6K

0.22U_0402_10V6K

BR@

APU_GFX
560uF*1
220uF*1
22uF*18+0.22uF*9
180pF*1

1

+

PC9093

2

220U_D2 SX_2VY_R9M

BR@

PC9027

BR@

PC9052

BR@

PC9078

BR@

12

12

PC9028

22U_0603_6.3V6M

22U_0603_6.3V6M

BR@

12

PC9053

22U_0603_6.3V6M

BR@

12

PC9079

0.22U_0402_10V6K

BR@

12

12

22U_0603_6.3V6M

12

0.22U_0402_10V6K

PC9054

BR@

PC9080

BR@

12

PC9055

22U_0603_6.3V6M

22U_0603_6.3V6M

BR@

12

0.22U_0402_10V6K

A A

Security Classification

Security Classification

Security Classification

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGIN EERING DRAWING IS THE PROPRI ETARY PRO PERTY OF C OMPAL ELE CTRONI CS, INC . A ND CONTAI NS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2017/04/18 2019/04/18

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

+APU_CORE Cap

+APU_CORE Cap

+APU_CORE Cap

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

46 50Tuesday, May 02, 2017

46 50Tuesday, May 02, 2017

46 50Tuesday, May 02, 2017

1

1.0

1.0

1.0

5

4

3

2

1

EN pin don't floating

EA (C5V08): POP VGA_SY
VX (D5PR8): POP VGA_AOZ

D D

+19VB

LDO_3V_1.35

C C

12

@VGA_SY@

0_0402_5%

12

@VGA_SY@

0_0402_5%

PR1003

ILMT_1.35V

PR1005

DGPU_PWROK<9,48>

PR606 part count reduce

B B

+19VB

A A

PJ1003

@

112

JUMP_43X79

2

12

12

PC1024

PC1020

0.1U_0402_25V6

2200P_0402_50V7K

VGA_AOZ_EMI@

VGA_AOZ_EMI@

+19VB_1.35V_AOZ

12

12

PC1023

PC1021

0.1U_0402_25V6

10U_0805_25V6K

VGA_AOZ@

@VGA_AOZ_EMI@

VFB=0.8V
Vout=0.6V*(1+R1/R2)=1.362V

5

PJ1001

@

2

112

JUMP_43X79

@VGA@

0_0402_5%

1 2

VGA@

1M_0402_1%

12

PC1025

10U_0805_25V6K

VGA_AOZ@

PC1017

0.1U_0402_25V6

VGA_SY_EMI@

PR1004

PR1007

+1.35VSDGPUP

12

VGA_AOZ@

VGA_AOZ@

12

PC1001

2200P_0402_50V7K

VGA_SY_EMI@

12

10K_0402_1%

6.98K_0402_1%

12

PC1005

0.1U_0402_25V6

@VGA_SY_EMI@

12

0.22U_0402_10V6K

PR1010

PR1008

4

PC1006

VGA_SY@

@VGA@

10U_0805_25V6K

12

12

+19VB_1.35V

12

PC1015

VGA_AOZ@

0.01UF_0402_25V7K

1.35V_EN

VGA_AOZ@

105K_0402_1%

If have pull down resistor at HW side, pls delete PR2

VGA_SY@

PU1001

PC1002

VGA_SY@

10U_0805_25V6K

12

1.35V_EN

1 2

VGA_AOZ@

PR1011

+3VALW

VGA_SY@

1U_0402_6.3V6K

+5VS

VGA_AOZ@

PC1022

12

ILMT_1.35V

PC1016

PC1018

4.7U_0402_6.3V6M

1 2

PU1002

1

PGOOD

2

EN

3

PFM

4

AGND

5

FB

6

TON

+19VB_1.35V_AOZ

2

IN

3

IN

4

IN

5

IN

7

GND

8

GND

18

GND

11

EN

13

ILMT

15

BYP

12

SY8288RAC_QFN20_3X3

VGA_AOZ@

19

17

18

SS

BST

VCC

AOZ2260QI-10_QFN22_4X4

IN

7

PC1019

0.1U_0603_25V7K

1 2

16

15

LX

PGND

PGND

PGND

PGND

PGND

LX

8

LX_1.35V

9

PG

1

BS

6

LX

19

LX

20

LX

14

FB

17

VCC

10

NC

12

NC

16

NC

21

PAD

14

LX

13

LX

12

11

10

9

3

@VGA_SY@

BST_1.35V

LX_1.35V

FB_1.35V

LDO_3V_1.35

0_0603_5%

1 2

PR1001

12

VGA_SY@

2.2U_0402_6.3V6M

VGA_SY@

0.1U_0603_25V7K

1 2

PC1013

PR1002

VGA_EMI@

4.7_1206_5%

SNUB_1.35V

1 2

PL1002

VGA@

0.68UH_PCMB061H-R68MS_9A _20%

1 2

VGA_EMI@

680P_0603_50V7K

1 2

(R1)

12

VGA_SY@

12.7K_0402_1%

PC1004

PC1003

FB = 0.6V

12

VGA_SY@

10K_0402_1%

(R2)

LX_1.35V

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEER ING DRAW ING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAW ING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAW ING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

Compal Sec ret Data

Compal Sec ret Data

Compal Sec ret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Module model information

SY8208D_V1.mdd

chock 7*7*1.8

12

12

PC1008

PC1007

12

PR1006

PR1009

PC1014

VGA_SY@

330P_0402_50V7K

VGA@

VGA@

22U_0603_6.3V6M

22U_0603_6.3V6M

+1.35VSDGPUP

VFB=0.6V
Vout=0.6V*(1+R1/R2)=1.362V

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

+1.35VSDGPUP

12

12

12

PC1009

VGA@

22U_0603_6.3V6M

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

12

PC1011

PC1010

VGA@

22U_0603_6.3V6M

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PC1012

VGA@

VGA@

22U_0603_6.3V6M

22U_0603_6.3V6M

PJ1002

@

112

JUMP_43X118

+GFX_CORE

+GFX_CORE

+GFX_CORE

1

2

+1.35VSDGPU

1.0

1.0

47 50Tuesday, May 02, 2017

47 50Tuesday, May 02, 2017

47 50Tuesday, May 02, 2017

1.0

5

4

3

2

1

PC1403

10U_0805_25V6K

40W_VGA@

VGA@
S TR AON6992 2N DFN5X6D

2

D1

S24S2

S23G2

GPU_UGATE1

1

G1

7

D2/S1

5

6

GPU_B1+

PC1404

12

12

10U_0805_25V6K

40W_VGA@

PQ1402

PQ1403

VGA@
S TR AON6992 2N DFN5X6D

2

D1

S24S2

S23G2

PC1405

12

@EMI@

2200P_0402_50V7K

12

@EMI@

4.7_1206_5%

@EMI@

12

680P_0603_50V7K

PJ1402

@

2

112

JUMP_43X79

PC1406

12

0.1U_0402_25V6

40W_VGA_EMI@

GPU_ISEN3

PR1402

VSUM+

PC1408

VSUM-

GPU_B+

12

12

12

12

PC1420

PC1419

PC1418

PC1417

10U_0805_25V6K

VGA@

12

PC1435

VGA@

10U_0805_25V6K

10U_0805_25V6K

VGA@

12

@EMI@

4.7_1206_5%

@EMI@

12

680P_0603_50V7K

GPU_B+

12

PC1431

VGA@

10U_0805_25V6K

12

@EMI@

4.7_1206_5%

@EMI@

12

680P_0603_50V7K

0.1U_0402_25V6K

@EMI@

2200P_0402_50V7K

VGA_EMI@

PR1419

PC1426

12

12

PC1433

PC1432

VGA_EMI@

@EMI@

0.1U_0402_25V6

2200P_0402_50V7K

PR1437

PC1442

40W_VGA@

40W_VGA@

40W_VGA@

PR1460
10K_0402_1%

1 2

PR1461

3.65K_0603_1%

1 2

PR1462

1_0402_1%

1 2

GPU_ISEN2

VSUM+

VSUM-

GPU_ISEN1

VSUM+

VSUM-

+19VB

(DCR:0.98± 5 %)

PR1420

VGA@

10K_0402_1%

1 2

PR1423

VGA@

3.65K_0603_1%

1 2

PR1426

VGA@

1_0402_1%

1 2

PR1438

VGA@

10K_0402_1%

1 2

PR1442

VGA@

3.65K_0603_1%

1 2

PR1445

VGA@

1_0402_1%

1 2

PL1405

40W_VGA@

0.22UH_24A_20%_ 7X7X4_M

134

2

PJ1401

@

112

JUMP_43X79

(DCR:0.98± 5 %)

PL1403

VGA@

0.22UH_24A_20%_ 7X7X4_M

134

2

(DCR:0.98± 5 %)

PL1404

VGA@

0.22UH_24A_20%_ 7X7X4_M

134

2

+VGA_CORE

TYP MAX
L/S Rds(on):1.2mohm ,2.3mohm

2

+19VB

VGA_CORE
TDC 15.75A
Peak Current 22.5A
OCP current 31A

+VGA_CORE

+VGA_CORE

VDDGFX
TDC 90A
Peak Current 100A
OCP current 120A

PR1405

VGA@

PC1401

VGA@

2K_0402_1%

VSUMP_NB

VSUMN_NB

VGA@

PH1401

GPU_VDDCI_SEN<2 2>

12

12

12

10K +-5% 0402 B25/50 4250K

+VDDCI

PR1412

PR1413

2.61K_0402_1%

VGA@

1 2

VGA@

PC1422

VGA@

0.1U_0603_25V7K

11K_0402_1%

VGA@

PC1413

1 2

VGA@

0.022U_0402_25V7K

D D

10_0402_1%

1 2

VGA@

PR1401

12

PC1414

0.01UF_0402_25V7K

PR1416

@

100_0402_1%

@VGA@

0_0402_5%

1 2

@

1000P_0402_50V7K

VGA@

2.37K_0402_1%

220P_0402_50V7K

12

330P_0402_50V7K

PR1410

PC1412

12

PR1414

12

PC1423

@

12

After rev1.1 must change to 133k

PR1418

VGA@

VGA@

27.4K_0402_1%

PH1402

VGA@

470K_0402_5%_TSM0B474J4702RE

C C

VGA@

After rev1.1 must change to 133k

VGA@

1000P_0402_25V6K

470K_0402_5%_TSM0B474J4702RE

B B

12

12

GPU_PROCHOT#<16>

PR1433
133K_0402_1%

1 2

PC1434

1 2

VGA@

27.4K_0402_1%

VGA@

PR1435

PH1403

VGA@

12

12

PR1422

10.5K_0402_1%

VGA@

100K_0402_1%

+3VS

12

PR1427

133K_0402_1%

PR1421

PC1424

VGA@

1000P_0402_25V6K

1 2

+5VALW

1 2

GPU_SVC<16>

GPU_SVD<16>

+1.8VSDGPU +5VALW

1 2

GPU_SVT<16>

@VGA@

1 2

PR1434

VGA@

10.5K_0402_1%

VSUM+

VSUM-

+5VALW

0_0402_5%

12

12

12

PH1404

VGA@

10K +-5% 0402 B25/50 4250K

12

VGA@

0.1U_0603_25V7K

VGA_ON_B<25>

12

VGA@

1K_0402_1%

PC1410

VGA@

1000P_0402_50V7K

12

PR1431

ENABLE

DGPU_PWROK

PR1465

25W_VGA@

0_0402_5%

1 2

PC1436

40W_VGA@

0.22U_0402_6.3V6K

12

PC1437

VGA@

0.22U_0402_6.3V6K

12

PC1438

VGA@

0.22U_0402_6.3V6K

12

PR1439

PR1443

2.61K_0402_1%

VGA@

1 2

VGA@

PC1448

PR1407

12

PR1411

VGA@

301_0402_1%

VGA@

10K_0402_1%

1

2

3

4

5

6

7

8

9

10

11

12

PC1443

1 2

VGA@

11K_0402_1%

@

100_0402_1%

25W_VGA@

PC1444

0.15U 25V K X7R 0603

12

VGA@

37.4K_0402_1%

12

PR1417

12

PU1401

ISEN2_NB

NTC_NB

IMON_NB

SVC

VR_HOT_L

SVD

VDDIO

SVT

ENABLE

PWROK

IMON

NTC

PC1444

1 2

0.047U_0603_25V7M

40W_VGA@

PR1450

PR1408

47

48

ISEN1_NB

ISEN3

14

13

GPU_ISEN2

GPU_ISEN3

25W_VGA@

0.22U_0603_25V7K
499_0402_1%

@

820P_0402_50V7K

12

40W_VGA@

634_0402_1%

PC1409

VGA@

390P_0402_50V7K

12

12

PC1411

VGA@

220P_0402_50V8J

12

44

45

46

FB_NB

VSEN_NB

ISUMP_NB

ISUMN_NB

S IC ISL6277AHRZ-T QFN 48P

ISUMP16ISEN2

15

GPU_ISEN1

PR1448

12

PC1449

12

PR1448

43

COMP_NB

18

1 2

PC1450

VGA@

0.01UF_0402_25V7K

@

32.4K_0402_1%

42

PGOOD_NB

RTN19ISUMN17ISEN1

PC1446

VGA@

12

PR1409

12

41

39

40

FCCM_NB

PWM2_NB

FB21PGOOD23FB220VSEN

22

PC1439

VGA@

1000P_0402_25V6K

330P_0402_50V7K

40W_VGA@

1.91K_0402_1%

@VGA@

0_0402_5%

1 2

@VGA@

0_0402_5%

1 2

LGATEX

COMP

12

PR1446

38

25W_VGA@

1K_0402_1%

PR1452

PR1453

24

PR1446

GPU_LGATE3

GPU_PHASE3

GPU_UGATE3

BOOTX

UGATEX37PHASEX

BOOT2

UGATE2

PHASE2

LGATE2

PWM_Y

LGATE1

PHASE1

UGATE1

BOOT1

GPU_BOOT1

VGA@

301_0402_1%

12

FCCM_NB

VIN

VDDP

VDD

49

PR1440

VGA@

10_0402_1%

VGA@

10_0402_1%

S TR AON6992 2N DFN5X6D

PR1404

40W_VGA@

40W_VGA@

2.2_0603_5%

1 2

GPU_LGATE3

0.22U_0603_25V7K

GPU_PHASE3

GPU_BOOT2

GPU_PHASE2

1 2

GPU_LGATE2

GPU_BOOT1

GPU_BOOT3

12

PR1415

VGA@

41.2K_0402_1%

GPU_BOOT3

36

35

GPU_BOOT2

34

GPU_UGATE2

33

GPU_PHASE2

32

GPU_LGATE2

31

30

29

GPU_PWM3

28

GPU_LGATE1

27

GPU_PHASE1

26

GPU_UGATE1

25

TP

VGA@

100K_0402_1%

1 2

PC1440

VGA@

180P_0402_50V8J

12

12

PR1447

VGA@

137K_0402_1%

12

PR1449

VGA@

2K_0402_1%

12

PR1451

12

+VGA_CORE

GPU_VDDC_SEN <22>

GPU_VSS_SEN_L <22>

PR1454

12

@VGA@

0_0603_5%

12

VGA@

0.22U_0603_25V7K

VGA@

1_0603_5%

12

PC1428

VGA@

PR1436

PC1445

VGA@

390P_0402_50V7K

12

PC1447

VGA@

680P_0402_50V7K

12

GPU_B+

PR1424

12

Due to buyer command.
PC1428,PC1429 need change to SE00000QL10.

PC1427

Because 0603 change to 0402, PVT need change footprint.

PR1428

@VGA@

0_0603_5%

12

12

PR1430

12

PC1429

VGA@

1U_0402_16V6K

1U_0402_16V6K

+3VS

DGPU_PWROK <9,47>

PR1441

@

32.4K_0402_1%

Rdroop = 1.91K

12

Ri = 768ohm
Load Line = -0.9mV/A

PC1407

VGA@

2.2_0603_5%

1 2

PR1425

VGA@

GPU_PHASE1

GPU_LGATE1

VGA@

0.22U_0603_25V7K

PR1444

2.2_0603_5%

1 2

7

1 2

1

D2/S1

6

PC1425

G1

2

D1

S24S2

5

VGA@

0.22U_0603_25V7K

1 2

S23G2

GPU_UGATE2

1

G1

7

D2/S1

5

6

PC1441

GPU_UGATE3

PQ1401

40W_VGA@

Due to buyer command.
PC1465 need change to SE00000QL10.
Because 0603 change to 0402, PVT need change footprint.

+5VS

A A

5

4

FCCM_NB

GPU_PWM3

3

12

VGA@

PC1465
1U_0402_10V6K

6

7

FCCM

3

PWM

4

GND

9

TP

VGA@

ISL6208BCRZ-T_QFN8_2X2

PC1466

VGA@

0.22U_0603_16V7K

PR1464

VGA@

2.2_0603_5%

UGATE1VCC

2

BOOT

8

PHASE

5

LGATE

PU1402

BOOT_NB1

1 2

12

UGATE_NB 1

LGATE_NB1

PHASE_NB1

LGATE_NB1

UGATE_NB1

PQ1404

VGA@
S TR AON6992 2N DFN5X6D

2

1

D1

G1

7

D2/S1

S24S2

S23G2

5

6

2

GPU_VDDCI

PC1460

12

12

12

12

PC1461

PC1462

PC1463

VGA@

VGA@

@EMI@

0.1U_0402_25V6

2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K

12

@EMI@

4.7_1206_5%

12

@EMI@

680P_0603_50V7K

VGA_EMI@

PR1463

PC1467

VSUMP_NB

VSUMN_NB

@

112

JUMP_43X79

PR1403

VGA@

3.65K_0603_1%

1 2

PR1406

VGA@

1_0402_1%

1 2

PJ1403

2

0.47UH_PCMB061H-R47MS_11A_20%

+19VB

(DCR:4.3± 5 %)

VGA@

134

2

Title

Title

Title

Size

Size

Size

Date: Sheet of

Date: Sheet of

Date: Sheet of

chock 7*7*1.8

PL1402

<Title>

<Title>

<Title>

Document Number Rev

Document Number Rev

Document Number Rev
C5V08/D5PR8_LA-E903PR10 1.0

D

C5V08/D5PR8_LA-E903PR10 1.0

D

C5V08/D5PR8_LA-E903PR10 1.0

D

1

+VDDCI

48 50Tuesday, May 02, 2017

48 50Tuesday, May 02, 2017

48 50Tuesday, May 02, 2017

5

4

3

2

1

+VGA_CORE

1

1

1

1

+

+

D D

C C

B B

+

PC1538

PC1539

PC1540

VGA@

220U_D2 SX_2VY_R9M

PC1537

2

2

2

@VGA@

@VGA@

@VGA@

220U_D2 SX_2VY_R9M

220U_D2 SX_2VY_R9M

1

1

+

+

+

PC1501

PC1502

2

2

2

VGA@

VGA@

220U_D2 SX_2VY_R9M

220U_D2 SX_2VY_R9M

220U_D2 SX_2VY_R9M

1

1

1

+

PC1504

PC1503

2

VGA@

@VGA@

220U_D2 SX_2VY_R9M

1

+

+

+

PC1505

PC1506

2

2

2

VGA@

@VGA@

220U_D2 SX_2VY_R9M

220U_D2 SX_2VY_R9M

220U_D2 SX_2VY_R9M

+VGA_CORE

12

PC1508

PC1507

22U_0603_6.3V6M

22U_0603_6.3V6M

VGA@

VGA@

12

PC1517

PC1518

22U_0603_6.3V6M

22U_0603_6.3V6M

VGA@

VGA@

12

12

12

12

12

12

12

PC1509

22U_0603_6.3V6M

VGA@

12

PC1519

22U_0603_6.3V6M

VGA@

12

PC1513

PC1511

PC1510

PC1512

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

VGA@

VGA@

VGA@

VGA@

12

PC1520

22U_0603_6.3V6M

VGA@

12

12

12

PC1543

PC1521

2.2U_0402_6.3V6M

22U_0603_6.3V6M

VGA@

VGA@

12

12

PC1515

PC1516

PC1514

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

VGA@

VGA@

VGA@

PC1544

2.2U_0402_6.3V6M

VGA@

+VDDCI

1

12

12

+

PC1547

PC1545

PC1546

2

330U_D1_2VY_R9M

VGA@

22U_0603_6.3V6M

22U_0603_6.3V6M

@VGA@

@VGA@

A A

Title

Title

Title

<Title>

<Title>

<Title>

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev
C5V08/D5PR8_LA-E903PR10 1.0

D

C5V08/D5PR8_LA-E903PR10 1.0

D

C5V08/D5PR8_LA-E903PR10 1.0

D

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

1

49 50Tuesday, May 02, 2017

49 50Tuesday, May 02, 2017

49 50Tuesday, May 02, 2017

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1

for PWR

Item

for EMI request

01

D D

02

VSEN_GFX duplicate net name

for EMI request

VSEN_GFX duplicate net name

Reason for change

03

04

FAE sug gest Add 3/5V in put cap add PC421, pc422 2016/12/1

05
06

APU_GFX input c hange to +19VB_APU from +19VBFor B+ shape 󱣆󱣆󱣆󱣆󴲹󴲹󴲹󴲹 2016/11/17

boost voltage is 12V PR1603 change to 88.3Kboost voltage is 12V 2016/12/1

Rev. PG#

283029

02

33

pop PL301, PL403, PL501, PL901, PL902

PC1418 net name VSEN_GFX change to VSEN_VGA01

PR410 change to 100K󶁜󶁜󶁜󶁜add SPOK_5V netSPOK_5V to ECSPOK_5V to EC

07
08

󲦨󲦨󲦨󲦨󲤔󲤔󲤔󲤔󵖙󵖙󵖙󵖙󵨡󵨡󵨡󵨡 CPU󳿣󳿣󳿣󳿣󱪙󱪙󱪙󱪙󵖙󵖙󵖙󵖙󵨡󵨡󵨡󵨡 2 󶁜󶁜󶁜󶁜 560u F 󲒇󲒇󲒇󲒇󱡟󱡟󱡟󱡟󵚫󵚫󵚫󵚫 PC9084󶁜󶁜󶁜󶁜PC9091󲒂󲒂󲒂󲒂󰵓󰵓󰵓󰵓 56 0u 2016/12/13

09

HW command

10

Design change

11

C C

12

13

Follow ABO MOS pool Follow ABO MOS pool

14

Follow ME and Thermal command

15

16

B B

A A

Design change

17

Design change Due to C5V08/D5PR8 no use 2 cell battery,

18

HW command

19

󲋪󲋪󲋪󲋪󴱅󴱅󴱅󴱅 comman d

20

21

PVT change: 󲋪󲋪󲋪󲋪󴱅󴱅󴱅󴱅 command

Design change

22

Design change change PR515, PR1452, PR1453, PR815, PR915, PR1410,

23

5

PL1602 unpop PL1602 unpop 2017/02/02

VX:
delete PQ803 and PQ903
PR405 change P/N.

EA:
delete PC1024, PC1406, PL1602
Add PC9087
PR405 change P/N.

VX: PR211 change to 49.9k from 19.1k
delete PL1602

EA: delete PC1024, PC1406, PL1602

Add VDDCI output capAdd VDDCI output cap Add PC1545 220uF

change VDDCI designVDDCI ripple not meet spec. PL1402 change to 0.47uH from 0.22uH

PR1414 change to 2.37k from 1.24k
PR1408 change to 37.4k from 137k
PC1545 change to 330uF from 220uF

PQ502 change to AON7506 from SI7716 2017/02/23

PC1503, PC1537, PC1538, PC1539
change to unpop
PC1505 change to pop

PC1503, PC1537, PC1538, PC1539
change to unpop
PC1505 change to pop

PC9084 change to unpopDesign change PC9084 change to unpop 2017/03/07

PR304 change to 0.01 ohm(SD00000K820) from 0.02 ohm
PC820, PC904 change to SF000007700 from SF000007200
135W: PR211 SD034200280, S RES 1/16W 20K +-1% 0402
65W: PR211 SD034453180, S RES 1/16W 4.53K +-1% 0402

boost circuit change to unpop

PR304 change to 0.01 ohm(SD00000K820) from 0.02 ohm
PC820, PC904 change to SF000007700 from SF000007200
135W: PR211 SD034200280, S RES 1/16W 20K +-1% 0402
65W: PR211 SD034453180, S RES 1/16W 4.53K +-1% 0402

PR213, PR214, PR216, PC204 change to unpop

Boost circuit change to unpop, total 19 parts

boost circuit change to delete boost circuit change to delete

PC814, PC815, PC914, PC915
change to SE000003H00 from SE00000GC00

PC401,PC419,PC508,PC510,PC1465
change from SE080105K80 to SE00000QL10
PC1428,PC1429 change from SE135105K80 to SE00000OU00
PC506,PC507 change from SE093106K80 to SE000005T80
PC935 change from SE093106M80 to SE000005T80

for delay adpi change PR324 from 0ohm to 499ohm
change PQ201 from LBSS138 to LBSS139 for ESD proctct

PR1431, PR1424, PR1428 to R-short

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PC814, PC815, PC914, PC915
change to SE000003H00 from SE00000GC00

PC401,PC419,PC508,PC510,PC1465
change from SE080105K80 to SE00000QL10
PC1428,PC1429 change from SE135105K80 to SE00000OU00
PC506,PC507 change from SE093106K80 to SE000005T80
PC935 change from SE093106M80 to SE000005T80

for delay adpi change PR324 from 0ohm to 499ohm
change PQ201 from LBSS138 to LBSS139 for ESD proctct

change PR515, PR1452, PR1453, PR815, PR915, PR1410,
PR1431, PR1424, PR1428 to R-short

Compal Secret Data

Compal Secret Data

2017/04/18 2019/04/18

2017/04/18 2019/04/18

2017/04/18 2019/04/18

3

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Modify List Date PhaseFixed Issue

2016/11/7

2016/12/1HW request HW request delete PC923, PR926,PC927, PR929,PC930
2016/12/12follow BQ24735 module PC321 change to 2200P from 0.22ufollow BQ24735 module

2017/02/20

2017/02/20

2017/02/23

2017/03/07

2017/03/09

2017/03/10

2017/03/10

2017/03/14

2017/03/21

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR_PIR1

PWR_PIR1

PWR_PIR1

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

C5V08/D5PR8_LA-E903PR10

1

50 50Tuesday, May 02, 2017

50 50Tuesday, May 02, 2017

50 50Tuesday, May 02, 2017

1.0

1.0

1.0