Compal LA-E151P Schematics

5
4
3
2
1
COMPAL CONFIDENTIAL
MODEL NAME : CDP80
D D
PCB NO : LA-E151P BOM P/N :
GPIO MAP: Dell GPIO map EC16 062416 Compal Only
Breckenridge 15 UMA
Kabylake H
2016-07-01
C C
@ : Nopop Component
EMI@ : EMI Component
REV : 0.2 (X01)
@EMI@ : EMI Nopop Component
ESD@ : ESD Component
@ESD@ : ESD Nopop Component
RF@ : RF Component
B B
@RF@ : RF Nopop Component
XDP@ : XDP Component
CONN@ : Connector Component
MB PCB
Part Number
DA80018K000
A A
COPYRIGHT 2016 ALL RIGHT RESERVED REV: X01 PWB: V0RVF
Description PCB 1SE LA-E151P REV0 MB UMA 1
5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Cover Sheet
Cover Sheet
Cover Sheet
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A
A
A
LA-E151P
LA-E151P
LA-E151P
Friday, July 01, 2016
Friday, July 01, 2016
Friday, July 01, 2016
Date: Sheet
Date: Sheet
Date: Sheet
161
161
161
1
of
of
of
0.2
0.2
0.2
5
Breckenridge 15 UMA non-TBT Block Diagram
4
3
2
1
Reverse Type
D D
HDMI 1.4b CONN
EDP CONN
P26
P32
HDMI
To Type C
eDP Lane x 2
DDI[1]
DDI[2]
DDI[3]
eDP
DDIB
DDIC
DDID
Intel KABYLAKE-H BGA CPU 1440 Pins
PAGE 6~13
Memory BUS (DDR4)
1866/2133 MHz
USB2.0[1]
SLG55594AVTR USB POWER SHARE
DMI x4 Gen 3
C C
CRT CONN
VGA
DP TO VGA
P27
RTD2166
To M2 WiGig card
P27
SW1_DP1
DP DeMUX PS8338
P25
USB
DDR4-SO-DIMM X2
BANK 0, 1, 2, 3
P.14/15
USB2.0[9]
USB2.0[11]
USB2.0[1]_PS
P42
USB3.0[1]
USB2.0[2]
USB3.0[3]
USB2.0[3]
USB3.0[4]
LCD Touch
Camera
USB3.0 Conn PS(Ext Port 1)
USB3.0 Conn (Ext Port 2)
USB3.0 Conn (Ext Port 3)
P32
P32
Trough eDP Cable
P42
P43
P43
Intel KABYLAKE-H BGA PCH 837 Pins
HD Audio I/F
PAGE 16~24
SATA[0]/PCIE[9..12]
SPI
PCIE[3]
Card reader RTS5242
SD4.0
P34
P34
B B
Non-AR Type C
TX/RX
USB 3.0 + AM Type C CONN.
A A
USB2.0
CC
Vbus
HS Redriver Switch TUSB546
GPIO
PD Solution TPS65982
5V VR
PCIE[4]
Intel Jacksonville WGI219LM
Transformer
RJ45
P33
P33
P33
DP1.2 4 lanes
P28
P29-30P31
M.2,3042 Key B
WWAN/LTE /HCA/SSD
USB3.0[2]
DDI[2]
USB3.0[5]
SMBUS
USB2.0[4]
PCIE[17]
USB2.0[8]
P35
USH board
Smart Card
PCIE[2]
PCIE[1]
M.2,3030 Key A
WLAN+BT/WIGIG
USB2.0[6]
WIGIG_DP
TDA8034HN
RFID/NFC
Fingerprint CONN
P35
GPIO Expander IT8010
SPI
P38
USH TPM1.2 BCM58102
SPI
eSPI
SMSC KBC MEC5105
P.37
USB2.0[10]
P39
Charger
5
4
3
SATA[2]
HDA Codec
W25Q128FVSIQ
128M 4K sector
ALC3246
P.19
P.36
W25Q64FVSSIQ
P.44
P.38
P.19
reserve
P.39
2016/01/01
2016/01/01
2016/01/01
SATA REPEATER PI3EQX6741STZDEX
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
64M 4K sector
TPM2.0 ATTPM20P-G1MA1-ABF
KB/TP CONN
FAN CONN
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
P41
2017/01/01
2017/01/01
2017/01/01
INT.Speaker
Universal Jack
Dig. MIC
M2 Key M SSD Conn
P.36
P.36
Trough eDP Cable
P.32
P.40
SATA HDD Conn
P41
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Block diagram
Block diagram
Block diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet of
Date: Sheet of
Date: Sheet of
LID SWITCH
USH CONN
CPU&PCH XDP Port
AUTOMATIC POWER SWITCH(APS)
Free Fall sensor
DC/DC Interface
POWER ON/OFF SW & LED
1
P45
P39
P7
P21
P41
P47
P45
261
261
261
0.2
0.2
0.2
5
4
3
2
1
POWER STATES
Signal
State
S0 (Full ON) / M0
D D
S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON ON OFF
S4 (Suspend to DISK) / M3 ON ON OFF
S5 (SOFT OFF) / M3 ON ON OFFLOW HIGHLOW
SLP S3#
HIGH
LOW HIGH HIGH
SLP
SLP
S5#
S4#
HIGH HIGH
LOW
LOW
SLP A#
HIGH
HIGH
ALWAYS PLANE
ON
M PLANE
ON
SUS PLANE
RUN PLANE
ON ON ON
OFF
OFF
CLOCKS
OFF
OFF
OFF
USB3.0
USB3.0-1
USB3.0-2
USB3.0-3
USB3.0-4
USB3.0-5
USB3.0-6
USB3.0-7
S3 (Suspend to RAM) / M-OFF
S4 (Suspend to DISK) / M-OFF HIGH
S5 (SOFT OFF) / M-OFF
LOW HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
USB3.0-8
USB3.0-9
USB3.0-10
SSIC
SSIC-1
SSIC-2
PCIE
PCIE-1
PCIE-2
PCIE-3
PCIE-4
SATA
JUSB3-->Rear
JNGFF2-->M2 3042(LTE)
JUSB1-->Right
JUSB2-->Left
NA
NA
JNGFF1-->M.2 3030(WIGIG)
JNGFF1-->M.2 3030(WLAN)
Card Reader
LOM
PCIE-5
PM TABLE
C C
power plane
State
S0
B B
S3
S5 S4/AC
S5 S4/AC doesn't exist
+5V_ALW +3.3V_ALW +3.3V_ALW_DSW
+RTC_CELL
+1.0V_PRIM +1.0V_PRIM_CORE +5V_ALW2 +3.3V_ALW2 +VCC_SA +3.3V_RTC_LDO +1.0V_MPHYGT
ON
ON OFF
ON OFF
OFF
+3.3V_SUS +1.2V_MEM+3.3V_ALW_PCH +1.0V_VCCST +2.5V_MEM+1.8V_PRIM
ON
OFF
OFF
+5V_RUN +3.3V_RUN +0.6V_DDR_VTT +1.2V_RUN +VCC_CORE +VCC_GT +1.0VS_VCCIO
+1.8V_RUN
ONON
OFF
PCIE-6
PCIE-7
PCIE-8
PCIE-9
PCIE-10
PCIE-11
PCIE-12
PCIE-13
PCIE-14
PCIE-15
PCIE-16
PCIE-17
PCIE-18
PCIE-19
PCIE-20
SATA-0A
SATA-1A
SATA-0B
SATA-1B
SATA-2
SATA-3
SATA-4
SATA-5
NA
M.2 Socket 3 (Key M) M.2 2280 SSD (PCIex4 or SATA)
NA
NA
JSATA1-->HDD SATA
NA
M.2 3042 (HCA or QCA LTE) SSD Cache
NA
NA
NA
USB PORT#DESTINATION
eDP
DDI-B
DDI-C
DDI-D
1
2
3
4
5
6
7
8
9
10
11
12
VIDEO
DESTINATION
JUSB3-->Rear
JUSB1-->Right
JUSB2 ->Left
Type C
NA
JNGFF1--> M.2 3030(BT)
NA
JNGFF2-->M2 3042(WWAN)
JEDP1-->Touch Screen
JUSH1-->USH
JEDP1-->Camera
NA
H BIOUSH
DESTINATION
LCD
JHDMI1
Type-C
M.2 3030 (WiGig)
DeMux 1
MB VGA
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Port Assignment
Port Assignment
Port Assignment
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A
A
A
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
361
361
361
1
of
of
of
0.2
0.2
0.2
5
4
3
2
1
RUN_ON
3.3V_CAM_EN#
CPU PWR
PCH PWR
GT3 PWR
Peripheral Device PWR
TYPE-C Power
GPU PWR
+5V_TSP
+5V_RUN_AUDIO
+1.8V_RUN
+3.3V_CAM
+3.3V_RUN_AUDIO
SIO_SLP_SUS#
SY8210A
D D
Barrel ADAPTER
CHARGER ISL88738 (PU801)
Type-C ADAPTER
+PWR_SRC
(PU200)
SYX198D (PU301)
SY8288C (PU102)
SIO_SLP_S4#
0.6V_DDR_VTT_ON
SIO_SLP_SUS#
ALWON
+1.2V_MEM
+0.6V_DDR_VTT
+1.0V_PRIM
+5V_ALW
TPS22961 (UZ26)
+5V_ALW2
BATTERY
SY8288B
C C
(PU100)
ALWON
+3.3V_RTC_LDO
+3.3V_ALW2
+3.3V_ALW
ISL95857 (PU602)
ISL95857 (PU604)
IMVP_VR_ON
+VCC_SA +VCC_GT
B B
+5V_ALW
+PP_HV(5V~20V)
AP2204 (UT8)
IMVP_VR_ON
+5V_TBT_VBUS
ISL95857 (PU603)
IMVP_VR_ON
+VCC_CORE
+5V_ALW
TPS65982 (UT5)
AO6405 (QV1)
EN_INVPWR
+BL_PWR_SRC
AP2112K (UT7)
!"#$%&
+TBT_VBUS(5V~20V)
+3.3V_TBT_SX
SIO_SLP_S4#
TPS62134C (PU401)
TPS62134D (PU402)
EM5209 (UZ4)
SLGC55544C (UI3)
SY6288 (UI1)
SY6288 (UI2)
AP3402KTTR (PU501)
EM5209 (UZ2)
EM5209 (UZ3)
EM5209 (UZ4)
G524B1T11U (UV24)
AOZ1336 (UT13)
TPS22967 (UZ18)
AP7175SP (PU503)
+VCC_SFR_OC
RUN_ON
SIO_SLP_SUS#
RUN_ON
USB_PWR_SHR_EN#
USB_PWR_EN1#
USB_PWR_EN2#
SIO_SLP_SUS#
SIO_SLP_LAN#
AUX_EN_WOWL
@SIO_SLP_W LAN#
SIO_SLP_SUS#
@PCH_ALW _ON
RUN_ON
3.3V_WWAN_EN
ENVCC_PCH
TBT_PW R_E N
CV2_ON
SIO_SLP_S4#
TPS22961 (UZ19)
TPS22961 (UZ21)
+1.0VS_VCCIO
+1.0V_PRIM_CORE
+5V_RUN
+5V_USB_CHG_PWR
+USB_EX2_PWR
+USB_EX3_PWR
+1.8V_PRIM
+3.3V_LAN
+3.3V_WLAN
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_WWAN
+LCDVDD
+3.3V_TBT
+3.3V_CV2
+2.5V_MEM
for DDR4
USH/B
RUN_ON SIO_SLP_S0#
SIO_SLP_S4#
LP2301 (QV8)
EM5209 (@UZ5)
AOZ1336 (UZ8)
LP2301A (QZ1)
EM5209 (@UZ5)
+1.0V_VCCSTG
+1.0V_VCCST
3.3V_TS_EN
AUD_PWR_EN
AUD_PWR_EN
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Power Rails
Power Rails
Power Rails
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
461
461
461
0.2
0.2
0.2
5
4
3
2
1
499
499
1K
1K
2.2K
2.2K
@2.2K
@2.2K
2.2K
2.2K
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_TP
+3.3V_ALW
+3.3V_ALW
DMN66D0LDW-7 DMN66D0LDW-7
DMN66D0LDW-7 DMN66D0LDW-7
28
31
LOM
UPD1_SMBCLK_Q UPD1_SMBDAT_Q
2.2K
2.2K
2.2K
2.2K
9
TP
8
+3.3V_CV2
M9
USH
L9
+3.3V_TBT_FLASH
USH/B
B5 A5
SMBUS Address [0x9a]
AW44 BB43
D D
PCH
AY44 BB39
AW42
AW45
SML1_SMBDATA
SML1_SMBCLK
E11 D8
03
03
02 02
C C
01 01
00 D7 00
KBC
04 04
MEM_SMBCLK MEM_SMBDATA
SML0_SMBCLK SML0_SMBDATA
1K
1K
C12 E10
B3 E5
E7
C3
B4
+3.3V_ALW_PCH
DAT_TP_SIO_I2C_CLK CLK_TP_SIO_I2C_DAT
USH_SMBCLK
USH_SMBDAT
UPD1_SMBCLK UPD1_SMBDAT
PD & FW reflash
2.2K
2.2K
+3.3V_RUN
202 200
202
200
53 51
1 4
DIMMA
DIMMB
XDP
LNG2DMTR
MEC 5105
F7
05
B6
05
A12
06
N10
B B
A A
5
06
07 07
08
09
09
10 10
EXPANDER_GPU_SMCLK
M4
EXPANDER_GPU_SMDATA
M7
C508 C8
F6
E9
N2
PBAT_CHARGER_SMBCLK
M3
PBAT_CHARGER_SMBDAT
2.2K
2.2K
+3.3V_ALW
EXPANDER
2.2K
2.2K
+3.3V_ALW
100 ohm
100 ohm
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
7 6
2016/01/01
2016/01/01
2016/01/01
Charger
BATTERY CONN
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
SMbus Block Diagram
SMbus Block Diagram
SMbus Block Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet of
1
of
of
561
561
561
0.2
0.2
0.2
5
D D
C C
B B
+1.0VS_VCCIO
1 2
RC2 24.9_0402_1%
Trace width=5 mils ,Spacing=15mil Max length= 600 mils.
A A
PEG_COMP
4
UC1C
E25
PEG_RXP[0]
D25
PEG_RXN[0]
E24
PEG_RXP[1]
F24
PEG_RXN[1]
E23
PEG_RXP[2]
D23
PEG_RXN[2]
E22
PEG_RXP[3]
F22
PEG_RXN[3]
E21
PEG_RXP[4]
D21
PEG_RXN[4]
E20
PEG_RXP[5]
F20
PEG_RXN[5]
E19
PEG_RXP[6]
D19
PEG_RXN[6]
E18
PEG_RXP[7]
F18
PEG_RXN[7]
D17
PEG_RXP[8]
E17
PEG_RXN[8]
F16
PEG_RXP[9]
E16
PEG_RXN[9]
D15
PEG_RXP[10]
E15
PEG_RXN[10]
F14
PEG_RXP[11]
E14
PEG_RXN[11]
D13
PEG_RXP[12]
E13
PEG_RXN[12]
F12
PEG_RXP[13]
E12
PEG_RXN[13]
D11
PEG_RXP[14]
E11
PEG_RXN[14]
F10
PEG_RXP[15]
E10
PEG_RXN[15]
PEG_COMP
DMI_CRX_PTX_P0<17> DMI_CRX_PTX_N0<17> DMI_CTX_PRX_N0 <17>
DMI_CRX_PTX_P1<17> DMI_CRX_PTX_N1<17>
DMI_CRX_PTX_P2<17> DMI_CRX_PTX_N2<17>
DMI_CRX_PTX_P3<17> DMI_CRX_PTX_N3<17>
DMI_CRX_PTX_P0 DMI_CRX_PTX_N0
DMI_CRX_PTX_P1 DMI_CRX_PTX_N1
DMI_CRX_PTX_P2 DMI_CRX_PTX_N2
DMI_CRX_PTX_P3 DMI_CRX_PTX_N3
G2
PEG_RCOMP
D8
DMI_RXP[0]
E8
DMI_RXN[0]
E6
DMI_RXP[1]
F6
DMI_RXN[1]
D5
DMI_RXP[2]
E5
DMI_RXN[2]
J8
DMI_RXP[3]
J9
DMI_RXN[3]
SKL-H_BGA1440
3
SKYLAKE_HALO
3 OF 14
Rev_1.0
PEG_TXP[0] PEG_TXN[0]
PEG_TXP[1] PEG_TXN[1]
PEG_TXP[2] PEG_TXN[2]
PEG_TXP[3] PEG_TXN[3]
PEG_TXP[4] PEG_TXN[4]
PEG_TXP[5] PEG_TXN[5]
PEG_TXP[6] PEG_TXN[6]
PEG_TXP[7] PEG_TXN[7]
PEG_TXP[8] PEG_TXN[8]
PEG_TXP[9] PEG_TXN[9]
PEG_TXP[10] PEG_TXN[10]
PEG_TXP[11] PEG_TXN[11]
PEG_TXP[12] PEG_TXN[12]
PEG_TXP[13] PEG_TXN[13]
PEG_TXP[14] PEG_TXN[14]
PEG_TXP[15] PEG_TXN[15]
DMI_TXP[0] DMI_TXN[0]
DMI_TXP[1] DMI_TXN[1]
DMI_TXP[2] DMI_TXN[2]
DMI_TXP[3] DMI_TXN[3]
B25 A25
B24 C24
B23 A23
B22 C22
B21 A21
B20 C20
B19 A19
B18 C18
A17 B17
C16 B16
A15 B15
C14 B14
A13 B13
C12 B12
A11 B11
C10 B10
B8 A8
C6 B6
B5 A5
D4 B4
DMI_CTX_PRX_P0 DMI_CTX_PRX_N0
DMI_CTX_PRX_P1 DMI_CTX_PRX_N1
DMI_CTX_PRX_P2 DMI_CTX_PRX_N2
DMI_CTX_PRX_P3 DMI_CTX_PRX_N3
2
DMI_CTX_PRX_P0 <17>
DMI_CTX_PRX_P1 <17> DMI_CTX_PRX_N1 <17>
DMI_CTX_PRX_P2 <17> DMI_CTX_PRX_N2 <17>
DMI_CTX_PRX_P3 <17> DMI_CTX_PRX_N3 <17>
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KBL-H (1/8)
KBL-H (1/8)
KBL-H (1/8)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A
A
A
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
661
661
661
1
of
of
of
0.2
0.2
0.2
5
+3.3V_ALW_PCH
XDP@
1.5K_0402_5%
12
RC133
SYS_PWROK_R
0.1U_0402_25V6
@
1
D D
C C
B B
A A
CC33
2
+3.3V_ALW
1.5K_0402_5%
XDP@
12
RC241
SIO_PWRBTN#
0.1U_0402_25V6
XDP@
1
CC269
2
+1.0V_PRIM_XDP
RC138 51_0402_5%@
+1.0VS_VCCIO
RC132 150_0402_5%
+1.0V_VCCSTG
RC83 1K_0402_5%
+1.0V_VCCST
RC80 1K_0402_5% RC166 1K_0402_5%@ RC71 1K_0402_5% RC79 49.9_0402_1%@
+1.0V_VCCST
RC218 150_0402_5%@
RC219 10K_0402_5%@
VR_SVID_DATA<54>
VR_SVID_ALERT#<54>
Place near JXDP1.47
Place near JXDP1.41
CPU_XDP_PREQ#
1 2
FIVR_EN_R
1 2
H_PROCHOT#
1 2
H_THERMTRIP#
1 2
PCH_JTAGX
1 2
VCCST_ PWRGD
1 2
H_CATERR#
1 2
FIVR_EN
1 2
FIVR_EN
1 2
VR_SVID_DATA VR_SVID_ALERT#
H_PWRGD VCCST _PWRGD H_THERMTRIP# H_PROCHOT#
100P_0402_50V8J
12
CC300ESD@
100P_0402_50V8J
12
CC301ESD@
5
+1.0V_PRIM
RC216 0_0603_1%@
PCH_RSMRST#_AND<20,44>
T191
SIO_PWRBTN#<20,37>
PCH_SPI_D0<19> SYS_PWROK<20,37>
+1.0V_VCCST
56.2_0402_1%
100_0402_5%
12
12
RC152
220_0402_5%
12
RC153
VR_SVID_DATA
CPU_VIDALERT#
0.1U_0402_25V6
@ESD@
12
CC323
ESD Request:place near CPU side
1 2
Place near JXDP1
@
RC157
+1.0V_PRIM_XDP
0.1U_0402_25V6
@
1
CC28
2
PAD~D
+1.0V_PRIM_XDP
0.1U_0402_25V6
@
1
CC29
2
FIVR_EN CFG0
0.1U_0402_25V6
@ESD@
12
CC324
VR_SVID_CLK<54>
H_PROCHOT#<37,54,57> DDR_VTT_CTRL<14>
RC124 1K_0402_5%XDP@ RC217 0_0402_5%@
RC126 1K_0402_5%XDP@ RC128 1K_0402_5%XDP@ RC129 0_0402_5%@
VCCST_ PWRGD<37,38> H_PWRGD<20>
PLTRST_CPU#<16> H_PM_SYNC<16> H_PM_DOWN<16> H_PECI<16,37> H_THERMTRIP#<14,15,16,38>
4
CPU_XDP_PREQ# CPU_XDP_PRDY#
CFG0 CFG1
CFG2 CFG3
XDP_OBS0_R XDP_OBS1_R
CFG4 CFG5
CFG6 CFG7
1 2 1 2
1 2 1 2 1 2
DDR_XDP_WAN_SMBDAT<14,15,20,41> DDR_XDP_WAN_SMBCLK<14,15,20,41> PCH_JTAG_TCK<20>
H_VCCST_PWRGD_XDP SIO_PWRBTN#
FIVR_EN_R
SYS_PWROK_R
CPU_XDP_TCLK
PCH_CPU_BCLK_R_D<18> PCH_CPU_BCLK_R_D#<18>
PCH_CPU_PCIBCLK_R_D<18> PCH_CPU_PCIBCLK_R_D#<18>
CPU_24MHZ_R_D<18> CPU_24MHZ_R_D#<18>
VR_SVID_CLK H_PROCHOT# DDR_VTT_CTRL
VCCST_ PWRGD VCCST_ PWRGD_CPU H_PWRGD
PLTRST_CPU# H_PM_SYNC
H_PECI H_THERMTRIP# H_THERMTRIP#_R
1 2
RC84 499_0402_1%
1 2
RC78 60.4_0402_1%
1 2
RC168 20_0402_5%
1 2
RC169 0_0402_5%
1 2 1 2
RC319 0_0402_5% RC171 0_0402_5%@
'()'*+,*-.
VR_SVID_CLK
4
1 2
CC325@RF@ 33P_0402_50V8J
Place close CPU side
3
CPU XDP
+1.0V_PRIM_XDP
XDP_PRSNT_PIN1
11 13 15 17 19 21 23 25 27 29 31 33 35 37
41 43 45 47 49 51 53 55 57 59
CPU_XDP_TDO H_VCCST_PWRGD_XDP CPU_XDP_TRST#
0.1U_0402_25V6
@ESD@
12
CC306
PCH_CPU_BCLK_R_D PCH_CPU_BCLK_R_D#
PCH_CPU_PCIBCLK_R_D PCH_CPU_PCIBCLK_R_D#
CPU_24MHZ_R_D CPU_24MHZ_R_D#
CPU_VIDALERT# VR_SVID_DATA
H_PROCHOT#_R
XDP@
1 2 1 2
Not link CIS
0.1U_0402_25V6
@ESD@
12
CC307
B31 A32
D35 C36
E31 D31
BH31 BH32 BH29 BR30
BT13
H13
BT31 BP35 BM34 BP31
BT34
J31
BR33
BN1
BM30
CFG3
OBSDATA_C0 OBSDATA_C1
OBSDATA_C2 OBSDATA_C3
OBSDATA_D0 OBSDATA_D1
OBSDATA_D2 OBSDATA_D3
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
UC1E
BCLKP BCLKN
PCI_BCLKP PCI_BCLKN
CLK24P CLK24N
VIDALERT# VIDSCK VIDSOUT PROCHOT#
DDR_VTT_CNTL
VCCST_PWRGD PROCPWRGD
RESET# PM_SYNC PM_DOWN PECI THERMTRIP#
SKTOCC# PROC_SELECT#
CATERR#
SKL-H_BGA1440
RC121 1K_0402_5% RC122 0_0402_5%@
JXDP1
1
GND0
3
OBSFN_A0
5
OBSFN_A1
7
GND2
9
OBSDATA_A0 OBSDATA_A1 GND4 OBSDATA_A2 OBSDATA_A3 GND6 OBSFN_B0 OBSFN_B1 GND8 OBSDATA_B0 OBSDATA_B1 GND10 OBSDATA_B2 OBSDATA_B3 GND12 PWRGOOD/HOOK039ITPCLK/HOOK4 HOOK1 VCC_OBS_AB HOOK2 HOOK3 GND14 SDA SCL TCK1 TCK0 GND16
ESD request,Place near JXDP1 side.
H_PM_DOWN_RH_PM_DOWN
H_SKTOCC# SKL_CNL#
H_CATERR#
+1.0V_PRIM_XDP
2
GND1
4
OBSFN_C0
6
OBSFN_C1
8
GND3
10 12 14
GND5
16 18 20
GND7
22
OBSFN_D0
24
OBSFN_D1
26
GND9
28 30 32
GND11
34 36 38
GND13
40 42 44 46 48 50
GND15
52
TD0
54
TRST#
56
TDI
58
TMS
60
GND17
CONN@SAMTE_BSH-030-01-L-D-A
0.1U_0402_25V6
@ESD@
12
CC308
SKYLAKE_HALO
5 OF 14
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
CFG17 CFG16
CFG8 CFG9
CFG10 CFG11
CFG19 CFG18
CFG12 CFG13
CFG14 CFG15
PCH_XDP_CLK_DP PCH_XDP_CLK_DN
CPU_XDP_HOOK6 XDP_DBRESET#
CPU_XDP_TDO CPU_XDP_TRST# CPU_XDP_TDI CPU_XDP_TMS
CPU_XDP_PRS
Rev_1.0
CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8]
CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15]
CFG[17] CFG[16] CFG[19] CFG[18]
BPM#[0] BPM#[1] BPM#[2] BPM#[3]
PROC_TDO
PROC_TDI PROC_TMS PROC_TCK
PROC_TRST# PROC_PREQ# PROC_PRDY#
CFG_RCOMP
PCH_XDP_CLK_DP <18> PCH_XDP_CLK_DN <18>
1 2
RC144 0_0402_5%XDP@
XDP_DBRESET# <17> CPU_XDP_TRST# <22>
1 2
RC127 1K_0402_5%XDP@
CPU_XDP_TMS CPU_XDP_TDI CPU_XDP_TDO CPU_XDP_TCLK CPU_XDP_PRDY# CPU_XDP_PREQ#
BN25
CFG0
BN27
CFG1
BN26
CFG2
BN28
CFG3
BR20
CFG4
BM20
CFG5
BT20
CFG6
BP20
CFG7
BR23
CFG8
BR22
CFG9
BT23
CFG10
BT22
CFG11
BM19
CFG12
BR19
CFG13
BP19
CFG14
BT19
CFG15
BN23
CFG17
BP23
CFG16
BP22
CFG19
BN22
CFG18
XDP_OBS0
BR27
XDP_OBS1
BT27 BM31 BT30
CPU_XDP_TDO
BT28
CPU_XDP_TDI
BL32
CPU_XDP_TMS
BP28
CPU_XDP_TCLK
BR28
CPU_XDP_TRST#
BP30
CPU_XDP_PREQ#
BL30
CPU_XDP_PRDY#
BP27
BT25
12
2016/01/01
2016/01/01
2016/01/01
ITP_PMODE_CPU
PCH_SPI_D2_XDP
1 2
RC228 0_0402_5%
1 2
RC229 0_0402_5%
1 2
RC230 0_0402_5%
1 2
RC143 0_0402_5%
1 2
RC314 0_0402_5%@
1 2
RC315 0_0402_5%@
1 2
RC239 0_0402_5%@
1 2
RC240 0_0402_5%@
PAD~D PAD~D PAD~D PAD~D
PAD~D PAD~D PAD~D
RC114
49.9_0402_1%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
@
T184
@
T185
@
T180
@
T181
@
T179
@
T190
@
T189
2
ITP_P MODE _CPU <20 >
PCH_SPI_D2_XDP <19>
PCH_JTAG_TMS <20> PCH_JTAG_TDI <20> PCH_JTAG_TDO <20> PCH_JTAGX <20> PCH_XDP_PRDY# <22> PCH_XDP_PREQ# <22>
XDP_OBS0_R XDP_OBS1_R
2017/01/01
2017/01/01
2017/01/01
1
+1.0V_PRIM_XDP
CPU_XDP_HOOK6
XDP_DBRESET#
CPU_XDP_TDO
CPU_XDP_TRST#
CPU_XDP_TCLK
CFG0
CFG2
CFG4
CFG5
CFG6
CFG7
1 2
RC115 2.2K_0402_5%XDP@
1 2
RC137 1.5K_0402_5%XDP@
1 2
RC135 51_0402_5%
1 2
RC136 51_0402_5%@
1 2
RC139 51_0402_5%
12
@
RC321 1K_0402_5%
12
@
RC181 1K_0402_5%
12
RC322 1K_0402_5%
+3.3V_ALW_PCH
+1.0V_VCCSTG
XDP_DBRESET#
Stall reset sequence after PCU PLL lock until de-asserted
PEG LANE REVERSAL
*
NORMAL LANE
REVERSED
eDP enable
Disabled
Enabled
12
@
RC323 1K_0402_5%
PCI Express* Bifurcation
1x8, 2x4
Reserved
12
RC324 1K_0402_5%
12
@
RC325 1K_0402_5%
2x8
1x16
PEG Training
(default) PEG Train immediately following RESET# de-assertion
PEG Wait for BIOS for training
0.1U_0402_25V6
1
2
No Stall
Stall
XDP@
CC32
1
0
1
0
1
0
[6:5]
00
01
10
11
1
0
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KBL-H (2/8)
KBL-H (2/8)
KBL-H (2/8)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
761
761
761
of
of
of
0.2
0.2
0.2
5
DDR_A_DQS#[0..7]<14> DDR_A_DQS[0..7]<14> DDR_B_DQS#[0..7]<15> DDR_B_DQS[0..7]<15>
D D
DDR_A_D[0..15]<14>
DDR_A_D[32..47]<14>
C C
DDR_B_D[0..15]<15>
DDR_B_D[32..47]<15>
B B
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15
DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47
UC1A
BR6
DDR0_DQ[0]
BT6
DDR0_DQ[1]
BP3
DDR0_DQ[2]
BR3
DDR0_DQ[3]
BN5
DDR0_DQ[4]
BP6
DDR0_DQ[5]
BP2
DDR0_DQ[6]
BN3
DDR0_DQ[7]
BL4
DDR0_DQ[8]
BL5
DDR0_DQ[9]
BL2
DDR0_DQ[10]
BM1
DDR0_DQ[11]
BK4
DDR0_DQ[12]
BK5
DDR0_DQ[13]
BK1
DDR0_DQ[14]
BK2
DDR0_DQ[15]
Interleave / Non-Interleaved
BG4
DDR0_DQ[16]/DDR0_DQ[32]
BG5
DDR0_DQ[17]/DDR0_DQ[33]
BF4
DDR0_DQ[18]/DDR0_DQ[34]
BF5
DDR0_DQ[19]/DDR0_DQ[35]
BG2
DDR0_DQ[20]/DDR0_DQ[36]
BG1
DDR0_DQ[21]/DDR0_DQ[37]
BF1
DDR0_DQ[22]/DDR0_DQ[38]
BF2
DDR0_DQ[23]/DDR0_DQ[39]
BD2
DDR0_DQ[24]/DDR0_DQ[40]
BD1
DDR0_DQ[25]/DDR0_DQ[41]
BC4
DDR0_DQ[26]/DDR0_DQ[42]
BC5
DDR0_DQ[27]/DDR0_DQ[43]
BD5
DDR0_DQ[28]/DDR0_DQ[44]
BD4
DDR0_DQ[29]/DDR0_DQ[45]
BC1
DDR0_DQ[30]/DDR0_DQ[46]
BC2
DDR0_DQ[31]/DDR0_DQ[47]
AB1
DDR0_DQ[32]/DDR1_DQ[0]
AB2
DDR0_DQ[33]/DDR1_DQ[1]
AA4
DDR0_DQ[34]/DDR1_DQ[2]
AA5
DDR0_DQ[35]/DDR1_DQ[3]
AB5
DDR0_DQ[36]/DDR1_DQ[4]
AB4
DDR0_DQ[37]/DDR1_DQ[5]
AA2
DDR0_DQ[38]/DDR1_DQ[6]
AA1
DDR0_DQ[39]/DDR1_DQ[7]
V5
DDR0_DQ[40]/DDR1_DQ[8]
V2
DDR0_DQ[41]/DDR1_DQ[9]
U1
DDR0_DQ[42]/DDR1_DQ[10]
U2
DDR0_DQ[43]/DDR1_DQ[11]
V1
DDR0_DQ[44]/DDR1_DQ[12]
V4
DDR0_DQ[45]/DDR1_DQ[13]
U5
DDR0_DQ[46]/DDR1_DQ[14]
U4
DDR0_DQ[47]/DDR1_DQ[15]
R2
DDR0_DQ[48]/DDR1_DQ[32]
P5
DDR0_DQ[49]/DDR1_DQ[33]
R4
DDR0_DQ[50]/DDR1_DQ[34]
P4
DDR0_DQ[51]/DDR1_DQ[35]
R5
DDR0_DQ[52]/DDR1_DQ[36]
P2
DDR0_DQ[53]/DDR1_DQ[37]
R1
DDR0_DQ[54]/DDR1_DQ[38]
P1
DDR0_DQ[55]/DDR1_DQ[39]
M4
DDR0_DQ[56]/DDR1_DQ[40]
M1
DDR0_DQ[57]/DDR1_DQ[41]
L4
DDR0_DQ[58]/DDR1_DQ[42]
L2
DDR0_DQ[59]/DDR1_DQ[43]
M5
DDR0_DQ[60]/DDR1_DQ[44]
M2
DDR0_DQ[61]/DDR1_DQ[45]
L5
DDR0_DQ[62]/DDR1_DQ[46]
L1
DDR0_DQ[63]/DDR1_DQ[47]
BA2
DDR0_ECC[0]
BA1
DDR0_ECC[1]
AY4
DDR0_ECC[2]
AY5
DDR0_ECC[3]
BA5
DDR0_ECC[4]
BA4
DDR0_ECC[5]
AY1
DDR0_ECC[6]
AY2
DDR0_ECC[7]
SKL-H_BGA1440
SKYLAKE_HALO
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR CH - A
1 OF 14
4
Rev_1.0
DDR0_CKP[0] DDR0_CKN[0] DDR0_CKN[1]
DDR0_CKP[1] DDR0_CLKP[2] DDR0_CLKN[2] DDR0_CLKP[3] DDR0_CLKN[3]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_CS#[2]
DDR0_CS#[3]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_ODT[2]
DDR3L / LPDDR3 / DDR4
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_ODT[3]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQSP[5]/DDR1_DQSP[1] DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQSP[7]/DDR1_DQSP[5]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSP[3]/DDR0_DQSP[5] DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_MA[3] DDR0_MA[4]
DDR0_PAR
DDR0_ALERT#
DDR0_DQSN[0] DDR0_DQSN[1]
Interleave / Non-Interleaved
DDR0_DQSP[0] DDR0_DQSP[1]
DDR0_DQSP[8] DDR0_DQSN[8]
AG1 AG2 AK1 AK2 AL3 AK3 AL2 AL1
AT1 AT2 AT3 AT5
AD5 AE2 AD2 AE5
AD3 AE4 AE1 AD4
AH5 AH1 AU1
AH4 AG4 AD1
AH3 AP4 AN4 AP5 AP2 AP1 AP3 AN1 AN3 AT4 AH2 AN2 AU4 AE3 AU2 AU3
AG3 AU5
BR5 BL3
BG3 BD3 AB3 V3 R3 M3 BP5 BK3 BF3 BC3 AA3 U3 P3 L3
AY3 BA3
DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK#1 DDR_A_CLK1
DDR_A_CKE0 DDR_A_CKE1
DDR_A_CS#0 DDR_A_CS#1
DDR_A_ODT0 DDR_A_ODT1
DDR_A_BA0 DDR_A_BA1 DDR_A_BG0
DDR_A_MA16 DDR_A_MA14 DDR_A_MA15
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_BG1 DDR_A_ACT#
DDR_A_PARITY DDR_A_ALERT#
DDR_A_DQS#0 DDR_A_DQS#1
DDR_A_DQS#4 DDR_A_DQS#5 DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS4 DDR_B_DQS5 DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS4 DDR_A_DQS5 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#4 DDR_B_DQS#5
DDR_A_CLK0 <14> DDR_A_CLK#0 <14> DDR_A_CLK#1 <14> DDR_A_CLK1 <14>
DDR_A_CKE0 <14> DDR_A_CKE1 <14>
DDR_A_CS#0 <14> DDR_A_CS#1 <14>
DDR_A_ODT0 <14> DDR_A_ODT1 <14>
DDR_A_BA0 <14> DDR_A_BA1 <14> DDR_A_BG0 <14> DDR_A_MA[0..16] <14>
DDR_A_BG1 <14> DDR_A_ACT# <14>
DDR_A_PARITY <14> DDR_A_ALERT# <14>
DDR_A_DQS#0 <14> DDR_A_DQS#1 <14>
DDR_A_DQS#4 <14> DDR_A_DQS#5 <14> DDR_B_DQS0 <15> DDR_B_DQS1 <15> DDR_B_DQS4 <15> DDR_B_DQS5 <15> DDR_A_DQS0 <14> DDR_A_DQS1 <14> DDR_A_DQS4 <14> DDR_A_DQS5 <14> DDR_B_DQS#0 <15> DDR_B_DQS#1 <15> DDR_B_DQS#4 <15> DDR_B_DQS#5 <15>
3
DDR_A_D[16..31]<14>
DDR_A_D[48..63]<14>
DDR_B_D[16..31]<15>
DDR_B_D[48..63]<15>
RC5 121_0402_1% RC6 75_0402_1% RC7 100_0402_1%
1 2 1 2 1 2
DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31
DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
DDR_RCOMP0 DDR_RCOMP1 DDR_RCOMP2
UC1B
Interleave / Non-Interleaved
BT11
DDR1_DQ[0]/DDR0_DQ[16]
BR11
DDR1_DQ[1]/DDR0_DQ[17]
BT8
DDR1_DQ[2]/DDR0_DQ[18]
BR8
DDR1_DQ[3]/DDR0_DQ[19]
BP11
DDR1_DQ[4]/DDR0_DQ[20]
BN11
DDR1_DQ[5]/DDR0_DQ[21]
BP8
DDR1_DQ[6]/DDR0_DQ[22]
BN8
DDR1_DQ[7]/DDR0_DQ[23]
BL12
DDR1_DQ[8]/DDR0_DQ[24]
BL11
DDR1_DQ[9]/DDR0_DQ[25]
BL8
DDR1_DQ[10]/DDR0_DQ[26]
BJ8
DDR1_DQ[11]/DDR0_DQ[27]
BJ11
DDR1_DQ[12]/DDR0_DQ[28]
BJ10
DDR1_DQ[13]/DDR0_DQ[29]
BL7
DDR1_DQ[14]/DDR0_DQ[30]
BJ7
DDR1_DQ[15]/DDR0_DQ[31]
BG11
DDR1_DQ[16]/DDR0_DQ[48]
BG10
DDR1_DQ[17]/DDR0_DQ[49]
BG8
DDR1_DQ[18]/DDR0_DQ[50]
BF8
DDR1_DQ[19]/DDR0_DQ[51]
BF11
DDR1_DQ[20]/DDR0_DQ[52]
BF10
DDR1_DQ[21]/DDR0_DQ[53]
BG7
DDR1_DQ[22]/DDR0_DQ[54]
BF7
DDR1_DQ[23]/DDR0_DQ[55]
BB11
DDR1_DQ[24]/DDR0_DQ[56]
BC11
DDR1_DQ[25]/DDR0_DQ[57]
BB8
DDR1_DQ[26]/DDR0_DQ[58]
BC8
DDR1_DQ[27]/DDR0_DQ[59]
BC10
DDR1_DQ[28]/DDR0_DQ[60]
BB10
DDR1_DQ[29]/DDR0_DQ[61]
BC7
DDR1_DQ[30]/DDR0_DQ[62]
BB7
DDR1_DQ[31]/DDR0_DQ[63]
AA11
DDR1_DQ[32]/DDR1_DQ[16]
AA10
DDR1_DQ[33]/DDR1_DQ[17]
AC11
DDR1_DQ[34]/DDR1_DQ[18]
AC10
DDR1_DQ[35]/DDR1_DQ[19]
AA7
DDR1_DQ[36]/DDR1_DQ[20]
AA8
DDR1_DQ[37]/DDR1_DQ[21]
AC8
DDR1_DQ[38]/DDR1_DQ[22]
AC7
DDR1_DQ[39]/DDR1_DQ[23]
W8
DDR1_DQ[40]/DDR1_DQ[24]
W7
DDR1_DQ[41]/DDR1_DQ[25]
V10
DDR1_DQ[42]/DDR1_DQ[26]
V11
DDR1_DQ[43]/DDR1_DQ[27]
W11
DDR1_DQ[44]/DDR1_DQ[28]
W10
DDR1_DQ[45]/DDR1_DQ[29]
V7
DDR1_DQ[46]/DDR1_DQ[30]
V8
DDR1_DQ[47]/DDR1_DQ[31]
R11
DDR1_DQ[48]
P11
DDR1_DQ[49]
P7
DDR1_DQ[50]
R8
DDR1_DQ[51]
R10
DDR1_DQ[52]
P10
DDR1_DQ[53]
R7
DDR1_DQ[54]
P8
DDR1_DQ[55]
L11
DDR1_DQ[56]
M11
DDR1_DQ[57]
L7
DDR1_DQ[58]
M8
DDR1_DQ[59]
L10
DDR1_DQ[60]
M10
DDR1_DQ[61]
M7
DDR1_DQ[62]
L8
DDR1_DQ[63]
AW11
DDR1_ECC[0]
AY11
DDR1_ECC[1]
AY8
DDR1_ECC[2]
AW8
DDR1_ECC[3]
AY10
DDR1_ECC[4]
AW10
DDR1_ECC[5]
AY7
DDR1_ECC[6]
AW7
DDR1_ECC[7]
G1
DDR_RCOMP[0]
H1
DDR_RCOMP[1]
J2
DDR_RCOMP[2]
SKL-H_BGA1440
2
SKYLAKE_HALO
DDR3L / LPDDR3 / DDR4
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
Interleave / Non-Interleaved
DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQSP[1]/DDR0_DQSP[3] DDR1_DQSP[2]/DDR0_DQSP[6] DDR1_DQSP[3]/DDR0_DQSP[7] DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_DQSP[5]/DDR1_DQSP[3]
DDR CH - B
2 OF 14
Rev_1.0
DDR1_CKP[0] DDR1_CKN[0] DDR1_CKN[1]
DDR1_CKP[1] DDR1_CLKP[2] DDR1_CLKN[2] DDR1_CLKP[3] DDR1_CLKN[3]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_CS#[2]
DDR1_CS#[3]
DDR1_ODT[0]
DDR1_ODT[1]
DDR1_ODT[2]
DDR1_ODT[3]
DDR1_MA[3] DDR1_MA[4]
DDR1_PAR
DDR1_ALERT#
DDR1_DQSN[6] DDR1_DQSN[7]
DDR1_DQSP[6] DDR1_DQSP[7]
DDR1_DQSP[8] DDR1_DQSN[8]
DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ
AM9 AN9 AM8 AM7 AM11 AM10 AJ10 AJ11
AT8 AT10 AT7 AT11
AF11 AE7 AF10 AE10
AF7 AE8 AE9 AE11
AH10 AH11 AF8
AH8 AH9 AR9
AJ9 AK6 AK5 AL5 AL6 AM6 AN7 AN10 AN8 AR11 AH7 AN11 AR10 AF9 AR7 AT9
AJ7 AR8
BP9 BL9 BG9 BC9 AC9 W9 R9 M9
BR9 BJ9 BF9 BB9 AA9 V9 P9 L9
AW9 AY9
BN13 BP13 BR13
DDR_B_CLK0 DDR_B_CLK#0 DDR_B_CLK#1 DDR_B_CLK1
DDR_B_CKE0 DDR_B_CKE1
DDR_B_CS#0 DDR_B_CS#1
DDR_B_ODT0 DDR_B_ODT1
DDR_B_MA16 DDR_B_MA14 DDR_B_MA15
DDR_B_BA0
DDR_B_BA1 DDR_B_BG0
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_BG1 DDR_B_ACT#
DDR_B_PARITY DDR_B_ALERT#
DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#6 DDR_A_DQS#7 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#6 DDR_B_DQS#7
DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS6 DDR_A_DQS7 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS6 DDR_B_DQS7
1
+DDR_VREF_CA
PAD~D
+DDR_VREF_B_DQ
DDR_B_CLK0 <15> DDR_B_CLK#0 <15> DDR_B_CLK#1 <15> DDR_B_CLK1 <15>
DDR_B_CKE0 <15> DDR_B_CKE1 <15>
DDR_B_CS#0 <15> DDR_B_CS#1 <15>
DDR_B_ODT0 <15> DDR_B_ODT1 <15>
DDR_B_MA[0..16] <15>
DDR_B_BA0 <15> DDR_B_BA1 <15> DDR_B_BG0 <15>
DDR_B_BG1 <15> DDR_B_ACT# <15>
DDR_B_PARITY <15> DDR_B_ALERT# <15>
DDR_A_DQS#2 <14> DDR_A_DQS#3 <14> DDR_A_DQS#6 <14> DDR_A_DQS#7 <14> DDR_B_DQS#2 <15> DDR_B_DQS#3 <15> DDR_B_DQS#6 <15> DDR_B_DQS#7 <15>
DDR_A_DQS2 <14> DDR_A_DQS3 <14> DDR_A_DQS6 <14> DDR_A_DQS7 <14> DDR_B_DQS2 <15> DDR_B_DQS3 <15> DDR_B_DQS6 <15> DDR_B_DQS7 <15>
@
T199
Trace width=12-15 mils ,Spacing=20mil Max length= 500 mils.
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KBL-H (3/8)
KBL-H (3/8)
KBL-H (3/8)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
861
861
861
of
of
of
0.2
0.2
0.2
5
D D
4
3
2
1
CPU_DP1_P0<26> CPU_DP1_N0<26> CPU_DP1_P1<26> CPU_DP1_N1<26>
HDMI
C C
Type C
WIGIG , VGA
B B
CPU_DP1_P2<26> CPU_DP1_N2<26> CPU_DP1_P3<26> CPU_DP1_N3<26>
CPU_DP2_P0<28> CPU_DP2_N0<28> CPU_DP2_P1<28> CPU_DP2_N1<28> CPU_DP2_P2<28> CPU_DP2_N2<28> CPU_DP2_P3<28> CPU_DP2_N3<28>
CPU_DP2_AUXP<28,29> CPU_DP2_AUXN<28,29>
CPU_DP3_P0<25> CPU_DP3_N0<25> CPU_DP3_P1<25> CPU_DP3_N1<25> CPU_DP3_P2<25> CPU_DP3_N2<25> CPU_DP3_P3<25> CPU_DP3_N3<25>
CPU_DP3_AUXP<25> CPU_DP3_AUXN<25>
CPU_DP1_P0 CPU_DP1_N0 CPU_DP1_P1 CPU_DP1_N1 CPU_DP1_P2 CPU_DP1_N2 CPU_DP1_P3 CPU_DP1_N3
CPU_DP2_P0 CPU_DP2_N0 CPU_DP2_P1 CPU_DP2_N1 CPU_DP2_P2 CPU_DP2_N2 CPU_DP2_P3 CPU_DP2_N3
CPU_DP2_AUXP CPU_DP2_AUXN
CPU_DP3_P0 CPU_DP3_N0 CPU_DP3_P1 CPU_DP3_N1 CPU_DP3_P2 CPU_DP3_N2 CPU_DP3_P3 CPU_DP3_N3
CPU_DP3_AUXP CPU_DP3_AUXN
UC1D
K36
DDI1_TXP[0]
K37
DDI1_TXN[0]
J35
DDI1_TXP[1]
J34
DDI1_TXN[1]
H37
DDI1_TXP[2]
H36
DDI1_TXN[2]
J37
DDI1_TXP[3]
J38
DDI1_TXN[3]
D27
DDI1_AUXP
E27
DDI1_AUXN
H34
DDI2_TXP[0]
H33
DDI2_TXN[0]
F37
DDI2_TXP[1]
G38
DDI2_TXN[1]
F34
DDI2_TXP[2]
F35
DDI2_TXN[2]
E37
DDI2_TXP[3]
E36
DDI2_TXN[3]
F26
DDI2_AUXP
E26
DDI2_AUXN
C34
DDI3_TXP[0]
D34
DDI3_TXN[0]
B36
DDI3_TXP[1]
B34
DDI3_TXN[1]
F33
DDI3_TXP[2]
E33
DDI3_TXN[2]
C33
DDI3_TXP[3]
B33
DDI3_TXN[3]
A27
DDI3_AUXP
B27
DDI3_AUXN
SKL-H_BGA1440
SKYLAKE_HALO
4 OF 14
Rev_1.0
EDP_TXP[0] EDP_TXN[0] EDP_TXP[1] EDP_TXN[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3]
EDP_AUXP EDP_AUXN
EDP_DISP_UTIL
EDP_RCOMP
PROC_AUDIO_CLK
PROC_AUDIO_SDI
PROC_AUDIO_SDO
EDP_TXP0
D29
EDP_TXN0
E29
EDP_TXP1
F28
EDP_TXN1
E28 B29 A29 B28 C28
EDP_AUXP
C26
EDP_AUXN
B26
A33
EDP_COMP
D37
AUD_AZACPU_SCLK
G27
AUD_AZACPU_SDO
G25
AUD_AZACPU_SDI
G29
AUD_AZACPU_SDI AUD_AZACPU_SDI_R
@
T194
PAD~D
RC66 20_0402_5%
1 2
EDP_TXP0 <32> EDP_TXN0 <32> EDP_TXP1 <32> EDP_TXN1 <32>
EDP_AUXP <32> EDP_AUXN <32>
AUD_AZACPU_SCLK <20> AUD_AZACPU_SDO <20>
EDP_COMP
Trace width=5 mils ,Spacing=20mil Max length= 600 mils.
AUD_AZACPU_SDI_R <20>
+1.0VS_VCCIO
1 2
RC1 24.9_0402_1%
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KBL-H (4/8)
KBL-H (4/8)
KBL-H (4/8)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A
A
A
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
961
961
961
1
of
of
of
0.2
0.2
0.2
5
D D
+VCC_EDRAM
3.3A
+VCC_EDRAM_ED2
C C
+VCC_EOPIO
+VCC_EOPIO_ED2
B B
3.2A
BJ17 BJ19 BJ20 BK17 BK19 BK20 BL16 BL17 BL18 BL19 BL20 BL21 BM17 BN17
BJ23 BJ26 BJ27 BK23 BK26 BK27 BL23 BL24 BL25 BL26 BL27 BL28 BM24
BL15 BM16
BL22 BM22
BP15 BR15 BT15
BP16 BR16 BT16
BN15 BM15
BP17 BN16
BM14 BL14
BJ35 BJ36
AT13
AW13
AU13 AY13
BT29 BR25 BP25
4
UC1J
VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
VCCOPC_SENSE VSSOPC_SENSE
RSVD RSVD
VCCEOPIO VCCEOPIO VCCEOPIO
RSVD RSVD RSVD
VCCEOPIO_SENSE VSSEOPIO_SENSE
RSVD RSVD
VCC_OPC_1P8 VCC_OPC_1P8
RSVD RSVD
ZVM# MSM#
ZVM2# MSM2#
OPC_RCOMP OPCE_RCOMP OPCE_RCOMP2
SKL-H_BGA1440
SKYLAKE_HALO
10 OF 14
Rev_1.0
3
T1PAD~D @ T2PAD~D @ T3PAD~D @ T4PAD~D @
T5PAD~D @ T6PAD~D @
T7PAD~D @ T9PAD~D @
T10PAD~D @ T11PAD~D @ T8PAD~D @
T14PAD~D @ T13PAD~D @ T15PAD~D @ T12PAD~D @
TP_SKL_F30 TP_SKL_E30
PCH_2_CPU_TRIGGER CPU_2_PCH_TRIGGER_R
TP_SKL_F30 TP_SKL_E30
T18PAD~D @ T19PAD~D @
T21PAD~D @ T20PAD~D @
T23PAD~D @ T24PAD~D @ T22PAD~D @
1 2
RC177 30_0402_5%
1 2 1 2
RC178 0_0402_5%@ RC179 0_0402_5%@
CPU_2_PCH_TRIGGER_RCPU_2_PCH_TRIGGER
PCH_2_CPU_TRIGGER<22>
CPU_2_PCH_TRIGGER<22>
BN35
BN33
BL34
AE29 AA14
BR35 BR31 BH30
D1 E1 E3 E2
BR1
BT2
J24
H24
N29 R14
A36 A37
H23
J23
F30 E30
B30 C30
G3 J3
2
UC1K
RSVD_TP RSVD_TP RSVD_TP RSVD_TP
RSVD_TP RSVD_TP
RSVD RSVD
RSVD RSVD RSVD
RSVD RSVD RSVD RSVD
RSVD RSVD
PROC_TRIGIN PROC_TRIGOUT
RSVD RSVD
RSVD RSVD
RSVD RSVD
RSVD RSVD RSVD
SKL-H_BGA1440
SKYLAKE_HALO
11 OF 14
Rev_1.0
RSVD_TP RSVD_TP
RSVD_TP RSVD_TP
RSVD RSVD
RSVD_TP RSVD_TP
RSVD_TP RSVD_TP
RSVD RSVD
RSVD RSVD
RSVD_TP RSVD_TP
RSVD RSVD RSVD
NCTF NCTF NCTF NCTF NCTF NCTF
1
BM33 BL33
BJ14 BJ13
BK28 BJ28
BJ18
VSS
BJ16 BK16
BK24 BJ24
BK21 BJ21
BT17 BR17
BK18
VSS
BJ34 BJ33
G13 AJ8 BL31
B2 B38 BP1 BR2 C1 C38
T26 PAD~D@ T25 PAD~D@
T28 PAD~D@ T27 PAD~D@
T29 PAD~D@ T30 PAD~D@
T31 PAD~D@
T32 PAD~D@
T34 PAD~D@ T33 PAD~D@
T36 PAD~D@ T35 PAD~D@
T37 PAD~D@
T38 PAD~D@
T39 PAD~D@ T40 PAD~D@
T42 PAD~D@ T41 PAD~D@ T44 PAD~D@
T43 PAD~D@ T45 PAD~D@ T46 PAD~D@ T47 PAD~D@ T48 PAD~D@ T49 PAD~D@
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KBL-H (5/8)
KBL-H (5/8)
KBL-H (5/8)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
10 61
10 61
10 61
of
of
of
0.2
0.2
0.2
5
4
3
2
1
+VCC_GT
BG34 BG35 BG36 BH33 BH34
D D
C C
BH35 BH36 BH37 BH38
BJ37 BJ38 BL36
BL37 BM36 BM37 BN36 BN37 BN38 BP37 BP38 BR37 BT37 BE38 BF13 BF14 BF29 BF30 BF31 BF32 BF35 BF36 BF37 BF38 BG29 BG30 BG31 BG32 BG33 BC36 BC37 BC38 BD13 BD14 BD29 BD30 BD31 BD32 BD33 BD34 BD35 BD36 BE31 BE32 BE37
UC1H
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
SKL-H_BGA1440
SKYLAKE_HALO
8 OF 14
Rev_1.0
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
AV29 AV30 AV31 AV32 AV33 AV34 AV35 AV36 AW14 AW31 AW32 AW33 AW34 AW35 AW36 AW37 AW38 AY29 AY30 AY31 AY32 AY35 AY36 AY37 AY38 BA13 BA14 BA29 BA30 BA31 BA32 BA33 BA34 BA35 BA36 BB13 BB14 BB31 BB32 BB33 BB34 BB35 BB36 BB37 BB38 BC29 BC30 BC31 BC32 BC35 BE33 BE34 BE35 BE36
+VCC_GT
+1.0VS_VCCIO
+VCC_SA
AG12
J30 K29 K30 K31 K32 K33 K34 K35 L31 L32 L35 L36 L37
L38 M29 M30 M31 M32 M33 M34 M35 M36
G15 G17 G19 G21 H15 H16 H17 H19 H20 H21 H26 H27
J15 J16 J17 J19 J20 J21 J26 J27
UC1I
VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA
VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO
SKL-H_BGA1440
SKYLAKE_HALO
9 OF 14
Rev_1.0
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDDQC
VCCPLL_OC VCCPLL_OC
VCCST VCCSTG VCCSTG
VCCPLL VCCPLL
VCCSA_SENSE VSSSA_SENSE
VCCIO_SENSE VSSIO_SENSE
AA6 AE12 AF5 AF6 AG5 AG9 AJ12 AL11 AP6 AP7 AR12 AR6 AT12 AW6 AY6 J5 J6 K12 K6 L12 L6 R6 T6 W6
Y12 BH13
G11
H30 H29 G30 H28
J28
M38 M37
H14 J14
+1.2V_MEM
12A
+VCC_VDDQ_CLK +VCC_SFR_OC
+1.0V_VCCST +1.0V_VCCSTG
+VCC_FUSEPRG
+1.0V_VCCSFR
VCC_SA_ SENSE <54> VSS_SA_S ENSE <5 4>
VCC_IO_S ENSE <52> VSS_IO_SENSE < 52>
1 2
RC220 0_0402_5%
+1.0V_VCCSTG +1.0V_VCCST
1 2
RZ151 0_0402_5%@
+VCCPLL_OC source
1 2
RC326 0_0603_5%
+1.2V_MEM+VCC_VDDQ_CLK
VCCSTG_EN
SIO_SLP_SUS#<20,37,46,51,53> SIO_SLP_S4#<11,20,21,37,50,53>
+1.0V_VCCSTG
RZ120 0_0402_5%
+VCC_SFR_OC
1
2
CC322
RF@
2.2P_0402_50V8C
'()'*+,*-.
1 2
CZ102 1U_0402_6.3V6K
+5V_ALW
1 2
+3.3V_ALW
@
CZ104
1 2
0.1U_0402_10V7K
5
1
P
B
4
Y
2
A
G
UZ34
@
TC7SH08FU_SSOP5
3
+1.2V_MEM
PDDG page19, if don`t support DS3, contact to VDDQ directly
+VCC_SFR_OC
1 2
RZ119 0_0402_5%@
UZ26
1
VIN1
2
VIN2
7
VIN thermal
3
VBIAS
4
ON
TPS22961DNYR_WSON8
VOUT
GND
6
5
1 2
CZ103 0.1U_0201_10V6K
VOUT
GND
+1.0V_VCCSTG
6
5
4
12
PJP2
PAD-OPEN1x1m
+1.0V_VCCSTG_C
1 2
CZ106 0.1U_0402_10V7K
+1.0V_PRIM
+5V_ALW
1U_0402_6.3V6K
1
CZ100
2
SIO_SLP_S4#<11,20,21,37,50,53>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
+1.0V_VCCST source
UZ21
1
VIN1
2
VIN2
7
VIN thermal
3
VBIAS
4
ON
TPS22961DNYR_WSON8
4.4mohm/6A TR=12.5us@Vin=1.05V
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
VOUT
GND
2
6
5
2017/01/01
2017/01/01
2017/01/01
+1.0V_VCCST_C
+1.0V_VCCST
PJP1
12
PAD-OPEN1x1m
0.1U_0402_10V7K
1
CZ101
2
+1.0V_VCCSFR
1 2
RC304 0_0402_5%
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KBL-H (6/8)
KBL-H (6/8)
KBL-H (6/8)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
11 61
11 61
11 61
of
of
of
0.2
0.2
0.2
B B
SIO_SLP_S0#<20,21,39,52>
RUN_ON<37,38,46,52>
SN74AHC1G08DCKR_SC70-5
A A
5
+1.0V_VCCSTG source
+5V_ALW
1U_0402_6.3V6K
1
CZ105
2
+3.3V_ALW
5
1
P
IN1
VCCSTG_EN
4
O
2
IN2
RZ320 0_0402_5%@
G
3
1 2
UZ35
+1.0V_PRIM
UZ19
1
VIN1
2
VIN2
7
VIN thermal
3
VBIAS
4
ON
TPS22961DNYR_WSON8
4.4mohm/6A TR=12.5us@Vin=1.05V
5
4
3
2
1
12
1
2
1U_0402_6.3V6K
2
1
22U_0603_6.3V6M
CC187
10U_0603_6.3V6M~D
CC167
PLACE CAP BACKSIDE
+1.0V_VCCSFR +1.0V_VCCST
1U_0402_6.3V6K
2
CC186
CC195
1
22U_0603_6.3V6M
CC272
12
+VCC_SFR_OC
1U_0402_6.3V6K
2
CC192
1
1U_0402_6.3V6K
2
CC191
1
1U_0402_6.3V6K
1U_0402_6.3V6K
2
2
CC210
1
1
'*/01*).0)#02*3)456&&789):;<=
+VCC_GT
SKYLAKE_HALO
UC1N
AJ29
VCCGT
CC209
AJ30 AJ31 AJ32 AJ33 AJ34 AJ35 AJ36 AK31 AK32 AK33 AK34 AK35 AK36 AK37 AK38 AL13 AL29 AL30 AL31 AL32 AL35 AL36 AL37 AL38 AM13 AM14 AM29 AM30 AM31 AM32 AM33 AM34 AM35 AM36 AN13 AN14 AN31 AN32 AN33 AN34 AN35 AN36 AN37 AN38 AP13 AP14 AP29 AP30 AP31 AP32 AP35 AP36 AP37 AP38 AR29 AR30 AR31 AR32 AR33 AR34 AR35 AR36 AT14 AT31 AT32 AT33 AT34 AT35 AT36 AT37 AT38 AU14 AU29 AU30 AU31 AU32 AU35 AU36 AU37 AU38
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
SKL-H_BGA1440
14 OF 14
Rev_1.0
VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX
VCCGT_SENSE
VSSGTX_SENSE
VSSGT_SENSE
VCCGTX_SENSE
+VCC_GTU
AF29 AF30 AF31 AF32 AF33 AF34 AG13 AG14 AG31 AG32 AG33 AG34 AG35 AG36 AH13 AH14 AH29 AH30 AH31 AH32 AJ13 AJ14
'*-*31*)>03)80?@*3ABC
AH38 AH35 AH37 AH36
VCC_GT _SENSE <54> VSS_GT_SENSE <54>
+VCC_CORE
SKYLAKE_HALO
UC1G
AA13
VCC
AA31
VCC
AA32
VCC
AA33
VCC
AA34
VCC
AA35
VCC
AA36
VCC
AA37
VCC
AA38
VCC
AB29
VCC
AB30
VCC
AB31
VCC
AB32
VCC
AB35
VCC
AB36
VCC
AB37
VCC
AB38
VCC
AC13
VCC
AC14
VCC
AC29
VCC
AC30
VCC
AC31
VCC
AC32
VCC
AC33
VCC
AC34
VCC
AC35
VCC
AC36
VCC
AD13
VCC
AD14
VCC
AD31
VCC
AD32
VCC
AD33
VCC
AD34
VCC
AD35
VCC
AD36
VCC
AD37
VCC
AD38
VCC
AE13
VCC
AE14
VCC
AE30
VCC
AE31
VCC
AE32
VCC
AE35
VCC
AE36
VCC
AE37
VCC
AE38
VCC
AF35
VCC
AF36
VCC
AF37
VCC
AF38
VCC
K13
VCC
K14
VCC
L13
VCC
N13
VCC
N14
VCC
N30
VCC
N31
VCC
N32
VCC
N35
VCC
N36
VCC
N37
VCC
N38
VCC
P13
VCC
VCC_SENSE
VSS_SENSE
7 OF 14
SKL-H_BGA1440
VSS_SEN SE VCC_SENSE
RC221 49.9_0402_1%@
1 2
Rev_1.0
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
V32 V33 V34 V35 V36 V37 V38 W13 W14 W29 W30 W31 W32 W35 W36 W37 W38 Y29 Y30 Y31 Y32 Y33 Y34 Y35 Y36 L14 P29 P30 P31 P32 P33 P34 P35 P36 R13 R31 R32 R33 R34 R35 R36 R37 R38 T29 T30 T31 T32 T35 T36 T37 T38 U29 U30 U31 U32 U33 U34 U35 U36 V13 V14 V31 P14
AG37 AG38
+VCC_CORE
VCC_SENSE
VSS_SEN SE
+VCC_CORE
12
12
100_0402_1%
RC140
100_0402_1%
RC141
VCC_SENSE <54> VSS_SEN SE <54>
D D
For SKL-H 4+2 Remove VCCOPC/VCCEOPIO/ VCCOPC_1P8 Cap
C C
+1.2V_MEM
B B
+1.2V_MEM DECOUPLING
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC161
2
2
22U_0603_6.3V6M
12
CC81
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC170
12
CC168
CC164
2
2
22U_0603_6.3V6M
22U_0603_6.3V6M
12
CC82
CC83
10U_0603_6.3V6M~D
1
2
22U_0603_6.3V6M
12
CC84
+VCC_VDDQ_CLK +1.0V_VCCSTG
+1.0VS_VCCIO
PLACE CAP BACKSIDE
10U_0603_6.3V6M~D
1
1
CC163
CC166
2
2
1
2
PLACE CAP BACKSIDE
12
+1.0V_VCCST
10U_0603_6.3V6M~D
1
CC171
2
10U_0603_6.3V6M~D
CC185
22U_0603_6.3V6M
22U_0603_6.3V6M
CC189
CC188
12
1U_0402_6.3V6K
1U_0402_6.3V6K
2
2
CC194
CC193
1
1
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CC165
CC172
2
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KBL-H (7/8)
KBL-H (7/8)
KBL-H (7/8)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
12 61
12 61
12 61
of
of
of
0.2
0.2
0.2
5
SKYLAKE_HALO
UC1F
Y38
VSS
Y37
VSS
Y14
VSS
Y13
VSS
Y11
VSS
Y10
VSS
Y9
VSS
Y8
VSS
D D
C C
B B
Y7 W34 W33 W12
W5 W4 W3 W2
W1 V30 V29 V12
V6 U38 U37
U6
T34 T33 T14 T13 T12 T11 T10
T9
T8
T7
T5
T4
T3
T2
T1 R30 R29 R12 P38 P37 P12
P6 N34 N33 N12 N11 N10
N9
N8
N7
N6
N5
N4
N3
N2
N1 M14 M13 M12
M6 L34 L33 L30 L29
K38 K11 K10
K9 K8 K7 K5 K4 K3 K2
SKL-H_BGA1440
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
6 OF 14
Rev_1.0
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
NCTFVSS
K1 J36 J33 J32 J25 J22 J18 J10 J7 J4 H35 H32 H25 H22 H18 H12 H11 G28 G26 G24 G23 G22 G20 G18 G16 G14 G12 G10 G9 G8 G6 G5 G4 F36 F31 F29 F27 F25 F23 F21 F19 F17 F15 F13 F11 F9 F8 F5 F4 F3 F2 E38 E35 E34 E9 E4 D33 D30 D28 D26 D24 D22 D20 D18 D16 D14 D12 D10 D9 D6 D3 C37 C31 C29 C27
D38
4
SKYLAKE_HALO
UC1M
BB4
VSS
BB3
VSS
BB2
VSS
BB1
VSS
BA38
VSS
BA37
VSS
BA12
VSS
BA11
VSS
BA10
VSS
BA9
VSS
BA8
VSS
BA7
VSS
BA6
VSS
B9
VSS
AY34
VSS
AY33
VSS
AY14
VSS
AY12
VSS
AW30
VSS
AW29
VSS
AW12
VSS
AW5
VSS
AW4
VSS
AW3
VSS
AW2
VSS
AW1
VSS
AV38
VSS
AV37
VSS
AU34
VSS
AU33
VSS
AU12
VSS
AU11
VSS
AU10
VSS
AU9
VSS
AU8
VSS
AU7
VSS
AU6
VSS
AT30
VSS
AT29
VSS
AT6
VSS
AR38
VSS
AR37
VSS
AR14
VSS
AR13
VSS
AR5
VSS
AR4
VSS
AR3
VSS
AR2
VSS
AR1
VSS
AP34
VSS
AP33
VSS
AP12
VSS
AP11
VSS
AP10
VSS
AP9
VSS
AP8
VSS
AN30
VSS
AN29
VSS
AN12
VSS
AN6
VSS
AN5
VSS
AM38
VSS
AM37
VSS
AM12
VSS
AM5
VSS
AM4
VSS
AM3
VSS
AM2
VSS
AM1
VSS
AL34
VSS
AL33
VSS
AL14
VSS
AL12
VSS
AL10
VSS
AL9
VSS
AL8
VSS
AL7
VSS
AL4
VSS
SKL-H_BGA1440
13 OF 14
Rev_1.0
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
NCTFVSS NCTFVSS NCTFVSS NCTFVSS NCTFVSS
3
AK30 AK29 AK4 AJ38 AJ37 AJ6 AJ5 AJ4 AJ3 AJ2 AJ1 AH34 AH33 AH12 AH6 AG30 AG29 AG11 AG10 AG8 AG7 AG6 AF14 AF13 AF12 AF4 AF3 AF2 AF1 AE34 AE33 AE6 AD30 AD29 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AC38 AC37 AC12 AC6 AC5 AC4 AC3 AC2 AC1 AB34 AB33 AB6 AA30 AA29 AA12 A30 A28 A26 A24 A22 A20 A18 A16 A14 A12 A10 A9 A6
B37 B3 A34 A4 A3
C17 C13
BT32 BT26 BT24 BT21 BT18 BT14 BT12
BT9
BT5 BR36 BR34 BR29 BR26 BR24 BR21 BR18 BR14 BR12
BR7 BP34 BP33 BP29 BP26 BP24 BP21 BP18 BP14 BP12
BP7 BN34 BN31 BN30 BN29 BN24 BN21 BN20 BN19 BN18 BN14 BN12
BN9
BN7
BN4
BN2
BM38 BM35 BM28 BM27 BM26 BM23 BM21 BM13 BM12
BM9 BM6
BM2 BL29 BK29 BK15 BK14 BJ32 BJ31 BJ25 BJ22 BH14 BH12
BH9 BH8 BH5 BH4
BH1 BG38 BG13 BG12
BF33 BF12 BE29
BE6
BD9
BC34 BC12 BB12
2
C9
UC1L
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
SKL-H_BGA1440
SKYLAKE_HALO
12 OF 14
Rev_1.0
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
NCTFVSS NCTFVSS NCTFVSS NCTFVSS NCTFVSS NCTFVSS
C25 C23 C21 C19 C15 C11 C8 C5 BM29 BM25 BM18 BM11 BM8 BM7 BM5 BM3 BL38 BL35 BL13 BL6 BK25 BK22 BK13 BK6 BJ30 BJ29 BJ15 BJ12 BH11 BH10 BH7 BH6 BH3 BH2 BG37 BG14 BG6 BF34 BF6 BE30 BE5 BE4 BE3 BE2 BE1 BD38 BD37 BD12 BD11 BD10 BD8 BD7 BD6 BC33 BC14 BC13 BC6 BB30 BB29 BB6 BB5
C2 BT36 BT35 BT4 BT3 BR38
1
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KBL-H (8/8)
KBL-H (8/8)
KBL-H (8/8)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A
A
A
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
13 61
13 61
13 61
of
of
of
0.2
0.2
0.2
5
DDR_A_DQS#[0..7]<8> DDR_A_DQS[0..7]<8>
DDR_A_D[0..15]<8> DDR_A_D[16..31]<8> DDR_A_D[32..47]<8> DDR_A_D[48..63]<8>
DDR_A_MA[0..16]<8>
D D
C C
B B
A A
Layout Note: Place near JDIMM1
+1.2V_MEM
1
2
1
2
+0.6V_DDR_VTT
DIMM Select
DIMM1
*
DIMM2
DIMM3
DIMM4
Byte[0] Byte[1] Byte[2] Byte[3]
*
Byte[4] Byte[5]
*
Byte[6] Byte[7]
10U_0603_6.3V6M
10U_0603_6.3V6M
CD1
CD2
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CD9
CD10
2
Layout Note: Place near JDIMM1.258
10U_0603_6.3V6M
CD22
1
2
SA01SA1
0
1
0
1
DQ[7:0] DQ[15:8]
DQ[23:16] DQ[31:24]
DQ[39:32] DQ[47:40] DQ[55:48] DQ[63:56]
1
2
1
2
1U_0402_6.3V6K
1
2
10U_0603_6.3V6M
CD3
1U_0402_6.3V6K
CD11
CD23
1
2
0
0
1
5
10U_0603_6.3V6M
10U_0603_6.3V6M
CD4
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CD12
2
2
1U_0402_6.3V6K
CD24
SA2
0
0
0
0
DQS/DQS#[0] DQS/DQS#[1] DQS/DQS#[2] DQS/DQS#[3]
DQS/DQS#[4] DQS/DQS#[5]
DQS/DQS#[6] DQS/DQS#[7]
10U_0603_6.3V6M
CD6
CD5
1
1
2
2
1U_0402_6.3V6K
1
1
CD13
CD14
2
2
12
RD4
@
0_0402_5%
12
RD5
0_0402_5%
330U_D3_2.5VY_R6M
10U_0603_6.3V6M
10U_0603_6.3V6M
330U_2V_M
1
1
@
@
CD17
CD7
CD8
+
2
CD16
+DDR_VREF_A_CA
+2.5V_MEM
12
@
0_0402_5%
12
0_0402_5%
+
2
1
2
1
2
RD8
DIMM1_SA0 DIMM1_SA1 DIMM1_SA2
RD9
CD63
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
1
1
CD18
CD19
CD20
2
2
0.1U_0402_10V6K
2.2U_0402_6.3V6M
@
1
CD26
CD25
2
+3.3V_RUN+3.3V_RUN+3.3V_RUN+3.3V_RUN
12
1
2
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CD15
2
12
RD6
@
0_0402_5%
12
RD7
0_0402_5%
1
2
RD10 0_0603_5%
2.2U_0402_6.3V6M CD27
10U_0603_6.3V6M
CD21
+3.3V_RUN_DIMM1
0.1U_0201_10V6K
1
2
4
+1.2V_MEM
JDIMM1
1
DDR_A_D5 DDR_A_D1 DDR_A_DQS#0
DDR_A_DQS0 DDR_A_D2 DDR_A_D3 DDR_A_D9 DDR_A_D8
DDR_A_D15 DDR_A_D10 DDR_A_D33 DDR_A_D36 DDR_A_DQS#4
DDR_A_DQS4 DDR_A_D34 DDR_A_D35 DDR_A_D41 DDR_A_D40
DDR_A_D42 DDR_A_D43
T51
+2.5V_MEM
@
PAD~D
DDR_A_CKE0 DDR_A_BG1
DDR_A_BG0 DDR_A_MA12
DDR_A_MA9 DDR_A_MA8
DDR_A_MA6 DDR_A_MA3
DDR_A_MA1 DDR_A_CLK0
DDR_A_CLK#0 DDR_A_PARITY
DDR_A_BA1 DDR_A_CS#0
DDR_A_MA14 DDR_A_ODT0
DDR_A_CS#1 DDR_A_ODT1
DDR_A_D17 DDR_A_D21 DDR_A_DQS#2
DDR_A_DQS2 DDR_A_D22 DDR_A_D19 DDR_A_D25 DDR_A_D26
DDR_A_D28 DDR_A_D29
DDR_A_D49 DDR_A_D50 DDR_A_DQS#6
DDR_A_DQS6 DDR_A_D55 DDR_A_D51 DDR_A_D60 DDR_A_D59
DDR_A_D61 DDR_A_D58
+3.3V_RUN_DIMM1
DDR_A_CKE0<8> DDR_A_BG1<8>
DDR_A_BG0<8>
DDR_A_CLK0<8> DDR_A_CLK#0<8>
DDR_A_PARITY<8> DDR_A_BA1<8>
DDR_A_CS#0<8>
DDR_A_ODT0<8> DDR_A_CS#1<8>
DDR_A_ODT1<8>
CD28
DDR_XDP_WAN_SMBCLK<7,15,20,41>
4
VSS1
3
DQ5
5
VSS3
7
DQ1
9
VSS5 DQS0_c11DM0_n/DBI0_n
13
DQS0_t
15
VSS8
17
DQ7
19
VSS10
21
DQ3
23
VSS12
25
DQ13
27
VSS14
29
DQ9
31
VSS16 DM1_n/DBI_n33DQS1_t
35
VSS17
37
DQ15
39
VSS19
41
DQ10
43
VSS21
45
DQ21
47
VSS23
49
DQ17
51
VSS25 DQS2_c53DM2_n/DBI2_n
55
DQS2_t
57
VSS28
59
DQ23
61
VSS30
63
DQ19
65
VSS32
67
DQ29
69
VSS34
71
DQ25
73
VSS36 DM3_n/DBI3_n75DQS3_t
77
VSS37
79
DQ30
81
VSS39
83
DQ26
85
VSS41
87
CB5/NC
89
VSS43
91
CB1/NC
93
VSS45 DQS8_c95DM8_n/DBI_n/NC
97
DQS8_t
99
VSS48
101
CB2/NC
103
VSS50
105
CB3/NC
107
VSS52
109
CKE0
111
VDD1
113
BG1
115
BG0
117
VDD3
119
A12
121
A9
123
VDD5
125
A8
127
A6
129
VDD7
131
A3
133
A1
135
VDD9
137
CK0_t
139
CK0_c
141
VDD11
143
PARITY
145
BA1
147
VDD13
149
CS0_n
151
WE_n/A14
153
VDD15
155
ODT0
157
CS1_n
159
VDD17
161
ODT1
163
VDD19
165
C1, CS3_n,NC
167
VSS53
169
DQ37
171
VSS55
173
DQ33
175
VSS57
177
DQS4_c
179
DQS4_t
181
VSS60
183
DQ38
185
VSS62
187
DQ34
189
VSS64
191
DQ44
193
VSS66
195
DQ40
197
VSS68
199
DM5_n/DBI5_n
201
VSS69
203
DQ46
205
VSS71
207
DQ42
209
VSS73
211
DQ52
213
VSS75
215
DQ49
217
VSS77
219
DQS6_c
221
DQS6_t
223
VSS80
225
DQ55
227
VSS82
229
DQ51
231
VSS84
233
DQ61
235
VSS86
237
DQ56
239
VSS88
241
DM7_n/DBI7_n
243
VSS89
245
DQ62
247
VSS91
249
DQ58
251
VSS93
253
SCL
255
VDDSPD
257
VPP1
259
VPP2
261
GND1
LCN_DAN05-Q0406-0103 CONN@
3
VSS2 VSS4 VSS6 VSS7 VSS9
VSS11
DQ12
VSS13 VSS15
DQS1_c
VSS18
DQ14
VSS20
DQ11
VSS22
DQ20
VSS24
DQ16
VSS26 VSS27
DQ22
VSS29
DQ18
VSS31
DQ28
VSS33
DQ24
VSS35
DQS3_c
VSS38
DQ31
VSS40
DQ27
VSS42
CB4/NC
VSS44
CB0/NC
VSS46 VSS47
CB6/NC
VSS49
CB7/NC
VSS51
RESET_n
CKE1 VDD2
ACT_n
ALERT_n
VDD4
VDD6
VDD8
EVENT_n/NF
VDD10
CK1_t/NF
CK1_c/NF
VDD12
A10/AP VDD14
RAS_n/A16
VDD16
CAS_n/A15
VDD18
C0/CS2_n/NC
VREFCA
VSS54
DQ36
VSS56
DQ32
VSS58
DM4_n/DBI4_n
VSS59
DQ39
VSS61
DQ35
VSS63
DQ45
VSS65
DQ41
VSS67 DQS5_c DQS5_t
VSS70
DQ47
VSS72
DQ43
VSS74
DQ53
VSS76
DQ48
VSS78
DM6_n/DBI6_n
VSS79
DQ54
VSS81
DQ50
VSS83
DQ60
VSS85
DQ57
VSS87 DQS7_c DQS7_t
VSS90
DQ63
VSS92
DQ59
VSS94
GND2
3
2
+1.2V_MEM
2
DDR_A_D4
4
DQ4
6
DDR_A_D0
8
DQ0
10 12 14
DDR_A_D6
16
DQ6
18
DDR_A_D7
20
DQ2
22
DDR_A_D12
24 26
DDR_A_D13
28
DQ8
30
DDR_A_DQS#1
32
DDR_A_DQS1
34 36
DDR_A_D14
38 40
DDR_A_D11
42 44
DDR_A_D32
46 48
DDR_A_D37
50 52 54 56
DDR_A_D38
58 60
DDR_A_D39
62 64
DDR_A_D44
66 68
DDR_A_D45
70 72
DDR_A_DQS#5
74
DDR_A_DQS5
76 78
DDR_A_D47
80 82
DDR_A_D46
84 86 88 90 92 94 96 98 100 102 104 106
DDR_DRAMRST#_R
108
DDR_A_CKE1
110 112 114 116 118 120
A11
122
A7
124 126
A5
128
A4
130 132
A2
134 136 138 140 142 144
A0
146 148 150
BA0
152 154 156 158
A13
160 162 164 166
SA2
168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 242 244 246 248 250 252 254
SDA
256
SA0
258
VTT
260
SA1
262
DDR_A_CKE1 <8>
DDR_A_ACT#
DDR_A_ACT# <8>
DDR_A_ALERT#
DDR_A_ALERT# <8>
DDR_A_MA11 DDR_A_MA7
DDR_A_MA5 DDR_A_MA4
DDR_A_MA2 JDIMM1_EVENT#
DDR_A_CLK1
DDR_A_CLK1 <8>
DDR_A_CLK#1
DDR_A_CLK#1 <8>
DDR_A_MA0 DDR_A_MA10
DDR_A_BA0
DDR_A_BA0 <8>
DDR_A_MA16 DDR_A_MA15
DDR_A_MA13
PAD~D
DIMM1_SA2 DDR_A_D16 DDR_A_D20
DDR_A_D23 DDR_A_D18 DDR_A_D30 DDR_A_D24 DDR_A_DQS#3
DDR_A_DQS3 DDR_A_D31 DDR_A_D27 DDR_A_D48 DDR_A_D54
DDR_A_D53 DDR_A_D52 DDR_A_D62 DDR_A_D57 DDR_A_DQS#7
DDR_A_DQS7 DDR_A_D56 DDR_A_D63
DIMM1_SA0 DIMM1_SA1
+DDR_VREF_A_CA
DDR_XDP_WAN_SMBDAT <7,15,20,41>
+0.6V_DDR_VTT
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
T50@
1
2
+DDR_VREF_A_CA
CD29
@
0.1U_0402_10V6K
2016/01/01
2016/01/01
2016/01/01
DDR_VTT_CTRL<7>
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
Deciphered Date
Deciphered Date
Deciphered Date
1 2
RD12 0_0402_5%
JDIMM1_EVENT#
+1.2V_MEM
1 2
RD14 1K_0402_5%@
+1.2V_MEM
1K_0402_1%
12
RD15
1K_0402_1%
12
RD16
UD1
2 3
74AUP1G07SE-7_SOT353
2017/01/01
2017/01/01
2017/01/01
12
RD11 470_0402_1%
DDR_DRAMRST#
1 2
RD17 2_0402_1%
5
NC1VCC A
4
Y
GND
24.9_0402_1%
12
RD18
+3.3V_RUN
330K_0402_5%
12
RD19
0.6V_DDR_VTT_ON
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DDR4-SODIMM SLOT1
DDR4-SODIMM SLOT1
DDR4-SODIMM SLOT1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
LA-E151P
LA-E151P
LA-E151P
Date: Sheet
Date: Sheet
Date: Sheet
DDR4_DRAMRST#_PCH <20>DDR_DRAMRST#_R<15>
H_THERMTRIP# <7,15,16,38>
+DDR_VREF_CA+DDR_VREF_A_CA
0.022U_0402_16V7K
CD31
1
2
+1.2V_MEM
1 2
CD32 0.1U_0402_25V6@
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
1
0.6V_DDR_VTT_ON <50>
1
of
of
of
14 61
14 61
14 61
0.2
0.2
0.2
5
DDR_B_DQS#[0..7]<8> DDR_B_DQS[0..7]<8>
DDR_B_D[0..15]<8> DDR_B_D[16..31]<8> DDR_B_D[32..47]<8> DDR_B_D[48..63]<8>
DDR_B_MA[0..16]<8>
Layout Note: Place near JDIMM2
D D
+1.2V_MEM
10U_0603_6.3V6M
10U_0603_6.3V6M
CD34
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CD42
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CD55
1
2
0
0
0
1
0
1
1
DQ[7:0] DQ[15:8]
10U_0603_6.3V6M
CD36
CD35
1
2
1U_0402_6.3V6K
1
CD44
CD43
2
CD56
SA2
0
0
0
0
5
10U_0603_6.3V6M
10U_0603_6.3V6M
CD38
CD37
1
1
1
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
1
CD46
CD45
2
2
2
12
RD20
@
0_0402_5%
12
RD21
0_0402_5%
DQS/DQS#[0] DQS/DQS#[1] DQS/DQS#[2] DQS/DQS#[3]
DQS/DQS#[4] DQS/DQS#[5]
DQS/DQS#[6] DQS/DQS#[7]
10U_0603_6.3V6M
CD33
1
1
2
2
1U_0402_6.3V6K
1
1
CD41
2
2
C C
Layout Note: Place near JDIMM2.258
+0.6V_DDR_VTT
10U_0603_6.3V6M
CD54
1
1
2
2
B B
DIMM Select
SA01SA1
DIMM1
DIMM2
DIMM3
*
DIMM4
Byte[0] Byte[1] Byte[2]
A A
Byte[3]
*
Byte[4] Byte[5]
*
Byte[6] Byte[7]
DQ[23:16] DQ[31:24]
DQ[39:32] DQ[47:40] DQ[55:48] DQ[63:56]
330U_D3_2.5VY_R6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
@
CD39
CD40
CD49
1
+
2
2
+2.5V_MEM
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CD48
CD47
2
+DDR_VREF_B_CA
+3.3V_RUN+3.3V_RUN+3.3V_RUN +3.3V_RUN
12
12
@
RD22
0_0402_5%
0_0402_5%
DIMM2_SA0 DIMM2_SA1 DIMM2_SA2
12
12
RD23
@
0_0402_5%
0_0402_5%
330U_2V_M
1
@
CD64
+
2
1U_0402_6.3V6K
10U_0603_6.3V6M
1U_0402_6.3V6K
1
1
1
1
CD51
CD52
CD50
2
2
2
2
0.1U_0402_10V6K
2.2U_0402_6.3V6M
@
CD57
CD58
1
1
2
2
RD24
RD25
12
1
2
RD26 0_0603_5%
2.2U_0402_6.3V6M
10U_0603_6.3V6M
CD53
+3.3V_RUN_DIMM2
0.1U_0201_10V6K
1
CD59
2
4
+1.2V_MEM +1.2V_MEM
JDIMM2
1
DDR_B_D0 DDR_B_D4 DDR_B_DQS#0
DDR_B_DQS0 DDR_B_D3 DDR_B_D7 DDR_B_D12 DDR_B_D9
DDR_B_D11 DDR_B_D10 DDR_B_D38 DDR_B_D32 DDR_B_DQS#4
DDR_B_DQS4 DDR_B_D35 DDR_B_D37 DDR_B_D40 DDR_B_D44
DDR_B_D46 DDR_B_D42
T53
+2.5V_MEM
@
PAD~D
DDR_B_CKE0 DDR_B_BG1
DDR_B_BG0 DDR_B_MA12
DDR_B_MA9 DDR_B_MA8
DDR_B_MA6 DDR_B_MA3
DDR_B_MA1 DDR_B_CLK0
DDR_B_CLK#0 DDR_B_PARITY
DDR_B_BA1 DDR_B_CS#0
DDR_B_MA14 DDR_B_ODT0
DDR_B_CS#1 DDR_B_ODT1
DDR_B_D22 DDR_B_D23 DDR_B_DQS#2
DDR_B_DQS2 DDR_B_D17 DDR_B_D16 DDR_B_D24 DDR_B_D25
DDR_B_D26 DDR_B_D27 DDR_B_D51 DDR_B_D54 DDR_B_DQS#6
DDR_B_DQS6 DDR_B_D53 DDR_B_D49 DDR_B_D62 DDR_B_D59
DDR_B_D60 DDR_B_D56
+3.3V_RUN_DIMM2
DDR_B_CKE0<8> DDR_B_BG1<8>
DDR_B_BG0<8>
DDR_B_CLK0<8> DDR_B_CLK#0<8>
DDR_B_PARITY<8> DDR_B_BA1<8>
DDR_B_CS#0<8>
DDR_B_ODT0<8> DDR_B_CS#1<8>
DDR_B_ODT1<8>
CD60
DDR_XDP_WAN_SMBCLK<7,14,20,41>
4
VSS1
3
DQ5
5
VSS3
7
DQ1
9
VSS5 DQS0_c11DM0_n/DBI0_n
13
DQS0_t
15
VSS8
17
DQ7
19
VSS10
21
DQ3
23
VSS12
25
DQ13
27
VSS14
29
DQ9
31
VSS16 DM1_n/DBI_n33DQS1_t
35
VSS17
37
DQ15
39
VSS19
41
DQ10
43
VSS21
45
DQ21
47
VSS23
49
DQ17
51
VSS25 DQS2_c53DM2_n/DBI2_n
55
DQS2_t
57
VSS28
59
DQ23
61
VSS30
63
DQ19
65
VSS32
67
DQ29
69
VSS34
71
DQ25
73
VSS36 DM3_n/DBI3_n75DQS3_t
77
VSS37
79
DQ30
81
VSS39
83
DQ26
85
VSS41
87
CB5/NC
89
VSS43
91
CB1/NC
93
VSS45 DQS8_c95DM8_n/DBI_n/NC
97
DQS8_t
99
VSS48
101
CB2/NC
103
VSS50
105
CB3/NC
107
VSS52
109
CKE0
111
VDD1
113
BG1
115
BG0
117
VDD3
119
A12
121
A9
123
VDD5
125
A8
127
A6
129
VDD7
131
A3
133
A1
135
VDD9
137
CK0_t
139
CK0_c
141
VDD11
143
PARITY
145
BA1
147
VDD13
149
CS0_n
151
WE_n/A14
153
VDD15
155
ODT0
157
CS1_n
159
VDD17
161
ODT1
163
VDD19
165
C1, CS3_n,NC
167
VSS53
169
DQ37
171
VSS55
173
DQ33
175
VSS57
177
DQS4_c
179
DQS4_t
181
VSS60
183
DQ38
185
VSS62
187
DQ34
189
VSS64
191
DQ44
193
VSS66
195
DQ40
197
VSS68
199
DM5_n/DBI5_n
201
VSS69
203
DQ46
205
VSS71
207
DQ42
209
VSS73
211
DQ52
213
VSS75
215
DQ49
217
VSS77
219
DQS6_c
221
DQS6_t
223
VSS80
225
DQ55
227
VSS82
229
DQ51
231
VSS84
233
DQ61
235
VSS86
237
DQ56
239
VSS88
241
DM7_n/DBI7_n
243
VSS89
245
DQ62
247
VSS91
249
DQ58
251
VSS93
253
SCL
255
VDDSPD
257
VPP1
259
VPP2
261
GND1
LCN_DAN05-Q0406-0103 CONN@
3
VSS2 VSS4 VSS6 VSS7 VSS9
VSS11
DQ12
VSS13 VSS15
DQS1_c
VSS18
DQ14
VSS20
DQ11
VSS22
DQ20
VSS24
DQ16
VSS26 VSS27
DQ22
VSS29
DQ18
VSS31
DQ28
VSS33
DQ24
VSS35
DQS3_c
VSS38
DQ31
VSS40
DQ27
VSS42
CB4/NC
VSS44
CB0/NC
VSS46 VSS47
CB6/NC
VSS49
CB7/NC
VSS51
RESET_n
CKE1 VDD2
ACT_n
ALERT_n
VDD4
VDD6
VDD8
EVENT_n/NF
VDD10 CK1_t/NF CK1_c/NF
VDD12
A10/AP
VDD14
RAS_n/A16
VDD16
CAS_n/A15
VDD18
C0/CS2_n/NC
VREFCA
VSS54
DQ36
VSS56
DQ32
VSS58
DM4_n/DBI4_n
VSS59
DQ39
VSS61
DQ35
VSS63
DQ45
VSS65
DQ41
VSS67 DQS5_c DQS5_t
VSS70
DQ47
VSS72
DQ43
VSS74
DQ53
VSS76
DQ48
VSS78
DM6_n/DBI6_n
VSS79
DQ54
VSS81
DQ50
VSS83
DQ60
VSS85
DQ57
VSS87 DQS7_c DQS7_t
VSS90
DQ63
VSS92
DQ59
VSS94
GND2
3
2
2
DDR_B_D1
4
DQ4
6
DDR_B_D5
8
DQ0
10 12 14
DDR_B_D2
16
DQ6
18
DDR_B_D6
20
DQ2
22
DDR_B_D8
24 26
DDR_B_D13
28
DQ8
30
DDR_B_DQS#1
32
DDR_B_DQS1
34 36
DDR_B_D14
38 40
DDR_B_D15
42 44
DDR_B_D36
46 48
DDR_B_D34
50 52 54 56
DDR_B_D33
58 60
DDR_B_D39
62 64
DDR_B_D45
66 68
DDR_B_D41
70 72
DDR_B_DQS#5
74
DDR_B_DQS5
76 78
DDR_B_D43
80 82
DDR_B_D47
84 86 88 90 92 94 96 98 100 102 104 106
DDR_DRAMRST#_R
108
DDR_B_CKE1
110 112 114 116 118 120
A11
122
A7
124 126
A5
128
A4
130 132
A2
134 136 138 140 142 144
A0
146 148 150
BA0
152 154 156 158
A13
160 162 164 166
SA2
168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 242 244 246 248 250 252 254
SDA
256
SA0
258
VTT
260
SA1
262
DDR_B_ACT# DDR_B_ALERT#
DDR_B_MA11 DDR_B_MA7
DDR_B_MA5 DDR_B_MA4
DDR_B_MA2 JDIMM2_EVENT#
DDR_B_CLK1 DDR_B_CLK#1
DDR_B_MA0 DDR_B_MA10
DDR_B_BA0 DDR_B_MA16
DDR_B_MA15 DDR_B_MA13
DIMM2_SA2 DDR_B_D19 DDR_B_D18
DDR_B_D21 DDR_B_D20 DDR_B_D28 DDR_B_D29 DDR_B_DQS#3
DDR_B_DQS3 DDR_B_D31 DDR_B_D30 DDR_B_D52 DDR_B_D48
DDR_B_D55 DDR_B_D50 DDR_B_D61 DDR_B_D57 DDR_B_DQS#7
DDR_B_DQS7 DDR_B_D63 DDR_B_D58
DIMM2_SA0 DIMM2_SA1
DDR_B_CKE1 <8> DDR_B_ACT# <8>
DDR_B_ALERT# <8>
DDR_B_CLK1 <8> DDR_B_CLK#1 <8>
DDR_B_BA0 <8>
+DDR_VREF_B_CA
T52@
PAD~D
+DDR_VREF_B_CA
DDR_XDP_WAN_SMBDAT <7,14,20,41>
+0.6V_DDR_VTT
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
1
CD61
@
0.1U_0402_10V6K
2
DDR_DRAMRST#_R <14>
2016/01/01
2016/01/01
2016/01/01
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
JDIMM2_EVENT#
+DDR_VREF_B_CA
1 2
RD27 1K_0402_5%@
+1.2V_MEM
1K_0402_1%
12
RD28
RD30 2_0402_1%
1K_0402_1%
12
RD29
2017/01/01
2017/01/01
2017/01/01
1 2
24.9_0402_1%
12
RD31
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DDR4-SODIMM SLOT2
DDR4-SODIMM SLOT2
DDR4-SODIMM SLOT2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
LA-E151P
LA-E151P
LA-E151P
Date: Sheet
Date: Sheet
Date: Sheet
H_THERMTRIP# <7,14,16,38>
+DDR_VREF_B_DQ
0.022U_0402_16V7K
CD62
1
2
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
1
0.2
0.2
0.2
of
of
of
15 61
15 61
1
15 61
5
D D
4
3
2
1
PCH_CL_CLK1<35> PCH_CL_DATA1<35> PCH_CL_RST1#<35>
+3.3V_RUN
CAM_MIC_CBL_DET#
1 2
RH319 10K_0402_5% RH318 10K_0402_5% RH214 100K_0402_5% RH324 10K_0402_5% RH76 10K_0402_5%
C C
B B
RH344 10K_0402_5%
RH90 10K_0402_5%
1 2
RH345 10K_0402_5% RH380 10K_0402_5%
RH323 10K_0402_5% RH377 10K_0402_5%
@
RH325 10K_0402_5% RH326 10K_0402_5%
@ @
RH322 10K_0402_5%
1 2 1 2 1 2 1 2
1 2
1 2
1 2
1 2 1 2 1 2 1 2 1 2
M2280_PCIE_SATA# HOST_SD_WP# HDD_DET# BIOS_REC
m3042_PCIE#_SATA
CONTACTLESS_DET# AUD_PWR_EN
SATALED#
SATAGP3 SATAGP1 SATAGP5 SATAGP6 SATAGP7
M.2 Socket 3 (Key M)
M.2 Socket 3 (Key M)
CAM_MIC_CBL_DET#<32>
CONTACTLESS_DET#<39> HOST_SD_WP#<34>
AUD_PWR_EN<36>
PCIE_PTX_DRX_P11<40> PCIE_PTX_DRX_N11<40> PCIE_PRX_DTX_P11<40> PCIE_PRX_DTX_N11<40>
PCIE_PTX_DRX_P12<40> PCIE_PTX_DRX_N12<40> PCIE_PRX_DTX_P12<40> PCIE_PRX_DTX_N12<40>
PCH_CL_CLK1 PCH_CL_DATA1 PCH_CL_RST1#
CAM_MIC_CBL_DET#
CONTACTLESS_DET#
HOST_SD_WP# AUD_PWR_EN
PCIE_PTX_DRX_P11 PCIE_PTX_DRX_N11 PCIE_PRX_DTX_P11 PCIE_PRX_DTX_N11
BIOS_REC
PCIE_PTX_DRX_P12 PCIE_PTX_DRX_N12 PCIE_PRX_DTX_P12 PCIE_PRX_DTX_N12
UH1C
AV2
CL_CLK
AV3
CL_DATA
AW2
CL_RST#
R44
GPP_G8/FAN_PWM_0
R43
GPP_G9/FAN_PWM_1
U39
GPP_G10/FAN_PWM_2
N42
GPP_G11/FAN_PWM_3
U43
GPP_G0/FAN_TACH_0
U42
GPP_G1/FAN_TACH_1
U41
GPP_G2/FAN_TACH_2
M44
GPP_G3/FAN_TACH_3
U36
GPP_G4/FAN_TACH_4
P44
GPP_G5/FAN_TACH_5
T45
GPP_G6/FAN_TACH_6
T44
GPP_G7/FAN_TACH_7
B33
PCIE11_TXP
C33
PCIE11_TXN
K31
PCIE11_RXP
L31
PCIE11_RXN
AB33
GPP_F10/SCLOCK
AB35
GPP_F11/SLOAD
AA44
GPP_F13/SDATAOUT0
AA45
GPP_F12/SDATAOUT1
B38
PCIE14_TXN/SATA1B_TXN
C38
PCIE14_TXP/SATA1B_TXP
D39
PCIE14_RXN/SATA1B_RXN
E37
PCIE14_RXP/SATA1B_RXP
C36
PCIE13_TXN/SATA0B_TXN
B36
PCIE13_TXP/SATA0B_TXP
G35
PCIE13_RXN/SATA0B_RXN
E35
PCIE13_RXP/SATA0B_RXP
A35
PCIE12_TXP
B35
PCIE12_TXN
H33
PCIE12_RXP
G33
PCIE12_RXN
J45
PCIE20_TXP/SATA7_TXP
K44
PCIE20_TXN/SATA7_TXN
N38
PCIE20_RXP/SATA7_RXP
N39
PCIE20_RXN/SATA7_RXN
H44
PCIE19_TXP/SATA6_TXP
H43
PCIE19_TXN/SATA6_TXN
L39
PCIE19_RXP/SATA6_RXP
L37
PCIE19_RXN/SATA6_RXN
SKL-H-PCH_BGA837
SPT-H_PCH
PCIe/SATA
GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1 GPP_E2/SATAXPCIE2/SATAGP2 GPP_F0/SATAXPCIE3/SATAGP3 GPP_F1/SATAXPCIE4/SATAGP4 GPP_F2/SATAXPCIE5/SATAGP5 GPP_F3/SATAXPCIE6/SATAGP6 GPP_F4/SATAXPCIE7/SATAGP7
HOST
3 OF 12
PCIE9_RXN/SATA0A_RXN PCIE9_RXP/SATA0A_RXP
PCIE9_TXN/SATA0A_TXN PCIE9_TXP/SATA0A_TXP
PCIE10_RXN/SATA1A_RXN PCIE10_RXP/SATA1A_RXP
PCIE10_TXN/SATA1A_TXN PCIE10_TXP/SATA1A_TXP
PCIE15_RXN/SATA2_RXN
PCIE15_RXP/SATA2_RXP PCIE15_TXN/SATA2_TXN
PCIE16_RXN/SATA3_RXN
PCIE16_RXP/SATA3_RXP PCIE16_TXN/SATA3_TXN
PCIE17_RXN/SATA4_RXN
PCIE17_RXP/SATA4_RXP PCIE17_TXN/SATA4_TXN
PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_RXP PCIE18_TXN/SATA5_TXN
CLINK
FAN
Rev_1.3
PCIE15_TXP/SATA2_TXP
PCIE16_TXP/SATA3_TXP
PCIE17_TXP/SATA4_TXP
PCIE18_TXP/SATA5_TXP
GPP_E8/SATALED#
GPP_F21/EDP_BKLTCTL
GPP_F20/EDP_BKLTEN
GPP_F19/EDP_VDDEN
THERMTRIP#
PM_SYNC
PLTRST_PROC#
PM_DOWN
PCIE_PRX_DTX_N9
G31
PCIE_PRX_DTX_P9
H31
PCIE_PTX_DRX_N9
C31
PCIE_PTX_DRX_P9
B31
PCIE_PRX_DTX_N10
G29
PCIE_PRX_DTX_P10
E29
PCIE_PTX_DRX_N10
C32
PCIE_PTX_DRX_P10
B32
SATA_PRX_DTX_N2
F41
SATA_PRX_DTX_P2
E41
SATA_PTX_DRX_N2
B39
SATA_PTX_DRX_P2
A39 D43
E42 A41 A40
PCIE_PRX_DTX_N17
H42
PCIE_PRX_DTX_P17
H40
PCIE_PTX_DRX_N17
E45
PCIE_PTX_DRX_P17
F45 K37
G37 G45 G44
AD44
SATALED# M2280_PCIE_SATA#
AG36 AG35
SATAGP1 HDD_DET#
AG39 AD35
SATAGP3 m3042_PCIE#_SATA
AD31 AD38
SATAGP5
AC43
SATAGP6
AB44
SATAGP7 BIA_PWM_PCH
W36
PANEL_BKEN_PCH
W35
ENVDD_PCH
W42
PCH_THERMTRIP#
AJ3
PCH_PECI H_PECI
AL3
PECI
H_PM_SYNC_R H_PM_SYNC
AJ4
PLTRST_CPU#
AK2
H_PM_DOWN
AH2
PCIE_PRX_DTX_N9 <40> PCIE_PRX_DTX_P9 <40>
PCIE_PTX_DRX_N9 <40>
PCIE_PTX_DRX_P9 <40>
PCIE_PRX_DTX_N10 <40> PCIE_PRX_DTX_P10 <40>
PCIE_PTX_DRX_N10 <40>
PCIE_PTX_DRX_P10 <40> SATA_PRX_DTX_N2 <41>
SATA_PRX_DTX_P2 <41>
SATA_PTX_DRX_N2 <41>
SATA_PTX_DRX_P2 <41>
PCIE_PRX_DTX_N17 <35> PCIE_PRX_DTX_P17 <35>
PCIE_PTX_DRX_N17 <35>
PCIE_PTX_DRX_P17 <35>
SATALED# <35,40,45>
M2280_PCIE_SATA# <40> HDD_DET# <41> m3042_PCIE#_SATA <37>
Reserve Reserve Reserve
BIA_PWM_PCH <32> PANEL_BKEN_PCH <32> ENVDD_PCH <32,37>
1 2 1 2
RH75 620_0402_5%
1 2
RH73 43_0402_1%
RH156 30_0402_5%
PLTRST_CPU# <7> H_PM_DOWN <7>
M.2 Socket 3 (Key M)
SATA HDD
M.2 3042 HCA or QCA LTE SSD Cache
SPSGP0
SPSGP1
01SATAGP1
SPSGP2
1
0
SPSGP3
11=SATA0=PCIE
SPSGP4 3042_PCIE#_SATA
H_THERMTRIP# <7,14,15,38> H_PECI <7,37>
H_PM_SYNC <7>
PCH_PECI
12
RH74
@
10K_0402_5%
2280_PCIE_SATA#
HDD_DET#
SATAGP3
0=SATA
1=PCIE
1=SATA 0=PCIE
0=SATA 1=PCIE
1=SATA 0=PCIE
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KABYLAKE PCH-H (1/9)
KABYLAKE PCH-H (1/9)
KABYLAKE PCH-H (1/9)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
of
of
of
16 61
16 61
16 61
0.2
0.2
0.2
5
D D
4
RH66@ 0_0402_5%
XDP_DBRESET#<7>
RH70 8.2K_0402_5%@
ME_RESET#
12
CIS LINK OK
1 2
+3.3V_RUN
5
1
B
2
A
3
3
CH10
@
1 2
0.1U_0402_25V6
P
4
Y
G
@
74AHC1G09GW_TSSOP5
2
SYS_RESET#
UC3
SYS_RESET# <20,21>
1
PCIe/USB 3
SPT-H_PCH
DMI
2 OF 12
USB 2 .0
GPP_E9/USB2_OC0# GPP_E10/USB2_OC1# GPP_E11/USB2_OC2# GPP_E12/USB2_OC3# GPP_F15/USB2_OC4# GPP_F16/USB2_OC5# GPP_F17/USB2_OC6# GPP_F18/USB2_OC7#
USB2_COMP
USB2_VBUSSENSE
GPD7/RSVD
Rev_1.3
USB2N_1 USB2P_1 USB2N_2 USB2P_2 USB2N_3 USB2P_3 USB2N_4 USB2P_4 USB2N_5 USB2P_5 USB2N_6 USB2P_6 USB2N_7 USB2P_7 USB2N_8 USB2P_8 USB2N_9
USB2P_9 USB2N_10 USB2P_10 USB2N_11 USB2P_11 USB2N_12 USB2P_12 USB2N_13 USB2P_13 USB2N_14 USB2P_14
RSVD_AB13
USB2_ID
AF5 AG7 AD5 AD7 AG8 AG10 AE1 AE2 AC2 AC3 AF2 AF3 AB3 AB2 AL8 AL7 AA1 AA2 AJ8 AJ7 W2 W3 AD3 AD2 V2 V1 AJ11 AJ13
AD43 AD42 AD39 AC44 Y43 Y41 W44 W43
AG3 AD10 AB13 AG2
BD14
USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3 USB20_N4 USB20_P4
USB20_N6 USB20_P6
USB20_N8 USB20_P8 USB20_N9 USB20_P9 USB20_N10 USB20_P10 USB20_N11 USB20_P11
USB_OC0# USB_OC1# USB_OC2# USB_OC3#
USB2_COMP
USB2_VBUSSENSE USB2_ID
3.3V_CAM_EN#
USB20_N1 <42>
-----> Ext USB Port 1 Charge(RIGHT)
USB20_P1 <42> USB20_N2 <43>
-----> Ext USB Port 2(LEFT)
USB20_P2 <43> USB20_N3 <43>
-----> Ext USB Port 3(REAR)
USB20_P3 <43> USB20_N4 <29>
-----> Type-C
USB20_P4 <29>
USB20_N6 <35>
-----> M.2 3030 (BT)
USB20_P6 <35>
USB20_N8 <35>
-----> M.2 3042 (WWAN)
USB20_P8 <35> USB20_N9 <32>
-----> Touch Screen
USB20_P9 <32> USB20_N10 <39>
-----> USH
USB20_P10 <39> USB20_N11 <32>
-----> Camera
USB20_P11 <32>
USB_OC0# <42> USB_OC1# <43> USB_OC2# <43>
Reserve
1 2
RH193 113_0402_1%
1 2
RH364 1K_0402_5%
1 2
RH365 0_0402_5%
USB2_ID <29>
3.3V_CAM_EN# <32>
USB_OC3# USB_OC1# USB_OC0# USB_OC2#
RPH6
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
+3.3V_ALW_PCH
UH1B
L27
DMI_RXN0
N27
DMI_RXP0
C27
DMI_TXN0
B27
DMI_TXP0
E24
DMI_RXN1
G24
DMI_RXP1
B28
DMI_TXN1
A28
DMI_TXP1
G27
DMI_RXN2
E26
DMI_RXP2
B29
DMI_TXN2
C29
DMI_TXP2
L29
DMI_RXN3
K29
DMI_RXP3
B30
DMI_TXN3
A30
DMI_TXP3
B18
PCIE_RCOMPN
C17
PCIE_RCOMPP
H15
PCIE1_RXN/USB3_7_RXN
G15
PCIE1_RXP/USB3_7_RXP
A16
PCIE1_TXN/USB3_7_TXN
B16
PCIE1_TXP/USB3_7_TXP
B19
PCIE2_TXN/USB3_8_TXN
C19
PCIE2_TXP/USB3_8_TXP
E17
PCIE2_RXN/USB3_8_RXN
G17
PCIE2_RXP/USB3_8_RXP
L17
PCIE3_RXN/USB3_9_RXN
K17
PCIE3_RXP/USB3_9_RXP
B20
PCIE3_TXN/USB3_9_TXN
C20
PCIE3_TXP/USB3_9_TXP
E20
PCIE4_RXN/USB3_10_RXN
G19
PCIE4_RXP/USB3_10_RXP
B21
PCIE4_TXN/USB3_10_TXN
A21
PCIE4_TXP/USB3_10_TXP
K19
PCIE5_RXN
L19
PCIE5_RXP
D22
PCIE5_TXN
C22
PCIE5_TXP
G22
PCIE6_RXN
E22
PCIE6_RXP
B22
PCIE6_TXN
A23
PCIE6_TXP
L22
PCIE7_RXN
K22
PCIE7_RXP
C23
PCIE7_TXN
B23
PCIE7_TXP
K24
PCIE8_RXN
L24
PCIE8_RXP
C24
PCIE8_TXN
B24
PCIE8_TXP
SKL-H-PCH_BGA837
1 2
DMI_CTX_PRX_N0 DMI_CTX_PRX_P0 DMI_CRX_PTX_N0 DMI_CRX_PTX_P0 DMI_CTX_PRX_N1 DMI_CTX_PRX_P1 DMI_CRX_PTX_N1 DMI_CRX_PTX_P1 DMI_CTX_PRX_N2 DMI_CTX_PRX_P2 DMI_CRX_PTX_N2 DMI_CRX_PTX_P2 DMI_CTX_PRX_N3 DMI_CTX_PRX_P3 DMI_CRX_PTX_N3 DMI_CRX_PTX_P3
PCIECOMP# PCIECOMP
PCIE_PRX_DTX_N1
PCIE_PRX_DTX_P1
PCIE_PTX_DRX_N1
PCIE_PTX_DRX_P1
PCIE_PTX_DRX_N2
PCIE_PTX_DRX_P2
PCIE_PRX_DTX_N2
PCIE_PRX_DTX_P2
PCIE_PRX_DTX_N3
PCIE_PRX_DTX_P3
PCIE_PTX_DRX_N3
PCIE_PTX_DRX_P3
PCIE_PRX_DTX_N4
PCIE_PRX_DTX_P4
PCIE_PTX_DRX_N4
PCIE_PTX_DRX_P4
DMI_CTX_PRX_N0<6> DMI_CTX_PRX_P0<6> DMI_CRX_PTX_N0<6> DMI_CRX_PTX_P0<6> DMI_CTX_PRX_N1<6> DMI_CTX_PRX_P1<6> DMI_CRX_PTX_N1<6> DMI_CRX_PTX_P1<6> DMI_CTX_PRX_N2<6> DMI_CTX_PRX_P2<6>
C C
WIGIG--->
WLAN --->
Card Reader --->
LAN --->
B B
DMI_CRX_PTX_N2<6> DMI_CRX_PTX_P2<6> DMI_CTX_PRX_N3<6> DMI_CTX_PRX_P3<6> DMI_CRX_PTX_N3<6> DMI_CRX_PTX_P3<6>
RH192 100_0402_1%
PCIE_PRX_DTX_N1<35> PCIE_PRX_DTX_P1<35> PCIE_PTX_DRX_N1<35> PCIE_PTX_DRX_P1<35> PCIE_PTX_DRX_N2<35> PCIE_PTX_DRX_P2<35> PCIE_PRX_DTX_N2<35>
PCIE_PRX_DTX_P2<35> PCIE_PRX_DTX_N3<34> PCIE_PRX_DTX_P3<34> PCIE_PTX_DRX_N3<34> PCIE_PTX_DRX_P3<34> PCIE_PRX_DTX_N4<33> PCIE_PRX_DTX_P4<33> PCIE_PTX_DRX_N4<33> PCIE_PTX_DRX_P4<33>
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KABYLAKE PCH-H (2/9)
KABYLAKE PCH-H (2/9)
KABYLAKE PCH-H (2/9)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
of
of
of
17 61
17 61
17 61
0.2
0.2
0.2
5
D D
4
3
2
1
UH1G
AR17
CPU_24MHZ_R_D<7> CPU_24MHZ_R_D#<7>
PCH_CPU_BCLK_R_D<7> PCH_CPU_BCLK_R_D#<7>
C C
WWAN WLAN
WIGIG
M.2 Socket 3
LAN MMI
B B
+3.3V_RUN
CLKREQ_PCIE#0<35>
+3.3V_RUN
CLKREQ_PCIE#1<35>
+3.3V_RUN
CLKREQ_PCIE#2<35>
+3.3V_RUN
CLKREQ_PCIE#3<40>
+3.3V_RUN
CLKREQ_PCIE#4<33>
+3.3V_RUN
CLKREQ_PCIE#5<34>
+3.3V_RUN +3.3V_RUN
CH4
1 2
15P_0402_50V8J
CH5
1 2
15P_0402_50V8J
CPU_24MHZ_R_D PCH_CPU_NSSC_CLK_D CPU_24MHZ_R_D#
PCH_CPU_BCLK_R_D PCH_CPU_BCLK_R_D#
RH123 10K_0402_5% RH10 0_0402_5%RF@ RH124 10K_0402_5% RH11 0_0402_5%RF@ RH125 10K_0402_5% RH12 0_0402_5%RF@ RH126 10K_0402_5% RH13 0_0402_5%RF@ RH127 10K_0402_5% RH14 0_0402_5%RF@ RH131 10K_0402_5% RH15 0_0402_5%RF@ RH132 10K_0402_5%
RH133 10K_0402_5%
12 12 12 12 12 12 12 12 12 12 12 12 12
12
PCH_RTCX1_R
1 2
RH43 0_0402_5%
12
YH1
32.768KHZ_12.5PF_9H03200042
1 2
RH169 0_0402_5%
1 2
RH170 0_0402_5%
1 2
RH161 0_0402_5%
1 2
RH166 0_0402_5%
+1.0V_CLK5
RH171 2.7K_0402_1%
1 2
PCH_RTCX1
12
RH44 10M_0402_5%
PCH_RTCX2
PCH_CPU_NSSC_CLK_D# PCH_CPU_BCLK_D
PCH_CPU_BCLK_D#
XTAL24_OUT_R1 XTAL24_IN_R
XCLK_R BIAS PCH_RTCX1
PCH_RTCX2 CLKREQ_PCIE#0_R
CLKREQ_PCIE#1_R CLKREQ_PCIE#2_R CLKREQ_PCIE#3_R CLKREQ_PCIE#4_R CLKREQ_PCIE#5_R CLKREQ_PCIE#6_R CLKREQ_PCIE#7_R
XTAL24_IN_R
XTAL24_OUT_R1
GPP_A16/CLKOUT_48
G1
CLKOUT_CPUNSSC_P
F1
CLKOUT_CPUNSSC_N
G2
CLKOUT_CPUBCLK_P
H2
CLKOUT_CPUBCLK_N
A5
XTAL24_OUT
A6
XTAL24_IN
E1
XCLK_BIASREF
BC9
RTCX1
BD10
RTCX2
BC24
GPP_B5/SRCCLKREQ0#
AW24
GPP_B6/SRCCLKREQ1#
AT24
GPP_B7/SRCCLKREQ2#
BD25
GPP_B8/SRCCLKREQ3#
BB24
GPP_B9/SRCCLKREQ4#
BE25
GPP_B10/SRCCLKREQ5#
AT33
GPP_H0/SRCCLKREQ6#
AR31
GPP_H1/SRCCLKREQ7#
BD32
GPP_H2/SRCCLKREQ8#
BC32
GPP_H3/SRCCLKREQ9#
BB31
GPP_H4/SRCCLKREQ10#
BC33
GPP_H5/SRCCLKREQ11#
BA33
GPP_H6/SRCCLKREQ12#
AW33
GPP_H7/SRCCLKREQ13#
BB33
GPP_H8/SRCCLKREQ14#
BD33
GPP_H9/SRCCLKREQ15#
R13
CLKOUT_PCIE_N15
R11
CLKOUT_PCIE_P15
P1
CLKOUT_PCIE_N14
R2
CLKOUT_PCIE_P14
W7
CLKOUT_PCIE_N13
Y5
CLKOUT_PCIE_P13
U2
CLKOUT_PCIE_N12
U3
CLKOUT_PCIE_P12
SKL-H-PCH_BGA837
12
SPT-H_PCH
7 OF 12
RH153 1M_0402_1%
XTAL24_ OUT_R
1 2
RH152 0_0402_5%
Rev_1.3
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
CLKOUT_CPUPCIBCLK_N
CLKOUT_CPUPCIBCLK_P
CLKOUT_PCIE_N0 CLKOUT_PCIE_P0
CLKOUT_PCIE_N1 CLKOUT_PCIE_P1
CLKOUT_PCIE_N2 CLKOUT_PCIE_P2
CLKOUT_PCIE_N3 CLKOUT_PCIE_P3
CLKOUT_PCIE_N4 CLKOUT_PCIE_P4
CLKOUT_PCIE_N5 CLKOUT_PCIE_P5
CLKOUT_PCIE_N6 CLKOUT_PCIE_P6
CLKOUT_PCIE_N7 CLKOUT_PCIE_P7
CLKOUT_PCIE_N8 CLKOUT_PCIE_P8
CLKOUT_PCIE_N9 CLKOUT_PCIE_P9
CLKOUT_PCIE_N10
CLKOUT_PCIE_P10
CLKOUT_PCIE_N11
CLKOUT_PCIE_P11
3
4
YH2 24MHZ_12PF_X3G024000DC1H
1
2
L1 L2 J1 J2
N7 N8
L7 L5
D3 F2
E5 G4
D5 E6
D8 D7
R8 R7
U5 U7
W10 W11
N3 N2
P3 P2
R3 R4
CH13
1 2
15P_0402_50V8J
CH14
1 2
15P_0402_50V8J
PCH_XDP_CLK_DN_R PCH_XDP_CLK_DP_R PCH_CPU_PCIBCLK_D# PCH_CPU_PCIBCLK_D
CLK_PCIE_N0 CLK_PCIE_P0
CLK_PCIE_N1 CLK_PCIE_P1
CLK_PCIE_N2 CLK_PCIE_P2
CLK_PCIE_N3 CLK_PCIE_P3
CLK_PCIE_N4 CLK_PCIE_P4
CLK_PCIE_N5 CLK_PCIE_P5
1 2
RH154 0_0402_5%
1 2
RH155 0_0402_5%
1 2
RH168 0_0402_5%
1 2
RH167 0_0402_5%
CLK_PCIE_N0 <35> CLK_PCIE_P0 <35>
CLK_PCIE_N1 <35> CLK_PCIE_P1 <35>
CLK_PCIE_N2 <35> CLK_PCIE_P2 <35>
CLK_PCIE_N3 <40> CLK_PCIE_P3 <40>
CLK_PCIE_N4 <33> CLK_PCIE_P4 <33>
CLK_PCIE_N5 <34> CLK_PCIE_P5 <34>
PCH_XDP_CLK_DN PCH_XDP_CLK_DP
PCH_CPU_PCIBCLK_R_D# PCH_CPU_PCIBCLK_R_D
WWAN
WLAN
WIGIG
M.2 Socket 3 (Key M)
LAN
MMI
PCH_XDP_CLK_DN <7> PCH_XDP_CLK_DP <7> PCH_CPU_PCIBCLK_R_D# <7> PCH_CPU_PCIBCLK_R_D <7>
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KABYLAKE PCH-H (3/9)
KABYLAKE PCH-H (3/9)
KABYLAKE PCH-H (3/9)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Thursday, June 30, 2016
Thursday, June 30, 2016
Thursday, June 30, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
18 61
18 61
18 61
of
of
of
0.2
0.2
0.2
5
4
3
2
1
UH1A
GPP_A11/PME# RSVD
RSVD RSVD RSVD
TP2 TP1
SPI0_MOSI SPI0_MISO SPI0_CS0# SPI0_CLK SPI0_CS1#
SPI0_IO2 SPI0_IO3 SPI0_CS2# GPP_D1 GPP_D0 GPP_D3 GPP_D2 GPP_D22 GPP_D21
SKL-H-PCH_BGA837
/HOLD(IO3)
UC6
/HOLD(IO3)
+3.3V_ALW_PCH
5
UH7
1
P
B
2
A
G
TC7SH08FU_SSOP5
3
8
VCC
7 6
CLK
5
DI(IO0)
8
VCC
7 6
CLK
5
DI(IO0)
PCH_PLTRST#_AND
4
Y
SPT-H_PCH
1 OF 12
+3.3V_SPI
PCH_SPI_D3_0_R PCH_SPI_CLK_0_RPCH_SPI_D2_R1 PCH_SPI_D0_0_R
+3.3V_SPI
PCH_SPI_D3_1_R PCH_SPI_CLK_1_RPCH_SPI_D2_1_R PCH_SPI_D0_1_R
12
@
GPP_B13/PLTRST#
GPP_G16/GSXCLK
GPP_G12/GSXDOUT
GPP_G13/GSXSLOAD
GPP_G14/GSXDIN
GPP_G15/GSXSRESET#
GPP_E3/CPU_GP0 GPP_E7/CPU_GP1 GPP_B3/CPU_GP2 GPP_B4/CPU_GP3
GPP_H18/SML4ALERT#
GPP_H17/SML4DATA
GPP_H16/SML4CLK
GPP_H15/SML3ALERT#
GPP_H14/SML3DATA
GPP_H13/SML3CLK
GPP_H12/SML2ALERT#
GPP_H11/SML2DATA
GPP_H10/SML2CLK
CH9
1 2
0.1U_0201_10V6K
CH270
@
1 2
0.1U_0201_10V6K
RH65 100K_0402_5%
Rev_1.3
INTRUDER#
PCH_SPI_D1_R1<39>
PCH_SPI_CLK_R1<39> PCH_SPI_D0_R1<39>
BB27
P43 R39 R36 R42 R41
AF41 AE44 BC23 BD24
BC36 BE34 BD39 BB36 BA35 BC35 BD35 AW35 BD34 BE11
PCH_PLTRST#
RH187 0_0402_5%
RH60 0_0402_5%@
PCH_PLTRST#
SIO_EXT_SMI# TOUCH_SCREEN_PD# TOUCHPAD_INTR#
PCH_INTRUDER_HDR#
12
1 2
SIO_EXT_SMI# <37> TOUCH_SCREEN_PD# <32> TOUCHPAD_INTR# <37,44> TOUCH_SCREEN_DET# <32>
+RTC_CELL
12
RH198 1M_0402_5%
PCH_SPI_D1_R1 PCH_SPI_D3_R1 PCH_SPI_D3_0_R PCH_SPI_CLK_R1 PCH_SPI_D0_R1 PCH_SPI_D0_0_R
PCH_SPI_D1_R1 PCH_SPI_D1_1_R PCH_SPI_D3_R1 PCH_SPI_CLK_R1 PCH_SPI_D0_R1
RPC1
1 8 2 7 3 6 4 5
33_0804_8P4R_5%
@
RPC2
4 5 3 6 2 7 1 8
33_0804_8P4R_5%
+3.3V_SPI
PCH_PLTRST#_AND <34,35,39,40> PLTRST_TPM# <39>
RH62 0_0402_5% RH244 0_0402_5%
PCH_SPI_D1_0_R PCH_SPI_CLK_0_R
PCH_SPI_D3_1_R PCH_SPI_CLK_1_R PCH_SPI_D0_1_R
+3.3V_ALW_PCH
RH185 0_0402_5%
12 12
12
RH1770_0402_5% @
12
RH1780_0402_5%
12
RH1790_0402_5%
12
RH1810_0402_5%
12
RH1820_0402_5%
12
RH1830_0402_5%
12
RH1840_0402_5%
12
PLTRST_LAN# <33> PCH_PLTRST#_EC <38>
PCH_SPI_CS#1_R1
PCH_SPI_CS#1
PCH_SPI_D0_R1
PCH_SPI_D0
PCH_SPI_D1_R1
PCH_SPI_D1
PCH_SPI_CLK_R1
PCH_SPI_CLK
PCH_SPI_CS#0_R1
PCH_SPI_CS#0
PCH_SPI_D2_R1
PCH_SPI_D2
PCH_SPI_D3_R1
PCH_SPI_D3
E-T_6705K-Y20N-00L
22
GND2
21
GND1
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
JSPI1
CONN@
CIS link OK
+3.3V_ALW_PCH
TOUCH_SCREEN_PD#
TOUCHPAD_INTR#
GO)0P/MM)0P/'FMOG
GO)0P/MM)0P/
LO)0P/
Need check
33_0402_5%
@EMI@
12
RH28
33P_0402_50V8J
@EMI@
12
CH321
SIO_EXT_SMI#
TOUCH_SCREEN_PD# don't move to RPC,
PCH_SPI_D2_XDP<7>
PCH_SPI_CS#0_R1
PCH_SPI_CLK_0_RPCH_SPI_CLK_1_R
33_0402_5%
@EMI@
12
RH29
33P_0402_50V8J
@EMI@
12
CH322
PCH_SPI_CS#1_R1 PCH_SPI_D2_R1
T178PAD~D @ T59PAD~D @
T60PAD~D @ T61PAD~D @ T58PAD~D @
T63PAD~D @ T62PAD~D @
PCH_SPI_D0<7>
1 2
RH180 0_0402_5%
PCH_SPI_CS#2<39>
1 2
RH37 0_0402_5%
1 2
RH351 33_0402_5%
1 2
RH352 0_0402_5%@
1 2
RH353 33_0402_5%@
PME#
PCH_SPI_D0 PCH_SPI_D1 PCH_SPI_CS#0 PCH_SPI_CLK PCH_SPI_CS#1
PCH_SPI_D2PCH_SPI_D2_XDP PCH_SPI_D3
PCH_SPI_CS#0_R2 PCH_SPI_D1_0_R PCH_SPI_D2_0_R
PCH_SPI_CS#1_R2 PCH_SPI_D1_1_R
PCH_PLTRST#
BD17 AG15
AG14 AF17 AE17
AR19 AN17
BB29 BE30 BD31 BC31
AW31
BC29 BD30 AT31 AN36
AL39 AN41 AN38 AH43 AG44
128Mb Flash ROM
UC5
1
/CS
2
DO(IO1)
3
/WP(IO2)
4
GND
W25Q128FVSIQ_SO8
64Mb Flash ROM
@
1
/CS
2
DO(IO1)
3
/WP(IO2)
4
GND
W25Q64FVSSIQ_SO8
1 2
+3.3V_SPI
RH30 1K_0402_5%@ RH335 1K_0402_5%@
RH334 1K_0402_5%@
RH310 10K_0402_5%
1 2
RH348 10K_0402_5%@
1 2
RH402 10K_0402_5%
PCH_SPI_D2_R1
1 2
PCH_SPI_D3_R1
1 2
PCH_SPI_D3_R1
1 2
D D
+3.3V_RUN
C C
9/5 MOW Option 1: Implement a 1 kOhm pull-down resistor on the signal and de-populate the required 1 kOhm pull-up resistor. In this case, customers must ensure that the SPI flash device on the platform has HOLD functionality disabled by default.
Note that the pull down resistor on SPI0_IO3 is only needed for SKL U/Y platforms with ES and SKL S/H platforms with pre-ES1/ES1 samples.
B B
$8#D E#&
'#&G
'FGHIJ'FGHKJ'FGIGJ 'FGILJ'FGIMJ'FGIN
A A
Q)0P/
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KABYLAKE PCH-H (4/9)
KABYLAKE PCH-H (4/9)
KABYLAKE PCH-H (4/9)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
19 61
19 61
19 61
of
of
of
0.2
0.2
0.2
+3.3V_ALW_PCH
1 2
RH56 1K_0402_5%
1 2
RH57 1K_0402_5%
1 2
RH67 499_0402_1%
1 2
RH77 499_0402_1%
1 2
RH80 1K_0402_5%
1 2
RH81 1K_0402_5%
D D
+3.3V_PGPPBCH
1 2
RH61 4.7K_0402_5%
TLS CONFIDENTIALITY HIGH LOW(DEFAULT)
+3.3V_ALW_PCH
1 2
RH78 4.7K_0402_5%ESPI@
EC interface HIGH LOW(DEFAULT)
+3.3V_ALW_PCH
1 2
RH86 4.7K_0402_5%@
TOP SWAP STRAP HIGH LOW(DEFAULT)
C C
+3.3V_ALW_PCH
1 2
RC74 10K_0402_5%
+3.3V_RUN +3.3V_ALW_PCH
1 2
GPP_B23 GPP_B23_Q
B B
SIO_SLP_A#<20,21,37>
SIO_SLP_SUS#
5
MEM_SMBCLK MEM_SMBDATA
SML0_SMBCLK SML0_SMBDATA SML1_SMBCLK SML1_SMBDATA
PCH_SMB_ALERT#
ENABLE DISABLE
GPP_C5
ESPI LPC
SPKR
ENABLE DISABLE
KB_DET#
150K_0402_5%
@
RH347
1 2
RC327 0_0402_5%
S
1 2
RH367 0_0402_5%
1 2
RH368 0_0402_5%@
D
13
QC3
@
L2N7002WT1G_SC-70-3
G
2
Ext USB Port 1 Charge(RIGHT)
M.2 3042 (LTE)
Type C
Ext USB Port 2(LEFT)
Ext USB Port 3(REAR)
1 2
RF@
CH268 47P_0402_50V8J
ME_FWP
AUD_AZACPU_SDO AUD_AZACPU_SDO_R AUD_AZACPU_SDI_R AUD_AZACPU_SCLK AUD_AZACPU _SCLK_R
+RTC_CELL
PCH_DPWROK<38>
SML0_SMBCLK<33> SML0_SMBDATA<33>
SML1_SMBCLK<37> SML1_SMBDATA<37>
RH329 150K_0402_5%
1 2
HDA_BIT_CLK_R<36> HDA_RST#_R<36> HDA_SDIN0<36>
HDA_SDOUT_R<36> HDA_SYNC_R<36>
AUD_AZACPU_SDO<9> AUD_AZACPU_SDI_R<9> AUD_AZACPU_SCLK<9>
EXI BOOT STALL BYPASS
5
ENABLED DIABLED
10K_0402_5%
12
Service Mode Switch: Add a switch to ME_FWP signal to unlock the ME region and allow the entire region of the SPI flash to be updated using FPT.
+3.3V_ALW_PCH
12
RC75
ME_FWP PCH has internal 20K PD. (suspend power rail)
FLASH DESCRIPTOR SECURITY OVERRIDE
LOW = ENABLE (DEFAULT) -->Pin1 & Pin3 short HIGH = DISABLE (ME can update) -->Pin2 & Pin3 short
RH101 1K_0402_5%
ME_FW_EC
RH100 0_0402_5%@
PT,ST pop RH101 and SW1; MP pop RH100
ME_FW_EC<37>
1 2
ME_FWP
HIGH LOW(DEFAULT)
WEAK INTERNAL PD
RH215
POP
NO Support Deep sleep
DE-POP
Support Deep sleep
PCH_DPWROK PCH_RSMRST#_AND
1
A A
2
1 2
RH215 0_0402_5%@
0.01U_0402_16V7K
100K_0402_5%
12
@
CH266
RH308
4
RH46 33_0402_5%EMI@ RH50 33_0402_5%
RH328 1K_0402_5% RH45 33_0402_5% RH48 33_0402_5%
RH39 30_0402_5% RH38 30_0402_5%
1 2 1 2
RH200 20K_0402_5% RH201 20K_0402_5%
PCH_PWROK<54> PCH_RSMRST#_AND<7,44>
PCH_DPWROK MEM_SMBCLK
MEM_SMBDATA SML0_SMBCLK
SML0_SMBDATA SML1_SMBCLK
SML1_SMBDATA
ME_FWP
SW1
1
A
2
B
3
C
4
G1
5
G2
SS3-CMFTQR9_3P
4
USB3_PTX_DRX_N1<42> USB3_PTX_DRX_P1<42> USB3_PRX_DTX_N1<42> USB3_PRX_DTX_P1<42>
USB3_PTX_DRX_N2<35> USB3_PTX_DRX_P2<35> USB3_PRX_DTX_N2<35> USB3_PRX_DTX_P2<35>
USB3_PTX_DRX_N5<28> USB3_PTX_DRX_P5<28> USB3_PRX_DTX_N5<28> USB3_PRX_DTX_P5<28>
USB3_PTX_DRX_P3<43> USB3_PTX_DRX_N3<43> USB3_PRX_DTX_P3<43> USB3_PRX_DTX_N3<43>
USB3_PTX_DRX_P4<43> USB3_PTX_DRX_N4<43> USB3_PRX_DTX_P4<43> USB3_PRX_DTX_N4<43>
1 2 1 2
1 2 1 2 1 2
1 2 1 2
@
T269
IR_CAM_DE T#<32>
KB_DET#<44>
PAD~D
USB3_PTX_DRX_N1 USB3_PTX_DRX_P1 USB3_PRX_DTX_N1 USB3_PRX_DTX_P1
USB3_PTX_DRX_N2 USB3_PTX_DRX_P2 USB3_PRX_DTX_N2 USB3_PRX_DTX_P2
USB3_PTX_DRX_N5 USB3_PTX_DRX_P5 USB3_PRX_DTX_N5 USB3_PRX_DTX_P5
USB3_PTX_DRX_P3 USB3_PTX_DRX_N3 USB3_PRX_DTX_P3 USB3_PRX_DTX_N3
USB3_PTX_DRX_P4 USB3_PTX_DRX_N4 USB3_PRX_DTX_P4 USB3_PRX_DTX_N4
HDA_BIT_CLK HDA_RST# HDA_SDIN0
HDA_SDOUT HDA_SYNC
TBT_PWR_EN IR_CAM_DE T#
PCH_RTCRST# SRTCRST#
PCH_PWROK PCH_RSMRST#_AND
PCH_SMB_ALERT#
GPP_C5
GPP_B23
CH41 1U_0402_6.3VAK CH40 1U_0402_6.3VAK
PCH_RTCRST#<21,37>
1
1 2 1 2
1
CMOS1 SHORT PADS~D@
MEM_SMBCLK
MEM_SMBDATA
UH1F
C11
USB3_1_TXN
B11
USB3_1_TXP
B7
USB3_1_RXN
A7
USB3_1_RXP
B12
USB3_2_TXN
A12
USB3_2_TXP
C8
USB3_2_RXN
B8
USB3_2_RXP
B15
USB3_6_TXN
C15
USB3_6_TXP
K15
USB3_6_RXN
K13
USB3_6_RXP
B14
USB3_5_TXN
C14
USB3_5_TXP
G13
USB3_5_RXN
H13
USB3_5_RXP
D13
USB3_3_TXP
C13
USB3_2_TXN
A9
USB3_3_RXP
B10
USB3_3_RXN
B13
USB3_4_TXP
A14
USB3_4_TXN
G11
USB3_4_RXP
E11
USB3_4_RXN
SKL-H-PCH_BGA837
UH1D
BA9
HDA_BCLK
BD8
HDA_RST#
BE7
HDA_SDI0
BC8
HDA_SDI1
BB7
HDA_SDO
BD9
HDA_SYNC
BD1
RSVD_BD1
BE2
RSVD_BE2
AM1
DISPA_SDO
AN2
DISPA_SDI
AM2
DISPA_BCLK
AL42
GPP_D8/I2S0_SCLK
AN42
GPP_D7/I2S0_RXD
AM43
GPP_D6/I2S0_TXD
AJ33
GPP_D5/I2S0_SFRM
AH44
GPP_D20/DMIC_DATA0
AJ35
GPP_D19/DMIC_CLK0
AJ38
GPP_D18/DMIC_DATA1
AJ42
GPP_D17/DMIC_CLK1
BC10
RTCRST#
BB10
SRTCRST#
AW11
PCH_PWROK
BA11
RSMRST#
AV11
DSW_PW ROK
BB41
GPP_C2/SMBALERT#
AW44
GPP_C0/SMBCLK
BB43
GPP_C1/SMBDATA
BA40
GPP_C5/SML0ALERT#
AY44
GPP_C3/SML0CLK
BB39
GPP_C4/SML0DATA
AT27
GPP_B23/SML1ALERT#/PCHHOT#
AW42
GPP_C6/SML1CLK
AW45
GPP_C7/SML1DATA
SKL-H-PCH_BGA837
SRTCRST# PCH_RTCRST#
2
2
DMN65D8LDW-7_SOT363-6
3
SPT-H_PCH
LPC/eSPI
USB
SATA
AUDIO
+3.3V_RUN
6 1
QH4A
DMN65D8LDW-7_SOT363-6
5
3 4
QH4B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
GPP_A1/LAD0/ESPI_IO0 GPP_A2/LAD1/ESPI_IO1 GPP_A3/LAD2/ESPI_IO2 GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS0#
GPP_A6/SERIRQ/ESPI_CS1#
GPP_A7/PIRQA#/ESPI_ALERT0#
GPP_A0/RCIN#/ESPI_ALERT1#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
6 OF 12
SPT-H_PCH
GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
SMBUS
JTAG
4 OF 12
2
Rev_1.3
AT22 AV22 AT19 BD16
BE16 BA17 AW17 AT17 BC18
BC17 AV19
GPP_G19/SMI# GPP_G18/NMI#
GPP_E6/DEVSLP2 GPP_E5/DEVSLP1 GPP_E4/DEVSLP0 GPP_F9/DEVSLP7 GPP_F8/DEVSLP6 GPP_F7/DEVSLP5 GPP_F6/DEVSLP4 GPP_F5/DEVSLP3
GPP_A13/SUSWARN#/SUSPWRDNACK
M45 N43
AE45 AG43 AG42 AB39 AB36 AB43 AB42 AB41
Rev_1.3
GPP_A8/CLKRUN# GPD11/LANPHYPC GPD9/SLP_WLAN#
DRAM_RESET#
GPP_B2/VRALERT#
GPP_B1
GPP_G17/ADR_COMPLETE
2016/01/01
2016/01/01
2016/01/01
GPP_B0
GPP_B11
SYS_PWROK
WAKE#
GPD6/SLP_A#
SLP_LAN#
GPP_B12/SLP_S0#
GPD4/SLP_S3# GPD5/SLP_S4#
GPD10/SLP_S5#
GPD8/SUSCLK
GPD0/BATLOW#
GPP_A15/SUSACK#
GPD2/LAN_WAKE# GPD1/ACPRESENT
SLP_SUS#
GPD3/PWRBTN#
SYS_RESET#
GPP_B14/SPKR
PROCPWRGD
ITP_PMODE
JTAGX JTAG_TMS JTAG_TDO
JTAG_TDI
JTAG_TCK
DDR_XDP_WAN_SMBCLK <7,14,15,41>
DDR_XDP_WAN_SMBDAT <7,14,15,41>
Compal Secret Data
Compal Secret Data
Compal Secret Data
ESPI_IO0_R ESPI_IO1_R ESPI_IO2_R ESPI_IO3_R
ESPI_ALERT# SIO_RCIN#
ESPI_RESET#
ESPI_CLK PCI_CLK_LPC1
BB17 AW22
AR15 AV13 BC14
BD23 AL27 AR27 N44 AN24 AY1
BC13 BC15 AV15 BC26 AW15 BD15 BA13
AN15 BD13 BB19 BD19
BD11 BB15 BB13 AT13 AW1 BD26 AM3
AT2 AR3 AR2 AP1 AP2 AN3
Deciphered Date
Deciphered Date
Deciphered Date
2
1 2
RC366 15_0402_5%
1 2
RC367 15_0402_5%
1 2
RC368 15_0402_5%
1 2
RC369 15_0402_5%
1 2 1 2
RH97 15_0402_5%EMI@ RH99 22_0402_5%@
HDD_DEVSLP <41> M2280_DEVSLP <40>
m3042_DEVSLP <35>
CLKRUN# PM_LANPHY_ENABLE SIO_SLP_WLAN# DDR4_DRAMRST#_PCH
VRALERT #
SYS_PWROK PCH_PCIE_WAKE#
SIO_SLP_A# SIO_SLP_LAN# SIO_SLP_S0# SIO_SLP_S3# SIO_SLP_S4# SIO_SLP_S5#
SUSCLK PCH_BATLOW#
SUSACK# ME_SUS_PWR_ACK
LAN_WAKE#
AC_PRESENT SIO_PWRBTN#
SYS_RESET# SPKR
H_PWRGD ITP_P MODE _CPU
PCH_JTAGX PCH_JTAG_TMS PCH_JTAG_TDO PCH_JTAG_TDI PCH_JTAG_TCK
PCH_JTAGX PCH_JTAG_TDI PCH_JTAG_TDO
ESD request,Place near PCH side.
2
CHECK,LPC_CLK FOR DEBUG CARD?
1 2
CC305 0.1U_0402_25V6@ESD@
1 2
CC304 0.1U_0402_25V6@ESD@
1 2
CC303 0.1U_0402_25V6@ESD@
2017/01/01
2017/01/01
2017/01/01
ESPI_IO0 <37,38> ESPI_IO1 <37,38> ESPI_IO2 <37,38> ESPI_IO3 <37,38>
ESPI_CS# <37,38> ESPI_ALERT# <37>
SIO_RCIN# <37>
ESPI_RESET# <37>
ESPI_CLK_5105 <37,38>
CLKRUN# <37> PM_LANPHY_ENABLE < 3 3 > SIO_SLP_WLAN# <37,46>
DDR4_DRAMRST#_PCH <14>
SYS_PWROK <7,37> PCH_PCIE_WAKE# <37,38>
SIO_SLP_A# <20,21,37> SIO_SLP_LAN# <37,46> SIO_SLP_S0# <11,21,39,52> SIO_SLP_S3# <21,37,38> SIO_SLP_S4# <11,21,37,50,53> SIO_SLP_S5# <21,37>
SUSCLK <35,40> SUSACK# <37>
ME_SUS_PWR_ACK <37>
LAN_WAKE# <33,37> AC_PRESENT <37 > SIO_SLP_SUS# <11,20,37,46,51,53> SIO_PWRBTN# <7,37> SYS_RESET# <17,21> SPKR <36> H_PWRGD <7>
@
T192
PAD~D
ITP_P MODE _CPU <7> PCH_JTAGX <7> PCH_JTAG_TMS <7> PCH_JTAG_TDO <7> PCH_JTAG_TDI <7> PCH_JTAG_TCK <7>
@
T182
PAD~D
@
T183
PAD~D
@
T186
PAD~D
@
T187
PAD~D
@
T188
PAD~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KABYLAKE PCH-H (5/9)
KABYLAKE PCH-H (5/9)
KABYLAKE PCH-H (5/9)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Date: Sheet
Date: Sheet
Date: Sheet
ESPI_RESET# ESPI_ALERT#
ESPI_CLK_5105
SML0_SMBCLK
SML1_SMBCLK
MEM_SMBCLK
LAN_WAKE#
VRALERT # SIO_SLP_LAN# ME_SUS_PWR_ACK
PCH_PCIE_WAKE#
LAN_WAKE#
PCH_BATLOW#
AC_PRESENTKB_DET#
SIO_RCIN#
CLKRUN# SYS_PWROK
IR_CAM_DE T# PCH_JTAG_TCK PCH_PWROK
SUSCLK
PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO
DDR_XDP_WAN_SMBDAT DDR_XDP_WAN_SMBCLK
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
1
RH95 10K_0402_5%@ RH340 8.2K_0402_1%
ESD Request:place near PCH side
'()'*+,*-.
CC316@RF@ 33P_0402_50V8J
CC318@RF@ 33P_0402_50V8J
CC319@RF@ 33P_0402_50V8J
CC320@RF@ 33P_0402_50V8J
Place close PCH side
RL70 10K_0402_5%@
RH203 10K_0402_5%@ RH204 10K_0402_5%@ RH327 10K_0402_5%@
RH92 1K_0402_5% RH93 10K_0402_5% RH94 8.2K_0402_5% RH243 10K_0402_5%
RH213 10K_0402_5%LPC@ RH202 8.2K_0402_5%LPC@ RH199 100K_0402_5%
RH373 100K_0402_5% RH313 51_0402_5%@ RH424 10K_0402_5%@ RH83 1K_0402_5%@
1 2
RH312 51_0402_5%
1 2
RH314 51_0402_5%
1 2
RH315 51_0402_5%
RH374 2.2K_0402_5% RH333 2.2K_0402_5%
1
1 2 1 2
SYS_RESET#
1 2
1 2
1 2
1 2
1 2 1 2 1 2
1 2 1 2 1 2 1 2
1 2 1 2 1 2
1 2 1 2 1 2 1 2
1 2 1 2
+3.3V_1.8V_GPPA
0.1U_0402_25V6
12
+3.3V_ALW_PCH
20 61
20 61
20 61
12
@ESD@
CC302
+3.3V_LAN
+3.3V_DSW
+3.3V_RUN
+1.0V_VCCSTG
+3.3V_RUN
of
of
of
0.2
0.2
0.2
+3.3V_RUN
1 2
RH378 10K_0402_5%
1 2
RH207 100K_0402_5%@
1 2
RH375 100K_0402_5%
1 2
RH360 49.9K_0402_1%@
1 2
RH361 49.9K_0402_1%@
1 2
RH355 10K_0402_1%
1 2
D D
RH339 10K_0402_5%
1 2
RH331 4.7K_0402_5%@
PCH STRAPS IF SAMPLED HIGH[ NO REBOOT ]
+3.3V_ALW_PCH
1 2
RH309 10K_0402_5%
1 2
RH330 49.9K_0402_1%
1 2
RH376 49.9K_0402_1%
1 2
RH1 100K_0402_5%
5
FFS_INT2 GPP_C8
3.3V_TS_EN LPSS_UART2_TXD LPSS_UART2_RXD HDD_FALL_INT SIO_EXT_SCI# NRB_BIT
SIO_EXT_WAKE#
8/20
LPSS_UART2_TXD
LPSS_UART2_RXD
EDP_HPD
Reserved
3.3V_TS_EN<32> SIO_EXT_SCI#<37>
HDD_FALL_INT<41>
TPM_PIRQ#<39>
MEDIACARD_IRQ#<34>
SBIOS_TX<38>
HDD_EN<41> LCD_CBL_DET#<32>
@
T259
PAD~D
SIO_EXT_WAKE#<37>
I2C1_ SCK_TP<44> I2C1_ SDA_ TP<44>
@
T260
PAD~D
FFS_INT2<41>
4
BBS_BIT6
3.3V_TS_EN SIO_EXT_SCI# HDD_FALL_INT
NRB_BIT TPM_PIRQ# ONE_DIMM# MEDIACARD_IRQ#
GPP_C8
HDD_EN LCD_CBL_DET# RTD3_CIO_PWR_EN SIO_EXT_WAKE#
LPSS_UART2_TXD LPSS_UART2_RXD
I2C1_ SCK_TP I2C1_ SDA_ TP
TBT_FORCE_PWR FFS_INT2
UH1K
AT29
GPP_B22/GSPI1_MOSI
AR29
GPP_B21/GSPI1_MISO
AV29
GPP_B20/GSPI1_CLK
BC27
GPP_B19/GSPI1_CS#
BD28
GPP_B18/GSPI0_MOSI
BD27
GPP_B17/GSPI0_MISO
AW27
GPP_B16/GSPI0_CLK
AR24
GPP_B15/GSPI0_CS#
AV44
GPP_C9/UART0_TXD
BA41
GPP_C8/UART0_RXD
AU44
GPP_C11/UART0_CTS#
AV43
GPP_C10/UART0_RTS#
AU41
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
AT44
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
AT43
GPP_C13/UART1_TXD/ISH_UART1_TXD
AU43
GPP_C12/UART1_RXD/ISH_UART1_RXD
AN43
GPP_C23/UART2_CTS#
AN44
GPP_C22/UART2_RTS#
AR39
GPP_C21/UART2_TXD
AR45
GPP_C20/UART2_RXD
AR41
GPP_C19/I2C1_SCL
AR44
GPP_C18/I2C1_SDA
AR38
GPP_C17/I2C0_SCL
AT42
GPP_C16/I2C0_SDA
AM44
GPP_D4/ISH_I2C2/I2C3_SDA
AJ44
GPP_D23/ISH_I2C2_SCL/I2C3_SCL
SKL-H-PCH_BGA837
3
SPT-H_PCH
GPP_D9 GPP_D10 GPP_D11
GPP_D16/ISH_UART0_CTS#
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA
11 OF 12
GPP_D15/ISH_UART0_RTS#
GPP_D12
GPP_H20/ISH_I2C0_SCL GPP_H19/ISH_I2C0_SDA
GPP_H22/ISH_I2C1_SCL GPP_H21/ISH_I2C1_SDA
GPP_A23/ISH_GP5 GPP_A22/ISH_GP4 GPP_A21/ISH_GP3 GPP_A20/ISH_GP2 GPP_A19/ISH_GP1 GPP_A18/ISH_GP0 GPP_A17/ISH_GP7
Rev_1.3
AL44 AL36 AL35 AJ39
AJ43 AL43 AK44 AK45
BC38 BB38
BD38 BE39
BC22 BD18 BE21 BD22 BD21 BB22 BC19
MEM_INTERLEAVED
DGPU_HOLD_RST#
AR_DET #
DGPU_PWR_EN
LID_CL#_PCH TPM_TYPE
CLKDET#
2
ISH_UART0_CTS# <35> ISH_UART0_RTS# <35> ISH_UART0_TXD <3 5> ISH_UART0_RXD <35>
@
T268
PAD~D
@
T258
PAD~D
WLAN
Reserved
LCD_CBL_DET#
PCH_DP2_CTRL_DATA PCH_DP1_CTRL_CLK PCH_DP1_CTRL_DATA PCH_DP3_CTRL_CLK PCH_DP3_CTRL_DATA
TPM_TYPE
1
1 2
RC370 10K_0402_5%
1 2
RH221 2.2K_0402_5%
1 2
RH222 2.2K_0402_5%
1 2
RH223 2.2K_0402_5%
1 2
RH224 2.2K_0402_5%
1 2
RH225 2.2K_0402_5%
1 2
RH379 100_0402_1%@
+3.3V_RUN
C C
B B
A A
+3.3V_ALW_PCH
12
RH311
@
8.2K_0402_5%
BBS_BIT6
BOOT BIOS Destination(Bit 6)
HIGH LOW(DEFAULT)
SPT-H_PCH
DIMM TYPE
HIGH Interleave
Non-InterleaveLOW
GPP_I7/DDPC_CTRLCLK
GPP_I8/DDPC_CTRLDATA
GPP_I5/DDPB_CTRLCLK
GPP_I6/DDPB_CTRLDATA
GPP_I9/DDPD_CTRLCLK
GPP_I10/DDPD_CTRLDATA
5 OF 12
Rev_1.3
GPP_F14 GPP_F23 GPP_F22 GPP_G23 GPP_G22 GPP_G21 GPP_G20 GPP_H23
AR_DET #
BB3 BD6 BA5 BC4 BE5 BE6
Y44 V44 W39 L43 L44 U35 R35 BD36
PCH_DP2_CTRL_DATA PCH_DP1_CTRL_CLK PCH_DP1_CTRL_DATA PCH_DP3_CTRL_CLK PCH_DP3_CTRL_DATA
+3.3V_ALW_PCH+3.3V_ALW_PCH
RH400 10K_0402_5%
1 2
12
@
RH401 10K_0402_5%
PCH_DP1_CTRL_CLK <26> PCH_DP1_CTRL_DATA <26> PCH_DP3_CTRL_CLK <25> PCH_DP3_CTRL_DATA <25>
AR_DET #
NON ARHIGH
ARLOW
+5V_ALW
LPSS_UART2_TXD LPSS_UART2_RXD
Check ME about wire to board PN
+3.3V_ALW_PCH
SIO_SLP_S3#<20,37,38>
+3.3V_ALW
SIO_SLP_S5#<20,37> SIO_SLP_S4#<11,20,37,50,53> SIO_SLP_A#<20,37>
+3.3V_ALW
PCH_RTCRST#<20,37>
POWER_SW#_MB<38,45>
SYS_RESET#<17,20> SIO_SLP_S0#<11,20,39,52>
Intel Management Engine Test Suite
CONN@
JUART1
1
1
2
2
3
3
4
4
5
GND
6
GND
CVILU_CI1804M1VRA-NH
JAPS1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
GND
20
GND
CONN@
ACES_50506-01841-P01
AW4
AY2 AV4 BA4
BD7
SKL-H-PCH_BGA837
@
RH371 10K_0402_5%
1 2
12
RH372 10K_0402_5%
UH1E
GPP_I0/DDPB_HPD0 GPP_I1/DDPC_HPD1 GPP_I2/DDPD_HPD2 GPP_I3/DDPE_HPD3
GPP_I4/EDP_HPD
LPC SPI
PCH_DP1_HPD<26> PCH_DP2_HPD<28,29> PCH_DP3_HPD<25>
EDP_HPD<32>
+3.3V_RUN
10K_0402_5%
RH267@
1 2
ONE_DIMM#
10K_0402_5%
12
RH268
PCH_DP1_HPD PCH_DP2_HPD PCH_DP3_HPD
EDP_HPD
MEM_INTERLEAVED
DIMM Detect
HIGH LOW
1 DIMM 2 DIMM
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KABYLAKE PCH-H (6/9)
KABYLAKE PCH-H (6/9)
KABYLAKE PCH-H (6/9)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
21 61
21 61
21 61
of
of
of
0.2
0.2
0.2
5
4
3
2
1
1 2
1 2
1 2
+3.3V_PUSBDSW+3.3V_ALW
+3.3V_PRTC
0.0002A
+3.3V_ALW_PCHRES+3.3V_ALW_PCH
+3.3V_1.8V_GPPA
0.0879A
+3.3V_1.8V_AZIO+3.3V_ALW_PCHRES
0.075A
0.0395A
+1.8V_PRIM
eSPI Power
+1.0V_AAZPLL
1 2
BLM15GA750SN1D_2P
LC2
1
CC330
2
@
0.1U_0201_10V6K
+1.0V_CLK5
1
CC311
2
+1.0V_CLK2
+1.0V_CLK4
NO CAP
+1.0V_AAZPLL_R
+3.3V_1.8V_AZIO
0.1U_0201_10V6K
+1.0V_CLK3
NO CAP
NO CAP
+1.0V_AUSB
1 2
BLM15GA750SN1D_2P
LC1
1
CC329
2
@
0.1U_0201_10V6K
+1.0V_CLK1
+1.0V_DUSB
+1.0V_PRIM
+1.0V_DSW
NO CAP
+1.0V_MPHY
+1.0V_AMPHYPLL
+1.0V_APLLEBB
+3.3V_1.8V_AZIO_R
+3.3V_PUSBDSW
1
CC310
2
0.1U_0201_10V6K
NO CAP
NO CAP
AA23
VCCPRIM_1P0
AA26
VCCPRIM_1P0
AA28
VCCPRIM_1P0
AC23
VCCPRIM_1P0
AC26
VCCPRIM_1P0
AC28
VCCPRIM_1P0
AE23
VCCPRIM_1P0
AE26
VCCPRIM_1P0
Y23
VCCPRIM_1P0
Y25
VCCPRIM_1P0
BA29
DCPDSW_1P0
N17
VCCCLK1
R19
VCCCLK3
U20
VCCCLK4
V17
VCCCLK2
R17
VCCCLK2
K2
VCCCLK5
K3
VCCCLK5
U21
VCCMPHY_1P0
U23
VCCMPHY_1P0
U25
VCCMPHY_1P0
U26
VCCMPHY_1P0
V26
VCCMPHY_1P0
A43
VCCAMPHYPLL_1P0
B43
VCCAMPHYPLL_1P0
C44
VCCMIPIPLL_1P0
C45
VCCMIPIPLL_1P0
V28
VCCAPLLEBB_1P0
AC17
VCCPRIM_1P0
AJ5
VCCUSB2PLL_1P0
AL5
VCCUSB2PLL_1P0
AN19
VCCHDAPLL_1P0
BA15
VCCHDA
W15
VCCDSW_3P3
SKL-H-PCH_BGA837
BD2 BD45 BD44 BE44
BC1
UH1H
UH1J
VSS VSS VSS VSS
D45
VSS
A42
VSS
B45
VSS
B44
VSS
A4
VSS
A3
VSS
B2
VSS
A2
VSS
B1
VSS
BB1
VSS VSS
A44
VSS
C1
RSVD
D1
RSVD
SKL-H-PCH_BGA837
SPT-H_PCH
CORE
VCCGPIO
MPHY
USB
8 OF 12
SPT-H_PCH
PCH_TRIGOUT
10 OF 12
1 2
RH42 30_0402_5%
VCCRTCPRIM_3P3
Rev_1.3
RSVD RSVD RSVD
RSVD RSVD
RSVD RSVD RSVD RSVD RSVD RSVD RSVD
PREQ# PRDY#
CPU_TRST# PCH_TRIGIN
Rev_1.3
VCCPRIM_1P0 VCCDSW_3P3
VCCPGPPA VCCPGPPBCH VCCPGPPBCH
VCCPGPPEF VCCPGPPEF
VCCPGPPG VCCPRIM_3P3
VCCPRIM_1P0
VCCATS VCCRTC
DCPRTC
VCCPRIM_1P0 VCCPRIM_1P0 VCCPRIM_1P0 VCCPRIM_1P0
VCCSPI VCCSPI VCCSPI
VCCPGPPD
VCCPGPPD
VCCPGPPD
VCCPGPPD VCCPRIM_3P3
VCCPRIM_3P3 VCCPRIM_3P3
AR22 W13 U13
P31 N31
P27 R27 N29 P29 AN29 R24 P24
AT3 AT4 AY5 AL2 AK1
PCH_2_CPU_TRIGGERPCH_2_CPU_TRIGGER_R
+2.8V_FHV
AL22 BA24 BA31
BC42 BD40 AJ41 AL41 AD41 AN5
+1.0V_DTS
AD15 AD13 BA20 BA22 BA26
+DCPRTC
AJ20 AJ21 AJ23 AJ25
BE41 BE43 BE42
BC44 BA45 BC45 BB45
BD3 BE3 BE4
PAD~D PAD~D PAD~D
PAD~D PAD~D
PAD~D PAD~D PAD~D PAD~D PAD~D PAD~D
PCH_XDP_PREQ# PCH_XDP_PRDY# CPU_XDP_TRST# PCH_2_CPU_TRIGGER_R CPU_2_PCH_TRIGGER
PAD~D
+3.3V_DSW
+3.3V_1.8V_GPPA
NO CAP
+3.3V_RUN_ATS
@
T66
@
T67
@
T68
@
T69
@
T70
@
T71
@
T72
@
T74
@
T73
@
T76
@
T75
@
T77
PCH_2_CPU_TRIGGER <10>
+3.3V_PGPPBCH
+3.3V_PRTCPRIM
+1.0V_PRIM
+3.3V_1.8V_SPI
NO CAP
+3.3V_1.8V_GPPD
NO CAP
+3.3V_1.8V_FUSE
PCH_XDP_PREQ# <7> PCH_XDP_PRDY# <7> CPU_XDP_TRST# <7>
CPU_2_PCH_TRIGGER <10>
+3.3V_PGPPEF
+3.3V_PGPPG
+3.3V_PRTC
0.1U_0201_10V6K CH68
1
2
'()'*+,*-.
+3.3V_1.8V_AZIO_R +1.0V_APLLEBB
1
2
CC327
RF@
2.2P_0402_50V8C
+3.3V_PHVC
1
2
CC328
RF@
2.2P_0402_50V8C
+1.0V_ALW_PCH+1.0V_PRIM
1 2
RH254 0_1206_5%
+1.0V_ALW_PCH
D D
C C
RH255 0_0402_5%@
RH256 0_0402_5%
RH257 0_0402_5%
RH258 0_0402_5%
RH259 0_0402_5%
RH260 0_0402_5%
RH286 0_0402_5%
RH287 0_0402_5%
RH288 0_0402_5%
2
RH290 0_0402_5%
+3.3V_ALW_PCH
RH298 0_0402_5%
B B
A A
RH299 0_0402_5%
RH300 0_0402_5%
RH306 0_0402_5%@
+3.3V_ALW
RH301 0_0603_5%
+3.3V_RUN
RH302 0_0402_5%
+3.3V_ALW_PCH
RH303 0_0402_5%
RH304 0_0402_5%
RH305 0_0402_5%
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
PJP3
112
JUMP_43X79
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
+1.0V_DSW
0.0454A
+1.0V_CLK1
0.0348A
+1.0V_CLK3
0.0237A
+1.0V_CLK4
0.0327A
+1.0V_CLK2
0.205A
+1.0V_F24
0.0046A
+1.0V_DUSB
0.533A
+2.8V_FHV
0.0908A
+1.0V_DTS
0.0061A
+1.0V_MPHY
2.10A
+1.0V_APLLEBB
0.095A
+3.3V_PRTCPRIM
0.0002A
+3.3V_PHVC
0.2875A
+3.3V_1.8V_FUSE
0.0811A
+3.3V_DSW
0.0811A
0.403A
+3.3V_RUN_ATS
0.0066A
+3.3V_PGPPEF
0.14107A
+3.3V_PGPPBCH
0.27262A
+3.3V_PGPPG
0.1318A
1 2
RH276 0_0603_5%
+RTC_CELL
1 2
RH297 0_0402_5%
1 2
RH279 0_0603_5%
+3.3V_ALW_PCHRES
1 2
RH291 0_0402_5%LPC@
+1.8V_ALW_PCHRES
1 2
RH294 0_0402_5%ESPI@
1 2
RH292 0_0402_5%
+1.8V_ALW_PCHRES
1 2
RH295 0_0402_5%@
+3.3V_ALW_PCHRES +3.3V_1.8V_GPPD
1 2
RH293 0_0402_5%
+1.8V_ALW_PCHRES
1 2
RH296 0_0402_5%@
+3.3V_ALW_PCHRES +3.3V_1.8V_SPI
RH246 0_0603_5%
+1.8V_ALW_PCHRES
RH250 0_0603_5%@
RH247 0_0603_5%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KABYLAKE PCH-H (7/9)
KABYLAKE PCH-H (7/9)
KABYLAKE PCH-H (7/9)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
22 61
22 61
22 61
of
of
of
0.2
0.2
0.2
5
4
3
2
1
+1.0V_ALW_PCH +1.0V_AMPHYPLL
1 2
RH289 0_0603_5%
D D
+1.0V_ALW_PCH
1 2
RH238 0_0603_5%
C C
1 2
RH241 0_0603_5%
+3.3V_PRTC
1U_0402_6.3VAK
@
1
CH33
2
0.0248A
22U_0805_6.3VAM
22U_0805_6.3VAM
1U_0402_6.3VAK
@
@
1
1
1
CH323
CH324
CH267
2
2
2
+1.0V_AUSB+VCCAUSB_VCCAAZPLL_1P0
1 2
RH239 0_0603_5%
22U_0805_6.3VAM
22U_0805_6.3VAM
@
@
1
1
CH45
CH44
2
2
+1.0V_CLK5+1.0V_F24
22U_0805_6.3VAM
22U_0805_6.3VAM
@
1
1
CH29
2
2
0.1U_0402_25V6
1
2
1 2
RH240 0_0603_5%
1U_0402_6.3VAK
@
@
1
CH32
CH46
2
@
CH65
+1.0V_AAZPLL
+3.3V_PUSBDSW
+3.3V_PGPPEF
+3.3V_PGPPBCH
+3.3V_PGPPG
1U_0402_6.3VAK
@
1
CH31
2
0.1U_0201_10V6K
@
CH62
1
2
0.1U_0402_25V6
@
1
CH63
2
0.1U_0201_10V6K
@
CH64
1
2
+1.0V_MPHY
1
2
+1.0V_DSW
1U_0402_6.3VAK
1
2
+3.3V_RUN_ATS
1U_0402_6.3VAK
1
2
+3.3V_PHVC
0.1U_0402_25V6
1
2
+3.3V_PRTCPRIM
22U_0603_6.3V6M
1U_0402_6.3VAK
1
CH47
CH34
2
+1.0V_DUSB
CH35
CH36
@
CH66
0.1U_0402_25V6
1U_0402_6.3VAK
1
1
CH67
CH37
2
2
1U_0402_6.3VAK
1
CH38
2
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KABYLAKE PCH-H (8/9)
KABYLAKE PCH-H (8/9)
KABYLAKE PCH-H (8/9)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
23 61
23 61
23 61
of
of
of
0.2
0.2
0.2
5
D D
C C
B B
UH1I
AC18
VSS
AN4
VSS
AN10
VSS
BE14
VSS
BE18
VSS
BE23
VSS
BE28
VSS
BE32
VSS
BE37
VSS
BE40
VSS
BE9
VSS
C10
VSS
C2
VSS
C28
VSS
C37
VSS
J7
VSS
K10
VSS
K27
VSS
K33
VSS
K36
VSS
K4
VSS
K42
VSS
K43
VSS
L12
VSS
L13
VSS
L15
VSS
L4
VSS
L41
VSS
L8
VSS
M35
VSS
M42
VSS
N10
VSS
N15
VSS
N19
VSS
N22
VSS
N24
VSS
N35
VSS
N36
VSS
N4
VSS
N41
VSS
N5
VSS
P17
VSS
P19
VSS
P22
VSS
P45
VSS
R10
VSS
R14
VSS
R22
VSS
R29
VSS
R33
VSS
R38
VSS
R5
VSS
T1
VSS
T2
VSS
T4
VSS
Y18
VSS
Y20
VSS
Y21
VSS
Y26
VSS
Y28
VSS
Y29
VSS
A18
VSS
A25
VSS
A32
VSS
A37
VSS
AA17
VSS
AA18
VSS
AA20
VSS
AA21
VSS
AA25
VSS
AA29
VSS
AA4
VSS
AA42
VSS
AB10
VSS
SKL-H-PCH_BGA837
4
SPT-H_PCH
9 OF 12
Rev_1.3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AR5 AR7 U15 AL4 AE29 AE4 AE42 AF18 AF20 AF21 AF23 AF25 AF26 AF28 AF29 AG11 AG13 AG31 AG32 AG33 AG38 AG4 AH1 AH17 AH18 AH20 AH21 AH23 AH25 AH26 AH28 AH29 AH45 AJ10 AJ14 AJ15 AJ17 AJ18 AJ26 AJ28 AJ29 AJ31 AJ32 AJ36 AK4 AK42 AU7 AV17 AV24 AV27 AV31 AV33 AV6 AW13 AW19 AW29 AW37 AW9 AY38 AY45 B25 B3 B37 B40 B6 BA1 BB11 BB16 BB21 BB25 BB30 BB34 BC2 BD43
3
SPT-H_PCH
UH1L
C42
VSS
D10
VSS
D12
VSS
D15
VSS
D16
VSS
D17
VSS
D19
VSS
D21
VSS
D24
VSS
D25
VSS
D27
VSS
D29
VSS
D30
VSS
D31
VSS
D33
VSS
D35
VSS
D36
VSS
E13
VSS
E15
VSS
E31
VSS
E33
VSS
F44
VSS
F8
VSS
G42
VSS
G9
VSS
H17
VSS
H19
VSS
H22
VSS
H24
VSS
H27
VSS
H29
VSS
H3
VSS
H35
VSS
J10
VSS
J11
VSS
J3
VSS
J39
VSS
J5
VSS
T42
VSS
U10
VSS
U11
VSS
U14
VSS
U17
VSS
U18
VSS
U28
VSS
U29
VSS
U31
VSS
U32
VSS
U33
VSS
U38
VSS
U4
VSS
U8
VSS
V18
VSS
V20
VSS
V21
VSS
V23
VSS
V25
VSS
V29
VSS
V3
VSS
V45
VSS
W14
VSS
W31
VSS
W32
VSS
W33
VSS
W38
VSS
W4
VSS
W8
VSS
Y17
VSS
12 OF 12
SKL-H-PCH_BGA837
Rev_1.3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AB11 AB7 AB14 AB31 AB32 AB38 AB4 AB5 AC1 AC20 AC21 AC25 AC29 AC45 AB8 AD11 AD14 AB15 AD32 AD33 AD36 AD4 AD8 AE18 AE20 AE21 AE25 AE28 AL10 AL11 AL13 AL17 AL19 AL24 AL29 AL32 AL33 AL38 AM15 AM17 AM19 AM22 AM24 AM27 AM29 AM45 AN11 AN22 AN27 AN31 AN39 AN7 AN8 AP11 AP4 AR33 AR34 AR42 AR9 AT10 AT15 AT36 AT9 AU1 AU35 AU36 AU39 AU45 C4
2
1
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
KABYLAKE PCH-H (9/9)
KABYLAKE PCH-H (9/9)
KABYLAKE PCH-H (9/9)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
24 61
24 61
24 61
of
of
of
0.2
0.2
0.2
5
4
3
2
1
D D
C C
B B
+3.3V_RUN
SW1_PS8338_CFG0
1 2
RV125 4.7K_0402_5% RV126 4.7K_0402_5%@ RV127 4.7K_0402_5% RV128 100K_0402_5% RV129 100K_0402_5%
RV130 1M_0402_5% RV131 1M_0402_5% RV132 100K_0402_5% RV133 100K_0402_5%
+3.3V_RUN
12
12
RV55
RV57
@
4.7K_0402_5%
4.7K_0402_5%
12
12
RV56
RV58
@
4.7K_0402_5%
4.7K_0402_5%
#03.)-2A.:PABC):0B.30?)03)<3A03A._):0B>AC,3;.A0BV)DB.*3B;?)<,??)@02B)TGOQU J)MVM6)DWX (03)&0B.30?)82A.:PABC)^0@*)4&(`Q)Z)E=[ 8a)Z)E[)#03.G)A-)-*?*:.*@)4@*>;,?.= 8a)Z)F[)#03.L)A-)-*?*:.*@ (03)9,.0/;.A:)82A.:PABC)^0@*)4&(`Q)Z)F=[ 8a)Z)E[)#03.G)P;-)PACP*3)<3A03A._)2P*B)R0.P)<03.-);3*)<?,CC*@)4@*>;,?.= 8a)Z)F[)#03.L)P;-)PACP*3)<3A03A._)2P*B)R0.P)<03.-);3*)<?,CC*@
vender sugguest MUX use LLEQ PEQ=M and PI0=H !!
#30C3;//;R?*)AB<,.)*+,;?AS;.A0B)?*1*?-J)DB.*3B;?)<,??)@02B);.)TGOQU0P/JMVM6)DWX #$Y)Z) E[)@*>;,?.JE$YJ):0/<*B-;.*):P;BB*?)?0--),<).0)GGVO@\)]F\'L F[)F$YJ):0/<*B-;.*):P;BB*?)?0--),<).0)GNVO@\)]F\'L ^[EE$YJ):0/<*B-;.*):P;BB*?)?0--),<).0)IVO@\)]F\'L
1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
12
RV59
@
4.7K_0402_5%
12
RV60
@
4.7K_0402_5%
SW1_PS8338_SW SW1_PS8338_P0 SW1_DP1_AUXN SW1_DP2_AUXN
SW1_DP1_CADET SW1_DP2_CADET SW1_DP1_AUXP SW1_DP2_AUXP
12
RV61
@
4.7K_0402_5%
12
RV62
@
4.7K_0402_5%
@
@
RV63
4.7K_0402_5%
RV64
4.7K_0402_5%
12
12
RV65
@
4.7K_0402_5%
SW1_PS8338_P1 SW1_PS8338_PC10 SW1_PS8338_PC11 SW1_PS8338_PC20 SW1_PS8338_PC21 SW1_PS8338_PEQ
12
12
RV66
@
4.7K_0402_5%
PCH_DP3_CTRL_CLK<21>
PCH_DP3_CTRL_DATA<21>
CV62 CV61 close to pin30 &57 CV66,CV69,CV70 close to pin5,21,51
0.01UF_0402_25V7K
12
1 2
CPU_DP3_P0<9> CPU_DP3_N0<9>
CPU_DP3_P1<9> CPU_DP3_N1<9>
CPU_DP3_P2<9> CPU_DP3_N2<9>
CPU_DP3_P3<9>
CPU_DP3_N3<9>
CPU_DP3_AUXP<9>
CPU_DP3_AUXN<9>
Ω
CV65 0.1U_0201_10V6K
1 2
CV66 0.1U_0201_10V6K
1 2
CV67 0.1U_0201_10V6K
1 2
CV68 0.1U_0201_10V6K
1 2
CV69 0.1U_0201_10V6K
1 2
CV70 0.1U_0201_10V6K
1 2
CV71 0.1U_0201_10V6K
1 2
CV72 0.1U_0201_10V6K
for support TMDS signal need contact SCL/SDA to P22,23
1 2
CV73 0.1U_0201_10V6K
1 2
CV74 0.1U_0201_10V6K
0.1U_0201_10V6K
0.01UF_0402_25V7K CV62
1
12
CV61
CV60
2
PCH_DP3_HPD<21>
0.1U_0201_10V6K
0.1U_0201_10V6K
CV63
1
1
2
2
CPU_DP3_P0_C CPU_DP3_N0_C
CPU_DP3_P1_C CPU_DP3_N1_C
CPU_DP3_P2_C CPU_DP3_N2_C
CPU_DP3_P3_C CPU_DP3_N3_C
SW1_PS8338_P1 SW1_PS8338_P0
CPU_DP3_AUXP_C CPU_DP3_AUXN_C
SW1_PS8338_CFG0 SW1_PS8338_PC10
SW1_PS8338_PC11 SW1_PS8338_PC20 SW1_PS8338_PC21
+3.3V_RUN
CV64
UV8
5
VDD33
21
VDD33
30
VDD33
51
VDD33
57
VDD33
6
IN_D0p
7
IN_D0n
9
IN_D1p
10
IN_D1n
12
IN_D2p
13
IN_D2n
15
IN_D3p
16
IN_D3n
4
IN_CA_DET
3
IN_HPD
2
I2C_CTL_EN
1
Pl1/SCL_CTL
60
Pl0/SDA_CTL
22
IN_DDC_SCL
23
IN_DDC_SDA
24
IN_AUXp
25
IN_AUXn
59
CFG0
58
CFG1
56
PC10
55
PC11
54
PC20
53
PC21
11
GND
19
GND
52
GND
61
PAD(GND)
PS8338BQFN60GTR-A0_QFN60_5X9
OUT1_D0p OUT1_D0n
OUT1_D1p OUT1_D1n
OUT1_D2p OUT1_D2n
OUT1_D3p OUT1_D3n
OUT2_D0p OUT2_D0n
OUT2_D1p OUT2_D1n
OUT2_D2p OUT2_D2n
OUT2_D3p OUT2_D3n
OUT1_AUXp_SCL
OUT1_AUXn_SDA
OUT2_AUXp_SCL
OUT2_AUXn_SDA
OUT1_CA_DET
OUT1_HPD
OUT2_CA_DET
OUT2_HPD
CEXT REXT
Priority : WIGI -> VGA
SW
PEQ
PD
50 49
47 46
45 44
42 41
40 39
37 36
35 34
32 31
26 27
28 29
SW1_DP1_CADET
43 48
SW1_DP2_CADET
33 38
SW1_PS8338_SW
18
SW1_PS8338_PEQ
8 14 17 20
4.99K_0402_1%
12
RV50
12
2.2U_0402_6.3V6M CV75
SW1_DP1_P0 <35> SW1_DP1_N0 <35>
SW1_DP1_P1 <35> SW1_DP1_N1 <35>
SW1_DP1_P2 <35> SW1_DP1_N2 <35>
SW1_DP1_P3 <35> SW1_DP1_N3 <35>
SW1_DP2_P0 <27> SW1_DP2_N0 <27>
SW1_DP2_P1 <27> SW1_DP2_N1 <27>
SW1_DP1_AUXP <35>
SW1_DP1_AUXN <35>
SW1_DP2_AUXP <27>
SW1_DP2_AUXN <27>
SW1_DP1_HPD <35>
SW1_DP2_HPD <27>
WIGI
VGA
PI0:Automatic EQ disable, Internal pull down ~150K ohm, 3.3V I/O PI0 = L: Automatic EQ enable(default) H: Automatic EQ disable
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DP SW2 PS8338
DP SW2 PS8338
DP SW2 PS8338
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
25 61
25 61
25 61
of
of
of
0.2
0.2
0.2
5
4
3
2
1
(03)\3*:b*B3A@C*)GO)
D D
1 2
RV24 5.6_0402_5%EMI@
CPU_DP1_N0<9>
CPU_DP1_P0<9>
CPU_DP1_N1<9>
CPU_DP1_P1<9>
C C
CPU_DP1_N2<9>
CPU_DP1_P2<9>
CPU_DP1_N3<9>
CPU_DP1_P3<9>
1 2
CV32 0.1U_0402_25V6
1 2
CV31 0.1U_0402_25V6
1 2
CV34 0.1U_0402_25V6
1 2
CV33 0.1U_0402_25V6
1 2
CV36 0.1U_0402_25V6
1 2
CV35 0.1U_0402_25V6
12
0.1U_0402_25V6
CV38
12
0.1U_0402_25V6
CV37
HDMI_TX_N2
HDMI_TX_P2
HDMI_TX_N1
HDMI_TX_P1
HDMI_TX_N0
HDMI_TX_P0
HDMI_CLKN
HDMI_CLKP
HCM1012GH900BP_4P
2
2
1
1
@EMI@
1 2
RV25 5.6_0402_5%EMI@
1 2
RV27
HCM1012GH900BP_4P
2
2
1
1
@EMI@
1 2
RV28
1 2
RV30 5.6_0402_5%EMI@
HCM1012GH900BP_4P
2
2
1
1
@EMI@
1 2
RV31
1 2
RV33
HCM1012GH900BP_4P
2
2
1
1
@EMI@
1 2
RV34 5.6_0402_5%EMI@
LV3
LV6
LV9
LV12
3
4
5.6_0402_5%EMI@
3
4
5.6_0402_5%EMI@
3
4
5.6_0402_5%EMI@
5.6_0402_5%EMI@
3
4
HDMI_L_TX_N2
3
EMI@
RV26 200_0402_5%
4
1 2
HDMI_L_TX_P2
RV29 200_0402_5%
1 2
RV32 200_0402_5%
1 2
RV35 200_0402_5%
1 2
HDMI_L_TX_N1
EMI@
HDMI_L_TX_P1
HDMI_L_TX_N0
EMI@
HDMI_L_TX_P0
HDMI_L_CLKN
EMI@
HDMI_L_CLKP
HDMI_TX_P2 HDMI_TX_N2 HDMI_TX_P1 HDMI_TX_N1 HDMI_TX_P0 HDMI_TX_N0 HDMI_CLKP HDMI_CLKN
3
4
3
4
3
4
0.1U_0201_10V6K
1
@
CV39
2
+3.3V_RUN
+3.3V_RUN
+5V_RUN
1
AP2330W-7_SC59-3
IN
UV2
GND2OUT
3
12
RV19@10K_0402_5%
1 2
RV10 470_0402_1%
1 2
RV11 470_0402_1%
1 2
RV12 470_0402_1%
1 2
RV13 470_0402_1%
1 2
RV14 470_0402_1%
1 2
RV15 470_0402_1%
1 2
RV16 470_0402_1%
1 2
RV17 470_0402_1%
1 2
RV18 10K_0402_5%
+VHDMI_VCC
0.1U_0201_10V6K
1
2
HDMI_HPD
HDMI_CTRL_DATA HDMI_CTRL_CLK
HDMI_CEC HDMI_L_CLKN
HDMI_L_CLKP HDMI_L_TX_N0
HDMI_L_TX_P0 HDMI_L_TX_N1
HDMI_L_TX_P1 HDMI_L_TX_N2
HDMI_L_TX_P2
HDMI_OB
2
G
10U_0603_10V6M
@
CV40
CV41
12
HDMI connector
JHDMI1
CONN@
19
HP_DET
18
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
11
CK_shield
10
CK+
9
D0-
8
D0_shield
7
D0+
6
D1-
5
D1_shield
4
D1+
3
D2-
2
D2_shield
1
D2+
CONCR_099BKAC19YBLCNF
LINK 099BKAC19YBLCNF DONE
1
D
QV4 L2N7002WT1G_SC-70-3
S
3
GND GND GND GND
20 21 22 23
B B
PCH_DP1_HPD<21>
+3.3V_RUN
PCH_DP1_CTRL_CLK<21>
A A
5
PCH_DP1_CTRL_DATA<21>
DMN65D8LDW-7_SOT363-6
1M_0402_5%
RV20
1 2
5
QV3B
1
+3.3V_RUN
G
S
QV5
L2N7002WT1G_SC-70-3
QV3A
2
DMN65D8LDW-7_SOT363-6
HDMI_CTRL_CLK
6
HDMI_CTRL_DATA
34
4
123
D
HDMI_HPD
1 2
RV21 20K_0402_5%
1 2
RV22 2.2K_0402_5%
1 2
RV23 2.2K_0402_5%
+VHDMI_VCC
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
HDMI CONN
HDMI CONN
HDMI CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
26 61
26 61
26 61
of
of
of
0.2
0.2
0.2
5
4
3
2
1
(03)!\!)8aL7c#L (03)B0B%!\!)8aG7c#L
(03)'*;?.*b)80?,.A0B
LV30BLM15PX600SN1D_2P
+CRT_VCC
0.1U_0402_25V6
1
2
+3.3V_RUN
12
CV101
0.1U_0402_25V6
1
2
4.7U_0402_6.3V6M CV102
1
2
Place near UV6.4 Place near UV6.26Place near UV6.25
+VCCK_12
CV100
+3.3V_RUN
0.1U_0402_25V6
0.1U_0402_25V6 CV103
1
2
2.2U_0402_16V6K
CV104
CV105
1
1
2
2
0.1U_0402_25V6 CV106
1
2
+3.3V_RUN
+3.3V_RUN
D D
RV106 4.7K_0402_5%@ RV107 4.7K_0402_5%@
RV102 100K_0402_5%
12
ISPSCL
12
ISPSDA
SW1_DP2_HPD
12
SW1_DP2_AUXP<25> SW1_DP2_AUXN<25>
SW1_DP2_P0<25> SW1_DP2_N0<25> SW1_DP2_P1<25> SW1_DP2_N1<25>
60ohm/1A
1 2
LV14 BLM15PX600SN1D_2P
+3.3V_RUN
+3.3V_VGA
1 2 1 2
1 2 1 2 1 2 1 2
1 2
RV123 4.7K_0402_5%
1 2
RV124 4.7K_0402_5%
SW1_DP2_HPD<25>
SW1_DP2_AUXP_C
CV1110.1U_0402_10V7K
SW1_DP2_AUXN_C
CV1120.1U_0402_10V7K
SW1_DP2_P0_C
CV1070.1U_0402_10V7K
SW1_DP2_N0_C
CV1080.1U_0402_10V7K
SW1_DP2_P1_C
CV1090.1U_0402_10V7K
SW1_DP2_N1_C
CV1100.1U_0402_10V7K
CLK_DDC2_CRT DAT_DDC2_CRT
ISPSCL ISPSDA
SW1_DP2_HPD
+VCCK_12
1
AVC33
4
AVCC_12
14
VCC_33
2
AUX_P
3
AUX_N
5
LANE0_P
6
LANE0_N
7
LANE1_P
8
LANE1_N
10
POL1/SPI_CEB
9
POL2
11
GPI1/SPI_CLK
12
GPI2/SPI_SI
13
GPI3/SPI_SO
15
VGA_SCL
16
VGA_SDA
30
SMB_SCL
29
SMB_SDA
32
HPD
UV6
RTD2166
RTD2166-CG_QFN32_4X4
VDD_DAC_33
VCCK_12 PVCC_33
HVSYNC_PWR
VSYNC HSYNC
BLUE_P
GREEN_P
RED_P
LDO_RSTB
EXT_CLK_IN
EXT1.2V_CTRL
GND
EPAD_GND
20 25 26
17 18 19
21 22 23
27 28 31
24 33
+VDD_DAC_33 +VCCK_12
VSYNC_CRT HSYNC_CRT
BLUE_CRT GREEN_CRT RED_CRT
60ohm/1A
+3.3V_RUN
C C
POL1(P10)
10
Operation Mode Table
0
X POL2 (P9)
B B
A A
5
1
ROMXEEPROM
4
PJDLC05C_SOT23-3
2
3
@ESD@
DV5
1
RED_CRT GREEN_CRT BLUE_CRT
12
12
RV116
75_0402_1%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
RV117
75_0402_1%
RV118
3
12
75_0402_1%
DAT_DDC2_CRT CLK_DDC2_CRT HSYNC_CRT VSYNC_CRT
1
1
2
2
12P_0402_50V8J
CV127
CV126
LV16 BLM15BB470SN1D_2PEMI@ LV17 BLM15BB470SN1D_2PEMI@ LV18 BLM15BB470SN1D_2PEMI@
1
2
12P_0402_50V8J
CV128
+CRT_VCC
RV119
1 2
2.2K_0402_5%
LV19 BLM15AG121SN1D_L0402_2PEMI@ LV20 BLM15AG121SN1D_L0402_2PEMI@
2016/01/01
2016/01/01
2016/01/01
1 2 1 2 1 2
12P_0402_50V8J
@
RV120
1 2
2.2K_0402_5%
1 2 1 2
@
Compal Secret Data
Compal Secret Data
Compal Secret Data
RV121
1 2
1K_0402_5%
1
CV132
2
22P_0402_50V8J
Deciphered Date
Deciphered Date
Deciphered Date
1
2
@
RV122
CV133
@
CV129
@
3.3P_0402_50V8C
1 2
1K_0402_5%
1
2
22P_0402_50V8J
1
CV130
2
@
3.3P_0402_50V8C
2
2
1
CV131
2
@
3.3P_0402_50V8C
2017/01/01
2017/01/01
2017/01/01
PJDLC05C_SOT23-3
3
@ESD@
DV6
1
+5V_RUN
1
UV4
IN
AP2330W-7_SC59-3
GND2OUT
3
+CRT_VCC
1
CV134 1U_0402_6.3V6K
40mils
@
T200PAD~D
M_ID2#
0.1U_0402_16V4Z CV135
1
2
2
JCRT-11 RED
GREEN
HSYNC_CONN
BLUE
VSYNC_CONN
JCRT1
6
11
1 7
12
2 8
13
3 9
14
G
4
16
G
10
17
15
5
CCM_C070546HR015M29CZR
CONN@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DP to VGA & VGA Conn
DP to VGA & VGA Conn
DP to VGA & VGA Conn
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
of
27 61
of
27 61
of
27 61
0.2
0.2
0.2
5
+3.3V_RUN +3.3V_CPS
1 2
LT11 BLM15PX600SN1D_2P
D D
+3.3V_RUN
AUX1_SN OOP_EN#
MUX1_SSEQ0
12
+3.3V_RUN
1K_0402_5%
@
RT137
1 2
1K_0402_5%
12
RT138
C C
RT308 4.7K_0402_5%
20K_0402_5%
@
12
RT302
10U_0402_6.3V6M
1
12
CT117
2
0.1U_0201_10V6K CT118
USB3_PTX_DRX_P5<20> USB3_PTX_DRX_N5<20>
0.1U_0201_10V6K CT119
1
2
CPU_DP2_P0<9> CPU_DP2_N0<9>
CPU_DP2_P1<9> CPU_DP2_N1<9>
CPU_DP2_P2<9> CPU_DP2_N2<9>
CPU_DP2_P3<9> CPU_DP2_N3<9>
TBTA_RX1N<31>
TBTA_RX1P<31>
TBTA_RX2N<31>
TBTA_RX2P<31>
PCH_DP2_HPD<21,29>
MUX1_DPEQ1
4
0.1U_0201_10V6K
0.1U_0201_10V6K CT121
CT120
1
1
2
2
CT103 0.1U_0402_25V6 CT104 0.1U_0402_25V6
CT105 0.1U_0402_25V6 CT106 0.1U_0402_25V6
CT107 0.1U_0402_25V6 CT108 0.1U_0402_25V6
CT109 0.1U_0402_25V6 CT110 0.1U_0402_25V6
CT113 0.1U_0402_25V6 CT114 0.1U_0402_25V6
for pin control , connect to PD GPIO
Check I2C or Pin control
+3.3V_RUN
TUSB546: Pop RT246,Depop CT122 PS8740:Depop RT246,Pop CT122
1 2
RT246 0_0402_5%
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2
RT380 0_0402_5%
1K_0402_5%
@
RT247
1 2
20K_0402_5%
1K_0402_5%
@
12
12
RT248
RT303
12
CT1222.2U_0402_6.3V6M @
+3.3V_CPS_R1
CPU_DP2_P0_C CPU_DP2_N0_C
CPU_DP2_P1_C CPU_DP2_N1_C
CPU_DP2_P2_C CPU_DP2_N2_C
CPU_DP2_P3_C CPU_DP2_N3_C
USB3_PTX_C_DRX_P5 USB3_PTX_C_DRX_N5
AUX1_SN OOP_EN#
MUX1_USB_EQ0
UT9
1
VCC
6
VCC
20
VCC
28
VCC
9
DP0p
10
DP0n
12
DP1p
13
DP1n
15
DP2p
16
DP2n
18
DP3p
19
DP3n
31
RX1n
30
RX1p
39
RX2n
40
RX2p
8
SSTXp
7
SSTXn
29
SNK_CAD/DCI_DAT
32
HPDIN/DCI_CLK
41
PAD
TUSB546_QFN40_4X6
+3.3V_RUN
1K_0402_5%
1 2
1K_0402_5%
12
3
MUX1_USB_EQ1
35
EQ1 EQ0
I2C_EN
DPEQ1
DPEQ0/A1
SSEQ1
SSEQ0/A0
FLIP/SCL
CTL0/SDA
CTL1/HPDIN
TX1n TX1p
TX2p TX2n
SSRXp SSRXn
SBU1 SBU2
AUXp AUXn
@
RT143
20K_0402_5%
@
12
RT144
RT304
MUX1_USB_EQ0
38
MUX1_I2C_EN
17
MUX1_DPEQ1
2
MUX1_DPEQ0
14
MUX1_SSEQ1
3
MUX1_SSEQ0
11
MUX1_FLIP_SEL
21
MUX1_USB_SEL
22
MUX1_DP_SEL
23
34 33
37 36
USB3_PRX_C_DTX_P5
5
USB3_PRX_C_DTX_N5
4
TUSB546A_SBU1_R
27
TUSB546A_SBU2_R
26
CPU_DP2_AUXP_C
24
CPU_DP2_AUXN_C
25
TBTA_TX1N <31> TBTA_TX1P <31>
TBTA_TX2P <31> TBTA_TX2N <31>
2
MUX1_FLIP_SEL <29> MUX1_USB_SEL <29> MUX1_DP_SEL <29>
12 12
CT111 0.1U_0402_25V6 CT112 0.1U_0402_25V6
1 2 1 2
RT132 0_0402_5%@ RT133 0_0402_5%@
@
CT115 0.1U_0402_25V6
@
CT116 0.1U_0402_25V6
12 12
USB3_PRX_DTX_P5 <20>
USB3_PRX_DTX_N5 <20>
TBTA_SBU1 <29,31> TBTA_SBU2 <29,31>
CPU_DP2_AUXP <9,29>
CPU_DP2_AUXN <9,29>
1
+3.3V_RUN
1K_0402_5%
@
RT145
MUX1_I2C_EN
I2C Programming or Pin Strap Programming Select,Internally 30k pull-up and 60k pull-down I2C_EN = 0: Tie 1k to GND,Pin Strap(I2C disable) R:Tie 20k to GND,TI Test Mode(I2C enabled) F: Float,TI Test Mode(I2C enabled) 1:Tie 1k to VCC,I2C enabled
CPU_DP2_AUXN_C
CPU_DP2_AUXP_C
1 2
12
1 2
1 2
1K_0402_5%
RT300
RT131100K_0402_5%
RT130100K_0402_5%
20K_0402_5%
@
12
RT301
+3.3V_RUN
Ser the USB receiver equalizer gain for upstream facing
B B
A A
SSTXP/N,Internally 30k pull-up and 60k pull-down SSEQ = 0: Tie 1k to GND R:Tie 20k to GND F: Float 1:Tie 1k to VCC
MUX1_SSEQ1
5
+3.3V_RUN
1K_0402_5%
1 2
1K_0402_5%
12
@
RT135
20K_0402_5%
@
12
RT136
RT305
Select the DisplayPort receiver equalizer gain ,Internally 30k pull-up and 60k pull-down DPEQ = 0: Tie 1k to GND R:Tie 20k to GND F: Float 1:Tie 1k to VCC
1K_0402_5%
@
RT139
1 2
20K_0402_5%
1K_0402_5%
@
12
12
RT306
RT140
4
Ser the USB receiver equalizer gain for downstream facing RX1 and RX2 when USB utilized,Internally 30k pull-up and 60k pull-down USB_EQ = 0: Tie 1k to GND R:Tie 20k to GND F: Float 1:Tie 1k to VCC
+3.3V_RUN+3.3V_RUN
1K_0402_5%
@
RT141
MUX1_USB_EQ1MUX1_DPEQ0
1 2
20K_0402_5%
1K_0402_5%
@
12
12
RT142
RT307
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2017/01/01
2017/01/01
2017/01/01
2
Title
DP/USB3 Repeater SW2 TUSB546
DP/USB3 Repeater SW2 TUSB546
DP/USB3 Repeater SW2 TUSB546
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
28 61
28 61
28 61
of
of
of
0.2
0.2
0.2
5
4
3
2
1
+3.3V_TBTA_FLASH +3.3V_TBTA_FLASH
12
12
CT70
RT50
3.3K_0402_5% .1U_0402_16V7K
TBTA_R OM_HO LD#_P D TBTA_R OM_CL K_PD _R UPD1_SMBDAT_Q
D D
C C
B B
TBTA_R OM_DI_ PD_R
TBTA_R OM_CL K_PD _R TBTA_R OM_DI_ PD_R TBTA_R OM_DO _PD_R TBTA_R OM_CS #_PD _R
7
GND
8
GND
JXT_FP241AH-006GAAM
CONN@
cD6)Z)'LW4'G5'L=
cD67/;hcD67/AB
0.080.00
0.10
0.18
0.280.20
0.380.30
0.40
0.48
0.580.50
0.680.60
0.70 1.00
8 7 6 5
+3.3V_TBTA_FLASH
JDB1
1
1
TBTA_R OM_CL K_PD _R
2
2
TBTA_R OM_DI_ PD_R
3
3
TBTA_R OM_DO _PD_R
4
4
TBTA_R OM_CS #_PD _R
5
5
6
6
Configuration
0
1
2
3
4
5
76Infini te bo ot ret ry from Fla sh to Host I/F cy cles .
UT6
TBTA_R OM_CS #_PD _R
1
CS#
VCC HOLD#(IO3) CLK DI(IO0)
W25Q80DVSSIG_SO8
UFP only 5V @0.9A Sink capability with "Ask for Max/" for anything from 0.9 -3.0A TBT Al ternat e Mo des n ot su pport ed DisplayPort Alternate Modes not supported TI VID s uppo rted
UFP only 5V @0.9A Sink capability with "Ask for Max/" for anything from 0.9 -3.0A TBT Al ternat e Mo des n ot su pport ed DisplayPort Alternate Modes -Sink, C and D pin configuration TI VID s uppo rted
UFP only 5V @3.0A Source capability TBT Al ternat e Mo des n ot su pport ed DisplayPort Alternate Modes not supported TI VID s uppo rted
UFP only 5V @3.0A Source capability TBT Al ternat e Mo des n ot su pport ed DisplayPort Alternate Modes -Sink, C and D pin configuration TI VID s uppo rted
DRP 5V @0.9-3.0A Sink capability 5V @3.0A Source capability TBT Al ternat e Mo des n ot su pport ed DisplayPort Alternate Modes not supported TI VID s uppo rted Accepts data and power role swaps, but does not initiate.
DRP 5V @0.9-3.0A Sink capability 5V @3.0A Source capability TBT Al ternat e Mo des n ot su pport ed DisplayPort Alternate Modes - Source, C, D, and E pin configurations. TI VID s uppo rted Accepts power role swaps but will not initiate. Accepts data role swap to UFP and can initiate.
DRP 5V @0.9-3.0A Sink capability 5V @3.0A Source capability TBT Al ternat e Mo des n ot su pport ed DisplayPort Alternate Modes - Source, C, D, and E pin configurations. TI VID s uppo rted Accepts power role swaps but will not initiate. Accepts data role swap to DFP and can initiate.
DO(IO1)
WP#(IO2)
12 12 12 12
DescriptionFactory Device
GND
TBTA_R OM_DO _PD_R
2
TBTA_R OM_W P#_ PD
3 4
TBTA_R OM_CL K_PD
RT540_0402_5%
TBTA_R OM_DI_ PD
RT550_0402_5%
TBTA_R OM_DO _PD
RT560_0402_5%
TBTA_R OM_CS #_PD
RT570_0402_5%
RT51
3.3K_0402_5%
12
12
12
RT52
RT53
3.3K_0402_5%
3.3K_0402_5%
UPD1_SMBCLK<37>
UPD1_SMBDAT<37>
UPD1_ALERT#<37>
+3.3V_TBTA_FLASH
RT76
10K_0402_1%
1 2
PD1_GPIO8
12
RT377
43K_0402_1%
RT81 100K_0402_5% RT82 1M_0402_5%@
12 12
TI SPE C: 10 0K P D INTEL SC H :1M PD
MUX1_DP_SEL/MUX1_USB_SEL control by: GPIO: Pop RT69,RT90;Depop RT375,RT376 I2C:De pop R T69,RT9 0;pop RT375 ,RT376
'0,.*)AB)<;--).P30,CP)/;BB*3)-0)9fg):;B)R*)-B00<*@)R_)ONe
+3.3V_TBTA_FLASH
12
RT95 100K_0402_5%
12
RT96 100K_0402_5%
UART_MOSI UART_MISO
MUX1_FLIP_SEL MUX1_USB_SEL
TBTA_A UXN_ C
TBTA_A UXP_ C
+3.3V_VDD_PIC
126
QT1A
@
DMN66D0LDW-7_SOT363-6
1 2
RT58 0_0402_5%
DMN66D0LDW-7_SOT363-6
1 2
RT60 0_0402_5%
TI is 3x1uf
RT375 0_0402_5%@ RT376 0_0402_5%@
UPD1_SMBCLK_Q
5
34
QT1B
@
1 2
RT59 0_0402_5%
UPD1_SMBUS_ALERT#
1
1
CT71
CT72
2
2
2.2U_0402_16V6K
MUX1_FLIP_SEL<28> EN_PD_HV_1<59>
AC1_DISC#<57,59>
PCH_DP2_HPD<21,28> USB2_ID<17>
MUX1_DP_SEL<28> MUX1_USB_SEL<28>
1 2 1 2
+VCC1V8D_TBTA_LDO
RT97 0_0402_5%@
1
CT73
2
2.2U_0402_16V6K
+3.3V_TBTA_FLASH
+3.3V_ALW
MUX1_FLIP_SEL
MUX1_USB_SEL
UPD1_SMBCLK_Q UPD1_SMBDAT_Q
CPU_DP2_AUXP<9,28> CPU_DP2_AUXN<9,28>
1 2
+TBTA_LDO_BMC +VCC1V8D_TBTA_LDO +VCC1V8A_TBTA_LDO
2.2U_0402_16V6K
+3.3V_TBTA_FLASH
RT66 3.3K_0402_5%@ RT67 3.3K_0402_5%@ RT68 10K_0402_5%@
RT69 0_0402_5% RT70 0_0402_5% RT71 1M_0402_5% RT72 0_0402_5% RT73 0_0402_5% RT74 0_0402_5%@ RT75 0_0402_5%@ RT339 0_0402_5%@
UART_MOSI UART_MISO
T219@ PAD~D T220@ PAD~D
RT86 1M_0402_5%
RT87 0_0402_5%@ RT88 0_0402_5%@
RT89 0_0402_5% RT90 0_0402_5%
RT92 0_0402_5% RT93 0_0402_5%
CT80 0.1U_0201_10V6K CT81 0.1U_0201_10V6K
+3.3V_TBTA_FLASH
PJP7
1 2
PAD-OPEN1x1m
RT378 10K_0402_5% RT379 10K_0402_5%
12 12 12
12 12 12 12 12 12 12 12
USB20_P4<17> USB20_N4<17>
RT83 0_0402_5%
RT84 0_0402_5%@ RT85 0_0402_5%@
12
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
@
RT98
0_0402_5%
1 2
12
RT99
0_0402_5%
+5V_ALW
1
CT74
2
1U_0402_16V6K
12 12
UPD1_SMBDAT_Q UPD1_SMBCLK_Q UPD1_SMBUS_ALERT#
MUX1_FLIP_SEL_R EN_PD_HV_1_R PD1_GPIO2 AC1_DISC#_R PCH_DP2_HPD_R OTG_ID PD1_GPIO6 PD1_GPIO7 PD1_GPIO8
TBTA_R OM_CL K_PD TBTA_R OM_DI_ PD TBTA_R OM_DO _PD TBTA_R OM_CS #_PD
12
12 12
TBTA_M RESE T
TBTA_L STX_R TBTA_L SRX_ R
TBTA_D EBUG3 TBTA_D EBUG4
TBTA_D EBUG1
TBTA_D EBUG2
TBTA_A UXP_ C TBTA_A UXN_ C
TBTA_R OSC
12
RT100
PJP8
1 2
PAD-OPEN 1x3m
1 2
RT63 0_0402_5%
15K_0402_0.1%
TI is 1x47uf+1x0.1uf
1
CT75
2
22U_0805_25V6M
+3.3V_VDD_PIC_PDA+3.3V_VDD_PIC
UT5
F1
I2C_ADDR
D1
I2C_SDA1
D2
I2C_SCL1
C1
I2C_IRQ1_N
A5
I2C_SDA2
B5
I2C_SCL2
B6
I2C_IRQ2_N
B2
GPIO0
C2
GPIO1
D10
GPIO2
G11
GPIO3
C10
GPIO4
E10
GPIO5
G10
GPIO6
D7
GPIO7
H6
GPIO8
A3
SPI_CLK
B4
SPI_MOSI
A4
SPI_MISO
B3
SPI_SS_N
L5
USB_RP_P
K5
USB_RP_N
E2
UART_TX
F2
UART_RX
F4
SWD_DATA
G4
SWD_CLK
E11
MRESET
L4
TBT_LSTX/R2P
K4
TBT_LSRX/P2R
L3
DIG_AUD_P/DEBUG3
K3
DIG_AUD_N/DEBUG4
L2
DEBUG1
K2
DEBUG2
J1
AUX_P
J2
AUX_N
F10
BUSPOWER_N
G2
R_OSC
(03)d0B%9'):0B>AC
1
1
1
CT78
CT76
CT77
2
2
2
22U_0805_25V6M
22U_0805_25V6M
22U_0805_25V6M
+5V_ALW_PDA
H1
B1
K1
VDDIO
VIN_3V3
LDO_1V8A
GND
HRESET
A1
D6
12
A2
GNDE5GND
E6
RT101
E1
LDO_1V8D
GND
F5
E7
100K_0402_5%
LDO_BMC
GND
GND
G5
H10
PP_CABLE
GND
GND
GNDH4GND
B8
D8
H5
0.22U_0402_16V7K
A11
B11
C11
D11
PP_5V0
PP_5V0
PP_5V0
PP_5V0
GND
GNDF6GNDF7GND
F8
E8
G6
CT87
+TBTA_Vbus_1
1 2
RT64 0_0402_5%@
1 2
RT65 0_0402_5%@
HV_GATE1_A
HV_GATE2_A
B7
A10
B10
A9
GNDA6GNDA7GNDA8GND
SENSEP
SENSEN
VOUT_3V3
C_USB_TP
C_USB_TN
C_USB_BP C_USB_BN
DEBUG_CTL1 DEBUG_CTL2
RESET_N
GND
GND
GNDG7GND
SSH7GNDL1GND
TPS65 982_B GA96
H8
G8
L11
12
1
RT103
2
0_0402_5%
@
+TBTA_Vbus_1
HV_GATE1B9HV_GATE2
VBUS VBUS VBUS VBUS
TI has 1x1uf
1U_0603_25V6K
H11
12
J10 J11 K11
H2
G1
LDO_3V3
K6 L6
K7 L7
TI has 2x220pf
L9
C_CC1
L10
C_CC2
WHEN CONNECT BUSPOWERZ TO GND, CONNECT ALSO RPD_Gn to C_CCn
K9
RPD_G1 RPD_G2
C_SBU1 C_SBU2
RT104 0_0402_5%
K10
RT105 0_0402_5%
TBTA_D BG_CTL 1
E4
TBTA_D BG_CTL 2
D5
TBTA_S BU1_ R
K8
TBTA_S BU2_ R
L8
TBTA_R ESET_ N_EC_ R
F11
+3.3V_PDA_VOUT
CT82
1
CT83
2
1 2 1 2
+3.3V_TBTA_FLASH
1
CT84
2
1U_0402_16V6K
10U_0603_6.3V6M
TBTA_TO P_P <31> TBTA_TO P_N <31 >
TBTA_B OT_P <31> TBTA_B OT_N <31 >
1 2
RT106 10K_0402_5%
1 2
RT107 10K_0402_5%
1 2
RT108 0_0402_5%
1 2
RT109 0_0402_5%
RT110 0_0402_5%@
TBTA_C C1 <31>
+3.3V_TBTA_FLASH
12
TBTA_C C2 <31>
1
2
TBTA_S BU1 <28, 31> TBTA_S BU2 <28, 31>
1
CT85
CT86
2
220P_0402_50V8J
220P_0402_50V8J
A A
d**@)EABb)!#8eOKILc
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
[Type C]PD Controller TI
[Type C]PD Controller TI
[Type C]PD Controller TI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
29 61
29 61
29 61
of
of
of
0.2
0.2
0.2
5
+5V_ALW
DT1
+5V_TBT_VBUS
D D
C C
1N4148WS-7-F_SOD323-2
1N4148WS-7-F_SOD323-2
DT3
1 2
1N4148WS-7-F_SOD323-2
1U_0402_10V6K
1
CT93
2
12
DT2
12
+5V_TBTA_VBUS_D
+5V_PD_VDD
0.1U_0201_10V6K
1
2
UT8
1
VCC
3
VOUT
2
GND
AP2204R-5.0T RG1_S OT89-3
@
1U_0402_10V6K
1
CT89
CT88
2
1 2
RT111 100K_0402_5%
+TBTA_Vbus_1
1U_0603_50V6K
1
CT94
2
4
UT7
VCC1VOUT
2
GND EN3ADJ/NC
AP2112K-3.3T RG1_SOT23-5
1
CT90 1U_0402_10V6K
2
3
+3.3V_VDD_PIC
5
4
2.2U_0603_25V6K
0.1U_0402_25V6K
1
12
@
CT91
CT92
2
2
1
place near UT7
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
[Type C]PD Power
[Type C]PD Power
[Type C]PD Power
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
30 61
30 61
30 61
of
of
of
0.2
0.2
0.2
5
4
3
2
1
(03)dXd)9')&0B>AC
D D
+TBTA_VBUS+TBTA_VBUS +TBTA_VBUS
JUSBC1
A1
GND_A1
A2
TX1+
A3
TX1-
A4
VBUS_A4
A5
CC1
A6
D+_A6
A7
D-_A7
A8
SBU1
A9
VBUS_A9
A10
RX2-
A11
RX2+
A12
GND_A12
1
GND1
2
GND2
3
GND3
JAE_DX07BD24JJ2
CONN@
TOP
12
CT1010.47U_0201_25V
TBTA_TX 1P_C TBTA_TX 1N_C
TBTA_C C1 TBTA_TO P_P_R
TBTA_TO P_N_R TBTA_S BU1
TBTA_R X2N TBTA_R X2P
TBTA_TX 1P<28> TBTA_TX 1N<28>
TBTA_TO P_P<29> TBTA_TO P_N<29>
C C
1 2 1 2
CT95 0.22U_0201_6.3V6K CT96 0.22U_0201_6.3V6K
12
CT99 0.47U_0201_25V
TBTA_C C1<29>
1 2
RT120 0_0402_5%EMI@
1 2
RT121 0_0402_5%EMI@
TBTA_S BU1<28,29>
TBTA_R X2N<28> TBTA_R X2P<28>
GND_B12
Bottom
RX1+ RX1-
VBUS_B9
SBU2
D-_B7
D+_B6
VBUS_B4
TX2+
GND_B1
GND4 GND5 GND6
B12
TBTA_R X1P
B11
TBTA_R X1N
B10 B9
TBTA_S BU2
B8
TBTA_B OT_N_R
B7
TBTA_B OT_P_R
B6
TBTA_C C2
B5
CC2
B4
TBTA_TX 2N_C
B3
TX2-
TBTA_TX 2P_C
B2 B1
4 5 6
TBTA_R X1P <28> TBTA_R X1N <28>
1 2
CT100 0.47U_0201_25V
TBTA_S BU2 <28, 29>
1 2
RT122 0_0402_5%EMI@
1 2
RT123 0_0402_5%EMI@
TBTA_C C2 <29>
1 2
CT102 0.47U_0201_25V
TBTA_B OT_N <29 > TBTA_B OT_P <29>
12
TBTA_TX 2N <28>
12
CT980.22U_0201_6.3V6K
TBTA_TX 2P < 28>
CT970.22U_0201_6.3V6K
'()'*+,*-.
+TBTA_VBUS
12P_0402_50V8J
RF@
1
CT189
2
2
3
DT4
ESD@
L30ESD24VC3-2_SOT23-3
82P_0402_50V8J
RF@
1
CT190
2
1
DT13
DT5
TBTA_TX 1P_C
TBTA_TX 1N_C
B B
A A
5
TBTA_C C1
TBTA_S BU1
TBTA_R X2N
TBTA_R X2P
TBTA_TO P_P_R
TBTA_TO P_N_R
ESD@
1 2
ESD8011MUT5G_X3DFN2-2
DT6
ESD@
1 2
ESD8011MUT5G_X3DFN2-2
DT7
ESD@
1 2
ESD8011MUT5G_X3DFN2-2
DT8
ESD@
1 2
ESD8011MUT5G_X3DFN2-2
DT9
ESD@
1 2
ESD8011MUT5G_X3DFN2-2
DT10
ESD@
1 2
ESD8011MUT5G_X3DFN2-2
DT11
ESD@
1 2
ESD8011MUT5G_X3DFN2-2
DT12
ESD@
1 2
ESD8011MUT5G_X3DFN2-2
TBTA_R X1P
TBTA_R X1N
TBTA_S BU2
TBTA_C C2
TBTA_TX 2P_C
TBTA_TX 2N_C
TBTA_B OT_P_R
TBTA_B OT_N_R
4
ESD@
1 2
ESD8011MUT5G_X3DFN2-2
DT14
ESD@
1 2
ESD8011MUT5G_X3DFN2-2
DT15
ESD@
1 2
ESD8011MUT5G_X3DFN2-2
DT16
ESD@
1 2
ESD8011MUT5G_X3DFN2-2
DT17
ESD@
1 2
ESD8011MUT5G_X3DFN2-2
DT18
ESD@
1 2
ESD8011MUT5G_X3DFN2-2
DT19
ESD@
1 2
ESD8011MUT5G_X3DFN2-2
DT20
ESD@
1 2
ESD8011MUT5G_X3DFN2-2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
USB 3.0 CONN TYPE C
USB 3.0 CONN TYPE C
USB 3.0 CONN TYPE C
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
of
of
of
31 61
31 61
31 61
0.2
0.2
0.2
5
4
3
2
1
TOUCH_ PANEL_ INTR#:
JEDP1
D D
41
G1
42
G2
43
G3
44
G4
45
G5
ACES_50398-04041-001
CONN@
+BL_PWR_SRC
0.1U_0603_50V7K
12
@
Close to JEDP1.17~19
BIA_PWM
4.7K_0402_5%
12
RV1
CV11
C C
+5V_TSP
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
Close to JEDP1.30~31 Close to JEDP1.11 Close to JEDP1.1 Close to JEDP1.10
DV1
1
BAT54CW_SOT323-3
USB20_N11_R USB20_P11_R
+BL_PWR_SRC
1 2
LV1
EMI@
DISP_ON
+LCDVDD
TOUCH_ SCRE EN_DE T#
EDP_AUXN_C EDP_AUXP_C EDP_TXP0_C EDP_TXN0_C EDP_TXP1_C EDP_TXN1_C
+LCDVDD
0.1U_0201_10V6K
1
@
CV12
2
BIA_PWM_PCH
3
BIA_PWM_EC
2
+3.3V_RUN +3.3V_CAM
CAM_MIC_CBL_DET# <1 6>
Pin15: LOOP_BACK
EDP_HPD <21>
LCD_TST < 37>
LCD_CBL_DET# <21>
TOUCH_ SCREE N_PD # < 19>
BIA_PWM
BLM15PX221SN1D_2P
TOUCH_ SCREE N_DE T# <19>
12
CV1 0.1U_0402_25V6
12
CV2 0.1U_0402_25V6
12
CV3 0.1U_0402_25V6
12
CV4 0.1U_0402_25V6
12
CV5 0.1U_0402_25V6
12
CV6 0.1U_0402_25V6
+3.3V_CAM +5V_TSP
0.1U_0201_10V6K
@
1
CZ1
2
BIA_PWM_PCH <16>
BIA_PWM_EC <37>
100P_0402_50V8J
12
12
CA5@EMI@
$8c)'*+,*-.
EDP_HPD
RV7 100K_0402_5%@
EDP_AUXN <9>
EDP_AUXP <9> EDP_TXP0 <9> EDP_TXN0 <9> EDP_TXP1 <9> EDP_TXN1 <9>
0.1U_0201_10V6K
@
1
CZ2
2
100P_0402_50V8J
CA6@EMI@
1 2
DISP_ON
4.7K_0402_5%
12
RV2
+3.3V_RUN
0.1U_0201_10V6K
@
1
CA7
2
BAT54CW_SOT323-3
1
Close lid >> TP_EN = 0 >> Di sable touch events Open lid > > TP_EN = 1 >> Enable touch events
DMIC0 <36> DMIC_CLK0 <36>
+LCDVDD
Reserve for EA
DV2
3
2
'()'*+,*-.
+LCDVDD +3.3V_CAM +BL_PWR_SRC
12P_0402_50V8J
RF@
82P_0402_50V8J
RF@
12P_0402_50V8J
12P_0402_50V8J
RF@
82P_0402_50V8J
RF@
1
1
1
CV22
CV20
CV21
2
2
B B
2
RF@
82P_0402_50V8J
1
CV23
2
RF@
1
1
CV24
CV25
2
2
USB20_N9_R USB20_P9_R
AZC199-02SPR7G_SOT23-3
@ESD@
3
223
1
DV4
1
ESD depop location
TOUCH_ SCRE EN_DE T#
If touch panel, GPIO Low-> Touch Mic. EQ ; others the GPIO is High -> Non-Touch Mic. EQ
PANEL_BKEN_PCH <16>
PANEL_BKEN_EC <37>
+3.3V_RUN
1 2
EXC24CQ900U_4P
1 2
LV27
10K_0402_5%
RV8
EMI@
34
'()'*+,*-.
+5V_TSP
12P_0402_50V8J
RF@
1
CV18
2
USB20_N9 <17>
USB20_P9 <17>
82P_0402_50V8J
RF@
1
CV19
2
CONN@
ACES_50208-0060N-P01
For Touchscreen
(03)\3*:b*B3A@C*)GN
JIR1
1
IR_CAM_ DET# <20>
1
2
2
3
3
4
4
5
5
6
6 GND GND
+PWR_SRC
7 8
3.3V_TS_EN<21>
2
G
+PWR_SRC
'()'*+,*-.
47K_0402_5%
RV6
1 2
L2N7002WT1G_SC-70-3
13
D
S
100P_0402_50V8J
RF@
1
CZ3
2
+5V_RUN+5V_RUN +5V_TSP
QV8
LP2301ALT1G_SOT23-3
123
D
S
G
QV7
LCDVDD POWER
WebCAM
+3.3V_CAM +3.3V_RUN
3.3V_CAM_EN#<17>
A A
USB20_P11<17>
USB20_N11<17>
5
EXC24CQ900U_4P
1 2
LZ1
EMI@
QZ1
LP2301ALT1G_SOT23-3
123
D
S
G
USB20_P11_R
34
USB20_N11_R
4
Backlight POWER
+PWR_SRC
1000P_0402_50V7K
270K_0402_5%
CV13
RV4
1 2
1 2
BL_PWR_SRC_ON
0.01U_0402_50V7K
1
2
CV14
1 2
RV5 47K_0402_5%
EN_INVPWR<37>
S
4 5
QV1
D
6 2
1
G
AO6405_TSOP6
3
QV2
L2N7002WT1G_SC-70-3
123
D
G
+BL_PWR_SRC_P
12
S
0.1U_0603_50V7K
CV15
+BL_PWR_SRC
PJP13
1 2
PAD-OPEN1x2m
RZ90
@
1 2
0.01_1206_1%
&0%?;_[ 8P03.)#i#GMjc*<0<)'kKQ
3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
CV16@
12
10U_0603_10V6M
&0%?;_[ 8P03.)#i#GLjc*<0<)'kKM
LCD_VCC_TEST_EN<37>
2016/01/01
2016/01/01
2016/01/01
1 2
PAD-OPEN1x1m
ENVDD_PCH<16,37>
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
PJP12
@
RZ93
1 2
0.01_1206_1%
Deciphered Date
Deciphered Date
Deciphered Date
+EDP_VDD+LCDVDD
DV3
2
3
BAT54CW_SOT323-3
1
2017/01/01
2017/01/01
2017/01/01
1
VOUT
2
GND
3
/OC
G524B1T11U_SOT23-5
EN_LCDPWR
+3.3V_ALW
UV24
5
VIN
4
EN
0.01UF_0402_25V7K
@
CV17
12
100K_0402_5%
RV3
1 2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
eDP CONN & Touch screen
eDP CONN & Touch screen
eDP CONN & Touch screen
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
32 61
32 61
32 61
0.2
0.2
0.2
of
of
of
5
4
3
2
1
VCT_LAN_R1
RJ45_MDIN3 RJ45_MDIP3
RJ45_MDIN1 RJ45_MDIP1
RJ45_MDIN2 RJ45_MDIP2
RJ45_MDIN0 RJ45_MDIP0
Layout Notice : Place bead as close UL4 as possible
RL71 2.2_0603_5% RL72 2.2_0603_5%
RL73 2.2_0603_5% RL74 2.2_0603_5%
RL75 2.2_0603_5% RL76 2.2_0603_5%
RL77 2.2_0603_5% RL78 2.2_0603_5%
1 2
+3.3V_LAN_OUT
+0.9V_LAN
1 2
Idc_m in=500 mA DCR=100mohm
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
RL30_0402_5%
1 2
22U_0805_6.3V6M
0.1U_0201_10V6K
1
12
CL28
CL7
2
+0.9V_LAN
LL14.7UH_BRC2012T4R7MD_20%
0.1U_0201_10V6K CL3
1
12
2
Z2805
Z2807
Z2806
Z2808
+GND_CHASSIS
use 40mil trace if necessary
RL64.7K_0402_5%
+3.3V_LAN
1 2
RL80_0603_5%
Place CL28 close to UL1.5
10U_0603_10V6M
@
CL4
12
12
12
12
RL17 75_040 2_1%
RL15 75_040 2_1%
RL18 75_040 2_1%
RL16 75_040 2_1%
LAN_MDIP0_L
LAN_MDIN0_L LAN_MDIP1_L
LAN_MDIN1_L LAN_MDIP2_L
LAN_MDIN2_L LAN_MDIP3_L
LAN_MDIN3_L
+3.3V_LAN
'()'*+,*-.
+3.3V_LAN_OUT
@RF@
12P_0402_50V8J
1
CL29
2
LAN_ACTLED_YEL#
RJ45_MDIN3 RJ45_MDIP3 RJ45_MDIN1 RJ45_MDIN2 RJ45_MDIP2 RJ45_MDIP1 RJ45_MDIN0 RJ45_MDIP0
LED_10_GRN# LED_100_ORG#
@RF@
82P_0402_50V8J
1
CL30
2
12
LAN_ACTLED_YEL_R#
1 2
RL14 150_0402_5%
1 2
RL19 150_0402_5%
1 2
RL20 150_0402_5%
LED_10_GRN_R# LED_100_ORG_R#
+3.3V_LAN
470P_0402_50V7K
0.1U_0201_10V6K
1
CL18
CL19
2
RJ45 LOM circuit
+3.3V_LAN:20mils
JLOM1
CONN@
10
Yellow LED-
9
Yellow LED+
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
11
Green LED-
13
Orange LED-
12
Green-Orange LED+
SANTA_130456-831
GND_2 GND_1
15 14
+3.3V_LAN
RL1@ 10K_0402_5% RL2@ 10K_0402_5% RL4 4.7K_0402_5%@
D D
PM_LANPHY_ENABLE<20>
+0.9V_LAN
22U_0603_6.3V6M
1
12
CL12
2
Note: +1.0V_LAN will work at 0.95V to 1.15V
C C
B B
+3.3V_LAN
12
+3.3V_LAN
12
For WLAN c an't recognize duri ng enable
A A
Unobtrusive mode(BITS152312)
TP_LA N_JTA G_TMS
12
TP_LA N_JTA G_TCK
12
CLKREQ_PCIE#4
12
1 2
RL7 0_0402_5%
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
CL9
1
2
LOM_SPD100LED_ORG# LOM_SPD10LED_GRN#
LOM_ACTLED_YEL#
RL29 1M_0402_5%
LOM_SPD100LED_ORG#
RL30 1M_0402_5%
LOM_SPD10LED_GRN#
0.1U_0201_10V6K
CL10
CL11
CL8
1
1
2
2
When LAN & WLAN are exist at the same time, WLAN will disable
+3.3V_LAN
5
1
P
B
2
A
G
3
QL1A
DMN65D8LDW-7_SOT363-6
126
SYS_LED_MASK#
QL1B
DMN65D8LDW-7_SOT363-6
34
5
SYS_LED_MASK#
QL2A
DMN65D8LDW-7_SOT363-6
126
SYS_LED_MASK#
QL2B
DMN65D8LDW-7_SOT363-6
34
5
+3.3V_LAN
1 2
12
XTALO_R
27P_0402_50V8J
12
CL13
CL15
@
1 2
0.1U_0201_10V6K
4
O
UL2
TC7SH 08FU_ SSOP5 ~D
LAN_ACTLED_YEL#
SYS_LED_MASK# <37,45>
LED_100_ORG#
LED_10_GRN#
CLKREQ_PCIE#4<18>
PCIE_PRX_DTX_P4<17>
PCIE_PRX_DTX_N4<17>
PCIE_PTX_DRX_P4<17> PCIE_PTX_DRX_N4<17>
10K_0402_5%
RL5 @
SMBus Device Address 0xC8
10K_0402_5%
RL9@
1 2
RL34 0_0402_5%
YL1
3
IN
OUT
4
GND
GND
25MHZ_18PF_7V25000034
LOM_CABLE_DETECT# <37>
PLTRST_LAN#<19>
CLK_PCIE_P4<18> CLK_PCIE_N4<18>
SML0_SMBCLK<20>
SML0_SMBDATA<20>
LAN_WAKE#<20,37>
T88@ PAD~D T89@ PAD~D
12
1 2
12
CLKREQ_PCIE#4
PCIE_PRX_C_DTX_P4
1 2
CL1 0.1U_0402_25V6
PCIE_PRX_C_DTX_N4
1 2
CL2 0.1U_0402_25V6
PCIE_PTX_C_DRX_P4
1 2
CL5 0.1U_0402_25V6
PCIE_PTX_C_DRX_N4
1 2
CL6 0.1U_0402_25V6
RL11 1M_0402_5%
27P_0402_50V8J
0.1U_0201_10V6K
12
CL14
0.1U_0201_10V6K
12
12
CL16
CL17
LAN_DISABLE#_R
LOM_ACTLED_YEL# LOM_SPD100LED_ORG# LOM_SPD10LED_GRN#
TP_LA N_JTA G_TDI TP_LA N_JTA G_TDO TP_LA N_JTA G_TMS TP_LA N_JTA G_TCK
LAN_TEST_EN
3.01K_0402_1%
1K_0402_5%
12
RL13
RL12
0.1U_0201_10V6K
0.1U_0201_10V6K
12
CL20
UL1
48
CLK_REQ_N
36
PE_RST_N
44
PE_CLKP
45
PE_CLKN
38
PETp
39
PETn
41
PERp
42
PERn
28
SMB_CLK
31
SMB_DATA
2
LANWAKE_N
3
LAN_DISABLE_N
26
LED0
27
LED1
25
LED2
32
JTAG_TDI
34
JTAG_TDO
33
JTAG_TMS
35
JTAG_TCK
9
XTALO
XTAL_OUT
10
XTALI
XTAL_IN
30
TEST_EN
RES_BIAS
12
RBIAS
WGI219LM-QREF- A0_QFN48_6X6~D
change to SA000081G1L, S IC WGI219LM QREF A0 QFN 48P PHY
LAN_MDIN3_L LAN_MDIP3_L
LAN_MDIN1_L LAN_MDIP1_L
LAN_MDIN2_L LAN_MDIP2_L
LAN_MDIN0_L LAN_MDIP0_L
12
CL21
PCIE
RSVD_VCC3P3_1
SMBUS
JTAG LED
1 2 3 4 5 6 7 8
9 10 11
GND
GND CHASSIS
CHASSIS
MDI
TL1
13
MDI_PLUS0
14
MDI_MINUS0
17
MDI_PLUS1
18
MDI_MINUS1
20
MDI_PLUS2
21
MDI_MINUS2
23
MDI_PLUS3
24
MDI_MINUS3
6
SVR_EN_N
1 5
VDD3P3_IN
4
VDD3P3_4
15
VDD3P3_15
19
VDD3P3_19
29
VDD3P3_29
47
VDD0P9_47
46
VDD0P9_46
37
VDD0P9_37
43
VDD0P9_43
11
VDD0P9_11
40
VDD0P9_40
22
VDD0P9_22
16
VDD0P9_16
8
VDD0P9_8
7
CTRL0P9
49
VSS_EPAD
Place CL3, CL4 and LL1 close to UL1
TCT1
MCT1
TD1+
MX1+
TD1-
MX1-
TCT2
MCT2
TD2
MX2+
TD2-
MX2-
TCT3
MCT3
TD3+
MX3+
TD3-
MX3-
TCT4
MCT4
TD4+
MX4+
TD4-12MX4-
350UH_IH-160
1 2
CL22 10P_1808_3KV8JEMI@
LAN_MDIP0 LAN_MDIN0
LAN_MDIP1 LAN_MDIN1
LAN_MDIP2 LAN_MDIN2
LAN_MDIP3 LAN_MDIN3
+RSVD_VCC3P3_1
+REGCTL_PNP10
24 23 22 21 20 19 18 17 16 15 14 13
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
LAN Clarkvillie & RJ45
LAN Clarkvillie & RJ45
LAN Clarkvillie & RJ45
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
of
of
of
33 61
33 61
33 61
0.2
0.2
0.2
5
4
3
2
1
(03)#&D$)DB.*3>;:*
D D
+3.3V_MMI_AUX +3.3V_MMI_IN
C C
B B
1
2
'()'*+,*-.
@RF@
@RF@
12P_0402_50V8J
82P_0402_50V8J
1
CR27
CR28
2
+3.3V_RUN +3.3V_MMI_IN
+3.3V_MMI_IN
+3.3V_MMI_AUX
@RF@
@RF@
12P_0402_50V8J
82P_0402_50V8J
1
1
CR25
CR26
2
2
PJP14
1 2
PAD-OPEN1x2m
+3.3V_MMI_AUX
1 2
R2740_0603_5% @
MEDIACARD_IRQ#
12
RR19 10K_0402_5%
support D3 Hot(if D3 cold PIN11,PIN27 need Add MOS on/off 3V3AUX)
7/18 Vender suggest.
PCH_PLTRST#_AND<19,35,39,40>
CLKREQ_PCIE#5<18>
CLK_PCIE_P5<18> CLK_PCIE_N5<18>
1 2
PCIE_PTX_DRX_P3<17> PCIE_PTX_DRX_N3<17> PCIE_PRX_DTX_P3<17> PCIE_PRX_DTX_N3<17>
CR11 0.1U_0402_25V6 CR12 0.1U_0402_25V6 CR13 0.1U_0402_25V6 CR14 0.1U_0402_25V6
+1.2V_LDO
CR9 CR10 close to UR2.14
4.7U_0603_6.3V6K CR5
1
12
2
HOST_SD_WP#
1 2 1 2 1 2
0.1U_0201_10V6K
MEDIACARD_IRQ#<21>
0.1U_0201_10V6K
+1.8V_RUN_CARD
1
CR7
CR6
2
High
High
Low
High
Low
Low
PCIE_PTX_C_DRX_P3 PCIE_PTX_C_DRX_N3 PCIE_PRX_C_DTX_P3 PCIE_PRX_C_DTX_N3
SD/MMCCD#
SDWPSDWP_Q
High
Write Protect(SD LOCK)
Low
Write Enable
High
Write Protect(SD& FW LOCK)
High
Write Protect(FW LOCK)
12
STATUS
+RREF
RR4
1
2
32 31 30
10 14
13
6.2K_0402_1%
+3.3V_MMI_AUX
4.7U_0402_6.3V6M
1
CR1
2
UR1
1
PERST#
2
CLK_REQ#
5
REFCLKP
6
REFCLKN
3
HSIP
4
HSIN
7
HSOP
8
HSON
WAKE# MS_INS# SD_CD#
AV12 DV12S
SD_VDD2
9
RREF
0.1U_0201_10V6K
CR2
1
2
27
11
CARD_3V3
3V3_IN
3V3aux
DV33_18
RTS5242
SD_LN1_P SD_LN1_M
SD_LN0_P SD_LN0_M
SDREG2
E-PAD
RTS5242-GR_QFN32_4X4
33
+3.3V_MMI_IN
0.1U_0201_10V6K
1
CR3
2
SP1 SP2 SP3 SP4 SP5 SP6 SP7
GPIO
10U_0402_6.3V6M
CR4
12
+DV33_18
18
15
SD/MMCDAT1/RCLK-
16
SD/MMCDAT0/RCLK+
17
SD/MMCCLK
19
SD/MMCCMD
20
SD/MMCDAT3
21
SD/MMCDAT2
29
SDWP
SD_UHS2_D1P
22
SD_UHS2_D1N
23
SD_UHS2_D0P
26
SD_UHS2_D0N
25 24
+SDREG2
28
SD_GPIO
+3.3V_RUN_CARD
7/18 Vender suggest
1 2
CR15
1U_0402_6.3V6K
12
RR310K_0402_5%
SDWP
HOST_SD_WP#<16>
1 2
CR22 1U_0402_6.3V6K
1 2
RR9 0_0402_5%
1 2
RR10 0_0402_5%
1 2
RR5EMI@ 0_0402_5%
1 2
RR6 0_0402_5%
1 2
RR7 0_0402_5%
1 2
RR8 0_0402_5%
+3.3V_MMI_AUX
QR1
L2N7002WT1G_SC-70-3
SDWP_Q
1 3
D
S
G
2
2
CR17
1 2
1
0.1U_0201_10V6K
SD/MMCDAT1/RCLK-_R SD/MMCDAT0/RCLK+_R
SD/MMCCLK_R
SD/MMCCMD_R
SD/MMCDAT3_R SD/MMCDAT2_R
+1.8V_RUN_CARD+3.3V_RUN_CARD
CR18
4.7U_0603_6.3V6K
@EMI@
5P_0402_50V8C
12
CR21
EMI depop locationCR13 close to UR2.10
JSD1
CONN@
+3.3V_RUN_CARD +1.8V_RUN_CARD
2
CR20
CR19
1 2
1
0.1U_0201_10V6K
4.7U_0603_6.3V6K
SD/MMCCMD_R SD/MMCCLK_R
SD/MMCCD# SDWP_Q
SD/MMCDAT0/RCLK+_R SD/MMCDAT1/RCLK-_R SD/MMCDAT2_R SD/MMCDAT3_R SD_UHS2_D0P SD_UHS2_D0N SD_UHS2_D1P SD_UHS2_D1N
CR40,CR41 near JSD1.14CR38,CR39 near JSD1.4
4
VDD/VDD1
14
VDD2
2
CMD
5
CLK
18
CARD DETECT
19
WRITE PROTEC
7
DAT0/RCLK+
8
DAT1/RCLK-
9
DAT2
1
CD/DAT3
11
D0+
12
DO-
16
D1+
15
D1-
3
VSS1
6
VSS2
10
VSS3
13
VSS4 VSS517GND7
T-SOL_ 156-2 00030 2608_ NR
GND1 GND2 GND3 GND4 GND5 GND6
20 21 22 23 24 25 26
LINK SP070011U00 DONE
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Card Reader
Card Reader
Card Reader
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
of
of
of
34 61
34 61
34 61
0.2
0.2
0.2
5
+3.3V_WWAN
NGFF slot B Key B
WWAN_PWR_EN
12
RZ43 47K_0402_5%
D D
C C
+3.3V_WWAN
.047U_0402_16V7K
.047U_0402_16V7K
33P_0402_50V8J
12
12
12
CZ18
CZ17
B B
SIM Card Push-Push
+SIM_PWR
4.7U_0402_6.3V6M
12
CZ37
UIM_CLK
A A
12
12
47P_0402_50V8J
@RF@
CZ38
@RF@
51_0402_5%
RZ334
100P_0402_50V8J
RF@
12
CZ198
PCIE_PTX_DRX_N17<16> PCIE_PTX_DRX_P17<16>
22U_0603_6.3V6M
33P_0402_50V8J
12
12
CZ20
CZ21
CZ19
USB3_PRX_DTX_N2<20>
USB3_PRX_DTX_P2<20>
USB3_PTX_DRX_N2<20>
USB3_PTX_DRX_P2<20>
JSIM1
1
UIM_RESET UIM_CLK
VCC
2
RST
3
CLK
4
RFU1
10
GND
11
GND
12
GND
13
GND
T-SOL_ 5-991 50300 4000- 6
SLOT2_CONFIG_3<37>
SLOT2_CONFIG_0<37> WWAN_WAKE#<37>
PCIE_PRX_DTX_P17<16> PCIE_PRX_DTX_N17<16>
1 2
CZ10 0.1U_0402_25V6
1 2
CZ11 0.1U_0402_25V6
CLK_PCIE_N0<18> CLK_PCIE_P0<18>
SLOT2_CONFIG_1<37>
SLOT2_CONFIG_2<37>
+3.3V_WWAN
47P_0402_50V8J
RF@
12
12
CZ23
USB3_PTX_C_DRX_N2
12
CI29 0.1U_0402_25V6
USB3_PTX_C_DRX_P2
12
CI30 0.1U_0402_25V6
CONN@
5
GND
6
VPP
UIM_DATA
7
I/O
8
RFU2
SIM_DET
9
DTSW
14
GND
15
GND
16
GND
'()'*+,*-.
100P_0402_50V8J
2200P_0402_50V7K
RF@
12
CZ24
RF@
CZ25

+SIM_PWR
@RF@
15K_0402_5%
12
RZ335
UIM_DATA UIM_RESET
33P_0402_50V8J
@RF@
12
CZ39
5
USB20_P8_L USB20_N8_L
RZ326 0_0402_5%@RF@
USB3_PRX_L_DTX_N2 USB3_PRX_L_DTX_P2
USB3_PTX_L_DRX_N2
USB3_PTX_L_DRX_P2
PCIE_PTX_C_DRX_N17 PCIE_PTX_C_DRX_P17
100U_B2_6.3VM_R35M
RF@
1
+
CZ26
2
RI27 0_0402_5%@RF@ LI16
1 2
HCM1012GH900BP_4P
LI17
1 2
HCM1012GH900BP_4P
+SIM_PWR
33P_0402_50V8J
@RF@
12
CZ40
'()'*+,*-.
T225PAD~D @
1 2
RF@
1 2
RI28 0_0402_5%@RF@
1 2
RI29 0_0402_5%@RF@
RF@
1 2
RI30 0_0402_5%@RF@
0.1U_0402_25V6
1
2
12
RF@
CZ41
4
JNGFF2
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
GND
BELLW_80149-4221
USB3_PRX_L_DTX_N2
USB3_PRX_L_DTX_P2
34
USB3_PTX_L_DRX_N2
USB3_PTX_L_DRX_P2
34
STATE #
0GND
8 14 15
4
+3.3V_WWAN
2
2
4
4
WWAN_PWR_EN
6
6
WWAN_RADIO_DIS#_R
8
8
SLOT2_SATA_LED#
10
10
12
12
14
14
16
16
HW_GPS_DISABLE#_R
18
18
20
20
UIM_RESET
22
22
UIM_CLK
24
24
UIM_DATA
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
PCH_PLTRST#_AND
42
42
44
44
46
46
48
RZ131 0_0402_5%
@
48
50
RZ132 0_0402_5%
@
50
WWAN_COEX3
52
52
WWAN_COEX2
54
54
WWAN_COEX1
56
56
58
58
60
60
62
62
64
64
66
66
68
GND
WWAN_RADIO_DIS#<37>
HW_GPS_DISABLE#<37>
PCIE_WAKE#
SIM_DET
1 2
RN101 0_0402_5%@
9/24: Reserve for embedded location ,refer Intel PDG 0.9
CLKREQ_PCIE#0 <18>
12 12
RZ128 0_0201_5%
@RF@
RZ129 0_0201_5%
@RF@
RZ130 0_0201_5%
@RF@
RB751S40T1G_SOD523-2
RB751S40T1G_SOD523-2
+SIM_PWR
PORT80_DET# <37>
HOST_DEBUG_TX <37,38>
1 2 1 2 1 2
21
DZ5
21
DZ6
SATALED# <16,40,45>
m3042_DEVSLP <20>
WLAN_COEX3 WLAN_COEX2 WLAN_COEX1
WWAN_RADIO_DIS#_R
HW_GPS_DISABLE#_R
'()'*+,*-.
1 2
RI47 0_0402_5%@RF@
LI8
RF@
GND HIGH GND GND
1 2
MCM1012B900F06BP_4P
1 2
RI48 0_0402_5%@RF@
GND GND GND HIGH HIGH
USB20_P8<17>
USB20_N8<17>
CONFIG_0 CONFIG_21CONFIG_3 Module Type
CONFIG_1
GND
HIGH HIGH HIGH
34
GND GND GNDHIGH HIGH HIGH
USB20_P8_L
USB20_N8_L
SSD-PCIE(2 lane)
HCA-PCIE(1 lane)
3
SSD-SATA
WWAN
NA
3
(03)!\!)8aL7c#G (03)B0B%!\!)8aG7c#G

1 2
BT_RADIO_DIS#<37>
Issued Date
Issued Date
Issued Date
CV145 0.1U_0402_25V6
1 2
CV146 0.1U_0402_25V6
1 2
CV148 0.1U_0402_25V6
1 2
CV147 0.1U_0402_25V6
SW1_DP1_HPD<25>
1 2
CZ12 0.1U_0402_25V6
1 2
CZ13 0.1U_0402_25V6
PCIE_PRX_DTX_P2<17> PCIE_PRX_DTX_N2<17>
CLK_PCIE_P1<18> CLK_PCIE_N1<18>
CLKREQ_PCIE#1<18>
PCIE_WAKE#<38,40>
1 2
CZ14 0.1U_0402_25V6
1 2
CZ15 0.1U_0402_25V6
PCIE_PRX_DTX_P1<17> PCIE_PRX_DTX_N1<17>
CLK_PCIE_P2<18> CLK_PCIE_N2<18>
USB20_P6<17>
USB20_N6<17>
2016/01/01
2016/01/01
2016/01/01
RB751S40T1G_SOD523-2
RB751S40T1G_SOD523-2
WLAN
WIGI
m3042_PCIE#_SATA
High Low Low Low Low
SW1_DP1_N3<25> SW1_DP1_P3<25>
SW1_DP1_N2<25> SW1_DP1_P2<25>
PCIE_PTX_DRX_P2<17> PCIE_PTX_DRX_N2<17>
PCIE_PTX_DRX_P1<17> PCIE_PTX_DRX_N1<17>
WLAN_WIGIG60GHZ_DIS#<37>
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
2
>03)\3*b*B3A@C*)GLWGNWGO)f^9
NGFF slot A Key A
JNGFF1
1
USB20_P6_L USB20_N6_L
SW1_DP1_N3_C SW1_DP1_P3_C
SW1_DP1_N2_C SW1_DP1_P2_C
PCIE_PTX_C_DRX_P2
PCIE_PTX_C_DRX_N2
PCIE_WAKE#
PCIE_PTX_C_DRX_P1 PCIE_PTX_C_DRX_N1
21
DZ1
21
DZ2
'()'*+,*-.
1 2
RI49 0_0402_5%@RF@
LI9
RF@
1 2
MCM1012B900F06BP_4P
1 2
RI50 0_0402_5%@RF@
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
Deciphered Date
Deciphered Date
Deciphered Date
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
GND
BELLW_80148-4221
WLAN_WIGIG60GHZ_DIS#_R
BT_RADIO_DIS#_R
34
CONN@
USB20_P6_L
USB20_N6_L
2 4 6
8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66
GND
PWR Rail
+3.3V
2017/01/01
2017/01/01
2017/01/01
+3.3V_WLAN
2 4 6
8 10
SW1_DP1_AUXN_C
12
SW1_DP1_AUXP_C
14 16
SW1_DP1_N1_C
18
SW1_DP1_P1_C
20 22
SW1_DP1_N0_C
24
SW1_DP1_P0_C
26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66
68
WLAN_COEX3 WLAN_COEX2 WLAN_COEX1
WIGIG_32KHZ
PCH_PLTRST#_AND
BT_RADIO_DIS#_R
WLAN_WIGIG60GHZ_DIS#_R
ISH_UA RT0_R XD_R ISH_UA RT0_TX D_R ISH_UA RT0_C TS#_R ISH_UA RT0_R TS#_R PCH_PLTRST#_AND
PCIE_WAKE#
+3.3V_WLAN
12
PCH_CL_RST1# <16>
PCH_CL_DATA1 <16>
PCH_CL_CLK1 <16>
PCH_PLTRST#_AND <19,34,39,40>
RZ78 0_0402_5%@ RZ79 0_0402_5%@ RZ80 0_0402_5%@ RZ81 0_0402_5%@
CLKREQ_PCIE#2 <18>
9/24: Reserve for embedded location ,refer Intel PDG 0.9
0.1U_0201_10V6K
0.01UF_0402_25V7K
CZ28
+3.3V_WLAN
1
CZ30
2
'()'*+,*-.
15P_0402_50V8J
RF@
12
12
CZ33
10U_0603_10V6M
1
2
15P_0402_50V8J
RF@
CZ34
Power Rating TBD
Voltage Tolerance
Primary Power Aux Power
Peak Normal Normal
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
NGFF Card
NGFF Card
NGFF Card
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
12
SW1_DP1_AUXN <25>
12
CV1500.1U_0402_25V6
SW1_DP1_AUXP <25>
CV1490.1U_0402_25V6
12
SW1_DP1_N1 <25>
12
CV1520.1U_0402_25V6
SW1_DP1_P1 <25>
CV1530.1U_0402_25V6
12
SW1_DP1_N0 <25>
12
CV1560.1U_0402_25V6
SW1_DP1_P0 <25>
CV1570.1U_0402_25V6
12
SUSCLK <20,40>
RZ560_0402_5%
12
ISH_UAR T0_RXD <21 >
12
ISH_UAR T0_TXD <21>
12
ISH_UAR T0_CTS# <2 1>
12
ISH_UAR T0_RTS# <2 1>
0.01UF_0402_25V7K
12
CZ27
Place near JNGFF1.2/JNGFF1.4Place near JNGFF1.72/JNGFF1.74
15P_0402_50V8J
RF@
12
12
CZ35
1
4.7U_0603_6.3V6K
0.1U_0201_10V6K
1
12
CZ29
15P_0402_50V8J
CZ32
CZ31
2
RF@
CZ36
0.2
0.2
0.2
of
of
of
35 61
35 61
35 61
5
1W x 1ch, 4ohm (Transducer spec is 8Ohm/0.5W att per unit, there are two transducer units in one speaker box.)
Internal Speakers Header
40 mils trace keep 20 mil spacing
1 2
LA6 BLM15PX330SN1D_2PEMI@
1 2
INT_SPK_ R+ INT_SPK_ R-
D D
1000P_0402_50V7K
12
LA7 BLM15PX330SN1D_2PEMI@
1 2
LA8 BLM15PX330SN1D_2PEMI@
1 2
LA9 BLM15PX330SN1D_2PEMI@
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
12
12
12
CA24@EMI@
CA19@EMI@
CA22@EMI@
CA23@EMI@
INT_SPKR _L+IN T_SPK_L + INT_SPKR _L-INT_SPK_ L­INT_SPKR _R+ INT_SPKR _R-
L03ESDL5V0CC3-2_SOT23-3
2
2
3
@ESD@
DA6
1
1
CONN@
JSPK1
1
1
2
2
3
3
4
4
5
L03ESDL5V0CC3-2_SOT23-3
G1
6
3
G2
@ESD@
ACES_50278-00401-001
DA7
Close to UA1
Close to UA1 pin6
HDA_BIT_CLK_R
33_0402_5%
12
RA17@EMI@
10P_0402_50V8J
12
C C
CA33@EMI@
Place closely to Pin 13.
AUD_HP_NB_SENSE
12
place close to UA1 pin3
+3.3V_RUN_AUDIO
100K_0402_1%
12
200K_0402_1%
12
DMIC_CLK0
10P_0402_50V8J
CA54@EMI@
RA59
RA60
AUD_SENSE_A
12
+3.3V_RUN_AUDIO
0.1U_0402_25V6
@
CA41
Add for solve pop noise and detect issue
4
+3.3V_RUN_AUDIO
1 2
1U_0603_10V6K
+3.3V_RUN_AUDIO
12
LA12 BLM15PX600SN1D_2P
12
LA14 BLM15PX600SN1D_2P
HDA_SYNC_R<20>
HDA_BIT_CLK_R<20>
HDA_SDOUT_R<20>
HDA_SDIN0<20>
RA52100K_0402_5%
DMIC_CLK0<32>
12
RA1810K_0402_5%
12
CA31
0.1U_0201_10V6K
1
2
HDA_BIT_CLK_R
Place RA9 close to codec
DMIC0<32>
DMIC_CLK0 DMIC_CLK_CODEC
PD#
10U_0603_10V6M
CA10
12
place close to pin1
1 2
RA9 33_0402_5%
1 2
RA14EMI@ 22_0402_5%
1 2
RA61100K_0402_5%
CA61
HDA_SDOUT_R HDA_SDIN0_R
INT_SPK_ L+ INT_SPK_ L­INT_SPK_ R­INT_SPK_ R+
AUD_SENSE_A AUD_SENSE_B
1
2
12
12
RA44100K_0402_5%
12
CA5110U_0603_10V6M
12
CA5210U_0603_10V6M CA5310U_0603_10V6M
3
+3.3V_RUN_AUDIO_IO
0.1U_0201_10V6K
10U_0603_10V6M
CA55
CA56
12
place close to pin9
+3.3V_RUN_AUDIO_DVDD
9
1
UA1
DVDD
11
I2C_SDA
12 10
6 5 8
4 2
3 47 48
27 39
7
42 43 44 45
13 14 15
DVDD-IO
I2C_SCL SYNC
BIT-CLK SDATA-OUT SDATA-IN
EAPD/DC DET GPIO0/DMIC-DATA12 GPIO1/DMIC-CLK PDB SPDIFO/GPIO2/DMIC-D ATA-34/DMIC-CLK-In/MIC -GPI
LDO1-CAP LDO2-CAP LDO3-CAP
SPK-L+ SPK-L­SPK-R­SPK-R+
HP/LINE1 JD1 MIC2/LINE2 JD2 SPDIFO/FRONT JD 3/GPIO3
ALC3246-CG_MQFN48_6X6
+5V_RUN_PVDD_L
41
46
PVDD1
PVDD2
26
40
AVDD1
0.1U_0201_10V6K
1
2
36
AVDD2
CPVDD
LINE1-VREFO-L LINE1-VREFO-R
MIC2-VREFO
VREF
5VSTB
CPVEE
MIC2-L/RING2
MIC2-R/SLEEVE
MIC-CAP
LINE2-L
LINE2-R
LINE1-L LINE1-R PCBEEP
HP-OUT-L
HP-OUT-R
AVSS1 AVSS2
THERMAL PAD
place close to pin46place close to pin41
0.1U_0201_10V6K
10U_0603_10V6M
CA45
+VDDA_AVDD1
+1.8V_RUN_AUDIO
CBN CBP
CA47
1
1
CA46
2
2
31
+LINE1-VREFO-L
30
+LINE1-VREFO-R
29
+MIC2-VREFO
28 35
CA35 2.2U_0402_6.3V6M
37
CA29 1U_0603_10V6K
20
RA53 0_0402_5%@ RA54 0_0402_5%
34
CA49 1U_0603_10V6K
SLEEVE/RING2 please keep 40 mils trace width
17
RING2
18
SLEEVE
19 24 23
LINE1_L HP_OUT_L
22
LINE1_R
21
AUD_PC_BEEP
16
HP_OUT_L AUD_HP_OUT_L
32
HP_OUT_R
33 25
38 49
LA13
1 2
HCB2012VF-601T20_2P
10U_0603_10V6M
1
CA48
2
place close to pin26
10U_0603_10V6M
12
CA9
place close to pin40
10U_0603_10V6M
CA58
12
1 2
RA57 4.7K_0402_5%
1 2
RA58 4.7K_0402_5%
1 2
12
1 2 1 2
1 2
1 2 1 2
600 Ohm/2A
0.1U_0201_10V6K CA8
1
2
0.1U_0201_10V6K CA57
1
2
AUD_PC_BEEP
1 2
CA2510U_0603_10V6M
1 2 1 2
0.1U_0201_10V6K CA60
1
1
2
2
LA5
1 2
BLM15PX600SN1D_2P
1 2
RA3 0_0603_5%
AUD_HP_OUT_L AUD_HP_OUT_R
Place CA29 close to Codec
+5V_ALW +RTC_CELL
CA27 0.1U_0402_25V6 CA28 0.1U_0402_25V6
HP_OUT_R
CA4310U_0603_10V6M CA4410U_0603_10V6M
AUD_HP_OUT_R
RA716.2_0402_1% RA816.2_0402_1%
2
+5V_RUN_AUDIO
10U_0603_10V6M
CA59
+5V_RUN_AUDIO
+1.8V_RUN
AUD_HP_OUT_L/ AUD_HP_OUT_Rplease keep 15 mils trace width
+MIC2-VREFO
12 12
SPKR_R BEEP_R
AUD_HP_OUT_L/ AUD_HP_OUT_Rplease keep 15 mils trace width
SPKR_R
1 2 1 2
1 2 1 2
RING2 SLEEVE
RA5 2.2K_0402_5% RA6 2.2K_0402_5%
RA12 1K_0402_5% RA13 1K_0402_5%
12
SPKR <20>
BEEP <37>
100P_0402_50V8J
CA72@
10K_0402_5%
@
12
RA51
+1.8V_RUN_AUDIO
1
BEEP_R
100P_0402_50V8J
10K_0402_5%
@
12
12
CA62@
RA45
'()'*+,*-.
+5V_RUN_AUDIO
68P_0402_50V8J
RF@
12P_0402_50V8J
RF@
1
1
CA64
CA63
2
2
'()'*+,*-.
+1.8V_RUN
RF@
33P_0402_50V8J
CA69
1
2
12P_0402_50V8J
RF@
1
CA65
2
'()'*+,*-.
+3.3V_RUN_AUDIO
12P_0402_50V8J
RF@
1
CA67
2
68P_0402_50V8J
RF@
1
CA66
2
68P_0402_50V8J
RF@
1
CA68
2
&E988%c)#Xa$')cXad)&Xd!'XE)&D'&fD!
B B
place at AGND and DGND plane
1 2
RA35 0_0402_5%
1 2
RA36 0_0402_5%
1 2
RA37 0_0402_5%
Power sequence +5V_RUN_AUDIO(501us) > +3.3V_RUN_AUDIO(1204 us) > +1.5V_RUN
+5V_RUN_AUDIO
Reserve for support D3 cold
+5V_RUN
A A
AUD_PWR_EN<16>
+5V_ALW
+3.3V_RUN
1 2
3 4 5 6
5
UZ5
@
VIN1
VOUT1
VIN1
VOUT1
ON1
CT1
VBIAS
GND
ON2
CT2
VIN2
VOUT2
VIN27VOUT2
GPAD
EM5209VF_SON14_2X3
+5V_RUN_AUDIO_UZ5
14 13
12 11 10 9
+3.3V_RUN_AUDIO_UZ5
8 15
PJP19
1 2
PAD-OPEN1x1m
+5V_RUN
12
PJP15@
+3.3V_RUN +3.3V_RUN_AUDIO
PAD-OPEN1x1m
1 2
CZ125 0.1U_0201_10V6K@
1 2
220P_0402_50V7K
CZ126
@
1 2
1000P_0402_50V7K
CZ127
@
PJP16@
1 2
PAD-OPEN1x1m
CZ128 0.1U_0201_10V6K@
+3.3V_RUN_AUDIO
1 2
AUD_NB_MUTE#<37>
HDA_RST#_R<20>
HDA_Link is 3.3V,no need l evel shift circuit
PJP17
1 2
PAD-OPEN1x2m
PJP18
1 2
PAD-OPEN1x1m
4
+5V_RUN_AUDIO
2.5A
500mA
1 2
RA48 0_0402_5%
DA8
@
RB751S40T1G_SOD523-2
1 2
RA50 0_0402_5%@
21
RE313@one control line if DVDD is 3.3V DE2@two control lines1
PD#
2016/01/01
2016/01/01
2016/01/01
RING2_R
AUD_HP_OUT_L1AUD_HP_OUT_L
AUD_HP_OUT_R1 SLEEVE_R
680P_0402_50V7K
ESD@
2
CA1
1
680P_0402_50V7K
330P_0402_50V8J
330P_0402_50V8J
EMI@
EMI@
1
1
1
CA2
CA3
2
2
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
1 2
RING2
AUD_HP_OUT_R
SLEEVE
3
LA10 BLM15PX330SN1D_2PESD@
1 2
RA55 0_0402_5%EMI@
Only BR15U UMA us e LA2,LA3,becaus e 6L
1 2
RA56 0_0402_5%EMI@
1 2
LA11 BLM15PX330SN1D_2PESD@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
ESD@
CA4
ESD@
2
3
DA1
AZ5123-02S.R7G_SOT23-3
1
Add this Filter to avoid other components/chips be influenced
680P_0402_50V7K
@ESD@
1
CA13
2
AUD_HP_NB_SENSE
ESD@
2
2
3
DA2
L03ESDL5V0CC3-2_SOT23-3
1
1
2017/01/01
2017/01/01
2017/01/01
HP-Out-Right Nokia-MIC
HP-Out-Left
Universal Jack
JHP1
3 1
5
6 2
4
ESD@
3
DA3
AZ5123-02S.R7G_SOT23-3
DELL CONFIDENTIAL/PROPRIETARY
C
C
C
SINGA_2SJ3095-059111F
680P_0402_50V7K
@ESD@
1
CA12
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Codec ALC3246
Codec ALC3246
Codec ALC3246
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
iPhone-MIC
Global Headset
CONN@
1
Normal Open
7
G
of
of
of
36 61
36 61
36 61
0.2
0.2
0.2
5
+RTC_CELL
+3.3V_ALW_UE1
+3.3V_ALW
+3.3V_ALW_UE1
D D
0.1U_0201_10V6K CE19
1
2
close to pin G8/M9
'()'*+,*-.
+3.3V_ALW
0.1U_0201_10V6K
+3.3V_ALW_UE1
CE20
1
2
+3.3V_ALW_UE1
12
1 2
10U_0603_6.3V6M
CE16
0.1U_0201_10V6K
1
CE15
PJP22
PAD-OPEN1x1m
12
RE314100_0402_1%
+VSS_PLL
2
68P_0402_50V8J
RF@
12P_0402_50V8J
RF@
1
1
CE60
CE59
2
2
PJP20
+1.8V_PRIM
C C
+3.3V_ALW
B B
1 2
1
PAD-OPEN1x1m
CE22
0.1U_0201_10V6K
2
@
1 2
+3.3V_ALW
PAD-OPEN1x1m
RE10 100K_0402_5% RE11 100K_0402_5%
RE365 100K_0402_5%
RPE10
1
8
2
7
3456
100K_0804_8P4R_5%
1 2
RE95 100K_0402_5%
@
PJP21
WWAN_RADIO_DIS#
12
BT_RADIO_DIS#
12
BC_DAT_ECE1117
12
IMVP_ VR_ON _EC RUN_ON_EC PCH_ALW_ON CV2_ON
TBT_RE SET_N _EC_R
Close to pin H1
+1.8V_3.3V_ALW_VTR3
CE21
1
0.1U_0201_10V6K
Close to pin N5
2
CV2_ON <37,39>
+3.3V_ALW
100K_0402_5%
RE63
VCCST_PWRGD<7,38>
+3.3V_ALW2
RE57 1K_0402_5%
12
RE32 0_0402_5%
0.1U_0201_10V6K
1U_0402_6.3V6K
CE13
CE14
1
12
2
22U_0603_6.3V6M
0.1U_0201_10V6K
@
1
1
CE17
CE18
2
2
RE349 43K_0402_1%
1 2
1 2
SIO_SLP_SUS#<11,20,46,51,53>
RE308 0_0402_5%@
12
12
100K_0402_5%
0.1U_0201_10V6K CE23
1
2
WLAN_WIGIG60GHZ_DIS#<35>
CLK_TP_SIO_I2C_DAT<44> DAT_TP_SIO_I2C_CLK<44>
RE58
1 2
1
@SHORT PADS~D
1
JTAG1@
2
2
A A
MEC_XTAL1 MEC_XTAL2
10P_0402_50V8J
12
CE28
JTAG_RST#
1U_0402_6.3V6K
100_0402_1%
12
12
CE30
RE65@
MEC_XTAL2_R
32 KHz Clock
YE1
1 2
32.768KHZ_9PF_X1A000141000200
5
12
RE290 0_0402_5%
8/28 schematic review
10P_0402_50V8J
12
CE29
For MEC5105 Rev.A:Pop RE361,Depop RE36 0,RE362 For MEC5105 Rev.B:Depo p RE361,Pop RE36 0,RE362
SHD_IO2
PRIM_PWRGD_GPIO024
GPIO055 use fo r SHD_CS# (L PC) or PCH_RS MRST#(eSPI) GPIO227 use fo r SHD_IO2 (LPC) or PRIM_PW RGD(eSPI)
PCH_RSMRST#_GPIO204
SHD_CS#
CLKRUN#<20> SIO_EXT_SMI#<19>
SIO_RCIN#<20> SIO_EXT_SCI#<21>
+3.3V_ALW_UE1
+1.8V_3.3V_ALW_VTR3
PCH_DPWROK_EC<38>
RUN_ON_EC<38>
SIO_EXT_WAKE#<21>
BT_RADIO_DIS#<35>
PBAT_PRES#<48,57>
PCH_ALW_ON<46> AC_PRESENT<20>
SML1_SMBDATA<20>
SML1_SMBCLK<20>
WWAN_WAKE#<35>
SUSACK#<20>
SIO_PWRBTN#<7,20>
LID_CL#_NB<38>
JTAG_TDI<38> JTAG_TDO<38> JTAG_CLK<38>
JTAG_TMS<38>
FAN1_TACH<38>
LCD_TST<32>
WWAN_RADIO_DIS#<35>
FAN1_PWM<38>
BIA_PWM_EC<32>
ACAV_IN_NB<48,57,59>
PANEL_BKEN_EC<32>
SIO_SLP_WLAN#<20,46>
AC_DIS<57>
BCM5882_ALERT#<39>
MSCLK<38>
MSDATA<38>
AUD_NB_MUTE#<36>
EN_INVPWR<32>
IMVP_V R_ON_EC<38>
SIO_SLP_S3#<20,21,38> SIO_SLP_S5#<20,21>
AC_DISC#<48,59>
USH_DET#<39>
BC_DAT_ECE1117<44>
BC_CLK_ECE1117<44>
SLOT2_CONFIG_3<35>
ESPI_RESET#<20>
ESPI_ALERT#<20>
PCH_PLTRST#_5105<38>
ESPI_CLK_5105<20,38>
ESPI_CS#<20,38>
ESPI_IO0<20,38> ESPI_IO1<20,38> ESPI_IO2<20,38> ESPI_IO3<20,38>
SYS_PWROK<7,20>
ENVDD_PCH<16,32>
4
+RTC_CELL_VBAT
0.1U_0201_10V6K CE11
1
2
+3.3V_EC_PLL
RUN_ON_EC BT_RADIO_DIS#
PCH_ALW_ON
WWAN_WAKE#
WLAN_WIGIG60GHZ_DIS#
VCCST_PWRGD_EC
JTAG_TDI JTAG_TDO JTAG_CLK JTAG_TMS
JTAG_RST#
LCD_TST WWAN_RADIO_DIS#
PS_ID<48>
SHD_CS# SHD_CLK
TBT_RE SET_N _EC_R
VGA_ID
AC_DIS
MSCLK MSDATA
EN_INVPWR
PRIM_PWRGD_GPIO024
IMVP_ VR_ON _EC
AC_DISC#
GPIO126
RTCRST_ON_GPIO122
BC_DAT_ECE1117
SIO_EXT_SMI#_EC SIO_RCIN#_EC
CLKRUN#_EC SIO_EXT_SCI#_EC SYS_PWROK
MEC_XTAL1 MEC_XTAL2_R
1 2
RE360 0_0402_5%
1 2
RE361 49.9K_0402_1%@
1 2
RE362 100K_0402_5%
1 2
RE363 0_0402_5%LPC@
1 2
RE364 0_0402_5%ESPI@
1 2
RE337 0_0402_5%LPC@
1 2
RE338 0_0402_5%LPC@
1 2
RE339 0_0402_5%LPC@
1 2
RE341 0_0402_5%LPC@
4
GPIO223
eSPI
NA NANA
LPC
SHD_IO0
GPIO204
NA
eSPI
RSMRST#
LPC
UE1
A2
VBAT
B7
VTR_ANALOG
K2
VREF_ADC
F1
VTR_PLL
H1
VTR_REG
G8
VTR1
M9
VTR2
N5
VTR3
F8
GPIO020
E8
GPIO045
M12
GPIO120
C2
GPIO166
F9
GPIO175
N4
GPIO230
M8
GPIO231
K8
GPIO233
E11
GPIO007/SMB03_DATA/PS2_CLK0B
D8
GPIO010/SMB03_CLK/PS2_DAT0B
M13
GPIO110/PS2_CLK2
K12
GPIO111/PS2_DAT2
L13
GPIO112/PS2_CLK1A
K11
GPIO113/PS2_DAT1A
K10
GPIO114/PS2_CLK0A/nEC_SCI
N11
GPIO115/PS2_DAT0A
E10
GPIO154/SMB02_DATA/PS2_CLK1B
C12
GPIO155/SMB02_CLK/PS2_DAT1B
E9
GPIO145/SMB09_DATA/JTAG_TD I
F6
GPIO146/SMB09_CLK/JTAG_TDO
C8
GPIO147/SMB08_DATA/JTAG_CLK
C5
GPIO150/SMB08_CLK/JTAG_TMS
G13
JTAG_RST#
E3
GPIO050/FAN_TACH0/GTACH 0
D1
GPIO051/FAN_TACH1/GTACH 1
M2
GPIO052/FAN_TACH2/LRESET #
L10
GPIO053/PWM0/GPWM0
L11
GPIO054/PWM1/GPWM1
M5
GPIO055/PWM2/SHD_CS#/(R SMRST#)
J8
GPIO056/PWM3/SHD_CLK
N1
GPIO001/PWM4
L8
GPIO002/PWM5
N6
GPIO014/PWM6/GPTP-IN6
J9
GPIO015/PWM7
H11
GPIO035/PWM8/CTOUT1
D9
GPIO133/PWM9
H12
GPIO134/PWM10/UART1_RTS#
G10
GPIO135/UART1_CTS#
H10
GPIO170/TFDP_CLK/UART1_T X
G9
GPIO171/TFDP_DATA/UART 1_RX
A4
GPIO022/GPTP-IN0
B2
GPIO023/GPTP-IN1
C1
GPIO024/nRESETI
N7
GPIO031/GPTP-OUT1
K9
GPIO032/GPTP-OUT0
N8
GPI0040/GPTP-OUT2
F13
GPIO121/PVT_IO0
E13
GPIO124/GPTP-OUT6/PVT_CS#
C13
GPIO125/GPTP-OUT5/PVT_CLK
E12
GPIO126/PVT_IO3
F11
GPIO122/BCM0_DAT/PVT_IO1
F12
GPIO123/BCM0_CLK/PVT_IO2
D12
GPIO046/BCM1_DAT
D13
GPIO047/BCM1_CLK
F4
GPIO041/SYS_SHDN#
B1
SYSPWR_PRES
K7
GPIO011/nSMI
N3
GPIO021/LPCPD#
K6
GPIO061/LPCPD#/ESPI_RESET#
H7
GPIO063/SER_IRQ/ESPI_ALERT#
K1
GPIO064/LRESET#
G7
GPIO065/PCI_CLK/ESPI_CLK
H6
GPIO066/LFRAME#/ESPI_CS#
K5
GPIO070/LAD0/ESPI_IO0
L4
GPIO071/LAD1/ESPI_IO1
G6
GPIO072/LAD2/ESPI_IO2
L5
GPIO073/LAD3/ESPI_IO3
L2
GPIO067/CLKRUN#
M1
GPIO100/nEC_SCI
G4
GPIO106/PWROK
L12
GPIO107/nSMI
A1
XTAL1
A3
XTAL2
1.8V_PRIM_PWRGD <53>
+3.3V_ALW
PCH_RSMRST# <44>
CLKRUN#_EC SIO_EXT_SMI#_EC
SIO_RCIN#_EC SIO_EXT_SCI#_EC
GPIO224
*PRIM_PWRGD NA
SHD_IO1
* For Version B IC
GPIO011
NA NA
SIO_EXT_SMI#
A6
GPIO227
GPIO016
SHD_IO2
SHD_IO3
GPIO100 SIO_EXT_SCI#
GPIO141/SMB05_DATA/SPI1_CLK/U ART0_DCD#
GPIO142/SMB05_CLK/SPI1_MOSI/U ART0_DSR#
GPIO143/SMB04_DATA/SPI1_MISO/ UART0_DTR#
GPIO144/SMB04_CLK/SPI1_CS#/UAR T0_RI#
VSS1
A13
VSS2
VSS3
E6
RUN_ON<11,38,46,52>
VSS_ADCH4VR_CAPJ1VSS_PLL
+VR_CAP
12
3
GPIO056
GPIO055 PCH_RSMRST#
SHD_CLK
SHD_CS#
GPIO021
GPIO067
SIO_RCIN#
NA
LPCPD#
CLKRUN#
GPIO033/RC_ID0
GPIO034/RC_ID1/SPI0_CLK
GPIO036/RC_ID2/SPI0_MI SO
GPIO003/SMB00_DATA/SPI0_CS#
GPIO004/SMB00_CLK/SPI0_MOSI
GPIO057/VCC_PWRGD
GPIO060/KBRST/48MHZ_OUT
GPIO104/UART0_TX GPIO105/UART0_RX
GPIO127/A20M/UART0_CTS#
GPIO225/UART0_RTS#
GPIO025/TIN0/nEM_INT /UART_CLK
GPIO005/SMB01_DATA/GPTP-OUT4
GPIO006/SMB01_CLK/GPTP-OUT7
GPIO016/GPTP-IN7/SHD_IO3/ ICT3
VSS_ANALOG
C4
CE31 1U_0402_6.3V6K
GPIO026/TIN1 GPIO027/TIN2 GPIO030/TIN3
GPIO017/GPTP-IN5
GPIO151/ICT4
GPIO152/GPTP-OUT3
GPIO156/LED0 GPIO157/LED1 GPIO153/LED2 GPIO226/LED3
GPIO012/SMB07_DATA/TOUT3
GPIO013/SMB07_CLK/TOUT2
GPIO130/SMB10_DATA/TOUT1
GPIO131/SMB10_CLK/TOUT0
GPIO132/SMB06_DATA
GPIO140/SMB06_CLK/ICT5
GPIO200/ADC00 GPIO201/ADC01 GPIO202/ADC02 GPIO203/ADC03 GPIO204/ADC04 GPIO205/ADC05 GPIO206/ADC06 GPIO207/ADC07 GPIO210/ADC08 GPIO211/ADC09 GPIO212/ADC10 GPIO213/ADC11 GPIO214/ADC12 GPIO215/ADC13 GPIO216/ADC14 GPIO217/ADC15
GPIO222/SER_IRQ
GPIO223/SHD_IO0
GPIO224/GPTP-IN4/SHD_IO1
GPIO227/SHD_IO2
GPIO164/VCI_OVRD_IN
GPIO163/VCI_IN0# GPIO162/VCI_IN1# GPIO161/VCI_IN2# GPIO000/VCI_IN3#
GPIO165/32KHZ_IN/CTOUT 0
GPIO221/GPTP-IN3/32KHZ_OUT
GPIO044/VREF_VTT
GPIO042/PECI_DAT/SB-TSI_D AT
GPIO043/SB-TSI_CLK
GPIO103/THERMTRIP2#
THERMTRIP1#
GPIO160/PWM11/PROCHOT#
MEC5105_WFBGA169_11X11
G1
+VSS_PLL
+3.3V_ALW
100K_0402_5%
RUNPWROK
RE68
1 2
RUN_ON#
DMN65D8LDW-7_SOT363-6
61
QE2A
2
3
BGPO0
VCI_OUT
DN1_DP1A DP1_DN1A DN2_DP2A DP2_DN2A DN3_DP3A DP3_DN3A DN4_DP4A DP4_DN4A
VSET
+3.3V_RUN
RE67
5
2
TYPEC_ ID
F2
PANEL_ID
J10
BOARD_ID
J13
UPD2_SMBDAT
E7
UPD2_SMBCLK
D7 G3
RUNPWROK HW_GPS_DISABLE#
H5 G11 G12 B13
UPD1_ALERT#
F10
PCIE_WAKE#_R
N13 N12 M11 H9
L9 M10 N9
C11 D10 D11 E1
E5 B3
EXPANDER_GPU_SMDAT
M7
EXPANDER_GPU_SMCLK
M4
PBAT_CHARGER_SMBDAT
M3
PBAT_CHARGER_SMBCLK
N2 N10
SYS_LED_MASK#
A12
RTCRST_ON_GPIO141
B6 F7
UPD1_SMBDAT
B4
UPD1_SMBCLK
C3
I_BATT_ R
J4
I_SYS_ R
J5 J6 G2
PCH_RSMRST#_GPIO204
H2
USB_PWR_SHR_VBUS_EN
J2
USB_PWR_SHR_LFT_EN#
J3
USB_PWR_EN1#
K3 D3
LOM_CABLE_DETECT#
D2 E2
USB_PWR_EN2#
G5
UPD2_ALERT#
F5
PORT80_DET#
K4 L1 L3
H8
SHD_IO0
J7
SHD_IO1
L6 L7
SHD_IO3
M6 D6
C7 A5 D5
VCI_IN1#
B5
VCI_IN2#
D4
POA_WAKE#
E4
C6
32KHZ_OUT
F3
+PECI_VREF
J11
PECI_EC_R
K13
m3042_PCIE#_SATA
J12
REM_DIODE1_N
A8
REM_DIODE1_P
A7
REM_DIODE2_N
A10
REM_DIODE2_P
A9 B9 B8
REM_DIODE4_N
A11
REM_DIODE4_P
B10
+VR_CAP
C10
VIN
VSET_5105
C9 B11
VCP
H3
THERM ATRIP2 #
B12
THERMA TRIP1#
H_PROCHOT#_R1
H13
RTCRST_ON_GPIO141 RTCRST_ON_GPIO122
10K_0402_5%
1 2
DMN65D8LDW-7_SOT363-6
34
QE2B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
TYPEC_ ID <38> PANEL_ID <38> BOARD_ID <38>
HW_GPS_DISABLE# <35> HOST_DEBUG_TX <35,38> ME_FW_EC <20> ME_SUS_PWR_ACK <20>
UPD1_ALERT# <29>
PCIE_WAKE#_R <38> SIO_SLP_S4# <11,20,21,50,53> SIO_SLP_A# <20,21> SIO_SLP_LAN# <20,46>
BEEP <36> SLOT2_CONFIG_1 <35> SLOT2_CONFIG_0 <35>
BREATH_LED# <45> BAT1_LED# <45> BAT2_LED# <45> LCD_VCC_TEST_EN <32>
USH_SMBDAT <39> USH_SMBCLK <39> EXPANDER_GPU_SMDAT <38> EXPANDER_GPU_SMCLK <38> PBAT_CHARGER_SMBDAT <48,57> PBAT_CHARGER_SMBCLK <48,57> SLOT2_CONFIG_2 <35>
SYS_LED_MASK# <33,45>
UPD1_SMBDAT <29> UPD1_SMBCLK <29>
1 2
RE64 300_0402_5%
1 2
RE312 300_0402_5%
1 2
RE318 0_0402_5%
USB_PWR_SHR_VBUS_ EN <42> USB_PWR_SHR_LFT_EN# <42> USB_PWR_EN1# < 43> AUX_EN_WOWL <46> LOM_CABLE_DETECT# <33> BC_INT#_ECE1117 <44> USB_PWR_EN2# < 43>
PORT80_DET# <35>
PCH_PCIE_WAKE# <20,38>
LAN_WAKE# <20,33>
CV2_ON <37,39>
1 2
RE366 24.9_0402_1%LPC@
1 2
RE368 24.9_0402_1%LPC@
1 2
RE370 24.9_0402_1%LPC@
1 2
RE372 24.9_0402_1%LPC@
EC_FPM_EN <39>
ACAV_IN <57> ALWON <49> POWER_SW_IN# <38>
POA_WAKE# <39>
3.3V_WWAN_EN <46>
1 2
CE54 10P_0402_50V 8J@
1 2
RE60 43_0402_5%
1 2
CE24 2200P_0402_50V7K
1 2
CE26 2200P_0402_50V7K
1 2
CE27 2200P_0402_50V7K
VSET_5105 <38>
I_ADP <57 >
THERMA TRIP2# <3 8>
1 2
RE288 100_0402_5%
1 2
@
RE514 0_0402_5%
1 2
RE515 0_0402_5%
2016/01/01
2016/01/01
2016/01/01
I_BATT <57> I_SYS <5 4,57>
TOUCHP AD_IN TR# <19,44>
SHD_IO0_R1 SHD_IO1_R1 SHD_IO2_R1 SHD_IO3_R1
+PECI_VREF
H_PECI <7,16>
m3042_PCIE#_SATA <16>
H_PROCHOT# <7,54,57>
RTCRST_ON
RE93
100K_0201_5%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
1 2
RE374 24.9_0402_1%
1 2
RE367 45.3_0402_1%LPC@
1 2
RE369 45.3_0402_1%LPC@
1 2
RE371 45.3_0402_1%LPC@
1 2
RE373 45.3_0402_1%LPC@
Place near UE9Place near UE1
RE59 close to UE2 at least 250mils
0.1U_0201_10V6K
12
2
G
12
RE59 0_0402_5%
CE25
REM_DIODE1_N
REM_DIODE1_P
REM_DIODE2_N REM_DIODE2_P
REM_DIODE4_N REM_DIODE4_P
RE94
1 2
75_0402_5%
13
D
QE12 L2N7002WT1G_SC-70-3
S
12
SHD_CLK_R1SHD_CLK
SHD_IO0_R2 SHD_IO1_R2 SHD_IO2_R2 SHD_IO3_R2
+1.0V_VCCST
REM_DIODE1_N <38 > REM_DIODE1_P <38> REM_DIODE2_N <38 > REM_DIODE2_P <38>
REM_DIODE4_N <38 > REM_DIODE4_P <38>
PCH_RTCRST# <20,21>
(03)$^D)3*+,*-.
ESPI_CLK_5105
33_0402_5%
@EMI@
12
RE350
33P_0402_50V8J
@EMI@
12
CE57
2017/01/01
2017/01/01
2017/01/01
1
(03)\')f^9
+3.3V_ALW
SHD_IO3_R2 SHD_CLK_R1 SHD_IO0_R2
UPD1_SMBDAT UPD1_SMBCLK UPD1_ALERT# UPD2_ALERT#
PBAT_CHARGER_SMBDAT PBAT_CHARGER_SMBCLK
UPD2_SMBCLK UPD2_SMBDAT
EXPANDER_GPU_SMDAT EXPANDER_GPU_SMCLK
SLOT2_CONFIG_1 SLOT2_CONFIG_2 SLOT2_CONFIG_0 SLOT2_CONFIG_3
USB_PWR_SHR_VBUS_EN USB_PWR_EN2# USB_PWR_SHR_LFT_EN# USB_PWR_EN1#
AC_DIS HW_GPS_DISABLE# WLAN_WIGIG60GHZ_DIS# WWAN_WAKE# SYS_LED_MASK#
THERMA TRIP1#
PORT80_DET# PCIE_WAKE#_R
GPIO126
VCI_IN1# VCI_IN2#
SHD_IO2_R1 SHD_IO3_R1 SHD_CS#SHD_IO2
LPC@
8
VCC
7
HOLD#(IO3)
6
CLK
5
DI(IO0)
W25Q80DVSSIG_SO8
I_BATT_ R I_SYS_ R
PCH_RSMRST# SYS_PWROK I_SYS_ R LCD_TST
EN_INVPWR PORT80_DET#
POA_WAKE#
VGA_ID VGA_ID
1 2
RE302 2.2K_0402_5%
1 2
RE303 2.2K_0402_5%
1 2
RE91 100K_0402_5%
1 2
RE92 100K_0402_5%
1 2
RE37 2.2K_0402_5%
1 2
RE43 2.2K_0402_5%
1 2 3 4 5
2.2K_0804_8P4R_5%
1 2 3 4 5
100K_0804_8P4R_5%
RPE11
1 2 3 4 5
100K_0804_8P4R_5%
1 2
RE83 100K_0402_5%@
1 2
RE12 100K_0402_5%
1 2
RE8 100K_0402_5%
1 2
RE38 10K_0402_5%
1 2
RE21 10K_0402_5%
1 2
RE301 10K_0402_5%
1 2
RE512 100K_0402_5%
1 2
RE35 10K_0402_5%
1 2
RE5 10K_0402_5%
1 2
RE507 100K_0402_5%
1 2
RE508 100K_0402_5%
1 2
RE376 1K_0402_5%LPC@
1 2
RE377 1K_0402_5%LPC@
1 2
RE98 4.7K_0402_5%LPC@
UE9
1
CS#
2
DO(IO1)
3
WP#(IO2)
4
GND
1 2
CE3 2200P_0402_50V7K
1 2
CE4 2200P_0402_50V7K
1 2
RE342 10K_0402_5%
1 2
RE56 10K_0402_5%
1 2
RE313@ 10K_0402_5%
1 2
RE20 100K_0402_5%
1 2
RE55 100K_0402_5%
1 2
RE513 100K_0402_5%
@
1 2
RE324 100K_0402_5%
1 2
RE84 100K_0402_5%
1 2
RE85 100K_0402_5%@
Discrete
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
EC MEC5105
EC MEC5105
EC MEC5105
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-E151P
LA-E151P
LA-E151P
Wednesday, June 29, 2016
Wednesday, June 29, 2016
Wednesday, June 29, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
RPE12
RPE9
VGA_ID0
8 7 6
8 7 6
8 7 6
SHD_CS# SHD_IO1_R2 SHD_IO2_R2
0 1UMA
37 61
37 61
37 61
+RTC_CELL
+3.3V_ALW
+RTC_CELL
of
of
of
+3.3V_ALW
+3.3V_ALW
0.2
0.2
0.2
5
+1.8V_3.3V_ALW_VTR3
+3.3V_ALW
UE6
1
5
NC
VCC
PCH_PLTRST#_EC<19>
D D
JXT_FP241AH-010GAAM
C C
B B
2
A
4
Y
3
GND
74AUP1G07GW_TSSOP5
CONN@
11
GND
12
GND
+3.3V_RUN
JESPI
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
1 2
RE375 0_0402_5%LPC@
8
9
9
10
10
G
5MVM67'fd
5MVM67'fd
L
E#&7E9cQ
M
E#&7E9cG
N
E#&7E9cL
O
E#&7E9cM
e
E#&7('9^$l
H
#&F7#E!'8!l
I
`dc
K
E#&7&EX&U
GQ
PCH_DPWROK_EC<37 >
RE340 10K_0402_5%
1 2
PCH_PLTRST#_EC
$8#DE#&E#&)IQ#03.)c*R,C
5MVM67'fd
5MVM67'fd
$8#D7DXQ
$8#D7DXG
$8#D7DXL
$8#D7DXM
$8#D7&8l
d9
`dc
$8#D7&EU
CE6
0.1U_0402_25V6K
1 2
RE34 0_0402_5%
+3.3V_ALW
1
2
PCH_PLTRST#_5105 <37>
ESPI_IO0 <20,37> ESPI_IO1 <20,37> ESPI_IO2 <20,37> ESPI_IO3 <20,37>
ESPI_CS# <20,37>
ESPI_CLK_5105 <20,37>
RE348 10K_0402_5%
1 2
5 3
PAGE
8
18 RC212_0ohm RC211_0ohm
31
32
UE7
1
VDD
RESET
4
MR
CT
2
GND
RT9826-30GB
CT: 3300 pF ~ 10ms delay
Reset Threshold Level 3.0V
Control Byte
0100A2 A1 A0 R/W
R/W = 0 = Wire R/W = 1 = Read
8^\,-);@@3*--)QhNQ
+3.3V_ALW
10K_0402_5%
10K_0402_5%
100K_0402_5%
12
12
12
@
@
RE13
RE17
RE15@
EXPANDER_GPU_SMCLK<37>
EXPANDER_GPU_SMDAT<3 7>
A A
5
12
100K_0402_5%
RE14
10K_0402_5%
12
100K_0402_5%
+3.3V_ALW
12
RE16
RE18
@
T267
0.1U_0402_25V6K
1
12
CE1
2
1 2
RE6 10K_0402_5%
EXPANDER_ALERT#
PAD~D
+3.3V_ALW
1U_0402_6.3V6K
CE2
UE2
18
VSTBY33
19
SCL
20
SDL
1
A2
2
A1
3
A0
4
WRST#
7
INT
5
NC
6
NC
8
NC
IT8010FN-AX_QFN20_4X4
4
ESPI LPC
RC25_10K RC8_15ohm
RC13/RC27_8.2K
0603 0603
RE337,RE338 RE339,RE340, RE341
0_ohm
RE2 / RE3 0_ohm
PCH_DPWROK <20>
12
CE5 3300P_0402_50V7-K
16
GP7
15
GP6
14
GP5
13
GP4
12
GP3
11
GP2
10
GP1
9
GP0
17
VSS
21
EPAD
VBUS2_EC OK <48 ,59> DCIN2_EN <48> SATA_LED_EN <45> VBUS1_EC OK <59 > DCIN1_EN <59>
USH_PW R_STATE # <39 >
4
CONN@
JDEG1
11
GND
12
GND
JXT_FP241AH-010GAAM
10
1 2 3 4 5 6 7 8 9
+EC_DEBUG_VCC
1 2 3 4 5 6 7 8 9 10
RE71
49.9_0402_1%
12
DEBUG_TX
3
4 5
+1.0V_VCCST
3
678
123
1 2
0_0402_5%
10K_8P4R_5%
RPE7
JTAG_TDI JTAG_TMS JTAG_CLK JTAG_TDO
MSCLK MSDATA HOST_DE BUG_TX
RE30
+1.0VS_VCCIO
POWER_SW_IN#<37>
LID_CL#_NB
JTAG_TDI <37> JTAG_TMS <37> JTAG_CLK <37> JTAG_TDO <37>
SBIOS_TX<21>
HOST_DE BUG_TX < 35,37 > MSDATA <37> MSCLK <37>
QE11
@
1 3
D
L2N7002WT1G_SC-70-3
1 2
RE90 0_0402_5%
+RTC_CELL
+3.3V_ALW
12
12
1 2
&F$&U
SIO_SLP_S3# <20,21,37,38>
2
G
S
100K_0402_5%
12
RE31
1 2
RE33 10K_0402_5 %
1U_0402_6.3V6K
12
CE12
100K_0402_5%
RE25
RE26
12
.047U_0402_16V7K
10_0402_5%
CE8
+3.3V_ALW
10K_0402_5%
10K_0402_5%
10K_0402_5%
12
12
12
RE72
RE73
RE74
RE306
@
0_0402_5%
+3.3V_ALW
1 2
RE70 2.2K _ 0 4 02_5%
2
CE10@
1 2
1U_0402_6.3V6K
POWER_SW#_MB <21,45>
LID_CL# <45>LID_CL#_NB<37>
'()'*+,*-.
+3.3V_ALW
1
CE61
2
68P_0402_50V8J
RF@
+3.3V_ALW +3.3V_ALW
RE343
240K_0402_5%
TYPEC_ID<37> BOARD_ID<37> PANEL_ID<37>
RE343 CE62
240K 4700p
*
130K 4700p
4700p
62K
4700p
33K
8.2K
4700p 4700p
4.3K 4700p
2K
4700p
1K
1 2 12
CE62 4700P_0402_25V7K
REV Single Port ACE w/o AR Single Port ACE w/AR Dual Port ACE w/o AR Dual Port ACE w/AR Dual Port ACE (w/AR +w/o AR)
PD_ACE_DET# rise time is measured from 5%~68%.
100K_0402_5%
12
RE75@
RE86 10K_0402_5%
1 2
PCIE_WAKE#_R<3 7>
Stuff RE275 and no stuff RE274 keep E5 design Stuff RE274 and no stuff RE275 to save two GPIOs on EC(PCH_PCIE_WAKE# should be output with OD)
IMVP_VR_ON_EC
IMVP_VR_ON_EC<37> SIO_SLP_S3#<20,21 ,37,38>
RUN_ON_EC<37>
SIO_SLP_S3#
RUN_ON_EC
RE79
240K 4700p
*
130K 4700p 62K 33K
8.2K
4.3K 2K 1K
TC7SH08F U_SSOP5~D
TC7SH08F U_SSOP5~D
CE40
4700p 4700p 4700p 4700p 4700p 4700p
BOARD_ID rise time is measured from 5%~68%.
Rest=1.58K , Tp=96 degree???
+3.3V_RUN
RE48 1 0 K_ 0402_5% RE51 1 0 K_ 0402_5%
5105 Channel
RE275 0_0402_5%
UE3
1 2 1 2
Thermal diode mapping
DP1/DN1
DP2/DN2
DN2a/DP2a
DP3/DN3
DP4/DN4
DP4/DN4 for Skin on
100P_0402_50V8J
@
CE39
1 2
Deciphered Date
Deciphered Date
Deciphered Date
QE6, place QE6 close to Vcore VR choke.
C
E
3 1
LMBT3904WT1G SC70-3
RE69
1 2
8.2K_0402_5%
H_THERMTR IP#<7,14 ,15,16>
0.1U_0402_25V6
THERMATRIP2# <37>
LMBT3904WT1G SC70-3
CE36
12
C
QE4
2
B
E
3 1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEE T OF ENGINEE RING DRAW ING IS THE PROPRIETA RY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEE T OF ENGINEE RING DRAW ING IS THE PROPRIETA RY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEE T OF ENGINEE RING DRAW ING IS THE PROPRIETA RY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
UE5
+3.3V_ALW
12
B
QE6
1 2
VSET_51 05
0.1U_0402_25V6
CE38
2
+3.3V_ALW
1 2
1 2
12
12
12
12
@
@
0.1U_0402_25V6K
5
P
B
O
A
G
3
@
RE2800_0402_5%
12
@
+3.3V_ALW
0.1U_0402_25V6K
5
P
B
O
A
G
3
RE79 240K_0402_5%
CE40 4700P_0402_25V7K
REV
X00
1.58K_0402_1%
12
RE77
FAN1_PWM FAN1_TACH
Location
CPU (QE3)
WiGig (QE5)
DDR (QE7)
NA
CPU VR (QE6)
REM_DIODE4_P <37>
2017/01/01
2017/01/01
2017/01/01
1
(03)\')f^9
PCIE_WAKE# <35,40>
1 2
PCH_PCIE_WAKE# <20,37>
RE2740_0402_5% @
RE3040_0402_5%
CE53
1 2
4
RE2920_0402_5%
@
CE52
1 2
4
VSET_51 05 <37>
REM_DIODE4_N <37>
1
NC
IMVP_VR_ON
2
A
3
GND
74AUP1G07GW_TSSOP5
IMVP_VR_ON <54>
RUN_ON <11,37,46 ,52>
CE47
RE300
4700p240K 4700p130K 4700p
33K
*
4700p4.3K
PANEL_ID rise time is measured from 5%~68%.
Link 50271-0040N-001 DONE
JFAN1
1
1
2
2
3
3
4
4
5
GND1
6
GND2
ACES_5 0271-0 040N-0 01
CONN@
Place under CPU Place CE35 close to the QE3 as possible
100P_0402_50V8J
C
2
CE35@
B
1 2
E
QE3
3 1
LMBT3904WT1G SC70-3
DP2/DN2 for WiGig on QE5, place QE5 close to Type-C and CE37 close to QE5
DN2a/DP2a for DDR on QE7, place QE7 close to DDR and CE46 close to QE7
100P_0402_50V8J
CE46@
100P_0402_50V8J
E
31
B
12
2
QE7
C
LMBT3904WT1G SC70-3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
MEC5105 SUPPORT
MEC5105 SUPPORT
MEC5105 SUPPORT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
UE4
12
RE300 33K_0402_5%
12
CE47 4700P_0402_25V7K
FAN1_PWM FAN1_TACH
12
12
CE37@
5
VCC
4
Y
PANEL SIZE
12" 14" BR15 H BR15 P
10U_0603_6.3V6M
CE32
2 1
REM_DIODE1_P <37>
REM_DIODE1_N <37>
C
2
B
E
QE5
3 1
LMBT3904WT1G SC70-3
+3.3V_ALW
VCCST_PW RGD <7,37>
FAN1_PWM <37> FAN1_TACH <37>
+5V_RUN
RB751S40T1G_SOD523-2
@
DE1
REM_DIODE2_P <37>
REM_DIODE2_N <37>
38 61
38 61
38 61
0.2
0.2
0.2
of
of
of
5
4
3
2
1
(03)df6X!Xd)!#^
D D
+3.3V_ALW_PCH +3.3V_M_TPM
+3.3V_M_TPM
PCH_SPI_CLK_R1<19>
SIO_SLP_S0#<11,20,21,52>
PCH_SPI_D1_R1<19>
PCH_SPI_D0_R1<19>
PCH_SPI_CS#2<19>
PCH_SPI_CLK_2_R
33_0402_5%
RZ63
@EMI@
C C
B B
PJP391
1 2
PAD-OPEN1x1m
1 2
RZ69 10K_0402_5%
TPM_PIRQ#
1 2
RZ112 0_0402_5%@
1 2
RZ363 0_0402_5%
1 2
RZ58 33_0402_5%
1 2
RZ59 33_0402_5%
1 2
RZ60 33_0402_5%EMI@
1 2
RZ61 0_0402_5%
PLTRST_TPM#<19>
T283
+3.3V_RUN
TPM_PIRQ#<21>
@
PAD~D
12
RZ362
@
10K_0402_5%
TPM_LPM#
PCH_SPI_D1_2_R PCH_SPI_D0_2_R
PCH_SPI_CLK_2_R PCH_SPI_CS#2_R
10K_0402_5%
12
RZ62
TPM_GPIO4
UZ12
29
GPIO0/SDA/XOR_OUT
30
GPIO1/SCL
3
GPIO2/GPX
6
GPIO3/BADD
24
LAD0/MISO
21
LAD1/MOSI
18
LAD2/SPI_IRQ#
15
LAD3
19
LCKL/SCLK
20
LFRAME#/SCS#
17
LRESET#/SPI_RST#/SRESET#
27
SERIRQ
13
CLKRUN#/GPIO4/SINT#
28
LPCPD#
4
PP
5
TEST
NPCT650JB2YX_QFN32_5X5
+3.3V_RUN
Reserved
VSB
VDD VHIO VHIO
GND GND GND GND
PGND
1 2
RZ89 0_0402_5%
+3.3V_ALW
1
+UZ12_TPM
8 14 22
2
NC
7
NC
10
NC
11
NC
25
NC
26
NC
31
NC
9 16 23 32 33 12
0.1U_0201_10V6K
1
CZ51
2
+UZ12_TPM
4.7U_0402_6.3V6M
1
2
10U_0603_10V6M
place CZ51,CZ52 as close as UZ12.1
1
CZ52
2
1
2
CZ53,CZ55 as close as UZ12.14 CZ54 as close as UZ12.22
place CZ50, CZ75 as close as UZ12.8
0.1U_0201_10V6K
1
CZ50
CZ75
2
+3.3V_M_TPM
0.1U_0201_10V6K
0.1U_0201_10V6K
1
CZ53
CZ54
2
10U_0603_10V6M
+PWR_SRC
1
CZ55
2
PCH_PLTRST#_AND<19,34,35,40>
RZ85 0_0402_5%
1 2
RZ114 0_0402_5%@
USH_DET#<37>
'()'*+,*-. '()'*+,*-.
+3.3V_ALW +3.3V_M_TPM
12P_0402_50V8J
RF@
68P_0402_50V8J
RF@
1
1
CZ57
CZ58
2
2
+3.3V_ALW
1 2
USH_SMBCLK<37> USH_SMBDAT<37>
BCM5882_ALERT#<37>
USH_PWR_STATE#<38>
CONTACTLESS_DET#<16>
1 2
RZ87 0_0402_5%
DZ7
@
2 1
RB751S40T1G_SOD523-2
1 2
RZ8 2.2K_0402_5%@
1 2
RZ9 2.2K_0402_5%@
1 2
RZ10 100K_0402_5%
+PWR_SRC_R
CV2_ON<37> POA_WAKE#<37> EC_FPM_EN<37>
USB20_N10<17> USB20_P10<17>
+3.3V_ALW
+5V_ALW +3.3V_RUN
+5V_RUN
USH_RST#_R
USH_DET#_R
12P_0402_50V8J
RF@
1
1
CZ59
2
2
USH_SMBCLK USH_SMBDAT
USH_PWR_STATE#
68P_0402_50V8J
RF@
CZ60
USH CONN
CONN@
JUSH1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
GND1
28
GND2
CVILU_CF5026FD0RK-05-NH
0.1U_0402_25V6
1 2
@EMI@
12
CZ56
PCH_SPI_CS#2_R
1 2
RZ113 100_0402_5%@
1K
100
A A
5
4
+3.3V_M_TPM
S
3
G
LP2301ALT1G_SOT23-3
2
RZ111RZ113
MMBT39061K
10K
LP2301A
POP
QZ9@
D
1
TPM_LPM#
12
RZ111
@
10K_0402_5%
USH_SMBCLK
USH_SMBDAT
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
PCH_PLTRST#_AND
.047U_0402_16V7K
12
'()'*+,*-.
1 2
CZ62 68P_0402_50V8J@RF@
1 2
CZ63 68P_0402_50V8J@RF@
Deciphered Date
Deciphered Date
Deciphered Date
CZ61ESD@
For ESD solution
2
2017/01/01
2017/01/01
2017/01/01
0.1U_0201_10V6K
1
@
CZ64
2
+5V_ALW +5V_RUN +3.3V_RUN +3.3V_ALW
'()'*+,*-.
68P_0402_50V8J
RF@
1
CZ69
2
Close to JUSH1
+3.3V_RUN +3.3V_ALW+5V_RUN+5V_ALW
0.1U_0201_10V6K
1
1
@
CZ66
2
2
68P_0402_50V8J
RF@
1
1
CZ71
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
1
@
@
CZ68
CZ67
2
68P_0402_50V8J
RF@
68P_0402_50V8J
RF@
1
CZ72
CZ73
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
USH & TPM
USH & TPM
USH & TPM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-E151P
LA-E151P
LA-E151P
Thursday, June 30, 2016
Thursday, June 30, 2016
Thursday, June 30, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
of
39 61
of
39 61
of
39 61
0.2
0.2
0.2
5
4
3
2
1
(03)\3*:b*B3A@C*)GO
'()'*+,*-.
+3.3V_HDD_M2
D D
68P_0402_50V8J
@RF@
1
CN60
2
+3.3V_HDD_M2
0.1U_0201_10V6K
@
CN61
1
2
0.1U_0201_10V6K CN62
1
2
22U_0603_6.3V6M
22U_0603_6.3V6M
CN64
CN63
12
12
Place near HDD CONN
2280 SSD
+3.3V_HDD_M2
M2280_DEVSLP
1 2
RN37@ 10K_0402_5%
PCIE_PRX_DTX_N12<16> PCIE_PRX_DTX_P12<16>
C C
B B
PCIE_PTX_DRX_N12<16> PCIE_PTX_DRX_P12<16>
PCIE_PRX_DTX_N11<16> PCIE_PRX_DTX_P11<16>
PCIE_PTX_DRX_N11<16> PCIE_PTX_DRX_P11<16>
PCIE_PRX_DTX_N10<16> PCIE_PRX_DTX_P10<16>
PCIE_PTX_DRX_N10<16> PCIE_PTX_DRX_P10<16>
PCIE_PRX_DTX_P9<16> PCIE_PRX_DTX_N9<16>
PCIE_PTX_DRX_N9<16> PCIE_PTX_DRX_P9<16>
if signal is PCIE GEN3/SATA GEN3 maybe change C value or no need for DG0.9 SATA EXPRESS HDD
CLK_PCIE_N3<18> CLK_PCIE_P3<18>
M2280_PCIE_SATA#<16>
PCIE_PTX_C_DRX_N12 PCIE_PTX_C_DRX_P12
PCIE_PTX_C_DRX_N11 PCIE_PTX_C_DRX_P11
PCIE_PTX_C_DRX_N10 PCIE_PTX_C_DRX_P10
PCIE_PTX_C_DRX_N9 PCIE_PTX_C_DRX_P9
12
CN65 0.22U_0402_10V6K
12
CN66 0.22U_0402_10V6K
12
CN67 0.22U_0402_10V6K
12
CN68 0.22U_0402_10V6K
12
CN69 0.22U_0402_10V6K
12
CN70 0.22U_0402_10V6K
12
CN71 0.22U_0402_10V6K
12
CN72 0.22U_0402_10V6K
NGFF slot C Key M
JNGFF3
CONN@
1
GND
3
GND
5
PERn3
7
PERp3
9
GND
11
PETn3
13
PETp3
15
GND
17
PERn2
19
PERp2
21
GND
23
PETn2
25
PETp2
27
GND
29
PERn1
31
PERp1
33
GND
35
PETn1
37
PETp1
39
GND
41
PERn0/SATA B+
43
PERp0/SATA B-
45
GND
47
PETn0/SATA A-
49
PETp0/SATA A+
51
GND
53
REFCLKn
55
REFCLKp
57
GND
67
N/C
69
PEDET
71
GND
73
GND
75
GND
77
MTG77
LCN_DAN05-67356-0103
3.3VAUX
3.3VAUX
DAS/DSS#
3.3VAUX
3.3VAUX
3.3VAUX
3.3VAUX
DEVSLP
PERST#
CLKREQ#
PEWake#
SUSCLK
3.3VAUX
3.3VAUX
3.3VAUX
MTG76
2 4 6
N/C
8
N/C
10 12 14 16 18 20
N/C
22
N/C
24
N/C
26
N/C
28
N/C
30
N/C
32
N/C
34
N/C
36
N/C
38 40
N/C
42
N/C
44
N/C
46
N/C
48
N/C
50 52 54 56
N/C
58
N/C
68 70 72 74
76
+3.3V_HDD_M2
NVME_LED#
PCIE_WAKE#
SUSCLK_R
&0%?;_[ 8P03.)#i#MGjc*<0<)'kKK
@
RZ99
1 2
0.01_1206_1% PJP31
1 2
PAD-OPEN1x3m
1 2
RN100 0_0402_5%@
M2280_DEVSLP <20>
PCH_PLTRST#_AND <19,34,35,39>
CLKREQ_PCIE#3 <18> PCIE_WAKE# <35,38>
1 2
RN99 0_0402_5%
2.8A
+3.3V_RUN
SATALED# <16,35,45>
SUSCLK <20,35>
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
M2 2280 Socket
M2 2280 Socket
M2 2280 Socket
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
40 61
40 61
40 61
of
of
of
0.2
0.2
0.2
5
pin 3
TDet_B#
Pericom
GND
TI
GND
D D
Parade
SATA_PTX_DRX_P2<16> SATA_PTX_DRX_N2<16>
SATA_PRX_DTX_N2<16> SATA_PRX_DTX_P2<16>
Pericom PI3EQX6741ST
TI SN75LVCP601 PD
C C
Main
Pericom
2nd
pin
pin 6
13
TDet_A#
NC
GND
DEW2
B_EQ2
REXT
1 2
CN12 0.01UF_0402_25V7K
1 2
CN13 0.01UF_0402_25V7K
1 2
CN14 0.01UF_0402_25V7K
1 2
CN15 0.01UF_0402_25V7K
0 NC 1 1.5dB
0
TI
NC 1
pin16pin
NC
DEW1
DEW
18
TDeT_EN
GND
A_EQ2
HDD_A_EQ
A_EQ
SATA Repeater
DEW2
DEW1
HDD_A_EQ HDD_B_EQ
HDD_A_PRE
SATA_PTX_C_RD_DRX_P2 SATA_PTX_C_RD_DRX_N2
SATA_PRX_C_RD_DTX_N2 SATA_PRX_C_RD_DTX_P2
HDD_B_EQ
PIN17
PIN19
PD
PD
(RN16)
(RN13)
PD
NC
(RN13)
PD
PD
(RN16)
(RN13)
B_EQ B_EM
3dB
6dB 9dB
7dB 0dB
3dB
6dB 9dB
7dB 0dB
14dB 14dB
EQ1EQ2 A_EMB_EQ B_EMA_EQ
(M = VDD/2)
0
3rd
B B
Parade
00 0 M M0 M1 1M 10 11
+3.3V_RUN
12
RN4
@
10K_0402_5%
HDD_EN +5V_HDD_UZ23
12
RN5
A A
10K_0402_5%
2.4dB
M
7.4dB
14.4dB
1
12.2dB
M
9.4dB
13.3dB
6.2dB
11.2dB 5dB
2.4dB
7.4dB
14.4dB
12.2dB
9.4dB
13.3dB
6.2dB
11.2dB 5dB
+5V_HDD source
+5V_ALW
HDD_EN<21>
4
UN7
6
NC
16
3
17
9 7
1 2
4 5
21
PI3EQX6741STZDEX_TQFN20_4X4
HDD_A_EQ2
PIN18
(RN83)
(RN83)
(RN83)
VDD
NC
VDD
TDet_B#
TDet_A#
B_EQ
A_EQ
B_EM
A_EM
TDeT_EN
EN AI+
AO+
AI-
AO-
BO-
BI-
BO+
BI+
GND
HDD_B_EQ2 DEW2 HDD_A_PRE
PD
PD
(RN23)
PD
(RN23)
PD
PDParade PS8527C
(RN23)
A_EM
0dB0
NC 1
1.5dB
0dB
0
-4dB
NC
-2dB
1
0
-3.5dB
M
-1.5dB
1
UZ23
1
VIN
2
VIN
3
ON
4
VBIAS
AOZ1336 _DFN8_2X2
VOUT VOUT
GND GND
7 8
6
CT
5 9
+3.3V_HDD
0.01UF_0402_25V7K
0.1U_0201_10V6K
1
1
CN16
CN17
2
PIN6
NCNC
NC
(IPU)
PD
(RN19)
2
(RN9)
(RN8)
(1/2 VDD)
10 20
HDD_B_EQ2
13 19
HDD_B_PRE
8
HDD_A_EQ2
18
SATA_PTX_RD_DRX_P2
15
SATA_PTX_RD_DRX_N2
14
SATA_PRX_RD_DTX_N2
12
SATA_PRX_RD_DTX_P2
11
DEW1
PIN16PIN13 PIN9 PIN8
NC
(IPU)
NC
(1/2 VDD)
0dB
0dB
-4dB
-2dB
0dB
0dB
-3.5dB
-1.5dB
* red color is current setting
&0%?;_[ 8P03.)#i#MLjc*<0<)'kGQL
@
RZ102
1 2
0.01_1206_1% PJP32
1 2
PAD-OPEN1x1m
1 2
CZ129 0.1U_0201_10V6K
1 2
CZ130 470P_0402_50V7K
3
+3.3V_HDD
@
@
4.7K_0402_5%
4.7K_0402_5%
12
RN6
HDD_A_PRE HDD_B_PRE HDD_A_EQ HDD_B_EQ
DEW2 DEW1
HDD_B_EQ2 HDD_A_EQ2
4.7K_0402_5%
4.7K_0402_5%
RN7
PJP33
1 2
+5V_HDD+5V_RUN
12
HDD_B_PRE
PD
PD
(RN11)
PH
PH
(RN10)
NC
NC
(1/2 VDD)
@
PAD-OPEN1x1m
1.5A
+5V_HDD
4.7K_0402_5%
@
RN8
RN10
1 2
1 2
4.7K_0402_5% RN11
RN9
1 2
1 2
+5V_HDD +3.3V_HDD
4.7K_0402_5%
@
RN12
4.7K_0402_5% RN13
1000P_0402_50V7K
12
4.7K_0402_5%
12
12
@
RN14
7.87K_0402_1%
@
RN15
1 2
1 2
DDR_XDP_WAN_SMBDAT<7,14,15,20> DDR_XDP_WAN_SMBCLK<7,14,15,20>
SATA_PTX_RD_DRX_P2 SATA_PTX_RD_DRX_N2
SATA_PRX_RD_DTX_N2 SATA_PRX_RD_DTX_P2
+3.3V_RUN
0.1U_0201_10V6K
CN8
12
4.7K_0402_5%
@
RN16
4.7K_0402_5%
@
RN17
CN9
12
1 2
12
2
4.7K_0402_5%
4.7K_0402_5%
12
12
@
@
RN20
RN18
4.7K_0402_5%
4.7K_0402_5%
12
12
RN19
RN21
+3.3V_RUN
0.1U_0201_10V6K
10U_0603_10V6M
12
12
CN1
+3.3V_HDD
CN4 0.01UF_0402_25V7K CN5 0.01UF_0402_25V7K
CN6 0.01UF_0402_25V7K CN7 0.01UF_0402_25V7K
PJP34
1 2
PAD-OPEN1x2m
0.1U_0201_10V6K
0.1U_0201_10V6K CN11
@
12
CN10
0.1U_0201_10V6K
12
CN2
+5V_HDD
12 12
12 12
CN3
1 2
RN3@ 10K_0402_5%
+3.3V_HDD
HDD_DEVSLP<20>
HDD_DET#<16>
+3.3V_RUN
100K_0402_5%
12
RN2
6
FFS_INT2
2
1
Free Fall Sensor
LGA1
LNG2DM
10
VDD_IO
9
VDD
3
SDO/SA0
4
SDA/SDI/SDO SCL/SPC1GND
2
CS
LNG2DMTR_LGA12_2X2
HDD_DEVSLP
SATA_PTX_C_DRX_P2 SATA_PTX_C_DRX_N2
SATA_PRX_C_DTX_N2 SATA_PRX_C_DTX_P2
FFS_INT2_Q
DMN65D8LDW-7_SOT363-6
INT 1 INT 2
GND GND
1
+5V_HDD
100K_0402_5%
12
RN1@
FFS_INT2_Q
DMN65D8LDW-7_SOT363-6
34
QN1B
5
QN1A
5 12
11 6
7 8
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
INT1/IN2:Push-Pull,activ e hig h
FFS_INT2
CONN@
JSATA1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9 10 11 12 13 14 15 16 17 18 19 20 G1 G2 G3 G4
ACES_59003-02006-002
HDD_FALL_INT <21> FFS_INT2 <21>
RES
Place near HDD CONN
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
HDD CONN
HDD CONN
HDD CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
41 61
41 61
41 61
of
of
of
0.2
0.2
0.2
5
4
3
2
1
(03)#a')8a)5)&P;3C*3):0/RAB*)D&)
+5V_USB_CHG_PWR
EMI@
150U_B2_6.3VM_R35M
100U_1206_6.3V6M
1
2
1
CI14
2
USB20_N1_R
USB20_P1_R
0.1U_0201_10V6K CI17
3
@
1
CI32
+
2
34
1
223
1
AZC199-02SPR7G_SOT23-3
ESD@
DI5
USB20_N1_R USB20_P1_R
USB3_PRX_DTX_N1 USB3_PRX_DTX_P1
USB3_PTX_C_DRX_N1 USB3_PTX_C_DRX_P1
D D
C C
+5V_ALW
ILIM_S EL
RI13
B B
12
10K_0402_5%
USB3_PRX_DTX_N1<20> USB3_PRX_DTX_P1<20> USB3_PTX_DRX_N1<20> USB3_PTX_DRX_P1<20>
USB20_N1<17> USB20_P1<17>
USB_OC0#<17>
USB_PWR_SHR_VBUS_EN<37>
USB_PWR_SHR_LFT_EN#<37>
+5V_ALW
47U_0603_6.3V6M
47U_0603_6.3V6M
@
@
1
1
CI34
CI33
2
2
12
CI13 0.1U_0402_25V6
12
CI16 0.1U_0402_25V6
+5V_ALW
ILIM_S EL
0.1U_0201_10V6K
10U_0402_6.3V6M
CI19
@
1
1
CI31
2
2
USB3_PRX_DTX_N1 USB3_PRX_DTX_P1 USB3_PTX_C_DRX_N1 USB3_PTX_C_DRX_P1
UI3
1
VIN
2
DM_OUT
3
DP_OUT
13
FAULT#
4
ILIM_SEL
5
EN
6
CTL1
7
CTL2
8
CTL3
SLGC55544CVTR_TQFN16_3X3
Thermal Pad
VOUT
DP_IN DM_IN
ILIM_L
ILIM_HI
GND
NC
1 2 4 5 3
+5V_USB_CHG_PWR
12
SW_USB20_P1
10
SW_USB20_N1
11
15 16
9 14 17
DI4
ESD@
1
2
4
3
8
L05ESDL5V0NA-4_SLP2510P8-10-9
RI14
USB3_PRX_DTX_N1
9
10
USB3_PRX_DTX_P1
8
9
USB3_PTX_C_DRX_N1
7
7
USB3_PTX_C_DRX_P1
6
65
12
22.1K_0402_1%
SW_USB20_N1
SW_USB20_P1
LI7
1 2
EXC24CQ900U_4P
JUSB1
1
VBUS
2
D-
3
D+
4
GND
5
SSRX-
6
SSRX+
7
GND
8
SSTX-
9
SSTX+
J-L_TNBNRAC70030009
CONN@
'()'*+,*-.
+5V_USB_CHG_PWR
12P_0402_50V8J
RF@
1
1
CI43
2
2
10
GND
11
GND
12
GND
13
GND
68P_0402_50V8J
RF@
CI44
Place near UI3.1
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
USB SW
USB SW
USB SW
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
42 61
42 61
42 61
of
of
of
0.2
0.2
0.2
5
4
3
2
1
DI1
USB3_PRX_DTX_N3<20> USB3_PRX_DTX_P3<20> USB3_PTX_DRX_N3<20> USB3_PTX_DRX_P3<20>
D D
C C
USB3_PRX_DTX_N4<20> USB3_PRX_DTX_P4<20>
USB3_PTX_DRX_N4<20>
USB3_PTX_DRX_P4<20>
B B
CI27 0.1U_0402_25V6 CI28 0.1U_0402_25V6
12
CI5 0.1U_0402_25V6
12
CI4 0.1U_0402_25V6
12 12
USB20_P3<17>
USB20_N3<17>
USB3_PRX_DTX_N3
USB20_P2<17>
USB20_N2<17>
USB20_P2
USB20_N2
DFB request: main SM070003Z00 (INPAQ_MCM1012B900F06BP_4P) Footprint use 2nd source SM070004400 (PANAS_EXC24CQ900U_4P) Pitch change from 0.5mm to 0.55mm
USB3_PRX_DTX_N4 USB3_PRX_DTX_N4 USB3_PRX_DTX_P4 USB3_PTX_C_DRX_N4 USB3_PTX_C_DRX_N4 USB3_PTX_C_DRX_P4 USB3_PTX_C_DRX_P4
USB20_P3
USB20_N3
ESD@
1
1
2 4 5 3
DI6
ESD@
1
1
2
2
4
4
5 3
3
8
L05ESDL5V0NA-4_SLP2510P8-10-9
LI4
EMI@
1 2
EXC24CQ900U_4P
10
2
9
7
4
65
3
8
L05ESDL5V0NA-4_SLP2510P8-10-9
LI3
EMI@
1 2
EXC24CQ900U_4P
9
10
8
9
7
7
6
65
34
USB3_PRX_DTX_N3
9
USB3_PRX_DTX_P3USB3_PRX_DTX_P3
8
USB3_PTX_C_DRX_N3USB3_PTX_C_DRX_N3
7
USB3_PTX_C_DRX_P3USB3_PTX_C_DRX_P3
6
USB20_P2_R
34
USB20_N2_R
USB3_PRX_DTX_P4
USB20_P3_R
USB20_N3_R
(03)\3*:b*B3A@C*)GNmGOW8.*;/R0;.)GN
10U_0603_10V6M
@
CI11
1
2
+USB_EX2_PWR
+5V_ALW
10U_0603_10V6M
12
+USB_EX3_PWR
0.1U_0201_10V6K CI12
JUSB2
1
OUT
IN
GND
EN
OCB
+USB_EX3_PWR
1 2 3
VBUS
2
D-
3
D+
4
GND
5
SSRX-
6
SSRX+
7
GND
8
SSTX-
9
SSTX+
J-L_TNBNRAC70030009
CONN@
+USB_EX2_PWR
1 2 3
JUSB3
1
VBUS
2
D-
3
D+
4
GND
5
SSRX-
6
SSRX+
7
GND
8
SSTX-
9
SSTX+
J-L_TNBNRAC70030009
CONN@
USB_OC2# <17>
10
GND
11
GND
12
GND
13
GND
USB_OC1# <17>
10
GND
11
GND
12
GND
13
GND
USB20_N2_R
AZC199-02SPR7G_SOT23-3
223
1
1
223
1
1
USB20_P2_R
USB3_PRX_DTX_N3 USB3_PRX_DTX_P3
USB3_PTX_C_DRX_N3
ESD@
USB3_PTX_C_DRX_P3
DI2
USB20_N3_R USB20_P3_R
USB3_PRX_DTX_N4 USB3_PRX_DTX_P4
USB3_PTX_C_DRX_N4 USB3_PTX_C_DRX_P4
UI2
5
IN
4
EN
SY6288D20AAC_SOT23-5
UI1
5 4
SY6288D20AAC_SOT23-5
OUT GND OCB
0.1U_0201_10V6K
100U_1206_6.3V6M
CI3
1
12
CI1
0.1U_0201_10V6K
@
CI7
1
CI6
2
100U_1206_6.3V6M
12
CI8
USB_PWR_EN2#<37>
3
2
USB_PWR_EN1#<37>
0.1U_0201_10V6K CI10
1
AZC199-02SPR7G_SOT23-3
3
2
ESD@
DI3
'()'*+,*-.
+USB_EX2_PWR
12P_0402_50V8J
1
2
'()'*+,*-.
+USB_EX3_PWR
12P_0402_50V8J
RF@
1
CI47
2
RF@
CI45
1
2
68P_0402_50V8J
1
2
+5V_ALW
68P_0402_50V8J
RF@
CI46
RF@
CI48
12
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
JUSB2&JUSB3
JUSB2&JUSB3
JUSB2&JUSB3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
43 61
43 61
43 61
of
of
of
0.2
0.2
0.2
5
Touch Pad
D D
DAT_TP_SIO_I2C_CLK<37> CLK_TP_SIO_I2C_DAT<37>
C C
I2C1_ SDA_T P<21> I2C1_ SCK_ TP<21>
DL&)(30/)&#f
Plan is for I2C to be driven by the EC for Win7 and Pre-OS (will utilize Intel I2C drivers for Win7) For Win8.1 and 10 the EC will control TP over I2C Pre-OS and then the PCH will drive I2C when in Windows Route PS2 from EC to the touch pad also for contingency plan if I2C has issues
330P_0402_50V8J
12
CZ80
4
+3.3V_TP
4.7K_0402_5%
12
RZ18
#8L
12
RZ22 0_0402_5%@
12
330P_0402_50V8J
12
CZ81
RZ23 0_0402_5%@
12
RZ346 0_0402_5%
12
RZ347 0_0402_5%
DL&)(30/)$&
+3.3V_TP +3.3V_TP
4.7K_0402_5%
4.7K_0402_5%
12
12
RZ20
RZ21
I2C1_ SDA_ TP_R
1 2
RZ26 0_0402_5%
I2C1_ SCK_TP_ R
1 2
RZ29 0_0402_5%
4.7K_0402_5%
12
RZ19
DAT_TP_SIO_R CLK_TP_SIO_R
I2C1_ SDA_ TP_R I2C1_ SCK_TP_ R
10K_0402_5%
12
@
3
+3.3V_RUN +3.3V_TP
PJP35
1 2
PAD-OPEN1x1m
Keyboard
10K_0402_5%
12
@
RZ116
RZ117
KB_DET#<20>
+5V_RUN
+3.3V_ALW
BC_INT#_ECE1117<37>
BC_DAT_ECE1117<37> BC_CLK_ECE1117<37>
+3.3V_TP
TOUCHPAD_INTR#<19,37>
2
KB_DET#
BC_INT#_ECE1117 BC_DAT_ECE1117
BC_CLK_ECE1117
DAT_TP_SIO_R CLK_TP_SIO_R
I2C1_ SDA_ TP_R I2C1_ SCK_TP_ R
+3.3V_TP
1
RF@
68P_0402_50V8J
2
22 21
20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
CZ83
CONN@
JKBTP1
GND GND
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
CVILU_CF5020FD0RK-05-NH
'()'*+,*-.
KB_DET#
BC_INT#_ECE1117
BC_DAT_ECE1117
BC_CLK_ECE1117
DAT_TP_SIO_R
CLK_TP_SIO_R
1 2
CZ84 68P_0402_50V8JRF@
1 2
CZ85 68P_0402_50V8J@RF@
1 2
CZ86 68P_0402_50V8J@RF@
1 2
CZ87 68P_0402_50V8J@RF@
1 2
CZ88 68P_0402_50V8J@RF@
1 2
CZ89 68P_0402_50V8J@RF@
+3.3V_ALW +5V_RUN+3.3V_TP
0.1U_0201_10V6K
0.1U_0201_10V6K
1
1
@
CZ90
2
2
Place close to JKBTP1
1
0.1U_0201_10V6K
1
@
@
CZ91
CZ92
2
B B
RSMRST circuit
+3.3V_ALW
CZ82
@
1 2
0.1U_0201_10V6K
5
1
PCH_RSMRST#<37>
ALW_PWRGD_3V_5V<49>
A A
5
B
2
A
3
P
4
O
G
UZ6
TC7SH08FU_SSOP5~D
PCH_RSMRST#_AND <7,20>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Keyboard
Keyboard
Keyboard
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
44 61
44 61
44 61
of
of
of
0.2
0.2
0.2
5
4
3
2
1
SATA_LED_EN<38>
HDD LED MUX
5
34
QZ2B
@
DMN65D8LDW-7_SOT363-6
+3.3V_ALW
2
61
QZ2A
@
DMN65D8LDW-7_SOT363-6
BAT2_LED#_R
BAT2_LED#_R
2
R2
R1
1 3
BATT_WHITE#
R1=47k/R2=10k
QZ3
@
DDTA144VCA-7-F_SOT23-3
1 2
RZ25 150_0402_5%@
means EC can switch battery white led and HDD LED by hot key “Fn+H”
D D
SATALED#<16,35,40>
BAT2_LED#<37,45>
Battery LED
BAT2_LED#<37,45>
BAT1_LED#<37>
1 2
RZ361 150_0402_5%
1 2
RZ28 330_0402_5%
BATT_WHITE#
BATT_YELLOW#
LED P/N change to SC50000FL00 from SC50000BA00
Breath LED
C C
BREATH_LED#<37>
+3.3V_ALW
CZ93
@
1 2
0.1U_0201_10V6K
5
1
SYS_LED_MASK#<33,37>
LID_CL#<38,45>
B
2
A
3
P
MASK_BASE_LEDS#
4
O
G
UZ10
TC7SH 08FU_ SSOP5 ~D
POWER & INSTANT ON SWITCH
SW3
1
POWER_SW#_MB<21,38>
B B
2
4
SKRBAAE010_4P
3
QZ7B
DMN65D8LDW-7_SOT363-6
34
5
MASK_BASE_LEDS#
BREATH_LED#_Q BREATH_WHITE_LED_SNIFF#
1 2
RZ32 330_0402_5%
BATT_YELLOW# BATT_WHITE#
LID_CL#<38,45>
+3.3V_ALW
LTW-C193DC-C_WHITE
Place LED3 close to SW3
LED board CONN
+5V_ALW
LED3
21
JLED1
CONN@
GND2 GND1
6
6
5
5
4
4
3
3
2
2
1
1
CVILU_CF5006FD0R0-05-NH
+5V_ALW
8 7
Fiducial Mark
FD1@
1
FIDUCIAL MARK~D
FD2@
1
FIDUCIAL MARK~D
FD3@
1
FIDUCIAL MARK~D
FD4@
1
FIDUCIAL MARK~D
A A
5
Mask All LEDs (Unobtrusive mode) Mask Base MB LEDs (Lid Closed) Do not Mask LEDs (Lid Opened) 11
H1@
H2@
1
H34@
H_3P2
1
H3@
H_3P8
H_3P8
1
For JAE JSIM1 boss hole
H35@
1
1
H_0P7N
H_3P8
eDP Standoff
H_3P2
LED Circuit Control Table
CPU
H4@
H5@
H_3P8
H_1P0N
1
1
H42@
H43@
H_0P9N
1
1
SYS_LED_MASK# LID_CL#
0 10
NGFF Standoff
H_1P0N
H6@
H_3P2
1
H44@
H_1P0N
H9@
H8@
H7@
H_2P6
H_3P2
1
1
1
PCH
H45@
H49@
H_1P0N
H_3P2N
1
1
1
4
H10@
H_2P6
1
H_2P4x1P8N
X
H21@
H22@
H11@
H12@
H_3P8
H_2P4
H_2P4N
1
1
H46@
1
H16@
H13@
H14@
H_3P8
H_2P4
1
1
H17@
H18@
H_3P8
H_2P4
1
1
1
H19@
H_5P0x4P0N
1
H20@
H_5P0x4P0N
1
3
H_2P4
H23@
H_5P1
H_3P8
1
1
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
PAD, LED
PAD, LED
PAD, LED
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
of
of
of
45 61
45 61
45 61
0.2
0.2
0.2
5
4
3
2
1
+3.3V_WWAN/+3.3V_LAN source
PJP41
+3.3V_ALW
D D
3.3V_WWAN_EN<37>
3.3V_WWAN_EN
1 2
RZ40 100K_0402_5%
3.3V_WWAN_EN
+5V_ALW
SIO_SLP_LAN#<20,37>
UZ2
1
VIN1
VOUT1
2
VIN1
VOUT1
3
ON1
4
VBIAS
5
ON2
6
VIN2
VOUT2
VIN27VOUT2
GPAD
EM5209VF_SON14_2X3
GND
+3.3V_WWAN_UZ2
14 13
12
CT1
11 10
CT2
9
+3.3V_LAN_UZ2
8 15
1 2
PAD-OPEN1x3m
CZ119 0.1U_0201_10V6K
CZ109 470P_0402_50V7K
CZ110 470P_0402_50V7K
CZ111 0.1U_0201_10V6K
PJP37
1 2
PAD-OPEN1x1m
1 2
1 2
1 2
1 2
+3.3V_LAN
1A
+3.3V_WWAN
2.5A
+3.3V_WWAN_UZ2
1
RF@
2200P_0402_50V7K
2
'()'*+,*-.
CZ124
+1.8V_RUN source
RUN_ON<11,37,38,46,52>
1 2
RZ345 0_0402_5%
Reserve R/C for Audio power sequence, +5V->+3.3V->+1.8V
+5V_ALW
12
CZ197
@
470P_0402_50V7K
+1.8V_PRIM
RUN_ON_1.8V
UZ8
1
VOUT
VIN
2
VOUT
VIN
3
ON
4
VBIAS
AOZ1336 _DFN8_2X2
GND GND
CT
7 8
6
5 9
+1.8V_RUN_UZ8
0.025A
PJP42
1 2
PAD-OPEN1x1m
1 2
CZ120 0.1U_0201_10V6K
1 2
CZ121 470P_0402_50V7K
+1.8V_RUN
+3.3V_ALW_PCH/+3.3V_RUN source
1.102A
PJP38
1 2
C C
1 2
PCH_ALW_ON<37>
SIO_SLP_SUS#<11,20,37,51,53>
RZ65 0_0402_5%@
1 2
RZ64 0_0402_5%
+5V_ALW
RUN_ON
+3.3V_ALW
UZ3
1
VIN1
2
VIN1
3
ON1
4
VBIAS
5
ON2
6
VIN2 VIN27VOUT2
EM5209VF_SON14_2X3
VOUT1 VOUT1
GND
VOUT2
GPAD
CT1
CT2
+3.3V_ALW_PCH_UZ3
14 13
12 11 10 9
+3.3V_RUN_UZ3
8 15
PAD-OPEN1x1m
CZ112 0.1U_0201_10V6K
CZ113 470P_0402_50V7K
CZ114 1000P_0402_50V7K
CZ115 0.1U_0201_10V6K
1 2
PAD-OPEN1x3m
1 2
1 2
1 2
1 2
PJP39
+3.3V_ALW_PCH
+3.3V_RUN
4.677A
+5V_RUN/+3.3V_WLAN source
B B
3.076A
PJP40
+5V_ALW
RUN_ON<11,37,38,46,52> SIO_SLP_WLAN#<20,37> AUX_EN_ WOW L<37>
1 2
RZ38 100K_0402_5%
A A
1 2
RZ71 0_0402_5%@
1 2
RZ70 0_0402_5%
+3.3V_ALW
AUX_EN_ WOW L
5
UZ4
1
VIN1
VOUT1
2
VIN1
VOUT1
3
ON1
4
VBIAS
5
ON2
6
VIN2
VOUT2
VIN27VOUT2
EM5209VF_SON14_2X3
GPAD
GND
CT1
CT2
14 13
12 11 10
+3.3V_WLAN_UZ4
9 8
15
+5V_RUN_UZ4
1 2
1 2
CZ116 0.1U_0201_10V6K
1 2
CZ117 470P_0402_50V7K
1 2
CZ118 470P_0402_50V7K
1 2
CZ122 0.1U_0201_10V6K
1 2
PAD-OPEN1x2m
@
1 2
0.01_1206_1%
&0%?;_[ 8P03.)#i#Mejc*<0<)'kKe
4
PAD-OPEN1x2m
PJP36
RZ96
+5V_RUN
+3.3V_WLAN
2A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Power control
Power control
Power control
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
46 61
46 61
46 61
of
of
of
0.2
0.2
0.2
5
Timing Diagram for S5 to S0 mode
D D
5
C C
VCCST_PWRGD
12
H_CPUPWRGD
15
PCH_PLTRST#
17
0.675V_DDR_VTT_ON
12
+1.0V_PRIM_CORE
+1.8V_PRIM
5
CPU
VCCST_PWRGD
PROCPWRGD
PLTRST#
DDR_VTT_CNTL
+PWR_SRC
TLV62130
+3.3V_ALW
TLV62130
VCCIO
VCCGT
VDDQ VDDQC VCCPLL_OC
VCCST VCCSTG VCCPLL
VCCSA
SIO_SLP_SUS#
4
+1.0V_PRIM SYX198
+VCC_CORE
VCC
+1.0VS_VCCIO
+VCC_GT
+1.35V_MEM
+1.0V_VCCST
+VCC_SA
3
+1.0V_PRIM
TPS22961
3
6
+3.3V_ALW
+3.3V_SPI
+1.0V_MPHYGT
+3.3V_ALW_DSW
+3.3V_ALW_PCH
5
5
+1.8V_PRIM
+PWR_SRC
6
+RTC_CELL
+1.0V_PRIM_CORE
10
+1.0V_PRIM
TPS22961
SIO_SLP_S4#
5
17
4
+3.3V_ALW
+LCDVDD
11
+5V_TSP
AP2821K
+3.3V_ALW
EM5209VF+3.3V_LAN
+5V_RUN
LP2301ALT1G
+3.3V_RUN
LP2301ALT1G+3.3V_CAM
EXT_PWR_GATE#
PCH_PLTRST#
PCH_DPWROK
ENVDD_PCH
SIO_SLP_LAN#
3.3V_TS_EN
3.3V_CAM_EN#
VCCPRIM_1P0 VCCPRIM_CORE DCPDSW_1P0 VCCMPHYAON_1P0 VCCAPLL_1P0 VCCCLK1~6 VCCMPHYGT_1P0 VCCSRAM_1P0 VCCAMPHYPLL_1P0 VCCAPLLEBB
EXT_PWR_GATE#
VCCDSW_3P3
VCCHDA VCCSPI VCCPRIM_3P3 VCCPGPPA~E VCCRTCPRIM
VCCPGPPG VCCATS
VCCRTC
VCCPRIM_CORE
PLTRST#
DSW_PWROK
EDP_VDDEN
SLP_LAN#
GPP_B21
GPD7
PCH
PWRBTN#
RSMRST#
SLP_SUS#
SLP_S5#
SLP_S4#
SLP_S3#
SLP_LAN#
SLP_WLAN#/GPD9
SYS_PWROK
PCH_PWROK
VCCST_PWRGD
PROCPWRGD
SLP_A#
2
SIO_PWRBTN#
PCH_RSMRST#
SIO_SLP_SUS#
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_A#
SIO_SLP_LAN#
SIO_SLP_WLAN#
RESET_OUT#
PCH_PWROK
VCCST_PWRGD
H_CPUPWRGD
15
11
16 14 12
10
1
8
7
5
9
Power Button
SIO_SLP_WLAN#
SIO 5048
11
11
RUN_ON
+5V_ALW
EM5209VF
+5V_RUN
+5V_HDD
+3.3V_ALW
+3.3V_RUN
EM5209VF
B B
@SIO_SLP_WLAN#
+3.3V_ALW
+3.3V_WLAN EM5209VF
11
A A
AUX_EN_WOWL
+PWR_SRC
TLV62130
+3.3V_HDD
+3.3V_RUN
APL5930 +1.5V_RUN
+1.0VS_VCCIO
+VCC_CORE
13
BC BUS
11
+VCC_SA
+VCC_GT
10
+PWR_SRC
ISL95857
PCH_PWROK
14
ADAPTER
BATTERY
7 4
16
5
9
11
PCH_RSMRST#
PCH_DPWROK
RESET_OUT#
SIO_SLP_SUS#
SIO_SLP_S4#
SIO_SLP_S5#
SIO_SLP_LAN#
SIO_SLP_S3#
SIO_SLP_A#
12
IMVP_VR_ ON
2AC1BAT
ALWON
SIO_SLP_SUS#
@PCH_ALW_ON
SUS_ON
EN_INVPWR
0.675V_DDR_VTT_ON
11
A_ON
10
10
SUS_ON
+PWR_SRC
+PWR_SRC
5
SYX198EC 5085
SYX198
+3.3V_ALW
EM5209VF
+3.3V_ALW
+3.3V_ALW
EM5209VF
+PWR_SRC
AO6405
+PWR_SRC
RT8207MZ
+5V_ALW2 +5V_ALW
+3.3V_RTC_LDO +3.3V_ALW2 +3.3V_ALW
+3.3V_ALW_PCH
+3.3V_MEM5209VF
+3.3V_SUS
+BL_PWR_SRC
+1.35V_MEM +0.675V_DDR_VTT
12
1BAT
2AC
5
Pop option
+3.3V_SPI
18
VDDQ VTT
DDR
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS S HEET OF ENGINEERI NG DRAW ING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS S HEET OF ENGINEERI NG DRAW ING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS S HEET OF ENGINEERI NG DRAW ING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO R IZED BY COMPAL ELECTR O N ICS, INC. NEITHER THIS SHEET NOR TH E INFOR M AT ION IT CONT AINS
DEPARTMENT EXCEPT AS AUTHO R IZED BY COMPAL ELECTR O N ICS, INC. NEITHER THIS SHEET NOR TH E INFOR M AT ION IT CONT AINS
DEPARTMENT EXCEPT AS AUTHO R IZED BY COMPAL ELECTR O N ICS, INC. NEITHER THIS SHEET NOR TH E INFOR M AT ION IT CONT AINS MAY BE USED BY OR DISCLOS ED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
MAY BE USED BY OR DISCLOS ED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
5
4
MAY BE USED BY OR DISCLOS ED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Power Sequence
Power Sequence
Power Sequence
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
LA-E151P
LA-E151P
LA-E151P
Tuesday , J une 2 8, 20 16
Tuesday , J une 2 8, 20 16
Tuesday , J une 2 8, 20 16
Date: Sheet
Date: Sheet
Date: Sheet
47 61
47 61
47 61
of
of
1
of
0.2
0.2
0.2
5
4
3
2
1
+COINCELL
COIN RTC Battery
12
PR2
PD3
PQ1B
3
PBAT_PRES# <37,57>PBAT_CHARGER_SMBCLK <37,57>
12
PR17 100K_0402_5%
34
+Z4012
2
1
PS_ID <37>
5
1K_0402_5%
PR25
0_0402_5%
2017/01/01
2017/01/01
2017/01/01
+COINCELL
+RTC_CELL
1
PC3 1U_0603_25V6K
2
12
+3.3V_RTC_LDO
D D
1
PD1
EMC@
TVNST52302AB0_SOT523-3
2
Primary Battery Connector
PBATT1
@
1
1
2
2
3
3
4
4
5
5
12
PC1
EMC@
2200P_0402_50V7K
C C
6
6
7
7
8
8
9
9
10
10
11
GND
12
GND
DEREN_40-42251-01001RHF
PBAT_SMBCLK_C PBAT_SMBDAT_C PBAT_PRES#_C
GND
NB_PSID PS_ID
2
3
1
PRP1
100_0804_8P4R_5%
EMC@
BLM15AG102SN1D_2P
PD4
EMC@
PESD5V0U2BT_SOT23-3
+DC_IN
PL4
EMC@
FBMJ4516HS720NT_2P
1 2
B B
PJPDC1
@
7
GND
6
GND
-DCIN_JACK-DCIN_JACK
5
5
4
4
+DCIN_JACK
3
3
2
2
1
1
CVILU_CI0805M1HRC-NH
PR26
0_0402_5%
1 2
DCIN2_EN<38>
A A
PR28
+3.3V_ALW
5
PC7 can't over 1000P
12
PC5
EMC@
1000P_0603_50V7K
12
100K_0402_5%
12
PC7
0.1U_0603_25V7K
@EMC@
ACAV_IN_NB<37,57,59>
PQ8
DMN65D8LW-7_SOT323-3
D
S
13
G
2
PR29
0_0402_5%
1 2
12
PR13
4.7K_0805_5%
@
0.1U_0402_10V7K
PR21
0_0402_5%
1 2 1 2
12
PR27
100K_0402_5%
+3.3V_VDD_DCIN
PC9
PR22 0_0402_5%
PC6
0.022U_0603_50V7K
+3.3V_VDD_DCIN
12
PU1
5
TC7SH08FU_SSOP5~D
1
P
B
4
O
2
A
G
3
1 2
0_0402_5%
4
3
18 27 36 45
PL3
12
DC_IN+ Source
S1 S2
PQ9
AON7409_DFN8-5
1 2 3 5
4
12
PR12
499K_0402_1%
12
13
PR23
D
12
2
G
S
PR18
49.9K_0402_1%
PQ6
DMN65D8LW-7_SOT323-3
2
100K_0402_1%
15K_0402_1%
12
PR14
1
PD2
EMC@
TVNST52302AB0_SOT523-3
3
PBAT_CHARGER_SMBDAT <37,57>
PR6
1 2
PR8
1 2
+DC_IN_SS
12
PC8
100K_0402_5%
10U_0805_25V6K
PBATT+_C
@
1 2
0_0402_5%
1 3
2
B
PR3
D
E
FBMJ4516HS720NT_2P
S
PQ2 FDV301N-G_SOT23-3
G
2
C
PQ3 MMST3904-7-F_SOT323~D
3 1
PD5
PDS5100H-13_POWERDI5-3~D
2 3
PQ4 AON7409_DFN8-5
PQ7
DMN65D8LW-7_SOT323-3
3
PL1
EMC@
1 2
PL2
EMC@
FBMJ4516HS720NT_2P
1 2
+PBATT
+3.3V_ALW
12
PR1 100K_0402_5%
BAS40CW SOT-323
+3.3V_ALW
PR4
PR5
33_0402_5%
1 2
2.2K_0402_5%
1 2
+5V_ALW
12
PR7 10K_0402_1%
1
+SDC_IN
1 2 35
12
PC4
12
PR11
4
499K_0402_1%
12
PR16
49.9K_0402_1%
13
D
PR20
2
1 2
G
0_0402_5%
S
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET I NFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRON ICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRON ICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRON ICS, INC.
12
PR24
100K_0402_5%
+SDC_IN
12
PR10 100K_0402_5%
PQ5
S
G
2
12
D
1 3
0.022U_0603_50V7K
AO3409 P-CHANNEL SOT-23
61
PQ1A
DMN65D8LDW-7_SOT363-6
2016/01/01
2016/01/01
2016/01/01
PR15 100K_0402_5%
2
PR19
0_0402_5%
VBUS2_ECOK <38,59>
Compal Secret Data
Compal Secret Data
Compal Secret Data
+3.3V_VDD_DCIN
12
DMN65D8LDW-7_SOT363-6
Deciphered Date
Deciphered Date
Deciphered Date
2
12
PC2
JRTC1
@
EMC@
2200P_0402_50V7K
1
3
1
G
4
22G
ACES_50271-0020N-001
+3.3V_VDD_DCIN
12
PC10
2.2U_0402_10V6M
AC_DISC# <37,59>
PU2
VIN
3
VOUT
GND
AP2204RA-3.3TRG1_SOT89-3
+DC_IN
2
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
+DCIN
+DCIN
+DCIN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
1U_0603_50V6K
1
PC11
2
48 61
48 61
48 61
of
of
of
0.2
0.2
0.2
A
1 1
+PWR_SRC
PJP100
21
PAD-OPEN 1x2m~D
@
PC100
0.1U_0402_25V6
@EMC@
2 2
+3.3V_ALW
12
PC103
2200P_0402_50V7K
@EMC@
PR107 100K_0402_5%
1 2
PGOOD_3V
12
3V_VIN
PC105
12
PC104
10U_0805_25V6K
10U_0805_25V6K
B
BST_3V
2
5
12
LX_3V
3V5V_EN
PU100
6
LX
7
GND
8
SY8288BRAC_QFN20_3X3
GND
9
PG
10
NC
11
ENLDO_3V5V
EN112EN2
IN3IN4IN
FF13OUT14NC
3V_FB
1
IN
BS
20
LX
19
LX
18
GND
17
LDO
16
NC
21
GND
15
PC113 1000P_0402_50V7K
1 2
12
PC111
4.7U_0603_6.3V6K
PR108
1K_0402_5%
1 2
1 2
1 2
C
PGOOD_3V PGOOD_5V
PR100
1 2
0_0603_5%
LX_3V
PR104
PR105
0_0402_5%
0_0402_5%
PR119
1 2 1 2
PR120
0_0402_5%
PC102
1 2
0.1U_0603_25V7K
+3.3V_ALW2
+3.3V_RTC_LDO
3.3V LDO 150mA~300mA
0_0402_5%
PR106
4.7_1206_5%
@EMC@
3V_SN
PC112
680P_0603_50V7K
@EMC@
12
12
ALW_PWRGD_3V_5V <44>
ENLDO_3V5V
PL100
1.5UH_9A_20%_7X7X3_M
1 2
D
PR102 499K_0402_1%
1 2
12
PR103
Update PH401 change to Common Part
499K_0402_1%
SH000016700 20160616 7*7*3
12
12
12
PC107
PC106
22U_0805_6.3V6M
PC108
22U_0805_6.3V6M
22U_0805_6.3V6M
12
Vout is 3.234V~3.366V
+3.3V_ALWP +3.3V_ALW
+PWR_SRC
12
12
PC109
PC110
22U_0805_6.3V6M
22U_0805_6.3V6M
PC129
@
22U_0805_6.3V6M
+3.3V_ALWP
PJP102
112
JUMP_43X118
@
E
3VALWP TDC 5.9 A Peak Current 8.4 A OCP Current 10.1 A
2
+PWR_SRC
PJP101
21
PAD-OPEN 1x2m~D
@
3 3
PR114
ALWON<37>
4 4
1 2
0_0402_5%
12
A
5V_VIN
12
12
PC115
0.1U_0402_25V6
@EMC@
PR116
1M_0402_1%
12
PC116
2200P_0402_50V7K
@EMC@
+3.3V_ALW
3V5V_EN
12
PC128
4.7U_0402_6.3V6M
PC117
10U_0805_25V6K
12
PC118
10U_0805_25V6K
PR113 100K_0402_5%
1 2
PGOOD_5V
EN1 and EN2 dont't floating
LX_5V
B
5
PU102
6
LX
7
GND
8
SY8288CRAC_QFN20_3X3
GND
9
PG
10
NC
11
ENLDO_3V5V
3V5V_EN
EN112EN2
IN3IN4IN
FF13OUT14LDO
BST_5V
1
2
IN
BS
20
LX
19
LX
18
GND
17
VCC
16
NC
21
GND
15
+5V_ALW2
5V LDO 150mA~300mA
12
PC126
4.7U_0603_6.3V6K
PC127 1000P_0402_50V7K
5V_FB
PR111
1 2
0_0603_5%
LX_5V
PC119
1 2
4.7U_0603_6.3V6K
PR117
1K_0402_5%
1 2
1 2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PC114
1 2
0.1U_0603_25V7K
C
12
PR112
@EMC@
5V_SN
12
PC125
@EMC@
2016/01/01
2016/01/01
2016/01/01
PL101
2.2UH +-20% 7.8A 7X7X3 MOLDING
1 2
4.7_1206_5%
680P_0603_50V7K
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
12
PC120
2017/01/01
2017/01/01
2017/01/01
12
22U_0805_6.3V6M
12
PC121
22U_0805_6.3V6M
5VALWP TDC 5.4 A Peak Current 7.7 A OCP Current 9.2 A
12
12
PC122
PC123
22U_0805_6.3V6M
22U_0805_6.3V6M
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
+5V_ALW/3.3V_ALW
+5V_ALW/3.3V_ALW
+5V_ALW/3.3V_ALW
LA-E151P
LA-E151P
LA-E151P
PJP103
112
JUMP_43X118
@
12
PC124
PC130
@
22U_0805_6.3V6M
22U_0805_6.3V6M
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
2
+5V_ALWP
+5V_ALW+5V_ALWP
0.2
0.2
0.2
of
49 61
of
49 61
of
49 61
E
5
D D
4
3
2
1
+PWR_SRC
C C
The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high +1.2V_DDR OCP set 8A
B B
PJP202
PAD-OPEN 1x2m~D
@
21
12
PC200
10U_0805_25V6K
+3.3V_ALW
1 2
1 2
0.6V_DDR_VTT_ON<14>
12
PC201
@
PR205 0_0402_5%
ILMT_DDR
@
PR207 0_0402_5%
@EMC@
PC203
+1.2V_DDR_B+
PR208 0_0402_5%
PR210 0_0402_5%
+3.3V_ALW
1U_0402_6.3V6K
12
12
PR209
1M_0402_5%
12
PC206
2.2U_0402_6.3V6M
12
PC207
ILMT_DDR
EN_1.2V
EN_0.6V
@
12
12
PC221
0.1U_0402_10V7K
1M_0402_5%
PR212
12
12
0.1U_0402_25V6
2200P_0402_50V7K
12
12
@EMC@
PC202
10U_0805_25V6K
SIO_SLP_S4#<11,20,21,37,53>
PU200
10
IN
13
BYP
14
VCC
4
VTTGND
9
PGND
15
SGND
17
ILMT
1
S5
2
S3
SY8210AQVC_QFN19_4X3
0.1U_0402_10V7K
@
PC222
19
OT
18
PG
BS
LX
FB
VDDQSNS
VLDOIN
VTT VTTSNS VTTREF
Mode S3 S5 VOUT VTT Normal H H on on Stadby L H on off Shutdown L L off off
PR203
1 2
12
0_0603_5%
11 16 8 7 6 5 3
LX_DDR
+1.2V_DDRP
PC205
1 2
0.1U_0603_16V7K
PC218
1U_0402_10V6K
12
1UH_11A_20%_7X7X3_M
22U_0603_6.3V6M
22U_0603_6.3V6M
12
PC219
@EMC@
PR202
4.7_1206_5%
1 2
1 2
PC209
1 2
+0.6VSP
@EMC@
PC204
680P_0603_50V7K
1 2
PL201
330P_0402_50V7K
PC208
12
R1
R2
PJP200@
JUMP_43X118
112
+1.2V_DDR TDC 5.2A Peak Current 7.4A OCP Current 8.8A
12
12
2
102K_0402_1%
PR204
100K_0402_1%
PR206
+1.2V_DDRP
22U_0603_6.3V6M
22U_0603_6.3V6M
PC212
PC211
PC210
12
12
12
10U_0603_6.3V6M
PC213
PC223
12
12
JUMP_43X39
12
@
10U_0603_6.3V6M
PJP201
112
2200P_0402_50V7K
PC214
12
100P_0402_50V8J
@EMC@
@EMC@
PC217
PC216
12
+0.6V_DDR_VTT+0.6VSP+1.2V_MEM+1.2V_DDRP
2
22U_0603_6.3V6M
22U_0603_6.3V6M
0.6Volt +/- 5% TDC 0.007A Peak Current 0.01A OCP Current 2A (fix)
Note: S3 - sleep ; S5 - power off
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
+1.2V_MEN/+0.6V_DDR_VTT
+1.2V_MEN/+0.6V_DDR_VTT
+1.2V_MEN/+0.6V_DDR_VTT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
50 61
50 61
50 61
of
of
of
0.2
0.2
0.2
5
D D
PL302
@EMC@
FBMA-L11-201209-121LMA50T_0805
+PWR_SRC
C C
1 2
PJP301
@
PAD-OPEN 1x2m~D
21
12
12
PC303
PC301
0.1U_0402_25V6 2200P_0402_50V7K
@EMC@
@EMC@
+3.3V_ALW
12
PR307
@
0_0402_5%
ILMT_+1VALW P
12
PR310
@
0_0402_5%
+1.0V_PRIM
10U_0805_25V6K
12
PC305
4
+1VALWP_B+
12
PC306
10U_0805_25V6K
ILMT_+1VALW P
PU301
8
IN
EN
GND
ILMT PG
BS
LX
FB BYP LDO
9
3 2
SYX198DQNC_QFN10_3X3
1
BST_+1VALWP
6 10
4 7 5
12
3
EN_+1VALWP
0.1U_0603_25V7K
SW_+1VALW P
12
PC313
4.7U_0603_6.3V6K
PC304
1 2
PC312
4.7U_0603_6.3V6K
BST_+1VALWP_C
+3.3V_ALW
12
PR304
0_0603_5%
1 2
PR312
1 2
0_0402_5%
1M_0402_1% PR302
PR303
@EMC@
4.7_1206_5%
1 2
PL301
0.68UH_MMD-05CZ-R68M-X2L_8.5A_20%
1 2
FB_+1VALWP
2
@EMC@
SNB_+1VALWP
12
PR306
21.5K_0402_1%
12
PR311
31.6K_0402_1%
SIO_SLP_SUS# <11,20,37,46,53>
+1VALWP
PC302
680P_0603_50V7K
1 2
12
12
PC307
12
PR308
1K_0402_5%
PC308
22U_0805_6.3VAM
330P_0402_50V7K
1
PJP302
2
112
JUMP_43X118
@
+1.0V_PRIM
+1VALWP
12
12
12
PC309
PC310
PC311
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
TDC 5.2 A Peak Current 7.4 A
B B
OCP Current 8.9 A TYP MAX Choke DCR 11.0mohm , 12.0mohm
The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
+1VALWP
+1VALWP
+1VALWP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
51 61
51 61
51 61
of
of
of
0.2
0.2
0.2
5
4
3
2
1
D D
PR425
PR403
1M_0402_1%
1 2
0_0402_5%
12
SIO_SLP_S0#<11,20,21,39>
PR402
RUN_ON<11,37,38,46>
1 2
0_0402_5%
Vin=3~17V
+5V_ALW
12
PR417
10K_0402_1%
12
PR419
@
10K_0402_1%
+3.3V_ALW
12
PR418
@
10K_0402_1%
VID0_VCCIO VID1_VCCIO
12
PR420
10K_0402_1%
C C
B B
PJP402
PAD-OPEN 1x2m~D
@
21
12
PC404
10U_0603_10V6M
12
12
PC407
PC405
0.1U_0402_25V6
2200P_0402_50V7K
@EMC@
@EMC@
VIN_1VS_VCCIO
12
PC408
10U_0603_10V6M
VID0_VCCIO
VID1_VCCIO
Preset the different pull down resistor to choose the required power rail
(VCCIO/PCH/EDRAM/EOPIO applications.) RMODE>500k or floating Vcc_PRIM_CORE. RMODE=200k Vcc_IO. RMODE=0 Vcc_EDRAM.
12
PC415
@
0.1U_0402_25V6 PU401
12
PVIN
11
PVIN
10
AVIN
9
VID0
1 2
+3.3V_ALW
12
PR405 0_0402_5%
EN_1VS_VCCIO
15
14
13
EN
LPM
S IC SY8057QDC QFN 16P PWM
VID1
8
7
SS_1VS_VCCIO
12
PR427 200K_0402_1%
PC409
@
@
PJP401
2
+1VS_VCCIOP
12
PR414
100_0402_1%
12
112
JUMP_43X118
@
PR415
12
0_0402_5%
12
PC410
22U_0603_6.3V6M
VCC_IO_SENSE <11>
VSS_IO_SENSE <11>
+1.0VS_VCCIO TDC 3.9A Peak Current 5.5 A OCP Current 6.6 A Fix by IC
+1VS_VCCIOP
12
12
PC411
12
PC412
PC401
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
SY8057 1 0
TYP MAX
LPM LOGIC OUTPUT VOLTAGE
VID1 LOGIC
0
1
1
1
VID0 LOGIC
X
0
1
1
X
0
1
0
1 0.975
0(LPM)
0.85
0.875
0.95
+1VS_VCCIOP +1.0VS_VCCIO
17
TP
PGND16PGND
1
VOS
2
SW
3
SW
4
PG
FBS5AGND6SS
470P_0402_50V7K
LX_1VS_VCCIO
+1VS_VCCIOP
PL401
1UH_PCMB042T-1R0MS_4.5A_20%
1 2
12
PR404
@EMC@
4.7_0603_5%
SNUB_1VS_VCCIO
12
PC403
@EMC@
470P_0402_50V7K
PR416
0_0402_5%
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET I NFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRON ICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRON ICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRON ICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
+1VS_VCCIO
+1VS_VCCIO
+1VS_VCCIO
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
52 61
52 61
52 61
of
of
of
0.2
0.2
0.2
5
D D
SIO_SLP_SUS#<11,20,37,46,51>
C C
4
PC502
22U_0603_6.3V6M
1 2
PJP501
+3.3V_ALW
1 2
PAD-OPEN1x1m
@
+3.3V_ALW
1.8V_PRIM_PWRGD<37>
PR504
1 2
0_0402_5%
Note: When design Vin=5V, please stuff snubber to prevent Vin damage
PR505
1M_0402_1%
12
PR517
12
100K_0402_5%
12
VIN_1.8VALW
EN_1.8VALW
PC505
@
0.1U_0402_16V7K
4 5
PU501
IN
LX
PG
GND
FB6EN
RT8097ALGE_SOT23-6
3 2 1
3
LX_1.8VALW
PL501
1 2
20K_0402_1%
FB_1.8VALW
10K_0402_1%
1 2
PAD-OPEN1x1m
@
PR501
PR506
+1.8VALWP
Imax= 2A, Ipeak= 3A FB=0.6V
1UH_1277AS-H-1R0N-P2_3.3A_30%
12
PR502
@EMC@
4.7_0603_5%
SNUB_1.8VALW
12
PC506
@EMC@
680P_0402_50V7K
Vout=0.6V* (1+Rup/Rdown)
PJP502
12
Rup
12
Rdown
PC503
12
68P_0402_50V8J
2
+1.8V_PRIM
12
12
PC501
PC504
22U_0603_6.3V6M
22U_0603_6.3V6M
+1.8V_PRIM TDC 0.896 A Peak Current 1.25 A OCP Current 3.5A fix by IC
1
+1.8VALWP
B B
+2.5V_MEM TDC 0.3A by power budget AP7361 U-DFN3030-8 Pd limit=1.7W Peak loading=1.1A. Pd=(3.3-2.5)*1.1=0.88W < 1.7W OCP is 1.1~1.5A
PJP505
+3.3V_ALW
SIO_SLP_S4#<11,20,21,37,50>
A A
5
1 2
PAD-OPEN1x1m
@
4
PR513
1 2
0_0402_5%
1M_0402_1%
PR514
+2.5V_VIN
12
PC514
4.7U_0603_6.3V6K
12
EN_2.5V
12
@
.1U_0402_16V7K
AP7361C-FGE-7_U-DFN3030-8_3X3
9 8 7 6 5
PC513
PU503
GND IN NC NC EN
ADJ/NC
GND
PJP506
1
OUT
2
NC
3 4
3
PR515
21.5K_0402_1%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET I NFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRON ICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRON ICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRON ICS, INC.
12
12
PR516
10.2K_0402_1%
2.5VSP
12
PC515
0.01UF_0402_25V7K
2016/01/01
2016/01/01
2016/01/01
1 2
PAD-OPEN1x1m
@
12
PC516
22U_0603_6.3V6M
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
+2.5V_MEM
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
+1.8VALWP/+1.5VSP / +2.5V_MEM
+1.8VALWP/+1.5VSP / +2.5V_MEM
+1.8VALWP/+1.5VSP / +2.5V_MEM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
53 61
53 61
53 61
of
of
of
0.2
0.2
0.2
5
4
3
2
1
H_PROCHOT#<7,37,57>
+1.0V_VCCST
12
12
D D
VR_SVID_CLK<7>
PR616
10.5K_0402_1%
1 2
12
PR627 1K_0402_1%
PC620
1 2
2200P_0402_50V7K
PC627
1 2
PC629
0.022U_0402_25V7K
1 2
PC636
1 2
330P_0402_50V7K
VR_SVID_ALERT#<7>
VR_SVID_DATA<7>
+3.3V_RUN
PCH_PWROK<20>
IMVP_VR_ON<38>
I_SYS<37,57>
ISEN2_GT <56>
ISEN1_GT <56>
PR646
10.5K_0402_1%
1 2
PH605
PR649
1 2
27.4K_0402_1%
4
12
PC637
68P_0402_50V8J
470K_0402_5%_TSM0B474J4702RE
PR612
1 2
100K_0402_1%
PC606
1 2
330P_0402_50V7K
PC607
1 2
68P_0402_50V8J
PR623
PC608
1 2
12
PR636
12
2.61K_0402_1%
10K_0402_5%_ERTJ0ER103J PH604
5
1 2
4.87K_0402_1%
12
PR637
11K_0402_1%
2200P_0402_25V7K
C C
ISUMP_GT<56>
ISUMN_GT<56>
B B
FCCM_GT<56> PWM1_GT<56> PWM2_GT<56>
A A
VCC_GT_SENSE<12> VSS_GT_SENSE<12>
12
12
1 2
PH602
470K_0402_5%_TSM0B474J4702RE
1 2
PR615
27.4K_0402_1%
1000P_0402_50V7K
+VCC_GT
12
PR707
100_0402_1%
12
PR708
100_0402_1%
12
PC619
PC618
.1U_0402_16V7K
0.033U_0402_16V7K
PC625
.1U_0402_16V7K
95.3K_0402_1%
PC609
12
PC610
680P_0402_50V7K
1 2
2.94K_0402_1%
12
PC615
0.01UF_0402_25V7K
1K_0402_1%
PR648
PR633
PR639
1 2
402_0402_1%
12
PR624
2K_0402_1%
1 2
12
PR641
1 2
0.022U_0402_25V7K
1 2
PR602
PR617
1 2
1.91K_0402_1%
PR622
1 2
0_0402_5%
12
PR630 0_0402_5%
12
1 2
PR603
@
75_0402_1%
45.3_0402_1%
PR625
1 2
0_0402_5%
1
PSYS
2
IMON_B
3
NTC_B
4
COMP_B
5
FB_B
6
RTN_B
7
ISUMP_B
8
ISUMN_B
9
ISEN1_B
10
ISEN2_B
11
FCCM_B
12
PWM1_B
49
EP
PR652
3.6K_0402_1%
PC639
2200P_0402_25V7K
12
PR604
12
100_0402_1%
1 2 1 2 1 2
48
PC603
0.1U_0402_25V6 PR60949.9_0402_1% PR6110_0402_5%
PR61410_0402_1%
46
45
44
47
43
SCLK
ALERT#
VR_HOT#
VR_READY
VR_ENABLE
PWM2_B13NTC_A15COMP_A16FB_A17RTN_A18ISUMP_A19ISUMN_A
IMON_A
14
12
12
12
PC602
47P_0402_50V8J~D
PR605
0_0402_5%
VR_SVID_DATA_B
VR_SVID_ALERT#_B
VR_SVID_CLK_B
41
39
40
42
VIN
SDA
VCC
PROG2
ISEN1_A21ISEN2_A22ISEN3_A23FCCM_A
20
PC633
1 2
2200P_0402_50V7K
PR650
PC638
680P 50V K X7R 0402
+5V_ALW
12
1_0402_5%
38
PROG3
PROG437PROG1
24
PR642
1 2
412_0402_1%
CPU_B+
12
12
PR6070_0402_5%
ISEN2_VCORE<55>
36 35 34 33 32 31 30 29 28 27 26 25
PR644
1 2
1K_0402_1%
PR653
1 2
ISEN1_VCORE<55>
1 2
1K_0402_1%
3
PC604
1U_0402_6.3V6K
1 2
1 2
PC605
0.22U_0603_16V7K
0_0402_5%
PR647
PR651
2.15K_0402_1%
PR606
PU601
ISL95855AHRTZ-TS2778 TQFN48 CPU CODE
PROG5
PWM_C
FCCM_C ISUMN_C ISUMP_C
RTN_C
FB_C
COMP_C
IMON_C PWM3_A PWM2_A PWM1_A
12
PR618
182K_0402_1%
PR628
48.7K_0402_1%
1 2
PC634
680P_0402_50V7K
12
12
12
12
PR619
PR620
20.5K_0402_1%
16.9K_0402_1%
PWM_SA <56> FCCM_SA <56>
PWM2_VCORE <55> PWM1_VCORE <55>
FCCM_VCORE <55>
+5V_ALW
1 2
PC628 0.022U_0402_25V7K
1 2
PC630 0.022U_0402_25V7K
12
PR621
110K_0402_1%
PR640
113K_0402_1%
VCC_SENSE <12>
PR626
1.1K_0402_1%
1 2
PC611
2200P_0402_50V7K
12
PR629
12
12
1K_0402_1%
12
12
12
PC621
PC622
330P_0402_50V7K
68P_0402_50V8J
12
PC631
PC601
.1U_0402_16V7K
12
12
0.033U_0402_16V7K
PC613
12
PR601
4.53K_0402_1%
12
PC623 2200P_0402_50V7K
12
PC612
@
.1U_0402_16V7K
12
PC632
.1U_0402_16V7K
VSS_SENSE <12>
12
PC635
0.01UF_0402_25V7K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEE T OF ENGINE ERING DR AWING IS TH E PROPRI ETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEE T OF ENGINE ERING DR AWING IS TH E PROPRI ETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEE T OF ENGINE ERING DR AWING IS TH E PROPRI ETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DI SCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, I NC.
MAY BE USED BY OR DI SCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, I NC.
MAY BE USED BY OR DI SCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, I NC.
2016/01/01
2016/01/01
2016/01/01
2
12
PC614
6800P_0402_25V7K
0.033U_0402_16V7K
12
PR638
2K_0402_1%
12
PC624
820P_0402_50V7K
12
PH601
PR643
12
11K_0402_1%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
12
PR631
11K_0402_1%
1 2
PR634
316_0402_1%
1 2
2.74K_0402_1%
10K_0402_5%_ERTJ0ER103J
PR645
3.6K_0402_1%
12
12
1 2
PC616
1500P_0402_50V7K
PR635
2017/01/01
2017/01/01
2017/01/01
10K_0402_5%_ERTJ0ER103J PH603
PR632
2.61K_0402_1%
12
+VCC_SA
ISUMN_VCORE <55>
ISUMP_VCORE <55>
ISUMN_SA <56>
12
Tuesday, June 28, 2 016
Tuesday, June 28, 2 016
Tuesday, June 28, 2 016
1
PR710
100_0402_1%
12
PC617
0.01UF_0402_25V7K
VSS_SA_SENSE <11>
54 61
54 61
54 61
ISUMP_SA <56>
VCC_SA_SENSE <11>
PR709
100_0402_1%
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
VCORE_ISL95855
VCORE_ISL95855
VCORE_ISL95855
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
LA-E151P
LA-E151P
LA-E151P
Date: Sheet
Date: Sheet
Date: Sheet
0.2
0.2
0.2
of
of
of
5
D D
+PWR_SRC
CPU_B+
5.11K_0402_1%
rating 9A
PL602
@EMC@
1 2
FBMA-L11-453215800LMA90T_2P
PJP601
@
2
112
JUMP_43X118
1
1
+
+
PC647
PC646
PC645
2
2
@
10U_0805_25VAK
100U_D_20VM_R55M
100U_D_20VM_R55M
PWM1_VCORE<54>
12
12
12
PC655
PC649
PC648
10U_0805_25VAK
10U_0805_25VAK
0_0402_5%
12
12
12
PC651
PC650
10U_0805_25VAK
@EMC@
0.1U_0402_25V6
@EMC@
Polymer cap for noise issue
C C
5.11K_0402_1%
PWM2_VCORE<54>
12
12
PC656
B B
12
PC699
PC700
10U_0805_25VAK
10U_0805_25VAK
10U_0805_25VAK
12
12
12
PC702
PC701
10U_0805_25VAK
@EMC@
0.1U_0402_25V6
0_0402_5%
PC703
12
2200P_0402_50V7K
PC653
@EMC@
10P_0402_50V8K
PR655
PR654
12
PC686
2200P_0402_50V7K
PR663
PR665
+5V_ALW
12
12
PC642
1 2
0.22U_0603_16V7K
1 2
PR656
2.2_0603_5%
10P_0402_50V8K
+5V_ALW
12
12
PC684
1 2
0.22U_0603_16V7K
1 2
PR666
2.2_0603_5%
12
PC654 1000P_0402_50V7K
4
9
PGND2
8
PWM
7
BOOT
6
BOOT_R
5
VIN
CSD97396Q4 M VSON 8P DR MOS
12
PC680 1000P_0402_50V7K
FCCM_VCORE <54,55>
12
9
PGND2
8
PWM
7
BOOT
PGND1
6
BOOT_R
5
VIN
CSD97396Q4 M VSON 8P DR MOS
PR668
1 2
0_0402_5%
FCCM_VCORE<54,55>
12
PR679
5.11K_0402_1%
PR673
0_0402_5%
1 2
PU610
VSW
PGND1
VDD
SKIP#
PR658
1 2
0_0402_5%
@
PR678
5.11K_0402_1%
PR674
0_0402_5%
1 2
PU611
4
VSW
3 2
VDD
1
SKIP#
@
3
12
PC641
1U_0402_10V6K
12
PR657
10_1206_5%
@EMC@
VCC_CORE_SNUB1
12
PC652
@EMC@
33P_0603_50V8J
PC683
12
10_1206_5%
VCC_CORE_SNUB2
12
PC704
33P_0603_50V8J
SW1_VCC_CORE
3.65K_0603_1%
ISUMP_VCORE
SW2_VCC_CORE
PR659
1 2
PR669
3.65K_0603_1%
1 2
ISUMP_VCORE
ISEN1_VCORE<54>
CORE_V2N
CORE_V1N
4 3 2 1
1U_0402_10V6K
1 2
PR667
@EMC@
@EMC@
PL610
0.15UH_MMD06CZER15MG_37A_20%
342
PR660
100K_0402_1%
1 2
@
PR662
100K_0402_1%
1 2
<54,55>
PL611
0.15UH_MMD06CZER15MG_37A_20%
342
PR670
100K_0402_1%
1 2
ISEN2_VCORE<54>
@
PR672
100K_0402_1%
1 2
<54,55>
1
1
CORE_V1N
CORE_V2N
PR661
1 2
10_0402_1%
ISUMN_VCORE
PR671
10_0402_1%
+VCC_CORE
<54,55>
1 2
ISUMN_VCORE
2
VCC_core TDC 50A Peak Current 60A OCP current 72A Choke DCR 0.9 +-7%m ohm
<54,55>
1
A A
Security Classification
Security Classi fication
Security Classi fication
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR THE INFO RMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR THE INFO RMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR THE INFO RMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
VCORE
VCORE
VCORE
Size Document Numbe r Rev
Size Document Numbe r Rev
Size Document Numbe r Rev
Custom
Custom
Custom
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet of
Date: Sheet of
1
of
55 61
55 61
55 61
0.2
0.2
0.2
5
12
PR706
PC779
@EMC@
0.1U_0402_25V6
PC789
@EMC@
8 7 6 5
PR680
5.11K_0402_1%
PR684
0_0402_5%
12
PC705
PC783
2200P_0402_50V7K
@EMC@
PWM2_GT<54>
12
PC707
10P_0402_50V8K
2200P_0402_50V7K
+PWR_SRC
1 2
BST_VCC_SA_C
12
PR702
0_0402_5%
12
12
10P_0402_50V8K
5.11K_0402_1%
PR694
0_0402_5%
12
1 2
0.22U_0603_16V7K
1 2
2.2_0603_5%
12
PR693
0.22U_0603_16V7K
2.2_0603_5%
PC708 1000P_0402_50V7K
PC796
4.7U_0402_6.3V6M
0.22U_0603_16V7K
+PWR_SRC
rating 9A
PL606
@EMC@
D D
C C
B B
A A
1 2
FBMA-L11-453215800LMA90T_2P
PJP602
@
2
112
JUMP_43X118
PR703
PWM_SA<54>
1 2
0_0402_5%
PWM1_GT<54>
VCCGT_B+
12
12
PC781
12
PC786
10U_0805_25VAK
PC778
PC782
10U_0805_25VAK
10U_0805_25VAK
12
12
PC787
PC775
10U_0805_25VAK
10U_0805_25VAK
PU614
ISL95808HRZ-TS2778 DFN MOSFET DRIVE
1 2 3
BST_VCC_SA
12
12
PC709
10U_0805_25VAK
10U_0805_25VAK
12
12
PC788
PC710
10U_0805_25VAK
@EMC@
UGATE
PHASE
BOOT
FCCM PWM GND4LGATE
TP
9
12
0.1U_0402_25V6
VCC
1 2
2.2_0603_5%
+5V_ALW
PC777
1 2
PR686
CSD97396Q4M VSON 8P DR MOS
PC706 1000P_0402_50V7K
+5V_ALW
12
12
PC785
1 2
1 2
PR695
PJP603
@
PAD-OPEN 1x2m~D
FCCM_SA <54>
12
PR677
0_0402_5%
+5V_ALW
PC798
1 2
4
PR675
0_0402_5%
1 2
PU612
9
PGND2
8
PWM BOOT
BOOT_R VIN
12
PGND2 PWM BOOT
BOOT_R VIN
FCCM_GT<54,56>
PC791
@EMC@
VSW
PGND1
VDD
SKIP#
PR688
1 2
0_0402_5%
PR681
5.11K_0402_1%
PU613
VSW
PGND1
VDD
SKIP#
PR697
1 2
12
PR682
5.11K_0402_1%
12
PC792
@EMC@
0.1U_0402_25V6
DL_VCC_SA
4 3 2 1
@
PR676
0_0402_5%
1 2
4 3 2 1
0_0402_5%
@
12
PC793
2200P_0402_50V7K
7 6
5
FCCM_GT<54,56>
9 8 7
6 5
CSD97396Q4M VSON 8P DR MOS
21
1U_0402_10V6K
12
10U_0805_25VAK
PC776
1 2
PC794
10U_0805_25VAK
12
PR687
VCC_GT_SNUB1
@EMC@
12
PC780
@EMC@
1U_0402_10V6K
PR696
@EMC@
PC790
@EMC@
DH_VCC_SA
12
PC795
SW1_VCC_GT
4.7_1206_5%
680P_0603_50V7K
PC784
1 2
12
4.7_1206_5%
VCC_GT_SNUB2
12
680P_0603_50V7K
12
12
PC711
10U_0805_25VAK
10U_0805_25VAK
3.65K_0603_1%
ISUMP_GT
SW2_VCC_GT
3.65K_0603_1%
ISUMP_GT
1
2
D1
S2
S2
4
3
PR689
1 2
GT_V2N
PR698
1 2
GT_V1N
7
AON6994 2N DFN5X6D
G1
S1/D2
G26S2
5
3
0.15UH_MMD06CZER15MG_37A_20%
4 3
PR690
100K_0402_1%
1 2
ISEN1_GT<54>
@
PR692
100K_0402_1%
1 2
<54,56>
0.15UH_MMD06CZER15MG_37A_20%
4 3
PR699
100K_0402_1%
1 2
ISEN2_GT<54>
@
PR701
100K_0402_1%
1 2
<54,56>
PQ614
PL612
PL613
1 2
1 2
12
PR704
4.7_1206_5%
@EMC@
VCC_SA_SNUB
12
PC797
@EMC@
680P_0603_50V7K
GT_V1N
GT_V2N
SW_VCC_SA
PR691
1 2
10_0402_1%
ISUMN_GT
PR700
1 2
10_0402_1%
ISUMN_GT
ISUMP_SA<54>
ISUMN_SA<54>
+VCC_GT
<54,56>
<54,56>
PL614
0.47UH_MMD05CZR47M_12A_20%
1
4 3
2
12
PR705
3.65K_0603_1%
2
VCC_GT TDC 25A Peak Current 55A OCP current 66A Choke DCR 0.9 +-7%m ohm
VCC_SA TDC 10A Peak Current 11.1A OCP current 13.32A Choke DCR 6.2+-5%m ohm
+VCC_SA
PR683 0_0402_5%
1 2
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET I NFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRON ICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRON ICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CON SENT OF COMPAL ELECTRON ICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
VGT_VSA
VGT_VSA
VGT_VSA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
56 61
56 61
56 61
of
of
of
0.2
0.2
0.2
A
+SDC_IN
1 1
PR909
1_0402_1%
12
PC926
@
DCIN_ISL88738
VDD_ISL88738 ACIN_ISL88738 OTGEN/CMIN
ACOK_ISL88738
PC938
10P_0402_50V8J
1 2
0.1U_0402_25V6
17
DCIN
18
VDD
19
ACIN
20
OTGEN/CMIN
21
SDA
22
SCL
23
PROCHOT#
24
ACOK
PR933
100K_0402_1%
1 2
PR951
0_0402_5%
1 2
COMP_ISL88738
12
PR934
12
0_0402_5%
PC943
@
12
560P_0402_50V7K
PC944
0.047U_0402_25V7K
Close to EC ADP_I pin
PROCHOT#_ISL88738<59>
+SDC_IN
PR960 0_0402_5%
1 2
H_PROCHOT#<7,37,54>
PR931
100K_0402_1%
1 2
12
12
PD901
PD903
2 1
RB520SM-30T2R_EMD2-2
PD904
1 2
1U_0402_6.3V6K
13
D
2
154K_0402_1%
G
S
PR927
1M_0402_1%
12
12
PC933
PR925
PR916 1_0805_5%~D
1 2
12
12
PR918 100K_0402_1%
1 2
PBAT_CHARGER_SMBDAT<37,48> PBAT_CHARGER_SMBCLK<37,48>
PBAT_PRES#<37,48>
+PBATT
SDMK0340L-7-F_SOD323-2~D
+VBUS_DC_SS
2 2
+DC_IN_SS
SDMK0340L-7-F_SOD323-2~D
PC931 1U_0603_25V6
ACAV_IN1
PQ909
DMN65D8LW-7_SOT323-3
AC_DIS<37>
12
3 3
PR944 442K_0402_1%
ACIN_ISL88738
PR945 100K_0402_5%
@
0_0402_5%
1 2 1 2 1 2 1 2
1 2
@
100K_0402_1%
1 2
PR943
12
0_0603_5%
PR919
PR920 0_0402_5% PR922 0_0402_5%
PROCHOT#_ISL88738
PR9260_0402_5%
PR928
0_0402_5%
PR930
+3.3V_ALW
CMOUT<59>
4 4
B
+PWR_SRC_AC
PR901
0.01_1206_1%
1 2
12
PR910
1_0402_1%
CSIP_ISL88738
PC925
1U_0402_25V6K
1 2
ADP_ISL88738
CSIP_ISL88738
CSIN_ISL88738
16
13
14
15
ADP
CSIP
CSIN
ASGATE
CMOP
BATGONE
OTGPG/CMOUT26PROG27AMON/BMON29PSYS30VBAT
28
25
12
PR932
118K_0402_1%
12
12
PR947
PR935
0_0402_5%
0_0402_5%
I_ADP
I_BATT
I_BATT <37>
I_ADP <37>
@EMC@
1UH_MMD-05CZ-1R0M-M7L_7A_20%
4 3
1 2
PAD-OPEN 4x4m
@
12
12
CSIN_ISL88738
PC930
0.22U_0603_25V7K
1 2
PR914 0_0603_5%
1 2
BOOT1_ISL88738
LG1_ISL88738
UG1_ISL88738
LX1_ISL88738
12
10
9
11
BOOT1
LGATE1
PHASE1
UGATE1
VDDP
LGATE2 PHASE2 UGATE2
BOOT2
VSYS
CSOP
CSON
BGATE
31
32
12
BGATE_ISL88738
PR949
0_0402_5%
VBAT1_ISL88738
12
12
0.1U_0402_25V6
I_SYS <37,54>
0.1U_0402_25V6
PR936
PC950
@
PC947
PL901
12
PJP901
PC927
@
0.1U_0402_25V6
PR915
4.7_0402_5%
1 2
PU901
33
ISL88738 HRTZ-T_T QFN32_4X4
PAD
VDDP_ISL88738
8
LG2_ISL88738
7
LX2_ISL88738
6
UG2_ISL88738
5
BOOT2_ISL88738
4 3
CSOP_ISL88738
2
CSON_ISL88738
1
12
PR948
0_0402_5%
9.31K_0402_1%
1U_0402_25V6K
100_0402_1%
1 2
12
PC902
PC903
0.1U_0402_25V6 2200P_0402_50V7K
@EMC@
@EMC@
VDD_ISL88738
PC932
1U_0402_6.3V6K
12
PC934
12
0.22U_0603_25V7K
0_0402_5%
1 2
PC945
+PBATT
12
PR940
PR929
12
1 2
PC911
PR921
1 2
PC939 0.1U_0402_25V6@
PC946 0.1U_0402_25V6@
12
PC904
22U_0805_25V6M
12
2.2_0603_5%
1 2
PC942 0.1U_0402_25V6@
1 2
PR937
1_0402_1%
1_0402_1%
PR938
1 2
1 2
12
22U_0805_25V6M
LX1_ISL88738 LG1_ISL88738
+PWR_SRC
12
PC905
22U_0805_25V6M
+CHARGER_SRC
12
PC906
22U_0805_25V6M
PQ905 CSD87351Q5D_SON8-7
2
3 4
AC1_DISC#<29,59>
ACAV_IN_NB<37,48,59>
15U_B2_25VM_R100M
C
1
+
PC909
PC910
2
15U_B2_25VM_R100M
@
@
1
7 6 5
8
1
1
+
+
PC951
2
2
15U_B2_25VM_R100M
@
PL902
2.2UH_PCMB103T-2R2MS_13A_20%
1 2
SW1_ISL88738
12
PR923
@EMC@
SNUB_CHG1
12
PC940
@EMC@
PR939
0_0402_5%
1 2
1 2
PR941
0_0402_5%
4.7_1206_5%
680P_0603_50V7K
SW2_ISL88738
12
PR924
4.7_1206_5%
@EMC@
SNUB_CHG2
12
PC941
680P_0603_50V7K
@EMC@
PD905
BAT54CW_SOT323-3
3
2
PD@
PQ904 CSD87351Q5D_SON8-7
1
7 6 5
8
PR950
@
0_0402_5%
1 2
0.1U_0402_10V7K
1
ACAV_IN1
1 2
PR942
0_0402_5%
+PWR_SRC
2
3 4
PC949
1 2
PC913
10U_0805_25V6K
PC928
0.1U_0402_25V6
@EMC@
UG2_ISL88738UG1_ISL88738
LX2_ISL88738
LG2_ISL88738
LM393_P
1
B
2
A
D
12
12
PC914
10U_0805_25V6K
12
PC929
2200P_0402_50V7K
@EMC@
1 2
PU903
5
P
4
Y
G
3
12
PC915
10U_0805_25V6K
12
PR917
0.005_1206_1%
TC7SH08FU_SSOP5
PR946
0_0402_5%
1 2
12
12
PC916
PC917
10U_0805_25V6K
10U_0805_25V6K
+VCHGR
4 3
ACAV_IN<37>
12
12
PC918
10U_0805_25V6K
PC919
10U_0805_25V6K
12
PC920
10U_0805_25V6K
PQ906 AON7409_DFN8-5
1 2 3 5
+PBATT
4
12
12
PC936
PC935
10U_0805_25V6K
PC937
1 2
10U_0805_25V6K
BGATE_ISL88738
@
4700P_0402_25V7K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTA INS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTA INS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTA INS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
PWR_CHARGER_ISL9237 (Colay)
PWR_CHARGER_ISL9237 (Colay)
PWR_CHARGER_ISL9237 (Colay)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
D
57 61
57 61
57 61
of
of
of
0.2
0.2
0.2
+VCC_CORE
A
VCC_CORE Place on CPU Back Side. 22U_0603 * 8 pcs + 10U_0402*28 pcs + 1U_0201*35 pcs Primary Side. 22U_0603 * 8 pcs+330u_D2*2 pcs
B
C
VCC_GT Place on CPU Back Side. 22U_0603 * 8 pcs +10U_0402*35 pcs +1U_0201*68 pcs Primary Side. 22U_0603 * 12 pcs +470u_D2*2 pcs
D
E
+VCC_GT
1 1
2 2
3 3
12
12
12
PC1041
PC1042
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
12
12
12
12
12
12
PC1075
PC1074
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1103
PC1104
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1133
PC1132
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1163
PC1162
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1193
PC1192
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC820
PC819
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1044
PC1043
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
PC1076
PC1077
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1106
PC1105
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1135
PC1134
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1164
PC1165
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1195
PC1194
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC821
PC822
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1045
PC1046
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
PC1079
PC1078
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1108
PC1107
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1136
PC1137
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1167
PC1166
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1196
PC1197
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC823
PC824
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1047
22U_0603_6.3V6M
12
PC1080
10U_0402_6.3V6M
12
PC1109
10U_0402_6.3V6M
12
PC1138
1U_0201_6.3V6M
12
PC1168
1U_0201_6.3V6M
12
PC1198
1U_0201_6.3V6M
12
PC825
1U_0201_6.3V6M
12
PC1049
PC1048
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
PC1081
PC1082
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1110
PC1111
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1140
PC1139
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1169
PC1170
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC800
PC1199
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC826
PC827
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1050
PC1051
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
PC1083
PC1084
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1112
PC1113
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1142
PC1141
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1172
PC1171
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC802
PC801
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC829
PC828
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1053
PC1052
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
PC1085
PC1086
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1115
PC1114
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1144
PC1143
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1174
PC1173
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC804
PC803
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC830
PC831
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1054
PC1056
PC1055
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
PC1087
10U_0402_6.3V6M
PC1116
10U_0402_6.3V6M
12
PC1146
PC1145
1U_0201_6.3V6M
1U_0201_6.3V6M
12
PC1176
PC1175
1U_0201_6.3V6M
1U_0201_6.3V6M
12
PC806
PC805
1U_0201_6.3V6M
1U_0201_6.3V6M
12
PC832
PC833
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1001
22U_0603_6.3V6M
12
12
PC1023
10U_0402_6.3V6M
12
12
PC1057
10U_0402_6.3V6M
12
12
PC1088
1U_0201_6.3V6M
12
12
PC1117
1U_0201_6.3V6M
12
12
PC1147
1U_0201_6.3V6M
12
12
PC1177
1U_0201_6.3V6M
12
12
PC1002
22U_0603_6.3V6M
12
PC1024
10U_0402_6.3V6M
12
PC1058
10U_0402_6.3V6M
12
PC1089
1U_0201_6.3V6M
12
PC1118
1U_0201_6.3V6M
12
PC1148
1U_0201_6.3V6M
12
PC1178
1U_0201_6.3V6M
12
PC1004
PC1003
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
PC1025
PC1026
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1060
PC1059
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1091
PC1090
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1120
PC1119
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1149
PC1150
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1180
PC1179
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1005
22U_0603_6.3V6M
12
PC1027
10U_0402_6.3V6M
12
PC1061
10U_0402_6.3V6M
12
PC1092
1U_0201_6.3V6M
12
PC1121
1U_0201_6.3V6M
12
PC1151
1U_0201_6.3V6M
12
PC1181
1U_0201_6.3V6M
12
PC1007
PC1006
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
PC1029
PC1028
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1062
PC1063
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1094
PC1093
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1123
PC1122
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1152
PC1153
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1182
PC1183
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1008
22U_0603_6.3V6M
12
PC1030
10U_0402_6.3V6M
12
PC1064
10U_0402_6.3V6M
12
PC1095
1U_0201_6.3V6M
12
PC1124
1U_0201_6.3V6M
12
PC1154
1U_0201_6.3V6M
12
PC1184
1U_0201_6.3V6M
12
PC1010
PC1009
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
PC1031
PC1032
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1066
PC1065
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1096
PC1097
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1125
PC1126
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1156
PC1155
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1185
PC1186
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
12
PC1012
PC1011
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
PC1033
PC1034
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1067
PC1068
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1099
PC1098
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1127
PC1128
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1157
PC1158
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1187
PC1188
1U_0201_6.3V6M
1U_0201_6.3V6M
12
PC1013
PC1014
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
PC1035
PC1036
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1069
PC1070
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1101
PC1100
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1129
PC1130
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1160
PC1159
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1190
PC1189
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1015
22U_0603_6.3V6M
12
PC1037
10U_0402_6.3V6M
12
PC1071
10U_0402_6.3V6M
PC1102
1U_0201_6.3V6M
PC1131
1U_0201_6.3V6M
PC1161
1U_0201_6.3V6M
PC1191
1U_0201_6.3V6M
12
PC1017
PC1016
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
PC1038
PC1039
10U_0402_6.3V6M
10U_0402_6.3V6M
12
PC1073
PC1072
10U_0402_6.3V6M
10U_0402_6.3V6M
12
12
PC1018
PC1020
PC1019
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
PC1040
10U_0402_6.3V6M
1
PC814
1U_0201_6.3V6M
1
+
2
2017/01/01
2017/01/01
2017/01/01
+
PC849
PC848
2
470U_X_2VM_R6M
470U_X_2VM_R6M
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
E
58 61
58 61
58 61
0.2
0.2
0.2
of
of
of
1
12
12
4 4
12
PC842
PC841
1U_0201_6.3V6M
1U_0201_6.3V6M
VCC_SA Place on CPU Back Side. 22U_0603 * 2 pcs + 10U_0402*7 pcs + 1U_0201*3 pcs Primary Side. 22U_0603 * 2 pcs + 220u_D2*1 pcs
A
1
+
+
PC843
PC1021
PC1022
2
2
1U_0201_6.3V6M
330U_D2_2.5V_R6M
330U_D2_2.5V_R6M
B
+VCC_SA
12
12
PC815
22U_0603_6.3V6M
12
12
PC834
10U_0402_6.3V6M
12
12
PC844
1U_0201_6.3V6M
12
12
PC818
PC817
PC816
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
PC835
10U_0402_6.3V6M
12
PC845
1U_0201_6.3V6M
12
PC837
PC836
10U_0402_6.3V6M
10U_0402_6.3V6M
1
+
PC850
PC846
2
1U_0201_6.3V6M
220U_D2_2.5VY_R9M
12
12
PC838
PC840
PC839
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTA INS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTA INS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTA INS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
12
12
PC807
1U_0201_6.3V6M
12
PC808
1U_0201_6.3V6M
2016/01/01
2016/01/01
2016/01/01
12
PC810
PC809
1U_0201_6.3V6M
1U_0201_6.3V6M
Compal Secret Data
Compal Secret Data
Compal Secret Data
12
PC811
1U_0201_6.3V6M
Deciphered Date
Deciphered Date
Deciphered Date
12
12
12
PC812
PC813
1U_0201_6.3V6M
1U_0201_6.3V6M
D
5
DCIN_AC_Detector
PC1201
@
0.01U_0402_25V7K~D
1 2
12
PC1206
PC1215
100P_0402_50V8J
@EMC@
3
2
BAT54CW_SOT323-3
PD@
220P_0402_50V8J~D
12
PD1801
1
LM393_P
8
3
P
+
2
-
G
4
EMI Part
5A_Z120_25M_0805_2P
1 2 1 2
5A_Z120_25M_0805_2P
EMC@
12
PC1208
EMC@
1000P_0402_50V7K
LM393_P
PR1203
1.8M_0402_1%
1 2
PU1201A LM393DGKR_VSSOP8
1
O
PL1201
PL1202
EMC@
+3.3V_VDD_DCIN
12
PR1206 1K_0402_1%
ACAV_IN_NB
ACAV_IN_NB <37,48,57,5 9>
12
PC1207
1200P_0402_50V7K
+TBTA_Vbus_1
12
12
PC1209
0.1U_0402_25V6
@EMC@
12
PC1216
PR1227
100K_0402_5%
100P_0402_50V8J
PD@
EMC@
+3.3V_VDD_DCIN
+DC_IN
D D
PR1201
PR1219
C C
12
240K_0402_1%
(>17.6V)
12
23.2K_0402_1%
PR1208
PR1217
12
102K_0402_1%
12
84.5K_0402_1%
+3.3V_VDD_DCIN
+3.3V_VDD_PIC
12
PC1205
100P_0402_50V8J~D
+TBTA_VBUS
PC1209 can't over 1000P
+TBTA_Vbus_1 +3.3V _VDD_PIC
PR1237
100K_0402_1%
B B
PR1239
PR1246
12
150K_0402_1%
@
12
100K_0402_1%
12
PC1211
PR1247
100P_0402_50V8J
200K_0402_1%
SDMK0340L-7-F_SO D323-2
12
12
PC1212
S11 OVP
PD1205
1 2
5 6
12
100P_0402_50V8J
PR1238 0_0402_5%
1 2
LM393_P
8
P
+
-
G
4
PU1201B LM393DGKR_VSSOP8
7
O
12
PR1240 100K_0402_1%
PR1243 0_0402_5%
1 2
12
PC1213
1200P_0402_50V7K
OVP setting: 5.5V
LPS_PROTECT#
PT1
@
PAD~D
(From EC)
EN_PD_HV_1 <29,59>
PR1249 10K_0402_5%
PR1248 0_0402_5%
1 2
0_0402_5%
1 2
PR1250
13
D
2
G
12
S
PQ1212
DMN65D8LW-7_ SOT323-3
+TBTA_Vbus_1
4
5
12
PC1214
+AC_IN
+3.3V_VDD_PIC
PR1236 100K_0402_5%
1 2 34
PQ1209B DMN65D8LDW-7_ SOT363-6
0.01UF_0402_25V7K
EN_PD_HV_1<29 ,59>
PJP1202
112
JUMP_43X118
@
PQ1206 AON7409_DFN8-5
4
12
61
2
+3.3V_VDD_PIC
12
PR1253 100K_0402_5%
EN_PD_HV_1#
5
2
S3
1 2 35
1 2
PC1210
1500P_0402_50V7K
PR1229
49.9K_0402_1%
PQ1209A DMN65D8LDW-7_ SOT363-6
12
12
61
2
34
PQ1214B
DMN65D8LDW-7_ SOT363-6
EN_PD_HV_1<29 ,59>
(From TI GPIO1)
12
PR1228
12
499K_0402_1%
PR1255
150K_0402_1%
PR1251 300K_0402_5%
PR1252 100K_0402_5%
PQ1214A
DMN65D8LDW-7_ SOT363-6
PR1210
1M_0402_5%
DCIN1_EN<38>
12
PR1221
0_0402_5%
1 2
G
2
@
0_0402_5%
0_0402_5%
+3.3V_ALW
3
S
D
1 3
AO3409 P-CHANNEL SOT-23
PC1204
0.1U_0402_10V7K
PR1254
1 2
PR1211
1 2 1 2
PR1215
0_0402_5%
12
PR1224
100K_0402_5%
12
PC1202
PQ1215
2200P 50V K X7R 0603
+3.3V_VDD_PIC
12
5
1
P
B
O
2
A
G
3
PQ1205
DMN65D8LW-7_ SOT323-3
D
S
13
G
2 12
PR1225
0_0402_5%
EN_PD_HV_1<29 ,59>
AC1_DISC#<2 9,57>
1 2 3 5
12
PR1205
499K_0402_1%
12
PR1216 0_0402_5%
4
PU1200 TC7SH08FU_SSOP5~D
PR1226
1 2
100K_0402_5%
+3.3V_VDD_PIC
S4 S5
PQ1213 AON7409_DFN8-5
4
12
PR1212
49.9K_0402_1%
61
2
@
PR1260
0_0402_5%
1 2
1 2
PR1244
0_0402_5%
PQ1201A
DMN65D8LDW-7_ SOT363-6
VBUS2_ECOK<38,48 > AC_DISC# <37,48,59> VBUS1_ECOK<38,59 >
PR1259
100K_0402_5%
5
G
+3.3V_ALW
1 2
34
S
ACAV_IN_NB<37 ,48,57,59>
D
100K_0402_5%
PQ1208B
DMN66D0LDW-7_ SOT363-6
+VBUS_DC_SS
PR1242
0_0402_5%
1 2 1 2
PR1257
0_0402_5%
+3.3V_ALW
PR1234
1 2 61
D
2
G
S
@
PR1261 0_0402_5%
1 2
1 2
PR1241
0_0402_5%
VBUS1_ECOK<38 ,59>
PQ1208A
DMN66D0LDW-7_ SOT363-6
VBUS1_ECOK
PR1235
100K_0402_5%
100K_0402_5%
5
PR1232
@
G
2
0_0402_5%
12
PR1222
100K_0402_5%
1 2
2
G
+3.3V_ALW
1 2
34
D
S
PR1220
1 2
100K_0402_5%
PQ1207B DMN66D0LDW-7_ SOT363-6
@
0_0402_5%
PD1202
PDS5100H-13_POWERDI5-3~D
2
1
3
PQ1202 AON7409_DFN8-5
1 2 35
4
12
PR1213
49.9K_0402_1%
34
12
5
PQ1201B
DMN65D8LDW-7_ SOT363-6
PR1233
1 2
@
61
D
5
G
PQ1211A
S
+3.3V_ALW
DMN66D0LDW-7_ SOT363-6
1 2 61
D
2
G
S
PR1258
12
12
PC1203
PR1207
499K_0402_1%
34
D
PQ1211B
S
DMN66D0LDW-7_ SOT363-6
PR1230
100K_0402_5%
PQ1207A DMN66D0LDW-7_ SOT363-6
1
2
PQ1210B
DMN66D0LDW-7_ SOT363-6
PR1223
0_0402_5%
CMOUT <57>
+SDC_IN
12
AC_DISC# <37,48,59>
12
PR1202 300K_0402_5%
S
G
PQ1203
2
D
1 3
1500P_0402_50V7K
12
PR1209 100K_0402_5%
AO3409 P-CHANNEL SOT-23
34
PQ1204B
DMN65D8LDW-7_ SOT363-6
+3.3V_ALW+3.3V_ALW+3.3V_ALW
PR1231 100K_0402_5%
1 2
1 2
PR1245
0_0402_5%
61
D
12
PQ1210A
S
PC1217
@
1500P_0402_50V7K
DMN66D0LDW-7_ SOT363-6
5
G
2
PR1218
0_0402_5%
+3.3V_VDD_PIC
12
2
G
12
61
PQ1204A
DMN65D8LDW-7_ SOT363-6
5
G
13
D
S
PQ1216
PR1214 100K_0402_5%
34
D
S
PROCHOT#_ISL88738 <57>
DMN65D8LW-7_ SOT323-3
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR THE INFO RMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR THE INFO RMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR THE INFO RMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/01/01
2016/01/01
2016/01/01
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2017/01/01
2017/01/01
2017/01/01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ParkCity_TypeC_PD
ParkCity_TypeC_PD
ParkCity_TypeC_PD
Size Document Numbe r Rev
Size Document Numbe r Rev
Size Document Numbe r Rev
Custom
Custom
Custom
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet of
Date: Sheet of
Date: Sheet
1
of
59 61
59 61
59 61
0.2
0.2
0.2
5
4
Version Change List ( P. I. R. List )
3
2
1
Item Issue
D D
1
2
3
4
C C
5
6
7
Date
Description
Solution Description
Rev.Page# Title
Request Owner
8
B B
9
10
11
12
13
A A
14
DELL CONFIDENTIAL/PROPRIETARY
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
PWR P.I.R
PWR P.I.R
PWR P.I.R
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
of
60 61
of
60 61
of
60 61
0.2
0.2
0.2
5
4
Version Change List ( P. I. R. List )
3
2
1
Item
D D
TitlePage# Rev.
HW111 0.2(X01)COMPAL2016/5/27
Date
Owner
S0ix(modern standy) support for VCCPLL_OC Pop RZ120 and Depop UZ34
Request
Issue Description
Solution Description
Add net name VCCSTG_EN(UZ19.4) and connect to RZ120.1
HW Reserve RE513 100k (SD028100380) to GNDReserve PORT80_DET# PD resistance372 0.2(X01)COMPAL2016/5/27
3HW35 2016/6/1 COMPAL CZ28,CZ29 change from 0.047uF to 0.01uF
Intel schematics reivew modify item 0.2(X01)
CZ27 change from 0.1uF(@)_0201 to 10uF_0603
HW JLED1 pin define error445 JLED1 pin definition change2016/6/1 COMPAL 0.2(X01)
5HW39 2016/6/1 COMPAL TPM change to NUVOTON Change TPM from Atmel to NUVOTON. 0.2(X01)
HW
2016/6/135
COMPAL6
Intel reviwe result (WWAN Coex feature support)
Add RZ128 0 ohm connect WWAN_COEX3 and WLAN_COEX3 Add RZ129 0 ohm connect WWAN_COEX2 and WLAN_COEX2 Add RZ130 0 ohm connect WWAN_COEX1 and WLAN_COEX1
0.2(X01)
HW7 Debug card reserveCOMPAL2016/6/735 Add RZ131, RZ132 for PORT80_DET# and HOST_DEBUG_TX 0.2(X01)
C C
837HW2016/6/7COMPALFor MEC5105K-D1-TN setting 1. Change UE1 to SA00009GL00
935,32HW2016/6/16COMPALFor EMC request De-pop RZ131, RZ132. CL22 change to 10pf , POP CA7,CZ1 (100P),CH268
2016/6/16HW4110 0.2(X01)POP RN5BITS284924-HDD is still working after press
2016/6/17 0.2(X01)1. JKBTP1 change to CVILU_CF5020FD0RK-05-NH
COMPAL
power button into S5 during POST. Connector change11 39 ME COMPAL
2. POP RE360,RE362
3. De-POP RE361
modify from 22p to 47p and POP,Change LV1 to SM01000NY00
2. JUSH1 change to CVILU_CF5026FD0RK-05-NH
3. JIR1 change to ACES_50208-0060N-P01
0.2(X01)
0.2(X01)
2016/6/2012 36 HW 0.2(X01)RA7,RA8 change to 16.2ohmVender suggestCOMPAL
13 37 HW 2016/6/22 COMPAL The posibility of GPIO map update Add RE514,RE515 for RTCRST_ON 0.2(X01)
B B
14 41 HW 2016/6/22 COMPAL BITS283552 - [BR_CSLP] FFS AP no function
A A
5
when execute FF generator or shake SU
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
FFS VDD_IO change to +3.3V_RUN 0.2(X01)
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
EE P.I.R (1/6)
EE P.I.R (1/6)
EE P.I.R (1/6)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-E151P
LA-E151P
LA-E151P
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Tuesday, June 28, 2016
Date: Sheet
Date: Sheet
Date: Sheet
1
of
61 61
of
61 61
of
61 61
2016/01/01
2016/01/01
2016/01/01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2017/01/01
2017/01/01
2017/01/01
0.2
0.2
0.2
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