Compal LA-E151P Schematics

5

4

3

2

1

COMPAL CONFIDENTIAL

MODEL NAME : CDP80

D D

PCB NO : LA-E151P
BOM P/N :

GPIO MAP: Dell GPIO map EC16 062416 Compal Only

Breckenridge 15 UMA

Kabylake H

2016-07-01

C C

@ : Nopop Component

EMI@ : EMI Component

REV : 0.2 (X01)

@EMI@ : EMI Nopop Component

ESD@ : ESD Component

@ESD@ : ESD Nopop Component

RF@ : RF Component

B B

@RF@ : RF Nopop Component

XDP@ : XDP Component

CONN@ : Connector Component

MB PCB

Part Number

DA80018K000

A A

COPYRIGHT 2016
ALL RIGHT RESERVED
REV: X01
PWB: V0RVF

Description
PCB 1SE LA-E151P REV0 MB UMA 1

Layout Dell logo

5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2016/01/01

2016/01/01

2016/01/01

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2017/01/01

2017/01/01

2017/01/01

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Cover Sheet

Cover Sheet

Cover Sheet

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A

A

A

LA-E151P

LA-E151P

LA-E151P

Friday, July 01, 2016

Friday, July 01, 2016

Friday, July 01, 2016

Date: Sheet

Date: Sheet

Date: Sheet

161

161

161

1

of

of

of

0.2

0.2

0.2

5

Breckenridge 15 UMA non-TBT Block Diagram

4

3

2

1

Reverse Type

D D

HDMI 1.4b
CONN

EDP CONN

P26

P32

HDMI

To Type C

eDP Lane x 2

DDI[1]

DDI[2]

DDI[3]

eDP

DDIB

DDIC

DDID

Intel
KABYLAKE-H
BGA CPU
1440 Pins

PAGE 6~13

Memory BUS (DDR4)

1866/2133 MHz

USB2.0[1]

SLG55594AVTR
USB POWER SHARE

DMI x4 Gen 3

C C

CRT CONN

VGA

DP TO VGA

P27

RTD2166

To M2 WiGig card

P27

SW1_DP1

DP DeMUX
PS8338

P25

USB

DDR4-SO-DIMM X2

BANK 0, 1, 2, 3

P.14/15

USB2.0[9]

USB2.0[11]

USB2.0[1]_PS

P42

USB3.0[1]

USB2.0[2]

USB3.0[3]

USB2.0[3]

USB3.0[4]

LCD Touch

Camera

USB3.0 Conn
PS(Ext Port 1)

USB3.0 Conn
(Ext Port 2)

USB3.0 Conn
(Ext Port 3)

P32

P32

Trough eDP Cable

P42

P43

P43

Intel
KABYLAKE-H
BGA PCH
837 Pins

HD Audio I/F

PAGE 16~24

SATA[0]/PCIE[9..12]

SPI

PCIE[3]

Card reader
RTS5242

SD4.0

P34

P34

B B

Non-AR Type C

TX/RX

USB 3.0 + AM
Type C CONN.

A A

USB2.0

CC

Vbus

HS Redriver Switch
TUSB546

GPIO

PD Solution
TPS65982

5V VR

PCIE[4]

Intel Jacksonville
WGI219LM

Transformer

RJ45

P33

P33

P33

DP1.2 4 lanes

P28

P29-30P31

M.2,3042 Key B

WWAN/LTE
/HCA/SSD

USB3.0[2]

DDI[2]

USB3.0[5]

SMBUS

USB2.0[4]

PCIE[17]

USB2.0[8]

P35

USH board

Smart Card

PCIE[2]

PCIE[1]

M.2,3030 Key A

WLAN+BT/WIGIG

USB2.0[6]

WIGIG_DP

TDA8034HN

RFID/NFC

Fingerprint
CONN

P35

GPIO Expander
IT8010

SPI

P38

USH TPM1.2
BCM58102

SPI

eSPI

SMSC KBC
MEC5105

P.37

USB2.0[10]

P39

Charger

5

4

3

SATA[2]

HDA Codec

W25Q128FVSIQ

128M 4K sector

ALC3246

P.19

P.36

W25Q64FVSSIQ

P.44

P.38

P.19

reserve

P.39

2016/01/01

2016/01/01

2016/01/01

SATA REPEATER
PI3EQX6741STZDEX

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

64M 4K sector

TPM2.0
ATTPM20P-G1MA1-ABF

KB/TP CONN

FAN CONN

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

P41

2017/01/01

2017/01/01

2017/01/01

INT.Speaker

Universal Jack

Dig. MIC

M2 Key M
SSD Conn

P.36

P.36

Trough eDP Cable

P.32

P.40

SATA HDD
Conn

P41

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Block diagram

Block diagram

Block diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-E151P

LA-E151P

LA-E151P

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Date: Sheet of

Date: Sheet of

Date: Sheet of

LID SWITCH

USH CONN

CPU&PCH XDP Port

AUTOMATIC POWER
SWITCH(APS)

Free Fall sensor

DC/DC Interface

POWER ON/OFF
SW & LED

1

P45

P39

P7

P21

P41

P47

P45

261

261

261

0.2

0.2

0.2

5

4

3

2

1

POWER STATES

Signal

State

S0 (Full ON) / M0

D D

S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON ON OFF

S4 (Suspend to DISK) / M3 ON ON OFF

S5 (SOFT OFF) / M3 ON ON OFFLOW HIGHLOW

SLP
S3#

HIGH

LOW HIGH HIGH

SLP

SLP

S5#

S4#

HIGH HIGH

LOW

LOW

SLP
A#

HIGH

HIGH

ALWAYS
PLANE

ON

M
PLANE

ON

SUS
PLANE

RUN
PLANE

ON ON ON

OFF

OFF

CLOCKS

OFF

OFF

OFF

USB3.0

USB3.0-1

USB3.0-2

USB3.0-3

USB3.0-4

USB3.0-5

USB3.0-6

USB3.0-7

S3 (Suspend to RAM) / M-OFF

S4 (Suspend to DISK) / M-OFF HIGH

S5 (SOFT OFF) / M-OFF

LOW HIGH HIGH LOW ON ONOFF OFF OFF

LOW LOW LOW ON OFF OFF OFF OFF

LOW LOW LOW LOW ON OFF OFF OFF OFF

USB3.0-8

USB3.0-9

USB3.0-10

SSIC

SSIC-1

SSIC-2

PCIE

PCIE-1

PCIE-2

PCIE-3

PCIE-4

SATA

JUSB3-->Rear

JNGFF2-->M2 3042(LTE)

JUSB1-->Right

JUSB2-->Left

NA

NA

JNGFF1-->M.2 3030(WIGIG)

JNGFF1-->M.2 3030(WLAN)

Card Reader

LOM

PCIE-5

PM TABLE

C C

power
plane

State

S0

B B

S3

S5 S4/AC

S5 S4/AC doesn't exist

+5V_ALW
+3.3V_ALW
+3.3V_ALW_DSW

+RTC_CELL

+1.0V_PRIM
+1.0V_PRIM_CORE
+5V_ALW2
+3.3V_ALW2 +VCC_SA
+3.3V_RTC_LDO
+1.0V_MPHYGT

ON

ON OFF

ON OFF

OFF

+3.3V_SUS
+1.2V_MEM+3.3V_ALW_PCH
+1.0V_VCCST
+2.5V_MEM+1.8V_PRIM

ON

OFF

OFF

+5V_RUN
+3.3V_RUN
+0.6V_DDR_VTT
+1.2V_RUN
+VCC_CORE
+VCC_GT
+1.0VS_VCCIO

+1.8V_RUN

ONON

OFF

PCIE-6

PCIE-7

PCIE-8

PCIE-9

PCIE-10

PCIE-11

PCIE-12

PCIE-13

PCIE-14

PCIE-15

PCIE-16

PCIE-17

PCIE-18

PCIE-19

PCIE-20

SATA-0A

SATA-1A

SATA-0B

SATA-1B

SATA-2

SATA-3

SATA-4

SATA-5

NA

M.2 Socket 3 (Key M)
M.2 2280 SSD
(PCIex4 or SATA)

NA

NA

JSATA1-->HDD SATA

NA

M.2 3042 (HCA or QCA LTE) SSD Cache

NA

NA

NA

USB PORT#DESTINATION

eDP

DDI-B

DDI-C

DDI-D

1

2

3

4

5

6

7

8

9

10

11

12

VIDEO

DESTINATION

JUSB3-->Rear

JUSB1-->Right

JUSB2 ->Left

Type C

NA

JNGFF1--> M.2 3030(BT)

NA

JNGFF2-->M2 3042(WWAN)

JEDP1-->Touch Screen

JUSH1-->USH

JEDP1-->Camera

NA

H BIOUSH

DESTINATION

LCD

JHDMI1

Type-C

M.2 3030 (WiGig)

DeMux 1

MB VGA

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2016/01/01

2016/01/01

2016/01/01

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2017/01/01

2017/01/01

2017/01/01

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Port Assignment

Port Assignment

Port Assignment

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A

A

A

LA-E151P

LA-E151P

LA-E151P

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Date: Sheet

Date: Sheet

Date: Sheet

361

361

361

1

of

of

of

0.2

0.2

0.2

5

4

3

2

1

RUN_ON

3.3V_CAM_EN#

CPU PWR

PCH PWR

GT3 PWR

Peripheral Device PWR

TYPE-C Power

GPU PWR

+5V_TSP

+5V_RUN_AUDIO

+1.8V_RUN

+3.3V_CAM

+3.3V_RUN_AUDIO

SIO_SLP_SUS#

SY8210A

D D

Barrel
ADAPTER

CHARGER
ISL88738
(PU801)

Type-C
ADAPTER

+PWR_SRC

(PU200)

SYX198D
(PU301)

SY8288C
(PU102)

SIO_SLP_S4#

0.6V_DDR_VTT_ON

SIO_SLP_SUS#

ALWON

+1.2V_MEM

+0.6V_DDR_VTT

+1.0V_PRIM

+5V_ALW

TPS22961
(UZ26)

+5V_ALW2

BATTERY

SY8288B

C C

(PU100)

ALWON

+3.3V_RTC_LDO

+3.3V_ALW2

+3.3V_ALW

ISL95857
(PU602)

ISL95857
(PU604)

IMVP_VR_ON

+VCC_SA +VCC_GT

B B

+5V_ALW

+PP_HV(5V~20V)

AP2204
(UT8)

IMVP_VR_ON

+5V_TBT_VBUS

ISL95857
(PU603)

IMVP_VR_ON

+VCC_CORE

+5V_ALW

TPS65982
(UT5)

AO6405
(QV1)

EN_INVPWR

+BL_PWR_SRC

AP2112K
(UT7)

!"#$%&

+TBT_VBUS(5V~20V)

+3.3V_TBT_SX

SIO_SLP_S4#

TPS62134C
(PU401)

TPS62134D
(PU402)

EM5209
(UZ4)

SLGC55544C
(UI3)

SY6288
(UI1)

SY6288
(UI2)

AP3402KTTR
(PU501)

EM5209
(UZ2)

EM5209
(UZ3)

EM5209
(UZ4)

G524B1T11U
(UV24)

AOZ1336
(UT13)

TPS22967
(UZ18)

AP7175SP
(PU503)

+VCC_SFR_OC

RUN_ON

SIO_SLP_SUS#

RUN_ON

USB_PWR_SHR_EN#

USB_PWR_EN1#

USB_PWR_EN2#

SIO_SLP_SUS#

SIO_SLP_LAN#

AUX_EN_WOWL

@SIO_SLP_W LAN#

SIO_SLP_SUS#

@PCH_ALW _ON

RUN_ON

3.3V_WWAN_EN

ENVCC_PCH

TBT_PW R_E N

CV2_ON

SIO_SLP_S4#

TPS22961
(UZ19)

TPS22961
(UZ21)

+1.0VS_VCCIO

+1.0V_PRIM_CORE

+5V_RUN

+5V_USB_CHG_PWR

+USB_EX2_PWR

+USB_EX3_PWR

+1.8V_PRIM

+3.3V_LAN

+3.3V_WLAN

+3.3V_ALW_PCH

+3.3V_RUN

+3.3V_WWAN

+LCDVDD

+3.3V_TBT

+3.3V_CV2

+2.5V_MEM

for DDR4

USH/B

RUN_ON
SIO_SLP_S0#

SIO_SLP_S4#

LP2301
(QV8)

EM5209
(@UZ5)

AOZ1336
(UZ8)

LP2301A
(QZ1)

EM5209
(@UZ5)

+1.0V_VCCSTG

+1.0V_VCCST

3.3V_TS_EN

AUD_PWR_EN

AUD_PWR_EN

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

2016/01/01

2016/01/01

2016/01/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2017/01/01

2017/01/01

2017/01/01

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Power Rails

Power Rails

Power Rails

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-E151P

LA-E151P

LA-E151P

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

461

461

461

0.2

0.2

0.2

5

4

3

2

1

499

499

1K

1K

2.2K

2.2K

@2.2K

@2.2K

2.2K

2.2K

+3.3V_ALW_PCH

+3.3V_ALW_PCH

+3.3V_TP

+3.3V_ALW

+3.3V_ALW

DMN66D0LDW-7
DMN66D0LDW-7

DMN66D0LDW-7
DMN66D0LDW-7

28

31

LOM

UPD1_SMBCLK_Q
UPD1_SMBDAT_Q

2.2K

2.2K

2.2K

2.2K

9

TP

8

+3.3V_CV2

M9

USH

L9

+3.3V_TBT_FLASH

USH/B

B5
A5

SMBUS Address [0x9a]

AW44
BB43

D D

PCH

AY44
BB39

AW42

AW45

SML1_SMBDATA

SML1_SMBCLK

E11 D8

03

03

02
02

C C

01
01

00 D7
00

KBC

04
04

MEM_SMBCLK
MEM_SMBDATA

SML0_SMBCLK
SML0_SMBDATA

1K

1K

C12
E10

B3
E5

E7

C3

B4

+3.3V_ALW_PCH

DAT_TP_SIO_I2C_CLK
CLK_TP_SIO_I2C_DAT

USH_SMBCLK

USH_SMBDAT

UPD1_SMBCLK
UPD1_SMBDAT

PD &
FW reflash

2.2K

2.2K

+3.3V_RUN

202
200

202

200

53
51

1
4

DIMMA

DIMMB

XDP

LNG2DMTR

MEC 5105

F7

05

B6

05

A12

06

N10

B B

A A

5

06

07
07

08

09

09

10
10

EXPANDER_GPU_SMCLK

M4

EXPANDER_GPU_SMDATA

M7

C508
C8

F6

E9

N2

PBAT_CHARGER_SMBCLK

M3

PBAT_CHARGER_SMBDAT

2.2K

2.2K

+3.3V_ALW

EXPANDER

2.2K

2.2K

+3.3V_ALW

100 ohm

100 ohm

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

7
6

2016/01/01

2016/01/01

2016/01/01

Charger

BATTERY
CONN

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2017/01/01

2017/01/01

2017/01/01

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SMbus Block Diagram

SMbus Block Diagram

SMbus Block Diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

LA-E151P

LA-E151P

LA-E151P

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Date: Sheet

Date: Sheet

Date: Sheet of

1

of

of

561

561

561

0.2

0.2

0.2

5

D D

C C

B B

+1.0VS_VCCIO

1 2

RC2 24.9_0402_1%

Trace width=5 mils
,Spacing=15mil
Max length= 600 mils.

A A

PEG_COMP

4

UC1C

E25

PEG_RXP[0]

D25

PEG_RXN[0]

E24

PEG_RXP[1]

F24

PEG_RXN[1]

E23

PEG_RXP[2]

D23

PEG_RXN[2]

E22

PEG_RXP[3]

F22

PEG_RXN[3]

E21

PEG_RXP[4]

D21

PEG_RXN[4]

E20

PEG_RXP[5]

F20

PEG_RXN[5]

E19

PEG_RXP[6]

D19

PEG_RXN[6]

E18

PEG_RXP[7]

F18

PEG_RXN[7]

D17

PEG_RXP[8]

E17

PEG_RXN[8]

F16

PEG_RXP[9]

E16

PEG_RXN[9]

D15

PEG_RXP[10]

E15

PEG_RXN[10]

F14

PEG_RXP[11]

E14

PEG_RXN[11]

D13

PEG_RXP[12]

E13

PEG_RXN[12]

F12

PEG_RXP[13]

E12

PEG_RXN[13]

D11

PEG_RXP[14]

E11

PEG_RXN[14]

F10

PEG_RXP[15]

E10

PEG_RXN[15]

PEG_COMP

DMI_CRX_PTX_P0<17>
DMI_CRX_PTX_N0<17> DMI_CTX_PRX_N0 <17>

DMI_CRX_PTX_P1<17>
DMI_CRX_PTX_N1<17>

DMI_CRX_PTX_P2<17>
DMI_CRX_PTX_N2<17>

DMI_CRX_PTX_P3<17>
DMI_CRX_PTX_N3<17>

DMI_CRX_PTX_P0
DMI_CRX_PTX_N0

DMI_CRX_PTX_P1
DMI_CRX_PTX_N1

DMI_CRX_PTX_P2
DMI_CRX_PTX_N2

DMI_CRX_PTX_P3
DMI_CRX_PTX_N3

G2

PEG_RCOMP

D8

DMI_RXP[0]

E8

DMI_RXN[0]

E6

DMI_RXP[1]

F6

DMI_RXN[1]

D5

DMI_RXP[2]

E5

DMI_RXN[2]

J8

DMI_RXP[3]

J9

DMI_RXN[3]

SKL-H_BGA1440

3

SKYLAKE_HALO

3 OF 14

Rev_1.0

PEG_TXP[0]
PEG_TXN[0]

PEG_TXP[1]
PEG_TXN[1]

PEG_TXP[2]
PEG_TXN[2]

PEG_TXP[3]
PEG_TXN[3]

PEG_TXP[4]
PEG_TXN[4]

PEG_TXP[5]
PEG_TXN[5]

PEG_TXP[6]
PEG_TXN[6]

PEG_TXP[7]
PEG_TXN[7]

PEG_TXP[8]
PEG_TXN[8]

PEG_TXP[9]
PEG_TXN[9]

PEG_TXP[10]
PEG_TXN[10]

PEG_TXP[11]
PEG_TXN[11]

PEG_TXP[12]
PEG_TXN[12]

PEG_TXP[13]
PEG_TXN[13]

PEG_TXP[14]
PEG_TXN[14]

PEG_TXP[15]
PEG_TXN[15]

DMI_TXP[0]
DMI_TXN[0]

DMI_TXP[1]
DMI_TXN[1]

DMI_TXP[2]
DMI_TXN[2]

DMI_TXP[3]
DMI_TXN[3]

B25
A25

B24
C24

B23
A23

B22
C22

B21
A21

B20
C20

B19
A19

B18
C18

A17
B17

C16
B16

A15
B15

C14
B14

A13
B13

C12
B12

A11
B11

C10
B10

B8
A8

C6
B6

B5
A5

D4
B4

DMI_CTX_PRX_P0
DMI_CTX_PRX_N0

DMI_CTX_PRX_P1
DMI_CTX_PRX_N1

DMI_CTX_PRX_P2
DMI_CTX_PRX_N2

DMI_CTX_PRX_P3
DMI_CTX_PRX_N3

2

DMI_CTX_PRX_P0 <17>

DMI_CTX_PRX_P1 <17>
DMI_CTX_PRX_N1 <17>

DMI_CTX_PRX_P2 <17>
DMI_CTX_PRX_N2 <17>

DMI_CTX_PRX_P3 <17>
DMI_CTX_PRX_N3 <17>

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2016/01/01

2016/01/01

2016/01/01

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2017/01/01

2017/01/01

2017/01/01

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

KBL-H (1/8)

KBL-H (1/8)

KBL-H (1/8)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A

A

A

LA-E151P

LA-E151P

LA-E151P

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Date: Sheet

Date: Sheet

Date: Sheet

661

661

661

1

of

of

of

0.2

0.2

0.2

5

+3.3V_ALW_PCH

XDP@

1.5K_0402_5%

12

RC133

SYS_PWROK_R

0.1U_0402_25V6

@

1

D D

C C

B B

A A

CC33

2

+3.3V_ALW

1.5K_0402_5%

XDP@

12

RC241

SIO_PWRBTN#

0.1U_0402_25V6

XDP@

1

CC269

2

+1.0V_PRIM_XDP

RC138 51_0402_5%@

+1.0VS_VCCIO

RC132 150_0402_5%

+1.0V_VCCSTG

RC83 1K_0402_5%

+1.0V_VCCST

RC80 1K_0402_5%
RC166 1K_0402_5%@
RC71 1K_0402_5%
RC79 49.9_0402_1%@

+1.0V_VCCST

RC218 150_0402_5%@

RC219 10K_0402_5%@

VR_SVID_DATA<54>

VR_SVID_ALERT#<54>

Place near JXDP1.47

Place near JXDP1.41

CPU_XDP_PREQ#

1 2

FIVR_EN_R

1 2

H_PROCHOT#

1 2

H_THERMTRIP#

1 2

PCH_JTAGX

1 2

VCCST_ PWRGD

1 2

H_CATERR#

1 2

FIVR_EN

1 2

FIVR_EN

1 2

VR_SVID_DATA
VR_SVID_ALERT#

H_PWRGD VCCST _PWRGD H_THERMTRIP# H_PROCHOT#

100P_0402_50V8J

12

CC300ESD@

100P_0402_50V8J

12

CC301ESD@

5

+1.0V_PRIM

RC216 0_0603_1%@

PCH_RSMRST#_AND<20,44>

T191

SIO_PWRBTN#<20,37>

PCH_SPI_D0<19>
SYS_PWROK<20,37>

+1.0V_VCCST

56.2_0402_1%

100_0402_5%

12

12

RC152

220_0402_5%

12

RC153

VR_SVID_DATA

CPU_VIDALERT#

0.1U_0402_25V6

@ESD@

12

CC323

ESD Request:place near CPU side

1 2

Place near JXDP1

@

RC157

+1.0V_PRIM_XDP

0.1U_0402_25V6

@

1

CC28

2

PAD~D

+1.0V_PRIM_XDP

0.1U_0402_25V6

@

1

CC29

2

FIVR_EN
CFG0

0.1U_0402_25V6

@ESD@

12

CC324

VR_SVID_CLK<54>

H_PROCHOT#<37,54,57>
DDR_VTT_CTRL<14>

RC124 1K_0402_5%XDP@
RC217 0_0402_5%@

RC126 1K_0402_5%XDP@
RC128 1K_0402_5%XDP@
RC129 0_0402_5%@

VCCST_ PWRGD<37,38>
H_PWRGD<20>

PLTRST_CPU#<16>
H_PM_SYNC<16>
H_PM_DOWN<16>
H_PECI<16,37>
H_THERMTRIP#<14,15,16,38>

4

CPU_XDP_PREQ#
CPU_XDP_PRDY#

CFG0
CFG1

CFG2
CFG3

XDP_OBS0_R
XDP_OBS1_R

CFG4
CFG5

CFG6
CFG7

1 2
1 2

1 2
1 2
1 2

DDR_XDP_WAN_SMBDAT<14,15,20,41>
DDR_XDP_WAN_SMBCLK<14,15,20,41>
PCH_JTAG_TCK<20>

H_VCCST_PWRGD_XDP
SIO_PWRBTN#

FIVR_EN_R

SYS_PWROK_R

CPU_XDP_TCLK

PCH_CPU_BCLK_R_D<18>
PCH_CPU_BCLK_R_D#<18>

PCH_CPU_PCIBCLK_R_D<18>
PCH_CPU_PCIBCLK_R_D#<18>

CPU_24MHZ_R_D<18>
CPU_24MHZ_R_D#<18>

VR_SVID_CLK
H_PROCHOT#
DDR_VTT_CTRL

VCCST_ PWRGD VCCST_ PWRGD_CPU
H_PWRGD

PLTRST_CPU#
H_PM_SYNC

H_PECI
H_THERMTRIP# H_THERMTRIP#_R

1 2

RC84 499_0402_1%

1 2

RC78 60.4_0402_1%

1 2

RC168 20_0402_5%

1 2

RC169 0_0402_5%

1 2
1 2

RC319 0_0402_5%
RC171 0_0402_5%@

'()'*+,*-.

VR_SVID_CLK

4

1 2

CC325@RF@ 33P_0402_50V8J

Place close CPU side

3

CPU XDP

+1.0V_PRIM_XDP

XDP_PRSNT_PIN1

11
13
15
17
19
21
23
25
27
29
31
33
35
37

41
43
45
47
49
51
53
55
57
59

CPU_XDP_TDO H_VCCST_PWRGD_XDP CPU_XDP_TRST#

0.1U_0402_25V6

@ESD@

12

CC306

PCH_CPU_BCLK_R_D
PCH_CPU_BCLK_R_D#

PCH_CPU_PCIBCLK_R_D
PCH_CPU_PCIBCLK_R_D#

CPU_24MHZ_R_D
CPU_24MHZ_R_D#

CPU_VIDALERT#
VR_SVID_DATA

H_PROCHOT#_R

XDP@

1 2
1 2

Not link CIS

0.1U_0402_25V6

@ESD@

12

CC307

B31
A32

D35
C36

E31
D31

BH31
BH32
BH29
BR30

BT13

H13

BT31
BP35
BM34
BP31

BT34

J31

BR33

BN1

BM30

CFG3

OBSDATA_C0
OBSDATA_C1

OBSDATA_C2
OBSDATA_C3

OBSDATA_D0
OBSDATA_D1

OBSDATA_D2
OBSDATA_D3

ITPCLK#/HOOK5

VCC_OBS_CD

RESET#/HOOK6

DBR#/HOOK7

UC1E

BCLKP
BCLKN

PCI_BCLKP
PCI_BCLKN

CLK24P
CLK24N

VIDALERT#
VIDSCK
VIDSOUT
PROCHOT#

DDR_VTT_CNTL

VCCST_PWRGD
PROCPWRGD

RESET#
PM_SYNC
PM_DOWN
PECI
THERMTRIP#

SKTOCC#
PROC_SELECT#

CATERR#

SKL-H_BGA1440

RC121 1K_0402_5%
RC122 0_0402_5%@

JXDP1

1

GND0

3

OBSFN_A0

5

OBSFN_A1

7

GND2

9

OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK039ITPCLK/HOOK4
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16

ESD request,Place near JXDP1 side.

H_PM_DOWN_RH_PM_DOWN

H_SKTOCC#
SKL_CNL#

H_CATERR#

+1.0V_PRIM_XDP

2

GND1

4

OBSFN_C0

6

OBSFN_C1

8

GND3

10
12
14

GND5

16
18
20

GND7

22

OBSFN_D0

24

OBSFN_D1

26

GND9

28
30
32

GND11

34
36
38

GND13

40
42
44
46
48
50

GND15

52

TD0

54

TRST#

56

TDI

58

TMS

60

GND17

CONN@SAMTE_BSH-030-01-L-D-A

0.1U_0402_25V6

@ESD@

12

CC308

SKYLAKE_HALO

5 OF 14

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

CFG17
CFG16

CFG8
CFG9

CFG10
CFG11

CFG19
CFG18

CFG12
CFG13

CFG14
CFG15

PCH_XDP_CLK_DP
PCH_XDP_CLK_DN

CPU_XDP_HOOK6
XDP_DBRESET#

CPU_XDP_TDO
CPU_XDP_TRST#
CPU_XDP_TDI
CPU_XDP_TMS

CPU_XDP_PRS

Rev_1.0

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]

CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]

CFG[17]
CFG[16]
CFG[19]
CFG[18]

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]

PROC_TDO

PROC_TDI
PROC_TMS
PROC_TCK

PROC_TRST#
PROC_PREQ#
PROC_PRDY#

CFG_RCOMP

PCH_XDP_CLK_DP <18>
PCH_XDP_CLK_DN <18>

1 2

RC144 0_0402_5%XDP@

XDP_DBRESET# <17>
CPU_XDP_TRST# <22>

1 2

RC127 1K_0402_5%XDP@

CPU_XDP_TMS
CPU_XDP_TDI
CPU_XDP_TDO
CPU_XDP_TCLK
CPU_XDP_PRDY#
CPU_XDP_PREQ#

BN25

CFG0

BN27

CFG1

BN26

CFG2

BN28

CFG3

BR20

CFG4

BM20

CFG5

BT20

CFG6

BP20

CFG7

BR23

CFG8

BR22

CFG9

BT23

CFG10

BT22

CFG11

BM19

CFG12

BR19

CFG13

BP19

CFG14

BT19

CFG15

BN23

CFG17

BP23

CFG16

BP22

CFG19

BN22

CFG18

XDP_OBS0

BR27

XDP_OBS1

BT27
BM31
BT30

CPU_XDP_TDO

BT28

CPU_XDP_TDI

BL32

CPU_XDP_TMS

BP28

CPU_XDP_TCLK

BR28

CPU_XDP_TRST#

BP30

CPU_XDP_PREQ#

BL30

CPU_XDP_PRDY#

BP27

BT25

12

2016/01/01

2016/01/01

2016/01/01

ITP_PMODE_CPU

PCH_SPI_D2_XDP

1 2

RC228 0_0402_5%

1 2

RC229 0_0402_5%

1 2

RC230 0_0402_5%

1 2

RC143 0_0402_5%

1 2

RC314 0_0402_5%@

1 2

RC315 0_0402_5%@

1 2

RC239 0_0402_5%@

1 2

RC240 0_0402_5%@

PAD~D
PAD~D
PAD~D
PAD~D

PAD~D
PAD~D
PAD~D

RC114

49.9_0402_1%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

@

T184

@

T185

@

T180

@

T181

@

T179

@

T190

@

T189

2

ITP_P MODE _CPU <20 >

PCH_SPI_D2_XDP <19>

PCH_JTAG_TMS <20>
PCH_JTAG_TDI <20>
PCH_JTAG_TDO <20>
PCH_JTAGX <20>
PCH_XDP_PRDY# <22>
PCH_XDP_PREQ# <22>

XDP_OBS0_R
XDP_OBS1_R

2017/01/01

2017/01/01

2017/01/01

1

+1.0V_PRIM_XDP

CPU_XDP_HOOK6

XDP_DBRESET#

CPU_XDP_TDO

CPU_XDP_TRST#

CPU_XDP_TCLK

CFG0

CFG2

CFG4

CFG5

CFG6

CFG7

1 2

RC115 2.2K_0402_5%XDP@

1 2

RC137 1.5K_0402_5%XDP@

1 2

RC135 51_0402_5%

1 2

RC136 51_0402_5%@

1 2

RC139 51_0402_5%

12

@

RC321
1K_0402_5%

12

@

RC181
1K_0402_5%

12

RC322
1K_0402_5%

+3.3V_ALW_PCH

+1.0V_VCCSTG

XDP_DBRESET#

Stall reset sequence after PCU
PLL lock until de-asserted

PEG LANE REVERSAL

*

NORMAL
LANE

REVERSED

eDP enable

Disabled

Enabled

12

@

RC323
1K_0402_5%

PCI Express* Bifurcation

1x8, 2x4

Reserved

12

RC324
1K_0402_5%

12

@

RC325
1K_0402_5%

2x8

1x16

PEG Training

(default) PEG Train
immediately following
RESET# de-assertion

PEG Wait for BIOS for
training

0.1U_0402_25V6

1

2

No Stall

Stall

XDP@

CC32

1

0

1

0

1

0

[6:5]

00

01

10

11

1

0

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

KBL-H (2/8)

KBL-H (2/8)

KBL-H (2/8)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

LA-E151P

LA-E151P

LA-E151P

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Date: Sheet

Date: Sheet

Date: Sheet

1

761

761

761

of

of

of

0.2

0.2

0.2

5

DDR_A_DQS#[0..7]<14>
DDR_A_DQS[0..7]<14>
DDR_B_DQS#[0..7]<15>
DDR_B_DQS[0..7]<15>

D D

DDR_A_D[0..15]<14>

DDR_A_D[32..47]<14>

C C

DDR_B_D[0..15]<15>

DDR_B_D[32..47]<15>

B B

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15

DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47

UC1A

BR6

DDR0_DQ[0]

BT6

DDR0_DQ[1]

BP3

DDR0_DQ[2]

BR3

DDR0_DQ[3]

BN5

DDR0_DQ[4]

BP6

DDR0_DQ[5]

BP2

DDR0_DQ[6]

BN3

DDR0_DQ[7]

BL4

DDR0_DQ[8]

BL5

DDR0_DQ[9]

BL2

DDR0_DQ[10]

BM1

DDR0_DQ[11]

BK4

DDR0_DQ[12]

BK5

DDR0_DQ[13]

BK1

DDR0_DQ[14]

BK2

DDR0_DQ[15]

Interleave / Non-Interleaved

BG4

DDR0_DQ[16]/DDR0_DQ[32]

BG5

DDR0_DQ[17]/DDR0_DQ[33]

BF4

DDR0_DQ[18]/DDR0_DQ[34]

BF5

DDR0_DQ[19]/DDR0_DQ[35]

BG2

DDR0_DQ[20]/DDR0_DQ[36]

BG1

DDR0_DQ[21]/DDR0_DQ[37]

BF1

DDR0_DQ[22]/DDR0_DQ[38]

BF2

DDR0_DQ[23]/DDR0_DQ[39]

BD2

DDR0_DQ[24]/DDR0_DQ[40]

BD1

DDR0_DQ[25]/DDR0_DQ[41]

BC4

DDR0_DQ[26]/DDR0_DQ[42]

BC5

DDR0_DQ[27]/DDR0_DQ[43]

BD5

DDR0_DQ[28]/DDR0_DQ[44]

BD4

DDR0_DQ[29]/DDR0_DQ[45]

BC1

DDR0_DQ[30]/DDR0_DQ[46]

BC2

DDR0_DQ[31]/DDR0_DQ[47]

AB1

DDR0_DQ[32]/DDR1_DQ[0]

AB2

DDR0_DQ[33]/DDR1_DQ[1]

AA4

DDR0_DQ[34]/DDR1_DQ[2]

AA5

DDR0_DQ[35]/DDR1_DQ[3]

AB5

DDR0_DQ[36]/DDR1_DQ[4]

AB4

DDR0_DQ[37]/DDR1_DQ[5]

AA2

DDR0_DQ[38]/DDR1_DQ[6]

AA1

DDR0_DQ[39]/DDR1_DQ[7]

V5

DDR0_DQ[40]/DDR1_DQ[8]

V2

DDR0_DQ[41]/DDR1_DQ[9]

U1

DDR0_DQ[42]/DDR1_DQ[10]

U2

DDR0_DQ[43]/DDR1_DQ[11]

V1

DDR0_DQ[44]/DDR1_DQ[12]

V4

DDR0_DQ[45]/DDR1_DQ[13]

U5

DDR0_DQ[46]/DDR1_DQ[14]

U4

DDR0_DQ[47]/DDR1_DQ[15]

R2

DDR0_DQ[48]/DDR1_DQ[32]

P5

DDR0_DQ[49]/DDR1_DQ[33]

R4

DDR0_DQ[50]/DDR1_DQ[34]

P4

DDR0_DQ[51]/DDR1_DQ[35]

R5

DDR0_DQ[52]/DDR1_DQ[36]

P2

DDR0_DQ[53]/DDR1_DQ[37]

R1

DDR0_DQ[54]/DDR1_DQ[38]

P1

DDR0_DQ[55]/DDR1_DQ[39]

M4

DDR0_DQ[56]/DDR1_DQ[40]

M1

DDR0_DQ[57]/DDR1_DQ[41]

L4

DDR0_DQ[58]/DDR1_DQ[42]

L2

DDR0_DQ[59]/DDR1_DQ[43]

M5

DDR0_DQ[60]/DDR1_DQ[44]

M2

DDR0_DQ[61]/DDR1_DQ[45]

L5

DDR0_DQ[62]/DDR1_DQ[46]

L1

DDR0_DQ[63]/DDR1_DQ[47]

BA2

DDR0_ECC[0]

BA1

DDR0_ECC[1]

AY4

DDR0_ECC[2]

AY5

DDR0_ECC[3]

BA5

DDR0_ECC[4]

BA4

DDR0_ECC[5]

AY1

DDR0_ECC[6]

AY2

DDR0_ECC[7]

SKL-H_BGA1440

SKYLAKE_HALO

DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]

DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]

DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#

DDR CH - A

1 OF 14

4

Rev_1.0

DDR0_CKP[0]
DDR0_CKN[0]
DDR0_CKN[1]

DDR0_CKP[1]
DDR0_CLKP[2]
DDR0_CLKN[2]
DDR0_CLKP[3]
DDR0_CLKN[3]

DDR0_CKE[0]

DDR0_CKE[1]

DDR0_CKE[2]

DDR0_CKE[3]

DDR0_CS#[0]

DDR0_CS#[1]

DDR0_CS#[2]

DDR0_CS#[3]

DDR0_ODT[0]

DDR0_ODT[1]

DDR0_ODT[2]

DDR3L / LPDDR3 / DDR4

DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]

DDR0_ODT[3]

DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]

DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]

DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]

DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSN[3]/DDR0_DQSN[5]

DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSP[7]/DDR1_DQSP[5]

DDR0_DQSP[2]/DDR0_DQSP[4]

DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSN[7]/DDR1_DQSN[5]

DDR0_MA[3]
DDR0_MA[4]

DDR0_PAR

DDR0_ALERT#

DDR0_DQSN[0]
DDR0_DQSN[1]

Interleave / Non-Interleaved

DDR0_DQSP[0]
DDR0_DQSP[1]

DDR0_DQSP[8]
DDR0_DQSN[8]

AG1
AG2
AK1
AK2
AL3
AK3
AL2
AL1

AT1
AT2
AT3
AT5

AD5
AE2
AD2
AE5

AD3
AE4
AE1
AD4

AH5
AH1
AU1

AH4
AG4
AD1

AH3
AP4
AN4
AP5
AP2
AP1
AP3
AN1
AN3
AT4
AH2
AN2
AU4
AE3
AU2
AU3

AG3
AU5

BR5
BL3

BG3
BD3
AB3
V3
R3
M3
BP5
BK3
BF3
BC3
AA3
U3
P3
L3

AY3
BA3

DDR_A_CLK0
DDR_A_CLK#0
DDR_A_CLK#1
DDR_A_CLK1

DDR_A_CKE0
DDR_A_CKE1

DDR_A_CS#0
DDR_A_CS#1

DDR_A_ODT0
DDR_A_ODT1

DDR_A_BA0
DDR_A_BA1
DDR_A_BG0

DDR_A_MA16
DDR_A_MA14
DDR_A_MA15

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_BG1
DDR_A_ACT#

DDR_A_PARITY
DDR_A_ALERT#

DDR_A_DQS#0
DDR_A_DQS#1

DDR_A_DQS#4
DDR_A_DQS#5
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS4
DDR_B_DQS5
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS4
DDR_A_DQS5
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#4
DDR_B_DQS#5

DDR_A_CLK0 <14>
DDR_A_CLK#0 <14>
DDR_A_CLK#1 <14>
DDR_A_CLK1 <14>

DDR_A_CKE0 <14>
DDR_A_CKE1 <14>

DDR_A_CS#0 <14>
DDR_A_CS#1 <14>

DDR_A_ODT0 <14>
DDR_A_ODT1 <14>

DDR_A_BA0 <14>
DDR_A_BA1 <14>
DDR_A_BG0 <14>
DDR_A_MA[0..16] <14>

DDR_A_BG1 <14>
DDR_A_ACT# <14>

DDR_A_PARITY <14>
DDR_A_ALERT# <14>

DDR_A_DQS#0 <14>
DDR_A_DQS#1 <14>

DDR_A_DQS#4 <14>
DDR_A_DQS#5 <14>
DDR_B_DQS0 <15>
DDR_B_DQS1 <15>
DDR_B_DQS4 <15>
DDR_B_DQS5 <15>
DDR_A_DQS0 <14>
DDR_A_DQS1 <14>
DDR_A_DQS4 <14>
DDR_A_DQS5 <14>
DDR_B_DQS#0 <15>
DDR_B_DQS#1 <15>
DDR_B_DQS#4 <15>
DDR_B_DQS#5 <15>

3

DDR_A_D[16..31]<14>

DDR_A_D[48..63]<14>

DDR_B_D[16..31]<15>

DDR_B_D[48..63]<15>

RC5 121_0402_1%
RC6 75_0402_1%
RC7 100_0402_1%

1 2
1 2
1 2

DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31

DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

DDR_RCOMP0
DDR_RCOMP1
DDR_RCOMP2

UC1B

Interleave / Non-Interleaved

BT11

DDR1_DQ[0]/DDR0_DQ[16]

BR11

DDR1_DQ[1]/DDR0_DQ[17]

BT8

DDR1_DQ[2]/DDR0_DQ[18]

BR8

DDR1_DQ[3]/DDR0_DQ[19]

BP11

DDR1_DQ[4]/DDR0_DQ[20]

BN11

DDR1_DQ[5]/DDR0_DQ[21]

BP8

DDR1_DQ[6]/DDR0_DQ[22]

BN8

DDR1_DQ[7]/DDR0_DQ[23]

BL12

DDR1_DQ[8]/DDR0_DQ[24]

BL11

DDR1_DQ[9]/DDR0_DQ[25]

BL8

DDR1_DQ[10]/DDR0_DQ[26]

BJ8

DDR1_DQ[11]/DDR0_DQ[27]

BJ11

DDR1_DQ[12]/DDR0_DQ[28]

BJ10

DDR1_DQ[13]/DDR0_DQ[29]

BL7

DDR1_DQ[14]/DDR0_DQ[30]

BJ7

DDR1_DQ[15]/DDR0_DQ[31]

BG11

DDR1_DQ[16]/DDR0_DQ[48]

BG10

DDR1_DQ[17]/DDR0_DQ[49]

BG8

DDR1_DQ[18]/DDR0_DQ[50]

BF8

DDR1_DQ[19]/DDR0_DQ[51]

BF11

DDR1_DQ[20]/DDR0_DQ[52]

BF10

DDR1_DQ[21]/DDR0_DQ[53]

BG7

DDR1_DQ[22]/DDR0_DQ[54]

BF7

DDR1_DQ[23]/DDR0_DQ[55]

BB11

DDR1_DQ[24]/DDR0_DQ[56]

BC11

DDR1_DQ[25]/DDR0_DQ[57]

BB8

DDR1_DQ[26]/DDR0_DQ[58]

BC8

DDR1_DQ[27]/DDR0_DQ[59]

BC10

DDR1_DQ[28]/DDR0_DQ[60]

BB10

DDR1_DQ[29]/DDR0_DQ[61]

BC7

DDR1_DQ[30]/DDR0_DQ[62]

BB7

DDR1_DQ[31]/DDR0_DQ[63]

AA11

DDR1_DQ[32]/DDR1_DQ[16]

AA10

DDR1_DQ[33]/DDR1_DQ[17]

AC11

DDR1_DQ[34]/DDR1_DQ[18]

AC10

DDR1_DQ[35]/DDR1_DQ[19]

AA7

DDR1_DQ[36]/DDR1_DQ[20]

AA8

DDR1_DQ[37]/DDR1_DQ[21]

AC8

DDR1_DQ[38]/DDR1_DQ[22]

AC7

DDR1_DQ[39]/DDR1_DQ[23]

W8

DDR1_DQ[40]/DDR1_DQ[24]

W7

DDR1_DQ[41]/DDR1_DQ[25]

V10

DDR1_DQ[42]/DDR1_DQ[26]

V11

DDR1_DQ[43]/DDR1_DQ[27]

W11

DDR1_DQ[44]/DDR1_DQ[28]

W10

DDR1_DQ[45]/DDR1_DQ[29]

V7

DDR1_DQ[46]/DDR1_DQ[30]

V8

DDR1_DQ[47]/DDR1_DQ[31]

R11

DDR1_DQ[48]

P11

DDR1_DQ[49]

P7

DDR1_DQ[50]

R8

DDR1_DQ[51]

R10

DDR1_DQ[52]

P10

DDR1_DQ[53]

R7

DDR1_DQ[54]

P8

DDR1_DQ[55]

L11

DDR1_DQ[56]

M11

DDR1_DQ[57]

L7

DDR1_DQ[58]

M8

DDR1_DQ[59]

L10

DDR1_DQ[60]

M10

DDR1_DQ[61]

M7

DDR1_DQ[62]

L8

DDR1_DQ[63]

AW11

DDR1_ECC[0]

AY11

DDR1_ECC[1]

AY8

DDR1_ECC[2]

AW8

DDR1_ECC[3]

AY10

DDR1_ECC[4]

AW10

DDR1_ECC[5]

AY7

DDR1_ECC[6]

AW7

DDR1_ECC[7]

G1

DDR_RCOMP[0]

H1

DDR_RCOMP[1]

J2

DDR_RCOMP[2]

SKL-H_BGA1440

2

SKYLAKE_HALO

DDR3L / LPDDR3 / DDR4

DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]

DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]

DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]

DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]

DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]

DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]

DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]

DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]

DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#

Interleave / Non-Interleaved

DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSN[5]/DDR1_DQSN[3]

DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSP[5]/DDR1_DQSP[3]

DDR CH - B

2 OF 14

Rev_1.0

DDR1_CKP[0]
DDR1_CKN[0]
DDR1_CKN[1]

DDR1_CKP[1]
DDR1_CLKP[2]
DDR1_CLKN[2]
DDR1_CLKP[3]
DDR1_CLKN[3]

DDR1_CKE[0]

DDR1_CKE[1]

DDR1_CKE[2]

DDR1_CKE[3]

DDR1_CS#[0]

DDR1_CS#[1]

DDR1_CS#[2]

DDR1_CS#[3]

DDR1_ODT[0]

DDR1_ODT[1]

DDR1_ODT[2]

DDR1_ODT[3]

DDR1_MA[3]
DDR1_MA[4]

DDR1_PAR

DDR1_ALERT#

DDR1_DQSN[6]
DDR1_DQSN[7]

DDR1_DQSP[6]
DDR1_DQSP[7]

DDR1_DQSP[8]
DDR1_DQSN[8]

DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ

AM9
AN9
AM8
AM7
AM11
AM10
AJ10
AJ11

AT8
AT10
AT7
AT11

AF11
AE7
AF10
AE10

AF7
AE8
AE9
AE11

AH10
AH11
AF8

AH8
AH9
AR9

AJ9
AK6
AK5
AL5
AL6
AM6
AN7
AN10
AN8
AR11
AH7
AN11
AR10
AF9
AR7
AT9

AJ7
AR8

BP9
BL9
BG9
BC9
AC9
W9
R9
M9

BR9
BJ9
BF9
BB9
AA9
V9
P9
L9

AW9
AY9

BN13
BP13
BR13

DDR_B_CLK0
DDR_B_CLK#0
DDR_B_CLK#1
DDR_B_CLK1

DDR_B_CKE0
DDR_B_CKE1

DDR_B_CS#0
DDR_B_CS#1

DDR_B_ODT0
DDR_B_ODT1

DDR_B_MA16
DDR_B_MA14
DDR_B_MA15

DDR_B_BA0

DDR_B_BA1
DDR_B_BG0

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_BG1
DDR_B_ACT#

DDR_B_PARITY
DDR_B_ALERT#

DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#6
DDR_A_DQS#7
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DQS#7

DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS6
DDR_A_DQS7
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS6
DDR_B_DQS7

1

+DDR_VREF_CA

PAD~D

+DDR_VREF_B_DQ

DDR_B_CLK0 <15>
DDR_B_CLK#0 <15>
DDR_B_CLK#1 <15>
DDR_B_CLK1 <15>

DDR_B_CKE0 <15>
DDR_B_CKE1 <15>

DDR_B_CS#0 <15>
DDR_B_CS#1 <15>

DDR_B_ODT0 <15>
DDR_B_ODT1 <15>

DDR_B_MA[0..16] <15>

DDR_B_BA0 <15>
DDR_B_BA1 <15>
DDR_B_BG0 <15>

DDR_B_BG1 <15>
DDR_B_ACT# <15>

DDR_B_PARITY <15>
DDR_B_ALERT# <15>

DDR_A_DQS#2 <14>
DDR_A_DQS#3 <14>
DDR_A_DQS#6 <14>
DDR_A_DQS#7 <14>
DDR_B_DQS#2 <15>
DDR_B_DQS#3 <15>
DDR_B_DQS#6 <15>
DDR_B_DQS#7 <15>

DDR_A_DQS2 <14>
DDR_A_DQS3 <14>
DDR_A_DQS6 <14>
DDR_A_DQS7 <14>
DDR_B_DQS2 <15>
DDR_B_DQS3 <15>
DDR_B_DQS6 <15>
DDR_B_DQS7 <15>

@

T199

Trace width=12-15 mils
,Spacing=20mil
Max length= 500 mils.

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2016/01/01

2016/01/01

2016/01/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2017/01/01

2017/01/01

2017/01/01

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

KBL-H (3/8)

KBL-H (3/8)

KBL-H (3/8)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

LA-E151P

LA-E151P

LA-E151P

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Date: Sheet

Date: Sheet

Date: Sheet

1

861

861

861

of

of

of

0.2

0.2

0.2

5

D D

4

3

2

1

CPU_DP1_P0<26>
CPU_DP1_N0<26>
CPU_DP1_P1<26>
CPU_DP1_N1<26>

HDMI

C C

Type C

WIGIG , VGA

B B

CPU_DP1_P2<26>
CPU_DP1_N2<26>
CPU_DP1_P3<26>
CPU_DP1_N3<26>

CPU_DP2_P0<28>
CPU_DP2_N0<28>
CPU_DP2_P1<28>
CPU_DP2_N1<28>
CPU_DP2_P2<28>
CPU_DP2_N2<28>
CPU_DP2_P3<28>
CPU_DP2_N3<28>

CPU_DP2_AUXP<28,29>
CPU_DP2_AUXN<28,29>

CPU_DP3_P0<25>
CPU_DP3_N0<25>
CPU_DP3_P1<25>
CPU_DP3_N1<25>
CPU_DP3_P2<25>
CPU_DP3_N2<25>
CPU_DP3_P3<25>
CPU_DP3_N3<25>

CPU_DP3_AUXP<25>
CPU_DP3_AUXN<25>

CPU_DP1_P0
CPU_DP1_N0
CPU_DP1_P1
CPU_DP1_N1
CPU_DP1_P2
CPU_DP1_N2
CPU_DP1_P3
CPU_DP1_N3

CPU_DP2_P0
CPU_DP2_N0
CPU_DP2_P1
CPU_DP2_N1
CPU_DP2_P2
CPU_DP2_N2
CPU_DP2_P3
CPU_DP2_N3

CPU_DP2_AUXP
CPU_DP2_AUXN

CPU_DP3_P0
CPU_DP3_N0
CPU_DP3_P1
CPU_DP3_N1
CPU_DP3_P2
CPU_DP3_N2
CPU_DP3_P3
CPU_DP3_N3

CPU_DP3_AUXP
CPU_DP3_AUXN

UC1D

K36

DDI1_TXP[0]

K37

DDI1_TXN[0]

J35

DDI1_TXP[1]

J34

DDI1_TXN[1]

H37

DDI1_TXP[2]

H36

DDI1_TXN[2]

J37

DDI1_TXP[3]

J38

DDI1_TXN[3]

D27

DDI1_AUXP

E27

DDI1_AUXN

H34

DDI2_TXP[0]

H33

DDI2_TXN[0]

F37

DDI2_TXP[1]

G38

DDI2_TXN[1]

F34

DDI2_TXP[2]

F35

DDI2_TXN[2]

E37

DDI2_TXP[3]

E36

DDI2_TXN[3]

F26

DDI2_AUXP

E26

DDI2_AUXN

C34

DDI3_TXP[0]

D34

DDI3_TXN[0]

B36

DDI3_TXP[1]

B34

DDI3_TXN[1]

F33

DDI3_TXP[2]

E33

DDI3_TXN[2]

C33

DDI3_TXP[3]

B33

DDI3_TXN[3]

A27

DDI3_AUXP

B27

DDI3_AUXN

SKL-H_BGA1440

SKYLAKE_HALO

4 OF 14

Rev_1.0

EDP_TXP[0]
EDP_TXN[0]
EDP_TXP[1]
EDP_TXN[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]

EDP_AUXP
EDP_AUXN

EDP_DISP_UTIL

EDP_RCOMP

PROC_AUDIO_CLK

PROC_AUDIO_SDI

PROC_AUDIO_SDO

EDP_TXP0

D29

EDP_TXN0

E29

EDP_TXP1

F28

EDP_TXN1

E28
B29
A29
B28
C28

EDP_AUXP

C26

EDP_AUXN

B26

A33

EDP_COMP

D37

AUD_AZACPU_SCLK

G27

AUD_AZACPU_SDO

G25

AUD_AZACPU_SDI

G29

AUD_AZACPU_SDI AUD_AZACPU_SDI_R

@

T194

PAD~D

RC66 20_0402_5%

1 2

EDP_TXP0 <32>
EDP_TXN0 <32>
EDP_TXP1 <32>
EDP_TXN1 <32>

EDP_AUXP <32>
EDP_AUXN <32>

AUD_AZACPU_SCLK <20>
AUD_AZACPU_SDO <20>

EDP_COMP

Trace width=5 mils
,Spacing=20mil
Max length= 600 mils.

AUD_AZACPU_SDI_R <20>

+1.0VS_VCCIO

1 2

RC1 24.9_0402_1%

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2016/01/01

2016/01/01

2016/01/01

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2017/01/01

2017/01/01

2017/01/01

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

KBL-H (4/8)

KBL-H (4/8)

KBL-H (4/8)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A

A

A

LA-E151P

LA-E151P

LA-E151P

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Date: Sheet

Date: Sheet

Date: Sheet

961

961

961

1

of

of

of

0.2

0.2

0.2

5

D D

+VCC_EDRAM

3.3A

+VCC_EDRAM_ED2

C C

+VCC_EOPIO

+VCC_EOPIO_ED2

B B

3.2A

BJ17
BJ19
BJ20
BK17
BK19
BK20
BL16
BL17
BL18
BL19
BL20
BL21
BM17
BN17

BJ23
BJ26
BJ27
BK23
BK26
BK27
BL23
BL24
BL25
BL26
BL27
BL28
BM24

BL15
BM16

BL22
BM22

BP15
BR15
BT15

BP16
BR16
BT16

BN15
BM15

BP17
BN16

BM14
BL14

BJ35
BJ36

AT13

AW13

AU13
AY13

BT29
BR25
BP25

4

UC1J

VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

VCCOPC_SENSE
VSSOPC_SENSE

RSVD
RSVD

VCCEOPIO
VCCEOPIO
VCCEOPIO

RSVD
RSVD
RSVD

VCCEOPIO_SENSE
VSSEOPIO_SENSE

RSVD
RSVD

VCC_OPC_1P8
VCC_OPC_1P8

RSVD
RSVD

ZVM#
MSM#

ZVM2#
MSM2#

OPC_RCOMP
OPCE_RCOMP
OPCE_RCOMP2

SKL-H_BGA1440

SKYLAKE_HALO

10 OF 14

Rev_1.0

3

T1PAD~D @
T2PAD~D @
T3PAD~D @
T4PAD~D @

T5PAD~D @
T6PAD~D @

T7PAD~D @
T9PAD~D @

T10PAD~D @
T11PAD~D @
T8PAD~D @

T14PAD~D @
T13PAD~D @
T15PAD~D @
T12PAD~D @

TP_SKL_F30
TP_SKL_E30

PCH_2_CPU_TRIGGER
CPU_2_PCH_TRIGGER_R

TP_SKL_F30
TP_SKL_E30

T18PAD~D @
T19PAD~D @

T21PAD~D @
T20PAD~D @

T23PAD~D @
T24PAD~D @
T22PAD~D @

1 2

RC177 30_0402_5%

1 2
1 2

RC178 0_0402_5%@
RC179 0_0402_5%@

CPU_2_PCH_TRIGGER_RCPU_2_PCH_TRIGGER

PCH_2_CPU_TRIGGER<22>

CPU_2_PCH_TRIGGER<22>

BN35

BN33

BL34

AE29
AA14

BR35
BR31
BH30

D1
E1
E3
E2

BR1

BT2

J24

H24

N29
R14

A36
A37

H23

J23

F30
E30

B30
C30

G3
J3

2

UC1K

RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP

RSVD_TP
RSVD_TP

RSVD
RSVD

RSVD
RSVD
RSVD

RSVD
RSVD
RSVD
RSVD

RSVD
RSVD

PROC_TRIGIN
PROC_TRIGOUT

RSVD
RSVD

RSVD
RSVD

RSVD
RSVD

RSVD
RSVD
RSVD

SKL-H_BGA1440

SKYLAKE_HALO

11 OF 14

Rev_1.0

RSVD_TP
RSVD_TP

RSVD_TP
RSVD_TP

RSVD
RSVD

RSVD_TP
RSVD_TP

RSVD_TP
RSVD_TP

RSVD
RSVD

RSVD
RSVD

RSVD_TP
RSVD_TP

RSVD
RSVD
RSVD

NCTF
NCTF
NCTF
NCTF
NCTF
NCTF

1

BM33
BL33

BJ14
BJ13

BK28
BJ28

BJ18

VSS

BJ16
BK16

BK24
BJ24

BK21
BJ21

BT17
BR17

BK18

VSS

BJ34
BJ33

G13
AJ8
BL31

B2
B38
BP1
BR2
C1
C38

T26 PAD~D@
T25 PAD~D@

T28 PAD~D@
T27 PAD~D@

T29 PAD~D@
T30 PAD~D@

T31 PAD~D@

T32 PAD~D@

T34 PAD~D@
T33 PAD~D@

T36 PAD~D@
T35 PAD~D@

T37 PAD~D@

T38 PAD~D@

T39 PAD~D@
T40 PAD~D@

T42 PAD~D@
T41 PAD~D@
T44 PAD~D@

T43 PAD~D@
T45 PAD~D@
T46 PAD~D@
T47 PAD~D@
T48 PAD~D@
T49 PAD~D@

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2016/01/01

2016/01/01

2016/01/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2017/01/01

2017/01/01

2017/01/01

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

KBL-H (5/8)

KBL-H (5/8)

KBL-H (5/8)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

LA-E151P

LA-E151P

LA-E151P

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Date: Sheet

Date: Sheet

Date: Sheet

1

10 61

10 61

10 61

of

of

of

0.2

0.2

0.2

5

4

3

2

1

+VCC_GT

BG34
BG35
BG36
BH33
BH34

D D

C C

BH35
BH36
BH37
BH38

BJ37
BJ38
BL36

BL37
BM36
BM37
BN36
BN37
BN38
BP37
BP38
BR37
BT37
BE38
BF13
BF14
BF29
BF30
BF31
BF32
BF35
BF36
BF37
BF38
BG29
BG30
BG31
BG32
BG33
BC36
BC37
BC38
BD13
BD14
BD29
BD30
BD31
BD32
BD33
BD34
BD35
BD36
BE31
BE32
BE37

UC1H

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

SKL-H_BGA1440

SKYLAKE_HALO

8 OF 14

Rev_1.0

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

AV29
AV30
AV31
AV32
AV33
AV34
AV35
AV36
AW14
AW31
AW32
AW33
AW34
AW35
AW36
AW37
AW38
AY29
AY30
AY31
AY32
AY35
AY36
AY37
AY38
BA13
BA14
BA29
BA30
BA31
BA32
BA33
BA34
BA35
BA36
BB13
BB14
BB31
BB32
BB33
BB34
BB35
BB36
BB37
BB38
BC29
BC30
BC31
BC32
BC35
BE33
BE34
BE35
BE36

+VCC_GT

+1.0VS_VCCIO

+VCC_SA

AG12

J30
K29
K30
K31
K32
K33
K34
K35
L31
L32
L35
L36
L37

L38
M29
M30
M31
M32
M33
M34
M35
M36

G15
G17
G19
G21
H15
H16
H17
H19
H20
H21
H26
H27

J15
J16
J17
J19
J20
J21
J26
J27

UC1I

VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA

VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO

SKL-H_BGA1440

SKYLAKE_HALO

9 OF 14

Rev_1.0

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDDQC

VCCPLL_OC
VCCPLL_OC

VCCST
VCCSTG
VCCSTG

VCCPLL
VCCPLL

VCCSA_SENSE
VSSSA_SENSE

VCCIO_SENSE
VSSIO_SENSE

AA6
AE12
AF5
AF6
AG5
AG9
AJ12
AL11
AP6
AP7
AR12
AR6
AT12
AW6
AY6
J5
J6
K12
K6
L12
L6
R6
T6
W6

Y12
BH13

G11

H30
H29
G30
H28

J28

M38
M37

H14
J14

+1.2V_MEM

12A

+VCC_VDDQ_CLK
+VCC_SFR_OC

+1.0V_VCCST
+1.0V_VCCSTG

+VCC_FUSEPRG

+1.0V_VCCSFR

VCC_SA_ SENSE <54>
VSS_SA_S ENSE <5 4>

VCC_IO_S ENSE <52>
VSS_IO_SENSE < 52>

1 2

RC220 0_0402_5%

+1.0V_VCCSTG +1.0V_VCCST

1 2

RZ151 0_0402_5%@

+VCCPLL_OC source

1 2

RC326 0_0603_5%

+1.2V_MEM+VCC_VDDQ_CLK

VCCSTG_EN

SIO_SLP_SUS#<20,37,46,51,53>
SIO_SLP_S4#<11,20,21,37,50,53>

+1.0V_VCCSTG

RZ120 0_0402_5%

+VCC_SFR_OC

1

2

CC322

RF@

2.2P_0402_50V8C

'()'*+,*-.

1 2

CZ102 1U_0402_6.3V6K

+5V_ALW

1 2

+3.3V_ALW

@

CZ104

1 2

0.1U_0402_10V7K

5

1

P

B

4

Y

2

A

G

UZ34

@

TC7SH08FU_SSOP5

3

+1.2V_MEM

PDDG page19, if don`t support DS3, contact to VDDQ directly

+VCC_SFR_OC

1 2

RZ119 0_0402_5%@

UZ26

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

TPS22961DNYR_WSON8

VOUT

GND

6

5

1 2

CZ103 0.1U_0201_10V6K

VOUT

GND

+1.0V_VCCSTG

6

5

4

12

PJP2

PAD-OPEN1x1m

+1.0V_VCCSTG_C

1 2

CZ106 0.1U_0402_10V7K

+1.0V_PRIM

+5V_ALW

1U_0402_6.3V6K

1

CZ100

2

SIO_SLP_S4#<11,20,21,37,50,53>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2016/01/01

2016/01/01

2016/01/01

+1.0V_VCCST source

UZ21

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

TPS22961DNYR_WSON8

4.4mohm/6A
TR=12.5us@Vin=1.05V

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

VOUT

GND

2

6

5

2017/01/01

2017/01/01

2017/01/01

+1.0V_VCCST_C

+1.0V_VCCST

PJP1

12

PAD-OPEN1x1m

0.1U_0402_10V7K

1

CZ101

2

+1.0V_VCCSFR

1 2

RC304 0_0402_5%

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

KBL-H (6/8)

KBL-H (6/8)

KBL-H (6/8)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

LA-E151P

LA-E151P

LA-E151P

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Date: Sheet

Date: Sheet

Date: Sheet

1

11 61

11 61

11 61

of

of

of

0.2

0.2

0.2

B B

SIO_SLP_S0#<20,21,39,52>

RUN_ON<37,38,46,52>

SN74AHC1G08DCKR_SC70-5

A A

5

+1.0V_VCCSTG source

+5V_ALW

1U_0402_6.3V6K

1

CZ105

2

+3.3V_ALW

5

1

P

IN1

VCCSTG_EN

4

O

2

IN2

RZ320 0_0402_5%@

G

3

1 2

UZ35

+1.0V_PRIM

UZ19

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

TPS22961DNYR_WSON8

4.4mohm/6A
TR=12.5us@Vin=1.05V

5

4

3

2

1

12

1

2

1U_0402_6.3V6K

2

1

22U_0603_6.3V6M

CC187

10U_0603_6.3V6M~D

CC167

PLACE CAP BACKSIDE

+1.0V_VCCSFR +1.0V_VCCST

1U_0402_6.3V6K

2

CC186

CC195

1

22U_0603_6.3V6M

CC272

12

+VCC_SFR_OC

1U_0402_6.3V6K

2

CC192

1

1U_0402_6.3V6K

2

CC191

1

1U_0402_6.3V6K

1U_0402_6.3V6K

2

2

CC210

1

1

'*/01*).0)#02*3)456&&789):;<=

+VCC_GT

SKYLAKE_HALO

UC1N

AJ29

VCCGT

CC209

AJ30
AJ31
AJ32
AJ33
AJ34
AJ35
AJ36
AK31
AK32
AK33
AK34
AK35
AK36
AK37
AK38
AL13
AL29
AL30
AL31
AL32
AL35
AL36
AL37
AL38
AM13
AM14
AM29
AM30
AM31
AM32
AM33
AM34
AM35
AM36
AN13
AN14
AN31
AN32
AN33
AN34
AN35
AN36
AN37
AN38
AP13
AP14
AP29
AP30
AP31
AP32
AP35
AP36
AP37
AP38
AR29
AR30
AR31
AR32
AR33
AR34
AR35
AR36
AT14
AT31
AT32
AT33
AT34
AT35
AT36
AT37
AT38
AU14
AU29
AU30
AU31
AU32
AU35
AU36
AU37
AU38

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

SKL-H_BGA1440

14 OF 14

Rev_1.0

VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX

VCCGT_SENSE

VSSGTX_SENSE

VSSGT_SENSE

VCCGTX_SENSE

+VCC_GTU

AF29
AF30
AF31
AF32
AF33
AF34
AG13
AG14
AG31
AG32
AG33
AG34
AG35
AG36
AH13
AH14
AH29
AH30
AH31
AH32
AJ13
AJ14

'*-*31*)>03)80?@*3ABC

AH38
AH35
AH37
AH36

VCC_GT _SENSE <54>
VSS_GT_SENSE <54>

+VCC_CORE

SKYLAKE_HALO

UC1G

AA13

VCC

AA31

VCC

AA32

VCC

AA33

VCC

AA34

VCC

AA35

VCC

AA36

VCC

AA37

VCC

AA38

VCC

AB29

VCC

AB30

VCC

AB31

VCC

AB32

VCC

AB35

VCC

AB36

VCC

AB37

VCC

AB38

VCC

AC13

VCC

AC14

VCC

AC29

VCC

AC30

VCC

AC31

VCC

AC32

VCC

AC33

VCC

AC34

VCC

AC35

VCC

AC36

VCC

AD13

VCC

AD14

VCC

AD31

VCC

AD32

VCC

AD33

VCC

AD34

VCC

AD35

VCC

AD36

VCC

AD37

VCC

AD38

VCC

AE13

VCC

AE14

VCC

AE30

VCC

AE31

VCC

AE32

VCC

AE35

VCC

AE36

VCC

AE37

VCC

AE38

VCC

AF35

VCC

AF36

VCC

AF37

VCC

AF38

VCC

K13

VCC

K14

VCC

L13

VCC

N13

VCC

N14

VCC

N30

VCC

N31

VCC

N32

VCC

N35

VCC

N36

VCC

N37

VCC

N38

VCC

P13

VCC

VCC_SENSE

VSS_SENSE

7 OF 14

SKL-H_BGA1440

VSS_SEN SE VCC_SENSE

RC221 49.9_0402_1%@

1 2

Rev_1.0

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

V32
V33
V34
V35
V36
V37
V38
W13
W14
W29
W30
W31
W32
W35
W36
W37
W38
Y29
Y30
Y31
Y32
Y33
Y34
Y35
Y36
L14
P29
P30
P31
P32
P33
P34
P35
P36
R13
R31
R32
R33
R34
R35
R36
R37
R38
T29
T30
T31
T32
T35
T36
T37
T38
U29
U30
U31
U32
U33
U34
U35
U36
V13
V14
V31
P14

AG37
AG38

+VCC_CORE

VCC_SENSE

VSS_SEN SE

+VCC_CORE

12

12

100_0402_1%

RC140

100_0402_1%

RC141

VCC_SENSE <54>
VSS_SEN SE <54>

D D

For SKL-H 4+2
Remove VCCOPC/VCCEOPIO/
VCCOPC_1P8 Cap

C C

+1.2V_MEM

B B

+1.2V_MEM DECOUPLING

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

1

CC161

2

2

22U_0603_6.3V6M

12

CC81

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

1

CC170

12

CC168

CC164

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

12

CC82

CC83

10U_0603_6.3V6M~D

1

2

22U_0603_6.3V6M

12

CC84

+VCC_VDDQ_CLK +1.0V_VCCSTG

+1.0VS_VCCIO

PLACE CAP BACKSIDE

10U_0603_6.3V6M~D

1

1

CC163

CC166

2

2

1

2

PLACE CAP BACKSIDE

12

+1.0V_VCCST

10U_0603_6.3V6M~D

1

CC171

2

10U_0603_6.3V6M~D

CC185

22U_0603_6.3V6M

22U_0603_6.3V6M

CC189

CC188

12

1U_0402_6.3V6K

1U_0402_6.3V6K

2

2

CC194

CC193

1

1

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

CC165

CC172

2

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2016/01/01

2016/01/01

2016/01/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2017/01/01

2017/01/01

2017/01/01

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

KBL-H (7/8)

KBL-H (7/8)

KBL-H (7/8)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

LA-E151P

LA-E151P

LA-E151P

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Date: Sheet

Date: Sheet

Date: Sheet

1

12 61

12 61

12 61

of

of

of

0.2

0.2

0.2

5

SKYLAKE_HALO

UC1F

Y38

VSS

Y37

VSS

Y14

VSS

Y13

VSS

Y11

VSS

Y10

VSS

Y9

VSS

Y8

VSS

D D

C C

B B

Y7
W34
W33
W12

W5
W4
W3
W2

W1
V30
V29
V12

V6
U38
U37

U6

T34
T33
T14
T13
T12
T11
T10

T9

T8

T7

T5

T4

T3

T2

T1
R30
R29
R12
P38
P37
P12

P6
N34
N33
N12
N11
N10

N9

N8

N7

N6

N5

N4

N3

N2

N1
M14
M13
M12

M6
L34
L33
L30
L29

K38
K11
K10

K9
K8
K7
K5
K4
K3
K2

SKL-H_BGA1440

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

6 OF 14

Rev_1.0

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NCTFVSS

K1
J36
J33
J32
J25
J22
J18
J10
J7
J4
H35
H32
H25
H22
H18
H12
H11
G28
G26
G24
G23
G22
G20
G18
G16
G14
G12
G10
G9
G8
G6
G5
G4
F36
F31
F29
F27
F25
F23
F21
F19
F17
F15
F13
F11
F9
F8
F5
F4
F3
F2
E38
E35
E34
E9
E4
D33
D30
D28
D26
D24
D22
D20
D18
D16
D14
D12
D10
D9
D6
D3
C37
C31
C29
C27

D38

4

SKYLAKE_HALO

UC1M

BB4

VSS

BB3

VSS

BB2

VSS

BB1

VSS

BA38

VSS

BA37

VSS

BA12

VSS

BA11

VSS

BA10

VSS

BA9

VSS

BA8

VSS

BA7

VSS

BA6

VSS

B9

VSS

AY34

VSS

AY33

VSS

AY14

VSS

AY12

VSS

AW30

VSS

AW29

VSS

AW12

VSS

AW5

VSS

AW4

VSS

AW3

VSS

AW2

VSS

AW1

VSS

AV38

VSS

AV37

VSS

AU34

VSS

AU33

VSS

AU12

VSS

AU11

VSS

AU10

VSS

AU9

VSS

AU8

VSS

AU7

VSS

AU6

VSS

AT30

VSS

AT29

VSS

AT6

VSS

AR38

VSS

AR37

VSS

AR14

VSS

AR13

VSS

AR5

VSS

AR4

VSS

AR3

VSS

AR2

VSS

AR1

VSS

AP34

VSS

AP33

VSS

AP12

VSS

AP11

VSS

AP10

VSS

AP9

VSS

AP8

VSS

AN30

VSS

AN29

VSS

AN12

VSS

AN6

VSS

AN5

VSS

AM38

VSS

AM37

VSS

AM12

VSS

AM5

VSS

AM4

VSS

AM3

VSS

AM2

VSS

AM1

VSS

AL34

VSS

AL33

VSS

AL14

VSS

AL12

VSS

AL10

VSS

AL9

VSS

AL8

VSS

AL7

VSS

AL4

VSS

SKL-H_BGA1440

13 OF 14

Rev_1.0

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS

3

AK30
AK29
AK4
AJ38
AJ37
AJ6
AJ5
AJ4
AJ3
AJ2
AJ1
AH34
AH33
AH12
AH6
AG30
AG29
AG11
AG10
AG8
AG7
AG6
AF14
AF13
AF12
AF4
AF3
AF2
AF1
AE34
AE33
AE6
AD30
AD29
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AC38
AC37
AC12
AC6
AC5
AC4
AC3
AC2
AC1
AB34
AB33
AB6
AA30
AA29
AA12
A30
A28
A26
A24
A22
A20
A18
A16
A14
A12
A10
A9
A6

B37
B3
A34
A4
A3

C17
C13

BT32
BT26
BT24
BT21
BT18
BT14
BT12

BT9

BT5
BR36
BR34
BR29
BR26
BR24
BR21
BR18
BR14
BR12

BR7
BP34
BP33
BP29
BP26
BP24
BP21
BP18
BP14
BP12

BP7
BN34
BN31
BN30
BN29
BN24
BN21
BN20
BN19
BN18
BN14
BN12

BN9

BN7

BN4

BN2

BM38
BM35
BM28
BM27
BM26
BM23
BM21
BM13
BM12

BM9
BM6

BM2
BL29
BK29
BK15
BK14
BJ32
BJ31
BJ25
BJ22
BH14
BH12

BH9
BH8
BH5
BH4

BH1
BG38
BG13
BG12

BF33
BF12
BE29

BE6

BD9

BC34
BC12
BB12

2

C9

UC1L

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SKL-H_BGA1440

SKYLAKE_HALO

12 OF 14

Rev_1.0

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS

C25
C23
C21
C19
C15
C11
C8
C5
BM29
BM25
BM18
BM11
BM8
BM7
BM5
BM3
BL38
BL35
BL13
BL6
BK25
BK22
BK13
BK6
BJ30
BJ29
BJ15
BJ12
BH11
BH10
BH7
BH6
BH3
BH2
BG37
BG14
BG6
BF34
BF6
BE30
BE5
BE4
BE3
BE2
BE1
BD38
BD37
BD12
BD11
BD10
BD8
BD7
BD6
BC33
BC14
BC13
BC6
BB30
BB29
BB6
BB5

C2
BT36
BT35
BT4
BT3
BR38

1

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2016/01/01

2016/01/01

2016/01/01

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2017/01/01

2017/01/01

2017/01/01

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

KBL-H (8/8)

KBL-H (8/8)

KBL-H (8/8)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A

A

A

LA-E151P

LA-E151P

LA-E151P

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Date: Sheet

Date: Sheet

Date: Sheet

1

13 61

13 61

13 61

of

of

of

0.2

0.2

0.2

5

DDR_A_DQS#[0..7]<8>
DDR_A_DQS[0..7]<8>

DDR_A_D[0..15]<8>
DDR_A_D[16..31]<8>
DDR_A_D[32..47]<8>
DDR_A_D[48..63]<8>

DDR_A_MA[0..16]<8>

D D

C C

B B

A A

Layout Note:
Place near JDIMM1

+1.2V_MEM

1

2

1

2

+0.6V_DDR_VTT

DIMM Select

DIMM1

*

DIMM2

DIMM3

DIMM4

Byte[0]
Byte[1]
Byte[2]
Byte[3]

*

Byte[4]
Byte[5]

*

Byte[6]
Byte[7]

10U_0603_6.3V6M

10U_0603_6.3V6M

CD1

CD2

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

CD9

CD10

2

Layout Note:
Place near
JDIMM1.258

10U_0603_6.3V6M

CD22

1

2

SA01SA1

0

1

0

1

DQ[7:0]
DQ[15:8]

DQ[23:16]
DQ[31:24]

DQ[39:32]
DQ[47:40]
DQ[55:48]
DQ[63:56]

1

2

1

2

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

CD3

1U_0402_6.3V6K

CD11

CD23

1

2

0

0

1

5

10U_0603_6.3V6M

10U_0603_6.3V6M

CD4

1

1

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CD12

2

2

1U_0402_6.3V6K

CD24

SA2

0

0

0

0

DQS/DQS#[0]
DQS/DQS#[1]
DQS/DQS#[2]
DQS/DQS#[3]

DQS/DQS#[4]
DQS/DQS#[5]

DQS/DQS#[6]
DQS/DQS#[7]

10U_0603_6.3V6M

CD6

CD5

1

1

2

2

1U_0402_6.3V6K

1

1

CD13

CD14

2

2

12

RD4

@

0_0402_5%

12

RD5

0_0402_5%

330U_D3_2.5VY_R6M

10U_0603_6.3V6M

10U_0603_6.3V6M

330U_2V_M

1

1

@

@

CD17

CD7

CD8

+

2

CD16

+DDR_VREF_A_CA

+2.5V_MEM

12

@

0_0402_5%

12

0_0402_5%

+

2

1

2

1

2

RD8

DIMM1_SA0
DIMM1_SA1
DIMM1_SA2

RD9

CD63

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

1

1

CD18

CD19

CD20

2

2

0.1U_0402_10V6K

2.2U_0402_6.3V6M

@

1

CD26

CD25

2

+3.3V_RUN+3.3V_RUN+3.3V_RUN+3.3V_RUN

12

1

2

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

CD15

2

12

RD6

@

0_0402_5%

12

RD7

0_0402_5%

1

2

RD10
0_0603_5%

2.2U_0402_6.3V6M
CD27

10U_0603_6.3V6M

CD21

+3.3V_RUN_DIMM1

0.1U_0201_10V6K

1

2

4

+1.2V_MEM

JDIMM1

1

DDR_A_D5
DDR_A_D1
DDR_A_DQS#0

DDR_A_DQS0
DDR_A_D2
DDR_A_D3
DDR_A_D9
DDR_A_D8

DDR_A_D15
DDR_A_D10
DDR_A_D33
DDR_A_D36
DDR_A_DQS#4

DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D41
DDR_A_D40

DDR_A_D42
DDR_A_D43

T51

+2.5V_MEM

@

PAD~D

DDR_A_CKE0
DDR_A_BG1

DDR_A_BG0
DDR_A_MA12

DDR_A_MA9
DDR_A_MA8

DDR_A_MA6
DDR_A_MA3

DDR_A_MA1
DDR_A_CLK0

DDR_A_CLK#0
DDR_A_PARITY

DDR_A_BA1
DDR_A_CS#0

DDR_A_MA14
DDR_A_ODT0

DDR_A_CS#1
DDR_A_ODT1

DDR_A_D17
DDR_A_D21
DDR_A_DQS#2

DDR_A_DQS2
DDR_A_D22
DDR_A_D19
DDR_A_D25
DDR_A_D26

DDR_A_D28
DDR_A_D29

DDR_A_D49
DDR_A_D50
DDR_A_DQS#6

DDR_A_DQS6
DDR_A_D55
DDR_A_D51
DDR_A_D60
DDR_A_D59

DDR_A_D61
DDR_A_D58

+3.3V_RUN_DIMM1

DDR_A_CKE0<8>
DDR_A_BG1<8>

DDR_A_BG0<8>

DDR_A_CLK0<8>
DDR_A_CLK#0<8>

DDR_A_PARITY<8>
DDR_A_BA1<8>

DDR_A_CS#0<8>

DDR_A_ODT0<8>
DDR_A_CS#1<8>

DDR_A_ODT1<8>

CD28

DDR_XDP_WAN_SMBCLK<7,15,20,41>

4

VSS1

3

DQ5

5

VSS3

7

DQ1

9

VSS5
DQS0_c11DM0_n/DBI0_n

13

DQS0_t

15

VSS8

17

DQ7

19

VSS10

21

DQ3

23

VSS12

25

DQ13

27

VSS14

29

DQ9

31

VSS16
DM1_n/DBI_n33DQS1_t

35

VSS17

37

DQ15

39

VSS19

41

DQ10

43

VSS21

45

DQ21

47

VSS23

49

DQ17

51

VSS25
DQS2_c53DM2_n/DBI2_n

55

DQS2_t

57

VSS28

59

DQ23

61

VSS30

63

DQ19

65

VSS32

67

DQ29

69

VSS34

71

DQ25

73

VSS36
DM3_n/DBI3_n75DQS3_t

77

VSS37

79

DQ30

81

VSS39

83

DQ26

85

VSS41

87

CB5/NC

89

VSS43

91

CB1/NC

93

VSS45
DQS8_c95DM8_n/DBI_n/NC

97

DQS8_t

99

VSS48

101

CB2/NC

103

VSS50

105

CB3/NC

107

VSS52

109

CKE0

111

VDD1

113

BG1

115

BG0

117

VDD3

119

A12

121

A9

123

VDD5

125

A8

127

A6

129

VDD7

131

A3

133

A1

135

VDD9

137

CK0_t

139

CK0_c

141

VDD11

143

PARITY

145

BA1

147

VDD13

149

CS0_n

151

WE_n/A14

153

VDD15

155

ODT0

157

CS1_n

159

VDD17

161

ODT1

163

VDD19

165

C1, CS3_n,NC

167

VSS53

169

DQ37

171

VSS55

173

DQ33

175

VSS57

177

DQS4_c

179

DQS4_t

181

VSS60

183

DQ38

185

VSS62

187

DQ34

189

VSS64

191

DQ44

193

VSS66

195

DQ40

197

VSS68

199

DM5_n/DBI5_n

201

VSS69

203

DQ46

205

VSS71

207

DQ42

209

VSS73

211

DQ52

213

VSS75

215

DQ49

217

VSS77

219

DQS6_c

221

DQS6_t

223

VSS80

225

DQ55

227

VSS82

229

DQ51

231

VSS84

233

DQ61

235

VSS86

237

DQ56

239

VSS88

241

DM7_n/DBI7_n

243

VSS89

245

DQ62

247

VSS91

249

DQ58

251

VSS93

253

SCL

255

VDDSPD

257

VPP1

259

VPP2

261

GND1

LCN_DAN05-Q0406-0103
CONN@

3

VSS2
VSS4
VSS6
VSS7
VSS9

VSS11

DQ12

VSS13
VSS15

DQS1_c

VSS18

DQ14

VSS20

DQ11

VSS22

DQ20

VSS24

DQ16

VSS26
VSS27

DQ22

VSS29

DQ18

VSS31

DQ28

VSS33

DQ24

VSS35

DQS3_c

VSS38

DQ31

VSS40

DQ27

VSS42

CB4/NC

VSS44

CB0/NC

VSS46
VSS47

CB6/NC

VSS49

CB7/NC

VSS51

RESET_n

CKE1
VDD2

ACT_n

ALERT_n

VDD4

VDD6

VDD8

EVENT_n/NF

VDD10

CK1_t/NF

CK1_c/NF

VDD12

A10/AP
VDD14

RAS_n/A16

VDD16

CAS_n/A15

VDD18

C0/CS2_n/NC

VREFCA

VSS54

DQ36

VSS56

DQ32

VSS58

DM4_n/DBI4_n

VSS59

DQ39

VSS61

DQ35

VSS63

DQ45

VSS65

DQ41

VSS67
DQS5_c
DQS5_t

VSS70

DQ47

VSS72

DQ43

VSS74

DQ53

VSS76

DQ48

VSS78

DM6_n/DBI6_n

VSS79

DQ54

VSS81

DQ50

VSS83

DQ60

VSS85

DQ57

VSS87
DQS7_c
DQS7_t

VSS90

DQ63

VSS92

DQ59

VSS94

GND2

3

2

+1.2V_MEM

2

DDR_A_D4

4

DQ4

6

DDR_A_D0

8

DQ0

10
12
14

DDR_A_D6

16

DQ6

18

DDR_A_D7

20

DQ2

22

DDR_A_D12

24
26

DDR_A_D13

28

DQ8

30

DDR_A_DQS#1

32

DDR_A_DQS1

34
36

DDR_A_D14

38
40

DDR_A_D11

42
44

DDR_A_D32

46
48

DDR_A_D37

50
52
54
56

DDR_A_D38

58
60

DDR_A_D39

62
64

DDR_A_D44

66
68

DDR_A_D45

70
72

DDR_A_DQS#5

74

DDR_A_DQS5

76
78

DDR_A_D47

80
82

DDR_A_D46

84
86
88
90
92
94
96
98
100
102
104
106

DDR_DRAMRST#_R

108

DDR_A_CKE1

110
112
114
116
118
120

A11

122

A7

124
126

A5

128

A4

130
132

A2

134
136
138
140
142
144

A0

146
148
150

BA0

152
154
156
158

A13

160
162
164
166

SA2

168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
234
236
238
240
242
244
246
248
250
252
254

SDA

256

SA0

258

VTT

260

SA1

262

DDR_A_CKE1 <8>

DDR_A_ACT#

DDR_A_ACT# <8>

DDR_A_ALERT#

DDR_A_ALERT# <8>

DDR_A_MA11
DDR_A_MA7

DDR_A_MA5
DDR_A_MA4

DDR_A_MA2
JDIMM1_EVENT#

DDR_A_CLK1

DDR_A_CLK1 <8>

DDR_A_CLK#1

DDR_A_CLK#1 <8>

DDR_A_MA0
DDR_A_MA10

DDR_A_BA0

DDR_A_BA0 <8>

DDR_A_MA16
DDR_A_MA15

DDR_A_MA13

PAD~D

DIMM1_SA2
DDR_A_D16
DDR_A_D20

DDR_A_D23
DDR_A_D18
DDR_A_D30
DDR_A_D24
DDR_A_DQS#3

DDR_A_DQS3
DDR_A_D31
DDR_A_D27
DDR_A_D48
DDR_A_D54

DDR_A_D53
DDR_A_D52
DDR_A_D62
DDR_A_D57
DDR_A_DQS#7

DDR_A_DQS7
DDR_A_D56
DDR_A_D63

DIMM1_SA0
DIMM1_SA1

+DDR_VREF_A_CA

DDR_XDP_WAN_SMBDAT <7,15,20,41>

+0.6V_DDR_VTT

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

T50@

1

2

+DDR_VREF_A_CA

CD29

@

0.1U_0402_10V6K

2016/01/01

2016/01/01

2016/01/01

DDR_VTT_CTRL<7>

Compal Secret Data

Compal Secret Data

Compal Secret Data

2

Deciphered Date

Deciphered Date

Deciphered Date

1 2

RD12 0_0402_5%

JDIMM1_EVENT#

+1.2V_MEM

1 2

RD14 1K_0402_5%@

+1.2V_MEM

1K_0402_1%

12

RD15

1K_0402_1%

12

RD16

UD1

2
3

74AUP1G07SE-7_SOT353

2017/01/01

2017/01/01

2017/01/01

12

RD11
470_0402_1%

DDR_DRAMRST#

1 2

RD17 2_0402_1%

5

NC1VCC
A

4

Y

GND

24.9_0402_1%

12

RD18

+3.3V_RUN

330K_0402_5%

12

RD19

0.6V_DDR_VTT_ON

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

DDR4-SODIMM SLOT1

DDR4-SODIMM SLOT1

DDR4-SODIMM SLOT1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-E151P

LA-E151P

LA-E151P

Date: Sheet

Date: Sheet

Date: Sheet

DDR4_DRAMRST#_PCH <20>DDR_DRAMRST#_R<15>

H_THERMTRIP# <7,15,16,38>

+DDR_VREF_CA+DDR_VREF_A_CA

0.022U_0402_16V7K

CD31

1

2

+1.2V_MEM

1 2

CD32 0.1U_0402_25V6@

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

1

0.6V_DDR_VTT_ON <50>

1

of

of

of

14 61

14 61

14 61

0.2

0.2

0.2

5

DDR_B_DQS#[0..7]<8>
DDR_B_DQS[0..7]<8>

DDR_B_D[0..15]<8>
DDR_B_D[16..31]<8>
DDR_B_D[32..47]<8>
DDR_B_D[48..63]<8>

DDR_B_MA[0..16]<8>

Layout Note:
Place near JDIMM2

D D

+1.2V_MEM

10U_0603_6.3V6M

10U_0603_6.3V6M

CD34

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

CD42

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD55

1

2

0

0

0

1

0

1

1

DQ[7:0]
DQ[15:8]

10U_0603_6.3V6M

CD36

CD35

1

2

1U_0402_6.3V6K

1

CD44

CD43

2

CD56

SA2

0

0

0

0

5

10U_0603_6.3V6M

10U_0603_6.3V6M

CD38

CD37

1

1

1

2

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

1

CD46

CD45

2

2

2

12

RD20

@

0_0402_5%

12

RD21

0_0402_5%

DQS/DQS#[0]
DQS/DQS#[1]
DQS/DQS#[2]
DQS/DQS#[3]

DQS/DQS#[4]
DQS/DQS#[5]

DQS/DQS#[6]
DQS/DQS#[7]

10U_0603_6.3V6M

CD33

1

1

2

2

1U_0402_6.3V6K

1

1

CD41

2

2

C C

Layout Note:
Place near
JDIMM2.258

+0.6V_DDR_VTT

10U_0603_6.3V6M

CD54

1

1

2

2

B B

DIMM Select

SA01SA1

DIMM1

DIMM2

DIMM3

*

DIMM4

Byte[0]
Byte[1]
Byte[2]

A A

Byte[3]

*

Byte[4]
Byte[5]

*

Byte[6]
Byte[7]

DQ[23:16]
DQ[31:24]

DQ[39:32]
DQ[47:40]
DQ[55:48]
DQ[63:56]

330U_D3_2.5VY_R6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1

@

CD39

CD40

CD49

1

+

2

2

+2.5V_MEM

1U_0402_6.3V6K

1U_0402_6.3V6K

1

CD48

CD47

2

+DDR_VREF_B_CA

+3.3V_RUN+3.3V_RUN+3.3V_RUN +3.3V_RUN

12

12

@

RD22

0_0402_5%

0_0402_5%

DIMM2_SA0
DIMM2_SA1
DIMM2_SA2

12

12

RD23

@

0_0402_5%

0_0402_5%

330U_2V_M

1

@

CD64

+

2

1U_0402_6.3V6K

10U_0603_6.3V6M

1U_0402_6.3V6K

1

1

1

1

CD51

CD52

CD50

2

2

2

2

0.1U_0402_10V6K

2.2U_0402_6.3V6M

@

CD57

CD58

1

1

2

2

RD24

RD25

12

1

2

RD26
0_0603_5%

2.2U_0402_6.3V6M

10U_0603_6.3V6M

CD53

+3.3V_RUN_DIMM2

0.1U_0201_10V6K

1

CD59

2

4

+1.2V_MEM +1.2V_MEM

JDIMM2

1

DDR_B_D0
DDR_B_D4
DDR_B_DQS#0

DDR_B_DQS0
DDR_B_D3
DDR_B_D7
DDR_B_D12
DDR_B_D9

DDR_B_D11
DDR_B_D10
DDR_B_D38
DDR_B_D32
DDR_B_DQS#4

DDR_B_DQS4
DDR_B_D35
DDR_B_D37
DDR_B_D40
DDR_B_D44

DDR_B_D46
DDR_B_D42

T53

+2.5V_MEM

@

PAD~D

DDR_B_CKE0
DDR_B_BG1

DDR_B_BG0
DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA6
DDR_B_MA3

DDR_B_MA1
DDR_B_CLK0

DDR_B_CLK#0
DDR_B_PARITY

DDR_B_BA1
DDR_B_CS#0

DDR_B_MA14
DDR_B_ODT0

DDR_B_CS#1
DDR_B_ODT1

DDR_B_D22
DDR_B_D23
DDR_B_DQS#2

DDR_B_DQS2
DDR_B_D17
DDR_B_D16
DDR_B_D24
DDR_B_D25

DDR_B_D26
DDR_B_D27
DDR_B_D51
DDR_B_D54
DDR_B_DQS#6

DDR_B_DQS6
DDR_B_D53
DDR_B_D49
DDR_B_D62
DDR_B_D59

DDR_B_D60
DDR_B_D56

+3.3V_RUN_DIMM2

DDR_B_CKE0<8>
DDR_B_BG1<8>

DDR_B_BG0<8>

DDR_B_CLK0<8>
DDR_B_CLK#0<8>

DDR_B_PARITY<8>
DDR_B_BA1<8>

DDR_B_CS#0<8>

DDR_B_ODT0<8>
DDR_B_CS#1<8>

DDR_B_ODT1<8>

CD60

DDR_XDP_WAN_SMBCLK<7,14,20,41>

4

VSS1

3

DQ5

5

VSS3

7

DQ1

9

VSS5
DQS0_c11DM0_n/DBI0_n

13

DQS0_t

15

VSS8

17

DQ7

19

VSS10

21

DQ3

23

VSS12

25

DQ13

27

VSS14

29

DQ9

31

VSS16
DM1_n/DBI_n33DQS1_t

35

VSS17

37

DQ15

39

VSS19

41

DQ10

43

VSS21

45

DQ21

47

VSS23

49

DQ17

51

VSS25
DQS2_c53DM2_n/DBI2_n

55

DQS2_t

57

VSS28

59

DQ23

61

VSS30

63

DQ19

65

VSS32

67

DQ29

69

VSS34

71

DQ25

73

VSS36
DM3_n/DBI3_n75DQS3_t

77

VSS37

79

DQ30

81

VSS39

83

DQ26

85

VSS41

87

CB5/NC

89

VSS43

91

CB1/NC

93

VSS45
DQS8_c95DM8_n/DBI_n/NC

97

DQS8_t

99

VSS48

101

CB2/NC

103

VSS50

105

CB3/NC

107

VSS52

109

CKE0

111

VDD1

113

BG1

115

BG0

117

VDD3

119

A12

121

A9

123

VDD5

125

A8

127

A6

129

VDD7

131

A3

133

A1

135

VDD9

137

CK0_t

139

CK0_c

141

VDD11

143

PARITY

145

BA1

147

VDD13

149

CS0_n

151

WE_n/A14

153

VDD15

155

ODT0

157

CS1_n

159

VDD17

161

ODT1

163

VDD19

165

C1, CS3_n,NC

167

VSS53

169

DQ37

171

VSS55

173

DQ33

175

VSS57

177

DQS4_c

179

DQS4_t

181

VSS60

183

DQ38

185

VSS62

187

DQ34

189

VSS64

191

DQ44

193

VSS66

195

DQ40

197

VSS68

199

DM5_n/DBI5_n

201

VSS69

203

DQ46

205

VSS71

207

DQ42

209

VSS73

211

DQ52

213

VSS75

215

DQ49

217

VSS77

219

DQS6_c

221

DQS6_t

223

VSS80

225

DQ55

227

VSS82

229

DQ51

231

VSS84

233

DQ61

235

VSS86

237

DQ56

239

VSS88

241

DM7_n/DBI7_n

243

VSS89

245

DQ62

247

VSS91

249

DQ58

251

VSS93

253

SCL

255

VDDSPD

257

VPP1

259

VPP2

261

GND1

LCN_DAN05-Q0406-0103
CONN@

3

VSS2
VSS4
VSS6
VSS7
VSS9

VSS11

DQ12

VSS13
VSS15

DQS1_c

VSS18

DQ14

VSS20

DQ11

VSS22

DQ20

VSS24

DQ16

VSS26
VSS27

DQ22

VSS29

DQ18

VSS31

DQ28

VSS33

DQ24

VSS35

DQS3_c

VSS38

DQ31

VSS40

DQ27

VSS42

CB4/NC

VSS44

CB0/NC

VSS46
VSS47

CB6/NC

VSS49

CB7/NC

VSS51

RESET_n

CKE1
VDD2

ACT_n

ALERT_n

VDD4

VDD6

VDD8

EVENT_n/NF

VDD10
CK1_t/NF
CK1_c/NF

VDD12

A10/AP

VDD14

RAS_n/A16

VDD16

CAS_n/A15

VDD18

C0/CS2_n/NC

VREFCA

VSS54

DQ36

VSS56

DQ32

VSS58

DM4_n/DBI4_n

VSS59

DQ39

VSS61

DQ35

VSS63

DQ45

VSS65

DQ41

VSS67
DQS5_c
DQS5_t

VSS70

DQ47

VSS72

DQ43

VSS74

DQ53

VSS76

DQ48

VSS78

DM6_n/DBI6_n

VSS79

DQ54

VSS81

DQ50

VSS83

DQ60

VSS85

DQ57

VSS87
DQS7_c
DQS7_t

VSS90

DQ63

VSS92

DQ59

VSS94

GND2

3

2

2

DDR_B_D1

4

DQ4

6

DDR_B_D5

8

DQ0

10
12
14

DDR_B_D2

16

DQ6

18

DDR_B_D6

20

DQ2

22

DDR_B_D8

24
26

DDR_B_D13

28

DQ8

30

DDR_B_DQS#1

32

DDR_B_DQS1

34
36

DDR_B_D14

38
40

DDR_B_D15

42
44

DDR_B_D36

46
48

DDR_B_D34

50
52
54
56

DDR_B_D33

58
60

DDR_B_D39

62
64

DDR_B_D45

66
68

DDR_B_D41

70
72

DDR_B_DQS#5

74

DDR_B_DQS5

76
78

DDR_B_D43

80
82

DDR_B_D47

84
86
88
90
92
94
96
98
100
102
104
106

DDR_DRAMRST#_R

108

DDR_B_CKE1

110
112
114
116
118
120

A11

122

A7

124
126

A5

128

A4

130
132

A2

134
136
138
140
142
144

A0

146
148
150

BA0

152
154
156
158

A13

160
162
164
166

SA2

168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
234
236
238
240
242
244
246
248
250
252
254

SDA

256

SA0

258

VTT

260

SA1

262

DDR_B_ACT#
DDR_B_ALERT#

DDR_B_MA11
DDR_B_MA7

DDR_B_MA5
DDR_B_MA4

DDR_B_MA2
JDIMM2_EVENT#

DDR_B_CLK1
DDR_B_CLK#1

DDR_B_MA0
DDR_B_MA10

DDR_B_BA0
DDR_B_MA16

DDR_B_MA15
DDR_B_MA13

DIMM2_SA2
DDR_B_D19
DDR_B_D18

DDR_B_D21
DDR_B_D20
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3

DDR_B_DQS3
DDR_B_D31
DDR_B_D30
DDR_B_D52
DDR_B_D48

DDR_B_D55
DDR_B_D50
DDR_B_D61
DDR_B_D57
DDR_B_DQS#7

DDR_B_DQS7
DDR_B_D63
DDR_B_D58

DIMM2_SA0
DIMM2_SA1

DDR_B_CKE1 <8>
DDR_B_ACT# <8>

DDR_B_ALERT# <8>

DDR_B_CLK1 <8>
DDR_B_CLK#1 <8>

DDR_B_BA0 <8>

+DDR_VREF_B_CA

T52@

PAD~D

+DDR_VREF_B_CA

DDR_XDP_WAN_SMBDAT <7,14,20,41>

+0.6V_DDR_VTT

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

1

CD61

@

0.1U_0402_10V6K

2

DDR_DRAMRST#_R <14>

2016/01/01

2016/01/01

2016/01/01

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

JDIMM2_EVENT#

+DDR_VREF_B_CA

1 2

RD27 1K_0402_5%@

+1.2V_MEM

1K_0402_1%

12

RD28

RD30 2_0402_1%

1K_0402_1%

12

RD29

2017/01/01

2017/01/01

2017/01/01

1 2

24.9_0402_1%

12

RD31

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

DDR4-SODIMM SLOT2

DDR4-SODIMM SLOT2

DDR4-SODIMM SLOT2

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-E151P

LA-E151P

LA-E151P

Date: Sheet

Date: Sheet

Date: Sheet

H_THERMTRIP# <7,14,16,38>

+DDR_VREF_B_DQ

0.022U_0402_16V7K

CD62

1

2

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

1

0.2

0.2

0.2

of

of

of

15 61

15 61

1

15 61

5

D D

4

3

2

1

PCH_CL_CLK1<35>
PCH_CL_DATA1<35>
PCH_CL_RST1#<35>

+3.3V_RUN

CAM_MIC_CBL_DET#

1 2

RH319 10K_0402_5%
RH318 10K_0402_5%
RH214 100K_0402_5%
RH324 10K_0402_5%
RH76 10K_0402_5%

C C

B B

RH344 10K_0402_5%

RH90 10K_0402_5%

1 2

RH345 10K_0402_5%
RH380 10K_0402_5%

RH323 10K_0402_5%
RH377 10K_0402_5%

@

RH325 10K_0402_5%
RH326 10K_0402_5%

@
@

RH322 10K_0402_5%

1 2
1 2
1 2
1 2

1 2

1 2

1 2

1 2
1 2
1 2
1 2
1 2

M2280_PCIE_SATA#
HOST_SD_WP#
HDD_DET#
BIOS_REC

m3042_PCIE#_SATA

CONTACTLESS_DET#
AUD_PWR_EN

SATALED#

SATAGP3
SATAGP1
SATAGP5
SATAGP6
SATAGP7

M.2 Socket 3 (Key M)

M.2 Socket 3 (Key M)

CAM_MIC_CBL_DET#<32>

CONTACTLESS_DET#<39>
HOST_SD_WP#<34>

AUD_PWR_EN<36>

PCIE_PTX_DRX_P11<40>
PCIE_PTX_DRX_N11<40>
PCIE_PRX_DTX_P11<40>
PCIE_PRX_DTX_N11<40>

PCIE_PTX_DRX_P12<40>
PCIE_PTX_DRX_N12<40>
PCIE_PRX_DTX_P12<40>
PCIE_PRX_DTX_N12<40>

PCH_CL_CLK1
PCH_CL_DATA1
PCH_CL_RST1#

CAM_MIC_CBL_DET#

CONTACTLESS_DET#

HOST_SD_WP#
AUD_PWR_EN

PCIE_PTX_DRX_P11
PCIE_PTX_DRX_N11
PCIE_PRX_DTX_P11
PCIE_PRX_DTX_N11

BIOS_REC

PCIE_PTX_DRX_P12
PCIE_PTX_DRX_N12
PCIE_PRX_DTX_P12
PCIE_PRX_DTX_N12

UH1C

AV2

CL_CLK

AV3

CL_DATA

AW2

CL_RST#

R44

GPP_G8/FAN_PWM_0

R43

GPP_G9/FAN_PWM_1

U39

GPP_G10/FAN_PWM_2

N42

GPP_G11/FAN_PWM_3

U43

GPP_G0/FAN_TACH_0

U42

GPP_G1/FAN_TACH_1

U41

GPP_G2/FAN_TACH_2

M44

GPP_G3/FAN_TACH_3

U36

GPP_G4/FAN_TACH_4

P44

GPP_G5/FAN_TACH_5

T45

GPP_G6/FAN_TACH_6

T44

GPP_G7/FAN_TACH_7

B33

PCIE11_TXP

C33

PCIE11_TXN

K31

PCIE11_RXP

L31

PCIE11_RXN

AB33

GPP_F10/SCLOCK

AB35

GPP_F11/SLOAD

AA44

GPP_F13/SDATAOUT0

AA45

GPP_F12/SDATAOUT1

B38

PCIE14_TXN/SATA1B_TXN

C38

PCIE14_TXP/SATA1B_TXP

D39

PCIE14_RXN/SATA1B_RXN

E37

PCIE14_RXP/SATA1B_RXP

C36

PCIE13_TXN/SATA0B_TXN

B36

PCIE13_TXP/SATA0B_TXP

G35

PCIE13_RXN/SATA0B_RXN

E35

PCIE13_RXP/SATA0B_RXP

A35

PCIE12_TXP

B35

PCIE12_TXN

H33

PCIE12_RXP

G33

PCIE12_RXN

J45

PCIE20_TXP/SATA7_TXP

K44

PCIE20_TXN/SATA7_TXN

N38

PCIE20_RXP/SATA7_RXP

N39

PCIE20_RXN/SATA7_RXN

H44

PCIE19_TXP/SATA6_TXP

H43

PCIE19_TXN/SATA6_TXN

L39

PCIE19_RXP/SATA6_RXP

L37

PCIE19_RXN/SATA6_RXN

SKL-H-PCH_BGA837

SPT-H_PCH

PCIe/SATA

GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_F0/SATAXPCIE3/SATAGP3
GPP_F1/SATAXPCIE4/SATAGP4
GPP_F2/SATAXPCIE5/SATAGP5
GPP_F3/SATAXPCIE6/SATAGP6
GPP_F4/SATAXPCIE7/SATAGP7

HOST

3 OF 12

PCIE9_RXN/SATA0A_RXN
PCIE9_RXP/SATA0A_RXP

PCIE9_TXN/SATA0A_TXN
PCIE9_TXP/SATA0A_TXP

PCIE10_RXN/SATA1A_RXN
PCIE10_RXP/SATA1A_RXP

PCIE10_TXN/SATA1A_TXN
PCIE10_TXP/SATA1A_TXP

PCIE15_RXN/SATA2_RXN

PCIE15_RXP/SATA2_RXP
PCIE15_TXN/SATA2_TXN

PCIE16_RXN/SATA3_RXN

PCIE16_RXP/SATA3_RXP
PCIE16_TXN/SATA3_TXN

PCIE17_RXN/SATA4_RXN

PCIE17_RXP/SATA4_RXP
PCIE17_TXN/SATA4_TXN

PCIE18_RXN/SATA5_RXN

PCIE18_RXP/SATA5_RXP
PCIE18_TXN/SATA5_TXN

CLINK

FAN

Rev_1.3

PCIE15_TXP/SATA2_TXP

PCIE16_TXP/SATA3_TXP

PCIE17_TXP/SATA4_TXP

PCIE18_TXP/SATA5_TXP

GPP_E8/SATALED#

GPP_F21/EDP_BKLTCTL

GPP_F20/EDP_BKLTEN

GPP_F19/EDP_VDDEN

THERMTRIP#

PM_SYNC

PLTRST_PROC#

PM_DOWN

PCIE_PRX_DTX_N9

G31

PCIE_PRX_DTX_P9

H31

PCIE_PTX_DRX_N9

C31

PCIE_PTX_DRX_P9

B31

PCIE_PRX_DTX_N10

G29

PCIE_PRX_DTX_P10

E29

PCIE_PTX_DRX_N10

C32

PCIE_PTX_DRX_P10

B32

SATA_PRX_DTX_N2

F41

SATA_PRX_DTX_P2

E41

SATA_PTX_DRX_N2

B39

SATA_PTX_DRX_P2

A39
D43

E42
A41
A40

PCIE_PRX_DTX_N17

H42

PCIE_PRX_DTX_P17

H40

PCIE_PTX_DRX_N17

E45

PCIE_PTX_DRX_P17

F45
K37

G37
G45
G44

AD44

SATALED#
M2280_PCIE_SATA#

AG36
AG35

SATAGP1
HDD_DET#

AG39
AD35

SATAGP3
m3042_PCIE#_SATA

AD31
AD38

SATAGP5

AC43

SATAGP6

AB44

SATAGP7
BIA_PWM_PCH

W36

PANEL_BKEN_PCH

W35

ENVDD_PCH

W42

PCH_THERMTRIP#

AJ3

PCH_PECI H_PECI

AL3

PECI

H_PM_SYNC_R H_PM_SYNC

AJ4

PLTRST_CPU#

AK2

H_PM_DOWN

AH2

PCIE_PRX_DTX_N9 <40>
PCIE_PRX_DTX_P9 <40>

PCIE_PTX_DRX_N9 <40>

PCIE_PTX_DRX_P9 <40>

PCIE_PRX_DTX_N10 <40>
PCIE_PRX_DTX_P10 <40>

PCIE_PTX_DRX_N10 <40>

PCIE_PTX_DRX_P10 <40>
SATA_PRX_DTX_N2 <41>

SATA_PRX_DTX_P2 <41>

SATA_PTX_DRX_N2 <41>

SATA_PTX_DRX_P2 <41>

PCIE_PRX_DTX_N17 <35>
PCIE_PRX_DTX_P17 <35>

PCIE_PTX_DRX_N17 <35>

PCIE_PTX_DRX_P17 <35>

SATALED# <35,40,45>

M2280_PCIE_SATA# <40>
HDD_DET# <41>
m3042_PCIE#_SATA <37>

Reserve
Reserve
Reserve

BIA_PWM_PCH <32>
PANEL_BKEN_PCH <32>
ENVDD_PCH <32,37>

1 2
1 2

RH75 620_0402_5%

1 2

RH73 43_0402_1%

RH156 30_0402_5%

PLTRST_CPU# <7>
H_PM_DOWN <7>

M.2 Socket 3 (Key M)

SATA HDD

M.2 3042 HCA or QCA LTE SSD Cache

SPSGP0

SPSGP1

01SATAGP1

SPSGP2

1

0

SPSGP3

11=SATA0=PCIE

SPSGP4 3042_PCIE#_SATA

H_THERMTRIP# <7,14,15,38>
H_PECI <7,37>

H_PM_SYNC <7>

PCH_PECI

12

RH74

@

10K_0402_5%

2280_PCIE_SATA#

HDD_DET#

SATAGP3

0=SATA

1=PCIE

1=SATA 0=PCIE

0=SATA 1=PCIE

1=SATA 0=PCIE

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

2016/01/01

2016/01/01

2016/01/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2017/01/01

2017/01/01

2017/01/01

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

KABYLAKE PCH-H (1/9)

KABYLAKE PCH-H (1/9)

KABYLAKE PCH-H (1/9)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-E151P

LA-E151P

LA-E151P

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Date: Sheet

Date: Sheet

Date: Sheet

1

of

of

of

16 61

16 61

16 61

0.2

0.2

0.2

5

D D

4

RH66@ 0_0402_5%

XDP_DBRESET#<7>

RH70 8.2K_0402_5%@

ME_RESET#

12

CIS LINK OK

1 2

+3.3V_RUN

5

1

B

2

A

3

3

CH10

@

1 2

0.1U_0402_25V6

P

4

Y

G

@

74AHC1G09GW_TSSOP5

2

SYS_RESET#

UC3

SYS_RESET# <20,21>

1

PCIe/USB 3

SPT-H_PCH

DMI

2 OF 12

USB 2 .0

GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_F15/USB2_OC4#
GPP_F16/USB2_OC5#
GPP_F17/USB2_OC6#
GPP_F18/USB2_OC7#

USB2_COMP

USB2_VBUSSENSE

GPD7/RSVD

Rev_1.3

USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9

USB2P_9
USB2N_10
USB2P_10
USB2N_11
USB2P_11
USB2N_12
USB2P_12
USB2N_13
USB2P_13
USB2N_14
USB2P_14

RSVD_AB13

USB2_ID

AF5
AG7
AD5
AD7
AG8
AG10
AE1
AE2
AC2
AC3
AF2
AF3
AB3
AB2
AL8
AL7
AA1
AA2
AJ8
AJ7
W2
W3
AD3
AD2
V2
V1
AJ11
AJ13

AD43
AD42
AD39
AC44
Y43
Y41
W44
W43

AG3
AD10
AB13
AG2

BD14

USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4

USB20_N6
USB20_P6

USB20_N8
USB20_P8
USB20_N9
USB20_P9
USB20_N10
USB20_P10
USB20_N11
USB20_P11

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#

USB2_COMP

USB2_VBUSSENSE
USB2_ID

3.3V_CAM_EN#

USB20_N1 <42>

-----> Ext USB Port 1 Charge(RIGHT)

USB20_P1 <42>
USB20_N2 <43>

-----> Ext USB Port 2(LEFT)

USB20_P2 <43>
USB20_N3 <43>

-----> Ext USB Port 3(REAR)

USB20_P3 <43>
USB20_N4 <29>

-----> Type-C

USB20_P4 <29>

USB20_N6 <35>

-----> M.2 3030 (BT)

USB20_P6 <35>

USB20_N8 <35>

-----> M.2 3042 (WWAN)

USB20_P8 <35>
USB20_N9 <32>

-----> Touch Screen

USB20_P9 <32>
USB20_N10 <39>

-----> USH

USB20_P10 <39>
USB20_N11 <32>

-----> Camera

USB20_P11 <32>

USB_OC0# <42>
USB_OC1# <43>
USB_OC2# <43>

Reserve

1 2

RH193 113_0402_1%

1 2

RH364 1K_0402_5%

1 2

RH365 0_0402_5%

USB2_ID <29>

3.3V_CAM_EN# <32>

USB_OC3#
USB_OC1#
USB_OC0#
USB_OC2#

RPH6

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

+3.3V_ALW_PCH

UH1B

L27

DMI_RXN0

N27

DMI_RXP0

C27

DMI_TXN0

B27

DMI_TXP0

E24

DMI_RXN1

G24

DMI_RXP1

B28

DMI_TXN1

A28

DMI_TXP1

G27

DMI_RXN2

E26

DMI_RXP2

B29

DMI_TXN2

C29

DMI_TXP2

L29

DMI_RXN3

K29

DMI_RXP3

B30

DMI_TXN3

A30

DMI_TXP3

B18

PCIE_RCOMPN

C17

PCIE_RCOMPP

H15

PCIE1_RXN/USB3_7_RXN

G15

PCIE1_RXP/USB3_7_RXP

A16

PCIE1_TXN/USB3_7_TXN

B16

PCIE1_TXP/USB3_7_TXP

B19

PCIE2_TXN/USB3_8_TXN

C19

PCIE2_TXP/USB3_8_TXP

E17

PCIE2_RXN/USB3_8_RXN

G17

PCIE2_RXP/USB3_8_RXP

L17

PCIE3_RXN/USB3_9_RXN

K17

PCIE3_RXP/USB3_9_RXP

B20

PCIE3_TXN/USB3_9_TXN

C20

PCIE3_TXP/USB3_9_TXP

E20

PCIE4_RXN/USB3_10_RXN

G19

PCIE4_RXP/USB3_10_RXP

B21

PCIE4_TXN/USB3_10_TXN

A21

PCIE4_TXP/USB3_10_TXP

K19

PCIE5_RXN

L19

PCIE5_RXP

D22

PCIE5_TXN

C22

PCIE5_TXP

G22

PCIE6_RXN

E22

PCIE6_RXP

B22

PCIE6_TXN

A23

PCIE6_TXP

L22

PCIE7_RXN

K22

PCIE7_RXP

C23

PCIE7_TXN

B23

PCIE7_TXP

K24

PCIE8_RXN

L24

PCIE8_RXP

C24

PCIE8_TXN

B24

PCIE8_TXP

SKL-H-PCH_BGA837

1 2

DMI_CTX_PRX_N0
DMI_CTX_PRX_P0
DMI_CRX_PTX_N0
DMI_CRX_PTX_P0
DMI_CTX_PRX_N1
DMI_CTX_PRX_P1
DMI_CRX_PTX_N1
DMI_CRX_PTX_P1
DMI_CTX_PRX_N2
DMI_CTX_PRX_P2
DMI_CRX_PTX_N2
DMI_CRX_PTX_P2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P3
DMI_CRX_PTX_N3
DMI_CRX_PTX_P3

PCIECOMP#
PCIECOMP

PCIE_PRX_DTX_N1

PCIE_PRX_DTX_P1

PCIE_PTX_DRX_N1

PCIE_PTX_DRX_P1

PCIE_PTX_DRX_N2

PCIE_PTX_DRX_P2

PCIE_PRX_DTX_N2

PCIE_PRX_DTX_P2

PCIE_PRX_DTX_N3

PCIE_PRX_DTX_P3

PCIE_PTX_DRX_N3

PCIE_PTX_DRX_P3

PCIE_PRX_DTX_N4

PCIE_PRX_DTX_P4

PCIE_PTX_DRX_N4

PCIE_PTX_DRX_P4

DMI_CTX_PRX_N0<6>
DMI_CTX_PRX_P0<6>
DMI_CRX_PTX_N0<6>
DMI_CRX_PTX_P0<6>
DMI_CTX_PRX_N1<6>
DMI_CTX_PRX_P1<6>
DMI_CRX_PTX_N1<6>
DMI_CRX_PTX_P1<6>
DMI_CTX_PRX_N2<6>
DMI_CTX_PRX_P2<6>

C C

WIGIG--->

WLAN --->

Card Reader --->

LAN --->

B B

DMI_CRX_PTX_N2<6>
DMI_CRX_PTX_P2<6>
DMI_CTX_PRX_N3<6>
DMI_CTX_PRX_P3<6>
DMI_CRX_PTX_N3<6>
DMI_CRX_PTX_P3<6>

RH192 100_0402_1%

PCIE_PRX_DTX_N1<35>
PCIE_PRX_DTX_P1<35>
PCIE_PTX_DRX_N1<35>
PCIE_PTX_DRX_P1<35>
PCIE_PTX_DRX_N2<35>
PCIE_PTX_DRX_P2<35>
PCIE_PRX_DTX_N2<35>

PCIE_PRX_DTX_P2<35>
PCIE_PRX_DTX_N3<34>
PCIE_PRX_DTX_P3<34>
PCIE_PTX_DRX_N3<34>
PCIE_PTX_DRX_P3<34>
PCIE_PRX_DTX_N4<33>
PCIE_PRX_DTX_P4<33>
PCIE_PTX_DRX_N4<33>
PCIE_PTX_DRX_P4<33>

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

2016/01/01

2016/01/01

2016/01/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2017/01/01

2017/01/01

2017/01/01

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

KABYLAKE PCH-H (2/9)

KABYLAKE PCH-H (2/9)

KABYLAKE PCH-H (2/9)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-E151P

LA-E151P

LA-E151P

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Date: Sheet

Date: Sheet

Date: Sheet

1

of

of

of

17 61

17 61

17 61

0.2

0.2

0.2

5

D D

4

3

2

1

UH1G

AR17

CPU_24MHZ_R_D<7>
CPU_24MHZ_R_D#<7>

PCH_CPU_BCLK_R_D<7>
PCH_CPU_BCLK_R_D#<7>

C C

WWAN
WLAN

WIGIG

M.2 Socket 3

LAN
MMI

B B

+3.3V_RUN

CLKREQ_PCIE#0<35>

+3.3V_RUN

CLKREQ_PCIE#1<35>

+3.3V_RUN

CLKREQ_PCIE#2<35>

+3.3V_RUN

CLKREQ_PCIE#3<40>

+3.3V_RUN

CLKREQ_PCIE#4<33>

+3.3V_RUN

CLKREQ_PCIE#5<34>

+3.3V_RUN
+3.3V_RUN

CH4

1 2

15P_0402_50V8J

CH5

1 2

15P_0402_50V8J

CPU_24MHZ_R_D PCH_CPU_NSSC_CLK_D
CPU_24MHZ_R_D#

PCH_CPU_BCLK_R_D
PCH_CPU_BCLK_R_D#

RH123 10K_0402_5%
RH10 0_0402_5%RF@
RH124 10K_0402_5%
RH11 0_0402_5%RF@
RH125 10K_0402_5%
RH12 0_0402_5%RF@
RH126 10K_0402_5%
RH13 0_0402_5%RF@
RH127 10K_0402_5%
RH14 0_0402_5%RF@
RH131 10K_0402_5%
RH15 0_0402_5%RF@
RH132 10K_0402_5%

RH133 10K_0402_5%

12
12
12
12
12
12
12
12
12
12
12
12
12

12

PCH_RTCX1_R

1 2

RH43 0_0402_5%

12

YH1

32.768KHZ_12.5PF_9H03200042

1 2

RH169 0_0402_5%

1 2

RH170 0_0402_5%

1 2

RH161 0_0402_5%

1 2

RH166 0_0402_5%

+1.0V_CLK5

RH171 2.7K_0402_1%

1 2

PCH_RTCX1

12

RH44
10M_0402_5%

PCH_RTCX2

PCH_CPU_NSSC_CLK_D#
PCH_CPU_BCLK_D

PCH_CPU_BCLK_D#

XTAL24_OUT_R1
XTAL24_IN_R

XCLK_R BIAS
PCH_RTCX1

PCH_RTCX2
CLKREQ_PCIE#0_R

CLKREQ_PCIE#1_R
CLKREQ_PCIE#2_R
CLKREQ_PCIE#3_R
CLKREQ_PCIE#4_R
CLKREQ_PCIE#5_R
CLKREQ_PCIE#6_R
CLKREQ_PCIE#7_R

XTAL24_IN_R

XTAL24_OUT_R1

GPP_A16/CLKOUT_48

G1

CLKOUT_CPUNSSC_P

F1

CLKOUT_CPUNSSC_N

G2

CLKOUT_CPUBCLK_P

H2

CLKOUT_CPUBCLK_N

A5

XTAL24_OUT

A6

XTAL24_IN

E1

XCLK_BIASREF

BC9

RTCX1

BD10

RTCX2

BC24

GPP_B5/SRCCLKREQ0#

AW24

GPP_B6/SRCCLKREQ1#

AT24

GPP_B7/SRCCLKREQ2#

BD25

GPP_B8/SRCCLKREQ3#

BB24

GPP_B9/SRCCLKREQ4#

BE25

GPP_B10/SRCCLKREQ5#

AT33

GPP_H0/SRCCLKREQ6#

AR31

GPP_H1/SRCCLKREQ7#

BD32

GPP_H2/SRCCLKREQ8#

BC32

GPP_H3/SRCCLKREQ9#

BB31

GPP_H4/SRCCLKREQ10#

BC33

GPP_H5/SRCCLKREQ11#

BA33

GPP_H6/SRCCLKREQ12#

AW33

GPP_H7/SRCCLKREQ13#

BB33

GPP_H8/SRCCLKREQ14#

BD33

GPP_H9/SRCCLKREQ15#

R13

CLKOUT_PCIE_N15

R11

CLKOUT_PCIE_P15

P1

CLKOUT_PCIE_N14

R2

CLKOUT_PCIE_P14

W7

CLKOUT_PCIE_N13

Y5

CLKOUT_PCIE_P13

U2

CLKOUT_PCIE_N12

U3

CLKOUT_PCIE_P12

SKL-H-PCH_BGA837

12

SPT-H_PCH

7 OF 12

RH153
1M_0402_1%

XTAL24_ OUT_R

1 2

RH152 0_0402_5%

Rev_1.3

CLKOUT_ITPXDP_N

CLKOUT_ITPXDP_P

CLKOUT_CPUPCIBCLK_N

CLKOUT_CPUPCIBCLK_P

CLKOUT_PCIE_N0
CLKOUT_PCIE_P0

CLKOUT_PCIE_N1
CLKOUT_PCIE_P1

CLKOUT_PCIE_N2
CLKOUT_PCIE_P2

CLKOUT_PCIE_N3
CLKOUT_PCIE_P3

CLKOUT_PCIE_N4
CLKOUT_PCIE_P4

CLKOUT_PCIE_N5
CLKOUT_PCIE_P5

CLKOUT_PCIE_N6
CLKOUT_PCIE_P6

CLKOUT_PCIE_N7
CLKOUT_PCIE_P7

CLKOUT_PCIE_N8
CLKOUT_PCIE_P8

CLKOUT_PCIE_N9
CLKOUT_PCIE_P9

CLKOUT_PCIE_N10

CLKOUT_PCIE_P10

CLKOUT_PCIE_N11

CLKOUT_PCIE_P11

3

4

YH2
24MHZ_12PF_X3G024000DC1H

1

2

L1
L2
J1
J2

N7
N8

L7
L5

D3
F2

E5
G4

D5
E6

D8
D7

R8
R7

U5
U7

W10
W11

N3
N2

P3
P2

R3
R4

CH13

1 2

15P_0402_50V8J

CH14

1 2

15P_0402_50V8J

PCH_XDP_CLK_DN_R
PCH_XDP_CLK_DP_R
PCH_CPU_PCIBCLK_D#
PCH_CPU_PCIBCLK_D

CLK_PCIE_N0
CLK_PCIE_P0

CLK_PCIE_N1
CLK_PCIE_P1

CLK_PCIE_N2
CLK_PCIE_P2

CLK_PCIE_N3
CLK_PCIE_P3

CLK_PCIE_N4
CLK_PCIE_P4

CLK_PCIE_N5
CLK_PCIE_P5

1 2

RH154 0_0402_5%

1 2

RH155 0_0402_5%

1 2

RH168 0_0402_5%

1 2

RH167 0_0402_5%

CLK_PCIE_N0 <35>
CLK_PCIE_P0 <35>

CLK_PCIE_N1 <35>
CLK_PCIE_P1 <35>

CLK_PCIE_N2 <35>
CLK_PCIE_P2 <35>

CLK_PCIE_N3 <40>
CLK_PCIE_P3 <40>

CLK_PCIE_N4 <33>
CLK_PCIE_P4 <33>

CLK_PCIE_N5 <34>
CLK_PCIE_P5 <34>

PCH_XDP_CLK_DN
PCH_XDP_CLK_DP

PCH_CPU_PCIBCLK_R_D#
PCH_CPU_PCIBCLK_R_D

WWAN

WLAN

WIGIG

M.2 Socket 3 (Key M)

LAN

MMI

PCH_XDP_CLK_DN <7>
PCH_XDP_CLK_DP <7>
PCH_CPU_PCIBCLK_R_D# <7>
PCH_CPU_PCIBCLK_R_D <7>

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2016/01/01

2016/01/01

2016/01/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2017/01/01

2017/01/01

2017/01/01

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

KABYLAKE PCH-H (3/9)

KABYLAKE PCH-H (3/9)

KABYLAKE PCH-H (3/9)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

LA-E151P

LA-E151P

LA-E151P

Thursday, June 30, 2016

Thursday, June 30, 2016

Thursday, June 30, 2016

Date: Sheet

Date: Sheet

Date: Sheet

1

18 61

18 61

18 61

of

of

of

0.2

0.2

0.2

5

4

3

2

1

UH1A

GPP_A11/PME#
RSVD

RSVD
RSVD
RSVD

TP2
TP1

SPI0_MOSI
SPI0_MISO
SPI0_CS0#
SPI0_CLK
SPI0_CS1#

SPI0_IO2
SPI0_IO3
SPI0_CS2#
GPP_D1
GPP_D0
GPP_D3
GPP_D2
GPP_D22
GPP_D21

SKL-H-PCH_BGA837

/HOLD(IO3)

UC6

/HOLD(IO3)

+3.3V_ALW_PCH

5

UH7

1

P

B

2

A

G

TC7SH08FU_SSOP5

3

8

VCC

7
6

CLK

5

DI(IO0)

8

VCC

7
6

CLK

5

DI(IO0)

PCH_PLTRST#_AND

4

Y

SPT-H_PCH

1 OF 12

+3.3V_SPI

PCH_SPI_D3_0_R
PCH_SPI_CLK_0_RPCH_SPI_D2_R1
PCH_SPI_D0_0_R

+3.3V_SPI

PCH_SPI_D3_1_R
PCH_SPI_CLK_1_RPCH_SPI_D2_1_R
PCH_SPI_D0_1_R

12

@

GPP_B13/PLTRST#

GPP_G16/GSXCLK

GPP_G12/GSXDOUT

GPP_G13/GSXSLOAD

GPP_G14/GSXDIN

GPP_G15/GSXSRESET#

GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3

GPP_H18/SML4ALERT#

GPP_H17/SML4DATA

GPP_H16/SML4CLK

GPP_H15/SML3ALERT#

GPP_H14/SML3DATA

GPP_H13/SML3CLK

GPP_H12/SML2ALERT#

GPP_H11/SML2DATA

GPP_H10/SML2CLK

CH9

1 2

0.1U_0201_10V6K

CH270

@

1 2

0.1U_0201_10V6K

RH65
100K_0402_5%

Rev_1.3

INTRUDER#

PCH_SPI_D1_R1<39>

PCH_SPI_CLK_R1<39>
PCH_SPI_D0_R1<39>

BB27

P43
R39
R36
R42
R41

AF41
AE44
BC23
BD24

BC36
BE34
BD39
BB36
BA35
BC35
BD35
AW35
BD34
BE11

PCH_PLTRST#

RH187 0_0402_5%

RH60 0_0402_5%@

PCH_PLTRST#

SIO_EXT_SMI#
TOUCH_SCREEN_PD#
TOUCHPAD_INTR#

PCH_INTRUDER_HDR#

12

1 2

SIO_EXT_SMI# <37>
TOUCH_SCREEN_PD# <32>
TOUCHPAD_INTR# <37,44>
TOUCH_SCREEN_DET# <32>

+RTC_CELL

12

RH198
1M_0402_5%

PCH_SPI_D1_R1
PCH_SPI_D3_R1 PCH_SPI_D3_0_R
PCH_SPI_CLK_R1
PCH_SPI_D0_R1 PCH_SPI_D0_0_R

PCH_SPI_D1_R1 PCH_SPI_D1_1_R
PCH_SPI_D3_R1
PCH_SPI_CLK_R1
PCH_SPI_D0_R1

RPC1

1 8
2 7
3 6
4 5

33_0804_8P4R_5%

@

RPC2

4 5
3 6
2 7
1 8

33_0804_8P4R_5%

+3.3V_SPI

PCH_PLTRST#_AND <34,35,39,40>
PLTRST_TPM# <39>

RH62 0_0402_5%
RH244 0_0402_5%

PCH_SPI_D1_0_R
PCH_SPI_CLK_0_R

PCH_SPI_D3_1_R
PCH_SPI_CLK_1_R
PCH_SPI_D0_1_R

+3.3V_ALW_PCH

RH185 0_0402_5%

12
12

12

RH1770_0402_5% @

12

RH1780_0402_5%

12

RH1790_0402_5%

12

RH1810_0402_5%

12

RH1820_0402_5%

12

RH1830_0402_5%

12

RH1840_0402_5%

12

PLTRST_LAN# <33>
PCH_PLTRST#_EC <38>

PCH_SPI_CS#1_R1

PCH_SPI_CS#1

PCH_SPI_D0_R1

PCH_SPI_D0

PCH_SPI_D1_R1

PCH_SPI_D1

PCH_SPI_CLK_R1

PCH_SPI_CLK

PCH_SPI_CS#0_R1

PCH_SPI_CS#0

PCH_SPI_D2_R1

PCH_SPI_D2

PCH_SPI_D3_R1

PCH_SPI_D3

E-T_6705K-Y20N-00L

22

GND2

21

GND1

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

JSPI1

CONN@

CIS link OK

+3.3V_ALW_PCH

TOUCH_SCREEN_PD#

TOUCHPAD_INTR#

GO)0P/MM)0P/'FMOG

GO)0P/MM)0P/

LO)0P/

Need check

33_0402_5%

@EMI@

12

RH28

33P_0402_50V8J

@EMI@

12

CH321

SIO_EXT_SMI#

TOUCH_SCREEN_PD# don't move to RPC,

PCH_SPI_D2_XDP<7>

PCH_SPI_CS#0_R1

PCH_SPI_CLK_0_RPCH_SPI_CLK_1_R

33_0402_5%

@EMI@

12

RH29

33P_0402_50V8J

@EMI@

12

CH322

PCH_SPI_CS#1_R1
PCH_SPI_D2_R1

T178PAD~D @
T59PAD~D @

T60PAD~D @
T61PAD~D @
T58PAD~D @

T63PAD~D @
T62PAD~D @

PCH_SPI_D0<7>

1 2

RH180 0_0402_5%

PCH_SPI_CS#2<39>

1 2

RH37 0_0402_5%

1 2

RH351 33_0402_5%

1 2

RH352 0_0402_5%@

1 2

RH353 33_0402_5%@

PME#

PCH_SPI_D0
PCH_SPI_D1
PCH_SPI_CS#0
PCH_SPI_CLK
PCH_SPI_CS#1

PCH_SPI_D2PCH_SPI_D2_XDP
PCH_SPI_D3

PCH_SPI_CS#0_R2
PCH_SPI_D1_0_R
PCH_SPI_D2_0_R

PCH_SPI_CS#1_R2
PCH_SPI_D1_1_R

PCH_PLTRST#

BD17
AG15

AG14
AF17
AE17

AR19
AN17

BB29
BE30
BD31
BC31

AW31

BC29
BD30
AT31
AN36

AL39
AN41
AN38
AH43
AG44

128Mb Flash ROM

UC5

1

/CS

2

DO(IO1)

3

/WP(IO2)

4

GND

W25Q128FVSIQ_SO8

64Mb Flash ROM

@

1

/CS

2

DO(IO1)

3

/WP(IO2)

4

GND

W25Q64FVSSIQ_SO8

1 2

+3.3V_SPI

RH30 1K_0402_5%@
RH335 1K_0402_5%@

RH334 1K_0402_5%@

RH310 10K_0402_5%

1 2

RH348 10K_0402_5%@

1 2

RH402 10K_0402_5%

PCH_SPI_D2_R1

1 2

PCH_SPI_D3_R1

1 2

PCH_SPI_D3_R1

1 2

D D

+3.3V_RUN

C C

9/5 MOW
Option 1: Implement a 1 kOhm pull-down resistor on the signal and de-populate the
required 1 kOhm pull-up resistor. In this case, customers must ensure that the SPI
flash device on the platform has HOLD functionality disabled by default.

Note that the pull down resistor on SPI0_IO3 is only needed for SKL U/Y platforms
with ES and SKL S/H platforms with pre-ES1/ES1 samples.

B B

$8#D E#&

'#&G

'FGHIJ'FGHKJ'FGIGJ
'FGILJ'FGIMJ'FGIN

A A

Q)0P/

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2016/01/01

2016/01/01

2016/01/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2017/01/01

2017/01/01

2017/01/01

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

KABYLAKE PCH-H (4/9)

KABYLAKE PCH-H (4/9)

KABYLAKE PCH-H (4/9)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

LA-E151P

LA-E151P

LA-E151P

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Tuesday, June 28, 2016

Date: Sheet

Date: Sheet

Date: Sheet

1

19 61

19 61

19 61

of

of

of

0.2

0.2

0.2