Compal LA-D993P Schematics Rev1.0

Vinaﬁx.com

A

B

C

D

E

MODEL NAME : PCB NO :

LA-D993P

BBV00/ BBV10

BOM P/N :

1 1

Dell/Compal Confidential

Schematic Document

KABYLAKE-H

2016-11-01

2 2

R1@ / R3@ : R1/R3 CPN for CPU, GPU, PCB

BreakDown@ : For measure power consumption

3 3

Rev: 1.0 (A00)

@ : Nopop Component

CONN@ : Connector Component

EMC@ : Pop of EMI parts

S4G@ : Samsung GDDR5 4G for GPU

M4G@ : Micron GDDR5 4G for GPU

H4G@ : Hynix GDDR5 4G for GPU

14G0@ : 14" N17P-G0 15G1@ : 15" N17P-G1

4 4

Security Classification

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

C

2011/08/25 2011/08/25

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Cover Page

E

1 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

A

B

C

D

E

128M*32 x4 =2G

GPU

1 1

HDMI 2.0 Conn.

Retimer PS8409A

IFP

P35P.36

N17PG0/ N17P-G1 40W/ 50W

256M*32 x4 =4G

VRAM * 4 GDDR5

GB4-128

P.28~30

P.23~27

PEG 3.0 x16

Intel

KBL-Lake-H

Memory Bus (DDR4)

Dual Channel

DDRIV-DIMM X2

1.2V DDR4 2400 MHz

P.14~15

32GB Max

Processor

45W

14.0'' / 15.6'' HD / FHD / UHD

RJ45

P.47

2 2

Digital Camera Conn.

P.34

USB2.0

M.2 Slot A Key-E

(WLAN+BT4.0)

Port 12

LOM RTL8111H

P.43

USB2.0

P.47

Port 4

SPI Flash (BIOS 16MB)

Subwoofer

3 3

Subwoofer AMP ALC1302

Main SPKR *2

P.39

P.38

P.17

HDA Codec ALC3246

P.34

Port 5

Port 6

P.37

eDP 1.2 *4 lane

PCI-E x1

SPI

HD Audio

Universal Audio Jack

P.38

Touch Pad

P.41

I2C

PS2

BGA

P.7~13

DMI x4

100MHz 5GB/s

Intel

KBL-H-PCH BGA 837 Balls

P16~22

LPC Bus

33MHz

SATA3.0

PCI-E x4

USB2.0

USB 3.0

USB2.0

USB 3.0

USB2.0

Port 9~12

Port 1

Port 2

USB Powershare TPS2544

USB2.0

Port 3

Port 7

Port 1

Port 0

M.2 Slot C Key-M

(SATA/PCIe SSD)

Port 2

P.45

Port 3

USB 3.0 Re-driver SN65LVPE50

Card Reader 2 in 1 RTS5176E SD / MS

P.44

HDD Conn.

P.44

USB 3.0 Conn.

( USB Charger )

USB 3.0 Conn.

LED Board

USB2.0

P.46

IO Board

Touch Panel Conn.

P.35

Port 9

SMSC 1404

SIO

4 4

A

B

Charger & Battery

P.55

KB Conn.

P.40

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

C

P.48

Compal Secret Data

2011/08/25 2011/08/25

Compal Secret Data

LED Hall Sensor

Power Button

Deciphered Date

D

Power Button Board

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Block diagram

E

2 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

A

B

C

D

E

Compal Confidential

Project Code : File Name :

1 1

M/B

2 2

IO Board LED Board PWB Board

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

C

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DB block diagram

E

3 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

A

Board ID X00 X01 X02 X03 X04 A00

PCI EXPRESS

1 1

Resistor

N/A

22.1K

DESTINATION Lane 1 Lane 2 Lane 3 Lane 4 Lane 5 Lane 6 Lane 7

NGFF-1 WLAN + BT CARD READER None None None None

None Lane 8 None Lane 9

SSD Lane 10 Lane 11 Lane 12 Lane 13 Lane 14 Lane 15 Lane 16

SSD

None

Alpine Ridge

USB31DESTINATION

USB Conn 1 (Right Side) 2 3 4 5 6

USB Conn 2 (Left Side)

None

DESTINATIONUSB3 7 8 9 10

SATA

0A 1A N/A N/A 0B

None

DESTINATION

SSD

N/ASSD

N/A

None

HDD1B

2 3

None

USB 2.0 DESTINATION

1 2 3 4 5 6 7 8 9 10 11 12

USB Conn 1 (Right Side) USB Conn 2 (Left Side) None None NGFF-1 WLAN + BT None None None None Touch screen None None CAMERA

DESTINATIONCLKOUT_PCIE 0 1 2 3 4

None

NGFF-1 WLAN

CARD READER

Thunderbolt5 6 7 8 9

NGFF-2 SSD

GPU

None

DDI

1 2 3

LPC

LPC1

CLKOUT_PCIE

10 11 12 13 14 15

DESTINATION Alpine Ridge Alpine Ridge

DESTINATION MEC5085LPC0 DEBUG PORT

DESTINATION None None None None None None

Symbol Note :

: means Digital Ground : means Analog Ground

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

A

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Notes List

LA-D991P

4 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

SMBUS Address [0x9a]

AW44

BB43

D D

PCH

AW42 AW45

SMBCLK SMBDATA

SML1_SMBCLK SML1_SMBDAT

1K

+3V_PCH

+3VS

DMN65D8L

+3V_PCH

DMN65D8L

+3V_PCH

DMN65D8L

1K

DMN65D8L

4.7K

AR41

AR44

I2C1_SCK_TP I2C1_SDA_TP

4.7K

AW42AW45

SML0_SMBCLK

C C

SML0_SMBDATA

499

+3V_PCH

+3VS

DMN65D8L DMN65D8L

1K

2.4K

+3VS

+3VALW

+3VS_TP

DIMMA

DIMMB

Thermal

GPU

TP

4.7K

A5 B6

9 8

PBAT_CHG_SMBCLK PBAT_CHG_SMBDAT

4.7K

2.2K

+3VALW_EC

100 ohm

BATT

0x16

0 ohm

Charger

MEC1404

B B

12 11

GPU_THM_SMBCLK GPU_THM_SMBDAT

2.2K

+3VALW_EC

DGPU_PEX_RST#

DMN66D0

DMN66D0 DMN66D0

2.2K

5.1K

+3.3V_GFX_AON

GPU

Thermal

0x9E

2.2K

4

+3VALW_EC

0 ohm

MCP23017

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

0x42

Compal Secret Data

2011/08/25 2012/07/15

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

SMBus Block Diagram

Size Document Number Rev

C

Date: Sheet of

1

5 70Tuesday, November 08, 2016

0.1(X00)

A A

5

B4

MCP23017_SMBCLK

A3

MCP23017_SMBDAT

2.2K

Vinaﬁx.com

5

4

3

2

1

D D

C C

+VCCST

+VCCSTG

PCH_JTAG_TDO

PCH_JTAG_TMS

PCH_JTAG_TDI

RH97 RH98 RH100

RH497 RH496 RH56

RH95 RH61 RH60

1 2

@

1 2

@

1 2

@

1 2 1 2 1 2

1 2

@ 1 2 1 2

@

RH115 0_0402_5%@

RH492 0_0402_5%@

RH118 0_0402_5%@

51_0402_5% 51_0402_5% 51_0402_5%

1 2

PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_TDI

CPU_XDP_TDO CPU_XDP_TMS CPU_XDP_TDI

PCH_JTAG_TCK CPU_XDP_TCK CPU_XDP_TRST#

PCH_JTAG_TDO [18] PCH_JTAG_TMS [18] PCH_JTAG_TDI [18]

PCH_JTAG_TCK [18]

CPU_XDP_TCK [9,18] CPU_XDP_TRST# [9,22]

CPU_XDP_TDO [9]

CPU_XDP_TMS [9]

CPU_XDP_TDI [9]

Pilot_05

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

XDP CONN

1

6 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

PEG_HTX_C_GRX_P[0..15][23] PEG_HTX_C_GRX_N[0..15][23]

PEG_GTX_C_HRX_P[0..15][23] PEG_GTX_C_HRX_N[0..15][23]

D D

C C

PEG_HTX_C_GRX_P[0..15] PEG_HTX_C_GRX_N[0..15] PEG_GTX_C_HRX_P[0..15] PEG_GTX_C_HRX_N[0..15]

+VCCIO

RH24

1 2

24.9_0402_1%

DMI_CRX_PTX_P0[19] DMI_CRX_PTX_N0[19]

DMI_CRX_PTX_P1[19] DMI_CRX_PTX_N1[19]

DMI_CRX_PTX_P2[19] DMI_CRX_PTX_N2[19]

DMI_CRX_PTX_P3[19] DMI_CRX_PTX_N3[19]

4

PEG_GTX_C_HRX_P15 PEG_GTX_C_HRX_N15

PEG_GTX_C_HRX_P14 PEG_GTX_C_HRX_N14

PEG_GTX_C_HRX_P13 PEG_GTX_C_HRX_N13

PEG_GTX_C_HRX_P12 PEG_GTX_C_HRX_N12

PEG_GTX_C_HRX_P11 PEG_GTX_C_HRX_N11

PEG_GTX_C_HRX_P10 PEG_GTX_C_HRX_N10

PEG_GTX_C_HRX_P9 PEG_GTX_C_HRX_N9

PEG_GTX_C_HRX_P8 PEG_GTX_C_HRX_N8

PEG_GTX_C_HRX_P7 PEG_GTX_C_HRX_N7

PEG_GTX_C_HRX_P6 PEG_GTX_C_HRX_N6

PEG_GTX_C_HRX_P5 PEG_GTX_C_HRX_N5

PEG_GTX_C_HRX_P4 PEG_GTX_C_HRX_N4

PEG_GTX_C_HRX_P3 PEG_GTX_C_HRX_N3

PEG_GTX_C_HRX_P2 PEG_GTX_C_HRX_N2

PEG_GTX_C_HRX_P1 PEG_GTX_C_HRX_N1

PEG_GTX_C_HRX_P0 PEG_GTX_C_HRX_N0

PEG_RCOMP

E25 D25

E24 F24

E23 D23

E22 F22

E21 D21

E20 F20

E19 D19

E18 F18

D17 E17

F16 E16

D15 E15

F14 E14

D13 E13

F12 E12

D11 E11

F10 E10

G2

D8 E8

E6 F6

D5

E5 J8

J9

UH1C

PEG_RXP[0] PEG_RXN[0]

PEG_RXP[1] PEG_RXN[1]

PEG_RXP[2] PEG_RXN[2]

PEG_RXP[3] PEG_RXN[3]

PEG_RXP[4] PEG_RXN[4]

PEG_RXP[5] PEG_RXN[5]

PEG_RXP[6] PEG_RXN[6]

PEG_RXP[7] PEG_RXN[7]

PEG_RXP[8] PEG_RXN[8]

PEG_RXP[9] PEG_RXN[9]

PEG_RXP[10] PEG_RXN[10]

PEG_RXP[11] PEG_RXN[11]

PEG_RXP[12] PEG_RXN[12]

PEG_RXP[13] PEG_RXN[13]

PEG_RXP[14] PEG_RXN[14]

PEG_RXP[15] PEG_RXN[15]

PEG_RCOMP

DMI_RXP[0] DMI_RXN[0]

DMI_RXP[1] DMI_RXN[1]

DMI_RXP[2] DMI_RXN[2]

DMI_RXP[3] DMI_RXN[3]

SKL-H_BGA1440

@

REV = 1

SKYLAKE_HALO

BGA1440

?

3 OF 14

PEG_TXP[0] PEG_TXN[0]

PEG_TXP[1] PEG_TXN[1]

PEG_TXP[2] PEG_TXN[2]

PEG_TXP[3] PEG_TXN[3]

PEG_TXP[4] PEG_TXN[4]

PEG_TXP[5] PEG_TXN[5]

PEG_TXP[6] PEG_TXN[6]

PEG_TXP[7] PEG_TXN[7]

PEG_TXP[8] PEG_TXN[8]

PEG_TXP[9] PEG_TXN[9]

PEG_TXP[10] PEG_TXN[10]

PEG_TXP[11] PEG_TXN[11]

PEG_TXP[12] PEG_TXN[12]

PEG_TXP[13] PEG_TXN[13]

PEG_TXP[14] PEG_TXN[14]

PEG_TXP[15] PEG_TXN[15]

DMI_TXP[0] DMI_TXN[0]

DMI_TXP[1] DMI_TXN[1]

DMI_TXP[2] DMI_TXN[2]

DMI_TXP[3] DMI_TXN[3]

B25 A25

B24 C24

B23 A23

B22 C22

B21 A21

B20 C20

B19 A19

B18 C18

A17 B17

C16 B16

A15 B15

C14 B14

A13 B13

C12 B12

A11 B11

C10 B10

B8 A8

C6 B6

B5 A5

D4 B4

?

3

PEG_HTX_GRX_P15 PEG_HTX_GRX_N15

PEG_HTX_GRX_P14 PEG_HTX_GRX_N14

PEG_HTX_GRX_P13 PEG_HTX_GRX_N13

PEG_HTX_GRX_P12 PEG_HTX_GRX_N12

PEG_HTX_GRX_P11 PEG_HTX_GRX_N11

PEG_HTX_GRX_P10 PEG_HTX_GRX_N10

PEG_HTX_GRX_P9 PEG_HTX_GRX_N9

PEG_HTX_GRX_P8 PEG_HTX_GRX_N8

PEG_HTX_GRX_P7 PEG_HTX_GRX_N7

PEG_HTX_GRX_P6 PEG_HTX_GRX_N6

PEG_HTX_GRX_P5 PEG_HTX_GRX_N5

PEG_HTX_GRX_P4 PEG_HTX_GRX_N4

PEG_HTX_GRX_P3 PEG_HTX_GRX_N3

PEG_HTX_GRX_P2 PEG_HTX_GRX_N2

PEG_HTX_GRX_P1 PEG_HTX_GRX_N1

PEG_HTX_GRX_P0 PEG_HTX_GRX_N0

1 2

CH5 0.22U_0201_6.3V6M

1 2

CH6 0.22U_0201_6.3V6M

1 2

CH7 0.22U_0201_6.3V6M

1 2

CH8 0.22U_0201_6.3V6M

1 2

CH9 0.22U_0201_6.3V6M

1 2

CH10 0.22U_0201_6.3V6M

1 2

CH11 0.22U_0201_6.3V6M

1 2

CH12 0.22U_0201_6.3V6M

1 2

CH13 0.22U_0201_6.3V6M

1 2

CH14 0.22U_0201_6.3V6M

1 2

CH15 0.22U_0201_6.3V6M

1 2

CH16 0.22U_0201_6.3V6M

1 2

CH17 0.22U_0201_6.3V6M

1 2

CH18 0.22U_0201_6.3V6M

1 2

CH19 0.22U_0201_6.3V6M

1 2

CH20 0.22U_0201_6.3V6M

1 2

CH21 0.22U_0201_6.3V6M

1 2

CH22 0.22U_0201_6.3V6M

1 2

CH23 0.22U_0201_6.3V6M

1 2

CH24 0.22U_0201_6.3V6M

1 2

CH25 0.22U_0201_6.3V6M

1 2

CH26 0.22U_0201_6.3V6M

1 2

CH27 0.22U_0201_6.3V6M

1 2

CH28 0.22U_0201_6.3V6M

1 2

CH29 0.22U_0201_6.3V6M

1 2

CH30 0.22U_0201_6.3V6M

1 2

CH31 0.22U_0201_6.3V6M

1 2

CH32 0.22U_0201_6.3V6M

1 2

CH33 0.22U_0201_6.3V6M

1 2

CH34 0.22U_0201_6.3V6M

1 2

CH35 0.22U_0201_6.3V6M

1 2

CH36 0.22U_0201_6.3V6M

DMI_CTX_PRX_P0 [19] DMI_CTX_PRX_N0 [19]

DMI_CTX_PRX_P1 [19] DMI_CTX_PRX_N1 [19]

DMI_CTX_PRX_P2 [19] DMI_CTX_PRX_N2 [19]

DMI_CTX_PRX_P3 [19] DMI_CTX_PRX_N3 [19]

PEG_HTX_C_GRX_P15 PEG_HTX_C_GRX_N15

PEG_HTX_C_GRX_P14 PEG_HTX_C_GRX_N14

PEG_HTX_C_GRX_P13 PEG_HTX_C_GRX_N13

PEG_HTX_C_GRX_P12 PEG_HTX_C_GRX_N12

PEG_HTX_C_GRX_P11 PEG_HTX_C_GRX_N11

PEG_HTX_C_GRX_P10 PEG_HTX_C_GRX_N10

PEG_HTX_C_GRX_P9 PEG_HTX_C_GRX_N9

PEG_HTX_C_GRX_P8 PEG_HTX_C_GRX_N8

PEG_HTX_C_GRX_P7 PEG_HTX_C_GRX_N7

PEG_HTX_C_GRX_P6 PEG_HTX_C_GRX_N6

PEG_HTX_C_GRX_P5 PEG_HTX_C_GRX_N5

PEG_HTX_C_GRX_P4 PEG_HTX_C_GRX_N4

PEG_HTX_C_GRX_P3 PEG_HTX_C_GRX_N3

PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_N2

PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_N1

PEG_HTX_C_GRX_P0 PEG_HTX_C_GRX_N0

2

1

UH1D

K36

DDI1_TXP[0]

B B

A A

5

K37

DDI1_TXN[0]

J35

DDI1_TXP[1]

J34

DDI1_TXN[1]

H37

DDI1_TXP[2]

H36

DDI1_TXN[2]

J37

DDI1_TXP[3]

J38

DDI1_TXN[3]

D27

DDI1_AUXP

E27

DDI1_AUXN

H34

DDI2_TXP[0]

H33

DDI2_TXN[0]

F37

DDI2_TXP[1]

G38

DDI2_TXN[1]

F34

DDI2_TXP[2]

F35

DDI2_TXN[2]

E37

DDI2_TXP[3]

E36

DDI2_TXN[3]

F26

DDI2_AUXP

E26

DDI2_AUXN

C34

DDI3_TXP[0]

D34

DDI3_TXN[0]

B36

DDI3_TXP[1]

B34

DDI3_TXN[1]

F33

DDI3_TXP[2]

E33

DDI3_TXN[2]

C33

DDI3_TXP[3]

B33

DDI3_TXN[3]

A27

DDI3_AUXP

B27

DDI3_AUXN

SKL-H_BGA1440

@

4

REV = 1

BGA1440

4 OF 14

EDP_TXP[0] EDP_TXN[0] EDP_TXP[1] EDP_TXN[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3]

EDP_AUXP EDP_AUXN

EDP_DISP_UTIL

EDP_RCOMP

PROC_AUDIO_CLK

PROC_AUDIO_SDI

PROC_AUDIO_SDO

D29 E29 F28 E28 B29 A29 B28 C28

C26 B26

A33

EDP_DISP_UTIL

D37

EDP_COMP

G27 G25 G29

?

Close to CPU

3

EDP_TXP0 [34] EDP_TXN0 [34] EDP_TXP1 [34] EDP_TXN1 [34] EDP_TXN2 [34] EDP_TXP2 [34] EDP_TXN3 [34] EDP_TXP3 [34]

EDP_AUXP [34] EDP_AUXN [34]

1 2

RH20 0_0402_5%@

1 2

RH30 24.9_0402_1%

1 2

RH145 20_0402_5%

EDP_COMP CAD Note:Trace width=20 mils ,Spacing=25mil, Max length=100 mils.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

BIA_PWM_PCH [16,34]

AUD_AZA_CPU_SCLK [18] AUD_AZA_CPU_SDO [18] AUD_AZA_CPU_SDI_R [18]

2011/08/25 2012/07/25

+VCCIO

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

PROCESSOR(1/7) DMI,FDI,PEG

Size Document Number Rev

C

Date: Sheet of

1

7 70Tuesday, November 08, 2016

0.1(X00)

?

SKYLAKE_HALO

Vinaﬁx.com

Interleave

5

4

3

2

1

?

REV = 1

SKYLAKE_HALO

BGA1440

DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]

DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]

DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]

DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]

DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]

DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]

DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]

DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]

DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#

DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQSP[5]/DDR1_DQSP[1] DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQSP[7]/DDR1_DQSP[5]

DDR0_DQSP[2]/DDR0_DQSP[4] DDR0_DQSP[3]/DDR0_DQSP[5] DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_DQSN[7]/DDR1_DQSN[5]

1 OF 14

DDR0_CKP[0] DDR0_CKN[0] DDR0_CKN[1]

DDR0_CKP[1] DDR0_CLKP[2] DDR0_CLKN[2] DDR0_CLKP[3] DDR0_CLKN[3]

DDR0_CKE[0]

DDR0_CKE[1]

DDR0_CKE[2]

DDR0_CKE[3]

DDR0_CS#[0]

DDR0_CS#[1]

DDR0_CS#[2]

DDR0_CS#[3]

DDR0_ODT[0]

DDR0_ODT[1]

DDR0_ODT[2]

DDR0_ODT[3]

DDR0_MA[3] DDR0_MA[4]

DDR0_PAR

DDR0_ALERT#

DDR0_DQSN[0] DDR0_DQSN[1]

DDR0_DQSP[0] DDR0_DQSP[1]

DDR0_DQSP[8] DDR0_DQSN[8]

?

AG1 AG2 AK1 AK2 AL3 AK3 AL2 AL1

AT1 AT2 AT3 AT5

AD5 AE2 AD2 AE5

AD3 AE4 AE1 AD4

AH5 AH1 AU1

AH4 AG4 AD1

AH3 AP4 AN4 AP5 AP2 AP1 AP3 AN1 AN3 AT4 AH2 AN2 AU4 AE3 AU2 AU3

AG3 AU5

BR5 BL3 BG3 BD3 AB3 V3 R3 M3

BP5 BK3 BF3 BC3 AA3 U3 P3 L3

AY3 BA3

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

UH1B

BT11

1 2 1 2 1 2

DDR_B_D0 DDR_B_D1 DDR_B_D6 DDR_B_D2 DDR_B_D4 DDR_B_D5 DDR_B_D3 DDR_B_D7 DDR_B_D12

DDR_B_D9 DDR_B_D10 DDR_B_D14 DDR_B_D11 DDR_B_D13 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D21 DDR_B_D19 DDR_B_D18 DDR_B_D22 DDR_B_D20 DDR_B_D23 DDR_B_D26 DDR_B_D24 DDR_B_D31 DDR_B_D25 DDR_B_D28 DDR_B_D30 DDR_B_D29 DDR_B_D27 DDR_B_D34 DDR_B_D38 DDR_B_D32 DDR_B_D36 DDR_B_D35 DDR_B_D39 DDR_B_D37 DDR_B_D33 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D47 DDR_B_D46 DDR_B_D48 DDR_B_D51 DDR_B_D50 DDR_B_D52 DDR_B_D53 DDR_B_D55 DDR_B_D49 DDR_B_D54 DDR_B_D58 DDR_B_D57 DDR_B_D59 DDR_B_D61 DDR_B_D62 DDR_B_D60 DDR_B_D56 DDR_B_D63

DDR1_DQ[0]/DDR0_DQ[16]

BR11

DDR1_DQ[1]/DDR0_DQ[17]

BT8

DDR1_DQ[2]/DDR0_DQ[18]

BR8

DDR1_DQ[3]/DDR0_DQ[19]

BP11

DDR1_DQ[4]/DDR0_DQ[20]

BN11

DDR1_DQ[5]/DDR0_DQ[21]

BP8

DDR1_DQ[6]/DDR0_DQ[22]

BN8

DDR1_DQ[7]/DDR0_DQ[23]

BL12

DDR1_DQ[8]/DDR0_DQ[24]

BL11

DDR1_DQ[9]/DDR0_DQ[25]

BL8

DDR1_DQ[10]/DDR0_DQ[26]

BJ8

DDR1_DQ[11]/DDR0_DQ[27]

BJ11

DDR1_DQ[12]/DDR0_DQ[28]

BJ10

DDR1_DQ[13]/DDR0_DQ[29]

BL7

DDR1_DQ[14]/DDR0_DQ[30]

BJ7

DDR1_DQ[15]/DDR0_DQ[31]

BG11

DDR1_DQ[16]/DDR0_DQ[48]

BG10

DDR1_DQ[17]/DDR0_DQ[49]

BG8

DDR1_DQ[18]/DDR0_DQ[50]

BF8

DDR1_DQ[19]/DDR0_DQ[51]

BF11

DDR1_DQ[20]/DDR0_DQ[52]

BF10

DDR1_DQ[21]/DDR0_DQ[53]

BG7

DDR1_DQ[22]/DDR0_DQ[54]

BF7

DDR1_DQ[23]/DDR0_DQ[55]

BB11

DDR1_DQ[24]/DDR0_DQ[56]

BC11

DDR1_DQ[25]/DDR0_DQ[57]

BB8

DDR1_DQ[26]/DDR0_DQ[58]

BC8

DDR1_DQ[27]/DDR0_DQ[59]

BC10

DDR1_DQ[28]/DDR0_DQ[60]

BB10

DDR1_DQ[29]/DDR0_DQ[61]

BC7

DDR1_DQ[30]/DDR0_DQ[62]

BB7

DDR1_DQ[31]/DDR0_DQ[63]

AA11

DDR1_DQ[32]/DDR1_DQ[16]

AA10

DDR1_DQ[33]/DDR1_DQ[17]

AC11

DDR1_DQ[34]/DDR1_DQ[18]

AC10

DDR1_DQ[35]/DDR1_DQ[19]

AA7

DDR1_DQ[36]/DDR1_DQ[20]

AA8

DDR1_DQ[37]/DDR1_DQ[21]

AC8

DDR1_DQ[38]/DDR1_DQ[22]

AC7

DDR1_DQ[39]/DDR1_DQ[23]

W8

DDR1_DQ[40]/DDR1_DQ[24]

W7

DDR1_DQ[41]/DDR1_DQ[25]

V10

DDR1_DQ[42]/DDR1_DQ[26]

V11

DDR1_DQ[43]/DDR1_DQ[27]

W11

DDR1_DQ[44]/DDR1_DQ[28]

W10

DDR1_DQ[45]/DDR1_DQ[29]

V7

DDR1_DQ[46]/DDR1_DQ[30]

V8

DDR1_DQ[47]/DDR1_DQ[31]

R11

DDR1_DQ[48]

P11

DDR1_DQ[49]

P7

DDR1_DQ[50]

R8

DDR1_DQ[51]

R10

DDR1_DQ[52]

P10

DDR1_DQ[53]

R7

DDR1_DQ[54]

P8

DDR1_DQ[55]

L11

DDR1_DQ[56]

M11

DDR1_DQ[57]

L7

DDR1_DQ[58]

M8

DDR1_DQ[59]

L10

DDR1_DQ[60]

M10

DDR1_DQ[61]

M7

DDR1_DQ[62]

L8

DDR1_DQ[63]

AW11

DDR1_ECC[0]

AY11

DDR1_ECC[1]

AY8

DDR1_ECC[2]

AW8

DDR1_ECC[3]

AY10

DDR1_ECC[4]

AW10

DDR1_ECC[5]

AY7

DDR1_ECC[6]

AW7

DDR1_ECC[7]

G1

DDR_RCOMP[0]

H1

DDR_RCOMP[1]

J2

DDR_RCOMP[2]

SKL-H_BGA1440

@

DDR CHANNEL B

M_CLK_DDR0 [14] M_CLK_DDR#0 [14] M_CLK_DDR#1 [14] M_CLK_DDR1 [14]

DDR_CKE0_DIMMA [14] DDR_CKE1_DIMMA [14]

DDR_CS0_DIMMA# [14] DDR_CS1_DIMMA# [14]

M_ODT0 [14] M_ODT1 [14]

DDR_A_BS0 [14] DDR_A_BS1 [14] DDR_A_BG0 [14]

DDR_A_RAS# [14] DDR_A_WE# [14] DDR_A_CAS# [14]

DDR_A_BG1 [14] DDR_A_ACT# [14] DDR_B_ACT# [15]

DDR_A_PAR [14] DDR_A_ALERT# [14]

RH148 121_0402_1% RH149 75_0402_1% RH150 100_0402_1%

DDR_A_D0 DDR_A_D1

DDR_A_D[0..63][14] DDR_A_MA[0..13][14] DDR_A_DQS#[0..7][14] DDR_A_DQS[0..7][14]

D D

C C

B B

DDR_B_D[0..63][15] DDR_B_MA[0..13][15] DDR_B_DQS#[0..7][15] DDR_B_DQS[0..7][15]

DDR_A_D2 DDR_A_D7 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D3 DDR_A_D9 DDR_A_D13 DDR_B_D8 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D8 DDR_A_D14 DDR_A_D15 DDR_A_D20 DDR_A_D16 DDR_A_D23 DDR_A_D19 DDR_A_D21 DDR_A_D17 DDR_A_D22 DDR_A_D18 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D44 DDR_A_D45 DDR_A_D43 DDR_A_D47 DDR_A_D41 DDR_A_D40 DDR_A_D42 DDR_A_D46 DDR_A_D53 DDR_A_D51 DDR_A_D49 DDR_A_D55 DDR_A_D52 DDR_A_D54 DDR_A_D48 DDR_A_D50 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D63 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D59

DDR0_DQ[0]

BT6

DDR0_DQ[1]

BP3

DDR0_DQ[2]

BR3

DDR0_DQ[3]

BN5

DDR0_DQ[4]

BP6

DDR0_DQ[5]

BP2

DDR0_DQ[6]

BN3

DDR0_DQ[7]

BL4

DDR0_DQ[8]

BL5

DDR0_DQ[9]

BL2

DDR0_DQ[10]

BM1

DDR0_DQ[11]

BK4

DDR0_DQ[12]

BK5

DDR0_DQ[13]

BK1

DDR0_DQ[14]

BK2

DDR0_DQ[15]

BG4

DDR0_DQ[16]/DDR0_DQ[32]

BG5

DDR0_DQ[17]/DDR0_DQ[33]

BF4

DDR0_DQ[18]/DDR0_DQ[34]

BF5

DDR0_DQ[19]/DDR0_DQ[35]

BG2

DDR0_DQ[20]/DDR0_DQ[36]

BG1

DDR0_DQ[21]/DDR0_DQ[37]

BF1

DDR0_DQ[22]/DDR0_DQ[38]

BF2

DDR0_DQ[23]/DDR0_DQ[39]

BD2

DDR0_DQ[24]/DDR0_DQ[40]

BD1

DDR0_DQ[25]/DDR0_DQ[41]

BC4

DDR0_DQ[26]/DDR0_DQ[42]

BC5

DDR0_DQ[27]/DDR0_DQ[43]

BD5

DDR0_DQ[28]/DDR0_DQ[44]

BD4

DDR0_DQ[29]/DDR0_DQ[45]

BC1

DDR0_DQ[30]/DDR0_DQ[46]

BC2

DDR0_DQ[31]/DDR0_DQ[47]

AB1

DDR0_DQ[32]/DDR1_DQ[0]

AB2

DDR0_DQ[33]/DDR1_DQ[1]

AA4

DDR0_DQ[34]/DDR1_DQ[2]

AA5

DDR0_DQ[35]/DDR1_DQ[3]

AB5

DDR0_DQ[36]/DDR1_DQ[4]

AB4

DDR0_DQ[37]/DDR1_DQ[5]

AA2

DDR0_DQ[38]/DDR1_DQ[6]

AA1

DDR0_DQ[39]/DDR1_DQ[7]

V5

DDR0_DQ[40]/DDR1_DQ[8]

V2

DDR0_DQ[41]/DDR1_DQ[9]

U1

DDR0_DQ[42]/DDR1_DQ[10]

U2

DDR0_DQ[43]/DDR1_DQ[11]

V1

DDR0_DQ[44]/DDR1_DQ[12]

V4

DDR0_DQ[45]/DDR1_DQ[13]

U5

DDR0_DQ[46]/DDR1_DQ[14]

U4

DDR0_DQ[47]/DDR1_DQ[15]

R2

DDR0_DQ[48]/DDR1_DQ[32]

P5

DDR0_DQ[49]/DDR1_DQ[33]

R4

DDR0_DQ[50]/DDR1_DQ[34]

P4

DDR0_DQ[51]/DDR1_DQ[35]

R5

DDR0_DQ[52]/DDR1_DQ[36]

P2

DDR0_DQ[53]/DDR1_DQ[37]

R1

DDR0_DQ[54]/DDR1_DQ[38]

P1

DDR0_DQ[55]/DDR1_DQ[39]

M4

DDR0_DQ[56]/DDR1_DQ[40]

M1

DDR0_DQ[57]/DDR1_DQ[41]

L4

DDR0_DQ[58]/DDR1_DQ[42]

L2

DDR0_DQ[59]/DDR1_DQ[43]

M5

DDR0_DQ[60]/DDR1_DQ[44]

M2

DDR0_DQ[61]/DDR1_DQ[45]

L5

DDR0_DQ[62]/DDR1_DQ[46]

L1

DDR0_DQ[63]/DDR1_DQ[47]

BA2

DDR0_ECC[0]

BA1

DDR0_ECC[1]

AY4

DDR0_ECC[2]

AY5

DDR0_ECC[3]

BA5

DDR0_ECC[4]

BA4

DDR0_ECC[5]

AY1

DDR0_ECC[6]

AY2

DDR0_ECC[7]

DDR CHANNEL A

SKL-H_BGA1440

@

UH1A

BR6

REV = 1

?

SKYLAKE_HALO

BGA1440

DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]

DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]

DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]

DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]

DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]

DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]

DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#

DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQSN[5]/DDR1_DQSN[3]

DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQSP[1]/DDR0_DQSP[3] DDR1_DQSP[2]/DDR0_DQSP[6] DDR1_DQSP[3]/DDR0_DQSP[7] DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_DQSP[5]/DDR1_DQSP[3]

2 OF 14

DDR1_CKP[0] DDR1_CKN[0] DDR1_CKN[1]

DDR1_CKP[1] DDR1_CLKP[2] DDR1_CLKN[2] DDR1_CLKP[3] DDR1_CLKN[3]

DDR1_CKE[0]

DDR1_CKE[1]

DDR1_CKE[2]

DDR1_CKE[3]

DDR1_CS#[0] DDR1_CS#[1] DDR1_CS#[2] DDR1_CS#[3]

DDR1_ODT[0]

DDR1_ODT[1]

DDR1_ODT[2]

DDR1_ODT[3]

DDR1_MA[3] DDR1_MA[4]

DDR1_PAR

DDR1_ALERT#

DDR1_DQSN[6] DDR1_DQSN[7]

DDR1_DQSP[6] DDR1_DQSP[7]

DDR1_DQSP[8] DDR1_DQSN[8]

DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ

?

AM9 AN9 AM8 AM7 AM11 AM10 AJ10 AJ11

AT8 AT10 AT7 AT11

AF11 AE7 AF10 AE10

AF7 AE8 AE9 AE11

AH10 AH11 AF8

AH8 AH9 AR9

AJ9 AK6 AK5 AL5 AL6 AM6 AN7 AN10 AN8 AR11 AH7 AN11 AR10 AF9 AR7 AT9

AJ7 AR8

BP9 BL9 BG9 BC9 AC9 W9 R9 M9

BR9 BJ9 BF9 BB9 AA9 V9 P9 L9

AW9 AY9

BN13 BP13 BR13

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

M_CLK_DDR2 [15] M_CLK_DDR#2 [15] M_CLK_DDR#3 [15] M_CLK_DDR3 [15]

DDR_CKE2_DIMMB [15] DDR_CKE3_DIMMB [15]

DDR_CS2_DIMMB# [15] DDR_CS3_DIMMB# [15]

M_ODT2 [15] M_ODT3 [15]

DDR_B_RAS# [15] DDR_B_WE# [15] DDR_B_CAS# [15]

DDR_B_BS0 [15] DDR_B_BS1 [15] DDR_B_BG0 [15]

DDR_B_BG1 [15]

DDR_B_PAR [15] DDR_B_ALERT# [15]

+V_DDR_REFA_R +V_DDR_REFB_R

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Title

PROCESSOR(3/7) DDRIII

Size Document Number Rev

C

Date: Sheet of

1

8 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

CFG Straps for Processor

+VCCST

4

3

2

1

Stall reset sequence after CPU PLL lock until de-asserted

CFG0

D D

1 = (Default) Normal Operation; No stall.

*

0 = Stall.

1 2

CFG0

@

RH183 1K_0402_5%

PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS

CFG2

Display Port Presence Strap

C C

CFG4

1: Normal Operation; Lane # definition matches socket pin map definition

0:Lane Reversed

*

1 2

CFG2

RH184 1K_0402_5%

1 : Disabled; No Physical Display Port attached to Embedded Display Port

0 : Enabled; An external Display Port device is connected to the Embedded Display Port

*

Enable because PS175(DP to HDMI Converter)

1 2

CFG4

RH185 1K_0402_5%

RH163 1K_0402_5%

RH156 51_0402_5%

RH164 1K_0402_5%

RH151 100_0402_5%

RH152 56.2_0402_1%

RH144 49.9_0402_1%

+VCCSTG

1 2

RH165 1K_0402_5%

1 2

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

*

CFG[6:5]

B B

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled

01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

1 2

CFG5

@

RH186 1K_0402_5%

1 2

CFG6

@

RH187 1K_0402_5%

PEG DEFER TRAINING

CFG7

1: (Default) PEG Train immediately following xxRESETB de assertion

*

0: PEG Wait for BIOS for training

1 2

CFG7

A A

@

RH188 1K_0402_5%

@

SM_PG_CTRL[57]

H_THERMTRIP#_R

XDP_PREQ#

H_VCCST_PWRGD

VR_SVID_DATA

VR_SVID_ALERT#

H_CATERR#

H_PROCHOT#

Pilot_05

+1.2V_DDR

+3VS

1

@

CH197

0.1U_0402_10V7K

2

12

RH93 220K_0402_5%

?

SKYLAKE_HALO

UH1E

BCLKP BCLKN

PCI_BCLKP PCI_BCLKN

CLK24P CLK24N

VIDALERT# VIDSCK VIDSOUT PROCHOT#

DDR_VTT_CNTL

VCCST_PWRGD PROCPWRGD

RESET# PM_SYNC PM_DOWN PECI THERMTRIP#

SKTOCC# PROC_SELECT#

CATERR#

SKL-H_BGA1440

@

D1

RSVD_TP

E1

RSVD_TP

E3

RSVD_TP

E2

RSVD_TP

BR1

RSVD_TP

BT2

RSVD_TP

BN35

RSVD

J24

RSVD

H24

RSVD

BN33

RSVD

BL34

RSVD

N29

RSVD

R14

RSVD

AE29

RSVD

AA14

RSVD

A36

RSVD

A37

RSVD

H23

PROC_TRIGIN

J23

PROC_TRIGOUT

F30

RSVD

E30

RSVD

B30

RSVD

C30

RSVD

G3

RSVD

J3

RSVD

BR35

RSVD

BR31

RSVD

BH30

RSVD

@

BGA1440

REV = 1

UH1K

SKL-H_BGA1440

5 OF 14

SKYLAKE_HALO

BH31 BH32 BH29 BR30

BT13

BT31 BP35 BM34 BP31 BT34

BR33

BM30

B31 A32

D35 C36

E31 D31

H13

J31

BN1

PCH_CPU_BCLK_P[17] PCH_CPU_BCLK_N[17]

PCH_CPU_PCIBCLK_P[17] PCH_CPU_PCIBCLK_N[17]

CPU_24MHZ_P[17] CPU_24MHZ_N[17]

VR_SVID_ALERT#[63]

VR_SVID_CLK[63] VR_SVID_DATA[63] H_PROCHOT#[48,54,55,63]

H_VCCST_PWRGD[18]

H_CPUPWRGD[18] PLTRST_CPU#[16]

H_PM_SYNC_R[16]

H_PM_DOWN[16]

PECI_EC[16,48]

H_THERMTRIP#_R[16] PROC_DETECT#[16]

VR_SVID_ALERT# VR_SVID_DATA

H_VCCST_PWRGD

H_PM_DOWN

UC1

5

VCC

4

Y

GND

74AUP1G07GW_TSSOP5

PCH_TRIGGER[22] CPU_TRIGGER[22]

1

NC

2

A

3

1 2

RH153 220_0402_5%

1 2

RH158 499_0402_1%

1 2

RH154 60.4_0402_1%

1 2

RH155 20_0402_5%

1 2

RH190 0_0402_5%@

1 2

RH89 0_0402_5%@

DDR_VTT_PG_CTRL

PCH_TRIGGER PCH_TRIGGER_R CPU_TRIGGER CPU_TRIGGER_R

RH167 30_0402_5% RH192 30_0402_5%

1 2 1 2

VR_SVID_ALERT#_R

H_PROCHOT#_RH_PROCHOT# DDR_VTT_PG_CTRL

VCCST_PWRGD_CPU

PLTRST_CPU# H_PM_SYNC_R H_PM_DOWN_R PECI_EC_R H_THERMTRIP#_R

H_CATERR#

CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8]

CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15]

CFG[17] CFG[16] CFG[19] CFG[18]

BPM#[0] BPM#[1] BPM#[2] BPM#[3]

PROC_TDO

PROC_TDI PROC_TMS PROC_TCK

PROC_TRST# PROC_PREQ# PROC_PRDY#

CFG_RCOMP

?

BGA1440

11 OF 14

BN25

CFG0

BN27 BN26

CFG2

BN28 BR20

CFG4

BM20

CFG5

BT20

CFG6

BP20

CFG7

BR23 BR22 BT23 BT22 BM19 BR19 BP19 BT19

BN23 BP23 BP22 BN22

BR27 BT27 BM31 BT30

BT28

CPU_XDP_TDO

BL32

CPU_XDP_TDI

BP28

CPU_XDP_TMS

BR28

CPU_XDP_TCK

BP30

CPU_XDP_TRST#

BL30

XDP_PREQ#

BP27

XDP_PRDY#

BT25

?

CFG_RCOMP

RSVD_TP RSVD_TP

CPU_XDP_TDO [6] CPU_XDP_TDI [6] CPU_XDP_TMS [6]

CPU_XDP_TCK [6,18] CPU_XDP_TRST# [6,22]

XDP_PREQ# [22] XDP_PRDY# [22]

12

RH59

49.9_0402_1%

BM33 BL33

BJ14 BJ13

BK28

RSVD

BJ28

RSVD

BJ18

VSS

BJ16 BK16

BK24 BJ24

BK21

RSVD

BJ21

RSVD

BT17

RSVD

BR17

RSVD

BK18

VSS

BJ34 BJ33

G13

RSVD

AJ8

RSVD

BL31

RSVD

B2

NCTF

B38

NCTF

BP1

NCTF

BR2

NCTF

C1

NCTF

C38

NCTF

?REV = 1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

PROCESSOR(4/7) RSVD,CFG

Size Document Number Rev

C

Date: Sheet of

1

9 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

D D

UH1G

AA13

VCC

AA31

VCC

AA32

VCC

AA33

VCC

AA34

VCC

AA35

VCC

AA36

VCC

AA37

VCC

AA38

VCC

AB29

VCC

AB30

VCC

AB31

VCC

AB32

VCC

AB35

VCC

AB36

VCC

AB37

VCC

AB38

VCC

AC13

VCC

AC14

VCC

AC29

VCC

AC30

VCC

AC31

VCC

AC32

VCC

AC33

VCC

AC34

VCC

AC35

VCC

AC36

VCC

AD13

VCC

C C

B B

AD14 AD31 AD32 AD33 AD34 AD35 AD36 AD37 AD38 AE13 AE14 AE30 AE31 AE32 AE35 AE36 AE37 AE38 AF35 AF36 AF37 AF38

K13 K14 L13 N13 N14 N30 N31 N32 N35 N36 N37 N38 P13

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

SKL-H_BGA1440

@

?

SKYLAKE_HALO

BGA1440

7 OF 14

REV = 1 ?

VCC_SENSE

VSS_SENSE

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

4

+VCC_CORE+VCC_CORE

V32 V33 V34 V35 V36 V37 V38 W13 W14 W29 W30 W31 W32 W35 W36 W37 W38 Y29 Y30 Y31 Y32 Y33 Y34 Y35 Y36 L14 P29 P30 P31 P32 P33 P34 P35 P36 R13 R31 R32 R33 R34 R35 R36 R37 R38 T29 T30 T31 T32 T35 T36 T37 T38 U29 U30 U31 U32 U33 U34 U35 U36 V13 V14 V31 P14

AG37 AG38

+VCC_CORE

12

RH197 100_0402_1%

1 2

RH198 0_0402_5%@

1 2

RH28 0_0402_5%@

RH29 100_0402_1%

Pilot_05

3

VCC_SENSE [63]

VSS_SENSE [63]

1 2

RH166 49.9_0402_1%@ RH57 49.9_0402_1%@

1 2 1 2

RH58 49.9_0402_1%@

2

UH1J

BJ17

VCCOPC

BJ19

VCCOPC

BJ20

VCCOPC

BK17

VCCOPC

BK19

VCCOPC

BK20

VCCOPC

BL16

VCCOPC

BL17

VCCOPC

BL18

VCCOPC

BL19

VCCOPC

BL20

VCCOPC

BL21

VCCOPC

BM17

VCCOPC

BN17

VCCOPC

BJ23

RSVD

BJ26

RSVD

BJ27

RSVD

BK23

RSVD

BK26

RSVD

BK27

RSVD

BL23

RSVD

BL24

RSVD

BL25

RSVD

BL26

RSVD

BL27

RSVD

BL28

RSVD

BM24

RSVD

BL15

VCCOPC_SENSE

BM16

VSSOPC_SENSE

BL22

RSVD

BM22

RSVD

BP15

VCCEOPIO

BR15

VCCEOPIO

BT15

VCCEOPIO

BP16

RSVD

BR16

RSVD

BT16

RSVD

BN15

VCCEOPIO_SENSE

BM15

VSSEOPIO_SENSE

BP17

RSVD

BN16

RSVD

BM14

VCC_OPC_1P8

BL14

VCC_OPC_1P8

BJ35

RSVD

BJ36

RSVD

AT13

ZVM#

AW13

MSM#

AU13

ZVM2#

AY13

MSM2#

BT29

OPC_RCOMP

BR25

OPCE_RCOMP

BP25

OPCE_RCOMP2

SKL-H_BGA1440

REV = 1

@

SKYLAKE_HALO

BGA1440

1

?

10 OF 14

?

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Title

PROCESSOR(5/7) PWR,BYPASS

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

10 70Tuesday, November 08, 2016

1

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

+VCCSTG

10U_0603_6.3V6M

D D

+VCCSA

?

SKYLAKE_HALO

UH1I

VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA

VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO

SKL-H_BGA1440

@

BGA1440

9 OF 14

VCCPLL_OC VCCPLL_OC

VCCSA_SENSE

VSSSA_SENSE VCCIO_SENSE

VSSIO_SENSE

J30 K29 K30 K31 K32 K33 K34 K35

L31

L32

L35

L36

L37

L38 M29 M30 M31 M32 M33 M34

AG12

M35 M36

G15 G17 G19 G21

H15

H16

H17

H19

H20

H21

H26

H27

J15

J16

J17

J19

J20

J21

J26

J27

C C

B B

+VCCIO

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VDDQC

VCCST VCCSTG VCCSTG

VCCPLL VCCPLL

+1.2V_DDR

AA6 AE12 AF5 AF6 AG5 AG9 AJ12 AL11 AP6 AP7 AR12 AR6 AT12 AW6 AY6 J5 J6 K12 K6 L12 L6 R6 T6 W6

Y12 BH13

G11

H30 H29 G30 H28

J28

M38 M37

H14 J14

?REV = 1

+1.2V_DDR

Pilot_05

12

RH34

@

0_0402_5%

+VCCST

RH201 100_0402_1% RH202 0_0402_5%@ RH31 0_0402_5%@ RH41 100_0402_1%

RH515 100_0402_1% RH514 0_0402_5%@ RH513 0_0402_5%@ RH516 100_0402_1%

1 2

RH107 0_0402_5%@

+VCCSTG

+VCCST

1 2 1 2 1 2 1 2

+1.2V_DDR+1.2V_VCCPLL_OC

+VCCSA

VCCSA_SENSE [63]

VSSSA_SENSE [63]

+VCCIO

VCCIO_SENSE [59]

VSSIO_SENSE [59]

Pilot_05

10U_0603_6.3V6M

CH102

1

2

10U_0603_6.3V6M

CH103

CH104

1

2

1U_0402_6.3V6K

CH106

1

2

+VCCST+VCCIO

+1.2V_DDR

1

2

1U_0402_6.3V6K

CH110

1

2

22U_0603_6.3V6M

1

CH129

2

+1.2V_DDR

1U_0402_6.3V6K

CH204

1

2

22U_0603_6.3V6M

1

CH130

CH131

CH132

2

10U_0603_6.3V6M

CH124

CH121

CH118

1

2

+VCCSA

10U_0603_6.3V6M

CH112

CH111

1

2

+VCCSA +VCCSA

1U_0402_6.3V6K

CH133

CH134

1

2

10U_0603_6.3V6M

CH120

1

2

10U_0603_6.3V6M

CH119

1

2

1

2

10U_0603_6.3V6M

CH123

CH122

1

2

10U_0603_6.3V6M

CH113

CH114

1

2

1U_0402_6.3V6K

CH135

10U_0603_6.3V6M

CH126

CH125

1

2

10U_0603_6.3V6M

CH115

10U_0603_6.3V6M

CH117

CH116

1

2

47U_0603_6.3V6M

CH136

1

2

10U_0603_6.3V6M

CH127

CH128

1

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

PROCESSOR(6/7) PWR

Size Document Number Rev

Custom

Date: Sheet of

1

11 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

+VCCGT

?

SKYLAKE_HALO

UH1H

D D

C C

B B

BG34 BG35 BG36 BH33 BH34 BH35 BH36 BH37 BH38

BJ37

BJ38 BL36 BL37 BM36 BM37 BN36 BN37 BN38 BP37 BP38 BR37 BT37 BE38 BF13 BF14 BF29 BF30 BF31 BF32 BF35 BF36 BF37 BF38 BG29 BG30 BG31 BG32 BG33 BC36 BC37 BC38 BD13 BD14 BD29 BD30 BD31 BD32 BD33 BD34 BD35 BD36 BE31 BE32 BE37

VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT

SKL-H_BGA1440

@

BGA1440

REV = 1

8 OF 14

VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT

+VCCGT +VCCGT

AV29 AV30 AV31 AV32 AV33 AV34 AV35 AV36 AW14 AW31 AW32 AW33 AW34 AW35 AW36 AW37 AW38 AY29 AY30 AY31 AY32 AY35 AY36 AY37 AY38 BA13 BA14 BA29 BA30 BA31 BA32 BA33 BA34 BA35 BA36 BB13 BB14 BB31 BB32 BB33 BB34 BB35 BB36 BB37 BB38 BC29 BC30 BC31 BC32 BC35 BE33 BE34 BE35 BE36

?

AJ29 AJ30 AJ31 AJ32 AJ33 AJ34 AJ35

AJ36 AK31 AK32 AK33 AK34 AK35 AK36 AK37 AK38 AL13 AL29 AL30 AL31 AL32 AL35 AL36 AL37 AL38

AM13 AM14 AM29 AM30 AM31 AM32 AM33 AM34 AM35 AM36

AN13 AN14 AN31 AN32 AN33 AN34 AN35 AN36 AN37 AN38 AP13 AP14 AP29 AP30 AP31 AP32 AP35 AP36 AP37 AP38 AR29 AR30 AR31 AR32 AR33 AR34 AR35 AR36 AT14 AT31 AT32 AT33 AT34 AT35 AT36 AT37 AT38 AU14 AU29 AU30 AU31 AU32 AU35 AU36 AU37 AU38

UH1N

VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT

SKL-H_BGA1440

REV = 1 @

?

SKYLAKE_HALO

BGA1440

14 OF 14

VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX

VCCGT_SENSE

VSSGTX_SENSE

VSSGT_SENSE

VCCGTX_SENSE

AF29 AF30 AF31 AF32 AF33 AF34 AG13 AG14 AG31 AG32 AG33 AG34 AG35 AG36 AH13 AH14 AH29 AH30 AH31 AH32 AJ13 AJ14

+VCCGT

12

RH203 100_0402_1%

AH38 AH35 AH37 AH36

?

RH204 0_0402_5%@ RH32

12

RH33 100_0402_1%

1 2 1 2

0_0402_5%@

Pilot_05

VCCGT_SENSE [63]

VSSGT_SENSE [63]

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

PROCESSOR(2/7) PM,XDP,CLK

12 70Tuesday, November 08, 2016

1

12 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

?

SKYLAKE_HALO

UH1F

BGA1440

Y38

VSS

Y37

VSS

Y14

VSS

Y13

W34 W33 W12

M14 M13 M12

Y11 Y10

Y9 Y8 Y7

W5 W4 W3 W2

W1 V30 V29 V12

V6 U38 U37

U6 T34 T33 T14 T13 T12 T11 T10

T9 T8 T7 T5 T4 T3 T2

T1 R30 R29 R12 P38 P37 P12

P6 N34 N33 N12 N11 N10

N9 N8 N7 N6 N5 N4 N3 N2 N1

M6 L34 L33 L30 L29 K38 K11 K10

K9 K8 K7 K5 K4 K3 K2

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

SKL-H_BGA1440

REV = 1

@

6 OF 14

D D

C C

B B

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

NCTFVSS

K1 J36 J33 J32 J25 J22 J18 J10 J7 J4 H35 H32 H25 H22 H18 H12 H11 G28 G26 G24 G23 G22 G20 G18 G16 G14 G12 G10 G9 G8 G6 G5 G4 F36 F31 F29 F27 F25 F23 F21 F19 F17 F15 F13 F11 F9 F8 F5 F4 F3 F2 E38 E35 E34 E9 E4 D33 D30 D28 D26 D24 D22 D20 D18 D16 D14 D12 D10 D9 D6 D3 C37 C31 C29 C27

D38

?

BT32 BT26 BT24 BT21 BT18 BT14 BT12

BR36 BR34 BR29 BR26 BR24 BR21 BR18 BR14 BR12

BP34 BP33 BP29 BP26 BP24 BP21 BP18 BP14 BP12

BN34 BN31 BN30 BN29 BN24 BN21 BN20 BN19 BN18 BN14 BN12

BM38 BM35 BM28 BM27 BM26 BM23 BM21 BM13 BM12

BM9 BM6

BM2 BL29 BK29 BK15 BK14

BJ32 BJ31 BJ25

BJ22 BH14 BH12

BH9 BH8 BH5 BH4

BH1 BG38 BG13 BG12

BF33 BF12 BE29

BD9 BC34 BC12

BB12

C17 C13

BT9 BT5

BR7

BP7

BN9 BN7 BN4 BN2

BE6

C9

REV = 1 @

SKYLAKE_HALO

UH1L

BGA1440

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

SKL-H_BGA1440

?

12 OF 14

NCTFVSS NCTFVSS NCTFVSS NCTFVSS NCTFVSS NCTFVSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

SKYLAKE_HALO

UH1M

AW5 AW4 AW3 AW2 AW1

AU9 AU8 AU7 AU6

AR5 AR4 AR3 AR2 AR1

AN6 AN5

AM5 AM4 AM3 AM2 AM1

BB4 BB3 BB2 BB1

BA9 BA8 BA7 BA6

B9

AT6

AP9 AP8

AL9 AL8 AL7 AL4

BGA1440

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

SKL-H_BGA1440

REV = 1

@

?

13 OF 14

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

NCTFVSS NCTFVSS NCTFVSS NCTFVSS NCTFVSS

AK30 AK29 AK4 AJ38 AJ37 AJ6 AJ5 AJ4 AJ3 AJ2 AJ1 AH34 AH33 AH12 AH6 AG30 AG29 AG11 AG10 AG8 AG7 AG6 AF14 AF13 AF12 AF4 AF3 AF2 AF1 AE34 AE33 AE6 AD30 AD29 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AC38 AC37 AC12 AC6 AC5 AC4 AC3 AC2 AC1 AB34 AB33 AB6 AA30 AA29 AA12 A30 A28 A26 A24 A22 A20 A18 A16 A14 A12 A10 A9 A6

B37 B3 A34 A4 A3

?

C25 C23 C21 C19 C15 C11 C8 C5 BM29 BM25 BM18 BM11 BM8 BM7 BM5 BM3 BL38 BL35 BL13 BL6 BK25 BK22 BK13 BK6 BJ30 BJ29 BJ15 BJ12 BH11 BH10 BH7 BH6 BH3 BH2 BG37 BG14 BG6 BF34 BF6 BE30 BE5 BE4 BE3 BE2 BE1 BD38 BD37 BD12 BD11 BD10 BD8 BD7 BD6 BC33 BC14 BC13 BC6 BB30 BB29 BB6 BB5

C2 BT36 BT35 BT4 BT3 BR38

?

BA38 BA37 BA12 BA11 BA10

AY34 AY33 AY14

AY12 AW30 AW29 AW12

AV38

AV37

AU34

AU33

AU12

AU11

AU10

AT30

AT29

AR38

AR37

AR14

AR13

AP34

AP33

AP12

AP11

AP10

AN30

AN29

AN12

AM38 AM37 AM12

AL34

AL33

AL14

AL12

AL10

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(7/7) VSS

1

0.1(X00)

13 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

Layout Note: Place near JDIMM1.257,259

+2.5V_MEM

D D

10U_0603_6.3V6M

1

CD9

CD10

2

Layout Note: Place near JDIMM1

1U_0402_6.3V6K

CD3

CD4

1

2

Layout Note: Place near JDIMM1.258

+0.6VS

10U_0603_6.3V6M

1U_0402_6.3V6K

CD12

CD13

1

2

+1.2V_DDR

1U_0402_6.3V6K

CD1

CD2

1

2

C C

1U_0402_6.3V6K

CD74

CD75

1

2

1U_0402_6.3V6K

CD76

CD77

1

2

1U_0402_6.3V6K

CD78

CD79

1

2

+1.2V_DDR

10U_0603_6.3V6M

1

CD5

CD6

2

B B

DIMM_CHA_SA2 DIMM_CHA_SA1 DIMM_CHA_SA0

+V_DDR_REFA_R

20mil

RH45 2_0402_1%

A A

1

CH101

0.022U_0402_16V7K

2

12

RH211

24.9_0402_1%

10U_0603_6.3V6M

1

CD7

2

1 2

10U_0603_6.3V6M

1

CD8

CD70

2

10U_0603_6.3V6M

1

CD71

2

10U_0603_6.3V6M

1

CD72

CD73

2

+1.2V_DDR

12

RH206

1K_0402_1%

+V_DDR_REFA

12

RH209

1K_0402_1%

10U_0603_6.3V6M

CD14

@

10U_0603_6.3V6M

CD15

1

2

1

+

CD11 330U_X_2VM_R6M

2

4

DDR4_DRAMRST#

DDR_A_D[0..63][8] DDR_A_MA[0..13][8] DDR_A_DQS#[0..7][8] DDR_A_DQS[0..7][8]

Layout Note: Place near JDIMM1.255

+3VS

0.1U_0402_10V6K CD16

1

CD17

2.2U_0402_6.3V6M

2

RD31

1 2

@

0_0402_5%

Pilot_05

+1.2V_DDR

12

+3VS

+2.5V_MEM

RD35 470_0402_1%

1

@

2

3

+1.2V_DDR

JDIMM1

1

VSS1

DDR_A_D5 DDR_A_D1

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D7 DDR_A_D3 DDR_A_D13 DDR_A_D9

DDR_A_D15 DDR_A_D10 DDR_A_D21 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D23 DDR_A_D19 DDR_A_D29 DDR_A_D25

DDR_A_D30 DDR_A_D26

PCH_SMBCLK[15,18]

DDR_CKE0_DIMMA DDR_A_BG1

DDR_A_BG0

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_PAR DDR_A_BS1

DDR_CS0_DIMMA# DDR_A_WE#

M_ODT0 DDR_CS1_DIMMA#

M_ODT1

+1.2V_DDR

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA6

DDR_A_MA3 DDR_A_MA1

DDR_A_D37 DDR_A_D33 DDR_A_DQS#4

DDR_A_DQS4 DDR_A_D38 DDR_A_D34 DDR_A_D44 DDR_A_D40

DDR_A_D46 DDR_A_D42 DDR_A_D52 DDR_A_D49 DDR_A_DQS#6

DDR_A_DQS6 DDR_A_D55 DDR_A_D51 DDR_A_D61 DDR_A_D56

DDR_A_D62 DDR_A_D58

PCH_SMBCLK

DDR_CKE0_DIMMA[8]

DDR_A_BG1[8] DDR_A_BG0[8]

M_CLK_DDR0[8] M_CLK_DDR#0[8]

DDR_A_PAR[8] DDR_A_BS1[8]

DDR_CS0_DIMMA#[8]

DDR_A_WE#[8] M_ODT0[8]

DDR_CS1_DIMMA#[8]

M_ODT1[8]

H_DRAMRST# [18]DDR4_DRAMRST#[15]

.1U_0402_16V7K

CD69

3

DQ5

5

VSS3

7

DQ1

9

VSS5

11

DQS0_c

13

DQS0_t

15

VSS8

17

DQ7

19

VSS10

21

DQ3

23

VSS12

25

DQ13

27

VSS14

29

DQ9

31

VSS16

33

DM1_n/DBI_n

35

VSS17

37

DQ15

39

VSS19

41

DQ10

43

VSS21

45

DQ21

47

VSS23

49

DQ17

51

VSS25

53

DQS2_c

55

DQS2_t

57

VSS28

59

DQ23

61

VSS30

63

DQ19

65

VSS32

67

DQ29

69

VSS34

71

DQ25

73

VSS36

75

DM3_n/DBI3_n

77

VSS37

79

DQ30

81

VSS39

83

DQ26

85

VSS41

87

CB5/NC

89

VSS43

91

CB1/NC

93

VSS45

95

DQS8_c

97

DQS8_t

99

VSS48

101

CB2/NC

103

VSS50

105

CB3/NC

107

VSS52

109

CKE0

111

VDD1

113

BG1

115

BG0

117

VDD3

119

A12

121

A9

123

VDD5

125

A8

127

A6

129

VDD7

131

A3

133

A1

135

VDD9

137

CK0_t

139

CK0_c

141

VDD11

143

PARITY

145

BA1

147

VDD13

149

CS0_n

151

WE_n/A14

153

VDD15

155

ODT0

157

CS1_n

159

VDD17

161

ODT1

163

VDD19

165

C1, CS3_n ,NC

167

VSS53

169

DQ37

171

VSS55

173

DQ33

175

VSS57

177

DQS4_c

179

DQS4_t

181

VSS60

183

DQ38

185

VSS62

187

DQ34

189

VSS64

191

DQ44

193

VSS66

195

DQ40

197

VSS68

199

DM5_n/DBI5_n

201

VSS69

203

DQ46

205

VSS71

207

DQ42

209

VSS73

211

DQ52

213

VSS75

215

DQ49

217

VSS77

219

DQS6_c

221

DQS6_t

223

VSS80

225

DQ55

227

VSS82

229

DQ51

231

VSS84

233

DQ61

235

VSS86

237

DQ56

239

VSS88

241

DM7_n/DBI7_n

243

VSS89

245

DQ62

247

VSS91

249

DQ58

251

VSS93

253

SCL

255

VDDSPD

257

VPP1

259

VPP2

261

GND1

DEREN_40-42271-26001RHF CONN@

VSS2 VSS4 VSS6

DM0_n/DBI0_n

VSS7 VSS9

VSS11

DQ12

VSS13 VSS15

DQS1_c

DQS1_t

VSS18

DQ14

VSS20

DQ11

VSS22

DQ20

VSS24

DQ16

VSS26

DM2_n/DBI2_n

VSS27

DQ22

VSS29

DQ18

VSS31

DQ28

VSS33

DQ24

VSS35

DQS3_c

DQS3_t

VSS38

DQ31

VSS40

DQ27

VSS42

CB4/NC

VSS44

CB0/NC

VSS46

DM8_n/DBI_n/NC

VSS47

CB6/NC

VSS49

CB7/NC

VSS51

RESET_n

CKE1 VDD2

ACT_n

ALERT_n

VDD4

VDD6

VDD8

EVENT_n/NF

VDD10 CK1_t/NF CK1_c/NF

VDD12

A10/AP

VDD14

RAS_n/A1 6

VDD16

CAS_n/A1 5

VDD18

C0/CS2_n/NC

VREFCA

VSS54

DQ36

VSS56

DQ32

VSS58

DM4_n/DBI4_n

VSS59

DQ39

VSS61

DQ35

VSS63

DQ45

VSS65

DQ41

VSS67

DQS5_c

DQS5_t

VSS70

DQ47

VSS72

DQ43

VSS74

DQ53

VSS76

DQ48

VSS78

DM6_n/DBI6_n

VSS79

DQ54

VSS81

DQ50

VSS83

DQ60

VSS85

DQ57

VSS87

DQS7_c

DQS7_t

VSS90

DQ63

VSS92

DQ59

VSS94

GND2

2

1

+1.2V_DDR

2 4

DQ4

6 8

DQ0

10 12 14 16

DQ6

18 20

DQ2

22 24 26 28

DQ8

30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120

A11

122

A7

124 126

A5

128

A4

130 132

A2

134 136 138 140 142 144

A0

146 148 150

BA0

152 154 156 158

A13

160 162 164 166

SA2

168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 242 244 246 248 250 252 254

SDA

256

SA0

258

VTT

260

SA1

262

DDR_A_D4 DDR_A_D0

DDR_A_D6 DDR_A_D2 DDR_A_D12 DDR_A_D8 DDR_A_DQS#1

DDR_A_DQS1 DDR_A_D14 DDR_A_D11 DDR_A_D20 DDR_A_D16

DDR_A_D22 DDR_A_D18 DDR_A_D28 DDR_A_D24 DDR_A_DQS#3

DDR_A_DQS3 DDR_A_D31 DDR_A_D27

DDR4_DRAMRST# DDR_CKE1_DIMMA

DDR_A_ALERT# DDR_A_MA11

DDR_A_MA7 DDR_A_MA5

DDR_A_MA4 DDR_A_MA2

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_MA0 DDR_A_MA10

DDR_A_BS0 DDR_A_RAS#

DDR_A_CAS# DDR_A_MA13

DIMM_CHA_SA2 DDR_A_D36

DDR_A_D32

DDR_A_D39

DDR_A_D35

DDR_A_D45

DDR_A_D41

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D47

DDR_A_D43

DDR_A_D53

DDR_A_D48

DDR_A_D54

DDR_A_D50

DDR_A_D60

DDR_A_D57

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D63

DDR_A_D59

PCH_SMBDATA DIMM_CHA_SA0

DIMM_CHA_SA1

+1.2V_DDR

DDR_CKE1_DIMMA [8] DDR_A_ACT# [8]

DDR_A_ALERT# [8]

M_CLK_DDR1 [8] M_CLK_DDR#1 [8]

DDR_A_BS0 [8] DDR_A_RAS# [8]

DDR_A_CAS# [8]

+V_DDR_REFA

0.1U_0402_10V6K

1

2

PCH_SMBDATA [15,18]

All VREF traces should have 10 mil trace width

CD96

+0.6VS

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDRIII DIMMA

DDRIII DIMMA LA-D991P

LA-D991P

1

14 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

JDIMM2

JP?

1

VSS1

3

DQ5

5

VSS3

7

DQ1

9

VSS5 DQS0_c11DM0_n/DBI0_n

13

DQS0_t

15

VSS8

17

DQ7

19

VSS10

21

DQ3

23

VSS12

25

DQ13

27

VSS14

29

DQ9

31

VSS16

33

DM1_n/DBI_n

35

VSS17

37

DQ15

39

VSS19

41

DQ10

43

VSS21

45

DQ21

47

VSS23

49

DQ17

51

VSS25 DQS2_c53DM2_n/DBI2_n

55

DQS2_t

57

VSS28

59

DQ23

61

VSS30

63

DQ19

65

VSS32

67

DQ29

69

VSS34

71

DQ25

73

VSS36 DM3_n/DBI3_n75DQS3_t

77

VSS37

79

DQ30

81

VSS39

83

DQ26

85

VSS41

87

CB5/NC

89

VSS43

91

CB1/NC

93

VSS45 DQS8_c95DM8_n/DBI_n/NC

97

DQS8_t

99

VSS48

101

CB2/NC

103

VSS50

105

CB3/NC

107

VSS52

109

CKE0

111

VDD1

113

BG1

115

BG0

117

VDD3

119

A12

121

A9

123

VDD5

125

A8

127

A6

129

VDD7

131

A3

133

A1

135

VDD9

137

CK0_t

139

CK0_c

141

VDD11

143

PARITY

145

BA1

147

VDD13

149

CS0_n

151

WE_n/A14

153

VDD15

155

ODT0

157

CS1_n

159

VDD17

161

ODT1

163

VDD19

165

C1, CS3_n ,NC

167

VSS53

169

DQ37

171

VSS55

173

DQ33

175

VSS57

177

DQS4_c

179

DQS4_t

181

VSS60

183

DQ38

185

VSS62

187

DQ34

189

VSS64

191

DQ44

193

VSS66

195

DQ40

197

VSS68

199

DM5_n/DBI5_n

201

VSS69

203

DQ46

205

VSS71

207

DQ42

209

VSS73

211

DQ52

213

VSS75

215

DQ49

217

VSS77

219

DQS6_c

221

DQS6_t

223

VSS80

225

DQ55

227

VSS82

229

DQ51

231

VSS84

233

DQ61

235

VSS86

237

DQ56

239

VSS88

241

DM7_n/DBI7_n

243

VSS89

245

DQ62

247

VSS91

249

DQ58

251

VSS93

253

SCL

255

VDDSPD

257

VPP1

259

VPP2

261

GND1

BELLW_SD-80886-1021 CONN@

2011/08/25 2012/07/25

EVENT_n/NF

RAS_n/A1 6 CAS_n/A1 5

C0/CS2_n/NC

DM4_n/DBI4_n

DM6_n/DBI6_n

Compal Secret Data

VSS2

DQ4

VSS4

DQ0

VSS6 VSS7

DQ6

VSS9

DQ2

VSS11

DQ12

VSS13

DQ8

VSS15

DQS1_c

DQS1_t

VSS18

DQ14

VSS20

DQ11

VSS22

DQ20

VSS24

DQ16

VSS26 VSS27

DQ22

VSS29

DQ18

VSS31

DQ28

VSS33

DQ24

VSS35

DQS3_c

VSS38

DQ31

VSS40

DQ27

VSS42

CB4/NC

VSS44

CB0/NC

VSS46 VSS47

CB6/NC

VSS49

CB7/NC

VSS51

RESET_n

CKE1 VDD2

ACT_n

ALERT_n

VDD4

A11

A7

VDD6

A5 A4

VDD8

A2

VDD10

CK1_t/NF

CK1_c/NF

VDD12

A0

A10/AP

VDD14

BA0

VDD16

A13

VDD18

VREFCA

SA2

VSS54

DQ36

VSS56

DQ32

VSS58 VSS59

DQ39

VSS61

DQ35

VSS63

DQ45

VSS65

DQ41

VSS67

DQS5_c

DQS5_t

VSS70

DQ47

VSS72

DQ43

VSS74

DQ53

VSS76

DQ48

VSS78 VSS79

DQ54

VSS81

DQ50

VSS83

DQ60

VSS85

DQ57

VSS87

DQS7_c

DQS7_t

VSS90

DQ63

VSS92

DQ59

VSS94

SDA SA0 VTT SA1

GND2

Deciphered Date

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 242 244 246 248 250 252 254 256 258 260 262

2

+1.2V_DDR

DIMM_CHB_SA2 DDR_B_D36DDR_B_D37

DDR_B_D32DDR_B_D33

DDR_B_D39

DDR_B_D35

DDR_B_D45

DDR_B_D41

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D53

DDR_B_D48

DDR_B_D54

DDR_B_D50

DDR_B_D60

DDR_B_D57

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D63

PCH_SMBDATAPCH_SMBCLK DIMM_CHB_SA0

DIMM_CHB_SA1

DDR_B_D4 DDR_B_D0

DDR_B_D6 DDR_B_D2 DDR_B_D12 DDR_B_D8 DDR_B_DQS#1

DDR_B_DQS1 DDR_B_D14 DDR_B_D11 DDR_B_D20 DDR_B_D16

DDR_B_D22 DDR_B_D18 DDR_B_D28 DDR_B_D24

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D31 DDR_B_D27

DDR4_DRAMRST# DDR_CKE3_DIMMB

DDR_B_ALERT# DDR_B_MA11

DDR_B_MA7 DDR_B_MA5

DDR_B_MA4 DDR_B_MA2

M_CLK_DDR3 M_CLK_DDR#3

DDR_B_MA0 DDR_B_MA10

DDR_B_BS0 DDR_B_RAS#

DDR_B_CAS#

DDR_B_MA13

+1.2V_DDR

DDR4_DRAMRST# [14] DDR_CKE3_DIMMB [8]

DDR_B_ACT# [8] DDR_B_ALERT# [8]

All VREF traces should

M_CLK_DDR3 [8] M_CLK_DDR#3 [8]

DDR_B_BS0 [8] DDR_B_RAS# [8]

DDR_B_CAS# [8]

+V_DDR_REFB

0.1U_0402_10V6K CD29

1

2

+0.6VS+2.5V_MEM

Title

DDRIII DIMMB

Size Document Number Rev

LA-D991P

Date: Sheet of

have 10 mil trace width

Compal Electronics, Inc.

1

0.1(X00)

15 70Tuesday, November 08, 2016

0.1(X00)

DDR_B_D[0..63][8] DDR_B_MA[0..13][8] DDR_B_DQS#[0..7][8]

Layout Note: Place near JDIMM1.258

+0.6VS

D D

Layout Note: Place near JDIMMB

10U_0603_6.3V6M

1U_0402_6.3V6K

CD32

1

CD90

2

10U_0603_6.3V6M

1

CD89

2

Layout Note: Place near JDIMM2.257,259

+2.5V_MEM

CD88

1U_0402_6.3V6K

CD31

CD30

1

2

1

CD27

2

CD28

Layout Note: Place near JDIMM2.255

10U_0603_6.3V6M

1U_0402_6.3V6K

DDR_B_DQS[0..7][8]

+3VS

0.1U_0402_10V6K CD34

1

2

CD35

2.2U_0402_6.3V6M

2

DDR_B_D5 DDR_B_D1

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D7 DDR_B_D3 DDR_B_D13 DDR_B_D9

DDR_B_D15 DDR_B_D10 DDR_B_D21 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D23 DDR_B_D19 DDR_B_D29 DDR_B_D25

DDR_B_D30 DDR_B_D26

+1.2V_DDR

1U_0402_6.3V6K

C C

1U_0402_6.3V6K

CD19

1

2

1U_0402_6.3V6K

CD20

CD21

1

2

1U_0402_6.3V6K

CD83

CD22

1

2

+1.2V_DDR

10U_0603_6.3V6M

1

CD23

2

B B

A A

1

CD24

2

DIMM_CHB_SA1

DIMM_CHB_SA2 DIMM_CHB_SA0

+V_DDR_REFB_R

20mil

RH46 2_0402_1%

1

CH100

0.022U_0402_16V7K

2

12

RH212

24.9_0402_1%

10U_0603_6.3V6M

CD25

5

10U_0603_6.3V6M

1

CD87

CD26

2

+3VS

1 2

CD81

1

2

10U_0603_6.3V6M

1

CD85

2

+1.2V_DDR

12

1

2

1

2

RH207

1K_0402_1%

+V_DDR_REFB

RH210

1K_0402_1%

1U_0402_6.3V6K

CD80

CD82

1

2

10U_0603_6.3V6M

CD84

1

+

CD33

CD86

330U_2.5V_M

2

4

DDR_CKE2_DIMMB[8]

DDR_B_BG1[8] DDR_B_BG0[8]

M_CLK_DDR2[8] M_CLK_DDR#2[8]

DDR_B_PAR[8] DDR_B_BS1[8]

DDR_CS2_DIMMB#[8]

DDR_B_WE#[8] M_ODT2[8]

DDR_CS3_DIMMB#[8]

M_ODT3[8]

+3VS

DDR_CKE2_DIMMB DDR_B_BG1

DDR_B_BG0

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA6

DDR_B_MA3 DDR_B_MA1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_PAR DDR_B_BS1

DDR_CS2_DIMMB# DDR_B_WE#

M_ODT2 DDR_CS3_DIMMB#

M_ODT3

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D38 DDR_B_D34 DDR_B_D44 DDR_B_D40

+1.2V_DDR

DDR_B_D46 DDR_B_D47 DDR_B_D42 DDR_B_D43 DDR_B_D52 DDR_B_D49 DDR_B_DQS#6

DDR_B_DQS6 DDR_B_D55 DDR_B_D51 DDR_B_D61 DDR_B_D56

+1.2V_DDR

DDR_B_D62

PCH_SMBCLK[14,18] PCH_SMBDATA [14,18]

3

DDR_B_D58 DDR_B_D59

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

Vinaﬁx.com

5

4

3

2

1

UH2C

AV2

CL_CLK

AV3

CL_DATA

AW2

CL_RST#

R44

T91PAD~D@

GPP_G8/FAN_PWM_0

R43

GPP_G9/FAN_PWM_1

U39

GPP_G10/FAN_PWM_2

N42

GPP_G11/FAN_PWM_3

D D

SSD

HDD

SSD

C C

B B

CAM_CBL_DET#[34]

KB_BL_DET[40]

PCIE_PTX_SSDRX_P11[44] PCIE_PTX_SSDRX_N11[44]

PCIE_PRX_SSDTX_P11[44] PCIE_PRX_SSDTX_N11[44]

SATA_PTX_DRX_N1B[44] SATA_PTX_DRX_P1B[44]

SATA_PRX_DTX_N1B[44] SATA_PRX_DTX_P1B[44]

PCIE_PTX_SSDRX_P12[44] PCIE_PTX_SSDRX_N12[44]

PCIE_PRX_SSDTX_P12[44] PCIE_PRX_SSDTX_N12[44]

EDP_HPD[34]

CAM_CBL_DET#

U43 U42

T94PAD~D@

U41 M44 U36

P44 T45 T44

B33

C33

K31 L31

AB33 AB35 AA44 AA45

B38 C38 D39

E37 C36

B36 G35

E35

A35

B35 H33 G33

J45

K44 N38 N39 H44 H43

L39

L37

GPP_G0/FAN_TACH_0 GPP_G1/FAN_TACH_1 GPP_G2/FAN_TACH_2 GPP_G3/FAN_TACH_3 GPP_G4/FAN_TACH_4 GPP_G5/FAN_TACH_5 GPP_G6/FAN_TACH_6 GPP_G7/FAN_TACH_7

PCIE11_TXP PCIE11_TXN PCIE11_RXP PCIE11_RXN

GPP_F10/SCLOCK GPP_F11/SLOAD GPP_F13/SDATAOUT0 GPP_F12/SDATAOUT1

PCIE14_TXN/SATA1B_TXN PCIE14_TXP/SATA1B_TXP PCIE14_RXN/SATA1B_RXN PCIE14_RXP/SATA1B_RXP

PCIE13_TXN/SATA0B_TXN PCIE13_TXP/SATA0B_TXP PCIE13_RXN/SATA0B_RXN PCIE13_RXP/SATA0B_RXP

PCIE12_TXP PCIE12_TXN PCIE12_RXP PCIE12_RXN

PCIE20_TXP PCIE20_TXN PCIE20_RXP PCIE20_RXN PCIE19_TXP PCIE19_TXN PCIE19_RXP PCIE19_RXN

SKY-H-PCH_BGA837

@

UH2E

AW4

GPP_I0/DDPB_HPD0

AY2

GPP_I1/DDPC_HPD1

AV4

GPP_I2/DDPD_HPD2

BA4

GPP_I3/DDPE_HPD3

BD7

GPP_I4/EDP_HPD

SKY-H-PCH_BGA837

@

SKY-S-PCH_BGA837

CLINK

FAN

SKY-S-PCH_BGA837

REV = 1.3

PCIe/SATA

GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1 GPP_E2/SATAXPCIE2/SATAGP2 GPP_F0/SATAXPCIE3/SATAGP3 GPP_F1/SATAXPCIE4/SATAGP4 GPP_F2/SATAXPCIE5/SATAGP5 GPP_F3/SATAXPCIE6/SATAGP6 GPP_F4/SATAXPCIE7/SATAGP7

HOST

3 OF 12REV = 1.3

GPP_I7/DDPC_CTRLCLK

GPP_I8/DDPC_CTRLDATA

GPP_I5/DDPB_CTRLCLK

GPP_I6/DDPB_CTRLDATA

GPP_I9/DDPD_CTRLCLK

GPP_I10/DDPD_CTRLDATA

5 OF 12

PCIE9_RXN/SATA0A_RXN PCIE9_RXP/SATA0A_RXP PCIE9_TXN/SATA0A_TXN

PCIE9_TXP/SATA0A_TXP

PCIE10_RXN/SATA1A_RXN PCIE10_RXP/SATA1A_RXP PCIE10_TXN/SATA1A_TXN

PCIE10_TXP/SATA1A_TXP

PCIE15_RXN/SATA2_RXN

PCIE15_RXP/SATA2_RXP PCIE15_TXN/SATA2_TXN PCIE15_TXP/SATA2_TXP

PCIE16_RXN/SATA3_RXN

PCIE16_RXP/SATA3_RXP PCIE16_TXN/SATA3_TXN PCIE16_TXP/SATA3_TXP

PCIE17_RXN/SATA4_RXN

PCIE17_RXP/SATA4_RXP PCIE17_TXN/SATA4_TXN PCIE17_TXP/SATA4_TXP

PCIE18_RXN/SATA5_RXN

PCIE18_RXP/SATA5_RXP PCIE18_TXN/SATA5_TXN PCIE18_TXP/SATA5_TXP

GPP_E8/SATALED#

GPP_F21/EDP_BKLTCTL

GPP_F20/EDP_BKLTEN

GPP_F19/EDP_VDDEN

THERMTRIP#

PM_SYNC

PLTRST_CPU#

PM_DOWN

BB3 BD6 BA5 BC4 BE5 BE6

Y44

GPP_F14

V44

GPP_F23

W39

GPP_F22

L43

GPP_G23

L44

GPP_G22

U35

GPP_G21

R35

GPP_G20

BD36

GPP_H23

PECI

G31 H31 C31 B31

G29 E29 C32 B32

F41 E41 B39 A39

D43 E42 A41 A40

H42 H40 E45 F45

K37 G37 G45 G44

AD44 AG36

AG35 AG39 AD35 AD31 AD38 AC43 AB44

W36 W35 W42

AJ3 AL3 AJ4 AK2 AH2

PCH_SATA_LED#

T182 PAD~D @

H_THERMTRIP# PECI

DDI1_DDPB_CTRLCLK DDI1_DDPB_CTRLDAT

T2 PAD~D @

T4 PAD~D @

T8 PAD~D @

SATA_PRX_SSDTX_N0A [44] SATA_PRX_SSDTX_P0A [44]

SATA_PTX_SSDRX_N0A [44] SATA_PTX_SSDRX_P0A [44]

PCIE_PRX_SSDTX_N10 [44] PCIE_PRX_SSDTX_P10 [44]

PCIE_PTX_SSDRX_N10 [44] PCIE_PTX_SSDRX_P10 [44]

PCH_SATA_LED# [49]

mCARD_PCIE#_SATA [44]

BIA_PWM_PCH [7,34] L_BKLT_EN_EC [48] ENVDD_PCH [32]

1 2

RH191 620_0402_5%

1 2

RH138 13_0402_5% RH189

1 2

30_0402_5%

PLTRST_CPU# [9]

H_PM_DOWN [9]

PROC_DETECT# [9]

H_THERMTRIP#_R [9]

PECI_EC [9,48]

H_PM_SYNC_R [9]

SSD

mCARD_PCIE#_SATA

CAM_CBL_DET#

PCH_SATA_LED#

DDI1_DDPB_CTRLCLK DDI1_DDPB_CTRLDAT

1 2

RH68 10K_0402_5%

1 2

RH79 10K_0402_5%

1 2

RH80 10K_0402_5%

1 2

RH141 2.2K_0402_5%

1 2

RH142 2.2K_0402_5%

+3VALW

+3VS

PCH Strap PIN

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

SSD

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (1/8) SATA,HDA

PCH (1/8) SATA,HDA LA-D991P

LA-D991P

1

16 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

UH2G

AR17

+3VS

RP3

4 5

LAN_CLKREQ#

3 6

SRCCLKREQ7#

2 7

WLAN_CLK_REQ#

1 8

RP2

@ 4 5 3 6 2 7 1 8

RP22

@ 4 5 3 6 2 7 1 8

RP23

4 5 3 6 2 7 1 8

1 2

SSD_CLK_REQ#

SRCCLKREQ5# CLKREQ_PCIE#0 SRCCLKREQ4# SRCCLKREQ1#

SRCCLKREQ15# SRCCLKREQ9# SRCCLKREQ8# SRCCLKREQ10#

VGA_CLK_REQ# SRCCLKREQ13# SRCCLKREQ14# SRCCLKREQ11#

PCH_SPI_CS#

D D

C C

B B

10K_0804_8P4R_5%

+3VS

10K_0804_8P4R_5%

+3VS

10K_0804_8P4R_5%

+3VS

10K_0804_8P4R_5%

+3V_ROM

RH74 4.7K_0402_5%

+1VALW

LAN_CLKREQ#[47] WLAN_CLK_REQ#[43]

SSD_CLK_REQ#[44]

VGA_CLK_REQ#[23]

GPU - N16P-GX

PCH_CPU_BCLK_P[9]

RH71 2.7K_0402_1%

CPU_24MHZ_P[9] CPU_24MHZ_N[9]

PCH_CPU_BCLK_N[9]

1 2

CLK_PEG_N16P#[23]

CLK_PEG_N16P[23]

T92PAD~D@

XTAL24_OUT XTAL24_IN

PCH_RTCX1 PCH_RTCX2

CLKREQ_PCIE#0 SRCCLKREQ1# LAN_CLKREQ# WLAN_CLK_REQ# SRCCLKREQ4# SRCCLKREQ5# SSD_CLK_REQ# SRCCLKREQ7# SRCCLKREQ8# SRCCLKREQ9# SRCCLKREQ10# SRCCLKREQ11# VGA_CLK_REQ# SRCCLKREQ13# SRCCLKREQ14# SRCCLKREQ15#

T17PAD~D@

PCH_SPI_SI PCH_SPI_SO PCH_SPI_CS# PCH_SPI_CLK

PCH_SPI_WP# PCH_SPI_HOLD#

GPP_A16/CLKOUT_48

G1

CLKOUT_CPUNSSC_P

F1

CLKOUT_CPUNSSC

G2

CLKOUT_CPUBCLK_P

H2

CLKOUT_CPUBCLK

A5

XTAL24_OUT

A6

XTAL24_IN

E1

XCLK_BIASREF

BC9

RTCX1

BD10

RTCX2

BC24

GPP_B5/SRCCLKREQ0#

AW24

GPP_B6/SRCCLKREQ1#

AT24

GPP_B7/SRCCLKREQ2#

BD25

GPP_B8/SRCCLKREQ3#

BB24

GPP_B9/SRCCLKREQ4#

BE25

GPP_B10/SRCCLKREQ5#

AT33

GPP_H0/SRCCLKREQ6#

AR31

GPP_H1/SRCCLKREQ7#

BD32

GPP_H2/SRCCLKREQ8#

BC32

GPP_H3/SRCCLKREQ9#

BB31

GPP_H4/SRCCLKREQ10#

BC33

GPP_H5/SRCCLKREQ11#

BA33

GPP_H6/SRCCLKREQ12#

AW33

GPP_H7/SRCCLKREQ13#

BB33

GPP_H8/SRCCLKREQ14#

BD33

GPP_H9/SRCCLKREQ15#

R13

CLKOUT_PCIE_N15

R11

CLKOUT_PCIE_P15

P1

CLKOUT_PCIE_N14

R2

CLKOUT_PCIE_P14

W7

CLKOUT_PCIE_N13

Y5

CLKOUT_PCIE_P13

U2

CLKOUT_PCIE_N12

U3

CLKOUT_PCIE_P12

SKY-H-PCH_BGA837

@

BD17

GPP_A11/PME#

AG15

RSVD_AG15

AG14

RSVD_AG14

AF17

RSVD_AF17

AE17

RSVD_AE17

AR19

TP5

AN17

TP4

BB29

SPI0_MOSI

BE30

SPI0_MISO

BD31

SPI0_CS0#

BC31

SPI0_CLK

AW31

SPI0_CS1#

BC29

SPI0_IO2

BD30

SPI0_IO3

AT31

SPI0_CS2#

AN36

GPP_D1/SPI1_CLK

AL39

GPP_D0/SPI1_CS#

AN41

GPP_D3/SPI1_MOSI

AN38

GPP_D2/SPI1_MISO

AH43

GPP_D22/SPI1_IO3

AG44

GPP_D21/SPI1_IO2

@

UH2A

SKY-H-PCH_BGA837

SKY-S-PCH_BGA837

7 OF 12REV = 1.3

SKY-S-PCH_BGA837

1 OF 12 REV = 1.3

CLKOUT_ITPXDP

CLKOUT_ITPXDP_P

CLKOUT_CPUPCIBCLK

CLKOUT_CPUPCIBCLK_P

CLKOUT_PCIE_N0 CLKOUT_PCIE_P0

CLKOUT_PCIE_N1 CLKOUT_PCIE_P1

CLKOUT_PCIE_N2 CLKOUT_PCIE_P2

CLKOUT_PCIE_N3 CLKOUT_PCIE_P3

CLKOUT_PCIE_N4 CLKOUT_PCIE_P4

CLKOUT_PCIE_N5 CLKOUT_PCIE_P5

CLKOUT_PCIE_N6 CLKOUT_PCIE_P6

CLKOUT_PCIE_N7 CLKOUT_PCIE_P7

CLKOUT_PCIE_N8 CLKOUT_PCIE_P8

CLKOUT_PCIE_N9 CLKOUT_PCIE_P9

CLKOUT_PCIE_N10 CLKOUT_PCIE_P10

CLKOUT_PCIE_N11 CLKOUT_PCIE_P11

GPP_B13/PLTRST#

GPP_G16/GSXCLK

GPP_G12/GSXDOUT

GPP_G13/GSXSLOAD

GPP_G14/GSXDIN

GPP_G15/GSXSRESET#

GPP_E3/CPU_GP0 GPP_E7/CPU_GP1 GPP_B3/CPU_GP2 GPP_B4/CPU_GP3

GPP_H18/SML4ALERT#

GPP_H17/SML4DATA

GPP_H16/SML4CLK

GPP_H15/SML3ALERT#

GPP_H14/SML3DATA

GPP_H13/SML3CLK

GPP_H12/SML2ALERT#

GPP_H11/SML2DATA

GPP_H10/SML2CLK

INTRUDER#

L1 L2

J1 J2

N7 N8

L7 L5

D3 F2

E5 G4

D5 E6

D8 D7

R8 R7

U5 U7

W10 W11

N3 N2

P3 P2

R3 R4

BB27

P43 R39 R36 R42 R41

AF41 AE44 BC23 BD24

BC36 BE34 BD39 BB36 BA35 BC35 BD35 AW35 BD34

BE11

PCH_CPU_PCIBCLK_N [9] PCH_CPU_PCIBCLK_P [9]

CLK_PCIE_LAN# [47] CLK_PCIE_LAN [47]

CLK_PCIE_WLAN# [43] CLK_PCIE_WLAN [43]

CLK_PCIE_SSD# [44] CLK_PCIE_SSD [44]

PCH_PLTRST#

SIO_EXT_SMI# TOUCH_SCREEN_PD# TOUCHPAD_INTR#

DGPU_PWRGD_EC

INTRUDER#

+3V_ROM +3VALW

LAN

NGFF - WLAN

NGFF - SSD

SIO_EXT_SMI# [48]

TOUCH_SCREEN_PD# [34] DGPU_PWRGD_EC [48]

SPI ROM FOR ME ( 16MByte )

1 2

@

PCH_SPI_CS#

PCH

A A

EC

PCH_SPI_CLK PCH_SPI_SO PCH_SPI_SO_R PCH_SPI_SI PCH_SPI_WP#

EC_SPI_CLK_R[48]

EC_SPI_SI_R[48] EC_SPI_SO_R[48]

EC_SPI_CS#_R[48]

1 2

RH101 0_0402_5%@

1 2

RH104 22_0402_1%

1 2

RH507 22_0402_1%

1 2

RH508 22_0402_1%

1 2

RH509 22_0402_1%

1 2

RH510 22_0402_1%

Pilot_05 Pilot_05

1 2

RE71

15_0402_1%

1 2

RE126 15_0402_1%

1 2

RE127 15_0402_1%

1 2

RE128 15_0402_1%

1 2

RE129 15_0402_1%

PCH_SPI_HOLD#_RPCH_SPI_HOLD#

PCH_SPI_CLK_R PCH_SPI_SI_R

PCH_SPI_WP#_R

PCH_SPI_SO_R PCH_SPI_WP#_R

UH8

1

/CS

2

DO(IO1)

3

/WP(IO2) GND4DI(IO0)

W25Q128FVSIQ_SO8

/HOLD(IO3)

8

VCC

7 6

CLK

5

RH121 0_0603_5%

PCH_SPI_HOLD#_R PCH_SPI_CLK_R PCH_SPI_SI_R

PCH_PLTRST#_EC[23,43,44,47,48]

RTC CRYSTAL

RH70 10M_0402_5%

32.768KHZ 9PF 20PPM 9H03280012

Max Crystal ESR = 50k Ohm.

1

CH45

8.2P_0402_50V8D

2

RH72 1M_0402_5%

24MHZ_12PF_X3G024000DC1H

1

CH47 15P_0402_50V8J

2

DGPU_PWRGD_EC TOUCH_SCREEN_PD# TOUCHPAD_INTR#

SIO_EXT_SMI#

INTRUDER#

TOUCHPAD_INTR#

12

RH77 100K_0402_5%

1 2

YH1

1 2

1

2

1 2

YH2

123

4

1

2

1 2

RH500 10K_0402_5%

1 2

RH69 10K_0402_5%

1 2

RH179 10K_0402_5%

1 2

RH110 10K_0402_5%

1 2

RH143 330K_0402_5%

DH1

12

@

12

+3VS

MC74VHC1G08DFT2G_SC70-5

5

UH7

VCC

OUT

GND

3

PTP_INT# [41,48]

IN1 IN2

RB751S40T1G_SOD523-2

RH1 0_0402_5%

4

PCH_RTCX1

PCH_RTCX2

CH46

8.2P_0402_50V8D

XTAL24_IN

XTAL24_OUT

CH48 18P_0402_50V8J

1 2

+3VS

+3VALW

+RTCVCC

PCH_PLTRST#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (2/8) SMBUS, CLK, SPI, LPC

PCH (2/8) SMBUS, CLK, SPI, LPC LA-D991P

LA-D991P

1

17 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

+3V_PCH_DSW

PCH_PCIE_WAKE# PCH_BATLOW#

Pilot_05

LAN_WAKE# AC_PRESENT

ME_SUS_PWR_ACK SYS_RESET#

CLKRUN#

Pilot_05

+3VALW

RP15

CH52

1U_0402_6.3V6K

CH53

1U_0402_6.3V6K

1 8 2 7 3 6 4 5

HDA_SDOUT_AUDIO[37] HDA_BITCLK_AUDIO[37] HDA_SYNC_AUDIO[37]

D D

+RTCVCC

1 2

RH83 20K_0402_5%

+RTCVCC

1 2

RH84 20K_0402_5%

+3VALW

C C

+3VS

B B

1 2

RH21 1K_0402_5%

1 2

RH22 1K_0402_5%

1 2

RH23 1K_0402_5%

1 2

RH25 1K_0402_5%

1 2

RH62 499_0402_1%

1 2

RH63 499_0402_1%

1 2

RH27 1K_0402_5%

1 2

RH26 1K_0402_5%

1 2

RH86 10K_0402_5%

1 2

RH88 47K_0402_5%@

1 2

RH13 100K_0402_5%

Service Mode Switch: Add a switch to ME_FWP signal to unlock the ME region and allow the entire region of the SPI flash to be updated using FPT.

33_0804_8P4R_5%

PCH_SRTCRST#

12

PCH_RTCRST#

12

CLRP1

SHORT PADS

@

SMBCLK SMBDATA SML1_SMBCLK SML1_SMBDAT SML0_SMBCLK SML0_SMBDATA

DGPU_PWROK

PCH_RSMRST#_R

PCH_DPWROK

HDA_SDOUT HDA_BITCLK HDA_SYNC

PCH_SMBCLK PCH_SMBDATA

Pilot_05

1 2

HDA_SDIN0_AUDIO[37]

RH96 0_0402_5%@

HDA_BITCLK HDA_SDIN0

HDA_SDOUT HDA_SYNC

Close to PCH

AUD_AZA_CPU_SDO[7]

AUD_AZA_CPU_SDI_R[7]

AUD_AZA_CPU_SCLK[7]

PCH_RSMRST#[48] ACAV_IN [48,54,55]

1 2

RH146 30_0402_5%

1 2

RH147 30_0402_5%

DGPU_PWROK[23,61]

PCH_RTCRST#[49]

1 2

RH503 0_0402_5%

1 2

RH9 0_0402_5%

Pilot_05

+3VALW

QH5A

2

2N7002EDW 2N SOT-363-6

SML1_SMBCLK

SML1_SMBDAT

61

5

QH5B

2N7002EDW 2N SOT-363-6

@

AUD_AZA_CPU_SDO_R AUD_AZA_CPU_SDI_R AUD_AZA_CPU_SCLK_R

DGPU_PWROK

PCH_RTCRST# PCH_SRTCRST#

PCH_PWROK

PCH_RSMRST#_R AC_PRESENT

PCH_DPWROK SMBALERT# SMBCLK SMBDATA SML0ALERT# SML0_SMBCLK SML0_SMBDATA SML1ALERT# SML1_SMBCLK SML1_SMBDAT

GPU_THM_SMBCLK [23,42,48]

34

GPU_THM_SMBDAT [23,42,48]

BA9

HDA_BCLK

BD8

HDA_RST#

BE7

HDA_SDI0

BC8

HDA_SDI1

BB7

HDA_SDO

BD9

HDA_SYNC

BD1

RSVD_BD1

BE2

RSVD_BE2

AM1

DISPA_SDO

AN2

DISPA_SDI

AM2

DISPA_BCLK

AL42

T120PAD~D@

GPP_D8/SSP0_SCLK

AN42

GPP_D7/SSP0_RXD

AM43

GPP_D6/SSP0_TXD

AJ33

GPP_D5/SSP0_SFRM

AH44

GPP_D20/DMIC_DATA0

AJ35

GPP_D19/DMIC_CLK0

AJ38

GPP_D18/DMIC_DATA1

AJ42

GPP_D17/DMIC_CLK1

BC10

RTCRST#

BB10

SRTCRST#

AW11

PCH_PWROK

BA11

RSMRST#

AV11

DSW_PWROK

BB41

GPP_C2/SMBALERT#

AW44

GPP_C0/SMBCLK

BB43

GPP_C1/SMBDATA

BA40

GPP_C5/SML0ALERT#

AY44

GPP_C3/SML0CLK

BB39

GPP_C4/SML0DATA

AT27

GPP_B23/SML1ALERT#/PCHHOT#

AW42

GPP_C6/SML1CLK

AW45

GPP_C7/SML1DATA

@

UH2D

AUDIO

SKY-H-PCH_BGA837

+3VS

PCH to DDR

QH4A

2N7002EDW 2N SOT-363-6

SMBCLK

SMBDATA

2

6 1

3 4

2N7002EDW 2N SOT-363-6

5

QH4B

PCH_SMBCLK

PCH_SMBDATA

SKY-S-PCH_BGA837

GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#

GPP_A13/SUSWARN#/SUSPWRDNACK

SMBUS

JTAG

4 OF 12REV = 1.3

ALL_SYS_PWRGD[18,48,56]

PCH_SMBCLK [14,15]

PCH_SMBDATA [14,15]

GPP_A8/CLKRUN# GPD11/LANPHYPC GPD9/SLP_WLAN#

GPP_B2/VRALERT#

GPP_G17/ADR_COMPLETE

GPP_B12/SLP_S0#

GPD10/SLP_S5#

GPD0/BATLOW#

GPP_A15/SUSACK#

GPD2/LAN_WAKE# GPD1/ACPRESENT

GPD3/PWRBTN#

BB17 AW22

AR15 AV13 BC14

DRAM_RESET#

BD23 AL27

GPP_B1

AR27

GPP_B0

N44 AN24

GPP_B11

AY1

SYS_PWROK

BC13

WAKE#

BC15

GPD6/SLP_A#

AV15

SLP_LAN#

BC26 AW15

GPD4/SLP_S3#

BD15

GPD5/SLP_S4#

BA13 AN15

GPD8/SUSCLK

BD13 BB19 BD19

BD11 BB15 BB13

SLP_SUS#

AT13 AW1

SYS_RESET#

BD26

GPP_B14/SPKR

AM3

PROCPWRGD

AT2

ITP_PMODE

AR3

JTAGX

AR2

JTAG_TMS

AP1

JTAG_TDO

AP2

JTAG_TDI

AN3

JTAG_TCK

IMVP_VR_PG[63]

1 2

@

RH106 0_0402_5%

Pilot_05

CLKRUN#

SIO_SLP_WLAN#

SYS_PWROK PCH_PCIE_WAKE#

PCH_BATLOW# ME_SUS_PWR_ACK

SYS_RESET# SPKR

PCH_JTAGX PCH_JTAG_TMS PCH_JTAG_TDO PCH_JTAG_TDI PCH_JTAG_TCK

RH114 0_0402_5%@

RH11 0_0402_5%@

DV1 RB751S40T1G_SOD523-2

RH38 0_0402_5%@

@

1 2

RH102 0_0402_5%

+3VS

5

1

VCC

IN1

2

IN2

GND

MC74VHC1G08DFT2G_SC70-5

3

CLKRUN# [48]

T4934 PAD~D @

H_DRAMRST# [14]

LAN_DISABLE#_R [47]

3.3V_CAM_EN# [34,53]

SYS_PWROK [48]

1 2

SIO_SLP_A# [49] SIO_SLP_S0# [49]

SIO_SLP_S3# [32,33,34,39,48,49,57] SIO_SLP_S4# [32,33,48,49,69] SIO_SLP_S5# [49]

ME_SUS_PWR_ACK [48]

1 2

SIO_PWRBTN# [48]

H_CPUPWRGD [9]

1 2

UH14

OUT

T20 PAD~D @

SUSCLK [43,44,48]

12

SYS_RESET# [49]

SPKR [37]

PCH_JTAG_TMS [6] PCH_JTAG_TDO [6] PCH_JTAG_TDI [6] PCH_JTAG_TCK [6]

4

PCH_PWROK

12

PCIE_WAKE# [43,47,48]

EC_WAKE# [48]

CPU_XDP_TCK [6,9]

RH94 10K_0402_5%

1 2

RH17 1K_0402_5%

1 2

RH81 8.2K_0402_5%

1 2

RH181 10K_0402_5%

1 2

RH125 8.2K_0402_5%

1 2

RH67 1M_0402_5%@

1 2

RH193 8.2K_0402_5%

1 2

RH85 8.2K_0402_5%

1 2

RH82 4.7K_0402_5%@

Top Swap Override (internal PD)

HIGH LOW(DEFAULT)

1 2

RH66 4.7K_0402_5%

TLS CONFIDENTIALITY

HIGH LOW(DEFAULT)

1 2

RH64 4.7K_0402_5%@

EC interface

HIGH LOW(DEFAULT)

RH65 150K_0402_5%

PCHHOT#

HIGH LOW(DEFAULT)

1 2

ENABLE DISABLE

vPRO non-vPRO

ESPI LPC

Enable Disable

+3VALW

+3VS

SPKRLAN_WAKE#

SMBALERT#

SML0ALERT#

SML1ALERT#

Buffer with Open Drain Output For VTT power control

HDA_SDOUT

ME_FWP_EC[48]

ME_FWP PCH has internal 20K PD.

FLASH DESCRIPTOR SECURITY OVERRIDE

A A

Disable ME Protect (ME can be updated) ----> Pin1 & Pin2 short Enable ME Protect (ME cannot be updated)-->Pin3 & Pin2 short(Default position)

12

RH181K_0402_5%

12

RH470_0402_5% @

Pilot_05

ME_EN

VR_ON[33,63]

0.1U_0402_16V7K

1

NC

2

A

3

GND

74AUP1G07GW_TSSOP5

12

UC16

VCC

CC298

Y

+3VALW

5

4

H_VCCST_PWRGD

H_VCCST_PWRGD [9]

+VCCIO_PG[59]

RH103

1 2

@

0_0402_5%

+3VS

12

RH180 100K_0402_5%

RH499 0_0402_5%@

RH105

1 2

@

0_0402_5%

1 2

ALL_SYS_PWRGD [18,48,56]

Reserve for EMI

1 2

CH50 10P_0402_25V8J

EMC@

1 2

CH51 10P_0402_25V8J@

Reserve for RF please close to UH1

IMVP_VR_ON [33,48]

HDA_BITCLK

HDA_SDOUT

Pilot_05

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (3/8) DMI,FDI,PM,GFX,DP

PCH (3/8) DMI,FDI,PM,GFX,DP LA-D991P

LA-D991P

1

18 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

UH2B

PCIE_RCOMPN PCIE_RCOMPP

L27

DMI_RXN0

N27

DMI_RXP0

C27

DMI_TXN0

B27

DMI_TXP0

E24

DMI_RXN1

G24

DMI_RXP1

B28

DMI_TXN1

A28

DMI_TXP1

G27

DMI_RXN2

E26

DMI_RXP2

B29

DMI_TXN2

C29

DMI_TXP2

L29

DMI_RXN3

K29

DMI_RXP3

B30

DMI_TXN3

A30

DMI_TXP3

B18

PCIE_RCOMPN

C17

PCIE_RCOMPP

H15

PCIE1_RXN/USB3_7_RXN

G15

PCIE1_RXP/USB3_7_RXP

A16

PCIE1_TXN/USB3_7_TXN

B16

PCIE1_TXP/USB3_7_TXP

B19

PCIE2_TXN/USB3_8_TXN

C19

PCIE2_TXP/USB3_8_TXP

E17

PCIE2_RXN/USB3_8_RXN

G17

PCIE2_RXP/USB3_8_RXP

L17

PCIE3_RXN/USB3_9_RXN

K17

PCIE3_RXP/USB3_9_RXP

B20

PCIE3_TXN/USB3_9_TXN

C20

PCIE3_TXP/USB3_9_TXP

E20

PCIE4_RXN/USB3_10_RXN

G19

PCIE4_RXP/USB3_10_RXP

B21

PCIE4_TXN/USB3_10_TXN

A21

PCIE4_TXP/USB3_10_TXP

K19

PCIE5_RXN

L19

PCIE5_RXP

D22

PCIE5_TXN

C22

PCIE5_TXP

G22

PCIE6_RXN

E22

PCIE6_RXP

B22

PCIE6_TXN

A23

PCIE6_TXP

L22

PCIE7_RXN

K22

PCIE7_RXP

C23

PCIE7_TXN

B23

PCIE7_TXP

K24

PCIE8_RXN

L24

PCIE8_RXP

C24

PCIE8_TXN

B24

PCIE8_TXP

SKY-H-PCH_BGA837

@

DMI_CTX_PRX_N0[7] DMI_CTX_PRX_P0[7]

D D

C C

LAN

NGFF

DMI_CRX_PTX_N0[7] DMI_CRX_PTX_P0[7]

DMI_CTX_PRX_N1[7]

DMI_CTX_PRX_P1[7] DMI_CRX_PTX_N1[7] DMI_CRX_PTX_P1[7]

DMI_CTX_PRX_N2[7]

DMI_CTX_PRX_P2[7] DMI_CRX_PTX_N2[7] DMI_CRX_PTX_P2[7]

DMI_CTX_PRX_N3[7]

DMI_CTX_PRX_P3[7] DMI_CRX_PTX_N3[7] DMI_CRX_PTX_P3[7]

1 2

RH108 100_0402_1%

PCIE_PRX_LANTX_N5[47]

PCIE_PRX_LANTX_P5[47] PCIE_PTX_LANRX_N5[47] PCIE_PTX_LANRX_P5[47]

PCIE_PRX_WLANTX_N6[43]

PCIE_PRX_WLANTX_P6[43] PCIE_PTX_WLANRX_N6[43] PCIE_PTX_WLANRX_P6[43]

SKY-S-PCH_BGA837

DMI

PCIe/USB 3

2 OF 12REV = 1.3

USB 2.0

GPP_E9/USB2_OC0# GPP_E10/USB2_OC1# GPP_E11/USB2_OC2# GPP_E12/USB2_OC3#

GPP_F15/USB2_OCB_4 GPP_F16/USB2_OCB_5 GPP_F17/USB2_OCB_6 GPP_F18/USB2_OCB_7

USB2_COMP

USB2_VBUSSENSE

USB2N_1

USB2P_1

USB2N_2

USB2P_2

USB2N_3

USB2P_3

USB2N_4

USB2P_4

USB2N_5

USB2P_5

USB2N_6

USB2P_6

USB2N_7

USB2P_7

USB2N_8

USB2P_8

USB2N_9

USB2P_9 USB2N_10 USB2P_10 USB2N_11 USB2P_11 USB2N_12 USB2P_12 USB2N_13 USB2P_13 USB2N_14 USB2P_14

RSVD_AB13

USB2_ID

GPD7/RSVD

AF5 AG7 AD5 AD7 AG8 AG10 AE1 AE2 AC2 AC3 AF2 AF3 AB3 AB2 AL8 AL7 AA1 AA2 AJ8 AJ7 W2 W3 AD3 AD2 V2 V1 AJ11 AJ13

AD43 AD42 AD39 AC44 Y43 Y41 W44 W43

AG3 AD10 AB13 AG2

BD14

USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7#

USB2_COMP USB2_VBUSSENSE

USB2_ID

USB20_N1 [46] USB20_P1 [46] USB20_N2 [45] USB20_P2 [45] USB20_N3 [49] USB20_P3 [49] USB20_N4 [43] USB20_P4 [43]

USB20_N7 [49] USB20_P7 [49]

USB20_N9 [34] USB20_P9 [34]

USB20_N12 [34] USB20_P12 [34]

USB_OC0# [46] USB_OC1# [45] USB_OC2# [49]

1 2

RH109 113_0402_1%

1 2

RH112 1K_0402_5%

1 2

RH113 1K_0402_5%

USB Conn 1 USB Conn 2 USB Conn 3 (IO Board) Mini Card(WLAN)

Card Reader

Touch Screen

Camera

USB_OC3#

RH134 10K_0402_5%

USB_OC2#

RH135 10K_0402_5%

USB_OC1#

RH132 10K_0402_5%

USB_OC0#

RH131 10K_0402_5%

USB_OC5# USB_OC4# USB_OC6# USB_OC7#

1 2 1 2 1 2 1 2

RP8

4 5 3 6 2 7 1 8

10K_0804_8P4R_5%

+3VALW

UH2F

4

C11

USB3_1_TXN

B11

USB3_1_TXP

B7

USB3_1_RXN

A7

USB3_1_RXP

B12

USB3_2_TXN/SSIC_1_TXN

A12

USB3_2_TXP/SSIC_1_TXP

C8

USB3_2_RXN/SSIC_1_RXN

B8

USB3_2_RXP/SSIC_1_RXP

B15

USB3_6_TXN

C15

USB3_6_TXP

K15

USB3_6_RXN

K13

USB3_6_RXP

B14

USB3_5_TXN

C14

USB3_5_TXP

G13

USB3_5_RXN

H13

USB3_5_RXP

D13

USB3_3_TXP/SSIC_2_TXP

C13

USB3_3_TXN/SSIC_2_TXN

A9

USB3_3_RXP/SSIC_2_RXP

B10

USB3_3_RXN/SSIC_2_RXN

B13

USB3_4_TXP

A14

USB3_4_TXN

G11

USB3_4_RXP

E11

USB3_4_RXN

SKY-H-PCH_BGA837

@

USB3TN1[46]

B B

USB Conn 1

USB Conn 2

USB Conn 3 ( IO Board)

A A

5

USB3TP1[46] USB3RN1[46] USB3RP1[46]

USB3TN2[46] USB3TP2[46] USB3RN2[46] USB3RP2[46]

USB3TP3[49] USB3TN3[49] USB3RP3[49] USB3RN3[49]

SKY-S-PCH_BGA837

LPC/eSPI

USB

GPP_A1/LAD0/ESPI_IO0 GPP_A2/LAD1/ESPI_IO1 GPP_A3/LAD2/ESPI_IO2 GPP_A4/LAD3/ESPI_IO3

GPP_A5/LFRAME#/ESPI_CS#

GPP_A6/SERIRQ

GPP_A7/PIRQA#/ESPI_ALERT0#

GPP_A0/RCIN#/ESPI_ALERT1#

GPP_A14/SUS_STAT#/ESPI_RESET#

GPP_A9/CLKOUT_LPC0/ESPI_CLK

GPP_A10/CLKOUT_LPC1

GPP_E6/DEVSLP2 GPP_E5/DEVSLP1 GPP_E4/DEVSLP0

6 OF 12REV = 1.3

GPP_F9/DEVSLP7 GPP_F8/DEVSLP6 GPP_F7/DEVSLP5 GPP_F6/DEVSLP4 GPP_F5/DEVSLP3

SATA

GPP_G19/SMI#

GPP_G18/NMI#

AT22 AV22 AT19 BD16

BE16 BA17

IRQ_SERIRQ

AW17

PIRQA#

AT17

SIO_RCIN#

BC18

T1

BC17

CLKOUT_LPC0

AV19

CLKOUT_LPC1

M45 N43

AE45 AG43 AG42 AB39 AB36 AB43 AB42 AB41

Security Classification

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

LPC_LAD0 [43,48] LPC_LAD1 [43,48] LPC_LAD2 [43,48] LPC_LAD3 [43,48]

LPC_LFRAME# [43,48] IRQ_SERIRQ [48]

SIO_RCIN# [48]

PAD~D

RH168 22_0402_5% RH16 22_0402_5%

Issued Date

@

1 2 1 2

HDD_DEVSLP [44] mSATA_DEVSLP [44]

2011/08/25 2012/07/25

CLK_PCI_LPC_MEC [48] CLK_PCI_LPDEBUG [43,48]

Compal Secret Data

Deciphered Date

2

Reserve for RF

CLK_PCI_LPC_MEC

CLK_PCI_LPDEBUG

IRQ_SERIRQ SIO_RCIN# PIRQA#

1 2

RH111 10K_0402_5%

1 2

RH87 10K_0402_5%

1 2

RH90 10K_0402_5%

12

EMC@12P_0402_50V8J

CC4

12

EMC@12P_0402_50V8J

CC5

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (4/8) PCI, USB

PCH (4/8) PCI, USB LA-D991P

LA-D991P

+3VS

19 70Tuesday, November 08, 2016

1

19 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

+3VS

1 2

RH14 5.1K_0402_1%@

1 2

RH15 5.1K_0402_1%@

1 2

RH10 10K_0402_5%

1 2

RH159 49.9K_0402_1%

1 2

RH160 49.9K_0402_1%

1 2

RH119 2.2K_0402_5%

1 2

RH120 2.2K_0402_5%

+3VALW

1 2

RH91 10K_0402_5%

D D

C C

I2C0_SCK I2C0_SDA SIO_EXT_SCI# UART2_TXD UART2_RXD I2C1_SCK_TP I2C1_SDA_TP

SIO_EXT_WAKE#

GPU_GC6_FB_EN[23]

G

2

13

D

S

QV10 BSS138W 1N SOT-323-3

+3VS+1.8V_GFX_AON

12

I2C1_SCK_TP[41]

I2C1_SDA_TP[41]

RH517 100K_0402_5%

4

UH2K

BBS_BIT0

SIO_EXT_SCI#[48]

WLAN_WIGIG60GHZ_DIS#[43]

GPU_EVENT#[23]

BT_RADIO_DIS#[43]

HDMI_HPD_PCH[36]

SIO_EXT_WAKE#[48]

UART2_TXD[49] UART2_RXD[49]

SIO_EXT_SCI#

NRB_BIT

SIO_EXT_WAKE# UART2_TXD UART2_RXD

I2C1_SCK_TP I2C1_SDA_TP I2C0_SCK I2C0_SDA

AT29

GPP_B22/GSPI1_MOSI

AR29

GPP_B21/GSPI1_MISO

AV29

GPP_B20/GSPI1_CLK

BC27

GPP_B19/GSPI1_CS#

BD28

GPP_B18/GSPI0_MOSI

BD27

GPP_B17/GSPI0_MISO

AW27

GPP_B16/GSPI0_CLK

AR24

GPP_B15/GSPI0_CS#

AV44

GPP_C9/UART0_TXD

BA41

GPP_C8/UART0_RXD

AU44

GPP_C11/UART0_CTS#

AV43

GPP_C10/UART0_RTS#

AU41

GPP_C15/UART1_CTS#/ISH_UART1_CTS#

AT44

GPP_C14/UART1_RTS#/ISH_UART1_RTS#

AT43

GPP_C13/UART1_TXD/ISH_UART1_TXD

AU43

GPP_C12/UART1_RXD/ISH_UART1_RXD

AN43

GPP_C23/UART2_CTS#

AN44

GPP_C22/UART2_RTS#

AR39

GPP_C21/UART2_TXD

AR45

GPP_C20/UART2_RXD

AR41

GPP_C19/I2C1_SCL

AR44

GPP_C18/I2C1_SDA

AR38

GPP_C17/I2C0_SCL

AT42

GPP_C16/I2C0_SDA

AM44

GPP_D4/ISH_I2C2_SDA

AJ44

GPP_D23/ISH_I2C2_SCL

SKY-H-PCH_BGA837

@

3

SKY-S-PCH_BGA837

11 OF 12REV = 1.3

GPP_D9 GPP_D10 GPP_D11

GPP_D16/ISH_UART0_CTS# GPP_D15/ISH_UART0_RTS#

GPP_D12

GPP_D14/ISH_UART0_TXD

GPP_D13/ISH_UART0_RXD

GPP_H20/ISH_I2C0_SCL

GPP_H19/ISH_I2C0_SDA

GPP_H22/ISH_I2C1_SCL

GPP_H21/ISH_I2C1_SDA

GPP_A23/ISH_GP5 GPP_A22/ISH_GP4 GPP_A21/ISH_GP3 GPP_A20/ISH_GP2 GPP_A19/ISH_GP1 GPP_A18/ISH_GP0 GPP_A17/ISH_GP7

AL44 AL36 AL35 AJ39

AJ43 AL43 AK44 AK45

BC38 BB38

BD38 BE39

BC22 BD18 BE21 BD22 BD21 BB22 BC19

Board_ID_14_15

KB_DET# CLKDET#

2

IR_CAM_DET# [34] DGPU_HOLD_RST# [23]

DGPU_PWR_EN [31,62]

KB_DET# [40]

DGPU_PWR_EN

KB_DET# CLKDET#

+3VALW

1

+3VS

14G0@

Board_ID_14_15

15G1@

SYSTEM ID

HIGH LOW

1 2

RH129 10K_0402_5%@

1 2

RH127 10K_0402_5%

1 2

RH128 10K_0402_5%

1 2

RH126 10K_0402_5%@

1 2

RH130 4.7K_0402_5%@

Boot BIOS Strap Bit (internal PD)

HIGH LOW(DEFAULT)

LPC SPI

12

RH494 10K_0402_5%

12

RH495 10K_0402_5%

14'' & N16P_GT 15'' & N16P_GX

BBS_BIT0

+3VS

+3VALW

1 2

RH92 4.7K_0402_5%@

NO REBOOT mode (internal PD)

HIGH LOW(DEFAULT)

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (5/8) GPIO, CPU, MISC

PCH (5/8) GPIO, CPU, MISC LA-D991P

LA-D991P

1

ENABLE DISABLE

20 70Tuesday, November 08, 2016

NRB_BIT

0.1(X00)

Vinaﬁx.com

@

PJP1302

1 2

PAD-OPEN 43x39

5

+1V_PCH+1VALW

4

3

2

1

+1V_PCH_AZPLL

Close to AN19

0.1U_0402_10V6K

CH203

1

2

SKY-S-PCH_BGA837

CORE

MPHY

USB

REV = 1.3

@

0.1U_0402_10V7K

1

2

VCCGPIO

8 OF 12

CH190

VCCPRIM_1P0_AL22 VCCDSW_3P3_BA24

VCCPGPPA

VCCPGPPBH_BC42 VCCPGPPBH_BD40

VCCPGPPEF_AJ41 VCCPGPPEF_AL41

VCCPGPPG

VCCPRIM_3P3_AN5

VCCPRIM_1P0_AD15

VCCATS

VCCRTCPRIM_3P3

VCCRTC DCPRTC

VCCPRIM_1P0_AJ20 VCCPRIM_1P0_AJ21 VCCPRIM_1P0_AJ23 VCCPRIM_1P0_AJ25

VCCSPI_BE41 VCCSPI_BE43 VCCSPI_BE42

VCCPGPPCD_BC44

VCCPGPPCD_BA45

VCCPGPPCD_BC45

VCCPGPPCD_BB45 VCCPRIM_3P3_BD3

VCCPRIM_3P3_BE3 VCCPRIM_3P3_BE4

+1V_VCCDSW

Close to BA29

1U_0402_6.3V6K

CH176

1

2

+3V_PCH_DSW

@

AL22 BA24

BA31 BC42

BD40 AJ41 AL41 AD41 AN5

AD15 AD13 BA20 BA22 BA26

AJ20 AJ21 AJ23 AJ25

BE41 BE43 BE42

BC44 BA45 BC45 BB45

BD3 BE3 BE4

Close to W15

1U_0402_6.3V6K

CH82

1

2

0.0908A

+1V_PCH +3V_PCH_DSW

+3VALW

+1V_PCH +3VS +3VALW

+3V_PCH_SPI

+3VALW

+3V_PCH_AZIO

Close to BA15

0.1U_0402_10V6K

CH200

1

2

+3VALW+3VALW +3VALW+3VALW

Close to AN5Close to AD41 Close to AJ41,AL41Close to BC42,BD40

1

@

2

+RTCVCC +DCPRTC

+1V_PCH_PRIM

0.1U_0402_10V7K CH189

0.403A

0.92089A

0.0061A

0.0066A

0.0002A

1 2

RH493 0_0603_5%@

0.0395A

0.0811A

@

+DCPRTC

0.1U_0402_10V6K

CH70

1

2

Pilot_05

1

2

0.1U_0402_10V7K CH192

Close to BA26

2.75835A

+3VALW

0.0121A

+3VS

Close to AD13

1U_0402_6.3V6K

CH188

1

2

0.1U_0402_10V7K

1

CH191

@

2

@

2

@

+1V_MPHY

+3V_PCH_DSW+3VALW

+1V_MPHY_MPHYPLL

+1V_PCH_USBPLL

Pilot_05

+1V_PCH_AZPLL

+3V_PCH_AZIO+3VALW

+1V_PCH_CLK5+1VALW

Pilot_05

22U_0603_6.3V6M

1

CH181

@

2

Pilot_05

+1V_VCCDSW+1V_PCH_PRIM

22U_0603_6.3V6M

1

CH182

2

+1V_MPHY

Close to AJ5,AL5

1U_0402_6.3V6K

CH180

1

2

10U_0402_6.3V6M

1

2

1U_0402_6.3V6K

CH184

CH185

CH183

1

2

22U_0603_6.3V6M

1

CH202

CH201

@

2

PJP70

@

112

D D

+1VALW

C C

+1VALW

+1V_PCH_CLK5

JUMP_43X39

1 2

@

RH137 0_0603_5%

1 2

@

RH196 0_0402_5%

1 2

@

RH124 0_0603_5%

1 2

@

RH123 0_0603_5%

1 2

LH2 BLM15PX221SN1D_2P

1 2

LH1 BLM15PX221SN1D_2P

1 2

@

RH122 0_0603_5%

+1V_MPHY_MPHYPLL +1V_PCH_USBPLL

Close to K2,K3 Close to A43,B43 Close to U21,U23

B B

22U_0603_6.3V6M

1

2

1U_0402_6.3V6K

22U_0603_6.3V6M

CH179

1

CH177

CH178

@

2

2.75835A

+1VALW

0.0248A

1 2

PAD-OPEN 43x39

0.0454A

0.0348A

0.0046A

3.53A

+1V_MPHY_MPHYPLL

0.095A

0.533A

+1V_PCH_USBPLL

0.075A

PJP1303

+1V_VCCDSW

+1V_PCH

+1V_PCH_CLK5

+1V_MPHY

+1V_PCH

+1V_PCH_AZPLL

+3V_PCH_AZIO +3V_PCH_DSW

+1V_PCH_PRIM

UH2H

AA23

VCCPRIM_1P0_AA23

AA26

VCCPRIM_1P0_AA26

AA28

VCCPRIM_1P0_AA28

AC23

VCCPRIM_1P0_AC23

AC26

VCCPRIM_1P0_AC26

AC28

VCCPRIM_1P0_AC28

AE23

VCCPRIM_1P0_AE23

AE26

VCCPRIM_1P0_AE26

Y23

VCCPRIM_1P0_Y23

Y25

VCCPRIM_1P0_Y25

BA29

DCPDSW_1P0

N17

VCCCLK1

R19

VCCCLK3

U20

VCCCLK4

V17

VCCCLK2

R17

VCCCLK6

K2

VCCCLK5_K2

K3

VCCCLK5_K3

U21

VCCMPHY_1P0_U21

U23

VCCMPHY_1P0_U23

U25

VCCMPHY_1P0_U25

U26

VCCMPHY_1P0_U26

V26

VCCMPHY_1P0_V26

A43

VCCMPHYPLL_1P0_A43

B43

VCCMPHYPLL_1P0_B43

C44

VCCPCIE3PLL_1P0_C44

C45

VCCPCIE3PLL_1P0_C45

V28

VCCAPLLEBB_1P0

AC17

VCCPRIM_1P0_AC17

AJ5

VCCUSB2PLL_1P0_AJ5

AL5

VCCUSB2PLL_1P0_AL5

AN19

VCCHDAPLL_1P0

BA15

VCCHDA

W15

VCCDSW_3P3_W15

SKY-H-PCH_BGA837

@

+RTCVCC

+3VALW

Close to BA22 Close to BA20

1U_0402_6.3V6K

0.1U_0402_10V6K

1U_0402_6.3V6K

CH173

CH80

1

2

A A

5

0.1U_0402_10V6K

CH187

CH186

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (6/8) PWR

PCH (6/8) PWR LA-D991P

LA-D991P

1

21 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

UH2I

SKY-S-PCH_BGA837

AC18

VSS

AN4

VSS

AN10

VSS

BE14

VSS

BE18

VSS

BE23

D D

C C

B B

BE28 BE32 BE37 BE40

AA17 AA18 AA20 AA21 AA25 AA29

AA42 AB10

BE9 C10

C28 C37

K10 K27 K33 K36

K42 K43

M35 M42 N10 N15 N19 N22 N24 N35 N36

N41 P17

P19 P22 P45 R10 R14 R22 R29 R33 R38

A18 A25 A32 A37

AA4

C2

J7

K4

L12 L13 L15

L4

L41

L8

N4 N5

R5 T1 T2

T4 Y18 Y20 Y21 Y26 Y28 Y29

@

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

SKY-H-PCH_BGA837

AR5

VSS

AR7

VSS

U15

VSS

AL4

VSS

AE29

VSS

AE4

VSS

AE42

VSS

AF18

VSS

AF20

VSS

AF21

VSS

AF23

VSS

AF25

VSS

AF26

VSS

AF28

VSS

AF29

VSS

AG11

VSS

AG13

VSS

AG31

VSS

AG32

VSS

AG33

VSS

AG38

VSS

AG4

VSS

AH1

VSS

AH17

VSS

AH18

VSS

AH20

VSS

AH21

VSS

AH23

VSS

AH25

VSS

AH26

VSS

AH28

VSS

AH29

VSS

AH45

VSS

AJ10

VSS

AJ14

VSS

AJ15

VSS

AJ17

VSS

AJ18

VSS

AJ26

VSS

AJ28

VSS

AJ29

VSS

AJ31

VSS

AJ32

VSS

AJ36

VSS

AK4

VSS

AK42

VSS

AU7

VSS

AV17

VSS

AV24

VSS

AV27

VSS

AV31

VSS

AV33

VSS

AV6

VSS

AW13

VSS

AW19

VSS

AW29

VSS

AW37

VSS

AW9

VSS

AY38

VSS

AY45

VSS

B25

VSS

B3

VSS

B37

VSS

B40

VSS

B6

VSS

BA1

VSS

BB11

VSS

BB16

VSS

BB21

VSS

BB25

VSS

BB30

VSS

BB34

VSS

BC2

VSS

BD43

VSS

9 OF 12REV = 1.3

W14 W31 W32 W33 W38

4

C42

VSS

D10

VSS

D12

VSS

D15

VSS

D16

VSS

D17

VSS

D19

VSS

D21

VSS

D24

VSS

D25

VSS

D27

VSS

D29

VSS

D30

VSS

D31

VSS

D33

VSS

D35

VSS

D36

VSS

E13

VSS

E15

VSS

E31

VSS

E33

VSS

F44

VSS

F8

VSS

G42

VSS

G9

VSS

H17

VSS

H19

VSS

H22

VSS

H24

VSS

H27

VSS

H29

VSS

H3

VSS

H35

VSS

J10

VSS

J11

VSS

J3

VSS

J39

VSS

J5

VSS

T42

VSS

U10

VSS

U11

VSS

U14

VSS

U17

VSS

U18

VSS

U28

VSS

U29

VSS

U31

VSS

U32

VSS

U33

VSS

U38

VSS

U4

VSS

U8

VSS

V18

VSS

V20

VSS

V21

VSS

V23

VSS

V25

VSS

V29

VSS

V3

VSS

V45

VSS VSS VSS VSS VSS VSS

W4

VSS

W8

VSS

Y17

VSS

@

SKY-S-PCH_BGA837

UH2L

SKY-H-PCH_BGA837

12 OF 12 REV = 1.3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AB11 AB7 AB14 AB31 AB32 AB38 AB4 AB5 AC1 AC20 AC21 AC25 AC29 AC45 AB8 AD11 AD14 AB15 AD32 AD33 AD36 AD4 AD8 AE18 AE20 AE21 AE25 AE28 AL10 AL11 AL13 AL17 AL19 AL24 AL29 AL32 AL33 AL38 AM15 AM17 AM19 AM22 AM24 AM27 AM29 AM45 AN11 AN22 AN27 AN31 AN39 AN7 AN8 AP11 AP4 AR33 AR34 AR42 AR9 AT10 AT15 AT36 AT9 AU1 AU35 AU36 AU39 AU45 C4

3

SKY-S-PCH_BGA837

BD45 BD44 BE44

BD2

D45

BB1 BC1

A42 B45 B44

A4 A3 B2 A2 B1

A44

C1 D1

@

UH2J

VSS_BD2 VSS_BD45 VSS_BD44 VSS_BE44 VSS_D45 VSS_A42 VSS_B45 VSS_B44 VSS_A4 VSS_A3 VSS_B2 VSS_A2 VSS_B1 VSS_BB1 VSS_BC1 VSS_A44

RSVD_C1 RSVD_D1

SKY-H-PCH_BGA837

RSVD_AR22

RSVD_W13

RSVD_U13 RSVD_P31

RSVD_N31 RSVD_P27

RSVD_R27 RSVD_N29 RSVD_P29

RSVD_AN29

RSVD_R24 RSVD_P24

PREQ#

PRDY#

CPU_TRST#

PCH_TRIGOUT

PCH_TRIGIN

10 OF 12REV = 1.3

2

AR22 W13 U13

P31 N31

P27 R27 N29 P29 AN29 R24 P24

AT3 AT4 AY5 AL2 AK1

XDP_PREQ# [9] XDP_PRDY# [9] CPU_XDP_TRST# [6,9] PCH_TRIGGER [9] CPU_TRIGGER [9]

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (8/8) VSS

PCH (8/8) VSS LA-D991P

LA-D991P

1

0.1(X00)

22 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

12

UV14

UV18

@

TC7SZ08FU_SSOP5

PEG_HTX_C_GRX_P[0..15] PEG_HTX_C_GRX_N[0..15] PEG_GTX_C_HRX_P[0..15] PEG_GTX_C_HRX_N[0..15]

+3VALW

1

2

5

1

B

4

VCC

Y

2

A

G

3

+1.8V_GFX_AON

5

1

P

B

4

O

2

A

G

3

PEG_GTX_HRX_P0 PEG_GTX_HRX_N0

PEG_GTX_HRX_P1 PEG_GTX_HRX_N1

PEG_GTX_HRX_P2 PEG_GTX_HRX_N2

PEG_GTX_HRX_P3 PEG_GTX_HRX_N3

PEG_GTX_HRX_P4 PEG_GTX_HRX_N4

PEG_GTX_HRX_P5 PEG_GTX_HRX_N5

PEG_GTX_HRX_P6 PEG_GTX_HRX_N6

PEG_GTX_HRX_P7 PEG_GTX_HRX_N7

PEG_GTX_HRX_P8 PEG_GTX_HRX_N8

PEG_GTX_HRX_P9 PEG_GTX_HRX_N9

PEG_GTX_HRX_P10 PEG_GTX_HRX_N10

PEG_GTX_HRX_P11 PEG_GTX_HRX_N11

PEG_GTX_HRX_P12 PEG_GTX_HRX_N12

PEG_GTX_HRX_P13 PEG_GTX_HRX_N13

PEG_GTX_HRX_P14 PEG_GTX_HRX_N14

PEG_GTX_HRX_P15 PEG_GTX_HRX_N15

CV212

0.1U_0402_10V7K

@

RV587

1 2

0_0402_5%

12

RV208

@

0_0402_5%

@

100K_0402_5%

12

RV573

SYS_PEX_RST_MON#

Pilot_05

+1.8V_GFX_AON

12

@

10K_0402_5%

RV39

DGPU_PEX_RST#

PEG_HTX_C_GRX_P[0..15][7] PEG_HTX_C_GRX_N[0..15][7]

PEG_GTX_C_HRX_P[0..15][7] PEG_GTX_C_HRX_N[0..15][7]

D D

PEG_GTX_C_HRX_P0 PEG_GTX_C_HRX_N0

PEG_GTX_C_HRX_P1 PEG_GTX_C_HRX_N1

PEG_GTX_C_HRX_P2 PEG_GTX_C_HRX_N2

PEG_GTX_C_HRX_P3 PEG_GTX_C_HRX_N3

PEG_GTX_C_HRX_P4 PEG_GTX_C_HRX_N4

PEG_GTX_C_HRX_P5 PEG_GTX_C_HRX_N5

PEG_GTX_C_HRX_P6 PEG_GTX_C_HRX_N6

PEG_GTX_C_HRX_P7 PEG_GTX_C_HRX_N7

PEG_GTX_C_HRX_P8

C C

PEG_GTX_C_HRX_N8 PEG_GTX_C_HRX_P9

PEG_GTX_C_HRX_N9 PEG_GTX_C_HRX_P10

PEG_GTX_C_HRX_N10 PEG_GTX_C_HRX_P11

PEG_GTX_C_HRX_N11 PEG_GTX_C_HRX_P12

PEG_GTX_C_HRX_N12 PEG_GTX_C_HRX_P13

PEG_GTX_C_HRX_N13 PEG_GTX_C_HRX_P14

PEG_GTX_C_HRX_N14 PEG_GTX_C_HRX_P15

PEG_GTX_C_HRX_N15

B B

A A

CV531 0. 22U_0201_6.3V6M CV532 0. 22U_0201_6.3V6M

CV533 0. 22U_0201_6.3V6M CV534 0. 22U_0201_6.3V6M

CV535 0. 22U_0201_6.3V6M CV536 0. 22U_0201_6.3V6M

CV537 0. 22U_0201_6.3V6M CV538 0. 22U_0201_6.3V6M

CV539 0. 22U_0201_6.3V6M CV540 0. 22U_0201_6.3V6M

CV541 0. 22U_0201_6.3V6M CV542 0. 22U_0201_6.3V6M

CV543 0. 22U_0201_6.3V6M CV544 0. 22U_0201_6.3V6M

CV545 0. 22U_0201_6.3V6M CV546 0. 22U_0201_6.3V6M

CV547 0. 22U_0201_6.3V6M CV548 0. 22U_0201_6.3V6M

CV550 0. 22U_0201_6.3V6M CV551 0. 22U_0201_6.3V6M

CV552 0. 22U_0201_6.3V6M CV557 0. 22U_0201_6.3V6M

CV558 0. 22U_0201_6.3V6M CV559 0. 22U_0201_6.3V6M

CV560 0. 22U_0201_6.3V6M CV561 0. 22U_0201_6.3V6M

CV562 0. 22U_0201_6.3V6M CV563 0. 22U_0201_6.3V6M

CV564 0. 22U_0201_6.3V6M CV565 0. 22U_0201_6.3V6M

CV566 0. 22U_0201_6.3V6M CV567 0. 22U_0201_6.3V6M

RV58

1 2

10K_0402_5%

DGPU_HOLD_RST#[20]

PCH_PLTRST#_EC[17,43,44,47,48]

MC74VHC1G08DFT2G_SC70-5

SYS_PEX_RST_MON# GPU_PEX_RST_HOLD#

GC6 2.0 function

5

4

CLK_PEG_N16P[17] CLK_PEG_N16P#[17]

Pilot_05

DGPU_PEX_RST#

RV40 0_0402_5% RV50 2.49K_0402_1%

ALL_GPWRGD DGPU_PEX_RST#

VGA_CLK_REQ#[17]

1 2

@

1 2

RV572 0_0402_5%@

RV571 0_0402_5%@

VGA_SMB_CK2

VGA_SMB_DA2

PEG_HTX_C_GRX_P0 PEG_HTX_C_GRX_N0 PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_N1 PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_P3 PEG_HTX_C_GRX_N3 PEG_HTX_C_GRX_P4 PEG_HTX_C_GRX_N4 PEG_HTX_C_GRX_P5 PEG_HTX_C_GRX_N5 PEG_HTX_C_GRX_P6 PEG_HTX_C_GRX_N6 PEG_HTX_C_GRX_P7 PEG_HTX_C_GRX_N7 PEG_HTX_C_GRX_P8 PEG_HTX_C_GRX_N8 PEG_HTX_C_GRX_P9 PEG_HTX_C_GRX_N9 PEG_HTX_C_GRX_P10 PEG_HTX_C_GRX_N10 PEG_HTX_C_GRX_P11 PEG_HTX_C_GRX_N11 PEG_HTX_C_GRX_P12 PEG_HTX_C_GRX_N12 PEG_HTX_C_GRX_P13 PEG_HTX_C_GRX_N13 PEG_HTX_C_GRX_P14 PEG_HTX_C_GRX_N14 PEG_HTX_C_GRX_P15 PEG_HTX_C_GRX_N15

PEG_GTX_HRX_P0 PEG_GTX_HRX_N0 PEG_GTX_HRX_P1 PEG_GTX_HRX_N1 PEG_GTX_HRX_P2 PEG_GTX_HRX_N2 PEG_GTX_HRX_P3 PEG_GTX_HRX_N3 PEG_GTX_HRX_P4 PEG_GTX_HRX_N4 PEG_GTX_HRX_P5 PEG_GTX_HRX_N5 PEG_GTX_HRX_P6 PEG_GTX_HRX_N6 PEG_GTX_HRX_P7 PEG_GTX_HRX_N7 PEG_GTX_HRX_P8 PEG_GTX_HRX_N8 PEG_GTX_HRX_P9 PEG_GTX_HRX_N9 PEG_GTX_HRX_P10 PEG_GTX_HRX_N10 PEG_GTX_HRX_P11 PEG_GTX_HRX_N11 PEG_GTX_HRX_P12 PEG_GTX_HRX_N12 PEG_GTX_HRX_P13 PEG_GTX_HRX_N13 PEG_GTX_HRX_P14 PEG_GTX_HRX_N14 PEG_GTX_HRX_P15 PEG_GTX_HRX_N15

CLK_REQ

DGPU_PEX_RST#_R

1 2 1 2

DMN63D8LDW-7 2N SOT363-6

ALL_GPWRGD

BSS138W 1N SOT-323-3

AN12 AM12 AN14 AM14 AP14 AP15 AN15 AM15 AN17 AM17 AP17 AP18 AN18 AM18 AN20 AM20 AP20 AP21 AN21 AM21 AN23 AM23 AP23 AP24 AN24 AM24 AN26 AM26 AP26 AP27 AN27 AM27

AK14 AH14

AG14 AK15

AK16 AK17

AH17 AG17 AK18

AK19 AK20

AH20 AG20 AK21

AK22 AK23

AH23 AG23 AK24

AK25

AK13 AK12

AK26

AP29

PEX_TERMP

Pilot_05

2

QV1A

DMN63D8LDW-7 2N SOT363-6

1 3

D

QV3

AJ14

AJ15

AL16

AJ17

AJ18 AL19

AJ20

AJ21 AL22

AJ23

AJ24 AL25

AJ11 AL13

AJ26

AJ12

61

RV56 10K_0402_5%

1 2 2

G

UV1A

@

PEX_RX0 PEX_RX0_N PEX_RX1 PEX_RX1_N PEX_RX2 PEX_RX2_N PEX_RX3 PEX_RX3_N PEX_RX4 PEX_RX4_N PEX_RX5 PEX_RX5_N PEX_RX6 PEX_RX6_N PEX_RX7 PEX_RX7_N PEX_RX8 PEX_RX8_N PEX_RX9 PEX_RX9_N PEX_RX10 PEX_RX10_N PEX_RX11 PEX_RX11_N PEX_RX12 PEX_RX12_N PEX_RX13 PEX_RX13_N PEX_RX14 PEX_RX14_N PEX_RX15 PEX_RX15_N

PEX_TX0 PEX_TX0_N PEX_TX1 PEX_TX1_N PEX_TX2 PEX_TX2_N PEX_TX3 PEX_TX3_N PEX_TX4 PEX_TX4_N PEX_TX5 PEX_TX5_N PEX_TX6 PEX_TX6_N PEX_TX7 PEX_TX7_N PEX_TX8 PEX_TX8_N PEX_TX9 PEX_TX9_N PEX_TX10 PEX_TX10_N PEX_TX11 PEX_TX11_N PEX_TX12 PEX_TX12_N PEX_TX13 PEX_TX13_N PEX_TX14 PEX_TX14_N PEX_TX15 PEX_TX15_N

NC PEX_REFCLK

PEX_REFCLK_N PEX_CLKREQ_N

NC NC

PEX_RST_N PEX_TERMP

N17P-GT_BGA908

5

QV1B

S

3

Part 1 of 7

PCI EXPRESS

GPU_THM_SMBCLK [18,42,48]

34

GPU_THM_SMBDAT [18,42,48]

+1.8V_GFX_AON

RV57 10K_0402_5%

1 2

3

GPIO

RES

I2C

GPCPLL_AVDD

CLK

XTAL_OUTBUFF

CLK_REQ

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27

I2CB_SCL I2CB_SDA

I2CC_SCL I2CC_SDA

I2CS_SCL I2CS_SDA

XS_PLLVDD SP_PLLVDD

VID_PLLVDD

XTAL_IN

XTAL_OUT

XTAL_SSIN

P6 M3

GPU_GC6_FB_EN

L6

GC6_EVENT#_D

P5 P7

1V8_MAIN_EN

L7

FRM_LCK

M7

GPU_PSI

N8 L3 M2

THERMAL_ALERT#

L1

MEM_VREF

M5 N3

GPU_LEVEL

M4 N4

HPD_IFPA

P2

HPD_IFPB

R8

SYS_PEX_RST_MON#

M6

HPD_IFPD

R1

HPD_IFPE

P3 P4 P1 P8 T8

GPU_PEX_RST_HOLD#

L2

HPD_IFPF

R4 R5 U3

HPD_IFPC

AK9

RES

AL10

RES

AL9

RES

AM9

RES

AN9

RES

AG10

RES

AP9

RES

AP8

RES

R7

I2CB_SCL

R6

I2CB_SDA

R2

VGA_EDID_CLK

R3

VGA_EDID_DATA

T4

VGA_SMB_CK2

T3

VGA_SMB_DA2

H26

W=40mils

AD8

W=40mils

AE8

W=40mils

AD7

W=40mils

H3

XTALIN

H2

XTAL_OUT

J4

XTALOUT

1 2

H1

XTALSSIN

1

XTALIN XTAL_OUT

CV70 10P_0402_50V8J

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

NVVDD_PWM_VID [67] GPU_GC6_FB_EN [20]

NVVDDS_PWM_VID [68] 1V8_MAIN_EN [31]

GPU_PSI [67,68] MEM_VDD_CTL [61] MEM_VREF [28,29]

THERMATRIP_GPU#[23,24]

+GPCPLL_AVDD +XS_PLLVDD +SP_PLLVDD +VID_PLLVDD

RV4910K_0402_5%

10K_0402_5%

1 2

RV52 10M_0402_5%@

YV1 27MHZ_10PF_7V27000050

1

GND

2

4

2

1VS_GFX_PG[60]

HPD_IFPC

DGPU_PEX_RST#

RV51

3

QV89 L2N7002WT1G_SC-70-3

13

D

2

G

S

12

RV582 100K_0402_5%

Pilot_05

1 2

RV614 0_0402_5%@

2

QV88A

DMN63D8LDW-7 2N SOT363-6

1 2

RV615 0_0402_5%@

1 2

RV616 0_0402_5%@

Pilot_05

GPU_LEVEL

+GPCPLL_AVDD

12

+VID_PLLVDD

CV71 10P_0402_50V8J

DGPU_PWROK[18,61]

Compal Secret Data

2013/09/09 2014/09/09

Compal Secret Data

2

1VS_GFX_PG

GPU_GC6_FB_EN

1 2

RV610 0_0402_5%@

+3VS

UV22

5

1

P

B

4

O

2

A

G

TC7SZ08FU_SSOP5

3

12

RV609 10K_0402_5%

61

5

QV88B

DMN63D8LDW-7 2N SOT363-6

DV9

12

RB751S40T1G_SOD523-2

DV11

12

RB751S40T1G_SOD523-2

Under

RV583

1 2

@

0_0402_5%

1

2

CV833

0.1U_0402_10V7K

Under

RV586

1 2

0_0402_5%

1

CV53

2

0.1U_0402_10V7K

1VS_GFX_PG

TC7SZ08FU_SSOP5

Deciphered Date

@

Pilot_05

1

DV13

2

1

3

BAT54CW-7-F_SOT323-3

GPU_HPD_RT [35]

DGPU_PEX_RST#

34

CMP_VOUT0 [48,56]

GPU_EVENT#GC6_EVENT#_D

+1.8V_PLLVDD +1.8V_PLLVDD +1.8V_PLLVDD

+1.8V_GFX_AON

UV19

GPU_EVENT# [20]

GPU_PWR_LEVEL [48]

Under Under

+XS_PLLVDD +SP_PLLVDD

0.1U_0402_10V7K

+1.8V_PLLVDD +1.8V_PLLVDD

1

2

10U_0603_6.3V6M

5

1

P

B

4

O

2

A

1

G

3

CV54

0.01U_0402_16V7K

2

FBVDD_EN [31,61]

100K_0402_5%

12

RV209

GC6_EVENT#_D GPU_PSI THERMAL_ALERT# GPU_LEVEL HPD_IFPA HPD_IFPB SYS_PEX_RST_MON# HPD_IFPD HPD_IFPE HPD_IFPF HPD_IFPC 1V8_MAIN_EN GPU_PEX_RST_HOLD# FRM_LCK

GPU_GC6_FB_EN MEM_VREF

VGA_SMB_CK2 VGA_SMB_DA2

I2CB_SCL I2CB_SDA

VGA_EDID_CLK VGA_EDID_DATA

GPU_PWR_LEVEL

RV584

1 2

@

0_0402_5%

1

CV72

2

+1.8V_GFX_RUN

LV7

1 2

Near

BLM15AX300SN1D

1

CV50

CV51

30 ohm

2

(ESR=0.03) Bead

47U_0805_6.3V6M

ALL_GPWRGD

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

1 2

RV42 10K_0402_5%

1 2

RV574 10K_0402_5%@

1 2

RV526 10K_0402_5%

1 2

RV60 100K_0402_5%

1 2

RV575 10K_0402_5%

1 2

RV576 10K_0402_5%

1 2

RV532 10K_0402_5%

1 2

RV577 10K_0402_5%

1 2

RV578 10K_0402_5%

1 2

RV579 10K_0402_5%

1 2

RV580 10K_0402_5%

1 2

RV55 10K_0402_5%

1 2

RV41 10K_0402_5%

1 2

RV581 10K_0402_5%

1 2

RV37 10K_0402_5%

1 2

RV27 100K_0402_5%

1 2

RV191 1.8K_0402_5%

1 2

RV192 1.8K_0402_5%

1 2

RV512 1.8K_0402_5%

1 2

RV513 1.8K_0402_5%

1 2

RV514 1.8K_0402_5%

1 2

RV515 1.8K_0402_5%

Low High

N17P_PCIE/DAC/GPIO

1 2

0_0402_5%

1

CV52

2

0.1U_0402_10V7K

LA-D993P

1

Low Performace High Performace

RV585

@

Pilot_05Pilot_05Pilot_05

+1.8V_GFX_AON

23 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

D D

C C

B B

DDC_CLK_HDMI[35,36]

DDC_DAT_HDMI[35,36]

QV90B

3 4

DMN61D9UDW-7 2N SOT363-6

SB00001GW00

4

+1.8V_GFX_AON +1.8V_GFX_AON

12

2

QV90A

6 1

5

DMN61D9UDW-7 2N SOT363-6

SB00001GW00

IFPC_I2C_CLK[35] IFPC_I2C_DAT[35]

RV588 10K_0402_5%

12

RV589 10K_0402_5%

IFPC_TX2_P[35] IFPC_TX2_N[35] IFPC_TX1_P[35] IFPC_TX1_N[35] IFPC_TX0_P[35] IFPC_TX0_N[35] IFPC_CLK_P[35] IFPC_CLK_N[35]

IFPC_I2C_CLK IFPC_I2C_DAT

3

AM6 AN6

AP3 AN3 AN5 AM5

AL6

AK6

AJ6

AH6

AJ9

AH9

AP6

AP5 AM7

AL7 AN8 AM8

AK8

AL8

AK1

AJ1 AJ3

AJ2 AH3 AH4 AG5 AG4

AM1 AM2 AM3 AM4

AL3 AL4 AK4 AK5

AD2 AD3 AD1 AC1 AC2 AC3 AC4 AC5

AE3 AE4 AF4

AF5 AD4 AD5 AG1

AF1

AG3 AG2

AK3

AK2

AB3

AB4

AF3

AF2

UV1D

@

IFPA_L3 IFPA_L3_N IFPA_L2 IFPA_L2_N IFPA_L1 IFPA_L1_N IFPA_L0 IFPA_L0_N IFPA_AUX_SCL IFPA_AUX_SDA_N

IFPB_L3 IFPB_L3_N IFPB_L2 IFPB_L2_N IFPB_L1 IFPB_L1_N IFPB_L0 IFPB_L0_N IFPB_AUX_SCL IFPB_AUX_SDA_N

IFPC_L0 IFPC_L0_N IFPC_L1 IFPC_L1_N IFPC_L2 IFPC_L2_N IFPC_L3 IFPC_L3_N

IFPD_L0 IFPD_L0_N IFPD_L1 IFPD_L1_N IFPD_L2 IFPD_L2_N IFPD_L3 IFPD_L3_N

IFPE_L0 IFPE_L0_N IFPE_L1 IFPE_L1_N IFPE_L2 IFPE_L2_N IFPE_L3 IFPE_L3_N

IFPF_L0 IFPF_L0_N IFPF_L1 IFPF_L1_N IFPF_L2 IFPF_L2_N IFPF_L3 IFPF_L3_N

IFPC_AUX_SCL IFPC_AUX_SDA_N

IFPD_AUX_SCL IFPD_AUX_SDA_N

IFPE_AUX_SCL IFPE_AUX_SDA_N

IFPF_AUX_SCL IFPF_AUX_SDA_N

Part 4 of 7

TMDS

NC

VDD_SENSE

GND_SENSE

TEST

NVJTAG_SEL

JTAG_TCK

JTAG_TDI JTAG_TDO JTAG_TMS

JTAG_TRST_N

SERIAL

ROM_CS_N ROM_SCLK

ROM_SI

ROM_SO

GENERAL

BUFRST_N

OVERT

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4 STRAP5

THERMDP THERMDN

AC6

NC

AJ28

NC

AJ4

NC

AJ5

NC

AL11

NC

C15

NC

D19

NC

D20

NC

D23

NC

D26

NC

V32

NC

L4

L5

AK11 AM10

AM11 AP12 AP11 AN11

H6 H4 H5 H7

E1 M1

J2 J7 J6 J5 J3 J1

K3 K4

2

trace width: 16mils differential voltage sensing. differential signal routing.

TESTMODE

GPU_JTAG_TCK GPU_JTAG_TDI GPU_JTAG_TDO GPU_JTAG_TMS GPU_JTAG_TRST#

ROM_CS ROM_SCLK ROM_SI ROM_SO

+1.8V_GFX_AON +3VS

RV34

10K_0402_5%

1 2

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4 STRAP5

1 2

RV63 10K_0402_5%

@

RV613

10K_0402_5%

1 2

THERMATRIP_GPU# [23]

VCCSENSE_VGA [67]

VSSSENSE_VGA [67]

T98PAD~D @ T99PAD~D @ T100PAD~D @ T101PAD~D @

T97PAD~D @

ROM_SCLK [30] ROM_SI [30] ROM_SO [30]

STRAP0 [30] STRAP1 [30] STRAP2 [30] STRAP3 [30] STRAP4 [30] STRAP5 [30]

12

RV62 10K_0402_5%

1

N17P-GT_BGA908

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/09/09 2014/09/09

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N17P_eDP/HDMI/mDP

LA-D991P

1

0.1(X00)

24 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

2

1

CV92

1

2

10U_0603_6.3V6M

2

1

CV840

1

2

10U_0603_6.3V6M

+1.8V_GFX_RUN

Pilot_05

+1.8V_GFX_RUN

1

CV120

2

305mA

+1VS_GFX

1

CV93

2

22U_0603_6.3V6M

+1.8V_GFX_RUN

2

CV94

1

10U_0603_6.3V6M

3A

CV96

1

CV95

CV97

2

22U_0603_6.3V6M

+1.8V_GFX_AON

Under GPU Near GPU

1

CV843

2

0.1U_0402_10V7K

Under

+IFP_PLLVDD

CV202

2

0.1U_0402_10V7K

1

2

0.1U_0402_10V7K

2

1U_0402_6.3V6K

RV592

1 2

@

0_0402_5%

CV846

1

CV214

CV213

2

4.7U_0603_6.3V6K

+1.8V_PLLVDD

Pilot_05

Under GPU

1

UV1E

FBVDDQ_0 FBVDDQ_1 FBVDDQ_2 FBVDDQ_3 FBVDDQ_4 FBVDDQ_5 FBVDDQ_6 FBVDDQ_7 FBVDDQ_8 FBVDDQ_9 FBVDDQ_11 FBVDDQ_12 FBVDDQ_14 FBVDDQ_15 FBVDDQ_16 FBVDDQ_17 FBVDDQ_18 FBVDDQ_19 FBVDDQ_22 FBVDDQ_23 FBVDDQ_24 FBVDDQ_25 FBVDDQ_26 FBVDDQ_27 FBVDDQ_28

H8

FBVDDQ_29

H9

FBVDDQ_30 FBVDDQ_31 FBVDDQ_32 FBVDDQ_33 FBVDDQ_34 FBVDDQ_35 FBVDDQ_36 FBVDDQ_37 FBVDDQ_38 FBVDDQ_43

FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ

F1

FBVDDQ_SENSE

F2

PROBE_FB_GND

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CAL_TERM_GND

N17P-GT_BGA908

@

Part 5 of 7

PEX_HVDD_10 PEX_HVDD_11 PEX_HVDD_12 PEX_HVDD_13

PEX_PLL_HVDD

POWER

IFPAB_PLLVDD

IFPCD_PLLVDD

IFPEF_PLVDD

PEX_DVDD_0 PEX_DVDD_1 PEX_DVDD_2 PEX_DVDD_3 PEX_DVDD_4 PEX_DVDD_5

PEX_HVDD_0 PEX_HVDD_1 PEX_HVDD_2 PEX_HVDD_3 PEX_HVDD_4 PEX_HVDD_5 PEX_HVDD_6 PEX_HVDD_7 PEX_HVDD_8 PEX_HVDD_9

1V8_AON 1V8_AON

VDD18 VDD18

IFPAB_RSET

IFPCD_RSET

IFPEF_RSET

IFP_IOVDD IFP_IOVDD

NC

NC NC

AG19 AG21 AG22 AG24 AH21 AH25

AG13 AG15 AG16 AG18 AG25 AH15 AH18 AH26 AH27 AJ27 AK27 AL27 AM28 AN28

AH12

AG12

AG26

+1.8V_GFX_AON

J8 K8 L8 M8

AH8 AJ8

AF7 AF8

AB8 AD6

AG8 AG9

AF6 AG6

AC7 AC8

AG7 AN2

+1.35VS_VGA

11A

D D

C C

+1.35VS_VGA

2

1

10U_0603_6.3V6M

+1.35VS_VGA

2

1

10U_0603_6.3V6M

1

2

22U_0603_6.3V6M

2

CV841

1

10U_0603_6.3V6M

2

CV844

1

10U_0603_6.3V6M

CALIBRATION PIN GDDR5 FB_CAL_x_PD_VDDQ FB_CAL_x_PU_GND FB_CAL_xTERM_GND

Near GPU

1

CV83

2

CV834

22U_0603_6.3V6M

1

2

CV84

CV85

CV86

2

22U_0603_6.3V6M

1

22U_0603_6.3V6M

10U_0603_6.3V6M

Under GPU(below 150mils)

1

CV101

CV100

CV842

2

1U_0402_6.3V6K

2

1U_0402_6.3V6K

1

CV102

CV103

2

1U_0402_6.3V6K

Under GPU(below 150mils)

CV845

1

2

1U_0402_6.3V6K

40.2 ohm

60.4 ohm

1

CV211

CV210

2

1U_0402_6.3V6K

+1.35VS_VGA

1

CV209

CV206

2

1U_0402_6.3V6K

FBVDDQ_SENSE[61]

1 2

RV77 40.2_0402_1%

1 2

RV78 40.2_0402_1%

1 2

RV79 60.4_0402_1%

CV79

10U_0603_6.3V6M

CV112

1U_0402_6.3V6K

CV207

1U_0402_6.3V6K

2

CV80

1

CV113

2

1

CV208

2

W=10mils

AA27 AA30 AB27 AB33 AC27 AD27 AE27 AF27

AG27

W27 W30 W33

B13 B19 E13

E19 H10 H11 H12 H13 H14 H18 H19 H20 H21 H22 H23 H24

L27 M27 N27

P27 R27

T27

T30

T33

Y27

B16

E16 H15 H16

V27

J27

H27

H25

Place near balls

B B

1

2

1U_0402_6.3V6K

Under GPU 1A

1

2

1U_0402_6.3V6K

+PEX_PLL_HVDD

PAD~D@

TV107

330mA

+IFP_PLLVDD

12

PAD~D@

TV106

IFP_IOVDDA

Under GPU Near GPU

IFP_IOVDDB

1

CV88

CV87

1U_0402_6.3V6K

CV835

1U_0402_6.3V6K

CV89

2

1U_0402_6.3V6K

1

CV837

CV836

2

1U_0402_6.3V6K

Near GPU

1

CV114

2

0.1U_0402_10V7K

Under GPU Near GPU

1

CV117

2

0.1U_0402_10V7K

RV591 1K_0402_1%

1

2

CV847

0.1U_0402_10V7K

CV850

0.1U_0402_10V7K

Near GPU

1

CV90

2

1U_0402_6.3V6K

CV91

2

4.7U_0603_6.3V6K

Near GPU

1

CV839

CV838

2

1U_0402_6.3V6K

4.7U_0603_6.3V6K

RV590

1 2

@

0_0402_5%

1

CV119

CV118

2

1U_0402_6.3V6K

0.1U_0402_10V7K

1

2

1U_0402_6.3V6K

4.7U_0603_6.3V6K

+1VS_GFX

1

2

CV848

CV849

4.7U_0603_6.3V6K

+1VS_GFX

RV199

@

1

2

CV912

@

4.7U_0603_6.3V6K

1

2

CV916

@

4.7U_0603_6.3V6K

Deciphered Date

0_0603_5%

1 2

RV200

@

0_0603_5%

1 2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N17P_Power

LA-D991P

1

25 70Tuesday, November 08, 2016

0.1(X00)

IFP_IOVDDA

IFP_IOVDDB

A A

Under GPU Near GPU

1

2

@

0.1U_0402_10V7K

1

2

CV910

CV909

0.1U_0402_10V7K

CV911

@

1U_0402_6.3V6K

Under GPU Near GPU

1

2

CV913

CV914

@

0.1U_0402_10V7K

CV915

@

1U_0402_6.3V6K

Reserve

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/09/09 2014/09/09

Compal Secret Data

Vinaﬁx.com

5

+GPU_CORE

47A

AA14

D D

C C

+GPU_CORE_VDDS

19A

B B

AA21 AB13 AB15 AB17 AB18 AB20 AB22 AC12 AC16 AC19 AC23

AA12 AA16 AA19 AA23 AC14 AC21

M12 M16 M19 M23 N13 N15 N17 N18 N20 N22 P14 P21 R13 R15 R17 R18 R20 R22 T12 T16 T19 T23 U13 U15 U18 U20 U22 V13 V15

M14 M21 P12 P16 P19 P23 T14 T21 U17

V18 W14 W21

UV1G

VDD_1 VDD_4 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_14 VDD_15 VDD_17 VDD_18 VDD_20 VDD_21 VDD_23 VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_31 VDD_34 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_44 VDD_45 VDD_47 VDD_48 VDD_49 VDD_51 VDD_52 VDD_53 VDD_54 VDD_55

VDDS VDDS VDDS VDDS VDDS VDDS VDDS VDDS VDDS VDDS VDDS VDDS VDDS VDDS VDDS VDDS VDDS VDDS

N17P-GT_BGA908

4

@

Part 7 of 7

POWER

VDD_56 VDD_58 VDD_59 VDD_60 VDD_62 VDD_63 VDD_65 VDD_66 VDD_67 VDD_68 VDD_69 VDD_70 VDD_71

VDDS_SENSE GNDS_SENSE

XVDD_4 XVDD_5 XVDD_6 XVDD_7 XVDD_8

XVDD_9 XVDD_10 XVDD_11 XVDD_12 XVDD_13 XVDD_14 XVDD_15 XVDD_16

XVDD_17 XVDD_18 XVDD_19 XVDD_20 XVDD_21 XVDD_22

XVDD_23 XVDD_24 XVDD_25 XVDD_26 XVDD_27

NC NC NC

NC NC NC NC NC NC NC NC

V17 V20 V22 W12 W16 W19 W23 Y13 Y15 Y17 Y18 Y20 Y22

W=10mils

U1 U2

U4 U5 U6 U7 U8

V1 V2 V3 V4 V5 V6 V7 V8

W2 W3 W4 W5 W7 W8

Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8

AA1 AA2 AA3 AA4 AA5 AA6 AA7 AA8

+GPU_CORE

VDDS_SENSE_VGA [68] GNDS_SENSE_VGA [68]

3

2

UV1F

@

A2

GND_0

AA17

GND_1

AA18

GND_2

AA20

GND_3

AA22

GND_4

AB12

GND_5

AB14

GND_6

AB16

GND_7

AB19

GND_8

AB2

GND_9

AB21

GND_10

A33

GND_11

AB23

GND_12

AB28

GND_13

AB30

GND_14

AB32

GND_15

AB5

GND_16

AB7

GND_17

AC13

GND_18

AC15

GND_19

AC17

GND_20

AC18

GND_21

AA13

GND_22

AC20

GND_23

AC22

GND_24

AE2

GND_25

AE28

GND_26

AE30

GND_27

AE32

GND_28

AE33

GND_29

AE5

GND_30

AE7

GND_31

AH10

GND_32

AA15

GND_33

AH13

GND_34

AH16

GND_35

AH19

GND_36

AH2

GND_37

AH22

GND_38

AH24

GND_39

AH28

GND_40

AH29

GND_41

AH30

GND_42

AH32

GND_43

AH33

GND_44

AH5

GND_45

AH7

GND_46

AJ7

GND_47

AK10

GND_48

AK7

GND_49

AL12

GND_50

AL14

GND_51

AL15

GND_52

AL17

GND_53

AL18

GND_54

AL2

GND_55

AL20

GND_56

AL21

GND_57

AL23

GND_58

AL24

GND_59

AL26

GND_60

AL28

GND_61

AL30

GND_62

AL32

GND_63

AL33

GND_64

AL5

GND_65

AM13

GND_66

AM16

GND_67

AM19

GND_68

AM22

GND_69

AM25

GND_70

AN1

GND_71

AN10

GND_72

AN13

GND_73

AN16

GND_74

AN19

GND_75

AN22

GND_76

AN25

GND_77

AN30

GND_78

AN34

GND_79

AN4

GND_80

AN7

GND_81

AP2

GND_82

AP33

GND_83

B1

GND_84

B10

GND_85

B22

GND_86

B25

GND_87

B28

GND_88

B31

GND_89

B34

GND_90

B4

GND_91

B7

GND_92

C10

GND_93

C13

GND_94

C19

GND_95

C22

GND_96

C25

GND_97

C28

GND_98

C7

GND_99

N17P-GT_BGA908

Part 6 of 7

GND

1

GND_OPT GND_OPT

GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136 GND_137 GND_138 GND_139 GND_140 GND_141 GND_142 GND_143 GND_144 GND_145 GND_146 GND_147 GND_148 GND_149 GND_150 GND_151 GND_152 GND_153 GND_154 GND_155 GND_156 GND_157 GND_158 GND_159 GND_160 GND_161 GND_162 GND_163 GND_164 GND_165 GND_166 GND_167 GND_168 GND_169 GND_170 GND_171 GND_172 GND_173 GND_174 GND_175 GND_176 GND_177 GND_178 GND_179 GND_180 GND_181 GND_182 GND_183 GND_184 GND_185 GND_186 GND_187 GND_188 GND_189 GND_190 GND_191 GND_192 GND_193 GND_194 GND_195 GND_196 GND_197 GND_198 GND_199

D2 D31 D33 E10 E22 E25 E5 E7 F28 F7 G10 G13 G16 G19 G2 G22 G25 G28 G3 G30 G32 G33 G5 G7 K2 K28 K30 K32 K33 K5 K7 M13 M15 M17 M18 M20 M22 N12 N14 N16 N19 N2 N21 N23 N28 N30 N32 N33 N5 N7 P13 P15 P17 P18 P20 P22 R12 R14 R16 R19 R21 R23 T13 T15 T17 T18 T2 T20 T22 AG11 T28 T32 T5 T7 U12 U14 U16 U19 U21 U23 V12 V14 V16 V19 V21 V23 W13 W15 W17 W18 W20 W22 W28 Y12 Y14 Y16 Y19 Y21 Y23 AH11 C16 W32

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2013/09/09 2014/09/09

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

N17P_VGA CORE/GND

LA-D991P

1

26 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

FBA_D[0..63][28]

D D

C C

FBA_DBI0#[28] FBA_DBI1#[28] FBA_DBI2#[28]

B B

FBA_EDC[7..0][28]

A A

FBA_DBI3#[28] FBA_DBI4#[28] FBA_DBI5#[28] FBA_DBI6#[28] FBA_DBI7#[28]

FBA_D[0..63]

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8

FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FBA_DBI0# FBA_DBI1# FBA_DBI2# FBA_DBI3# FBA_DBI4# FBA_DBI5# FBA_DBI6# FBA_DBI7#

FBA_EDC0 FBA_EDC1 FBA_EDC2 FBA_EDC3 FBA_EDC4 FBA_EDC5 FBA_EDC6 FBA_EDC7

AM29 AM31

AM30

AM33

AM32

AM34

AG28 AF29 AG29 AF28 AD30 AD29 AC29 AD28

AK29 AK28

AN29 AN31

AN32 AP30 AP32

AK33 AK32 AD34 AD32 AC30 AD33 AF31 AG34 AG32 AG33

AD31

AF34

AE31 AK30 AN33 AF33

AF30 AK31

AF32

L28

M29

L29

M28

N31 P29 R29 P28 J28 H29 J29 H28 G29 E31 E32 F30 C34 D32 B33 C33 F33 F32 H33 H32 P34 P32 P31 P33 L31 L34 L32 L33

AJ29 AJ30

AL31

P30 F31 F34

M32 AL29

M31

G31 E33

M33

M30

H30 E34

M34

UV1B

@

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

N17P-GT_BGA908

Part 2 of 7

MEMORY INTERFACE

A

FBA_WCK01_N FBA_WCK23_N FBA_WCK45_N FBA_WCK67_N

FBA_WCKB01_N FBA_WCKB23_N FBA_WCKB45_N FBA_WCKB67_N

FB_REFPLL_AVDD

FBA_PLL_AVDD

U30

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31 FBA_CMD32 FBA_CMD33 FBA_CMD34 FBA_CMD35

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

FBA_WCK01 FBA_WCK23 FBA_WCK45 FBA_WCK67

FBA_WCKB01 FBA_WCKB23 FBA_WCKB45 FBA_WCKB67

FB_VREF

FBA_CS#_L

T31

FBA_MA3_BA3_L

U29

FBA_MA2_BA0_L

R34

FBA_MA4_BA2_L

R33

FBA_MA5_BA1_L

U32

FBA_WE#_L

U33

FBA_MA7_MA8_L

U28

FBA_MA6_MA11_L

V28

FBA_ABI#_L

V29

FBA_MA12_RFU_L

V30

FBA_MA0_MA10_L

U34

FBA_MA1_MA9_L

U31

FBA_RAS#_L

V34

FBA_RST#_L

V33

FBA_CKE_L

Y32

FBA_CAS#_L

AA31

FBA_CS#_H

AA29

FBA_MA3_BA3_H

AA28

FBA_MA2_BA0_H

AC34

FBA_MA4_BA2_H

AC33

FBA_MA5_BA1_H

AA32

FBA_WE#_H

AA33

FBA_MA7_MA8_H

Y28

FBA_MA6_MA11_H

Y29

FBA_ABI#_H

W31

FBA_MA12_RFU_H

Y30

FBA_MA0_MA10_H

AA34

FBA_MA1_MA9_H

Y31

FBA_RAS#_H

Y34

FBA_RST#_H

Y33

FBA_CKE_H

V31

FBA_CAS#_H

R28 AC28 R32

RV602 60.4_0402_1%@

AC32

RV603 60.4_0402_1%@

R30

FBA_CLK0

R31

FBA_CLK0#

AB31

FBA_CLK1

AC31

FBA_CLK1#

K31

FBA_WCK0

L30

FBA_WCK0_N

H34

FBA_WCK1

J34

FBA_WCK1_N

AG30

FBA_WCK2

AG31

FBA_WCK2_N

AJ34

FBA_WCK3

AK34

FBA_WCK3_N

J30 J31 J32 J33 AH31 AJ31 AJ32 AJ33

CV152 0.1U_0402_10V7K

K27

1 2

Place close to ball

U27

H31

1 2 1 2

FBA_CLK0 [28] FBA_CLK0# [28] FBA_CLK1 [28] FBA_CLK1# [28]

1

2

0.1U_0402_10V7K

Place close to ball Place close to BGA

FBA_RST#_L FBA_RST#_H

12

RV107 10K_0402_5%

FBA_CS#_L [28] FBA_MA3_BA3_L [28] FBA_MA2_BA0_L [28] FBA_MA4_BA2_L [28] FBA_MA5_BA1_L [28] FBA_WE#_L [28] FBA_MA7_MA8_L [28] FBA_MA6_MA11_L [28] FBA_ABI#_L [28] FBA_MA12_RFU_L [28] FBA_MA0_MA10_L [28] FBA_MA1_MA9_L [28] FBA_RAS#_L [28] FBA_RST#_L [28]

FBA_CAS#_L [28] FBA_CS#_H [28] FBA_MA3_BA3_H [28] FBA_MA2_BA0_H [28] FBA_MA4_BA2_H [28] FBA_MA5_BA1_H [28] FBA_WE#_H [28] FBA_MA7_MA8_H [28] FBA_MA6_MA11_H [28] FBA_ABI#_H [28] FBA_MA12_RFU_H [28] FBA_MA0_MA10_H [28] FBA_MA1_MA9_H [28] FBA_RAS#_H [28] FBA_RST#_H [28]

FBA_CAS#_H [28]

FBA_WCK0 [28] FBA_WCK0_N [28] FBA_WCK1 [28] FBA_WCK1_N [28] FBA_WCK2 [28] FBA_WCK2_N [28] FBA_WCK3 [28] FBA_WCK3_N [28]

+FB_PLLAVDD

50mA

CV154

22U_0603_6.3V6M

12

RV108 10K_0402_5%

120mA

1

CV156

2

+1.35VS_VGA

+FB_PLLAVDD

FBC_RST#_L FBC_RST#_H

12

RV95 10K_0402_5%

FBA_CKE_L [28]

12

RV98 10K_0402_5%

FBA_CKE_H [28]

1 2

BLM15AX300SN1D

LV13

12

RV110 10K_0402_5%

FBC_EDC[7..0][29]

+1.8V_GFX_RUN

300mA

12

RV111 10K_0402_5%

FBC_EDC0

FBC_D0 FBC_D1 FBC_D2 FBC_D3 FBC_D4 FBC_D5 FBC_D6 FBC_D7 FBC_D8 FBC_D9

FBC_EDC1 FBC_EDC2 FBC_EDC3 FBC_EDC4 FBC_EDC5 FBC_EDC6 FBC_EDC7

FBC_D[0..63]

UV1C

G9 E9 G8 F9

F11

G11

F12

G12

G6 F5 E6 F6 F4 G4 E2 F3 C2 D4 D3 C1 B3 C4 B5

C5 A11 C11 D11 B11

D8

A8

C8

B8 F24

G23

E24

G24

D21 E21

G21

F21

G27

D27

G26

E27 E29 F29 E30 D30 A32 C31 C32 B32 D29 A29 C29 B29 B21 C23 A21 C21 B24 C24 B26 C26

E11

E3

A3

C9 F23 F27 C30 A24

D10

D5

C3

B9 E23 E28 B30 A23

D9

E4

B2

A9 D22 D28 A30 B23

N17P-GT_BGA908

@

FBB_D0 FBB_D1 FBB_D2 FBB_D3 FBB_D4 FBB_D5 FBB_D6 FBB_D7 FBB_D8 FBB_D9 FBB_D10 FBB_D11 FBB_D12 FBB_D13 FBB_D14 FBB_D15 FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 FBB_D27 FBB_D28 FBB_D29 FBB_D30 FBB_D31 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 FBB_D38 FBB_D39 FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63

FBB_DQM0 FBB_DQM1 FBB_DQM2 FBB_DQM3 FBB_DQM4 FBB_DQM5 FBB_DQM6 FBB_DQM7

FBB_DQS_WP0 FBB_DQS_WP1 FBB_DQS_WP2 FBB_DQS_WP3 FBB_DQS_WP4 FBB_DQS_WP5 FBB_DQS_WP6 FBB_DQS_WP7

FBB_DQS_RN0 FBB_DQS_RN1 FBB_DQS_RN2 FBB_DQS_RN3 FBB_DQS_RN4 FBB_DQS_RN5 FBB_DQS_RN6 FBB_DQS_RN7

Part 3 of 7

MEMORY INTERFACE B

FBB_WCK01_N FBB_WCK23_N FBB_WCK45_N FBB_WCK67_N

FBB_WCKB01

FBB_WCKB01_N

FBB_WCKB23

FBB_WCKB23_N

FBB_WCKB45

FBB_WCKB45_N

FBB_WCKB67

FBB_WCKB67_N

FBB_PLL_AVDD

FBB_CMD0 FBB_CMD1 FBB_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6 FBB_CMD7 FBB_CMD8

FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30 FBB_CMD31 FBB_CMD32 FBB_CMD33 FBB_CMD34 FBB_CMD35

FBB_CLK0

FBB_CLK0_N

FBB_CLK1

FBB_CLK1_N

FBB_WCK01 FBB_WCK23 FBB_WCK45 FBB_WCK67

D13

FBC_CS#_L

E14

FBC_MA3_BA3_L

F14

FBC_MA2_BA0_L

A12

FBC_MA4_BA2_L

B12

FBC_MA5_BA1_L

C14

FBC_WE#_L

B14

FBC_MA7_MA8_L

G15

FBC_MA6_MA11_L

F15

FBC_ABI#_L

E15

FBC_MA12_RFU_L

D15

FBC_MA0_MA10_L

A14

FBC_MA1_MA9_L

D14

FBC_RAS#_L

A15

FBC_RST#_L

B15

FBC_CKE_L

C17

FBC_CAS#_L

D18

FBC_CS#_H

E18

FBC_MA3_BA3_H

F18

FBC_MA2_BA0_H

A20

FBC_MA4_BA2_H

B20

FBC_MA5_BA1_H

C18

FBC_WE#_H

B18

FBC_MA7_MA8_H

G18

FBC_MA6_MA11_H

G17

FBC_ABI#_H

F17

FBC_MA12_RFU_H

D16

FBC_MA0_MA10_H

A18

FBC_MA1_MA9_H

D17

FBC_RAS#_H

A17

FBC_RST#_H

B17

FBC_CKE_H

E17

FBC_CAS#_H

G14 G20 C12 C20

D12

FBC_CLK0

E12

FBC_CLK0#

E20

FBC_CLK1

F20

FBC_CLK1#

F8

FBC_WCK0

E8

FBC_WCK0_N

A5

FBC_WCK1

A6

FBC_WCK1_N

D24

FBC_WCK2

D25

FBC_WCK2_N

B27

FBC_WCK3

C27

FBC_WCK3_N

D6 D7 C6 B6 F26 E26 A26 A27

H17

0.1U_0402_10V7K

Place close to ball

RV604 60.4_0402_1%@ RV605 60.4_0402_1%@

1

CV153

2

1 2 1 2

FBC_CLK0 [29] FBC_CLK0# [29] FBC_CLK1 [29] FBC_CLK1# [29]

FBC_CS#_L [29] FBC_MA3_BA3_L [29] FBC_MA2_BA0_L [29] FBC_MA4_BA2_L [29] FBC_MA5_BA1_L [29] FBC_WE#_L [29] FBC_MA7_MA8_L [29] FBC_MA6_MA11_L [29] FBC_ABI#_L [29] FBC_MA12_RFU_L [29] FBC_MA0_MA10_L [29] FBC_MA1_MA9_L [29] FBC_RAS#_L [29] FBC_RST#_L [29]

FBC_CAS#_L [29] FBC_CS#_H [29] FBC_MA3_BA3_H [29] FBC_MA2_BA0_H [29] FBC_MA4_BA2_H [29] FBC_MA5_BA1_H [29] FBC_WE#_H [29] FBC_MA7_MA8_H [29] FBC_MA6_MA11_H [29] FBC_ABI#_H [29] FBC_MA12_RFU_H [29] FBC_MA0_MA10_H [29] FBC_MA1_MA9_H [29] FBC_RAS#_H [29] FBC_RST#_H [29]

FBC_CAS#_H [29]

FBC_WCK0 [29] FBC_WCK0_N [29] FBC_WCK1 [29] FBC_WCK1_N [29] FBC_WCK2 [29] FBC_WCK2_N [29] FBC_WCK3 [29] FBC_WCK3_N [29]

+FB_PLLAVDD

120mA

PU for X32 modePU for X32 mode

+1.35VS_VGA

12

RV96 10K_0402_5%

FBC_CKE_L [29]

12

RV99 10K_0402_5%

FBC_CKE_H [29]

FBC_D[0..63][29]

FBC_D10 FBC_D11 FBC_D12 FBC_D13 FBC_D14 FBC_D15 FBC_D16 FBC_D17 FBC_D18 FBC_D19 FBC_D20 FBC_D21 FBC_D22 FBC_D23 FBC_D24 FBC_D25 FBC_D26 FBC_D27 FBC_D28 FBC_D29 FBC_D30 FBC_D31 FBC_D32 FBC_D33 FBC_D34 FBC_D35 FBC_D36 FBC_D37 FBC_D38 FBC_D39 FBC_D40 FBC_D41 FBC_D42 FBC_D43 FBC_D44 FBC_D45 FBC_D46 FBC_D47 FBC_D48 FBC_D49 FBC_D50 FBC_D51 FBC_D52 FBC_D53 FBC_D54 FBC_D55 FBC_D56 FBC_D57 FBC_D58 FBC_D59 FBC_D60 FBC_D61 FBC_D62 FBC_D63

FBC_DBI0#

FBC_DBI0#[29]

FBC_DBI1#

FBC_DBI1#[29]

FBC_DBI2#

FBC_DBI2#[29]

FBC_DBI3#

FBC_DBI3#[29]

FBC_DBI4#

FBC_DBI4#[29]

FBC_DBI5#

FBC_DBI5#[29]

FBC_DBI6#

FBC_DBI6#[29]

FBC_DBI7#

FBC_DBI7#[29]

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

2013/09/09 2014/09/09

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

N17P_MEM Interface

LA-D991P

1

27 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

Memory Partition A - Lower 32 bits

FBA_D[0..63][27] FBA_EDC[7..0][27]

D D

FBA_CLK0 FBA_CLK0#

12

RV594

MEM_VREF[23,29]

+1.35VS_VGA

1

2

22U_0603_6.3V6M

+1.35VS_VGA

1

2

1U_0402_6.3V6K

40.2_0402_1%

1

CV903

0.01U_0402_16V7K

2

Termination Enable Termination Disable

1

CV859

CV863

2

22U_0603_6.3V6M

1

CV870

CV869

2

1U_0402_6.3V6K

C C

MEM_VREF levels

70% of rail 50% of rail

B B

A A

FBA_D[0..63] FBA_EDC[7..0]

12

RV595

40.2_0402_1%

RV126

1 2

931_0402_1%

13

D

2

G

QV20

S

BSS138W 1N SOT-323-3

1

CV861

CV860

2

22U_0603_6.3V6M

Under DRAM

1

CV871

CV872

2

1U_0402_6.3V6K

5

FBA_DBI0#[27] FBA_DBI1#[27] FBA_DBI2#[27] FBA_DBI3#[27]

FBA_CLK0[27] FBA_CLK0#[27] FBA_CKE_L[27]

FBA_MA2_BA0_L[27] FBA_MA5_BA1_L[27] FBA_MA4_BA2_L[27] FBA_MA3_BA3_L[27]

FBA_MA7_MA8_L[27] FBA_MA1_MA9_L[27] FBA_MA0_MA10_L[27] FBA_MA6_MA11_L[27] FBA_MA12_RFU_L[27]

12

RV120

121_0402_1%

FBA_ABI#_L[27] FBA_RAS#_L[27] FBA_CS#_L[27] FBA_CAS#_L[27] FBA_WE#_L[27]

FBA_WCK0_N[27] FBA_WCK0[27]

FBA_WCK1_N[27] FBA_WCK1[27]

FBA_RST#_L[27]

+1.35VS_VGA

12

RV125

549_0402_1%

+FBA_VREFC0

12

RV127

1.33K_0402_1%

1

CV862

2

10U_0603_6.3V6M

1

CV873

2

1U_0402_6.3V6K

1

2

820P_0402_25V7

1

CV160

CV373

2

10U_0603_6.3V6M

1

2

1

CV874

CV875

2

1U_0402_6.3V6K

FBA_EDC0 FBA_EDC1 FBA_EDC2 FBA_EDC3

FBA_DBI0# FBA_DBI1# FBA_DBI2# FBA_DBI3#

FBA_CLK0 FBA_CLK0# FBA_CKE_L

FBA_MA2_BA0_L FBA_MA5_BA1_L FBA_MA4_BA2_L FBA_MA3_BA3_L

FBA_MA7_MA8_L

FBA_MA1_MA9_L FBA_MA0_MA10_L FBA_MA6_MA11_L

FBA_MA12_RFU_L

12

RV116

1K_0402_1%

FBA_ABI#_L

FBA_RAS#_L

FBA_CS#_L

FBA_CAS#_L

FBA_WE#_L

FBA_WCK0_N FBA_WCK0

FBA_WCK1_N FBA_WCK1

+FBA_VREFC0

FBA_RST#_L

W=16mils

CV158

+1.35VS_VGA +1.35VS_VGA

Close to DRAMAround DRAM

1

CV163

CV162

CV161

2

10U_0603_6.3V6M

CV876

10U_0603_6.3V6M

4

UV6

MF=0 MF=1 MF=0MF=1

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

H11

BA0/A2 BA2/A4

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

K4

A8/A7 A10/A0

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

K5

A11/A6 A9/A1

J5

A12/RFU/NC

A5

VPP/NC

U5

VPP/NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

170-BALL

SGRAM GDDR5

1

2

1

CV164

CV166

CV165

2

1U_0402_6.3V6K

4

3

MF=0

A4

DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9 DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

H5GC4H24MFR-T2C@

1

CV167

2

1U_0402_6.3V6K

1

CV375

CV376

CV374

2

1U_0402_6.3V6K

FBA_D0

A2

FBA_D1

B4

FBA_D2

B2

FBA_D3

E4

FBA_D4

E2

FBA_D5

F4

FBA_D6

F2

FBA_D7

A11

FBA_D8

A13

FBA_D9

B11

FBA_D10

B13

FBA_D11

E11

FBA_D12

E13

FBA_D13

F11

FBA_D14

F13

FBA_D15

U11

FBA_D16

U13

FBA_D17

T11

FBA_D18

T13

FBA_D19

N11

FBA_D20

N13

FBA_D21

M11

FBA_D22

M13

FBA_D23

U4

FBA_D24

U2

FBA_D25

T4

FBA_D26

T2

FBA_D27

N4

FBA_D28

N2

FBA_D29

M4

FBA_D30

M2

FBA_D31

B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14

A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14

1

CV378

CV377

2

1U_0402_6.3V6K

BYTE0

FBA_DBI7#[27] FBA_DBI6#[27] FBA_DBI5#[27]

BYTE1

BYTE2

BYTE3

+FBA_VREFC0

1

2

CV200

820P_0402_25V7

FBA_CLK1 FBA_CLK1#

12

+1.35VS_VGA

1

CV379

CV380

2

1U_0402_6.3V6K

3

12

RV596

40.2_0402_1%

1

2

RV597

40.2_0402_1%

CV904

0.01U_0402_16V7K

1

CV852

CV851

2

1U_0402_6.3V6K

1

CV868

CV865

2

22U_0603_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

FBA_DBI4#[27]

FBA_CLK1[27] FBA_CLK1#[27] FBA_CKE_H[27]

FBA_MA4_BA2_H[27] FBA_MA3_BA3_H[27] FBA_MA2_BA0_H[27] FBA_MA5_BA1_H[27]

FBA_MA0_MA10_H[27] FBA_MA6_MA11_H[27] FBA_MA7_MA8_H[27] FBA_MA1_MA9_H[27] FBA_MA12_RFU_H[27]

+1.35VS_VGA

RV121

121_0402_1%

FBA_ABI#_H[27] FBA_CAS#_H[27] FBA_WE#_H[27] FBA_RAS#_H[27] FBA_CS#_H[27]

FBA_WCK3_N[27] FBA_WCK3[27]

FBA_WCK2_N[27] FBA_WCK2[27]

FBA_RST#_H[27]

Under DRAM

1

CV853

CV854

2

1U_0402_6.3V6K

1

CV864

CV867

2

22U_0603_6.3V6M

12

1U_0402_6.3V6K

22U_0603_6.3V6M

2013/09/09 2014/09/09

FBA_MA4_BA2_H FBA_MA3_BA3_H FBA_MA2_BA0_H FBA_MA5_BA1_H

FBA_MA0_MA10_H FBA_MA6_MA11_H

FBA_MA7_MA8_H FBA_MA1_MA9_H

FBA_MA12_RFU_H

RV117

FBA_ABI#_H

FBA_CAS#_H

FBA_RAS#_H

FBA_CS#_H

FBA_WCK3_N

FBA_WCK2_N

1

CV855

2

1U_0402_6.3V6K

1

CV866

2

10U_0603_6.3V6M

FBA_EDC7 FBA_EDC6 FBA_EDC5 FBA_EDC4

FBA_DBI7# FBA_DBI6# FBA_DBI5# FBA_DBI4#

FBA_CLK1 FBA_CLK1#

FBA_CKE_H

12

1K_0402_1%

FBA_WE#_H

FBA_WCK3

FBA_WCK2

FBA_RST#_H

1

CV856

CV857

2

1U_0402_6.3V6K

1

CV381

CV168

2

10U_0603_6.3V6M

Compal Secret Data

C2 C13 R13

R2

D2 D13 P13

P2

J12

J11

J3

H11 K10 K11 H10

K4 H5 H4

K5

J5

A5 U5

J1 J10 J13

J4 G3

G12

L3

L12

D5 D4

P5

P4

A10 U10

J14

J2

H1

K1

B5 G5

L5

T5

B10 D10 G10 L10 P10 T10 H14 K14

G1

L1 G4

L4 C5 R5

C10 R10 D11 G11 L11 P11 G14 L14

1

CV858

2

1U_0402_6.3V6K

Close to DRAMAround DRAM

1

2

10U_0603_6.3V6M

Deciphered Date

2

UV7

MF=0 MF=1 MF=0MF=1

EDC0 EDC3 EDC1 EDC2 EDC2 EDC1 EDC3 EDC0

DBI0# DBI3# DBI1# DBI2# DBI2# DBI1# DBI3# DBI0#

CK CK# CKE#

BA0/A2 BA2/A4 BA1/A5 BA3/A3 BA2/A4 BA0/A2 BA3/A3 BA1/A5

A8/A7 A10/A0 A9/A1 A11/A6 A10/A0 A8/A7 A11/A6 A9/A1 A12/RFU/NC

VPP/NC VPP/NC

MF SEN ZQ

ABI# RAS# CAS# CS# WE# CAS# RAS# WE# CS#

WCK01# WCK23# WCK01 WCK23

WCK23# WCK01# WCK23 WCK01

VREFD VREFD VREFC

RESET#

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

170-BALL

SGRAM GDDR5

1

CV169

2

10U_0603_6.3V6M

2

MF=1

1

CV172

CV171

CV170

2

10U_0603_6.3V6M

1

A4

DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9

DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31

H5GC4H24MFR-T2C@

1

2

1U_0402_6.3V6K

1

CV174

CV173

CV175

2

1U_0402_6.3V6K

FBA_D56

A2

FBA_D57

B4

FBA_D58

B2

FBA_D59

E4

FBA_D60

E2

FBA_D61

F4

FBA_D62

F2

FBA_D63

A11

FBA_D48

A13

FBA_D49

B11

FBA_D50

B13

FBA_D51

E11

FBA_D52

E13

FBA_D53

F11

FBA_D54

F13

FBA_D55

U11

FBA_D40

U13

FBA_D41

T11

FBA_D42

T13

FBA_D43

N11

FBA_D44

N13

FBA_D45

M11

FBA_D46

M13

FBA_D47

U4

FBA_D32

U2

FBA_D33

T4

FBA_D34

T2

FBA_D35

N4

FBA_D36

N2

FBA_D37

M4

FBA_D38

M2

FBA_D39

B1

VDDQ

D1

VDDQ

F1

VDDQ

M1

VDDQ

P1

VDDQ

T1

VDDQ

G2

VDDQ

L2

VDDQ

B3

VDDQ

D3

VDDQ

F3

VDDQ

H3

VDDQ

K3

VDDQ

M3

VDDQ

P3

VDDQ

T3

VDDQ

E5

VDDQ

N5

VDDQ

E10

VDDQ

N10

VDDQ

B12

VDDQ

D12

VDDQ

F12

VDDQ

H12

VDDQ

K12

VDDQ

M12

VDDQ

P12

VDDQ

T12

VDDQ

G13

VDDQ

L13

VDDQ

B14

VDDQ

D14

VDDQ

F14

VDDQ

M14

VDDQ

P14

VDDQ

T14

VDDQ

A1

VSSQ

C1

VSSQ

E1

VSSQ

N1

VSSQ

R1

VSSQ

U1

VSSQ

H2

VSSQ

K2

VSSQ

A3

VSSQ

C3

VSSQ

E3

VSSQ

N3

VSSQ

R3

VSSQ

U3

VSSQ

C4

VSSQ

R4

VSSQ

F5

VSSQ

M5

VSSQ

F10

VSSQ

M10

VSSQ

C11

VSSQ

R11

VSSQ

A12

VSSQ

C12

VSSQ

E12

VSSQ

N12

VSSQ

R12

VSSQ

U12

VSSQ

H13

VSSQ

K13

VSSQ

A14

VSSQ

C14

VSSQ

E14

VSSQ

N14

VSSQ

R14

VSSQ

U14

VSSQ

1

CV383

CV384

2

1U_0402_6.3V6K

Title

Size Document Number Rev

Date: Sheet of

BYTE7

BYTE6

BYTE5

BYTE4

+1.35VS_VGA+1.35VS_VGA

1

2

1U_0402_6.3V6K

Compal Electronics, Inc.

1

CV387

CV382

2

1U_0402_6.3V6K

N17P_GDDR5_A

LA-D991P

1

CV386

CV388

CV385

2

1U_0402_6.3V6K

28 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

Memory Partition A - Lower 32 bits

RV141

1

2

1

2

CV182

10U_0603_6.3V6M

CV900

1U_0402_6.3V6K

FBC_D[0..63] FBC_EDC[7..0]

FBC_MA2_BA0_L[27] FBC_MA5_BA1_L[27] FBC_MA4_BA2_L[27] FBC_MA3_BA3_L[27]

FBC_MA7_MA8_L[27] FBC_MA1_MA9_L[27] FBC_MA0_MA10_L[27] FBC_MA6_MA11_L[27] FBC_MA12_RFU_L[27]

+1.35VS_VGA

RV140

549_0402_1%

RV142

1.33K_0402_1%

1

CV183

2

1

CV901

2

1U_0402_6.3V6K

FBC_DBI0#[27] FBC_DBI1#[27] FBC_DBI2#[27] FBC_DBI3#[27]

FBC_CLK0[27] FBC_CLK0#[27] FBC_CKE_L[27]

RV136

121_0402_1%

FBC_ABI#_L[27] FBC_RAS#_L[27] FBC_CS#_L[27] FBC_CAS#_L[27] FBC_WE#_L[27]

FBC_WCK0_N[27] FBC_WCK0[27]

FBC_WCK1_N[27] FBC_WCK1[27]

FBC_RST#_L[27]

12

820P_0402_25V7

FBC_DBI0# FBC_DBI1# FBC_DBI2# FBC_DBI3#

FBC_CLK0 FBC_CLK0#

FBC_CKE_L

FBC_MA2_BA0_L FBC_MA5_BA1_L FBC_MA4_BA2_L FBC_MA3_BA3_L

FBC_MA7_MA8_L

FBC_MA1_MA9_L FBC_MA0_MA10_L FBC_MA6_MA11_L

FBC_MA12_RFU_L

RV132

1K_0402_1%

12

FBC_ABI#_L

FBC_RAS#_L

FBC_CS#_L

FBC_CAS#_L

FBC_WE#_L

FBC_WCK0_N FBC_WCK0

FBC_WCK1_N FBC_WCK2

FBC_WCK1

+FBC_VREFC1

FBC_RST#_L

+FBC_VREFC1

W=16mils

1

+1.35VS_VGA

CV177

2

Close to DRAMAround DRAM

1

CV180

CV179

CV389

2

10U_0603_6.3V6M

1

CV902

2

10U_0603_6.3V6M

FBC_D[0..63][27] FBC_EDC[7..0][27]

D D

FBC_CLK0 FBC_CLK0#

12

C C

MEM_VREF levels

70% of rail 50% of rail

B B

A A

MEM_VREF[23,28]

+1.35VS_VGA

1

2

22U_0603_6.3V6M

+1.35VS_VGA

1

2

1U_0402_6.3V6K

Termination Enable Termination Disable

1

CV889

2

22U_0603_6.3V6M

1

CV895

2

1U_0402_6.3V6K

RV598

40.2_0402_1%

1

CV905

0.01U_0402_16V7K

2

G

1

CV885

CV886

2

22U_0603_6.3V6M

Under DRAM

1

CV897

CV896

2

1U_0402_6.3V6K

5

12

RV599

40.2_0402_1%

1 2

931_0402_1%

13

D

QV21

S

BSS138W 1N SOT-323-3

1

CV888

CV887

2

10U_0603_6.3V6M

22U_0603_6.3V6M

1

CV899

CV898

2

1U_0402_6.3V6K

FBC_EDC0 FBC_EDC1 FBC_EDC2 FBC_EDC3

12

CV181

1U_0402_6.3V6K

1

2

4

CV184

1U_0402_6.3V6K

4

UV8

MF=0 MF=1 MF=0MF=1

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

H11

BA0/A2 BA2/A4

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

K4

A8/A7 A10/A0

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

K5

A11/A6 A9/A1

J5

A12/RFU/NC

A5

VPP/NC

U5

VPP/NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

170-BALL

SGRAM GDDR5

1

CV185

CV186

2

CV392

2

1U_0402_6.3V6K

3

MF=0

A4

DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9

DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

H5GC4H24MFR-T2C@

1

CV390

2

1U_0402_6.3V6K

1

CV391

CV393

CV395

2

1U_0402_6.3V6K

FBC_D0

A2

FBC_D1

B4

FBC_D2

B2

FBC_D3

E4

FBC_D4

E2

FBC_D5

F4

FBC_D6

F2

FBC_D7

A11

FBC_D8

A13

FBC_D9

B11

FBC_D10

B13

FBC_D11

E11

FBC_D12

E13

FBC_D13

F11

FBC_D14

F13

FBC_D15

U11

FBC_D16

U13

FBC_D17

T11

FBC_D18

T13

FBC_D19

N11

FBC_D20

N13

FBC_D21

M11

FBC_D22

M13

FBC_D23

U4

FBC_D24

U2

FBC_D25

T4

FBC_D26

T2

FBC_D27

N4

FBC_D28

N2

FBC_D29

M4

FBC_D30

M2

FBC_D31

B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14

A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14

1

CV396

CV394

2

1U_0402_6.3V6K

BYTE0

12

1

CV880

2

1U_0402_6.3V6K

1

CV893

2

22U_0603_6.3V6M

FBC_DBI7# FBC_DBI6# FBC_DBI5# FBC_DBI4#

FBC_CLK1 FBC_CLK1# FBC_CKE_H

FBC_MA4_BA2_H FBC_MA3_BA3_H FBC_MA2_BA0_H FBC_MA5_BA1_H

FBC_MA0_MA10_H FBC_MA6_MA11_H

FBC_MA7_MA8_H FBC_MA1_MA9_H

FBC_MA12_RFU_H

RV131

1K_0402_1%

FBC_RST#_H

+1.35VS_VGA

1

CV881

2

1U_0402_6.3V6K

1

CV892

2

10U_0603_6.3V6M

Compal Secret Data

FBC_DBI7#[27] FBC_DBI6#[27] FBC_DBI5#[27]

BYTE1

BYTE2

BYTE3

+1.35VS_VGA

+FBC_VREFC1

1

2

CV199

820P_0402_25V7

FBC_CLK1 FBC_CLK1#

12

+1.35VS_VGA

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

RV600

40.2_0402_1%

1

CV906

0.01U_0402_16V7K

2

1

2

1U_0402_6.3V6K

1

2

22U_0603_6.3V6M

12

1

CV877

2

1U_0402_6.3V6K

1

CV894

2

22U_0603_6.3V6M

FBC_DBI4#[27]

FBC_CLK1[27] FBC_CLK1#[27] FBC_CKE_H[27]

FBC_MA4_BA2_H[27] FBC_MA3_BA3_H[27] FBC_MA2_BA0_H[27] FBC_MA5_BA1_H[27]

FBC_MA0_MA10_H[27] FBC_MA6_MA11_H[27] FBC_MA7_MA8_H[27] FBC_MA1_MA9_H[27] FBC_MA12_RFU_H[27]

+1.35VS_VGA

RV135

121_0402_1%

FBC_ABI#_H[27] FBC_CAS#_H[27] FBC_WE#_H[27] FBC_RAS#_H[27] FBC_CS#_H[27]

FBC_WCK3_N[27] FBC_WCK3[27]

FBC_WCK2_N[27] FBC_WCK2[27]

FBC_RST#_H[27]

RV601

40.2_0402_1%

Under DRAM

1

CV879

CV878

2

1U_0402_6.3V6K

1

CV890

CV891

2

22U_0603_6.3V6M

2013/09/09 2014/09/09

FBC_EDC7 FBC_EDC6 FBC_EDC5 FBC_EDC4

12

FBC_ABI#_H FBC_CAS#_H FBC_WE#_H FBC_RAS#_H FBC_CS#_H

FBC_WCK3_N

FBC_WCK3

FBC_WCK2_N

1

CV882

2

1U_0402_6.3V6K

1

CV187

2

10U_0603_6.3V6M

Deciphered Date

CV883

1U_0402_6.3V6K

CV397

2

UV9

MF=0 MF=1 MF=0MF=1

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

H11

BA0/A2 BA2/A4

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

K4

A8/A7 A10/A0

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

K5

A11/A6 A9/A1

J5

A12/RFU/NC

A5

VPP/NC

U5

VPP/NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

170-BALL

SGRAM GDDR5

1

CV884

2

Close to DRAMAround DRAM

1

CV188

CV189

2

10U_0603_6.3V6M

2

10U_0603_6.3V6M

1

MF=1

A4

DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9

DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

H5GC4H24MFR-T2C@

1

CV190

2

10U_0603_6.3V6M

1

CV191

2

1U_0402_6.3V6K

1

CV193

CV192

CV194

2

1U_0402_6.3V6K

Title

Size Document Number Rev

Date: Sheet of

FBC_D56

A2

FBC_D57

B4

FBC_D58

B2

FBC_D59

E4

FBC_D60

E2

FBC_D61

F4

FBC_D62

F2

FBC_D63

A11

FBC_D48

A13

FBC_D49

B11

FBC_D50

B13

FBC_D51

E11

FBC_D52

E13

FBC_D53

F11

FBC_D54

F13

FBC_D55

U11

FBC_D40

U13

FBC_D41

T11

FBC_D42

T13

FBC_D43

N11

FBC_D44

N13

FBC_D45

M11

FBC_D46

M13

FBC_D47

U4

FBC_D32

U2

FBC_D33

T4

FBC_D34

T2

FBC_D35

N4

FBC_D36

N2

FBC_D37

M4

FBC_D38

M2

FBC_D39

B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14

A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14

1

CV400

CV399

2

1U_0402_6.3V6K

Compal Electronics, Inc.

N17P_GDDR5_B

1

2

1U_0402_6.3V6K

+1.35VS_VGA

BYTE7

BYTE6

BYTE5

BYTE4

1

CV402

CV398

2

1U_0402_6.3V6K

LA-D991P

1

2

1U_0402_6.3V6K

1

CV401

CV403

CV404

2

1U_0402_6.3V6K

0.1(X00)

29 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

+1.8V_GFX_AON

RV157 100K_0402_5%

D D

ROM_SI[24] ROM_SO[24] ROM_SCLK[24]

ROM_SI ROM_SO ROM_SCLK

1 2

RV160 100K_0402_5%

@

1 2

RV158 100K_0402_5%

1 2

RV161 100K_0402_5%

@

1 2

RV159 100K_0402_5%

1 2

RV162 100K_0402_5%

@

1 2

4

+1.8V_GFX_AON

SMB_ALT_ADDR

Low High

DEVID_SEL

Low High

VGA_DEVICE

Low High

PCIE_CFG

Low High

3

Single GPU Dual GPU

Original Device ID Re-brand Device ID

3D Device VGA Device

Normal signal swing Reduce the signal amplitude

2

1

RV146 100K_0402_5%

@

1 2

STRAP0[24] STRAP1[24] STRAP2[24] STRAP3[24] STRAP4[24] STRAP5[24]

C C

B B

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4 STRAP5

RV152 100K_0402_5%

@

1 2

RV147 100K_0402_5%

@

1 2

RV153 100K_0402_5%

@

1 2

RV148 100K_0402_5%

@

1 2

RV154 100K_0402_5%

@

1 2

RV149 100K_0402_5%

1 2

RV155 100K_0402_5%

@

1 2

RV150 100K_0402_5%

@

1 2

RV156 100K_0402_5%

1 2

RV593 100K_0402_5%

@

1 2

RV66 100K_0402_5%

1 2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2013/09/09 2014/09/09

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

N17P_MISC

LA-D991P

1

30 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

+1.8V_GFX_RUN

+1.8V_GFX_AON

UZ17

1

VIN

2

1V8_MAIN_EN

VIN

3

EN

4

VBIAS

APE8937GN2_DFN8_2X2

BAT54CW-7-F_SOT323-3

D D

1

CV573

0.1U_0402_10V7K

2

1V8_RUN_EN

+5VALW

1V8_MAIN_EN[23,31]

GPU_CORE_PG[31,67]

RZ106 0_0402_5%

1 2

@

DV14

@

2

3

VOUT VOUT

CT

GND GND

Pilot_05

1

8 7

6 5

9

1V8_RUN_EN

1V8_GFX_RUN

Pilot_05

0_0805_5%

1 2

CZ95

@

2200P_0402_25V7K

RZ69

NVVDDS Enable

+3VS

12

QV92A

TC7SZ08FU_SSOP5

0.01UF_0402_25V7K

61

12

RZ108 100K_0402_5%

UV21

RV607 1M_0402_5%

2

DMN63D8LDW-7 2N SOT363-6

+3VS

5

P

B

4

O

A

G

3

CV917

0.1U_0402_25V6

1 2

QV92B

RV606 0_0402_5%

1 2

@

+3VS

12

RZ109 100K_0402_5%

34

Pilot_05

5

1V8_EN_LS3V3

GPU_CORE_PG [31,67]

C C

1V8_EN_LS3V3

DMN63D8LDW-7 2N SOT363-6

B B

NVVDDS_EN[60,68]

Enable 1.2V Disable 0.55V

@

NVVDDS_EN

12

CV918

+1.8V_GFX_RUN

@

1V8_MAIN_EN

4

1

CZ98

0.1U_0402_10V6K

2

Discharge

QZ6B

DMN63D8LDW-7 2N SOT363-6

FBVDD_EN[23,61]

DMN63D8LDW-7 2N SOT363-6

QZ8A

NVVDDS_EN

GPU Power Up Sequence

+1.8V_GFX_AON

1V8_MAIN_EN

+1.8V_GFX_RUN

+GPU_CORE

+GPU_CORE_VDDS

+1VS_GFX

+1.35V_GPU

The ramp time for any rail must be more than 40us and less than 2ms.

3

+3VALW

5

2

12

RZ12 100K_0402_5%

34

12

RZ103 100K_0402_5%

61

+1.35VS_VGA

12

RZ8 10_0402_1%

QZ6A

61

DMN63D8LDW-7 2N SOT363-6

2

1

CV920

2

0.1U_0402_10V7K

@

+GPU_CORE_VDDS+3VALW

QZ8B

5

DMN63D8LDW-7 2N SOT363-6

DGPU_PWR_EN[20,31,62]

12

RZ9 10_0402_1%

DMN63D8LDW-7 2N SOT363-6

34

QZ11

+1VS_GFX

2

G

12

13

QZ12A

RZ73 10_0402_1%

D

S

+5VALW

12

RV534 100K_0402_5%

1 2

DGPU_PWR_EN#

61

2

L2N7002WT1G_SC-70-3

@

RV399 0_0402_5%

Pilot_05

DMN63D8LDW-7 2N SOT363-6

NVVDD_EN

GPU GC6 Entry Sequence

FB_CKE Normal Self-Refresh

PXE_Link Active XXX

2

DGPU_PWR_EN#_R

1

CV499

2

0.1U_0402_10V7K

@

QZ7A

2

+1.8V_GFX_AON

QZ12B

12

RZ104 100K_0402_5%

61

0.1U_0402_10V7K

@

12

RZ11 100_0402_5%

DMN63D8LDW-7 2N SOT363-6

34

5

+GPU_CORE+3VALW +3VALW

12

RZ10 10_0402_1%

DMN63D8LDW-7 2N SOT363-6

34

QZ7B

1

5

CV921

2

DMN63D8LDW-7 2N SOT363-6

GPU GC6 Exit Sequence

12

RZ105 100K_0402_5%

QZ10A

61

1V8_RUN_EN

2

@

DetectXXX Train

1

+1.8V_GFX_RUN

12

RZ100 100_0402_5%

DMN63D8LDW-7 2N SOT363-6

34

QZ10B

1

5

CV922

2

0.1U_0402_10V7K

NormalSelf-Refresh

DGPU_PEX_RST#

GPU_GC6_FB_EN

40us < T1 < 4ms

1us < T0

T1 < 4ms

1V8_MAIN_EN

ALL_GPWRGD

GPU_EVENT# The entire entry/exit sequence must complete within 200 ms.

+1.8V_GFX_AON

UV23

@

4

O

RV608 0_0402_5%

1 2

Pilot_05

12

CV919

0.01UF_0402_25V7K

5

1

P

G

3

@

B

2

A

DGPU_PWR_EN [20,31,62]

1V8_MAIN_EN [23,31]

Enable 1.2V Disable 0.55V

4

NVVDD Enable

A A

NVVDD_EN[67]

TC7SZ08FU_SSOP5

@

5

GPU Power Down Sequence

+GPU_CORE_VDDS

+GPU_CORE

all other power rails

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

Compal Secret Data

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

GPU DC/DC interface

1

31 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

A

B

C

D

E

B+ Discharge

+5VALW to +5VS +3VALW to +3VS

1 1

SIO_SLP_S3#[18,33,34,39,48,49,57]

SIO_SLP_S3#

+5VALW

SIO_SLP_S3#

+5VALW +5VS

+3VALW +3VS

+5VALW

UZ1

1

VIN1

2

VIN1

3

ON1

4

VBIAS

5

ON2

6

VIN2

7

VIN2

EM5209VF_DFN14_3X2

VOUT1 VOUT1

GND

VOUT2 VOUT2

GPAD

14 13

12

CT1

11 10

CT2

9 8

15

Close UZ1Close UZ1

+3VALW+5VALW

1

CZ11

@

1U_0603_10V6K

2

2 2

1

CZ12

@

1U_0603_10V6K

2

1

CZ8

2

10U_0603_6.3V6M

+3VS+5VS

1

CZ9

2

10U_0603_6.3V6M

RZ13 0_1206_5%

1 2

5VS

@

1 2

CZ4 0.01U_0402_16V7K

1 2

CZ6 0.01U_0402_16V7K

1 2

3VS+3VALW

PAD-OPEN 43x39

PJP15

@

Pilot_05

1495mA

2041mA

B+

12

R1 1M_0402_5%

QZ13B DMN63D8LDW-7 2N SOT363-6

R3 1M_0402_5%

VCC_CHG[55]

1 2

34

5

12

R4

1M_0402_5%

12

R5

1M_0402_5%

B+

R2

4.7K_0805_5%

1 2

QZ13A

61

DMN63D8LDW-7 2N SOT363-6

2

eDP & Camera Load Switch +VCCST Load Switch

+3VALW

UZ8

5

3 3

DV3

LCD_VCC_TEST_EN[48]

ENVDD_PCH[16]

4 4

2

3

BAT54CW-7-F_SOT323-3~D

A

1

ENVDD

SY6288C20AAC_SOT23-5

4

1

OUT

IN

2

GND

3

OC

EN

ENVDDENVDD

Pilot_05

PJP35

@

112

JUMP_43X39

B

2

EDPVDD

1 2

RZ40 100K_0402_5%

+EDPVDD +EDPVDD

1

2

CZ41

0.1U_0402_10V6K

+1VALW

+5VALW

1

12

CZ96

2

SIO_SLP_S4#[18,33,48,49,69]

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

C

2011/08/25 2012/07/25

1U_0402_6.3V6K

Compal Secret Data

Deciphered Date

D

CZ97@

0.1U_0402_25V6

UZ15

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

TPS22961DNYR_WSON8

4.4mohm/6A TR=12.5us@Vin=1.05V

+VCCST

RZ66

VOUT

6

5

GND

0_0603_5%

1 2

VCCST

Date: Sheet of

@

1

CZ28

0.1U_0402_10V6K

2

Title

SYS DC/DC Interface

Size Document Number Rev

LA-D991P

Pilot_05

Compal Electronics, Inc.

E

0.1(X00)

32 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

+1.2V_DDR Enable +VCCIO Enable

2

1

DZ1

1 2

D D

SIO_SLP_S4#[18,32,48,49,69]

RB751S40T1G_SOD523-2

1 2

RZ102

130K_0402_5%

1

CZ102

0.1U_0402_10V6K

2

1.2V_VDDQ_EN [57]

SIO_SLP_S3#[18,32,33,34,39,48,49,57]

+VCCSTG Load Switch

C C

+3VALW

5

UZ21

IMVP_VR_ON[18,48] SIO_SLP_S3#[18,32,33,34,39,48,49,57]

1

VCC

IN1

OUT

2

IN2

GND

3

MC74VHC1G08DFT2G_SC70-5

4

12

RZ71 100K_0402_5%

VR_ON [18,63]

SIO_SLP_S3#[18,32,33,34,39,48,49,57]

1U_0402_6.3V6K

1

CZ88

2

SIO_SLP_S3#

+5VALW

12

1 2

RB751S40T1G_SOD523-2

1 2

RZ107

150K_0402_5%

+1VALW

0.1U_0402_10V7K

@

CZ86

DZ2

1

CZ108

0.1U_0402_10V6K

2

UZ9

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

TPS22961DNYR_WSON8

4.4mohm/6A TR=12.5us@Vin=1.05V

VOUT

GND

VCCIO_EN [59]

6

VCCSTG

5

+VCCSTG

@

12

RZ48 0_0603_5%

Pilot_05

+VCCSTG

1

CZ47

0.1U_0402_10V6K

2

B B

+VCCPLL_OC Load Switch

+1.2V_DDR

+5VALW

SIO_SLP_S3#

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

UZ16

1

VIN

2

VIN

3

EN

4

VBIAS

APE8937GN2_DFN8_2X2

8

1.2V_VCCPLL_OC

VOUT

7

VOUT

6

CT

GND GND

CZ57

5 9

2200P_0402_25V7K

Title

EC ENE-KB9012/ KC3810

Size Document Number Rev

LA-D991P

Date: Sheet of

+1.2V_VCCPLL_OC

RZ67 0_0603_5%

1 2

@

1 2

@

Compal Electronics, Inc.

Pilot_05

1

+1.2V_VCCPLL_OC

1

CZ49

0.1U_0402_10V6K

2

33 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

LCD backlight PWR CTRL

4

3

2

1

eDP & TS Conn.

D

6 2

1

3.3V_CAM_EN#

IR_CAM_DET#

1

CV579

0.1U_0402_25V6

2

QZ9

DMG2301U-7_SOT23-3

D

S

13

G

2

3.3V_CAM_EN#

CAM_CBL_DET#[ 16]

IR_CAM_DET#[20]

+INV_PWR_SRC

60mil

RZ37 0_0603_5%

1 2

@

3.3V_CAM_EN# [18,53]

1 2

RZ38 100K_0402_5%@

1 2

RZ96 100K_0402_5%

USB20_P12_R USB20_N12_R

DMIC_DATA_CAM DMIC_CLK_CAM

+3VS_CAM +3VS_CAM+3VS

Pilot_05

B+_CAM+3VS_CAM

+3VS

+3VALW

JCAM1

14

13

12

11

10

9

8

G1

7

G2

6

5

4

3

2

1

ACES_87212-14G0

15 16

1

CZ44 1U_0402_6.3V6K

2

60mil

EDP_TXN0[7]

EDP_TXP0[7]

EDP_TXN1[7]

EDP_TXP1[7]

EDP_TXN2[7]

EDP_TXP2[7]

EDP_TXN3[7]

EDP_TXP3[7]

EDP_AUXP[7]

EDP_AUXN[7]

PANEL_BKEN_EC[48]

BIA_PWM_PCH[ 7,16]

LCD_TST[48]

1 2

CV581 0.1U_0402_10V6K

1 2

CV580 0.1U_0402_10V6K

1 2

CV586 0.1U_0402_10V6K

1 2

CV585 0.1U_0402_10V6K

1 2

CV588 0.1U_0402_10V6K

1 2

CV587 0.1U_0402_10V6K

1 2

CV590 0.1U_0402_10V6K

1 2

CV589 0.1U_0402_10V6K

1 2

CV592 0.1U_0402_10V6K

1 2

CV591 0.1U_0402_10V6K

1 2

RV566 0_0402_5%@

Pilot_05

DV2

2

1

3

LCD_TST

BAT54CW-7-F_SOT323-3~D

EDP_TXN0_C

RV539 0_0402_5%@

EDP_TXP0_C

RV540 0_0402_5%@

EDP_TXN1_C

RV541 0_0402_5%@

EDP_TXP1_C EDP_TXP1_R

RV542 0_0402_5%@

EDP_TXN2_C

RV543 0_0402_5%@

EDP_TXP2_C

RV544 0_0402_5%@

EDP_TXN3_C

RV546 0_0402_5%@

EDP_TXP3_C

RV548 0_0402_5%@

EDP_AUXP_C

RV549 0_0402_5%@

EDP_AUXN_C EDP_AUXN_R

RV552 0_0402_5%@

1 2

12

RV536 100K_0402_5%

12

RV537 100K_0402_5%

Pilot_05,06

DISPOFF#

INV_PWM

EDP_TXN0_R

EDP_TXP0_R

EDP_TXN1_R

EDP_TXN2_R

EDP_TXP2_R

EDP_TXN3_R

EDP_TXP3_R

EDP_AUXP_R

+3VS

5

UZ23

1

DISPOFF#

IN1

VCC

4

OUT

2

LCD_TST

IN2

GND

3

MC74VHC1G08DFT2G_SC70-5

@

+INV_PWR_SRC

LCD_TST LCD_TST_R

RV538 0_0402_5%

Pilot_05

+5VS_TS

1 2

DI1 RB751S40T1G_SOD523-2

+EDPVDD

EDP_HPD[16]

TOUCH_SCREEN_PD#[17]

W=60mils

1 2

@

LCD_TST_R

12

@

RV567 100K_0402_5%

USB20_P9_R USB20_N9_R

W=60mils

INV_PWM DISPOFF# EDP_HPD

EDP_AUXP_R EDP_AUXN_R

EDP_TXP0_R EDP_TXN0_R

EDP_TXP1_R EDP_TXN1_R

EDP_TXP2_R EDP_TXN2_R

EDP_TXP3_R EDP_TXN3_R

12

RV551 100K_0402_5%

EDP_HPD

CV576

8.2P_0402_50V8D

JEDP1

1

GND

2

BATT_WHITE_LED

3

BATT_YELLOW_LED

4

BREATH_WHITE_LED

5

VR_SRC

6

VR_SRC

7

VR_SRC

8

NC

9

DISP_ON/OFF#

10

PWM

11

CONNTST_GND

12

VR_GND

13

VR_GND

14

VR_GND

15

LCD_B_CLK+

16

LCD_B_CLK-

17

GND

18

LVDS_B2+

19

LVDS_B2-

20

LVDS_B1+

21

LVDS_B1-

22

LVDS_B0+

23

LVDS_B0-

24

GND

25

LVDS_A_CLK+

26

LVDS_A_CLK-

27

GND

28

LVDS_A2+

29

LVDS_A2-

30

LVDS_A1+

31

LVDS_A1-

32

LVDS_A0+

33

LVDS_A0-

34

EDID_DATA

35

EDID_CLK

36

BIST

37

V_EDID

38

LCD_VDD

39

LCD_VDD CONNTST40MGND1

ACES_59003-04006-001

CONN@

+EDPVDD

MGND6 MGND5 MGND4 MGND3 MGND2

10U_0603_6.3V6M

CV577

1

@

2

46 45 44 43 42 41

B+

QV11 SI3457BDV-T1-E3_TSOP6~D

12

RV535 1M_0402_5%

12

RV570 100K_0402_5%

13

D

QV2 L2N7002WT1G_SC-70-3

S

4 5

G

3

1

CZ43

0.1U_0402_10V6K

2

60mil

12

SIO_SLP_S3#[18,32,33,39,48,49,57]

CV583

8.2P_0402_50V8D

34

USB20_P12_RUSB20_P12

CV578 1U_0603_25V6

1

@

CV584 10U_0603_6.3V6M

2

G

D D

CCD +DMIC Conn.

C C

USB20_P12[19]

USB20_N12[19]

+3VS_CAM

EMC@

MCM1012B900F06BP_4P

1 2

LV22

1

2

1

CV582

0.1U_0402_10V6K

2

USB20_N12 USB20_N12_R

Pilot_06

DMIC_CLK_CAM DMIC_DATA_CAM

1 2

RZ41 33_0402_5%

1 2

RZ42 33_0402_5%

DMIC_CLK [37]

EC5205

6.8P_0402_50V8C

DMIC_DAT [37]

EC5206

6.8P_0402_50V8C

1

@

2

Layout Note: Reduce the stubs.

USB20_P12_R USB20_N12_R

B B

EMC@

2

1

3

DV12 PESD5V0U2BT_SOT23-3

Touch Screen

EMC@

MCM1012B900F06BP_4P

34

A A

USB20_P9[19]

USB20_N9[19]

1 2

LI1

5

USB20_P9_R

USB20_N9_R

Pilot_05

RZ26 0_0603_5%

1 2

USB20_P9_R

USB20_N9_R

+5VS_TS+5VS

@

Pilot_05

2

3

DI3

AZ5125-02S.R7G_SOT23-3

@

1

4

3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR D ISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

Compal Secret Data

2011/08/25 2012/07/25

Deciphered Date

2

Compal Electronics, Inc.

Title

eDP /TS conn.

Size Document Number Rev

LA-D991P

Date: Sheet of

1

34 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

+1.2V_RTM

CM837

CM823

1

D D

1

2

0.01U_0402_16V7K

Close Pin 11

2

0.1U_0402_10V6K

+1.2V_VCCPLL_OC +1.2V_RTM

A00.01

RM598 0_0603_5%

1 2

@

+1.2V_RTM

0.1U_0402_10V6K

CM10

1

2

CM839

1

2

0.1U_0402_10V6K

+1.2V_RTM

CM4

1

2

0.1U_0402_10V6K

+1.2V_RTM

0.1U_0402_10V6K

CM229

1

2

0.01U_0402_16V7K

1 2

IFPC_TX2_P[24] IFPC_TX2_N[24]

IFPC_TX1_P[24] IFPC_TX1_N[24]

IFPC_TX0_P[24]

CM3

1

2

0.01U_0402_16V7K

CM12

1

2

0.01U_0402_16V7K

IFPC_TX0_N[24] IFPC_CLK_P[24]

IFPC_CLK_N[24]

CV827 0.1U_0402_10V6K

1 2

CV828 0.1U_0402_10V6K

1 2

CV829 0.1U_0402_10V6K

1 2

CV830 0.1U_0402_10V6K

1 2

CV832 0.1U_0402_10V6K

1 2

CV831 0.1U_0402_10V6K

1 2

CV826 0.1U_0402_10V6K

1 2

CV825 0.1U_0402_10V6K

12

RM517

4.99K_0402_1%

1U_0402_6.3V6K

CM24

1

2

IFPC_TX2_CP IFPC_TX2_CN

IFPC_TX1_CP IFPC_TX1_CN

IFPC_TX0_CP IFPC_TX0_CN

IFPC_CLK_CP IFPC_CLK_CN

RTM_DCIN_ENB RTM_EQ RTM_I2C_ADDR

RTM_PDB RTM_RST# RTM_PRE

+1.2V_RTM

UM1

30

VDD12

6

VDD12

11

VDDA12

43

VDDRX12

46

VDDRX12

15

VDDTX12

18

VDDTX12

37

POWERSWITCH

38

IN_D2p

39

IN_D2n

41

IN_D1p

42

IN_D1n

44

IN_D0p

45

IN_D0n

47

IN_CKp

48

IN_CKn

3

DCIN_EN

5

EQ

31

I2C_ADDR

10

RSV1

25

NC

26

RSV2

36

REXT

4

PDB

35

RESETB

27

PRE

2

TESTMODEB

S IC PS8409QFN48GTR2-A1 QFN 48P REPEATER

VDD33 VDD33

OUT_D2p OUT_D2n

OUT_D1p OUT_D1n

OUT_D0p OUT_D0n

OUT_CKp OUT_CKn

SDA_SRC/AUXN

SCL_SRC/AUXP

SDA_SNK SCL_SNK

HPD_SRC HPD_SNK

HDMI_ID

HDMI_CEC

CEC_EN

CSCL CSDA

EPAD

Pilot_02

1 24

23 22

20 19

17 16

14 13

33 34 8 7

40 21

32 9 12

29 28

49

+3V_RTM

TMDS_T_TXCP TMDS_T_TXCN

IFPC_I2C_DAT_R IFPC_I2C_CLK_R DDC_DAT_HDMI DDC_CLK_HDMI

RTM_HDMI_ID

1 2

RM1 0_0402_5%@

TMDS_T_TX2P [36] TMDS_T_TX2N [36]

TMDS_T_TX1P [36] TMDS_T_TX1N [36]

TMDS_T_TX0P [36] TMDS_T_TX0N [36]

TMDS_T_TXCP [36] TMDS_T_TXCN [36]

1 2

RM2 0_0402_5%@

1 2

RM3 0_0402_5%@

DDC_DAT_HDMI [24,36] DDC_CLK_HDMI [24,36]

1 2

RM600 1K_0402_5%

HDMI_HPLUG [36]

HDMI_CEC [36]

GPU_HPD_RT [23]

CM838

1

2

Close Pin 6,30

C C

CM228

CM141

1

2

0.1U_0402_10V6K

4.7U_0603_6.3V6K

Close Pin 43,46

CM11

1

2

B B

0.1U_0402_10V6K

Close Pin 15,18

A00.01

RM599 0_0603_5%

1 2

TMDS_T_TXCP

TMDS_T_TXCN

IFPC_I2C_DAT [24] IFPC_I2C_CLK [24]

@

1

@

CM843

0.1U_0402_10V6K

2

+3VS+3V_RTM

IFPC_I2C_DAT_R IFPC_I2C_CLK_R

DDC_DAT_HDMI DDC_CLK_HDMI

1

2

Close Pin 24

Close Pin 1

1 2

RM582 47K_0402_5%@

1 2

RM583 47K_0402_5%@

1 2

RM578 2K_0402_1%

1 2

RM581 2K_0402_1%

+3V_RTM

CM840

0.1U_0402_10V6K

+3V_RTM

+VDISPLAY_VCC

CM841

1

2

1

2

+3V_RTM

0.01U_0402_16V7K

CM842

0.1U_0402_10V6K

+3V_RTM

A A

1 2

RM595 10K_0402_5%@

1 2

RM594 10K_0402_5%@

1 2

RM593 10K_0402_5%@

1 2

RM592 10K_0402_5%@

1 2

RM591 10K_0402_5%@

1 2

RM590 10K_0402_5%

1 2

RM584 4.7K_0402_5%

1 2

RM585 10K_0402_5%@

1 2

RM586 10K_0402_5%@

1 2

RM587 10K_0402_5%@

1 2

RM588 10K_0402_5%@

1 2

RM589 10K_0402_5%@

5

RTM_DCIN_ENB RTM_EQ RTM_I2C_ADDR RTM_PRE RTM_HDMI_ID

RTM_RST#

RTM_DCIN_ENB RTM_EQ RTM_I2C_ADDR RTM_PRE RTM_HDMI_ID RTM_PDB

Title

Retimer

Size Document Number Rev

LA-D991P 0.1(X00)

C

LA-D991P 0.1(X00)

C

LA-D991P 0.1(X00)

C

Date: Sheet of

4

3

2

Date: Sheet of

1

35 70Tuesday, November 08, 2016

Vinaﬁx.com

5

4

3

2

1

Place close to JHDMI1

1 2

RV621 0_0402_5%EMC@

D D

C C

TMDS_T_TXCP[35]

TMDS_T_TXCN[35]

TMDS_T_TX0P[35]

TMDS_T_TX0N[35]

TMDS_T_TX1P[35]

TMDS_T_TX1N[35]

TMDS_T_TX2P[35]

TMDS_T_TX2N[35]

TMDS_T_TXCP

TMDS_T_TXCN

TMDS_T_TX0P

TMDS_T_TX0N

TMDS_T_TX1P

TMDS_T_TX1N

TMDS_T_TX2P

TMDS_T_TX2N

LV24

@

1 2

HCM1012GH900BP_4P

1 2

RV622 0_0402_5%EMC@

1 2

RV623 0_0402_5%EMC@

LV25

@

1 2

HCM1012GH900BP_4P

1 2

RV624 0_0402_5%EMC@

1 2

RV625 0_0402_5%EMC@

LV26

@

1 2

HCM1012GH900BP_4P

1 2

RV626 0_0402_5%EMC@

1 2

RV627 0_0402_5%EMC@

LV27

@

1 2

HCM1012GH900BP_4P

1 2

RV628 0_0402_5%EMC@

TMDS_L_TXCP

34

TMDS_L_TXCN

TMDS_L_TX0P

34

TMDS_L_TX0N

TMDS_L_TX1P

34

TMDS_L_TX1N

TMDS_L_TX2P

34

TMDS_L_TX2N

Place between ESD and CM-Choke

TMDS_L_TXCP

TMDS_L_TXCN

TMDS_L_TX0N

TMDS_L_TX0P

TMDS_L_TX1N

TMDS_L_TX1P

TMDS_L_TX2N

TMDS_L_TX2P

RV554

150_0402_5%

RV557

150_0402_5%

RV562

150_0402_5%

RV565

150_0402_5%

Pilot_08

12

@

12

@

12

@

12

@

Pilot_07

DV4

@

TMDS_L_TX1N TMDS_L_TX1N TMDS_L_TX1P TMDS_L_TX1P TMDS_L_TX2N TMDS_L_TX2N

B B

TMDS_L_TX2P TMDS_L_TX2P TMDS_L_TXCN TMDS_L_TXCN

HDMI conn

1

2

4

5 3

3

8

AZ1045-04F_DFN2510P10E-10-9

9

10

8

9

7

6

65

TMDS_L_TX0P TMDS_L_TX0P TMDS_L_TX0N TMDS_L_TX0N TMDS_L_TXCP TMDS_L_TXCP

DV5

@

1

2 4 5 3

AZ1045-04F_DFN2510P10E-10-9

10

2

9

7

4

65

3

8

9 8 7 6

UV17

+5VS

1

IN

AP2330W-7_SC59-3

OUT

GND

3

2

For EMI Reserve

1 2

A A

CV599 0.1U_0402_25V6@

1 2

CV600 0.1U_0402_25V6@

1 2

CV601 0.1U_0402_25V6@

close to JHDMI

5

W=40mils

1

2

HDMI_HPLUG HDMI_Reserved HDMI_CEC

+VDISPLAY_VCC

0.1U_0402_10V6K CV598

+VDISPLAY_VCC

10U_0603_6.3V6M

CV597

1

2

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

ACON_HMR2E-AK120D

CONN@

GND GND GND GND

+3VS

SB000008E10

QV93 S TR METR3904W-G NPN SOT323-3

1

C

2

20 21 22 23

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

HDMI_HPD_PCH[20]

Compal Secret Data

Deciphered Date

2

B

E

3

12

RV612 100K_0402_5%

1 2

RV611 150K_0402_5%

HDMI_HPLUG

1

CV923

0.1U_0402_16V7K

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

HDMI

LA-D991P

1

36 70Wednesday, November 09, 2016

0.1(X00)

4

HDMI_HPLUG

DDC_DAT_HDMI DDC_CLK_HDMI HDMI_Reserved HDMI_CEC TMDS_L_TXCN

TMDS_L_TXCP TMDS_L_TX0N

TMDS_L_TX0P TMDS_L_TX1N

TMDS_L_TX1P TMDS_L_TX2N

TMDS_L_TX2P

HDMI_HPLUG[35]

DDC_DAT_HDMI[24,35] DDC_CLK_HDMI[24,35]

HDMI_CEC[35]

Vinaﬁx.com

Main Func = Audio

5

4

3

2

1

+1.8V_AVDD

1

2

Pilot_05

RA5 0_0402_5%

1 2

@

25mA

@

Pilot_05

1 2

RA1 0_0402_5%@

CA2

1

2

0.1U_0402_10V6K

Layout Note:

Close pin41

+1.8V_DVDD

1

CA3

0.1U_0402_10V6K

2

Close pin36

+1.8V_DVDD

4.7U_0603_6.3V6K CA9

1

CA8

2

Close pin9

0.1U_0402_10V6K

5V_PVDD trace width > 40mil.

CA14

CA13

CA11

CA12

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K 10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

Layout Note:

Close pin46

RA3

0_0603_5%

1 2

@

Pilot_05

+3VS To +1.8V_DVDD

1U_0402_6.3V6K

CA7

1

2

+1.8VS

Speaker trace width >40mil @ 2W4ohm speaker power

5

VOUT

4

NC

G9090-180T11U_SO T23-5

UA1

1

VIN

2

GND

3

EN

AUD_AGND AUD_AGND AUD_AGND

Layout Note:

EC_MUTE#[39,48]

+3V_DVDD

DMIC_DATA_R

DMIC_CLK[34]

22P_0402_50V8J

Close pin3

+3VS

12

RA2 10K_0402_5%

2

CA10

0.68U_0603_16V6K

1

CA22 10U_0603_6.3V6M CA63 10U_0603_6.3V6M

1 2

RA23 100K_0402_5%

1

CA62 10P_0402_25V8J

@

2

1

@

CA30

2

1 2 1 2

AUD_SPK_L+[38] AUD_SPK_L-[38] AUD_SPK_R-[38] AUD_SPK_R+[38]

@

DMIC_DAT[34]

HDA_SDOU T_AUDIO[18] HDA_BITCLK_AU DIO[18]

HDA_SDIN0_AUDIO[18]

HDA_SYNC_AU DIO[18]

1U_0402_6.3V6K

CA4

1

2

Close pin40

+5V_PVDD

Pilot_05

1 2

RA27 0 _0402_5%@

1 2

RA28 2 2_0402_5%

LINE1_VREFO_R[38] LINE1_VREFO_L[38]

AUD_HP1_JACK_L[38] AUD_HP1_JACK_R[38]

LDO2_CAP +1.8V_AVDD

RA29 RA31 RA32

2

CA20 1U_0402_6.3V6K

1

+1.8V_DVDD

37 38 39 40 41 42 43 44 45 46 47 48 49

+3V_DVDD

CA25

1 2 1 2 1 2

1U_0402_6.3V6K

HDA1

CBP AVSS2 LDO2-CAP AVDD2 PVDD1 SPK-OUT-L+ SPK-OUT-LSPK-OUT-RSPK-OUT-R+ PVDD2 PDB SPDIF-OUT/GPIO2 GND

ALC3246-CG-G P

4.7U_0603_6.3V6K

1

2

DMIC_DATA_R DMIC_CLK_R

Pilot_05

@

0_0402_5%

@

0_0402_5%

33_0402_5%

CA15

1 2

36

CA26

1

2

0.1U_0402_10V6K

CODEC_SD OUT_R CODEC_BITC LK_R HDA_CODE C_SDIN0 HDA_SYNC_AU DIO

CA16

2.2U_0402_6.3V6M

1

2

28

29

30

31

32

33

34

35

CBN

CPVEE

CPVDD

HPOUT-R/PORT-I-R

DVDD1GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3EAPD/DC DET4SDATA-OUT5BCLK6LDO3-CAP7SDATA-IN8DVDD-IO9SYNC

EAPD#

MIC2-VREFO

LINE1-VREFO-L

LINE1-VREFO-R

HPOUT-L/PORT-I-L

SPDIFO/FRONT_JD/JD3/GPIO3

CA274.7U_0603_6.3V6K

1

2

VREF

CA280.1U_0402_10V6K

1

2

4.7U_0603_6.3V6K

12

RA11 100K_0402_5%

CA19

1

2

25

26

27

AVSS1

AVDD1

LDO1-CAP

LINE2_L

LINE2_R

LINE1_L

LINE1_R

5/3D3VSTB

MIC-CAP

MIC2_R/SLEEVE

MIC2_L/RING2

MONO-OUT

MIC2/LINE2_JD/JD2

HP/LINE1_JD/JD1

I2C_SCL

I2C_SDA

10

12

11

+3V_DVDD

MIC2_VREFO [38]

AUD_AGND

+5V_AVDD

AUD_AGND

24 23 22 21 20 19 18 17 16 15 14 13

1 2

CA21

1U_0402_6.3V6K

AUD_SENSE_A

SPKR[18]

BEEP[48]

CA17

1

2

0.1U_0402_10V6K

AUD_AGND

RA72

1 2

1.2K_0201_1%

LINE1_L [38] LINE1_R [38]

1 2

CA23 10U_0603_6.3V6M

SLEEVE [38] RING2 [38]

RA19 0 _0402_5%@

1 2

RA22

200K_0402_5%

AUD_AGND

1 2

Pilot_05

AUD_SENSE

Layout Note:

Place close to Pin 13

3

2

12

RA17 0 _0402_5%@ RA18 0 _0402_5%@

D1

BAT54C-7-F_S OT23-3

RA8

0_0603_5%

1 2

CA18 4.7U_0603_6.3V6K

@

1

moat

Pilot_05

Layout Note:

2

Place close to Pin 26

RA71 1K_0402_1%

moat

1 2 1 2

AUD_AGND

Layout Note:

AUD_PC_BEEP

AUD_SENSE [38]

1

AUD_PC_BEEP _C

+5V_PVDD+5V_AVDD

moat

Pilot_05

1 2

RA9 0_0402_5%@

1 2

RA12 0_0402_5%@

1 2

RA13 0_0402_5%@

1 2

RA14 0_0402_5%@

1 2

RA15 0_0402_5%@

AUD_AGND

1 2

@

AUD_AGND

+RTCVCC

RA16 0_0805_5%

Layout Note:

Tied at point only under Codec or near the Codec

LINE2_L [39]

+3VALW

Pilot_05

Width>40mil, to improve Headpohone Crosstalk noise Change it to sharp will be better. Add 2 vias (>0.5A) when trace layer change.

AUD_SENSE_A

0.1U_0402_10V6K

12

RA33 10K_0402_5%

AUD_AGND

CA29

1 2

1

CA24

0.1U_0402_10V6K

2

AUD_PC_BEEP

moat

1 2

RA30 1K_0402_5%

RA24

moat

12

100K_0402_5%

+3V_DVDD

+1.8V_AVDD

CA1

D D

C C

B B

4.7U_0603_6.3V6K

AUD_AGND

+3VS +3V_ DVDD

1.5A

+5VS +5V_PVDD

RA7 0_0805_5%

1 2

RA10 0_0805_5%

1 2

+3V_DVDD

HDA_BITCLK_AU DIO DMIC_CLKDMIC_DAT

A A

RA35

4.7_0402_5%

1 2

1

CA33 33P_0402_50V8J

2

EMC@

5

@

2

1 2

1

@

10_0201_5% RA36

CA34

0.01U_0201_16V7

@

2

1 2

CA35

0.01U_0201_16V7

1

@

10_0201_5% RA37

DMIC_DAT DMIC_CLK

Azalia I/F EMI

2

3

TVNST52302AB0_S OT523-3

DA1

EMC@

1

4

@

HDA_SDOU T_AUDIO HDA_BITCLK_AU DIO

.1U_0402_16V7K

CA31

CA32

1

@

2

3

RA70

12

EAPD#

100K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EAPD# [39]

Compal Secret Data

2015/07/15 2016/07/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

Date: Sheet of

Compal Electronics, Inc.

CODEC ALC3234/3246

LA-D991P

1

37 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

Main Func = Audio

4

3

2

1

Layout Note:

Speaker trace width >40mil @ 2W4ohm speaker power

1 2

D D

C C

MIC2_VREFO[37]

RING2[37]

AUD_HP1_JACK_L[37]

LINE1_L[37]

LINE1_VREFO_L[37] AUD_HP1_JACK_R[37]

LINE1_R[37]

LINE1_VREFO_R[37]

SLEEVE[37]

B B

1 2

CA64 10U_0603_6.3V6M~D

1 2

CA65 10U_0603_6.3V6M~D

Layout Note:

Close to HDA27

LINE1-L_C

LINE1-L_R

AUD_SPK_R+[37] AUD_SPK_R-[37] AUD_SPK_L+[37] AUD_SPK_L-[37]

RA43 RA42

1 2 1 2

2.2K_0402_5%

1 2

RA44 10_0402_1%

1 2

RA48 1K_0402_5%

1 2

RA46 4.7K_0402_5%

1 2

RA49 10_0402_1%

1 2

RA51 1K_0402_5%

1 2

RA53 4.7K_0402_5%

LA23 BLM15PX181SN1D_2P

1 2

LA24 BLM15PX181SN1D_2P

1 2

LA25 BLM15PX181SN1D_2P

1 2

LA26 BLM15PX181SN1D_2P

1

CA36

2

1000P_0402_50V7K

AUD_HP1_JACK_L1

AUD_HP1_JACK_R1

1

CA37

CA38

2

1000P_0402_50V7K

1 2 1 2

CA39

EMC@

2

1000P_0402_50V7K

LA19 BLM15AX700SN1D_2P LA20 BLM15AX700SN1D_2P

LA21 BLM15AX700SN1D_2P LA22 BLM15AX700SN1D_2P

RA54 10K_0402_5%

12

@

2

3

1

AUD_SPK_R+_C AUD_SPK_R-_C AUD_SPK_L+_C AUD_SPK_L-_C

DA2

EMC@

AZ5125-02S.R7G_SOT23-3

CA40 100P_0402_50V8J

CA41 100P_0402_50V8J

1

2

Speaker

JSPK1

1

2

3

4

5

SWF_BSNR[39] SWF_BSNL[39]

2

3

DA3

1

AZ5125-02S.R7G_SOT23-3

7

5

G1

6

8

6

G2

ACES_50224-00601-001

CONN@

CONN Pin Pin1 Pin2 Pin3 Pin4

Net name SPK_R+ SPK_RSPK_L+ SPK_L-

Universal Jack (Moved to I/O Board)

JHP1

AUD_AGND

3 1

5 6 2 4 7

SINGA_2SJ3108-007111F

CONN@

RING2_R

AUD_PORTA_L_R_B

JACK_PLUG

AUD_PORTA_R_R_B

SLEEVE_R

CA42 100P_0402_50V8J

RA55 10K_0402_5%

12

1

@

2

CA43 100P_0402_50V8J

1

2

AUD_AGNDAUD_AGND

CA60 680P_0402_50V7K

1

EMC@

2

CA61 680P_0402_50V7K

1

EMC@

2

AZ5123-01F-R7GR_DFN1006P2X2

DA6

1 2

EMC@

2

3

2

3

moat

DA5

1

EMC@

AZ5125-02S.R7G_SOT23-3

DA4

1

EMC@

AZ5125-02S.R7G_SOT23-3

JACK_PLUG

A A

Security Classification

2015/07/15 2016/07/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2015/07/15 2016/07/31

3

Compal Secret Data

Deciphered Date

2

1 2

RA56 0_0402_5%@

Pilot_05

Title

SPKR/JACK

Size Document Number Rev

LA-D991P

Date: Sheet of

10 mils10 mils

Compal Electronics, Inc.

AUD_SENSE [37]

38 70Tuesday, November 08, 2016

1

0.1(X00)

Vinaﬁx.com

5

Subwoofer AMP

4

3

2

1

6 2

1

2

3

1

0.1U_0402_25V6

2

D2

CA67

B+_AMP

60mil

+AMP

1

CA52

2

1000P_0402_50V7K

+5VS

1

SDZ_MUTE#

Pin 31/ 32 need to differential connect to codec pin 24 and close coedc AGND

Close IC

1

CA53

CA57

2

0.1U_0402_25V6

10U_0603_25V6M

1 2

RA74 100K_0402_5%

1

LINE2_L[37]

2

1U_0402_6.3V6K

SWF_BSNR[38] SWF_BSNL [38]

CA44

1 2

680P_0402_50V7K

RA57

1 2

330P_0402_50V7K

10_0402_5%

Close IC Close IC Close IC Close IC

CA48

1 2

0.22U_0603_50V7K

SDZ_MUTE#

1U_0402_6.3V6K

CD91

CD92

1

2

12

RA73 665_0402_1%

AUD_AGND

Layout Note:

CA46

1 2

12

LA1

4.7UH +-20% DFE252012F

CA49

1 2

0.22U_0603_50V7K

21

22

23

24

25

26

27

28

29

30

31

32

33

GND

OUTPR

BSPR

PVCC

SDZ

FAULTZ

INPR

INNR

EPAD

Close IC

BSNR

OUTNR

ALC1302

Plimit1GVDD2Gain/SLV3GND4INNL5INPL6MUTE7PBTL/BTL

GVDD

1

CD93

2

1U_0402_6.3V6K

UA2

GND20GND

CD941U_0402_6.3V6K

1

2

CA50

1 2

0.22U_0603_50V7K

18

19

BSNL

1

CD951U_0402_6.3V6K

2

OUTNL

8

CA45

1 2

680P_0402_50V7K

12

LA2

4.7UH +-20% DFE252012F

CA47

1 2

330P_0402_50V7K

0.22U_0603_50V7K

17

GND

16

OUTPL

15

BSPL

14

PVCC

13

PVCC

12

AVCC

11

Sync

10

AM0

9

AM1

BTL/PBTL Setting

Gain/SLV Setting

CA51

1 2

RA58

1 2

10_0402_5%

12

RA65

45.3K_0402_1%@

0_0402_5%

12

RA67

GVDD

Close IC

1

2

10K_0402_5%

12

RA63

0_0402_5%

12

RA66

@

+AMP+5VS

1

CA54

2

0.1U_0402_25V6

1000P_0402_50V7K

CA56

CA55

2

10U_0603_25V6M

AM Avoidance Setting

12

RA60

@

0_0402_5%

12

RA61

@

0_0402_5%

10K_0402_5%

12

RA64

10K_0402_5%

12

RA62

Mode Gain RA65(ohm) RA67(ohm)

Master

Slave

20dB 26dB 32dB 36dB 20dB 26dB 32dB 36dB

NC 75K 65K 55K 45K 35K 25K 0

0 15K 25K 35K 45K 55K 65K NC

B+

D D

60mil

B+_AMP

12

RA79 100K_0402_5%

13

D

2

G

S

12

CA66 1U_0603_25V6

SIO_SLP_S3#[18,32,33,34,48,49,57]

C C

QA2 SI3457BDV-T1-E3_TSOP6~D

S

4 5

RA80 1M_0402_5%

QA1 L2N7002WT1G_SC-70-3

G

3

1 2

@

RA75 0_0805_5%

1 2

@

RA76 0_0805_5%

D

Pilot_05

EC_MUTE#[37,48]

EAPD#[37]

B B

A A

BAT54A-7-F_SOT23-3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

3

2013/07/04 2013/10/28

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

P3-SMART AMP

P3-SMART AMP LA-D991P

LA-D991P

1

39 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

Connector for Keyboard

JKB1

30

GND

29

GND

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

ACES_50699-03041-P01_30P CONN@

32 31

D

13

CE1

0.1U_0402_10V7K~D

KB_DET#[20]

1 2

D D

+3VS

RE120

100K_0402_5%

CAPS_LED#[48]

C C

1 2

+3VS

G

2

13

D

S

L2N7002WT1G_SC-70-3

QE3

100K_0402_5%

+5VS

RE1

1 2

+5VS

KSI[0..7][48]

KSO[0..16][48]

QE4 DMG2301U-7_SOT23-3

S

G

2

1

@

2

Connector for Keyboard Backlight

Fuse for Backlight

B B

+5VS

20mil

0.5A_13.2V_NANOSMDC050F-13.2-2

1

CE5 1U_0402_6.3V6K

2

F1

2 1

+5VS_KBL

1

CE6 10U_0603_6.3V6M~D

2

1 2

KB_BL_DET[16]

RE3 47K_0402_5%

RE4

100K_0402_1%

1 2

KB_LED_PWM#

RE2

240_0402_1%

+5VS_KBL

KSI7 KSI6 KSI4 KSI2 KSI5 KSI1 KSI3 KSI0

KSO5 KSO4 KSO7 KSO6 KSO8 KSO3 KSO1 KSO2

KSO0 KSO12 KSO16 KSO15 KSO13 KSO14

KSO9 KSO11 KSO10 CAP_LED

+5VS_KBL

JBL1

1

2

3

4

5

GND1

6

GND2

E-T_6913K-Y04N-00L

CONN@

LED Maximum Current is 273mA

1

CE4 1U_0402_6.3V6K

2

13

D

KB_LED_PWM[48]

A A

5

4

KB_LED_PWM

Current limited 20mA

2

G

QE5

L2N7002WT1G_SC-70-3

S

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/06/02 2013/10/28

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

P03-KB Controller

P03-KB Controller LA-D991P

LA-D991P

1

40 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

+3VALW

Touch pad

1

3VS_TP

2 3

+3VS

2

34

I2C1_SDA_TP_C I2C1_SCK_TP_C

CE10 22P_0402_50V8J

Pilot_05

RE93

1 2

12

@

100K_0402_5% RZ33

QE19A

61

I2C1_SDA_TP_C

I2C1_SCK_TP_C

1 2

22P_0402_50V8J

RZ32 100K_0402_5%

D D

TP_PW_EN#[48]

I2C1_SDA_TP[20]

I2C1_SCK_TP[20]

C C

PTP_INT#[17,48]

B B

A A

1 2

+3VS_TP +3VS_TP

2

G

1 3

PTP_INT#_R

D

S

QE13 L2N7002WT1G_SC-70-3

+3VS_TP

12

PTP_DIS#[48]

DAT_TP_SIO[48]

CLK_TP_SIO[48]

UE4

5

IN

4

EN

SY6288D20AAC_SOT23-5

2N7002EDW 2N SOT-363-6

12

RE87 100K_0402_5%

RE123 100K_0402_5%

PTP_INT#_R

DAT_TP_SIO CLK_TP_SIO

CE9

22P_0402_50V8J

OUT GND OCB

2N7002EDW 2N SOT-363-6

5

QE19B

1

2

@

CE80

@

0_0603_5%@

RE7

RE9

1

@

2

+3VS_TP

1

CE2

0.1U_0402_10V6K

2

2.4K_0402_5%

I2C1_SDA_TP_C

2.4K_0402_5%

I2C1_SCK_TP_C

DE4

1

V I/O Ground2V BUS

3

V I/O

IP4223CZ6_SO6-6

EMC@

+3VS_TP

CT79

22P_0402_50V8J

+3VS_TP

6

8 7 6 5 4 3 2 1

5 4

JTP

8 7 6 5 4 3 2 1

CONN@

DAT_TP_SIO

CLK_TP_SIO

G2 G1

V I/O

ACES_51524-0080N-001

+3VS_TP

10 9

RTC Battery non- Charge Function

+CHGRTC

3

+RTCBATT

RC11 1K_0402_5%

1 2

2

DC2 BAT54CW-7-F_SOT323-3~D

1

CC27 1U_0402_6.3V6K

2

W=20mils

+RTCVCC

+CHGRTC

RTC Battery

W=20mils

PWM FAN

+3VS +5VS +5VS

12

RE81 100K_0402_5%

FAN1_TACH[48]

FAN2_TACH[48]

DE7 RB751S40T1G_SOD523-2

1

CE99

0.01U_0402_16V7K

2

+3VS +5VS +5VS

12

RE83 100K_0402_5%

DE9 RB751S40T1G_SOD523-2

1

CE100

0.01U_0402_16V7K

2

12

RE82

10K_0402_5%

12

RE84

10K_0402_5%

12

Pilot_05

RE104 0_0603_5%@

Pilot_05

RE105 0_0603_5%@

FAN1_PWM[48]

1 2

FAN2_PWM[48]

1 2

PJP1304

2

JUMP_43X39

@

+RTCBATT

112

+3VS

12

@

+3VS

12

@

10K_0402_5%

+RTCBATT

+3VLP

RE121

S

L2N7002LT1G_SOT23-3

RE122

L2N7002LT1G_SOT23-3

JRTC

1

2

3

GND

4

GND

ACES_50273-0020N-001

CONN@

+5VS+3VS

12

RE100

@

5VS_FAN1

5VS_FAN2

+5VS+3VS

12

@

10K_0402_5%

JFAN1

1

2

3

4

5

GND1

6

GND2

E-T_3806K-F04N-03R

CONN@

RE101

JFAN2

1

2

3

4

5

GND1

6

GND2

E-T_3806K-F04N-03R

CONN@

G

2

13

D

Q12

G

2

13

D

S

Q13

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

FAN/TP/KB/PWR SW

LA-D991P

1

0.1(X00)

41 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

Main Func : Fan/Thermal

D D

4

3

2

1

CPU TOP side

+3VALW

12

RT1

7.87K_0402_1%

VCIN0_PH[48]

12

1

100K +-1% 0402 B25/50 4250K

HT1

CT80

0.01U_0402_16V7K

2

Fintek thermal sensor placed TOP near between GPU & CPU

+3VS

1

CT81

0.1U_0201_10V6K

2

C C

BOTTOM DIMM Close UT1

1

C

MMBT3904WH_SOT323-3

QT1

E

3

2

B

REMOTE1+

12

CT83 2200P_0402_25V7K

@

REMOTE1- REMOTE1-

2200P_0402_25V7K

BOTTOM SSD

1

12

MMBT3904WH_SOT323-3

QT3

C

E

3

2

B

CT84 2200P_0402_25V7K

@

REMOTE2-

2200P_0402_25V7K

CT82

CT85

UT1

1

2

1

2

REMOTE1+

REMOTE2+ REMOTE2-

1

VCC

2

DP1

3

DN1

4

DP2

5

DN2

F75303M_MSOP10

SCL SDA

ALERT#

THERM#

GND

10 9 8 7 6

Address 1001_101xb

REMOTE1,2 (+/-) : Trace width/space:10/10 mil

2nd source SA000029210-->EMC1403-2-AIZL-TR

Trace length:<8"

B B

+3VS

12

RT3 10K_0402_5%

@

THM_SML1_CLK THM_SML1_DATA

MAINPWONREMOTE2+

10K_0402_5%

THM_SML1_DATA

THM_SML1_CLK

RT4

+3VS

12

10K_0402_5%

RT5

+3VS

QT2A

2

2N7002EDW 2N SOT-363-6

1 2

RT6 0_0402_5%@

1 2

RT7 0_0402_5%@

61

5

QT2B

2N7002EDW 2N SOT-363-6

GPU_THM_SMBDAT [18,23,48]

34

GPU_THM_SMBCLK [18,23,48]

A A

Security Classification

2014/04/01 2015/04/30

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/04/01 2015/04/30

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Thermal Sensor

Thermal Sensor LA-D991P

LA-D991P

1

0.1(X00)

42 70Tuesday, November 08, 2016

Vinaﬁx.com

5

M.2 Slot-A Key-A (WLAN + BT)

4

3

2

1

WLAN_WIGIG60GHZ_DIS#_R

RM22 0_0603_5%

1 2

D D

@

+3VS_WLAN+3VS

BT_RADIO_DIS#_R

RB751S40T1G_SOD523-2

12

WLAN_WIGIG60GHZ_DIS# [20]

BT_RADIO_DIS# [20]

DN1

DN2

Pilot_05

CONCR_213AAAA32FA

JNGFF1

1

USB20_P4_R USB20_N4_R

LPC_LFRAME#[19,48]

1 2

PCIE_PTX_WLANRX_P6[19]

PCIE_PTX_WLANRX_N6[19]

PCIE_PRX_WLANTX_P6[19]

PCIE_PRX_WLANTX_N6[19]

C C

CLK_PCIE_WLAN[17] CLK_PCIE_WLAN#[17]

WLAN_CLK_REQ#[17] PCIE_WAKE#[18,47,48]

CN21 0.1U_0402_10V7K

1 2

CN20 0.1U_0402_10V7K

PCIE_WAKE#

PCIE_PTX_WLANRX_RE_P6 PCIE_PTX_WLANRX_RE_N6

Reserve for EMI

+3VS_WLAN+3VS_WLAN

1

CN8

@

.1U_0402_16V7K

2

1

CN9

@

1000P_0402_50V7K

2

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

GND

CONN@

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42 44 46 48 50 52 54 56 58 60 62 64 66

68

SUSCLK_R

BT_RADIO_DIS#_R WLAN_WIGIG60GHZ_DIS#_R

42 44 46 48 50 52 54 56 58 60 62 64 66

GND

LPC_LAD2 [19,48] LPC_LAD0 [19,48] LPC_LAD1 [19,48]LPC_LAD3[19,48]

CLK_PCI_LPDEBUG [19,48]

E51_TX2

E51_TX1

1 2

RN1 0_0402_5%@

+3VS_WLAN

22U_0603_6.3V6M

.1U_0402_16V7K

CN6

CN7

1

2

Close to JNGFF

+3VS_WLAN

.1U_0402_16V7K

22U_0603_6.3V6M

CN2

1

CN1

2

Close to JNGFF

SUSCLK [18,44,48]

PCH_PLTRST#_EC [17,23,44,47,48]

EMC@

B B

USB20_P4[19]

USB20_N4[19]

MCM1012B900F06BP_4P

1 2

LN1

34

USB20_P4_R

USB20_N4_R

Reserve for NGFF Debug Card

+3VS_WLAN+3VALW

1 2

RN2 0_0402_5%@

1 2

A A

HOST_DEBUG_TX[48]

RN3 0_0402_5%@

1 2

RN5 0_0402_5%@

Pilot_05

5

12

@

E51_TX1

E51_TX2

RN4 100K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

NGFF

Size Document Number Rev

C

LA-D991P

Date: Sheet of

1

43 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

M.2 Slot-C Key-M (SSD)

+3.3VDX_SSD

D D

+3.3VDX_SSD+3VS

PJP36

@

2

112

JUMP_43X39

Pilot_05

PCIe SSD

SATA SSD

C C

PCIE_PRX_SSDTX_N12[16] PCIE_PRX_SSDTX_P12[16]

PCIE_PTX_SSDRX_N12[16] PCIE_PTX_SSDRX_P12[16]

PCIE_PRX_SSDTX_N11[16] PCIE_PRX_SSDTX_P11[16]

PCIE_PTX_SSDRX_N11[16] PCIE_PTX_SSDRX_P11[16]

PCIE_PRX_SSDTX_N10[16] PCIE_PRX_SSDTX_P10[16]

PCIE_PTX_SSDRX_N10[16] PCIE_PTX_SSDRX_P10[16]

SATA_PRX_SSDTX_P0A[16] SATA_PRX_SSDTX_N0A[16]

SATA_PTX_SSDRX_N0A[16] SATA_PTX_SSDRX_P0A[16]

CLK_PCIE_SSD#[17] CLK_PCIE_SSD[17]

mCARD_PCIE#_SATA[16]

1 2

CD37 0.22U_0402_10V6K

1 2

CD42 0.22U_0402_10V6K

1 2

CD43 0.22U_0402_10V6K

1 2

CD44 0.22U_0402_10V6K

1 2

CD45 0.22U_0402_10V6K

1 2

CD46 0.22U_0402_10V6K

1 2

CD53 0.22U_0402_10V6K

1 2

CD51 0.22U_0402_10V6K

Pilot_05

1 2

RD58 0_0402_5%@

1 2

RD10 10K_0402_5%@

PCIE_PTX_SSDRX_N12_C PCIE_PTX_SSDRX_P12_C

PCIE_PTX_SSDRX_N11_C PCIE_PTX_SSDRX_P11_C

PCIE_PTX_SSDRX_N10_C PCIE_PTX_SSDRX_P10_C

SATA_PTX_SSDRX_N0A_C SATA_PTX_SSDRX_P0A_C

JNGFF2

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

67

69

71

73

75

76

GND

LOTES_APCI0096-P002A

CONN@

CD36

2

4

6

8

10

SSD_LED#

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

SSD_PCIE_WAKE#

54

56

58

68

70

72

74

77

GND

SSD_LED# [49]

12

RD7 10K_0402_5%@

1 2

RD59 0_0402_5%@

Pilot_05

1 2

RD8 10K_0402_5%

1 2

RD9 0_0402_5%@

4.7U_0603_6.3V6K

1

2

+3.3VDX_SSD

mSATA_DEVSLP [19]

PCH_PLTRST#_EC [17,23,43,47,48] SSD_CLK_REQ# [17]

+3.3VDX_SSD

SUSCLK [18,43,48]

+3.3VDX_SSD

0.1U_0402_10V6K CD38

RF Reserved.

EMC@

0.01U_0402_16V7K CD39

1

2

EMC@

CD41

15P_0402_50V8J

CD40

47P_0402_50V8J

1

2

HDD CONN

+5VS_HDD+5VS

1 2

@

0_0805_5%

B B

Place near HDD CONN (JHDD1)

+5VS_HDD

A A

1

CS12 1000P_0402_50V7K

2

5

1

CS13

0.1U_0402_10V6K

2

RZ34

Pilot_05

SATA_PTX_DRX_P1B[16] SATA_PTX_DRX_N1B[16]

SATA_PRX_DTX_N1B[16] SATA_PRX_DTX_P1B[16]

1

CS14 1U_0402_6.3V6K

2

HDD_DEVSLP[19]

SATA_PTX_DRX_P1B SATA_PTX_DRX_N1B

SATA_PRX_DTX_N1B SATA_PRX_DTX_P1B

1

CS15 10U_0603_6.3V6M

2

4

1 2

CS28 0.01U_0402_16V7K

1 2

CS27 0.01U_0402_16V7K

1 2

CS25 0.01U_0402_16V7K

1 2

CS26 0.01U_0402_16V7K

1 2

RD62 0_0402_5%@

SATA_PTX_DRX_P1B_RC SATA_PTX_DRX_N1B_RC

SATA_PRX_DTX_N1B_RC SATA_PRX_DTX_P1B_RC

HDD_DEVSLP_R

+5VS_HDD

JHDD1

12

14

11

GND

11

13

10

GND

10

9

8

7

6

5

4

3

2

1

ACES_50554-01201-001

CONN@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

SSD

LA-D991P

SSD

44 70Tuesday, November 08, 2016

1

44 70Tuesday, November 08, 2016

Size Document Number Rev

C

Date: Sheet of

0.1(X00)

Vinaﬁx.com

5

USB Powershare

4

3

2

1

Device Control Pins

CTL1 CTL2 CTL3 ILIM_SEL

D D

0 1 1 X

1 1 1 0

1 1 1 1

+3VALW

1 2

RI30 100K_0402_5%

1 2

RI9 100K_0402_5%

1 2

RI10 100K_0402_5%

1 2

RI51 1M_0402_5%

C C

Flow Line Condition

DCP AUTO

SDP

CDP

ILIM_SEL_R USB_R_CTL USB_PWR_SHR_EN_R#

USB_POWERSHARE_VBUS_EN

Suspend mode

S0 mode

CTL1 = 0 : Enable Power Share DCP mode in Suspend mode

CTL1 = 1 : Disable Power Share in Suspend mode (For Support USB wake)

ILIM_SEL = 0 : SDP mode (0.9A by ILIM_LO setting)

ILIM_SEL = 1 : CDP mode (STATUS# trigger by ILIM_HI =2.2A)

USB20_N2[19] USB20_P2[19]

USB_OC1#[19]

USB_POWERSHARE_VBUS_EN[48]

USB_PWR_SHR_EN_R#[48]

USB_POWERSHARE_VBUS_EN

+5VALW

12

CI230.1U_0402_10V6K

ILIM_SEL_R

USB_PWR_SHR_EN_R#

USB_R_CTL

USB3.0 / USB2.0 Port1

+5V_CHGUSB_2

US1

1

IN

2

DM_OUT

3

DP_OUT

13

FAULT#

4

ILIM_SEL

5

EN

6

CTL1

7

CTL2

8

CTL3

TPS2544RTER_WQFN16_3X3

OUT

DP_IN DM_IN

ILIM_LO

ILIM_HI

GND

GNDP

12

10 11

15 16

9

NC

14 17

USBP2_D+ USBP2_D-

ILIM_LO1 ILIM_HI1

1 2 1 2

RI49 22.1K_0402_1% RI45 22.1K_0402_1%

USBP2_D+ [46] USBP2_D- [46]

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

USB Powershare

USB Powershare LA-D991P

LA-D991P

1

0.1(X00)

45 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

D D

C C

USB3TP1[19]

USB3TN1[19]

+5VALW

1

CI24 1U_0402_6.3V6K

2

USB20_N1[19]

USB20_P1[19]

1 2

CI20 0.1U_0402_10V6K

1 2

CI16 0.1U_0402_10V6K

USB20_N1 USBP1_R_D-

USB20_P1

USB3RP1[19]

USB3RN1[19]

USB_EN#[48,49]

USB3T_P1

USB3T_N1

LI2

1 2

MCM1012B900F06BP_4P

EMC@

RI37 0_0402_5%@

RI38 0_0402_5%@

RI39 0_0402_5%@

RI40 0_0402_5%@

5 4

Active Low

SY6288D20AAC_SOT23-5

1 2

US2

1

OUT

IN

2

GND

EN

3

OCB

34

USBP1_R_D+

USB3TP1_D+

USB3TN1_D-

USB3RP1_D+

USB3RN1_D-

Pilot_05

+5V_CHGUSB_1

USB_OC0# [19]

DI9

EMC@

USB3RN1_D-

USB3TN1_D- USB3TN1_DUSB3TP1_D+

1

2

4

5 3

3

8

AZ1045-04F_DFN2510P10E-10-9

9

USB3RN1_D-

10

8

USB3RP1_D+USB3RP1_D+

9

7

6

USB3TP1_D+

65

Place close to JUSB1

USB3.0 / USB2.0 Port1

+5V_CHGUSB_1

47U_0805_6.3V6M

10U_0603_6.3V6M

0.1U_0402_10V6K CI19

CI18

1

CI17

2

1

2

3

DI10

AZ5125-02S.R7G_SOT23-3

EMC@

1

USBP1_R_DUSBP1_R_D+

USB3RN1_DUSB3RP1_D+

USB3TN1_DUSB3TP1_D+

JUSB1

1

VBUS

2

D-

3

D+

4

GND

5

StdA-SSRX-

6

StdA-SSRX+

7

GND-DRAIN

8

StdA-SSTX-

9

StdA-SSTX+

LOTES_AUSB0015-P002A

CONN@

GND GND GND GND

10 11 12 13

B B

USBP2_D-[45]

USBP2_D+[45]

1 2

USB3TP2[19]

USB3TN2[19]

A A

CI10 0.1U_0402_10V6K

1 2

CI9 0.1U_0402_10V6K

5

USBP2_D- USBP2_R_D-

USBP2_D+

USB3T_P2

RI41 0_0402_5%@

USB3T_N2

RI42 0_0402_5%@

USB3RP2[19]

USB3RN2[19]

RI43 0_0402_5%@

RI44 0_0402_5%@

Pilot_05,06

LI5

1 2

MCM1012B900F06BP_4P

EMC@

1 2

Pilot_05,06

USB3.0 / USB2.0 Port2 (Power share)

34

USBP2_R_D+

DI7

EMC@

USB3RN2_D-

USB3TP2_D+

USB3TN2_D- USB3TP2_D+

USB3RP2_D+

USB3RN2_D-

4

USB3TN2_DUSB3TP2_D+

1

2

4

5 3

3

8

AZ1045-04F_DFN2510P10E-10-9

Place close to JUSB2

9

USB3RN2_D-

10

8

USB3RP2_D+USB3RP2_D+

9

7

USB3TN2_D-

7

6

USB3TP2_D+

65

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

+5V_CHGUSB_2

47U_0805_6.3V6M

1

CI11

2

Compal Secret Data

10U_0603_6.3V6M

CI12

1

2

Deciphered Date

JUSB2

1

VBUS

USBP2_R_D-

0.1U_0402_10V6K CI13

2

3

DI8

AZ5125-02S.R7G_SOT23-3

EMC@

1

2

USBP2_R_D+

Title

Size Document Number Rev

Date: Sheet of

USB3RN2_DUSB3RP2_D+

USB3TN2_D-

Compal Electronics, Inc.

USB conn.

USB conn. LA-D991P

LA-D991P

2

D-

3

D+

4

GND

5

StdA-SSRX-

6

StdA-SSRX+

7

GND-DRAIN

8

StdA-SSTX-

9

StdA-SSTX+

LOTES_AUSB0015-P002A

CONN@

1

10

GND

11

GND

12

GND

13

GND

0.1(X00)

46 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

1

2

3

4

5

12

+3VALW

+LAN_VDD

+LAN_IO

W=40mils

+LAN_IO

CL15

+3VALW

CL39

1U_0402_6.3V6K

12

A A

LAN_EN[48]

These caps close to Pin 17,18/ 13,14

PCIE_PRX_LANTX_P5[19] PCIE_PRX_LANTX_N5[19]

PCIE_PTX_LANRX_P5[19] PCIE_PTX_LANRX_N5[19]

LAN_DISABLE#_R[18,47]

PCIE_WAKE#[18,43,48]

B B

+3VS

12

RL33 1K_0402_5%

ISOLATEB

12

RL30 15K_0402_1%

+LAN_IO

LAN_DISABLE#_R[18,47]

+LAN_VDD

CL30 0.1U_0402_10V6K CL31 0.1U_0402_10V6K

CL47 0.1U_0402_10V6K CL48 0.1U_0402_10V6K

1 2

RL1 0_0402_5%@

1 2

RL2 0_0402_5%@

1 2

RL42 1K_0402_5%

@

1 2

RL43 0_0402_5%@

RL27 100K_0402_5%

1 2

1 2 1 2

PCH_PLTRST#_EC[17,23,43,44,48]

W=40mils

Pilot_05

1

CL24

0.1U_0402_10V6K

2

PCIE_PRX_LANTX_P3_C PCIE_PRX_LANTX_N3_C

PCIE_PTX_LANRX_P5_C PCIE_PTX_LANRX_N5_C

+LAN_VDD

+LAN_IO +LAN_VDD

5

IN

4

EN

SY6288C20AAC_SOT23-5

ISOLATEB LAN_WAKE#_R

MDI2+ MDI2MDI3+ MDI3-

CL42

0.1U_0402_10V7K

UL2

1

OUT

2

GND

3

OC

17 18

13 14

19 20 21 26

3 6 7

9 10 11 22 24

1

@

2

UL1

HSOP HSON

HSIP HSIN

AVDD10 AVDD10 AVDD33

PERSTB

DVDD33

ISOLATEB

REFCLK_P REFCLK_N

LANWAKEB

CLKREQB

GPO

CKXTAL1

CKXTAL2 AVDD10 MDIP2 MDIN2 MDIP3 MDIN3 AVDD33 DVDD10 REGOUT

RTL8111H-CG_QFN32_4X4

W=40mils

1 2

RL41 100K_0402_5%

1

MDI0+

MDIP0

4

MDI1+

MDIP1

2

MDI0-

MDIN0

5

MDI1-

MDIN1

8 30 32 23

15 16

12

LAN_CLKREQ#

28

XTLO

29

XTLI

27

LED0

25

LED1

31

RL31 2.49K_0402_1%

RSET

33

GND

T944PAD~D@ T95 PAD~D@

+LAN_IO rising time : >1ms and <100ms

1.5A

1

@

CL43

CL19

2

0.1U_0402_10V6K

1

@

CL44

2

4.7U_0402_6.3V6M

These caps close to Pin 11,32

+LAN_IO

1

CL21

2

CLK_PCIE_LAN [17] CLK_PCIE_LAN# [17]

LAN_CLKREQ# [17]

XTLI

2

XTAL0

GND0

4

XTAL1

GND1

25MHZ_10PF_7V25000014

XTLO

W=20mils

+LAN_VDD

1

CL34

0.1U_0402_10V6K

1

CL35

2

1U_0402_6.3V6K

0.1U_0402_10V6K

These caps close to Pin 22

CL36

1 2

10P_0402_25V8J

YL2

1 3

CL37

1 2

10P_0402_25V8J

+LAN_VDD

CL20

These caps close to Pin 3,8,30These caps close to Pin 23

1

CL22

2

0.1U_0402_10V6K

1

CL32

2

0.1U_0402_10V6K

TL2

1

C C

0.01U_0402_16V7K

D D

1

+V_DAC

MDI3MDI3+

+V_DAC

MDI2MDI2+

+V_DAC

MDI1MDI1+

+V_DAC

MDI0-

1

MDI0+

CL41

2

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2

6

TD2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+ TD4-12MX4-

MCT1

MX1+

MX1-

MCT2

MX2+

MX2-

MCT3

MX3+

MX3-

MCT4

MX4+

MHPC_NS892407

24 23 22 21 20 19 18 17 16 15 14 13

MDO3MDO3+

MDO2MDO2+

MDO1MDO1+

MDO0MDO0+

MCT0

Place close to TCT pin

MCT1

MCT2

MCT3

2

1 2

RL19 75_0402_5%

1 2

RL20 75_0402_5%

1 2

RL39 75_0402_5%

1 2

RL40 75_0402_5%

1

EMC@

CL33 10P_1206_2KV8J

2

MDO3MDO3+ MDO1MDO2MDO2+ MDO1+ MDO0MDO0+

3

JLAN

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

SANTA_130452-0E1

CONN@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

10

SHLD2

9

SHLD1

Compal Secret Data

2013/08/01 2014/07/31

Compal Secret Data

Deciphered Date

4

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

LAN RTL8111GUS-CG

LAN RTL8111GUS-CG LA-D991P

LA-D991P

5

47 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

45

KSI0

3

KSI1

2

KSI2

1

KSI3

45

KSI4

3

KSI5

2

KSI6

1

KSI7

KSO0 KSO1 KSO2 KSO3

KSO4 KSO5 KSO6 KSO7

KSO10 KSO11 KSO12 KSO13

KSO8 KSO15 KSO14 KSO16

12

KSO9

12

USB_EN#

12

BAT1_LED#

12

BAT2_LED#

CE78

4.7P_0402_50V8C

1 2

EMC@

EC_SPI_SI_R[17]

EC_SPI_SO_R[17]

EC_SPI_CS#_R[17]

1 2

Pilot_05

+3VALW_EC

RE60

49.9_0402_1%

1 2

JTAG_TDI

3

JTAG_TMS

4

JTAG_CLK

5

JTAG_TDO

6

MSCLK

7

MSDATA

8 9 10

11 12

5

RE61 0_0402_5%

@

5

CLK_TP_SIO DAT_TP_SIO

RE10

10_0402_5%

1 2

CLK_PCI_LPC_MEC[19]

RE40 15_0402_1% RE41 15_0402_1% RE42 15_0402_1%

RE59 0_0402_5%@

Pilot_05

RE62 0_0402_5%@

SUSCLK[18,43,44]

PTP_INT#_EC

1 2

RE109 0_0402_5%@

1 2

RE110 0_0402_5%@

1 2

RE111 0_0402_5%@

1 2

RE112 0_0402_5%@

+3VS

5

UE6

P

H_PROCHOT#[9,54,55,63]

SN74LVC1G06DCKR_SC70-5

47P_0402_50V8J

EMC@

1 2 1 2 1 2

1 2

1

CE86

2

KSI[0..7][40] KSO[0..16][40]

USB_POWERSHARE_VBUS_EN[45]

Pilot_05

RE106 0_0402_5%@

MEC_XTAL1 MEC_XTAL1_R

RE66 0_0402_5%

Y4A

1

PCH_PLTRST#_EC[17,23,43,44,47]

SATA_LED_EN[49]

ME_SUS_PWR_ACK[18]

1 2

2

G3NC

CAPS_LED#[40]

CLK_TP_SIO[41]

DAT_TP_SIO[41]

SIO_PWRBTN#[18] PCH_RSMRST#[18]

LPC_LAD0[19,43] LPC_LAD1[19,43] LPC_LAD2[19,43] LPC_LAD3[19,43] LPC_LFRAME#[19,43]

CLKRUN#[18]

IRQ_SERIRQ[19]

SIO_EXT_SMI#[17]

TP_PW_EN#[41]

SIO_RCIN#[19]

SIO_EXT_SCI#[20]

SIO_SLP_S4#[18,32,33,49,69]

LAN_EN[47]

USB_EN#[46,49]

IMVP_VR_ON[18,33]

12

@

Debug Connector

+3VALW_EC

10K_0402_5%

12

Pilot_05

ICSP_CLK ICSP_CLR

T3 PAD~D@

ICSP_DAT

12

RE63

0.1U_0402_10V6K

1

2

1 2

1

@

2

10K_0402_5%

12

RE64

RPE2 10K_0804_8P4R_5%

+3VALW

6 7 8

RPE3 10K_0804_8P4R_5%

6 7 8

1 8 2 7

D D

C C

B B

A A

3 6 4 5

RPE4 100K_0804_8P4R_5%

1 8 2 7 3 6 4 5

RPE5 100K_0804_8P4R_5%

1 8 2 7 3 6 4 5

RPE6 100K_0804_8P4R_5%

1 8 2 7 3 6 4 5

RPE7

100K_0804_8P4R_5% RE30 100K_0402_5% RE29 100K_0402_5% RE39 100K_0402_5% RE113 100K_0402_5%

+3VS_TP

1 2

RE24 4.7K_0402_5%

1 2

RE55 4.7K_0402_5%

EC_SPI_CLK_R[17]

ALL_SYS_PWRGD[18,56]

PTP_INT#[17,41]

JDEG1

1 2 3 4 5 6 7 8 9

10

GND1

GND2

ACES_50506-01041-P01

CONN@

4

+3VALW

RE12

0_0603_5%

1 2

CE85

@

Pilot_05

H_PROCHOT_EC

RE27 100K_0402_5%

+RTCVCC

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

PCH_RSMRST# LPC_LAD0

LPC_LAD1 LPC_LAD2 LPC_LAD3 LPC_LFRAME# PCH_PLTRST#_EC

EC_SPI_CLK EC_SPI_SI EC_SPI_SO

EC_SPI_CS#

PTP_INT#_EC

RUNPWROK

MEC_XTAL2

32 KHz Clock

Y1

@

1 2

20ppm / 9pF ESR <50kohm (MAX)

100K_0402_5%

12

RE65@

HOST_DEBUG_TX

4

MEC_XTAL2MEC_XTAL1

32.768KHZ_9PF_X1A000141000200

CE102 10P_0402_25V8J

10K_0402_5%

@

RE118

+3VALW_EC

0.1U_0402_10V6K

10U_0603_6.3V6M

1

CE89

2

1000P_0402_50V7K

CE62

1

2

1

Pilot_05

RE16

0_0603_5%

1 2

+RTCVCC_VBAT

@

0.1U_0402_10V6K

UE1

2

GPIO027/KSO00/PVT_IO1

14

GPIO015/KSO01/PVT_nCS

15

GPIO016/KSO02/PVT_SCLK

16

GPIO017/KSO03/PVT_IO0

37

GPIO045/BCM_nINT1/KSO04

38

GPIO046/BCM_DAT1/KSO05

39

GPIO047/BCM_CLK1/KSO06

50

GPIO025/KSO07/PVT_IO2

46

GPIO055/PWM2/KSO08/PVT_IO3

68

GPIO102/KSO09/CR_ST RAP

72

GPIO106/KSO10

74

GPIO110/KSO11

75

GPIO111/KSO12

76

GPIO112/PS2_CLK1A/KSO13

77

GPIO113/PS2_DAT1A/KSO14

86

GPIO125/KSO15

92

GPIO132/KSO16

93

GPIO140/KSO17

98

GPIO143/KSI0/nDTR

99

GPIO144/KSI1/nDCD

6

GPIO005/SMB00_DATA/SMB00_DATA18/KSI2

7

GPIO006/SMB00_CLK/SMB00_CLK18/KSI3

104

GPIO147/KSI4/nDSR

105

GPIO150/KSI5/nRI

107

GPIO151/KSI6/nRTS

108

GPIO152/KSI7/nCTS

78

GPIO114/PS2_CLK0

79

GPIO115/PS2_DAT0

52

GPIO026/PS2_CLK1B

88

GPIO127/PS2_DAT1B

59

GPIO040/LAD0

60

GPIO041/LAD1

61

GPIO042/LAD2

62

GPIO043/LAD3

58

GPIO044/nLFRAME

56

GPIO064/nLRESET

57

GPIO034/PCI_CLK

63

GPIO067/nCLKRUN

55

GPIO063/SER_IRQ

10

GPIO011/nSMI/nEMI_INT

49

GPIO060/KBRST

53

GPIO061/nLPCPD

66

GPIO100/nEC_SCI

32

GPIO126/SHD_SCLK

28

GPIO133/SHD_IO0

29

GPIO134/SHD_IO1

30

GPIO135/SHD_IO2

31

GPIO136/SHD_IO3

27

GPIO123/SHD_nCS

67

GPIO101/SPI_CLK

69

GPIO103/SPI_IO0

71

GPIO105/SPI_IO1

42

GPIO052/SPI_IO2

33

GPIO062/SPI_IO3

3

GPIO001/SPI_nCS/32KHZ_OUT

13

nRESET_IN/GPIO014

48

GPIO057/VCC_PWRGD

73

GPIO107/nRESET_OUT

125

XTAL2

123

XTAL1

CE73

1

2

Pilot_05

1

CE101 10P_0402_25V8J

@

2

JLPDE1

1

2

3

4

5

6

7

8

9

10

11

GND1

12

GND2

ACES_50506-01041-P01

CONN@

EMC@

1000P_0402_50V7K

2

1

2

CE64

CE63

43

103

122

VBAT

GPIO007/SMB01_DATA/SMB01_DATA18

GPIO010/SMB01_CLK/SMB01_CLK18

GPIO012/SMB02_DATA/SMB02_DATA18

GPIO013/SMB02_CLK/SMB02_CLK18

GPIO130/SMB03_DATA/SMB03_DATA18

GPIO131/SMB03_CLK/SMB03_CLK18

GPIO141/SMB04_DATA/SMB04_DATA18

GPIO142/SMB04_CLK/SMB04_CLK18

MEC1404

VSS17VSS51AVSS

VSS_VBAT

VSS

VSS64VSS

84

124

100

RE67

0_0603_5%

1 2

@

Close UE1

EC_AGND

+3VS

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 LPC_LFRAME# PCH_PLTRST#_EC

0.1U_0402_10V6K CE65

+3VALW_EC

0.1U_0402_10V6K

0.1U_0402_10V6K CE66

1

2

1 2

Pilot_05

VTR5VTR19VTR

VTR65VTR82VTR

GPIO157/LED0/TST_CLK_OUT

GPIO116/TFDP_DATA/UART_RX

GPIO117/TFDP_CLK/UART_TX

GPIO033/PECI_DAT/SB_TSI_DAT

GPIO166/CMP_VREF1/UART_CLK

VR_CAP

MEC1404-NU-TR_VTQFP128_14X14

18

112

EC_AGND

VR_CAP

CLK_PCI_LPDEBUG [19,43]

VTR_33_18

GPIO050/TACH0 GPIO051/TACH1

GPIO053/PWM0 GPIO054/PWM1

GPIO056/PWM3

GPIO030/BCM_nINT0/PW M4

GPIO031/BCM_DAT0/PW M5 GPIO032/BCM_CLK0/PWM6

GPIO002/PWM7

GPIO156/LED1 GPIO104/LED2

GPIO035/SB-TSI_CLK

VREF_CPU

GPIO145/ICSP_CLOCK

GPIO146/ICSP_DATA

ICSP_MCLR

BGPO/GPIO004

SYSPWR_PRES/GPIO003

VCI_OUT/GPIO036

nVCI_IN1/GPIO162 nVCI_IN0/GPIO163

VCI_OVRD_IN/GPIO164

GPIO160/DAC_0 GPIO161/DAC_1

DAC_VREF

GPIO124/CMP_VOUT0

GPIO020/CMP_VIN0

GPIO165/CMP_VREF0

GPIO120/CMP_VOUT1

GPIO021/CMP_VIN1

GPIO024/CMP_STRAP0

GPIO023/ADC6/A20M

GPIO022/ADC5 GPIO153/ADC4 GPIO154/ADC3 GPIO155/ADC2 GPIO122/ADC1 GPIO121/ADC0

ADC_VREF

T4931@

CE103

1 2

1U_0603_25V6

ESR <100m ohms

Close UE1

3

CE67

RE15

0_0603_5%

@

3

2

RE125 For SKU ID Select

0.1U_0402_10V6K

0.1U_0402_10V6K CE69

CE68

1

2

54

0.1U_0402_10V6K

8

PBAT_CHG_SMBDAT

9

PBAT_CHG_SMBCLK

11

GPU_THM_SMBDAT

12

GPU_THM_SMBCLK

89 91

L_BKLT_EN_EC

96

LID_CLOSE#

97 40

FAN1_TACH

41

FAN2_TACH

44 45

47

FAN1_PWM

34

FAN2_PWM

35 36 4

1

BAT1_LED#

106

BAT2_LED#

70

BREATH_LED#_EC

80

ME_FWP_EC

81

HOST_DEBUG_TX

90

PTP_DIS#_R PTP_DIS#

94

PECI_MEC1404

95

VREF_CPU

101

ICSP_CLK

102

ICSP_DAT

87

ICSP_CLR

119

EC_MUTE#_R EC_MUTE#

120 121 126

USBCHG_DET#

127

POWER_SW_IN#

128 23

SIO_SLP_S3#

24 22

85

CMP_VOUT0

20

CMP_VIN0

25

VCREF0

83

H_PROCHOT_EC

21 26

118

CMP_STRAP0

117 116 109 110

I_ADP_R

111

BOARD_ID

113 114

SKU_ID

115

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10K

SKL 14''

13.7K

SKL 15''

17.8K

KBL 14''

22.1K

KBL15''

CE71

1 2

RE57 0_0402_5%@

RE17 43_0402_1%

RE58 0_0402_5%@

1 2

@

RE73 0_0402_5%

RE28 10K_0402_5%

RE36 300_0402_5%

1 2

I_ADP_R

1

CE87 2200P_0402_25V7K

2

EC_AGND

Issued Date

10K_0402_1%

13.7K_0402_1%

17.8K_0402_1%

22.1K_0402_1%

PBAT_CHG_SMBDAT [53,55] PBAT_CHG_SMBCLK [53,55] GPU_THM_SMBDAT [18,23,42]

GPU_THM_SMBCLK [18,23,42] SYS_PWROK [18] L_BKLT_EN_EC [16]

FAN1_TACH [41] FAN2_TACH [41]

KB_LED_PWM [40] BEEP [37]

FAN1_PWM [41] FAN2_PWM [41] EC_WAKE# [18]

PS_ID [53] PCIE_WAKE# [18,43,47]

BAT1_LED# [49] BAT2_LED# [49] BREATH_LED#_EC [49]

ME_FWP_EC [18]

HOST_DEBUG_TX [43]

1 2 1 2

Pilot_05

1 2

ALWON [56]

ACAV_IN [18,54,55] SIO_SLP_S3# [18,32,33,34,39,49,57]

DGPU_PWRGD_EC [17]

CMP_VOUT0 [23,56]

GPU_PWR_LEVEL [23] LCD_TST [34]

1 2

PANEL_BKEN_EC [34] SIO_EXT_WAKE# [20] USB_PWR_SHR_EN_R# [45]

RE52 100K_0402_5%

VCIN0_PH [42]

+3VALW_EC

0.1U_0402_10V6K CE81

1

2

EC_AGND

2015/07/15 2016/07/31

SKU ID

SKU_ID

1

CE76 100P_0402_50V8J

2

PECI_EC

1 2

Pilot_05

+3VALW

LCD_VCC_TEST_EN [32]

I_ADP [54,55]

Compal Secret Data

+3VALW_EC

12

Ra

0.1U_0402_10V6K

@

CE104

1

Rb

@

2

1 2

EC_AGND

PBAT_PRES# [53,54,55]

PTP_DIS# [41]

EC_MUTE# [37,39]

+RTCVCC

+3VALW_EC

0.1U_0402_10V6K CE79

1

2

Deciphered Date

2

RE125 10K_0402_1%@

RE124 100K_0402_1%

PECI_EC

VREF_CPU

CE77

0.1U_0402_10V6K

Pilot_05

RE20 1K_0402_5%

100K_0402_5%

12

RE22

VCREF0

1

2

0.1U_0402_10V6K

RE13 For SKL Board ID Select

RE13 For KBL Board ID Select

12

1 2

1

2

1 2

+3VALW

12

RE34 10K_0402_1%

12

CE91

RE35 10K_0402_1%

10K

EVT

13.7K

DVT1

17.8K

DVT2

22.1K

Pilot

13.7KEVT

17.8K

DVT1

22.1K

DVT2 Pilot 27K

PECI_EC [9,16]

DE8 AZ5125-01H.R7G_SOD523-2

@

RE116 0_0402_5%

+1VALW

@

Pilot_05

+3VLP

POWER_SW_IN#

Title

Size Document Number Rev

Date: Sheet of

10K_0402_1%

13.7K_0402_1%

17.8K_0402_1%

22.1K_0402_1% 27K_0402_1%

32.4K_0402_1%

37.4K_0402_1%

49.9K_0402_1%

57.6K_0402_1%

64.9K_0402_1%

73.2K_0402_1%

82.5K_0402_1%

93.1K_0402_1% 100K_0402_1% 107K_0402_1% 120K_0402_1% 137K_0402_1% 154K_0402_1% 200K_0402_1% 232K_0402_1%

PBAT_CHG_SMBDAT PBAT_CHG_SMBCLK GPU_THM_SMBDAT GPU_THM_SMBCLK PTP_INT#_EC BREATH_LED#_EC

IMVP_VR_ON ME_FWP_EC L_BKLT_EN_EC

+3VALW

100K_0402_5%

12

RE25

LID_CLOSE#

+RTCVCC

100K_0402_5%

12

1 2

0.047U_0402_16V4Z CE8

12

@

RE31

1 2

RE47 10K_0402_5%

1U_0402_6.3V6K

CE12

CMP_VIN0 CMP_VOUT0

PCH_PLTRST#_EC

SIO_SLP_S3#

IMVP_VR_ON

ACAV_IN

Close to UE1 each pin

Compal Electronics, Inc.

EC MEC1404

EC MEC1404 LA-D991P

LA-D991P

1

Board ID

+3VALW_EC

Ra

BOARD_ID

0.1U_0402_10V6K

CE98

1

Rb

2

EC_AGND

1 2

RE43 4.7K_0402_5%

1 2

RE44 4.7K_0402_5%

1 2

RE45 2.2K_0402_5%

1 2

RE46 2.2K_0402_5%

1 2

RE53 100K_0402_5%

1 2

RE119 100K_0402_5%

1 2

@

RE23 10K_0402_5%

1 2

@

RE21 1K_0402_5%

12

RE114 100K_0402_5%

RE68 0_0402_5%

@

Pilot_05

POWER_SW#_MB [49]

100K_0402_5%

1 2

@

RE33 100K_0402_5%

1 2

CE72 0.047U_0402_10V7K~D

EMC@

1 2

CE74 0.1U_0402_10V6K

@

1 2

CE82 1000P_0402_50V7K

@

12

CE84 100P_0402_50V8J

48 70Tuesday, November 08, 2016

1

48 70Tuesday, November 08, 2016

12

RE13 27K_0402_1%~D

Pilot_04

RE14 100K_0402_1%

1 2

+3VALW_EC

LID_CL_SIO# [49]

+3VALW

12

RE38

0.1(X00)

Vinaﬁx.com

5

LED Board Connector

4

3

2

1

I/O & APS & UART CONN

I/O CONN

+5VALW - Trace width : 20mil

+5VALW

D D

BAT1_LED#[48]

C C

PCH_SATA_LED#[16] SSD_LED#[44]

SATA_LED_EN[48]

1 2

@

RH502

0_0402_5%

12

RH504 100K_0402_5%

34

QE20B

5

2N7002EDW 2N SOT-363-6

+3VS

12

RE108 10K_0402_5%

61

QE21A

2

2N7002EDW 2N SOT-363-6

61

QE20A

2

2N7002EDW 2N SOT-363-6

LED1

34

QE21B

5

2N7002EDW 2N SOT-363-6

34

QE23B

2N7002EDW 2N SOT-363-6

+5VALW

5

JLED

4

3

LED1 LED2

QE23A

2N7002EDW 2N SOT-363-6

+5VALW

12

61

3

2

1

E-T_6915K-Q04N-00L

CONN@

RH505 100K_0402_5%

2

G2 G1

6 5

BAT2_LED# [48]

UART CONN

UART2_TXD[20] UART2_RXD[20]

APS CONN

+5VALW

JUART

1

2

3

4

5

GND

6

GND

CVILU_CI1804M1VRA-NH

CONN@

JAPS

+3VALW

SIO_SLP_S3#[18,32,33,34,39,48,57]

+3VALW

SIO_SLP_S5#[18] SIO_SLP_S4#[18,32,33,48,69] SIO_SLP_A#[18]

+3VALW

PCH_RTCRST#[18]

POWER_SW#_MB[48,49]

SYS_RESET#[18]

SIO_SLP_S0#[18]

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

GND

20

GND

CONN@

ACES_50506-01841-P01

+5VALW

CZ107

USB20_P7[19] USB20_N7[19]

USB20_P3[19] USB20_N3[19]

USB3TP3[19] USB3TN3[19]

USB3RP3[19] USB3RN3[19]

USB_EN#[46,48] USB_OC2#[19] LID_CL_SIO#[48]

+3VALW +3VS

CZ104

1

2

USB20_P7 USB20_N7

USB_EN# USB_OC2# LID_CL_SIO#

1

2

1U_0402_6.3V6K

CZ105

47U_0805_6.3V6M

JIO1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

31

29

GND

29

32

3030GND

ACES_88194-3041

0.1U_0402_10V6K

CONN@

CZ106

1

2

Pilot_05

TO PWR BOARD

+5VALW

12

RH506 100K_0402_5%

B B

61

BREATH_LED#_EC[48]

2

2N7002EDW 2N SOT-363-6

QE24A

BREATH_LED

34

QE24B

5

POWER_SW#_MB[48,49]

+5VALW

BREATH_LED

JPW

1

2

3

4

5

GND

6

GND

ACES_51601-0040M-P01

CONN@

Screw Hole

CPU x 4 GPU x 2

H1

@

H_3P7

@

H_3P7

H2

@

H_3P7

1

H4

@

H3

H_3P7

1

H5

@

H_3P2

1

NGFF x 2

@

H_3P2

@

H_2P8

@

H_3P3

@

H_2P1N

@

H_2P4X2P1N

1

@

H20

H_2P5

1

H40

1

H55

1

H6

1

H23

H_2P5

H_3P0

H12

@

H_2P8

1

H56

@

1

H57

@

1

H13

@

H_2P5

1

H_2P8

1

H19

@

H17

H_2P8

1

H11

@

H10

Power Button & LED (Reserve)

FD1

FD2

FIDUCAL@

+5VALW

SW5

Debug@

3

1

5

POWER_SW#_MB [48,49]

A A

4

2

SKRBAAE010_4P

BREATH_LED

Debug@

4

LED4

HT-F196BP5_WHITE

LED3

HT-F196BP5_WHITE

RW4

1 2

21

300_0402_5%

RW3

1 2

21

300_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

FIDUCIAL@

1

2011/08/25 2012/07/25

FD4

FD3

FIDUCIAL@

FIDUCAL@

1

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

TPM/BTB conn.

TPM/BTB conn. LA-D991P

LA-D991P

1

0.1(X00)

49 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

MODEL NAME : PCB NO :

D D

LA-D993P

BBV00/ BBV10

4

Bom Structure

Bom Structure Bom Structure

3

2

1

GPUCPUPCB PCH

UH1

I7@

UH2

R1@

UV1

ZZZ

R1@

14G0@

PCB 1QT LA-D993P REV0 M/B KBL

KBL-H_SR32Q

UH1

KBL-H_SR32S

PCH-SR30W

I5@

N17P-G0-A1

UV1

N17P-G1-A1

15G1@

Pilot_01

C C

PRST

X7668431L52 : S4G@ X7668431L53 : M4G@

UV6

K4G80325FB-HC28

S4G@

UV8

K4G80325FB-HC28

S4G@

B B

UV9

K4G80325FB-HC28

S4G@

UV7

K4G80325FB-HC28

S4G@

RV152

S4G@

100K_0402_5%

SD028100380

RV153

S4G@

100K_0402_5%

SD028100380

RV154

S4G@

100K_0402_5%

SD028100380

Micron 4GSamsung 4G

UV6

MT51J256M32HF-70:A

M4G@

UV7

MT51J256M32HF-70:A

M4G@

UV9

MT51J256M32HF-70:A

M4G@

UV8

MT51J256M32HF-70:A

M4G@

RV146

M4G@

100K_0402_5%

SD028100380

RV153

M4G@

100K_0402_5%

SD028100380

RV154

M4G@

100K_0402_5%

SD028100380

Hynix 4G

UV6

H5GC8H24MJR-R0C

H4G@

UV7

H5GC8H24MJR-R0C

H4G@

X7668431L51 : H4G@

UV8

H5GC8H24MJR-R0C

H4G@

UV9

H5GC8H24MJR-R0C

H4G@

RV152

H4G@

100K_0402_5%

SD028100380

RV147

H4G@

100K_0402_5%

SD028100380

RV154

H4G@

100K_0402_5%

SD028100380

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/04/10 2014/05/01

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

NOTE

NOTE LA-D991P

LA-D991P

1

50 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

D D

C C

4

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

3

Page 2

Page 2Version Change List ( P. I. R. List )

Page 2Page 2

2

1

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/04/10 2014/05/01

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

NOTE

NOTE LA-D991P

LA-D991P

1

51 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

Page 56

Page 57

Page 58

Page 59

Page 60

Page 61

Page 62

Page 64

+5VALW

+3VALW

+1.2V_DDR

+0.6VS

+1VALW

+VCCIO

+1.0VS_GFX

+1.35VS_VGA

+1.8V_GFX_AON

+VCC_CORE

DC IN

Page 53

D D

C C

VIN

CHARGER BQ24780

Battery 56Whr 4S1P for 14' 74Whr 3S2P for 15'

Page 55

B+

+3VALW TDC:4.8A +5VALW TDC:7.7A TPS51285B (Module)

+1.2V TDC:5.1A +0.6VS TDC:0.7A SY8210

+1VALW TDC:4A SY8286 (Module)

VCCIO_0.95V TDC: 3.85A SY8286 (Module)

+1.0VS_GFX TDC: 0.8A SY8286 (Module)

+1.35VS_VGA TDC: 11A APW8828 (Module)

+1.8V_GFX_AON TDC: 1.6A SY8286 (Module)

+VCC_CORE TDC: 50A ISL95829 (Module)

+VCC_GT TDC: 25A ISL95829 (Module)

B B

+VCC_SA TDC: 10A ISL95829 (Module)

N17P-GX GDDR5_50W GPU_CORE TDC: 45A RT8816A

N17P-GX GDDR5_50W GPU_CORE_VDDS TDC: 13A RT8816A

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/08/25 2012/07/25

3

Compal Secret Data

+2.5V_MEM TDC:0.63A RT9059GSP_SO8 (LDO)

Deciphered Date

2

Page 65

Page 67

Page 68

Page 69

Title

Power Block Diagram

Size Document Number Rev

LA-D993P

Date: Sheet of

+VCCGT

+VCCSA

+GPU_CORE

+GPU_CORE_VDDS

+2.5V_MEM

Compal Electronics, Inc.

52 70Tuesday, November 08, 2016

1

0.1(X00)

Vinaﬁx.com

A

B

C

D

CONN@

ACES_50290-00701-001

7 6 5

VBATT

12

PC109

100P_0402_50V8J

EMC@

12 13

4 3 2 1

JADP10

12

PC110

EMC@

0.01UF_0402_25V7K

JBAT10

1 2 3 4 5 6 7 8 9

10

G

11

G

ACES_50288-01171-001

CONN@

1 1

2 2

3 3

SMART Battery:

SMART Battery:SMART Battery:

4 4

01.BAT1+

01.BAT1+01.BAT1+

02.BAT2+

02.BAT2+02.BAT2+

03.BAT3+

03.BAT3+03.BAT3+

04.CLK_SMB

04.CLK_SMB04.CLK_SMB

05.DAT_SMB

05.DAT_SMB05.DAT_SMB

06.BATT_PRS

06.BATT_PRS06.BATT_PRS

07.SYS_PRS

07.SYS_PRS07.SYS_PRS

08.Battery Voltage

08.Battery Voltage08.Battery Voltage

09.GND1

09.GND109.GND1

10.GND2

10.GND210.GND2

11.GND3

11.GND311.GND3

+DC_IN

33_0402_5%

PSID

-DC_IN

12

PL105

PL104

@EMC@

HCB2012KF-121T50_0805

1 2

12

PC108

EMC@

0.1U_0402_25V6

place near connector

EMC@

PL107

HCB2012KF-121T50_0805

1 2

EMC@

PL108

HCB2012KF-121T50_0805

1

BATT++

2 3 4

CLK_SMB

5

DAT_SMB

6

BATT_PRS#

7 8 9 10 11

12

Battery 56Whr 4S1P for 14' 74Whr 3S2P for 15'

A

PR114

PC111

EMC@

12

PC100

@EMC@

12

PD100

EMC@

AZ5125-01H.R7G_SOD523-2

12

PC112

100P_0402_50V8J

1000P_0402_50V7K

EMC@

PR108

100_0402_1%

1 2

PR109

100_0402_1%

1 2

PR111

100_0402_1%

1 2

BLM15AG102SN1D_2P

1

2

Smart Adapter circuit (39.1)

0.1U_0402_25V6

EMC@

1 2

PD101

3

EMC@

TVNST52302AB0_SOT523-3

PL106

PC101

@EMC@

0.1U_0402_25V6

12

PR103 100K_0402_1%

PSID-1

12

PR105 15K_0402_1%

Battery connector

1

PD102

2

3

EMC@

TVNST52302AB0_SOT523-3

PBAT_CHG_SMBCLK [48,55]

PBAT_CHG_SMBDAT [48,55]

PBAT_PRES# [48,54,55]

PR112

10K_0402_1%

1 2

B

+3VALW

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PC102

0.1U_0402_25V6

@EMC@

FDV301N-G_SOT23-3

12

PC103

EMC@

1000P_0402_50V7K

@

PR100

0_0402_5%

1 2

PQ100

1 3

D

G

2

PSID-2

C

2

PQ101

B

MMBT3904WH_SOT323-3

E

3 1

For Camera LS

2011/08/25 2012/07/25

HCB2012KF-121T50_0805

PC104

HCB2012KF-121T50_0805

EMC@

100P_0402_50V8J

HCB2012KF-121T50_0805

S

3.3V_CAM_EN#[18,34]

EMC@

PL100

1 2 1 2

EMC@

PL101

EMC@

PL102

1 2

EMC@

PL103

Pilot.02

PR102

@

0_0402_5%

1 2

PR104

10K_0402_1%

1 2

@

0_0402_5%

1 2

Pilot.02

1M_0402_1%

Compal Secret Data

Deciphered Date

C

12

+5VALW

PR113

PR115

12

PC106

PC105

EMC@

1000P_0402_50V7K

+3VALW

100K_0402_1%

12

VIN

12

PC107

EMC@

100P_0402_50V8J

12

PR101

2.2K_0402_1%

+3VS

PR110

5

15P_0402_50V8J

PS_ID [48]

B+

1M_0402_5%

12

VSB_N_002

34

PQ103B 2N7002EDW_SOT363-6

footprint

2N7002DW-7-F_SOT363-6

Rds= 12.8mo(typ) 17(max)mo .1.885mW@3W backlight

PQ102

AON7409_DFN8-5 1 2 3 5

12

PR106

2

12

PC113

0.22U_0603_25V7K

VSB_N_001

12

PR107 680K_0402_1%

VSB_N_003

61

PQ103A 2N7002EDW_SOT363-6

footprint

2N7002DW-7-F_SOT363-6

Title

PWR_DCIN / BATT CONN

Size Document Number Rev

LA-D993P

Date: Sheet of

4

PC114

EMC@

Vgs(th)_max_2.7V

Compal Electronics, Inc.

D

0.1U_0402_25V6

B+_CAM

12

0.1(X00)

53 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

When CMPIN> Vref(2.3V/1.3V) CMPOUT=floating

4

3

2

1

I_ADP[48,55]

D D

CMPIN[55]

CMPIN

GPU50@

6.49K_0402_1%

PR200

10K_0402_1%

PR201

12

PR201 6.49K11.5K

12

PR201

GPU40@

11.5K_0402_1%

Pilot.02

PR215

@

13

2

G

0_0402_5%

1 2

D

PQ201

L2N7002WT1G 1N SC-70-3

S

REGN_CHG

PR205

10K_0402_1%

CMPOUT[55]

C C

PR207

12.4K_0402_1%

12

REGN=6V

PR206

160K_0402_1%

1 2

PC202

0.022U_0402_25V7K

12

SD034115280

AC 90W AC130W

H_PROCHOT# [9,48,54,55,63]

ACIN=ACOK

VIN

PR203

1M_0402_1%

1 2

PR213

1M_0402_1%

Pilot.02

PR216

61

2

@

0_0402_5%

1 2

PQ200A 2N7002EDW_SOT363-6

footprint

2N7002DW-7-F_SOT363-6

H_PROCHOT# [9,48,54,55,63]

+3VALW

12

PR202

10K_0402_5%

PC200

0.1U_0402_25V6

34

5

12

1 2

PR204

100K_0402_1%

PQ200B

2N7002EDW_SOT363-6

footprint

2N7002DW-7-F_SOT363-6

1 2

Ref ENG0012879 Circuit-2

ENG0012879 Circuit-1 Delay Adapter OC H_PROCHOT# 2ms while Hybrid power transition

HW Asserts H_PROCHOT# when ac adapter is being unplugged and keep low for 10ms until SW prochot# is issuded by EC

@

PR208

10K_0402_1%

+3VALW

12

PC203

0.1U_0402_25V6

1 2

PR211

B B

ACIN=ACOK

ACAV_IN[18,48,55]

PR212

200K_0402_1%

PC204

0.1U_0402_25V6

12

footprint

2N7002DW-7-F_SOT363-6

5

12

PR209

1M_0402_1%

34

PQ203B

2N7002EDW_SOT363-6

12

1M_0402_1%

2

PR214

PR210

12

3.3K_0402_1%

61

PQ203A 2N7002EDW_SOT363-6

footprint

2N7002DW-7-F_SOT363-6

PBAT_PRES#[48,53,55]

Ref ENG0012879 Circuit-4

VIN

Pilot.02

PR217

@

0_0402_5%

1 2

13

D

2

PQ202

G

L2N7002WT1G 1N SC-70-3

S

12

100K_0402_1%

H_PROCHOT# [9,48,54,55,63]

HW Asserts H_PROCHOT# when battery is being unplugged and keep low for 10ms

A A

5

Erp lot 6 circuit

Rest of support elements (37.1)

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

until SW prochot# is issuded by EC

Compal Secret Data

2011/08/25 2012/07/25

3

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_PROCHOT#

1

0.1(X00)

54 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

PQ300 L2N7002W T1G 1N SC-70-3

13

D

2

VIN

PQ301 AON6426_DFN5X6-8-5

D D

C C

B B

A A

5

PQ306 AON6426_DFN5X6-8-5

5

1 2 3

PR303

4

4.7_0402_5%

1 2

PC303 2200P_0402_50V7K

1 2 3

4

PR325

4.7_0402_5%

1 2

PC324

@

1000P_0402_50V7K

ACAV_IN[18,48,54]

REGN_CHG

VIN_Max:19.5V ACDET=2.71V VIN_Min:17.5V ACDET=2.43V

G

S

1 2

PR300

3M_0402_5%

Rds= 4.2mo(typ) 5(max)mo

0.23W@130W

12

PC301

0.1U_0402_25V6

12

PR308

4.12K_0603_1%

12

PR316

100K_0402_1%

12

PR318

120K_0402_5%

1 2

PR301

1M_0402_1%

PQ302

AON6426_DFN5X6-8-5

1 2 3

4

PR309

4.12K_0603_1%

5

Pilot.02

@

0_0402_5%

PC309

0.1U_0603_25V7K

1 2

12

PR323

52.3K_0402_1%

0.444W@130W adapter

PR304

VIN

12

4

Adapter 19.5V 130W for 15' 90W for 14'

PR302

0.01_1206_1%

1

4 3

2

CSSP_1

12

0.1U_0402_25V6

PR317

324K_0402_1%

PC323

0.01UF_0402_25V7K

PC310

1 2

CSSP_2

CSSN_2

I_ADP[48,54]

CSSN_1

12

PR305

@

0_0402_5%

0.01UF_0402_25V7K

1 2

Pilot.02

PBAT_CHG_SMBDAT[48,53]

PBAT_CHG_SMBCLK[48,53]

Iada=0~6.67A(130W) Iada=0~4.62A(90W)

ADP_I = 40*Iadapter*Rsense

VCC_CHG[32]

PD300

BAT54CW-7-F SOT-323

P_SYS[63]

VIN

12

PC321

2

3

1 2

PC313

1U_0603_25V6K

PU300

29

PWPD

1

ACN

2

ACP

3

CMSRC

4

ACDRV

5

ACOK

6

ACDET

7

IADP

100P_0402_50V8J

1 2

PC322

100P_0402_50V8J

VBATT

PC311

CMSRC_CHG

ACDRV_CHG

ACDET_CHG

PR319

@

0_0402_5%

1 2

EC no need I_BATT Delete PR325 & signal 20160330

H_PROCHOT#[9,48,54,63]

1

PC304

0.047U_0402_25V7K

1 2

12

PR310

10_1206_1%

LX_CHG

28

27

VCC

PHASE

BQ24780SRUYR_QFN28_4X4

footprint

BQ24780RUYR_WQFN28_4X4-S

IDCHG

PMON

8

9

12

PR329

@

0_0402_5%

3

B+

EMC@

PL300

HCB2012KF-121T50_0805

1 2

EMC@

PL301

HCB2012KF-121T50_0805

1 2

PJP300

@

JUMP_43X79

22

GND

TB_STAT#

BATPRES#

CMPOUT

14

ILIM

SRP

SRN

BATDRV

BATSRC

Pilot.02

112

21

20

19

18

17

16

15

BATDRV_CHG

BATSRC_CHG

TB_STAT#_CHG

12

PC312

12

2.2U_0603_16V6K

PR311

2.2_0603_5%

BTST_CHG

REGN_CHG

DH_CHG

26

HIDRV

PROCHOT#

10

DL_CHG

23

24

25

BTST

REGN

LODRV

SCL

SDA

CMPIN

12

11

13

CHG_SMBDAT

CHG_SMBCLK

2

+3VALW

12

PR321

0_0402_5%

@

PR312 20K_0402_1%

PR313

8.2K_0402_1%

1 2

12

+3VALW

Icont=74/19.5=3.79A Ipk=3.79*1.2=4.55A

12

PC305

EMC@

0.1U_0402_25V6

12

PR320

10K_0402_1%

PBAT_PRES# [48,53,54]

12

PC306

EMC@

2200P_0402_50V7K

PC307

AON6428L_DFN8-5

H/S 0.686W 3*3 L/S 0.638W 5*6

CHG_B+

12

PC308

10U_0805_25V6K

PQ304

DH_CHG

LX_CHG

PQ305

AON7518_DFN8-5

DL_CHG

2

4

PR322 10_0402_1%

1 2

PR324 10_0402_1%

1 2

5

10 x 11.2 x 4mm 23m ohm DC=8A/ISAT=14A

123

5.6UH_PCMB104T-5R6MS_8A_20%

12

5

123

EMC@

PR315

4.7_1206_5%

SNUB_CHG

12

EMC@

PC315 680P_0402_50V7K

Rds= 4.2mo(typ) 5(max)mo

0.33W@74Whr 1.2C

PQ303 AON6426_DFN5X6-8-5

5

PL302

1 2

0.1U_0402_25V6

4

12

BATDRV_CHG

PC318

1 2

1 2 3

PC302

0.022U_0603_25V7K

1 2

PR306 10K_0402_1%

1 2

CSOP_1

0.1U_0402_25V6

Battery 56Whr 4S1P for 14'

PR314

0.01_1206_1%

PC319

1 2

1

PQ703_S

12

PR307 10_0402_1%

BATSRC_CHG

0.606W@74Whr 1.2C

4 3

CSON_1

PC314

PC320

0.1U_0402_25V6

1 2

VBATT

12

10U_0805_25V5K~D

12

PC317

PC316

10U_0805_25V5K~D

74Whr 3S2P for 15'

12

PR328 0_0402_5%@

PR327 0_0402_5%@

PR326 0_0402_5%@

CMPOUT [54]

CMPIN [54]

Pilot.02

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

Charger controller(40.1), Support component(40.2)

5

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2013/11/05 2015/11/05

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

PWR_CHARGER(BQ24780S)

Size Document Number Rev

Custom

Date: Sheet of

1

55 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

A

1 1

B+

(3.3*8.1+10.5*5)/9=8.8

EMC@

PL400

HCB2012KF-121T50_0805

1 2

EMC@

PL401

HCB2012KF-121T50_0805

1 2

@

PJP400

JUMP_43X118

2

112

1

+

2

2 2

PC410

12

100U_25V_M

+3VALWP

B++

12

PC403

15P_0402_50V8J

EMC@

12

PC405

PC404

0.1U_0402_25V6

EMC@

2200P_0402_50V7K

3.3UH_PCMB063T-3R3MS_6.5A_20%

PC407

10U_0805_25V6K

PQ400

PL402

1 2

12

PR414

1

+

PC413

2

ESR=35mo I=1.558A

3 3

ALWON[48]

CMP_VOUT0[23,48]

PR419

@

0_0402_5%

1 2

Pilot.02

ALL_SYS_PWRGD[18,48]

150U_B2_6.3VM_R35M

3V/5VALW_EN

PR418

2.2K_0402_5%

1 2

PQ403

L2N7002WT1G_SC70-3

S

G

2

4.7_1206_5%

EMC@

PQ402

SNUB_3V

PC418

12

EMC@

680P_0603_50V7K

D

13

12

PC422

0.1U_0402_25V6

EN1 and EN2 dont't floating

3V/5VALW_EN

4 4

@EMC@

TVNST52302AB0_SOT523-3

PD401

2

3

1

Place PD401 close to PU400

3V/5V controller(35.1), Support component(35.2)

A

B

4.7U_0603_6.3V6M

@

PC401

100P_0402_50V8J

1 2

PR401

68.1K_0402_1%

1 2

PR403

100K_0402_1%

1 2

PR405

22K_0402_1%

1 2

Pilot.02

3V/5VALW_EN

AON7408L_DFN8-5

3 5

241

AON7506_DFN33-8-5

3 5

241

12

@

.1U_0402_16V7K

B

ALW_PWRGD_3V_5V[58]

+3VALWP

PC416

1 2

PR410

100K_0402_1%

1 2

BST1_3V BST1_5V

PC411

0.1U_0402_25V6

PR407

@

0_0402_5%

1 2

PR408

@

0_0402_5%

1 2

LX_3V

1 2

BST_3V

PR412

2.2_0603_5%

UG_3V

LG_3V

475Khz Icout=0.5A@19.5V IL=1.79A@19.5V ripple=65mV@19.5V H/S=0.52W L/S=0.66W

B++

C

+3VLP

12

PR400

@

0_0402_5%

Pilot.02

12

PC400

@

PC402

100P_0402_50V8J

1 2

PR402 154K_0402_1%

1 2

PR404 100K_0402_1%

1 2

FB_3V

6

EN2

7

PGOOD

8

SW2

9

VBST2

10

DRVH2

4

5

CS2

PU400 TPS51285BRUKR_QFN20_3X3

footprint

TPS51285BRUKR_QFN20_3X3

DRVL2

12

11

FB_5V

PR406

4.75K_0402_1%

1 2

3

1

2

VFB2

VIN

CS1

VFB1

VREG3

VCLK

VBST1

DRVH1

VREG5

VO114DRVL1

13

15

SW1

Pilot.02

21

TP

EN1

20

19

18

17

16

PR409

@

0_0402_5%

1 2

PR411

200_0402_1%

1 2

LX_5V

BST_5V

UG_5V

LG_5V

PR413

2.2_0603_5%

1 2

3V/5VALW_EN

Pilot.02

PR416

@

0_0402_5%

1 2

12

PC420

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

PC421

0.1U_0402_25V6

+3VALWP

4.7U_0603_6.3V6M

@

PJP401

PAD-OPEN 4x4m

1 2

JUMP_43X118

+3VALW TDC 4.8A Peak Current 6.9A OCP current 9A

2013/11/05 2015/11/05

+3VALW

Compal Secret Data

Deciphered Date

D

PC412

1 2

0.1U_0402_25V6

AON6992_DFN5X6D-8-7

.1U_0402_16V7K

PAD-OPEN 4x4m

+5VALWP

+5VALW TDC 7.7A Peak Current 11A OCP current 14A

1 2 JUMP_43X118

D

@

PJP402

PQ401

PC417

1

G1

7

D2/S1

G2

5

6

12

E

B++

12

PC408

EMC@

2

D1

1.5UH_PCMC063T-1R5MN_9A_20%

12

S24S2

S2

PR415

3

4.7_1206_5%

EMC@

SNUB_5V

12

PC419

EMC@

680P_0603_50V7K

+5VALW

400Khz Icout=1.789A@19.5V IL=6.19A@19.5V ripple=114mV@19.5V H/S=0.72W L/S=0.64W ESR>6mohm

Compal Electronics, Inc.

Title

PWR_3.3VALWP/5VALWP

Size Document Number Rev

Custom

LA-D993P

Date: Sheet of

12

PC406

PC409

10U_0805_25V6K

EMC@

0.1U_0402_25V6

2200P_0402_50V7K

400Khz Idc=9A Isat=18(20%) Isat=18(30%)

PL403

1 2

ESR=35mo I=1.558A

1

+

PC415

PC414

2

150U_B2_6.3VM_R35M

+5VALWP

1

+

PC423

2

@

150U_B2_6.3VM_R35M

56 70Tuesday, November 08, 2016

E

56 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

EMC@

B+

D D

PL500

HCB2012KF-121T50_0805

1 2

10U_0603_25V6M

12

PC500

12

PC501

2200P_0402_25V7K

12

PC502

PC503

EMC@

+3VALW

12

1U_0402_6.3V6K

PC506

EMC@

0.1U_0402_25V6

10U_0603_25V6M

+3VALW

12

PR504

@

0_0402_5%

ILMT_DDR

Pilot.02

C C

The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high +1.2V_DDR OCP set 8A

B B

12

1.2V_VDDQ_EN[33]

Pilot.02

SM_PG_CTRL[9]

SIO_SLP_S3#[18,32,33,34,39,48,49]

PR506

@

0_0402_5%

PR507

@

0_0402_5%

1 2

PR509

@

0_0402_5%

1 2

PR511

@

0_0402_5%

12

PR508

1M_0402_1%

4

PU500 SY8210AQVC_QFN19_4X3

10

IN

13

BYP

14

15

17

4 9

1 2

VCC VTTGND PGND SGND

ILMT S5 S3

PC507

2.2U_0402_6.3V6M

12

ILMT_DDR

OT PG

BS LX FB

VDDQSNS

VLDOIN

VTT VTTSNS VTTREF

footprint

EN_1.2V

EN_0.6V

SY8210AQVC_QFN19_4X3-S

3

19

1.2V_DDR_OT

18

+1.2V_PWROK

PC505 .1U_0402_16V7K

12 11 16 8 7 6 5 3

1 2

+1.2V_DDRP

LX_DDR

2

PR500

@

100K_0402_5%

1 2

PR501

@

100K_0402_5%

1 2

PR502

@EMC@

4.7_0805_5%

1 2

PL501

1UH_PCMB053T-1R0MS_7A_20%

1 2

5 X 5 X3

PC512

22U_0603_6.3V6M

1 2

+0.6VSP

22U_0603_6.3V6M

PC514

1U_0402_10V6K

12

PC516

PC515

+3VS

EE no need +1.2V_PWROK

+3VS

PC504

@EMC@

680P_0402_50V7K

1 2

330P_0402_50V7K

12

PC508

12

R1

12

R2

+1.2V_DDRP

51.1K_0402_1% PR503

22U_0603_6.3V6M

PC509

PC510

12

48.7K_0402_1% PR505

PC511

12

1

22U_0603_6.3V6M

PC513

12

VFB=0.6V Vout=0.6V* (1+R1/R2) Vout=1.2V

12

PC517

@

0.1U_0402_10V7K

1M_0402_1%

12

0.1U_0402_10V7K

PR510

@

12

PC518

Fsw=600KHz

600Khz Icout=0.542A@19.5V IL=1.88A@19.5V ripple=6.32mV@19.5V

+0.6VS+0.6VSP+1.2V_DDR+1.2V_DDRP

PJP501

@

JUMP_43X39

112

2

Mode S3 S5 VOUT VTT Normal H H on on Stadby L H on off Shutdown L L off off

Note: S3 - sleep ; S5 - power off

PJP500@

JUMP_43X118

112

2

+1.2V_DDR TDC 5.1A Peak Current 7.3A OCP current 8A

+0.6VS TDC 0.7A Peak Current 1A OCP Current 2A

A A

Security Classification

DDR controller(35.3), Support component(35.4)

5

4

Security Classification

2014/10/17 2014/12/05

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/10/17 2014/12/05

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR_+1.2V_DDR/0.6VS(SY8210)

PWR_+1.2V_DDR/0.6VS(SY8210) LA-D993P

LA-D993P

57 70Tuesday, November 08, 2016

1

0.1(X00)

Vinaﬁx.com

5

D D

7.2*1/.9/9=0.89A

EMC@

PL600

HCB2012KF-121T50_0805

1 2

2

B+

C C

112

PJ600

@

JUMP_43X79

Pilot.02

PR603

@

0_0402_5%

ALW_PWRGD_3V_5V[56]

B B

EN :H>0.8V ; L<0.4V EN pin don't floating

If have pull down resistor at HW side, please delete PR604.

1 2

1M_0402_1%

PR604

12

PC601

EMC@

2200P_0402_50V7K

12

@

0.1U_0402_25V6

+19VB_1VALWP

PC602

@EMC@

PC612

12

0.1U_0402_25V6

+3VALW

PC603

12

@

0_0402_5%

12

@

0_0402_5%

12

10U_0805_25V6K

PR606

PR607

PC604

@

12

10U_0805_25V6K

4

EN_1VALWP

ILMT_1VALWP

+3VALW

PC613

1U_0402_6.3V6K

PU600 SY8286RAC_QFN20_3X3

2 3 4 5 7

8 18 11 13 15

SY8286RAC_QFN20_3X3

12

IN IN IN IN GND GND GND EN ILMT BYP

footprint

3

PR600

@EMC@

4.7_1206_5%

1 2

Pilot.02

9

PG

1

BS

6

LX_1VALWP

LX

19

LX

20

LX

14

FB_1VALWP

FB

17

LDO_1VALWP

VCC

10

NC

12

NC

16

NC

21

PAD

PR601

@

0_0402_5%

1 2

3V

12

PC611

2.2U_0402_6.3V6M

PC605

0.1U_0201_10V6K

BST_1VALWP_RBST_1VALWP

1 2

Vout=0.6V* (1+R1/R2) =0.6*(1+(14/20))

Vout=1.02V

SNUB_1VALWP

PL601

1UH_PCMB063T-1R0MS_12A_20%

1 2

FB=0.6V

@EMC@

680P_0603_50V7K

1 2

12

R1

12

PR605

R2

20K_0402_1%

PC600

PR602

2

+1VALW TDC 4A Peak Current 5.7A OCP current 9A

500Khz IL=1.9A@19.5V ripple=7.3mV@19.5V

+1VALWP

PJ601

@

JUMP_43X118

112

1

2

+1VALW

+1VALWP

12

PC608

PC607

PC606

14K_0402_1%

22U_0603_6.3V6M

330P_0402_50V7K

12

PC610

PC609

22U_0603_6.3V6M

The current limit is set to 6A, 9A or 12A when this pin is pull low, floating or pull high.

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

PWR.Plane.Regulator(35.25), Support component(35.26)

5

4

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/02 2013/10/28

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_+1VALW (SY8288)

PWR_+1VALW (SY8288) LA-D993P

LA-D993P

1

58 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

D D

0.95**5.5/0.9/9=0.654A

HCB2012KF-121T50_0805

B+

C C

VCCIO_EN[33]

B B

EN :H>0.8V ; L<0.4V EN pin don't floating

If have pull down resistor at HW side, please delete PR704.

PL700

1 2

PJ700

@

112

JUMP_43X79

PR704

1M_0402_1%

EMC@

2

+19VB_+0.95VSP

12

PC702

EMC@

2200P_0402_50V7K

12

PC704

PC703

PC705

0.1U_0402_25V6

@EMC@

@

10U_0805_25V6K

+3VALW

12

PR707

@

0_0402_5%

12

PR709

@

0_0402_5%

The current limit is set to 6A, 9A or 12A when this pin is pull low, floating or pull high.

Pilot.02

12

+3VALW

1U_0402_6.3V6K

4

ILMT_+0.95VSP

PC713

PU700

SY8286RAC_QFN20_3X3

2 3 4 5 7

8 18 11 13 15

footprint

SY8286RAC_QFN20_3X3

12

IN IN IN IN GND GND GND EN ILMT BYP

3

Pilot.02

PR712

@

0_0402_5%

1 2

9

VCCIO_PG

PG

1

BST_+0.95VSP

BS

6

LX_+0.95VSP

LX

19

LX

20

LX

14

FB_+0.95VSP

FB

17

LDO_+0.95VSP

VCC

10

NC

12

NC

16

NC

21

PAD

PR701

@

0_0402_5%

1 2

+VCCIO_PG [18]

BST_+0.95VSP_R

output voltage=3V

12

PC710

2.2U_0402_6.3V6M

PC701

0.1U_0201_10V6K

1 2

PR700

@EMC@

4.7_1206_5%

1 2

PL701

1UH_PCMB053T-1R0MS_7A_20%

1 2

Itdc7A Isat=11A

SNUB_+0.95VSP

12

FB=0.6V

Vout=0.6V* (1+R1/R2) =0.6*(1+(36.5/62))

Vout=0.953V

PC700

@EMC@

680P_0603_50V7K

1 2

PC712

330P_0402_50V7K

R1

R2

2

12

PR703

12

PR706

36.5K_0402_1%

12

PR708 62K_0402_1%

12

PR711

1

+VCCIO TDC 3.85A Peak Current 5.5A OCP current 6A

500Khz IL=1.81A@19.5V ripple=7.0mV@19.5V

PJ701

@

JUMP_43X118

2

+0.95VSP

112

+VCCIO

+0.95VSP

22U_0603_6.3V6M

12

PC708

12

PC709

22U_0603_6.3V6M

VCCIO_SENSE [11]

VSSIO_SENSE [11]

12

PC706

PC707

22U_0603_6.3V6M

PR705

@

0_0402_5%

1 2

100_0402_1%

PR710

@

0_0402_5%

1 2

Pilot.02

100_0402_1%

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

VCCIO controller(35.5), Support component(35.6)

5

4

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/02 2013/10/28

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_VCCIO_0.95V(SY8286)

PWR_VCCIO_0.95V(SY8286) LA-D993P

LA-D993P

1

59 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

D D

1.05*2.9/0.9/9=0.375A

EMC@

PL800

HCB2012KF-121T50_0805

1 2

2

C C

B+

+1.8V_GFX_AON

NVVDDS_EN[31,68]

Pilot.02

EN :H>0.8V ; L<0.4V EN pin don't floating

B B

If have pull down resistor at HW side, please delete PR807.

112

@

JUMP_43X79

@

PR804

62K_0402_1%

1 2

PR806

@

0_0402_5%

1 2

PJ800

12

PR807

@

1M_0402_1%

12

PC801

EMC@

2200P_0402_50V7K

PC812

@

+19VB_+1.0VSP

12

PC802

EMC@

0.1U_0402_25V6

12

0.1U_0402_25V6

+3VALW

PC804

12

0_0402_5%

12

@

0_0402_5%

10U_0805_25V6K

@

PR809

PR810

12

PC805

@

10U_0805_25V6K

12

+3VALW

1U_0402_6.3V6K

4

EN_+1.0VSP ILMT_+1.0VSP

PC813

PU800 SY8286RAC_QFN20_3X3

2

IN

3

IN

4

IN

5

IN

7

GND

8

GND

18

GND

11

EN

13

ILMT

15

BYP

footprint

SY8286RAC_QFN20_3X3

12

VCC

PAD

3

PR811

10K_0402_5%

PG_+1.0VSP

1 2

PR801

@

0_0402_5%

1 2

+3VS

1VS_GFX_PG [23]

Pilot.02

9

PG

1

BS

6

LX_+1.0VSP

LX

19

LX

20

LX

14

FB_+1.0VSP

FB

17

LDO_+1.0VSP

10

NC

12

NC

16

NC

21

PR803

@

0_0402_5%

1 2

3V

12

PC811

2.2U_0402_6.3V6M

BST_+1.0VSP_RBST_+1.0VSP

PC803

0.1U_0201_10V6K

1 2

Itdc7A Isat=11A

Vout=0.6V* (1+R1/R2) =0.6*(1+(21.5/31.6))

Vout=1.008V

2

PR802

@EMC@

4.7_1206_5%

1 2

1UH_PCMB053T-1R0MS_7A_20%

SNUB_+1.0VSP

PL801

1 2

FB=0.6V

@EMC@

680P_0603_50V7K

12

PC806

330P_0402_50V7K

PC800

1 2

R1

R2

+1.0VS_GFX TDC 0.8A Peak Current 1.1A OCP current 6A

500Khz IL=2.0A@19.5V ripple=7.7mV@19.5V

+1.0VSP

12

PC807

PR805

21.5K_0402_1%

22U_0603_6.3V6M

12

PR808

31.6K_0402_1%

1

PJ801

@

JUMP_43X118

2

112

+1VS_GFX

+1.0VSP

12

PC808

22U_0603_6.3V6M

12

PC809

PC810

22U_0603_6.3V6M

Pilot.02

The current limit is set to 6A, 9A or 12A when this pin is pull low, floating or pull high.

A A

Security Classification

GPU other power_Regulatorr(43.7), Support component(43.8)

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/02 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR_+1.05VGPU(SY8286)

PWR_+1.05VGPU(SY8286) LA-D993P

LA-D993P

60 70Tuesday, November 08, 2016

1

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

B+

EMC@

PL900

HCB2012KF-121T50_0805

1 2

@

PJP900

PAD-OPEN 3x3m

1 2

1.35*13.8/0.9/9=2.3A

1

12

PC907

PR912

@

0_0402_5%

+

PC908

2

10U_0402_6.3V6M

+

2

470U_D2_2VM_R9M

FBVDDQ_SENSE [25]

+1.35VS_VGAP

PC910

470U_D2_2VM_R9M

Sense=1.503V Sense=1.353V

1

G1

D2/S1

G2

6

+1.35VS_VGAP_B+

2

D1

S24S2

5

12

PC901

PC900

EMC@

0.1U_0402_25V6

@EMC@

12

PC902

2200P_0402_50V7K

12

PC903

10U_0805_25V6K

7 x 7 x 3

PL901

0.82UH_MMD-06CZ-R82M-V1L_13A_20%

1 2

12

S2

EMC@

PQ900

AON6992_DFN5X6D-8-7

12

PR904

4.7_1206_5%

100_0402_1%

EMC@

PC909 680P_0402_50V7K

12

PR911

1 2

3

Pilot.02

D D

+3VS

12

PR900

@

100K_0402_1%

Pull high by EE Side

DGPU_PWROK[18,23]

PR902

PR910

2

G

PQ901

PC906

@

0.1U_0402_16V7K

44.2K_0402_1%

1 2

12

13

D

S

TRIP_+1.35VS_VGAP

EN_+1.35VS_VGAP

FB_+1.35VS_VGAP RF_+1.35VS_VGAP

12

PR905 470K_0402_1%

R2R3

12

PR907 39K_0402_1%

36K_0402_1%

1 2

+3VS

C C

FBVDD_EN[23,31]

Pull high by EE Side

PR913

@

100K_0402_1%

1 2

PR903

@

0_0402_5%

Pilot.02

+1.8V_GFX_AON

12

B B

MEM_VDD_CTL[23]

Pilot.02

PR909

100K_0402_5%

PR908

@

0_0402_5%

1 2

169K_0402_1%

PJC138K 1N SOT-323-3

PU900

APW8828QBI-TRG_TDFN10_3X3

1

PGOOD

2

TRIP

3

EN

4

VFB

5

TST

footprint

TPS51212DSCR_SON10_3X3-S

PR906

R1

VBST

DRVH

V5IN

DRVL

SW

TP

10

BST_+1.35VS_VGAP

9

UG_+1.35VS_VGAP

8

SW_+1.35VS_VGAP

7 6

LG_+1.35VS_VGAP

11

PR901

2.2_0603_5%

1 2

+5VALW

12

PC905 1U_0603_6.3V6M

PC904

0.1U_0603_25V7K

1 2

SW_+1.35VS_VGAP

7

Switching Frequency: 290kHz OVP: 120%-130% VFB=0.7V TYP MAX H/S Rds(on) : 6.8mohm 8.6mohm L/S Rds(on) : 2mohm 2.5mohm

Ripple=34.3mV



I=4.33A

+1.35VS_VGA TDC 11A Peak Current 20A OCP current 25A

+1.35VS_VGAP

@

PJP901

PAD-OPEN 4x4m

1 2

@

PJP902

PAD-OPEN 4x4m

1 2

+1.35VS_VGA

If MEM_VDD_CTL high : R2//R3 = 31.7k ohm Vout=0.704*(1+(36.1/31.7))=1.506V

If MEM_VDD_CTL low : Vout=0.704*(1+(36.1/39))=1.355V

A A

GPU other power_Regulatorr(43.5), Support component(43.6)

5

Pilot.01

Security Classification

2011/06/02 2013/10/28

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

2011/06/02 2013/10/28

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR_+1.35VDGPU(TPS51212)

PWR_+1.35VDGPU(TPS51212) LA-D993P

LA-D993P

61 70Tuesday, November 08, 2016

1

0.1(X00)

Vinaﬁx.com

5

D D

Module model information

SY8286_V1_single.mdd SY8286_V1_dual.mdd

1.05*2.9/0.9/9=0.375A

B+

C C

3.3V

DGPU_PWR_EN[20,31]

EN :H>0.8V ; L<0.4V EN pin don't floating

B B

If have pull down resistor at HW side, please delete PR1007.

Pilot.02

1 2

PR1011

@

0_0402_5%

EMC@

PL1000

HCB2012KF-121T50_0805

1 2

2

112

PJ1001

@

JUMP_43X79

12

PR1007

1M_0402_1%

PC1003

EMC@

2200P_0402_50V7K

PC1012

@

+19VB_+1.8VSP

12

PC1004

PC1002

0.1U_0402_25V6

10U_0805_25V6K

@EMC@

+3VALW

0.1U_0402_25V6

12

PR1009

@

0_0402_5%

12

PR1010

@

0_0402_5%

12

4

12

PC1005

@

10U_0805_25V6K

+3VALW

1U_0402_6.3V6K

Pilot.02

EN_+1.8VSP ILMT_+1.8VSP

PC1013

SY8286RAC_QFN20_3X3

2 3 4 5 7

8 18 11 13 15

footprint

SY8286RAC_QFN20_3X3

12

PU1000

IN IN IN IN GND GND GND EN ILMT BYP

3

@

PR1000

10K_0402_5%

1 2

Pilot.02

9

PG

1

BS

6

LX_+1.8VSP

LX

19

LX

20

LX

14

FB_+1.8VSP

FB

17

LDO_+1.8VSP

VCC

10

NC

12

NC

16

NC

21

PAD

+3VALW

keep short pad, snubber is for EMI only.

PR1003

@

0_0402_5%

1 2

BST_+1.8VSP_RBST_+1.8VSP

3V

12

PC1011

2.2U_0402_6.3V6M

PR1002

@EMC@

4.7_1206_5%

1 2

PC1001

0.1U_0201_10V6K

1 2

PL1001

1UH_PCMB053T-1R0MS_7A_20%

1 2

Itdc7A Isat=11A

FB=0.6V

Vout=0.6V* (1+R1/R2) =0.6*(1+(100/49.9))

Vout=1.8V

SNUB_+1.8VSP

12

2

PC1000

@EMC@

680P_0603_50V7K

1 2

R1

PC1006

330P_0402_50V7K

R2

1

+1.8V_GFX_AON TDC 1.6A Peak Current 2A OCP current 6A

500Khz IL=2.0A@19.5V ripple=7.7mV@19.5V

2

+1.8V_GFX_AON

+1.8VSP

112

PJ1000

@

JUMP_43X79

+1.8VSP

12

PR1004

PC1007

100K_0402_1%

12

PR1008

49.9K_0402_1%

12

PC1008

22U_0603_6.3V6M

12

PC1009

PC1010

22U_0603_6.3V6M

The current limit is set to 6A, 9A or 12A when this pin is pull low, floating or pull high.

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

GPU other power_Regulatorr(43.7), Support component(43.8)

5

4

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/02 2013/10/28

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR_+1.05VGPU(SY8286)

PWR_+1.05VGPU(SY8286) LA-D993P

LA-D993P

1

62 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

PR1100

12.1K_0402_1%

D D

C C

B B

A A

1 2

PC1100

4700P_0402_25V7K

1 2

PR1105

97.6K_0402_1%

1 2

PC1104

330P_0402_50V7K

1 2

47P_0402_50V8J

1 2

PC1107

8200P_0402_25V7K

ISUMP_GT[65]

ISUMN_GT[65]

FCCM_GT[65] PWM1_GT[65] PWM2_GT[65]

PC1106

1 2

PR1118

3.6K_0402_1%

VCCGT_SENSE[12] VSSGT_SENSE[ 12]

12

PH1102

10K_0402_5%_B25/50 4250K

PR1130

2.61K_0402_1%

470K_0402_5%_ TSM0B474J4702RE

680P_0402_50V7K

12

PR1131

11K_0402_1%

PH1100

1 2

PR1110

27.4K_0402_1%

PC1108

1000P_0402_50V7K

1 2

PC1109

1 2

PR1127

2.94K_0402_1%

1 2

Droop of GT at 2.65mV/A

PC1114

0.01UF_0402_25V7K

12

PC1117

.1U_0402_16V7K

12

PC1124

.1U_0402_16V7K

12

PR1122 1K_0402_1%

1 2

PC1118

0.068U_0402_16V7K

NTC of GT at 100 deg

PR1111

10.2K_0402_1%

1 2

PC1105

1000P_0402_50V7K

1 2

PR1119 2K_0402_1%

1 2

1K_0402_1%

1 2

PR1143

90.9K_0402_1%

PR1132

432_0402_1%

1 2

OCP of GT at 66A

0.022U_0402_25V7K

12

PC1119

2200P_0402_50V7K

1 2

PR1136

PC1126

1 2

PC1129

1 2

PC1136

330P_0402_50V7K

4

NTC of CORE at 100 deg

12

PR1144

27.4K_0402_1%

PC1101

0.1U_0402_10V7K

VR_SVID_DATA[9]

VR_SVID_ALERT#[9]

VR_SVID_CLK[9]

H_PROCHOT#[9,48,54,55]

Pilot.02

IMVP_VR_PG[18]

VR_ON[18,33]

ISEN2_GT [65]

ISEN1_GT [65]

PH1104

470K_0402_5%_ TSM0B474J4702RE

3

PROG sets (Base on FNTBD.6 July 25, 2014) PROG1 Vboot :0V slew rate :30 mV/uS

+VCCST

12

PR1103

PR1104

100_0402_1%

45.3_0402_1% PR1106

10_0402_1%

1 2

PR1107

@

0_0402_5%

1 2

PR1108

49.9_0402_1%

1 2

PR1109

100_0402_1%

1 2

PR1112

1.91K_0402_1%

1 2

+3VS

PR1117 0_0402_5%@

1 2

PR1120 0_0402_5%@

1 2

P_SYS[55]

1

PSYS

2

IMON_B

3

NTC_B

4

COMP_B

5

FB_B

6

RTN_B

7

ISUMP_B

8

ISUMN_B

9

ISEN1_B

10

ISEN2_B

11

FCCM_B

12

PWM1_B

49

EP

PR1141

10.2K_0402_1%

1 2

12

PR1147

PC1137 68P_0402_50V8J

4.87K_0402_1%

12

PC1139 8200P_0402_25V7K

12

PR1101

1_0402_5%

VR_SVID_DATA_C

Pilot.02

VR_SVID_ALERT#_C

VR_SVID_CLK_C

44

45

46

47

48

SCLK

VR_HOT#

VR_READY

VR_ENABLE

ISL95829AHRTZ-T_TQFN48_6X6

footprint

ISL95855HRTZTS27_TQFN48_6X6-S

PWM2_B13NTC_A15COMP_A16FB_A17RTN_A18ISUMP_A19ISUMN_A

IMON_A

14

12

+5VS Vcore_B+

12

39

40

41

42

43

VIN

SDA

VCC

ALERT#

PU1100

ISEN1_A21ISEN2_A22ISEN3_A23FCCM_A

20

1 2

2200P_0402_50V7K

PR1145 2K_0402_1%

PC1138 680P_0402_50V7K

Pilot.02

PR1102

@

0_0402_5%

38

PROG2

PROG3

PROG437PROG1

24

374_0402_1%

1 2

PC1133

PR1137

PROG5

PWM_C FCCM_C ISUMN_C ISUMP_C

RTN_C

COMP_C

IMON_C PWM3_A PWM2_A PWM1_A

ISEN3_VCORE[64]

FB_C

ISEN2_VCORE[64]

36 35 34 33 32 31 30 29 28 27 26 25

PR1139

1 2

1K_0402_1%

0.22U_0603_25V7K

ISEN1_VCORE[64]

1 2

1K_0402_1%

PC1102

1U_0402_16V6K

1 2

PC1103

12

PR1113

165K_0402_1%

PR1123

48.7K_0402_1%

1 2

PC1125 0.022U_0402_25V7K

OCP of Vcore at 83.2A

1 2

PC1134

PR1142

470P_0402_50V7K

1 2

PR1146

2.43K_0402_1%

Droop of CORE at 1.8mV/A

12

PR1114

16.9K_0402_1%

PC1127 0.022U_0402_25V7K

PC1128 0.022U_0402_25V7K

PROG2 IMAX VR A :70A PROG3 IMAX VR A :55A DROOP VR GT :Active PROG4 DROOP VR A: Active DROOP VR SA :Active VR A and VR GT SWITCHING FREQUENCY:583 (kHz) PROG5 VR SA IMAX(A):12A VR SA SWITCHING FREQUENCY :450 (kHz)

12

PR1116 110K_0402_1%

PR1115

5.62K_0402_1%

PWM_SA [65] FCCM_SA [65]

PWM3_VCORE [64] PWM2_VCORE [64] PWM1_VCORE [64]

FCCM_VCORE [64]

1 2

12

PR1135

OCP of SA at 16.5A

1.1K_0402_1%

PC1110

2200P_0402_50V7K

1 2

12

PC1120

115K_0402_1%

12

PR1121

1 2

12

330P_0402_50V7K

PC1121

1K_0402_1%

1 2

12

68P_0402_50V8J

PR1124

PR1133

PC1123

PC1130

.1U_0402_16V7K

VCC_SENSE [10]

VSS_SENSE [10]

12

PC1135

0.01UF_0402_25V7K

2

PC1116

0.01UF_0402_25V7K

ISUMN_SA [65]

ISUMP_SA [65] VSSSA_SENSE [11]

12

PH1101

PR1126

11K_0402_1%

VCCSA_SENSE [11]

PH1103

10K_0402_5%_B25/50 4250K

12

PR1125

2.61K_0402_1%

12

ISUMN_VCORE [64]

ISUMP_VCORE [64]

12

PC1111

.1U_0402_16V7K

1 2

PR1128

1K_0402_1%

12

PR1134

2K_0402_1%

4.42K_0402_1%

12

PC1122

470P_0402_50V7K

2200P_0402_50V7K

12

PC1131

PC1132

.047U_0402_16V7K

PC1113

0.033U_0402_16V7K

1 2

PC1115

220P_0402_50V8J

1 2

PR1129

2.67K_0402_1%

Droop of SA at 10mV/A

12

PR1138

11K_0402_1%

0.22U_0402_16V7K

PC1112

4700P_0402_16V7K

12

10K_0402_5%_B25/50 4250K

12

PR1140

2.61K_0402_1%

12

1

Security Classification

Issued Date

CPU_Vcore controller(36.1),Drivers(36.2), Support component(36.3)

5

4

Acoustic Noise B+ Bulk CAP(37.2)

3

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR D ISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

2

Compal Secret Data

2011/06/02 2013/10/28

Deciphered Date

Compal Electronics, Inc.

Title

PWR-VCORE_ISL95829

Size Document Number Rev

LA-D993P

Date: Sheet of

1

63 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

+5VS

B+

EMC@

PL1400

HCB2012KF-121T50_0805

1 2

EMC@

PL1401

HCB2012KF-121T50_0805

1 2

PJP1400

D D

@

JUMP_43X118

112

1

+

PC1403

2

100U_25V_M

Vcore_B+

12

1U_0402_6.3V6K

12

PC1404

10U_0805_25V6K

2

PC1405

1 2

PC1401

12

10U_0805_25V6K

12

PWM1_VCORE[63]

PR1402

1_0402_5%

12

PC1406

0.1U_0402_25V6

EMC@

FCCM_VCORE[63,64]

12

PC1408

PC1407

1.5P_0402_50V8C

EMC@

2200P_0402_50V7K

+5VS

12

C C

12

PC1413

B B

A A

5

+5VS

12

PC1421

1 2

PC1411

1U_0402_6.3V6K

12

PC1414

10U_0603_25V6M

1 2

PC1420

1U_0402_6.3V6K

12

PC1422

10U_0805_25V6K

PR1416

1_0402_5%

PC1415

0.1U_0402_25V6

EMC@

PR1430

1_0402_5%

PC1423

0.1U_0402_25V6

EMC@

PWM2_VCORE[63]

FCCM_VCORE[63,64]

12

PC1416

EMC@

2200P_0402_50V7K

12

PWM3_VCORE[63]

FCCM_VCORE[63,64]

12

PC1424

EMC@

2200P_0402_50V7K

CPU_Vcore controller(36.1),Drivers(36.2), Support component(36.3), CPU_Core output CAP(36.4),Acoustic Noise B+ Bulk CAP(37.2)

4

Pilot.02

PR1401 0_0402_5%@

PR1404 0_0402_5%@

PC1402

0.22U_0603_16V7K

1 2

PR1405

4.7_0603_1%

Pilot.02

PR1415 0_0402_5%@

1 2

PR1417 0_0402_5%@

1 2

PC1412

0.22U_0603_16V7K

1 2

PR1419 4.7_0603_1%

Pilot.02

PR1429 0_0402_5%@

1 2

PR1431 0_0402_5%@

1 2

PC1419

0.22U_0603_16V7K

1 2

PR1433

4.7_0603_1%

4

1 2

PU1400

SIC632CDT1GE3_POWERPAK31_5X5

1

PWM

2

ZCD_EN#

3

VCIN

4

CGND

5

BOOT

6

NC

7

PHASE

8

VIN

9

VIN

10

PGND

11

SW

12

SW

13

SW

14

SW

SIC632CDT1GE3_POWERPAK31_5X5

footprint

PU1401

SIC632CDT1GE3_POWERPAK31_5X5

1

PWM

2

ZCD_EN#

3

VCIN

4

CGND

5

BOOT

6

NC

7

PHASE

8

VIN

9

VIN

10

PGND

11

SW

12

SW

13

SW SW14SW

SIC632CDT1GE3_POWERPAK31_5X5

footprint

PU1402

SIC632CDT1GE3_POWERPAK31_5X5

1

PWM

2

ZCD_EN#

3

VCIN

4

CGND

5

BOOT

6

NC

7

PHASE

8

VIN

9

VIN

10

PGND

11

SW

12

SW

13

SW SW14SW

SIC632CDT1GE3_POWERPAK31_5X5

footprint

CGND

DSBL#

THWn VDRV PGND

CGND

DSBL#

THWn VDRV PGND

CGND DSBL#

THWn

VDRV PGND

GL

GL SW SW SW SW SW SW

GL

GL SW SW SW SW SW SW

28 27

GL

26 25 24 23 22

GL

21

SW

20

SW

19

SW

18

SW

17

SW

16

SW

15

SW

28 27 26 25 24 23 22 21 20 19 18 17 16 15

VCC_CORE_PT1

PR1418

VCC_CORE_PT2

PR1432

VCC_CORE_PT3

3

PR1400

1_0402_5%

1 2

12

PR1403

10K_0402_1%

ISEN1_VCORE[63]

ISUMP_VCORE[63]

ISUMN_VCORE[63]

PR1414

1_0402_5%

1 2

12

10K_0402_1%

PR1428

1_0402_5%

1 2

12

10K_0402_1%

PC1400

1U_0402_6.3V6K

1 2

6.6 x 7.6 x 4mm

0.98m ohm +-5% DC=28A/ISAT=28A

PL1402

PT1400 TP@

12

EMC@

PR1406

10_1206_5%

12

EMC@

PC1409

47P_0603_50V8J

PT1401 TP@

EMC@

PR1420

10_1206_5%

EMC@

PC1417

47P_0603_50V8J

ISEN2_VCORE[63]

PT1402 TP@

EMC@

PR1434

10_1206_5%

EMC@

PC1425

47P_0603_50V8J

ISEN3_VCORE[63]

3

1U_0402_6.3V6K

12

1U_0402_6.3V6K

12

ISUMP_VCORE

ISUMN_VCORE

PR1409

PC1410

1 2

ISUMP_VCORE

ISUMN_VCORE

PC1418

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

0.22UH_PCME064T-R22MS0R985_28A_20%

12

100K_0402_1%

6.6 x 7.6 x 4mm

0.98m ohm +-5% DC=28A/ISAT=28A

0.22UH_PCME064T-R22MS0R985_28A_20%

12

PR1423

100K_0402_1%

0.22UH_PCME064T-R22MS0R985_28A_20%

12

PR1437

100K_0402_1%

1 2

PR1407 0_0402_5%

@

12

󴅟󵕻󳁓󲹏

12

3.65K_0603_1%

ISEN2_VCORE

ISEN3_VCORE

PL1403

1 2

PR1411

2.2_0402_1%

12

PR1410

PR1421 0_0402_5%

@

󴅟󵕻󳁓󲹏

12

PR1424

6.6 x 7.6 x 4mm

0.98m ohm +-5% DC=28A/ISAT=28A

PR1435 0_0402_5%

@

3.65K_0603_1%

ISEN1_VCORE

ISEN3_VCORE

PL1404

1 2

PR1425

2.2_0402_1%

12

󴅟󵕻󳁓󲹏

12

PR1438

3.65K_0603_1%

PR1439

2.2_0402_1%

ISEN1_VCORE

ISEN2_VCORE

Compal Secret Data

2011/06/02 2013/10/28

Compal Secret Data

PR1408 0_0402_5%

@

V1N

12

PR1412

100K_0402_1%

PR1422 0_0402_5%

@

V2N

12

PR1426

100K_0402_1%

PR1436 0_0402_5%

@

V3N

12

PR1440

100K_0402_1%

Deciphered Date

2

VCC_core (Base on PDDG rev 0.7) PL2 TDC__default):TB PL2 TDC_max (40Sec):50A Peak Current 68A

+VCC_CORE

DC Load line -1.8mV/A AC Load line -1.8mV/A OCP Current 83.2A DCR 0.97mohm +/-5%

1

12

PR1413

100K_0402_1%

12

PR1427

100K_0402_1%

12

PR1441

100K_0402_1%

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR-VCORE_VCORE

PWR-VCORE_VCORE LA-D993P

LA-D993P

1

0.1(X00)

64 70Tuesday, November 08, 2016

0.1(X00)

Vinaﬁx.com

5

4

3

2

1

12

PR1508

12

PC1507

12

4.7_1206_5%

12

680P_0603_50V7K

1U_0402_6.3V6K

4.7_1206_5%

680P_0603_50V7K

PC1508

1U_0402_6.3V6K

1 2

ISEN2_GT[63]

PC1500

1 2

ISUMP_GT[63]

ISEN1_GT[63]

ISUMN_GT[63]

ISUMP_GT

ISUMN_GT

12

PR1509

3.65K_0603_1%

12

PR1521

3.65K_0603_1%

6.6 x 7.6 x 4mm

0.98m ohm +-5% DC=28A/ISAT=28A

PL1502

0.22UH_PCME064T-R22MS0R985_28A_ 20%

1 2

PR1506 0_0402_5%

@

12

PR1507 0_0402_5%

@

󴅟󵕻󳁓󲹏

ISEN2_GT

PL1503

1 2

ISEN1_GT

12

PR1511

2.2_0402_1%

PR1520 0_0402_5%

@

PR1523

2.2_0402_1%

100K_0402_1% PR1510

6.6 x 7.6 x 4mm

0.98m ohm +-5%

DC=28A/ISAT=28A

0.22UH_PCME064T-R22MS0R985_28A_ 20%

PR1519 0_0402_5%

@

󴅟󵕻󳁓󲹏

PR1522

100K_0402_1%

VCCGT (Base on PDDG rev 0.7) PL2 TDC__default):TB

+VCCGT

12

PR1525

@

100K_0402_1%

12

PR1526

@

100K_0402_1%

PL2 TDC_max (40Sec):25A Max Current 55A DC Load line -2.65mV/A AC Load line -2.65mV/A OCP Current 66.7A DCR 0.97mohm +/-5%

6.6 x 7.4 x 4mm

0.98mo/DC=28A/ISAT=28A

PR1500

1_0402_5%

+5VS

B+

EMC@

PL1500

HCB2012KF-121T50_0805

1 2

EMC@

PL1501

HCB2012KF-121T50_0805

D D

1 2

PJP1500

@

JUMP_43X118

112

2

VCCGT_B+

12

PC1504

PC1503

10U_0603_25V6M

1 2

PC1501

1U_0402_6.3V6K

12

PC1505

PC1506

0.1U_0402_25V6

EMC@

12

PWM1_GT[63]

FCCM_GT[63,65]

PR1502

1_0402_5%

2200P_0402_50V7K

+5VS

12

PWM2_GT[63]

FCCM_GT[63,65]

1_0402_5%

1U_0402_6.3V6K

12

PC1513

10U_0805_25V6K

EMC@

1 2

PC1509

12

0.1U_0402_25V6

PR1514

PC1514

EMC@

2200P_0402_50V7K

C C

12

PC1511

PC1512

10U_0805_25V6K

Pilot.02

PR1501 0_0402_5%@

PR1503 0_0402_5%@

PC1502

0.22U_0603_16V7K

1 2

PR1505

4.7_0603_1%

Pilot.02

PR1513 0_0402_5%@

PR1515 0_0402_5%@

PC1510

0.22U_0603_16V7K

1 2

PR1517

4.7_0603_1%

1 2

PU1500

SIC632CDT1GE3_POWERPAK31_5X5

1 2 3 4 5 6 7 8

9 10 11 12 13

SIC632CDT1GE3_POWERPAK31_5X5

footprint

PU1501

SIC632CDT1GE3_POWERPAK31_5X5

1

2

3

4

5

6

7

8

9 10 11 12 13

SIC632CDT1GE3_POWERPAK31_5X5

footprint

PWM

CGND ZCD_EN# VCIN

DSBL#

CGND

THWn BOOT

VDRV NC

PGND PHASE VIN VIN PGND SW SW SW SW14SW

PWM

CGND ZCD_EN# VCIN

DSBL#

CGND

THWn BOOT

VDRV NC

PGND PHASE VIN VIN PGND SW SW SW SW14SW

28 27

GL

26 25 24 23 22

GL

21

SW

20

SW

19

SW

18

SW

17

SW

16

SW

15

28 27

GL

26 25 24 23 22

GL

21

SW

20

SW

19

SW

18

SW

17

SW

16

SW

15

12

PR1504

10K_0402_1%

VCC_GT_PT1

12

PR1516

10K_0402_1%

VCC_GT_PT2

1 2

PR1512

1_0402_5%

1 2

PT1500 TP@

@EMC@

PT1501 TP@

PR1518

@EMC@

PC1515

@EMC@

PC1523

PR1533

1_0402_5%

4.7U_0402_6.3V6M

1 2

B B

B+

EMC@

PL1504

HCB2012KF-121T50_0805

1 2

PJP1501

@

JUMP_43X118

2

112

12

PC1516

PC1517

PC1518

0.1U_0402_25V6

EMC@

2200P_0402_50V7K

A A

5

+5VS

12

1_0402_5%

PR1531

1 2

PC1520

4.7U_0402_6.3V6M

12

PC1519

10U_0805_25V6K

0.22U_0603_16V7K

1 2

CPU_Vcore controller(36.1),Drivers(36.2), Support component(36.3), GFX output CAP(36.5)

FCCM_SA[63]

PC1522

1 2

PR1527

1_0603_5%

Pilot.02

PR1530

@

0_0402_5%

1 2

PU1503 SIC531CDT1GE3_POWERPAK22_4X3

1

ZCD_EN#

2 3 4 5 6

SIC531CDT1GE3_POWERPAK22_4X3-S

footprint

4

VCIN

CGND CGND BOOT

VDRV PHASE

PGND VIN PGND7VSWH

13 12

PWM

11 10 9

GL

8

1 2

Pilot.02

PR1532

@

0_0402_5%

1 2

PWM_SA [63]

PT1503 TP@

VCC_SA_PT1

PR1524

@EMC@

PC1521

@EMC@

ISUMP_SA[63]

ISUMN_SA[63]

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/02 2013/10/28

12

4.7_1206_5%

12

680P_0603_50V7K

Compal Secret Data

Deciphered Date

5.49 x 5.18 x 3mm

6.25m ohm +-5% DC=12A/ISAT=16A

0.47UH_MMD05CZR47M_12A_20%

1 2

12

PR1528

3.65K_0603_1%

2

PL1505

VCCSA (Base on PDDG rev 0.7) PL2 TDC__default):TBD

+VCCSA

4 3

PL2 TDC_max (40Sec):10A Max Current 11A DC Load line -9.1mV/A AC Load line -9.1mV/A OCP Current 20A

12

PR1529

@

0_0402_5%

Pilot.02

Compal Electronics, Inc.

Title

PWR_VCORE_VGT,VSA

Size Document Number Rev

LA-D993P

Date: Sheet o f

65 70Tuesday, November 08, 2016

1

0.1(X00)

Vinaﬁx.com

A A

Vcc_CORE output CAP(36.4), Vcc_GT output CAP(36.5),

Vcc_SA output CAP(36.6)

5

B B

+VCCGT

470uF*2

47uF*9

22uF*26

1uF*6

.1uF*15

C C

+VCCGT +VCCSA

D D

+VCC_CORE

470uF*2

22uF*15

220uF*1

1uF*6

.1uF*15

+VCC_CORE

5

12

PC1326

.1U_0402_16V7K

12

PC1327

.1U_0402_16V7K

12

PC1328

.1U_0402_16V7K

12

PC1329

.1U_0402_16V7K

12

PC1330

.1U_0402_16V7K

12

Security Classification

PC1331

.1U_0402_16V7K

12

PC1332

.1U_0402_16V7K

12

PC1333

.1U_0402_16V7K

12

PC1334

.1U_0402_16V7K

12

PC1335

.1U_0402_16V7K

12

PC1338

.1U_0402_16V7K

12

PC1339

.1U_0402_16V7K

12

PC1340

.1U_0402_16V7K

12

PC1341

.1U_0402_16V7K

12

PC1342