Compal LA-D801P Schematics Rev1.0
A
1"#%,/$1"'5627'86,/
B
C
D
E
1 1
#"27/$',#7$($!,/-0
9./:;<#71+)0)$$=>?@A
%1!$'"$($2,3+%400+00
-0+4:04:-+
!"#$%&'$($)*+,-.*+/0+
B7C$($+D0$E,00F
$G$($;H:I>I$1>JI>HKHL
;#,G&269G$($;#,$M$269$8NIK
.!/G&9./G$($1%;$8NIK
ZZZ
2 2
PCB BAL20 LA-D801P LS-D801P/D802P/D803P
DAZ1P600100
PCB@
PCB
KBL R3 SKL R3
UC1
Z\:B+
S IC FJ8067702739740 SR2ZV H0 2.7G A31!
SA0000A344L
i7KBL2.7G _R3@
UC1
Z\:B*
FJ8066201930408 SR2EZ D1 2.5G A31!
SA000092P3L
i7SKL2.5G _R3@
71G$($71
O%G&%O%G$($O;#%
7#6G&792G&B5G$($7#6P$792$?HA$B5$1>JI>HKHL
G7#6G&G792G&GB5G$($7#6P$792$?HA$B5$;H:%"%$1>JI>HKHL
1#1G$($Q2%$1>JI>HKHL
1"''G$($1>HHKRL>@$1>JI>HKHL
UC1
Z_:B+
S IC FJ8067702739739 SR2ZU H0 2.5G A31!
3 3
SA0000A374L
i5KBL2.5G _R3@
UC1
Z_:B*
FJ8066201930409 SR2EY D1 2.3G A31!
SA000092O3L
i5SKL2.3G _R3@
8%ST,.7G&'8%ST,.7G$($8>URV%?A$W?XK
.!!/G$($.!$!?RXYZ[VL
*2G&*2G7#6G$($*2$1?JK@?
G*2G$($*2$1?JK@?$;H:%"%$1>JI>HKHL
#+S\0B+G$($]%;$B+
#+S\0B*G$($]%;$B*
-]G&-]S^G&-]S9G&-]S#G$($CB,#$LNIK
)]G&)]S^G&)]S9G&)]S#G$($CB,#$LNIK
Layout Dell logo
4 4
DELL CONFIDENTIAL/PROPRIETARY
COPYRIGHT 2014
ALL RIGHT RESERVED
REV: X00
PWB: 9HTP8
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Confidential for Dell review
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
A
B
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C
D
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
LA-D801P
LA-D801P
LA-D801P
E
A00
A00
A00
161Tuesday, June 21, 2016
161Tuesday, June 21, 2016
161Tuesday, June 21, 2016
A
www.vinaļ¬x.com
B
C
D
E
Block Diagram
DDR4
1 1
VRAM(GDDR5)* 4
GDDR5
GPU
AMD MESO
R16M-M1-70
(15"/17")
25W
(Gen3)
PCIe x 4
Intel CPU
Skylake - U
Kabylake - U
DDR4 1866/2133MHz Channel A
DDR4 1866/2133MHz Channel B
DIS on board
28W (UMA only)
15W (UMA&DIS)
4GB/8GB
SODIMM A
DDR4
4GB/8GB
SODIMM B
HDMI V1.4a
DDI1
PCIe x 1HDMI
PCH-LP
10 USB 2.0/1.1 ports
14.0"/15.6"/17.3"
eDP
(FHD)
2 2
V
14.0"/15.6"
(FHD)
HD Camera
IR Camera
V
USB3.0 x 1
USB2.0 x 1
6 USB 3.0 ports
High Definition Audio
3 SATA ports
6 PCIE ports
LPC I/F
eSPI
I2C x12
PCIe x 1
USB2.0 x 1
LPC BUS
D-MIC
LAN 10/100
RealTek RTL8106E
NGFF WLAN
802.11b/g/n
802.11ac
BT 4.0 1x1
LPC debug port
HDA
2CH SPEAKER
(2CH 2W/4ohm)
MIC_IN/GND
HP_R/L
3 3
Universal Jack
Port 0 (USB3.0)
CODEC
Realtek
ALC3246-CG
Touch
Screen
HDA
USB2.0 x 1
USB3.0 x 1
USB2.0 x 1
SPI
SPI
Flash ROM
16MB
Intel SBA
KBC 1404
SMSC
MEC1404-NU-GP
PS2
Int.
KB
RJ45
Conn.
SMBUS
Thermal
NCT7718W-GP
PWM FAN
PCB Stack
1.2mm/8L
L1:Top
L2:GND
L3:Signal
L4:VCC
L5:Signal
L6:Signal
L7:GND
L8:BOT
Precision Touchpad
ODD
Port 1 (USB3.0)
SB
Right side
USB3.0 x 1
USB2.0 x 1
USB2.0 x 1
I2C
SATA x2
Port 2 (USB2.0)
SB
SB
(Gen3)
4 4
SSD
PCIe x 2 (SATA x 1)
USB2.0 x 1
CardReader
SD 3.0
Realtek
RTS5170
SD Card Slot
(Gen3)
Compal Confidential for Dell review
A
B
C
D
2.5"
HDD
Dell Confidential Document.
Dell Confidential Document.
Dell Confidential Document.
Anyone CANNOT duplicate, modify, forward
Anyone CANNOT duplicate, modify, forward
Anyone CANNOT duplicate, modify, forward
Or any other application without got DELL permmition
Or any other application without got DELL permmition
Or any other application without got DELL permmition
Title
Title
Title
Block Diagram
Block Diagram
Block Diagram
Size Documen t Number Rev
Size Documen t Number Rev
Size Documen t Number Rev
LA-D801P A00
C
LA-D801P A00
C
LA-D801P A00
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
E
261Tuesday, June 21, 2016
261Tuesday, June 21, 2016
261Tuesday, June 21, 2016
5
4
3
2
1
POWER STATES
Signal
State
S0 (Full ON) / M0
D D
S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON
S4 (Suspend to DISK) / M3 ONLOW HIGH
S5 (SOFT OFF) / M3 ONLOW LOW
G3 OFF OFF OFF OFF OFF OFF OFF
SLP
S3#
HIGH
SLP
SLP
S5#
S4#
HIGH HIGH
LOW
LOW
ALWAYS
PLANE
ON
SUS
PLANE
ON
ON
OFF
OFF OFF
RUN
PLANE
ON ON
OFF
OFF
OFF
CLOCKS
OFF
OFF
PM TABLE
+RTC_CELL B+
C C
State
power
plane
+1.0V_PRIM
+1.0V_MPHYGT
+1.8V_PRIM
+3VALW
+3VALW_PCH
+3.3V_ALW_DSW
+5VALW
+1.0V_VCCST
+1.2V_DDR
+2.5V_MEM
+1.0VS_VCCIO
+1.0V_VCCSTG
+VCC_GT
+VCC_SA
+VGA_CORE
+VCC_CORE
+0.6V_DDR_VTT
;9!$%"B8` 27986',86"'
+
-
*
)
_
4
\
a
b
+0
27986',86"'
;9!*D0$%>@L+
;9!*D0$%>@L-
6"&2!
'&,
112
1?@A$BK?AK@
8>URV$9R@KKH
!8
'&,
'&,
;9!*D0
;9!*D0:+
;9!*D0:-
;9!*D0:*
;9!*D0:)
;9!*D0:_
;9!*D0:4
9961
9961:+
%167
%167:+
%167:-
%167:*
%167:)
%167:_
%167:4
%167:\
%167:a
%167:b
%167:+0
%167:++
%167:+-
9,8,
9,8,:0
9,8,:+
9,8,:+c
9,8,:-
;9!*D0$%>@L+
;9!*D0$%>@L-
*2$1?JK@?9961:-
'&,
]%;
]%;
]%;
]%;
T/,'
+0&+00#$/,'
9,8,$^22
9,8,$"22
'&,
'&,
'&,
'&,
Board ID & Model ID table
%UYY:A>WH6LKJ %UYY:UI C>YL?[K
S0
S3
ON
ON
ON
ON
ON
ON ON
ON
OFFON
-
*
)
+
M3
ON
ON
ON
ON
OFF
_
4
S4&S5 / AC
B B
S4&S5 / AC doesn't exist
ON
ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
\
a
b
G3 OFF OFF OFF
ON
OFF
+0
++
+-
+*
+)
+_
+4
+\
+a
+b
+00
+00
+00
+00
+00
+00
+00
+00
+00
+00
+00
+00
+00
+00
+00
+00
+00
+00
+00
+0D0
+*D\
+\Da
--D+
-\D0
*-D)
*\D)
)bDb
_\D4
4)Db
\*D-
a-D_
b*D+
+0\D0
+-0D0
+*\D0
+_)D0
-00D0
-*-D0
*D000
-Db0-
-Da0+
-D\0*
-D_ba
-D)b-
-D)0-
-D-0+
-D0b)
-D00+
+Db0_
+Da0a
+D\0b
+D_b)
+D_00
+D*b-
+D-bb
+D+00
0Dbb)
!>?@A$62&#>AKY$62
EVT
DVT1
DVT2
Pilot
A A
Compal Confidential for Dell review
Title
Title
Title
Size Documen t Number Rev
Size Documen t Number Rev
Size Documen t Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Index and Configuration
Index and Configuration
Index and Configuration
LA-D801P
LA-D801P
LA-D801P
1
361Tuesday, June 21, 2016
361Tuesday, June 21, 2016
361Tuesday, June 21, 2016
A00
A00
A00
5
CPU PWR
GPU PWR
Peripheral Device PWR
D D
ADAPTER
PJP206
PJP301
RT8207PGQW
(PU200)
0.6V_DDR_VTT_ON
@SIO_SLP_SUS#
SYX196DQNC
(PU301)
SIO_SLP_S4#
4
PJP200
+1.2VP +1.2V_DDR
PJP203
+0.6VSP
PJP302POK
+1VALWP
+0.6V_DDR_VTT
+1.0V_PRIM
3
TPS22961
(UZ2)
0ohm 0603
(RC174)
TPS22967
(UZ1)
SIO_SLP_S3#
SIO_SLP_S0#
SIO_SLP_S4#
+1.0V_VCCSTG
+1.0V_MPHYGT
+1.0V_VCCST
2
JP1
3.5A 3.4A
2.8A
P.18
Volume
+1.0VS_VCCIO
240mA
1
EM5209VF
CHARGER
ISL95521HRZ
(PU703)
BATTERY
C C
ISL95859HRTZ
(PU602)
ISL95808HRZ
(PU606)
B B
IMVP_V R_ON IMVP_V R_ON
AOZ5019QI
(PU603)
+PWR_SRC
(+19VB)
AOZ5019QI
(PU604)
AOZ5019QI
(PU605)
PJP1401
SYX196DQNC
DGPU_PWROK
(PU1400)
PJP106 ENLDO_3V5V
SY8286CRAC
EN_5V
(PU102)
PJP105
SY8286BRAC
(PU100)
EN_3V
ENLDO_3V5V
+3VALWP
U23@
+3VLP
DRMOS_EN
+1.35VGPUP
PJP1402
+1.35V_MEM_GFX
AP22802BW5
(UU1)
+5VALWP
PJP103
+5VALW
AP22802BW5
VL 0ohm 0805
(UU3)
EM5209VF
(UZ3)
TPS22967DSGR
(UX1)
PJP102
+3VALW
BAS40C
(D1)
+RTC_CELL
(UZ5)
JP14
EM5209VF
(UZ3)
JP9
USB_EN#
USB_EN#
SIO_SLP_S3#
3D_CAM_EN
SIO_SLP_S3#
JP7
DGPU_PWR_EN
JP4
JP5
+0.95VSDGPU
USB30_VCCA
USB20_VCCA
+5VS
+5V_CAM
+3VS
+3VALW_PCH
0ohm 0805
(RA1)
0ohm 0805
(RS2)
(RS3)
FUSE 1.1A_6V
(FI1)
FUSE 0.5A_13.2V
(F3)
RT9724GB
(U1)
0ohm 0805
(RW3)
EM5209VF
(UZ4)
EDP_VDD_EN
or
LCD_TST
DGPU_PWR_EN
+5V_PVDD
+5V_HDD_S0
+5V_ODD_S0
+5V_HDMI
+5V_KB_BL
+LCDVDD
+3.3V_WLAN
JP6
+3VGS
+VCC_SA
+VCC_CORE
ISL62771HRTZ
(PU1100)
DGPU_PWR_EN
+VCC_GT
+RTC_VCC
PJP501
PJP801
PJP1201
RT8061AZQW
(PU500)
RT9059GSP
(PU800)
NB681GD-Z
(PU1200)
E'"':29*F
+1.8VALWP +1.8V_PRIM
E29*F
@SIO_SLP_SUS#
SIO_SLP_S4# PJP802
+2.5VP +2.5V_MEM
SIO_SLP_S3# PJP1202
U23@
+1.0VS_VCCOPCP
PJP502POK
EM5209VF
(UZ5)
+1.0VS_VCCOPC
JP8
DGPU_PWR_EN
+1.8VGS
+VGA_CORE
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Power Rail
Power Rail
Power Rail
LA-D801P
LA-D801P
LA-D801P
1
461Tuesday, June 21, 2016
461Tuesday, June 21, 2016
461Tuesday, June 21, 2016
A00
A00
A00
Compal Confidential for Dell review
5
+X$>VJ
4
3
-D-X$>VJ
2
1
SKL-U
R7
9#!1/.
9#!2,8,
D D
9#/01/.
9#/02,8,
9#/+1/.
9#/+2,8,
U6 U7
C C
-D-X$>VJ G
+3VALW_EC
-D-X$>VJ
9#/+1/.
9#/+2,8,
9#!1/.
R8
9#!2,8,
R9
W2
9#/0S9#!2,8,
W3
9#/+1/.
V3
9#/+2,8,
6-1S92,S8%
6-1S91/S8%
G
+X$>VJ
+X$>VJ
+X$>VJ
+X$>VJ9#/0S9#!1/.
+X$>VJ
+3VALW_PCH
2#'442
+3VALW_PCH
+3VALW_PCH
9#/+1/.
9#/+2,8,
2#'442
269G
)_D*X$>VJ
269G
)_D*X$>VJ
C],S9#!S1.*
C],S9#!S2,*
2#'442
%1^S9#!1/.
%1^S9#!2,8
+3VGS
U7
U8
9#!1/.
A]%;
9#!2,8,
-D-X$>VJ
-D-X$>VJ
8^#S9#/+S1/.
8^#S9#/+S2,8,
-D-X$>VJ
7Q"
+3VS
+3VS
%1^S9#!1/.
%1^S9#!2,8
%1^S9#!1/.
%1^S9#!2,8
SMBus Address: 0x41 / 0x41
8
91/
8VK@J?Y
7
92,
'18\\+aT
SMBus Address: 1001100xb (x is R/W bit)
253
254
253
254
91/
92,
91/
92,
26##,
22B)
26##!
22B)
SMBus Address: 000
SMBus Address: 010
12 11
SMB02_CLK
MEC 1404
B B
SMB02_DATA
KBC
SMB01_CLK
SMB01_DATA
PS2_CLK0
PS2_DAT0
78
79
9
8
1/.S8%S96"
2,8S8%S96"
%!,8S1^]S9#!1/.
%!,8S1^]S9#!2,8
)D\X$>VJ
)D\X$>VJ
6-1S91/S8%
6-1S92,S8%
)D\X$>VJ
)D\X$>VJ
)D\X$>VJ
)D\X$>VJ
+3VS
2#'442
TP_VDD
+3VALW_EC
+00$>VJ
+00$>VJ
1/.S9#!
2,8S9#!
6
91/
!,88$$1"''
5
92,
-D-X$>VJ
-D-X$>VJ
6-1S91/S8%Sd
6-1S92,S8%Sd
1/.S8%S96"
2,8S8%S96"
TP_VDD
3
2
8
7
8%$1"''
SMBus Address: $2C
SMBus Address: 0x01
A A
0$>VJ
0$>VJ
Compal Confidential for Dell review
5
4
3
92,
4
69/b__-+^B3:8
91/
1V?@[K@
SMBus Address: 0001001 (R/W#)
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SMbus Block diagram
SMbus Block diagram
SMbus Block diagram
LA-D801P
LA-D801P
LA-D801P
1
561Tuesd ay, Ju ne 21, 20 16
561Tuesd ay, Ju ne 21, 20 16
561Tuesd ay, Ju ne 21, 20 16
A00
A00
A00
5
4
3
2
1
+3VS
PCH_HDMI_CLK
RC1 2.2K_0402_5%
RC2 2.2K_0402_5%
D D
RC3 10K_0402_5%
12
PCH_HDMI_DATA
12
WLAN_RADIO_DIS#
12
+1.0VS_VCCIO
HDMI_DATA2#[33]
HDMI_DATA2[33]
HDMI_DATA1#[33]
HDMI_DATA1[33]
HDMI_DATA0#[33]
HDMI_DATA0[33]
HDMI_CLK#[33]
HDMI_CLK[33]
PCH_HDMI_CLK[33]
PCH_HDMI_DATA[33]
1 2
RC4 24.9_0402_1%
PCH_HDMI_CLK
PCH_HDMI_DATA
EDP_COMP
COMPENSATION PU FOR eDP
CAD Note:Min trace width=5 mils ,Spacing=25mil,
Max length=600 mils.
C C
UC1A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_ CTRLCLK
N8
GPP_E21/DDPC_ CTRLDATA
N11
GPP_E22/DDPD_ CTRLCLK
N12
GPP_E23/DDPD_ CTRLDATA
E52
EDP_RCOMP
SKL-U_BGA1356
SKL-U Ballout Rev0.71 & INTEL symbol Rev1.0
SKL-U
DDI
DISPLAY SIDEBANDS
1 OF 20
EDP
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP
GPP_E13/DDPB_HPD0
GPP_E14/DDPC_ HPD1
GPP_E15/DDPD_ HPD2
GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
C47
C46
D46
C45
A45
B45
A47
B47
E45
F45
B52
G50
F50
E48
F48
G46
F46
L9
L7
L6
N9
L10
R12
R11
U13
CPU_DP3_AUXN
CPU_DP3_AUXP
L_BKLT_EN_EC
EDP_TX0_DN [28]
EDP_TX0_DP [28]
EDP_TX1_DN [28]
EDP_TX1_DP [28]
EDP_AUX_DN [28]
EDP_AUX_DP [28]
TP1
TP2
HDMI_HPD [33]
SIO_EXT_SMI# [25]
EDP_HPD [28]
L_BKLT_EN_EC [25]
L_BKLT_CTRL [28]
EDP_VDD_EN [28]
SIO_EXT_SMI#
L_BKLT_EN_EC
RC5 10K_0402_5%
RC6 100K_0402_5%
+3VALW_PCH
12
12
UC1I
CSI-2
A36
CSI2_DN0
B36
CSI2_DP0
C38
CSI2_DN1
D38
CSI2_DP1
C36
CSI2_DN2
D36
CSI2_DP2
A38
B B
A A
CSI2_DN3
B38
CSI2_DP3
C31
CSI2_DN4
D31
CSI2_DP4
C33
CSI2_DN5
D33
CSI2_DP5
A31
CSI2_DN6
B31
CSI2_DP6
A33
CSI2_DN7
B33
CSI2_DP7
A29
CSI2_DN8
B29
CSI2_DP8
C28
CSI2_DN9
D28
CSI2_DP9
A27
CSI2_DN10
B27
CSI2_DP10
C27
CSI2_DN11
D27
CSI2_DP11
SKL-U_BGA1356
SKL_ULT
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
EMMC
GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
EMMC_RCOMP
9 OF 20
C37
D37
C32
D32
C29
D29
B26
A26
CSI2_COMP
E13
WLAN_RADIO_DIS#
B7
AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1
AM2
AM3
AP4
EMMC_RCOMP
AT1
1 2
RC7 100_0402_1%
1 2
RC8 200_0402_1%
WLAN_RADIO_DIS# [32]
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Confidential for Dell review
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
MCP(1/14)DDI,EDP,CSI2,EMMC
MCP(1/14)DDI,EDP,CSI2,EMMC
MCP(1/14)DDI,EDP,CSI2,EMMC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LA-D801P
LA-D801P
LA-D801P
1
A00
A00
A00
661Tuesday, June 21, 2016
661Tuesday, June 21, 2016
661Tuesday, June 21, 2016
5
DDR4 Interleaved Memory
4
3
2
1
UC1B
DDR_A_D0
DDR_A_D1
D D
DDR_A_D[16..31][20]
DDR_A_D[32..47][20]
C C
DDR_A_D[48..63][20]
B B
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
SKL-U_BGA1356
SKL-U
DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]
DDR CH - A
DDR0_MA[3]
DDR0_MA[4]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR0_ALERT#
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR_VTT_CNTL
DDR0_PAR
2 OF 20
UC1C
DDR_A_CLK#0
AU53
DDR_A_CLK0
AT53
DDR_A_CLK#1
AU55
DDR_A_CLK1
AT55
DDR_A_CKE0
BA56
DDR_A_CKE1
BB56
DDR_A_CKE2
AW56
DDR_A_CKE3
AY56
DDR_A_CS#0
AU45
DDR_A_CS#1
AU43
DDR_A_ODT0
AT45
DDR_A_ODT1 DDR_B_ODT0
AT43
DDR_A_MA5
BA51
DDR_A_MA9
BB54
DDR_A_MA6
BA52
DDR_A_MA8
AY52
DDR_A_MA7
AW52
DDR_A_BG0
AY55
DDR_A_MA12
AW54
DDR_A_MA11
BA54
DDR_A_ACT#
BA55
DDR_A_BG1
AY54
DDR_A_MA13
AU46
DDR_A_CAS#
AU48
DDR_A_WE#
AT46
DDR_A_RAS#
AU50
DDR_A_BS0
AU52
DDR_A_MA2
AY51
DDR_A_BS1
AT48
DDR_A_MA10
AT50
DDR_A_MA1
BB50
DDR_A_MA0
AY50
DDR_A_MA3
BA50
DDR_A_MA4
BB52
DDR_A_DQS#0
AM70
DDR_A_DQS0
AM69
DDR_A_DQS#1
AT69
DDR_A_DQS1
AT70
DDR_A_DQS#2
BA64
DDR_A_DQS2
AY64
DDR_A_DQS#3
AY60
DDR_A_DQS3
BA60
DDR_A_DQS#4
BA38
DDR_A_DQS4
AY38
DDR_A_DQS#5
AY34
DDR_A_DQS5
BA34
DDR_A_DQS#6
BA30
DDR_A_DQS6
AY30
DDR_A_DQS#7
AY26
DDR_A_DQS7
BA26
DDR_A_ALERT#
AW50
DDR_A_PAR
AT52
AY67
AY68
BA67
DDR_VTT_CNTL
AW67
DDR_A_CLK#0 [20]
DDR_A_CLK0 [20]
DDR_A_CLK#1 [20]
DDR_A_CLK1 [20]
DDR_A_CKE0 [20]
DDR_A_CKE1 [20]
TP3
TP4
DDR_A_CS#0 [20]
DDR_A_CS#1 [20]
DDR_A_ODT0 [20]
DDR_A_ODT1 [20]
DDR_A_MA5 [20]
DDR_A_MA9 [20]
DDR_A_MA6 [20]
DDR_A_MA8 [20]
DDR_A_MA7 [20]
DDR_A_BG0 [20]
DDR_A_MA12 [20]
DDR_A_MA11 [20]
DDR_A_ACT# [20]
DDR_A_BG1 [20]
DDR_A_MA13 [20]
DDR_A_CAS# [20]
DDR_A_WE# [20]
DDR_A_RAS# [20]
DDR_A_BS0 [20]
DDR_A_MA2 [20]
DDR_A_BS1 [20]
DDR_A_MA10 [20]
DDR_A_MA1 [20]
DDR_A_MA0 [20]
DDR_A_MA3 [20]
DDR_A_MA4 [20]
DDR_A_DQS#0 [20]
DDR_A_DQS0 [20]
DDR_A_DQS#1 [20]
DDR_A_DQS1 [20]
DDR_A_DQS#2 [20]
DDR_A_DQS2 [20]
DDR_A_DQS#3 [20]
DDR_A_DQS3 [20]
DDR_A_DQS#4 [20]
DDR_A_DQS4 [20]
DDR_A_DQS#5 [20]
DDR_A_DQS5 [20]
DDR_A_DQS#6 [20]
DDR_A_DQS6 [20]
DDR_A_DQS#7 [20]
DDR_A_DQS7 [20]
DDR_A_ALERT#[20]
DDR_A_PAR [20] DDR_B_ALERT# [21]
+V_DDR_REFA_R
+V_DDR_REFB_R
DDR_B_D[0..15][21]DDR_A_D[0..15][20]
DDR_B_D[16..31][21]
DDR_B_D[32..47][21]
DDR_B_D[48..63][21]
DDR0_PAR,DDR0_ALERT# for
DDR4
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
AF65
DDR1_DQ[0]/DDR0_DQ[16]
AF64
DDR1_DQ[1]/DDR0_DQ[17]
AK65
DDR1_DQ[2]/DDR0_DQ[18]
AK64
DDR1_DQ[3]/DDR0_DQ[19]
AF66
DDR1_DQ[4]/DDR0_DQ[20]
AF67
DDR1_DQ[5]/DDR0_DQ[21]
AK67
DDR1_DQ[6]/DDR0_DQ[22]
AK66
DDR1_DQ[7]/DDR0_DQ[23]
AF70
DDR1_DQ[8]/DDR0_DQ[24]
AF68
DDR1_DQ[9]/DDR0_DQ[25]
AH71
DDR1_DQ[10]/DDR0_DQ[26]
AH68
DDR1_DQ[11]/DDR0_DQ[27]
AF71
DDR1_DQ[12]/DDR0_DQ[28]
AF69
DDR1_DQ[13]/DDR0_DQ[29]
AH70
DDR1_DQ[14]/DDR0_DQ[30]
AH69
DDR1_DQ[15]/DDR0_DQ[31]
AT66
DDR1_DQ[16]/DDR0_DQ[48]
AU66
DDR1_DQ[17]/DDR0_DQ[49]
AP65
DDR1_DQ[18]/DDR0_DQ[50]
AN65
DDR1_DQ[19]/DDR0_DQ[51]
AN66
DDR1_DQ[20]/DDR0_DQ[52]
AP66
DDR1_DQ[21]/DDR0_DQ[53]
AT65
DDR1_DQ[22]/DDR0_DQ[54]
AU65
DDR1_DQ[23]/DDR0_DQ[55]
AT61
DDR1_DQ[24]/DDR0_DQ[56]
AU61
DDR1_DQ[25]/DDR0_DQ[57]
AP60
DDR1_DQ[26]/DDR0_DQ[58]
AN60
DDR1_DQ[27]/DDR0_DQ[59]
AN61
DDR1_DQ[28]/DDR0_DQ[60]
AP61
DDR1_DQ[29]/DDR0_DQ[61]
AT60
DDR1_DQ[30]/DDR0_DQ[62]
AU60
DDR1_DQ[31]/DDR0_DQ[63]
AU40
DDR1_DQ[32]/DDR1_DQ[16]
AT40
DDR1_DQ[33]/DDR1_DQ[17]
AT37
DDR1_DQ[34]/DDR1_DQ[18]
AU37
DDR1_DQ[35]/DDR1_DQ[19]
AR40
DDR1_DQ[36]/DDR1_DQ[20]
AP40
DDR1_DQ[37]/DDR1_DQ[21]
AP37
DDR1_DQ[38]/DDR1_DQ[22]
AR37
DDR1_DQ[39]/DDR1_DQ[23]
AT33
DDR1_DQ[40]/DDR1_DQ[24]
AU33
DDR1_DQ[41]/DDR1_DQ[25]
AU30
DDR1_DQ[42]/DDR1_DQ[26]
AT30
DDR1_DQ[43]/DDR1_DQ[27]
AR33
DDR1_DQ[44]/DDR1_DQ[28]
AP33
DDR1_DQ[45]/DDR1_DQ[29]
AR30
DDR1_DQ[46]/DDR1_DQ[30]
AP30
DDR1_DQ[47]/DDR1_DQ[31]
AU27
DDR1_DQ[48]
AT27
DDR1_DQ[49]
AT25
DDR1_DQ[50]
AU25
DDR1_DQ[51]
AP27
DDR1_DQ[52]
AN27
DDR1_DQ[53]
AN25
DDR1_DQ[54]
AP25
DDR1_DQ[55]
AT22
DDR1_DQ[56]
AU22
DDR1_DQ[57]
AU21
DDR1_DQ[58]
AT21
DDR1_DQ[59]
AN22
DDR1_DQ[60]
AP22
DDR1_DQ[61]
AP21
DDR1_DQ[62]
AN21
DDR1_DQ[63]
SKL-U_BGA1356
SKL-U
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR CH - B
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_ODT[1]
DDR1_MA[3]
DDR1_MA[4]
DDR1_ALERT#
DDR1_PAR
3 OF 20
DDR_B_CLK#0
AN45
AN46
AP45
AP46
AN56
AP55
AN55
AP53
BB42
AY42
BA42
AW42
AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52
BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47
AH66
AH65
AG69
AG70
AR66
AR65
AR61
AR60
AT38
AR38
AT32
AR32
AR25
AR27
AR22
AR21
AN43
AP43
AT13
AR18
AT18
AU18
DDR_B_CLK#1
DDR_B_CLK0
DDR_B_CLK1
DDR_B_CKE0
DDR_B_CKE1
DDR_B_CKE2
DDR_B_CKE3
DDR_B_CS#0
DDR_B_CS#1
DDR_B_ODT1
DDR_B_MA5
DDR_B_MA9
DDR_B_MA6
DDR_B_MA8
DDR_B_MA7
DDR_B_BG0
DDR_B_MA12
DDR_B_MA11
DDR_B_ACT#
DDR_B_BG1
DDR_B_MA13
DDR_B_CAS#
DDR_B_WE#
DDR_B_RAS#
DDR_B_BS0
DDR_B_MA2
DDR_B_BS1
DDR_B_MA10
DDR_B_MA1
DDR_B_MA0
DDR_B_MA3
DDR_B_MA4
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_ALERT#
DDR_B_PAR
H_DRAMRST#
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
DDR_B_CLK#0 [21]
DDR_B_CLK#1 [21]
DDR_B_CLK0 [21]
DDR_B_CLK1 [21]
DDR_B_CKE0 [21]
DDR_B_CKE1 [21]
DDR_B_CS#0 [21]
DDR_B_CS#1 [21]
DDR_B_ODT0 [21]
DDR_B_ODT1 [21]
DDR_B_MA5 [21]
DDR_B_MA9 [21]
DDR_B_MA6 [21]
DDR_B_MA8 [21]
DDR_B_MA7 [21]
DDR_B_BG0 [21]
DDR_B_MA12 [21]
DDR_B_MA11 [21]
DDR_B_ACT# [21]
DDR_B_BG1 [21]
DDR_B_MA13 [21]
DDR_B_CAS# [21]
DDR_B_WE# [21]
DDR_B_RAS# [21]
DDR_B_BS0 [21]
DDR_B_MA2 [21]
DDR_B_BS1 [21]
DDR_B_MA10 [21]
DDR_B_MA1 [21]
DDR_B_MA0 [21]
DDR_B_MA3 [21]
DDR_B_MA4 [21]
DDR_B_DQS#0 [21]
DDR_B_DQS0 [21]
DDR_B_DQS#1 [21]
DDR_B_DQS1 [21]
DDR_B_DQS#2 [21]
DDR_B_DQS2 [21]
DDR_B_DQS#3 [21]
DDR_B_DQS3 [21]
DDR_B_DQS#4 [21]
DDR_B_DQS4 [21]
DDR_B_DQS#5 [21]
DDR_B_DQS5 [21]
DDR_B_DQS#6 [21]
DDR_B_DQS6 [21]
DDR_B_DQS#7 [21]
DDR_B_DQS7 [21]
DDR_B_PAR [21]
H_DRAMRST# [20]
DDR1_PAR,DDR1_ALERT# for DDR4
TP5
TP6
Buffer with Open Drain Output For VTT power control
+1.2V_DDR +3VS
0.1U_0402_16V7K
UC2
1
DDR_VTT_CNTL
A A
NC
2
A
3
GND
74AUP1G07GW_TSSOP5
BUFFER
Main: SA00005U600
2nd: SA00007UR00
12
VCC
CC1
Y
12
5
4
RC9
100K_0402_5%
1
2
0.6V_DDR_VTT_ON [53]
@
CC90
100P_0402_50V8J
DDR4 COMPENSATION SIGNALS
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
CAD Note:
Trace width=12~15 mil, Spacing=20 mils
Max trace length= 500 mil
1 2
RC10 121_0402_1%
1 2
RC11 80.6_0402_1%
1 2
RC12 100_0402_1%
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Confidential for Dell review
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
MCP(2/14)DDR4
MCP(2/14)DDR4
MCP(2/14)DDR4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LA-D801P
LA-D801P
LA-D801P
1
761Tuesday, June 21, 2016
761Tuesday, June 21, 2016
761Tuesday, June 21, 2016
A00
A00
A00
5
4
3
2
1
+3VS
12
RC181
@
10K_0402_5%
ONE_DIMM#
12
D D
RC182
10K_0402_5%
PCH_SPI_CS#0_R1[25]
26##$2KLKRL
@
1 2
MOW WW06
+3VS
12
RC13
10K_0402_5%
+3VS
12
PCH_SPI_CS#0_R1
RC14 10K_040 2_5%
^6]^
/"T
C C
+$26##
-$26##
SIO_RCIN#[25]
+3VALW_PCH +3.3V_SPI
RC17 0_060 3_5%
+3.3V_SPI
RC18 4.7K_04 02_5%
+3.3V_SPI
SPI_MOSI= SPI_IO0
SPI_MISO= SPI_IO1
PCH EDS R0.7 p.235~236
PCH_SPI_CLK_R1
PCH_SPI_D1_R1
PCH_SPI_D0_R1
PCH_SPI_D2_R1
PCH_SPI_D3_R1
PCH_SPI_CS#0_R1
SERIRQ[25]
1 2
ONE_DIMM#
AV2
AW3
AV3
AW2
AU4
AU3
AU2
AU1
AW13
AY11
M2
M3
J4
V1
V2
M1
G3
G2
G1
SKL-U_BGA1356
UC1E
SPI - FLASH
SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0#
SPI0_CS1#
SPI0_CS2#
SPI - TOUCH
GPP_D1/SPI1_CLK
GPP_D2/SPI1_MISO
GPP_D3/SPI1_MOSI
GPP_D21/SPI1_IO2
GPP_D22/SPI1_IO3
GPP_D0/SPI1_CS#
C LINK
CL_CLK
CL_DATA
CL_RST#
GPP_A0/RCIN#
GPP_A6/SERIRQ
PCH
SKL-U
SMBUS, SMLINK
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_B23/SML1ALERT#/PCHHOT#
LPC
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
XDP_SPI_SI[14]
XDP_SPI_IO2[14]
RC40/41 place to within 110 0 mil of SPIO_MOSI/SPI0_IO2 p in for XDP
PCH_SPI_D1_R1
PCH_SPI_D0_R1
PCH_SPI_CLK_R1
PCH_SPI_D3_R1
PCH_SPI_D2_R1 PCH_SPI_D2_R
RC40 1K_0402_1%CMC@
RC41 1K_0402_1%CMC@
RC22 33_0402_ 5%
1 2
1 2
RC23 33_0402_ 5%
1 2
RC24 33_0402_ 5%
1 2
RC25 33_0402_ 5%
1 2
RC26 33_0402_ 5%
GPP_C7/SML1DATA
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
1 2
1 2
R7
R8
R10
R9
W2
W1
W3
V3
AM7
AY13
BA13
BB13
AY12
BA12
BA11
AW9
AY9
AW11
5 OF 20
PCH_SPI_D0_R1
PCH_SPI_D2_R1
PCH_SPI_D1_R
PCH_SPI_D0_R
PCH_SPI_CLK_R
PCH_SPI_D3_R
SMBCLK
SMBDATA
PCH_SMB_ALERT#
SML0_SMBCLK
SML0_SMBDATA
GPP_C5
SML1CLK
SML1DATA
GPP_B23
SUS_STAT#/LPCPD#
PCI_CLK_LPC1
CLKRUN#
PCH_SPI_D1_R [25]
PCH_SPI_D0_R [25]
PCH_SPI_CLK_R [25]
SMBCLK
SMBDATA
SML1CLK [25,30,41]
SML1DATA [25,30,41]
LPC_LAD0 [25]
LPC_LAD1 [25]
LPC_LAD2 [25]
LPC_LAD3 [25]
LPC_LFRAME# [25]
RC15EMI@ 22_0402_5%
CLKRUN# [25]
RC16EMI@ 22_0402_5%
1 2
1 2
+3VS
QC1A
2
DMN66D0LDW-7_SO T363-6
6
5
3 4
QC1B
DMN66D0LDW-7_SO T363-6
1
SML1 -> EC,DGPU,THM
SML1CLK => GPU_THM_SMBCLK
SML1DATA => GPU_THM_SMBDAT
1
CC88
@RF@
10P_0402_50V8J
2
PCH_SMBCLK [20,21]
PCH_SMBDATA [20,21]
CLK_PCI_LPC_MEC [25]
CLK_PCI_LPDEBUG [2 5]
SMB -> DDR4
PCH_SMBDATA
PCH_SMBCLK
SMBCLK
SMBDATA
SML1CLK
SML1DATA
SML0_SMBCLK
SML0_SMBDATA
SUS_STAT#/LPCPD#
CLKRUN#
12
RC272.2K_0402_5%
12
RC282.2K_0402_5%
+3VALW_PCH
1 2
RC29 1K_0402 _5%
1 2
RC30 1K_0402 _5%
1 2
RC31 1K_0402 _5%
1 2
RC32 1K_0402 _5%
1 2
RC33 1K_0402 _5%
1 2
RC34 1K_0402 _5%
@
1 2
RC35 8.2K_04 02_5%
+3VS
1 2
RC36 8.2K_04 02_5%
+3VS
+3VALW_PCH
@
@
PCH_SPI_D2_R1
PCH_SPI_D3_R1
1 2
RC19 1K_0402_5%
1 2
RC20 1K_0402_5%
6HLD$%2D
PCH_SMB_ALERT#
1 2
RC37 8.2K_04 02_5%
8/9$1"'5627'86,/68e
^6]^
B B
+3.3V_SPI
CC3
1 2
0.1U_0402_25V6
1 2
RC178 15_0402 _1%
1 2
RC179 15_0402 _1%
RC180 15_0402 _1%
1 2
PCH_SPI_CLK_R
PCH_SPI_D0_R
PCH_SPI_D1_R
PCH_SPI_CLK_R
1 2
1 2
33_0402_5%
RC21
@EMI@
33P_0402_50V8J
CC2
@EMI@
PCH_SPI_D3_R
1 2
RC176 15_0402 _1%
1 2
RC177 15_0402 _1%
PCH_SPI_CS#0_R1
PCH_SPI_D2_0_RPCH_SPI_D2_R
PCH_SPI_D3_0_R
UC3
1
CS#
3
WP#
7
HOLD#
4
GND
W25Q128FVSIQ_SO8
VCC
SCLK
SI/SIO0
SO/SIO1
128Mb Flash ROM
8
PCH_SPI_CLK_0_R
6
PCH_SPI_D0_0_R
5
PCH_SPI_D1_0_R
2
/"TE275,;/8F
6HLD$%2D
GPP_C5
71$ZHLK@f?RK
^6]^
/"TE275,;/8F
#>AZfN$C?YUK$L>$+_0X$f>@$TT_-$#"T
-0+_&0*&0*$O?g>H
GPP_B23
7',!/7
269,!/7
+3VALW_PCH
1 2
@
RC38 10K_040 2_5%
79%6
/%1
+3VALW_PCH
1 2
CMC@
RC39 150K_0402_5%
7Q6$!""8$98,//$!e%,99
^6]^
A A
/"TE275,;/8F
7',!/7
269,!/7
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
Compal Confidential for Dell review
5
4
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
MCP(3/14)SPI,SMB,LPC
MCP(3/14)SPI,SMB,LPC
MCP(3/14)SPI,SMB,LPC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LA-D801P
LA-D801P
LA-D801P
1
A00
A00
A00
861Tuesday, June 21, 2 016
861Tuesday, June 21, 2 016
861Tuesday, June 21, 2 016
5
4
3
2
1
+3VALW_PCH
UC1F
LPSS ISH
AN8
GPP_B15/GSPI0_CS#
AP7
VBIOS_ID1
NRB_BIT
D D
+3VS
1 2
RC42 10K_0402_5%
@
RC43 49.9K_0402_1%
C C
3D_CAM_EN_PCH
FW_UPDATE_PCH
+3VALW_PCH
BLUETOOTH_EN
LPSS_UART2_CTS#
12
3D@
1 2
DX2 RB751S40T1G_SOD523-2
3D@
1 2
DX3 RB751S40T1G_SOD523-2
SIO_EXT_WAKE#[25]
3D_CAM_EN [25,37]
FW_UPDATE [25,37]
For 3D-CAM 2015/Jason
DBC_EN[28]
BLUETOOTH_EN[32]
I2C_S DA_TP[30]
I2C_S CL_TP[3 0]
DBC_EN
3D_CAM_EN_PCH
FW_UPDATE_PCH
BLUETOOTH_EN
BOARD_ID2
LPSS_UART2_CTS#
GPP_B16/GSPI0_CLK
AP8
GPP_B17/GSPI0_MISO
AR7
GPP_B18/GSPI0_MOSI
AM5
GPP_B19/GSPI1_CS#
AN7
GPP_B20/GSPI1_CLK
AP5
GPP_B21/GSPI1_MISO
AN5
GPP_B22/GSPI1_MOSI
AB1
GPP_C8/UART0_RXD
AB2
GPP_C9/UART0_TXD
W4
GPP_C10/UART0_R TS#
AB3
GPP_C11/UART0_C TS#
AD1
GPP_C20/UART2_R XD
AD2
GPP_C21/UART2_TXD
AD3
GPP_C22/UART2_R TS#
AD4
GPP_C23/UART2_C TS#
U7
GPP_C16/I2C0_SD A
U6
GPP_C17/I2C0_SC L
U8
GPP_C18/I2C1_SD A
U9
GPP_C19/I2C1_SC L
AH9
GPP_F4/I2C2_SDA
AH10
GPP_F5/I2C2_SCL
AH11
GPP_F6/I2C3_SDA
AH12
GPP_F7/I2C3_SCL
AF11
GPP_F8/I2C4_SDA
AF12
GPP_F9/I2C4_SCL
SKL-U_BGA1356
SKL-U
GPP_D9
GPP_D10
GPP_D11
GPP_D12
GPP_D5/ISH_I2C0_SD A
GPP_D6/ISH_I2C0_SC L
GPP_D7/ISH_I2C1_SD A
GPP_D8/ISH_I2C1_SC L
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL /ISH_I2C2_SCL
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C12/UART1_R XD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_R TS#/ISH_UART1_RTS#
GPP_C15/UART1_C TS#/ISH_UART1_CTS#
GPP_D15/ISH_UART0_RTS#
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A12/BM_BUSY#/ISH_GP6
PROJECT_ID1
PROJECT_ID2
GPP_A23/ISH_GP5
+3VS
12
12
6 OF 20
@
RC51
10K_0402_5%
@
RC52
10K_0402_5%
CAM_DETECT#
P2
DGPU_HOLD_RST#
P3
IR_CA M_DETE CT#
P4
RTC_DET#
P1
M4
N3
N1
N2
AD11
AD12
DGPU_PWR_EN
U1
U2
U3
U4
AC1
AC2
AC3
AB4
PROJECT_ID1
AY8
PROJECT_ID2
BA8
BB7
BOARD_ID3
BA7
VBIOS_ID3
AY7
VBIOS_ID2
AW7
AP13
12
@
RC53
10K_0402_5%
12
@
RC54
10K_0402_5%
CAM_DETECT# [37]
DGPU_HOLD_RST# [40]
IR_CA M_DETE CT# [ 28]
RTC_DET# [22]
DGPU_PWR_EN [39,59]
KB_DET# [30]
VBIOS_ID3
VBIOS_ID2
VBIOS_ID1
+3VS
12
12
@
RC190
10K_0402_5%
DIS@
RC191
10K_0402_5%
12
@
RC61
10K_0402_5%
12
2G_G5@
RC62
10K_0402_5%
KB_DET#
RTC_DET#
SIO_EXT_WAKE#
DGPU_HOLD_RST#
CAM_DETECT#
IR_CA M_DETE CT#
12
@
RC59
10K_0402_5%
12
2G_G5@
RC60
10K_0402_5%
1 2
RC45 10K_0402_5%
1 2
RC46 10K_0402_5%
1 2
RC47 10K_0402_5%
DIS@
1 2
RC48 10K_0402_5%
+3VS
RC63 10K_0402_5%
RC64 10K_0402_5%
12
12
1 2
RC44 4.7K_0402_5%
NRB_BIT
@
+3VS
'"$B7!""8$98B,%
^6]^
/"TE275,;/8F
B B
TK?X$6%2
'>$B7!""8
B7!""8$7',!/7
RC61
2G_D3@
RC59
4G_G5@
BOARD_ID2
BOARD_ID3
12
DIS@
RC55
10K_0402_5%
12
UMA@
RC56
10K_0402_5%
12
SKL@
RC57
10K_0402_5%
12
KBL@
RC58
10K_0402_5%
DGPU_PWR_EN
VRAM ID
(PCBA VRAM Size Config.)
2G GDDR5
10K_0402_5%
SD028100280
10K_0402_5%
SD028100280
4G GDDR5
2G DDR3
Reserved
A A
RC62
4G_G5@
RC60
2G_D3@
+3VS
12
RC49
10K_0402_5%
RC50
150K_0402_5%
1 2
DIS@
DIS@
VBIOS_ID3
(GPP_A22)
VBIOS_ID2
(GPP_A23)
VBIOS_ID1
(GPP_B17)
00
0
0
0
1
01
0
1
0
1
10K_0402_5%
Compal Confidential for Dell review
SD028100280
5
10K_0402_5%
SD028100280
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
MCP(4/14)GSPI,I2C,UART,ISH
MCP(4/14)GSPI,I2C,UART,ISH
MCP(4/14)GSPI,I2C,UART,ISH
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LA-D805P
LA-D805P
LA-D805P
1
A00
A00
A00
961Tuesday, June 21, 2016
961Tuesday, June 21, 2016
961Tuesday, June 21, 2016
5
4
3
2
1
PEG_HTX_C_GRX_P[0..3][40]
PEG_HTX_C_GRX_N[0..3][40]
PEG_GTX_C_HRX_P[0..3][40]
PEG_GTX_C_HRX_N[0..3][40]
D D
GPU --->
WLAN --->
10/100M LAN --->
C C
SATA HDD --->
SATA ODD --->
PCIE SSD --->
B B
PEG_HTX_C_GRX_P[0..3]
PEG_HTX_C_GRX_N[0..3]
PEG_GTX_C_HRX_P[0..3]
PEG_GTX_C_HRX_N[0..3]
PCIE_CRX_WLANTX_N5[32]
PCIE_CRX_WLANTX_P5[32]
PCIE_CTX_WLANRX_N5_C[32]
PCIE_CTX_WLANRX_P5_C[32]
PCIE_CRX_LANTX_N6[34]
PCIE_CRX_LANTX_P6[34]
PCIE_CTX_LANRX_N6[34]
PCIE_CTX_LANRX_P6[34]
SATA3_CRX_HDDTX_N0[31]
SATA3_CRX_HDDTX_P0[31]
SATA3_CTX_HDDRX_N0[31]
SATA3_CTX_HDDRX_P0[31]
SATA_CRX_ODDTX_N1[31]
SATA_CRX_ODDTX_P1[31]
SATA_CTX_ODDRX_N1[31]
SATA_CTX_ODDRX_P1[31]
1 2
RC65 100_0402_1%
+3VS
PCIE_CRX_SSDTX_N11[48]
PCIE_CRX_SSDTX_P11[48]
PCIE_CTX_SSDRX_N11[48]
PCIE_CTX_SSDRX_P11[48]
PCIE_CRX_SSDTX_N12[48]
PCIE_CRX_SSDTX_P12[48]
PCIE_CTX_SSDRX_N12[48]
PCIE_CTX_SSDRX_P12[48]
1 2
RC187 10K_0402_5%
PEG_GTX_C_HRX_P0
PEG_GTX_C_HRX_N0
PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_N0
PEG_GTX_C_HRX_P1
PEG_GTX_C_HRX_N1
PEG_HTX_C_GRX_P1
PEG_HTX_C_GRX_N1
PEG_GTX_C_HRX_P2
PEG_GTX_C_HRX_N2
PEG_HTX_C_GRX_P2
PEG_HTX_C_GRX_N2
PEG_GTX_C_HRX_P3
PEG_GTX_C_HRX_N3
PEG_HTX_C_GRX_P3
PEG_HTX_C_GRX_N3
PCIE_RCOMPN
PCIE_RCOMPP
XDP_PR DY#[14]
XDP_PR EQ#[14]
PIRQA#
UC1H
PCIE/USB3/SATA
H13
PCIE1_RXN/USB3_5_RXN
G13
PCIE1_RXP/USB3_5_RXP
B17
PCIE1_TXN/USB3_5_TXN
A17
PCIE1_TXP/USB3_5_TXP
G11
PCIE2_RXN/USB3_6_RXN
F11
PCIE2_RXP/USB3_6_RXP
D16
PCIE2_TXN/USB3_6_TXN
C16
PCIE2_TXP/USB3_6_TXP
H16
PCIE3_RXN
G16
PCIE3_RXP
D17
PCIE3_TXN
C17
PCIE3_TXP
G15
PCIE4_RXN
F15
PCIE4_RXP
B19
PCIE4_TXN
A19
PCIE4_TXP
F16
PCIE5_RXN
E16
PCIE5_RXP
C19
PCIE5_TXN
D19
PCIE5_TXP
G18
PCIE6_RXN
F18
PCIE6_RXP
D20
PCIE6_TXN
C20
PCIE6_TXP
F20
PCIE7_RXN/SATA0_RXN
E20
PCIE7_RXP/SATA0_RXP
B21
PCIE7_TXN/SATA0_TXN
A21
PCIE7_TXP/SATA0_TXP
G21
PCIE8_RXN/SATA1A_RXN
F21
PCIE8_RXP/SATA1A_RXP
D21
PCIE8_TXN/SATA1A_TXN
C21
PCIE8_TXP/SATA1A_TXP
E22
PCIE9_RXN
E23
PCIE9_RXP
B23
PCIE9_TXN
A23
PCIE9_TXP
F25
PCIE10_RXN
E25
PCIE10_RXP
D23
PCIE10_TXN
C23
PCIE10_TXP
F5
PCIE_RCOMPN
E5
PCIE_RCOMPP
D56
PROC_PRDY#
D61
PROC_PREQ#
BB11
GPP_A7/PIRQA#
E28
PCIE11_RXN/SATA1B_RXN
E27
PCIE11_RXP/SATA1B_RXP
D24
PCIE11_TXN/SATA1B_TXN
C24
PCIE11_TXP/SATA1B_TXP
E30
PCIE12_RXN/SATA2_RXN
F30
PCIE12_RXP/SATA2_RXP
A25
PCIE12_TXN/SATA2_TXN
B25
PCIE12_TXP/SATA2_TXP
SKL-U_BGA1356
SKL-U
SSIC / USB3
USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP
USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
USB2
USB2_VBUSSENSE
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_E8/SATALED#
USB3_1_RXN
USB3_1_RXP
USB3_1_TXN
USB3_1_TXP
USB3_4_RXN
USB3_4_RXP
USB3_4_TXN
USB3_4_TXP
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2_COMP
USB2_ID
8 OF 20
H8
G8
C13
D13
J6
H6
B13
A13
J10
H10
B15
A15
E10
F10
C15
D15
AB9
AB10
AD6
AD7
AH3
AJ3
AD9
AD10
AJ1
AJ2
AF6
AF7
AH1
AH2
AF8
AF9
AG1
AG2
AH7
AH8
AB6
USBCOMP
USB2_ID
AG3
USB2_VBUSSENSE
AG4
USB_OC#0_1
A9
USB_OC#2_3
C9
USB_OC#4_5
D9
USB_OC#6_7
B9
J1
SIO_EXT_SCI#
J2
J3
H2
H3
G4
SATA_LED#
H1
USB3_CRX_DTX_N1 [26]
USB3_CRX_DTX_P1 [26]
USB3_CTX_DRX_N1 [26]
USB3_CTX_DRX_P1 [26]
USB3_CRX_DTX_N2 [26]
USB3_CRX_DTX_P2 [26]
USB3_CTX_DRX_N2 [26]
USB3_CTX_DRX_P2 [26]
USB3_CRX_DTX_N3 [37]
USB3_CRX_DTX_P3 [37]
USB3_CTX_DRX_N3 [37]
USB3_CTX_DRX_P3 [37]
USB_PN1 [26]
USB_PP1 [26]
USB_PN2 [26]
USB_PP2 [26]
USB_PN3 [27]
USB_PP3 [27]
USB_PN5 [28]
USB_PP5 [28]
USB_PN6 [27]
USB_PP6 [27]
USB_PN7 [28]
USB_PP7 [28]
USB_PN8 [32]
USB_PP8 [32]
1 2
RC66 113_0402_1%
1 2
RC67 1K_0402_5%
1 2
RC68 1K_0402_5%
USB_OC#0_1 [27]
Reserve
Reserve
USB_OC#2_3 [27]
HDD_DEVSLP [31]
SIO_EXT_SCI# [25]
M2_SLOT2 _PEDET [48]
SATA_LED# [29]
---> Port 1, USB3.0
---> Port 2, USB3.0
---> 3D CAMERA
-----> Port 1, USB3.0 (Port 1)
-----> Port 2, USB3.0 (Port 2)
-----> Port 3, USB2.0 (IOB)
-----> CCD
-----> Card Reader (IOB)
-----> Touch Screen
-----> BT
USB_OC#6_7
USB_OC#0_1
USB_OC#2_3
USB_OC#4_5
SATA_LED#
SIO_EXT_SCI#
+3VALW_PCH
RPC1
4 5
3
2
1
10K_8P4R_5%
RC69 10K_0402_5%
RC70 10K_0402_5%
6
7
8
1 2
1 2
+3VS
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Confidential for Dell review
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
MCP(5/14)PCIE,USB,SATA
MCP(5/14)PCIE,USB,SATA
MCP(5/14)PCIE,USB,SATA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LA-D801P
LA-D801P
LA-D801P
1
10 61Tuesday, June 21, 2016
10 61Tuesday, June 21, 2016
10 61Tuesday, June 21, 2016
A00
A00
A00
5
CLK_PEG_VGA[40]
GPU--->
D D
WLAN--->
LAN--->
SSD--->
CLK_PEG_VGA#[40]
PEG_CLKREQ#[41]
CLK_PCIE_WLAN_N1[32]
CLK_PCIE_WLAN_P1[32]
CLK_PCIE_WLAN_REQ#[32]
CLK_PCIE_LAN_N2[34]
CLK_PCIE_LAN_P2[34]
CLK_PCIE_LAN_REQ#[34]
CLK_PCIE_SSD_N3[48]
CLK_PCIE_SSD_P3[48]
CLK_PCIE_SSD_REQ#[48]
+3VS
+3VS
+3VS
+3VS
1 2
RC71 10K_0402_5%
1 2
RC72 10K_0402_5%
1 2
RC73 10K_0402_5%
1 2
RC188 10K_0402_5%
%1^S%/8B98`
1 2
RC108 0_0402_5%@
+3VS
PCH_PLTRST#
C C
SN74AHC1G08DCKR_SC70-5
UC4
5
1
P
IN1
2
IN2
4
O
G
3
PCH_PLTRST#_EC [25,32,34,40,48]
12
RC109
100K_0402_5%
4
UC1J
D42
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
AR10
GPP_B5/SRCCLKREQ0#
B42
CLKOUT_PCIE_N1
A42
CLKOUT_PCIE_P1
AT7
GPP_B6/SRCCLKREQ1#
D41
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2#
D40
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3
AT10
GPP_B8/SRCCLKREQ3#
B40
CLKOUT_PCIE_N4
A40
CLKOUT_PCIE_P4
AU8
GPP_B9/SRCCLKREQ4#
E40
CLKOUT_PCIE_N5
E38
CLKOUT_PCIE_P5
AU7
GPP_B10/SRCCL KREQ5#
SKL-U_BGA1356
SKL_ULT
CLOCK SIGNALS
RTCRST_ON[25 ]
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
RC164
10K_0402_5%
GPD8/SUSCLK
XTAL24_ IN
XTAL24_ OUT
XCLK_B IASREF
RTCX1
RTCX2
SRTCRST#
RTCRST#
10 OF 20
12
F43
E43
BA17
E37
E35
E42
AM18
AM20
AN18
AM16
3
SUSCLK
RC110 1K_0402_5%
CLK_ITPXDP_N
CLK_ITPXDP_P
SUSCLK
XTAL24_ IN
XTAL24_ OUT
XCLK_B IASREF
PCH_RTCX1
PCH_RTCX2
SRTCRST#
PCH_RTCRST#
RC76 2.71K_0402_1%
TPS7
2
G
13
D
S
QC2
2N7002K_SOT23-3
2
1 2
TP8
TP9
1 2
RC189 0_0402_5%@
RC74 0_0402_5%@
RC75 0_0402_5%
12
12
12
+1.0V_CLK5
SUSCLK_SSD [48]
SUSCLK_WLAN [32]
SUSCLK_EC [25]
Follow KBL WW18 MOW
RC76 change to 2.71K
1 2
RC77 20K_0402_5%
CC4 1U_0402_6.3V6K
RC78 20K_0402_5%
CC5 1U_0402_6.3V6K
1 2
1 2
1 2
1
1
SHORT PADS~D
JCMOS1 JP@
2
2
+RTC_CELL
O1#"9+$JUgL$L?XK$R?@K$gV>@L$M$L>URV$@ZgX$>H$Y?N>UL$IY?RKJKHL
JCMOS1
Always Open
& Not Solder
XTAL24_ IN
XTAL24_ OUT
PCH_RTCX1
PCH_RTCX2
1M_0402_1%
RC80
1 2
RC82
10M_0402_5%
1 2
12
RC83 0_0402_5%
@
1
CC6
1 2
3
4
YC1
24MHZ_12PF_X3G024000DC1H
1
2
Change CC6, CC7 for YV1 frequency deviation
Eason 2/19
12
YC2
32.768KHZ_9PF_X1A000141000200
PCH_RTCX2_R
15P_0402_50V8J
CC7
1 2
15P_0402_50V8J
CC8
1 2
6.8P_0402_50V8C
20ppm / 9pF
ESR <50kohm (MAX)
CC9
1 2
6.8P_0402_50V8C
12
+RTC_CELL
+3VALW
+3.3V_ALW_DSW
12
DZ1RB751S40T1G_SOD523-2
1.2V_VTT_PWRGD[53]
ACAV_IN [25,50,51]
1.2V_VTT_PWRGD
2
SIO_SLP_S3#
RC106 0_0402_5%
+3.3V_ALW_DSW
H_CPUPWRGD
CC15 100P_0402_50V8J
12
@ESD@
+3VS
Close to CPU side
+3VALW_PCH
@
1U_0402_6.3V6K
12
CC10
ME_SUS_ PWR_ACK
TP7
PCIE_WAKE#[25,34,48]
EC_WAKE#[25]
POK
1M_0402_5%
RC102
PCH_RSMRST#_Q[14]
1 2
RC94 10K_0402_5%
RC95 1K_0402_5%@
RC96 60.4_0402_1%
RC97 0_0402_5%
RC99 0_0402_5%@
RC100 0_0402_5%@
B9#B98$RZ@RUZL
1 2
RC84 10K_0402_5%
B B
A A
12
1 2
RC85 10K_0402_5%
1 2
RC86 10K_0402_5%
RC87 100K_0402_5%
1 2
1 2
1 2
@
ME_SUS_ PWR_ACK[25]
1 2
1 2
PCH_RSMRST#[25]
Compal Confidential for Dell review
5
LAN_WAKE#
SYS_RESET#
PCH_DPWROK
12
@
UC1K
PCH_PLTRST#
TPS1
SYS_RESET#
PCH_RSMRST#_Q
H_CPUPWRGDH_CPUPWRGD_R
VCCST_PWRGDH_VCCST_PWRGD
SYS_PWROK[25]
RESET_OUT#[25]
POK[50,52,5 4,55]
PCH_DPWROKPCH_RSMRST#_Q
PCH_PCIE_WAKE#
LAN_WAKE#
1
2
POK
+3VALW
IN1
IN2
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PWROK
AR13
GPP_A13/SUSW ARN#/SUSPW RDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_W AKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
SKL-U_BGA1356
CC11
@
1 2
0.1U_0402_10V7K
5
P
O
G
3
SN74AHC1G08DCKR_SC70-5
4
UC5
PCH_RSMRST#_Q
4
8/21 can change to 10K for merge to RP
SYSTEM POWER MANAGEMENT
SIO_SLP_LAN#
PCH_BATLOW#
AC_PRESENT
SKL-U
1 2
@
RC88 10K_0402_5%
1 2
RC89 8.2K_0402_5%
1 2
RC90 10K_0402_5%
GPP_B12/SLP_S0 #
GPD9/SLP_W LAN#
GPD1/ACPRESENT
GPP_B11/EXT_PWR_GATE#
GPP_B2/VRALERT#
+3VALW
INTRUD ER#
+3.3V_ALW_DSW
VRALERT#
SIO_PWRBTN#
SIO_SLP_S0#
AT11
SIO_SLP_S3#
11 OF 20
3
AP15
SIO_SLP_S4#
BA16
SIO_SLP_S5#
AY16
SIO_SLP_SUS#
AN15
SIO_SLP_LAN#
AW15
SIO_SLP_WLAN#
BB17
SIO_SLP_A#
AN16
BA15
AC_PRESENT
AY15
PCH_BATLOW#
AU13
AU11
PME#
AP16
INTRUD ER#
MPHYP_PW R_EN
AM10
AM11
VRALERT#
SIO_SLP_S0#
SIO_SLP_S3#
SIO_SLP_S4#
SIO_SLP_S5#
TPS2
TPS3
TPS4
TPS5
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
SLP_SUS#
SLP_LAN#
GPD6/SLP_A#
GPD3/PWRBTN#
GPD0/BATLOW#
GPP_A11/PME#
INTRUD ER#
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1 2
RC91 330K_0402_5%
1 2
RC92 10K_0402_5%
@
RC93 100K_0402_5%
SIO_SLP_S0# [17]
SIO_SLP_S3# [17,25,36]
SIO_SLP_S4# [17,25,53,55]
SIO_SLP_S5# [51]
TP75
TP10
TP11
TPS6
SIO_PWRBTN# [25]
TP12
TP13
Buffer with Open Drain Output For VTT power control
VCC
+3VALW
12
5
4
Y
DZ4
@
1 2
RB751S40T1G_SOD523-2
1 2
RC103
10K_0402_1%
@
1M_0402_1%
12
RC192
0.1U_0402_16V7K
12
CC14
1U_0402_6.3V6K
CC12
UC6
1
NC
2
A
3
GND
74AUP1G07GW_TSSOP5
Buffer with Open Drain Output For VTT power control
+1.0V_VCCST+3VALW
ALL_SYS_PWRGD
1 2
@
0.1U_0402_16V7K
UC7
1
NC
2
A
3
GND
74AUP1G07GW_TSSOP5
+3VS
12
RC105
10K_0402_5%
RC107 0_0402_5%
CC13
12
5
VCC
4
Y
ALL_SYS_PWRGD
1 2
@
RC104
1K_0402_5%
1 2
H_VCCST_PWRGD
ALL_SYS_PWRGD [25]
IMVP_V R_ON [56, 57]
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
MCP(6/14)CLK,PM,RTC
MCP(6/14)CLK,PM,RTC
MCP(6/14)CLK,PM,RTC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LA-D801P
LA-D801P
LA-D801P
1
ALL_SYS_PWRGD
11 61Tuesday, June 21, 2016
11 61Tuesday, June 21, 2016
11 61Tuesday, June 21, 2016
A00
A00
A00
5
+1.0V_VCCST
1 2
RC111 49.9_0402_1%
1 2
RC112 1K_0402_5%
+1.0V_VCCSTG
1 2
RC113 1K_0402_5%
D D
+3VS
1 2
RC114 10K_0402_5%
1 2
RC115 10K_0402_5%
1 2
RC116 10K_0402_5%
H_CATERR#
@
H_THERMTRIP#
H_PROCHOT#
TOUCH PAD_IN TR#_D
TOUCH _SCR EEN_P D#
@
DGPU_PWROK
[25,50,51,56]
H_PROCHOT#
TOUCH _SCR EEN_P D#[28]
TOUCH PAD_IN TR#[25,30 ]
TOUCH _SCR EEN_P D# TOUCH _SCR EEN_P D#_R
4
8/19 DG0.9
1 2
1 2
DZ3
RB751S40T1G_SOD523-2
RC118 0_0402_5%
PECI_EC[25]
1 2
RC117 499_0402_1%
@
12
12
RC119
RC120
49.9_0402_1%
H_CATERR#
H_PROCHOT#_RH_PROCHOT#
TP14
TP15
TP16
TP17
TP18
TOUCH PAD_IN TR#_D
12
49.9_0402_1%
H_THERMTRIP#
XDP_OBS 0_R
XDP_OBS 1_R
XDP_OBS 2_R
XDP_OBS 3_R
CPU_POPIRCOMP
PCH_POPIRCOMP
EDRAM_OPIO_RCOMP
EOPIO_RCOMP
12
RC121
49.9_0402_1%
RC122
49.9_0402_1%
D63
CATERR#
A54
PECI
C65
PROCHOT#
C63
THERMTR IP#
A65
SKTOCC#
C55
BPM#[0]
D55
BPM#[1]
B54
BPM#[2]
C56
BPM#[3]
A6
GPP_E3/CPU_GP0
A7
GPP_E7/CPU_GP1
BA5
GPP_B3/CPU_GP2
AY5
GPP_B4/CPU_GP3
AT16
PROC_POPIRCOMP
AU16
PCH_OPIRCOMP
H66
OPCE_RCOMP
H65
OPC_RCOMP
SKL-U_BGA1356
UC1D
3
CPU MISC
SKL-U
JTAG
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TRST#
JTAGX
4 OF 20
CPU_XDP_TCK0
B61
SOC_XDP_TDI
D60
SOC_XDP_TDO
A61
SOC_XDP_TMS
C60
SOC_XDP_TRST#
B59
B56
SOC_XDP_TDI
D59
SOC_XDP_TDO
A56
SOC_XDP_TMS
C59
SOC_XDP_TRST#
C61
CPU_XDP_TCK0
A59
2
CPU_XDP_TCK0 [14]
SOC_XDP_TDI [14]
SOC_XDP_TDO [14]
SOC_XDP_TMS [14]
SOC_XDP_TRST# [14]
PCH_JTAG_TCK1 [14]
1
C C
UC1G
AUDIO
1 2
HDA_CODEC_SYNC[23]
#7S5T%S71
/"T$i$7',!/7$::j#7$Y>RXP$R?HkL$UIA?LK$#7
^6]^$i$269,!/7$::j#7$UH:Y>RXP$R?H$UIA?LK$#7
B B
HDA_CODEC_BITCLK[23]
HDA_CODEC_SDOUT[23]
ME_FW P_EC[25]
TP74
EMI@
CC16
22P_0402_50V8J
Close to RC124
HDA_CODEC_RST# HDA_RST#
RC123 33_0402_5%
1 2
RC124 33_0402_5%EMI@
1 2
RC125 33_0402_5%
1 2
RC126 1K_0402_5%
RC127 33_0402_5%@
HDA_CODEC_BITCLK
1
2
1 2
@RF@
DGPU_PWROK[59,60]
SPKR[23]
HDA_SYNC
HDA_BIT_CLK
HDA_SDOUT
HDA_SDIN0[23]
1
CC89
2
1P_0402_50V8
DGPU_PWROK
BA22
HDA_SYNC/I2S0_SFRM
AY22
HDA_BLK/I2S0_SCLK
BB22
HDA_SDO/I2S0_TXD
BA21
HDA_SDI0/I2S0_RXD
AY21
HDA_SDI1/I2S1_RXD
AW22
HDA_RST#/I2S1_SCLK
J5
GPP_D23/I2S_MCLK
AY20
I2S1_ SFRM
AW20
I2S1_ TXD
AK7
GPP_F1/I2S2_SFRM
AK6
GPP_F0/I2S2_SCLK
AK9
GPP_F2/I2S2_TXD
AK10
GPP_F3/I2S2_RXD
H5
GPP_D19/DMIC_CLK0
D7
GPP_D20/DMIC_DATA0
D8
GPP_D17/DMIC_CLK1
C8
GPP_D18/DMIC_DATA1
AW5
GPP_B14/SPKR
SKL-U_BGA1356
SKL-U
SDIO/SDXC
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_W P
GPP_A17/SD_PW R_EN#/ISH_GP7
GPP_A16/SD_1P8_SEL
SD_RCOMP
GPP_F23
7 OF 20
AB11
AB13
AB12
W12
W11
W10
W8
W7
BA9
BB9
AB7
AF13
SD_RCOMP
KB_LED_BL_DET [30]
1 2
RC130 200_0402_1%
+3VALW_PCH +3VALW_PCH
@
HDA_SDOUT
269,!/7
7',!/7
1 2
RC128 8.2K_0402_5%
A A
8"%$9T,%$98B,%
@
^6]^
/"TE275,;/8F
7',!/7
269,!/7
SPKR
5Y?gV$2KgR@ZIL>@$9KRU@ZLN$>hK@@ZAK
^6]^
/"TE275,;/8F
1 2
RC129 4.7K_0402_5%
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Confidential for Dell review
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
MCP(7/14)MISC,JTAG,HDA,SDIO
MCP(7/14)MISC,JTAG,HDA,SDIO
MCP(7/14)MISC,JTAG,HDA,SDIO
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LA-D801P
LA-D801P
LA-D801P
1
12 61Tuesday, June 21, 2016
12 61Tuesday, June 21, 2016
12 61Tuesday, June 21, 2016
A00
A00
A00
5
D D
4
3
2
1
CFG[2][5][6][7] for SKYLAKE-H CPU CFG strap pin
1 2
@
RC131 10K_0402_1%
9L?YY$@KgKL$gKlUKHRK
^6]^E275,;/8F
/"T
1 2
RC136 10K_0402_1%
C C
$K2%$KH?=YK
^6]^
/"TE275,;/8F
B B
CFG0
'>$gL?YYE'>@J?Y$"IK@?LZ>HF
gL?YY
CFG4
2Zg?=YKA
7H?=YKA
1 2
@
RC132 10K_0402_1%
1 2
@
RC133 10K_0402_1%
CFG1
CFG3
CFG0[14]
CFG1[14]
CFG2[14]
CFG3[14]
CFG4[14]
CFG5[14]
CFG6[14]
CFG7[14]
CFG8[14]
CFG9[14]
CFG10[14]
CFG11[14]
CFG12[14]
CFG13[14]
CFG14[14]
CFG15[14]
CFG16[14]
CFG17[14]
CFG18[14]
CFG19[14]
TP19
TP20
12
RC134 49.9_0402_1%
XDP_ITP_P MODE[14]
CFG0
CFG1
CFG3
CFG4
CFG_RCOMP
E68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70
E63
F63
E66
F66
E60
AY2
AY1
K46
K45
AL25
AL27
C71
B70
F60
A52
BA70
BA68
J71
J68
F65
G65
F61
E61
E8
D1
D3
UC1S
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
CFG[19]
CFG_RCOMP
ITP_PMO DE
RSVD_AY2
RSVD_AY1
RSVD_D1
RSVD_D3
RSVD_K46
RSVD_K45
RSVD_AL25
RSVD_AL27
RSVD_C71
RSVD_B70
RSVD_F60
RSVD_A52
RSVD_TP_BA70
RSVD_TP_BA68
RSVD_J71
RSVD_J68
VSS_F65
VSS_G65
RSVD_F61
RSVD_E61
SKL-U_BGA1356
RESERVED SIGNALS-1
SKL-U
RSVD_TP_BB68
RSVD_TP_BB69
RSVD_TP_AK13
RSVD_TP_AK12
RSVD_BB2
RSVD_BA3
TP5
TP6
RSVD_D5
RSVD_D4
RSVD_B2
RSVD_C2
RSVD_B3
RSVD_A3
RSVD_AW1
RSVD_E1
RSVD_E2
RSVD_BA4
RSVD_BB4
RSVD_A4
RSVD_C4
TP4
RSVD_A69
RSVD_B69
RSVD_AY3
RSVD_D71
RSVD_C70
RSVD_C54
RSVD_D54
TP1
TP2
VSS_AY71
ZVM#
RSVD_TP_AW71
RSVD_TP_AW70
MSM#
PROC_SELECT#
19 OF 20
BB68
BB69
AK13
AK12
BB2
BA3
AU5
AT5
D5
D4
B2
C2
B3
A3
AW1
E1
E2
BA4
BB4
A4
C4
BB5
A69
B69
AY3
D71
C70
C54
D54
AY4
BB3
AY71
AR56
AW71
AW70
AP56
C64
1 2
RC138 100K_0402_5%
From WW48 MOW
TP21
TP22
TP23
TP24
TP25
TP26
TP27
TP28
TP29
TP30
TP31
SPARE
SKL-U
RSVD_F6
RSVD_E3
RSVD_C11
RSVD_B11
RSVD_A11
RSVD_D12
RSVD_C12
RSVD_F52
20 OF 20
F6
E3
C11
B11
A11
D12
C12
F52
+1.8V_PRIM
1 2
RC137 0_0402_5%@
AW69
AW68
AU56
AW48
U12
U11
H11
C7
UC1T
RSVD_AW69
RSVD_AW68
RSVD_AU56
RSVD_AW48
RSVD_C7
RSVD_U12
RSVD_U11
RSVD_H11
SKL-U_BGA1356
P.AR56 ZVM# for SKYLAKE-U 2+3e only
@
+1.0V_VCCST
Stuff 100k(RC138) for Cannonlake
Un-stuff 100k(RC138) for Skylake
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Confidential for Dell review
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
MCP(8/14)CFG,RSVD
MCP(8/14)CFG,RSVD
MCP(8/14)CFG,RSVD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LA-D801P
LA-D801P
LA-D801P
1
13 61Tuesday, June 21, 2016
13 61Tuesday, June 21, 2016
13 61Tuesday, June 21, 2016
A00
A00
A00
5
Connector Less Routing Topology
4
3
2
1
PRIMARY CMC CONN
D D
DCI Link
RC142 need POP
RC146 need POP
Place to CPU side
C C
Place to CPU side
+3.3V_SPI
1 2
CMC@
RC139 1K_0402_5%
+1.0V_VCCSTG
RC140 51_0402_5%CMC@
RC141 51_0402_5%CMC@
RC142 51_0402_5%CMC@
+1.0V_XDP
1 2
RC143 1K_0402_5%CMC@
RC144 0_0402_5%@
RC145 0_0402_5%@
RC146 51_0402_1%CMC@
RC147 51_0402_5%@
XDP_SPI_SI
12
12
12
12
12
12
12
SOC_XDP_TMS
SOC_XDP_TDI
SOC_XDP_TDO
XDP_ITP_P MODE
XDP_PR SENT_CP U
XDP_PR SENT_PC H
CPU_XDP_TCK0
PCH_JTAG_TCK1
SOC_XDP_TDO[12]
CPU_XDP_TCK0[12]
PCH_JTAG_TCK1[12]
SOC_XDP_TMS[12]
SOC_XDP_TDI[12]
SOC_XDP_TRST#[12]
XDP_ITP_P MODE[13]
XDP_SPI_SI[8]
XDP_SPI_IO2[8]
PCH_RSMRST#_Q[11]
XDP_TDO
XDP_TCK0
XDP_TCK1
XDP_TMS
XDP_TDI
XDP_TRST#
XDP_HOOK6
XDP_HOOK3
XDP_PR SENT_PC H
CFG3
RC175 0_0402_5%
RC148 1K_0402_5%
TPC1
TPC2
TPC3
TPC4
TPC5
TPC6
TPC7
TPC8
TPC9
1 2
CMC@
1 2
CMC@
XDP_PR SENT_CP U
XDP_HOOK0PCH_RSMRST#_Q
RC149 0_0603_5%
CFG0[13]
CFG1[13]
CFG2[13]
CFG3[13]
CFG4[13]
CFG5[13]
CFG6[13]
CFG7[13]
CFG17[13]
CFG16[13]
CFG8[13]
CFG9[13]
CFG10[13]
CFG11[13]
CFG12[13]
CFG13[13]
CFG14[13]
CFG15[13]
CFG19[13]
CFG18[13]
TPC10
TPC11
TPC12
TPC13
TPC14
TPC15
TPC16
TPC17
TPC18
TPC19
TPC20
TPC21
TPC22
TPC23
TPC24
TPC25
TPC26
TPC27
TPC28
TPC29
CMC@
1 2
+1.0V_XDP+1.0V_PRIM
TPC30
TPC31
TPC32
TPC33
XDP_HOOK0
XDP_PR SENT_CP U
XDP_PR EQ# [10]
XDP_PR DY# [10]
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Confidential for Dell review
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
MCP(9/14)XDP
MCP(9/14)XDP
MCP(9/14)XDP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LA-D801P
LA-D801P
LA-D801P
1
14 61Tuesday, June 21, 2016
14 61Tuesday, June 21, 2016
14 61Tuesday, June 21, 2016
A00
A00
A00
5
4
3
2
1
+VCC_CORE: 0.3~1.35V
D D
TP32
TP33
VCC_EDRAM_SENSE
TP34
TP35
TP36
C C
TP37
VSS_EDRAM_SENSE
VCCEOPIO_SENSE
VSSEOPIO_SENSE
+VCC_CORE +VCC_CORE
SKL-U
CPU POWER 1 OF 4
VCC_G32
VCC_G33
VCC_G35
VCC_G37
VCC_G38
VCC_G40
VCC_G42
VCC_J30
VCC_J33
VCC_J37
VCC_J40
VCC_K33
VCC_K35
VCC_K37
VCC_K38
VCC_K40
VCC_K42
VCC_K43
VCC_SENSE
VSS_SENSE
VIDALERT#
VIDSCK
VIDSOUT
VCCSTG_G20
12 OF 20
G32
G33
G35
G37
G38
G40
G42
J30
J33
J37
J40
K33
K35
K37
K38
K40
K42
K43
E32
VCCSENSE
E33
VSSSENSE
H_CPU_SVIDALRT#
B63
A63
VIDSCLK
D64
VIDSOUT
G20
+VCC_CORE_G0
+VCC_CORE_G1
UC1L
A30
VCC_A30
A34
VCC_A34
A39
VCC_A39
A44
VCC_A44
AK33
VCC_AK33
AK35
VCC_AK35
AK37
VCC_AK37
AK38
VCC_AK38
AK40
VCC_AK40
AL33
VCC_AL33
AL37
VCC_AL37
AL40
VCC_AL40
AM32
VCC_AM32
AM33
VCC_AM33
AM35
VCC_AM35
AM37
VCC_AM37
AM38
VCC_AM38
G30
VCC_G30
K32
RSVD_K32
AK32
RSVD_AK32
AB62
VCCOPC_AB62
P62
VCCOPC_P62
V62
VCCOPC_V62
H63
VCC_OPC_1P8_H63
G61
VCC_OPC_1P8_G61
AC63
VCCOPC_SENSE
AE63
VSSOPC_SENSE
AE62
VCCEOPIO
AG62
VCCEOPIO
AL63
VCCEOPIO_SENSE
AJ62
VSSEOPIO_SENSE
SKL-U_BGA1356
VIDSCLK [56]
+VCC_CORE
12
12
+1.0V_VCCSTG
RC150
100_0402_1%
RC151
100_0402_1%
VCCSENSE[56]
VSSSENSE [56]
PSC(Primary side cap) : Place as close to the package as possible
BSC(Backside cap) : Place on secondary side, underneath the package
Component placement order:
Package edge > 0402 caps > 0805 caps > Bulk caps >Power source
VCCOPC,VCCOPC_1P8,VCCEOPIO for SKYLAKE-U 2+3e
(w/ on package cache)
B B
+1.0V_VCCST
SVID ALERT
56_0402_1%
12
RC152
1,2$'>LK($%Y?RK$LVK$%;$@KgZgL>@g$RY>gK$L>$1%;
$$$$$$$$$$$$$$$$$$$RY>gK$L>$1%;$*00$:$+_00JZYg
H_CPU_SVIDALRT#
VIDALERT_N[5 6]
SVID DATA
+1.0V_VCCST
100_0402_1%
12
RC153 220_0402_5%
RC154
12
1,2$'>LK($%Y?RK$LVK$%;$@KgZgL>@g$RY>gK$L>$1%;
$$$$$$$$$$$$$$$$$$$RY>gK$L>$1%;$*00$:$+_00JZYg
A A
VIDSOUT[56]
VIDSOUT
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Confidential for Dell review
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
MCP(10/14)PWR-VCC CORE
MCP(10/14)PWR-VCC CORE
MCP(10/14)PWR-VCC CORE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LA-D801P
LA-D801P
LA-D801P
1
15 61Tuesday, June 21, 2016
15 61Tuesday, June 21, 2016
15 61Tuesday, June 21, 2016
A00
A00
A00
5
4
3
2
1
+VCCGT: 0.3~1.35V
+VCCGTX : 0.3~1.35V
+VCC_GT +VCC_GT
UC1M
D D
A48
A53
A58
A62
A66
AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71
J43
J45
J46
J48
J50
J52
J53
J55
J56
C C
+VCC_GT
12
RC155
100_0402_1%
VCC_GT_SENSE[5 6]
VSS_GT_SENSE[56]
B B
VCC_GT_SENSE
VSS_GT_SENSE
12
RC156
100_0402_1%
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
M62
N63
N64
N66
N67
N69
J70
J69
CPU POWER 2 OF 4
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT_SENSE
VSSGT_SENSE
SKL-U_BGA1356
SKL-U
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70
VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56
VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66
VCCGTX_SENSE
VSSGTX_SENSE
13 OF 20
N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62
AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66
AK62
AL61
+VCC_GT
VCCGTX for SKYLAKE-U 2+3e only
+VCC_GT
12
GT3@
RC157
100_0402_1%
VCCSENSE_VCCGTUS
VSSSENSE_VCCGTUS
12
GT3@
RC158
100_0402_1%
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Confidential for Dell review
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
MCP(11/14)PWR-VCCGT
MCP(11/14)PWR-VCCGT
MCP(11/14)PWR-VCCGT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LA-D801P
LA-D801P
LA-D801P
1
16 61Tuesday, June 21, 2016
16 61Tuesday, June 21, 2016
16 61Tuesday, June 21, 2016
A00
A00
A00
5
4
3
2
1
+1.2V_DDR
D D
C C
BSC PSC
1
2
@
BSC
1
1
CC32
2
2
@
1U_0402_6.3V6K
1
1
1
CC26
CC27
2
2
@
10U_0402_6.3V6M
10U_0402_6.3V6M
CC29
CC28
2
10U_0402_6.3V6M
10U_0402_6.3V6M
1
1
CC31
CC30
2
2
10U_0402_6.3V6M
10U_0402_6.3V6M
PSC
1
CC36
2
22U_0603_6.3V6M
+1.0V_VCCST
1
1
CC37
2
CC38
2
BSC
22U_0603_6.3V6M
PSC
22U_0603_6.3V6M
1
1
CC39
2
CC40
2
1U_0402_6.3V6K
10U_0402_6.3V6M
1
1
CC35
CC34
CC33
@
1U_0402_6.3V6K
2
2
@
@
1U_0402_6.3V6K
1U_0402_6.3V6K
PSC
CC41
1U_0402_6.3V6K
+1.0V_VCCSTG
BSC
1
CC42
2
1U_0402_6.3V6K
+1.2V_DDR
1
2
CC43
1U_0402_6.3V6K
1
2
Annotation:
1.35V in DDR3L
1.2V in LPDDR3 and DDR4
SKL-U
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
+VCC_SA
PSC
1
CC44
2
1U_0402_6.3V6K
AU23
AU28
AU35
AU42
BB23
BB32
BB41
BB47
BB51
AM40
A18
A22
AL23
K20
K21
UC1N
CPU POWER 3 OF 4
VDDQ_AU23
VDDQ_AU28
VDDQ_AU35
VDDQ_AU42
VDDQ_BB23
VDDQ_BB32
VDDQ_BB41
VDDQ_BB47
VDDQ_BB51
VDDQC
VCCST
VCCSTG_A22
VCCPLL_OC
VCCPLL_K20
VCCPLL_K21
SKL-U_BGA1356
+1.0V_VCCST
+1.0VS_VCCIO
AK28
VCCIO
AK30
VCCIO
AL30
VCCIO
AL42
VCCIO
AM28
VCCIO
AM30
VCCIO
AM42
VCCIO
AK23
VCCSA
AK25
VCCSA
G23
VCCSA
G25
VCCSA
G27
VCCSA
G28
VCCSA
J22
VCCSA
J23
VCCSA
J27
VCCSA
K23
VCCSA
K25
VCCSA
K27
VCCSA
K28
VCCSA
K30
VCCSA
14 OF 20
1 2
RC159 100_0402_1%
AM23
AM22
H21
H20
VCCIO_SENSE
VSSIO_SENSE
+VCC_SA
TP38
TP39
12
RC160
100_0402_1%
VSA_SEN- [56]
VSA_SEN+ [56]
+1.0VS_VCCIO
PSC
BSCBSC
1
1
1
CC45
2
1
2
CC46
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CC51
CC52
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CC48
CC47
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CC53
2
CC54
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CC50
CC49
2
2
10U_0402_6.3V6M
10U_0402_6.3V6M
JP1
Always Short
JP1
112
JUMP_43X79
Imax : 3.4 A
POP option with Volume
+1.0VS_VCCIO+1.0V_VCCSTG
PJP@
2
CZ8
0.1U_0402_25V6
1
@
2
B B
+1.0V_VCCST source
Imax : 0.24 A
JP2
Always Short
@
+5VALW
12
UZ1
+1.0V_VCCST_C
1
VIN
2
VIN
3
ON
4
0.1U_0402_10V7K
1
2
VBIAS
@
CZ22
TPS22 967D SGR_S ON8_2X2
VOUT
VOUT
CT
GND
GND
7
8
6
5
9
JP2
PAD-OPEN1x1m
1 2
CZ2 0.1U_0402_10V7K
12
CZ3
470P_0402_50V7K
PJP@
12
+1.0V_VCCST
SIO_SLP_S3#[11,2 5,36]
SIO_SLP_S0#[1 1]
SN74AHC1G08DCKR_SC70-5
CZ21
DZ5
@
1 2
RB751S40T1G_SOD523-2
1 2
SIO_SLP_S4#[11,25,53,55]
A A
RZ1
22.1K_0402_1%
@
1M_0402_1%
RZ9
1U_0402_6.3V6K
+1.0V_PRIM
EN_1.0V_VCCST_ON
1
12
CZ1
0.1U_0402_10V7K
2
+1.0V_VCCSTG source
RZ2
0_0402_5%
1 2
@
+3VALW
5
1
P
UC9
IN1
2
IN2
G
3
VCCSTG_EN VCCSTG_EN_R
4
O
1 2
RZ3 49.9K_0402_1%
1 2
RB751S40T1G_SOD523-2
DZ2
+1.0V_PRIM
UZ2
1
VIN1
2
+5VALW
0.1U_0402_10V7K
1U_0402_6.3V6K
1
CZ4
2
@
CZ5
1
2
VIN2
7
VIN thermal
3
VBIAS
4
ON
TPS22 961D NYR_W SON8
4.4mohm/6A
VOUT
GND
Imax : 3.4 A + 0.04A
+1.0V_VCCSTG
6
5
1 2
CZ6
0.1U_0402_10V7K
TR=12.5us@Vin=1.05V
+1.0V_VCCST+1.0V_VCCSTG
1 2
1
CZ7
0.1U_0402_10V7K
2
RZ4 0_0603_5%
@
pop option with UZ1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Confidential for Dell review
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
MCP(12/14)PWR-VCCIO,MEM
MCP(12/14)PWR-VCCIO,MEM
MCP(12/14)PWR-VCCIO,MEM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LA-D805P
LA-D805P
LA-D805P
1
17 61Tuesday, June 21, 2016
17 61Tuesday, June 21, 2016
17 61Tuesday, June 21, 2016
A00
A00
A00
5
4
3
2
1
RY>gK$;1+D,/+$?HA$m+-0JZY
RY>gK$;1+D,!+b$?HA$m)00JZYRY>gK$;1+D.+\$?HA$m+-0JZY
1
2
+3.3V_SPI
+1.0V_PRIM
CC58
@
1U_0402_6.3V6K
UC1O
AB19
VCCPRIM_1P0
AB20
VCCPRIM_1P0
P18
VCCPRIM_1P0
AF18
VCCPRIM_CORE
AF19
VCCPRIM_CORE
V20
VCCPRIM_CORE
V21
VCCPRIM_CORE
AL1
DCPDSW_1P0
K17
VCCMPHYAON_1P0
L1
VCCMPHYAON_1P0
N15
VCCMPHYGT_1P0_N15
N16
VCCMPHYGT_1P0_N16
N17
VCCMPHYGT_1P0_N17
P15
VCCMPHYGT_1P0_P15
P16
VCCMPHYGT_1P0_P16
K15
VCCAMPHYPLL_1P0
L15
VCCAMPHYPLL_1P0
V15
VCCAPLL_1P0
AB17
VCCPRIM_1P0_AB17
Y18
VCCPRIM_1P0_Y18
AD17
VCCDSW_3P3_AD17
AD18
VCCDSW_3P3_AD18
AJ17
VCCDSW_3P3_AJ17
AJ19
VCCHDA
AJ16
VCCSPI
AF20
VCCSRAM_1P0
AF21
VCCSRAM_1P0
T19
VCCSRAM_1P0
T20
VCCSRAM_1P0
AJ21
VCCPRIM_3P3_AJ21
AK20
VCCPRIM_1P0_AK20
N18
VCCAPLLEBB
SKL-U_BGA1356
PCH PWR
CPU POWER 4 OF 4
SKL-U
VCCPGPPA
VCCPGPPB
VCCPGPPC
VCCPGPPD
VCCPGPPE
VCCPGPPF
VCCPGPPG
VCCPRIM_3P3_V19
VCCPRIM_1P0_T1
VCCATS_1P8
VCCRTCPRIM_3P3
VCCRTC_AK19
VCCRTC_BB14
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
15 OF 20
RY>gK$;1+D,]+_$?HA$m+-0JZY
AK15
AG15
Y16
Y15
T16
AF16
AD15
V19
T1
AA1
AK17
AK19
BB14
BB10
A14
K19
L21
N20
L19
A10
AN11
AN13
+3VALW_PCH
+3VALW_PCH
+1.8V_PRIM
+3VALW_PCH
+1.0V_PRIM
+3VALW_PCH
RY>gK$;1+D!!+0$?HA$m+-0JZY
+1.0V_CLK2
+1.0V_CLK4
+1.0V_CLK5
RY>gK$;1+De+4$?HA$m)00JZY
+3VALW_PCH
+3VALW_PCH
1
CC64
2
@
1U_0402_6.3V6K
RY>gK$;1+D,,+$?HA$m)00JZY
RY>gK$;1+D,.+b$?HA$m+-0JZY
+1.0V_PRIM
1
CC69
2
0.1U_0402_10V7K
+1.0V_PRIM
1
2
+3VALW_PCH
@
1
CC65
2
1P_0402_50V8
+RTC_CELL
1
CC70
2
1
2
1
CC71
2
1U_0402_6.3V6K
0.1U_0402_10V7K
RY>gK$;1+D,+0$?HA$m+-0JZY
CC72
@
1U_0402_6.3V6K
RY>gK$;1+D8+4$?HA$m)00JZY
CC66
@
1U_0402_6.3V6K
+3VALW_PCH
+1.8V_PRIM
1
CC68
2
1U_0402_6.3V6K
+1.0V_PRIM
RC161 0_0603_5%@
RC162 0_0603_5%@
RY>gK$;1+DC+b$?HA$m+-0JZY
1
CC67
2
@
1U_0402_6.3V6K
+1.0V_SRAM
12
+1.0V_APLLEBB
12
+1.0V_PRIM
1
CC55
D D
+1.0V_MPHYGT source
+1.0V_PRIM +1.0V_MPHYGT
RC174 0_0603_5%@
12
2
1U_0402_6.3V6K
1
CC56
2
1U_0402_6.3V6K
+1.0V_PRIM
1
CC57
2
@
1U_0402_6.3V6K
RY>gK$;1+D,5+a$?HA$m)00JZY
Imax : 2.8 A
+1.0V_MPHYGT
RY>gK$;1+D'+_$?HA$11-+0$m)00JZYP$11-++$m+-0JZY
1
1
CC59
CC60
2
2
@
1U_0402_6.3V6K
47U_0805_6.3V6M
C C
+1.0V_SRAM
RY>gK$;1+D,5-0$?HA$m)00JZY
1
CC62
2
@
1U_0402_6.3V6K
+1.0V_APLLEBB
1
2
+1.0V_AMPHYPLL
+1.0V_APLL
+1.0V_PRIM
+3.3V_ALW_DSW
+3.3V_HDA
+3VALW_PCH
+1.0V_PRIM
RY>gK$;1+D'+a$?HA$m+-0JZY
CC63
1U_0402_6.3V6K
+1.0V_AMPHYPLL+1.0V_MPHYGT
12
1
2
1
CC86
2
1U_0402_6.3V6K
RY>gK$;1+D.+_$?HA$m+-0JZY
1
CC74
CC75
2
@
@
1U_0402_6.3V6K
47U_0805_6.3V6M
+1.0V_APLL+1.0V_PRIM
0.1U_0603_25V7K
CC83
1
@
2
CC87
1U_0402_6.3V6K
RY>gK$;1+D'-0$?HA$m+00JZY
RC170 0_0603_5%@
RY>gK$;1+D.+b$?HA$m+00JZY
RC173 0_0603_5%@
12
12
22U_0603_6.3V6M
1
2
+3.3V_HDA
22U_0603_6.3V6M
@
CC80
1
2
RY>gK$;1+D.+_P$;1+D/+_$?HA$m+00JZY
RC169 0_0603_5%@
1
CC73
2
@
0.1U_0402_10V7K
RY>gK$;1+DC+_$?HA$m+00JZY
L1
1 2
BLM15BD601SN1D_2P
@
CC81
RF@
8.2P_0402_50V8D
CC82
1
2
+3VALW +1.8V_PRIM +1.0V_PRIM
1
CC85
2
1
2
1U_0402_6.3V6K
+3VALW_PCH
RY>gK$;1+D,O+b$?HA$m)00JZY
8.2P_0402_50V8D
CC61
B B
A A
1
RF@
2
+3VALW +3.3V_ALW_DSW
RC163 0_0603_5%@
L2
1 2
BLM15BD601SN1D_2P
RF@
12
Compal Confidential for Dell review
5
4
+1.0V_CLK2+1.0V_PRIM
RC171 0_0603_5%@
1
@
2
CC76
47U_0603_6.3V6M
+1.0V_CLK4+1.0V_PRIM
1
@
2
CC84
47U_0603_6.3V6M
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
RY>gK$;1+D/+b$?HA$m+00JZY
12
1
@
2
CC77
47U_0603_6.3V6M
2
+3VALW_PCH+1.0V_CLK5+1.0V_PRIM
RY>gK$;1+D,.+\$?HA$m+-0JZY
1
1
CC78
2
CC79
2
1U_0402_6.3V6K
0.1U_0402_10V7K
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
MCP(13/14)PCH PWR
MCP(13/14)PCH PWR
MCP(13/14)PCH PWR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LA-D801P
LA-D801P
LA-D801P
1
18 61Tuesday, June 21, 2016
18 61Tuesday, June 21, 2016
18 61Tuesday, June 21, 2016
A00
A00
A00
5
4
3
2
1
GND 1 OF 3
SKL-U
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58
AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38
AV1
AV68
AV69
AV70
AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57
AW6
AW60
AW62
AW64
AW66
AW8
AY66
B10
B14
B18
B22
B30
B34
B39
B44
B48
B53
B58
B62
B66
B71
BA1
BA10
BA14
BA18
BA2
BA23
BA28
BA32
BA36
F68
BA45
UC1Q
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
UC1P
A5
VSS
A67
VSS
A70
VSS
AA2
VSS
AA4
D D
C C
B B
AA65
AA68
AB15
AB16
AB18
AB21
AB8
AD13
AD16
AD19
AD20
AD21
AD62
AD8
AE64
AE65
AE66
AE67
AE68
AE69
AF1
AF10
AF15
AF17
AF2
AF4
AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13
AH6
AH63
AH64
AH67
AJ15
AJ18
AJ20
AJ4
AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69
AK8
AL2
AL28
AL32
AL35
AL38
AL4
AL45
AL48
AL52
AL55
AL58
AL64
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND 2 OF 3
SKL-U
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BA49
BA53
BA57
BA6
BA62
BA66
BA71
BB18
BB26
BB30
BB34
BB38
BB43
BB55
BB6
BB60
BB64
BB67
BB70
C1
C25
C5
D10
D11
D14
D18
D22
D25
D26
D30
D34
D39
D44
D45
D47
D48
D53
D58
D6
D62
D66
D69
E11
E15
E18
E21
E46
E50
E53
E56
E6
E65
E71
F1
F13
F2
F22
F23
F27
F28
F32
F33
F35
F37
F38
F4
F40
F42
BA41
F8
VSS
G10
VSS
G22
VSS
G43
VSS
G45
VSS
G48
VSS
G5
VSS
G52
VSS
G55
VSS
G58
VSS
G6
VSS
G60
VSS
G63
VSS
G66
VSS
H15
VSS
H18
VSS
H71
VSS
J11
VSS
J13
VSS
J25
VSS
J28
VSS
J32
VSS
J35
VSS
J38
VSS
J42
VSS
J8
VSS
K16
VSS
K18
VSS
K22
VSS
K61
VSS
K63
VSS
K64
VSS
K65
VSS
K66
VSS
K67
VSS
K68
VSS
K70
VSS
K71
VSS
L11
VSS
L16
VSS
L17
VSS
SKL-U_BGA1356
UC1R
GND 3 OF 3
SKL-U
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
18 OF 20
L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21
SKL-U_BGA1356
A A
16 OF 20
SKL-U_BGA1356
17 OF 20
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Confidential for Dell review
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
MCP(14/14)VSS
MCP(14/14)VSS
MCP(14/14)VSS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LA-D801P
LA-D801P
LA-D801P
1
19 61Tuesday, June 21, 2016
19 61Tuesday, June 21, 2016
19 61Tuesday, June 21, 2016
A00
A00
A00
Loading...