Compal LA-D641P Schematics

Model Name : B5/B7W1A File Name : LA-D641P

1 1

Compal Confidential

2 2

B5/B7W1A M/B Schematics Document

Intel Apollo lake

UMA

2016-07-22

3 3

REV:1.A

For 1A PCB

PCB15A@

ZZZ2

Part Number

DA6001K401A PCB 1NU LA-D641P REV1A MB 1

PCB17A@

ZZZ3

Part Number

DA6001K411A PCB 1NU LA-D641P REV1A MB 2

4 4

PCB15@

ZZZ

Part Number

DA6001K4000 PCB 1NU LA-D641P REV0 MB 1

PCB17@

ZZZ

Part Number

DA6001K4100 PCB 1NU LA-D641P REV0 MB 2

Description

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/03/19 2015/03/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Cover Page

B5W1A_LA-D641PR1A

1 45Monday, July 25, 2016

1.A

DDR3L-ON BOARD 1Rx16

CHA:DDR3L-Memory Down

eDP Conn.

P.25

1 1

HDMI Conn.

P.20

P.21

CHB:204pin DDR3L-SO-DIMM X1

P.18

P.16,17

Memory BUS

port 0

EDPx1

DDI x2

PCIE 2.0 x1

port 2

RJ45 Conn.

2 2

LAN(GbE)

RTL8111H/GUS

P.22

Apollo Lake

SOC

eMMC

P.19

P.25

port 1

P.25

EMMC

SATA 3.0 x2

port 0

I2C BUS

BGA 1296 balls

31 x 24 mm

LPC BUS

Dual Channel

1.35V DDR3L 1600

page 05~15

USB2.0 x8

USB3.0 x1

PCIE 2.0 x1

HD Audio

SPI

port 1

USB 3.0 Conn

P.26

port 1

port 3

port 2

USB 2.0 Conn

P.26

port 3

USB 2.0 On Sub/B

P.26

HDA Codec

ALC233

port 4 port 5 port 6

Touch Panel

P.20

HD Camera Conn.

NGFF WLAN/BT

P.29

P.23

P.20

port 7

Card Reader RTS5170

On Sub/B

P.26

3 3

RTC CKT.

DC/DC Interface CKT.

Power Circuit DC/DC

P.32~P.41

4 4

LED/Power On/Off

SATA ODD Conn.

P.14

P.31

P.28

SATA HDD Conn.

P.28

Touch Pad PS2/I2C

EC ENE KB9022

PS2 BUS (reserve I2C)

P.27

P.28

Int.KBD

SPI ROM

1.8V

P.09

(8MB)

Speaker UAJ

P.29 P.29

Int. MIC

on Sub/B

Sub Board

Security Classification

Fan Control

P.30

LS-D671P USB/Audio/CR

P.26

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/03/19 2015/03/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

B5W1A_LA-D641PR1A

2 45Monday, July 25, 2016

1.A

Voltage Rails

S0 S3 S4/S5Power Plane Description

+19V_VIN BATT+ 12V Battery power supply +19VB +RTCVCC RTC Battery Power +1.24VALW

1 1

+1.8VALW +1.8v Always power rail +3V_SOC +3v Always power rail for SOC +3VALW +3.3v Always power rail +5VALW

+3V_PTP +3.3V power rail for PTP +VNN other (non core) logic voltage for SOC +VCC_VCGI Core & GFX voltage for SOC +0.675VS +0.675V power rail for DDR3L Terminator +1.05VS +1.05v System power rail +1.8VS +3VS +5VS

2 2

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. Note : ON** dGPU optimus on

19V Adapter power supply

AC or battery power rail for power circuit. (19V/12V)

+1.24v Always power rail

+5.0v Always power rail +1.35V power rail for DDR3L+1.35V

+1.8v system power rail +3.3v system power rail +5.0v system power rail

ON ON O

N ONON ON ONON ON ONON

ONON ON ONON ON ONON ON ONON

OFF

FF OFF

O OFF OFF

OFF OFFON

NONON

ON ON

ONONOFF OFF

ON OFF OFF ON OFF OFF ON OFF OFF ON OFF OFF

EC SMBUS Routing Table

EC EC_SMB_CK1

EC_SMB_DA1 EC_SMB_CK2

EC_SMB_DA2

Power

+3VALW

+3VS

BAT CHGR

VXVXX

NGFF

Board ID / SKU ID Table for AD channel

43 level BOM table

SMT MB AD641 B5W1A QKT4 HDMI431A2BBOL07

SMT MB AD641 B5W1A QKTY 2G HDMI431A2BBOL08 431A2BBOL09 SMT MB AD641 B5W1A QKTW 2G HDMI 431A2BBOL60 SMT MB AD641 B7W1A QKT4 HDMI 431A2BBOL61 SMT MB AD641 B7W1A QKT4 2G HDMI 431A2BBOL62 SMT MB AD641 B7W1A QKTY 2G HDMI 431A2BBOL63 SMT MB AD641 B7W1A QKTW 2G HDMI

Description43 Level BOM Structure

233@/8111H@/NBYOC@/CMC@/PCB15@/QKT4@ 233@/8111H@/NBYOC@/CMC@/PCB15@/QKTY@/MD@ 233@/8111H@/NBYOC@/CMC@/PCB15@/QKTW@/MD@ 233@/8111H@/NBYOC@/CMC@/PCB17@/QKT4@ 233@/8111H@/NBYOC@/CMC@/PCB17@/QKT4@/MD@ 233@/8111H@/NBYOC@/CMC@/PCB17@/QKTY@/MD@ 233@/8111H@/NBYOC@/CMC@/PCB17@/QKTW@/MD@

BOARD ID Table_LA-D641P

Board ID

01 02 03 04 05 Pre MP_LA-D641PR1A

PCB Revision

EVT_LA-D641PR01 DVT_LA-D641PR02 PVT(DVT2)_LA-D641PR03 Pre MP_LA-D641PR10

3 3

SOC SMBUS Routing Table

SOC

Power

DIMM1 DIMM2

Unpop @

SMB Address SOC_SMBCLK

SOC_SMBDATA

+3VS

V V

Touch Screen I2C TSI@ TPM

I2C Map

Power

I2C Address I2C Port3

4 4

I2C Port4

+1.8VALW to +TS_PWR +1.8VALW to +3V_PTP

Touch PAD

0xXX 0xXX

Touch Panel

NTPM

CODEC(ALC233) 233@ CODEC(ALC255) 255@

Hynix DRAM on board HYN@

intel CMC CMC@

BOM Option Table

Item BOM Structure

CONN@Connector EMC@EMC requirement @EMC@EMC requirement depop

TPM@ NTPM@ DBG@Power Button

8111H@RTL 8111H 8111GUS@RTL8111GUS

SAM@Samsung DRAM on board

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BOM Option Table

Item BOM Structure

with BYOC BYOC@ without BYOC NBYOC@ EMMC EMMC@ EMMC V5.0 EMMCV5@ A0 Step need to stuff A0S@ Kingston 32G EMMC KINGSTON32G@ PRE QS CPU QLB5 QLB5@ PRE QS CPU QLB6 PRE QS CPU QLB8

15" PCB 1.A PCB15A@ 17" PCB 1.A PCB17A@

Compal Secret Data

2014/03/19 2015/03/18

Compal Secret Data

Deciphered Date

QLB6@ QLB8@ PCB15@15" PCB 1.0 PCB17@17" PCB 1.0 MD@Memory down

MCN@Micron DRAM on board

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Notes List

B5W1A_LA-D641PR1A

3 45Monday, July 25, 2016

1.A

VR_ON

RT3601EAGQW (PU901)

SVID control

1 1

SYSON

RT3601EAGQW

PU801)

(

(PU501)

ADAPTER

3V_EN

SY8286BRAC

(PU401)

CHARGER

+19VB

4800mA

21000mA

6400mART8207MZQW

+VNN

+VCC_VCGI

+1.35VP

SUSP#

PJ501

+0.675VSP

+1.35V

+3VALWP

EN_1.05VS

SY8003ADFC (PU601)

3000mA

+1.05VP

PJ601

+1.05VS

0 ohm

+1.05VS_SOC_SRAM

0 ohm

+1.05VS_SOC_DDI

0 ohm

+1.05VS_SOC_FHV0

0 ohm

BATTERY

2 2

+1.05VS_SOC_FUSE

0 ohm

+1.05VS_SOC_FHV1

3V_EN

SY6288C20AAC

(UQ12)

VNN_PWRGD

SY8032ABC

(PU701)

+1.8V_PG PJ704

SY8032ABC (PU802)

150mA

1192mA

300mA

+3V_SOC

+1.8VALWP

+1.24VALWP

DMG2301U (QQ25)

+1.24VALW

785mA

+1.8VS

0 ohm

+1.24V_1.35VALW_GLML

0 ohm

+1.24V_1.35VALW_PLL

0 ohm

+1.24V_1.35VALW_USB2

0 ohm

SUSP#

3 3

LAN_PWR_EN

EM5209VF (U11)

SY6288C20AAC (UL1)

EC_ON

SY8286CRAC (PU402)

6000mA

+5VALWP

SUSP# 4716mA

EM5209VF (U11)

5354mA

70mA

+3VS

+3V_LAN

+5VS

0 ohm

ENVDD

JPA1

+3VS_WLAN

SY6288C20AAC (UX8)

+VDDA

+5VS_HDD

+1.24V_1.35VALW_MPHY

+LCDVDD

0 ohm

USB_PWR_EN

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SY6288C20AAC (US21)

2014/03/19 2015/03/18

+USB3_VCCA

Compal Secret Data

Deciphered Date

+5VS_ODD

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Power Rail

B5W1A_LA-D641PR1A

4 45Monday, July 25, 2016

1.A

UC1E

EDP_TXP0<20> EDP_TXN0<20> EDP_TXP1<20> EDP_TXN1<20>

1 1

EDP_AUXP<20> EDP_AUXN<20>

1 2

RC242 402_0402_1%

CAD note: Trace width=20 mils,Spacing=25mil,Max length=100mils

HDMI DDC (Port C)

SOC_DP0_CTRL_DATA<21> SOC_DP0_CTRL_CLK<21>

EDP_RCOMP_P EDP_RCOMP_N

AG7

AG9 AG12 AG10

AC6

AC5

AC7

AC9 AH10

AH9

AG6

AG5

C49

B49

C54

A54

EDP_TXP_0 EDP_TXN_0 EDP_TXP_1 EDP_TXN_1 EDP_TXP_2 EDP_TXN_2 EDP_TXP_3 EDP_TXN_3

EDP_AUXP EDP_AUXN

EDP_RCOMP_P EDP_RCOMP_N

DDI0_DDC_SDA DDI0_DDC_SCL DDI1_DDC_SDA DDI1_DDC_SCL

DDI_DDC NC to disable (PDG0p9 Page228)

PL_BGA1296

PreMP modify B0 step

2 2

3 3

4 4

UC1

SR2YB@

S IC FH8066802980002 SR2YB B0 1.1G FCBGA

SA0000A3X40

UC1

SR2YA@

S IC FH8066802979803 SR2YA B0 1.1G FCBGA

SA0000A3V40

UC1

SR2Y9@

S IC FH8066802979703 SR2Y9 B0 1.1G FCBGA

SA0000A3U40

reMP modify B1 step

UC1

SR2Z7@

S IC FH8066802980002 SR2Z7 B1 1.1G FCBGA

SA0000A3X60

UC1

SR2Z6@

S IC FH8066802979803 SR2Z6 B1 1.1G FCBGA

SA0000A3V60

UC1

SR2Z5@

S IC FH8066802979703 SR2Z5 B1 1.1G FCBGA

SA0000A3U60

From HDMI

T5008 @ T5132 @

HDMI_HPD#<21>

UC1H

T52

SDIO_D0

P57

SDIO_D1

T54

SDIO_D2

T55

SDIO_D3

T57

SDIO_CMD

P58

SDIO_CLK

P51

SDIO_PWR_DWN#

AC49

SDCARD_D0

AC48

SDCARD_D1

AC51

SDCARD_D2

AB51

SDCARD_D3

AC52

SDCARD_CMD

AB58

SDCARD_CLK

AB54

SDCARD_CD#

AB55

SDCARD_LVL_WP

APL_BGA1296

UC1F

AP12

MDSI_A_DP_0

AP10

MDSI_A_DN_0

AR2

MDSI_A_DP_1

AR1

MDSI_A_DN_1

AP15

MDSI_A_DP_2

AP13

MDSI_A_DN_2

AP6

MDSI_A_DP_3

AP5

MDSI_A_DN_3

AP2

MDSI_A_CLKP

AP3

MDSI_A_CLKN

B51

MIPI_I2C_SDA

C51

MIPI_I2C_SCL

A50

GPIO_199

C50

GPIO_200

M45

MDSI_A_TE

M43

MDSI_C_TE

PL_BGA1296

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

APL_SOC

1.05V

1.8V

APL_SOC

1.8V

1.8V/3.3V

1.8V

8 OF 23

APL_SOC

.24V

1.24V

1.8V

6 OF 23

DDI0_TXP_0 DDI0_TXN_0 DDI0_TXP_1 DDI0_TXN_1

1.05V

DDI0_TXP_2 DDI0_TXN_2 DDI0_TXP_3 DDI0_TXN_3

DDI1_TXP_0 DDI1_TXN_0 DDI1_TXP_1 DDI1_TXN_1

1.05V

DDI1_TXP_2 DDI1_TXN_2 DDI1_TXP_3 DDI1_TXN_3

DDI0_AUXP DDI0_AUXN

1.05V

DDI1_AUXP DDI1_AUXN

DDI0_RCOMP_P DDI0_RCOMP_N

5 OF 23

EMMC_D0 EMMC_D1 EMMC_D2 EMMC_D3 EMMC_D4

1.8V

EMMC_D5 EMMC_D6 EMMC_D7

EMMC_CLK

EMMC_RCLK

EMMC_CMD

MDSI_C_DP_0 MDSI_C_DN_0 MDSI_C_DP_1 MDSI_C_DN_1 MDSI_C_DP_2 MDSI_C_DN_2 MDSI_C_DP_3

1.24V

MDSI_C_DN_3

MDSI_C_CLKP

MDSI_C_CLKN

PNL0_VDDEN

PNL0_BKLTEN

1.8V

PNL0_BKLTCTL

PNL1_VDDEN

1.8V1.8V

PNL1_BKLTEN

PNL1_BKLTCTL

2014/05/19 2015/12/31

AK3 AK2 AM3 AM2 AH3 AH2 AL2 AL1

AF2 AF3 AD3 AD2 AC1 AC2 AB3 AB2

AM16 AM15 AK16 AK15

AG1

DDI0_RCOMP_P

AG2

DDI0_RCOMP_N

V58 T58 T59 V51 V52 Y49 V55 V57

Y58 V54 Y51

AK7 AK6 AM5 AM6 AM12 AM10 AK13 AM13

AM9 AM7

C47

ENVDD

B47

DDI1_ENBKL

C46

DDI1_PWM

C52 B53 C53

Compal Secret Data

Deciphered Date

HDMI_TX2+ <21>

HDMI_TX2- <21>

HDMI_TX1+ <21>

HDMI_TX1- <21>

HDMI_TX0+ <21>

HDMI_TX0- <21>

HDMI_CLK+ <21>

HDMI_CLK- <21>

RC243402_0402_1%

ENVDD <20>

EMMC_D0 <19> EMMC_D1 <19> EMMC_D2 <19> EMMC_D3 <19> EMMC_D4 <19> EMMC_D5 <19> EMMC_D6 <19> EMMC_D7 <19>

EMMC_CLK <19> EMMC_RCLK <19> EMMC_CMD <19>

DDI1_ENBKL <27>

+1.8VALW

UC64

DDI1_PWM

NL17SZ07DFT2G_SC70-5

SA00004BV00

INVT_PWM_SOC

DDI1_ENBKL ENVDD DDI1_PWM

ORB & CRB un stuff need to check CKL later

Title

Size Document Number Rev

Custom

Date: Sheet of

INVT_PWM_SOC

+3VS

1 2

RC11614.7K_0402_5%

RPC41

18 27 36 45

100K_0804_8P4R_5%

Compal Electronics, Inc.

Compal Electronics, Inc.Compal Electronics, Inc.

APL(1/11)DDI,MSIC,XDP,EDP

APL(1/11)DDI,MSIC,XDP,EDPAPL(1/11)DDI,MSIC,XDP,EDP

B5W1A_LA-D641PR1A

B5W1A_LA-D641PR1AB5W1A_LA-D641PR1A

INVT_PWM_SOC <20>

5 45Monday, July 25, 2016

1.A

Non-Interleaved Memory

DDR_M0_D[0..15]<16>

D D

DDR_M0_D[16..31]<16>

C C

DDR_M0_D0 DDR_M0_D1 DDR_M0_D2 DDR_M0_D3 DDR_M0_D4 DDR_M0_D5 DDR_M0_D6 DDR_M0_D7 DDR_M0_D8 DDR_M0_D9 DDR_M0_D10 DDR_M0_D11 DDR_M0_D12 DDR_M0_D13 DDR_M0_D14 DDR_M0_D15 DDR_M0_D16 DDR_M0_D17 DDR_M0_D18 DDR_M0_D19 DDR_M0_D20 DDR_M0_D21 DDR_M0_D22 DDR_M0_D23 DDR_M0_D24 DDR_M0_D25 DDR_M0_D26 DDR_M0_D27 DDR_M0_D28 DDR_M0_D29 DDR_M0_D30 DDR_M0_D31

AY62 AY61 BE62 BG62

BD63 AW62 AW63

BD62

AV59

AU63

AU62

AV58

AV57

AT55

AT54

AY59

AY57

BB57

BD59

BF59

AV54

AY55

AV52

BD58

BE56

BD54

BF58

BE50

BD50

BB50

BA50

BB54

UC1A

MEM_CH0_DQ0 MEM_CH0_DQ1 MEM_CH0_DQ2 MEM_CH0_DQ3 MEM_CH0_DQ4 MEM_CH0_DQ5 MEM_CH0_DQ6 MEM_CH0_DQ7 MEM_CH0_DQ8 MEM_CH0_DQ9 MEM_CH0_DQ10 MEM_CH0_DQ11 MEM_CH0_DQ12 MEM_CH0_DQ13 MEM_CH0_DQ14 MEM_CH0_DQ15 MEM_CH0_DQ16 MEM_CH0_DQ17 MEM_CH0_DQ18 MEM_CH0_DQ19 MEM_CH0_DQ20 MEM_CH0_DQ21 MEM_CH0_DQ22 MEM_CH0_DQ23 MEM_CH0_DQ24 MEM_CH0_DQ25 MEM_CH0_DQ26 MEM_CH0_DQ27 MEM_CH0_DQ28 MEM_CH0_DQ29 MEM_CH0_DQ30 MEM_CH0_DQ31

PL_BGA1296

APL_SOC

1 OF 23

MEM_CH0_DQ32 MEM_CH0_DQ33 MEM_CH0_DQ34 MEM_CH0_DQ35 MEM_CH0_DQ36 MEM_CH0_DQ37 MEM_CH0_DQ38 MEM_CH0_DQ39 MEM_CH0_DQ40 MEM_CH0_DQ41 MEM_CH0_DQ42 MEM_CH0_DQ43 MEM_CH0_DQ44 MEM_CH0_DQ45 MEM_CH0_DQ46 MEM_CH0_DQ47 MEM_CH0_DQ48 MEM_CH0_DQ49 MEM_CH0_DQ50 MEM_CH0_DQ51 MEM_CH0_DQ52 MEM_CH0_DQ53 MEM_CH0_DQ54 MEM_CH0_DQ55 MEM_CH0_DQ56 MEM_CH0_DQ57 MEM_CH0_DQ58 MEM_CH0_DQ59 MEM_CH0_DQ60 MEM_CH0_DQ61 MEM_CH0_DQ62 MEM_CH0_DQ63

AR39 AV37 AW37 AR37 AT37 AT41 AR41 AW35 BJ44 BG39 BG40 BJ40 BG43 BG44 BH45 BH41 BA34 BE34 BD34 BD37 BB37 BE39 BD39 BB34 BJ38 BG34 BG33 BH33 BG38 BH37 BG37 BJ34

DDR_M0_D32 DDR_M0_D33 DDR_M0_D34 DDR_M0_D35 DDR_M0_D36 DDR_M0_D37 DDR_M0_D38 DDR_M0_D39 DDR_M0_D40 DDR_M0_D41 DDR_M0_D42 DDR_M0_D43 DDR_M0_D44 DDR_M0_D45 DDR_M0_D46 DDR_M0_D47 DDR_M0_D48 DDR_M0_D49 DDR_M0_D50 DDR_M0_D51 DDR_M0_D52 DDR_M0_D53 DDR_M0_D54 DDR_M0_D55 DDR_M0_D56 DDR_M0_D57 DDR_M0_D58 DDR_M0_D59 DDR_M0_D60 DDR_M0_D61 DDR_M0_D62 DDR_M0_D63

DDR_M0_D[32..47] <17>

DDR_M0_D[48..63] <17>

DDR_M1_D[0..15]<18>

DDR_M1_D0 DDR_M1_D1 DDR_M1_D2 DDR_M1_D3 DDR_M1_D4 DDR_M1_D5 DDR_M1_D6 DDR_M1_D7 DDR_M1_D8 DDR_M1_D9 DDR_M1_D10 DDR_M1_D11 DDR_M1_D12 DDR_M1_D13

DDR_M1_D[16..31]<18>

DDR_M1_D14 DDR_M1_D15 DDR_M1_D16 DDR_M1_D17 DDR_M1_D18 DDR_M1_D19 DDR_M1_D20 DDR_M1_D21 DDR_M1_D22 DDR_M1_D23 DDR_M1_D24 DDR_M1_D25 DDR_M1_D26 DDR_M1_D27 DDR_M1_D28 DDR_M1_D29 DDR_M1_D30 DDR_M1_D31

BJ26 BG30 BH31 BG31 BH27 BG27 BG26

BJ30 BA30 BB30 BE30 BD30 BE25 BB27 BD25 BD27 BG24

BJ20 BH23

BJ24 BG20 BG21 BH19 BG25 AT27

AW29

AR27 AT23 AV27 AR25 AR23

AW27

UC1C

MEM_CH1_DQ0 MEM_CH1_DQ1 MEM_CH1_DQ2 MEM_CH1_DQ3 MEM_CH1_DQ4 MEM_CH1_DQ5 MEM_CH1_DQ6 MEM_CH1_DQ7 MEM_CH1_DQ8 MEM_CH1_DQ9 MEM_CH1_DQ10 MEM_CH1_DQ11 MEM_CH1_DQ12 MEM_CH1_DQ13 MEM_CH1_DQ14 MEM_CH1_DQ15 MEM_CH1_DQ16 MEM_CH1_DQ17 MEM_CH1_DQ18 MEM_CH1_DQ19 MEM_CH1_DQ20 MEM_CH1_DQ21 MEM_CH1_DQ22 MEM_CH1_DQ23 MEM_CH1_DQ24 MEM_CH1_DQ25 MEM_CH1_DQ26 MEM_CH1_DQ27 MEM_CH1_DQ28 MEM_CH1_DQ29 MEM_CH1_DQ30 MEM_CH1_DQ31

PL_BGA1296

APL_SOC

3 OF 23

MEM_CH1_DQ32 MEM_CH1_DQ33 MEM_CH1_DQ34 MEM_CH1_DQ35 MEM_CH1_DQ36 MEM_CH1_DQ37 MEM_CH1_DQ38 MEM_CH1_DQ39 MEM_CH1_DQ40 MEM_CH1_DQ41 MEM_CH1_DQ42 MEM_CH1_DQ43 MEM_CH1_DQ44 MEM_CH1_DQ45 MEM_CH1_DQ46 MEM_CH1_DQ47 MEM_CH1_DQ48 MEM_CH1_DQ49 MEM_CH1_DQ50 MEM_CH1_DQ51 MEM_CH1_DQ52 MEM_CH1_DQ53 MEM_CH1_DQ54 MEM_CH1_DQ55 MEM_CH1_DQ56 MEM_CH1_DQ57 MEM_CH1_DQ58 MEM_CH1_DQ59 MEM_CH1_DQ60 MEM_CH1_DQ61 MEM_CH1_DQ62 MEM_CH1_DQ63

BF6 BD10 BE14 BB10 BA14 BB14 BD14 BE8 AV12 BD6 BD5 BB7 AV10 AY9 AY7 BF5 AU2 AT10 AT9 AU1 AY5 AV5 AV6 AV7 AY2 BD2 BD1 BE2 AW1 AW2 AY3 BG2

DDR_M1_D32 DDR_M1_D33 DDR_M1_D34 DDR_M1_D35 DDR_M1_D36 DDR_M1_D37 DDR_M1_D38 DDR_M1_D39 DDR_M1_D40 DDR_M1_D41 DDR_M1_D42 DDR_M1_D43 DDR_M1_D44 DDR_M1_D45 DDR_M1_D46 DDR_M1_D47 DDR_M1_D48 DDR_M1_D49 DDR_M1_D50 DDR_M1_D51 DDR_M1_D52 DDR_M1_D53 DDR_M1_D54 DDR_M1_D55 DDR_M1_D56 DDR_M1_D57 DDR_M1_D58 DDR_M1_D59 DDR_M1_D60 DDR_M1_D61 DDR_M1_D62 DDR_M1_D63

DDR_M1_D[32..47] <18>

DDR_M1_D[48..63] <18>

UC1B

BB63 BC62 AT59 AT58 BB59 BB58 BD52 BB52 AV39

AW39

BJ42 BG42 BB35 BD35 BG36 BH35 BD47 BB47

BG50 BG51 BH51 BD41 BE41

BJ52 BG53 BG55 BH53 BG52 BH49 BH55 BG54 BG46 BG56 BG57

AR35 AT34

MEM_CH0_DQSP0 MEM_CH0_DQSN0 MEM_CH0_DQSP1 MEM_CH0_DQSN1 MEM_CH0_DQSP2 MEM_CH0_DQSN2 MEM_CH0_DQSP3 MEM_CH0_DQSN3 MEM_CH0_DQSP4 MEM_CH0_DQSN4 MEM_CH0_DQSP5 MEM_CH0_DQSN5 MEM_CH0_DQSP6 MEM_CH0_DQSN6 MEM_CH0_DQSP7 MEM_CH0_DQSN7 MEM_CH0_DQSP8 MEM_CH0_DQSN8

MEM_CH0_MA0 MEM_CH0_MA1 MEM_CH0_MA2 MEM_CH0_MA3 MEM_CH0_MA4 MEM_CH0_MA5 MEM_CH0_MA6 MEM_CH0_MA7 MEM_CH0_MA8 MEM_CH0_MA9 MEM_CH0_MA10 MEM_CH0_MA11 MEM_CH0_MA12 MEM_CH0_MA13 MEM_CH0_MA14 MEM_CH0_MA15

MEM_CH0_VREFCA MEM_CH0_VREFDQ

PL_BGA1296

T242 @ T243 @

DDR_M0_DQS0 DDR_M0_DQS#0 DDR_M0_DQS1 DDR_M0_DQS#1 DDR_M0_DQS2 DDR_M0_DQS#2 DDR_M0_DQS3 DDR_M0_DQS#3 DDR_M0_DQS4 DDR_M0_DQS#4 DDR_M0_DQS5 DDR_M0_DQS#5 DDR_M0_DQS6 DDR_M0_DQS#6 DDR_M0_DQS7 DDR_M0_DQS#7

DDR_M0_MA0 DDR_M0_MA1 DDR_M0_MA2 DDR_M0_MA3 DDR_M0_MA4 DDR_M0_MA5 DDR_M0_MA6 DDR_M0_MA7 DDR_M0_MA8 DDR_M0_MA9 DDR_M0_MA10 DDR_M0_MA11 DDR_M0_MA12 DDR_M0_MA13 DDR_M0_MA14

DDR_M0_DQS0<16>

DDR_M0_DQS#0<16>

DDR_M0_DQS1<16>

DDR_M0_DQS#1<16>

DDR_M0_DQS2<16>

DDR_M0_DQS#2<16>

DDR_M0_DQS3<16>

DDR_M0_DQS#3<16>

DDR_M0_DQS4<17>

DDR_M0_DQS#4<17>

DDR_M0_DQS5<17>

DDR_M0_DQS#5<17>

DDR_M0_DQS6<17>

DDR_M0_DQS#6<17>

DDR_M0_DQS7<17>

DDR_M0_DQS#7<17>

B B

A A

DDR_M0_MA0<16,17> DDR_M0_MA1<16,17> DDR_M0_MA2<16,17> DDR_M0_MA3<16,17> DDR_M0_MA4<16,17> DDR_M0_MA5<16,17> DDR_M0_MA6<16,17> DDR_M0_MA7<16,17> DDR_M0_MA8<16,17>

DDR_M0_MA9<16,17> DDR_M0_MA10<16,17> DDR_M0_MA11<16,17> DDR_M0_MA12<16,17> DDR_M0_MA13<16,17> DDR_M0_MA14<16,17>

Follow PDG 1P0 Page 82 (conrirm with intel OK)

APL_SOC

MEM_CH0_CB0 MEM_CH0_CB1 MEM_CH0_CB2 MEM_CH0_CB3 MEM_CH0_CB4 MEM_CH0_CB5 MEM_CH0_CB6 MEM_CH0_CB7

MEM_CH0_BA0 MEM_CH0_BA1 MEM_CH0_BA2

MEM_CH0_ODT0 MEM_CH0_ODT1

MEM_CH0_CLKP0 MEM_CH0_CLKN0 MEM_CH0_CLKP1 MEM_CH0_CLKN1

MEM_CH0_CKE0 MEM_CH0_CKE1

MEM_CH0_CS0# MEM_CH0_CS1#

MEM_CH0_RESET#

MEM_CH0_CAS# MEM_CH0_RAS#

MEM_CH0_WE#

2 OF 23

DDR_M0_DRAMRST#

DDR_M1_DRAMRST#

For ESD request 05/04

AW48 AW47 BB43 AW45 AV48 AV47 BD43 BA45

BJ48 BG49 BH57

AW43 AW41

AT43

NCTF1

BB41

NCTF2

BH58

NCTF3

BJ58

NCTF4

BD45 BE45 BB48 BD48

BH61 BH60

AR43 BA41

AR34 BH47 BG47 BG48

CC219 .1U_0402_16V7K

@EMC@

CC220 .1U_0402_16V7K

EMC@

DDR_M0_BS0 DDR_M0_BS1 DDR_M0_BS2

DDR_M0_ODT0 DDR_M0_ODT1

DDR_M0_CLK0 DDR_M0_CLK#0

DDR_M0_CKE0 DDR_M0_CKE1

DDR_M0_CS#0 DDR_M0_CS#1

DDR_M0_DRAMRST#DDR_M0_MA15 DDR_M0_CAS# DDR_M0_RAS# DDR_M0_WE#

DDR_M1_DQS0<18>

DDR_M1_DQS#0<18>

DDR_M1_DQS1<18>

DDR_M1_DQS#1<18>

DDR_M1_DQS2<18>

DDR_M1_DQS#2<18>

DDR_M1_DQS3<18>

DDR_M1_DQS#3<18>

DDR_M0_BS0 <16,17> DDR_M0_BS1 <16,17> DDR_M0_BS2 <16,17>

T240@ T241@

DDR_M0_CLK0 <16,17> DDR_M0_CLK#0 <16,17>

DDR_M0_CKE0 <16,17> DDR_M0_CKE1 <16,17>

DDR_M0_CS#0 <16,17> DDR_M0_CS#1 <16,17>

DDR_M0_DRAMRST# <16,17>DDR_M0_MA15<16,17> DDR_M0_CAS# <16,17> DDR_M0_RAS# <16,17> DDR_M0_WE# <16,17>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DDR_M1_DQS4<18>

DDR_M1_DQS#4<18>

DDR_M1_DQS5<18>

DDR_M1_DQS#5<18>

DDR_M1_DQS6<18>

DDR_M1_DQS#6<18>

DDR_M1_DQS7<18>

DDR_M1_DQS#7<18>

DDR_M1_MA0<18> DDR_M1_MA1<18> DDR_M1_MA2<18> DDR_M1_MA3<18> DDR_M1_MA4<18> DDR_M1_MA5<18> DDR_M1_MA6<18> DDR_M1_MA7<18> DDR_M1_MA8<18>

DDR_M1_MA9<18> DDR_M1_MA10<18> DDR_M1_MA11<18> DDR_M1_MA12<18> DDR_M1_MA13<18> DDR_M1_MA14<18> DDR_M1_MA15<18>

Follow PDG 1P0 Page 82 (conrirm with intel OK)

2014/05/19 2015/12/31

DDR_M1_DQS0 DDR_M1_DQS#0 DDR_M1_DQS1 DDR_M1_DQS#1 DDR_M1_DQS2 DDR_M1_DQS#2 DDR_M1_DQS3 DDR_M1_DQS#3 DDR_M1_DQS4 DDR_M1_DQS#4 DDR_M1_DQS5 DDR_M1_DQS#5 DDR_M1_DQS6 DDR_M1_DQS#6 DDR_M1_DQS7 DDR_M1_DQS#7

DDR_M1_MA0 DDR_M1_MA1 DDR_M1_MA2 DDR_M1_MA3 DDR_M1_MA4 DDR_M1_MA5 DDR_M1_MA6 DDR_M1_MA7 DDR_M1_MA8 DDR_M1_MA9

DDR_M1_MA10 DDR_M1_MA11 DDR_M1_MA12 DDR_M1_MA13 DDR_M1_MA14 DDR_M1_MA15

T244 @ T245 @

Compal Secret Data

Deciphered Date

BG28 BH29 BD29 BB29

BJ22 BG22 AV25

AW25

BB12 BD12

BB5 BB6 AT5 AT6 BC2

BB1 BD23 BE23

BG9 BG10

BH9 BD16 BB16 BG11

BJ12 BG14 BG12 BH11

BG7 BH13 BG13

BH3 BG15 BG16

AR29 AT30

UC1D

MEM_CH1_DQSP0 MEM_CH1_DQSN0 MEM_CH1_DQSP1 MEM_CH1_DQSN1 MEM_CH1_DQSP2 MEM_CH1_DQSN2 MEM_CH1_DQSP3 MEM_CH1_DQSN3 MEM_CH1_DQSP4 MEM_CH1_DQSN4 MEM_CH1_DQSP5 MEM_CH1_DQSN5 MEM_CH1_DQSP6 MEM_CH1_DQSN6 MEM_CH1_DQSP7 MEM_CH1_DQSN7 MEM_CH1_DQSP8 MEM_CH1_DQSN8

MEM_CH1_MA0 MEM_CH1_MA1 MEM_CH1_MA2 MEM_CH1_MA3 MEM_CH1_MA4 MEM_CH1_MA5 MEM_CH1_MA6 MEM_CH1_MA7 MEM_CH1_MA8 MEM_CH1_MA9 MEM_CH1_MA10 MEM_CH1_MA11 MEM_CH1_MA12 MEM_CH1_MA13 MEM_CH1_MA14 MEM_CH1_MA15

MEM_CH1_VREFCA MEM_CH1_VREFDQ

PL_BGA1296

APL_SOC

4 OF 23

MEM_CH1_CB0 MEM_CH1_CB1 MEM_CH1_CB2 MEM_CH1_CB3 MEM_CH1_CB4 MEM_CH1_CB5 MEM_CH1_CB6 MEM_CH1_CB7

MEM_CH1_BA0 MEM_CH1_BA1 MEM_CH1_BA2

MEM_CH1_ODT0 MEM_CH1_ODT1

MEM_CH1_CLKP0 MEM_CH1_CLKN0 MEM_CH1_CLKP1 MEM_CH1_CLKN1

MEM_CH1_CKE0 MEM_CH1_CKE1

MEM_CH1_CS0# MEM_CH1_CS1#

MEM_CH1_RESET#

MEM_CH1_CAS# MEM_CH1_RAS#

MEM_CH1_WE#

Custom

AR21 AT21 AW23 AW21 BA19 AW19 BA23 BB23

BH6

DDR_M1_BS0

BG8

DDR_M1_BS1

BH15

DDR_M1_BS2

AW16

DDR_M1_ODT0

AV16

DDR_M1_ODT1

AV17

NCTF1

BB17

NCTF2

BH17

NCTF3

BJ16

NCTF4

BD19

DDR_M1_CLK0

BE19

DDR_M1_CLK#0

BB21

DDR_M1_CLK1

BD21

DDR_M1_CLK#1

BG18

DDR_M1_CKE0

BG17

DDR_M1_CKE1

BD17

DDR_M1_CS#0

AW17

DDR_M1_CS#1

AR30

DDR_M1_DRAMRST#

BH4

DDR_M1_CAS#

BJ6

DDR_M1_RAS#

BH7

DDR_M1_WE#

Compal Electronics, Inc.

Compal Electronics, Inc.Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

APL(2/11)DDRIII

B5W1A_LA-D641PR1A

B5W1A_LA-D641PR1AB5W1A_LA-D641PR1A

Monday, July 25, 2016

DDR_M1_BS0 <18> DDR_M1_BS1 <18> DDR_M1_BS2 <18>

DDR_M1_ODT0 <18> DDR_M1_ODT1 <18>

DDR_M1_CLK0 <18> DDR_M1_CLK#0 <18> DDR_M1_CLK1 <18> DDR_M1_CLK#1 <18>

DDR_M1_CKE0 <18> DDR_M1_CKE1 <18>

DDR_M1_CS#0 <18> DDR_M1_CS#1 <18>

DDR_M1_DRAMRST# <18> DDR_M1_CAS# <18> DDR_M1_RAS# <18> DDR_M1_WE# <18>

1.A

T4951@ T4952@

D D

USB2/3 MB USB2 MB USB2 SUB/B BT Touch screen Camera CardReader

C C

B B

A A

DMIC_CLK_AB2_GPIO_82<11>

I2S1_SDO_GPIO_78<11>

I2S2_SDO_GPIO_88<11>

I2S3_SDO_GPIO_92<11>

USB20_P1<26> USB20_N1<26> USB20_P2<26> USB20_N2<26> USB20_P3<26> USB20_N3<26> USB20_P4<23> USB20_N4<23> USB20_P5<20> USB20_N5<20> USB20_P6<20> USB20_N6<20> USB20_P7<26> USB20_N7<26>

M54

P54

M52

P52

M55

J62 K61 K62

H63 G62

M57

K59

M58 H59

HDA_RST#<10>

K58

M61

L62 L63

M62

UC1L

V12

USB2_DP0

V10

USB2_DN0

V16

USB2_DP1

V15

USB2_DN1

Y13

USB2_DP2

V13

USB2_DN2

USB2_DP3

USB2_DN3

USB2_DP4

Y10

USB2_DN4

AB6

USB2_DP5

AB7

USB2_DN5

AC12

USB2_DP6

AC10

USB2_DN6

USB2_DP7

USB2_DN7

PL_BGA1296

UC1K

AVS_DMIC_DATA_1 AVS_DMIC_CLK_A1 AVS_DMIC_DATA_2 AVS_DMIC_CLK_B1

AVS_DMIC_CLK_AB2

AVS_I2S1_WS_SYNC AVS_I2S1_SDI AVS_I2S1_SDO AVS_I2S1_BCLK AVS_I2S1_MCLK

AVS_I2S2_WS_SYNC AVS_I2S2_SDI AVS_I2S2_SDO AVS_I2S2_BCLK AVS_I2S2_MCLK

AVS_I2S3_WS_SYNC AVS_I2S3_SDI AVS_I2S3_SDO AVS_I2S3_BCLK

APL_BGA1296

UC1G

P17

MCSI_DP_0

M17

MCSI_DN_0

P21

MCSI_DP_1

R21

MCSI_DN_1

L17

MCSI_DP_2

J17

MCSI_DN_2

F17

MCSI_DP_3

E17

MCSI_DN_3

M19

MCSI_CLKP_0

L19

MCSI_CLKN_0

H19

MCSI_CLKP_2

F19

MCSI_CLKN_2

L37

GP_CAMERASB0

P34

GP_CAMERASB1

J34

GP_CAMERASB2

H30

GP_CAMERASB3

M37

GP_CAMERASB4

F30

GP_CAMERASB5

APL_BGA1296

3.3V

1.8V

1.24V

APL_SOC

1.8V

11 OF 23

APL_SOC

1.24V

1.8V

7 OF 23

APL_SOC

USB2_VBUS_SNS

1.8V

3.3V

1.05V

SVID0_ALERT_B

12 OF 23

3.3V

LPC_CLKOUT0 LPC_CLKOUT1

LPC_SERIRQ LPC_FRAME#

LPC_CLKRUN#

OSC_CLK_OUT_0 OSC_CLK_OUT_1 OSC_CLK_OUT_2

1.8V

OSC_CLK_OUT_3 OSC_CLK_OUT_4

MCSI_RX_DATA0_P MCSI_RX_DATA0_N MCSI_RX_DATA1_P MCSI_RX_DATA1_N MCSI_RX_DATA2_P MCSI_RX_DATA2_N MCSI_RX_DATA3_P MCSI_RX_DATA3_N

MCSI_RX_CLK0_P

1.24V

MCSI_RX_CLK0_N MCSI_RX_CLK1_P MCSI_RX_CLK1_N

GP_CAMERASB6 GP_CAMERASB7

1.8V

GP_CAMERASB8

GP_CAMERASB9 GP_CAMERASB10 GP_CAMERASB11

USB2_OC0# USB2_OC1#

USB2_OTG_ID

SMB_DATA

SMB_CLK

SMB_ALERT#

SVID0_DATA

SVID0_CLK

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

OSCIN

OSCOUT

Y61 Y62 W62 W63

AB61 AA62

AB62 V61 V62

AG62 AF61 AG63 AE60 AF62

R27 P29

+3VS

M23 P23 J21 H21 M25 L25 H25 J25

L23 J23 F25 E25

R35 L34 M34 M35 R34 E30

AC16 B55 C55 AC15

T61 T62 R63

C18 C17 B17

LPC_IO0 LPC_IO1 LPC_IO2 LPC_IO3

LPC_CLK_0 LPC_CLK_1

LPC_SERIRQ LPC_FRAME# LPC_CLKRUN#

SOC_XTAL19_IN SOC_XTAL19_OUT

USB2_VBUSSENSE USB_OC0# USB_OC1# USB_ID

SOC_SMBDATA SOC_SMBCLK SOC_SMBALERT#

SOC_SVID_DAT SOC_SVID_ALERT#

1 2

RC532 20_0402_1%

1 2

RC531 20_0402_1%

1 2

RC534 20_0402_1%

1 2

RC533 20_0402_1%

1 2

RC247 20_0402_1%

1 2

RC490 20_0402_1%

1 2

RC536 20_0402_1%

1 2

RC539 20_0402_1%

1 2

RC538 20_0402_1%

RC25702.2K_0402_5% @

RC25692.2K_0402_5% @

VT2 modify

(Link to DDR)

SMB

SOC_SVID_CLK <39,40>

LPC_IO0_R <27,28> LPC_IO1_R <27,28> LPC_IO2_R <27,28> LPC_IO3_R <27,28>

LPC_SERIRQ_R <27,28> LPC_FRAME#_R <27,28> LPC_CLKRUN#_R <28>

DDR_SMB_CK DDR_SMB_DA

To EC

LPC_CLK0_R <27> LPC_CLK1_R <28>

To EC To TPM

To TPM For TPM

SMB level shift

+3V_SOC

1 2 1 2 1 2

Change P/N to SJ10000N700

9.2MHz_12pF

USB_OC0#

USB_OC1#<26>

USB_OC1#

USB2_VBUSSENSE USB_ID

1 2

RC522 10K_0402_5%

1 2

RC524 10K_0402_5%

1 2

RC525 10K_0402_5%@

1 2

RC526 0_0402_5%

1 2

RC516 0_0402_5%

DVT2 modify

When USB OTG feature is not required,

SVID ALERT

SOC_SVID_ALERT#

RC180 220_0402_5%

SVID DATA

SOC_SVID_DAT

SOC_SMBALERT#

RC5011K_0402_5%

SOC_SMBCLK

RC4991K_0402_5%

SOC_SMBDATA

RC5001K_0402_5%

SOC_SMBCLK

SOC_SMBDATA

PreMP modify

SOC_XTAL19_IN SOC_XTAL19_OUT

CC137

15P_0402_50V8J

+1.05VS

1 2

+1.05VS

1 2

RC517 0_0402_5%@

1 2

RC519 0_0402_5%@

RC248

1 2

200K_0402_5%

GND

19.2MHZ_10PF_7M19200019

Place the PU resistors close to CPU

RC179 68_0402_5%

Place the PU resistors close to CPU

RC181 169_0402_1%

SOC_SVID_DAT <39,40>

1.8V/3.3V selection is done by harware strap GPIO_78 Pu 1K --> PDG 0p7 P.240

+3VS

QC2507A L2N7002DW1T1G_SC88-6

GND

+1.8VALW

SOC_SVID_ALERT#_R <39,40>

QC2507B L2N7002DW1T1G_SC88-6

CC7 15P_0402_50V8J

(To VR)

DDR_SMB_CK <18>

DDR_SMB_DA <18>

Security Classification

2014/05/19 2015/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/05/19 2015/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.Compal Electronics, Inc.

Title

APL(3/11)SPI,ESPI,SMB,LPC

Size Document Number Rev

Custom

B5W1A_LA-D641PR1A

B5W1A_LA-D641PR1AB5W1A_LA-D641PR1A

Date: Sheet of

7 45Monday, July 25, 2016

1.A

UC1I

D D

1 2

PCIE_PTX_C_DRX_P3<23>

NGFF WLAN+BT

C C

PCIE_PTX_C_DRX_N3<23>

PCIE_PRX_DTX_P3<23> PCIE_PRX_DTX_N3<23>

USB2/3 MB

B B

HDD

ODD

CC28 .1U_0402_16V7K

1 2

CC27 .1U_0402_16V7K

1 2

RC246 402_0402_1%

PCH_USB3_TX1_P<26> PCH_USB3_TX1_N<26> PCH_USB3_RX1_P<26> PCH_USB3_RX1_N<26>

SATA_PTX_DRX_P0<25> SATA_PTX_DRX_N0<25> SATA_PRX_DTX_P0<25> SATA_PRX_DTX_N0<25>

SATA_PTX_DRX_P1<25> SATA_PTX_DRX_N1<25> SATA_PRX_DTX_P1<25> SATA_PRX_DTX_N1<25>

PCIE_PTX_DRX_P3 PCIE_PTX_DRX_N3 PCIE_PRX_DTX_P3 PCIE_PRX_DTX_N3

PCIE_RCOMPP PCIE_RCOMPN

PCIE_P5_USB3_P2_TXP

PCIE_P5_USB3_P2_TXN

PCIE_P5_USB3_P2_RXP

PCIE_P5_USB3_P2_RXN

PCIE_P4_USB3_P3_TXP

PCIE_P4_USB3_P3_TXN

PCIE_P4_USB3_P3_RXP

PCIE_P4_USB3_P3_RXN

PCIE_P3_USB3_P4_TXP

PCIE_P3_USB3_P4_TXN

P12

PCIE_P3_USB3_P4_RXP

P10

PCIE_P3_USB3_P4_RXN

PCIE2_USB3_SATA3_RCOMP_P

PCIE2_USB3_SATA3_RCOMP_N

PL_BGA1296

UC1J

USB3_P0_TXP

USB3_P0_TXN

USB3_P0_RXP

K10

USB3_P0_RXN

USB3_P1_TXP

USB3_P1_TXN

USB3_P1_RXP

USB3_P1_RXN

SATA_P0_TXP

SATA_P0_TXN

SATA_P0_RXP

SATA_P0_RXN

SATA_P1_USB3_P5_TXP

SATA_P1_USB3_P5_TXN

SATA_P1_USB3_P5_RXP

SATA_P1_USB3_P5_RXN

PL_BGA1296

APL_SOC

1.24V 1.24V

9 OF 23

APL_SOC

1.24V 1.05V

1.24V

10 OF 23

1.8V

1.05V

1.24V

PCIE_P0_TXP PCIE_P0_TXN PCIE_P0_RXP PCIE_P0_RXN

PCIE_P1_TXP PCIE_P1_TXN PCIE_P1_RXP PCIE_P1_RXN

PCIE_P2_TXP PCIE_P2_TXN PCIE_P2_RXP PCIE_P2_RXN

PCIE_WAKE0# PCIE_WAKE1#

1.8V

PCIE_WAKE2# PCIE_WAKE3#

PCIE_CLKOUT0P PCIE_CLKOUT0N PCIE_CLKOUT1P PCIE_CLKOUT1N PCIE_CLKOUT2P PCIE_CLKOUT2N PCIE_CLKOUT3P PCIE_CLKOUT3N

PCIE_CLKREQ0# PCIE_CLKREQ1# PCIE_CLKREQ2# PCIE_CLKREQ3#

USB_SSIC_0_TX_P USB_SSIC_0_TX_N USB_SSIC_0_RX_P

USB_SSIC_0_RX_N

C11 B11 C10 A10 A7 B8 B7 B5

AK62 AH62 AH61 AJ62

AH13 AH12 AG16 AG15

V3 V2 P7 P6

R1 R2 T10 T12

T2 T3 M5 M6

R62 P62 P61 N62

PCIE_PTX_DRX_P2 PCIE_PTX_DRX_N2 PCIE_PRX_DTX_P2 PCIE_PRX_DTX_N2

CLKREQ_PCIE#0 CLKREQ_PCIE#1 LAN_CLKREQ# WLAN_CLKREQ#

CC26.1U_0402_16V7K

CC25.1U_0402_16V7K

CLK_PCIE_LAN <22> CLK_PCIE_LAN# <22> CLK_PCIE_WLAN <23> CLK_PCIE_WLAN# <23>

LAN_CLKREQ# <22> WLAN_CLKREQ# <23>

CLKREQ_PCIE#1 WLAN_CLKREQ# LAN_CLKREQ# CLKREQ_PCIE#0

PCIE_PTX_C_DRX_P2 <22> PCIE_PTX_C_DRX_N2 <22> PCIE_PRX_DTX_P2 <22> PCIE_PRX_DTX_N2 <22>

GLAN NGFF WL+BT(KEY E)

RPC26

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

GLAN

+1.8VALW

A A

Security Classification

2014/05/19 2015/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/05/19 2015/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.Compal Electronics, Inc.

Title

APL(4/11)HDA,EMMC,CSI2

Size Document Number Rev

Custom

B5W1A_LA-D641PR1A

B5W1A_LA-D641PR1AB5W1A_LA-D641PR1A

Date: Sheet of

Monday, July 25, 2016

Date: Sheet of

Monday, July 25, 2016

Date: Sheet of

Monday, July 25, 2016

1.A

+3V_SOC

+1.8VALW

SOC_PWROK

D D

C C

EC_KBRST#

+3V_SOC

DVT2 modify

RC342 1K_0402_5%

1 2

RC344 10K_0402_5%

1 2 1 2

RC343 1K_0402_5%@

1 2 1 2

1 2

@EMC@

1 2

@EMC@

1 2

EMC@

@EMC@

1 2

RC335100K_0402_5%

RC52010K_0402_5%

PMC_SUSPWRDNACK

RC52110K_0402_5%

RC25320K_0402_5%

RC518100K_0402_5%

CC145.1U_0402_16V7K

RC53710K_0402_5%

CC138100P_0402_50V8J

CC140.1U_0402_16V7K

CC139.1U_0402_16V7K

RC483100K_0402_5%

CC143.1U_0402_16V7K

PreMP modify

RC2490_0402_5%

RC2520_0402_5%

PM_BATLOW#

PBTN_OUT#

checklist Page.31

SOC_PWROK

ESD request 10/22

AC_PRESENT

SOC_PLTRST#

PBTN_OUT#

PM_RST_BTN#

EC_RSMRST#

WAKE# PM_RST_BTN# H_THERMTRIP#

SOC_PWROK_R

PM_RST_BTN#

ESD request 10/22

PDG0p7 P.34 PLTRST# V1P8/V3P3(The I/O voltage selection is done by using Hardware Strap GPIO_88)

+3V_SOC

RC1162

4.7K_0402_5%

PLT_RST_BUF#

B B

1 2

RC492

47K_0402_5%

1 2

CC8 .1U_0402_16V7K

1 2

@EMC@

PLT_RST_BUF#

NL17SZ07DFT2G_SC70-5

RC5140_0402_5%

SA00004BV00

+VCC_SPI+1.8VALW

UC56

DVT2 modify

RC990_0402_5% @

+3VS

CC14.1U_0402_16V7K

SOC_PLTRST#

+VCC_SPI

1 2

RC999 3.3K_0402_5%@ RC1000 3.3K_0402_5%

1 2

RC1001 3.3K_0402_5%

1 2

8M SPI ROM(Support ISH)

RPC5

1 8

SOC_SPI_SO SOC_SPI_SI SOC_SPI_IO2 SOC_SPI_IO3

SOC_SPI_CS#0

A A

SOC_SPI_CLK SOC_SPI_CLK_0_R1

SOC_SPI_SO_0_R1

2 7

SOC_SPI_SI_0_R1

3 6

SOC_SPI_IO2_0_R1

4 5

SOC_SPI_IO3_0_R1

0_0804_8P4R_5%

1 2

RC4910_0402_5%

1 2

RC5233_0402_5%

DVT2 modify

SOC_SPI_CS#0_R1 SOC_SPI_IO2_0_R1

SOC_SPI_CS#0_R1

SOC_PLTRST#

UC2

CS#

DO(IO1)

WP#(IO2)

GND

W25Q64DWSSIG_SO8

SA00006ZV10

1.8V SPI ROM

RC339

1K_0402_5%

H_PROCHOT#

@EMC@

CC144

.1U_0402_16V7K

ESD request 10/22 close CPU side

PROCHOT# power rail:1.8V

SOC_SPI_CS#0_R1 SOC_SPI_IO2_0_R1 SOC_SPI_IO3_0_R1

Need to check Follow CRB 0.9 P.65

+VCC_SPI

VCC

DI(IO0)

CLK

SOC_SPI_IO3_0_R1SOC_SPI_SO_0_R1

SOC_SPI_CLK_0_R1

SOC_SPI_SI_0_R1

HOLD#(IO3)

+1.8VALW

1 2

EMI request 11/03

PMC_SUSPWRDNACK

H_THERMTRIP#

RC341 1K_0402_5%

@EMC@

PM_SLP_S0# PM_SLP_S3# PM_SLP_S4#

T5134 @

PBTN_OUT#

AC_PRESENT

EC_RSMRST#

T5130 @

1 2

CC9 10P_0402_50V8J

@EMC@

WAKE# SUSCLK PM_RST_BTN# PBTN_OUT# SOC_PLTRST# PM_BATLOW# AC_PRESENT SOC_PWROK_R H_PROCHOT# EC_RSMRST#

PMC_SUSPWRDNACK

H_THERMTRIP#

I2C_3_SDA I2C_3_SCL I2C_4_SDA I2C_4_SCL

SOC_SPI_CLK SOC_SPI_SI SOC_SPI_SO SOC_SPI_IO2 SOC_SPI_IO3 SOC_SPI_CS#0 SPI_CS1#

For Touch Screen

+1.8VALW

+3VALW

For Touch Pad

+1.8VALW

+3VALW

AD61 AC62 AK54

AG55

AE62

AD62

AK55 AG57 AH51

AK49 AG49

AC57 AC63

AG58

E47

H48 J47 J45 F48

F47 H45

M47

L47 P47

AR62 AR63 AN62 AM61 AP59 AP58 AM62

AL62 AP52 AP54 AP49 AP51

AL63 AK61 AP62 AP61

C56 A58 B58 B60 B61 B57 C57

UC1N

PMU_SLP_S0# PMU_SLP_S3# PMU_SLP_S4# PMU_WAKE# PMU_SUSCLK PMU_RSTBTN# PMU_PWRBTN# PMU_PLTRST# PMU_BATLOW# PMU_AC_PRESENT SOC_PWROK PROCHOT# RSM_RST# SUSPWRDNACK

PMIC_PWRGOOD PMIC_THERMTRIP# PMIC_STDBY PMIC_RESET#

PMIC_I2C_SDA PMIC_I2C_SCL

GPIO_213 GPIO_214

1.8V

GPIO_215 SUS_STAT#

PL_BGA1296

UC1M

LPSS_I2C0_SDA LPSS_I2C0_SCL LPSS_I2C1_SDA LPSS_I2C1_SCL LPSS_I2C2_SDA LPSS_I2C2_SCL LPSS_I2C3_SDA LPSS_I2C3_SCL LPSS_I2C4_SDA LPSS_I2C4_SCL LPSS_I2C5_SDA LPSS_I2C5_SCL LPSS_I2C6_SDA LPSS_I2C6_SCL LPSS_I2C7_SDA LPSS_I2C7_SCL

FST_SPI_CLK FST_SPI_MOSI_IO0 FST_SPI_MISO_IO1 FST_SPI_IO2 FST_SPI_IO3 FST_SPI_CS0# FST_SPI_CS1#

APL_BGA1296

3.3V

1.8V

12 12

1.8V

RC11431K_0402_5% @ RC11441K_0402_5% @

RC25662.2K_0402_5% TSI@ RC25652.2K_0402_5% TSI@

12 12

APL_SOC

RC11531K_0402_5% @ RC11521K_0402_5% @

RC25642.2K_0402_5% @ RC25632.2K_0402_5% @

1.8V

14 OF 23

APL_SOC

1.8V

13 OF 23

I2C_3_SDA I2C_3_SCL

I2C_3_SCL_L I2C_3_SDA_L

I2C_4_SDA

I2C_4_SCL

LPSS_UART0_TXD

LPSS_UART0_RXD LPSS_UART0_CTS# LPSS_UART0_RTS#

LPSS_UART1_TXD

LPSS_UART1_RXD LPSS_UART1_CTS# LPSS_UART1_RTS#

LPSS_UART2_TXD

LPSS_UART2_RXD LPSS_UART2_CTS# LPSS_UART2_RTS#

PMC_SPI_TXD

PMC_SPI_RXD

PMC_SPI_FS0

1.8V

PMC_SPI_FS1 PMC_SPI_FS2

PMC_SPI_CLK

SIO_SPI_0_TXD SIO_SPI_0_RXD SIO_SPI_0_FS0 SIO_SPI_0_FS1 SIO_SPI_0_CLK

SIO_SPI_1_TXD SIO_SPI_1_RXD SIO_SPI_1_FS0 SIO_SPI_1_FS1 SIO_SPI_1_CLK

SIO_SPI_2_TXD SIO_SPI_2_RXD SIO_SPI_2_FS0 SIO_SPI_2_FS1 SIO_SPI_2_FS2 SIO_SPI_2_CLK

I2C_4_SCL_L I2C_4_SDA_L

NCTF1

B45 C45 C44 A46

B43 C43 C42 A42

H41 J41 M41 L41

H50 J50

L48 P48 M48

E52

R30

J52 H54 F52 H52 F54

H58 H57 K55 F61 F58

E62 C62 D61 E56 D59 F62

I2C_3_SDA

I2C_3_SCL

UART_0_CRXD

UART_1_CRXD

SPI_0_TX_GPIO_110 SPI_0_FS0_GPIO_105

SPI_0_FS1_GPIO_106 SPI_0_CLK_GPIO_104

SPI_1_TX_GPIO_117 SPI_1_FS0_GPIO_112

SPI_1_FS1_GPIO_113 SPI_1_CLK_GPIO_111

SPI_2_TX_GPIO_123

SPI_2_FS1_GPIO_120 SPI_2_FS2_GPIO_121 SPI_2_CLK_GPIO_118

TSI@

PJT138KA 2N SOT363-6

SB000016K00

UART_0_CTXD_GPIO_39

T5135@

UART_0_CRTS#_GPIO_40 UART_1_CTXD_GPIO_43

T5136@

UART_1_CRTS#_GPIO_44 UART_TXD_NGFF

UART_RXD_NGFF UART_2_CRTS_DCTS

EDP_HPD#

+1.8VALW

SGD

QC2512A

TSI@

PJT138KA 2N SOT363-6

SB000016K00

QC2512B

I2C_3_SDA_L

I2C_3_SCL_L

From eDP

DMN63D8LDW-7_SOT363-6

SB000013K00

DVT2 modify

I2C_4_SDA_L I2C_4_SCL_L

PJT138KA 2N SOT363-6

SB000016K00

1 2

RC528 0_0402_5%@

1 2

RC529 0_0402_5%@

I2C_4_SCL I2C4_SCL_TP

I2C_4_SDA

SGD

QC2509A

QC2509B PJT138KA 2N SOT363-6

SB000016K00

+1.8VALW

I2C_4_SCL_L

I2C_4_SDA_L

I2C4_SDA_TP I2C4_SCL_TP

DMN63D8LDW-7_SOT363-6

+TS_PWR

3 4

TSI@

DMN63D8LDW-7_SOT363-6

SB000013K00

6 1

QC2511B

TSI@

+3V_PTP

3 4

DMN63D8LDW-7_SOT363-6

6 1

QC2508B

@SB000013K00

I2C3_SCL_PNL I2C3_SDA_PNL

I2C3_SDA_PNL

SGD

QC2511A

I2C3_SCL_PNL

I2C4_SCL_TP I2C4_SDA_TP

SGD

QC2508A

@SB000013K00

I2C4_SDA_TP

TSI@

1 2

RC1147 2.2K_0402_5%

TSI@

1 2

RC1150 2.2K_0402_5%

1 2

RC1156 2.2K_0402_5%

1 2

RC1157 2.2K_0402_5%

+TS_PWR

I2C3_SDA_PNL

I2C3_SCL_PNL

+3V_PTP

I2C4_SCL_TP

I2C4_SDA_TP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/05/19 2015/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.Compal Electronics, Inc.

Title

APL(5/11)CLK,GPIO

Size Document Number Rev

Custom

B5W1A_LA-D641PR1A

B5W1A_LA-D641PR1AB5W1A_LA-D641PR1A

Date: Sheet of

9 45Monday, July 25, 2016

1.A

Intel HDA issue, Fix on QS sample 09/01

D D

HDA_SDIN0_AUDIO<29>

For Intel 560733 Sighting Alert,2016 WW04 A

udio SDI Pin Issue. Customers can remove (un-stuffed) the workaround when this issue is fixed in QS sample.

1 2

RC4983 249_0402_1%

1 2

RC79 680_0402_1%

HDA for AUDIO

C C

HDA_BITCLK_AUDIO<29> HDA_SYNC_AUDIO<29> HDA_SDOUT_AUDIO<29> HDA_RST_AUDIO#<29> HDA_RST# <7> TP_INT#<24>

HDA_SDIN0<29>

1 8 2 7 3 6 4 5

DVT2 modify

HDA_SYNC

RPC9

33_0804_8P4R_5%

HDA_BIT_CLK HDA_SYNC HDA_SDOUT

HDA_SDIN0

+1.8VALW

DBG_PTI_DATA_0<12> DBG_PTI_DATA_1<12> DBG_PTI_DATA_2<12> DBG_PTI_DATA_3<12> DBG_PTI_DATA_4<12> DBG_PTI_DATA_5<12> DBG_PTI_DATA_6<12> DBG_PTI_DATA_7<12> DBG_PTI_CLK_3<12>

T5137 @

TS_INT_R#<24>

T5131 @ T5133 @

SATA_GP0 SATA_GP1

A38 B33 C39 B39 B35 A34 B31 H39 B29 A30

L39 C34 E39 C30 C38 F39 C36 C35

J39 C33 B27 C26 A26 B25 C25

UC1O

GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9 GPIO_10 GPIO_11 GPIO_12 GPIO_13 GPIO_14 GPIO_15 GPIO_16 GPIO_17 GPIO_18 GPIO_19 GPIO_20 GPIO_21 GPIO_22 GPIO_23 GPIO_24

PL_BGA1296

APL_SOC

1.8V

15 OF 23

GPIO_25 GPIO_26 GPIO_27 GPIO_28 GPIO_29

1.8V

GPIO_30 GPIO_31 GPIO_32 GPIO_33

ISH_GPIO_0 ISH_GPIO_1 ISH_GPIO_2 ISH_GPIO_3 ISH_GPIO_4 ISH_GPIO_5 ISH_GPIO_6 ISH_GPIO_7 ISH_GPIO_8 ISH_GPIO_9

C27 C31 C29 B37 H35 C37 H34 F35 F34

AM48 AK58 AK51 AM54 AM51 AM49 AM57 AM55 AM52 AK57

EC_SCI# SOC internal PU

GPIO30 GPIO31

HDA_BIT_CLK HDA_SYNC HDA_SDIN0 HDA_SDOUT

EC_SCI# <27>

EC_LID_OUT# <27>

MEMORY_STRAP_0 <11> MEMORY_STRAP_1 <11> MEMORY_STRAP_2 <11> MEMORY_STRAP_3 <11> SOC_SPKR <29>

+1.8VALW

RC78

1K_0402_1%

B B

SPI_2_CLK_GPIO_118<9>

Circuit follow A4WAL EC need modify code

A A

PreMP modify

RC1052 0_0402_5%

1 2

QC63

L2N7002LT1G_SOT23-3

ME_EN <27>

1 2

GPIO30

RC551 10K_0402_5%@

RC553 10K_0402_5%@

GPIO31

RC55210K_0402_5%

RC55010K_0402_5%

1 2

AP57

C63

E16 E63 F12 F14

F16 H12 H14 H16

J16

L16 M10 M12 M16

SW request 1104

Security Classification

2014/05/19 2015/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/05/19 2015/12/31

Compal Secret Data

Deciphered Date

APL_SOC

UC1Q

NCTF1 NCTF2 NCTF3 NCTF4 NCTF5 NCTF6 NCTF7 NCTF8 NCTF9 NCTF10 NCTF11 NCTF12 NCTF13 NCTF14 NCTF15

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

1.8V

GPIO_216 GPIO_217 GPIO_218 GPIO_219

1.8V

17 OF 23

PL_BGA1296

Compal Electronics, Inc.

Compal Electronics, Inc.Compal Electronics, Inc.

Title

APL(6/11)GPIO

B5W1A_LA-D641PR1A

B5W1A_LA-D641PR1AB5W1A_LA-D641PR1A

PWM0 PWM1 PWM2 PWM3

B41 C41 F41 E41

P30 M29 M30 L30

PWM0_GPIO_34 <11> PWM1_GPIO_35 <11> VCC1P24_1P35_SEL <11>

10 45Monday, July 25, 2016

1.A

+1.8VALW

PreMP modify

On Board Memory Strap Pin

D D

1 2

RC548 10K_0402_5%@

1 2

RC546 10K_0402_5%@

RC543 10K_0402_5%SAM@

RC544 10K_0402_5%MCN@

MEMORY_STRAP_0 <10> MEMORY_STRAP_1 <10> MEMORY_STRAP_2 <10> MEMORY_STRAP_3 <10>

On Board RAM Configuration

DDR3L Hynix 256MX16/1600 H5TC4G63CFR-PBA (SA00005AVD0)

DDR3L Hynix 256MX16/1600 H5TC4G63CFR-PBA (SA00005AVD0)DDR3L Hynix 256MX16/1600 H5TC4G63CFR-PBA (SA00005AVD0)

DDR3L Samsung 256MX16/1600 K4B4G1646E-BYK0 (SA000099X20)

DDR3L Samsung 256MX16/1600 K4B4G1646E-BYK0 (SA000099X20)DDR3L Samsung 256MX16/1600 K4B4G1646E-BYK0 (SA000099X20)

DDR3L Micron 256MX16/1600 MT41K256M16TW(SA00009KQ30)

DDR3L Micron 256MX16/1600 MT41K256M16TW(SA00009KQ30)DDR3L Micron 256MX16/1600 MT41K256M16TW(SA00009KQ30)

SODIMM only

SODIMM onlySODIMM only

RAM_ID3

0 0 0 1

RAM_ID1RAM_ID2

0 0

0 0 1 1

RAM_ID0

0 1 00 1

RC5471K_0402_5%

RC5491K_0402_5%

MD@

1 2

DVT2 modify

C C

SPI_0_FS1_GPIO_106<9,12> SPI_0_FS0_GPIO_105<9> SPI_0_CLK_GPIO_104<9> I2S3_SDO_GPIO_92<7> I2S2_SDO_GPIO_88<7>

DMIC_CLK_AB2_GPIO_82<7>

I2S1_SDO_GPIO_78<7> UART_2_CRTS_DCTS<9>

UART_TXD_NGFF<9,23> UART_1_CRTS#_GPIO_44<9> UART_1_CTXD_GPIO_43<9> UART_0_CRTS#_GPIO_40<9>

B B

UART_0_CTXD_GPIO_39<9> VCC1P24_1P35_SEL<10> PWM1_GPIO_35<10> PWM0_GPIO_34<10>

A A

1 2

+1.8VALW

RC28010K_0402_5%

1 2

RC42910K_0402_5%

RC4074.7K_0402_5%

RC43010K_0402_5%12RC43210K_0402_5%

RC4064.7K_0402_5%

RC4084.7K_0402_5%

RC43110K_0402_5%

RC43310K_0402_5%

1 2

RC4094.7K_0402_5%

RC4114.7K_0402_5%

RC43510K_0402_5%

RC43410K_0402_5%

1 2

For Intel 560735 Sighting Alert,WW35

oundary Scan Chain issue.

B Customers can remove (un-stuffed) the workaround when this issue is fixed in QS sample.

Stuff : JTAG mode(also need un-stuff PR106 and PR143) Un-Stuff: normal operation.

RC4124.7K_0402_5%

RC4154.7K_0402_5%

RC43810K_0402_5%

RC43910K_0402_5%12RC44110K_0402_5%

RC43610K_0402_5%

RC43710K_0402_5%

RC5421K_0402_5%

RC5451K_0402_5%

HYN@

1 2

RC4144.7K_0402_5%

RC44010K_0402_5%

RC4204.7K_0402_5%

RC44710K_0402_5%

RC44510K_0402_5%

RC44310K_0402_5%

RC44410K_0402_5%

RC44610K_0402_5%

RC44210K_0402_5%

RC5230_0402_5% @

1 2

RC4214.7K_0402_5%

RC4184.7K_0402_5%

RC4284.7K_0402_5%

RC4264.7K_0402_5%

SPI_2_TX_GPIO_123 <9,12> SPI_2_FS2_GPIO_121 <9> SPI_2_FS1_GPIO_120 <9>

SPI_1_TX_GPIO_117 <9> SPI_1_FS1_GPIO_113 <9> SPI_1_FS0_GPIO_112 <9> SPI_1_CLK_GPIO_111 <9>

SPI_0_TX_GPIO_110 <9>

RC44910K_0402_5%

RC45010K_0402_5%

* stand for default value

Pin Name External

PU/PD Function

Termination

GPIO34 GPIO35

GPIO36

GPIO39 Enable CSE ROM Bypass

1.24V*

1.35V

Disable*

nable GPIO40 Pulled LOW when RSM_RST_N de-asserts GPIO43 Allow eMMC as a boot source

GPIO44 Allow SPI as a boot source

GPIO47 Force DNX FW Load

Disable* 4.7KPU

Enable

Disable

Enable*

No Force*

Force

4.7KPU

GPIO48 Pulled LOW when RSM_RST_N de-asserts

GPIO78

3.3V*

1.8V GPIO82 Pulled LOW when RSM_RST_N de-asserts GPIO88

GPIO92 SMBus No Re-Boot

3.3V* PMU 1.8V/3.3V mode select

1.8V

Disable*

Enable GPIO104 Pulled LOW when RSM_RST_N de-asserts GPIO105 Pulled LOW when RSM_RST_N de-asserts GPIO106 Pulled HIGH when RSM_RST_N de-asserts GPIO110

GPIO111 Boot BIOS from SPI selectFrom SPI*

0: 1:

3.3V*

1.8V

Don't

.7KPU

GPIO112 Pulled LOW when RSM_RST_N de-asserts GPIO113 Pulled LOW when RSM_RST_N de-asserts GPIO117 Pulled LOW when RSM_RST_N de-asserts GPIO118

GPIO120

Don't* Flash Descriptor Override

Override

Enable* Top swap override

Disable GPIO121 Pulled LOW when RSM_RST_N de-asserts GPIO123 Pulled HIGH when RSM_RST_N de-asserts

4.7KPU

Strap pin Description

10KPD

Pulled LOW when RSM_RST_N de-asserts Pulled LOW when RSM_RST_N de-asserts

10KPD

VCC_1P24V_1P35V_A voltage selection

10KPD

10KPD 10KPD

10KPD

SMBus 1.8V/3.3V mode select

10KPD

10KPD 10KPD

10KPD

10KPD 10KPD

PC 1.8V/3.3V mode select

10KPD

10KPD 10KPD 10KPD 10KPD

10KPD

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/05/19 2015/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.Compal Electronics, Inc.

Title

APL(7/11)GPIO

Size Document Number Rev

Custom

B5W1A_LA-D641PR1A

B5W1A_LA-D641PR1AB5W1A_LA-D641PR1A

Date: Sheet

Date: Sheet of

11 45Monday, July 25, 2016

1.A

UC1P

A18

+RTCVCC

1 2

RC245 57.6K_0402_5%

1 2

CC136 1U_0402_6.3V6K

1 2

JCMOS2

1 2

D D

RC93 57.6K_0402_5%

1 2

CC11 1U_0402_6.3V6K

1 2

JCMOS1

SOC_SRTCRST#

0_0603_5%@

SOC_RTCTEST#

0_0603_5%@

PreMP modify

SOC_RTCTEST#

SOC_SRTCRST# XDP_TCK0

1 2

RC250 0_0402_5%

1 2

RC251 0_0402_5%

CLR_CMOS# <27>

AG52 AG54

BG1

B4 C1

C19 H43

J43

A14 A60 A61 B15

BJ2 C14 C15

C9 D8

E10

H10

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10

NCTF1 NCTF2 NCTF3 NCTF4 NCTF5 NCTF6 NCTF7 NCTF8 NCTF9 NCTF10 NCTF11 NCTF12 NCTF13 NCTF14

PL_BGA1296

APL_SOC

VCCRTC_3P3V

VCC_RTC_EXTPAD

3.3V

1.8V

JTAG_PMODE

16 OF 23

RTC_X1 RTC_X2

RTC_RST#

RTC_TEST#

JTAGX

JTAG_TDI JTAG_TDO JTAG_TMS

JTAG_TRST#

JTAG_TCK

JTAG_PREQ# JTAG_PRDY#

INTRUDER

AA44 AG51

1 2

CC135 .1U_0402_16V7K

AC59

SOC_RTCX1

AC58

SOC_RTCX2

AC55

SOC_SRTCRST#

AH49

SOC_RTCTEST#

B21 C22

XDP_TDI

A22

XDP_TDO

C23

XDP_TMS

C24

XDP_TRST#

B23

XDP_TCK0

C20

XDP_PREQ#

C21

XDP_PRDY#

B19

AC54

+RTCVCC

T5045

RC459 51_0402_5% RC112 51_0402_5%

RC458 100_0402_1%

T5044@

RC244330K_0402_5%

1 2 1 2

RC113 unstuff on QS sample

+1.8VALW

XDP_TRST#

+RTCVCC

Unstuff for MoW WW31 request. stuff RC113 for Intel request 10/30

RC463 51_0402_5%

1 2

+1.8VALW

1 2

A0S@

RC113 51_0402_5%

RC462 51_0402_5%

UC1R

NCTF1

SOC_RTCX2

SOC_RTCX1

C C

1 2

RC98 10M_0402_5%

32.768KHZ_12.5PF_Q13FC135000040

1 2

15P_0402_50V8J

CC17

15P_0402_50V8J

CC16

AB13 AB49

AC13 AM58 AM59

M39

B13 C13

C2 D2

J29 P25

P27 P39 R25 R37 R39

NCTF2 NCTF3 NCTF4 NCTF5 NCTF6 NCTF7 NCTF8 NCTF9 NCTF10 NCTF11 NCTF12 NCTF13 NCTF14 NCTF15 NCTF16 NCTF17 NCTF18

APL_BGA1296

APL_SOC

MEM_CH0_RCOMP MEM_CH1_RCOMP

MDSI_RCOMP

EMMC_RCOMP

MCSI_DPHY1.2_RCOMP

GPIO_RCOMP

MCSI_DPHY1.1_RCOMP

USB2_RCOMP

USB_SSIC_RCOMP

PMU_RCOMP

PCIE_REF_CLK_RCOMP

18 OF 23

AV34

MEM_CH0_RCOMP

AV30

MEM_CH1_RCOMP

AP7

MDSI_RCOMP

V59

EMMC_RCOMP

F27

MCSI_DPHY12_RCOMP

E34

GPIO_RCOMP

H27

MCSI_DPHY11_RCOMP

Y15

USB2_RCOMP

AB15

USB_SSIC_RCOMP

AG59

PMU_RCOMP

E21

PCIE_REF_CLK_RCOMP

PreMP modify

1 2 1 2

RC263 105_0402_1% RC264 105_0402_1%

1 2

RC273 150_0402_1% RC274 200_0402_1% RC266 150_0402_1% RC275 200_0402_1% RC268 150_0402_1% RC269 113_0402_1% RC498 137_0402_1% RC276 200_0402_1% RC272 60.4_0402_1%

1 2

1 2 1 2

1 2

Update DG v1.2 remove USB_SSIC_RCOMP

XDP

+1.8VALW +1.8VALW_CMC

B B

+1.8VALW

1 2

RC267 1K_0402_5%@CMC@

1 2

RC404 0_0603_5%

XDP_HLT_BOOT

@CMC@

1 2

CC142 .1U_0402_16V7K

Place close to JXDP1.47

PLT_RST_BUF#<9,22,23,27,28>

DBG_PTI_DATA_0<10> DBG_PTI_DATA_1<10> DBG_PTI_DATA_2<10> DBG_PTI_DATA_3<10> DBG_PTI_DATA_4<10> DBG_PTI_DATA_5<10> DBG_PTI_DATA_6<10> DBG_PTI_DATA_7<10>

1 2

DBG_PTI_CLK_3<10>

T5048

RC213 0_0402_5%

PreMP modify

@CMC@

PLT_RST_BUF# XDP_PMU_PLTRST#

RC3401K_0402_5%

CONN@

JCMC1

1 3 5 7

9 11 13 15

17 21

8 10 12 14 16

DATA_0 DATA_1 DATA_2 DATA_3 DATA_4 DATA_5 DATA_6 DATA_7

DATA_CLK_1P DATA_CLK_1N

DATA_8 DATA_9 DATA_10 DATA_11 DATA_12 DATA_13 DATA_14 DATA_15

DATA_CLK_2P

CMC Conn.

OBS DATA

CMC_DEBUG_36P

JTAG/RC/HOOKS

DATA_CLK_2N

VCCOBS_AB

XDP_TRST*

XDP_TDI

XDP_TMS XDP_TCK0 XDP_TCK1

XDP_TDO

XDP_PREQ* XDP_PRDY*

HOOK_0 HOOK_3

HOOK_6 XDP_PRSNT_CPU* XDP_PRSNT_PCH*

GND

<MT> GND

+1.8VALW_CMC

20 22

CC141 .1U_0402_16V7K

XDP_TRST#

XDP_TDI

XDP_TMS

XDP_TCK0

31 35

XDP_TDO

XDP_PREQ#

XDP_PRDY#

XDP_RSMRST#

25 26

XDP_PMU_PLTRST#

23 24

XDP_PRESENT#_PCH

19 36

CMC@

1 2

T5047

RC461 100_0402_1%CMC@

RC460 100_0402_1%CMC@

RC402 1K_0402_5%@CMC@

RC211 0_0402_5%

1 2

+1.8VALW_CMC

PreMP modify

EC_RSMRST# <9,27> SPI_0_FS1_GPIO_106 <9,11>

SPI_2_TX_GPIO_123 <9,11>

INTEL_CMC_PRIMARY

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/05/19 2015/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.Compal Electronics, Inc.

Title

APL(8/11)PCIE,USB,SATA

Size Document Number Rev

Custom

B5W1A_LA-D641PR1A

B5W1A_LA-D641PR1AB5W1A_LA-D641PR1A

Date: Sheet

Date: Sheet of

12 45Monday, July 25, 2016

1.A

+VCCIOA+VNN

1 2

RC476 0_0603_5%

PreMP modify

RC480 0_0603_5%@

D D

+1.24VALW +1.24VALW_DSI_CSI

1 2

RC477 0_0402_5%@

+1.8VALW _SOC+1.8VALW

+1.24VALW

RC495 0_0603_5%

+1.35V_VDDQ

RC496 0_0603_5%

1 2

+1.24V_1.35VALW _SOC +1.24V_1.35VALW_GLML

A-Step only support +1.24V.

+1.05VS

1 2

RC481 0_0603_5%

+1.05VS_SOC +1.05VS_SOC_SRAM

+1.24VALW_DSI_CSI is only for MIPI-CSI or MIPI-DSI function.

+1.24VALW_DSI_CSI

C C

CC158

1U_0402_6.3V6K

BSC Side PSC Side

+VCCIOA

CC211

1U_0402_6.3V6K

B B

PSC Side

+1.24V_1.35VALW _MPHY +1.24V_1.35VALW _USB2

CC172

1U_0402_6.3V6K

CC160

22U_0603_6.3V6M

CC159

1U_0402_6.3V6K

+1.05VS_SOC_DDI

CC153

CC212

22U_0603_6.3V6M

CC213

CC210

1U_0402_6.3V6K

CC169

1U_0402_6.3V6K

22U_0603_6.3V6M

CC170

1U_0402_6.3V6K

CC171

22U_0603_6.3V6M

1U_0402_6.3V6K

CC154

1U_0402_6.3V6K

PSC SideBSC Side

CC156

1U_0402_6.3V6K

CC155

1U_0402_6.3V6K

CC176

1U_0402_6.3V6K

RC464 0_0402_5%@

RC478 0_0603_5%@

RC466 0_0402_5%@

RC467 0_0402_5%@

RC482 0_0603_5%@

RC472 0_0402_5%@

RC473 0_0402_5%@

RC474 0_0402_5%@

RC475 0_0402_5%@

CC157

22U_0603_6.3V6M

1 2

+1.24V_1.35VALW _PLL

+1.24V_1.35VALW _USB2

1 2

+1.24V_1.35VALW _MPHY

1 2

+1.05VS_SOC_DDI

1 2

+1.05VS_SOC_FHV0

1 2

+1.05VS_SOC_FUSE

1 2

+1.05VS_SOC_FHV1

1 2

+1.05VS_SOC_FHV1

+1.24V_1.35VALW _GLML

+1.05VS_SOC_FHV0

+1.24V_1.35VALW _MPHY

+1.24V_1.35VALW _USB2

+1.24V_1.35VALW _PLL

+VNN

+VCCIOA

+1.05VS_SOC_DDI

+1.05VS_SOC_FUSE

+1.24VALW_DSI_CSI

UC1V

AJ37

VNN1

AJ39

VNN2

AJ41

VNN3

AJ42

VNN4

AJ46

VNN5

AK37

VNN6

AK39

VNN7

AK41

VNN8

AK42

VNN9

AK44

VNN10

AK46

VNN11

AM44

VNN16

AM23

VNN12

AM25

VNN13

AM41

VNN14

AM42

VNN15

AA22

VCC_1P05V1

AA23

VCC_1P05V2

AC23

VCC_1P05V3

V18

VCC_1P05V7

Y18

VCC_1P05V8

Y20

VCC_1P05V9

P16

VCC_1P05V4

T13

VCC_1P05V5

T15

VCC_1P05V6

AA18

VCC_1P24V_A1

AA20

VCC_1P24V_A2

AE18

VCC_1P24V_1P35V_A1

AE20

VCC_1P24V_1P35V_A2

AE22

VCC_1P24V_1P35V_A3

AG22

VCC_1P24V_1P35V_A5

AG20

VCC_1P24V_1P35V_A4

AJ20

VCC_1P24V_1P35V_A6

AJ22

VCC_1P24V_1P35V_A7

AK22

VCC_1P24V_1P35V_A9

AK20

VCC_1P24V_1P35V_A8

AM20

VCC_1P24V_1P35V_A10

AM28

VCC_1P24V_1P35V_A11

AM37

VCC_1P24V_1P35V_A12

NCTF1

NCTF2

L14

NCTF3

R19

NCTF4

T51

NCTF5

PL_BGA1296

APL_SOC

22 OF 23

VCC_VCGI1 VCC_VCGI2 VCC_VCGI3 VCC_VCGI4 VCC_VCGI5 VCC_VCGI6 VCC_VCGI7 VCC_VCGI8

VCC_VCGI9 VCC_VCGI10 VCC_VCGI11 VCC_VCGI12 VCC_VCGI13 VCC_VCGI14 VCC_VCGI15 VCC_VCGI16 VCC_VCGI17 VCC_VCGI18 VCC_VCGI19 VCC_VCGI20 VCC_VCGI21 VCC_VCGI22 VCC_VCGI23 VCC_VCGI24 VCC_VCGI25 VCC_VCGI26 VCC_VCGI27 VCC_VCGI28 VCC_VCGI29 VCC_VCGI30 VCC_VCGI31

VCC_3P3V_A1 VCC_3P3V_A2 VCC_3P3V_A3 VCC_3P3V_A4 VCC_3P3V_A5 VCC_3P3V_A6 VCC_3P3V_A7

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6

AA28 AA30 AA32 AC28 AC30 AC32 AE28 AE30 AE32 AG28 AG30 AG32 AJ28 AJ30 AJ32 AK28 AK30 AK32 AM30 E29 E37 E50 U28 U30 U32 V28 V30 V32 Y28 Y30 Y32

AA42 AC41 AJ25 AK25 V44 V46 Y44

AC20 AC22 AJ44 BJ61 BJ62 V49

+VCC_VCGI

+3V_SOC +3V_SOC

Close Soc pin AK25,AJ25

CC178

1U_0402_6.3V6K

CC179

1U_0402_6.3V6K

BSC Side PSC Side

CC182

22U_0603_6.3V6M

CC181

1U_0402_6.3V6K

CC180

1U_0402_6.3V6K

+1.24V_1.35VALW _GLML +1.24V_1.35VALW _PLL

CC164

CC165

1U_0402_6.3V6K

CC162

1U_0402_6.3V6K

A A

BSC Side PSC Side BSC Side PSC Side

22U_0603_6.3V6M

Close Soc pin AM28

1U_0402_6.3V6K

CC163

1U_0402_6.3V6K

BSC SideBSC Side PSC Side

CC168

CC166

CC161

1U_0402_6.3V6K

22U_0603_6.3V6M

CC167

1U_0402_6.3V6K

Security Classification

2014/05/19 2015/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/05/19 2015/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.Compal Electronics, Inc.

APL(9/11)Power

B5W1A_LA-D641PR1A

B5W1A_LA-D641PR1AB5W1A_LA-D641PR1A

13 45Monday, July 25, 2016

1.A

+1.05VS_SOC_SRAM

CC187

CC185

1U_0402_6.3V6K

CC183

1U_0402_6.3V6K

D D

CC184

1U_0402_6.3V6K

22U_0603_6.3V6M

CC186

1U_0402_6.3V6K

CC188

22U_0603_6.3V6M

+1.05VS_SOC_SRAM

PreMP modify

+1.35V_VDDQ

PSC SideBSC Side

+1.35V_VDDQ_SOC

CC195

CC192

22U_0603_6.3V6M

CC189

22U_0603_6.3V6M

CC190

22U_0603_6.3V6M

C C

PSC Side

+1.8VALW_SOC

1U_0402_6.3V6K

BSC Side PSC Side

22U_0603_6.3V6M

CC198

1U_0402_6.3V6K

CC199

22U_0603_6.3V6M

CC191

CC200

1U_0402_6.3V6K

22U_0603_6.3V6M

CC196

CC193

22U_0603_6.3V6M

CC203

22U_0603_6.3V6M

CC194

CC202

1 2

RC145 0_1206_5%@

1 2

RC146 0_1206_5%@

1 2

RC147 0_1206_5%@

+1.35V_VDDQ_SOC

AA25

AC25

AE25

U20 U22 U23 U25

V22 V23 V25 Y23 Y25

AN18 AN20 AN22 AN23 AN41 AN42 AN44 AN46 AR17 AR47

AT13 AT17 AT47 AT51 AV14 AV50

E23 F23

R17

AM32 AN32 BG63

BJ3 V48

UC1W

VCC_1P05V1 VCC_1P05V2 VCC_1P05V3 VCC_1P05V4 VCC_1P05V5 VCC_1P05V6 VCC_1P05V7 VCC_1P05V8 VCC_1P05V9 VCC_1P05V10 VCC_1P05V11 VCC_1P05V12

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16

NCTF1 NCTF2 NCTF3 NCTF4

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6

PL_BGA1296

APL_SOC

VCC_1P8V_A1 VCC_1P8V_A2 VCC_1P8V_A3 VCC_1P8V_A4 VCC_1P8V_A5 VCC_1P8V_A6 VCC_1P8V_A7 VCC_1P8V_A8

VCC_VCGI_SENSE_P VCC_VCGI_SENSE_N

23 OF 23

VCC_VCGI1 VCC_VCGI2 VCC_VCGI3 VCC_VCGI4 VCC_VCGI5 VCC_VCGI6 VCC_VCGI7 VCC_VCGI8

VNN_SENSE

AA46 AC42 AC44 AC46 AE42 AE44 AE46 AG25

AA36 AA37 AA39 AC36 AC37 AE36 AE37 AG36 AK34 E35 E43 E45 E48 F29 R45 R47 U36 U37 U39 U41 U42 U44 U46 U47 U48 V36 V37 V39 V41 Y36 Y37 Y39 Y41

R41 R43

AG48

+1.8VALW_SOC

+VCC_VCGI

VCC_VCGI_SENSE_P <39> VCC_VCGI_SENSE_N <39>

VNN_SENSE <40>

B B

W=20mils

+RTCBATT

A A

1 2

RC192 1K_0402_5%

RTC Battery

MAX. 8000mil

D22

BAS40-04_SOT23-3

=20mils

W=20mils

CC79.CC84 Close UC1.AK19.

+CHGRTC

+RTCVCC

CC84

1U_0402_6.3V6K

.1U_0402_16V7K

CC79

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

2014/05/19 2015/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.Compal Electronics, Inc.

APL(10/11)Power

B5W1A_LA-D641PR1A

B5W1A_LA-D641PR1AB5W1A_LA-D641PR1A

14 45Monday, July 25, 2016

1.A

+ 31 hidden pages

Compal LA-D641P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual