Compal LA-D101P Schematics Rev1.0

Model Name :

ZIWB0/ZIWB1/ZIWE0

File Name :

1 1

Compal Confidential

2 2

ZIWB0/ZIWB1/ZIWE0 DIS M/B Schematics Document

Intel Bay Trail M

3 3

2014-02-10

REV:1.0

14PCB@

PCB

DA1

PCB

DA1

Part Number

DA60013Y010

4 4

15PCB@

DA2

PCB

Part Number

DA60013Y110

Description

REV1.0 M/B

Description

REV1.0 M/B

Security Classificati on

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/04/12 2014/04/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Documen t Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Cover Page

LA-B101P

0.2

147Tuesday, February 18, 2014

For DIS

PCIe X1

1 1

NV N15V-GM 15W

VRAM DDR 3L 1GB/2 GB

Gen2

Memory Bus

!!"#$%&###'()%*&+#,-.

Memory Bus

!"#$%&&'()"*+"&,--%./

0"#$%&&'()"*+"&,--%./

!!"#$%&###'()%*&+#,-.

eDP X1

eDP Panel

CRT Conn.

HDMI Conn.

2 2

RJ45 Conn.

LAN

RTL8106E/RTL8111G 10/100/GIGA

PCIe Port 0

(2 Lanes)

CRT

DDI X1 (4 Lanes)

PCIe X1 (1 Lanes)

Intel Valleyview

SOC

25mm X 27mm

PCIe X1

NGFF

WLAN / BT

PCIe Port 1

3 3

Card Reader

Realtek RTS 5229-GR

PCIe Port 2

(1 Lanes)

USB2.0 X1 (1 Lanes)

PCIe X1 (1 Lanes)

USB3.0 x1

USB2.0 x1

SATA X1

HDA

Left USB3.0 x1

USB30 Port 0

Left USB2.0 x1

USB20 Port 1

Right USB2.0 x1

USB20 Port 2

USB Hub * 1

USB20 Port 3

HDD Conn.

SATA Port 4

ODD Conn.

SATA Port 5

Audio Codec

Realtek ALC233

Right USB2.0 x1

USB HUB Port 1

For E14

Int. Camera

USB HUB Port 3

Touch Screen

USB HUB Port 1

For B14/B15

Bluetooth

USB HUB Port 4

Finger Printer

USB HUB Port 2

Sub-borad 15"

SPI ROM

8MB

Nuvoton 288N

Int. MIC Conn. Int. Speaker Conn.

Audio Combo Jacks

HP & MIC

14"

DC IN/B

BATT/B

Thermal Sensor Touch Pad Int. KBD

Power/B

4 4

IO/B

ODD/B

Security Classification

Issued D ate

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/04/12 2014/04/12

Compal Secr et Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Custom

Intel BayTrail-M Platform

Date: Sheet

Block Diagrams

247Tuesday, February 18, 2014

0.1

Voltage Rails

S0 S3 S4/S5Power Plane Description

VIN

BATT+ 12V Battery power supply

B+

1 1

+RTCVCC RTC Battery Power

+1.0VALW

+1.8VALW +1.8v Always power rail

+3VALW +3.3v Always power rail

+5VALW

+SOC_VCC Core voltage for SOC

+SOC_VNN GFX voltage for SOC

+0.675VS +0.675V power rail for DDR3L Terminator

+1.0VS

+1.05VS

+1.35VS

2 2

+1.5VS

+1.8VS

+3VS

+5VS

19V Adapter power supply

AC or battery power rail for power circuit. (19V/12V)

+1.0v Always power rail

+5.0v Always power rail

+1.35V power rail for DDR3L+1.35V

+1.0v system power rail

+1.05v system power rail

+1.35v system power rail

+1.5v system power rail

+1.8v system power rail

+3.3v system power rail

+5.0v system power rail

ON ON

ON ONON

ON ON

ON OFF OFF

OFF

OFF OFF

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

100K +/- 5%Ra/Rc/Re

Board ID

0 1 2 3 4 5 6 7

Rb / Rd / Rf V min

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

BOARD ID Table

Board ID

0 1 2 3 4 5 6

PCB Revision

Vtyp

AD_BID

0 V 0 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

BOM Option Table

Item BOM Structure

12343 5 74229#>48 .&?%@&9A;B%?48>C 6-7%89:;<89=92>

6*&%89:;<89=92> 6*&%89:;<89=92>%;2343

max

-65 .&?5 6-75 56-756-7%89:;<89=92>%;2343 6*&5 56*&5 I*5I4;#$%*#8992 0/E50F6%G98<9G%GH;

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

0F6%G98<9G%GH; 0F6%G98<9G%GH;

0/D5 6/E5

EC SM Bus1 address

Device

3 3

Smart Battery

Charger

Address Address

0001 011X b

0b00010010 (0x12H)

EC SM Bus2 address

Device

GPU

Thermal

0x9E

1001_101xb

43 level BOM table

BOM Structure43 Level Description

SOC SM Bus address

Device Address

SO-DIMM A (JDIMM1)

SO-DIMM B (JDIMM2)

4 4

A0h

A2h

Security Classificati on

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

USOC1

N2920@

S IC FH8065301616 203 SR1SF B3 1.86G C38!

Part Number = SA00007E860

Compal Secret Data

2013/04/12 2014/04/12

Compal Secret Data

Deciphered Date

USOC1

N3520@

S IC FH8065301616 103 SR1SE B3 2.17G C38!

Part Number = SA00007E990

USOC1

N2815@

S IC FH8065301619 509 SR1SJ B3 1.86G C38!

Part Number = SA00007EO50

Compal Electronics, Inc.

Title

Size Documen t Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Notes List

Intel BayTrail-M Platform

0.2

347Tuesday, February 18, 2014

EVT Power Sequence 2013-06-25_ AC

Power On

S3 S3 Resume

Power Off

Plug in

D D

+3VLP

EC_ON

+5VALW

+3VALW

+1.0VALW

+1.8VALW

497.8us

394.5us

5.540ms

6.160ms

ON/OFF

205.0ms

100.1ms

104.9ms

" !

22.92ms

22.96ms

207.8ms

596.2us

5.555ms

2.078ms

215.2ms

2.48ms

EC_RSMRST#

PBTN_OUT#

PMC_SLP_S4#

C C

PMC_SLP_S3#

SYSON

+1.35V

DDR_PWROK

+3VLP

EC_ON

+5VALW

+3VALW

+1.0VALW

+1.8VALW

ON/OFF

EC_RSMRST#

PBTN_OUT#

PMC_SLP_S4#

PMC_SLP_S3#

SYSON

+1.35V

DDR_PWROK

VR_ON

+CORE_VNN

VGATE

B B

SUSP#

+1.0VS

+1.05VS

+1.35VS

+1.5VS

+1.8VS

+3VS

+5VS

+0.675VS +0.675VS

KBRST#

PMC_CORE_PWROK

A A

DDR_CORE_PWROK DDR_CORE_PWROK

PMC_PLTRST#

228.4ms 15.9ms29.52ms 30.94ms

2.428ms

2.642ms 2.642ms

249.3ms 6.702ms 36.81ms 5.241ms

22.58us

1.406ms

1.893ms

2.156ms

3.042ms

3.538ms

! ! !

4.272ms

43.26ms

62.96ms

6.040ms

9.330ms 2.440ms2.441ms

-250ns -6.098ns

1.213ms

1.329ms

8.813ms

18.73ms

12.40ms

13.65ms

148.5ms

12.40ms

156.8ms

18.32ms

25.48ms

23.14us

2.446ms6.340ms

1.383ms

1.918ms

2.160ms

3.056ms

3.546ms

4.284ms

8.076ms8.081ms

43.24ms

62.98ms

5.690ms

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET I NFORMATION. THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET I NFORMATION. THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET I NFORMATION. THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRON ICS, INC.

7.760ms

12.02ms

1.286ms

1.361ms

8.902ms

7.479ms

Compal Secre t Data

2013/04/12 2014/04/12

Compal Secre t Data

148.3ms

18.71ms

12.46ms

13.79ms

18.33ms

Deciphered Date

156.8ms

25.56ms

VR_ON

+CORE_VNN

+CORE_VCC+CORE_VCC

VGATE

SUSP#

+1.0VS

+1.05VS

+1.35VS

+1.5VS

+1.8VS

+3VS

+5VS

KBRST#

PMC_CORE_PWROK

PMC_PLTRST#

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Power Sequence

Intel BayTrail-M Platform

0.2

447Tuesday, February 1 8, 2014

D D

USOC1A

DDR_A_MA[0..15][13]

DDR_A_DM[0..7][13] DDR_B_DM[0..7][14]

DDR_A_RAS#[13] DDR_A_CAS#[13]

C C

B B

DDR_A_WE#[13]

DDR_A_BS0[13] DDR_A_BS1[13] DDR_A_BS2[13]

DDR_A_CS0#[13]

DDR_A_CS2#[13]

DDR_A_CKE0[13]

DDR_A_CKE2[13]

DDR_A_ODT0[13]

DDR_A_ODT2[13]

DDR_A_CLK0[13] DDR_A_CLK0#[13]

DDR_A_CLK2[13] DDR_A_CLK2#[13]

DDR_A_RST#[13]

+DDR_SOC_VREF

1 2 1 2

DDR_PWROK[41] DDR_CORE_PWROK[8]

1 2 1 2 1 2

R960100K_0402_1% R960100K_0402_1% R961100K_0402_1% R961100K_0402_1%

R96223.2_0402_1% R96223.2_0402_1% R96329.4_0402_1% R96329.4_0402_1% R964162_0402_1% R964162_0402_1%

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_TERMN0 DDR_TERMN1

DDR_RCOMP0 DDR_RCOMP1 DDR_RCOMP2

Follow CRB v1.15

USOC1A

K45

DRAM0_MA_0

H47

DRAM0_MA_1

L41

DRAM0_MA_2

H44

DRAM0_MA_3

H50

DRAM0_MA_4

G53

DRAM0_MA_5

H49

DRAM0_MA_6

D50

DRAM0_MA_7

G52

DRAM0_MA_8

E52

DRAM0_MA_9

K48

DRAM0_MA_10

E51

DRAM0_MA_11

F47

DRAM0_MA_12

J51

DRAM0_MA_13

B49

DRAM0_MA_14

B50

DRAM0_MA_15

G36

DRAM0_DM_0

B36

DRAM0_DM_1

F38

DRAM0_DM_2

B42

DRAM0_DM_3

P51

DRAM0_DM_4

V42

DRAM0_DM_5

Y50

DRAM0_DM_6

Y52

DRAM0_DM_7

M45

DRAM0_RAS#

M44

DRAM0_CAS#

H51

DRAM0_WE#

K47

DRAM0_BS_0

K44

DRAM0_BS_1

D52

DRAM0_BS_2

P44

DRAM0_CS_0#

P45

DRAM0_CS_2#

C47

DRAM0_CKE_0

D48

RESERVED_D48

F44

DRAM0_CKE_2

E46

RESERVED_E46

T41

DRAM0_ODT_0

P42

DRAM0_ODT_2

M50

DRAM0_CKP_0

M48

DRAM0_CKN_0

P50

DRAM0_CKP_2

P48

DRAM0_CKN_2

P41

DRAM0_DRAMRST#

AF44

DRAM_VREF

AF42

ICLK_ DRAM _TER MN_A F42

AH42

ICLK_ DRAM _TER MN_A H42

AD42

DRAM_VDD_S4_PWROK

AB42

DRAM_CORE_PWROK

AD44

DRAM_RCOMP_0

AF45

DRAM_RCOMP_1

AD45

DRAM_RCOMP_2

AF40

RESERVED_AF40

AF41

RESERVED_AF41

AD40

RESERVED_AD40

AD41

RESERVED_AD41

FH8065301546401_FCBGA131170

JKLMDN

1 OF 13

DRAM0_DQ_0 DRAM0_DQ_1 DRAM0_DQ_2 DRAM0_DQ_3 DRAM0_DQ_4 DRAM0_DQ_5 DRAM0_DQ_6 DRAM0_DQ_7 DRAM0_DQ_8

DRAM0_DQ_9 DRAM0_DQ_10 DRAM0_DQ_11 DRAM0_DQ_12 DRAM0_DQ_13 DRAM0_DQ_14 DRAM0_DQ_15 DRAM0_DQ_16 DRAM0_DQ_17 DRAM0_DQ_18 DRAM0_DQ_19 DRAM0_DQ_20 DRAM0_DQ_21 DRAM0_DQ_22 DRAM0_DQ_23 DRAM0_DQ_24 DRAM0_DQ_25 DRAM0_DQ_26 DRAM0_DQ_27 DRAM0_DQ_28 DRAM0_DQ_29 DRAM0_DQ_30 DRAM0_DQ_31 DRAM0_DQ_32 DRAM0_DQ_33 DRAM0_DQ_34 DRAM0_DQ_35 DRAM0_DQ_36 DRAM0_DQ_37 DRAM0_DQ_38 DRAM0_DQ_39 DRAM0_DQ_40 DRAM0_DQ_41 DRAM0_DQ_42 DRAM0_DQ_43 DRAM0_DQ_44 DRAM0_DQ_45 DRAM0_DQ_46 DRAM0_DQ_47 DRAM0_DQ_48 DRAM0_DQ_49 DRAM0_DQ_50 DRAM0_DQ_51 DRAM0_DQ_52 DRAM0_DQ_53 DRAM0_DQ_54 DRAM0_DQ_55 DRAM0_DQ_56 DRAM0_DQ_57 DRAM0_DQ_58 DRAM0_DQ_59 DRAM0_DQ_60 DRAM0_DQ_61 DRAM0_DQ_62 DRAM0_DQ_63

DRAM0_DQSP_0 DRAM0_DQSN_0 DRAM0_DQSP_1 DRAM0_DQSN_1 DRAM0_DQSP_2 DRAM0_DQSN_2 DRAM0_DQSP_3 DRAM0_DQSN_3 DRAM0_DQSP_4 DRAM0_DQSN_4 DRAM0_DQSP_5 DRAM0_DQSN_5 DRAM0_DQSP_6 DRAM0_DQSN_6 DRAM0_DQSP_7 DRAM0_DQSN_7

M36 J36 P40 M40 P36 N36 K40 K42 B32 C32 C36 A37 C33 A33 C37 B38 F36 G38 F42 J42 G40 C38 G44 D42 A41 C41 A45 B46 C40 B40 B48 B47 K52 K51 T52 T51 L51 L53 R51 R53 T47 T45 Y40 V41 T48 T50 Y42 AB40 V45 V47 AD48 AD50 V48 V50 AB44 Y45 V52 W51 AC53 AC51 W53 Y51 AD52 AD51

J38 K38 C35 B34 D40 F40 B44 C43 N53 M52 T42 T44 Y47 Y48 AB52 AA51

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7

DDR_A_DQS[0..7] [13]

USOC1B

DDR_B_MA[0..15][14]DDR_A_D[0..63] [13] DDR_B_D[0..63] [14]

DDR_B_RAS#[14] DDR_B_CAS#[14]

DDR_B_WE#[14]

DDR_B_BS0[14] DDR_B_BS1[14] DDR_B_BS2[14]

DDR_B_CS0#[14]

DDR_B_CS2#[14]

DDR_B_CKE0[14]

DDR_B_CKE2[14]

DDR_B_ODT0[14]

DDR_B_ODT2[14]

DDR_B_CLK0[14]

DDR_B_CLK0#[14]

DDR_B_CLK2[14]

DDR_B_CLK2#[14]

DDR_B_RST#[14]

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

USOC1B

AY45

DRAM1_MA_0

BB47

DRAM1_MA_1

AW41

DRAM1_MA_2

BB44

DRAM1_MA_3

BB50

DRAM1_MA_4

BC53

DRAM1_MA_5

BB49

DRAM1_MA_6

BF50

DRAM1_MA_7

BC52

DRAM1_MA_8

BE52

DRAM1_MA_9

AY48

DRAM1_MA_10

BE51

DRAM1_MA_11

BD47

DRAM1_MA_12

BA51

DRAM1_MA_13

BH49

DRAM1_MA_14

BH50

DRAM1_MA_15

BD38

DRAM1_DM_0

BH36

DRAM1_DM_1

BC36

DRAM1_DM_2

BH42

DRAM1_DM_3

AT51

DRAM1_DM_4

AM42

DRAM1_DM_5

AK50

DRAM1_DM_6

AK52

DRAM1_DM_7

AV45

DRAM1_RAS#

AV44

DRAM1_CAS#

BB51

DRAM1_WE#

AY47

DRAM1_BS_0

AY44

DRAM1_BS_1

BF52

DRAM1_BS_2

AT44

DRAM1_CS_0#

AT45

DRAM1_CS_2#

BG47

DRAM1_CKE_0

BE46

RESERVED_BE46

BD44

DRAM1_CKE_2

BF48

RESERVED_BF48

AP41

DRAM1_ODT_0

AT42

DRAM1_ODT_2

AV50

DRAM1_CKP_0

AV48

DRAM1_CKN_0

AT50

DRAM1_CKP_2

AT48

DRAM1_CKN_2

AT41

DRAM1_DRAMRST#

FH8065301546401_FCBGA131170

2 OF 13

DRAM1_DQ_0 DRAM1_DQ_1 DRAM1_DQ_2 DRAM1_DQ_3 DRAM1_DQ_4 DRAM1_DQ_5 DRAM1_DQ_6 DRAM1_DQ_7 DRAM1_DQ_8

DRAM1_DQ_9 DRAM1_DQ_10 DRAM1_DQ_11 DRAM1_DQ_12 DRAM1_DQ_13 DRAM1_DQ_14 DRAM1_DQ_15 DRAM1_DQ_16 DRAM1_DQ_17 DRAM1_DQ_18 DRAM1_DQ_19 DRAM1_DQ_20 DRAM1_DQ_21 DRAM1_DQ_22 DRAM1_DQ_23 DRAM1_DQ_24 DRAM1_DQ_25 DRAM1_DQ_26 DRAM1_DQ_27 DRAM1_DQ_28 DRAM1_DQ_29 DRAM1_DQ_30 DRAM1_DQ_31 DRAM1_DQ_32 DRAM1_DQ_33 DRAM1_DQ_34 DRAM1_DQ_35 DRAM1_DQ_36 DRAM1_DQ_37 DRAM1_DQ_38 DRAM1_DQ_39 DRAM1_DQ_40 DRAM1_DQ_41 DRAM1_DQ_42 DRAM1_DQ_43 DRAM1_DQ_44 DRAM1_DQ_45 DRAM1_DQ_46 DRAM1_DQ_47 DRAM1_DQ_48 DRAM1_DQ_49 DRAM1_DQ_50 DRAM1_DQ_51 DRAM1_DQ_52 DRAM1_DQ_53 DRAM1_DQ_54 DRAM1_DQ_55 DRAM1_DQ_56 DRAM1_DQ_57 DRAM1_DQ_58 DRAM1_DQ_59 DRAM1_DQ_60 DRAM1_DQ_61 DRAM1_DQ_62 DRAM1_DQ_63

DRAM1_DQSP_0 DRAM1_DQSN_0 DRAM1_DQSP_1 DRAM1_DQSN_1 DRAM1_DQSP_2 DRAM1_DQSN_2 DRAM1_DQSP_3 DRAM1_DQSN_3 DRAM1_DQSP_4 DRAM1_DQSN_4 DRAM1_DQSP_5 DRAM1_DQSN_5 DRAM1_DQSP_6 DRAM1_DQSN_6 DRAM1_DQSP_7 DRAM1_DQSN_7

BG38 BC40 BA42 BD42 BC38 BD36 BF42 BC44 BH32 BG32 BG36 BJ37 BG33 BJ33 BG37 BH38 AU36 AT36 AV40 AT40 BA36 AV36 AY42 AY40 BJ41 BG41 BJ45 BH46 BG40 BH40 BH48 BH47 AY52 AY51 AP52 AP51 AW51 AW53 AR51 AR53 AP47 AP45 AK40 AM41 AP48 AP50 AK42 AH40 AM45 AM47 AF48 AF50 AM48 AM50 AH44 AK45 AM52 AL51 AG53 AG51 AL53 AK51 AF52 AF51

BF40 BD40 BG35 BH34 BA38 AY38 BH44 BG43 AU53 AV52 AP42 AP44 AK47 AK48 AH52 AJ51

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS7 DDR_B_DQS#7

DDR_B_DQS[0..7] [14] DDR_B_DQS#[0..7] [14]DDR_A_DQS#[0..7] [13]

Close To SOC Pin

A A

+1.35V

1 2

R965

4.7K_0402_1%

1 2

R966

4.7K_0402_1%

+DDR_SOC_VREF

C1132

C1132 .1U_0402_16V7K

.1U_0402_16V7K

Security Classification

Issued D ate

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/04/12 2014/04/12

Compal Secr et Data

Deciphered Date

Compal Electronics, Inc.

Title

VLV-M SOC Memory DDR3L

Size Document Num ber Rev

Custom

Intel BayTrail-M Platform

Date: Sheet

547Tuesday, February 18, 2014

0.2

USOC1C

HDMI_TX2+[24] HDMI_TX2-[24] HDMI_TX1+[24] HDMI_TX1-[24] HDMI_TX0+[24] HDMI_TX0-[24]

D D

HDMI

HDMI_CLK+[24] HDMI_CLK-[24]

HDMI_HPD#[24]

HDMI_DDCDATA[24] HDMI_DDCCLK[24]

1 2

R968

402_0402_1%

DDI0_RCOMPP DDI0_RCOMPN

Follow CRB v1.15 0ohm till to GND

C C

+1.8VS

R970

R970 10K_0402_5%

B B

10K_0402_5%

R971

R971 10K_0402_5%

10K_0402_5%

T186T186

T187T187

GPIO_NC13 GPIO_NC14

GPIO_NC12

AV3 AV2 AT2 AT3 AR3 AR1 AP3 AP2

AL3 AL1

D27

C26 C28

B28 C27 B26

AK12

AK13 AM14 AM13

AM3 AM2

AB3 AB2

AD6 AD4 AB9 AB7

A29 C29

AB14

B30 C30

T2 T3

Y2 W3 W1

DDI0_TXP_0 DDI0_TXN_0 DDI0_TXP_1 DDI0_TXN_1 DDI0_TXP_2 DDI0_TXN_2 DDI0_TXP_3 DDI0_TXN_3

DDI0_AUXP DDI0_AUXN

DDI0_HPD

DDI0_DDCDATA DDI0_DDCCLK

DDI0_VDDEN DDI0_BKLTEN DDI0_BKLTCTL

DDI0_RCOMP_P DDI0_RCOMP_N RESERVED_AM14 RESERVED_AM13 VSS_AM3 VSS_AM2

RESERVED_T2 RESERVED_T3 RESERVED_AB3 RESERVED_AB2 RESERVED_Y3 RESERVED_Y2 RESERVED_W3 RESERVED_W1 RESERVED_V2 RESERVED_V3 RESERVED_R3 RESERVED_R1 RESERVED_AD6 RESERVED_AD4 RESERVED_AB9 RESERVED_AB7 RESERVED_Y4 RESERVED_Y6 RESERVED_V4 RESERVED_V6 GPIO_S0_NC_13 GPIO_S0_NC14 RESERVED_AB14 GPIO_S0_NC_12 RESERVED_C30

/KON

/KON /KON

Follow CRB v1.15

FH8065301546401_FCBGA131170

GPIO_S0_NC[13]: Multiplexed with Hardware Straps Pin:MDSI_DDCDATA

A A

DDI1_HPD

VSS_AH3 VSS_AH2

VGA_RED

VGA_IREF VGA_IRTN

AG3 AG1 AF3 AF2 AD3 AD2 AC3 AC1

AK3 AK2

K30

P30 G30

N30 J30 M30

AH3 AH2

AH14 AH13 AF14 AF13

BA3 AY2 BA1 AW1 AY3

BD2 BF2

BC1 BC2

T7 T9 AB13 AB12 Y12 Y13 V10 V9 T12 T10 V14 V13 T14 T13 T6 T4 P14

F34 M32 D28 J28 K34 D34 F32 F28 K28 J34 N32 D32

3 OF 10

DDI1_TXP_0

/KJN/KJN

DDI1_TXN_0 DDI1_TXP_1 DDI1_TXN_1 DDI1_TXP_2 DDI1_TXN_2 DDI1_TXP_3 DDI1_TXN_3

/KJN /KJN

/KON

DDI1_DDCDATA

/KON

DDI1_DDCCLK

/KON

DDI1_VDDEN

/KON

DDI1_BKLTEN

/KON

DDI1_BKLTCTL

RESERVED_AH14 RESERVED_AH13 RESERVED_AF14 RESERVED_AF13

VGA_GREEN

(K(N

VGA_HSYNC

(K(N

VGA_VSYNC

(K(N

VGA_DDCCLK

(K(N

VGA_DDCDATA

RESERVED_T7

RESERVED_T9 RESERVED_AB13 RESERVED_AB12

RESERVED_Y12 RESERVED_Y13 RESERVED_V10

RESERVED_V9

RESERVED_T12 RESERVED_T10 RESERVED_V14 RESERVED_V13 RESERVED_T14 RESERVED_T13

RESERVED_T6

RESERVED_T4

RESERVED_P14

GPIO_S0_NC_15 GPIO_S0_NC_16 GPIO_S0_NC_17 GPIO_S0_NC_18 GPIO_S0_NC_19 GPIO_S0_NC_20 GPIO_S0_NC_21 GPIO_S0_NC_22 GPIO_S0_NC_23 GPIO_S0_NC_24 GPIO_S0_NC_25 GPIO_S0_NC_26

DDI1_AUXP DDI1_AUXN

VGA_BLUE

DDI1_ENABLE

DDI1_ENVDD DDI1_ENBKL DDI1_PWM

1 2

R967 2.2K_0402_5%R967 2.2K_0402_5%

Follow CRB v1.15 0ohm till to GND

CRT_R CRT_B CRT_G CRT_IREF

CRT_HSYNC CRT_VSYNC

CRT_DDC_CLK CRT_DDC_DATA

1 2

R969 357_0402_1%R969 357_0402_1%

EDP_TXP0 [23] EDP_TXN0 [23 ] EDP_TXP1 [23] EDP_TXN1 [23 ]

+1.8VS

EDP_AUXP [23] EDP_AUXN [23]

EDP_HPD# [23]

CRT_R [25] CRT_B [25] CRT_G [25]

CRT_HSYNC [25] CRT_VSYNC [ 25]

CRT_DDC_CLK [25] CRT_DDC_DATA [25]

eDP Panel

CRT

DDI1_ENBKL

DDI1_ENVDD

CRT_R CRT_G CRT_B

+1.8VS

1 2

R1060 0_0402_5%RS@R1060 0_0402_5%RS@

+1.8VS

R1088 0_0402_5%RS@R10 88 0_0402_ 5%RS@

DDI1_PWM

BKOFF# ENVDD INVT_PWM_SOC

DDI1_ENBKL DDI1_ENVDD DDI1_PWM

DDI1_ENBKL

DDI1_ENVDD

DDI1_PWM

EDP_HPD#

RP43

RP43 150_0804_8P4R_1%

150_0804_8P4R_1%

U61

R1081 0_0402_5%@R1081 0_0402_5%@

NL17SZ07DFT2G_SC70- 5

SA00004BV00

U62

R1086 0_0402_5%@R1086 0_0402_5%@

NL17SZ07DFT2G_SC70- 5

SA00004BV00

1 2

+1.8VS

U64

NL17SZ07DFT2G_SC70- 5

SA00004BV00

RP44

4.7K_0804_8P4R_5%

RP45

100K_0804_8P4R_5%

C514

100P_0402_50V8J

C516

100P_0402_50V8J

C518

100P_0402_50V8J

C519

100P_0402_50V8J

18 27 36 45

1 2

45 36 27 18

18 27 36 45

ESD@

BKOFF# [23]

SOC_ENBKL [33]

ENVDD [23]

SOC_ENVDD [33]

INVT_PWM_SOC [23]

+3VS

0504

Security Class ification

Security Classifica tion

2013/04/12 2014/04/12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DI SCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DI SCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/04/12 2014/04/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

VLV-M SOC Display

Intel BayTrail-M Platform

0.2

647Tuesday, February 18, 201 4

USOC1D

SATA_PTX_DRX_ P0[31]

HDD

D D

ODD

SATA_PTX_DRX_ N0[31]

SATA_PRX_DTX_ P0[31] SATA_PRX_DTX_ N0[31]

SATA_PTX_DRX_ P1[31] SATA_PTX_DRX_ N1[31]

SATA_PRX_DTX_ P1[31] SATA_PRX_DTX_ N1[31]

Follow CRB V1.15 0ohm till to GND

SOC_SCI#[8]

Follow CRB v1.15

1 2

402_0402_1%

C C

B B

Check power rail

SOC_SATALED#[32]

A A

+3VS

R10

R10 10K_0402_5%

10K_0402_5%

1 2

SOC_SCI# DEVSLP_SOC

T188T188

SATA_LED#_SOC

SATA_RCOMPP

R972

SATA_RCOMPN

+1.8VS

123

R200 0_0402_5%RS@R200 0_0402_5%RS@

R980

R980 10K_0402_5%

10K_0402_5%

1 2

Q63

Q63 MESS138 W-G_SOT 323-3

MESS138 W-G_SOT 323-3

BF6

BG7

AU16 AV16

BD10 BF10

AY16 BA16

BB10 BC10

BA12 AY14 AY12

AU18 AT18

AT22

AV20 AU22 AV22 AT20 AY24 AU26 AT26 AU20

AV26 BA24

AY18

BA18 AY20 BD20 BA20 BD18 BC18

AY26 AT28 BD26 AU28 BA26 BC24 AV28 BF22 BD22

BF26

SATA_LED#_SOC

SATA_TXP_0 SATA_TXN_0

SATA_RXP_0 SATA_RXN_0

SATA_TXP_1 SATA_TXN_1

SATA_RXP_1 SATA_RXN_1

VSS_BB10 VSS_BC10

SATA_GP0 / GPIO_S0_SC_0 SATA_GP1 / SATA_DEVSL P_0 / GPIO_S0_SC_1 SATA_LED# / GPIO_S0_SC_ 2

SATA_RCOMP_P SATA_RCOMP_N

MMC1_C LK / GPIO_S0 _SC_16

MMC1_D 0 / GPIO_S0_ SC_17 MMC1_D 1 / GPIO_S0_ SC_18 MMC1_D 2 / GPIO_S0_ SC_19 MMC1_D 3 / GPIO_S0_ SC_20 MMC1_D 4 / GPIO_S0_ SC_21 MMC1_D 5 / GPIO_S0_ SC_22 MMC1_D 6 / GPIO_S0_ SC_23 MMC1_D 7 / GPIO_S0_ SC_24

MMC1_C MD / GPIO_S0_ SC_25 MMC1_R ST# / SATA _DEVSLP_0 / GPIO_S0_SC _26

MMC1_R COMP

SD2_CLK / GPIO_S0_SC_2 7 SD2_D0 / GPIO_S0_SC_2 8 SD2_D1 / GPIO_S0_SC_2 9 SD2_D2 / GPIO_S0_SC_3 0 SD2_D3_CD# / GPIO_S0_SC_31 SD2_CMD / GPIO_S0_SC_32

SD3_CLK / GPIO_S0_SC_3 3 SD3_D0 / GPIO_S0_SC_3 4 SD3_D1 / GPIO_S0_SC_3 5 SD3_D2 / GPIO_S0_SC_3 6 SD3_D3 / GPIO_S0_SC_3 7 SD3_CD# / GPIO_S0_SC _38 SD3_CMD / GPIO_S0_SC_39 SD3_1P8EN / GPIO_S0_SC_ 40 SD3_PWREN# / GPIO_S0_SC_41

SD3_RCOMP

FH8065301546401_FCBGA131170

PCIE_CLKREQ_0# / GPIO_S0_SC _3 PCIE_CLKREQ_1# / GPIO_S0_SC _4 PCIE_CLKREQ_2# / GPIO_S0_SC _5 PCIE_CLKREQ_3# / GPIO_S0_SC _6

SD3_WP / GPIO_S0_SC_ 7

HDA_RST# / LPE_I2S0_CLK / GPIO_S0_SC_8

HDA_SYNC / LPE_I2S0_FRM / GPIO_S0_SC_9

HDA_CLK / LPE_I2S0_DATAOUT / GPIO_S0_SC_10

HDA_SDO / LPE_I2S0_DATAIN / GPIO_S0_SC_11

HDA_SDI0 / LPE_I2S1_CLK / GPIO_S0_SC_12

HDA_SDI1 / LPE_I2S1_FRM / GPIO_S0_SC_13

HDA_DOCKRST# / LPE_I2S1_DATAOUT / GPIO_S0_SC_14

HDA_DOCKEN# / LPE_I2S1_DATAIN / GPIO_S0_SC_15

LPE_I2S2_CLK / SATA_DEVSLP_1 / GPIO_S0_SC_62

4 OF 10

LPE_I2S2_FRM / GPIO_S0_SC_63

LPE_I2S2_DATAIN / GPIO_S0_SC_64

LPE_I2S2_DATAOUT / GPIO_S0_SC_65

PCIE_TXP_0 PCIE_TXN_0

PCIE_RXP_0

PCIE_RXN_0

PCIE_TXP_1

PCIE_TXN_1

PCIE_RXP_1 PCIE_RXN_1

PCIE_TXP_2

PCIE_TXN_2

PCIE_RXP_2 PCIE_RXN_2

PCIE_TXP_3

PCIE_TXN_3

PCIE_RXP_3 PCIE_RXN_3

VSS_BB7 VSS_BB5

PCIE_RCOMP_P PCIE_RCOMP_N

RESERVED_BB4 RESERVED_BB3

RESERVED_AV10

RESERVED_AV9

HDA_LPE_RCOMP

RESERVED_P34 RESERVED_N34

RESERVED_AK9 RESERVED_AK7

PROCHOT#

AY7

PCIE_PTX_DRX_P0

AY6

PCIE_PTX_DRX_N0

AT14

PCIE_PRX_DTX_P0

AT13

PCIE_PRX_DTX_N0

AV6

PCIE_PTX_DRX_P1

AV4

PCIE_PTX_DRX_N1

AT10

PCIE_PRX_DTX_P1

AT9

PCIE_PRX_DTX_N1

AT7

PCIE_PTX_DRX_P2

AT6

PCIE_PTX_DRX_N2

AP12

PCIE_GTX_C_ARX_P0

AP10

PCIE_GTX_C_ARX_N 0

AP6

PCIE_PTX_DRX_P3

AP4

PCIE_PTX_DRX_N3

AP9

PCIE_PRX_DTX_P3

AP7

PCIE_PRX_DTX_N3

BB7 BB5

BG3 BD7 BG5 BE3 BD5

AP14

PCIE_RCOMPP

AP13

PCIE_RCOMPN

BB4 BB3

AV10 AV9

BF20

HDA_RCOMP

BG22

HDA_RST#

BH20

HDA_SYNC

BJ21

HDA_BIT_CLK

BG20

HDA_SDOUT

BG19

HDA_SDIN0

BG21 BH18 BG18

BF28 BA30

GPIO_S0_SC_63

BD28 BC30

GPIO_S0_SC_65

P34 N34

AK9 AK7

C24

Internal PD 2K

1 2

C1133.1U_0402_1 6V7K C1133.1U_0402_16 V7K

1 2

C1134.1U_0402_1 6V7K C1134.1U_0402_16 V7K

1 2

C1135.1U_0402_1 6V7K C1135.1U_0402_16 V7K

1 2

C1000.1U_0402_1 6V7K C1000.1U_0402_16 V7K

1 2 1 2

Follow CRB V1.15 0ohm till to GND

VGA_CLKREQ# Card_CLKREQ# LAN_CLKREQ# WLAN_CLKREQ#

1 2

R975

402_0402_1%

T189T189 T190T190 T191T191

HDA_SDIN0 [28]

R979

69.8_0402_1%

1 2

H_PROCHOT# [33]

R97649.9_0402_1% R97649.9_0402_1%

+1.0VS

PCIE_PTX_C_DRX_P0 [15] PCIE_PTX_C_DRX_N 0 [15]

PCIE_PRX_DTX_P0 [1 5] PCIE_PRX_DTX_N0 [15]

PCIE_PTX_C_DRX_P1 [29] PCIE_PTX_C_DRX_N 1 [29]

PCIE_PRX_DTX_P1 [2 9]

C1136.1U_0402_1 6V7K C1136.1U_0402_16 V7K C1137.1U_0402_1 6V7K C1137.1U_0402_16 V7K

C1140.1U_0402_1 6V7K C1140.1U_0402_16 V7K C1079.1U_0402_1 6V7K C1079.1U_0402_16 V7K

PCIE_PRX_DTX_N1 [29]

PCIE_ATX_C_GRX_P0 [26] PCIE_ATX_C_GRX_N 0 [26]

PCIE_GTX_C_ARX_P0 [26] PCIE_GTX_C_ARX_N 0 [26]

PCIE_PTX_C_DRX_P3 [27] PCIE_PTX_C_DRX_N 3 [27]

PCIE_PRX_DTX_P3 [2 7] PCIE_PRX_DTX_N3 [27]

VGA_CLKREQ# [15] Card_CLKREQ# [29] LAN_CLKREQ# [26] WLAN_CLKREQ# [27]

HDA_SYNC HDA_SDOUT

HDA_RST#

HDA_BIT_CLK

GPIO_S0_SC_63: BIOS/EFI Boot Strap (BBS) BIOS Boot Selection 0 = LPC 1 = SPI

10K_0402_5%

1 2

R1032 33_0402_5%R1032 33_0402_5%

R977

GPU

Card reader

PCIE LAN

WLAN

Check OD pin or not in Device side

RP46

18 27 36 45

33_0804_8P4R_5%

GPIO_S0_SC_65: Security Flash Descriptors 0 = Override 1 = Normal Operation (Internal PU)

+1.8VS+1.8VS

R978

10K_0402_5%

GPIO_S0_SC_65GPIO_S0_SC_63

LAN_CLKREQ# WLAN_CLKREQ# VGA_CLKREQ# Card_CLKREQ#

HDA_SYNC_AUDIO [28]

HDA_SDOUT_AUDIO [28]

HDA_RST_AUDIO# [28]

HDA_BITCLK_AUDIO [28]

EC programing : "High"for Flash BIOS

RS@

R1091

0_0402_5%

Q62

MESS138 W-G_SOT 323-3

+1.8VS

RP51

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

ME_EN [33]

Security Classificati on

2013/04/12 2014/04/12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/04/12 2014/04/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Documen t Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

VLV-M SOC SATA/PCI-E/HDA

Intel BayTrail-M Platform

747Tuesday, February 18, 2014

0.2

XTAL_25M_IN

R981

NOGCLK@R981

NOGCLK@

XTAL_25M_IN XTAL_25M_OUT

ICLK_ICOMP ICLK_RCO MP

XDP_H_PREQ_BUF#

SOC_SPI_CS0#

SOC_SPI_MISO SOC_SPI_MOSI SOC_SPI_CLK

SOC_KBRST#

SOC_LID_OUT#

SOC_SMI#

GPIO_RCOMP

1 2

XDP@

1 2

SPI_CS0# SPI_MISO SPI_WP#

NOGCLK@

1M_0402_5%

XTAL_25M_OUT

C1004

C1004 10P_0402_25V8K

10P_0402_25V8K

XDP_H_TCK XDP_H_TRST# XDP_H_TMS XDP_H_TDI XDP_H_TDO XDP_H_PRDY#

1 2 3 4

AH12 AH10

AD9

AD14 AD13

AD10 AD12

AF6 AF4

AF9 AF7

AK4 AK6

AM4 AM6

AM9

AM10

BH7 BH5 BH4 BH8 BH6

BJ9

D14 G12

F14

F12 G16 D18

F16

AT34

C23 C21

B22

A21 C22

B18

B16 C18

A17 C17 C16

B14 C15

C13

A13 C19

N26

C1075 .1U_0402_16V7K

.1U_0402_16V7K

XDP_H_TDO

U56

CS# DO(IO1) WP#(IO2) GND

W25Q64DWSSIG_SO8

NOGCLK@Y7

NOGCLK@

25MHZ_10PF_7V25000014

C1003

10P_0402_25V8K

SPI_CS0# SPI_MISO SPI_MOSI SPI_CLK

+1.8VALW

R989 51_0402_5%XDP@R989 51_0402_5%XDP@

C1086

ESD@ C1086

ESD@

.1U_0402_16V7K

XDP_H_PREQ_BUF#

10P_0402_25V8K

200_0402_5%

D D

C C

B B

Change To 10pF for Vendor Suggest.

NOGCLK@

0701

1 2

R984 4.02K_0402_1%R984 4.02K_0402_1%

1 2

R985 47.5_0402_1%R985 47.5_0402_1%

Card

LAN

WLAN

RP48

1 8 2 7 3 6 4 5

22_0804_8P4R_5%

EMI@

CLK_PEG_VGA#[15] CLK_PEG_VGA[15]

CLK_PCIE_Card#[29] CLK_PCIE_Card[29]

CLK_PCIE_LAN#[26] CLK_PCIE_LAN[26]

CLK_PCIE_WLAN#[27] CLK_PCIE_WLAN[27]

SOC_SPI_CS0# SOC_SPI_MISO SOC_SPI_MOSI SOC_SPI_CLK

GPU

Close To SOC <1000mil

1 2

RP52

4 5 3 6 2 7 1 8

51_0804_8P4R_5%

XDP@

+1.8VALW

XDP@

R1024

0625 update

+BIOS_SPI

A A

1 2

R999 3.3K_0402_5%R999 3.3K_0402_5%

1 2

R1001 3.3K_0402_5%R1001 3.3K_0402_5%

GND

T193T193

XDP_H_PRDY#

XDP_H_TDI XDP_H_TMS XDP_H_TCK XDP_H_TRST#

1 2

R995

49.9_0402_1%

+1.8VALW

R1025

R1025 1K_0402_5%

1K_0402_5%

+1.8VALW

R1026 51_0402_5%



R151 33_0402_5%GCLK@R151 33_0402_5%GCLK@

Place close to Y7

USOC1E

ICLK_ OSCIN ICLK_ OSCO UT

RESERVED_AD9

ICLK_ ICOMP ICLK_ RCOM P

RESERVED_AD10 RESERVED_AD12

PCIE_CLKN_0 PCIE_CLKP_0

PCIE_CLKN_1 PCIE_CLKP_1

PCIE_CLKN_2 PCIE_CLKP_2

PCIE_CLKN_3 PCIE_CLKP_3

RESERVED_AM9 RESERVED_AM10

PMC_PLT_CLK_0 / GPIO_S0_SC_96 PMC_PLT_CLK_1 / GPIO_S0_SC_97 PMC_PLT_CLK_2 / GPIO_S0_SC_98 PMC_PLT_CLK_3 / GPIO_S0_SC_99 PMC_PLT_CLK_4 / GPIO_S0_SC_100 PMC_PLT_CLK_5 / GPIO_S0_SC_101

TAP_TCK TAP_TRST# TAP_TMS TAP_TDI TAP_TDO TAP_PRDY# TAP_PREQ# RESERVED_AT34

PCU_SPI_CS_0# PCU_SPI_CS_1# / GPIO_S5_21 PCU_SPI_MISO PCU_SPI_MOSI PCU_SPI_CLK

GPIO_S5_0 GPIO_S5_1 / PMC_WAKE_PC IE_1 GPIO_S5_2 / PMC_WAKE_PC IE_2 GPIO_S5_3 / PMC_WAKE_PC IE_3 GPIO_S5_4 GPIO_S5_5 / PMU_SUSCLK_ 1 GPIO_S5_6 / PMU_SUSCLK_ 2 GPIO_S5_7 / PMU_SUSCLK_ 3

GPIO_S5_8 GPIO_S5_9 GPIO_S5_10

GPIO_RCOMP

FH8065301546401_FCBGA131170

XDP_RSTBTN#

1 2

XDP@C1075

XDP@

VCC

DI(IO0)

SPI_HOLD#

SPI_CLK

CLK

SPI_MOSI

HOLD#(IO3)

RS@

C1013 .1U_0402_16V7KC1013 .1U_0402_16V7K

R1000 3.3K_0402_5%R1000 3.3K_0402_5%

C1014 10P_0402_50V8J

10P_0402_50V8J

Check power rail

SOC_PCIE_WAKE#[27]

SIO_UART1_RXD / GPIO_S0_SC_70

SIO_UART1_TXD / GPIO_S0_SC_71 SIO_UART1_RTS# / GPIO_S0_SC_72 SIO_UART1_CTS# / GPIO_S0_SC_73

SIO_UART2_RXD / GPIO_S0_SC_74

SIO_UART2_TXD / GPIO_S0_SC_75 SIO_UART2_RTS# / GPIO_S0_SC_76 SIO_UART2_CTS# / GPIO_S0_SC_77

PMC_SUSPWRDNACK / GPIO_S5_11

PMC_WAKE_PCIE_0# / GPIO_S5_15

PMC_SUS_STAT# / GPIO_S5_18

RTC domain

SIO_SPI_CS# / GPIO_S0_SC_66 SIO_SPI_MISO / GPIO_S0_SC_67 SIO_SPI_MOSI / GPIO_S0_SC_68

SIO_SPI_CLK / GPIO_S0_SC_69

5 OF 13

+1.8VALW+BIOS_SPI

R998

1 2

0_0402_5%

1 2

Reserve for EMI(Near SPI ROM)

1 2

@EMI@C1014

@EMI@

R1002 33_0402_5%

33_0402_5%

GCLK_PCH_25MHZ [35]

+3VALW

R11

@R11

10K_0402_5%

1 2

PMC_SUSCLK_0 / GPIO_S5_12 PMC_SLP_S0IX# / GPIO_S5_13

PMC_SLP_S4# PMC_SLP_S3#

GPIO_S5_14

PMC_ACPRESENT

PMC_BATLOW#

PMC_PWRBTN# / GPIO_S5_16

PMC_RSTBTN#

PMC_PLTRST#

GPIO_S5_17

ILB_R TC_ TEST #

ILB_R TC_ RST#

PMC_RSMRST#

PMC_CORE_PWROK

ILB_R TC_ X1 ILB_R TC_ X2

ILB_R TC_ EXTPAD

RTC_VCC_P22

SVID_ALERT#

SVID_DATA

SVID_CLK

SIO_PWM_0 / GPIO_S0_SC_94 SIO_PWM_1 / GPIO_S0_SC_95

GPIO_S5_22 GPIO_S5_23 GPIO_S5_24 GPIO_S5_25 GPIO_S5_26 GPIO_S5_27 GPIO_S5_28 GPIO_S5_29 GPIO_S5_30

SPI_CLK

@EMI@R1002

@EMI@

+1.8VALW

123

AU34 AV34 BA34 AY34

BF34 BD34 BD32 BF32

D26 G24 F18 F22 D22 J20 D20 F26 K26 J26 BG9 F20 J24 G18

C11 C12

B10 B7

C9 A9 B8 P22

B24 A25 C25

AU32 AT32

K24 N24 M20 J18 M18 K18 K20 M22 M24

AV32 BA28 AY28 AY30

C1085

C1085 .1U_0402_16V7K

.1U_0402_16V7K

ESD@

PMC_PCIE_WAKE#

Q66

Q66 MESS138 W-G_ SOT3 23-3

MESS138 W-G_ SOT3 23-3

SKU_Strap1 SKU_Strap2 SKU_Strap3

PMC_SUSCLK

PMC_SLP_S4# PMC_SLP_S3# GPIO_S5_14 PMC_ACIN PMC_PCIE_WAKE# PMC_BATLOW# PMC_PWRBTN# XDP_RSTBTN#

PMC_PLTRST#

GPIO_S5_17

RTC_TEST# RTC_RST#

EC_RSMRST# PMC_CORE_PWROK

ILB_RTC _X1 ILB_RTC _X2 ILB_RTC _EXTPAD

+RTCVCC

VR_SVID_ALERT#_SOC VR_SVID_DATA_SOC

XDP_OBSDATA_A0 XDP_OBSDATA_A1 XDP_OBSDATA_A2 XDP_OBSDATA_A3

+RTCVCC

R996

R996 20K_0402_1%

20K_0402_1%

1 2 1 2

R997

R997 20K_0402_1%

20K_0402_1%

1U_0402_6.3V6K

R712 0_0402_5%

1.8V 3.3V

PMC_PLTRST#

NL17SZ07DFT2G_SC70-5

T192T192

32.768k output

PMC_SUSCLK [27]

T217T217

T205T205

EC_RSMRST# [33]

1 2

C1008

C1008 .1U_0402_16V7K

.1U_0402_16V7K

1 2

R1065 20_0402_1%R1065 20_0402_1%

1 2

R1066 16.9_0402_1%R1066 16.9_0402_1%

T213T213 T214T214 T215T215 T216T216

C1011

C1011 1U_0402_6.3V6K

1U_0402_6.3V6K

C1012

1 2

SP@

CLRP1

SHORT PADS

Clear CMOS RTC_RST close to KB door

SA00004BV00

RTC_RST#RTC_TEST#

+1.8VALW

+1.8VS +3VS

R982

U53

4.7K_0402_5%

PLT_RST_BUF# [15,26,27,29,33]

PLT_RST Buffer

MESS138 W-G_ SOT3 23-3

R1100

R1104

R1104 10K_0402_5%

10K_0402_5%

E14@

1 2

R1105

R1105 10K_0402_5%

10K_0402_5%

B14@

1 2

R1105

R1105 10K_0402_5%

10K_0402_5%

SD028100280

SD028100280 B15@

B15@

R1102

R1102 10K_0402_5%

10K_0402_5%

B15@

1 2

R1103

R1103 10K_0402_5%

10K_0402_5%

B14@

1 2

R1103

R1103 10K_0402_5%

10K_0402_5%

SD028100280

SD028100280 E14@

E14@

0901:for ESD change to 100pF

EC_RSMRST#

+1.0VS

R1064

73.2_0402_1%

VR_SVID_ALERT# [4 5]

VR_SVID_DATA [45]

VR_SVID_CLK [45]

R148 0_0402_5%

Place close to Y8

ILB_RTC _X1 ILB_RTC _X2

Change To 15pF for Vendor Suggest. 0701

RTC_TEST#

RTC_RST#

Check Intel

SP@

CLRP2

CLRP2 SHORT PADS

SHORT PADS

Security Classification

Issued D ate

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

R994 10M_0402_5%

10M_0402_5%

32.768KHZ_12.5PF_Q13FC135000040

32.768KHZ_12.5PF_Q13FC135000040 Y8

C1009

C1009 15P_0402_50V8J

15P_0402_50V8J

NOGCLK@

+RTCBATT +RTCVCC

R1100 10K_0402_5%

10K_0402_5%

DIS@

1 2

R1101

R1101 10K_0402_5%

10K_0402_5%

UMA@

1 2

R990 100K_0402_5%R990 100K_0402_5%

C513

1 2

100P_0402_50V8J

@ESD@

GCLK@

NOGCLK@R994

NOGCLK@

1 2

NOGCLK@

C1010

C1010 15P_0402_50V8J

15P_0402_50V8J

PDG v1.2 update

GCLK_32K [35]

PMC_PCIE_WAKE# PMC_BATLOW# GPIO_S5_14 LS_OE

trace width 10milW=20mils W=20mils

R711

RS@R711

RS@

0_0402_5%

1 2

C151

C151 .1U_0402_16V7K

.1U_0402_16V7K

Compal Secr et Data

2013/04/12 2014/04/12

Compal Secr et Data

Deciphered Date

+1.8VS

RS@

0_0402_5%

0_0402_5% R1106

R1106

0_0402_5%

0_0402_5% R1107

R1107

PMC_PLTRST# PLT_RST_BUF #

.1U_0402_16V7K

123

Q74

RP47

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

SOC_SERIRQ[9]

SOC_SCI#[7]

PMC_SLP_S3# PMC_SLP_S4# SOC_KBRST# SOC_LID_OUT#

SOC_SCI# PMC_PWRBTN#

Check power rail?

C153

SOC_SERIRQ

PMC_CORE_PWROK[33]

PMC_CORE_PWROK DDR_CORE_PWROK

+1.8VALW

R983

2.2K_0402_5%

SOC_KBRST# SOC_LID_OUT# PMC_PWRBTN# SOC_SMI#

SOC_SCI#

U54

VCCA

TXB0108PWR_TSSOP20

0_0402_5%

VCCB

2.2K_0402_5%

RB751V40_SC76-2

C520

C520 100P_0402_50V8J

100P_0402_50V8J

ESD@

VCCB

+3VALW_EC

RS@

R1096

GND

D40

B1 B2 B3 B4 B5 B6 B7 B8

20 18 17 16 15 14 13 12

EC_SLP_S3# [33,8] EC_SLP_S4# [33,8] EC_KBRST# [33,8] EC_LID_OUT# [33,8]

EC_SCI# [33,8] PBTN_OUT# [33,8]

R1031

@R1031

2.2K_0402_5%

0_0402_5%@

1 2

VCIN1_AC_IN [32,33,39]

+1.8VALW

R99210K_0402_5% R99210K_0402_5%

R103310K_0402_5% R103310K_0402_5%

R103410K_0402_5% R103410K_0402_5%

R109710K_0402_5% @ R109710K_0402_5% @

R103610K_0402_5% R103610K_0402_5%

R108210K_0402_5%

EC_SLP_S3# [33,8] EC_SLP_S4# [33,8] EC_KBRST# [33,8] EC_LID_OUT# [33,8] EC_SERIRQ [33,8]

EC_SCI# [33,8] PBTN_OUT# [33,8]

R1095

EC_SERIRQ [33,8]

C60

ESD@ C60

ESD@

+1.8VALW +1.8VALW

@ R1093

.1U_0402_16V7K

R1093

2.2K_0402_5%

PMC_ACIN

+1.8VALW

+1.8VALW +3VALW_EC

PMC_SLP_S3# PMC_SLP_S4# SOC_KBRST# SOC_LID_OUT# SOC_SERIRQ SOC_SMI# SOC_SCI# PMC_PWRBTN#

LS_OE

1 2

R1040 0_0402_5%RS@R1040 0_0402_5%RS@

1 2

R1041 0_0402_5%RS@R1041 0_0402_5%RS@

1 2

R1042 0_0402_5%RS@R1042 0_0402_5%RS@

1 2

R1043 0_0402_5%RS@R1043 0_0402_5%RS@

1 2

R1054 0_0402_5%RS@R1054 0_0402_5%RS@

1 2

R1058 0_0402_5%RS@R1058 0_0402_5%RS@

U63

VCCA

GND

G2129TL1U_SC70-6

0529 update

+1.35VS+3VALW

R993

R993 10K_0402_5%

10K_0402_5%

U55

R986

1.35V3.3V

+3VALW

C1083

@ESD@ C1083

@ESD@

100P_0402_50V8J

123

Q67

1 2

Compal Electronics, Inc.

VLV-M SOC CLK/PMU/SPI

Intel BayTrail-M Platform

C1084

@ESD@ C1084

@ESD@

DDR_CORE_PWROK [5]

847Tuesday, February 18, 2014

NL17SZ07DFT2G_SC70-5

SA00004BV00

MESS138 W-G_ SOT3 23-3 @

@ R986

10K_0402_5%

R1080 0_0402_5%

Title

Size Document Num ber Rev

Custom

Date: Sheet

+1.8VS+1.8VALW

R1094

R1094 10K_0402_5%

10K_0402_5%

0.2

DGPU_HOLD_RST#[15] BT_OFF#[27] ODD_EN[31]

RS@

0_0402_5%

R1110

DGPU_PWR_EN[20,33,44]

123

Q75

Q75 MESS138 W-G_ SOT3 23-3

MESS138 W-G_ SOT3 23-3

R16

10K_0402_5%

1 2

ODD_EN_R

D D

R1035

R1035 10K_0402_5%

10K_0402_5%

DGPU_PWR_EN_RDGPU_HOLD_RST#_R

R1044

R1044 10K_0402_5%

10K_0402_5%

BT_OFF#

R15

1 2

Check power rail

R991

R991 10K_0402_5%

10K_0402_5%

1 2

R1090

R1090 0_0402_5%

0_0402_5%

BT_OFF#_R

1 2 1 2 1 2 1 2

USB2 Port 0 (USB3.0 P 0)

Left USB Port

Right USB Port

C C

ILB_LPC_CLK_0 : Output of 25MHz, Need Check with EC

B B

ILB_LPC_CLK_1 is for CLK_0 feedback.(Input) Set to Outpot for Normal Usage

+3VS

R1016

8.2K_0402_5%

Check Intel for PU

1 2

LPC_CLKRUN#

USB HUB

+1.8VALW

R1007 10K_0402_5%R1007 10K_0402_5% R1009 10K_0402_5%R1009 10K_0402_5%

USB_OC0#[30] USB_OC1#[32]

1 2 1 2

USB_OC0# USB_OC1#

NOTE: Ref checklist rev1.0 p.25 USB_HSIC_RCOMP must NOT float if they are not being used.

LPC_AD0[33] LPC_AD1[33] LPC_AD2[33] LPC_AD3[33] LPC_FRAME#[33] LPC_CLK_EC[33]

SOC_SERIRQ[8]

C1015 10P_0402_50V8J

10P_0402_50V8J

USB20_P0[30] USB20_N0[30]

USB20_P1[30] USB20_N1[30]

USB20_P2[32] USB20_N2[32]

USB20_P3[30] USB20_N3[30]

@EMI@C1015

@EMI@

R10370_0402_5% @ R10370_0402_5% @ R10380_0402_5% @ R10380_0402_5% @ R10510_0402_5% @ R10510_0402_5% @ R10790_0402_5%

R10790_0402_5%

LPC_CLK_0

R13

10K_0402_5%

C1088

@ESD@

1U_0402_6.3V6K

DGPU_PWR_EN_R

DGPU_HOLD_RST#_R

BT_OFF#_R

ODD_EN_R

1 2

R10041K_0402_1% R10041K_0402_1%

1 2

R10051K_0402_1% R10051K_0402_1%

USB_OC0#

1 2

R1008

45.3_0402_1%

1 2

R1010

@R1010

0_0402_5%

1 2

R1012 45.3_0402_1%R1012 45.3_0402_1%

1 2

R101349.9_0402_1% R101349.9_0402_1%

1 2

R101422_0402_5% EMI@ R101422_0402_5% EMI@

LPC_CLKRUN#

C62

1 2

ESD@ C62

ESD@

.1U_0402_16V7K

ICLK_US B_TERMP ICLK_US B_TERMN

USB_OC1#

USB_RCOMP

USB_PLL_MON

HSIC_RCOMP

LPC_RCOMP

LPC_CLK_0

PCU_SMB_DATA PCU_SMB_CLK PCU_SMB_ALERT#

+1.8VS+3VS +1.8VS+3VS+1.8VS+3VS+1.8VS +1.8VALW +1.8VALW +1.8VALW

123

L1 K2 K3 M2 N3 P2

J3 P3 H3

B12

M16 K16

J14

G14

K12

J12

K10 H10

D10

F10

C20 B20

M13

BF18 BH16

BJ17

BJ13 BG14 BG17 BG15 BH14 BG16 BG13

BG12 BH10 BG11

R987

R987 10K_0402_5%

10K_0402_5%

1 2

RS@

0_0402_5%

R1111

R1108

Q68

Q68 MESS138 W-G_ SOT3 23-3

MESS138 W-G_ SOT3 23-3

USOC1F

GPIO_S5_31

GPIO_S5_32 GPIO_S5_33 GPIO_S5_34 GPIO_S5_35 GPIO_S5_36 GPIO_S5_37 GPIO_S5_38 GPIO_S5_39

GPIO_S5_40 GPIO_S5_41 GPIO_S5_42 GPIO_S5_43

USB_DP0 USB_DN0

USB_DP1 USB_DN1

USB_DP2 USB_DN2

USB_DP3 USB_DN3

ICLK_ USB_ TER MP ICLK_ USB_ TER MN

USB_OC_0# / GPIO_S5_19 USB_OC_1# / GPIO_S5_20

USB_RCOMPO USB_RCOMPI

USB_PLL_MON

USB_HSIC0_DATA USB_HSIC0_STROBE

USB_HSIC1_DATA USB_HSIC1_STROBE

USB_HSIC_RCOMP

LPC_RCOMP / VGA_RCOMP ILB_L PC_A D_0 / GPIO_ S0_S C_42 ILB_L PC_A D_1 / GPIO_ S0_S C_43 ILB_L PC_A D_2 / GPIO_ S0_S C_44 ILB_L PC_A D_3 / GPIO_ S0_S C_45 ILB_L PC_F RAME# / GP IO_S0_ SC_4 6 ILB_L PC_C LK_0 / GP IO_S0 _SC_ 47 ILB_L PC_C LK_1 / GP IO_S0 _SC_ 48 ILB_L PC_C LKR UN# / GPIO_ S0_S C_49 ILB_L PC_S ERIRQ / GPIO _S0_ SC_5 0

PCU_SMB_DATA / GPIO_S0_SC_51 PCU_SMB_CLK / GPIO_S0_SC_52 PCU_SMB_ALERT# / GPIO_S0_SC_53

FH8065301546401_FCBGA131170

DGPU_PWR_EN_RDGPU_PWR_EN

R14

10K_0402_5%

RESERVED_M10

RESERVED_M9

RESERVED_P6 RESERVED_P7

RESERVED_M7

USB3_REXT0

RESERVED_P10 RESERVED_P12

RESERVED_M4 RESERVED_M6

RESERVED_H8 RESERVED_H7

RESERVED_H4 RESERVED_H5

GPIO_S0_SC_55

GPIO_S0_SC_57 / PCU_UART _TXD

GPIO_S0_SC_61 / PCU_UART _RXD

SIO_I2C6_CLK / GPIO_S0_SC_91 / SD3_WP

6 OF 13

GPIO_S0_SC_56

GPIO_S0_SC_58 GPIO_S0_SC_59 GPIO_S0_SC_60

ILB_8 254 _SPKR / GP IO_S0_ SC_5 4

SIO_I2C0_DATA / GPIO_S0_SC_78

SIO_I2C0_CLK / GPIO_S0_SC_79

SIO_I2C1_DATA / GPIO_S0_SC_80

SIO_I2C1_CLK / GPIO_S0_SC_81

SIO_I2C2_DATA / GPIO_S0_SC_82

SIO_I2C2_CLK / GPIO_S0_SC_83

SIO_I2C3_DATA / GPIO_S0_SC_84

SIO_I2C3_CLK / GPIO_S0_SC_85

SIO_I2C4_DATA / GPIO_S0_SC_86

SIO_I2C4_CLK / GPIO_S0_SC_87

SIO_I2C5_DATA / GPIO_S0_SC_88

SIO_I2C5_CLK / GPIO_S0_SC_89

SIO_I2C6_DATA / GPIO_S0_SC_90

GPIO_S0_SC_092 GPIO_S0_SC_093

1 2

USB3_RXP0

USB3_RXN0

USB3_TXP0 USB3_TXN0

RS@

0_0402_5%

R1112

M10 M9

P6 P7

M7 M12

P10 P12

M4 M6

D4 E3

K6 K7

H8 H7

H4 H5

BD12 BC12 BD14 BC14 BF14 BD16 BC16

BH12

BH22 BG23

BG24 BH24

BG25 BJ25

BG26 BH26

BF27 BG27

BH28 BG28

BJ29 BG29

BH30 BG30

123

USB3_REXT0

GPIO_S0_SC_56 DBG_UART_TXD

DBG_UART_RXD

HDA_SPKR

SOC_I2C0_DATA SOC_I2C0_CLK

GPIO_S0_SC_92 GPIO_S0_SC_93

R988

R988 10K_0402_5%

10K_0402_5%

1 2

R1109

R1109 0_0402_5%

0_0402_5%

Q73

Q73 MESS138 W-G_ SOT3 23-3

MESS138 W-G_ SOT3 23-3

1 2

R1003

1.24K_0402_1%

0705 : Reserved

DGPU_HOLD_RST#_RDGPU_HOLD_RST#

PCH_USB3_RX0_P [30] PCH_USB3_RX0_N [ 30]

PCH_USB3_TX0_P [30]

PCH_USB3_TX0_N [30]

T203T203

T204T204

HDA_SPKR [28]

T207T207 T208T208

T201T201 T202T202

PDA (Platform Debug Assistant) Test Points

USB3 Port 0

+1.8VS

R1006

R1006 10K_0402_5%

10K_0402_5%

R1011

R1011 10K_0402_5%

10K_0402_5%

GPIO_S0_SC_56: A16 Swap Override 0 = Enable 1 = Disable Reference EDS Page 216

+1.8VS+1.8VS

RP49

PCU_SMB_CLK

PCU_SMB_DATA

PCU_SMB_ALERT#

A A

&&'@/DP/LC

-<2<#Q8R@S/C 67@SEC

Pull High at EC side

EC_SMB_CK2[13,14,18,31,33]

EC_SMB_DA2[13,14,18,31,33]

123

Q64

MESS138 W-G_ SOT3 23-3

Q65

MESS138 W-G_ SOT3 23-3

4.7K_0804_8P4R_5%

PCU_SMB_CLK

PCU_SMB_DATA

Security Classification

Issued D ate

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/04/12 2014/04/12

Compal Secr et Data

Deciphered Date

Compal Electronics, Inc.

Title

VLV-M SOC USB/LPC/SMBus

Size Document Num ber Rev

Custom

Intel BayTrail-M Platform

Date: Sheet

947Tuesday, February 18, 2014

0.2

+SOC_VCC

12A

D D

T194T194

C C

+SOC_VNN +SOC_VCC

R1018

100_0402_1%

VGFX_VSNS[45] VCORE_VSNS[45] VCORE_GSNS[45]

B B

TP2_CORE_VCC_S0iX

14A

R1019

R1019 100_0402_1%

100_0402_1%

R1020

R1020 100_0402_1%

100_0402_1%

+SOC_VNN

USOC1G

AA27

CORE_VCC_S0iX_AA27

AA29

CORE_VCC_S0iX_AA29

AA30

CORE_VCC_S0iX_AA30

AC27

CORE_VCC_S0iX_AC27

AC29

CORE_VCC_S0iX_AC29

AC30

CORE_VCC_S0iX_AC30

AD27

CORE_VCC_S0iX_AD27

AD29

CORE_VCC_S0iX_AD29

AD30

CORE_VCC_S0iX_AD30

AF27

CORE_VCC_S0iX_AF27

AF29

CORE_VCC_S0iX_AF29

AG27

CORE_VCC_S0iX_AG27

AG29

CORE_VCC_S0iX_AG29

AG30

CORE_VCC_S0iX_AG30

P26

CORE_VCC_S0iX_P26

P27

CORE_VCC_S0iX_P27

U27

CORE_VCC_S0iX_U27

U29

CORE_VCC_S0iX_U29

V27

CORE_VCC_S0iX_V27

V29

CORE_VCC_S0iX_V29

V30

CORE_VCC_S0iX_V30

Y27

CORE_VCC_S0iX_Y27

Y29

CORE_VCC_S0iX_Y29

Y30

CORE_VCC_S0iX_Y30

AA22

TP2_CORE_VCC_S0iX

AM22

UNCORE_VNN_S3_AM22

AK32

UNCORE_VNN_S3_AK32

AK30

UNCORE_VNN_S3_AK30

AK29

UNCORE_VNN_S3_AK29

AK27

UNCORE_VNN_S3_AK27

AK25

UNCORE_VNN_S3_AK25

AK24

UNCORE_VNN_S3_AK24

AK22

UNCORE_VNN_S3_AK22

AJ24

UNCORE_VNN_S3_AJ24

AJ22

UNCORE_VNN_S3_AJ22

AG24

UNCORE_VNN_S3_AG24

AG22

UNCORE_VNN_S3_AG22

AF24

UNCORE_VNN_S3_AF24

AF22

UNCORE_VNN_S3_AF22

AD22

UNCORE_VNN_S3_AD22

AC24

UNCORE_VNN_S3_AC24

AC22

UNCORE_VNN_S3_AC22

AA24

UNCORE_VNN_S3_AA24

AD24

UNCORE_VNN_S3_AD24

BB8

UNCORE_VNN_SENSE

P28

CORE_VCC_SENSE_P28

N28

CORE_VSS_SENSE_N28

FH8065301546401_FCBGA131170

DRAM_VDD_S4_AD38

DRAM_VDD_S4_AF38

DRAM_VDD_S4_A48

DRAM_VDD_S4_AK38

DRAM_VDD_S4_AM38

DRAM_VDD_S4_AV41 DRAM_VDD_S4_AV42

DRAM_VDD_S4_BB46 DRAM_VDD_S4_BD49 DRAM_VDD_S4_BD52 DRAM_VDD_S4_BD53

DRAM_VDD_S4_BF44 DRAM_VDD_S4_BG51

DRAM_VDD_S4_BJ48

DRAM_VDD_S4_C51 DRAM_VDD_S4_D44 DRAM_VDD_S4_F49 DRAM_VDD_S4_F52 DRAM_VDD_S4_F53

DRAM_VDD_S4_H46 DRAM_VDD_S4_M41 DRAM_VDD_S4_M42

DRAM_VDD_S4_V38

DRAM_VDD_S4_Y38

ICLK_ V1P35_S 3_F2_A G18

ICLK_ V1P35_S 3_F1_A J19

VGA_V1P35_S3_F1_ BD1

DRAM_V1P35_S0iX_F1_AD36

UNCORE_V1P35_S0iX_F2_AG32

UNCORE_V1P35_S0iX_F3_V36 UNCORE_V1P35_S0iX_F4_U36

UNCORE_V1P35_S0iX_F5_AA25

UNCORE_V1P35_S0iX_F6_AF19

UNCORE_V1P35_S0iX_F1_AG19

7 OF 13

AD38 AF38

A48 AK38 AM38 AV41 AV42 BB46 BD49 BD52 BD53 BF44 BG51 BJ48 C51 D44 F49 F52 F53 H46 M41 M42 V38 Y38

AG18 AJ19

BD1

AD36

AG32 V36 U36

AA25

AF19 AG19

!"#$%

DRAM_VDD_S4_CLK

1250mA

+1.35V_SOC

VGA_V1P35_S3_F1

1 2

R1017 BLM15AX601SN1DEMI@R1017 BLM15AX601SN1DEMI@

1 2

C1017 1U_0402_6.3V6KC1017 1U_0402_6.3V6K

1 2

C1018 .1U_0402_16V7KC1018 .1U_0402_16V7K

+1.35V_SOC

1 2 1 2

12 12 12 12

C1019 2.2U_0402_6.3V6MC1019 2.2U_0402_6.3V6M C1020 2.2U_0402_6.3V6MC1020 2.2U_0402_6.3V6M C1021 2.2U_0402_6.3V6MC1021 2.2U_0402_6.3V6M C1022 2.2U_0402_6.3V6MC1022 2.2U_0402_6.3V6M

C1147 10U_0603_6.3V6MC1147 10U_0603_6.3V6M C1148 10U_0603_6.3V6MC1148 10U_0603_6.3V6M

420mA

1 2

L49 BLM15AG601SN1D_2PL49 BLM15AG601SN1D_2P

1 2

C1023 10U_0603_6.3V6MC1023 10U_0603_6.3V6M

1 2

C1182 10U_0603_6.3V6MC1182 10U_0603_6.3V6M

1 2

C1024 10U_0603_6.3V6MC1024 10U_0603_6.3V6M

1 2

C1025 1U_0402_6.3V6KC1025 1U_0402_6.3V6K

1 2

C1026 1U_0402_6.3V6KC1026 1U_0402_6.3V6K

1 2

C1027 1U_0402_6.3V6KC1027 1U_0402_6.3V6K

1 2

C1028 1U_0402_6.3V6KC1028 1U_0402_6.3V6K

1 2

C1029 1U_0402_6.3V6KC1029 1U_0402_6.3V6K

1 2

C1030 1U_0402_6.3V6KC1030 1U_0402_6.3V6K

1 2

C1031 1U_0402_6.3V6KC1031 1U_0402_6.3V6K

1 2

C1032 1U_0402_6.3V6KC1032 1U_0402_6.3V6K

1 2

C1033 1U_0402_6.3V6KC1033 1U_0402_6.3V6K

For EVT measurement

JP3

JUMP_43X118

JP4

JUMP_43X118

+1.35VS

0708:Change Size 1226:CHange P/N to 1 ohm

0705 : For CRT Flicker

+1.35V

JP@JP3

JP@

JP@JP4

JP@

@EMI@

@EMI@L50

@EMI@

L50

C1089

1U_0402_6.3V6K

MPZ2012S101AT000_2P

0715 Add for CRT fliker

VGA_V1P35_S3_F1

R1084

8.06K_0402_1%

R1085

100K_0402_1%

SUSP#[33,34,41,43]

VOUT = 1.25 (1 + R1/R2).

@EMI@

C1090

1U_0402_6.3V6K

@EMI@L51

@EMI@

L51

MPZ2012S101AT000_2P

U65

@U65

OUT

GND

SHDN

BYP

G916T1UF_SOT23-5

R1087

R1087 36K_0402_5%

36K_0402_5%

+3VALW

C1181 .1U_0402_1 6V7K

.1U_0402_1 6V7K

C1179

C1179 1U_0402_6.3V6K

1U_0402_6.3V6K

@C1181

A A

Security Classificati on

2013/04/12 2014/04/12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/04/12 2014/04/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Documen t Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

VLV-M SOC Power

Intel BayTrail-M Platform

10 47Tuesday, February 18, 2014

0.1

D D

+1.0VALW

UNCORE_V1P0_G3 1uF*4

USB3_V1P0_G3 0.01uF*1

+1.0VS

DRAM_V1P0_S0iX 1uF*4

C C

B B

DDI_V1P0_S0iX 1uF*4

UNCORE_V1P0_S0iX 10uF*3 1uF*2

PCIE_SATA_V1P0_S3 1uF*1 UNCORE_V1P0_S3 1uF*1 PCIE_V1P0_S3 1uF*1 VGA_V1P0_S3 1uF*1 USB_V1P0_S3 0.1uF*1 USB3DEV_V1P0_S3 0.01uF*1 GPIO_V1P0_S3 1uF*1 SVID_V1P0_S3 1uF*1

1 2

C1034 1U_0402_6.3V6KC1034 1U_0402_6.3V6K

1 2

C1035 1U_0402_6.3V6KC1035 1U_0402_6.3V6K

1 2

C1036 1U_0402_6.3V6KC1036 1U_0402_6.3V6K

1 2

C1037 1U_0402_6.3V6KC1037 1U_0402_6.3V6K

1 2

C1039 0.01U_0402_16V7KC1039 0.01U_0402_16V7K

1 2

C1043 1U_0402_6.3V6KC1043 1U_0402_6.3V6K

1 2

C1044 1U_0402_6.3V6KC1044 1U_0402_6.3V6K

1 2

C1046 1U_0402_6.3V6KC1046 1U_0402_6.3V6K

1 2

C1047 1U_0402_6.3V6KC1047 1U_0402_6.3V6K

1 2

C1048 1U_0402_6.3V6KC1048 1U_0402_6.3V6K

1 2

C1049 1U_0402_6.3V6KC1049 1U_0402_6.3V6K

1 2

C1050 1U_0402_6.3V6KC1050 1U_0402_6.3V6K

1 2

C1052 1U_0402_6.3V6KC1052 1U_0402_6.3V6K

1 2

C1056 10U_0603_6.3V6MC1056 10U_0603_6.3V6M

1 2

C1057 10U_0603_6.3V6MC1057 10U_0603_6.3V6M

1 2

C1059 10U_0603_6.3V6MC1059 10U_0603_6.3V6M

1 2

C1060 1U_0402_6.3V6KC1060 1U_0402_6.3V6K

1 2

C1061 1U_0402_6.3V6KC1061 1U_0402_6.3V6K

1 2

C1062 1U_0402_6.3V6KC1062 1U_0402_6.3V6K

1 2

C1064 1U_0402_6.3V6KC1064 1U_0402_6.3V6K

1 2

C1066 1U_0402_6.3V6KC1066 1U_0402_6.3V6K

1 2

C1068 1U_0402_6.3V6KC1068 1U_0402_6.3V6K

1 2

C1069 .1U_0402_16V7KC1069 .1U_0402_16V7K

1 2

C1070 0.01U_0402_16V7KC1070 0.01U_0402_16V7K

1 2

C1071 1U_0402_6.3V6KC1071 1U_0402_6.3V6K

1 2

C1072 1U_0402_6.3V6KC1072 1U_0402_6.3V6K

1 2

C1081 .1U_0402_16V7K@ESD@ C1081 .1U_0402_16V7K@ESD@

1 2

C1082 .1U_0402_16V7K@ESD@ C1082 .1U_0402_16V7K@ESD@

T195T195

TP_CORE_V1P05_S4

USOC1H

U22

UNCORE_V1P0_G3_U22

V22

UNCORE_V1P0_G3_V22

UNCORE_V1P0_G3_C5

UNCORE_V1P0_G3_B6

Y19

USB3_V1P0_G3_Y19

USB3_V1P0_G3_C3

V32

SVID_V1P0_S3_V32

BJ6

VGA_V1P0_S3_BJ6

AD35

DRAM_V1P0_S0iX_AD35

AF35

DRAM_V1P0_S0iX_AF35

AF36

DRAM_V1P0_S0iX_AF36

AA36

DRAM_V1P0_S0iX_AA36

AJ36

DRAM_V1P0_S0iX_AJ36

AK35

DRAM_V1P0_S0iX_AK35

AK36

DRAM_V1P0_S0iX_AK36

Y35

DRAM_V1P0_S0iX_Y35

Y36

DRAM_V1P0_S0iX_Y36

AK19

DDI_V1P0_S0iX_AK19

AK21

DDI_V1P0_S0iX_AK21

AJ18

DDI_V1P0_S0iX_AJ18

AM16

DDI_V1P0_S0iX_AM16

AN29

VIS_V1P0_S0iX_AN29

AN30

VIS_V1P0_S0iX_AN30

V24

VIS_V1P0_S0iX_V24

Y22

VIS_V1P0_S0iX_Y22

Y24

VIS_V1P0_S0iX_Y24

AF16

UNCORE_V1P0_S3_AF16

AF18

UNCORE_V1P0_S3_AF18

Y18

UNCORE_V1P0_S3_Y18

UNCORE_V1P0_S3_G1

AK18

PCIE_V1P0_S3_AK18

AM18

PCIE_V1P0_S3_AM18

AM21

PCIE_V1P0_S3_AM21

AN21

PCIE_V1P0_S3_AN21

AN18

PCIE_SATA_V1P0_S3_AN1 8

AN19

SATA_V1P0_S3_AN1 9

AF21

UNCORE_V1P0_S0iX_AF21

AG21

UNCORE_V1P0_S0iX_AG21

M14

USB_V1P0_S3_M14

U18

USB_V1P0_S3_U18

U19

USB_V1P0_S3_U19

AN25

GPIO_V1P0_S3_AN25

RESERVED_F1

AF30

TP_CORE_V1P05_S4_AF30

FH8065301546401_FCBGA131170

325mA

2750mA

1000mA

CORE_V1P0_S3_AC32

CORE_V1P0_S3_Y32

CORE_V1P05_S3_AA33

CORE_V1P05_S3_AF33 CORE_V1P05_S3_AG33 CORE_V1P05_S3_AG35

CORE_V1P05_S3_U33 CORE_V1P05_S3_U35

CORE_V1P05_S3_V33

UNCORE_V1P8_G3_U24

PCU_V1P8_G3_V2 5 USB_V1P8_G3_N20

65mA

PMU_V1P8_G3_U25

UNCORE_V1P8_G3_AA18

10mA

UNCORE_V1P8_S3_AM30 UNCORE_V1P8_S3_AN32

UNCORE_V1P8_S3_U38

58mA

HDA_V1P5_S3_AM32

PCU_V3P3_G3_N 22

50mA

USB_V3P3_G3_N18 USB_V3P3_G3_P18

33mA

VGA_V3P3_S3_AN24

SD3_V1P8V3P3_S3_ AN27

LPC_V1P8V3P3_S3_AM27

35mA

USB_HSIC_V1P2_G3_V18

VSS_AD16 VSS_AD18

8 OF 13

Follow CRBv1.15

AC32

+1.05VS_SOC

Y32

AA33 AF33 AG33 AG35 U33 U35 V33

U24 V25 N20 U25 AA18

AM30 AN32 U38

AM32

N22

+3VALW_SOC

N18 P18

AN24

+3VS_SOC

AN27

AM27

V18

AD16 AD18

R1023 0_0603_5%RS@R1023 0_0603_5%RS@

1 2

R1021 0_0402_5%RS@R1021 0_0402_5%RS@

1 2

C1038 0.47U_0402_6.3V6KC1038 0.47U_0402_6.3V6K

1 2

C1040 1U_0402_6.3V6KC1040 1U_0402_6.3V6K

1 2

C1041 1U_0402_6.3V6KC1041 1U_0402_6.3V6K

1 2

C1042 1U_0402_6.3V6KC1042 1U_0402_6.3V6K

1 2

C1045 1U_0402_6.3V6KC1045 1U_0402_6.3V6K

1 2

C1051 1U_0402_6.3V6KC1051 1U_0402_6.3V6K

1 2

C1053 1U_0402_6.3V6KC1053 1U_0402_6.3V6K

1 2

C1054 1U_0402_6.3V6KC1054 1U_0402_6.3V6K

1 2

C1055 1U_0402_6.3V6KC1055 1U_0402_6.3V6K

1 2

C1058 1U_0402_6.3V6KC1058 1U_0402_6.3V6K

1 2

R1022 0_0603_5%RS@R1022 0_0603_5%RS@

1 2

C1063 .1U_0402_16V7KC1063 .1U_0402_16V7K

1 2

C1065 1U_0402_6.3V6KC1065 1U_0402_6.3V6K

1 2

C1067 1U_0402_6.3V6KC1067 1U_0402_6.3V6K

1 2

C1073 1U_0402_6.3V6KC1073 1U_0402_6.3V6K

1 2

C1074 1U_0402_6.3V6K

Pop when use +1.2VALW

For EVT measurement

+1.05VS

+1.8VALW

+1.8VS

+1.5VS

+3VALW

+3VS

.1U_0402_1 6V7K

.1U_0402_1 6V7K C1093

C1093

+1.0VALW

CORE_V1P05_S3 1uF*3

PMC_V1P8_G3 1uF*1

UNCORE_V1P8_S3 1uF*4

HDA_LPE_V1P5V1P8_S3 1uF*1

USB_V3P3_G3 0.1uF*1 USB_ULPI_V1P8_S3 1uF*1 PCU_V3P3_G3 1uF*1

&'(

VGA_V3P3_S3 1uF*1

USB_HSIC_V1P2_G3 1uF*1

Disable HSIC If the USB HSIC is not used, pin V18 can be connected to either +V1P2A or +V1P0A.

A A

Security Classificati on

2013/04/12 2014/04/12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/04/12 2014/04/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Documen t Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

VLV-M SOC Power

Intel BayTrail-M Platform

11 47Tuesday, February 18, 2014

0.2

+ 25 hidden pages

Compal LA-D101P Schematics Rev1.0

Specifications and Main Features

Frequently Asked Questions

User Manual