Compal LA-D071P Schematics

A

COMPAL CONFIDENTIAL

B

C

D

E

1 1

MODEL NAME : AAL15

SKL-U+MEC1404 VC board

PCB NO : DA800140000
BOM P/N :

GPIO MAP:

ZZZ

DAZ1GG00100

PCB@

PCB AAL15 LA- D071P LS- D071P/D 072P/D07 3P

(LS-D071P/D072P/D073P/B844P/B845P/B915P)

2 2

3 3

ZZZ

PCB 1G9 LA- D071P REV0 M/B 4

UC1

i7-R1

FJ806620193 0408 SR2EZ D1 2.5G BGA

UC1

i5-R1

FJ806620193 0409 SR2EY D1 2.3G BGA

UC1

i3-R1

FJ806620193 1104 SR2EU D1 2.3G BGA

UC1

i5(2+3e)

ES0

FJ806620193 0823 QJ57 J0 1.6G

PCB

DA800140 000

MB@

CPU R1

SA000092P2L

i7SKL2.5GR1@

SA000092O2L

i5SKL2.3GR1@

SA000092N3L

i3SKL2.3GR1@

SA00008Y40L

SKL1.6G23@

PCB

UC1

i7-R3

FJ806620193 0408 SR2EZ D1 2.5G A31!

UC1

i5-R3

FJ806620193 0409 SR2EY D1 2.3G A31!

UC1

i3-R3

FJ806620193 1104 SR2EU D1 2.3G A31!

SA000092P3L

i7SKL2.5GR1@

SA000092O3L

i5SKL2.3GR3@

SA000092N4L

i3SKL2.3GR3@

CPU R3

@ : Nopop Component
i3SKL2.3GR1@/i5SKL2.3GR1@/i7SKL2.5GR1@/SKL1.6G23R1@:CPU R1
i3SKL2.3GR3@/i5SKL2.3GR3@/i7SKL2.5GR3@/SKL1.6G23R3@:CPU R3
UMA@/DIS@ : UMA & DIS Type
DSX@/N_DSX@: DSX Mode
EMI@/ESD@/HDMI@EMI@/RF@ : EMI, ESD and RF Component
@EMI@/@ESD@/@RF@ : EMI, ESD and RF Nopop Component
CMC@ : XDP Component
CONN@ : Connector Component
100@/1000@/LAN_SW@ : LAN type
3234@/3246@ : CODEC type
CRT@/HDMI@ : CRT/HDMI
TP_WAKE@/NOTP_WAKE@ : TouchPad wake
ODD@/NOZPODD@/ZPODD@ : ODD and Zero Power

EXOR1@/MESOR1@ : GPU R1

2015-07-09

REV : 1.0 (A00)

EXOR3@/MESOR3@ : GPU R3
EXO@/MESO@ : GPU relative component
2G_H@/2G_S@/2G_M@/4G_H@/4G_S@/4G_M@ : VRAM type

Layout Dell logo

V_4G@ : 4G VRAM Support component

4 4

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

LA-D071P

LA-D071P

LA-D071P

1 64Thursday, July 09, 2015

1 64Thursday, July 09, 2015

1 64Thursday, July 09, 2015

E

1.0(A00)

1.0(A00)

1.0(A00)

COPYRIGHT 2014
ALL RIGHT RESERVED
REV: X00
PWB: 9HTP8

Title

Title

PROPRIETARY NO TE: THIS SHEET OF ENGINEERING DRAWING AND SPECIF ICATIONS CONTAINS CONFID ENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

A

B

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

D

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

A

B

C

D

E

Tulip2_VC 14 Block Diagram

Memory BUS (DDR3L)

1 1

DIS only

1333/1600MHz

DDR3L-SO-DIMM X2

BANK 0, 1, 2, 3

P.20~P.21

USB2.0[1]

VRAM(DDR3L) *8

1GB, 2GB (Reserve 4GB)

P.61~P.62

Thermal
W83L771AWG-2

2 2

eDP CONN

P.32

DDR3L

USB2.0[5]

USB2.0[7]

SMBUS

GPU

AMD
Meso/Exo

P.56~P.60

eDP Lane x 2

HDMI 1.4a
VGA/RTD2168-CGT

P.33~P.34

PCIE x 4

INTEL

USB

SKYLAKE_U

DDI[1]

USB2.0[8]

RTS5170-GR

I2C

P.6~P.19

HD Audio I/F

HDA CODEC
ALC3234-CG

PCIE[9] PCIE[5]

Touch PAD

3 3

P.38

LPC

LPC
debug
port

P.29

P.29

SMBUS

Thermal
NCT7718

Fan controller
APL5606AKI

LAN
RTL8106E-CG /
RTL8111G-CG

Transformer

P.25 P.36

P.26

RJ45

P.26

NGFF WLAN+BT

AC 3160

USB2.0[6]

PS2

KBC
MEC1404

SATA(Gen3) x 1

SATA(Gen1) x 1

SPI

W25R128FVSIQ
16MB

P.38

P.38

HDD

ODD

Fan CONN

P.38

P.35

P.35

P.8

P.23

USB3.0[1]

USB2.0[2]

USB2.0[3]

USB2.0[5]

USB2.0[6]

USB2.0[7]

P.27

Speaker

Universal Jack

Dig. MIC

USB1(USB3.0)

Debug,IOB

IOB

CCD

BT

Touch Screen

SD CARDCard reader

P.24

P.24

P.24

P.30

P.30,P.39

P.30,P.39

P.32

P.36

P.32

P.28

KB

4 4

KB-BL

www.schematic-x.blogspot.com

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

B

C

P.38

P.38

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Numb er Rev

Size Document Numb er Rev

Size Document Numb er Rev

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Block dia gram

Block dia gram

Block dia gram

LA-D071P

LA-D071P

LA-D071P

2 64Thur sda y, J uly 09 , 201 5

2 64Thur sda y, J uly 09 , 201 5

2 64Thur sda y, J uly 09 , 201 5

E

1.0(A00)

1.0(A00)

1.0(A00)

of

of

of

POWER STATES

5

SLP
S3#

HIGH

SLP

SLP

S5#

S4#

HIGH HIGH

LOW

LOW

Signal

State

S0 (Full ON) / M0

S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON

S4 (Suspend to DISK) / M3 ONLOW HIGH

S5 (SOFT OFF) / M3 ONLOW LOW

D D

PM TABLE

+1.0V_PRIM

+RTC_CELL

+1.8V_EDRAM

power

+1.8V_PRIM

plane

+5VALWP

+3VALWP

+5VALW

State

S0

S3

S5 S4/AC

S5 S4/AC doesn't exist

C C

+3VALW

+1.0V_MPHYGT

+1.0V_PRIM_CORE

+3.3V_ALW_DSW

ON

ON

4

ALWAYS

SUS

PLANE

PLANE

ON

ON

ON

OFF

OFF OFF

+3VALW_PCH

+1.0V_VCCST

ON ON

ON

OFF

OFFOFF

RUN
PLANE

ON ON

OFF

OFF

OFF

+1.35V_MEM

+1.0V_VCCSTG

+VCC_CORE

+VCC_GT

+1.0VS_VCCIO

+VCC_SA

+VCC_EDRAM

+VCC_EOPIO

OFFON

OFF

OFF

CLOCKS

OFF

OFF

3

USB3.0

USB3.0-1

USB3.0-2

USB3.0-3

USB3.0-4

USB3.0-5

USB3.0-6

SSIC

SSIC-1

SSIC-2

PCIE

PCIE-1

PCIE-2

PCIE-3

PCIE-4

PCIE-5

PCIE-6

PCIE-7

PCIE-8

PCIE-9

PCIE-10

PCIE-11

PCIE-12

SATA

SATA-0

SATA-1

SATA-1*

SATA-2

2

USB3.0 Port1

N/A

N/A

N/A

GPU

GPU

GPU

GPU

WLAN

LAN/GLAN

SATA HDD

SATA ODD

N/A

N/A

N/A

N/A

1

USB PORT#DESTINATION

DESTINATION

1

USB3.0 Port1

2

3

4

5

6

7

8

9

10

IO/DB

IO/DB

N/A

CCD

Card Reader

Touch Screen

BT

N/A

N/A

Board ID & Model ID table

Pull-downItem Pull-up Voltage

1

100

2

3

4

5

6

7

8

9

10

11

12

13

14

B B

15

16

17

18

19

10.0

100

13.7

100

17.8

100

22.1

100

27.0

100

32.4

100

37.4

100

49.9

100

57.6

100

64.9

100

73.2

100

82.5

100

93.1

100

107.0

100

120.0

100

137.0

100

154.0

100

200.0

100

232.0

3.000

2.902

2.801

2.703

2.598

2.492

2.402

2.201

2.094

2.001

1.905

1.808

1.709

1.594

1.500

1.392

1.299

1.100

0.994

Board ID/Model ID

Pre-EVT

EVT

DVT1

DVT2

A A

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND O THER PRO PRIETARY INFORMA TION O F DEL L INC . ("DEL L") THIS DO CUMENT MA Y NO T
BE TRANSFERRED OR COPIED WITHOUT THE EXP RESS WRITTEN AUTHORIZA TION OF DEL L. IN A DDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

5

4

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Port assignment

Port assignment

Port assignment

LA-D071P

LA-D071P

LA-D071P

1

3 64Thurs day , Ju ly 09, 201 5

3 64Thurs day , Ju ly 09, 201 5

3 64Thurs day , Ju ly 09, 201 5

1.0(A00)

1.0(A00)

1.0(A00)

5

CPU PWR

GPU PWR

Peripheral Device PWR

RT8207PGQW
(PU200)

ADAPTER

D D

SYX196DQNC
(PU301)

CHARGER
ISL95520HRZ
(PU703)

+PWR_SRC

4

SIO_SLP_S4#

0.675V_DDR_VTT_ON

@+1.0V_PRIM_CORE_PG
@SIO_SLP_SUS#

POK

+1.35VP +1.35V_MEM

+0.675VSP

PJP202

PJP203

+1VALWP

+0.675V_DDR_VTT

+1.0V_PRIM

3

PJP302

EM5209VF
(U5602)

DGPU_PWROK

TPS22961
(UZ19)

TPS22961
(UZ20)

TPS22967
(UZ21)

0ohm 0805
(RC194)

EM5209VF
(U15)

2

J13PJP200

+1.35V_MEM_GFX

SIO_SLP_S3#

&

SIO_SLP_S0#

MPHYP_ PWR_ EN

SIO_SLP_S4#

Volume

DGPU_PWR_EN

+1.0V_VCCSTG_C

+1.0V_MPHYGT

+1.0V_VCCST_C

+1.0V_PRIM_CORE

J11

+0.95VSDGPU

+1.0VS_VCCIO

Volume

+1.0V_VCCSTG

PJP27

+1.0V_VCCST

1

PJP15

PJP32

BATTERY

C C

ISL95857HRTZ
(PU602)

ISL95808HRZ
(PU606)

B B

IMVP_VR_ON

+VCC_SA

A A

AOZ50 19 QI
(PU603)

+5VS

+VCC_CORE

ISL62771HRTZ
(PU1100)

+VGA_CORE

DGPU_PWR_EN

AOZ50 19 QI
(PU604)

AOZ50 19 QI
(PU605)

+VCC_GT

U23@

+5VS

SY8286CRAC
(PU102)

SY8286BRAC
(PU100)

ALWON

ALWON

PJP102

+3VALW

+3VLP

+RTC_VCC

PJP103

+5VALW

VL

BAS40C
(D2501)

+RTC_CELL

AP22802BW5
(U3504)

AP22802BW5
(U3505)

EM5209VF
(UZ2)

TPS22967DSGR
(UX1)

EM5209VF
(UZ2)

PJP23

(NON-DS3)

SY6288C10CAC
(UZ3)

TPS62134ARGT
(PU401)

TPS62134ARGT
(PU402)

TPS62134CRGT
(PU1200)

TPS62134CRGT
(PU1201)

TPS62134ARGT
(PU501)

U23@

U23@

USB_E N#

USB_E N#

SIO_SLP_S3#

3D_CAM_EN

SIO_SLP_S3#

PCH_ALW_ON

PJP22

(DS3)

SIO_SLP_S3#

Premium

@SIO_SLP_SUS#

POK

Premium

(DS3)
(NON-DS3)

SIO_SLP_S3#

SIO_SLP_S3#

@SIO_SLP_SUS#

POK

(DS3)
(NON-DS3)

USB30_VCCC

USB20_VCCA

PJP21

+5VS

J14

+5V_CAM

PJP13

+3VS

PJP23

+3VALW_PCH

PJP401

+1.0VS_VCCIO

PJP402

+1.0V_PRIM_CORE

PJP1200

+VCC_EDRAM

PJP1201

+VCC_EOPIO

+1.8VALWP +1.8V_PRIM

0ohm 0805
(R5601)

0ohm 0805
(R5603)

TPS2001CDGNR
(U5601)

RB551V-30
(D5501)

FUSE 0.5A_13.2V
(F6201)

RT9724GB
(U5201)

0ohm 0805
(R5809)

EM5209VF
(U5602)

PJP502

EDP_VDD_EN

LCD_TST

DGPU_PWR_EN

EM5209VF
(U15)

5V_HDD_S0

ODD_PWR_5V

SATA_ODD_PWRGT

FUSE 1.1A_6V
(F5501)

+5V_KB_BL

or

LCDVDD_EN

LCDVDD

+3.3V_WLAN

+3VGS

DGPU_PWR_EN

5V_HDMI_CRT_S0_R

J12

J10

+1.8VGS

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Power ra ils

Power ra ils

Power ra ils

LA-D071P

LA-D071P

LA-D071P

4 64Thur sda y, J uly 09 , 201 5

4 64Thur sda y, J uly 09 , 201 5

4 64Thur sda y, J uly 09 , 201 5

1

1.0(A00)

1.0(A00)

1.0(A00)

5

R7

SMBCLK

R8

SMBDATA

D D

SKL-U

R9

W2

SML0_SMBCLK

SML0_SMBDATA

1k ohm

1k ohm

W3

SML1CLK

V3

SML1DATA

DMN66D DMN66D

U6 U7

C C

@

2.2k ohm

+3VALW_EC

12 11

SMB02_CLK

B B

KBC

@

2.2k ohm

GPU_THM_SMBCLK

GPU_THM_SMBDAT

SMB02_DATA

I2C_SCL_TP

I2C_SDA_TP

MEC 1404

GPIO114

GPIO115

SMB01_CLK

SMB01_DATA

A A

78

79

9

8

CLK_TP_SIO

DAT_TP_SIO

PBAT_C HG_SMBCLK

PBAT_C HG_SMBDAT

4

1k ohm

1k ohm

1k ohm

1k ohm

+3VALW_PCH

4.7k ohm

4.7k ohm

I2C_SCL_TP

I2C_SDA_TP

4.7k ohm

4.7k ohm

4.7k ohm

4.7k ohm

+3VALW_PCH

DMN66D

+3VALW_PCH

GPU_THM_SMBCLK

GPU_THM_SMBDAT

GPU_THM_SMBCLK

GPU_THM_SMBDAT

TP_VDD

2N7002

TP_VDD

+3VALW_EC

100 ohm

100 ohm

0 ohm

0 ohm

CLK_SMB

DAT_SMB

2N7002

6

5

3

4

PCH_SMBCLK

PCH_SMBDAT

BATT
CONN

Charger

2.2k ohm

2.2k ohm

I2C_SCL_TP_Q

I2C_SDA_TP_Q

CLK_TP_SIO

DAT_TP_SIO

3

DIS@

45.3k ohm

DIS@

45.3k ohm

VGA_SMB_ CK3

VGA_SMB_ DA3

2.2k ohm

2.2k ohm

THM_SML1_CLK

THM_SML1_DATA

+3VS

3

2

8

7

2.2k ohm

2.2k ohm

+3VGS

+3VS

TP CONN

+3VALW_EC

Thermal
(SYSTEM)

MESO@
0 ohm

MESO@
0 ohm

VGA_SMB_ CK3

VGA_SMB_ DA3

VGA_SMB_ CK3_R

VGA_SMB_ DA3_R

2

PCH_SMBCLK

PCH_SMBDAT

PCH_SMBCLK

PCH_SMBDAT

PCH_SMBCLK

PCH_SMBDAT

202

200

202

200

2

3

DIMMA

DIMMB

DP to VGA

1

U7

dGPU

U8

3

Thermal

4

(GPU)

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SMbus Block diagram

SMbus Block diagram

SMbus Block diagram

LA-D071P

LA-D071P

LA-D071P

5 64Thur sda y, J uly 09 , 201 5

5 64Thur sda y, J uly 09 , 201 5

5 64Thur sda y, J uly 09 , 201 5

1

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

+3VS

12

RC175 2.2K_0402_5%

RC178 2.2K_0402_5%

D D

RE439

C C

B B

PCH_HDMI_CLK

12

PCH_HDMI_DATA

12

WLAN_RADIO_DIS#

10K_0402_5%

+1.0VS_VCCIO

HDMI_ CRT_N0<33,34>
HDMI_ CRT_P0<33,34>
HDMI_ CRT_N1<33,34>
HDMI_ CRT_P1<33,34>
HDMI_ DATA 0#<33>
HDMI_ DATA 0<33>
HDMI_ CLK #<33>
HDMI_ CLK<33>

PCH_HDMI_CLK<33>

PCH_HDMI_DATA<33>

1 2

RC2 24.9_0402_1%

COMPENSATION PU FOR eDP

CAD Note:Trace width=20 mils ,Spacing=25mil,
Max length=100 mils.

PCH_HDMI_CLK
PCH_HDMI_DATA

EDP_COMP

UC1A

E55

DDI1_TXN[0]

F55

DDI1_TXP[0]

E58

DDI1_TXN[1]

F58

DDI1_TXP[1]

F53

DDI1_TXN[2]

G53

DDI1_TXP[2]

F56

DDI1_TXN[3]

G56

DDI1_TXP[3]

C50

DDI2_TXN[0]

D50

DDI2_TXP[0]

C52

DDI2_TXN[1]

D52

DDI2_TXP[1]

A50

DDI2_TXN[2]

B50

DDI2_TXP[2]

D51

DDI2_TXN[3]

C51

DDI2_TXP[3]

L13

GPP_E 18/ DDPB _CTRLC LK

L12

GPP_E 19/ DDPB _CTRLD ATA

N7

GPP_E 20/ DDPC _CTRLC LK

N8

GPP_E 21/ DDPC _CTRLD ATA

N11

GPP_E 22/ DDPD _CTRLC LK

N12

GPP_E 23/ DDPD _CTRLD ATA

E52

EDP_RCOMP

SKL-U_BGA1356

SKL-U Ballout Rev0.71 & INTEL symbol Rev1.0

UC1I

CSI-2

A36

CSI2_DN0

B36

CSI2_DP0

C38

CSI2_DN1

D38

CSI2_DP1

C36

CSI2_DN2

D36

CSI2_DP2

A38

CSI2_DN3

B38

CSI2_DP3

C31

CSI2_DN4

D31

CSI2_DP4

C33

CSI2_DN5

D33

CSI2_DP5

A31

CSI2_DN6

B31

CSI2_DP6

A33

CSI2_DN7

B33

CSI2_DP7

A29

CSI2_DN8

B29

CSI2_DP8

C28

CSI2_DN9

D28

CSI2_DP9

A27

CSI2_DN10

B27

CSI2_DP10

C27

CSI2_DN11

D27

CSI2_DP11

SKL-U_BGA1356

SKL-U

DDI

DISPLAY SIDEBANDS

SKL_ULT

1 OF 20

EDP

EDP_DISP_UTIL

GPP_E 13/ DDPB _HPD0
GPP_E 14/ DDPC _HPD1
GPP_E 15/ DDPD _HPD2
GPP_E 16/ DDPE _HPD3

GPP_E 17/ EDP_ HPD

EDP_BKLTCTL

CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3

CSI2_COMP

GPP_D 4/F LASHTRI G

EMMC

GPP_F 13/ EMMC_D ATA0
GPP_F 14/ EMMC_D ATA1
GPP_F 15/ EMMC_D ATA2
GPP_F 16/ EMMC_D ATA3
GPP_F 17/ EMMC_D ATA4
GPP_F 18/ EMMC_D ATA5
GPP_F 19/ EMMC_D ATA6
GPP_F 20/ EMMC_D ATA7

GPP_F 21/ EMMC_RC LK

GPP_F 22/ EMMC_C LK

GPP_F 12/ EMMC_C MD

EMMC_RCOMP

9 OF 20

EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]

EDP_AUXN
EDP_AUXP

DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP

EDP_BKLTEN

EDP_VDDEN

C37
D37
C32
D32
C29
D29
B26
A26

E13
B7

AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1

AM2
AM3
AP4

AT1

C47
C46
D46
C45
A45
B45
A47
B47

E45
F45

B52

G50

PCH_DPB_AUXN

F50

PCH_DPB_AUXP

E48

CPU_DP2_AUXN

F48

CPU_DP2_AUXP

G46

CPU_DP3_AUXN

F46

CPU_DP3_AUXP

L9

CPU_HDMI_HPD

L7
L6
N9

CPU_CRT_HPD

L10

R12

L_BKLT_EN_EC

R11
U13

CSI2_COMP
WLAN_RADIO_DIS#

EMMC_RCOMP

RC4 200_0402_1%

1 2

RC3

1 2

EDP_TX0_DN <32>
EDP_TX0_DP <32>
EDP_TX1_DN <32>
EDP_TX1_DP <32>

EDP_AUX_DN <32>
EDP_AUX_DP <32>

PCH_DPB_AUXN <34>
PCH_DPB_AUXP <34>

@

T1

PAD~D

@

T2

PAD~D

1 2

@

RC385

RC386 0_0402_5%

0_0402_5%

SIO_EXT_SMI# <29>

1 2

@

EDP_HPD <32>

L_BKLT_EN_EC <29>
L_BKLT_CTRL <32>
EDP_VDD_EN <32>

100_0402_1%

WLAN_RADIO_DIS# <36>

Jason 6/24

Short Pad

HDMI_ CRT_D ET

Change "SIO_EXT_SMI#"
PU to "+3VALW_PCH" For SW
Reser ve " +3V S" PU
2015/5/19 J ason

HDMI_ CRT_D ET <33,34>

SIO_EXT_SMI#

SIO_EXT_SMI#

CPU_DP2_AUXN

PCH_DPB_AUXN

PCH_DPB_AUXP

CPU_DP2_AUXP

EDP_HPD

HDMI_ CRT_D ET

L_BKLT_EN_EC

+3VALW_PCH

12

RC23910K_0402_5%

+3VS

12

@

RC23610K_0402_5%

12

@

RC179100K_0402_5%

12

RC181100K_0402_5%

12

RC182100K_0402_5%

12

@

RC180100K_0402_5%

12

@

RC1100K_0402_5%

12

@

RC312100K_0402_5%

12

RC390100K_0402_5%

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CPU (1/14)

CPU (1/14)

CPU (1/14)

LA-D071P

LA-D071P

LA-D071P

6 64Thur sda y, J uly 09 , 201 5

6 64Thur sda y, J uly 09 , 201 5

6 64Thur sda y, J uly 09 , 201 5

1

1.0(A00)

1.0(A00)

1.0(A00)

5

DDR3L, Ballout for side by side(Non-Interleave)

4

3

2

1

UC1B

AL71

DDR_A_D0
DDR_A_D1

D D

DDR_A_D[32..47]<20>

DDR_B_D[0..15]<21>

C C

DDR_B_D[32..47]<21>

B B

DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47

DDR0_DQ[0]

AL68

DDR0_DQ[1]

AN68

DDR0_DQ[2]

AN69

DDR0_DQ[3]

AL70

DDR0_DQ[4]

AL69

DDR0_DQ[5]

AN70

DDR0_DQ[6]

AN71

DDR0_DQ[7]

AR70

DDR0_DQ[8]

AR68

DDR0_DQ[9]

AU71

DDR0_DQ[10]

AU68

DDR0_DQ[11]

AR71

DDR0_DQ[12]

AR69

DDR0_DQ[13]

AU70

DDR0_DQ[14]

AU69

DDR0_DQ[15]

BB65

DDR0_DQ[16]/DDR0_DQ[32]

AW65

DDR0_DQ[17]/DDR0_DQ[33]

AW63

DDR0_DQ[18]/DDR0_DQ[34]

AY63

DDR0_DQ[19]/DDR0_DQ[35]

BA65

DDR0_DQ[20]/DDR0_DQ[36]

AY65

DDR0_DQ[21]/DDR0_DQ[37]

BA63

DDR0_DQ[22]/DDR0_DQ[38]

BB63

DDR0_DQ[23]/DDR0_DQ[39]

BA61

DDR0_DQ[24]/DDR0_DQ[40]

AW61

DDR0_DQ[25]/DDR0_DQ[41]

BB59

DDR0_DQ[26]/DDR0_DQ[42]

AW59

DDR0_DQ[27]/DDR0_DQ[43]

BB61

DDR0_DQ[28]/DDR0_DQ[44]

AY61

DDR0_DQ[29]/DDR0_DQ[45]

BA59

DDR0_DQ[30]/DDR0_DQ[46]

AY59

DDR0_DQ[31]/DDR0_DQ[47]

AY39

DDR0_DQ[32]/DDR1_DQ[0]

AW39

DDR0_DQ[33]/DDR1_DQ[1]

AY37

DDR0_DQ[34]/DDR1_DQ[2]

AW37

DDR0_DQ[35]/DDR1_DQ[3]

BB39

DDR0_DQ[36]/DDR1_DQ[4]

BA39

DDR0_DQ[37]/DDR1_DQ[5]

BA37

DDR0_DQ[38]/DDR1_DQ[6]

BB37

DDR0_DQ[39]/DDR1_DQ[7]

AY35

DDR0_DQ[40]/DDR1_DQ[8]

AW35

DDR0_DQ[41]/DDR1_DQ[9]

AY33

DDR0_DQ[42]/DDR1_DQ[10]

AW33

DDR0_DQ[43]/DDR1_DQ[11]

BB35

DDR0_DQ[44]/DDR1_DQ[12]

BA35

DDR0_DQ[45]/DDR1_DQ[13]

BA33

DDR0_DQ[46]/DDR1_DQ[14]

BB33

DDR0_DQ[47]/DDR1_DQ[15]

AY31

DDR0_DQ[48]/DDR1_DQ[32]

AW31

DDR0_DQ[49]/DDR1_DQ[33]

AY29

DDR0_DQ[50]/DDR1_DQ[34]

AW29

DDR0_DQ[51]/DDR1_DQ[35]

BB31

DDR0_DQ[52]/DDR1_DQ[36]

BA31

DDR0_DQ[53]/DDR1_DQ[37]

BA29

DDR0_DQ[54]/DDR1_DQ[38]

BB29

DDR0_DQ[55]/DDR1_DQ[39]

AY27

DDR0_DQ[56]/DDR1_DQ[40]

AW27

DDR0_DQ[57]/DDR1_DQ[41]

AY25

DDR0_DQ[58]/DDR1_DQ[42]

AW25

DDR0_DQ[59]/DDR1_DQ[43]

BB27

DDR0_DQ[60]/DDR1_DQ[44]

BA27

DDR0_DQ[61]/DDR1_DQ[45]

BA25

DDR0_DQ[62]/DDR1_DQ[46]

BB25

DDR0_DQ[63]/DDR1_DQ[47]

SKL-U_BGA1356

SKL-U

DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]

DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]

DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]

DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]

DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]

DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]

DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]

DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]

DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]

DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]

DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]

DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]

DDR CH - A

DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]

DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]

DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]

DDR0_MA[3]
DDR0_MA[4]

DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]

DDR0_ALERT#

DDR0_PAR

DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ

DDR_VTT_CNTL

2 OF 20

AU53

DDR_A_CLK#0

AT53

DDR_A_CLK0

AU55

DDR_A_CLK#1

AT55

DDR_A_CLK1

BA56

DDR_A_CKE0

BB56

DDR_A_CKE1

AW56

DDR_A_CKE2

AY56

DDR_A_CKE3

AU45

DDR_A_CS#0

AU43

DDR_A_CS#1

AT45

DDR_A_ODT0

AT43

DDR_A_ODT1 DDR_B_ODT0

BA51

DDR_A_MA5

BB54

DDR_A_MA9

BA52

DDR_A_MA6

AY52

DDR_A_MA8

AW52

DDR_A_MA7

AY55

DDR_A_BS2

AW54

DDR_A_MA12

BA54

DDR_A_MA11

BA55

DDR_A_MA15

AY54

DDR_A_MA14

AU46

DDR_A_MA13

AU48

DDR_A_CAS#

AT46

DDR_A_WE#

AU50

DDR_A_RAS#

AU52

DDR_A_BS0

AY51

DDR_A_MA2

AT48

DDR_A_BS1

AT50

DDR_A_MA10

BB50

DDR_A_MA1

AY50

DDR_A_MA0

BA50

DDR_A_MA3

BB52

DDR_A_MA4

AM70

DDR_A_DQS#0

AM69

DDR_A_DQS0

AT69

DDR_A_DQS#1

AT70

DDR_A_DQS1

BA64

DDR_A_DQS#4

AY64

DDR_A_DQS4

AY60

DDR_A_DQS#5

BA60

DDR_A_DQS5

BA38

DDR_B_DQS#0

AY38

DDR_B_DQS0

AY34

DDR_B_DQS#1

BA34

DDR_B_DQS1

BA30

DDR_B_DQS#4

AY30

DDR_B_DQS4

AY26

DDR_B_DQS#5

BA26

DDR_B_DQS5

AW50
AT52

DDR_A_PAR

AY67
AY68
BA67

AW67

DDR_VTT_CNTL

DDR_A_CLK#0 <20>
DDR_A_CLK0 <20>
DDR_A_CLK#1 <20>
DDR_A_CLK1 <20>

DDR_A_CKE0 <20>
DDR_A_CKE1 <20>

@

PAD~D

@

PAD~D

DDR_A_CS#0 <20>
DDR_A_CS#1 <20>
DDR_A_ODT0 <20>
DDR_A_ODT1 <20>

DDR_A_MA5 <20>
DDR_A_MA9 <20>
DDR_A_MA6 <20>
DDR_A_MA8 <20>
DDR_A_MA7 <20>
DDR_A_BS2 <20>
DDR_A_MA12 <20>
DDR_A_MA11 <20>
DDR_A_MA15 <20>
DDR_A_MA14 <20>

DDR_A_MA13 <20>
DDR_A_CAS# <20>
DDR_A_WE# <20>
DDR_A_RAS# <20>
DDR_A_BS0 <20>
DDR_A_MA2 <20>
DDR_A_BS1 <20>
DDR_A_MA10 <20>
DDR_A_MA1 <20>
DDR_A_MA0 <20>
DDR_A_MA3 <20>
DDR_A_MA4 <20>

DDR_A_DQS#0 <20>
DDR_A_DQS0 <20>
DDR_A_DQS#1 <20>
DDR_A_DQS1 <20>
DDR_A_DQS#4 <20>
DDR_A_DQS4 <20>
DDR_A_DQS#5 <20>
DDR_A_DQS5 <20>
DDR_B_DQS#0 <21>
DDR_B_DQS0 <21>
DDR_B_DQS#1 <21>
DDR_B_DQS1 <21>
DDR_B_DQS#4 <21>
DDR_B_DQS4 <21>
DDR_B_DQS#5 <21>
DDR_B_DQS5 <21>

DDR0_PAR,DDR0_ ALERT# for DDR4 DDR1_PAR,DDR1_ ALERT# for DDR4

@

T7

PAD~D

+DDR_VREF_CA
+DDR_VREF_A_DQ
+DDR_VREF_B_DQ

DDR_A_D[16..31]<20>DDR_A_D[0..15]<20>

T3
T4

DDR_A_D[48..63]<20>

DDR_B_D[16..31]<21>

DDR_B_D[48..63]<21>

DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

UC1C

AF65

DDR1_DQ[0]/DDR0_DQ[16]

AF64

DDR1_DQ[1]/DDR0_DQ[17]

AK65

DDR1_DQ[2]/DDR0_DQ[18]

AK64

DDR1_DQ[3]/DDR0_DQ[19]

AF66

DDR1_DQ[4]/DDR0_DQ[20]

AF67

DDR1_DQ[5]/DDR0_DQ[21]

AK67

DDR1_DQ[6]/DDR0_DQ[22]

AK66

DDR1_DQ[7]/DDR0_DQ[23]

AF70

DDR1_DQ[8]/DDR0_DQ[24]

AF68

DDR1_DQ[9]/DDR0_DQ[25]

AH71

DDR1_DQ[10]/DDR0_DQ[26]

AH68

DDR1_DQ[11]/DDR0_DQ[27]

AF71

DDR1_DQ[12]/DDR0_DQ[28]

AF69

DDR1_DQ[13]/DDR0_DQ[29]

AH70

DDR1_DQ[14]/DDR0_DQ[30]

AH69

DDR1_DQ[15]/DDR0_DQ[31]

AT66

DDR1_DQ[16]/DDR0_DQ[48]

AU66

DDR1_DQ[17]/DDR0_DQ[49]

AP65

DDR1_DQ[18]/DDR0_DQ[50]

AN65

DDR1_DQ[19]/DDR0_DQ[51]

AN66

DDR1_DQ[20]/DDR0_DQ[52]

AP66

DDR1_DQ[21]/DDR0_DQ[53]

AT65

DDR1_DQ[22]/DDR0_DQ[54]

AU65

DDR1_DQ[23]/DDR0_DQ[55]

AT61

DDR1_DQ[24]/DDR0_DQ[56]

AU61

DDR1_DQ[25]/DDR0_DQ[57]

AP60

DDR1_DQ[26]/DDR0_DQ[58]

AN60

DDR1_DQ[27]/DDR0_DQ[59]

AN61

DDR1_DQ[28]/DDR0_DQ[60]

AP61

DDR1_DQ[29]/DDR0_DQ[61]

AT60

DDR1_DQ[30]/DDR0_DQ[62]

AU60

DDR1_DQ[31]/DDR0_DQ[63]

AU40

DDR1_DQ[32]/DDR1_DQ[16]

AT40

DDR1_DQ[33]/DDR1_DQ[17]

AT37

DDR1_DQ[34]/DDR1_DQ[18]

AU37

DDR1_DQ[35]/DDR1_DQ[19]

AR40

DDR1_DQ[36]/DDR1_DQ[20]

AP40

DDR1_DQ[37]/DDR1_DQ[21]

AP37

DDR1_DQ[38]/DDR1_DQ[22]

AR37

DDR1_DQ[39]/DDR1_DQ[23]

AT33

DDR1_DQ[40]/DDR1_DQ[24]

AU33

DDR1_DQ[41]/DDR1_DQ[25]

AU30

DDR1_DQ[42]/DDR1_DQ[26]

AT30

DDR1_DQ[43]/DDR1_DQ[27]

AR33

DDR1_DQ[44]/DDR1_DQ[28]

AP33

DDR1_DQ[45]/DDR1_DQ[29]

AR30

DDR1_DQ[46]/DDR1_DQ[30]

AP30

DDR1_DQ[47]/DDR1_DQ[31]

AU27

DDR1_DQ[48]

AT27

DDR1_DQ[49]

AT25

DDR1_DQ[50]

AU25

DDR1_DQ[51]

AP27

DDR1_DQ[52]

AN27

DDR1_DQ[53]

AN25

DDR1_DQ[54]

AP25

DDR1_DQ[55]

AT22

DDR1_DQ[56]

AU22

DDR1_DQ[57]

AU21

DDR1_DQ[58]

AT21

DDR1_DQ[59]

AN22

DDR1_DQ[60]

AP22

DDR1_DQ[61]

AP21

DDR1_DQ[62]

AN21

DDR1_DQ[63]

SKL-U_BGA1356

SKL-U

DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]

DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]

DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]

DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]

DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]

DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]

DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]

DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]

DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]

DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]

DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]

DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]

DDR CH - B

DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]

DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]

DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_ODT[1]

DDR1_MA[3]
DDR1_MA[4]

DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]

DDR1_ALERT#

DDR1_PAR

DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]

3 OF 20

AN45
AN46
AP45
AP46

AN56
AP55
AN55
AP53

BB42
AY42
BA42
AW42

AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52

BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47

AH66
AH65
AG69
AG70
AR66
AR65
AR61
AR60
AT38
AR38
AT32
AR32
AR25
AR27
AR22
AR21

AN43
AP43
AT13
AR18
AT18
AU18

DDR_B_CLK#0
DDR_B_CLK#1
DDR_B_CLK0
DDR_B_CLK1

DDR_B_CKE0
DDR_B_CKE1
DDR_B_CKE2
DDR_B_CKE3

DDR_B_CS#0
DDR_B_CS#1

DDR_B_ODT1

DDR_B_MA5
DDR_B_MA9
DDR_B_MA6
DDR_B_MA8
DDR_B_MA7
DDR_B_BS2
DDR_B_MA12
DDR_B_MA11
DDR_B_MA15
DDR_B_MA14

DDR_B_MA13
DDR_B_CAS#
DDR_B_WE#
DDR_B_RAS#
DDR_B_BS0
DDR_B_MA2
DDR_B_BS1
DDR_B_MA10
DDR_B_MA1
DDR_B_MA0
DDR_B_MA3
DDR_B_MA4

DDR_A_DQS#2
DDR_A_DQS2
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_DQS#7
DDR_A_DQS7
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_DQS#7
DDR_B_DQS7

DDR_B_PAR
DDR_DRAMRST#
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

DDR_B_CLK#0 <21>
DDR_B_CLK#1 <21>
DDR_B_CLK0 <21>
DDR_B_CLK1 <21>

DDR_B_CKE0 <21>
DDR_B_CKE1 <21>

@

T5

PAD~D

@

T6

PAD~D

DDR_B_CS#0 <21>
DDR_B_CS#1 <21>
DDR_B_ODT0 <21>
DDR_B_ODT1 <21>

DDR_B_MA5 <21>
DDR_B_MA9 <21>
DDR_B_MA6 <21>
DDR_B_MA8 <21>
DDR_B_MA7 <21>
DDR_B_BS2 <21>
DDR_B_MA12 <21>
DDR_B_MA11 <21>
DDR_B_MA15 <21>
DDR_B_MA14 <21>

DDR_B_MA13 <21>
DDR_B_CAS# <21>
DDR_B_WE# <21>
DDR_B_RAS# <21>
DDR_B_BS0 <21>
DDR_B_MA2 <21>
DDR_B_BS1 <21>
DDR_B_MA10 <21>
DDR_B_MA1 <21>
DDR_B_MA0 <21>
DDR_B_MA3 <21>
DDR_B_MA4 <21>

DDR_A_DQS#2 <20>
DDR_A_DQS2 <20>
DDR_A_DQS#3 <20>
DDR_A_DQS3 <20>
DDR_A_DQS#6 <20>
DDR_A_DQS6 <20>
DDR_A_DQS#7 <20>
DDR_A_DQS7 <20>
DDR_B_DQS#2 <21>
DDR_B_DQS2 <21>
DDR_B_DQS#3 <21>
DDR_B_DQS3 <21>
DDR_B_DQS#6 <21>
DDR_B_DQS6 <21>
DDR_B_DQS#7 <21>
DDR_B_DQS7 <21>

@

T8

PAD~D

DDR_DRAMRST# <20>

Buffer with Open Drain Output For VTT power control

+1.35V_ME M

0.1U_0402_16V7K

NC1VCC

DDR_VTT_CNTL

A A

2

A

3

GND

74AUP1G07GW_TSSOP5

12

UC14

CC57

Y

+3VS

12

5

4

RC123

100K_0402_5%

0.675V_DDR_VTT_ON <44>

DDR3 COMPENSATION SIGNALS

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

CAD Note:
Trace width=12~15 mil, Spacing=20 mils
Max trace length= 500 mil

1 2

RC5 121_0402_1%

1 2

RC6 80.6_0402_1%

1 2

RC7 100_0402_1%

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CPU (2/14)

CPU (2/14)

CPU (2/14)

LA-D071P

LA-D071P

LA-D071P

7 64Thur sda y, J uly 09 , 201 5

7 64Thur sda y, J uly 09 , 201 5

7 64Thur sda y, J uly 09 , 201 5

1

1.0(A00)

1.0(A00)

1.0(A00)

5

www.vinafix.com

SPI_MOSI= SPI_IO0
SPI_MISO= SPI_IO1
PCH EDS R0.7 p.235~236

PCH_SPI_CLK_R1
PCH_SPI_D1_R1
PCH_SPI_D0_R1
PCH_SPI_D2_R1
PCH_SPI_D3_R1

D D

+3VS

10K_0402_5%

12

@

RC267

33_0402_5%

RC29

@EMI@

33P_0402_50V8J

CC8

@EMI@

+3VS

12

RC13

10K_0402_5%

RC21 10K_0402_1%

+3VS

+3.3V_SPI

ONE_DI MM#

10K_0402_5%

12

RC268

SIO_RCIN#<29>

DIMM Detect

HIGH
LOW

C C

1 DIMM
2 DIMM

PCH_SPI_CLK_0_R

1 2

1 2

PCH_SPI_CS#0_R1

ONE_DI MM#

SERIRQ<29>

1 2

XDP_SPI_SI<14>

XDP_SPI_IO2<14>

RC21/ 44 plac e to withi n 1 100 mil of SPI O_MOSI /SP I0_I O2 pin fo r XDP

RC339 4.7K_0402_5%

RC30 1K_0402_5%

RC31 1K_0402_5%

RC316 1K_0402_5%

RC355 1K_0402_1%

RC354 1K_0402_1%

1 2

PCH_SPI_CS#0_R1

1 2

PCH_SPI_D2_R1

1 2

PCH_SPI_D3_R1

@

1 2

PCH_SPI_D3_R1

AV2

AW3

AV3

AW2

AU4
AU3
AU2
AU1

M2
M3

J4
V1
V2
M1

G3
G2
G1

AW13

AY11

1 2

CMC@

1 2

CMC@

4

UC1E

SPI - FLASH

SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0#
SPI0_CS1#
SPI0_CS2#

SPI - TOUCH

GPP_D 1/S PI1 _CLK
GPP_D 2/S PI1 _MISO
GPP_D 3/S PI1 _MOSI
GPP_D 21/ SPI 1_IO2
GPP_D 22/ SPI 1_IO3
GPP_D 0/S PI1 _CS#

C LINK

CL_CLK
CL_DATA
CL_RST#

GPP_A 0/RC IN#

GPP_A 6/S ERIRQ

SKL-U_BGA1356

SKL-U

SMBUS, SMLINK

GPP_B 23/ SML1A LERT#/ PCHHOT#

LPC

PCH_SPI_D0_R1

PCH_SPI_D2_R1

PCH_SPI_D1_R1
PCH_SPI_D0_R1
PCH_SPI_CLK_R1
PCH_SPI_D3_R1
PCH_SPI_D2_R1 PCH_SPI_D2_0_R

1 2

RC317 33_0402_5%

1 2

RC318 33_0402_5%

1 2

RC319 33_0402_5%

1 2

RC320 33_0402_5%

1 2

RC327 33_0402_5%

GPP_A 1/L AD0/ ESPI _I O0
GPP_A 2/L AD1/ ESPI _I O1
GPP_A 3/L AD2/ ESPI _I O2
GPP_A 4/L AD3/ ESPI _I O3

GPP_A 5/L FRAME# /ESP I_C S#

GPP_A 14/ SUS_S TAT#/E SPI _RESET#

GPP_A 9/C LKOUT_LP C0/ ESPI _CL K

GPP_A 10/ CLKOUT_L PC1

3

GPP_C 0/S MBCLK

GPP_C 1/S MBDATA

GPP_C 2/S MBALE RT#

GPP_C 3/S ML0CL K

GPP_C 4/S ML0DA TA

GPP_C 5/S ML0AL ERT#

GPP_C 6/S ML1CL K

GPP_C 7/S ML1DA TA

GPP_A 8/C LKRUN#

5 OF 20

PCH_SPI_D1_0_R
PCH_SPI_D0_0_R
PCH_SPI_CLK_0_R
PCH_SPI_D3_0_R

R7

SMBCLK

R8

SMBDATA

R10

PCH_SMB_ALERT#

R9

SML0_SMBCLK

W2

SML0_SMBDATA

W1

GPP_C 5

W3

SML1CLK

V3

SML1DATA

AM7

GPP_B 23

AY13
BA13
BB13
AY12
BA12
BA11

SUS_STAT#/LPCPD#

AW9

PCI_CLK_LPC0

AY9

PCI_CLK_LPC1

AW11

CLKRUN#

PCH_SPI_D1_0_R <29>

PCH_SPI_D0_0_R <29>

PCH_SPI_CLK_0_R <29>

SMBCLK

SMBDATA

LPC_LAD0 <29>
LPC_LAD1 <29>
LPC_LAD2 <29>
LPC_LAD3 <29>

LPC_LFRAME# <29>

RC16EMI@ 22_0402_5%

RC18EMI@ 22_0402_5%
RC22EMI@ 22_0402_5%

CLKRUN# <29>

Reserve for RF

2

+3VS

6

5

QC2B
DMN66D0L DW-7_SOT3 63-6

3 4

1 2

1 2
1 2

CLK_PCI_LPC_MEC

CLK_PCI_LPDEBUG

QC2A

2

DMN66D0L DW-7_SOT3 63-6

1

PCH_SMBCLK <20,21,34>

CLK_DP2VGA <34>

CLK_PCI_LPC_MEC <29>
CLK_PCI_LPDEBUG <29>

12

@EMI@12P_0402_50V8J

CC4

12

@EMI@12P_0402_50V8J

CC5

PCH_SMBDAT <20,21,34>

SML1CLK

SML1DATA

SML1CLK

SML1DATA

+3VALW_PCH

2

QC5A
DMN66D0L DW-7_SOT3 63-6

1

5

QC5B

DSX@

DMN66D0L DW-7_SOT3 63-6

34

N_DSX @

1 2

RC080 1 0_0402_5%

N_DSX @

1 2

RC080 2 0_0402_5%

PCH_SMBDAT

PCH_SMBCLK

SMBCLK

SMBDATA

SML1CLK

SML1DATA

SML0_SMBCLK

SML0_SMBDATA

SUS_STAT#/LPCPD#

CLKRUN#

1

DSX@

6

GPU_THM_S MBCLK <29,38,57>

GPU_THM_S MBDAT <29,38,57>

GPU_THM_S MBCLK

GPU_THM_S MBDAT

1 2

RC12 1K_0402_5%

1 2

RC14 1K_0402_5%

1 2

RC15 1K_0402_5%

1 2

RC17 1K_0402_5%

1 2

RC19 1K_0402_5%

1 2

RC20 1K_0402_5%

1 2

RC369 8.2K_0402_5%

@

1 2

RC27 8.2K_0402_5%

12

RN192.2K_0402_5%

12

RN202.2K_0402_5%

+3VALW_PCH

+3VALW_PCH

+3VS

+3VS

PCH_SMB_ALERT#

9/5 MOW
Option 1: Implement a 1 kOhm pull-down resistor on the signal and de-populate the

B B

PCH_SPI_CS#0_R1<29>

A A

required 1 kOhm pull-up resistor. In this case, customers must ensure that the SPI
flash d evice on the p latform has HOLD functional ity disabl ed by defau lt.

Note that the pull do wn resistor on SPI0_IO3 is only needed for SKL U/Y platforms
with ES and SKL S/H platforms with pre-ES1/ES1 samples.

+3.3V_SPI

Short Pad

PCH_SPI_CS#0_R1 PCH_SPI_CS#0_R2
PCH_SPI_D1_0_R PCH_SPI_D1_0_R3
PCH_SPI_D2_0_R PCH_SPI_D2_0_R3 PCH_SPI_CLK_0_R

1 2

RC37

@

0_0402_5%

1 2

RC329 15_0402_1%

1 2

RC330 15_0402_1%

Main:
SA00005VV10, S IC FL 128M W25Q128FVSIQ SOIC8P SPI ROM
2nd:
SA00008KK00, S IC FL 128M GD25B128CSIGR SOP 8P 3.3V
SA00006PD00, S IC FL 128M EN25QH128A-104HIP SOP 8P
Jason 2015/03/04

128Mb Flash ROM

UC5

1

/CS

2

IO1

3

IO2

4

GND

W25Q128FVSIQ_SO8

VCC

8
7

IO3

6

CLK

5

IO0

CC9

1 2

0.1U_0402_25V6

PCH_SPI_CLK_0_R3
PCH_SPI_D0_0_R3

1 2

RC331 15_0402_1%

1 2

RC332 15_0402_1%

1 2

RC333 15_0402_1%

PCH_SPI_D3_0_RPCH_SPI_D3_0_R3

PCH_SPI_D0_0_R

TLS CONFIDENTIALITY

HIGH
LOW(DEFAULT)

GPP_C 5

EC interface

HIGH
LOW(DEFAULT)

Modify Value to 150k for WW52 MOW
2015/03/03 Jason

GPP_B 23

EXI BOOT STALL BYPASS

HIGH
LOW(DEFAULT)

1 2

@

RC23 8.2K_0402_5%

ENABLE
DISABLE

+3VALW_PCH

1 2

@

RC25 10K_0402_5%

ESPI
LPC

+3VALW_PCH

1 2

CMC@

RC365 150K_0402_5%

ENABLE
DISABLE

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD

5

4

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

Title

Title

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

CPU (3/14)

CPU (3/14)

CPU (3/14)

LA-D071P

LA-D071P

LA-D071P

8 64Thur sda y, J uly 09 , 201 5

8 64Thur sda y, J uly 09 , 201 5

8 64Thur sda y, J uly 09 , 201 5

1

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

+3VALW_PCH

UC1F

LPSS ISH

AN8

GPP_B 15/ GSPI0 _CS#

AP7

GPP_B 16/ GSPI0 _CLK

NRB_BI T

+5VALW

AP8

GPP_B 17/ GSPI0 _MIS O

AR7

GPP_B 18/ GSPI0 _MOSI

AM5

GPP_B 19/ GSPI1 _CS#

AN7

GPP_B 20/ GSPI1 _CLK

AP5

GPP_B 21/ GSPI1 _MIS O

AN5

GPP_B 22/ GSPI1 _MOSI

AB1

GPP_C 8/UA RT0_RXD

AB2

GPP_C 9/UA RT0_TXD

W4

GPP_C 10/ UART0_RTS#

AB3

GPP_C 11/ UART0_CTS #

AD1

GPP_C 20/ UART2_RXD

AD2

GPP_C 21/ UART2_TXD

AD3

GPP_C 22/ UART2_RTS#

AD4

GPP_C 23/ UART2_CTS #

U7

GPP_C 16/ I2C 0_SDA

U6

GPP_C 17/ I2C 0_SCL

U8

GPP_C 18/ I2C 1_SDA

U9

GPP_C 19/ I2C 1_SCL

AH9

GPP_F 4/I 2C2_ SDA

AH10

GPP_F 5/I 2C2_ SCL

AH11

GPP_F 6/I 2C3_ SDA

AH12

GPP_F 7/I 2C3_ SCL

AF11

GPP_F 8/I 2C4_ SDA

AF12

GPP_F 9/I 2C4_ SCL

SKL-U_BGA1356

JWDB1

6

GND

5

GND

4

4

3

3

2

2

1

1

CVILU_CI1804M1VRA-NH

CONN@

VRAM_ID1

DBC_EN

D D

+3VS

For 3D-CAM & always POP
2015/Jason

1 2

RC293 10K_0402_5%

1 2

RC292 10K_0402_5%

RC62 49.9K_0402_1%

RC63 49.9K_0402_1%

RC382 49.9K_0402_1%

C C

3D_CAM_EN_PCH

FW_UPDATE_PCH

+3VALW_PCH

RC186 4.7K_0402_5%@

CAM_DETECT

BLUETOOTH_EN

12

UART_2 _CRXD_DTXD

12

UART_2 _CTXD_DRXD

12

LPSS_UART2_CTS#

3D@

1 2

DX2 RB7 51S40T 1G_SOD52 3-2

3D@

1 2

DX3 RB7 51S40T 1G_SOD52 3-2

1 2

NRB_BI T

DBC_EN<32>

BLUETOOTH_EN<36>

SATA_ODD_PWRGT<35>

SIO_EXT_WAKE#<29>

I2C_SDA_TP<38>

3D_CAM_EN <29,64>

FW_UPDATE <29,64>

For 3D-CAM 2015/J ason

3D_CAM_EN_PCH
FW_UPDATE_PCH

BLUETOOTH_EN

BOARD_ID2

UART_2_ CRXD _DTXD
UART_2_ CTXD_ DRXD

LPSS_UART2_CTS#

I2C_SCL_TP<38>

Win7 Debug solution

Option 2 : For Open Chassis Platforms

NO REBOOT STRAP

HIGH
LOW(DEFAULT)

B B

Weak IPD

No REBOOT
REBOOT ENABLE

UART_2_ CTXD_ DRXD
UART_2_ CRXD _DTXD

SKL-U

GPP_D 9
GPP_D 10
GPP_D 11
GPP_D 12

GPP_D 5/I SH_I 2C0_ SDA
GPP_D 6/I SH_I 2C0_ SCL

GPP_D 7/I SH_I 2C1_ SDA
GPP_D 8/I SH_I 2C1_ SCL

GPP_F 10/ I2C5 _SDA /I SH_I2 C2_S DA

GPP_F 11/ I2C5 _SCL /I SH_I2 C2_S CL

GPP_D 13/ ISH_UA RT0_RXD /SML 0BDA TA/I 2C4B _SDA

GPP_D 14/ ISH_UA RT0_TXD /SML0 BCLK /I 2C4B _SCL

GPP_D 15/ ISH_UA RT0_RTS#

GPP_D 16/ ISH_UA RT0_CTS #/SML 0BAL ERT#

GPP_C 12/ UART1_RXD /I SH_UART1_ RXD

GPP_C 13/ UART1_TXD /I SH_UART1_ TXD

GPP_C 14/ UART1_RTS# /IS H_UART1_ RTS#

GPP_C 15/ UART1_CTS #/I SH_UART1 _CTS#

PROJECT_ID1
PROJECT_ID2

BOARD_ID2
BOARD_ID3

GPP_A 18/ ISH_GP 0
GPP_A 19/ ISH_GP 1
GPP_A 20/ ISH_GP 2
GPP_A 21/ ISH_GP 3
GPP_A 22/ ISH_GP 4
GPP_A 23/ ISH_GP 5

GPP_A 12/ BM_BUS Y#/I SH_GP 6

6 OF 20

+3VS

12

@

RC370
10K_0402_5%

12

@

RC371
10K_0402_5%

+3VS

12

@

RC374
10K_0402_5%

12

@

RC375
10K_0402_5%

P2

CAM_DETECT

P3

DGPU_HOLD_RST#

P4
P1

RTC_DE T#

M4
N3

N1
N2

AD11
AD12

U1

DGPU_PWR_EN

U2
U3
U4

AC1
AC2
AC3
AB4

AY8

PROJECT_ID1

BA8

PROJECT_ID2

BB7
BA7

BOARD_ID3

AY7
AW7

VRAM_ID2

AP13

12

@

RC372
10K_0402_5%

12

@

RC373
10K_0402_5%

12

@

RC376
10K_0402_5%

12

@

RC377
10K_0402_5%

CAM_DETECT <64>
DGPU_HOLD_RST# <56>

RTC_DE T# <22>

DGPU_PWR_EN <40,52>

Add RC359 10kohm PU and
Change RC358 to UN-POP for SW request

2015/04/28 Jason

KB_DET# <38>

PANEL_SIZE_ID <32>

Reserve for TULIP/VanGogh MB switch

Reserve for MB Platform(SKL) switch

KB_DET#

RTC_DE T#

SIO_EXT_WAKE#

DGPU_HOLD_RST#

DGPU_PWR_EN

1 2

RC288 10K_0402_5%

1 2

RC384 10K_0402_5%

1 2

RC387 10K_0402_5%

1 2

RC383 10K_0402_5%

+3VS

12

RC359
10K_0402_5%

@

RC358
10K_0402_5%

1 2

+3VS

12

@

RC378

VRAM_ID1
VRAM_ID2

A A

10K_0402_5%

12

@

RC380
10K_0402_5%

12

@

RC379
10K_0402_5%

12

@

RC381
10K_0402_5%

Reserve for VRAM Type switch

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CPU (4/14)

CPU (4/14)

CPU (4/14)

LA-D071P

LA-D071P

LA-D071P

9 64Thur sda y, J uly 09 , 201 5

9 64Thur sda y, J uly 09 , 201 5

9 64Thur sda y, J uly 09 , 201 5

1

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

PEG_HTX_C_GRX_P[0..3]<56>

PEG_HTX_C_GRX_N[0..3]<56>

PEG_GTX_C_HRX_P[0..3]<56>

PEG_GTX_C_HRX_N[0..3]<56>

D D

GPU --->

WLAN --->

GLAN --->

C C

SATA HDD --->

SATA ODD --->

B B

PEG_HTX_C_GRX_P[0..3]

PEG_HTX_C_GRX_N[0..3]

PEG_GTX_C_HRX_P[0..3]

PEG_GTX_C_HRX_N[0..3]

PCIE_PRX_WLANTX_N5<36>

PCIE_PRX_WLANTX_P5<36>
PCIE_PTX_WLANRX_N5_C<36>
PCIE_PTX_WLANRX_P5_C<36>

PCIE_PRX_LANTX_N6<25>

PCIE_PRX_LANTX_P6<25>

PCIE_PTX_LANRX_N6<25>

PCIE_PTX_LANRX_P6<25>

SATA3_PRX_HDDTX_N0<35>

SATA3_PRX_HDDTX_P0<35>
SATA3_PTX_HDDRX_N0<35>
SATA3_PTX_HDDRX_P0<35>

SATA_PRX_ODDTX_N1<35>
SATA_PRX_ODDTX_P1<35>

SATA_PTX_ODDRX_N1<35>
SATA_PTX_ODDRX_P1<35>

+3VS

1 2

RC245 10K_0402_5%

PEG_GTX_C_HRX_P0

PEG_GTX_C_HRX_N0
PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_N0

PEG_GTX_C_HRX_P1

PEG_GTX_C_HRX_N1
PEG_HTX_C_GRX_P1
PEG_HTX_C_GRX_N1

PEG_GTX_C_HRX_P2

PEG_GTX_C_HRX_N2
PEG_HTX_C_GRX_P2
PEG_HTX_C_GRX_N2

PEG_GTX_C_HRX_P3

PEG_GTX_C_HRX_N3
PEG_HTX_C_GRX_P3
PEG_HTX_C_GRX_N3

1 2

RC45 100_0402_1%

XDP_PRDY#<14>

XDP_PREQ#<14>

PCIE_RCOMPN
PCIE_RCOMPP

UC1H

PCIE/USB3/SATA

H13

PCIE1_RXN/USB3_5_RXN

G13

PCIE1_RXP/USB3_5_RXP

B17

PCIE1_TXN/USB3_5_TXN

A17

PCIE1_TXP/USB3_5_TXP

G11

PCIE2_RXN/USB3_6_RXN

F11

PCIE2_RXP/USB3_6_RXP

D16

PCIE2_TXN/USB3_6_TXN

C16

PCIE2_TXP/USB3_6_TXP

H16

PCIE3_RXN

G16

PCIE3_RXP

D17

PCIE3_TXN

C17

PCIE3_TXP

G15

PCIE4_RXN

F15

PCIE4_RXP

B19

PCIE4_TXN

A19

PCIE4_TXP

F16

PCIE5_RXN

E16

PCIE5_RXP

C19

PCIE5_TXN

D19

PCIE5_TXP

G18

PCIE6_RXN

F18

PCIE6_RXP

D20

PCIE6_TXN

C20

PCIE6_TXP

F20

PCIE7_RXN/SATA0_RXN

E20

PCIE7_RXP/SATA0_RXP

B21

PCIE7_TXN/SATA0_TXN

A21

PCIE7_TXP/SATA0_TXP

G21

PCIE8_RXN/SATA1A_RXN

F21

PCIE8_RXP/SATA1A_RXP

D21

PCIE8_TXN/SATA1A_TXN

C21

PCIE8_TXP/SATA1A_TXP

E22

PCIE9_RXN

E23

PCIE9_RXP

B23

PCIE9_TXN

A23

PCIE9_TXP

F25

PCIE10_RXN

E25

PCIE10_RXP

D23

PCIE10_TXN

C23

PCIE10_TXP

F5

PCIE_RCOMPN

E5

PCIE_RCOMPP

D56

PROC_PRDY#

D61

PROC_PREQ#

BB11

GPP_A 7/P IRQA#

E28

PCIE11_RXN/SATA1B_RXN

E27

PCIE11_RXP/SATA1B_RXP

D24

PCIE11_TXN/SATA1B_TXN

C24

PCIE11_TXP/SATA1B_TXP

E30

PCIE12_RXN/SATA2_RXN

F30

PCIE12_RXP/SATA2_RXP

A25

PCIE12_TXN/SATA2_TXN

B25

PCIE12_TXP/SATA2_TXP

SKL-U_BGA1356

SKL-U

SSIC / USB3

USB3_ 2_RXN/ SSI C_1 _RXN
USB3_ 2_RXP /SS IC_ 1_RXP
USB3_ 2_TXN/ SSI C_1 _TXN
USB3_ 2_TXP /SS IC_ 1_TXP

USB3_ 3_RXN/ SSI C_2 _RXN
USB3_ 3_RXP /SS IC_ 2_RXP
USB3_ 3_TXN/ SSI C_2 _TXN
USB3_ 3_TXP /SS IC_ 2_TXP

USB2

USB2_ VBUS SENSE

GPP_E 9/US B2_OC 0#
GPP_E 10/ USB2_OC 1#
GPP_E 11/ USB2_OC 2#
GPP_E 12/ USB2_OC 3#

GPP_E 0/S ATAXP CIE 0/SA TAGP0
GPP_E 1/S ATAXP CIE 1/SA TAGP1
GPP_E 2/S ATAXP CIE 2/SA TAGP2

GPP_E 8/S ATALE D#

USB3_ 1_RXN
USB3_ 1_RXP

USB3_ 1_TXN
USB3_ 1_TXP

USB3_ 4_RXN
USB3_ 4_RXP

USB3_ 4_TXN
USB3_ 4_TXP

USB2N_ 1
USB2P _1

USB2N_ 2
USB2P _2

USB2N_ 3
USB2P _3

USB2N_ 4
USB2P _4

USB2N_ 5
USB2P _5

USB2N_ 6
USB2P _6

USB2N_ 7
USB2P _7

USB2N_ 8
USB2P _8

USB2N_ 9
USB2P _9

USB2N_ 10
USB2P _10

USB2_ COMP

USB2_ ID

GPP_E 4/D EVSL P0
GPP_E 5/D EVSL P1
GPP_E 6/D EVSL P2

8 OF 20

H8
G8
C13
D13

J6
H6
B13
A13

J10
H10
B15
A15

E10
F10
C15
D15

AB9
AB10

AD6
AD7

AH3
AJ3

AD9
AD10

AJ1
AJ2

AF6
AF7

AH1
AH2

AF8
AF9

AG1
AG2

AH7
AH8

AB6

USBC OMP

AG3

USB2_ ID

AG4

USB2_ VBUS SENSE

A9

USB_OC #0_ 1

C9

USB_OC #2_ 3

D9

USB_OC #4_ 5

B9

USB_OC #6_ 7

J1
J2

SIO_EXT_SCI#

J3

SATA_ODD_DA#

H2
H3

SATA_ODD_PRSNT#

G4

H1

SATA_LED#

USB3_ PRX_ CTX_N0 <30>
USB3_ PRX_ CTX_P 0 <30>
USB3_ PTX_C RX_N0 <30>
USB3_ PTX_C RX_P 0 <30>

USB3_ CRX_ DTX_N3 <64>
USB3_ CRX_ DTX_P 3 <64>
USB3_ CTX_D RX_N3 <64>
USB3_ CTX_D RX_P 3 <64>

USB_P N1 <30>
USB_P P1 <30>

USB_P N2 <30>
USB_P P2 <30>

USB_P N3 <30>
USB_P P3 <30>

USB_P N5 <32>
USB_P P5 <32>

USB_P N6 <27>
USB_P P6 <27>

USB_P N7 <32>
USB_P P7 <32>

USB_P N8 <36>
USB_P P8 <36>

1 2

RC44 113_0402_1%

1 2

RC366 1K_0402_5%

1 2

RC393 1K_0402_5%

USB_OC #0_ 1 <31>
USB_OC #2_ 3 <31>

Reser ve
Reser ve

HDD_ DEVS LP <35>

SIO_EXT_SCI# <29>

SATA_ODD_DA# <35>

SATA_ODD_PRSNT# <35>

SATA_LED# <29,37>

---> Port 1, USB3.0

3D CAMERA

-----> Port 1, USB3.0 (Port 1)

-----> Port 2, USB2.0 (IOB)

-----> Port 3, USB2.0 (IOB)

----->CCD

-----> Card Reader

-----> Touch Screen

-----> BT

USB_OC #6_ 7
USB_OC #0_ 1
USB_OC #2_ 3
USB_OC #4_ 5

SATA_LED#

SIO_EXT_SCI#

SATA_ODD_DA#

SATA_ODD_PRSNT#

+3VALW_PCH

RPC3

4 5
3

6

2

7

1

8

10K_8P4R_5%

1 2

RC248 10K_0402_5%

1 2

RC237 10K_0402_5%

RC356 10K_0402_5%

RC246 10K_0402_5%

12

+3VALW_PCH

1 2

+3VS

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CPU (5/14)

CPU (5/14)

CPU (5/14)

LA-D071P

LA-D071P

LA-D071P

10 64Thur sday , J uly 09 , 2015

10 64Thur sday , J uly 09 , 2015

10 64Thur sday , J uly 09 , 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

CLK_PEG_VGA<56>

GPU--->

D D

WLAN--->

LAN--->

C C

CLK_PEG_VGA#<56>

PEG_CLKREQ#<57>

CLK_PCIE_WLAN_N1<36>

CLK_PCIE_WLAN_P1<36>

CLK_PCIE_WLAN_REQ#<36>

CLK_PCIE_LAN_N2<25>

CLK_PCIE_LAN_P2<25>

CLK_PCIE_LAN_REQ#<25>

PCH_PLTRST#

SN74AHC1G08DCKR_SC70-5

1 2

RC189 10K_0402_5%

+3VS

1 2

RC47 10K_0402_5%

+3VS

1 2

RC50 10K_0402_5%

+3VS

1 2

RC59 10K_0402_5%@

+3VS

1 2

RC51 10K_0402_5%@

+3VS

1 2

RC190 10K_0402_5%@

+3VS

+3VS

5

1

IN1

2

IN2

UC7

3

P

G

4

O

PCH_PLTRST#_EC

12

RC65

100K_0402_5%

4

UC1J

D42

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

AR10

GPP_B 5/S RCCLK REQ0#

B42

CLKOUT_PCIE_N1

A42

CLKOUT_PCIE_P1

AT7

GPP_B 6/S RCCLK REQ1#

D41

CLKOUT_PCIE_N2

C41

CLKOUT_PCIE_P2

AT8

GPP_B 7/S RCCLK REQ2#

D40

CLKOUT_PCIE_N3

C40

CLKOUT_PCIE_P3

AT10

GPP_B 8/S RCCLK REQ3#

B40

CLKOUT_PCIE_N4

A40

CLKOUT_PCIE_P4

AU8

GPP_B 9/S RCCLK REQ4#

E40

CLKOUT_PCIE_N5

E38

CLKOUT_PCIE_P5

AU7

GPP_B 10/ SRCCL KREQ5#

SKL-U_BGA1356

PCH_PLTRST#_EC <25,29,32,36,56>

SKL_ULT

CLOCK SIGNALS

RTCRST_ON<29>

CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

R1902

10KR2J-3-GP

GPD8/ SUSC LK

XTAL24_IN

XTAL24_OUT

XCLK_BIASREF

RTCX1
RTCX2

SRTCRST#

RTCRST#

10 OF 20

12

F43
E43

BA17

E37
E35

E42

AM18
AM20

AN18
AM16

3

SUSCLK

SUSCLK

CLK_ITPXDP_N
CLK_ITPXDP_P

SUSCLK

XTAL24_IN
XTAL24_OUT

XCLK_BIASREF

RC52 2.7K_0402_1%

PCH_RTCX1
PCH_RTCX2

SRTCRST#

PCH_RTCRST#

2

G

13

D

S

Q1901
2N7002K_SOT23-3

2

SUSCLK <36>

1 2

RC48 1K_0402_5%

@

T4943

PAD~D

@

T4944

PAD~D

@

T4939

PAD~D

1 2

1 2

RC56 20K_0402_5%

CC24 1U_0402_6.3V6K

1 2

RC57 20K_0402_5%

CC25 1U_0402_6.3V6K

1

1

SHORT PADS~D

CMOS1 must take care short & touch risk on layout placement

1 2

1 2

2

CMOS1 JP@

CMOS1
Always Open
& Not Solder

+1.0V_CLK5

+RTC_CELL

2

XTAL24_IN

PCH_RTCX1
PCH_RTCX2

1M_0402_1%

RC46

1 2

RC295

0_0402_5%

1 2

@

Short Pad

Jason 6/24

RC54
10M_0402_5%

RC296

1 2

0_0402_5%

1 2

Jason 6/24

@

Short Pad

SJ10000LV00, S CRYSTAL 32.768KHZ 12.5PF 9H03200042

32.768kHz/12.5pF with 18pF
SJ10000PW00, S CRYSTAL 32.768KHZ 9PF X1A000141000200

32.768kHz/9pF with 5.6pF

3

4

YC1
24MHZ_12PF_X3G024000DC1H

1

2

XTAL24_OUT_RXTAL24_OUT

12

YC2

32.768KHZ_9PF_X1A000141000200

PCH_RTCX2_R

Change CC23, CC26 for YC2 2nd sourc e.
Jason 5/29
Change CC23, CC26 CPN for Material Shortage.
Jason 6/2
Change CC23, CC26 for YC2 2nd sourc e.
Jason 7/6

1

CC21

1 2

12P_0402_50V8J

CC22

1 2

12P_0402_50V8J

CC23

1 2

6.8P_0402_50V8C

20ppm / 9pF
ESR <50kohm (MAX)

CC26

1 2

6.8P_0402_50V8C

+3.3V_ALW_DSW

12

100P_0402_50V8J

@ESD@

1 2

T9

PCH_RSMRST#_Q

POK

1M_0402_5%

12

RC220

H_CPUP WRGD

ME_SUS _PW R_ACK

@

PAD~D

1 2

RC75 10K_0402_5%

1 2

RC344 0_0402_5%DSX@

1 2

RC216 0_0402_5%

N_DSX @

SUSACK#<29>

PCIE_WAKE#<25,29>
EC_WAKE#<29>

5

RC395 0_0402_5%
RC391 0_0402_5%

+3VS

CC1101

Close to CPU side

+3VALW_PCH

RC74 10K_0402_5%@

B B

POK<43,45,46,47>

2015/5/19 Modif y
Jason

1U_0402_6.3V6K

12

A A

CC266

1 2

RC67 1K_0402_5%

1 2

RC70 10K_0402_5%

1 2

RC291 10K_0402_5%

RC110 1

PCH_RSMRST#_Q<14>

1 2

RC77 1K_0402_5%@

1 2

RC78 60.4_0402_1%

ME_SUS _PW R_ACK<29>

1 2

RC346 0_0402_5%DSX@

1 2
1 2

@

2015/5/19 Modif y
Jason

PCH_PCIE_WAKE#

@

LAN_WAKE#

SYS_RESET#

12

PCH_DPWROK

@

100K_0402_5%

PCH_PLTRST#
SYS_RESET#

PCH_RSMRST#_Q

H_CPUP WRGDH_CPUP WRGD _R
VCCST_PWRGDH_VCC ST_P WRGD

SYS_PWROK<29>
RESE T_OUT#<29>

PCH_DPWROK

SUSACK#_R

PCH_PCIE_WAKE#
LAN_WAKE#

RSMRST circuit

PCH_RSMRST#<29>

UC1K

SYSTEM POWER MANAGEMENT

AN10

GPP_B 13/ PLTRST#

B5

SYS_RESET#

AY17

RSMRST#

A68

PROCPWRGD

B65

VCCST_PWRGD

B6

SYS_PWROK

BA20

PCH_PWROK

BB20

DSW_PWROK

AR13

GPP_A 13/ SUSW ARN#/ SUSPW RDNAC K

AP11

GPP_A 15/ SUSAC K#

BB15

WAKE#

AM15

GPD2/ LAN_ WAK E#

AW17

GPD11 /LA NPHYPC

AT15

GPD7/ RSVD

SKL-U_BGA1356

+3VALW

5

1

P

IN1

2

POK

IN2

G

3

SN74AHC1G08DCKR_SC70-5

4

SIO_SLP_LAN#

8/21 can change to 10K for merge to RP

PCH_BATLOW#

AC_PRESENT

SKL-U

CZ34

@

1 2

0.1U_0402_10V7K

4

PCH_RSMRST#_Q

O

UZ6

1 2

RC68 10K_0402_5%@

1 2

RC72 8.2K_0402_5%

1 2

RC243 10K_0402_5%

GPP_B 12/ SLP_ S0#

GPD4/ SLP _S3#
GPD5/ SLP _S4#

GPD10 /SL P_S5 #

SLP_SUS#
SLP_LAN#

GPD9/ SLP _WL AN#

GPD6/ SLP _A#

GPD3/ PW RBTN#

GPD1/ ACP RESENT

GPD0/ BATL OW#

GPP_A 11/ PME#

GPP_B 11/ EXT_PW R_GA TE#

INTRUDER#

GPP_B 2/V RALERT#

Iris2 use 1D35V_VTT_PWRGD
Need to confirm sequence

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

+3VALW

+3.3V_ALW_DSW

AT11
AP15
BA16
AY16

AN15
AW15
BB17
AN16

BA15
AY15
AU13

AU11
AP16

AM10
AM11

11 OF 20

1VS_VCCIO_PWRGD<46>

1.35V_VTT_PWRGD<44>

3

INTRUDER#

VRALERT#

SIO_PWRBTN#

SIO_SLP_S3#

SIO_SLP_SUS#_R
SIO_SLP_LAN#
SIO_SLP_WLAN#
SIO_SLP_A#

AC_PRESENT
PCH_BATLOW#

PME#
INTRUDER#

VRALERT#

+RTC_CELL

1 2

RC69 330K_0402_5%

1 2

RC73 10K_0402_5%

@

RC110 2

SIO_SLP_S0# <17>
SIO_SLP_S3# <17,29,40,41,46,51>
SIO_SLP_S4# <17,29,44>
SIO_SLP_S5# <42>

1 2

RC76 43K_0603_1%

@

T4938

PAD~D

@

T4945

PAD~D

@

T4937

PAD~D

SIO_PWRBTN# <29>

@

T115

PAD~D

MPHYP_ PWR_ EN <18>

connect to VCCMPHYGTAON_1P0 enable pin

1 2

@

RC389 0_0402_5%

1 2

@

RC392

Short Pad

SIO_SLP_S3#

DZ5 RB751S4 0T1G_SOD5 23-2

12

100K_0402_5%

0_0402_5%

Jason 6/24

@

1 2

+3VALW

+3.3V_ALW_DSW

12

DZ4RB751 S40T1G_ SOD523-2

SIO_SLP_SUS# <29,45,46,47>

ACAV_IN <29,42>

+3VS

RC388
1K_0402_5%

1 2

ALL_SYS_PWRGD

1 2

RC345

Short Pad

2

@

Buffer with Open Drain Output For VTT power control

0.1U_0402_16V7K

SIO_SLP_S3#

RC110 3

10K_0402_1%

1 2

CC1103

1U_0402_6.3V6K

12

NC1VCC

2

A

3

GND

74AUP1G07GW_TSSOP5

Buffer with Open Drain Output For VTT power control

0_0402_5%

Jason 6/24

ALL_SYS_PWRGD

ALL_SYS_PWRGD <29>

IMVP_VR_ON <48,49>

0.1U_0402_16V7K

2

3

74AUP1G07GW_TSSOP5

NC1VCC

A

GND

12

UC16

CC298

Y

5

4

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CPU (6/14)

CPU (6/14)

CPU (6/14)

LA-D071P

LA-D071P

LA-D071P

+3VALW

CC299

12

UC17

5

4

ALL_SYS_PWRGD

Y

+1.0V_VCCST+3VALW

RC71
1K_0402_5%

1 2

H_VCC ST_P WRGD

1.0(A00)

1.0(A00)

11 64Thur sday , J uly 09 , 2015

11 64Thur sday , J uly 09 , 2015

11 64Thur sday , J uly 09 , 2015

1

1.0(A00)

5

+1.0V_VCCST

+1.0V_VCCSTG

+3VS

D D

1 2

H_CATE RR#

@

RC79 49.9_0402_1%

1 2

1 2

1 2

1 2

@

1 2

H_THERMTRI P#

H_PROC HOT#

TOUCHPA D_I NTR#_D

TOUCH_S CREE N_PD #

TOUCH_S CREE N_PD #<32>

RC80 1K_0402_5%

RC83 1K_0402_5%

RC272 10K_0402_5%

RC277 10K_0402_5%

RC360 10K_0402_5%

DGPU_PWROK

8/19 DG0.9

H_PROC HOT#

RC84 499_0402_1%

TOUCH_S CREE N_PD # TOUCH_S CREE N_PD #_R

1 2

@

RC394 0_0402_5%

12

PECI_EC<29>H_PROC HOT#<29,41,42,48>

1 2

T4946

T4942
T4941
T10
T11

12

RC88

49.9_0402_1%

4

@

PAD~D

@

PAD~D

@

PAD~D

@

PAD~D

@

PAD~D

TOUCHPA D_I NTR#_D

EDRAM_OPIO_RCOMP

12

RC89

RC90

49.9_0402_1%

H_CATE RR#

H_PROC HOT#_R

H_THERMTRI P#

XDP_OBS0_R
XDP_OBS1_R
XDP_OBS2_R
XDP_OBS3_R

CPU_POPIRCOMP
PCH_POPIRCOMP

EOPIO_RCOMP

12

RC91

49.9_0402_1%

49.9_0402_1%

AT16
AU16

D63
A54
C65
C63
A65

C55
D55
B54
C56

A6

A7
BA5
AY5

H66
H65

SKL-U_BGA1356

UC1D

CATERR#
PECI
PROCHOT#
THERMTRI P#
SKTOCC#

CPU MISC

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]

GPP_E 3/C PU_GP0
GPP_E 7/C PU_GP1
GPP_B 3/C PU_GP2
GPP_B 4/C PU_GP3

PROC_POPIRCOMP
PCH_OPIRCOMP
OPCE_ RCOMP
OPC_RC OMP

SKL-U

JTAG

PROC_TRST#

PCH_JTAG_TCK

PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS

3

PROC_TCK

PROC_TDI
PROC_TDO
PROC_TMS

PCH_TRST#

JTAGX

4 OF 20

B61

CPU_XDP_TCK0

D60

SOC_XDP_TDI

A61

SOC_XDP_TDO

C60

SOC_XDP_TMS

B59

SOC_XDP_TRST#

B56
D59

SOC_XDP_TDI

A56

SOC_XDP_TDO

C59

SOC_XDP_TMS

C61

SOC_XDP_TRST#

A59

CPU_XDP_TCK0

CPU_XDP_TCK0 <14>
SOC_XDP_TDI <14>
SOC_XDP_TDO <14>
SOC_XDP_TMS <14>
SOC_XDP_TRST# <14>

PCH_JTAG_TCK1 <14>

2

1

C C

TOUCHPA D_I NTR#<29,38>

ME_FWP_EC

LOW = ENABLE -->ME lock, can't update ME‧
HIGH = DISABLE -->ME un-lock, can update ME‧

B B

+3VALW_PCH +3VALW_PCH

1 2

RC183 8.2K_0402_5%

@

SPKR HDA_S DOUT

DZ3
RB751 S40T1G_ SOD523-2

1 2

RC187 4.7K_0402_5%

@

TOUCHPA D_I NTR#_D

1 2

HDA_C ODEC _BI TCLK<23>

HDA_C ODEC _SDOUT<23>

HDA_C ODEC _SYNC<23>

ME_FW P_E C<29>

HDA_C ODEC _RST#<23>

22P_0402_50V8J

Close to RC93

CC27

1 2

RC92 33_0402_5%

1 2

RC93 33_0402_5%EMI@

1 2

RC94 33_0402_5%

1 2

RC223 1K_0402_5%

RC95 33_0402_5%

HDA_C ODEC _BI TCLK

1

2

1 2

DGPU_PWROK<29,40,52>

UC1G

HDA_S YNC/ I2S 0_SF RM
HDA_B LK/ I2S 0_SC LK
HDA_S DO/ I2S0 _TXD
HDA_S DI 0/I 2S0_ RXD
HDA_S DI 1/I 2S1_ RXD
HDA_RS T#/I 2S1 _SCL K

J5

GPP_D 23/ I2S_ MCLK
I2S1_SFRM
I2S1_TXD

GPP_F 1/I 2S2_ SFRM
GPP_F 0/I 2S2_ SCLK
GPP_F 2/I 2S2_ TXD
GPP_F 3/I 2S2_ RXD

GPP_D 19/ DMIC _CLK 0
GPP_D 20/ DMIC _DATA 0

GPP_D 17/ DMIC _CLK 1
GPP_D 18/ DMIC _DATA 1

GPP_B 14/ SPKR

SKL-U_BGA1356

AUDI O

HDA_S YNC
HDA_B IT_C LK
HDA_S DOUT

HDA_S DI N0<23>

HDA_RS T#

DGPU_PWROK

SPKR<23>

BA22
AY22
BB22
BA21
AY21

AW22

AY20

AW20

AK10

AW5

AK7
AK6
AK9

H5
D7

D8
C8

SKL-U

SDIO/SDXC

GPP_G0 /SD _CMD
GPP_G1 /SD _DATA 0
GPP_G2 /SD _DATA 1
GPP_G3 /SD _DATA 2
GPP_G4 /SD _DATA 3

GPP_G5 /SD _CD#
GPP_G6 /SD _CLK

GPP_A 17/ SD_P WR_E N#/I SH_GP7

GPP_G7 /SD _WP

GPP_A 16/ SD_1 P8_SE L

SD_RCOMP

GPP_F 23

7 OF 20

AB11
AB13
AB12
W12
W11
W10
W8
W7

BA9
BB9

AB7

AF13

SD_RCOMP

RC96 200_0402_1%

KB_LED_BL_DET <38>

1 2

TOP SWAP STRAP

A A

HIGH
LOW(DEFAULT)

ENABLE
DISABLE

Flash Descriptor Security override

HIGH
LOW(DEFAULT)

DISABLE
ENABLE

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CPU (7/14)

CPU (7/14)

CPU (7/14)

LA-D071P

LA-D071P

LA-D071P

12 64Thur sday , J uly 09 , 2015

12 64Thur sday , J uly 09 , 2015

12 64Thur sday , J uly 09 , 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

D D

4

3

2

1

CFG[2][5][6][7] for SKYLAKE-H CPU CFG strap pin

1 2

RC113 10K_0402_1%

@

Stall reset sequence

HIGH(DEFAULT)
LOW

C C

1 2

RC109 10K_0402_1%

eDP ena ble

HIGH(DEFAULT)
LOW

B B

CFG0

No stall(Normal Operation)
stall

CFG4

Disabled
Enabled

1 2

RC112 10K_0402_1%

@

1 2

RC110 10K_0402_1%

@

CFG1

CFG3

+1.0V_XDP

XDP_ITP_PMODE<14>

CFG16<14>
CFG17<14>

CFG18<14>
CFG19<14>

12

12

CFG0
CFG1

CFG3
CFG4

CFG_RCOMP

CFG0<14>
CFG1<14>
CFG2<14>
CFG3<14>
CFG4<14>
CFG5<14>
CFG6<14>
CFG7<14>
CFG8<14>
CFG9<14>
CFG10<14>
CFG11<14>
CFG12<14>
CFG13<14>
CFG14<14>
CFG15<14>

RC114 49.9_0402_1%

CMC@

RC115 1.5K_0402_5%

@

T16

PAD~D

@

T17

PAD~D

AL25
AL27

BA70
BA68

E68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70

E63
F63

E66
F66

E60

E8

AY2
AY1

D1
D3

K46
K45

C71
B70

F60

A52

J71
J68

F65
G65

F61
E61

UC1S

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]

CFG[16]
CFG[17]

CFG[18]
CFG[19]

CFG_RCOMP

ITP_PMODE

RSVD _AY2
RSVD _AY1

RSVD _D1
RSVD _D3

RSVD _K46
RSVD _K45

RSVD _AL2 5
RSVD _AL2 7

RSVD _C71
RSVD _B70

RSVD _F60

RSVD _A52

RSVD _TP_B A70
RSVD _TP_B A68

RSVD _J7 1
RSVD _J6 8

VSS_F65
VSS_G65

RSVD _F61
RSVD _E61

SKL-U_BGA1356

RESERVED SIGNALS-1

SKL-U

RSVD _TP_B B68
RSVD _TP_B B69

RSVD _TP_A K13
RSVD _TP_A K12

RSVD _BB2
RSVD _BA3

RSVD _D5
RSVD _D4
RSVD _B2
RSVD _C2

RSVD _B3
RSVD _A3

RSVD _AW 1

RSVD _E1
RSVD _E2

RSVD _BA4
RSVD _BB4

RSVD _A4
RSVD _C4

RSVD _A69
RSVD _B69

RSVD _AY3

RSVD _D71
RSVD _C70

RSVD _C54
RSVD _D54

VSS_AY71

ZVM#

RSVD _TP_A W71
RSVD _TP_A W70

MSM#

PROC_SELECT#

19 OF 20

SPARE

SKL-U

RSVD _F6
RSVD _E3

RSVD _C11

RSVD _B11

RSVD _A11
RSVD _D12
RSVD _C12

RSVD _F52

20 OF 20

F6
E3
C11
B11
A11
D12
C12
F52

UC1T

BB68
BB69

AK13
AK12

BB2
BA3

AU5

TP5

AT5

TP6

D5
D4
B2
C2

B3
A3

AW1

E1
E2

BA4
BB4

A4
C4

BB5

TP4

A69
B69

AY3

D71
C70

C54
D54

AY4

TP1

BB3

TP2

AY71
AR56

AW71
AW70

AP56
C64

@

T12

PAD~D

@

T13

PAD~D

@

T14

PAD~D

@

T15

PAD~D

@

T128

PAD~D

@

T129

PAD~D

@

T130

PAD~D

@

T126

PAD~D

@

T127

PAD~D

PM_ZVM# <46,51>

@

T113

PAD~D

@

T114

PAD~D

MSM_N <51>

1 2

RC120 100K_0402_5%

+1.8V_PGPPF

1 2

RC361 0_0402_5%@

ZVM# for SKYLAKE-U 2+3e

MSM# for SKYLAKE-U 2+3e

+1.0V_VCCST

AW69
AW68

AU56

AW48

C7
U12
U11
H11

RSVD _AW 69
RSVD _AW 68
RSVD _AU56
RSVD _AW 48
RSVD _C7
RSVD _U12
RSVD _U11
RSVD _H11

SKL-U_BGA1356

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CPU (8/14)

CPU (8/14)

CPU (8/14)

LA-D071P

LA-D071P

LA-D071P

13 64Thur sday , J uly 09 , 2015

13 64Thur sday , J uly 09 , 2015

13 64Thur sday , J uly 09 , 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

D D

4

3

2

1

PRIMARY CMC CONN

JTAG/RC/HOOKS

+1.0V_XDP+1.0V_PRIM

VCCOBS_AB

XDP_TRST*

XDP_TDI

XDP_TMS
XDP_TCK0
XDP_TCK1

XDP_TDO

XDP_PREQ*
XDP_PRDY*

HOOK_0
HOOK_3
HOOK_6

XDP_PRSNT_PCH*
XDP_PRSNT_CPU*

<MT> GND

GND

+1.0V_XDP

22

28

XDP_TRST#

29

XDP_TDI

30

XDP_TMS

32

XDP_TCK0

31

XDP_TCK1

35

XDP_TDO

33
34

27

XDP_HOOK0

25

XDP_HOOK3

26

XDP_HOOK6

24

XDP_PRSENT_PCH

23

XDP_PRSENT_CPU

19
36

XDP_PREQ# <10>

XDP_PRDY# <10>

+3.3V_SPI

1 2

RC9

+1.0V_VCCSTG

C C

Place to CPU side

Place to CPU side

RC350

RC351

RC349

+1.0V_XDP

RC353

RC43

RC347

RC35 51_0402_1%

RC348

1 2

CMC@

1K_0402_5%CMC@

12

51_0402_5%CMC@

12

51_0402_5%CMC@

12

51_0402_5%CMC@

1K_0402_5%CMC@

12

0_0402_5%@

12

0_0402_5%@

12

12

51_0402_5%@

XDP_SPI_SI

SOC_XDP_TMS

SOC_XDP_TDI

SOC_XDP_TDO

XDP_ITP_PMODE

XDP_PRSENT_CPU

XDP_PRSENT_PCH

CPU_XDP _TCK0

PCH_JTAG_TCK1

SOC_XDP_TDO<12>
CPU_XDP_TCK0<12>

PCH_JTAG_TCK1<12>

SOC_XDP_TMS<12>

SOC_XDP_TDI<12>
SOC_XDP_TRST#<12>
XDP_ITP_PMODE<13>

XDP_SPI_SI<8>
XDP_SPI_IO2<8>

PCH_RSMRST#_Q<11>

SOC_XDP_TDO
CPU_XDP_TCK0
PCH_JTAG_TCK1
SOC_XDP_TMS

SOC_XDP_TDI
SOC_XDP_TRST#
XDP_ITP_PMODE XDP_HOOK6

XDP_SPI_SI XDP_HOOK3

RC158

CMC@

RPC2

1 8
2 7
3 6
4 5

0_0804_8P4R_5%

CMC@

RPC4

1 8
2 7
3 6
4 5

0_0804_8P4R_5%

CMC@

RPC15

1 8
2 7
3 6
4 5

0_0804_8P4R_5%

1 2

CMC@

XDP_TDO
XDP_TCK0
XDP_TCK1
XDP_TMS

XDP_TDI
XDP_TRST#

XDP_PRSENT_PCHXDP_SPI_IO2

XDP_PRSENT_CPUCFG3

XDP_HOOK0PCH_RSMRST#_Q

1K_0402_5%CMC@

CFG0<13>
CFG1<13>
CFG2<13>
CFG3<13>
CFG4<13>
CFG5<13>
CFG6<13>
CFG7<13>

CFG17<13>
CFG16<13>

CFG8<13>
CFG9<13>
CFG10<13>
CFG11<13>
CFG12<13>
CFG13<13>
CFG14<13>
CFG15<13>

CFG19<13>
CFG18<13>

JPCMC1

1

DATA_0

3

DATA_1

5

DATA_2

7

DATA_3

9

DATA_4

11

DATA_5

13

DATA_6

15

DATA_7

17

DATA_CLK_1P

21

DATA_CLK_1N

2

DATA_8

4

DATA_9

6

DATA_10

8

DATA_11

10

DATA_12

12

DATA_13

14

DATA_14

16

DATA_15

18

DATA_CLK_2P

20

DATA_CLK_2N

OBS DATA

1 2

RC352 0_0603_5%

CMC_DEBUG_36P

INTEL_CMC_PRIMARY

CONN@

B B

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CPU (9/14)

CPU (9/14)

CPU (9/14)

LA-D071P

LA-D071P

LA-D071P

14 64Thur sday , J uly 09 , 2015

14 64Thur sday , J uly 09 , 2015

14 64Thur sday , J uly 09 , 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

+VCC_CORE: 0.3~1.35V

D D

@

T122

PAD~D

@

T123

+VCC_EDRAM

+1.8V_PRIM

VCC_EDRAM_SENSE<51>
VSS_EDRAM_SENSE<51>

+VCC_EOPIO

C C

VCCOPC,VCCOP C_1P8,VCCEOPIO for SKYLAKE-U 2+3e
(w/ on pa ckage cach e)

PAD~D

ShortPad

RC232 0_0603_5%

VCCEOPIO_SENSE<51>
VSSEOPIO_SENSE<51>

+VCC_EDRAM +VCC_EOPIO

+VCC_CORE +VCC_CORE

UC1L

A30

VCC_A30

A34

VCC_A34

A39

VCC_A39

A44

VCC_A44

AK33

VCC_AK33

AK35

VCC_AK35

AK37

VCC_AK37

AK38

VCC_AK38

AK40

VCC_AK40

AL33

VCC_AL33

AL37

VCC_AL37

AL40

VCC_AL40

AM32

VCC_AM32

AM33

VCC_AM33

AM35

VCC_AM35

AM37

VCC_AM37

AM38

VCC_AM38

G30

VCC_G30

K32

RSVD _K32

AK32

RSVD _AK3 2

AB62

VCCOPC_AB62

P62

VCCOPC_P62

V62

VCCOPC_V62

H63

VCC_OPC_1P8_H63

G61

VCC_OPC_1P8_G61

AC63

VCCOPC_SENSE

AE63

VSSOPC_SENSE

AE62

VCCEOPIO

AG62

VCCEOPIO

AL63

VCCEOPIO_SENSE

AJ62

VSSEOPIO_SENSE

SKL-U_BGA1356

1

2

CC183

1U_0402_6.3V6K

1

1

2

2

CC289

CC288

1U_0402_6.3V6K

1 2

@

1

CC180

2

+VCC_CORE_G0

+VCC_CORE_G1

Jason 6/25

10U_0402_6.3V6M

CPU POWER 1 OF 4

1U_0402_6.3V6K

SKL-U

1

1

1

2

2

CC290

1U_0402_6.3V6K

2

CC291

1U_0402_6.3V6K

VCC_G32
VCC_G33
VCC_G35
VCC_G37
VCC_G38
VCC_G40
VCC_G42
VCC_J30
VCC_J33
VCC_J37
VCC_J40
VCC_K33
VCC_K35
VCC_K37
VCC_K38
VCC_K40
VCC_K42
VCC_K43

VCC_SENSE
VSS_SENSE

VIDALERT#

VIDSCK

VIDSOUT

VCCSTG_G20

12 OF 20

CC292

1U_0402_6.3V6K

G32
G33
G35
G37
G38
G40
G42
J30
J33
J37
J40
K33
K35
K37
K38
K40
K42
K43

E32

VCCSENSE

E33

VSSSENSE

B63

H_CPU_ SVI DAL RT#

A63

VIDSCLK

D64

VIDSOUT

G20

+1.0V_VCCSTG_R

VIDSCLK <48>

+VCC_CORE

12

12

RC143

0_0603_5%

1 2

@

ShortPad

1

2

RC140

100_0402_1%

RC141

100_0402_1%

Jason 6/25

CC184

10U_0402_6.3V6M

VCCSENSE <48>
VSSSENSE <48>

+1.0V_VCCSTG

1

CC187

2

10U_0402_6.3V6M

PSC(Primary side cap) : Place as close to the package as possible
BSC(Backs ide cap) : P lace on sec ondary si de, underne ath the pack age

Component placement order:
Package edge > 0402 caps > 0805 caps > Bulk caps >Power source

ESD Request

+1.0V_PRIM +VCC_CORE

CC283

CC284

CC285

CC286

1 2

1 2

1 2

1 2

22U_0603_6.3V6M@E SD@

22U_0603_6.3V6M@E SD@

+3VS+1.0V_PRIM

22U_0603_6.3V6M@E SD@

+1.35V_MEM+1.0V_PRIM

22U_0603_6.3V6M@E SD@

B B

SVID ALERT

VIDALERT_N<48>

SVID DATA

A A

VIDSOUT<48>

5

4

+1.0V_VCCST

12

+1.0V_VCCST

12

56_0402_1%

RC152

100_0402_1%

RC157

CAD Note: Place the PU resistors close to CPU
RC204 cl ose to CPU 300 - 1500mi ls

12

H_CPU_ SVI DAL RT#

RC153220_0402_5%

CAD Note: Place the PU resistors close to CPU
RC208cl ose to CPU 300 - 1500mi ls

VIDSOUT

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

CPU (10/14)

CPU (10/14)

CPU (10/14)

LA-D071P

LA-D071P

LA-D071P

15 64Thur sday , J uly 09 , 2015

15 64Thur sday , J uly 09 , 2015

15 64Thur sday , J uly 09 , 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

+VCCGT: 0.3~1.35V
+VCCGTX : 0.3~1.35V

+VCC_GT +VCC_GT

AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71

A48
A53
A58
A62
A66

J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70

L71
M62
N63
N64
N66
N67
N69

J70

J69

UC1M

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

VCCGT_SENSE
VSSGT_SENSE

SKL-U_BGA1356

D D

C C

+VCC_GT

12

RC161

100_0402_1%

12

RC163

VCC_GT_SENSE
VSS_GT_SENSE

100_0402_1%

VCC_GT_SENSE<48>
VSS_GT_SENSE<48>

B B

CPU POWER 2 OF 4

SKL-U

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70

VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56

VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66

VCCGTX_SENSE
VSSGTX_SENSE

13 OF 20

N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62

AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50

VCCGTX for SKYLAKE-U 2+3e only

AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66

AK62
AL61

VCCSENSE_VCCGTUS
VSSSENSE_VCCGTUS

+VCC_GT

+VCC_GT

12

12

RC340

@

100_0402_1%

RC341

@

100_0402_1%

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CPU (11/14)

CPU (11/14)

CPU (11/14)

LA-D071P

LA-D071P

LA-D071P

16 64Thur sday , J uly 09 , 2015

16 64Thur sday , J uly 09 , 2015

16 64Thur sday , J uly 09 , 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

Jason 6/25

ShortPad

RC231

0_0603_5%

1 2

@

BSC PSC

D D

1

1

2

@

BSC

1

1

2

2

CC256

@

1U_0402_6.3V6K

C C

1

1

CC174

CC175

2

2

@

10U_0402_6.3V6M

10U_0402_6.3V6M

1

CC177

CC176

10U_0402_6.3V6M

CC178

2

2

10U_0402_6.3V6M

PSC

CC255

1

2

1U_0402_6.3V6K

1

2

CC293

22U_0603_6.3V6M

+1.0V_VCCST

1

2

1

2

CC257

@

1U_0402_6.3V6K

@

10U_0402_6.3V6M

CC294

PSC

1

2

1

2

22U_0603_6.3V6M

CC195

1U_0402_6.3V6K

CC179

10U_0402_6.3V6M

CC295

22U_0603_6.3V6M

+1.0V_VCCSTG

+1.35V_MEM+1.35V_MEM_CPUCLK

PSC

BSC

1

2

VDDQ: 8.45A

BSC

1

CC296

2

10U_0402_6.3V6M

+1.35V_MEM

CC199

1U_0402_6.3V6K

+1.35V_MEM_CPUCLK

1

CC194

2

1U_0402_6.3V6K

1

CC297

2

0.1U_0402_10V7K

+1.35V_MEM

4

1.35V in DDR3L,

1.2V in LPDDR3 and DDR4

UC1N

CPU POWER 3 OF 4

AU23

VDDQ_AU23

AU28

VDDQ_AU28

AU35

VDDQ_AU35

AU42

VDDQ_AU42

BB23

VDDQ_BB23

BB32

VDDQ_BB32

BB41

VDDQ_BB41

BB47

VDDQ_BB47

BB51

VDDQ_BB51

AM40

VDDQC

A18

VCCST

A22

VCCSTG_A22

AL23

VCCPLL_OC

K20

VCCPLL_K20

K21

VCCPLL_K21

SKL-U_BGA1356

+1.0V_VCCST

PSC

1

2

CC202

1U_0402_6.3V6K

SKL-U

+VCC_SA

VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO

VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA

VCCIO_SENSE
VSSIO_SENSE

VSSSA_SENSE
VCCSA_SENSE

14 OF 20

1 2

RC168 100_0402_1%

AK28
AK30
AL30
AL42
AM28
AM30
AM42

AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30

AM23
AM22

H21
H20

+1.0VS_VCCIO

VCCIO_SENSE
VSSIO_SENSE

+VCC_SA

3

12

RC166

VSA_SEN- <48>
VSA_SEN+ <48>

+1.0VS_VCCIO

12

12

100_0402_1%

RC165

100_0402_1%

VCCIO_SENSE <46>
VSSIO_SENSE <46>

RC167

100_0402_1%

+1.0VS_VCCIO

PSC

2

1

BSCBSC

1

1

2

2

CC181

1U_0402_6.3V6K

1

1

2

2

CC252

1U_0402_6.3V6K

1

1

2

2

CC182

1U_0402_6.3V6K

CC253

1U_0402_6.3V6K

CC186

CC185

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

2

2

CC250

CC251

1U_0402_6.3V6K

1U_0402_6.3V6K

POP option with Volume

1

1

CC249

CC248

2

2

10U_0402_6.3V6M

10U_0402_6.3V6M

PJP15
Always Short

Imax : 3 A

PJP15

PJP@

2

112

JUMP_43X79

0.1U_0402_25V6

+1.0VS_VCCIO+1.0V_VCCSTG_C

CZ1701

1

@

2

B B

+1.0V_VCCST source

PJP27
Always Short

PJP27

RZ1701

22.1K_0402_1%

SIO_SLP_S4#<11,29,44>

A A

1 2

CZ1703

0.1U_0402_10V7K

EN_1.0V_VCCST_ON

1

+1.0V_PRIM

2

+5VALW

12

UZ21

3

1

2

4

6

TPS2 2967 DSGR_ SON8_ 2X2
CZ70
470P_0402_50V7K

ON

VIN

VIN

VBIAS

CT

VOUT

VOUT

GND
GND

7

+1.0V_VCCST_C

8

5
9

@

PJP@

12

PAD-OPEN1x1m

1 2

CZ78 0.1U_0402_10V7K

+1.0V_VCCST

SIO_SLP_S3#<11,29,40,41,46,51>

SIO_SLP_S0#<11>

+1.0V_VCCSTG source

RZ75

0_0402_5%

1 2

@

+3VALW

5

1

P

IN1

2

IN2

G

UC15

SN74AHC1G08DCKR_SC70-5

3

+1.0V_VCCSTG

6

5

12

+1.0V_VCCSTG_C

+1.0V_PRIM

+5VALW

1U_0402_6.3V6K

0.1U_0402_10V7K

1

CZ87

CZ86

1

@

2

2

4

O

1 2

VCCSTG_EN

RZ1702 49.9K_0402_1%

1 2

RB751 S40T1G_ SOD523-2

VCCSTG_EN_RVC CSTG_EN

DZ170 1

UZ19

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

TPS2 2961 DNYR_ WS ON8

4.4mohm/6A
TR=12.5us@Vin=1.05V

1

CZ1702

0.1U_0402_10V7K

2

VOUT

GND

PJP32
Always Short

PJP32

PJP@

PAD-OPEN1x3m

1 2

CZ82

0.1U_0402_10V7K

1 2

RC238 0_0603_5%

pop option with UZ21

+1.0V_VCCST+1.0V_VCCSTG

@

@

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CPU (12/14)

CPU (12/14)

CPU (12/14)

LA-D071P

LA-D071P

LA-D071P

17 64Thur sday , J uly 09 , 2015

17 64Thur sday , J uly 09 , 2015

17 64Thur sday , J uly 09 , 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

+1.0V_PRIM

D D

+1.8V_PRIM

C C

+3VALW_PCH

+1.8V_PRIM

B B

+3VALW +3.3V_ALW_DSW

A A

Imax : 2.57A

ShortPad

Jason 6/25

1 2

@

RC194 0_0805_5%

RC194 POP op tion f or Volu me

RC299 0_0603_5%

1 2

@

ShortPad

RC300 0_0603_5%

1 2

@

ShortPad

RC301 0_0603_5%

1 2

@

ShortPad

RC302 0_0603_5%

1 2

@

ShortPad

RC303 0_0603_5%

1 2

@

ShortPad

Jason 6/25

RC304 0_0603_5%

1 2

@

ShortPad

1 2

@

RC234 0_0603_5%

RC235 0_0603_5%

1 2

@

ShortPad

RC211 0_0603_5%

1 2

@

Jason 6/25

ShortPad

1 2

@

RC212 0_0603_5%

RC305 0_0603_5%

1 2

@

ShortPad

RC306 0_0603_5%

1 2

@

ShortPad

RC307 0_0603_5%

1 2

@

ShortPad

RC308 0_0603_5%

1 2

@

ShortPad

Jason 6/25

ShortPad

RC213

0_0603_5%

1 2

@

Jason 6/25

RC214

0_0603_5%

1 2

@

ShortPad

Jason 6/25

5

+1.0V_PRIM_CORE

+1.0V_MPHYAON

8/28 schematic review

+1.0V_CLK6

+1.0V_DTS

+1.0V_CLK1

+1.0V_CLK3

+1.8V_PGPPF

+3.3V_1.8V_PGPPG

+3.3V_1.8V_PGPPA

+3.3V_PGPPB+3VALW_PCH

+3.3V_PGPPC

+3.3V_PGPPD

+3.3V_PGPPE

+3.3V_SPI

@

22U_0603_6.3V6M

22U_0603_6.3V6M

CC279

1

1

2

2

@

CC280

Change CC215 to 8.2p for RF team.
Jason 6/1

close UC1.AF20 and <400mil

close UC1.K15, UC1.L15 and <100mil

1

2

close UC1.V15 and <100mil

Change CC1801 to 8.2p for RF team.
Jason 6/1

+3VALW +1.8V_PRIM +1.0V_PRIM

1

2

+1.0V_MPHYAON

1

2

CC203

1U_0402_6.3V6K

+1.0V_MPHYGT

close UC1.N15 and CC210 <400mil, CC211 <120mil

1

2

close UC1.AJ19 and <400mil

+1.0V_SRAM

1

2

1 2

RC169

0_0603_5%

ShortPad

Jason 6/25

CC281

@

0.1U_0402_10V7K

Jason 6/25

ShortPad

RC172

0_0603_5%

1 2

CC271

47U_0805_6.3V6M

4

close UC1.AL1 and <120mil

1

2

CC204

1U_0402_6.3V6K

1

CC210

2

@

CC211

+3VALW_PCH

1U_0402_6.3V6K

47U_0805_6.3V6M

RF@

CC217

+1.0V_APLLEBB

@

1U_0402_6.3V6K

1

2

+1.0V_AMPHYPLL+1.0V_MPHYGT

@

1

2

+1.0V_APLL+1.0V_PRIM

@

8.2P_0402_50V8D

CC1801

1

RF@

2

1

1

CC272

2

2

47U_0805_6.3V6M

4

+1.0V_PRIM_CORE

1

CC205

2

@

1U_0402_6.3V6K

close UC1.AF18 and <400mil

+1.0V_AMPHYPLL

+1.0V_APLL

+1.0V_PRIM

8.2P_0402_50V8D

+3.3V_ALW_DSW

CC215

1

2

+3.3V_SPI

+3VALW_PCH

+1.0V_PRIM

close UC1.N18 and <120mil

CC218

1U_0402_6.3V6K

close UC1.K15 and <120mil

1

CC219

2

@

CC264

@

1U_0402_6.3V6K

47U_0805_6.3V6M

0.1U_0603_25V7K

CC225

1

@

2

+1.0V_PRIM_CORE

1

CC273

CC274

2

47U_0805_6.3V6M

47U_0805_6.3V6M

+1.0V_PRIM

close UC1.AB19 an d <400milclose UC1.K17 and <120mil

1

CC206

2

@

1U_0402_6.3V6K

AD17
AD18

close UC1.K19 and <100mil

close UC1.N20 and <100mil

3

PCH PWR

UC1O

AB19
AB20

P18

AF18
AF19

V20
V21

AL1

K17

L1

N15
N16
N17
P15
P16

K15
L15

V15

AB17

Y18

AJ17

AJ19

AJ16

AF20
AF21

T19
T20

AJ21

AK20

N18

SKL-U_BGA1356

Jason 6/25 Jason 6/25

ShortPad

RC170

0_0603_5%

1 2

Jason 6/25

ShortPad

0_0603_5%

1 2

CPU POWER 4 OF 4

VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0

VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE

DCPDSW_1P0

VCCMPHYAON_1P0
VCCMPHYAON_1P0

VCCMPHYGT_1P0_N15
VCCMPHYGT_1P0_N16
VCCMPHYGT_1P0_N17
VCCMPHYGT_1P0_P15
VCCMPHYGT_1P0_P16

VCCAMPHYPLL_1P0
VCCAMPHYPLL_1P0

VCCAPLL_1P0

VCCPRIM_1P0_AB17
VCCPRIM_1P0_Y18

VCCDSW_3P3_AD17
VCCDSW_3P3_AD18
VCCDSW_3P3_AJ17

VCCHDA

VCCSPI

VCCSRAM_1P0
VCCSRAM_1P0
VCCSRAM_1P0
VCCSRAM_1P0

VCCPRIM_3P3_AJ21

VCCPRIM_1P0_AK20

VCCAPLLEBB

@

RC173

@

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

SKL-U

AK15

VCCPGPPA

AG15

VCCPGPPB

Y16

VCCPGPPC

Y15

VCCPGPPD

T16

VCCPGPPE

AF16

VCCPGPPF

AD15

VCCPGPPG

DCPRTC

VCCCLK1

VCCCLK2

VCCCLK3

VCCCLK4

VCCCLK5

VCCCLK6

V19

T1

AA1

AK17

AK19
BB14

BB10

A14

K19

L21

N20

L19

A10

AN11
AN13

VCCPRIM_3P3_V19

VCCPRIM_1P0_T1

VCCATS_1P8

VCCRTCPRIM_3P3

VCCRTC_AK19
VCCRTC_BB14

GPP_B 0/C ORE_VI D0
GPP_B 1/C ORE_VI D1

Take care!!! Note1 on Page 19

15 OF 20

+1.0V_CLK2+1.0V_PRIM

1

CC220

2

@

47U_0805_6.3V6M

+1.0V_CLK4+1.0V_PRIM

1

CC226

2

@

47U_0805_6.3V6M

3

close UC1.L19 and <100mil

+1.0V_MPHYGT source

MPHYP_ PWR_ EN<11>

close UC1.AG15 an d <120mil

+3.3V_1.8V_PGPPA

+3.3V_PGPPD

+1.8V_PGPPF
+3.3V_1.8V_PGPPG

+1.0V_DTS

+3VALW_PCH

close UC1.AK19 and <120mil

close UC1.BB10 and <120mil

+1.0V_CLK1

+1.0V_CLK2

+1.0V_CLK3

+1.0V_CLK4

+1.0V_CLK5

CORE_VID0 <46>
CORE_VID1 <46>

ShortPad

RC171

0_0603_5%

1 2

@

1

2

+1.0V_PRIM

+5VALW

1

1

CZ84

CZ88

2

2

@

1U_0402_6.3V6K

0.1U_0402_10V7K

2

close UC1.Y16 and <400mil

+3.3V_PGPPB

+3.3V_PGPPC

1

CC265

2

@

1U_0402_6.3V6K

close UC1.AA1 a nd <400mil

1

2

CC214

0.1U_0402_10V7K

+1.0V_CLK6

1

2

CC221

@

47U_0805_6.3V6M

UZ20 @

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

TPS2 2961 DNYR_ WS ON8

4.4mohm/6A
TR=12.5us@Vin=1.05V

2

+1.0V_MPHYGT

+3.3V_PGPPE

close UC1.T16 and <400mil

1

2

+RTC_CELL

1

2

1

CC207

@

1U_0402_6.3V6K

CC270

CC208

2

@

1U_0402_6.3V6K

+3VALW_PCH

+1.8V_PRIM

1

2

1

2

CC213

1U_0402_6.3V6K

0.1U_0402_10V7K

CC212

1U_0402_6.3V6K

close UC1.A10 and <120mil

CC216

@

1U_0402_6.3V6K

+3VALW_PCH+1.0V_CLK5+1.0V_PRIM

close UC1.AK17 and <120mil

1

1

CC223

2

2

CC224

1U_0402_6.3V6K

0.1U_0402_10V7K

+1.0V_PRIM +1.0V_MPHYGT

Jason 6/25

RC368

0_0603_5%

1 2

@

ShortPad

+1.0V_MPHYGT

6

VOUT

GND

5

1

CZ85

2

@

0.1U_0402_10V7K

DELL CONFIDENTIAL/PROPRIETARY

Title

Title

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Jason 6/25

RC309 0_0603_5%

1 2

@

ShortPad

RC310 0_0603_5%

1 2

@

+1.0V_SRAM

+1.0V_APLLEBB

ShortPad

close UC1.V19 and <120mil

1

CC209

2

@

1U_0402_6.3V6K

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

CPU (13/14)

CPU (13/14)

CPU (13/14)

LA-D071P

LA-D071P

LA-D071P

18 64Thur sday , J uly 09 , 2015

18 64Thur sday , J uly 09 , 2015

18 64Thur sday , J uly 09 , 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

Note1: VCCPRIM_CORE Implementation with PCH CORE_VID Recommendation

SKL-U

UC1P

GND 1 OF 3

A5

VSS

A67

VSS

A70

VSS

AA2

VSS

AA4

D D

C C

B B

AA65
AA68
AB15
AB16
AB18
AB21

AD13
AD16
AD19
AD20
AD21
AD62

AE64
AE65
AE66
AE67
AE68
AE69

AF10
AF15
AF17

AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13

AH63
AH64
AH67
AJ15
AJ18
AJ20

AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69

AL28
AL32
AL35
AL38

AL45
AL48
AL52
AL55
AL58
AL64

AB8

AD8

AF1

AF2
AF4

AH6

AJ4

AK8
AL2

AL4

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SKL-U_BGA1356

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

16 OF 20

AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58

AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38

AV68
AV69
AV70

AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57

AW6
AW60
AW62
AW64
AW66

AW8

AY66

BA10
BA14
BA18

BA23
BA28
BA32
BA36

BA45

AV1

B10
B14
B18
B22
B30
B34
B39
B44
B48
B53
B58
B62
B66
B71

BA1

BA2

F68

UC1Q

GND 2 OF 3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SKL-U_BGA1356

SKL-U

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

17 OF 20

BA49
BA53
BA57
BA6
BA62
BA66
BA71
BB18
BB26
BB30
BB34
BB38
BB43
BB55
BB6
BB60
BB64
BB67
BB70
C1
C25
C5
D10
D11
D14
D18
D22
D25
D26
D30
D34
D39
D44
D45
D47
D48
D53
D58
D6
D62
D66
D69
E11
E15
E18
E21
E46
E50
E53
E56
E6
E65
E71
F1
F13
F2
F22
F23
F27
F28
F32
F33
F35
F37
F38
F4
F40
F42
BA41

F8

VSS

G10

VSS

G22

VSS

G43

VSS

G45

VSS

G48

VSS

G5

VSS

G52

VSS

G55

VSS

G58

VSS

G6

VSS

G60

VSS

G63

VSS

G66

VSS

H15

VSS

H18

VSS

H71

VSS

J11

VSS

J13

VSS

J25

VSS

J28

VSS

J32

VSS

J35

VSS

J38

VSS

J42

VSS

J8

VSS

K16

VSS

K18

VSS

K22

VSS

K61

VSS

K63

VSS

K64

VSS

K65

VSS

K66

VSS

K67

VSS

K68

VSS

K70

VSS

K71

VSS

L11

VSS

L16

VSS

L17

VSS

SKL-U_BGA1356

UC1R

GND 3 OF 3

SKL-U

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

18 OF 20

L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21

R1: PR408,PR411 ; R2: PR417,PR418 ; R3,PR419,PR420 ; R4: PR423 ; R5: PR424

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT TH E EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADD ITION,
NEITHER TH IS SHEET NOR THE INFORMATION IT CO NTAINS WAY BE USED BY O R DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CPU (14/14)

CPU (14/14)

CPU (14/14)

LA-D071P

LA-D071P

LA-D071P

19 64Thur sday , J uly 09 , 2015

19 64Thur sday , J uly 09 , 2015

19 64Thur sday , J uly 09 , 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

DDR_A_DQS#[0..7]<7>

DDR_A_D[0..63]<7>

DDR_A_DQS[0..7]<7>

DDR_A_MA[0..15]<7>

D D

Layout Note:
Place near JDIMM1

+1.35V_MEM

1U_0402_6.3V6K

12

12

CD7

CD2

10U_0603_6.3V6M

CD12

CD13@

12

12

Layout Note:
Place near
JDIMM1.203,204

0.1U_0402_10V7K

CD24

1

1

2

2

1U_0402_6.3V6K

10U_0603_6.3V6M

0.1U_0402_10V7K

CD25

1U_0402_6.3V6K

1U_0402_6.3V6K

12

CD3

10U_0603_6.3V6M

CD14

12

0.1U_0402_10V7K

1

2

1U_0402_6.3V6K

12

12

CD9

CD8

10U_0603_6.3V6M

10U_0603_6.3V6M

@

CD15

CD16

12

12

0.1U_0402_10V7K

CD26

CD27

1

12

2

1U_0402_6.3V6K

1U_0402_6.3V6K

12

12

CD4

@

CD17

CD11

CD10

10U_0603_6.3V6M

10U_0603_6.3V6M

CD18

12

12

10U_0603_6.3V6M

10U_0603_6.3V6M

@

12

CD28

CD29

1U_0402_6.3V6K

12

C C

+1.35V_MEM

10U_0603_6.3V6M

12

B B

A A

+0.675V_DDR_VT T

330U_D3_2.5VY_R6M

@

12

CD19

+

Note:
Check voltage tolerance of
VREF_DQ at the DI MM socket

@

CD20

Short Pad

@

1 2

RD15

@

1 2

RD16

Short Pad

0_0402_5%

0_0402_5%

2.2U_0402_6.3V6M

@

12

CD5

DDR_A_CKE0<7>

DDR_A_BS2<7>

DDR_A_CLK0<7>
DDR_A_CLK#0<7> DDR_A_CLK#1 <7>

DDR_A_BS0<7>

DDR_A_WE#<7 >

DDR_A_CAS#<7>

DDR_A_CS#1<7>

+3VS

+0.675V_DDR_VT T +0.675V_DDR_VT T

0.1U_0402_10V7K

2.2U_0402_6.3V6M

CD32

@

1

12

CD31

2

+1.35V_MEM +1.35V_MEM+DDR_VREF_A_DQ0

DDR_A_D4 DDR_A_D0
DDR_A_D5

DDR_A_D3
DDR_A_D7

DDR_A_D9
DDR_A_D8

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D37 DDR_A_D36

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D38
DDR_A_D34

DDR_A_D44
DDR_A_D45

DDR_A_D42
DDR_A_D46

DDR_A_CKE0

DDR_A_BS2

DDR_A_MA12 DDR_A_MA11
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3 DDR_A_MA2
DDR_A_MA1 DDR_A_MA0

DDR_A_CLK0

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13
DDR_A_CS#1

DDR_A_D30
DDR_A_D26

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D27
DDR_A_D29

DDR_A_D21
DDR_A_D17

DDR_A_D19
DDR_A_D22

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_D63
DDR_A_D62

Reverse Type

JDIMM1

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

BOSS1

FOX AS0A621-J4RB-7H

CONN@

DQS0#

DQS0

DQ12
DQ13

RESET#

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3

DQ30
DQ31

CKE1

CK1#

RAS#

ODT0

ODT1

VREF_CA

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5

DQ46
DQ47

DQ52
DQ53

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7

DQ62
DQ63

EVENT#

GND2

BOSS2

2

VSS

4

DQ4
DQ5

VSS

VSS
DQ6
DQ7

VSS

VSS
DM1

VSS

VSS

VSS
DM2

VSS

VSS

VSS

VSS

VSS

VDD

A15
A14

VDD

A11

A7

VDD

A6
A4

VDD

A2
A0

VDD

CK1

VDD

BA1

VDD

S0#

VDD

NC

VDD

VSS

VSS
DM4

VSS

VSS

VSS

VSS

VSS

VSS
DM6

VSS

VSS

VSS

VSS

VSS

SDA

SCL

VTT

DDR_A_D1

6
8
10

DDR_A_DQS#0

12

DDR_A_DQS0

14
16

DDR_A_D6

18

DDR_A_D2

20
22

DDR_A_D13

24

DDR_A_D12

26
28
30

DDR_DRAMRST#_R

32
34

DDR_A_D15

36

DDR_A_D14

38
40

DDR_A_D32DDR_A_D35

42
44
46
48
50

DDR_A_D39

52

DDR_A_D33

54
56

DDR_A_D40

58

DDR_A_D41

60
62

DDR_A_DQS#5

64

DDR_A_DQS5

66
68

DDR_A_D47

70

DDR_A_D43

72

74

DDR_A_CKE1

76
78

DDR_A_MA15

80

DDR_A_MA14

82
84
86

DDR_A_MA7

88
90

DDR_A_MA6

92

DDR_A_MA4

94
96
98
100
102

DDR_A_CLK1

104

DDR_A_CLK#1DDR_A_CLK#0

106
108

DDR_A_BS1

110

DDR_A_RAS#

112
114

DDR_A_CS#0

116
118
120
122
124
126
128
130

DDR_A_D31

132

DDR_A_D25

134
136
138
140

DDR_A_D28

142

DDR_A_D24

144
146

DDR_A_D20

148

DDR_A_D16

150
152

DDR_A_DQS#2

154

DDR_A_DQS2

156
158

DDR_A_D18

160

DDR_A_D23

162
164

DDR_A_D53

166

DDR_A_D52

168
170
172
174

DDR_A_D54

176

DDR_A_D55

178
180

DDR_A_D61

182

DDR_A_D60

184
186

DDR_A_DQS#7

188

DDR_A_DQS7

190
192

DDR_A_D58

194

DDR_A_D59

196
198
200
202
204

206
208

0.1U_0402_25V6

ESD@

CD6

12

CAD NOTE
PLACE THE CAP NEAR T O DIMM RESET PIN

DDR_A_CKE1 <7 >

DDR_A_CLK1 <7>

DDR_A_BS1 <7>

DDR_A_RAS# <7 >

DDR_A_CS#0 <7>

DDR_A_ODT0 <7>

DDR_A_ODT1 <7>

2.2U_0402_6.3V6M

@

CD23

12

PCH_SMBDAT <8,21,34>

PCH_SMBCLK <8,21,34>

+DDR_VREF_A_CA

RD29

0_0402_5%

DDR_DRAMRST#_R<2 1>

Short Pad

+DDR_VREF_A_DQ0

1 2

Jason 6/24

DDR3L SODIMM ODT GENERATION

9/17 delete ODT Gen ertation, connect directly to CPU
refer 546765_2 014WW37_SkylakeU_Y_MOW_Rev_1_0

@

+1.35V_MEM

1.8K_0402_1%

12

RD4

RD5 2_0402_1%

1.8K_0402_1%

12

RD6

+1.35V_MEM

12

1 2

470_0402_1%

RD2

DDR_DRAMRST#

12

24.9_0402_1%

12

RD7

DDR_DRAMRST# <7>

+DDR_VREF_A_DQ

0.022U_0402_16V7K

CD21

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIE D WITHOUT THE EXPRESS WRITTEN A UTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

5

4

3

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

2

Title

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

Date: Sh eet of

Date: Sh eet of

Date: Sh eet of

Compal Electronics, Inc.

DDR3L

DDR3L

DDR3L

LA-D071P

LA-D071P

LA-D071P

1

20 64Thu rsday, July 09, 2015

20 64Thu rsday, July 09, 2015

20 64Thu rsday, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)