COMPAL LA-D071P Schematics

A

COMPAL CONFIDENTIAL

B

C

D

E

1 1

MODEL NAME : AAL15

SKL-U+MEC1404 VC board

PCB NO : DA800140000
BOM P/N :

GPIO MAP:

ZZZ

DAZ1GG00100

PCB@

PCB AAL15 LA-D07 1P LS-D071P/D0 72P/D073P

(LS-D071P/D072P/D073 P/B844P/B845P/B915P)

2 2

3 3

ZZZ

PCB 1G9 LA-D0 71P REV0 M/B 4

UC1

i7-R1

FJ806620 1930408 SR 2EZ D1 2.5G BGA

UC1

i5-R1

FJ806620 1930409 SR 2EY D1 2.3G BGA

UC1

i3-R1

FJ806620 1931104 SR 2EU D1 2.3G BGA

UC1

i5(2+3e)

ES0

FJ806620 1930823 Q J57 J0 1.6G

PCB

DA80014000 0

MB@

CPU R1

SA000092P2 L

i7SKL2.5GR1@

SA000092O2L

i5SKL2.3GR1@

SA000092N3L

i3SKL2.3GR1@

SA00008Y40 L

SKL1.6G23@

PCB

UC1

i7-R3

FJ806620 1930408 SR 2EZ D1 2.5G A31!

UC1

i5-R3

FJ806620 1930409 SR 2EY D1 2.3G A31!

UC1

i3-R3

FJ806620 1931104 SR 2EU D1 2.3G A31!

SA000092P3 L

i7SKL2.5GR1@

SA000092O3L

i5SKL2.3GR3@

SA000092N4L

i3SKL2.3GR3@

CPU R3

@ : Nopop Component
i3SKL2.3GR1@/i5SKL2.3GR1@/i7SKL2.5GR1@/SKL1.6G23R1@:CPU R1
i3SKL2.3GR3@/i5SKL2.3GR3@/i7SKL2.5GR3@/SKL1.6G23R3@:CPU R3
UMA@/DIS@ : UMA & DIS Type
DSX@/N_DSX@: DSX Mode
EMI@/ESD@/HDMI@EMI@/RF@ : EMI, ESD and RF Component
@EMI@/@ESD@/@RF@ : EMI, ESD and RF Nopop Component
CMC@ : XDP Component
CONN@ : Connector Component
100@/1000@/LAN_SW@ : LAN type
3234@/3246@ : CODEC type
CRT@/HDMI@ : CRT/HDMI
TP_WAKE@/NOTP_WAKE@ : TouchPad wake
ODD@/NOZPODD@/ZPODD@ : ODD and Zero Power

EXOR1@/MESOR1@ : GPU R1

2015-07-09

REV : 1.0 (A00)

EXOR3@/MESOR3@ : GPU R3
EXO@/MESO@ : GPU relative component
2G_H@/2G_S@/2G_M@/4G_H@/4G_S@/4G_M@ : VRAM type

Layout Dell logo

V_4G@ : 4G VRAM Support component

4 4

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

LA-D071P

LA-D071P

LA-D071P

1 64Thursday, July 09, 2015

1 64Thursday, July 09, 2015

1 64Thursday, July 09, 2015

E

1.0(A00)

1.0(A00)

1.0(A00)

COPYRIGHT 2014
ALL RIGHT RESERVED
REV: X00
PWB: 9HTP8

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

A

B

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

D

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

A

B

C

D

E

Tulip2_VC 14 Block Diagram

Memory BUS (DDR3L)

1 1

DIS only

1333/1600MHz

DDR3L-SO-DIMM X2

BANK 0, 1, 2, 3

P.20~P.21

USB2.0[1]

VRAM(DDR3L) *8

1GB, 2GB (Reserve 4GB)

P.61~P.62

Thermal
W83L771AWG-2

2 2

eDP CONN

P.32

DDR3L

USB2.0[5]

USB2.0[7]

SMBUS

GPU

AMD
Meso/Exo

P.56~P.60

eDP Lane x 2

HDMI 1.4a
VGA/RTD2168-CGT

P.33~P.34

PCIE x 4

INTEL

USB

SKYLAKE_U

DDI[1]

USB2.0[8]

RTS5170-GR

I2C

P.6~P.19

HD Audio I/F

HDA CODEC
ALC3234-CG

PCIE[9] PCIE[5]

Touch PAD

3 3

P.38

LPC

LPC
debug
port

P.29

P.29

SMBUS

Thermal
NCT7718

Fan controller
APL5606AKI

LAN
RTL8106E-CG /
RTL8111G-CG

Transformer

P.25 P.36

P.26

RJ45

P.26

NGFF WLAN+BT

AC 3160

USB2.0[6]

PS2

KBC
MEC1404

SATA(Gen3) x 1

SATA(Gen1) x 1

SPI

W25R128FVSIQ
16MB

P.38

P.38

HDD

ODD

Fan CONN

P.38

P.35

P.35

P.8

P.23

USB3.0[1]

USB2.0[2]

USB2.0[3]

USB2.0[5]

USB2.0[6]

USB2.0[7]

P.27

Speaker

Universal Jack

Dig. MIC

USB1(USB3.0)

Debug,IOB

IOB

CCD

BT

Touch Screen

SD CARDCard reader

P.24

P.24

P.24

P.30

P.30,P.39

P.30,P.39

P.32

P.36

P.32

P.28

KB

4 4

KB-BL

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

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B

C

P.38

P.38

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal El ectronics, Inc.

Block diagram

Block diagram

Block diagram

LA-D071P

LA-D071P

LA-D071P

2 64Thursday, July 09, 2015

2 64Thursday, July 09, 2015

2 64Thursday, July 09, 2015

E

1.0(A00)

1.0(A00)

1.0(A00)

POWER STATES

5

SLP
S3#

HIGH

SLP

SLP

S5#

S4#

HIGH HIGH

LOW

LOW

Signal

State

S0 (Full ON) / M0

S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON

S4 (Suspend to DISK) / M3 ONLOW HIGH

S5 (SOFT OFF) / M3 ONLOW LOW

D D

PM TABLE

+1.0V_PRIM

+RTC_CELL

+1.8V_EDRAM

power

+1.8V_PRIM

plane

+5VALWP

+3VALWP

+5VALW

State

S0

S3

S5 S4/AC

S5 S4/AC doesn't exist

C C

+3VALW

+1.0V_MPHYGT

+1.0V_PRIM_CORE

+3.3V_ALW_DSW

ON

ON

4

ALWAYS

SUS

PLANE

PLANE

ON

ON

ON

OFF

OFF OFF

+3VALW_PCH

+1.0V_VCCST

ON ON

ON

OFF

OFFOFF

RUN
PLANE

ON ON

OFF

OFF

OFF

+1.35V_MEM

+1.0V_VCCSTG

+VCC_CORE

+VCC_GT

+1.0VS_VCCIO

+VCC_SA

+VCC_EDRAM

+VCC_EOPIO

OFFON

OFF

OFF

CLOCKS

OFF

OFF

3

USB3.0

USB3.0-1

USB3.0-2

USB3.0-3

USB3.0-4

USB3.0-5

USB3.0-6

SSIC

SSIC-1

SSIC-2

PCIE

PCIE-1

PCIE-2

PCIE-3

PCIE-4

PCIE-5

PCIE-6

PCIE-7

PCIE-8

PCIE-9

PCIE-10

PCIE-11

PCIE-12

SATA

SATA-0

SATA-1

SATA-1*

SATA-2

2

USB3.0 Port1

N/A

N/A

N/A

GPU

GPU

GPU

GPU

WLAN

LAN/GLAN

SATA HDD

SATA ODD

N/A

N/A

N/A

N/A

1

USB PORT#DESTINATION

DESTINATION

1

USB3.0 Port1

2

3

4

5

6

7

8

9

10

IO/DB

IO/DB

N/A

CCD

Card Reader

Touch Screen

BT

N/A

N/A

Board ID & Model ID table

Pull-downItem Pull-up Voltage

1

100

2

3

4

5

6

7

8

9

10

11

12

13

14

B B

15

16

17

18

19

10.0

100

13.7

100

17.8

100

22.1

100

27.0

100

32.4

100

37.4

100

49.9

100

57.6

100

64.9

100

73.2

100

82.5

100

93.1

100

107.0

100

120.0

100

137.0

100

154.0

100

200.0

100

232.0

3.000

2.902

2.801

2.703

2.598

2.492

2.402

2.201

2.094

2.001

1.905

1.808

1.709

1.594

1.500

1.392

1.299

1.100

0.994

Board ID/Model ID

Pre-EVT

EVT

DVT1

DVT2

A A

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

5

4

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Port assignment

Port assignment

Port assignment

LA-D071P

LA-D071P

LA-D071P

1

3 64Thursday, July 09, 2015

3 64Thursday, July 09, 2015

3 64Thursday, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

5

CPU PWR

GPU PWR

Peripheral Device PWR

RT8207PGQW
(PU200)

ADAPTER

D D

SYX196DQNC
(PU301)

CHARGER
ISL95520HRZ
(PU703)

+PWR_SRC

4

SIO_SLP_S4#

0.675V_DDR_VTT_ON

@+1.0V_PRIM_CORE_PG
@SIO_SLP_SUS#

POK

+1.35VP +1.35V_MEM

+0.675VSP

PJP202

PJP203

+1VALWP

+0.675V_DDR_VTT

+1.0V_PRIM

3

PJP302

EM5209VF
(U5602)

DGPU_PWROK

TPS22961
(UZ19)

TPS22961
(UZ20)

TPS22967
(UZ21)

0ohm 0805
(RC194)

EM5209VF
(U15)

2

J13PJP200

+1.35V_MEM_GFX

SIO_SLP_S3#

&

SIO_SLP_S0#

MPHYP_PWR_EN

SIO_SLP_S4#

Volume

DGPU_PWR_EN

+1.0V_VCCSTG_C

+1.0V_MPHYGT

+1.0V_VCCST_C

+1.0V_PRIM_CORE

J11

+0.95VSDGPU

+1.0VS_VCCIO

Volume

+1.0V_VCCSTG

PJP27

+1.0V_VCCST

1

PJP15

PJP32

BATTERY

C C

DGPU_PWR_EN

AOZ5019QI
(PU604)

AOZ5019QI
(PU605)

+VCC_GT

ISL95857HRTZ
(PU602)

ISL95808HRZ
(PU606)

B B

IMVP_VR_ON

+VCC_SA

A A

AOZ5019QI
(PU603)

+5VS

+VCC_CORE

ISL62771HRTZ
(PU1100)

+VGA_CORE

U23@

+5VS

SY8286CRAC
(PU102)

SY8286BRAC
(PU100)

ALWON

ALWON

PJP102

+3VALW

+3VLP

+RTC_VCC

PJP103

+5VALW

VL

BAS40C
(D2501)

+RTC_CELL

AP22802BW5
(U3504)

AP22802BW5
(U3505)

EM5209VF
(UZ2)

TPS22967DSGR
(UX1)

EM5209VF
(UZ2)

PJP23

(NON-DS3)

SY6288C10CAC
(UZ3)

TPS62134ARGT
(PU401)

TPS62134ARGT
(PU402)

TPS62134CRGT
(PU1200)

TPS62134CRGT
(PU1201)

TPS62134ARGT
(PU501)

U23@

U23@

USB_EN#

USB_EN#

SIO_SLP_S3#

3D_CAM_EN

SIO_SLP_S3#

PCH_ALW_ON

PJP22

(DS3)

SIO_SLP_S3#

Premium

@SIO_SLP_SUS#

POK

Premium

(DS3)
(NON-DS3)

SIO_SLP_S3#

SIO_SLP_S3#

@SIO_SLP_SUS#

POK

(DS3)
(NON-DS3)

USB30_VCCC

USB20_VCCA

PJP21

+5VS

J14

+5V_CAM

PJP13

+3VS

PJP23

+3VALW_PCH

PJP401

+1.0VS_VCCIO

PJP402

+1.0V_PRIM_CORE

PJP1200

+VCC_EDRAM

PJP1201

+VCC_EOPIO

+1.8VALWP +1.8V_PRIM

0ohm 0805
(R5601)

0ohm 0805
(R5603)

TPS2001CDGNR
(U5601)

RB551V-30
(D5501)

FUSE 0.5A_13.2V
(F6201)

RT9724GB
(U5201)

0ohm 0805
(R5809)

EM5209VF
(U5602)

PJP502

EDP_VDD_EN

LCD_TST

DGPU_PWR_EN

EM5209VF
(U15)

5V_HDD_S0

ODD_PWR_5V

SATA_ODD_PWRGT

FUSE 1.1A_6V
(F5501)

+5V_KB_BL

or

LCDVDD_EN

LCDVDD

+3.3V_WLAN

+3VGS

DGPU_PWR_EN

5V_HDMI_CRT_S0_R

J12

J10

+1.8VGS

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal El ectronics, Inc.

Power rai ls

Power rai ls

Power rai ls

LA-D071P

LA-D071P

LA-D071P

4 64Thursday, July 09, 2015

4 64Thursday, July 09, 2015

4 64Thursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

R7

SMBCLK

R8

SMBDATA

D D

SKL-U

R9

W2

SML0_SMBCLK

SML0_SMBDATA

1k ohm

1k ohm

W3

SML1CLK

V3

SML1DATA

DMN66D DMN66D

U6 U7

C C

@

2.2k ohm

+3VALW_EC

12 11

SMB02_CLK

B B

KBC

@

2.2k ohm

GPU_THM_SMBCLK

GPU_THM_SMBDAT

SMB02_DATA

I2C_SCL_TP

I2C_SDA_TP

MEC 1404

GPIO114

GPIO115

SMB01_CLK

SMB01_DATA

A A

78

79

9

8

CLK_TP_SIO

DAT_TP_SIO

PBAT_CHG_SMBCLK

PBAT_CHG_SMBDAT

4

1k ohm

1k ohm

1k ohm

1k ohm

+3VALW_PCH

4.7k ohm

4.7k ohm

I2C_SCL_TP

I2C_SDA_TP

4.7k ohm

4.7k ohm

4.7k ohm

4.7k ohm

+3VALW_PCH

DMN66D

+3VALW_PCH

GPU_THM_SMBCLK

GPU_THM_SMBDAT

GPU_THM_SMBCLK

GPU_THM_SMBDAT

TP_VDD

2N7002

TP_VDD

+3VALW_EC

100 ohm

100 ohm

0 ohm

0 ohm

CLK_SMB

DAT_SMB

2N7002

6

5

3

4

PCH_SMBCLK

PCH_SMBDAT

BATT
CONN

Charger

2.2k ohm

2.2k ohm

I2C_SCL_TP_Q

I2C_SDA_TP_Q

CLK_TP_SIO

DAT_TP_SIO

3

DIS@

45.3k ohm

DIS@

45.3k ohm

VGA_SMB_CK3

VGA_SMB_DA3

2.2k ohm

2.2k ohm

THM_SML1_CLK

THM_SML1_DATA

+3VS

3

2

8

7

2.2k ohm

2.2k ohm

+3VGS

+3VS

TP CONN

+3VALW_EC

Thermal
(SYSTEM)

MESO@
0 ohm

MESO@
0 ohm

VGA_SMB_CK3

VGA_SMB_DA3

VGA_SMB_CK3_R

VGA_SMB_DA3_R

2

PCH_SMBCLK

PCH_SMBDAT

PCH_SMBCLK

PCH_SMBDAT

PCH_SMBCLK

PCH_SMBDAT

202

200

202

200

2

3

DIMMA

DIMMB

DP to VGA

1

U7

dGPU

U8

3

Thermal

4

(GPU)

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal El ectronics, Inc.

SMbus Block diagram

SMbus Block diagram

SMbus Block diagram

LA-D071P

LA-D071P

LA-D071P

5 64Thursday, July 09, 2015

5 64Thursday, July 09, 2015

5 64Thursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

+3VS

12

RC175 2 .2K_0402_5%

RC178 2 .2K_0402_5%

D D

RE439

C C

B B

PCH_HDMI_CLK

12

PCH_HDMI_DATA

12

WLAN_RADIO_DIS#

10K_0402_5%

+1.0VS_VCCIO

HDMI_CRT_N0<33,34>
HDMI_CRT_P0<33,34>
HDMI_CRT_N1<33,34>
HDMI_CRT_P1<33,34>
HDMI_DATA0#<33>
HDMI_DATA0<33>
HDMI_CLK#<33>
HDMI_CLK<33>

PCH_HDMI_CLK<33>

PCH_HDMI_DATA<33>

1 2

RC2 24.9_0402_1%

COMPENSATION PU FOR eDP

CAD Note:Trace width=20 mils ,Spacing=25mil,
Max length=100 mils.

PCH_HDMI_CLK
PCH_HDMI_DATA

EDP_COMP

UC1A

E55

DDI1_TXN[0]

F55

DDI1_TXP[0]

E58

DDI1_TXN[1]

F58

DDI1_TXP[1]

F53

DDI1_TXN[2]

G53

DDI1_TXP[2]

F56

DDI1_TXN[3]

G56

DDI1_TXP[3]

C50

DDI2_TXN[0]

D50

DDI2_TXP[0]

C52

DDI2_TXN[1]

D52

DDI2_TXP[1]

A50

DDI2_TXN[2]

B50

DDI2_TXP[2]

D51

DDI2_TXN[3]

C51

DDI2_TXP[3]

L13

GPP_E18/DDPB_CTRLCLK

L12

GPP_E19/DDPB_CTRLDATA

N7

GPP_E20/DDPC_CTRLCLK

N8

GPP_E21/DDPC_CTRLDATA

N11

GPP_E22/DDPD_CTRLCLK

N12

GPP_E23/DDPD_CTRLDATA

E52

EDP_RCOMP

SKL-U_BGA1356

SKL-U Ballout Rev0.71 & INTEL symbol Rev1.0

UC1I

CSI-2

A36

CSI2_DN0

B36

CSI2_DP0

C38

CSI2_DN1

D38

CSI2_DP1

C36

CSI2_DN2

D36

CSI2_DP2

A38

CSI2_DN3

B38

CSI2_DP3

C31

CSI2_DN4

D31

CSI2_DP4

C33

CSI2_DN5

D33

CSI2_DP5

A31

CSI2_DN6

B31

CSI2_DP6

A33

CSI2_DN7

B33

CSI2_DP7

A29

CSI2_DN8

B29

CSI2_DP8

C28

CSI2_DN9

D28

CSI2_DP9

A27

CSI2_DN10

B27

CSI2_DP10

C27

CSI2_DN11

D27

CSI2_DP11

SKL-U_BGA1356

SKL-U

DDI

DISPLAY SIDEBANDS

SKL_ULT

1 OF 20

EDP

EDP_DISP_UTIL

GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3

GPP_E17/EDP_HPD

EDP_BKLTCTL

CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3

CSI2_COMP

GPP_D4/FLASHTRIG

EMMC

GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7

GPP_F21/EMMC_RCLK

GPP_F22/EMMC_CLK

GPP_F12/EMMC_CMD

EMMC_RCOMP

9 OF 20

EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]

EDP_AUXN
EDP_AUXP

DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP

EDP_BKLTEN

EDP_VDDEN

C37
D37
C32
D32
C29
D29
B26
A26

E13
B7

AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1

AM2
AM3
AP4

AT1

C47
C46
D46
C45
A45
B45
A47
B47

E45
F45

B52

G50

PCH_DPB_AUXN

F50

PCH_DPB_AUXP

E48

CPU_DP2_AUXN

F48

CPU_DP2_AUXP

G46

CPU_DP3_AUXN

F46

CPU_DP3_AUXP

L9

CPU_HDMI_HPD

L7
L6
N9

CPU_CRT_HPD

L10

R12

L_BKLT_EN_EC

R11
U13

CSI2_COMP
WLAN_RADIO_DIS#

EMMC_RCOMP

RC4 200_0402_1%

1 2

RC3

1 2

EDP_TX0_DN <32>
EDP_TX0_DP <32>
EDP_TX1_DN <32>
EDP_TX1_DP <32>

EDP_AUX_DN <32>
EDP_AUX_DP <32>

PCH_DPB_AUXN <34>
PCH_DPB_AUXP <34>

@

T1

PAD~D

@

T2

PAD~D

1 2

@

RC385

RC386 0_0402_5%

0_0402_5%

SIO_EXT_SMI# <29>

1 2

@

EDP_HPD <32>

L_BKLT_EN_EC <29>
L_BKLT_CTRL <32>
EDP_VDD_EN <32>

100_0402_1%

WLAN_RADIO_DIS# <36>

Jason 6/24

Short Pad

HDMI_CRT_DET

Change "SIO_EXT_SMI#"
PU to "+3VALW_PCH" For SW
Reserve "+3VS" PU
2015/5/19 Jason

HDMI_CRT_DET <33,34>

SIO_EXT_SMI#

SIO_EXT_SMI#

CPU_DP2_AUXN

PCH_DPB_AUXN

PCH_DPB_AUXP

CPU_DP2_AUXP

EDP_HPD

HDMI_CRT_DET

L_BKLT_EN_EC

+3VALW_PCH

12

RC23910K_0402_5%

+3VS

12

@

RC23610K_0402_5%

12

@

RC179100K_0402_5%

12

RC181100K_0402_5%

12

RC182100K_0402_5%

12

@

RC180100K_0402_5%

12

@

RC1100K_0402_5%

12

@

RC312100K_0402_5%

12

RC390100K_0402_5%

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal El ectronics, Inc.

CPU (1/14)

CPU (1/14)

CPU (1/14)

LA-D071P

LA-D071P

LA-D071P

6 64Thursday, July 09, 2015

6 64Thursday, July 09, 2015

6 64Thursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

DDR3L, Ballout for side by side(Non-Interleave)

4

3

2

1

UC1B

AL71

DDR_A_D0
DDR_A_D1

D D

DDR_A_D[32..47]<20>

DDR_B_D[0..15]<21>

C C

DDR_B_D[32..47]<21>

B B

DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47

DDR0_DQ[0]

AL68

DDR0_DQ[1]

AN68

DDR0_DQ[2]

AN69

DDR0_DQ[3]

AL70

DDR0_DQ[4]

AL69

DDR0_DQ[5]

AN70

DDR0_DQ[6]

AN71

DDR0_DQ[7]

AR70

DDR0_DQ[8]

AR68

DDR0_DQ[9]

AU71

DDR0_DQ[10]

AU68

DDR0_DQ[11]

AR71

DDR0_DQ[12]

AR69

DDR0_DQ[13]

AU70

DDR0_DQ[14]

AU69

DDR0_DQ[15]

BB65

DDR0_DQ[16]/DDR0_DQ[32]

AW65

DDR0_DQ[17]/DDR0_DQ[33]

AW63

DDR0_DQ[18]/DDR0_DQ[34]

AY63

DDR0_DQ[19]/DDR0_DQ[35]

BA65

DDR0_DQ[20]/DDR0_DQ[36]

AY65

DDR0_DQ[21]/DDR0_DQ[37]

BA63

DDR0_DQ[22]/DDR0_DQ[38]

BB63

DDR0_DQ[23]/DDR0_DQ[39]

BA61

DDR0_DQ[24]/DDR0_DQ[40]

AW61

DDR0_DQ[25]/DDR0_DQ[41]

BB59

DDR0_DQ[26]/DDR0_DQ[42]

AW59

DDR0_DQ[27]/DDR0_DQ[43]

BB61

DDR0_DQ[28]/DDR0_DQ[44]

AY61

DDR0_DQ[29]/DDR0_DQ[45]

BA59

DDR0_DQ[30]/DDR0_DQ[46]

AY59

DDR0_DQ[31]/DDR0_DQ[47]

AY39

DDR0_DQ[32]/DDR1_DQ[0]

AW39

DDR0_DQ[33]/DDR1_DQ[1]

AY37

DDR0_DQ[34]/DDR1_DQ[2]

AW37

DDR0_DQ[35]/DDR1_DQ[3]

BB39

DDR0_DQ[36]/DDR1_DQ[4]

BA39

DDR0_DQ[37]/DDR1_DQ[5]

BA37

DDR0_DQ[38]/DDR1_DQ[6]

BB37

DDR0_DQ[39]/DDR1_DQ[7]

AY35

DDR0_DQ[40]/DDR1_DQ[8]

AW35

DDR0_DQ[41]/DDR1_DQ[9]

AY33

DDR0_DQ[42]/DDR1_DQ[10]

AW33

DDR0_DQ[43]/DDR1_DQ[11]

BB35

DDR0_DQ[44]/DDR1_DQ[12]

BA35

DDR0_DQ[45]/DDR1_DQ[13]

BA33

DDR0_DQ[46]/DDR1_DQ[14]

BB33

DDR0_DQ[47]/DDR1_DQ[15]

AY31

DDR0_DQ[48]/DDR1_DQ[32]

AW31

DDR0_DQ[49]/DDR1_DQ[33]

AY29

DDR0_DQ[50]/DDR1_DQ[34]

AW29

DDR0_DQ[51]/DDR1_DQ[35]

BB31

DDR0_DQ[52]/DDR1_DQ[36]

BA31

DDR0_DQ[53]/DDR1_DQ[37]

BA29

DDR0_DQ[54]/DDR1_DQ[38]

BB29

DDR0_DQ[55]/DDR1_DQ[39]

AY27

DDR0_DQ[56]/DDR1_DQ[40]

AW27

DDR0_DQ[57]/DDR1_DQ[41]

AY25

DDR0_DQ[58]/DDR1_DQ[42]

AW25

DDR0_DQ[59]/DDR1_DQ[43]

BB27

DDR0_DQ[60]/DDR1_DQ[44]

BA27

DDR0_DQ[61]/DDR1_DQ[45]

BA25

DDR0_DQ[62]/DDR1_DQ[46]

BB25

DDR0_DQ[63]/DDR1_DQ[47]

SKL-U_BGA1356

SKL-U

DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]

DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]

DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]

DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]

DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]

DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]

DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]

DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]

DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]

DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]

DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]

DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]

DDR CH - A

DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]

DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]

DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]

DDR0_MA[3]
DDR0_MA[4]

DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]

DDR0_ALERT#

DDR0_PAR

DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ

DDR_VTT_CNTL

2 OF 20

AU53

DDR_A_CLK#0

AT53

DDR_A_CLK0

AU55

DDR_A_CLK#1

AT55

DDR_A_CLK1

BA56

DDR_A_CKE0

BB56

DDR_A_CKE1

AW56

DDR_A_CKE2

AY56

DDR_A_CKE3

AU45

DDR_A_CS#0

AU43

DDR_A_CS#1

AT45

DDR_A_ODT0

AT43

DDR_A_ODT1 DDR_B_ODT0

BA51

DDR_A_MA5

BB54

DDR_A_MA9

BA52

DDR_A_MA6

AY52

DDR_A_MA8

AW52

DDR_A_MA7

AY55

DDR_A_BS2

AW54

DDR_A_MA12

BA54

DDR_A_MA11

BA55

DDR_A_MA15

AY54

DDR_A_MA14

AU46

DDR_A_MA13

AU48

DDR_A_CAS#

AT46

DDR_A_WE#

AU50

DDR_A_RAS#

AU52

DDR_A_BS0

AY51

DDR_A_MA2

AT48

DDR_A_BS1

AT50

DDR_A_MA10

BB50

DDR_A_MA1

AY50

DDR_A_MA0

BA50

DDR_A_MA3

BB52

DDR_A_MA4

AM70

DDR_A_DQS#0

AM69

DDR_A_DQS0

AT69

DDR_A_DQS#1

AT70

DDR_A_DQS1

BA64

DDR_A_DQS#4

AY64

DDR_A_DQS4

AY60

DDR_A_DQS#5

BA60

DDR_A_DQS5

BA38

DDR_B_DQS#0

AY38

DDR_B_DQS0

AY34

DDR_B_DQS#1

BA34

DDR_B_DQS1

BA30

DDR_B_DQS#4

AY30

DDR_B_DQS4

AY26

DDR_B_DQS#5

BA26

DDR_B_DQS5

AW50
AT52

DDR_A_PAR

AY67
AY68
BA67

AW67

DDR_VTT_CNTL

DDR_A_CLK#0 <20>
DDR_A_CLK0 <20>
DDR_A_CLK#1 <20>
DDR_A_CLK1 <20>

DDR_A_CKE0 <20>
DDR_A_CKE1 <20>

@

PAD~D

@

PAD~D

DDR_A_CS#0 <20>
DDR_A_CS#1 <20>
DDR_A_ODT0 <20>
DDR_A_ODT1 <20>

DDR_A_MA5 <20>
DDR_A_MA9 <20>
DDR_A_MA6 <20>
DDR_A_MA8 <20>
DDR_A_MA7 <20>
DDR_A_BS2 <20>
DDR_A_MA12 <20>
DDR_A_MA11 <20>
DDR_A_MA15 <20>
DDR_A_MA14 <20>

DDR_A_MA13 <20>
DDR_A_CAS# <20>
DDR_A_WE# <20>
DDR_A_RAS# <20>
DDR_A_BS0 <20>
DDR_A_MA2 <20>
DDR_A_BS1 <20>
DDR_A_MA10 <20>
DDR_A_MA1 <20>
DDR_A_MA0 <20>
DDR_A_MA3 <20>
DDR_A_MA4 <20>

DDR_A_DQS#0 <20>
DDR_A_DQS0 <20>
DDR_A_DQS#1 <20>
DDR_A_DQS1 <20>
DDR_A_DQS#4 <20>
DDR_A_DQS4 <20>
DDR_A_DQS#5 <20>
DDR_A_DQS5 <20>
DDR_B_DQS#0 <21>
DDR_B_DQS0 <21>
DDR_B_DQS#1 <21>
DDR_B_DQS1 <21>
DDR_B_DQS#4 <21>
DDR_B_DQS4 <21>
DDR_B_DQS#5 <21>
DDR_B_DQS5 <21>

DDR0_PAR,DDR0_ALERT# for DDR4 DDR1_PAR,DDR1_ALERT# for DDR4

@

T7

PAD~D

+DDR_VREF_CA
+DDR_VREF_A_DQ
+DDR_VREF_B_DQ

DDR_A_D[16..31]<20>DDR_A_D[0..15]<20>

T3
T4

DDR_A_D[48..63]<20>

DDR_B_D[16..31]<21>

DDR_B_D[48..63]<21>

DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

UC1C

AF65

DDR1_DQ[0]/DDR0_DQ[16]

AF64

DDR1_DQ[1]/DDR0_DQ[17]

AK65

DDR1_DQ[2]/DDR0_DQ[18]

AK64

DDR1_DQ[3]/DDR0_DQ[19]

AF66

DDR1_DQ[4]/DDR0_DQ[20]

AF67

DDR1_DQ[5]/DDR0_DQ[21]

AK67

DDR1_DQ[6]/DDR0_DQ[22]

AK66

DDR1_DQ[7]/DDR0_DQ[23]

AF70

DDR1_DQ[8]/DDR0_DQ[24]

AF68

DDR1_DQ[9]/DDR0_DQ[25]

AH71

DDR1_DQ[10]/DDR0_DQ[26]

AH68

DDR1_DQ[11]/DDR0_DQ[27]

AF71

DDR1_DQ[12]/DDR0_DQ[28]

AF69

DDR1_DQ[13]/DDR0_DQ[29]

AH70

DDR1_DQ[14]/DDR0_DQ[30]

AH69

DDR1_DQ[15]/DDR0_DQ[31]

AT66

DDR1_DQ[16]/DDR0_DQ[48]

AU66

DDR1_DQ[17]/DDR0_DQ[49]

AP65

DDR1_DQ[18]/DDR0_DQ[50]

AN65

DDR1_DQ[19]/DDR0_DQ[51]

AN66

DDR1_DQ[20]/DDR0_DQ[52]

AP66

DDR1_DQ[21]/DDR0_DQ[53]

AT65

DDR1_DQ[22]/DDR0_DQ[54]

AU65

DDR1_DQ[23]/DDR0_DQ[55]

AT61

DDR1_DQ[24]/DDR0_DQ[56]

AU61

DDR1_DQ[25]/DDR0_DQ[57]

AP60

DDR1_DQ[26]/DDR0_DQ[58]

AN60

DDR1_DQ[27]/DDR0_DQ[59]

AN61

DDR1_DQ[28]/DDR0_DQ[60]

AP61

DDR1_DQ[29]/DDR0_DQ[61]

AT60

DDR1_DQ[30]/DDR0_DQ[62]

AU60

DDR1_DQ[31]/DDR0_DQ[63]

AU40

DDR1_DQ[32]/DDR1_DQ[16]

AT40

DDR1_DQ[33]/DDR1_DQ[17]

AT37

DDR1_DQ[34]/DDR1_DQ[18]

AU37

DDR1_DQ[35]/DDR1_DQ[19]

AR40

DDR1_DQ[36]/DDR1_DQ[20]

AP40

DDR1_DQ[37]/DDR1_DQ[21]

AP37

DDR1_DQ[38]/DDR1_DQ[22]

AR37

DDR1_DQ[39]/DDR1_DQ[23]

AT33

DDR1_DQ[40]/DDR1_DQ[24]

AU33

DDR1_DQ[41]/DDR1_DQ[25]

AU30

DDR1_DQ[42]/DDR1_DQ[26]

AT30

DDR1_DQ[43]/DDR1_DQ[27]

AR33

DDR1_DQ[44]/DDR1_DQ[28]

AP33

DDR1_DQ[45]/DDR1_DQ[29]

AR30

DDR1_DQ[46]/DDR1_DQ[30]

AP30

DDR1_DQ[47]/DDR1_DQ[31]

AU27

DDR1_DQ[48]

AT27

DDR1_DQ[49]

AT25

DDR1_DQ[50]

AU25

DDR1_DQ[51]

AP27

DDR1_DQ[52]

AN27

DDR1_DQ[53]

AN25

DDR1_DQ[54]

AP25

DDR1_DQ[55]

AT22

DDR1_DQ[56]

AU22

DDR1_DQ[57]

AU21

DDR1_DQ[58]

AT21

DDR1_DQ[59]

AN22

DDR1_DQ[60]

AP22

DDR1_DQ[61]

AP21

DDR1_DQ[62]

AN21

DDR1_DQ[63]

SKL-U_BGA1356

SKL-U

DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]

DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]

DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]

DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]

DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]

DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]

DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]

DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]

DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]

DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]

DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]

DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]

DDR CH - B

DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]

DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]

DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_ODT[1]

DDR1_MA[3]
DDR1_MA[4]

DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]

DDR1_ALERT#

DDR1_PAR

DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]

3 OF 20

AN45
AN46
AP45
AP46

AN56
AP55
AN55
AP53

BB42
AY42
BA42
AW42

AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52

BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47

AH66
AH65
AG69
AG70
AR66
AR65
AR61
AR60
AT38
AR38
AT32
AR32
AR25
AR27
AR22
AR21

AN43
AP43
AT13
AR18
AT18
AU18

DDR_B_CLK#0
DDR_B_CLK#1
DDR_B_CLK0
DDR_B_CLK1

DDR_B_CKE0
DDR_B_CKE1
DDR_B_CKE2
DDR_B_CKE3

DDR_B_CS#0
DDR_B_CS#1

DDR_B_ODT1

DDR_B_MA5
DDR_B_MA9
DDR_B_MA6
DDR_B_MA8
DDR_B_MA7
DDR_B_BS2
DDR_B_MA12
DDR_B_MA11
DDR_B_MA15
DDR_B_MA14

DDR_B_MA13
DDR_B_CAS#
DDR_B_WE#
DDR_B_RAS#
DDR_B_BS0
DDR_B_MA2
DDR_B_BS1
DDR_B_MA10
DDR_B_MA1
DDR_B_MA0
DDR_B_MA3
DDR_B_MA4

DDR_A_DQS#2
DDR_A_DQS2
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_DQS#7
DDR_A_DQS7
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_DQS#7
DDR_B_DQS7

DDR_B_PAR
DDR_DRAMRST#
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

DDR_B_CLK#0 <21>
DDR_B_CLK#1 <21>
DDR_B_CLK0 <21>
DDR_B_CLK1 <21>

DDR_B_CKE0 <21>
DDR_B_CKE1 <21>

@

T5

PAD~D

@

T6

PAD~D

DDR_B_CS#0 <21>
DDR_B_CS#1 <21>
DDR_B_ODT0 <21>
DDR_B_ODT1 <21>

DDR_B_MA5 <21>
DDR_B_MA9 <21>
DDR_B_MA6 <21>
DDR_B_MA8 <21>
DDR_B_MA7 <21>
DDR_B_BS2 <21>
DDR_B_MA12 <21>
DDR_B_MA11 <21>
DDR_B_MA15 <21>
DDR_B_MA14 <21>

DDR_B_MA13 <21>
DDR_B_CAS# <21>
DDR_B_WE# <21>
DDR_B_RAS# <21>
DDR_B_BS0 <21>
DDR_B_MA2 <21>
DDR_B_BS1 <21>
DDR_B_MA10 <21>
DDR_B_MA1 <21>
DDR_B_MA0 <21>
DDR_B_MA3 <21>
DDR_B_MA4 <21>

DDR_A_DQS#2 <20>
DDR_A_DQS2 <20>
DDR_A_DQS#3 <20>
DDR_A_DQS3 <20>
DDR_A_DQS#6 <20>
DDR_A_DQS6 <20>
DDR_A_DQS#7 <20>
DDR_A_DQS7 <20>
DDR_B_DQS#2 <21>
DDR_B_DQS2 <21>
DDR_B_DQS#3 <21>
DDR_B_DQS3 <21>
DDR_B_DQS#6 <21>
DDR_B_DQS6 <21>
DDR_B_DQS#7 <21>
DDR_B_DQS7 <21>

@

T8

PAD~D

DDR_DRAMRST# <20>

Buffer with Open Drain Output For VTT power control

+1.35V_MEM

0.1U_0402_16V7K

NC1VCC

DDR_VTT_CNTL

A A

2

A

3

GND

74AUP1G07GW_TSSOP5

12

UC14

CC57

Y

+3VS

12

5

4

RC123

100K_0402_5%

0.675V_DDR_VTT_ON <44>

DDR3 COMPENSATION SIGNALS

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

CAD Note:
Trace width=12~15 mil, Spacing=20 mils
Max trace length= 500 mil

1 2

RC5 121_0402_1%

1 2

RC6 80.6_0402_1%

1 2

RC7 100_0402_1%

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal El ectronics, Inc.

CPU (2/14)

CPU (2/14)

CPU (2/14)

LA-D071P

LA-D071P

LA-D071P

7 64Thursday, July 09, 2015

7 64Thursday, July 09, 2015

7 64Thursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

SPI_MOSI= SPI_IO0
SPI_MISO= SPI_IO1
PCH EDS R0.7 p.235~236

PCH_SPI_CLK_R1
PCH_SPI_D1_R1
PCH_SPI_D0_R1
PCH_SPI_D2_R1
PCH_SPI_D3_R1

D D

+3VS

10K_0402_5%

12

@

RC267

ONE_DIMM#

10K_0402_5%

12

RC268

SIO_RCIN#<29>

DIMM Detect

HIGH
LOW

C C

1 DIMM
2 DIMM

PCH_SPI_CLK_0_R

1 2

1 2

+3VS

12

RC13

10K_0402_5%

RC21 10K_0402_1%

+3VS

33_0402_5%

RC29

@EMI@

33P_0402_50V8 J

CC8

@EMI@

+3.3V_SPI

PCH_SPI_CS#0_R1

ONE_DIMM#

SERIRQ<29>

1 2

XDP_SPI_SI<14>

XDP_SPI_IO2<14>

RC21/44 place to within 1100 mil of SPIO_MOSI/SPI0_IO2 pin for XDP

RC339 4.7K_0402_5%

RC30 1K_0402_5%

RC31 1K_0402_5%

RC316 1K_0402_5%

RC355 1K_0402_1%

RC354 1K_0402_1%

1 2

PCH_SPI_CS#0_R1

1 2

PCH_SPI_D2_R1

1 2

PCH_SPI_D3_R1

@

1 2

PCH_SPI_D3_R1

AV2

AW3

AV3

AW2

AU4
AU3
AU2
AU1

M2
M3

J4
V1
V2
M1

G3
G2
G1

AW13

AY11

1 2

CMC@

1 2

CMC@

4

UC1E

SPI - FLASH

SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0#
SPI0_CS1#
SPI0_CS2#

SPI - TOUCH

GPP_D1/SPI1_CLK
GPP_D2/SPI1_MISO
GPP_D3/SPI1_MOSI
GPP_D21/SPI1_IO2
GPP_D22/SPI1_IO3
GPP_D0/SPI1_CS#

C LINK

CL_CLK
CL_DATA
CL_RST#

GPP_A0/RCIN#

GPP_A6/SERIRQ

SKL-U_BGA1356

SKL-U

SMBUS, SMLINK

GPP_B23/SML1ALERT#/PCHHOT#

LPC

PCH_SPI_D0_R1

PCH_SPI_D2_R1

PCH_SPI_D1_R1
PCH_SPI_D0_R1
PCH_SPI_CLK_R1
PCH_SPI_D3_R1
PCH_SPI_D2_R1 PCH_SPI_D2_0_R

1 2

RC317 33_0402_5%

1 2

RC318 33_0402_5%

1 2

RC319 33_0402_5%

1 2

RC320 33_0402_5%

1 2

RC327 33_0402_5%

GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3

GPP_A5/LFRAME#/ESPI_CS#

GPP_A14/SUS_STAT#/ESPI_RESET#

GPP_A9/CLKOUT_LPC0/ESPI_CLK

GPP_A10/CLKOUT_LPC1

3

GPP_C0/SMBCLK

GPP_C1/SMBDATA

GPP_C2/SMBALERT#

GPP_C3/SML0CLK

GPP_C4/SML0DATA

GPP_C5/SML0ALERT#

GPP_C6/SML1CLK

GPP_C7/SML1DATA

GPP_A8/CLKRUN#

5 OF 20

PCH_SPI_D1_0_R
PCH_SPI_D0_0_R
PCH_SPI_CLK_0_R
PCH_SPI_D3_0_R

R7

SMBCLK

R8

SMBDATA

R10

PCH_SMB_ALERT#

R9

SML0_SMBCLK

W2

SML0_SMBDATA

W1

GPP_C5

W3

SML1CLK

V3

SML1DATA

AM7

GPP_B23

AY13
BA13
BB13
AY12
BA12
BA11

SUS_STAT#/LPCPD#

AW9

PCI_CLK_LPC0

AY9

PCI_CLK_LPC1

AW11

CLKRUN#

PCH_SPI_D1_0_R < 29>

PCH_SPI_D0_0_R < 29>

PCH_SPI_CLK_0_R <29>

SMBCLK

SMBDATA

LPC_LAD0 <29>
LPC_LAD1 <29>
LPC_LAD2 <29>
LPC_LAD3 <29>

LPC_LFRAME# < 29>

RC16EMI@ 22_0402_5%

RC18EMI@ 22_0402_5%
RC22EMI@ 22_0402_5%

CLKRUN# <29>

2

+3VS

6

5

QC2B
DMN66D0LDW-7_SOT363-6

3 4

1 2

1 2
1 2

Reserve for RF

CLK_PCI_LPC_MEC

CLK_PCI_LPDEBUG

QC2A

2

DMN66D0LDW-7_SOT363-6

1

PCH_SMBCLK <20,21,34>

CLK_DP2VGA <34>

CLK_PCI_LPC_MEC <29>
CLK_PCI_LPDEBUG <29>

12

@EMI@12P_0402_50V8 J

CC4

12

@EMI@12P_0402_50V8 J

CC5

PCH_SMBDAT <20,21,34>

SML1CLK

SML1DATA

SML1CLK

SML1DATA

+3VALW_PCH

2

QC5A
DMN66D0LDW-7_SOT363-6

1

5

QC5B

DSX@

DMN66D0LDW-7_SOT363-6

34

N_DSX@

1 2

RC0801 0_0402_5%

N_DSX@

1 2

RC0802 0_0402_5%

PCH_SMBDAT

PCH_SMBCLK

SMBCLK

SMBDATA

SML1CLK

SML1DATA

SML0_SMBCLK

SML0_SMBDATA

SUS_STAT#/LPCPD#

CLKRUN#

1

DSX@

6

GPU_THM_SMBCLK <29,38,57>

GPU_THM_SMBDAT <29,38,57>

GPU_THM_SMBCLK

GPU_THM_SMBDAT

1 2

RC12 1K_0402_5%

1 2

RC14 1K_0402_5%

1 2

RC15 1K_0402_5%

1 2

RC17 1K_0402_5%

1 2

RC19 1K_0402_5%

1 2

RC20 1K_0402_5%

1 2

RC369 8 .2K_0402_5%

@

1 2

RC27 8.2K_0402_5%

12

RN192.2K_0402_5%

12

RN202.2K_0402_5%

+3VALW_PCH

+3VALW_PCH

+3VS

+3VS

PCH_SMB_ALERT#

9/5 MOW
Option 1: Implement a 1 kOhm pull-down resistor on the signal an d de-populate the

B B

PCH_SPI_CS#0_R1<29>

A A

required 1 kOhm pull-up resistor. In this case, customers must ensure that the SPI
flash device on the platform has HOLD function ality disabled by default.

Note that the pull do wn resistor on SPI0_IO3 is only needed for SKL U/Y platforms
with ES and SKL S/H platforms with pre-ES1/ES1 samples.

+3.3V_SPI

Short Pad

PCH_SPI_CS#0_R1 PCH_SPI_CS#0_R2
PCH_SPI_D1_0_R PCH_SPI_D1_0_R3
PCH_SPI_D2_0_R PCH_SPI_D2_0_R3 PCH_SPI_CLK_0_R

1 2

RC37

@

0_0402_5%

1 2

RC329 15_0402_1%

1 2

RC330 15_0402_1%

Main:
SA00005VV10, S IC FL 128M W25Q128FVSIQ SOIC8P SP I ROM
2nd:
SA00008KK00, S IC FL 128M G D25B128CSIGR SOP 8P 3.3V
SA00006PD00, S IC FL 128M EN25QH128A-104HIP SOP 8P
Jason 2015/03/04

128Mb Flash ROM

UC5

1

/CS

2

IO1

3

IO2

4

GND

W25Q128FVSIQ_SO8

VCC

8
7

IO3

6

CLK

5

IO0

CC9

1 2

0.1U_0402_25V6

PCH_SPI_CLK_0_R3
PCH_SPI_D0_0_R3

1 2

RC331 15_0402_1%

1 2

RC332 15_0402_1%

1 2

RC333 15_0402_1%

PCH_SPI_D3_0_RPCH_SPI_D3_0_R3

PCH_SPI_D0_0_R

TLS CONFIDENTIALITY

HIGH
LOW(DEFAULT)

GPP_C5

EC interface

HIGH
LOW(DEFAULT)

Modify Valu e to 150k for WW52 MOW
2015/03/03 Jason

GPP_B23

EXI BOOT STALL BYPASS

HIGH
LOW(DEFAULT)

1 2

@

RC23 8.2K_0402_5%

ENABLE
DISABLE

+3VALW_PCH

1 2

@

RC25 10K_0402_5%

ESPI
LPC

+3VALW_PCH

1 2

CMC@

RC365 150K_0402_5%

ENABLE
DISABLE

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal El ectronics, Inc.

CPU (3/14)

CPU (3/14)

CPU (3/14)

LA-D071P

LA-D071P

LA-D071P

8 64Thursday, July 09, 2015

8 64Thursday, July 09, 2015

8 64Thursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

+3VALW_PCH

UC1F

LPSS ISH

AN8

GPP_B15/GSPI0_CS#

AP7

GPP_B16/GSPI0_CLK

NRB_BIT

+5VALW

AP8

GPP_B17/GSPI0_MISO

AR7

GPP_B18/GSPI0_MOSI

AM5

GPP_B19/GSPI1_CS#

AN7

GPP_B20/GSPI1_CLK

AP5

GPP_B21/GSPI1_MISO

AN5

GPP_B22/GSPI1_MOSI

AB1

GPP_C8/UART0_RXD

AB2

GPP_C9/UART0_TXD

W4

GPP_C10/UART0_RTS#

AB3

GPP_C11/UART0_CTS#

AD1

GPP_C20/UART2_RXD

AD2

GPP_C21/UART2_TXD

AD3

GPP_C22/UART2_RTS#

AD4

GPP_C23/UART2_CTS#

U7

GPP_C16/I2C0_SDA

U6

GPP_C17/I2C0_SCL

U8

GPP_C18/I2C1_SDA

U9

GPP_C19/I2C1_SCL

AH9

GPP_F4/I2C2_SDA

AH10

GPP_F5/I2C2_SCL

AH11

GPP_F6/I2C3_SDA

AH12

GPP_F7/I2C3_SCL

AF11

GPP_F8/I2C4_SDA

AF12

GPP_F9/I2C4_SCL

SKL-U_BGA1356

JWDB1

6

GND

5

GND

4

4

3

3

2

2

1

1

CVILU_CI1804M1VRA-NH

CONN@

VRAM_ID1

DBC_EN

D D

+3VS

For 3D-CAM & always POP
2015/Jason

1 2

RC293 10K_0402_5%

1 2

RC292 10K_0402_5%

RC62 49.9K_0402_1%

RC63 49.9K_0402_1%

RC382 49.9K_0402_1%

C C

3D_CAM_EN_PCH

FW_UPDATE_PCH

+3VALW_PCH

RC186 4.7K_0402_5%@

CAM_DETECT

BLUETOOTH_EN

12

UART_2_CRXD_DTXD

12

UART_2_CTXD_DRXD

12

LPSS_UART2_CTS#

3D@

1 2

DX2 RB751S40T1G_SOD523-2

3D@

1 2

DX3 RB751S40T1G_SOD523-2

1 2

NRB_BIT

DBC_EN<32>

BLUETOOTH_EN<36>

SATA_ODD_PWRGT<35>

SIO_EXT_WAKE#<29>

I2C_SDA_TP<38>

3D_CAM_EN <29,64>

FW_UPDATE <29,64>

For 3D-CAM 2015/Jason

3D_CAM_EN_PCH
FW_UPDATE_PCH

BLUETOOTH_EN

BOARD_ID2

UART_2_CRXD_DTXD
UART_2_CTXD_DRXD

LPSS_UART2_CTS#

I2C_SCL_TP<38>

Win7 Debug solution

Option 2 : For Open Chassis Platforms

NO REBOOT STRAP

HIGH
LOW(DEFAULT)

B B

Weak IPD

No REBOOT
REBOOT ENABLE

UART_2_CTXD_DRXD
UART_2_CRXD_DTXD

SKL-U

GPP_D9
GPP_D10
GPP_D11
GPP_D12

GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL

GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL

GPP_F10/I2C5_SDA/ISH_I2C2_SDA

GPP_F11/I2C5_SCL/ISH_I2C2_SCL

GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA

GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL

GPP_D15/ISH_UART0_RTS#

GPP_D16/ISH_UART0_CTS#/SML0BALERT#

GPP_C12/UART1_RXD/ISH_UART1_RXD

GPP_C13/UART1_TXD/ISH_UART1_TXD

GPP_C14/UART1_RTS#/ISH_UART1_RTS#

GPP_C15/UART1_CTS#/ISH_UART1_CTS#

PROJECT_ID1
PROJECT_ID2

BOARD_ID2
BOARD_ID3

GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5

GPP_A12/BM_BUSY#/ISH_GP6

6 OF 20

+3VS

12

@

RC370
10K_0402_5%

12

@

RC371
10K_0402_5%

+3VS

12

@

RC374
10K_0402_5%

12

@

RC375
10K_0402_5%

P2

CAM_DETECT

P3

DGPU_HOLD_RST#

P4
P1

RTC_DET#

M4
N3

N1
N2

AD11
AD12

U1

DGPU_PWR_EN

U2
U3
U4

AC1
AC2
AC3
AB4

AY8

PROJECT_ID1

BA8

PROJECT_ID2

BB7
BA7

BOARD_ID3

AY7
AW7

VRAM_ID2

AP13

12

@

RC372
10K_0402_5%

12

@

RC373
10K_0402_5%

12

@

RC376
10K_0402_5%

12

@

RC377
10K_0402_5%

CAM_DETECT <64>
DGPU_HOLD_RST# <56>

RTC_DET# <22>

DGPU_PWR_EN <40,52>

Add RC359 10kohm PU and
Change RC358 to UN-POP for SW request

2015/04/28 Jason

KB_DET# <38>

PANEL_SIZE_ID <32>

Reserve for TULIP/VanGogh MB switch

Reserve for MB Platform(SKL) switch

KB_DET#

RTC_DET#

SIO_EXT_WAKE#

DGPU_HOLD_RST#

DGPU_PWR_EN

1 2

RC288 1 0K_0402_5%

1 2

RC384 1 0K_0402_5%

1 2

RC387 1 0K_0402_5%

1 2

RC383 1 0K_0402_5%

+3VS

12

RC359
10K_0402_5%

@

RC358
10K_0402_5%

1 2

+3VS

12

@

RC378

VRAM_ID1
VRAM_ID2

A A

10K_0402_5%

12

@

RC380
10K_0402_5%

12

@

RC379
10K_0402_5%

12

@

RC381
10K_0402_5%

Reserve for VRAM Type switch

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal El ectronics, Inc.

CPU (4/14)

CPU (4/14)

CPU (4/14)

LA-D071P

LA-D071P

LA-D071P

9 64Thursday, July 09, 2015

9 64Thursday, July 09, 2015

9 64Thursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

PEG_HTX_C_GRX_P[0..3]<56>

PEG_HTX_C_GRX_N[0..3]<56>

PEG_GTX_C_HRX_P[0..3]<56>

PEG_GTX_C_HRX_N[0..3]<56>

D D

GPU --->

WLAN --->

GLAN --->

C C

SATA HDD --->

SATA ODD --->

B B

PEG_HTX_C_GRX_P[0..3]

PEG_HTX_C_GRX_N[0..3]

PEG_GTX_C_HRX_P[0..3]

PEG_GTX_C_HRX_N[0..3]

PCIE_PRX_WLANTX_N5<36>

PCIE_PRX_WLANTX_P5<36>
PCIE_PTX_WLANRX_N5_C<36>
PCIE_PTX_WLANRX_P5_C<36>

PCIE_PRX_LANTX_N6<25>

PCIE_PRX_LANTX_P6<25>

PCIE_PTX_LANRX_N6<25>

PCIE_PTX_LANRX_P6<25>

SATA3_PRX_HDDTX_N0<35>

SATA3_PRX_HDDTX_P0<35>
SATA3_PTX_HDDRX_N0<35>
SATA3_PTX_HDDRX_P0<35>

SATA_PRX_ODDTX_N1<35>
SATA_PRX_ODDTX_P1<35>

SATA_PTX_ODDRX_N1<35>
SATA_PTX_ODDRX_P1<35>

+3VS

1 2

RC245 10K_0 402_5%

PEG_GTX_C_HRX_P0

PEG_GTX_C_HRX_N0
PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_N0

PEG_GTX_C_HRX_P1

PEG_GTX_C_HRX_N1
PEG_HTX_C_GRX_P1
PEG_HTX_C_GRX_N1

PEG_GTX_C_HRX_P2

PEG_GTX_C_HRX_N2
PEG_HTX_C_GRX_P2
PEG_HTX_C_GRX_N2

PEG_GTX_C_HRX_P3

PEG_GTX_C_HRX_N3
PEG_HTX_C_GRX_P3
PEG_HTX_C_GRX_N3

1 2

RC45 100_0402_1%

XDP_PRDY#<14>

XDP_PREQ#<14>

PCIE_RCOMPN
PCIE_RCOMPP

UC1H

PCIE/USB3/SATA

H13

PCIE1_RXN/USB3_5_RXN

G13

PCIE1_RXP/USB3_5_RXP

B17

PCIE1_TXN/USB3_5_TXN

A17

PCIE1_TXP/USB3_5_TXP

G11

PCIE2_RXN/USB3_6_RXN

F11

PCIE2_RXP/USB3_6_RXP

D16

PCIE2_TXN/USB3_6_TXN

C16

PCIE2_TXP/USB3_6_TXP

H16

PCIE3_RXN

G16

PCIE3_RXP

D17

PCIE3_TXN

C17

PCIE3_TXP

G15

PCIE4_RXN

F15

PCIE4_RXP

B19

PCIE4_TXN

A19

PCIE4_TXP

F16

PCIE5_RXN

E16

PCIE5_RXP

C19

PCIE5_TXN

D19

PCIE5_TXP

G18

PCIE6_RXN

F18

PCIE6_RXP

D20

PCIE6_TXN

C20

PCIE6_TXP

F20

PCIE7_RXN/SATA0_RXN

E20

PCIE7_RXP/SATA0_RXP

B21

PCIE7_TXN/SATA0_TXN

A21

PCIE7_TXP/SATA0_TXP

G21

PCIE8_RXN/SATA1A_RXN

F21

PCIE8_RXP/SATA1A_RXP

D21

PCIE8_TXN/SATA1A_TXN

C21

PCIE8_TXP/SATA1A_TXP

E22

PCIE9_RXN

E23

PCIE9_RXP

B23

PCIE9_TXN

A23

PCIE9_TXP

F25

PCIE10_RXN

E25

PCIE10_RXP

D23

PCIE10_TXN

C23

PCIE10_TXP

F5

PCIE_RCOMPN

E5

PCIE_RCOMPP

D56

PROC_PRDY#

D61

PROC_PREQ#

BB11

GPP_A7/PIRQA#

E28

PCIE11_RXN/SATA1B_RXN

E27

PCIE11_RXP/SATA1B_RXP

D24

PCIE11_TXN/SATA1B_TXN

C24

PCIE11_TXP/SATA1B_TXP

E30

PCIE12_RXN/SATA2_RXN

F30

PCIE12_RXP/SATA2_RXP

A25

PCIE12_TXN/SATA2_TXN

B25

PCIE12_TXP/SATA2_TXP

SKL-U_BGA1356

SKL-U

SSIC / USB3

USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP

USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP
USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP

USB2

USB2_VBUSSENSE

GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#

GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2

GPP_E8/SATALED#

USB3_1_RXN
USB3_1_RXP

USB3_1_TXN
USB3_1_TXP

USB3_4_RXN
USB3_4_RXP

USB3_4_TXN
USB3_4_TXP

USB2N_1
USB2P_1

USB2N_2
USB2P_2

USB2N_3
USB2P_3

USB2N_4
USB2P_4

USB2N_5
USB2P_5

USB2N_6
USB2P_6

USB2N_7
USB2P_7

USB2N_8
USB2P_8

USB2N_9
USB2P_9

USB2N_10
USB2P_10

USB2_COMP

USB2_ID

GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2

8 OF 20

H8
G8
C13
D13

J6
H6
B13
A13

J10
H10
B15
A15

E10
F10
C15
D15

AB9
AB10

AD6
AD7

AH3
AJ3

AD9
AD10

AJ1
AJ2

AF6
AF7

AH1
AH2

AF8
AF9

AG1
AG2

AH7
AH8

AB6

USBCOMP

AG3

USB2_ID

AG4

USB2_VBUSSENSE

A9

USB_OC#0_1

C9

USB_OC#2_3

D9

USB_OC#4_5

B9

USB_OC#6_7

J1
J2

SIO_EXT_SCI#

J3

SATA_ODD_DA#

H2
H3

SATA_ODD_PRSNT#

G4

H1

SATA_LED#

USB3_PRX_CTX_N0 <30>
USB3_PRX_CTX_P0 <30>
USB3_PTX_CRX_N0 <30>
USB3_PTX_CRX_P0 <30>

USB3_CRX_DTX_N3 <64>
USB3_CRX_DTX_P3 <64>
USB3_CTX_DRX_N3 <64>
USB3_CTX_DRX_P3 <64>

USB_PN1 <30>
USB_PP1 <30>

USB_PN2 <30>
USB_PP2 <30>

USB_PN3 <30>
USB_PP3 <30>

USB_PN5 <32>
USB_PP5 <32>

USB_PN6 <27>
USB_PP6 <27>

USB_PN7 <32>
USB_PP7 <32>

USB_PN8 <36>
USB_PP8 <36>

1 2

RC44 113_0402_1%

1 2

RC366 1K_0402_5%

1 2

RC393 1K_0402_5%

USB_OC#0_1 <31>
USB_OC#2_3 <31>

Reserve
Reserve

HDD_DEVSLP <35>

SIO_EXT_SCI# <29>

SATA_ODD_DA# <35>

SATA_ODD_PRSNT# <35>

SATA_LED# <29,37>

---> Port 1, USB3.0

3D CAMERA

-----> Port 1, USB3.0 (Port 1)

-----> Port 2, USB2.0 (IOB)

-----> Port 3, USB2.0 (IOB)

----->CCD

-----> Card Reader

-----> Touch Screen

-----> BT

USB_OC#6_7
USB_OC#0_1
USB_OC#2_3
USB_OC#4_5

SATA_LED#

SIO_EXT_SCI#

SATA_ODD_DA#

SATA_ODD_PRSNT#

+3VALW_PCH

RPC3

4 5
3

6

2

7

1

8

10K_8P4R_5%

1 2

RC248 10K_0402_5%

1 2

RC237 10K_0402_5%

RC356 10K_0402_5%

RC246 10K_0402_5%

12

+3VALW_PCH

1 2

+3VS

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal El ectronics, Inc.

CPU (5/14)

CPU (5/14)

CPU (5/14)

LA-D071P

LA-D071P

LA-D071P

10 64Thursday, July 09, 2015

10 64Thursday, July 09, 2015

10 64Thursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

CLK_PEG_VGA<56>

GPU--->

D D

WLAN--->

LAN--->

C C

CLK_PEG_VGA#<56>

PEG_CLKREQ#<57>

CLK_PCIE_WLAN_N1<36>

CLK_PCIE_WLAN_P1<36>

CLK_PCIE_WLAN_REQ#<36>

CLK_PCIE_LAN_N2<25>

CLK_PCIE_LAN_P2<25>

CLK_PCIE_LAN_REQ#<25>

PCH_PLTRST#

SN74AHC1G08DCKR_SC70-5

1 2

RC189 10K_0 402_5%

+3VS

1 2

RC47 10K _0402_5%

+3VS

1 2

RC50 10K _0402_5%

+3VS

1 2

RC59 10K _0402_5%@

+3VS

1 2

RC51 10K _0402_5%@

+3VS

1 2

RC190 10K_0 402_5%@

+3VS

+3VS

5

1

IN1

2

IN2

UC7

3

P

G

4

O

PCH_PLTRST#_EC

12

RC65

100K_0402_5%

4

UC1J

D42

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

AR10

GPP_B5/SRCCLKREQ0#

B42

CLKOUT_PCIE_N1

A42

CLKOUT_PCIE_P1

AT7

GPP_B6/SRCCLKREQ1#

D41

CLKOUT_PCIE_N2

C41

CLKOUT_PCIE_P2

AT8

GPP_B7/SRCCLKREQ2#

D40

CLKOUT_PCIE_N3

C40

CLKOUT_PCIE_P3

AT10

GPP_B8/SRCCLKREQ3#

B40

CLKOUT_PCIE_N4

A40

CLKOUT_PCIE_P4

AU8

GPP_B9/SRCCLKREQ4#

E40

CLKOUT_PCIE_N5

E38

CLKOUT_PCIE_P5

AU7

GPP_B10/SRCCLKREQ5#

SKL-U_BGA1356

PCH_PLTRST#_EC <25,29,32,36,56>

SKL_ULT

CLOCK SIGNALS

RTCRST_ON<29>

CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

R1902

10KR2J-3-GP

GPD8/SUSCLK

XTAL24_IN

XTAL24_OUT

XCLK_BIASREF

RTCX1
RTCX2

SRTCRST#

RTCRST#

10 OF 20

12

F43
E43

BA17

E37
E35

E42

AM18
AM20

AN18
AM16

3

SUSCLK

SUSCLK

CLK_ITPXDP_N
CLK_ITPXDP_P

SUSCLK

XTAL24_IN
XTAL24_OUT

XCLK_BIASREF

RC52 2.7K_0402_1%

PCH_RTCX1
PCH_RTCX2

SRTCRST#

PCH_RTCRST#

2

G

13

D

S

Q1901
2N7002K_SOT23-3

2

SUSCLK <36>

1 2

RC48 1K_0402_5%

@

T4943

PAD~D

@

T4944

PAD~D

@

T4939

PAD~D

1 2

1 2

RC56 20K _0402_5%

CC24 1U_0402_6.3V6K

1 2

RC57 20K _0402_5%

CC25 1U_0402_6.3V6K

1

1

SHORT PADS~D

CMOS1 must take care short & touch risk on layout placement

1 2

1 2

2

CMOS1 JP@

CMOS1
Always Open
& Not Solder

+1.0V_CLK5

+RTC_CELL

2

XTAL24_IN

PCH_RTCX1
PCH_RTCX2

1M_0402_1%

RC46

1 2

RC295

0_0402_5%

1 2

@

Short Pad

Jason 6/24

RC54
10M_0402_5%

RC296

1 2

0_0402_5%

1 2

Jason 6/24

@

Short Pad

SJ10000LV00, S CRYSTAL 32.768KHZ 12.5PF 9H03200042

32.768kHz/12.5pF with 18pF
SJ10000PW00, S CRYSTAL 32.768KHZ 9PF X1A000141000200

32.768kHz/9pF with 5.6pF

3

4

YC1
24MHZ_12PF_X3G024000 DC1H

1

2

XTAL24_OUT_RXTAL24_OUT

12

YC2

32.768KHZ_9PF_X1A000141000200

PCH_RTCX2_R

Change CC23, CC26 for YC2 2nd source.
Jason 5/29
Change CC23, CC26 CPN for Material Shortage.
Jason 6/2
Change CC23, CC26 for YC2 2nd source.
Jason 7/6

1

CC21

1 2

12P_0402_50V8 J

CC22

1 2

12P_0402_50V8 J

CC23

1 2

6.8P_0402_50V8C

20ppm / 9pF
ESR <50kohm (MAX)

CC26

1 2

6.8P_0402_50V8C

+3.3V_ALW_DSW

12

100P_0402_50V 8J

@ESD@

1 2

T9

PCH_RSMRST#_Q

POK

1M_0402_5%

12

RC220

H_CPUPWRGD

ME_SUS_PWR_ACK

@

PAD~D

RC75 10K _0402_5%

1 2

RC344 0_0402_5%DSX@

1 2

RC216 0_0 402_5%

N_DSX@

SUSACK#<29>

PCIE_WAKE#<25,29>
EC_WAKE#<29>

5

RC395 0_0402 _5%
RC391 0_0402 _5%

+3VS

1 2

CC1101

Close to CPU side

+3VALW_PCH

RC74 10K_0402 _5%@

B B

POK<43,45,46,47>

2015/5/19 Modify
Jason

1U_0402_6.3V6K

12

A A

CC266

1 2

RC67 1K_0402_5%

1 2

RC70 10K_0402_5%

1 2

RC291 1 0K_0402_5%

RC1101

PCH_RSMRST#_Q<14>

1 2

RC77 1K_0402_ 5%@

1 2

RC78 60.4_0402_1%

ME_SUS_PWR_ACK<29>

1 2

RC346 0_0402_5%DSX@

1 2
1 2

@

2015/5/19 Modify
Jason

PCH_PCIE_WAKE#

@

LAN_WAKE#

SYS_RESET#

12

PCH_DPWROK

@

100K_0402_5%

PCH_PLTRST#
SYS_RESET#

PCH_RSMRST#_Q

H_CPUPWRGDH_CPUPWRGD_R
VCCST_PWRGDH_VCCST_PWRGD

SYS_PWROK<29>
RESET_OUT#<29>

PCH_DPWROK

SUSACK#_R

PCH_PCIE_WAKE#
LAN_WAKE#

RSMRST circuit

PCH_RSMRST#<29>

UC1K

SYSTEM POWER MANAGEMENT

AN10

GPP_B13/PLTRST#

B5

SYS_RESET#

AY17

RSMRST#

A68

PROCPWRGD

B65

VCCST_PWRGD

B6

SYS_PWROK

BA20

PCH_PWROK

BB20

DSW_PWROK

AR13

GPP_A13/SUSWARN#/SUSPWRDNACK

AP11

GPP_A15/SUSACK#

BB15

WAKE#

AM15

GPD2/LAN_WAKE#

AW17

GPD11/LANPHYPC

AT15

GPD7/RSVD

SKL-U_BGA1356

+3VALW

5

1

P

IN1

2

POK

IN2

G

3

SN74AHC1G08DCKR_SC70-5

4

SIO_SLP_LAN#

8/21 can change to 10K for merge to RP

PCH_BATLOW#

AC_PRESENT

SKL-U

CZ34

@

1 2

0.1U_0402_10V7K

4

PCH_RSMRST#_Q

O

UZ6

1 2

RC68 10K_0402_5%@

1 2

RC72 8.2K_0402_5%

1 2

RC243 1 0K_0402_5%

GPP_B12/SLP_S0#

GPD4/SLP_S3#
GPD5/SLP_S4#

GPD10/SLP_S5#

SLP_SUS#
SLP_LAN#

GPD9/SLP_WLAN#

GPD6/SLP_A#

GPD3/PWRBTN#

GPD1/ACPRESENT

GPD0/BATLOW#

GPP_A11/PME#

GPP_B11/EXT_PWR_GATE#

INTRUDER#

GPP_B2/VRALERT#

Iris2 use 1D35V_VTT_PWRGD
Need to confirm sequence

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

+3VALW

+3.3V_ALW_DSW

AT11
AP15
BA16
AY16

AN15
AW15
BB17
AN16

BA15
AY15
AU13

AU11
AP16

AM10
AM11

11 OF 20

1VS_VCCIO_PWRGD<46>

1.35V_VTT_PWRGD<44>

3

INTRUDER#

VRALERT#

SIO_PWRBTN#

SIO_SLP_S3#

SIO_SLP_SUS#_R
SIO_SLP_LAN#
SIO_SLP_WLAN#
SIO_SLP_A#

AC_PRESENT
PCH_BATLOW#

PME#
INTRUDER#

VRALERT#

+RTC_CELL

1 2

RC69 330K_0402_5%

1 2

RC73 10K_0402 _5%

@

RC1102

SIO_SLP_S0# <17>
SIO_SLP_S3# <17,29,40,41,46,51>
SIO_SLP_S4# <17,29,44>
SIO_SLP_S5# <42>

1 2

RC76 43K_0603_1%

@

T4938

PAD~D

@

T4945

PAD~D

@

T4937

PAD~D

SIO_PWRBTN# <29>

@

T115

PAD~D

MPHYP_PWR_EN <18>

connect to VCCMPHYGTAON_1P0 enable pin

1 2

@

RC389 0_0402_5%

1 2

@

RC392

Short Pad

SIO_SLP_S3#

DZ5 RB751S40T1G_SOD523-2

12

100K_0402_5%

0_0402_5%

Jason 6/24

@

1 2

+3VALW

+3.3V_ALW_DSW

12

DZ4RB751S40T1G_SOD523-2

SIO_SLP_SUS# <29,45,46,47>

ACAV_IN <29,42>

+3VS

RC388
1K_0402_5%

1 2

ALL_SYS_PWRGD

1 2

RC345

Short Pad

2

Buffer with Open Drain Output For VTT power control

0.1U_0402_16V7K

SIO_SLP_S3#

RC1103

10K_0402_1%

1 2

CC1103

1U_0402_6.3V6K

12

NC1VCC

2

A

3

GND

74AUP1G07GW_TSSOP5

Buffer with Open Drain Output For VTT power control

0.1U_0402_16V7K

NC1VCC

ALL_SYS_PWRGD

@

0_0402_5%

Jason 6/24

2

A

3

GND

74AUP1G07GW_TSSOP5

ALL_SYS_PWRGD <29>

IMVP_VR_ON <48,49>

12

UC16

CC298

Y

+3VALW

CC299

12

UC17

5

4

ALL_SYS_PWRGD

Y

+1.0V_VCCST+3VALW

5

4

RC71
1K_0402_5%

1 2

H_VCCST_PWRGD

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal El ectronics, Inc.

CPU (6/14)

CPU (6/14)

CPU (6/14)

LA-D071P

LA-D071P

LA-D071P

11 64Thursday, July 09, 2015

11 64Thursday, July 09, 2015

11 64Thursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

+1.0V_VCCST

+1.0V_VCCSTG

+3VS

D D

1 2

H_CATERR#

@

RC79 49.9_0402_1%

1 2

1 2

1 2

1 2

@

1 2

H_THERMTRIP#

H_PROCHOT#

TOUCHPAD_INTR#_D

TOUCH_SCREEN_PD#

TOUCH_SCREEN_PD#<32>

RC80 1K_0402_5%

RC83 1K_0402_5%

RC272 10K_0402_5%

RC277 10K_0402_5%

RC360 1 0K_0402_5%

DGPU_PWROK

8/19 DG0.9

H_PROCHOT#

RC84 499_0402_1%

TOUCH_SCREEN_PD# TOUCH_SCREEN_PD#_R

1 2

@

RC394 0_0402_5%

12

PECI_EC<29>H_PROCHOT#<29,41,42,48>

1 2

T4946

T4942
T4941
T10
T11

12

RC88

49.9_0402_1%

4

@

PAD~D

@

PAD~D

@

PAD~D

@

PAD~D

@

PAD~D

TOUCHPAD_INTR#_D

EDRAM_OPIO_RCOMP

12

RC89

RC90

49.9_0402_1%

H_CATERR#

H_PROCHOT#_R

H_THERMTRIP#

XDP_OBS0_R
XDP_OBS1_R
XDP_OBS2_R
XDP_OBS3_R

CPU_POPIRCOMP
PCH_POPIRCOMP

EOPIO_RCOMP

12

RC91

49.9_0402_1%

49.9_0402_1%

D63

CATERR#

A54

PECI

C65

PROCHOT#

C63

THERMTRIP#

A65

SKTOCC#

C55

BPM#[0]

D55

BPM#[1]

B54

BPM#[2]

C56

BPM#[3]

A6

GPP_E3/CPU_GP0

A7

GPP_E7/CPU_GP1

BA5

GPP_B3/CPU_GP2

AY5

GPP_B4/CPU_GP3

AT16

PROC_POPIRCOMP

AU16

PCH_OPIRCOMP

H66

OPCE_RCOMP

H65

OPC_RCOMP

SKL-U_BGA1356

UC1D

CPU MISC

SKL-U

JTAG

PROC_TRST#

PCH_JTAG_TCK

PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS

3

PROC_TCK

PROC_TDI
PROC_TDO
PROC_TMS

PCH_TRST#

JTAGX

4 OF 20

B61

CPU_XDP_TCK0

D60

SOC_XDP_TDI

A61

SOC_XDP_TDO

C60

SOC_XDP_TMS

B59

SOC_XDP_TRST#

B56
D59

SOC_XDP_TDI

A56

SOC_XDP_TDO

C59

SOC_XDP_TMS

C61

SOC_XDP_TRST#

A59

CPU_XDP_TCK0

CPU_XDP_TCK0 <14>
SOC_XDP_TDI <14>
SOC_XDP_TDO <14>
SOC_XDP_TMS <14>
SOC_XDP_TRST# <14>

PCH_JTAG_TCK1 <14>

2

1

C C

TOUCHPAD_INTR#< 29,38>

ME_FWP_EC

LOW = ENABLE -->ME lock, can't update ME‧
HIGH = DISABLE -->ME un-lock, can update ME‧

B B

+3VALW_PCH +3VALW_PCH

1 2

RC183 8.2K_0402_5%

@

SPKR HDA_SDOUT

DZ3
RB751S40T1G_SOD523-2

1 2

RC187 4.7K_0402_5%

@

TOUCHPAD_INTR#_D

1 2

HDA_CODEC_BITCLK<23>

HDA_CODEC_SDOUT<23>

HDA_CODEC_SYNC<23>

ME_FWP_EC<29>

HDA_CODEC_RST#<23>

22P_0402_50V8J

Close to RC93

CC27

1 2

RC92 33_0 402_5%

1 2

RC93 33_0 402_5%EMI@

1 2

RC94 33_0 402_5%

1 2

RC223 1K_0402_5%

RC95 33_0 402_5%

HDA_CODEC_BITCLK

1

2

1 2

DGPU_PWROK< 29,40,52>

UC1G

HDA_SYNC/I2S0_SFRM
HDA_BLK/I2S0_SCLK
HDA_SDO/I2S0_TXD
HDA_SDI0/I2S0_RXD
HDA_SDI1/I2S1_RXD
HDA_RST#/I2S1_SCLK

J5

GPP_D23/I2S_MCLK
I2S1_SFRM
I2S1_TXD

GPP_F1/I2S2_SFRM
GPP_F0/I2S2_SCLK
GPP_F2/I2S2_TXD
GPP_F3/I2S2_RXD

GPP_D19/DMIC_CLK0
GPP_D20/DMIC_DATA0

GPP_D17/DMIC_CLK1
GPP_D18/DMIC_DATA1

GPP_B14/SPKR

SKL-U_BGA1356

AUDIO

HDA_SYNC
HDA_BIT_CLK
HDA_SDOUT

HDA_SDIN0<23>

HDA_RST#

DGPU_PWROK

SPKR<23>

BA22
AY22
BB22
BA21
AY21

AW22

AY20

AW20

AK10

AW5

AK7
AK6
AK9

H5
D7

D8
C8

SKL-U

SDIO/SDXC

GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3

GPP_G5/SD_CD#
GPP_G6/SD_CLK

GPP_A17/SD_PWR_EN#/ISH_GP7

GPP_G7/SD_WP

GPP_A16/SD_1P8_SEL

SD_RCOMP

GPP_F23

7 OF 20

AB11
AB13
AB12
W12
W11
W10
W8
W7

BA9
BB9

AB7

AF13

SD_RCOMP

RC96 200_0402_1%

KB_LED_BL_DET < 38>

1 2

TOP SWAP STRAP

A A

HIGH
LOW(DEFAULT)

ENABLE
DISABLE

Flash Descriptor Security override

HIGH
LOW(DEFAULT)

DISABLE
ENABLE

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal El ectronics, Inc.

CPU (7/14)

CPU (7/14)

CPU (7/14)

LA-D071P

LA-D071P

LA-D071P

12 64Thursday, July 09, 2015

12 64Thursday, July 09, 2015

12 64Thursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

D D

4

3

2

1

CFG[2][5][6][7] for SKYLAKE-H CPU CFG strap pin

1 2

RC113 10K_0402_1%

@

Stall reset sequence

HIGH(DEFAULT)
LOW

C C

1 2

RC109 10K_0402_1%

eDP enable

HIGH(DEFAULT)
LOW

B B

CFG0

No stall(Normal Operati on)
stall

CFG4

Disabled
Enabled

1 2

RC112 10K_0402_1%

@

1 2

RC110 10K_0402_1%

@

CFG1

CFG3

+1.0V_XDP

XDP_ITP_PMODE<14>

CFG16<14>
CFG17<14>

CFG18<14>
CFG19<14>

12

12

CFG0
CFG1

CFG3
CFG4

CFG_RCOMP

CFG0<14>
CFG1<14>
CFG2<14>
CFG3<14>
CFG4<14>
CFG5<14>
CFG6<14>
CFG7<14>
CFG8<14>
CFG9<14>
CFG10<14>
CFG11<14>
CFG12<14>
CFG13<14>
CFG14<14>
CFG15<14>

RC114 49 .9_0402_1%

CMC@

RC115 1.5K _0402_5%

@

T16

PAD~D

@

T17

PAD~D

AY2
AY1

AL25
AL27

BA70
BA68

E68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70

E63
F63

E66
F66

E60

E8

D1
D3

K46
K45

C71
B70

F60

A52

J71
J68

F65
G65

F61
E61

UC1S

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]

CFG[16]
CFG[17]

CFG[18]
CFG[19]

CFG_RCOMP

ITP_PMODE

RSVD_AY2
RSVD_AY1

RSVD_D1
RSVD_D3

RSVD_K46
RSVD_K45

RSVD_AL25
RSVD_AL27

RSVD_C71
RSVD_B70

RSVD_F60

RSVD_A52

RSVD_TP_BA70
RSVD_TP_BA68

RSVD_J71
RSVD_J68

VSS_F65
VSS_G65

RSVD_F61
RSVD_E61

SKL-U_BGA1356

RESERVED SIGNALS-1

SKL-U

RSVD_TP_BB68
RSVD_TP_BB69

RSVD_TP_AK13
RSVD_TP_AK12

RSVD_BB2
RSVD_BA3

RSVD_D5
RSVD_D4
RSVD_B2
RSVD_C2

RSVD_B3
RSVD_A3

RSVD_AW1

RSVD_E1
RSVD_E2

RSVD_BA4
RSVD_BB4

RSVD_A4
RSVD_C4

RSVD_A69
RSVD_B69

RSVD_AY3

RSVD_D71
RSVD_C70

RSVD_C54
RSVD_D54

VSS_AY71

ZVM#

RSVD_TP_AW71
RSVD_TP_AW70

MSM#

PROC_SELECT#

19 OF 20

SPARE

SKL-U

RSVD_F6
RSVD_E3

RSVD_C11

RSVD_B11

RSVD_A11
RSVD_D12
RSVD_C12

RSVD_F52

20 OF 20

F6
E3
C11
B11
A11
D12
C12
F52

UC1T

BB68
BB69

AK13
AK12

BB2
BA3

AU5

TP5

AT5

TP6

D5
D4
B2
C2

B3
A3

AW1

E1
E2

BA4
BB4

A4
C4

BB5

TP4

A69
B69

AY3

D71
C70

C54
D54

AY4

TP1

BB3

TP2

AY71
AR56

AW71
AW70

AP56
C64

@

T12

PAD~D

@

T13

PAD~D

@

T14

PAD~D

@

T15

PAD~D

@

T128

PAD~D

@

T129

PAD~D

@

T130

PAD~D

@

T126

PAD~D

@

T127

PAD~D

PM_ZVM# <46,51>

@

T113

PAD~D

@

T114

PAD~D

MSM_N <51>

1 2

RC120 100K_0402_5%

+1.8V_PGPPF

1 2

RC361 0_0402_5%@

ZVM# for SKYLAKE-U 2+3e

MSM# for SKYLAKE-U 2+3e

+1.0V_VCCST

AW69
AW68

AU56

AW48

C7
U12
U11
H11

RSVD_AW69
RSVD_AW68
RSVD_AU56
RSVD_AW48
RSVD_C7
RSVD_U12
RSVD_U11
RSVD_H11

SKL-U_BGA1356

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal El ectronics, Inc.

CPU (8/14)

CPU (8/14)

CPU (8/14)

LA-D071P

LA-D071P

LA-D071P

13 64Thursday, July 09, 2015

13 64Thursday, July 09, 2015

13 64Thursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

D D

4

3

2

1

PRIMARY CMC CONN

JTAG/RC/HOOKS

+1.0V_XDP+1.0V_PRIM

VCCOBS_AB

XDP_TRST*

XDP_TDI

XDP_TMS
XDP_TCK0
XDP_TCK1

XDP_TDO

XDP_PREQ*
XDP_PRDY*

HOOK_0
HOOK_3
HOOK_6

XDP_PRSNT_PCH*
XDP_PRSNT_CPU*

<MT> GND

GND

+1.0V_XDP

22

28

XDP_TRST#

29

XDP_TDI

30

XDP_TMS

32

XDP_TCK0

31

XDP_TCK1

35

XDP_TDO

33
34

27

XDP_HOOK0

25

XDP_HOOK3

26

XDP_HOOK6

24

XDP_PRSENT_PCH

23

XDP_PRSENT_CPU

19
36

XDP_PREQ# <10>

XDP_PRDY# <10>

+3.3V_SPI

1 2

RC9

+1.0V_VCCSTG

C C

Place to CPU side

Place to CPU side

RC350

RC351

RC349

+1.0V_XDP

RC353

RC43

RC347

RC35 51_0402_1%

RC348

1 2

CMC@

1K_0402_5%CMC@

12

51_0402_5%CMC@

12

51_0402_5%CMC@

12

51_0402_5%CMC@

1K_0402_5%CMC@

12

0_0402_5%@

12

0_0402_5%@

12

12

51_0402_5%@

XDP_SPI_SI

SOC_XDP_TMS

SOC_XDP_TDI

SOC_XDP_TDO

XDP_ITP_PMODE

XDP_PRSENT_CPU

XDP_PRSENT_PCH

CPU_XDP_TCK0

PCH_JTAG_TCK1

SOC_XDP_TDO<12>
CPU_XDP_TCK0<12>

PCH_JTAG_TCK1<12>

SOC_XDP_TMS<12>

SOC_XDP_TDI<12>
SOC_XDP_TRST#<12>
XDP_ITP_PMODE<13>

XDP_SPI_SI<8>
XDP_SPI_IO2<8>

PCH_RSMRST#_Q<11>

SOC_XDP_TDO
CPU_XDP_TCK0
PCH_JTAG_TCK1
SOC_XDP_TMS

SOC_XDP_TDI
SOC_XDP_TRST#
XDP_ITP_PMODE XDP_HOOK6

XDP_SPI_SI XDP_HOOK3

RC158

CMC@

RPC2

1 8
2 7
3 6
4 5

0_0804_8P4R_5%

CMC@

RPC4

1 8
2 7
3 6
4 5

0_0804_8P4R_5%

CMC@

RPC15

1 8
2 7
3 6
4 5

0_0804_8P4R_5%

1 2

CMC@

XDP_TDO
XDP_TCK0
XDP_TCK1
XDP_TMS

XDP_TDI
XDP_TRST#

XDP_PRSENT_PCHXDP_SPI_IO2

XDP_PRSENT_CPUCFG3

XDP_HOOK0PCH_RSMRST#_Q

1K_0402_5%CMC@

CFG0<13>
CFG1<13>
CFG2<13>
CFG3<13>
CFG4<13>
CFG5<13>
CFG6<13>
CFG7<13>

CFG17<13>
CFG16<13>

CFG8<13>
CFG9<13>
CFG10<13>
CFG11<13>
CFG12<13>
CFG13<13>
CFG14<13>
CFG15<13>

CFG19<13>
CFG18<13>

JPCMC1

1

DATA_0

3

DATA_1

5

DATA_2

7

DATA_3

9

DATA_4

11

DATA_5

13

DATA_6

15

DATA_7

17

DATA_CLK_1P

21

DATA_CLK_1N

2

DATA_8

4

DATA_9

6

DATA_10

8

DATA_11

10

DATA_12

12

DATA_13

14

DATA_14

16

DATA_15

18

DATA_CLK_2P

20

DATA_CLK_2N

OBS DATA

1 2

RC352 0_0603_5%

CMC_DEBUG_36P

INTEL_CMC_PRIMARY

CONN@

B B

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal El ectronics, Inc.

CPU (9/14)

CPU (9/14)

CPU (9/14)

LA-D071P

LA-D071P

LA-D071P

14 64Thursday, July 09, 2015

14 64Thursday, July 09, 2015

14 64Thursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

+VCC_CORE: 0.3~1.35V

D D

@

T122

PAD~D

@

T123

+VCC_EDRAM

+1.8V_PRIM

VCC_EDRAM_SENSE<51>
VSS_EDRAM_SENSE<51>

+VCC_EOPIO

C C

VCCOPC,VCCOPC_1P8,VCCEOPIO for SKYLAKE-U 2+3e
(w/ on package cache)

PAD~D

ShortPad

RC232 0_0603_5%

VCCEOPIO_SENSE<51>
VSSEOPIO_SENSE<51>

+VCC_EDRAM +VCC_EOPIO

+VCC_CORE +VCC_CORE

UC1L

A30

VCC_A30

A34

VCC_A34

A39

VCC_A39

A44

VCC_A44

AK33

VCC_AK33

AK35

VCC_AK35

AK37

VCC_AK37

AK38

VCC_AK38

AK40

VCC_AK40

AL33

VCC_AL33

AL37

VCC_AL37

AL40

VCC_AL40

AM32

VCC_AM32

AM33

VCC_AM33

AM35

VCC_AM35

AM37

VCC_AM37

AM38

VCC_AM38

G30

VCC_G30

K32

RSVD_K32

AK32

RSVD_AK32

AB62

VCCOPC_AB62

P62

VCCOPC_P62

V62

VCCOPC_V62

H63

VCC_OPC_1P8_H63

G61

VCC_OPC_1P8_G61

AC63

VCCOPC_SENSE

AE63

VSSOPC_SENSE

AE62

VCCEOPIO

AG62

VCCEOPIO

AL63

VCCEOPIO_SENSE

AJ62

VSSEOPIO_SENSE

SKL-U_BGA1356

1

2

CC183

1U_0402_6.3V6K

1

1

2

2

CC289

CC288

1U_0402_6.3V6K

1 2

@

1

CC180

2

+VCC_CORE_G0

+VCC_CORE_G1

Jason 6/25

10U_0402_6.3V6M

CPU POWER 1 OF 4

1

2

1U_0402_6.3V6K

SKL-U

1

1

2

CC290

1U_0402_6.3V6K

2

CC291

1U_0402_6.3V6K

VCC_G32
VCC_G33
VCC_G35
VCC_G37
VCC_G38
VCC_G40
VCC_G42
VCC_J30
VCC_J33
VCC_J37
VCC_J40
VCC_K33
VCC_K35
VCC_K37
VCC_K38
VCC_K40
VCC_K42
VCC_K43

VCC_SENSE
VSS_SENSE

VIDALERT#

VIDSCK

VIDSOUT

VCCSTG_G20

12 OF 20

CC292

1U_0402_6.3V6K

G32
G33
G35
G37
G38
G40
G42
J30
J33
J37
J40
K33
K35
K37
K38
K40
K42
K43

E32

VCCSENSE

E33

VSSSENSE

B63

H_CPU_SVIDALRT#

A63

VIDSCLK

D64

VIDSOUT

G20

+1.0V_VCCSTG_R

VIDSCLK <48>

+VCC_CORE

12

12

RC143

0_0603_5%

1 2

@

ShortPad

1

2

RC140

100_0402_1%

RC141

100_0402_1%

Jason 6/25

CC184

10U_0402_6.3V6M

VCCSENSE <48>
VSSSENSE <48>

+1.0V_VCCSTG

1

CC187

2

10U_0402_6.3V6M

PSC(Primary side cap) : Place as close to the package as possible
BSC(Backside cap) : Place on secondary side, underneath the package

Component placement order:
Package edge > 0402 caps > 0805 caps > Bulk caps >Power source

ESD Request

+1.0V_PRIM +VCC_CORE

CC283

CC284

CC285

CC286

1 2

1 2

1 2

1 2

22U_0603_6.3V6M@ESD@

22U_0603_6.3V6M@ESD@

+3VS+1.0V_PRIM

22U_0603_6.3V6M@ESD@

+1.35V_MEM+1.0V_PRIM

22U_0603_6.3V6M@ESD@

B B

SVID ALERT

VIDALERT_N<48>

SVID DATA

A A

VIDSOUT<48>

5

4

+1.0V_VCCST

12

+1.0V_VCCST

12

56_0402_1%

RC152

100_0402_1%

RC157

CAD Note: Place the PU resistors close to CPU
RC204 close to CPU 300 - 1500mils

12

H_CPU_SVIDALRT#

RC153220_0402_5%

CAD Note: Place the PU resistors close to CPU
RC208close to CPU 300 - 1500mils

VIDSOUT

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal El ectronics, Inc.

CPU (10/14)

CPU (10/14)

CPU (10/14)

LA-D071P

LA-D071P

LA-D071P

15 64Thursday, July 09, 2015

15 64Thursday, July 09, 2015

15 64Thursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

+VCCGT: 0.3~1.35V
+VCCGTX : 0.3~1.35V

+VCC_GT +VCC_GT

AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71

A48
A53
A58
A62
A66

J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70

L71
M62
N63
N64
N66
N67
N69

J70

J69

UC1M

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

VCCGT_SENSE
VSSGT_SENSE

SKL-U_BGA1356

D D

C C

+VCC_GT

12

RC161

100_0402_1%

VCC_GT_SENSE<48>
VSS_GT_SENSE<48>

B B

VCC_GT_SENSE
VSS_GT_SENSE

12

RC163

100_0402_1%

CPU POWER 2 OF 4

SKL-U

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70

VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56

VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66

VCCGTX_SENSE
VSSGTX_SENSE

13 OF 20

N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62

AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50

VCCGTX for SKYLAKE-U 2+3e only

AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66

AK62
AL61

VCCSENSE_VCCGTUS
VSSSENSE_VCCGTUS

+VCC_GT

+VCC_GT

12

RC340

@

100_0402_1%

12

RC341

@

100_0402_1%

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal El ectronics, Inc.

CPU (11/14)

CPU (11/14)

CPU (11/14)

LA-D071P

LA-D071P

LA-D071P

16 64Thursday, July 09, 2015

16 64Thursday, July 09, 2015

16 64Thursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

Jason 6/25

ShortPad

RC231

0_0603_5%

1 2

@

BSC PSC

D D

1

1

2

@

BSC

1

1

2

2

CC256

@

1U_0402_6.3V6K

C C

1

1

CC174

CC175

2

2

@

10U_0402_6.3V6M

10U_0402_6.3V6M

1

CC177

CC176

10U_0402_6.3V6M

CC178

2

2

10U_0402_6.3V6M

PSC

CC255

1

2

1U_0402_6.3V6K

1

2

CC293

22U_0603_6.3V6M

+1.0V_VCCST

1

2

1

2

CC257

@

1U_0402_6.3V6K

@

10U_0402_6.3V6M

CC294

PSC

1

2

1

2

22U_0603_6.3V6M

CC195

1U_0402_6.3V6K

CC179

10U_0402_6.3V6M

CC295

22U_0603_6.3V6M

+1.0V_VCCSTG

+1.35V_MEM+1.35V_MEM_CPUCLK

PSC

BSC

1

CC199

2

VDDQ: 8.45A

BSC

1

CC296

2

10U_0402_6.3V6M

+1.35V_MEM

1U_0402_6.3V6K

+1.35V_MEM_CPUCLK

1

CC194

2

1U_0402_6.3V6K

1

CC297

2

0.1U_0402_10V7K

+1.35V_MEM

4

1.35V in DDR3L,

1.2V in LPDDR3 and DDR4

UC1N

CPU POWER 3 OF 4

AU23

VDDQ_AU23

AU28

VDDQ_AU28

AU35

VDDQ_AU35

AU42

VDDQ_AU42

BB23

VDDQ_BB23

BB32

VDDQ_BB32

BB41

VDDQ_BB41

BB47

VDDQ_BB47

BB51

VDDQ_BB51

AM40

VDDQC

A18

VCCST

A22

VCCSTG_A22

AL23

VCCPLL_OC

K20

VCCPLL_K20

K21

VCCPLL_K21

SKL-U_BGA1356

+1.0V_VCCST

PSC

1

2

CC202

1U_0402_6.3V6K

SKL-U

+VCC_SA

VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO

VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA

VCCIO_SENSE
VSSIO_SENSE

VSSSA_SENSE
VCCSA_SENSE

14 OF 20

1 2

RC168 100_0402_1%

AK28
AK30
AL30
AL42
AM28
AM30
AM42

AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30

AM23
AM22

H21
H20

+1.0VS_VCCIO

VCCIO_SENSE
VSSIO_SENSE

+VCC_SA

3

12

RC166

VSA_SEN- <48>
VSA_SEN+ <48>

+1.0VS_VCCIO

12

12

100_0402_1%

RC165

100_0402_1%

VCCIO_SENSE <46>
VSSIO_SENSE <46>

RC167

100_0402_1%

+1.0VS_VCCIO

PSC

2

1

BSCBSC

1

1

2

2

CC181

1U_0402_6.3V6K

1

1

2

2

CC252

1U_0402_6.3V6K

1

1

2

2

CC182

1U_0402_6.3V6K

CC253

1U_0402_6.3V6K

CC186

CC185

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

2

2

CC250

CC251

1U_0402_6.3V6K

1U_0402_6.3V6K

POP option with Volume

1

1

CC249

CC248

2

2

10U_0402_6.3V6M

10U_0402_6.3V6M

PJP15
Always Short

Imax : 3 A

PJP15

PJP@

2

112

JUMP_43X79

0.1U_0402_25V6

+1.0VS_VCCIO+1.0V_VCCSTG_C

CZ1701

1

@

2

B B

+1.0V_VCCST source

PJP27
Always Short

PJP27

RZ1701

22.1K_0402_1%

SIO_SLP_S4#<11,29,44>

A A

1 2

CZ1703

0.1U_0402_10V7K

EN_1.0V_VCCST_ON

1

+1.0V_PRIM

2

+5VALW

12

UZ21

3

1

2

4

6

TPS22967DSGR_SON8_2X2
CZ70
470P_0402_50V 7K

ON

VIN

VIN

VBIAS

CT

VOUT

VOUT

GND
GND

7

+1.0V_VCCST_C

8

5
9

@

PJP@

12

PAD-OPEN1x1m

1 2

CZ78 0.1U_0402_10V7K

+1.0V_VCCST

SIO_SLP_S3#<11,29,40,41,46,51>

SIO_SLP_S0#<11>

+1.0V_VCCSTG source

RZ75

0_0402_5%

1 2

@

+3VALW

5

1

P

IN1

2

IN2

G

UC15

SN74AHC1G08DCKR_SC70-5

3

+1.0V_VCCSTG

6

5

12

+1.0V_VCCSTG_C

+1.0V_PRIM

+5VALW

1U_0402_6.3V6K

0.1U_0402_10V7K

1

CZ87

CZ86

1

@

2

2

4

O

1 2

VCCSTG_EN

RZ1702 49.9K_0402_1%

1 2

RB751S40T1G_SOD523-2

VCCSTG_EN_RVCCSTG_EN

DZ1701

UZ19

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

TPS22961DNYR_WSON8

4.4mohm/6A
TR=12.5us@Vin=1.05V

1

CZ1702

0.1U_0402_10V7K

2

VOUT

GND

PJP32
Always Short

PJP32

PJP@

PAD-OPEN1x3m

1 2

CZ82

0.1U_0402_10V7K

1 2

RC238 0_0603_5%

pop option with UZ21

+1.0V_VCCST+1.0V_VCCSTG

@

@

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal El ectronics, Inc.

CPU (12/14)

CPU (12/14)

CPU (12/14)

LA-D071P

LA-D071P

LA-D071P

17 64Thursday, July 09, 2015

17 64Thursday, July 09, 2015

17 64Thursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

+1.0V_PRIM

D D

+1.8V_PRIM

C C

+3VALW_PCH

+1.8V_PRIM

B B

+3VALW +3.3V_ALW_DSW

A A

Imax : 2.57A

ShortPad

Jason 6/25

1 2

@

RC194 0_0805_5%

RC194 POP option for Volume

RC299 0_0603_5%

1 2

@

ShortPad

RC300 0_0603_5%

1 2

@

ShortPad

RC301 0_0603_5%

1 2

@

ShortPad

RC302 0_0603_5%

1 2

@

ShortPad

RC303 0_0603_5%

1 2

@

ShortPad

Jason 6/25

RC304 0_0603_5%

1 2

@

ShortPad

1 2

@

RC234 0_0603_5%

RC235 0_0603_5%

1 2

@

ShortPad

RC211 0_0603_5%

1 2

@

Jason 6/25

ShortPad

1 2

@

RC212 0_0603_5%

RC305 0_0603_5%

1 2

ShortPad

RC306 0_0603_5%

1 2

ShortPad

RC307 0_0603_5%

1 2

ShortPad

RC308 0_0603_5%

1 2

ShortPad

ShortPad

RC213

0_0603_5%

1 2

Jason 6/25

RC214

0_0603_5%

1 2

ShortPad

Jason 6/25

+3.3V_PGPPB+3VALW_PCH

@

+3.3V_PGPPC

@

+3.3V_PGPPD

@

+3.3V_PGPPE

@

Jason 6/25

@

@

5

+1.0V_PRIM_CORE

+1.0V_MPHYAON

8/28 schematic review

+1.0V_CLK6

+1.0V_DTS

+1.0V_CLK1

+1.0V_CLK3

+1.8V_PGPPF

+3.3V_1.8V_PGPPG

+3.3V_1.8V_PGPPA

+3.3V_SPI

@

22U_0603_6.3V6M

22U_0603_6.3V6M

CC279

1

1

2

2

@

CC280

Change CC215 to 8.2p for RF team.
Jason 6/1

close UC1.AF20 and <400mil

close UC1.K15, UC1.L15 and <100mil

1

2

close UC1.V15 and <100mil

Change CC1801 to 8.2p for RF team.
Jason 6/1

+3VALW +1.8V_PRIM +1.0V_PRIM

1

2

+1.0V_MPHYAON

1

2

CC203

1U_0402_6.3V6K

+1.0V_MPHYGT

close UC1.N15 and CC210 <400mil, CC211 <120mil

1

2

close UC1.AJ19 and <400mil

+1.0V_SRAM

1

2

1 2

RC169

0_0603_5%

ShortPad

Jason 6/25

CC281

@

0.1U_0402_10V7K

Jason 6/25

ShortPad

RC172

0_0603_5%

1 2

CC271

47U_0805_6.3V6M

4

close UC1.AL1 and <120mil

1

2

CC204

1U_0402_6.3V6K

1

CC210

2

@

CC211

+3VALW_PCH

1U_0402_6.3V6K

47U_0805_6.3V6M

RF@

CC217

+1.0V_APLLEBB

@

1U_0402_6.3V6K

1

2

+1.0V_AMPHYPLL+1.0V_MPHYGT

@

1

2

+1.0V_APLL+1.0V_PRIM

@

8.2P_0402_50V8D

CC1801

1

RF@

2

1

1

CC272

2

2

47U_0805_6.3V6M

4

+1.0V_PRIM_CORE

1

CC205

2

@

1U_0402_6.3V6K

close UC1.AF18 and <400mil

+1.0V_AMPHYPLL

+1.0V_APLL

+1.0V_PRIM

8.2P_0402_50V8D

+3.3V_ALW_DSW

CC215

1

2

+3.3V_SPI

+3VALW_PCH

+1.0V_PRIM

close UC1.N18 and <120mil

CC218

1U_0402_6.3V6K

close UC1.K15 and <120mil

1

CC219

2

@

CC264

@

1U_0402_6.3V6K

47U_0805_6.3V6M

0.1U_0603_25V7K

CC225

1

@

2

+1.0V_PRIM_CORE

1

CC273

CC274

2

47U_0805_6.3V6M

47U_0805_6.3V6M

+1.0V_PRIM

close UC1.AB19 an d <400milclose UC1.K17 and <120mil

1

CC206

2

@

1U_0402_6.3V6K

AD17
AD18

close UC1.K19 and <100mil

close UC1.N20 and <100mil

3

PCH PWR

UC1O

AB19
AB20

P18

AF18
AF19

V20
V21

AL1

K17

L1

N15
N16
N17
P15
P16

K15
L15

V15

AB17

Y18

AJ17

AJ19

AJ16

AF20
AF21

T19
T20

AJ21

AK20

N18

SKL-U_BGA1356

Jason 6/25 Jason 6/25

ShortPad

RC170

0_0603_5%

1 2

Jason 6/25

ShortPad

0_0603_5%

1 2

CPU POWER 4 OF 4

VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0

VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE

DCPDSW_1P0

VCCMPHYAON_1P0
VCCMPHYAON_1P0

VCCMPHYGT_1P0_N15
VCCMPHYGT_1P0_N16
VCCMPHYGT_1P0_N17
VCCMPHYGT_1P0_P15
VCCMPHYGT_1P0_P16

VCCAMPHYPLL_1P0
VCCAMPHYPLL_1P0

VCCAPLL_1P0

VCCPRIM_1P0_AB17
VCCPRIM_1P0_Y18

VCCDSW_3P3_AD17
VCCDSW_3P3_AD18
VCCDSW_3P3_AJ17

VCCHDA

VCCSPI

VCCSRAM_1P0
VCCSRAM_1P0
VCCSRAM_1P0
VCCSRAM_1P0

VCCPRIM_3P3_AJ21

VCCPRIM_1P0_AK20

VCCAPLLEBB

@

RC173

@

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

SKL-U

AK15

VCCPGPPA

AG15

VCCPGPPB

Y16

VCCPGPPC

Y15

VCCPGPPD

T16

VCCPGPPE

AF16

VCCPGPPF

AD15

VCCPGPPG

DCPRTC

VCCCLK1

VCCCLK2

VCCCLK3

VCCCLK4

VCCCLK5

VCCCLK6

V19

T1

AA1

AK17

AK19
BB14

BB10

A14

K19

L21

N20

L19

A10

AN11
AN13

VCCPRIM_3P3_V19

VCCPRIM_1P0_T1

VCCATS_1P8

VCCRTCPRIM_3P3

VCCRTC_AK19
VCCRTC_BB14

GPP_B0/CORE_VID0
GPP_B1/CORE_VID1

Take care!!! Note1 on Page 19

15 OF 20

+1.0V_CLK2+1.0V_PRIM

1

CC220

2

@

47U_0805_6.3V6M

+1.0V_CLK4+1.0V_PRIM

1

CC226

2

@

47U_0805_6.3V6M

3

close UC1.L19 and <100mil

+1.0V_MPHYGT source

MPHYP_PWR_EN<11>

close UC1.AG15 an d <120mil

+3.3V_1.8V_PGPPA

+3.3V_PGPPD

+1.8V_PGPPF
+3.3V_1.8V_PGPPG

+1.0V_DTS

+3VALW_PCH

close UC1.AK19 and <120mil

close UC1.BB10 and <120mil

+1.0V_CLK1

+1.0V_CLK2

+1.0V_CLK3

+1.0V_CLK4

+1.0V_CLK5

CORE_VID0 <46>
CORE_VID1 <46>

ShortPad

RC171

0_0603_5%

1 2

@

1

2

+1.0V_PRIM

+5VALW

1

1

CZ84

CZ88

2

2

@

1U_0402_6.3V6K

0.1U_0402_10V7K

2

close UC1.Y16 and <400mil

+3.3V_PGPPB

+3.3V_PGPPC

1

CC265

2

@

1U_0402_6.3V6K

close UC1.AA1 a nd <400mil

1

2

CC214

0.1U_0402_10V7K

+1.0V_CLK6

1

2

CC221

@

47U_0805_6.3V6M

UZ20 @

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

TPS22961DNYR_WSON8

4.4mohm/6A
TR=12.5us@Vin=1.05V

2

+1.0V_MPHYGT

+3.3V_PGPPE

close UC1.T16 and <400mil

1

2

+RTC_CELL

1

2

1

CC207

@

1U_0402_6.3V6K

CC270

CC208

2

@

1U_0402_6.3V6K

+3VALW_PCH

+1.8V_PRIM

1

2

1

2

CC213

1U_0402_6.3V6K

0.1U_0402_10V7K

CC212

1U_0402_6.3V6K

close UC1.A10 and <120mil

CC216

@

1U_0402_6.3V6K

+3VALW_PCH+1.0V_CLK5+1.0V_PRIM

close UC1.AK17 and <120mil

1

1

CC223

2

2

CC224

1U_0402_6.3V6K

0.1U_0402_10V7K

+1.0V_PRIM +1.0V_MPHYGT

Jason 6/25

RC368

0_0603_5%

1 2

@

ShortPad

+1.0V_MPHYGT

6

VOUT

GND

5

1

CZ85

2

@

0.1U_0402_10V7K

DELL CONFIDENTIAL/PROPRIETARY

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Jason 6/25

RC309 0_0603_5%

1 2

@

ShortPad

RC310 0_0603_5%

1 2

@

+1.0V_SRAM

+1.0V_APLLEBB

ShortPad

close UC1.V19 and <120mil

1

CC209

2

@

1U_0402_6.3V6K

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Compal El ectronics, Inc.

CPU (13/14)

CPU (13/14)

CPU (13/14)

LA-D071P

LA-D071P

LA-D071P

18 64Thursday, July 09, 2015

18 64Thursday, July 09, 2015

18 64Thursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

Note1: VCCPRIM_CORE Implementation with PCH CORE_VID Recommendation

SKL-U

UC1P

GND 1 OF 3

A5

VSS

A67

VSS

A70

VSS

AA2

VSS

AA4

D D

C C

B B

AA65
AA68
AB15
AB16
AB18
AB21

AD13
AD16
AD19
AD20
AD21
AD62

AE64
AE65
AE66
AE67
AE68
AE69

AF10
AF15
AF17

AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13

AH63
AH64
AH67
AJ15
AJ18
AJ20

AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69

AL28
AL32
AL35
AL38

AL45
AL48
AL52
AL55
AL58
AL64

AB8

AD8

AF1

AF2
AF4

AH6

AJ4

AK8
AL2

AL4

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SKL-U_BGA1356

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

16 OF 20

AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58

AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38

AV68
AV69
AV70

AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57

AW6
AW60
AW62
AW64
AW66

AW8

AY66

BA10
BA14
BA18

BA23
BA28
BA32
BA36

BA45

AV1

B10
B14
B18
B22
B30
B34
B39
B44
B48
B53
B58
B62
B66
B71

BA1

BA2

F68

UC1Q

GND 2 OF 3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SKL-U_BGA1356

SKL-U

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

17 OF 20

BA49
BA53
BA57
BA6
BA62
BA66
BA71
BB18
BB26
BB30
BB34
BB38
BB43
BB55
BB6
BB60
BB64
BB67
BB70
C1
C25
C5
D10
D11
D14
D18
D22
D25
D26
D30
D34
D39
D44
D45
D47
D48
D53
D58
D6
D62
D66
D69
E11
E15
E18
E21
E46
E50
E53
E56
E6
E65
E71
F1
F13
F2
F22
F23
F27
F28
F32
F33
F35
F37
F38
F4
F40
F42
BA41

F8

VSS

G10

VSS

G22

VSS

G43

VSS

G45

VSS

G48

VSS

G5

VSS

G52

VSS

G55

VSS

G58

VSS

G6

VSS

G60

VSS

G63

VSS

G66

VSS

H15

VSS

H18

VSS

H71

VSS

J11

VSS

J13

VSS

J25

VSS

J28

VSS

J32

VSS

J35

VSS

J38

VSS

J42

VSS

J8

VSS

K16

VSS

K18

VSS

K22

VSS

K61

VSS

K63

VSS

K64

VSS

K65

VSS

K66

VSS

K67

VSS

K68

VSS

K70

VSS

K71

VSS

L11

VSS

L16

VSS

L17

VSS

SKL-U_BGA1356

UC1R

GND 3 OF 3

SKL-U

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

18 OF 20

L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21

R1: PR408,PR411 ; R2: PR417,PR418 ; R3,PR419,PR420 ; R4: PR423 ; R5: PR424

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal El ectronics, Inc.

CPU (14/14)

CPU (14/14)

CPU (14/14)

LA-D071P

LA-D071P

LA-D071P

19 64Thursday, July 09, 2015

19 64Thursday, July 09, 2015

19 64Thursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

DDR_A_DQS#[0..7]<7>

DDR_A_D[0..63]<7>

DDR_A_DQS[0..7]<7>

DDR_A_MA[0..15]<7>

D D

Layout Note:
Place near JDIMM1

+1.35V_MEM

1U_0402 _6.3V6K

12

12

CD7

CD2

10U_060 3_6.3V6M

CD12

CD13@

12

12

Layout Note:
Place near
JDIMM1.203,204

0.1U_0402_10V7K

CD24

1

1

2

2

1U_0402 _6.3V6K

10U_060 3_6.3V6M

0.1U_0402_10V7K

CD25

1U_0402 _6.3V6K

1U_0402 _6.3V6K

12

CD3

10U_060 3_6.3V6M

CD14

12

0.1U_0402_10V7K

1

2

1U_0402 _6.3V6K

12

12

CD9

CD8

10U_060 3_6.3V6M

10U_060 3_6.3V6M

@

CD15

CD16

12

12

0.1U_0402_10V7K

CD26

CD27

1

12

2

1U_0402 _6.3V6K

1U_0402 _6.3V6K

12

12

CD4

@

CD17

CD11

CD10

10U_060 3_6.3V6M

10U_060 3_6.3V6M

CD18

12

12

10U_060 3_6.3V6M

10U_060 3_6.3V6M

@

12

CD28

CD29

1U_0402 _6.3V6K

12

C C

+1.35V_MEM

10U_060 3_6.3V6M

12

B B

A A

+0.675V_DDR_VTT

330U_D3_ 2.5VY_R6M

@

12

CD19

+

Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket

@

CD20

Short Pad

@

1 2

RD15

@

1 2

RD16

Short Pad

0_0402_ 5%

0_0402_ 5%

2.2U_040 2_6.3V6M

@

12

CD5

DDR_A_CKE0<7>

DDR_A_BS2<7>

DDR_A_CLK0<7>
DDR_A_CLK#0<7> DDR_A_CLK#1 <7>

DDR_A_BS0<7>

DDR_A_WE#<7>

DDR_A_CAS#<7>

DDR_A_CS#1<7>

+3VS

+0.675V_DDR_VTT +0.675V_DDR_VTT

0.1U_0402_10V7K

2.2U_040 2_6.3V6M

CD32

@

1

12

CD31

2

+1.35V_MEM +1.35V_MEM+DDR_VREF_A_DQ0

DDR_A_D4 DDR_A_D0
DDR_A_D5

DDR_A_D3
DDR_A_D7

DDR_A_D9
DDR_A_D8

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D37 DDR_A_D36

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D38
DDR_A_D34

DDR_A_D44
DDR_A_D45

DDR_A_D42
DDR_A_D46

DDR_A_CKE0

DDR_A_BS2

DDR_A_MA12 DDR_A_MA11
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3 DDR_A_MA2
DDR_A_MA1 DDR_A_MA0

DDR_A_CLK0

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13
DDR_A_CS#1

DDR_A_D30
DDR_A_D26

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D27
DDR_A_D29

DDR_A_D21
DDR_A_D17

DDR_A_D19
DDR_A_D22

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_D63
DDR_A_D62

Reverse Type

JDIMM1

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

BOSS1

FOX AS0A621-J4RB-7H

CONN@

DQS0#

DQS0

DQ12
DQ13

RESET#

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3

DQ30
DQ31

CKE1

CK1#

RAS#

ODT0

ODT1

VREF_CA

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5

DQ46
DQ47

DQ52
DQ53

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7

DQ62
DQ63

EVENT#

GND2

BOSS2

2

VSS

4

DQ4
DQ5

VSS

VSS
DQ6
DQ7

VSS

VSS
DM1

VSS

VSS

VSS
DM2

VSS

VSS

VSS

VSS

VSS

VDD

A15
A14

VDD

A11

A7

VDD

A6
A4

VDD

A2
A0

VDD

CK1

VDD

BA1

VDD

S0#

VDD

NC

VDD

VSS

VSS
DM4

VSS

VSS

VSS

VSS

VSS

VSS
DM6

VSS

VSS

VSS

VSS

VSS

SDA

SCL

VTT

DDR_A_D1

6
8
10

DDR_A_DQS#0

12

DDR_A_DQS0

14
16

DDR_A_D6

18

DDR_A_D2

20
22

DDR_A_D13

24

DDR_A_D12

26
28
30

DDR_DRAMRST#_R

32
34

DDR_A_D15

36

DDR_A_D14

38
40

DDR_A_D32DDR_A_D35

42
44
46
48
50

DDR_A_D39

52

DDR_A_D33

54
56

DDR_A_D40

58

DDR_A_D41

60
62

DDR_A_DQS#5

64

DDR_A_DQS5

66
68

DDR_A_D47

70

DDR_A_D43

72

74

DDR_A_CKE1

76
78

DDR_A_MA15

80

DDR_A_MA14

82
84
86

DDR_A_MA7

88
90

DDR_A_MA6

92

DDR_A_MA4

94
96
98
100
102

DDR_A_CLK1

104

DDR_A_CLK#1DDR_A_CLK#0

106
108

DDR_A_BS1

110

DDR_A_RAS#

112
114

DDR_A_CS#0

116
118
120
122
124
126
128
130

DDR_A_D31

132

DDR_A_D25

134
136
138
140

DDR_A_D28

142

DDR_A_D24

144
146

DDR_A_D20

148

DDR_A_D16

150
152

DDR_A_DQS#2

154

DDR_A_DQS2

156
158

DDR_A_D18

160

DDR_A_D23

162
164

DDR_A_D53

166

DDR_A_D52

168
170
172
174

DDR_A_D54

176

DDR_A_D55

178
180

DDR_A_D61

182

DDR_A_D60

184
186

DDR_A_DQS#7

188

DDR_A_DQS7

190
192

DDR_A_D58

194

DDR_A_D59

196
198
200
202
204

206
208

0.1U_040 2_25V6

ESD@

CD6

12

CAD NOTE
PLACE THE CAP NEAR TO DIMM RESET PIN

DDR_A_CKE1 <7>

DDR_A_CLK1 <7>

DDR_A_BS1 <7>

DDR_A_RAS# <7>

DDR_A_CS#0 <7>

DDR_A_ODT0 <7>

DDR_A_ODT1 <7>

2.2U_040 2_6.3V6M

@

CD23

12

PCH_SMBDAT <8,21,34>

PCH_SMBCLK <8,21,34>

+DDR_VREF_A_CA

RD29

0_0402_ 5%

DDR_DRAMRST#_R<21>

Short Pad

+DDR_VREF_A_DQ0

1 2

Jason 6/24

DDR3L SODIMM ODT GENERATION

9/17 delete ODT Gen ertation, connect directly to CPU
refer 546765_2 014WW37_SkylakeU_Y_MOW_Rev_1_0

@

+1.35V_MEM

1.8K_040 2_1%

12

RD4

RD5 2_0402 _1%

1.8K_040 2_1%

12

RD6

+1.35V_MEM

12

1 2

470_0402_1%

RD2

DDR_DRAMRST#

12

24.9_04 02_1%

12

RD7

DDR_DRAMRST# <7>

+DDR_VREF_A_DQ

0.022U_0 402_16V7K

CD21

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc .

Compal Electronics, Inc .

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DEL L") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USE D BY OR DISCLOSED TO ANY THIRD

5

4

3

PARTY WITHOUT DELL'S EXPRESS WRITTEN C ONSENT.

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc .

DDR3L

DDR3L

DDR3L

LA-D071P

LA-D071P

LA-D071P

1

20 64T hursday, July 09, 2015

20 64T hursday, July 09, 2015

20 64T hursday, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

Standard Type

JDIMM2

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

BOSS1

FOX AS0A621-J4SB-7H

CONN@

VSS
DQ4
DQ5
VSS

DQS0#

DQS0

VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

RESET#

VSS
DQ14
DQ15

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

CKE1

VDD

VDD

VDD

VDD

VDD

CK1
CK1#

VDD

RAS#

VDD

ODT0

VDD

ODT1

VDD

VREF_CA

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

EVENT#

SDA

SCL

GND2

BOSS2

2
4

DDR_B_D1

6
8
10

DDR_B_DQS#0

12

DDR_B_DQS0

14
16

DDR_B_D7

18

DDR_B_D6

20
22

DDR_B_D13

24

DDR_B_D12

26
28
30

DDR_DRAMRST#_R

32
34

DDR_B_D14

36

DDR_B_D15

38
40

DDR_B_D37

42

DDR_B_D32

44
46
48
50

DDR_B_D34

52

DDR_B_D35

54
56

DDR_B_D40

58

DDR_B_D41

60
62

DDR_B_DQS#5

64

DDR_B_DQS5

66
68

DDR_B_D46

70

DDR_B_D47

72

74
76
78

A15
A14

A11

A7

A6
A4

A2
A0

BA1

S0#

NC

VTT

DDR_B_MA15

80

DDR_B_MA14

82
84

DDR_B_MA11DDR_B_MA12

86

DDR_B_MA7

88
90

DDR_B_MA6

92

DDR_B_MA4DDR_B_MA5

94
96

DDR_B_MA2DDR_B_MA3

98

DDR_B_MA0DDR_B_MA1

100
102
104
106
108

DDR_B_BS1

110

DDR_B_RAS#

112
114

DDR_B_CS#0

116
118
120
122
124
126
128
130

DDR_B_D16

132

DDR_B_D17DDR_B_D20

134
136
138
140

DDR_B_D18

142

DDR_B_D19

144
146

DDR_B_D28

148

DDR_B_D29

150
152

DDR_B_DQS#3

154

DDR_B_DQS3

156
158

DDR_B_D31

160

DDR_B_D30

162
164
166

DDR_B_D48DDR_B_D49

168
170
172
174

DDR_B_D50

176

DDR_B_D51

178
180

DDR_B_D61

182

DDR_B_D60

184
186

DDR_B_DQS#7

188

DDR_B_DQS7

190
192

DDR_B_D62

194

DDR_B_D63

196
198
200
202
204

+0.675V_DDR_VTT

206
208

12

CAD NOTE
PLACE THE CAP NEAR TO DIMM RESET PIN

DDR_B_CKE1 <7>

DDR_B_BS1 <7>

DDR_B_RAS# <7>

DDR_B_CS#0 <7>

PCH_SMBDAT <8,20,34>

PCH_SMBCLK <8,20,34>

0.1U_04 02_25V6

ESD@

CD35

DDR_B_CLK1 <7>

DDR_B_CLK#1 <7>

DDR_B_ODT0 <7>

DDR_B_ODT1 <7>

DDR_DRAMRST#_R <20>

+DDR_VREF_A_CA

2.2U_04 02_6.3V6M

@

CD56

12

+DDR_VREF_B_DQ0

+1.35V_MEM

1.8K_040 2_1%

12

RD18

RD19 2_0402 _1%

1.8K_040 2_1%

12

RD20

+1.35V_MEM

1.8K_040 2_1%

12

RD22

1 2

RD23 2_0402 _1%

1.8K_040 2_1%

12

RD24

1 2

+DDR_VREF_CA+DDR_VREF_A_CA

0.022U_ 0402_16V7K

CD36

12

24.9_04 02_1%

12

RD21

+DDR_VREF_B_DQ

0.022U_ 0402_16V7K

CD54

12

24.9_04 02_1%

12

RD25

Short Pad

RD27

@

0_0402 _5%

+DDR_VREF_B_DQ0

2.2U_04 02_6.3V6M

12

DDR_B_CKE0<7>

DDR_B_CS#1<7>

+3VS

12

RD28

0_0402 _5%

Short Pad

+1.35V_MEM +1.35V_MEM

DDR_B_D5 DDR_B_D4

@

CD33

DDR_B_BS2<7>

DDR_B_CLK0<7>
DDR_B_CLK#0<7>

DDR_B_BS0<7>

DDR_B_WE#<7>

DDR_B_CAS#<7>

12

@

DDR_B_D0

DDR_B_D2
DDR_B_D3

DDR_B_D9
DDR_B_D8

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D11
DDR_B_D10

DDR_B_D33
DDR_B_D36

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D39
DDR_B_D38

DDR_B_D42
DDR_B_D43

DDR_B_D44
DDR_B_D45

DDR_B_CKE0 DDR_B_CKE1

DDR_B_BS2

DDR_B_MA9

DDR_B_MA8

DDR_B_CLK0 DDR_B_CLK1
DDR_B_CLK#0 DDR_B_CLK#1

DDR_B_MA10
DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

DDR_B_MA13
DDR_B_CS#1

DDR_B_D21

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D23
DDR_B_D22

DDR_B_D24
DDR_B_D25

DDR_B_D26
DDR_B_D27

DDR_B_D52 DDR_B_D53

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D55
DDR_B_D54

DDR_B_D56
DDR_B_D57

DDR_B_D58
DDR_B_D59

+0.675V_DDR_VTT

2.2U_04 02_6.3V6M

0.1U_0402_10V7K

@

CD64

1

12

CD63

2

DDR_B_DQS#[0..7]<7>

DDR_B_D[0..63]<7>

DDR_B_DQS[0..7]<7>

+1.35V_MEM

12

+1.35V_MEM

12

DDR_B_MA[0..15]<7>

1U_0402 _6.3V6K

1U_0402 _6.3V6K

12

CD37

CD38

10U_060 3_6.3V6M

10U_060 3_6.3V6M

CD45

CD46@

12

+0.675V_DDR_VTT

0.1U_0402_10V7K

CD57

1

2

Layout Note:
Place near JDIMM2

1U_0402 _6.3V6K

1U_0402 _6.3V6K

12

12

12

CD40

CD39

10U_060 3_6.3V6M

10U_060 3_6.3V6M

CD48

CD47@

12

12

1

2

12

Layout Note:
Place near
JDIMM2.203,204

0.1U_0402_10V7K

0.1U_0402_10V7K

CD59

CD58

1

1

2

2

Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket

1U_0402 _6.3V6K

10U_060 3_6.3V6M

0.1U_0402_10V7K

1U_0402 _6.3V6K

1U_0402 _6.3V6K

12

CD41

10U_060 3_6.3V6M

@

CD49

12

10U_060 3_6.3V6M

CD60

12

1U_0402 _6.3V6K

12

12

CD43

CD42

CD50

@

CD61

CD44

330U_D3 _2.5VY_R6M

10U_060 3_6.3V6M

10U_060 3_6.3V6M

@

@

12

CD53

CD52

CD51

12

12

12

+

10U_060 3_6.3V6M

CD62

+3VS

D D

C C

B B

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

5

4

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DDR3L

DDR3L

DDR3L

LA-D071P

LA-D071P

LA-D071P

1

21 64Thursday, July 09, 2015

21 64Thursday, July 09, 2015

21 64Thursday, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

5

Main Func = Other

Screw hole/FD/EMI stop

H2

H1

H_3P0

H_3P2

D D

@

@

1

HCPU1
H_3P7

1

@

HCPU2
H_3P7

@

H3
H_3P0

@

1

HCPU3
H_3P4

@

1

H4

H5

H_3P0

H_3P0

@

@

1

1

1

HGPU3
H_3P3

@

H6
H_3P2

@

1

@

1

HGPU2
H_3P3

@

1

HGPU1
H_3P3

@

1

H7
H_3P0

4

Mind the voltage rating of the caps.

+19VB

@

12

EC9701

SCD1U25V2KX-GP

12

EC9702

@

@

SCD1U25V2KX-GP

SC1KP50V2KX-1GP

12

EC9703

12

EC9704

SCD1U25V2KX-GP

1

12

EC9717

SC1KP50V2KX-1GP

12

EC9711

SCD1U25V2KX-GP

SC1KP50V2KX-1GP

@

12

EC9712

@

12

EC9713

SCD1U25V2KX-GP

12

EC9708

12

EC9716

3

+19VB

@

12

EC9706

12

EC9714

@

12

EC9707

@

SCD1U25V2KX-GP

12

EC9709

SCD1U25V2KX-GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

12

EC9710

+1.35V_MEM_GFX

@

SCD1U25V2KX-GP

SC1KP50V2KX-1GP

12

EC9705

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

12

EC9715

@

12

EC9740

@

12

EC9746

2

12

EC9741

SCD1U25V2KX-GP

EC9750

@

SC1KP50V2KX-1GP

12

EC9742

SCD1U25V2KX-GP

@

12

EC9751

SC1KP50V2KX-1GP

SCD1U25V2KX-GP

@

12

SCD1U25V2KX-GP

12

SCD1U25V2KX-GP

@

EC9752

12

EC9747

SC1KP50V2KX-1GP

@

12

EC9753

SCD1U25V2KX-GP

@

12

EC9748

@

12

EC9754

@

SCD1U25V2KX-GP

SC1KP50V2KX-1GP

EC9749

1 2

SCD1U25V2KX-GP

1

1

+5VS

@

SC1U10V2KX-1GP

12

EC9720

+17.4V_BATT+

@

SCD1U25V2KX-GP

12

EC9758

@

12

EC9719

12

SC1U10V2KX-1GP

@

EC9759

@

@

SC1U10V2KX-1GP

12

12

EC9723

EC9718

@

SCD1U25V2KX-GP

12

EC9760

SCD1U25V2KX-GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

12

EC9721

@

SCD1U25V2KX-GP

12

EC9761

@

@

SC1U10V2KX-1GP

12

EC9722

+VGA_CORE

12

@

EC9755

12

SCD1U25V2KX-GP

@

SC1U10V2KX-1GP

EC9724

@

12

EC9756

SCD1U25V2KX-GP

FD2

@

FIDUCIAL

H9

1

1

@

H_3P0X3P8N

@

FD3

@

FIDUCAL

1

SPR2
SPRING-24-GP-U

1

FD4

@

FIDUCIAL

@

1

FD5

@

FIDUCAL

1

SPR3
SPRING-13-GP-U

1

FD6

@

FIDUCIAL

1

H8

H_4P0N

@

1

FD1

@

FIDUCAL

SPR1
SPRING-31-GP

@

1

C C

1

@

12

EC9757

+1.35V_MEM_GFX

@

12

EC9726

@

12

EC9736

@

SC1U10V2KX-1GP

12

@

SC1U10V2KX-1GP

12

@

@

12

+3VS + 5VALW

@

SCD1U25V2KX-GP

12

SC1U10V2KX-1GP

EC9727

SC1U10V2KX-1GP

EC9737

12

EC9725

@

12

EC9735

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

EC9730

SC1U10V2KX-1GP

EC9738

@

12

SC1U10V2KX-1GP

EC9728

@

12

EC9734

@

12

EC9729

SC1U10V2KX-1GP

@

SC1U10V2KX-1GP

SC1U10V2KX-1GP

12

EC9731

AUD_AGND

@

@

12

EC9732

@

SC1U10V2KX-1GP

SC1U10V2KX-1GP

12

EC9733

@

12

EC9739

SCD1U25V2KX-GP

12

EC9744

@

12

EC9743

@

SCD1U25V2KX-GP

SC1KP50V2KX-1GP

12

EC9745

SCD1U25V2KX-GP

Main Func = RTC

1

+RTC_CELL+RTC_VCC +3VLP

12

SCD47U6D3V2KX-GP

RTC_DET# <9>

RB551V-30_SOD323-2

C2503

@

B B

2

A A

AFTP2502

RTC1

-

LOTES_AAA-BAT-054-K01

CONN@

1

+RTC_VCC

@

R2502

1

+

1KR2J-1-GP

12

RTC_PWR

RTC_PWR

D2501

2

3

BAS40C-2-GP

2nd = 75.00040.C7D

2

13

D

3rd = 75.00040.A7D

12

R2504
10MR2J-L-GP

G

S

Q2505
2N7002K_SOT23-3

D2502

@

2 1

2015/5/19 Modify
Jason

+RTC_CELL+3VALW

Security Classifica tion

Security Classifica tion

Security Classifica tion

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2015/07/09 2016/07/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

RTC/Screw hole/EMI caps

RTC/Screw hole/EMI caps

RTC/Screw hole/EMI caps

LA-D071P

LA-D071P

LA-D071P

1

1.0(A00)

1.0(A00)

1.0(A00)

22 64T hursday, July 09, 2015

22 64T hursday, July 09, 2015

22 64T hursday, July 09, 2015

Main Func = Audio

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

D D

Jason 6/24

Short Pad

+3VS

R2701

0_0402_5%

1 2

@

25mA

1.5A

+5VS

1 2

@

R2702 0_0805_5%

ShortPad

1 2

@

R2704 0_0805_5%

ShortPad

Jason 6/25

C C

+3V_DVDD

+1.8V_PRIM

1 2

R2705

3246@

1 2

R2710

3234@

+1.8V_PRIM +1.8V_AVDD

B B

LN2306LT1G_SOT23-3

+3VS

Q6205

1 3

D

2

S

G

+5V_PVDD

Layout Note:

Close pin41

0R2J-2-GP
0R2J-2-GP

Short Pad

Jason 6/24

0_0402_5%

1 2

+3V_DVDD

C6214

C2701

12

12

Close pin9

SCD1U16V2KX-3 GP

SC4D7U6D3V3KX- GP

C2708

C2709

C2707

C2706

12

12

12

12

SCD1U16V2KX-3 GP

SCD1U16V2KX-3 GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

Layout Note:

Close pin46

Speaker trace w idth >40mil @ 2 W4ohm speaker po wer

+3V_1.8V_CPVDD

C6215

C6213

12

12

Layout Note:

EC_MUTE#< 29>

Close pin36

SCD1U16V2KX-3 GP

SC4D7U6D3V3KX- GP

moat

R6511

@

12

C2715

AUD_AGND

SC4D7U6D3V3KX-GP

Close pin40

DMIC_CLK<32>

Close pin3

HDA27

ALC3246-CG-GP

SA00008GJ00

AUD_AGND

AUD_AGND

+3V_DVDD

DMIC_DATA_R

C2723

@

SC22P50V2JN-4GP

3246@

1 2

C2712 SC10U6D3V3MX-GP

AUD_SPK_L+<24>

AUD_SPK_L-<24>

AUD_SPK_R-<24>

AUD_SPK_R+<24>

Short Pad

1 2

R2708

@

1 2

@

R6512 100KR2J-1-GP

SC10P50V2JN- 4GP

EC2701

12

@

DMIC_DATA<32>

HDA_CODEC_SDOUT<12>

HDA_CODEC_BITCLK<12>

1 2

HDA_SDIN0<12>

HDA_CODEC_SYNC<12>

HDA_CODEC_RST#<12>

Jason 6/24

0_0402_5%

TP2702

Short Pad

Azalia I/F EMI

HDA_CODEC_SDOUT
HDA_CODEC_BITCLK

SCD1U16V2KX-3 GP

SCD1U16V2KX-3 GP

@

@

12

12

EC2708

EC2709

+1.8V_AVDD

+5V_PVDD

+5V_PVDD

Short Pad

R2714

R2716

Short Pad

Short Pad

LINE1_VREFO_R< 24>

LINE1_VREFO_L<24>

AUD_HP1_JACK_L<24>

AUD_HP1_JACK_R<24>

LDO2_CAP

AUD_SPK_L+

AUD_SPK_L-

AUD_SPK_R-

AUD_SPK_R+

PD#

COMBO-GPI

1

SC4D7U6D3V3KX-GP

1 2

@

1 2

@

HDA_CODEC_SYNC

HDA_CODEC_RST#

SC1U10V2KX-1GP

C2704

1 2

12

C2703
SC1U10V2KX-1GP

+3V_1.8V_CPVDD

HDA27

37

CBP

CBP

38

AVSS2

39

LDO2-CAP

40

AVDD2

41

PVDD1

42

SPK-OUT-L+

43

SPK-OUT-L-

44

SPK-OUT-R-

45

SPK-OUT-R+

46

PVDD2

47

PDB

48

SPDIF-OUT/GPIO2

49

GND

ALC3234-CG-GP

+3V_DVDD

C2717

12

12

C2716

Jason 6/24

DMIC_DATA_R

0_0402_5%

Jason 6/24

DMIC_CLK_R

0_0402_5%

1 2

R2719

@

1 2

@

1 2

Jason 6/24

Jason 6/24

1 2

R6515

0_0402_5%

Short Pad

3234@=>@
Jason 6/24

0_0402_5%
R2720
0_0402_5%

R2718 33_0402_5%

C2705

12

SC2D2U6D3V2MX-G P

CPVEE

CBN

35

34

33

36

CBN

CPVEE

CPVDD

HPOUT-R/PORT-I-R

DVDD1GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3DVSS4SDATA-OUT5BCLK6LDO3-CAP7SDATA-IN8DVDD-IO9SYNC10RESET#11PCBEEP

0_0402_ 5%

@

1 2

R6513

SCD1U16V2KX-3 GP

Short Pad

3234@=>@
Jason 6/24

CODEC_SDOUT_R

CODEC_BITCLK_R

HDA_CODEC_SDIN0

@

30

32

31

LINE1-VREFO-L

LINE1-VREFO-R

HPOUT-L/PORT-I-L

SPDIFO/FRONT_JD/JD3/GPIO3

LDO3_CAP

C2718

12

SC4D7U6D3V3KX- GP

AUD_VREF

28

29

VREF

MIC2-VREFO

MIC2_R/PORT-F-R/SLEEVE

MIC2_L/PORT-F-L/RING

C2719

12

SCD1U16V2KX-3 GP

Reserved for ALC 3234

12

R2711
100KR2J-1-GP

12

C2702

SC4D7U6D3V3KX- GP

LDO1_CAP

27

25

26

AVSS1

AVDD1

LDO1-CAP

LINE2_L/PORT-E-L

LINE2_R/PORT-E-R

LINE1_L/PORT-C-L

LINE1_R/PORT-C-R

NC#20

MIC-CAP

MONO-OUT

MIC2/LINE2_JD/JD2

HP/LINE1_JD/JD1

12

AUD_PC_BEEP_R

+3V_DVDD

HDA_CODEC_RST#_R

MIC2_VREFO <24>

AUD_AGND

+5V_AVDD

AUD_AGND

24

23

22

21

20

19

18

17

16

15

14

13

3234@

V3D3_STB

MIC_CAP

C2713 SC10U6D3V3MX-GP

JDREF

R2707 20KR2F-L-GP

@

AUD_SENSE_A

1 2

@

R6514

0_0402_5%

Short Pad

3234@=>
Jason 6/24

C2710

12

C2711

SCD1U16V2KX-3 GP

LINE1_L <24>

LINE1_R <24>

1 2

SLEEVE <24>

RING2 <24>

1 2

3246@

R6516 0R2J-2-GP

1 2

1 2

R2709

200KR2F-L-GP

AUD_PC_BEEP

SPKR<12>

BEEP<29>

moat

Jason 6/25

+5V_AVDD

AUD_AGND

SC4D7U6D3V3KX- GP

ShortPad

R2703

0_0603_5%

1 2

@

12

Layout Note:

Place close to Pin 26

moat

1 2

R2713 0_0402_5%

1 2

R2712 0_0402_5%

AUD_PC_BEEPMONO_PC_BEEP_R

AUD_SENSE

Layout Note:

Place close to Pin 13

moat

1 2

EC2707

@

0_0402_5%

1 2

EC2706

@

0_0402_5%

1 2

EC2705

@

0_0402_5%

1 2

EC2704

@

0_0402_5%

1 2

EC2703

@

0_0402_5%

+5VS

AUD_AGND

R2706 0_0805_5%@

AUD_AGND

+RTC_CELL

+3VALW

@

AUD_AGND

Layout Note:

Width>40mil, to improve Headpo hone Crosstalk n oise
Change it to sh arp will be bet ter.
Add 2 vias (>0. 5A) when trace layer change.

AUD_AGND

AUD_SENSE <24>

moat

D2701

3

1

AUD_PC_BEEP_C

2

BAT54C-7-F_SOT23-3

RE33 1KR2J-1-GP

ESD@ => @
Jason 6/25

1 2

ESD@ => @
Jason 6/25

Layout Note:

Tied at point o nly under
Codec or near t he Codec

AUD_SENSE_A

12

AUD_AGND

1 2

Short Pad
Short Pad
Short Pad
Short Pad
Short Pad

ShortPad

@

C2901
SCD1U16V2KX-3GP

12

R2717
10KR2J-3-GP

C2720

1 2

R2722

100KR2J-1-GP

moat

AUD_PC_BEEP

SCD1U16V2KX-3GP

+3V_DVDD

12

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

CODEC ALC3234/3246

CODEC ALC3234/3246

CODEC ALC3234/3246

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-D071P

LA-D071P

LA-D071P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

23 64Thursday, July 09, 2015

23 64Thursday, July 09, 2015

23 64Thursday, July 09, 2015

5

Main Func = Audio

4

3

2

1

Layout Note:

Speaker trace width >40mil @ 2W4ohm speaker power

EMI@ => @

SC1KP50V2KX-1GP

EC2901

Jason 6/25

12

EC2902

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

12

12

EC2903

R2906 0_0603_5%@
R2907 0_0603_5%@

R2909 0_0603_5%@
R2911 0_0603_5%@

SC1KP50V2KX-1GP

EC2904

@ESD@

12
12

12
12

2

3

1

R2920 10KR2J-3-GP

12

@

12

AUD_SPK_R+_C
AUD_SPK_R-_C
AUD_SPK_L+_C
AUD_SPK_L-_C

DA13

@ESD@

AZ5125-02S.R7G_SOT23-3

EMI@ => @
Jason 6/25

ShortPad
ShortPad

ShortPad
ShortPad

EC2908

12

SC100P50V2JN-3GP

D D

C C

MIC2_VREFO<23>

RING2<23>

AUD_HP1_JACK_L<23>

LINE1_L<23>

LINE1_VREFO_L< 23>

AUD_HP1_JACK_R<23>

LINE1_R<23>

LINE1_VREFO_R<23>

SLEEVE<23>

1 2

C2907 10U_0603_10V6M

1 2

C2908 10U_0603_10V6M

LINE1-L_C

LINE1-L_R

AUD_SPK_R+<23>
AUD_SPK_R-< 23>
AUD_SPK_L+<23>
AUD_SPK_L-<23>

ShortPad
ShortPad
ShortPad
ShortPad

RE35
RE36

1 2
1 2

2.2K_0402_5%

2.2K_0402_5%

1 2

R2908

1 2

R2922 1KR2J-1-GP

1 2

R2912

1 2

R2910

1 2

R2921 1KR2J-1-GP

1 2

R2913

R2904 0_0603_5%@
R2903 0_0603_5%@
R2902 0_0603_5%@
R2901 0_0603_5%@

10R2F-L-GP

4K7R2J-2-GP

10R2F-L-GP

4K7R2J-2-GP

12
12
12
12

12

AUD_HP1_JACK_L1

AUD_HP1_JACK_R1

2

EC2907

SC100P50V2JN-3GP

3

1

12

Speaker

SPK1

1

1

G5

2

2

3

3

4

4

G6

ACES_50224-0040N-001_4P

CONN@

DA14

AZ5125-02S.R7G_SOT23-3

R2919 10KR2J-3-GP

EC2906

12

@

SC100P50V2JN-3GP

5

6

AUD_SPK_L-_C
AUD_SPK_L+_C
AUD_SPK_R-_C

AUD_SPK_R+_C

EC2905

12

SC100P50V2JN-3GP

1
1
1
1

RING2_R
AUD_PORTA_L_R_B

JACK_PLUG

AUD_PORTA_R_R_B
SLEEVE_R

CONN Pin

Pin1

Pin2

Pin3

Pin4

AFTP2901
AFTP2902
AFTP2903
AFTP2904

Net name

SPK_R+

SPK_R-

SPK_L+

SPK_L-

Universal Jack (Moved to I/O Board)

RING2_R <39>

AUD_PORTA_L_R_B <39>

JACK_PLUG <39>

AUD_PORTA_R_R_B <39>

SLEEVE_R <39>

Layout Note:

B B

A A

Close to HDA27

5

AUD_AGND AUD_AGND

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

JACK_PLUG

2

Jason 6/25

ShortPad

R2923

0_0603_5%

1 2

@

Title

Title

Title

SPKR/JACK

SPKR/JACK

SPKR/JACK

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-D071P

LA-D071P

LA-D071P

Date: Sheet of

Date: Sheet of

Date: Sheet of

10 mils10 mils

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

AUD_SENSE <23>

24 64T hursday, July 09, 2015

24 64T hursday, July 09, 2015

24 64T hursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

Main Func = LAN

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

Layout:
For RTL8111G(S)
* Place C3021 to C3024 close to each VDD10 pin--3, 8, 22, 30
For RTL8106E
* Place C3021,C3022 close to each VDD10 pin-- 8, 30

R3001

D D

C C

B B

C3002,R3001:
Only for
RTL8111 LDO mode.

Layout:
For RTL8111G(S)
* Place C3007 and C3008 close to each VDD33 pin-- 11, 32
For RTL8106E
* Place C3003 and C3008 close to each VDD33 pin-- 23, 32

3D3V_LAN_S5 VDDREG

12

LAN_SW@

C3007

1000@

12

C3002

40 mils

SCD1U16V2KX-3 GP

SCD1U16V2KX-3 GP

1 2

SCD1U16V2KX-3 GP

12

C3008

1 2

0R3J-0-U-GP

1000@

L3001

IND-4D7UH-242-GP

LAN_SW@

12

100@

12

SCD1U16V2KX-3 GP

C3008: close to Pin32

C3003

C3007: close to Pin11
C3003: close to Pin23

LAN_SW@

C3012

LAN_EN<29>

SC4D7U6D3V3KX- GP

ShortPad

0_0603_5%

1 2

PCH_PLTRST#_EC<11,29,32,36,56>

100KR2J-1-GP

LAN_SW@

12

C3019

R3006

@

Jason 6/25

SCD1U16V2KX-3 GP

R3023

12

C3021

SCD1U16V2KX-3 GP

12

C3021: colse to Pin8
C3022 close to Pin30
C3023: close to Pin3
C3024: close to Pin22

VDD10REGOUT

SCD1U16V2KX-3 GP

12

C3022

LAN_SW@

SCD1U16V2KX-3 GP

C3009

12

3D3V_LAN_S5

@

Q3003

1 2

R3016

0_0402_5%

Short Pad

+3VALW

12

C3013

SCD1U16V2KX-3 GP

2

G

13

D

S

Q3001
2N7002K_SOT23-3

LAN_SW@

12

C3023

LAN_SW@

C3010

12

@

12

RE37

10K_0402_5%

Q402_1

LMBT3904LT1G-GP

123

@

Jason 6/24

12

R3021
10KR2J-3-GP

LAN_ENABLE_R_C

SCD1U16V2KX-3 GP

SC4D7U6D3V3KX- GP

X5R

@

12

RE38

10K_0402_5%

PLT_RST#_LAN

R3022

1 2

20KR2J-L2-GP

SCD1U16V2KX-3 GP

LAN_SW@

12

C3024

85mA

12

PM_LAN_ENABLE_R

C3015
SC1U10V2KX-1GP

RTL8111G-CGTRTL8111GUS-CG RTL8106EUS-CG RTL8106E-CGT

71.08111.W03 71.08111.U03

SWR mode SWR mode

LDO mode

10/100/1000M 10/100/1000M

LAN_MDI0P<26>
LAN_MDI0N<26>

LAN_MDI1P<26>
LAN_MDI1N<26>
LAN_MDI2P<26>
LAN_MDI2N<26>

3D3V_LAN_S5

C3004

C3005

12

@

@

SC4D7U6D3V3KX- GP

3D3V_LAN _S5 rise time mu st be co ntrolled
between 0.5 mS a nd 100 m S.

Q3004
NTK3139PT1G_SOT723-3

S

G

2

3D3V_LAN_S5

D

13

RTL8111G-CGT
(71.08111.U03)

SCD1U16V2KX-3 GP

@

C3017

12

LAN CHIP (10/100/1000M & 10/100M co-lay)

REGOUT
VDDREG
VDD10
PCIE_WAKE#
ISOLATE#
PLT_RST#_LAN
LAN_TXN_C_PCH_RXN6
LAN_TXP_C_PCH_RXP6

C3014

C3016

C6205

C6206

C3018

C3025

1 2
1 2

1 2
1 2

1 2

1 2

71.08106.003

10/100M

LOM30

RTL8111G-CG QFN 32P E-LAN CTRL

SA00005V 700

12

SC4D7U6D3V3KX- GP

Layout:
C3004: close to Pin32
C3005: close to Pin11

071.08106.0003

LDO mode

10/100M

1000@

1.0V Source

LDO

R3032
2K49R2F-GP

1 2

RSET

LANXOUT

VDD10

3D3V_LAN_S5

100@

31

32

30

(NC)

(NC)

(NC)

28

RSET

AVDD33

AVDD10

CKXTAL229CKXTAL1

(071.08106.0003)

(NC)

(NC)

(NC)

CLKREQ#

MDIP39MDIN3

AVDD33

12

10

11

LANXOUT

LANXIN

VDD10

VDD10

LAN_MDI3P<26>
LAN_MDI3N<26>

41

LOM30

33

GND

1

MDIP0

2

MDIN0

3

AVDD10

4

MDIP1

5

MDIN1

6

MDIP2

7

MDIN2

8

AVDD10

RTL8106E-CG_QFN32

3D3V_LAN_S5
CLK_LAN_REQ2#_R
PCIE_PTX_LANRX_P6_C
PCIE_PTX_LANRX_N6_C
CLK_PCIE_LAN_P2
CLK_PCIE_LAN_N2

C3011

1 2

10P_0402_50V8J

X3001
XTAL-25MHZ-181-GP

2 3

C3001

1 2

10P_0402_50V8J

R3001 C3002 C3023 C3024 C3007

O O O O O

LAN_TXP_C_PCH_RXP6
LAN_TXN_C_PCH_RXN6

PCIE_PTX_LANRX_P6_C
PCIE_PTX_LANRX_N6_C

1

LED0

TP3003

TPAD14-OP-GP

1

LED1

TP3002

TPAD14-OP-GP

1

LED2

LANXIN

HSIP13HSIN14REFCLK_P15REFCLK_N

TP3001

TPAD14-OP-GP

25

27

26

LED2

LED0

LED1/GPO

(LED1)

24

(NC)

REGOUT

(GPO)

(DVDD33)

23

VDDREG

22

(NC)

DVDD10

21

LANWAKE#

20

ISOLATE#

19

PERST#

18

HSON

17

HSOP

Manu al: 071.08106.00 03

16

RTL8111G-CGT (71.08111.U03/LDO Mode): 10/100/1000M < 252 mW.
RTL8106E-CG (071.08106.0003): 10/100M <70mW.

CLK_PCIE_LAN_REQ#<11>

L3001 C3012 C3019 C3010C3009 C3003

X X X X X

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

SC1U10V2KX-1GP

SCD1U16V2KX-3GP

PCIE_WAKE# <11,29>

12

3D3V_LAN_S5

12

R3003

@

CLK_LAN_REQ#_EN

10KR2J-3-GP

@

Q3002

LMBT3904LT1G-GP

123

1 2

@

R3005

0_0402_5%

Short Pad

X

PCIE_PRX_LANTX_P6 <10>
PCIE_PRX_LANTX_N6 <10>

PCIE_PTX_LANRX_P6 <10>
PCIE_PTX_LANRX_N6 <10>

CLK_PCIE_LAN_P2 <11>
CLK_PCIE_LAN_N2 <11>

12

R3014

1KR2J-1-GP
R3015
15KR2J-1-GP

3D3V_LAN_S5

12

R3004

@

10KR2J-3-GP

CLK_LAN_REQ2#_R

Jason 6/24

+3VS

RTL8111GUS-CG
(71.08111.W03)/
RTL8106EUS-CG
(71.08106.003)

A A

5

4

RTL8106E-CG
(071.08106.0003)

SWR

LDO

X X O O O

X

X X X

3

O OOOO

X X

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

X X X X

Compal Secret Data

Compal Secret Data

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Compal Secret Data

2

X

O

Deciphered Date

Deciphered Date

Deciphered Date

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

LAN RTL8106/8111

LAN RTL8106/8111

LAN RTL8106/8111

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-D071P

LA-D071P

LA-D071P

1

25 64Thursday, July 09, 2015

25 64Thursday, July 09, 2015

25 64Thursday, July 09, 2015

5

Main Func = LAN

4

3

2

1

LAN TransFormer (10/100/1000M & 10/100M co-lay)

EU3101

MDO0+

MDO0-

MDO1+

MDO2+

MDO2-

MDO1-

MDO3+

MDO3-

1

2

4

5

3

1

2

4

5

3

@ESD@

EU3102

@ESD@

1

2

3

4

5

6

7

8

D D

MCT1
MCT3
MCT2
MCT0

XF3102

LAN_MDI3N<25>

LAN_MDI3P<25>

LAN_MDI2N<25>

LAN_MDI2P<25>

C C

LOM_TCT

12

C3106
SCD01U50V2KX-1GP

LAN_MDI1N<25>

LAN_MDI1P<25>

LAN_MDI0N<25>

LAN_MDI0P<25>

Layout note:
30 mil spacing between MDI differential pairs.

EC3108

EC3107

EC3106

EC3105

EC3104

EC3103

EC3102

EC3101

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

SC10P50V2JN-4GP@

SC10P50V2JN-4GP@

SC10P50V2JN-4GP@

SC10P50V2JN-4GP@

SC10P50V2JN-4GP@

SC10P50V2JN-4GP@

SC10P50V2JN-4GP@

SC10P50V2JN-4GP@

@

TD-6TX-

5

TD+

4

3
2
1

1
2
3

4
5

TX+

TDCT

TXCT

RDCT

RXCT

RD-

RX-

RD+

RX+

NS14-1 LF 10/100 BASE-TX

XF3101

@

RD+

RX+

RD-

RX-

RDCT

RXCT

TDCT

TXCT

TD+

TX+

TD-6TX-

NS14-1 LF 10/100 BASE-TX

7
8
9

MCT0

10

MCT1

11
12

12
11
10

MCT2

9

MCT3

8
7

MDO3-

MDO3+

MDO2-

MDO2+

MDO1-

MDO1+

MDO0-

MDO0+

Layout note:
30 mil spacing between MDI differential pairs.

R3101 75_0603_5%

R3103 75_0603_5%

R3102 75_0603_5%

R3104 75_0603_5%

1 2

1 2

1 2

1 2

MCT

12

C3101
SC100P3KV8JN-2-GP

LANGND

LAN_MDI0P

LAN_MDI0N

LAN_MDI1P

LAN_MDI1N

LAN_MDI2P

LAN_MDI2N

LAN_MDI3P

LAN_MDI3N

Follow Refe rence Schematic 0.01uF~0.4u F

B B

XF3102

SP050007K0 0

1000@

S X'FORM_ NS14-1 L F 10100 BASE-TX

XF3101

SP050007K0 0

Main:
SP050007K00, S X'FORM_ HD-081-A LAN
2nd:
SP050008L00, S X'FORM_ NS681677 LAN
Jason 2015/04/27

9

8

7

6

9

8

7

6

RJ45

TX0+

TX0-

RX1+

TX2+

TX2-

RX1-

TX3+

TX3-

SANTA_130456-661

CONN@

LAN_MDI0P

LAN_MDI0N

LAN_MDI1P

LAN_MDI1N

LAN_MDI2P

LAN_MDI2N

LAN_MDI3P

LAN_MDI3N

LANGND

GND

GND

10

9

S X'FORM_ NS14-1 L F 10100 BASE-TX

A A

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

XFOM&RJ45

XFOM&RJ45

XFOM&RJ45

LA-D071P

LA-D071P

LA-D071P

1.0(A00)

1.0(A00)

1.0(A00)

26 64T hursday, July 09, 2015

26 64T hursday, July 09, 2015

26 64T hursday, July 09, 2015

1

5

4

Main Func = Card Reader

3

2

The maximum range of the PMOS output current in RTS5170 (Card Reader IC) is 400mA

1

SP1
SP2
SP3
SP4
SP5
SP6
SP7

V18

3D3V_CARD_S0

4

24

5

V18

3V3_IN

DM2DP

3

1

12

CARD_3V3

GPIO0

RREF

17

RREF

R3203

6K2R2F-GP

SDREFG

6

23

XD_D7

SDREG

CR_GPIO0

1 2

C3206

SC1U10V2KX-1GP

7

15

XD_CD#

SP8

16

SP9

18

SP10

19

SP11

20

SP12

21

SP13

22

SP14

GND

25

SD_CLK_5170

TP32011

EC3201

R3201

SD_CMD <28>

SD_D3 <28>
SD_D2 <28>

For EMI

Layout: close to U3201

EMI@

1 2

SC10P50V2JN-4GP

EMI@

1 2

33R2J-2-GP

3D3V_CARD_S0

12

SCD1U16V2KX-3GP

C3202

@

12

SCD01U50V2KX-1GP

C3204

SD_CLK <28>

D D

C C

B B

+3VS

12

C3203

SC4D7U6D3V3KX-GP

SD_WP<28>

SD_D1<28>
SD_D0<28>

SD_CD#<28>

12

C3205

SCD1U16V2KX-3GP

Short Pad

R3202

0_0402_ 5%

@

1 2

R3204

0R2J-2-GP

1 2

Jason 6/24

SD_WP_5170

EMI@

1 2

C3201

SC1U10V2KX-1GP

8

9
10
11
12
13
14

RTS5170-GR-GP

USB_PN6_R

USB_PP6_R

U3201

TR3201

USB_PN6<10>

USB_PP6<10>

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

3 4

MCM1012B900F06BP_4P

@EMI@

R3205

0R2J-2-GP

1 2

EMI@

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

4

12

USB_PN6_R

USB_PP6_R

USB2.0 90ohm
Main SM070003Z00(S COM FI_ INPAQ MCM1012B900F06BP)
2nd SM070004U00(S COM FI_ MURATA DLM11SN900HY2L)
3rd SM070004400(S COM FI_ PANASONIC EXC24CQ900U)

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

3

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

2

Compal Electronics, Inc.

Card Reader RTS5170

Card Reader RTS5170

Card Reader RTS5170

LA-D071P

LA-D071P

LA-D071P

27 64Thursday, Jul y 09, 2015

27 64Thursday, Jul y 09, 2015

27 64Thursday, Jul y 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

Main Func = Card Reader

3D3V_CARD_S0

D D

3D3V_CARD_S0

SCD1U16V2KX-3GP

12

C3301

C C

SC4D7U6D3V3KX-GP

12

C3302

SC10U10V5KX-2GP

@

12

C3303

SD_CMD<27>
SD_CLK<27>
SD_CD#<27>
SD_WP<27>

SD_D0<27>
SD_D1<27>
SD_D2<27>
SD_D3<27>

Short Pad

R3301

Jason 6/24

@

1 2

0_0402_ 5%

400mA

SD_CD_R#

CARD1

4

VDD

2

CMD

5

CLK

10

CD

11

WP

7

DAT0

8

DAT1

9

DAT2

1

CD/DAT3

CARDBUS11P-SKT-8-GP

CONN@

NP1
NP2

VSS
VSS

NP1
NP2

12

12

13

13

14

14

15

15

3
6

2rd = 020.I0002.0001

For EMI Reserved

SD_WP

SD_D0

SD_CD_R#

SD_CMD

SD_D3

B B

SD_D2

SD_D1

SD_CMD
SD_CLK
SD_CD_R#
SD_WP
SD_D0
SD_D1
SD_D2
SD_D3

3D3V_CARD_S0

AFTP33021
AFTP3303

1

AFTP33041
AFTP33051
AFTP3306

1

AFTP33071
AFTP33081
AFTP3309

1

AFTP33101

12

@

A A

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

12

@

EC3301

SC4D7P50V2BN-GP

Issued Date

Issued Date

Issued Date

12

@

EC3302

SC4D7P50V2BN-GP

12

@

EC3303

SC4D7P50V2BN-GP

4

12

@

EC3304

SC4D7P50V2BN-GP

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

12

@

EC3305

EC3306

SC4D7P50V2BN-GP

SC4D7P50V2BN-GP

Compal Secret Data

Compal Secret Data

Compal Secret Data

12

@

EC3307

SC4D7P50V2BN-GP

Deciphered Date

Deciphered Date

Deciphered Date

3

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

2

Compal Electronics, Inc.

Card Reader RTS5170

Card Reader RTS5170

Card Reader RTS5170

LA-D071P

LA-D071P

LA-D071P

28 64Thursday, Jul y 09, 2015

28 64Thursday, Jul y 09, 2015

28 64Thursday, Jul y 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

45

KSI0

3

KSI1

2

KSI2

1

KSI3

45

KSI4

3

KSI5

2

KSI6

1

KSI7

KSO0
KSO1
KSO2
KSO3

KSO4
KSO5
KSO6
KSO7

KSO10
KSO11
KSO12
KSO13

KSO8
KSO15
KSO14
KSO16

12

KSO9

12

USB_EN#

12

BAT1_LED#

12

BAT2_LED#

12

PCH_ALW_ON

@EMI@

CE78

0.1U_0402_ 10V7K

12

SATA_LED#<10,37>

SATA_LED#_R<37>

SN74LVC1G06DCKR_SC70-5

47P_0402 _50V8J

+3VS

10
9
8
7
6
5
4
3
2
1

5

CLK_PCI_LPC_MEC<8>

CE86

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#

5

@EMI@

R2455
0_0402_ 5%

1 2

RE413 15_ 0402_1%1 2

1 2

RE414 15_ 0402_1%
RE416 15_ 0402_1%1 2

1 2

R2405 0R2J-2-GP

@

@

RE410

0_0402_ 5%

Short Pad

Jason 6/24

ALL_SYS_PWRGD<11>

+3VS

5

UE6

P

Y4A

1

G3NC

1

2

PCH_PLTRST#_EC <11,25,29,32,36,56>

CLK_PCI_LPDEBUG <8>

+3VALW_EC +3VALW_EC+3VALW

Jason 6/25

RE343

0_0603_5%

12

@

ShortPad

KSI[0..7]<38>

KSO[0..16]<38>

12

ALL_SYS_PWRGD RUNPWROK

Jason 6/24

RE438

Short Pad

MEC_XTAL1 MEC_XTAL1_R

0.1U_040 2_10V7K

CE85

1

1

2

PCH_PLTRST#_EC<11,25,29,32, 36,56>

ME_SUS_PWR_ACK<11>

TOUCHPAD_INTR#<12,38>

10U_0603_6.3V6M

CE89

CAP_LED#<38>

CLK_TP_SIO<38>

DAT_TP_SIO<38>

SIO_PWRBTN#<11>
PCH_RSMRST#<11>

LPC_LAD0<8>
LPC_LAD1<8>
LPC_LAD2<8>
LPC_LAD3<8>

LPC_LFRAME#<8>

CLKRUN#<8>

SIO_EXT_SMI#<6>

TP_PW_EN#<38>

SIO_RCIN#<8>

SIO_EXT_SCI#<10>

RTCRST_ON<11>

SIO_SLP_S4#<11,17,44>

PCH_ALW_ON<40>

@

RESET_OUT#<11>

@

RE366

0_0402_ 5%

Short Pad

Jason 6/24

1

2

SERIRQ<8>

AC_DIS<42>

LAN_EN<25>

USB_EN#<31>

12

0.1U_040 2_10V7K

CE62

0_0402_ 5%

12

2

2

H_PROCHOT_EC

RE380
100K_0402_5%

1 2

JDEG1

CONN@

1
2
3
4
5
6
7
8

11

9

GND

12

10

GND

ACES_51522-01001-001

SP01001AL00

CIS Link OK

RPE2 10K_8P4R_ 5%

+3VALW

6
7
8

RPE3 10K_8P4R_ 5%

6
7
8

1 8
2 7

D D

C C

B B

3 6
4 5

RPE4
100K_8P4R_5%

1 8
2 7
3 6
4 5

RPE5
100K_8P4R_5%

1 8
2 7
3 6
4 5

RPE6
100K_8P4R_5%

1 8
2 7
3 6
4 5

RPE7
100K_8P4R_5%

RE389 100 K_0402_5%

RE388 100 K_0402_5%

RE408 100 K_0402_5%

RE409 100 K_0402_5%

RE390 100 K_0402_5%

PCH_SPI_CLK_0_R<8 >
PCH_SPI_D0_0_R<8>

PCH_SPI_D1_0_R<8>

PCH_SPI_CS#0_R1<8 >

H_PROCHOT#<12,41,42,48>

Debug Connector

DB1

A A

CONN@

12

10

GND

11

9

GND

8
7
6
5
4
3
2
1

ACES_51522-01001-001

SP01001AL00

CIS Link OK

4

1000P_04 02_50V7K

@EMI@

1000P_04 02_50V7K

@EMI@

2

2

1

12

1

CE64

CE63

+RTC_CELL

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

PCH_RSMRST#

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PCH_PLTRST#_EC

EC_SPI_CLK
EC_SPI_MOSI
EC_SPI_MISO
SATA_LED#_R

EC_SPI_CS0#

PCH_ALW_ON

TOUCHPAD_INTR#

RESET_OUT#

MEC_XTAL2

32 KHz Clock

Y1

1 2

32.768KHZ_9PF_X1A000141000200

1

C5225

10P_0402 _50V8J

2

SJ10000IN00
SJ10000IA00

1
2
3
4
5
6
7
8
9
10

MEC_XTAL2MEC_XTAL1

20ppm / 9pF
ESR <50kohm (MAX)

pin6,7 need assign GPIO for multi function???

RE71 49.9_0 402_1%

JTAG_TDI
JTAG_TMS
JTAG_CLK
JTAG_TDO
MSCLK
MSDATA

+3VALW

12

RE420 0_0 402_5%12
RE421 0_0 402_5%
RE422 0_0 402_5%12
RE423 0_0 402_5%

4

0.1U_040 2_25V6

CE65

2
14
15
16
37
38
39
50
46
68
72
74
75
76
77
86
92
93

98
99

6

7

104
105
107
108

78
79
52
88

59
60
61
62
58
56
57
63
55
10
49
53
66

32
28
29
30
31
27

67
69
71
42
33

3

13
48
73

125
123

0.1U_040 2_25V6

0.1U_040 2_25V6

12

ShortPad

RE349

0_0603_5%

@

Jason 6/25

0.1U_0402_ 10V7K

UE1 @

GPIO027/KSO00/PVT_IO1
GPIO015/KSO01/PVT_nCS
GPIO016/KSO02/PVT_SCLK
GPIO017/KSO03/PVT_IO0
GPIO045/BCM_nINT1/KSO04
GPIO046/BCM_DAT1/KSO05
GPIO047/BCM_CLK1/KSO06
GPIO025/KSO07/PVT_IO2
GPIO055/PWM2/KSO08/PVT_IO3
GPIO102/KSO09/CR_STRAP
GPIO106/KSO10
GPIO110/KSO11
GPIO111/KSO12
GPIO112/PS2_CLK1A/KSO13
GPIO113/PS2_DAT1A/KSO14
GPIO125/KSO15
GPIO132/KSO16
GPIO140/KSO17

GPIO143/KSI0/nDTR
GPIO144/KSI1/nDCD
GPIO005/SMB00_DATA/SMB00_DATA18/KSI2
GPIO006/SMB00_CLK/SMB00_CLK18/KSI3
GPIO147/KSI4/nDSR
GPIO150/KSI5/nRI
GPIO151/KSI6/nRTS
GPIO152/KSI7/nCTS

GPIO114/PS2_CLK0
GPIO115/PS2_DAT0
GPIO026/PS2_CLK1B
GPIO127/PS2_DAT1B

GPIO040/LAD0
GPIO041/LAD1
GPIO042/LAD2
GPIO043/LAD3
GPIO044/nLFRAME
GPIO064/nLRESET
GPIO034/PCI_CLK
GPIO067/nCLKRUN
GPIO063/SER_IRQ
GPIO011/nSMI/nEMI_INT
GPIO060/KBRST
GPIO061/nLPCPD
GPIO100/nEC_SCI

GPIO126/SHD_SCLK
GPIO133/SHD_IO0
GPIO134/SHD_IO1
GPIO135/SHD_IO2
GPIO136/SHD_IO3
GPIO123/SHD_nCS

GPIO101/SPI_CLK
GPIO103/SPI_IO0
GPIO105/SPI_IO1
GPIO052/SPI_IO2
GPIO062/SPI_IO3
GPIO001/SPI_nCS/32KHZ_OUT

nRESET_IN/GPIO014
GPIO057/VCC_PWRGD
GPIO107/nRESET_OUT

XTAL2
XTAL1

1

C5226

10P_0402 _50V8J

2

12

12

CE67

CE66

12

+RTC_CELL_VBAT

CE73

ICSP_CLK

12

ICSP_CLR

12

ICSP_DAT

Pin8 5085_TXD for EC Debug
pin9 5048_TXD for SBIOS
debug

0.1U_040 2_25V6

CE68

1

2

VSS_VBAT

124

ShortPad

Close UE1

0.1U_040 2_25V6

12

CE69

43

103

122

VTR5VTR19VTR

VBAT

GPIO007/SMB01_DATA/SMB01_DATA18

GPIO010/SMB01_CLK/SMB01_CLK18

GPIO012/SMB02_DATA/SMB02_DATA18

GPIO013/SMB02_CLK/SMB02_CLK18

GPIO130/SMB03_DATA/SMB03_DATA18

GPIO131/SMB03_CLK/SMB03_CLK18

GPIO141/SMB04_DATA/SMB04_DATA18

GPIO142/SMB04_CLK/SMB04_CLK18

MEC1404

GPIO166/CMP_VREF1/UART_CLK

VSS17VSS51AVSS

VSS

VSS64VSS

84

112

100

Jason 6/25

EC_AGND

RE398

0_0603_5%

12

@

EC_AGND

+3VALW

10K_0402 _5%

10K_0402 _5%

12

12

RE72

T4932

@

3

+3VALW_EC

VTR65VTR82VTR

GPIO030/BCM_nINT0/PWM4
GPIO031/BCM_DAT0/PWM5
GPIO032/BCM_CLK0/PWM6

GPIO157/LED0/TST_CLK_OUT

GPIO116/TFDP_DATA/UART_RX

GPIO117/TFDP_CLK/UART_TX

GPIO033/PECI_DAT/SB_TSI_DAT

VR_CAP

18

@

VR_CAP

C5224 1U_0603_16V7

10K_0402 _5%

12

RE73

RE348

0_0402_ 5%

@

Short Pad

Jason 6/24

VTR_33_18

GPIO050/TACH0
GPIO051/TACH1

GPIO053/PWM0
GPIO054/PWM1

GPIO056/PWM3

GPIO002/PWM7

GPIO156/LED1
GPIO104/LED2

GPIO035/SB-TSI_CLK

VREF_CPU

GPIO145/ICSP_CLOCK

GPIO146/ICSP_DATA

ICSP_MCLR

BGPO/GPIO004

SYSPWR_PRES/GPIO003

VCI_OUT/GPIO036

nVCI_IN1/GPIO162
nVCI_IN0/GPIO163

VCI_OVRD_IN/GPIO164

GPIO160/DAC_0
GPIO161/DAC_1

DAC_VREF

GPIO124/CMP_VOUT0

GPIO020/CMP_VIN0

GPIO165/CMP_VREF0

GPIO120/CMP_VOUT1

GPIO021/CMP_VIN1

GPIO024/CMP_STRAP0

GPIO023/ADC6/A20M

GPIO022/ADC5
GPIO153/ADC4
GPIO154/ADC3
GPIO155/ADC2
GPIO122/ADC1
GPIO121/ADC0

ADC_VREF

MEC1404-NU-TR_VTQFP128_14X14

T4931

1 2

ESR <100m ohms

Close UE1

100K_040 2_5%

12

@

RE74

RE75@

HOST_DEBUG_TX

3

2

UE1

EC@

RE345

EC Chip CPN

MEC1404-NU-D0_VTQFP128_14X14

SA000084410

12

CE71

1 2

54

8
9
11
12
89
91
96
97

40
41

44
45

47
34
35
36
4

1
106
70

80
81

90
94

95

101
102
87

119
120
121
126
127
128

23
24
22

85
20
25

83
21
26

118
117
116
109
110
111
113
114
115

0.1U_0402_ 25V6

PBAT_CHG_SMBDAT
PBAT_CHG_SMBCLK
GPU_THM_SMBDAT
GPU_THM_SMBCLK

PBAT_PRES#

RE441 10K_0 402_5%1 2

FAN1_TACH
LID_CL_SIO#

PCIE_WAKE#

BAT1_LED#
BAT2_LED#
SIO_SLP_S3#

ME_FWP_EC
HOST_DEBUG_TX

PTP_DIS#_R PTP_DIS#
PECI_MEC1404

VREF_CPU

ICSP_CLK
ICSP_DAT
ICSP_CLR

EC_MUTE#_R EC_MUTE#

VCI_IN1
POWER_SW_IN#

3D_CAM_EN_EC

CMP_VOUT0
CMP_VIN0

RE394@0_0402_ 5%

VCREF0

H_PROCHOT_EC

CMP_STRAP0

MODEL_ID
I_ADP_R
BOARD_ID

I_BATT_R

I_ADP_R

CE87 2200P_0402_25V7K

EC_AGND

I_BATT_R

CE88 2200P_0402_25V7K

EC_AGND

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PBAT_CHG_SMBDAT <41,42>
PBAT_CHG_SMBCLK <41,42>
GPU_THM_SMBDAT <8,38,57>
GPU_THM_SMBCLK <8,38,57>

SYS_PWROK <11 >

L_BKLT_EN_EC <6>
SIO_SLP_SUS# <11,45,46,47>

FAN1_TACH <38>

KB_LED_PWM <38>
BEEP <23>

DGPU_PWROK <12,40,52>
SUSACK# <11>
EC_WAKE# <11>

PS_ID <41>

PCIE_WAKE# <11,25>

BAT1_LED# <37>
BAT2_LED# <37>

SIO_SLP_S3# <11,17,40,41,46,5 1>

ME_FWP_EC <12>
HOST_DEBUG_TX <36>

RE434

@

1 2

RE353

@

RE435 0_0 402_5%

@

RE436 0_0 402_5%

RE433

@

ALWON <43>

RE437 100 K_0402_5%1 2

ACAV_IN <11,42>

FAN1_DAC_1 <38 >

CMP_VOUT0 <43>

1 2

Short Pad

GPU_PWR_LEVEL <57>
LCD_TST <32>

RE385

1 2

PANEL_BKEN_EC <32>
SIO_EXT_WAKE# <9>

FW_UPDATE_EC

RE442

For 3D-CAM 2015/Jason

RE399 300_0402_5%

1 2

1

2

EC_AGND

RE400 300_0402_5%

1 2

1

2

EC_AGND

0_0402_ 5%

12

43_0402 _1%

12
12

Short Pad

12

0_0402_ 5%

VCIN0_PH <38>

Jason 6/24

10K_0402 _5%

I_ADP <42>

I_BATT <42>

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

+3VS

Short Pad

Jason 6/24

0_0402_5%@ 12

PECI_EC

EC_MUTE#
PTP_DIS#

22.1K_0402_1%

SD034221280

RE345 For
Board ID Select

Pre-EVT
EVT
DVT1
DVT2
Pilot TBD

1

CE76
100P_040 2_50V8J

2

Jason 6/24

+RTC_CELL

+3VALW_EC

12

+3VALW

I_SYS <42,48>

+3VALW_EC

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

SD034100280 10K_04 02_1%

EC@

SD034270280 27K_04 02_1%

SD034499280 49.9K_ 0402_1%
SD034576280
SD034649280 64.9K_ 0402_1%

SD000002780 82.5K_ 0402_1%
SD034931280 93.1K_ 0402_1%
SD034107380
SD034120380

10K

SD034137380
SD034154380

13.7K

17.8K

SD034200380

22.1K

SD034232380

SD034100380 100K_0 402_1%

PBAT_PRES# <41,4 2>

PTP_DIS# <38>

EC_MUTE# <23>

1 2

RE356 1 K_0402_5%

100K_040 2_5%

12

RE358

0.1U_040 2_25V6

CE79

VCREF0

0.1U_040 2_25V6

12

0.1U_040 2_25V6

12

CE81

EC_AGND

EC_AGND

Reserve to Control 3D Camera

3D_CAM_EN_EC

RB551V-30_SOD323-2

FW_UPDATE_EC

RB551V-30_SOD323-2

Deciphered Date

Deciphered Date

Deciphered Date

2

+3VALW

CE91

12

12

13.7K_0402_1%SD034137280

17.8K_0402_1%SD034178280

22.1K_0402_1%SD034221280

32.4K_0402_1%SD034324280

37.4K_0402_1%SD034374280

57.6K_0402_1%

73.2K_0402_1%SD00000B180

107K_0402_1%
120K_0402_1%
137K_0402_1%
154K_0402_1%
200K_0402_1%
232K_0402_1%

PECI_EC

VREF_CPU

RE396
10K_0402 _1%

RE397
10K_0402 _1%

3D@

21

DE9

3D@

21

DE10

Model ID

12

DE8
AZ5125-01H.R7G_SOD523-2

@

0.1U_040 2_25V6

12

CE77

+3VLP

3D_CAM_EN <9,64>

FW_UPDATE <9,64>

1

MODEL_ID

0.1U_040 2_10V7K

C2403

POWER_SW_IN#

+3VALW_EC

12

R2446
100K_0402_1%

Ra

DIS@

1

R2407

Rb

100K_0402_1%

2

UMA@

1 2

EC_AGND EC_AGND

PECI_EC <12 >

+1.0V_PRIM

+3VALW

LID_CL_SIO#

@

+RTC_CELL

100K_040 2_5%

12

RE31

RE428 10K_0402 _5%

1U_0402 _6.3V6K

12

CE12

PBAT_CHG_SMBDAT

PBAT_CHG_SMBCLK

GPU_THM_SMBDAT

GPU_THM_SMBCLK

PCIE_WAKE#

TOUCHPAD_INTR#

RESET_OUT#

ME_FWP_EC

PCH_RSMRST#

100K_040 2_5%

12

RE25

0.047U_0 402_16V4Z

CE8

12

1 2

CMP_VIN0

PCH_PLTRST#_EC

FAN1_TACH

SIO_SLP_S3#

RESET_OUT#

ACAV_IN

Board ID

BOARD_ID

0.1U_040 2_10V7K

CE70

1

2

1 2

RE424 4.7K_0402_5%

1 2

RE425 4.7K_0402_5 %

1 2

@

RE426 2.2K_0402_5%

1 2

@

RE427 2.2K_0402_5%

RE354

1 2

RE440 100K_0402_5%

1 2

RE367

1 2

RE357 1K_0402_5%

@

1 2

RE355 10K_0402_5%

RE26

0_0402_ 5%

12

@

Short Pad

Jason 6/24

@1 2

RE392 100K_0402_5%

1 2

CE72 0.047U_0402_16V4Z

ESD@

1 2

CE75 220P_0402_5 0V8J

ESD@

1 2

CE74

ESD@

1 2

CE82 1000P_0402_50V7K

CE84

Close to UE1 each pin

Compal Electronics, Inc.

Title

Title

Title

EC MEC1404

EC MEC1404

EC MEC1404

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-D071P

LA-D071P

LA-D071P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

12

RE345
100K_0402_1%

Ra

@

Rb

RE347
100K_0402_1%

1 2

+3VALW_EC

12

10K_0402 _5%

10K_0402 _5%

LID_CLOSE# <32,37>

POWER_SW#_MB <37>

+3VALW

12

RE404

100K_0402_5%

CMP_VOUT0

0.1U_0402_ 10V7K

12

100P_040 2_50V8J

29 64Thursday, July 09, 2015

29 64Thursday, July 09, 2015

29 64Thursday, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

5

Main Func = USB3.0 Port1

USB2.0 Port2 and USB2.0 Port3 are on IOBD

12

@EMI@

R3403 0R2J-2-GP

D D

USB_PN1<10>

USB_PP1<10>

TR3404

3 4

MCM1012B900F06BP_4P

EMI@

R3404 0R2J-2-GP

@EMI@

12

12

USB2.0 9 0ohm
Main SM07 0003Z00(S COM FI _ INPAQ MC M1012B900F 06BP)
2nd SM0 70004U00(S COM FI_ MURATA DLM11 SN900HY2L)
3rd SM07 0004400(S COM FI_ PANASONIC EXC24CQ900U)

USB_PN1_C

USB_PP1_C

4

3

2

1

USB3.0 Port1

USB1

1

VBUS

5

STDA_SSRX -

6

STDA_SSRX +

8

STDA_SSTX -

9

STDA_SSTX +

12

CHASSIS#12

13

CHASSIS#13

SKT-USB13-111-GP

CONN@

GND_DRAIN

GND
GND
GND

2

USB_PN1_C

D-

3

USB_PP1_C

D+

7

10
11
4

3

223

ESD@

AZC199-02SPR7G_SOT23-3

1

EU3403

1

USB3_PRX_CTX_N0_C

USB3_PRX_CTX_P0_C

USB3_PTX_CRX_N0_C

USB3_PTX_CRX_P0_C

U3402

1

1

2

2

4

4

5

3

3

8

L05ESDL5V0NA-4_SLP2510P8-10-9

ESD@

9

USB3_PRX_CTX_N0_C

10

8

USB3_PRX_CTX_P0_C

9

7

USB3_PTX_CRX_N0_C

7

6

USB3_PTX_CRX_P0_C

65

USB30_VCCC

USB3_PRX_CTX_N0_C
USB3_PRX_CTX_P0_C

USB3_PTX_CRX_N0_C
USB3_PTX_CRX_P0_C

USB3.0 9 0ohm
Main SM07 0003V00(S COM F I_ INPAQ HCM101 2GH900BP )
2nd SM0 70004000(S COM FI_ TAIYO MCF12102G 900-T)

C3404

USB3_PTX_CRX_P0<10>

C C

USB3_PTX_CRX_N0<10>

B B

USB_PN2<10>

USB_PP2<10>

USB_PN3<10>

USB_PP3<10>

A A

1 2

SCD1U16V2KX-3GP

C3403

1 2

SCD1U16V2KX-3GP

5

3rd SM07 0004300(S COM FI_ PANASONIC EXC24CH900U)

USB3_PTX_CRX_P0_R USB3_PT X_CRX_P0_C

R3408 0R2J-2-GP

USB2 (USB2.0) CMC

R3412

3 4

R3413

USB3 (USB2.0) CMC

R3414

3 4

R3415

12

EMI@

@EMI@

HCM1012GH900BP_4P

3 4

TR3402

12

EMI@

R3409 0R2J-2-GP

1 2

@EMI@

0R2J-2-GP

TR3405

12

MCM1012B900F06BP_4P

EMI@

1 2

@EMI@

0R2J-2-GP

1 2

@EMI@

0R2J-2-GP

TR3406

MCM1012B900F06BP_4P

EMI@

1 2

@EMI@

12

0R2J-2-GP

12

USB3_PTX_CRX_N0_C

USB2.0 9 0ohm
Main SM07 0003Z00(S COM FI _ INPAQ MC M1012B900F 06BP)
2nd SM0 70004U00(S COM FI_ MURATA DLM11 SN900HY2L)
3rd SM07 0004400(S COM FI_ PANASONIC EXC24CQ900U)

USB_PN2_C

USB_PP2_C

USB2.0 9 0ohm
Main SM07 0003Z00(S COM FI _ INPAQ MC M1012B900F 06BP)
2nd SM0 70004U00(S COM FI_ MURATA DLM11 SN900HY2L)
3rd SM07 0004400(S COM FI_ PANASONIC EXC24CQ900U)

USB_PN3_C

USB_PP3_C

4

USB3_PRX_CTX_P0<10>

USB3_PRX_CTX_N0<10>

USB3.0 9 0ohm
Main SM07 0003V00(S COM F I_ INPAQ HCM101 2GH900BP )
2nd SM0 70004000(S COM FI_ TAIYO MCF12102G 900-T)
3rd SM07 0004300(S COM FI_ PANASONIC EXC24CH900U)

EMI@

R3410 0R2J-2-GP

@EMI@

HCM1012GH900BP_4P

3 4

TR3403

EMI@

R3411 0R2J-2-GP

12

12

12

USB3_PRX_CTX_P0_C

USB3_PRX_CTX_N0_CUSB3_PTX_CRX_N0_R

USB ESD Diode

USB_PN2_C <39>

USB_PP2_C <39>

USB_PN3_C <39>

USB_PP3_C <39>

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

USB_PP2_C USB_PN2_C

Compal Secret Data

Compal Secret Data

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Compal Secret Data

EU3404

1

I/O1

2

GND

I/O23I/O3

AZC099-04S-1-GP

Deciphered Date

Deciphered Date

Deciphered Date

@ESD@

I/O4

VDD

6

5

4

USB_PN3_CUSB_PP3_C

2

USB30_VCCC

USB20_VCCA

SCD1U16V2KX-3GP

C3406

12

@

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

USB3.0 CONN

USB3.0 CONN

USB3.0 CONN

LA-D071P

LA-D071P

LA-D071P

1

AFTP3401

1

1.0(A00)

1.0(A00)

1.0(A00)

30 64T hursday, July 09, 2015

30 64T hursday, July 09, 2015

30 64T hursday, July 09, 2015

5

Main Func = USB3.0 Port1

4

3

2

1

USB30_VCCC

+5VALW

D D

SC1U10V2KX-1GP

C3510

12

USB_EN#

5

4

Active Low

SY6288D20AAC_SOT23-5

U3504

IN

EN

OUT

GND

OCB

1

2

3

USB_OC#0_1 <10,31>

USB30_VCCC

C3507

12

SCD1U16V2KX-3GP

SC1U10V2KX-1GP

C3508

12

USB3.0 Port1

Layout Note: Close USB1

2A

SC100U6D3V6MX-GP

SC22U6D3V5MX-2GP

C3512

12

SC22U6D3V5MX-2GP

TC3501

C3513

@

12

12

Main Func = USB2.0 Port3

Support 2A

+5VALW

C3504

USB_EN#<29>

SCD1U16V2KX-3GP

Active Low

C C

12

U3505

OUT

5

IN

GND

4

EN

SY6288D20AAC_SOT23-5

OCB

1

2

3

USB20_VCCA

12

@

R3501
0_0402_5%

Short Pad

Jason 6/24

USB_OC#2_3 <10>

USB_OC#0_1 <10,31>

USB2.0 Port3 (IO Board)

USB20_VCCA

C3517

12

C3518

SCD1U16V2KX-3GP

SC1U10V2KX-1GP

12

2A

C3515

SC22U6D3V5MX-2GP

@

12

Main Func =

B B

A A

Security Classifica tion

Security Classifica tion

Security Classifica tion

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2015/07/09 2016/07/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

USB Power SW

USB Power SW

USB Power SW

LA-D071P

LA-D071P

LA-D071P

1.0(A00)

1.0(A00)

1.0(A00)

31 64T hursday, July 09, 2015

31 64T hursday, July 09, 2015

31 64T hursday, July 09, 2015

1

DCBATOUT_LCD

1.0(A00)

1.0(A00)

1.0(A00)

DBC_EN_R
EDP_HPD_CONN
LCD_TST_C
EDP_AUX
EDP_AUX#

EDP_TX0#
EDP_TX0

EDP_TX1#
EDP_TX1

LCD_BRIGHTNESS
BLON_OUT_C
PANEL_SIZE_ID_CONN

DMIC_CLK_EDP
DMIC_DATA_EDP

USB_CAMERA_EDP#
USB_CAMERA_EDP

3D3V_CAMERA_S0

USB_PN7_TPNL
USB_PP7_TPNL

TP_RS
TP_RESET

TPAN_VDD

Layout Note:
Colse to LCD1.

1 2

C5203

1 2

C5210

1 2

C5211

1 2

C5213

1 2

C5209

1 2

C5212

1 2

R5206

0_0402_5%

Jason 6/24

Short Pad

5

MIC_GND

MIC_GND

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

@

C5201

12

SCD1U16V2KX-3 GP

1 2

0_0402_5%

Short Pad

LCDVDD_LCD

@

R5201

Jason 6/24

eDP_BKLT_CTRL

LCDVDD_LCD

EE note: Never change R5211 to short pad after MP

DBC_EN_R

EDP_AUX

EDP_AUX#

BLON_OUT_C
LCD_BRIGHTNESS

+3VS

EDP_HPD_CONN

12

R6507
10KR2J-3-GP

C5206

SC1U10V2KX-1GP

1 2

Intel PD G (#5148 49):
Recommen ds havin g a pull -up resi stor of 100 kΩ fo r AUXN
and a pu ll-down resistor of 100 kΩ for A UXP
between the AC c apacitor and the connect or,
to assis t source detecti on by th e sink d evice.

EDP_TX0#
EDP_TX0

EDP_TX1#
EDP_TX1

EDP_AUX#
EDP_AUX

Main Func = LCD Main Func = CAM

LCD1

41

1

2
3

Trace width = 8 0mil

4
5
6
7
8
9
10

D D

C C

11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

42

ACES_51540-04001-P01_40P-T

CONN@

EDP_TX0_DN<6>
EDP_TX0_DP<6>

EDP_TX1_DN<6>
EDP_TX1_DP<6>

EDP_AUX_DN<6>
EDP_AUX_DP<6>

Brightness

L_BKLT_CTRL<6>

R5211

1 2

0R5J-5-GP

R5213

1 2

0R2J-2-GP

R5218

R5219

1
2
3
4 5

SRN100KJ-5-GP

1
2
3
4 5

SRN100J-4-GP

1 2

1 2

RN5203

RN5201

4

LCDVDD

@

@

8
7
6

8
7
6

DBC_EN <9>

100KR2J-1-GP

100KR2J-1-GP

BKLT_CTRL
BLON_OUT_C
EDP_HPD

BKLT_CTRL
LCD_TSTLCD_TST_C

PANEL_SIZE_ID_CONN

+3VS

EDP_HPD <6>

3

INVERTER POWER

For ESD

R5210

1 2

100R2J-2-GP

PANEL_BKEN_EC <29>

R5222

@

12

R5231

0R3J-0-U-GP

TPAN_VDD_F

EE note: Never change R5232 to short pad after MP
Reserved for one time fuse: 69.43001.201

R5214

@

1 2

0R5J-5-GP

F5201

1 2

SMD1812P150TF/24 1.5A UL/CSA/TUV

+3VS

12

R5208
10KR2J-3-GP

For AUDI O Grade B or C s election .

12

@

R5209
0R2J-2-GP

1 2

0R2J-2-GP

@

D5202

2

1

3

BAT54C-7-F_SOT23-3

+5VS+3VS

12

0R3J-0-U- GP

R5230

F5203

1 2

1.1A_24V_SMD1812P110TF-24

R5232 0R3J-0-U-GP

800mA

1 2

PANEL_SIZE_ID <9>

eDP_BKLT_CTRL

LCD_TST

EC (BIST MODE)

TPAN_VDD

@

12

2

DCBATOUT_LCD+19VB

SC1KP50V2KX-1G P

SCD1U50V3KX-G P

C5202

C5205

12

@

DMIC_CLK_EDP
DMIC_DATA_EDP

R5207
R5215

1 2
1 2

33R2J-2-GP
33R2J-2-GP

SC6D8P50V2DN- GP

EC5205

12

12

@

EE note: Never change R5229 to short pad after MP
Reserved for one time fuse: 69.43001.201

SC6D8P50V2DN- GP

EC5206

@

DMIC_CLK <23>
DMIC_DATA <23>

+3VS

R5229

1 2

0R3J-0-U-GP

1

3D3V_CAMERA_S0

SC33P50V2JN- 3GP

EC5210

12

@

SC4D7U6D3V3KX- GP

C5207

12

Layout N ote: Red uce the stubs.

1 2

EMI@

R5216 0R2J-2-GP

MCM1012B900F06BP_4P

USB_CAMERA_EDP#

USB_CAMERA_EDP

1 2

TR5209

@EMI@

1 2

EMI@

R5217 0R2J-2-GP

34

USB_PN5 <10>

USB_PP5 <10>

USB2.0 90ohm
Main SM070003Z00(S COM FI_ INPAQ MCM1012B900F06BP)
2nd SM070004U00(S COM FI_ MURATA DLM11SN900HY2L)
3rd SM070004400(S COM FI_ PANASONIC EXC24CQ900U)

Main Func = TS

Touch Panel

TP_RS

@

TP_RESET

@

R5205

1 2

SC10P50V2JN- 4GP

C5208

12

33R2J-2-GP

R5212

1 2

@

SC10P50V2JN- 4GP

C5214

12

0R2J-2-GP

TOUCH_SCREEN_PD# <12>

PCH_PLTRST#_EC <11,25,29,36,56>

D5203

LID_CLOSE#<29,37>

LID_CLOSE#

21

TOUCH_SCREEN_PD#

RB551V-30_SO D323-2

LCDVDD

D5201

EDP_VDD_EN<6>

B B

LCD_TST<29>

Layout Note:

Trace width = 8 0mil

2

3

BAT54C-7-F_SOT23-3

1

1 2

R5202
100KR2J-1-GP

LCDVDD

LCDVDD_EN

U5201

1

EN

2

GND

3

VOUT

RT9724GB-GP

VIN#5

VIN#4

5

4

+3VS

12

C5204
SC4D7U6D3V3KX-GP

USB_PN7_TPNL

USB_PP7_TPNL

1 2

EMI@

R5203 0R2J-2-GP

MCM1012B900F06BP_4P

1 2

TR5201

@EMI@

1 2

EMI@

R5204 0R2J-2-GP

USB_PN7 <10>

USB2.0 90ohm
Main SM070003Z00(S COM FI_ INPAQ MCM1012B900F06BP)
2nd SM070004U00(S COM FI_ MURATA DLM11SN900HY2L)

34

3rd SM070004400(S COM FI_ PANASONIC EXC24CQ900U)

USB_PP7 <10>

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

LCD/Inverter CONN

LCD/Inverter CONN

LCD/Inverter CONN

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-D071P

LA-D071P

LA-D071P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

32 64Thursday, July 09, 2015

32 64Thursday, July 09, 2015

32 64Thursday, July 09, 2015

5

Main Func = HDMI

4

HDMI_CLK#_R HDMI_DATA0#_R

HDMI@EMI@

3

R5401

1 2

5.6_0402_1%

2

R5403

HDMI@EMI@

HDMI_CLK#_R_C HDMI_DATA0#_R_C

1 2

5.6_0402_1%

1

@EMI@

HCM1012GH900BP_4P

1 2

HDMI_CLK#<6>
HDMI_CLK<6>

HDMI_DATA0#<6>
HDMI_DATA0<6>

D D

HDMI_DATA1#
HDMI_DATA1

HDMI_DATA2#
HDMI_DATA2

+5VS

C C

B B

PCH_HDMI_CLK<6>

A A

PCH_HDMI_DATA<6>

C5402
C5403

C5404
C5405

C5409
C5406

C5407
C5408

R5413

1 2

100KR2J-1-GP

@

5

1 2

1 2
1 2

1 2
1 2

1 2
1 2

HDMI@
HDMI@

HDMI@
HDMI@

HDMI@
HDMI@

HDMI@
HDMI@

2

G

HDMI_PLL_GND

13

D

Q5403
2N7002K_SOT23-3

HDMI@

S

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

RN5402

SRN470J-3-GP

HDMI@

+3VS

Q5402

HDMI@

34

2

5

1

6

DMN66D0LDW-7_SOT363-6

2nd = 84.2N7 02.E3F

3rd = 75.006 01.07C

4th = 84.DMN66.03 F

678

123

4 5

1 2

HDMI_CRT_N1< 6,34>
HDMI_CRT_P1<6,34>

HDMI_CRT_N0< 6,34>
HDMI_CRT_P0<6,34>

RE43

2.2K_0402_5%

HDMI@

123

R5418
0R2J-2-GP@

3

DDC_CLK_PH1

678

+5VS

1

1 2

HDMI_CLK#_R
HDMI_CLK_R

HDMI_DATA0#_R
HDMI_DATA0_R

HDMI_DATA1#_R
HDMI_DATA1_R

HDMI_DATA2#_R
HDMI_DATA2_R

RN5403
SRN470J-3-GP

HDMI@

4 5

D5401
BAW56W_SOT323-3

HDMI@

2

DDC_DATA_PH2

RE44

2.2K_0402_5%

HDMI@

1 2

DDC_CLK_HDMI

DDC_DATA_HDMI

4

HDMI_CLK_R

HDMI_DATA2#_R

HDMI_DATA2_R

HDMI@
HDMI@

HDMI@
HDMI@

12
12

12
12

HDMI_CRT_DET<6,34>

Security Classifica tion

Security Classifica tion

Security Classifica tion

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

RE39 0_0402_5%
RE40 0_0402_5%

RE41 0_0402_5%
RE42 0_0402_5%

Issued Date

Issued Date

Issued Date

3 4

12

TR5401

R5402

1 2

1 2

@EMI@

HCM1012GH900BP_4P

3 4

TR5403

1 2

HDMI@EMI@

HDMI_DATA1#
HDMI_DATA1

HDMI_DATA2#
HDMI_DATA2

HDMI@

1 2

R5419
0R2J-2-GP

3

5.6_0402_1%HDMI@EMI@

R5405

5.6_0402_1%HDMI@EMI@

12

R5406

5.6_0402_1%

Q5401

LMBT3904LT1G-GP

HDMI@

HDMI_HPD_E

R5412

10KR2J-3-GP

HDMI@

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

12

HDMI@EMI@

R5414
150R2J-L1-GP-U

HDMI_CLK_R_C

HDMI_DATA2#_R_C

12

HDMI@EMI@

R5415
150R2J-L1-GP-U

HDMI_DATA2_R_C

+3VS

13

C

2

HDMI_HPD_B

B

E

12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

R5411

150K_0402_5%

HDMI@

SCD1U16V2KX-3GP

HPD_HDMI_CON

DDC_DATA_HDMI
DDC_CLK_HDMI

HDMI_CLK#_R_C

HDMI_CLK_R_C
HDMI_DATA0#_R_C

HDMI_DATA0_R_C
HDMI_DATA1#_R_C

HDMI_DATA1_R_C
HDMI_DATA2#_R_C

HDMI_DATA2_R_C

12

12

HDMI_DATA0_R

HDMI_DATA1#_R

HDMI_DATA1_R

C5401

HDMI@

R5410

@

200KR2F-L-GP

2

5V_HDMI_CRT_S0_R

12

@EMI@

HCM1012GH900BP_4P

3 4

TR5402

R5404

1 2

R5407

1 2

@EMI@

HCM1012GH900BP_4P

3 4

TR5404

R5408

1 2

HDMI@EMI@

12

5.6_0402_1%HDMI@EMI@

5.6_0402_1%HDMI@EMI@

12

5.6_0402_1%

12

HDMI@EMI@

R5416
150R2J-L1-GP-U

HDMI_DATA0_R_C

HDMI_DATA1#_R_C

12

HDMI@EMI@

R5417
150R2J-L1-GP-U

HDMI_DATA1_R_C

HDMI CONN

JHDMI

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

C-K_96067-3K28-192-124

CONN@

Title

Title

Title

HDMI L.Shifter/Conn

HDMI L.Shifter/Conn

HDMI L.Shifter/Conn

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-D071P

LA-D071P

LA-D071P

Date: Sheet of

Date: Sheet of

Date: Sheet of

23

GND3

22

GND2

21

GND1

20

GND0

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

33 64T hursday, July 09, 2015

33 64T hursday, July 09, 2015

33 64T hursday, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

5

1.0(A00)

1.0(A00)

1.0(A00)

4

3

2

1

AVCC33

VCCK_12

+3VS
+3VS

VCCK_12

RRX

12

2.2K_0402_5%

CRT@

24

25

20

19

21

26
27

29
30

31
32

17
18

28

R5505
12KR2F-L-GP

1
1
1
1
1
1
1
1

5V_HDMI_CRT_S0_R

RE45

1 2

1 2

U5502

AVCC_33

AVCC_12

5

DVCC_33
DVCC_33

VCCK_12

9

VDD_DAC_33

LDO_EN

AUX_P
AUX_N

LANE0P
LANE0N

LANE1P
LANE1N

XI/CKIN
XO

RRX

RTD2168-CGT-GP

AFTP5501
AFTP5502
AFTP5503
AFTP5504
AFTP5505
AFTP5506
AFTP5507
AFTP5508

RE46

2.2K_0402_5%

CRT@

POL1_SDA
POL2_SCL

SMB_SCL
SMB_SDA

VGA_SCL
VGA_SDA

VSYNC
HSYNC

RED_P
RED_N

GREEN_P
GREEN_N

BLUE_P
BLUE_N

GND_DAC

AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP

HPD

GND

1

CRT_PCH_HPD

2
3

4

CRT_DDCCLK_CON

6

CRT_DDCDATA_CON

7

DP_CRT_VSYNC_CON

8

DP_CRT_HSYNC_CON

15
16

12
13

10
11

22
23

14

33

5V_HDMI_CRT_S0_R

SC100P50V2JN -3GP

@

C5516

12

DP_CRT_R

DP_CRT_G

DP_CRT_B

POL1_SDA
POL2_SCL

CRT_DDCDATA_CON

CRT_HSYNC_CON

@

C5513

SC18P50V2JN-1-GP

12

PCH_SMBCLK <8,20,21>
PCH_SMBDAT <8,20,21>

F5501

21

1.1A_6V_SPR-P110

CRT_VSYNC_CON

@

C5507

SC18P50V2JN-1-GP

12

12

CRT_PCH_HPD

CRT_DDCCLK_CON

SC100P50V2JN -3GP

@

C5511

DP_CRT_HSYNC_CON

DP_CRT_VSYNC_CON

U5504

@

1

A0

2

A1

3

A2
VSS4SDA

CAT24C128WI-GT3-GP

D5501

21

RB551V-30_SOD323-2

CRT@

1 2

R5517 0R2J-2-GP

12

R5510
100KR2J-1-GP

CRT@

+3VS

8

VCC

7

WP

6

SCL

5

R5511

R5507

POL2_SCL
POL1_SDA

+5VS

1 2

1 2

CRT@

CRT@

33R2J-2-GP

33R2J-2-GP

CRT RGB
CRT H/VSYNC
CRT SMBUS

CRT_HSYNC_CON

CRT_VSYNC_CON

HDMI_CRT_DET <6,33>

CRT_R
CRT_G
CRT_B
5V_HDMI_CRT_S0_R

12

C5517

12

C5503

12
12

C5520
C5522

12
12

C5501

12

C5504SC2D2U10V3KX-1GP CRT@

12

C5524
C5502SC10U6D3V3MX-GP CRT@

PCH_DPC_AUXP_U
PCH_DPC_AUXN_U

PCH_DPC_P0_U
PCH_DPC_N0_U

PCH_DPC_P1_U
PCH_DPC_N1_U

CRT_DDCDATA_CON
CRT_DDCCLK_CON
CRT_VSYNC_CON
CRT_HSYNC_CON

CRT_DDCDATA_CON

CRT_DDCCLK_CON

CRT@

CRT@

CRT@
CRT@

CRT@

VDD_DAC_33

CRT@

LDO_EN

5V_HDMI_CRT_S0_R

JCRT

D D

C C

B B

A A

DP_CRT_R

DP_CRT_G

DP_CRT_B

R5501

CRT@

R5513

R5514

75_0402 _1%

75_0402 _1%

75_0402 _1%

12

12

12

CRT@

CRT@

+3VS

+3VS VDD_DAC_33

+3VS

R5509

4K7R2J-2-GP

@

1 2

POL1_SDA

R5508

4K7R2J-2-GP

CRT@

1 2

ShortPad

R5504

0_0603_5%

1 2

@

CRT@ => @
Jason 6/25

ShortPad

R5503

0_0603_5%

1 2

@

CRT@ => @
Jason 6/25

R5515

4K7R2J-2-GP

CRT@

R5516

4K7R2J-2-GP

@

AFTE14P-GP

AFTP5509

CRT@

1 2

CRT@

1 2

CRT@

C5506

10P_0402 _50V

12

CRT@

1 2

POL2_SCL

1 2

C5512

C5509

10P_0402 _50V

10P_0402 _50V

12

12

CRT@

CRT@

AVCC33

C5523
SC10U6D3V3MX-GP

CRT@

1 2

C5521
SC10U6D3V3MX-GP

CRT@

1 2

1 2

1

L5503
CHILISIN NBQ160808T-800Y-N 0603

L5501
CHILISIN NBQ160808T-800Y-N 0603

L5502
CHILISIN NBQ160808T-800Y-N 0603

CRT_R

CRT_DDCDATA_CON
CRT_G

CRT_HSYNC_CON
CRT_B

CRT_VSYNC_CON

CRT_DDCCLK_CON

10P_0402 _50V

C5514

12

CRT@

CRT_NC

12

C5519

@

10P_0402 _50V

C5518

C5510

12

CRT@

CRT@

SCD01U16V2KX- 3GP

6

11

1
7

16

G

12

17

G

2

18

G

8

19

G

13

3
9

14

4
10
15

5

C-K_80461-5K1-152

CONN@

CRT_R

CRT_G

CRT_B

10P_0402 _50V

12

Layout note:
All cap need close to chip

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

1 2

C5527
C5528

C5529
C5526

C5530
C5525

+3VS+3VS

1 2

LDO_EN

1 2

1 2

1 2
1 2

1 2
1 2

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

CLK_DP2VGA

PCH_DPB_AUXP<6>
PCH_DPB_AUXN<6>

HDMI_CRT_P0<6,33>
HDMI_CRT_N0<6,33>

HDMI_CRT_P1<6,33>
HDMI_CRT_N1<6,33>

CRT@
CRT@

CRT@
CRT@

CRT@
CRT@

CLK_DP2VGA<8>

R5502

4K7R2J-2-GP

CRT@

R5512

4K7R2J-2-GP

@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

DP to VGA Converter

DP to VGA Converter

DP to VGA Converter

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-D071P

LA-D071P

LA-D071P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

34 64Thursday, July 09, 2015

34 64Thursday, July 09, 2015

34 64Thursday, July 09, 2015

Main Func = HDD

Jason 6/25

ShortPad

R5601

0_0805_5%

1 2

@

12

C5604

@

SCD1U16V2KX-3GP

12

@

@

80 mils

12

C5601

SC10U10V5KX-2GP

Close to HDD1

Main Func = ODD

ODD Connector

ODD1

22

21

20

20

GND2

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

GND1

ACES_51519-02001-001

CONN@

C5605

SC10U10V5KX-2GP

5V_HDD_S0+5VS

12

C5606

SCD1U16V2KX-3GP

SATA_ODD_DA#_C

SATA_ODD_PRSNT#

SATA_RXP2_R
SATA_RXN2_R

SATA_TXN2_R
SATA_TXP2_R

Reserve, refer to M15 EE Implementation Requirements

Layout Note:
Place near HDD1

SATA_TXP0_R

SATA_TXN0_R

SATA_RXN0_R

SATA_RXP0_R

1

2

4

5

3

Swap based on the swap report.

C5608
C5607

C5611
C5612

HDD_DEVSLP<10>

EU5602

1

2

4

3

8

@ESD@

ZPODD@

1 2

R5602

1 2
1 2

ODD@

1 2
1 2

ODD@

9

SATA_TXP0_R

10

8

SATA_TXN0_R

9

7

SATA_RXN0_R

7

6

SATA_RXP0_R

65

0R2J-2-GP

SCD01U50V2KX-1GPODD@
SCD01U50V2KX-1GP

SCD01U50V2KX-1GPODD@
SCD01U50V2KX-1GP

Short Pad

R5605

0_0402_5%

1 2

@

SATA3_PTX_HDDRX_P0<10>
SATA3_PTX_HDDRX_N0<10>

SATA3_PRX_HDDTX_N0<10>
SATA3_PRX_HDDTX_P0<10>

SATA_ODD_DA# <10>

SATA_PRX_ODDTX_P1 <10>
SATA_PRX_ODDTX_N1 <10>

SATA_PTX_ODDRX_N1 <10>
SATA_PTX_ODDRX_P1 <10>

SATA HDD Connector

Jason 6/24

HDD_DEVSLP_RHDD_DEVSLP

12

SATA_TXP0_R

SCD01U50V2KX-1GP
SCD01U50V2KX-1GP

SCD01U50V2KX-1GP
SCD01U50V2KX-1GP

ODD_PWR_5V

SC10U10V5KX-2GP

12

R5604
10KR2J-3-GP

@

C5602

12

C5603

1 2

C5616

1 2

C5615

5V_HDD_S0

+3VS

+5VS

C5609

12

@

SATA_ODD_PRSNT# < 10>

SATA_TXN0_R

SATA_RXN0_R
SATA_RXP0_R

HDD_DEVSLP_R

R5607

1 2

ZPODD@

100KR2J-1-GP

SATA_ODD_PWRGT<9>

Current limit
Active High
typ =>2.5A

SATA Zero Power ODD

SATA_ODD_PWRGT

5V_HDD_S0

HDD1

14
12
11
10

9
8
7
6
5
4
3
2

1

13

ACES_51625-01201-001_12P-T

CONN@

U5601

2

IN#2

3

IN#3

4

EN/EN#

5

FLT#

TPS2001CDGNR-GP

2nd = 74.02311.079

1

X01_0729

OUT#6
OUT#7
OUT#8

ZPODD@

AFTP5601

GND
GND

6
7
8

1
9

AFTE14P-GP

2.5A

ODD_PWR_5V

ODD_PWR_5V

C5610

ZPODD@

12

SC10U10V5KX-2GP

74.02001.079 is OBS
Will use 74.06288.079
but 74.06288.079 is also OBS
we will use 074.06288.0079.

100 mil

ODD

R5603

1 2

0R5J-5-GP

NOZPODD@

ODD_PWR_5V+5VS

Security Classifica tion

Security Classifica tion

Security Classifica tion

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2015/07/09 2016/07/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

HDD/ODD

HDD/ODD

HDD/ODD

LA-D071P

LA-D071P

LA-D071P

35 64T hursday, July 09, 2015

35 64T hursday, July 09, 2015

35 64T hursday, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

Main Func = WLAN

USB2.0 9 0ohm

+3VS

1.1A

D D

C C

SCD1U16V2KX-3GP

C5801

12

@

WLAN_RADIO_DIS#<6>

BLUETOOTH_EN<9>

PCH_PLTRST#_EC<11,25,29,32,56>

C5805

12

@

SUSCLK<11>

SCD1U16V2KX-3GP

C5802

SC10U6D3V3MX-GP

12

@

D5503

Short Pad
Short Pad
Short Pad

Jason 6/25

ShortPad

R5809

0_0805_5%

1 2

@

TP5803 TPAD14-OP-GP

21

RB551V-30_SOD323-2

1 2

R5804

1 2

R5807

1 2

R5805

Jason 6/24

TP5802 TPAD14-OP-GP

TP5804 TPAD14-OP-GP

C5806

SC10U6D3V3MX-GP

12

+3.3V_WLAN

1

@

0_0402_5%

@

0_0402_5%

@

0_0402_5%

1

1

Reserved for NGFF Debug Card

+3VALW

R5810

1 2

R5806

HOST_DEBUG_TX< 29>

B B

1 2

1 2

R5812

0_0402_5%

Jason 6/24

Short Pad

@

@

@

0R2J-2-GP

0R2J-2-GP

+3.3V_WLAN

E51_TX1

E51_TX2

12

R6517

@

100KR2J-1-GP

+3.3V_WLAN

SCD1U16V2KX-3GP

C5804

12

12

E51_RX2
WLAN_DISABLE#1
BLUETOOTH_EN_NGFF
PLT_RST_NGFF#
SUSCLK_R

E51_RX1
E51_TX1

E51_TX2

+3.3V_WLAN

SCD1U16V2KX-3GP

C5803

68

66
64
62
60
58
56
54
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24

22
20
18
16
14
12
10

8
6
4
2

WLAN1

MTG76

3.3VAUX

3.3VAUX
RESERVED
RESERVED
RESERVED
RESERVED
ALERT
I2C_CLK
I2C_DATA
W_DISA BLE1#
W_DISA BLE2#
PERST0#
SUSCLK
COEX1
COEX2
COEX3
RESERVED
RESERVED
RESERVED
UART_RTS
UART_CTS
UART_TX

UART_RX
UART_WAKE#
GND
LED2#
PCM_OUT
PCM_IN
PCM_SYNC
PCM_CLK
LED1#

3.3VAUX

3.3VAUX

DAN05-67406-0100

CONN@

MTG77

GND
RESERVED
RESERVED

GND

RSRVD/PERN1
RSRVD/PERP1

GND

RSRVD/PETN1
RSRVD/PETP1

GND
PEWAKE0 #

CLKEQ0#

GND

REFCLKN0
REFCLKP0

GND

PERN0
PERP0

GND

PETN0
PETP0

GND

SDIO_RES ET#

SDIO_W AKE#

SDO_DAT3
SDO_DAT2
SDO_DAT1
SDO_DAT0
SDIO_CMD

SIDO_CLK

GND

USB_D-

USB_D+

GND

69

67
65
63
61
59
57
55
53
51
49
47
45
43
41
39
37
35
33
31
29
27
25

23
21
19
17
15
13
11
9
7
5
3
1

CLK_PCIE_WLAN_REQ#_R

PCIE_PRX_WLANTX_N5_R
PCIE_PRX_WLANTX_P5_R

PCIE_PTX_WLANRX_N5
PCIE_PTX_WLANRX_P5

USB_PN8_R
USB_PP8_R

Main SM07 0003Z00(S COM FI _ INPAQ MC M1012B900F 06BP)
2nd SM0 70004U00(S COM FI_ MURATA DLM11 SN900HY2L)
3rd SM07 0004400(S COM FI_ PANASONIC EXC24CQ900U)

R5801

0R2J-2-GP

EMI@

USB_PN8_R

USB_PP8_R

1 2

@EMI@

TR5801

1 2

MCM1012B900F06BP_4P

R5802

EMI@

0R2J-2-GP

1 2

34

Short Pad

Jason 6/24

R5803

0_0402_5%

1 2

@

CLK_PCIE_WLAN_N1 < 11>
CLK_PCIE_WLAN_P1 <11>

1 2

R5808

1 2

R5811

12

CV310 .1U_0402_16V7K

12

CV311 .1U_0402_16V7K

0R2J-2-GP
0R2J-2-GP

CLK_PCIE_WLAN_REQ# <11>

PCIE_PRX_WLANTX_N5 <10>
PCIE_PRX_WLANTX_P5 <10>

PCIE_PTX_WLANRX_N5_C <10>
PCIE_PTX_WLANRX_P5_C < 10>

USB_PN8 <10>

USB_PP8 <10>

EMI request

@

CLK_PCIE_WLAN_N1

12

SC33P50V2JN-3GP

EC5801

CLK_PCIE_WLAN_P1

12

@

SC33P50V2JN-3GP

EC5802

Support: Intel Dual Band Wireless-AC 3160

A A

Security Classifica tion

Security Classifica tion

Security Classifica tion

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2015/07/09 2016/07/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

NGFF_WLAN CONN

NGFF_WLAN CONN

NGFF_WLAN CONN

LA-D071P

LA-D071P

LA-D071P

1.0(A00)

1.0(A00)

1.0(A00)

36 64T hursday, July 09, 2015

36 64T hursday, July 09, 2015

36 64T hursday, July 09, 2015

1

5

Main Func = Power BTN

4

3

2

1

Power button

G6102
Always Open
& Not Solder

D D

LID_CLOSE#<29,32>

POWER_SW#_MB<29>

R6109

1 2
1 2

R6102

AFTP6101

100R2J-2-GP

100R2J-2-GP

1

G6102
GAP-OPEN

JP@

2 1

2 1

12

EC6101

@

SC1KP50V2KX-1GP

EC6101 must be used 1000pF.

Main Func = Battery LED

C C

G6101
GAP-OPEN

JP@

12

G6101
Always Open
& Not Solder

LID_CLOSE#_C
KBC_PWRBTN#_C

+3VALW

ED6101

AZ5725-01F_DFN2

@ESD@

PWR1

4

6

4

G2

3

5

3

G1

2

2

1

1

JXT_FP202DH-004M10M

CONN@

LID_CLOSE#_C

EC6105

For EMI Reserved

1 2

SCD1U16V2KX-3GP

@

Low actived from KBC GPIO

Battery LED1(AMBER_LED)

LED1

1

2

12-22A/Y2T7D-C30/2C YELLOW/WHITE

Need CIS Symbol

3

(WHITE_LED)Battery LED2

3

1

AMBER_LED_BAT

3

1

WHITE_LED_BAT

+5VALW

EC6102

SC220P50V2KX-3GP

R6103

R6107

12

12

EC6103

@

@

SC220P50V2KX-3GP

470R2J-2-GP

12

12

390R2J-3-GP

BAT_AMBER

BAT_WHITE

+3VALW

2

1

6

BAT1_LED#<29>

BAT2_LED#<29>

DMN66D0LDW-7_SOT363-6

B B

QC4A

DMN66D0LDW-7_SOT363-6

5

QC4B

CHG_AMBER_LED_R#

34

BATT_WHITE_LED_R#

DDTA144VCA-7-F-GP

DDTA144VCA-7-F-GP

Q6101

R2

2

R1

Q6102

R2

2

R1

Main Func = HDD LED

For EMI Reserved

+3VS

Q6103

2

2N7002K_SOT23-3

LED@

G

13

D

A A

SATA_LED#<10,29,37>

SATA HDD LED
LOW actived from PCH GPIO

5

S

SATA_LED#_B

LED@

2

R1

DDTA144VCA-7-F-GP

Q6104

R2

+5VS

3

1

SATA_LED

4

SATA_LED

R6108

1 2

LED@

330R2J-3-GP

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EC6104

SATA_LED_R

1 2

@

SCD1U16V2KX-3GP

+3VS

HDLED1

3

2 1

LED@

LED-W-27-GP-U

2nd = 83.00110.R70

3rd = 083.11204.0070

Compal Secret Data

Compal Secret Data

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

3

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1 2

10KR2J-3-GP

R6110

SATA_LED#< 10,29,37>

2

SATA_LED#_R<29>

SATA_LED#_R

2

G

13

D

S

Q6105
2N7002K_SOT23-3

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

LED Bard/Power Button

LED Bard/Power Button

LED Bard/Power Button

LA-D071P

LA-D071P

LA-D071P

BATT_WHITE_LED_R#

1

37 64T hursday, July 09, 2015

37 64T hursday, July 09, 2015

37 64T hursday, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

5

1.0(A00)

1.0(A00)

1.0(A00)

Keyboard Backlight (Reserved)

KB1

30

KB_DET#<9>

KSI[0..7]< 29>

KSO[0..16]<29>

D D

CAP LED Control

C C

LOW actived from KBC GPIO

KSI7
KSI6
KSI4
KSI2
KSI5
KSI1
KSI3
KSI0

KSO5
KSO4
KSO7
KSO6
KSO8
KSO3
KSO1
KSO2

KSO0
KSO12
KSO16
KSO15
KSO13
KSO14

KSO9
KSO11
KSO10

CAP_LED

CAP_LED#<29>

30

GND

29

29

GND

28

28

27

27

26

26

25

25

24

24

23

23

22

22

21

21

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

ACES_51510-0304N-P01

CONN@

12

R6202
100KR2J-1-GP

32
31

+3VS

G

2

13

CAP_LED_R#

D

S

Q6206
LN2306LT1G_SOT23-3

2

R1

DDTA144VCA-7-F-GP

KB_BL_CTRL#

+5V_KB_BL

Q6201

+5VS

KB_LED_BL_DET<12>

KB_LED_PWM<29>

EC6207

EC6208

R2

3

1

4

KB Backl ight Pow er Consu mption: 285mA ma x.

2 1

F6201

0.5A_13.2V_NANOSMDC050F-13.2-2

KBBL@

For EMI Reserved

1 2

SCD1U16V2KX-3GP

@

1 2

SCD1U16V2KX-3GP

@

+5VS

R6201

1 2

1KR2J-1-GP

1 2

51KR2J-1-GP

12

R6207
100KR2J-1-GP

KBBL@

CAP_LEDCAP_LED_Q

KBBL@

R6206

+5V_KB_BL

12

KBBL@

SCD1U16V2KX-3GP

KB_LED_DET_C

2

G

C6202

KB_BL_CTRL#

13

D

S

KB_BL1

1

1

2

2

5

33G1

4

G264

ACES_50524-00401-P01

CONN@

Q6202

KBBL@

LN2306LT1G_SOT23-3

3

Main Func = TPADMain Func = KB

EC/PS2

PCH/I2C

I2C_SCL_TP

2nd = 84.2N702.E3F

3rd = 75.00601.07C

4th = 84.DMN66.03F

I2C_SDA_TP

DAT_TP_SIO<29>

CLK_TP_SIO<29>

I2C_SDA_TP<9>

I2C_SCL_TP<9>

+3VS

Q6501

1

2

T8

3 4

DMN66D0LDW-7_SOT363-6

6

5

2015/5/19 Modify
Jason

TP_VDD

Check leakage
Jason 2015/03/06

TP_VDD

4.7K_0402 _5%

4.7K_0402 _5%

12

12

RZ18

10P_0402 _50V8J

12

12

CZ30@ESD@

EMI depop loc ation

Check leakage
Change to P U TP_VDD (DVT1)
Jason 2015/03/06

12

R6506

2.2K_0402_5%

I2C_SCL_TP_Q

12

R6508

2.2K_0402_5%

I2C_SDA_TP_Q

2

2015/5/19 Modify

+3VS

Jason

4.7K_0402 _5%

4.7K_0402 _5%

12

12

RZ21

RZ20

RZ19

DAT_TP_SIO

CLK_TP_SIO

I2C_SDA_TP

10P_0402 _50V8J

CZ31@ESD@

I2C_SCL_TP

1 2

TP_PW_EN#<29>

PTP_DIS#<29>

TP_VDD

R6214
20KR2F-L-GP

TOUCHPAD_INTR#<12,29>

PTP_DIS#

+3VALW

12

TP_WAKE@

NTK3139PT1G_SOT723-3

TP_WAKE@

C6204

TP_ON#_GATE

SCD1U16V2KX-3GP

4K7R2J-2-GP

1 2

12

D3801

21

RB551V-30_SOD323-2

SCD1U16V2KX-3GP

R6505 100KR2J-1-GP

R6215
0R2J-2-GP

Q6203

D

S

13

G

2

12

12

NOTP_WAKE@

1

+3VS

TP_WAKE@

2

G

1 3

D

Q6204
LN2306LT1G_SOT23-3

TP_VDD

C6201

R6209

I2C_SDA_TP_Q
I2C_SCL_TP_Q

INT_TP#
TP_LOCK#
DAT_TP_SIO
CLK_TP_SIO

NOTP_WAKE@

1 2

R6212
0R3J-0-U-GP

TP_VDD Discharge

1 2

13

D

2

G

S

TP_VDDTP_VDD

R6203
10KR2J-3-GP

1 2

INT_TP#

S

1

AFTP6235

TP_VDD

TP_VDD

R6211
100R3J-4-GP

Q2405
2N7002K_SOT23-3

TPAD1

1

1

2

2

3

3

4

4

5

5

6

6

G1

7

7

G2

8

8

JXT_FP202DH-008M10M

CONN@

9
10

Main Func = Thermal

FAN_VCC1

FAN1_TACH<29>

2.2U_0603_6.3V6K

C2612

12

SCD1U16V2KX-3GP

PURE_KBCT 8

FON#

VD_IN1_C

Fan controller1

FAN261

1
2
3

APL5606AKI-TRG SOP 8P FAN CONTROL

C2604

8

FON#

GND

7

VIN

GND

6

VOUT

GND

5

VSET4GND

Jason 6/24

Short Pad

R2606

0_0402_5%

1 2

FAN1_TACH_C

@

FAN_VCC1

12

1

2

Close to KBC
VD_IN1 for system thermal sensorClose to Thermal sensor

12

@

D2601

RB551V30-G P

PURE_KBCT 8

C2613

SC100P50V2JN-3GP

12

@

C2603

VCIN0_PH <29>

R2611

0_0402_5%

1 2

@

SC2200P50V2KX-2GP

Short Pad

Jason 6/24

PURE_KBCT8

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Keyboard/Touch Pad/Thermal

Keyboard/Touch Pad/Thermal

Keyboard/Touch Pad/Thermal

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-D071P

LA-D071P

LA-D071P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

FAN1

5

GND2

4

GND1

3

3

2

2

1

1

ACES_50224-0030N-001

CONN@

38 64Thursday, July 09, 2015

38 64Thursday, July 09, 2015

38 64Thursday, July 09, 2015

+3VS

+3VS

Q2601
DMN66D0LDW-7_SOT363-6

GPU_THM_SMBDAT<8,29,57>

2nd = 84.2N702.E3F

3rd = 75.00601.07C

GPU_THM_SMBCLK<8,29,57>

THM26

VDD
D+

T8

D-

ALERT#

T_CRIT#4GND

NCT7718W-GP

4th = 84.DMN66.03F

8

SCL

7

SDA

6
5

ALERT#

R2603

R2604

NCT7718_DXP

12

@

C2606
SC470P50V3JN-2GP

NCT7718_DXN

1 2

T8

1 2

T8

+3VS

12

@

C2601

SC10U6D3V3MX-GP

18K7R2F-GP

2KR2F-3-GP

12

C2602

T8

SCD1U16V2KX-3GP

12

C2607

T8

SC2200P50V2KX-2GP

Layout Note:

C2607 cl ose THM2 6

ALERT#

T_CRIT#

Main:
SA000067P00, S IC NCT7718W MSOP 8P THEMAL SENSOR
2nd:
SA00007WP00, S IC F75397M MSOP 8P THEMAL SENSOR
Jason 2015/0 3/03

1
2
3

T_CRIT#

Address: X10 0_1100(4C), 1001_100X(98)

4

B B

Q2603

1

2

T8

3

LMBT3904LT1G- GP

DIMM CPU

Layout Note:

DXN and DXP rout ing widt h and sp acing is 10 mil / 10 mil.

+3VS

A A

5

6

5

T8

12

@

C2608

SCD1U16V2KX-3 GP

1

2

34

THM_SML1_CLK
THM_SML1_DATA

12

12

RE32

2.2K_0402_5%

THM_SML1_DATA

12

RE432

2.2K_0402_5%

THM_SML1_CLK

@

EC2602

SC10P50V2JN- 4GP

@

C2609

SCD1U16V2KX-3 GP

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

+5VS

1

12

C2611

C2605

2

2.2U_060 3_6.3V6K

SCD1U16V2KX-3 GP

FAN1_TACH

FAN_VCC1

12

12

@

EC2601

SCD1U16V2KX-3 GP

Compal Secret Data

Compal Secret Data

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Compal Secret Data

2

FAN1_DAC_1<29>

Layout Note:

Need 10 mil trac e width.

Layout Note:

Signal Routing Guideline:
Trace width = 1 5mil

+3VLP +3VALW

12

@

R2609

24K9R2F-L- GP

NTC-100K-8-GP

PURE_KBCT 8

Deciphered Date

Deciphered Date

Deciphered Date

R2610

R2605

@

0R2J-2-GP

1 2

+5VS

12

R2608
10K_0402_1%

12

5

Main Func = IO Connector

4

3

2

1

I/O Board Connector

X01_0808

D D

USB_PN2_C<30>
USB_PP2_C<30>

USB2 (USB2.0)
USB3 (USB2.0)

USB2 (USB2.0)
USB3 (USB2.0)

Universal Jack

C C

R6305

1 2

@

0R3J-0-U-GP

AUD_AGND

B B

USB_PP3_C<30>
USB_PN3_C<30>

1 2

R6301 0R2J-2-GP

@

X01_0731

R6302 0R2J-2-GP

1 2

@

AUD_AGND

AUD_PORTA_L_R_B<24>

AUD_PORTA_R_R_B<24>

SLEEVE_R< 24>

RING2_R< 24>

JACK_PLUG<24>

AUD_AGND

RING2_R
AUD_PORTA_L_R_B
JACK_PLUG

AUD_PORTA_R_R_B
SLEEVE_R
USB20_VCCA

USB_PN2_C
USB_PP2_C

USB_PP3_C
USB_PN3_C

GND_R1

USB20_VCCA

GND_R2

AUD_PORTA_L_R_B
AUD_PORTA_R_R_B
SLEEVE_R

RING2_R

JACK_PLUG

Pitch: 1mm
Power: 5 pins
GND: 4 pins
AGND: 2 Pins

1

AFTP6305

1

AFTP6306

1

AFTP6307

1

AFTP6309

1

AFTP6310

1

AFTP6311

CN6301

24

GND

24

23

GND

23

22

22

21

21

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

ACES_51524-0240N-001

CONN@

AFTE14P-GP
AFTE14P-GP
AFTE14P-GP

AFTE14P-GP
AFTE14P-GP
AFTE14P-GP

26
25

AUD_AGND

A A

Security Classifica tion

Security Classifica tion

Security Classifica tion

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2015/07/09 2016/07/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

1

AFTP6313

AFTE14P-GP

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

IO Board Connector

IO Board Connector

IO Board Connector

LA-D071P

LA-D071P

LA-D071P

1.0(A00)

1.0(A00)

1.0(A00)

39 64T hursday, July 09, 2015

39 64T hursday, July 09, 2015

39 64T hursday, July 09, 2015

1

5

4

3

2

1

+5V_RUN/+3.3V_RUN for System

+5VS

12

470P_0402_50V7 K

1U_0402_6.3V6K@

CZ23

+1.35V_MEM

+1.35V_MEM_GFX_ON

PJP21
PAD-OPEN1x3m

1 2

CZ44 0.1U_0402_10V7K

@

1 2

CZ45 470P_040 2_50V7K

1 2

1

2

+5VALW

+3VS

D D

SIO_SLP_S3#<11,17,29,41,46,51>

C C

+3VALW

+5VALW

UZ2

1

VIN1

VOUT1

2

VIN1

VOUT1

3

ON1

4

VBIAS

5

ON2

6

VIN2

VOUT2

VIN27VOUT2

EM5209VF_SON14_2X3

GPAD

GND

14

+5V_RUN_UZ2

13

12

CT1

11

10

CT2

9
8

+3.3V_LAN_UZ2

15

+3V/+0.95V/+1.8V/+1.35V for GPU

1 2

DIS@

1 2

1 2

@

C6210

1K_0402_5%

1 2

DGPU_PWROK<12,29,52>

DGPU_PWR_EN<9,52>

DGPU_PWR_EN +3VGS_GPU_ON

R6509

C6212 0.1U_0402_16V7KDIS@

1 2

RZ79 0_0402_5%D IS@

C6211 0.1U_0402_16V7K

PJP@

PJP13

1 2

PAD-OPEN1x3m

CZ50

@

0.1U_0402_10V7K

PJP21
Always Short

PJP@

+3VS

PJP13
Always Short

U5602

DIS@

1

VIN1

2

VIN1

3

ON1

4

VBIAS

5

ON2

6

VIN2
VIN27VOUT2

EM5209VF_SON14_2X3

VOUT1
VOUT1

GND

VOUT2

GPAD

14

+1.35V_MEM_GFX_OUT

13

12

CT1

11

10

CT2

9
8

15

C6208

12

330P_0402_50V7K

12

C6209

330P_0402_50V7K

+3VGS_OUT

DIS@

DIS@

+3VALW_PCH for System

+3VALW

SC1U10V2KX-1GP

DSX@

12

CZ36

1 2

DSX@

R3802

0R2J-2-GP

J13
Always Short

J12
Always Short

2000mA

J13

PJP@

112

JUMP_43X118

J12

PJP@

112

JUMP_43X118

1500mA

PCH_ALW_ON<29>

2

2

+1.35V_MEM_GFX

2

@

C6207
.1U_0402_16V7K

1

+3VGS

UZ3

1

GND

2

IN#2

3

IN#3

+3VALW_PCH_ON

4

EN

SY6288C10CAC-GP

RdsON: 100m ohm

+3VALW +3VALW_PCH

PJP@

PJP23

112

JUMP_43X79

2

For NON-DS3

DSX@

OUT#8
OUT#7
OUT#6

OC#

8
7
6
5

PJP22

1 2

PAD-OPEN1x3m

For DS3

PJP22 Short
for DS3

PJP@

PJP23 Short
for NON-DS3

+3VALW_PCH

CZ37

12

SC1U10V2KX-1GP

B B

U15

DIS@

@

1

VIN1

2

VIN1

3

ON1

4

VBIAS

5

ON2

6

VIN2
VIN27VOUT2

EM5209VF_SON14_2X3

+1.0V_PRIM +0.95VSDGPU

DGPU_PWR_EN

A A

R6510

C983 0.1U_0402_16V7KDIS@

R437

C987 0.1U_0402_16V7KDIS@

1 2

DIS@

1 2

1 2

DIS@

1 2

1K_0402_5%

1K_0402_5%

+1.8V_PRIM

+0.95VSDGPU_ON

+5VALW

+1.8VGS_GPU_ON

1 2

C24
1U_0402_6.3V6K

VOUT1
VOUT1

GND

VOUT2

GPAD

14
13

12

CT1

11

10

CT2

9
8

15

+0.95VSDGPU_OUT

C343

12

330P_0402_50V7K

12

C349

330P_0402_50V7K

+1.8VGS_OUT

DIS@

DIS@

2300mA

J11

112

JUMP_43X118

J10

1 2

PAD-OPEN1x2m

500mA

PJP@

PJP@

2

+1.8VGS

2

@

C26
.1U_0402_16V7K

1

J11
Always Short

J10
Always Short

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET O F ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTH ER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHO UT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Date: S heet of

Date: S heet of

Date: S heet of

Compal Electronics, Inc.

Power control

Power control

Power control

LA-D071P

LA-D071P

LA-D071P

1

40 64Thursday, July 09, 2015

40 64Thursday, July 09, 2015

40 64Thursday, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

A

@

8

GND

7

GND

6

6

5

5

4

4

3

3

2

2

1

1 1

+17.4V_BATT +

SMA RT
Batte ry :

01.G ND

02.G ND

2 2

03.S YS_P RES

04.B ATT _PRS

05.D AT_ SMB

06.C LK_ SMB

07.B ATT 1+

08.B ATT 2+

PBATT1

@

1
2
3
4
5
6
7

8
GND
GND

SUYIN_200277GR008M270ZR

ACES_50458-00601-001

2

JUMP_43X79

EMI@

FBMJ4516HS720NT_2P

1 2

+17.4V_BATT+

12

PC7

EMI@

0.01U_0402_25V7K

1
2
3

SYS_PRES

4
5

DAT_SMB

6

CLK_SMB

7
8
9
10

1

PJP3

@

PL3

112

FBMJ4516HS720NT_2P

+17.4V_BATT ++

12

PC8

EMI@

1 2

PL4

EMI@

PJP2

@

2

112

JUMP_43X79

+17.4V_BATT ++

1000P_0402_50V7K

+19V_ADPIN

PR20

100_0402_5%

1 2
1 2

PR18

100_0402_5%

12

PSID

2

PC1

1000P_0402_50V7K

EMI@

1

PD2
TVNST52302AB0_SOT523-3

ESD@

3

@

2

JUMP_43X79

EMI@

FBMJ4516HS720NT_2P

1 2

12

PC2

EMI@

0.1U_0402_25V7K

PL2

BLM15AG102SN1D_2P

EMI@

PR15

200_0402_5%

1 2

PJP1

112

PL1

12

12

PC3

EMI@

1

PD3
TVNST52302AB0_SOT523-3

ESD@

2

3

B

+19V_VIN

1000P_0402_50V7K

C

PR4

PSID@

PSID@

PR8

10K_0402_1%

PR11

@

1 2

100K_0402_1%

33_0402_5%

1 2PJPDC1

PSID@

12

+5VALW

2

1

3

+5VALW

PD6

@

BAV99W_SC70-3

12

PR3

2.2K_0402_5%

D

S

1 3

PSID-3

PQ6
FDV301N_G 1N SOT23-3

G

12

PC4

EMI@

0.1U_0402_25V7K

PR16

10K_0402_1%

1 2

TVNST52302AB0_SOT523-3

PBAT_PRES# <29,42>

+3VALW

PBAT_CHG_SMBCLK <29,4 2>

PBAT_CHG_SMBDAT <29,42>

2

3

PD4

@

1

PR6

PSID@

1 2

100K_0402_1%

PSID-1

PR9

PSID@

15K_0402_1%

1 2

2

PSID-2

C

2

B

E

3 1

PSID@

PQ5

MMST3904-7-F _SOT323

PSID@

1

@

PD5

BAV99W_SC70-3

D

PS_ID <29>

+3VALW

3

+5VALW

2

Other co mponent (37.1)

3 3

Adapter protection:

if batte ry remov ed, adap tor only,
then tri gger the H_PROCH OT#,
keep @ i n BOM si nce batt ery can n ot
be remov ed by en d user

H_PROCHOT#<12,29,42,48>

3

5

PQ3B

4

L2N7002DW1T1G_SC88-6

PR37

@

10K_0402_1%

+3VALW

PC14

.1U_0402_16V7K

1 2

12

PR32

100K_0402_1%

12

PBAT_PRES#

4 4

Battery protection:

asserts H_PROCHO T# when adaptor i s
unplugge d, keep low for 10ms
till SW PROCHOT# is issu ed by EC

PR31

1M_0402_1%

PR33

1M_0402_1%

+19V_VIN

1 2

1 2

12

3

5

4

PR28

10K_0402_1%

PQ2B

L2N7002DW1T1G_SC88-6

+3VALW

PC16

.1U_0402_16V7K

1 2

H_PROCHOT#

61

2

12

PQ2A

PR29

100K_0402_1%

L2N7002DW1T1G_SC88-6

Erp lot6 Circuit

SIO_SLP_S3#<11,17,29,40,46,51 >

+19V_VIN

12

5

PR10

1M_0402_1%

PR5

3.3K_1206_5%

3

PQ1B

4

L2N7002DW1T1G_SC88-6

PR7

1M_0402_1%

1 2

61

2

PQ1A

12

PR2

10K_0402_1%

1 2

L2N7002DW1T1G_SC88-6

DELL CONFIDENTIAL/PROPRIETARY

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

C

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR_DCIN/BATT CONN/OTP

PWR_DCIN/BATT CONN/OTP

PWR_DCIN/BATT CONN/OTP

41 64Thursday, July 09, 2015

41 64Thursday, July 09, 2015

D

41 64Thursday, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

A

1 1

12

PR738

1M_0402_1%

AON7426_DFN3X3EP8-5

PQ740

+19V_VIN

4

12

PR720

3.3K_1206_5%

@

61

@

PQ707A

AC_DIS<29,4 2>

2 2

For DT Mode

2

L2N7002DW1T1G_SC88-6

1 2

@

12

PR778

0_0402_5%

PC742

@

5600P_0402_25V7K

PR737

3M_0402_5%

1
2
35

PC744

@

12

61

PQ709A

2

12

L2N7002DW1T1G_SC88-6

1 2

0.1U_0402_25V6

12

12

PR777

12

1 2

PR749

200K_0402_1%

1 2

PR751

75K_0402_1%

1 2

PR763 4.02K_040 2_1%

CMSRC

PR769 0_0402_5%

@

1 2

1 2

PC748

2200P_0402_25V7K

PR750

200K_0402_1%

1 2

PR752

66.5K_0402_1%

1 2

PR729

392K_0402_1%

13

D

AC_DIS<29,4 2>

L2N7002WT1 G_SC70-3

2

G

PQ720

@

S

For Learn Mode

ACAV_IN<11,29>

3 3

12

PR732

1 2

PC711

49.9K_0402_1%

0.01UF_0402_25V7K

VDD_CHG

12

PR741

ACIN_CHG

100K_0402_1%

ACIN

12

PBAT_CHG_SM BDAT<29,41>

PR731

158K_0402_1%

PBAT_CHG_SM BCLK<29,41>

H_PROCHOT#<12,29,41,48>

I_SYS<29,48>

VDD_CHG

ACIN

5

4

4 4

A

PQ707B

L2N7002DW1T1G_SC88-6

PR762 4.02K_040 2_1%

ASGATE

@

I_ADP<29>

I_BATT<29>

@

0_0402_5%

PR722

@

3.3K_1206_5%

3

B

PR739

@

1M_0402_1%

PR744

@

1M_0402_1%

@

SDMK0340L-7-F_SOD323-2

PQ718

1
2
3

PD706

ACIN_CHG

MDU1512RH_POWERDFN56-8-5

4

PR770

@

0_0402_5%

PR774 0_0402_5%

@

1 2

1 2

12

PC749

1 2

2200P_0402_25V7K

B

5

PR775

@

0_0402_5%

CCLIM

ACLIM

12

PR746

@

1M_0402_1%

12

5

3

4

@

PQ709B

L2N7002DW1T1G_SC88-6

12

PR703

0.01_1206_1%

1

4

3

2

12

PR772

0_0402_5%

@

PC747

0.1U_0402_25V6

1 2

PC745

@

0.1U_0402_25V6

1UH_PCMB053T-1R0MS_7 A_20%

12

PR740

0_0402_5%

@

12

1 2

12

PC750 0.2 2U_0603_25V7K

29

30

31

32

PU703 ISL95521HRZ-T_QFN32_4X4

CSIP

ACIN

ACOK

SDA

SCL

PROCHOT#

AMON

BMON

PSYS

AGND

33

1 2

560P_0402_50V7K

COMP

CSIN

PROG

9

10

PR754

499_0402_1%

PR755

1 2

1 2

PC752

0.015U_0402_25V7K

1

2

3

4

5

6

7

8

12

PR727

10.5K_0402_1%

PROG

PR753

150K_0402_1%

PC751

1 2

CMSRC

ASGATE

CCLIM11COMP

FSET12BATGONE13CSON14CSOP

1 2

133K_0402_1%

26

28

27

VBAT

QPCP

OPCN

15

1 2

PR764 10K_0402 _1%

1 2

PC753

10P_0402_50V8J

C

12

+19VB

PL704

@EMI@

1 2

EMI@

PJP701

@

112

JUMP_43X118

PC746

@

0.1U_0402_25V6

2

PR745

100_0402_1%

1 2

12

12

PC760

PC763

PC762

10U_0805_25V6K

10U_0805_25V6K

25

PR771@

24

23

UGATE_CHG

22

PHASE_CHG

21

LGATE_CHG

20

VDDP_CHG

19

VDD_CHG

18

17

0_0603_5%

1 2

BGATE

BOOT

UGATE

PHASE

LGATE

VDOP

DCIN

VDO

NTC

ACLIM

16

PR757

100K_0402_1%

1 2

PR743 10_1206_5%

PC757

PR779

1 2

1 2

1U_0603_25V6

0_0402_5%

@

0.1U_0402_25V6

PR756

@

10K_0402_1%

1 2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR761@
0_0603_5%

PC768

1U_0402_16V6K

1 2

PC708

+3VALW

0.22U_0603_25V7K

1 2

1 2

1 2

PR760 4.7_0402_5%

1 2

@

1 2

@

PBAT_PRES# <29,4 1>

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

EMI@

12

12

PC764

0.1U_0402_25V7K

PC765

10U_0805_25V6K

10U_0805_25V6K

+17.4V_BATT+

PR773@

0_0603_5%

1 2

PC721

1 2

1 2

PD704 SDMK0340L-7-F_SOD323-2

1 2

PD705 SDMK0340L-7-F_SOD323-2

1 2

PC758 0.1U_0402_25V6

1 2

PR742 2_0402_5%

PR776

@

0_0402_5%

1 2

1 2

PC759 0.1U_0402_25V6

C

12

12

PC705

2200P_0402_25V7K

3 5

241

3 5

PC769

241

1U_0402_16V6K

+19V_VIN

BA

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

Deciphered Date

Deciphered Date

Deciphered Date

PQ704

AON7408L_DFN8-5

4.7UH_5.5A_20%_7X7X3_M

12

PQ708

12

AON7506_DFN33-8-5

PC779

1 2

@

0.1U_0402_25V7K

PL700

1 2

PR766

4.7_120 6_5%

@EMI@

PC767

680P_0603_50V7K

@EMI@

Iada=0~3 .33A(65W )

Iada=0~2 .30A(45W )

ADP_I = 32*Iadap ter*Rsen se

5

4

123

PQ717 M DU1512RH_POWERDFN56-8-5

PR765

0.01_1206_1%

1

2

DELL CONFIDENTIAL/PROPRIETARY

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

D

4S1P: CV = 17. 7V CC: 1.6A

4

3

12

PC776

PC775

10U_0805_25V6K

10U_0805_25V6K

SIO_SLP_S5#<11>

LTC015EUBFS8TL_UMT3F

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PWR_CHARGER

PWR_CHARGER

PWR_CHARGER

D

12

12

LMUN5113T1G_SOT323-3

12

PC777

PC761

10U_0805_25V6K

0.1U_0402_25V7K

PQ710

13

2

PQ711

+17.4V_BATT+

12

PC766

10U_0805_25V6K

2

@

1 3

BA

42 64Thursday, July 09, 2015

42 64Thursday, July 09, 2015

42 64Thursday, July 09, 2015

PR780

1 2

1.0(A00)

1.0(A00)

1.0(A00)

0_0603_5%

A

1 1

PL102

@EMI@

FBMJ4516HS720NT_2P

1 2

PJP105

@

2

+19VB

2 2

112

JUMP_43X79

+3VALWP

PC100

0.1U_0402_25V6

@EMI@

POK <11,45,46,47>

PL103

@EMI@

FBMJ4516HS720NT_2P

1 2

PJP106

@

2

@

@

1 2

3

112

JUMP_43X79

PR121 0_0402_5%

1 2

PR120 0_0402_5%

1 2

PR114

2.2K_0402_5%

1 2

PD102
SDMK0340L-7-F_SOD323-2

2

1

PC115

0.1U_0402_25V6

@EMI@

1 2

12

PC116

EMI@

+19VB

3 3

EN_3V

EN_5V

ALWON<29>

PR116 0_0402_5%

CMP_VOUT0<29>

4 4

TVNST52302AB0_SOT523-3

@

EN_3V

EN_5V

@ESD@

PD101

3V_VIN

12

12

PC103

PC105

2200P_0402_50V7K

EMI@

10U_0805_25V6K

PR107
10K_0402_1%

1 2

POK

5V_VIN

12

12

PC118

PC117

2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K

+3VALWP

12

PC128

4.7U_0402_6.3V6M

EN1 and EN2 dont't floating

Place PD101 close to PU100

A

B

2

5

12

12

PC104

@

10U_0805_25V6K

12

PR113

@

10K_0402_1%

1 2

POK

LX_3V

EN_3V

LX_5V

PU100

6

LX

7

GND

8

SY8286BRAC_QFN20_3X3

GND

9

PG

10

NC

11

ENLDO_3V5V

5

PU102

6

LX

7

GND

8

SY8286CRAC_QFN20_3X3

GND

9

PG

10

NC

11

EN_5V

ENLDO_3V5V

EN112EN2

EN112EN2

IN

IN3IN4IN

FF13OUT14NC

PC113
1000P_0402_25V8J

3V_FB

2

1

IN

IN3IN4IN

FF13OUT14LDO

15

12

BS

1

BS

15

LX

LX

GND

VCC

NC

GND

5V_FB

20

LX

19

LX

18

GND

17

LDO

16

NC

21

GND

1 2

BST_5V

20

19

18

PC119

17

1 2

16

4.7U_0603_6.3V6M

21

VL

5V LDO 150mA~300mA

PC126

4.7U_0603_6.3V6M

PC127
1000P_0402_25V8J

1 2

C

PR100@

0_0603_5%

1 2

BST_3V

12

PC111

4.7U_0603_6.3V6M

3.3V LDO 150mA~300mA

PR108

1K_0402_5%

1 2

PR111@

0_0603_5%

1 2

LX_5V

PR117

1K_0402_5%

1 2

LX_3V

PC102

1 2

0.1U_0603_25V7K

+3VLP

PC114

1 2

0.1U_0603_25V7K

D

PR102
499K_0402_1%

ENLDO_3V5V

PR103

PL100

1.5UH_PCMC063T-1R5MN_9A_20%

1 2

PR106

12

Update PH401 change
to Common Part

@EMI@

4.7_1206_5%

SH000016800 20141202

3V_SN

12

PC112

@EMI@

680P_0603_50V7K

12

PR109

@

150K_0402_1%

12

PR110

@

150K_0402_1%

PL101

2.2UH +-20% 7.8A 7X7X3 MOLDING

1 2

12

PR112

Update PH401 change

@EMI@

@EMI@

to Common Part
SH000016800 20141202

4.7_1206_5%

5V_SN

12

PC125

680P_0603_50V7K

12

PR115

@

150K_0402_1%

12

PR118

@

150K_0402_1%

1 2

12

499K_0402_1%

12

12

12

PC106

PC107

22U_0805_6.3V6M

22U_0805_6.3V6M

+19VB

12

PC108

PC109

22U_0805_6.3V6M

Vout is 3.234V~3.366V

+3VALWP +3VALW

12

12

12

PC120

PC121

22U_0805_6.3V6M

22U_0805_6.3V6M

5VALWP
TDC 4.5 A
Peak Current 6.3 A
OCP Current 9 A fix by IC

+3VALWP

12

PC110

@

22U_0805_6.3V6M

12

PC122

22U_0805_6.3V6M

3VALWP
TDC 7.087 A
Peak Current 8.504 A

22U_0805_6.3V6M

OCP Current 9 A fix by IC

12

PC123

PC124

@

22U_0805_6.3V6M

22U_0805_6.3V6M

PJP102

@

112

JUMP_43X118

PJP103

@

112

JUMP_43X118

+5VALWP

E

2

2

+5VALW+5VALWP

DELL CONFIDENTIAL/PROPRIETARY

Compal El ectronics, Inc.

Compal El ectronics, Inc.

Title

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal El ectronics, Inc.

PWR_3.3VALWP/5VALW P

PWR_3.3VALWP/5VALW P

PWR_3.3VALWP/5VALW P

LA-D071P

LA-D071P

LA-D071P

43 64Thursday, July 09, 2015

43 64Thursday, July 09, 2015

43 64Thursday, July 09, 2015

E

1.0(A00)

1.0(A00)

1.0(A00)

5

D D

+19VB

C C

+1.35VP

PJP206

@

2

112

JUMP_43X79

+1.35V_MEM
TDC 6 A
Peak Current 9 A
OCP Current 11 A

12

12

PC208

0.1U_0402_25V6

EMI@

PQ201
AON7934_DFN3X3A8-10

+19VB_1.35V+19VB_1.35V

12

PC201

2200P_0402_50V7K

EMI@

1UH_11A_20%_7X7X3_M

12

PC206

10U_0805_25V6K

PL200

1 2

PC212

10U_0805_25V6K

4

3

2

D1

D1

D1

D110D2/S1

S2

S2

S2

6

7

5

4

PR200@

0_0603_5%

BST_1.35V_R

12

PC200

0.1U_0603_25V7K

LX_1.35V

1

G1

9

G2

8

1 2

PR206

5.1_0603_5%

1 2

+5VALW

1U_0603_10V6K

1.35V_VTT_PWRGD<11>

+3VALW

PC209

3

PR205

10.2K_0402_1%

1 2

1U_0603_10V6K

12

+5VALW

PR209

@

10K_0402_1%

1 2

BST_1.35V

PC204

1 2

VDD_1.35V

PR210

2.2_0603_5%

SIO_SLP_S4#<11,17,29>

LG_1.35V

CS_1.35V

12

+19VB_1.35V

For RT8207P

UG_1.35V

PU200

15

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

PR208

1 2

453K_0402_1%

PR201 0_0402_5%

@

1 2

0.1U_0402_10V7K

19

18

16

17

PC202

UGATE

TON

9

TON_1.35V

BOOT

VLDOIN

S5

S3

8

7

EN_1.35V

EN_0.675VSP

12

PHASE

RT8207PGQW_WQFN20_3X3

PGOOD

10

@

2

20

VTT

PAD

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

6

FB_1.35V

21

1

2

3

4

5

VTTREF_1.35V

@

220P_0402_25V8J

54.9K_0402_1%

1 2

12

PR204

68.1K_0402_1%

PC214

1 2

PR207

+1.35VP

12

+1.35VP

12

@

.1U_0402_16V7K

12

PC205

10U_0805_6.3V6K

12

PC213

1

0.675Volt +/- 5%
TDC 0.7A
Peak Current 1A

+0.675VSP

PC211

10U_0805_6.3V6K

PC210

0.033U_0402_16V7K

+1.35VP

PR202 0_0402_5%

@

1 2

12

PC203

@

0.1U_0402_10V7K

PJP200

@

+1.35VP +1.35V_MEM

JUMP_43X118

JUMP_43X118

2

JUMP_43X79

112

@

112

@

PJP202

PJP203

2

2

112

12

B B

A A

12

PC220

PC218

22U_0603_6.3V6M

12

PC217

22U_0603_6.3V6M

22U_0603_6.3V6M

12

PC216

12

12

PC215

22U_0603_6.3V6M

22U_0603_6.3V6M

PC219

22U_0603_6.3V6M

EMI@

680P_0402_50V7K

EMI@

4.7_1206_5%

Mode S3 S5 +1.35V_MEN +V_DDR_REF +0.675V_P
S5 L L off off off
S3 L H on on off
S0 H H on on on

PC207

PR203

12

12

0.675V_DDR_VTT_ON<7>

+0.675VSP +0.675V_DDR_VTT

DELL CONFIDENTIAL/PROPRIETARY

Security Classifica tion

Security Classifica tion

Security Classifica tion

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2015/07/09 2016/07/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

PWR_+1.35V_MEN/+0.675V_DDR_VTT

PWR_+1.35V_MEN/+0.675V_DDR_VTT

PWR_+1.35V_MEN/+0.675V_DDR_VTT

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

44 64T hursday, July 09, 2015

44 64T hursday, July 09, 2015

44 64T hursday, July 09, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

D D

PJP301

@

+19VB

C C

2

JUMP_43X79

112

12

@EMI@

12

PC301

0.1U_0402_25V6

PC303

2200P_0402_50V7K

@EMI@

+3VALW

12

PR307

@

0_0402_5%

ILMT_+1VALWP

12

PR310

@

0_0402_5%

+19VB_+1VALWP

12

PC305

@

10U_0805_25V6K

10U_0805_25V6K

4

PC306

3

PR314

@

0_0402_5%

1 2

PR313

@

0_0402_5%

1 2

PR312

@

0_0402_5%

EN_+1VALWP

12

PC405

@

0.1U_0402_25V6

PU301

8

12

ILMT_+1VALWP

IN

9

GND

3

ILMT

2

PG

SYX196DQNC_QFN10_3X3

BYP

LDO

EN

BS

LX

FB

1

6

BST_+1VALWP

10

4

7

5

12

PR304@

0_0603_5%

1 2

SW_+1VALWP

12

PC312

PC313

4.7U_0603_6.3V6K

PC304

0.1U_0603_25V7K

1 2

+3VALW

4.7U_0603_6.3V6K

12

1 2

1M_0402_1%
PR302

@EMI@

FB_+1VALWP

PR303

4.7_1206_5%

1 2

0.68UH +-20% 7.9A

2

@EMI@

SNB_+1VALWP

PL301

1 2

SIO_SLP_SUS# <11,29,46,47>

POK <11,43,46,47>

+1.0V_PRIM_CORE_PG<46>

+1VALWP

PC302

680P_0603_50V7K

1 2

12

PR306

6.65K_0402_1%

12

PR311
10K_0402_1%

PR308

1K_0402_5%

12

PC307

12

JUMP_43X118

12

PC308

47U_0805_6.3V6M

330P_0402_50V7K

@

12

PJP302

112

PC309

1

2

12

PC310

47U_0805_6.3V6M

22U_0805_6.3VAM

+1.0V_PRIM

+1VALWP

12

PC311

22U_0805_6.3VAM

B B

+1.0V_PRIM
TDC 2.63 A
Peak Current 3.748 A
OCP Current 6.0 A Fix by IC
TYP MAX
Choke DCR 11.0mohm , 12.0mohm

A A

DELL CONFIDENTIAL/PROPRIETARY

Security Classifica tion

Security Classifica tion

Security Classifica tion

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2015/07/09 2016/07/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

PWR_+1VALWP

PWR_+1VALWP

PWR_+1VALWP

1.0(A00)

1.0(A00)

1.0(A00)

45 64T hursday, July 09, 2015

45 64T hursday, July 09, 2015

45 64T hursday, July 09, 2015

1

5

PM_ZVM#<13,51>

SIO_SLP_S3#<11,17,29,40,41,51>

D D

Vin=3~17V

+3VALW

+3VALW

Premium@

PR413

PR415

12

PR414

10K_0402_1%

12

Premium@

PR416

10K_0402_1%

@

VID0_VCCIO

VID1_VCCIO

12

10K_0402_1%

12

@

C C

10K_0402_1%

PJP403

@

1 2

PAD-OPEN1x1m

12

12

PC408

PC409

0.1U_040 2_25V6
2200P_04 02_50V7K

@EMI@

Premium@EMI@

0.95V based on PDDG 0.91.

PM_ZVM#

Premium@DSX@

SIO_SLP_SUS#<11 ,29,45,47>

Premium@N-DSX@

POK<11,43,45,47 >

B B

+3VALW

PR417

PR419

12

PR418

10K_0402_1%

12

Premium@

PR420

10K_0402_1%

@

12

Premium@

10K_0402_1%

12

@

10K_0402_1%

A A

0.95V based on PDDG 0.91.

VID0_PRIM_CORE

VID1_PRIM_CORE

Vin=3~17V

+3VALW

PJP404

@

1 2

PAD-OPEN1x1m

PC417

@EMI@

CORE_VID0<18>

CORE_VID1<18>

12

12

PC418

0.1U_040 2_25V6
2200P_04 02_50V7K

Premium@EMI@

12

PC403

10U_0603_10V6M

Premium@

PR406
0_0402_ 5%

1 2

PR428
0_0402_ 5%

1 2

12

PC412

10U_0603_10V6M

Premium@

4

PR425

@

0_0402_ 5%

1 2

PR402
0_0402_ 5%

1 2

12

PC404

10U_0603_10V6M

Premium@

@

1 2

0_0402_ 5%

12

PC413

10U_0603_10V6M

Premium@

@

0_0402_ 5%

PR426

@

@

Premium@

PR403

VIN_1VS_VCCIO

VID0_VCCIO

VID1_VCCIO

PR407

@

0_0402_ 5%

VIN_1V_PRIM

PR408
0_0402_ 5%

1 2

PR411
0_0402_ 5%

1 2

3

+3VALW

12

PR404

Premium@

10K_0402 _5%

12

12

PC402

@

EN_1VS_VCCIO

0.1U_040 2_25V6

Premium@

12

11

10

9

12

12

PC411

@

0.1U_040 2_25V6

Premium@

12

11

10

9

VID0_PRIM_CORE

13

PU401

EN

PVIN

PVIN

TPS62134ARGT_QFN16_3X3

AVIN

VID0

VID1

8

"R" for SILERGY

+3VALW

EN_1.0V_PRIM_CO REP

13

PU402

EN

PVIN

PVIN

TPS62134DRGT_QFN16_3X3

AVIN

VID0

VID1

8

VID1_PRIM_CORE

"R" for SILERGY

14

LPM

7

SS_1VS_VCCIO

12

12

14

LPM

7

SS_1V_PRIM

12

15

PC410

470P_0402_50V7K

Premium@

PR410

Premium@

10K_0402 _5%

15

PC420

470P_0402_50V7K

Premium@

17

PGND16PGND

17

PGND16PGND

12

TP

1

VOS

2

SW

3

SW

4

PG

FBS5AGND6SS

TP

1

VOS

2

SW

3

SW

4

PG

FBS5AGND6SS

+3VALW

Premium@

PR424
100K_0402_1%

+1VS_VCCIOP

LX_1VS_VCCIO

+3VALW

12

Premium@

PR401
10K_0402_1%

+1.0V_PRIM_COREP

Premium@

LX_1V_PRIM

Premium@

PR427

+1.0V_PRIM_CORE_PG<45>

1UH_PCMB041B-1R0MS_4.2A_20%

12

499K_0402_1%

PL402

Premium@

1UH_PCMB041B-1R0MS_4.2A_20%

1 2

12

PR405

@EMI@

4.7_0603_5%

SNUB_1VS_VCCIO

12

PC401

@EMI@

470P_0402_50V7K

1VS_VCCIO_P WRGD <11>

PL404

1 2

Rup

12

PR409

@EMI@

4.7_0603_5%

SNUB_1V_PRIM

12

PC419

@EMI@

470P_0402_50V7K

Premium@

PR423

1 2

5.23K_0402_1%

12

PC406

22U_0603_6.3V6M

Premium@

12

PR421

100_0402_1%

Premium@

PR422

Premium@

12

0_0402_ 5%

Premium@

PR412

12

0_0402_ 5%

12

12

PC424

PC415

22U_0603_6.3V6M

22U_0603_6.3V6M

Premium@

Premium@

2

12

12

PC422

PC407

@

22U_0603_6.3V6M

22U_0603_6.3V6M

Premium@

VCCIO_SENSE <17>

VSSIO_SENSE <17>

+1.0V_PRIM_COREP

12

PC416

@

22U_0603_6.3V6M

1

PJP401

@

JUMP_43X79

2

+1VS_VCCIOP +1.0VS_VCCIO

112

+1VS_VCCIOP

+1.0VS_VCCIO
TDC 1.9 A
Peak Current 2.73 A
OCP Current 4.2 A Fix by IC
TYP MAX
Choke DCR 48.0mohm

PJP402

@

JUMP_43X79

2

+1.0V_PRIM_COREP +1.0V_PRIM_CORE

+1.0V_PRIM_CORE
TDC 1.8 A
Peak Current 2.57 A
OCP Current 4.2 A Fix by IC
TYP MAX
Choke DCR 48.0mohm

112

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

3

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR_+1VS_VCCIOP/+1.0V_PRIM_COREP

PWR_+1VS_VCCIOP/+1.0V_PRIM_COREP

PWR_+1VS_VCCIOP/+1.0V_PRIM_COREP

46 6 4Thursda y, July 09, 2015

46 6 4Thursda y, July 09, 2015

1

46 6 4Thursda y, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

Security Classification

DELL CONFIDENTIAL/PROPRIETARY

Security Classification

5

D D

C C

4

SIO_SLP_SUS#<11,29,45 ,46>

non-DS3

3

PC502

22U_0603_6.3V6M

1 2

PJP501

@

JUMP_43X79

2

1M_0402_ 1%

VIN_1.8VALW

EN_1.8VALW

12

PC505

@

0.1U_0402_16V7K

+3VALW

PR504

DSX@

0_0402_ 5%

1 2

PR507

N_DSX@

0_0402_ 5%

POK<11,43,45,46>

1 2

Note:
When design Vin=5V, please stuff snubber
to prevent Vin damage

112

12

PR505

PU501

SY8032ABC_SOT23-6

4

IN

5

PG

GND

FB6EN

3

LX_1.8VALW

LX

2

1

1UH +-20% 2.3A 2.5X2X1.2

12

PR502

@EMI@

4.7_0603_5%

SNUB_1.8VALW

12

PC506

@EMI@

680P_0402_50V7K

1 2

Vout=0.6V* (1+Rup/Rdown)

PL501

20K_0402_1%

FB_1.8VALW

10K_0402_1%

PR501

PR506

2

TDC = 0.76A
Prak current : 1.096A
OCP : 3A
FB=0.6V

PJP502

@

JUMP_43X79

+1.8VALWP

112

1

2

+1.8V_PRIM

+1.8VALWP

12

Rup

12

12

12

PC503

68P_0402_50V8J

12

PC501

PC504

22U_0603_6.3V6M

22U_0603_6.3V6M

Rdown

+1.8V_PRIM
TDC 0.66 A
Peak Current 0.95 A
OCP Current 3.5A fix by IC

B B

A A

DELL CONFIDENTIAL/PROPRIETARY

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

3

2015/07/09

2015/07/09

2015/07/09

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/07/31

2016/07/31

2016/07/31

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

PWR_+1.8V_PRIM and +1.5VS

PWR_+1.8V_PRIM and +1.5VS

PWR_+1.8V_PRIM and +1.5VS

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Thursday, Ju ly 09, 2015

Thursday, Ju ly 09, 2015

Thursday, Ju ly 09, 2015

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

47 6 4

47 6 4

47 6 4

1.0(A00)

1.0(A00)

1.0(A00)

5

Local sense put on HW site

PR606 0_0402_5%

@

D D

H_PROCHOT#<12,29,41,42>

U23@

U23@

PH601

1 2

1 2

PR631

27.4K_0402_1%

2200P_0402_50V7K

@

1 2

330P_0402_50V7K

PC619

1 2

0.01U_0402_50V7K

12

12

PH602

10K_0402_5%_ERTJ0ER103J

470K_0402_5%_ TSM0B474J4702RE

VCC_GT_SENSE<16>

C C

VSS_GT_SENSE<16>

ISUMP_GT<49>

ISUMN_GT<49>

PR638

B B

357 _0402_ 1%

PR622

2.55 K_0402 _1%

U22@

PR622

PR648

PR629

PR651

1.96k 2.55K

1.37K 1.54k

84.5K

140K 80.6K

PC614

1 2

PC618

PR628

4.42K_0402_1%

12

0.022U_0402_16V7K

0.022U_0402_16V7K

12

PC641

.1U_0402_16V7K

U23@

88.7K

1 2

PC605 47P_0402_50V8J~D

PR610
10K_0402_1%

1 2

PR617

3.6K_0402_1%

1 2

PC616
33P_0402_50V8J

1 2

PR633

11K_0402_1%

PC635

U23@

1 2

PC638

U23@

1 2

PC620

@

12

PC624

0.047U_0402_25V7K

ISEN1_GT<49>

ISEN2_GT<49>

VIDSCLK<15>

VIDALERT_N<15>

VIDSOUT<15>

PR678

100_0402_1%

1 2

U22@

220P_0402_50V7K

12

U22@

680P_0402_50V7K

0.082U_0402_16V7K

12

PC626

U22@

0.047U_0402_25V7K

PR629

U23@

88.7 K_0402 _1%

PR651

U23@

PC617

1 2

PR622

1.96K_0402_1%

1 2

PC621

1 2

PR632

1K_0402_1%

1 2

1 2

1 2

PR607 0_0402_5%

@

1 2

PR609 0_0402_5%

@

PR613

86.6K_0402_1%

1 2

PC613
330P_0402_50V8J

1 2

PR621

U22@

1K_0402_1%

1 2

PR623
2K_0402_1%

1 2

12

@

20M_0402_5%

PC627

2200P_0402_50V7K

1 2

PR638

U22@

274_0402_1%

1 2

ISEN1_GT

ISEN2_GT

+5VALW

PR615

0_0402_5%

1 2

0_0402_5%

PR640

U23@

280 _0402_ 1%

PC626

U23@

PR637

PR634

1 2

PR608 78.7K 100K

PR638

PR640 280255

A A

274 357

80.6 K_0402 _1%

PC621

U23@

0.15 u_0402_ 16V7K

PR621

U23@

0.15U0.047UPC626

680P 470PPC621

1K 316PR621

470 P_0402 _50V7K

PC614

316 _0402_ 1%

U23@

220PPC617 390P

6800PPC614 2200P

5

680 0P_040 2_25V7 K

4

+1.0V_VCCST

12

12

PR601

45.3_0402_1%

I_SYS<29,42>

U22@

U22@

PR648

U23@

1.54 K_0402 _1%

VCCSENSE<15>

PR608

U23@

100 K_0402 _1%

PC617

U23@

390 P_0402 _50V7K

VSSSENSE<15>

@

+3VS

IMVP_VR_ON<11,49>

470K_0402_5%_ TSM0B474J4702RE

12

PR605

PR604

75_0402_1%

100_0402_1%

49.9_0402_1%

PR625 0_0402_5%

@

1 2

10_0402_1%

PR620 0_0402_5%

@

1 2

FCCM_GT<49>
PWM1_GT<49>
PWM2_GT<49>

PH603

1 2

27.4K_0402_1%

PR647

1 2

PC629

2200P_0402_50V7K

1 2

PC639

2200P_0402_25V7K

1 2

PR648

U22@

1 2

1.37K_0402_1%

PC651

@

1 2

330P_0402_50V7K

PC654

1 2

0.01U_0402_50V7K

12

PC602

0.1U_0402_25V6

1 2

1 2

PR626

1 2

PR616

@

1 2

0_0402_5%

1
2
3
4
5
6
7
8
9

10

41

PC625

330P_0402_50V7K

1 2

U22@

84.5K_0402_1%

1 2

PR639

3K_0402_1%

1 2

PC636

33P_0402_50V8J

1 2

1 2

PR618

VR_SDA

PU602

PSYS
IMON_B
NTC_B
COMP_B
FB_B
RTN_B
ISUMP_B
ISUMN_B
ISEN1_B
ISEN2_B

AGND

PR629

1 2

10K_0402_1%

PR645

Local sense put on HW site

4

VR_SCLK

VR_ALERT#

PR6121.91K_0402_1%

PR635

316_0402_1%

@

37

39

40

38

VR_HOT#

VR_READY

VR_ENABLE

FCCM_B11PWM1_B12PWM2_B13IMON_A14NTC_A15COMP_A

IMON_IA

12

2K_0402_1%

PR650

PC647

1 2

680P_0402_50V7K

12

PC653

0.082U_0402_16V7K

3

VCC_SA
Loadline : 10.3m-ohm

PR602

@

0_0402_5%

1 2

PR603

@

0_0402_5%

1 2

12

12

PC604

PC603

0.22U_0603_25V7K

1U_0603_10V6K

1 2

PR608

U22@

78.7K_0402_1%

1 2

PR611

48.7K_0402_1%

32

36

33

34

35

VIN

SDA

VCC

SCLK

PROG231PROG1

30

ALERT#

PWM_C

FCCM_C
ISUMN_C
ISUMP_C

RTN_C

FB_C

COMP_C

IMON_C
PWM_A

FCCM_A

FB_A

RTN_A18ISUMP_A19ISUMN_A

17

16

20

ISL95859HRTZ-T_TQFN40_5X5

FB_IA

NTC_IA

COMP_IA

PR657

4.42K_0402_1%

1 2

12

PR653

@

20M_0402_5%

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PWM_VSA

29

FCCM_VSA

28
27
26
25

FB_VSA

24

COMP_VSA

23

IMON_VSA

22

PWM_IA <49>

21

FCCM_IA <49>

12

PC630

2200P_0402_50V7K

12

PR644

1K_0402_1%

PC642

0.047U_0402_25V7K

1 2

PC646

0.047U_0402_25V7K

1 2

PR656

11K_0402_1%

1 2

PH605

10KB_0402_5%_ERTJ0ER103J

1 2

ISUMP_IA <49>

3

+5VALW

CPU_B+

12

PR640

255_0402_1%

U22@

12

PC645

.1U_0402_16V7K

ISUMN_IA <49>

201 5/07/09 2016 /07/31

201 5/07/09 2016 /07/31

201 5/07/09 2016 /07/31

TDC 5A
Peak Current 5A
OCP current 7A
Choke DCR 12 +-5%m ohm

PR619@

1 2

0_0603_5%

1

PC611

1 2

PWM_VSA

12

PC631

12

PR651

330P_0402_50V7K

U22@

Dec iphered Date

Dec iphered Date

Dec iphered Date

2

3

12

PR630

12

1200P_0402_50V7K

12

140K_0402_1%

0.22U_0603_16V7K

PC628

10P_0402_50V8J

PC643

Compal Secret Data

Compal Secret Data

Compal Secret Data

2

PU606

ISL95808HRZ-TS2378_DFN8_2X2

UGATE

PHASE

BOOT

FCCM

PWM

VCC

GND4LGATE

TP

9

+5VALW

12

PR654

@

20M_0402_5%

4.02K_0402_1%

12

12

PC632
2200P_0402_25V7K

PR646

1 2

316_0402_1%

1.69K_0402_1%

PR652

2K_0402_1%

PC601

680P_0402_50V7K

2

PR636 1.24K_0402_1%

1 2

PR649

1 2

8

7

6

5

12

12

FCCM_VSA

PC685

1U_0402_10V6K

1 2

1 2

1K_0402_1%

PC640

1 2

2200P_0402_25V7K

1

@

PJP603

VCCSA_B+ CPU_B+

1 2

PAD-OPEN1x1m

VCCSA_B+

12

12

PC608

PC612

10U_0805_25V6K

10U_0805_25V6K

D1

S2

3

2

D1

S2

6

7

AON7934_DFN3X3A-8-10

1

PQ501

G1

D1

9

SA_SW

S2

G2

8

12

.1U_0402_16V7K

PC637

PC644

1 2

@EMI@

PR627

4.7_1206_5%

0.033U_0402_16V7K

PC650

@

0.68UH +-20% 7.9A

12

SA_SNUB

12

PC622

@EMI@

12

1 2

0.082U_0402_16V7K

1 2

12

PR624

3.65K_0603_1%

ISUMP_VSA

680P_0603_50V7K

PC633

@

6800P_0402_25V7K

0.01U_0402_50V7K

330P_0402_50V7K

PL601

PC649

1 2

@

1 2

1 2

PC652

D110D2/S1

PR679

@

0_0402_5%

PR641

4

5

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR_+VCC_SA

PWR_+VCC_SA

PWR_+VCC_SA

1

PR643

11K_0402_1%

ISUMN_VSA

12

PR642

2.61K_0402_1%

12

10KB_0402_5%_ERTJ0ER103J

VSA_SEN- <17>

VSA_SEN+ <17>

48 64Thursday, July 09, 2015

48 64Thursday, July 09, 2015

48 64Thursday, July 09, 2015

+VCC_SA

ISUMP_VSA

PH604

ISUMN_VSA

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

VCC_core
U22 - 15W
Loadline : 2.4m-ohm
U23e - 15W
Loadline : 2.4m-ohm

TDC 21A

D D

PL602

PWM

CGND

VSWH

PGND

VIN

EN

GL

+19VB

13
12
11
10
9
8
7

PJP601

@

12

2200P_0402_50V7K

1
2
3
4
5
6

1 2

PAD-OPEN 4x4m

@EMI@

1 2

FBMA-L11-453215800LMA90T_2P

1

+

PC606

2

S ELE CAP 33U 25V

PU603
AOZ5019QI_QFN23_5X3P5

SMOD
VCC
BOOT
GH
VSWH
VIN

CPU_B+

@EMI@

@EMI@

12

12

PC657

PC656

10U_0805_25V6K

10U_0805_25V6K

PR659

@

0_0402_5%

FCCM_IA<48>

C C

12

PC686

10P_0402_25V8J

12

PC659

PC658

10U_0805_25V6K

+5VALW

12

PC661

1U_0402_10V6K

12

0_0603_5%

1 2

0.22U_0603_16V7K

12

PC680
1000P_0402_50V7K

12

0.1U_0402_25V6K~D

PR660@

1 2

PC655

PC660

Peak Current 29A
OCP current 34A
Choke DCR 0.66 +-7%m ohm

PWM_IA <48>

12

PR662

@

5.11K_0402_1%

PR655

@

0_0402_5%

DRMOS_EN

12

CPU_B+

PL603

.15UH +-20% 29A 7X7X4 MOLDING

1

4

CORE_SW

3

12

@EMI@

12

PR661

PR663

3.65K_0603_1%

4.7_1206_5%

ISUMP_IA

CORE_SNUB

12

PC662

680P_0603_50V7K

@EMI@

2

<48>

IMVP_VR_ON <11,48>

+VCC_CORE

<48>

ISUMN_IA

GPU_B+

B B

12

12

PC673

PC672

10U_0805_25V6K

10U_0805_25V6K

+5VALW

FCCM_GT<48,49>

12

PC677

1U_0402_10V6K

12

PC688

A A

12

PC679
1000P_0402_50V7K

10P_0402_25V8J

5

@EMI@

12

PC666

0.1U_0402_25V6K~D

PR671

@

0_0402_5%

12

PR672@

0_0603_5%

1 2

0.22U_0603_16V7K

1 2

PC671

@EMI@

12

PC667

2200P_0402_50V7K

PU605
AOZ5019QI_QFN23_5X3P5

1

SMOD

2

VCC

3

BOOT

4

GH

5

VSWH

6

VIN

PWM

CGND

VSWH

PGND

PR680

@

DRMOS_EN

GPU_B+

13
12

EN

11

VIN

10
9

GL

8
7

GT_SW1

12

@EMI@

3.65K_0603_1%

PR676

4.7_1206_5%

GT_SNUB1

12

ISUMP_GT

PC678

680P_0603_50V7K

@EMI@

4

12

5.11K_0402_1%

.15UH +-20% 29A 7X7X4 MOLDING

PR674

1 2

ISEN1_GT<48>

GT2N

<48,49>

PWM1_GT <48>

PL605

4

3

GT1P

U23@

100K_0402_1%

1 2

PR677

@

100K_0402_1%

PR675

12

VCC_GT
U22 - 15W
Loadline : 3.1m-ohm
U23e - 15W
Loadline : 2m-ohm

U22-15W
TDC 18A
Peak Current 31A
OCP current 37A
Choke DCR 0.66 +-7%m ohm

U23e-15W
TDC 36A
Peak Current 64A
OCP current 77A
Choke DCR 0.66 +-7%m ohm

GPU_B+

PJP602

@

@EMI@

@EMI@

12

PC668

PC674

0.1U_0402_25V6K~D

PR664

12

0_0603_5%

PR665

1 2

0.22U_0603_16V7K

1 2

PC663

U23@

PC681

U23@

1000P_0402_50V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

12

2200P_0402_50V7K

PU604

U23@

AOZ5019QI_QFN23_5X3P5

1

SMOD

2

VCC
BOOT3CGND

4

GH

5

VSWH

6

VIN

Dec iphered Date

Dec iphered Date

Dec iphered Date

PWM

VSWH

PGND

12

12

PC665

PC664

10U_0805_25V6K

10U_0805_25V6K

U23@

U23@

+5VALW

12

PC669

U23@

12

PC687

U23@

1

+VCC_GT

2

GT1N

12

PR673
10_0402_1%

<48,49>

ISUMN_GT

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

U23@

FCCM_GT<48,49>

1U_0402_10V6K

10P_0402_25V8J

0_0402_5%

U23@

12

201 5/07/09 2016 /07/31

201 5/07/09 2016 /07/31

201 5/07/09 2016 /07/31

PAD-OPEN 1x2m~D

13
12

EN

11

VIN

10
9

GL

8
7

2

GPU_B+

21

CPU_B+GPU_B+

PWM2_GT <48>

12

PR681

@

5.11K_0402_1%

DRMOS_EN

PL604

U23@

.15UH +-20% 29A 7X7X4 MOLDING

1

GT1N

4

3

GT2P

U23@

100K_0402_1%

1 2

PR670

@

1 2

100K_0402_1%

PR668

2

GT2N

12

U23@

10_0402_1%

ISUMN_GT

GT_SW2

12

@EMI@

PR667

U23@

3.65K_0603_1%

PR669

4.7_1206_5%

1 2

ISEN2_GT<48>

<48,49>

ISUMP_GT

GT_SNUB2

12

PC670

@EMI@

680P_0603_50V7K

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR_+VCC_core and +VCC_GT

PWR_+VCC_core and +VCC_GT

PWR_+VCC_core and +VCC_GT

1

+VCC_GT

PR666

<48,49>

49 64Thursday, July 09, 2015

49 64Thursday, July 09, 2015

49 64Thursday, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

A

VCC_CORE Place on CPU
U22-15W
22U_0603 * 18 pcs +1U_0201*35 pcs+220u_D2*2 pcs
U23e-15W
22U_0603 * 27 pcs +1U_0201*35 pcs+330u_D2*2 pcs

B

C

+VCC_CORE +VCC_GT

D

VCC_GT Place on CPU
U22-15W
22U_0603 * 25 pcs +1U_0201*12 pcs+330u_D2*1 pcs
U23e-15W
22U_0603 * 48 pcs +1U_0201*12 pcs+330u_D2*4 pcs

E

1 1

2 2

3 3

1

2

12

12

220U 2V Y D2

1

+

2

1

1

PC1076

PC1078

2

2

@

@

22U_0603_6.3V6M

22U_0603_6.3V6M

1

1

PC1081

2

2

22U_0603_6.3V6M

U23@

12

12

PC1083

PC1030

1U_0201_6.3V6M

1U_0201_6.3V6M

12

12

PC1099

PC1095

1U_0201_6.3V6M

1U_0201_6.3V6M

U22@

U22@

220U 2V Y D2

1

PC1062

PC1127

12

+

2

1

1

PC1077

2

@

22U_0603_6.3V6M

1

PC1080

2

22U_0603_6.3V6M

12

PC1031

1U_0201_6.3V6M

12

PC1094

1U_0201_6.3V6M

12

PC1170

22U_0603_6.3V6M

1

PC1001

PC1079

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

U23@

1

1

PC1067

PC1082

2

2

@

22U_0603_6.3V6M

22U_0603_6.3V6M

U23@

12

12

PC1032

PC1033

1U_0201_6.3V6M

1U_0201_6.3V6M

12

12

PC1090

PC1096

1U_0201_6.3V6M

1U_0201_6.3V6M

12

12

PC1171

PC1172

@

22U_0603_6.3V6M

22U_0603_6.3V6M

+VCC_GT

1

1

PC1221

2

2

22U_0603_6.3V6M

U22@

4 4

1

1

PC1224

PC1223

PC1222

2

2

@

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

U22@

1

1

PC1002

2

22U_0603_6.3V6M

U23@

1

PC1072

2

22U_0603_6.3V6M

12

PC1034

1U_0201_6.3V6M

12

PC1093

1U_0201_6.3V6M

12

PC1173

@

22U_0603_6.3V6M

1

PC1004

PC1003

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

U23@

1

1

PC1069

PC1074

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

U23@

12

12

PC1035

PC1036

1U_0201_6.3V6M

1U_0201_6.3V6M

12

12

PC1091

PC1097

1U_0201_6.3V6M

1U_0201_6.3V6M

PC1127

PC1174

@

330U 2V Y D2

22U_0603_6.3V6M

1

1

PC1005

2

22U_0603_6.3V6M

U23@

1

PC1070

2

22U_0603_6.3V6M

12

PC1037

1U_0201_6.3V6M

12

PC1092

1U_0201_6.3V6M

U23@

1

PC1007

PC1006

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

1

1

PC1061

PC1071

2

2

@

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

PC1039

PC1038

1U_0201_6.3V6M

1U_0201_6.3V6M

12

12

PC1050

PC1098

1U_0201_6.3V6M

1U_0201_6.3V6M

PC1062

U23@

330U 2V Y D2

1

1

PC1008

2

@

22U_0603_6.3V6M

1

PC1066

2

@

22U_0603_6.3V6M

12

PC1084

1U_0201_6.3V6M

12

PC1051

1U_0201_6.3V6M

1

PC1010

PC1009

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

1

1

PC1068

PC1073

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

PC1086

PC1085

1U_0201_6.3V6M

1U_0201_6.3V6M

12

12

PC1053

PC1052

1U_0201_6.3V6M

1U_0201_6.3V6M

VCC_SA Place on CPU
U22-15W
22U_0603 * 9 pcs + 1U_0201*7 pcs
U23e-15W
22U_0603 * 12 pcs + 1U_0201*7 pcs

1

1

PC1011

22U_0603_6.3V6M

PC1075

22U_0603_6.3V6M

PC1088

1U_0201_6.3V6M

PC1054

1U_0201_6.3V6M

PC1013

PC1012

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

U23@

1

1

PC1065

PC1064

2

2

@

22U_0603_6.3V6M

22U_0603_6.3V6M

U23@

12

12

PC1087

PC1089

1U_0201_6.3V6M

1U_0201_6.3V6M

12

12

12

PC1125

PC1164

PC1126

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1

2

1

2

12

U22@

330U 2V Y D2

330U 2V Y D2

1

1

PC1128

+

+

2

2

1

1

PC1014

PC1015

2

2

@

22U_0603_6.3V6M

22U_0603_6.3V6M

U22@

1

1

PC1137

PC1133

2

2

@

@

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

PC1040

PC1041

1U_0201_6.3V6M

1U_0201_6.3V6M

U23@

330U 2V Y D2

@

PC1063

330U 2V Y D2

1

1

PC1101

+

+

2

2

1

1

PC1016

PC1017

2

2

@

22U_0603_6.3V6M

22U_0603_6.3V6M

U23@

1

1

PC1132

PC1129

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

U23@

U23@

12

12

PC1043

PC1042

1U_0201_6.3V6M

1U_0201_6.3V6M

U23@

PC1100

12

12

PC1181

22U_0603_6.3V6M

U22@

1

1

PC1018

2

22U_0603_6.3V6M

U22@

1

PC1136

2

22U_0603_6.3V6M

U22@

12

PC1044

1U_0201_6.3V6M

12

PC1180

22U_0603_6.3V6M

U23@

1

PC1020

PC1019

2

2

@

22U_0603_6.3V6M

22U_0603_6.3V6M

U22@

1

1

PC1135

PC1134

2

2

@

22U_0603_6.3V6M

22U_0603_6.3V6M

U22@

12

12

PC1045

PC1046

1U_0201_6.3V6M

1U_0201_6.3V6M

12

12

PC1177

PC1179

22U_0603_6.3V6M

22U_0603_6.3V6M

U23@

U22@

1

1

PC1021

2

22U_0603_6.3V6M

U23@

1

PC1138

2

@

22U_0603_6.3V6M

12

PC1047

1U_0201_6.3V6M

12

PC1176

22U_0603_6.3V6M

U22@

1

PC1023

PC1022

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

U22@

U23@

1

1

PC1027

PC1028

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

U23@

U22@

12

12

PC1049

PC1048

1U_0201_6.3V6M

1U_0201_6.3V6M

12

12

PC1178

PC1175

22U_0603_6.3V6M

22U_0603_6.3V6M

U22@

U22@

1

1

PC1026

PC1025

PC1024

2

2

@

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

U22@

PC1130

@

22U_0603_6.3V6M

PC1055

1U_0201_6.3V6M

PC1182

22U_0603_6.3V6M

U22@

U23@

1

1

PC1029

PC1131

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

U23@

U23@

12

PC1056

1U_0201_6.3V6M

12

12

PC1183

PC1184

22U_0603_6.3V6M

22U_0603_6.3V6M

U22@

+VCC_SA

1

1

2

1

PC1058

PC1057

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

U23@

U23@

1

1

PC1059

PC1060

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

1

1

PC1139

PC1140

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

1

1

PC1141

2

22U_0603_6.3V6M

1

PC1143

PC1142

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

U23@

1

1

PC1144

22U_0603_6.3V6M

PC1146

PC1145

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

+VGA_CORE

1

1

PC1158

2

2

22U_0603_6.3V6M

U22@

1

1

PC1162

2

22U_0603_6.3V6M

U22@

1

PC1154

PC1159

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

U22@

U23@

1

1

PC1161

2

22U_0603_6.3V6M

U22@

1

1

1

PC1155

PC1163

22U_0603_6.3V6M

PC1156

2

2

@

22U_0603_6.3V6M

22U_0603_6.3V6M

U22@

1

PC836

+

+

2

2

330U_D2_2V_Y

VGA@

1

PC837

PC838

PC839

+

+

2

2

330U_D2_2V_Y

330U_D2_2V_Y

330U_D2_2V_Y

VGA@

VGA@

VGA@

12

12

12

PC1153

1U_0201_6.3V6M

12

PC1148

PC1147

1U_0201_6.3V6M

1U_0201_6.3V6M

12

12

PC1149

1U_0201_6.3V6M

12

PC1151

PC1150

1U_0201_6.3V6M

PC1152

1U_0201_6.3V6M

1U_0201_6.3V6M

For VGACORE

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

For GTX

A

B

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR_CPU&VGA bulk and MLCC

PWR_CPU&VGA bulk and MLCC

PWR_CPU&VGA bulk and MLCC

50 64Thursday, July 09, 2015

50 64Thursday, July 09, 2015

50 64Thursday, July 09, 2015

E

1.0(A00)

1.0(A00)

1.0(A00)

5

PM_ZVM#<13,46>

SIO_SLP_S3#<11,17,29,40,41,46>

D D

Vin=3~17V

+3VALW

+3VALW

U23@

PR1205

PR1207

12

@

PR1203

10K_0402_1%

12

U23@

10K_0402_1%

VID0_EDRAM_VR

VID1_EDRAM_VR

PR1208

Vin=3~17V

12

10K_0402_1%

12

@

C C

B B

10K_0402_1%

+3VALW

+1.0V_VCCSTG

@

PR1290
100K_0402_1%

1 2

U23@

PR1224
0_0402_ 5%

1 2

U23@

PR1214

10K_0402_1%

PR1217

@

10K_0402_1%

12

@

10K_0402_1%

12

U23@

10K_0402_1%

PR1215

VID0_EOPIO_VR

VID1_EOPIO_VR

PR1218

12

A A

12

5

PJP1202

@

1 2

PAD-OPEN1x1m

12

PC1208

0.1U_040 2_25V6

@EMI@

PJP1203

@

1 2

PAD-OPEN1x1m

12

PC1217

0.1U_040 2_25V6

@EMI@

12

PC1209

2200P_04 02_50V7K

U23@EMI@

SIO_SLP_S3#

PC1218

12

U23@

2200P_04 02_50V7K

MSM_N <13>

4

+3VALW

PR1222

@

12

VIN_VCC_EDRAM

VID0_EDRAM_VR

VID1_EDRAM_VR

0_0402_ 5%

PC1200

@

0.1U_040 2_25V6

12

11

10

12

9

PR1200

U23@

0_0402_ 5%

1 2

PR1202

@

0_0402_ 5%

12

12

PC1201

PC1202

10U_0603_25V6M

10U_0603_25V6M

U23@

U23@

12

EN_VCC_EDRAM

U23@

13

PU1200

EN

PVIN

PVIN

SY8057QDC_QFN16_3X3TP

AVIN

VID0

VID1

8

PR1225

U23@

0_0402_ 5%

12

14

LPM

7

SS_VCC_EDRAM

12

PR1201

U23@

10K_0402 _5%

15

17

TP

PGND16PGND

FBS5AGND6SS

+3VALW

12

U23@

PR1211

12

EN_VCC_EOPIO

13

14

EN

LPM

SY8057QDC_QFN16_3X3

VID1

8

PR1226

0_0402_ 5%

10K_0402 _5%

15

7

SS_VCC_EOPIO

12

17

TP

PGND16PGND

FBS5AGND6SS

@

PM_ZVM#

U23@

PR1212

0_0402_ 5%

1 2

PR1213

@

0_0402_ 5%

VIN_VCC_EOPIO

12

12

PC1213

PC1214

10U_0603_25V6M

10U_0603_25V6M

U23@

U23@

VID0_EOPIO_VR

VID1_EOPIO_VR

PR1223

0_0402_ 5%

12

12

PC1212

@

0.1U_040 2_25V6

PU1201

U23@

12

PVIN

11

PVIN

10

AVIN

9

VID0

U23@

3

1

VOS

2

SW

3

SW

4

PG

1

VOS

2

SW

3

SW

4

PG

+VCC_EDRAM_P

LX_VCC_EDRAM

12

SNUB_VCC_EDRAM

12

+VCC_EOPIO_P

LX_VCC_EOPIO

12

SNUB_VCC_EOPIO

12

PL1200

U23@

1UH_PCMB041B-1R0MS_4.2A_20%

1 2

PR1204

@EMI@

4.7_0603_5%

PC1210

@EMI@

470P_0402_50V7K

PL1201

U23@

1UH_PCMB041B-1R0MS_4.2A_20%

1 2

Rup

PR1216

@EMI@

4.7_0603_5%

PC1219

@EMI@

470P_0402_50V7K

12

PC1203

22U_0603_6.3V6M

U23@

12

PR1206

100_0402_1%

PR1209

U23@

U23@

0_0402_ 5%

PR1210

U23@

0_0402_ 5%

12

PC1215

22U_0603_6.3V6M

U23@

12

PR1219

100_0402_1%

U23@

U23@

PR1220

0_0402_ 5%

PR1221

U23@

0_0402_ 5%

12

PC1204

22U_0603_6.3V6M

U23@

12

12

12

PC1216

22U_0603_6.3V6M

U23@

12

12

2

+VCC_EDRAM_P

12

PC1205

@

22U_0603_6.3V6M

VCC_EDRAM_SENSE <15>

VSS_EDRAM_SENSE <15>

+VCC_EOPIO_P

12

PC1225

@

22U_0603_6.3V6M

VCCEOPIO_SENSE <15>

VSSEOPIO_SENSE <15>

1

PJP1200

@

JUMP_43X79

2

+VCC_EDRAM_P +VCC_EDRAM

+VCC_EDRAM
TDC 1.75 A
Peak Current 2.5 A
OCP Current 4.2 A Fix by IC
TYP MAX
Choke DCR 48.0mohm

+VCC_EOPIO_P +VCC_EOPIO

+VCC_EOPIO
TDC 1.4 A
Peak Current 2 A
OCP Current 4.2 A Fix by IC
TYP MAX
Choke DCR 48.0mohm

112

PJP1201

@

JUMP_43X79

112

2

DELL CONFIDENTIAL/PROPRIETARY

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

3

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR_+VCCEDRAM / +VCCEPOIO

PWR_+VCCEDRAM / +VCCEPOIO

PWR_+VCCEDRAM / +VCCEPOIO

51 6 4Thursda y, July 09, 2015

51 6 4Thursda y, July 09, 2015

1

51 6 4Thursda y, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

+19VB_GPU

PC1105

VGA@

12

12

10U_0805_ 25V6K

@EMI@

12

PR1107

4.7_1206_5%

@EMI@

PC1109

12

680P_0603_ 50V7K

+19VB_GPU

12

PC1114

10U_0805_ 25V6K

VGA@

@EMI@

12

PR1125

4.7_1206_5%

@EMI@

PC1121

12

680P_0603_ 50V7K

12

PC1107

PC1106

2200P_0402 _50V7K

0.1U_0402_2 5V6K

@EMI@

VGA@EMI@

12

PC1116

PC1115

2200P_0402 _50V7K

@EMI@

VGA@EMI@

D D

UG2_VGA

@

VGA@

VGA@

12

12

COMP_NB

PR1105 10K_0402_ 1%

35

PGOOD_NB

VSEN

16

12

PR1106 10K_0402_ 1%

34

33

LGATE_NB

RTN17ISUMN15ISEN1

1000P_0402 _50V7K

PC1124

@

330P_0402_ 50V7K

12

PC1229

VGA@

UGATE_NB32PHASE_NB

COMP

FB18PGOOD

19

0.01U_0402_ 50V7K

+5VALW

31

BOOT_NB

20

VGA@

PC1122

1 2

1 2

1 2

BOOT2

UGATE2

PHASE2

LGATE2

VDDP

VDD

LGATE1

PHASE1

UGATE1

BOOT1

PWRGD_VGA

VGA@

PR1129
301_0402_ 1%

1 2

EXO@

PR1133

1.15K_0402_1 %

1 2

PR1138

@

0_0402_5%

PR1139

@

0_0402_5%

30

BST2_VGA

29

UG2_VGA

28

LX2_VGA

27

LG2_VGA

26

25

24

LG1_VGA

23

LX1_VGA

22

UG1_VGA

21

BST1_VGA

+3VS

12

PR1119

@

100K_0402_ 1%

PC1123

VGA@

330P_0402_ 50V7K

1 2

VGA@

PR1134

22.1K_0402_1 %

1 2

VGA@

PR1135

2K_0402_1%

1 2

PR1114

VGA@

1 2

1_0603_5%

12

PC1110

1U_0603_1 0V6K

VGA@

1 2

PR1122

@

0_0402_5%

EXO@

121K_0402_ 1%

VGA@

PC1228

390P_0402_ 50V7K

1 2

VGA@

PC1233

330P_0402_ 50V

1 2

VCCSENSE_VGA <57>

VSSSENSE_VGA <57>

+5VALW

12

PC1111

VGA@

PR1130

1 2

1 2

PR1140 32.4K_0402_1%

VGA@

41

PU1100

11K_0402_1 %

PC1119

1 2

PC1120

1 2

1

2

3

4

5

6

7

8

9

10

12

PC1232

VGA@

@

100_0402_ 1%

1 2

NTC_NB

IMON_NB

SVC

VR_HOT_L

SVD

VDDIO

SVT

ENABLE

PWROK

IMON

VGA@

VGA@

12

0.033U_0402 _16V7K

PR1137

TP

ISEN2_VGA

ISEN1_ VGA

PC1230

0.15U_0603_ 16V7K

VGA@

562_0402_ 1%

1 2

PR1101 100K_0402_ 1%

VGA@

1 2

PR1111 100K_0402_ 1%

VGA@

VGA@

PR1120

150K_0402_ 1%

1 2

1 2

1 2

PR1116 0_0402_5%

@

1 2

PWRGD_VGA

VSUM-_VGA

12

VGA@

PR1131

2.61K_0402_1 %

12

VGA@

PH1102

10K_0402_5 %_ERTJ0ER103J

12

VGA@

PC1231

0.1U_0603_5 0V7K

VDDIO_VGA

ENABLE_ VGA

IMON_VGA

VGA@

PR1121

13.3K_0402_1 %

1 2

0.22U_0402_ 10V6K

0.22U_0402_ 10V6K

12

PR1132

VGA@

PR1113 0_ 0402_5%@

1 2

PR1117

1 2

12

VGA@

1000P_0402 _50V7K

SVI2_SVC<57>

SVI2_SVD<57>

SVI2_SVT<57>

DGPU_PWR_EN<9,40>

VGA@

PC1117

@

PH1101

470K_0402_ 5%_TSM0B474J4702RE

VSUM+_VGA

VSUM-_VGA

OCP_L<57>

@

100K_0402_ 1%

PR1112

1 2

+3VS

1 2

+1.8VGS

PR1115 0_0402_5%

C C

B B

+3VGS

@

1 2

0.1U_0402_2 5V6K

PC1226

VGA@

133K_0402_ 1%

38

40

ISUMN_NB39ISUMP_NB

ISL62771HRTZ-T_TQFN40_5X5

13

11

EXO@

PR1136

PC1227

@

820P_0402_ 50V7K

1 2

36

37

FB_NB

VSEN_NB

ISUMP14ISEN212NTC

1U_0603_1 0V6K

DGPU_PWROK <12,29,40 >

LX2_VGA

BST2_VGA

LX1_VGA

BST1_VGA

PR1103@

0_0603_5%

1 2

PR1123@

0_0603_5%

1 2

PR1133

MESO@

1K +-1% 0402

PR1136

MESO@

470 +-1% 0402

VGA@

PC1108

0.22U_0603_ 25V7K

1 2

LG2_VGA

UG1_VGA

VGA@

PC1118

0.22U_0603_ 25V7K

1 2

LG1_VGA

PR1133 1K1.15k

PR1136 562 470

4

PQ1101

123

VGA@

5

4

PQ1102

VGA@

123

5

4

PQ1104

123

VGA@

5

4

PQ1105

VGA@

123

EXO@ MESO@

AON6552_DFN5X6-8 -5

4

AON6554_DFN5X6-8 -5

AON6552_DFN5X6-8 -5

4

AON6554_DFN5X6-8 -5

5

12

12

PC1103

PC1104

10U_0805_ 25V6K

10U_0805_ 25V6K

VGA@

VGA@

5

PQ1103

AON6554_DFN5X6-8 -5

VGA@

123

12

PC1112

PC1113

10U_0805_ 25V6K

10U_0805_ 25V6K

VGA@

VGA@

5

PQ1106

AON6554_DFN5X6-8 -5

VGA@

123

@VGA@EMI@

12

12

0.1U_0402_2 5V6

PJP1101

@

2

112

JUMP_43X79

PL1101

FBMJ4516HS720NT_2P

1 2

ISEN2_VGA

VSUM+_VGA

VSUM-_VGA

VGA@

10K_0402_1 %

1 2

VGA@

3.65K_0603_1 %

1 2

VGA@

1_0402_1%

1 2

+19VB

SH000011 H00 (DCR:0.98m± 5%)

PL1102

0.22U H_24A_2 0%_7 X7X4_MOLDIN G

1 2

PR1104

PR1108

PR1110

VGA_CORE (EXO-XT )
TDC 34A
Peak Current 51 A
OCP current 61.2 A
Load line XXmV/A (no need)

VGA_CORE (Meso-L E)
TDC 28A
Peak Current 42 A
OCP current 52.5 A
Load line 1mV/A ( need)

FSW=300kHz

SH000011 H00 (DCR:0.98m± 5%)

0.22U H_24A_2 0%_7 X7X4_MOLDIN G

1 2

PR1124

VGA@

10K_0402_1 %

1 2

ISEN1_VGA

PR1126

VGA@

3.65K_0603_1 %

1 2

VSUM+_VGA

PR1128

VGA@

1_0402_1%

1 2

VSUM-_VGA

PL1103

VGA@

VGA@

+VGA_CORE

+VGA_CORE

A A

DELL CONFIDENTIAL/PROPRIETARY

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

2

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docum ent Num ber Rev

Size Docum ent Num ber Rev

Size Docum ent Num ber Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR_VGA_CORE

PWR_VGA_CORE

PWR_VGA_CORE

1

52 64Thursday, July 09, 2015

52 64Thursday, July 09, 2015

52 64Thursday, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

Version Change List ( P. I. R. List )

Item

D D

TitlePage# Rev.

HW
or PWR

Date

NA1 NA COMPAL NA

Owner

NA NA

Request

Issue
Description

Solution
Description

2

3

4

5

6

7

C C

8

9

10

11

B B

COMPAL

COMPAL

COMPAL

COMPAL

COMPAL

COMPAL

COMPAL

COMPAL

COMPAL

COMPAL

0.2(X01)

A A

DELL CONFIDENTIAL/PROPRIETARY

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR_Change list

PWR_Change list

PWR_Change list

1

1.0(A00)

1.0(A00)

53 64Thursday, July 09, 2015

53 64Thursday, July 09, 2015

53 64Thursday, July 09, 2015

1.0(A00)

5

Ver sion Change List ( P. I. R. List )

Tit lePa ge# Re v.Soluti on

Ite m

D D

5 G PIO modi fy 1. Add RC36 0 for PW RGD_VGA

6 HW GPIO mod ify 1. Add RE 437

8 COMPAL 0.1(X00)

9 COMPAL 0.1(X00)PCH Strap mod ify

10 COMPAL 0.1(X00 )

12 0.1(X00)

C C

13 0.1(X00)

14

17 2014 1226

18 2014 1228

B B

20 HW 20141 230 COMP AL

21 HW 20150 108 COMP AL

Da te Iss ue

HW 201411 241 COMPAL 0.1(X00)Power se quence 1. Add RC344 for PCH _DPWROK reserved .

HW 201411 28 COMP AL 0.1(X00)

20141203 COMPAL 0.1(X 00)

HW 201412 10

HW 201412 12

HW 201412 16

HW 201412 18 COMP AL

HW 201412 19 COMP AL

HW 201412 22 COMP AL

HW

HW

HW COMPAL

HW COMPAL

HW1 9 201412 29 COMP AL

4

Re que st Owne r

De scrip tion

Debug co nn 1. Delete JAPS1, J SPI1HW2 2014 1124 CO MPAL 0.1(X00)

Correct XDP co nn and G PIO chec kHW3 COMPAL2 0141125 0.1(X00)

3

2. Add U C13, RC 343, RC3 45, RE42 9 for IM VP_VR_ON .

1. Chang e XDP c onn

2. Add R E430 fo r GPIO02 1 reserv e

3. Add R C356, R C357, RC 358 for GPIO pul l-up

4. Delet e RC227 , RC290, UC12, R C224

2

De scrip tion

1

Circuit double 1. Delete P3 2, P33 f or doubl e circui t.4 HW 20141126 CO MPAL 0.1(X00)

2. Delet e RC283 , RC174, RC247, R6503, R 6504, RC 26, RC35 7, Q2505 , R2504
, C620, C621, U 74

3. Add D E6, Q62 04, U560 2

2. Delet e DE6

Follow M 16 EE i mplement ation gu ide modi fy201412 04HW7 0.1(X00)COMPAL

1. DDR_V TT_CNTL

2. CODEC

3. LPC c onnecto r

4. VCCST G contr ol

1. SMBus power rail

COMPAL2014121 7HW11 0.1(X00)

2. PROCP WRGD

3. USB2_ ID

4. CODEC

5. Touch pad

6. VRAM

7. GPU p ower

1. GPU

2. EC

3. CPU

4. DDI t o VGA

1. GPU

2. CODEC

1. Power rail

2. Debug soluti on

1. Power rail

COMPAL2014122 315

2. Debug soluti on

1. Debug soluti on

COMPAL2014122 416

1. EMI C AP

1. GPIO

2. HSIO

1. GPIO 1. Change U Z3 to si ngle cha nnel loa d switch

1. GPIO 1. Add Q190 1, R1902 for RTC RST_ON 0.1(X00)

1. Chang e CPU p art numb er

2. Chang e capac itor par t number

3. Chang e USB L oad swit ch symbo l and pa rt
number

4.Add CP U dummy symbol, modify PCB
dummy sy mbol

1. Delet e C6203 , R6205, R6208, R6217, R 6213, Q2 602,
C2610, R 2612, R 2602, R2 607

2. Add C 6214, C 6215, R6 512, R65 14, R651 5, RC361

1. Add D 5503, R E439,

1. Add R C365

2. Chang e VCCIO , EOPIO, EDRAM p ower ena ble by S 3#

3. Delet e RC362 , RC363

4. VCCST _PWRGD control by EC

1. Add U C14, CC 57, RC12 3 for DD R_VTT_CN TL buffe r

2. Delet e RE34

3. chang e RE33 to 1K an d move t o D2701 pin1

4. Chang e R2717 to 10K

5. Move C2901 t o AUD_SE NSE_A an d change to 0.1u F

6. Move EC2901~ EC2904 t o R2901~ R2904 pi n1

7. Move R2919, R2920, E C2905~EC 2908 to R2906, R 2907, R2 909, R29 11 pin1

8. Chang e C2907 , C2908 to 10uF/ 10V/0603

9. Chang e DB2 l ocation to DB1

10. Add UC15 fo r VCCSTG control , delete RZ73

1. pop R C15, RC 17, de-p op RE426 , RE427

2. RC77 de-pop

3. Add R C366 to GND for USB2 OT G settin g

4. Chang e CODEC pin20 f rom +3VA LW to +R TC_CELL

5. Add D Z3, RE4 40 for t ouch pad INT#

6. GPU V RAM bit /Byte sw ap

7. U5602 IN1/OU T1 swap with IN2 /OUT2

1. Add R C367, d elete RV 60, RV25 4, RV255 for MES O VGA CO RE power

2. Add R V260 fo r GPU_PW R_LEVEL

3. Chang e VREF_ CPU to + 1.0V_VCC ST

4. Delet e RC359 , connec t VCC_OP C_1P8 to +1.8V_P RIM

5. Chang e CC283 ~CC286 p in1 to + 1.0V_PRI M

6. Add C C288~CC 292 for +VCC_EDR AM

7. Add C C293~CC 295 for VDDQ

8. Add C C296 fo r VDDQC

9. Add C C297 fo r VDDPLL _OC

10. Chan ge UZ20 VIN fro m +1.0V_ MPHYAON to +1.0V _PRIM

11. Add RC638 f or +1.0V _PRIM to +1.0V_M PHYGT

12. Dele te R540 9 for HD MI power config

13. Chan ge U550 2 pin 5, 20 from 3D3V_S0 to +3VS

14. Chan ge HDD_ DEVSLP t o port 0

1. Add P CIe ser ies caps for BOM control .

2. Swap VRAM bi t for la yout

3. Chang e +3V_1 .8V_CPVD D to DGN D

1. Chang e VGA_C ORE to + VGA_CORE

2. Delet e PJP10 2

3. Add R 6517, R C369 for debug p ort

4. Swap RP pin for layo ut routi ng smoot hly

1. Chang e +1.0V S_VCCSTG to +1.0 V_VCCSTG

2. Delet e RC369

3. Add R 4621, R 4622, RC 207, R47 02, R470 3, R4704 , R4706, C4701, U4701
, JWBD1 for deb ug port

4. Chang e PWR1, TPAD1 c onnector source

5. Delet e LV25, LV26, + VDDCI

1. Delet e R4621 , R4622, RC207, R4702, R 4703, R4 704, R47 06, C470 1
, U4701, RC207 for debu g port

2. Add R C62, RC 63 for d ebug por t

1. Delet e CC284 , CC287, CC254 f or place ment 0.1(X00)

1. Chang e CLK_P CI_LPC_M EC to PC I_CLK_LP C1

2. Delet e T4947 , Add R5 208~R521 0 for PA NEL_SIZE _ID

3. Add R C369 fo r SUS_ST AT#/LPCP D#

4. Add R C307~RC 373 for PROJECT_ ID1, PRO JECT_ID2

5. Add R C374~RC 377 for BOARD_ID 2, BOARD _ID3

6. Add R C378~RC 381 for VRAM_ID1 , VRAM_I D2

7. Swap SIO_EXT _SCI# to GPP_E5

8. Swap BLUETOO TH_EN to GPP_C9

9. Swap I2C_SDA _TP to G PP_C16

10. Swap I2C_SC L_TP to GPPC17

11. Add RC382 f or LPSS_ UART2_CT S#

12. Swap WLAN_R ADIO_DIS # to GPP _D4

13. Add RC383 f or DGPU_ HOLD_RST #

14. Chan ge RC35 8 to GND for DGP U_PWR_EN

15. Add R2504, Q2505, R C384 for RTC_DET #

16. Swap SIO_EX T_SMI# t o GPP_E1 5

17. Swap SATA_O DD_DA# t o GPP_E6

18. Add RC385, RC386 fo r HDMI_C RT_DET

19. Repl ace UE1 AC_PRES ENT by D GPU_PWRO K

20. Add RC387 f or SIO_E XT_WAKE#
21, Add DZ4 for AC_PRES ENT

22. Add R5809, Delete R E411

23. Dele te RC34 2 and KB C_DPWROK

24. Add RE441 f or FAN1_ TACH

25. Dele te UC13 , QE2, R E67, RE6 8, Add R C389 for ALL_SYS _PWRGD

26. Add UC16, C C298, RC 71 for V CCST_PWR GD
27, Dele te RZ77 , RE429, CE83

28. Add RC390 f or L_BKL T_EN_EC, delete D5502, R 6506

29. Chan ge VREF _CPU con nect to +1.0V_PR IM

30. Swap PCIE_W AKE# to GPIO002

31. Swap CLK_PC IE_LAN_R EQ# to p ort2

32. Swap LAN fr om PCIE port9 to port6

33. Swap USB2 p ort6 and por8 de vice (BT and Car d Reader )

2. Add C 5801, C 5802, C5 805, R58 09 for W LAN powe r

3. Add R C391 fo r EC_WAK E#

4. Add R C391 fo r ALL_SY S_PWRGD

1.Change part n umber SA 01140507 1 to SA0 0008M40L :UC1A~UC 1T

2.Change part n umber SE 102104K8 0 to SE1 02104K00 : CC214 ,CC223,C C270,
CC281,CC 297,CD2 4,CD25,C D26,CD27 ,CD32,CD 57,CD58, CD59,CD6 0,CD64,C Z34,CZ44 ,
CZ50,CZ7 8,CZ82, CZ86,CZ8 5,CZ88

3.Add CP U dummy symbol 2.3G,1.6 G on pag e1

4.Modify PCB du mmy symb ol part descript ion to " PCB"

5.Change symbol and par t number from SA 00007BW0 0 to SA0 0007U200 :
U3504,U3 505

0.1(X00)

0.1(X00)

0.1(X00)

0.1(X00)

0.1(X00)

0.1(X00)

A A

DELL CONFIDENTI AL/PROPRIETARY

Com pal Electr onics, Inc.

Com pal Electr onics, Inc.

Com pal Electr onics, Inc.

Title

Title

2

Title

EE_Change lis t

EE_Change lis t

EE_Change lis t

Size Document Numb er Rev

Size Document Numb er Rev

Size Document Numb er Rev

LA-D071P

LA-D071P

LA-D071P

54 64Thursday, July 09, 2015

54 64Thursday, July 09, 2015
Date: Sheet of

Date: Sheet of

Date: Sheet of

54 64Thursday, July 09, 2015

1

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

5

4

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

1.0(A00 )

1.0(A00 )

1.0(A00 )

5

4

Timing Diagram for S5 to S0 mode

3

2

1

+RTC_CELL

2

TPS22961

5

+1.0V_PRIM

+1.0V_MPHYGT

MPHYP_PWR_EN

+3.3V_ALW_DSW

PCH_DPWROK

4

+3.3V_ALW_PCH

5

+1.8V_PRIM

5

+1.0V_PRIM_CORE

PCH_PLTRST#

16

D D

VCCST_PWRGD

12

H_CPUPWRGD

15

PCH_PLTRST#

16

0.675V_DDR_VTT_ON

12

C C

CPU

VCCST_PWRGD

PROCPWRGD

PLTRST#

DDR_VTT_CNTL

VCCIO

VCCGT

VCCGTX

VDDQ
VDDQC
VCCPLL_OC

VCCST
VCCSTG
VCCPLL

VCCSA

VCCOPC

VCC_OPC_1P8

VCCEOPIO

+VCC_CORE

VCC

+1.0VS_VCCIO

+VCC_GT

+1.35V_MEM

+1.0V_VCCST

+VCC_SA

+V_EDRAM_VR

+V1.8S_EDRAM

+V_EOPIO_VR

6

+1.0V_MPHYGT

3

+1.0V_PRIM

+3VALW

+3.3V_SPI

Power Button

VCCRTC

VCCPRIM_1P0
DCPDSW_1P0
VCCMPHYAON_1P0
VCCAPLL_1P0
VCCCLK1~6

VCCMPHYGT_1P0
VCCSRAM_1P0
VCCAMPHYPLL_1P0
VCCAPLLEBB

EXT_PWR_GATE#

VCCDSW_3P3

DSW_PWROK

VCCHDA
VCCSPI
VCCPRIM_3P3
VCCPGPPA~E
VCCRTCPRIM

VCCPGPPG
VCCATS

VCCPRIM_CORE

PLTRST#

PCH

SLP_SUS#

RSMRST#

PWRBTN#

SLP_S5#

SLP_S4#

SIO_SLP_SUS#

5

PCH_RSMRST#

SIO_PWRBTN#

SIO_SLP_S5#

SIO_SLP_S4#

12

AUX_EN_WOWL

0.675V_DDR_VTT_ON

2AC1BAT

ADAPTER

EC 1404

ALWON

BATTERY

PCH_DPWROK

4

SIO_SLP_SUS#

5

B B

10

11

11

14

7

9

PCH_RSMRST#

SIO_SLP_S5#

SIO_SLP_S4#

SIO_SLP_S3#

RUNPWROK

RESET_OUT#

@PCH_ALW_ON

2

12

IMVP_VR_ON

@ALL_SYS_PWRGD

12

AUX_EN_WOWL

+19VB

TPS51275

5

+PWR_SRC

ISL95857

11

PCH_PWROK

VL
+5VALW

+3VLP
+3VALW

13

+VCC_SA
+VCC_CORE
+VCC_GT

SLP_S3#

VCCST_PWRGD

PCH_PWROK

PROCPWRGD

SYS_PWROK

SIO_SLP_S3#

VCCST_PWRGD

PCH_PWROK

H_CPUPWRGD

RESET_OUT#

+3VALW

5

+3VALW

@PCH_ALW_ON

11

7

8

9

+1.0V_PRIM

10

TPS2296710+1.0V_VCCST

+19VB

RT8207

+5VALW

11

EM5209VF

+3VALW

+3VALW

TPS62134

+3VALW

TPS62134 +VCC_EDRAM

+3VALW

TPS62134 +VCC_EOPIO

12

13

15

14

+1.0V_PRIM_CORETPS62134

+1.0V_PRIM_CORE_PG

+1.8V_PRIMSY8032

+3VALW

EM5209VF

+1.35V_MEM

+0.675V_DDR_VTT

+5VS

+3VS

+1.0VS_VCCIO

+19VB

5

+3VALW_PCH

+3.3V_WLAN

5

VDDQ

VTT

+1.0V_PRIMSYX196

DDR

6

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

LA-D071P

LA-D071P

LA-D071P

Power Sequence

Power Sequence

Power Sequence

1

55 64Thursday, July 09, 2015

55 64Thursday, July 09, 2015

55 64Thursday, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

1

2

3

4

5

PEG_HTX_C_GRX_P[0..3]<10>

PEG_HTX_C_GRX_N[0..3]<10>

PEG_GTX_C_HRX_P[0..3]<10>

PEG_GTX_C_HRX_N[0..3]<10>

@

UV1A

A A

4

PLT_RST_VGA#

12

RV4
100K_0402_5%

DIS@

AF30

PCIE_RX0P

AE31

PCIE_RX0N

AE29

PCIE_RX1P

AD28

PCIE_RX1N

AD30

PCIE_RX2P

AC31

PCIE_RX2N

AC29

PCIE_RX3P

AB28

PCIE_RX3N

AB30

PCIE_RX4P

AA31

PCIE_RX4N

AA29

PCIE_RX5P

Y28

PCIE_RX5N

Y30

PCIE_RX6P

W31

PCIE_RX6N

W29

PCIE_RX7P

V28

PCIE_RX7N

V30

NC#V30

U31

NC#U31

U29

NC#U29

T28

NC#T28

T30

NC#T30

R31

NC#R31

R29

NC#R29

P28

NC#P28

P30

NC#P30

N31

NC#N31

N29

NC#N29

M28

NC#M28

M30

NC#M30

L31

NC#L31

L29

NC#L29

K30

NC#K30

CLOCK

AK30

PCIE_REFCLKP

AK32

PCIE_REFCLKN

N10

TEST_PG

AL27

PERSTB

216085 6030-A0_FCBGA63 1

PEG_HTX_C_GRX_ P0
PEG_HTX_C_GRX_N0

PEG_HTX_C_GRX_ P1
PEG_HTX_C_GRX_ N1

PEG_HTX_C_GRX_ P2
PEG_HTX_C_GRX_N2

PEG_HTX_C_GRX_ P3
PEG_HTX_C_GRX_ N3

GPU R1

B B

UV1

SA00008FE0L

MESOR1@

MESO L E S3 BG A GPU 0FD

UV1

SA000089Y0L

EXOR1@

EXO XT S3 FC BGA631 P 0FD

C C

D D

UV1

MESO L E S3 FC BGA A31 !

UV1

EXO XT S3 FC BGA A31 !

PLT_RST#

PCH_PLTRST#_EC<11,25,29,32,36>

DGPU_HOLD_RST#<9>

DGPU_HOLD_ RST#(GPIO191)

CV220 .1U_0402_16V7KMESO@ 12

12

CV306 .1U_0402_16V7KMESO@

12

CV308 .1U_0402_16V7KMESO@
CV305 .1U_0402_16V7KMESO@ 12

12

CV307 .1U_0402_16V7KMESO@

12

CV309 .1U_0402_16V7KMESO@

CV219 .1U_0402_16V7KMESO@ 12

12

CV304 .1U_0402_16V7KMESO@

GPU R3

SA00008FE1L

MESOR3@

SA000089Y1L

EXOR3@

CLK_PEG_VGA<11>
CLK_PEG_VGA#< 11>

RV2 1K_0402_1%DIS@

SN74AHC1G08DCKR_SC70-5

1 2

1

2

PEG_HTX_GRX_P0
PEG_HTX_GRX_N0

PEG_HTX_GRX_P1
PEG_HTX_GRX_N1

PEG_HTX_GRX_P2
PEG_HTX_GRX_N2

PEG_HTX_GRX_P3
PEG_HTX_GRX_N3

CLK_PEG_VGA
CLK_PEG_VGA#

PLT_RST_VGA#

+3VGS

UV2

DIS@

5

P

IN1

G

IN2

3

O

PEG_HTX_C_GRX_ P[0..3]

PEG_HTX_C_GRX_ N[0..3]

PEG_GTX_C_HRX_ P[0..3]

PEG_GTX_C_HRX_ N[0..3]

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCI EXPRESS INTERFACE

CALIBRATION

PCIE_CALR_TX

PCIE_CALR_RX

NC#W24
NC#W23

NC#V27
NC#U26

NC#U24
NC#U23

NC#T26
NC#T27

NC#T24
NC#T23

NC#P27
NC#P26

NC#P24
NC#P23

NC#M27

NC#N26

AH30
AG31

AG29
AF28

AF27
AF26

AD27
AD26

AC25
AB25

Y23
Y24

AB27
AB26

Y27
Y26

W24
W23

V27
U26

U24
U23

T26
T27

T24
T23

P27
P26

P24
P23

M27
N26

Y22

AA22

PEG_GTX_HRX_P0
PEG_GTX_HRX_N0

PEG_GTX_HRX_P1
PEG_GTX_HRX_N1

PEG_GTX_HRX_P2
PEG_GTX_HRX_N2

PEG_GTX_HRX_P3
PEG_GTX_HRX_N3

1 2

RV1

DIS@

1 2

RV3 1K_0402_1%DIS@

1.69K_04 02_1%

CV1 .1U_0402_16V7KMESO@ 12

12

CV2 .1U_0402_16V7KMESO@

12

CV3 .1U_0402_16V7KMESO@
CV4 .1U_0402_16V7KMESO@ 12

12

CV5 .1U_0402_16V7KMESO@

12

CV6 .1U_0402_16V7KMESO@

CV7 .1U_0402_16V7KMESO@ 12

12

CV8 .1U_0402_16V7KMESO@

+0.95VSDGPU

PEG_GTX_C_HRX_ P0
PEG_GTX_C_HRX_ N0

PEG_GTX_C_HRX_ P1
PEG_GTX_C_HRX_ N1

PEG_GTX_C_HRX_ P2
PEG_GTX_C_HRX_N2

PEG_GTX_C_HRX_ P3
PEG_GTX_C_HRX_ N3

No Use GPU Display Port outpud

@

UV1F

AB11

VARY_BL

AB12

DIGON

AL15
AK14

AH16
AJ15

AL17
AK16

AH18
AJ17

AL19
AK18

AH20
AJ19

AL21
AK20

AH22
AJ21

AL23
AK22

AK24
AJ23

2160856030-A0_FCBGA631

TXCAP_DPA3P
TXCAM_DPA3N

TX0P_DPA2P
TX0M_DPA2N

TX1P_DPA1P
TX1M_DPA1N

TX2P_DPA0P
TX2M_DPA0N

NC_TXOUT_L3P
NC_TXOUT_L3N

TMDP

TXCBP_DPB3P
TXCBM_DPB3N

TX3P_DPB2P
TX3M_DPB2N

TX4P_DPB1P
TX4M_DPB1N

TX5P_DPB0P
TX5M_DPB0N

NC_TXOUT_U3P
NC_TXOUT_U3N

?

For EXO/MESO PCIe Gen3/Gen2 option

CV306

EXO@

CV308

CV220

EXO@

0.22 U 16V 7K

SE00000R7 00

CV307

EXO@

0.22 U 16V 7K

SE00000R7 00

CV309

EXO@

0.22 U 16V 7K

SE00000R7 00

CV219

EXO@

0.22 U 16V 7K

SE00000R7 00

0.22 U 16V 7K

SE00000R7 00

CV304

EXO@

0.22 U 16V 7K

SE00000R7 00

CV1

EXO@

0.22 U 16V 7K

SE00000R7 00

CV2

EXO@

0.22 U 16V 7K

SE00000R7 00

EXO@

0.22 U 16V 7K

SE00000R7 00

CV3

EXO@

0.22 U 16V 7K

SE00000R7 00

CV4

EXO@

0.22 U 16V 7K

SE00000R7 00

CV5

EXO@

0.22 U 16V 7K

SE00000R7 00

CV305

EXO@

0.22 U 16V 7K

SE00000R7 00

CV6

EXO@

0.22 U 16V 7K

SE00000R7 00

CV7

EXO@

0.22 U 16V 7K

SE00000R7 00

CV8

EXO@

0.22 U 16V 7K

SE00000R7 00

+VGA_CORE_MESO

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

4

Date: Sheet of

Compal Electronics, Inc.

EXO/MESO_PCIE/DP

EXO/MESO_PCIE/DP

EXO/MESO_PCIE/DP

LA-D071P

LA-D071P

LA-D071P

5

1.0(A00)

1.0(A00)

56 64Thursday, July 09, 2015

56 64Thursday, July 09, 2015

56 64Thursday, July 09, 2015

1.0(A00)

1

2

3

4

5

+3VGS

12

12

45.3K_0402_1 %

G

S

2

G

QV1A

DIS@

6 1

S

D

DMN66D 0LDW -7 2N SOT3 63-6

MESO@

GPU_THM_INT

2

VGA_DPLUS

3

VGA_DMINUS

8

VGA_SMB_CK3 _R

7

VGA_SMB_DA3_R

+3VGS

RV5

DIS@

5

QV1B

DIS@

GPU_THM_SMBDAT<8,29,38>

A A

Main:
SA000084 A00, S IC F75399M MSOP 8P TEMP. SENSOR
2nd:
SA00003PU00 , S IC W83L771AWG-2 TSSOP 8P SENSOR
Jason 2015/03 /03

B B

C C

8.2P_0402_50 V8D

GPU_THM_SMBCLK<8,29,38>

+3VGS

MESO@

RV58

+3VGS

4.7K_0 402_ 5%

1 2

GPU_THM_INT

MESO@

1

CV10

0.1U_0402_1 6V4Z

2

+VGA_CORE +VGA_C ORE_MESO

MESO@

1 2

RC367 0_0603_5%

+3VGS

1 2

RV154

5.1K_0 402_ 1%@

1 2

RV17 1K_ 0402_1%DIS@

RV20

DIS@

1M_0402_5%

YV1

DIS@

27MHZ_1 0PF_7 V270000 50

3

GND

GND

2

4

XTALIN

1

CV18

DIS@

XTALOUT

1

2

3

Change CV17, CV18 for YV1 2nd source.
Jason 5/29

3 4

+3VGS

D

RV146

1 2

4.7K_0 402_ 5%

DMN66D 0LDW -7 2N SOT3 63-6

SA010320 110 (S IC ADM1032A RMZ MSOP 8P TEMP SENSOR)

UV11

MESO@

1

VDD1

D+

6

ALERT#

D-

4

THERM#

SCLK

5

GND

SDATA

ADM1032AR MZ_MSOP8

Address: X100_110 1(4D), 1001_10 1X(9A)

For 2nd
SA00001Z71 0 (S IC EMC1402-2 -ACZL-TR MSOP 8P SENSOR)
SA00003PU00 (S IC W83L771AWG- 2 TSSOP 8P SENSOR)

Chnage CPN first, Need apply CIS Symbol
SA000084 A00, S IC F75399M MSOP 8P TEMP. SENSOR
SA00003PU00 , S IC W83L771AWG-2 TSSOP 8P SENSOR
Jason 2015/01 /26

TESTEN

1

1

CV17

8.2P_0402_50 V8D

DIS@

2

RV6

45.3K_0402_1 %

DIS@

1000P_0402 _50V7K

1 2

CV9

MESO@

1 2

VGA_SMB_CK3

MESO@

RV164 0_0402_5%

1 2

VGA_SMB_DA3

MESO@

RV165 0_0402_5%

GPU_PWR_LEVEL<29 >

Reduce 3.3V TO 1.8V level shift for E XO.
BOM contorl in POWER s heet

SVI2_SVD<52>

SVI2_SVC<52>

+1.8VGS

RV152

@

10K_0402_5 %

1 8

JTAG_TDI_GPU

2 7

JTAG_TMS_GPU

3 6

JTAG_TCK

4 5

JTAG_TRSTB

RP34 10K_8P4R_5%

@

12

SVI2_SVD

SVI2_SVC

10K_0402_5 %

1 2

VGA_SMB_DA3

VGA_SMB_CK3

T222

T221

+3VGS

EXO@

EXO@

PEG_CLKREQ#<11>

GPIO19_CTF

RV151

EXO@

+1.8VGS

1 2

BLM15BD 121S N1D_0 402

CV19

CV20 1U_0 402_6.3V4Z

CV21

RV21

+1.8VGS

1

FB_VDDCI

@

1

PLL_Analog_in

@

12

DIS@

RV260 10K_0402_5%

1 2

RV77 0_04 02_5%

1 2

RV78 0_04 02_5%

RV153 0_0402_5%

LV2

DIS@

13mA

DIS@

12

10U_ 0603_ 6.3V6M

DIS@

12

DIS@

12

0.1U_ 0402_ 10V6K

1 2

10K_0 402_ 5%EXO@

RV82

RV81

GPU_VID3

GPIO19_CTF
GPU_VID1

1 2

@

T86

RV29
RV59

@

PAD

T4935

@

T218

1 2

DIS@

1 2

DIS@

T201
T202
T203
T204
T205
T206
T207
T208
T209
T210
T211
T212
T213
T214
T215
T216
T217

12

4.7K_0 402_ 5%MESO@

12

4.7K_0 402_ 5%MESO@

T223
T224

+VGA_CORE_ MESO

VGA_SMB_DA3
VGA_SMB_CK3

PCC_ GPIO_6

+VGA_CORE_ MESO

PEG_CL KREQ# _G

JTAG_TRSTB
JTAG_TDI_GPU
JTAG_TCK
JTAG_TMS_GPU

1

JTAG_TDO_GPU
TESTEN

+VGA_CORE_ MESO

1

@

1

PX_EN

XTALIN
XTALOUT

10K_0 402_ 5%
10K_0 402_ 5%

VGA_DPLUS
VGA_DMINUS

GPIO28
+TSVDD

Enable MLPS

D D

PCC_GPIO_6

@

CVT90

0.1U_ 0402_ 10V7K

1

2

@

UV1B

N9

1

@

DBG_DATA16

L9

1

@

DBG_DATA15

1

AE9

@

DBG_DATA14

1

Y11

@

DBG_DATA13

AE8

1

@

DBG_DATA12

AD9

1

@

DBG_DATA11

AC10

1

@

DBG_DATA10

AD7

1

@

DBG_DATA9

1

AC8

@

DBG_DATA8

1

AC7

@

DBG_DATA7

1

AB9

@

DBG_DATA6

1

AB8

@

DBG_DATA5

AB7

1

@

DBG_DATA4

1

AB4

@

DBG_DATA3

1

AB2

@

DBG_DATA2

1

Y8

@

DBG_DATA1

1

Y7

@

DBG_DATA0

W6

NC#W6

V6

NC#V6

AC6

NC#AC5

AC5

NC#AC6

AA5

NC#AA5

AA6

NC#AA6

U1

BP_0

NC#U1

W1

NC#W1

U3

BP_1

NC#U3

Y6

NC#Y6

AA1

NC#AA1

I2C

1

R1

@

SCL

1

R3

@

SDA

GENERAL PURPOSE I/O

U6

GPIO_0

U10

GPIO_1

T10

GPIO_2

U8

SMBDATA

U7

SMBCLK

T9

GPIO_5_AC_BATT

T8

GPIO_6

T7

GPIO_7_BLON

P10

GPIO_8_ROMSO

P4

GPIO_9_ROMSI

P2

GPIO_10_ROMSCK

N6

GPIO_11

N5

GPIO_12

N3

GPIO_13

Y9

GPIO_14_HPD2

N1

GPIO_15_PWRCNTL_0

M4

GPIO_16

R6

GPIO_17_THERMAL_INT

W10

GPIO_18

M2

GPIO_19_CTF

P8

GPIO_20_PWRCNTL_1

P7

GPIO_21

N8

GPIO_22_ROMCSB

AK10

GPIO_29

AM10

GPIO_30

N7

CLKREQB

L6

JTAG_TRSTB

L5

JTAG_TDI

L3

JTAG_TCK

L1

JTAG_TMS

K4

JTAG_TDO

K7

TESTEN

AF24

NC#AF24

AB13

GENERICA

W8

GENERICB

W9

GENERICC

W7

GENERICD

AD10

GENERICE

AJ9

NC#AJ9

AL9

NC#AL9

AC14

HPD1

AB16

PX_EN

AC16

DBG_VREFG

PLL/CLOCK

AM28

XTALIN

AK28

XTALOUT

AC22

XO_IN

AB22

XO_IN2

SEYMOUR/FutureASIC

T4

DPLUS

T2

DMINUS

R5

GPIO28_FDO

AD17

TSVDD

AC17

TSVSS

2160856030-A0_FCBGA631

1 2

RV90 1K_04 02_1%@

2

1

U?

NC#AF2
NC#AF4

NC#AG3
NC#AG5

DPA

NC#AH3
NC#AH1

NC#AK3

DPB

DPC

DAC1

FutureASIC/SEYMOUR/PARK

DDC/AUX

?

NC#AK1

NC#AK5

NC#AM3

NC#AK6

NC#AM5

NC#AJ7

NC#AH6

NC#AK8
NC#AL7

NC#V4
NC#U5

NC#W3

NC#V2

NC#Y4

NC#W5

NC#AA3

NC#Y2

NC#J8

AVSSN#AK26

AVSSN#AJ25

AVSSN#AG25

HSYNC

VSYNC

AVSSQ

VDD1DI
VSS1DI

CEC_1

RSVD#AK12

RSVD#AL11
RSVD#AJ11

GENLK_CLK

GENLK_VSYNC

SWAPLOCKA
SWAPLOCKB

DDC1CLK

DDC1DATA

AUX1P
AUX1N

DDC2CLK

DDC2DATA

AUX2P
AUX2N

NC#AD20
NC#AC20

NC#AE16
NC#AD16

DDCVGACLK

DDCVGADATA

OCP_L <52>

DVO

THERMAL

TOPAZ Thermal Address-->0x82

+3VGS

@

RV91
10K_0402_5 %

1 2

OCP_L

Peak Current Contro l (PCC) CKT
Reversed

3

AF2
AF4

AG3
AG5

AH3
AH1

AK3
AK1

AK5
AM3

AK6
AM5

AJ7
AH6

AK8
AL7

V4
U5

W3
V2

Y4
W5

AA3

PLL_Analog_out

Y2

J8

AM26

R

AK26

AL25

G

AJ25

AH24

B

AG25

AH26
AJ27

AD22

RSET

AG24

AVDD

AE22

AE23
AD23

AM12

AK12

MESO@

AL11

MESO@

AJ11

MESO@

AL13
AJ13

AG13
AH12

AC19

PS_0

AD19

PS_1

AE17

PS_2

AE20

PS_3

AE19

TS_A

AE6
AE5

AD2
AD4

AC11
AC13

AD13
AD11

AD20

FB_GND

AC20

FB_VDDC

AE16
AD16

AC1
AC3

Resistor Divider Lookup Lable

0402 1% resistors are equired

NC

8.45k

4.53k

6.98k

4.53k

3.24k

3.4k

4.75k

Bitd [3:1]

R_pd (ohm)R_pu (ohm)

4.75k

000

2k

001

010

2k

011

4.99k

100

4.99k

5.62k

101

10k

110

NC

111

Capacitor Divider Lookup Lable

Cap (nF) Bitd [5:4]

00

680nF

82nF

01

10nF 10

11

NC

12

RV83

16.2K_0402_1 %

MESO@

+3VGS

12

RV162

4.7K_0 402_ 5%

@

WAKEB

12

RV163

4.7K_0 402_ 5%

DIS@

1 2

RV155 0_0402_5%

1 2

RV156 0_0402_5%

1 2

RV157 0_0402_5%

PS_0

PS_1

PS_2

PS_3

VCCSENSE_VGA
VSSSENSE_VGA

Security Clas sification

Security Clas sification

Security Clas sification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRA NSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRA NSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRA NSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SVI2_SVD
SVI2_SVT
SVI2_SVC

+VGA_CORE_ MESO

Jason 6/24

Short Pad

1 2

RV158

@

0_04 02_5%

1 2

RV159

@

0_04 02_5%

Short Pad

Jason 6/24

+VGA_CORE

1 2

EXO@

1 2

RV161 1 0_0402_5%

EXO@

RV160 1 0_0402_5%

2015/07/0 9 2016/07/31

2015/07/0 9 2016/07/31

2015/07/0 9 2016/07/31

SVI2_SVT <52>

4

VSSSENSE_VGA
VCCSENSE_VGA

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphere d Date

Deciphere d Date

Deciphere d Date

PS_0[3:1]=001

PS_0[5:4]=11

PS_1[3:1]=000

PS_1[5:4]=11

PS_2[3:1]=000

PS_2[5:4]=11

PS_3[3:1]=000

PS_3[5:4]=11

PS_0

CV29

@

PS_1

CV28

@

PS_2

CV11

@

PS_3

CV15

@

RV71 0_0402_5 %

+1.8VGS

12

12

1

2

0.68U_0402_10V

+1.8VGS

12

12

1

2

0.68U_0402_10V

+1.8VGS

12

12

1

2

0.082U_0402_16V

+1.8VGS

12

12

1

2

0.68U_0402_10V

VSSSENSE_VGA <52>
VCCSENSE_VGA <5 2>

1 2

MESO@

RV84

10K_0402_5 %

DIS@

SVI2_SVD
SVI2_SVC

@

RV89

10K_0402_5 %

RV8

8.45K_ 0402 _1%

DIS@

RV9
2K_04 02_1 %

DIS@

EXO@

RV11

8.45K_ 0402 _1%

MESO@

RV12

4.75K_ 0402 _1%

@

RV28

8.45K_ 0402 _1%

RV13

4.75K_ 0402 _1%

DIS@

@

RV15

8.45K_ 0402 _1%

@

RV16

4.75K_ 0402 _1%

SD03 44751 80

1 2

1 2

Strap Name :

PS_0[1] ROM_CONFIG[0]

PS_0[2] ROM_CONFIG[1]

PS_0[3] ROM_CONFIG[2]

PS_0[4] N/A

PS_0[5] AUD_PORT_CONN_PINSTRAP[0]

Strap Name :

PS_1[1] STRAP_BIF_GEN3_EN_A

PS_1[2] TRAP_BIF_CLK_PM_EN

PS_1[3] N/A

PS_1[4] STRAP_TX_CFG_DRV_FULL_SWING

PS_1[5] STRAP_TX_DEEMPH_EN

Strap Name :

PS_2[1] N/A

PS_2[2] N/A

PS_2[3] STRAP_BIOS_ROM_EN

PS_2[4] STRAP_BIF_VGA_DIS

PS_2[5] N/A

Strap Name :

PS_3[1] BOARD_CONFIG[0] (Memory ID)

PS_3[2] BOARD_CONFIG[1] (Memory ID)

PS_3[3] BOARD_CONFIG[2] (Memory ID)

PS_3[4] AUD_PORT_CONN_PINSTRAP[1]

PS_3[5] AUD_PORT_CONN_PINSTRAP[2]

+3VGS+1.8VGS

1 2

EXO@

RV72 0_04 02_5%

@

RV87
10K_0402_5 %

1 2

RV88
10K_0402_5 %

DIS@

1 2

Boot-VID Code

SVD

SVC

0

0
0

1 1.0
0

1

1 0.8

1

Compal Electronics, Inc .

Compal Electronics, Inc .

Compal Electronics, Inc .

Title

Title

Title

EXO/M ESO_MSIC

EXO/M ESO_MSIC

EXO/M ESO_MSIC

Size Docu men t Numb er Re v

Size Docu men t Numb er Re v

Size Docu men t Numb er Re v

Custom

Custom

Custom

Date: She et o f

Date: She et o f

Date: She et o f

LA-D071P

LA-D071P

LA-D071P

5

Voltage
Selected (V)

1.1

0.9

RV12

EXO@

2K_0402_ 1%

SD03 42001 80

VRAM Type
Need reference
X76 Schematic

57 64Thursday, July 09, 2015

57 64Thursday, July 09, 2015

57 64Thursday, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

1

A A

+1.35VS_VGA TO +1.35V_MEM_GFX

JP9 DEFAULT SHORT

B B

C C

D D

2

3

+1.8VGS

Short_pad
RV27
RV30

+0.95VSDGPU

ShortPad

1 2

@

RV27 0_0603_5%

ShortPad

1 2

@

RV30 0_0603_5%

188mA (Display Port)

+DP_VDDR

1

1

1

CV35

CV27

CV261U_0402_6.3V4Z

DIS@

DIS@

DIS@

DIS@

2

1

CV30

DIS@

2

10U_060 3_6.3V6M

2

10U_060 3_6.3V6M

280mA

+DP_VDDC

1

CV331U_0402_6.3V4Z

2

DIS@

2

0.1U_04 02_10V6K

CV34

0.1U_04 02_10V6K

4

@

UV1E

No Use GPU Display Port outpud370mA (HDMI)

@

UV1G

AG15

DP_VDDR#AG15

AG16

DP_VDDR#AG16

AF16

DP_VDDR#AF16

AG17

DP_VDDR#AG17

AG18

DP_VDDR#AG18

AG19

DP_VDDR#AG19

AF14

DP_VDDR#AF14

AG20

DP_VDDC#A G20

AG21

DP_VDDC#A G21

AF22

DP_VDDC#A F22

AG22

DP_VDDC#A G22

AD14

DP_VDDC#A D14

1

AG14

DP_VSSR

AH14

DP_VSSR

AM14
AM16
AM18

AF23
AG23
AM20
AM22
AM24

AF19

AF20
AE14

AF17

DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR

DPAB_CALR

2160856030-A0_FCBGA631

2

DP POWER

U?

?

NC/DP POWER

NC#AE11
NC#AF11
NC#AE13
NC#AF13

NC#AG8

NC#AG10

NC#AF6
NC#AF7
NC#AF8
NC#AF9

NC#AE1
NC#AE3
NC#AG1
NC#AG6
NC#AH5

NC#AF10

NC#AG9

NC#AH8
NC#AM6
NC#AM8

NC#AG7

NC#AG11

NC#AE10

AE11
AF11
AE13
AF13
AG8
AG10

AF6
AF7
AF8
AF9

AE1
AE3
AG1
AG6
AH5
AF10
AG9
AH8
AM6
AM8
AG7
AG11

AE10

AA27
AB24

AB32
AC24
AC26
AC27
AD25
AD32

AE27

AF32
AG27

AH32

AA11

K28
K32
L27
M32
N25
N27
P25
P32
R27
T25
T32
U25
U27

V32
W25
W26
W27

Y25

Y32

N13

N16

N18

N21

R12

R15

R17

R20

T13

T16

T18

T21

U15

U17

U20

V13

V16

V18

Y10

Y15

Y17

Y20

R11

T11

M12

N11

V11

M6

P6
P9

T6

U9

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

2160856030-A0_FCBGA631

5

U?

A3

GND

A30

GND

AA13

GND

AA16

GND

AB10

GND

AB15

GND

AB6

GND

AC9

GND

AD6

GND

AD8

GND

AE7

GND

AG12

GND

AH10

GND

AH28

GND

B10

GND

B12

GND

B14

GND

B16

GND

B18

GND

B20

GND

B22

GND

B24

GND

B26

GND

B6

GND

B8

GND

C1

GND

C32

GND

E28

GND

F10

GND

F12

GND

F14

GND

F16

GND

F18

GND

F2

GND

F20

GND

F22

GND

F24

GND

F26

GND

F6

GND

GND

F8

GND

G10

GND

G27

GND

G31

GND

G8

GND

H14

GND

H17

GND

H2

GND

H20

GND

H6

GND

J27

GND

J31

GND

K11

GND

K2

GND

K22

GND

K6

GND

A32

VSS_MECH

AM1

VSS_MECH

AM32

VSS_MECH

?

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

4

Date: Sheet of

Compal Electronics, Inc.

EXO/MESO_Power/GND

EXO/MESO_Power/GND

EXO/MESO_Power/GND

LA-D071P

LA-D071P

LA-D071P

5

1.0(A00)

1.0(A00)

58 64Thursday, July 09, 2015

58 64Thursday, July 09, 2015

58 64Thursday, July 09, 2015

1.0(A00)

1

2

3

4

5

A A

VDDC

VDDCI

TBD

5 (1@) 10 (2@) 0

3.5A

1 3 0

10uF 1uF 0.1uF+0.95VSDGPU

PCIE_VDDC

BIF_VDDC

SPLL_VDDC

+1.35V_MEM_GFX

B B

VDDR1

2.5A

2 (1@) 5 (1@) 0

1.4A

100mA

10uF 2.2uF 0.1uF

3 5 51.5A

10uF+1.8VGS 0.1uF1uF

PCIE_PVDD

MPLL_PVDD

SPLL_PVDD

VDDR4

VDD_CT

100mA

130mA

75mA

(300mA)

13mA

1 1 1

+TSVDD 13mA 1 11

C C

+DP_VDDR

+DP_VDDC

VDDR3

25mA

0 2 (1@) 1

10 0

11 1

1 11

1 11

00 0

00 0

0 00

0.1uF1uF10uF+VGA_CORE

0.01uF

111

0.1uF1uF10uF+3VGS

@

AA20
AA21
AB20
AB21

AA17
AA18
AB17
AB18

H13
H16
H19

J10
J23
J24

K10
K23
K24

L11
L12
L13
L20
L21
L22

V12

Y12

U12

J9

K9

L8

H7

H8

J7

UV1D

MEM I/O

VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1

LEVEL
TRANSLATION

VDD_CT
VDD_CT
VDD_CT
VDD_CT

I/O

VDDR3
VDDR3
VDDR3
VDDR3

VDDR4
VDDR4
VDDR4

PLL

MPLL_PVDD

SPLL_PVDD

SPLL_VDDC

SPLL_PVSS

2160856030-A0_FCBGA631

+1.35V_MEM_GFX

1

1

DIS@

DIS@

CV1740.01U_0402_16V7K

CV1750.01U_0402_16V7K

2

2

1

1

CV651U_0402_6.3V4Z

CV661U_0402_6.3V4Z

DIS@

2

2

LV8

DIS@

1 2

CV1760.01U_0402_16V7K

1

DIS@

2

DIS@

1

1

1

CV43

CV44

DIS@

+1.8VGS

5

+1.8VGS

CV45

DIS@

DIS@

2

2

2

10U_060 3_6.3V6M

10U_060 3_6.3V6M

10U_060 3_6.3V6M

LV3

DIS@

1 2

BLM15BD121SN1 D_0402

CIS SYMBOL

LV6

DIS@

1 2

BLM15BD221SN1 D_2P

DIS@

DIS@

DIS@

CV402.2U_0402_6.3V6M

CV61

10U_060 3_6.3V6M

CV81

10U_060 3_6.3V6M

1

DIS@

2

1

2

1

2

DIS@

DIS@

CV472.2U_0402_6.3V6M

CV621U_0402_6.3V4Z

CV821U_0402_6.3V4Z

1

DIS@

2

1

2

1

2

DIS@

DIS@

CV482.2U_0402_6.3V6M

CV63

0.1U_04 02_10V6K

CV124

0.1U_04 02_10V6K

DIS@

1

1

CV412.2U_0402_6.3V6M

DIS@

2

2

1

+3VGS

2

1

2

+1.8VGS

1

1

CV49

CV422.2U_0402_6.3V6M

DIS@

DIS@

2

2

0.1U_04 02_10V6K

LV4

DIS@

1 2

BLM15BD121SN1 D_0402

LV7

DIS@

1 2

BLM15BD121SN1 D_0402

DIS@

CV50

0.1U_04 02_10V6K

1

DIS@

2

CV84

10U_060 3_6.3V6M

DIS@

1

1

1

CV53

CV51

CV52

DIS@

DIS@

DIS@

2

2

2

0.1U_04 02_10V6K

0.1U_04 02_10V6K

0.1U_04 02_10V6K

1

1

CV641U_0402_6.3V4Z

CV123

DIS@

DIS@

DIS@

2

2

10U_060 3_6.3V6M

1

1

1

CV86

CV851U_0402_6.3V4Z

DIS@

+0.95VSDGPU

2

2

2

BLM15BD121SN1 D_0402

0.1U_04 02_10V6K

1

DIS@

CV1770.01U_0402_16V7K

2

1

CV91

DIS@

2

1

CV1780.01U_0402_16V7K

2

1

CV921U_0402_6.3V4Z

DIS@

2

1.5A

13mA

+VDD_CT

25mA

+VDDR3

130mA

+MPLL_PVDD

75mA

+SPLL_PVDD

100mA

+SPLL_VDDC

1

CV93

2

U?

PCIE

PCIE_PVDD

NC#AB23
NC#AC23
NC#AD24
NC#AE24
NC#AE25
NC#AE26
NC#AF25
NC#AG26

PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC

CORE

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

POWER

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

BIF_VDDC
BIF_VDDC

ISOLATED

CORE I/O

VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI

?

AM30

AB23
AC23
AD24
AE24
AE25
AE26
AF25
AG26

L23
L24
L25
L26
M22
N22
N23
N24
R22
T22
U22
V22

AA15
N15
N17
R13
R16
R18
Y21
T12
T15
T17
T20
U13
U16
U18
V21
V15
V17
V20
Y13
Y16
Y18
AA12
M11
N12
U11

R21
U21

M13
M15
M16
M17
M18
M20
M21
N20

100mA

+PCIE_PVDD

DIS@

2.5A

DIS@

TBD

DIS@

1.4A

+BIF_VDDC

CV38

10U_060 3_6.3V6M

CV54

10U_060 3_6.3V6M

CV67

10U_060 3_6.3V6M

1

2

1

2

1

DIS@

2

DIS@

+PCIE_VDDC

CV55

DIS@

10U_060 3_6.3V6M

CV68

DIS@

10U_060 3_6.3V6M

+1.8VGS

1

1

CV461U_0402_6.3V4Z

DIS@

2

1

CV561U_0402_6.3V4Z

DIS@

2

1

1

CV69

DIS@

2

2

10U_060 3_6.3V6M

1

CV39

DIS@

CV1790.01U_0402_16V7K

2

2

0.1U_04 02_10V6K

ShortPad

0_0603_5%

1

CV571U_0402_6.3V4Z

DIS@

DIS@

2

2

1

CV70

DIS@

2

10U_060 3_6.3V6M

DIS@

DIS@

CV601U_0402_6.3V4Z

CV591U_0402_6.3V4Z

CV581U_0402_6.3V4Z

DIS@

DIS@

DIS@

2

2

2

1

1

1

CV711U_0402_6.3V4Z

CV731U_0402_6.3V4Z

CV721U_0402_6.3V4Z

DIS@

DIS@

DIS@

2

2

2

1

1

1

CV1041U_0402_6.3V4Z

CV1001U_0402_6.3V4Z

CV1011U_0402_6.3V4Z

DIS@

DIS@

DIS@

2

2

2

1

1

1

CV1101U_0402_6.3V4Z

CV1111U_0402_6.3V4Z

CV1141U_0402_6.3V4Z

DIS@

DIS@

DIS@

2

2

2

1

1

1

1

1 2

1

1

CV1211U_0402_6.3V4Z

CV1201U_0402_6.3V4Z

DIS@

2

2

1

1

1

CV751U_0402_6.3V4Z

CV761U_0402_6.3V4Z

CV741U_0402_6.3V4Z

DIS@

DIS@

2

2

2

1

1

1

CV1091U_0402_6.3V4Z

CV1061U_0402_6.3V4Z

CV1031U_0402_6.3V4Z

DIS@

DIS@

DIS@

2

2

2

1

1

1

CV1131U_0402_6.3V4Z

CV1181U_0402_6.3V4Z

CV1171U_0402_6.3V4Z

DIS@

DIS@

DIS@

2

2

2

RC364

@

DIS@ => @
Jason 6/25

1

CV771U_0402_6.3V4Z

DIS@

2

1

CV1021U_0402_6.3V4Z

DIS@

2

1

CV1121U_0402_6.3V4Z

DIS@

2

DIS@

1

CV1071U_0402_6.3V4Z

2

1

CV1161U_0402_6.3V4Z

2

+0.95VSDGPU

1

CV781U_0402_6.3V4Z

DIS@

2

DIS@

DIS@

1

CV1081U_0402_6.3V4Z

2

1

CV1191U_0402_6.3V4Z

2

+VGA_CORE

1

CV791U_0402_6.3V4Z

DIS@

2

DIS@

DIS@

1

CV801U_0402_6.3V4Z

2

1

CV1051U_0402_6.3V4Z

2

1

CV1151U_0402_6.3V4Z

2

RV31 0_0805_5%

2

2

CV1711U_0402_6.3V4Z

CV1681U_0402_6.3V4Z

DIS@

DIS@

1

1

Compal Secret Data

Compal Secret Data

Compal Secret Data

ShortPad

1 2

0.1U_04 02_10V6K

10U_060 3_6.3V6M

D D

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+BIF_VDDC

1

CV122

DIS@

2

10U_060 3_6.3V6M

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

@

Dec iphered Date

Dec iphered Date

Dec iphered Date

4

+0.95VSDGPU

DIS@

CV88

10U_060 3_6.3V6M

3.5A (DDR3)

1

CV891U_0402_6.3V4Z

DIS@

2

1

1

1

CV901U_0402_6.3V4Z

CV871U_0402_6.3V4Z

DIS@

DIS@

2

2

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

EXO/MESO_Power

EXO/MESO_Power

EXO/MESO_Power

LA-D071P

LA-D071P

LA-D071P

5

+VGA_CORE

59 64Thursday, July 09, 2015

59 64Thursday, July 09, 2015

59 64Thursday, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

1

2

3

4

5

DIS@

DIS@

CV96

M_DA[63..0]

M_MA[15..0]

M_DQM[7..0]

M_DQS[7..0]

M_DQS#[7..0 ]

40.2_0402_1%

DIS@

100_0402_1%

DIS@

RV37
10_0402_1%

1

2

+1.35V_MEM_GFX+1.35V_MEM_GFX

12

RV32

12

RV35

DIS@

12

RV38

5.1K_040 2_1%

DIS@

+MVREFSA

1

CV95
1U_0402_6.3V4Z

2

DIS@

DRAM_RST_G

12

1

@

CV97

68P_040 2_50V8J

2

RV39

RV40 51.1_0402_1%

@

1 2
1 2

RV41 51.1_0402_1%

@

Route 50ohms single-en ded/100ohm diff and keep short
debug only, for clock ob servation,if not need, DNI.

CV98 0.1U_0402_16V4Z
CV99

1 2

DIS@

@

1 2
1 2

@

M_DA0
M_DA1
M_DA2
M_DA3
M_DA4
M_DA5
M_DA6
M_DA7
M_DA8
M_DA9
M_DA10
M_DA11
M_DA12
M_DA13
M_DA14
M_DA15
M_DA16
M_DA17
M_DA18
M_DA19
M_DA20
M_DA21
M_DA22
M_DA23
M_DA24
M_DA25
M_DA26
M_DA27
M_DA28
M_DA29
M_DA30
M_DA31
M_DA32
M_DA33
M_DA34
M_DA35
M_DA36
M_DA37
M_DA38
M_DA39
M_DA40
M_DA41
M_DA42
M_DA43
M_DA44
M_DA45
M_DA46
M_DA47
M_DA48
M_DA49
M_DA50
M_DA51
M_DA52
M_DA53
M_DA54
M_DA55
M_DA56
M_DA57
M_DA58
M_DA59
M_DA60
M_DA61
M_DA62
M_DA63

+MVREFDA
+MVREFSA

120_04 02_1%

DRAM_RST_G

0.1U_0402_16V4Z

K27

J29
H30
H32
G29

F28

F32

F30
C30

F27
A28
C28
E27
G26
D26

F25
A25
C25
E25
D24
E23

F23
D22

F21
E21
D20

F19
A19
D18

F17
A17
C17
E17
D16

F15
A15
D14

F13
A13
C13
E11
A11
C11

F11

A9
C9
F9
D8
E7
A7
C7
F7
A5
E5
C3
E1
G7
G6
G1
G3

J6
J1
J3
J5

K26

J26

J25
K25

L10

K8

L7

@

UV1C

DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31
DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8
DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31

MVREFDA
MVREFSA

NC#J25
MEM_CALRP0

DRAM_RST

CLKTESTA
CLKTESTB

2160856030-A0_FCBGA631

U?

GDDR5/DDR3GDDR5/DDR3

MAA0_0/MAA_0
MAA0_1/MAA_1
MAA0_2/MAA_2
MAA0_3/MAA_3
MAA0_4/MAA_4
MAA0_5/MAA_5
MAA0_6/MAA_6

MAA0_7/MAA_7
MAA0_8/MAA_13
MAA0_9/MAA_15

MAA1_0/MAA_8

MAA1_1/MAA_9
MAA1_2/MAA_10
MAA1_3/MAA_11
MAA1_4/MAA_12

MAA1_5/MAA_BA2
MAA1_6/MAA_BA0
MAA1_7/MAA_BA1

MAA1_8/MAA_14

MAA1_9/RSVD

WCKA0_0/DQMA0_0

WCKA0B_0/DQMA0_1

WCKA0_1/DQMA0_2

WCKA0B_1/DQMA0_3

WCKA1_0/DQMA1_0

MEMORY INTERFACE

WCKA1B_0/DQMA1_1

WCKA1_1/DQMA1_2

WCKA1B_1/DQMA1_3

EDCA0_0/QSA0_0
EDCA0_1/QSA0_1
EDCA0_2/QSA0_2
EDCA0_3/QSA0_3
EDCA1_0/QSA1_0
EDCA1_1/QSA1_1
EDCA1_2/QSA1_2
EDCA1_3/QSA1_3

DDBIA0_0/QSA0_0B
DDBIA0_1/QSA0_1B
DDBIA0_2/QSA0_2B
DDBIA0_3/QSA0_3B
DDBIA1_0/QSA1_0B
DDBIA1_1/QSA1_1B
DDBIA1_2/QSA1_2B
DDBIA1_3/QSA1_3B

ADBIA0/ODTA0
ADBIA1/ODTA1

CLKA0B

CLKA1B

RASA0B
RASA1B

CASA0B
CASA1B

CSA0B_0
CSA0B_1

CSA1B_0
CSA1B_1

?

CLKA0

CLKA1

CKEA0
CKEA1

WEA0B
WEA1B

K17

M_MA0

J20

M_MA1

H23

M_MA2

G23

M_MA3

G24

M_MA4

H24

M_MA5

J19

M_MA6

K19

M_MA7

G20

M_MA13

L17

M_MA15

J14

M_MA8

K14

M_MA9

J11

M_MA10

J13

M_MA11

H11

M_MA12

G11

M_BA2

J16

M_BA0

L15

M_BA1

G14

M_MA14

L16

E32

M_DQM0

E30

M_DQM1

A21

M_DQM2

C21

M_DQM3

E13

M_DQM4

D12

M_DQM5

E3

M_DQM6

F4

M_DQM7

H28

M_DQS0

C27

M_DQS1

A23

M_DQS2

E19

M_DQS3

E15

M_DQS4

D10

M_DQS5

D6

M_DQS6

G5

M_DQS7

H27

M_DQS#0

A27

M_DQS#1

C23

M_DQS#2

C19

M_DQS#3

C15

M_DQS#4

E9

M_DQS#5

C5

M_DQS#6

H4

M_DQS#7

L18

VRAM_ODT0

K16

VRAM_ODT1

H26

M_CLK0

H25

M_CLK#0

G9

M_CLK1

H9

M_CLK#1

G22

M_RAS#0

G17

M_RAS#1

G19

M_CAS#0

G16

M_CAS#1

H22

M_CS0B#0

J22

M_CS0B#1

G13

M_CS1B#0

K13

M_CS1B#1

K20

M_CKE0

J17

M_CKE1

G25

M_WE#0

H10

M_WE#1

M_BA2 <61,62>
M_BA0 <61,62>
M_BA1 <61,62>

VRAM_ODT0 <61,62>
VRAM_ODT1 <61,62>

M_CLK0 <61,62>
M_CLK#0 <61,62>

M_CLK1 <61,62>
M_CLK#1 <61,62>

M_RAS#0 <61,62>
M_RAS#1 <61,62>

M_CAS#0 <61,62>
M_CAS#1 <61,62>

M_CS0B#0 <61>
M_CS0B#1 <62>

M_CS1B#0 <61>
M_CS1B#1 <62>

M_CKE0 <61,62>
M_CKE1 <61,62>

M_WE#0 <61,62>
M_WE#1 <61,62>

RV136 100_0402_1%DIS@1 2

1 2

RV138 100_0402_1%DIS@
RV140 100_0402_1%DIS@1 2

1 2

RV142 100_0402_1%DIS@

1 2

RV144 100_0402_1%DIS@
RV199 100_0402_1%DIS@1 2

1 2

RV200 100_0402_1%DIS@
RV205 100_0402_1%DIS@1 2

1 2

RV206 100_0402_1%DIS@

1 2

RV207 100_0402_1%DIS@
RV213 100_0402_1%DIS@1 2

1 2

RV214 100_0402_1%DIS@
RV215 100_0402_1%DIS@1 2

1 2

RV216 100_0402_1%DIS@

1 2

RV221 100_0402_1%DIS@
RV222 100_0402_1%DIS@1 2

1 2

RV223 100_0402_1%DIS@

1 2

RV224 100_0402_1%DIS@
RV225 100_0402_1%DIS@1 2

1 2

RV179 100_0201_1%DIS@

1 2

RV185 100_0201_1%DIS@

RV187 100_0201_1%DIS@1 2

1 2

RV188 100_0201_1%DIS@

1 2

RV191 100_0201_1%DIS@
RV192 100_0201_1%DIS@1 2

RV208 100_0201_1%DIS@1 2

1 2

RV210 100_0201_1%DIS@

1 2

RV217 100_0201_1%DIS@
RV218 100_0201_1%DIS@1 2

1 2

RV195 100_0201_1%DIS@

1 2

RV196 100_0201_1%DIS@

RV201 100_0201_1%DIS@1 2

1 2

RV202 100_0201_1%DIS@

M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_MA13
M_MA14
M_MA15

M_BA0
M_BA1
M_BA2

VRAM_ODT0
VRAM_ODT1

M_RAS#0
M_RAS#1

M_CAS#0
M_CAS#1

M_CS0B#0
M_CS1B#0

M_CS0B#1
M_CS1B#1

M_CKE0
M_CKE1

M_WE#0
M_WE#1

1 2

1 2
1 2

1 2

1 2
1 2

1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2

1 2

1 2

1 2

1 2
1 2

1 2

+1.35V_MEM_GFX

RV137100_0402_1% DIS@1 2
RV139100_0402_1% DIS@
RV141100_0402_1% DIS@1 2
RV143100_0402_1% DIS@
RV145100_0402_1% DIS@
RV150100_0402_1% DIS@1 2
RV166100_0402_1% DIS@
RV167100_0402_1% DIS@1 2
RV168100_0402_1% DIS@
RV169100_0402_1% DIS@
RV170100_0402_1% DIS@1 2
RV171100_0402_1% DIS@
RV172100_0402_1% DIS@1 2
RV173100_0402_1% DIS@
RV174100_0402_1% DIS@
RV175100_0402_1% DIS@1 2

RV176100_0402_1% DIS@
RV177100_0402_1% DIS@
RV178100_0402_1% DIS@1 2

RV184100_0201_1% DIS@
RV186100_0201_1% DIS@

RV189100_0201_1% DIS@1 2
RV190100_0201_1% DIS@

RV194100_0201_1% DIS@
RV193100_0201_1% DIS@1 2

RV212100_0201_1% DIS@1 2
RV211100_0201_1% DIS@

RV219100_0201_1% DIS@
RV220100_0201_1% DIS@1 2

RV198100_0201_1% DIS@
RV197100_0201_1% DIS@

RV203100_0201_1% DIS@1 2
RV204100_0201_1% DIS@

M_DA[63..0]<61,62>

M_MA[15..0]<61,62>

M_DQM[7..0]<61,62>

A A

M_DQS[7..0]<61,62>

M_DQS#[7..0]<61,62>

12

RV33

40.2_0402_1%

DIS@

100_0402_1%

DIS@

B B

DRAM_RST<61,62>

C C

+MVREFDA

12

1

CV94

RV34

1U_0402_6.3V4Z

2

DIS@

RV36

49.9_04 02_1%

1 2

120P_0402_50V8J

Place close to GPU (within 25mm)
and place comp onment close to each other

D D

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

4

Date: Sheet of

Compal Electronics, Inc.

EXO/MESO_MEM

EXO/MESO_MEM

EXO/MESO_MEM

LA-D071P

LA-D071P

LA-D071P

5

1.0(A00)

1.0(A00)

60 64Thursday, July 09, 2015

60 64Thursday, July 09, 2015

60 64Thursday, July 09, 2015

1.0(A00)

1

1 2

80.6_0402_1%

DIS@

1 2

80.6_0402_1%

DIS@

M_DA[63..0]

M_MA[15..0]

M_DQM[7..0]

M_DQS[7..0]

M_DQS#[7..0]

VREFCA_UV7

M_DA[63..0]<60,62>

M_MA[15..0]<60,62>

M_DQM[7..0]< 60,62>

M_DQS[7..0]<60,62>

M_DQS#[7..0]<60,62>

A A

B B

VREFCA_UV7<62>

Reduce Vref Circuit for Spacing saving.

M_CLK0

RV109

M_CLK#0

RV105

M_BA0<60,62>
M_BA1<60,62>
M_BA2<60,62>

M_CLK0< 60,62>
M_CLK#0<60,62>
M_CKE0<60,62>

VRAM_ODT0<60,62>
M_CS0B#0<60>
M_RAS#0<60,62>
M_CAS#0<60,62>
M_WE#0<60,62>

DRAM_RST<60,62>

1

CV206
.01U_0402_16V7-K

DIS@

2

Reduce Vref Circuit
for Spacing saving.

RV102

243_0402_1%

DIS@

VREFCA_UV3
VREFCA_UV7

M_DQS2
M_DQS0

M_DQM2
M_DQM0

M_DQS#2
M_DQS#0

12

UV15

@

M8

VREFCA

H1

VREFDQ

N3

M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_MA13
M_MA14 M_MA14
M_MA15

M_BA0
M_BA1
M_BA2

M_CLK0
M_CLK#0
M_CKE0

VRAM_ODT0
M_CS0B#0
M_RAS#0
M_CAS#0
M_WE#0

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

H5TC4G63AFR-11C_FBGA96

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1
B9
D1
D8
E2
E8
F9
G1
G9

2

UV12

@

M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_MA13

M_MA15

M_BA0
M_BA1
M_BA2

M_CLK0
M_CLK#0
M_CKE0

VRAM_ODT0
M_CS0B#0
M_RAS#0
M_CAS#0
M_WE#0

M_DQS1
M_DQS3

M_DQM1
M_DQM3

M_DQS#1
M_DQS#3

DRAM_RST

12

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

H5TC4G63AFR-11C_FBGA96

M_DA19
M_DA16
M_DA23
M_DA17
M_DA18
M_DA21
M_DA20
M_DA22

M_DA5
M_DA3
M_DA7
M_DA0
M_DA4
M_DA1
M_DA6
M_DA2

+1.35V_MEM_GFX

+1.35V_MEM_GFX +1.35V_MEM_GFX

RV103

243_0402_1%

DIS@

VREFCA_UV4
VREFDQ_UV4

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

E3

M_DA10

F7

M_DA12

F2

M_DA8

F8

M_DA13

H3

M_DA11

H8

M_DA14

G2

M_DA9

H7

M_DA15

D7

M_DA28

C3

M_DA27

C8

M_DA31

C2

M_DA24

A7

M_DA29

A2

M_DA25

B8

M_DA30

A3

M_DA26

+1.35V_MEM_GFX

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1
B9
D1
D8
E2
E8
F9
G1
G9

M_CLK1

M_CLK#1

3

UV13

M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_MA13
M_MA14
M_MA15

M_BA0
M_BA1
M_BA2

M_CLK1
M_CLK#1
M_CKE1

VRAM_ODT1
M_CS1B#0
M_RAS#1
M_CAS#1
M_WE#1

M_DQS6
M_DQS7

M_DQM6
M_DQM7

M_DQS#6
M_DQS#7

DRAM_RST

12

M8

H1

N3
P7
P3
N2
P8

P2
R8
R2

T8
R3

L7
R7

N7

T3

T7
M7

M2

N8
M3

J7

K7

K9

K1

L2

J3

K3

L3

F3
C7

E7
D3

G3

B7

T2

L8

J1

L1

J9

L9

H5TC4G63AFR-11C_FBGA96

RV98

RV99

1 2

80.6_0402_1%

DIS@

1 2

80.6_0402_1%

DIS@

M_CLK1< 60,62>
M_CLK#1<60,62>
M_CKE1<60,62>

VRAM_ODT1<60,62>
M_CS1B#0<60>
M_RAS#1<60,62>
M_CAS#1<60,62>
M_WE#1<60,62>

1

CV247
.01U_0402_16V7-K

DIS@

2

RV108

243_0402_1%

DIS@

VREFCA_UV5
VREFDQ_UV5

@

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL
SDRAM DDR3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

4

UV14

M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_MA13
M_MA14
M_MA15

M_BA0
M_BA1
M_BA2

M_CLK1
M_CLK#1
M_CKE1

VRAM_ODT1
M_CS1B#0
M_RAS#1
M_CAS#1
M_WE#1

M_DQS5
M_DQS4

M_DQM5
M_DQM4

M_DQS#5
M_DQS#4

DRAM_RST

12

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

H5TC4G63AFR-11C_FBGA96

E3

M_DA52

F7

M_DA54

F2

M_DA48

F8

M_DA51

H3

M_DA50

H8

M_DA53

G2

M_DA49

H7

M_DA55

D7

M_DA62

C3

M_DA56

C8

M_DA63

C2

M_DA59

A7

M_DA61

A2

M_DA58

B8

M_DA60

A3

M_DA57

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.35V_MEM_GFX

+1.35V_MEM_GFX

RV104

243_0402_1%

DIS@

VREFCA_UV6
VREFDQ_UV6

@

96-BALL
SDRAM DDR3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

5

E3

M_DA42

F7

M_DA47

F2

M_DA41

F8

M_DA45

H3

M_DA40

H8

M_DA46

G2

M_DA43

H7

M_DA44

D7

M_DA38

C3

M_DA35

C8

M_DA37

C2

M_DA34

A7

M_DA36

A2

M_DA32

B8

M_DA39

A3

M_DA33

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.35V_MEM_GFX

+1.35V_MEM_GFX

C C

D D

+1.35V_MEM_GFX

12

RV100

4.99K_0402_1%

DIS@

12

RV106

4.99K_0402_1%

DIS@

Reduce Vref Circuit for Spacing saving.
VREFDQ_UV3 Share with VREFCA_UV7

VREFCA_UV3

1

CV209
.1U_0402_16V7K

DIS@

2

+1.35V_MEM_GFX +1.35V_MEM_GFX

12

RV101

4.99K_0402_1%

DIS@

VREFCA_UV4

12

1

RV107

4.99K_0402_1%

DIS@

+1.35V_MEM_GFX

RV245

4.99K_0402_1%

DIS@

RV243

4.99K_0402_1%

DIS@

1

CV216
.1U_0402_16V7K

DIS@

2

12

VREFDQ_UV4

12

1

CV263
.1U_0402_16V7K

DIS@

2

4.99K_0402_1%

DIS@

4.99K_0402_1%

DIS@

4.99K_0402_1%

DIS@

4.99K_0402_1%

DIS@

12

RV239

12

RV237

+1.35V_MEM_GFX

12

RV246

12

RV235

2

VREFCA_UV5

1

CV237
.1U_0402_16V7K

DIS@

2

VREFDQ_UV5

1

CV236
.1U_0402_16V7K

DIS@

2

4.99K_0402_1%

DIS@

4.99K_0402_1%

DIS@

4.99K_0402_1%

DIS@

4.99K_0402_1%

DIS@

+1.35V_MEM_GFX

12

RV238

12

RV244

+1.35V_MEM_GFX

12

RV241

12

RV242

VREFCA_UV6

1

CV242
.1U_0402_16V7K

DIS@

2

VREFDQ_UV6

1

CV252
.1U_0402_16V7K

DIS@

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

+1.35V_MEM_GFX +1.35V_MEM_GFX

.1U_0402 _16V7K

DIS@

+1.35V_MEM_GFX

1U_0402_6.3V6K

DIS@

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

CV246

CV260

CV210

1

1

1

DIS@

DIS@

2

2

2

CV257

CV217

1U_0402_6.3V6K

CV204

1U_0402_6.3V6K

1

1

1

DIS@

DIS@

2

2

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

4

.1U_0402 _16V7K

CV262

1

DIS@

DIS@

2

1U_0402_6.3V6K

CV223

1U_0402_6.3V6K

1

DIS@

DIS@

2

.1U_0402 _16V7K

.1U_0402 _16V7K

.1U_0402 _16V7K

.1U_0402 _16V7K

.1U_0402 _16V7K

.1U_0402 _16V7K

CV254

CV245

1

1

DIS@

DIS@

2

2

1U_0402_ 6.3V6K

CV205

CV241

1U_0402_6.3V6K

1

1

DIS@

DIS@

2

2

.1U_0402 _16V7K

.1U_0402 _16V7K

.1U_0402 _16V7K

CV259

CV207

CV243

CV244

CV248

1

1

2

1

2

1

1

DIS@

DIS@

DIS@

2

2

2

1U_0402_ 6.3V6K

1U_0402_ 6.3V6K

10U_0603 _6.3V6M

1U_0402_ 6.3V6K

CV250

CV253

CV213

1

1

1

DIS@

DIS@

DIS@

2

2

2

.1U_0402 _16V7K

.1U_0402 _16V7K

.1U_0402 _16V7K

CV251

CV211

CV214

CV165

1

1

1

1

DIS@

DIS@

DIS@

DIS@

2

2

2

2

CV215

1U_0402_6.3V6K

CV222

1U_0402_6.3V6K

CV261

1U_0402_6.3V6K

CV256

1

1

1

1

DIS@

DIS@

DIS@

DIS@

2

2

2

2

Title

Title

Title

VRAM A Lower

VRAM A Lower

VRAM A Lower

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

10U_0603 _6.3V6M

10U_0603 _6.3V6M

CV240

CV208

1

1

DIS@

DIS@

2

2

LA-D071P

LA-D071P

LA-D071P

5

10U_0603 _6.3V6M

CV258

1

DIS@

2

.1U_0402 _16V7K

.1U_0402 _16V7K

CV238

CV239

1

1

DIS@

DIS@

2

2

CV212

1U_0402_6.3V6K

CV221

1U_0402_6.3V6K

1

1

DIS@

DIS@

2

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

10U_0603 _6.3V6M

CV249

1

DIS@

2

1.0(A00)

1.0(A00)

61 64Thursday, July 09, 2015

61 64Thursday, July 09, 2015

61 64Thursday, July 09, 2015

1.0(A00)

1

M_DA[63..0]<60,61>

M_MA[15..0]<60,61>

M_DQM[7..0]< 60,61>

M_DQS[7..0]<60,61>

M_DQS#[7..0]<60,61>

A A

B B

C C

D D

VREFCA_UV7<61>

Reduce Vref Circuit for Spacing saving.

M_CLK0

RV95

M_CLK#0

RV111

+1.35V_MEM_GFX

RV96

4.99K_0402_1%

DIS@

RV115

4.99K_0402_1%

DIS@

+1.35V_MEM_GFX

RV252

4.99K_0402_1%

V_4G@

RV249

4.99K_0402_1%

V_4G@

M_DA[63..0]

M_MA[15..0]

M_DQM[7..0]

M_DQS[7..0]

M_DQS#[7..0]

VREFCA_UV7

1 2

80.6_0402_1%

V_4G@

1 2

80.6_0402_1%

V_4G@

12

This circuit is share with 3pcs VRAM.
Please keep stuff when DIS@.

VREFCA_UV7

12

1

CV298

.1U_0402_16V7K

DIS@

2

12

VREFDQ_UV7

12

1

CV265

.1U_0402_16V7K

V_4G@

2

1

2

1

CV271
.01U_0402_16V7-K

V_4G@

4.99K_0402_1%

4.99K_0402_1%

M_BA0<60,61>
M_BA1<60,61>
M_BA2<60,61>

M_CLK0< 60,61>
M_CLK#0<60,61>
M_CKE0<60,61>

VRAM_ODT0<60,61>
M_CS0B#1<60>
M_RAS#0<60,61>
M_CAS#0<60,61>
M_WE#0<60,61>

DRAM_RST<60,61>

243_0402_1%

12

12

M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_MA13
M_MA14
M_MA15

M_BA0
M_BA1
M_BA2

M_CLK0
M_CLK#0
M_CKE0

VRAM_ODT0
M_CS0B#1
M_RAS#0
M_CAS#0
M_WE#0

M_DQS2
M_DQS0

M_DQM2
M_DQM0

M_DQS#2
M_DQS#0

12

M8

H1

N3
P7
P3
N2
P8

P2
R8
R2

T8
R3

L7
R7

N7

T3

T7
M7

M2

N8
M3

J7

K7

K9

K1

L2

J3

K3

L3

F3
C7

E7
D3

G3

B7

T2

L8

J1

L1

J9

L9

VREFCA_UV8

1

CV300

.1U_0402_16V7K

V_4G@

2

VREFCA_UV7
VREFDQ_UV7

RV118

V_4G@

+1.35V_MEM_GFX

RV113

V_4G@

RV97

V_4G@

Reduce Vref Circuit for Spacing saving.
VREFDQ_UV8 Share with VREFCA_UV7

UV19

@

DQL0

VREFCA

DQL1

VREFDQ

DQL2
DQL3

A0

DQL4

A1
A2

DQL5

A3

DQL6

A4

DQL7
A5
A6
A7

DQU0
A8

DQU1
A9

DQU2
A10/AP

DQU3
A11

DQU4
A12

DQU5

DQU6

A13

DQU7

A14
A15/BA3

BA0

VDD

BA1

VDD
VDD

BA2

VDD
VDD
VDD

CK

VDD

CK

VDD

CKE/CKE0

VDD

VDDQ

ODT/ODT0
CS/CS0

VDDQ

RAS

VDDQ

CAS

VDDQ

WE

VDDQ
VDDQ
VDDQ

DQSL

VDDQ

DQSU

VDDQ

VSS

DML

VSS

DMU

VSS
VSS

DQSL

VSS

DQSU

VSS
VSS
VSS
VSS

RESET

VSS
VSS

ZQ/ZQ0

VSS

NC/ODT1

VSSQ
NC/CS1

VSSQ

VSSQ

NC/CE1

VSSQ

NCZQ1

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

96-BALL
SDRAM DDR3

H5TC4G63AFR-11C_FBGA96

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.35V_MEM_GFX

RV234

V_4G@

RV251

V_4G@

+1.35V_MEM_GFX

RV256

V_4G@

RV253

V_4G@

2

Reduce Vref Circuit

M_DA16
M_DA19
M_DA17
M_DA23
M_DA22
M_DA20
M_DA21
M_DA18

M_DA3
M_DA5
M_DA0
M_DA7
M_DA2
M_DA6
M_DA1
M_DA4

+1.35V_MEM_GFX +1.35V_MEM_GFX

+1.35V_MEM_GFX

for Spacing saving.

VREFCA_UV8
VREFCA_UV7

12

RV110

243_0402_1%

V_4G@

12

4.99K_0402_1%

VREFCA_UV9 VREFCA_UV10

12

1

CV264

.1U_0402_16V7K

V_4G@

2

4.99K_0402_1%

12

4.99K_0402_1%

VREFDQ_UV9

12

1

CV293

.1U_0402_16V7K

V_4G@

2

2

4.99K_0402_1%

M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_MA13
M_MA14
M_MA15

M_BA0
M_BA1
M_BA2

M_CLK0
M_CLK#0
M_CKE0

VRAM_ODT0
M_CS0B#1
M_RAS#0
M_CAS#0
M_WE#0

M_DQS1
M_DQS3

M_DQM1
M_DQM3

M_DQS#1
M_DQS#3

DRAM_RST

+1.35V_MEM_GFX

RV258

V_4G@

RV248

V_4G@

+1.35V_MEM_GFX

RV247

V_4G@

RV259

V_4G@

UV17

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

H5TC4G63AFR-11C_FBGA96

12

12

1

2

12

VREFDQ_UV10

12

1

2

@

CV275

.1U_0402_16V7K

V_4G@

CV273

.1U_0402_16V7K

V_4G@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1
B9
D1
D8
E2
E8
F9
G1
G9

M_DA12
M_DA10
M_DA13
M_DA8
M_DA14
M_DA11
M_DA15
M_DA9

M_DA27
M_DA28
M_DA24
M_DA31
M_DA26
M_DA30
M_DA25
M_DA29

+1.35V_MEM_GFX

+1.35V_MEM_GFX

M_CLK1

M_CLK#1

3

UV16

VREFCA_UV9
VREFDQ_UV9

M_CLK1< 60,61>
M_CLK#1<60,61>
M_CKE1<60,61>

VRAM_ODT1<60,61>
M_CS1B#1<60>
M_RAS#1<60,61>
M_CAS#1<60,61>
M_WE#1<60,61>

RV117

243_0402_1%

V_4G@

1 2

RV116

80.6_0402_1%

V_4G@

1 2

RV112

80.6_0402_1%

V_4G@

3

1

CV279
.01U_0402_16V7-K

V_4G@

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

M8

H1

N3
P7

M_MA1

P3

M_MA2

N2

M_MA3

P8

M_MA4

P2

M_MA5

R8

M_MA6

R2

M_MA7

T8

M_MA8

R3

M_MA9

L7

M_MA10

R7

M_MA11

N7

M_MA12

T3

M_MA13

T7

M_MA14

M7

M_MA15

M2

M_BA0

N8

M_BA1

M3

M_BA2

J7

M_CLK1

K7

M_CLK#1

K9

M_CKE1

K1

VRAM_ODT1

L2

M_CS1B#1

J3

M_RAS#1

K3

M_CAS#1

L3

M_WE#1

F3

M_DQS6

C7

M_DQS7

E7

M_DQM6

D3

M_DQM7

G3

M_DQS#6

B7

M_DQS#7

T2

DRAM_RST

L8

12

J1
L1
J9
L9

H5TC4G63AFR-11C_FBGA96

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

@

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL
SDRAM DDR3

+1.35V_MEM_GFX

.1U_0402 _16V7K

.1U_0402 _16V7K

CV288

CV281

1

1

2

2

V_4G@

V_4G@

+1.35V_MEM_GFX

CV295

1U_0402_6.3V6K

CV299

1U_0402_6.3V6K

1

1

2

2

V_4G@

V_4G@

4

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1

VDDQ

A8

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H2

VDDQ

H9

VDDQ

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

.1U_0402 _16V7K

.1U_0402 _16V7K

.1U_0402 _16V7K

CV285

CV229

CV274

1

1

1

2

2

2

V_4G@

V_4G@

V_4G@

CV277

1U_0402_6.3V6K

CV270

1U_0402_6.3V6K

CV227

1U_0402_6.3V6K

1

1

1

2

2

2

V_4G@

V_4G@

V_4G@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

4

.1U_0402 _16V7K

1U_0402_6.3V6K

CV224

V_4G@

CV283

V_4G@

M_DA54
M_DA52
M_DA51
M_DA48
M_DA55
M_DA49
M_DA53
M_DA50

M_DA56
M_DA62
M_DA59
M_DA63
M_DA57
M_DA60
M_DA58
M_DA61

1

2

1

2

.1U_0402 _16V7K

V_4G@

1U_0402_ 6.3V6K

V_4G@

+1.35V_MEM_GFX

+1.35V_MEM_GFX

.1U_0402 _16V7K

CV278

CV294

1

1

2

2

V_4G@

CV289

CV291

1U_0402_ 6.3V6K

1

1

2

2

V_4G@

.1U_0402 _16V7K

1U_0402_ 6.3V6K

CV269

V_4G@

CV290

V_4G@

5

UV18

@

VREFCA_UV10
VREFDQ_UV10

RV114

243_0402_1%

V_4G@

.1U_0402 _16V7K

.1U_0402 _16V7K

.1U_0402 _16V7K

CV302

CV287

CV266

1

1

1

2

2

2

V_4G@

V_4G@

V_4G@

CV284

CV297

CV303

1U_0402_6.3V6K

10U_0603 _6.3V6M

1U_0402_ 6.3V6K

1

1

1

2

2

2

V_4G@

V_4G@

V_4G@

M8

VREFCA

H1

VREFDQ

N3

M_MA0M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_MA13
M_MA14
M_MA15

M_BA0
M_BA1
M_BA2

M_CLK1
M_CLK#1
M_CKE1

VRAM_ODT1
M_CS1B#1
M_RAS#1
M_CAS#1
M_WE#1

DRAM_RST

12

.1U_0402 _16V7K

1

2

V_4G@

1U_0402_6.3V6K

1

2

V_4G@

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

M_DQS5

DQSL

C7

M_DQS4

DQSU

E7

M_DQM5

DML

D3

M_DQM4

DMU

G3

M_DQS#5

DQSL

B7

M_DQS#4

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

H5TC4G63AFR-11C_FBGA96

.1U_0402 _16V7K

.1U_0402 _16V7K

.1U_0402 _16V7K

CV228

CV272

CV268

CV296

1

1

1

1

2

2

2

2

V_4G@

V_4G@

V_4G@

CV226

1U_0402_6.3V6K

CV280

1U_0402_6.3V6K

CV286

1U_0402_6.3V6K

CV225

1

1

1

2

1

2

2

2

V_4G@

V_4G@

V_4G@

Title

Title

Title

VRAM A Upper

VRAM A Upper

VRAM A Upper

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1

VDDQ

A8

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H2

VDDQ

H9

VDDQ

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

+1.35V_MEM_GFX

10U_0603 _6.3V6M

10U_0603 _6.3V6M

CV301

CV282

1

1

2

2

V_4G@

V_4G@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

LA-D071P

LA-D071P

LA-D071P

5

10U_0603 _6.3V6M

CV276

V_4G@

M_DA45
M_DA42
M_DA46
M_DA41
M_DA44
M_DA43
M_DA47
M_DA40

M_DA35
M_DA38
M_DA34
M_DA37
M_DA33
M_DA39
M_DA32
M_DA36

1

2

+1.35V_MEM_GFX

10U_0603 _6.3V6M

CV292

1

2

V_4G@

62 64Thursday, July 09, 2015

62 64Thursday, July 09, 2015

62 64Thursday, July 09, 2015

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

Power-Up/Down Sequence

D D

1. All the ASIC supplies must reach their respective nom inal voltages within 20 ms
of the start of the ram p-up sequence, th ough a shorter ramp-up du ration is
preferred. The maximum slew rate on all rails is 50 mV/μs.

2. It is recommended that th e 3.3-V rail ramp up first.

3. It is recommended that th e 0.95-V rail reach at least 90% of its nominal value
no later than 2 ms from th e start of VDDC ramping up.

4. The power rails that are shared with other components on the system should be
gated for the dGPU so that when the dGPU is powered down (for example
AMD PowerXpress? idle state), all the power rails are remov ed from the dGPU.
The gate circuits must mee t the slew rate requirement (such as ? 5 0 mV/μs).

5. VDDC and VDD_CT should not ramp up simultaneously. For example, VDDC
should reach 90% before VDD_CT starts to ramp up (or vice vers a).

6. For power down, reversing the ramp-up s equence is recommended.

PCH_PLTRST#_EC

PCH_PLTRST#

< 20mS

VDDR3(3.3V)

+3VGS
(DGPU_PWR_EN)

PCIE_VDDC(0.95V)

+0.95VSDGPU
(DGPU_PWR_EN with RC delay)

1.8V_IO(1.8V)

+1.8VGS
(DGPU_PWR_EN with RC delay)

VDDC/VDDCI(0.8~1.15V)

+VGA_CORE
(DGPU_PWR_EN)

VMEMIO(1.35V or 1.5V)

C C

+1.35V_MEM_GFX
(DGPU_PWROK with RC delay)

PWRGOOD

DGPU_PWROK

PERSTb

PLT_RST_VGA#

REFCLK

CLK_PEG_VGA/CLK_PEG_VGA#

DEVICE

B B

>10uS

> 100mS > 100mS (SW)

> 100uS

Asserted Before PERSTb

Device in

Device Hardware Reset Device CFG Accessible

Reset

or Working

Hynix 1G Micro n 1G

RV15

1G_H@

RV16

1G_H@

RV15

1G_M@

< 20mS

Device Powering down Device Powered down

No requirements

RV16

1G_M@

MCP

GPP_B13

GPP_D10

GPP_D13

GPP_D18

DGPU_HOLD_RST#

DGPU_PWR_EN

DGPU_PWROK

AND
GATE

+3VS

LDO

LDO

PWM

X7662631L81

2G_S@

X7662631L84

4G_S@

1

2

3

DGPU_PWR_EN#

+1.0V_PRIM

DGPU_PWR_EN#

B+

DGPU_PWR_EN# DGPU_PWROK

ZZZ

ALT. GROUP PARTS SAMSUNG 2GB AAL25

ZZZ

ALT. GROUP PARTS SAMSUNG 4GB AAL25

AND
GATE

+3VGS

+0.95VSDGPU

DGPU_PWR_EN#

+VGA_CORE

ZZZ

ALT. GROUP PARTS HYNIX 2GB AAL25

ZZZ

ALT. GROUP PARTS HYNIX 4GB AAL25

PLT_RST_VGA#

+1.8V_PRIM

+1.35V_MEM

X7662631L82

2G_H@

X7662631L85

4G_H@

LDO

LDO

GPU

PERSTB

+1.8VGS

2

+1.35V_MEM_GFX

3

ZZZ

ALT. GROUP PARTS MICRON 2GB AAL25

ZZZ

ALT. GROUP PARTS MICRON 4GB AAL25

X7662631L83

2G_M@

X7662631L86

4G_M@

8.45K_0402_1%

SD000000 680

2K_0402_1%

SD034200 180

4.53K_0402_1%

SD034453 180

2K_0402_1%

SD034200 180

Samsung 2G Hynix 2G Micron 2G

RV15

2G_S@

6.98K_0402_1%

SD000002 680

RV16

2G_S@

4.99K_0402_1%

SD034499 180

RV15

2G_H@

4.53K_0402_1%

SD034453 180

2G_H@

4.99K_0402_1%

SD034499 180

RV15

2G_M@

3.24K_0402_1%

SD034324 180

RV16

2G_M@

5.62K_0402_1%

SD034562 180

RV16

Hynix 4G Micro n 4GSamsung 4G

RV16

4G_S@

A A

4.75K_0402_1%

SD034475 180

5

RV15

4G_H@

3.4K_0402_1%

SD034340 180

RV16

10K_0402_1%

SD034100 280

2015/5/19 Modify
Jason

4G_H@

RV15

4.75K_0402_1%

SD034475 180

4

4G_M@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CO NTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRONICS, INC.

3

For AMD EXO-XT VRAM Only

Memory ID

000

110

111

P/N

SA000076P2L

SA00008DN0L

SA000077K0L

Vendor

SAMSUNG

HYNIX

Micron

011

100

101

For AMD MESO-LE VRAM Only

011

100

101

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

SA00008DN0L

SA000077K0L

P/NMemory ID Configuration SizeVendor

SA000076P2L 2GB

SA00008DN0L

SA000077K0L

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

Deciphered Date

Deciphered Date

Deciphered Date

2

HYNIX

Micron

SAMSUNG

HYNIX

Micron

Configuration Size

256MX16 K4W4G164 6E-BC1A FBGA 96P

256MX16 H5TC4G63CFR-N0 C FBGA 96P

256M16 MT41J256M16H A-093G:E FBGA

256MX16 K4W4G164 6E-BC1A FBGA 96P

256MX16 H5TC4G63CFR-N0 C FBGA 96P

256M16 MT41J256M16H A-093G:E FBGA

256MX16 K4W4G164 6E-BC1A FBGA 96P

256MX16 H5TC4G63CFR-N0 C FBGA 96P

256M16 MT41J256M16H A-093G:E FBGA

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

EXO/MESO_NOTE

EXO/MESO_NOTE

EXO/MESO_NOTE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-D071P

LA-D071P

LA-D071P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

4GB

4GB

4GB

2GBSA000076P2L SAMSUNG

2GB

2GB

2GB

2GB

1.0(A00)

1.0(A00)

63 6 4Thursda y, July 09, 2015

63 6 4Thursda y, July 09, 2015

63 6 4Thursda y, July 09, 2015

1.0(A00)

5

4

3

2

1

+5VALW TO +5V_3DCAM

J14

0.1U_0402_10V6K

1

CX12

12P_0402_50V8J

D D

+3VS

1 2

RX1 10K_0402_5%@3D@

+3VALW_PCH

3D_CAM_EN<9,29>

+3VS

3D@

1 2

CX40.01U_0402_16V7K

1 2

C C

3D@

1 2

USB3_CRX_DTX_N3<10>
USB3_CRX_DTX_P3<10>

USB3_CTX_DRX_N3<10>
USB3_CTX_DRX_P3<10>

+3VS

B B

A A

RX11 3.3K_0402_5%
RX12 0_0402_5%

RX14 3.3K_0402_5%
RX15 0_0402_5%

RX16 4.7K_0402_5%@3D@
RX17 4.7K_0402_5%

RX18 4.7K_0402_5%
RX19 4.7K_0402_5%

RX20 4.7K_0402_5%
RX21 4.7K_0402_5%

RX22 4.7K_0402_5%
RX23 4.7K_0402_5%

RX24 4.7K_0402_5%
RX25 4.7K_0402_5%

RX26 4.7K_0402_5%
RX27 4.7K_0402_5%

RX28 4.7K_0402_5%
RX29 4.7K_0402_5%

RX30 4.7K_0402_5%
RX31 4.7K_0402_5%

CX6 0.1U_0402_10V6K
CX7 0.1U_0402_10V6K

CX8 0.1U_0402_10V6K
CX10 0.1U_0402_10V6K

1 2

@3D@

1 2

@3D@

1 2

@3D@

1 2

@3D@

1 2
1 2

@3D@

1 2

@3D@

1 2

@3D@

1 2

@3D@

1 2

@3D@

1 2

@3D@

1 2

@3D@

1 2

@3D@

1 2

@3D@

1 2

@3D@

1 2

@3D@

1 2

@3D@

1 2

@3D@

1 2

@3D@

1 2

@3D@

5

1 2

3D@

3D@

1 2
1 2

3D@

USB3_P0_PIN6

USB3_P0_PIN18

USB3_CM_P0

USB3_ERD_P0

USB3_OS2_P0

USB3_DE2_P0

USB3_EQ2_P0

USB3_OS1_P0

USB3_DE1_P0

USB3_EQ1_P0

CX50.1U_0402_10V6K

3D@

USB3_CRX_C_RD_DTX_N3
USB3_CRX_C_RD_DTX_P3

USB3_OS2_P0
USB3_DE2_P0
USB3_EQ2_P0

USB3_CTX_C_RD_DRX_N3
USB3_CTX_C_RD_DRX_P3

USB3_OS1_P0
USB3_DE1_P0
USB3_EQ1_P0

PS8713BTQFN24GTR2-A0_TQFN24_4X4

USB3.0 9 0ohm

Main SA00005 OR20 (S IC PS8713B TQFN24GTR2-A1 TQFN USB 3.0) PARADE

2nd SA00008 M500 (S IC SN6 5LVPE512RGER VQFN 24P US B3 REDRI) TI

Change Main source C PN to

SA00005OR3 0 (S IC PS8713B TQFN24GTR2 -A2 USB3. 0 REPEATE) PARADE

Becau se Vendor Ver. c hange. Jason 20 15/5/29

UX2

3D@

1

VCC
VCC

TX2­TX2+

OS2
DE2
EQ2

RX1­RX1+

OS1
DE1
EQ1

PGND

RX2-

RX2+

EN_RXD

TX1-

TX1+

GND
GND
GND
GND

NC
NC

CM

13

11
12

15
16
17

8
9

4
3
2

25

4

Change RX5 BOM option.
Jason 7/6

7

1 2

RX5 4.99K_0402_1%3D@

1 2

24

RX6 0_0402_5%

20
19

5
14

23
22

6
10
18
21

@3D@

USB3_CRX_RD_DTX_N3
USB3_CRX_RD_DTX_P3

USB3_ERD_P0
USB3_CM_P0

USB3_CTX_RD_DRX_N3
USB3_CTX_RD_DRX_P3

USB3_P0_PIN6

USB3_P0_PIN18

3D@

1 2

CX11 0.1U_0402_10V6K

1 2

CX9 0.1U_0402_10V6K

3D@

Layout request to swap pin !

DX1

USB3_CRX_L_DTX_P3

USB3_CRX_L_DTX_N3

Security Classifica tion

Security Classifica tion

Security Classifica tion

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

4

5

3

8

S DIO(BR) TVWDF1004AD0 DFN ESD

Issued Date

Issued Date

Issued Date

@ESD@

10

USB3_CRX_L_DTX_P3

9

USB3_CRX_L_DTX_N3

7

USB3_CTX_L_DRX_N3USB3_CTX_L_DRX_N3

6

USB3_CTX_L_DRX_P3USB3_CTX_L_DRX_P3

2015/07/09 2016/07/31

2015/07/09 2016/07/31

2015/07/09 2016/07/31

3

1 2

RX2 10K_0402_5%3D@

RX3

100K_0402_5% 3D@

1 2

RX4 0_0402_5%

@EMI@

LX1 3D@EMI@

4

4

3

3

MCF12102G900-T_4P

1 2

RX7 0_0402_5%

@EMI@

1 2

RX9 0_0402_5%

@EMI@

LX2 3D@EMI@

USB3_CTX_C_DRX_N3

USB3_CTX_C_DRX_P3

USB3.0 9 0ohm (Used 2nd Symbol & Foo tprint)
Main SM07 0003V00(S COM F I_ INPAQ HCM101 2GH900BP )
2nd SM0 70004000(S COM FI_ TAIYO MCF12102G 900-T)
3rd SM07 0004300(S COM FI_ PANASONIC EXC24CH900U)

Compal Secret Data

Compal Secret Data

Compal Secret Data

3

3

4

4

MCF12102G900-T_4P

1 2

RX8 0_0402_5%

@EMI@

Deciphered Date

Deciphered Date

Deciphered Date

@RF@

2

12

1

1

2

2

2

2

1

1

1

CX1

3D@

2

USB3.0 9 0ohm (Used 2nd Symbol & Foo tprint)
Main SM07 0003V00(S COM F I_ INPAQ HCM101 2GH900BP )
2nd SM0 70004000(S COM FI_ TAIYO MCF12102G 900-T)
3rd SM07 0004300(S COM FI_ PANASONIC EXC24CH900U)

USB3_CRX_L_DTX_N3

USB3_CRX_L_DTX_P3

USB3_CTX_L_DRX_N3

USB3_CTX_L_DRX_P3

2

Always Open

J14

PJP@

2

112

JUMP_43X39

UX1

3D@

1

VIN

2

VIN

3

ON

4

VBIAS

TPS22967DSGR_SON8_2X2

For Test,
APE8937(SA000070L00)
AOZ1336(SA00006U600)
TPS22967(SA000070S00)

CAM_DETECT<9>

+3VS

1 2

RX10 10K_0402_5%

+3VALW_PCH

1 2

RX13 10K_0402_5%3D@

FW_UPDATE<9,29>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

7

VOUT

8

VOUT

6

CT

5

GND

9

GND

@3D@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

3D CAMERA

3D CAMERA

3D CAMERA

LA-D071P

LA-D071P

LA-D071P

+5V_CAM+5VALW

2

3D@

CX2

1

1U_0402_6.3V6K

1

CX3

3D@

2200P_0402_25V7K

2

CT pin use 2200pf for
soft start tuning

USB3_CRX_L_DTX_N3
USB3_CRX_L_DTX_P3

USB3_CTX_L_DRX_N3
USB3_CTX_L_DRX_P3

CAM_DETECT

FW_UPDATE

1

1

@RF@

CX13

2

12P_0402_50V8J

+5V_CAM

JCAM3D

CONN@

1
2
3
4
5
6
7
8

9
10
11
12

ACES_50463-0104A-001

64 64T hursday, July 09, 2015

64 64T hursday, July 09, 2015

64 64T hursday, July 09, 2015

1
2
3
4
5
6
7
8
9
10
GND
GND

1.0(A00)

1.0(A00)

1.0(A00)