Compal LA-C482P Schematics

A
1 1
B
C
D
E
Compal Confidential
2 2
Skylake-U M/B Schematics Document
Intel ULV Processor with LPDDR3
Date : 2015/05/28
3 3
Version 0.3
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
A
B
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2011/06/29 2011/06/29
2011/06/29 2011/06/29
2011/06/29 2011/06/29
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Documen t Number Rev
Size Documen t Number Rev
Size Documen t Number Rev
B
B
B
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
LA-C482P
LA-C482P
LA-C482P
145Thursday, May 28, 2015
145Thursday, May 28, 2015
145Thursday, May 28, 2015
E
0.3
0.3
0.3
of
of
of
A
www.schematic-x.blogspot.com
B
C
D
E
Compal Confidential
Model Name : Skylake U
File Name : LA-C482P
1 1
Skylake U Block Diagram
Memory Bus
1.2V lpddr3 1600MHz
CH_A
LPDDR3 Memory down
P.16
CH_B
DDI2
eDP x4
DDI
Skylake U
USB 2.0
Port 1
Port 2
Port 3
Port 5
Port 9
Port 7
USB 3.0 Conn. Right
USB 3.0 Conn. Right
USB chnarger TI TPS2547
Camera
Finger print
eDP conn
P.19
HDMI 1.4
P.20
2 2
LPDDR3 Memory down
P.24
P.24
P.25
P.19
P.31
P.17
Port 1
Port 2
Port 3
NGFF WLAN+BT (Key E)
PCIEx1
Port 6
P.22
Dual Core
SD Socket
P.23
3 3
Card reader RTS5237S-GR
P.23
SYS BIOS ROM
8MB
Port 9
P.6
PCIE x1
SPI
TDP:15W
BGA 1356 balls
42 x 24 mm
USB 3.0
SATA
Port 0
NGFF SSD (Key B)
P.21
P.27
Combo Jack (HP&MIC)
Int. Speaker
P.26
P.26
Battery
P.36
Thermal Sensor
NCT7718W
4 4
SMBus1
SMBus2
P.09
ENE KB9022
I2C/PS2
Touch Pad Int.KBD
P.30 P.30
P.29
LPC
P.4 - P.15
HDA
AUDIO CODEC
Realtek ALC 3241
P.26
DMIC
P.19
HP AMP HPA022642
PCH SMBus
Security Classification
Security Classification
A
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET I NFORMATION. THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET I NFORMATION. THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRON ICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRON ICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRON ICS, INC.
C
2011/06/29 2011/06/29
2011/06/29 2011/06/29
2011/06/29 2011/06/29
Compal Secr et Data
Compal Secr et Data
Compal Secr et Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Block Diagrams
Block Diagrams
Block Diagrams
LA-C482P
LA-C482P
LA-C482P
E
245Thursday, May 28, 2015
245Thursday, May 28, 2015
245Thursday, May 28, 2015
of
of
of
0.3
0.3
0.3
A
UC1
R7 R8
CPU
R9
1 1
W2
W3 V3
SMBCLK SMBDATA
SML0CLK SML0DATA
SML1CLK SML1DATA
+3V_PRIM
R=1K
+3V_PRIM
R=499
+3V_PRIM
R=1K
+3VS
2N7002
+3V_PRIM
2N7002
EC_SMB_CK2 EC_SMB_DA2
+3VALW
R=2.2K
+3VS
R=2.2K
TP_SMBCLK TP_SMBDAT
B
Touch Pad
SOC SMBUS Address Table
SOC_SMBUS Net Name
SMBCLK SMBDATA
SML0CLK SML0DATA
SML1CLK SML1DATA
Power Rail
+3VS_PRIM (+3VS)
+3V_PRIM
+3VS_PRIM (+3VS)
C
Device Address (7 bit)
Address (8bit) Write Read
Touch PAD TBC TBC TBC
EC
EC define
TBC TBC
D
EC SMBUS Address Table
EC_SMBUS Port
EC_SMB_CK1 EC_SMB_DA1
EC_SMB_CK2 EC_SMB_DA2
Power Rail Device Address (7 bit)
+3VL_EC
+3VS
E
Address (8bit) Write Read
0x16 TBC TBCBAT
CHGR 0x12 TBC TBC
Thermal Sensor
0x4C 0x98 0x99
PCH TBC TBC TBC
+3VS
I2C_1 _SCL
U9 U8
UK1:+3VALW_EC
2 2
EC
(+3VL)
EC_SMB_CK2 EC_SMB_DA2
B8 A6
EC_SMB_CK1 EC_SMB_DA1
A8 A7
Touch Screen
+3V_SMBUS
R=2.2K
R=100
Thermal Sensor :NCT7718W
Address : 0x4C
BAT
R=1K
I2C_1 _SDA
Charger
UC1
I3@
UC1
I5@
UC1
Intel i7-6500U
SA000092P00
I7@
DAX
PCB
Part Number = DAA000AY000 PCB 1D2 LA-C482P REV0 M/B
Z3
45@
HDMI
Part Number = RO0000003HM ROYALTY HDMI W/LOGO+HDCP
3 3
Intel i3-6100U
SA000092N00
Intel i5-6200U
SA000092O00
I2C Address Table
I2C Port
I2C 0
I2C 1 Touch Panel
<PCI-E,SATA,USB3.0>
PCI-E
Lane#
1 2 3 4 5 6 7 8 95 10 11 12 8 13 14 15 16
Power Rail Device Address (7 bit)
+3VS
SATA
USB3.0
1 2 3
4 1 2 3 4
6 7
9 10 11
5
6
0 1
1* 212
DESTINATION
USB3. 0 USB3. 0 USB3. 0
GPU(DIS only) 13" NO USED
WLAN
SSD
CardReader
TBC TBC TBC
<USB2.0 port>
USB2.0
DESTINATION
1USB 2.0/3.0 2
USB 2 .0/3 .0
3
USB 2 /3 (C harger) 4 5 6 7 8 9 10
X
Camera
X
WLAN/BT
Touch screen(Options)
FingerPrint
X
Address (8bit)
Write Read
Power State
STATE
S0 (Full ON)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
Voltage Rails
Power Plane Description
VIN BATT+ Battery power supply +12.6VB +VCC_CORE +VCC_GT Sliced graphics power rail +0.6VS_VTT DDR +0.6VS power rail for DDR terminator +1.0V_PRIM System +1.0V power rail ON* +1.0VS_VCCIO +1.0VS IO power rail +1.2V_VDDQ +1.2V power rail CPU&LPDDR3 +1.8V_MEM +1.8V power rail for LPDDR3 +1.8V_PRIM +3VALW System +3VALW always on power rail +3VLP +12.6VB to +3VLP power rail for suspend power +3VALW_DSW +3VALW power for PCH DSW rails +3V_PRIM +3VALW power for PCH suspend rails +3VS +5VALW +5VS System +5VS power rail +3VL_RTC RTC power Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF
SIGNAL
SLP_S3#
SLP_S4#
LOW HIGH
LOWLOW
Adapter power supply
AC or battery power rail for power circuit Core voltage for CPU
System +1.8V power rail
System +3VS power rail System +5VALW power rail
SLP_S5#
HIGH
HIGH
N/A N/A N/A ON ON ON ON ON ON ON ON ON ON ON ON ON ONON ON
ON ON
S0
+VALW
ON ON ON ONHIGH HIGH HIGH
ONONON
ON
S0ix
N/A N/A N/A OFF OFF OFF ON OFF ON ON ON ON ON ON ON ON ON ON ON
+V
OFF
OFFLOW LOW LOW
N/A N/A N/A OFF OFF OFF ON OFF ON ON ON ON ON ON ON OFF
OFFONOFF ON
S3
+VS Clock
OFF
OFF
OFF
S4/S5
N/A N/A N/A OFF OFF OFF
OFF OFF OFF ON* ON* ON ON* ON* OFF ON* OFFOFF ON
OFF
OFF
OFF
DS3
N/A N/A N/A OFF OFF OFF OFF OFF ON ON OFF ON ON ON OFF OFF ON OFF
OFF ON
CPU Memory down vender control table
CPU_GPP_G7
CPU_GPP_G6 CPU_GPP_G5 CPU_GPP_G4
BOM Structure Table
Function
NC Components @ EMI Components ESD Components RF Components ME Cnnector
SPI_IO3(MOW36)
4 4
Stuff Un-Stuff
EMI@ ESD@
RF@
CONN@
ES@
TPM@TPM
A
@EMI@ @ESD@
@RF@
@CONN@
SDRAM_ID4 SDRAM_ID3 SDRAM_ID2 SDRAM_ID1
0000X 0001 00 01 0011 0001 01 10 0110 0111 1 0 0 0 Elpida 512x8 MDx8bitx8pcs (A) SODIMMx1(B) 14"MT41K512M8RH-125:E
0
1 1 1 1 1 1
0
1
0
1
0
1
1
1 11
B
Vender
MD size
XX Micron Samsung Hynix Micron Samsung Hynix
1
Hynix
128Mx32x2
Samsung
0 10
1
0 1
Elpida
Hynix
Samsung Elpida
MD 4G
256Mx16x4 MD 8G
Vender desciption Note
X X SODIMMx2 (A,B) X
MT41K512M16TNA-125:E
256x16
4B8G1646Q-MYK0
256x16
H5TC8G63AMR-PBA
256x16
MT41K512M8RG-107:N
512x8
K4B4G0846Q-HYK0
512x8
H5TC4G83BFR-PBA
512x8
H9CCNNN8GTMLAR-NUD K4E8E304EE-EGCE EDF8132A3MA-GD-F H9CCNNNBJTMLAR-NUD K4E6E304EE-EGCE EDFA232A2MA-GD-F
SODIMMx1(A) No MDx16bitx4pcs (B) SODIMMx1(A) MDx16bitx4pcs (B) SODIMMx1(A) SODIMMx1(A) MDx8bitx8pcs (A) SODIMMx1(B) MDx8bitx8pcs (A) SODIMMx1(B) MDx8bitx8pcs (A) SODIMMx1(B)
A - LPDDR3 MDx32bitx2pcs
C
MDx16bitx4pcs (B) MDx16bitx4pcs (B)
B - LPDDR3 MDx32bitx2pcs
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEE RING DRAWING IS THE PROP RIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTE N CONSENT OF COMP AL ELECTRONICS , INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTE N CONSENT OF COMP AL ELECTRONICS , INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTE N CONSENT OF COMP AL ELECTRONICS , INC.
Project
15"/17" 13" 13" 13" 13" 14" 14" 14"
13"
CPU Project ID control table
CPU_GPP_G3
PROJECT_ID4 SKL-U SKL-H
2011/06/29 2011/06/29
2011/06/29 2011/06/29
2011/06/29 2011/06/29
0
1
EC Board ID (UMA, Dis, phase) control table
RK13
DB SI PV MV
UMA
0ohm
Dis
12Kohm
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
CPU_GPP_G2
PROJECT_ID3 PROJECT_ID2 PROJECT_ID1 UMA DIS
15Kohm 20Kohm
CPU_GPP_G1 CPU_GPP_G0
1001
27Kohm 33Kohm
0
1
43Kohm 56Kohm
Note
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
0
0 11
Notes List
Notes List
Notes List
LA-C482P
LA-C482P
LA-C482P
E
Project name
13" (Valrhona) 14" (Lindt) 15" (Puccini) 17" (Maison)
345Thursd ay, May 2 8, 2 015
345Thursd ay, May 2 8, 2 015
345Thursd ay, May 2 8, 2 015
0.3
0.3
0.3
of
of
of
5
4
3
2
1
SOC_DP1_CTRL_DATA(Internal Pull Down):
Display Port B Detected
0 = Port B is not detected.
H_PECI
H_THERMTRIP# SOC_OCC#
XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3
NMI_DBG#_CPU TS_INT#
SOC_GPIOB4
SKL-U
1 OF 20
EDP
D63
CATERR#
A54
PECI
C65
PROCHOT#
C63
THERMTRIP#
A65
SKTOCC#
C55
BPM#[0]
D55
BPM#[1]
B54
BPM#[2]
C56
BPM#[3]
A6
GPP_E3/CPU_GP0
A7
GPP_E7/CPU_GP1
BA5
GPP_B3/CPU_GP2
AY5
GPP_B4/CPU_GP3
AT16
PROC_POPIRCOMP
AU16
PCH_OPIRCOMP
H66
OPCE_RCOMP
H65
OPC_RCOMP
EDP_DISP_UTIL
GPP_E13/DDPB_HPD0 GPP_E14/DDPC_HPD1 GPP_E15/DDPD_HPD2 GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
UC1D
CPU MISC
SKL-U_BGA1356
Rev_1.0
EDP_TXN[0] EDP_TXP[0] EDP_TXN[1] EDP_TXP[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3]
EDP_AUXN EDP_AUXP
DDI1_AUXN DDI1_AUXP DDI2_AUXN DDI2_AUXP
RSVD RSVD
SKL-U
4 OF 20
C47 C46 D46 C45 A45 B45 A47 B47
E45 F45
B52
G50 F50 E48 F48 G46 F46
L9 L7 L6 N9 L10
R12 R11 U13
EDP_CPU_LANE_N0_C EDP_CPU_LANE_P0_C EDP_CPU_LANE_N1_C EDP_CPU_LANE_P1_C EDP_CPU_LANE_N2_C EDP_CPU_LANE_P2_C EDP_CPU_LANE_N3_C EDP_CPU_LANE_P3_C
EDP_CPU_AUX#_C EDP_CPU_AUX_C
PCH_DP2_HPD
EC_SCI# EDP_HPD
ENBKL BKL_PWM_CPU ENVDD_CPU
1 2
RC123 100K_0402_5%
1 2
RC124 100K_0402_5%
1 2
RC125 100K_0402_5%
1 2
CC257 0.1U_0402_16V7K
@ESD@
Rev_1.0
JTAG
B61
PROC_TCK
D60
PROC_TDI
JTAGX
A61 C60 B59
B56 D59 A56 C59 C61 A59
PROC_TDO PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS
PCH_TRST#
EDP_CPU_LANE_N0_C 19 EDP_CPU_LANE_P0_C 19 EDP_CPU_LANE_N1_C 19 EDP_CPU_LANE_P1_C 19 EDP_CPU_LANE_N2_C 19 EDP_CPU_LANE_P2_C 19 EDP_CPU_LANE_N3_C 19 EDP_CPU_LANE_P3_C 19
EDP_CPU_AUX#_C 19 EDP_CPU_AUX_C 19
T276TP@
PCH_DP2_HPD 20
T275TP@
EC_SCI# 9,29 EDP_HPD 19
ENBKL 29 BKL_PWM_CPU 19 ENVDD_CPU 19
ENVDD_CPU
ENBKL
EDP_HPD
SOC_XDP_TRST#
CPU_XDP_TCK0 SOC_XDP_TDI SOC_XDP_TDO SOC_XDP_TMS SOC_XDP_TRST#
PCH_JTAG_TCK1 SOC_XDP_TDI
SOC_XDP_TDO SOC_XDP_TMS SOC_XDP_TRST# CPU_XDP_TCK0
<eDP>
From HDMI
From eDP
1 = Port B is detected.
D D
SOC_DP2_CTRL_DATA(Internal Pull Down):
Display Port C Detected
0 = Port C is not detected.
1 = Port C is detected.
<HDMI>
+1.0V_VCCST
1 2
RC2 1K_0402_5%
C C
H_THERMTRIP#
PCH_DPC_N220 PCH_DPC_P220 PCH_DPC_N120 PCH_DPC_P120 PCH_DPC_N020 PCH_DPC_P020 PCH_DPC_N320 PCH_DPC_P320
PCH_DP2_CTRL_CLK20
PCH_DP2_CTRL_DATA20
PCH_DPC_N2 PCH_DPC_P2 PCH_DPC_N1 PCH_DPC_P1 PCH_DPC_N0 PCH_DPC_P0 PCH_DPC_N3 PCH_DPC_P3
PCH_DP2_CTRL_CLK PCH_DP2_CTRL_DATA
EDP_COMP
COMPENSATION PU FOR eDP
+1.0VS_VCCIO
1 2
RC1 24.9_0402_1%
CAD note: Trace width=20 mils,Spacing=25mil,Max length=100mils
+1.0VS_VCCSTG
RC11 51_0402_5%@
RC13 51_0402_5%@
B B
A A
RC15 51_0402_5%@
RC364 1K_0402_5%@
+1.0V_PRIM
RC14 51_0402_5%@
RC31 1K_0402_5%@
RC365 51_0402_5%@
RC35 51_0402_1%@
RC37 51_0402_5%@
RC366 0_0402_5%@
12
12
12
12
12
1 2
12
12
12
1 2
EDP_COMP
SOC_XDP_TMS
SOC_XDP_TDI
SOC_XDP_TDO
CPU_XDP_TCK0
XDP_PREQ#
XDP_ITP_PMODE
SOC_XDP_TRST#
CPU_XDP_TCK0
PCH_JTAG_TCK1
CFG3
NMI_DBG#_CPU29
PROCHOT#29,37
XDP_PREQ# 10
XDP_ITP_PMODE 15
CFG3 15
+3V_PRIM
RC374 10K_0402_5%
1 2
NMI_DBG#_CPU
+1.0VS_VCCSTG
12
RC3 1K_0402_5%
PROCHOT# H_PROCHOT#_R
CC254 10P_0402_50V8J
@ESD@
1 2
RC4 499_0402_1%
2
1
RC5 49.9_0402_1% RC6 49.9_0402_1% RC7 49.9_0402_1% RC8 49.9_0402_1%
UC1A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22
N12
GPP_E23
E52
EDP_RCOMP
SKL-U_BGA1356
T76 TP@
H_PECI29
T77 TP@
T96 TP@ T103 TP@ T78 TP@ T79 TP@
TS_INT#19
T81 TP@
12 12 12 12
DDI
DISPLAY SIDEBANDS
CPU_POPIRCOMP PCH_OPIRCOMP EDRAM_OPIO_RCOMP EOPIO_RCOMP
Security Classification
Security Classification
Security Classification
2011/06/29 2011/06/29
2011/06/29 2011/06/29
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2011/06/29 2011/06/29
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet of
Compal Electronics, Inc.
SKL-U(1/12))DDI,MSIC,XDP,EDP
SKL-U(1/12))DDI,MSIC,XDP,EDP
SKL-U(1/12))DDI,MSIC,XDP,EDP
LA-C482P
LA-C482P
LA-C482P
445Thursday, May 28, 2015
of
445Thursday, May 28, 2015
of
445Thursday, May 28, 2015
1
0.3
0.3
0.3
5
4
3
2
1
Non-Interleaved Non-Interleaved
D D
DDR_A_D[0..15]16
DDR_A_D[32..47]16
C C
DDR_B_D[0..15]17
DDR_B_D[32..47]17
B B
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15
DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47
UC1B
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
Interleave / Non-Interleaved
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
SKL-U_BGA1356
SKL-U
DDR0_CKN[0] DDR0_CKP[0] DDR0_CKN[1] DDR0_CKP[1]
DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3]
DDR0_CS#[0] DDR0_CS#[1] DDR0_ODT[0] DDR0_ODT[1]
DDR3L / LPDDR3 / DDR4
DDR0_MA[5]/DDR0_CAA[ 0]/DDR0_MA[5] DDR0_MA[9]/DDR0_CAA[ 1]/DDR0_MA[9] DDR0_MA[6]/DDR0_CAA[ 2]/DDR0_MA[6] DDR0_MA[8]/DDR0_CAA[ 3]/DDR0_MA[8] DDR0_MA[7]/DDR0_CAA[ 4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA [5]/DDR0_BG[0] DDR0_MA[12]/DDR0_CAA[ 6]/DDR0_MA[12] DDR0_MA[11]/DDR0_CAA[ 7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[ 8]/DDR0_ACT# DDR0_MA[14]/DDR0_CAA[ 9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[ 0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1] /DDR0_MA[15]
DDR0_WE#/DDR0_CA B[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3] /DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB [4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[ 5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB [6]/DDR0_BA[1] DDR0_MA[10]/DDR0_CAB[ 7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[ 8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[ 9]/DDR0_MA[0]
DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1]
Interleave / Non-Interleaved
DDR0_DQSN[2]/DDR0_DQSN[ 4] DDR0_DQSP[2]/DDR0_DQS P[4] DDR0_DQSN[3]/DDR0_DQSN[ 5] DDR0_DQSP[3]/DDR0_DQS P[5] DDR0_DQSN[4]/DDR1_DQSN[ 0] DDR0_DQSP[4]/DDR1_DQS P[0] DDR0_DQSN[5]/DDR1_DQSN[ 1] DDR0_DQSP[5]/DDR1_DQS P[1] DDR0_DQSN[6]/DDR1_DQSN[ 4] DDR0_DQSP[6]/DDR1_DQS P[4] DDR0_DQSN[7]/DDR1_DQSN[ 5] DDR0_DQSP[7]/DDR1_DQS P[5]
DDR0_ALERT#
DDR CH - A
2 OF 20
DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ
DDR_VTT_CNTL
Rev_1.0
DDR0_MA[3] DDR0_MA[4]
DDR0_PAR
AU53
M_CLK_A_DDR#0
AT53
M_CLK_A_DDR0
AU55
M_CLK_A_DDR#1
AT55
M_CLK_A_DDR1
BA56
DDR_A_CKE0
BB56
DDR_A_CKE1
AW56
DDR_A_CKE2
AY56
DDR_A_CKE3
AU45
DDR_A_CS0#
AU43
DDR_A_CS1#
AT45
DDR_A_ODT0
AT43
BA51
DDR_A_CAA_0
BB54
DDR_A_CAA_1
BA52
DDR_A_CAA_2
AY52
DDR_A_CAA_3
AW52
DDR_A_CAA_4
AY55
DDR_A_CAA_5
AW54
DDR_A_CAA_6
BA54
DDR_A_CAA_7
BA55
DDR_A_CAA_8
AY54
DDR_A_CAA_9
AU46
DDR_A_CAB_0
AU48
DDR_A_CAB_1
AT46
DDR_A_CAB_2
AU50
DDR_A_CAB_3
AU52
DDR_A_CAB_4
AY51
DDR_A_CAB_5
AT48
DDR_A_CAB_6
AT50
DDR_A_CAB_7
BB50
DDR_A_CAB_8
AY50
DDR_A_CAB_9
BA50 BB52 AM70
DDR_A_DQS#0
AM69
DDR_A_DQS0
AT69
DDR_A_DQS#1
AT70
DDR_A_DQS1
BA64
DDR_A_DQS#4
AY64
DDR_A_DQS4
AY60
DDR_A_DQS#5
BA60
DDR_A_DQS5
BA38
DDR_B_DQS#0
AY38
DDR_B_DQS0
AY34
DDR_B_DQS#1
BA34
DDR_B_DQS1
BA30
DDR_B_DQS#4
AY30
DDR_B_DQS4
AY26
DDR_B_DQS#5
BA26
DDR_B_DQS5
AW50 AT52
AY67 AY68 BA67
AW67
+VREF_CA_C +V_DDR_REFA_C +V_DDR_REFB_C
DDR_PG_CTRL
T273TP@ T86TP@
Buffer with Open Drain output For VTT power control
RC372
100K_0402_5%
SM_PG_CTRL39
M_CLK_A_DDR#0 16 M_CLK_A_DDR0 16 M_CLK_A_DDR#1 16 M_CLK_A_DDR1 16
DDR_A_CKE0 16 DDR_A_CKE1 16 DDR_A_CKE2 16 DDR_A_CKE3 16
DDR_A_CS0# 16 DDR_A_CS1# 16 DDR_A_ODT0 16
DDR_A_CAA_0 16 DDR_A_CAA_1 16 DDR_A_CAA_2 16 DDR_A_CAA_3 16 DDR_A_CAA_4 16 DDR_A_CAA_5 16 DDR_A_CAA_6 16 DDR_A_CAA_7 16 DDR_A_CAA_8 16 DDR_A_CAA_9 16 DDR_A_CAB_0 16 DDR_A_CAB_1 16 DDR_A_CAB_2 16 DDR_A_CAB_3 16 DDR_A_CAB_4 16 DDR_A_CAB_5 16 DDR_A_CAB_6 16 DDR_A_CAB_7 16 DDR_A_CAB_8 16 DDR_A_CAB_9 16
DDR_A_DQS#0 16 DDR_A_DQS0 16 DDR_A_DQS#1 16 DDR_A_DQS1 16
DDR_A_DQS#4 16 DDR_A_DQS4 16 DDR_A_DQS#5 16 DDR_A_DQS5 16 DDR_B_DQS#0 17 DDR_B_DQS0 17 DDR_B_DQS#1 17 DDR_B_DQS1 17 DDR_B_DQS#4 17 DDR_B_DQS4 17 DDR_B_DQS#5 17 DDR_B_DQS5 17
+VREF_CA_C +V_DDR_REFA_C +V_DDR_REFB_C
+1.2V_VDDQ
+3VALW
12
SM_PG_CTRL
DDR_A_D[16..31]16
DDR_A_D[48..63]16
DDR_B_D[16..31]17
DDR_B_D[48..63]17
Trace width/Spacing >= 20mils
0.1U_0402_16V7K
CC57
1 2
UC7
5
VCC
4
Y
74AUP1G07GW_TSSOP5
GND
1
NC
2
A
3
DDR_PG_CTRL
DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31
DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
UC1C
Interleave / Non-Interleaved
AF65
DDR1_DQ[0]/DDR0_DQ[16]
AF64
DDR1_DQ[1]/DDR0_DQ[17]
AK65
DDR1_DQ[2]/DDR0_DQ[18]
AK64
DDR1_DQ[3]/DDR0_DQ[19]
AF66
DDR1_DQ[4]/DDR0_DQ[20]
AF67
DDR1_DQ[5]/DDR0_DQ[21]
AK67
DDR1_DQ[6]/DDR0_DQ[22]
AK66
DDR1_DQ[7]/DDR0_DQ[23]
AF70
DDR1_DQ[8]/DDR0_DQ[24]
AF68
DDR1_DQ[9]/DDR0_DQ[25]
AH71
DDR1_DQ[10]/DDR0_DQ[26]
AH68
DDR1_DQ[11]/DDR0_DQ[27]
AF71
DDR1_DQ[12]/DDR0_DQ[28]
AF69
DDR1_DQ[13]/DDR0_DQ[29]
AH70
DDR1_DQ[14]/DDR0_DQ[30]
AH69
DDR1_DQ[15]/DDR0_DQ[31]
AT66
DDR1_DQ[16]/DDR0_DQ[48]
AU66
DDR1_DQ[17]/DDR0_DQ[49]
AP65
DDR1_DQ[18]/DDR0_DQ[50]
AN65
DDR1_DQ[19]/DDR0_DQ[51]
AN66
DDR1_DQ[20]/DDR0_DQ[52]
AP66
DDR1_DQ[21]/DDR0_DQ[53]
AT65
DDR1_DQ[22]/DDR0_DQ[54]
AU65
DDR1_DQ[23]/DDR0_DQ[55]
AT61
DDR1_DQ[24]/DDR0_DQ[56]
AU61
DDR1_DQ[25]/DDR0_DQ[57]
AP60
DDR1_DQ[26]/DDR0_DQ[58]
AN60
DDR1_DQ[27]/DDR0_DQ[59]
AN61
DDR1_DQ[28]/DDR0_DQ[60]
AP61
DDR1_DQ[29]/DDR0_DQ[61]
AT60
DDR1_DQ[30]/DDR0_DQ[62]
AU60
DDR1_DQ[31]/DDR0_DQ[63]
AU40
DDR1_DQ[32]/DDR1_DQ[16]
AT40
DDR1_DQ[33]/DDR1_DQ[17]
AT37
DDR1_DQ[34]/DDR1_DQ[18]
AU37
DDR1_DQ[35]/DDR1_DQ[19]
AR40
DDR1_DQ[36]/DDR1_DQ[20]
AP40
DDR1_DQ[37]/DDR1_DQ[21]
AP37
DDR1_DQ[38]/DDR1_DQ[22]
AR37
DDR1_DQ[39]/DDR1_DQ[23]
AT33
DDR1_DQ[40]/DDR1_DQ[24]
AU33
DDR1_DQ[41]/DDR1_DQ[25]
AU30
DDR1_DQ[42]/DDR1_DQ[26]
AT30
DDR1_DQ[43]/DDR1_DQ[27]
AR33
DDR1_DQ[44]/DDR1_DQ[28]
AP33
DDR1_DQ[45]/DDR1_DQ[29]
AR30
DDR1_DQ[46]/DDR1_DQ[30]
AP30
DDR1_DQ[47]/DDR1_DQ[31]
AU27
DDR1_DQ[48]
AT27
DDR1_DQ[49]
AT25
DDR1_DQ[50]
AU25
DDR1_DQ[51]
AP27
DDR1_DQ[52]
AN27
DDR1_DQ[53]
AN25
DDR1_DQ[54]
AP25
DDR1_DQ[55]
AT22
DDR1_DQ[56]
AU22
DDR1_DQ[57]
AU21
DDR1_DQ[58]
AT21
DDR1_DQ[59]
AN22
DDR1_DQ[60]
AP22
DDR1_DQ[61]
AP21
DDR1_DQ[62]
AN21
DDR1_DQ[63]
SKL-U_BGA1356
SKL-U
DDR3L / LPDDR3 / DDR4
DDR1_MA[5]/DDR1_CAA[ 0]/DDR1_MA[5] DDR1_MA[9]/DDR1_CAA[ 1]/DDR1_MA[9] DDR1_MA[6]/DDR1_CAA[ 2]/DDR1_MA[6] DDR1_MA[8]/DDR1_CAA[ 3]/DDR1_MA[8] DDR1_MA[7]/DDR1_CAA[ 4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA [5]/DDR1_BG[0] DDR1_MA[12]/DDR1_CAA[ 6]/DDR1_MA[12] DDR1_MA[11]/DDR1_CAA[ 7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[ 8]/DDR1_ACT# DDR1_MA[14]/DDR1_CAA[ 9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[ 0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1] /DDR1_MA[15]
DDR1_WE#/DDR1_CA B[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3] /DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB [4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[ 5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB [6]/DDR1_BA[1] DDR1_MA[10]/DDR1_CAB[ 7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[ 8]/DDR1_MA[1] DDR1_MA[0]/DDR1_CAB[ 9]/DDR1_MA[0]
Interleave / Non-Interleaved
DDR1_DQSN[0]/DDR0_DQSN[ 2] DDR1_DQSP[0]/DDR0_DQS P[2] DDR1_DQSN[1]/DDR0_DQSN[ 3] DDR1_DQSP[1]/DDR0_DQS P[3] DDR1_DQSN[2]/DDR0_DQSN[ 6] DDR1_DQSP[2]/DDR0_DQS P[6] DDR1_DQSN[3]/DDR0_DQSN[ 7] DDR1_DQSP[3]/DDR0_DQS P[7] DDR1_DQSN[4]/DDR1_DQSN[ 2] DDR1_DQSP[4]/DDR1_DQS P[2] DDR1_DQSN[5]/DDR1_DQSN[ 3] DDR1_DQSP[5]/DDR1_DQS P[3]
DDR CH - B
3 OF 20
Rev_1.0
DDR1_CKN[0] DDR1_CKN[1] DDR1_CKP[0] DDR1_CKP[1]
DDR1_CKE[0] DDR1_CKE[1] DDR1_CKE[2] DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1] DDR1_ODT[0] DDR1_ODT[1]
DDR1_MA[3] DDR1_MA[4]
DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7] DDR1_ALERT#
DDR1_PAR DRAM_RESET# DDR_RCOMP[0] DDR_RCOMP[1] DDR_RCOMP[2]
AN45
M_CLK_B_DDR#0
AN46
M_CLK_B_DDR#1
AP45
M_CLK_B_DDR0
AP46
M_CLK_B_DDR1
AN56
DDR_B_CKE0
AP55
DDR_B_CKE1
AN55
DDR_B_CKE2
AP53
DDR_B_CKE3
BB42
DDR_B_CS0#
AY42
DDR_B_CS1#
BA42
DDR_B_ODT0
AW42
AY48
DDR_B_CAA_0
AP50
DDR_B_CAA_1
BA48
DDR_B_CAA_2
BB48
DDR_B_CAA_3
AP48
DDR_B_CAA_4
AP52
DDR_B_CAA_5
AN50
DDR_B_CAA_6
AN48
DDR_B_CAA_7
AN53
DDR_B_CAA_8
AN52
DDR_B_CAA_9
BA43
DDR_B_CAB_0
AY43
DDR_B_CAB_1
AY44
DDR_B_CAB_2
AW44
DDR_B_CAB_3
BB44
DDR_B_CAB_4
AY47
DDR_B_CAB_5
BA44
DDR_B_CAB_6
AW46
DDR_B_CAB_7
AY46
DDR_B_CAB_8
BA46
DDR_B_CAB_9
BB46 BA47
AH66
DDR_A_DQS#2
AH65
DDR_A_DQS2
AG69
DDR_A_DQS#3
AG70
DDR_A_DQS3
AR66
DDR_A_DQS#6
AR65
DDR_A_DQS6
AR61
DDR_A_DQS#7
AR60
DDR_A_DQS7
AT38
DDR_B_DQS#2
AR38
DDR_B_DQS2
AT32
DDR_B_DQS#3
AR32
DDR_B_DQS3
AR25
DDR_B_DQS#6
AR27
DDR_B_DQS6
AR22
DDR_B_DQS#7
AR21
DDR_B_DQS7
AN43 AP43 AT13
DDR3_DRAMRST#
AR18
SM_RCOMP0
AT18
SM_RCOMP1
AU18
SM_RCOMP2
@ESD@
12
CC258 0.1U_0402_16V7K
M_CLK_B_DDR#0 17 M_CLK_B_DDR#1 17 M_CLK_B_DDR0 17 M_CLK_B_DDR1 17
DDR_B_CKE0 17 DDR_B_CKE1 17 DDR_B_CKE2 17 DDR_B_CKE3 17
DDR_B_CS0# 17 DDR_B_CS1# 17 DDR_B_ODT0 17
DDR_B_CAA_0 17 DDR_B_CAA_1 17 DDR_B_CAA_2 17 DDR_B_CAA_3 17 DDR_B_CAA_4 17 DDR_B_CAA_5 17 DDR_B_CAA_6 17 DDR_B_CAA_7 17 DDR_B_CAA_8 17 DDR_B_CAA_9 17 DDR_B_CAB_0 17 DDR_B_CAB_1 17 DDR_B_CAB_2 17 DDR_B_CAB_3 17 DDR_B_CAB_4 17 DDR_B_CAB_5 17 DDR_B_CAB_6 17 DDR_B_CAB_7 17 DDR_B_CAB_8 17 DDR_B_CAB_9 17
DDR_A_DQS#2 16 DDR_A_DQS2 16 DDR_A_DQS#3 16 DDR_A_DQS3 16 DDR_A_DQS#6 16 DDR_A_DQS6 16 DDR_A_DQS#7 16 DDR_A_DQS7 16 DDR_B_DQS#2 17 DDR_B_DQS2 17 DDR_B_DQS#3 17 DDR_B_DQS3 17
DDR_B_DQS#6 17 DDR_B_DQS6 17 DDR_B_DQS#7 17 DDR_B_DQS7 17
T91TP@ T87TP@ T92TP@
1 2
RC38 200_0402_1%
1 2
RC39 80.6_0402_1%
1 2
RC40 162_0402_1%
DDR3_DRAMRST#
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2011/06/29 2011/06/29
2011/06/29 2011/06/29
2011/06/29 2011/06/29
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SLK-U(2/12)LPDDR3
SLK-U(2/12)LPDDR3
SLK-U(2/12)LPDDR3
LA-C482P
LA-C482P
LA-C482P
1
545Thursday, May 28, 2015
545Thursday, May 28, 2015
545Thursday, May 28, 2015
0.3
0.3
0.3
of
of
of
5
UC1E
PCH_SPI_CLK_R
D D
CC131
10P_0402_50V8J
@EMI@
To TPM
C C
1 2
EMI@
RC52 15_0402_5%
2
1
EC_KBRST#29
SERIRQ28,29
SML1CLK
SML1DATA
6 1
QC2A
L2N7002DW1T1G 2N SC88-6
PCH_SPI_CLK PCH_SPI_SO PCH_SPI_SI PCH_SPI_SIO2 PCH_SPI_SIO3 PCH_SPI_CS#0
EC_KBRST#
SERIRQ
LPC Mode
2
3 4
QC2B
L2N7002DW1T1G 2N SC88-6
Single SPI ROM_CS0#
B B
From EC (For share ROM)
To SPI ROM
EC_SPI_SO29
EC_SPI_SI29
EC_SPI_CS0#29
PCH_SPI_CLK_R29
AV2
SPI0_CLK
AW3
SPI0_MISO
AV3
SPI0_MOSI
AW2
SPI0_IO2
AU4
SPI0_IO3
AU3
SPI0_CS0#
AU2
SPI0_CS1#
AU1
SPI0_CS2#
M2
GPP_D1/SPI1_CLK
M3
GPP_D2/SPI1_MISO
J4
GPP_D3/SPI1_MOSI
V1
GPP_D21/SPI1_IO2
V2
GPP_D22/SPI1_IO3
M1
GPP_D0/SPI1_CS#
G3
CL_CLK
G2
CL_DATA
G1
CL_RST#
AW13
GPP_A0/RCIN#
AY11
GPP_A6/SERIRQ
SKL-U_BGA1356
+3VS
5
RPC7 and RC37 are close UC2
EC_SPI_SO EC_SPI_SI
EC_SPI_CS0#
PCH_SPI_CLK_R
4
SPI - FLASH
SPI - TOUCH
C LINK
EC_SMB_CK2 9,29
EC_SMB_DA2 9,29
RPC6
18
PCH_SPI_HOLD#PCH_SPI_SIO3
27
PCH_SPI_SI_RPCH_SPI_SI
36
PCH_SPI_WP#PCH_SPI_SIO2
45
PCH_SPI_SO_RPCH_SPI_SO
15_0804_8P4R_5%
RPC8
18
PCH_SPI_SO_R
27
PCH_SPI_SI_R
36 45
PCH_SPI_CS#0
15_0804_8P4R_5%
SKL-U
SMBUS, SMLINK
GPP_B23/SML1ALERT#/PCHHOT#
LPC
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
5 OF 20
SPI ROM(2/4/8/16MByte)
PCH_SPI_CS#0
PCH_SPI_WP#
3
Rev_1.0
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_A1/LAD0/ESPI_IO0 GPP_A2/LAD1/ESPI_IO1 GPP_A3/LAD2/ESPI_IO2 GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
UC2
1
/CS
2
DO(IO1)
3 4
/HOLD(IO3) /WP(IO2) GND
W25Q64FVSSIQ_SO8
SA000039A30
VCC
CLK
DI(IO0)
R7 R8 R10
R9 W2 W1
W3 V3 AM7
AY13 BA13 BB13 AY12 BA12 BA11
AW9 AY9 AW11
SMBCLK SMBDATA SMBALERT#
SML0CLK SML0DATA SML0ALERT#
SML1CLK SML1DATA SML1ALERT#
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# SUS_STAT#
CLK_PCI0 CLK_PCI1 CLKRUN#
+3V_SPI
8 7
PCH_SPI_HOLD#PCH_SPI_SO_R
6
PCH_SPI_CLK_R
5
PCH_SPI_SI_R
RC45 22_0402_5%EMI@ RC53 22_0402_5%EMI@
1 2
2
SML0ALERT# (Internal Pull Down): eSPI or LPC 0 = LPC is selected for EC --> For KB9022/9032 Use 1 = eSPI is selected for EC --> For KB9032 Only.
SMBCLK 30 SMBDATA 30
T88TP@
T90TP@
LPC_AD0 28,29 LPC_AD1 28,29 LPC_AD2 28,29 LPC_AD3 28,29 LPC_FRAME# 28,29
1 2 1 2
CC8
0.1U_0402_16V7K
T252TP@
@RF@
CC255
22P_0201_25V8
SMB
(Link to XDP, DDR, TP)
SML1
(Link to EC,DGPU, Thermal Sensor)
CLK_PCI_LPC 29 CLK_PCI_TPM 28
1
1
@RF@
CC256
22P_0201_25V8
2
2
1
SMBALERT#
SML1ALERT#
SML0ALERT#
EC_KBRST#
SML0CLK
SML0DATA
SML1CLK SML1DATA SMBDATA SMBCLK
PCH_SPI_SIO2
PCH_SPI_SIO3
PCH_SPI_CS#0
1 2
RC380 10K_0402_5%
1 2
RC379 150K_0402_1%
1 2
RC360 10K_0402_5%@
1 2
RC218 1K_0402_5%
1 2
RC381 10K_0402_5%
1 2
RC49 499_0402_1%
1 2
RC50 499_0402_1%
RPC7
1 8 2 7 3 6 4 5
1K_0804_8P4R_5%
1 2
RC383 1K_0402_5%@
1 2
RC384 1K_0402_5%@
1 2
RC357 1K_0402_5%@
Reserve For EC Auto Load Code
PCH_SPI_SIO3
1 2
RC51 1K_0402_1%@ES@
From WW36 MOW for SKL-U ES sample
CLKRUN#
SERIRQ
1 2
RC107 8.2K_0402_5%
1 2
RC122 8.2K_0402_5%
+3V_PRIM
+3VS
+3V_PRIM
+3V_SPI
+3VS
Follow 543016_SKL_U_Y_PDG_0_9
EON SA000046400 S IC FL 64M EN25Q64-104HIP SOP 8P MXIC SA00006N100 S IC FL 64M MX25L6473EM2I-10G SOP 8P
A A
5
4
WINBOND SA000039A30 S IC FL 64M W25Q64FVSSIQ SOIC 8P SPI ROM Micron SA00005L100 S IC FL 64M N25Q064A13ESEC0F SO8W 8P
Security Classification
Security Classification
Security Classification
2011/06/29 2011/06/29
2011/06/29 2011/06/29
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2011/06/29 2011/06/29
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SKL-U(3/12)SPI,ESPI,SMB,LPC
SKL-U(3/12)SPI,ESPI,SMB,LPC
SKL-U(3/12)SPI,ESPI,SMB,LPC
LA-C482P
LA-C482P
LA-C482P
1
of
645Thursday, May 28, 2015
of
645Thursday, May 28, 2015
of
645Thursday, May 28, 2015
0.3
0.3
0.3
5
4
3
2
1
UC1G
HDA_SYNC HDA_BIT_CLK HDA_SDOUT
HDA_SDIN026
HDA_SPKR9,26
T95 TP@
T100 TP@ T101 TP@
D D
HDA_SDIN0
HDA_RST#
SOC_GPIOF1 SOC_GPIOF0
HDA_SPKR
BA22 AY22 BB22 BA21 AY21
AW22
AY20
AW20
AK7 AK6 AK9
AK10
AW5
J5
H5 D7
D8 C8
AUDIO
HDA_SYNC/I2S0_SFRM HDA_BLK/I2S0_SCLK HDA_SDO/I2S0_TXD HDA_SDI0/I2S0_RX D HDA_SDI1/I2S1_RX D HDA_RST#/I2S1_SCLK GPP_D23/I2S_MCLK I2S1_SFRM I2S1_TXD
GPP_F1/I2S2_SFRM GPP_F0/I2S2_SCLK GPP_F2/I2S2_TXD GPP_F3/I2S2_RXD
GPP_D19/DMIC_CLK0 GPP_D20/DMIC_DATA0
GPP_D17/DMIC_CLK1 GPP_D18/DMIC_DATA1
GPP_B14/SPKR
SKL-U_BGA1356
HDA for AUDIO
C C
HDA_SYNC_AUDIO26
HDA_RST_AUDIO#26
HDA_SDOUT_AUDIO26
HDA_BITCLK_AUDIO26
B B
RC371
1
CC241 22P_0201_25V8
2
@EMI@
RPC9
1 8 2 7 3 6 4 5
33_0804_8P4R_5%
1 2
EMI@
33_0402_5%
HDA_SYNC HDA_RST# HDA_SDOUT
HDA_BIT_CLK
A36 B36 C38 D38 C36 D36 A38 B38
C31 D31 C33 D33 A31 B31 A33 B33
A29 B29 C28 D28 A27 B27 C27 D27
ME_FLASH_EN29
UC1I
CSI-2
CSI2_DN0 CSI2_DP0 CSI2_DN1 CSI2_DP1 CSI2_DN2 CSI2_DP2 CSI2_DN3 CSI2_DP3
CSI2_DN4 CSI2_DP4 CSI2_DN5 CSI2_DP5 CSI2_DN6 CSI2_DP6 CSI2_DN7 CSI2_DP7
CSI2_DN8 CSI2_DP8 CSI2_DN9 CSI2_DP9 CSI2_DN10 CSI2_DP10 CSI2_DN11 CSI2_DP11
SKL-U_BGA1356
SKL-U
SDIO / SDXC
GPP_G1/SD_DATA0 GPP_G2/SD_DATA1 GPP_G3/SD_DATA2 GPP_G4/SD_DATA3
GPP_A17/SD_PWR_EN#/ISH_GP7
GPP_A16/SD_1P8_SEL
7 OF 20
ME_FLASH_EN HDA_SDOUT
SKL-U
GPP_D4/FLASHTRIG
EMMC
GPP_F13/EMMC_DATA0 GPP_F14/EMMC_DATA1 GPP_F15/EMMC_DATA2 GPP_F16/EMMC_DATA3 GPP_F17/EMMC_DATA4 GPP_F18/EMMC_DATA5 GPP_F19/EMMC_DATA6 GPP_F20/EMMC_DATA7
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
9 OF 20
GPP_F12/EMMC_CMD
1 2
RC77 0_0402_5%
Rev_1.0
CSI2_CLKN0 CSI2_CLKP0 CSI2_CLKN1 CSI2_CLKP1 CSI2_CLKN2 CSI2_CLKP2 CSI2_CLKN3 CSI2_CLKP3
CSI2_COMP
EMMC_RCOMP
C37 D37 C32 D32 C29 D29 B26 A26
E13
CSI2_COMP
B7
AP2 AP1 AP3 AN3 AN1 AN2 AM4 AM1
AM2 AM3 AP4
AT1
EMMC_RCOMP
Rev_1.0
GPP_G0/SD_CMD
GPP_G5/SD_CD# GPP_G6/SD_CLK
GPP_G7/SD_WP
SD_RCOMP
GPP_F23
AB11
PROJECT_ID1
AB13
PROJECT_ID2
AB12
PROJECT_ID3
W12
PROJECT_ID4
W11
SDRAM_ID1
W10
SDRAM_ID2
W8
SDRAM_ID3
W7
SDRAM_ID4
BA9 BB9
AB7
SD_RCOMP
RC76 200_0402_1%
AF13
RC80 100_0402_1%
T121 TP@
RC227 200_0402_1%
12
12
T102 TP@
PROJECT_ID1
PROJECT_ID2
13" (Valrhona)
0
0
14" (Lindt) 15" (Puccini)
1
0
0
1
17" (Maison)
1
1
UMA DIS
PROJECT_ID3
0 1
SKL-U SKL-H
12
PROJECT_ID4
+3V_PRIM +3V_PRIM +3V_PRIM +3V_PRIM
12
RC377 10K_0402_5%
@
PROJECT_ID4 PROJECT_ID3 PROJECT_ID2 PROJECT_ID1
12
RC376 10K_0402_5%
+3V_PRIM +3V_PRIM +3V_PRIM +3V_PRIM
12
RC83 10K_0402_5%
SDRAM_ID1 SDRAM_ID2 SDRAM_ID3 SDRAM_ID4
@
12
RC88 10K_0402_5%
@
0 1
12
RC130 10K_0402_5%
@
12
RC131 10K_0402_5%
12
RC84 10K_0402_5%
@
12
RC89 10K_0402_5%
@
12
RC127 10K_0402_5%
@
12
RC128 10K_0402_5%
12
RC85 10K_0402_5%
@
12
RC90 10K_0402_5%
@
12
RC129 10K_0402_5%
@
12
RC228 10K_0402_5%
12
RC134 10K_0402_5%
@
12
RC135 10K_0402_5%
@
A A
Security Classification
Security Classification
Security Classification
2011/06/29 2011/06/29
2011/06/29 2011/06/29
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2011/06/29 2011/06/29
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet of
Compal Electronics, Inc.
SKL-U(4/12)HDA,EMMC,SD
SKL-U(4/12)HDA,EMMC,SD
SKL-U(4/12)HDA,EMMC,SD
LA-C482P
LA-C482P
LA-C482P
745Thursday, May 28, 2015
of
745Thursday, May 28, 2015
of
745Thursday, May 28, 2015
1
0.3
0.3
0.3
5
4
3
2
1
+RTCVCC
1 2
RC91 20K_0402_5%
1 2
CC10 1U_0402_6.3V6K
1 2
CLRP1 SHORT PADS
1 2
RC93 20K_0402_5%
1 2
D D
+3VALW_DSW
+3V_PRIM
C C
+3VALW_DSW
B B
+3V_PRIM
+3VALW_DSW
CC11 1U_0402_6.3V6K
1 2
CLRP2 SHORT PADS
1 2
RC94 1M_0402_5%
+3VS
From 545659_SKL_PCH_U_Y_EDS_R0_7
1 2
RC165 10K_0402_5%
1 2
RC105 10K_0402_5%
10K_0804_8P4R_5%
10K_0804_8P4R_5%
1 2
CC253 0.1U_0402_16V7K
CC251 0.1U_0402_16V7K
CLRP3 SHORT PADS
1 2
RC100 1K_0402_5%
RC101 100K_0402_5%
1 2
RC103 8.2K_0402_5%
1 2
RC104 1K_0402_5%
1 2
RC106 10K_0402_5%@
1 2
RC115 10K_0402_5%@
RC111 100K_0402_5%@
RPC10
RPC11
@ESD@
@ESD@
@
12
12
18 27 36 45
18 27 36 45
12
12
CLKREQ_PCIE#4
CLKREQ_PCIE#5
GPU_CLKREQ# MINI1_CLKREQ# LAN_CLKREQ# CR_CLKREQ#
PCH_PWROK LAN_WAKE# PCH_RSMRST# SYS_RESET#
0.1U_0402_16V7K
CC248
@ESD@
SYS_PWROK
SYS_RESET#
SUSCLK
PCH_DPWROK
PM_BATLOW#
WAKE#
AC_PRE SENT_R
SOC_VRALERT#
PBTN_OUT#_R
PCH_SRTCRST#
CLR ME
PCH_RTCRST#
CLR CMOS
SM_INTRUDER#
1
2
1
CC249
0.047U_0402_16V7K
2
@ESD@
CC252 0.1U_0402_16V7K
WLAN
CardReader
PCH PLTRST Buffer
PLT_RST#_PCH
CC250
0.1U_0402_16V7K
@ESD@
Only For Power Sequence Debug
@ESD@
12
H_CPUPWRGD
RC99 0_0402_5%@
1
2
T140 TP@
1
IN1
2
IN2
1 2
+3VS
5
P
G
3
RC102 1K_0402_5%@
CLK_PCIE_MINI1#22
CLK_PCIE_MINI122
MINI1_CLKREQ#22
CLK_PCIE_CR#23
CLK_PCIE_CR23
CR_CLKREQ#23
CC14
1 2
0.1U_0402_16V7K
4
O
UC3 SN74AHC1G08DCKR_SC70-5
PCH_RSMRST#29
1 2
SYS_PWROK29 PCH_PWROK29
PCH_SUSWARN#29
WAKE#23
T145 TP@
PLT_RST#
GPU_CLKREQ#
LAN_CLKREQ#
CLK_PCIE_MINI1# CLK_PCIE_MINI1 MINI1_CLKREQ#
CLK_PCIE_CR# CLK_PCIE_CR CR_CLKREQ#
CLKREQ_PCIE#4
CLKREQ_PCIE#5
PLT_RST# 2 2,23,28,29
PLT_RST#_PCH SYS_RESET# PCH_RSMRST#
H_CPUPWRGD EC_VCCST_PG
SYS_PWROK PCH_PWROK PCH_DPWROK_R
PCH_SUSWARN# SUSACK#_R
WAKE# LAN_WAKE#
UC1J
D42
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
AR10
GPP_B5/SRCCLKREQ0#
B42
CLKOUT_PCIE_N1
A42
CLKOUT_PCIE_P1
AT7
GPP_B6/SRCCLKREQ1#
D41
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2#
D40
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3
AT10
GPP_B8/SRCCLKREQ3#
B40
CLKOUT_PCIE_N4
A40
CLKOUT_PCIE_P4
AU8
GPP_B9/SRCCLKREQ4#
E40
CLKOUT_PCIE_N5
E38
CLKOUT_PCIE_P5
AU7
GPP_B10/SRCCLKREQ5#
SKL-U_BGA1356
UC1K
SYSTEM POWER MANAGEMENT
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PW ROK
AR13
GPP_A13/SUSWARN#/S USPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
SKL-U_BGA1356
DC4 CH751H-40PT_SOD323-2
SKL-U
CLOCK SIGNALS
10 OF 20
SKL-U
11 OF 20
DC3
CH751H-40PT_SOD323-2
2 1
Rev_1.0
CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P
GPD8/SUSCLK
XCLK_BIASREF
PCH_XTAL24_IN
PCH_XTAL24_OUT PCH_RTCX1
GPP_B12/SLP_S0#
GPD10/SLP_S5#
GPD9/SLP_WLAN#
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW#
GPP_B11/EXT_PW R_GATE#
GPP_B2/VRALERT#
21
PCH_PWROKPCH _RSMRST#
SPOK
F43 E43
BA17
SUSCLK
E37
XTAL24_IN
XTAL24_OUT
RTCX1 RTCX2
SRTCRST#
RTCRST#
CC12
15P_0402_50V8J
<Cocoa_1020> 32M use these part (SJ10000NM00, SJ10000MH00) just can meet <50k ohm spec 24M: SJ10000DI00, SJ10000CS00
GPD4/SLP_S3# GPD5/SLP_S4#
SLP_SUS# SLP_LAN#
GPD6/SLP_A#
GPP_A11/PME#
INTRUDER#
PCH_XTAL24_IN
E35
PCH_XTAL24_OUT
E42
XCLK_B IASREF
AM18
PCH_RTCX1
AM20
PCH_RTCX2
AN18
PCH_SRTCRST#
AM16
PCH_RTCRST#
1 2
RC92 1M_0402_5%
YC1
3
3
GND
4
24MHZ 12PF 20PPM X3G024000DC1H
Rev_1.0
AT11 AP15 BA16 AY16
AN15 AW15 BB17 AN16
BA15 AY15 AU13
AU11 AP16
AM10 AM11
SPOK 25
1
1
GND
2
PM_SLP_S0# PM_SLP_S3# PM_SLP_S4# PM_SLP_S5#
PM_SLP_SUS# SLP_LAN# SLP_WLAN# PM_SLP_A#
PBTN_OUT#_R AC_PRE SENT_R PM_BATLOW#
SM_INTRUDER#
EXT_PWR_GATE# SOC_VRALERT#
RC96 2.7K_0402_1%
SUSCLK 22
1 2
PCH_RTCX2
CC13
15P_0402_50V8J
T163TP@
PM_SLP_S3# 29 PM_SLP_S4# 11,29
T164TP@
PM_SLP_SUS# 12,29
T162TP@
T142TP@
T165TP@
T143TP@
T144TP@
RC98 10M_0402_5%
YC2
1
CC15
8.2P_0402_50V
2
+1.0V_CLK5_F24NS
1 2
1 2
SJ10000Q300
32.768KHZ_9PF
1
2
CC16
8.2P_0402_50V
From EC(open-drain)
A A
EC_VCCST_PG_R29
+1.0V_VCCST
12
RC113 1K_0402_5%
1 2
RC116 60.4_0402_1%
5
EC_VCCST_PG
4
PCH_DPWROK29
PBTN_OUT#29
ACIN29
SUSACK#29
PBTN_OUT# PBTN_OUT#_R
SUSACK# SUSACK#_R
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
RC230 0_0402_5%Short@
RC109 0_0402_5%Short@
RC108 0_0402_5%Short@
RC110 0_0402_5%Short@
2011/06/29 2011/06/29
2011/06/29 2011/06/29
2011/06/29 2011/06/29
12
12
12
12
PCH_DPWROK_RPCH_DPWROK
AC_PRE SENT_RACIN
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SLK-U(5/12)CLK,GPIO
SLK-U(5/12)CLK,GPIO
SLK-U(5/12)CLK,GPIO
LA-C482P
LA-C482P
LA-C482P
1
845Thursday, May 28, 2015
845Thursday, May 28, 2015
845Thursday, May 28, 2015
0.3
0.3
0.3
of
of
of
5
D D
T152 TP@
1 2
BT_ON22
WL_OFF#22
12
I2C_ 1_SD A19 I2C_ 1_SC L19
RC385 0_0402_5%
UART_2_CRXD_DTXD
2
RC386
@
10U_0603_6.3V6M
1
UART_2_CTXD_DRXD
CCD_EN19
RC387
+5VS
For BIOS Debug
@
10U_0603_6.3V6M
<Touch PAD/PNL>
C C
GC6_FB_EN GSPI0_MOSI
SOC_GPIOB21 GSPI1_MOSI
BT_ON GPU_EVENT# WL_OFF#
I2C_ 1_SD A I2C_ 1_SC L
4
UC1F
AN8 AP7 AP8 AR7
AM5
CCD_EN_RCCD_EN
AN7 AP5 AN5
AB1 AB2
W4
AB3
AD1 AD2 AD3 AD4
U7 U6
U8 U9
AH9
AH10
AH11 AH12
AF11 AF12
LPSS ISH
GPP_B15/GSPI0_CS# GPP_B16/GSPI0_CLK GPP_B17/GSPI0_MISO GPP_B18/GSPI0_MOSI
GPP_B19/GSPI1_CS# GPP_B20/GSPI1_CLK GPP_B21/GSPI1_MISO GPP_B22/GSPI1_MOSI
GPP_C8/UART0_RXD GPP_C9/UART0_TXD GPP_C10/UART0_RTS# GPP_C11/UART0_CTS#
GPP_C20/UART2_RXD GPP_C21/UART2_TXD GPP_C22/UART2_RTS# GPP_C23/UART2_CTS#
GPP_C16/I2C0_SDA GPP_C17/I2C0_SCL
GPP_C18/I2C1_SDA GPP_C19/I2C1_SCL
GPP_F4/I2C2_SDA GPP_F5/I2C2_SCL
GPP_F6/I2C3_SDA GPP_F7/I2C3_SCL
GPP_F8/I2C4_SDA GPP_F9/I2C4_SCL
SKL-U_BGA1356
SKL-U
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
Sx_EXIT_HOLDOFF# / GPP_A12 / BM_BUSY# / ISH_GP6
6 OF 20
3
Rev_1.0
GPP_D9 GPP_D10 GPP_D11 GPP_D12
GPP_D5/ISH_I2C0_SDA GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA GPP_D8/ISH_I2C1_SCL
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
GPP_D15/ISH_UART0_RTS#
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_A18/ISH_GP0 GPP_A19/ISH_GP1 GPP_A20/ISH_GP2 GPP_A21/ISH_GP3 GPP_A22/ISH_GP4 GPP_A23/ISH_GP5
P2 P3 P4 P1
M4 N3
N1 N2
AD11 AD12
U1 U2 U3 U4
AC1 AC2 AC3 AB4
AY8 BA8 BB7 BA7 AY7 AW7 AP13
DGPU_PWR_EN DGPU_HOLD_RST# HDDHALT_LED#
ACCEL_ INT#
SOC_GPIOA12
T147 TP@
T159 TP@
2
EC_SCI#4
<Cocoa_1027> Follow #544669 GPIO I/O setting
EC_SCI# SOC_GPIOB21 HDDHALT_LED# GPU_EVENT#
DGPU_PWR_EN
ACCEL_ INT#
WL_OFF#
1
RPC14
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
1 2
RC373
RC95
RC382 10K_0402_5%
RC226 10K_0402_5%
1 2
@
1 2
1 2
10K_0402_5%
10K_0402_5%
+3V_PRIM
+3VS
Functional Strap Definitions
SPKR (Internal Pull Do wn):
TOP Swap Override
0 = Disable TOP Sw ap mode.--- > AAX05 Use
1 = Enable TOP Swap Mode.
B B
GSPI0_MOSI (Internal Pull Down):
No Reboot
0 = Disable No Reb oot mode. - -> AAX05 Use
1 = Enable No Reb oot Mode. (PC H will disable the TCO Timer system reboot feature). T his function is useful when running ITP/XDP.
Strap Pin
+3VS
@
1 2
RC117 100K_0402_5%
@
1 2
RC118 4.7K_0402_5%
@
1 2
RC201 150K_0402_1%
1 2
RC223 1K_0402_1%
1 2
RC224 1K_0402_1%
<Cocoa_1020> 1K ohm for 400kHz speed/ 0.5k ohm for 1MHz speed
HDA_SPKR
GSPI0_MOSI
GSPI1_MOSI
I2C_ 1_SC L
HDA_SPKR 7,26
+3VS
1
2
CC132
1 2
2200P_0402_50V7K
1 2
RC221 33K_0402_5%
THERMAL SENSOR
0.1U_0402_16V7K CC133
H_THERMDA
H_THERMDC
CPU_THERM#
Thermal sensor SMBus address -->100-1_100xb : 0x4C (x=0)Write Address(0x98h) (x=1)Read Address(0x99h)
SA000067P00
UC9
1
VDD
2
D+
3
D-
THERM#4GND
NCT7718W_MSOP8
SCLK
SDATA
ALERT#
8
7
6
5
EC_SMB_CK2
EC_SMB_DA2
THERMAL_ALERT#I2C_ 1_SD A
EC_SMB_CK2 6,29
EC_SMB_DA2 6,29
THERMAL_ALERT# 29
1 2
RC222 10K_0402_5%
+3VS+3VS
GSPI1_MOSI (Internal Pull Down):
Boot BIOS Strap Bit
0 = SPI Mode -- > AAX05 Use
1 = LPC Mode
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2011/06/29 2011/06/29
2011/06/29 2011/06/29
2011/06/29 2011/06/29
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SKL-U(6/12)GPIO
SKL-U(6/12)GPIO
SKL-U(6/12)GPIO
LA-C482P
LA-C482P
LA-C482P
1
945Thursday, May 28, 2015
945Thursday, May 28, 2015
945Thursday, May 28, 2015
0.3
0.3
0.3
of
of
of
5
D D
PCIE_PRX_DTX_N622
WLAN
SATA SSD
C C
CardReader
When PCIE8/SATA1A is used as SATA Port 1 (ODD), then PCIE11/SATA1B (M.2 SSD) cannot be used as SATA Port 1.
B B
A A
PCIE_PRX_DTX_P622 PCIE_PTX_C_DRX_N622 PCIE_PTX_C_DRX_P622
SATA_PRX_DTX_N021 SATA_PRX_DTX_P021 SATA_PTX_DRX_N021 SATA_PTX_DRX_P021
PCIE_PRX_DTX_N923
PCIE_PRX_DTX_P923 PCIE_PTX_C_DRX_N923 PCIE_PTX_C_DRX_P923
CC20 0.1U_0402_16V7K CC19 0.1U_0402_16V7K
CC22 0.1U_0402_16V7K CC21 0.1U_0402_16V7K
RC120 100_0402_1%
XDP_PREQ#4
1 2
T178 TP@
4
UC1H
PCIE / USB3 / SATA
H13
PCIE1_RXN/USB3_5_RXN
G13
PCIE1_RXP/USB3_5_RXP
B17
PCIE1_TXN/USB3_5_TXN
A17
PCIE1_TXP/USB3_5_TXP
G11
PCIE2_RXN/USB3_6_RXN
F11
PCIE2_RXP/USB3_6_RXP
D16
PCIE2_TXN/USB3_6_TXN
C16
PCIE2_TXP/USB3_6_TXP
H16
PCIE3_RXN
G16
PCIE3_RXP
D17
PCIE3_TXN
C17
PCIE3_TXP
G15
PCIE4_RXN
F15
PCIE4_RXP
B19
PCIE4_TXN
A19
PCIE4_TXP
F16
PCIE5_RXN
E16
PCIE5_RXP
C19
PCIE5_TXN
D19
PCIE5_TXP
G18
PCIE6_RXN
F18
PCIE6_RXP
D20
PCIE6_TXN
C20
PCIE6_TXP
F20
PCIE7_RXN/SATA0_RXN
E20
PCIE7_RXP/SATA0_RXP
B21
PCIE7_TXN/SATA0_TXN
A21
PCIE7_TXP/SATA0_TXP
G21
PCIE8_RXN/SATA1A_RXN
F21
PCIE8_RXP/SATA1A_RXP
D21
PCIE8_TXN/SATA1A_TXN
C21
PCIE8_TXP/SATA1A_TXP
E22
PCIE9_RXN
E23
PCIE9_RXP
B23
PCIE9_TXN
A23
PCIE9_TXP
F25
PCIE10_RXN
E25
PCIE10_RXP
D23
PCIE10_TXN
C23
PCIE10_TXP
F5
PCIE_RCOMPN
E5
PCIE_RCOMPP
D56
PROC_PRDY#
D61
PROC_PREQ#
BB11
GPP_A7/PIRQA#
E28
PCIE11_RXN/SATA1B_RXN
E27
PCIE11_RXP/SATA1B_RXP
D24
PCIE11_TXN/SATA1B_TXN
C24
PCIE11_TXP/SATA1B_TXP
E30
PCIE12_RXN/SATA2_RXN
F30
PCIE12_RXP/SATA2_RXP
A25
PCIE12_TXN/SATA2_TXN
B25
PCIE12_TXP/SATA2_TXP
SKL-U_BGA1356
12 12
12 12
XDP_PRDY# XDP_PREQ# SOC_GPIOA7
PCIE_PRX_DTX_N6 PCIE_PRX_DTX_P6 PCIE_PTX_DRX_N6 PCIE_PTX_DRX_P6
SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0
PCIE_PRX_DTX_N9 PCIE_PRX_DTX_P9 PCIE_PTX_DRX_N9 PCIE_PTX_DRX_P9
PCIE_RCOMPN PCIE_RCOMPP
3
GPIO
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
DEVSLP0
DEVSLP1
DEVSLP2
SATA_GP0
SATA_GP1
SATA_GP2
SKL-U
8 OF 20
DEVICE CONTROL
USB2 Port 1&2
USB2 Port 3
NA
NA
NGFF SSD KEY B
NA
NA
NA
NA
NA
SSIC / USB3
USB3_2_RXN / SSI C_RXN USB3_2_RXP / SSI C_RXP
USB3_2_TXN / SS IC_TXN USB3_2_TXP / S SIC_TXP
USB2
USB2_VBUSSENSE
GPP_E9/USB2_OC0# GPP_E10/USB2_OC1# GPP_E11/USB2_OC2# GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0 GPP_E5/DEVSLP1 GPP_E6/DEVSLP2
GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1 GPP_E2/SATAXPCIE2/SATAGP2
GPP_E8/SATALED#
Rev_1.0
USB3_1_RXN
USB3_1_RXP USB3_1_TXN USB3_1_TXP
USB3_3_RXN
USB3_3_RXP USB3_3_TXN USB3_3_TXP
USB3_4_RXN
USB3_4_RXP USB3_4_TXN USB3_4_TXP
USB2N_1 USB2P_1
USB2N_2 USB2P_2
USB2N_3 USB2P_3
USB2N_4 USB2P_4
USB2N_5 USB2P_5
USB2N_6 USB2P_6
USB2N_7 USB2P_7
USB2N_8 USB2P_8
USB2N_9 USB2P_9
USB2N_10 USB2P_10
USB2_COMP
USB2_ID
2
H8
USB3_RX1_N
G8
USB3_RX1_P
C13
USB3_TX1_N
D13
USB3_TX1_P
J6
USB3_RX2_N
H6
USB3_RX2_P
B13
USB3_TX2_N
A13
USB3_TX2_P
J10
USB3_RX3_N
H10
USB3_RX3_P
B15
USB3_TX3_N
A15
USB3_TX3_P
E10 F10 C15 D15
AB9
USB20_N1
AB10
USB20_P1
AD6
USB20_N2
AD7
USB20_P2
AH3
USB20_N3
AJ3
USB20_P3
AD9 AD10
AJ1
USB20_N5
AJ2
USB20_P5
AF6 AF7
AH1
USB20_N7
AH2
USB20_P7
AF8 AF9
AG1
USB20_N9
AG2
USB20_P9
AH7 AH8
AB6
USB2_COMP
AG3
USB2_ID
AG4
USB2_VBUSSENSE
A9
USB_OC0#
C9
USB_OC1#
D9
USB_OC2#
B9
USB_OC3#
J1
DEVSLP0
J2
DEVSLP1
J3
DEVSLP2
H2
SATA_GP0
H3
SATA_GP1
G4
SATA_GP2
H1
SATA_LED#
USB3_RX1_N 24 USB3_RX1_P 24 USB3_TX1_N 24 USB3_TX1_P 24
USB3_RX2_N 24 USB3_RX2_P 24 USB3_TX2_N 24 USB3_TX2_P 24
USB3_RX3_N 25 USB3_RX3_P 25 USB3_TX3_N 25 USB3_TX3_P 25
USB20_N1 24 USB20_P1 24
USB20_N2 24 USB20_P2 24
USB20_N3 25 USB20_P3 25
USB20_N5 19 USB20_P5 19
USB20_N7 22 USB20_P7 22
USB20_N9 31 USB20_P9 31
1 2
RC119 113_0402_1%
1 2
RC388 0_0402_5%
1 2
RC389 0_0402_5%
USB_OC0# 24
USB_OC1# 25
DEVSLP0 21
T253 TP@ T181 TP@
SOC_GPIOA7
SATA_GP2 SATA_GP1 SATA_LED# SATA_GP0
USB_OC1# USB_OC3# USB_OC0# USB_OC2#
1 2
RC361 10K_0402_5%
RPC13
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
RPC20
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
1
USB2/3 Right
USB2/3 Right
USB2/3 Left (Charger)
USB2/3 Right
USB2/3 Right
USB2/3 Left (Charger)
Camera
WLAN/BT
FingerPrint
+3VS
+3V_PRIM
Security Classification
Security Classification
Security Classification
2011/06/29 2011/06/29
2011/06/29 2011/06/29
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2011/06/29 2011/06/29
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet of
Compal Electronics, Inc.
SKL-U(7/12)PCIE,USB,SATA
SKL-U(7/12)PCIE,USB,SATA
SKL-U(7/12)PCIE,USB,SATA
LA-C482P
LA-C482P
LA-C482P
10 45Thursday, May 28, 2015
of
10 45Thursday, May 28, 2015
of
10 45Thursday, May 28, 2015
1
0.3
0.3
0.3
5
4
3
2
1
+5VALW +1.0V_VCCSTU+1.0V_PRIM
1U_0402_6.3V6K
CC98
D D
1 2
SYSON29,39,41
PM_SLP_S4#8,29
For Power consumption Measure ment
+1.0V_PRIM +1.0V_PRIM_JP
C C
1 2
RC146 0_0805_5%
RC142 0_0402_5%
RC144 0_0402_5%@
Imax : 2.77 A
1 2
1
2
1U_0402_6.3V6K
CC97
1
@
2
EN_1.0V_VCCSTU
UC5
1 2
3
4
5
6 7
VOUT1
VIN1
VOUT1
VIN1
ON1
VBIAS
ON2
VIN2
VOUT2
VIN2
VOUT2
EM5209VF_DFN14_2X3
CT1
GND
CT2
GPAD
14 13
12
CC95
11
10P_0402_50V8J 1000P_0402_50V7K
10
CC94
9 8
15
1 2
1 2
@
0.1U_0402_25V6
CC96
1
2
Follow 543977 _SKL_PDDG_Rev0_91 CC95 10pf -> 22us (Spec:<= 65us)
+1.0VS_VCCSTG
BSC Side
1U_0402_6.3V6K
1
CC142
2
+1.0V_PRIM TO +1.0VS_VCCSTG / +1.0VS_VCCIO
+5VALW
+1.0V_PRIM_JP
+1.0V_PRIM TO +1.0V_VCCSTU
0.1U_0402_25V6
CC88
1
2
@
B B
SUSP#29,32,39
EC_S0IX_EN29
For Verify S0IX
SUSP#
1 2
RC186 0_0402_5%
1 2
RC187 0_0402_5%
@
1U_0402_6.3V6K
CC117
1
2
UC6
1
VIN1
2
VIN2
7
VIN thermal
3
VBIAS
4
ON
TPS22961DNYR_WSON8
VOUT
GND
6
+1.0VS_VCCSTG_IO
5
RC208 Follow 544669_SKL_U__DDR3L_RVP7_Schematic_Rev0_53 CC47,CC54 Follow 549914_SKL_U_LPDDR3_RVP5
1 2
RC188 0_0402_5%Short@
1 2
RC189 0_0805_5%
+1.0VS_VCCSTG
+1.0VS_VCCIO
Imax : 2.73 A
@
1 2
CC89 0.1U_0402_25V6
@
1 2
CC90 0.1U_0402_25V6
+1.2V_VDDQ
+1.2V_VDDQC
+1.0V_VCCST
+1.0VS_VCCSTG
+1.0VS_VCCSTG_OC
+1.0V_VCCSFR
+1.0V_VCCSTU +1.0V_VCCST
RC140
1 2
Short@
0_0402_5%
RC143
1 2
Short@
0_0402_5%
PSC Side
1
2
+1.0V_VCCSFR
PSC Side
1
2
UC1N
SKL-U
AU23
VDDQ_AU23
AU28
VDDQ_AU28
AU35
VDDQ_AU35
AU42
VDDQ_AU42
BB23
VDDQ_BB23
BB32
VDDQ_BB32
BB41
VDDQ_BB41
BB47
VDDQ_BB47
BB51
VDDQ_BB51
AM40
VDDQC
A18
120
120
1U_0402_6.3V6K
CC48
1U_0402_6.3V6K
CC55
AL23
1
2
A22
K20 K21
0.1U_0201_10V6K
VCCST
VCCSTG_A22
VCCPLL_OC
VCCPLL_K20 VCCPLL_K21
SKL-U_BGA1356
CC62
CPU POWER 3 OF 4
14 OF 20
+5VALW
CC260
1
2
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
+1.2V_VDDQ
SUSP#
1U_0402_6.3V6K
VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO
VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA
Rev_1.0
AK28 AK30 AL30 AL42 AM28 AM30 AM42
AK23 AK25 G23 G25 G27 G28 J22 J23 J27 K23 K25 K27 K28 K30
AM23 AM22
H21 H20
1 2
RC390 0_0402_5%@
UC10
1
VIN
2
VIN
3
ON
4
VBIAS
SA00006U600
AOZ1336_DFN8_2X2
+1.0VS_VCCIO
VCCIO_SENSE VSSIO_SENSE
VSSSA_SENSE VCCSA_SENSE
VOUT VOUT
CT
GND GND
7 8
6
5 9
3.1A
4.5A
+VCC_SA
T182 TP@ T183 TP@
VSSSA_SENSE 42 VCCSA_SENSE 42
+1.0VS_VCCSTG_OC
1
CC259
1000P_0402_50V7K
2
BSC Side
0.1U_0201_10V6K
CC49
1
2
+1.0VS_VCCIO
10U_0402_6.3V6M
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
10U_0402_6.3V6M
1
1
1
1
2
A A
CC28
CC27
2
CC29
2
5
1
CC30
2
2
1U_0201_6.3V6K
1
CC31
CC32
2
PSC SideBSC Side
1U_0402_6.3V6K
1
2
1U_0402_6.3V6K
1
1
CC33
CC34
2
2
4
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CC36
CC35
2
+1.2V_VDDQC
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
BSC Side BSC SidePSC Side
1 2
RC208 0_0603_5%
10U_0603_6.3V6M
1U_0402_6.3V6K
1
1
2
CC54
CC47
2
2011/06/29 2011/06/29
2011/06/29 2011/06/29
2011/06/29 2011/06/29
3
+1.2V_VDDQ
10U_0603_6.3V6M
1
CC37
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
10U_0603_6.3V6M
1
1
CC38
2
2
+1.2V_VDDQ : 10UF/6.3V/0603 *9 1UF/6.3V/0402 * 4
Deciphered Date
Deciphered Date
Deciphered Date
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CC39
2
10U_0603_6.3V6M
1
CC40
CC41
2
2
1U_0402_6.3V6K
10U_0603_6.3V6M
1
2
1U_0402_6.3V6K
1
1
CC42
CC43
2
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1U_0402_6.3V6K
1U_0201_6.3V6K
CC44
1
1
2
CC46
CC45
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SKL-U(8/12)POWER
SKL-U(8/12)POWER
SKL-U(8/12)POWER
LA-C482P
LA-C482P
LA-C482P
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CC58
2
1
10U_0603_6.3V6M
1
1
CC59
CC60
2
2
0.3
0.3
0.3
of
11 45Thursday, May 28, 2015
of
11 45Thursday, May 28, 2015
of
11 45Thursday, May 28, 2015
5
+1.0V_PRIM
Follow 543016_SKL_U_Y_PDG_1_0
1 2
RC148 0_0603_5%short@
D D
Follow 543016_SKL_U_Y_PDG_1_0
1 2
RC152 0_0603_5%short@
Follow 543016_SKL_U_Y_PDG_1_0
1 2
RC190 0_0603_5%short@
C C
Imax : 2.57A
1 2
RC175 0_0402_5%short@
B B
Follow 543016_SKL_U_Y_PDG_1_0
1 2
RC169 0_0603_5%short@
1 2
RC162 0_0402_5%short@
1U_0402_6.3V6K
1
@
2
+1.0V_APLL
22U_0603_6.3V6M
CC123
1
@
@
2
+1.0V_CLK5_F24NS
@
+1.0V_CLK4_F100OC
22U_0603_6.3V6M
CC136
1
@
@
2
+1.0V_PRIM
@
+1.0V_MPHYAON
+1.0V_CLK6_24TBT
1U_0402_6.3V6K
1
CC75
CC86
@
@
2
+1.0V_DTS
22U_0603_6.3V6M
CC134
1
2
22U_0603_6.3V6M
CC130
1
2
22U_0603_6.3V6M
CC137
1
2
1U_0402_6.3V6K
1
CC76
2
1U_0402_6.3V6K
1
CC87
2
10U_0402_6.3V6M
10U_0402_6.3V6M
1
1
CC139
CC138
@
2
2
+3V_PRIM
RC150 0_0402_5%
1
CC72 1U_0402_6.3V6K
2
+3V_PRIM
RC197 0_0402_5%
1U_0402_6.3V6K
1
CC67
@
2
RC154 0_0402_5%short@
RC161 0_0402_5%short@
RC163 0_0402_5%short@
RC172 0_0402_5%@
RC167 0_0402_5%short@
RC171 0_0402_5%short@
Follow 543016_SKL_U_Y_PDG_0_9
+1.0V_PRIM +3V_PRIM +1.8V_PRIM
22U_0603_6.3V6M
A A
22U_0603_6.3V6M
CC111
CC112
1
1
@
@
2
2
22U_0603_6.3V6M
22U_0603_6.3V6M
CC114
CC113
1
1
@
@
2
2
22U_0603_6.3V6M
22U_0603_6.3V6M
CC115
CC116
1
1
@
@
2
2
+3VALW
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
RC173 0_0603_5%short@
4
1 2
+3V_HDA
1
CC63 1U_0402_6.3V6K
2
+3V_PGPPA
+3V_SPI
+3V_PGPPB
1U_0402_6.3V6K
1
CC102
2
+3V_PGPPC
1U_0402_6.3V6K
1
CC73
2
+3V_1.8V_PGPPD
RC206 0_0402_5%
1U_0402_6.3V6K
1
CC103
2
+3V_PGPPE
1U_0402_6.3V6K
1
CC74
2
+3V_PRIM_RTC
1U_0402_6.3V6K
1
CC140
2
1 2
0.1U_0201_10V6K
CC141
1
2
+3VALW_DSW
+1.8V_PRIM
3
+1.0V_PRIM
1U_0402_6.3V6K
1
CC91
2
696
1U_0402_6.3V6K
1
2
+1.0V_PRIM
1U_0402_6.3V6K
CC61
1U_0402_6.3V6K
1
2
+1.0V_PRIM
+1.0V_MPHYAON
1
+1.0V_APLL
+1.0V_PRIM
2
+3VALW_DSW
+1.0V_PRIM
+3V_HDA
+3V_SPI
+3V_PRIM
2.574A
22
836
88
26
118
68
11
642
33
+1.0VO_DSW
CC208
+1.0V_PRIM
1U_0402_6.3V6K
22U_0603_6.3V6M
22U_0603_6.3V6M
CC81
1
2
CC82
1
1
CC80
2
2
@
+1.0V_PRIM
1U_0402_6.3V6K
CC122
1
2
+1.0V_PRIM
CC68
Per 543016_SKL_U_Y_PDG_0_9
VCCRTC does not exceed 3.2 V From PDG
UC1O
AB19
VCCPRIM_1P0
AB20
VCCPRIM_1P0
P18
VCCPRIM_1P0
AF18
VCCPRIM_CORE
AF19
VCCPRIM_CORE
V20
VCCPRIM_CORE
V21
VCCPRIM_CORE
AL1
DCPDSW_1P0
K17
VCCMPHYAON_1P0
L1
VCCMPHYAON_1P0
N15
VCCMPHYGT_1P0_N15
N16
VCCMPHYGT_1P0_N16
N17
VCCMPHYGT_1P0_N17
P15
VCCMPHYGT_1P0_P15
P16
VCCMPHYGT_1P0_P16
K15
VCCAMPHYPLL_1P0
L15
VCCAMPHYPLL_1P0
V15
VCCAPLL_1P0
AB17
VCCPRIM_1P0_AB17
Y18
VCCPRIM_1P0_Y18
AD17
VCCDSW_3P3_AD17
AD18
VCCDSW_3P3_AD18
AJ17
VCCDSW_3P3_AJ17
AJ19
VCCHDA
AJ16
VCCSPI
AF20
VCCSRAM_1P0
AF21
VCCSRAM_1P0
T19
VCCSRAM_1P0
T20
VCCSRAM_1P0
AJ21
VCCPRIM_3P3_AJ21
AK20
VCCPRIM_1P0_AK20
N18
VCCAPLLEBB_1P0
SKL-U_BGA1356
Power Rail Voltage
+CHGRTC
BAT54C(VF)
+3VL_RTC
3.383V(MAX)
240 mV
3.143V
Result : Pass
2
CPU POWER 4 OF 4
CC7 Close UC1.AK19.
CC7
1U_0402_6.3V6K
SKL-U
15 OF 20
+RTCVCC
1
2
15mils
Rev_1.0
VCCPGPPA VCCPGPPB VCCPGPPC VCCPGPPD VCCPGPPE VCCPGPPF VCCPGPPG
VCCPRIM_3P3_V19
VCCPRIM_1P0_T1
VCCATS_1P8
VCCRTCPRIM_3P3
VCCRTC_AK19 VCCRTC_BB14
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
GPP_B0/CORE_VID0 GPP_B1/CORE_VID1
1
BAV70W 3P C/C_SOT-323
AK15 AG15 Y16 Y15 T16 AF16 AD15
V19
T1
AA1
AK17
1
AK19
1
BB14
BB10
CC71 0.1U_0402_10V7K
A14
64
K19
L21
24
N20
33
L19
4
A10
10
AN11
PRIMCORE_VID0
AN13
PRIMCORE_VID1
RTC Battery
MAX. 8000mil
+RTCBATT_R
1K_0402_5%
DC1
RC19
2
3
+3V_PGPPA +3V_PGPPB +3V_PGPPC +3V_1.8V_PGPPD +3V_PGPPE +1.8V_PRIM +3V_PRIM
+1.0V_DTS
+3V_PRIM_RTC
+RTCVCC
1 2
+1.0V_CLK6_24TBT
+1.0V_APLL
+1.0V_CLK4_F100OC
+1.0V_CLK5_F24NS
+1.0V_CLK6_24TBT
15mils15mils
12
+3VL
T184 TP@ T185 TP@
+RTCBATT
1
20 4 6 8 6 33 41
75
+1.8V_PRIM
6
+3V_PRIM
@
1U_0402_6.3V6K
1
CC209
2
JRTC1
1
1
2
2
3
G1
4
G2
E&T_3806K-F02N-03R
CONN@
1U_0402_6.3V6K
1
CC210
2
+3VALW TO +3V_PRIM
+3VALW+5VALW
1U_0402_6.3V6K
1U_0402_6.3V6K
CC50
CC52
1
For DS3
1 2
PCH_PWR_EN29,32,41
PM_SLP_SUS#8,29
RC191 0_0402_5%
1 2
RC174 0_0402_5%@
1
2
2
EN_3V_PRIM
UC4
1
VOUT
VIN
2
VOUT
VIN
3
ON
4
VBIAS
SA00006U600
AOZ1336 _DFN8_ 2X2
GND GND
7 8
6
CT
5 9
+3VALW
+3V_PRIMJP
CC53
1000P_0402_50V7K
1 2
RC153 0_0805_5%@
For NON-DS3
1 2
RC159 0_0805_5%
For DS3
1 2
+3V_PRIM
1
2
0.1U_0402_25V6
CC51
Follow 543016_SKL_U_Y_PDG_0_9
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL E LECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2011/06/29 2011/06/29
2011/06/29 2011/06/29
2011/06/29 2011/06/29
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SKL-U(9/12)Power
SKL-U(9/12)Power
SKL-U(9/12)Power
LA-C482P
LA-C482P
LA-C482P
1
12 45Thursday, May 28, 2015
12 45Thursday, May 28, 2015
12 45Thursday, May 28, 2015
0.3
0.3
0.3
of
of
of
5
4
3
2
1
Rev_1.0
(To VR)
+VCC_CORE
G32 G33 G35 G37 G38 G40 G42 J30 J33 J37 J40 K33 K35 K37 K38 K40 K42 K43
E32 E33
B63 A63 D64
G20
VCCSENSE VSSSENSE
SOC_SVID_ALERT# SOC_SVID_CLK SOC_SVID_DAT
Trace Length < 25 mils
VCCSENSE 42 VSSSENSE 42
SOC_SVID_CLK 42
+1.0VS_VCCSTG
VCCGT_SENSE42
VSSGT_SENSE42
Trace Length < 25 mils
VCCGT_SENSE VSSGT_SENSE
AA63 AA64 AA66 AA67 AA69 AA70
AA71 AC64 AC65 AC66 AC67 AC68 AC69 AC70 AC71
M62 N63 N64 N66 N67 N69
A48 A53 A58 A62 A66
J43 J45 J46 J48 J50 J52 J53 J55 J56 J58 J60 K48 K50 K52 K53 K55 K56 K58 K60 L62 L63 L64 L65 L66 L67 L68 L69 L70 L71
J70 J69
UC1M
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
VCCGT_SENSE VSSGT_SENSE
SKL-U_BGA1356
SKL-U
CPU POWER 2 OF 4
13 OF 20
Rev_1.0
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
VCCGTX_AK42 VCCGTX_AK43 VCCGTX_AK45 VCCGTX_AK46 VCCGTX_AK48 VCCGTX_AK50 VCCGTX_AK52 VCCGTX_AK53 VCCGTX_AK55 VCCGTX_AK56 VCCGTX_AK58 VCCGTX_AK60 VCCGTX_AK70 VCCGTX_AL43 VCCGTX_AL46 VCCGTX_AL50 VCCGTX_AL53 VCCGTX_AL56
VCCGTX_AL60 VCCGTX_AM48 VCCGTX_AM50 VCCGTX_AM52 VCCGTX_AM53 VCCGTX_AM56 VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66
VCCGTX_SENSE VSSGTX_SENSE
+VCC_CORE
UC1L
A30
VCC_A30
+1.0V_VCCST
12
A34 A39
A44 AK33 AK35 AK37 AK38 AK40 AL33 AL37 AL40
AM32 AM33 AM35 AM37 AM38
G30
K32
AK32
AB62
P62
V62
H63
G61
AC63
AE63
AE62
AG62
AL63
AJ62
RC179 56_0402_5%
VCC_A34 VCC_A39 VCC_A44 VCC_AK33 VCC_AK35 VCC_AK37 VCC_AK38 VCC_AK40 VCC_AL33 VCC_AL37 VCC_AL40 VCC_AM32 VCC_AM33 VCC_AM35 VCC_AM37 VCC_AM38 VCC_G30
RSVD
RSVD
VCCOPC_AB62 VCCOPC_P62 VCCOPC_V62
VCC_OPC_1P8_H63
VCC_OPC_1P8_G61
VCCOPC_SENSE VSSOPC_SENSE
VCCEOPIO VCCEOPIO
VCCEOPIO_SENSE VSSEOPIO_SENSE
SKL-U_BGA1356
Place the PU resistors close to CPU
D D
C C
For CPU2+3e SKU
SVID ALERT
B B
SOC_SVID_ALERT#
1 2
RC180 220_0402_5%
SKL-U
CPU POWER 1 OF 4
VCC_SENSE
VSS_SENSE
VIDALERT#
VCCSTG_G20
12 OF 20
SOC_SVID_ALERT#_R 42
VCC_G32 VCC_G33 VCC_G35 VCC_G37 VCC_G38 VCC_G40 VCC_G42
VCC_J30 VCC_J33 VCC_J37
VCC_J40 VCC_K33 VCC_K35 VCC_K37 VCC_K38 VCC_K40 VCC_K42 VCC_K43
VIDSCK
VIDSOUT
N70 N71 R63 R64 R65 R66 R67 R68 R69 R70 R71 T62 U65 U68 U71 W63 W64 W65 W66 W67 W68 W69 W70 W71 Y62
AK42 AK43 AK45 AK46 AK48 AK50 AK52 AK53 AK55 AK56 AK58 AK60 AK70 AL43 AL46 AL50 AL53 AL56 AL60 AM48 AM50 AM52 AM53 AM56 AM58 AU58 AU63 BB57 BB66
AK62 AL61
+VCC_GT+VCC_GT
VCCGTX_SENSE VSSGTX_SENSE
T192 TP@ T193 TP@
+1.0V_VCCST
SVID DATA
SOC_SVID_DAT
A A
5
12
RC181 100_0402_1%
Place the PU resistors close to CPU
SOC_SVID_DAT 42
4
(To VR)
Security Classification
Security Classification
Security Classification
2010/05/27 2011/05/11
2010/05/27 2011/05/11
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2010/05/27 2011/05/11
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet of
Compal Electronics, Inc.
SKL-U(10/12)POWER,SVID
SKL-U(10/12)POWER,SVID
SKL-U(10/12)POWER,SVID
LA-C482P
LA-C482P
LA-C482P
13 45Thursday, May 28, 2015
13 45Thursday, May 28, 2015
13 45Thursday, May 28, 2015
1
of
of
0.3
0.3
0.3
5
4
3
2
1
SKL-U
UC1P
D D
C C
B B
A67 A70 AA2
AA4 AA65 AA68 AB15 AB16 AB18 AB21
AB8 AD13 AD16 AD19 AD20 AD21 AD62
AD8 AE64 AE65 AE66 AE67 AE68 AE69
AF1 AF10 AF15 AF17
AF2
AF4 AF63 AG16 AG17 AG18 AG19 AG20 AG21 AG71 AH13
AH6 AH63 AH64 AH67
AJ15 AJ18 AJ20
AJ4 AK11 AK16 AK18 AK21 AK22 AK27 AK63 AK68 AK69
AK8
AL2
AL28 AL32 AL35 AL38
AL4
AL45 AL48 AL52 AL55 AL58 AL64
A5
GND 1 OF 3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
SKL-U_BGA1356
16 OF 20
Rev_1.0
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AL65 AL66 AM13 AM21 AM25 AM27 AM43 AM45 AM46 AM55 AM60 AM61 AM68 AM71 AM8 AN20 AN23 AN28 AN30 AN32 AN33 AN35 AN37 AN38 AN40 AN42 AN58 AN63 AP10 AP18 AP20 AP23 AP28 AP32 AP35 AP38 AP42 AP58 AP63 AP68 AP70 AR11 AR15 AR16 AR20 AR23 AR28 AR35 AR42 AR43 AR45 AR46 AR48 AR5 AR50 AR52 AR53 AR55 AR58 AR63 AR8 AT2 AT20 AT23 AT28 AT35 AT4 AT42 AT56 AT58
AT63 AT68
AT71 AU10 AU15 AU20 AU32 AU38
AV68 AV69 AV70 AV71
AW10 AW12 AW14 AW16 AW18 AW21 AW23 AW26 AW28 AW30 AW32 AW34 AW36 AW38 AW41 AW43 AW45 AW47 AW49 AW51 AW53 AW55 AW57
AW6
AW60 AW62 AW64 AW66
AW8 AY66
BA10 BA14 BA18
BA23 BA28 BA32 BA36
BA45
AV1
B10 B14 B18 B22 B30 B34 B39 B44 B48 B53 B58 B62 B66 B71 BA1
BA2
F68
UC1Q
GND 2 OF 3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
SKL-U_BGA1356
SKL-U
17 OF 20
Rev_1.0
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
BA49 BA53 BA57 BA6 BA62 BA66 BA71 BB18 BB26 BB30 BB34 BB38 BB43 BB55 BB6 BB60 BB64 BB67 BB70 C1 C25 C5 D10 D11 D14 D18 D22 D25 D26 D30 D34 D39 D44 D45 D47 D48 D53 D58 D6 D62 D66 D69 E11 E15 E18 E21 E46 E50 E53 E56 E6 E65 E71 F1 F13 F2 F22 F23 F27 F28 F32 F33 F35 F37 F38 F4 F40 F42 BA41
G10 G22 G43 G45 G48
G52 G55 G58
G60 G63 G66 H15 H18 H71
F8
G5
G6
J11 J13 J25 J28 J32 J35 J38 J42
J8 K16 K18 K22 K61 K63 K64 K65 K66 K67 K68 K70 K71 L11 L16 L17
UC1R
GND 3 OF 3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
18 OF 20
SKL-U_BGA1356
SKL-U
Rev_1.0
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
L18 L2 L20 L4 L8 N10 N13 N19 N21 N6 N65 N68 P17 P19 P20 P21 R13 R6 T15 T17 T18 T2 T21 T4 U10 U63 U64 U66 U67 U69 U70 V16 V17 V18 W13 W6 W9 Y17 Y19 Y20 Y21
A A
Security Classification
Security Classification
Security Classification
2011/06/29 2011/06/29
2011/06/29 2011/06/29
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2011/06/29 2011/06/29
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SKL-U(11/12)GND
SKL-U(11/12)GND
SKL-U(11/12)GND
LA-C482P
LA-C482P
LA-C482P
14 45Thursday, May 28, 2015
14 45Thursday, May 28, 2015
14 45Thursday, May 28, 2015
1
0.3
0.3
0.3
of
of
of
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