Compal LA-C361P Schematic

A

B

C

D

E

MODEL NAME :
PCB NO :

AAM00

LA-C361P

BOM P/N :

1 1

Dell/Compal Confidential

Schematic Document

SKYLAKE-H

2014-05-22

Rev: 0.0 (M00)

2 2

CONN@ : Connector Component

R1@ / R3@ : R1/R3 CPN for CPU, GPU, PCB

PCH

UH1

R1@

PCB 1BG LA-C361P REV0 MB

3 3

R1@ZZZ

SKL-H_BGA1440

UH2

SKY-H-PCH_BGA837

Samsung 2G

UV5

K4G41325FC-HC03_FBGA170P~D

VRAMS@

UV9

UV6

K4G41325FC-HC03_FBGA170P~D

VRAMS@

UV10

GPUCPUPCB

UV1

BC@

N16P-Q1-A2

R1@

UV1

GX@

N16P-GX-A2

RV312

20K_0402_1%

VRAMS@

VRAMS@ : Samsung GDDR5 for GPU
VRAMH@ : Hynix GDDR5 for GPU

VRAMM@ : Micron GDDR5 for GPU

BreakDown@ : for measure power consumption

CSMB@ : CSMB sku

UMA@ / DIS@ : UMA/DIS

@ : Nopop Component

TPM@ : TPM function
EMC@ : Pop of EMI parts

BC@ : BC sku (GPU N16P-Q1)
GX@ : GPU N16P-GX

K4G41325FC-HC03_FBGA170P~D

VRAMS@

Hynix 2G

UV5

4 4

H5GC4H24AJR-R0C_FBGA170P~D

VRAMH@

UV9

H5GC4H24AJR-R0C_FBGA170P~D

VRAMH@

K4G41325FC-HC03_FBGA170P~D

VRAMS@

UV6

H5GC4H24AJR-R0C_FBGA170P~D

VRAMH@

UV10

H5GC4H24AJR-R0C_FBGA170P~D

VRAMH@

A

RV312

34.8K_0402_1%

VRAMH@

Micron 2G

UV5

EDW4032BABG-60-F_FBGA170P~D

VRAMM@

UV9

EDW4032BABG-60-F_FBGA170P~D

VRAMM@

B

RV312

UV6

EDW4032BABG-60-F_FBGA170P~D

VRAMM@

UV10

EDW4032BABG-60-F_FBGA170P~D

VRAMM@

24.9K_0402_1%

VRAMM@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

C

2011/08/25 2011/08/25

2011/08/25 2011/08/25

2011/08/25 2011/08/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page
LA-C361P

LA-C361P

LA-C361P

E

1 71Thursday, August 06, 2015

1 71Thursday, August 06, 2015

1 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

A

128M*32 x4 =2G

VRAM * 4
GDDR5

P.28~31

B

C

D

E

GB4-128

1 1

GPU
N16P-GX

P.23~27

PEG 3.0 x16

Intel

Skylake-H

Memory Bus (DDR4)

Dual Channel

Processor

35W/45W QC

UHD 3840*2160
(4K*2K, eDP 1.3)

P.35

eDP *4 lane

PCI-E x1

Port 3 Port 4

2 2

M.2 Slot A Key-E

(WLAN+BT4.0)

USB2.0

Port 4

USB 3.0 Conn.

( USB Charger )

P.43

P.47

Digital Camera
Conn.

P.35

Card Reader
RTS5242

USB Powershare
TPS2546

Port 12

USB2.0

3 in 1
Socket

P.51

P.46

Port 4

Port 2

USB 3.0

USB2.0

BGA 1440

Intel

SLK-H-PCH
BGA 837 Balls

P.7~13

DMI x4

100MHz
5GB/s

DDI x 2

SATA3.0

PCI-E x4

USB 3.0

USB2.0

Port 0

Port 1

Port 2

Port 1

Port 9

DDRIV-DIMM X2

1.2V DDR4 2133 MHz

32GB Max

PCI-E x2

Port 5,6

M.2 Slot C Key-M

(SATA/PCIe SSD)

USB 3.0
Re-driver

P.47

Touch Panel
Conn.

P.35

P.14~15

Intel Alpine Ridge

P.44

P.37~38

P.39~41

PD
controller

HDD
Conn.

P.45

USB Powershare
TPS2546

Audio board

P.46

CPU XDP
Conn.

P.6

HDMI
Conn.

P.36

USB Type C
Conn.

P.41

DC-in Conn.

P.54

USB 3.0 Conn.

( USB Charger )

P.47

3 3

Power On/Off CKT.

DC/DC Interface CKT.

4 4

P.42

P.32~34

A

SPI Flash
(BIOS 16MB)

FFS
LNG3DMTR

MCP 23017

GPIO Expander

P.17

P.45

SMBus

P.49

SPI

SMBus

TPM
NPCT650JAAYX

P.42

PWM

Fan Control

P.42

B

SPI

PS/2
I2C

Touch Pad

P.42

MEC 5085

SIO

LPC Bus

33MHz

P.48

HD Audio

P16~22

Audio Codec
ALC3266

AMP TAS5768

Int. Speaker x2

KB Board

KBC
ECE1117

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

C

Digital MIC Conn.

KSIOBCBUS

Int.KBD

Compal Secret Data

Compal Secret Data

2011/08/25 2011/08/25

2011/08/25 2011/08/25

2011/08/25 2011/08/25

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Headphone / Mic. Jack

( Combo )

Title

Title

Title

Block diagram

Block diagram

Block diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-C361P

LA-C361P

LA-C361P

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

2 71Thursday, August 06, 2015

2 71Thursday, August 06, 2015

E

2 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

4

3

2

1

SMBUS Address [0x9a]

AW44
BB43

D D

PCH

AR38

AT42

SMBCLK
SMBDATA

I2C0_SCK
I2C0_SDA

1K

1K

5.1K

5.1K

+3V_PCH

+3VS

+3VS

DMN66D0
DMN66D0

0 ohm

0 ohm

10K

AR41
AR44

I2C1_SCK_TP
I2C1_SDA_TP

10K

AW42AW45

1K

SML1CLK

SML1DATA

C C

1K

+3V_PCH

+3VS

+3VS

DMN66D0
DMN66D0

1K

1K

Codec

10K

10K

+3VS

DIMMA

DIMMB

FFS

XDP

+3VS_TP

TP

2.2K

A5 B6

A56
B59

PBAT_SMBCLK
PBAT_SMBDAT

2.2K

+3VALW_EC

100 ohm

100 ohm

BATT

0x16

10K

+3VALW_EC

0 ohm

0 ohm

CHARGER

0x12

MEC5085

B50
A47

CHARGER_SMBCLK
CHARGER_SMBDAT

10K

B B

10K

+3VALW_EC

B49
B48

UPD_GPU_SMBCLK
UPD_GPU_SMBDAT

10K

2.2K

A A

5

B4
A3

MCP23017_SMBCLK
MCP23017_SMBDAT

2.2K

4

+3VALW_EC

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DGPU_PEX_RST#

0 ohm

Issued Date

Issued Date

Issued Date

3

DMN66D0
DMN66D0

+3VALW

DMN66D0
DMN66D0

DMN66D0

DMN66D0

0 ohm

Codec

10K

10K

+3V_PD

PD Controller

5.1K

5.1K

Compal Secret Data

Compal Secret Data

2011/08/25 2012/07/15

2011/08/25 2012/07/15

2011/08/25 2012/07/15

Compal Secret Data

+3.3V_GFX_AON

GPU

MCP23017

Deciphered Date

Deciphered Date

Deciphered Date

0x9E

0x42

2

Compal Electronics, Inc.

Title

Title

Title

SMBus Block Diagram

SMBus Block Diagram

SMBus Block Diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

5 71Thursday, August 06, 2015

5 71Thursday, August 06, 2015

5 71Thursday, August 06, 2015

1

0.1(X00)

0.1(X00)

0.1(X00)

+3VS

5

4

3

2

1

B+

DC IN Switch

D D

Page 54

NVDC
CHARGER
BQ24777

Page 56

+3VALW TDC:5.7A
+5VALW TDC:7.4A
TPS51285B

Page 57

+5VALW

+3VALW

Trinity

Battery
(3S3P)

PCH_1V TDC:5.1A
SY8206D

Page 58

+1.2V TDC:4.2A
+0.6VS TDC:0.7A
G5616A

Page 59

+1.35VSDGPU TDC: 10.2A
TPS51367

C C

Page 60

VCCIO_0.95V TDC: 3.9A
SY8206D

Page 61

+1.05VGPU TDC: 2.1A
SY8206D

Page 62

VGA_CORE TDC: 51A
RT8813A

B B

Page 63

+VCC_CORE TDC: 56A
ISL95855

Page 65

+1VALW

+1.2V_DDR

+0.6VS

+1.35VSDGPU

+VCCIO

+1.05VSDGPU

+GPU_CORE

+VCC_CORE

+VCC_GT TDC: 39A
ISL95855

Page 66

+VCC_SA TDC: 10A
ISL95855

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Page 66

Deciphered Date

Deciphered Date

Deciphered Date

+VCCGT

+VCCSA

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Power Sequence diagram

Power Sequence diagram

Power Sequence diagram

1

0.1(X00)

0.1(X00)

53 71Tuesday, August 11, 2015

53 71Tuesday, August 11, 2015

53 71Tuesday, August 11, 2015

0.1(X00)

A

B

C

D

E

Compal Confidential

Project Code : AAM00
File Name :

1 1

LA-C361P M/B

LS-C361P
Audio Board

2 2

JAUDIO
BtB Conn.

JTPJKB

15 pin

FFC

8 pin

FFC

Issued Date

Issued Date

Issued Date

Touch Pad

Compal Secret Data

Compal Secret Data

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DB block diagram

DB block diagram

DB block diagram

E

3 71Thursday, August 06, 2015

3 71Thursday, August 06, 2015

3 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

LS-C362P
KB controller
Board

JLED

3 3

FFC

4 pin

4 4

A

B

Front Side LED/B

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

C

A

Board ID
X00
X01
X02
X03
A00

PCI EXPRESS

1 1

Resistor

N/A

DESTINATION
Lane 1
Lane 2
Lane 3
Lane 4
Lane 5
Lane 6
Lane 7

NGFF-1 WLAN + BT
CARD READER
None
None
None
None

None
Lane 8 None
Lane 9

SSD
Lane 10
Lane 11
Lane 12
Lane 13
Lane 14
Lane 15
Lane 16

SSD

SSD

None

None

Alpine Ridge

USB31DESTINATION

USB Conn 1 (Right Side)
2
3
4
5
6

USB Conn 2 (Left Side)

None

None

None

None

DESTINATIONUSB3
7
8
9
10

SATA

0A
1A
N/A
N/A
0B

None

None

None

None

DESTINATION

SSD

N/ASSD

N/A

N/A

None

HDD1B

2
3

None

None

USB 2.0 DESTINATION

1
2
3
4
5
6
7
8
9
10
11
12

USB Conn 1 (Right Side)
USB Conn 2 (Left Side)
None None
NGFF-1 WLAN + BT
None
None
None
None
Touch screen
None
None
CAMERA

DESTINATIONCLKOUT_PCIE
0
1
2
3
4

None

None

None

NGFF-1 WLAN

CARD READER

Thunderbolt5
6
7
8
9

NGFF-2 SSD

GPU

None

None

DDI

1
2
3

LPC

LPC1

CLKOUT_PCIE

10
11
12
13
14
15

DESTINATION
Alpine Ridge
Alpine Ridge

DESTINATION
MEC5085LPC0
DEBUG PORT

DESTINATION
None
None
None
None
None
None

Symbol Note :

: means Digital Ground : means Analog Ground

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

A

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Notes List

Notes List

Notes List
LA-C361P

LA-C361P

LA-C361P

4 71Thursday, August 06, 2015

4 71Thursday, August 06, 2015

4 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

+1V_PCH

1

XDP@

+1V_PCH

+3V_PCH

D D

+VCCST

+VCCSTG

C C

PCH_ITP_PMODE[18]

H_VCCST_PWRGD[9,34]

B B

JTAG

1 2

RH492

1 2

RH493

1 2

RH97

1 2

RH98

1 2

RH100

1 2

RH494

1 2

RH495

1 2

RH496

1 2

RH95

1 2

RH498

1 2

RH497

PLTRST_CPU#[9,16]

PCH_SPI_SI_R[17]
RESET_OUT#[18,48]

PCH_RSMRST#[18,48]

XDP_PLTRST#

2.2K_0402_5%

PCH_SYS_PWROK_XDP

2.2K_0402_5%

PCH_JTAG_TDO

@

51_0402_5%

PCH_JTAG_TMS

@

51_0402_5%

PCH_JTAG_TDI

@

51_0402_5%

CPU_XDP_TMS

51_0402_5%

CPU_XDP_TDI

51_0402_5%

CPU_XDP_TDO

51_0402_5%

PCH_JTAG_TCK

51_0402_5%

CPU_XDP_TCK

51_0402_5%

CPU_XDP_TRST#

51_0402_5%

1 2

RH479 0_0402_5%XDP@

1 2

@

RH480 1K_0402_5%

1 2

RH489 1K_0402_5%XDP@

1 2

RH490 0_0402_5%@

1 2

RH481 1K_0402_5%XDP@

1 2

RH482 1K_0402_5%@

+VCCIO

12

RH483
150_0402_5%

1 2

RH488 1K_0402_5%

CH3

0.1U_0402_25V6

2

XDP_PLTRST#

PCH_SYS_PWROK_XDP

XDP_PWRGOOD

CFG0PWR_DEBUG#_XDP

X06.13

4

3

2

1

CPU

1 2

CFG3

XDP@

RH474 1K_0402_5%

+1V_PCH +1V_PCH

XDP_PREQ#[9,22]
XDP_PRDY#[9,22]

XDP_BPM#0[9]
XDP_BPM#1[9]

PCH_SMBDATA[14,15,18,45]
PCH_SMBCLK[14,15,18,45]

PCH_JTAG_TCK[18]

CPU_XDP_TCK[9]

PCH_JTAGX[18]

CFG0[9]
CFG1[9]

CFG2[9]
CFG3[9]

CFG4[9]
CFG5[9]

CFG6[9]
CFG7[9]

CFG0

CFG3

XDP_PWRGOOD
PWRBTN#_XDP

PWR_DEBUG#_XDP
PCH_SYS_PWROK_XDP

PCH_JTAG_TCK
CPU_XDP_TCK

1 2

@

RH491 0_0402_5%

PWRBTN#_XDP

+3V_PCH_DSW

12

XDP@

RH2
1K_0402_5%

0.1U_0402_25V6
CH174

12

RH475 0_0402_5%

JXDP

1

GND0

3

OBSFN_A0

5

OBSFN_A1

7

GND2

9

OBSDATA_A0

11

OBSDATA_A1

13

GND4

15

OBSDATA_A2

17

OBSDATA_A3

19

GND6

21

OBSFN_B0

23

OBSFN_B1

25

GND8

27

OBSDATA_B0

29

OBSDATA_B1

31

GND10

33

OBSDATA_B2

35

OBSDATA_B3

37

GND12

39

PWRGOOD/HOOK0

41

HOOK1

43

VCC_OBS_AB

45

HOOK2

47

HOOK3

49

GND14

51

SDA

53

SCL

55

TCK1

57

TCK0

59

GND16

SAMTE_BSH-030-01-L-D-A

CONN@

1 2

RH6 0_0402_5%XDP@

XDP@

1 2

@

GND1
OBSFN_C0
OBSFN_C1

GND3

OBSDATA_C0
OBSDATA_C1

GND5

OBSDATA_C2
OBSDATA_C3

GND7
OBSFN_D0
OBSFN_D1

GND9

OBSDATA_D0
OBSDATA_D1

GND11
OBSDATA_D2
OBSDATA_D3

GND13

ITPCLK/HOOK4

ITPCLK#/HOOK5

VCC_OBS_CD

RESET#/HOOK6

DBR#/HOOK7

GND15

TRST#

GND17

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46

XDP_PLTRST#

48

XDP_DBRESET#

50
52
54
56
58
60

XDP_TDO

XDP_TRST#

XDP_TDI

XDP_TMS

RH573 1K_0402_5%

TD0

TDI

TMS

SIO_PWRBTN# [18,48]

CFG17 [9]
CFG16 [9]

CFG8 [9]
CFG9 [9]

CFG10 [9]
CFG11 [9]

CFG19 [9]
CFG18 [9]

CFG12 [9]
CFG13 [9]

CFG14 [9]
CFG15 [9]

PCH_XDP_CLK_P [17]
PCH_XDP_CLK_N [17]

1 2

XDP@

XDP_DBRESET#

PCH_SPI_WP#_R [17]

+3VS

12

RH5
1K_0402_5%

RH8 0_0402_5%

0.1U_0402_25V6
CH175

XDP@

12

1 2

XDP_TDO

XDP_TDI

XDP_TMS

XDP_TRST#

XDP_TMS

XDP_TDI

XDP_TDO

X06.13

@

SYS_RESET# [18,52]

RH540 0_0402_5%@

RH541 0_0402_5%@

RH542 0_0402_5%@

RH543 0_0402_5%@

1 2

RH12 0_0402_5%@

1 2

RH477 0_0402_5%@

1 2

RH478 0_0402_5%@

1 2

1 2

1 2

1 2

X06.13

X06.13

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

CPU_XDP_TDO [9]

CPU_XDP_TDI [9]

CPU_XDP_TMS [9]

CPU_XDP_TRST# [9,22]

PCH

PCH_JTAG_TMS [18]

PCH_JTAG_TDI [18]

PCH_JTAG_TDO [18]

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

XDP CONN

XDP CONN

XDP CONN

1

6 71Thursday, August 06, 2015

6 71Thursday, August 06, 2015

6 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

PEG_HTX_C_GRX_P[0..15][23]
PEG_HTX_C_GRX_N[0..15][23]
PEG_GTX_C_HRX_P[0..15][23]
PEG_GTX_C_HRX_N[0..15][23]

D D

C C

PEG_HTX_C_GRX_P[0..15]
PEG_HTX_C_GRX_N[0..15]
PEG_GTX_C_HRX_P[0..15]
PEG_GTX_C_HRX_N[0..15]

+VCCIO

RH24 24.9_0402_1%

DMI_CRX_PTX_P0[19]
DMI_CRX_PTX_N0[19]

DMI_CRX_PTX_P1[19]
DMI_CRX_PTX_N1[19]

DMI_CRX_PTX_P2[19]
DMI_CRX_PTX_N2[19]

DMI_CRX_PTX_P3[19]
DMI_CRX_PTX_N3[19]

PEG_GTX_C_HRX_P15
PEG_GTX_C_HRX_N15

PEG_GTX_C_HRX_P14
PEG_GTX_C_HRX_N14

PEG_GTX_C_HRX_P13
PEG_GTX_C_HRX_N13

PEG_GTX_C_HRX_P12
PEG_GTX_C_HRX_N12

PEG_GTX_C_HRX_P11
PEG_GTX_C_HRX_N11

PEG_GTX_C_HRX_P10
PEG_GTX_C_HRX_N10

PEG_GTX_C_HRX_P9
PEG_GTX_C_HRX_N9

PEG_GTX_C_HRX_P8
PEG_GTX_C_HRX_N8

PEG_GTX_C_HRX_P7
PEG_GTX_C_HRX_N7

PEG_GTX_C_HRX_P6
PEG_GTX_C_HRX_N6

PEG_GTX_C_HRX_P5
PEG_GTX_C_HRX_N5

PEG_GTX_C_HRX_P4
PEG_GTX_C_HRX_N4

PEG_GTX_C_HRX_P3
PEG_GTX_C_HRX_N3

PEG_GTX_C_HRX_P2
PEG_GTX_C_HRX_N2

PEG_GTX_C_HRX_P1
PEG_GTX_C_HRX_N1

PEG_GTX_C_HRX_P0
PEG_GTX_C_HRX_N0

1 2

4

UH1C

E25

PEG_RXP[0]

D25

PEG_RXN[0]

E24

PEG_RXP[1]

F24

PEG_RXN[1]

E23

PEG_RXP[2]

D23

PEG_RXN[2]

E22

PEG_RXP[3]

F22

PEG_RXN[3]

E21

PEG_RXP[4]

D21

PEG_RXN[4]

E20

PEG_RXP[5]

F20

PEG_RXN[5]

E19

PEG_RXP[6]

D19

PEG_RXN[6]

E18

PEG_RXP[7]

F18

PEG_RXN[7]

D17

PEG_RXP[8]

E17

PEG_RXN[8]

F16

PEG_RXP[9]

E16

PEG_RXN[9]

D15

PEG_RXP[10]

E15

PEG_RXN[10]

F14

PEG_RXP[11]

E14

PEG_RXN[11]

D13

PEG_RXP[12]

E13

PEG_RXN[12]

F12

PEG_RXP[13]

E12

PEG_RXN[13]

D11

PEG_RXP[14]

E11

PEG_RXN[14]

F10

PEG_RXP[15]

E10

PEG_RXN[15]

G2

PEG_RCOMP

D8

DMI_RXP[0]

E8

DMI_RXN[0]

E6

DMI_RXP[1]

F6

DMI_RXN[1]

D5

DMI_RXP[2]

E5

DMI_RXN[2]

J8

DMI_RXP[3]

J9

DMI_RXN[3]

SKL-H_BGA1440

@

REV = 1

SKYLAKE_HALO

BGA1440

?

3 OF 14

PEG_TXP[0]
PEG_TXN[0]

PEG_TXP[1]
PEG_TXN[1]

PEG_TXP[2]
PEG_TXN[2]

PEG_TXP[3]
PEG_TXN[3]

PEG_TXP[4]
PEG_TXN[4]

PEG_TXP[5]
PEG_TXN[5]

PEG_TXP[6]
PEG_TXN[6]

PEG_TXP[7]
PEG_TXN[7]

PEG_TXP[8]
PEG_TXN[8]

PEG_TXP[9]
PEG_TXN[9]

PEG_TXP[10]
PEG_TXN[10]

PEG_TXP[11]
PEG_TXN[11]

PEG_TXP[12]
PEG_TXN[12]

PEG_TXP[13]
PEG_TXN[13]

PEG_TXP[14]
PEG_TXN[14]

PEG_TXP[15]
PEG_TXN[15]

DMI_TXP[0]
DMI_TXN[0]

DMI_TXP[1]
DMI_TXN[1]

DMI_TXP[2]
DMI_TXN[2]

DMI_TXP[3]
DMI_TXN[3]

B25
A25

B24
C24

B23
A23

B22
C22

B21
A21

B20
C20

B19
A19

B18
C18

A17
B17

C16
B16

A15
B15

C14
B14

A13
B13

C12
B12

A11
B11

C10
B10

B8
A8

C6
B6

B5
A5

D4
B4

?

3

PEG_HTX_GRX_P15
PEG_HTX_GRX_N15

PEG_HTX_GRX_P14
PEG_HTX_GRX_N14

PEG_HTX_GRX_P13
PEG_HTX_GRX_N13

PEG_HTX_GRX_P12
PEG_HTX_GRX_N12

PEG_HTX_GRX_P11
PEG_HTX_GRX_N11

PEG_HTX_GRX_P10
PEG_HTX_GRX_N10

PEG_HTX_GRX_P9
PEG_HTX_GRX_N9

PEG_HTX_GRX_P8
PEG_HTX_GRX_N8

PEG_HTX_GRX_P7
PEG_HTX_GRX_N7

PEG_HTX_GRX_P6
PEG_HTX_GRX_N6

PEG_HTX_GRX_P5
PEG_HTX_GRX_N5

PEG_HTX_GRX_P4
PEG_HTX_GRX_N4

PEG_HTX_GRX_P3
PEG_HTX_GRX_N3

PEG_HTX_GRX_P2
PEG_HTX_GRX_N2

PEG_HTX_GRX_P1
PEG_HTX_GRX_N1

PEG_HTX_GRX_P0
PEG_HTX_GRX_N0

1 2

CH5 0.22U_0201_6.3V6MDIS@

1 2

CH6 0.22U_0201_6.3V6MDIS@

1 2

CH7 0.22U_0201_6.3V6MDIS@

1 2

CH8 0.22U_0201_6.3V6MDIS@

1 2

CH9 0.22U_0201_6.3V6MDIS@

1 2

CH10 0.22U_0201_6.3V6MDIS@

1 2

CH11 0.22U_0201_6.3V6MDIS@

1 2

CH12 0.22U_0201_6.3V6MDIS@

1 2

CH13 0.22U_0201_6.3V6MDIS@

1 2

CH14 0.22U_0201_6.3V6MDIS@

1 2

CH15 0.22U_0201_6.3V6MDIS@

1 2

CH16 0.22U_0201_6.3V6MDIS@

1 2

CH17 0.22U_0201_6.3V6MDIS@

1 2

CH18 0.22U_0201_6.3V6MDIS@

1 2

CH19 0.22U_0201_6.3V6MDIS@

1 2

CH20 0.22U_0201_6.3V6MDIS@

1 2

CH21 0.22U_0201_6.3V6MDIS@

1 2

CH22 0.22U_0201_6.3V6MDIS@

1 2

CH23 0.22U_0201_6.3V6MDIS@

1 2

CH24 0.22U_0201_6.3V6MDIS@

1 2

CH25 0.22U_0201_6.3V6MDIS@

1 2

CH26 0.22U_0201_6.3V6MDIS@

1 2

CH27 0.22U_0201_6.3V6MDIS@

1 2

CH28 0.22U_0201_6.3V6MDIS@

1 2

CH29 0.22U_0201_6.3V6MDIS@

1 2

CH30 0.22U_0201_6.3V6MDIS@

1 2

CH31 0.22U_0201_6.3V6MDIS@

1 2

CH32 0.22U_0201_6.3V6MDIS@

1 2

CH33 0.22U_0201_6.3V6MDIS@

1 2

CH34 0.22U_0201_6.3V6MDIS@

1 2

CH35 0.22U_0201_6.3V6MDIS@

1 2

CH36 0.22U_0201_6.3V6MDIS@

DMI_CTX_PRX_P0 [19]
DMI_CTX_PRX_N0 [19]

DMI_CTX_PRX_P1 [19]
DMI_CTX_PRX_N1 [19]

DMI_CTX_PRX_P2 [19]
DMI_CTX_PRX_N2 [19]

DMI_CTX_PRX_P3 [19]
DMI_CTX_PRX_N3 [19]

PEG_HTX_C_GRX_P15
PEG_HTX_C_GRX_N15

PEG_HTX_C_GRX_P14
PEG_HTX_C_GRX_N14

PEG_HTX_C_GRX_P13
PEG_HTX_C_GRX_N13

PEG_HTX_C_GRX_P12
PEG_HTX_C_GRX_N12

PEG_HTX_C_GRX_P11
PEG_HTX_C_GRX_N11

PEG_HTX_C_GRX_P10
PEG_HTX_C_GRX_N10

PEG_HTX_C_GRX_P9
PEG_HTX_C_GRX_N9

PEG_HTX_C_GRX_P8
PEG_HTX_C_GRX_N8

PEG_HTX_C_GRX_P7
PEG_HTX_C_GRX_N7

PEG_HTX_C_GRX_P6
PEG_HTX_C_GRX_N6

PEG_HTX_C_GRX_P5
PEG_HTX_C_GRX_N5

PEG_HTX_C_GRX_P4
PEG_HTX_C_GRX_N4

PEG_HTX_C_GRX_P3
PEG_HTX_C_GRX_N3

PEG_HTX_C_GRX_P2
PEG_HTX_C_GRX_N2

PEG_HTX_C_GRX_P1
PEG_HTX_C_GRX_N1

PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_N0

2

1

UH1D

DDI1_HTX_TBRX_P0[37]

B B

A A

5

DDI1_HTX_TBRX_N0[37]
DDI1_HTX_TBRX_P1[37]
DDI1_HTX_TBRX_N1[37]
DDI1_HTX_TBRX_P2[37]
DDI1_HTX_TBRX_N2[37]
DDI1_HTX_TBRX_P3[37]
DDI1_HTX_TBRX_N3[37]

DDI1_CPU_AUXP[37]
DDI1_CPU_AUXN[37]

DDI2_HTX_TBRX_P0[37]
DDI2_HTX_TBRX_N0[37]
DDI2_HTX_TBRX_P1[37]
DDI2_HTX_TBRX_N1[37]
DDI2_HTX_TBRX_P2[37]
DDI2_HTX_TBRX_N2[37]
DDI2_HTX_TBRX_P3[37]
DDI2_HTX_TBRX_N3[37]

DDI2_CPU_AUXP[37]
DDI2_CPU_AUXN[37]

K36

DDI1_TXP[0]

K37

DDI1_TXN[0]

J35

DDI1_TXP[1]

J34

DDI1_TXN[1]

H37

DDI1_TXP[2]

H36

DDI1_TXN[2]

J37

DDI1_TXP[3]

J38

DDI1_TXN[3]

D27

DDI1_AUXP

E27

DDI1_AUXN

H34

DDI2_TXP[0]

H33

DDI2_TXN[0]

F37

DDI2_TXP[1]

G38

DDI2_TXN[1]

F34

DDI2_TXP[2]

F35

DDI2_TXN[2]

E37

DDI2_TXP[3]

E36

DDI2_TXN[3]

F26

DDI2_AUXP

E26

DDI2_AUXN

C34

DDI3_TXP[0]

D34

DDI3_TXN[0]

B36

DDI3_TXP[1]

B34

DDI3_TXN[1]

F33

DDI3_TXP[2]

E33

DDI3_TXN[2]

C33

DDI3_TXP[3]

B33

DDI3_TXN[3]

A27

DDI3_AUXP

B27

DDI3_AUXN

SKL-H_BGA1440

@

4

REV = 1

BGA1440

4 OF 14

EDP_TXP[0]
EDP_TXN[0]
EDP_TXP[1]
EDP_TXN[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]

EDP_AUXP
EDP_AUXN

EDP_DISP_UTIL

EDP_RCOMP

PROC_AUDIO_CLK

PROC_AUDIO_SDI

PROC_AUDIO_SDO

D29
E29
F28
E28
B29
A29
B28
C28

C26
B26

A33

EDP_DISP_UTIL

D37

EDP_COMP

G27
G25
G29

?

EDP_TXP0 [35]
EDP_TXN0 [35]
EDP_TXP1 [35]
EDP_TXN1 [35]
EDP_TXN2 [35]
EDP_TXP2 [35]
EDP_TXN3 [35]
EDP_TXP3 [35]

EDP_AUXP [35]
EDP_AUXN [35]

1 2

RH456 0_0402_5%@

1 2

RH30 24.9_0402_1%

EDP_COMP
CAD Note:Trace width=20 mils ,Spacing=25mil,
Max length=100 mils.

BIA_PWM_PCH [16,35]

+VCCIO

Close to CPU

AUD_AZA_CPU_SCLK [18]

1 2

RH145 20_0402_5%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

AUD_AZA_CPU_SDO [18]
AUD_AZA_CPU_SDI_R [18]

Compal Secret Data

Compal Secret Data

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PROCESSOR(1/7) DMI,FDI,PEG

PROCESSOR(1/7) DMI,FDI,PEG

PROCESSOR(1/7) DMI,FDI,PEG

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

7 71Thursday, August 06, 2015

7 71Thursday, August 06, 2015

7 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

?

SKYLAKE_HALO

Interleave

5

4

3

2

1

?

REV = 1

SKYLAKE_HALO

BGA1440

DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]

DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]

DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]

DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]

DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]

DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]

DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]

DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]

DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#

DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSP[7]/DDR1_DQSP[5]

DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSN[7]/DDR1_DQSN[5]

1 OF 14

DDR0_CKP[0]
DDR0_CKN[0]
DDR0_CKN[1]
DDR0_CKP[1]

DDR0_CLKP[2]
DDR0_CLKN[2]
DDR0_CLKP[3]
DDR0_CLKN[3]

DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]

DDR0_CS#[0]

DDR0_CS#[1]

DDR0_CS#[2]

DDR0_CS#[3]
DDR0_ODT[0]

DDR0_ODT[1]
DDR0_ODT[2]
DDR0_ODT[3]

DDR0_MA[3]
DDR0_MA[4]

DDR0_PAR

DDR0_ALERT#

DDR0_DQSN[0]
DDR0_DQSN[1]

DDR0_DQSP[0]
DDR0_DQSP[1]

DDR0_DQSP[8]
DDR0_DQSN[8]

?

AG1
AG2
AK1
AK2
AL3
AK3
AL2
AL1

AT1
AT2
AT3
AT5

AD5
AE2
AD2
AE5

AD3
AE4
AE1
AD4

AH5
AH1
AU1

AH4
AG4
AD1

AH3
AP4
AN4
AP5
AP2
AP1
AP3
AN1
AN3
AT4
AH2
AN2
AU4
AE3
AU2
AU3

AG3
AU5

BR5
BL3
BG3
BD3
AB3
V3
R3
M3

BP5
BK3
BF3
BC3
AA3
U3
P3
L3

AY3
BA3

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

UH1B

BT11

1 2
1 2
1 2

DDR_B_D0
DDR_B_D1
DDR_B_D6
DDR_B_D2
DDR_B_D4
DDR_B_D5
DDR_B_D3
DDR_B_D7
DDR_B_D12

DDR_B_D9
DDR_B_D10
DDR_B_D14
DDR_B_D11
DDR_B_D13
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D21
DDR_B_D19
DDR_B_D18
DDR_B_D22
DDR_B_D20
DDR_B_D23
DDR_B_D26
DDR_B_D24
DDR_B_D31
DDR_B_D25
DDR_B_D28
DDR_B_D30
DDR_B_D29
DDR_B_D27
DDR_B_D34
DDR_B_D38
DDR_B_D32
DDR_B_D36
DDR_B_D35
DDR_B_D39
DDR_B_D37
DDR_B_D33
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D47
DDR_B_D46
DDR_B_D48
DDR_B_D51
DDR_B_D50
DDR_B_D52
DDR_B_D53
DDR_B_D55
DDR_B_D49
DDR_B_D54
DDR_B_D58
DDR_B_D57
DDR_B_D59
DDR_B_D61
DDR_B_D62
DDR_B_D60
DDR_B_D56
DDR_B_D63

DDR1_DQ[0]/DDR0_DQ[16]

BR11

DDR1_DQ[1]/DDR0_DQ[17]

BT8

DDR1_DQ[2]/DDR0_DQ[18]

BR8

DDR1_DQ[3]/DDR0_DQ[19]

BP11

DDR1_DQ[4]/DDR0_DQ[20]

BN11

DDR1_DQ[5]/DDR0_DQ[21]

BP8

DDR1_DQ[6]/DDR0_DQ[22]

BN8

DDR1_DQ[7]/DDR0_DQ[23]

BL12

DDR1_DQ[8]/DDR0_DQ[24]

BL11

DDR1_DQ[9]/DDR0_DQ[25]

BL8

DDR1_DQ[10]/DDR0_DQ[26]

BJ8

DDR1_DQ[11]/DDR0_DQ[27]

BJ11

DDR1_DQ[12]/DDR0_DQ[28]

BJ10

DDR1_DQ[13]/DDR0_DQ[29]

BL7

DDR1_DQ[14]/DDR0_DQ[30]

BJ7

DDR1_DQ[15]/DDR0_DQ[31]

BG11

DDR1_DQ[16]/DDR0_DQ[48]

BG10

DDR1_DQ[17]/DDR0_DQ[49]

BG8

DDR1_DQ[18]/DDR0_DQ[50]

BF8

DDR1_DQ[19]/DDR0_DQ[51]

BF11

DDR1_DQ[20]/DDR0_DQ[52]

BF10

DDR1_DQ[21]/DDR0_DQ[53]

BG7

DDR1_DQ[22]/DDR0_DQ[54]

BF7

DDR1_DQ[23]/DDR0_DQ[55]

BB11

DDR1_DQ[24]/DDR0_DQ[56]

BC11

DDR1_DQ[25]/DDR0_DQ[57]

BB8

DDR1_DQ[26]/DDR0_DQ[58]

BC8

DDR1_DQ[27]/DDR0_DQ[59]

BC10

DDR1_DQ[28]/DDR0_DQ[60]

BB10

DDR1_DQ[29]/DDR0_DQ[61]

BC7

DDR1_DQ[30]/DDR0_DQ[62]

BB7

DDR1_DQ[31]/DDR0_DQ[63]

AA11

DDR1_DQ[32]/DDR1_DQ[16]

AA10

DDR1_DQ[33]/DDR1_DQ[17]

AC11

DDR1_DQ[34]/DDR1_DQ[18]

AC10

DDR1_DQ[35]/DDR1_DQ[19]

AA7

DDR1_DQ[36]/DDR1_DQ[20]

AA8

DDR1_DQ[37]/DDR1_DQ[21]

AC8

DDR1_DQ[38]/DDR1_DQ[22]

AC7

DDR1_DQ[39]/DDR1_DQ[23]

W8

DDR1_DQ[40]/DDR1_DQ[24]

W7

DDR1_DQ[41]/DDR1_DQ[25]

V10

DDR1_DQ[42]/DDR1_DQ[26]

V11

DDR1_DQ[43]/DDR1_DQ[27]

W11

DDR1_DQ[44]/DDR1_DQ[28]

W10

DDR1_DQ[45]/DDR1_DQ[29]

V7

DDR1_DQ[46]/DDR1_DQ[30]

V8

DDR1_DQ[47]/DDR1_DQ[31]

R11

DDR1_DQ[48]

P11

DDR1_DQ[49]

P7

DDR1_DQ[50]

R8

DDR1_DQ[51]

R10

DDR1_DQ[52]

P10

DDR1_DQ[53]

R7

DDR1_DQ[54]

P8

DDR1_DQ[55]

L11

DDR1_DQ[56]

M11

DDR1_DQ[57]

L7

DDR1_DQ[58]

M8

DDR1_DQ[59]

L10

DDR1_DQ[60]

M10

DDR1_DQ[61]

M7

DDR1_DQ[62]

L8

DDR1_DQ[63]

AW11

DDR1_ECC[0]

AY11

DDR1_ECC[1]

AY8

DDR1_ECC[2]

AW8

DDR1_ECC[3]

AY10

DDR1_ECC[4]

AW10

DDR1_ECC[5]

AY7

DDR1_ECC[6]

AW7

DDR1_ECC[7]

G1

DDR_RCOMP[0]

H1

DDR_RCOMP[1]

J2

DDR_RCOMP[2]

SKL-H_BGA1440

@

DDR CHANNEL B

M_CLK_DDR0 [14]
M_CLK_DDR#0 [14]
M_CLK_DDR#1 [14]
M_CLK_DDR1 [14]

DDR_CKE0_DIMMA [14]
DDR_CKE1_DIMMA [14]

DDR_CS0_DIMMA# [14]
DDR_CS1_DIMMA# [14]

M_ODT0 [14]
M_ODT1 [14]

DDR_A_BS0 [14]
DDR_A_BS1 [14]
DDR_A_BG0 [14]

DDR_A_RAS# [14]
DDR_A_WE# [14]
DDR_A_CAS# [14]

DDR_A_BG1 [14]
DDR_A_ACT# [14] DDR_B_ACT# [15]

DDR_A_PAR [14]
DDR_A_ALERT# [14]

RH148 121_0402_1%
RH149 75_0402_1%
RH150 100_0402_1%

DDR_A_D0
DDR_A_D1

DDR_A_D[0..63][14]
DDR_A_MA[0..13][14]
DDR_A_DQS#[0..7][14]
DDR_A_DQS[0..7][14]

D D

C C

B B

DDR_B_D[0..63][15]
DDR_B_MA[0..13][15]
DDR_B_DQS#[0..7][15]
DDR_B_DQS[0..7][15]

DDR_A_D2
DDR_A_D7
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D3
DDR_A_D9
DDR_A_D13 DDR_B_D8
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D8
DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D16
DDR_A_D23
DDR_A_D19
DDR_A_D21
DDR_A_D17
DDR_A_D22
DDR_A_D18
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_D43
DDR_A_D47
DDR_A_D41
DDR_A_D40
DDR_A_D42
DDR_A_D46
DDR_A_D53
DDR_A_D51
DDR_A_D49
DDR_A_D55
DDR_A_D52
DDR_A_D54
DDR_A_D48
DDR_A_D50
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D63
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D59

DDR0_DQ[0]

BT6

DDR0_DQ[1]

BP3

DDR0_DQ[2]

BR3

DDR0_DQ[3]

BN5

DDR0_DQ[4]

BP6

DDR0_DQ[5]

BP2

DDR0_DQ[6]

BN3

DDR0_DQ[7]

BL4

DDR0_DQ[8]

BL5

DDR0_DQ[9]

BL2

DDR0_DQ[10]

BM1

DDR0_DQ[11]

BK4

DDR0_DQ[12]

BK5

DDR0_DQ[13]

BK1

DDR0_DQ[14]

BK2

DDR0_DQ[15]

BG4

DDR0_DQ[16]/DDR0_DQ[32]

BG5

DDR0_DQ[17]/DDR0_DQ[33]

BF4

DDR0_DQ[18]/DDR0_DQ[34]

BF5

DDR0_DQ[19]/DDR0_DQ[35]

BG2

DDR0_DQ[20]/DDR0_DQ[36]

BG1

DDR0_DQ[21]/DDR0_DQ[37]

BF1

DDR0_DQ[22]/DDR0_DQ[38]

BF2

DDR0_DQ[23]/DDR0_DQ[39]

BD2

DDR0_DQ[24]/DDR0_DQ[40]

BD1

DDR0_DQ[25]/DDR0_DQ[41]

BC4

DDR0_DQ[26]/DDR0_DQ[42]

BC5

DDR0_DQ[27]/DDR0_DQ[43]

BD5

DDR0_DQ[28]/DDR0_DQ[44]

BD4

DDR0_DQ[29]/DDR0_DQ[45]

BC1

DDR0_DQ[30]/DDR0_DQ[46]

BC2

DDR0_DQ[31]/DDR0_DQ[47]

AB1

DDR0_DQ[32]/DDR1_DQ[0]

AB2

DDR0_DQ[33]/DDR1_DQ[1]

AA4

DDR0_DQ[34]/DDR1_DQ[2]

AA5

DDR0_DQ[35]/DDR1_DQ[3]

AB5

DDR0_DQ[36]/DDR1_DQ[4]

AB4

DDR0_DQ[37]/DDR1_DQ[5]

AA2

DDR0_DQ[38]/DDR1_DQ[6]

AA1

DDR0_DQ[39]/DDR1_DQ[7]

V5

DDR0_DQ[40]/DDR1_DQ[8]

V2

DDR0_DQ[41]/DDR1_DQ[9]

U1

DDR0_DQ[42]/DDR1_DQ[10]

U2

DDR0_DQ[43]/DDR1_DQ[11]

V1

DDR0_DQ[44]/DDR1_DQ[12]

V4

DDR0_DQ[45]/DDR1_DQ[13]

U5

DDR0_DQ[46]/DDR1_DQ[14]

U4

DDR0_DQ[47]/DDR1_DQ[15]

R2

DDR0_DQ[48]/DDR1_DQ[32]

P5

DDR0_DQ[49]/DDR1_DQ[33]

R4

DDR0_DQ[50]/DDR1_DQ[34]

P4

DDR0_DQ[51]/DDR1_DQ[35]

R5

DDR0_DQ[52]/DDR1_DQ[36]

P2

DDR0_DQ[53]/DDR1_DQ[37]

R1

DDR0_DQ[54]/DDR1_DQ[38]

P1

DDR0_DQ[55]/DDR1_DQ[39]

M4

DDR0_DQ[56]/DDR1_DQ[40]

M1

DDR0_DQ[57]/DDR1_DQ[41]

L4

DDR0_DQ[58]/DDR1_DQ[42]

L2

DDR0_DQ[59]/DDR1_DQ[43]

M5

DDR0_DQ[60]/DDR1_DQ[44]

M2

DDR0_DQ[61]/DDR1_DQ[45]

L5

DDR0_DQ[62]/DDR1_DQ[46]

L1

DDR0_DQ[63]/DDR1_DQ[47]

BA2

DDR0_ECC[0]

BA1

DDR0_ECC[1]

AY4

DDR0_ECC[2]

AY5

DDR0_ECC[3]

BA5

DDR0_ECC[4]

BA4

DDR0_ECC[5]

AY1

DDR0_ECC[6]

AY2

DDR0_ECC[7]

DDR CHANNEL A

SKL-H_BGA1440

@

UH1A

BR6

REV = 1

?

SKYLAKE_HALO

BGA1440

DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]

DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]

DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]

DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]

DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]

DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]

DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]

DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]

DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#

DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSN[5]/DDR1_DQSN[3]

DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSP[5]/DDR1_DQSP[3]

2 OF 14

DDR1_CKP[0]
DDR1_CKN[0]
DDR1_CKN[1]

DDR1_CKP[1]
DDR1_CLKP[2]
DDR1_CLKN[2]
DDR1_CLKP[3]
DDR1_CLKN[3]

DDR1_CKE[0]

DDR1_CKE[1]

DDR1_CKE[2]

DDR1_CKE[3]

DDR1_CS#[0]

DDR1_CS#[1]

DDR1_CS#[2]

DDR1_CS#[3]

DDR1_ODT[0]

DDR1_ODT[1]

DDR1_ODT[2]

DDR1_ODT[3]

DDR1_MA[3]
DDR1_MA[4]

DDR1_PAR

DDR1_ALERT#

DDR1_DQSN[6]
DDR1_DQSN[7]

DDR1_DQSP[6]
DDR1_DQSP[7]

DDR1_DQSP[8]
DDR1_DQSN[8]

DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ

?

AM9
AN9
AM8
AM7
AM11
AM10
AJ10
AJ11

AT8
AT10
AT7
AT11

AF11
AE7
AF10
AE10

AF7
AE8
AE9
AE11

AH10
AH11
AF8

AH8
AH9
AR9

AJ9
AK6
AK5
AL5
AL6
AM6
AN7
AN10
AN8
AR11
AH7
AN11
AR10
AF9
AR7
AT9

AJ7
AR8

BP9
BL9
BG9
BC9
AC9
W9
R9
M9

BR9
BJ9
BF9
BB9
AA9
V9
P9
L9

AW9
AY9

BN13
BP13
BR13

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

M_CLK_DDR2 [15]
M_CLK_DDR#2 [15]
M_CLK_DDR#3 [15]
M_CLK_DDR3 [15]

DDR_CKE2_DIMMB [15]
DDR_CKE3_DIMMB [15]

DDR_CS2_DIMMB# [15]
DDR_CS3_DIMMB# [15]

M_ODT2 [15]
M_ODT3 [15]

DDR_B_RAS# [15]
DDR_B_WE# [15]
DDR_B_CAS# [15]

DDR_B_BS0 [15]
DDR_B_BS1 [15]
DDR_B_BG0 [15]

DDR_B_BG1 [15]

DDR_B_PAR [15]
DDR_B_ALERT# [15]

+V_DDR_REFA_R
+V_DDR_REFB_R

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

PROCESSOR(3/7) DDRIII

PROCESSOR(3/7) DDRIII

PROCESSOR(3/7) DDRIII

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

8 71Thursday, August 06, 2015

8 71Thursday, August 06, 2015

8 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

CFG Straps for Processor

4

+VCCST

3

2

1

Stall reset sequence after PCU PLL lock until de-asserted

CFG0

D D

1 = (Default) Normal Operation; No stall.

*

0 = Stall.

1 2

CFG0

@

RH183 1K_0402_5%

PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS

CFG2

Display Port Presence Strap

C C

CFG4

1: Normal Operation; Lane # definition matches
socket pin map definition

0:Lane Reversed

*

1 2

CFG2

RH184 1K_0402_5%

1 : Disabled; No Physical Display Port
attached to Embedded Display Port

0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

*

1 2

CFG4

RH185 1K_0402_5%

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

*

CFG[6:5]

B B

10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled

01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

1 2

CFG5

@

RH186 1K_0402_5%

1 2

CFG6

@

RH187 1K_0402_5%

1 2

RH163 1K_0402_5%

1 2

RH156 51_0402_5%

1 2

RH164 1K_0402_5%

1 2

RH151 100_0402_5%

1 2

RH152 56.2_0402_1%

1 2

RH570 49.9_0402_1%

+VCCSTG

1 2

RH165 1K_0402_5%

SM_PG_CTRL[59]

PEG DEFER TRAINING

CFG7

1: (Default) PEG Train immediately following xxRESETB
de assertion

*

0: PEG Wait for BIOS for training

1 2

CFG7

A A

@

RH188 1K_0402_5%

H_THERMTRIP#_R

XDP_PREQ#

@

H_VCCST_PWRGD

VR_SVID_DATA

VR_SVID_ALERT#

H_CATERR#

@

1 2

RH153 220_0402_5%

1 2

RH158 499_0402_1%

1 2

RH154 60.4_0402_1%

1 2

RH155 20_0402_5%

1 2

RH190 0_0402_5%@

1 2

RH519 0_0402_5%@

1 2

RH167 30_0402_5%

1 2

RH192 30_0402_5%

H_PROCHOT#

+1.2V_DDR

1

2

+3VS

12

X06.26

@

CH197

0.1U_0402_10V7K

RH525
220K_0402_5%

VR_SVID_ALERT#[64]

VR_SVID_CLK[64]
VR_SVID_DATA[64]
H_PROCHOT#[48,56,64]

H_VCCST_PWRGD[6,34]

H_CPUPWRGD[18]
PLTRST_CPU#[6,16]

H_PM_SYNC_R[16]

H_PM_DOWN[16]

H_PECI[16,48]

H_THERMTRIP#_R[16,48]
PROC_DETECT#[16]

UC1

5

VCC

4

Y

GND

74AUP1G07GW_TSSOP5

PCH_TRIGGER[22]
CPU_TRIGGER[22]

VR_SVID_ALERT#
VR_SVID_DATA

H_VCCST_PWRGD

H_PM_DOWN

1

NC

2

DDR_VTT_PG_CTRL

A

3

PCH_TRIGGER PCH_TRIGGER_R
CPU_TRIGGER CPU_TRIGGER_R

PCH_CPU_BCLK_P[17]
PCH_CPU_BCLK_N[17]

PCH_CPU_PCIBCLK_P[17]
PCH_CPU_PCIBCLK_N[17]

CPU_24MHZ_P[17]
CPU_24MHZ_N[17]

VR_SVID_ALERT#_R

H_PROCHOT#_RH_PROCHOT#
DDR_VTT_PG_CTRL

VCCST_PWRGD_CPU

PLTRST_CPU#
H_PM_SYNC_R
H_PM_DOWN_R
H_PECI_R
H_THERMTRIP#_R

H_CATERR#

BN35

BN33

AE29
AA14

BR35
BR31
BH30

BL34

D1
E1
E3
E2

BR1
BT2

J24

H24

N29
R14

A36
A37

H23

J23
F30

E30
B30

C30

G3
J3

T39PAD~D@
T40PAD~D@
T41PAD~D@
T42PAD~D@ T68 PAD~D @

T43PAD~D@

T45PAD~D@
T46PAD~D@

T47PAD~D@
T48PAD~D@
T49PAD~D@

T50PAD~D@ T75 PAD~D @
T51PAD~D@
T52PAD~D@
T53PAD~D@

T57PAD~D@
T58PAD~D@

T59PAD~D@
T60PAD~D@

T61PAD~D@
T62PAD~D@

T63PAD~D@
T64PAD~D@
T65PAD~D@

B31
A32

D35
C36

E31
D31

BH31
BH32
BH29
BR30

BT13

H13

BT31
BP35

BM34

BP31
BT34

J31

BR33

BN1

BM30

UH1K

RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP

RSVD_TP
RSVD_TP

RSVD
RSVD

RSVD
RSVD
RSVD

RSVD
RSVD
RSVD
RSVD

RSVD
RSVD

PROC_TRIGIN
PROC_TRIGOUT

RSVD
RSVD

RSVD
RSVD

RSVD
RSVD

RSVD
RSVD
RSVD

SKL-H_BGA1440

@

UH1E

BCLKP
BCLKN

PCI_BCLKP
PCI_BCLKN

CLK24P
CLK24N

VIDALERT#
VIDSCK
VIDSOUT
PROCHOT#

DDR_VTT_CNTL

VCCST_PWRGD
PROCPWRGD

RESET#
PM_SYNC
PM_DOWN
PECI
THERMTRIP#

SKTOCC#
PROC_SELECT#

CATERR#

SKL-H_BGA1440

@

SKYLAKE_HALO

BGA1440

REV = 1

SKYLAKE_HALO

BGA1440

5 OF 14

?

11 OF 14

?

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]

CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]

CFG[17]
CFG[16]
CFG[19]
CFG[18]

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]

PROC_TDO

PROC_TDI
PROC_TMS
PROC_TCK

PROC_TRST#
PROC_PREQ#
PROC_PRDY#

CFG_RCOMP

?

RSVD_TP
RSVD_TP

RSVD_TP
RSVD_TP

RSVD_TP
RSVD_TP

RSVD_TP
RSVD_TP

RSVD_TP
RSVD_TP

RSVD
RSVD

RSVD
RSVD

RSVD
RSVD

RSVD
RSVD
RSVD

NCTF
NCTF
NCTF
NCTF
NCTF
NCTF

BN25
BN27
BN26
BN28
BR20
BM20
BT20
BP20
BR23
BR22
BT23
BT22
BM19
BR19
BP19
BT19

BN23
BP23
BP22
BN22

BR27
BT27
BM31
BT30

BT28
BL32
BP28
BR28

BP30
BL30
BP27

BT25

VSS

VSS

?REV = 1

BM33
BL33

BJ14
BJ13

BK28
BJ28

BJ18
BJ16

BK16

BK24
BJ24

BK21
BJ21

BT17
BR17

BK18
BJ34

BJ33

G13
AJ8
BL31

B2
B38
BP1
BR2
C1
C38

CFG10
CFG11
CFG12
CFG13
CFG14
CFG15

CFG17
CFG16
CFG19
CFG18

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9

CPU_XDP_TDO
CPU_XDP_TDI
CPU_XDP_TMS
CPU_XDP_TCK

CPU_XDP_TRST#
XDP_PREQ#
XDP_PRDY#

CFG_RCOMP

CFG0 [6]
CFG1 [6]
CFG2 [6]
CFG3 [6]
CFG4 [6]
CFG5 [6]
CFG6 [6]
CFG7 [6]
CFG8 [6]
CFG9 [6]
CFG10 [6]
CFG11 [6]
CFG12 [6]
CFG13 [6]
CFG14 [6]
CFG15 [6]

CFG17 [6]
CFG16 [6]
CFG19 [6]
CFG18 [6]

XDP_BPM#0 [6]
XDP_BPM#1 [6]

12

RH59

49.9_0402_1%

T66 PAD~D @
T67 PAD~D @

T69 PAD~D @
T70 PAD~D @T44PAD~D@

T71 PAD~D @

T73 PAD~D @
T74 PAD~D @

T76 PAD~D @
T77 PAD~D @

T78 PAD~D @
T79 PAD~D @

T80 PAD~D @

T81 PAD~D @
T82 PAD~D @

T83 PAD~D @
T84 PAD~D @

T85 PAD~D @
T86 PAD~D @
T87 PAD~D @
T88 PAD~D @
T89 PAD~D @
T90 PAD~D @

CPU_XDP_TDO [6]
CPU_XDP_TDI [6]
CPU_XDP_TMS [6]
CPU_XDP_TCK [6]

CPU_XDP_TRST# [6,22]
XDP_PREQ# [6,22]
XDP_PRDY# [6,22]

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PROCESSOR(4/7) RSVD,CFG

PROCESSOR(4/7) RSVD,CFG

PROCESSOR(4/7) RSVD,CFG

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

9 71Thursday, August 06, 2015

9 71Thursday, August 06, 2015

9 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

D D

SKYLAKE_HALO

UH1G

AA13
AA31
AA32
AA33
AA34
AA35
AA36
AA37
AA38
AB29
AB30
AB31
AB32
AB35
AB36
AB37
AB38
AC13
AC14
AC29
AC30
AC31
AC32
AC33
AC34
AC35
AC36
AD13

C C

B B

AD14
AD31
AD32
AD33
AD34
AD35
AD36
AD37
AD38
AE13
AE14
AE30
AE31
AE32
AE35
AE36
AE37
AE38

AF35
AF36
AF37
AF38

K13
K14
L13
N13
N14
N30
N31
N32
N35
N36
N37
N38

P13

BGA1440

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

SKL-H_BGA1440

REV = 1 ?

@

7 OF 14

?

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC_SENSE

VSS_SENSE

4

+VCC_CORE+VCC_CORE

V32
V33
V34
V35
V36
V37
V38
W13
W14
W29
W30
W31
W32
W35
W36
W37
W38
Y29
Y30
Y31
Y32
Y33
Y34
Y35
Y36
L14
P29
P30
P31
P32
P33
P34
P35
P36
R13
R31
R32
R33
R34
R35
R36
R37
R38
T29
T30
T31
T32
T35
T36
T37
T38
U29
U30
U31
U32
U33
U34
U35
U36
V13
V14
V31
P14

AG37
AG38

+VCC_CORE

12

12

RH197
100_0402_1%

1 2

RH198 0_0402_5%@

1 2

RH465 0_0402_5%@

RH466
100_0402_1%

3

VCC_SENSE [64]

VSS_SENSE [64]

X06.26

1 2

RH166 49.9_0402_1%@
RH57 49.9_0402_1%@

1 2
1 2

RH58 49.9_0402_1%@

2

UH1J

BJ17

VCCOPC

BJ19

VCCOPC

BJ20

VCCOPC

BK17

VCCOPC

BK19

VCCOPC

BK20

VCCOPC

BL16

VCCOPC

BL17

VCCOPC

BL18

VCCOPC

BL19

VCCOPC

BL20

VCCOPC

BL21

VCCOPC

BM17

VCCOPC

BN17

VCCOPC

BJ23

RSVD

BJ26

RSVD

BJ27

RSVD

BK23

RSVD

BK26

RSVD

BK27

RSVD

BL23

RSVD

BL24

RSVD

BL25

RSVD

BL26

RSVD

BL27

RSVD

BL28

RSVD

BM24

RSVD

BL15

VCCOPC_SENSE

BM16

VSSOPC_SENSE

BL22

RSVD

BM22

RSVD

BP15

VCCEOPIO

BR15

VCCEOPIO

BT15

VCCEOPIO

BP16

RSVD

BR16

RSVD

BT16

RSVD

BN15

VCCEOPIO_SENSE

BM15

VSSEOPIO_SENSE

BP17

RSVD

BN16

RSVD

BM14

VCC_OPC_1P8

BL14

VCC_OPC_1P8

BJ35

RSVD

BJ36

RSVD

AT13

ZVM#

AW13

MSM#

AU13

ZVM2#

AY13

MSM2#

BT29

OPC_RCOMP

BR25

OPCE_RCOMP

BP25

OPCE_RCOMP2

SKL-H_BGA1440

REV = 1

@

SKYLAKE_HALO

BGA1440

1

?

10 OF 14

?

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

PROCESSOR(5/7) PWR,BYPASS

PROCESSOR(5/7) PWR,BYPASS

PROCESSOR(5/7) PWR,BYPASS

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

10 71Thursday, August 06, 2015

10 71Thursday, August 06, 2015

10 71Thursday, August 06, 2015

1

0.1(X00)

0.1(X00)

0.1(X00)

5

4

3

2

1

+VCCSTG

D D

+VCCSA

?

SKYLAKE_HALO

UH1I

VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA

VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO

BGA1440

VCCPLL_OC
VCCPLL_OC

VCCSA_SENSE

VSSSA_SENSE
VCCIO_SENSE

VSSIO_SENSE

J30
K29
K30
K31
K32
K33
K34
K35
L31
L32
L35
L36
L37
L38
M29
M30
M31
M32
M33
M34

AG12

M35
M36

G15
G17
G19
G21
H15
H16
H17
H19
H20
H21
H26
H27
J15
J16
J17
J19
J20
J21
J26
J27

C C

+VCCIO

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDDQC

VCCST
VCCSTG
VCCSTG

VCCPLL
VCCPLL

+1.2V_DDR

AA6
AE12
AF5
AF6
AG5
AG9
AJ12
AL11
AP6
AP7
AR12
AR6
AT12
AW6
AY6
J5
J6
K12
K6
L12
L6
R6
T6
W6

Y12
BH13

G11

H30
H29
G30
H28

J28

M38
M37

H14
J14

+1.2V_DDR

12

X06.26

RH473

@

0_0402_5%

+VCCST

RH201 100_0402_1%
RH202 0_0402_5%@
RH470 0_0402_5%@
RH469 100_0402_1%

1 2

RH530 0_0402_5%@

+VCCSTG

+VCCST

1 2
1 2
1 2
1 2

+1.2V_DDR+1.2V_VCCPLL_OC

+VCCSA

VCCSA_SENSE [64]

VSSSA_SENSE [64]

X06.26

VCCIO_SENSE [61]

VSSIO_SENSE [61]

10U_0603_6.3V6M

CH102

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

CH104

CH103

1

1

2

2

1U_0402_6.3V6K

CH105

1

1

2

2

1U_0402_6.3V6K

CH106

+VCCST+VCCIO

+1.2V_DDR

1

2

1U_0402_6.3V6K

CH107

1

2

22U_0603_6.3V6M

1

CH129

2

+1.2V_DDR

1U_0402_6.3V6K

1U_0402_6.3V6K

CH108

CH109

1

1

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

1

1

CH132

CH131

CH130

2

2

22U_0603_6.3V6M

22U_0603_6.3V6M

1

2

22U_0603_6.3V6M

CH121

CH118

CH124

1

1

2

2

+VCCSA

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

CH110

1

1

2

2

+VCCSA +VCCSA

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

22U_0603_6.3V6M

CH119

CH120

1

1

2

1

2

2

10U_0603_6.3V6M

CH111

CH112

CH113

1

1

2

2

1U_0402_6.3V6K

CH133

CH134

1

1

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

CH122

CH123

1

1

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

CH114

CH115

CH116

1

1

2

2

1U_0402_6.3V6K

CH135

CH117

1

1

2

2

330U_B2_2.5VM_R9M

47U_0603_6.3V6M

1

CH138

CH136

1

+

2

2

X06.08

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

CH125

1

2

10U_0603_6.3V6M

CH127

CH126

CH128

1

1

2

2

B B

A A

SKL-H_BGA1440

@

5

9 OF 14

?REV = 1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PROCESSOR(6/7) PWR

PROCESSOR(6/7) PWR

PROCESSOR(6/7) PWR

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

11 71Thursday, August 06, 2015

11 71Thursday, August 06, 2015

11 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

4

3

2

1

+VCCGT

?

SKYLAKE_HALO

UH1H

D D

C C

B B

BG34
BG35
BG36
BH33
BH34
BH35
BH36
BH37
BH38

BJ37
BJ38
BL36

BL37
BM36
BM37
BN36
BN37
BN38
BP37
BP38
BR37
BT37
BE38
BF13
BF14
BF29
BF30
BF31
BF32
BF35
BF36
BF37
BF38
BG29
BG30
BG31
BG32
BG33

BC36

BC37

BC38

BD13

BD14

BD29

BD30

BD31

BD32

BD33

BD34

BD35

BD36

BE31

BE32
BE37

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

SKL-H_BGA1440

@

BGA1440

REV = 1

8 OF 14

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

+VCCGT +VCCGT

AV29
AV30
AV31
AV32
AV33
AV34
AV35
AV36
AW14
AW31
AW32
AW33
AW34
AW35
AW36
AW37
AW38
AY29
AY30
AY31
AY32
AY35
AY36
AY37
AY38
BA13
BA14
BA29
BA30
BA31
BA32
BA33
BA34
BA35
BA36
BB13
BB14
BB31
BB32
BB33
BB34
BB35
BB36
BB37
BB38
BC29
BC30
BC31
BC32
BC35
BE33
BE34
BE35
BE36

?

AJ29
AJ30
AJ31
AJ32
AJ33
AJ34
AJ35
AJ36
AK31
AK32
AK33
AK34
AK35
AK36
AK37
AK38
AL13
AL29
AL30
AL31
AL32
AL35
AL36
AL37

AL38
AM13
AM14
AM29
AM30
AM31
AM32
AM33
AM34
AM35
AM36

AN13

AN14

AN31

AN32

AN33

AN34

AN35

AN36

AN37

AN38

AP13

AP14

AP29

AP30

AP31

AP32

AP35

AP36

AP37

AP38

AR29

AR30

AR31

AR32

AR33

AR34

AR35

AR36

AT14

AT31

AT32

AT33

AT34

AT35

AT36

AT37

AT38

AU14

AU29

AU30

AU31

AU32

AU35

AU36

AU37

AU38

UH1N

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

SKL-H_BGA1440

REV = 1
@

?

SKYLAKE_HALO

BGA1440

14 OF 14

VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX

VCCGT_SENSE

VSSGTX_SENSE

VSSGT_SENSE

VCCGTX_SENSE

AF29
AF30
AF31
AF32
AF33
AF34
AG13
AG14
AG31
AG32
AG33
AG34
AG35
AG36
AH13
AH14
AH29
AH30
AH31
AH32
AJ13
AJ14

+VCCGT

12

RH203
100_0402_1%

AH38
AH35
AH37
AH36

?

1 2

RH204 0_0402_5%@

1 2

RH471 0_0402_5%@

12

RH472
100_0402_1%

VCCGT_SENSE [64]
VSSGT_SENSE [64]

X06.26

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROCESSOR(2/7) PM,XDP,CLK

PROCESSOR(2/7) PM,XDP,CLK

PROCESSOR(2/7) PM,XDP,CLK

12 71Thursday, August 06, 2015

12 71Thursday, August 06, 2015

1

12 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

4

3

2

1

?

SKYLAKE_HALO

UH1F

BGA1440

Y38

VSS

Y37

VSS

Y14

VSS

Y13

W34
W33
W12

M14
M13
M12

Y11

Y10

Y9
Y8
Y7

W5
W4
W3
W2

W1
V30
V29

V12

V6
U38
U37

U6

T34
T33
T14
T13
T12

T11
T10

T9
T8
T7
T5
T4
T3
T2

T1
R30
R29
R12
P38
P37

P12

P6
N34
N33
N12
N11
N10

N9

N8

N7

N6

N5

N4

N3

N2

N1

M6

L34
L33
L30

L29
K38
K11
K10

K9
K8
K7
K5
K4
K3
K2

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SKL-H_BGA1440

REV = 1

@

6 OF 14

D D

C C

B B

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NCTFVSS

K1
J36
J33
J32
J25
J22
J18
J10
J7
J4
H35
H32
H25
H22
H18
H12
H11
G28
G26
G24
G23
G22
G20
G18
G16
G14
G12
G10
G9
G8
G6
G5
G4
F36
F31
F29
F27
F25
F23
F21
F19
F17
F15
F13
F11
F9
F8
F5
F4
F3
F2
E38
E35
E34
E9
E4
D33
D30
D28
D26
D24
D22
D20
D18
D16
D14
D12
D10
D9
D6
D3
C37
C31
C29
C27

D38

?

BT32
BT26
BT24
BT21
BT18
BT14
BT12

BR36
BR34
BR29
BR26
BR24
BR21
BR18
BR14
BR12

BR7
BP34
BP33
BP29
BP26
BP24
BP21
BP18
BP14
BP12

BN34
BN31
BN30
BN29
BN24
BN21
BN20
BN19
BN18
BN14
BN12

BN9

BN7

BN4

BN2

BM38
BM35
BM28
BM27
BM26
BM23
BM21
BM13
BM12

BM9

BM6

BM2

BL29
BK29
BK15
BK14

BJ32

BJ31

BJ25

BJ22
BH14
BH12

BH9
BH8
BH5
BH4

BH1
BG38
BG13
BG12
BF33
BF12
BE29

BD9
BC34
BC12
BB12

C17
C13

C9

BT9
BT5

BP7

BE6

REV = 1
@

SKYLAKE_HALO

UH1L

BGA1440

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SKL-H_BGA1440

?

12 OF 14

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS

SKYLAKE_HALO

UH1M

AW5
AW4
AW3
AW2
AW1

AM5
AM4
AM3
AM2
AM1

BB4
BB3
BB2
BB1

BA9
BA8
BA7
BA6

AU9
AU8
AU7
AU6

AT6

AR5
AR4
AR3
AR2
AR1

AP9
AP8

AN6
AN5

AL9
AL8
AL7
AL4

B9

BGA1440

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SKL-H_BGA1440

REV = 1

@

?

13 OF 14

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS

AK30
AK29
AK4
AJ38
AJ37
AJ6
AJ5
AJ4
AJ3
AJ2
AJ1
AH34
AH33
AH12
AH6
AG30
AG29
AG11
AG10
AG8
AG7
AG6
AF14
AF13
AF12
AF4
AF3
AF2
AF1
AE34
AE33
AE6
AD30
AD29
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AC38
AC37
AC12
AC6
AC5
AC4
AC3
AC2
AC1
AB34
AB33
AB6
AA30
AA29
AA12
A30
A28
A26
A24
A22
A20
A18
A16
A14
A12
A10
A9
A6

B37
B3
A34
A4
A3

?

C25
C23
C21
C19
C15
C11
C8
C5
BM29
BM25
BM18
BM11
BM8
BM7
BM5
BM3
BL38
BL35
BL13
BL6
BK25
BK22
BK13
BK6
BJ30
BJ29
BJ15
BJ12
BH11
BH10
BH7
BH6
BH3
BH2
BG37
BG14
BG6
BF34
BF6
BE30
BE5
BE4
BE3
BE2
BE1
BD38
BD37
BD12
BD11
BD10
BD8
BD7
BD6
BC33
BC14
BC13
BC6
BB30
BB29
BB6
BB5

C2
BT36
BT35
BT4
BT3
BR38

?

BA38
BA37
BA12
BA11
BA10

AY34
AY33
AY14

AY12
AW30
AW29
AW12

AV38

AV37

AU34

AU33

AU12

AU11

AU10

AT30

AT29

AR38

AR37

AR14

AR13

AP34

AP33

AP12

AP11

AP10

AN30

AN29

AN12

AM38
AM37
AM12

AL34

AL33

AL14

AL12

AL10

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(7/7) VSS

PROCESSOR(7/7) VSS

PROCESSOR(7/7) VSS

1

0.1(X00)

0.1(X00)

13 71Thursday, August 06, 2015

13 71Thursday, August 06, 2015

13 71Thursday, August 06, 2015

0.1(X00)

5

Layout Note:
Place near JDIMM1.257,259

+2.5V_MEM

D D

Layout Note:
Place near JDIMM1

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

CD10

CD9

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD4

CD3

1

1

2

2

Layout Note:
Place near JDIMM1.258

+0.6VS

10U_0603_6.3V6M

1U_0402_6.3V6K

CD12

CD13

1

1

1

2

2

2

+1.2V_DDR

1U_0402_6.3V6K

CD1

1

2

C C

1U_0402_6.3V6K

1U_0402_6.3V6K

CD2

1

2

1U_0402_6.3V6K

CD75

CD74

1

1

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD76

CD77

1

1

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD78

CD79

1

1

2

2

+1.2V_DDR

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

1

1

CD5

CD6

2

2

2

B B

+3VS +3VS +3VS

12

RD1

@

0_0402_5%

12

RD28

@

0_0402_5%

+V_DDR_REFA_R

1

CD7

CD8

CD70

2

2

12

RD2

@

0_0402_5%

12

RD29

@

0_0402_5%

+1.2V_DDR

20mil

1 2

RH484 2_0402_1%

A A

1

CH101

0.022U_0402_25V7K

2

12

RH211

24.9_0402_1%

1

2

12

1K_0402_1%

12

1K_0402_1%

10U_0603_6.3V6M

CD71

RH206

RH209

10U_0603_6.3V6M

1

2

+V_DDR_REFA

10U_0603_6.3V6M

1

CD72

CD73

2

12

RD3

@

0_0402_5%

12

RD30

@

0_0402_5%

10U_0603_6.3V6M

CD14

X06.16

10U_0603_6.3V6M

CD15

1

2

1

+

CD11
220U_D7_2VM_R6M

2

4

DDR4_DRAMRST#DIMM_CHA_SA0 DIMM_CHA_SA1 DIMM_CHA_SA2

DDR_A_D[0..63][8]
DDR_A_MA[0..13][8]
DDR_A_DQS#[0..7][8]
DDR_A_DQS[0..7][8]

Layout Note:
Place near JDIMM1.255

+3VS

.1U_0402_16V7K

CD16

1

1

CD17

2.2U_0402_6.3V6M

2

2

0_0402_5%

1 2

RD31

@

X06.12

+1.2V_DDR

12

RD35
470_0402_1%

@

+3VS

3

+1.2V_DDR

DDR_A_D5
DDR_A_D1

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D7
DDR_A_D3
DDR_A_D13
DDR_A_D9

DDR_A_D15
DDR_A_D10
DDR_A_D21
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D23
DDR_A_D19
DDR_A_D29
DDR_A_D25

DDR_A_D30
DDR_A_D26

DDR_CKE0_DIMMA[8]

DDR_A_BG1[8]
DDR_A_BG0[8]

M_CLK_DDR0[8]
M_CLK_DDR#0[8]

DDR_A_PAR[8]
DDR_A_BS1[8]

DDR_CS0_DIMMA#[8]

DDR_A_WE#[8]
M_ODT0[8]

DDR_CS1_DIMMA#[8]

M_ODT1[8]

H_DRAMRST# [18]DDR4_DRAMRST#[15]

.1U_0402_16V7K

CD69

1

2

DDR_CKE0_DIMMA
DDR_A_BG1

DDR_A_BG0

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA6

DDR_A_MA3
DDR_A_MA1

M_CLK_DDR0
M_CLK_DDR#0

DDR_A_PAR
DDR_A_BS1

DDR_CS0_DIMMA#
DDR_A_WE#

M_ODT0
DDR_CS1_DIMMA#

M_ODT1

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D38
DDR_A_D34
DDR_A_D44
DDR_A_D40

+1.2V_DDR

DDR_A_D46 DDR_A_D47
DDR_A_D42 DDR_A_D43

DDR_A_D49 DDR_A_D48
DDR_A_DQS#6

DDR_A_DQS6
DDR_A_D55
DDR_A_D51
DDR_A_D61
DDR_A_D56

+1.2V_DDR

DDR_A_D62 DDR_A_D63

PCH_SMBCLK[6,15,18,45] PCH_SMBDATA [6,15,18,45]

DDR_A_D58 DDR_A_D59

JDIMM1

JP?

1

VSS1

3

DQ5

5

VSS3

7

DQ1

9

VSS5
DQS0_c11DM0_n/DBI0_n

13

DQS0_t

15

VSS8

17

DQ7

19

VSS10

21

DQ3

23

VSS12

25

DQ13

27

VSS14

29

DQ9

31

VSS16

33

DM1_n/DBI_n

35

VSS17

37

DQ15

39

VSS19

41

DQ10

43

VSS21

45

DQ21

47

VSS23

49

DQ17

51

VSS25
DQS2_c53DM2_n/DBI2_n

55

DQS2_t

57

VSS28

59

DQ23

61

VSS30

63

DQ19

65

VSS32

67

DQ29

69

VSS34

71

DQ25

73

VSS36

75

DM3_n/DBI3_n

77

VSS37

79

DQ30

81

VSS39

83

DQ26

85

VSS41

87

CB5/NC

89

VSS43

91

CB1/NC

93

VSS45
DQS8_c95DM8_n/DBI_n/NC

97

DQS8_t

99

VSS48

101

CB2/NC

103

VSS50

105

CB3/NC

107

VSS52

109

CKE0

111

VDD1

113

BG1

115

BG0

117

VDD3

119

A12

121

A9

123

VDD5

125

A8

127

A6

129

VDD7

131

A3

133

A1

135

VDD9

137

CK0_t

139

CK0_c

141

VDD11

143

PARITY

145

BA1

147

VDD13

149

CS0_n

151

WE_n/A14

153

VDD15

155

ODT0

157

CS1_n

159

VDD17

161

ODT1

163

VDD19

165

C1, CS3_n ,NC

167

VSS53

169

DQ37

171

VSS55

173

DQ33

175

VSS57

177

DQS4_c

179

DQS4_t

181

VSS60

183

DQ38

185

VSS62

187

DQ34

189

VSS64

191

DQ44

193

VSS66

195

DQ40

197

VSS68

199

DM5_n/DBI5_n

201

VSS69

203

DQ46

205

VSS71

207

DQ42

209

VSS73

211

DQ52

213

VSS75

215

DQ49

217

VSS77

219

DQS6_c

221

DQS6_t

223

VSS80

225

DQ55

227

VSS82

229

DQ51

231

VSS84

233

DQ61

235

VSS86

237

DQ56

239

VSS88

241

DM7_n/DBI7_n

243

VSS89

245

DQ62

247

VSS91

249

DQ58

251

VSS93

253

SCL

255

VDDSPD

257

VPP1

259

VPP2

261

GND1

BELLW_SD-80886-1021

VSS2
VSS4
VSS6
VSS7
VSS9

VSS11

DQ12

VSS13
VSS15

DQS1_c

DQS1_t

VSS18

DQ14

VSS20

DQ11

VSS22

DQ20

VSS24

DQ16

VSS26
VSS27

DQ22

VSS29

DQ18

VSS31

DQ28

VSS33

DQ24

VSS35

DQS3_c

DQS3_t

VSS38

DQ31

VSS40

DQ27

VSS42

CB4/NC

VSS44

CB0/NC

VSS46
VSS47

CB6/NC

VSS49

CB7/NC

VSS51

RESET_n

CKE1
VDD2

ACT_n

ALERT_n

VDD4

VDD6

VDD8

EVENT_n/NF

VDD10
CK1_t/NF
CK1_c/NF

VDD12

A10/AP

VDD14

RAS_n/A1 6

VDD16

CAS_n/A1 5

VDD18

C0/CS2_n/NC

VREFCA

VSS54

DQ36

VSS56

DQ32

VSS58

DM4_n/DBI4_n

VSS59

DQ39

VSS61

DQ35

VSS63

DQ45

VSS65

DQ41

VSS67

DQS5_c

DQS5_t

VSS70

DQ47

VSS72

DQ43

VSS74

DQ53

VSS76

DQ48

VSS78

DM6_n/DBI6_n

VSS79

DQ54

VSS81

DQ50

VSS83

DQ60

VSS85

DQ57

VSS87

DQS7_c

DQS7_t

VSS90

DQ63

VSS92

DQ59

VSS94

GND2

CONN@

2

+1.2V_DDR

2
4

DQ4

6
8

DQ0

10
12
14
16

DQ6

18
20

DQ2

22
24
26
28

DQ8

30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120

A11

122

A7

124
126

A5

128

A4

130
132

A2

134
136
138
140
142
144

A0

146
148
150

BA0

152
154
156
158

A13

160
162
164
166

SA2

168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
234
236
238
240
242
244
246
248
250
252
254

SDA

256

SA0

258

VTT

260

SA1

262

DDR_A_D4
DDR_A_D0

DDR_A_D6
DDR_A_D2
DDR_A_D12
DDR_A_D8
DDR_A_DQS#1

DDR_A_DQS1
DDR_A_D14
DDR_A_D11
DDR_A_D20
DDR_A_D16

DDR_A_D22
DDR_A_D18
DDR_A_D28
DDR_A_D24

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D31
DDR_A_D27

DDR4_DRAMRST#
DDR_CKE1_DIMMA

DDR_A_ALERT#

DDR_A_MA11
DDR_A_MA7

DDR_A_MA5
DDR_A_MA4

DDR_A_MA2

M_CLK_DDR1
M_CLK_DDR#1

DDR_A_MA0
DDR_A_MA10

DDR_A_BS0
DDR_A_RAS#

DDR_A_CAS#
DDR_A_MA13

DIMM_CHA_SA2
DDR_A_D36DDR_A_D37

DDR_A_D32DDR_A_D33

DDR_A_D39

DDR_A_D35

DDR_A_D45

DDR_A_D41

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D53DDR_A_D52

DDR_A_D54

DDR_A_D50

DDR_A_D60

DDR_A_D57

DDR_A_DQS#7
DDR_A_DQS7

PCH_SMBDATAPCH_SMBCLK
DIMM_CHA_SA0

DIMM_CHA_SA1

+1.2V_DDR

+1.2V_DDR

DDR_CKE1_DIMMA [8]
DDR_A_ACT# [8]

DDR_A_ALERT# [ 8]

M_CLK_DDR1 [8]
M_CLK_DDR#1 [8]

DDR_A_BS0 [8]
DDR_A_RAS# [8]

DDR_A_CAS# [8]

+V_DDR_REFA

.1U_0402_16V7K

CD18

1

2

1

All VREF traces should
have 10 mil trace width

+0.6VS+2.5V_MEM

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DDRIII DIMMA

DDRIII DIMMA

DDRIII DIMMA
LA-C361P

LA-C361P

LA-C361P

1

14 71Thursday, August 06, 2015

14 71Thursday, August 06, 2015

14 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

4

3

2

1

JDIMM2

JP?

1

VSS1

3

DQ5

5

VSS3

7

DQ1

9

VSS5
DQS0_c11DM0_n/DBI0_n

13

DQS0_t

15

VSS8

17

DQ7

19

VSS10

21

DQ3

23

VSS12

25

DQ13

27

VSS14

29

DQ9

31

VSS16

33

DM1_n/DBI_n

35

VSS17

37

DQ15

39

VSS19

41

DQ10

43

VSS21

45

DQ21

47

VSS23

49

DQ17

51

VSS25
DQS2_c53DM2_n/DBI2_n

55

DQS2_t

57

VSS28

59

DQ23

61

VSS30

63

DQ19

65

VSS32

67

DQ29

69

VSS34

71

DQ25

73

VSS36

75

DM3_n/DBI3_n

77

VSS37

79

DQ30

81

VSS39

83

DQ26

85

VSS41

87

CB5/NC

89

VSS43

91

CB1/NC

93

VSS45
DQS8_c95DM8_n/DBI_n/NC

97

DQS8_t

99

VSS48

101

CB2/NC

103

VSS50

105

CB3/NC

107

VSS52

109

CKE0

111

VDD1

113

BG1

115

BG0

117

VDD3

119

A12

121

A9

123

VDD5

125

A8

127

A6

129

VDD7

131

A3

133

A1

135

VDD9

137

CK0_t

139

CK0_c

141

VDD11

143

PARITY

145

BA1

147

VDD13

149

CS0_n

151

WE_n/A14

153

VDD15

155

ODT0

157

CS1_n

159

VDD17

161

ODT1

163

VDD19

165

C1, CS3_n ,NC

167

VSS53

169

DQ37

171

VSS55

173

DQ33

175

VSS57

177

DQS4_c

179

DQS4_t

181

VSS60

183

DQ38

185

VSS62

187

DQ34

189

VSS64

191

DQ44

193

VSS66

195

DQ40

197

VSS68

199

DM5_n/DBI5_n

201

VSS69

203

DQ46

205

VSS71

207

DQ42

209

VSS73

211

DQ52

213

VSS75

215

DQ49

217

VSS77

219

DQS6_c

221

DQS6_t

223

VSS80

225

DQ55

227

VSS82

229

DQ51

231

VSS84

233

DQ61

235

VSS86

237

DQ56

239

VSS88

241

DM7_n/DBI7_n

243

VSS89

245

DQ62

247

VSS91

249

DQ58

251

VSS93

253

SCL

255

VDDSPD

257

VPP1

259

VPP2

261

GND1

BELLW_SD-80886-1021
CONN@

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

EVENT_n/NF

C0/CS2_n/NC

DM4_n/DBI4_n

DM6_n/DBI6_n

Compal Secret Data

Compal Secret Data

Compal Secret Data

VSS2

DQ4

VSS4

DQ0

VSS6
VSS7

DQ6

VSS9

DQ2

VSS11

DQ12

VSS13

DQ8

VSS15

DQS1_c

DQS1_t

VSS18

DQ14

VSS20

DQ11

VSS22

DQ20

VSS24

DQ16

VSS26
VSS27

DQ22

VSS29

DQ18

VSS31

DQ28

VSS33

DQ24

VSS35

DQS3_c

DQS3_t

VSS38

DQ31

VSS40

DQ27

VSS42

CB4/NC

VSS44

CB0/NC

VSS46
VSS47

CB6/NC

VSS49

CB7/NC

VSS51

RESET_n

CKE1
VDD2

ACT_n

ALERT_n

VDD4

VDD6

VDD8

VDD10

CK1_t/NF

CK1_c/NF

VDD12

A10/AP

VDD14

BA0

RAS_n/A1 6

VDD16

CAS_n/A1 5

VDD18

VREFCA

SA2

VSS54

DQ36

VSS56

DQ32

VSS58
VSS59

DQ39

VSS61

DQ35

VSS63

DQ45

VSS65

DQ41

VSS67

DQS5_c

DQS5_t

VSS70

DQ47

VSS72

DQ43

VSS74

DQ53

VSS76

DQ48

VSS78
VSS79

DQ54

VSS81

DQ50

VSS83

DQ60

VSS85

DQ57

VSS87

DQS7_c

DQS7_t

VSS90

DQ63

VSS92

DQ59

VSS94

SDA
SA0

SA1

GND2

Deciphered Date

Deciphered Date

Deciphered Date

+1.2V_DDR

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120

A11

122

A7

124
126

A5

128

A4

130
132

A2

134
136
138
140
142
144

A0

146
148
150
152
154
156
158

A13

160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
234
236
238
240
242
244
246
248
250
252
254
256
258

VTT

260
262

2

DDR_B_D4
DDR_B_D0

DDR_B_D6
DDR_B_D2
DDR_B_D12
DDR_B_D8
DDR_B_DQS#1

DDR_B_DQS1
DDR_B_D14
DDR_B_D11
DDR_B_D20
DDR_B_D16

DDR_B_D22
DDR_B_D18
DDR_B_D28
DDR_B_D24

DDR_B_DQS#3
DDR_B_DQS3

DDR_B_D31
DDR_B_D27

DDR4_DRAMRST#
DDR_CKE3_DIMMB

DDR_B_ALERT#

DDR_B_MA11
DDR_B_MA7

DDR_B_MA5
DDR_B_MA4

DDR_B_MA2

M_CLK_DDR3
M_CLK_DDR#3

DDR_B_MA0
DDR_B_MA10

DDR_B_BS0

DDR_B_RAS#

DDR_B_CAS#

DDR_B_MA13

DIMM_CHB_SA2
DDR_B_D36DDR_B_D37

DDR_B_D32DDR_B_D33

DDR_B_D39

DDR_B_D35

DDR_B_D45

DDR_B_D41

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D53

DDR_B_D48

DDR_B_D54

DDR_B_D50

DDR_B_D60

DDR_B_D57

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D63

PCH_SMBDATAPCH_SMBCLK
DIMM_CHB_SA0

DIMM_CHB_SA1

+1.2V_DDR

+1.2V_DDR

DDR4_DRAMRST# [14]
DDR_CKE3_DIMMB [8]

DDR_B_ACT# [8]
DDR_B_ALERT# [ 8]

All VREF traces should

M_CLK_DDR3 [8]
M_CLK_DDR#3 [8]

DDR_B_BS0 [8]
DDR_B_RAS# [8]

DDR_B_CAS# [8]

+V_DDR_REFB

.1U_0402_16V7K

CD29

1

2

+0.6VS+2.5V_MEM

Title

Title

Title

DDRIII DIMMB

DDRIII DIMMB

DDRIII DIMMB

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-C361P

LA-C361P

LA-C361P

Date: Sheet of

Date: Sheet of

Date: Sheet of

have 10 mil trace width

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

0.1(X00)

0.1(X00)

15 71Thursday, August 06, 2015

15 71Thursday, August 06, 2015

15 71Thursday, August 06, 2015

0.1(X00)

DDR_B_D[0..63][8]
DDR_B_MA[0..13][8]
DDR_B_DQS#[0..7][8]

+2.5V_MEM

.1U_0402_16V7K

1

2

DDR_B_DQS[0..7][8]

CD34

1

CD35

2.2U_0402_6.3V6M

2

Layout Note:
Place near JDIMM1.258

+0.6VS

D D

1U_0402_6.3V6K

CD32

1

2

Layout Note:
Place near JDIMMB

10U_0603_6.3V6M

10U_0603_6.3V6M

1

CD90

2

10U_0603_6.3V6M

1

1

CD89

2

2

Layout Note:
Place near JDIMM2.257,259

+2.5V_MEM

CD88

10U_0603_6.3V6M

1U_0402_6.3V6K

CD30

1

2

10U_0603_6.3V6M

1U_0402_6.3V6K

CD31

1

2

1

1

CD27

2

2

CD28

Layout Note:
Place near JDIMM2.255

DDR_B_D5
DDR_B_D1

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D7
DDR_B_D3
DDR_B_D13
DDR_B_D9

DDR_B_D15
DDR_B_D10
DDR_B_D21
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D23
DDR_B_D19
DDR_B_D29
DDR_B_D25

DDR_B_D30
DDR_B_D26

+1.2V_DDR

+1.2V_DDR

1U_0402_6.3V6K

C C

1U_0402_6.3V6K

CD19

1

2

CD21

CD20

1

1

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

CD22

1

2

CD81

CD83

1

1

2

2

+1.2V_DDR

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

CD24

CD23

2

2

B B

+3VS +3VS +3VS

12

@

DIMM_CHB_SA0 DIMM_CHB_SA1 DIMM_CHB_SA2

A A

12

+V_DDR_REFB_R

12

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

CD26

CD25

2

2

RD4
0_0402_5%

RD38
0_0402_5%@

20mil

1 2

RH485 2_0402_1%

1

CH100

0.022U_0402_25V7K

2

RH212

24.9_0402_1%

5

1

2

10U_0603_6.3V6M

CD87

1

2

12

12

RD39

@

0_0402_5%

+1.2V_DDR

10U_0603_6.3V6M

X06.12

RD5
0_0402_5%@

12

12

CD85

1K_0402_1%

1K_0402_1%

1U_0402_6.3V6K

1

2

10U_0603_6.3V6M

1

2

RH207

+V_DDR_REFB

RH210

1U_0402_6.3V6K

CD82

CD80

1

2

10U_0603_6.3V6M

1

1

+

CD84

2

CD33

CD86

220U_D7_2VM_R6M

2

12

RD6

@

0_0402_5%

12

X06.12X06.12

RD40
0_0402_5%@

4

DDR_CKE2_DIMMB[8]

DDR_B_BG1[8]
DDR_B_BG0[8]

M_CLK_DDR2[8]
M_CLK_DDR#2[8]

DDR_B_PAR[8]
DDR_B_BS1[8]

DDR_CS2_DIMMB#[8]

DDR_B_WE#[8]
M_ODT2[8]

DDR_CS3_DIMMB#[8]

M_ODT3[8]

+3VS

DDR_CKE2_DIMMB
DDR_B_BG1

DDR_B_BG0

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA6

DDR_B_MA3
DDR_B_MA1

M_CLK_DDR2
M_CLK_DDR#2

DDR_B_PAR
DDR_B_BS1

DDR_CS2_DIMMB#
DDR_B_WE#

M_ODT2
DDR_CS3_DIMMB#

M_ODT3

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D38
DDR_B_D34
DDR_B_D44
DDR_B_D40

+1.2V_DDR

DDR_B_D46 DDR_B_D47
DDR_B_D42 DDR_B_D43
DDR_B_D52
DDR_B_D49
DDR_B_DQS#6

DDR_B_DQS6
DDR_B_D55
DDR_B_D51
DDR_B_D61
DDR_B_D56

+1.2V_DDR

DDR_B_D62

PCH_SMBCLK[6,14,18,45] PCH_SMBDATA [6,14,18,45]

3

DDR_B_D58 DDR_B_D59

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONT AINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORM ATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONIC S, INC.

5

4

3

2

1

CLINK

REV = 1.3

SKY-S-PCH_BGA837

FAN

HOST

3 OF 12REV = 1.3

SKY-S-PCH_BGA837

5 OF 12

PCIE9_RXN/SATA0A_RXN
PCIE9_RXP/SATA0A_RXP
PCIE9_TXN/SATA0A_TXN
PCIE9_TXP/SATA0A_TXP

PCIE10_RXN/SATA1A_RXN

PCIE10_RXP/SATA1A_RXP
PCIE10_TXN/SATA1A_TXN
PCIE10_TXP/SATA1A_TXP

PCIE15_RXN/SATA2_RXN
PCIE15_RXP/SATA2_RXP
PCIE15_TXN/SATA2_TXN

PCIE15_TXP/SATA2_TXP

PCIe/SATA

PCIE16_RXN/SATA3_RXN
PCIE16_RXP/SATA3_RXP
PCIE16_TXN/SATA3_TXN

PCIE16_TXP/SATA3_TXP

PCIE17_RXN/SATA4_RXN
PCIE17_RXP/SATA4_RXP
PCIE17_TXN/SATA4_TXN

PCIE17_TXP/SATA4_TXP

PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_RXP
PCIE18_TXN/SATA5_TXN

PCIE18_TXP/SATA5_TXP

GPP_E8/SATALED#

GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_F0/SATAXPCIE3/SATAGP3
GPP_F1/SATAXPCIE4/SATAGP4
GPP_F2/SATAXPCIE5/SATAGP5
GPP_F3/SATAXPCIE6/SATAGP6
GPP_F4/SATAXPCIE7/SATAGP7

GPP_F21/EDP_BKLTCTL

GPP_F20/EDP_BKLTEN

GPP_F19/EDP_VDDEN

PLTRST_CPU#

GPP_I7/DDPC_CTRLCLK

GPP_I8/DDPC_CTRLDATA

GPP_I5/DDPB_CTRLCLK

GPP_I6/DDPB_CTRLDATA

GPP_I9/DDPD_CTRLCLK

GPP_I10/DDPD_CTRLDATA

GPP_F14
GPP_F23
GPP_F22

GPP_G23
GPP_G22
GPP_G21
GPP_G20
GPP_H23

THERMTRIP#

PM_SYNC

PM_DOWN

BB3
BD6
BA5
BC4
BE5
BE6

Y44
V44
W39

L43
L44
U35
R35
BD36

G31
H31
C31
B31

G29
E29
C32
B32

F41
E41
B39
A39

D43
E42
A41
A40

H42
H40
E45
F45

K37
G37
G45
G44

AD44
AG36

AG35
AG39
AD35
AD31
AD38
AC43
AB44

W36
W35
W42

AJ3
AL3

PECI

AJ4
AK2
AH2

DDI2_DDPC_CTRLCLK
DDI2_DDPC_CTRLDAT
DDI1_DDPB_CTRLCLK
DDI1_DDPB_CTRLDAT

PCH_SATA_LED#

T182 PAD~D @

HDD_DET#

T104 PAD~D @
T105 PAD~D @
T106 PAD~D @
T107 PAD~D @
T108 PAD~D @

H_THERMTRIP#

PCH_PECI

T2 PAD~D @

T4 PAD~D @

T8 PAD~D @

SATA_PRX_SSDTX_N0A [44]
SATA_PRX_SSDTX_P0A [44]

SATA_PTX_SSDRX_N0A [44]
SATA_PTX_SSDRX_P0A [44]

PCIE_PRX_SSDTX_N10 [44]
PCIE_PRX_SSDTX_P10 [44]

PCIE_PTX_SSDRX_N10 [44]
PCIE_PTX_SSDRX_P10 [44]

PCIE_PRX_TBTX_N15 [37]
PCIE_PRX_TBTX_P15 [37]
PCIE_PTX_TBRX_N15 [37]
PCIE_PTX_TBRX_P15 [37]

PCIE_PRX_TBTX_N16 [37]
PCIE_PRX_TBTX_P16 [37]
PCIE_PTX_TBRX_N16 [37]
PCIE_PTX_TBRX_P16 [37]

mCARD_PCIE#_SATA [44]
HDD_DET# [45]

BIA_PWM_PCH [7,35]
PANEL_BKEN_PCH [35]
ENVDD_PCH [33,48]

1 2

RH191 620_0402_5%

1 2

RH539 13_0402_5%
RH189

1 2

30_0402_5%

PLTRST_CPU# [6,9]

H_PM_DOWN [9]

DDI2_DDPC_CTRLCLK [37]

DDI2_DDPC_CTRLDAT [37]

DDI1_DDPB_CTRLCLK [37]

DDI1_DDPB_CTRLDAT [37]

PROC_DETECT# [9]

LCD_DBC

SSD

Thunderbolt

H_THERMTRIP#_R [9,48]

H_PECI [9,48]

H_PM_SYNC_R [9]

LCD_DBC

DDI2_DDPC_CTRLCLK
DDI2_DDPC_CTRLDAT
DDI1_DDPB_CTRLCLK
DDI1_DDPB_CTRLDAT

mCARD_PCIE#_SATA

CAM_CBL_DET#

PCH_SATA_LED#

HDD_DET#

1 2

RH527 10K_0402_5%

1 2

RH528 10K_0402_5%

@

RP1

1 8
2 7
3 6
4 5

2.2K_8P4R_5%

1 2

RH508 10K_0402_5%

1 2

RH511 10K_0402_5%

1 2

RH512 10K_0402_5%

1 2

RH513 10K_0402_5%

+3VS

+3VS

+3VS

UH2C

T91PAD~D@
T92PAD~D@

T94PAD~D@

DDI1_PCH_HPD
DDI2_PCH_HPD

AV2

CL_CLK

AV3

CL_DATA

AW2

CL_RST#

R44

GPP_G8/FAN_PWM_0

R43

GPP_G9/FAN_PWM_1

U39

GPP_G10/FAN_PWM_2

N42

GPP_G11/FAN_PWM_3

U43

GPP_G0/FAN_TACH_0

U42

GPP_G1/FAN_TACH_1

U41

GPP_G2/FAN_TACH_2

M44

GPP_G3/FAN_TACH_3

U36

GPP_G4/FAN_TACH_4

P44

GPP_G5/FAN_TACH_5

T45

GPP_G6/FAN_TACH_6

T44

GPP_G7/FAN_TACH_7

B33

PCIE11_TXP

C33

PCIE11_TXN

K31

PCIE11_RXP

L31

PCIE11_RXN

AB33

GPP_F10/SCLOCK

AB35

GPP_F11/SLOAD

AA44

GPP_F13/SDATAOUT0

AA45

GPP_F12/SDATAOUT1

B38

PCIE14_TXN/SATA1B_TXN

C38

PCIE14_TXP/SATA1B_TXP

D39

PCIE14_RXN/SATA1B_RXN

E37

PCIE14_RXP/SATA1B_RXP

C36

PCIE13_TXN/SATA0B_TXN

B36

PCIE13_TXP/SATA0B_TXP

G35

PCIE13_RXN/SATA0B_RXN

E35

PCIE13_RXP/SATA0B_RXP

A35

PCIE12_TXP

B35

PCIE12_TXN

H33

PCIE12_RXP

G33

PCIE12_RXN

J45

PCIE20_TXP

K44

PCIE20_TXN

N38

PCIE20_RXP

N39

PCIE20_RXN

H44

PCIE19_TXP

H43

PCIE19_TXN

L39

PCIE19_RXP

L37

PCIE19_RXN

SKY-H-PCH_BGA837

@

AW4

AY2
AV4
BA4

BD7

@

UH2E

GPP_I0/DDPB_HPD0
GPP_I1/DDPC_HPD1
GPP_I2/DDPD_HPD2
GPP_I3/DDPE_HPD3

GPP_I4/EDP_HPD

SKY-H-PCH_BGA837

CLINK_CLK[43]
CLINK_DATA[43]
CLINK_RST#[43]

D D

SSD

HDD

SSD

C C

B B

CAM_CBL_DET#[35]
TBT_CIO_PLUG_EVENT#[37]

SSD_PWR_EN[33]

PCIE_PTX_SSDRX_P11[44]
PCIE_PTX_SSDRX_N11[44]

PCIE_PRX_SSDTX_P11[44]
PCIE_PRX_SSDTX_N11[44]

SATA_PTX_DRX_N1B[45]
SATA_PTX_DRX_P1B[45]

SATA_PRX_DTX_N1B[45]
SATA_PRX_DTX_P1B[45]

PCIE_PTX_SSDRX_P12[44]
PCIE_PTX_SSDRX_N12[44]

PCIE_PRX_SSDTX_P12[44]
PCIE_PRX_SSDTX_N12[44]

DDI1_PCH_HPD[37]
DDI2_PCH_HPD[37]

EDP_HPD[35]

CAM_CBL_DET#

PCH Strap PIN

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

SSD

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (1/8) SATA,HDA

PCH (1/8) SATA,HDA

PCH (1/8) SATA,HDA
LA-C361P

LA-C361P

LA-C361P

1

16 71Thursday, August 06, 2015

16 71Thursday, August 06, 2015

16 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

4

3

2

1

UH2G

AR17

GPP_A16/CLKOUT_48

XTAL24_OUT
XTAL24_IN

PCH_RTCX1
PCH_RTCX2

T17PAD~D@

PCH_SPI_SI_R
PCH_SPI_SO_R
PCH_SPI_CS#
PCH_SPI_CLK_R
PCH_SPI_CS1#

PCH_SPI_WP#_R
PCH_SPI_HOLD#_R

X06.27

1 2

@

G1

CLKOUT_CPUNSSC_P

F1

CLKOUT_CPUNSSC

G2

CLKOUT_CPUBCLK_P

H2

CLKOUT_CPUBCLK

A5

XTAL24_OUT

A6

XTAL24_IN

E1

XCLK_BIASREF

BC9

RTCX1

BD10

RTCX2

BC24

GPP_B5/SRCCLKREQ0#

AW24

GPP_B6/SRCCLKREQ1#

AT24

GPP_B7/SRCCLKREQ2#

BD25

GPP_B8/SRCCLKREQ3#

BB24

GPP_B9/SRCCLKREQ4#

BE25

GPP_B10/SRCCLKREQ5#

AT33

GPP_H0/SRCCLKREQ6#

AR31

GPP_H1/SRCCLKREQ7#

BD32

GPP_H2/SRCCLKREQ8#

BC32

GPP_H3/SRCCLKREQ9#

BB31

GPP_H4/SRCCLKREQ10#

BC33

GPP_H5/SRCCLKREQ11#

BA33

GPP_H6/SRCCLKREQ12#

AW33

GPP_H7/SRCCLKREQ13#

BB33

GPP_H8/SRCCLKREQ14#

BD33

GPP_H9/SRCCLKREQ15#

R13

CLKOUT_PCIE_N15

R11

CLKOUT_PCIE_P15

P1

CLKOUT_PCIE_N14

R2

CLKOUT_PCIE_P14

W7

CLKOUT_PCIE_N13

Y5

CLKOUT_PCIE_P13

U2

CLKOUT_PCIE_N12

U3

CLKOUT_PCIE_P12

SKY-H-PCH_BGA837

@

BD17

GPP_A11/PME#

AG15

RSVD_AG15

AG14

RSVD_AG14

AF17

RSVD_AF17

AE17

RSVD_AE17

AR19

TP5

AN17

TP4

BB29

SPI0_MOSI

BE30

SPI0_MISO

BD31

SPI0_CS0#

BC31

SPI0_CLK

AW31

SPI0_CS1#

BC29

SPI0_IO2

BD30

SPI0_IO3

AT31

SPI0_CS2#

AN36

GPP_D1/SPI1_CLK

AL39

GPP_D0/SPI1_CS#

AN41

GPP_D3/SPI1_MOSI

AN38

GPP_D2/SPI1_MISO

AH43

GPP_D22/SPI1_IO3

AG44

GPP_D21/SPI1_IO2

@

UH2A

SKY-H-PCH_BGA837

+3VS

RP2

4 5
3 6
2 7
1 8

D D

C C

9/5 MOW
Option 1: Implement a 1 kOhm pull-down resistor on the signal and de-populate the

B B

required 1 kOhm pull-up resistor. In this case, customers must ensure that the SPI
flash device on the platform has HOLD functionality disabled by default.

Note that the pull down resistor on SPI0_IO3 is only needed for SKL U/Y platforms
with ES and SKL S/H platforms with pre-ES1/ES1 samples.

PCH_TPM_SO[42]

PCH_TPM_SI[42]
PCH_TPM_CLK[42]

10K_0804_8P4R_5%

+3VS

1 2

RH548 10K_0402_5%@

1 2

RH549 10K_0402_5%@

1 2

RH550 10K_0402_5%@

1 2

RH551 10K_0402_5%

+3VS

RP22

4 5
3 6
2 7
1 8

10K_0804_8P4R_5%

+3VS

RP23

4 5
3 6
2 7
1 8

10K_0804_8P4R_5%

+3V_ROM

RH74 3.3K_0402_5%@

RH75 1K_0402_5%

RH78 1K_0402_5%

RH455 1K_0402_5%@

PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
PCH_SPI_WP#

PCH_SPI_HOLD#

PCH_TPM_SO

PCH_TPM_SI

PCH_TPM_CLK

@

@

1 2
1 2
1 2

1 2

WLAN_CLK_REQ#
CR_CLK_REQ#
TBT_CLK_REQ#
SSD_CLK_REQ#

SRCCLKREQ15#
SRCCLKREQ9#
SRCCLKREQ8#
SRCCLKREQ10#

SRCCLKREQ12#
SRCCLKREQ13#
SRCCLKREQ14#
SRCCLKREQ11#

RP4

1 8
2 7
3 6
4 5

33_0804_8P4R_5%

RH576 0_0402_5%@
RH577 0_0402_5%@
RH578 0_0402_5%@
RH579 0_0402_5%@

CLKREQ_PCIE#0
SRCCLKREQ1#
SRCCLKREQ2#
VGA_CLK_REQ#

PCH_SPI_CLK_R
PCH_SPI_SI_R
PCH_SPI_SO_R
PCH_SPI_WP#_R

1 2
1 2
1 2
1 2

PCH_SPI_CS#
PCH_SPI_WP#_R
PCH_SPI_HOLD#_R

PCH_SPI_HOLD#_R

PCH_SPI_SI_R [6]
PCH_SPI_WP#_R [6]

PCH_SPI_HOLD#_R
PCH_SPI_SO_R
PCH_SPI_SI_R
PCH_SPI_CLK_R

+1V_PCH

WLAN_CLK_REQ#[43]
CR_CLK_REQ#[51]
TBT_CLK_REQ#[37]
SSD_CLK_REQ#[44]
VGA_CLK_REQ#[23]

PCH_SPI_CS2#[42]

MEDIACARD_IRQ#[51]

TPM_PIRQ#[42]

X06.27

CPU_24MHZ_P[9]
CPU_24MHZ_N[9]

PCH_CPU_BCLK_P[9]
PCH_CPU_BCLK_N[9]

RH71 2.7K_0402_1%

1 2

CLKREQ_PCIE#0
SRCCLKREQ1#
SRCCLKREQ2#
WLAN_CLK_REQ#
CR_CLK_REQ#
TBT_CLK_REQ#
SSD_CLK_REQ#
VGA_CLK_REQ#
SRCCLKREQ8#
SRCCLKREQ9#
SRCCLKREQ10#
SRCCLKREQ11#
SRCCLKREQ12#
SRCCLKREQ13#
SRCCLKREQ14#
SRCCLKREQ15#

T18PAD~D @

FFS_INT2[45]

MEDIACARD_IRQ#

+3V_ROM +3V_PCH

RH585 0_0603_5%

SPI ROM FOR ME ( 16MByte )

SKY-S-PCH_BGA837

7 OF 12REV = 1.3

SKY-S-PCH_BGA837

1 OF 12 REV = 1.3

CLKOUT_ITPXDP

CLKOUT_ITPXDP_P

CLKOUT_CPUPCIBCLK

CLKOUT_CPUPCIBCLK_P

CLKOUT_PCIE_N0
CLKOUT_PCIE_P0

CLKOUT_PCIE_N1
CLKOUT_PCIE_P1

CLKOUT_PCIE_N2
CLKOUT_PCIE_P2

CLKOUT_PCIE_N3
CLKOUT_PCIE_P3

CLKOUT_PCIE_N4
CLKOUT_PCIE_P4

CLKOUT_PCIE_N5
CLKOUT_PCIE_P5

CLKOUT_PCIE_N6
CLKOUT_PCIE_P6

CLKOUT_PCIE_N7
CLKOUT_PCIE_P7

CLKOUT_PCIE_N8
CLKOUT_PCIE_P8

CLKOUT_PCIE_N9
CLKOUT_PCIE_P9

CLKOUT_PCIE_N10
CLKOUT_PCIE_P10

CLKOUT_PCIE_N11
CLKOUT_PCIE_P11

GPP_B13/PLTRST#

GPP_G16/GSXCLK

GPP_G12/GSXDOUT

GPP_G13/GSXSLOAD

GPP_G14/GSXDIN

GPP_G15/GSXSRESET#

GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3

GPP_H18/SML4ALERT#

GPP_H17/SML4DATA

GPP_H16/SML4CLK

GPP_H15/SML3ALERT#

GPP_H14/SML3DATA

GPP_H13/SML3CLK

GPP_H12/SML2ALERT#

GPP_H11/SML2DATA

GPP_H10/SML2CLK

INTRUDER#

TOUCHPAD_INTR#

L1
L2

J1
J2

N7
N8

L7
L5

D3
F2

E5
G4

D5
E6

D8
D7

R8
R7

U5
U7

W10
W11

N3
N2

P3
P2

R3
R4

BB27

PCH_PLTRST#

P43
R39
R36
R42
R41

AF41

SIO_EXT_SMI#

AE44

TOUCH_SCREEN_PD#

BC23

TOUCHPAD_INTR#

BD24

EC_SLP_S0IX#

BC36
BE34
BD39
BB36
BA35
BC35
BD35
AW35
BD34

BE11

INTRUDER#

DH1

RB751S40T1G_SOD523-2

PCH_XDP_CLK_N [6]
PCH_XDP_CLK_P [6]

PCH_CPU_PCIBCLK_N [9]
PCH_CPU_PCIBCLK_P [9]

CLK_PCIE_WLAN# [43]
CLK_PCIE_WLAN [43]

CLK_PCIE_CR# [51]
CLK_PCIE_CR [51]

CLK_PCIE_TBT# [37]
CLK_PCIE_TBT [37]

CLK_PCIE_SSD# [44]
CLK_PCIE_SSD [44]

CLK_PEG_VGA# [23]
CLK_PEG_VGA [23]

TBT_FORCE_PWR [37]
RTD3_CIO_PWR_EN [37]

SIO_EXT_SMI# [48]

TOUCH_SCREEN_PD# [35]

EC_SLP_S0IX# [48]

12

PTP_INT# [42,48]

PCH_PLTRST#_EC[23,37,42,43,44,48,51]

NGFF - WLAN

Card Reader

Thunderbolt

NGFF - SSD

GPU - N16P-GX

UH7

4

12

MC74VHC1G08DFT2G_SC70-5

RH77
100K_0402_5%

OUT

RH586 0_0402_5%@

X06.27

RH587 0_0402_5%@

5

VCC

IN1
IN2

GND

3

1 2

1 2

1
2

PCH_PLTRST#

RTC CRYSTAL

RH70 10M_0402_5%

32.768KHZ_X1A000141000300

Max Crystal ESR
= 50k Ohm.

1

CH45

8.2P_0402_50V8D

2

RH72 1M_0402_5%

24MHZ_12PF_X3G024000DC1H

1

CH47
15P_0402_50V8J

2

TOUCH_SCREEN_PD#
TOUCHPAD_INTR#
EC_SLP_S0IX#

SIO_EXT_SMI#
MEDIACARD_IRQ#

INTRUDER#

+3V_PCH

+3VS

1 2

YH1

1 2

1

CH46

8.2P_0402_50V8D

2

XTAL24_IN

1 2

YH2

123

RH510 10K_0402_5%
RH547 10K_0402_5%
RH535 10K_0402_5%@

RH110 10K_0402_5%
RH546 10K_0402_5%

RH531 330K_0402_5%

4

1 2
1 2
1 2

1 2
1 2

1 2

XTAL24_OUT

1

2

PCH_RTCX1

PCH_RTCX2

CH48
18P_0402_50V8J

+3VS

+3V_PCH

+RTCVCC

A A

5

PCH_SPI_CS#
PCH_SPI_SO
PCH_SPI_WP#

UH8

1

/CS

2

DO(IO1)

3

/WP(IO2)

4

GND

W25Q128FVSIQ_SO8

/HOLD(IO3)

DI(IO0)

8

VCC

7

PCH_SPI_HOLD#

6

PCH_SPI_CLK

CLK

5

PCH_SPI_SI

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (2/8) SMBUS, CLK, SPI, LPC

PCH (2/8) SMBUS, CLK, SPI, LPC

PCH (2/8) SMBUS, CLK, SPI, LPC
LA-C361P

LA-C361P

LA-C361P

1

17 71Thursday, August 06, 2015

17 71Thursday, August 06, 2015

17 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

RP15

HDA_BITCLK_AUDIO[52]
HDA_SYNC_AUDIO[52]

HDA_RST#_AUDIO[52]

D D

C C

B B

HDA_SDOUT_AUDIO[52]

+RTCVCC

1 2

RH83 20K_0402_5%

+RTCVCC

1 2

RH84 20K_0402_5%

+3V_PCH

1 2

RH458 1K_0402_5%

1 2

RH459 1K_0402_5%

1 2

RH460 1K_0402_5%

1 2

RH461 1K_0402_5%

1 2

RH501 499_0402_1%

1 2

RH502 499_0402_1%

+3VS

1 2

RH463 1K_0402_5%

1 2

RH462 1K_0402_5%

1 2

RH516 10K_0402_5%

1 2

RH91 100K_0402_5%

1 2

RH88 47K_0402_5%

1 2

RH401 100K_0402_5%

Service Mode Switch:
Add a switch to ME_FWP signal to unlock the ME region and
allow the entire region of the SPI flash to be updated using FPT.

HDA_SDOUT

ME_FWP_EC[48]

ME_FWP PCH has internal 20K PD.

A A

1 8
2 7
3 6
4 5

CH52

1U_0402_6.3V6K

CH53

1U_0402_6.3V6K

FLASH DESCRIPTOR SECURITY OVERRIDE

Disable ME Protect (ME can be updated) ----> Pin1 & Pin2 short
Enable ME Protect (ME cannot be updated)-->Pin3 & Pin2 short(Default position)

33_8P4R_5%

PCH_SRTCRST#

12

PCH_RTCRST#

12

12

CLRP1

SHORT PADS

SMBCLK
SMBDATA
SML1_SMBCLK
SML1_SMBDAT
SML0_SMBCLK
SML0_SMBDATA

PCH_RSMRST#_R

PCH_DPWROK_R

X06.34

HDA_BITCLK
HDA_SYNC
HDA_RST#
HDA_SDOUT

PCH_SMBCLK
PCH_SMBDATA
DGPU_PWROK

RESET_OUT#

12

RH4541K_0402_5%

12

RH4870_0402_5% @

ME_EN

+3V_PCH

12

AUD_AZA_CPU_SDO[7]

AUD_AZA_CPU_SDI_R[7]

AUD_AZA_CPU_SCLK[7]

RH536
1K_0402_5%

SW4

1
2
3

4

G

5

G

SSAL120100_3P

@

HDA_SDIN0_AUDIO[52]

PCH_RSMRST#[6,48]

PCH_DPWROK[48]

DMN65D8LDW-7_SOT363-6

SMBCLK

SMBDATA

X06.20

4

1 2

RH96 0_0402_5%@

Close to PCH

1 2

RH146 30_0402_5%

1 2

RH147 30_0402_5%

DGPU_PWROK[63]

PCH_RTCRST#[52]

1 2

RH133 0_0402_5%@

1 2

RH309 0_0402_5%@

SML1_SMBCLK[48]
SML1_SMBDAT[48]

QH4A

2

6 1

3 4

DMN65D8LDW-7_SOT363-6

X06.20

AUD_AZA_CPU_SDO_R
AUD_AZA_CPU_SDI_R
AUD_AZA_CPU_SCLK_R

SML1_SMBCLK
SML1_SMBDAT

+3VS

PCH to DDR, XDP, FFS

5

QH4B

HDA_BITCLK
HDA_RST#
HDA_SDIN0

HDA_SDOUT
HDA_SYNC

DGPU_PWROK

PCH_RTCRST#
PCH_SRTCRST#

PCH_PWROK
PCH_RSMRST#_R

PCH_DPWROK_R
SMBALERT#
SMBCLK
SMBDATA
SML0ALERT#
SML0_SMBCLK
SML0_SMBDATA
SML1ALERT#

PCH_SMBCLK

PCH_SMBDATA

BA9

HDA_BCLK

BD8

HDA_RST#

BE7

HDA_SDI0

BC8

HDA_SDI1

BB7

HDA_SDO

BD9

HDA_SYNC

BD1

RSVD_BD1

BE2

RSVD_BE2

AM1

DISPA_SDO

AN2

DISPA_SDI

AM2

DISPA_BCLK

AL42

T120PAD~D@

GPP_D8/SSP0_SCLK

AN42

T121PAD~D@

GPP_D7/SSP0_RXD

AM43

T122PAD~D@

GPP_D6/SSP0_TXD

AJ33

T123PAD~D@

GPP_D5/SSP0_SFRM

AH44

T124PAD~D@

GPP_D20/DMIC_DATA0

AJ35

GPP_D19/DMIC_CLK0

AJ38

GPP_D18/DMIC_DATA1

AJ42

T127PAD~D@

GPP_D17/DMIC_CLK1

BC10

RTCRST#

BB10

SRTCRST#

AW11

PCH_PWROK

BA11

RSMRST#

AV11

DSW_PWROK

BB41

GPP_C2/SMBALERT#

AW44

GPP_C0/SMBCLK

BB43

GPP_C1/SMBDATA

BA40

GPP_C5/SML0ALERT#

AY44

GPP_C3/SML0CLK

BB39

GPP_C4/SML0DATA

AT27

GPP_B23/SML1ALERT#/PCHHOT#

AW42

GPP_C6/SML1CLK

AW45

GPP_C7/SML1DATA

@

UH2D

AUDIO

SKY-H-PCH_BGA837

PCH_SMBCLK [6,14,15,45]

PCH_SMBDATA [6,14,15,45]

3

SKY-S-PCH_BGA837

GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#

GPP_A13/SUSWARN#/SUSPWRDNACK

SMBUS

JTAG

4 OF 12REV = 1.3

GPP_A8/CLKRUN#
GPD11/LANPHYPC
GPD9/SLP_WLAN#

DRAM_RESET#

GPP_B2/VRALERT#

GPP_B1

SYS_PWROK

GPD6/SLP_A#

SLP_LAN#

GPP_B12/SLP_S0#

GPD4/SLP_S3#
GPD5/SLP_S4#

GPD10/SLP_S5#

GPD8/SUSCLK

GPD0/BATLOW#

GPP_A15/SUSACK#

GPD2/LAN_WAKE#
GPD1/ACPRESENT

SLP_SUS#

GPD3/PWRBTN#

SYS_RESET#

GPP_B14/SPKR

PROCPWRGD

ITP_PMODE

JTAG_TMS
JTAG_TDO

JTAG_TDI

JTAG_TCK

IMVP_VR_PG[64]
RUNPWROK[48]

MC74VHC1G08DFT2G_SC70-5

GPP_B0

GPP_B11

WAKE#

JTAGX

GPP_G17/ADR_COMPLETE

BB17
AW22

AR15
AV13
BC14

BD23
AL27
AR27
N44
AN24
AY1

BC13
BC15
AV15
BC26
AW15
BD15
BA13

AN15
BD13
BB19
BD19

BD11
BB15
BB13
AT13
AW1
BD26
AM3

AT2
AR3
AR2
AP1
AP2
AN3

CLKRUN#

RESET_OUT#
PCH_PCIE_WAKE#

PCH_BATLOW#
ME_SUS_PWR_ACK

AC_PRESENT

SYS_RESET#
SPKR

PCH_ITP_PMODE
PCH_JTAGX
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TCK

+3VS

5

1

VCC

IN1

2

IN2

GND

3

2

UH14

4

OUT

CLKRUN# [48]

SIO_SLP_WLAN# [48]

H_DRAMRST# [14]

RESET_OUT# [6,48]

PCH_PCIE_WAKE# [48]

SIO_SLP_A# [48,52]
SIO_SLP_S0# [34,42,52]

SIO_SLP_S3# [34,37,48,52]
SIO_SLP_S4# [34,48,52]
SIO_SLP_S5# [34,48,52]

ME_SUS_PWR_ACK [48]

SIO_SLP_SUS# [48]

SIO_PWRBTN# [6,48]

H_CPUPWRGD [9]

T20 PAD~D @

SUSCLK [43,44]

SUSACK# [48]

LAN_WAKE# [48]
AC_PRESENT [48]

SYS_RESET# [6,52]

SPKR [52]

PCH_ITP_PMODE [6]
PCH_JTAGX [6]
PCH_JTAG_TMS [6]
PCH_JTAG_TDO [6]
PCH_JTAG_TDI [6]
PCH_JTAG_TCK [6]

PCH_PWROK

12

RH529
100K_0402_5%

1

PCH_PCIE_WAKE#
PCH_BATLOW#
AC_PRESENT
LAN_WAKE#

ME_SUS_PWR_ACK
SYS_RESET#

CLKRUN#

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

1 2

RH453 1K_0402_5%

1 2

RH515 8.2K_0402_5%

1 2

RH533 8.2K_0402_5%

1 2

RH545 10K_0402_5%

1 2

RH506 1M_0402_5%@

1 2

RH571 8.2K_0402_5%@

1 2

RH85 8.2K_0402_5%

1 2

RH82 4.7K_0402_5%@

Top Swap Override (internal PD)

HIGH
LOW(DEFAULT)

1 2

RH505 4.7K_0402_5%TPM@

TLS CONFIDENTIALITY

HIGH
LOW(DEFAULT)

1 2

RH503 4.7K_0402_5%@

EC interface

HIGH
LOW(DEFAULT)

RH504 150K_0402_5%

PCHHOT#

HIGH
LOW(DEFAULT)

1 2

ENABLE
DISABLE

vPRO
non-vPRO

ESPI
LPC

Enable
Disable

Reserve for EMI

1 2

CH50 10P_0402_25V8J

EMC@

1 2

CH51 10P_0402_25V8J@

Reserve for RF please close to UH1

+3V_PCH_DSW

+3V_PCH

+3VS

SPKRLAN_WAKE#

SMBALERT#

SML0ALERT#

SML1ALERT#

HDA_BITCLK

HDA_SDOUT

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (3/8) DMI,FDI,PM,GFX,DP

PCH (3/8) DMI,FDI,PM,GFX,DP

PCH (3/8) DMI,FDI,PM,GFX,DP
LA-C361P

LA-C361P

LA-C361P

1

18 71Thursday, August 06, 2015

18 71Thursday, August 06, 2015

18 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

4

3

2

1

UH2B

DMI_CTX_PRX_N0[7]
DMI_CTX_PRX_P0[7]

D D

NGFF

CARD_READER

C C

DMI_CRX_PTX_N0[7]
DMI_CRX_PTX_P0[7]

DMI_CTX_PRX_N1[7]

DMI_CTX_PRX_P1[7]
DMI_CRX_PTX_N1[7]
DMI_CRX_PTX_P1[7]

DMI_CTX_PRX_N2[7]

DMI_CTX_PRX_P2[7]
DMI_CRX_PTX_N2[7]
DMI_CRX_PTX_P2[7]

DMI_CTX_PRX_N3[7]

DMI_CTX_PRX_P3[7]
DMI_CRX_PTX_N3[7]
DMI_CRX_PTX_P3[7]

PCIE_PRX_WLANTX_N1[43]

PCIE_PRX_WLANTX_P1[43]
PCIE_PTX_WLANRX_N1[43]
PCIE_PTX_WLANRX_P1[43]
PCIE_PTX_CARDRX_N2[51]
PCIE_PTX_CARDRX_P2[51]

PCIE_PRX_CARDTX_N2[51]

PCIE_PRX_CARDTX_P2[51]

1 2

RH108 100_0402_1%

L27

DMI_RXN0

N27

DMI_RXP0

C27

DMI_TXN0

B27

DMI_TXP0

E24

DMI_RXN1

G24

DMI_RXP1

B28

DMI_TXN1

A28

DMI_TXP1

G27

DMI_RXN2

E26

DMI_RXP2

B29

DMI_TXN2

C29

DMI_TXP2

L29

DMI_RXN3

K29

DMI_RXP3

B30

DMI_TXN3

A30

DMI_TXP3

B18

PCIE_RCOMPN

C17

PCIE_RCOMPP

H15

PCIE1_RXN/USB3_7_RXN

G15

PCIE1_RXP/USB3_7_RXP

A16

PCIE1_TXN/USB3_7_TXN

B16

PCIE1_TXP/USB3_7_TXP

B19

PCIE2_TXN/USB3_8_TXN

C19

PCIE2_TXP/USB3_8_TXP

E17

PCIE2_RXN/USB3_8_RXN

G17

PCIE2_RXP/USB3_8_RXP

L17

PCIE3_RXN/USB3_9_RXN

K17

PCIE3_RXP/USB3_9_RXP

B20

PCIE3_TXN/USB3_9_TXN

C20

PCIE3_TXP/USB3_9_TXP

E20

PCIE4_RXN/USB3_10_RXN

G19

PCIE4_RXP/USB3_10_RXP

B21

PCIE4_TXN/USB3_10_TXN

A21

PCIE4_TXP/USB3_10_TXP

K19

PCIE5_RXN

L19

PCIE5_RXP

D22

PCIE5_TXN

C22

PCIE5_TXP

G22

PCIE6_RXN

E22

PCIE6_RXP

B22

PCIE6_TXN

A23

PCIE6_TXP

L22

PCIE7_RXN

K22

PCIE7_RXP

C23

PCIE7_TXN

B23

PCIE7_TXP

K24

PCIE8_RXN

L24

PCIE8_RXP

C24

PCIE8_TXN

B24

PCIE8_TXP

SKY-H-PCH_BGA837

@

SKY-S-PCH_BGA837

DMI

PCIe/USB 3

2 OF 12REV = 1.3

USB 2.0

GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#

GPP_F15/USB2_OCB_4
GPP_F16/USB2_OCB_5
GPP_F17/USB2_OCB_6
GPP_F18/USB2_OCB_7

USB2_COMP

USB2_VBUSSENSE

USB2N_1

USB2P_1

USB2N_2

USB2P_2

USB2N_3

USB2P_3

USB2N_4

USB2P_4

USB2N_5

USB2P_5

USB2N_6

USB2P_6

USB2N_7

USB2P_7

USB2N_8

USB2P_8

USB2N_9

USB2P_9
USB2N_10
USB2P_10
USB2N_11
USB2P_11
USB2N_12
USB2P_12
USB2N_13
USB2P_13
USB2N_14
USB2P_14

RSVD_AB13

USB2_ID

GPD7/RSVD

AF5
AG7
AD5
AD7
AG8
AG10
AE1
AE2
AC2
AC3
AF2
AF3
AB3
AB2
AL8
AL7
AA1
AA2
AJ8
AJ7
W2
W3
AD3
AD2
V2
V1
AJ11
AJ13

AD43
AD42
AD39
AC44
Y43
Y41
W44
W43

AG3
AD10
AB13
AG2

BD14

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

1 2

RH109 113_0402_1%

1 2

RH580 0_0402_5%@

1 2

RH581 0_0402_5%@

USB20_N1 [46]
USB20_P1 [46]
USB20_N2 [46]
USB20_P2 [46]

USB20_N4 [43]
USB20_P4 [43]

USB20_N9 [35]
USB20_P9 [35]

USB20_N12 [35]
USB20_P12 [35]

USB_OC0# [46]
USB_OC1# [46]

X06.27

3.3V_CAM_EN# [35]

USB Conn 1 (Right side)
USB Conn 2 (Left side)

Mini Card(WLAN)

Touch Screen

Camera

USB_OC3#

RH555 10K_0402_5%

USB_OC2#

RH554 10K_0402_5%

USB_OC1#

RH553 10K_0402_5%

USB_OC0#

RH552 10K_0402_5%

USB_OC5#
USB_OC4#
USB_OC6#
USB_OC7#

1 2
1 2
1 2
1 2

RP8

4 5
3 6
2 7
1 8

10K_0804_8P4R_5%

+3V_PCH

+3V_PCH

UH2F

4

C11

USB3_1_TXN

B11

USB3_1_TXP

B7

USB3_1_RXN

A7

USB3_1_RXP

B12

USB3_2_TXN/SSIC_1_TXN

A12

USB3_2_TXP/SSIC_1_TXP

C8

USB3_2_RXN/SSIC_1_RXN

B8

USB3_2_RXP/SSIC_1_RXP

B15

USB3_6_TXN

C15

USB3_6_TXP

K15

USB3_6_RXN

K13

USB3_6_RXP

B14

USB3_5_TXN

C14

USB3_5_TXP

G13

USB3_5_RXN

H13

USB3_5_RXP

D13

USB3_3_TXP/SSIC_2_TXP

C13

USB3_3_TXN/SSIC_2_TXN

A9

USB3_3_RXP/SSIC_2_RXP

B10

USB3_3_RXN/SSIC_2_RXN

B13

USB3_4_TXP

A14

USB3_4_TXN

G11

USB3_4_RXP

E11

USB3_4_RXN

SKY-H-PCH_BGA837

@

USB3TN1[47]

B B

USB Conn 1 (Right Side)

USB Conn 2 (Left Side)

A A

5

USB3TP1[47]
USB3RN1[47]
USB3RP1[47]

USB3TN2[47]
USB3TP2[47]
USB3RN2[47]
USB3RP2[47]

SKY-S-PCH_BGA837

LPC/eSPI

USB

GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3

GPP_A5/LFRAME#/ESPI_CS#

GPP_A7/PIRQA#/ESPI_ALERT0#

GPP_A0/RCIN#/ESPI_ALERT1#

GPP_A14/SUS_STAT#/ESPI_RESET#

GPP_A9/CLKOUT_LPC0/ESPI_CLK

GPP_A10/CLKOUT_LPC1

GPP_E6/DEVSLP2
GPP_E5/DEVSLP1
GPP_E4/DEVSLP0

6 OF 12REV = 1.3

GPP_F9/DEVSLP7
GPP_F8/DEVSLP6
GPP_F7/DEVSLP5
GPP_F6/DEVSLP4
GPP_F5/DEVSLP3

SATA

GPP_A6/SERIRQ

GPP_G19/SMI#
GPP_G18/NMI#

AT22
AV22
AT19
BD16

BE16
BA17
AW17
AT17
BC18

BC17
AV19

M45
N43

AE45
AG43
AG42
AB39
AB36
AB43
AB42
AB41

IRQ_SERIRQ

SIO_RCIN#

LPC_AD0 [48]
LPC_AD1 [48]
LPC_AD2 [48]
LPC_AD3 [48]

LPC_FRAME# [48]
IRQ_SERIRQ [48]
FFS_INT1 [45]
SIO_RCIN# [48]

1 2

RH168 22_0402_5%

1 2

RH428 22_0402_5%

mSATA_DEVSLP [44]

CLK_PCI_MEC [48]
PCI_CLK_LPC1 [48]

PCI_CLK_LPC1
CLK_PCI_MEC

CH198

@

15P_0402_50V8J

1

2

1

CH199
15P_0402_50V8J

2

@

RF Reserved.

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

IRQ_SERIRQ
SIO_RCIN#

1 2

RH111 10K_0402_5%

1 2

RH518 10K_0402_5%

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (4/8) PCI, USB

PCH (4/8) PCI, USB

PCH (4/8) PCI, USB
LA-C361P

LA-C361P

LA-C361P

+3VS

19 71Thursday, August 06, 2015

19 71Thursday, August 06, 2015

1

19 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

4

3

2

1

UH2K

BBS_BIT0
SIO_EXT_SCI#

NGFF_PWREN
NRB_BIT

3.3V_mSATA_EN

BID_DIS
HOST_SD_WP#

BID_BC

TBT_PWR_EN

SIO_EXT_WAKE#
UART2_TXD
UART2_RXD

I2C1_SCK_TP
I2C1_SDA_TP
I2C0_SCK
I2C0_SDA

1 2

RH521 0_0402_5%@

1 2

RH522 0_0402_5%@

3.3V_TS_EN[33]
SIO_EXT_SCI#[48]
NGFF_PWREN[33]

GC6_FB_EN[23]
GPU_EVENT#[23]

UARTT0_TX[48]
BID_DIS[48]
HOST_SD_WP#[51]

SIO_EXT_WAKE#[48]

UART2_TXD[52]
UART2_RXD[52]

EDP_PANEL_DAT_PCH[35]

EDP_PANEL_CLK_PCH[35]

+3VS

1 2

D D

C C

RH424 5.1K_0402_1%@

1 2

RH425 5.1K_0402_1%@

1 2

RH383 10K_0402_5%

1 2

RH561 49.9K_0402_1%

1 2

RH562 49.9K_0402_1%

1 2

RH563 10K_0402_5%

1 2

RH520 100K_0402_5%

+3V_PCH

1 2

RH119 4.7K_0402_5%

1 2

RH120 4.7K_0402_5%

1 2

RH523 10K_0402_5%

1 2

RH556 10K_0402_5%

UMA@

DIS@

1 2

RH423 100K_0402_5%@

3.3V_mSATA_EN

+3V_PCH +3V_PCH

12

RH564
100K_0402_5%

BID_DIS BID_BC

12

RH565
100K_0402_5%

I2C0_SCK
I2C0_SDA
SIO_EXT_SCI#
UART2_TXD
UART2_RXD

HOST_SD_WP#

NGFF_PWREN

I2C1_SCK_TP
I2C1_SDA_TP

SIO_EXT_WAKE#

TBT_PWR_EN

12

RH566
100K_0402_5%

12

RH567
100K_0402_5%

BC@

CSMB@

I2C1_SCK_TP[42]

I2C1_SDA_TP[42]

I2C0_SCK_DSP[48,52]

I2C0_SDA_DSP[48,52]

AT29

GPP_B22/GSPI1_MOSI

AR29

GPP_B21/GSPI1_MISO

AV29

GPP_B20/GSPI1_CLK

BC27

GPP_B19/GSPI1_CS#

BD28

GPP_B18/GSPI0_MOSI

BD27

GPP_B17/GSPI0_MISO

AW27

GPP_B16/GSPI0_CLK

AR24

GPP_B15/GSPI0_CS#

AV44

GPP_C9/UART0_TXD

BA41

GPP_C8/UART0_RXD

AU44

GPP_C11/UART0_CTS#

AV43

GPP_C10/UART0_RTS#

AU41

GPP_C15/UART1_CTS#/ISH_UART1_CTS#

AT44

GPP_C14/UART1_RTS#/ISH_UART1_RTS#

AT43

GPP_C13/UART1_TXD/ISH_UART1_TXD

AU43

GPP_C12/UART1_RXD/ISH_UART1_RXD

AN43

GPP_C23/UART2_CTS#

AN44

GPP_C22/UART2_RTS#

AR39

GPP_C21/UART2_TXD

AR45

GPP_C20/UART2_RXD

AR41

GPP_C19/I2C1_SCL

AR44

GPP_C18/I2C1_SDA

AR38

GPP_C17/I2C0_SCL

AT42

GPP_C16/I2C0_SDA

AM44

GPP_D4/ISH_I2C2_SDA

AJ44

GPP_D23/ISH_I2C2_SCL

SKY-H-PCH_BGA837

@

SKY-S-PCH_BGA837

11 OF 12REV = 1.3

GPP_D9
GPP_D10
GPP_D11

GPP_D16/ISH_UART0_CTS#
GPP_D15/ISH_UART0_RTS#

GPP_D12

GPP_D14/ISH_UART0_TXD
GPP_D13/ISH_UART0_RXD

GPP_H20/ISH_I2C0_SCL
GPP_H19/ISH_I2C0_SDA

GPP_H22/ISH_I2C1_SCL
GPP_H21/ISH_I2C1_SDA

GPP_A23/ISH_GP5
GPP_A22/ISH_GP4
GPP_A21/ISH_GP3
GPP_A20/ISH_GP2
GPP_A19/ISH_GP1
GPP_A18/ISH_GP0
GPP_A17/ISH_GP7

AL44
AL36
AL35
AJ39

AJ43
AL43
AK44
AK45

BC38
BB38

BD38
BE39

BC22
BD18
BE21
BD22
BD21
BB22
BC19

DGPU_PWR_EN

AUD_PWR_EN
KB_DET#
SPK_DET#
CLKDET#
USB_PWR_EN

DGPU_HOLD_RST# [23]
DGPU_PWR_EN [32]

AUD_PWR_EN [52,54]

KB_DET# [52]
SPK_DET# [48,52]

USB_PWR_EN [46]

SPK_DET#
AUD_PWR_EN
DGPU_PWR_EN

AUD_PWR_EN
USB_PWR_EN

KB_DET#
CLKDET#

+3V_PCH

+3V_PCH

RH572 100K_0402_5%
RH569 100K_0402_5%
RH537 10K_0402_5%@
RH538 10K_0402_5%
RH568 100K_0402_5%@
RH544 10K_0402_5%

RH557 10K_0402_5%
RH558 10K_0402_5%@

1 2

RH130 4.7K_0402_5%@

Boot BIOS Strap Bit (internal PD)

HIGH
LOW(DEFAULT)

1 2

RH524 4.7K_0402_5%@

NO REBOOT mode (internal PD)

HIGH
LOW(DEFAULT)

1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2

LPC
SPI

ENABLE
DISABLE

+3VS

+3V_PCH

BBS_BIT0

NRB_BIT

SYSTEM ID 1 (UMA/DIS)

HIGH = UMA
LOW = DIS

B B

A A

5

SYSTEM ID 2 (BC/CSMB)

HIGH = BC
LOW = CSMB

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (5/8) GPIO, CPU, MISC

PCH (5/8) GPIO, CPU, MISC

PCH (5/8) GPIO, CPU, MISC
LA-C361P

LA-C361P

LA-C361P

1

20 71Thursday, August 06, 2015

20 71Thursday, August 06, 2015

20 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

@

PJP1302

1 2

PAD-OPEN 43x39

1 2

RZ70 0_0805_5%

@

1 2

@

D D

C C

RH137 0_0603_5%

RH196 0_0402_5%

+1V_MPHY

RH582 0_0603_5%

+1VALW

RH583 0_0603_5%

+1VALW

LH2 BLM15PX221SN1D_2P

1 2

@

X06.27

1 2

@

1 2

@

1 2

1 2

LH1 BLM15PX221SN1D_2P

X06.27

1 2

@

RH584 0_0603_5%

+1V_PCH_CLK5

+1V_MPHY_MPHYPLL +1V_PCH_USBPLL

X06.27

+1V_PCH+1VALW

+1V_MPHY

+3V_PCH_DSW+3VALW

+1V_VCCDSW+1V_PCH

+1V_MPHY_MPHYPLL

+1V_PCH_USBPLL

+1V_PCH_AZPLL

X06.05

+3V_PCH_AZIO+3V_PCH

X06.06

+1V_PCH_CLK5+1V_PCH

+3V_PCH_DSW

+1V_MPHY

Close to K2,K3 Close to A43,B43 Close to U21,U23

1U_0402_6.3V6K

22U_0603_6.3V6M

22U_0603_6.3V6M

1

1

1

CH178

CH177

@

2

2

2

B B

22U_0603_6.3V6M

CH179

1

@

2

1U_0402_6.3V6K

22U_0603_6.3V6M

CH180

1

1

CH181

CH182

@

2

2

1U_0402_6.3V6K

22U_0603_6.3V6M

CH183

1

1

CH184

2

2

4

X06.06

+3V_PCH_AZIO

X06.06

Close to AJ5,AL5

22U_0603_6.3V6M

1

CH201

@

@

2

X06.05

+1V_PCH_AZPLL

+1VALW

X06.06

+1V_PCH_USBPLL

1 2

PAD-OPEN 43x39

+1V_MPHY

+1V_PCH

@

PJP1303

+1V_PCH_PRIM

+1V_PCH

+1V_PCH_CLK5

+1V_MPHY_MPHYPLL

+1V_VCCDSW

+1V_MPHY

3

UH2H

AA23

VCCPRIM_1P0_AA23

AA26

VCCPRIM_1P0_AA26

AA28

VCCPRIM_1P0_AA28

AC23

VCCPRIM_1P0_AC23

AC26

VCCPRIM_1P0_AC26

AC28

VCCPRIM_1P0_AC28

AE23

VCCPRIM_1P0_AE23

AE26

VCCPRIM_1P0_AE26

Y23

VCCPRIM_1P0_Y23

Y25

VCCPRIM_1P0_Y25

BA29

DCPDSW_1P0

N17

VCCCLK1

R19

VCCCLK3

U20

VCCCLK4

V17

VCCCLK2

R17

VCCCLK6

K2

VCCCLK5_K2

K3

VCCCLK5_K3

U21

VCCMPHY_1P0_U21

U23

VCCMPHY_1P0_U23

U25

VCCMPHY_1P0_U25

U26

VCCMPHY_1P0_U26

V26

VCCMPHY_1P0_V26

A43

VCCMPHYPLL_1P0_A43

B43

VCCMPHYPLL_1P0_B43

C44

VCCPCIE3PLL_1P0_C44

C45

VCCPCIE3PLL_1P0_C45

V28

VCCAPLLEBB_1P0

AC17

VCCPRIM_1P0_AC17

AJ5

VCCUSB2PLL_1P0_AJ5

AL5

VCCUSB2PLL_1P0_AL5

AN19

VCCHDAPLL_1P0

BA15

VCCHDA

W15

VCCDSW_3P3_W15

SKY-H-PCH_BGA837

@

SKY-S-PCH_BGA837

CORE

MPHY

USB

REV = 1.3

VCCGPIO

8 OF 12

VCCPRIM_1P0_AL22
VCCDSW_3P3_BA24

VCCPGPPBH_BC42
VCCPGPPBH_BD40

VCCPGPPEF_AJ41
VCCPGPPEF_AL41

VCCPRIM_3P3_AN5

VCCPRIM_1P0_AD15

VCCRTCPRIM_3P3

VCCPRIM_1P0_AJ20
VCCPRIM_1P0_AJ21
VCCPRIM_1P0_AJ23
VCCPRIM_1P0_AJ25

VCCPGPPCD_BC44

VCCPGPPCD_BA45

VCCPGPPCD_BC45

VCCPGPPCD_BB45
VCCPRIM_3P3_BD3

VCCPRIM_3P3_BE3
VCCPRIM_3P3_BE4

VCCPGPPA

VCCPGPPG

VCCATS

VCCRTC
DCPRTC

VCCSPI_BE41
VCCSPI_BE43
VCCSPI_BE42

2

AL22
BA24

BA31
BC42

BD40
AJ41
AL41
AD41
AN5

AD15
AD13
BA20
BA22
BA26

AJ20
AJ21
AJ23
AJ25

BE41
BE43
BE42

BC44
BA45
BC45
BB45

BD3
BE3
BE4

+1V_PCH

+1V_PCH

+RTCVCC
+DCPRTC

+1V_PCH_PRIM

+3V_PCH_SPI

+3V_PCH_DSW

+3VS

X06.27

@

+3V_PCH

12

RH1360_0603_5%

1

+3V_PCH

+3V_PCH

+3V_PCH

X06.06

+1V_PCH_AZPLL

Close to AN19

0.1U_0402_10V7K
CH203

1

2

+1V_VCCDSW

Close to BA29

1U_0402_6.3V6K

CH176

1

2

+3V_PCH_AZIO

0.1U_0402_10V7K

Close to BA15

1

2

+DCPRTC

0.1U_0402_10V7K

CH200

Close to BA26

CH70

1

2

+3VS

Close to AD13

1U_0402_6.3V6K

CH188

1

2

X06.05

22U_0603_6.3V6M

1

CH202

2

0.1U_0402_10V7K

1

@

2

+3V_PCH_DSW

Close to W15

1U_0402_6.3V6K

CH190

1

@

2

CH82

+3V_PCH+3V_PCH +3V_PCH+3V_PCH

Close to AN5Close to AD41 Close to AJ41,AL41Close to BC42,BD40

0.1U_0402_10V7K

1

CH189

@

2

0.1U_0402_10V7K

1

CH192

@

2

0.1U_0402_10V7K

1

CH191

@

2

+RTCVCC

+3V_PCH

Close to BA22 Close to BA20

1U_0402_6.3V6K

0.1U_0402_10V7K

CH80

1

1

CH173

2

2

A A

5

1U_0402_6.3V6K

0.1U_0402_10V7K

CH187

1

1

CH186

2

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (6/8) PWR

PCH (6/8) PWR

PCH (6/8) PWR
LA-C361P

LA-C361P

LA-C361P

1

21 71Thursday, August 06, 2015

21 71Thursday, August 06, 2015

21 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

UH2I

SKY-S-PCH_BGA837

AC18

VSS

AN4

VSS

AN10

VSS

BE14

VSS

BE18

VSS

BE23

D D

C C

B B

BE28
BE32
BE37
BE40

AA17
AA18
AA20
AA21
AA25
AA29

AA42
AB10

BE9
C10

C28
C37

K10
K27
K33
K36

K42
K43

M35
M42
N10
N15
N19
N22
N24
N35
N36

N41
P17

P19
P22
P45
R10
R14
R22
R29
R33
R38

A18
A25
A32
A37

AA4

C2

J7

K4

L12
L13
L15

L4

L41

L8

N4
N5

R5
T1
T2

T4
Y18
Y20
Y21
Y26
Y28
Y29

@

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SKY-H-PCH_BGA837

AR5

VSS

AR7

VSS

U15

VSS

AL4

VSS

AE29

VSS

AE4

VSS

AE42

VSS

AF18

VSS

AF20

VSS

AF21

VSS

AF23

VSS

AF25

VSS

AF26

VSS

AF28

VSS

AF29

VSS

AG11

VSS

AG13

VSS

AG31

VSS

AG32

VSS

AG33

VSS

AG38

VSS

AG4

VSS

AH1

VSS

AH17

VSS

AH18

VSS

AH20

VSS

AH21

VSS

AH23

VSS

AH25

VSS

AH26

VSS

AH28

VSS

AH29

VSS

AH45

VSS

AJ10

VSS

AJ14

VSS

AJ15

VSS

AJ17

VSS

AJ18

VSS

AJ26

VSS

AJ28

VSS

AJ29

VSS

AJ31

VSS

AJ32

VSS

AJ36

VSS

AK4

VSS

AK42

VSS

AU7

VSS

AV17

VSS

AV24

VSS

AV27

VSS

AV31

VSS

AV33

VSS

AV6

VSS

AW13

VSS

AW19

VSS

AW29

VSS

AW37

VSS

AW9

VSS

AY38

VSS

AY45

VSS

B25

VSS

B3

VSS

B37

VSS

B40

VSS

B6

VSS

BA1

VSS

BB11

VSS

BB16

VSS

BB21

VSS

BB25

VSS

BB30

VSS

BB34

VSS

BC2

VSS

BD43

VSS

9 OF 12REV = 1.3

W14
W31
W32
W33
W38

4

C42

VSS

D10

VSS

D12

VSS

D15

VSS

D16

VSS

D17

VSS

D19

VSS

D21

VSS

D24

VSS

D25

VSS

D27

VSS

D29

VSS

D30

VSS

D31

VSS

D33

VSS

D35

VSS

D36

VSS

E13

VSS

E15

VSS

E31

VSS

E33

VSS

F44

VSS

F8

VSS

G42

VSS

G9

VSS

H17

VSS

H19

VSS

H22

VSS

H24

VSS

H27

VSS

H29

VSS

H3

VSS

H35

VSS

J10

VSS

J11

VSS

J3

VSS

J39

VSS

J5

VSS

T42

VSS

U10

VSS

U11

VSS

U14

VSS

U17

VSS

U18

VSS

U28

VSS

U29

VSS

U31

VSS

U32

VSS

U33

VSS

U38

VSS

U4

VSS

U8

VSS

V18

VSS

V20

VSS

V21

VSS

V23

VSS

V25

VSS

V29

VSS

V3

VSS

V45

VSS
VSS
VSS
VSS
VSS
VSS

W4

VSS

W8

VSS

Y17

VSS

@

SKY-S-PCH_BGA837

UH2L

SKY-H-PCH_BGA837

12 OF 12 REV = 1.3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AB11
AB7
AB14
AB31
AB32
AB38
AB4
AB5
AC1
AC20
AC21
AC25
AC29
AC45
AB8
AD11
AD14
AB15
AD32
AD33
AD36
AD4
AD8
AE18
AE20
AE21
AE25
AE28
AL10
AL11
AL13
AL17
AL19
AL24
AL29
AL32
AL33
AL38
AM15
AM17
AM19
AM22
AM24
AM27
AM29
AM45
AN11
AN22
AN27
AN31
AN39
AN7
AN8
AP11
AP4
AR33
AR34
AR42
AR9
AT10
AT15
AT36
AT9
AU1
AU35
AU36
AU39
AU45
C4

3

SKY-S-PCH_BGA837

PCH_TRIGOUT

BD2
BD45
BD44
BE44

BB1

BC1

D45
A42
B45
B44

A4
A3
B2
A2
B1

A44

C1
D1

@

UH2J

VSS_BD2
VSS_BD45
VSS_BD44
VSS_BE44
VSS_D45
VSS_A42
VSS_B45
VSS_B44
VSS_A4
VSS_A3
VSS_B2
VSS_A2
VSS_B1
VSS_BB1
VSS_BC1
VSS_A44

RSVD_C1
RSVD_D1

SKY-H-PCH_BGA837

RSVD_AR22

RSVD_W13

RSVD_U13
RSVD_P31

RSVD_N31
RSVD_P27

RSVD_R27
RSVD_N29
RSVD_P29

RSVD_AN29

RSVD_R24
RSVD_P24

PREQ#

PRDY#

CPU_TRST#
PCH_TRIGIN

10 OF 12REV = 1.3

2

AR22
W13
U13

P31
N31

P27
R27
N29
P29
AN29
R24
P24

AT3
AT4
AY5
AL2
AK1

XDP_PREQ# [6,9]
XDP_PRDY# [6,9]
CPU_XDP_TRST# [6,9]
PCH_TRIGGER [9]
CPU_TRIGGER [9]

1

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (8/8) VSS

PCH (8/8) VSS

PCH (8/8) VSS
LA-C361P

LA-C361P

LA-C361P

1

0.1(X00)

0.1(X00)

22 71Thursday, August 06, 2015

22 71Thursday, August 06, 2015

22 71Thursday, August 06, 2015

0.1(X00)

5

PEG_GTX_HRX_P0
PEG_GTX_HRX_N0

PEG_GTX_HRX_P1
PEG_GTX_HRX_N1

PEG_GTX_HRX_P2
PEG_GTX_HRX_N2

PEG_GTX_HRX_P3
PEG_GTX_HRX_N3

PEG_GTX_HRX_P4
PEG_GTX_HRX_N4

PEG_GTX_HRX_P5
PEG_GTX_HRX_N5

PEG_GTX_HRX_P6
PEG_GTX_HRX_N6

PEG_GTX_HRX_P7
PEG_GTX_HRX_N7

PEG_GTX_HRX_P8
PEG_GTX_HRX_N8

PEG_GTX_HRX_P9
PEG_GTX_HRX_N9

PEG_GTX_HRX_P10
PEG_GTX_HRX_N10

PEG_GTX_HRX_P11
PEG_GTX_HRX_N11

PEG_GTX_HRX_P12
PEG_GTX_HRX_N12

PEG_GTX_HRX_P13
PEG_GTX_HRX_N13

PEG_GTX_HRX_P14
PEG_GTX_HRX_N14

PEG_GTX_HRX_P15
PEG_GTX_HRX_N15

S

1
2

12

RV45
100K_0402_5%

DIS@

DV8

2

3

BAT54AW-7-F_SOT323-3

DIS@

PEG_HTX_C_GRX_P[0..15]
PEG_HTX_C_GRX_N[0..15]
PEG_GTX_C_HRX_P[0..15]
PEG_GTX_C_HRX_N[0..15]

1 2

RV286 200_0402_1%@

CLK_REQ#

+3.3V_GFX_AON

1

CV129

2

@

5

VCC

IN1

4

OUT

IN2

GND

UV14

MC74VHC1G08DFT2G_SC70-5

3

DIS@

+3.3V_GFX_AON

10K_0402_5%

12

RV29

DIS@

1

CLK_PEG_VGA[17]
CLK_PEG_VGA#[17]

0.1U_0402_10V7K

SYS_PEX_RST_MON#

@

PEG_HTX_C_GRX_P[0..15][7]
PEG_HTX_C_GRX_N[0..15][7]

PEG_GTX_C_HRX_P[0..15][7]
PEG_GTX_C_HRX_N[0..15][7]

PEG_GTX_C_HRX_P0

D D

PEG_GTX_C_HRX_N0
PEG_GTX_C_HRX_P1

PEG_GTX_C_HRX_N1
PEG_GTX_C_HRX_P2

PEG_GTX_C_HRX_N2
PEG_GTX_C_HRX_P3

PEG_GTX_C_HRX_N3
PEG_GTX_C_HRX_P4

PEG_GTX_C_HRX_N4
PEG_GTX_C_HRX_P5

PEG_GTX_C_HRX_N5
PEG_GTX_C_HRX_P6

PEG_GTX_C_HRX_N6
PEG_GTX_C_HRX_P7

PEG_GTX_C_HRX_N7
PEG_GTX_C_HRX_P8

PEG_GTX_C_HRX_N8
PEG_GTX_C_HRX_P9

PEG_GTX_C_HRX_N9
PEG_GTX_C_HRX_P10

PEG_GTX_C_HRX_N10
PEG_GTX_C_HRX_P11

PEG_GTX_C_HRX_N11
PEG_GTX_C_HRX_P12

PEG_GTX_C_HRX_N12

C C

PEG_GTX_C_HRX_P13
PEG_GTX_C_HRX_N13

PEG_GTX_C_HRX_P14
PEG_GTX_C_HRX_N14

PEG_GTX_C_HRX_P15
PEG_GTX_C_HRX_N15

ALL_GPWRGD[60]

VGA_CLK_REQ#[17]

B B

A A

12

CV531 0.22U_0201_6.3V6M DIS@

12

CV532 0.22U_0201_6.3V6M DIS@

12

CV533 0.22U_0201_6.3V6M DIS@

12

CV534 0.22U_0201_6.3V6M DIS@

12

CV535 0.22U_0201_6.3V6M DIS@

12

CV536 0.22U_0201_6.3V6M DIS@

12

CV537 0.22U_0201_6.3V6M DIS@

12

CV538 0.22U_0201_6.3V6M DIS@

12

CV539 0.22U_0201_6.3V6M DIS@

12

CV540 0.22U_0201_6.3V6M DIS@

12

CV541 0.22U_0201_6.3V6M DIS@

12

CV542 0.22U_0201_6.3V6M DIS@

12

CV543 0.22U_0201_6.3V6M DIS@

12

CV544 0.22U_0201_6.3V6M DIS@

12

CV545 0.22U_0201_6.3V6M DIS@

12

CV546 0.22U_0201_6.3V6M DIS@

12

CV547 0.22U_0201_6.3V6M DIS@

12

CV548 0.22U_0201_6.3V6M DIS@

12

CV550 0.22U_0201_6.3V6M DIS@

12

CV551 0.22U_0201_6.3V6M DIS@

12

CV552 0.22U_0201_6.3V6M DIS@

12

CV557 0.22U_0201_6.3V6M DIS@

12

CV558 0.22U_0201_6.3V6M DIS@

12

CV559 0.22U_0201_6.3V6M DIS@

12

CV560 0.22U_0201_6.3V6M DIS@

12

CV561 0.22U_0201_6.3V6M DIS@

12

CV562 0.22U_0201_6.3V6M DIS@

12

CV563 0.22U_0201_6.3V6M DIS@

12

CV564 0.22U_0201_6.3V6M DIS@

12

CV565 0.22U_0201_6.3V6M DIS@

12

CV566 0.22U_0201_6.3V6M DIS@

12

CV567 0.22U_0201_6.3V6M DIS@

2

G

1 3

D

L2N7002WT1G_SC-70-3
QV39

DIS@

DGPU_HOLD_RST#[20]

PCH_PLTRST#_EC[17,37,42,43,44,48,51]

SYS_PEX_RST_MON#

GPU_PEX_RST_HOLD#

5

0_0402_5%

12

PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_N0
PEG_HTX_C_GRX_P1
PEG_HTX_C_GRX_N1
PEG_HTX_C_GRX_P2
PEG_HTX_C_GRX_N2
PEG_HTX_C_GRX_P3
PEG_HTX_C_GRX_N3
PEG_HTX_C_GRX_P4
PEG_HTX_C_GRX_N4
PEG_HTX_C_GRX_P5
PEG_HTX_C_GRX_N5
PEG_HTX_C_GRX_P6
PEG_HTX_C_GRX_N6
PEG_HTX_C_GRX_P7
PEG_HTX_C_GRX_N7
PEG_HTX_C_GRX_P8
PEG_HTX_C_GRX_N8
PEG_HTX_C_GRX_P9
PEG_HTX_C_GRX_N9
PEG_HTX_C_GRX_P10
PEG_HTX_C_GRX_N10
PEG_HTX_C_GRX_P11
PEG_HTX_C_GRX_N11
PEG_HTX_C_GRX_P12
PEG_HTX_C_GRX_N12
PEG_HTX_C_GRX_P13
PEG_HTX_C_GRX_N13
PEG_HTX_C_GRX_P14
PEG_HTX_C_GRX_N14
PEG_HTX_C_GRX_P15
PEG_HTX_C_GRX_N15

PEG_GTX_HRX_P0
PEG_GTX_HRX_N0
PEG_GTX_HRX_P1
PEG_GTX_HRX_N1
PEG_GTX_HRX_P2
PEG_GTX_HRX_N2
PEG_GTX_HRX_P3
PEG_GTX_HRX_N3
PEG_GTX_HRX_P4
PEG_GTX_HRX_N4
PEG_GTX_HRX_P5
PEG_GTX_HRX_N5
PEG_GTX_HRX_P6
PEG_GTX_HRX_N6
PEG_GTX_HRX_P7
PEG_GTX_HRX_N7
PEG_GTX_HRX_P8
PEG_GTX_HRX_N8
PEG_GTX_HRX_P9
PEG_GTX_HRX_N9
PEG_GTX_HRX_P10
PEG_GTX_HRX_N10
PEG_GTX_HRX_P11
PEG_GTX_HRX_N11
PEG_GTX_HRX_P12
PEG_GTX_HRX_N12
PEG_GTX_HRX_P13
PEG_GTX_HRX_N13
PEG_GTX_HRX_P14
PEG_GTX_HRX_N14
PEG_GTX_HRX_P15
PEG_GTX_HRX_N15

CLK_REQ#

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#

DGPU_PEX_RST#

+3.3V_GFX_AON

12

RV50
10K_0402_5%@

12

RV187
10K_0402_5%

DIS@

RV208

DGPU_PEX_RST#

4

12

RV290

2.49K_0402_1%

DIS@

SYS_PEX_RST_MON# [24]

4

AN12

PEX_RX0

AM12

PEX_RX0_N

AN14

PEX_RX1

AM14

PEX_RX1_N

AP14

PEX_RX2

AP15

PEX_RX2_N

AN15

PEX_RX3

AM15

PEX_RX3_N

AN17

PEX_RX4

AM17

PEX_RX4_N

AP17

PEX_RX5

AP18

PEX_RX5_N

AN18

PEX_RX6

AM18

PEX_RX6_N

AN20

PEX_RX7

AM20

PEX_RX7_N

AP20

PEX_RX8

AP21

PEX_RX8_N

AN21

PEX_RX9

AM21

PEX_RX9_N

AN23

PEX_RX10

AM23

PEX_RX10_N

AP23

PEX_RX11

AP24

PEX_RX11_N

AN24

PEX_RX12

AM24

PEX_RX12_N

AN26

PEX_RX13

AM26

PEX_RX13_N

AP26

PEX_RX14

AP27

PEX_RX14_N

AN27

PEX_RX15

AM27

PEX_RX15_N

AK14

PEX_TX0

AJ14

PEX_TX0_N

AH14

PEX_TX1

AG14

PEX_TX1_N

AK15

PEX_TX2

AJ15

PEX_TX2_N

AL16

PEX_TX3

AK16

PEX_TX3_N

AK17

PEX_TX4

AJ17

PEX_TX4_N

AH17

PEX_TX5

AG17

PEX_TX5_N

AK18

PEX_TX6

AJ18

PEX_TX6_N

AL19

PEX_TX7

AK19

PEX_TX7_N

AK20

PEX_TX8

AJ20

PEX_TX8_N

AH20

PEX_TX9

AG20

PEX_TX9_N

AK21

PEX_TX10

AJ21

PEX_TX10_N

AL22

PEX_TX11

AK22

PEX_TX11_N

AK23

PEX_TX12

AJ23

PEX_TX12_N

AH23

PEX_TX13

AG23

PEX_TX13_N

AK24

PEX_TX14

AJ24

PEX_TX14_N

AL25

PEX_TX15

AK25

PEX_TX15_N

AL13

PEX_REFCLK

AK13

PEX_REFCLK_N

AK12

PEX_CLKREQ_N

AJ26

PEX_TSTCLK_OUT

AK26

PEX_TSTCLK_OUT_N

AJ12

PEX_RST_N

AP29

PEX_TERMP

UV1A

3

P6

4

1

YV1

VDD

VCOUNT

M3
L6
P5
P7
L7
M7
N8
M1
M2
L1
M5
N3
M4
N4
P2
R8
M6
R1
P3
P4
P1

AJ11

AK9
AL10
AL9

AM9
AN9

AG10
AP9
AP8

R4
R5

R7
R6

R2
R3

T4
T3

AD8
AE8
AD7
H3

H2
H1

J4

GC6_FB_EN

3V3_MAIN_EN
GC6_EVENT#_D

THERMATRIP_GPU#
THERMAL_ALERT#
FBVREF_ALTV
GPU_VID_0
GPU_HOT#_R
GPU_GPIO13

GC6_FB_EN [20]

3V3_MAIN_EN [32,62,63]

1 2

RV10 0_0402_5%@

FBVREF_ALTV [28,29,30,31]
GPU_VID_0 [63]

GPU_PSI [63]

X06.30

GPU_PEX_RST_HOLD#

THERMATRIP_GPU#

L2N7002WT1G_SC-70-3

1 2

RV479 10K_0402_5%@

I2CA_SCL
I2CA_SDA

I2CB_SCL
I2CB_SDA

I2CC_SCL
I2CC_SDA

EC_SMB_CK2_PX
EC_SMB_DA2_PX

+PLLVDD

+CLK_PLLVDD

CLK_27M_IN
CLK_27M_OUT

XTALSSIN
XTALOUTBUFF

DIS@

OUT

GND

3

1 2

RV299 2.2K_0402_5%DIS@

1 2

RV300 2.2K_0402_5%DIS@

Under GPU

1

CV773

0.1U_0402_10V7K

2

DIS@

1

Under GPU

3

CLK_27M_OUT

2

1

CV576
10P_0402_25V8J

2

DIS@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

2

DIS@

2014/08/08 2014/07/01

2014/08/08 2014/07/01

2014/08/08 2014/07/01

0.1U_0402_10V7K
CV570

1

2

DIS@

1

2

DIS@

0.1U_0402_10V7K
CV571

Compal Secret Data

Compal Secret Data

Compal Secret Data

Part 1 of 7

PCI EXPRESS

N16P-GX-A2@

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21

PEX_WAKE_N

DACA_RED

DACA_GREEN

DACA_BLUE

DACA_HSYNC
DACA_VSYNC

DACsI2C GPIO

DACA_VDD
DACA_VREF
DACA_RSET

I2CA_SCL
I2CA_SDA

I2CB_SCL
I2CB_SDA

I2CC_SCL
I2CC_SDA

I2CS_SCL
I2CS_SDA

PLLVDD

SP_PLLVDD

VID_PLLVDD

XTAL_IN

XTAL_OUT

CLK

XTAL_SSIN

XTAL_OUTBUFF

CLK_27M_IN

27MHZ_10PF_5YEA27000102IF50Q3

1

CV575
10P_0402_25V8J

2

DIS@

DGPU_PEX_RST#

G

2

S

QV88

DIS@

CV574
22U_0603_6.3V6M

Near GPU

10U_0603_6.3V6M

CV572

1

2

DIS@

Deciphered Date

Deciphered Date

Deciphered Date

2

13

D

LV14
BLM15PD300SN1D_2P

1 2

DIS@

LV2

47U_0805_6.3V6M

1

CV573

2

DIS@

1.8K_0402_5%

EC_SMB_CK2_PX

EC_SMB_DA2_PX

2

THERMATRIP3# [48]

300 ohm, 0.2 ESR

1 2

PBY160808T-301Y-N_2P

DIS@

Near GPU

+3.3V_GFX_AON

RV325

DIS@

12

+1.05VSDGPU

+1.05VSDGPU

12

RV326

1.8K_0402_5%

DIS@

1

+3.3V_GFX_AON

GPU_HOT#_R
GC6_EVENT#_D

FBVREF_ALTV

CLK_REQ#
GC6_FB_EN
XTALSSIN
XTALOUTBUFF

I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA

GPU_PEX_RST_HOLD#
THERMAL_ALERT#
3V3_MAIN_EN
THERMATRIP_GPU#

I2CC_SCL
I2CC_SDA

GC6_EVENT#_D

GPU_HOT#_R

1.05V_DGPU_PG[62]

GC6_FB_EN

+3.3V_GFX_RUN

DMN65D8LDW-7_SOT363-6

X06.10

2

61

QV21A

DIS@

Title

Title

Title

N15P (1/5)-PCIE / GPIO

N15P (1/5)-PCIE / GPIO

N15P (1/5)-PCIE / GPIO

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1 2

RV543 100K_0402_5%DIS@

1 2

RV542 10K_0402_5%DIS@

1 2

RV544 100K_0402_5%DIS@

+3.3V_GFX_AON

RPH32

4 5
3 6
2 7
1 8

10K_0804_8P4R_5%

DIS@

+3.3V_GFX_AON

@

RPH15

1 8
2 7
3 6
4 5

2.2K_8P4R_5%

RPH13

1 8
2 7
3 6
4 5

2.2K_8P4R_5%

DIS@

RPH34

4 5
3 6
2 7
1 8

10K_0804_8P4R_5%

DIS@
1 2

RV319 2.2K_0402_5%DIS@

1 2

RV331 2.2K_0402_5%DIS@

DV10

12

RB751S40T1G_SOD523-2

DIS@

DV11

12

RB751S40T1G_SOD523-2

DIS@

DV9

2

1

3

BAT54CW-7-F_SOT323-3~D

DIS@

5

34

QV21B
DMN65D8LDW-7_SOT363-6

DIS@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

100K_0402_5%

12

UPD_GPU_SMBCLK [39,48]

UPD_GPU_SMBDAT [39,48]

+3.3V_GFX_AON

GPU_EVENT# [20]

GPU_PWR_LEVEL [48]

FBVDD_EN [32,60]

DIS@

RV209

23 71Thursday, August 06, 2015

23 71Thursday, August 06, 2015

23 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

4

3

2

1

Straps

+3.3V_GFX_RUN

+3.3V_GFX_AON

UV1D

AM6

IFPA_TXC

AN6

IFPA_TXC_N

AP3

D D

C C

B B

IFPA_TXD0

AN3

IFPA_TXD0_N

AN5

IFPA_TXD1

AM5

IFPA_TXD1_N

AL6

IFPA_TXD2

AK6

IFPA_TXD2_N

AJ6

IFPA_TXD3

AH6

IFPA_TXD3_N

AJ9

IFPB_TXC

AH9

IFPB_TXC_N

AP6

IFPB_TXD4

AP5

IFPB_TXD4_N

AM7

IFPB_TXD5

AL7

IFPB_TXD5_N

AN8

IFPB_TXD6

AM8

IFPB_TXD6_N

AK8

IFPB_TXD7

AL8

IFPB_TXD7_N

AK1

IFPC_L0

AJ1

IFPC_L0_N

AJ3

IFPC_L1

AJ2

IFPC_L1_N

AH3

IFPC_L2

AH4

IFPC_L2_N

AG5

IFPC_L3

AG4

IFPC_L3_N

AM1

IFPD_L0

AM2

IFPD_L0_N

AM3

IFPD_L1

AM4

IFPD_L1_N

AL3

IFPD_L2

AL4

IFPD_L2_N

AK4

IFPD_L3

AK5

IFPD_L3_N

AD2

IFPE_L0

AD3

IFPE_L0_N

AD1

IFPE_L1

AC1

IFPE_L1_N

AC2

IFPE_L2

AC3

IFPE_L2_N

AC4

IFPE_L3

AC5

IFPE_L3_N

AE3

IFPF_L0

AE4

IFPF_L0_N

AF4

IFPF_L1

AF5

IFPF_L1_N

AD4

IFPF_L2

AD5

IFPF_L2_N

AG1

IFPF_L3

AF1

IFPF_L3_N

AG3

IFPC_AUX_I2CW_SCL

AG2

IFPC_AUX_I2CW_SDA_N

AK3

IFPD_AUX_I2CX_SCL

AK2

IFPD_AUX_I2CX_SDA_N

AB3

IFPE_AUX_I2CY_SCL

AB4

IFPE_AUX_I2CY_SDA_N

AF3

IFPF_AUX_I2CZ_SCL

AF2

IFPF_AUX_I2CZ_SDA_N

Part 4 of 7

NC

GENERAL

MULTI_STRAP_REF0_GND

LVDS/TMDS

VDD_SENSE

GND_SENSE

NC_0
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8

NC_9
NC_10
NC_11
NC_12
NC_13

BUFRST_N

CEC

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

THERMDP

THERMDN

P8
AC6
AJ28
AJ4
AJ5
AL11
C15
D19
D20
D23
D26
H31
T8
V32

L2

L3

J2

STRAP0

J7

STRAP1

J6

STRAP2

J5

STRAP3

J3

STRAP4

J1

MULTI_STRAP_REF0_GND

K3
K4

L4

L5

SYS_PEX_RST_MON# [23]

12

GPU_VDD_SENSE [63]

GPU_VSS_SENSE [63]

RV318

40.2K_0402_1%

DIS@

+3.3V_GFX_AON

10K_0402_5%

@

12

RV320

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
ROM_SCLK_GPU
ROM_SI_GPU
ROM_SO_GPU

@

1 2

1 2

DIS@

@

@

RV304

RV303

34.8K_0402_1%

1 2

1 2

4.99K_0402_1%

@

RV311

RV312

1 2

1 2

4.99K_0402_1%

4.99K_0402_1%

DIS@

@

@

RV305

RV301

15K_0402_1%

10K_0402_1%

1 2

1 2

@

@

RV309

RV313

1 2

1 2

45.3K_0402_1%

4.99K_0402_1%

@

@

RV306

RV302

1 2

4.99K_0402_1%

@

RV310

1 2

4.99K_0402_1%

RV307

RV308

10K_0402_1%

1 2

1 2

30.1K_0402_1%

@

RV314

34.8K_0402_1%

49.9K_0402_1%

DIS@

@

RV316

RV315

10K_0402_1%

1 2

1 2

4.99K_0402_1%

TEST

AK11
AM10
AM11
AP12
AP11
AN11

H6
H5
H7
H4

GPU_TESTMODE
GPU_JTAG_TCK
GPU_JTAG_TDI
GPU_JTAG_TDO
GPU_JTAG_TMS
GPU_JTAG_TRST#

ROM_CS_GPU
ROM_SI_GPU
ROM_SO_GPU
ROM_SCLK_GPU

T174@
T11@
T12@
T13@

12

RV324

10K_0402_5%DIS@

T176@

DIS@

10K_0402_5%

12

RV323

TESTMODE

JTAG_TCK

JTAG_TDI

JTAG_TDO

JTAG_TMS

JTAG_TRST_N

SERIAL

ROM_CS_N

ROM_SI

ROM_SO

ROM_SCLK

N16P-GX-A2@

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2014/08/08 2014/07/01

2014/08/08 2014/07/01

2014/08/08 2014/07/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N15P (2/5)-DP / Straps

N15P (2/5)-DP / Straps

N15P (2/5)-DP / Straps

1

0.1(X00)

0.1(X00)

24 71Thursday, August 06, 2015

24 71Thursday, August 06, 2015

24 71Thursday, August 06, 2015

0.1(X00)

5

4

3

2

1

+1.35VSDGPU

D D

Close to Pinclose to the GPU

10U_0603_6.3V6M

22U_0603_6.3V6M

CV588

CV587

1

1

2

2

DIS@

DIS@

10U_0603_6.3V6M

22U_0603_6.3V6M

1

2

DIS@

C C

CV603

CV602

1

2

DIS@

22U_0603_6.3V6M

22U_0603_6.3V6M

@

CV815

1

2

DIS@

22U_0603_6.3V6M

@

CV816

1

2

DIS@

22U_0603_6.3V6M

1U_0402_6.3V6K

CV589

1

2

1

2

CV590

1

2

DIS@

DIS@

22U_0603_6.3V6M

22U_0603_6.3V6M

CV605

CV604

1

2

DIS@

1U_0402_6.3V6K

1

1

@

CV591

CV592

2

2

DIS@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

@

CV606

CV607

2

2

DIS@

0.1U_0402_25V6

0.1U_0402_25V6

1

1

2

1

2

CV594

CV593

2

DIS@

0.1U_0402_25V6

0.1U_0402_25V6

1

@

CV609

CV608

2

DIS@

X06.38

B B

AA27
AA30
AB27
AB33
AC27
AD27
AE27
AF27
AG27

H10
H11
H12
H13
H14
H15
H16
H18
H19
H20
H21
H22
H23
H24

M27
N27

R27

W27
W30
W33

AH8
AG8

AG9

AF7
AF8
AF6

AG7
AN2
AG6

AB8
AD6
AC7
AC8

B13
B16
B19
E13
E16
E19

H8
H9

L27

P27
T27

T30
T33
V27

Y27

AJ8

UV1E

FBVDDQ_0
FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23
FBVDDQ_24
FBVDDQ_25
FBVDDQ_26
FBVDDQ_27
FBVDDQ_28
FBVDDQ_29
FBVDDQ_30
FBVDDQ_31
FBVDDQ_32
FBVDDQ_33
FBVDDQ_34
FBVDDQ_35
FBVDDQ_36
FBVDDQ_37
FBVDDQ_38
FBVDDQ_39
FBVDDQ_40
FBVDDQ_41
FBVDDQ_42
FBVDDQ_43

IFPAB_PLLVDD
IFPAB_RSET
IFPA_IOVDD
IFPB_IOVDD

IFPC_PLLVDD
IFPC_RSET
IFPC_IOVDD

IFPD_PLLVDD
IFPD_RSET
IFPD_IOVDD

IFPEF_PLLVDD
IFPEF_RSET
IFPE_IOVDD
IFPF_IOVDD

N16P-GX-A2@

Part 5 of 7

POWER

FB_CAL_PD_VDDQ

FB_CAL_TERM_GND

PEX_IOVDDQ_0
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8

PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13

PEX_IOVDD_0
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5

PEX_PLLVDD

VDD33_0
VDD33_1
VDD33_2
VDD33_3

FB_CAL_PU_GND

FB_GND_SENSE

FB_VDDQ_SENSE

PEX_PLL_HVDD
PEX_SVDD_3V3

AG13
AG15
AG16
AG18
AG25
AH15
AH18
AH26
AH27
AJ27
AK27
AL27
AM28
AN28

AG19
AG21
AG22
AG24
AH21
AH25

AG26

J8
K8
L8
M8

J27

H27

H25

F2

F1

AH12
AG12

+PEX_PLLVDD

+3.3V_GFX_AON

1 2

RV327 40.2_0402_1%DIS@

1 2

RV328 40.2_0402_1%DIS@

1 2

RV329 60.4_0402_1%DIS@

1 2

RV330 100_0402_1%DIS@

1 2

RV332 100_0402_1%DIS@

DIS@

+3.3V_GFX_RUN

1

2

PLACE UNDER BGA PLACE NEAR GPU

1U_0402_6.3V6K

CV580

1

2

DIS@

1U_0402_6.3V6K

1

CV595

2

DIS@

DIS@

0.1U_0402_10V7K
CV610

1

2

DIS@

+3.3V_GFX_AON

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

0.1U_0402_10V7K

@

CV616

CV615

CV614

1

1

2

2

DIS@

1U_0402_6.3V6K

@

CV581

1

2

1U_0402_6.3V6K

1

CV596

2

1U_0402_6.3V6K

1

@

CV611

2

DIS@

+1.35VSDGPU

+1.35VSDGPU

DIS@

DIS@

4.7U_0603_6.3V6K

1

2

4.7U_0603_6.3V6K

1

2

4.7U_0603_6.3V6K

1

2

CV582

CV597

CV612

1

2

DIS@

0.21A

10U_0603_6.3V6M

10U_0603_6.3V6M

@

CV583

1

1

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

CV598

1

1

2

2

DIS@

DIS@

1 2

LV3 BLM15PX121SN1D_2P

DIS@

0.1U_0402_10V7K

CV623

DIS@

0.1U_0402_10V7K

0.1U_0402_10V7K

1

1

2

CV621

CV622

2

DIS@

+1.05VSDGPU

22U_0603_6.3V6M

22U_0603_6.3V6M

@

CV584

1

2

DIS@

CV599

1

2

DIS@

1U_0402_6.3V6K

1

2

DIS@

Near GPUUnder GPU

1U_0402_6.3V6K

1

2

DIS@

CV585

+1.05VSDGPU

22U_0603_6.3V6M

CV600

CV613

CV619

DIS@

CV586

1

2

DIS@

22U_0603_6.3V6M

CV601

1

2

DIS@

+1.05VSDGPU

0.15A

4.7U_0603_6.3V6K

1

CV617

2

PEX_IOVDD/Q 3.3A

+3.3V_GFX_RUN

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2014/08/08 2014/07/01

2014/08/08 2014/07/01

2014/08/08 2014/07/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N15P (3/5)-Power

N15P (3/5)-Power

N15P (3/5)-Power

1

0.1(X00)

0.1(X00)

25 71Thursday, August 06, 2015

25 71Thursday, August 06, 2015

25 71Thursday, August 06, 2015

0.1(X00)

5

UV1F

AG11

GND_0

A2

GND_1

A33

GND_2

AA13

GND_3

AA15

GND_4

AA17

D D

C C

B B

A A

AA18
AA20
AA22
AB12
AB14
AB16
AB19

AB21
AB23
AB28
AB30
AB32

AC13
AC15
AC17
AC18
AC20
AC22

AE28
AE30
AE32
AE33

AH10
AH13
AH16
AH19

AH22
AH24
AH28
AH29
AH30
AH32
AH33

AK10

AL12
AL14
AL15
AL17
AL18

AL20
AL21
AL23
AL24
AL26
AL28
AL30
AL32
AL33

AM13
AM16
AM19
AM22
AM25

AN10
AN13
AN16
AN19
AN22
AN25
AN30
AN34

AP33

AB2

AB5
AB7

AE2

AE5
AE7

AH2

AH5
AH7

AK7

AL2

AL5

AN1

AN4
AN7
AP2

B10
B22
B25
B28
B31
B34

C10
C13
C19
C22
C25
C28

GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47

AJ7

GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84

B1

GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91

B4

GND_92

B7

GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99

C7

GND_100

N16P-GX-A2@

Part 6 of 7

4

GND

GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198
GND_199

GND_OPT
GND_OPT

D2
D31
D33
E10
E22
E25
E5
E7
F28
F7
G10
G13
G16
G19
G2
G22
G25
G28
G3
G30
G32
G33
G5
G7
K2
K28
K30
K32
K33
K5
K7
M13
M15
M17
M18
M20
M22
N12
N14
N16
N19
N2
N21
N23
N28
N30
N32
N33
N5
N7
P13
P15
P17
P18
P20
P22
R12
R14
R16
R19
R21
R23
T13
T15
T17
T18
T2
T20
T22
T28
T32
T5
T7
U12
U14
U16
U19
U21
U23
V12
V14
V16
V19
V21
V23
W13
W15
W17
W18
W20
W22
W28
Y12
Y14
Y16
Y19
Y21
Y23
AH11

C16
W32

3

+GPU_CORE

AA12
AA14
AA16
AA19
AA21
AA23
AB13
AB15
AB17
AB18
AB20
AB22
AC12
AC14
AC16
AC19
AC21
AC23

M12
M14
M16
M19
M21
M23

UV1G

VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23

N13

VDD_24

N15

VDD_25

N17

VDD_26

N18

VDD_27

N20

VDD_28

N22

VDD_29

P12

VDD_30

P14

VDD_31

P16

VDD_32

P19

VDD_33

P21

VDD_34

P23

VDD_35

R13

VDD_36

R15

VDD_37

R17

VDD_38

R18

VDD_39

R20

VDD_40

R22

VDD_41

T12

VDD_42

T14

VDD_43

T16

VDD_44

T19

VDD_45

T21

VDD_46

T23

VDD_47

U13

VDD_48

U15

VDD_49

U17

VDD_50

U18

VDD_51

U20

VDD_52

U22

VDD_53

V13

VDD_54

V15

VDD_55

N16P-GX-A2@

Part 7 of 7

POWER

2

+GPU_CORE

V17

VDD_56

V18

VDD_57

V20

VDD_58

V22

VDD_59

W12

VDD_60

W14

VDD_61

W16

VDD_62

W19

VDD_63

W21

VDD_64

W23

VDD_65

Y13

VDD_66

Y15

VDD_67

Y17

VDD_68

Y18

VDD_69

Y20

VDD_70

Y22

VDD_71

U1

XVDD_1

U2

XVDD_2

U3

XVDD_3

U4

XVDD_4

U5

XVDD_5

U6

XVDD_6

U7

XVDD_7

U8

XVDD_8

V1

XVDD_9

V2

XVDD_10

V3

XVDD_11

V4

XVDD_12

V5

XVDD_13

V6

XVDD_14

V7

XVDD_15

V8

XVDD_16

W2

XVDD_17

W3

XVDD_18

W4

XVDD_19

W5

XVDD_20

W7

XVDD_21

W8

XVDD_22

Y1

XVDD_23

Y2

XVDD_24

Y3

XVDD_25

Y4

XVDD_26

Y5

XVDD_27

Y6

XVDD_28

Y7

XVDD_29

Y8

XVDD_30

AA1

XVDD_31

AA2

XVDD_32

AA3

XVDD_33

AA4

XVDD_34

AA5

XVDD_35

AA6

XVDD_36

AA7

XVDD_37

AA8

XVDD_38

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2014/08/08 2014/07/01

2014/08/08 2014/07/01

2014/08/08 2014/07/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N15P (4/5)-Power / GND

N15P (4/5)-Power / GND

N15P (4/5)-Power / GND

1

0.1(X00)

0.1(X00)

26 71Thursday, August 06, 2015

26 71Thursday, August 06, 2015

26 71Thursday, August 06, 2015

0.1(X00)

5

4

3

2

1

FBA_CMD[0..31]

+FBA_DLL_AVDD+1.05VSDGPU

0.1U_0402_10V7K

1

2

DIS@

16mil

+FB_VREF

1

CV638

@

0.01U_0402_16V7K

2

@

RV344

@

60.4_0402_1%

FBA_D[0..31]

FBA_D[32..63]

FBA_DBI[4..7]

FBA_DBI[0..3]
FBA_EDC[4..7]
FBA_EDC[0..3]

CV637

1 2

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

+FBA_PLL_AVDD
+FB_VREF

+FBA_DLL_AVDD

RV345

@

60.4_0402_1%

1 2

AG28
AF29
AG29
AF28
AD30
AD29
AC29
AD28

AJ29

AK29

AJ30

AK28
AM29
AM31

AN29
AM30

AN31

AN32

AP30

AP32
AM33

AL31
AK33
AK32
AD34
AD32
AC30
AD33
AF31
AG34
AG32
AG33

AC28

M29
M28

G29

L28
L29

N31
P29
R29
P28

J28

H29

J29

H28
E31

E32
F30
C34
D32
B33
C33
F33
F32
H33
H32
P34
P32
P31
P33

L31
L34
L32
L33

U27
H26

K27

E1

R28

UV1B

FBA_D00
FBA_D01
FBA_D02
FBA_D03
FBA_D04
FBA_D05
FBA_D06
FBA_D07
FBA_D08
FBA_D09
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

FBA_PLL_AVDD
FB_VREF

FB_DLL_AVDD
FB_CLAMP

FBA_DEBUG0
FBA_DEBUG1

THE FBA_ECKBxx ARE
USED ON GK107. NC
ON GF108 AND GF117

N16P-GX-A2@

Part 2 of 7

MEMORY INTERFACE

A

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

FBA_CMD_RFU0
FBA_CMD_RFU1

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

FBA_WCK01

FBA_WCK01_N

FBA_WCK23

FBA_WCK23_N

FBA_WCK45

FBA_WCK45_N

FBA_WCK67

FBA_WCK67_N

FBA_WCKB01

FBA_WCKB01_N

FBA_WCKB23

FBA_WCKB23_N

FBA_WCKB45

FBA_WCKB45_N

FBA_WCKB67

FBA_WCKB67_N

U30
T31
U29
R34
R33
U32
U33
U28
V28
V29
V30
U34
U31
V34
V33
Y32
AA31
AA29
AA28
AC34
AC33
AA32
AA33
Y28
Y29
W31
Y30
AA34
Y31
Y34
Y33
V31

P30
F31
F34
M32
AD31
AL29
AM32
AF34

M30
H30
E34
M34
AF30
AK31
AM34
AF32

M31
G31
E33
M33
AE31
AK30
AN33
AF33

R32
AC32

R30
R31

AB31
AC31

K31
L30
H34
J34
AG30
AG31
AJ34
AK34

J30
J31
J32
J33
AH31
AJ31
AJ32
AJ33

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31

FBA_DBI0
FBA_DBI1
FBA_DBI2
FBA_DBI3
FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7

FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3
FBA_EDC4
FBA_EDC5
FBA_EDC6
FBA_EDC7

FBA_WCK01
FBA_WCK01#
FBA_WCK23
FBA_WCK23#
FBA_WCK45
FBA_WCK45#
FBA_WCK67
FBA_WCK67#

FBB_D[0..31][30]
FBB_D[32..63][31]

FBB_CMD[0..31][30,31]
FBB_DBI[4..7][31]

FBB_DBI[0..3][30]
FBB_EDC[4..7][31]
FBB_EDC[0..3][30]

RV338

10K_0402_5%

CKE_H

CKE_L

RST_H*

RST_L*

FBA_CMD30

FBA_CMD14

FBA_CMD29

FBA_CMD13

1 2

DIS@

RV339

10K_0402_5%

1 2

DIS@

RV340

10K_0402_5%

1 2

DIS@

RV341

10K_0402_5%

1 2

DIS@

for Test/Debug for Test/Debug

CLKA0 [28]
CLKA0# [28]

CLKA1 [29]
CLKA1# [29]

FBA_WCK01 [28]
FBA_WCK01# [28]
FBA_WCK23 [28]
FBA_WCK23# [28]
FBA_WCK45 [29]
FBA_WCK45# [29]
FBA_WCK67 [29]
FBA_WCK67# [29]

+1.35VSDGPU

FBA_D[0..31][28]
FBA_D[32..63][29]

FBA_CMD[0..31][28,29]
FBA_DBI[4..7][29]
FBA_DBI[0..3][28]

D D

FBA_EDC[4..7][29]
FBA_EDC[0..3][28]

NEED FIND 30R BEAD

C C

DIS@

B B

A A

LV21

HCB1608KF-300T20

1 2

DIS@

1U_0402_6.3V6K

1

CV790

2

+1.35VSDGPU

+FBA_PLL_AVDD +FBA_DLL_AVDD

X06.30

+FBA_DLL_AVDD

22U_0603_6.3V6M

CV791

1

2

DIS@

12

RV342

@

1.1K_0402_1%

12

RV343

@

1.1K_0402_1%

DIS@

1 2

CV639 0.1U_0402_10V7K

1 2

RV510 0_0402_5%

1 2

RV501 10K_0402_5%DIS@

+1.35VSDGPU

FBB_D[0..31]

FBB_D[32..63]

FBB_CMD[0..31]

FBB_DBI[4..7]

FBB_DBI[0..3]
FBB_EDC[4..7]
FBB_EDC[0..3]

FBB_D0
FBB_D1
FBB_D2
FBB_D3
FBB_D4
FBB_D5
FBB_D6
FBB_D7

CV636

1 2

FBB_D8
FBB_D9
FBB_D10
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_D29
FBB_D30
FBB_D31
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63

+FBA_PLL_AVDD

RV347

@

60.4_0402_1%

1 2

+1.35VSDGPU +1.35VSDGPU

+FBA_PLL_AVDD

1

0.1U_0402_10V7K

2

DIS@

RV346

@

60.4_0402_1%

G9
E9
G8

F9

F11

G11

F12

G12

G6

F5

E6

F6

F4
G4
E2

F3
C2
D4
D3
C1
B3
C4
B5
C5

A11
C11
D11

B11

D8
A8
C8
B8

F24
G23

E24
G24
D21

E21
G21

F21
G27
D27
G26

E27

E29

F29

E30
D30

A32
C31
C32

B32
D29

A29
C29

B29

B21
C23

A21
C21

B24
C24

B26
C26

H17

G14
G20

UV1C

FBB_D00
FBB_D01
FBB_D02
FBB_D03
FBB_D04
FBB_D05
FBB_D06
FBB_D07
FBB_D08
FBB_D09
FBB_D10
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_D29
FBB_D30
FBB_D31
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63

FBB_PLL_AVDD

FBB_DEBUG0
FBB_DEBUG1

THE FBA_ECKBxx ARE
USED ON GK107.
NC ON GF108 AND
GF117

N16P-GX-A2@

Part 3 of 7

MEMORY INTERFACE

FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8

FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31

FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQM4
FBB_DQM5
FBB_DQM6
FBB_DQM7

FBB_DQS_RN0
FBB_DQS_RN1
FBB_DQS_RN2
FBB_DQS_RN3
FBB_DQS_RN4
FBB_DQS_RN5
FBB_DQS_RN6

B

FBB_DQS_RN7

FBB_DQS_WP0
FBB_DQS_WP1
FBB_DQS_WP2
FBB_DQS_WP3
FBB_DQS_WP4
FBB_DQS_WP5
FBB_DQS_WP6
FBB_DQS_WP7

FBB_CMD_RFU0
FBB_CMD_RFU1

FBB_CLK0

FBB_CLK0_N

FBB_CLK1

FBB_CLK1_N

FBB_WCK01

FBB_WCK01_N

FBB_WCK23

FBB_WCK23_N

FBB_WCK45

FBB_WCK45_N

FBB_WCK67

FBB_WCK67_N

FBB_WCKB01

FBB_WCKB01_N

FBB_WCKB23

FBB_WCKB23_N

FBB_WCKB45

FBB_WCKB45_N

FBB_WCKB67

FBB_WCKB67_N

D13

FBB_CMD0

E14

FBB_CMD1

F14

FBB_CMD2

A12

FBB_CMD3

B12

FBB_CMD4

C14

FBB_CMD5

B14

FBB_CMD6

G15

FBB_CMD7

F15

FBB_CMD8

E15

FBB_CMD9

D15

FBB_CMD10

A14

FBB_CMD11

D14

FBB_CMD12

A15

FBB_CMD13

B15

FBB_CMD14

C17

FBB_CMD15

D18

FBB_CMD16

E18

FBB_CMD17

F18

FBB_CMD18

A20

FBB_CMD19

B20

FBB_CMD20

C18

FBB_CMD21

B18

FBB_CMD22

G18

FBB_CMD23

G17

FBB_CMD24

F17

FBB_CMD25

D16

FBB_CMD26

A18

FBB_CMD27

D17

FBB_CMD28

A17

FBB_CMD29

B17

FBB_CMD30

E17

FBB_CMD31

E11

FBB_DBI0

E3

FBB_DBI1

A3

FBB_DBI2

C9

FBB_DBI3

F23

FBB_DBI4

F27

FBB_DBI5

C30

FBB_DBI6

A24

FBB_DBI7

D9
E4
B2
A9
D22
D28
A30
B23

D10

FBB_EDC0

D5

FBB_EDC1

C3

FBB_EDC2

B9

FBB_EDC3

E23

FBB_EDC4

E28

FBB_EDC5

B30

FBB_EDC6

A23

FBB_EDC7

C12
C20

D12
E12

E20
F20

F8

FBB_WCK01

E8

FBB_WCK01#

A5

FBB_WCK23

A6

FBB_WCK23#

D24

FBB_WCK45

D25

FBB_WCK45#

B27

FBB_WCK67

C27

FBB_WCK67#

D6
D7
C6
B6
F26
E26
A26
A27

FBB_CMD30

CKE_H

FBB_CMD14

CKE_L

FBB_CMD29

RST_H*

RST_L*

CLKB0 [30]
CLKB0# [30]

CLKB1 [31]
CLKB1# [31]

FBB_WCK01 [30]
FBB_WCK01# [30]
FBB_WCK23 [30]
FBB_WCK23# [30]
FBB_WCK45 [31]
FBB_WCK45# [31]
FBB_WCK67 [31]
FBB_WCK67# [31]

FBB_CMD13

RV409

10K_0402_5%

1 2

DIS@

RV410

10K_0402_5%

1 2

DIS@

RV414

10K_0402_5%

1 2

DIS@

RV418
10K_0402_5%

1 2

DIS@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2014/08/08 2014/07/01

2014/08/08 2014/07/01

2014/08/08 2014/07/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N15P (5/5)-Memory A/B

N15P (5/5)-Memory A/B

N15P (5/5)-Memory A/B

1

0.1(X00)

0.1(X00)

27 71Thursday, August 06, 2015

27 71Thursday, August 06, 2015

27 71Thursday, August 06, 2015

0.1(X00)

5

4

3

2

1

Memory Partition A - Lower 32
bits

D D

C C

B B

A A

64X32 GDDR5

FBVREF_ALTV[23,29,30,31]

FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3

FBA_DBI0
FBA_DBI1
FBA_DBI2
FBA_DBI3

1.33K_0402_1%
RV355

RV356

1.33K_0402_1%

DIS@

0.1U_0402_10V7K

@

CV662

1

2

DIS@

CLKA0
CLKA0#
FBA_CMD14

FBA_CMD9
FBA_CMD6

FBA_CMD7
FBA_CMD4
FBA_CMD3

FBA_CMD1
FBA_CMD2
FBA_CMD11
FBA_CMD10

FBA_SEN0

FBA_CMD8
FBA_CMD12
FBA_CMD0
FBA_CMD15
FBA_CMD5

FBA_WCK01#
FBA_WCK01

FBA_WCK23#
FBA_WCK23

FBA_CMD13

+1.35VSDGPU

0.1U_0402_10V7K
CV663

1

2

1 2

DIS@

RV348 80.6_0402_1%

+FBA_VREFD_L

RV357

931_0402_1%

12

DIS@

RV359

931_0402_1%

12

DIS@

13

D

2

QV22

G

L2N7002WT1G_SC-70-3

S

DIS@

5

RV358

549_0402_1%

DIS@

RV360

549_0402_1%

DIS@

+FBA_VREFC_L

+1.35VSDGPU

12

12

+FBA_VREFD_L

DIS@

+FBA_VREFC_L

820PF_0402_50V7K

10U_0603_6.3V6M

CV659

1

2

DIS@

4

CLKA0CLKA0#

CV776

820PF_0402_50V7K

1

2

DIS@

CV651

1U_0402_6.3V6K

1

2

DIS@

CLKA0[27]
CLKA0#[27]

1 2

RV352 1K_0402_1%DIS@

1 2

RV353 1K_0402_1%DIS@

1 2

RV354 121_0402_1%DIS@

FBA_WCK01#[27]
FBA_WCK01[27]

FBA_WCK23#[27]
FBA_WCK23[27]

820PF_0402_50V7K

1

CV650

2

DIS@

1

2

DIS@

1U_0402_6.3V6K

1

CV660

CV661

2

DIS@

H5GC4H24AJR-R0C
K4G41325FC-HC03
EDW4032BABG-60-F

12

12

NORMAL

UV5

MF=0 MF=1 MF=0MF=1

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

J5

A12/A13

K4

A8/A7 A10/A0

K5

A11/A6 A9/A1

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

H11

BA0/A2 BA2/A4

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

A5

NC

U5

NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

170-BALL

SGRAM GDDR5

K4G41325FC-HC04_FBGA170~D

@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

2014/08/08 2014/07/01

2014/08/08 2014/07/01

2014/08/08 2014/07/01

A4
A2
B4
B2
E4
E2
F4
F2
A11
A13
B11
B13
E11
E13
F11
F13
U11
U13
T11
T13
N11
N13
M11
M13
U4
U2
T4
T2
N4
N2
M4
M2

+1.35VSDGPU

B1

VDDQ

D1

VDDQ

F1

VDDQ

M1

VDDQ

P1

VDDQ

T1

VDDQ

G2

VDDQ

L2

VDDQ

B3

VDDQ

D3

VDDQ

F3

VDDQ

H3

VDDQ

K3

VDDQ

M3

VDDQ

P3

VDDQ

T3

VDDQ

E5

VDDQ

N5

VDDQ

E10

VDDQ

N10

VDDQ

B12

VDDQ

D12

VDDQ

F12

VDDQ

H12

VDDQ

K12

VDDQ

M12

VDDQ

P12

VDDQ

T12

VDDQ

G13

VDDQ

L13

VDDQ

B14

VDDQ

D14

VDDQ

F14

VDDQ

M14

VDDQ

P14

VDDQ

T14

VDDQ

A1

VSSQ

C1

VSSQ

E1

VSSQ

N1

VSSQ

R1

VSSQ

U1

VSSQ

H2

VSSQ

K2

VSSQ

A3

VSSQ

C3

VSSQ

E3

VSSQ

N3

VSSQ

R3

VSSQ

U3

VSSQ

C4

VSSQ

R4

VSSQ

F5

VSSQ

M5

VSSQ

F10

VSSQ

M10

VSSQ

C11

VSSQ

R11

VSSQ

A12

VSSQ

C12

VSSQ

E12

VSSQ

N12

VSSQ

R12

VSSQ

U12

VSSQ

H13

VSSQ

K13

VSSQ

A14

VSSQ

C14

VSSQ

E14

VSSQ

N14

VSSQ

R14

VSSQ

U14

VSSQ

Compal Secret Data

Compal Secret Data

Compal Secret Data

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31

10U_0603_6.3V6M

CV652

1

2

DIS@

DIS@

Deciphered Date

Deciphered Date

Deciphered Date

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_10V7K

1

CV653

2

DIS@

CV655

1

2

2

1

1

CV654

2

2

DIS@

DIS@

FBA_CMD[0..31]
FBA_D[0..31]
FBA_DBI[0..3]
FBA_EDC[0..3]

0.1U_0402_10V7K

0.1U_0402_10V7K
CV656

1

2

DIS@

FBA_CMD[0..31] [27,29]

FBA_D[0..31] [27]

FBA_DBI[0..3] [27]

FBA_EDC[0..3] [27]

0.1U_0402_10V7K

0.1U_0402_10V7K

@

CV657

@

CV658

CV800

1

1

2

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

0.1U_0402_10V7K

0.1U_0402_10V7K
CV799

1

2

DIS@

VRAM_GDDR5_A Lower

VRAM_GDDR5_A Lower

VRAM_GDDR5_A Lower

0.1U_0402_10V7K

CV802

CV801

1

1

2

2

DIS@

DIS@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

0.1(X00)

0.1(X00)

28 71Thursday, August 06, 2015

28 71Thursday, August 06, 2015

28 71Thursday, August 06, 2015

0.1(X00)

5

Memory Partition A - Upper 32 bits

D D

1 2

DIS@

RV361 80.6_0402_1%

C C

+FBA_VREFD_H

RV370

931_0402_1%

12

DIS@

RV372

931_0402_1%

12

DIS@

13

D

2

FBVREF_ALTV[23,28,30,31]

B B

A A

5

G

DIS@

QV23
L2N7002WT1G_SC-70-3

S

RV371

549_0402_1%

DIS@

RV373

549_0402_1%

DIS@

+FBA_VREFC_H

+1.35VSDGPU

12

12

4

CLKA1CLKA1#

+FBA_VREFD_H

1

2

DIS@

+FBA_VREFC_H

CV676

820PF_0402_50V7K

10U_0603_6.3V6M

CV684

1

1

2

2

DIS@

DIS@

4

1 2

RV363 1K_0402_1%DIS@

1 2

RV366 1K_0402_1%DIS@

1 2

RV365 121_0402_1%DIS@

820PF_0402_50V7K

1

CV777

2

DIS@

1

2

DIS@

1U_0402_6.3V6K

CV685

DIS@

3

Issued Date

Issued Date

Issued Date

3

NORMAL

A4

DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

2014/08/08 2014/07/01

2014/08/08 2014/07/01

2014/08/08 2014/07/01

FBA_D32

A2

FBA_D33FBA_EDC4

B4

FBA_D34

B2

FBA_D35

E4

FBA_D36

E2

FBA_D37

F4

FBA_D38

F2

FBA_D39

A11

FBA_D40

A13

FBA_D41

B11

FBA_D42

B13

FBA_D43

E11

FBA_D44

E13

FBA_D45

F11

FBA_D46

F13

FBA_D47

U11

FBA_D48

U13

FBA_D49

T11

FBA_D50

T13

FBA_D51

N11

FBA_D52

N13

FBA_D53

M11

FBA_D54

M13

FBA_D55

U4

FBA_D56

U2

FBA_D57

T4

FBA_D58

T2

FBA_D59

N4

FBA_D60

N2

FBA_D61

M4

FBA_D62

M2

FBA_D63

+1.35VSDGPU

B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14

A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

UV6

MF=0 MF=1 MF=0MF=1

C2

EDC0 EDC3

+1.35VSDGPU

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

J5

A12/A13

K4

A8/A7 A10/A0

K5

A11/A6 A9/A1

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

H11

BA0/A2 BA2/A4

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

A5

NC

U5

NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

170-BALL

SGRAM GDDR5

K4G41325FC-HC04_FBGA170~D

@

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

FBA_EDC5
FBA_EDC6
FBA_EDC7

FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7

CLKA1[27]
CLKA1#[27]

FBA_WCK45#[27]
FBA_WCK45[27]

FBA_WCK67#[27]
FBA_WCK67[27]

820PF_0402_50V7K

1.33K_0402_1%

12

CV675

RV368

DIS@

12

RV369

1.33K_0402_1%

DIS@

1U_0402_6.3V6K

0.1U_0402_10V7K

1

1

CV686

2

2

DIS@

CLKA1
CLKA1#
FBA_CMD30

FBA_CMD25
FBA_CMD22

FBA_CMD23
FBA_CMD20
FBA_CMD19

FBA_CMD17
FBA_CMD18
FBA_CMD27
FBA_CMD26

FBA_SEN2

FBA_CMD24
FBA_CMD28
FBA_CMD16
FBA_CMD31
FBA_CMD21

FBA_WCK45#
FBA_WCK45

FBA_WCK67#
FBA_WCK67

FBA_CMD29

0.1U_0402_10V7K

@

CV688

CV687

1

2

DIS@

2

FBA_CMD[0..31]
FBA_D[32..63]
FBA_DBI[4..7]
FBA_EDC[4..7]

0.1U_0402_10V7K

DIS@

0.1U_0402_10V7K

CV680

1

1

2

2

DIS@

1

2

DIS@

CV679

CV678

2

2

DIS@

2

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

CV677

1

1

FBA_CMD[0..31] [27,28]

FBA_D[32..63] [27]

FBA_DBI[4..7] [27]

FBA_EDC[4..7] [27]

0.1U_0402_10V7K

0.1U_0402_10V7K

@

@

CV681

CV683

CV682

1

1

2

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

0.1U_0402_10V7K

0.1U_0402_10V7K
CV804

1

1

2

2

DIS@

DIS@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

VRAM_GDDR5_A Upper

VRAM_GDDR5_A Upper

VRAM_GDDR5_A Upper

1

0.1U_0402_10V7K

0.1U_0402_10V7K
CV805

CV806

CV803

1

1

2

2

DIS@

DIS@

0.1(X00)

0.1(X00)

29 71Thursday, August 06, 2015

29 71Thursday, August 06, 2015

1

29 71Thursday, August 06, 2015

0.1(X00)

5

Memory Partition B - Lower 32
bits

D D

C C

B B

A A

64X32 GDDR5

FBVREF_ALTV[23,28,29,31]

5

13

D

2

G

S

DIS@

+FBB_VREFD_L

RV383

931_0402_1%

12

DIS@

RV385

931_0402_1%

12

DIS@

QV24
L2N7002WT1G_SC-70-3

RV384

549_0402_1%

DIS@

RV386

549_0402_1%

DIS@

+FBB_VREFC_L

+1.35VSDGPU

1 2

DIS@

RV374 80.6_0402_1%

12

12

4

CLKB0CLKB0#

+FBB_VREFD_L

DIS@

+FBB_VREFC_L

820PF_0402_50V7K

10U_0603_6.3V6M

CV709

1

2

DIS@

4

DIS@

820PF_0402_50V7K

1

2

1U_0402_6.3V6K

1

2

1 2

RV378 1K_0402_1%DIS@

1 2

RV379 1K_0402_1%DIS@

1 2

RV380 121_0402_1%DIS@

FBB_WCK01#[27]
FBB_WCK01[27]

FBB_WCK23#[27]
FBB_WCK23[27]

CV778

CV700

820PF_0402_50V7K

1

2

DIS@

DIS@

1

CV701

2

DIS@

1U_0402_6.3V6K

1

CV710

CV711

2

DIS@

CLKB0[27]
CLKB0#[27]

1.33K_0402_1%

12

12

RV382

1.33K_0402_1%

DIS@

0.1U_0402_10V7K

1

2

DIS@

3

3

NORMAL

A4

DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

2014/08/08 2014/07/01

2014/08/08 2014/07/01

2014/08/08 2014/07/01

FBB_D0

A2

FBB_D1

B4

FBB_D2

B2

FBB_D3

E4

FBB_D4

E2

FBB_D5

F4

FBB_D6

F2

FBB_D7

A11

FBB_D8

A13

FBB_D9

B11

FBB_D10

B13

FBB_D11

E11

FBB_D12

E13

FBB_D13

F11

FBB_D14

F13

FBB_D15

U11

FBB_D16

U13

FBB_D17

T11

FBB_D18

T13

FBB_D19

N11

FBB_D20

N13

FBB_D21

M11

FBB_D22

M13

FBB_D23

U4

FBB_D24

U2

FBB_D25

T4

FBB_D26

T2

FBB_D27

N4

FBB_D28

N2

FBB_D29

M4

FBB_D30

M2

FBB_D31

+1.35VSDGPU

B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14

A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14

Compal Secret Data

Compal Secret Data

Compal Secret Data

10U_0603_6.3V6M

1

2

DIS@

Deciphered Date

Deciphered Date

Deciphered Date

UV9

MF=0 MF=1 MF=0MF=1

FBB_SEN0

+1.35VSDGPU

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

J5

A12/A13

K4

A8/A7 A10/A0

K5

A11/A6 A9/A1

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

H11

BA0/A2 BA2/A4

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

A5

NC

U5

NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

170-BALL

SGRAM GDDR5

K4G41325FC-HC04_FBGA170~D

@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

FBB_EDC0
FBB_EDC1
FBB_EDC2
FBB_EDC3

FBB_DBI0
FBB_DBI1
FBB_DBI2
FBB_DBI3

CLKB0
CLKB0#
FBB_CMD14

FBB_CMD9
FBB_CMD6

FBB_CMD7
FBB_CMD4
FBB_CMD3

FBB_CMD1
FBB_CMD2
FBB_CMD11
FBB_CMD10

FBB_CMD8
FBB_CMD12
FBB_CMD0
FBB_CMD15
FBB_CMD5

FBB_WCK01#
FBB_WCK01

FBB_WCK23#
FBB_WCK23

RV381

FBB_CMD13

0.1U_0402_10V7K

@

CV712

CV713

1

2

2

FBB_CMD[0..31]
FBB_D[0..31]

FBB_DBI[0..3]

FBB_EDC[0..3]

1U_0402_6.3V6K

DIS@

1U_0402_6.3V6K

1

1

CV703

CV704

2

2

DIS@

2

CV702

DIS@

0.1U_0402_10V7K

DIS@

0.1U_0402_10V7K

@

CV706

1

1

2

2

0.1U_0402_10V7K
CV705

1

2

FBB_CMD[0..31] [27,31]

FBB_D[0..31] [27]

FBB_DBI[0..3] [27]

FBB_EDC[0..3] [27]

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

@

CV707

CV808

CV708

1

1

2

2

DIS@

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

0.1U_0402_10V7K

CV807

1

1

2

2

DIS@

DIS@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

VRAM_GDDR5_B Lower

VRAM_GDDR5_B Lower

VRAM_GDDR5_B Lower

1

0.1U_0402_10V7K
CV809

CV810

1

2

DIS@

0.1(X00)

0.1(X00)

30 71Thursday, August 06, 2015

30 71Thursday, August 06, 2015

1

30 71Thursday, August 06, 2015

0.1(X00)

5

Memory Partition B - Upper 32 bits

FBB_EDC5
FBB_EDC6
FBB_EDC7

FBB_DBI4
FBB_DBI5

D D

C C

+FBB_VREFD_H

RV396

931_0402_1%

549_0402_1%

12

DIS@

RV398

549_0402_1%

931_0402_1%

12

DIS@

+FBB_VREFC_H

13

D

2

G

DIS@

QV25
L2N7002WT1G_SC-70-3

S

5

B B

FBVREF_ALTV[23,28,29,30]

A A

RV397

DIS@

RV399

DIS@

1 2

RV387 80.6_0402_1%

+1.35VSDGPU

12

12

DIS@

+FBB_VREFD_H

+FBB_VREFC_H

820PF_0402_50V7K

DIS@

CLKB1CLKB1#

1 2

RV389 1K_0402_1%DI S@

1 2

RV392 1K_0402_1%DI S@

1 2

RV391 121_0402_1%DIS@

820PF_0402_50V7K

820PF_0402_50V7K

1

1

CV725

CV789

2

2

DIS@

DIS@

1

CV726

2

DIS@

10U_0603_6.3V6M

1U_0402_6.3V6K

CV734

1

1

1

CV735

2

2

2

DIS@

DIS@

FBB_DBI6
FBB_DBI7 FBB_D42

CLKB1

CLKB1[27]

CLKB1#

CLKB1#[27]

FBB_CMD30
FBB_CMD25
FBB_CMD22

FBB_CMD23
FBB_CMD20
FBB_CMD19

FBB_CMD17
FBB_CMD18
FBB_CMD27
FBB_CMD26

FBB_CMD24
FBB_CMD28
FBB_CMD16
FBB_CMD31
FBB_CMD21

FBB_WCK45#

FBB_WCK45#[27]

FBB_WCK45

FBB_WCK45[27]

FBB_WCK67#

FBB_WCK67#[27]

FBB_WCK67

FBB_WCK67[27]

1.33K_0402_1%

12

RV394

FBB_CMD29

DIS@

12

RV395

1.33K_0402_1%

DIS@

1U_0402_6.3V6K

0.1U_0402_10V7K

0.1U_0402_10V7K

@

CV737

1

1

CV736

2

2

DIS@

FBB_SEN2

+1.35VSDGPU

CV738

4

NORMAL

UV10

MF=0 MF=1 MF=0MF=1

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

J5

A12/A13

K4

A8/A7 A10/A0

K5

A11/A6 A9/A1

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

H11

BA0/A2 BA2/A4

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

A5

NC

U5

NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

170-BALL

SGRAM GDDR5

K4G41325FC-HC04_FBGA170~D

@

4

DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

3

A4

FBB_D32

A2

FBB_D33FBB_EDC4

B4

FBB_D34

B2

FBB_D35

E4

FBB_D36

E2

FBB_D37

F4

FBB_D38

F2

FBB_D39

A11

FBB_D40

A13

FBB_D41

B11
B13

FBB_D43

E11

FBB_D44

E13

FBB_D45

F11

FBB_D46

F13

FBB_D47

U11

FBB_D48

U13

FBB_D49

T11

FBB_D50

T13

FBB_D51

N11

FBB_D52

N13

FBB_D53

M11

FBB_D54

M13

FBB_D55

U4

FBB_D56

U2

FBB_D57

T4

FBB_D58

T2

FBB_D59

N4

FBB_D60

N2

FBB_D61

M4

FBB_D62

M2

FBB_D63

+1.35VSDGPU
B1

VDDQ

D1

VDDQ

F1

VDDQ

M1

VDDQ

P1

VDDQ

T1

VDDQ

G2

VDDQ

L2

VDDQ

B3

VDDQ

D3

VDDQ

F3

VDDQ

H3

VDDQ

K3

VDDQ

M3

VDDQ

P3

VDDQ

T3

VDDQ

E5

VDDQ

N5

10U_0603_6.3V6M

VDDQ

E10

VDDQ

N10

VDDQ

B12

VDDQ

D12

VDDQ

F12

VDDQ

H12

VDDQ

K12

VDDQ

M12

VDDQ

P12

VDDQ

T12

VDDQ

G13

VDDQ

L13

VDDQ

B14

VDDQ

D14

VDDQ

F14

VDDQ

M14

VDDQ

P14

VDDQ

T14

VDDQ

A1

VSSQ

C1

VSSQ

E1

VSSQ

N1

VSSQ

R1

VSSQ

U1

VSSQ

H2

VSSQ

K2

VSSQ

A3

VSSQ

C3

VSSQ

E3

VSSQ

N3

VSSQ

R3

VSSQ

U3

VSSQ

C4

VSSQ

R4

VSSQ

F5

VSSQ

M5

VSSQ

F10

VSSQ

M10

VSSQ

C11

VSSQ

R11

VSSQ

A12

VSSQ

C12

VSSQ

E12

VSSQ

N12

VSSQ

R12

VSSQ

U12

VSSQ

H13

VSSQ

K13

VSSQ

A14

VSSQ

C14

VSSQ

E14

VSSQ

N14

VSSQ

R14

VSSQ

U14

VSSQ

1U_0402_6.3V6K

CV727

1

1

2

2

DIS@

DIS@

FBB_CMD[0..31]
FBB_D[32..63]
FBB_DBI[4..7]
FBB_EDC[4..7]

0.1U_0402_10V7K

0.1U_0402_10V7K

1U_0402_6.3V6K

CV730

1

1

1

CV729

CV728

2

2

2

DIS@

DIS@

DIS@

FBB_CMD[0..31] [27,30]

FBB_D[32..63] [27]

FBB_DBI[4..7] [27]

FBB_EDC[4..7] [27]

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

@

@

CV812

CV732

CV731

CV733

1

1

1

2

2

2

DIS@

DIS@

3

0.1U_0402_10V7K

0.1U_0402_10V7K

CV811

CV813

CV814

1

1

1

2

2

2

DIS@

DIS@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

2014/08/08 2014/07/01

2014/08/08 2014/07/01

2014/08/08 2014/07/01

2

Deciphered Date

Deciphered Date

Deciphered Date

1

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

VRAM_GDDR5_B Upper

VRAM_GDDR5_B Upper

VRAM_GDDR5_B Upper

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

31 71Thursday, August 06, 2015

31 71Thursday, August 06, 2015

31 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

+3.3V_GFX_RUN

4

3

2

1

+3VALW to +3.3V_GFX_AON

DIS@

+3.3V_GFX_AON+5VALW

0.1U_0402_25V6
CV363

12

T1 Custom
T2 >0
T3 >0
T4 >0
T5 >100us
T6 >0
T7 <48ms
T8 500ms
T9 >0

+3VS +3VS

4.7U_0603_6.3V6K
CV797

4.7U_0603_6.3V6K
CV798

UZ17

1

VIN

2

VIN

3

EN

4

VBIAS

APE8937GN2_DFN8_2X2

DIS@

VOUT
VOUT

GND
GND

8
7

6

CT

5
9

D D

3V3_MAIN_EN[23,62,63]

C C

+3.3V_GFX_RUN

0.1U_0402_10V7K

0.1U_0402_10V7K
CV793

CV792

1

1

2

2

DIS@

DIS@

+3.3V_GFX_AON

0.1U_0402_10V7K

CV794

1

2

DIS@

B B

DIS@

DIS@

+5VALW

1U_0402_6.3V6K

CV795

1

1

2

2

DIS@

1U_0402_6.3V6K

CV796

1

1

2

2

DIS@

Under GPU Near GPU

X06.31 X06.31

RZ69

0_0805_5%

1 2

@

1 2

CZ95

@

2200P_0402_25V7K

+3.3V_GFX_RUN

DGPU_PWR_EN[20]

GPU Power Up Power Rail Sequence

Driver call

+3V_GPU

to enable GPU

100K_0402_5%

12

RV181

DIS@

DGPU_PWR_EN#

L2N7002WT1G_SC-70-3

13

D

2

QV87

G

S

DIS@

GPU Power Up Sub-system Sequence

T1

Power EN

+GPU_CORE

+1.05V_GPU

+1.35V_GPU
The ramp time for any rail must be more than 40us.

NV3V3Pgood

27Mhz

GPU all PG

CLK REQ#

100MHz

GPU Power Down Sequence

First rail to power down

Last rail to power down

Toff < 10ms

GPU Reset#

PCIe Training

T9 T2 T3

GPU Power Down Sub-system Sequence

T1

QV86

DIS@

DMG2301U-7_SOT23-3

D

S

13

G

2

RV511

0_0805_5%

1 2

@

T8

T4 T5 T6 T7

T7

GPU Disable call

Link tear

Discharge

+3VALW

12

A A

QZ6B

DIS@

DMN65D8LDW-7_SOT363-6

FBVDD_EN[23,60]

34

5

5

RZ12
100K_0402_5%

DIS@

+1.35VSDGPU

12

RZ8
10_0402_1%

DIS@

QZ6A

61

DMN65D8LDW-7_SOT363-6

2

DIS@

L2N7002WT1G_SC-70-3

DGPU_PWR_EN#

+1.05VSDGPU +GPU_CORE

12

RZ9
1_0402_5%

DIS@

QZ8

DIS@

13

D

2

G

2

S

4

+3.3V_GFX_AON

12

RZ10
1_0402_5%

DIS@

QZ7A

DIS@

61

DMN65D8LDW-7_SOT363-6

5

12

RZ11
100_0603_5%

DIS@

34

DMN65D8LDW-7_SOT363-6
QZ7B

DIS@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

down
GPU Reset#

Power EN

27Mhz

100MHz

NV3V3Pgood

Call Return

Deciphered Date

Deciphered Date

Deciphered Date

T1 Custom
T2 >0
T3 >0
T4 <=0
T5 >=0
T6 Custom
T7 Custom

T2 T3 T4 T5 T6

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

GPU DC/DC interface

GPU DC/DC interface

GPU DC/DC interface

1

0.1(X00)

0.1(X00)

32 71Thursday, August 06, 2015

32 71Thursday, August 06, 2015

32 71Thursday, August 06, 2015

0.1(X00)

A

+5VALW to +5VS
+3VALW to +3VS

+5VALW +5VS

RUN_ON_EC[34,48]

1 1

1 2

RZ43 100K_0402_5%

RUN_ON_EC

+5VALW

RUN_ON_EC

+3VALW +3VS

RUN_ON_EC

UZ1

1

VIN1

2

VIN1

3

ON1

4

VBIAS

5

ON2

6

VIN2

7

VIN2

EM5209VF_DFN14_3X2

VOUT1
VOUT1

VOUT2
VOUT2

GPAD

B

14
13

12

CT1

11

GND

10

CT2

9
8

15

X06.18

RZ13

0_0603_5%

1 2

@

1 2

CZ4 470P_0603_50V7K

1 2

CZ6 470P_0603_50V7K

1 2

@

0_0603_5%

RZ15

X06.18

1495mA

2041mA

C

WLAN Load Switch

D

+3VALW

+5VALW

NGFF_ON

DN3

NGFF_PWREN[20]

AUX_EN_WOWL[48]

2

1

3

BAT54CW-7-F_SOT323-3~D

NGFF_ON

UN3

1

VIN

2

VIN

3

EN

4

VBIAS

APE8937GN2_DFN8_2X2

RN33 100K_0402_5%

VOUT
VOUT

CT

GND
GND

1 2

RN34

8
7

6
5

9

0_0603_5%

1 2

1 2

@

CN22

2200P_0402_25V7K

NGFF_ON

X06.18

@

E

+3VS_WLAN

Close UZ4Close UZ4

+3VALW+5VALW

1

CZ11

@

1U_0603_10V6K

2

1

CZ12

@

1U_0603_10V6K

2

1

CZ8
10U_0603_6.3V6M

2

Touch Screen Load Switch & Card Reader

CZ26
1U_0402_6.3V6K

2 2

3.3V_TS_EN[20]

3.3V_TS_EN

RZ39 100K_0402_5%

+3VALW

12

+5VALW

12

UZ5

1

VIN

2

VIN

3

EN

4

VBIAS

APE8937GN2_DFN8_2X2

3.3V_TS_EN

+3VS+5VS

1

2

CZ9
10U_0603_6.3V6M

8

VOUT

7

VOUT

6

CT

5

GND

9

GND

X06.18

RZ26

0_0603_5%

1 2

@

1 2

2200P_0402_25V7K
CZ31

+3VS_TS+3VS_TS

1

CZ29

0.1U_0402_10V7K

2

+3VALW to +3V_PCH

CZ18
1U_0402_6.3V6K

PCH_ALW_ON[34,48,58]

1 2

RZ46 100K_0402_5%

PCH_ALW_ON

+5VALW

12

PCH_ALW_ON

UZ4

1

VIN

2

VIN

3

EN

4

VBIAS

APE8937GN2_DFN8_2X2

VOUT
VOUT

X06.18

RZ18

0_0603_5%

1 2

8
7

6

CT

5

GND

9

GND

@

1 2

2200P_0402_25V7K

CZ20

+3V_PCH+3VALW +3V_PCH

1

2

CZ19

0.1U_0402_10V7K

X06.18

+3VS +3VS_CR

RZ28

0_0603_5%

1 2

@

eDP & Camera Load Switch

+3VALW +3.3VDX_SSD

UZ8

5

OUT

3 3

DV7
BAT54CW-7-F_SOT323-3~D

LCD_VCC_TEST_EN[48]

ENVDD_PCH[16,48]

2

3

ENVDD

1

IN

4

EN

SY6288C20AAC_SOT23-5

ENVDDENVDD

GND

OC

X06.18

RZ35

0_0603_5%

1 2

1

@

2
3

1 2

RZ40 100K_0402_5%

+EDPVDD

+EDPVDD

1

2

CZ41

0.1U_0402_10V7K

Alpine Ridge(TBT) Load Switch

+3VALW

CT106

+3V_TBT_PWR

470P_0402_50V7K

1

2

RT114 0.01_0603_1%@

10U_0603_6.3V6M

CT162

1

2

1 2

B

4 4

1 2

SUS_ON_EC[34,48]

X06.18

RT240 0_0402_5%@

+5VALW

A

UT3

1

VIN

2

VIN

3

EN

4

VBIAS

APE8937GN2_DFN8_2X2

VOUT
VOUT

GND
GND

8
7

6

CT

5
9

+3VA_TBT

+3V_TBT_PWR

1

2

10U_0603_6.3V6M

CT105

HDD, SSD Load Switch

UZ7

1

VIN1

2

VIN1

3

ON1

4

VBIAS

5

ON2

6

VIN2

7

VIN2

EM5209VF_DFN14_3X2

SSD_PWR_EN[16]

X06.18

RUN_ON_EC

SSD_PWR_EN

SSD_PWR_EN

+5VALW

RZ76 0_0402_5%@
RZ75 0_0402_5%@

1 2

RZ74 100K_0402_5%@

1 2
1 2

+5VALW

RUN_ON_EC

+3VALW

+VCCST Load Switch

+1VALW

1

+5VALW

1

12

CZ96

2

SUS_ON_EC_ST[34]

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

C

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

1U_0402_6.3V6K

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2
7
3
4

CZ97@

0.1U_0402_25V6

D

14

VOUT1

13

VOUT1

12

CT1

11

GND

10

CT2

9

VOUT2

8

VOUT2

15

GPAD

UZ15

VIN1
VIN2

VIN thermal
VBIAS
ON

TPS22961DNYR_WSON8

4.4mohm/6A
TR=12.5us@Vin=1.05V

VOUT

GND

X06.18

RZ34

0_0805_5%

1 2

@

1 2

CZ37 470P_0603_50V7K

1 2

CZ39 470P_0603_50V7K

1 2

@

0_0805_5%
RZ36

X06.18

6

5

0_0603_5%

1 2

1

CZ28

0.1U_0402_10V7K

2

Title

Title

Title

SYS DC/DC Interface

SYS DC/DC Interface

SYS DC/DC Interface

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

+5VS_HDD

+3.3VDX_SSD

+VCCST

RZ66

@

X06.18

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

LA-C361P

LA-C361P

LA-C361P

E

+5VS_HDD

1

CZ45

0.1U_0402_10V7K

2

1

CZ46

0.1U_0402_10V7K

2

33 71Thursday, August 06, 2015

33 71Thursday, August 06, 2015

33 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

+3V_PCH

5

UZ20

RUN_ON_EC[33,48]
SIO_SLP_S3#[18,37,48,52]

IMVP_VR_ON[48]

H_VCCST_PWRGD_EC[48]

MC74VHC1G08DFT2G_SC70-5

SIO_SLP_S0#[18,42,52]

SUS_ON_EC[33,48]

SIO_SLP_S4#[18,48,52]

SIO_SLP_S5#[18,48,52]

SIO_SLP_S3#

SIO_SLP_S0#

D D

C C

B B

A A

SIO_SLP_S3#

SIO_SLP_S0#

1
2

MC74VHC1G08DFT2G_SC70-5

SIO_SLP_S0#

SIO_SLP_S3#

5

1

VCC

IN1

4

OUT

2

IN2

GND

3

1 2

RZ59 0_0402_5%@

+3V_PCH

5

UZ21

VCC

IN1

4

OUT

IN2

GND

3

1 2

RZ61 0_0402_5%@

100K_0402_5%

+3VALW

5

1

VCC

IN1

2

IN2

GND

3

MC74VHC1G08DFT2G_SC70-5

DZ1

2

1

3

BAT54AW-7-F_SOT323-3

@

1 2

RZ89 0_0402_5%

@

+3V_PCH

12

RZ84
100K_0402_5%

1 2

RZ81 0_0402_5%@

100K_0402_5%

RZ86

UZ22

4

OUT

X06.18

RZ85

12

@

12

@

SUS_ON_EC_P

100K_0402_5%

RZ58 0_0402_5%@

MC74VHC1G08DFT2G_SC70-5

RZ60 0_0402_5%@

MC74VHC1G08DFT2G_SC70-5

12

RZ87

1 2

+3V_PCH

5

1

VCC

IN1

2

IN2

GND

3

@

1 2

+3V_PCH

5

1

VCC

IN1

OUT

2

IN2

GND

3

@

SUS_ON_EC_P [59]

PCH_ALW_ON[33,48,58]

MC74VHC1G08DFT2G_SC70-5

1 2

RZ82 0_0402_5%@

+3V_PCH

5

1

B

2

A

3

4

X06.18

UZ11

4

OUT

12

RZ50
100K_0402_5%

X06.18

UZ12

4

12

RZ71
100K_0402_5%

+3VALW

5

UZ18

1

VCC

IN1

4

OUT

2

IN2

GND

3

@

UZ19

4

VCC

Y

G

MC74VHC1G09DFT2G_SC70-5

4

3

+2.5V_MEM

RUN_ON_P

RUN_ON_P [59,61]

VR_ON [64]

1 2

RZ91 0_0402_5%@

+3VALW

5

UZ23

1

IN1

VCC

OUT

2

IN2

GND

3

MC74VHC1G08DFT2G_SC70-5

@

SUS_ON_P SUS_ON_P

12

RZ80

@

100K_0402_5%

X06.18

4

12

@

SUS_ON_EC_ST [33]

RZ88
100K_0402_5%

X06.03

X06.04

H_VCCST_PWRGD [6,9]

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

DDR4 VPP Load Switch

X06.18

RZ53

0_0603_5%

1 2

@

12

CZ53

1U_0603_10V6K

+VCCSTG Load Switch

+VCCPLL_OC Load Switch

X06.18

+5VALW

RUN_ON_P

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

1 2

RZ90 0_0402_5%@

1 2

RZ72 0_0402_5%@

2

+2.5VS_G9141

12

RZ54

@

30.1K_0402_1%

VSET

12

RZ52

@

19.6K_0402_1%

+5VALW

0.1U_0402_10V7K

1U_0402_6.3V6K

1

12

CZ88

2

RUN_ON_P

+1.2V_DDR

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

+1VALW

@

CZ86

5

OUT

4

SET

G9090-250T11U_SOT23-5

UZ9

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

TPS22961DNYR_WSON8

4.4mohm/6A
TR=12.5us@Vin=1.05V

UZ16

1

VIN

2

VIN

3

EN

4

VBIAS

APE8937GN2_DFN8_2X2

1

+5VALW

SUS_ON_EC_P

CZ82 0.1U_0402_10V7K@

RZ67
0_0603_5%

1 2

@

1 2

@

2200P_0402_25V7K

12

CZ54
1U_0603_10V6K

1 2

+VCCSTG

+1.2V_VCCPLL_OC

1

2

VOUT

SHDN

GND

VOUT
VOUT

UZ10

1

IN

2

GND

3

+VCCSTG

X06.18

12

RZ48

@

0_0603_5%

6

5

X06.18

8
7

6

CT

GND
GND

CZ57

5
9

X06.02

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

EC ENE-KB9012/ KC3810

EC ENE-KB9012/ KC3810

EC ENE-KB9012/ KC3810
LA-C361P

LA-C361P

LA-C361P

1

CZ47

0.1U_0402_10V7K

+1.2V_VCCPLL_OC

1

CZ49

0.1U_0402_10V7K

2

34 71Thursday, August 06, 2015

34 71Thursday, August 06, 2015

34 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

LCD backlight PWR CTRL

4

3

2

1

eDP & TS Conn.

D

6
2

1

1

0.1U_0402_25V6

2

DMG2301U-7_SOT23-3

S

3.3V_CAM_EN#

CV169

G

QZ9

2

+INV_PWR_SRC

D

13

3.3V_CAM_EN#

60mil

DV12

1

V I/O
Ground2V BUS

3

V I/O

IP4223CZ6_SO6-6

EMC@

0_0603_5%

1 2

RZ38 100K_0402_5%@

V I/O

V I/O

RZ37

@

X06.21

1 2

6
5
4

+3VS_CAM +3VS_CAM+3VS

3.3V_CAM_EN# [19]

DV1

PANEL_BKEN_EC[49]

PANEL_BKEN_PCH[16]

BIA_PWM_PCH[7,16]

BIA_PWM_EC[48]

1 2

CV158 0.1U_0402_10V7K

EDP_TXP0[7]

EDP_TXN0[7]

+3VS

1

CZ44
1U_0402_6.3V6K

2

+3VS

EDP_TXP1[7]

EDP_TXN1[7]

EDP_TXP2[7]

EDP_TXN2[7]

EDP_TXP3[7]

EDP_TXN3[7]

EDP_AUXN[7]

EDP_AUXP[7]

1 2

CV159 0.1U_0402_10V7K

1 2

CV160 0.1U_0402_10V7K

1 2

CV161 0.1U_0402_10V7K

1 2

CV162 0.1U_0402_10V7K

1 2

CV163 0.1U_0402_10V7K

1 2

CV164 0.1U_0402_10V7K

1 2

CV165 0.1U_0402_10V7K

1 2

CV166 0.1U_0402_10V7K

1 2

CV167 0.1U_0402_10V7K

2

1

3

BAT54CW-7-F_SOT323-3~D

DV2

2

1

3

BAT54CW-7-F_SOT323-3~D

EDP_TXP0_C

EDP_TXP0_C

EDP_TXN0_C

EDP_TXN0_C

EDP_TXP1_C

EDP_TXP1_C

EDP_TXN1_C

EDP_TXN1_C

EDP_TXP2_C

EDP_TXP2_C

EDP_TXN2_C

EDP_TXN2_C

EDP_TXP3_C

EDP_TXP3_C

EDP_TXN3_C

EDP_TXN3_C

EDP_AUXN_C

EDP_AUXN_C

EDP_AUXP_C

EDP_AUXP_C

DISPOFF#

12

RV107
10K_0402_5%

INV_PWM

12

RV109
100K_0402_5%

1 2

RV520 0_0402_5%

@

1 2

RV521 0_0402_5%

@

1 2

RV522 0_0402_5%

@

1 2

RV523 0_0402_5%

@

1 2

RV524 0_0402_5%

@

1 2

RV525 0_0402_5%

@

1 2

RV526 0_0402_5%

@

1 2

RV527 0_0402_5%

@

1 2

RV528 0_0402_5%

@

1 2

RV529 0_0402_5%

@

EDP_TXP0_R

EDP_TXN0_R

EDP_TXP1_R

EDP_TXN1_R

EDP_TXP2_R

EDP_TXN2_R

EDP_TXP3_R

EDP_TXN3_R

EDP_AUXN_R

EDP_AUXP_R

X06.21

B+

QV11
SI3457BDV-T1-E3_TSOP6~D

12

RV119
1M_0402_5%

12

RV120
100K_0402_5%

13

D

QV12
L2N7002WT1G_SC-70-3

S

S

4 5

G

3

USB20_P12_R

USB20_N12_R

1

CZ43

0.1U_0402_10V7K

2

60mil

1

CV184

8.2P_0402_50V8D

2

34

X06.21

12

CV168
1U_0603_25V6

2

EN_INVPWR

EN_INVPWR[48]

G

1

@

CV185
10U_0603_6.3V6M

2

USB20_P12_RUSB20_P12

D D

12

RV135 220K_0402_5%

CCD Conn.

C C

USB20_P12[19]

USB20_N12[19]

USB20_N12 USB20_N12_R

+3VS_CAM

1

2

CV183
.1U_0402_16V7K

EMC@

MCM1012B900F06BP_4P

1 2

LV22

EN_INVPWR

8.2P_0402_50V8D

+3VS_CAM

EDP_HPD[16]

+EDPVDD

10U_0603_6.3V6M

CV157

1

1

CV156

@

2

2

X06.21

39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

EDP_HPD_S

JEDP1

CONNTST40MGND1
LCD_VDD
LCD_VDD
V_EDID
BIST
EDID_CLK
EDID_DATA
LVDS_A0­LVDS_A0+
LVDS_A1­LVDS_A1+
LVDS_A2­LVDS_A2+
GND
LVDS_A_CLK­LVDS_A_CLK+
GND
LVDS_B0­LVDS_B0+
LVDS_B1­LVDS_B1+
LVDS_B2­LVDS_B2+
GND
LCD_B_CLK­LCD_B_CLK+
VR_GND
VR_GND
VR_GND
CONNTST_GND
PWM
DISP_ON/OFF#
NC
VR_SRC
VR_SRC
VR_SRC
BREATH_WHITE_LED
BATT_YELLOW_LED
BATT_WHITE_LED
GND

ACES_59003-04006-001

CONN@

+INV_PWR_SRC

W=60mils

1 2

RV110 0_0402_5%@

LCD_TST[48]

X06.21

USB20_P12_R

USB20_N12_R

CAM_CBL_DET#[16]

+EDPVDD

12

RV114
100K_0402_5%

1 2

RV113 0_0402_5%@

EDP_PANEL_DAT
INV_PWM
DISPOFF#
EDP_HPD_S

W=60mils

EDP_PANEL_CLK

EDP_AUXP_R
EDP_AUXN_R

EDP_TXP0_R
EDP_TXN0_R

EDP_TXP1_R
EDP_TXN1_R

EDP_TXP2_R
EDP_TXN2_R

EDP_TXP3_R
EDP_TXN3_R

+5VS

G

2

13

D

S

@

QV9
L2N7002WT1G_SC-70-3

MGND2
MGND3
MGND4
MGND5
MGND6

41
42
43
44
45
46

B B

+EDPVDD

X06.21

12

0_0402_5%
RV547

VCC
SCL1
SDA1

X06.01

2

@

8
7
6
5

Compal Secret Data

Compal Secret Data

Compal Secret Data

EDP_PANEL_CLK
EDP_PANEL_DAT

Deciphered Date

Deciphered Date

Deciphered Date

UV17

1

NC

DOCK_TNY_SMB_CLK[39,48]

Touch Screen Conn.

+3VS_TS

TOUCH_SCREEN_PD#[17]

EMC@

MCM1012B900F06BP_4P

34

A A

USB20_P9[19]

USB20_N9[19]

1 2

LI1

USB20_P9_R

USB20_N9_R

X06.21

5

4

USB20_P9_R
USB20_N9_R

1 2

DI1 RB751S40T1G_SOD523-2

USB20_P9_R

USB20_N9_R

2

3

DI3

AZ5125-02S.R7G_SOT23-3

@

1

CONN@

ACES_50208-00601-P01

8

GND

7

GND

6

6

5

5

4

4

3

3

2

2

1

1

JTS

3

DOCK_TNY_SMB_DAT[39,48]

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

2

SCL0

3

SDA0
GND4EN

PCA9515BDGKR_VSSOP8

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

12

RV546

@

2.2K_0402_5%

EDP_CTRL_EN_C [48]

@

12

RV545

2.2K_0402_5%

RV549
0_0402_5%

1 2
1 2

@

@

RV548
0_0402_5%

EDP_PANEL_CLK_PCH [20]

EDP_PANEL_DAT_PCH [20]

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

eDP /TS conn.

eDP /TS conn.

eDP /TS conn.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-C361P

LA-C361P

LA-C361P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

35 71Thursday, August 06, 2015

35 71Thursday, August 06, 2015

35 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

HDMI Active Level Shift(ALS type)

4

3

Place between ESD and CM-Choke

2

1

Place close to JHDMI1

TMDS_L_TXCP
TMDS_L_TX2N
TMDS_L_TX2P

TMDS_L_TXCN

150_0402_5%

TMDS_L_TXCP

TMDS_L_TX0N

150_0402_5%

TMDS_L_TX0P

TMDS_L_TX1N

150_0402_5%

TMDS_L_TX1P

TMDS_L_TX2N

150_0402_5%

TMDS_L_TX2P

DV4

@

1

1

2

2

4

4

5
3

3

8

AZ1045-04F_DFN2510P10E-10-9

RV538

EMC@

RV539

EMC@

RV540

EMC@

RV541

EMC@

12

12

12

12

10

9

7

65

TMDS_TXCN

TMDS_TXCP

TMDS_TX0N

TMDS_TX0P

TMDS_TX1N

TMDS_TX1P

TMDS_TX2N

TMDS_TX2P

9

TMDS_L_TXCNTMDS_L_TXCN

8

TMDS_L_TXCP

7

TMDS_L_TX2N TMDS_L_TX0P

6

TMDS_L_TX2P

TMDS_L_TX1P
TMDS_L_TX1N

TMDS_L_TX0N

1 2

RV530 8.2_0402_1%EMC@

1 2

RV531 8.2_0402_1%EMC@

1 2

RV532 8.2_0402_1%EMC@

1 2

RV533 8.2_0402_1%EMC@

1 2

RV534 8.2_0402_1%EMC@

1 2

RV535 8.2_0402_1%EMC@

1 2

RV536 8.2_0402_1%EMC@

1 2

RV537 8.2_0402_1%EMC@

DV5

@

1

1

2
4
5
3

AZ1045-04F_DFN2510P10E-10-9

10

2

9

7

4

65

3

8

9

TMDS_L_TX1P

8

TMDS_L_TX1N

7

TMDS_L_TX0P

6

TMDS_L_TX0N

TMDS_L_TXCN

TMDS_L_TXCP

TMDS_L_TX0N

TMDS_L_TX0P

TMDS_L_TX1N

TMDS_L_TX1P

TMDS_L_TX2N

TMDS_L_TX2P

X06.32

1014: Steg change to 0201 package.

12

TBT_ML3_N[37]
TBT_ML3_P[37]

TBT_ML0_N[37]

D D

C C

B B

TBT_ML0_P[37]
TBT_ML1_N[37]

TBT_ML1_P[37]
TBT_ML2_N[37]

TBT_ML2_P[37]

TB_HDMI_HPLUG[37]

CV170 0.1U_0201_6.3V6K

12

CV171 0.1U_0201_6.3V6K

12

CV172 0.1U_0201_6.3V6K

12

CV173 0.1U_0201_6.3V6K

12

CV174 0.1U_0201_6.3V6K

12

CV175 0.1U_0201_6.3V6K

12

CV176 0.1U_0201_6.3V6K

12

CV177 0.1U_0201_6.3V6K

RV122
1M_0402_5%

1 2

L2N7002WT1G_SC-70-3

TMDS_TXCN
TMDS_TXCP

TMDS_TX0N
TMDS_TX0P

TMDS_TX1N
TMDS_TX1P

TMDS_TX2N
TMDS_TX2P

1 2

RV512 475_0402_1%

1 2

RV513 475_0402_1%

1 2

RV514 475_0402_1%

1 2

RV515 475_0402_1%

1 2

RV516 475_0402_1%

1 2

RV517 475_0402_1%

1 2

RV518 475_0402_1%

1 2

RV519 475_0402_1%

+3VS

12

RV121

10K_0402_5%

1

D

2

QV13

G

L2N7002WT1G_SC-70-3

S

3

+3VS

G

123

HDMI_HPLUG

D

S

QV14

1 2

RV123 20K_0402_5%

HDMI DDC

+VDISPLAY_VCC

+3VS

RV124

2

TBT_DDC_CLK[37]

A A

5

TBT_DDC_DATA[37]

5

QX1B
DMN65D8LDW-7_SOT363-6

61

QX1A
DMN65D8LDW-7_SOT363-6

34

2.2K_0402_5%

DDC_CLK_HDMI

DDC_DAT_HDMI

4

RV125

2.2K_0402_5%

1 2

1 2

For EMI Reserve

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+5VS

1 2

CV180 0.1U_0402_25V6@

1 2

CV181 0.1U_0402_25V6@

1 2

CV182 0.1U_0402_25V6@

close to JHDMI

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

HDMI conn

UV16

1

IN

AP2330W-7_SC59-3

Compal Secret Data

Compal Secret Data

Compal Secret Data

3

OUT

2

GND

HDMI_HPLUG
HDMI_Reserved
HDMI_CEC

Deciphered Date

Deciphered Date

Deciphered Date

2

W=40mils

JHDMI1

1

19

HPD

18

+5V

17

DDC/CEC GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_Shield

10

CK+

9

D0-

8

D0_Shield

7

D0+

6

D1-

5

D1_Shield

4

D1+

3

D2-

2

D2_Shield

1

D2+

ACON_HMRB9-AK120C

CONN@

36 71Thursday, August 06, 2015

36 71Thursday, August 06, 2015

36 71Thursday, August 06, 2015

GND1
GND2
GND3
GND4

20
21
22
23

0.1(X00)

0.1(X00)

0.1(X00)

HDMI_HPLUG

0.1U_0402_10V7K
CV178

1

2

+VDISPLAY_VCC

10U_0603_6.3V6M

DDC_DAT_HDMI

CV179

1

DDC_CLK_HDMI
HDMI_Reserved
HDMI_CEC

2

TMDS_L_TXCN
TMDS_L_TXCP

TMDS_L_TX2N
TMDS_L_TX2P

TMDS_L_TX1N
TMDS_L_TX1P

TMDS_L_TX0N
TMDS_L_TX0P

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

HDMI

HDMI

HDMI

LA-C361P

LA-C361P

LA-C361P

5

4

3

2

1

+3VA_TBT_LC

12

DDI2_DDPC_CTRLCLK[16]
DDI2_DDPC_CTRLDAT[16]

TBT_LSTX[39]

CT2 0.22U_0201_6.3V6M

12

CT4 0.22U_0201_6.3V6M

12

CT6 0.22U_0201_6.3V6M

12

CT8 0.22U_0201_6.3V6M

CLK_PCIE_TBT[17]
CLK_PCIE_TBT#[17]
TBT_CLK_REQ#[17]

12

CT17 0.1U_0201_6.3V6K

12

CT18 0.1U_0201_6.3V6K

12

CT19 0.1U_0201_6.3V6K

12

CT20 0.1U_0201_6.3V6K

12

CT21 0.1U_0201_6.3V6K

12

CT22 0.1U_0201_6.3V6K

12

CT23 0.1U_0201_6.3V6K

12

CT24 0.1U_0201_6.3V6K

12

CT25 0.1U_0201_6.3V6K

12

CT26 0.1U_0201_6.3V6K

DDI1_PCH_HPD

DDI1_DDPB_CTRLCLK[16]
DDI1_DDPB_CTRLDAT[16]

12

CT29 0.1U_0201_6.3V6K

12

CT30 0.1U_0201_6.3V6K

12

CT31 0.1U_0201_6.3V6K

12

CT32 0.1U_0201_6.3V6K

12

CT33 0.1U_0201_6.3V6K

12

CT34 0.1U_0201_6.3V6K

12

CT35 0.1U_0201_6.3V6K

12

CT36 0.1U_0201_6.3V6K

12

CT108 0.1U_0201_6.3V6K

12

CT107 0.1U_0201_6.3V6K

DDI2_PCH_HPD

12

CT37 0.22U_0201_6.3V6M

12

CT38 0.22U_0201_6.3V6M

12

CT39 0.22U_0201_6.3V6M

12

CT40 0.22U_0201_6.3V6M

12

CT41 0.1U_0201_6.3V6K

12

CT42 0.1U_0201_6.3V6K

12

12

12

RT7

RT6

10K_0201_5%

10K_0201_5%

D D

+3V_TBT

1 2

RT107 10K_0201_5%

12

RT8

RT9

10K_0201_5%

10K_0201_5%

TBT_JTAG_TDI

TBT_JTAG_TMS

TBT_JTAG_TCK
TBT_JTAG_TDO

TBT_SRC_CFG1

T196 PAD~D@
T197 PAD~D@
T198 PAD~D@
T199 PAD~D@

PU for support HDMI mode, PD for support DP mode

1 2

RT202 10K_0201_5%@

1 2

RT21 10K_0201_5%@

1 2

RT33 2.2K_0201_5%

1 2

RT34 2.2K_0201_5%

+3VA_TBT

1 2

RT35 2.2K_0201_5%

1 2

RT36 2.2K_0201_5%

1 2

C C

B B

RT22 10K_0201_5%@

1 2

RT23 10K_0201_5%

1 2

RT25 10K_0201_5%

1 2

RT37 100K_0201_5%

1 2

RT38 100K_0201_5%

1 2

RT39 100K_0201_5%

1 2

RT40 100K_0201_5%

1 2

RT41 100K_0201_5%

1 2

RT42 100K_0201_5%

1 2

RT43 100K_0201_5%

1 2

RT44 1M_0201_1%

1 2

RT45 1M_0201_1%

1 2

RT207 100K_0201_5%

1 2

RT208 100K_0201_5%

1 2

RT209 100K_0201_5%

+3VA_TBT_LC

VCC3V3_FLASH

RT242 0_0402_5%

RT243 0_0402_5%@

@

1 2

1 2

TBT_POC_RST#
TBT_CLK_REQ#
TBT_DDC_CLK

TBT_DDC_DATA

TBT_I2C_DATA
TBT_I2C_CLK
TBT_PCIE_WAKE#
TBT_CIO_PLUG_EVENT#
TBT_BATLOW#

TBT_TMU_CLK_OUT
TBT_FORCE_PWR
RTD3_CIO_PWR_EN
RTD3_USB_PWR_EN
DDI1_PCH_HPD
DDI2_PCH_HPD
TBTA_HPD
TBT_LSTX
TBT_LSRX
NC_B4
NC_B5
NC_G2

+3V_TBT_SPI

X06.25

PCIE_PTX_TBRX_P15[16]
PCIE_PTX_TBRX_N15[16]

PCIE_PTX_TBRX_P16[16]
PCIE_PTX_TBRX_N16[16]

DDI1_HTX_TBRX_P0[7]
DDI1_HTX_TBRX_N0[7]

DDI1_HTX_TBRX_P1[7]
DDI1_HTX_TBRX_N1[7]

DDI1_HTX_TBRX_P2[7]
DDI1_HTX_TBRX_N2[7]

DDI1_HTX_TBRX_P3[7]
DDI1_HTX_TBRX_N3[7]

DDI1_CPU_AUXP[7]
DDI1_CPU_AUXN[7]

DDI1_PCH_HPD[16]

DDI2_HTX_TBRX_P0[7]
DDI2_HTX_TBRX_N0[7]

DDI2_HTX_TBRX_P1[7]
DDI2_HTX_TBRX_N1[7]

DDI2_HTX_TBRX_P2[7]
DDI2_HTX_TBRX_N2[7]

DDI2_HTX_TBRX_P3[7]
DDI2_HTX_TBRX_N3[7]

DDI2_CPU_AUXP[7]
DDI2_CPU_AUXN[7]

DDI2_PCH_HPD[16]

TBT_USB3_RX1_P[41]
TBT_USB3_RX1_N[41]

TBT_USB3_TX1_P[41]
TBT_USB3_TX1_N[41]

TBT_USB3_TX0_P[41]
TBT_USB3_TX0_N[41]

TBT_USB3_RX0_P[41]
TBT_USB3_RX0_N[41]

TBTA_AUX_P[39]
TBTA_AUX_N[39]

TBT_USB2_D+[39]
TBT_USB2_D-[39]

TBT_LSRX[39]
TBTA_HPD[39]

X06.25

PCIE_PTX_TBRX_P15_C
PCIE_PTX_TBRX_N15_C

PCIE_PTX_TBRX_P16_C
PCIE_PTX_TBRX_N16_C

DDI1_HTX_TBRX_P0_C
DDI1_HTX_TBRX_N0_C

DDI1_HTX_TBRX_P1_C
DDI1_HTX_TBRX_N1_C

DDI1_HTX_TBRX_P2_C
DDI1_HTX_TBRX_N2_C

DDI1_HTX_TBRX_P3_C
DDI1_HTX_TBRX_N3_C

DDI1_CPU_AUXP_C
DDI1_CPU_AUXN_C

DDI1_DDPB_CTRLCLK
DDI1_DDPB_CTRLDAT

DDI2_HTX_TBRX_P0_C
DDI2_HTX_TBRX_N0_C

DDI2_HTX_TBRX_P1_C
DDI2_HTX_TBRX_N1_C

DDI2_HTX_TBRX_P2_C
DDI2_HTX_TBRX_N2_C

DDI2_HTX_TBRX_P3_C
DDI2_HTX_TBRX_N3_C

DDI2_CPU_AUXP_C
DDI2_CPU_AUXN_C

DDI2_DDPC_CTRLCLK
DDI2_DDPC_CTRLDAT

RT5 14K_0402_1%

TBT_JTAG_TDI
TBT_JTAG_TMS
TBT_JTAG_TCK
TBT_JTAG_TDO

1 2

RT10 4.75K_0402_0.5%

TBT_USB3_TX1_P_C
TBT_USB3_TX1_N_C

TBT_USB3_TX0_P_C
TBT_USB3_TX0_N_C

TBTA_AUX_P_C
TBTA_AUX_N_C

TBT_LSTX
TBT_LSRX
TBTA_HPD

RT12 499_0201_1%

TBT_RBIAS

TBT_RSENSE

12

12

UT1A

Y23

PCIE_RX0_P

Y22

PCIE_RX0_N

T23

PCIE_RX1_P

T22

PCIE_RX1_N

M23

PCIE_RX2_P

M22

PCIE_RX2_N

H23

PCIE_RX3_P

H22

PCIE_RX3_N

V19

PCIE_REFCLK_100_IN_P

T19

PCIE_REFCLK_100_IN_N

AC5

PCIE_CLKREQ_N

AB7

DPSNK0_ML0_P

AC7

DPSNK0_ML0_N

AB9

DPSNK0_ML1_P

AC9

DPSNK0_ML1_N

AB11

DPSNK0_ML2_P

AC11

DPSNK0_ML2_N

AB13

DPSNK0_ML3_P

AC13

DPSNK0_ML3_N

Y11

DPSNK0_AUX_P

W11

DPSNK0_AUX_N

AA2

DPSNK0_HPD

Y5

DPSNK0_DDC_CLK

R4

DPSNK0_DDC_DATA

AB15

DPSNK1_ML0_P

AC15

DPSNK1_ML0_N

AB17

DPSNK1_ML1_P

AC17

DPSNK1_ML1_N

AB19

DPSNK1_ML2_P

AC19

DPSNK1_ML2_N

AB21

DPSNK1_ML3_P

AC21

DPSNK1_ML3_N

Y12

DPSNK1_AUX_P

W12

DPSNK1_AUX_N

Y6

DPSNK1_HPD

Y8

DPSNK1_DDC_CLK

N4

DPSNK1_DDC_DATA

Y18

DPSNK_RBIAS

Y4

TDI

V4

TMS

T4

TCK

W4

TDO

H6

RBIAS

J6

RSENSE

A15

PA_RX1_P

B15

PA_RX1_N

A17

PA_TX1_P

B17

PA_TX1_N

A19

PA_TX0_P

B19

PA_TX0_N

B21

PA_RX0_P

A21

PA_RX0_N

Y15

PA_DPSRC_AUX_P

W15

PA_DPSRC_AUX_N

E20

PA_USB2_D_P

D20

PA_USB2_D_N

A5

PA_LS_G1

A4

PA_LS_G2

M4

PA_LS_G3

H19

PA_USB2_RBIAS

AC23

THERMDA

AB23

THERMDA

V18

PCIE_ATEST

AC1

TEST_EDM

L15

FUSE_VQPS_64

N15

FUSE_VQPS_128

C23

MONDC_CIO_0

C22

MONDC_CIO_1

V23

PERST_N

GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8

TEST_EN

RESET_N

EE_DI

EE_DO

EE_CS_N

EE_CLK

PB_RX1_P

PB_TX1_P
PB_TX1_N

PB_TX0_P
PB_TX0_N

PB_RX0_P

PB_LS_G1
PB_LS_G2
PB_LS_G3

ATEST_P
ATEST_N

PCIE_PRX_TBTX_P15_C

V22

PCIE_PRX_TBTX_N15_C

P23

PCIE_PRX_TBTX_P16_C

P22

PCIE_PRX_TBTX_N16_C

K23
K22

F23
F22

L4

1 2

N16

RT1 3.01K_0402_1%

R2
R1

N2
N1

L2
L1

J2
J1

W19
Y19

G1

TB_HDMI_HPLUG

1 2

N6

RT2 14K_0402_1%

U1

TBT_I2C_DATA

U2

TBT_I2C_CLK

V1

TBT_ROM_WP#

V2

TBT_TMU_CLK_OUT

W1

TBT_PCIE_WAKE#

W2

TBT_CIO_PLUG_EVENT#

Y1

TBT_DDC_DATA

Y2

TBT_DDC_CLK

AA1

TBT_SRC_CFG1

J4

TBTA_I2C_INT#

E2
D4

RTD3_USB_PWR_EN

H4

TBT_FORCE_PWR

F2

TBT_BATLOW#

D2

SIO_SLP_S3#

F1

RTD3_CIO_PWR_EN

E1

TBT_TEST_EN

AB5

TBT_TEST_PWRG

F4

TBT_POC_RST#

D22

XTAL_25_IN

D23

XTAL_25_OUT

AB3

TBT_ROM_DI

AC4

TBT_ROM_DO

AC3

TBT_ROM_CS#

AB4

TBT_ROM_CLK

B7
A7

A9
B9

A11
B11

A13
B13

Y16
W16

E19
D19

B4

NC_B4

B5

NC_B5

G2

NC_G2

F19

RT164 499_0201_1%

D6
A23

B23
E18
W13
W18
AB2

RB751S40T1G_SOD523-2

12

PCIE_TX0_P

PCIE_TX0_N

PCIE_TX1_P

PCIE_TX1_N

PCIE_TX2_P

PCIE_TX2_N

PCIE_TX3_P

SOURCE PORT 0

PCIE_TX3_N

PCIE_RBIAS

DPSRC_ML0_P
DPSRC_ML0_N

DPSRC_ML1_P
DPSRC_ML1_N

DPSRC_ML2_P
DPSRC_ML2_N

DPSRC_ML3_P
DPSRC_ML3_N

DPSRC_AUX_P
DPSRC_AUX_N

DPSRC_HPD

DPSRC_RBIAS

PCIe GEN3

SINK PORT 0

LC GPIOPOC GPIO

POC_GPIO_0
POC_GPIO_1
POC_GPIO_2
POC_GPIO_3
POC_GPIO_4

TEST_PWR_GOOD

Misc

XTAL_25_OUT

PB_DPSRC_AUX_P

PB_DPSRC_AUX_N

PORT B

PB_USB2_D_P
PB_USB2_D_N

POC

PB_USB2_RBIAS

MONDC_DPSNK_0
MONDC_DPSNK_1

MONDC_DPSRC

ALPINE-RIDGE_BGA337

POC_GPIO_5
POC_GPIO_6

XTAL_25_IN

PB_RX1_N

PB_RX0_N

MONDC_SVR

USB2_ATEST

SINK PORT 1

MISC

Port A

TBT PORTS

POC

DEBUG

12

CT1 0.22U_0201_6.3V6M

12

CT3 0.22U_0201_6.3V6M

12

CT5 0.22U_0201_6.3V6M

12

CT7 0.22U_0201_6.3V6M

X06.25

T195
PAD~D

PCH_PLTRST#_EC [17,23,42,43,44,48,51]

TBT_ML0_P [36]

TBT_ML0_N [36]

TBT_ML1_P [36]

TBT_ML1_N [36]

TBT_ML2_P [36]

TBT_ML2_N [36]

TBT_ML3_P [36]

TBT_ML3_N [36]

@

12

RT3100_0201_1%

12

RT4100_0201_1%

12

DT29

@

12

RT2440_0402_5% @

X06.25

CT44

10P_0402_25V8J

PCIE_PRX_TBTX_P15 [16]

PCIE_PRX_TBTX_N15 [16]

PCIE_PRX_TBTX_P16 [16]

PCIE_PRX_TBTX_N16 [16]

TBT_I2C_DATA [39]
TBT_I2C_CLK [39]

TBT_PCIE_WAKE# [48]
TBT_CIO_PLUG_EVENT# [16]

TBT_DDC_DATA [36]

TBT_DDC_CLK [36]

TBTA_I2C_INT# [39]

TBT_FORCE_PWR [17]

SIO_SLP_S3# [18,34,48,52]

RTD3_CIO_PWR_EN [17]

TBTA_RESET_N [39]
UPD_MRESET [39,48]

1

1

CT43
10P_0402_25V8J

2

2

TB_HDMI_HPLUG [36]

X06.25

YT1

1

XTAL0

3

XTAL1

25MHZ_10PF_7V25000014

GND0
GND1

2
4

1
2
3
4

+3V_TBT_SPI

TBT_ROM_CS#
TBT_ROM_DO
TBT_ROM_WP#

12

12

12

RT17

RT16

RT18

3.3K_0201_1%

3.3K_0201_1%

3.3K_0201_1%

TBT_ROM_DI
TBT_ROM_DO
TBT_ROM_CS#
TBT_ROM_CLK

1 2

RT228 0_0201_5%@

1 2

RT229 0_0201_5%@

1 2

RT230 0_0201_5%@

1 2

RT231 0_0201_5%@

TBT_ROM_DI_R [39]
TBT_ROM_DO_R [39]
TBT_ROM_CS#_R [39]
TBT_ROM_CLK_R [39]

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2014/01/20 2012/07/25

2014/01/20 2012/07/25

2014/01/20 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

AR_TBT (1/2) DP / PCIE

AR_TBT (1/2) DP / PCIE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

AR_TBT (1/2) DP / PCIE

LA-C361P

LA-C361P

LA-C361P

1

37 71Thursday, August 06, 2015

37 71Thursday, August 06, 2015

37 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

+3V_TBT_SPI

12

RT15

A A

3.3K_0201_1%

CT47

TBT_ROM_HOLD#

TBT_ROM_CLK
TBT_ROM_DI

0.1U_0201_6.3V6K

1

2

5

8

VCC

7

HOLD#(IO3)

6

CLK

5

DI(IO0)

W25Q80DVSSIG_SO8

DO(IO1)

WP#(IO2)

GND

UT2

CS#

5

+VCC0V9_DP

1

1

CT63

CT62

2

2

1U_0201_6.3V6M

D D

C C

B B

1U_0201_6.3V6M

+VCC0V9_PCIE

1

CT80

2

1U_0201_6.3V6M

+VCC0V9_CIO

1

CT101

2

1U_0201_6.3V6M

1

CT71

2

1U_0201_6.3V6M

1

CT102

2

1U_0201_6.3V6M

1

1

CT64

2

1U_0201_6.3V6M

1

CT72

2

1U_0201_6.3V6M

1

CT103

2

1U_0201_6.3V6M

1

CT65

CT66

2

2

1U_0201_6.3V6M

1U_0201_6.3V6M

1

1

CT81

CT82

2

2

1U_0201_6.3V6M

1U_0201_6.3V6M

1

CT67

2

1U_0201_6.3V6M

+VCC0V9_USB

CT93

1U_0201_6.3V6M

+3V_TBT_S0

1

CT163

2

1U_0201_6.3V6M

1

CT68

2

1U_0201_6.3V6M

1

1

CT94

2

2

1U_0201_6.3V6M

1

1

CT164

CT165

2

2

47U_0603_6.3V6M

47U_0603_6.3V6M

X06.08

+3V_TBT

+3VALW

+3V_TBT

LT14

1 2

LQM18PN1R0MFHD_2P

4

RT46 0_0603_5%@

RT113 0_0603_5%@

RT241 0_0603_5%@

3

+3VA_TBT

12

12

+3V_TBT+3VS

12

+VCC0V9_PCIE

+VCC0V9_DP

X06.25

+VCC0V9_USB

+VCC0V9_CIO

VCC_3V3_PCIE

VCC_3V3_USB2

1

1

CT99

CT100

2

2

1U_0201_6.3V6M

1U_0201_6.3V6M

+3VA_TBT_LC

CT50

UT1B

L8

VCC0P9_DP

L11

VCC0P9_DP

L12

VCC0P9_DP

M8

VCC0P9_DP

T11

VCC0P9_DP

T12

VCC0P9_DP

L6

VCC0P9_ANA_DPSRC

M6

VCC0P9_ANA_DPSRC

V11

VCC0P9_ANA_DPSNK

V12

VCC0P9_ANA_DPSNK

V13

VCC0P9_ANA_DPSNK

M13

VCC0P9_PCIE

M15

VCC0P9_PCIE

M16

VCC0P9_PCIE

L19

VCC0P9_ANA_PCIE_1

N19

VCC0P9_ANA_PCIE_1

L18

VCC0P9_ANA_PCIE_2

M18

VCC0P9_ANA_PCIE_2

N18

VCC0P9_ANA_PCIE_2

R15

VCC0P9_USB

R16

VCC0P9_USB

R8

VCC0P9_CIO

R9

VCC0P9_CIO

R11

VCC0P9_CIO

R12

VCC0P9_CIO

L16

VCC3P3_ANA_PCIE

J16

VCC3P3_ANA_USB2

A6

VSS_ANA

A8

VSS_ANA

A10

VSS_ANA

A12

VSS_ANA

A14

VSS_ANA

A16

VSS_ANA

A18

VSS_ANA

A20

VSS_ANA

A22

VSS_ANA

B6

VSS_ANA

B8

VSS_ANA

B10

VSS_ANA

B12

VSS_ANA

B14

VSS_ANA

B16

VSS_ANA

B18

VSS_ANA

B20

VSS_ANA

B22

VSS_ANA

D8

VSS_ANA

D9

VSS_ANA

D11

VSS_ANA

D12

VSS_ANA

D13

VSS_ANA

D15

VSS_ANA

D16

VSS_ANA

D18

VSS_ANA

E8

VSS_ANA

E9

VSS_ANA

E11

VSS_ANA

E15

VSS_ANA

E16

VSS_ANA

E22

VSS_ANA

E23

VSS_ANA

F9

VSS_ANA

F16

VSS_ANA

F20

VSS_ANA

G22

VSS_ANA

G23

VSS_ANA

H1

VSS_ANA

H2

VSS_ANA

H12

VSS_ANA

H13

VSS_ANA

H15

VSS_ANA

H16

VSS_ANA

H20

VSS_ANA

J5

VSS_ANA

J18

VSS_ANA

J19

VSS_ANA

J20

VSS_ANA

J22

VSS_ANA

J23

VSS_ANA

K1

VSS_ANA

K2

VSS_ANA

L5

VSS_ANA

L20

VSS_ANA

L22

VSS_ANA

L23

VSS_ANA

M1

VSS_ANA

M2

VSS_ANA

M5

VSS_ANA

M19

VSS_ANA

M20

VSS_ANA

N5

VSS_ANA

N20

VSS_ANA

N22

VSS_ANA

N23

VSS_ANA

1U_0201_6.3V6M

+3VA_TBT

+3V_TBT_S0

1

1

CT143

2

2

1U_0201_6.3V6M

F8

R6

R13

H9

VCC3P3_SVR
VCC3P3_SVR
VCC3P3_SVR

VCC3P3A

VCC3P3_LC

VCC3P3_S0

VCC3P3_SX

VCC0P9_SVR

VCC0P9_SVR
VCC0P9_SVR_ANA
VCC0P9_SVR_ANA
VCC0P9_SVR_ANA
VCC0P9_SVR_ANA
VCC0P9_SVR_ANA
VCC0P9_SVR_ANA

VCC0P9_SVR_SENSE

VCC0P9_LVR
VCC0P9_LVR
VCC0P9_LVR

VCC0P9_LVR_SENSE

GND VCC

VSS_ANAP1VSS_ANAP2VSS_ANAR5VSS_ANA

VSS_ANA

VSS_ANA

VSS_ANA

VSS_ANA

VSS_ANAT1VSS_ANAT2VSS_ANAT5VSS_ANA

VSS_ANA

VSS_ANA

R18

T20

R19

R20

R22

R23

U23

U22

CT52

1U_0201_6.3V6M

A2
A3
B3

L9
M9
E12
E13
F11
F12
F13
F15
J9

C1

SVR_IND

C2

SVR_IND

D1

SVR_IND

A1

SVR_VSS

B1

SVR_VSS

B2

SVR_VSS

F18
H18
J11
H11

V5

VSS_ANA

V6

VSS_ANA

V8

VSS_ANA

V9

VSS_ANA

V15

VSS_ANA

V16

VSS_ANA

V20

VSS_ANA

W5

VSS_ANA

W6

VSS_ANA

W8

VSS_ANA

W9

VSS_ANA

W20

VSS_ANA

W22

VSS_ANA

W23

VSS_ANA

Y9

VSS_ANA

Y13

VSS_ANA

Y20

VSS_ANA

AA22

VSS_ANA

AA23

VSS_ANA

AB6

VSS_ANA

AB8

VSS_ANA

AB10

VSS_ANA

AB12

VSS_ANA

AB14

VSS_ANA

AB16

VSS_ANA

AB18

VSS_ANA

AB20

VSS_ANA

AB22

VSS_ANA

AC6

VSS_ANA

AC8

VSS_ANA

AC10

VSS_ANA

AC12

VSS_ANA

AC14

VSS_ANA

AC16

VSS_ANA

AC18

VSS_ANA

AC20

VSS_ANA

AC22

VSS_ANA

D5

VSS

E4

VSS

E5

VSS

E6

VSS

F5

VSS

F6

VSS

H5

VSS

H8

VSS

J8

VSS

J12

VSS

J13

VSS

J15

VSS

L13

VSS

M11

VSS

M12

VSS

N8

VSS

N9

VSS

N11

VSS

N12

VSS

N13

VSS

T6

VSS

T8

VSS

T9

VSS

T13

VSS

T15

VSS

T16

VSS

T18

VSS

AB1

VSS

AC2

VSS

ALPINE-RIDGE_BGA337

1

2

2

1

1

CT55

CT54

CT53

VCC0V9_SVR

TBT_SVR_IND

VCC0V9_LVR_OUT

2

2

10U_0402_6.3V6M

CT142

1U_0201_6.3V6M

0.6uH, 5A, 20m ohm by TB CRB

LT1 0.6UH_XFL4012-601MEC_20%

10U_0402_6.3V6M

1

CT141

2

1U_0201_6.3V6M

1 2

10U_0402_6.3V6M

1

1

CT83

2

2

1U_0201_6.3V6M

CT95

10U_0402_6.3V6M

1

+3V_TBT

1

1

CT56

2

2

10U_0402_6.3V6M

1

1

CT74

CT84

2

2

1U_0201_6.3V6M

1U_0201_6.3V6M

1

CT88

2

47U_0603_6.3V6M

1

1

CT96

2

2

10U_0402_6.3V6M

1

1

CT86

CT85

2

2

1U_0201_6.3V6M

1U_0201_6.3V6M

1

1

CT89

CT90

2

2

47U_0603_6.3V6M

47U_0603_6.3V6M

X06.08

1

1

CT97

CT98

2

2

10U_0402_6.3V6M

10U_0402_6.3V6M

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2014/01/20 2012/07/25

2014/01/20 2012/07/25

2014/01/20 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

AR_TBT (2/2) PWR / GND

AR_TBT (2/2) PWR / GND

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

AR_TBT (2/2) PWR / GND

LA-C361P

LA-C361P

LA-C361P

1

38 71Thursday, August 06, 2015

38 71Thursday, August 06, 2015

38 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

4

3

2

1

+5VALW

1 2

RT165 0_0805_5%@

VCC5V0_SYS

X06.23

D D

+3VA_TBT

1 2

RT167 10K_0201_5%

VCC3V3_FLASH

1 2

RT168 3.3K_0201_1%

1 2

RT169 3.3K_0201_1%

1 2

RT170 3.3K_0201_1%

1 2

RT171 3.3K_0201_1%

C C

TBT_LSTX[37]

TBT_LSRX[37]

TBT_LSTX
TBT_LSRX

X06.23

B B

TBT_LSTX
TBT_LSRX

DOCK_TNY_SMB_CLK[35,48]
DOCK_TNY_SMB_DAT[35,48]

TBTA_I2C_INT#

X06.23

VCC3V3_FLASH

RT233 0_0201_5%@
RT232 0_0201_5%@

PD_EE_CS#
PD_EE_DO
PD_EE_WP#
PD_HOLD#

VCC5V0_SYS TBTA_LDO_BMC

1 2
1 2

1

CT147
22U_0603_6.3V6M

2

+3V_VC

1 2

RT184 0_0402_5%@

1 2

RT185 0_0402_5%@

100K_0201_5%

1 2

TBT_I2C_DATA[37]

PD_I2C_ALERT#[48]

TBT_USB2_D+[37]
TBT_USB2_D-[37]

TBTA_AUX_P[37]
TBTA_AUX_N[37]

RT187

1

CT148
22U_0603_6.3V6M

2

PP_HV

VCC5V0_SYS

TBT_I2C_CLK[37]

TBTA_I2C_INT#[37]

X06.23

RT226 10K_0201_5%
RT227 10K_0201_5%

100K_0201_5%

1 2

T193PAD~D@
T194PAD~D@

1 2
1 2

RT188

UPD_SMBDAT
UPD_SMBCLK

PD_EE_CLK
PD_EE_DI
PD_EE_DO
PD_EE_CS#

TBTA_DEBUG1
TBTA_DEBUG2

TBTA_DEBUG3_LSTX
TBTA_DEBUG4_LSRX

X06.23

1

CT149
22U_0603_6.3V6M

2

UT4

A6
A7
A8
B7

A11
C11
B11
D11

H10

B1

H1

D1
D2
C1

A5
B5
B6

A3
B4
A4
B3

L5
K5

J1
J2

G4

F4

E2
F2

L4
K4

E4

D5

L2
K2

L3
K3

F1

0_0402_5%

12

RT190

@

PP_HV
PP_HV
PP_HV
PP_HV

PP_5V0
PP_5V0
PP_5V0
PP_5V0

PP_CABLE
VDDIO
VIN_3V3

I2C_SDA1
I2C_SCL1
I2C_IRQ1_N

I2C_SDA2
I2C_SCL2
I2C_IRQ2_N

SPI_CLK
SPI_MOSI
SPI_MISO
SPI_SS_N

USB_RP_P
USB_RP_N

AUX_P
AUX_N

SWD_CLK
SWD_DATA

UART_TX
UART_RX

LSTX/R2P
LSRX/P2R

DEBUG_CTL1
DEBUG_CTL2

DEBUG1
DEBUG2

DEBUG3
DEBUG4

I2C_ADDR

GND

A1

1

CT150
22U_0603_6.3V6M

2

X06.35

B10

SENSEP

A10

SENSEN

B9

HV_GATE1

A9

HV_GATE2

H11

VBUS

J10

VBUS

J11

VBUS

K11

VBUS

H2

VOUT_3V3

G1

LDO_3V3

K1

LDO_1V8A

A2

LDO_1V8D

E1

LDO_BMC

L9

C_CC1

L10

C_CC2

K9

RPD_G1

K10

RPD_G2

K6

C_USB_TP

L6

C_USB_TN

K7

C_USB_BP

L7

C_USB_BN

K8

C_SBU1

L8

C_SBU2

B2

GPIO0

C2

GPIO1

D10

GPIO2

G11

GPIO3

C10

GPIO4

E10

GPIO5

G10

GPIO6

D7

GPIO7

H6

GPIO8

E11

MRESET

F11

RESET_N

F10

BUSPOWER_N

G2

R_OSC

H7

TPS65982_BGA96

0.22U_0402_10V6K

SS

CT158

GND

GND

GND

GND

D6

GND

GNDE5GND

E6

GND

GNDH4GND

F5

E7

E8

B8

D8

H5

G5

GND

GND

GNDF6GNDF7GND

GND

GNDG7GND

GNDL1GND

F8

H8

G6

G8

L11

PD_SENSEP [55]
PD_SENSEN [55]

T191 PAD~D @
T192 PAD~D @

VCC3V3_TBT_SX
VCC3V3_FLASH
VCC1V8A_TBTA_LDO
VCC1V8D_TBTA_LDO
TBTA_LDO_BMC

CT160 220P_0402_50V7K

CT159 220P_0402_50V7K

TBTA_PD_SBU1
TBTA_PD_SBU2

RT176 0_0402_5%@
RT177 0_0402_5%@

RT178 0_0402_5%@

RT181 0_0402_5%@
RT198 0_0402_5%@

RT182 0_0402_5%@
RT183 0_0402_5%

1 2

RT245 0_0201_5%@

1 2

RT186 100K_0201_5%

TBTA_RESET_N [37]

15K_0402_1%

12

RT191

1

2

@

TBTA_VBUS_L

1 2

1 2

TBTA_USB2_D_P_R [41]

TBTA_USB2_D_N_R [41]

TBTA_I2C_D_P [41]

TBTA_I2C_D_N [41]

1 2
1 2

1 2

1 2
1 2

1 2
1 2

@

RT189 0_0402_5%@
RT246 0_0402_5%@

RT199

0_0402_5%

12

+3V_VC

1

CT161
1U_0201_6.3V6M

2

12

CT157
1U_0603_25V6

1 2
1 2

1

2

LT11

1 2

HCB2012KF-121T50_2P

TBTA_CC1 [41]
TBTA_CC2 [41]

TBTA_SBU1 [41]
TBTA_SBU2 [41]

EN_PD_HV [55]
PWR_SRC_ON_PC [55]

TBTA_HPD [37]

PWR_SRC_ILIMIT [55]

PWR_BTN_DOCK1#

UPD_MRESET [37,48]

X06.23

CT144
1U_0201_6.3V6M

EMC@

T185 PAD~D @

T187 PAD~D @
T200 PAD~D @

VCC3V3_FLASH
VCC1V8A_TBTA_LDO

VCC3V3_TBT_SX

2

3

AZ4024-02S_SOT23-3~D

EMC@

1

1

2

+VBUS_1

VCC3V3_FLASH VCC1V8A_TBTA_LDO VCC1V8D_TBTA_LDO

CT145
1U_0201_6.3V6M

DT10

1

CT146
10U_0402_6.3V6M

2

X06.23

PP_HV

1

CT151
1U_0201_6.3V6M

2

1

CT155

4.7U_0603_25V6K

2

+VBUS_1

1

CT152
1U_0201_6.3V6M

2

12

CT153
1U_0603_25V6

12

+3VA_TBT

G

2

13

1 2

RT195 0_0402_5%@

D

S

QV89
L2N7002WT1G_SC-70-3

Title

Title

Title

PCH (7/8) PWR

PCH (7/8) PWR

PCH (7/8) PWR

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-C361P

LA-C361P

LA-C361P

Date: Sheet of

Date: Sheet of

Date: Sheet of

PWR_TB_DOCK# [48]

X06.23

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

0.1(X00)

0.1(X00)

39 71Thursday, August 06, 2015

39 71Thursday, August 06, 2015

39 71Thursday, August 06, 2015

0.1(X00)

VCC3V3_FLASH

+3VA_TBT

1 2

PD_EE_CS#
PD_EE_DO
PD_EE_WP#

RT210 0_0201_5%@

1 2

RT211 0_0201_5%@

1 2

RT212 0_0201_5%@

1 2

RT213 0_0201_5%@

3

TBT_ROM_CLK_R[37]
TBT_ROM_DI_R[37]

DO/IO1

/WP/IO2

W25Q32FVSSIQ_SO8

TBT_ROM_DO_R[37]
TBT_ROM_CS#_R[37]

UT5

1

/CS

2
3
4

GND

12

12

RT192

RT193

@

3.3K_0201_1%

2

UPD_GPU_SMBDAT[23,48]

A A

UPD_GPU_SMBCLK[23,48]

5

QT1B
DMN65D8LDW-7_SOT363-6

RT201 0_0402_5%@

QT1A
DMN65D8LDW-7_SOT363-6

1 2

RT200 0_0402_5%@

5

34

@

1 2

@

@

3.3K_0201_1%

61

UPD_SMBDAT

X06.23

UPD_SMBCLK

VCC3V3_FLASH

PD_HOLD#
PD_EE_CLK
PD_EE_DI

8
7
6
5

VCC
/HOLD/IO3
CLK
DI/IO0

X06.23

4

PD_EE_CLK
PD_EE_DI
PD_EE_DO
PD_EE_CS#

RT194

100K_0402_5%

PWR_BTN_DOCK1#

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

5

4

3

2

1

D D

CMMI21T-900Y-N_4P

TBTA_I2C_D_N[39]

TBTA_I2C_D_P[39]

TBTA_USB2_D_P_R[39]

TBTA_USB2_D_N_R[39]

C C

B B

4

4

1

1

LT13

CMMI21T-900Y-N_4P

4

4

1

1

LT12

+VBUS_1

12

DT28
RB751S40T1G_SOD523-2

3

3

2

2

3

3

2

2

TBTA_I2C_C_N

TBTA_I2C_C_P

TBTA_USB2_D_P_C

TBTA_USB2_D_N_C

X06.24

TBT_USB3_TX0_P

TBT_USB3_TX0_N

TBTA_CC1

TBTA_USB2_D_P_C

TBTA_USB2_D_N_C

TBTA_SBU1

TBT_USB3_RX1_N

TBT_USB3_RX1_P

TBT_USB3_TX0_P[37]
TBT_USB3_TX0_N[37]

TBT_USB3_RX1_N[37]
TBT_USB3_RX1_P[37]

1 2

DT12 ESD108-B1-CSP0201_WLL-2-1-2

DT13 ESD108-B1-CSP0201_WLL-2-1-2

DT14 ESD108-B1-CSP0201_WLL-2-1-2

DT15 ESD108-B1-CSP0201_WLL-2-1-2

DT16 ESD108-B1-CSP0201_WLL-2-1-2

DT17 ESD108-B1-CSP0201_WLL-2-1-2

DT18 ESD108-B1-CSP0201_WLL-2-1-2

DT19 ESD108-B1-CSP0201_WLL-2-1-2

TBTA_USB2_D_P_C
TBTA_USB2_D_N_C

TBTA_SBU1[39]

EMC@

1 2

EMC@

1 2

EMC@

1 2

EMC@

1 2

EMC@

1 2

EMC@

1 2

EMC@

1 2

EMC@

TBT_USB3_TX0_P TBT_USB3_RX0_P
TBT_USB3_TX0_N

1 2

CT120 0.47U_0402_25V6K

TBTA_CC1

TBTA_SBU1

1 2

CT121 0.47U_0402_25V6K

TBT_USB3_RX1_N
TBT_USB3_RX1_P

JUSBC1

A1

GND

A2

SSTXP1

A3

SSTXN1

A4

VBUS

A5

CC1

A6

DP1

A7

DN1

A8

RFU1

A9

VBUS

A10

SSRXN2

A11

SSRXP2

A12

GND

1

GND

2

GND

JAE_DX07S024XJ2

CONN@

TBT_USB3_RX0_P

TBT_USB3_RX0_N

TBTA_SBU2

TBTA_I2C_C_N

TBTA_I2C_C_P

TBTA_CC2

TBT_USB3_TX1_N

TBT_USB3_TX1_P

+VBUS_1+VBUS_1

B12

GND

B11

SSRXP1

B10
B9
B8
B7

B6
B5
B4
B3

B2
B1

4
3

TBT_USB3_RX0_N

1 2

CT122 0.47U_0402_25V6K

TBTA_SBU2
TBTA_I2C_C_N

TBTA_I2C_C_P
TBTA_CC2

1 2

CT123 0.47U_0402_25V6K

TBT_USB3_TX1_N
TBT_USB3_TX1_P

SSRXN1

VBUS
RFU2

DN2
DP2

CC2

VBUS

TOP

SSTXN2

Bottom

SSTXP2

GND

GND
GND

1 2

DT20 ESD108-B1-CSP0201_WLL-2-1-2

DT21 ESD108-B1-CSP0201_WLL-2-1-2

DT22 ESD108-B1-CSP0201_WLL-2-1-2

DT23 ESD108-B1-CSP0201_WLL-2-1-2

DT24 ESD108-B1-CSP0201_WLL-2-1-2

DT25 ESD108-B1-CSP0201_WLL-2-1-2

DT26 ESD108-B1-CSP0201_WLL-2-1-2

DT27 ESD108-B1-CSP0201_WLL-2-1-2

TBT_USB3_RX0_P [37]
TBT_USB3_RX0_N [37]

TBTA_SBU2 [39]TBTA_CC1[39]

TBTA_CC2 [39]

TBT_USB3_TX1_N [37]
TBT_USB3_TX1_P [37]

1 2

1 2

1 2

1 2

1 2

1 2

1 2

EMC@

EMC@

EMC@

EMC@

EMC@

EMC@

EMC@

EMC@

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2014/01/20 2012/07/25

2014/01/20 2012/07/25

2014/01/20 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

PD USB TYPE-C

PD USB TYPE-C

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

PD USB TYPE-C

LA-C361P

LA-C361P

LA-C361P

41 71Thursday, August 06, 2015

41 71Thursday, August 06, 2015

1

41 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

Power Button and LED

D D

PWRBTN_LED#[48]

LED6

HT-F196BP5_WHITE

4

+5VALW

12

RE3
300_0402_5%

21

3

PWM FAN

2

+3VS +5VS +5VS

12

RE81
100K_0402_5%

FAN1_TACH[48]

DE7 RB751S40T1G_SOD523-2

1

CE66

0.01U_0402_16V7K

2

12

RE82

10K_0402_5%

12

RE104 0_0603_5%@

1 2

X06.29

FAN1_PWM[48]

1

+3VS

12

5VS_FAN1

RE100

10K_0402_5%

JFAN1

1

1

2

2

3

3

4

4

5

G1

6

G2

ACES_50224-00401-001

CONN@

+3VS +5VS +5VS

SW1

4

2

SKRBAAE010_4P

C C

Touch pad

+5VALW

1 2

RZ32 100K_0402_5%

B B

A A

I2C1_SDA_TP[20]

I2C1_SCK_TP[20]

PTP_INT#[17,48]

DAT_TP_SIO[48]

CLK_TP_SIO[48]

TP_PW_EN[49]

CE78

22P_0402_50V8J

5

+3VALW

TP_PW_EN

TP_PW_EN

2

6 1

DMN65D8LDW-7_SOT363-6

DMN65D8LDW-7_SOT363-6

PTP_DIS#[49]

1

1

2

2

@

@

3

1

UE6

1

VIN

2

VIN

3

EN

4

VBIAS

APE8937GN2_DFN8_2X2

+3VS_TP

QE2A

5

3 4

QE2B

DMN65D8LDW-7_SOT363-6

+3VS_TP +3VS_TP

2

G

1 3

PTP_INT#_R

D

S

QE13
L2N7002WT1G_SC-70-3

CE77
22P_0402_50V8J

PTP_INT#_R

EMC@

DE4

I2C1_SDA_TP_C
I2C1_SCK_TP_C

PESD5V0U2BT_SOT23-3

3

1

2

1

VOUT
VOUT

CT

GND
GND

DMN65D8LDW-7_SOT363-6

12

2

PBTN_SW# [48,52]

3

DE2
AZ5125-02S.R7G_SOT23-3

EMC@

8
7

6
5

9

+3V_PCH

2

5

34

QE19B

RE87
100K_0402_5%

PESD5V0U2BT_SOT23-3

2

3

DE5

EMC@

1

QE19A

X06.29

1 2

RE93 0_0603_5%

CE65

1 2

@

2200P_0402_25V7K

RE7

1 2

61

22P_0402_50V8J

4

1 2

CE80

1

@

2

I2C1_SDA_TP_C

RE9

+3VS_TP

CE79

22P_0402_50V8J

1

@

2

@

2.4K_0402_5%

2.4K_0402_5%

I2C1_SCK_TP_C

8
7
6
5
4
3
2
1

+3VS_TP

+3VS_TP

JTP

8

10

7

G2

9

6

G1
5
4
3
2
1

ACES_51524-0080N-001

12

RE83
100K_0402_5%

FAN2_TACH[48]

DE8 RB751S40T1G_SOD523-2

1

CE67

0.01U_0402_16V7K

2

Nuvoton TPM

+3VS_TPM

1 2

TPM@

RE86 10K_0402_5%

1 2

@

RE134 10K_0402_5%

SIO_SLP_S0#[18,34,52]

PCH_TPM_SO[17]
PCH_TPM_SI[17]
TPM_PIRQ#[17]

X06.29

PCH_TPM_CLK[17]

PCH_SPI_CS2#[17]

PCH_PLTRST#_EC[17,23,37,43,44,48,51]

PCH_SPI_CS2#

+3VS_TPM

+3VS_TPM

12

RE14

4.7K_0402_5%@

12

RE13
10K_0402_5%@

PCH_TPM_CLK_C

12

RE11

@

33_0402_5%

1

CE8

@

27P_0402_50V8J

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

TPM_PIRQ#

TPM_GPIO4

X06.29

1 2

RE125 0_0402_5%@

1 2

RE113 33_0402_5%TPM@

1 2

RE114 33_0402_5%TPM@

1 2

RE115 33_0402_5%TPM@

1 2

RE133 0_0402_5%@

1 2

RE85 10K_0402_5%TPM@

1 2

RE126 0_0402_5%@

1 2

RE77 4.7K_0402_5%@

PCH_SPI_CS2#

Compal Secret Data

Compal Secret Data

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

12

10K_0402_5%

12

power rail option: TPM power rail must same as +3.3V_SPI (SPI ROM)

+3VS_TPM

+3VS

TPM_LPM#

TPM_PIRQ#

PCH_TPM_CLK_C
PCH_SPI_CS2#_R

TPM_GPIO4

1 2

TPM@

RE132 100_0402_5%

Deciphered Date

Deciphered Date

Deciphered Date

RE84

1 2

RE128 0_0402_5%@

1 2

RE129 0_0402_5%@

UE1

29

GPIO0/SDA/XOR_OUT

30

GPIO1/SCL

3

GPIO2/GPX

6

GPIO3/BADD

24

LAD0/MISO

21

LAD1/MOSI

18

LAD2/SPI_IRQ#

15

LAD3

19

LCKL/SCLK

20

LFRAME#/SCS#

17

LRESET#/SPI_RST#/SRESET#

27

SERIRQ

13

CLKRUN#/GPIO4/SINT#

28

LPCPD#

4

PP

5

TEST

NPCT650JAAYX_QFN32_5X5

TPM@

2

2

+3VS_TPM

G

1 3

RE105 0_0603_5%@

S

D

X06.29

1 2

X06.29

DMG2301U-7_SOT23-3
QE17

TPM@

TPM_LPM#

12

RE127
10K_0402_5%

PGND

Reserved

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

FAN2_PWM[48]

TPM_VDD

VSB
VDD

VDD
VDD

NC
NC
NC
NC
NC
NC
NC

GND
GND
GND
GND

TPM@

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

+3V_PCH

+3VALW

+3VS_TPM_VSB

1
8

TPM_VDD

14
22

2
7
10
11
25
26
31

9
16
23
32
33
12

TPM_VDD

0.1U_0402_25V6

1

CE75

2

TPM@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

FAN/TP/KB/PWR SW

FAN/TP/KB/PWR SW

FAN/TP/KB/PWR SW

LA-C361P

LA-C361P

LA-C361P

RE121 0_0603_5%@

RE141 0_0603_5%@

+3VS_TPM

TPM@

10U_0603_6.3V6M

1

2

TPM@

+3VS

5VS_FAN2

1 2

1 2

0.1U_0402_25V6

1

2

CE76

1

12

RE101

10K_0402_5%

1
2
3
4
5
6

ACES_50224-00401-001

+3VS_TPM_VSB

X06.09

0.1U_0402_25V6

1

CE13

CE12

2

TPM@

+3VS_TPM_VSB

TPM@

42 71Thursday, August 06, 2015

42 71Thursday, August 06, 2015

42 71Thursday, August 06, 2015

JFAN2

CONN@

TPM@

1
2
3
4
G1
G2

+3VS_TPM

X06.29

1

2

0.1U_0402_25V6

1

2

X06.09

10U_0603_6.3V6M

CE14

CE11

0.1(X00)

0.1(X00)

0.1(X00)

5

4

3

2

1

M.2 Slot-A Key-A (WLAN + BT)

CONCR_213AAAA32FA

JNGFF1

1

1

USB20_P4_R
USB20_N4_R

D D

1 2

PCIE_PTX_WLANRX_P1[19]

PCIE_PTX_WLANRX_N1[19]

PCIE_PRX_WLANTX_P1[19]

PCIE_PRX_WLANTX_N1[19]

CLK_PCIE_WLAN[17]
CLK_PCIE_WLAN#[17]

C C

Reserve for EMI

1

CN8

@

.1U_0402_16V7K

2

+3VS_WLAN+3VS_WLAN

1

CN9

@

1000P_0402_50V7K

2

CN21 0.1U_0402_10V7K

1 2

CN20 0.1U_0402_10V7K

WLAN_CLK_REQ#[17]
PCIE_WAKE#[44,48]

PCIE_PTX_WLANRX_RE_P1
PCIE_PTX_WLANRX_RE_N1

PCIE_WAKE#

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

61

61

63

63

65

65

67

67

69

GND

CONN@

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66

68

CLINK_RST#
CLINK_DATA
CLINK_CLK

SUSCLK_R

BT_RADIO_DIS#_R
WLAN_WIGIG60GHZ_DIS#_R

30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66

GND

+3VS_WLAN

.1U_0402_16V7K

22U_0603_6.3V6M

CN2

1

1

CN1

2

2

Close to JNGFF

CLINK_RST# [16]

CLINK_DATA [16]

CLINK_CLK [16]

1 2

RN1 0_0402_5%@

+3VS_WLAN

22U_0603_6.3V6M

.1U_0402_16V7K

CN6

CN7

1

1

2

2

Close to JNGFF

WLAN_WIGIG60GHZ_DIS#_R

BT_RADIO_DIS#_R

SUSCLK [18,44]

PCH_PLTRST#_EC [17,23,37,42,44,48,51]

RB751S40T1G_SOD523-2

RB751S40T1G_SOD523-2

12

12

WLAN_WIGIG60GHZ_DIS# [49]

BT_RADIO_DIS# [49]

DN1

DN2

EMC@

USB20_P4[19]

USB20_N4[19]

B B

A A

5

MCM1012B900F06BP_4P

1 2

LN1

34

X06.33

USB20_P4_R

USB20_N4_R

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

NGFF

NGFF

NGFF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-C361P

LA-C361P

LA-C361P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

43 71Thursday, August 06, 2015

43 71Thursday, August 06, 2015

43 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

M.2 Slot-C Key-M (SSD)

4

3

+3.3VDX_SSD

2

1

RF Reserved.

EMC@

JNGFF2

1

1

3

3

PCIE_PRX_SSDTX_N12[16]
PCIE_PRX_SSDTX_P12[16]

PCIE_PTX_SSDRX_N12[16]
PCIE_PTX_SSDRX_P12[16]

PCIE_PRX_SSDTX_N11[16]

D D

PCIe SSD

SATA SSD

C C

mCARD_PCIE#_SATA[16]

PCIE_PRX_SSDTX_P11[16]
PCIE_PTX_SSDRX_N11[16]

PCIE_PTX_SSDRX_P11[16]
PCIE_PRX_SSDTX_N10[16]

PCIE_PRX_SSDTX_P10[16]
PCIE_PTX_SSDRX_N10[16]

PCIE_PTX_SSDRX_P10[16]
SATA_PRX_SSDTX_P0A[16]

SATA_PRX_SSDTX_N0A[16]
SATA_PTX_SSDRX_N0A[16]

SATA_PTX_SSDRX_P0A[16]

0.1U_0402_10V7K

S IC TC7SZ14FU SSOP 5P

SATA -> High
PCIe -> Low

CLK_PCIE_SSD#[17]
CLK_PCIE_SSD[17]

CD47

UD2

1

@

2

4

Y

@

1 2

RD58 0_0402_5%@

1 2

CD37 0.22U_0402_10V6K

1 2

CD42 0.22U_0402_10V6K

1 2

CD43 0.22U_0402_10V6K

1 2

CD44 0.22U_0402_10V6K

1 2

CD45 0.22U_0402_10V6K

1 2

CD46 0.22U_0402_10V6K

1 2

CD53 0.22U_0402_10V6K

1 2

CD51 0.22U_0402_10V6K

+3VS

+3VS

5

1

P

NC

2

A

G

3

1 2

RD10 10K_0402_5%@

mCARD_PCIE_SATA#

SATA -> GND
PCIe -> OPEN

PCIE_PTX_SSDRX_N12_C
PCIE_PTX_SSDRX_P12_C

PCIE_PTX_SSDRX_N11_C
PCIE_PTX_SSDRX_P11_C

PCIE_PTX_SSDRX_N10_C
PCIE_PTX_SSDRX_P10_C

SATA_PTX_SSDRX_N0A_C
SATA_PTX_SSDRX_P0A_C

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

61

61

63

63

65

65

67

67

68

GND

CONCR_213MAAA32FA

CONN@

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

SSD_PCIE_WAKE#

54

56

56

58

58

60

60

62

62

64

64

66

66

69

GND

RD7 10K_0402_5%

RD59 0_0402_5%@
RD8 10K_0402_5%

RD9 0_0402_5%@

4.7U_0603_6.3V6K

1

2

1 2
1 2

1 2

.1U_0402_16V7K

CD36

1

2

12

EMC@

CD38

CD40

47P_0402_50V8J

CD39

0.01U_0402_16V7K

1

1

2

2

+3.3VDX_SSD

mSATA_DEVSLP [19]

PCH_PLTRST#_EC [17,23,37,42,43,48,51]

SSD_CLK_REQ# [17]

PCIE_WAKE# [43,48]

+3.3VDX_SSD

SUSCLK [18,43]

+3.3VDX_SSD

CD41

15P_0402_50V8J

1

2

X06.19

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

SSD

SSD

LA-C361P

LA-C361P

LA-C361P

SSD

44 71Thursday, August 06, 2015

44 71Thursday, August 06, 2015

1

44 71Thursday, August 06, 2015

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

0.1(X00)

0.1(X00)

0.1(X00)

5

4

3

2

1

HDD CONN

CONN@

JHDD

1

1

2

2

3

3

4

4

SATA_PTX_DRX_P1B_RC
SATA_PTX_DRX_N1B_RC

SATA_PRX_DTX_N1B_RC
SATA_PRX_DTX_P1B_RC

D D

HDD_DET#[16]

+5VS_HDD

FFS_INT2_Q

Place near HDD CONN (JHDD1)

+5VS_HDD

1

CS12
1000P_0402_50V7K

2

C C

SATA_PTX_DRX_P1B[16]
SATA_PTX_DRX_N1B[16]

SATA_PRX_DTX_P1B[16]
SATA_PRX_DTX_N1B[16]

SATA_PTX_DRX_P1B
SATA_PTX_DRX_N1B

SATA_PRX_DTX_P1B
SATA_PRX_DTX_N1B

1 2

CS17 0.01U_0402_16V7K

1 2

CS18 0.01U_0402_16V7K

1 2

CS19 0.01U_0402_16V7K

1 2

CS20 0.01U_0402_16V7K

SATA_PTX_DRX_P1B_RC
SATA_PTX_DRX_N1B_RC

SATA_PRX_DTX_P1B_RC
SATA_PRX_DTX_N1B_RC

BYPASS Circuit

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

GND

22

GND

23

GND

24

GND

J-L_UCNR2234B020-0

1

CS13

.1U_0402_16V7K

2

1

CS14
1U_0402_6.3V6K

2

1

CS15
10U_0603_6.3V6M

2

Free Fall Sensor

+3VS

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

+3VS_FFS

1 2

@

RF1 0_0603_5%

X06.28

1

CF1
10U_0603_6.3V6M

2

PCH_SMBDATA[6,14,15,18]

PCH_SMBCLK[6,14,15,18]

+3VS_FFS

1 2

RF4 100K_0402_5%

1 2

RF5 100K_0402_5%

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

1

CF2

0.1U_0402_25V6

2

FFS_INT1[19]
FFS_INT2[17]

FFS_INT1
FFS_INT2

PCH_SMBDATA
PCH_SMBCLK

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

FFS_INT1
FFS_INT2

UF1

LNG3DM

1

VDD_IO

14

VDD

11

INT 1

9

INT 2

7

SDO/SA0

6

SDA / SDI / SDO

4

SCL/SPC

8

CS

LNG3DMTR_LGA16_3X3~D

10

RES

13

RES

15

RES

16

RES

5

GND

12

GND

2

NC

3

NC

FFS_INT2

+3VS

12

RF3
100K_0402_5%

61

QF1A

2

DMN65D8LDW-7_SOT363-6

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

DC/DC INTERFACE

DC/DC INTERFACE

DC/DC INTERFACE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-C361P

LA-C361P

LA-C361P

Date: Sheet of

Date: Sheet of

Date: Sheet of

+5VS

12

34

QF1B

5

DMN65D8LDW-7_SOT363-6

1

RF2
100K_0402_5%

FFS_INT2_Q

45 71Thursday, August 06, 2015

45 71Thursday, August 06, 2015

45 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

USB Powershare

4

3

2

1

Device Control Pins

CTL1 CTL2 CTL3 ILIM_SEL

D D

0 1 1 X

1 1 1 0

1 1 1 1

+3VALW

1 2

RI30 100K_0402_5%

1 2

RI9 100K_0402_5%

1 2

RI10 100K_0402_5%

1 2

RI13 10K_0402_5%

C C

USB_PWR_SHR_VBUS_EN_R[47,49]

+3VALW

1 2

RI31 100K_0402_5%

1 2

RI4 100K_0402_5%

1 2

RI5 100K_0402_5%

1 2

RI8 10K_0402_5%

B B

USB_PWR_SHR_VBUS_EN_L[49]

Flow Line
Condition

DCP AUTO

SDP

CDP

ILIM_SEL_R
USB_R_CTL
USB_PWR_SHR_EN_R#
USB_PWR_SHR_VBUS_EN_R

USB_PWR_SHR_VBUS_EN_R

ILIM_SEL_L
USB_L_CTL
USB_PWR_SHR_EN_L#
USB_PWR_SHR_VBUS_EN_L

USB_PWR_SHR_VBUS_EN_L

MC74VHC1G32DFT2G_SC70-5~D

Suspend mode

S0 mode

USB_PWR_EN USB_STATUS#_R

MC74VHC1G32DFT2G_SC70-5~D

UI4

1
2

CTL1 = 0 : Enable Power Share DCP mode in Suspend mode

CTL1 = 1 : Disable Power Share in Suspend mode (For Support USB wake)

ILIM_SEL = 0 : SDP mode (0.9A by ILIM_LO setting)

ILIM_SEL = 1 : CDP mode (STATUS# trigger by ILIM_HI =2.2A)

+3VALW

CI22

1 2

0.1U_0402_10V7K

5

UI5

1

P

INB

4

USB_PWR_EN_R

O

RI28 0_0402_5%@

+3VALW

5

P

INB
INA

G

3

2

INA

3

1 2

CI21

1 2

0.1U_0402_10V7K

4

O

G

USB_PWR_EN_L

12

RI26
1M_0402_5%

12

RI27
1M_0402_5%

USB_PWR_SHR_EN_R#[49]

USB3.0 / USB2.0 Port1 (Right Side)

+5VALW

1

CI2

0.1U_0402_25V6

2

ILIM_SEL_R
USB_PWR_EN_R

USB_PWR_SHR_EN_R#

USB_R_CTL

UI2

1

IN

9

STATUS#

13

FAULT#

4

ILIM_SEL

5

EN

6

CTL1

7

CTL2

8

CTL3

TPS2546RTER_QFN16_3X3

OUT
DP_IN
DM_IN

DM_OUT

DP_OUT

ILIM_LO

ILIM_HI

GND
T-PAD

12
10
11
2
3
15
16
14
17

+5V_CHGUSB_1

2.1A

USBP1_D+
USBP1_D-

ILIM_LO1
ILIM_HI1

1 2

RI11 33K_0402_1%

1 2

RI12 22.1K_0402_1%

USBP1_D+ [47]
USBP1_D- [47]USB_OC0#[19]
USB20_N1 [19]
USB20_P1 [19]

USB3.0 / USB2.0 Port2 (Left Side)

+5VALW

1

CI1

0.1U_0402_25V6

2

UI1

1

IN

USB_OC1#[19]

USB_PWR_SHR_EN_L#[48]USB_PWR_EN[20]

USB_STATUS#_L
ILIM_SEL_L

USB_PWR_EN_L

USB_PWR_SHR_EN_L#

USB_L_CTL

9

STATUS#

13

FAULT#

4

ILIM_SEL

5

EN

6

CTL1

7

CTL2

8

CTL3

TPS2546RTER_QFN16_3X3

OUT
DP_IN
DM_IN

DM_OUT

DP_OUT

ILIM_LO

ILIM_HI

GND
T-PAD

12
10
11
2
3
15
16
14
17

+5V_CHGUSB_2

2.1A

ILIM_LO3USB_PWR_EN
ILIM_HI3

1 2

RI6 33K_0402_1%

1 2

RI7 22.1K_0402_1%

USBP2_D+ [47]
USBP2_D- [47]

USB20_N2 [19]
USB20_P2 [19]

DI12

2

USB_ILIM_SEL[49]

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

RI35 0_0402_5%@

2

1

BAT54CW-7-F_SOT323-3~D

1 2

ILIM_SEL_R

3

ILIM_SEL_L USB_STATUS#_R

ILIM_SEL_R ILIM_SEL_L

RI32 0_0402_5%@

RI33 0_0402_5%@

RI34 0_0402_5%@

Title

Title

Title

USB Powershare

USB Powershare

USB Powershare

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-C361P

LA-C361P

LA-C361P

Date: Sheet of

Date: Sheet of

Date: Sheet of

X06.17

1 2

1 2

1 2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

USB_STATUS#_L

1

0.1(X00)

0.1(X00)

46 71Thursday, August 06, 2015

46 71Thursday, August 06, 2015

46 71Thursday, August 06, 2015

0.1(X00)

5

4

3

2

1

USB3.0 Re-driver

+3VS

1 2

RI14 0_0805_5%

@

X06.15

D D

USB_PWR_SHR_VBUS_EN_R[46,49]

+3V_PS8723

1

1

2

2

CI3

CI4

0.01U_0402_16V7K

0.1U_0402_10V7K

1 2

USB3TP1[19]
USB3TN1[19]

CI5 0.1U_0402_10V7K

1 2

CI6 0.1U_0402_10V7K

1 2

DI11 RB751S40T1G_SOD523-2

X06.15

+3V_PS8723

X06.15

RI234.99K_0402_1%

@

12
12

RI250_0402_5%

A_EQ1
A_DE0
A_EQ0
A_DE1

USB3TP1_C
USB3TN1_C

USB3RP1_RE
USB3RN1_RE

@

USB8723_test

I2C_EN8723

UI3

1

VDD

13

VDD

15

A_EQ1/SDA_CTL

16

A_DE0/SCL_CTL

17

A_EQ0/NC

18

A_DE1/NC

19

A_INp

20

A_INn

9

B_INp

8

B_INn

0_0402_5%

5

12

RI36

PD#

7

REXT

14

TEST

24

I2C_EN

PS8713BTQFN24GTR2_TQFN24_4X4

B_EQ1/I2C_ADDR1
B_DE0/I2C_ADDR0

B_EQ0/NC
B_DE1/NC

A_OUTp

A_OUTn

B_OUTp

B_OUTn

GND
GND

GPAD

4
3
2
6

12
11

22
23

10
21
25

B_EQ1
B_DE0
B_EQ0
B_DE1

USB3TP1_RE
USB3TN1_RE

USB3RP1_C
USB3RN1_C

12

CI70.1U_0402_10V7K

USB3RP1 [19]

12

CI80.1U_0402_10V7K

USB3RN1 [19]

A_EQ0
A_EQ1

B_EQ0
B_EQ1

A_DE0
A_DE1

B_DE0
B_DE1

USB8723_test

1 2

RI15 10K_0402_5%

1 2

RI16 0_0402_5%@

1 2

RI17 10K_0402_5%

1 2

RI18 0_0402_5%@

1 2

RI19 4.7K_0402_5%@

1 2

RI20 4.7K_0402_5%@

1 2

RI21 4.7K_0402_5%@

1 2

RI22 4.7K_0402_5%@

1 2

RI24 4.7K_0402_5%@

+3V_PS8723

+3V_PS8723

+3V_PS8723

+3V_PS8723

+3V_PS8723

Equalizer control and program for channel A1&A2/B1&B2

3.3V tolerant. Internally pulled down at ~150KΩ
[EQ1, EQ0] ==
LL: equalization for channel loss up to 9.5dB (default)
LH: equalization for channel loss up to 13 dB
HL: equalization for channel loss up to 4.5dB
HH: equalization for channel loss up to 7.5dB

Programmable output de-emphasis level setting for channel A1&A2/B1&B2

3.3V tolerant. Internally pulled down at ~150KΩ
[DE1, DE0] ==
LL: 3.5dB de-emphasis (default)
LH: No de-emphasis
HL: 2.7dB de-emphasis
HH: 5.0dB de-emphasis

LFPS swing adjust.

3.3V tolerant. Internally pulled down at ~150KΩ.
TST ==
L: Normal LFPS swing (default)
H: Tune down LFPS swing

LI2

C C

USB3TN1_RE

USB3TP1_RE

USBP1_D-[46]

USBP1_D+[46]

1 2

CI16 0.1U_0402_10V7K

1 2

CI20 0.1U_0402_10V7K

USBP1_D-

USBP1_D+

USB3T_N1

USB3T_P1

USB3RP1_RE

USB3RN1_RE

1 2

MCM1012B900F06BP_4P

EMC@

1 2

RI37 0_0402_5%@

1 2

RI38 0_0402_5%@

1 2

RI39 0_0402_5%@

1 2

RI40 0_0402_5%@

USBP1_R_D-

34

USBP1_R_D+

DI9

EMC@

USB3TN1_D-

USB3TP1_D+

USB3RP1_D+

USB3RN1_D-

USB3RN1_D-

USB3TN1_D- USB3TN1_D­USB3TP1_D+

1

1

2

2

4

4

5
3

3

8

AZ1045-04F_DFN2510P10E-10-9

Place close to JUSB2

9

USB3RN1_D-

10

8

USB3RP1_D+USB3RP1_D+

9

7

7

6

USB3TP1_D+

65

USB3.0 / USB2.0 Port1 (Right Side)

+5V_CHGUSB_1

CI17

47U_0805_6.3V6M

10U_0603_6.3V6M

0.1U_0402_25V6

CI18

1

1

2

1

CI19

2

2

2

3

DI10

AZ5125-02S.R7G_SOT23-3

EMC@

1

USB_DET#_R[48]

USB3TP1_D+
USB3TN1_D-

USBP1_R_D+
USBP1_R_D-

USB3RP1_D+
USB3RN1_D-

JUSB2

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2
6
4
5

10

GND

D-

GND

SSRX+
GND

GND

SSRX-

GND

Plug_DET

TAIWI_USB019-107CRL-TWD

CONN@

11
12
13
14

X06.15

B B

LI5

USBP2_D-[46]

USBP2_D+[46]

USB3TN2[19]

USB3TP2[19]

A A

1 2

CI9 0.1U_0402_10V7K

1 2

CI10 0.1U_0402_10V7K

USBP2_D-

USBP2_D+

USB3T_N2

USB3T_P2

USB3RP2[19]

USB3RN2[19]

1 2

MCM1012B900F06BP_4P

EMC@

1 2

RI41 0_0402_5%@

1 2

RI42 0_0402_5%@

1 2

RI43 0_0402_5%@

1 2

RI44 0_0402_5%@

USBP2_R_D-

34

USBP2_R_D+

DI7

EMC@

USB3TN2_D-

USB3TP2_D+

USB3RP2_D+

USB3RN2_D-

USB3RN2_D-

USB3TN2_D­USB3TP2_D+

1

1

2

2

4

4

5
3

3

8

AZ1045-04F_DFN2510P10E-10-9

Place close to JUSB1

9

USB3RN2_D-

10

8

USB3RP2_D+USB3RP2_D+

9

7

USB3TN2_D-

7

6

USB3TP2_D+ USB3RP2_D+

65

USB3.0 / USB2.0 Port2 (Left Side)

+5V_CHGUSB_2

CI11

47U_0805_6.3V6M

10U_0603_6.3V6M

0.1U_0402_25V6

CI12

1

1

1

CI13

2

2

2

2

3

DI8

AZ5125-02S.R7G_SOT23-3

EMC@

1

USB_DET#_L[48]

USB3TP2_D+
USB3TN2_D-

USBP2_R_D+
USBP2_R_D-

USB3RN2_D-

JUSB1

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2
6
4
5

10

GND

D-

GND

SSRX+
GND

GND

SSRX-

GND

Plug_DET

TAIWI_USB019-107CRL-TWD

CONN@

11
12
13
14

Security Classification

Security Classification

X06.15

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Compal Electronics, Inc.

USB conn.

USB conn.

USB conn.
LA-C361P

LA-C361P

LA-C361P

1

47 71Thursday, August 06, 2015

47 71Thursday, August 06, 2015

47 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

A

+3VALW_5085

1 2

RE17 2.2K_0402_5 %

1 2

RE18 2.2K_0402_5 %

PWR_TB_DOCK#[39]

PBTN_SW#[42,52]

JDEG

11
12

HB_A531015-SCHR21

+3VS_TP

LID_SW_IN#[52]

USB_DET#_R[47]

USB_DET#_L[47]

+3.3V_ALW_DEG

JDEG1

1

1

2

2

3

3

4

4

5

5

6

6

G1

7

7

G2

8

8

9

9

10

10

CONN@

JLPDE1

1
2
3
4
5

11

6

G1

12

7

G2

8
9

10

HB_A531015-SCHR21

CONN@

1 2

RE24 4.7K_0402_5 %

1 2

RE26 4.7K_0402_5 %

1 2

RE31 10K_0402_5%@

1 2

RE32 100K_0402_5 %

1 2

RE33 10K_0402_5%@

12

RE110

10K_0402_ 5%

12

RE36
1K_0402_5 %

12

CE29
1U_0402_6.3 V6K

@

1 2

12

CE37
1U_0402_6.3 V6K

@

12

CE71
1U_0402_6.3 V6K

@

RE60

49.9_0402 _1%

MSCLK
MSDATA

+3VS

1
2
3

LPC_AD0

4

LPC_AD1

5

LPC_AD2

6

LPC_AD3

7

LPC_FRAME#

8

PCH_PLTRST#_EC

9
10

A

1 1

2 2

3 3

4 4

+3VALW_5085

12

123

UARTT0_TX [20]

PBAT_SMBDAT
PBAT_SMBCLK

CLK_TP_SIO
DAT_TP_SIO

PCH_PLTRST#_EC
LCD_TST
RESET_OUT#

+RTCVCC

12

12

+3VALW_5085

100K_0402_5%

12

RE4510_0402_ 5%

1

2

+RTCVCC

100K_0402_5%

12

12

RE5410K_040 2_5%

12

+RTCVCC

100K_0402_5%

12

12

RE8910K_040 2_5%

12

10K_8P4R_5%

678

RP20

4 5

JTAG_TDI
JTAG_TMS
JTAG_CLK
JTAG_TDO

PCI_CLK_LPC1 [19 ]

RE34
100K_0402 _5%

POWER_SW _IN#

CE30
1U_0402_6.3 V6K

RE41

LID_CL_SIO#

CE31

0.047U_0402 _25V7K

RE50

USB_DET_EC#_R

1U_0402_6.3V6K

CE38

RE90

USB_DET_EC#_L

1U_0402_6.3V6K

CE70

+3VALW_5085

@

10K_0402_5%

10K_0402_5%

12

12

RE63

B

100K_0402_5%

12

RE64

RE65@

HOST_DEBUG_TX

Pin8 5085_TXD f or EC Debug
pin9 5048_TXD f or SBIOS
debug

B

+3VALW +3VALW_5085

12

HDA_I2S_SEL = Low ; HDA Mode
HDA_I2S_SEL = High ; I2S Mode

SPK_DET#[20,52]

BIA_PWM_EC[35]

DCIN_ACOK[55]

2

RUN_ON_EC

PJP1205

1 2

10U_0603_6.3V6M

PAD-OPEN1x1m

@

CE22

1 2

@

1 2

@

1 2

+3VALW

100K_0402_5%

12

RE56

RUN_ON#

61

QE4A
DMN65D8LDW-7 _SOT363-6

+RTCVCC

RE16 0_040 2_5%@

+3VALW_5085

+3VALW_5085

0.1U_0402_25V6

12

Connect PCH
Connect Touch Pad

Connect Battery

RE1390_0402_5%

RE1220_0402_5%

X06.14

DE11

RB751S40T1G_ SOD523-2

+3VS

RUNPWROK

5

C

1 2

0.1U_0402_25V6

12

12

CE23

CE24

SPK_DET#_EC

B_PWM_EC

10K_0402_5%

12

RE52

34

QE4B
DMN65D8LDW-7 _SOT363-6

C

0.1U_0402_25V6

CE25

X06.14

12

0.1U_0402_25V6

CE26

MEC_XTAL2

X06.14

+RTC_CELL_VBAT

0.1U_0402_25V6

12

CE17

1U_0402_6.3V6K

0.1U_0402_25V6

12

12

CE18

CE19

1U_0402_6.3V6K

0.1U_0402_25V6

12

12

CE20

CE21

0.1U_0402_25V6

0.1U_0402_25V6

12

12

CE28

CE27

SML1_SMBDAT[18]
SML1_SMBCLK[18]

CLK_TP_SIO[42]

DAT_TP_SIO[4 2]
LCD_TST[35 ]

LCD_VCC_TEST_EN[33]

PBAT_SMBDAT[54]
PBAT_SMBCLK[54]

FAN2_PWM[42]
FAN1_PWM[42]

SIO_SLP_WLAN#[18]
PD_I2C_ALERT#[39]

BEEP[5 2]
BC_CLK_ECE11 17[52]
BC_DAT_ECE1117[52]
BC_INT#_ECE1117[52]

RE51 0_ 0402_5%

CLK_TP_SIO
DAT_TP_SIO
LCD_TST

GPU_PWR_LEVEL[23]

SPK_DET#_EC
PBAT_SMBDAT
PBAT_SMBCLK

JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
JTAG_RST#

FAN1_TACH[42]

LID_CL_SIO#

FAN2_TACH[42]

PS_ID[54]

B_PWM_EC

EC_SLP_S0IX#[1 7]

PD_I2C_ALERT#

ACAV_IN_NBACAV_IN_NB

SIO_SLP_S5#[18,34, 52]

BC_DAT_ECE1117

SIO_EXT_SMI#

SIO_EXT_SMI#[1 7]
SIO_RCIN#[19]
IRQ_SERIRQ[19]

PCH_PLTRST#_EC

PCH_PLTRST#_EC[17 ,23,37,42, 43,44,51]

CLK_PCI_MEC

CLK_PCI_MEC[19]

LPC_FRAME#

LPC_FRAME#[19]

LPC_AD0

LPC_AD0[19 ]

LPC_AD1

LPC_AD1[19 ]

LPC_AD2

LPC_AD2[19 ]

LPC_AD3

LPC_AD3[19 ]
CLKRUN#[18]
SIO_EXT_SCI#[20]

MEC_XTAL1

12

MEC_XTAL2_R

@

1

1

JTAG1 @

@SHORT PADS~D

2

2

62K
33K

8.2K
2K

1K

BOARD_ID rise time is measured from 5%~68%.

D

UE3

B64

VBAT

A22

H_VTR

A58

VTR_ADC

B3

VTR

A11

VTR

A26

VTR

B35

VTR

A41

VTR

A52

VTR

A5

GPIO007/I2C1D _DATA/PS2_CLK0B/I2 C3A_DATA

B6

GPIO010/I2C1D _CLK/PS2_DAT0B/I 2C3A_CLK/GANG_DATA0

A37

GPIO110/PS2_ CLK2/GPTP-IN6

B40

GPIO111/PS2_ DAT2/GPTP-OUT6

A38

GPIO112/PS2_ CLK1A

B41

GPIO113/PS2_ DAT1A

A39

GPIO114/PS2_ CLK0A

B42

GPIO115/PS2_ DAT0A

B59

GPIO154/I2C1C _DATA/PS2_CLK1B/GANG_DATA5

A56

GPIO155/I2C1C _CLK/PS2_DAT1B/GANG_DATA6

A51

GPIO145/I2C1K _DATA/JTAG_TDI

B55

GPIO146/I2C1K _CLK/JTAG_TDO

B56

GPIO147/I2C1J _DATA/I2C2C_DATA/JTAG_CLK

A53

GPIO150/I2C1J _CLK/I2C2C_ CLK/JTAG_TMS

B47

JTAG_RST#

B22

GPIO050/FAN_TACH1/GTACH0/GANG_START

A21

GPIO051/FAN_TACH2/GANG _MODE

B23

GPIO052/FAN_TACH3/GTACH1/GANG_ERROR

B24

GPIO053/PW M0

A23

GPIO054/PW M1/GPWM1

B25

GPIO055/PW M2

A24

GPIO056/PW M3/GPWM0

A43

GPIO123/BCM_A_CL K

B45

GPIO122/BCM_A_DAT

A42

GPIO121/BCM_A_INT#

B20

GPIO032/BCM_E_ CLK

A18

GPIO031/GPTP-OUT2/BCM_E _DAT

B19

GPIO030/GPTP-IN2/BCM_ E_INT#/GANG_DATA7

A20

GPIO047/LSBCM_ D_CLK

B21

GPIO046/LSBCM_ D_DAT/GANG_STROBE

A19

GPIO045/LSBCM_ D_INT#

A6

GPIO011/nSMI

A27

GPIO061/LPCPD#

A28

SER_IRQ

B30

LRESET#

A29

PCI_CLK

B31

LFRAME#

A30

LAD0

B32

LAD1

A31

LAD2

B33

LAD3

A32

CLKRUN#

A33

GPIO100/NEC_SCI

A61

XTAL1

A62

XTAL2

15mil

+3VALW_5085

100K_0402_5%

12

RE59

1U_0402_6.3V6K

100_0402_1%

12

12

RE61@

CE44

REV

CE51RE67

4700p130K

X00

4700p

X01

4700p

X02

4700p

X03

4700p4.3K

X04

4700p

X05

4700p

A00

D

AGND

VSS

B66

B11

JTAG_RST#

X06.07

BOARD_ID FWP#

GPIO124/GPTP-OUT5/UART_RX/V2P_C OUT_LO1

GPIO116/MSDATA/V2P_COUT_LO/TAP_SE L_STRAP

GPIO125/GPTP-IN5/PE CI_REQUEST#/GANG_BUSY

GPIO013/I2C1H_C LK/I2C2D_CLK /GANG_DATA3

VSS_ADC

VR_CAP

VSS_RO

H_VSS

B60

B12

B54

B18

4.7U_0603_6.3V6K

+VR_CAP

12

CE40

ESR <2ohms

+3VALW_5085

12

RE67
1K_0402_5 %

12

CE51
4700P_040 2_25V7K

E

GPIO014/GPTP-IN7/RC_ ID3

GPIO025/UART_CLK

GPIO120/UART_TX/V2P_COUT_HI1

GPIO060/KBRST/BCM _B_INT#

GPIO101/ECGP_S CLK
GPIO103/ECGP_MI SO
GPIO105/ECGP_MOS I

GPIO102/BCM_C_ INT#

GPIO104/SLP_ S0#

GPIO117/MSCLK/ V2P_COUT_HI

GPIO156/LED1/ GANG_DATA1
GPIO153/LED2/ GANG_DATA4

GPIO027/GPTP-OUT1

GPIO026/GPTP-IN1

GPIO001/ECSPI_ CS1/32KHZ_OUT

GPIO015/GPTP-OUT7

GPIO016/GPTP-IN8

GPIO017/GPTP-OUT8

GPIO107/NRESET_OUT

GPIO151/GPTP-IN4/GANG_DATA2

GPIO152/GPTP-OUT4

GPIO003/I2C1A_D ATA

GPIO004/I2C1A_C LK

GPIO005/I2C1B _DATA/BCM_B_DAT

GPIO006/I2C1B _CLK/BCM_B_CL K

GPIO012/I2C1H_D ATA/I2C2D_DATA
GPIO130/I2C2A_D ATA/BCM_C_DAT

GPIO131/I2C2A_C LK/BCM_C_CLK

GPIO132/I2C1G _DATA

GPIO140/I2C1G _CLK

GPIO141/I2C1F _DATA/I2C2B_DATA

GPIO142/I2C1F _CLK/I2C2B_ CLK

GPIO143/I2C1E _DATA

GPIO144/I2C1E _CLK

DN1_DP1A/THERM

DP1_DN1A/VREF_T

GPIO002/THERMTRIP3#
GPIO024/THSEL_STRAP

PROCHOT_IN#/PROCHOT_IO#

EP

MEC5085-LZY-HST01 _DQFN132_11X 11

C1

1

CE42
22P_0402_ 50V8J

2

+3VALW_5085

12

RE68
10K_0402_ 5%

@

RE70
10K_0402_ 5%

1 2

E

A10

GPIO021/RC_ID1

B10

GPIO020/RC_ID2

B8
B27
B44
B46
B26

VCC_PWRGD

A25
B36
B37
B38
A34
A35
A36

GPIO106

A40
B43
A45

GPIO127/A20M

B65

nFWP

B57
B1

GPIO157/LED0

A55
A1
B28
B2
A8
B9
A9
B39
A44

A54
B58

A3
B4
A4
B5
B7
A7
B48
B49
A47
B50
B52
A49
B53
A50

A59

SYSPWR_PRES

B62

BGP0

A64

VCI_OVRD_IN

A60

VCI_OUT

B67

VCI_IN0#

A63

VCI_IN1#

B63

VCI_IN2#

B68

VCI_IN3#

B51

VREF_PECI

A48

PECI_DAT

B13
A13
B14

DN2_DP2A

A14

DP2_DN2A

A15

DN3_DP3A

B16

DP3_DN3A

A16

DN4_DP4A

B17

DP4_DN4A

B15

VIN

A17

VSET

A12

VCP

B34

THERMTRIP2#

A2
B29
A46
B61

V_ISYS0

A57

V_ISYS1

32 KHz Clock

YE1

1

2

1

32.768KHZ_12 .5PF_CM7V-125 20

CLK_PCI_MEC

10_0402_5%

12

RE62EMC@

EMC@

4.7P_0402_50V8C

12

CE48

EMI depop locat ion

Place close pin A29

VGA_ID

RE112 0_0402_5%@

BOARD_ID
PCIE_WAKE#

HOST_DEBUG_TX
RUNPWROK
SIO_SLP_S4#

PTP_INT#_EC

SIO_SLP_S3#
MSDATA_R

MSCLK_R
FWP#

RUN_ON
SUS_ON
RESET_OUT#

USBC_MCP23017_ SMBDAT
USBC_MCP23017_ SMBCLK
UPD_MRESET

UPD_GPU_SMBDAT
UPD_GPU_SMBCLK
CHARGER_SMBDAT
CHARGER_SMBCLK

EDP_CTRL_EN

ACAV_IN
ALWON
POWER_SW_IN#
BATBTN#
USB_DET_EC#_R
USB_DET_EC#_L

EC_PECI
REM_DIODE1_N

REM_DIODE1_P
REM_DIODE2_N
REM_DIODE2_P
REM_DIODE3_N
REM_DIODE3_P
REM_DIODE4_N
REM_DIODE4_P

VSET_5085
THERMATRIP2#

THERMATRIP3#
THSEL_STRAP
H_PROCHOT#_EC

1 2

RE55 4.7K_0402_5%

2

MEC_XTAL2MEC_XTAL1

CE43

22P_0402_ 50V8J

UPD_GPU_SMBDAT

UPD_GPU_SMBCLK

DMN65D8LDW-7 _SOT363-6

1 2

PCIE_WAKE# [43,4 4]

LAN_WAKE# [18]
PCH_PCIE_WAKE# [18]

RUNPWROK [1 8]
EN_INVPWR [3 5]
SIO_SLP_S4# [18,34,52 ]

AUX_EN_WOWL [33]
PCH_ALW_ON [33, 34,58]
SIO_SLP_S3# [18,34,37 ,52]
PCH_DPWROK [1 8]

PCH_RSMRST# [6,18]

PWRBTN_LED# [42]
ME_FWP_EC [18]
USB_PWR_SHR_EN_L # [46]

IMVP_VR_ON [34]
SIO_SLP_A# [18,52]
VBUS_HV_DIS# [55 ]

ME_SUS_PWR_ACK [ 18]

RESET_OUT# [6,18]
H_VCCST_PWRGD_EC [34]

AC_PRESENT [18]
SIO_PWRBTN# [6,18 ]

USBC_MCP23017_ SMBDAT [49]

USBC_MCP23017_ SMBCLK [49]

UPD_MRESET [37,39]
SIO_EXT_WAKE# [20]
SUSACK# [18]
ENVDD_PCH [16 ,33]

UPD_GPU_SMBDAT [23 ,39]

UPD_GPU_SMBCLK [ 23,39]

CHARGER_SMBDAT [5 6]

CHARGER_SMBCLK [56]

RE111 43K_0402_1 %

PBAT_PRES# [54,56]
AC_DIS [55,56]

ACAV_IN [56]

ALWON [57]

BATBTN# [50]

1 2

RE48 33_0402_5%

1 2

CE32 2200P_ 0402_25V7K

1 2

CE33 2200P_ 0402_25V7K

1 2

CE35 2200P_ 0402_25V7K

1 2

CE36 2200P_ 0402_25V7K

CE58, CE39, CE60, Place near UE5

I_ADP [ 56]
THERMATRIP3# [23]

1 2

RE96 100_0402_5%

I_BATT [56]
P_SYS [56,64]

F

+3VS

2

6 1

QE18A

DMN65D8LDW-7 _SOT363-6

X06.14

1 2

5.1K_0402_ 1%

5

3 4

QE18B

BID_DIS [20]

X06.37

MCP23017

UPD + GPU
Charger

H_PECI [9,16]

H_PROCHOT# [9,56, 64]

12

RE137

SIO_SLP_SUS# [18]

1 2

RE43 1K_0402_5 %

100K_0402_5%

12

RE44

+VCCIO

0.1U_0402_25V6
CE34

12

12

RE136

5.1K_0402_ 1%

EC_PECI

G

I2C0_SDA_DSP [2 0,52]

I2C0_SCK_DSP [2 0,52]

+3VLP

@

CE39

47P_0402_50V8J

1

2

Setting for Thermal Design

Thermal diode mapping

5085 Channel

DP1A/DN1A

DP2A/DN2A

DP3A/DN3A

DP4A/DN4A

100P_0402_50V8J

1

CE45@

2

1 2

Place QE7 For FAN1

100P_0402_50V8J

12

CE46@

Place QE5 close to BOT Skin1

100P_0402_50V8J

12

CE49@

Place QE8 close to JDIMM

100P_0402_50V8J

CE72@

1 2

Place QE12 For SSD Place QE9 close to FAN2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY P ROPERTY OF COMPAL ELECTRONICS, INC . AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DI SCLOSED TO ANY THIRD PARTY WITHOUT P RIOR WRITTEN CONSENT OF COMPAL ELECTRONICS , INC.

MAY BE USED BY OR DI SCLOSED TO ANY THIRD PARTY WITHOUT P RIOR WRITTEN CONSENT OF COMPAL ELECTRONICS , INC.

MAY BE USED BY OR DI SCLOSED TO ANY THIRD PARTY WITHOUT P RIOR WRITTEN CONSENT OF COMPAL ELECTRONICS , INC.

F

Location

DP1/DN1

FAN1

Skin1

DP2/DN2

DP3/DN3

JDIMM

DP4/DN4 FAN2

SSD

QE7

E

31

MMBT3904WH_SOT32 3-3

B

2

C

QE5

E

31

MMBT3904WH_SOT32 3-3

B

2

C

QE8

E

31

MMBT3904WH_SOT32 3-3

B

2

C

QE12

E

31

MMBT3904WH_SOT32 3-3

B

2

C

100P_0402_50V8J

CE69@

1 2

100P_0402_50V8J

12

CE47@

100P_0402_50V8J

12

CE68@

100P_0402_50V8J

@

CE50

1 2

Compal Secret Data

Compal Secret Data

Compal Secret Data

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Deciphered Date

Deciphered Date

Deciphered Date

Location5085 Channel

OTP

Skin2

AR

C

2

B

E

QE15

3 1

MMBT3904WH_SOT32 3-3

Place QE15 For OTP

C

2

B

E

QE6

3 1

MMBT3904WH_SOT32 3-3

Place QE6 close to BOT Skin2

C

2

B

E

QE11

3 1

MMBT3904WH_SOT32 3-3

Place QE11 close to Alpine Ridge

C

2

B

E

QE9

3 1

MMBT3904WH_SOT32 3-3

G

MSDATA_R
MSCLK_R

USBC_MCP23017_ SMBDAT
USBC_MCP23017_ SMBCLK

REM_DIODE1_P

REM_DIODE1_N

REM_DIODE2_P

REM_DIODE2_N

REM_DIODE3_P

REM_DIODE3_N

REM_DIODE4_P

REM_DIODE4_N

1
2
3
4 5

100K_0804 _8P4R_5%

1 2

RE19 10K_0402_5%

1 2

RE20 2.2K_0402_5 %

1 2

RE21 2.2K_0402_5 %

1 2

RE22 10K_0402_5%

1 2

RE23 10K_0402_5%

1 2

RE25 10K_0402_5%

1 2

RE94 2.2K_0402_5 %

1 2

RE95 2.2K_0402_5 %

1 2

RE140 10K_040 2_5%@

1 2

RE99 10K_0402_5%

1 2

RE27 10K_0402_5%@

1 2

RE30 100K_0402_5 %

X06.14

12

RE1180_0402_5% @

12

RE1020_0402_5% @

12

RE1030_0402_5% @

12

RE1190_0402_5% @

12

RE1200_0402_5% @

1 2

12

@

RE1380_0402_5%

12

RUN_ON_EC

@

RE350_0402_5%

12

@

RE370_0402_5%

12

SUS_ON_EC

@

RE380_0402_5%

12

@

RE390_0402_5%

12

@

RE1070_0402_5%

0.1U_0402_25V6

12

RZ41100K_04 02_5%

12
12

CE41

PCIE_WAKE#

X06.14

X06.14

UPD_MRESET

PTP_INT#_EC

SIO_SLP_S3#

RUN_ON

SIO_SLP_S4#

SUS_ON

EDP_CTRL_EN

BC_DAT_ECE1117
PTP_INT#_EC

BATBTN#

PCIE_WAKE#
USBC_MCP23017_ SMBDAT
USBC_MCP23017_ SMBCLK
CHARGER_SMBDAT
CHARGER_SMBCLK
THERMATRIP3#
UPD_GPU_SMBDAT
UPD_GPU_SMBCLK
SIO_EXT_SMI#

PD_I2C_ALERT#

MSDATA
SUS_ON_EC

Rest=1.33K , Tp=93 degree C

THSEL_STRAP

RE57 1K_0402_5%

1: Channel 1 will provide Thermistor Readings
0: Channel 1 will provide Diode Readings

+VCCIO

1 2

RE69 2.2K_040 2_5%

H_THERMTRIP#_R[9,16]

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

QE10

MMBT3904WH_SOT32 3-3

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

HD Audio ALC3661/Audio Jack

HD Audio ALC3661/Audio Jack

HD Audio ALC3661/Audio Jack

RP19

MSDATA
MSCLK

X06.14

RE1080_0402_5% @
RE1090_0402_5% @

12

1 2

+3VALW_5085

2

B

H

E

H

+3VALW_5085

+RTCVCC

8
7
6

+3VALW_5085

BAT1_LED# [52 ]

BAT2_LED# [52 ]

TBT_PCIE_WAKE# [37]

PTP_INT# [17 ,42]

RUN_ON_EC [ 33,34]

SUS_ON_EC [33,34]

EDP_CTRL_EN_C [3 5]

DOCK_TNY_SMB_DAT [35,39]

DOCK_TNY_SMB_CLK [35,39]

VSET_5085

RE58

1.33K_0402 _1%

X06.36

8.2K_0402_5%

12

RE66

THERMATRIP2#

C

12

3 1

48 71Thursday, August 06, 2015

48 71Thursday, August 06, 2015

48 71Thursday, August 06, 2015

Amber

White

0.1U_0402_25V6

CE52

A

B

C

D

E

+3VALW +3VALW_23017

+3VALW_23017

1 1

2 2

1 2

RE71 100K_0402_5%

1 2

RE72 100K_0402_5%

WLAN_WIGIG60GHZ_DIS#

BT_RADIO_DIS#

Device Address:
b 0,1,0,0,A2,A1,A0,0
0x42

+3VALW_23017

+3VALW_23017

PANEL_BKEN_EC[35]
USB_ILIM_SEL[46]
PWR_SRC_ON[55]
BATT_LED#_LV5[50]
BATT_LED#_LV4[50]
BATT_LED#_LV3[50]
BATT_LED#_LV2[50]
BATT_LED#_LV1[50]

USBC_MCP23017_SMBDAT[48]

USBC_MCP23017_SMBCLK[48]

1 2

RE73 10K_0402_5%

1 2

RE74 10K_0402_5%

1 2

RE75 10K_0402_5%

1 2

RE76 10K_0402_5%

Ensure rise time within 66ms.
(fast than 0.05V/ms)

PJP1206

1 2

10U_0603_6.3V6M

PAD-OPEN1x1m

12

CE53

@

5

UE4

4
3
2

1
28
27
26
25

9

8
16

15
11

12
13

14

VDD
GPB7
GPB6
GPB5
GPB4
GPB3
GPB2
GPB1
GPB0

SDA
SCL

INTA
INTB

A0
A1
A2

VSS(Ground)

RESET

MCP23017T-E-ML_QFN28_6X6

GPA0
GPA1
GPA2
GPA3
GPA4
GPA5
GPA6
GPA7

NC/SO

NC

0.1U_0402_25V6

12

12

CE54

17
18
19
20
21
22

WLAN_WIGIG60GHZ_DIS#

23

BT_RADIO_DIS#

24

10
7

6

0.1U_0402_25V6

CE55

USB_PWR_SHR_VBUS_EN_L [46]
USB_PWR_SHR_VBUS_EN_R [46,47]
USB_PWR_SHR_EN_R# [46]
NB_MUTE# [52]
PTP_DIS# [42]
WLAN_WIGIG60GHZ_DIS# [43]
BT_RADIO_DIS# [43]

TP_PW_EN [42]

3 3

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

2012/07/212011/08/25

2012/07/212011/08/25

2012/07/212011/08/25

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

AMP TPA3113/SPK conn.

AMP TPA3113/SPK conn.

AMP TPA3113/SPK conn.

LA-C361P

LA-C361P

LA-C361P

E

49 71Thursday, August 06, 2015

49 71Thursday, August 06, 2015

49 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

4

3

2

1

BATT LED Power Button

SW2

BATBTN#[48]

D D

C C

2

3

DL1
AZ5125-02S.R7G_SOT23-3

EMC@

1

3

4

1

2

NTC311-EA1T-A160T_4P

Battery Gauge LED

BATT_LED#_LV5[49]
BATT_LED#_LV4[49]
BATT_LED#_LV3[49]
BATT_LED#_LV2[49]
BATT_LED#_LV1[49]

EC GPIO set to OD output

+5VALW

RP24

6
7
8
9

10

10K_1206_10P8R_5%

+5VALW

@

5
4
3
2
1

1 2

RL1 820_0402_5%

1 2

RL2 820_0402_5%

1 2

RL3 820_0402_5%

1 2

RL4 820_0402_5%

1 2

RL5 820_0402_5%

BAT_LED#_LV5

BAT_LED#_LV4

BAT_LED#_LV3

BAT_LED#_LV2

BAT_LED#_LV1

21

LED5
27-21-T3D-CP1Q2B16Y-3C_WHITE

+5VALW

21

LED4

27-21-T3D-CP1Q2B16Y-3C_WHITE

21

LED3

27-21-T3D-CP1Q2B16Y-3C_WHITE

21

LED2

27-21-T3D-CP1Q2B16Y-3C_WHITE

21

LED1

27-21-T3D-CP1Q2B16Y-3C_WHITE

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

2012/07/152011/08/25

2012/07/152011/08/25

2012/07/152011/08/25

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

LED indicator

LED indicator

LED indicator

LA-C361P

LA-C361P

LA-C361P

1

50 71Thursday, August 06, 2015

50 71Thursday, August 06, 2015

50 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

Card Reader

Pin11, Pin12 trace fixed width is 40 mils.
Pin27 trace fixed width is 30mils.
Pin10, pin14, pin18 trace fixed width is 20 mils.
Pin 9 trace fixed width is 12 mils.
Trace routing length < 200mils.
Via size: Pad>=28 mils, Finished hole>=16 mils.

D D

PCH_PLTRST#_EC[17,23,37,42,43,44,48]

CR_CLK_REQ#[17]

CLK_PCIE_CR[17]
CLK_PCIE_CR#[17]

1 2

+3VS_CR

0.1U_0402_10V7K

CR2

1

2

CR7 0.1U_0402_10V7K

1 2

CR9 0.1U_0402_10V7K

1 2

CR10 0.1U_0402_10V7K

1 2

CR13 0.1U_0402_10V7K

1 2

RR10 0_0402_5%@

1 2

RR1 10K_0402_5%

X06.11

+SD_VDD2

0.1U_0402_10V7K

CR5

@

RR6 6.2K_0402_1%

DV12S

1

Close to pin10 (AV12)

2

PCIE_PTX_CARDRX_P2[19]
PCIE_PTX_CARDRX_N2[19]
PCIE_PRX_CARDTX_P2[19]
PCIE_PRX_CARDTX_N2[19]

MEDIACARD_IRQ#[17]

C C

4.7U_0603_6.3V6K

1

CR6

2

1 2

PCIE_PTX_CARDRX_P2_C
PCIE_PTX_CARDRX_N2_C
PCIE_PRX_CARDTX_P2_C
PCIE_PRX_CARDTX_N2_C

CD_WAKE#
SD_CD#

DV12S

RREF

1
2

5
6

3
4
7
8

32
31
30

10
14

13

9

4

UR1

PERST#
CLK_REQ#

REFCLKP
REFCLKN

HSIP
HSIN
HSOP
HSON

WAKE#
MS_INS#
SD_CD#

AV12
DV12S

SD_VDD2
RREF

+3VS_CR

RTS5242

11

27

3V3aux

E-PAD

33

0.1U_0402_10V7K

CR1

1

2

CARD_3V3

3V3_IN

DV33_18

SP1
SP2
SP3
SP4
SP5
SP6
SP7

SD_LN1_P
SD_LN1_M

SD_LN0_P
SD_LN0_M

SDREG2

GPIO

RTS5242-GR_QFN32_4X4

10U_0603_6.3V6M

4.7U_0603_6.3V6K

CR4

12
18

15
16
17
19
20
21
29

22
23

26
25

24
28

1

12

CR12

2

DV33_18

CR3 1U_0402_6.3V6K

SD_RCLK_M_R
SD_RCLK_P_R
SD_CLK_R
SD_CMD_R
SD_D3_R
SD_D2_R
SP7_SDWP

RTS5242 (SD4.0)

SD_LN1_P
SD_LN1_M

SD_LN0_P
SD_LN0_M

SD_REG2

1 2

RR9 10K_0402_5%

3

0.1U_0402_10V7K

1

CR11

Close to pin27 (3V3_AUX)

2

+ODR_PWR

1 2

1 2

RR2 0_0402_5%@

1 2

RR3 0_0402_5%@

1 2

RR4 0_0402_5%@

1 2

RR5 0_0402_5%@

1 2

RR7 0_0402_5%@

1 2

RR8 0_0402_5%@

Close to UR1

1 2

CR16 1U_0402_6.3V6K

If GPIO not use for LED function,
must be pull-high (Layout guide)

For GPIO control SD_WP

HOST_SD_WP#[20]

SD_RCLK_M
SD_RCLK_P
SD_CLK
SD_CMD
SD_D3
SD_D2

X06.11

EMC@

+3VS_CR

L2N7002WT1G_SC-70-3
QR1

1 3

D

SP7_SDWP SP7_SDWP_C

G

2

2

1

Close to JCR

+ODR_PWR

1

CR8
10P_0402_25V8J

2

EMC@

S

0.1U_0402_10V7K

10U_0603_6.3V6M

CR15

CR14

1

12

+SD_VDD2

2

4.7U_0603_6.3V6K

0.1U_0402_10V7K

1

1

CR17

2

2

SD_D2
SD_D3
SD_CMD

SD_CLK
SD_CD#

SD_RCLK_P
SD_RCLK_M
SP7_SDWP_C

SD_LN0_P
SD_LN0_M

SD_LN1_M
SD_LN1_P

CR18

JCR

1

DAT2

2

CD/DAT3/RSV

3

CMD

4

VSS1

5

VDD/VDD1

6

CLK

7

VSS2

8

CARD DETECT

9

DAT0/RCLK+/DAT

10

DAT1/RCLK-

11

WRITE PROTEC

12

VSS3

13

D0+

14

D0-

15

VSS4

16

VDD2

17

D1-

18

D1+

19

VSS5

T-SOL_156-1001302601_NR

CONN@

20

GND

21

GND

22

GND

23

GND

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Card Reader

Card Reader

Card Reader

1

51 71Thursday, August 06, 2015

51 71Thursday, August 06, 2015

51 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

5

AUDIO Board Conn.

JAUDIO

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

G4
G5
G6

CONN@

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

G1

32

G2

33

G3

D D

NB_MUTE#[49]

BEEP[48]
SPKR[18]

SPK_DET#[20,48]

+3VALW
+5VALW

DMIC_DAT_CODEC
DMIC_CLK_CODEC

C C

2

1

DMIC_CLK_CODEC
DMIC_DAT_CODEC

3

TVNST52302AB0_SOT523-3

DE9

EMC@

2
4
6

8
10
12
14
16
18
20
22
24
26
28
30

34
35
36

E-T_1133K-R30C-01L~D

4

+VSBP

AUD_PWR_EN [20,54]

HDA_BITCLK_AUDIO [18]

HDA_SYNC_AUDIO [18]

HDA_RST#_AUDIO [18]

HDA_SDIN0_AUDIO [18]

HDA_SDOUT_AUDIO [18]

I2C0_SDA_DSP [20,48]

I2C0_SCK_DSP [20,48]

3

2

Keyboard Controller board + DMIC

+5VALW

+5VS

+3VALW

BAT2_LED#[48]
BAT1_LED#[48]

RE117 0_0402_5%@
RE116 0_0402_5%@

X06.22

+3VS

1 2
1 2

KB_DET#[20]

BC_DAT_ECE1117[48]
BC_CLK_ECE1117[48]

BC_INT#_ECE1117[48]

DMIC_DAT_CODEC
DMIC_CLK_CODEC

White

Amber

@

4.7P_0402_50V8C

@

4.7P_0402_50V8C

12

12

CE81

CE82

APS CONN

+3V_PCH

SIO_SLP_S3#[18,34,37,48]

+3VALW

SIO_SLP_S5#[18,34,48]
SIO_SLP_S4#[18,34,48]
SIO_SLP_A#[18,48]

+3VALW

PCH_RTCRST#[18]

PBTN_SW#[42,48]

SYS_RESET#[6,18]

SIO_SLP_S0#[18,34,42]

DMIC_DAT_CODEC_C
DMIC_CLK_CODEC_C

@

4.7P_0402_50V8C

@

4.7P_0402_50V8C

12

12

CE73

CE74

JAPS

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

GND

20

GND

CONN@

ACES_50506-01841-P01

JKB

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

GND

GND

E-T_6710K-Y15M-31L

CONN@

UART2_TXD[20]
UART2_RXD[20]

1

16
17

+5VALW

JUART

1

1

2

2

3

3

4

4

5

GND

6

GND

ACES_50207-00471-P01

CONN@

Lid Switch Screw Hole

+3VALW +3VALW

UE2

B B

.1U_0402_16V7K

CE15

1

2

TCS20DLR_SOT23F-3

3

2

VCC

GND

1

12

RE15

@

47K_0402_5%

1

CE16
10P_0402_25V8J

2

VOUT

LID_SW_IN#

LID_SW_IN# [48]

RTC Battery With Charge Function

+RTCBATT

+RTCBATT

RH67

A A

+3VLP

W=20mils

5

1.3K_0402_5%

1 2

W=20mils

1

D122
BAS40-04_SOT23-3

W=20mils

2

3

12

CH44
1U_0402_6.3V6K

+RTCVCC

1

EMC@

CH196

15P_0402_50V8J

2

RF Reserved.

+RTCBATT

4

JRTC

1

1

2

2

3

G1

4

G2

E&T_3806K-F02N-03R

CONN@

CPU x 4 GPU x 2

@

H_3P9

@

H_3P9

H_3P9

1

1

H46

@

H45

H_3P9

1

1

H5

@

H_3P2

CLIP_C5P5

H16

@

H13

NGFF x 2

EMI shilding clip x 21

EMIST_SUL-12A2M_1P

H33

@

EMIST_SUL-12A2M_1P

H28

@

EMIST_SUL-12A2M_1P

H21

@

EMIST_SUL-12A2M_1P

H22

@

EMIST_SUL-12A2M_1P

H26

@

1

1

1

1

1

EMIST_SUL-12A2M_1P

H29

@

1

EMIST_SUL-12A2M_1P

H18

@

1

EMIST_SUL-12A2M_1P

H23

@

1

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

@

H_3P2

1

H51

@

1

EMIST_SUL-12A2M_1P

H27

@

EMIST_SUL-12A2M_1P

H30

@

EMIST_SUL-12A2M_1P

H19

@

EMIST_SUL-12A2M_1P

H24

@

Issued Date

Issued Date

Issued Date

H6

@

CLIP_C6

1

1

1

1

H1

@

H_2P3

1

H50

1

@

H_2P5

CLIP_C5P5

EMIST_SUL-12A2M_1P

H32

@

1

EMIST_SUL-12A2M_1P

H31

@

1

EMIST_SUL-12A2M_1P

H20

@

1

EMIST_SUL-12A2M_1P

H25

@

1

2011/08/25 2012/07/25

2011/08/25 2012/07/25

2011/08/25 2012/07/25

1

H10

H_2P1N

1

H55

@

CLIP_C5P5

1

EMIST_SUL-12A2M_1P

H52

@

EMIST_SUL-12A2M_1P

H36

@

EMIST_SUL-12A2M_1P

H35

@

EMIST_SUL-12A2M_1P

H34

@

Compal Secret Data

Compal Secret Data

Compal Secret Data

H2

@

H_2P3

1

H11

@

1

H54

@

1

1

1

1

Deciphered Date

Deciphered Date

Deciphered Date

1

H12

@

H_2P1X2P5N

H_6P0N

1

EMIST_SUL-12A2M_1P

H53

@

EMIST_SUL-12A2M_1P

H56

@

EMIST_SUL-12A2M_1P

H57

@

EMIST_SUL-12A2M_1P

H58

@

2

H9

@

H_2P5

1

H17

@

1

H_2P9X2P1N

1

1

1

1

@

H_3P0

@

H_2P8

@

H38

@

H37

H_3P0

1

1

H42

@

H41

H_2P8

1

1

H59

1

FD1
FIDUCAL@

1

H40

@

H39

@

H_2P5

H_2P5

H43

@

H_2P3

H49

@

H_2P3

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1

H47

@

H_6P0N

1

1

H48

@

H_4P1

1

1

FD3

FD2
FIDUCIAL@

1

TPM/BTB conn.

TPM/BTB conn.

TPM/BTB conn.
LA-C361P

LA-C361P

LA-C361P

FD4

FIDUCAL@

FIDUCIAL@

1

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

52 71Thursday, August 06, 2015

52 71Thursday, August 06, 2015

1

52 71Thursday, August 06, 2015

0.1(X00)

0.1(X00)

0.1(X00)

A

CONN@

ADP100

ACES_50290-00701-001

1 1

12

2 2

ACES_50290-01201-P01

PC107

100P_0402_50V8J

EMC

CONN@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

PL105

EMC

HCB2012KF-121T50_0805

EMC

PL107

HCB2012KF-121T50_0805

1 2

EMC

PL108

HCB2012KF-121T50_0805

1 2

12

PC108

EMC

0.01UF_0402_25V7K

BAT100

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

12

PL106

EMC

CLK_SMB
DAT_SMB
BATT_PRS#

12

12

PSID

12

12

12

PC106

EMC

HCB2012KF-121T50_0805

PD100

EMC

0.1U_0402_25V6

place near connect

BATT++VBATT

AZ5125-01H.R7G_SOD523-2

PC114

EMC

0.1U_0402_25V6

1 2

BLM15AG102SN1D_2P

EMC

EMC

PL104

PC115

0.1U_0402_25V6

EMC

12

12

PC109

PC110

EMC

EMC

1000P_0402_50V7K

1

PD101

TVNST52302AB0_SOT523-3

2

3

100P_0402_50V8J

PR106

100_0402_1%

1 2

PR108

100_0402_1%

1 2

1

TVNST52302AB0_SOT523-3

2

3

100_0402_1%

EMC

PD102

PBAT_SMBCLK [48]

PBAT_SMBDAT [48]

PR111

1 2

B

+DC_IN

PR112

10K_0402_1%

1 2

PBAT_PRES# [48,56]

+3VALW

C

@

PR100

0_0402_5%

1 2

PQ100
FDV301N-G_SOT23-3

1 3

D

G

2

B

VSB_N_002

12

2

PSID-2

C

PQ101
MMBT3904WH_SOT323-3

E

3 1

B+

VSB_N_003

13

D

2

G

S

12

PR103
100K_0402_1%

PSID-1

12

PR105
15K_0402_1%

+3VALW

12

@

PR109

100K_0402_1%

PR113

@

0_0402_5%

AUD_PWR_EN[20,52]

1 2

PC113

.1U_0402_16V7K

PR102

S

33_0402_5%

1 2

PSID-3

PR104

10K_0402_1%

1 2

PR107

1M_0402_5%

PR110

37.4K_0402_1%

1 2

PQ103
L2N7002WT1G_SC70-3

+5VALW

12

12

PC111

VSB_N_001

0.22U_0603_25V7K

D

+3VALW

12

PR101

2.2K_0402_1%

PQ1301

AON7409_DFN8-5

1
2
3 5

4

PS_ID [48]

12

PC112

0.1U_0402_25V6

EMC

+VSBP

Battery

3 3

4 4

(3S3P)

JIMBTY battery connector

SMART

SMART

SMARTSMART
Battery:

Battery:

Battery:Battery:

01.BAT+

01.BAT+

01.BAT+01.BAT+

02.BAT+

02.BAT+

02.BAT+02.BAT+

03.BAT+

03.BAT+

03.BAT+03.BAT+

04.BAT+

04.BAT+

04.BAT+04.BAT+

05.CLK_SMB

05.CLK_SMB

05.CLK_SMB05.CLK_SMB

06.DAT_SMB

06.DAT_SMB

06.DAT_SMB06.DAT_SMB

07.BATT_PRS

07.BATT_PRS

07.BATT_PRS07.BATT_PRS

08.SYS_PRS

08.SYS_PRS

08.SYS_PRS08.SYS_PRS

09.GND

09.GND

09.GND09.GND

10.GND

10.GND

10.GND10.GND

11.GND

11.GND

11.GND11.GND

12.GND

12.GND

12.GND12.GND

A

Smart Adapter circuit (39.1)

B

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR-DCIN / BATT CONN / OTP

PWR-DCIN / BATT CONN / OTP

PWR-DCIN / BATT CONN / OTP

LA-C361P

LA-C361P

LA-C361P

D

54 71Tuesday, August 11, 2015

54 71Tuesday, August 11, 2015

54 71Tuesday, August 11, 2015

0.1(X00)

0.1(X00)

0.1(X00)

PP_HV

VBUS_ACOK

PD205

@

SDMK0340L-7-F_SOD323-2

1 2

1 2

PR239

1.8M_0402_1%

@

3

+

2

-

PU201A

@

1 2

PR245

1 2

130K_0402_1%

PR247

@

1.8M_0402_1%

PR250

1 2

200K_0402_1%

@

13

D

2

G

S

PQ227
S TR 2N7002KW 1N SOT323-3

@

8

P

G

4

@

5

@

0_0402_5%

1 2

@

0_0402_5%

1 2

O

5
6

PR270

0_0402_5%

1 2

@

@

PR287

0_0402_5%

1 2

PR262

PR266

@

PD204

BAT54CW_SOT323-3

1 2

1

12

PC211

@

1000P_0402_50V7K

+3VALW

PD201

@

SDMK0340L-7-F_SOD323-2

1 2

PU201B

8

LM393DMR2G_MICRO8

P

+

7

VBUS_LPS_OVP

O

-

G

4

@

2

3

PR292

PR236

@

221K_0402_1%~D

S11 OVP

12

PC213

1200P_0402_50V7K

@

From EC

VBUS_HV_DIS#

1

2

12

100K_0402_5%

@

B+ POWER

B+

12

PR244

@

100K_0402_5%

12

PR237

100K_0402_5%

@

13

D

G

S

to TI PD GPIO

PR241

1 2

100K_0402_1%

@

1 2

PR27

0_0402_5%

@

S9

P-MOSFET

S

G

2

D

PQ215

1 3

@

NTR4502PT1G_SOT23-3

@

PD207

SDMK0340L-7-F_SOD323-2

PQ209

@

S TR 2N7002KW 1N SOT323-3

PWR_SRC_ILIMIT [39]

1 2

@

@

S TR 2N7002KW 1N SOT323-3

13

D

2

G

S

12

PC224

0.01U_0402_25V7K

@

PR242

PQ226

12

100K_0402_1%

PQ202

@

AON7409_DFN8-5

PQ207

@

S TR 2N7002KW 1N SOT323-3

PQ210

@

S TR 2N7002KW 1N SOT323-3

1
2
35

4

PR204

@

1M_0402_5%

12

PR210
22K_0402_5%

@

PR212

13

@

D

0_0402_5%

2

1 2

G

S

12

PR299

100K_0402_5%

@

13

D

2

G

S

12

PR269

@

100K_0402_5%

D

S

PQ234

@

S TR 2N7002KW 1N SOT323-3

VBUS_HV_DIS#[48,55]

@

+DC_IN_SS

remove source back

D D

+3VALW

USB type-C PD OCP

12

PR256

120K_0402_1%

@

INA199_OUT

C C

@

B B

+VBUS_1

PR248

150K_0402_1%

1 2

@

setting 5.5V

A A

LM393DMR2G_MICRO8

PR238

1 2

100K_0402_1%

PC210

1 2

@

220P_0402_50V7K

12

12

PC212

PR249

100P_0402_50V8J

100K_0402_1%

@

@

4

S8

P-MOSFET

PQ203

@

AON7409_DFN8-5

1
2
3 5

12

13

12

1 2

2

G

@

@

0_0402_5%

1 2

@

1 2

@

PC207

0.022U_0603_50V7K

From EC

PWR_SRC_ON [49]

PR214

PR274

100K_0402_1%

PR280

0_0402_5%

4

From TI PD GPIO

PWR_SRC_ON_PC [39]

+3V_VC

VBUS_ACOK

USB type-C Adapter / PD

PR290

S TR 2N7002KW 1N SOT323-3

PR261

12

PR263

16.5K_0402_1%

S11

AON7409_DFN8-5

PQ218

1 2

+VBUS_1

0_0402_5%

1 2

PR291

0_0402_5%

1 2

1 2

140K_0402_1%

DCIN_OK set 17V

2

G

PR225

PC214

PQ214

4

12

1M_0402_5%

13

D

S

100P_0402_50V8J

B+_IN

+SDC_IN

1
2
35

PC221

DCIN_ACOK

S TR 2N7002KW 1N SOT323-3

PR257

1 2

180K_0402_1%

1.8M_0402_1%

PR264

1 2

200K_0402_1%

1 2

@

0_0402_5%

12

0.022U_0603_50V7K

PR231

@

100K_0402_1%

1 2

1 2

PR259

5
6

PR208

12

+

-

INA199_OUT

PR219

1M_0402_5%

PQ223

@

+3V_VC

8

P

G

4

12

O

@

1 2

@

PR233

0_0402_5%

1 2

PU200

@

1

2

GND

3

V+

INA199A1DCKR_SC70-6

PC209

@

0.1U_0603_25V7K~D

12

PR220

100K_0402_5%

@

12

100K_0402_5%

@

13

D

2

G

S

PR251

PU202B
LM393DMR2G_MICRO8

7

DCIN_ACOK

PR246

0_1206_5%

Out6REF

@

5

IN-

4

IN+

PR229

From TI PD GPIO

EN_PD_HV[39]

DCIN_ACOK#

1 2

1 2

100K_0402_1%

13

2

G

12

PC216

100P_0402_50V8J

DCIN_ACOK [48]

@

0.01_1206_1%

342

@

44.2_0402_1%

1 2

PR211

0_0402_5%

1 2
1 2

PR207

@

0_0402_5%

S

G

2

PQ216

D

1 3

1 2

@

@

0_0402_5%

VBUS_HV_DIS#[48,55]

100K_0402_5%

+3V_VC

1

IN1

2

IN2

1 2

@

100K_0402_5%

PR253

PR252

100K_0402_1%

2

DCIN_ACOK#

G

PQ230

S TR 2N7002KW 1N SOT323-3

D

S

PR215

1

PR21

+AC_IN

12

PC208

@

0.022U_0603_50V7K

NTR4502PT1G_SOT23-3

PR227

PD211

1 2

SDMK0340L-7-F_SOD323-2

PR234

@

1 2

PC225

0.1U_0402_10V7K

1 2

5

VCC

4

1 2

OUT

PR282

GND

100K_0402_5%

3

PU204

MC74VHC1G08DFT2G_SC70-5

PR283

1 2

100K_0402_1%

PQ228

S TR 2N7002KW 1N SOT323-3

13

D

S

Vbus_AC Detector

3

Barrel Adapter

+DC_IN

12

12

AC_DIS[48,56]

P-MOSFET P-MOSFET

1
2
3 5

12

PR222

1M_0402_5%

2

+VBUS_DC_SS

VBUS_ACOK set 15V

P-MOSFET P-MOSFET

1
2
3 5

12

12

PC200

PR201

1M_0402_5%

0.022U_0603_50V7K

PR213

1M_0402_5%

2

PR217

1M_0402_5%

13

D

2

PQ211

G

@

S

S TR 2N7002KW 1N SOT323-3

S6 S7

PQ212
AON7409_DFN8-5

4

PC288

@

12

PR232
10K_0402_1%

13

D

G

PQ220

S

S TR 2N7002KW 1N SOT323-3

PR260

1 2

130K_0402_1%

PR273

S1 S2

PQ200
AON7409_DFN8-5

4

12

PR205

1M_0402_5%

13

D

G

S

+VBUS_DC_SS

12

@

0.022U_0603_50V7K

VBUS_ACOK

DCIN_ACOK#

12

16.5K_0402_1%

PC289

PQ208S TR 2N7002KW 1N SOT323-3

12

0.022U_0603_50V7K

0_0402_5%

1 2

0_0402_5%

1 2

PR267

PR235

1 2

+DC_IN_SS

DCIN_ACOK

PC215

0_0402_5%

1 2

AON7409_DFN8-5

PQ219

S TR 2N7002KW 1N SOT323-3

2

G

2

G

PQ232

S TR 2N7002KW 1N SOT323-3

PR254

1 2

1 2

100P_0402_50V8J

PR209

PQ213

4

12

PR226
100K_0402_5%

13

D

S

13

D

S

180K_0402_1%

PR265

200K_0402_1%

AON7409_DFN8-5

2

G

1
2
35

PR224

DCIN_ACOK

1 2

PR258

1.8M_0402_1%

PQ205

S TR 2N7002KW 1N SOT323-3

12

1M_0402_5%

3
2

PQ201

4

12

13

D

S

PC222

8

P

+

-

G

4

1
2
35

PR203
100K_0402_5%

DCIN_ACOK#

12

0.022U_0603_50V7K

PR228

0_0402_5%

1 2

PU202A
LM393DMR2G_MICRO8

1

O

2

EMI soultion for layout placement space

EMC

PL200

HCB2012KF-121T50_0805

PC203

EN4NC

12

EMC

1000P_0402_50V7K

5

PR271

HCB2012KF-121T50_0805

PC204

HCB2012KF-121T50_0805

EMC

100P_0402_50V8J

ALW_PWRGD_3V_5V[55,57]

1 2

100K_0402_1%

12

13

D

S

1 2
1 2

PL201

EMC

PL202

EMC

1 2

1 2

PL203

EMC

HCB2012KF-121T50_0805

PR272

2

G

PQ225

S TR 2N7002KW 1N SOT323-3

DAUL_IN

12

PR243

AC_DET

12

PR240

1 2

PR218

0_0402_5%

1 2

PR221

0_0402_5%

PD202

12

12

PD203

12

PC219

1U_0603_25V6

100K_0402_5%

100K_0402_5%

LDO_EN

12

12

PC202

0.1U_0402_25V6

EMC

PD_SENSEN [39]

PD_SENSEP [39]

PU203

VCC1OUT

2

GND

3

RT9069-33GB_SOT23-5

100K_0402_1%

12

PC220

0.022U_0603_50V7K

PR268

0_0402_5%

1 2

12

12

13

D

S

S

D

1 3

PR223

100K_0402_5%

PR230

100K_0402_5%

PQ222

S TR 2N7002KW 1N SOT323-3

2

PQ204

NTR4502PT1G_SOT23-3

2

G

12

G

12

13

D

S

342

PR202

100K_0402_5%

PR206

100K_0402_5%

PQ206

S TR 2N7002KW 1N SOT323-3

PR216

0.01_1206_1%

1

SDMK0340L-7-F_SOD323-2

12

PR200

100K_0402_5%

S

G

2

D

1 3

PQ217

NTR4502PT1G_SOT23-3

2

G

+DC_IN

PP_HV

SDMK0340L-7-F_SOD323-2

PR255

1 2

100K_0402_1%

VBUS_ACOK

12

PC217
100P_0402_50V8J

DCIN_ACOK

PQ229

@

S TR 2N7002KW 1N SOT323-3

13

D

2

G

S

12

+3VALW

PR277

0_0402_5%

1 2

+3V_LDO

LDO_EN

ALW_PWRGD_3V_5V [55,57]

3V LDO

1

12

PC205

EMC

1000P_0402_50V7K

2

12

PC218
1U_0402_16V6K

+3V_VC

+SDC_IN

PC201

EMC

PQ221
AO3413_SOT23-3

1 3

D

2

12

13

G

100P_0402_50V8J

12

D

S

G

PC206

15P_0402_50V8J

EMC

S

12

PR276
2K_0402_1%

PQ231

@

0_0402_5%

1 2

S TR 2N7002KW 1N SOT323-3

1 3

2

G

PR275

100K_0402_1%

PR281

PQ224
AO3413_SOT23-3

D

S

G

2

12

PR279
0_0402_5%

13

D

S

12

PC223

0.01U_0402_25V7K

+3V_VC

12

PR278

100K_0402_1%

PQ233

S TR 2N7002KW 1N SOT323-3

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

5

4

3

Docking Power Control(41.1), Support component(41.2)

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

2

Compal Electronics, Inc.

Title

Title

Title

Docking

Docking

Docking

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

LA-C361P

LA-C361P

LA-C361P

1

55 71Tuesday, August 11, 2015

55 71Tuesday, August 11, 2015

55 71Tuesday, August 11, 2015

5

4

3

2

1

D D

PD303

PR308

1 2

PC322

PD304

ACDET>14.5V

12

12

PC327

100P_0402_50V8J

12

12

PC328

+DC_IN_SS

SDMK0340L-7-F_SOD323-2

C C

BQ24777_REGN

12

PR311

100K_0402_1%

ACAV_IN[48]

B B

A A

PR312 0_0402_5%@

1 2

150K_0402_1%

12

PR316

GNDA_CHG

PR321

1K_0402_1%

@

PR323

121K_0402_1%

GNDA_CHG

+VBUS_DC_SS

SDMK0340L-7-F_SOD323-2

PQ304
S TR 2N7002KW 1N SOT323-3

13

D

AC_DIS[48,55]

BQ24777_REGN

12

12

2

G

12

S

GNDA_CHG

1 2

PR314 0_0402_5%@

1 2

PR317 0_0402_5%@

1 2

PR324 0_0402_5%@

GNDA_CHG

59K_0402_1%

0.1U_0402_25V6

H_PROCHOT#[9,48,64]

PBAT_PRES#[48,54]

PR327

100K_0402_5%

CHARGER_SMBDAT[48]

CHARGER_SMBCLK[48]

I_ADP[48]

I_BATT[48]

P_SYS[48,64]

+SDC_IN

PR399

1 2

@

0_0402_5%

PD302

SDMK0340L-7-F_SOD323-2

VBATT

12

PR303

4.02K_0402_1%

PR305

1 2

294K_0402_1%

12

100P_0402_50V8J

PR322 0_0402_5%@

PR306 0_0402_5%@
PR309 0_0402_5%@

12

PR325

1 2

PC319

1U_0805_25V6K

1 2
1 2

10K_0402_1%

12

1 2

100_0402_1%

PC311

1U_0603_25V6K

1 2

12

GNDA_CHG GNDA_CHG

12

PR304

10_1206_5%

CHARGER_SDA
CHARGER_SCL

PR315

GNDA_CHG

GNDA_CHG

PR300

0.01_1206_1%

4
3

CSSP_1

12

PR301

@

0_0402_5%

PC313

0.1U_0402_25V6

1 2

4

2

28

3

6
11
12

5

7

8

9
10

13
14

15

16
29

ACP

VCC

ACDRV

CMSRC
ACDET
SDA
SCL
ACOK
IADP
IDCHG
PMON
/PROCHOT

CMPIN
CMPOUT

/BATPRES

CELL
PWPD

PU300
BQ24777RUYR_WQFN28_4x4

@

PJP300

1 2

PAD-OPEN1x1m

+PWR_SRC_AC CHAGER_SRC

1
2

CSSN_1

12

PR302

@

0_0402_5%

PC314

0.1U_0402_25V6

1 2

BQ24777_REGN

1

ACN

24

REGN

BTST

HIDRV

PHASE

LODRV

/BATDRV

GND

NC

SRP
SRN

BAT

PC333

25

26

27

23

22

21

20
19

18
17

1 2

2.2_0603_5%

1 2

CHG_UGATE

CHG_SW

CHG_LGATE

10K_0402_1%

1 2

PR320

10_0603_1%

GNDA_CHG

PR307

PR318

1 2

PR319

4.02K_0402_1%

1 2

VBATT

EMC

PL300

HCB2012KF-121T50_0805

1 2

EMC

PL301

HCB2012KF-121T50_0805

1 2

PC320

1U_0603_10V6K

1 2

1 2

CHG_BTS_CCHG_BTS

BQ24777_REGN

1U_0603_25V6K

PC321

0.047U_0603_25V7M

PQ300

EMC

12

12

12

PC307

PC334

PC306

22U_0805_25V6M

0.1U_0402_25V6
2200P_0402_50V7K

PQ301

5

4

123

5

4

321

5

4

123

SIR472DP-T1-GE3_POWERPAK8-5

PQ302

SIR472DP-T1-GE3_POWERPAK8-5

3.3UH_PIMB104T-3R3MS_10A_20%

EMC

PR313

4.7_1206_5%

1 2

EMC

12

PC329

1000P_0603_50V7K

SIRA06DP-T1-GE_POWERPAKSO-8-5

+VCHGR

12

PC308

22U_0805_25V6M

PL302

1 2

GNDA_CHG

BATDRV#

12

12

PC309

22U_0805_25V6M

12

PC310

PC336

PC337

22U_0805_25V6M

22U_0805_25V6M

B+

12

PC315

10U_0805_25V6K

low noise MLCC for noise issue

B+

PR310

1
2

0.01_2512_1%

PC330

0.1U_0402_25V6

1 2

PC331

0.1U_0402_25V6

1 2

@

PD301

SX34H_SMA2

PQ303
AON7409_DFN8-5

1
2
3 5

4

21

12

22U_0805_25V6M

Polymer cap for noise issue

12

12

PC316

10U_0805_25V6K

+VCHGR

4
3

0.1U_0402_25V6

1 2

12

PC317

PC318

10U_0805_25V6K

10U_0805_25V6K

low noise MLCC for noise issue

12

12

@

PC323

PC332

EMC

0.1U_0603_25V7K

GNDA_CHG

PC325

PC324

10U_0805_25V6K

10U_0805_25V6K

VBATT

1

+

PC312

2

100U_D_20VM_R55M

12

12

PC326

10U_0805_25V6K

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

Charger controller(40.1), Support component(40.2)

5

4

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Charger

Charger

Charger

LA-C361P

LA-C361P

LA-C361P

0.1(X00)

0.1(X00)

56 71Tuesday, August 11, 2015

56 71Tuesday, August 11, 2015

56 71Tuesday, August 11, 2015

0.1(X00)

1

A

1 1

B+

EMC@

PL403

HCB2012KF-121T50_0805

1 2

EMC@

PL402

HCB2012KF-121T50_0805

1 2

@

PJP400

JUMP_43X118

2

112

1

12

+

PC420

2

100U_D_20VM_R55M

2 2

PC403

EMC

15P_0402_50V8J

12

+3VALWP

B++

12

12

PC405

PC404

0.1U_0402_25V6

EMC

PC406

10U_0805_25V6K

EMC

2200P_0402_50V7K

3.3UH_6.3A_20%_7X7X3_M

1 2

1

+

PC412

2

150U_B2_6.3VM_R35M

PL400

EMC

4.7_1206_5%

PR413

PQ400

12

SNUB_3V

12

PC414

EMC

680P_0603_50V7K

3 3

PR326

2.2K_0402_5%

ALWON[48]

1 2

3V/5VALW_EN

12

PC335

@

B

5

PR408

PR411

1 2

2.2_0603_5%

@

0_0402_5%

1 2

LX_3V

BST_3V

LG_3V

ALW_PWRGD_3V_5V[55]

4

123

MDV1528URH_PDFN33-8-5

+3VALWP

PC410

5

PQ402

4.7U_0603_6.3V6M

4

213

12

@

PC415

MDV1524URH_PDFN33-8-5

.1U_0402_16V7K

1 2

0.1U_0603_50V7K

3V/5VALW_EN

PR407

@

0_0402_5%

1 2

1 2

PR428

100K_0402_1%

BST1_3V BST1_5V

@

PC401

100P_0402_50V8J

1 2

PR401

68.1K_0402_1%

1 2

PR403

1 2

100K_0402_1%

1 2

PR405

16.9K_0402_1%

6

7

8

9

10

UG_3V

PR415

@

0_0402_5%

C

EN2

PGOOD

SW2

VBST2

DRVH2

+3VLP

12

PC400

4.7U_0603_6.3V6M

FB_3V

4

5

CS2

VFB2

PU400

TPS51285BRUKR_QFN20_3X3

VIN

DRVL2

12

11

12

12

PC418

0.1U_0402_25V6

B++

+3VALWP

12

3

VREG3

VREG5

13

12

PR400

@

0_0402_5%

FB_5V

2

VFB1

VO114DRVL1

PC419

4.7U_0603_6.3V6M

@

1 2

PAD-OPEN 4x4m

@

PC402

100P_0402_50V8J

1 2

PR402

154K_0402_1%

1 2

PR404

100K_0402_1%

1 2

PR406

1 2

10.2K_0402_1%

1

TP

CS1

EN1

VCLK

SW1

VBST1

DRVH1

15

PJP402

21

20

19

18

17

16

PR409

@

0_0402_5%

1 2

PR410

1 2

200_0402_1%

LX_5V

2.2_0603_5%

1 2

BST_5V

UG_5V

LG_5V

+3VALW

3V/5VALW_EN

PR412

D

+5VALWP

PC411

0.1U_0603_50V7K

1 2

PC416

@

.1U_0402_16V7K

@

1 2

PAD-OPEN 4x4m

12

PJP403

E

B++

12

PC407

0.1U_0402_25V6

EMC

1 2

PR414

4.7_1206_5%

EMCEMC

PC417

680P_0603_50V7K

PC409

10U_0805_25V6K

EMC

PL401

12

PC408

2200P_0402_50V7K

+5VALWP

1

+

PC413

2

150U_B2_6.3VM_R35M

5

12

PQ401

4

123

MDU1516URH_POWERDFN56-8-5

1.5UH_ETQP3W1R5WFN_9.5A_20%

12

5

PQ403

4

SNUB_5V

12

123

MDU1512RH_POWERDFN56-8-5

+5VALW

3.3VALWP
TDC 5.7A
Peak Current 8.1A
OCP current 9.7A

4 4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

3V/5V controller(35.1), Support component(35.2)

A

B

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

5VALWP
TDC 7.4A
Peak Current 10.5A
OCP current 12.6A

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR-3VALWP/5VALWP

PWR-3VALWP/5VALWP

PWR-3VALWP/5VALWP

LA-C361P

LA-C361P

LA-C361P

57 71Tuesday, August 11, 2015

57 71Tuesday, August 11, 2015

57 71Tuesday, August 11, 2015

E

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

D D

PR500

@

0_0402_5%

1 2

12

12

PR501

1M_0402_1%

B+

EMC

PL500

HCB2012KF-121T50_0805

C C

B B

1 2

12

PC502

PC503

EMC

EMC

2200P_0402_50V7K

12

12

0.1U_0402_25V6

12

PC506

@

PC504

10U_0805_25V6K

10U_0805_25V6K

B+_1V

ILMT_1V

PU500

8

IN

9

GND

3

ILMT

2

PG

SYX196DQNC_QFN10_3X3

Pin 7 BYP is for CS.
Common NB can delete +3VALW and PC513

BYP

LDO

1

EN

6

BST_1V

BS

10

LX_1V

LX

4

FB

7
5

PR503

@

0_0402_5%

1 2

12

12

PC512

PC513

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

0.1U_0402_25V6

+3VALW

PC505

1 2

@

PC500

0.22U_0402_10V6K

EMC EMC

PR502

4.7_1206_5%

1 2

SNB_1V

PL501

1 2

1UH_6.6A_20%_5X5X3_M

FB = 0.6V

PCH_ALW_ON [33,34,48]

680P_0603_50V7K

1 2

Rup

Rdown

PC501

12

PR504

90.9K_0402_1%

12

PR508
133K_0402_1%

12

12

PC507

220P_0402_50V8J

+1VSP
TDC 5.1A
Peak Current 7.2A
OCP current 8A

12

12

PC508

PC509

22U_0805_6.3VAM

22U_0805_6.3VAM

+1VSP +1VALW

@

PJP500

112

JUMP_43X118

12

PC511

PC510

22U_0805_6.3VAM

22U_0805_6.3VAM

2

+3VALW

12

@

0_0402_5%

12

@

0_0402_5%

PR510

ILMT_1V

PR512

VFB=0.6V
Vout=0.6V* (1+Rup/Rdown)
Vout=1V

A A

The current limit is set to 6A, 8A or 12A when this pin
is pull low, floating or pull high

PWR.Plane.Regulator(35.25), Support component(35.26)

5

4

Security Classification

Security Classification

Security Classification

2011/06/02 2013/10/28

2011/06/02 2013/10/28

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/02 2013/10/28

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

P40-PWR_+1VA

P40-PWR_+1VA

P40-PWR_+1VA
LA-C361P

LA-C361P

LA-C361P

58 71Tuesday, August 11, 2015

58 71Tuesday, August 11, 2015

58 71Tuesday, August 11, 2015

1

0.1

0.1

0.1

5

4

3

2

1

B+

EMC

PL601

HCB2012KF-121T50_0805

1 2

@

PJP600

JUMP_43X118

D D

112

2

+1.2V_DDR

@

PJP603

PAD-OPEN 4x4m

C C

B B

12

1.2V_B+

12

12

12

PC602

PC601

10U_0805_25V6K

10U_0805_25V6K

+1.2V_MEN_P

+

PL600

1UH_11A_20%_7X7X3_M

1 2

1

2

PC608

330U_D1_2VY_R9M

12

PC603

PC604

0.1U_0402_25V6

EMC

EMCEMC EMC

2200P_0402_50V7K

5

PQ600

4

123

MDV1527URH_POWERDFN33-8-5

4.7_1206_5%

12

5

PR602

PQ601

SNUB_1.2V

12

PC611

4

213

MDV1522URH_PDFN33-8-5

680P_0603_50V7K

SUS_ON_EC_P[34]

SM_PG_CTRL[9]

RUN_ON_P[34,61]

PC600

0.22U_0603_16V7K

1 2

+5VALW

+3VS

@

0_0402_5%

1 2

@

0_0402_5%

1 2

@

0_0402_5%

PR600

2.2_0603_5%

1 2

PR603

5.1_0603_5%

1 2

PR606

0.1U_0402_10V7K

PR608

PR610

12

3.57K_0402_1%

1 2

12

PC610
1U_0603_10V6K

@

1 2

100K_0402_5%

PC613

@

BOOT_1.2V

DH_1.2V

SW_1.2V

PR601

PC607

1U_0603_10V6K

1 2

VDD_1.2V

PR609

12

12

PC614

@

0.1U_0402_10V7K

DL_1.2V

CS_1.2V

+5VALW

+1.2V_PW ROK

1.2V_B+
S5_1.2V

15

DL

14

PGND

13

CS

12

VPP

11

VCC

PR605

1M_0402_1%

1 2

16

G5616ARZ1U_TQFN20_3X3

10

18

17

LX

DH

PU600

PGOOD

TON

8

9

+VLDOIN_1.2V

20

19

7

VLDOIN

S3

VTT

PAD

VTTGND

VTTSNS

GND

VTTREF

VDDQSNS

VDDQSET

6

BST

S5

21
1

2

3

4

5

1.2V_FB

@

PJP601

12

PAD-OPEN1x1m

+1.2V_MEN_P

PR604

16.2K_0402_1%

1 2

@

22P_0402_50V8J

1 2

12

PR607
27K_0402_1%

PC612

+1.2V_MEN_P

+0.6VSP

1 2

@

+0.6VS

PJP602

PAD-OPEN 3x3m

12

12

PC606

PC605

10U_0805_6.3V6M

10U_0805_6.3V6M

+V_DDR_REF

12

PC609
.1U_0402_16V7K

FB sense trace

0.6Volt +/- 5%

1.2Volt +/- 5%
TDC 4.2A
Peak Current 6A

TDC 0.7A
Peak Current 1A
OCP Current 1.2A

OCP current 7.2A

A A

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

+1.35V_MEN/+0.675V_DDR_VTT

+1.35V_MEN/+0.675V_DDR_VTT

+1.35V_MEN/+0.675V_DDR_VTT

LA-C361P

LA-C361P

LA-C361P

59 71Tuesday, August 11, 2015

59 71Tuesday, August 11, 2015

59 71Tuesday, August 11, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

DDR controller(35.3), Support component(35.4)

5

Title

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

5

D D

4

+5VALW

DIS@

PC700

1U_0603_10V7K

1 2

+1.35V_VSNS

12

3

+1.35V_RUN_B+

2

EMC@

HCB2012KF-121T50_0805

PL701

@

PJP700

PAD-OPEN 3x3m

12

12

1

B+

PC701

DIS@

12

PR700

210K_0402_1%

DIS@

+3VS

PR704

DIS@

24

REFIN2

25

REFIN

26

VREF

27

RA

28

EN

29

TP

12

210K_0402_1%

DIS@

C C

DIS@

PC708

.1U_0402_16V7K

1 2

B B

PR701

100K_0402_1%

1 2

FBVDD_EN[23,32]

ALL_GPWRGD[23]

REF_+1.35V_RUNP

PR705

@

0_0402_5%

1 2

DIS@

4700P_0402_25V7K

22

21

23

GSNS

PGOOD1LP#2MODE

20

VSNS

TRIP

SLEW

DIS@

TPS51367RVER_QFN28_4P5X3P5

NC

4

3

PC713

DIS@

19

17V518

GND

PU700

BST5SW6SW7SW8SW

BST_+1.35VRUN

12

12

.1U_0603_25V7K

15

VIN

VIN16VIN

14

PGND

13

PGND

12

PGND

11

PGND

10

PGND

9

SW_+1.35VRUN

PR703

5.1_0603_5%

DIS@

DIS@

12

PC702

EMC

47P_0402_50V8J

DIS@

12

EMC

PC709

33P_0603_50V8J

12

DIS@

EMC

PR702

10_1206_5%

DIS@

0.68UH_PCMC063T-R68MN_15.5A_20%

12

PC703

EMC

.1U_0402_16V7K

PL700

1 2

DIS@

12

PC704

EMC

2200P_0402_50V7K

1

PC710

2

22U_0805_6.3VAM

DIS@

12

12

PC705

4.7U_0603_25V6K

DIS@

1

PC711

2

22U_0805_6.3VAM

DIS@

DIS@

12

PC706

PC707

4.7U_0603_25V6K

4.7U_0603_25V6K

@

DIS@

+1.35VSDGPU

1

1

PC755

PC712

22U_0805_6.3VAM

2

2

@

22U_0805_6.3VAM

+1.35V_VSNS

@

PJP701

1 2

PAD-OPEN 4x4m

@

PJP702

1 2

PAD-OPEN 4x4m

1.35Volt +/-5%
TDC 10.2A
Peak Current 13.8A
OCP current 16A (Fix)

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DDR controller(35.3), Support component(35.4)

5

4

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR_+1.5VDGPU

PWR_+1.5VDGPU

PWR_+1.5VDGPU

LA-C361P

LA-C361P

LA-C361P

60 71Tuesday, August 11, 2015

60 71Tuesday, August 11, 2015

60 71Tuesday, August 11, 2015

1

1.0(A00)

1.0(A00)

1.0(A00)

5

4

3

2

1

D D

PR800

@

0_0402_5%

1 2

12

12

PR801

1M_0402_1%

B+

HCB2012KF-121T50_0805

EMC

PL800

C C

B B

1 2

12

12

12

12

PC806

PC804

PC802

PC803

EMC

EMC

2200P_0402_50V7K

@

10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6

B+_0.95V

ILMT_0.95V

PU800

8

IN

9

GND

3

ILMT

2

PG

SYX196DQNC_QFN10_3X3

Pin 7 BYP is for CS.
Common NB can delete +3VALW and PC812

BYP

LDO

1

EN

6

BST_0.95V

BS

10

LX

4

FB

7
5

LX_0.95V

12

PR803

@

0_0603_5%

1 2

PC813

4.7U_0603_6.3V6K

0.1U_0603_25V7K

12

PC812

4.7U_0603_6.3V6K

1 2

PC805

+3VALW

+3VALW

12

@

0_0402_5%

12

PR812
0_0402_5%

@

PR811

ILMT_0.95V

Vout=0.6V* (1+Rup/Rdown)

VFB=0.6V
Vout=0.95V

@

PC800

0.22U_0402_10V6K

PR802

4.7_1206_5%

1 2

1 2

1UH_6.6A_20%_5X5X3_M

EMC EMC

680P_0603_50V7K

1 2

SNB_0.95V

PL801

FB = 0.6V

Rdown

PC801

RUN_ON_P [34,59]

12

PC807

220P_0402_50V8J

1 2

PR804

36.5K_0402_1%

Rup

12

PR806
62K_0402_1%

1 2

12

PR813

PR809

@

0_0402_5%

PR810

12

100_0402_1%

12

100_0402_1%

1 2

@

+0.95V
TDC 3.9A
Peak Current 5.5A
OCP current 6A

12

12

PC808

PC809

22U_0805_6.3VAM

22U_0805_6.3VAM

VCCIO_SENSE [11]

PR808
0_0402_5%

VSSIO_SENSE [11]

+0.95VSP +VCCIO

@

PJP800

2

112

JUMP_43X118

12

PC811

PC810

22U_0805_6.3VAM

22U_0805_6.3VAM

A A

The current limit is set to 6A, 8A or 12A when this pin
is pull low, floating or pull high

1.05V controller(35.5), Support component(35.6)

5

Security Classification

Security Classification

Security Classification

2011/06/02 2013/10/28

2011/06/02 2013/10/28

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

2011/06/02 2013/10/28

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P40-PWR_+0.95VA

P40-PWR_+0.95VA

P40-PWR_+0.95VA
LA-C361P

LA-C361P

LA-C361P

0.1

0.1

0.1

61 71Tuesday, August 11, 2015

61 71Tuesday, August 11, 2015

61 71Tuesday, August 11, 2015

1

5

4

3

2

1

SNB_1.05V

PL901

FB = 0.6V

Rdown

+3.3V_GFX_RUN

3V3_MAIN_EN [23,32,63]

DIS@

PC901

680P_0603_50V7K

1 2

12

Rup

DIS@

12

PR906
133K_0402_1%

PR904

DIS@

+1.05VSP
TDC 2.1A
Peak Current 2.9A
OCP current 6A

+1.05VSP

@

PJP900

112

12

PC911

@

22U_0805_6.3VAM

JUMP_43X118

12

100K_0402_1%

12

PC907

PC908

DIS@

22U_0805_6.3VAM

220P_0402_50V8J

DIS@

DIS@

12

12

PC910

PC909

22U_0805_6.3VAM

22U_0805_6.3VAM

DIS@

+1.05VSDGPU

2

D D

12

DIS@

PR901

1M_0402_1%

B+

C C

B B

DIS@

HCB2012KF-121T50_0805

EMC

PL900

1 2

PC905

EMC

DIS@

PU900

B+_1.05V

12

12

12

PC902

EMC

10U_0805_25V6K

0.1U_0402_25V6

2200P_0402_50V7K

DIS@

+3VALW

1.05V_DGPU_PG[23]

12

PC903

PC904

@

DIS@

10U_0805_25V6K

DIS@

PR905

10K_0402_5%

1 2

PR907

@

0_0402_5%

1 2

1.05VA_PG

8

IN

9

GND

3

ILMT_1.05V

ILMT

2

PG

SYX196DQNC_QFN10_3X3

DIS@

Pin 7 BYP is for CS.
Common NB can delete +3VALW and PC913

BYP
LDO

1

EN

6

BST_1.05V

BS

10

LX

4

FB

7
5

LX_1.05V

12

PR903

@

0_0603_5%

1 2

PC912

DIS@

4.7U_0603_6.3V6K

12

DIS@

4.7U_0603_6.3V6K

12

DIS@

PC906

0.1U_0603_25V7K

1 2

+3VALW

PC913

PC900

0.1U_0402_25V6

DIS@

@

PR900

0_0402_5%

1 2

DIS@

PR913

62K_0402_1%

1 2

DIS@

EMC EMC

PR902

4.7_1206_5%

1 2

DIS@

1 2

1UH_6.6A_20%_5X5X3_M

+3VALW

12

@

0_0402_5%

12

PR912
0_0402_5%

@

PR910

ILMT_1.05V

VFB=0.6V
Vout=0.6V* (1+Rup/Rdown)
Vout=1.05V

A A

GPU other power_Regulatorr(43.7), Support component(43.8)

The current limit is set to 6A, 8A or 12A when this pin
is pull low, floating or pull high

5

4

Security Classification

Security Classification

Security Classification

2011/06/02 2013/10/28

2011/06/02 2013/10/28

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/02 2013/10/28

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

P40-PWR_+1.05VA

P40-PWR_+1.05VA

P40-PWR_+1.05VA
LA-C361P

LA-C361P

LA-C361P

62 71Tuesday, August 11, 2015

62 71Tuesday, August 11, 2015

62 71Tuesday, August 11, 2015

1

0.1

0.1

0.1

GPU_VSS_SENSE[24]

GPU_VDD_SENSE[24]

+VGA_B+

+GPU_CORE

12

DIS@

PR1009

20_0402_1%

1 2

DIS@

1 2

DIS@

@

PR1018

15.8K_0402_1%

1 2

0.01UF_0402_25V7K

PC1000

0.1U_0402_25V6

DIS@

PR1012

@

0_0402_5%

1 2

PR1013

100_0402_1%

1 2

PR1015

@

0_0402_5%

PR1017

100_0402_1%

1 2

.01U_0402_16V7K

1 2

@

PC1046

DIS@

@

1 2

PC1045

GPU_CORE (0.95V)
TDC 51A
Peak Current 87A
OCP current 100A

PR1000

@

DIS@

12

PR1002

19.6K_0402_1%

12

PC1009
2700P_0402_50V7K

GPU_REFIN
GPU_VREF
GPU_TON
GPU_FBRTN
GPU_FB

GPU_COMP

DIS@

PR1020

10K_0402_1%

1 2

20K_0402_1%

1 2

DIS@

PR1022

10K_0402_1%

1 2

DIS@

0_0402_5%

1 2

DIS@

PR1004

10K_0402_1%

1 2

10
11
12

7
8
9

PR1023

DIS@

PU1000

REFIN
VREF
TON
RGND
VSNS
SS

DIS@

GND

25

GPU_REFADJ

GPU_VID

5

6

VID

REFADJ

TALERT/ISEN2

TSNS/ISEN313PGOOD

14

+3.3V_GFX_AON

12

Pull high by EE side

U2_BOOT1

U2_UGATE1U2_UGATE2

GPU_EN

1

4

3

2

EN

PSI

BOOT1

UGATE1

GND/PWM3

BOOT218UGATE2

VCC/ISNE1

17

16

15

GPU_PGOOD

U2_BOOT2

1_0402_5%

1 2

PR1001
10K_0402_1%

GPU_PSI [23]

@

PR1006

47K_0402_1%

1 2

PR1028

47K_0402_1%

1 2

DIS@

12

PC1011

0.01UF_0402_25V7K

DIS@

12

24

PHASE1

23

LGATE1

22
21

PVCC

20

LAGTE2

19

PHASE2

RT8813AGQW_WQFN24_4X4

PR1024

DIS@

DGPU_PWROK [18]

Pull high by EE side

GPU_EN

+5VS

OCP set 100A

DIS@

PR1011

9.1K_0402_1%

+3.3V_GFX_RUN

U2_PHASE1
U2_LGATE1
U2_PWM3
GPU_PVCC
U2_LGATE2
U2_PHASE2

PR1025

@

0_0402_5%

1 2

3V3_MAIN_EN [23,32,62]

12

DIS@

.1U_0603_25V7K

RT9610BZQW_WD FN8_2X2~D

1

EN

8

VCC

5

U2_PWM3

PWM

6

GND

9

GND

U2_UGATE1

U2_BOOT1

U2_PHASE1

U2_LGATE1

DIS@

PR1014

2.2_0603_5%

1 2

PC1042

U2_UGATE2

U2_BOOT2

U2_PHASE2

U2_LGATE2

DIS@

PU1001

UGATE

BOOT

PHASE

LGATE

DIS@

PR1007

2.2_0603_5%

1 2

+5VS

PR1019

2.2_0603_5%

1 2

DIS@

3

U2_UGATE3

4

U2_BOOT3

2

U2_PHASE3

7

U2_LGATE3

DIS@

PC1010

0.1U_0603_50V7K

1 2

PC1047

0.1U_0603_50V7K

1 2

DIS@

DIS@

PR1026

2.2_0603_5%

1 2

DIS@

PC1067

0.1U_0603_50V7K

1 2

2

3
4

2

3
4

2

3
4

DIS@

PQ1000

1

CSD87351Q5D_SON8-7

7
6
5

8

DIS@

PQ1001

1

CSD87351Q5D_SON8-7

7
6
5

8

PQ1002

1

CSD87351Q5D_SON8-7

8

12

PC1001

10U_0805_25VAK

DIS@

DIS@

DIS@

DIS@

7
6
5

12

12

PC1002

DIS@

0.22UH_24A_+-20%_7X7X4_M

12

12

PC1006

@

PC1005

10U_0805_25VAK

EMC

EMC

47P_0402_50V8J

DIS@

1 2

DIS@

PL1000

PR1008

10_1206_5%

EMCEMC

PC1025

47P_0603_50V8J

12

12

12

PC1039

PC1038

PC1037

EMC

10U_0805_25VAK

10U_0805_25VAK

DIS@

DIS@

47P_0402_50V8J

DIS@

0.22UH_24A_+-20%_7X7X4_M

12

PR1021

DIS@

10_1206_5%

EMCEMC

12

DIS@

PC1055

47P_0603_50V8J

12

PC1060

PC1061

10U_0805_25VAK

DIS@

DIS@

0.22UH_24A_+-20%_7X7X4_M

12

DIS@

EMC

PR1027
10_1206_5%

DIS@

12

EMC

PC1068
47P_0603_50V8J

12

0.1U_0402_25V6

@

10U_0805_25VAK

+VGA_B+

@

PC1040

EMC

12

12

PC1007

EMC

2200P_0402_50V7K

12

0.1U_0402_25V6

DIS@

1 2

PC1064

EMC

DIS@

DIS@

1 2

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1

+

2

PC1022

DIS@

330U_B2_2.5VM_R9M

+VGA_B+

12

PC1041

@

EMC

2200P_0402_50V7K

PL1001

12

12

PC1065

@

@

0.1U_0402_25V6

EMC

47P_0402_50V8J

PL1002

EMCDIS@

EMCDIS@

1

+

2

+VGA_B+

PC1066

EMC

PC1023

DIS@

2200P_0402_50V7K

PL1004

PL1003

330U_B2_2.5VM_R9M

12

12

12

+GPU_CORE

1

+

2

PC1024

DIS@

330U_B2_2.5VM_R9M

B+

+GPU_CORE (place under GPU)

12

12

12

PC1012

PC1014

PC1013

4.7U_0603_6.3VAK

DIS@

4.7U_0603_6.3VAK

DIS@

DIS@

12

+GPU_CORE (place near GPU)

12

12

12

12

12

PC1052

PC1048

PC1071

PC1072

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

DIS@

DIS@

Under:

1. 4.7uF*15 (SE000008L80)

2. 1uF*8(SE00000WV00)
Near:

1. 4.7uF*5 (SE093475K80)

2. 22uF*14 (SE000001120)

22U_0603_6.3V6M

DIS@

DIS@

GPU_VID_0[23]

DIS@

PR1003

2K_0402_1%

1 2

12

12

PC1008

@

PR1005

18.2K_0402_1%
.01U_0402_16V7K

PR1010

DIS@

340K_0402_1%

1 2

12

PC1029

@

.01U_0402_16V7K

@

PC1036

33P_0402_50V8J

1 2

1 2

@

PR1016

0_0402_5%

U2_PHASE3

U2_PHASE2

U2_PHASE1

DELL CONFIDENTIAL/PROPRIETARY

VGA_CORE controller(43.1), Support component(43.2)
VGA_CORE Drivers (43.3), GPU Core Output CAP (43.9)

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DCR 0.97mohm +/- 5%
TYP MAX

H/S Rds(on) : 7.4mohm , 8.8mohm
L/S Rds(on) : 2.6mohm , 3.1mohm

12

12

12

12

PC1017

PC1015

PC1016

4.7U_0603_6.3VAK

4.7U_0603_6.3VAK

4.7U_0603_6.3VAK

DIS@

DIS@

DIS@

12

PC1033

DIS@

12

12

12

PC1063

PC1070

PC1069

1U_0402_6.3VAK

1U_0402_6.3VAK

1U_0402_6.3VAK

DIS@

DIS@

DIS@

DIS@

12

12

PC1049

4.7U_0603_6.3V6K

DIS@

DIS@

12

12

12

PC1075

PC1074

PC1073

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

DIS@

DIS@

DIS@

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

PC1019

4.7U_0603_6.3VAK

4.7U_0603_6.3VAK

DIS@

DIS@

12

12

PC1034

4.7U_0603_6.3VAK

4.7U_0603_6.3VAK

DIS@

DIS@

12

12

PC1044

PC1043

1U_0402_6.3VAK

1U_0402_6.3VAK

DIS@

1

2

PC1054

PC1053

4.7U_0805_6.3V6K

4.7U_0805_6.3V6K

DIS@

DIS@

12

PC1077

PC1079

22U_0603_6.3V6M

22U_0603_6.3V6M

DIS@

DIS@

12

12

PC1057

@

15P_0402_50V8J

VGA_CORE

VGA_CORE

VGA_CORE

LA-C361P

LA-C361P

LA-C361P

12

PC1020

4.7U_0603_6.3VAK

DIS@

12

PC1028

4.7U_0603_6.3VAK

PC1004

1U_0402_6.3VAK

DIS@

1

2

12

PC1080

DIS@

PC1058

@

15P_0402_50V8J

12

PC1018

4.7U_0603_6.3VAK

DIS@

12

PC1027

4.7U_0603_6.3VAK

DIS@

12

PC1062

1U_0402_6.3VAK

DIS@

1

2

PC1051

4.7U_0603_6.3V6K

12

PC1076

22U_0603_6.3V6M

DIS@

12

PC1056

@

15P_0402_50V8J

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

12

4.7U_0805_6.3V6K

22U_0603_6.3V6M

PC1021

4.7U_0603_6.3VAK

PC1035

4.7U_0603_6.3VAK

DIS@

PC1003

DIS@

+GPU_CORE

PC1050

DIS@

12

DIS@

12

@

+GPU_CORE

1U_0402_6.3VAK

12

PC1081

22U_0603_6.3V6M

PC1059

15P_0402_50V8J

63 71Tuesday, August 11, 2015

63 71Tuesday, August 11, 2015

63 71Tuesday, August 11, 2015

12

PC1082

PC1083

22U_0603_6.3V6M

22U_0603_6.3V6M

DIS@

DIS@

1.0(A00)

1.0(A00)

1.0(A00)

5

PR1100

12.1K_0402_1%

D D

C C

B B

A A

1 2

1 2

PR1104

1 2

95.3K_0402_1%

1 2

330P_0402_50V7K

47P_0402_50V8J

1 2

PC1105

8200P_0402_25V7K

ISUMP_GT[66]

ISUMN_GT[66]

FCCM_GT[66]
PWM1_GT[66]
PWM2_GT[66]

PC1100

4700P_0402_25V7K

PC1103

PC1104

1 2

1 2

PR1111

3.6K_0402_1%

PH1102

10K_0402_5%_B25/50 4250K

PH1100

470K_0402_5%_ TSM0B474J4702RE

1 2

1 2

PR1106

27.4K_0402_1%

VCCGT_SENSE[12]
VSSGT_SENSE[12]

12

PR1122

12

2.61K_0402_1%

12

12

PR1123

11K_0402_1%

12

PC1133

0.22U_0402_16V7K

12

PC1119

.1U_0402_16V7K

PC1138

470P_0402_50V7K

1 2

PC1106
680P_0402_50V7K

1 2

PR1113

2.94K_0402_1%

1 2

Droop of GT at 2.65mV/A

12

PC1109

0.01UF_0402_25V7K

PC1112

@

0.033U_0402_16V7K

PR1137

90.9K_0402_1%

NTC of GT at 100 deg

PR1105

10.2K_0402_1%

1 2

PC1139

1000P_0402_50V7K

1 2

PR1143

2K_0402_1%

12

PR1112
1K_0402_1%

1 2

PR1127

1 2

1K_0402_1%

PR1130

1 2

470_0402_1%

OCP of GT at 66.71A

0.022U_0402_25V7K

12

12

PC1113

1 2

2200P_0402_50V7K

PC1122

1 2

PC1125

0.022U_0402_25V7K

1 2

PC1129

330P_0402_50V7K

4

+VCCST

12

PC1137

12

PR1131

45.3_0402_1%

+3VS

1.91K_0402_1%

1 2

PR1119

@

0_0402_5%

1 2

P_SYS[48,56]

ISEN2_GT [66]

ISEN1_GT [66]

NTC of CORE at 100 deg

PR1144

10.2K_0402_1%

1 2

12

PC1131

68P_0402_50V8J

12

PR1114

PR1145

10_0402_1%

1 2

@

0_0402_5%

1 2
1 2

49.9_0402_1%

1 2

12

1 2

100_0402_1%

PR1318

PR1132

PR1319

PR1103

100_0402_1%

PR1118

@

0_0402_5%

1 2

1

PSYS

2

IMON_B

3

NTC_B

4

COMP_B

5

FB_B

6

RTN_B

7

ISUMP_B

8

ISUMN_B

9

ISEN1_B

10

ISEN2_B

11

FCCM_B

12

PWM1_B

49

EP

PR1141

4.87K_0402_1%

PC1134

8200P_0402_25V7K

0.1U_0402_10V7K

VR_SVID_DATA[9]

VR_SVID_ALERT#[9]
VR_SVID_CLK[9]

H_PROCHOT#[9,48,56]

IMVP_VR_PG[ 18]

VR_ON[34]

PH1104

PR1138

1 2

1 2

27.4K_0402_1%

470K_0402_5%_ TSM0B474J4702RE

VR_SVID_DATA_C

VR_SVID_ALERT#_C
VR_SVID_CLK_C

47

48

VR_ENABLE

PWM2_B13NTC_A15COMP_A16FB_A17RTN_A18ISUMP_A19ISUMN_A

14

46

VR_HOT#

VR_READY

IMON_A

+5VS Vcore_B+

12

PR1101

1_0402_5%

44

45

42

43

SDA

SCLK

ALERT#

12

PR1139

12

PC1132

12

PR1102

@

0_0402_5%

39

38

40

41

VIN

VCC

PROG2

PROG3

PROG437PROG1

ISEN1_A21ISEN2_A22ISEN3_A23FCCM_A

20

24

PR1133

1 2

390_0402_1%

PC1128

1 2

2200P_0402_50V7K

2K_0402_1%

680P_0402_50V7K

PU1100

ISL95829HRTZ-T_TQFN48_6X6

PROG5

PWM_C

FCCM_C
ISUMN_C
ISUMP_C

RTN_C

FB_C

COMP_C

IMON_C
PWM3_A
PWM2_A
PWM1_A

ISEN3_VCORE[65]

ISEN2_VCORE[65]

36
35
34
33
32
31
30
29
28
27
26
25

PR1135

1 2

1K_0402_1%

ISEN1_VCORE[65]

1 2

1K_0402_1%

3

PC1101

1U_0402_16V6K

1 2

1 2

PC1102

0.22U_0603_16V7K

12

12

PR1107

165K_0402_1%

PR1116

48.7K_0402_1%

1 2

1 2

PC1120 0.022U_0402_25V7K

OCP of Vcore at 83.2A

1 2

PC1130

PR1140

470P_0402_50V7K

12

PR1142

2.43K_0402_1%

Droop of CORE at 1.8mV/A

12

12

PR1110
110K_0402_1%

PR1108

PR1109

16.9K_0402_1%

5.62K_0402_1%

PWM_SA [66]
FCCM_SA [66]

PWM3_VCORE [65]
PWM2_VCORE [65]
PWM1_VCORE [65]

FCCM_VCORE [65]

1 2

PC1123 0.022U_0402_25V7K

1 2

PC1124 0.022U_0402_25V7K

2

PROG sets (Base on FNTBD.6 July 25, 2014)
PROG1 Vboot :0V
slew rate :30 mV/uS
PROG2 IMAX VR A :70A
PROG3 IMAX VR A :55A
DROOP VR GT :Active
PROG4 DROOP VR A: Active
DROOP VR SA :Active
VR A and VR GT SWITCHING FREQUENCY:583 (kHz)
PROG5 VR SA IMAX(A):12A
VR SA SWITCHING FREQUENCY :450 (kHz)

OCP of SA at 16.78A

PR1115

1 2

1.18K_0402_1%

PC1108

2200P_0402_50V7K

12

PR1129

VCC_SENSE [10]

PR1117

12

12

1K_0402_1%

12

12

PR1126

12

113K_0402_1%

2.05K_0402_1%

12

PC1114

330P_0402_50V7K

12

PC1115

12

68P_0402_50V8J

PC1117

2200P_0402_50V7K

12

12

PC1126

PC1127

.1U_0402_16V7K

VSS_SENSE [10]

12

PC1107

0.01UF_0402_25V7K

12

PR1124

PC1116

.047U_0402_16V7K

PC1110

.1U_0402_16V7K

2K_0402_1%

680P_0402_50V7K

12

12

PC1111

.047U_0402_16V7K

1 2

PR1125

220P_0402_50V8J

1K_0402_1%

1 2

PR1128

2.49K_0402_1%

Droop of SA at 9.1mV/A

12

PR1134

PC1135

0.22U_0402_16V7K

1 2

PC1118

11K_0402_1%

12

12

PC1136

@

0.1U_0402_25V6

12

10K_0402_5%_B25/50 4250K

12

PR1136

PR1120

VCCSA_SENSE [11]

PH1103

2.61K_0402_1%

11K_0402_1%

12

10K_0402_5%_B25/50 4250K
PH1101

12

PR1121

2.61K_0402_1%

ISUMN_VCORE [65]

ISUMP_VCORE [65]

12

PC1121

0.01UF_0402_25V7K

ISUMN_SA [66]

ISUMP_SA [66]
VSSSA_SENSE [ 11]

1

Title

Title

Title

<Title>

<Title>

CPU_Vcore controller(36.1),Drivers(36.2), Support component(36.3)

5

4

3

Acoustic Noise B+ Bulk CAP(37.2)

2

<Title>

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-C361P <RevCode>

Custom

LA-C361P <RevCode>

Custom

LA-C361P <RevCode>

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

64 71Tuesday, August 11, 2015

64 71Tuesday, August 11, 2015

64 71Tuesday, August 11, 2015

1

5

4

3

2

1

13
12
11
10
9
8
7

PWM3_VCORE[64]

ISEN1_VCORE[64]

ISUMP_VCORE[64]

ISUMN_VCORE[64]

+5VS

PR1204

EMCEMCEMC

PC1234

+5VS

PR1208

PC1255

EMC

PWM1_VCORE [64]

+5VS

12

PR1200

EMCEMC

10_1206_5%

12

PC1209

47P_0603_50V8J

Vcore_B+

12

10_1206_5%

12

47P_0603_50V8J

ISEN2_VCORE[64]

ISUMP_VCORE

ISUMN_VCORE

Vcore_B+

12

10_1206_5%

12

47P_0603_50V8J

ISEN3_VCORE[64]

ISUMP_VCORE

Vcore_B+

ISUMN_VCORE

12

PR1201

100K_0402_1%

12

PR1205

100K_0402_1%

ISEN1_VCORE

ISEN3_VCORE

12

PR1209

100K_0402_1%

PL1200

0.22UH_24A_+-20%_7X7X4_M

1 2

12

PR1218
0_0402_5%

@

󴅟󵕻󳁓󲹏

12

PR1202

3.65K_0603_1%

ISEN2_VCORE

ISEN3_VCORE

PL1201

0.22UH_24A_+-20%_7X7X4_M

1 2

12

PR1220
0_0402_5%

@

󴅟󵕻󳁓󲹏

12

PR1206

3.65K_0603_1%

PL1202

0.22UH_24A_+-20%_7X7X4_M

1 2

12

PR1222
0_0402_5%

@

󴅟󵕻󳁓󲹏

12

PR1210

3.65K_0603_1%

PR1211

ISEN1_VCORE

ISEN2_VCORE

PR1203

PR1207

12

12

1 2

2.2_0402_1%

12

1 2

2.2_0402_1%

PR1223
0_0402_5%

@

2.2_0402_1%

PR1219
0_0402_5%

@

V1N

PR1221
0_0402_5%

@

V2N

1 2

+VCC_CORE

12

12

PR1213

PR1212

100K_0402_1%

100K_0402_1%

12

12

PR1215

PR1214

100K_0402_1%

100K_0402_1%

V3N

12

12

PR1217

PR1216

100K_0402_1%

100K_0402_1%

B+

@

HCB2012KF-121T50_0805

1 2

PL1203

HCB2012KF-121T50_0805

1 2

PJP1200

@

D D

112

JUMP_43X118

PL1204

Vcore_B+

EMC

EMC@

2

1

+

2

PC1256

100U_D_20VM_R55M

4.7U_0402_6.3V6M

1

+

2

PC1210

100U_D_20VM_R55M

PC1200

12

PC1211

10U_0805_25VAK

1 2

PC1212

10U_0805_25VAK

+5VS

12

12

12

EMC

0.1U_0402_25V6

PC1213

PC1201

0.1U_0402_25V6

12

12

PC1214

EMC

2200P_0402_50V7K

FCCM_VCORE[64,65]

1 2

PC1277

EMC

PR1224

2.2_0402_1%

1.5P_0402_50V8C

PU1200

1

SMOD

2

VCC
BOOT3CGND

4

GH

5

VSWH

6

VIN

AOZ5019QI_QFN23_5X3P5

PWM

VSWH

PGND

EN

VIN

GL

Polymer cap for noise issue

PWM2_VCORE[64]

13
12
11
10
9
8
7

13
12
11
10
9
8
7

0.1U_0402_25V6

+5VS

PC1237

EMC

0.1U_0402_25V6

+5VS

12

FCCM_VCORE[64,65]

PC1228

0.1U_0402_25V6

12

PC1238

2200P_0402_50V7K

EMC

FCCM_VCORE[64,65]

PC1250

0.1U_0402_25V6

PC1254

EMC

2200P_0402_50V7K

PR1225

2.2_0402_1%

12

12

1 2

1 2

PR1226

2.2_0402_1%

PU1201

1

SMOD

2

VCC
BOOT3CGND

4

GH

5

VSWH

6

VIN

AOZ5019QI_QFN23_5X3P5

PU1202

1

SMOD

2

VCC
BOOT3CGND

4

GH

5

VSWH

6

VIN

AOZ5019QI_QFN23_5X3P5

PWM

VSWH

PGND

PWM

VSWH

PGND

EN

VIN

GL

EN

VIN

GL

PC1227

C C

B B

A A

4.7U_0402_6.3V6M

PC1235

10U_0805_25VAK

4.7U_0402_6.3V6M

12

PC1252

PC1251

10U_0805_25VAK

1 2

12

PC1249

12

10U_0805_25VAK

PC1236

10U_0805_25VAK

1 2

12

12

12

PC1253

EMC

VCC_core (Base on PDDG rev 0.7)
PL2 TDC__default):TB
PL2 TDC_max (40Sec):56A
Peak Current 68A
DC Load line -1.8mV/A
AC Load line -1.8mV/A
OCP Current 83.2A
DCR 0.97mohm +/-5%

Title

Title

Title

<Title>

<Title>

CPU_Vcore controller(36.1),Drivers(36.2), Support component(36.3),
CPU_Core output CAP(36.4),Acoustic Noise B+ Bulk CAP(37.2)

5

4

3

2

<Title>

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-C361P <RevCode>

C

LA-C361P <RevCode>

C

LA-C361P <RevCode>

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

65 71Tuesday, August 11, 2015

65 71Tuesday, August 11, 2015

65 71Tuesday, August 11, 2015

1

5

4

3

2

VCCGT (Base on PDDG rev 0.7)
PL2 TDC__default):TB
PL2 TDC_max (40Sec):39A
Max Current 55A
DC Load line -2.65mV/A
AC Load line -2.65mV/A
OCP Current 66.7A
DCR 0.97mohm +/-5%

1

PC1308

0.1U_0402_25V6

EMC

12

12

PC1319

10U_0805_25VAK

1U_0402_16V6K

PC1337

0.1U_0402_25V6

EMC

12

12

PC1345

0.1U_0402_25V6

UGATE

PHASE

BOOT

FCCM
PWM
GND4LGATE

TP

9

@

0_0402_5%

1 2

FCCM_GT[64,66]

1U_0402_16V6K

1 2

12

0.1U_0402_25V6

PC1336

1 2

12

EMC

PC1346

2200P_0402_50V7K

VCC

PR1311

PC1302

EMC

PC1317

2200P_0402_50V7K

FCCM_GT[64,66]

1 2

2.2_0402_1%

8
7
6
5

12

PR1321

+5VS

1 2

PR1320

2.2_0402_1%

+5VS

PU1300
AOZ5019QI_QFN23_5X3P5

1
2

4
5

PU1301
AOZ5019QI_QFN23_5X3P5

1
2

4
5

B+

HCB2012KF-121T50_0805

FCCM_SA [64]

+5VS

PC1364
1U_0402_16V6K

1 2

PC1313

0.1U_0402_25V6

SMOD
VCC
BOOT3CGND
GH

VSWH

VSWH
VIN6PGND

SMOD
VCC
BOOT3CGND
GH

VSWH

VSWH
VIN6PGND

EMC@

PL1305

1 2

PJP1301

@

2

112

JUMP_43X118

12

PWM1_GT[64]

+5VS

13

PWM

12

EN

11

VIN

10
9

GL

8
7

PWM2_GT[64]

13

PWM

12

EN

11

VIN

10
9

GL

8
7

12

PC1357

PC1355

EMC

0.1U_0402_25V6

2200P_0402_50V7K

EMC

12

PR1300

4.7_1206_5%

EMCEMC

12

PC1318

680P_0603_50V7K

PR1301

3.65K_0603_1%

ISUMP_GT[64]

ISEN1_GT[64]

+5VS

12

PR1307

4.7_1206_5%

EMCEMC

12

PC1347

4

3

2

D1

D1

D110D2/S1

S2

S2

6

7

5

ISUMP_GT

ISEN2_GT[64]

PQ1300

1

AON7934_DFN3X3A8-10

D1

G1

9

S2

G2

8

680P_0603_50V7K

12

12

12

PC1358

PC1356

10U_0805_25VAK

10U_0805_25VAK

0.22UH_24A_+-20%_7X7X4_M

1 2

12

PR1312
0_0402_5%

@

󴅟󵕻󳁓󲹏

12

12

100K_0402_1%
PR1303

ISUMN_GT[64]

12

PR1305

3.65K_0603_1%

PL1300

12

PR1313
0_0402_5%

@

PR1302

2.2_0402_1%

1 2

PL1301

0.22UH_24A_+-20%_7X7X4_M

1 2

12

PR1314
0_0402_5%

@

󴅟󵕻󳁓󲹏

12

PR1306

100K_0402_1%

ISUMN_GT

12

PR1308

4.7_1206_5%

12

PC1365

EMC EMC

680P_0603_50V7K

ISUMP_SA[64]

ISUMN_SA[64]

12

PR1315
0_0402_5%

@

12

PR1304

2.2_0402_1%

0.47UH_PCMB053T-R47MS_12A_20%

PL1306

1 2

12

PR1316
0_0402_5%

@

󴅟󵕻󳁓󲹏

12

PR1309

3.65K_0603_1%

12

12

PR1317
0_0402_5%

@

@

PR1310
0_0402_5%

+VCCSA

+VCCGT

VCCSA (Base on PDDG rev 0.7)
PL2 TDC__default):TBD
PL2 TDC_max (40Sec):10A
Max Current 11A
DC Load line -9.1mV/A
AC Load line -9.1mV/A
OCP Current 20A
DCR 7.4mohm/8.5mohm +/-5%

D D

B+

C C

B B

A A

EMC@

PL1304

HCB2012KF-121T50_0805

1 2

EMC

@

PL1303

HCB2012KF-121T50_0805

1 2

PJP1300

@

2

112

JUMP_43X118

PWM_SA[64]

VCCGT_B+

PC1343

10U_0805_25VAK

12

PC1315

PC1316

10U_0805_25VAK

12

12

PC1344

10U_0805_25VAK

PU1302

ISL95808HRZ-TS2378_DFN8_2X2

1
2
3

Title

Title

Title

<Title>

<Title>

CPU_Vcore controller(36.1),Drivers(36.2), Support component(36.3),

5

4

GFX output CAP(36.5)

3

2

<Title>

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-C361P <RevCode>

Custom

LA-C361P <RevCode>

Custom

LA-C361P <RevCode>

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

66 71Tuesday, August 11, 2015

66 71Tuesday, August 11, 2015

66 71Tuesday, August 11, 2015

1

5

+VCC_CORE

4

3

2

1

+VCC_CORE
470uF*2
22uF*9
220uF*1
1uF*6

D D

.1uF*15

1

1

+

+

2

2

PC1207

470U_D2_2VM_R4.5M~D

12

12

PC1220

22U_0603_6.3V6M

12

12

PC1221

+VCCGT

1U_0402_6.3V6K

1

+

2

C C

+VCCGT
470uF*2
47uF*9
22uF*26
1uF*6
.1uF*15

B B

1

1

+

+

PC1262

@

2

2

PC1208

220U_D7_2VM_R6M

470U_D2_2VM_R4.5M~D

12

12

PC1263

PC1261

22U_0603_6.3V6M

22U_0603_6.3V6M

12

PC1222

PC1223

1U_0402_6.3V6K

1U_0402_6.3V6K

1

+

2

PC1301

PC1307

470U_D2_2VM_R4.5M~D

470U_D2_2VM_R4.5M~D

12

12

12

PC1314

PC1348

22U_0603_6.3V6M

22U_0603_6.3V6M

PC1397

220U_D7_2VM_R6M

PC1274

22U_0603_6.3V6M

12

12

PC1350

12

PC1264

12

PC1224

1U_0402_6.3V6K

12

PC1303

47U_0805_6.3V6M

12

PC1349

22U_0603_6.3V6M

DEL:47uF*9
22uF*13
ADD:220uF*1

12

12

PC1269

PC1265

22U_0603_6.3V6M

22U_0603_6.3V6M

12

PC1226

PC1225

1U_0402_6.3V6K

1U_0402_6.3V6K

12

PC1304

PC1305

47U_0805_6.3V6M

47U_0805_6.3V6M

12

12

PC1352

PC1351

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

PC1271

22U_0603_6.3V6M

22U_0603_6.3V6M

PC1276

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

12

12

12

PC1230

PC1229

.1U_0402_16V7K

.1U_0402_16V7K

12

12

PC1306

PC1300

47U_0805_6.3V6M

47U_0805_6.3V6M

12

12

PC1354

PC1353

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

PC1231

PC1232

.1U_0402_16V7K

.1U_0402_16V7K

12

PC1309

PC1310

47U_0805_6.3V6M

47U_0805_6.3V6M

12

12

PC1359

PC1360

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

PC1233

.1U_0402_16V7K

12

PC1311

12

PC1362

22U_0603_6.3V6M

12

PC1240

PC1239

.1U_0402_16V7K

.1U_0402_16V7K

12

PC1312

47U_0805_6.3V6M

47U_0805_6.3V6M

12

PC1378

PC1361

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

PC1242

PC1241

.1U_0402_16V7K

.1U_0402_16V7K

12

12

PC1243

PC1244

.1U_0402_16V7K

.1U_0402_16V7K

+VCCSA

12

12

PC1245

.1U_0402_16V7K

12

PC1247

PC1246

.1U_0402_16V7K

PC1248

.1U_0402_16V7K

.1U_0402_16V7K

+VCCSA

12

PC1388

12

PC1391

12

12

PC1393

PC1382

47U_0805_6.3V6M

12

22U_0603_6.3V6M

47U_0805_6.3V6M

47U_0805_6.3V6M

12

12

PC1386

PC1396

PC1390

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

47uF*3
22uF*9
.1uF*2

12

12

12

A A

PC1326

.1U_0402_16V7K

5

12

12

PC1366

PC1363

22U_0603_6.3V6M

22U_0603_6.3V6M

12

PC1321

PC1320

1U_0402_6.3V6K

1U_0402_6.3V6K

12

12

PC1327

PC1328

.1U_0402_16V7K

.1U_0402_16V7K

12

12

PC1368

PC1367

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

PC1322

1U_0402_6.3V6K

12

12

PC1330

PC1329

.1U_0402_16V7K

.1U_0402_16V7K

4

12

12

PC1370

PC1369

22U_0603_6.3V6M

22U_0603_6.3V6M

12

PC1323

PC1324

1U_0402_6.3V6K

1U_0402_6.3V6K

12

12

PC1331

PC1332

.1U_0402_16V7K

.1U_0402_16V7K

12

12

PC1373

PC1372

22U_0603_6.3V6M

22U_0603_6.3V6M

12

PC1325

1U_0402_6.3V6K

12

12

PC1333

PC1334

.1U_0402_16V7K

.1U_0402_16V7K

12

12

PC1376

PC1374

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

PC1335

PC1338

.1U_0402_16V7K

.1U_0402_16V7K

12

12

12

PC1377

PC1339

.1U_0402_16V7K

PC1379

PC1375

22U_0603_6.3V6M

12

22U_0603_6.3V6M

22U_0603_6.3V6M

12

12

12

PC1340

PC1341

PC1342

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

3

2

12

PC1385

22U_0603_6.3V6M

12

12

PC1383

PC1384

.1U_0402_16V7K

.1U_0402_16V7K

12

12

PC1380

22U_0603_6.3V6M

12

PC1394

PC1389

PC1395

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

1

5

Page#

Page# Title

Page#Page#

D D

C C

Title

TitleTitle

Date

Date

DateDate

4

Version Change List ( P. I. R.

Version Change List ( P. I. R.

Version Change List ( P. I. R.Version Change List ( P. I. R.

Request Owner

Request Owner

Request OwnerRequest Owner

List )

List )

List )List )

Issue

Issue

IssueIssue
Description

Description

DescriptionDescription

3

Page

Page

PagePage
1111

2

Solution

Solution

SolutionSolution

Description

Description

DescriptionDescription

1

Rev.

Rev.

Rev.Rev.

B B

A A

5

4

3

2

1

5

Page#

Page# Title

Page#Page#

D D

C C

Title

TitleTitle

Date

DateDate

4

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Request

Request

RequestRequest
Owner

Owner

OwnerOwner

Issue Description

Issue DescriptionDate

Issue DescriptionIssue Description

3

Page 1

Page 1

Page 1Page 1

2

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

1

Rev.

Rev.Rev.

B B

A A

5

4

3

2

1

5

Request

Request

Title

Page#

Item

Page#Page#

ItemItem

1 6
2

D D

18 EE

3

18 EE

4

18 EE

5

18 EE

6

18 EE

7

18 EE

8

18 EE

9
10
11

18 GPIO
12
13

C C

14

18 DIS
15
16
17

18 DEBUG
18
19
20

18 HOLE
21
22 X01
23 X01

18 EC
24 X01
25
26

B B

18 PCH
27

28

18 TS
29
30
31

18 PD
32

18 EEEC

TitlePage#

TitleTitle

XDP
GPIO
SPI
S0iX
+1V_MPHY
PD

EC
PM

SPK

PCH

VDDQC

SCI

PCH

NGFF

AR

Date

Date Issue Description

DateDate

2014/12/12

2014/12/12

2014/12/12

2014/12/12

2014/12/12

2014/12/12

2014/12/22

2014/12/15

2014/12/15

2014/12/15 change Power rail for correct design

2014/12/15

2014/12/15 Pin swap for DFB review

2014/12/15

2014/12/15 Follow CRB XDP design

2014/12/16

2014/12/16 Modify Debug UART from closed Chassis to Open Chassis

2014/12/16

2014/12/16 Add series resistor follow CRB

2014/12/17

2014/12/17 Update BOM for design change

2014/12/17

2014/12/18 Change net name by EC request

2014/12/18

2014/12/18 Add Pull down resistor for USB2.0

2014/12/22

2014/12/22

RequestRequest

Owner

Owner

OwnerOwner

Change Pull high power for leakage issue Change RH494,RH495,RH496 from +VCCST to +VCCSTG, de-POP RH97,RH98,RH100, POP RH494,RH495.

EE X01

Change Pull high power for double pull high the same power rail Change RH571 power rail from +3VS to +3V_PCH, de-pop RH571, delete RH532.

Change SPI ROM for ME register setting Change UH8 from W25Q128FVSIG_SO8 to W25Q128FVSIQ_SO8

EE

Change by pass circuit design for CS mode function Change RZ58 connection from UZ11.2 to UZ11.4, Change RZ60 connection from UZ12.2 to UZ12.4

Delete +1V_MPHY load switch & discharge circuit for useless. Delete RH514,RH559,RH144,QH9,UH13,CH193,CH194,CH195. Delete net MPHYP_PWR_EN, move RZ70 to page 21

Update TI PD controller circuit follow Mirama

Update Board ID for EC

modify for support deep sleep function

EE18 DDR

Add pull high resistor for MB side2014/12/15

EE18

Change GPIO for sync common GPIO table

EE
EE18 PD

Add Capacitor for follow Schematic check list2014/12/15

EE18

Add pull high resistor by vendor request

EE
EE18 SPI

Follow CRB boardfile2014/12/16

EE18

Add Debug signal by EC request

EE
EE18 DEBUG

Change PU resistor follow Miramar2014/12/16

EE18

Add 2 PAD for ME NUT

EE
EE18 EC

Change BOM to follow CRB2014/12/16

EE18

Modify GPIO for follow GPIO MAP by Dell

EE
EE18 EC

Update NGFF from Key E. to Key A.2014/12/17

EE18

Change array resistor to resistor for routing

EE
EE18 USB

Update Touch Screen Connector by ME request

EE
EE18 USB

Reserve test point for Alpine Ridge2014/12/19

EE18

Delete commmon mode chok & ESD for vendor feedback

EE

Delete I2C signal from EC to Codec.

4

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Issue DescriptionItem

Issue DescriptionIssue Description

3

Update UT5 from W25Q80BLZPIG_WSON8 to W25Q80DVSSIG_SO8,Delete RT166,Change net VCC3V3_TBTA_LDO to VCC3V3_FLASH. Change net
VCC3V3_SX_SYS to +3VA_TBT. Add RT198 to PWR_SRC_ILIMIT.Swap UT4.B2/C2 net. Update RT165 from 1206 to 0805, RT167,RT168,
RT169.RT170,RT171,RT179,RT186,RT187,RT188,RT189,RT192,RT192,RT196,RT197 from 0402 to 0201. Add RT200,RT201 to net
UPD_SMBDAT/UPD_SMBCLK"

Update RE67 to 62K

De-pop RH506

Change RH525 power rail from +3VALW to +3VS

Add RH572 to +3VS for SPK_DET#

Change net DGPU_PWR_EN from GPP_D13 to GPP_D12

pin swap DT4,DT9

Add CH200 to +3V_PCH (Close to UH2.BA15)

Add RPH34 replace to RV520,RV521,RV522 and add net THERMAL_ALERT#.

Add RH574,RH575 for SPI to XDP connector

POP RH473

Change net BID_BC to GPP_C15, Add Net UARTT0_TX from GPP_C9 to JDEG1.pin 9

Delet UI6,RI29.Add JUART for UART2_TXD/UART2_RXD connect.

RH383 change from 100K to 10K

Add H50, H51

Add RE111 43K series SIO_SLP_SUS#

Change RH88 from 10K to 47K, De-POP RE33.
Add RE112 and Connect net BID_DIS to UE3.A10, swap Net BAT1_LED#(UE3.B1=>UE3.A40)/BAT2_LED#(UE3.A55=>UE3.B43)/

PCH_PCIE_WAKE#(UE3.A40=>UE3.B46)/ME_FWP_EC(UE3.B46=>UE3.B1)/USB_PWR_SHR_LFT_EN#(UE3.B43=>UE3.A55)

de-POP RE27, RE63, POP RH453

Change JNGFF1 to CONCR_213AAAA32FA

Change RP21 to RH576,RH577,RH578,RH579. Add RE113,RE114,RE115 for UE1.

USB_PWR_SHR_VBUS_LFT_EN -> USB_PWR_SHR_VBUS_EN_L, USB_PWR_SHR_VBUS_RHT_EN1 -> USB_PWR_SHR_VBUS_EN_R,
USB_PWR_SHR_LFT_EN# -> USB_PWR_SHR_EN_L#, USB_PWR_SHR_RHT_EN1# -> USB_PWR_SHR_EN_R#,
USB2_DET_EC# -> USB_DET_EC_L#, USB1_DET_EC# -> USB_DET_EC_R#

Update JTS to ACES_50208-00601-P01

Add RH580,RH581 to UH2.AD10,UH2.AG2 to GND

Add T199,T200,T201

Delete LT10,DT5

Delete QE14

Page 1

Page 1

Page 1Page 1

2

Solution Description

Solution DescriptionSolution Description

1

Rev.

Rev.Solution Description

Rev.Rev.

X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01

33
34
35
36
37

A A

38
39

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/04/10 2014/05/01

2013/04/10 2014/05/01

2013/04/10 2014/05/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

NOTE

NOTE

NOTE
LA-B072P

LA-B072P

LA-B072P

1

70 71Thursday, August 06, 2015

70 71Thursday, August 06, 2015

70 71Thursday, August 06, 2015

1.0

1.0

1.0

5

Request

Request

Title

Page#

Item

Page#Page#

ItemItem

1 NA
2

D D

3
4
5
6
7
8

9
10
11
12

14

C C

15
16
17
18
19
20

22

24
25
26
27

B B

28
29
30 EE

32
33 EE

35 EE

37 EE
38 EE
39 EE

A A

40 EE

TitlePage#

TitleTitle

NA

Date

Date Issue Description

DateDate

2014/12/12

RequestRequest
Owner

Owner

OwnerOwner

EE X01
EE
EE
EE
EE
EE
EE
EE
EE
EE
EE
EE
EE13
EE
EE
EE
EE
EE
EE
EE
EE
EE
EE
EE
EE
EE
EE
EE
EE

EE31
EE

EE34

EE36

EE41

4

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Issue DescriptionItem

Issue DescriptionIssue Description

NA NA

3

Page 2

Page 2

Page 2Page 2

2

Solution Description

Solution DescriptionSolution Description

1

Rev.

Rev.Solution Description

Rev.Rev.

X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X0121
X01
X0123
X01
X01

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/04/10 2014/05/01

2013/04/10 2014/05/01

2013/04/10 2014/05/01

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

NOTE

NOTE

NOTE
LA-B072P

LA-B072P

LA-B072P

1

71 71Thursday, August 06, 2015

71 71Thursday, August 06, 2015

71 71Thursday, August 06, 2015

1.0

1.0

1.0

5

MODEL NAME :
PCB NO :
BOM P/N :

D D

LS-C361P
TBD

AAM00

ZZZ

PCB 1BG LS-C361P REV0 AUDIO/B 8

4

R1@

3

2

1

Dell/Compal Confidential

C C

Schematic Document

Berlinetta (SKY-LAKE H)

Audio Board

B B

2014-06-20

Rev: 0.1

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2013/07/04 2013/10/28

2013/07/04 2013/10/28

2013/07/04 2013/10/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

P01-Cover Page

P01-Cover Page

P01-Cover Page
TBD

TBD

TBD

1

1 7Saturday, July 18, 2015

1 7Saturday, July 18, 2015

1 7Saturday, July 18, 2015

0.1

0.1

0.1

5

4

3

2

1

HD Audio Codec

MONO_IN

CA19
100P_0201_25V8J

JPA1

@

JPA2

@

JPA3

@

JPA4

@

JPA5

@

@

@

12

12

12

12

12

12

12

3 7Thursday, July 23, 2015

3 7Thursday, July 23, 2015

3 7Thursday, July 23, 2015

LA2BLM21PG600SN1D_0805~D

12

RA730_0402_5%~D

RA740_0603_5%

+5VS_AUDIO

AGND

0.1

0.1

0.1

+AVDD1

+DVDD+3VS_AUDIO+DVDDIO+3VS_AUDIO

Beep sound

12

Close to UA2 Pin2

GND

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Compal Electronics, Inc.

P21-Audio Codec

P21-Audio Codec

P21-Audio Codec
LA-B441P

LA-B441P

LA-B441P

1

CA7

2

10U_0402_6.3V6M

AGND

1 2

CA16 0.1U_0201_6.3V6K

RA57
10K_0201_5%

1

2

JUMP_43X39

JUMP_43X39

JUMP_43X39

JUMP_43X39

JUMP_43X39

1

BLM15BB220SN1D_2P

RA2
0_0603_5%

CA14

10U_0402_6.3V6M

1

CA28

2

0.1U_0201_6.3V6K

CA33

EMC@

10P_0201_50V8J

Deciphered Date

Deciphered Date

Deciphered Date

For EMI

1 2

LA4

12

@

1

CA29

2

4.7U_0402_6.3V6M

1

2

2

+1.8VS_AUDIO

1

CA30

2

10U_0402_6.3V6M

3mA

10mil

1

1

CA78

2

2

4.7U_0402_6.3V6M

CA32,CA78 close
with UA1.7

BEEP[6]

SPKR[6]

1

CA31

2

10U_0402_6.3V6M

CA32

0.1U_0201_6.3V6K

RA4
200K_0201_1%

1 2

RA7
200K_0201_1%

1 2

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

For EMI

RA18
0_0603_5%

D D

LA1

+5VS_AUDIO

+5VS_AUDIO

C C

+DVDD

B B

1 2

RA12 10K_0201_5%@

I2S_BITCLK_AUDIO[6]
I2S_SYNC_AUDIO[6]
I2S_RST_AUDIO#[6]

I2S_SDIN0_AUDIO[6]

I2S_SDOUT_AUDIO[6]

BLM15PX600SN1D_2P

1

1

2

1

2

CA120 22P_0201_25V8

DMIC_CLK[6]

DMIC_DAT[6]

CA1

0.1U_0201_6.3V6K

CA8

0.1U_0201_6.3V6K

1 2

I2S_LRCK[5]
I2S_OUT[5]
I2S_IN[5]
I2S_MCLK[5]

I2S_BCLK[5]

NB_MUTE#[5,6]

CA2

2

10U_0402_6.3V6M

LA3

BLM15PX600SN1D_2P

1

CA9

2

10U_0402_6.3V6M

RA93 0_0402_5%~D@
RA6 33_0201_5%

12

RA68

@

10K_0201_5%

1 2
1 2

JACK DETECTION NETWORK

A A

+DVDD

HP_JD#[4,5]

RA13
100K_0201_1%

1 2

RA14
200K_0201_1%

1 2

CA23

@

0.1U_0201_6.3V6K

5

HP_LINE1_JD

HP_LINE1_JD

1

2

50mil

12

12

1

2

1

1

2

CA4

CA3

2

10U_0402_6.3V6M

0.1U_0201_6.3V6K

50mil

1

1

+DVDDIO

CA11

2

10U_0402_6.3V6M

I2S_RST_AUDIO#_R
I2S_SDIN0_AUDIO_R

HP_LINE1_JD

+3VALW

HD_SOC_SEL

+DVDD

CA10

2

0.1U_0201_6.3V6K

I2C0_SDA_DSP[5,6]
I2C0_SCK_DSP[5,6]

1

CA77

CA130

2

0.1U_0201_6.3V6K

4.7U_0402_6.3V6M

MODE SELECT

1 2

+DVDD

RA15 100K_0201_1%

1 2

@

RA16 100K_0201_1%

HD_SOC_SEL = Low ; SOC Mode
HD_SOC_SEL = High ; HDA Mode

57

UA1

11

I2C DATA

12

I2C CLK

13

AUDIOLINK: BCLK/IBCLK

14

AUDIOLINK:SYNC/LRCK

15

AUDIOLINK:RESETB/MCLK

16

AUDIOLINK:SDATA-IN/DOUT

17

AUDIOLINK:SDATA-OUT/DIN

53

DMIC-CLK1

54

DMIC-DATA1

1

GPIO_9/I2S_LRCK

2

GPIO_1/DMIC_CLK2/SPDIF_O/I2S_In JD

3

GPIO_6/I2S_Out

4

GPIO_2/DMIC DATA2/I2S_Out JD

5

GPIO_5/I2S_In

8

I2S_Out JD/Mic JD

55

GPIO_8/I2S-MCLK/SPDIF_IN

56

GPIO_7/I2S-BCLK

52

EAPD+PD#/GPIO_11

47

SPK-OUT-LP

48

SPK-OUT-LN

49

SPK-OUT-RN

50

SPK-OUT-RP

9

HP JD/Line JD

18

LDO3_cap

10

VD33STB

6

HD-SOC SEL

HD_SOC_SEL

HD_SOC_SEL

7

DVDD

T-PAD

4

+AVDD1

1

CA5

2

0.1U_0201_6.3V6K

AGND

19

DVDD-IO

RA17,CA37
Close UA1 Pin15

+3VS_AUDIO

45

24

PVDD146PVDD251AVDD1

Codec

Analog

Pin20~45

Digital

Pin1~19, 46~56

12

RA17

@

4.7K_0201_5%

I2S_RST_AUDIO#

1

CA37

EMC@

10P_0201_50V8J

2

Reserved for EMI Reserved for EMI

PCBEEP

CPVDD/AVDD2

Mic1-VrefO-R/AGPO-1

Mic1-VrefO-L/AGPP-0

Mic1-R/Sleeve

Mic1-L/Ring2

Line1-L

Line1-R
HP_Out-R
HP_Out-L

LINE1-VREFO

MIC1-CAP

LDO1-CAP

VREF1

LDO2-cap

CPVPP

CPVREF

CPVEE

AVSS1
AVSS2

ALC3266-CG_QFN56_7X7

1

CA6

2

10U_0402_6.3V6M

23

MONO_IN

25
26
27
28
39
38
37
36
35
34
33
32
40
41
44

21
22
43
29
30
31
42
20

DMIC_CLK

EMC@

10P_0201_50V8J

DMIC_DAT

EMC@

10P_0201_50V8J

CA35

CA36

CA15 2.2U_0603_6.3V6K

CA18 2.2U_0603_6.3V6K

CA20 2.2U_0603_6.3V6K

CA21 2.2U_0603_6.3V6K

1

2

1

2

CBN2
CBP2
CBP1
CBN1

VREF

CA35,CA36 close
UA1 Pin53,Pin54

1 2

1 2

1 2

1 2

3

3mA

12

@

10mil

1

1

CA39

2

2

4.7U_0402_6.3V6M

X04.01

MIC1-VREFO_R [4]
MIC1-VREFO_L [4]
Sleeve [4]
Ring2 [4]
LINE1_L [4]
LINE1_R [4]
HPOUT_R [4]
HPOUT_L [4]
LINE1-VREFO [4]

X04.01

AGND AGND

CA40

CA39,CA40 close
with UA1.19

0.1U_0201_6.3V6K

1

1

CA12

CA13

2

2

10U_0402_6.3V6M

0.1U_0201_6.3V6K

AGND AGND

1

1

CA24

CA25

2

2

0.1U_0201_6.3V6K

2.2U_0402_6.3V6M

+AVDD2

1

1

CA17

2

2

0.1U_0201_6.3V6K

1

1

CA27

CA26

2

2

10U_0402_6.3V6M

0.1U_0201_6.3V6K

AGND AGND AGND AGND

Close to UA1

I2S_SYNC_AUDIOI2S_SDOUT_AUDIO

1

CA38

EMC@

10P_0201_50V8J

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

2

CA34

EMC@

10P_0201_50V8J

2013/07/04 2013/10/28

2013/07/04 2013/10/28

2013/07/04 2013/10/28

I2S_BITCLK_AUDIO

1

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

5

Universal Audio Jack

MIC1-VREFO_R[3,4]

MIC1-VREFO_L[3]

D D

C C

Ring2

Ring2[3]
HPOUT_L[3]

HPOUT_R[3]
Sleeve[3]

Sleeve

LINE1_L[3]
LINE1_R[3]

1 2

RA19 2.2K_0402_5%~D

1 2

@

RA20 2.2K_0402_5%~D

1 2

RA21 2.2K_0402_5%~D

1 2

HPOUT_L HPOUT_L_R1

RA52 2.4_0402_5%

X04.05

1 2

RA51 2.4_0402_5%

HP_JD#[3,5]

MIC1-VREFO_R[3,4]

LINE1-VREFO[3]

CA45 10U_0402_6.3V6M
CA119 10U_0402_6.3V6M

RB751S40T1G_SOD523-2
RB751S40T1G_SOD523-2

1 2
1 2

HPOUT_R_R2HPOUT_R

DA7

DA14

680P_0402_50V7K

40mil

1 2

LA5

BLM15AX700SN1D_2P

1 2

LA6

BLM15AX700SN1D_2P

1 2

LA7

BLM15AX700SN1D_2P

1 2

LA8

BLM15AX700SN1D_2P

40mil

680P_0402_50V7K

1 2

RA75 4.7K_0402_5%~D

1 2

RA27 4.7K_0402_5%~D

12

12

1 2

RA28 4.7K_0402_5%~D

1 2

RA29 4.7K_0402_5%~D

LINE1_R_C
LINE1_L_C

CA41

EMC@

EMC@
EMC@

EMC@
EMC@

CA44

EMC@

@

@

1 2

RA30 1K_0402_5%~D

1 2

RA31 1K_0402_5%~D

4

3

2

1

Int. Speaker Conn.

+3VS_AUDIO

1

1

CA42

680P_0402_50V7K

2

2

EMC@

12

12

1

1

CA43
680P_0402_50V7K

2

2

EMC@

HPOUT_L

HPOUT_R

HPOUT_L
HPOUT_R

12

DA5 EMC@

DA2 EMC@

AZ5123-01F.R7G_DFN1006P2X2

AZ5123-01F.R7G_DFN1006P2X2

12

RA82

@

100K_0201_5%

JHP1

7

Ring2_L
HPOUT_D_L_C

JACK_PLUG#
HPOUT_D_R_C
Sleeve_L

12

12

DA4 EMC@

DA9 EMC@

DA3 EMC@

AZ5123-01F.R7G_DFN1006P2X2

AZ5123-01F.R7G_DFN1006P2X2

AZ5123-01F.R7G_DFN1006P2X2

3
1

5

6
2

4

CONN@

YUQIU_PJ588-F07J1BE-H

AMPOUT_L+[5]
AMPOUT_L-[5]

ESD203-B1-02EL_TSLP-2-20-2

AMPOUT_R-[5]
AMPOUT_R+[5]

ESD203-B1-02EL_TSLP-2-20-2

SPK L+ L- R+ R- trace width
Speaker 4 ohm ==> 40 mils
Speaker 8 ohm ==> 20 mils

12

12

12

DA13
ESD203-B1-02EL_TSLP-2-20-2

EMC@

12

DA10
ESD203-B1-02EL_TSLP-2-20-2

EMC@

DA12

EMC@

DA11

EMC@

JSPK1

SPK_L+_C
SPK_L-_C
SPK_R-_C
SPK_R+_C

SPK_DET#[6]

1

1

2

2

3

3

4

4

5

5

6

6

7

GND

8

GND

E-T_4261K-Q06C-01L

CONN@

+3VS_AUDIO

12

RA81

@

100K_0201_5%

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2013/07/04 2013/10/28

2013/07/04 2013/10/28

2013/07/04 2013/10/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

P22-Audio Conn

P22-Audio Conn

P22-Audio Conn
LA-B441P

LA-B441P

LA-B441P

1

4 7Thursday, July 23, 2015

4 7Thursday, July 23, 2015

4 7Thursday, July 23, 2015

0.1

0.1

0.1

5

4

3

2

1

SMART AMP

1 2

1 2

1 2

1 2

1000P_0201_16V7K

RA61

1 2

3.3_0402_5%

1000P_0201_16V7K

RA65

1 2

3.3_0402_5%

1000P_0201_16V7K

RA66

1 2

3.3_0402_5%

1000P_0201_16V7K

RA67

1 2

3.3_0402_5%

CA90

12

1 2

CA93 0.01U_0201_16V7

CA96

12

1 2

CA97 0.01U_0201_16V7

CA106

12

1 2

CA109 0.01U_0201_16V7

CA114

12

1 2

CA115 0.01U_0201_16V7

AMPOUT_R-

AMPOUT_R+

AMPOUT_L-

AMPOUT_L+

AMPOUT_R- [4]

AMPOUT_R+ [4]

AMPOUT_L- [4]

AMPOUT_L+ [4]

For EMI

1 2

LA18

BLM15BB220SN1D_2P

D D

X04.02

DA8

NB_MUTE#[3,6]

HP_JD#[3,4]

C C

B B

1 2

RB751S40T1G_SOD523-2
RB751S40T1G_SOD523-2

1 2

@

DA15

+DVDD_AMP

RA58

RA59

I2C0_SDA_DSP[3,6]
I2C0_SCK_DSP[3,6]

+DVDD_AMP

12

RA72
100K_0201_5%

1 2

10K_0201_5%

1 2

10K_0201_5%

AMP_MUTE#

AMP_MUTE#

3mA

1

2

CA117,CA118 close
with UA2.7

+DVDD_AMP

12

RA71
100K_0201_5%

10mil

CA117

4.7U_0402_6.3V6M

+PVDD

I2S_OUT[3]

I2S_MCLK[3]
I2S_BCLK[3]
I2S_LRCK[3]

+DVDD_AMP+3VS_AUDIO

1

CA118

2

0.1U_0201_6.3V6K

1

1

CA83

CA133

2

2

10U_0603_25V6M~D

0.1U_0402_16V7K~N

RA85 22_0201_5%

RA86 22_0201_5%
RA87 22_0201_5%
RA88 22_0201_5%

I2S_IN[3]

1

2

RA60

1 2

3.3_0402_5%

1 2

1 2
1 2
1 2

CA85

0.01U_0402_16V7K

AMP_MUTE#

1

2

1

CA86

2

1000P_0201_16V7K

AMP_MUTE#

1

CA87

2

+DVDD_AMP

1

1

2

1

CA88

CA116

2

1U_0402_16V6K

1U_0402_16V6K

43
46

41
42
44

35
36
37
38
40

39
45

11

12

47

CA1121U_0201_6.3V6M

CA104

1U_0201_6.3V6M

DIN
XSMP/UVT

SCLK
BLCK
LRCLK

SDA
SCL
GPIO1
GPIO2
GPIO3

ADR2
ADR1

/FAULTZ

LDOO

+GVDD

1

CA98

2

2

0.1U_0201_6.3V6K

26

13

12

AVCC

PVCC1

CA100

1U_0201_6.3V6M

PVCC2

UA2

TAS5768MRMTR_QFN48_5X7

GVDD

27

DACL

DACR

1

1

1

1

2

2

2

2

CA99 1U_0201_6.3V6M

CA101 1U_0201_6.3V6M

CA107 1U_0201_6.3V6M

CA105 1U_0201_6.3V6M

2

9

1

33

AVDD

DVDD

GND1

4

14

10

8

INPL

INNL

CPVDD

GND7

GND524GND3

GND415GND2

GND6

29

25

49

31

30

INPR

INNR

THERMAL PAD

GND8

GND9

34

48

BSNR

OUTNR

BSPR

OUTPR

BSNL

OUTNL

BSPL

OUTPL

CAPP
CAPM

GAIN/FSW

VNEG
DACL
DACR

20
21
22
23
19
18
17
16

3

CA102 1U_0201_6.3V6M

5
28
6

CA103 1U_0201_6.3V6M

7
32

LA13BLM21PG600SN1D_0805~D

10U_0603_25V6M~D

1 2

CA89 0.22U_0402_16V7K

AMP_RN

1 2

CA94 0.22U_0402_16V7K

AMP_RP

1 2

CA113 0.22U_0402_16V7K

AMP_LN

1 2

CA108 0.22U_0402_16V7K

AMP_LP

1 2

1 2

DACL
DACR

+VSBP+PVDD

12

1 2

AMPOUT_R-

AMPOUT_R+

AMPOUT_L-

AMPOUT_L+

CA91 0.68U_0603_16V6K

CA92 0.68U_0603_16V6K

CA111 0.68U_0603_16V6K

CA110 0.68U_0603_16V6K

LA14
10UH_MHCI05018B-100M-R8A_2.5A_20%

1 2

LA15
10UH_MHCI05018B-100M-R8A_2.5A_20%

1 2

LA16
10UH_MHCI05018B-100M-R8A_2.5A_20%

1 2

LA17
10UH_MHCI05018B-100M-R8A_2.5A_20%

+GVDD

12

RA62

20K_0201_5%

1

CA95

12

1U_0402_16V6K

2

RA63

100K_0201_5%

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

3

2013/07/04 2013/10/28

2013/07/04 2013/10/28

2013/07/04 2013/10/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

P3-SMART AMP

P3-SMART AMP

P3-SMART AMP
LA-B4241P

LA-B4241P

LA-B4241P

1

5 7Thursday, July 23, 2015

5 7Thursday, July 23, 2015

5 7Thursday, July 23, 2015

0.1

0.1

0.1

5

4

3

2

1

UA3

1

2

3

RA83

@

0_0603_5%

1 2

1 2

0_0603_5%
RA84

@

CA129

10U_0402_6.3V6M

+3VS_AUDIO

12

2

1

+5VS_AUDIO

+3VS_AUDIO

RA77
10K_0201_5%

CA137

0.68U_0603_16V6K

1

2

CA121

1U_0201_6.3V6M

+3VS To +1.8VS_AUDIO

JAUDIO

1
3

1

5
7

9
11
13
15
17
19
21
23
25
27
29

31
32
33

E-T_1134K-R30C-01L~D

RA92

4.7_0201_5%

2

1 2

CA136
33P_0201_25V8J

1

D D

C C

I2S_BITCLK_AUDIO[3]
I2S_SYNC_AUDIO[3]
I2S_RST_AUDIO#[3]
I2S_SDIN0_AUDIO[3]
I2S_SDOUT_AUDIO[3]

I2C0_SDA_DSP[3,5]
I2C0_SCK_DSP[3,5]

H_3P2

PCH_AUDIO_PWR
I2S_BITCLK_AUDIO

+VSBP +5VALW

H1

H_3P2

@

1

FD1
FIDUCAL@

1

H3

H2

H_6P0N

@

@

1

FD2
FIDUCIAL@

1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

G1
G2
G3

CONN@

EMC@

EMC@

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18
20
22
24
26
28
30

G4
G5
G6

DMIC_CLK

20

DMIC_DAT

22
24
26
28
30

34
35
36

NB_MUTE# [3,5]
BEEP [3]
SPKR [3]

SPK_DET# [4]

DMIC_CLK [3]
DMIC_DAT [3]

+3VALW

+1.8VS_AUDIO

X04.03

RA78

0_0603_5%

1 2

@

16K_0402_5% @

1

2

CA122

1U_0201_6.3V6M

20K_0402_1% @

RA79

RA80

+1.8VS

12

VSET

12

5

4

G9090-180T11U_SOT23-5

VOUT

NC

VIN

GND

EN

X04.04

DMIC_CLKDMIC_DATI2S_BITCLK_AUDIO

2

1 2

@

1

@

10_0201_5%
RA90

CA135

0.01U_0201_16V7

2

1 2

@

1

@

10_0201_5%
RA91

CA134

0.01U_0201_16V7

+5VALW

+5VALW

PCH_AUDIO_PWR

PCH_AUDIO_PWR

+3VALW

UA4

1

VIN1

2

VIN1

3

ON1

4

VBIAS

5

ON2

6

VIN2

7

VIN2

EM5209VF_DFN14_3X2

VOUT1
VOUT1

VOUT2
VOUT2

GPAD

14
13

12

CT1

11

GND

10

CT2

9
8

15

1 2

CA124 470P_0201_25V7K

1 2

CA125 1000P_0201_16V7K

Close UA4Close UA4

+3VALW+5VALW

@

1

2

CA126

1U_0201_6.3V6M

@

1

2

CA127

1U_0201_6.3V6M

+5VS_AUDIO +3VS_AUDIO

1

CA128

2

10U_0402_6.3V6M

1

2

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

3

2011/06/02 2013/10/28

2011/06/02 2013/10/28

2011/06/02 2013/10/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P45-PWR_PIR-2

P45-PWR_PIR-2

P45-PWR_PIR-2

LA-9261P

LA-9261P

LA-9261P

1

0.1

0.1

6 7Thursday, July 23, 2015

6 7Thursday, July 23, 2015

6 7Thursday, July 23, 2015

0.1

5

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Request

Request

Page# Title

Item

Item Issue Description

Page#Page#

ItemItem

D D

C C

B B

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

Title

TitleTitle

Date

DateDate

RequestRequest
Owner

Owner

OwnerOwner

4

Issue DescriptionDate

Issue DescriptionIssue Description

3

Page 1

Page 1

Page 1Page 1

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

2

Rev.Page#

Rev.Rev.

1

24 P44

25 P45

26 P46

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

5

4

3

2011/06/02 2013/10/28

2011/06/02 2013/10/28

2011/06/02 2013/10/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P45-PWR_PIR-2

P45-PWR_PIR-2

P45-PWR_PIR-2

LA-9261P

LA-9261P

LA-9261P

1

0.1

0.1

7 7Saturday, July 18, 2015

7 7Saturday, July 18, 2015

7 7Saturday, July 18, 2015

0.1

A

B

C

D

E

MODEL NAME :
PCB NO :
BOM P/N :

1 1

LS-C362P
TBD

AAM00

Dell/Compal Confidential

2 2

Schematic Document

Berlinetta (Keyboard Controller Board)

3 3

2014-08-05

Rev: 0.1

ZZZ

KBCB_PCB

DA6001C5000
R1@

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

C

2011/06/02 2013/10/28

2011/06/02 2013/10/28

2011/06/02 2013/10/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

P01-Cover Page

P01-Cover Page

P01-Cover Page
LS-C362P

LS-C362P

LS-C362P

E

1 4Saturday, July 18, 2015

1 4Saturday, July 18, 2015

1 4Saturday, July 18, 2015

0.1

0.1

0.1

A

1 1

B

C

D

E

K/B Controller Board(LS-B442P)

DMIC

Front Side LED+ DMIC

2 2

ZAZ00 M/B
LA-B441P

BC BUS

Keyboard Controller
ECE1117

KSIO

3 3

Conn.

K/B Backlit

Int.KBD

Front Side LED+DMIC
Board

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

C

2011/02/23 2013/10/28

2011/02/23 2013/10/28

2011/02/23 2013/10/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

P02-Block Diagram

P02-Block Diagram

P02-Block Diagram
LS-C362P

LS-C362P

LS-C362P

E

2 4Saturday, July 18, 2015

2 4Saturday, July 18, 2015

2 4Saturday, July 18, 2015

0.1

0.1

0.1

5

+3VALW

R1323

1 2

0_0603_1%

@

T1

@

0.1U_0402_25V6K~D

TEST

D D

Reserve for ICT test

C C

+3VALW_1117

1

C2978

0.1U_0402_25V6K~D

2

X01_0304: Change JKB3 connector to
follow connector list.

1

C2979

0.1U_0402_25V6K~D

2

R2667 10K_0402_1%

R2674 1K_0402_5%

4.7U_0603_6.3V6K

1

C2980

2

1 2
1 2

R2675 15_0402_5%

1

C2981

2

KB_BL_DET
KB_LED_PWM
CAPS_LED#

KB_SMB_DA
KB_SMB_CK
KB_SMB_INT#

TEST

1 2

Connector for M/B

CONN@

E-T_6710K-Y15M-31L

+5VALW
+5VS
+3VALW

+3VS

B B

White

Anber

KB_DET#
KB_SMB_INT#
KB_SMB_DA
KB_SMB_CK
BAT2_LED#
BAT1_LED#
DMIC_DAT
DMIC_CLK

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

GND
GND

JKB4

+3VALW

16
17

X04.01

+3VS

1

C2982

2

1

10U_0603_6.3V6M~D

C2975

2

4

U725

4
24
37

38
39
40
41
42
43
44

31
30

36
35

34
33
32

28
48
29

21
49

ECE1117-HZH_QFN48_7X7~D

Place close to JKB3

+5VALW +5VS

1

C1154

0.1U_0402_25V6K~D

2

VCC
VCC
VCC

GPIO10
GPIO11
GPIO12/PWM1
GPIO13/PWM2
GPIO14/PWM3
GPIO15/PWM4/BC_INT_DN3#/SMB_INT_DN3#
GPIO20/PWM7

GPIO23/KSO20/PWM8
GPIO22/KSO21/PWM9

GPIO04/BC_DAT_DN1/SMB_DAT_DN1/TP_DAT
GPIO03/BC_CLK_DN1/SMB_CLK_DN1/TP_CLK

GPIO07/BC_DAT_DN2/SMB_DAT_DN2/PS2_DAT
GPIO06/BC_CLK_DN2/SMB_CLK_DN2/PS2_CLK

BC_DATA_UP/SMB_DAT_UP
BC_CLK_UP/SMB_CLK_UP
BC_INT_UP#/SMB_INT_UP#

SMB_ADDR
OCS_TRM
TEST_PIN

VR_CAP
GND_PAD

1

C1155

1U_0603_10V6K

1U_0603_10V6K

2

3

11

KSO00

KSO00

13

KSO01

KSO01

12

KSO02

KSO02

14

KSO03

KSO03

16

KSO04

KSO04

17

KSO05

KSO05

15

KSO06

KSO06

5

KSO11

KSO11

10

KSO12

KSO12

7

KSO13

KSO13

6

KSO14

KSO14

8

KSO15

KSO15

9

KSO16

KSO16

3

KSO17

KSO17

2

GPIO01/KSO18
GPIO00/KSO19

GPIO21/KSO22

KSO18

1

KSO19

47

KSO20

46
45

18

KSI0

KSI0

20

KSI1

KSI1

23

KSI2

KSI2

19

KSI3

KSI3

25

KSI4

KSI4

22

KSI5

KSI5

26

KSI6

KSI6

27

KSI7

KSI7

X04.02

Connector for Keyboard Backlight

CAPS_LED#

2

+3VS

G

2

100K_0402_5%

13

D

S

L2N7002WT1G_SC-70-3

Q327

+5VS_KBL

1

C1156
1U_0603_10V6K

2

1

X01_0305: Change JKB2 connector to
follow connector list.

Connector for Keyboard

KB_DET#
KSI7
KSI6
KSI4
KSI2
KSI5
KSI1
KSI3
KSI0
KSO05
KSO04
KSO11
KSO06
KSO12
KSO03
KSO01
KSO02
KSO00
KSO16
KSO20
KSO19

R946

1 2

240_0402_1%

FIDUCIAL_C40M80

KSO17
KSO18
KSO13
KSO15
KSO14
CAPS_LED

FD3

1

@

+5VS

R990

+5VS

1 2

FIDUCIAL_C40M80

Q330
DMG2301U-7_SOT23-3

D

S

13

G

2

1

C1160

@

0.1U_0402_10V7K~D

2

FD1

@

1

FIDUCIAL_C40M80

[1129] PT phase need update to SP01001H500

FD2

@

1

CONN@

ACES_50699-03041-P01_30P
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

JKB2

FD4

@

1

FIDUCIAL_C40M80

32

30

GND

31

29

GND
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

R03_0708: Remove screw hole H1, H2.

CONN@

Connector for LED+DMIC Board

CONN@

E-T_6718K-Y10N-21L

12

GND

11

GND

+5VALW

+3VS

White

Amber

BAT2_LED#
BAT1_LED#

DMIC_DAT
DMIC_CLK

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

JLM

Place close to JLM

+3VS

1

C377

0.1U_0402_25V6K~D

2

+5VALW

1

C2976

0.1U_0402_25V6K~D

2

KB_LED_PWM

Current limited 20mA

2

G

KB_BL_DET

13

D

Q311

L2N7002WT1G_SC-70-3

S

R944 47K_0402_5%

R945

100K_0402_1%

1 2

1 2

KB_LED_PWM#

+5VS_KBL

ACES_51575-00401-W01

4

6

4

G2

3

5

3

G1

2

2

1

1

JBL1

LED Maximum Current is 273mA

Fuse for Backlight

A A

+5VS

1

C1153
1U_0603_10V6K

2

20mil

2 1

F1

0.5A_13.2V_NANOSMDC050F-13.2-2

+5VS_KBL

1

C1259
10U_0603_6.3V6M~D

2

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF TH E COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE IN FORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

3

2011/06/02 2013/10/28

2011/06/02 2013/10/28

2011/06/02 2013/10/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

P03-KB Controller

P03-KB Controller

P03-KB Controller
LS-C362P

LS-C362P

LS-C362P

1

3 4Friday, July 24, 2015

3 4Friday, July 24, 2015

3 4Friday, July 24, 2015

0.1

0.1

0.1

5

4

3

2

1

Model

Item Page ECN NumberDate Rev. Issue Description Solution Description

Item Id

1

AAM00

2
3

D D

4
5

6

7

8

9
10
11
12

C C

13

14

15

16
17

18
19

B B

20

21
22

23
24

25
26

27
28

29
30

A A

31
32

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2013/07/04 2013/10/28

2013/07/04 2013/10/28

2013/07/04 2013/10/28

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

P04-Change List

P04-Change List

P04-Change List
LS-C362P

LS-C362P

LS-C362P

0.1

0.1

4 4Saturday, July 18, 2015

4 4Saturday, July 18, 2015

4 4Saturday, July 18, 2015

1

0.1