Compal LA-b753p Schematics

A

B

C

D

E

MODEL NAME :

1 1

PCB NO :

BOM P/N :

LA-B751P/LA-B753P

4319UA31L01 / 4319UA31L02 for NV

Echo 15 17 nVidia

4319UB31L01 for AMD

Compal Confidential

2 2

Echo 15 17 with nVidia GFX

Schematic Document

Broadwell H-type

Rev: 0.1(X00)

3 3

2014/01/02

@ : Nopop Component

EMC@ : EMI part
ESD@ : ESD part
RF@ : RF part
CONN@ : Connector Component

4 4

BDW@ : Intel BOARDWELL
AOAC@ : Intel AOAC

A

B

DIS@ : Discrete Part
NV@ AMD@ : Board ID

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

ZZZ1

PCB

DAB0000P000

PCB 18F LA-B752P REV0 M/B 8

12L

Compal Electronics, Inc.

Title

Title

Title

Cover Sheet

Cover Sheet

Cover Sheet

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-B751P

LA-B751P

LA-B751P

E

1 69Wednesday, March 26, 2014

1 69Wednesday, March 26, 2014

1 69Wednesday, March 26, 2014

0.1

0.1

0.1

A

B

C

D

E

Echo 15"/17'' Block Diagram

eDP panel

HDMI

Page25

Page27

1

connector

mini DP
connector

Page26

50W,75W dGPU
nVIDIA / AMD
4pcs GDDR5 128bit
6pcs GDDR5 192bit
8pcs GDDR5 256bit

2

PCI-E(GEN3)x4
port8~port11

Caldera
connector

Page41

Page30

RJ45
connector

Page31

3 in 1
Card slot

3

Echo 17" only

DC in

1.05V

Battery

4

3V/5V

System

1.35V

1.5V

CPU
Vcore

dGPU
Core

Charger

dGPU

1.35V

www.schematic-x.blogspot.com

A

Page46~55

LAN(Gigabit)
Killer E2201

Page30

Card reader
RTS5227

Page31

NGFF (M.2)

Page29

SSD 1

NGFF (M.2)

Page29

SSD 2

NGFF (M.2)

Page29

SSD 3

Page30

NGFF (M.2)

Page29

SSD 4

NGFF (M.2)
WLAN+BT

SPI ROM

Page19

64Mbit

eDP 1.3

HDMI 1.4a (DDI1)

DP 1.2 (DDI2)

PCI-E(GEN3)x8
port0~port7

USB3.0 port5

USB2.0 port2

PCI-E2.0 port3

PCI-E2.0 port5

SATA3.0 port1

Gen3

SATA3.0 port5

Gen3

SATA3.0 port4

Gen3

SATA3.0 port3

Gen2 only

PCI-E2.0 port4

USB2.0 port4

SPI

Int. KBD

ENE KC3810

Page43

B

Broadwell M-Processor
4C + GT2
47W , BGA1364 balls

Page7~13

DMI x 4

Wildcat Point-LP PCH

BGA 696 balls

Page16~24

LPC Bus

ENE KB9012

Page43

USB2.0

Touch pad

C

FFS
LNG3DMTR

Memory Bus Dual Channel

1.35V DDR3L 1600 MHz

SATA3.0 port0

USB2.0 port3

USB2.0 port5

USB2.0 port6

USB3.0 port1
USB2.0 port0

USB3.0 port2
USB2.0 port7

USB3.0 port6
USB2.0 port1

USB3.0 port3
USB2.0 port8

Fan Control
ADM1032

204pin SO-DIMM x2

XDP connector

Page14~15

HDD connector

AlienFX / ELC , C8051F347

Touch screen

Digital camera(with digital MIC)

USB connector 1 , Right side

USB connector 2 , Right side

USB connector 3 , Left side
USB power share

USB connector 4 , Lift side

Page36

Page37

Page25

Page34

Page34

HP/MIC Global headset
combo JACK

HD Audio

Audio codec
Creative
Sound Core3D-EX

Page32

HP/MIC Retaskable
combo JACK

TI TPA3111

Sub-woofer

Echo 17" only

TI TPA3131D2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION I T CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

Page32

Daughter Board

Speaker

Compal Secret Data

Compal Secret Data

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Page35

Page35

Page32

Page32

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Block diagram

Block diagram

Block diagram

LA-B751P

LA-B751P

LA-B751P

E

2 69Wednesday, March 26, 2014

of

2 69Wednesday, March 26, 2014

of

2 69Wednesday, March 26, 2014

of

1

2

3

4

0.1

0.1

0.1

A

B

C

D

E

Compal Confidential

Project Code : AAP10/AAP20
File Name : LA-XXXXP

1 1

M/B

Camera

FFC

? pin

Touch Pad

2 2

LS-9335P
POWER BUTTON/B

on/off SW

Led x 2

LS-9336P

FFC

? pin

INDICATOR/B

Led-HDD

Led-Wireless

Led-CapsLock

3 3

Lid

FFC

? pin

KSI/KSO

? pin

Keyboard

Backlight

? pin

Wire

12pin

LOGO /B

Led x 2

44 pin

50pin

Coaxial/Wire Combo

Daughter/B

Sub-woofer Amplifier

Wire-Set

eDP Panel

USB3.0

USB3.0

Headphone combo JACK

Headphone combo JACK

Hot Bar Hot Bar Hot Bar

6pin 6pin6pin

WireWireWire

Alien head badge/B Alien Slits-L Light/BAlien Slits-R Light/B

Led x 2Led x 2 Led x 2

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

Block Diagram

Block Diagram

E

0.1

0.1

3 69Wednesday, March 26, 2014

3 69Wednesday, March 26, 2014

3 69Wednesday, March 26, 2014

0.1

CALDERA PRSNT#

A

Caldera(Echo graphic expander) block diagram

PCIE x4 TX/RX

PCIE x4 TX/RX

SMBUS

PCIE x4 Redriver
TI , DS8OPCI402

PCIE Mux Pericom ,
PI3PCIE3415ZHEX

PCIE x8 TX/RX

TO EC Control

CALDERA PWRGD

CALDERA_ON

Caidera connector

REFCLK +/-

CPERST#

CALDERA PRSNT#

Desktop PCIE x16 connector

PEG PRSNT_LOOPBACK

USB3.0

USB2.0

USB3.0 HUB
SMSC , USX2064

4x USB3.0

4 ports USB3.0

1 1

CALDERA PWRGD

19.5V IN

3.3V/5V always VR's(for USB wake support)

Dock +3.3VAW

Dock +5VAW

All POWER ready

Dock +3.3V

DC-DC VR's(main)

Dock +12V

VR_ON#

EC Control

BUTTON#
RED LED

WHITE LED

Removal Request
Button and WHTE/RED
on Connctor overmold

CALDERA_ON

CALDERA PRSNT#

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

A

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

Caldera block diagram

Caldera block diagram

Caldera block diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

4 69Wednesday, March 26, 2014

4 69Wednesday, March 26, 2014

4 69Wednesday, March 26, 2014

0.1

0.1

0.1

A

Board ID Table for AD channel

Vcc 3.3V +/- 1%

100K +/- 1%Ra

Board ID

0
1
2
3
4
5
6
7
8
9

Rb V min

0 0.000V
12K +/- 1%
15K +/- 1%
20K +/- 1%
27K +/- 1%
33K +/- 1%
43K +/- 1%
56K +/- 1%
75K +/- 1% 1.398V
100K +/- 1%

10
11
12
13
14

160K +/- 1%
200K +/- 1%
240K +/- 1%
270K +/- 1%

15 330K +/- 1%
16
17
18

430K +/- 1%
560K +/- 1%
750K +/- 1%

19 NC

AD_BID

V typ

AD_BID

0.000V 0.300V

0.347V

0.354V

0.423V 0.430V

0.541V

0.691V

0.807V

0.550V

0.702V

0.819V

0.978V 0.992V

1.169V

1.185V

1.414V 1.430V

1.634V

1.650V

1.849V 1.865V

2.015V

2.185V

2.316V

2.031V

2.200V

2.329V

2.395V 2.408V

2.521V

2.667V

2.791V

2.533V

2.677V 0xCA - 0xD3

2.800V

2.905V 2.912V

3.300V

V

AD_BID

0.360V

0.438V

0.559V

0.713V

0.831V

1.006V

1.200V

1.667V

1.881V130K +/- 1%

2.046V

2.215V

2.343V

2.421V

2.544V

2.687V

2.808V

2.919V

3.300V

max

EC AD3

0x00 - 0x0B
0x0C - 0x1C
0x1D - 0x26
0x27 - 0x30
0x31 - 0x3B
0x3C - 0x46
0x47 - 0x54
0x55 - 0x64
0x65 - 0x76
0x77 - 0x87
0x88 - 0x96
0x97 - 0xA3
0xA4 - 0xAD
0xAE - 0xB7
0xB8 - 0xC0
0xC1 - 0xC9

0xD4 - 0xDC
0xDD - 0xE6
0xE7 - 0xFF3.000V

NVIDIA
Graphic

AMD
Graphic

Port1

Port2

Port3

Port4

Port5

Port6

Port0

Port1

Port2

Port3

Port4

Port5

Board ID TABLE

BDW

1 1

ID

NV AMD

0
1
2
3

10
11
12
13

PCB Revision

EVT-1
DVT-1
DVT-2
MP

Port6

Port7 / 8

Lane 1

Lane 2

USB3.0

Right side1

Right side2

Left side 1

Caldera

Left side 2

USB2.0

Right side1

Left side 1 (PowerShare)

Caldera

ELC

BT

Touch screen

Camera

Right side 2

Left side 2

PCI EXPRESS

Symbol Note :

: means Digital Ground

: means Analog Ground

Lane 3

Lane 4

CLOCK SIGNAL

CLKOUT_PCIE0

Lane 5

Lane 6

CLKOUT_PCIE1

CLKOUT_PCIE2

CLKOUT_PCIE3

CLKOUT_PCIE4

CLKOUT_PCIE5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

10/100/1000 LAN

M.2 Card WLAN

dGPU (N15P)

DGPU (Caldera)

A

SATA1

SATA2

SATA3

Compal Secret Data

Compal Secret Data

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

10/100/1000 LAN

M.2 Card WLAN

PCIE 4x MUX

SATA

HDDSATA0

NGFF SSD

NGFF SSD

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Notes list

Notes list

Notes list

LA-B751P

LA-B751P

LA-B751P

0.1

0.1

5 69Wednesday, March 26, 2014

5 69Wednesday, March 26, 2014

5 69Wednesday, March 26, 2014

0.1

5

4

3

2

1

D D

C C

SMBUS Address [0x9a]

Broadwell

AP2
AH1

AN1
AK1

AN1
AK1

79
80

MEM_SMBCLK
MEM_SMBDATA

SML0CLK
SML0DATA

SML1_SMBCLK

EC_SMB_CK2
EC_SMB_DA2

2.2K

2.2K

1K

1K

2.2K

2.2K

+3.3V_ALW_PCH

+3.3V_ALW_PCH

+3.3V_ALW_PCH

2.2K

2.2K

N-MOS
N-MOS

N-MOS
N-MOS

+3VALW

EC_SMB_CK2
EC_SMB_DA2SML1_SMBDATA

KBC

B B

KB9012A4

77
78

EC_SMB_CK1
EC_SMB_DA1

2.2K

2.2K

+3VALW

10K

10K

+3VS

DDR_XDP_WLAN_TP_SMBCLK
DDR_XDP_WLAN_TP_SMBDAT

0 ohm
0 ohm

0 ohm
0 ohm 0 ohm

N-MOS
N-MOS

0 ohm
0 ohm

SCL
SDA

N-MOS
N-MOS

2.2K

2.2K

VGA_SMB_CK2
VGA_SMB_DA2

PU701

11

POWER
Charger

10

DDR_XDP_SMBCLK_R1
DDR_XDP_SMBDAT_R1

CSCL CIICSCL
CSDA

0 ohm

CIICSDA

+3VS_VGA

UV28

T4

GPU

T3

SMBUS Address [0xXX]

SMBUS Address [0x12]

202
200

202
200

53
51

30
32

5
6

13
14

DIMMA

DIMMB

XDP1

M.2 NGFF

JTP

UV28
LVDS
Translator

SMBUS Address [A0]

SMBUS Address [A4]

SMBUS Address [TBD]

SMBUS Address [TBD]

SMBUS Address [TBD]

SMBUS Address [TBD]

CPU,C
DDR,D

100 ohm
100 ohm

PD1

3 4
1

6

BAT_ALERT
BATT_PRS

PBATT1

3
5

SMBUS Address [0x16]

GPU,DP,HDMI,EDP,V
LAN,L
AUDIO,A
NGFF,N
USB,U

A A

CALDERA,M
HDD,S
ELC,E
FAN,F
TP,T
KBC,K
DC,O

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Compal Electronics, Inc.

SMBus block diagram

SMBus block diagram

SMBus block diagram

LA-B751P

LA-B751P

LA-B751P

1

6 69Wednesday, March 26, 2014

6 69Wednesday, March 26, 2014

6 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

4

3

2

1

+VCOMP_OUT

PEG_COMP

D D

CPU1A

DMI_CRX_PTX_N0<17>
DMI_CRX_PTX_N1<17>
DMI_CRX_PTX_N2<17>
DMI_CRX_PTX_N3<17>

DMI_CRX_PTX_P0<17>
DMI_CRX_PTX_P1<17>
DMI_CRX_PTX_P2<17>
DMI_CRX_PTX_P3<17>

DMI_CTX_PRX_N0<17>
DMI_CTX_PRX_N1<17>
DMI_CTX_PRX_N2<17>
DMI_CTX_PRX_N3<17>

DMI_CTX_PRX_P0<17>
DMI_CTX_PRX_P1<17>
DMI_CTX_PRX_P2<17>

C C

B B

DMI_CTX_PRX_P3<17>

FDI_CSYNC<17>

FDI_INT<17>

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

FDI_CSYNC
FDI_INT

AB2

DMI_RXN0

AB3

DMI_RXN1

AC3

DMI_RXN2

AC1

DMI_RXN3

AB1

DMI_RXP0

AB4

DMI_RXP1

AC4

DMI_RXP2

AC2

DMI_RXP3

AF2

DMI_TXN0

AF4

DMI_TXN1

AG4

DMI_TXN2

AG2

DMI_TXN3

AF1

DMI_TXP0

AF3

DMI_TXP1

AG3

DMI_TXP2

AG1

DMI_TXP3

F11

FDI_CSYNC

F12

DISP_INT

HASWELL_BGA1364

HASWELL_BGA

DMI

PEG

FDI

Note:
Trace width=12 mils ,Spacing=15mils
Max length= 400 mils.

AH6

PEG_RCOMP

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8

PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

PEG_RXP0

PEG_RXP1

PEG_RXP2

PEG_RXP3

PEG_RXP4

PEG_RXP5

PEG_RXP6

PEG_RXP7

PEG_RXP8

PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

PEG_TXN0

PEG_TXN1

PEG_TXN2

PEG_TXN3

PEG_TXN4

PEG_TXN5

PEG_TXN6

PEG_TXN7

PEG_TXN8

PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8

PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

1 OF 12

PEG_COMP

E10
C10
B10
E9
D9
B9
L5
L2
M4
L4
M2
V5
V4
V1
Y3
Y2
F10
D10
A10
F9
C9
A9
M5
L1
M3
L3
M1
Y5
V3
V2
Y4
Y1
B6

PEG_HTX_GRX_N0

C5

PEG_HTX_GRX_N1

E6

PEG_HTX_GRX_N2

D4

PEG_HTX_GRX_N3

G4

PEG_HTX_GRX_N4

E3

PEG_HTX_GRX_N5

J5

PEG_HTX_GRX_N6

G3

PEG_HTX_GRX_N7

J3

PEG_HTX_GRX_N8

J2

PEG_HTX_GRX_N9

T6

PEG_HTX_GRX_N10

R6

PEG_HTX_GRX_N11

R2
R4
T4
T1
C6

PEG_HTX_GRX_P0

B5

PEG_HTX_GRX_P1

D6

PEG_HTX_GRX_P2

E4

PEG_HTX_GRX_P3

G5

PEG_HTX_GRX_P4

E2

PEG_HTX_GRX_P5

J6

PEG_HTX_GRX_P6

G2

PEG_HTX_GRX_P7

J4

PEG_HTX_GRX_P8

J1

PEG_HTX_GRX_P9

T5

PEG_HTX_GRX_P10

R5

PEG_HTX_GRX_P11

R1
R3
T3
T2

12

RC124.9_0402_1%

PEG_GTX_HRX_N0
PEG_GTX_HRX_N1
PEG_GTX_HRX_N2
PEG_GTX_HRX_N3
PEG_GTX_HRX_N4
PEG_GTX_HRX_N5
PEG_GTX_HRX_N6
PEG_GTX_HRX_N7
PEG_GTX_HRX_N8

PEG_GTX_HRX_N9
PEG_GTX_HRX_N10
PEG_GTX_HRX_N11

PEG_GTX_HRX_P0

PEG_GTX_HRX_P1

PEG_GTX_HRX_P2

PEG_GTX_HRX_P3

PEG_GTX_HRX_P4

PEG_GTX_HRX_P5

PEG_GTX_HRX_P6

PEG_GTX_HRX_P7

PEG_GTX_HRX_P8

PEG_GTX_HRX_P9

PEG_GTX_HRX_P10

PEG_GTX_HRX_P11

1 2

CC1 0.22U_0402_16 V7K

1 2

CC2 0.22U_0402_16 V7K

1 2

CC3 0.22U_0402_16 V7K

1 2

CC4 0.22U_0402_16 V7K

1 2

CC5 0.22U_0402_16 V7K

1 2

CC6 0.22U_0402_16 V7K

1 2

CC7 0.22U_0402_16 V7K

1 2

CC8 0.22U_0402_16 V7K

1 2

CC9 0.22U_0402_16 V7K

1 2

CC10 0.22U_0402_16V7K

1 2

CC11 0.22U_0402_16V7K

1 2

CC12 0.22U_0402_16V7K

1 2

CC13 0.22U_0402_16V7K

1 2

CC14 0.22U_0402_16V7K

1 2

CC15 0.22U_0402_16V7K

1 2

CC16 0.22U_0402_16V7K

1 2

CC17 0.22U_0402_16V7K

1 2

CC18 0.22U_0402_16V7K

1 2

CC19 0.22U_0402_16V7K

1 2

CC20 0.22U_0402_16V7K

1 2

CC21 0.22U_0402_16V7K

1 2

CC22 0.22U_0402_16V7K

1 2

CC23 0.22U_0402_16V7K

1 2

CC24 0.22U_0402_16V7K

Near MXM Connector x4 Gen3

PEG_HTX_C_GRX_N0
PEG_HTX_C_GRX_N1
PEG_HTX_C_GRX_N2
PEG_HTX_C_GRX_N3
PEG_HTX_C_GRX_N4
PEG_HTX_C_GRX_N5
PEG_HTX_C_GRX_N6
PEG_HTX_C_GRX_N7
PEG_HTX_C_GRX_N8

PEG_HTX_C_GRX_N9
PEG_HTX_C_GRX_N10
PEG_HTX_C_GRX_N11

PEG_HTX_C_GRX_P0

PEG_HTX_C_GRX_P1

PEG_HTX_C_GRX_P2

PEG_HTX_C_GRX_P3

PEG_HTX_C_GRX_P4

PEG_HTX_C_GRX_P5

PEG_HTX_C_GRX_P6

PEG_HTX_C_GRX_P7

PEG_HTX_C_GRX_P8

PEG_HTX_C_GRX_P9
PEG_HTX_C_GRX_P10
PEG_HTX_C_GRX_P11

PEG_GTX_HRX_P[0..7] <46>
PEG_GTX_HRX_N[0..7] <46>

PEG_HTX_C_GRX_P[0..7] <46>
PEG_HTX_C_GRX_N[0..7] <46>

PEG_GTX_HRX_P[8..11] <41>
PEG_GTX_HRX_N[8..11] <41>

PEG_HTX_C_GRX_P[8..11] <41>
PEG_HTX_C_GRX_N[8..11] <41>

N5P-GX

Caldera

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(1/7) DMI,FDI,PEG

PROCESSOR(1/7) DMI,FDI,PEG

PROCESSOR(1/7) DMI,FDI,PEG

LA-B751P

LA-B751P

LA-B751P

1

of

7 69Wednesday, March 26, 2014

7 69Wednesday, March 26, 2014

7 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

D D

4

+VCCIO_OUT

XDP@

0.1U_0402_25V6K~D

1

CC25

2

Place near JXDP1

+3V_PCH

1 2

RC3 1K_0402_1%~D@

CPU_PWR_DEBU G<12>

PBTN_OUT#<17,43>

IMVP_PWRGD<17,65>

PCH_SMBDATA<14,15,19,36>
PCH_SMBCLK<14,15,19,36>

SYS_PWROK_XDP

H_CPUPWRGD

RC5 need to close to JCPU1

RC4 1K_0402_1%~DXDP@
RC5 0_0402_5%~DXDP@

RC6 0_0402_5%~DXDP@
RC8 0_0402_5%~DXDP@

RC9 0_0402_5%~DXDP@
RC10 0_0402_5%~DXDP@

0.1U_0402_25V6K~D

1

CC26

2

XDP@

CFG3<11>

1 2
1 2

1 2
1 2

1 2
1 2

3

RC2 1K_0402_1 %~DXDP@

2

+VCCIO_OUT

JXDP1

1

GND0

XDP_PREQ#_R
XDP_PRDY#

CFG0<11>
CFG1<11>

CFG2<11>

1 2

CFG4<11>
CFG5<11>

CFG6<11>
CFG7<11>

CFG0
CFG1

CFG2 CFG10
CFG3_R

XDP_OBS0
XDP_OBS1

CFG4
CFG5

CFG6
CFG7

H_CPUPWRGD_XDP
CFD_PWRBTN#_X DP

CPU_PWR_DEBU G_R XDP_RST#_R
SYS_PWROK_XDP

DDR_XDP_SMBDAT_R 1
DDR_XDP_SMBCLK_R 1

XDP_TCLK_R

3

OBSFN_A0

5

OBSFN_A1

7

GND2

9

OBSDATA_A0

11

OBSDATA_A1

13

GND4

15

OBSDATA_A2

17

OBSDATA_A3

19

GND6

21

OBSFN_B0

23

OBSFN_B1

25

GND8

27

OBSDATA_B0

29

OBSDATA_B1

31

GND10

33

OBSDATA_B2

35

OBSDATA_B3

37

GND12

39

PWRGOOD/HOOK0

41

HOOK1

43

VCC_OBS_AB

45

HOOK2

47

HOOK3

49

GND14

51

SDA

53

SCL

55

TCK1

57

TCK0

59

GND16

SAMTE_BSH-030-01-L-D-A

OBSFN_C0
OBSFN_C1

OBSDATA_C0
OBSDATA_C1

OBSDATA_C2
OBSDATA_C3

OBSFN_D0
OBSFN_D1

OBSDATA_D0
OBSDATA_D1

GND11
OBSDATA_D2
OBSDATA_D3

GND13

ITPCLK/HOOK4

ITPCLK#/HOOK5

VCC_OBS_CD

RESET#/HOOK6

DBR#/HOOK7

GND15

TRST#

GND17

CONN@

GND1

GND3

GND5

GND7

GND9

TMS

+VCCIO_OUT

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

TD0

54
56

TDI

58
60

CFG17
CFG16

CFG8
CFG9

CFG11

CFG19
CFG18

CFG12
CFG13

CFG14
CFG15

CLK_XDP
CLK_XDP#

XDP_DBRESET#

XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
CFG3_R

CFG17 <11>
CFG16 <11>

CFG8 <11>
CFG9 <11>

CFG10 <11>
CFG11 <11>

CFG19 <11>
CFG18 <11>

CFG12 <11>
CFG13 <11>

CFG14 <11>
CFG15 <11>

1 2

RH1 0_0402_5%~DXDP@

1 2

RH2 0_0402_5%~DXDP@

RC7 1K_0402_1%~D

XDP@

12

CPU_PLTRST#

1

CLK_CPU_ITP <18>
CLK_CPU_ITP# <18>

C C

H_PROCHOT#<43,58,59>

H_CPUPWRGD<21>

10K_0402_5%

CAD Note:

B B

Avoid stub in the PWRGD path
while placing resistor RC5

RC11

62_0402_5%

RC18

+VCCIO_OUT

12

1 2

R2 56_0402_5%

1

CC29
100P_0402_50V8J

2

1 2

Note:
PECI/THERMTRIP:
Trace width=4 mils ,Spacing=18mil

@ESD@

ESD 9/5

Zo=50 ohm

CLK_CPU_SSC_DPLL#<18>
CLK_CPU_SSC_DPLL<18>

H_PECI<43>

H_THERMTRIP#<21>

H_PM_SYNC<17>

CPU_PLTRST#<21>

CLK_CPU_DPLL#<18>
CLK_CPU_DPLL<18>

CLK_CPU_DMI#<18>
CLK_CPU_DMI<18>

H_CATERR#

T1

H_PECI

H_PROCHOT#_R
H_THERMTRIP#

H_PM_SYNC
H_CPUPWRGD
PM_SYS_PWRGD_BUF

CLK_CPU_DPLL#
CLK_CPU_DPLL
CLK_CPU_SSC_DPLL#
CLK_CPU_SSC_DPLL
CLK_CPU_DMI#
CLK_CPU_DMI

CPU_PLTRST#

CPU1B

C51

PROC_DETECT

G50

CATERR

G51

PECI

E50

PROCHOT

D53

THERMTRIP

D52

PM_SYNC

F50

PWRGOOD

AP48

SM_DRAMPWR OK

L54

PLTRSTIN

AC6

DPLL_REF_CLKN

AE6

DPLL_REF_CLKP

V6

SSC_DPLL_REF_CLKN

Y6

SSC_DPLL_REF_CLKP

AB6

BCLKN

AA6

BCLKP

HASWELL_BGA1364

HASWELL_BGA

MISC

THERMAL CLOCK

PWR

2 OF 12

SM_RCOMP0
SM_RCOMP1

DDR3L

SM_RCOMP2

SM_DRAMRST

JTAG

PRDY
PREQ

TCK
TMS

TRST

TDO
DBR

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7

TDI

BB51

SM_RCOMP0

BB53

SM_RCOMP1

BB52

SM_RCOMP2

BE51

H_DRAMRST#

N53

XDP_PRDY#

N52

XDP_PREQ#

N54

XDP_TCLK

M51

XDP_TMS

M53

XDP_TRST#

N49

XDP_TDI_R

M49

XDP_TDO_R

F53

XDP_DBRESET#_R

R51

XDP_BPM#0_R

R50

XDP_BPM#1_R

P49

XDP_BPM#2

N50

XDP_BPM#3

R49

XDP_BPM#4

P53

XDP_BPM#5

U51

XDP_BPM#6

P51

XDP_BPM#7

remove by SIT phase

1 2

RC13 0_0402_5%@

1 2

RC14 0_0402_5%@

1 2

RC15 0_0402_5%@

1 2

RC16 0_0402_5%@

1 2

RC17 0_0402_5%@

1 2

RC19 0_0402_5%@

1 2

RC20 0_0402_5%@

T2
T3

T4
T5
T6
T7
T8
T9

SM_DRAMPWROK with DDR Power Gating Topology

+3V_PCH +3V_PCH

@

+1.35V_CPU_VDDQ

12

RC26

1.8K_0402_1%

PM_SYS_PWRGD_BUF

12

RC30

3.3K_0402_1%

1

2

UC1

5

DS3@

P

B

O

A

G

74AHC1G09GW_TSSOP5

3

1 2

NODS3@

CC30

0.1U_0402_16V7K

4

12

12

DS3@

DS3@

CC31

DS3@

RC25
100K_0402_5%

1

2

RC31 0_0402_5%

1

2

RC24

100K_0402_5%

SYS_PWROK<12,17,43>

PM_DRAM_PWR GD<17>

A A

0.01U_0402_16V7K

Follow Intel schematic
review-0930

XDP_PREQ#_R
XDP_TCLK_R

XDP_TDI
XDP_TDO
XDP_DBRESET#

XDP_OBS0
XDP_OBS1

1

CC27
100P_0402_50V8J

2

@ESD@

ESD 9/5

XDP_DBRESET# <17>

+1.35V

RC12

@

470_0402_5%

1 2

0_0402_5%

1 2

R1

1

0.1U_0402_16V7K
CC28

@ESD@

2

Place near SODIMM side,

DDR3 COMPENSATION SIGNALS

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

Note:
Trace width=12~15 mil, Spcing=20 mils
Max trace length= 500 mils

1 2

RC21 100_0402_1%

1 2

RC22 75_0402_1%

1 2

RC23 100_0402_1%

PU/PD for JTAG signals

XDP_DBRESET#_R

XDP_TMS
XDP_TDI_R

XDP_TDO_R
XDP_TCLK
XDP_TRST#

RC27 1K_0402_5%

RC28 51_0402_5%@
RC29 51_0402_5%@

TMS/TDI no require pull high on Check list

12

12
12

RP1

1 8
2 7
3 6
4 5

51_0804_8P4R_5%

DDR3_DRAMRST# <14,15>

+3VS

+1.05VS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

PROCESSOR(2/7) PM,XDP,CLK

PROCESSOR(2/7) PM,XDP,CLK

PROCESSOR(2/7) PM,XDP,CLK

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet

Date: Sheet of

2

Date: Sheet of

1

8 69Wednesday, March 26, 2014

8 69Wednesday, March 26, 2014

8 69Wednesday, March 26, 2014

0.1

0.1

0.1

of

5

4

3

2

1

D D

C C

B B

DDR_A_D[0..63]<14> DDR_B_D[0..63]<15>

+SM_VREF
+SA_DIMM_VREFDQ
+SB_DIMM_VREFDQ

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

+SM_VREF
+SA_DIMM_VREFDQ
+SB_DIMM_VREFDQ

AH54
AH52
AK51
AK54
AH53
AH51
AK52
AK53
AN54
AN52
AR51
AR53
AN53
AN51
AR52
AR54
AV52
AV53

AY52

AY51
AV51
AV54

AY54

AY53

AY47

AY49
BA47
BA45

AY45

AY43
BA49
BA43

BF14
BC14
BC11

BF11
BE14
BD14
BD11
BE11

AW3

AW2

AW4

AW1

BC53

BC9
BE9
BE6
BC6
BD9
BF9
BE5
BD6
BB4
BC2

BB3
BB2

AU3
AU1
AR1
AR4
AU2
AU4
AR2
AR3

AM6
AR6
AN6

CPU1C

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

SM_VREF
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ

RSVD

3 OF 12

HASWELL_BGA

RSVD

SA_CKN0

SA_CK0
SA_CKE0
SA_CKN1

SA_CK1
SA_CKE1
SA_CKN2

SA_CK2
SA_CKE2
SA_CKN3

SA_CK3
SA_CKE3

SA_CS#0
SA_CS#1
SA_CS#2
SA_CS#3
SA_ODT0
SA_ODT1
SA_ODT2
SA_ODT3

SA_BS0

SA_BS1

SA_BS2

SA_RAS

SA_WE

SA_CAS

SA_MA0

SA_MA1

SA_MA2

SA_MA3

SA_MA4

SA_MA5

SA_MA6

SA_MA7

SA_MA8

SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15

SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7

RSVD
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

HASWELL_BGA1364

VSS

BD31
BE25

M_CLK_DDR#0

BF25

M_CLK_DDR0

BE34

DDR_CKE0_DIMMA

BD25

M_CLK_DDR#1

BC25

M_CLK_DDR1

BF34

DDR_CKE1_DIMMA

BE23
BF23
BC34
BD23
BC23
BD34

BE16

DDR_CS0_DIMMA#

BC17

DDR_CS1_DIMMA#

BE17
BD16
BC16

M_ODT0

BF16

M_ODT1

BF17
BD17
BC20

DDR_A_BS0

BD21

DDR_A_BS1

BD32

DDR_A_BS2

BC21
BF20

DDR_A_RAS#

BF21

DDR_A_WE#

BE21

DDR_A_CAS#

BD28

DDR_A_MA0

BD27

DDR_A_MA1

BF28

DDR_A_MA2

BE28

DDR_A_MA3

BF32

DDR_A_MA4

BC27

DDR_A_MA5

BF27

DDR_A_MA6

BC28

DDR_A_MA7

BE27

DDR_A_MA8

BC32

DDR_A_MA9

BD20

DDR_A_MA10

BF31

DDR_A_MA11

BC31

DDR_A_MA12

BE20

DDR_A_MA13

BE32

DDR_A_MA14

BE31

DDR_A_MA15

AJ52

DDR_A_DQS#0

AP53

DDR_A_DQS#1

AW52

DDR_A_DQS#2

AY46

DDR_A_DQS#3

BD12

DDR_A_DQS#4

BE7

DDR_A_DQS#5

BA3

DDR_A_DQS#6

AT2

DDR_A_DQS#7

AW39
AJ53

DDR_A_DQS0

AP52

DDR_A_DQS1

AW53

DDR_A_DQS2

BA46

DDR_A_DQS3

BE12

DDR_A_DQS4

BD7

DDR_A_DQS5

BA2

DDR_A_DQS6

AT3

DDR_A_DQS7

AW40

BA40
AY40
BA39
AY39
AV40
AU40
AV39
AU39

M_CLK_DDR#0 <14>
M_CLK_DDR0 < 14>
DDR_CKE0_DIMMA <14>
M_CLK_DDR#1 <14>
M_CLK_DDR1 < 14>
DDR_CKE1_DIMMA <14>

DDR_CS0_DIMMA# <14>
DDR_CS1_DIMMA# <14>

M_ODT0 <14>
M_ODT1 <14>

DDR_A_BS0 <14>
DDR_A_BS1 <14>
DDR_A_BS2 <14>

DDR_A_RAS# <14>
DDR_A_WE# <14>
DDR_A_CAS# <14>

DDR_A_MA[0..15] <14>

DDR_A_DQS#[0..7] <14>

DDR_A_DQS[0..7] <14>

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

AC54
AC52
AE51
AE54
AC53
AC51
AE52
AE53
AU47
AU49
AV43
AV45
AU43
AU45
AV47
AV49
BC49
BE49
BD47
BC47
BD49
BD50
BE47

BF47
BE44
BD44
BC42

BF42

BF44
BC44
BD42
BE42
BA16
AU16
BA15
AV15

AY16
AV16

AY15
AU15
AU12

AY12
BA10
AU10
AV12
BA12

AY10
AV10

AU8

AU6

AM2
AM3

AM1
AM4

4 OF 12

HASWELL_BGA

RSVD

SB_CKN0

SB_CK0
SB_CKE0
SB_CKN1

SB_CK1
SB_CKE1
SB_CKN2

SB_CK2
SB_CKE2
SB_CKN3

SB_CK3
SB_CKE3

SB_CS#0
SB_CS#1
SB_CS#2
SB_CS#3

SB_ODT0
SB_ODT1
SB_ODT2
SB_ODT3

SB_BS0
SB_BS1
SB_BS2

SB_RAS

SB_WE

SB_CAS

SB_MA0

SB_MA1

SB_MA2

SB_MA3

SB_MA4

SB_MA5

SB_MA6

SB_MA7

SB_MA8

SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15

SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7

RSVD
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

RSVD

HASWELL_BGA1364

VSS

AY36
AW27

M_CLK_DDR#2

AV27

M_CLK_DDR2

AU36

DDR_CKE2_DIMMB

AW26

M_CLK_DDR#3

AV26

M_CLK_DDR3

AU35

DDR_CKE3_DIMMB

BA26
AY26
AV35
BA27
AY27
AV36

BA20

DDR_CS2_DIMMB#

AY19

DDR_CS3_DIMMB#

AU19
AW20

AY20

M_ODT2

BA19

M_ODT3

AV19
AW19
AY23

DDR_B_BS0

BA23

DDR_B_BS1

BA36

DDR_B_BS2

AU30
AV23

DDR_B_RAS#

AW23

DDR_B_WE#

AV20

DDR_B_CAS#

BA30

DDR_B_MA0

AW30

DDR_B_MA1

AY30

DDR_B_MA2

AV30

DDR_B_MA3

AW32

DDR_B_MA4

AY32

DDR_B_MA5

AT30

DDR_B_MA6

AV32

DDR_B_MA7

BA32

DDR_B_MA8

AU32

DDR_B_MA9

AU23

DDR_B_MA10

AY35

DDR_B_MA11

AW35

DDR_B_MA12

AU20

DDR_B_MA13

AW36

DDR_B_MA14

BA35

DDR_B_MA15

AD52

DDR_B_DQS#0

AU46

DDR_B_DQS#1

BD48

DDR_B_DQS#2

BD43

DDR_B_DQS#3

AW16

DDR_B_DQS#4

AW10

DDR_B_DQS#5

AW8

DDR_B_DQS#6

AL2

DDR_B_DQS#7

BE38
AD53

DDR_B_DQS0

AV46

DDR_B_DQS1

BE48

DDR_B_DQS2

BE43

DDR_B_DQS3

AW15

DDR_B_DQS4

AW12

DDR_B_DQS5

AW6

DDR_B_DQS6

AL3

DDR_B_DQS7

BD38

BF39
BE39
BF37
BE37
BD39
BC39
BC37
BD37

M_CLK_DDR#2 <15>
M_CLK_DDR2 <15>
DDR_CKE2_DIMMB <15>
M_CLK_DDR#3 <15>
M_CLK_DDR3 <15>
DDR_CKE3_DIMMB <15>

DDR_CS2_DIMMB# <15>
DDR_CS3_DIMMB# <15>

M_ODT2 <15>
M_ODT3 <15>

DDR_B_BS0 <15>
DDR_B_BS1 <15>
DDR_B_BS2 <15>

DDR_B_RAS# <15>
DDR_B_WE# <15>
DDR_B_CAS# <15>

DDR_B_MA[0..15] <15>

DDR_B_DQS#[0..7] <15>

DDR_B_DQS[0..7] <15>

CPU1D

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48

BA8

SB_DQ49

AV6

SB_DQ50

BA6

SB_DQ51

AV8

SB_DQ52

AY8

SB_DQ53
SB_DQ54

AY6

SB_DQ55
SB_DQ56
SB_DQ57

AK1

SB_DQ58

AK4

SB_DQ59
SB_DQ60
SB_DQ61

AK2

SB_DQ62

AK3

SB_DQ63

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

PROCESSOR(3/7) DDRIII

PROCESSOR(3/7) DDRIII

PROCESSOR(3/7) DDRIII

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

1

9 69Wednesday, March 26, 2014

9 69Wednesday, March 26, 2014

9 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

D D

4

3

2

1

COMPENSATION PU FOR eDP

CPU1J

CPU_HDMI_N2<27>
CPU_HDMI_P2<27>
CPU_HDMI_N1<27>

HDMI

C C

mDP

CPU_HDMI_P1<27>
CPU_HDMI_N0<27>
CPU_HDMI_P0<27>
CPU_HDMI_N3<27>
CPU_HDMI_P3<27>

CPU_mDP_N0<26>
CPU_mDP_P0<26>
CPU_mDP_N1<26>
CPU_mDP_P1<26>
CPU_mDP_N2<26>
CPU_mDP_P2<26>
CPU_mDP_N3<26>
CPU_mDP_P3<26>

CPU_HDMI_N2
CPU_HDMI_P2
CPU_HDMI_N1
CPU_HDMI_P1
CPU_HDMI_N0
CPU_HDMI_P0
CPU_HDMI_N3
CPU_HDMI_P3

CPU_mDP_N0
CPU_mDP_P0
CPU_mDP_N1
CPU_mDP_P1
CPU_mDP_N2
CPU_mDP_P2
CPU_mDP_N3
CPU_mDP_P3

C25

DDIB_TXN0

D25

DDIB_TXP0

A25

DDIB_TXN1

B25

DDIB_TXP1

C24

DDIB_TXN2

D24

DDIB_TXP2

A24

DDIB_TXN3

B24

DDIB_TXP3

C21

DDIC_TXN0

D21

DDIC_TXP0

A21

DDIC_TXN1

B21

DDIC_TXP1

C20

DDIC_TXN2

D20

DDIC_TXP2

A20

DDIC_TXN3

B20

DDIC_TXP3

C16

DDID_TXN2

D16

DDID_TXP2

A16

DDID_TXN3

B16

DDID_TXP3

C17

DDID_TXN0

D17

DDID_TXP0

A17

DDID_TXN1

B17

DDID_TXP1

HASWELL_BGA1364

HASWELL_BGA

EDP_AUXN

EDP_AUXP

EDP_HPD

EDP_TXN0
EDP_TXN1
EDP_TXP0
EDP_TXP1

EDP_RCOMP

EDP_DISP_UTIL

FDI_TXN0
FDI_TXP0
FDI_TXN1
FDI_TXP1

10 OF 12

F15
F14
E14

C14
A12
D14
B12

AG6
E12

C12
D12
A14
B14

EDP Panel

CPU_EDP_AUX#
CPU_EDP_AUX
EDP_HPD_R

CPU_EDP_TX0N
CPU_EDP_TX1N
CPU_EDP_TX0P
CPU_EDP_TX1P

EDP_COMP
EDP_DISP_UTIL

CPU_EDP_TX2N
CPU_EDP_TX2P
CPU_EDP_TX3N
CPU_EDP_TX3P

1 2

RC33 0_0402_5%@

CPU_EDP_AUX# <25>
CPU_EDP_AUX <25>

CPU_EDP_TX0N <25>
CPU_EDP_TX1N <25>
CPU_EDP_TX0P <25>
CPU_EDP_TX1P <25>

CPU_EDP_TX2N <25>
CPU_EDP_TX2P <25>
CPU_EDP_TX3N <25>
CPU_EDP_TX3P <25>

PCH_INV_PWM <17,25>

EDP_COMP

Note:
Trace width=20 mils ,Spacing=25mil,
Max length=100 mils.

HPD INVERSION FOR EDP

+VCCIO_OUT

RC34

1 2

EDP_HPD_R

QC1

13

LBSS138LT1G_SOT-23-3

D

S

+VCOMP_OUT

12

RC3224.9_0402_1%

10K_0402_5%

2

G

12

RC35

100K_0402_5%

CPU_EDP_HPD <25>

HPD is a active-high signal from device.

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

The HPD processor input is
active-low signal.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(4/7) eDP,DP and HDMI

PROCESSOR(4/7) eDP,DP and HDMI

PROCESSOR(4/7) eDP,DP and HDMI

LA-B751P

LA-B751P

LA-B751P

1

10 69Wednesday, March 26, 2014

10 69Wednesday, March 26, 2014

10 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

4

3

2

1

CPU1K

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15

BC1

BC54

BD1

BD54

BE1
BE2

BE3
BE52
BE53
BE54

BF2

BF3

BF4

A51
A52
A53

B52
B53
B54

BD3

G21
G24

G19

AG49
AD49
AC49
AE49

AB49

W51

W53
U53

R53
R52

A3
A4

B2
B3

BE4

F6

G6

F21

F51
F52
F22

L52
L53

L51

F24
F25
F20

Y50

V51

Y49
Y54
Y53

V54

L50
L49

E5

CPU1L

RSVD
RSVD

RSVD
RSVD
RSVD

RSVD
RSVD

RSVD
RSVD
RSVD

RSVD
RSVD
RSVD

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

HASWELL_BGA1364

T12

D D

C C

1 2

RC38 49.9_0402_1%

1 2

RC39 49.9_0402_1%

1 2

RC40 49.9_0402_1%

B B

A A

H_CPU_TESTLO

CFG_RCOMP

H_CPU_RSVD

T14

T16
T17

T18
T19

+VCC_CORE

T25
T27

T30

T32
T33

CFG0<8>
CFG1<8>
CFG2<8>
CFG3<8>
CFG4<8>
CFG5<8>
CFG6<8>
CFG7<8>
CFG8<8>
CFG9<8>
CFG10<8>
CFG11<8>
CFG12<8>
CFG13<8>
CFG14<8>
CFG15<8>

T37
T39
T40

T41

T43

T46
T47

T48

H_CPU_RSVD

H_CPU_TESTLO

B3_A3

A52_B52
A53_B53

C3_B2
B3_A3

A52_B52
A53_B53
B54_C54

BE1_BD1

BE54_BD54
BE1_BD1
BE2_BF2
BE3_BF3
BE52_BF52
BE53_BF53
BE54_BD54
BE2_BF2
BE3_BF3

HASWELL_BGA

RSVD_TP
RSVD_TP

RSVD_TP
RSVD_TP

RSVD_TP
RSVD_TP
TESTLOW_F21
VSS
VSS
VSS
VCC

RSVD_TP
RSVD_TP

RSVD_TP

RSVD_TP
RSVD_TP
TESTLOW_F20

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15

RSVD
RSVD
RSVD

HASWELL_BGA1364

HASWELL_BGA

RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP

CFG_RCOMP

CFG16
CFG18
CFG17
CFG19

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

RSVD

RSVD_TP
RSVD_TP

VSS
VSS

VSS
VSS

RSVD
RSVD
RSVD

11 OF 12

12 OF 12

RSVD
RSVD
RSVD

RSVD
RSVD
RSVD

RSVD
RSVD

RSVD

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

F1
E1
A5
A6

R54
Y52
V53
Y51
V52

B50
AH49
AM48
AU27
AU26
BD4
BC4
AL6
F8

F16

G12
G10

H54
H53

H51
H52

N51
G53
H50

CFG_RCOMP
CFG16
CFG17
CFG18
CFG19

BF51
BF52

BE52_BF52

BF53

BE53_BF53

C1

C1_C2

C2

C1_C2

C3

C3_B2

C54

B54_C54

D1

D54

AN35
AN37
AF9
AE9
G14
G17
AD45
AG45

T10
T11
T13
T15

CFG16 <8>
CFG17 <8>
CFG18 <8>
CFG19 <8>

T20
T21
T22
T23
T24
T26
T28
T29
T31

T34

T35
T36

T38

T42

T44

T45

CFG Straps for Processor

CFG2

RC36

1K_0402_1%

@

1 2

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

Embedded Display Port Presence Strap

CFG4

PCIE Port Bifurcation Straps

CFG[6:5]

PEG DEFER TRAINING

CFG7

1: Normal Operation; Lane # definition matches
socket pin map definition

*

0:Lane Reversed

CFG4

12

RC37
1K_0402_1%

1 : Disabled; No Physical Display Port
attached to Embedded Display Port

0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

*

CFG5

CFG6

RC41

1K_0402_1%

RC42

1K_0402_1%

1 2

1 2

11: (Default) x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled

01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

*

CFG7

RC43

@

1K_0402_1%

1 2

1: (Default) PEG Train immediately following xxRESETB
de assertion

*

0: PEG Wait for BIOS for training

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(5/7) RSVD,CFG

PROCESSOR(5/7) RSVD,CFG

PROCESSOR(5/7) RSVD,CFG

LA-B751P

LA-B751P

LA-B751P

1

11 69Wednesday, March 26, 2014

11 69Wednesday, March 26, 2014

11 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

+1.35V_CPU_VDDQ Source

Note:
Intel Shark Bay
Removed the S3 power reduction circuit.

+1.35V +1.35V_CPU_VDDQ

D D

VCC_SENSE

Note:
0 ohm Resistor should be placed
cloose to CPU

VCCSENSE<65>

VSSSENSE<65>

C C

B B

+VCCIO_OUT

2.2U_0603_10V6K

1

2

VDDQ DECOUPLING (Follow INTEL DG)

+1.35V_CPU_VDDQ

A A

VCCSENSE VCCSENSE_R

VSSSENSE

Note:
Place the UP resistor close to CPU
RC47 Close to CPU 300-1500mil

+1.05VS +VCCIO_OUT

CC32

Close to CPU

10U_0603_6.3V6M

CC33

1

1

@

2

2

V0.1A

1

2

Close to CPU Close to CPU

JP1 @

JUMP_43X118

@

JP2

JUMP_43X118

+VCC_CORE

100_0402_1%

12

RC44

RC45 0_0402_5%

RC46 0_0402_5%

100_0402_1%

12

R3

SVID ALERT

VIDALERT_N<65>
VIDSCLK<65>
VIDSOUT<65>

SVID DATA

Note:
Place the UP resistor close to CPU
RC49 Close to CPU 300-1500mil

12

RC51 0_0603_5%@

RESISTOR STUFFING OPTIONS ARE
PROVIDED FOR TESTING PURPOSES

10U_0603_6.3V6M

22U_0805_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

CC34

C3

@

CC36

CC35

1

1

2

1

2

5

1

@

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C5

C4

1

1

@

2

2

V0.1A

12

12

12

@

12

VSSSENSE_R

@

+VCCIO_OUT

12

Close to CPU Close to CPU

10U_0603_6.3V6M

10U_0603_6.3V6M

CC37

CC38

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C7

C6

1

1

@

@

2

2

+1.35V

VSSSENSE_R <13>

Broadwell/Haswe ll

HSW_BDW
Compatibility CKT

RC47
75_0402_1%

1 2

RC48 43_0402_5%

12

RC49
130_0402_1%

+VCCIO_OUT

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

22U_0805_6.3V6M

C8

10U_0603_6.3V6M

CC40

CC39

CC41

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

CC47

CC48

1

1

@

2

2

C1

0.1U_0402_16V7K

1 2

C2

0.1U_0402_16V7K

1 2

150_0402_1%

RC50

RC52

10K_0402_5%

10U_0603_6.3V6M

1

@

2

22U_0805_6.3V6M

CC49

1

2

@

@

+1.35V_CPU_VDDQ

CPU_PWR_DEBUG<8>

+1.05VS

1 2

@

1 2

CC42

22U_0805_6.3V6M

CC50

1

2

4

+1.35V_CPU_VDDQ

+VCCIO_OUT
+VCCIO2PCH
+VCOMP_OUT

CPU_PWR_DEBUG

330U_D2_2V_Y

330U_D2_2V_Y

1

1

CC43

+

+

2

2

V0.1A

22U_0805_6.3V6M

CC51

1

2

4

CPU1E

VCCSENSE_R

IVR_ERROR
IST_TRIGGER

AR29
AR31
AR33
AT13
AT19
AT23
AT27
AT32
AT36

AV37
AW22
AW25
AW29
AW33

AY18

BB21

BB22

BB26

BB27

BB30

BB31

BB34

BB36

BD22

BD26

BD30

BD33

BE18

BE22

BE26

BE30

BE33

AN31

AN22

AN18

AN33

AR49

AM49

AN49

AJ49
AG50
AK49

AJ50
AP49
AB50
AP50
AD50
AM50

AA46
AA47

RC54 0_0603_5%BDW@

J17
J21
J26
J31

L6

M6

C50

AH9

D51
F17
AK6

W9
J12

J53
J52
J50

B51
F19
E52
V49
U49

W49

V50

A36
A38
A39
A42
A43
A45
A46
A48

AA8
AA9

T49
T50
T51
T52

T53

+VCC_CORE

T54
T55

T56

T57
T58

T59

H_CPU_SVIDALRT#
VIDSCLK
VIDSOUT

CPU_PWR_DEBUG

T60
T61
T62
T63

+VCC_CORE

CC44

@

HSW_BDW compatibility CKT

+1.05VS +VCCIO2PCH

place CC45 close to CPU

RSVD
RSVD
RSVD
RSVD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

RSVD
VCC
VCC
RSVD
RSVD

VCC_SENSE
RSVD
VCCIO_OUT
RSVD
VCOMP_OUT
RSVD
RSVD
RSVD
RSVD

VIDALERT
VIDSCLK
VIDSOUT

VSS
PWR_DEBUG
VSS
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

HASWELL_BGA1364

12

HASWELL_BGA

5 OF 12

0.1U_0402_10V7K

BDW@

1

CC45

2

3

+VCC_CORE

B43

VCC

B45

VCC

B46

VCC

B48

VCC

C27

VCC

C28

VCC

C31

VCC

C32

VCC

C34

VCC

C36

VCC

C38

VCC

C39

VCC

C42

VCC

C43

VCC

C45

VCC

C46

VCC

C48

VCC

D27

VCC

D28

VCC

D31

VCC

D32

VCC

D34

VCC

D36

VCC

D38

VCC

D39

VCC

D42

VCC

D43

VCC

D45

VCC

D46

VCC

D48

VCC

E27

VCC

E28

VCC

E31

VCC

E32

VCC

E34

VCC

E36

VCC

E38

VCC

E39

VCC

E42

VCC

E43

VCC

E45

VCC

E46

VCC

E48

VCC

F27

VCC

F28

VCC

F31

VCC

F32

VCC

F34

VCC

F36

VCC

F38

VCC

F39

VCC

F42

VCC

F43

VCC

F45

VCC

F46

VCC

F48

VCC

G27

VCC

G29

VCC

G31

VCC

G32

VCC

G34

VCC

G36

VCC

G38

VCC

G39

VCC

G42

VCC

G43

VCC

G45

VCC

G46

VCC

G48

VCC

H11

VCC

H12

VCC

H13

VCC

H14

VCC

H16

VCC

H17

VCC

H18

VCC

H19

VCC

H20

VCC

H21

VCC

H23

VCC

H24

VCC

H25

VCC

H26

VCC

H27

VCC

H29

VCC

FC_D5
FC_D3

BDW@

22U_0805_6.3V6M

1

CC46

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

Broadwell/Haswe ll

D5

FC_D5

D3

FC_D3

HSW_BDW compatibility CKT

FC_D3

+VCCIO2PCH

12

BDW@

RC53

6.04K_0402_1%

12

BDW@

RC55

2.67K_0402_1%

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

RC54

CC45

CC46

RC53

RC55

RESET_OUT#

HSW BDW

X

X

X

X

X

SYS_PWROK <17,43,8>

Compal Secret Data

Compal Secret Data

Compal Secret Data

2

V

V

V

V

V

Deciphered Date

Deciphered Date

Deciphered Date

2

55A

1

HASWELL_BGA

CPU1F

AB45

VCC

AB46

VCC

AB8

VCC

AC46

VCC

AC47

VCC

AC8

VCC

AC9

VCC

AD46

VCC

AD8

VCC

AE46

VCC

AE47

VCC

AE8

VCC

AF8

VCC

AG46

VCC

AG8

VCC

AH46

VCC

AH47

VCC

AH8

VCC

AJ45

VCC

AJ46

VCC

AK46

VCC

AK47

VCC

AK8

VCC

AL45

VCC

AL46

VCC

AL8

VCC

AL9

VCC

AM46

VCC

AM47

VCC

AM8

VCC

AM9

VCC

AN10

VCC

AN12

VCC

AN13

VCC

AN14

VCC

AN15

VCC

AN16

VCC

AN17

VCC

AN19

VCC

AN20

VCC

AN21

VCC

AN23

VCC

AN24

VCC

AN25

VCC

AN26

VCC

AN27

VCC

AN29

VCC

AN30

VCC

AN32

VCC

AN34

VCC

AN36

VCC

AN38

VCC

AN39

VCC

AN40

VCC

AN41

VCC

AN42

VCC

AN43

VCC

AN44

VCC

AN45

VCC

AN46

VCC

AN8

VCC

AN9

VCC

AP10

VCC

AP12

VCC

AP13

VCC

AP14

VCC

AP15

VCC

AP16

VCC

AP17

VCC

AP18

VCC

AP19

VCC

AP20

VCC

AP21

VCC

AP22

VCC

AP23

VCC

AP24

VCC

AP25

VCC

AP26

VCC

AP27

VCC

AP29

VCC

AP30

VCC

AP31

VCC

AP32

VCC

AP33

VCC

AP34

VCC

AP35

VCC

AP36

VCC

AP37

VCC

AP38

VCC

AP39

VCC

AP40

VCC

AP41

VCC

AP42

VCC

AP43

VCC

AP44

VCC

AP46

VCC

AP47

VCC

AP8

VCC

AP9

VCC

AR35

VCC

AR37

VCC

AR39

VCC

AR41

VCC

AR43

VCC

AR45

VCC

AR46

VCC

H30

VCC

H31

VCC

H32

VCC

6 OF 12

HASWELL_BGA1364

Title

Title

Title

PROCESSOR(6/7) PWR

PROCESSOR(6/7) PWR

PROCESSOR(6/7) PWR

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

+VCC_CORE+VCC_CORE

H33

VCC

H34

VCC

H36

VCC

H37

VCC

H38

VCC

H39

VCC

H40

VCC

H42

VCC

H43

VCC

H45

VCC

H46

VCC

H48

VCC

H8

VCC

H9

VCC

J10

VCC

J14

VCC

J19

VCC

J24

VCC

J29

VCC

J33

VCC

J36

VCC

J37

VCC

J38

VCC

J39

VCC

J40

VCC

J42

VCC

J43

VCC

J45

VCC

J46

VCC

J48

VCC

J8

VCC

J9

VCC

K38

VCC

K40

VCC

K43

VCC

K44

VCC

K45

VCC

K46

VCC

K48

VCC

K8

VCC

K9

VCC

L37

VCC

L38

VCC

L39

VCC

L40

VCC

L42

VCC

L43

VCC

L44

VCC

L46

VCC

L47

VCC

L8

VCC

M37

VCC

M38

VCC

M39

VCC

M40

VCC

M42

VCC

M43

VCC

M44

VCC

M45

VCC

M46

VCC

M8

VCC

M9

VCC

N37

VCC

N38

VCC

N39

VCC

N40

VCC

N42

VCC

N43

VCC

N44

VCC

N46

VCC

N47

VCC

N8

VCC

N9

VCC

P45

VCC

P46

VCC

P8

VCC

R46

VCC

R47

VCC

R8

VCC

R9

VCC

T45

VCC

T46

VCC

U46

VCC

U47

VCC

U8

VCC

U9

VCC

V45

VCC

V46

VCC

V8

VCC

W46

VCC

W47

VCC

W8

VCC

Y45

VCC

Y46

VCC

Y8

VCC

A27

VCC

A28

VCC

A31

VCC

A32

VCC

A34

VCC

B27

VCC

B28

VCC

B31

VCC

B32

VCC

B34

VCC

B36

VCC

B38

VCC

B39

VCC

B42

VCC

1

0.1

0.1

12 69Wednesday, March 26, 2014

12 69Wednesday, March 26, 2014

12 69Wednesday, March 26, 2014

0.1

5

4

3

2

1

HASWELL_BGA

CPU1I

BC10

VSS

BC12

VSS

BC15

VSS

BC18

VSS

BC22

VSS

BC26

VSS

BC3

VSS

BC30

D D

C C

B B

A A

5

BC33
BC36
BC38
BC41
BC43
BC46
BC48

BC50
BC52

BD10
BD15
BD18
BD36
BD41
BD46

BD51
BE10
BE15
BE36
BE41
BE46

BF10
BF12
BF15
BF18
BF22
BF26
BF30
BF33
BF36
BF38
BF41
BF43
BF46
BF48

BC5

BC7

BD5

BF7
C11
C15
C19
C22
C26
C30
C33
C37

C40
C44
C49
C52

D11
D15
D19
D22
D26
D30
D33
D37
D40
D44
D49

G11
G13
G16

C4

C8

D8
E11
E15
E16
E17
E19
E20
E21
E22
E24
E25
E26
E30
E33
E37
E40
E44
E49
E51
E53

E8

F2
F26

F3
F30
F33
F37

F4
F40
F44
F49

F5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

HASWELL_BGA1364

VSS_SENSE

9 OF 12

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF

G20
G23
G25
G26
G30
G33
G37
G40
G44
G49
G52
G54
G7
G8
G9
H44
H49
H7
J44
J49
J51
J54
J7
K1
K2
K3
K4
K5
K6
K7
L48
L7
L9
M48
M50
M52
M54
M7
N48
N7
P1
P2
P3
P4
P48
P5
P50
P52
P54
P6
P7
R48
R7
T48
U1
U2
U3
U4
U48
U5
U50
U52
U54
U6
U7
V48
V7
V9
W48
W50
W52
W54
W7
Y48
Y7
Y9

AR22
AB48
P9
G18

A49
A50
A8
B4
BA1
BA54
BB1
BB54
BD2
BD53
BF49
BF5
BF50
BF6
C53
D2
E54
F54
G1

D50

AT40
AT42
AT43
AT45
AT46
AT47
AT49

AT5
AT50
AT51
AT52
AT53
AT54

AT6

AT8

AT9
AU13
AU18
AU22
AU25
AU29
AU33
AU37
AU42

AU5

AU9

AV1
AV13
AV18

AV2
AV22
AV25
AV29

AV3
AV33

AV4
AV42

AV5
AV50

AV9

AW13
AW18
AW37
AW42
AW43
AW45
AW46
AW47
AW49

AW5
AW50
AW51
AW54

AW9

AY13
AY22
AY25
AY29
AY33
AY37
AY42

VSSSENSE_R <12>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

HASWELL_BGA

CPU1H

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

HASWELL_BGA1364

3

AY50

VSS

AY9

VSS

B11

VSS

B15

VSS

B19

VSS

B22

VSS

B26

VSS

B30

VSS

B33

VSS

B37

VSS

B40

VSS

B44

VSS

B49

VSS

B8

VSS

BA13

VSS

BA18

VSS

BA22

VSS

BA25

VSS

BA29

VSS

BA33

VSS

BA37

VSS

BA4

VSS

BA42

VSS

BA5

VSS

BA50

VSS

BA51

VSS

BA52

VSS

BA53

VSS

BA9

VSS

BB10

VSS

BB11

VSS

BB12

VSS

BB14

VSS

BB15

VSS

BB16

VSS

BB17

VSS

BB18

VSS

BB20

VSS

BB23

VSS

BB25

VSS

BB28

VSS

BB32

VSS

BB33

VSS

BB37

VSS

BB38

VSS

BB39

VSS

BB41

VSS

BB42

VSS

BB43

VSS

BB44

VSS

BB46

VSS

BB47

VSS

BB48

VSS

BB49

VSS

BB5

VSS

BB6

VSS

BB7

VSS

BB9

VSS

8 OF 12

Compal Secret Data

Compal Secret Data

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

AA48

AB51
AB52
AB53
AB54

AC48

AC50

AD48
AD51
AD54

AE48

AE50

AG48

AG51
AG52
AG53
AG54

AH48

AH50

2

AA1
AA2
AA3
AA4

AA5
AA7
AB5

AB7
AB9

AC5

AC7

AD7
AD9
AE1
AE2
AE3
AE4

AE5

AE7
AF5
AF6
AF7

AG5

AG7
AG9
AH1
AH2
AH3
AH4

AH5

AH7

A11
A15
A19
A22
A26
A30
A33
A37
A40
A44

HASWELL_BGA

CPU1G

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

HASWELL_BGA1364

AJ48

VSS

AJ51

VSS

AJ54

VSS

AK48

VSS

AK5

VSS

AK50

VSS

AK7

VSS

AK9

VSS

AL1

VSS

AL4

VSS

AL48

VSS

AL5

VSS

AL7

VSS

AM5

VSS

AM51

VSS

AM52

VSS

AM53

VSS

AM54

VSS

AM7

VSS

AN1

VSS

AN2

VSS

AN3

VSS

AN4

VSS

AN48

VSS

AN5

VSS

AN50

VSS

AN7

VSS

AP51

VSS

AP54

VSS

AP7

VSS

AR12

VSS

AR14

VSS

AR16

VSS

AR18

VSS

AR20

VSS

AR24

VSS

AR26

VSS

AR48

VSS

AR5

VSS

AR50

VSS

AR7

VSS

AR8

VSS

AR9

VSS

AT1

VSS

AT10

VSS

AT12

VSS

AT15

VSS

AT16

VSS

AT18

VSS

AT20

VSS

AT22

VSS

AT25

VSS

AT26

VSS

AT29

VSS

AT33

VSS

AT35

VSS

AT37

VSS

AT39

VSS

AT4

VSS

7 OF 12

Compal Electronics, Inc.

Title

Title

Title

PROCESSOR(7/7) VSS

PROCESSOR(7/7) VSS

PROCESSOR(7/7) VSS

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

13 69Wednesday, March 26, 2014

13 69Wednesday, March 26, 2014

13 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

+1.35V +1.35V

3A@1.35V

3A@1.35V

3A@1.35V3A@1.35V

DDR3 SO-DIMM A

JDIMM1

0.1U_0402_16V7K

CD2

1

2

1

2

+VREF_DQ_DIMMA

DDR_A_D0
DDR_A_D1

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

M_CLK_DDR0
M_CLK_DDR#0

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13
DDR_CS1_DIMMA#

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_D42
DDR_A_D43

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_D58
DDR_A_D59

2.2U_0603_10V6K

0.1U_0402_16V7K

CD22

CD23

1

2

2.2U_0603_10V6K
CD1

1

D D

C C

B B

1 2

RD7 10K_0402_5%

1 2

A A

RD8 10K_0402_5%

2

DDR_CKE0_DIMMA<9>

DDR_A_BS2<9>

M_CLK_DDR0<9>
M_CLK_DDR#0<9>

DDR_A_BS0<9>

DDR_A_WE#<9>
DDR_A_CAS#<9>

DDR_CS1_DIMMA#<9>

+3VS

5

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

BOSS1

LCN_DAN06-K4406-0103

SP07000LT00

CONN@

DQS0#

DQS0

DQ12
DQ13

RESET#

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3

DQ30
DQ31

CKE1

RAS#

ODT0

ODT1

VREF_CA

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5

DQ46
DQ47

DQ52
DQ53

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7

DQ62
DQ63

EVENT#

GND2

BOSS2

VSS
DQ4
DQ5
VSS

VSS
DQ6
DQ7
VSS

VSS
DM1

VSS

VSS

VSS
DM2
VSS

VSS

VSS

VSS

VSS

VDD

VDD

VDD

VDD

VDD
CK1

CK1#

VDD
BA1

VDD

VDD

VDD

VSS

VSS
DM4
VSS

VSS

VSS

VSS

VSS

VSS
DM6
VSS

VSS

VSS

VSS

VSS

SDA
SCL
VTT

4

DDR_A_D[0..63]<9>

DDR_A_DQS[0..7]<9>

DDR_A_DQS#[0..7]<9>

2
4

DDR_A_D4

6

DDR_A_D5

8
10

DDR_A_DQS#0

12

DDR_A_DQS0

14
16

DDR_A_D6

18

DDR_A_D7

20
22

DDR_A_D12

24

DDR_A_D13

26
28
30

DDR3_DRAMRST#

32
34

DDR_A_D14

36

DDR_A_D15

38
40

DDR_A_D20

42

DDR_A_D21

44
46
48
50

DDR_A_D22

52

DDR_A_D23DDR_A_D18

54
56

DDR_A_D28

58

DDR_A_D29

60
62

DDR_A_DQS#3

64

DDR_A_DQS3

66
68

DDR_A_D30

70

DDR_A_D31

72

74

DDR_CKE1_DIMMA

76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206
208

DDR_A_MA15

DDR_A_MA14

DDR_A_MA11

DDR_A_MA7

DDR_A_MA6

DDR_A_MA4

DDR_A_MA2

DDR_A_MA0

M_CLK_DDR1

M_CLK_DDR#1

DDR_A_BS1

DDR_A_RAS#

DDR_CS0_DIMMA#

M_ODT0

M_ODT1

DDR_A_D36

DDR_A_D37

DDR_A_D38

DDR_A_D39

DDR_A_D44

DDR_A_D45

DDR_A_DQS#5

DDR_A_DQS5

DDR_A_D46

DDR_A_D47

DDR_A_D52

DDR_A_D53

DDR_A_D54

DDR_A_D55

DDR_A_D60

DDR_A_D61

DDR_A_DQS#7

DDR_A_DQS7

DDR_A_D62

DDR_A_D63

PCH_SMBDATA

PCH_SMBCLK

+0.675VS

0.65A@0.675V

0.65A@0.675V

0.65A@0.675V0.65A@0.675V

A15
A14

A11

A7

A6
A4

A2
A0

S0#

NC

4

DDR3_DRAMRST# <15,8>

DDR_CKE1_DIMMA <9>

M_CLK_DDR1 <9>
M_CLK_DDR#1 <9>

DDR_A_BS1 <9>
DDR_A_RAS# <9>

DDR_CS0_DIMMA# <9>
M_ODT0 <9>

M_ODT1 <9>

DDR_A_MA[0..15]<9>

+VREF_CA

0.1U_0402_16V7K

2.2U_0603_10V6K

CD19

1

1

2

2

M_THERMAL# <15,43>
PCH_SMBDATA <15,19,36,8>
PCH_SMBCLK <15,19,36,8>

3

Layout Note:
Place near JDIMM1

0.1U_0402_16V7K

1U_0402_6.3V6K

CD4

CD3

1

1

2

1

2

2

0.1U_0402_16V7K

0.1U_0402_16V7K

CD6

CD5

1

2

Layout Note:
Place near JDIMM1

10U_0603_6.3V6M

CD7

1

1

@

2

2

Place near JDIMM1 pin203 pin204

CD20

+SM_VREF

Note:
VREF trace width:20 mils at least
Spacing:20mils to other signal/planes

CPU DRIVER
VREF PATH IS
DEFAULT

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

CD21

0.022U_0402_16V7K

12

12

RD4

24.9_0402_1%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

+1.35V+0.675VS

10U_0603_6.3V6M

10U_0603_6.3V6M

CD8

@

10U_0603_6.3V6M

CD9

1

2

CD10

1

2

10U_0603_6.3V6M

10U_0603_6.3V6M

CD12

CD11

1

2

1

1

2

2

DDR3L SODIMM ODT GENERATION

Layout Note:
Place near JDIMM1

+0.675VS +1.35V

12

12

@RF@

CD41

10P_0402_50V8J

RD2

1 2

2.2_0402_1%

@RF@

CD42

10P_0402_50V8J

+1.35V

RD1
1K_0402_1%

1 2

RD3

1K_0402_1%

1 2

Note:
VREF trace width:20 mils at least
Spacing:20mils to other signal/planes

2

*M3+M1:Default Recommendation
M1:VREF_DQ driven by a voltage Divider Network during
Processor power-off state.
M3:VREF_DQ driven by Processor.

+VREF_CA

+VREF_CA <15>

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

10U_0603_6.3V6M

10U_0603_6.3V6M

CD14

CD13

1

2

+SA_DIMM_VREFDQ

C9

0.022U_0402_16V7K

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

DDRIII-SODIMM SLOT1

DDRIII-SODIMM SLOT1

0.1U_0402_16V7K

1

2

12

12

0.1U_0402_16V7K

CD15

1

2

1 2

RD6

2.2_0402_1%

RD10

24.9_0402_1%

LA-B751P

LA-B751P

LA-B751P

0.1U_0402_16V7K

0.1U_0402_16V7K

CD40 330U_2.5V_M

CD16

CD17

1

2

+1.35V

RD5
1K_0402_1%

1 2

RD9

1K_0402_1%

1 2

1

1

CD18

1

+

2

2

Add 330u Solid Cap

+VREF_DQ_DIMMA

14 69Wednesday, March 26, 2014

14 69Wednesday, March 26, 2014

14 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

+VREF_DQ_DIMMB

DDR_B_D0
DDR_B_D1

0.1U_0402_16V7K

2.2U_0603_10V6K
CD25

CD24

1

1

2

RD15

10K_0402_5%

5

2

DDR_CKE2_DIMMB<9>

DDR_B_BS2<9>

M_CLK_DDR2<9>
M_CLK_DDR#2<9>

DDR_B_BS0<9>

DDR_B_WE#<9>
DDR_B_CAS#<9>

DDR_CS3_DIMMB#<9>

+3VS

12

+3VS

D D

C C

B B

1 2

RD16 10K_0402_5%

A A

2.2U_0603_10V6K

0.1U_0402_16V7K

1

CD39

2

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_D26
DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA5

DDR_B_MA3
DDR_B_MA1

M_CLK_DDR2
M_CLK_DDR#2

DDR_B_MA10
DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

DDR_B_MA13
DDR_CS3_DIMMB#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_D42
DDR_B_D43

DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_D58
DDR_B_D59

1

C16

2

3A@1.35V

3A@1.35V

3A@1.35V3A@1.35V

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LCN_DAN06-K4806-0103
SP07000M200

4

DQ4
DQ5

VSS3

DQS0
VSS6

DQ6

DQ7
VSS8
DQ12
DQ13

DM1

DQ14
DQ15

DQ20
DQ21

DM2

DQ22
DQ23

DQ28
DQ29

DQS3

DQ30
DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

CK1
CK1#

BA1
RAS#

ODT0

ODT1

NC2

DQ36
DQ37

DM4

DQ38
DQ39

DQ44
DQ45

DQS5

DQ46
DQ47

DQ52
DQ53

DM6

DQ54
DQ55

DQ60
DQ61

DQS7

DQ62
DQ63

SDA

SCL

VTT2

+1.35V+1.35V

2
4

DDR_B_D4

6

DDR_B_D5

8
10

DDR_B_DQS#0

12

DDR_B_DQS0

14
16

DDR_B_D6

18

DDR_B_D7

20
22

DDR_B_D12

24

DDR_B_D13

26
28
30

DDR3_DRAMRST#

32
34

DDR_B_D14

36

DDR_B_D15

38
40

DDR_B_D20

42

DDR_B_D21

44
46
48
50

DDR_B_D22

52

DDR_B_D23

54
56

DDR_B_D28

58

DDR_B_D29

60
62

DDR_B_DQS#3

64

DDR_B_DQS3

66
68

DDR_B_D30

70

DDR_B_D31

72

74

DDR_CKE3_DIMMB

76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

DDR_B_MA15

DDR_B_MA14

DDR_B_MA11

DDR_B_MA7

DDR_B_MA6

DDR_B_MA4

DDR_B_MA2

DDR_B_MA0

M_CLK_DDR3

M_CLK_DDR#3

DDR_B_BS1

DDR_B_RAS#

DDR_CS2_DIMMB#

M_ODT2

M_ODT3

DDR_B_D36

DDR_B_D37

DDR_B_D38

DDR_B_D39

DDR_B_D44

DDR_B_D45

DDR_B_DQS#5

DDR_B_DQS5

DDR_B_D46

DDR_B_D47

DDR_B_D52

DDR_B_D53

DDR_B_D54

DDR_B_D55

DDR_B_D60

DDR_B_D61

DDR_B_DQS#7

DDR_B_DQS7

DDR_B_D62

DDR_B_D63

PCH_SMBDATA

PCH_SMBCLK

0.65A@0.675V

0.65A@0.675V

0.65A@0.675V0.65A@0.675V

A15
A14

A11

A7

A6
A4

A2
A0

S0#

G2

DDR3_DRAMRST# <14,8>

DDR_CKE3_DIMMB <9>

M_CLK_DDR3 <9>
M_CLK_DDR#3 <9>

DDR_B_BS1 <9>
DDR_B_RAS# <9>

DDR_CS2_DIMMB# <9>
M_ODT2 <9>

M_ODT3 <9>

+0.675VS

CONN@

DQS#0

VSS10

VSS12

VSS14

VSS16

VSS17

VSS19

VSS21

VSS24

VSS26

VDD10

VDD12

VDD14

VDD16

VDD18

VREF_CA

VSS28

VSS30

VSS31

VSS33

VSS35

DQS#5

VSS38

VSS40

VSS42

VSS43

VSS45

VSS47

DQS#7

VSS50

VSS52

EVENT#

4

3

DDR_B_D[0..63]<9>

DDR_B_DQS[0..7]<9>

DDR_B_DQS#[0..7]<9>

DDR_B_MA[0..15]<9>

Layout Note:
Place near JDIMM2

+0.675VS

1U_0402_6.3V6K

C10

1

2

2

0.1U_0402_16V7K

C11

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K

C13

C12

1

1

2

2

Place near JDIMM2 pin203 pin204

Layout Note:
Place near JDIMM2

+1.35V

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

CD27

CD26

1

1

2

2.2U_0603_10V6K
C15

+VREF_CA <14>

Note:
VREF trace width:20 mils at least
Spacing:20mils to other signal/planes

Compal Secret Data

Compal Secret Data

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

0.1U_0402_16V7K
C14

1

1

2

2

M_THERMAL# <14,43>
PCH_SMBDATA <14,19,36,8>
PCH_SMBCLK <14,19,36,8>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

@

@

2

10U_0603_6.3V6M

CD28

1

2

2

CD29

1

2

0.022U_0402_16V7K

10U_0603_6.3V6M

10U_0603_6.3V6M

CD31

CD30

1

1

2

2

1 2

RD12

2.2_0402_1%

CD38

12

12

RD14

24.9_0402_1%

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Layout Note:
Place near JDIMM3

+0.675VS +1.35V

12

12

@RF@

CD43

10P_0402_50V8J

10U_0603_6.3V6M

CD32

1

2

+1.35V+SB_DIMM_VREFDQ

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

@RF@

CD44

10P_0402_50V8J

0.1U_0402_16V7K

10U_0603_6.3V6M

CD33

1

1

2

RD11
1K_0402_1%

1 2

RD13
1K_0402_1%

1 2

CD34

2

+VREF_DQ_DIMMB

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

DDRIII-SODIMM SLOT2

DDRIII-SODIMM SLOT2

DDRIII-SODIMM SLOT2

LA-B751P

LA-B751P

LA-B751P

0.1U_0402_16V7K

0.1U_0402_16V7K

CD36

CD35

1

1

2

2

1

0.1U_0402_16V7K

CD37

1

2

15 69Wednesday, March 26, 2014

15 69Wednesday, March 26, 2014

15 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

+RTC_CELL

12

4

330K_0402_1%~D

RH3

3

2

1

D D

INTVRMEN - INTEGRATED SUS 1.05V VRM
ENABLE

High - Enable Internal VRs
Low - Enable External VRs

+3VS

RH5 10K_0402_5%~D@

NO REBOOT STRAP

DISABLED WHEN LOW (DEFAULT)
ENABLED WHEN HIGH

C C

+3VS

RH14 100K_0402_5%~D@

CMOS_CLR1

Shunt Clear CMOS

Open

ME_CLR1

Shunt Clear ME RTC Registers

Open

HDA_SYNC Isolation Circuit

B B

A A

330K_0402_1%~D

12

1 2

1 2

CMOS setting

Keep CMOS

TPM setting

Keep ME RTC Registers

PCH_INTVRMEN

@

RH4

HDA_SPKR

PCH_GPIO33

1M_0402_5%~D

RH20

1 2

+3V_PCH

RH60 10K_0402_5%~D

RH6 1K_0402_1%~D@

FLASH DESCRIPTOR SECURITY OVERRIDE

LOW = DESABLED (DEFAULT)
HIGH = ENABLED

+5VS

G

2

13

PCH_AZ_SYNCPCH_AZ_SYNC_Q

D

S

QH1

SSM3K7002FU_SC70-3~D

1 2

1 2

+RTC_CELL

PCH_GPIO13

PCH_AZ_SDOUT

YH1 Change to SJ10000LD00 (ESR=50Kohm)

CH1

1 2

PCH_RTCX1_R

18P_0402_50V8J~D

CH2

1 2

RH15 20K_0402_5%~D

1 2

RH12 1M_0402_5%~D

1 2

RH13 20K_0402_5%~D

1

1

@

CMOS1 SHORT PADS~D

CH4

CMOS place near DIMM

+3V_PCH

0_0603_5%~D

12

RH17

@

+3.3V_ALW_PCH_JTAG PCH_JTAG_TMS

1 2

18P_0402_50V8J~D

2

2

1 2

1U_0402_6.3V6K~D

12

RH18 51_0402_1%~D

1 2

RH19 210_0402_1%~D

@

1 2

RH21 210_0402_1%~D

@

1 2

RH23 210_0402_1%~D

@

RH9 0_0402_5%

12

YH1

32.768KHZ_12.5PF_9H03220008

2

CH3
1U_0402_6.3V6K~D

1

PCH_AZ_CODEC_SDIN0<32>

ME_EN<43>

100_0402_1%~D

100_0402_1%~D

12

12

RH25

HDA for Codec and MDC

RP2

1 8
2 7

PCH_AZ_CODEC_SDOUT<32>
PCH_AZ_CODEC_SYNC<32>

PCH_AZ_CODEC_RST#<32>

PCH_AZ_CODEC_BITCLK<32>

RH29 33_0402_5%~D

27P_0402_50V8J~D

@

CH5

1

2

3 6
4 5

1 2

PCH_AZ_SDOUT
PCH_AZ_SYNC_Q
PCH_AZ_RST#

33_0804_8P4R_5%

PCH_AZ_BITCLK

@

12

HDA_SPKR<32>

1 2

RH16 1K_0402_1%~D

PCH_JTAG_TCK

PCH_JTAG_TDI

PCH_JTAG_TDO

100_0402_1%~D

RH24 0_0402_5%

12

RH26

RH27

12

RH11
10M_0402_5%~D

PCH_RTCX2

SRTCRST#

INTRUDER#

PCH_INTVRMEN

PCH_RTCRST#

PCH_AZ_BITCLK

PCH_AZ_SYNC

HDA_SPKR

PCH_AZ_RST#

PCH_AZ_CODEC_SDIN0

PCH_AZ_SDOUT

PCH_GPIO33

PCH_GPIO13

@

T66 PAD~D@

T67 PAD~D@

PCH_RTCX1

12

PCH_TP25

UH1A

B5

RTCX1

B4

RTCX2

B9

SRTCRST#

A8

INTRUDER#

G10

INTVRMEN

D9

RTCRST#

B25

HDA_BCLK

A22

HDA_SYNC

AL10

SPKR

C24

HDA_RST#

L22

HDA_SDI0

K22

HDA_SDI1

G22

HDA_SDI2

F22

HDA_SDI3

A24

HDA_SDO

B17

DOCKEN#/G PIO33

C22

HDA_DOCK_ RST#/GPIO13

AB3

JTAG_TCK

AD1

JTAG_TMS

AE2

JTAG_TDI

AD3

JTAG_TDO

F8

TP25

C26

TP22

AB6

TP20

LPT_PCH_M_EDS

JTAGRTC AZALIA

LYNXPOINT_BGA695

5

1 OF 11

+3VS

PCH_GPIO21

PCH_GPIO19

PCH_SATALED#

BC8

SATA_RXN_0
SATA_RXP_ 0

SATA_TXN_0
SATA_TXP_0

SATA_RXN_1
SATA_RXP_ 1

SATA_TXN_1
SATA_TXP_1

SATA

SATA_RXN_2
SATA_RXP_ 2

SATA_TXN_2
SATA_TXP_2

SATA_RXN_3
SATA_RXP_ 3

SATA_TXN_3
SATA_TXP_3

SATA_RXN4/ PERN1

SATA_RXP4 /PERP1

SATA_TXN4/P ETN1
SATA_TXP4/P ETP1

SATA_RXN5/ PERN2

SATA_RXP5 /PERP2

SATA_TXN5/P ETN2
SATA_TXP5/P ETP2

SATA_RCOMP

SATALED#

SATA0GP/G PIO21

SATA1GP/G PIO19

SATA_IREF

SATA_PRX_DTX_N0

BE8

SATA_PRX_DTX_P0

AW8

SATA_PTX_DRX_N0

AY8

SATA_PTX_DRX_P0

BC10

SATA_PRX_DTX_N1

BE10

SATA_PRX_DTX_P1

AV10

SATA_PTX_DRX_N1

AW10

SATA_PTX_DRX_P1

BB9
BD9

AY13
AW13

BC12

SATA_PRX_DTX_N3

BE12

SATA_PRX_DTX_P3

AR13

SATA_PTX_DRX_N3

AT13

SATA_PTX_DRX_P3

BD13

SATA_PRX_DTX_N4

BB13

SATA_PRX_DTX_P4

AV15

SATA_PTX_DRX_N4

AW15

SATA_PTX_DRX_P4

BC14

SATA_PRX_DTX_N5

BE14

SATA_PRX_DTX_P5

AP15

SATA_PTX_DRX_N5

AR15

SATA_PTX_DRX_P5

AY5

SATA_COMP

AP3

PCH_SATALED#

AT1

PCH_GPIO21

AU2

PCH_GPIO19

BD4

SATA_IREF

BA2

TP9

BB2

TP8

PCH_SATALED# <38>

12

@

RH22 0_0402_5%

T64PAD~D @

T65PAD~D @

SATA Impedance Compensation

SATA_COMP

CAD note:
Place the resistor within 500 mils of the PCH. Avoid
routing next to clock pins.

1 2

1 2

SATA_PRX_DTX_N0 <36>
SATA_PRX_DTX_P0 <36>

SATA_PTX_DRX_N0 <36>
SATA_PTX_DRX_P0 <36>

SATA_PRX_DTX_N1 <29>
SATA_PRX_DTX_P1 <29>

SATA_PTX_DRX_N1 <29>
SATA_PTX_DRX_P1 <29>

SATA_PRX_DTX_N3 <29>
SATA_PRX_DTX_P3 <29>

SATA_PTX_DRX_N3 <29>
SATA_PTX_DRX_P3 <29>

SATA_PRX_DTX_N4 <29>
SATA_PRX_DTX_P4 <29>

SATA_PTX_DRX_N4 <29>
SATA_PTX_DRX_P4 <29>

SATA_PRX_DTX_N5 <29>
SATA_PRX_DTX_P5 <29>

SATA_PTX_DRX_N5 <29>
SATA_PTX_DRX_P5 <29>

+1.5VS

1 2

+1.5VS

RH287.5K_0402_1%~D

RH710K_0402_5%~D

12

RH84.7K_0402_5%~D

RH1010K_0402_5%~D

HDD

NGFF SSD for Echo 15

NGFF SSD for Echo 17
Gen2 Only

NGFF SSD for Echo 17

NGFF SSD for Echo 15

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PCH (1/9) RTC,HDA,SATA,XDP

PCH (1/9) RTC,HDA,SATA,XDP

PCH (1/9) RTC,HDA,SATA,XDP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

16 69Wednesday, March 26, 2014

16 69Wednesday, March 26, 2014

16 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

D D

+3V_PCH

1 2

RH30 10K_0402_5%~D

1 2

RH31 10K_0402_5%~D

1 2

RH35 10K_0402_5%~D

1 2

RH37 10K_0402_5%~D

+3VS

1 2

RH33 8.2K_0402_5%~D

1 2

RH38 10K_0402_5%~D

DMI_CTX_PRX_N0<7>
DMI_CTX_PRX_N1<7>

DMI_CTX_PRX_N2<7>
DMI_CTX_PRX_N3<7>

DMI_CTX_PRX_P0<7>

C C

PM_DRAM_PWRGD<8>

B B

ME_SUS_PWR_ACK<43>

+PCH_VCCDSW3_3

DMI_CTX_PRX_P1<7>

DMI_CTX_PRX_P2<7>
DMI_CTX_PRX_P3<7>

DMI_CRX_PTX_N0<7>
DMI_CRX_PTX_N1<7>

DMI_CRX_PTX_N2<7>
DMI_CRX_PTX_N3<7>

DMI_CRX_PTX_P0<7>
DMI_CRX_PTX_P1<7>

DMI_CRX_PTX_P2<7>
DMI_CRX_PTX_P3<7>

+1.5VS

+1.5VS

SUSACK#<43>

SYS_PWROK<12,43,8>

PCH_PWROK<43>

PCH_RSMRST#<43>

PBTN_OUT#<43,8>

+PCH_VCCDSW3_3

RH152 10K_0402_5%

1 2

RH36 10K_0402_5%~D

SUS_STAT#

@

ME_SUS_PWR_ACK

PCIE_WAKE#

@

PCH_RI#

PM_CLKRUN#

PCH_RSMRST#

DMI_RCOMP

SIO_PWRBTN#_R

ACIN

PCH_RI#

AW22

AR20

AP17
AV20

AY22
AP20

AR17

AW20

BD21
BE20

BD17
BE18

BB21
BC20

BB17
BC18

BE16

AW17

AV17

AY17

AB10

R6

AM1

AD7

F10

AB7

H3

J2

J4

K1

E6

K7

N4

D2

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1

DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1

DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1

DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1

DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

1 2

DMI_IREF

@

RH144 0_0402_5%

T70 PAD~D@

T72 PAD~D@ CH7

1 2

RH42 7.5K_0402_1%~D

R2458

1 2

0_0402_5%

1 2

RH47 0_0402_5%

1 2

RH49 0_0402_5%

1 2

RH50 0_0402_5%

1 2

RH52 0_0402_5%

1 2

RH53 0_0402_5%

1 2

RH55 0_0402_5%

1 2

RH56 0_0402_5%

1 2

RH58 8.2K_0402_5%~D

12

ACIN

WAKE#

@

@

@

@

@

@

@

ACIN<37,43,59>

T79 PAD~D@

SUSACK#_R

SYS_RESET#

SYS_PWROK_R

PCH_PWROK_R

PM_APWROK_R

PM_DRAM_PWRGD_R

PCH_RSMRST#_R

ME_SUS_PWR_ACK_R

PCH_BATLOW#

XDP_DBRESET#<8>

UH1B

DMI_RXN_0
DMI_RXN_1

DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1

DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1

DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1

DMI_TXP_2
DMI_TXP_3

DMI_IREF

TP12

TP7

DMI_RCOMP

SUSACK#

SYS_RESE T#

SYS_PW ROK

PWROK

APWROK

DRAMPWR OK

RSMRST#

SUSWAR N#/SUSPWR NACK/GPIO30

PWRBTN#

ACPRESEN T/GPIO31

BATLOW# /GPIO72

RI#

TP21

SLP_W LAN#/GPIO2 9

LYNXPOINT_BGA695

4

1 2

@

RH32 0_0402_5%

RH34 0_0402_5%

5

4 OF 11

FDI

SUS_STAT#/G PIO61

1 2

@

FDI_CSYNC

FDI_RCOMP

DSWVRME N

SUSCLK/G PIO62

SLP_S5# /GPIO63

ME_SUS_PWR_ACK_R SUSACK#_R

LPT_PCH_M_EDS

DMI

System Power

Management

FDI_RXN_0

FDI_RXN_1

FDI_RXP_0

FDI_RXP_1

FDI_INT

FDI_IREF

DPWROK

WAKE#

CLKRUN#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS #

PMSYNCH

SLP_LAN #

3

+3VS

CH6

@

1 2

0.1U_0402_25V6K~D

5

PCH_PWROK

IMVP_PWRGD<65,8>

SYS_RESET#

AJ35

AL35

AJ36

AL36

AV43

TP16

AY45

TP5

AV45

TP15

AW44

TP10

AL39

FDI_CSYNC

AL40

FDI_INT

AT45

AU42

TP17

AU44

TP13

AR44

C8

L13

K3

AN7

U7

Y6

Y7

C6

H1

F3

F1

AY3

G5

FDI_IREF

RH40 0_0402_5%

FDI_RCOMP

DSWODVREN

PCH_DRWROK_R

WAKE#

PM_CLKRUN#

SUS_STAT#

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

PM_SLP_SUS#

H_PM_SYNC

1 2

@

RH45 0_0402_5%

1 2

RH48 0_0402_5%~D@

DSWODVREN

T69PAD~D @

T71PAD~D @

12

RH417.5K_0402_1%~D

RH46 0_0402_5%

1 2

@

1 2

@

T73 PAD~D@

T74 PAD~D

T75 PAD~D

T76 PAD~D

T77 PAD~D

T78

IMVP_PWRGD

FDI_CSYNC <7>

FDI_INT <7>

+1.5VS

+1.5VS

PCH_RSMRST#_R

SUSCLK <28>

@

PM_SLP_S5# <37,43>

@

PM_SLP_S4# <43>

@

PM_SLP_S3# <37,43>

@

PM_SLP_SUS# <43>

PAD~D

@

H_PM_SYNC <8>

+RTC_CELL

330K_0402_1%

RH65

1 2

330K_0402_1%

@

RH70

1

P

B

4

O

2

A

G

3

TC7SH08FU_SSOP5~D

1 2

RH39 649_0402_1%~D

PCH_INV_PWM<10, 25>

PANEL_BKLEN<43>

PCH_ENVDD<25>

GPU_PWR_LEVEL<43,46>

TS_RST#<25>

DGPU_HOLD_RST#<43,46>

WL_OFF#<28>

TS_INT#<25>

PCH_DPWROK <43>

PCIE_WAKE# <30, 43>

DSWODVREN - ON DIE DSW VR ENABLE

HIGH = ENABLED (DEFAULT)
LOW = DISABLED

SYS_PWROK

UH2

T45

VGA_BLU E

U44

VGA_GRE EN

V45

VGA_RED

M43

VGA_DDC_ CLK

M45

VGA_DDC_ DATA

N42

VGA_HSYNC

N44

VGA_VSYN C

U40

DAC_IREF

U39

VGA_IRTN

N36

PCH_INV_PWM

PANEL_BKLEN

PCH_ENVDD

PCI_PIRQA#

PCI_PIRQB#

PCI_PIRQC#

PCI_PIRQD#

GPU_PWR_LEVEL

DGPU_HOLD_RST#

BBS_BIT1

WL_OFF#

EDP_BKL TCTL

K36

EDP_BKL TEN

G36

EDP_VDDE N

H20

PIRQA#

L20

PIRQB#

K17

PIRQC#

M20

PIRQD#

A12

GPIO50

B13

GPIO52

C12

GPIO54

C10

GPIO51

A10

GPIO53

AL6

GPIO55

1 2

1 2

PCH_ENVDD

PCH_mDP_HPD

RH54 100K_0402_5%

RH57 100K_0402_5%

Mason: Follow Intel DG. HPD PL. 2014/1/21

STP_A16OVR

2

LPT_PCH_M_EV

LVDSCRT

PCI

LYNXPOINT_BGA695

A16 SWAP OVERRIDE STRAP

LOW = A16 SWAP OVERRIDE
HIGH = DEFAULT

5 OF 11

DISPLAY

5UH1E

DDPB_CTRLDA TA

DDPC_CTRLDATA

DDPD_CTRLDATA

DDPB_CTRLCL K

DDPC_CTRLCLK

DDPD_CTRLCLK

DDPB_AUX N

DDPC_AUXN

DDPD_AUXN

DDPB_AUX P

DDPC_AUXP

DDPD_AUXP

DDPB_HPD

DDPC_HPD

DDPD_HPD

PIRQE#/G PIO2

PIRQF#/GP IO3

PIRQG#/G PIO4

PIRQH#/GP IO5

PME#

PLTRST#

PCH_PLTRST#

R40

R39

R35

R36

N40

N38

H45

K43

J42

H43

K45

J44

K40

K38

H39

G17

F17

L15

M15

AD10

Y11

1

2

PCH_DPC_CLK

PCH_DPC_DAT

PCH_DPC_AUX#

PCH_DPC_AUX

PCH_HDMI_HPD

PCH_mDP_HPD

BT_OFF#

DP_CBL_DET

FFS_INT1

PCH_PLTRST#

B

A

+3VS

RV528 2.2K_0402_5%~D

RV529 2.2K_0402_5%~D

PCH_DPB_HDMI_CLK

PCH_DPB_HDMI_DAT

T68 PAD~D@

+3VS

@

1 2

0.1U_0402_25V6K~D

5

P

4

PLT_RST

O

G

UH3

TC7SH08FU_SSOP5~D

3

1 2

1 2

BT_OFF# <28>

DP_CBL_DET <26>

FFS_INT1 <36>

PCH_PLTRST# <41,46>

BT_OFF#

WL_OFF#

PCI_PIRQA#

PCI_PIRQB#

PCI_PIRQC#

PCI_PIRQD#

RH67 10K_0402_5%~D@

1

PCH_DPC_CLK

PCH_DPC_DAT

PCH_DPB_HDMI_CLK <27>

PCH_DPB_HDMI_DAT <27>

PCH_DPC_CLK <26>

PCH_DPC_DAT <26>

PCH_DPC_AUX# <26>

PCH_DPC_AUX <26>

PCH_HDMI_HPD <27>

PCH_mDP_HPD <26>

+3VS

12

RH43
10K_0402_5%~D

@

12

RH51
100K_0402_5%~D

1 2

PM_CLKRUN#

PLT_RST# <28,30,31,43,44>

+3VS

12

RH598.2K_0402_5%~D

12

RH618.2K_0402_5%~D

12

RH628.2K_0402_5%~D

12

RH638.2K_0402_5%~D

12

RH648.2K_0402_5%~D

12

RH668.2K_0402_5%~D

HDMI

mDP

Boot BIOS Strap

SATA_SLPD

BBS_BIT1 Boot BIOS Location

A A

5

BBS_BIT1

1K_0402_1%

12

@

RH71

GPIO51 has internal pull up.

*

(BBS_BIT0)

00 LPC

0 1 Reserved (NAND)

1 0

PCI

11 SPI

4

1 2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PCH (2/9) DMI,FDI,PM,DP,CRT

PCH (2/9) DMI,FDI,PM,DP,CRT

PCH (2/9) DMI,FDI,PM,DP,CRT

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

17 69Wednesday, March 26, 2014

17 69Wednesday, March 26, 2014

17 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

D D

+3V_PCH

+3V_PCH

10/100/1G LAN

C C

MiniWLAN

Card Reader

CLK_PCI_LPC<43>

B B

CLK_PCIE_LAN#<30>

CLK_PCIE_LAN<30>

LANCLK_REQ#<30>

+3V_PCH

CLK_PCIE_WLAN#<28>
CLK_PCIE_WLAN<28>

WLANCLK_REQ#<28>

+3VS

CLK_PCIE_CD#<31>
CLK_PCIE_CD<31>

CDCLK_REQ#<31>

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

CLK_CPU_ITP#<8>

CLK_CPU_ITP<8>

CLK_PCI_LPBACK CLK_PCI0

CLK_PCI_LPC

1 2

RH73 10K_0402_5%~D

1 2

RH75 10K_0402_5%~D

1 2

RH77 10K_0402_5%~D

1 2

RH78 10K_0402_5%~D

1 2

RH80 10K_0402_5%~D

1 2

RH81 10K_0402_5%~D

1 2

RH82 10K_0402_5%~D

RH83 10K_0402_5%~D

RH85 0_0402_5%

RH86 0_0402_5%

RH87 22_0402_5%~D

RH89 22_0402_5%~D

12

@RF@

CH72

10P_0402_50V8J

4

LYNXPOINT_BGA695

LPT_PCH_M_EDS

2 OF 11

UH1C

Y43

CLKOUT_PCIE _N_0

Y45

CLKOUT_PCIE _P_0

CLK_PCI1

CLK_PCI2

CLK_PCI3

CLK_PCI4

AB1

PCIECLKRQ 0#/GPIO73

AA44

CLKOUT_PCIE _N_1

AA42

CLKOUT_PCIE _P_1

AF1

PCIECLKRQ 1#/GPIO18

AB43

CLKOUT_PCIE _N_2

AB45

CLKOUT_PCIE _P_2

AF3

PCIECLKRQ 2#/GPIO20/ SMI#

AD43

CLKOUT_PCIE _N_3

AD45

CLKOUT_PCIE _P_3

T3

PCIECLKRQ 3#/GPIO25

AF43

CLKOUT_PCIE _N_4

AF45

CLKOUT_PCIE _P_4

V3

PCIECLKRQ 4#/GPIO26

AE44

CLKOUT_PCIE _N5

AE42

CLKOUT_PCIE _P_5

AA2

PCIECLKRQ 5#/GPIO44

AB40

CLKOUT_PCIE _N_6

AB39

CLKOUT_PCIE _P_6

AE4

PCIECLKRQ 6#/GPIO45

AJ44

CLKOUT_PCIE _N_7

AJ42

CLKOUT_PCIE _P_7

Y3

PCIECLKRQ 7#/GPIO46

AH43

CLKOUT_ITPXD P

AH45

CLKOUT_ITPXD P_P

D44

CLKOUT_33 MHZ0

E44

CLKOUT_33 MHZ1

B42

CLKOUT_33 MHZ2

F41

CLKOUT_33 MHZ3

A40

CLKOUT_33 MHZ4

CLOCK SIGNAL

@

@

@

@

@

@

CLK_PCIE_LAN#

CLK_PCIE_LAN

LANCLK_REQ#

CLK_PCIE_WLAN#
CLK_PCIE_WLAN
WLANCLK_REQ#

CLK_PCIE_CD#
CLK_PCIE_CD
CDCLK_REQ#

12

12

12

12

12

CLK_BCLK_ITP#

CLK_BCLK_ITP

T96 PAD~D@

T95 PAD~D@

T83 PAD~D@

3

5

CLKOUT_PEG _A

CLKOUT_PEG _A_P

PEGA_CL KRQ#/GPIO47

CLKOUT_PEG _B

CLKOUT_PEG _B_P

PEGB_CL KRQ#/GPIO56

CLKOUT_DMI

CLKOUT_DMI_ P

CLKOUT_DP

CLKOUT_DP_ P

CLKOUT_DPNS

CLKOUT_DPNS _P

CLKIN_DMI

CLKIN_DMI_ P

CLKIN_GND

CLKIN_GND _P

CLKIN_DOT96 N
CLKIN_DOT96 P

CLKIN_SA TA

CLKIN_SA TA_P

REFCLK14 IN

CLKIN_33 MHZLOOPBACK

XTAL25_IN

XTAL25_O UT

CLKOUTFLEX 0/GPIO64

CLKOUTFLEX 1/GPIO65

CLKOUTFLEX 2/GPIO66

CLKOUTFLEX 3/GPIO67

ICLK_IREF

DIFFCLK_B IASREF

TP19
TP18

AB35

CLK_PEG_GPU#_R

AB36

CLK_PEG_GPU_R

AF6

Y39

Y38

U4

AF39

CLK_CPU_DMI#

AF40

CLK_CPU_DMI

AJ40

CLK_CPU_SSC_DPLL#

AJ39

CLK_CPU_SSC_DPLL

AF35

CLK_CPU_DPLL#

AF36

CLK_CPU_DPLL

AY24

CLK_BUF_DMI#

AW24

CLK_BUF_DMI

AR24

CLK_BUF_BCLK#

AT24

CLK_BUF_BCLK

H33

CLK_BUF_DOT96#

G33

CLK_BUF_DOT96

BE6

CLK_BUF_CKSSCD#

BC6

CLK_BUF_CKSSCD

F45

CLK_PCH_14M

D17

CLK_PCI_LPBACK

AL44
AM43

C40

F38

PCH_GPIO65

F36

PCH_GPIO66

F39

AM45

ICLK_IREF

AD39
AD38

AN44

PCH_CLK_BIASREF

CLKREQ#_GPU

RH7410K_0402_5%

CLK_PCIE_DGPU#

CLK_PCIE_DGPU

CLKREQ#_DGPU

RH7610K_0402_5%

XTAL25_IN
XTAL25_OUT

PCH_GPIO65
PCH_GPIO66

RH129 0_0402_5%

1 2

CLK_PEG_GPU#

@

RH128 0_0402_5%

1 2

CLK_PEG_GPU

@

CLKREQ#_GPU <41,46>

1 2

1 2

RH91 0_0402_5%

1 2

+3V_PCH

CLK_PCIE_DGPU# <41>

CLK_PCIE_DGPU <41>

CLKREQ#_DGPU <41,43>

+3V_PCH

CLK_CPU_DMI# <8>

CLK_CPU_DMI <8>

CLK_CPU_SSC_DPLL# <8>
CLK_CPU_SSC_DPLL <8>

CLK_CPU_DPLL# <8>
CLK_CPU_DPLL <8>

T80PAD~D @

12

@

T82PAD~D @
T84PAD~D @

+1.05V_+1.5V_RUN

RH927.5K_0402_1%

RPH3

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

+1.5VS

CLK_PEG_GPU# <41,46>

CLK_PEG_GPU <41,46>

Caldera

+3VS

2

1

GPU

CLOCK TERMINATION for FCIM and need close to PCH

CLK_BUF_DMI#
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_BCLK#

CLK_BUF_DOT96#
CLK_BUF_DOT96

CLK_PCH_14M

CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD

距距距距，從RP拆拆拆拆拆拆

1 2

RH84 1M_0402_5%

RH88

0_0402_5%

12P_0402_50V8J

1 2

2

CH8

1

YH2

25MHZ_10PF_Q22FA2380049900

3

OUT

4

GND

GND

RPH1

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%~D

RPH2

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%~D

1 2

RH79 10K_0402_5%~D

1 2

RH122 10K_0402_5%~D

1 2

RH155 10K_0402_5%~D

1

IN

2

2

1

12P_0402_50V8J

CH9

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2012/02/28 2013/02/27

2012/02/28 2013/02/27

2012/02/28 2013/02/27

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PCH (3/9) CLK

PCH (3/9) CLK

PCH (3/9) CLK

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-9201P

LA-9201P

LA-9201P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

18 69Wednesday, March 26, 2014

18 69Wednesday, March 26, 2014

18 69Wednesday, March 26, 2014

0.2

0.2

0.2

5

D D

+3VS

1 2

RH98 10K_0402_5%~D

C C

15_0804_8P4R_5%

4 5

SPI_PCH_DO2_R
SPI_PCH_DO3_R
PCH_SPI_SI_R
PCH_SPI_S0_R

1 2

RH104 15_0402_1%EMI@

B B

3 6
2 7
1 8

RPH5

PCH_SPI_DO2
PCH_SPI_DO3
PCH_SPI_SI
PCH_SPI_SO

PCH_SPI_CLKPCH_SPI_CLK_R

SERIRQ

+3V_PCH

1 2

RH105 1K_0402_5%

1 2

RH106 1K_0402_5%

MEM_SMBCLK

MEM_SMBDATA

LPC_AD0<43>

LPC_AD1<43>

LPC_AD2<43>

LPC_AD3<43>

LPC_FRAME#<43>

SERIRQ<43>

PCH_SPI_CLK<44>

PCH_SPI_CS1#<44>

PCH_SPI_SI<44>

PCH_SPI_SO<44>

To TPM

SPI_PCH_DO3_R

SPI_PCH_DO2_R

UH14 to SA000039A30 IC FL 64M W25Q64FVSSIQ SOIC 8P SPI ROM
UH14 to SA000046400 IC FL 64M EN25Q64-104HIP SOIC 8P SPI ROM
UH14 to SA00006N100 IC FL 64M MX25L647EM2I-10G SOIC 8P SPI ROM
UH14 to SA00005L100 IC FL 64M N25Q064A13ESEC0P SOIC 8P SPI ROM

LPC_AD0

LPC_AD1

LPC_AD2

LPC_AD3

LPC_FRAME#

SERIRQ

PCH_SPI_CLK

PCH_SPI_CS0#

PCH_SPI_CS1#

PCH_SPI_SI

PCH_SPI_SO

PCH_SPI_DO2

PCH_SPI_DO3

+3V_PCH

1 2

DMN66D0LDW-7_SOT363-6

4

+3VS

2

2.2K_0402_5%

6 1

@

DMN66D0LDW-7_SOT363-6

@

RH95 0_0402_5%

5

3

4

QH4B

@

12

@

RH96 0_0402_5%

UH1D

A20

LAD_0

C20

LAD_1

A18

LAD_2

C18

LAD_3

B21

LFRAME#

D21

LDRQ0#

G20

LDRQ1#/G PIO23

AL11

SERIRQ

AJ11

SPI_CLK

AJ7

SPI_CS0#

AL7

SPI_CS1#

AJ10

SPI_CS2#

AH1

SPI_MOSI

AH3

SPI_MISO

AJ4

SPI_IO2

AJ2

SPI_IO3

PCH_SPI_CS0#
PCH_SPI_S0_R
SPI_PCH_DO2_R

200 MIL SO8

64Mb Flash ROM

RH107

3.3K_0402_5%~D

@

+3VS

12

RH93

QH4A

12

SPILPC

LYNXPOINT_BGA695

UH4

1

/CS

2

DO(IO1)

3

/WP(IO2 )
GND4DI(IO0)

W25Q64FVSSIQ_SO8

12

RH94

2.2K_0402_5%

LPT_PCH_M_EDS

SMBus

C-Link

Thermal

VCC

/HOLD(IO3)

CLK

SML1ALE RT#/PCHHOT#/GPIO 74

3 OF 11 5

+3V_PCH

8
7

SPI_PCH_DO3_R

6

PCH_SPI_CLK_R

5

PCH_SPI_SI_R

3

PCH_SMBCLK <14,15,36,8>

PCH_SMBDATA <14,15,36,8>

1 2

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_DATA

CL_RST#

TD_IREF

CH10

CL_CLK

N7

R10

U11

N8

U8

R7

H6

K6

N11

AF11

AF10

AF7

BA45

TP1

BC45

TP2

BE43

TP4

BE44

TP3

AY43

SMBALERT#/ GPIO11

SML0ALE RT#/GPIO60

SML1CLK/ GPIO58

SML1DATA/G PIO75

0.1U_0402_25V6K~D

RH127

1 2

RH102

1 2

1 2

SML0CLK <41>

SML0DATA <41>

T85PAD~D @

T86PAD~D @

T87PAD~D @

T88PAD~D @

PCH_LID_SW_IN#

MEM_SMBCLK

MEM_SMBDATA

DDR_HVREF_RST_PCH

SML0CLK

SML0DATA

PCH_GPIO74

SML1CLK

SML1DATA

PCH_TD_IREF

RH103 8.2K_0402_1%

SML1CLK

SML1DATA

0_0402_5%@

0_0402_5%@

354

QH3B

DMN66D0LDW-7

EC_LID_OUT# <43>

LID_SW_IN# <37,38,43>

+3VS

6 1

PCH_SPI_CLK_R

RH108

33_0402_5%~D

1 2

22P_0402_50V8J~D

1

CH11

2

2

2

DMN66D0LDW-7

QH3A

@

@

EC_SMB_CK2 <42,43,46>

EC_SMB_DA2 <42,43,46>

MEM_SMBCLK

MEM_SMBDATA

DDR_HVREF_RST_PCH

PCH_GPIO74

SML1DATA
SML1CLK
SML0DATA
SML0CLK

@

@

RPH4

1 8
2 7
3 6
4 5

2.2K_0804_8P4R_5%

12

RH972.2K_0402_5%

12

RH992.2K_0402_5%

12

RH1001K_0402_1%

12

RH10110K_0402_5%

+3V_PCH

1

+3V_PCH

Reserve for EMI please
close to UH14

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PCH (4/9) SPI, SMBUS,LPC

PCH (4/9) SPI, SMBUS,LPC

PCH (4/9) SPI, SMBUS,LPC

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

19 69Wednesday, March 26, 2014

19 69Wednesday, March 26, 2014

19 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

D D

4

3

2

1

USB3RN3<35>

1 2
1 2

1 2
1 2

1 2
1 2

USB3RP3<35>

USB3TN3<35>
USB3TP3<35>

+1.5VS

+1.5VS

RH111 7.5K_0402_1%

RH110 0_0402_5%

1 2

P3: JUSB4 Left

PCIE_PRX_GLANTX_N3<30>

10/100/1G LAN

C C

WLAN

CARD READER

B B

PCIE_PRX_GLANTX_P3<30>

PCIE_PTX_GLANRX_N3<30>
PCIE_PTX_GLANRX_P3<30>

PCIE_PRX_WLANTX_N4<28>
PCIE_PRX_WLANTX_P4<28>

PCIE_PTX_WLANRX_N4<28>
PCIE_PTX_WLANRX_P4<28>

PCIE_PRX_CARDTX_N5<31>
PCIE_PRX_CARDTX_P5<31>

PCIE_PTX_CARDRX_N5<31>
PCIE_PTX_CARDRX_P5<31>

CH12 0.1U_0402_25V6K
CH13 0.1U_0402_25V6K

CH14 0.1U_0402_25V6K
CH15 0.1U_0402_25V6K

CH16 0.1U_0402_25V6K
CH17 0.1U_0402_25V6K

USB3RN3

USB3RP3

USB3TN3

USB3TP3

PCIE_PRX_GLANTX_N3
PCIE_PRX_GLANTX_P3

PCIE_PTX_GLANRX_N3_C
PCIE_PTX_GLANRX_P3_C

PCIE_PRX_WLANTX_N4
PCIE_PRX_WLANTX_P4

PCIE_PTX_WLANRX_N4_C
PCIE_PTX_WLANRX_P4_C

PCIE_PRX_CARDTX_N5
PCIE_PRX_CARDTX_P5

PCIE_PTX_CARDRX_N5_C
PCIE_PTX_CARDRX_P5_C

12

PCH_PCIE_IREF

@

T91 PAD~D@

T92 PAD~D@

PCH_PCIE_RCOMP

AY31

BE32
BC32

AT31
AR31

BD33
BB33

AW33

AY33

BE34
BC34

AT33
AR33

BE36
BC36

AW36

AV36

BD37
BB37

AY38

AW38

BC38
BE38

AT40
AT39

BE40
BC40

AN38
AN39

BD42
BD41

BE30

BC30

BB29

BD29

PERN1/USB 3RN3
PERP1/US B3RP3

PETN1/USB3 TN3
PETP1/USB 3TP3

PERN2/USB 3RN4
PERP2/US B3RP4

PETN2/USB3 TN4
PETP2/USB 3TP4

PERN_3
PERP_3

PETN_3
PETP_3

PERN_4
PERP_4

PETN_4
PETP_4

PERN_5
PERP_5

PETN_5
PETP_5

PERN_6
PERP_6

PETN_6
PETP_6

PERN_7
PERP_7

PETN_7
PETP_7

PERN_8
PERP_8

PETN_8
PETP_8

PCIE_IREF

TP11

TP6

PCIE_RCOMP

UH1I

AW31

LPT_PCH_M_EDS

LYNXPOINT_BGA695

PCIe

USB

9 OF 11 5

USB2N0

USB2P0

USB2N1

USB2P1

USB2N2

USB2P2

USB2N3

USB2P3

USB2N4

USB2P4

USB2N5

USB2P5

USB2N6

USB2P6

USB2N7

USB2P7

USB2N8

USB2P8

USB2N9

USB2P9
USB2N10
USB2P10
USB2N11
USB2P11
USB2N12
USB2P12
USB2N13
USB2P13

USB3RN1
USB3RP1
USB3TN1
USB3TP1
USB3RN2
USB3RP2
USB3TN2
USB3TP2
USB3RN5
USB3RP5
USB3TN5
USB3TP5
USB3RN6
USB3RP6
USB3TN6
USB3TP6

USBRBIAS #

USBRBIAS

TP24
TP23

OC0#/GPI O59
OC1#/GPI O40
OC2#/GPI O41
OC3#/GPI O42
OC4#/GPI O43

OC5#/GPI O9
OC6#/GPI O10
OC7#/GPI O14

B37
D37
A38
C38
A36
C36
A34
C34
B33
D33
F31
G31
K31
L31
G29
H29
A32
C32
A30
C30
B29
D29
A28
C28
G26
F26
F24
G24

AR26
AP26
BE24
BD23
AW26
AV26
BD25
BC24
AW29
AV29
BE26
BC26
AR29
AP29
BD27
BE28

K24
K26

M33
L33

P3
V1
U2
P1
M3
T1
N2
M1

USB_OC0#
USB_OC1#
USB_OC2#

USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8
USB20_N9
USB20_P9

USB3RN1
USB3RP1
USB3TN1
USB3TP1
USB3RN2
USB3RP2
USB3TN2
USB3TP2
USB3RN5
USB3RP5
USB3TN5
USB3TP5
USB3RN6
USB3RP6
USB3TN6
USB3TP6

USBRBIAS

USB20_N0 <34>
USB20_P0 <34>
USB20_N1 <35>
USB20_P1 <35>
USB20_N2 <41>
USB20_P2 <41>
USB20_N3 <37>
USB20_P3 <37>
USB20_N4 <28>
USB20_P4 <28>
USB20_N5 <25>
USB20_P5 <25>
USB20_N6 <25>
USB20_P6 <25>
USB20_N7 <34>
USB20_P7 <34>
USB20_N8 <35>
USB20_P8 <35>
USB20_N9 <69>
USB20_P9 <69>

USB3RN1 <34>
USB3RP1 <34>
USB3TN1 <34>
USB3TP1 <34>
USB3RN2 <34>
USB3RP2 <34>
USB3TN2 <34>
USB3TP2 <34>
USB3RN5 <41>
USB3RP5 <41>
USB3TN5 <41>
USB3TP5 <41>
USB3RN6 <35>
USB3RP6 <35>
USB3TN6 <35>
USB3TP6 <35>

T89PAD~D @
T90PAD~D @

USB_OC0# <34>
USB_OC1# <34>
USB_OC2# <32>

USB_OC4# <32>

JUSB1(Right Side)

JUSB3(Left Side) PowerShare

Caldera

ELC LED

BT

Thuch sereen

Camera

JUSB1(Right Side)

JUSB4(Left Side)

Touch PAD

P1: JUSB1 Right

On MB

P2: JUSB2 Right

P5: Calder

P6: JUSB3 Left

CAD NOTE:
Route single-end 50-ohms and max 500-mils length.
Avoid routing next to clock pins or under stitching capacitors.
Recommended minimum spacing to other signal traces is 15 mils.

USBRBIAS

22.6_0402_1%

12

RH109

+3V_PCH

RPH6

4 5

USB_OC4#

3 6

USB_OC7#USB_OC3#

2 7

USB_OC6#

1 8

USB_OC3#

10K_0804_8P4R_5%

RPH7

4 5

USB_OC0#

3 6

USB_OC1#

2 7

USB_OC2#

1 8

USB_OC5#

10K_0804_8P4R_5%

SD302100280 Chnage SD309100280 2/25

採採採採

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PCH (5/9) PCIE,USB

PCH (5/9) PCIE,USB

PCH (5/9) PCIE,USB

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

20 69Wednesday, March 26, 2014

20 69Wednesday, March 26, 2014

20 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

+3VS

1 2

RH113 10K_0402_5%~D

D D

C C

B B

RH115 10K_0402_5%~D

RH116 10K_0402_5%~D

RH117 10K_0402_5%~D

RH118 10K_0402_5%~D

RH119 10K_0402_5%~D

RH120 10K_0402_5%~D

RH121 10K_0402_5%~D

RH151 10K_0402_5%~D

RH154 10K_0402_5%~D

+3V_PCH

+PCH_VCCDSW3_3

RH156 10K_0402_5%~D

PCH_GPIO0

1 2

PCH_GPIO1

1 2

PCH_GPIO6

12

STP_PCI#

1 2

PCH_GPIO22

1 2

PCH_GPIO39

1 2

PCH_GPIO70

1 2

PCH_GPIO71

1 2

PCH_GPIO68

1 2

TPM_PIRQ#

for TPM

12

12

HDD_DET#

12

PCH_GPIO35

WAKE_PCH#

RH123 10K_0402_5%

RH126 10K_0402_5%

+3VS

USB X4,PCIEX8,SATAX6

4

EC_SCI#<43>

EC_SMI#<43>

GPU_GC6_FB_EN<43,46>

PCH_GPIO16<29>

12

12

12

12

TPM_PIRQ#<44>

DGPU_PWR_EN<46,49,63>

WAKE_PCH#<43>

GC6_EVENT#<43,46>

PCH_GPIO49<29>

HDD_DET#<36>

PCH_GPIO49

PCH_GPIO16

KB_DET#

PCH_GPIO16

KB_DET#

PCH_GPIO49

FFS_INT2<36>

KB_DET#<39>

To TPM

1 2

RH157 10K_0402_5%~D

1 2

RH130 10K_0402_5%~D

RH131 10K_0402_5%~D

RH132 10K_0402_5%~D@

RH133 10K_0402_5%~D@

RH158 10K_0402_5%~D@

Config

GPIO16,49

11

01USB X6,PCIEX8,SATAX4

PCH_GPIO0

PCH_GPIO1

PCH_GPIO6

EC_SCI#

EC_SMI#

GPU_GC6_FB_EN

PCH_GPIO16

TPM_PIRQ#

PCH_GPIO22

WAKE_PCH#

GC6_EVENT#

STP_PCI#

PCH_GPIO35

PCH_GPIO36

PCH_GPIO37

DGPU_PRSNT#

PCH_GPIO39

FFS_INT2

PCH_GPIO49

HDD_DET#

PCH_GPIO68

KB_DET#

PCH_GPIO70

PCH_GPIO71

3

LPT_PCH_M_EDS

UH1F

AT8

BMBUSY#/GP IO0

F13

TACH1/GPIO1

A14

TACH2/GPIO6

G15

TACH3/GPIO7

Y1

GPIO8

K13

LAN_PHY_P WR_CTRL/GPI O12

AB11

GPIO15

AN2

SATA4GP/G PIO16

C14

TACH0/GPIO1 7

BB4

SCLOCK/G PIO22

Y10

GPIO24

R11

GPIO27

AD11

GPIO28

AN6

GPIO34

AP1

GPIO35/N MI#

AT3

SATA2GP/G PIO36

AK1

SATA3GP/G PIO37

AT7

SLOAD/GP IO38

AM3

SDATAOUT0/GP IO39

AN4

SDATAOUT1/GP IO48

AK3

SATA5GP/G PIO49

U12

GPIO57

C16

TACH4/GPIO6 8

D13

TACH5/GPIO6 9

G13

TACH6/GPIO7 0

H15

TACH7/GPIO7 1

BE41

VSS

BE5

VSS

C45

VSS

A5

VSS

LYNXPOINT_BGA695

For BIOS setting dGPU present

LOW - dGPU exist*

+3VS

GPIO

NCTF

6 OF 11 5

@

1 2

1 2

DGPU_PRSNT#

DGPU_PRSNT#

RH134 10K_0402_5%~D

RH135 10K_0402_5%~D

CPU/Misc

PROCPW RGD

THRMTRIP#

PLTRST_PROC#

RCIN#

2

+3VS

GATEA20

KB_RST#

AN10

GATEA20

TP14

AY1

H_PECI_R

PECI

AT6

KB_RST#

AV3

H_CPUPWRGD

AV1

PCH_THRMTRIP#_R_R

AU4

CPU_PLTRST#

N10

VSS

A2

VSS

A41

VSS

A43

VSS

A44

VSS

B1

VSS

B2

VSS

B44

VSS

B45

VSS

BA1

VSS

BC1

VSS

BD1

VSS

BD2

VSS

BD44

VSS

BD45

VSS

BE2

VSS

BE3

VSS

D1

VSS

E1

VSS

E45

VSS

A4

VSS

T81

KB_RST# <43>

H_CPUPWRGD <8>

CPU_PLTRST# <8>

1 2

RH124 390_0402_5%

+3VS

RH136 1K_0402_1%~D

1 2

RH137 200K_0402_5%@

RH138 10K_0402_5%~D@

RH139 10K_0402_5%~D

12

12

12

PCH_GPIO36

PCH_GPIO37

PCH_GPIO36

PCH_GPIO37

12

RH11210K_0402_5%~D

12

RH11410K_0402_5%~D

H_THERMTRIP# <8>

1

SATA2GP/GPIO36 , SATA3GP/GPIO37 SAMPLED AT RISING EDGE OF PWROK.
WEAK INTERNAL PULL-DOWN.(WEAK INTERNAL PULL-DOWN IS DISABLED AFTER
PLRST_N DE-ASSERTS).
NOTE: THIS SIGNAL SHOLD NOT BE PULLED HIGH WHEN STRAP IS SAMPLED.

A A

Same with 534345_PCH_LPT_9

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PCH (6/9) GPIO,MISC,NTFC

PCH (6/9) GPIO,MISC,NTFC

PCH (6/9) GPIO,MISC,NTFC

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

21 69Wednesday, March 26, 2014

21 69Wednesday, March 26, 2014

21 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

D D

4

3

2

1

PCH Power Rail Table

Voltage Rail

LPT_PCH_M_EDS

Core

LYNXPOINT_BGA695

CRT DAC

HVCMOS

USB3

PCIe/DMI

SATA

VCCMPHY

FDI

7 OF 11 5

VCCADAC1_ 5

VCCADACBG 3_3

VCCVRM

VCCIO

VCCIO

VCC3_3_R 30
VCC3_3_R 32

DCPSUS1

VCCSUS3_ 3
VCCSUS3_ 3

DCPSUS3
DCPSUS3

VCCIO
VCCVRM
VCCVRM

VCCVRM

VCCIO

VCCVRM

VCCIO

VCCIO

VCCIO

VCCIO

VCCIO

VCCIO

VCCIO

+3VS

0.1U_0402_10V7K~D

1

2

CH25

+1.05V_+1.5V_RUN

1

10U_0603_6.3V6M~D

2

@

CH31

+1.05V_+1.5V_RUN

+1.05VS

1U_0402_6.3V6K~D

@

1

CH22

2

CH24

+1.05V_+1.5V_RUN

10U_0603_6.3V6M~D

1

10U_0603_6.3V6M~D

2

@

CH30

10U_0603_6.3V6M~D

@

1

CH23

2

VCCADAC1_5 1.5V 0.070 A

VCCADAC3_3 0.0133 A3.3V

VCCCLK3_3 0.055 A

@

CH29

VCCSUSHDA 3.3V 0.01 A

VCCSUS3_3 3.3V 0.261 A

VCCDSW3_3 3.3V 0.015 A

V_PROC_IO 1.05V 0.004 A

P45

P43

VSS

M31

BB44

AN34

AN35

R30
R32

Y12

AJ30
AJ32

AJ26
AJ28
AK20
AK26
AK28

BE22

AK18

AN11

AK22

AM18
AM20
AM22
AP22
AR22
AT22

+1.05VS

+1.05VS

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

1

CH33

CH32

2

2

2

+3V_PCH

0.1U_0402_10V7K~D

1

2

+1.05V_+1.5V_RUN

1

+1.05VS

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

1

1

CH35

CH34

CH36

2

2

AG18
AG20
AG22
AG24

AA24
AA26
AD20
AD22
AD24
AD26
AD28
AE18
AE20
AE22
AE24
AE26

AA18

Y26

U14

U18
U20
U22
U24
V18
V20
V22
V24
Y18
Y20
Y22

UH1G

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

DCPSUSBYP
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW

C C

B B

+1.05VS

10U_0603_6.3V6M~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

1

1

CH21

CH20

CH19

CH18

2

2

2

2

+1.05V

22U_0805_6.3V6M~D

1

CH26

2

+PCH_VCCDSW

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

CH27

CH28

2

2

Voltage S0 Iccmax Current (A)

VCC 1.05V 1.29 A

VCCIO 1.05V 3.629 A

VCCCLK 0.306 A1.05V

3.3V

VCCVRM 0.179 A1.5V

VCC3_3 3.3V 0.133 A

VCCASW 1.05V 0.67 A

VCCSPI 3.3V 0.022 A

1 2

RH140 5.11_0402_1%~D

1U_0402_6.3V6K~D

+PCH_VCCDSW_R

1

CH37

2

A A

5

+PCH_VCCDSW

+1.5VS +1.05V_+1.5V_RUN

4

RH153 0_0402_5%

1 2

@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PCH (7/9) Power

PCH (7/9) Power

PCH (7/9) Power

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

22 69Wednesday, March 26, 2014

22 69Wednesday, March 26, 2014

22 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

4

3

2

1

D D

+3V_PCH

0.1U_0402_10V7K~D

+1.05VS

1

CH39

0.1U_0402_10V7K~D

2

C C

+1.05V

RH142 0_0402_5%~D@

1 2

+PCH_USB_DCPSUS2

+3VS

1

CH40

0.1U_0402_10V7K~D

2

+1.05VS

CH43

1

2

1U_0402_6.3V6K~D

1

2

+1.05V_+1.5V_RUN

CH45

1

2

1U_0402_6.3V6K~D

@

1

CH53

10U_0603_6.3V6M~D

CH47

+PCH_VCCCLK3_3

+PCH_USB_DCPSUS2

+PCH_VCC

+PCH_VCCCLK

+PCH_VCCCLK

2

+1.05VS

B B

RH147

1 2

@

0_0805_5%

+PCH_VCCCLK

1

2

10U_0603_6.3V6M~D

1U_0402_6.3V6K~D

@

@

CH59

CH60

1

2

UH1H

R24

VCCSUS3_ 3

R26

VCCSUS3_ 3

R28

VCCSUS3_ 3

U26

VCCSUS3_ 3

M24

VSS

U35

VCCUSBPL L

L24

VCC3_3

U30

VCCIO

V28

VCCIO

V30

VCCIO

Y30

VCCIO

Y35

DCPSUS2

AF34

VCCVRM

AP45

VCC

Y32

VCCCLK

M29

VCCCLK3_ 3

L29

VCCCLK3_ 3

L26

VCCCLK3_ 3

M26

VCCCLK3_ 3

U32

VCCCLK3_ 3

V32

VCCCLK3_ 3

AD34

VCCCLK

AA30

VCCCLK

AA32

VCCCLK

AD35

VCCCLK

AG30

VCCCLK

AG32

VCCCLK

AD36

VCCCLK

AE30

VCCCLK

AE32

VCCCLK

1U_0402_6.3V6K~D

CH61

1

2

LPT_PCH_M_EDS

LYNXPOINT_BGA695

1U_0402_6.3V6K~D

CH62

1

2

USB

ICC

GPIO/LPC

Azalia

RTC

CPU

SPI

Fuse

Thermal

8 OF 11 5

1

2

VCCSUS3_ 3
VCCSUS3_ 3

VCCDSW3 _3

VCCSUSHDA

VCCSUS3_ 3

V_PROC_I O
V_PROC_I O

1U_0402_6.3V6K~D

CH63

DCPSST

VCC3_3
VCC3_3
VCC3_3

VCCIO

VCCRTC

DCPRTC
DCPRTC

VCCSPI

VCCASW

VCCASW

VCCVRM

VCC3_3

VCC3_3

+3V_PCH

R20
R22

A16

+PCH_VCCDSW3_3

AA14

+PCH_VCCSST

AE14
AF12
AG14

U36

A26

K8

A6

P14

+PCH_DCPRTC

P16

AJ12

+PCH_VPROC

AJ14

AD12

P18

+PCH_VCCCFUSE

VCC

P20

VCC

L17

R18

AW40

AK30

AK32

+PCH_VCCDSW3_3

0.1U_0402_10V7K~D

CH41

1

2

1 2

CH42 0.1U_0402_10V7K~D

+1.05VS

CH49

1 2

0.1U_0402_10V7K~D

+3V_PCH

1U_0402_6.3V6K~D

1

CH54

+1.05V

+1.5VS

2

+3VS

0.1U_0402_10V7K~D

1

@

12

+3V_PCH

0.1U_0402_10V7K~D

CH38

1

2

+3V_PCH

+RTC_CELL

0.1U_0402_10V7K~D

1U_0402_6.3V6K~D

0.1U_0402_10V7K~D

1

1

1

CH51

CH50

2

2

2

+PCH_VPROC

0.1U_0402_10V7K~D

1

2

CH58

RH1450_0402_5%~D

12

+3VALW

RH1410_0402_5%~D

+3VS

+3V_PCH

1U_0402_6.3V6K~D

1

CH48

0.1U_0402_10V7K~D

1

CH44

2

0.1U_0402_10V7K~D

1

CH46

2

2

CH52

RH146 0_0805_5%

1 2

1U_0402_6.3V6K~D

0.1U_0402_10V7K~D

1

1

CH55

CH57

CH56

2

2

+1.05VS

@

2

RH1480_0805_5%

+PCH_VCCCFUSE

1U_0402_6.3V6K~D

CH64

1

2

1U_0402_6.3V6K~D

1

CH65

2

1 2

@

12

RH1430_0805_5%~D @

+3VS

+1.05VS

Place near pin AP45 Place near pin Y32,AA30,AA32 Place near pin AD34 Place near pin AD35,AD36 Place near pin AG30,AG32,AE30,AE32

+3VS

RH149

1 2

@

0_0805_5%

+PCH_VCCCLK3_3

1U_0402_6.3V6K~D

CH66

1

2

1U_0402_6.3V6K~D

CH67

1

2

1U_0402_6.3V6K~D

CH68

1

2

1U_0402_6.3V6K~D

CH69

1

2

Place near pin M29 Place near pin L29 Place near pin L26,M26 Place near pin U32,V32

+1.05VS_VCC+1.05VS

LH1

1 2

4.7UH_LQM18FN4R7M00D_20%~D

RH150

1 2

@

0_0603_5%

+PCH_VCC+PCH_VCC

10U_0603_6.3V6M~D

1U_0402_6.3V6K~D

CH70

CH71

1

1

2

2

Place near pin AP45

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PCH (8/9) Power

PCH (8/9) Power

PCH (8/9) Power

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

23 69Wednesday, March 26, 2014

23 69Wednesday, March 26, 2014

23 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

D D

4

3

2

1

LPT_PCH_M_EDS

UH1J

AL34

VSS

AL38

VSS

AL8

VSS

AM14

VSS

AM24

VSS

AM26

VSS

AM28

VSS

AM30

VSS

AM32

VSS

AM16

VSS

AN36

VSS

AN40

VSS

AN42

VSS

AN8

VSS

AP13

C C

B B

VSS

AP24

VSS

AP31

VSS

AP43

VSS

AR2

VSS

AK16

VSS

AT10

VSS

AT15

VSS

AT17

VSS

AT20

VSS

AT26

VSS

AT29

VSS

AT36

VSS

AT38

VSS

D42

VSS

AV13

VSS

AV22

VSS

AV24

VSS

AV31

VSS

AV33

VSS

BB25

VSS

AV40

VSS

AV6

VSS

AW2

VSS

F43

VSS

AY10

VSS

AY15

VSS

AY20

VSS

AY26

VSS

AY29

VSS

AY7

VSS

B11

VSS

B15

VSS

LYNXPOINT_BGA695

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

K39
L2
L44
M17
M22
N12
N35
N39
N6
P22
P24
P26
P28
P30
P32
R12
R14
R16
R2
R34
R38
R44
R8
T43
U10
U16
U28
U34
U38
U42
U6
V14
V16
V26
V43
W2
W44
Y14
Y16
Y24
Y28
Y34
Y36
Y40
Y8

510 OF 11

AA16
AA20
AA22
AA28

AA4
AB12
AB34
AB38

AB8

AC2
AC44
AD14
AD16
AD18
AD30
AD32
AD40

AD6

AD8
AE16
AE28
AF38

AF8
AG16

AG2
AG26
AG28
AG44

AJ16
AJ18
AJ20
AJ22
AJ24
AJ34
AJ38

AK14
AK24
AK43
AK45

AL12

BC22
BB42

AJ6
AJ8

AL2

LPT_PCH_M_EDS

UH1K

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

LYNXPOINT_BGA695

B19

VSS

B23

VSS

B27

VSS

B31

VSS

B35

VSS

B39

VSS

B7

VSS

BA40

VSS

BD11

VSS

BD15

VSS

BD19

VSS

AY36

VSS

AT43

VSS

BD31

VSS

BD35

VSS

BD39

VSS

BD7

VSS

D25

VSS

AV7

VSS

F15

VSS

F20

VSS

F29

VSS

F33

VSS

BC16

VSS

D4

VSS

G2

VSS

G38

VSS

G44

VSS

G8

VSS

H10

VSS

H13

VSS

H17

VSS

H22

VSS

H24

VSS

H26

VSS

H31

VSS

H36

VSS

H40

VSS

H7

VSS

K10

VSS

K15

VSS

K20

VSS

K29

VSS

K33

VSS

BC28

VSS

511 OF 11

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

PCH (9/9) Power

PCH (9/9) Power

PCH (9/9) Power

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

1

24 69Wednesday, March 26, 2014

24 69Wednesday, March 26, 2014

24 69Wednesday, March 26, 2014

0.1

0.1

0.1

A

B

C

D

E

eDP connector

JEDP1

12

EDP_TX0_C

RV5
0_0402_5%

+3VS_CAM

MIC_CLK<32>

MIC_DATA<32>

+INV_PWR_SRC

TS_INT#

TS_RST#

CV10.1U _0402_16V7K

12

EDP_TX0#_C

CV20.1U _0402_16V7K

12

EDP_TX1_C

CV30.1U _0402_16V7K

12

EDP_TX1#_C

CV40.1U _0402_16V7K

12

EDP_TX2_C

CV80.1U _0402_16V7K

12

EDP_TX2#_C

CV60.1U _0402_16V7K

12

EDP_TX3_C

CV70.1U _0402_16V7K

12

EDP_TX3#_C

CV110.1U_0402_16V7K

12

EDP_AUX_C

CV120.1U_0402_16V7K

12

EDP_AUX#_C

CV130.1U_0402_16V7K

CE_EN_R
DBC_EN_R

W=60mils

USB20_CAM_P6_R
USB20_CAM_N6_R

MIC_CLK
MIC_GND
MIC_DATA

LCD_TEST
USB20_N5
USB20_P5

DISPOFF#

W=60mils

CV375

TS_INT#
TS_RST#

12

@RF@

10P_0402_50V8J

+3VS

1 1

4.7U_0805_10V4Z

PCH_ENVDD<17>

EC_ENVDD<43>

2 2

3 3

EN_INVPWR<43>

CV5

1

2

B+

1000P_0402_50V7K

1

2

2

G

LCD power control

UV17

W=60mils W=60mils

0_0402_5%

1 2

RV3

RV4 0_0402_5%@

5

IN

4

EN

SY6288C20AAC_SOT23-5

ENVDD_R

@

12

OUT

GND

OC

+LCDVDD

1

FBMA-L11-201209-221LMA30T_0805

2

1 2

3

RV45 10K_0402_5%

CV372

1 2

+3VS

+3VS

12

@RF@

10P_0402_50V8J

LV8

+LCDVDD_CONN

CV373

12

@RF@

10P_0402_50V8J

LCD backlight power control

QV1
SI3457CDV-T1-GE3_TSOP6

W=60mils

100K_0402_5%

CV15

12

PWR_SRC_ON

12

RV12
100K_0402_5%

13

D

S

S

4

RV9

G

3

QV2
2N7002KW_SOT323-3

6
5
2

D

1

1

CV14

0.1U_0603_25V7K

2

W=60mils

+INV_PWR_SRC

+LCDVDD_CONN

CV9

0.1U_0402_10V7K

1

2

CV10

4.7U_0805_10V4Z

1

2

USB20_P6<20>

USB20_N6< 20>

BKOFF#<43>

WCM-2012HS-900T_4P

4

1

LV2

EMI@

RV6 0_0402_5%

@EMI@

RV7 0_0402_5%

@EMI@

USB20_N5<20>

USB20_P5<20>

DV1
RB751V-40_SOD323-2

4

1

1 2

1 2

2

1

12

3

3

2

2

USB20_N5

USB20_P5

3

@ESD@

DV2
PESD5V0U2BT_SOT23-3

12

10K_0402_5%
RV1

USB20_CAM_P6_R

USB20_CAM_N6_R

DISPOFF#

CPU_EDP_TX0P<10>
CPU_EDP_TX0N<10>

CPU_EDP_TX1P<10>
CPU_EDP_TX1N<10>

CPU_EDP_TX2P<10>
CPU_EDP_TX2N<10>

CPU_EDP_TX3P<10>
CPU_EDP_TX3N<10>

CPU_EDP_AUX<10>
CPU_EDP_AUX#<10>

CPU_EDP_HPD<10>

RV13
0_0402_5%

1 2

MIC_CLK

+VDD_TOUCH

EMI@

10P_0402_50V8J

PCH_INV_PWM<10,17>

RV10 100K_0402_5%

RV11 100K_0402_5%@

CPU_EDP_HPD

+VDD_TOUCH

TS_EN TS_EN_R

CV374

100K_0402_5%

1 2

1 2

1 2

TS_INT#<17>
TS_RST#<17>

+LCDVDD_CONN

12

@RF@

LCD_TEST<43>

12

RV8

1

1

2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

ACES_50473-0400M-P01

CONN@

41

2

G1

42

3

G2

43

4

G3

44

5

G4
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

Laverage Echo13

+LCDVDD_CONN+3VS

0.1U_0402_10V7K

0.1U_0402_10V7K

CV16

CV17

1

2

Place close to JEDP

1

1

2

2

10U_0805_10V6K

CV18

Touch screen panel power control

+3VS

UV2

5

Webcam power control

+3VS +3VS_CAM

RV47 0_0603_5%

1 2

@

4 4

A

4.7U_0805_10V4Z

B

1

CV21

2

TS_EN<43>

IN

4

EN

SY6288C20AAC_SOT23-5

Change to 6288C ( High Enable)

1

OUT

2

GND

3

OC

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

1 2

FBMA-L11-201209-221LMA30T_0805

1 2

RV2 10K_0402_5%

Issued Date

Issued Date

Issued Date

LV1

+3VS

C

+VDD_TOUCH

CV19

0.1U_0402_10V7K

CV20

4.7U_0805_10V4Z

1

1

2

2

Compal Secret Data

Compal Secret Data

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

DBC_EN<43>

D

DBC_EN

1 2

@

RV46 0_0402_5%

RV36

0_0402_5%

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

CE_EN_R

DBC_EN_R

12

12

@

@

RV14
0_0402_5%

LCD Conn/Cam, Touch

LCD Conn/Cam, Touch

LCD Conn/Cam, Touch

LA-B751P

LA-B751P

LA-B751P

E

25 69Wednesday, March 26, 2014

25 69Wednesday, March 26, 2014

25 69Wednesday, March 26, 2014

0.1

0.1

0.1

A

1 1

B

C

D

E

+5VS

12

@RF@

CV376

10P_0402_50V8J

PCH_DPC_AUX<17>

PCH_DPC_CLK<17>

PCH_DPC_AUX#<17>

PCH_DPC_DAT<17>

2 2

3 3

CV23

@

0.1U_0402_10V6K

12

CV240.1U_0402_10V7K

12

CV250.1U_0402_10V7K

+3VS

+5VS

1

2

PCH_DP_AUXP_C

PCH_DP_AUXN_C

UV18

1

IN

AP2330W-7_SC59-3

UV3

16

Vcc

4

1A

2
3
5

6
11
10
14
13

SN74CBT3257CPWR _TSSOP16

OUT

GND

7

1B1

2A

9

1B2

3A

12

2B1

4A

2B2

15

3B1

OE#

1

S

3B2
4B1

8

GND

4B2

+3VS_DP

3

2

CV34

10U_0603_6.3V6M~D

DISP_CLK_AUXP_CONN
DISP_DAT_AUXN_CONN

DP_CBL_DET

CV35

0.1U_0402_16V7K~D

1

1

2

2

12

CV377

10P_0402_50V8J

RV17
1M_0402_5%

12

@RF@

PCH_mDP_HPD<17>

CPU_mDP_P0<10>

DP_CBL_DET<17>

CPU_mDP_N0<10>

CPU_mDP_P1<10>
CPU_mDP_P3<10>
CPU_mDP_N1<10>
CPU_mDP_N3<10>

CPU_mDP_P2<10>

CPU_mDP_N2<10>

DISP_DAT_AUXN_CONN

DISP_CLK_AUXP_CONN

DP_CBL_DET

1 2

RV15 100K_0402_5%

1 2

RV16 100K_0402_5%

1 2

CV26 0.1U_0402_10V7K~D

1 2

CV27 0.1U_0402_10V7K~D

1 2

RV18 5.1M_0402_5%

1 2

CV28 0.1U_0402_10V7K~D

1 2

CV29 0.1U_0402_10V7K~D

1 2

CV30 0.1U_0402_10V7K~D

1 2

CV31 0.1U_0402_10V7K~D

1 2

CV32 0.1U_0402_10V7K~D

1 2

CV33 0.1U_0402_10V7K~D

+3VS

mDP_LANE_P0_C

mDP_LANE_N0_C
DISP_CEC

mDP_LANE_P1_C
mDP_LANE_P3_C
mDP_LANE_N1_C
mDP_LANE_N3_C

mDP_LANE_P2_C
DISP_CLK_AUXP_CONN
mDP_LANE_N2_C
DISP_DAT_AUXN_CONN

1

GND

2
3

LANE0_P

4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20

21
22
23
24

CONFIG1

LANE0_N

CONFIG2

GND

GND

LANE1_P

LANE3_P

LANE1_N

LANE3_N

GND

GND

LANE2_P

AUX_CHP

LANE2_N

AUX_CHN

RETURN

DP_PWR

GND

JDP1
FOX_3V111T1-R24011-7H

CONN@

HPD

Same with ECHO13.
Symbol check OK. 2/25

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

3D Camera

3D Camera

3D Camera

LA-B751P

LA-B751P

LA-B751P

E

26 69Wednesday, March 26, 2014

26 69Wednesday, March 26, 2014

26 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

+3VS

CV36

0.1U_0402_16V7K

TMDS_TX2P_C
TMDS_TX2N_C
HDMI_HPLUG_R
TMDS_TX1P_C
TMDS_TX1N_C
TMDS_TX0P_C
TMDS_TX0N_C

TMDS_TXCP_C
TMDS_TXCN_C

1 2

0_0402_5%~D

+3VS

5

34

SGD

1

2

12

RV27

5.9K_0402_1%

Pin15 PER(Internal pull Low)
0 dB, No pre-emphasisHL(default)

2.5 dB, pre-emphasis

QV3B

2

DMN66D0LDW-7_SOT363-6@

G

61

CPU_DPB_CTRLCLK_R

S

D

CPU_DPB_CTRLDAT_R

D D

12

CPU_HDMI_P2<10>
CPU_HDMI_N2<10>

CPU_HDMI_P1<10>
CPU_HDMI_N1<10>
CPU_HDMI_P0<10>
CPU_HDMI_N0<10>

CPU_HDMI_P3<10>
CPU_HDMI_N3<10>

RV23 4.7K_0201_5%@

+3VS

RV25 4.7K_0201_5%@

+3VS

C C

CV37 0.1U_0402_10V7K
CV38 0.1U_0402_10V7K

CV39 0.1U_0402_10V7K
CV41 0.1U_0402_10V7K
CV42 0.1U_0402_10V7K
CV43 0.1U_0402_10V7K

CV44 0.1U_0402_10V7K
CV45 0.1U_0402_10V7K

1 2

1 2

HDMI_HPLUG_R PD#

12

12
12
12
12

12
12

RV42

@

1 2

0_0402_5%~D

RV539 0_0402_5%@

RV41

@

1 2

Pin13 EQ(Internal pull Low)

12.4dB

4.3dB

8.6dB

PCH_DPB_HDMI_CLK to PS8203
No need level shift.

B B

PCH_DPB_HDMI_CLK

PCH_DPB_HDMI_DAT

L
H
M

@

QV3A
DMN66D0LDW-7_SOT363-6

4

UV4

1

IN_D2P

2

IN_D2N

3

HPD_SRC

4

IN_D1P

5

IN_D1N

6

IN_D0P

7

IN_D0N

8

DCIN_EN

9

IN_CKP

10

IN_CKN

11

VDD

12

PD#

13

EQ

14

GND

15

PRE

16

REXT

PS8203TQFN32GTR-A3_TQFN32

SDA_SRC

SCL_SRC

VDDIO

SDA_SNK

SCL_SNK
OUT_D2P
OUT_D2N

HPD_SNK

OUT_D1P
OUT_D1N
OUT_D0P
OUT_D0N

OUT_CKP
OUT_CKN

2.2K_0402_5%

EPAD

CFG

CEXT

RV31

+5VS

33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

1 2

1 2

+3VS

PU 10K.

RV43 10K_0402_5%

12
12

RV44 10K_0402_5%

+3VS

1

2

PCH_DPB_HDMI_DAT
PCH_DPB_HDMI_CLK

CPU_DPB_CTRLDAT_R

CPU_DPB_CTRLCLK_R
TMDS_TX2P
TMDS_TX2N
HDMI_HPLUG
TMDS_TX1P
TMDS_TX1N
TMDS_TX0P
TMDS_TX0N

TMDS_TXCP
TMDS_TXCN

CV46

0.1U_0402_16V7K

1

2

RV32

2.2K_0402_5%

PCH_DPB_HDMI_DAT
PCH_DPB_HDMI_CLK

CV40

0.1U_0402_16V7K

CFG Reserved

3

PCH_DPB_HDMI_DAT <17>
PCH_DPB_HDMI_CLK <17>

Place close to JHDMI

TMDS_TXCN

TMDS_TXCP

WCM-2012HS-900T_4P

TMDS_TX0N

TMDS_TX0P

WCM-2012HS-900T_4P

TMDS_TX1N

TMDS_TX1P

WCM-2012HS-900T_4P

TMDS_TX2P

TMDS_TX2N

WCM-2012HS-900T_4P

1 2

@EMI@

RV19 0_0402_5%~D

1

1

2

4

LV3

RV21 0_0402_5%~D@EMI@

RV22 0_0402_5%~D

1

4

LV4

RV24 0_0402_5%~D@EMI@

RV26 0_0402_5%~D

1

4

LV5

RV28 0_0402_5%~D@EMI@

RV29 0_0402_5%~D

LV6

4

1

RV30 0_0402_5%~D@EMI@

4

EMI@

1 2

1 2

@EMI@

1

4

EMI@

1 2

1 2

@EMI@

1

4

EMI@

1 2

1 2

@EMI@

EMI@

4

1

1 2

3

2

3

2

3

3

2

2

3

2

3

2

3

3

2

2

TMDS_L_TXCN

TMDS_L_TXCP

TMDS_L_TX0N

TMDS_L_TX0P

TMDS_L_TX1N

TMDS_L_TX1P

TMDS_L_TX2P

TMDS_L_TX2N

+3VS

1

+HDMI_5V_OUT

W=60mils

HDMI_HPLUG

CPU_DPB_CTRLDAT_R
CPU_DPB_CTRLCLK_R

TMDS_L_TXCN

TMDS_L_TXCP
TMDS_L_TX0N

TMDS_L_TX0P
TMDS_L_TX1N

TMDS_L_TX1P
TMDS_L_TX2N

TMDS_L_TX2P

+3VS

12

RV20
10K_0402_5%

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11
10

9
8
7
6
5
4
3
2
1

GND

CK_shield

GND

CK+

GND

D0-

GND
D0_shield
D0+
D1­D1_shield
D1+
D2­D2_shield
D2+

FOX_QJ111A1-R240HA-8H

CONN@

Change PN to DC232000B00 (ECHO13)

W=60mils

+5VS

UV5

1

IN

AP2330W-7_SC59-3

OUT

GND

W=60mils

3

2

0.1U_0402_16V7K

ROYALTY HDMI W/LOGO
CPN:RO0000002HM

Part Number Description

RO0000002HM

ROYALTY HDMI W/LOGO46@

HDMI W/Logo:RO0000002HM

20
21
22
23

+HDMI_5V_OUT

1

CV47

2

C

MMBT3904_NL_SOT23-3

PCH_HDMI_HPD<17>

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

QV4

E

3 1

12

1 2

2

B

RV33
150K_0402_5%

RV34
100K_0402_5%

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

HDMI_HPLUG_R

1

CV56
220P_0402_50V8J

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

HDMI LS & Conn.

HDMI LS & Conn.

HDMI LS & Conn.

LA-B751P

LA-B751P

LA-B751P

1

0.1

0.1

27 69Wednesday, March 26, 2014

27 69Wednesday, March 26, 2014

27 69Wednesday, March 26, 2014

0.1

5

4

3

2

1

RN27

100K_0402_5%

13

D

QN2

G

DII-DMN65D8LW-7~D

S

+5VALW+3VS

12

WLES ON/OFF LED#

WL_OFF# <17>

WLES ON/OFF LED# <38>

D D

12

RN25

100K_0402_5%

WLAN_LED#

NGFF WL Con (E Key)

JWLAN1

1

GND

USB20_P4<20>
USB20_N4<20>

C C

PCIE_PTX_WLANRX_P4<20>
PCIE_PTX_WLANRX_N4<20>

PCIE_PRX_WLANTX_P4<20>
PCIE_PRX_WLANTX_N4<20>

WLANCLK_REQ#<18>
WLAN_WAKE#<43>

RM390_0402_5%

1 2

RF@

LM2

@RF@

CLK_PCIE_WLAN<18>

CLK_PCIE_WLAN#<18>

B B

1 2

DLW21SN670HQ2L_4P

RM400_0402_5%

1 2

RF@

CLK_PCIE_WLAN_R

34

CLK_PCIE_WLAN#_R

CLK_PCIE_WLAN_R
CLK_PCIE_WLAN#_R

WLANCLK_REQ#
WLAN_WAKE#

USB20_P4
USB20_N4

3

USB_D+

5

USB_D-

7

GND

9

SIDO_CLK

11

SDIO_CMD

13

SDO_DAT0

15

SDO_DAT1

17

SDO_DAT2

19

SDO_DAT3

21

SDIO_WAKE#

23

SDIO_RESET#

33

GND

35

PETP0

37

PETN0

39

GND

41

PERP0

43

PERN0

45

GND

47

REFCLKP0

49

REFCLKN0

51

GND

53

CLKEQ0#

55

PEWAKE0#

57

GND

59

RSRVD/PETP1

61

RSRVD/PETN1

63

GND

65

RSRVD/PERP1

67

RSRVD/PERN1

69

GND

71

RESERVED

73

RESERVED

75

GND

77

MTG77

LOTES_APCI0019-P009A

CONN@

UART_WAKE#

W_DISABLE2#
W_DISABLE1#

3.3VAUX

3.3VAUX
LED1#

PCM_CLK

PCM_SYNC

PCM_IN

PCM_OUT

LED2#

UART_RX

UART_TX
UART_CTS
UART_RTS

RESERVED
RESERVED
RESERVED

COEX3
COEX2
COEX1

SUSCLK

PERST0#

I2C_DATA

I2C_CLK

ALERT
RESERVED
RESERVED
RESERVED
RESERVED

3.3VAUX

3.3VAUX

MTG76

GND

+3VS_WLAN_NGFF

2
4
6
8
10
12
14
16

WLAN_LED#

18
20
22

32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74

76

BT_LED#

SUSCLK_R
PLT_RST#_R
BT_OFF#

EC_TX <43>
EC_RX <43>

For EC to detect
debug card insert.

1 2

RM31
100K_0402_5%

1 2

RM32 0_0402_5%

1 2

RM33 0_0402_5%

BT_LED#

SUSCLK <17>
PLT_RST# <17,30,31,43,44>
BT_OFF# <17>

RN26

100K_0402_5%

10K_0402_5%~D

WL_OFF#_R

12

S

QN5

2

2N7002K_SOT23-3

G

13

D

S

QN4
2N7002K_SOT23-3

+3VS_WLAN_NGFF +3VS

12

RN5

1 3

D

2

G

2

closed to pin 2, 4 closed to pin 64, 66

+3VS_WLAN_NGFF +3VS_WLAN_NGFF

22U_0603_6.3V6M~D

0.1U_0402_10V7K~D

22U_0603_6.3V6M~D

1

1

12

@RF@

CM13

CM12

CM26
10P_0402_50V8J

2

2

A A

5

4

0.1U_0402_10V7K~D

1

1

12

@RF@

CM14

CM15

CM27

2

10P_0402_50V8J

2

@RF@

CM24

10P_0402_50V8J

1U_0402_6.3V6K

1 2

AOAC_WLAN<43>

3

+3VALW

2

AOAC@

CM11

1

UM1

5

4

SY6288C20AAC_SOT23-5

AOAC@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS_WLAN_NGFF

2

AOAC@

CM10
100U_1206_6.3V6M

1

1

OUT

IN

2

GND

3

OC

EN

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

12

AOAC@

RM34
10K_0402_5%

Compal Secret Data

Compal Secret Data

Compal Secret Data

+3VALW

10P_0402_50V8J

1 2

@RF@

CM25

10P_0402_50V8J

1 2

@RF@

CM28

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

WLAN

WLAN

WLAN

LA-B751P

LA-B751P

LA-B751P

1

28 69Wednesday, March 26, 2014

28 69Wednesday, March 26, 2014

28 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

4

3

2

1

D D

1 2

SATA_PRX_DTX_P1<16>
SATA_PRX_DTX_N1<16>

SATA_PTX_DRX_N1<16>
SATA_PTX_DRX_P1<16>

C C

CN27 0.01U_0402_16V7K~D

1 2

CN29 0.01U_0402_16V7K~D

1 2

CN31 0.01U_0402_16V7K~D

1 2

CN33 0.01U_0402_16V7K~D

SATA_PRX_DTX_P1_C
SATA_PRX_DTX_N1_C

SATA_PTX_DRX_N1_C SATA_PTX_DRX_P5_C
SATA_PTX_DRX_P1_C

JSSD1

1

CONFIG_3

3

GND

5

NC

7

NC

9

NC

11

NC

13

(P21)CONFIG_0

15

(P23)NC

17

(P25)NC

19

(P27)GND

21

(P29)NC

23

(P31)NC

25

(P33)GND

27

(P35)NC

29

(P37)NC

31

(P39)GND

33

(P41)PETn0/SAT A-B+

35

(P43)PETp0/SAT A-B-

37

(P45)GND

39

(P47)PERn0/SATA-A-

41

(P49)PERp0/SATA-A+

43

(P51)GND

45

(P53)NC

47

(P55)NC

49

(P57)GND

51

(P59)KEY

53

(P61)KEY

55

(P63)KEY

57

(P65)KEY

59

(P67)NC

61

(P69)CONFIG_1

63

(P71)GND

65

(P73)GND

67

(P75)CONFIG_2

69

GND

CONN@

3.3VAUX

3.3VAUX

DAS#

NC(P20)
NC(P22)
NC(P24)
NC(P26)
NC(P28)
NC(P30)
NC(P32)
NC(P34)
NC(P36)

DEVSLP(P38)

NC(P40)
NC(P42)
NC(P44)
NC(P46)
NC(P48)
NC(P50)
NC(P52)

NC(P54)
MFG1(P56)
MFG2(P58)

KEY(P60)
KEY(P62)
KEY(P64)
KEY(P66)

SUSCLK(P68)

3.3VAUX(P70)

3.3VAUX(P72)

3.3VAUX(P74)

FOX_AS0BC21-S85BB-7H

Port1,Gen3

+3VS

2
4
6

NC

8

NC

10

12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68

GND

+3VS

1 2

1 2

+3VS

RN28
10K_0402_5%

RN31

@

10K_0402_5%

10U_0805_25V6K~D

1

CN19

2

0.1U_0402_25V6K~D

1U_0402_6.3V6K~D

1

CN20

2

1000P_0402_50V7K~D

1

1

CN21

CN22

2

2

1 2

SATA_PRX_DTX_P5<16>
SATA_PRX_DTX_N5<16>

SATA_PTX_DRX_N5<16>
SATA_PTX_DRX_P5<16>

CN28 0.01U_0402_16V7K~D

1 2

CN30 0.01U_0402_16V7K~D

1 2

CN32 0.01U_0402_16V7K~D

1 2

CN34 0.01U_0402_16V7K~D

SATA Port5 / PCIe Port2

PCH_GPIO49<21>

SATA_PRX_DTX_P5_C
SATA_PRX_DTX_N5_C

SATA_PTX_DRX_N5_C

PCH_GPIO49

Port5,Gen3

JSSD2

1

CONFIG_3

3

GND

5

NC

7

NC

9

NC

11

NC

13

(P21)CONFIG_0

15

(P23)NC

17

(P25)NC

19

(P27)GND

21

(P29)NC

23

(P31)NC

25

(P33)GND

27

(P35)NC

29

(P37)NC

31

(P39)GND

33

(P41)PETn0/SAT A-B+

35

(P43)PETp0/SAT A-B-

37

(P45)GND

39

(P47)PERn0/SATA-A-

41

(P49)PERp0/SATA-A+

43

(P51)GND

45

(P53)NC

47

(P55)NC

49

(P57)GND

51

(P59)KEY

53

(P61)KEY

55

(P63)KEY

57

(P65)KEY

59

(P67)NC

61

(P69)CONFIG_1

63

(P71)GND

65

(P73)GND

67

(P75)CONFIG_2

69

GND

CONN@

3.3VAUX

3.3VAUX

DAS#

NC(P20)
NC(P22)
NC(P24)
NC(P26)
NC(P28)
NC(P30)
NC(P32)
NC(P34)
NC(P36)

DEVSLP(P38)

NC(P40)
NC(P42)
NC(P44)
NC(P46)
NC(P48)
NC(P50)
NC(P52)

NC(P54)
MFG1(P56)
MFG2(P58)

KEY(P60)
KEY(P62)
KEY(P64)
KEY(P66)

SUSCLK(P68)

3.3VAUX(P70)

3.3VAUX(P72)

3.3VAUX(P74)

FOX_AS0BC21-S85BB-7H

+3VS

2
4
6

NC

8

NC

10

+3VS

12
14
16
18
20

RN29

22

10K_0402_5%

24
26

1 2

28
30
32
34
36
38

RN30

40

10K_0402_5%

42
44

1 2

46
48
50
52
54
56

+3VS

58
60
62
64
66
68

GND

1U_0402_6.3V6K~D

10U_0805_25V6K~D

1

1

CN23

2

2

@

+3VS+3VS

1000P_0402_50V7K~D

0.1U_0402_25V6K~D

1

1

CN24

CN26

CN25

2

2

Port4,Gen3 Port3,Gen2

JSSD3

1

CONFIG_3

3

GND

5

NC

B B

1 2

SATA_PRX_DTX_P4<16>
SATA_PRX_DTX_N4<16>

SATA_PTX_DRX_N4<16>
SATA_PTX_DRX_P4<16>

A A

CN44 0.01U_0402_16V7K~D

1 2

CN46 0.01U_0402_16V7K~D

1 2

CN48 0.01U_0402_16V7K~D

1 2

CN50 0.01U_0402_16V7K~D

SATA Port4 / PCIe Port1

PCH_GPIO16<21>

SATA_PRX_DTX_P4_C
SATA_PRX_DTX_N4_C

SATA_PTX_DRX_N4_C
SATA_PTX_DRX_P4_C

PCH_GPIO16

7

NC

9

NC

11

NC

13

(P21)CONFIG_0

15

(P23)NC

17

(P25)NC

19

(P27)GND

21

(P29)NC

23

(P31)NC

25

(P33)GND

27

(P35)NC

29

(P37)NC

31

(P39)GND

33

(P41)PETn0/SAT A-B+

35

(P43)PETp0/SAT A-B-

37

(P45)GND

39

(P47)PERn0/SATA-A-

41

(P49)PERp0/SATA-A+

43

(P51)GND

45

(P53)NC

47

(P55)NC

49

(P57)GND

51

(P59)KEY

53

(P61)KEY

55

(P63)KEY

57

(P65)KEY

59

(P67)NC

61

(P69)CONFIG_1

63

(P71)GND

65

(P73)GND

67

(P75)CONFIG_2

69

GND

3.3VAUX

3.3VAUX

DAS#

NC(P20)
NC(P22)
NC(P24)
NC(P26)
NC(P28)
NC(P30)
NC(P32)
NC(P34)
NC(P36)

DEVSLP(P38)

NC(P40)
NC(P42)
NC(P44)
NC(P46)
NC(P48)
NC(P50)
NC(P52)

NC(P54)
MFG1(P56)
MFG2(P58)

KEY(P60)
KEY(P62)
KEY(P64)
KEY(P66)

SUSCLK(P68)

3.3VAUX(P70)

3.3VAUX(P72)

3.3VAUX(P74)

FOX_AS0BC21-S85BB-7HCONN@

+3VS

2
4
6

NC

8

NC

10

+3VS

12
14
16
18
20

RN33

22

10K_0402_5%

24
26

1 2

28
30
32
34
36
38

RN35

1 2

+3VS

@

10K_0402_5%

40
42
44
46
48
50
52
54
56
58
60
62
64
66
68

GND

1U_0402_6.3V6K~D

10U_0805_25V6K~D

1

1

CN37

2

2

+3VS

JSSD4

1

CONFIG_3

0.1U_0402_25V6K~D

1000P_0402_50V7K~D

1

1

CN35

CN38

CN36

2

2

1 2

SATA_PRX_DTX_P3<16>
SATA_PRX_DTX_N3<16>

SATA_PTX_DRX_N3<16>
SATA_PTX_DRX_P3<16>

CN43 0.01U_0402_16V7K~D

1 2

CN45 0.01U_0402_16V7K~D

1 2

CN47 0.01U_0402_16V7K~D

1 2

CN49 0.01U_0402_16V7K~D

SATA_PRX_DTX_P3_C
SATA_PRX_DTX_N3_C

SATA_PTX_DRX_N3_C
SATA_PTX_DRX_P3_C

3

GND

5

NC

7

NC

9

NC

11

NC

13

(P21)CONFIG_0

15

(P23)NC

17

(P25)NC

19

(P27)GND

21

(P29)NC

23

(P31)NC

25

(P33)GND

27

(P35)NC

29

(P37)NC

31

(P39)GND

33

(P41)PETn0/SAT A-B+

35

(P43)PETp0/SAT A-B-

37

(P45)GND

39

(P47)PERn0/SATA-A-

41

(P49)PERp0/SATA-A+

43

(P51)GND

45

(P53)NC

47

(P55)NC

49

(P57)GND

51

(P59)KEY

53

(P61)KEY

55

(P63)KEY

57

(P65)KEY

59

(P67)NC

61

(P69)CONFIG_1

63

(P71)GND

65

(P73)GND

67

(P75)CONFIG_2

69

GND

3.3VAUX

3.3VAUX

DAS#

NC(P20)
NC(P22)
NC(P24)
NC(P26)
NC(P28)
NC(P30)
NC(P32)
NC(P34)
NC(P36)

DEVSLP(P38)

NC(P40)
NC(P42)
NC(P44)
NC(P46)
NC(P48)
NC(P50)
NC(P52)

NC(P54)
MFG1(P56)
MFG2(P58)

KEY(P60)
KEY(P62)
KEY(P64)
KEY(P66)

SUSCLK(P68)

3.3VAUX(P70)

3.3VAUX(P72)

3.3VAUX(P74)

FOX_AS0BC21-S85BB-7HCONN@

+3VS

2
4
6

NC

8

NC

10

+3VS

12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56

+3VS

58
60
62
64
66
68

GND

RN32
10K_0402_5%

1 2

RN34
10K_0402_5%

1 2

10U_0805_25V6K~D

1

1

CN39

2

2

@

+3VS

0.1U_0402_25V6K~D

1U_0402_6.3V6K~D

CN40

1000P_0402_50V7K~D

1

1

CN41

CN42

2

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Mini Card/LED

Mini Card/LED

Mini Card/LED

LA-B751P

LA-B751P

LA-B751P

1

29 69Wednesday, March 26, 2014

29 69Wednesday, March 26, 2014

29 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

4

3

2

1

12

PCIE_PRX _GLANTX_P3<20>

PCIE_PRX _GLANTX_N3<20>

+LAN_IO

12

D D

PCIE_W AKE#<17,43>

RL1

4.7K_04 02_5%~D

PCIE_W AKE#

PCIE_PTX_ GLANRX_P3<20>

PCIE_PTX_ GLANRX_N3<20>

CLK_PCIE _LAN<18>

CLK_PCIE _LAN#<18>

LANCLK_R EQ#<18>

PLT_RST#<17,28,31,43 ,44>

PCIE_PRX _LANTX_P3_C

CL1 0.1U_ 0402_16V7 K~D

12

PCIE_PRX _LANTX_N3_C

CL2 0.1U_ 0402_16V7 K~D

PCIE_PTX_ LANRX_P3

PCIE_PTX_ LANRX_N3

CLK_PCIE _LAN

CLK_PCIE _LAN#

LANCLK_R EQ#

PLT_RST#

The pull-up resisters might not be
necessory due to existence
on PCH side.

+LAN_IO

4

GND2GND

OSC1OSC

YL1

3

25MHZ_10PF_7V25000014

2

CL12

1000P_0402_50V7K~D

1

15P_0402_50V8J~D

W=40mils

1

CL13

2

0.1U_0402_16V7K~D

4.7U_080 5_10V4Z

CL40

+3VALW

EN_WOL #

1

2

1

CL41

0.1U_040 2_16V7K

2

1

CL42

0.1U_0402_16V7K

2

UL2

1

OUT

5

IN

2

GND

4

EN

3

OCB

SY6288D2 0AAC_SOT23-5

1 2

RL5

10K_040 2_5%

+3VS

CL11

+LAN_IO

1

2

C C

EN_WOL #<43>

2

CL8

CL9

1

15P_0402_50V8J~D

1A

1

CL14

2

1U_0402_6.3V6K~D

1

1

CL15

2

10U_0603_6.3V6M~D

CL16

2

10U_0603_6.3V6M~D

XTLI
XTLO

1 2

RL2 30K _0402_5%

LAN_ACTIVI TY# +RBIAS
LAN_LINK #_R
LAN_LED2 #_R

RL4

5.1K_04 02_1%~D

1 2

1

1

CL17

2

2

0.1U_0402_16V7K~D

UL1

30

TX_P

29

TX_N

35

RX_P

36

RX_N

33

REFCLK_P

32

REFCLK_N

4

CLKREQ#

2

PERST#

3

WAKE#

25

SMCLK

26

SMDATA

28

NC

27

TESTMODE

41

GND

8

XTLI

7

XTLO

5

ISOLAT#

38

LED_0

39

LED_1

23

LED_2

S IC E220 1-BL3A-R QFN 40P E-LAN CTRL

+AVDDL

1U_0402_6.3V6K~D

CL18

W=20mils

1

1

CL19

2

2

1U_0402_6.3V6K~D

VDD33

AVDD33

AVDDL
AVDDL
AVDDL
AVDDL

AVDDL_REG

AVDDH

AVDDH_REG

DVDDL_REG

TRXP0

TRXN0

TRXP1

TRXN1

TRXP2

TRXN2

TRXP3

TRXN3

RBIAS

0.1U_0402_16V7K~D

1

W=40mils

16

13

+AVDDL

19
31
34
6

22

+AVDDH

9

37

+DVDDL

11

LAN_MDIP0

12

LAN_MDIN0

14

LAN_MDIP1

15

LAN_MDIN1

17

LAN_MDIP2

18

LAN_MDIN2

20

LAN_MDIP3

21

LAN_MDIN3

40

LX

24

PPS

1 2

10

RL3

2.37K_0 402_1%~D

+LAN_IO

+AVDDH

W=20mils

CL5

+DVDDL

W=20mils

1

1

CL4

CL3

2

2

1U_0402_6.3V6K~D

0.1U_0402_16V7K~D

close to UL1 pin37

1

1

CL6

2

2

1U_0402_6.3V6K~D

0.1U_0402_16V7K~D

1

CL7

2

0.1U_0402_16V7K~D

close to UL1 pin9 close to UL1 pin22

CL20

1

1

2

1

CL21

CL22

2

2

1U_0402_6.3V6K~D

0.1U_0402_16V7K~D

4.7U_0603_6.3V6K~D

CL23

1

2

0.1U_0402_16V7K~D

CL24

1

2

0.1U_0402_16V7K~D

CL25

1

2

0.1U_0402_16V7K~D

close to UL1 pin13 close to UL1 pin19close to UL1 pin31close to UL1 pin1 close to UL1 pin16 close to UL1 pin6 close to UL1 pin34

B B

TIMAG: S X'FORM_ IH-160 LAN,SP050006F00
BOTHHAND: S X'FORM_ GST5009-D LF LAN,SP050006B00

+VDDCT_L

A A

5

1

2

CL33

CL32

2

1

0.1U_0402_16V7K~D

1000P_0402_50V7K~D

LAN_MDIN3
LAN_MDIP3

LAN_MDIN2
LAN_MDIP2

LAN_MDIN1
LAN_MDIP1

LAN_MDIN0
LAN_MDIP0

2

CL34

1

1000P_0402_50V7K~D

TL1

1
2
3

4
5
6

7
8
9

10
11
12

350UH_GS T5009-CLF

1

CL35

2

0.1U_0402_16V7K~D

TCT1
TD1+
TD1-

TCT2
TD2+
TD2-

TCT3
TD3+
TD3-

TCT4
TD4+
TD4-

24

RJ45_CT3 RJ45_CT

MCT1

23

RJ45_MDI3 -

MX1+

22

RJ45_MDI3 +

MX1-

21

RJ45_CT2

MCT2

20

RJ45_MDI2 -

MX2+

19

RJ45_MDI2 +

MX2-

18

RJ45_CT1

MCT3

17

RJ45_MDI1 -

MX3+

16

RJ45_MDI1 +

MX3-

15

RJ45_CT0

MCT4

14

RJ45_MDI0 -

MX4+

13

RJ45_MDI0 +

MX4-

2

CL36

CL37

1

1000P_0402_50V7K~D

1

2

1

CL39

CL38

2

1

2

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1000P_0402_50V7K~D

4

RL9

1 2

75_0402 _1%~D

RL10

1 2

75_0402 _1%~D

RL11

1 2

75_0402 _1%~D

RL12

1 2

75_0402 _1%~D

2

CL30
150P_18 08_3KV7K ~D

1

3

LAN_LINK #_R

+LAN_IO

QL3
2N7002_ SOT23

S

G

2

@EMI@

12

CL27 470P_04 02_50V7K

+LAN_IO

+LAN_IO

D

13

LAN_LED2 #_R

RL14
1K_0402 _1%~D

1 2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

LAN_ACTIVI TY#

12

RL8 330 _0402_5%

RJ45_MDI3 -

RJ45_MDI3 +

RJ45_MDI1 -

RJ45_MDI2 -

RJ45_MDI2 +

RJ45_MDI1 +

RJ45_MDI0 -

RJ45_MDI0 +

12

LAN_LINK #

CL28 470P_04 02_50V7K@EMI@

12

LAN_LED2 #

CL29 470P_04 02_50V7K@EMI@

1 2

LL1
BLM15AG 121SN1D_L0 402_2P

12

RL13 130_0 402_1%~D

12

RL15 130_0 402_5%~D

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

JLAN

10

Yellow LED-

9

Yellow LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

11

Green LED-

13

Orange LED-

12

Green-Orange LED+

SANTA_130 456-511

CONN@

1

@EMI@

CL31
470P_04 02_50V7K

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Same with ECHO13.
Symbol check OK. 2/25

17

GND

16

GND

15

GND

14

GND

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Numb er Rev

Size Document Numb er Rev

Size Document Numb er Rev

Compal Electronics, Inc.

LAN E2201

LAN E2201

LAN E2201

LA-B751P

LA-B751P

LA-B751P

1

30 69Wednesday, M arch 26, 2014

30 69Wednesday, M arch 26, 2014

30 69Wednesday, M arch 26, 2014

0.1

0.1

0.1

5

4

3

2

1

1 2

CR40.1U_0402_16V7K

CR54 .7U_0603_6.3V6K

CR80.1U_0402_16V7K

CR31U_0402_6.3V6K

12

12

12

+3VS_CARD

20 mils

+DV33_18

20 mils
20 mils

40 mils

20 mils 375mA

+3VS_CARD

1

1

CR6

D D

Close to Pin 27

CR7

2

2

4.7U_0603_6.3V6K

0.1U_0402_16V7K

+Vcc_3in1

+3VS_CARD

12 mils

1 2

Close pin < 200mil

PCIE_PTX_CARDRX_P5<20>

PCIE_PTX_CARDRX_N5<20>

PCIE_PRX_CARDTX_P5< 20>

PCIE_PRX_CARDTX_N5<20>

C C

+3VS_CARD

1 8
2 7
3 6
4 5

B B

CR_GPIO
CR_WAKE#

RR4 10K_8P4R_5%

PCIE_PTX_CARDRX_P5

PCIE_PTX_CARDRX_N5

PCIE_PRX_CARDTX_P5

PCIE_PRX_CARDTX_N5

CLK_PCIE_CD<1 8>

CLK_PCIE_CD#<18>

CDCLK_REQ#<18>

pin28:
If GPIO NO use for LED function and
GPIO must pull high

1 2

1 2

PCIE_PRX_C_DTX_P1

PCIE_PRX_C_DTX_N1

CR10 0.1U_0402_16V7K

CR11 0.1U_0402_16V7K

CLK_PCIE_CD

CLK_PCIE_CD#

PLT_RST#<17,28,30,43,44>

60mil 60mil 1.5A

+3VS +3VS_CARD

LR1

MMZ1608R301AT_2P~D

1 2

CR2

0.1U_0402_16V7K

CR1

10U_0603_6.3V6M

1

1

2

2

RR26.2K_0402_1%

PLT_RST#

CDCLK_REQ#

CR_GPIO

RREF

UR1

11

3V3_IN

18

DV33_18

10

AV12

14

DV12S

12

Card_3V3

27

3V3aux

9

RREF

3

HSIP

4

HSIN

7

HSOP

8

HSON

5

REFCLKP

6

REFCLKN

1

PERST#

2

CLK_REQ#

28

GPIO

RTS5227-GR_QFN3 2_4X4

Internal Pull status

15_SP1

16_SP2

17_SP3

19_SP4

20_SP5

21_SP6

29_SP7

30_SD_CD#

31_MS_CD#

SD_CD#

MS_INS#

WAKE#

SP1

SP2

SP3

SP4

SP5

SP6

SP7

GND

NO Card

PD80

PD80

PD80

PD80

PD80

PD80

PD200

PU200

PU200

30

SD_CD#

31

MS_INS#

32

CR_WAKE#+AV12_DV12 _S

15

16

17

19

20

21

29

SD_CLK MS_D0

SD_D2 MS_CLK

SD_WP MS_BS

1 2

RR1 0_04 02_5%

EMI@

1 2

RR3 0_04 02_5%

EMI@

SD_D1_R

SD_D0 MS_D1_R

SD_CLK MS_D0_R

SD_CMD MS_D2_R

SD_D3 MS_D3_R

SD_D2 MS_CLK_R

@EMI@

1 2

CR9
5P_0402_50V8C

for project which need fine tune SD signal can change to R

13

NC

22

NC

23

NC

24

NC

25

NC

26

NC

33

SD Insert

SD_D1_PU80

SD_D0_PU80

SD_CLK_PD80

SD_CMD_PU80

SD_D3_PU80

SD_D2_PU80

SD_WP_PD200

PU200

PU200

MS Insert

PD80

MS_D1_PD80

MS_D0_PD80

MS_D2_PD80

MS_D3_PD80

MS_CLK_PD80

MS_BS_PD200

PU200

PU200

CR12

10U_0603_6.3V6M

0.1U_0402_16V7K

1

2

SD_D2 MS_CLK_R

SD_CD#

SD_D2 MS_CLK_R
SD_CMD MS_D2_R
SD_D3 MS_D3_R
MS_INS#

SD_CMD MS_D2_R

SD_D0 MS_D1_R
SD_D0 MS_D1_R
SD_CLK MS_D0_R
SD_WP MS_BS

SD_D0 MS_D1_R
SD_D1_R
SD_CD#

SD_WP MS_BS

CR13

40 mils

+Vcc_3in1

1

Close to JCR Pin 12

2

JCR

1

SD-DAT2

2

MS-VSS1

3

SD-CD/DAT3 MMC-RSV

4

MS-VCC

5

MS-SCLK

6

SD-CMD MMC-CMD

7

MS-DATA3

8

MS-INS

9

SD-VSS MMC-VSS1

10

MS-DATA2

11

SD-VDD MMC-VDD

12

MS-DATA0

13

MS-DATA1

14

SD-CLK MMC-CLK

15

MS-BS

16

MS-VSS2

17

SD-VSS MMC-VSS2

18

SD-DAT0 MMC-DAT

19

SD-DAT1

20

SD-CD

21

SD-GND

22

SD-WP(SW)

T-SOL_143-230030 2602_RV

GND1
GND2

23
24

A A

5

Close to Pin 11

Security Classification

Security Classification

Security Classification

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

2014/2/11 2014/2/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Doc ument Numbe r Rev

Size Doc ument Numbe r Rev

Size Doc ument Numbe r Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Card Reader RTS5179

Card Reader RTS5179

Card Reader RTS5179

LA-B751P

LA-B751P

LA-B751P

1

0.1

0.1

0.1

31 69Wednesday, March 26, 2014

31 69Wednesday, March 26, 2014

31 69Wednesday, March 26, 2014

5

+3.3V_DVDD

DVDD_HDAIO

VDDQ_PLL

RA96 0_0402_5%

12

@

@

PCH_AZ_CODEC_SDIN0_R

SENSE A#

1 2
1 2

MIC_BIAS_B

MIC_BIAS_C

1 2

MPIO_4_PB#_PD

PC_BEEP_1

1 2

EAPD_R

RA66 0_0805_5%~D

@

0.1U_0402_16V7K

12

CA65

0.1U_0402_16V7K

12

CA66

0.1U_0402_16V7K

12

CA72

LA7
FBMA-L11-160808-121LMA30T_0805

1 2

1

1

CA92

CA91

2

2

0.1U_0402_25V6

1 2

RA109 10_0402_1%

AMP_LEFT_C

RA117 5.9K_0402_5%

+GVDD

RA116 5.76K_0402_5%

1U_0603_25V6K

12

CA100

+1.2VS

12

PC_BEEP_1

PC_BEEP_L

PC_BEEP_R

12

1U_0603_25V6K

1 2

AMP_RIGHT_C

SPKR+ BSPR

UA1

9

DVDD_1

20

DVDD_2

48

DVDD_3

15

FBDC

54

DVDD_IO

6

DVDD_HDAIO

19

VDDQ_PLL

5

HDA_BCLK

7

HDA_SDI

4

HDA_SDO

3

HDA_SYNC

2

HDA_RSTN

47

SENSE_A

37

SENSE_B

36

SENSE_I

42

MIC_BIASB

41

MIC_BIASC

55

DMIC_MCLK / MPIO1

51

DMIC_DATA0 / MPIO3

50

SPDIF IN / MPIO4

53

PCBEEP / MPIO5

52

EAPD / MPIO0

1

DVSS_1

8

DVSS_2

21

DVSS_3

49

DVSS_4

18

VSSQ_PLL

MALCOLM-EX_QFN56_7X7~D

40mil

12

12

CA95

CA94

CA97

1U_0603_25V6K

1U_0603_25V6K

Close to UA1
Pin12,13,14,27,28

10U_0805_25V6K

12

+PVDD

CA98

1 2

CA101

0.027U_0402_16V6K

1 2

12

CA102

0.027U_0402_16V6K

CA107 0.22U_0603_25V7K

12

BSPLSPKL+

12

BSNLSPKL-

CA108 0.22U_0603_25V7K
CA109 0.22U_0603_25V7K

12
12

BSNRSPKR-

CA110 0.22U_0603_25V7K

AM0

AM1

AM2

PCH_AZ_CODEC_RST#

12

CA96

1U_0603_25V6K

SPDIF OUT0 / MPIO2

+3VS

+PVDD

12

13
14
27
28

6
5

31
32

2

15
19

26
22

10

9
8

+3VS

1 2

RA51 0_0402_5%

D D

When the extern al amplifier is to be powered down,
this pin outpu t a logic ‘1’

1 2

RA53 0_0805_5%~D

1 2

RA55 0_0805_5%~D

1 2

RA57 0_0805_5%~D

GND

C C

PC BEEP

BEEP#<43>

HDA_SPKR<16>

B B

PCH_AZ_CODEC_BITCLK<16>

PCH_AZ_CODEC_SDIN0<16>
PCH_AZ_CODEC_SDOUT<16>
PCH_AZ_CODEC_SYNC<16>
PCH_AZ_CODEC_RST#<16>

AGND
AGND

AGND

CA67

1U_0402_6.3V6K~D

CA68

1U_0402_6.3V6K~D

1 2

1 2

20 mil

DVDD_HDAIO

2

CA140.1U_0402_25V6K~D

1

20 mil

AGND

1 2

CA15 2200P_0402_25V7K~D

1 2

CA24 100P_0402_50V8J~D

MIC_CLK_C

MIC_DATA<25>

RA81

1 2

PC_BEEP

560_0402_5%

RA84

1 2

12

560_0402_5%

RA80

@

10K_0402_5%~D

B+_BIAS

10P_0402_50V8J~D

CA30

1 2

RA40 33_0402_5%~D

RA64 10K_0402_1%~D
RA42 20K_0402_1%~D

MIC_BIAS_C

RA45 0_0805_5%~D

EAPD

Close to LA7

10U_1206_25V6M

RA86

100K_0402_1%

RA89

100K_0402_1%~D

@

PC_BEEP_R

PC_BEEP_L

0.027U_0402_16V6K

1 2

CA103

0.027U_0402_16V6K

1 2

CA104

RA87

100K_0402_1%

1 2

RA90

100K_0402_1%

@

1 2

AGND

24.9K_0402_1%

RA120

CA105

2.2U_0603_10V6K

1 2

AMP_LEFT

CA106

1 2

AMP_RIGHT AMP _RIGHT-1

2.2U_0603_10V6K

A A

+PVDD

1 2

RA118

1 2

AMP_LEFT-1

13.3K_0402_1%

RA119

1 2

12.4K_0402_1%

RA122

1 2

24.9K_0402_1%

RA85

100K_0402_1%

1 2

AM0 AM1 AM2

RA88
100K_0402_1%

@

1 2

AGND AGND

5

1 2

1 2

4

+3.3V_AVDD

38

AVDD

29

PORTA_VDD

34

PORTD_VDD

10

VDD_SW_1

11

VDD_SW_2

16

VDDQ_SW

12

SWOUT

28

PORTA_L

26

PORTA_R

24

PORTA_S

27

PORTA_VCOM

44

PORTB_L

43

PORTB_R

45

PORTC_L

46

PORTC_R

33

PORTD_L

31

PORTD_R

35

PORTD_S

32

PORTD_VCOM

23

PORTG_L

22

PORTG_R

56

40

VREF_FILT

13

VSS_SW_1

14

VSS_SW_2

17

VSSQ_SW

39

AVSS

25

PORTA_VSS

30

PORTD_VSS

57

Thermal PAD

LA2

EMI@

1 2

MIC_CLK_C MIC_CLK

BLM15BB221SN1D_2P

1 2

RA124 10K_0402_5%

1 2

RA125 10K_0402_5%@

UA4

AVCC

GAIN/SLV

PVCC
PVCC
PVCC
PVCC

INPL
INNL

INPR
INNR

GVDD

BSPL
BSNL

BSPR
BSNR

AM0
AM1
AM2

TPA3131D2DAPR_QFN32_5X5

TI SA000074E00
TPA3131D2DAPR Q FN 32P

4

VDD_SW

VDDQ_PLL

+1.2VS_SWout

HPOUT-L
HPOUT-R

MIC_LINE_IN_L
MIC_LINE_IN_R

HP2_D_L1
HP2_D_R1

AMP_LEFT
AMP_RIGHT

MPIO_2

AGND

DMN66D0LDW-7_SOT363-6

1

PLIMIT

3

11

SYNC

29

/SDZ

30

/FAULTZ

25

OUTPR

23

OUTNR

16

OUTPL

18

OUTNL

7

MUTE

4

GND

17

GND

20

GND

21

GND

24

GND

33

GND

20 mil

1 2

LA1 4.7UH_CBC2012T4R7M_20%~D

@

1

2

QA7B

PLIMITB+_BIAS +PAVDD

RA115

100K_0402_1%

RA110

100K_0402_1%

SPKR+
SPKR-

SPKL+
SPKL-

SPK_MUTE#

AGND

+3.3V_DVDD

BLM15AG121SN1D_L0402_2P

LA10

1 2

closed to Pin 1 6,19

20 mil

1 2

CA13 2.2U_0603_10V6K

RA97

2

CA17
47U_0805_6.3V6M~D

+RTC_CELL

2

RA114

1 2

47K_0402_5%

12

12

G

+PVDD

+PVDD

12

61

D

S

AGND

MIC_CLK <25>

RA123
470K_0402_5%

0.1U_0402_10V7K

AGND

CA18

0.1U_0402_25V6K~D

1

5

1

2

W=20mil

AGND

@

MIC1MIC1_C_L

12

10K_0402_1%~D

34

D

G

QA7A

S

DMN66D0LDW-7_SOT363-6

RA91

100K_0402_1%
RA111

1 2

20K_0402_5%

CE52

3

+3.3V_DVDD

+1.2VS

AGND

MIC_IN

12

VDDQ_PLL

1

CA3

0.1U_0402_25V6K~D

2

2

CA12
47U_0805_6.3V6M~D

1

12

BLM15AG121SN1D_L0402_2P

1 2

LA9

+3VS

Trace width for SPK-L+/SPK-L-/SPK-R+/SPK-R­Speaker 4 ohm : 40mil
Speaker 8 ohm : 20mil

+GVDD

12

RA113
10K_0402_1%

1U_0603_25V6K

12

CA99

RA112
10K_0402_1%

MIC_C_PLUG
MIC1

+3.3V_AVDD

RA92

1 2

0_0805_5%~D

+1.2VS

2

CA9

0.1U_0402_25V6K~D

1

+3.3V_AVDD

1 2

SPK_MUTE#

+3.3V_AVDD

RA52
10K_0402_5%~D

1 2

HP_MUTE#

UNDER WIN8 WLP (FSOP >= 1Vrms), AVDD=3.5 to 3.57Vrms AND MOUNT RA44(5K1).
UNDER WIN8.1 WLP (FSOP >= 0.707Vrms). AVDD=3.3 +/- 0.3Vrms AND UNMOUNT RA44

SPKR­SPKR+
SPKL­SPKL+

+3.3V_AVDD

MIC_BIAS_C

RA126

2.2K_0402_5%~D

12

2

CA4

0.1U_0402_25V6K~D

1

1

CA6
10U_0603_6.3V6M~D

2

2

CA10

0.1U_0402_25V6K~D

1

RA41
10K_0402_5%~D

1

DA15
BAT54AW_SOT323-3~D

1

DA16
BAT54AW_SOT323-3~D

UA3

13

VDD

16

VDD

1

SCL

2

SDA

4

ADDR_SEL

8

MIC_PRESENT

11

MIC_P

12

MIC_N

TS3A225ERTER_PWQFN16_3X3

3

2

3

EC_MUTE#

2

EAPD

DEPOP#_EC

EAPD

LA3 NBQ160808T-800Y-N 0603EMI@
LA4 NBQ160808T-800Y-N 0603EMI@
LA5 NBQ160808T-800Y-N 0603EMI@
LA6 NBQ160808T-800Y-N 0603EMI@

VDD_SW

2

1

2

CA11

0.1U_0402_25V6K~D

1

1 2
1 2
1 2
1 2

Combo JACK Mic. switch

3

1

CA5
10U_0603_6.3V6M~D

2

CA7

0.1U_0402_25V6K~D

EC_MUTE# <43>

DEPOP#_EC <43>

TIP_SENSE

DET_TRIGGER

RING2_SENSE

RING2

SLEEVE_SENSE

SLEEVE

GND
GND
GND

+3.3V_DVDD

2

1

AGND

9
5

14
7

15
6
17
3
10

2

CA1

0.1U_0402_25V6K~D

1

closed to Pin 5 4closed to Pin 1 0, 11

CA8

0.1U_0402_25V6K~D

HP2_D_L1

HP2_D_R1

close to Codec

CA29

EMI@

RING2

MIC_IN

CA89 220U_B2_2.5VM_R35M~D

CA90 220U_B2_2.5VM_R35M~D

SPK_R1-_CONN
SPK_R2+_CONN
SPK_L1-_CONN
SPK_L2+_CONN

1

1

CA33

2

2

EMI@

1000P_0402_50V7K

HPOUT-L
JACK1_PLUG

1

CA81
10U_0603_6.3V6M~D

2

@

1 2

1 2

CA31

EMI@

1000P_0402_50V7K

+3.3V_DVDD

RA95 0_0603_5%

40 mil 700mA

1

1

@

CA70

2

2

CA69

0.1U_0402_16V7K

1

4.7U_0603_6.3V6K~D

CA71

@

2

0.01U_0402_16V7K

+

+

12

100_0402_1%

RA108

RA107

AGND AGND

MIC_LINE_IN_L

MIC_LINE_IN_R

SENSE pin

JACK1_PLUG

JACK2_PLUG#

MIC_C_PLUG

JACK2_PLUG#

Int. Speaker Connector

1

1

2

CA32

2

2

EMI@

1000P_0402_50V7K

1000P_0402_50V7K

1

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

LP2301ALT1G_SOT23-3

@

RA82

1 2

150_0402_1%

12

RA83

@

12

100_0402_1%

CA76

CA77

3

ESD@

DA13

AZ5125-02S.R7G_SOT23-3

Issued Date

Issued Date

Issued Date

2

+3.3V_DVDD+3VS

12

QA1

D

S

123

40 mil 700mA

G

@

510K_0402_5%

HP2_D_L2

HP2_D_R2

2.2U_0603_10V6K

1 2

MIC_LINE_IN_L1

1 2

MIC_LINE_IN_R1

2.2U_0603_10V6K

RA106

10K_0402_1%~D

Close to chip s ide

1 2

RA46 39.2K_0402_1%

1 2

RA47 20K_0402_1%~D

1 2

RA48 10K_0402_1%~D

1 2

RA49 5.11K_0402_1%~D

2

3

ESD@

DA14

1

AZ5125-02S.R7G_SOT23-3

2

+3VS

+5VS

12

12

12K_0402_1%

RA128

MIC_BIAS_B

MIC_BIAS_B

RA103

1 2

7.5K_0402_1%~D

1 2

RA104

7.5K_0402_1%~D

12

12

RA105
10K_0402_1%~D

JSPK

1

1

2

2

3

3

4

4

5

G1

6

G2

ACES_50278-00401-001

CONN@

2011/06/02 2012/06/02

2011/06/02 2012/06/02

2011/06/02 2012/06/02

RA100

RA102

2.2K_0402_5%~D

2.2K_0402_5%~D

12

12

MIC_LINE_IN_L2

MIC_LINE_IN_R2

SENSE A#

PWRSHARE_EN_EC#<43>
USB_PWR_EN#<34,43>
USBCHG_DET#<35>
USB_IN_STATUS#<43>

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

B+_BIAS+5VALW+3VS

CTL1<43>
USB20_N1_CONN<35>
USB20_P1_CONN<35>

USB_OC4#<20>

USB3RN6_R<35>
USB3RP6_R<35>

USB3TN6_R<35>
USB3TP6_R<35>
CTL2<43>
USB20_N8_CONN<35>
USB20_P8_CONN<35>

USB3RN3_R<35>
USB3RP3_R<35>

USB3TN3_R<35>
USB3TP3_R<35>
USB_OC2#<20>

UA5

RT9041E-15GQW_WDFN8_2X2

8

VOUT

VIN

7

ADJ

NC

6

PGOOD

VDD

5

EN_1.2V+3VS

1U_0402_10V6K
CA112

GND

EN

PGND

FB=0.8V

Vo=0.8(1+Rt/Rb)=1.2V

HP_MIC_LINE_IN_L
HP_MIC_LINE_IN_R

MIC_LINE_IN_L2
HP2_D_L2

MIC_LINE_IN_R2
HP2_D_R2

ISL54405IVZ-T_TSSOP16

AGND AGND

Intersil SA0000 7TP00
ISL54405IVZ-T T SSOP16P

AC/DC

DIR

MUTE

SEL

L1,R1

L2,R2

L, R
C/P shunts

L1, R1
C/P shunts

L2, R2
C/P shunts

AMP_LEFT
AMP_RIGHT
MIC_IN
RING2
HPOUT-L
HPOUT-R
JACK1_PLUG
JACK2_PLUG#
HP_MIC_LINE_IN_L
HP_MIC_LINE_IN_R

SPK_MUTE#
HP_MUTE#

AGND

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Date: Sheet

Date: Sheet of

Date: Sheet of

1

1

2

3

4
9

4

L

5

R

14

L1

13

L2

12

R1

11

R2

10

GND

9

GND

7

GND

0 0 0

X

0

0 1

ON

OFF

OFF

OFF

OFF

CONN@

40

40

39

39

38

38

37

37

36

36

35

35

34

34

33

33

32

32

31

31

30

30

29

29

28

28

27

27

26

26

25

25

24

24

23

23

22

22

21

21

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

JIO

SP01001DR00

Title

Codec Malcolm-EX

Codec Malcolm-EX

Codec Malcolm-EX

LA-8381P

LA-8381P

LA-8381P

20 mil 500mA

FB_1.2V

+3.3V_DVDD

UA6

1

5V_SUPPLY

16

VDD

2

AC/DC

AC/DC

8

DIR_SEL

DIR_SEL

6

MPIO_4_PB#_PD

SEL

3

MPIO_2

MUTE

15

CAP_SS

CA19

X

X

0

1

X

OFF

OFF

ON

OFF

OFF

OFF

OFF

OFF

OFF

OFF

I-PEX_20455-040E-12

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

RA127

5.1K_0402_1%

1 2

RA129
10K_0402_5%

1 2

2

0.1U_0402_25V6K~D

1

G5
G4

G2
G1

2

CA16

0.1U_0402_25V6K~D

1

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%~D

44
43

42
41

32 69Wednesday, March 26, 2014

32 69Wednesday, March 26, 2014

32 69Wednesday, March 26, 2014

+1.2VS

RA101

AGND

1.0

1.0

1.0

of

5

D D

C C

4

3

2

1

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Reserved Page

Reserved Page

Reserved Page

LA-B751P

LA-B751P

LA-B751P

1

33 69Wednesday, March 26, 2014

33 69Wednesday, March 26, 2014

33 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

+5VALW

1

1

CI2

CI1

4.7U_0805_10V4Z

D D

USB_PWR_EN#<32,43>

2

USB_PWR_EN#

0.1U_0402_16V7K

2

1

CI4

0.1U_0402_16V7K

2

2.0A

UI2

OUT

5

IN

GND

4

EN

OCB

SY6288D20AAC_SOT23-5

1

2

3

+USB3_VCCA

Change AP2301 to SY6228D

C C

USB3TN1<20>
USB3TP1<20>

4

80mil

USB_OC0# <20>

1

CI5

0.1U_0402_16V7K

2

1 2

CI30 0.1U_0402_10V6K~D

1 2

USB3TP1 USB3TP1_L

CI31 0.1U_0402_10V6K~D

3

@EMI@

1 2

RI1 0_0402_5%~D

LI1

EMI@

4

1

1 2

@EMI@

@EMI@

1 2

3

2

EMI@

1 2

@EMI@

@EMI@

1 2

3

2

EMI@

LI3

1 2

@EMI@

3

USB20_N0_CONN

3

2

USB20_P0_CONN

2

4

4

1

USB3RP1_R

1

4

4

1

USB3TP1_R

1

USB20_N0<20>

USB20_P0<20>

USB3TN1_LUSB3TN1

USB20_N0

USB20_P0

USB3RN1 USB3RN1_R

USB3RN1<20>

USB3RP1

USB3RP1<20>

USB3TN1_L USB3TN1_R

USB3TP1_L

4

1

DLW21SN900SQ2L_0805_4P~D

RI4 0_0402_5%~D

RI5 0_0402_5%~D

DLW21SN900HQ2L_0805_4P~D

3

2

LI2

RI8 0_0402_5%~D

RI11 0_0402_5%~D

DLW21SN900HQ2L_0805_4P~D

3

2

RI13 0_0402_5%~D

2

On MB (Right Side)

USB20_N0_CONN
USB20_P0_CONN

USB3RN1_R
USB3RP1_R

USB3TN1_R
USB3TP1_R

DI2

ESD@

+USB3_VCCA

L30ESDL5V0C3-2_SOT23-3

3

1

USB3RN1_R

USB3RP1_R

USB3TN1_R

USB3TP1_R

JUSB1

1

VBUS

2

D-

3

D+

4

GND

5

StdA-SSRX -

6

StdA-SSRX +

7

GND-DRAIN

8

StdA-SSTX-

9

StdA-SSRX +

10

GND

11

2

GND

12

GND

13

GND

CONN@

Symbol check OK. 2/25

DI3

ESD@

1

2

4

5

3

TVWDF1004AD0_DFN9

9

8

7

6

USB3RN1_R

USB3RP1_R

USB3TN1_R

USB3TP1_R

1

CI10

47U_0805_6.3V6M~D

+USB3_VCCA

12

+USB3_VCCA

12

CI40

10P_0402_50V8J

10U_0603_6.3V6M~D

CI11

1

2

@RF@

@EMI@

1 2

+5VALW

B B

4.7U_0805_10V4Z

1

CI26

2

USB_PWR_EN#

1

CI27

0.1U_0402_16V7K

2

1

CI28

0.1U_0402_16V7K

2

2.0A

UI3

OUT

5

IN

GND

4

EN

OCB

SY6288D20AAC_SOT23-5

1

2

3

+USB3_VCCB

80mil

1

CI29

0.1U_0402_16V7K

2

USB_OC1# <20>

USB20_P7<20>

USB20_N7<20>

USB20_P7

USB20_N7

USB3RP2 USB3RP2_R

USB3RP2<20>

USB3RN2

USB3RN2<20>

Change AP2301 to SY6228D

1 2

USB3TN2 USB3TN2_L

USB3TN2<20>

A A

5

USB3TP2<20>

CI32 0.1U_0402_10V6K~D

1 2

CI33 0.1U_0402_10V6K~D

4

USB3TP2_LUSB3TP2

USB3TP2_L USB3TP2_R

USB3TN2_L

RI56 0_0402_5%~D

LI4

EMI@

4

1

DLW21SN900HQ2L_0805_4P~D

RI58 0_0402_5%~D

RI61 0_0402_5%~D

LI6

2

3

DLW21SN900HQ2L_0805_4P~D

RI62 0_0402_5%~D

RI59 0_0402_5%~D

LI5

2

3

DLW21SN900HQ2L_0805_4P~D

RI60 0_0402_5%~D

3

3

3

4

2

1

2

1 2

@EMI@

@EMI@

1 2

EMI@

1

1

2

4

3

4

1 2

@EMI@

@EMI@

1 2

EMI@

1

1

2

4

3

4

1 2

@EMI@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

USB20_P7_CONN

USB20_N7_CONN

USB3RN2_R

USB3TN2_R

USB3RN2_R USB3RN2_R

USB3RP2_R

USB3TN2_R

USB3TP2_R

Compal Secret Data

Compal Secret Data

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

On MB (Right Side)

+USB3_VCCB

USB20_N7_CONN
USB20_P7_CONN

USB3RN2_R
USB3RP2_R

USB3TN2_R
USB3TP2_R

L30ESDL5V0C3-2_SOT23-3

DI4

ESD@

ESD@

DI5

1

2

4

5

3

TVWDF1004AD0_DFN9

10

2

3

11
12
13

Symbol check OK. 2/25

1

9

8

USB3RP2_R

7

USB3TN2_R

6

USB3TP2_R

JUSB2

1

VBUS

2

D-

3

D+

4

GND

5

StdA-SSRX -

6

StdA-SSRX +

7

GND-DRAIN

8

StdA-SSTX-

9

StdA-SSRX +

GND
GND
GND
GND

CONN@

Title

Title

Title

USB 3.0/2.0 x2 (left side)

USB 3.0/2.0 x2 (left side)

USB 3.0/2.0 x2 (left side)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

47U_0805_6.3V6M~D

Compal Electronics, Inc.

1

12

CI24

+USB3_VCCB

CI41

+USB3_VCCB

12

@RF@

10P_0402_50V8J

34 69Wednesday, March 26, 2014

34 69Wednesday, March 26, 2014

34 69Wednesday, March 26, 2014

10U_0603_6.3V6M~D

CI25

1

2

0.1

0.1

0.1

5

D D

1 2

USB3TN6 USB3TN6_L

USB3TN6<20>
USB3TP6<20>

C C

CI34 0.1U_0402_10V6K~D

1 2

CI35 0.1U_0402_10V6K~D

USB20_N1<20>

USB20_P1<20>

USB3RN6<20>

USB3RP6<20>

USB3TP6_LUSB3TP6

USB20_N1

USB20_P1

USB3RP6

USB3TP6_L

4

1 2

RI63 0_0402_5%~D

LI7

4

4

1

1

DLW21SN900SQ2L_0805_4P~D

1 2

RI64 0_0402_5%~D@EMI@

1 2

RI65 0_0402_5%~D@EMI@

LI8

2

2

3

3

DLW21SN900HQ2L_0805_4P~D

1 2

RI66 0_0402_5%~D@EMI@

RI67 0_0402_5%~D@EMI@

LI9

2

2

3

3

DLW21SN900HQ2L_0805_4P~D

RI68 0_0402_5%~D@EMI@

@EMI@

EMI@

EMI@

1 2

EMI@

1 2

3

3

USB20_N1_CONN

3

2

USB20_P1_CONN

2

1

USB3RN6_RUSB3RN6

1

4

USB3RP6_R

4

1

USB3TN6_RUSB3TN6_L

1

4

USB3TP6_R

4

USB20_N1_CONN <32>

USB20_P1_CONN <32>

USB3RN6_R <32>

USB3RP6_R <32>

USB3TN6_R <32>

USB3TP6_R <32>

RU4
100K_0402_5%

USBCHG_DET#<32>

USBCHG_DET#

2

+3VLP+3VLP+3VLP+3VLP

SDMK0340L-7-F_SOD323-2

220K_0402_5%

12

CU27

2.2U_0603_6.3V6K

1

CU28

0.1U_0402_16V7K

2

12

12

12

RU5

TC7SZ14FU_SSOP5~D

DU9

SDMK0340L-7-F_SOD323-2

DU8

1

NC

2

A

UU5

3

12

To PowerShare Port (On DB)

5

G

P

Y

1M_0402_5%

1

CU26

0.1U_0402_16V7K

2

4

RU6

USB charge for DC S5

12

1

CU29

0.1U_0402_16V7K

2

USBCHG_DET_D <60>

USBCHG_DET_EC# <43>

1

1 2

RI69 0_0402_5%~D@EMI@

LI10

EMI@

USB20_N8<20>

B B

1 2

USB3TN3 USB3TN3_L

USB3TN3<20>
USB3TP3<20>

A A

5

CI36 0.1U_0402_10V6K~D

1 2

CI37 0.1U_0402_10V6K~D

USB20_P8<20>

USB3TP3_LUSB3TP3

USB20_N8

USB20_P8

USB3RN3<20>

USB3RP3

USB3RP3<20>

USB3TP3_L

4

1

DLW21SN900SQ2L_0805_4P~D

RI70 0_0402_5%~D@EMI@

RI71 0_0402_5%~D@EMI@

2

3

RI72 0_0402_5%~D@EMI@

RI73 0_0402_5%~D@EMI@

2

3

RI74 0_0402_5%~D@EMI@

4

4

1

LI11

2

3

DLW21SN900HQ2L_0805_4P~D

3

3

2

2

1 2

1 2

EMI@

1

1

4

4

1 2

1 2

LI12

EMI@

1

1

2

4

3

4

DLW21SN900HQ2L_0805_4P~D

1 2

USB20_N8_CONN

USB20_P8_CONN

USB3RN3_RUSB3RN3

USB3RP3_R

USB3TN3_RUSB3TN3_L

USB3TP3_R

USB20_N8_CONN <32>

USB20_P8_CONN <32>

USB3RN3_R <32>

USB3RP3_R <32>

USB3TN3_R <32>

USB3TP3_R <32>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

USB 3.0/2.0 x2 (left side)

USB 3.0/2.0 x2 (left side)

USB 3.0/2.0 x2 (left side)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

35 69Wednesday, March 26, 2014

35 69Wednesday, March 26, 2014

35 69Wednesday, March 26, 2014

0.1

0.1

0.1

A

1 1

B

C

+3VS

RN12 0_0402_5%

1 2

SATA_PTX_DRX_P0<16>
SATA_PTX_DRX_N0<16>

SATA_PRX_DTX_P0<16>
SATA_PRX_DTX_N0<16>

CN9 0.01U_0402_16V7K

1 2

CN10 0.01U_0402_16V7K

1 2

CN11 0.01U_0402_16V7K

1 2

CN12 0.01U_0402_16V7K

RN13 0_0402_5%@

+3VS

RN14 0_0402_5%@

RN15 0_0402_5%@

RN16 0_0402_5%@

1 2
1 2

1 2

1 2

D

Change to TI SA00003ZX00

1 2

SATA_PTX_DRX_P0_C
SATA_PTX_DRX_N0_C

SATA_PRX_DTX_P0_C
SATA_PRX_DTX_N0_C

HDD_B0_PRE1
HDD_A0_PRE1

UN1

7

EN

1

A_INp

2

A_INn

5

B_OUTp

4

B_OUTn

17

B_PRE1

19

A_PRE1

18

TEST

3

GND

13

GND

21

EPAD

PS8520BTQFN20GTR2_TQFN20_4X4

VDD
VDD

REXT

A_PRE0
B_PRE0

A_OUTp
A_OUTn

B_INp
B_INn

6
16

10

NC

20

9
8

15
14

11
12

E

+3VS

CN7

0.01U_0402_16V7K

RN7

4.7K_0402_5%

RN6

4.7K_0402_5%

@

1 2

DEW2
DEW1

HDD_REXT_SATA0

HDD_A0_PRE0
HDD_B0_PRE0

SATA_PTX_DRX_P0_RC
SATA_PTX_DRX_N0_RC SATA_PTX_DRX_N0_R

SATA_PRX_DTX_P0_RC
SATA_PRX_DTX_N0_RC

1

1

2

2

@

1 2

1 2

CN13 0.01U_0402_16V7K

1 2

CN14 0.01U_0402_16V7K

1 2

CN15 0.01U_0402_16V7K

1 2

CN16 0.01U_0402_16V7K

F

RN8

0_0402_5%

CN8

0.1U_0402_25V6K

12

12

RN10

0_0402_5%

RN9

0_0402_5%

12

@

SATA_PTX_DRX_P0_R

SATA_PRX_DTX_P0_R
SATA_PRX_DTX_N0_R

G

RN11

0_0402_5%

12

@

H

SATA Redriver

DEW2

Pin 20:
PARADE PS8250B
Depop RS26

2 2

PERICOM PI3EQX6741ST
Pop RS26
ASMEDIA ASM1466
Pop RS26

+3VS

0.1U_0402_16V4Z~D

10U_0805_10V4Z~D

CN17

CN18

1

1

@

2

2

FFS_INT1<17>

3 3

FFS_INT2<21>

PCH_SMBDATA<14,15,19,8>
PCH_SMBCLK<14,15,19,8>

FFS_INT1 connect to PCH GPIO & EC
discuss with BIOS to use which pin

FFS_INT1
FFS_INT2

PCH_SMBDATA
PCH_SMBCLK

Free Fall Sensor

UN2

LNG3DM

1

14

11

9

7
6
4

8

SSM3K7002FU_SC70-3~D

RES

VDD_IO

RES

VDD

RES
RES

INT 1

GND

INT 2

GND
SDO/SA0
SDA / SDI / SDO
SCL/SPC

NC
NC

CS

LNG3DMTR_LGA16_3X3~D

+3VS

G

2

13

D

S

QN3

10
13
15
16

5
12

2
3

21

DN1
SDM10U45-7_SOD523-2~D

Pin 9:
PARADE PS8250B
Depop RS24
PERICOM PI3EQX6741ST
Depop RS24
ASMEDIA ASM1466
Pop RS24 to pull down

+5VS

12

@

RN24
100K_0402_5%~D

FFS_INT2_CONNFFS_INT2

SATA_PTX_DRX_P0_R
SATA_PTX_DRX_N0_R

SATA_PRX_DTX_N0_R
SATA_PRX_DTX_P0_R

HDD_DET#<21>

PCH no support DEVSLP

DEW1

HDD_B0_PRE0

HDD_B0_PRE1

HDD_A0_PRE1

HDD_A0_PRE0

HDD_REXT_SATA0

+3VS

+5VS

FFS_INT2_CONN

+3VS

1 2

RN17 4.7K_0402_5%@

1 2

RN18 4.7K_0402_5%@

1 2

RN19 0_0402_5%@

1 2

RN20 0_0402_5%

1 2

RN21 0_0402_5%@

1 2

RN22 2K_0402_5%

1 2

RN23 5.1K_0402_1%@

+5VS

1000P_0402_50V7K~D

0.1U_0402_16V4Z~D

1

1

CN1

2

2

@

JHDD1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

G1

22

G2

23

G3

24

G4

STARC_111H20-100000-G2-R

CONN@

Close to JHDD1

0.1U_0402_16V4Z~D

1

1

CN3

CN2

2

2

@

1U_0402_6.3V4Z~D

4.7U_0603_10V

CN4

4.7U_0603_10V

1

CN51

2

1

1

CN52

CN6
47P_0402_50V8J~D

2

2

High Limit, 10U change to 4.7U*2

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

F

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

HDD/ODD

HDD/ODD

HDD/ODD

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-B751P

LA-B751P

LA-B751P

Date: Sheet

Date: Sheet of

Date: Sheet of

G

36 69Wednesday, March 26, 2014

36 69Wednesday, March 26, 2014

36 69Wednesday, March 26, 2014

H

0.1

0.1

0.1

of

5

4

3

2

1

CE59

1 2

1K_0402_1%~D

PM_SLP_S5#<17, 43>

BATT_LOW_LED#<43>

12

10P_0402_50V8J

RE7

+3.3V_F347

+3.3V_F347

1

@RF@

2

22P_0402_50V8J~D

1U_0805_10V7

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

CE1

CE2

1

@

2

USB20_P3<20>
USB20_N3<20>

+3.3V_F347

@

@

CE12 0.1U_0402_16V4Z~D

CE11 0.1U_0402_16V4Z~D

1

1

2

2

2

G

2

G

@

CE13 0.1U_0402_16V4Z~D

1

2

+3.3V_F347

+3.3V_F347

1

2

@

CE14 0.1U_0402_16V4Z~D

1

2

12

100K_0402_5%

1

D

S

3

12

100K_0402_5%

1

D

S

3

CE4

CE3

2

1

UE1

6

USB20_P3
USB20_N3

@

CE16 0.1U_0402_16V4Z~D

CE15 0.1U_0402_16V4Z~D

1

1

2

2

RE16

SLP_S5

QE3
SSM3K7002F_SC59-3~D

RE21

BATT_LOW_LED

QE6
SSM3K7002F_SC59-3~D

4
5

7
8

9

10

18
17
16
15
14
13
12

@

C8051F383-GQ_LQFP32_7X7

@

@

CE17 0.1U_0402_16V4Z~D

CE18 0.1U_0402_16V4Z~D

CPN change to SA00007JF00

1

1

2

2

VDD

D+
D-

REGIN
VBUS

RST#/C2CK
P3.0/C2D

P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.711GND

+3.3V_F347

1 2

+3.3V_F347

12

RE14.7K_0402_5%

12

RE24.7K_0402_5%

I2C_CLK

SPI_MOCLK_R

MAXIM - LED
MAXIM - GPIO
I2C EEPROM

+3.3V_F347 behavior

AC mode battery full in S5:turn off ELC controller

+3VS

12

@RF@

CE57

10P_0402_50V8J

SPI_MOSO

AC IN
BATT only

CE58

10P_0402_50V8J

12

@RF@

SMBUS ADDRESSDEVICE

0100 000b
0100 001b
1010 000b

S0ONS3
ON

ON
ON

S4
ON
OFF

S5
ON
OFF

place RE5 as close as UE1

RE3
0_0603_5%

1 2

1 2
1 2

1 2

+3.3V_F347

SDMK0340L-7-F_SOD323-2~D

+3.3V_F347

SPI_MOCLK_R

I2C_DAT <38,40,41>

I2C_CLK <38,40,41>

CALDERA_PRSNT# <41,43>

12

RE810K_0402_5%

12

LID_SW_IN#

DE1

SPI_MOSI

SPI_MOCLK_R

1 2

RE12 10K_0402_5%~D

1 2

RE13 10K_0402_5%~D

1 2

RE14 10K_0402_5%~D

+3.3V_F347

CE22

4.7U_0805_10V4Z

3V_F347_ON<43>

SPI_MOCS#

+3VALW

1

2

+3.3V_F347

0.1U_0402_16V4Z~D

CE19

1

2

2

P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7

P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7

SPI_MOCLK

1

SPI_MOSO

32

SPI_MOSI

31

SPI_MOCS#

30

I2C_DAT

29

I2C_CLK

28

CALDERA_PRSNT#

27

RE6 1K_0402_5%

26

SLP_S3

25

BATT_CHG_LED

24

ACIN#

23

LID_SW_IN#_D

22

BATT_LOW_LED

21

SLP_S5

20

CE8 0.1U_0402_16V4Z~D@

19

CE9 0.1U_0402_16V4Z~D@

3

LID_SW_IN# <19,38,43>

UE2

12

5

RE915_0402_5%

12

6

RE1115_0402_5%

1

7

3

8

22P_0402_50V8J~D

EN25Q80A-100HIP_SO8

1

CE20

2

2

JUMP_43X118

UE9

5

IN

4

EN

SY6288C20AAC_SOT23-5

DI

CLK

CS

HOLD

WP

VCC

I2C_DAT

I2C_CLK

J2

2

SO

4

VSS

@

112

1

OUT

2

GND

3

OC

RE10 15_0402_5%

1 2

RE20 10K_0402_5%

D D

1 2

RE4 0_0603_5%~D

+5VALW

+5VS

C C

Cloase to JP1

PM_SLP_S3#<17, 43>

SIO_SLP_S3# change to PM_SLP_S3#

B B

ACIN<17,43,59>

BATT_CHG_LED#<43>

A A

+3.3V_F347

1

2

RE5 0_0603_5%~D@

0.1U_0402_16V4Z

CE10

@

1 2

+3.3V_F347

2

G

+3.3V_F347

2

G

+3.3V_F347

2

G

12

@RF@

CE60

10P_0402_50V8J

12

RE15

100K_0402_5%

SLP_S3

1

D

QE1
SSM3K7002F_SC59-3~D

S

3

12

RE17

100K_0402_5%

ACIN#

1

D

QE4
SSM3K7002F_SC59-3~D

S

3

12

RE23

100K_0402_5%

BATT_CHG_LED

1

D

QE7
SSM3K7002F_SC59-3~D

S

3

1U_0805_10V7

CE6

1

2

JELC1

GND1
GND2

AMPHE_G846A06201EU

CONN@

W=40mils

+3.3V_F347

0.1U_0402_16V4Z~D

1

@

2

1
2
3
4
5
6

CE7

1
2
3
4
5
6

7
8

SIO_SLP_S5# change to PM_SLP_S5#

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

ELC (1)

ELC (1)

ELC (1)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

37 69Wednesday, March 26, 2014

37 69Wednesday, March 26, 2014

37 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

4

3

2

1

MAX7313 change to TI TLC59116F PWM expander

AD3 AD2 AD1 AD1
0 0 1 1

12

UE3

24

RESET

25

I2C_CLK

SCL

26

I2C_DAT

SDA

31

AD0_2

A0

32

AD1_2

A1

1

AD2_2

A2

2

AD3_2

A3

12

N.C.

13

N.C.

28

N.C.

29

N.C.

30

N.C.

7

GND

18

GND

TLC59116FIRHBR_VQFN32_5X5

For IND/TP/HDD/PWR

AD3 AD2 AD1 AD0
0 1 0 0

UE8

24

RESET

25

I2C_CLK
I2C_DAT

34

61

34

SCL

26

SDA

31

AD0

A0

32

AD1

A1

1

AD2

A2

2

AD3

A3

12

N.C.

13

N.C.

28

N.C.

29

N.C.

30

N.C.

7

GND

18

GND

TLC59116FIRHBR_VQFN32_5X5

HDD_B

QE13B

DMN66D0LDW-7_SOT363-6~D

HDD_B_7313#

HDD_R

QE13A

DMN66D0LDW-7_SOT363-6~D

HDD_R_7313#

HDD_G

QE12B

DMN66D0LDW-7_SOT363-6~D

HDD_G_7313#

OUT10
OUT11
OUT12
OUT13
OUT14
OUT15

ON/OFF switch

ON/OFF switch power button
Bottom Side pop only before MP

Vcc

OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8

OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15

GND
GND

Vcc

OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9

GND
GND

TOP Side

1

2

Bottom Side

1

2

+3.3V_F347

1

CE24

0.1U_0402_16V4Z

ALIEN_LED_R_DRV#
ALIEN_LED_G_DRV#
ALIEN_LED_B_DRV#
LOGO_LED_R_DRV#
LOGO_LED_G_DRV#
LOGO_LED_B_DRV#
LED_R_7313#_A#
LED_G_7313#_A#
LED_B_7313#_A#
PWR_R_7313#
PWR_G_7313#
PWR_B_7313#
HDD_R_7313#
HDD_G_7313#
HDD_B_7313#

+3.3V_F347

2

1

CE53

0.1U_0402_16V4Z

2

27

3
4
5
6
8
9
10
11
14
15
16
17
19
20
21
22

23
33

27

3

TP_LED_R#

4

TP_LED_G#

5

TP_LED_B#

6

LTRON_LED_R_DRV#

8

LTRON_LED_G_DRV#

9

LTRON_LED_B_DRV#

10

RTRON_LED_R_DRV#

11

RTRON_LED_G_DRV#

14

RTRON_LED_B_DRV#

15

KB_LED_R5_DRV#

16

KB_LED_G5_DRV#

17

KB_LED_B5_DRV#

19
20
21
22

23
33

Power ON Circuit

SW2
SMT1-05-A_4P

3

4

5

6

SW1
SMT1-05-A_4P

3

4

5

6

4

LTRON_LED_R_DRV# <39>
LTRON_LED_G_DRV# <39>
LTRON_LED_B_DRV# <39>
RTRON_LED_R_DRV# <39>
RTRON_LED_G_DRV# <39>
RTRON_LED_B_DRV# <39>
KB_LED_R5_DRV# <39>
KB_LED_G5_DRV# <39>
KB_LED_B5_DRV# <39>

To Hot Key

+3VLP

RE63
100K_0402_5%

1 2

ON/OFFBTN# <43>

1

CE27

0.1U_0402_16V7K

2

+3VALW

PWR_LED#<43>

RT4
0_0603_5%

1 2

RT5
0_0603_5%

1 2

+3VS

@

TP_EN<43>

+3VALW

2

@

CT4
1U_0402_6.3V6K

1

TP_LED_EN< 43> NumLock LED_A#<43>

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

4.7K_0402_1%

I2C_CLK<37,38,40,41>

I2C_DAT<37,38,40,41>

4.7K_0402_1%

I2C_CLK<37,38,40,41>

I2C_DAT<37,38, 40,41>

12

1

D

S

3

+3.3V_F347

RE25

12

RE31
10K_0402_5%~D

+3.3V_F347

12

RE45

RE41
10K_0402_5%~D

5

2

5

QE14
SSM3K7002F_SC59-3~D

+3.3V_F347

12

4.7K_0402_1%

RE33

RE40

RE42

12

RE35

2

12

+3.3V_F347

12

+5VS

12

RE43

4.7K_0402_1%~D

12

RE44

4.7K_0402_1%~D

12

12

RE344.7K_0402_1%

RE36

4.7K_0402_1%

100K_0402_5%

12

RE39

SATA_LED_ACT

61

QE12A

DMN66D0LDW-7_SOT363-6~D

LID_SW

5

2

G

D D

4.7K_0402_1%~D

4.7K_0402_1%~D

C C

4.7K_0402_1%

B B

PCH_SATALED#<16>

A A

Power LED

2

G

+5VALW

100K_0402_5%

12

RE28

1

D

QE9
SSM3K7002F_SC59-3

S

3

SY6288C20AAC_SOT23-5

5

4

Power_LED

UT1

IN

EN

OUT

GND

OC

QE8

2

+5VALW

G

1

2

3

1 3

1 2

10K_0402_5%

S

LP2301ALT1G 1P SOT-23-3

D

+5VALW_LED

RT11

For TouchPAD

B+_BIAS +5VS +5VS_TP_LED

300K_0402_5%~D

R2456

1 2

EN_TPLED

SSM3K7002FU_SC70-3~D

13

D

2

G

Q2410

S

SI3456DDV-T1-GE3_TSOP6~D

6

0.1U_0402_16V4Z

2
1

C29

1

2

1.5M_0402_5%~D

12

Touchpad LED circuit

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Issued Date

Issued Date

Issued Date

2014/2/11 2014/2/11

2

LID_SW_IN#

+5VS

Q2409

D

S

45

G

3

0.1U_0402_25V6K~D

R2457

1

C2509

@

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

G

2

+5VALW

D

S

1

2

1

2

12

CT2

RE38
100K_0402_5%

LID_SW

1

QE10
SSM3K7002F_SC59-3

3

+3VS_TOUCH+V_TP

1

2

2200P_0402_25V7K

1U_0603_10V4Z~D

C2508

W=20mils

LID_SW
LOGO_LED_R_DRV#
LOGO_LED_G_DRV#
LOGO_LED_B_DRV#

ALIEN_LED_R_DRV#
ALIEN_LED_G_DRV#
ALIEN_LED_B_DRV#

CT3

+3VS_TOUCH

0.1U_0402_10V6K

RT17
100K_0402_5%

1 2

+5VS

0.1U_0402_16V4Z

CE23

1

+5VALW +5VALW

2

JLOGO1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

GND

14

GND

ACES_50208-01201-P01_12P

CONN@

0.1U_0402_16V4Z

CE26

1

2

Logic up LED board

C17

0.1U_0402_16V4Z

+5VS_TP_LED

+3VS_TOUCH

+5VS

+5VALW_LED

+3VALW

TP_INT#<43>

TP_+<69>
TP_-<69>

PTP_DISABLE#<43>

PTP_KBBL#<43>
LID_SW_IN#<19,37,43>

CAPS_LED#<43>
WLES ON/OFF LED#<28>

Title

Title

Title

ELC (2)/TP/PWR SW

ELC (2)/TP/PWR SW

ELC (2)/TP/PWR SW

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1 2

TP_INT#TP_INT#
TP_LED_R#
TP_LED_G#
TP_LED_B#
LED_R_7313#_A#
LED_G_7313#_A#
LED_B_7313#_A#
HDD_R
HDD_G
HDD_B
PWR_R_7313#
PWR_G_7313#
PWR_B_7313#

TP_+
TP_-

PTP_DISABLE#
PTP_KBBL#
LID_SW_IN#
ON/OFFBTN#
CAPS_LED#

WLES ON/OFF LED#

NumLock LED_A#

Change Symbol OK
2/18 -Tarry

Compal Electronics, Inc.

1

JPWR1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

STARC_107K30-000001-G2

CONN@

GND1
GND2
GND3
GND4
GND5
GND6

38 69Wednesday, March 26, 2014

38 69Wednesday, March 26, 2014

38 69Wednesday, March 26, 2014

31
32
33
34
35
36

0.1

0.1

0.1

A

B

C

D

E

INT_KBD Conn.

KSI[0..7]

KSO[0..17]

1 1

KB_DET#<21>

Net follow Ranger.
Only Pin26 add KSO16

2 2

RTRON_LED_R_DRV#<38>
RTRON_LED_G_DRV#<38>
RTRON_LED_B_DRV#<38>
LTRON_LED_R_DRV#<38>
LTRON_LED_G_DRV#<38>
LTRON_LED_B_DRV#<38>

+5VS

0.1U_0402_16V4Z

C27

1

2

RTRON_LED_R_DRV#
RTRON_LED_G_DRV#
RTRON_LED_B_DRV#
LTRON_LED_R_DRV#
LTRON_LED_G_DRV#
LTRON_LED_B_DRV#

JTRONF

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

GND

14

GND

ACES_50208-01201-P01

CONN@

KB_DET#
KSO7
KSO0
KSI1
KSI7
KSO9
KSI6
KSI5
KSO3
KSI4
KSI2
KSO1
KSI3
KSI0
KSO13
KSO5
KSO2
KSO4
KSO8
KSO6
KSO11
KSO10
KSO12
KSO14
KSO15
KSO16
KSO17

GND

Symbol Leverage Echo13
2/18 -Tarry

TRON LED Board (F) CONN

KSI[0..7] <43>

KSO[0..17] <43>

ACES_50552-03001-001

3030GND

29

29

28

28

27

27

26

26

25

25

24

24

23

23

22

22

21

21

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

JKB1

CONN@

GND

31
32

+3VS

12

R148

100K_0402_5%

KB_LED_R5_DRV#<38>

KB_LED_G5_DRV#<38>

KB_LED_B5_DRV#<38>

KB_LED_R5_DRV#

R152

100K_0402_5%

KB_LED_G5_DRV#

R172

100K_0402_5%

KB_LED_B5_DRV#

+3VS

12

+3VS

12

+3VS

12

R149

100K_0402_5%

KB_LED_R5_DRV

34

D

G

5

S

Q2411A
DMN66D0LDW-7_SOT363-6

+3VS

12

R153

100K_0402_5%

KB_LED_G5_DRV

34

D

G

5

S

Q2412A
DMN66D0LDW-7_SOT363-6

+3VS

12

R173

100K_0402_5%

KB_LED_B5_DRV

34

D

G

5

S

Q2413A
DMN66D0LDW-7_SOT363-6

KB_LED_R5_DRV#_A#

61

D

G

2

S

Q2411B
DMN66D0LDW-7_SOT363-6

KB_LED_G5_DRV#_A#

61

D

G

2

S

Q2412B
DMN66D0LDW-7_SOT363-6

KB_LED_B5_DRV#_A#

61

D

G

2

S

Q2413B
DMN66D0LDW-7_SOT363-6

3 3

+5VS +5VS

0.1U_0402_16V4Z

C30

1

2

LTRON_LED_R_DRV#
LTRON_LED_G_DRV#
LTRON_LED_B_DRV#

JTRONL

1

1

2

2

3

3

4

4

5

5

6

6

7

GND

8

GND

ACES_50208-00601-P01

CONN@

0.1U_0402_16V4Z

C31

1

2

RTRON_LED_R_DRV#
RTRON_LED_G_DRV#
RTRON_LED_B_DRV#

JTRONR

1

1

2

2

3

3

4

4

5

5

6

6

7

GND

8

GND

ACES_50208-00601-P01

CONN@

Hot Key Conn.

PWM

Change Symbol OK
2/18 -Tarry

+5VS

KB_LED_R5_DRV#_A#
KB_LED_G5_DRV#_A#
KB_LED_B5_DRV#_A#

JKB3

CONN@

10

G4

9

G3

8

G2

7

G1

6

6 6

5

5

4

4 4

3

3

2

2 2

1

1

ACES_87153-06411

Hot Key Conn.
Key Pad

KP_DET#<43>

KP_DET#
KSO16
KSI0
KSI5
KSI1
KSI4
KSI2
KSI3
GND
GND

JKB2

ACES_50611-0100N-001_10P

112
334
556
778
9910
111112
131314
151516
171718
191920

CONN@

2

KP_DET#

4

KSO16

6

KSI0

8

KSI5

10

KSI1

12

KSI4

14

KSI2

16

KSI3

18

GND

20

GND

TRON LED Board (R) CONNTRON LED Board (L) CONN

4 4

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

B

C

D

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

KB/HotKey conn

KB/HotKey conn

KB/HotKey conn

LA-B751P

LA-B751P

LA-B751P

E

0.1

0.1

39 69Wednesday, March 26, 2014

39 69Wednesday, March 26, 2014

39 69Wednesday, March 26, 2014

0.1

5

4

3

2

1

+3VS

12

R146

100K_0402_5%

D D

+3.3V_F347

12

RE26

4.7K_0402_1%~D

12

RE29

4.7K_0402_1%~D

C C

+3.3V_F347

12

RE32

4.7K_0402_1%

I2C_CLK<37,38,41>
I2C_DAT<37,38,41>

12

I2C_CLK
I2C_DAT

AD0_1

12

RE274.7K_0402_1%

RE304.7K_0402_1%

12

RE37
10K_0402_5%

K/B Backlight

AD3 AD2 AD1 AD0
0 0 1 0

UE4

24

RESET

25

SCL

26

SDA

31

A0

32

AD1_1
AD2_1
AD3_1

A1

1

A2

2

A3

12

N.C.

13

N.C.

28

N.C.

29

N.C.

30

N.C.

7

GND

18

GND

OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8

OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15

GND
GND

Vcc

27

3
4
5
6
8
9
10
11
14
15
16
17
19
20
21
22

23
33

+3.3V_F347

KB_LED_R1_DRV#
KB_LED_G1_DRV#
KB_LED_B1_DRV#
KB_LED_R2_DRV#
KB_LED_G2_DRV#
KB_LED_B2_DRV#
KB_LED_R3_DRV#
KB_LED_G3_DRV#
KB_LED_B3_DRV#
KB_LED_R4_DRV#
KB_LED_G4_DRV#
KB_LED_B4_DRV#

1

CE25

0.1U_0402_16V4Z

2

TLC59116FIRHBR_VQFN32_5X5

KB_LED_R1_DRV#

R154

100K_0402_5%

KB_LED_G1_DRV#

R158

100K_0402_5%

KB_LED_B1_DRV#

+3VS

12

+3VS

12

12

R144

100K_0402_5%

KB_LED_R1_DRV

34

D

G

5

S

Q28A
DMN66D0LDW-7_SOT363-6

+3VS

12

R150

100K_0402_5%

KB_LED_G1_DRV

34

D

G

5

S

Q29A
DMN66D0LDW-7_SOT363-6

+3VS

12

R156

100K_0402_5%

KB_LED_B1_DRV

34

D

G

5

S

Q30A
DMN66D0LDW-7_SOT363-6

KB_LED_R1_DRV#_A#

61

D

G

2

S

Q28B
DMN66D0LDW-7_SOT363-6

KB_LED_G1_DRV#_A#

61

D

G

2

S

Q29B
DMN66D0LDW-7_SOT363-6

KB_LED_B1_DRV#_A#

61

D

G

2

S

Q30B
DMN66D0LDW-7_SOT363-6

R147

100K_0402_5%

KB_LED_R3_DRV#

R155

100K_0402_5%

KB_LED_G3_DRV#

R159

100K_0402_5%

KB_LED_B3_DRV#

+3VS

12

+3VS

12

+3VS

12

+3VS

+3VS

+3VS

12

R162

100K_0402_5%

Check Pin define

+5VS

KB_LED_R1_DRV#_A#
KB_LED_G1_DRV#_A#
KB_LED_B1_DRV#_A#

B B

KB_LED_R2_DRV#_A#
KB_LED_G2_DRV#_A#
KB_LED_B2_DRV#_A#
KB_LED_R3_DRV#_A#
KB_LED_G3_DRV#_A#
KB_LED_B3_DRV#_A#
KB_LED_R4_DRV#_A#
KB_LED_G4_DRV#_A#
KB_LED_B4_DRV#_A#

JKBBL1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

ACES_50552-02001-001

CONN@

GND
GND

21
22

KB_LED_R2_DRV#

100K_0402_5%

KB_LED_G2_DRV#

R166

+3VS

12

12

R160

100K_0402_5%

KB_LED_R2_DRV

34

D

G

5

S

Q31A
DMN66D0LDW-7_SOT363-6

+3VS

12

R164

100K_0402_5%

KB_LED_G2_DRV

34

D

G

5

S

Q32A
DMN66D0LDW-7_SOT363-6

KB_LED_R2_DRV#_A#

61

D

G

2

S

Q31B
DMN66D0LDW-7_SOT363-6

KB_LED_G2_DRV#_A#

61

D

G

2

S

Q32B
DMN66D0LDW-7_SOT363-6

KB_LED_R4_DRV#

KB_LED_G4_DRV#

R163

100K_0402_5%

R167

100K_0402_5%

+3VS

12

+3VS

12

+3VS

Symbol OK（Leverage Echo13

KB BL LED

2/18 -Tarry

）

100K_0402_5%

R170

+3VS

12

KB_LED_B2_DRV#

A A

12

R168

100K_0402_5%

KB_LED_B2_DRV

34

D

G

5

S

Q33A
DMN66D0LDW-7_SOT363-6

KB_LED_B2_DRV#_A#

61

D

G

2

S

Q33B
DMN66D0LDW-7_SOT363-6

R171

100K_0402_5%

KB_LED_B4_DRV#

+3VS

12

+3VS

12

R145

100K_0402_5%

KB_LED_R3_DRV

34

D

G

5

S

Q34A
DMN66D0LDW-7_SOT363-6

+3VS

12

R151

100K_0402_5%

KB_LED_G3_DRV

34

D

G

5

S

Q35A
DMN66D0LDW-7_SOT363-6

+3VS

12

R157

100K_0402_5%

KB_LED_B3_DRV

34

D

G

5

S

Q36A
DMN66D0LDW-7_SOT363-6

+3VS

12

R161

100K_0402_5%

KB_LED_R4_DRV

34

D

G

5

S

Q37A
DMN66D0LDW-7_SOT363-6

+3VS

12

R165

100K_0402_5%

KB_LED_G4_DRV

34

D

G

5

S

Q38A
DMN66D0LDW-7_SOT363-6

+3VS

12

R169

100K_0402_5%

KB_LED_B4_DRV

34

D

G

5

S

Q39A
DMN66D0LDW-7_SOT363-6

KB_LED_R3_DRV#_A#

61

D

G

2

S

Q34B
DMN66D0LDW-7_SOT363-6

KB_LED_G3_DRV#_A#

61

D

G

2

S

Q35B
DMN66D0LDW-7_SOT363-6

KB_LED_B3_DRV#_A#

61

D

G

2

S

Q36B
DMN66D0LDW-7_SOT363-6

KB_LED_R4_DRV#_A#

61

D

G

2

S

Q37B
DMN66D0LDW-7_SOT363-6

KB_LED_G4_DRV#_A#

61

D

G

2

S

Q38B
DMN66D0LDW-7_SOT363-6

KB_LED_B4_DRV#_A#

61

D

G

2

S

Q39B
DMN66D0LDW-7_SOT363-6

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

ELC(3)

ELC(3)

ELC(3)

LA-B751P

LA-B751P

LA-B751P

1

0.1

0.1

40 69Wednesday, March 26, 2014

40 69Wednesday, March 26, 2014

40 69Wednesday, March 26, 2014

0.1

5

D D

4

3

2

1

PCIE_CLK_BUFFER

+3VS

12

@

12

CLK_PEG_GPU_UM4
CLK_PEG_GPU#_UM4

1

CM18

2

0.1U_0402_10V7K

0.1U_0402_10V7K

RM19

4.7K_0402_5%

BUF_CLK+
BUF_CLK1

1

CM20

2

UM4

1

PLL_BW_S EL

2

SRCIN

3

SRCIN#

4

OE_0#

5

VDD

6

GND

7

CLK0

8

CLK0#

9

VDD

10

SDATA

PI6CEQ20200LIEX

VDDA
GNDA

OE_1#

VDD
GND

CLK1

CLK1#

VDD

SCLK

20
19
18

IRef

17
16
15
14
13
12
11

EC

控控

PIN
PCI_SMCLK
PCI_SMDAT
USB_PWR_EN#
DOCKING_LED ON#

1 2

CLK_PCIE_DGPU<18>
CLK_PCIE_DGPU#<18>
CLKREQ#_GPU<18,46>

CLK_PEG_GPU<18,46>
CLK_PEG_GPU#<18,46>

DK4 RB751V-40_SOD323-2

CLK_PEG_GPU
CLK_PEG_GPU#

RM22 0_0402_5%

1 2

RM24 0_0402_5%

CLKREQ#_GPU

12

CLKREQ#_DGPU

1 2

RM43 0_0402_5%

1 2

RM44 0_0402_5%

RM21
1K_0402_1%

+3VS +3VS

DOCKING_LED OFF#
DOCK_PSID
DOCK_ACIN

C C

DOCK_EN

+3VS

1

CM16

CM17

2

0.1U_0402_10V7K

0.1U_0402_10V7K

RM27 33_0402_1%
RM28 33_0402_1%

CM21

1U_0402_6.3V

12

12

12
12

RM25 475_0402_1%

CLKREQ#_DGPU

1

RM18

2.2_0402_1%

2

RM29

49.9_0402_1%

+3VS

12

12

CM19
22U_0603_6.3V6M

CLKREQ#_DGPU <18,43>

CLK_PCIE_DGPU_C
CLK_PCIE_DGPU#_C

RM38

49.9_0402_1%

12

12

PRSNT#_R

@

@

RM30

1 2

RM35

2.2K_0402_5%

1 2

BUF_SM_DAT

BUF_SM_CLK

2.2K_0402_5%

1 2

SML0DATA<19>

SML0CLK<19>

RM37 0_0402_5%

1 2

RM36 0_0402_5%

+3VALW

+3VALW

12

RM5
10K_0402_5%

CDRA_LED WHITE <43>
CDRA_LED RED <43>

4

12

@

RM41
1K_0402_1%

12

@

RM42
10M_0402_5%

CALDERA_ ON <43>

CALDERA_ PWRGD <43>

CALDERA_PRSNT# <37,43>

BUTTON# <43>

RM17
10K_0402_5%

1 2

I2C_CLK <37,38,40>

I2C_DAT <37,38,40>

USB20_P2_CONN

USB20_N2_CONN

PEG_HTX_C_GRX_P[8..11] <7>
PEG_HTX_C_GRX_N[8..11] <7>

PEG_GTX_HRX_P[8..11] <7>
PEG_GTX_HRX_N[8..11] <7>

USB3RP5_R

USB3RN5_R

DLW21SN900HQ2L_0805_4P

USB3TP5_R

USB3TN5_R

DLW21SN900HQ2L_0805_4P

3

3

2

2

WCM-2012HS-900T_4P

3

Caldera

12

RI750_0402_5%

LI13

@EMI@

1

1

4

4

1

1

4

4

EMI@

LM1

4

4

1

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

@EMI@

USB20_P2

USB20_N2

12

12

LI14

2

3

12

2

USB3RP5_L

2

3

USB3RN5_L

3

RI760_0402_5%

RI770_0402_5%

2

USB3TP5

3

USB3TN5

RI780_0402_5%

USB20_P2 <20>

USB20_N2 <20>

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

USB3TP5 <20>

USB3TN5 <20>

Compal Secret Data

Compal Secret Data

Compal Secret Data

Follow Echo 13 design.

USB3RP5_L USB3RP5

CDRA_RST#

TC7SH08FU_SSOP5

Deciphered Date

Deciphered Date

Deciphered Date

2

12

USB3RN5USB3RN5_L

CI380.1U_0402_10V6K

12

CI390.1U_0402_10V6K

1

CM23

2

@

0.1U_0402_10V7K

4

UM3

USB3RN5 <20>
USB3RP5 <20>

+3VALW

12

RM6

5

P

B

O

A

G

3

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

10K_0402_5%

1

2

USB3.0

USB3.0

USB3.0

LA-B751P

LA-B751P

LA-B751P

CALDERA_RST# <43>

PCH_PLTRST# <17,46>

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

41 69Wednesday, March 26, 2014

41 69Wednesday, March 26, 2014

41 69Wednesday, March 26, 2014

0.1

0.1

0.1

Caldera connector

JCDRA

Caldera_PWRGD

B B

CALDERA_PRSNT #

A A

TE_2260531-1

CONN@

Symbol OK（Leverage Echo13
2/18 -Tarry

5

Caldera_ON

GND

GND

GND

GND

GND

GND

PLTRST#

GND

BUTTON#

LED_WHITE

LED_RED

GND

GND

REFCLK+

REFCLK-

GND

SSTX+

SSTX-

GND

USBD+

USBD-

GND

SSRX+

SSRX-

GND

I2C_CLK

I2C_DATA

GND
GND
GND
GND

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

PEG_HTX_C_GRX_P8
PEG_HTX_C_GRX_N8

PEG_HTX_C_GRX_P9
PEG_HTX_C_GRX_N9

PEG_HTX_C_GRX_P10
PEG_HTX_C_GRX_N10

PEG_HTX_C_GRX_P11
PEG_HTX_C_GRX_N11

PEG_GTX_HRX_P8
PEG_GTX_HRX_N8

PEG_GTX_HRX_P9
PEG_GTX_HRX_N9

CDRA_RST#

PEG_GTX_HRX_P10
PEG_GTX_HRX_N10

BUTTON#
CDRA_LED WHITE
CDRA_LED RED

PEG_GTX_HRX_P11
PEG_GTX_HRX_N11

CLK_PCIE_DGPU_C
CLK_PCIE_DGPU#_C

USB3RN5_R
USB3RP5_R

USB20_P2_CONN
USB20_N2_CONN

USB3TN5_R
USB3TP5_R

CDRA_CLK
CDRA_DAT

1 2

RM15 0_0402_5%

1 2

RM16 0_0402_5%

T0+

T0-

T1+

T1-

T2+

T2-

T3+

T3-

R0+

R0-

R1+

R1-

R2+

R2-

R3+

R3-

）

5

4

3

2

1

+VGA_CORE thermal sensor

1

CF2

@

2200P_ 0402_2 5V7K

2

D D

Diode circuit s used for +VGA_CORE sensor

@

C C

C

2

B

E

QF1

3 1

MMBT3904 WT1G_ SC70-3

SKIN

Diode circuit s used for skin temp sensor
(placed around DIMM).
Place C43 close to Q19as possible.

CF7
2200P_ 0402_2 5V7K

C

E

3 1

MMBT3904 WT1G_ SC70-3 ~D

1

2

REMOTE1 +_2

1

CF3
2200P_ 0402_2 5V7K

2

REMOTE1 -_2

REMOTE2 +_2

2

B

QF2

1

CF8
2200P_ 0402_2 5V7K

2

REMOTE2 -_2

+3VS

+3VS +3VS

1

REMOTE1-_2

C2499

0.1U_040 2_10V6 K

EC_SMB_ CK1_R

EC_SMB_ DA1_R

REMOTE2+_2

2

REMOTE2-_2

12

12

RF8

RF7

2.2K_0402_5%~D

DMN66D0L DW-7

2nd source
SA000029210-->EMC1403-2-AIZL-TR

2.2K_0402_5%~D

U2409

1

VDD

SMCLK

2

DP1

SMDATA

3

DN1

ALERT#

4

DP2/DN3

THERM#

5

DN2/DP3

F75303 M_MSOP10

Address 1001_101xb

+3VS

2

QF3A

354

QF3B

DMN66D0L DW-7

12

R2449
10K_04 02_5%

@

10

EC_SMB_CK1_R

9

EC_SMB_DA1_RREMOTE1+_2

8

7

6

GND

CPU_FAN_ PWM<43>
CPU_FAN_ FB<43>

+3VS

10K_0402_5%

1 2

CPU FAN Control circuit

+3VS

10K_0402_5%

61

EC_SMB_ CK1 <4 3,58,59 >

EC_SMB_ DA1 <4 3,58,59 >

GPU_FAN_ PWM<43>
GPU_FAN_ FB<43>

1 2

GPU FAN Control circuit

10K_0402_5%

RF2

RF1

1 2

DF1

SDMK034 0L-7-F_S OD323 -2

10K_0402_5%

RF4

RF5

1 2

DF2

SDMK034 0L-7-F_S OD323 -2

+5VS

22U_0805_6.3VAM

CF4

1

10K_0402_5%

RF3

2

1 2

JFAN1

1

1

2

2

3

12

3

4

4

5

G5

6

G6

ACES_5 0273-00 401-00 1

CONN@

+5VS

22U_0805_6.3VAM

CF5

1

10K_0402_5%

RF6

2

1 2

JFAN2

1

1

2

2

12

3

3

4

4

5

G5

6

G6

ACES_5 0273-00 401-00 1

CONN@

Fintek thermal sensor-> CPU core, DIMM

+3VS +3VS

U2407

1

VDD

2

REMOTE1+

1

C2498

0.1U_040 2_10V6 K

2

Close U2407

1

C2502

2200P_ 0402_2 5V7K

C2504

2200P_ 0402_2 5V7K

2

1

2

B B

DP1

3

REMOTE1-

DN1

4

REMOTE2+

DP2/DN3

5

REMOTE2-

DN2/DP3

F75303 M_MSOP10

Address 1001_101xb

2nd source
SA000029210-->EMC1403-2-AIZL-TR

REMOTE1+

REMOTE1+

REMOTE1-

REMOTE2+

REMOTE2-

@

2200P_ 0402_2 5V7K

REMOTE1-

REMOTE2+

@

2200P_ 0402_2 5V7K

REMOTE2-

12

R2448
10K_04 02_5%

@

10

EC_SMB_CK2

SMCLK

9

EC_SMB_DA2

SMDATA

8

ALERT#

7

THERM#

6

GND

BOTTOM DDR3

1

12

C

2

Q2407

C2500

B

MMST3904 -7-F_SOT 323-3

E

3

BOTTOM CPU

12

1

C

2

C2505

Q2408

B

MMST3904 -7-F_SOT 323-3

E

3

EC_SMB_ CK2 <19,43,46>

EC_SMB_ DA2 <19,43,46>

REMOTE1,2 (+/-) :
Trace width/space:10/10 mil
Trace length:<8"

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

FAN/TP/PWR SW

FAN/TP/PWR SW

FAN/TP/PWR SW

Size Document Numb er Rev

Size Document Numb er Rev

Size Document Numb er Rev

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

42 69W ednesday, Marc h 26, 2014

42 69W ednesday, Marc h 26, 2014

42 69W ednesday, Marc h 26, 2014

0.1

0.1

0.1

5

+3VALW

1

CE29

D D

PLT_RST#

CE34

0.047U_0402_16V4Z

Place CC30
close to RC51.1

+3VALW

C C

+3VALW_EC

+3VS

B B

12

RE99 100K_0402_5%

1 2

RE79 10K_0402_5%

1 2

RE70 10K_0402_5%

1 2

RE93 4.7K_0402_5%

1 2

RE94 4.7K_0402_5%

+3VALW_EC

RE75 10K_0402_5%

RE80 10K_0402_5%

RE83 10K_0402_5%

Reserve for ESD

CE41

0.1U_0402_10V7K

CE45

0.1U_0402_10V7K

Please close to EC

VR_HOT#<65>

H_PROCHOT#<58,59,8>

A A

1

ESD@

2

@EMI@

CE36

0.1U_0402_10V7K

12

RE68 47K_0402_5%

+3VALW

CE37 0.1U_0402_10V7K

USB_IN_STATUS#

EN_WOL#

LID_SW_IN#

EC_ESB_CLK

EC_ESB_DAT

RE90

45

EC_SMB_CK1

36

EC_SMB_DA1

27

EC_SMB_CK2

18

PCH_PWROK

EN_INVPWR

3V_F347_ON

PM_SLP_S3#

PM_SLP_S5#

VR_HOT#

H_PROCHOT#

CE51

47P_0402_50V8J

EC_SMB_DA2

RE78

0_0402_5% @

5

1 2

1

2

2.2K_0804_8P4R_5%

12

12

12

SIO_SLP_S3# change to PM_SLP_S3#

12

ESD@

SIO_SLP_S5# change to PM_SLP_S5#

12

ESD@

@EMI@

RE89
0_0402_5%

1 2

12

12

+3VS

5

UE7

P

Y4A

G3NC

1

SN74LVC1G06DCKR_SC70-5

0.1U_0402_10V7K

2

"TOUCH_RST" for OAK 15 only

KSI[0..7]<39>

KSO[0..17]<39>

ME_SUS_PWR_ACK<17>

NumLock LED_A#<38> LID_SW_IN# <19,37,38>

KB9012A3 change to
KB9012A4 SA00004OB30

0.1U_0402_10V7K

CE50

1

2

2

VCOUT1_PH

RE82
100K_0402_5%

1 2

1

CE30

0.1U_0402_10V7K

2

SERIRQ<19>

LPC_FRAME#<19>

LPC_AD3<19>
LPC_AD2<19>
LPC_AD1<19>
LPC_AD0<19>

CLK_PCI_LPC<18>

PLT_RST#<17,28,30,31,44>

EC_SCI#<21>

PM_SLP_SUS#<17>

KSI[0..7]

KSO[0..17]

EC_SMB_CK1<42,58,59>
EC_SMB_DA1<42,58,59>
EC_SMB_CK2<19,42,46>
EC_SMB_DA2<19,42,46>

PM_SLP_S3#<17,37>
PM_SLP_S5#<17,37>

EC_SMI#<21>

PS_ID<58>

CLKREQ#_DGPU<18,41>

TP_LED_EN<38>

CPU_FAN_FB<42>
GPU_FAN_FB<42>

EC_TX<28>

EC_RX<28>

PCH_PWROK<17>

+1.05V_PGOOD<62>

KP_DET#<39>

ME_FWP PCH has internal 20K PD.
(suspend power rail)

KB_RST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

CLK_PCI_LPC
PLT_RST#

EC_RST#
EC_SCI#
PM_SLP_SUS#

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
PS_ID
EC_ESB_CLK
EC_ESB_DAT
CLKREQ#_DGPU

CPU_FAN_FB
GPU_FAN_FB
EC_TX
EC_RX
PCH_PWROK

4

2

@EMI@

CE31
1000P_0402_50V7K

1

4

2

@EMI@

CE32
1000P_0402_50V7K

1

UE5

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

10

LPC_AD0

12

CLK_PCI_EC

13

PCIRST#/GPIO05

37

EC_RST#

20

EC_SCII#/GPIO0E

38

GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/GP IO44

78

EC_SMB_DA1/GPIO45

79

EC_SMB_CK2/GP IO46

80

EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

GPIO0D

25

EC_INVT_PWM/GP IO11

28

FAN_SPEED1/GPIO14

29

EC_PME#/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

PCH_PWR OK/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLKI/GPIO5D

123

XCLKO/GPIO5E

+3VALW_EC

LPC & MISC

Int. K/B
Matrix

ME_EN

EMI@

LE1
FBMA-L11-160808-800LMT_0603

1 2

9

EC_VDD/VCC

+EC_VCCA

+3VLP

22

33

67

96

111

125

EC_VDD0

EC_VDD/VCC

EC_VDD/VCC

EC_VDD/VCC

EC_VDD/VCC

PWM Output

AD Input

DA Output

PS2 Interface

CPU1.5V_S3_GATE/GP XIOA00

SPI Device Interface

SPI Flash ROM

BATT_CHG_LE D#/GPIO52

GPIO

SM Bus

BATT_LOW_ LED#/GPIO55

EC_RSMRST# /GPXIOA03
EC_LID_OUT#/GPXIOA04

PROCHOT_IN/GPXIOA05

H_PROCHOT# _EC/GPXIOA06

GPO

GPIO

PCH_APWROK /GPXIOA10

GPI

PECI_KB9012/GPXIOD07

GND/GND

GND/GND

GND/GND

GND/GND

GND0

11

24

35

69

94

113

FBMA-L11-160808-800LMT_0603

20mil

12

@

RE81
1K_0402_5%

+EC_VCCA

1

CE33

0.1U_0402_10V7K

2

ECAGND

GPIO0F

BEEP#/GPIO10

EC_VDD/AVCC

GPIO12

ACOFF/GPIO13

BATT_TEMP/GPIO38

GPIO39

ADP_I/GPIO3A

GPIO3B
GPIO42

IMON/GPIO43

DAC_BRIG/GPIO3C
EN_DFAN1/GPIO3D

IREF/GPIO3E

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

WOL_EN/GPXIOA01

ME_EN/GPXIOA02

VCIN0_PH/GPXIOD00

SPIDI/GPIO5B

SPIDO/GPIO5C
SPICLK/GPIO58
SPICS#/GPIO5A

ENBKL/GPIO40

PECI_KB930/GPIO41

FSTCHG/GPIO50

CAPS_LED#/GPIO53

PWR_LED #/GPIO54

SYSON/GPIO56
VR_ON/GPIO57

PM_SLP_S4#/GPIO59

VCOUT0_PH/GPXIOA07

BKOFF#/GPXIOA08

PBTN_OUT# /GPXIOA09

SA_PGOOD/GPXIOA11

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

GPXIOD06

V18R

AGND/AGND

KB9012QF-A4_LQFP128_14X14

LE2

ECAGND

12

3

21

CDRA_LED WHITE_R

23

BEEP#

26

CPU_FAN_PWM

27

GPU_FAN_PWM

63

BATT_TEMP

64

PCIE_WAKE#

65

ADP_I

66

AD_BID0

75

USBCHG_DET_EC#

76

PANEL_BKLEN

68

EN_INVPWR

70

M_THERMAL#

71

EC_ENVDD

72

LCD_TEST

83

EC_MUTE#

84

PM_SLP_S4#

85

AOAC_WLAN

86

SYS_PWROK

87
88

97

SUSACK#

98

EN_WOL#

99

ME_EN

109

VCIN0_PH

119

PWRSHARE_EN_EC#

120
126

CDRA_LED RED_R

128

3V_F347_ON

73

TS_EN

74

WAKE_PCH#

89

DBC_EN

90

BATT_CHG_LED#

91

CAPS_LED#

92

PWR_LED#

93

BATT_LOW_LED#

95

SYSON

121

VR_ON_R

127

PCH_DPWROK

100

PCH_RSMRST#

101

EC_LID_OUT#

102

VCIN1_PH

103

VCOUT1_PH

104

VCOUT0_PH#

105

BKOFF#

106

PBTN_OUT#

107
108

CALDERA_ ON

110

ACIN

112

EC_ON

114

ON/OFFBTN#

115

LID_SW_IN#

116

SUSP#

117

USB_PWR_EN#

118

PECI_KB9012

124

+V18R

3

2

Board ID
NV: 0 AMD:10

RE66

AMD@

130K_0402_1%

ECAGND <58>

BEEP# <32>KB_RST#<21>
CPU_FAN_PWM <42>
GPU_FAN_PWM <42>

12

CE35 100P_0402_50V8J

PCIE_WAKE# <17,30>
ADP_I <58,59>

USBCHG_DET_EC# <35>
PANEL_BKLEN <17>

EN_INVPWR <25>
M_THERMAL# <14,15>
EC_ENVDD <25>
LCD_TEST <25>

EC_MUTE# <32>
PM_SLP_S4# <17>
AOAC_WLAN <28>
SYS_PWROK <12,17,8>

SUSACK# <17>
EN_WOL# <30>
ME_EN <16>
VCIN0_PH <58>

PWRSHARE_EN_EC# <32>

1 2

@

RE73 0_0402_5%

3V_F347_ON <37>

TS_EN <25>
WAKE_PCH# <21>

BATT_CHG_LED# <37>
CAPS_LED# <38>
PWR_LED# <38>
BATT_LOW_LED# <37>

PCH_DPWROK <17>

PCH_RSMRST# <17>
EC_LID_OUT# <19>
VCIN1_PH <58>

VCOUT0_PH# <60>
BKOFF# <25>
PBTN_OUT# <17,8>

12

RE74 43_0402_1%

ACIN <17,37,59>
EC_ON <60>
ON/OFFBTN# <38>

SUSP# <45,61,62>
USB_PWR_EN# <32,34>

1 2

RE76
43_0402_1%

1

CE48

4.7U_0805_10V4Z

2

+3VALW_EC

47K_0402_5%

12

RE91

RST#

.1U_0402_16V7K~D

2

CE55

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DBC_EN <25>

PCH_PWR_EN <45>
CALDERA_ ON <41>

GPU_PWR_LEVEL<17,46>

DGPU_HOLD_RST#<17,46>

TP_INT#

H_PECI <8>

GC6_EVENT#<21,46>

SD034130380

ECAGND

TP_INT# <38>

1 2

IMVP_VR_ON

RE71 0_0402_5%

1 2

DEPOP#_EC<32>

CALDERA_PRSNT#<37,41>

PTP_DISABLE#<38>

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

CTL1<32>

CTL2<32>

1 2

RE95 0_0402_5%@

1 2

RE97 0_0402_5%@

1 2

RE98 0_0402_5%@

+3VALW

RE64
100K_0402_1%

Ra

1 2

RE66

Rb

0_0402_5%

NV@

1 2

BATT_TEMP <58>

IMVP_VR_ON

CE38

ESD@

0.1U_0402_10V7K

Place CE34
between DE1 and RE12

IMVP_VR_ON <65>

@

RE72
10K_0402_5%

EC_ESB_CLK

DEPOP#_EC

RST#

EC_ESB_DAT

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

AD_BID0

CDRA_LED WHITE_R

CDRA_LED RED_R

1

2

UE6

1

ESB_CLK

2

GPIO00

3

RST#

4

ESB_DAT

5

GPIO01

6

GPIO02

7

GPIO03

8

GPIO04

9

GPIO05

10

GPIO06

11

GPIO07/CAS_CLK

12

GND

KC3810_QFN24_4X4

1

CE28

0.1U_0402_10V7K

2

IMVP_VR_ON

L03ESDL5V0CG3-2_SOT-523-3

Place DE1 close to UE1

SD028000080 0_0402_5%

SD034560280 56K_0402_1%

SD034130380 130K_0402_1%
SD034160380
SD034200380 200K_0402_1%

SD034330380 330K_0402_1%

+3VS +5VALW

RE86

100K_0402_5%~D

RE85

100K_0402_5%~D

12

12

2

QE15A

DMN66D0LDW-7_SOT363-6~D

5

3

4

QE15B

DMN66D0LDW-7_SOT363-6~D

2

3

2

3

DE2

@ESD@

1

CE42

0.1U_0402_10V7K

2

TEST_EN#

GPIO08/CAS_DAT

GPIO0C/PWM0

GPIO0D/PWM1

GPIO0E/PWM2

GPIO0F/PWM3

GPIO10/ESB_RUN#

GPIO11/BaseAddOpt

25

1

1

SYSON <61,62,64>

13

14

TP_EN

15

GPIO09

16

GPIO0A

17

GPIO0B

18

1 2

19

RE96 0_0402_5%@

20

21

RE92 10K_0402_5%

22

23

24

W=60mils

VCC

GND

0.1U_0402_16V4Z
CE56

1

2

Title

Title

Title

EC ENE-KB9012

EC ENE-KB9012

EC ENE-KB9012

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

12K_0402_1%SD034120280
27K_0402_1%SD034100300
43K_0402_1%SD034430280

75K_0402_1%SD034750280
100K_0402_1%SD034100380

160K_0402_1%

240K_0402_1%SD000001B80
270K_0402_1%SD00000G280

430K_0402_1%SD028430380

RE88

100K_0402_5%~D

RE87

100K_0402_5%~D

12

12

61

LID_SW_IN#

PCH_PWROK

SYS_PWROK

CDRA_LED WHITE <41>

CDRA_LED RED <41>

PTP_DISABLE#

PTP_KBBL#

M_THERMAL#

CE40

ACIN

ESD@

1 2

CE43 0.1U_0402_10V7K

ESD@

1 2

CE44 0.1U_0402_10V7K

ESD@

1 2

CE46 0.1U_0402_10V7K

EMI@

12

100P_0402_50V8J

Place CE30,CE31,CE32,CE33 close to UE1

TP_EN <38>

CALDERA_ PWRGD <41>

CALDERA_RST# <41>

PTP_KBBL# <38>

USB_IN_STATUS# <32>

GPU_GC6_FB_EN <21,46>

1 2

BUTTON# <41>

+3VALW_EC

+3VS_WLAN_NGFF

WLAN_WAKE# <28>

Compal Electronics, Inc.

43 69Wednesday, March 26, 2014

43 69Wednesday, March 26, 2014

1

43 69Wednesday, March 26, 2014

+3VS

12

RE694.7K_0402_5%

12

RE674.7K_0402_5%

12

RE7710K_0402_5%

0.1

0.1

0.1

5

4

3

2

1

02/18 Add TPM Function (Follow ZAM60)

+3VALW

0.1U_0402_25V6

4700P_0402_25V7K

2200P_0402_50V7K

D D

PCH_SPI_SI<19>

PCH_SPI_SO<19>

PCH_SPI_CLK<19>

PCH_SPI_CS1#<19>

C C

12

RT12 33_0402_5%TPM@
RT13 33_0402_5%TPM@
RT14 33_0402_5%TPM@
RT15 0_0402_5%TPM@

PCH_SPI_CLK_T

33_0402_5%

@EMI@

RT16

0.1U_0402_25V6

1 2

12

CT8

CT5 @

@EMI@

12

1 2
1 2
1 2
1 2

PLT_RST#<17,28,30,31,43>
TPM_PIRQ#<21>

2200P_0402_50V7K

CT6

CZ6

CT7

12

12

TPM@

TPM@

TPM@

PCH_SPI_SI_T
PCH_SPI_SO_T
PCH_SPI_CLK_T
PCH_SPI_CS1#_T
PLT_RST#
TPM_PIRQ#

UT2

TPM@

3

VCC

10

VCC

19

VCC

24

VCC

26

MISO

23

MOSI

21

SPI_CLK

22

SPI_CS#

16

SPI_RST#

20

PIRQ#

25

GND

18

GND

11

GND

4

GND

AT97SC3205_TSSOP28~D

V_BAT

GPIO_1
GPIO_2
GPIO_3

GPIO-Express-00

PP/GPIO

TESTBI

TESTI

NBO_1
NBO_2
NBO_3
NBO_4
NBO_5
NBO_6

12

1
2
17
6
7

9
8

5
13
14
15
27
28

TPM

Screw Hole

H1

H3

H_3P5X3P8

H_2P8

@

B B

A A

1

@

1

NC

5

H2

1

H_3P5X3P8

@

H4

H_2P8

@

1

H10

H9

H_2P8

H_2P8

@

@

1

1

H5

H6

H11

H_2P8

H_2P8

@

@

1

1

H12

H_2P8

H_2P8

@

@

1

1

H8

H7

H13

H_2P8

H_2P8

@

@

1

1

H14

H_2P8

H_2P8

@

@

1

1

FD1
FIDUCAL@

1

H15

H_3P5

@

1

FD4

FD3

FD2
FIDUCIAL@

1

FIDUCIAL@

FIDUCAL@

1

1

H17

H16

H_3P8

@

1

H22

H_3P8

@

1

H18

H_3P8

H_3P8

@

@

1

1

H23

H_3P8

@

1

H20

H19

H_3P8

@

1

H21

H_3P8

H_3P8

@

@

1

1

H24

H_3P2

@

1

FIDUCIAL MARK

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Screw Hole

Screw Hole

Screw Hole

LA-B751P

LA-B751P

LA-B751P

1

44 69Wednesday, March 26, 2014

44 69Wednesday, March 26, 2014

44 69Wednesday, March 26, 2014

0.1

0.1

0.1

A

B

C

D

E

+5VS and +3VS switch

1 1

+5VALW

U17

1

VIN1

2

+3VALW

10U_0603_6.3V6M

C263

VIN1

3

ON1

4

VBIAS

5

ON2

6

VIN2

7

VIN2

TPS22966DPUR_SON14_2X3

C264

10U_0603_6.3V6M

1

1

2

2

R2454 0_0402_5%

1 2

12

R175
100K_0402_5%

13

D

Q40
2N7002K_SOT23-3

S

@

R174 10K_0402_5%

1 2

1

2

SUSP#<43,61,62>

10mil

+5VALW

2 2

SUSP

SUSP#

R176
100K_0402_5%

2

G

12

C258

0.1U_0402_16V7K

5VS_GATE

3VS_GATE

+3VALW

C262

1

2

SHORT DEFAULT

14

VOUT1

13

VOUT1

C2506

12

1 2

CT1

11

GND

C2507

10

1 2

CT2

9

VOUT2

8

VOUT2

15

GPAD

+5VALW

SHORT DEFAULT

10U_0603_6.3V6M

C265

10U_0603_6.3V6M

1

2

5VS

220P_0402_50V8J

470P_0402_50V7K

3VS

J4

2

JUMP_43X79@

J5

2

JUMP_43X79@

+5VS

112

C256

10U_0603_6.3V6M

C257

10U_0603_6.3V6M

1

1

@

2

2

+3VS

112

C261

10U_0603_6.3V6M

C260

10U_0603_6.3V6M

1

1

@

2

2

+3VALW_PCH switch

3 3

12

PCH_PWR_EN<43>

4 4

PCH_PWR_EN

10mil

A

RE62
0_0402_5%

+3VALW_PCH_GATE

12

C268

0.01U_0603_25V7K

+5VALW

+3VALW

U18

1

VOUT1

VIN1

2

VOUT1

VIN1

3

4

5

6
7

CT1

ON1

GND

VBIAS

ON2

CT2

VIN2

VOUT2

VIN2

VOUT2

GPAD

TPS22966DPUR_SON14_2X3

+3VALW

C270

C269

10U_0603_6.3V6M

1

2

SHORT DEFAULT

14

3VALW_PCH

13

12

11

10

9
8

15

10U_0603_6.3V6M

1

2

J6

2

JUMP_43X79@

For Intel S3 Power Reduction

B

112

+0.675VS

12

13

D

S

+3V_PCH

C266

1

@

2

R177
22_0603_5%

2

G

Q41
2N7002K_SOT23-3

10U_0603_6.3V6M

SUSP

C267

10U_0603_6.3V6M

1

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DC/DC Interface

DC/DC Interface

DC/DC Interface

LA-B751P

LA-B751P

LA-B751P

E

45 69Wednesday, March 26, 2014

45 69Wednesday, March 26, 2014

45 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

D D

1 2

RV62
10K_0402_ 5%

1 2

CLK_REQ#

+3VALW

5

1

P

B

O

2

A

G

UV14

3

TC7SH08FU_SSOP5~D

N16@

DV8

2

3

BAT54A-7-F_SOT23-3

CV57 0.22U_0 402_10V6K

1 2

CV62 0.22U_0 402_10V6K

1 2

CV59 0.22U_0 402_10V6K

1 2

CV60 0.22U_0 402_10V6K

1 2

CV58 0.22U_0 402_10V6K

1 2

CV63 0.22U_0 402_10V6K

1 2

CV64 0.22U_0 402_10V6K

1 2

CV61 0.22U_0 402_10V6K

1 2

CV67 0.22U_0 402_10V6K

1 2

CV71 0.22U_0 402_10V6K

1 2

CV69 0.22U_0 402_10V6K

1 2

CV68 0.22U_0 402_10V6K

1 2

CV65 0.22U_0 402_10V6K

1 2

CV70 0.22U_0 402_10V6K

1 2

CV72 0.22U_0 402_10V6K

1 2

CV66 0.22U_0 402_10V6K

CLK_PEG_GPU<18, 41>
CLK_PEG_GPU#<18,41 >

DGPU_PEX_RST#

1

CV212

2

@

0.1U_0402_10V7K

4

SYS_PEX_RST_MON#

12

0_0402_5%

12

+3.3V_GFX_AON

RV208

N15@

10K_0402_5%

12

RV39

N16@

1

1 2

@

RV54 200_0402_ 1%

1 2
1 2

RV40 0_040 2_5%
RV57 2.49K_ 0402_1%

N16@

RV187
10K_0402_ 5%

DGPU_PEX_RST#

PEG_GTX_HRX_P0<7>
PEG_GTX_HRX_N0<7>
PEG_GTX_HRX_P1<7>
PEG_GTX_HRX_N1<7>
PEG_GTX_HRX_P2<7>
PEG_GTX_HRX_N2<7>
PEG_GTX_HRX_P3<7>
PEG_GTX_HRX_N3<7>
PEG_GTX_HRX_P4<7>
PEG_GTX_HRX_N4<7>
PEG_GTX_HRX_P5<7>
PEG_GTX_HRX_N5<7>
PEG_GTX_HRX_P6<7>
PEG_GTX_HRX_N6<7>
PEG_GTX_HRX_P7<7>
PEG_GTX_HRX_N7<7>

C C

+1.35VS_VGA_PGOOD<64 >

CLKREQ#_GPU<18,41 >

1 2

B B

RV58 10K_0402_5%

DGPU_HOLD_RST#<17,43 >

PCH_PLTRST#<17,4 1>

SYS_PEX_RST_MON#

GPU_PEX_RST_HOLD#

ES sample : Depop DV8,RV29 , Pop RV208
QS sample : pop DV8,RV29 , depop RV208

RV56
10K_0402_ 5%

2

G

1 2

QV12

1 3

D

S

2N7002H 1N_SOT23-3

DGPU_HOLD_RST#

PCH_PLTRST#

+3.3V_GFX_AON

4

UV1A

Part 1 of 12

PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N

PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N

PEX_WAKE_N

PEX_REFCLK
PEX_REFCLK_N
PEX_CLKREQ_N

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N

PEX_RST_N
PEX_TERMP

N15E-GX-A2_BGA1745~ D

1

XTALIN XTAL_OUT

CV74

22P_0402_ 50V8J

27MHZ 16PF +-30 PPM 7M270700 04F50Q5

VID_PLLVDD

2

12

CV398

1

10U_0603_6.3V6M

N16@

N16@

47U_0805_6.3V6M~D

GPU_PLLVDD

1

1

CV394

CV396

2

2

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

GPIO

PCI EXPRESS

1 2

RV52 1 0M_0402_5 %

YV1

1

GND

CV397

22U_0805_6.3V6M

N15@

1

CV149

2

DACA_GREEN

DACA_BLUE

DACA_HSYNC
DACA_VSYNC

DACs

DACA_VREF
DACA_RSET

I2C

GPCPLL_AVDD0
GPCPLL_AVDD1

LXS_PLLVDD

VID_PLLVDD

CLK

XTALOUTBUFF

2

1

CV77

2

N15@

1

CV147

2

0.1U_0402_10V7K

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24

PGOOD

DACA_RED

DACA_VDD

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

I2CC_SCL

I2CC_SDA

I2CS_SCL

I2CS_SDA

SP_PLLVDD

XTALIN

XTALOUT

XTALSSIN

3

GND

4

1

2

4.7U_0402_6.3V6M

0.1U_0402_10V7K

3

CV79

1

CV109

2

AT9

NVVDD PWM_VID

AT7

GPU_GC6_FB_EN

AV1

GC6_EVENT#_D

AW4

GPIO3_OC_WARN#

AW1

3V3_MAIN_EN

AT4
AT1

NVVDD PSI

AT10
AV7
AW7

GPIO9_THERMAL_ALERT#

AT6

MEM_VREF

AV2
AV4

GPU_PWR_LEVEL

AT5
AW5
AV6
AW2

1 2

RV546

N16@

AW6

0_0402_5%

AW3
AT8
AV5
AT3
AR9
AV3

GPU_PEX_RST_HOLD#

AT2

AV9

AY21
BA21
AW21

BA20
AY18

AW18
AW20
AY20

BD4
BD3

RV510 1.8K_0402_5%
RV511 1.8K_0402_5%

BB5
BB4

RV512 1.8K_0402_5%
RV513 1.8K_0402_5%

BD2

I2CC_SCL_R

BD1

I2CC_SDA_R

BF3

VGA_SMB_CK2

BE3

VGA_SMB_DA2

Address:0x9Eh and 0x9Ch

Y39

GPU_PLLVDD

AD11
AT11

AW27

VID_PLLVDD

AW28

BB2

XTALIN

BA1

XTAL_OUT

10K_0402_ 5%

BB1

1 2

XTALOUT

BB3

1 2

XTALSSIN

10K_0402_ 5%

CV73
22P_0402_ 50V8J

330ohms
(ESR=) Bead

150mA

1

1

CV76

CV80

180ohms

2

2

(ESR=0.2) Bead

0.1U_0402_10V7K

0.1U_0402_10V7K

Under GPU
(below 150mils)

1 2

LV9

1

BLM18PG181SN1D _2P

CV108

2

30 ohms @100MHz (ESR=0.05)

22U_0805_6.3V6M

PEG_GTX_HRX_P0_C
PEG_GTX_HRX_N0_C
PEG_GTX_HRX_P1_C
PEG_GTX_HRX_N1_C
PEG_GTX_HRX_P2_C
PEG_GTX_HRX_N2_C
PEG_GTX_HRX_P3_C
PEG_GTX_HRX_N3_C
PEG_GTX_HRX_P4_C
PEG_GTX_HRX_N4_C
PEG_GTX_HRX_P5_C
PEG_GTX_HRX_N5_C
PEG_GTX_HRX_P6_C
PEG_GTX_HRX_N6_C
PEG_GTX_HRX_P7_C
PEG_GTX_HRX_N7_C

PEX_TERMP

BH21
BG21
BG23
BH23

BJ23

BJ24
BH24
BG24
BG26
BH26

BJ26

BJ27
BH27
BG27
BG29
BH29

BJ29

BJ30
BH30
BG30
BG32
BH32

BJ32

BJ33
BH33
BG33
BG35
BH35

BJ35

BJ36
BH36
BG36

BC21
BD21
BE22
BE23
BD23
BC23
BC24
BD24
BE26
BE25
BD26
BC26
BC27
BD27
BE28
BE29
BD29
BC29
BC30
BD30
BE31
BE32
BD32
BC32
BC33
BD33
BE34
BE35
BD35
BC35
BC36
BD36

BJ21

BD20
BC20
BB20

BH38
BG38

BE20

BJ38

PEG_HTX_C_GRX_P0<7>
PEG_HTX_C_GRX_N0<7>
PEG_HTX_C_GRX_P1<7>
PEG_HTX_C_GRX_N1<7>
PEG_HTX_C_GRX_P2<7>
PEG_HTX_C_GRX_N2<7>
PEG_HTX_C_GRX_P3<7>
PEG_HTX_C_GRX_N3<7>
PEG_HTX_C_GRX_P4<7>
PEG_HTX_C_GRX_N4<7>
PEG_HTX_C_GRX_P5<7>
PEG_HTX_C_GRX_N5<7>
PEG_HTX_C_GRX_P6<7>
PEG_HTX_C_GRX_N6<7>
PEG_HTX_C_GRX_P7<7>
PEG_HTX_C_GRX_N7<7>

CLK_REQ#

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#

DGPU_PEX_RST#_R

SYS_PEX_RST_MON#

1 2
1 2

1 2
1 2

GPU_PLLVDD

RV51

RV49

N16@

1 2

LV15
BLM18PG331SN1D _2P

LV7

N15@

BLM18PG181SN1D _2P

1 2

3

NVVDD PWM_VID <63 >
GPU_GC6_FB_EN <21,43>

GPIO3_OC_WARN# <49>

3V3_MAIN_EN <49 ,63>

NVVDD PSI <63>

GPIO8_THERM_SHDWN# <49>

MEM_VREF <51,52,53,5 4>

GPU_PWR_LEVEL <17,43>

+1.05VS_VGA

+1.05VS_VGA

+1.05VS_VGA

SYS_PEX_RST_MON#

QV13B

2

2N7002DW-T/R7 _SOT363-6

61

354

VGA_SMB_CK2

VGA_SMB_DA2

QV13A

2N7002DW-T/R7 _SOT363-6

PU AT EC SIDE, +3VS AND 4.7K

12

GC6_EVENT#GC6_EVENT#_D

DV9

RB751S40T1G_ SOD523-2

GPU_GC6_FB_EN

12

RV106

10K_0402_ 5%

GC6@

GPU_PGOOD<49,63>

EC_SMB_CK2 <19,42 ,43>

EC_SMB_DA2 <19,42 ,43>

GC6_EVENT# <21,43>

UV19

AO3413_SOT23-3

GC6@

GC6_EN

RV127

RV128 0_0402_ 5%

13

D

S

GC6@

1 2

0_0402_1%

1 2

GC6@

GC6@

2

G

2

GC6_EVENT#_D

GPIO3_OC_WARN#

GPIO8_THERM_SHDWN#

GPIO9_THERMAL_ALERT#

DGPU_HOLD_RST#

GPU_PEX_RST_HOLD#

3V3_MAIN_EN

NVVDD PSI

GPU_PWR_LEVEL

VGA_SMB_CK2

VGA_SMB_DA2

GPU_GC6_FB_EN

MEM_VREF

DGPU_PEX_RST#

PCH side has PU.

I2CC_SCL_R

I2CC_SDA_R

+3VS

12

RV105

10K_0402_5%

13

D

GC6@

2

DGPU_PWR_EN

G

QV19

S

2N7002H 1N_SOT23-3

DAN202UT106_SC70-3

2

GC6_ENGPU_GC6 _FB_EN

3

GC6@

1 2

RV50 10K_0402 _5%

1 2

RV53 10K_0402 _5%

1 2

RV527 10K_0402_5%

1 2

RV526 10K_0402_5%

RV530 10K_040 2_5%~D

1 2

RV63 10K_0402_5%

1 2

RV55 10K_ 0402_1%

1 2

RV35 10K_ 0402_1%

RV61 100K_0402_5%~D

1 2

RV191 1 .8K_0402_5 %

1 2

RV192 1 .8K_0402_5 %

1 2

RV37 10K_0402 _5%

RV38 100K_040 2_5%~D

1 2

RV59 10K_0402 _5%

CLKREQ#_GPU

12

RV547

RV548

1.8K_0402_1%

DV4

1

+3.3V_GFX_AON

@

12

12

+3.3V_GFX_AON

12

@

10K_0402_ 5%~D

12

RV531

@

+3.3V_GFX_AON

12

1.8K_0402_1%

2

2N7002DW-T/R7 _SOT363-6

QV89A

2N7002DW-T/R7 _SOT363-6

DGPU_PWR_EN <21,49,63 >

12

RV125
1K_0402_5 %

GC6@

+3VS

SYS_PEX_RST_MON#

QV89B

354

61

FBVDD_EN <64 >

1

I2CC_SCL <49>

I2CC_SDA <49>

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

2014/2/11 2014/2/ 11

2014/2/11 2014/2/ 11

2014/2/11 2014/2/ 11

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

N15P-GX (1/5) PEG & DAC

N15P-GX (1/5) PEG & DAC

N15P-GX (1/5) PEG & DAC

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: S heet of

Date: S heet of

Date: S heet of

1

46 69Wednesday, March 26, 201 4

46 69Wednesday, March 26, 201 4

46 69Wednesday, March 26, 201 4

0.1

0.1

0.1

5

UV1B

Part 2 of 12

BC18

IFPA_TXC

BD18

IFPA_TXC_N

BH14

IFPA_TXD0

BG14

IFPA_TXD0_N

BD15

IFPA_TXD1

BC15

D D

C C

B B

A A

BF17
BE17
BD17
BC17

BH18
BG18

BJ15

BJ14
BG15
BH15
BH17
BG17

BJ17

BJ18

BC14
BD14
BF14
BE14
BD12
BC12
BD11
BE11

BG12
BH12

BJ12

BJ11
BH11
BG11

BG9
BH9

BE8

BF8

BF6
BG6
BD6
BE6
BD5
BE5

BF9
BE9

BJ9

BJ8
BH8
BG8

BJ6
BH6

BG2

BF2

BG4

BF4

BG3
BH3

BJ4
BH4

IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N

IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N

IFPC_L0
IFPC_L0_N
IFPC_L1
IFPC_L1_N
IFPC_L2
IFPC_L2_N
IFPC_L3
IFPC_L3_N

IFPD_L0
IFPD_L0_N
IFPD_L1
IFPD_L1_N
IFPD_L2
IFPD_L2_N
IFPD_L3
IFPD_L3_N

IFPE_L0
IFPE_L0_N
IFPE_L1
IFPE_L1_N
IFPE_L2
IFPE_L2_N
IFPE_L3
IFPE_L3_N

IFPF_L0
IFPF_L0_N
IFPF_L1
IFPF_L1_N
IFPF_L2
IFPF_L2_N
IFPF_L3
IFPF_L3_N

IFPC_AUX
IFPC_AUX_N

IFPD_AUX
IFPD_AUX_N

IFPE_AUX
IFPE_AUX_N

IFPF_AUX
IFPF_AUX_N

LVDS/TMDS

MULTI_STRAP_REF0_GND

3V3AUX_NC

NVVDD_SENSE

GND_SENSE

TEST

TESTMODE

JTAG_TCK

JTAG_TDO
JTAG_TMS

JTAG_TRST_N

SERIAL

ROM_CS_N
ROM_SCLK

GENERAL

THERMDP
THERMDN

NC

JTAG_TDI

ROM_SI

ROM_SO

BUFRST

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

CEC

AW14
BE15

NC

BF12

NC

BF18

NC

AK10

NC

AM10

NC

AN10

NC

AR10

NC

AY14

NC

BC11

NC

BF15

NC

BG5

NC

BJ5

NC

AY23

VCCSENSE_VGA

AW23

VSSSENSE_VGA

BA23

BJ20

GPU_JTAG_TCK

BG20

GPU_JTAG_TDI

BH20

GPU_JTAG_TDO

BF20

GPU_JTAG_TMS

BF21

GPU_JTAG_TRST #

BA3

ROM_CS

BA2

ROM_SCLK

BA5

ROM_SI

BA4

ROM_SO

AW9

RV68 10K_0402_5%

BB7

RV66 40.2K_0402_1%

BA6
AW8
BA7
BA8
BB6

BF1
BE1

AV8

RV65 10K_0402_5%

4

trace width: 16mils
differential voltage sensing.
differential 50ohm signal routing.

+VGA_CORE

RV532
100_0402_1%DIS@

1 2

VCCSENSE_VGA <63>

VSSSENSE_VGA <63>

12

DIS@

RV533 100_0402 _1%

10K_0402_5%

1 2

RV67

T100PAD~D @
T97PAD ~D @
T98PAD ~D @

RV69
10K_0402_5%

T99PAD ~D @

ROM_SCLK <55>

ROM_SI <55>

ROM_SO <55>

1 2

not find @CRB

12

1 2

@

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

@

+3VS_VGA

12

STRAP0 <55>
STRAP1 <55>

STRAP2 <55>
STRAP3 <55>
STRAP4 <55>

3

12

RV167

10K_0402_5%

UV10

ROM_CS
ROM_SO ROM_SO_R

1 2

RV168 3 3_0402_5%~D

1

CS#

2

SO

3

WP#

4

GND

W25X20CLSNIG SOIC 8P

W25X20CL 2M-Bit/256K-byte
SA00003GM30

2

VCC

HOLD#

SCK

1

UV1C

AJ7

MIOAD0

AJ2

MIOAD1

AJ6

MIOAD2

AJ5

MIOAD3

AK4

MIOAD4

AJ4

MIOAD5

AK9

MIOAD6

AK3

MIOAD7

AM3

MIOAD8

AK7

MIOAD9

AM2

MIOAD10

AK6

MIOAD11

AM8

MIOBD0

AM6

MIOBD1

AM9

MIOBD2

AN9

MIOBD3

AN5

MIOBD4

AN8

MIOBD5

AR7

MIOBD6

AN4

MIOBD7

AN1

MIOBD8

AR6

MIOBD9

AN6

MIOBD10

AR2

MIOBD11

AJ9

MIOACAL_PD_VDDQ

AJ8

MIOACAL_PU_GND

AM1

MIOA_VREF

AR5

MIOBCAL_PD_VDDQ

AR4

MIOBCAL_PU_GND

AR1

MIOB_VREF

N15E-GX-A2_BGA1745~D

+3VS_VGA+3VS_VGA+3VS_VGA

8
7
6

ROM_SCLK_R

5

SI

ROM_SI_R

Part 3 of 12

0.1U_0402_16V4Z~D

CV195

1

2

RV169 33_040 2_5%~D

1 2
1 2

RV170 33_040 2_5%~D

MIOA_CTL3
MIOA_HSYNC
MIOA_VSYNC

MIOA_CLKOUT

MIOA_CLKOUT_N

MIOA_CLKIN

MIOB_CTL3
MIOB_HSYNC
MIOB_VSYNC

MIOB_CLKOUT

MIOB_CLKOUT_N

MIOB_CLKIN

ROM_SCLK
ROM_SI

MIOA_DE

MIOB_DE

AK5
AJ1
AK8
AM4

AK1
AK2
AJ3

AR8
AM7
AN7
AR3

AN3
AN2
AM5

N15E-GX-A2_BGA1745~D

5

Security Classification

Security Classification

Security Classification

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

2014/2/11 2014/2/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

N15P-GX (1/5) PEG & DAC

N15P-GX (1/5) PEG & DAC

N15P-GX (1/5) PEG & DAC

Size Doc ument Numbe r Rev

Size Doc ument Numbe r Rev

Size Doc ument Numbe r Rev

B

B

B

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

47 69Wednesday, March 26, 2014

47 69Wednesday, March 26, 2014

47 69Wednesday, March 26, 2014

1

0.1

0.1

0.1

5

UV1D

Part 4 of 12

V43

FBA_D0

FBA_D0

V41

FBA_D1

FBA_D1

V44

FBA_D2

FBA_D2

V42

FBA_D3

FBA_D3

U43

FBA_D4

FBA_D4

U44

FBA_D5

FBA_D5

U41

FBA_D6

FBA_D6

U42

FBA_D7

FBA_D7

AA46

FBA_D8

FBA_D8

AC46

FBA_D9

FBA_D9

AA45

FBA_D10

FBA_D10

AA47

FBA_D11

FBA_D11

Y46

FBA_D12

FBA_D12

Y49

FBA_D13

FBA_D13

Y45

GPU_PLLVDD

FBA_DBI0#<51>

FBA_DBI4#<51>

FBA_DBI1#<51>
FBA_DBI2#<51 >
FBA_DBI3#<51 >

FBA_DBI5#<51>
FBA_DBI6#<51 >
FBA_DBI7#<51 >

Mode H
Address

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

CMD31

FBA_D[0..63]

FBA_D14

FBA_D14

Y48

FBA_D15

FBA_D15

AJ46

FBA_D16

FBA_D16

AG47

FBA_D17

FBA_D17

AG46

FBA_D18

FBA_D18

AG45

FBA_D19

FBA_D19

AF44

FBA_D20

FBA_D20

AF45

FBA_D21

FBA_D21

AD46

FBA_D22

FBA_D22

AD45

FBA_D23

FBA_D23

AD44

FBA_D24

FBA_D24

AD43

FBA_D25

FBA_D25

AD42

FBA_D26

FBA_D26

AC42

FBA_D27

FBA_D27

AA44

FBA_D28

FBA_D28

AA43

FBA_D29

FBA_D29

AA42

FBA_D30

FBA_D30

AA40

FBA_D31

FBA_D31

AT48

FBA_D32

FBA_D32

AT46

FBA_D33

FBA_D33

AT49

FBA_D34

FBA_D34

AT47

FBA_D35

FBA_D35

AW47

FBA_D36

FBA_D36

AW48

FBA_D37

FBA_D37

BA47

FBA_D38

FBA_D38

AW46

FBA_D39

FBA_D39

AR46

FBA_D40

FBA_D40

AN45

FBA_D41

FBA_D41

AR49

FBA_D42

FBA_D42

AR48

FBA_D43

FBA_D43

AT45

FBA_D44

FBA_D44

AR44

FBA_D45

FBA_D45

AN41

FBA_D46

FBA_D46

AN42

FBA_D47

FBA_D47

AG40

FBA_D48

FBA_D48

AG43

FBA_D49

FBA_D49

AG41

FBA_D50

FBA_D50

AJ43

FBA_D51

FBA_D51

AJ40

FBA_D52

FBA_D52

AK40

FBA_D53

FBA_D53

AK42

FBA_D54

FBA_D54

AK41

FBA_D55

FBA_D55

AK45

FBA_D56

FBA_D56

AK43

FBA_D57

FBA_D57

AK48

FBA_D58

FBA_D58

AK49

FBA_D59

FBA_D59

AM45

FBA_D60

FBA_D60

AM44

FBA_D61

FBA_D61

AK44

FBA_D62

FBA_D62

AM43

FBA_D63

FBA_D63

U40

FBA_DBI0#

FBA_DQM0

AC45

FBA_DBI1#

FBA_DQM1

AG44

FBA_DBI2#

FBA_DQM2

AA41

FBA_DBI3#

FBA_DQM3

AV45

FBA_DBI4#

FBA_DQM4

AR45

FBA_DBI5#

FBA_DQM5

AG42

FBA_DBI6#

FBA_DQM6

AM46

FBA_DBI7#

FBA_DQM7

U45

FBA_EDC0

FBA_DQS_WP0

Y43

FBA_EDC1

FBA_DQS_WP1

AF42

FBA_EDC2

FBA_DQS_WP2

AC44

FBA_EDC3

FBA_DQS_WP3

AV47

FBA_EDC4

FBA_DQS_WP4

AN43

FBA_EDC5

FBA_DQS_WP5

AJ42

FBA_EDC6

FBA_DQS_WP6

AK47

FBA_EDC7

FBA_DQS_WP7

U46

FBA_DQS_RN0

Y44

FBA_DQS_RN1

AF43

FBA_DQS_RN2

AC43

FBA_DQS_RN3

AV46

FBA_DQS_RN4

AN44

FBA_DQS_RN5

AJ41

FBA_DQS_RN6

AK46

FBA_DQS_RN7

AC39

FB_REFPLL_DLL_AVDD0

L21

FB_REFPLL_DLL_AVDD1

1

1

CV75

2

N15E-GX-A2_BGA1745 ~D

CV131

2

0.1U_0402_10V7 K

0.1U_0402_10V7 K

32..63

CS*

A3_BA3

A2_BA0

A4_BA2

A5_BA1

WE*

A7_A8

A6_A11

ABI*

A12_RFU

A0_A10

A1_A9

RAS*

RST*

CK1*

CAS*

5

D D

FBA_D[0..63]<51>

C C

FBA_EDC[7..0]<51>

B B

Package

Supported CMD Mapping

GB2B-64

H

GB4B-128

H

GB3-256

F

Mode H
Address

0..31

CMD0

CS*

A3_BA3

CMD1

CMD2

A2_BA0

CMD3

A4_BA2

A5_BA1

CMD4

CMD5

WE*

CMD6

A7_A8

CMD7

A6_A11

CMD8

A A

ABI*

CMD9

A12_RFU

CMD10

A0_A10

CMD11

A1_A9

CMD12

RAS*

CMD13

RST*

CK1*

CMD14

CMD15

CAS*

CMD32

NO USED

CMD33

NO USED

CMD34

Debug0

CMD35

Debug1

Mode F
Address

U47

FBA_CAS#_L
FBA_CKE_L
FBA_RST#_L
FBA_RAS#_L
FBA_MA1_MA9_L
FBA_MA0_MA10_L
FBA_MA12_RFU_L
FBA_ABI#_L
FBA_MA6_MA11_L
FBA_MA7_MA8_L
FBA_WE#_L
FBA_MA5_BA1_L
FBA_MA4_BA2_L
FBA_MA2_BA0_L
FBA_MA3_BA3_L
FBA_CS#_L
FBA_CAS#_H
FBA_CKE_H
FBA_RST#_H
FBA_RAS#_H
FBA_MA1_MA9_H
FBA_MA0_MA10_H
FBA_MA12_RFU_H
FBA_ABI#_H
FBA_MA6_MA11_H
FBA_MA7_MA8_H
FBA_WE#_H
FBA_MA5_BA1_H
FBA_MA4_BA2_H
FBA_MA2_BA0_H
FBA_MA3_BA3_H
FBA_CS#_H

FBA_CLK0

FBA_CLK0 <51>

FBA_CLK0#

FBA_CLK0# <51>

FBA_CLK1

FBA_CLK1 <51>

FBA_CLK1#

FBA_CLK1# <51>

FBA_WCK0
FBA_WCK0_N

FBA_WCK1
FBA_WCK1_N

FBA_WCK2
FBA_WCK2_N

FBA_WCK3
FBA_WCK3_N

1

1

DIS@

CV364

2

2

0.1U_0402_16V7 K

12

RV153
10K_0402_5%

FBA_CKE_L
FBA_CKE_H

FBA_RST#_L
FBA_RST#_H

RST signal pull down resister
should be at the end of the
daisy-chain of this trace.

32..63

CAS*

CK1*

RST*

RAS*

A1_A9

A0_A10

A12_RFU

ABI*

A6_A11

A7_A8

WE*

A5_BA1

A4_BA2

A2_BA0

A3_BA3

CS*

FBA_CAS#_L <51>
FBA_CKE_L <51>
FBA_RST#_L <51>
FBA_RAS#_L <51>
FBA_MA1_MA9_L <5 1>
FBA_MA0_MA10_L <51>
FBA_MA12_RFU_L <51>
FBA_ABI#_L <51>
FBA_MA6_MA11_L <51>
FBA_MA7_MA8_L <5 1>
FBA_WE#_L <51>
FBA_MA5_BA1_L <51>
FBA_MA4_BA2_L <51>
FBA_MA2_BA0_L <51>
FBA_MA3_BA3_L <51>
FBA_CS#_L <51>
FBA_CAS#_H <51 >
FBA_CKE_H <51>
FBA_RST#_H <51>
FBA_RAS#_H <51 >
FBA_MA1_MA9_H <51>
FBA_MA0_MA10_H <51>
FBA_MA12_RFU_H <51 >
FBA_ABI#_H <51>
FBA_MA6_MA11_H <51>
FBA_MA7_MA8_H <51>
FBA_WE#_H <51>
FBA_MA5_BA1_H <51>
FBA_MA4_BA2_H <51>
FBA_MA2_BA0_H <51>
FBA_MA3_BA3_H <51>
FBA_CS#_H <51>

FBA_WCK0 <51>
FBA_WCK0_N <51>

FBA_WCK1 <51>
FBA_WCK1_N <51>

FBA_WCK2 <51>
FBA_WCK2_N <51>

FBA_WCK3 <51>
FBA_WCK3_N <51>

LV14

1 2

PBY160808T-300Y-N_2 P

CV148

22U_0805_6.3V6 M

+1.35VS_VGA

12

RV110
10K_0402_5%

12

RV107
10K_0402_5%

12

12

RV109
10K_0402_5%

RV108
10K_0402_5%

+3VS_VGA

FBB_D[0..63]<52>

FBA_CMD0

U48

FBA_CMD1

U49

FBA_CMD2

V48

FBA_CMD3

V49

FBA_CMD4

V47

FBA_CMD5

AA49

FBA_CMD6

AA48

FBA_CMD7

AC48

FBA_CMD8

AC49

FBA_CMD9

AC47

FBA_CMD10

AD49

FBA_CMD11

AD48

FBA_CMD12

AD47

FBA_CMD13

AF47

FBA_CMD14

AF48

FBA_CMD15

BB49

FBA_CMD16

BA48

FBA_CMD17

BA49

FBA_CMD18

AW49

FBA_CMD19

AV48

FBA_CMD20

AV49

FBA_CMD21

AN48

FBA_CMD22

AN49

FBA_CMD23

AM47

FBA_CMD24

AM49

FBA_CMD25

AM48

FBA_CMD26

AJ47

FBA_CMD27

AJ49

FBA_CMD28

AJ48

FBA_CMD29

AG48

FBA_CMD30

AG49

FBA_CMD31

AF49

FBA_CMD32

AF46

FBA_CMD33

Y47

FBA_DEBUG0

AR47

FBA_DEBUG1

AF41

MEMORY

INTERFACE A

FBA_CLK0

AF40

FBA_CLK0_N

AJ44

FBA_CLK1

AJ45

FBA_CLK1_N

V46

FBA_WCK01

V45

FBA_WCK01_N

Y42

FBA_WCKB01

Y41

FBA_WCKB01_N

AD41

FBA_WCK23

AD40

FBA_WCK23_N

AC41

FBA_WCKB23

AC40

FBA_WCKB23_N

AT44

FBA_WCK45

AT43

FBA_WCK45_N

AR43

FBA_WCKB45

AR42

FBA_WCKB45_N

AM42

FBA_WCK67

AM41

FBA_WCK67_N

AN47

FBA_WCKB67

AN46

FBA_WCKB67_N

AJ39

+FB_PLLAVDD

FBA_PLL_AVDD

BB48

FB_CLAMP

R39

FB_VREF

Mode F
Address

0..31

CMD16

CMD0

CAS*

CMD17

CMD1

CK1*

CMD18

CMD2

RST*

CMD19

CMD3

RAS*

CMD20

CMD4

A1_A9

CMD21

CMD5

A0_A10

CMD22

CMD6

A12_RFU

CMD23

CMD7

ABI*

CMD24

CMD8

A6_A11

CMD25

CMD9

A7_A8

CMD26

CMD10

WE*

CMD27

CMD11

A5_BA1

CMD28

CMD12

A4_BA2

CMD29

CMD13

A2_BA0

CMD30

CMD14

A3_BA3

CMD31

CMD15

CS*

CMD32

NO USED

CMD33

NO USED

CMD34

Debug0

CMD35

Debug1

4

UV1E

D30

FBB_D0

FBB_D0

G30

FBB_D1

FBB_D1

E30

FBB_D2

FBB_D2

F30

FBB_D3

FBB_D3

G29

FBB_D4

FBB_D4

F29

FBB_D5

FBB_D5

J29

FBB_D6

FBB_D6

H29

FBB_D7

FBB_D7

C33

FBB_D8

FBB_D8

E33

FBB_D9

FBB_D9

F33

FBB_D10

FBB_D10

D33

FBB_D11

FBB_D11

C30

FBB_D12

FBB_D12

K33

FBB_D13

FBB_D13

E32

FBB_D14

FBB_D14

D32

FBB_D15

FBB_D15

H39

FBB_D16

FBB_D16

G39

FBB_D17

FBB_D17

F39

FBB_D18

FBB_D18

D41

FBB_D19

FBB_D19

F38

FBB_D20

FBB_D20

G38

FBB_D21

FBB_D21

D38

FBB_D22

FBB_D22

E38

FBB_D23

FBB_D23

F36

FBB_D24

FBB_D24

K35

FBB_D25

FBB_D25

E36

FBB_D26

FBB_D26

D36

FBB_D27

FBB_D27

G35

FBB_D28

FBB_D28

F35

FBB_D29

FBB_D29

D35

FBB_D30

FBB_D30

E35

FBB_D31

FBB_D31

M44

FBB_D32

FBB_D32

P42

FBB_D33

FBB_D33

M43

FBB_D34

FBB_D34

P43

FBB_D35

FBB_D35

R45

FBB_D36

FBB_D36

R46

FBB_D37

FBB_D37

R43

FBB_D38

FBB_D38

R44

FBB_D39

FBB_D39

M47

FBB_D40

FBB_D40

P44

FBB_D41

FBB_D41

M46

FBB_D42

FBB_D42

M45

FBB_D43

FBB_D43

P47

FBB_D44

FBB_D44

P49

FBB_D45

FBB_D45

P45

FBB_D46

FBB_D46

P46

FBB_D47

FBB_D47

F46

FBB_D48

FBB_D48

E47

FBB_D49

FBB_D49

D47

FBB_D50

FBB_D50

D48

FBB_D51

FBB_D51

F48

FBB_D52

FBB_D52

H46

FBB_D53

FBB_D53

H47

FBB_D54

FBB_D54

H48

FBB_D55

FBB_D55

L45

FBB_D56

FBB_D56

L44

FBB_D57

FBB_D57

J46

FBB_D58

FBB_D58

H49

FBB_D59

FBB_D59

L47

FBB_D60

FBB_D60

J49

FBB_D61

FBB_D61

L48

FBB_D62

FBB_DBI0#
FBB_DBI1#
FBB_DBI2#
FBB_DBI3#
FBB_DBI4#
FBB_DBI5#
FBB_DBI6#
FBB_DBI7#

FBB_D62

L49

FBB_D63

FBB_D63

E29

FBB_DQM0

G33

FBB_DQM1

H38

FBB_DQM2

C36

FBB_DQM3

P41

FBB_DQM4

P48

FBB_DQM5

F47

FBB_DQM6

L46

FBB_DQM7

J30

FBB_EDC0

FBB_DQS_WP0

H33

FBB_EDC1

FBB_DQS_WP1

D39

FBB_EDC2

FBB_DQS_WP2

J35

FBB_EDC3

FBB_DQS_WP3

R42

FBB_EDC4

FBB_DQS_WP4

M48

FBB_EDC5

FBB_DQS_WP5

F49

FBB_EDC6

FBB_DQS_WP6

J47

FBB_EDC7

FBB_DQS_WP7

H30

FBB_DQS_RN0

J33

FBB_DQS_RN1

E39

FBB_DQS_RN2

H35

FBB_DQS_RN3

R41

FBB_DQS_RN4

M49

FBB_DQS_RN5

E49

FBB_DQS_RN6

J48

FBB_DQS_RN7

N15E-GX-A2_BGA1745 ~D

FBB_D[0..63]

FBB_DBI0#<52 >

FBB_DBI1#<52 >
FBB_DBI2#<52 >
FBB_DBI3#<52 >
FBB_DBI4#<52 >

FBB_DBI5#<52 >
FBB_DBI6#<52 >
FBB_DBI7#<52 >

FBB_EDC[7..0]<52>

4

Part 5 of 12

MEMORY

FBB_DEBUG0
FBB_DEBUG1

INTERFACE B

FBB_WCK01_N

FBB_WCKB01

FBB_WCKB01_N

FBB_WCK23_N

FBB_WCKB23

FBB_WCKB23_N

FBB_WCK45_N

FBA_WCKB45

FBB_WCKB45_N

FBB_WCK67_N

FBB_WCKB67

FBB_WCKB67_N

FBB_PLL_AVDD

C29

FBB_CAS#_L

FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8

FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
FBB_CMD32
FBB_CMD33

FBB_CLK0

FBB_CLK0_N

FBB_CLK1

FBB_CLK1_N

FBB_WCK01

FBB_WCK23

FBB_WCK45

FBB_WCK67

B29
A29
A30
B30
B32
A32
C32
A33
B33
B35
A35
C35
A36
B36
B38
D49
C48
B46
A46
A45
C44
A44
B44
C42
B42
A42
A41
B41
C39
B39
A39
A38
C38

D29
C41

E41
F41
E42
D42

F32
G32
H32
J32
G36
H36
K36
J36
M42
M41
L42
L43
H45
H44
J45
J44

L36

FBB_CAS#_L <52>

FBB_CKE_L

FBB_CKE_L <52>

FBB_RST#_L

FBB_RST#_L <52>

FBB_RAS#_L

FBB_RAS#_L <52>

FBB_MA1_MA9_L

FBB_MA1_MA9_L <5 2>

FBB_MA0_MA10_L

FBB_MA0_MA10_L <52>

FBB_MA12_RFU_L

FBB_MA12_RFU_L <52>

FBB_ABI#_L

FBB_ABI#_L <52>

FBB_MA6_MA11_L

FBB_MA6_MA11_L <52>

FBB_MA7_MA8_L

FBB_MA7_MA8_L <5 2>

FBB_WE#_L

FBB_WE#_L <52>

FBB_MA5_BA1_L

FBB_MA5_BA1_L <52>

FBB_MA4_BA2_L

FBB_MA4_BA2_L <52>

FBB_MA2_BA0_L

FBB_MA2_BA0_L <52>

FBB_MA3_BA3_L

FBB_MA3_BA3_L <52>

FBB_CS#_L

FBB_CS#_L <52>

FBB_CAS#_H

FBB_CAS#_H <52 >

FBB_CKE_H

FBB_CKE_H <52>

FBB_RST#_H

FBB_RST#_H <52 >

FBB_RAS#_H

FBB_RAS#_H <52 >

FBB_MA1_MA9_H

FBB_MA1_MA9_H <52>

FBB_MA0_MA10_H

FBB_MA0_MA10_H <52>

FBB_MA12_RFU_H

FBB_MA12_RFU_H <52 >

FBB_ABI#_H

FBB_ABI#_H <52>

FBB_MA6_MA11_H

FBB_MA6_MA11_H <52>

FBB_MA7_MA8_H

FBB_MA7_MA8_H <52>

FBB_WE#_H

FBB_WE#_H <52>

FBB_MA5_BA1_H

FBB_MA5_BA1_H <52>

FBB_MA4_BA2_H

FBB_MA4_BA2_H <52>

FBB_MA2_BA0_H

FBB_MA2_BA0_H <52>

FBB_MA3_BA3_H

FBB_MA3_BA3_H <52>

FBB_CS#_H

FBB_CS#_H <52>

FBB_CLK0

FBB_CLK0 <52>

FBB_CLK0#

FBB_CLK0# <52>

FBB_CLK1

FBB_CLK1 <52>

FBB_CLK1#

FBB_CLK1# <52>

FBB_WCK0

FBB_WCK0 <52>

FBB_WCK0_N

FBB_WCK0_N <52>

FBB_WCK1

FBB_WCK1 <52>

FBB_WCK1_N

FBB_WCK1_N <52>

FBB_WCK2

FBB_WCK2 <52>

FBB_WCK2_N FBC_WCK1

FBB_WCK2_N <52> FBC_WCK1 <53>

FBB_WCK3

FBB_WCK3 <52>

FBB_WCK3_N

FBB_WCK3_N <52>

+FB_PLLAVDD

100mA

1

DIS@

CV365

2

0.1U_0402_16V7 K

Under GPU
close to ball : L36

+1.35VS_VGA

12

12

RV113

RV114

10K_0402_5%

10K_0402_5%

FBB_CKE_L
FBB_CKE_H

FBB_RST#_L
FBB_RST#_H

12

12

RV112

RV111

10K_0402_5%

10K_0402_5%

3

UV1F

Part 6 of 12

A8

FBC_D0

FBC_D0

D8

FBC_D1

FBC_D1

B8

FBC_D2

FBC_D2

C8

FBC_D3

FBC_D3

C5

FBC_D4

FBC_D4

B5

FBC_D5

FBC_D5

D5

FBC_D6

FBC_D6

C4

FBC_D7

FBC_D7

B9

FBC_D8

FBC_D8

E11

FBC_D9

FBC_D9

D9

FBC_D10

FBC_D10

A9

FBC_D11

FBC_D11

H11

FBC_D12

FBC_D12

F9

FBC_D13

FBC_D13

J11

FBC_D14

FBC_D14

E8

FBC_D15

FBC_D15

K17

FBC_D16

FBC_D16

G17

FBC_D17

FBC_D17

J17

FBC_D18

FBC_D18

G15

FBC_D19

FBC_D19

K15

FBC_D20

FBC_D20

K14

FBC_D21

FBC_D21

H14

FBC_D22

FBC_D22

J14

FBC_D23

FBC_D23

E14

FBC_D24

FBC_D24

F14

FBC_D25

FBC_D25

A14

FBC_D26

FBC_D26

B14

FBC_D27

FBC_D27

E12

FBC_D28

FBC_D28

F12

FBC_D29

FBC_D29

G12

FBC_D30

FBC_D30

G14

FBC_D31

FBC_D31

G26

FBC_D32

FBC_D32

J26

FBC_D33

FBC_D33

F26

FBC_D34

FBC_D34

H26

FBC_D35

FBC_D35

G27

FBC_D36

FBC_D36

F27

FBC_D37

FBC_D37

J27

FBC_D38

FBC_D38

H27

FBC_D39

FBC_D39

E23

FBC_D40

FBC_D40

D21

FBC_D41

FBC_D41

D23

FBC_D42

FBC_D42

C23

FBC_D43

FBC_D43

A24

FBC_D44

FBC_D44

B24

FBC_D45

FBC_D45

E24

FBC_D46

FBC_D46

D24

FBC_D47

FBC_D47

D15

FBC_D48

FBC_D48

C17

FBC_D49

FBC_D49

D17

FBC_D50

FBC_D50

E17

FBC_D51

FBC_D51

F18

FBC_D52

FBC_D52

E18

FBC_D53

FBC_D53

D20

FBC_D54

FBC_D54

E20

FBC_D55

FBC_D55

G20

FBC_D56

FBC_D56

H20

FBC_D57

FBC_D57

F20

FBC_D58

FBC_D58

H21

FBC_D59

FBC_D59

F23

FBC_D60

FBC_D60

G23

FBC_D61

FBC_D61

H23

FBC_D62

FBC_DBI0#
FBC_DBI1#
FBC_DBI2#
FBC_DBI3#
FBC_DBI4#
FBC_DBI5#
FBC_DBI6#
FBC_DBI7#

FBC_D63

FBC_EDC0
FBC_EDC1
FBC_EDC2
FBC_EDC3
FBC_EDC4
FBC_EDC5
FBC_EDC6
FBC_EDC7

FBC_D62

K23

FBC_D63

E6

FBC_DQM0

E9

FBC_DQM1

H17

FBC_DQM2

D12

FBC_DQM3

K27

FBC_DQM4

E21

FBC_DQM5

F17

FBC_DQM6

J23

FBC_DQM7

D6

FBC_DQS_WP0

F11

FBC_DQS_WP1

H15

FBC_DQS_WP2

C14

FBC_DQS_WP3

E27

FBC_DQS_WP4

F24

FBC_DQS_WP5

H18

FBC_DQS_WP6

G21

FBC_DQS_WP7

C6

FBC_DQS_RN0

G11

FBC_DQS_RN1

J15

FBC_DQS_RN2

D14

FBC_DQS_RN3

D27

FBC_DQS_RN4

G24

FBC_DQS_RN5

G18

FBC_DQS_RN6

F21

FBC_DQS_RN7

N15E-GX-A2_BGA1745 ~D

FBC_D[0..63]

FBC_D[0..63]<53>

FBC_DBI0#<53>

FBC_DBI1#<53>
FBC_DBI2#<53>
FBC_DBI3#<53>
FBC_DBI4#<53>

FBC_DBI5#<53>
FBC_DBI6#<53>
FBC_DBI7#<53>

FBC_EDC[7..0]<5 3>

3

MEMORY

FBC_DEBUG0
FBC_DEBUG1

INTERFACE C

FBC_CLK0_N

FBC_CLK1_N

FBC_WCK01_N

FBC_WCKB01

FBC_WCKB01_N

FBC_WCK23_N

FBC_WCKB23

FBC_WCKB23_N

FBC_WCK45_N

FBC_WCKB45

FBC_WCKB45_N

FBC_WCK67_N

FBC_WCKB67

FBC_WCKB67_N

FBC_PLL_AVDD

FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8

FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
FBC_CMD31
FBC_CMD32
FBC_CMD33

FBC_CLK0

FBC_CLK1

FBC_WCK01

FBC_WCK23

FBC_WCK45

FBC_WCK67

B3

FBC_CAS#_L

A4

FBC_CKE_L

B4

FBC_RST#_L

A5

FBC_RAS#_L

A6

FBC_MA1_MA9_L

B6

FBC_MA0_MA10_L

B11

FBC_MA12_RFU_L

A11

FBC_ABI#_L

C12

FBC_MA6_MA11_L

A12

FBC_MA7_MA8_L

B12

FBC_WE#_L

C15

FBC_MA5_BA1_L

A15

FBC_MA4_BA2_L

B15

FBC_MA2_BA0_L

B17

FBC_MA3_BA3_L

A17

FBC_CS#_L

C27

FBC_CAS#_H

B27

FBC_CKE_H

A27

FBC_RST#_H

C26

FBC_RAS#_H

A26

FBC_MA1_MA9_H

B26

FBC_MA0_MA10_H

A23

FBC_MA12_RFU_H

B23

FBC_ABI#_H

B21

FBC_MA6_MA11_H

A21

FBC_MA7_MA8_H

C21

FBC_WE#_H

A20

FBC_MA5_BA1_H

B20

FBC_MA4_BA2_H

C20

FBC_MA2_BA0_H

C18

FBC_MA3_BA3_H

B18

FBC_CS#_H

D18
A18

C9
C24

F15

FBC_CLK0

E15

FBC_CLK0#

J18

FBC_CLK1

K18

FBC_CLK1#

F8

FBC_WCK0

G8

FBC_WCK0_N

H9
G9
H12
J12

FBC_WCK1_N

C11
D11
D26

FBC_WCK2

E26

FBC_WCK2_N

H24
J24
J20

FBC_WCK3

K20

FBC_WCK3_N

J21
K21

L26

100mA

DIS@

Under GPU
close to ball : L26

1

2

+FB_PLLAVDD

CV366

0.1U_0402_16V7 K

FBC_CLK0 <53>
FBC_CLK0# <53>
FBC_CLK1 <53>
FBC_CLK1# <53>

FBC_CKE_L
FBC_CKE_H

FBC_RST#_L
FBC_RST#_H

FBC_CAS#_L < 53>
FBC_CKE_L <53>
FBC_RST#_L <53>
FBC_RAS#_L < 53>
FBC_MA1_MA9_L <53>
FBC_MA0_MA10_L <53>
FBC_MA12_RFU_L <53>
FBC_ABI#_L <53>
FBC_MA6_MA11_L <53>
FBC_MA7_MA8_L <53>
FBC_WE#_L <53>
FBC_MA5_BA1_L <53>
FBC_MA4_BA2_L <53>
FBC_MA2_BA0_L <53>
FBC_MA3_BA3_L <53>
FBC_CS#_L <53>
FBC_CAS#_H <53>
FBC_CKE_H <53 >
FBC_RST#_H <5 3>
FBC_RAS#_H <53>
FBC_MA1_MA9_H <53>
FBC_MA0_MA10_H <53>
FBC_MA12_RFU_H <53>
FBC_ABI#_H <5 3>
FBC_MA6_MA11_H <53>
FBC_MA7_MA8_H <53>
FBC_WE#_H <5 3>
FBC_MA5_BA1_H <53>
FBC_MA4_BA2_H <53>
FBC_MA2_BA0_H <53>
FBC_MA3_BA3_H <53>
FBC_CS#_H <5 3>

FBC_WCK0 <53>
FBC_WCK0_N <53>

FBC_WCK1_N <53>

FBC_WCK2 <53>
FBC_WCK2_N <53>

FBC_WCK3 <53>
FBC_WCK3_N <53>

12

12

+1.35VS_VGA

RV147
10K_0402_5%

RV115
10K_0402_5%

2

UV1G

Part 7 of 12

AF7

FBD_D0

FBD_D0

AF9

FBD_D1

FBD_D1

AF6

FBD_D2

FBD_D2

AF8

FBD_D3

FBD_D3

AG7

FBD_D4

FBD_D4

AG6

FBD_D5

FBD_D5

AG9

FBD_D6

FBD_D6

AG8

FBD_D7

FBD_D7

AC5

FBD_D8

FBD_D8

AA4

FBD_D9

FBD_D9

AC4

FBD_D10

FBD_D10

AC3

FBD_D11

FBD_D11

AD4

FBD_D12

FBD_D12

AD2

FBD_D13

FBD_D13

AD5

FBD_D14

FBD_D14

AD1

FBD_D15

FBD_D15

R4

FBD_D16

FBD_D16

U3

FBD_D17

FBD_D17

U4

FBD_D18

FBD_D18

U5

FBD_D19

FBD_D19

V6

FBD_D20

FBD_D20

V5

FBD_D21

FBD_D21

Y4

FBD_D22

FBD_D22

Y5

FBD_D23

FBD_D23

Y6

FBD_D24

FBD_D24

Y7

FBD_D25

FBD_D25

Y8

FBD_D26

FBD_D26

AC9

FBD_D27

FBD_D27

AC7

FBD_D28

FBD_D28

AC6

FBD_D29

FBD_D29

AC8

FBD_D30

FBD_D30

AC10

FBD_D31

FBD_D31

H2

FBD_D32

FBD_D32

H4

FBD_D33

FBD_D33

H1

FBD_D34

FBD_D34

H3

FBD_D35

FBD_D35

F5

FBD_D36

FBD_D36

E2

FBD_D37

FBD_D37

E4

FBD_D38

FBD_D38

D3

FBD_D39

FBD_D39

J4

FBD_D40

FBD_D40

L5

FBD_D41

FBD_D41

J2

FBD_D42

FBD_D42

J1

FBD_D43

FBD_D43

J6

FBD_D44

FBD_D44

H5

FBD_D45

FBD_D45

L9

FBD_D46

FBD_D46

L8

FBD_D47

FBD_D47

U10

FBD_D48

FBD_D48

U7

FBD_D49

FBD_D49

U9

FBD_D50

FBD_D50

R7

FBD_D51

FBD_D51

R10

FBD_D52

FBD_D52

P10

FBD_D53

FBD_D53

P8

FBD_D54

FBD_D54

P9

FBD_D55

FBD_D55

P5

FBD_D56

FBD_D56

P6

FBD_D57

FBD_D57

P2

FBD_D58

FBD_D58

P1

FBD_D59

FBD_D59

M5

FBD_D60

FBD_D60

M6

FBD_D61

FBD_D61

M7

FBD_D62

FBD_D[0..63]

FBD_D[0..63]<54>

FBD_DBI0#<54>

FBD_DBI1#<54>
FBD_DBI2#<54>
FBD_DBI3#<54>

FBD_DBI4#<54>

FBD_DBI5#<54>
FBD_DBI6#<54>
FBD_DBI7#<54>

FBD_EDC[7..0]<5 4>

12

RV148
10K_0402_5%

12

RV146
10K_0402_5%

2

FBD_D62

P7

FBD_D63

FBD_D63

AG10

FBD_DBI0#

FBD_DQM0

AA5

FBD_DBI1#

FBD_DQM1

U6

FBD_DBI2#

FBD_DQM2

AA8

FBD_DBI3#

FBD_DQM3

E3

FBD_DBI4#

FBD_DQM4

J5

FBD_DBI5#

FBD_DQM5

U8

FBD_DBI6#

FBD_DQM6

M4

FBD_DBI7#

FBD_DQM7

AG5

FBD_EDC0

FBD_DQS_WP0

AD7

FBD_EDC1

FBD_DQS_WP1

V8

FBD_EDC2

FBD_DQS_WP2

AA7

FBD_EDC3

FBD_DQS_WP3

F4

FBD_EDC4

FBD_DQS_WP4

L7

FBD_EDC5

FBD_DQS_WP5

R8

FBD_EDC6

FBD_DQS_WP6

P3

FBD_EDC7

FBD_DQS_WP7

AG4

FBD_DQS_RN0

AD6

FBD_DQS_RN1

V7

FBD_DQS_RN2

AA6

FBD_DQS_RN3

F3

FBD_DQS_RN4

L6

FBD_DQS_RN5

R9

FBD_DQS_RN6

P4

FBD_DQS_RN7

N15E-GX-A2_BGA1745 ~D

Security Classif ication

Security Classif ication

Security Classif ication

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AG3

FBD_CAS#_L

FBD_CMD0

AG2

FBD_CKE_L

FBD_CMD1

AG1

FBD_RST#_L

FBD_CMD2

AF3

FBD_RAS#_L

FBD_CMD3

AF1

FBD_MA1_MA9_L

FBD_CMD4

AF2

FBD_MA0_MA10_L

FBD_CMD5

AC1

FBD_MA12_RFU_L

FBD_CMD6

AC2

FBD_ABI#_L

FBD_CMD7

AA2

FBD_MA6_MA11_L

FBD_CMD8

AA1

FBD_MA7_MA8_L

FBD_CMD9

AA3

FBD_WE#_L

FBD_CMD10

Y1

FBD_MA5_BA1_L

FBD_CMD11

Y2

FBD_MA4_BA2_L

FBD_CMD12

Y3

FBD_MA2_BA0_L

FBD_CMD13

V3

FBD_MA3_BA3_L

FBD_CMD14

V2

FBD_CS#_L

FBD_CMD15

C2

FBD_CAS#_H

FBD_CMD16

D1

FBD_CKE_H

FBD_CMD17

D2

FBD_RST#_H

FBD_CMD18

E1

FBD_RAS#_H

FBD_CMD19

F2

FBD_MA1_MA9_H

FBD_CMD20

F1

FBD_MA0_MA10_H

FBD_CMD21

L2

FBD_MA12_RFU_H

FBD_CMD22

L1

FBD_ABI#_H

FBD_CMD23

M3

FBD_MA6_MA11_H

FBD_CMD24

M1

FBD_MA7_MA8_H

FBD_CMD25

M2

FBD_WE#_H

FBD_CMD26

R3

FBD_MA5_BA1_H

FBD_CMD27

R1

FBD_MA4_BA2_H

FBD_CMD28

R2

FBD_MA2_BA0_H

FBD_CMD29

U2

FBD_MA3_BA3_H

FBD_CMD30

U1

FBD_CS#_H

FBD_CMD31

V1

FBD_CMD32

V4

FBD_CMD33

AD3

FBD_DEBUG0

J3

FBD_DEBUG1

V9

FBD_CLK0

FBD_CLK0

V10

MEMORY

FBD_CLK0#

INTERFACE D

FBD_CLK0_N

R6

FBD_CLK1

FBD_CLK1

R5

FBD_CLK1#

FBD_CLK1_N

AF4

FBD_WCK0

FBD_WCK01

AF5

FBD_WCK0_N

FBD_WCK01_N

AD8

FBD_WCKB01

AD9

FBD_WCKB01_N

Y9

FBD_WCK1

FBD_WCK23

Y10

FBD_WCK1_N

FBD_WCK23_N

AA9

FBD_WCKB23

AA10

FBD_WCKB23_N

H6

FBD_WCK2

FBD_WCK45

H7

FBD_WCK2_N

FBD_WCK45_N

J8

FBD_WCKB45

J7

FBD_WCKB45_N

M8

FBD_WCK3

FBD_WCK67

M9

FBD_WCK3_N

FBD_WCK67_N

L3

FBD_WCKB67

L4

FBD_WCKB67_N

AA11

100mA

DIS@

Under GPU
close to ball : AA11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphere d Date

Deciphere d Date

Deciphere d Date

+FB_PLLAVDD

1

2

CV367

0.1U_0402_16V7 K

FBD_PLL_AVDD

2014/2/1 1 2 014/2/11

2014/2/1 1 2 014/2/11

2014/2/1 1 2 014/2/11

FBD_CAS#_L <54>
FBD_CKE_L <54>
FBD_RST#_L <54>
FBD_RAS#_L <54>
FBD_MA1_MA9_L <54>
FBD_MA0_MA10_L <54>
FBD_MA12_RFU_L <54>
FBD_ABI#_L <54>
FBD_MA6_MA11_L <54>
FBD_MA7_MA8_L <54>
FBD_WE#_L <54>
FBD_MA5_BA1_L <54>
FBD_MA4_BA2_L <54>
FBD_MA2_BA0_L <54>
FBD_MA3_BA3_L <54>
FBD_CS#_L <54>
FBD_CAS#_H <5 4>
FBD_CKE_H <54 >
FBD_RST#_H <5 4>
FBD_RAS#_H <5 4>
FBD_MA1_MA9_H <54>
FBD_MA0_MA10_H <54>
FBD_MA12_RFU_H <5 4>
FBD_ABI#_H <54>
FBD_MA6_MA11_H <54>
FBD_MA7_MA8_H <54>
FBD_WE#_H <54>
FBD_MA5_BA1_H <54>
FBD_MA4_BA2_H <54>
FBD_MA2_BA0_H <54>
FBD_MA3_BA3_H <54>
FBD_CS#_H <54>

FBD_CLK0 <54>
FBD_CLK0# <54>
FBD_CLK1 <54>
FBD_CLK1# <54>

FBD_WCK0 <54>
FBD_WCK0_N <54>

FBD_WCK1 <54>
FBD_WCK1_N <54>

FBD_WCK2 <54>
FBD_WCK2_N <54>

FBD_WCK3 <54>
FBD_WCK3_N <54>

FBD_CKE_L
FBD_CKE_H

FBD_RST#_L
FBD_RST#_H

1

+1.35VS_VGA

12

12

RV152

RV150

10K_0402_5%

10K_0402_5%

12

12

RV151

RV149

10K_0402_5%

10K_0402_5%

Title

Title

Title

N15P-GX (5/5) POWER/ GND

N15P-GX (5/5) POWER/ GND

N15P-GX (5/5) POWER/ GND

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

48 69W ednesday, Ma rch 26, 201 4

48 69W ednesday, Ma rch 26, 201 4

48 69W ednesday, Ma rch 26, 201 4

0.1

0.1

0.1

5

For GDDR5 setting. Near GPU

+1.35VS_VGA

2

2

2

2

CV81

CV89

CV90

CV93

1

1

1

1

10U_0603_6.3V6M

10U_0603_6.3V6M

D D

+1.35VS_VGA

1

1

CV142

CV141

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

C C

FBVDD/FBVDDQ
(+1.35VS_VGA)

GPU

22uF 10uF 4.7uF

6 6 10

1U_0402_6.3V6K

Memory

22uF 10uF 4.7uF

FBx_PLL_DLL_AVDD
+GPU_PLLVDD(1.05)

FBx_PLL_AVDD
+FB_PLLAVDD(3.3)

B B

PEX_IOVDD/Q(1.05)

1 1X4

22uF 10uF 4.7uF 1uF 0.1uF

4 4 2

+1.35VS_VGA

1

2

4.7U_0603_6.3V6K

Under GPU(below 150mils)

1

1

CV100

2

2

1U_0402_6.3V6K

1

CV101

CV102

2

1U_0402_6.3V6K

1uF 0.1uF

14 8

4X82X8 10X8

1uF 0.1uF

4

1

2

1U_0402_6.3V6K

+1.35VS_VGA

CV103

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

CV144

CV143

CV146

2

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

1

CV113

CV112

2

2

1U_0402_6.3V6K

1

1

CV209

CV206

2

2

0.1U_0402_10V7K

0.1U_0402_10V7K

11 1PEX_PLLVDD(1.05)

PEX_SVDD_3V3
+3.3V_GFX_AON

2 1

22uF 10uF 4.7uF 1uF 0.1uF

3V3_Main
+3VS_VGA

3V3_AON
+3.3V_GFX_AON

1.05V

A A

SP_PLLVDD
VID_PLLVDD

GPU_PLLAVDD

22uF 10uF 4.7uF 1uF 0.1uF

1

1

5

1

1

2

11

1

1

1X2

5

4

2

1

2

CV139

1

10U_0603_6.3V6M

1

CV145

2

1

CV105

2

1U_0402_6.3V6K

1

CV207

2

0.1U_0402_10V7K

1

CV137

CV140

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

1

CV83

CV91

2

2

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

1

CV104

CV107

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CV205

CV208

2

2

0.1U_0402_10V7K

0.1U_0402_10V7K

1

CV138

2

22U_0805_6.3V6M

CV82

4.7U_0603_6.3V6K

1

2

1U_0402_6.3V6K

1

2

0.1U_0402_10V7K

+1.35VS_VGA

CV85

22U_0805_6.3V6M

1

CV110

2

CV106

CV215

1

1

1

CV88

CV86

2

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

CV92

CV84

2

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

1

CV135

CV136

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CV204

CV203

2

2

0.1U_0402_10V7K

0.1U_0402_10V7K

FB_VDDQ_SENSE<64>

1 2
1 2

RV77 40.2_0402_ 1%

1 2

RV78 40.2_0402_ 1%
RV79 60.4_0402_ 1%

Place near balls

4

UV1H

FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

B47

FBVDDQ

C45

FBVDDQ

C46

FBVDDQ

C47

FBVDDQ

D44

FBVDDQ

D45

FBVDDQ

D46

FBVDDQ

E44

FBVDDQ

E45

FBVDDQ

F42

FBVDDQ

F44

FBVDDQ

F45

FBVDDQ

G41

FBVDDQ

G42

FBVDDQ

H41

FBVDDQ

H42

FBVDDQ

H43

FBVDDQ

J38

FBVDDQ

J39

FBVDDQ

J42

FBVDDQ

J43

FBVDDQ

K24

FBVDDQ

K26

FBVDDQ

K29

FBVDDQ

K30

FBVDDQ

K32

FBVDDQ

L14

FBVDDQ

L15

FBVDDQ

L17

FBVDDQ

L18

FBVDDQ

L20

FBVDDQ

L23

FBVDDQ

L24

FBVDDQ

L27

FBVDDQ

L29

FBVDDQ

L30

FBVDDQ

L32

FBVDDQ

L33

FBVDDQ

L35

FBVDDQ

L41

FBVDDQ

P11

FBVDDQ

P39

FBVDDQ

R11

FBVDDQ

R40

FBVDDQ

U11

FBVDDQ

U39

FBVDDQ

V11

FBVDDQ

V39

FBVDDQ

V40

FBVDDQ

Y11

FBVDDQ

Y40

FBVDDQ

PROBE_FBVDDQ
PROBE_FB_GND

R49

FB_VDDQ_SENSE

P40

FB_CAL_PD_VDDQ

R48

FB_CAL_PU_GND

R47

FB_CALTERM_GND

N15E-GX-A2_BGA1745~D

Part 8 of 12

POWER

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

PEX_PLL_HVDD
PEX_SVDD_3V3

PEX_PLLVDD

IFPAB_PLLVDD

IFPAB_RSET

IFPA_IOVDD
IFPA_IOVDD

IFPB_IOVDD
IFPB_IOVDD

IFPC_PLLVDD

IFPC_IOVDD
IFPC_IOVDD

IFPD_PLLVDD

IFPD_IOVDD
IFPD_IOVDD

IFPEF_PLVDD

IFPEF_RSET

IFPE_IOVDD
IFPE_IOVDD

IFPF_IOVDD
IFPF_IOVDD

AA39
AC11
AD10

CV87

AD39

AF11

AF39
AG39
AK39
AM39
AM40
AN40

AG11

AF10

PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

3V3_MISC
3V3_MISC

IFPC_RSET

IFPD_RSET

3

AW33
AY32
AY33
AY35
BA33
BA35
BB33

AY24
AY26
AY27
AY29
AY30
BA24
BA26
BA27
BA29
BA30
BA32
BB24
BB27
BB30

AW30

PEX_PLL_HVDD

AW32
AW26

PEX_PLLVDD

AW15

Under GPU

AY15
AJ10
AJ11
AK11
AM11
AN11
AR11

AW17
AY17

BB15
BE18

BB17
BA17

BA18
BB18

BB12
BB14

BA11
BA12

BB11
BE12

BA14
BA15

BB9
BF11

BC8
BD8

BC9
BD9

1

2

0.1U_0402_10V7K

3

Under GPU3500mA Near GPU

1

CV118

1

2

22U_0805_6.3V6M

CV96

2

1U_0402_6.3V6K

1

CV120

CV115

2

22U_0805_6.3V6M

Near GPU

1

CV114

2

1U_0402_6.3V6K

1

1

CV117

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CV97

CV116

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

210mA

+3VS_VGA

1

1

CV132

3V3_MISC

1U_0603_10V6K

1

CV127

2

2

0.1U_0402_10V7K

0.1U_0402_10V7K

1

1

CV133

CV134

2

2

4.7U_0805_25V6-K

1

CV128

CV129

CV130

2

2

1U_0603_10V6K

4.7U_0805_25V6-K

N15@

1 2

RV536 0_0402_5%

1 2

RV537 0_0402_5%

N16@

+3VS_VGA

1

CV119

2

4.7U_0603_6.3V6K

+1.05VS_VGA

1

2

CV95

CV99

2

1

10U_0603_6.3V6M

10U_0603_6.3V6M

4.7U_0603_6.3V6K

+3VS_VGA +3.3V_GFX_AON

RV534
0_0402_5%

N15@

1

1

CV123

CV122

2

2

0.1U_0402_10V7K

4.7U_0603_6.3V6K

Under GPU

1

1

CV126

2

2

1U_0603_10V6K

0.1U_0402_10V7K

+3.3V_GFX_AON

RV541

3V3_MAIN_EN

3V3_MAIN_EN<46,63>

GPU_PGOOD<46,63>

+1.05VS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

CV94

1

1 2

1

2

4.7U_0603_6.3V6K

CV124

4.7U_0805_25V6-K

+3.3V_GFX_AON

2

+1.05VS_VGA

2

2

CV98

CV111

1

1

10U_0603_6.3V6M

10U_0603_6.3V6M

CV121

+1.05VS_VGA

1

CV125

2

12

RV535
0_0402_5%

N16@

I2CC_SCL<46>
I2CC_SDA<46>

DGPU_PWR_EN<21,46,63>

+3VS_VGA / +1.05VS_VGA

12

+3.3V_GFX_AON

10K_0402_5%

UV11

1
2

3

4

5

GPU_PGOOD

6
7

AOZ1331_SON14_2X3

2014/2/1 1 201 4/2/11

2014/2/1 1 201 4/2/11

2014/2/1 1 201 4/2/11

2

VIN1
VIN1

ON1

VBIAS

ON2

VIN2
VIN2

14

VOUT1

13

VOUT1

12

CT1

11

GND

10

CT2

9

VOUT2

8

VOUT2

15

GPAD

Compal Secret Data

Compal Secret Data

Compal Secret Data

12

RV551

1.8K_0402_1%

VIN1N
VIN1P

VIN2N
VIN2P

I2CC_SCL
I2CC_SDA

CV368

1 2

@

CV369

1 2

@

Deciphered Date

Deciphered Date

Deciphered Date

+3VS_VGA

12

RV552

1.8K_0402_1%

+3VS

12

RV538

10K_0402_5%

60 mil

220P_0402_50V8J

220P_0402_50V8J

60 mil

11
12

14
15

4

1
2

6
7

+3VS_VGA

VS

IN-1
IN+1

IN-2
IN+2

IN-3
IN+3

SCL
SDA

+3VS_VGA

100P_0402_50V8J~D

1

CV408

2

UV20

INA3221AIRGVR_VQFN16_ 4X4

CSSP_B+<63>

CSSN_B+<63>

CSSP_VGA<63>

CSSN_VGA<63>

Critical

Warning

VPU

TC

PV

A0

GND

12

16

RV243

10K_0402_1%

13

10

9

8

5

RV241 10K_0402_1%

3

1 2

CSSP_B+

RV540 10_0402 _1%

1 2

CSSN_B+

RV542 10_0402 _1%

1 2

CSSP_VGA

RV543 10_0402 _1%

1 2

CSSN_VGA

RV544 10_0402 _1%

+3.3V_GFX_AON

+5VALW +3VS

100K_0402_5%

12

LP2301ALT1G_SOT23-3

RV210

DGPU_PWR_EN#

L2N7002WT1G_SC-70-3

13

D

QV87

2

G

S

+1.05VS_VGA

Title

Title

Title

Size Document Number R ev

Size Document Number R ev

Size Document Number R ev

Custom

Custom

Custom

Date: Sheet o f

Date: Sheet o f

Date: Sheet o f

1

12

RV242

10K_0402_1%

0_0402_5%

1 2

RV553

@

1 2

RV554 0_0402_5%

12

+3.3V_GFX_AON

QV86

D

S

123

G

QV90

2N7002K_SOT23-3

@

N15P-GX (1/5) PEG & DAC

N15P-GX (1/5) PEG & DAC

N15P-GX (1/5) PEG & DAC

LA-B751P

LA-B751P

LA-B751P

1

10U_0603_6.3V6M

10U_0603_6.3V6M

12

13

D

S

2

1

2

1

RV549
470_0603_5%

@

GPIO8_THERM_SHDW N# <46>

VIN1P

CV409

VIN1N

VIN2P

CV410

VIN2N

12

RV550

2

1 2

10K_0402_5%

G

CV78

0.1U_0402_10V7K

1

@

2

0.1U_0402_25V6

GPIO3_OC_WARN# <46>

CV363

@

DGPU_PWR_EN#

49 69Wednesday, March 26, 2014

49 69Wednesday, March 26, 2014

49 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

4

3

2

1

+VGA_CORE +VGA_CORE

D D

C C

B B

+VGA_CORE 11 4 40

+VGA_CORE

1

1

2

+VGA_CORE

A A

4.7U_0603_6.3V6K

1

2

4.7U_0603_6.3V6K

+VGA_CORE

1

CV325

CV159

2

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

1

CV335

CV326

2

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

1

2

2

CV411

CV412

4.7U_0805_10V4Z

4.7U_0805_10V4Z

5

CV323

CV332

1

2

4.7U_0603_6.3V6K

1

2

4.7U_0603_6.3V6K

1

2

4.7U_0805_10V4Z

UV1I

AA14

VDD

AA16

VDD

AA18

VDD

AA20

VDD

AA22

VDD

AA24

VDD

AA26

VDD

AA28

VDD

AA30

VDD

AA32

VDD

AB15

VDD

AB17

VDD

AB19

VDD

AB21

VDD

AB23

VDD

AB25

VDD

AB27

VDD

AB29

VDD

AB31

VDD

AC14

VDD

AC16

VDD

AC18

VDD

AC20

VDD

AC22

VDD

AC24

VDD

AC26

VDD

AC28

VDD

AC30

VDD

AC32

VDD

AD15

VDD

AD17

VDD

AD19

VDD

AD21

VDD

AD23

VDD

AD25

VDD

AD27

VDD

AD29

VDD

AD31

VDD

AE14

VDD

AE16

VDD

AE18

VDD

AE20

VDD

AE22

VDD

AE24

VDD

AE26

VDD

AE28

VDD

AE30

VDD

AE32

VDD

AF15

VDD

AF17

VDD

AF19

VDD

AF21

VDD

AF23

VDD

AF25

VDD

AF27

VDD

AF29

VDD

AF31

VDD

AG14

VDD

AG16

VDD

AG18

VDD

AG20

VDD

AG22

VDD

AG24

VDD

AG26

VDD

AG28

VDD

AG30

VDD

AG32

VDD

AH15

VDD

AH17

VDD

AH19

VDD

AH21

VDD

AH23

VDD

AH25

VDD

AH27

VDD

AH29

VDD

N15E-GX-A2_BGA1745~D

1

CV319

2

4.7U_0603_6.3V6K

1

CV329

2

4.7U_0603_6.3V6K

1

2

CV414

CV413

4.7U_0805_10V4Z

CV317

CV328

4.7U_0805_10V4Z

Part 9 of 12

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

2

1

CV324

2

4.7U_0603_6.3V6K

1

CV334

2

4.7U_0603_6.3V6K

CV415

AH31

VDD

AJ14

VDD

AJ16

VDD

AJ18

VDD

AJ20

VDD

AJ22

VDD

AJ24

VDD

AJ26

VDD

AJ28

VDD

AJ30

VDD

AJ32

VDD

AK15

VDD

AK17

VDD

AK19

VDD

AK21

VDD

AK23

VDD

AK25

VDD

AK27

VDD

AK29

VDD

AK31

VDD

AL14

VDD

AL16

VDD

AL18

VDD

AL20

VDD

AL22

VDD

AL24

VDD

AL26

VDD

AL28

VDD

AL30

VDD

AL32

VDD

AM15

VDD

AM17

VDD

AM19

VDD

AM21

VDD

AM23

VDD

AM25

VDD

AM27

VDD

AM29

VDD

AM31

VDD

AM32

VDD

AN39

VDD

AP39

VDD

AR39

VDD

AR40

VDD

AR41

VDD

AT39

VDD

AT40

VDD

AT41

VDD

AU39

VDD

AU41

VDD

AU42

VDD

AV41

VDD

AV42

VDD

AV43

VDD

AV44

VDD

AW35

VDD

AW36

VDD

AW37

VDD

AW41

VDD

AW42

VDD

AW43

VDD

AW44

VDD

AW45

VDD

AY36

VDD

AY42

VDD

AY45

VDD

BA36

VDD

BA37

VDD

BA38

VDD

Y31

VDD

4.7uF10uF22uFNVVDD 0.1uF

1

1

CV318

CV322

2

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

1

CV333

CV327

2

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

CV379

2

0.1U_0402_10V7K

20

1

1

CV320

CV321

2

2

4.7U_0603_6.3V6K

1

1

CV330

CV331

2

2

4.7U_0603_6.3V6K

1

CV380

2

0.1U_0402_10V7K

+VGA_CORE +VGA_CORE

4

UV1J

BA39

VDD

BA42

VDD

BA43

VDD

BA44

VDD

BA45

VDD

BA46

VDD

BB37

VDD

BB38

VDD

BB39

VDD

BB40

VDD

BB41

VDD

BB42

VDD

BB43

VDD

BB44

VDD

BB45

VDD

BB46

VDD

BB47

VDD

BC38

VDD

BC39

VDD

BC41

VDD

BC42

VDD

BC45

VDD

BC46

VDD

BD38

VDD

BD39

VDD

BD41

VDD

BD42

VDD

BD44

VDD

BD45

VDD

BD46

VDD

BD47

VDD

BD48

VDD

BD49

VDD

BE38

VDD

BE39

VDD

BE40

VDD

BE41

VDD

BE42

VDD

BE43

VDD

BE44

VDD

BE45

VDD

BE46

VDD

BE47

VDD

BE48

VDD

BE49

VDD

BF38

VDD

BF39

VDD

BF40

VDD

BF41

VDD

BF42

VDD

BF43

VDD

BF44

VDD

BF45

VDD

BF46

VDD

BF47

VDD

BF48

VDD

BF49

VDD

BG39

VDD

BG41

VDD

BG42

VDD

BG44

VDD

BG45

VDD

BG46

VDD

BG47

VDD

BG48

VDD

BG49

VDD

BH39

VDD

BH40

VDD

BH41

VDD

BH42

VDD

BH43

VDD

BH44

VDD

BH45

VDD

BH46

VDD

BH47

VDD

N15E-GX-A2_BGA1745~D

Part 10 of 12

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

BH48
BH49
BJ39
BJ41
BJ42
BJ44
BJ45
BJ46
BJ47
BJ48
P15
P17
P19
P21
P23
P25
P27
P29
P31
R14
R16
R18
R20
R22
R24
R26
R28
R30
R32
T15
T17
T19
T21
T23
T25
T27
T29
T31
U14
U16
U18
U20
U22
U24
U26
U28
U30
U32
V15
V17
V19
V21
V23
V25
V27
V29
V31
W14
W16
W18
W20
W22
W24
W26
W28
W30
W32
Y15
Y17
Y19
Y21
Y23
Y25
Y27
Y29

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

UV1K

A2

GND

A3

GND

A47

GND

A48

GND

AA15

GND

AA17

GND

AA19

GND

AA21

GND

AA23

GND

AA25

GND

AA27

GND

AA29

GND

AA31

GND

AB11

GND

AB14

GND

AB16

GND

AB18

GND

AB2

GND

AB20

GND

AB22

GND

AB24

GND

AB26

GND

AB28

GND

AB30

GND

AB32

GND

AB39

GND

AB4

GND

AB41

GND

AB42

GND

AB45

GND

AB46

GND

AB48

GND

AB5

GND

AB8

GND

AB9

GND

AC15

GND

AC17

GND

AC19

GND

AC21

GND

AC23

GND

AC25

GND

AC27

GND

AC29

GND

AC31

GND

AD14

GND

AD16

GND

AD18

GND

AD20

GND

AD22

GND

AD24

GND

AD26

GND

AD28

GND

AD30

GND

AD32

GND

AE11

GND

AE15

GND

AE17

GND

AE19

GND

AE2

GND

AE21

GND

AE23

GND

AE25

GND

AE27

GND

AE29

GND

AE31

GND

AE39

GND

AE4

GND

AE41

GND

AE42

GND

AE45

GND

AE46

GND

AE48

GND

AE5

GND

AE8

GND

AE9

GND

AF14

GND

AF16

GND

AF18

GND

AF20

GND

AF22

GND

AF24

GND

AF26

GND

AF28

GND

AF30

GND

AF32

GND

AG15

GND

AG17

GND

AG19

GND

AG21

GND

AG23

GND

AG25

GND

AG27

GND

AG29

GND

AG31

GND

AH11

GND

AH14

GND

AH16

GND

AH18

GND

AH2

GND

AH20

GND

AH22

GND

AH24

GND

AH26

GND

AH28

GND

AH30

GND

AH32

GND

AH39

GND

AH4

GND

AH41

GND

AH42

GND

AH45

GND

AH46

GND

AH48

GND

AH5

GND

AH8

GND

AH9

GND

AJ15

GND

AJ17

GND

AJ19

GND

AJ21

GND

AJ23

GND

N15E-GX-A2_BGA1745~D

Part 11 of 12

AJ25

GND

AJ27

GND

AJ29

GND

AJ31

GND

AK14

GND

AK16

GND

AK18

GND

AK20

GND

AK22

GND

AK24

GND

AK26

GND

AK28

GND

AK30

GND

AK32

GND

AL11

GND

AL15

GND

AL17

GND

AL19

GND

AL2

GND

AL21

GND

AL23

GND

AL25

GND

AL27

GND

AL29

GND

AL31

GND

AL39

GND

AL4

GND

AL41

GND

AL42

GND

AL45

GND

AL46

GND

AL48

GND

AL5

GND

AL8

GND

AL9

GND

AM14

GND

AM16

GND

AM18

GND

AM20

GND

AM22

GND

AM24

GND

AM26

GND

AM28

GND

AM30

GND

AP11

GND

AP2

GND

AP4

GND

AP41

GND

AP42

GND

AP45

GND

AP46

GND

AP48

GND

AP5

GND

AP8

GND

AP9

GND

AT42

GND

AU11

GND

AU2

GND

AU4

GND

AU45

GND

AU46

GND

AU48

GND

AU5

GND

AU8

GND

AU9

GND

AW13

GND

AW16

GND

AW19

GND

AW22

GND

AW25

GND

AW29

GND

AW31

GND

AW34

GND

AY2

GND

AY4

GND

AY46

GND

AY48

GND

AY5

GND

AY8

GND

B1

GND

B10

GND

B13

GND

B16

GND

B19

GND

B2

GND

B22

GND

B25

GND

B28

GND

B31

GND

B34

GND

B37

GND

B40

GND

B43

GND

B45

GND

B48

GND

B49

GND

B7

GND

BA13

GND

BA16

GND

BA19

GND

BA22

GND

BA25

GND

BA28

GND

BA31

GND

BA34

GND

BB10

GND

BB13

GND

BB16

GND

BB19

GND

BB22

GND

BB23

GND

BB25

GND

BB26

GND

BB28

GND

BB29

GND

BB31

GND

Y32

GND

AW24

GND

BB21

GND

Compal Secret Data

Compal Secret Data

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

UV1L

BB32

Part 12 of 12

GND

BB34

GND

BB35

GND

BB36

GND

BB8

GND

BC2

GND

BC4

GND

BC48

GND

BC5

GND

BE10

GND

BE13

GND

BE16

GND

BE19

GND

BE2

GND

BE21

GND

BE24

GND

BE27

GND

BE30

GND

BE33

GND

BE36

GND

BE37

GND

BE4

GND

BE7

GND

BF10

GND

BF13

GND

BF16

GND

BF19

GND

BF22

GND

BF23

GND

BF24

GND

BF25

GND

BF26

GND

BF27

GND

BF28

GND

BF29

GND

BF30

GND

BF31

GND

BF32

GND

BF33

GND

BF34

GND

BF35

GND

BF36

GND

BF37

GND

BF5

GND

BF7

GND

BG1

GND

BH1

GND

BH10

GND

BH13

GND

BH16

GND

BH19

GND

BH2

GND

BH22

GND

BH25

GND

BH28

GND

BH31

GND

BH34

GND

BH37

GND

BH5

GND

BH7

GND

BJ2

GND

BJ3

GND

C1

GND

C3

GND

C49

GND

D10

GND

D13

GND

D16

GND

D19

GND

D22

GND

D25

GND

D28

GND

D31

GND

D34

GND

D37

GND

D4

GND

D40

GND

D43

GND

D7

GND

E10

GND

E13

GND

E16

GND

E19

GND

E22

GND

E25

GND

E28

GND

E31

GND

E34

GND

E37

GND

E40

GND

E43

GND

E46

GND

E48

GND

E5

GND

E7

GND

F6

GND

G2

GND

G4

GND

G45

GND

G46

GND

G48

GND

G5

GND

H10

GND

H13

GND

H16

GND

H19

GND

H22

GND

H25

GND

H28

GND

H31

GND

H34

GND

H37

GND

H40

GND

H8

GND

J13

GND

J16

GND

J19

GND

J22

GND

J25

GND

J28

GND

J31

GND

N15E-GX-A2_BGA1745~D

Title

Title

Title

N15P-GX (1/5) PEG & DAC

N15P-GX (1/5) PEG & DAC

N15P-GX (1/5) PEG & DAC

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

K2

GND

K4

GND

K42

GND

K45

GND

K46

GND

K48

GND

K5

GND

K8

GND

L13

GND

L16

GND

L19

GND

L22

GND

L25

GND

L28

GND

L31

GND

L34

GND

L37

GND

N11

GND

N2

GND

N39

GND

N4

GND

N41

GND

N42

GND

N45

GND

N46

GND

N48

GND

N5

GND

N8

GND

N9

GND

P14

GND

P16

GND

P18

GND

P20

GND

P22

GND

P24

GND

P26

GND

P28

GND

P30

GND

P32

GND

R15

GND

R17

GND

R19

GND

R21

GND

R23

GND

R25

GND

R27

GND

R29

GND

R31

GND

T11

GND

T14

GND

T16

GND

T18

GND

T2

GND

T20

GND

T22

GND

T24

GND

T26

GND

T28

GND

T30

GND

T32

GND

T39

GND

T4

GND

T41

GND

T42

GND

T45

GND

T46

GND

T48

GND

T5

GND

T8

GND

T9

GND

U15

GND

U17

GND

U19

GND

U21

GND

U23

GND

U25

GND

U27

GND

U29

GND

U31

GND

V14

GND

V16

GND

V18

GND

V20

GND

V22

GND

V24

GND

V26

GND

V28

GND

V30

GND

V32

GND

W11

GND

W15

GND

W17

GND

W19

GND

W2

GND

W21

GND

W23

GND

W25

GND

W27

GND

W29

GND

W31

GND

W39

GND

W4

GND

W41

GND

W42

GND

W45

GND

W46

GND

W48

GND

W5

GND

W8

GND

W9

GND

Y14

GND

Y16

GND

Y18

GND

Y20

GND

Y22

GND

Y24

GND

Y26

GND

Y28

GND

Y30

GND

J34

GND

J37

GND

50 69Wednesday, March 26, 2014

50 69Wednesday, March 26, 2014

1

50 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

4

3

2

1

Memory Partition A - Lower 32 bits

FBA_D[0..63]<48>

FBA_EDC[7..0]<48>

D D

FBA_CLK0

MEM_VREF<46,52,53,54>

FBA_CLK0#

12

RV123

80.6_0402_1%

13

2

G

5

D

S

C C

B B

A A

RV193

1 2

931_0402_1%

@

1.33K_0402_1%

RV194

1 2

931_0402_1%

1.33K_0402_1%

QV23

2N7002W-T/R7_SOT323-3

FBA_D[0..63]

FBA_EDC[7..0]

FBA_DBI0#<48>

FBA_DBI1#<48>

FBA_DBI2#<48>

FBA_DBI3#<48>

FBA_CLK0<48>

FBA_CLK0#<48>

FBA_CKE_L<48> FBA_CKE_H<48>

FBA_MA2_BA0_L< 48>

FBA_MA5_BA1_L<48>

FBA_MA4_BA2_L< 48>

FBA_MA3_BA3_L<48>

FBA_MA7_MA8_L<48>

FBA_MA1_MA9_L<48>

FBA_MA0_MA10_L<48>

FBA_MA6_MA11_L<48>

FBA_MA12_RFU_L<48>

RV120

121_0402_1%

FBA_ABI#_L<48>

FBA_RAS#_L<48>

FBA_CS#_L<48>

FBA_CAS#_L<48>

FBA_WE#_L<48>

FBA_WCK0_N<48>

FBA_WCK0<48>

FBA_WCK1_N<48>

FBA_WCK1<48>

+1.35VS_VGA

12

RV195

549_0402_1%

RV190

+1.35VS_VGA

RV189

549_0402_1%

RV196

1

CV22510U_0603_6.3V6M

2

DIS@

1

CV22410U_0603_6.3V6M

2

12

@

@

12

12

DIS@

1

2

820P_0402_25V7

one Close to UV8
one Close to UV9

@

+FBA_VREFC

1

2

820P_0402_25V7

one Close to UV8
one Close to UV9

1

1

CV2271U_0402 _6.3V4Z

CV1701U_0402 _6.3V4Z

2

2

DIS@

W=16mils

+FBA_VREFD

CV304

820P_0402_25V7

@

CV301

1

CV1691U_0402 _6.3V4Z

2

DIS@

FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3

FBA_DBI0#
FBA_DBI1#

FBA_CLK0
FBA_CLK0#

FBA_CKE_L

FBA_MA2_BA0_L
FBA_MA5_BA1_L
FBA_MA4_BA2_L
FBA_MA3_BA3_L

FBA_MA7_MA8_L

FBA_MA1_MA9_L
FBA_MA0_MA10_L
FBA_MA6_MA11_L

FBA_MA12_RFU_L

12

RV116

1K_0402_1%

12

RV118

12

1K_0402_1%

FBA_ABI#_L

FBA_RAS#_L

FBA_CS#_L

FBA_CAS#_L

FBA_WE#_L

FBA_WCK0_N
FBA_WCK0

FBA_WCK1_N
FBA_WCK1

+FBA_VREFD

+FBA_VREFC

FBA_RST#_L

+1.35VS_VGA +1.35VS_VGA

1

CV302

2

W=16mils

1

CV303

2

820P_0402_25V7

1

1

CV2230.1U_0402_10V6K

CV2280.1U_0402_10V6K

CV1731U_0402 _6.3V4Z

2

2

DIS@

DIS@

DIS@

FBA_DBI2#
FBA_DBI3#

1

2

DIS@

1

CV2260.1U_0402_10V6K

2

DIS@

UV6

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

H11

BA0/A2 BA2/A4

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

K4

A8/A7 A10/A0

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

K5

A11/A6 A9/A1

J5

A12/RFU/NC

A5

VPP/NC

U5

VPP/NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WC K23#

D4

WCK01 WCK23

P5

WCK23# WC K01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

SGRAM GDDR5

2GS@

1

1

CV1720.1U_0402_10V6K

CV1710.1U_0402_10V6K

2

2

DIS@

DIS@

170-BALL

MF=0

MF=0 MF=1 MF=0MF=1

1

1

1

CV1670.1U_0402_10V6K

CV1680.1U_0402_10V6K

CV1540.1U_0402_10V6K

2

2

2

DIS@

DIS@

4

1

CV2010.1U_0402_10V6K

2

DIS@

DIS@

DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

H5GQ1H24BFR-T2C_BGA170

1

CV2290.1U_0402_10V6K

2

DIS@

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

UV7

A4

FBA_D0

A2

FBA_D1

B4

FBA_D2

B2

FBA_D3

E4

FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9

DIS@

BYTE0

FBA_DBI7#<48>

FBA_DBI6#<48>

FBA_DBI5#<48>

BYTE1

BYTE2

BYTE3

FBA_CLK1

12

RV175

80.6_0402_1%

FBA_CLK1#

1

CV2201U_0402 _6.3V4Z

2

1

1

1

CV1661U_0402 _6.3V4Z

CV1621U_0402 _6.3V4Z

CV1631U_0402 _6.3V4Z

2

2

2

DIS@

DIS@

DIS@

1

1

1

CV2190.1U_0402_10V6K

CV2210.1U_0402_10V6K

CV2160.1U_0402_10V6K

2

2

2

DIS@

DIS@

DIS@

DIS@

FBA_DBI4#<48>

FBA_CLK1<48>

FBA_CLK1#<48>

FBA_MA4_BA2_H<48>

FBA_MA3_BA3_H<48>

FBA_MA2_BA0_H<48>

FBA_MA5_BA1_H<48>

FBA_MA0_MA10_H<48>

FBA_MA6_MA11_H<48>

FBA_MA7_MA8_H<48>

FBA_MA1_MA9_H<48>

FBA_MA12_RFU_H<48>

+1.35VS_VGA

RV121

FBA_ABI#_H<48>

FBA_CAS#_H<48 >

FBA_WE#_H<48>

FBA_RAS#_H<48>

FBA_CS#_H<48>

FBA_WCK3_N<48 >

FBA_WCK3< 48>

FBA_WCK2_N<48 >

FBA_WCK2<48>

FBA_RST#_H<48>FBA_RST#_L<48>

1

1

1

CV1610.1U_0402_10V6K

CV1650.1U_0402_10V6K

CV1640.1U_0402_10V6K

2

2

2

DIS@

DIS@

DIS@

3

12

121_0402_1%

1

CV1530.1U_0402_10V6K

2

DIS@

FBA_CLK1
FBA_CLK1#

FBA_MA4_BA2_H
FBA_MA3_BA3_H
FBA_MA2_BA0_H
FBA_MA5_BA1_H

FBA_MA0_MA10_H
FBA_MA6_MA11_H

FBA_MA7_MA8_H
FBA_MA1_MA9_H

FBA_MA12_RFU_H

RV117

1K_0402_1%

RV119

1K_0402_1%

FBA_ABI#_H

FBA_CAS#_H

FBA_WE#_H

FBA_RAS#_H

FBA_CS#_H

FBA_WCK3_N

FBA_WCK3

FBA_WCK2_N

FBA_WCK2

+FBA_VREFD

+FBA_VREFC

1

1

CV1600.1U_0402_10V6K

CV2000.1U_0402_10V6K

2

2

DIS@

DIS@

E2
F4
F2
A11
A13
B11

FBA_D10

B13

FBA_D11

E11

FBA_D12

E13

FBA_D13

F11

FBA_D14

F13

FBA_D15

U11

FBA_D16

U13

FBA_D17

T11

FBA_D18

T13

FBA_D19

N11

FBA_D20

N13

FBA_D21

M11

FBA_D22

M13

FBA_D23

U4

FBA_D24

U2

FBA_D25

T4

FBA_D26

T2

FBA_D27

N4

FBA_D28

N2

FBA_D29

M4

FBA_D30

M2

FBA_D31

B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14

A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14

+1.35VS_VGA+1.35VS_VGA

1

1

CV21810U_0603_6.3V6M

CV21710U_0603_6.3V6M

2

2

DIS@

C2

FBA_EDC7
FBA_EDC6
FBA_EDC5
FBA_EDC4

FBA_DBI7#
FBA_DBI6#

FBA_CKE_H

12

12

FBA_RST#_H

1

CV2220.1U_0402_10V6K

2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

FBA_DBI5#

DBI2# DBI1#

P2

FBA_DBI4#

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

H11

BA0/A2 BA2/A4

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

K4

A8/A7 A10/A0

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

K5

A11/A6 A9/A1

J5

A12/RFU/NC

A5

VPP/NC

U5

VPP/NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WC K23#

D4

WCK01 WCK23

P5

WCK23# WC K01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

170-BALL

SGRAM GDDR5

2GS@

DIS@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MF=1

MF=0 MF=1 MF=0MF=1

DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

H5GQ1H24BFR-T2C_BGA170

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

A4

FBA_D56

A2

FBA_D57

B4

FBA_D58

B2

FBA_D59

E4

FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39

BYTE7

BYTE6

BYTE5

BYTE4

+1.35VS_VGA+1.35VS_VGA

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

N15P_GDDR5_A Lower

N15P_GDDR5_A Lower

N15P_GDDR5_A Lower

LA-B751P

LA-B751P

LA-B751P

1

51 69Wednesday, March 26, 2014

51 69Wednesday, March 26, 2014

51 69Wednesday, March 26, 2014

0.1

0.1

0.1

E2
F4
F2
A11
A13
B11
B13
E11
E13
F11
F13
U11
U13
T11
T13
N11
N13
M11
M13
U4
U2
T4
T2
N4
N2
M4
M2

B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14

A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14

5

4

3

2

1

Memory Partition A - Lower 32 bits

+1.35VS_VGA

RV201

RV198

+1.35VS_VGA

RV197

RV202

CV2481U_0402 _6.3V4Z

DIS@

@

@

1

2

DIS@

FBB_CLK0#<48>

FBB_MA3_BA3_L<48>

FBB_MA1_MA9_L<48>

FBB_MA6_MA11_L<48>

FBB_MA12_RFU_L<48>

FBB_ABI#_L<48>

FBB_RAS#_L<48>

FBB_CS#_L<48>

FBB_CAS#_L<48>

FBB_WE#_L<48>

FBB_WCK0_N<48>

FBB_WCK0<48>

FBB_WCK1_N<48>

FBB_WCK1<48>

FBB_RST#_L<48>

12

12

12

+FBB_VREFC

12

1

CV2431U_0402 _6.3V4Z

2

DIS@

FBB_D[0..63]

FBB_EDC[7..0]

FBB_CLK0<48>

FBB_CKE_L<48>

FBB_MA2_BA0_L<48>

FBB_MA5_BA1_L< 48>

FBB_MA4_BA2_L<48>

FBB_MA7_MA8_L<48>

FBB_MA0_MA10_L<48>

W=16mils

+FBB_VREFD

1

CV308

2

820P_0402_25V7

820P_0402_25V7

one Close to UV8
one Close to UV9

@

@

W=16mils

1

CV305

2

820P_0402_25V7

820P_0402_25V7

one Close to UV8
one Close to UV9

1

1

CV2471U_0402 _6.3V4Z

CV2421U_0402 _6.3V4Z

2

2

DIS@

DIS@

FBB_DBI0#<48>

FBB_DBI1#<48>

FBB_DBI2#<48>

FBB_DBI3#<48>

RV136

1

CV306

2

1

2

1

CV2370.1U_0402_10V6K

2

FBB_DBI0#
FBB_DBI1#
FBB_DBI2#
FBB_DBI3#

FBB_CLK0
FBB_CLK0#

FBB_CKE_L

FBB_MA2_BA0_L
FBB_MA5_BA1_L
FBB_MA4_BA2_L
FBB_MA3_BA3_L

FBB_MA7_MA8_L

FBB_MA1_MA9_L
FBB_MA0_MA10_L
FBB_MA6_MA11_L
FBB_MA12_RFU_L

12

RV132

1K_0402_1%

12

RV134

12

1K_0402_1%

121_0402_1%

FBB_ABI#_L

FBB_RAS#_L

FBB_CS#_L

FBB_CAS#_L

FBB_WE#_L

FBB_WCK0_N
FBB_WCK0

FBB_WCK1_N FBB_WCK2

FBB_WCK1

+FBB_VREFD

+FBB_VREFC

FBB_RST#_L

+1.35VS_VGA

CV307

1

1

1

CV2490.1U_0402_10V6K

CV2440.1U_0402_10V6K

CV2460.1U_0402_10V6K

2

2

2

DIS@

DIS@

DIS@

DIS@

FBB_D[0..63]< 48>

FBB_EDC[7..0]<48>

D D

FBB_CLK0

12

RV178

80.6_0402_1%

FBB_CLK0#

C C

549_0402_1%

RV199

1 2

931_0402_1%

@

RV200

1 2

931_0402_1%

13

D

QV24

S

2N7002W-T/R7_SOT323-3

CV23810U_0603_6.3V6M

1.33K_0402_1%

549_0402_1%

1.33K_0402_1%

1

1

CV23910U_0603_6.3V6M

2

2

DIS@

B B

MEM_VREF<46,51,53,54>

A A

2

G

5

FBB_EDC0
FBB_EDC1
FBB_EDC2
FBB_EDC3

1

CV2450.1U_0402_10V6K

2

DIS@

1

CV2410.1U_0402_10V6K

2

DIS@

UV8

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

H11

BA0/A2 BA2/A4

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

K4

A8/A7 A10/A0

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

K5

A11/A6 A9/A1

J5

A12/RFU/NC

A5

VPP/NC

U5

VPP/NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WC K23#

D4

WCK01 WCK23

P5

WCK23# WC K01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

170-BALL

SGRAM GDDR5

2GS@

1

1

CV1560.1U_0402_10V6K

CV2400.1U_0402_10V6K

2

2

DIS@

DIS@

4

MF=0

MF=0 MF=1 MF=0MF=1

1

1

CV2140.1U_0402_10V6K

CV2500.1U_0402_10V6K

2

2

DIS@

DIS@

DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

H5GQ1H24AFR-T2L_BGA170

+1.35VS_VGA+1.35VS_VGA

A4

FBB_D0

A2

FBB_D1

B4

FBB_D2

B2

FBB_D3
FBB_D4
FBB_D5
FBB_D6
FBB_D7
FBB_D8
FBB_D9

1

CV1981U_0402 _6.3V4Z

2

+1.35VS_VGA

FBB_CLK1

FBB_CLK1#

1

CV2131U_0402 _6.3V4Z

2

DIS@

BYTE0

FBB_DBI7#<48>

FBB_DBI6#<48>

FBB_DBI5#<48>

BYTE1

BYTE2

BYTE3

12

RV138

80.6_0402_1%

1

1

CV2300.1U_0402_10V6K

2

DIS@

1

1

CV2330.1U_0402_10V6K

CV2100.1U_0402_10V6K

CV2350.1U_0402_10V6K

2

2

2

DIS@

DIS@

DIS@

DIS@

3

FBB_DBI4#<48>

FBB_CLK1<48>

FBB_CLK1#<48>

FBB_CKE_H<48>

FBB_MA4_BA2_H<48>

FBB_MA3_BA3_H<48>

FBB_MA2_BA0_H<48>

FBB_MA5_BA1_H<48>

FBB_MA0_MA10_H<48>

FBB_MA6_MA11_H<48>

FBB_MA7_MA8_H<48>

FBB_MA1_MA9_H<48>

FBB_MA12_RFU_H<48>

+1.35VS_VGA

RV135

121_0402_1%

FBB_ABI#_H<48>

FBB_CAS#_H<48>

FBB_WE#_H<48>

FBB_RAS#_H<48 >

FBB_CS#_H<48>

FBB_WCK3_N<48>

FBB_WCK3<48>

FBB_WCK2_N<48>

FBB_WCK2<48>

FBB_RST#_H<48>

1

1

1

CV2110.1U_0402_10V6K

2

1

CV1750.1U_0402_10V6K

CV1550.1U_0402_10V6K

CV1740.1U_0402_10V6K

2

2

2

DIS@

DIS@

DIS@

DIS@

E4
E2
F4
F2
A11
A13
B11

FBB_D10

B13

FBB_D11

E11

FBB_D12

E13

FBB_D13

F11

FBB_D14

F13

FBB_D15

U11

FBB_D16

U13

FBB_D17

T11

FBB_D18

T13

FBB_D19

N11

FBB_D20

N13

FBB_D21

M11

FBB_D22

M13

FBB_D23

U4

FBB_D24

U2

FBB_D25

T4

FBB_D26

T2

FBB_D27

N4

FBB_D28

N2

FBB_D29

M4

FBB_D30

M2

FBB_D31

B1

VDDQ

D1

VDDQ

F1

VDDQ

M1

VDDQ

P1

VDDQ

T1

VDDQ

G2

VDDQ

L2

VDDQ

B3

VDDQ

D3

VDDQ

F3

VDDQ

H3

VDDQ

K3

VDDQ

M3

VDDQ

P3

VDDQ

T3

VDDQ

E5

VDDQ

N5

VDDQ

E10

VDDQ

N10

VDDQ

B12

VDDQ

D12

VDDQ

F12

VDDQ

H12

VDDQ

K12

VDDQ

M12

VDDQ

P12

VDDQ

T12

VDDQ

G13

VDDQ

L13

VDDQ

B14

VDDQ

D14

VDDQ

F14

VDDQ

M14

VDDQ

P14

VDDQ

T14

VDDQ

A1

VSSQ

C1

VSSQ

E1

VSSQ

N1

VSSQ

R1

VSSQ

U1

VSSQ

H2

VSSQ

K2

VSSQ

A3

VSSQ

C3

VSSQ

E3

VSSQ

N3

VSSQ

R3

VSSQ

U3

VSSQ

C4

VSSQ

R4

VSSQ

F5

VSSQ

M5

VSSQ

F10

VSSQ

M10

VSSQ

C11

VSSQ

R11

VSSQ

A12

VSSQ

C12

VSSQ

E12

VSSQ

N12

VSSQ

R12

VSSQ

U12

VSSQ

H13

VSSQ

K13

VSSQ

A14

VSSQ

C14

VSSQ

E14

VSSQ

N14

VSSQ

R14

VSSQ

U14

VSSQ

1

1

1

1

CV23110U_0603_6.3V6M

CV23210U_0603_6.3V6M

CV2341U_0402 _6.3V4Z

CV1991U_0402 _6.3V4Z

2

2

2

2

DIS@

DIS@

DIS@

DIS@

12

1

CV2020.1U_0402_10V6K

2

DIS@

FBB_EDC7
FBB_EDC6
FBB_EDC5
FBB_EDC4

FBB_DBI7#
FBB_DBI6#
FBB_DBI5#
FBB_DBI4#

FBB_CLK1
FBB_CLK1#

FBB_CKE_H

FBB_MA4_BA2_H
FBB_MA3_BA3_H
FBB_MA2_BA0_H
FBB_MA5_BA1_H

FBB_MA0_MA10_H
FBB_MA6_MA11_H

FBB_MA7_MA8_H
FBB_MA1_MA9_H

FBB_MA12_RFU_H

12

RV131

1K_0402_1%

12

RV133

1K_0402_1%

FBB_ABI#_H
FBB_CAS#_H
FBB_WE#_H
FBB_RAS#_H
FBB_CS#_H

FBB_WCK3_N

FBB_WCK3

FBB_WCK2_N

+FBB_VREFD

+FBB_VREFC

FBB_RST#_H

+1.35VS_VGA

1

CV2360.1U_0402_10V6K

2

DIS@

UV9

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

H11

BA0/A2 BA2/A4

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

K4

A8/A7 A10/A0

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

K5

A11/A6 A9/A1

J5

A12/RFU/NC

A5

VPP/NC

U5

VPP/NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WC K23#

D4

WCK01 WCK23

P5

WCK23# WC K01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

170-BALL

SGRAM GDDR5

2GS@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MF=1

MF=0 MF=1 MF=0MF=1

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

H5GQ1H24AFR-T2L_BGA170

Compal Secret Data

Compal Secret Data

Compal Secret Data

2

A4
A2
B4
B2
E4
E2
F4
F2
A11
A13
B11
B13
E11
E13
F11
F13
U11
U13
T11
T13
N11
N13
M11
M13
U4
U2
T4
T2
N4
N2
M4
M2

B1

VDDQ

D1

VDDQ

F1

VDDQ

M1

VDDQ

P1

VDDQ

T1

VDDQ

G2

VDDQ

L2

VDDQ

B3

VDDQ

D3

VDDQ

F3

VDDQ

H3

VDDQ

K3

VDDQ

M3

VDDQ

P3

VDDQ

T3

VDDQ

E5

VDDQ

N5

VDDQ

E10

VDDQ

N10

VDDQ

B12

VDDQ

D12

VDDQ

F12

VDDQ

H12

VDDQ

K12

VDDQ

M12

VDDQ

P12

VDDQ

T12

VDDQ

G13

VDDQ

L13

VDDQ

B14

VDDQ

D14

VDDQ

F14

VDDQ

M14

VDDQ

P14

VDDQ

T14

VDDQ

A1

VSSQ

C1

VSSQ

E1

VSSQ

N1

VSSQ

R1

VSSQ

U1

VSSQ

H2

VSSQ

K2

VSSQ

A3

VSSQ

C3

VSSQ

E3

VSSQ

N3

VSSQ

R3

VSSQ

U3

VSSQ

C4

VSSQ

R4

VSSQ

F5

VSSQ

M5

VSSQ

F10

VSSQ

M10

VSSQ

C11

VSSQ

R11

VSSQ

A12

VSSQ

C12

VSSQ

E12

VSSQ

N12

VSSQ

R12

VSSQ

U12

VSSQ

H13

VSSQ

K13

VSSQ

A14

VSSQ

C14

VSSQ

E14

VSSQ

N14

VSSQ

R14

VSSQ

U14

VSSQ

Deciphered Date

Deciphered Date

Deciphered Date

FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39

+1.35VS_VGA

BYTE7

BYTE6

BYTE5

BYTE4

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

N15P_GDDR5_A Upper

N15P_GDDR5_A Upper

N15P_GDDR5_A Upper

LA-B751P

LA-B751P

LA-B751P

1

52 69Wednesday, March 26, 2014

52 69Wednesday, March 26, 2014

52 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

4

3

2

1

Memory Partition A - Lower 32 bits

+1.35VS_VGA

12

12

@

@

+1.35VS_VGA

12

+FBC_VREFC

12

1

1

CV2741U_0402 _6.3V4Z

2

2

DIS@

FBC_CLK0<48>
FBC_CLK0#<48>

FBC_MA2_BA0_L<48>

FBC_MA4_BA2_L<48>

FBC_MA3_BA3_L<4 8>

FBC_MA7_MA8_L<48>

FBC_MA1_MA9_L<48>

FBC_MA0_MA10_L<48>

FBC_MA6_MA11_L< 48>

FBC_MA12_RFU_L< 48>

FBC_ABI#_L<48>

FBC_RAS#_L<48>

FBC_CS#_L<48>

FBC_CAS#_L<48>

FBC_WE#_L<48>

FBC_WCK0_N<48>

FBC_WCK0< 48>

FBC_WCK1_N<48>

FBC_WCK1<48>

FBC_RST#_L<48>

820P_0402_25V7

@

820P_0402_25V7

1

CV2791U_0402 _6.3V4Z

2

DIS@

DIS@

FBC_D[0..63]

FBC_EDC[7..0]

FBC_DBI1#<48>

FBC_DBI3#<48>

FBC_CKE_L<48>

FBC_MA5_BA1_L<4 8>

RV156

W=16mils

+FBC_VREFD

1

1

CV178

CV299

2

2

820P_0402_25V7

one Close to UV8
one Close to UV9

@

W=16mils

1

1

CV179

CV300

2

2

820P_0402_25V7

one Close to UV8
one Close to UV9

1

1

CV2670.1U_0402_10V6K

CV2810.1U_0402_10V6K

2

2

DIS@

DIS@

FBC_EDC0
FBC_EDC1
FBC_EDC2
FBC_EDC3

FBC_DBI0#<48>

FBC_DBI2#<48>

FBC_DBI0#
FBC_DBI1#
FBC_DBI2#
FBC_DBI3#

FBC_CLK0
FBC_CLK0#
FBC_CKE_L

FBC_MA2_BA0_L
FBC_MA5_BA1_L
FBC_MA4_BA2_L
FBC_MA3_BA3_L

FBC_MA7_MA8_L

FBC_MA1_MA9_L
FBC_MA0_MA10_L
FBC_MA6_MA11_L

FBC_MA12_RFU_L

12

RV161

1K_0402_1%

12

RV159

12

1K_0402_1%

121_0402_1%

FBC_ABI#_L

FBC_RAS#_L

FBC_CS#_L

FBC_CAS#_L

FBC_WE#_L

FBC_WCK0_N
FBC_WCK0

FBC_WCK1_N FBC_WCK2

FBC_WCK1

+FBC_VREFD

+FBC_VREFC

FBC_RST#_L

+1.35VS_VGA

1

1

CV2780.1U_0402_10V6K

2

1

1

CV2770.1U_0402_10V6K

CV2730.1U_0402_10V6K

CV2760.1U_0402_10V6K

2

2

2

DIS@

DIS@

DIS@

DIS@

FBC_D[0..63]<48>

FBC_EDC[7..0]< 48>

D D

FBC_CLK0

12

RV179

80.6_0402_1%

FBC_CLK0#

C C

RV142

549_0402_1%

RV144

1 2

931_0402_1%

RV158

@

1.33K_0402_1%

B B

RV143

549_0402_1%

RV164

1 2

931_0402_1%

RV145

1.33K_0402_1%

13

D

MEM_VREF<46,51,52,54>

A A

2

G

5

QV21

S

2N7002W-T/R7_SOT323-3

1

1

CV26810U_0603_6.3V6M

CV26910U_0603_6.3V6M

2

2

DIS@

DIS@

1

CV2751U_0402 _6.3V4Z

CV2801U_0402 _6.3V4Z

2

DIS@

1

CV2710.1U_0402_10V6K

2

DIS@

C2
C13
R13

R2

D2
D13
P13

P2

J12
J11

J3

H11
K10
K11
H10

K4
H5
H4

K5

J5

A5
U5

J1

J10
J13

J4
G3

G12

L3

L12

D5
D4

P5

P4

A10
U10

J14

J2

H1

K1

B5
G5

L5

T5

B10
D10
G10

L10

P10

T10
H14
K14

G1

L1

G4

L4
C5
R5

C10
R10
D11
G11

L11
P11
G14

L14

1

1

CV2720.1U_0402_10V6K

CV2700.1U_0402_10V6K

2

2

DIS@

4

UV13

EDC0 EDC3
EDC1 EDC2
EDC2 EDC1
EDC3 EDC0

DBI0# DBI3#
DBI1# DBI2#
DBI2# DBI1#
DBI3# DBI0#

CK
CK#
CKE#

BA0/A2 BA2/A4
BA1/A5 BA3/A3
BA2/A4 BA0/A2
BA3/A3 BA1/A5

A8/A7 A10/A0
A9/A1 A11/A6
A10/A0 A8/A7
A11/A6 A9/A1
A12/RFU/NC

VPP/NC
VPP/NC

MF
SEN
ZQ

ABI#
RAS# CAS#
CS# WE#
CAS# RAS#
WE# CS#

WCK01# WC K23#
WCK01 WCK23

WCK23# WC K01#
WCK23 WCK01

VREFD
VREFD
VREFC

RESET#

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

170-BALL

SGRAM GDDR5

2GS@

1

CV2820.1U_0402_10V6K

2

DIS@

MF=0

MF=0 MF=1 MF=0MF=1

DIS@

DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9

H5GQ1H24AFR-T2L_BGA170

+1.35VS_VGA+1.35VS_VGA

1

CV25310U_0603_6.3V6M

2

DIS@

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

1

1

CV2641U_0402 _6.3V4Z

CV25710U_0603_6.3V6M

2

2

DIS@

DIS@

A4

FBC_D0

A2

FBC_D1

B4

FBC_D2

B2

FBC_D3

E4

FBC_D4

E2

FBC_D5

F4

FBC_D6

F2

FBC_D7

A11

FBC_D8

A13

FBC_D9

B11

FBC_D10

B13

FBC_D11

E11

FBC_D12

E13

FBC_D13

F11

FBC_D14

F13

FBC_D15

U11

FBC_D16

U13

FBC_D17

T11

FBC_D18

T13

FBC_D19

N11

FBC_D20

N13

FBC_D21

M11

FBC_D22

M13

FBC_D23

U4

FBC_D24

U2

FBC_D25

T4

FBC_D26

T2

FBC_D27

N4

FBC_D28

N2

FBC_D29

M4

FBC_D30

M2

FBC_D31

B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14

A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14

1

1

1

CV2591U_0402 _6.3V4Z

CV2631U_0402 _6.3V4Z

CV2581U_0402 _6.3V4Z

2

2

2

DIS@

DIS@

DIS@

+1.35VS_VGA

FBC_CLK1

FBC_CLK1#

1

CV2520.1U_0402_10V6K

CV2650.1U_0402_10V6K

2

DIS@

BYTE0

FBC_DBI7#<48>

FBC_DBI6#<48>

FBC_DBI5#<48>

BYTE1

BYTE2

BYTE3

12

RV141

80.6_0402_1%

1

1

CV2620.1U_0402_10V6K

2

2

DIS@

1

1

1

CV2830.1U_0402_10V6K

CV2610.1U_0402_10V6K

CV2600.1U_0402_10V6K

2

2

2

DIS@

DIS@

DIS@

DIS@

3

FBC_DBI4#<48>

FBC_CLK1< 48>
FBC_CLK1#<48>

FBC_CKE_H<48>

FBC_MA4_BA2_H<48>

FBC_MA3_BA3_H<48>

FBC_MA2_BA0_H<48>

FBC_MA5_BA1_H<48>

FBC_MA0_MA10_H<48>

FBC_MA6_MA11_H<48>

FBC_MA7_MA8_H<48>

FBC_MA1_MA9_H<48>

FBC_MA12_RFU_H<48>

+1.35VS_VGA

RV160

121_0402_1%

FBC_ABI#_H< 48>

FBC_CAS#_H<48>

FBC_WE#_H<48>

FBC_RAS#_H<48>

FBC_CS#_H<48>

FBC_WCK3_N<48>

FBC_WCK3<48>

FBC_WCK2_N<48>

FBC_WCK2< 48>

FBC_RST#_H<48 >

1

1

1

1

CV2660.1U_0402_10V6K

CV2540.1U_0402_10V6K

CV2550.1U_0402_10V6K

CV2560.1U_0402_10V6K

2

2

2

2

DIS@

DIS@

DIS@

DIS@

FBC_EDC7
FBC_EDC6
FBC_EDC5
FBC_EDC4

FBC_DBI7#
FBC_DBI6#
FBC_DBI5#
FBC_DBI4#

FBC_CLK1
FBC_CLK1#

FBC_CKE_H

FBC_MA4_BA2_H
FBC_MA3_BA3_H
FBC_MA2_BA0_H
FBC_MA5_BA1_H

FBC_MA0_MA10_H
FBC_MA6_MA11_H

FBC_MA7_MA8_H
FBC_MA1_MA9_H

FBC_MA12_RFU_H

12

RV165

1K_0402_1%

12

RV140

12

1K_0402_1%

FBC_ABI#_H
FBC_CAS#_H
FBC_WE#_H
FBC_RAS#_H
FBC_CS#_H

FBC_WCK3_N

FBC_WCK2_N

+FBC_VREFD

+FBC_VREFC

FBC_RST#_H

+1.35VS_VGA

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

FBC_WCK3

UV12

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

H11

BA0/A2 BA2/A4

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

K4

A8/A7 A10/A0

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

K5

A11/A6 A9/A1

J5

A12/RFU/NC

A5

VPP/NC

U5

VPP/NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WC K23#

D4

WCK01 WCK23

P5

WCK23# WC K01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

170-BALL

SGRAM GDDR5

2GS@

MF=1

MF=0 MF=1 MF=0MF=1

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

H5GQ1H24AFR-T2L_BGA170

Compal Secret Data

Compal Secret Data

Compal Secret Data

2

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

Deciphered Date

Deciphered Date

Deciphered Date

A4
A2
B4
B2
E4
E2
F4
F2
A11
A13
B11
B13
E11
E13
F11
F13
U11
U13
T11
T13
N11
N13
M11
M13
U4
U2
T4
T2
N4
N2
M4
M2

B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14

A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14

FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39

+1.35VS_VGA

BYTE7

BYTE6

BYTE5

BYTE4

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

N15P_GDDR5_A Upper

N15P_GDDR5_A Upper

N15P_GDDR5_A Upper

LA-B751P

LA-B751P

LA-B751P

1

0.1

0.1

53 69Wednesday, March 26, 2014

53 69Wednesday, March 26, 2014

53 69Wednesday, March 26, 2014

0.1

5

4

3

2

1

Memory Partition D

+1.35VS_VGA

12

12

@

@

+1.35VS_VGA

12

12

1

CV1901U_0402 _6.3V4Z

2

DIS@

FBD_D[0..63]

FBD_EDC[7..0]

FBD_CLK0<48>
FBD_CLK0#<48>

FBD_CKE_L<48>

FBD_MA2_BA0_L<4 8>

FBD_MA5_BA1_L<4 8>

FBD_MA4_BA2_L<4 8>

FBD_MA3_BA3_L<48>

FBD_MA7_MA8_L<48>

FBD_MA1_MA9_L<48>

FBD_MA0_MA10_L< 48>

FBD_MA6_MA11_L<48>

FBD_MA12_RFU_L< 48>

FBD_ABI#_L<48>

FBD_RAS#_L<48>

FBD_CS#_L<48>

FBD_CAS#_L<48>

FBD_WE#_L<48>

FBD_WCK0_N<48>

FBD_WCK0<48>

FBD_WCK1_N<48>

FBD_WCK1<48>

FBD_RST#_L<48>

W=16mils

+FBD_VREFD

1

CV312

2

820P_0402_25V7

one Close to UV8
one Close to UV9

@

+FBD_VREFC

1

CV309

2

820P_0402_25V7

one Close to UV8
one Close to UV9

1

1

CV3130.1U_0402_10V6K

CV1941U_0402 _6.3V4Z

2

2

DIS@

DIS@

FBD_DBI1#<48>

FBD_DBI3#<48>

RV171

1

CV310

2

820P_0402_25V7

@

W=16mils

1

2

820P_0402_25V7

1

CV2970.1U_0402_10V6K

2

DIS@

FBD_EDC0
FBD_EDC1
FBD_EDC2
FBD_EDC3

FBD_DBI0#<48>

FBD_DBI2#<48>

CV311

1

CV2950.1U_0402_10V6K

2

FBD_DBI0#
FBD_DBI1#
FBD_DBI2#
FBD_DBI3#

FBD_CLK0
FBD_CLK0#

FBD_CKE_L

FBD_MA2_BA0_L
FBD_MA5_BA1_L
FBD_MA4_BA2_L
FBD_MA3_BA3_L

FBD_MA7_MA8_L

FBD_MA1_MA9_L
FBD_MA0_MA10_L
FBD_MA6_MA11_L
FBD_MA12_RFU_L

12

RV204

1K_0402_1%

12

RV185

12

1K_0402_1%

121_0402_1%

FBD_ABI#_L

FBD_RAS#_L

FBD_CS#_L

FBD_CAS#_L

FBD_WE#_L

FBD_WCK0_N
FBD_WCK0

FBD_WCK1_N FBD_WCK2

FBD_WCK1

+FBD_VREFD

+FBD_VREFC

FBD_RST#_L

+1.35VS_VGA

1

1

1

CV3140.1U_0402_10V6K

CV1890.1U_0402_10V6K

CV1930.1U_0402_10V6K

2

2

2

DIS@

DIS@

DIS@

DIS@

FBD_D[0..63]<48>

FBD_EDC[7..0]<48>

D D

FBD_CLK0

12

RV182

80.6_0402_1%

FBD_CLK0#

C C

RV207

549_0402_1%

RV205

1 2

931_0402_1%

RV213

@

RV206

1 2

931_0402_1%

13

D

QV25

S

2N7002W-T/R7_SOT323-3

1

1

CV29310U_0603_6.3V6M

CV29210U_0603_6.3V6M

2

2

DIS@

DIS@

1.33K_0402_1%

RV203

549_0402_1%

RV209

1.33K_0402_1%

1

1

CV2961U_0402 _6.3V4Z

CV1911U_0402 _6.3V4Z

2

2

DIS@

DIS@

B B

MEM_VREF<46,51,52,53>

A A

2

G

5

UV15

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

H11

BA0/A2 BA2/A4

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

K4

A8/A7 A10/A0

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

K5

A11/A6 A9/A1

J5

A12/RFU/NC

A5

VPP/NC

U5

VPP/NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WC K23#

D4

WCK01 WCK23

P5

WCK23# WC K01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

170-BALL

SGRAM GDDR5

2GS@

1

1

1

1

CV2980.1U_0402_10V6K

CV2940.1U_0402_10V6K

CV1880.1U_0402_10V6K

CV1920.1U_0402_10V6K

2

2

2

2

DIS@

DIS@

DIS@

DIS@

4

MF=0

MF=0 MF=1 MF=0MF=1

DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14

DQ23 DQ15
DQ8 DQ16
DQ9 DQ17

DQ10 DQ18

DQ11 DQ19

DQ12 DQ20

DQ13 DQ21

DQ14 DQ22

DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

H5GQ1H24AFR-T2L_BGA170

+1.35VS_VGA+1.35VS_VGA

1

1

CV28610U_0603_6.3V6M

CV28510U_0603_6.3V6M

2

2

DIS@

A4

FBD_D0

A2

FBD_D1

B4

FBD_D2

B2

FBD_D3
FBD_D4
FBD_D5
FBD_D6
FBD_D7
FBD_D8
FBD_D9

CV2840.1U_0402_10V6K

1

2

DIS@

+1.35VS_VGA

FBD_CLK1

FBD_CLK1#

1

CV2890.1U_0402_10V6K

2

DIS@

BYTE0

FBD_DBI7#<48>

FBD_DBI6#<48>

FBD_DBI5#<48>

BYTE1

BYTE2

BYTE3

12

RV212

80.6_0402_1%

1

1

1

CV2870.1U_0402_10V6K

2

1

CV1850.1U_0402_10V6K

CV1840.1U_0402_10V6K

CV1810.1U_0402_10V6K

2

2

2

DIS@

DIS@

DIS@

DIS@

3

FBD_DBI4#<48>

FBD_CLK1<48>
FBD_CLK1#<48>

FBD_CKE_H<48>

FBD_MA4_BA2_H<48>

FBD_MA3_BA3_H<48>

FBD_MA2_BA0_H<48>

FBD_MA5_BA1_H<48>

FBD_MA0_MA10_H<48>

FBD_MA6_MA11_H<48>

FBD_MA7_MA8_H<48>

FBD_MA1_MA9_H<48>

FBD_MA12_RFU_H<48>

+1.35VS_VGA

RV166

121_0402_1%

FBD_ABI#_H<48>

FBD_CAS#_H<48>

FBD_WE#_H<48>

FBD_RAS#_H<48>

FBD_CS#_H< 48>

FBD_WCK3_N<48>

FBD_WCK3<48>

FBD_WCK2_N<48>

FBD_WCK2<48>

FBD_RST#_H<48>

1

1

1

1

CV2910.1U_0402_10V6K

CV3150.1U_0402_10V6K

CV1800.1U_0402_10V6K

CV2900.1U_0402_10V6K

2

2

2

2

DIS@

DIS@

DIS@

DIS@

E4
E2
F4
F2
A11
A13
B11

FBD_D10

B13

FBD_D11

E11

FBD_D12

E13

FBD_D13

F11

FBD_D14

F13

FBD_D15

U11

FBD_D16

U13

FBD_D17

T11

FBD_D18

T13

FBD_D19

N11

FBD_D20

N13

FBD_D21

M11

FBD_D22

M13

FBD_D23

U4

FBD_D24

U2

FBD_D25

T4

FBD_D26

T2

FBD_D27

N4

FBD_D28

N2

FBD_D29

M4

FBD_D30

M2

FBD_D31

B1

VDDQ

D1

VDDQ

F1

VDDQ

M1

VDDQ

P1

VDDQ

T1

VDDQ

G2

VDDQ

L2

VDDQ

B3

VDDQ

D3

VDDQ

F3

VDDQ

H3

VDDQ

K3

VDDQ

M3

VDDQ

P3

VDDQ

T3

VDDQ

E5

VDDQ

N5

VDDQ

E10

VDDQ

N10

VDDQ

B12

VDDQ

D12

VDDQ

F12

VDDQ

H12

VDDQ

K12

VDDQ

M12

VDDQ

P12

VDDQ

T12

VDDQ

G13

VDDQ

L13

VDDQ

B14

VDDQ

D14

VDDQ

F14

VDDQ

M14

VDDQ

P14

VDDQ

T14

VDDQ

A1

VSSQ

C1

VSSQ

E1

VSSQ

N1

VSSQ

R1

VSSQ

U1

VSSQ

H2

VSSQ

K2

VSSQ

A3

VSSQ

C3

VSSQ

E3

VSSQ

N3

VSSQ

R3

VSSQ

U3

VSSQ

C4

VSSQ

R4

VSSQ

F5

VSSQ

M5

VSSQ

F10

VSSQ

M10

VSSQ

C11

VSSQ

R11

VSSQ

A12

VSSQ

C12

VSSQ

E12

VSSQ

N12

VSSQ

R12

VSSQ

U12

VSSQ

H13

VSSQ

K13

VSSQ

A14

VSSQ

C14

VSSQ

E14

VSSQ

N14

VSSQ

R14

VSSQ

U14

VSSQ

1

1

CV2881U_0402 _6.3V4Z

2

DIS@

1

1

CV1871U_0402 _6.3V4Z

CV1861U_0402 _6.3V4Z

CV1821U_0402 _6.3V4Z

2

2

2

DIS@

DIS@

DIS@

DIS@

FBD_EDC7
FBD_EDC6
FBD_EDC5
FBD_EDC4

FBD_DBI7#
FBD_DBI6#
FBD_DBI5#
FBD_DBI4#

FBD_CLK1
FBD_CLK1#
FBD_CKE_H

FBD_MA4_BA2_H
FBD_MA3_BA3_H
FBD_MA2_BA0_H
FBD_MA5_BA1_H

FBD_MA0_MA10_H
FBD_MA6_MA11_H

FBD_MA7_MA8_H
FBD_MA1_MA9_H

FBD_MA12_RFU_H

12

RV172

1K_0402_1%

12

RV188

12

1K_0402_1%

FBD_ABI#_H
FBD_CAS#_H
FBD_WE#_H
FBD_RAS#_H
FBD_CS#_H

FBD_WCK3_N

FBD_WCK2_N

+FBD_VREFD

+FBD_VREFC

FBD_RST#_H

+1.35VS_VGA

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

FBD_WCK3

UV16

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

H11

BA0/A2 BA2/A4

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

K4

A8/A7 A10/A0

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

K5

A11/A6 A9/A1

J5

A12/RFU/NC

A5

VPP/NC

U5

VPP/NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WC K23#

D4

WCK01 WCK23

P5

WCK23# WC K01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

170-BALL

SGRAM GDDR5

2GS@

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

MF=1

MF=0 MF=1 MF=0MF=1

2

DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14

DQ23 DQ15
DQ8 DQ16
DQ9 DQ17

DQ10 DQ18

DQ11 DQ19

DQ12 DQ20

DQ13 DQ21

DQ14 DQ22

DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

H5GQ1H24AFR-T2L_BGA170

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

A4

FBD_D56

A2

FBD_D57

B4

FBD_D58

B2

FBD_D59

E4

FBD_D60
FBD_D61
FBD_D62
FBD_D63
FBD_D48
FBD_D49
FBD_D50
FBD_D51
FBD_D52
FBD_D53
FBD_D54
FBD_D55
FBD_D40
FBD_D41
FBD_D42
FBD_D43
FBD_D44
FBD_D45
FBD_D46
FBD_D47
FBD_D32
FBD_D33
FBD_D34
FBD_D35
FBD_D36
FBD_D37
FBD_D38
FBD_D39

+1.35VS_VGA

BYTE7

BYTE6

BYTE5

BYTE4

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

N15P_GDDR5_A Upper

N15P_GDDR5_A Upper

N15P_GDDR5_A Upper

LA-B751P

LA-B751P

LA-B751P

1

0.1

0.1

54 69Wednesday, March 26, 2014

54 69Wednesday, March 26, 2014

54 69Wednesday, March 26, 2014

0.1

E2
F4
F2
A11
A13
B11
B13
E11
E13
F11
F13
U11
U13
T11
T13
N11
N13
M11
M13
U4
U2
T4
T2
N4
N2
M4
M2

B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14

A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14

5

RV217

4

3

2

1

RV214
15K_0402_1%

@

RV221

4.99K_0402_1%

ROM-SI

PL 15K

PL 20K

+3.3V_GFX_AON

STRAP4

RV219
20K_0402_1%

@

1 2

RV224

45.3K_0402_1%

1 2

Physical
Strapping pin

ROM_SCLK

ROM_SO

ROM_SI

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

Logical
Strapping Bit3

PCI_DEVID[4]

Logical
Strapping Bit2

SUB_VENDER PCI_DEVID[5]

Logical
Strapping Bit1

RAM_CFG[1]RAM_CFG[2]RAM_CFG[3]

USER[3] USER[2] USER[1] USER[0]

SMB_ALT_ADDRFB[1] FB[0]

Logical
Strapping Bit0

PEX_PLL_EN_TERM

RAM_CFG[0]

VGA_DEVICE

3GIO_CFG[3] 3GIO_CFG[2] 3GIO_CFG[1] 3GIO_CFG[0]

PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]

SOR3_EXPOSED

RESERVED PCIE_SPEED

_CHNAGE_GEN3

SOR1_EXPOSEDSOR2_EXPOSED

PCIE_MAX_SPEED DP_PLL_VDD33V

SOR0_EXPOSED

15K_0402_1%

N15P@
SD034150280

RV230

45.3K_0402_1%

1 2

STRAP0<47>

D D

C C

STRAP1<47>
STRAP2<47>
STRAP3<47>
STRAP4<47>

ROM_SI<47>
ROM_SO<47>
ROM_SCLK<47>

STRAP0

ROM_SI
ROM_SO
ROM_SCLK

RV228

@

45.3K_0402_1%

1 2

RV229

4.99K_0402_1%

@

1 2

RV215
15K_0402_1%

Hyn@

1 2

STRAP1

RV218

34.8K_0402_1%

@

1 2

RV216

4.99K_0402_1%

1 2

RV231

4.99K_0402_1%

1 2

RV223
10K_0402_1%

@

1 2

STRAP2

+3.3V_GFX_AON

RV217

4.99K_0402_1%

N15E@

1 2

RV232
15K_0402_1%

@

1 2

RV233

24.9K_0402_1%

1 2

RV226
15K_0402_1%

@

1 2

1 2

STRAP3

1 2

R_pu

RV215

20K_0402_1%

Sam@

SD034200280

VRAM

Hynix H5GC4H24MFR-T2C

Samsung K4G41325FC-HC04

Strap

0x2

0x3

PU to 3V3

4.99K

1000

10K

B B

A A

5

4

3

1001

15K

1010

20K

1011

24.9K

1100

30.1K

1101

1110

34.8K

45.3K 1111

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

PD to GND

0000

0001

0010

0011

0100

0101

0110

0111

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

PCI_DEVID

SUB_VENDER
0- w/o dGPU ROM
1-w/ dGPU ROM

FB[1:0]
0-Reserved
1-Reserved
2-256M
3-Reserved

VGA_DEVICE
0- Non-permary 3D
1-

SMB_ALT_ADDR
0-0x9E
1-0x9C(Multi-GPU)

PEX_PLL_EN_TERM
0-Disable
1-Enable

3GIO_PADCFG
0110-GEN1/GEN2
0000-GEN3

PCIE_MAX_SPEED
0-booting to PCIE Gen1
1-booting to PCIE Gen2/Gen3

PCIE_SPEED_CHNAGE_GEN3
0-Disable PCIE Gen3
1-Enable PCIE Gen3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

N15P-GX (1/5) PEG & DAC

N15P-GX (1/5) PEG & DAC

N15P-GX (1/5) PEG & DAC

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

55 69Wednesday, March 26, 2014

55 69Wednesday, March 26, 2014

55 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

4

3

2

1

Timing Diagram for G3 or S4-5/M-off (Suspend Well Off) to S0/M0 [non Deep S4/S5 Platform]

+3VLP

EC_ON

D D

ON_OFF

PBTN_OUT#

EC_RSMRST#

T1=NA

T2>100 ms

T5=110ms

T6=100ms

T4=110ms

PM_SLP_S5#

PM_SLP_S4#

SYSON

C C

T7=0ms

PM_SLP_S3#

SUSP#

KB_RST#

T8=20ms

T9=20ms

EC_SCI

VR_ON

T10=100ms

12/11/20

VGATE

B B

PCH_PWROK

T11=20ms

SYS_PWROK

T12=40ms

H_CPUPWRGD

PM_DRAM_PWRGD

PLT_RST#

A A

Color Command

Signal Names

Signal Names

Signal Names

Signal Names

5

Timing of these signals is set by PCH or processor

Timing of these signals should be met by the platform (EC)

Timing of these signals is set by IntelR MVP

Voltage rails or chip-to-chip buses

4

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

2014/2/11 2014 /2/11

2014/2/11 2014 /2/11

2014/2/11 2014 /2/11

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Power Sequence

Power Sequence

Power Sequence

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

LA-B751P

LA-B751P

LA-B751P

56 69Wednesday, March 26, 2014

56 69Wednesday, March 26, 2014

56 69Wednesday, March 26, 2014

0.1

0.1

0.1

5

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Request

Request

Page# Title

Item

Item Issue Description

Page#Page#

ItemItem

34 Car d Reader

1

D D

C C

B B

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

Title

TitleTitle

Date

DateDate

RequestRequest
Owner

Owner

OwnerOwner

4

Issue DescriptionDate

Issue DescriptionIssue Description

HW2012/04/27

The Card reader USB signal is incorrect. SWAP UR1 USB si gnal P/N

3

Page 1

Page 1

Page 1Page 1

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

2

Rev.Page#

Rev.Rev.

0.2

1

36

37

A A

38

39

40

41

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

HW-PIR Page.1

HW-PIR Page.1

HW-PIR Page.1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-B751P

LA-B751P

LA-B751P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

57 69Wednesday, March 26, 2014

57 69Wednesday, March 26, 2014

57 69Wednesday, March 26, 2014

0.1

0.1

0.1

A

PJPDC1

@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

1 1

9

9

10

10

11

11

ACES_50293-0117N-001

Adapter 240W
240W/19.5V=12.3A

BATT+

PL4

EMI@

SMB3025500YA_2P

1 2

BATT+

PL5

EMI@

SMB3025500YA_2P

1 2

12

12

PC7

PC6

2 2

PBATT1

ACES_51481-01371-P01

Battery connector:

Battery connector:

Battery connector: Battery connector:

1.BATT++

1.BATT++

1.BATT++1.BATT++

2.BATT++

2.BATT++

2.BATT++2.BATT++

3.BATT++

3.BATT++

3.BATT++3.BATT++

3 3

4.BATT++

4.BATT++

4.BATT++4.BATT++

5.CLK_SMB

5.CLK_SMB

5.CLK_SMB5.CLK_SMB

6.DAT_SMB

6.DAT_SMB

6.DAT_SMB6.DAT_SMB

7.BATT_PRS

7.BATT_PRS

7.BATT_PRS7.BATT_PRS

8.SYS_PRES

8.SYS_PRES

8.SYS_PRES8.SYS_PRES

9.BAT_ALERT

9.BAT_ALERT

9.BAT_ALERT9.BAT_ALERT

10.GND

10.GND

10.GND10.GND

11.GND

11.GND

11.GND11.GND

12.GND

12.GND

12.GND12.GND

13.GND

13.GND

13.GND13.GND

EMI@

EMI@

10
11
12
13

0.01U_0402_25V7K

0.022U_0402_25V7K

@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10
11
12
13

CLK_SMB
DAT_SMB
BATT_PRS
SYS_PRES
BAT_ALERT

ADPIN

BATT++

BATT++

12

12

PC8

PC9

EMI@

EMI@

1000P_0402_50V7K

Battery 92W
92W/12V=7.7A

@

JRTC1

1

2
G1
G2

ACES_50271-00201-001

PSID

12

PC1

EMI@

1000P_0402_50V7K

Adapter connector:

Adapter connector:

Adapter connector:Adapter connector:

1.X

1.X

1.X1.X

2.ADPIN

2.ADPIN

2.ADPIN2.ADPIN

3.ADPIN

3.ADPIN

3.ADPIN3.ADPIN

4.ADPIN

4.ADPIN

4.ADPIN4.ADPIN

5.ADPIN

5.ADPIN

5.ADPIN5.ADPIN

6.GND

6.GND

6.GND6.GND

7.GND

7.GND

7.GND7.GND

8.GND

8.GND

8.GND8.GND

9.GND

9.GND

9.GND9.GND

10.PSID

10.PSID

10.PSID10.PSID

11.X

11.X

11.X11.X

1

100P_0402_50V8J

1
2
3
4

PD2
TVNST52302AB0_SOT523-3

EMI@

2

3

PL1

EMI@

SMB3025500YA_2P

1 2

PL3

EMI@

SMB3025500YA_2P

1 2

12

PC2

EMI@

100P_0402_50V8J

PL2

EMI@

BLM15HG601SN1D_2P

12

PR2

1K_0402_1%

+3VLP

1

2

12

JRTC1

VIN

12

PC3

EMI@

1000P_0402_50V7K

PD3
TVNST52302AB0_SOT523-3

EMI@

3

PR15

100_0402_5%

1 2

PR18

100_0402_5%

1 2

PR20

100_0402_5%

1 2

PD5

2

1

3

BAS40CW _SOT323-3

12

PC4

EMI@

100P_0402_50V8J

+RTC_CELL

B

B+

PR16

10K_0402_1%

1 2

12

PC15

.1U_0402_16V7K

EMI@

放放

DRAM

下下下B+兩兩

BATT_TEMP <43,58>

+3VALW

EC_SMB_CK1 <42,43,59>

EC_SMB_DA1 <42,43,59>

240W
VCIN1_PH= 1V
reset = 0.84V
180W
VCIN1_PH=0.77V
reset = 0.63V

PC16

.1U_0402_16V7K

EMI@

12

For PROCHOT

2

1

POK<60>

ADP_I<43,59>

3

@

PD1
SM24_SOT23

100K_0402_1%

PR23
110K_0402_1%

1 2

PR6

1 2

100K_0402_1%

PR9

15K_0402_1%

1 2

+5VALW

PR14

1 2

0_0402_5%

1 2

C

B+

PR17

PSID-1

VSB_N_002

@

D

+3VALW

PR4

33_0402_5%

1 3

D

2

C

2

B

E

3 1

PR13

100K_0402_1%

1 2

VSB_N_003

13

D

2

PQ4
2N7002KW_S OT323-3

G

12

S

PC12

.1U_0402_16V7K

1 2

PSID-3

S

PQ7
FDV301N_G 1N SOT2 3-3

G

PSID-2

PQ2
MMST3904-7-F_SOT3 23~D

12

12

PR12

100K_0402_1%

PQ3

SI3457CDV-T1-GE3_TSO P6

4

PC10

0.22U_0603_25V7K

VSB_N_001

S

G

3

PR3

2.2K_0402_5%

1 2

PR8

10K_0402_1%

6
5
2

D

1

B+_BIAS

12

PC11

0.1U_0402_25V6

12

PS_ID <43>

+5VALW

CPU thermal protection at 93 +/- 3 degree C

VCIN0_PH = 1.2V

PR24

12.1K_0402_1%

+3VLP+3VALW

PR25

@

12.1K_0402_1%

1 2

1 2

VCIN0_PH<43>

H_PROCHOT#<43 ,59,8>

PC14

4 4

A

BATT_TEMP<43,58>

1U_0603_25V6K

1 2

PR28

13

D

2

PQ8
DMN65D8LW -7_SOT323-3

G

S

1 2

100K_0402_1%

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

VCIN1_PH<43>

PC13

PR26

100K_0402_1%

1 2

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

@

.1U_0402_16V7K

1 2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

100K_0402_1%_TSM0B104F4251R Z

ECAGND<43>

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR-DCIN / BATT CONN / OTP

PWR-DCIN / BATT CONN / OTP

PWR-DCIN / BATT CONN / OTP

LA-B751P

LA-B751P

LA-B751P

12

PH1

0.1

0.1

58 69Wednesday, March 26, 2014

58 69Wednesday, March 26, 2014

D

58 69Wednesday, March 26, 2014

0.1

A

B

C

D

13

D

2

PR726

1 2

4

4.7_0402_5%

4

1
2
3

1
2
3

12

4.7_0402_5%
PR725

PQ700

G

PR701

S

3M_0402_5%

P1

12

PC701

12

PR705

4.12K_0603_1%

ACIN<17,37,43>

REGN_CHG ACDET_CHG

PR700

1M_0402_5%

12

12

PQ702

MDU1516URH_POWERDFN56-8-5

1
2
3

4

0.1U_0402_25V6

12

PR706

4.12K_0603_1%

PR714

1 2

100K_0402_5%

P2

5

PC707

1U_0603_25V6K

1 2

12

PR715

120K_0402_5%

49.9K_0402_1%

PR719

12

0.004_1206_1%

1

2

CSSP_1

12

PR703

0_0402_5%

0.1U_0402_25V6

VIN

12

PR716

324K_0402_1%

12

PR702

PC708

1 2

CSSP_2

CSSN_2

ADP_I<43,58>

AC Det
Max:18.16V
Typ :17.98V
Min :17.8V

PC719

0.1U_0402_25V4Z~D

Iada=0~12.3A(240W)
Iada=0~9.23A(180W)

ADP_I = 40*Iadapter*Rsense

4

3

CSSN_1

12

BATT++

PR704

0_0402_5%

VIN

PC709

0.1U_0402_25V6

1 2

CMSRC_CHG

1 2

PR717

0_0402_5%

BAT54CW_SOT323-3

ACDRV_CHG

1 2

2

3

1 2

1U_0603_25V6K

PU700

29

1

2

3

4

5

6

7

PC718

100P_0402_50V8J

1 2

PC720
100P_0402_50V8J

PC711

PWPD

ACN

ACP

CMSRC

ACDRV

ACOK

ACDET

IADP

PD700

1

12

PR707

10_1206_1%

LX_CHG

28

27

VCC

BQ24780RUYR_WQFN28_4X4

IDCHG

8

9

<43,58,8>

PC702

0.047U_0402_25V7K

1 2

12

PR708

2.2_0603_1%

BTST_CHG

DH_CHG

25

26

HIDRV

PHASE

PROCHOT#

PMON

10

11

PR7200_0402_5%

PR7240_0402_5%

1 2

1 2

EC_SMB_DA1

H_PROCHOT#

BTST

SDA

B+

PC710

2.2U_0603_16V6K

1 2

REGN_CHG

DL_CHG

23

24

REGN

SCL

12

13

PR7210_0402_5%

1 2

EC_SMB_CK1

LODRV

CMPIN

<42,43,58>

22

GND

BATDRV

BATSRC

TB_STAT#

BATPRES#

CMPOUT

14

<42,43,58>

PL701

EMI@

1UH_6.6A_20%_5X5X3_M

1 2

+3VALW

21

ILIM

20

SRP

19

SRN

18

BATDRV_CHG

17

BATSRC_CHG

16

TB_STAT#_CHG

15

1 2

PR709

20K_0402_1%

PR711

1 2

1.13K_0402_1%

12

+3VALW

12

PC703

PC704

0.1U_0402_25V6

@EMI@

EMI@

2200P_0402_50V7K

12

PR710

6.65K_0402_1%

PQ705

13

D

2N7002W-T/R7_SOT323-3

2

TB_STAT#_CHG

G

S

PR718
10K_0402_5%

PQ703

MDU1516URH_POWERDFN56-8-5

5

1
2
3

4

CHG_B+

12

12

12

PC706

PC705

10U_0805_25V6K

10U_0805_25V6K

PQ704

5

4

DH_CHG

123

AON6552 1N DFN5X6

5.6UH_PCMB104T-5R6MS_8A_20%

MDV1525URH 1N

1 2

12

PR713

4.7_1206_5%

@EMI@

SNUB_CHG

12

PC715
680P_0402_50V7K

@EMI@

0.1U_0402_25V6

LX_CHG

DL_CHG

PR722
10_0402_5%

1 2

PR723
10_0402_5%

1 2

PQ706

3 5

241

PL700

PC716

1 2

BATDRV_CHG

PR712

0.01_1206_1%

1

CHG

2

CSOP_1

0.1U_0402_25V6

PC717

1 2

DMN65D8LW-7_SOT323-3

VIN

PQ707

MDU1516URH_POWERDFN56-8-5

5

1 1

2 2

3 3

1 2

PC722

1000P_0402_50V7K

5

PQ701
MDU1516URH_POWERDFN56-8-5

PC723

1 2

1000P_0402_50V7K

ADPI = 0.004*40 *IADP = 0.16 * IADP

Adapter = 240W
CP = 240W/19.5V *0.9 = 11.07A
ADPI = 1.77V
IPCC= 240W/19.5 V*0.95 = 11.69A
ADPI = 1.86V
IPCC(hybrid)= 2 40W/19.5V = 12.3A
ADPI = 1.97V
PROCHOT = 240W/ 19.5V+(1*0.95) = 13.25A
ADPI = 2.12V

Adapter = 180W
CP = 180W/19.5V *0.9 = 8.30A
APDI = 1.33V
IPCC = 180W/19. 5V*(1*0.95) = 8.77A
ADPI = 1.40V
IPCC(hybrid)= 1 80W/19.5V = 9.23A
ADPI = 1.48V
PROCHOT = 180W/ 19.5V+(1*0.95) = 10.18A
ADPI = 1.62V

4 4

4

3

CSON_1

0.1U_0402_25V6

CC = 3A

CV = 17.7V

PC712

10U_0805_25V5K~D

PC721

1 2

BATSRC_CHG

BATT+

12

12

12

PC714

PC713

10U_0805_25V5K~D

PD701

2 1

10U_0805_25V5K~D

SBR3U40P1-7_POWERDI123-2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

A

B

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR-Charger

PWR-Charger

PWR-Charger

LA-B751P

LA-B751P

LA-B751P

D

59 69Wednesday, March 26, 2014

59 69Wednesday, March 26, 2014

59 69Wednesday, March 26, 2014

0.1

0.1

0.1

A

1 1

3.3V*8.7A=28.71W

28.71/0.85/11=3.07A

5V*7.8A=39W
39/0.85/11=4.17A

3.07A+4.17A=7.24A

PL100

EMI@

1UH_6.6A_20%_5X5X3_M

B+

1 2

2 2

3/5V_B+

12

PC100

0.1U_0402_25V6

@EMI@

12

12

PC103

EMI@

2200P_0402_50V7K

12

PC104

PC113

@

10U_0805_25V6K

10U_0805_25V6K

POK need pull high, it
will pull high on VS
transfer circuit

DCR = 18mohm

PL101

+3VALWP

S COIL 2.2UH +-20% 7.8A 7X7X3

1 2

ESR = 18mohm

1

+

PC107
220U_6.3V_M

2

3.3VALWP
TDC=8.7A
Peak Current 12.4A
OCP current 14.8A

3 3

FSW=475kHz
TYP MAX
H/S Rds(on) : 11.5mohm 14mohm
L/S Rds(on) : 4.2mohm 5mohm

EN
Rising=1.6~0.3V

3V_EN

5V_EN

PD100

VCOUT0_PH#<43>

A

2

1

3

BAS40CW_SOT323-3

PD101

@

LL4148_LL34-2

12

EC_ON<43>

USBCHG_DET_D<35>

4 4

VIN

2.2K_0402_5%

1 2

PR115

@

1M_0402_1%

1 2

PR113

PR114 0_0402_5%

1 2

PR110

4.7_1206_5%

@EMI@

PC109

680P_0603_50V8J

@EMI@

PR100 0_0402_5%

1 2

PR112 0_0402_5%

1 2

12

12

PR116

200K_0402_1%

LX_3V

12

12

PC112

B

6.49K_0402_1%

1 2

POK<58>

PQ100

3 5

241

MDV1525URH 1N PDFN33-8

PQ101

3 5

241

MDU1512RH 1N POWERDFN56-8

PC105

0.1U_0402_25V6

1 2

PR108

0_0603_5%

1 2

PU100

3V_EN

LX_3V

BST_3V

UG_3V

LG_3V

3/5V_B+

OVP=Vout*(112.5%~117.5%)

OCP=Vtrip/Rdson+Iripple/2
Vtrip=Ics(min)*Rcs/8+1mV
Vcs=Ics*vcs should be in the range of 0.2~2V

Vout=VFB*(1+Rtop/Rbot)
VFB=2V

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

4.7U_0603_6.3V6K

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

PR101

PR103

10K_0402_1%

1 2

6

EN2

7

PGOOD

8

SW2

9

VBST2

10

DRVH2

VFB=2V

C

+3VLP

PC101

4.7U_0603_6.3V6K

1 2

VFB=2V

12

PR105

8.87K_0402_1%

CS2

5

CS2

TPS51285BRUKR_QFN20_3X3

DRVL2

11

FB_5V

FB_3V

3

4

2

VFB2

VFB1

VREG3

VREG5

VIN

VO114DRVL1

13

12

VL

12

PC111

4.7U_0603_6.3V6K

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

C

15K_0402_1%

1 2

10K_0402_1%

1 2

12

PR106

8.06K_0402_1%

CS1

1

TP

CS1

EN1

VCLK

SW1

VBST1

DRVH1

15

+5VALWP

PR102

PR104

21

20

5V_EN

PR107

200_0402_1%

19

1 2

18

LX_5V

PR109

17

16

Compal Secret Data

Compal Secret Data

Compal Secret Data

0_0603_5%

1 2

BST_5V

UG_5V

Deciphered Date

Deciphered Date

Deciphered Date

D

Output capacitor ESR need follow
below equation to make sure feed back
loop stability
ESR=20mV*L*fsw/2V

3/5V_B+

12

12

PC102

10U_0805_25V6K

2

@JUMP_43X118

10U_0805_25V6K

3 5

5VALWP
TDC=7.8A
Peak Current 11.2A
OCP current 13.4A
FSW=400kHz
TYP MAX
H/S Rds(on) : 11.5mohm 14mohm
L/S Rds(on) : 4.2mohm 5mohm

+5VALW+5VALWP +3VALW+3VALWP

LG_5V

PC114

@

PC106

0.1U_0402_25V6

1 2

PJP100

112

D

E

PQ102

241

3 5

241

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

DCR = 21mohm

3.3UH_PCMB064T-3R3MS_7A_20%

MDV1525URH 1N PDFN33-8

LX_5V

PQ103

MDU1512RH 1N POWERDFN56-8

PWR-3.3VALWP/5VALWP

PWR-3.3VALWP/5VALWP

PWR-3.3VALWP/5VALWP

LA-B751P

LA-B751P

LA-B751P

PL102

1 2

12

PR111

4.7_1206_5%

@EMI@

12

PC110

680P_0603_50V8J

@EMI@

PJP102

112

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

ESR = 18mohm

1

+

PC108
220U_6.3V_M

2

2

@JUMP_43X118

60 69Wednesday, March 26, 2014

60 69Wednesday, March 26, 2014

60 69Wednesday, March 26, 2014

E

+5VALWP

0.1

0.1

0.1

5

D D

4

3

2

1

1.35V*(7.64A+1A)=11.66W

11.66/0.85/11=1.24A

Pin19 need pull separate from +1.35VP.
If you have +1.35V and +0.675V sequence question,

PJP203

@

B+

1.35VP
TDC=7.64A
Ipeak=10.92A
OCP=13.1A

C C

Switching Frequency: 285kHz

112

JUMP_43 X39

2

12

1UH_11A _20%_7X7X3_M

+1.35VP

1

OVP: 110%~120%
VFB=0.75V, Vout=1.35V
TYP MAX
H/S Rds(on) : 23.2mohm 27.8mohm
L/S Rds(on) : 13.7mohm 16.4mohm

B B

Mode Level +0.675VSP VTTREF_1.35V
S5 L off off
S3 L off on
S0 H on on

Note: S3 - sleep ; S5 - power off

+

PC209

2

220U_B2_2.5VM_R15M

12

PC200

0.1U_0402_25V6

@EMI@

PL201

1 2

@EMI@

@EMI@

680P_04 02_50V7K

1.35V_B+

12

PC201

2200P_0402_50V7K

EMI@

PR202

4.7_1206 _5%

PC211

PR200

2.2_0603 _5%

PR201

6.49K_04 02_1%

1 2

12

1 2

DL_1.35V

CS_1.35V

PC207

1U_0603 _10V6K

1 2

VDD_1.35 V

2.2_0603_5%

1.35V_B+

SYSON<43,62,64>

PR204

1 2

887K_04 02_1%

12

PC203

PC202

10U_0805_25V6K

10U_0805_25V6K

5

PQ200

123

MDV1528URH 1N PDFN33-8

12

12

5

PQ201

123

MDV1526URH 1N PDFN33-8

12

PC204

0.1U_060 3_25V7K

4

+5VALW +1.35VP

4

BST_1.35 V

PR203

5.1_0603 _5%

1 2

PC212

1U_0603 _10V6K

SUSP#<43,45,62>

A A

you can change from +1.35VP to +1.35VS.

BOOT_1.3 5V

DH_1.35V

SW_ 1.35V

15

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

PR206

1 2

PR208

0_0402_ 5%

1 2

0.1U_040 2_10V7K

1 2

16

RT8207M ZQW_W QFN20_3X3

10

0_0402_ 5%

PHASE

PGOOD

PC213

@

PR209

18

17

UGATE

TON

9

TON_1.35V

20

19

PU200

VTT

BOOT

S5

8

EN_1.35V

12

PAD

VLDOIN

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

S3

6

7

FB_1.35V

EN_0.675VSP

+1.35VP +1.35V

12

PC214

@

0.1U_040 2_10V7K

+0.675VSP +0.675VS

21

1

2

3

4

5

VTTREF_ 1.35V

8.06K_04 02_1%

1 2

12

PR207
10K_040 2_1%

PR205

+1.35VP

12

PJP200

@

112

JUMP_43 X118

PJP202

112

JUMP_43 X39

PC205

10U_0805_6.3V6K

2

@

2

0.675Volt +/- 5%
TDC 0.7A
Peak Current 1A

12

PC206

10U_0805_6.3V6K

12

PC210

0.033U_0 402_16V7K

+1.35VP

1

+

PC208

2

330U_D2_2V_Y

+0.675VSP

Security Class ification

Security Class ification

Security Class ification

2014/2/1 1 2014/2/1 1

2014/2/1 1 2014/2/1 1

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/2/1 1 2014/2/1 1

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR-1.35VP/0.675VSP

PWR-1.35VP/0.675VSP

PWR-1.35VP/0.675VSP

LA-B751P

LA-B751P

LA-B751P

1

0.1

0.1

0.1

61 69Wednesd ay, March 2 6, 2014

61 69Wednesd ay, March 2 6, 2014

61 69Wednesd ay, March 2 6, 2014

5

D D

+1.05V_P GOOD<43>

137K_04 02_1%

PR300

0_0402_ 5%

SUSP#<43,45,6 1>

SYSON<4 3,61,64>

1 2

PR304

@

0_0402_ 5%

1 2

PC300

@

1 2

12

0.1U_0402_16V7K

PR303

4

TRIP_+1.05 VSP

EN_+1.05 VSP

FB_+1.05 VSP

RF_+1.05 VSP

12

PR306

470K_04 02_1%

+3VS

12

PR301
100K_04 02_5%

PU300

1

PGOOD

2

TRIP

3

EN

4

VFB

5

TST

TPS5121 2DSCR_SON10_ 3X3

VBST

DRVH

V5IN

DRVL

3

+1.05VSP _B+

12

PC301

5

PQ300

4

PR302

10

BST_+1.0 5VSP

9

UG_+1.05 VSP

8

SW_ +1.05VSP

SW

7

6

LG_+1.05 VSP

11

TP

2.2_0603 _5%

1 2

12

PC308
1U_0603 _6.3V6M

PC305

0.1U_060 3_25V7K

1 2

+5VALW

MDV1528 URH 1N PDFN33-8

123

5

4

PQ301

123

0.1U_0402_25V6

@EMI@

12

12

MDV1526URH 1N PDFN33-8

2

12

12

PC303

PC302

2200P_0402_50V7K

1 2

PR305

PC309

10U_0805_25V6K

PL300

@EMI@

@EMI@

EMI@

1UH_6.6A _20%_5X5X3_M

4.7_1206 _5%

680P_04 02_50V7K

1

PJP301

@

2

112

JUMP_43 X39

12

PC304

@

10U_0805_25V6K

B+

1.05V*6.5A=6.82W

6.82/0.85/11=0.73A

1.05VSP
TDC 6.5A
Peak Current 9.3A
OCP current 11.1A
FSW=290kHz

+1.05VSP

1

+

PC306

2

220U_B2_2.5VM_R15M

C C

12

PR308
10K_040 2_1%

PR307

4.99K_04 02_1%

1 2

+1.05VSP +1.05VS

Switching Frequency: 290kHz
OVP: 120%-130%
VFB=0.7V
TYP MAX
H/S Rds(on) : 23.2mohm 27.8mohm
L/S Rds(on) : 13.7mohm 16.4mohm

PJP300

@

2

112

JUMP_43 X118

+3VS

B B

+5VS

12

1U_0402 _10V6K

PC408

4.7U_060 3_10V6K

12

PC405

12K_040 2_1%

PR407

12

EN_1.5V+3VS

12

1U_0402 _10V6K
PC409

PU401

RT9041E -15GQW_W DFN8_2X2

8

7

6

5

VIN

NC

VDD

EN

VOUT

ADJ

PGOOD

GND

PGND

1

2

FB_1.5V

3

4
9

12

4.99K_04 02_1%
PR405

12

5.62K_04 02_1%
PR406

+1.5VSP

12

2.2U_060 3_10V6K
PC406

+1.5VSP +1.5VS

PJP403

112

JUMP_43 X39@

2

FB=0.8V

Vo=0.8(1+Rt/Rb)=1.51V

A A

Security Class ification

Security Class ification

Security Class ification

2014/2/1 1 2014/2/1 1

2014/2/1 1 2014/2/1 1

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/2/1 1 2014/2/1 1

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR-1.05VSP/1.5VSP

PWR-1.05VSP/1.5VSP

PWR-1.05VSP/1.5VSP

LA-B751P

LA-B751P

LA-B751P

1

0.1

0.1

0.1

62 69Wednesd ay, March 2 6, 2014

62 69Wednesd ay, March 2 6, 2014

62 69Wednesd ay, March 2 6, 2014

0.95V*86.2=81.7 W

81.7/0.85/11=8. 7A

B+

PJP600@

2

112

JUMP_43X118

PR603

0.001_1206_LE_1%

4

3

1

GPU_B+_VRAMGPU_B+_VRAM

2

CSSN_B+

PR604

0.001_1206_LE_1%

4

3

1

GPU_B+

2

CSSN_VGA

GPU_B+_VRAM<64>

3V3_MAIN_EN

@

PC626

0.01U_0402_16V7K

VSSSENSE_VGA

VCCSENSE_VGA

+VGA_CORE

12

1U_0402_6.3V6K

12

PC613

12

PR620
0_0402_5%~D@

2

12

PR631
10K_0402_1%~D

100_0402_1%

1 2

1 2

1 2

GPU_REFIN

12

@

13

D

@

G

@

S

PR622

0_0402_5%

1 2

PR624

PR627

0_0402_5%

PR629

100_0402_1%

PR623

GPU_B+

CSSP_B+

+3VS

12

PR600
0_0402_5%~D

PR610

@

0_0402_5%

1 2

12

PR602
0_0402_5%~D

@

PR607

0_0402_5%

12

PR606

39.2K_0402_1%

12

PC617

GPU_REFIN

GPU_VREF

GPU_TON

1 2

1500P_0402_50V7K

PR613

39.2K_0402_1%

PU600

7

8

9

10

11

12

REFIN

VREF

TON

RGND

VSNS

SS

GND

25

PR611

1.5K_0402_1%

1 2

@

12

PC616

PR616

3K_0402_1%

1 2

30.1K_0402_1%

12

1500P_0402_50V7K

PR618

1.5K_0402_1%

PQ610

2N7002KW_SOT323-3

PR650

340K_0402_1%

12

12

PC635

@EMI@

2200P_0402_50V7K~D

@

47P_0402_50V8J~D

GPU_PSI

GPU_REFADJ

GPU_EN

GPU_VID

U2_UGATE1U2_UGATE2

4

3

5

6

13

2

EN

PSI

VID

REFADJ

TSNS/ISEN3

UGATE1

TALERT/ISEN2

PGOOD

VCC/ISNE1

14

17

16

15

1 2

12

PC614

PR601

U2_BOOT1

2.2 +-5% 0603

1 2

U2_BOOT1

1

BOOT1

24

PHASE1

23

LGATE1

22

GND/PWM3

21

PVCC

20

LAGTE2

19

PHASE2

BOOT218UGATE2

RT8813AGQW_WQFN24_4X4

@

@

NVVDD PWM_VID <46>

+3VS

12

PR614

10K_0402_1%~D

12

PC618

47P_0402_50V8J~D

12

PC612

U2_PHASE1

.1U_0603_25V7K

U2_LGATE1

U2_PWM3

U2_LGATE2

U2_PHASE2

CSSP_B+<49> CSSN_B+<49>

NVVDD PSI <46>

PR615

@

0_0402_5%

1 2

PR621

0_0402_5%

1 2

PR625

2.2 +-5% 0603

1 2

12

PC622

1U_0603_6.3V6M

DGPU_PWR_EN <21,46,49>

3V3_MAIN_EN <46,49,63>

+5VS

CSSP_VGA<49> CSSN_VGA<49>

U2_LGATE1

2.2 +-5% 0603

1 2

U2_BOOT2

PR617

CSSP_VGA

12

3

3

2

D1

S2

1 2

2

D1

S2

1 2

U2_UGATE1

1

G1

D2/S1

S24S2

G2

5

6

PR649

11.8K_0402_1%

U2_UGATE2

1

G1

D2/S1

S24S2

G2

5

6

U2_LGATE2

PC619

.1U_0603_25V7K

12

PC600

10U_0805_25V6K

U2_UGATE1

1

2

PQ606

AON6970_DFN5X6D-8-7

7

PQ608

AON6970_DFN5X6D-8-7

7

PQ605

AON6970_DFN5X6D-8-7

D1

G1

D2/S1

S24S2

S2

5

3

6

U2_LGATE1

GPU_B+

U2_UGATE2

1

2

D1

G1

D2/S1

S24S2

S2

5

3

6

U2_LGATE2

0.22UH_PCME064T-R22MS0R985_28A_20%

7

U2_PHASE1

G2

PR608

4.7_1206_5%

@EMI@

12

PC601

10U_0805_25V6K

PQ607

AON6970_DFN5X6D-8-7

7

U2_PHASE2

G2

PR626

4.7_1206_5%

@EMI@

12

12

0.22UH_PCME064T-R22MS0R985_28A_20%

12

12

12

PC603

PC606

4.7U 25V K X5R 0805

PL601

12

PC615

680P_0603_50V7K

@EMI@

12

12

PC607

PC604

4.7U 25V K X5R 0805

4.7U 25V K X5R 0805

PL602

12

PC621

680P_0603_50V7K

@EMI@

12

PC634

@EMI@

2200P_0402_50V7K~D

4.7U 25V K X5R 0805

+VGA_CORE

VBOOT=0.875V

VGA_CORE
TDC 86A
Peak Current 14 0A
OCP=168A
T YP MAX
L/S Rds(on):6.7 mohm ,8.5mohm

PR638

1 2

10K_0402_1%

U2_PHASE3

+5VS

GPU_PGOOD1

GPU_TALERT/ISEN2

GPU_TSNS/ISEN3

GPU_DSBL/ISEN1

U2_BOOT2

GPU_PGOOD<46,49>

+3VS

12

PR639

PR619

0_0402_5%

10K_0402_1%~D

1 2

12

PC627

@

0.01U_0402_16V7K

PR646

1 2

10K_0402_1%

U2_PHASE2

PR648

1 2

10K_0402_1%

U2_PHASE1

0_0402_1%

DGPU_PWR_EN

U2_PWM3

PR642

0_0402_5%

12

PR643

2.2 +-5% 0603

12

PC629
.1U_0603_25V7K

PR641

1 2

8

UGATE

VCC

12

1

BOOT

EN

5

PWM

PHASE

6

LGATE

GND

TP

9

PU601
RT9610BZQW WDFN8 MOSFET DRI VER ET88

3

4

2

7

U2_UGATE3

U2_BOOT3

U2_PHASE3

U2_LGATE3

U2_UGATE3

1

2

PQ611

AON6970_DFN5X6D-8-7

D1

G1

7

D2/S1

S24S2

S2

G2

5

3

6

U2_LGATE3

PR633

2.2 +-5% 0603

1 2

U2_BOOT3

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

PC625

1 2

.1U_0603_25V7K

GPU_B+

U2_UGATE3

1

2

D1

G1

D2/S1

S24S2

S2

5

3

6

U2_LGATE3

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

12

12

PC602

10U_0805_25V6K

PQ609

AON6970_DFN5X6D-8-7

7

U2_PHASE3

G2

12

PC605

PC608

4.7U 25V K X5R 0805
PL603

0.22UH_PCME064T-R22MS0R985_28A_20%

12

@EMI@

PR640

12

4.7_1206_5%

PC628

680P_0603_50V7K

@EMI@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

4.7U 25V K X5R 0805

12

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR-VGA_CORE

PWR-VGA_CORE

PWR-VGA_CORE

LA-B751P

LA-B751P

LA-B751P

0.1

0.1

63 69Wednesday, March 26, 2014

63 69Wednesday, March 26, 2014

63 69Wednesday, March 26, 2014

0.1

5

4

3

2

1

1.35V*18.6A=25.11W

33.42/0.85/11=2.68A

PJP303

D D

+3VS

+1.35VS_ VGA_PGOOD<46 >

PR312

162K_04 02_1%

PR313

0_0402_ 5%

FBVDD_E N<4 6>

C C

SYSON<4 3,61,62>

1 2

PR315

@

0_0402_ 5%

1 2

PC312

@

1 2

12

0.1U_0402_16V7K

12

PR310
10K_040 2_1%

12

TRIP_+1.35 VS_VGAP

EN_+1.35 VS_VGAP

FB_+1.35 VS_VGAP

RF_+1.35 VS_VGAP

12

PR311

470K_04 02_1%

PR316

9.31K_04 02_1%

1 2

PR318
100K_04 02_5%

PU301

1

PGOOD

2

TRIP

3

EN

4

VFB

5

TST

TPS5121 2DSCR_SON10_ 3X3

VBST

DRVH

V5IN

DRVL

SW

TP

10

BST_+1.3 5VS_VGAP

9

UG_+1.35 VS_VGAP

8

SW_ +1.35VS_VGAP

7

6

LG_+1.35 VS_VGAP

11

PR309

2.2_0603 _5%

1 2

12

PC313
1U_0603 _6.3V6M

PC315

0.1U_060 3_25V7K

1 2

+5VALW

4

4

FB_VDDQ_SENSE<49>

5

123

5

123

+1.35VS_ VGAP_B+

PC314

0.1U_0402_25V6

@EMI@

PQ303

MDU1516URH_POWERDFN56-8-5

PQ302

MDU1511RH_POWERDFN56-8-5

12

PC307

PL301

@EMI@

@EMI@

PR317
10_0402 _1%

12

PC310

@

10U_0805_25V6K

12

12

PC316

EMI@

2200P_0402_50V7K

1UH_PCM B104T-1R0MH_1 8A_20%

1 2

12

PR314

4.7_1206 _5%

12

PC317

680P_04 02_50V7K

12

10U_0805_25V6K

@

112

JUMP_43 X39

2

GPU_B+_VRAM <63>

+1.35VDGPUP
TDC 18.6A
Peak Current 26.57A
OCP current 31.88A
FSW=290kHz

+1.35VS_VGAP

1

1

+

+

PC311

PC318

2

2

220U_B2_2.5VM_R15M

220U_B2_2.5VM_R15M

Switching Frequency: 290kHz
OVP: 120%-130%
VFB=0.7V
TYP MAX
H/S Rds(on) : 11.4mohm 14mohm
L/S Rds(on) : 2.7mohm 3.3mohm

PJP302

B B

A A

5

4

3

+1.35VS_VGAP +1.35VS_VGA

2

@

2

112

JUMP_43 X118

PJP304

@

2

112

JUMP_43 X39

PJP305

@

2

112

JUMP_43 X39

Title

Title

Title

<Title>

<Title>

<Title>

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

LA-B751P 0.1

A3

LA-B751P 0.1

A3

LA-B751P 0.1

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

64 69Wednesd ay, March 2 6, 2014

64 69Wednesd ay, March 2 6, 2014

64 69Wednesd ay, March 2 6, 2014

1

5

4

3

2

1

@EMI@

12

PC507

0.1U_0402_25V6K~D

12

PR516

@

10K_0402_1%

1 2

PR518

@

10K_0402_1%

1 2

EMI@

12

@EMI@

PC516

2200P_0402_50V7K

PL502

4

3

PR538

PR546

PR547

12

PL503

4

3

PR555

12

12

CPU_B+

12

2200P_0402_50V7K

1

2

PL504

1 2

12

12

1

PC530

2

1

2

1

+VCC_CORE

B+

1

+VCC_CORE

2

V2N

12

ISUMN

1

+

+

PC531

2

100U_25V_M

+VCC_CORE

V1N

12

PR556
10_0402_1%

ISUMN

65 69W ednesday, March 26, 2014

65 69W ednesday, March 26, 2014

65 69W ednesday, March 26, 2014

PR515

1 2

10_0402_1%

ISUMN

PR544
10_0402_1%

100U_25V_M

0.1

0.1

0.1

+5VS

PC501

0.22U_0603_16V7K

12

24
23
22
21
20
19
18
17

PR535

549_0402_1%

PC528

1 2

PR549

11K_0402_1%

1 2

PR501

PC502

0_0402_5%

1 2

1U_0603_10V6K

PU501

6

UGATE

VCC

7

FCCM

BOOT

3

PWM

PHASE

4

LGATE

GND

9

TP

ISL6208BCRZ-T_QFN8_2X2

+5VS

PR520

PC509

1U_0603_10V6K

1 2

LGATE2

LGATE1

PHASE1

UGATE1

12

12

PC518

1U_0603_10V6K

PC529

0.1U_0603_25V7K~D

1 2

PC538

0.068U_0603_50V7K

1 2

PR551

2.61K_0402_1%

1 2

@

PR558

5.1M_0402_5%

1 2

0_0402_5%

1 2

@

PR523

VCORE_VDDP

0_0402_5%~D

CPU_B+

ISUMPISUMN

3

12

+5VS

PWM3

BOOT1

PR526

0_0402_5%

1 2

PC511

0.22U_0603_25V7K
PR530

1_0603_1%~D

1 2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+VCCIO_OUT

D D

VIDSOUT<12>

VIDALERT_N<12>

VIDSCLK<12>

IMVP_VR_ON<43>

PC500

1 2

PR521

100K_0402_1%

PR527

@

1 2

0_0402_5%

PC539

0.22U_0402_6.3V6K

PC540

0.22U_0402_6.3V6K

PC544

0.22U_0402_6.3V6K

PR519 1.91K_0402_1%

12

12

PC510

PR539

1 2

1 2

PC526

12

12

12

PC547

.1U_0402_16V7K

47P_0402_50V8J

909_0402_1%

6800P_0402_25V7K

12

+3VS

IMVP_PWRGD<17,8>

1000P_0402_50V7K

C C

VR_HOT#<43>

+1.05VS

B B

ISEN3

ISEN2

ISEN1

A A

PR505 0_0402_5%

PR506 0_0402_5%

PR508 0_0402_5%

12

PR522

0_0402_5%

1 2

PR524

0_0402_5%

1 2

470K_0402_5%_ TSM0B474J4702RE

PR528

27.4K_0402_1%

PC525

47P_0402_50V8J

1 2

VCCSENSE<12>

ISUMN

VSSSENSE<12>

PR500 130_0402_1%~D

PR503 75_0402_5%@

PR504 54.9_0402_1%

1 2

1 2

1 2

PR511

0_0402_5%

1 2

VCC_PGOOD

VR_HOT#1

PR525

1 2

12

3.83K_0402_1%

PH500

12

1 2

1 2

12

12

12

VR_ON

IMON

NTC

PR533

12

499_0402_1%

PR537

2.87K_0402_1%

PR543
2K_0402_1%

PC527
330P_0402_50V7K~D

PC541

@

1 2

330P_0402_50V7K

PC546

1 2

0.01U_0402_50V7K

SDA

ALERT#

SCLK

COMP

FB

33

1 2

6.04K_0402_1%

PC520

470P_0402_50V7K

12

12

21K_0402_1%

1 2

3.24K_0402_1%

1 2

21K_0402_1%

1 2

1

SCLK

2

VR_ON

3

PGOOD

4

IMON

5

VR_HOT#

6

NTC

7

COMP

8

FB

PAD

PR529

12

PC545

@

PR507

PR509

PR512

30

31

32

SDA

ALERT#

SLOPE/PROG1

FB2/VSEN9ISEN310ISEN211ISEN112RTN13ISUMN14ISUMP15VDD

10KB_0402_5%_ERTJ0ER103J

0.082U_0402_16V7K

25

26

27

28

29

BOOT2

PROG2

PROG3

UGATE2

16

12

PC521

PR545

1 2

BOOT2
UGATE2

PHASE2

PHASE2

LGATE2

VDDP

PWM3
LGATE1
PHASE1
UGATE1

BOOT1

VIN

PU500

ISL95812HRZ-T_QFN32_4x4

12

4700P_0402_50V7K~D

1.5K_0402_1%

0.15U_0402_10V6K~D

PR548

0_0402_5%

1 2

PH501

1 2

Local sense put on HW site

5

4

1 2

12

PR502

2.2_0603_5%

1

2

8

5

UGATE3

BOOT3

PHASE3PW M3

LGATE3

PR534

1 2

2.2_0603_5%

PR550

2.2_0603_5%

12

PC522

0.22U_0603_16V7K

12

1 2

PC542

0.22U_0603_16V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

BOOT2

BOOT1

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

UGATE3

1

2

PQ505

AON6970_DFN5X6D-8-7

D1

G1

7

D2/S1

S24S2

S2

G2

5

3

6

LGATE3

VCC_core (Base on PDDG rev 0.8)
TDC 33A
Peak Current 95A
DC Load line -1.5mV/A
Icc_Dyn_VID1 60A
OCP current 114A
TYP MAX
L/S Rds(on):6.7mohm ,8.5mohm
DCR 0.82m ohm

UGATE2

1

2

PQ504

AON6970_DFN5X6D-8-7

D1

G1

7

D2/S1

S24S2

S2

G2

5

3

6

LGATE2

UGATE1

1

2

PQ502

AON6970_DFN5X6D-8-7

D1

G1

7

D2/S1

S24S2

S2

G2

5

3

6

LGATE1

Deciphered Date

Deciphered Date

Deciphered Date

UGATE3

1

2

PQ506

AON6970_DFN5X6D-8-7

D1

G1

7

D2/S1

S24S2

S2

5

3

2

D1

D2/S1

S24S2

S2

5

3

2

D1

D2/S1

S24S2

S2

5

3

2

PHASE3

G2

6

LGATE3

CPU_B+

UGATE2

1

PQ503

AON6970_DFN5X6D-8-7

G1

7

PHASE2

G2

6

LGATE2

CPU_B+

@

12

UGATE1

PC533

10U_0805_25V6K

1

PQ501

AON6970_DFN5X6D-8-7

G1

7

PHASE1

G2

6

LGATE1

PR554

@

12

PC505

PC503

10U_0805_25V6K

12

PC508

SNB_CPU_P3

680P_0603_50V7K

12

PR513

4.7_1206_5%

@

12

12

PC513

PC512

10U_0805_25V6K

10U_0805_25V6K

12

3.65K_0603_1%

PC524

SNB_CPU_P2

12

680P_0603_50V7K

ISUMP

PR541

4.7_1206_5%

12

12

PC535

PC534

10U_0805_25V6K

10U_0805_25V6K

12

PR552

PC543

SNB_CPU_P1

3.65K_0603_1%

1 2

12

680P_0603_50V7K

ISUMP

4.7_1206_5%

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

@EMI@

12

12

PC504

PC506

10U_0805_25V6K

10U_0805_25V6K

PL501

0.22UH_PCME064T-R22MS_28A_20%

4

3

P3_SW V3N

PR510

10K_0603_1%

ISEN3

V1N

PR514

1 2

3.65K_0603_1%

V2N

ISUMP

1.8V*33A=59.4W

59.4/0.85/11=6.35A

FBMA-L11-453215-800LMA90T_1812

12

12

@EMI@

PC514

PC515

10U_0805_25V6K

0.1U_0402_25V6K~D

0.22UH_PCME064T-R22MS_28A_20%

PR536

P2_SW

1 2

10K_0603_1%

1 2

ISEN2

@

10K_0402_1%

V1N

@

10K_0402_1%

V3N

@EMI@

@EMI@

12

PC537

PC536

2200P_0402_50V7K

0.1U_0402_25V6K~D

0.22UH_PCME064T-R22MS_28A_20%

P1_SW

PR553

10K_0603_1%

1 2

ISEN1

@

V2N

10K_0402_1%

PR557

@

V3N

10K_0402_1%

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PWR-CPU_CORE

PWR-CPU_CORE

PWR-CPU_CORE

LA-B751P

LA-B751P

LA-B751P

5

4

3

2

1

+VCC_CORE

1

+

PC906

330U_D2 _2.5VM_R9M

2

D D

1

+

PC905

330U_D2 _2.5VM_R9M

2

+VCC_CORE

1

PC900
10U_060 3_4VAM

2

1

PC901
10U_060 3_4VAM

2

1

PC902
10U_060 3_4VAM

2

1

PC903
10U_060 3_4VAM

2

+VCC_CORE

C C

1

PC917
22U_080 5_6.3VAM

2

1

PC922
22U_080 5_6.3VAM

2

1

PC918
22U_080 5_6.3VAM

2

1

PC923
22U_080 5_6.3VAM

2

1

PC919
22U_080 5_6.3VAM

2

1

PC924
22U_080 5_6.3VAM

2

1

PC920
22U_080 5_6.3VAM

2

1

PC925
22U_080 5_6.3VAM

2

1

PC921
22U_080 5_6.3VAM

2

1

PC926
22U_080 5_6.3VAM

2

+VGA_CO RE

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

12

12

1

2

12

PC928

PC927

22U_0805_6.3VAM

22U_0805_6.3VAM

PC944

1

PC945

2

4.7U_0603_6.3V

4.7U_0603_6.3V

PC954

PC955

12

.1U_0402_16V7K

.1U_0402_16V7K

@

12

12

12

12

PC930

PC929

4.7U_0603_6.3V

4.7U_0603_6.3V

PC947

PC946

12

4.7U_0603_6.3V

4.7U_0603_6.3V

@

PC957

PC956

12

.1U_0402_16V7K

@

12

PC931

+VGA_CO RE

4.7U_0603_6.3V

PC948

12

4.7U_0603_6.3V

PC958

12

.1U_0402_16V7K

.1U_0402_16V7K

12

12

12

@

12

PC932

PC933

4.7U_0603_6.3V

4.7U_0603_6.3V

PC950

PC949

12

4.7U_0603_6.3V

4.7U_0603_6.3V

@

PC960

PC959

12

.1U_0402_16V7K

@

12

12

PC934

PC999

4.7U_0603_6.3V

4.7U_0603_6.3V

PC952

PC951

12

12

4.7U_0603_6.3V

4.7U_0603_6.3V

@

PC961

12

PC962

12

.1U_0402_16V7K

.1U_0402_16V7K

12

PC1000

4.7U_0603_6.3V

@

PC953

12

4.7U_0603_6.3V

PC963

12

.1U_0402_16V7K

12

12

PC1001

PC1002

22U_0805_6.3VAM

22U_0805_6.3VAM

PC1010

PC1009

1

1

2

2

4.7U_0603_6.3V

4.7U_0603_6.3V

@

PC964

12

PC965

12

.1U_0402_16V7K

.1U_0402_16V7K

12

12

1

2

1

+

2

PC1004

PC1003

22U_0805_6.3VAM

22U_0805_6.3VAM

PC1011

PC1012

1

2

1

+

PC966

2

330U_D2_2VM_R6M

330U_D2_2VM_R6M

.1U_0402_16V7K

.1U_0402_16V7K

12

12

1

2

PC967

PC1006

PC1005

22U_0805_6.3VAM

22U_0805_6.3VAM

PC1013

PC1014

1

2

1

1

+

+

PC969

2

2

330U_D2_2VM_R6M

.1U_0402_16V7K

.1U_0402_16V7K

12

PC1007

22U_0805_6.3VAM

PC1015

1

2

PC970

330U_D2_2VM_R6M

10U_0603_4VAM

PC904

1

12

PC1008

2

22U_0805_6.3VAM

22U_0805_6.3VAM

PC1016

1

2

PC1017

1

2

10U_0603_4VAM

10U_0603_4VAM

PC907

1

2

10U_0603_4VAM

PC908

1

2

PC909

1

2

+VCC_CORE

12

12

12

12

Issued Date

Issued Date

Issued Date

PC990

1U_0402 _6.3V6K

PC992

1U_0402 _6.3V6K

PC985

1U_0402 _6.3V6K

PC984

1U_0402 _6.3V6K

1

PC937
22U_080 5_6.3VAM

2

1

PC942
22U_080 5_6.3VAM

2

1

PC972
22U_080 5_6.3VAM

2

5

1

PC936
22U_080 5_6.3VAM

2

1

PC941
22U_080 5_6.3VAM

2

1

PC973
22U_080 5_6.3VAM

2

1

PC935
22U_080 5_6.3VAM

2

B B

A A

1

PC940
22U_080 5_6.3VAM

2

1

PC977
22U_080 5_6.3VAM

2

1

PC938
22U_080 5_6.3VAM

2

1

PC943
22U_080 5_6.3VAM

2

1

PC976
22U_080 5_6.3VAM

2

1

PC974
22U_080 5_6.3VAM

2

1

PC939
22U_080 5_6.3VAM

2

1

PC975
22U_080 5_6.3VAM

2

1

PC971
22U_080 5_6.3VAM

2

1

PC978
22U_080 5_6.3VAM

2

4

Security Class ification

Security Class ification

Security Class ification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PC988

1U_0402 _6.3V6K

12

PC980

1U_0402 _6.3V6K

12

PC996

1U_0402 _6.3V6K

12

PC986

1U_0402 _6.3V6K

2014/2/1 1 2014/2/1 1

2014/2/1 1 2014/2/1 1

2014/2/1 1 2014/2/1 1

3

12

PC987

1U_0402 _6.3V6K

12

PC993

1U_0402 _6.3V6K

12

PC995

1U_0402 _6.3V6K

12

PC997

1U_0402 _6.3V6K

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

12

PC998

1U_0402 _6.3V6K

12

PC983

1U_0402 _6.3V6K

12

PC989

1U_0402 _6.3V6K

12

PC994

1U_0402 _6.3V6K

12

PC982

1U_0402 _6.3V6K

12

PC981

1U_0402 _6.3V6K

12

PC991

1U_0402 _6.3V6K

12

PC979

1U_0402 _6.3V6K

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR-PROCESSOR DECOUPLING

PWR-PROCESSOR DECOUPLING

PWR-PROCESSOR DECOUPLING

LA-B751P

LA-B751P

LA-B751P

66 69Wednesd ay, March 2 6, 2014

66 69Wednesd ay, March 2 6, 2014

66 69Wednesd ay, March 2 6, 2014

1

0.1

0.1

0.1

5

4

3

2

1

Power block

CPU OTP

D D

B+

+3VALWP: TDC:6.2A
+5VALWP: TDC:9.8A

DC IN

Input
Switch

Page 46

TPS51285BRUKR

CHARGER
CC:A
CV:

+1.35VP/+0.675VSP: TDC:8.4A/0.7A
RT8207MZQW

BQ24780

Page 46

C C

Battery

DGPU_PWR_EN

B B

+VGA_CORE
TDC:40.6A
RT8813AGQW

Page 50

+1.05VSP: TDC:7A
TPS51212DSCR

Page 45

Turn Off

Always

Page 47

SYSON

Page 48

SUSP#

Page 49

VR_ON

+VCC_CORE
TDC: 10A
TPS51624

Page 51

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR_POWER BLOCK DIAGRAM

PWR_POWER BLOCK DIAGRAM

PWR_POWER BLOCK DIAGRAM

LA-B751P

LA-B751P

LA-B751P

67 69Wednesday, March 26, 2014

67 69Wednesday, March 26, 2014

67 69Wednesday, March 26, 2014

1

0.1

0.1

0.1

5

Item

Item Issue Description

ItemItem

D D

C C

Page# Title

Page#Page#

Title

TitleTitle

Date

DateDate

4

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Request

Request

RequestRequest
Owner

Owner

OwnerOwner

Issue DescriptionDate

Issue DescriptionIssue Description

3

Page 1

Page 1

Page 1Page 1

2

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

1

Rev.Page#

Rev.Rev.

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2014/2/11 2014/2/11

2014/2/11 2014/2/11

2014/2/11 2014/2/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR-PIR

PWR-PIR

PWR-PIR

LA-B751P

LA-B751P

LA-B751P

1

0.1

0.1

68 69Wednesday, March 26, 2014

68 69Wednesday, March 26, 2014

68 69Wednesday, March 26, 2014

0.1

5

4

3

2

1

MCU@

D D

R76

1 2

0_0402 _5%

1

1

C49

C50

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

MCU@

MCU@

+3VS_MCU+3VS

1

1

1

1

C53

C51

C52

C54

2

2

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
.001U_0402_50V7-M

MCU@

.001U_0402_50V7-M

MCU@

MCU@

MCU@

+3VS_MCU +3VS_MCU

C57

C58

1

1

MCU@

MCU@

2

2

10U_0402_6.3V6M

0.01U_0402_16V7K

C C

USB20_N9

USB20_N9<20>

USB20_P 9

USB20_P 9<20>

R82 1.5K_0402_5 %

R83 22_04 02_5%MCU@
R84 22_04 02_5%MCU@

12

R85

@

15K_0402_1%

C60
12P_04 02_50V 8J

MCU@

1 2

MCU@

1 2
1 2

12

USB20_N9 _TP
USB20_P 9_TP

Y4

12MHZ_12 PF_5YEA 12000 122IFA 2Q3

R86 2.2K_04 02_1%MCU@

MCU@

34
21

12

C61
12P_04 02_50V 8J

MCU@

SWDIO
SWCLK

1 2

U7 STM32F 103C8 T7TR_L QFP48 _7X7

10

PA0-WKUP

11

PA1

12

PA2

13

PA3

14

PA4

15

PA5

16

PA6

17

PA7

29

PA8

30

PA9

31

PA10

32

PA11

33

PA12

34

PA13

37

PA14

38

PA15

5

OSC_IN

PD0-OSC_IN

6

OSC_OUT

PD1-OSC_OUT

7

SWD_NR ST

NRST

1

C59

0.1U_040 2_16V4 Z

MCU@

2

9

VSSA

8

24

VDDA

VDD_1

VSS_123VSS_2

35

1

36

48

VBAT

VDD_2

VDD_3

PC13-TAMPER-RTC

PC14-OSC32_IN

PC15-OSC32_OUT

VSS_3

47

18

PB0

19

PB1

1 2

20

PB2

39

R81 10K_ 0402_5 %MC U@

PB3

40

PB4

41

PB5

BOOT0

42

PB6

43

PB7

45

PB8

46

PB9

21

PB10

22

PB11

25

PB12

26

PB13

27

PB14

28

PB15

2
3
4

44

TP_CLK _I2C
TP_DAT A_I2C

USBTP@

R2662 0_ 0402_ 5%

1 2

USB20_N9

1 2

USB20_P 9 TP_+

R2663 0_ 0402_ 5%

USBTP@

12

MCU@

10K_04 02_5%
R87

USB20_P 9_R

MCU@

R2654 0_ 0402_ 5%

1 2
1 2

R2655 0_ 0402_ 5%

MCU@

USBTP@

R2660 0_ 0402_ 5%

1 2
1 2

R2661 0_ 0402_ 5%

USBTP@

TP_-

TP_- <38,6 9>

TP_+

TP_+ <38,69 >

TP_-USB20_ N9_R

TP_- <38,6 9>
TP_+ <38,69 >

MCU@

Reserved for debug

1 2

SWD_NR ST

R75 0_04 02_5%MCU@

1 2

SWCLK

R99 0_04 02_5%MCU@

1 2

SWDIO

B B

R100 0_040 2_5%MCU@

T93

T94

T101

A A

Title

Title

Title

<Title>

<Title>

<Title>

Size Docume nt Number Rev

Size Docume nt Number Rev

Size Docume nt Number Rev

<Doc> <RevCode >

D

<Doc> <RevCode >

D

<Doc> <RevCode >

D

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

1

69 69We dnesday, March 2 6, 2014

69 69We dnesday, March 2 6, 2014

69 69We dnesday, March 2 6, 2014