Compal LA-9941P VAUB0, XPS 15 Schematic

Page 1
A
B
C
D
E
PCB NO :
VAUB0
LA-9941P DAA0006W000
BOM P/N :
1 1
ZZZ
PCB
R1@
TBD
ZZZ
PCB
R3@
Dell/Compal Confidential
Schematic Document
Phantom(Shark Bay)
Hasweill(BGA) + Lynx Point
DISCRETE VGA N14P(optimus) --- Testarossa
2 2
DISCRETE VGA N15P(optimus) --- Testarossa-P
201
3-01-02
Rev: 0.1 (X00)
U6
R3@
CPU
UV1
N15R3@
3 3
N15P-Q1
R3@
N14R3@
U7
PCH
UV1
N14P-GT
R1@
N15R1@
U6
CPU
UV1
N15P-Q1
R1@
N14R1@
U7
PCH
UV1
CONN@ : Connector Component
N14P-GT
@ : Nopop Component
TPM@ : TPM function
DSP@ : DSP function N14@ : DGPU N14P-GT N15@ : DGPU N15P-Q1
Samsung 2G
UV5
K4G41325FC-HC04_FBGA170P~D
VRAMSR3@
UV9
K4G41325FC-HC04_FBGA170P~D
VRAMSR3@
UV6
K4G41325FC-HC04_FBGA170P~D
VRAMSR3@
UV10
K4G41325FC-HC04_FBGA170P~D
VRAMSR3@
Hynix 2G
UV5
4 4
H5GC4H24MFR-T2C_FBGA170P~D
VRAMHR3@
UV9
H5GC4H24MFR-T2C_FBGA170P~D
VRAMHR3@
UV6
H5GC4H24MFR-T2C_FBGA170P~D
VRAMHR3@
UV10
H5GC4H24MFR-T2C_FBGA170P~D
VRAMHR3@
A
Samsung 2G
UV5
K4G41325FC-HC04_FBGA170P~D
VRAMSR1@
UV9
K4G41325FC-HC04_FBGA170P~D
VRAMSR1@
Hynix 2G
UV5
H5GC4H24MFR-T2C_FBGA170P~D
VRAMHR1@
UV9
H5GC4H24MFR-T2C_FBGA170P~D
VRAMHR1@
B
UV6
K4G41325FC-HC04_FBGA170P~D
VRAMSR1@
UV10
K4G41325FC-HC04_FBGA170P~D
VRAMSR1@
UV6
H5GC4H24MFR-T2C_FBGA170P~D
VRAMHR1@
UV10
H5GC4H24MFR-T2C_FBGA170P~D
VRAMHR1@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.
C
2011/08/25 2011/08/25
2011/08/25 2011/08/25
2011/08/25 2011/08/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
LA-9941P
E
1 62Wednesday, September 04, 2013
1 62Wednesday, September 04, 2013
1 62Wednesday, September 04, 2013
0.1
0.1
0.1
Page 2
A
128M*16 x4 =1G
VRAM * 4 GD
DR5
GB4-128
1 1
Mini DP
2 2
Mi
(WLAN+BT4.0)
P.37
Port 3 Por
ni Card-1 (Half)
P.42
USB2.0
Port 4
Daughter board
GPU N14P
-GT
mD
P
Redriver
Card Reader
RTS5249
Daughter board
3 in 1 Socket
P.29~30
P.24~28
P.37
t 4
SPI Flash (BIOS 8MB)
C
NF Magnetic Peak
P.
P.49
16
DP
B
PEG 3.0 x16
Intel
Ha
swell Processor 35W QC
BGA 1364
PCI-E x1
tel
In
Lynx Point LP
BG
SPI
A 695 Balls
C
Memory Bus (DDR3L)
Dual Channel
1.35V DDR3L 1600 MHz
MI
HD
eDP
P.5~13
DMI x4
100MHz 5GB/s
SATA3.0
USB 3.0
USB2.0
HDMI Redr
iver
FHD (eDP 1.3)
Port 0
Port 1
2
Port
Port 1,2
Port 12
D
DDRIII-DIMM X2
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
page 14,15
16GB Max
P.36
P.35
SATA3 Re-driver PS
8520
Mini Card-2 (mSATA)
( Full )
P.43
SATA ODD Conn.
USB 3.0 Re-driver
Di
P.45
gital Camera
P.42
P.43
Port 0,1
P.35
HDMI
HD
P.36
D
P.43
USB Powershare TPS2543 X2
CP Conn.
44
P.
U XDP
P.6
USB 3.0 Conn. X2
( USB Charger )
E
P.45
SMBus
Port 9
Touch Panel Conn.
P.
40
3 3
RTC Counter IDT 1337
RTC CKT.
Power On/Off CKT.
DC/DC Interface CKT.
4 4
P.46
P.16
P.39
P.33~34
A
FFS
P.43
Discrete TPM AT97SC3204
P.40
PWM
Fan Control
B
P.
HD Audio
P16~23
LPC Bus
33MHz
ALC5505 DSP
P.46
Digi Mic
ENE KBC KB9012 + KC3810
Int.KBD
39
Touch Pad
P.39
PS/2
P.39
P.38
SMBus
ALS Sensor
P.35
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
C
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Audio Codec
C3661
AL
AMP TI 3113
Int. Speaker x2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
P.48
P.48
P.47
adphone / Mic. Jack
He
( Combo )
Compal Electronics,Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
P.47
2 62Tuesday, September 03, 2013
2 62Tuesday, September 03, 2013
E
2 62Tuesday, September 03, 2013
0.1C
0.1C
0.1C
of
of
of
Page 3
A
B
C
D
E
Compal Confidential
Project Code : VAUB0 Fil
e Name : LA-9941P
1 1
JTS
LA-9941P M/B
JeDP
2 2
JHDD
6 pin
40 pin
24 pin
8 pin
Wire
Wire
Wire
FFC
Touch screen
CD Panel
L
HDD
JTB1
90 pin
Touch Pad
3 3
FFC
JIO1
I/O B
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
C
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
E
0.1
0.1
3 62Tuesday, September 03, 2013
3 62Tuesday, September 03, 2013
3 62Tuesday, September 03, 2013
0.1
Page 4
A
USB PORT#
0
1
2
3
PCH
4
5
6
7
8
9
10
PCI EXPRESS
DESTINATION
SATA
DESTINATION
CLKOUT
DESTINATION
11
Lane 1
None
SATA0
HDD
PCI0
PCH_LOOPBACK
12
Lane 2
None
SATA1
SSD
PCI1
EC LPC
13
1 1
Lane 3
Lane 4
Lane 5
Lane 6
Lane 7
Lane 8 None
MINI CARD-1 WLAN
CARD READER
None
None
None
SATA2
SATA3
SATA4
SATA5
None
None None
None
PCI2
PCI3
PCI4
None
None
None
USB3
1
2
3
4
DESTINATION
USB Conn 1 (Power share)
USB Conn 3 (Power share)
USB Conn 2 (Power share)
USB Conn 4 (Power share)
USB Conn 1 (Power share)
USB Conn 3 (Power share)
USB Conn 2 (Power share)
USB Conn 4 (Power share)
JMINI1 (WLAN)
None
None
None
None
Touch screen
None
None
CAMERA
None
DESTINATION
CLK
DESTINATIONDIFFERENTIAL
CLKOUT_PCIE0
CLKOUT_PCIE1
CLKOUT_PCIE2
CLKOUT_PCIE3
CLKOUT_PCIE4
CLKOUT_PCIE5
CLKOUT_PCIE6
None
None
MINI CARD-1 WLAN
CARD READER
None
None
CLKOUT_PCIE7 None
CLKOUT_PEG_B
None
FLEX CLOCKS DESTINATION
CLKOUTFLEX0None
CLKOUTFLEX1
CLKOUTFLEX2
CLKOUTFLEX3
CLK_PCI_TPM
None
None
None
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
Symbol Note :
: means Digital Ground
: means Analog Ground
Compal Secret Data
Compal Secret Data
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
A
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Notes List
Notes List
Notes List
LA-9941P
0.1
0.1
4 62Tuesday, September 03, 2013
4 62Tuesday, September 03, 2013
4 62Tuesday, September 03, 2013
0.1
Page 5
5
4
3
2
1
+3VS
SMBUS Address [0x9a]
D D
R10
U11
SMBCLK
SMBDATA
PCH
2.2K
.2K
2
SML0CLK
SML0DATA
+3V_PCH
U8
R7
K6N
11
C C
SML1CLK
SML1DATA
DMN66D0 DMN66D0
2.2K
2.2K
2.2K
.2K
2
+3V_PCH
+3V_PCH
+3VS
66D0
DMN
DMN66D0
DMN66D0
DMN66D0
DMN66D0
DMN66D0
2.2K
2.2K
+3VS_NGFF
2.2K
2.2K
+3VS
2.2K
2.2K
202
DIMMA
200
202
DIMMB
200
4
5
TP
60
58
8
9
NFC
SMBUS Address [TBD]NGFF
SMBUS Address [TBD]
4
6
FFS
51
53
XDP
9
10
Touch Sc
10
ALS
9
reen
SMBUS Address [A0]
MBUS Address [A0]
S
SM
BUS Address [TBD]
SMBUS Address [TBD]
SMBUS Address [TBD]
SMBUS Address [TBD]
SMBUS Address [TBD]
2.2K
2.2K
B8
EC_SMB_CK1
A6
EC_SMB_DA1
+3VS
8
7
ADS1115
SMBUS Address [TBD]
KBC
B B
8
7
ADS1115
SMBUS Address [TBD]
2.2K
A8
EC_SMB_CK1
A7
EC_SMB_DA1
A A
5
2.2K
4
+3VALW_EC
100 ohm
100 ohm
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2011/08/25 2012/07/15
2011/08/25 2012/07/15
2011/08/25 2012/07/15
4
BATT
5
9
CHARGER
8
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
SMBUS Address [16]
SMBUS Address [12]
2
Compal Electronics, Inc.
Title
Title
Title
SMBus Block Diagram
SMBus Block Diagram
SMBus Block Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
5 62Tuesday, September 03, 2013
5 62Tuesday, September 03, 2013
5 62Tuesday, September 03, 2013
1
0.1
0.1
0.1
Page 6
5
4
3
2
1
XDP CONN
+VCCIO_OUT +VCCIO_OUT
D D
C C
The resistor
r HOOK2 should b e
fo placed such that the stub is very sma ll on CFG0 net
XDP_PREQ#[8] XDP_PRDY#[8]
CFG0[10] CFG1[10]
CFG2[10] CFG3[10]
XDP_BPM#0[8] XDP_BPM#1[8]
CFG4[10] CFG5[10]
CFG6[10] CFG7[10]
H_CPUPWRGD[20,8]
PBTN_OUT#[18,38]
CPU_PWR_DEBU G[12]
IMVP_VR_PG[18,38,58]
PCH_SMBDATA[14,15,17,39,43]
PCH_SMBCLK[14,15,17,39,43]
XDP_TCK[8]
XDP_TCK
+3VS
RU36 1K_0402_5%
1 2
RU7 1K_0402_5%~D
1 2
PT
IMVP_VR_PG
XDP_PREQ# XDP_PRDY#
CFG0 CFG1
CFG2 CFG3
XDP_BPM#0 XDP_BPM#1
CFG4 CFG5
CFG6 CFG7
H_CPUPWRGD_XD P
PT
JXDP
2
112
4
334
6
556
8
778
10
9910
12
111112
14
131314
16
151516
18
171718
20
191920
22
212122
24
232324
26
252526
28
272728
30
292930
32
313132
34
333334
36
353536
38
373738
40
393940
42
414142
44
434344
46
454546
48
474748
50
494950
52
515152
54
535354
56
555556
58
575758
60
595960
SAMTE_BSH-030-01-L-D-A-TR
CONN@
CFG17 CFG16
CFG8 CFG9
CFG10 CFG11
CFG19 CFG18
CFG12 CFG13
CFG14 CFG15
CLK_CPU_ITP CLK_CPU_ITP#
XDP_RST#_R XDP_DBRESET#
XDP_TDO XDP_TRST# XDP_TDI XDP_TMS
CFG17 [10] CFG16 [10]
CFG8 [10] CFG9 [10]
CFG10 [10] CFG11 [10]
CFG19 [10] CFG18 [10]
CFG12 [10] CFG13 [10]
CFG14 [10] CFG15 [10]
CLK_CPU_ITP [17] CLK_CPU_ITP# [17]
1 2
RU12 1K_0402_5%~D
XDP_DBRESET# [18,8]
XDP_TDO [8] XDP_TRST# [8] XDP_TDI [8] XDP_TMS [8]
PLT_RST# [18,38,40,42,8]
PT
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
1
0.1
0.1
0.1
of
6 62Tuesday, September 03, 2013
6 62Tuesday, September 03, 2013
6 62Tuesday, September 03, 2013
Page 7
5
4
3
2
1
D D
U6A
DMI_CRX_PTX_N0[18] DMI_CRX_PTX_N1[18] DMI_CRX_PTX_N2[18] DMI_CRX_PTX_N3[18]
DMI_CRX_PTX_P0[18] DMI_CRX_PTX_P1[18] DMI_CRX_PTX_P2[18] DMI_CRX_PTX_P3[18]
DMI_CTX_PRX_N0[18] DMI_CTX_PRX_N1[18] DMI_CTX_PRX_N2[18] DMI_CTX_PRX_N3[18]
DMI_CTX_PRX_P0[18] DMI_CTX_PRX_P1[18] DMI_CTX_PRX_P2[18] DMI_CTX_PRX_P3[18]
FDI_CSYNC[18]
C C
B B
FDI_INT[18]
AB2 AB3 AC3 AC1
AB1 AB4 AC4 AC2
AF2 AF4 AG4 AG2
AF1 AF3 AG3 AG1
F11 F12
@
DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3
DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3
DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3
DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3
FDI_CSYNC DISP_INT
HA
SWELL_BGA1364
HASWELL_BGA
DMI
FDI
PEG_RCOMP
PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8
PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13
PEG
PEG_RXN14 PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15
1 OF 12
PEG_COMP C
AD Note: Trace width=12 mils ,Spacing=15mil Max length= 400 mils.
AH6
PEG_COMP
E10
PEG_GTX_C_HRX_N15
C10
PEG_GTX_C_HRX_N14
B10
PEG_GTX_C_HRX_N13
E9
PEG_GTX_C_HRX_N12
D9
PEG_GTX_C_HRX_N11
B9
PEG_GTX_C_HRX_N10
L5
PEG_GTX_C_HRX_N9
L2
PEG_GTX_C_HRX_N8
M4
PEG_GTX_C_HRX_N7
L4
PEG_GTX_C_HRX_N6
M2
PEG_GTX_C_HRX_N5
V5
PEG_GTX_C_HRX_N4
V4
PEG_GTX_C_HRX_N3
V1
PEG_GTX_C_HRX_N2
Y3
PEG_GTX_C_HRX_N1
Y2
PEG_GTX_C_HRX_N0
F10
PEG_GTX_C_HRX_P15
D10
PEG_GTX_C_HRX_P14
A10
PEG_GTX_C_HRX_P13
F9
PEG_GTX_C_HRX_P12
C9
PEG_GTX_C_HRX_P11
A9
PEG_GTX_C_HRX_P10
M5
PEG_GTX_C_HRX_P9
L1
PEG_GTX_C_HRX_P8
M3
PEG_GTX_C_HRX_P7
L3
PEG_GTX_C_HRX_P6
M1
PEG_GTX_C_HRX_P5
Y5
PEG_GTX_C_HRX_P4
V3
PEG_GTX_C_HRX_P3
V2
PEG_GTX_C_HRX_P2
Y4
PEG_GTX_C_HRX_P1
Y1
PEG_GTX_C_HRX_P0
B6
PEG_HTX_GRX_N15 PEG_HTX_C_GRX_N15
C5
PEG_HTX_GRX_N14 PEG_HTX_C_GRX_N14
E6
PEG_HTX_GRX_N13 PEG_HTX_C_GRX_N13
D4
PEG_HTX_GRX_N12 PEG_HTX_C_GRX_N12
G4
PEG_HTX_GRX_N11 PEG_HTX_C_GRX_N11
E3
PEG_HTX_GRX_N10 PEG_HTX_C_GRX_N10
J5
PEG_HTX_GRX_N9 PEG_HTX_C_GRX_N9
G3
PEG_HTX_GRX_N8 PEG_HTX_C_GRX_N8
J3
PEG_HTX_GRX_N7 PEG_HTX_C_GRX_N7
J2
PEG_HTX_GRX_N6 PEG_HTX_C_GRX_N6
T6
PEG_HTX_GRX_N5 PEG_HTX_C_GRX_N5
R6
PEG_HTX_GRX_N4 PEG_HTX_C_GRX_N4
R2
PEG_HTX_GRX_N3 PEG_HTX_C_GRX_N3
R4
PEG_HTX_GRX_N2 PEG_HTX_C_GRX_N2
T4
PEG_HTX_GRX_N1 PEG_HTX_C_GRX_N1
T1
PEG_HTX_GRX_N0 PEG_HTX_C_GRX_N0
C6
PEG_HTX_GRX_P15 PEG_HTX_C_GRX_P15
B5
PEG_HTX_GRX_P14 PEG_HTX_C_GRX_P14
D6
PEG_HTX_GRX_P13 PEG_HTX_C_GRX_P13
E4
PEG_HTX_GRX_P12 PEG_HTX_C_GRX_P12
G5
PEG_HTX_GRX_P11 PEG_HTX_C_GRX_P11
E2
PEG_HTX_GRX_P10 PEG_HTX_C_GRX_P10
J6
PEG_HTX_GRX_P9 PEG_HTX_C_GRX_P9
G2
PEG_HTX_GRX_P8 PEG_HTX_C_GRX_P8
J4
PEG_HTX_GRX_P7 PEG_HTX_C_GRX_P7
J1
PEG_HTX_GRX_P6 PEG_HTX_C_GRX_P6
T5
PEG_HTX_GRX_P5 PEG_HTX_C_GRX_P5
R5
PEG_HTX_GRX_P4 PEG_HTX_C_GRX_P4
R1
PEG_HTX_GRX_P3 PEG_HTX_C_GRX_P3
R3
PEG_HTX_GRX_P2 PEG_HTX_C_GRX_P2
T3
PEG_HTX_GRX_P1 PEG_HTX_C_GRX_P1
T2
PEG_HTX_GRX_P0 PEG_HTX_C_GRX_P0
1 2
RU1 24.9_0402_1%
1 2
CU1 0.22U_0402_16V7K~D
1 2
CU2 0.22U_0402_16V7K~D
1 2
CU3 0.22U_0402_16V7K~D
1 2
CU4 0.22U_0402_16V7K~D
1 2
CU5 0.22U_0402_16V7K~D
1 2
CU6 0.22U_0402_16V7K~D
1 2
CU7 0.22U_0402_16V7K~D
1 2
CU8 0.22U_0402_16V7K~D
1 2
CU9 0.22U_0402_16V7K~D
1 2
CU10 0.22U_0402_16V7K~D
1 2
CU11 0.22U_0402_16V7K~D
1 2
CU12 0.22U_0402_16V7K~D
1 2
CU13 0.22U_0402_16V7K~D
1 2
CU14 0.22U_0402_16V7K~D
1 2
CU15 0.22U_0402_16V7K~D
1 2
CU16 0.22U_0402_16V7K~D
1 2
CU17 0.22U_0402_16V7K~D
1 2
CU18 0.22U_0402_16V7K~D
1 2
CU19 0.22U_0402_16V7K~D
1 2
CU20 0.22U_0402_16V7K~D
1 2
CU21 0.22U_0402_16V7K~D
1 2
CU22 0.22U_0402_16V7K~D
1 2
CU23 0.22U_0402_16V7K~D
1 2
CU24 0.22U_0402_16V7K~D
1 2
CU25 0.22U_0402_16V7K~D
1 2
CU26 0.22U_0402_16V7K~D
1 2
CU27 0.22U_0402_16V7K~D
1 2
CU28 0.22U_0402_16V7K~D
1 2
CU29 0.22U_0402_16V7K~D
1 2
CU30 0.22U_0402_16V7K~D
1 2
CU31 0.22U_0402_16V7K~D
1 2
CU32 0.22U_0402_16V7K~D
+VCCIOA_OUT
PEG_GTX_C_HRX_N[0..15]
PEG_GTX_C_HRX_P[0..15]
PEG_HTX_C_GRX_N[0..15]
PEG_HTX_C_GRX_P[0..15]
PEG_GTX_C_HRX_N[0..15] [24]
PEG_GTX_C_HRX_P[0..15] [24]
PEG_HTX_C_GRX_N[0..15] [24]
PEG_HTX_C_GRX_P[0..15] [24]
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet
Compal Electronics, Inc.
PROCESSOR(1/7) DMI,FDI,PEG
PROCESSOR(1/7) DMI,FDI,PEG
PROCESSOR(1/7) DMI,FDI,PEG
of
7 62Tuesday, September 03, 2013
7 62Tuesday, September 03, 2013
1
7 62Tuesday, September 03, 2013
0.1
0.1
0.1
Page 8
5
4
3
2
1
DDR3L Compensation Signals
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
CAD Note: Tr
ace width=12~1 5 mil, Spcing=2 0 mils
Max trace leng th= 500 mil
1 2
RU58 100_0402_1%~D
1 2
RU59 75_0402_1%~D
1 2
RU61 100_0402_1%~D
PU/PD for JTAG signals
XDP_TDO
XDP_TCK
XDP_TRST#
XDP_DBRESET#
+VCCIOA_OUT
EDP_COMP CAD Note:Trace width=20 mils ,Spacing=25mil , Max length=100 mils.
VCIN0_PH[38]
100K_0402_1%_TSM0B104F4251RZ
1 2
RU66 51_0402_5%
1 2
RU67 51_0402_5%
1 2
RU68 51_0402_5%
1 2
RU35 1K_0402_5%~D
HU101
+VCCP
+3VS
+3VALW
ST
RU118 10K_0402_1%~D
1 2
12
close CPU chip
WELL_BGA1364
HASWELL_BGA
MISC
THERMAL CLOCK
PWR
2 OF 12
SM_RCOMP0 SM_RCOMP1
DDR3L
SM_RCOMP2
SM_DRAMRST
JTAG
PRDY PREQ
TRST
BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7
TCK TMS
TDO DBR
C25 D25 A25 B25 C24 D24 A24 B24
C21 D21 A21 B21 C20 D20 A20 B20
C16 D16 A16 B16
C17 D17 A17 B17
TDI
@
BB51
SM_RCOMP0
BB53
SM_RCOMP1
BB52
SM_RCOMP2
BE51
H_DRAMRST#
N53
XDP_PRDY#
N52
XDP_PREQ#
N54
XDP_TCK
M51
XDP_TMS
M53
XDP_TRST#
N49 M49 F53
XDP_DBRESET#
R51 R50 P49 N50 R49 P53 U51 P51
For ESD concern, please put near CPU
WELL_BGA1364
HASWELL_BGA
EDP_RCOMP
EDP_DISP_UTIL
10 OF 12
U6J
DDIB_TXN0 DDIB_TXP0 DDIB_TXN1 DDIB_TXP1 DDIB_TXN2 DDIB_TXP2 DDIB_TXN3 DDIB_TXP3
DDIC_TXN0 DDIC_TXP0 DDIC_TXN1 DDIC_TXP1 DDIC_TXN2 DDIC_TXP2 DDIC_TXN3 DDIC_TXP3
DDID_TXN2 DDID_TXP2 DDID_TXN3 DDID_TXP3
DDID_TXN0 DDID_TXP0 DDID_TXN1 DDID_TXP1
HAS
EDP_AUXN
EDP_AUXP
EDP_HPD
EDP_TXN0 EDP_TXN1 EDP_TXP0 EDP_TXP1
FDI_TXN0 FDI_TXP0 FDI_TXN1 FDI_TXP1
XDP_PRDY# [6] XDP_PREQ# [6] XDP_TCK [6] XDP_TMS [6] XDP_TRST# [6]
XDP_TDI [6] XDP_TDO [6]
XDP_DBRESET# [18,6]
XDP_BPM#0 [6] XDP_BPM#1 [6]
F15 F14 E14
C14 A12 D14 B12
AG6
EDP_COMP
E12
C12 D12 A14 B14
EDP_AUXN [35] EDP_AUXP [35] EDP_HPD [35]
EDP_TXN0 [35] EDP_TXN1 [35] EDP_TXP0 [35] EDP_TXP1 [35]
1 2
RU2 24.9_0402_1%
EDP_TXN2 [35] EDP_TXP2 [35] EDP_TXN3 [35] EDP_TXP3 [35]
Processor Pullups
+VCCIO_OUT
H_THERMTRIP#[20]
H_CPUPWRGD[20,6]
+VCCP+3VS
1 2
1 2
H_PECI[38]
H_PM_SYNC[18]
CPU_PLTRST#[20]
RU13 1K_0402_5%~D
1 2
RU48 43_0402_1%@
RU11 20K_0402_5%~D
DPLL_REF_CLK#[17]
DPLL_REF_CLK[17] CLK_CPU_SSC_DPLL#[17] CLK_CPU_SSC_DPLL[17]
CLK_CPU_DMI#[17] CLK_CPU_DMI[17]
1 2
RU30 62_0402_5%
D D
C C
B B
place RU33,RU30 near CPU
1 2
RU33 10K_0402_5%~D
+VCCIO_OUT
1 2
RU40 10K_0402_5%~D@
1 2
RU44 10K_0402_5%~D@
SSC CLOCK TERMINATION, IF NOT USED, stuff RU40,RU44
Buffered reset to CPU
CAD Note: PLACE PULL-UP RESISTOR WITHIN 2 INCH OF THE CPU
PLT_RST#[18,38,40,42,6]
PLT_RST#
H_PROCHOT#
H_CPUPWRGD
CLK_CPU_SSC_DPLL
CLK_CPU_SSC_DPLL#
+3VS
5
UU2
1
P
NC
Y
2
A
G
SN74LVC1G07DCKR_SC70-5
3
H_PROCHOT#[38,53,58]
12
RU42
@
75_0402_5%
4
PT
1 2
RU32 56_0402_5%
BUF_CPU_RST#BUFO_CPU_RST#
PM_SYS_PWRGD_BUF_R
CLK_CPU_SSC_DPLL# CLK_CPU_SSC_DPLL
RU37 0_0402_5%@
1 2
ST
H_PROCHOT#_RH_PROCHOT#
BUF_CPU_RST#
C51
G50 G51
E50 D53
D52
F50
AP48
L54
AC6 AE6
V6
Y6 AB6 AA6
@
HDMI_A2N_VGA[36] HDMI_A2P_VGA[36] HDMI_A1N_VGA[36] HDMI_A1P_VGA[36] HDMI_A0N_VGA[36] HDMI_A0P_VGA[36] HDMI_A3N_VGA[36] HDMI_A3P_VGA[36]
mDP_A0N_CPU[37] mDP_A0P_CPU[37] mDP_A1N_CPU[37] mDP_A1P_CPU[37] mDP_A2N_CPU[37] mDP_A2P_CPU[37] mDP_A3N_CPU[37] mDP_A3P_CPU[37]
U6B
PROC_DETECT
CATERR PECI
PROCHOT THERMTRIP
PM_SYNC PWRGOOD SM_DRAMPWROK PLTRSTIN
DPLL_REF_CLKN DPLL_REF_CLKP SSC_DPLL_REF_CLKN SSC_DPLL_REF_CLKP BCLKN BCLKP
HAS
SM_DRAMPWROK
NOTE: S3 POWER REDUCTION IS NOT POR THIS CIRCUIT IS FOR INTERNAL TESTING PURPOSES ONLY.
+1.35V_PWROK[55]
DRAMRST_CNTRL_S3
PT
+V1.05S_VCCP_PWRGOOD[38,56]
A A
PM_DRAM_PWRGD[18]
PM_SYS_PWRGD_BUF PM_SYS_PWRGD_BUF_R
QU7
BSS138-G_SOT23-3
RU50 0_0402_5%~D@
RU51 0_0402_5%~D@
ST
1 2
1 2
RU54 0_0402_5%~D@
RU53 0_0402_5%@
1 2
1 2
5
1 2
1 3
D
S
RU56 0_0402_5%~D@
G
2
CPU1.5V_S3_GATE_R
+3VALW
1 2
RU76 200_0402_5%
+3VALW
12
R29
100K_0402_5%~D
1
2
+3VALW
UU3
5
74AHC1G09GW_TSSOP5
P
B
4
O
A
G
3
4
+1.35V_CPU_VDDQ
PM_SYS_PWRGD_BUF
12
RU60
1.82K_0402_1%
R59
3.32K_0402_1%~D
12
RU43 0_0402_5%@
1 2
PM_SYS_PWRGD_BUF_R
T
S
S3 circuit:DRAM_RST# to memory should be high during S3
D
S
13
12
RU74
4.99K_0402_1%~D
DRAMRST_CNTRL_S3
DRAMRST_CNTRL_S3[14,38]
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1 2
RU62 100K_0402_5%~D
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
For deep S3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
DDR3_DRAMRST#_RH_DRAMRST#
G
QU3
2
BSS138-G_SOT23-3
1
CU39
0.047U_0402_16V7K
2
Compal Electronics, Inc.
+1.35V
12
RU72
1K_0402_5%~D
1 2
RU73 1K_0402_5%~D
Title
Title
Title
PROCESSOR(2/7) PM,XDP,CLK
PROCESSOR(2/7) PM,XDP,CLK
PROCESSOR(2/7) PM,XDP,CLK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
DDR3_DRAMRST# [14,15]
1
8 62Tuesday, September 03, 2013
8 62Tuesday, September 03, 2013
8 62Tuesday, September 03, 2013
0.1
0.1
0.1
Page 9
5
4
3
2
1
DDR_A_D[0..63][14]
D D
C C
+V_SM_VREF
B B
+V_DDR_REFA_R[14] +V_DDR_REFB_R[14]
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
AH54
SA_DQ0
AH52
SA_DQ1
AK51
SA_DQ2
AK54
SA_DQ3
AH53
SA_DQ4
AH51
SA_DQ5
AK52
SA_DQ6
AK53
SA_DQ7
AN54
SA_DQ8
AN52
SA_DQ9
AR51
SA_DQ10
AR53
SA_DQ11
AN53
SA_DQ12
AN51
SA_DQ13
AR52
SA_DQ14
AR54
SA_DQ15
AV52
SA_DQ16
AV53
SA_DQ17
AY52
SA_DQ18
AY51
SA_DQ19
AV51
SA_DQ20
AV54
SA_DQ21
AY54
SA_DQ22
AY53
SA_DQ23
AY47
SA_DQ24
AY49
SA_DQ25
BA47
SA_DQ26
BA45
SA_DQ27
AY45
SA_DQ28
AY43
SA_DQ29
BA49
SA_DQ30
BA43
SA_DQ31
BF14
SA_DQ32
BC14
SA_DQ33
BC11
SA_DQ34
BF11
SA_DQ35
BE14
SA_DQ36
BD14
SA_DQ37
BD11
SA_DQ38
BE11
SA_DQ39
BC9
SA_DQ40
BE9
SA_DQ41
BE6
SA_DQ42
BC6
SA_DQ43
BD9
SA_DQ44
BF9
SA_DQ45
BE5
SA_DQ46
BD6
SA_DQ47
BB4
SA_DQ48
BC2
SA_DQ49
AW3
SA_DQ50
AW2
SA_DQ51
BB3
SA_DQ52
BB2
SA_DQ53
AW4
SA_DQ54
AW1
SA_DQ55
AU3
SA_DQ56
AU1
SA_DQ57
AR1
SA_DQ58
AR4
SA_DQ59
AU2
SA_DQ60
AU4
SA_DQ61
AR2
SA_DQ62
AR3
SA_DQ63
AM6
SM_VREF
AR6
SA_DIMM_VREFDQ
AN6
SB_DIMM_VREFDQ
BC53
RSVD
@
3 OF 12
HASWELL_BGA
HA
U6C
RSVD
SA_CKN0
SA_CK0 SA_CKE0 SA_CKN1
SA_CK1 SA_CKE1 SA_CKN2
SA_CK2 SA_CKE2 SA_CKN3
SA_CK3 SA_CKE3
SA_CS#0 SA_CS#1 SA_CS#2
SA_CS#3 SA_ODT0 SA_ODT1 SA_ODT2 SA_ODT3
SA_BS0 SA_BS1 SA_BS2
SA_RAS
SA_WE
SA_CAS
SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8
SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15
SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7
RSVD SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
SWELL_BGA1364
VSS
BD31 BE25 BF25 BE34 BD25 BC25 BF34 BE23 BF23 BC34 BD23 BC23 BD34
BE16 BC17 BE17 BD16 BC16 BF16 BF17 BD17 BC20 BD21 BD32
BC21 BF20 BF21 BE21
BD28 BD27 BF28 BE28 BF32 BC27 BF27 BC28 BE27 BC32 BD20 BF31 BC31 BE20 BE32 BE31
AJ52 AP53 AW52 AY46 BD12 BE7 BA3 AT2 AW39 AJ53 AP52 AW53 BA46 BE12 BD7 BA2 AT3 AW40
BA40 AY40 BA39 AY39 AV40 AU40 AV39 AU39
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15
DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
M_CLK_DDR#0 [14] M_CLK_DDR0 [14] DDR_CKE0_DIMMA [14] M_CLK_DDR#1 [14] M_CLK_DDR1 [14] DDR_CKE1_DIMMA [14]
DDR_CS0_DIMMA# [14] DDR_CS1_DIMMA# [14]
M_ODT0 [14] M_ODT1 [14]
DDR_A_BS0 [14] DDR_A_BS1 [14] DDR_A_BS2 [14]
DDR_A_RAS# [14] DDR_A_WE# [14] DDR_A_CAS# [14]
DDR_A_MA[0..15] [14]
DDR_A_DQS#[0..7] [14]
DDR_A_DQS[0..7] [14]
DDR_B_D[0..63][15]
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
AC54 AC52 AE51 AE54 AC53 AC51 AE52 AE53 AU47 AU49 AV43 AV45 AU43 AU45 AV47 AV49 BC49 BE49 BD47 BC47 BD49 BD50 BE47 BF47 BE44 BD44 BC42 BF42 BF44 BC44 BD42 BE42 BA16 AU16 BA15 AV15 AY16 AV16 AY15 AU15 AU12 AY12 BA10 AU10 AV12 BA12 AY10 AV10
AU8
AU6
AM2 AM3
AM1 AM4
SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48
BA8
SB_DQ49
AV6
SB_DQ50
BA6
SB_DQ51
AV8
SB_DQ52
AY8
SB_DQ53 SB_DQ54
AY6
SB_DQ55 SB_DQ56 SB_DQ57
AK1
SB_DQ58
AK4
SB_DQ59 SB_DQ60 SB_DQ61
AK2
SB_DQ62
AK3
SB_DQ63
@
4 OF 12
HASWELL_BGA
HA
SWELL_BGA1364
U6D
RSVD
SB_CKN0
SB_CK0 SB_CKE0 SB_CKN1
SB_CK1 SB_CKE1 SB_CKN2
SB_CK2 SB_CKE2 SB_CKN3
SB_CK3 SB_CKE3
SB_CS#0 SB_CS#1 SB_CS#2 SB_CS#3
SB_ODT0 SB_ODT1 SB_ODT2 SB_ODT3
SB_BS0 SB_BS1 SB_BS2
VSS
SB_RAS
SB_WE
SB_CAS
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15
SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7
RSVD SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
AY36 AW27 AV27 AU36 AW26 AV26 AU35 BA26 AY26 AV35 BA27 AY27 AV36
BA20 AY19 AU19 AW20
AY20 BA19 AV19 AW19 AY23 BA23 BA36 AU30 AV23 AW23 AV20
BA30 AW30 AY30 AV30 AW32 AY32 AT30 AV32 BA32 AU32 AU23 AY35 AW35 AU20 AW36 BA35
AD52 AU46 BD48 BD43 AW16 AW10 AW8 AL2 BE38 AD53 AV46 BE48 BE43 AW15 AW12 AW6 AL3 BD38
BF39 BE39 BF37 BE37 BD39 BC39 BC37 BD37
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15
DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
M_CLK_DDR#2 [15] M_CLK_DDR2 [15] DDR_CKE2_DIMMB [15] M_CLK_DDR#3 [15] M_CLK_DDR3 [15] DDR_CKE3_DIMMB [15]
DDR_CS2_DIMMB# [15] DDR_CS3_DIMMB# [15]
M_ODT2 [15] M_ODT3 [15]
DDR_B_BS0 [15] DDR_B_BS1 [15] DDR_B_BS2 [15]
DDR_B_RAS# [15] DDR_B_WE# [15] DDR_B_CAS# [15]
DDR_B_MA[0..15] [15]
DDR_B_DQS#[0..7] [15]
DDR_B_DQS[0..7] [15]
+1.35V_CPU_VDDQ
12
RU83
+V_SM_VREF
2
0mil
A A
Close CPU side
5
1K_0402_1%~D
12
RU84
1K_0402_1%~D
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR(3/7) DDRIII
PROCESSOR(3/7) DDRIII
PROCESSOR(3/7) DDRIII
1
0.1
0.1
9 6 2Tuesday, September 03, 2013
9 6 2Tuesday, September 03, 2013
9 6 2Tuesday, September 03, 2013
0.1
Page 10
5
D D
12
RH30
49.9_0402_1%
C C
B B
12
RH31
49.9_0402_1%
CFG0[6] CFG1[6] CFG2[6] CFG3[6] CFG4[6] CFG5[6] CFG6[6] CFG7[6] CFG8[6]
CFG9[6] CFG10[6] CFG11[6]
CFG12[6] CFG13[6] CFG14[6] CFG15[6]
CPU_TESTLOW1
+VCC_CORE
CPU_TESTLOW0
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15
B3_A3
A52_B52 A53_B53
C3_B2 B3_A3
A52_B52 A53_B53 B54_C54
BE1_BD1
BE54_BD54
BE1_BD1 BE2_BF2
BE3_BF3 BE52_BF52 BE53_BF53 BE54_BD54
BE2_BF2
BE3_BF3
4
HASWELL_BGA
BC54
BD54
BE52 BE53 BE54
AG49
A51 A52 A53
B52 B53 B54
BC1
BD1
BE1 BE2 BE3
BF2 BF3 BF4
AD49 AC49 AE49
AB49
W51
W53
A3 A4
B2 B3
BE4 BD3
G21 G24
G19
U53
R53 R52
F6
G6
F21
F51 F52 F22
L52 L53
L51
F24 F25 F20
Y50
V51
Y49 Y54 Y53
V54
L50 L49
E5
U6K
RSVD_TP RSVD_TP
RSVD_TP RSVD_TP
RSVD_TP RSVD_TP TESTLOW_F21 VSS VSS VSS VCC
RSVD_TP RSVD_TP
RSVD_TP
RSVD_TP RSVD_TP TESTLOW_F20
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15
RSVD RSVD RSVD
HAS
WELL_BGA1364
@
U6L
RSVD RSVD
RSVD RSVD RSVD
RSVD RSVD
RSVD RSVD RSVD
RSVD RSVD RSVD
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
CFG_RCOMP
HASWELL_BGA
RSVD_TP RSVD_TP RSVD_TP RSVD_TP
CFG16 CFG18 CFG17 CFG19
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
RSVD
RSVD_TP RSVD_TP
RSVD RSVD RSVD
11 OF 12
VSS VSS
VSS VSS
RSVD RSVD RSVD
RSVD RSVD RSVD
RSVD RSVD
RSVD
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
F1 E1 A5 A6
R54 Y52 V53 Y51 V52
B50 AH49 AM48 AU27 AU26 BD4 BC4 AL6 F8
F16
G12 G10
H54 H53
H51 H52
N51 G53 H50
CFG_RCOMP CFG16 CFG18 CFG17 CFG19
BF51 BF52 BF53
C1 C2 C3
C54 D1
D54
AN35 AN37 AF9 AE9 G14 G17 AD45 AG45
3
BE52_BF52 BE53_BF53
C1_C2 C1_C2 C3_B2
B54_C54
CFG16 [6] CFG18 [6] CFG17 [6] CFG19 [6]
2
CFG Straps for Processor
CFG2
12
RH27
49.9_0402_1%
PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS
CFG2
*
Display Port Presence Strap
CFG4
*
PCIE Port Bifurcation Straps
11: (Default) x16 - Device 1 functions 1 and 2 disabled
*
CFG[6:5]
10: x8, x8 - Device 1 function 1 enabled ; function 2
01: Reserved - (Device 1 function 1 disabled ; function
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
12
RU77
1K_0402_1%~D
1: Normal Operation; Lane # definition matches socket pin map definition
0:
Lane Reversed
CFG4
12
RU115
1K_0402_1%~D
1 : Disabled; No Physical Display Port attached to Embedded Display Port
0 : Enabled; An external Display Port device is co
nnected to the Embedded Display Port
CFG6
CFG5
12
RU85
@
1K_0402_1%~D
disabled
2 enabled)
CFG7
12
RU87
@
1K_0402_1%~D
12
RU86
@
1K_0402_1%~D
1
PEG DEFER TRAINING
HAS
WELL_BGA1364
A A
5
@
4
12 OF 12
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
CFG7
Deciphered Date
Deciphered Date
Deciphered Date
(Default) PEG Train immediately following xxRESETB
1: de assertion
0: PEG Wait for BIOS for training
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR(4/7) RSVD,CFG
PROCESSOR(4/7) RSVD,CFG
PROCESSOR(4/7) RSVD,CFG
0.1
0.1
10 62Tuesday, September 03, 2013
10 62Tuesday, September 03, 2013
1
10 62Tuesday, September 03, 2013
0.1
Page 11
5
4
3
2
1
55A
AB45
VCC
AB46
VCC
AB8
VCC
AC46
VCC
AC47
VCC
AC8
VCC
AC9
VCC
AD46
VCC
AD8
VCC
D D
C C
B B
A A
AE46 AE47
AG46
AH46 AH47
AJ45 AJ46 AK46 AK47
AL45 AL46
AM46 AM47
AN10 AN12 AN13 AN14 AN15 AN16 AN17 AN19 AN20 AN21 AN23 AN24 AN25 AN26 AN27 AN29 AN30 AN32 AN34 AN36 AN38 AN39 AN40 AN41 AN42 AN43 AN44 AN45 AN46
AP10 AP12 AP13 AP14 AP15 AP16 AP17 AP18 AP19 AP20 AP21 AP22 AP23 AP24 AP25 AP26 AP27 AP29 AP30 AP31 AP32 AP33 AP34 AP35 AP36 AP37 AP38 AP39 AP40 AP41 AP42 AP43 AP44 AP46 AP47
AR35 AR37 AR39 AR41 AR43 AR45 AR46
VCC VCC
AE8
VCC
AF8
VCC VCC
AG8
VCC VCC VCC
AH8
VCC VCC VCC VCC VCC
AK8
VCC VCC VCC
AL8
VCC
AL9
VCC VCC VCC
AM8
VCC
AM9
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
AN8
VCC
AN9
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
AP8
VCC
AP9
VCC VCC VCC VCC VCC VCC VCC VCC
H30
VCC
H31
VCC
H32
VCC
@
HAS
WELL_BGA1364
6 OF 12
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
HASWELL_BGA
U6F
H33 H34 H36 H37 H38 H39 H40 H42 H43 H45 H46 H48 H8 H9 J10 J14 J19 J24 J29 J33 J36 J37 J38 J39 J40 J42 J43 J45 J46 J48 J8 J9 K38 K40 K43 K44 K45 K46 K48 K8 K9 L37 L38 L39 L40 L42 L43 L44 L46 L47 L8 M37 M38 M39 M40 M42 M43 M44 M45 M46 M8 M9 N37 N38 N39 N40 N42 N43 N44 N46 N47 N8 N9 P45 P46 P8 R46 R47 R8 R9 T45 T46 U46 U47 U8 U9 V45 V46 V8 W46 W47 W8 Y45 Y46 Y8 A27 A28 A31 A32 A34 B27 B28 B31 B32 B34 B36 B38 B39 B42
+VCC_CORE+VCC_CORE
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
PROCESSOR(5/7) PWR,BYPASS
PROCESSOR(5/7) PWR,BYPASS
PROCESSOR(5/7) PWR,BYPASS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
11 62Tuesday, September 03, 2013
11 62Tuesday, September 03, 2013
11 62Tuesday, September 03, 2013
1
0.1
0.1
0.1
Page 12
5
+1.35V_CPU_VDDQ +1.35V
12
CU177 0.1U_0402_10V7K~D
12
CU178 0.1U_0402_10V7K~D
D D
C C
+VCCP +VCCIO2PCH
RESISTOR STUFFING OPTIONS ARE PROVIDED FOR TESTING PURPOSES
+VCCIO_OUT
B B
+1.35V_CPU_VDDQ Source
4
10U_0603_6.3V6M~D
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CU192
1
1
2
2
+VCCIO_OUT
CAD Note: CU36 SHOULD BE PLACED CLOSE T O CPU
4210mA
JP3
@
1 2
PAD-OPEN 4x4m
JP4
@
1 2
PAD-OPEN 4x4m
ST
1 2
R58 0_0805_5%@
1 2
RU91 75_0402_5%
1 2
RU90 130_0402_1%~D
CAD Note: Plac e the PU resist ors close to C PU RU90/RU91 clos e to CPU 300 - 1500mils
+1.35V +1.35V_CPU_VDDQ
10U_0603_6.3V6M~D
1
CU169
CU170
2
1U_0402_6.3V6K~D
CU194
CU193
1
2
2
CU36
0.01U_0402_16V7K~D
1
+VCCIO2PCH
10U_0603_6.3V6M~D
1
2
1U_0402_6.3V6K~D
1
2
30mA
VR_SVID_ALRT#
VR_SVID_DAT
3
+1.35V_CPU_VDDQ
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CU172
CU171
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CU195
CU196
1
1
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
330U_D2_2V_Y
1
1
1
CU174
CU173
CU197
CAD Note: RU96 SHOULD BE PLAC ED CLOSE TO CP U
CU175
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CU199
CU198
1
1
2
2
VCCSENSE[58]
VR_SVID_ALRT#[58]
VR_SVID_CLK[58] VR_SVID_DAT[58]
CPU_PWR_DEBUG[6]
+VCCP
12
1
+
CU176
2
2
+1.35V_CPU_VDDQ
1U_0402_6.3V6K~D
CU200
1
1
2
2
RU94 150_0402_1%~D
CPU_PWR_DEBUG
CU168
1U_0402_6.3V6K~D
CU201
300mA
+VCCIOA_OUT
CPU_PWR_DEBUG
+VCC_CORE
12
+VCCIO_OUT
+1.35V_CPU_VDDQ
RU96 100_0402_1%~D
RU93 43_0402_1%
+VCC_CORE
1 2
+VCC_CORE
+VCCIO_OUT
H_CPU_SVIDALRT#VR_SVID_ALRT# VR_SVID_CLK VR_SVID_DAT
AR29 AR31 AR33 AT13 AT19 AT23 AT27 AT32 AT36
AV37 AW22 AW25 AW29 AW33
AY18
BB21
BB22
BB26
BB27
BB30
BB31
BB34
BB36
BD22
BD26
BD30
BD33
BE18
BE22
BE26
BE30
BE33
AN31
AN22
AN18
AN33
AR49
AM49
AN49
AJ49
AG50
AK49
AJ50
AP49
AB50
AP50
AD50
AM50
AA46
AA47
J17 J21 J26 J31
L6
M6
C50
AH9
D51
F17
AK6
W9 J12
J53 J52 J50
B51
F19 E52 V49 U49
W49
V50
A36 A38 A39 A42 A43 A45 A46 A48
AA8 AA9
2
U6E
RSVD RSVD RSVD RSVD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
RSVD VCC VCC RSVD RSVD
VCC_SENSE RSVD VCCIO_OUT RSVD VCOMP_OUT RSVD RSVD RSVD RSVD
VIDALERT VIDSCLK VIDSOUT
VSS PWR_DEBUG VSS RSVD_TP RSVD_TP RSVD_TP RSVD_TP VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
HAS
@
WELL_BGA1364
HASWELL_BGA
5 OF 12
FC_D5 FC_D3
1
+VCC_CORE
B43
VCC
B45
VCC
B46
VCC
B48
VCC
C27
VCC
C28
VCC
C31
VCC
C32
VCC
C34
VCC
C36
VCC
C38
VCC
C39
VCC
C42
VCC
C43
VCC
C45
VCC
C46
VCC
C48
VCC
D27
VCC
D28
VCC
D31
VCC
D32
VCC
D34
VCC
D36
VCC
D38
VCC
D39
VCC
D42
VCC
D43
VCC
D45
VCC
D46
VCC
D48
VCC
E27
VCC
E28
VCC
E31
VCC
E32
VCC
E34
VCC
E36
VCC
E38
VCC
E39
VCC
E42
VCC
E43
VCC
E45
VCC
E46
VCC
E48
VCC
F27
VCC
F28
VCC
F31
VCC
F32
VCC
F34
VCC
F36
VCC
F38
VCC
F39
VCC
F42
VCC
F43
VCC
F45
VCC
F46
VCC
F48
VCC
G27
VCC
G29
VCC
G31
VCC
G32
VCC
G34
VCC
G36
VCC
G38
VCC
G39
VCC
G42
VCC
G43
VCC
G45
VCC
G46
VCC
G48
VCC
H11
VCC
H12
VCC
H13
VCC
H14
VCC
H16
VCC
H17
VCC
H18
VCC
H19
VCC
H20
VCC
H21
VCC
H23
VCC
H24
VCC
H25
VCC
H26
VCC
H27
VCC
H29
VCC
D5
CPU_FC_PWR
D3
CPU_FC_PWROK
T172PAD @ T173PAD @
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Title
Title
Title
PROCESSOR(6/7) PWR
PROCESSOR(6/7) PWR
PROCESSOR(6/7) PWR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
12 62Tuesday, September 03, 2013
12 62Tuesday, September 03, 2013
12 62Tuesday, September 03, 2013
0.1
0.1
0.1
Page 13
5
HASWELL_BGA
U6G
A11
VSS
A15
VSS
A19
VSS
A22
VSS
A26
VSS
A30
VSS
A33
VSS
A37
VSS
A40
VSS
A44
D D
C C
B B
A A
AA1 AA2 AA3 AA4
AA48
AA5 AA7
AB5 AB51 AB52 AB53 AB54
AB7
AB9 AC48
AC5 AC50
AC7 AD48 AD51 AD54
AD7
AD9
AE1
AE2
AE3
AE4 AE48
AE5 AE50
AE7
AF5
AF6
AF7 AG48
AG5 AG51 AG52 AG53 AG54
AG7
AG9
AH1
AH48
AH50
AH2 AH3 AH4
AH5
AH7
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
HA
SWELL_BGA1364
7 OF 12
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AJ48 AJ51 AJ54 AK48 AK5 AK50 AK7 AK9 AL1 AL4 AL48 AL5 AL7 AM5 AM51 AM52 AM53 AM54 AM7 AN1 AN2 AN3 AN4 AN48 AN5 AN50 AN7 AP51 AP54 AP7 AR12 AR14 AR16 AR18 AR20 AR24 AR26 AR48 AR5 AR50 AR7 AR8 AR9 AT1 AT10 AT12 AT15 AT16 AT18 AT20 AT22 AT25 AT26 AT29 AT33 AT35 AT37 AT39 AT4
4
HASWELL_BGA
U6H
AT40 AT42 AT43 AT45 AT46 AT47 AT49
AT50 AT51 AT52 AT53 AT54
AU13 AU18 AU22 AU25 AU29 AU33 AU37 AU42
AV13 AV18
AV22 AV25 AV29
AV33
AV42
AV50
AW13 AW18 AW37 AW42 AW43 AW45 AW46 AW47 AW49
AW5 AW50 AW51 AW54
AW9
AY13
AY22
AY25
AY29
AY33
AY37
AY42
AT5
AT6 AT8 AT9
AU5 AU9 AV1
AV2
AV3
AV4
AV5
AV9
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
HA
SWELL_BGA1364
8 OF 12
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AY50 AY9 B11 B15 B19 B22 B26 B30 B33 B37 B40 B44 B49 B8 BA13 BA18 BA22 BA25 BA29 BA33 BA37 BA4 BA42 BA5 BA50 BA51 BA52 BA53 BA9 BB10 BB11 BB12 BB14 BB15 BB16 BB17 BB18 BB20 BB23 BB25 BB28 BB32 BB33 BB37 BB38 BB39 BB41 BB42 BB43 BB44 BB46 BB47 BB48 BB49 BB5 BB6 BB7 BB9
3
U6I
BC10
VSS
BC12
VSS
BC15
VSS
BC18
VSS
BC22
VSS
BC26
VSS
BC3
VSS
BC30
VSS
BC33
VSS
BC36
VSS
BC38
VSS
BC41
VSS
BC43
VSS
BC46
VSS
BC48
VSS
BC5
VSS
BC50
VSS
BC52
VSS
BC7
VSS
BD10
VSS
BD15
VSS
BD18
VSS
BD36
VSS
BD41
VSS
BD46
VSS
BD5
VSS
BD51
VSS
BE10
VSS
BE15
VSS
BE36
VSS
BE41
VSS
BE46
VSS
BF10
VSS
BF12
VSS
BF15
VSS
BF18
VSS
BF22
VSS
BF26
VSS
BF30
VSS
BF33
VSS
BF36
VSS
BF38
VSS
BF41
VSS
BF43
VSS
BF46
VSS
BF48
VSS
BF7
VSS
C11
VSS
C15
VSS
C19
VSS
C22
VSS
C26
VSS
C30
VSS
C33
VSS
C37
VSS
C4
VSS
C40
VSS
C44
VSS
C49
VSS
C52
VSS
C8
VSS
D11
VSS
D15
VSS
D19
VSS
D22
VSS
D26
VSS
D30
VSS
D33
VSS
D37
VSS
D40
VSS
D44
VSS
D49
VSS
D8
VSS
E11
VSS
E15
VSS
E16
VSS
E17
VSS
E19
VSS
E20
VSS
E21
VSS
E22
VSS
E24
VSS
E25
VSS
E26
VSS
E30
VSS
E33
VSS
E37
VSS
E40
VSS
E44
VSS
E49
VSS
E51
VSS
E53
VSS
E8
VSS
F2
VSS
F26
VSS
F3
VSS
F30
VSS
F33
VSS
F37
VSS
F4
VSS
F40
VSS
F44
VSS
F49
VSS
F5
VSS
G11
VSS
G13
VSS
G16
VSS
HA
SWELL_BGA1364
2
HASWELL_BGA
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS
VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF
VSS_SENSE
9 OF 12
G20 G23 G25 G26 G30 G33 G37 G40 G44 G49 G52 G54 G7 G8 G9 H44 H49 H7 J44 J49 J51 J54 J7 K1 K2 K3 K4 K5 K6 K7 L48 L7 L9 M48 M50 M52 M54 M7 N48 N7 P1 P2 P3 P4 P48 P5 P50 P52 P54 P6 P7 R48 R7 T48 U1 U2 U3 U4 U48 U5 U50 U52 U54 U6 U7 V48 V7 V9 W48 W50 W52 W54 W7 Y48 Y7 Y9
AR22 AB48 P9 G18
A49 A50 A8 B4 BA1 BA54 BB1 BB54 BD2 BD53 BF49 BF5 BF50 BF6 C53 D2 E54 F54 G1
D50
CAD Note: RU99 SHOULD BE PLACED CLOSE TO CPU
1
12
RU99 100_0402_1%~D
VSSSENSE [58]
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR(7/7) VSS
PROCESSOR(7/7) VSS
PROCESSOR(7/7) VSS
1
0.1
0.1
13 62Tuesday, September 03, 2013
13 62Tuesday, September 03, 2013
13 62Tuesday, September 03, 2013
0.1
Page 14
5
DDR_A_DQS#[0..7][9]
DDR_A_DQS[0..7][9]
DDR_A_D[0..63][9]
DDR_A_MA[0..15][9]
D D
yout Note:
La Pla
ce near JDIMM1
+1.35V
1U_0402_6.3V6K~D
CD3
1
2
C C
B B
A A
+1.35V
10U_0603_6.3V6M~D
1
CD8
2
Layout Note: Place near JDIMM1.203,204
+0.675VS
1U_0402_6.3V6K~D
CD17
1
2
Layout Note: Place near JDIMM1.199
+3VS
0.1U_0402_16V7K~D
1
2
5
M1
All VREF traces should have 10 mil trace width
1U_0402_6.3V6K~D
CD4
1
1
2
2
10U_0603_6.3V6M~D
1
1
CD9
2
2
1U_0402_6.3V6K~D
CD18
1
1
2
2
2.2U_0603_6.3V6K~D
CD22
CD21
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD6
CD5
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CD11
CD10
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
@
@
CD19
CD20
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
2
CD13
CD12
2
4
+V_DDR_REF
DDR_CKE0_DIMMA[9] DDR_CKE1_DIMMA [9]
330U_D2_2.5VY_R15M~D
1
CD7
+
2
DDR_CS1_DIMMA#[9]
1 2
RD8 10K_0402_5%~D
1 2
RD9 10K_0402_5%~D
4
+V_DDR_REF
0.1U_0402_16V7K~D
CD2
1
2
DDR_A_BS2[9]
M_CLK_DDR0[9] M_CLK_DDR#0[9]
DDR_A_BS0[9]
DDR_A_WE#[9] DDR_A_CAS#[9]
3
+1.35V +1.35V
JDIMM1
+V_DDR_REF
DDR_A_D4 DDR_A_D0
DDR_A_D3 DDR_A_D7
DDR_A_D9 DDR_A_D8
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D15 DDR_A_D11
DDR_A_D16 DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D19
DDR_A_D26 DDR_A_D24
DDR_A_D28 DDR_A_D29 DDR_A_D27
DDR_CKE0_DIMMA
DDR_A_BS2
DDR_A_MA12 DDR_A_MA9
DDR_A_MA8 DDR_A_MA5
DDR_A_MA3 DDR_A_MA1
M_CLK_DDR0 M_CLK_DDR#0
DDR_A_MA10
DDR_A_BS0
DDR_A_WE# DDR_A_CAS#
DDR_A_MA13
DDR_CS1_DIMMA#
DDR_A_D32 DDR_A_D33
DDR_A_DQS#4 DDR_A_DQS4
DDR_A_D34 DDR_A_D35
DDR_A_D40 DDR_A_D41
DDR_A_D42 DDR_A_D43
DDR_A_D48 DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51
DDR_A_D56 DDR_A_D57
DDR_A_D58 DDR_A_D59
+3VS
+0.675VS
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
207
BOSS1
BELLW_80001-1021
CONN@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
VSS DQ4 DQ5 VSS
DQS0#
DQS0
VSS DQ6 DQ7
VSS DQ12 DQ13
VSS
DM1
RESET#
VSS DQ14 DQ15
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
CKE1
VDD
VDD
VDD
VDD
VDD
CK1
CK1#
VDD
BA1 RAS#
VDD
ODT0
VDD
ODT1
VDD
VREF_CA
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
EVENT#
SDA
SCL
VTT
GND2
BOSS2
3
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72
74 76 78
A15
80
A14
82 84
A11
86
A7
88 90
A6
92
A4
94 96
A2
98
A0
100 102 104 106 108 110 112 114
S0#
116 118 120 122
NC
124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206 208
2
DDR_A_D1 DDR_A_D5
DDR_A_DQS#0 DDR_A_DQS0
DDR_A_D2 DDR_A_D6
DDR_A_D12 DDR_A_D13
DDR3_DRAMRST#
DDR_A_D14 DDR_A_D10
DDR_A_D21 DDR_A_D20
DDR_A_D22 DDR_A_D23
DDR_A_D25 DDR_A_D30
DDR_A_DQS#3 DDR_A_DQS3
DDR_A_D31
DDR_CKE1_DIMMA
DDR_A_MA15 DDR_A_MA14
DDR_A_MA11 DDR_A_MA7
DDR_A_MA6 DDR_A_MA4
DDR_A_MA2 DDR_A_MA0
M_CLK_DDR1 M_CLK_DDR#1
DDR_A_BS1 DDR_A_RAS#
DDR_CS0_DIMMA# M_ODT0
M_ODT1
DDR_A_D36 DDR_A_D37
DDR_A_D38 DDR_A_D39
DDR_A_D44 DDR_A_D45
DDR_A_DQS#5 DDR_A_DQS5
DDR_A_D46 DDR_A_D47
DDR_A_D52 DDR_A_D53
DDR_A_D54 DDR_A_D55
DDR_A_D60 DDR_A_D61
DDR_A_DQS#7 DDR_A_DQS7
DDR_A_D62 DDR_A_D63
PCH_SMBDATA PCH_SMBCLK
+0.675VS
PCH_SMBDATA [15,17,39,43,6] PCH_SMBCLK [15,17,39,43,6]
DDR3_DRAMRST# [15,8]
M_CLK_DDR1 [9] M_CLK_DDR#1 [9]
DDR_A_BS1 [9] DDR_A_RAS# [9]
DDR_CS0_DIMMA# [9] M_ODT0 [9]
M_ODT1 [9]
0.1U_0402_16V7K~D
CD16
1
2
DRAMRST_CNTRL_S3[38,8]
M3
M3 Circuit (Processor Generated SO-DIMM VREF_DQ)
Compal Secret Data
Compal Secret Data
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
For deep S3
1
All VREF traces should have 10 mil trace width
+V_DDR_REF
+V_DDR_REF
DRAMRST_CNTRL_S3
+V_DDR_REF
DRAMRST_CNTRL_S3
For
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 3
D
BSS138-G_SOT23-3
G
2
1 3
D
BSS138-G_SOT23-3
G
2
deep S3
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DDRIII DIMMA
DDRIII DIMMA
DDRIII DIMMA
LA-9941P
S
QD1
S
QD2
1
+V_DDR_REFA_R [9]
+V_DDR_REFB_R [9]
14 62Tuesday, September 03, 2013
14 62Tuesday, September 03, 2013
14 62Tuesday, September 03, 2013
0.1
0.1
0.1
Page 15
5
M1
+V_DDR_REF
D D
C C
B B
A A
DDR_B_DQS#[0..7][9]
DDR_B_DQS[0..7][9]
DDR_B_D[0..63][9]
DDR_B_MA[0..15][9]
+1.35V
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD26
CD25
1
1
2
2
+1.35V
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
2
+0.675VS
CD31
CD30
2
Layout Note: Place near JDIMMB.203,204
1U_0402_6.3V6K~D
CD39
1
1
2
2
5
Layout Note: Place near JDIMMB
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD27
1
1
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CD32
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
@
CD40
CD41
1
2
All VREF traces should have 10 mil trace width
CD28
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CD33
2
1U_0402_6.3V6K~D
@
CD42
1
2
CD35
CD34
2
Layout Note:
ce near JDIMMB.199
Pla
4
+V_DDR_REF
0.1U_0402_16V7K~D
CD24
1
2
+3VS
0.1U_0402_16V7K~D
1
2
4
2.2U_0603_6.3V6K~D
CD43
CD44
1
2
Note: Check voltage tolerance of VREF_DQ at the DIMM socket
DDR_CKE2_DIMMB[9]
DDR_CS3_DIMMB#[9]
1 2
RD16 10K_0402_5%~D
1 2
RD15 10K_0402_5%~D
+3VS
DDR_B_BS2[9]
M_CLK_DDR2[9] M_CLK_DDR#2[9]
DDR_B_BS0[9]
DDR_B_WE#[9] DDR_B_CAS#[9]
3
+1.35V +1.35V
+V_DDR_REF
DDR_B_D0 DDR_B_D1
DDR_B_D2 DDR_B_D3
DDR_B_D15 DDR_B_D8
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D13 DDR_B_D12 DDR_B_D11
DDR_B_D16 DDR_B_D17
DDR_B_DQS#2 DDR_B_DQS2
DDR_B_D18 DDR_B_D19
DDR_B_D24 DDR_B_D25
DDR_B_D26 DDR_B_D27
DDR_CKE2_DIMMB
DDR_B_BS2
DDR_B_MA12 DDR_B_MA9
DDR_B_MA8 DDR_B_MA5
DDR_B_MA3 DDR_B_MA1
M_CLK_DDR2 M_CLK_DDR#2
DDR_B_MA10 DDR_B_BS0
DDR_B_WE# DDR_B_CAS#
DDR_B_MA13
DDR_CS3_DIMMB#
DDR_B_D32 DDR_B_D33
DDR_B_DQS#4 DDR_B_DQS4
DDR_B_D34 DDR_B_D35
DDR_B_D40
DDR_B_D42 DDR_B_D46
DDR_B_D48 DDR_B_D52
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D51
DDR_B_D56 DDR_B_D57
DDR_B_D62 DDR_B_D58 DDR_B_D59
+3VS
+0.675VS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
JDIMM2
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
207
BOSS1
BELLW_80001-1021
CONN@
2
VSS
4
DQ4
6
DQ5
8
VSS
10
DQS0#
12
DQS0
14
VSS
16
DQ6
18
DQ7
20
VSS
22
DQ12
24
DQ13
26
VSS
28
DM1
30
RESET#
32
VSS
34
DQ14
36
DQ15
38
VSS
40
DQ20
42
DQ21
44
VSS
46
DM2
48
VSS
50
DQ22
52
DQ23
54
VSS
56
DQ28
58
DQ29
60
VSS
62
DQS3#
64
DQS3
66
VSS
68
DQ30
70
DQ31
72
VSS
74
CKE1
76
VDD
78
A15
80
A14
82
VDD
84
A11
86
A7
88
VDD
90
A6
92
A4
94
VDD
96
A2
98
A0
100
VDD
102
CK1
104
CK1#
106
VDD
108
BA1
110
RAS#
112
VDD
114
S0#
116
ODT0
118
VDD
120
ODT1
122
NC
124
VDD
126
VREF_CA
128
VSS
130
DQ36
132
DQ37
134
VSS
136
DM4
138
VSS
140
DQ38
142
DQ39
144
VSS
146
DQ44
148
DQ45
150
VSS
152
DQS5#
154
DQS5
156
VSS
158
DQ46
160
DQ47
162
VSS
164
DQ52
166
DQ53
168
VSS
170
DM6
172
VSS
174
DQ54
176
DQ55
178
VSS
180
DQ60
182
DQ61
184
VSS
186
DQS7#
188
DQS7
190
VSS
192
DQ62
194
DQ63
196
VSS
198
EVENT#
200
SDA
202
SCL
204
VTT
206
GND2
208
BOSS2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
DDR_B_D4 DDR_B_D5
DDR_B_DQS#0 DDR_B_DQS0
DDR_B_D6 DDR_B_D7
DDR_B_D14 DDR_B_D9
DDR3_DRAMRST#
DDR_B_D10
DDR_B_D20 DDR_B_D21
DDR_B_D22 DDR_B_D23
DDR_B_D28 DDR_B_D29
DDR_B_DQS#3 DDR_B_DQS3
DDR_B_D30 DDR_B_D31
DDR_CKE3_DIMMB
DDR_B_MA15 DDR_B_MA14
DDR_B_MA11 DDR_B_MA7
DDR_B_MA6 DDR_B_MA4
DDR_B_MA2 DDR_B_MA0
M_CLK_DDR3 M_CLK_DDR#3
DDR_B_BS1 DDR_B_RAS#
DDR_CS2_DIMMB# M_ODT2
M_ODT3
DDR_B_D36 DDR_B_D37
DDR_B_D38 DDR_B_D39
DDR_B_D45 DDR_B_D41DDR_B_D44
DDR_B_DQS#5 DDR_B_DQS5
DDR_B_D47 DDR_B_D43
DDR_B_D53 DDR_B_D49
DDR_B_D54 DDR_B_D50DDR_B_D55
DDR_B_D60 DDR_B_D61
DDR_B_DQS#7 DDR_B_DQS7
DDR_B_D63
PCH_SMBDATA PCH_SMBCLK
+0.675VS
2
DDR3_DRAMRST# [14,8]
DDR_CKE3_DIMMB [9]
M_CLK_DDR3 [9] M_CLK_DDR#3 [9]
DDR_B_BS1 [9] DDR_B_RAS# [9]
DDR_CS2_DIMMB# [9] M_ODT2 [9]
M_ODT3 [9]
PCH_SMBDATA [14,17,39,43,6] PCH_SMBCLK [14,17,39,43,6]
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
All VREF traces should have 10 mil trace width
+V_DDR_REF
0.1U_0402_16V7K~D
CD38
1
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Compal Electronics, Inc.
DDRIII DIMMB
DDRIII DIMMB
DDRIII DIMMB
LA-9941P
1
15 62Tuesday, September 03, 2013
15 62Tuesday, September 03, 2013
15 62Tuesday, September 03, 2013
0.1
0.1
0.1
Page 16
5
4
3
2
1
RTC CRYSTAL
5
SM_INTRUDER#
PCH_INTVRMEN
PCH_INTVRMEN
HDA_SYNC
PT
12
RH20 210_0402_1%~D
12
RH26 100_0402_1%~D
PCH_RTCX1
PCH_RTCX2
1
CH4
18P_0402_50V8J~D
2
HDA_SPKR
HDA_SDOUT
12
RH35
51_0402_5%
+RTCVCC
1 2
RH4 20K_0402_5%~D
+RTCVCC
1 2
RH3 20K_0402_5%~D
HD Audio
HDA_BITCLK_AUDIO[46]
HDA_SYNC_AUDIO[46]
HDA_RST_AUDIO#[46,47]
HDA_SDOUT_AUDIO[46]
HDA_SDO[38]
1U_0603_10V6K~D
1U_0603_10V6K~D
HDA_BITCLK_AUDIO
RH7 33_0402_5%~D
RH8 1M_0402_5%~D
4
1
CH6
CH5
1 2
1 2
12
CLRP2
SHORT PADS
2
1
12
CLRP1
SHORT PADS
2
HDA_SPKR[47]
HDA_SDIN0[46]
DP_PCH_HPD[18,37]
RH5 33_0402_5%~D
RH6 33_0402_5%~D
RH15 33_0402_5%
RH11 1K_0402_5%~D
1 2
1 2
1 2
1 2
PCH_RTCX1
PCH_RTCX2
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN
PCH_RTCRST#
HDA_BIT_CLK
HDA_SYNC
HDA_SPKR
HDA_RST#
HDA_SDIN0
HDA_SDOUT
DP_PCH_HPD
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
for enable ME code programing
Reserve for EMI
1 2
CH1 10P_0402_50V8J~D@
1 2
CH2 10P_0402_50V8J~D@
Reserve for RF please close t o UH1
HDA_BIT_CLK
HDA_SDOUTPCH_JTAG_TCKPCH_JTAG_TMSPCH_JTAG_TDO PCH_JTAG_TDI
U7A
B5
RTCX1
B4
RTCX2
B9
SRTCRST#
A8
INTRUDER#
G10
INTVRMEN
D9
RTCRST#
B25
HDA_BCLK
A22
HDA_SYNC
AL10
SPKR
C24
HDA_RST#
L22
HDA_SDI0
K22
HDA_SDI1
G22
HDA_SDI2
F22
HDA_SDI3
A24
HDA_SDO
B17
DOCKEN#/GPIO33
C22
HDA_DOCK_RST #/GPIO13
AB3
JTAG_TCK
AD1
JTAG_TMS
AE2
JTAG_TDI
AD3
JTAG_TDO
F8
TP25
C26
TP22
AB6
TP20
LYNXPOINT_BGA695
@
HDA_BIT_CLK
HDA_SYNC
HDA_RST#
HDA_SDOUT
3
LPT_PCH_M_EDS
JTAGRTC AZALIA
REV = 5
SATA
1 OF 11
SATA_RXN4/PERN1 SATA_RXP4/PERP1
SATA_TXN4/PETN1
SATA_TXP4/PETP1
SATA_RXN5/PERN2 SATA_RXP5/PERP2
SATA_TXN5/PETN2
SATA_TXP5/PETP2
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA_RXN_0 SATA_RXP_0
SATA_TXN_0 SATA_TXP_0
SATA_RXN_1 SATA_RXP_1
SATA_TXN_1 SATA_TXP_1
SATA_RXN_2 SATA_RXP_2
SATA_TXN_2 SATA_TXP_2
SATA_RXN_3 SATA_RXP_3
SATA_TXN_3 SATA_TXP_3
SATA_RCOMP
SATALED#
SATA_IREF
BC8 BE8
AW8 AY8
BC10 BE10
AV10
SATA_PTX_DRX_N1
AW10
SATA_PTX_DRX_P1
BB9 BD9
AY13 AW13
BC12 BE12
AR13 AT13
BD13 BB13
AV15
SATA Impedance Compensation
AW15
CAD note:
BC14
Place the resistor within 500 mils of the PCH.
BE14
Avoid routing next to clock pins.
AP15 AR15
AY5
SATA_RCOMP
AP3
PCH_SATALED#
AT1
PCH_GPIO21
AU2
BBS_BIT0
BD4
BA2
TP9
BB2
TP8
1 2
CH18 0.01U_0402_16V7K~D
1 2
CH17 0.01U_0402_16V7K~D
1 2
RH21 7.5K_0402_1%~D
1 2
RH14 10K_0402_5%~D@
1 2
RH12 10K_0402_5%~D
1 2
RH29 10K_0402_5%~D
+1.5VS
SATA_PRX_DTX_N0 [43] SATA_PRX_DTX_P0 [43]
SATA_PTX_DRX_N0 [43] SATA_PTX_DRX_P0 [43]
SATA_PRX_DTX_N1 [42] SATA_PRX_DTX_P1 [42]
SATA_PTX_DRX_N1_C [42] SATA_PTX_DRX_P1_C [42]
+3VS
+1.5VS
RTC Battery
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
HDD
SS
D
Boot BIOS Strap
1 2
RH245 1K_0402_5%~D@
1 2
RH244 1K_0402_5%~D@
GPIO19 => BBS_BIT0 GPIO51 => BBS_BIT1
Boot BIOS Strap
*
BBS_BIT[0]BBS_BIT[1]
0 0
0
1
1 1
1
0
+3VLP
W=20mils
W=20mils
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (1/8) SATA,HDA
PCH (1/8) SATA,HDA
PCH (1/8) SATA,HDA
LA-9941P
+RTCBATT
3
1
1
2
BBS_BIT0
Boot BIOS Location
LPC
Reserved (NAND)
PCI
SPI
RTCR1 1K_0402_5%~D
1 2
W=20mils
2
RTCD1 BAT54CW_SOT323-3
CH12 1U_0603_10V6K~D
1
+RTCVCC
16 62Tuesday, September 03, 2013
16 62Tuesday, September 03, 2013
16 62Tuesday, September 03, 2013
BBS_BIT1 [18]
0.1
0.1
0.1
1 2
RH1 10M_0402_5%
YH1
1 2
32.768KHZ_12.5PF_FC-135
1
D D
+RTCVCC
CH3
18P_0402_50V8J~D
2
1 2
RH2 1M_0402_5%~D
PCH Strap PIN
INTVRMEN Integrated 1.05V VRM Enable/Disable
+RTCVCC
1 2
RH13 330K_0402_5%
1 2
RH16 330K_0402_5%@
HIntegrated VRM enable
*
Integrated VRM disable
C C
B B
A A
L
SPKR No Reboot
+3VS
1 2
RH17 1K_0402_5%~D@
LOW=Default
*
HIGH=No Reboot
If the signal i s sampled high , this indicate that the system is strapped to th e "No Reboot" m ode
HDA_SYNC On-Die PLL Voltage Regulator Voltage Select
+3V_PCH
1 2
RH32 1K_0402_5%~D@
This signal has a weak intern al pull-down On Die PLL VR i s supplied by
1.5V when smapl ed high
1.8V when sampl ed low
*
Needs to be pul led High for H uron River plat from
HDA_SDO Flash Descriptor Security Override/Intel ME Debug Mode
+3V_PCH
1 2
RH23 1K_0402_5%~D@
Low = Disabled
*
High = Enabled
ME debug mode , this signal has a weak internal PD
L=>security measures defined in the Flash Descriptor will be in effect (default)
H=>Flash Descriptor Security will be overridden
JTAG
+3V_PCH +3V_PCH+3V_PCH
12
RH18 210_0402_1%~D
12
RH24 100_0402_1%~D
12
RH19 210_0402_1%~D
12
RH25 100_0402_1%~D
Page 17
5
4
3
2
1
U7C
Y43
CLKOUT_PCIE_N _0
Y45
CLKOUT_PCIE_P_ 0
PCH_GPIO20
PCH_GPIO44
NFC_RST#
NFC_DET#
4
AL11
AJ11
AJ10
AD43 AD45
AH43
AH45
A20
C20
A18
C18
B21
D21
G20
AJ7
AL7
AH1
AH3
AJ4
AJ2
AB1
AA44 AA42
AF1
AB43
AB45
AF3
T3
AF43 AF45
V3
AE44 AE42
AA2
AB40 AB39
AE4
AJ44
AJ42
Y3
D44
E44
B42
F41
A40
U7D
LAD_0
LAD_1
LAD_2
LAD_3
LFRAME#
LDRQ0#
LDRQ1#/GPIO23
SERIRQ
SPI_CLK
SPI_CS0#
SPI_CS1#
SPI_CS2#
SPI_MOSI
SPI_MISO
SPI_IO2
SPI_IO3
LYN
@
PCIECLKRQ0#/GPIO73
CLKOUT_PCIE_N _1 CLKOUT_PCIE_P_ 1
PCIECLKRQ1#/GPIO18
CLKOUT_PCIE_N _2
CLKOUT_PCIE_P_ 2
PCIECLKRQ2#/GPIO20/SMI#
CLKOUT_PCIE_N _3 CLKOUT_PCIE_P_ 3 PCIECLKRQ3#/GPIO25
CLKOUT_PCIE_N _4 CLKOUT_PCIE_P_ 4 PCIECLKRQ4#/GPIO26
CLKOUT_PCIE_N 5 CLKOUT_PCIE_P_ 5 PCIECLKRQ5#/GPIO44
CLKOUT_PCIE_N _6 CLKOUT_PCIE_P_ 6 PCIECLKRQ6#/GPIO45
CLKOUT_PCIE_N _7
CLKOUT_PCIE_P_ 7
PCIECLKRQ7#/GPIO46
CLKOUT_ITPXDP
CLKOUT_ITPXDP_P
CLKOUT_33M HZ0
CLKOUT_33M HZ1
CLKOUT_33M HZ2
CLKOUT_33M HZ3
CLKOUT_33M HZ4
CLOCK SIGNAL
LYNXPOINT_BGA695
@
XPOINT_BGA695
PCIECLKREQ0#
1 2
1 2
1 2
LANCLK_REQ#
MINI3CLK_REQ#
CDCLK_REQ#
CLK_PCI1
CLK_PCI2CLK_PCI_DEBUG
D D
CLK_PCIE_MINI3#[40]
MiniWLAN (Mini Card 1)--->
Card Reader --->
+3V_PCH
+3VS
+3V_PCH
C C
PT
RPH24
4 5 3 6 2 7 1 8
10K_0804_8P4R_5%
RPH25
4 5 3 6 2 7 1 8
10K_0804_8P4R_5%
NFC_RST# PCIECLKREQ0# PCH_GPIO44 NFC_DET#
CDCLK_REQ# MINI3CLK_REQ# PCH_GPIO20 LANCLK_REQ#
CLK_PCIE_MINI3[40]
MINI3CLK_REQ#[40]
CLK_PCIE_CD#[40] CLK_PCIE_CD[40]
CDCLK_REQ#[40]
NFC_RST#[49]
NFC_DET#[49]
CLK_CPU_ITP#[6]
CLK_CPU_ITP[6]
CLK_PCI_LPBACK CLK_PCI0
CLK_PCI_LPC[38]
CLK_PCI_DEBUG[42]
CLK_PCI_LPC
RH144 22_0402_5%
RH145 22_0402_5%
RH146 22_0402_5%
Reserve for EMI
1 2
CH14 10P_0402_50V8J~D@
1 2
CH26 10P_0402_50V8J~D@
B B
RPH5
1 8
PCH_SPI_SI PCH_SPI_SO PCH_SPI_WP# PCH_SPI_WP#_R
2 7 3 6 4 5
15_0804_8P4R_5%
PCH_SPI_CLK_RPCH_SPI_CLK PCH_SPI_SI_R PCH_SPI_SO_R
CLK_PCI_LPC
CLK_PCI_DEBUG
PCH_SPI_HOLD#
LPC_AD0[38,40,42]
LPC_AD1[38,40,42]
LPC_AD2[38,40,42]
LPC_AD3[38,40,42]
LPC_FRAME#[38,40,42]
1 2
RH75 10K_0402_5%~D
+3VS
SERIRQ[38,40]
T7PAD~D @
1 2
RH41 15_0402_1%
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
SERIRQ
PCH_SPI_CLK_R
PCH_SPI_CS#
PCH_SPI_CS1#
PCH_SPI_SI_R
PCH_SPI_SO_R
PCH_SPI_WP#_R
PCH_SPI_HOLD#_R
SPI ROM FOR ME ( 8MByte )
+3V_PCH
1 2
RH33 3.3K_0402_5%@
1 2
RH38 1K_0402_5%~D
1 2
RH40 1K_0402_5%~D
A A
PCH_SPI_CS# PCH_SPI_SO PCH_SPI_WP#
1 2 3 4
UH2
CS# DO(IO1) WP#(IO2) GND
PCH_SPI_CS#
PCH_SPI_WP#
PCH_SPI_HOLD#
HOLD#(IO3)
DI(IO0)
W25Q64FVQ_SO8
5
8
VCC
7 6
CLK
5
PCH_SPI_HOLD# PCH_SPI_CLK PCH_SPI_SI
+3V_PCH
1
CH11
0.1U_0402_16V7K~D
2
LPT_PCH_M_EDS
REV = 5
LPT_PCH_M_EDS
REV = 5
SMBus
SPILPC
C-Link
Thermal
CLKOUT_PEG_ A
CLKOUT_PEG_ A_P
PEGA_CLKRQ#/GPIO47
CLKOUT_PEG_ B
CLKOUT_PEG_ B_P
PEGB_CLKRQ#/GPIO56
CLKOUT_DMI_P
CLKOUT_DP_ P
CLKOUT_DPN S
CLKOUT_DPN S_P
CLKIN_GND_P
CLKIN_DOT96N CLKIN_DOT96P
CLKIN_SATA_P
CLKIN_33MHZLOOP BACK
CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67
2 OF 11
DIFFCLK_BIASREF
SML1ALERT#/PC HHOT#/GPIO74
3 OF 11
CLKOUT_DMI
CLKOUT_DP
CLKIN_DMI
CLKIN_DMI_P
CLKIN_GND
CLKIN_SATA
REFCLK14IN
XTAL25_IN
XTAL25_OUT
ICLK_IREF
TP19 TP18
SMBALERT#/GPIO11
SMBCLK
SMBDATA
SML0ALERT#/GPIO60
SML0CLK
SML0DATA
SML1CLK/GPIO58
SML1DATA/GPIO75
CL_CLK
CL_DATA
CL_RST#
TD_IREF
3
AB35
CLK_PEG_VGA#
AB36
CLK_PEG_VGA
AF6
PEG_A_CLKRQ#
Y39
Y38
U4
PEG_B_CLKREQ#
AF39
CLK_CPU_DMI#
AF40
CLK_CPU_DMI
AJ40
CLK_CPU_SSC_DPLL#
AJ39
CLK_CPU_SSC_DPLL
AF35
DPLL_REF_CLK#
AF36
DPLL_REF_CLK
AY24
CLKIN_DMI#
AW24
CLKIN_DMI
AR24
CLK_BUF_BCLK#
AT24
CLK_BUF_BCLK
H33
CLKIN_DOT96#
G33
CLKIN_DOT96
BE6
CLKIN_SATA#
BC6
CLKIN_SATA
F45
CLK_PCH_14M
D17
CLK_PCI_LPBACK
AL44
XTAL25_IN
AM43
XTAL25_OUT
C40
CLK_PCI_TPM_R
F38
KB_DET#
F36
F39
AM45
AD39 AD38
AN44
PCH_CLK_BIASREF
TP1
TP2
TP4
TP3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
N7
CCD_INT
R10
SMBCLK
U11
SMBDATA
N8
DRAMRST_CNTRL_PCH
U8
SML0CLK
R7
SML0DATA
H6
NFC_IRQ
K6
SML1CLK
N11
SML1DATA
AF11
AF10
AF7
BA45
BC45
BE43
BE44
AY43
PCH_TD_IREF
No support iAMT
RH97 22_0402_1% RH98 100K_0402_5%~D
CLK_PEG_VGA# [24]
CLK_PEG_VGA [24]
PEG_A_CLKRQ# [24]
1 2
RH64 10K_0402_5%~D
PEG_B_CLKREQ# [19]
CLK_CPU_DMI# [8]
CLK_CPU_DMI [8]
CLK_CPU_SSC_DPLL# [8] CLK_CPU_SSC_DPLL [8]
DPLL_REF_CLK# [8] DPLL_REF_CLK [8]
1 2 1 2
1 2
RH28 7.5K_0402_1%~D
SML0CLK [49]
SML0DATA [49]
NFC_IRQ [49]
12
RH322
8.2K_0402_1%
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
+3V_PCH
CLK_PCI_TPM
+3VS
KB_DET# [39]
+1.5VS
+1.5VS
PCH to NFC
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
12
2
CLK_PCI_TPM [40]
CH13
@
10P_0402_50V8J~D
Reserve for EMI
6 1
SMBCLK
DMN66D0LDW-7_SOT363-6~D
SMBDATA
SML1CLK
DMN66D0LDW-7_SOT363-6~D
SML1DATA
QH2A
DMN66D0LDW-7_SOT363-6~D
XTAL25_IN
XTAL25_OUT
PT
CLK_BUF_BCLK# CLK_BUF_BCLK CLKIN_DMI# CLKIN_DMI
CLKIN_DOT96# CLKIN_DOT96 CLKIN_SATA# CLKIN_SATA
CLK_PCH_14M
CLOCK TERMINATION for FCIM and need close to PCH
+3VS
2
5
3
4
QH2B
+3VS
2
6 1
DMN66D0LDW-7_SOT363-6~D
5
QH3A
3
QH3B
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 2
RH89 1M_0402_5%~D
4
1
25MHZ_10PF_X3G025000DA1H~D
1
CH27 12P_0402_50V8J
2
RH66 10K_0402_5%~D RH67 10K_0402_5%~D RH68 10K_0402_5%~D RH69 10K_0402_5%~D
RH62 10K_0402_5%~D
PT
SMBCLK
SMBDATA
NFC_IRQ
CCD_INT
DRAMRST_CNTRL_PCH
SML1CLK SML1DATA PCH_SMBCLK PCH_SMBDATA
PT
SML0CLK
SML0DATA
4
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PCH (2/8) SMBUS, CLK, SPI, LPC
PCH (2/8) SMBUS, CLK, SPI, LPC
PCH (2/8) SMBUS, CLK, SPI, LPC
LA-9941P
YH2
3
NC
OSC
2
OSC
NC
1
CH28 12P_0402_50V8J
2
PT
RPH27
4 5 3 6 2 7 1 8
10K_0804_8P4R_5%
1 2 1 2 1 2 1 2
1 2
1 2
RH448 2.2K_0402_5%~D
1 2
RH456 2.2K_0402_5%~D
1 2
RH65 10K_0402_5%~D@
1 2
RH63 10K_0402_5%~D
1 2
RPH14
1 8 2 7 3 6 4 5
2.2K_8P4R_5%
1 2
1 2
1K_0402_5%~D
N14@
N14@
RH53
RH724 499_0402_1%
RH725 499_0402_1%
PCH to DDR, XDP, TP, FFS, AMP
PCH_SMBCLK [14,15,39,43,6]
PCH_SMBDATA [14,15,39,43,6]
PCH to EC
PCH_SMLCLK [25,35,38,40]
PCH_SMLDATA [25,35,38,40]
17 62Tuesday, September 17, 2013
17 62Tuesday, September 17, 2013
1
17 62Tuesday, September 17, 2013
+3V_PCH
+3V_PCH
+3VS
0.1
0.1
0.1
Page 18
5
U7B
DMI_RCOMP
XDP_DBRESET#
SYS_PWROK
PCH_GPIO72
RI#
SLP_WLAN#
+RTCVCC
AW22
DMI_RXN_0
AR20
DMI_RXN_1
AP17
DMI_RXN_2
AV20
DMI_RXN_3
AY22
DMI_RXP_0
AP20
DMI_RXP_1
AR17
DMI_RXP_2
AW20
DMI_RXP_3
BD21
DMI_TXN_0
BE20
DMI_TXN_1
BD17
DMI_TXN_2
BE18
DMI_TXN_3
BB21
DMI_TXP_0
BC20
DMI_TXP_1
BB17
DMI_TXP_2
BC18
DMI_TXP_3
BE16
DMI_IREF
AW17
TP12
AV17
TP7
AY17
DMI_RCOMP
R6
SUSACK#
AM1
SYS_RESE T#
AD7
SYS_PW ROK
F10
PWROK
AB7
APWROK
H3
DRAMPWR OK
J2
RSMRST#
J4
SUSWAR N#/SUSPWR NACK/GPIO30
K1
PWRBTN#
E6
ACPRESEN T/GPIO31
K7
BATLOW# /GPIO72
N4
RI#
AB10
TP21
D2
SLP_W LAN#/GPIO2 9
LYN
XPOINT_BGA695
@
PCH_PWROK_EC[38]
IMVP_VR_PG[38,58,6]
T175PAD~D@
T178PAD~D@
T81PAD~D@
T171PAD~D@
T170PAD~D@
PCH_GPIO72 RI# WAKE# PCH_SUSWARN#
PCH_RSMRST#
SYS_PWROK
PCH_PWROK_EC
AC_PRESENT
12
12
DMI_CTX_PRX_N0 DMI_CTX_PRX_N1
DMI_CTX_PRX_N2 DMI_CTX_PRX_N3
DMI_CTX_PRX_P0 DMI_CTX_PRX_P1
DMI_CTX_PRX_P2 DMI_CTX_PRX_P3
DMI_CRX_PTX_N0 DMI_CRX_PTX_N1
DMI_CRX_PTX_N2 DMI_CRX_PTX_N3
DMI_CRX_PTX_P0 DMI_CRX_PTX_P1
DMI_CRX_PTX_P2 DMI_CRX_PTX_P3
T176PAD~D@
PM_DRAM_PWRGD
T177PAD~D@
DMI_CTX_PRX_N0[7] DMI_CTX_PRX_N1[7]
DMI_CTX_PRX_N2[7] DMI_CTX_PRX_N3[7]
DMI_CTX_PRX_P0[7] DMI_CTX_PRX_P1[7]
DMI_CTX_PRX_P2[7] DMI_CTX_PRX_P3[7]
DMI_CRX_PTX_N0[7]
+1.5VS
SUSACK#[38]
+3V_PCH+3V_PCH
1 2
1 2
1 2
1 2
DSWODVREN
*
+1.5VS
PCH_PWROK_EC
HEnable
Disable
L
DMI_CRX_PTX_N1[7]
DMI_CRX_PTX_N2[7] DMI_CRX_PTX_N3[7]
DMI_CRX_PTX_P0[7] DMI_CRX_PTX_P1[7]
DMI_CRX_PTX_P2[7] DMI_CRX_PTX_P3[7]
1 2
RH99 7.5K_0402_1%~D
PCH_RSMRST#
PBTN_OUT#
AC_PRESENT
RPH4
4 5 3 6 2 7 1 8
10K_0804_8P4R_5%
RH119 330K_0402_5%
RH122 330K_0402_5%@
D D
For deep S3, connector to EC
XDP_DBRESET#[6,8]
PM_DRAM_PWRGD[8]
PCH_RSMRST#[38]
For deep S3
PCH_SUSWARN#[38]
PBTN_OUT#[38,6]
AC_PRESENT[38]
C C
PT
+3VALW +3VALW
RH127 10K_0402_5%~D
RH130 10K_0402_5%~D
RH193 10K_0402_5%~D@
+3VALW
For deep S3
RH121 10K_0402_5%~D
B B
PCH Strap PIN
DSWVRMEN Deep S4/S5 Well On-Die Voltage Regulator Enable
If strap is sampled high, the Integrated Deep S4/S5 Well (DSW) On-Die VR mode is enabl ed
LPT_PCH_M_EDS
DMI
PCH_PWROK_EC
IMVP_VR_PG
System Power
Management
REV = 5
4
FDI
+3VS
5
1
IN1
2
IN2
3
PLT_RST#[38,40,42,6,8]
FDI_RXN_0
FDI_RXN_1
FDI_RXP_0
FDI_RXP_1
TP16
TP5
TP15
TP10
FDI_CSYNC
FDI_INT
FDI_IREF
TP17
TP13
FDI_RCOMP
DSWVRME N
DPWROK
WAKE#
CLKRUN#
SUS_STAT#/G PIO61
SUSCLK/G PIO62
SLP_S5# /GPIO63
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS #
PMSYNCH
SLP_LAN #
4 OF 11
UH3
VCC
4
OUT
GND
MC74VHC1G08DFT2G_SC70-5
12
RH155 100K_0402_5%~D
AJ35
AL35
AJ36
AL36
AV43
AY45
AV45
AW44
AL39
FDI_CSYNC
AL40
AT45
AU42
AU44
AR44
C8
DSWODVREN
L13
K3
WAKE#
AN7
PM_CLKRUN#
PT
U7
Y6
Y7
PM_SLP_S5#
C6
PM_SLP_S4#
H1
PM_SLP_S3#
F3
PM_SLP_A#
F1
AY3
H_PM_SYNC
G5
SLP_LAN#
+3VS
RH136 8.2K_0402_5%~D
RH120 10K_0402_5%~D@
SYS_PWROK
+3VS
5
UH5
P
IN1
4
O
IN2
G
SN74AHC1G08DCKR_SC70-5
3
T46 PAD~D @ T39 PAD~D @
T41 PAD~D @
T42 PAD~D @
T44 PAD~D @
1 2
1 2
1
2
FDI_CSYNC [7]
FDI_INT [7]
T37 PAD~D @ T40 PAD~D @
T38 PAD~D @
DGPU_PWR_EN[24,33,59]
PCH_PLTRST#
PM_CLKRUN# [40]
SUSCLK_R [ 38,40]
PM_SLP_SUS# [34,38]
PM_CLKRUN#
@
0.01U_0402_16V7K~D
3
+3VS
1 2
RH167 8.2K_0402_5%~D
1 2
RH164 8.2K_0402_5%~D@
+3VS
RPH2
18
PCH_GPIO52
27
ODD_DA#
36
DGPU_HOLD_RST#
45
RPH1
18 27 36 45
WL_OFF#
PCI_PIRQA# PCI_PIRQB# PCI_PIRQD# PCI_PIRQC#
8.2K_0804_8P4R_5%
+3VS
8.2K_0804_8P4R_5%
For deep S3
POK [52,54]
PM_SLP_S5# [38]
PM_SLP_S4# [38,55]
PM_SLP_S3# [34,38,40,43,55,56]
For deep S3
H_PM_SYNC [8]
+3VS
@
10K_0402_5%~D
1 2
13
D
1
CH99
@
S
2
2N7002_SOT23-3
1 2
RH416 0_0402_5%@
PCH_GPIO5
DGPU_PWR_EN#
PT
1 2
1 2
*
RH243 1K_0402_5%~D@
eDP_PWM
ENBKL
eDP_LVDDEN
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
DGPU_HOLD_RST#
PCH_GPIO52
DGPU_PWR_EN#
BBS_BIT1
EN_CAM
WL_OFF#
HEnable LDefault
1 2
eDP_PWM[35]
ENBKL[35,38]
eDP_LVDDEN[35]
BBS_BIT1[16]
T8PAD~D@
WL_OFF#[40]
RH138 100K_0402_5%~D
RH132 100K_0402_5%~D
GNT3# A16 Top-Block Swap Override (Internal PU 20K)
PT
RH247
2
DGPU_PWR_EN#
G
QH6
PLTRST_VGA#[24]
ST
T45
U44
V45
M43
M45
N42
N44
U40
U39
N36
K36
G36
H20
L20
K17
M20
A12
B13
C12
C10
A10
AL6
ENBKL
eDP_LVDDEN
2
U7E
VGA_BLU E
VGA_GRE EN
VGA_RED
VGA_DDC_ CLK
VGA_DDC_ DATA
VGA_HSYNC
VGA_VSYN C
DAC_IREF
VGA_IRTN
EDP_BKL TCTL
EDP_BKL TEN
EDP_VDDE N
PIRQA#
PIRQB#
PIRQC#
PIRQD#
GPIO50
GPIO52
GPIO54
GPIO51
GPIO53
GPIO55
LYN
XPOINT_BGA695
@
WL_OFF#
LPT_PCH_M_EV
4
12
RH154 100K_0402_5%~D
REV = 5
LVDSCRT
PCI
PCH Strap PIN
+3VS_DELAY
5
UH4
1
P
IN1
O
2
IN2
G
SN74AHC1G08DCKR_SC70-5
3
DISPLAY
DDPB_CTRLCL K
DDPB_CTRLDA TA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPB_AUX N
DDPC_AUXN
DDPD_AUXN
DDPB_AUX P
DDPC_AUXP
DDPD_AUXP
DDPB_HPD
DDPC_HPD
DDPD_HPD
PIRQE#/G PIO2
PIRQF#/GP IO3
PIRQG#/G PIO4
PIRQH#/GP IO5
PME#
PLTRST#
5 OF 11
HDMI_DDB_CTRLCLK HDMI_DDB_CTRLDATA mDP_DDC_CTRLCLK mDP_DDC_CTRLDATA
R40
R39
R35
R36
N40
N38
H45
K43
J42
H43
K45
J44
K40
K38
H39
G17
F17
L15
M15
AD10
Y11
HDMI_DDB_CTRLCLK
HDMI_DDB_CTRLDATA
mDP_DDC_CTRLCLK
mDP_DDC_CTRLDATA
P
T
mDP_AUXN_PCH
mDP_AUXP_PCH
HDMI_PCH_HPD
DP_PCH_HPD
FFS_INT1
ODD_DA#
CAB_DET_SINK
PCH_GPIO5
T6 PAD~D @
PCH_PLTRST#
RPH16
1 8 2 7 3 6 4 5
2.2K_8P4R_5%
1
PCH_PLTRST#
DGPU_HOLD_RST#
HDMI_DDB_CTRLCLK [36]
HDMI_DDB_CTRLDATA [36]
mDP_DDC_CTRLCLK [37]
mDP_DDC_CTRLDATA [37]
mDP_AUXN_PCH [37]
mDP_AUXP_PCH [37]
HDMI_PCH_HPD [36]
DP_PCH_HPD [16,37]
FFS_INT1 [ 43]
CAB_DET_SINK [37]
+3VS
PT
PT
PT
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (3/8) DMI,FDI,PM,GFX,DP
PCH (3/8) DMI,FDI,PM,GFX,DP
PCH (3/8) DMI,FDI,PM,GFX,DP
LA-9941P
1
18 62Tuesday, September 03, 2013
18 62Tuesday, September 03, 2013
18 62Tuesday, September 03, 2013
0.1
0.1
0.1
Page 19
5
4
3
2
1
LPT_PCH_M_EDS
REV = 5
PCIe
USB
9 OF 11
USB2N0
USB2P0
USB2N1
USB2P1
USB2N2
USB2P2
USB2N3
USB2P3
USB2N4
USB2P4
USB2N5
USB2P5
USB2N6
USB2P6
USB2N7
USB2P7
USB2N8
USB2P8
USB2N9
USB2P9 USB2N10 USB2P10 USB2N11 USB2P11 USB2N12 USB2P12 USB2N13 USB2P13
USB3RN1 USB3RP1 USB3TN1
USB3TP1
USB3RN2 USB3RP2 USB3TN2
USB3TP2
USB3RN5 USB3RP5 USB3TN5
USB3TP5
USB3RN6 USB3RP6 USB3TN6
USB3TP6
USBRBIAS#
USBRBIAS
TP24 TP23
OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43
OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14
B37 D37 A38 C38 A36 C36 A34 C34 B33 D33 F31 G31 K31 L31 G29 H29 A32 C32 A30 C30 B29 D29 A28 C28 G26 F26 F24 G24
AR26 AP26 BE24 BD23 AW26 AV26 BD25 BC24 AW29 AV29 BE26 BC26 AR29 AP29 BD27 BE28
K24 K26
M33 L33
P3 V1 U2 P1 M3 T1 N2 M1
USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3 USB20_N4 USB20_P4
USB20_N9 USB20_P9
USB20_N12 USB20_P12
USB3RN1 USB3RP1 USB3TN1 USB3TP1 USB3RN2 USB3RP2 USB3TN2 USB3TP2 USB3RN3 USB3RP3 USB3TN3 USB3TP3 USB3RN4 USB3RP4 USB3TN4 USB3TP4
USBRBIAS
USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7#
USB20_N0 [44] USB20_P0 [44] USB20_N1 [44] USB20_P1 [44] USB20_N2 [40] USB20_P2 [40] USB20_N3 [40] USB20_P3 [40] USB20_N4 [40] USB20_P4 [40]
USB20_N9 [35] USB20_P9 [35]
USB20_N12 [40] USB20_P12 [40]
USB3RN1 [45] USB3RP1 [45] USB3TN1 [45] USB3TP1 [45] USB3RN2 [45] USB3RP2 [45] USB3TN2 [45] USB3TP2 [45] USB3RN3 [40] USB3RP3 [40] USB3TN3 [40] USB3TP3 [40] USB3RN4 [40] USB3RP4 [40] USB3TN4 [40] USB3TP4 [40]
1 2
RH143 22.6_0402_1%
USB_OC0# [44] USB_OC1# [40]
USB Conn 1 (Power share)
USB Conn 3 (Power share)
USB Conn 2 (Power share)
USB Conn 4 (Power share)
Mini Card(WLAN)
Touch Screen
PEG_B_CLKREQ#[17]
Camera
USB Conn 1 (Power share)
USB Conn 3 (Power share)
USB Conn 2 (Power share)
USBRBIAS CAD NOTE: Route single-end 50-ohms and max 500-mils length. Avoid routing next to clock pins or under stitching capacitors. Recommended minimum spacing to other signal traces is 15 mils.
+3V_PCH
PT
RPH29
USB_OC4# USB_OC7# USB_OC6# USB_OC0#
USB_OC3# USB_OC2# USB_OC5# PEG_B_CLKREQ#
4 5 3 6 2 7 1 8
10K_0804_8P4R_5%
RPH30
4 5 3 6 2 7 1 8
10K_0804_8P4R_5%
+3V_PCH
D D
PCIE_PRX_WLANTX_ N3[40]
MiniWLAN (Mini Card 1)--->
CARD_READER --->
C C
B B
PCIE_PRX_WLANTX_ P3[40]
PCIE_PTX_WLANRX_ N3[40] PCIE_PTX_WLANRX_ P3[40]
PCIE_PRX_CARDTX_N4[40] PCIE_PRX_CARDTX_P4[40]
PCIE_PTX_CARDRX_N4[40] PCIE_PTX_CARDRX_P4[40]
1 2
CH19 0.1U_0402_10V7K~D
1 2
CH20 0.1U_0402_10V7K~D
1 2
CH21 0.1U_0402_10V7K~D
1 2
CH22 0.1U_0402_10V7K~D
+1.5VS
+1.5VS
1 2
RH113 7.5K_0402_1%~D
PCIE_PRX_WLANTX_ N3 PCIE_PRX_WLANTX_ P3
PCIE_PTX_WLANRX_ N3_C PCIE_PTX_WLANRX_ P3_C
PCIE_PRX_CARDTX_N4 PCIE_PRX_CARDTX_P4
PCIE_PTX_CARDRX_N4_C PCIE_PTX_CARDRX_P4_C
PCIE_RCOMP
AW31
AY31
BE32 BC32
AT31 AR31
BD33 BB33
AW33
AY33
BE34 BC34
AT33 AR33
BE36 BC36
AW36
AV36
BD37 BB37
AY38
AW38
BC38 BE38
AT40 AT39
BE40 BC40
AN38 AN39
BD42 BD41
BE30
BC30
BB29
BD29
U7I
PERN1/USB3RN3 PERP1/USB3RP3
PETN1/USB3TN3 PETP1/USB3TP3
PERN2/USB3RN4 PERP2/USB3RP4
PETN2/USB3TN4 PETP2/USB3TP4
PERN_3 PERP_3
PETN_3 PETP_3
PERN_4 PERP_4
PETN_4 PETP_4
PERN_5 PERP_5
PETN_5 PETP_5
PERN_6 PERP_6
PETN_6 PETP_6
PERN_7 PERP_7
PETN_7 PETP_7
PERN_8 PERP_8
PETN_8 PETP_8
PCIE_IREF
TP11
TP6
PCIE_RCOMP
LYN
XPOINT_BGA695
@
USB_OC1#
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1 2
RH84 10K_0402_5%~D
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PCH (4/8) PCI, USB
PCH (4/8) PCI, USB
PCH (4/8) PCI, USB
LA-9941P
+3V_PCH
0.1
0.1
19 62Tuesday, September 03, 2013
19 62Tuesday, September 03, 2013
1
19 62Tuesday, September 03, 2013
0.1
Page 20
5
4
3
2
1
+VCCP
RU45 1K_0402_1%~D@
GATEA20 [38]
H_THERMTRIP# [8]
1 2
KB_RST#
RH175 10K_0402_5%~D
H_THERMTRIP#_C
+3VS
1 2
XPOINT_BGA695
LPT_PCH_M_EDS
REV = 5
GPIO
NCTF
CPU/Misc
PROCPWRGD
PLTRST_PROC#
6 OF 11
TP14
PECI
RCIN#
THRMTRIP#
VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AN10
AY1
AT6
AV3
AV1
AU4
N10
A2 A41 A43 A44 B1 B2 B44 B45 BA1 BC1 BD1 BD2 BD44 BD45 BE2 BE3 D1 E1 E45 A4
GATEA20
KB_RST#
H_CPUPWRGD
H_THERMTRIP#_C
CPU_PLTRST#
1 2
RH159 10K_0402_5%~D
KB_RST# [38]
H_CPUPWRGD [6,8]
1 2
RH162 390_0402_5%
CPU_PLTRST# [8]
+3VS
U7F
AT8
BMBUSY#/GPIO0
F13
TACH1/GPIO1
A14
TACH2/GPIO6
G15
TACH3/GPIO7
Y1
GPIO8
K13
LAN_PHY_PWR_CTRL/GPIO12
AB11
GPIO15
AN2
SATA4GP/GPIO16
C14
TACH0/GPIO17
BB4
SCLOCK/GPIO22
Y10
GPIO24
R11
GPIO27
AD11
GPIO28
AN6
GPIO34
AP1
GPIO35/NMI#
AT3
SATA2GP/GPIO36
AK1
SATA3GP/GPIO37
AT7
SLOAD/GPIO38
AM3
SDATAOUT0/GPIO39
AN4
SDATAOUT1/GPIO48
AK3
SATA5GP/GPIO49
U12
GPIO57
C16
TACH4/GPIO68
D13
TACH5/GPIO69
G13
TACH6/GPIO70
H15
TACH7/GPIO71
BE41
VSS
BE5
VSS
C45
VSS
A5
VSS
LYN
@
EC_SMI# PCH_GPIO12 HDD_DETECT# PCH_GPIO24
PT
PT
EC_RUNTIME_SCI#[38]
EC_SMI#[38]
For deep S3, PCH_GPIO27 connect from EC PCH_WAKE#
DGPU_PWROK[33,59]
WAKE_PCH#[38]
BT_RADIO_DIS#[40]
LCD_DBC[35]
LCD_DCR[35]
FFS_INT2[43]
HDD_DETECT#[43]
KB_BL_DET[39]
PCH_GPIO0
PCH_GPIO1
PCH_GPIO6
EC_RUNTIME_SCI#
EC_SMI#
PCH_GPIO12
PCH_GPIO15
PCH_GPIO16
DGPU_PWROK
ODD_DETECT#
PCH_GPIO24
WAKE_PCH#
PCH_GPIO28
BT_RADIO_DIS#
LCD_DBC
PCH_GPIO36
PCH_GPIO37
PCIE_MCARD1_DET#
LCD_DCR
FFS_INT2
PCH_GPIO49
HDD_DETECT#
ODD_EN#
KB_BL_DET
PCH_GPIO70
USB_MCARD1_DET#
+3V_PCH
+3VALW
+3V_PCH
D D
+3VS
PT
4 5 3 6 2 7 1 8
10K_0804_8P4R_5%
+3VS
4 5 3 6 2 7 1 8
10K_0804_8P4R_5%
+3VS
1 2
RH174 8.2K_0402_5%~D
1 2
RH171 200K_0402_5%
1 2
RH177 10K_0402_5%~D
1 2
RH178 1K_0402_5%~D@
+3V_PCH
C C
RH158 1K_0402_5%~D@
4 5 3 6 2 7 1 8
10K_0804_8P4R_5%
RPH8
RPH9
1 2
RPH7
PCH_GPIO0 DGPU_PWROK PCH_GPIO6
PCIE_MCARD1_DET#
EC_RUNTIME_SCI#
ODD_EN# LCD_DBC LCD_DCR
BT_RADIO_DIS# ODD_DETECT#
USB_MCARD1_DET#
LCD_DBC
for ST test
PCH_GPIO15
PT
PCH Strap PIN
GPIO37 TLS Confidentiality
Low - Intel ME C rypto Transport Layer Security (TLS) cipher suite wit h no confidenti ality High - Intel ME Crypto Transpor t Layer Security (TLS) cipher suite wit h confidentiali ty
*
1 2
RH169 10K_0402_5%~D
PCH_GPIO37
B B
GPIO28 On-Die PLL Voltage Regulator
This signal has a weak internal pull up
HOn-Die voltage r egulator enable
*
LOn-Die PLL Volta ge Regulator di sable
1 2
RH165 1K_0402_5%~D@
PCH_GPIO28
+3VS
+3VS
1 2
RH188 10K_0402_5%~D@
1 2
RH176 10K_0402_5%~D
1 2
RH191 10K_0402_5%~D@
1 2
RH180 10K_0402_5%~D
config GPIO16,GPIO49
X4,PCIEX8,SATAX6
USB
SATA2GP/GPIO36 Reserved
When Unused as G PIO or SATA*GP ­Use 8.2K-10K pul l-down to groun d
1 2
RH194 10K_0402_5%~D@
A A
+3VALW
1 2
RH173 10K_0402_5%~D
1 2
RH170 10K_0402_5%~D@
5
PCH_GPIO36
WAKE_PCH#
*
USB X6,PCIEX8,SATAX4
4
PCH_GPIO49
PCH_GPIO16
11
+3VS
12
12
RH168
N14@
10K_0402_5%~D
PCH_GPIO1
RH172
N15@
10K_0402_5%~D
DGPU Board ID Optional
PCH_GPIO1
1 = N14P-GT
N14P
0 = N15P
+3VS
RH163 10K_0402_5%~D
PCH_GPIO70
DIS
01
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Date: Sheet
Date: Sheet of
2
Date: Sheet of
1 2
PCH_GPIO70
1
0UMA
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Compal Electronics, Inc.
PCH (5/8) GPIO, CPU, MISC
PCH (5/8) GPIO, CPU, MISC
PCH (5/8) GPIO, CPU, MISC
LA-9941P
1
20 62Tuesday, September 03, 2013
20 62Tuesday, September 03, 2013
20 62Tuesday, September 03, 2013
of
0.1
0.1
0.1
Page 21
5
D D
4
3
2
1
LPT_PCH_M_EDS
Core
PCIe/DMI
VCCMPHY
REV = 5
CRT DAC
FDI
HVCMOS
USB3
SATA
7 OF 11
VCCADAC1_5
VCCADACBG3_3
VCCVRM
VCCIO
VCCIO
VCC3_3_R30 VCC3_3_R32
DCPSUS1
VCCSUS3_3 VCCSUS3_3
DCPSUS3 DCPSUS3
VCCIO VCCVRM VCCVRM
VCCVRM
VCCIO
VCCVRM
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VSS
P45
P43
M31
BB44
AN34
AN35
R30 R32
Y12
AJ30 AJ32
AJ26 AJ28 AK20 AK26 AK28
BE22
AK18
AN11
AK22
AM18 AM20 AM22 AP22 AR22 AT22
+VCCAFDI_VRM
+1.05VM_VCCSUS1
+3V_PCH
+PCH_USB_DCPSUS3
+VCCP
+VCCP
+VCCAFDI_VRM
0.098A
+1.05VM_VCCSUS1
+PCH_USB_DCPSUS3
1
2
+VCCAFDI_VRM
+VCCAFDI_VRM
1U_0402_6.3V6K~D
1
1
CH95
2
2
0.476A
10U_0603_6.3V6M~D
1
2
+3VS
CH33
0.1U_0402_10V7K~D
+VCCAFDI_VRM
1
CH68
@
10U_0805_10V6M~D
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH72
CH78
2
1
2
1U_0402_6.3V6K~D
@
@
1
CH62
CH63
2
1U_0402_6.3V6K~D
1
CH46
2
+VCCAFDI_VRM
1
2
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1
1
CH76
2
2
CH94
@
1U_0402_6.3V6K~D
+VCCAFDI_VRM
1
@
10U_0805_10V6M~D
+VCCP
2
+VCCAFDI_VRM
1
@
10U_0805_10V6M~D
2
CH67
@
10U_0805_10V6M~D
JP5
@
2
JUMP_43X118
CH75
1 2
1 2
CH60
CH66
112
RH2010_0603_5%~D @
1 2
R56 0_0805_5%@
RH2200_0603_5%~D @
0.179A
3.629A
+VCCP
+VCCP
+VCCP
ST
+1.5VS
AA24 AA26 AD20 AD22 AD24 AD26 AD28 AE18 AE20 AE22 AE24 AE26 AG18 AG20 AG22 AG24
AA18
Y26
U14
U18 U20 U22 U24 V18 V20 V22 V24 Y18 Y20 Y22
U7G
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
DCPSUSBYP VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW
LYN
XPOINT_BGA695
@
+VCCP
@
JP2
12
+1.05VS_VCCCORE
10U_0805_10V6M~D
1U_0402_6.3V6K~D
@
JP19
12
PAD-OPEN 43x39
1
CH35
CH36
1
2
2
1
2
RH37 5.11_0402_1%~D
1U_0402_6.3V6K~D
+PCH_VCCDSW_R
1
CH56
2
PAD-OPEN 43x39
+VCCP +1.05VM_VCCASW
C C
B B
1
2
22U_0805_6.3V6M~D
CH65
1 2
1U_0402_6.3V6K~D
1
2
CH37
1U_0402_6.3V6K~D
CH69
1.29A
1U_0402_6.3V6K~D
CH38
1
2
+PCH_VCCDSW
1U_0402_6.3V6K~D
CH70
1
2
+PCH_VCCDSW
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
5
4
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PCH (6/8) PWR
PCH (6/8) PWR
PCH (6/8) PWR
LA-9941P
1
21 62T uesday, September 03, 2013
21 62T uesday, September 03, 2013
21 62T uesday, September 03, 2013
of
of
of
0.1
0.1
0.1
Page 22
5
+3V_PCH
D D
C C
B B
1
CH61
0.1U_0402_10V7K~D
2
+VCCP
1
CH84
0.1U_0402_10V7K~D
2
+VCCP
@
JP6
12
PAD-OPEN 43x39
+3VS
1
2
+VCCP
1 2
4.7UH_LQM18FN4R7M00D_20%~D
CH100
0.1U_0402_10V7K~D
RH219 0_0603_5%~D@
LH100
+VCCP
1
CH82
1U_0402_6.3V6K~D
2
1 2
0.261A
JP7
+VCCAFDI_VRM
1
2
@
CH81
10U_0805_10V6M~D
1
2
PAD-OPEN 43x39
12
+PCH_VCCCLK3_3
0.
+PCH_VCCCLK
0.306A
0.028A
+1.05VM_VCCSUS2
CH86
@
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
CH102
1
2
4
+PCH_VCCCLK
055A
+PCH_VCC
1U_0402_6.3V6K~D
CH101
1
2
+1.05VM_VCCSUS2
+PCH_VCC
AF34
AP45
AD34
AA30 AA32
AD35
AG30 AG32
AD36
AE30 AE32
R24 R26 R28 U26
M24
U35
L24
U30 V28 V30 Y30
Y35
Y32
M29
L29
L26
M26
U32 V32
U7H
VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3
VSS
VCCUSBPLL
VCC3_3
VCCIO VCCIO VCCIO VCCIO
DCPSUS2
VCCVRM
VCC
VCCCLK
VCCCLK3_3
VCCCLK3_3
VCCCLK3_3 VCCCLK3_3
VCCCLK3_3 VCCCLK3_3
VCCCLK
VCCCLK VCCCLK
VCCCLK
VCCCLK VCCCLK
VCCCLK
VCCCLK VCCCLK
LYN
XPOINT_BGA695
@
LPT_PCH_M_EDS
USB
ICC
REV = 5
GPIO/LPC
RTC
Fuse
Thermal
3
+3V_PCH
1
CH64
0.1U_0603_25V7K~D
R20
VCCSUS3_3
R22
VCCSUS3_3
A16
VCCDSW3_3
AA14
DCPSST
AE14
VCC3_3
AF12
VCC3_3
AG14
VCC3_3
U36
Azalia
CPU
SPI
8 OF 11
VCCIO
VCCSUSHDA
VCCSUS3_3
VCCRTC
DCPRTC DCPRTC
V_PROC_IO V_PROC_IO
VCCSPI
VCC VCC
VCCASW
VCCASW
VCCVRM
VCC3_3
VCC3_3
A26
K8
A6
P14 P16
AJ12 AJ14
AD12
P18 P20
L17
R18
AW40
AK30
AK32
2
1 2
+VCCSST
CH85 0.1U_0402_10V7K~D
+VCCRTCEXT
0.004A
+PCH_VPROC
+3V_VCCPSPI
+PCH_VCCCFUSE
+PCH_VCCASW
+VCCP
@
JP18
PAD-OPEN 43x39
+3VS
1
CH79
0.1U_0402_10V7K~D
2
0.67A
12
0.133A
1
CH98
0.1U_0402_10V7K~D
2
+1.5VS
+PCH_VPROC
For deep S3
1
2
1
2
0.022A
+VCCP
+PCH_VCCCFUSE
2
CH55
0.1U_0402_10V7K~D
CH90
0.1U_0402_10V7K~D
JP17
@
PAD-OPEN 43x39
1
CH54 1U_0402_6.3V6K~D
2
1
CH88
0.1U_0402_10V7K~D
2
1
CH77
1U_0402_6.3V6K~D
2
1
2
12
ST
R54 0_0805_5%@
R55 0_0805_5%~D@
0.015A
+3VALW
CH91
0.1U_0402_10V7K~D
+3V_PCH
1
CH89
0.1U_0402_10V7K~D
2
1 2
1 2
0.01A
+RTCVCC
+3VALW
1
CH71
1U_0402_6.3V6K~D
2
1
CH92
1U_0402_6.3V6K~D
2
ST
1 2
R53 0_0805_5%@
1
CH87
4.7U_0603_6.3V6K~D
2
+3VS
+VCCP
+3V_PCH
1
2
+3VS
1
CH73
0.1U_0402_10V7K~D
2
CH93
0.1U_0402_10V7K~D
+VCCIO2PCH
1
Place near pin AP45
+VCCP
1 2
RH202 0_0805_5%@
ST
+3VS
1 2
RH213 0_0805_5%@
T
A A
S
+PCH_VCCCLK
1U_0402_6.3V6K~D
CH103
1
2
1U_0402_6.3V6K~D
CH110
1
2
1U_0402_6.3V6K~D
CH106
1
2
Place near pin Y32,AA30,AA32 Place near pin AD34 Place near pin AD35,AD36
+PCH_VCCCLK3_3
1U_0402_6.3V6K~D
CH104
1
2
1U_0402_6.3V6K~D
CH108
1
2
1U_0402_6.3V6K~D
CH107
1
2
1U_0402_6.3V6K~D
CH105
1
1
2
2
Place near pin AG30,AG32,AE30,AE32
1U_0402_6.3V6K~D
CH109
1
2
15P_0402_50V8J~D
1
2
1U_0402_6.3V6K~D
CH111
CH24
15P_0402_50V8J~D
CH30
1
2
Place near pin M29 Place near pin L29 Place near pin L26,M26 Place near pin U32,V32
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
5
4
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PCH (7/8) PWR
PCH (7/8) PWR
PCH (7/8) PWR
LA-9941P
1
22 62T uesday, September 03, 2013
22 62T uesday, September 03, 2013
22 62T uesday, September 03, 2013
of
of
of
0.1
0.1
0.1
Page 23
5
D D
LPT_PCH_M_EDS
U7J
AL34
VSS
AL38
VSS
AL8
VSS
AM14
VSS
AM24
VSS
AM26
VSS
AM28
VSS
AM30
VSS
AM32
VSS
AM16
VSS
AN36
VSS
AN40
VSS
AN42
VSS
AN8
VSS
AP13
VSS
AP24
VSS
AP31
VSS
AP43
VSS
AR2
VSS
AK16
VSS
AT10
VSS
AT15
VSS
AT17
C C
B B
AT20 AT26 AT29 AT36 AT38
AV13 AV22 AV24 AV31 AV33 BB25 AV40
AV6
AW2
AY10 AY15 AY20 AY26 AY29
VSS VSS VSS VSS VSS VSS
D42
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
F43
VSS VSS VSS VSS VSS VSS
AY7
VSS
B11
VSS
B15
VSS
@
LYNXPOINT_BGA695
REV = 5
4
K39
VSS
L2
VSS
L44
VSS
M17
VSS
M22
VSS
N12
VSS
N35
VSS
N39
VSS
N6
VSS
P22
VSS
P24
VSS
P26
VSS
P28
VSS
P30
VSS
P32
VSS
R12
VSS
R14
VSS
R16
VSS
R2
VSS
R34
VSS
R38
VSS
R44
VSS
R8
VSS
T43
VSS
U10
VSS
U16
VSS
U28
VSS
U34
VSS
U38
VSS
U42
VSS
U6
VSS
V14
VSS
V16
VSS
V26
VSS
V43
VSS
W2
VSS
W44
VSS
Y14
VSS
Y16
VSS
Y24
VSS
Y28
VSS
Y34
VSS
Y36
VSS
Y40
VSS
Y8
VSS
10 OF 11
3
LPT_PCH_M_EDS
U7K
AA16 AA20 AA22 AA28
AB12 AB34 AB38
AC44 AD14 AD16 AD18 AD30 AD32 AD40
AE16 AE28
AF38
AG16
AG26 AG28 AG44
AJ16 AJ18 AJ20 AJ22 AJ24 AJ34 AJ38
AK14 AK24 AK43 AK45
AL12
BC22 BB42
AA4
AB8 AC2
AD6 AD8
AF8
AG2
AL2
AJ6 AJ8
@
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
LYNXPOINT_BGA695
REV = 5
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
11 OF 11
B19 B23 B27 B31 B35 B39 B7 BA40 BD11 BD15 BD19 AY36 AT43 BD31 BD35 BD39 BD7 D25 AV7 F15 F20 F29 F33 BC16 D4 G2 G38 G44 G8 H10 H13 H17 H22 H24 H26 H31 H36 H40 H7 K10 K15 K20 K29 K33 BC28
2
1
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PCH (8/8) VSS
PCH (8/8) VSS
PCH (8/8) VSS
LA-9941P
1
0.1
0.1
23 62Tuesday, September 03, 2013
23 62Tuesday, September 03, 2013
23 62Tuesday, September 03, 2013
0.1
Page 24
5
PEG_GTX_HRX_P0 PEG_GTX_HRX_N0
PEG_GTX_HRX_P1 PEG_GTX_HRX_N1
PEG_GTX_HRX_P2 PEG_GTX_HRX_N2
PEG_GTX_HRX_P3 PEG_GTX_HRX_N3
PEG_GTX_HRX_P4 PEG_GTX_HRX_N4
PEG_GTX_HRX_P5 PEG_GTX_HRX_N5
PEG_GTX_HRX_P6 PEG_GTX_HRX_N6
PEG_GTX_HRX_P7 PEG_GTX_HRX_N7
PEG_GTX_HRX_P8 PEG_GTX_HRX_N8
PEG_GTX_HRX_P9 PEG_GTX_HRX_N9
PEG_GTX_HRX_P10 PEG_GTX_HRX_N10
PEG_GTX_HRX_P11 PEG_GTX_HRX_N11
PEG_GTX_HRX_P12 PEG_GTX_HRX_N12
PEG_GTX_HRX_P13 PEG_GTX_HRX_N13
PEG_GTX_HRX_P14 PEG_GTX_HRX_N14
PEG_GTX_HRX_P15 PEG_GTX_HRX_N15
RV289
10K_0402_5%~D
1 2 2
G
S
PEG_HTX_C_GRX_P[0..15]
PEG_HTX_C_GRX_N[0..15]
PEG_GTX_C_HRX_P[0..15]
PEG_GTX_C_HRX_N[0..15]
1 2
RV286 200_0402_1%@
CLK_REQ#
PEG_HTX_C_GRX_P[0..15][7]
PEG_HTX_C_GRX_N[0..15][7]
PEG_GTX_C_HRX_P[0..15][7]
PEG_GTX_C_HRX_N[0..15][7]
D D
PEG_GTX_C_HRX_P0 PEG_GTX_C_HRX_N0
PEG_GTX_C_HRX_P1 PEG_GTX_C_HRX_N1
PEG_GTX_C_HRX_P2 PEG_GTX_C_HRX_N2
PEG_GTX_C_HRX_P3 PEG_GTX_C_HRX_N3
PEG_GTX_C_HRX_P4 PEG_GTX_C_HRX_N4
PEG_GTX_C_HRX_P5 PEG_GTX_C_HRX_N5
PEG_GTX_C_HRX_P6 PEG_GTX_C_HRX_N6
PEG_GTX_C_HRX_P7 PEG_GTX_C_HRX_N7
PEG_GTX_C_HRX_P8 PEG_GTX_C_HRX_N8
PEG_GTX_C_HRX_P9 PEG_GTX_C_HRX_N9
C C
PEG_GTX_C_HRX_P10 PEG_GTX_C_HRX_N10
PEG_GTX_C_HRX_P11 PEG_GTX_C_HRX_N11
PEG_GTX_C_HRX_P12 PEG_GTX_C_HRX_N12
PEG_GTX_C_HRX_P13 PEG_GTX_C_HRX_N13
PEG_GTX_C_HRX_P14 PEG_GTX_C_HRX_N14
PEG_GTX_C_HRX_P15 PEG_GTX_C_HRX_N15
B B
CV531 0.22U_0402_16V7K~D CV532 0.22U_0402_16V7K~D
CV533 0.22U_0402_16V 7K~D CV534 0.22U_0402_16V7K~D
CV535 0.22U_0402_16V 7K~D CV536 0.22U_0402_16V7K~D
CV537 0.22U_0402_16V 7K~D CV538 0.22U_0402_16V7K~D
CV539 0.22U_0402_16V 7K~D CV540 0.22U_0402_16V7K~D
CV541 0.22U_0402_16V 7K~D CV542 0.22U_0402_16V7K~D
CV543 0.22U_0402_16V 7K~D CV544 0.22U_0402_16V7K~D
CV545 0.22U_0402_16V 7K~D CV546 0.22U_0402_16V7K~D
CV547 0.22U_0402_16V 7K~D CV548 0.22U_0402_16V7K~D
CV550 0.22U_0402_16V 7K~D CV551 0.22U_0402_16V7K~D
CV552 0.22U_0402_16V 7K~D CV557 0.22U_0402_16V7K~D
CV558 0.22U_0402_16V 7K~D CV559 0.22U_0402_16V7K~D
CV560 0.22U_0402_16V 7K~D CV561 0.22U_0402_16V7K~D
CV562 0.22U_0402_16V 7K~D CV563 0.22U_0402_16V7K~D
CV564 0.22U_0402_16V 7K~D CV565 0.22U_0402_16V7K~D
CV566 0.22U_0402_16V 7K~D CV567 0.22U_0402_16V7K~D
DGPU_PWR_EN[18,33,59]
PEG_A_CLKRQ#[17]
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
1 3
D
QV39
2N7002_SOT23-3
4
PEG_HTX_C_GRX_P0 PEG_HTX_C_GRX_N0 PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_N1 PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_P3 PEG_HTX_C_GRX_N3 PEG_HTX_C_GRX_P4 PEG_HTX_C_GRX_N4 PEG_HTX_C_GRX_P5 PEG_HTX_C_GRX_N5 PEG_HTX_C_GRX_P6 PEG_HTX_C_GRX_N6 PEG_HTX_C_GRX_P7 PEG_HTX_C_GRX_N7 PEG_HTX_C_GRX_P8 PEG_HTX_C_GRX_N8 PEG_HTX_C_GRX_P9 PEG_HTX_C_GRX_N9 PEG_HTX_C_GRX_P10 PEG_HTX_C_GRX_N10 PEG_HTX_C_GRX_P11 PEG_HTX_C_GRX_N11 PEG_HTX_C_GRX_P12 PEG_HTX_C_GRX_N12 PEG_HTX_C_GRX_P13 PEG_HTX_C_GRX_N13 PEG_HTX_C_GRX_P14 PEG_HTX_C_GRX_N14 PEG_HTX_C_GRX_P15 PEG_HTX_C_GRX_N15
PEG_GTX_HRX_P0 PEG_GTX_HRX_N0 PEG_GTX_HRX_P1 PEG_GTX_HRX_N1 PEG_GTX_HRX_P2 PEG_GTX_HRX_N2 PEG_GTX_HRX_P3 PEG_GTX_HRX_N3 PEG_GTX_HRX_P4 PEG_GTX_HRX_N4 PEG_GTX_HRX_P5 PEG_GTX_HRX_N5 PEG_GTX_HRX_P6 PEG_GTX_HRX_N6 PEG_GTX_HRX_P7 PEG_GTX_HRX_N7 PEG_GTX_HRX_P8 PEG_GTX_HRX_N8 PEG_GTX_HRX_P9 PEG_GTX_HRX_N9 PEG_GTX_HRX_P10 PEG_GTX_HRX_N10 PEG_GTX_HRX_P11 PEG_GTX_HRX_N11 PEG_GTX_HRX_P12 PEG_GTX_HRX_N12 PEG_GTX_HRX_P13 PEG_GTX_HRX_N13 PEG_GTX_HRX_P14 PEG_GTX_HRX_N14 PEG_GTX_HRX_P15 PEG_GTX_HRX_N15
CLK_PEG_VGA[17] CLK_PEG_VGA#[17]
PLTRST_VGA#[18]
CLK_REQ#
PEX_TSTCLK_OUT PEX_TSTCLK_OUT#
PLTRST_VGA#
12
RV290
2.49K_0402_1%~D
UV1A
AN12
PEX_RX0
AM12
PEX_RX0_N
AN14
PEX_RX1
AM14
PEX_RX1_N
AP14
PEX_RX2
AP15
PEX_RX2_N
AN15
PEX_RX3
AM15
PEX_RX3_N
AN17
PEX_RX4
AM17
PEX_RX4_N
AP17
PEX_RX5
AP18
PEX_RX5_N
AN18
PEX_RX6
AM18
PEX_RX6_N
AN20
PEX_RX7
AM20
PEX_RX7_N
AP20
PEX_RX8
AP21
PEX_RX8_N
AN21
PEX_RX9
AM21
PEX_RX9_N
AN23
PEX_RX10
AM23
PEX_RX10_N
AP23
PEX_RX11
AP24
PEX_RX11_N
AN24
PEX_RX12
AM24
PEX_RX12_N
AN26
PEX_RX13
AM26
PEX_RX13_N
AP26
PEX_RX14
AP27
PEX_RX14_N
AN27
PEX_RX15
AM27
PEX_RX15_N
AK14
PEX_TX0
AJ14
PEX_TX0_N
AH14
PEX_TX1
AG14
PEX_TX1_N
AK15
PEX_TX2
AJ15
PEX_TX2_N
AL16
PEX_TX3
AK16
PEX_TX3_N
AK17
PEX_TX4
AJ17
PEX_TX4_N
AH17
PEX_TX5
AG17
PEX_TX5_N
AK18
PEX_TX6
AJ18
PEX_TX6_N
AL19
PEX_TX7
AK19
PEX_TX7_N
AK20
PEX_TX8
AJ20
PEX_TX8_N
AH20
PEX_TX9
AG20
PEX_TX9_N
AK21
PEX_TX10
AJ21
PEX_TX10_N
AL22
PEX_TX11
AK22
PEX_TX11_N
AK23
PEX_TX12
AJ23
PEX_TX12_N
AH23
PEX_TX13
AG23
PEX_TX13_N
AK24
PEX_TX14
AJ24
PEX_TX14_N
AL25
PEX_TX15
AK25
PEX_TX15_N
AL13
PEX_REFCLK
AK13
PEX_REFCLK_N
AK12
PEX_CLKREQ_N
AJ26
PEX_TSTCLK_OUT
AK26
PEX_TSTCLK_OUT_N
AJ12
PEX_RST_N
AP29
PEX_TERMP
Part 1 of 7
N14P-GT-A2@
PCI EXPRESS
PEX_WAKE_N
DACA_GREEN
DACA_HSYNC DACA_VSYNC
DACsI2C GPIO
CLK
XTAL_OUTBUFF
3
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8
GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21
DACA_RED
DACA_BLUE
DACA_VDD DACA_VREF DACA_RSET
I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA
I2CC_SCL I2CC_SDA
I2CS_SCL
I2CS_SDA
PLLVDD
SP_PLLVDD
VID_PLLVDD
XTAL_IN
XTAL_OUT
XTAL_SSIN
P6 M3 L6 P5 P7 L7 M7 N8 M1 M2 L1 M5 N3 M4 N4 P2 R8 M6 R1 P3 P4 P1
AJ11
AK9 AL10 AL9
AM9 AN9
AG10 AP9 AP8
R4 R5
R7 R6
R2 R3
T4 T3
AD8
AE8
AD7
H3 H2
H1 J4
FB_CLAMP_MON_R
GPU_GPIO2 GPU_GPIO3 GPU_GPIO4
FB_Clamp_REQ#_Q
GPU_GPIO7 THM_OVERT#_R THM_ALERT# FBVREF_ALTV GPU_VID_0 GPU_HOT#_R GPU_GPIO13
1 2
RV479 10K_0402_5%~D@
I2CA_SCL I2CA_SDA
I2CB_SCL I2CB_SDA
I2CC_SCL
RV299 2.2K_0402_5%~D@
I2CC_SDA
RV300 2.2K_0402_5%~D@
EC_SMB_CK2_PX EC_SMB_DA2_PX
+PLLVDD
+CLK_PLLVDD
CLK_27M_IN CLK_27M_OUT
XTALSSIN XTALOUTBUFF
RV505 0_0402_5%~D@
RV503 0_0402_5%@
1 2
RV10 0_0402_5%~D@
FB_Clamp_REQ#_Q
1 2 1 2
1 2
1 2
GPU_HOT#_R
THM_OVERT#_R
PT
2
ST
+3VS_DELAY
2
61
QV42A 2N7002DW-7-F_SOT363-6
+3VS_DELAY
5
4
QV42B 2N7002DW-7-F_SOT363-6
+3VS_DELAY
G
2
S
QV40 2N7002_SOT23-3
0.1U_0402_10V7K~D
@
CV568
1
1
2
2
FB_Clamp [28,33,38]
FB_CLAMP_MON [33]
FBVREF_ALTV [29,30,31,32] GPU_VID_0 [59]
GPU_PSI [59]
3
PT
13
D
EC_SMB_CK2_PX [25]
EC_SMB_DA2_PX [25]
1
CV773
0.1U_0402_10V7K~D
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
@
CV569
CV570
1
2
GPU_HOT# [38]
FB_Clamp_REQ# [38]
THM_OVERT# [38]
I2CC_SCL I2CC_SDA
4.7U_0603_6.3V6K~D
0.1U_0402_10V7K~D
CV572
CV571
1
1
2
2
BLM18PG300SN1D_2P
1
CV574 22U_0805_6.3V6M~D
2
BLM18PG181SN1_0603~D
22U_0805_6.3V6M~D
CV573
1
2
1
RPH12
1 2 1 2
1 8 2 7 3 6 4 5
100K_0804_8P4R_5%
RPH33
1 8 2 7 3 6 4 5
100K_0804_8P4R_5%
PT
RPH32
4 5 3 6 2 7 1 8
10K_0804_8P4R_5%
RPH15
1 8 2 7 3 6 4 5
2.2K_8P4R_5%
RPH13
@ 1 8 2 7 3 6 4 5
2.2K_8P4R_5%
+1.05VSDGPU
+1.05VSDGPU
GPU_GPIO2 GPU_GPIO3 GPU_GPIO4 GPU_GPIO7
GPU_HOT#_R THM_OVERT#_R THM_ALERT# FBVREF_ALTV
CLK_REQ#
FB_Clamp_REQ#_Q
XTALSSIN XTALOUTBUFF
I2CA_SCL I2CA_SDA I2CB_SCL I2CB_SDA
RV319 2.2K_0402_5%~D RV331 2.2K_0402_5%~D
LV14
1 2
LV2
1 2
+3VS_DELAY
+3VS_DELAY
+3VS_DELAY
+3VS_DELAY
PT
YV1
27MHZ_12PF_X3G027000FC1H-H~D
CLK_27M_IN
1
CV575 10P_0402_25V8J
2
1
2
IN
GND
GND
OUT
3
4
CLK_27M_OUT
1
CV576 10P_0402_25V8J
2
PTPT
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
1
0.1
0.1
0.1
of
24 62Tuesday, September 03, 2013
24 62Tuesday, September 03, 2013
24 62Tuesday, September 03, 2013
Page 25
5
4
3
2
1
Straps
ST
UV1D
AM6
IFPA_TXC
AN6
IFPA_TXC_N
AP3
D D
C C
B B
A A
5
IFPA_TXD0
AN3
IFPA_TXD0_N
AN5
IFPA_TXD1
AM5
IFPA_TXD1_N
AL6
IFPA_TXD2
AK6
IFPA_TXD2_N
AJ6
IFPA_TXD3
AH6
IFPA_TXD3_N
AJ9
IFPB_TXC
AH9
IFPB_TXC_N
AP6
IFPB_TXD4
AP5
IFPB_TXD4_N
AM7
IFPB_TXD5
AL7
IFPB_TXD5_N
AN8
IFPB_TXD6
AM8
IFPB_TXD6_N
AK8
IFPB_TXD7
AL8
IFPB_TXD7_N
AK1
IFPC_L0
AJ1
IFPC_L0_N
AJ3
IFPC_L1
AJ2
IFPC_L1_N
AH3
IFPC_L2
AH4
IFPC_L2_N
AG5
IFPC_L3
AG4
IFPC_L3_N
AM1
IFPD_L0
AM2
IFPD_L0_N
AM3
IFPD_L1
AM4
IFPD_L1_N
AL3
IFPD_L2
AL4
IFPD_L2_N
AK4
IFPD_L3
AK5
IFPD_L3_N
AD2
IFPE_L0
AD3
IFPE_L0_N
AD1
IFPE_L1
AC1
IFPE_L1_N
AC2
IFPE_L2
AC3
IFPE_L2_N
AC4
IFPE_L3
AC5
IFPE_L3_N
AE3
IFPF_L0
AE4
IFPF_L0_N
AF4
IFPF_L1
AF5
IFPF_L1_N
AD4
IFPF_L2
AD5
IFPF_L2_N
AG1
IFPF_L3
AF1
IFPF_L3_N
AG3
IFPC_AUX_I2CW_SCL
AG2
IFPC_AUX_I2CW_SDA_N
AK3
IFPD_AUX_I2CX_SCL
AK2
IFPD_AUX_I2CX_SDA_N
AB3
IFPE_AUX_I2CY_SCL
AB4
IFPE_AUX_I2CY_SDA_N
AF3
IFPF_AUX_I2CZ_SCL
AF2
IFPF_AUX_I2CZ_SDA_N
Part 4 of 7
NC
GENERAL
MULTI_STRAP_REF0_GND
LVDS/TMDS
NC_0 NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8
NC_9 NC_10 NC_11 NC_12 NC_13
BUFRST_N
CEC
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
THERMDP
THERMDN
P8 AC6 AJ28 AJ4 AJ5 AL11 C15 D19 D20 D23 D26 H31 T8 V32
N14x GPU don't support CEC. Leave the CEC pin as NC
L2
L3
J2
STRAP0
J7
STRAP1
J6
STRAP2
J5
STRAP3
J3
STRAP4
J1
MULTI_STRAP_REF0_GND
K3
K4
12
RV318
40.2K_0402_1%~D
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4 ROM_SCLK_GPU ROM_SI_GPU ROM_SO_GPU
QT
RV304
RV303
RV302
RV301
@
@
1 2
1 2
10K_0402_1%~D
4.99K_0402_1%~D
RV309
1 2
RV310
1 2
45.3K_0402_1%~D
4.99K_0402_1%~D
1 2
1 2
4.99K_0402_1%~D
RV311
@
1 2
1 2
10K_0402_1%~D
RV312
4.99K_0402_1%~D
VRAMH@
@
15K_0402_1%~D
1 2
34.8K_0402_1%~D
RV312
1 2
15K_0402_1%~D
10K_0402_1%~D
VRAMS@
SPI ROM for N14E-GL ( 2M bit/256K byte )
VDD_SENSE
GND_SENSE
L4
L5
GPU_VDD_SENSE [59]
GPU_VSS_SENSE [59]
+3VS_DELAY
12
10K_0402_5%~D
@
RV320
QT
TEST
AK11 AM10 AM11 AP12 AP11 AN11
H6 H5 H7 H4
GPU_TESTMODE GPU_JTAG_TCK GPU_JTAG_TDI GPU_JTAG_TDO GPU_JTAG_TMS GPU_JTAG_TRST#
ROM_CS_GPU
ROM_SI_GPU ROM_SO_GPU ROM_SCLK_GPU
4
T174@ T11@ T12@ T13@
12
RV324
10K_0402_5%~D
10K_0402_5%~D
12
RV323
EC_SMB_CK2_PX[24]
EC_SMB_DA2_PX[24]
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
TESTMODE
JTAG_TCK
JTAG_TDI JTAG_TDO JTAG_TMS
JTAG_TRST_N
SERIAL
ROM_CS_N
ROM_SI
ROM_SO
ROM_SCLK
N14P-GT-A2@
+3VS_DELAY +3VS_DELAY
12
RV506
@
10K_0402_1%~D
ROM_CS_GPU_R ROM_SO_GPU
ROM_CS_GPU ROM_CS_ GPU_R
+3VS_DELAY
RV325
2.2K_0402_5%~D
EC_SMB_CK2_PX
EC_SMB_DA2_PX
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
RV305
RV306
@
1 2
1 2
N15@
30.1K_0402_1%~D
RV314
RV313
1 2
1 2
N14@
N14@
24.9K_0402_1%~D
RV314
34.8K_0402_1%~D
N15@
@
1
CS#
2
DO
3
WP#
4
GND
W25X20AVSNIG_SO8
RV507 0_0402_5%~D@
RV508 0_0402_5%~D@
RV509 0_0402_5%~D@
12
12
RV326
2.2K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
2
+3VS_DELAY
RV307
@
1 2
10K_0402_1%~D
RV315
1 2
4.99K_0402_1%~D
U23
1 2
1 2
1 2
RV308
45.3K_0402_1%~D
RV316
@
10K_0402_1%~D
8
VCC
7
HOLD#
6
CLK
5
DIO
+3VS_DELAY
2
QV21A
DMN66D0LDW-7_SOT363-6~D
Change to PU35K in N15 for use ext ROM
Hynix “0”. ROM_SI=PD 5K ohm Samsung”1”. ROM_SI=PD 10K ohm
1
CV3509
@
0.1U_0402_10V7K~D
2
ROM_SCLK_GPU_R ROM_SI_GPU_R
ROM_SI_GPU_RROM_SI_GPU
ROM_SCLK_GPU_RROM_SCLK_GPU
61
5
4
QV21B
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PCH_SMLCLK [17,35,38,40]
3
PCH_SMLDATA [17,35,38,40]
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
1
0.1
0.1
25 62Tuesday, September 03, 2013
25 62Tuesday, September 03, 2013
25 62Tuesday, September 03, 2013
0.1
Page 26
5
4
3
2
1
+1.5VSDGPU
D D
Close to Pinclose to the GPU
22U_0805_6.3V6M~D
10U_0603_6.3V6M~D
CV588
CV587
1
1
2
2
10U_0603_6.3V6M~D
22U_0805_6.3V6M~D
1
2
C C
CV603
CV602
1
2
4.7U_0603_6.3V6K~D
1
CV589
2
4.7U_0603_6.3V6K~D
1
@
CV604
2
1U_0402_6.3V6K~D
4.7U_0603_6.3V6K~D
1
1
2
1
2
CV591
CV590
2
4.7U_0603_6.3V6K~D
1U_0402_6.3V6K~D
1
@
CV606
CV605
2
0.1U_0402_25V6K~D
1U_0402_6.3V6K~D
1
@
CV592
2
1U_0402_6.3V6K~D
1
CV607
2
0.1U_0402_25V6K~D
1
1
CV593
CV594
2
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
@
CV609
CV608
2
2
PT
B B
AA27 AA30 AB27 AB33 AC27 AD27 AE27 AF27 AG27
M27
W27 W30 W33
AH8
AG8 AG9
AG7 AN2 AG6
AD6 AC7 AC8
B13 B16 B19 E13 E16 E19 H10 H11 H12 H13 H14 H15 H16 H18 H19 H20 H21 H22 H23 H24
H8 H9
L27
N27 P27 R27
T27 T30 T33
V27
Y27
AJ8
AF7 AF8 AF6
AB8
UV1E
FBVDDQ_0 FBVDDQ_1 FBVDDQ_2 FBVDDQ_3 FBVDDQ_4 FBVDDQ_5 FBVDDQ_6 FBVDDQ_7 FBVDDQ_8 FBVDDQ_9 FBVDDQ_10 FBVDDQ_11 FBVDDQ_12 FBVDDQ_13 FBVDDQ_14 FBVDDQ_15 FBVDDQ_16 FBVDDQ_17 FBVDDQ_18 FBVDDQ_19 FBVDDQ_20 FBVDDQ_21 FBVDDQ_22 FBVDDQ_23 FBVDDQ_24 FBVDDQ_25 FBVDDQ_26 FBVDDQ_27 FBVDDQ_28 FBVDDQ_29 FBVDDQ_30 FBVDDQ_31 FBVDDQ_32 FBVDDQ_33 FBVDDQ_34 FBVDDQ_35 FBVDDQ_36 FBVDDQ_37 FBVDDQ_38 FBVDDQ_39 FBVDDQ_40 FBVDDQ_41 FBVDDQ_42 FBVDDQ_43
IFPAB_PLLVDD IFPAB_RSET IFPA_IOVDD IFPB_IOVDD
IFPC_PLLVDD IFPC_RSET IFPC_IOVDD
IFPD_PLLVDD IFPD_RSET IFPD_IOVDD
IFPEF_PLLVDD IFPEF_RSET IFPE_IOVDD IFPF_IOVDD
N14P-GT-A2@
Part 5 of 7
POWER
FB_CAL_PD_VDDQ
FB_CAL_TERM_GND
PEX_IOVDDQ_0 PEX_IOVDDQ_1 PEX_IOVDDQ_2 PEX_IOVDDQ_3 PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8
PEX_IOVDDQ_9 PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13
PEX_IOVDD_0 PEX_IOVDD_1 PEX_IOVDD_2 PEX_IOVDD_3 PEX_IOVDD_4 PEX_IOVDD_5
PEX_PLLVDD
VDD33_0 VDD33_1 VDD33_2 VDD33_3
FB_CAL_PU_GND
FB_GND_SENSE
FB_VDDQ_SENSE
PEX_PLL_HVDD
PEX_SVDD_3V3
AG13 AG15 AG16 AG18 AG25 AH15 AH18 AH26 AH27 AJ27 AK27 AL27 AM28 AN28
AG19 AG21 AG22 AG24 AH21 AH25
AG26
+PEX_PLLVDD
J8
+3.3V_RUN_VDD33
K8 L8 M8
J27
H27
H25
F2
F1
AH12
AG12
1 2
RV327 40.2_0402_1%~D
1 2
RV328 40.2_0402_1%~D
1 2
RV329 60.4_0402_1%~D
1 2
RV330 100_0402_1%~D
1 2
RV332 100_0402_1%~D
1
2
0.1U_0402_10V7K~D
PLACE UNDER BGA PLACE NEAR GPU
1U_0402_6.3V6K~D
CV580
1
2
1U_0402_6.3V6K~D
1
CV595
2
0.1U_0402_10V7K~D
CV610
1
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
@
CV616
CV615
CV614
1
1
2
2
1U_0402_6.3V6K~D
@
CV581
1
2
1U_0402_6.3V6K~D
1
CV596
2
1U_0402_6.3V6K~D
1
@
CV611
2
+1.5VSDGPU
+1.5VSDGPU
+3VS_DELAY
4.7U_0603_6.3V6K~D
1
CV582
2
4.7U_0603_6.3V6K~D
CV597
1
2
4.7U_0603_6.3V6K~D
CV612
1
2
BLM18AG121SN1D_0603~D
0.21A
0.1U_0402_10V7K~D
1
2
10U_0603_6.3V6M~D
@
CV583
1
2
10U_0603_6.3V6M~D
CV598
1
2
LV3
der GPU
1
CV623
2
1
2
1
2
12
0.1U_0402_10V7K~D
CV622
10U_0603_6.3V6M~D
@
CV584
10U_0603_6.3V6M~D
CV599
1
2
1
2
1
2
1U_0402_6.3V6K~D
1
2
+3.3V_RUN_VDD33
0.1U_0402_10V7K~D
CV621
+1.05VSDGPU
22U_0805_6.3V6M~D
CV585
+1.05VSDGPU
22U_0805_6.3V6M~D
CV600
CV613
Near GPUUn
1U_0402_6.3V6K~D
1
CV619
2
22U_0805_6.3V6M~D
CV586
1
PEX_IOVDD/Q 3.3A
2
22U_0805_6.3V6M~D
CV601
1
2
+1.05VSDGPU
0.15A
RV337 0_0603_5%@
4.7U_0603_6.3V6K~D
1
CV617
2
+3VS_DELAY
1 2
ST
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
1
0.1
0.1
26 62Tuesday, September 03, 2013
26 62Tuesday, September 03, 2013
26 62Tuesday, September 03, 2013
0.1
Page 27
5
UV1F
AG11
GND_0
A2
GND_1
A33
GND_2
AA13
GND_3
AA15
GND_4
AA17
D D
C C
B B
A A
AA18 AA20 AA22 AB12 AB14 AB16 AB19
AB21 AB23 AB28 AB30 AB32
AC13 AC15 AC17 AC18 AC20 AC22
AE28 AE30 AE32 AE33
AH10 AH13 AH16 AH19
AH22 AH24 AH28 AH29 AH30 AH32 AH33
AK10
AL12 AL14 AL15 AL17 AL18
AL20 AL21 AL23 AL24 AL26 AL28 AL30 AL32 AL33
AM13 AM16 AM19 AM22 AM25
AN10 AN13 AN16 AN19 AN22 AN25 AN30 AN34
AP33
AB2
AB5 AB7
AE2
AE5 AE7
AH2
AH5 AH7
AK7
AL2
AL5
AN1
AN4 AN7 AP2
B10 B22 B25 B28 B31 B34
C10 C13 C19 C22 C25 C28
GND_5 GND_6 GND_7 GND_8 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47
AJ7
GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 GND_63 GND_64 GND_65 GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73 GND_74 GND_75 GND_76 GND_77 GND_78 GND_79 GND_80 GND_81 GND_82 GND_83 GND_84
B1
GND_85 GND_86 GND_87 GND_88 GND_89 GND_90 GND_91
B4
GND_92
B7
GND_93 GND_94 GND_95 GND_96 GND_97 GND_98 GND_99
C7
GND_100
N14P-GT-A2@
Part 6 of 7
4
GND
GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136 GND_137 GND_138 GND_139 GND_140 GND_141 GND_142 GND_143 GND_144 GND_145 GND_146 GND_147 GND_148 GND_149 GND_150 GND_151 GND_152 GND_153 GND_154 GND_155 GND_156 GND_157 GND_158 GND_159 GND_160 GND_161 GND_162 GND_163 GND_164 GND_165 GND_166 GND_167 GND_168 GND_169 GND_170 GND_171 GND_172 GND_173 GND_174 GND_175 GND_176 GND_177 GND_178 GND_179 GND_180 GND_181 GND_182 GND_183 GND_184 GND_185 GND_186 GND_187 GND_188 GND_189 GND_190 GND_191 GND_192 GND_193 GND_194 GND_195 GND_196 GND_197 GND_198 GND_199
GND_OPT GND_OPT
D2 D31 D33 E10 E22 E25 E5 E7 F28 F7 G10 G13 G16 G19 G2 G22 G25 G28 G3 G30 G32 G33 G5 G7 K2 K28 K30 K32 K33 K5 K7 M13 M15 M17 M18 M20 M22 N12 N14 N16 N19 N2 N21 N23 N28 N30 N32 N33 N5 N7 P13 P15 P17 P18 P20 P22 R12 R14 R16 R19 R21 R23 T13 T15 T17 T18 T2 T20 T22 T28 T32 T5 T7 U12 U14 U16 U19 U21 U23 V12 V14 V16 V19 V21 V23 W13 W15 W17 W18 W20 W22 W28 Y12 Y14 Y16 Y19 Y21 Y23 AH11
C16 W32
3
+GPU_CORE
AA12 AA14 AA16 AA19 AA21 AA23 AB13 AB15 AB17 AB18 AB20
AB22 AC12 AC14 AC16 AC19 AC21 AC23
M12 M14 M16 M19 M21 M23
UV1G
VDD_0 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23
N13
VDD_24
N15
VDD_25
N17
VDD_26
N18
VDD_27
N20
VDD_28
N22
VDD_29
P12
VDD_30
P14
VDD_31
P16
VDD_32
P19
VDD_33
P21
VDD_34
P23
VDD_35
R13
VDD_36
R15
VDD_37
R17
VDD_38
R18
VDD_39
R20
VDD_40
R22
VDD_41
T12
VDD_42
T14
VDD_43
T16
VDD_44
T19
VDD_45
T21
VDD_46
T23
VDD_47
U13
VDD_48
U15
VDD_49
U17
VDD_50
U18
VDD_51
U20
VDD_52
U22
VDD_53
V13
VDD_54
V15
VDD_55
P-GT-A2@
N14
Part 7 of 7
POWER
2
+GPU_CORE
V17
VDD_56
V18
VDD_57
V20
VDD_58
V22
VDD_59
W12
VDD_60
W14
VDD_61
W16
VDD_62
W19
VDD_63
W21
VDD_64
W23
VDD_65
Y13
VDD_66
Y15
VDD_67
Y17
VDD_68
Y18
VDD_69
Y20
VDD_70
Y22
VDD_71
U1
XVDD_1
U2
XVDD_2
U3
XVDD_3
U4
XVDD_4
U5
XVDD_5
U6
XVDD_6
U7
XVDD_7
U8
XVDD_8
V1
XVDD_9
V2
XVDD_10
V3
XVDD_11
V4
XVDD_12
V5
XVDD_13
V6
XVDD_14
V7
XVDD_15
V8
XVDD_16
W2
XVDD_17
W3
XVDD_18
W4
XVDD_19
W5
XVDD_20
W7
XVDD_21
W8
XVDD_22
Y1
XVDD_23
Y2
XVDD_24
Y3
XVDD_25
Y4
XVDD_26
Y5
XVDD_27
Y6
XVDD_28
Y7
XVDD_29
Y8
XVDD_30
AA1
XVDD_31
AA2
XVDD_32
AA3
XVDD_33
AA4
XVDD_34
AA5
XVDD_35
AA6
XVDD_36
AA7
XVDD_37
AA8
XVDD_38
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
1
0.1
0.1
27 62Tuesday, September 03, 2013
27 62Tuesday, September 03, 2013
27 62Tuesday, September 03, 2013
0.1
Page 28
5
[24,33,38]
4
3
2
1
FBA_D[0..31][29]
FBA_D[32..63][30]
FBA_CMD[0..31][29,30]
FBA_DBI[4..7][30]
FBA_DBI[0..3][29]
D D
FBA_EDC[4..7][30]
FBA_EDC[0..3][29]
NEED FIND 30R BEAD
C C
B B
LV21
BLM18PG300SN1D_2P~D
1 2
1U_0402_6.3V6K~D
1
CV3512
2
+1.5VSDGPU
+FBA_PLL_AVDD +FBA_DLL_AVDD
ST
FB_Clamp
+FBA_DLL_AVDD
22U_0805_6.3V6M~D
1
CV3513
2
12
@
RV342
1.1K_0402_1%~D
12
@
RV343
1.1K_0402_1%~D
PT
1 2
CV639 0.1U_0402_10V7K~D
1 2
RV510 0_0402_5%@
1 2
RV8 0_0402_5%@
1 2
RV501 10K_0402_5%~D
+1.5VSDGPU
PT
A A
FBA_D[0..31]
FBA_D[32..63]
FBA_CMD[0..31]
FBA_DBI[4..7]
FBA_DBI[0..3]
FBA_EDC[4..7]
FBA_EDC[0..3]
+FBA_DLL_AVDD+1.05VSDGPU
0.1U_0402_10V7K~D
1
CV637
2
16mil
+FB_VREF
1
@
CV638
0.01U_0402_16V7K~D
2
@
RV344
60.4_0402_1%~D
+FBA_PLL_AVDD
+FB_VREF
+FBA_DLL_AVDD
1 2
1 2
FBA_D0
M29
FBA_D1 FBA_D2
M28
FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31
AG28
FBA_D32
AF29
FBA_D33
AG29
FBA_D34
AF28
FBA_D35
AD30
FBA_D36
AD29
FBA_D37
AC29
FBA_D38
AD28
FBA_D39
AJ29
FBA_D40
AK29
FBA_D41
AJ30
FBA_D42
AK28
FBA_D43
AM29
FBA_D44
AM31
FBA_D45
AN29
FBA_D46
AM30
FBA_D47
AN31
FBA_D48
AN32
FBA_D49
AP30
FBA_D50
AP32
FBA_D51
AM33
FBA_D52
AL31
FBA_D53
AK33
FBA_D54
AK32
FBA_D55
AD34
FBA_D56
AD32
FBA_D57
AC30
FBA_D58
AD33
FBA_D59
AF31
FBA_D60
AG34
FBA_D61
AG32
FBA_D62
AG33
FBA_D63
AC28
@
RV345
60.4_0402_1%~D
L28
L29
N31 P29 R29 P28
J28
H29
J29 H28 G29 E31 E32 F30 C34 D32 B33 C33 F33 F32 H33 H32 P34 P32 P31 P33
L31
L34
L32
L33
U27
H26
K27
E1
R28
UV1B
FBA_D00 FBA_D01 FBA_D02 FBA_D03 FBA_D04 FBA_D05 FBA_D06 FBA_D07 FBA_D08 FBA_D09 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63
FBA_PLL_AVDD
FB_VREF
FB_DLL_AVDD
FB_CLAMP
FBA_DEBUG0 FBA_DEBUG1
Part 2 of 7
MEMORY INTERFACE
A
THE FBA_ECKBxx ARE USED ON GK107. NC ON GF108 AND GF117
N14P-GT-A2@
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8
FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7
FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7
FBA_CMD_RFU0 FBA_CMD_RFU1
FBA_CLK0
FBA_CLK0_N
FBA_CLK1
FBA_CLK1_N
FBA_WCK01
FBA_WCK01_N
FBA_WCK23
FBA_WCK23_N
FBA_WCK45
FBA_WCK45_N
FBA_WCK67
FBA_WCK67_N
FBA_WCKB01
FBA_WCKB01_N
FBA_WCKB23
FBA_WCKB23_N
FBA_WCKB45
FBA_WCKB45_N
FBA_WCKB67
FBA_WCKB67_N
U30 T31 U29 R34 R33 U32 U33 U28 V28 V29 V30 U34 U31 V34 V33 Y32 AA31 AA29 AA28 AC34 AC33 AA32 AA33 Y28 Y29 W31 Y30 AA34 Y31 Y34 Y33 V31
P30 F31 F34 M32 AD31 AL29 AM32 AF34
M30 H30 E34 M34 AF30 AK31 AM34 AF32
M31 G31 E33 M33 AE31 AK30 AN33 AF33
R32 AC32
R30 R31
AB31 AC31
K31 L30 H34 J34 AG30 AG31 AJ34 AK34
J30 J31 J32 J33 AH31 AJ31 AJ32 AJ33
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31
FBA_DBI0 FBA_DBI1 FBA_DBI2 FBA_DBI3 FBA_DBI4 FBA_DBI5 FBA_DBI6 FBA_DBI7
FBA_EDC0 FBA_EDC1 FBA_EDC2 FBA_EDC3 FBA_EDC4 FBA_EDC5 FBA_EDC6 FBA_EDC7
FBA_WCK01 FBA_WCK01# FBA_WCK23 FBA_WCK23# FBA_WCK45 FBA_WCK45# FBA_WCK67 FBA_WCK67#
FBB_D[0..31][31]
FBB_D[32..63][32]
FBB_CMD[0..31][31,32]
FBB_DBI[4..7][32]
FBB_DBI[0..3][31]
FBB_EDC[4..7][32]
FBB_EDC[0..3][31]
RV338
10K_0402_5%~D
1 2
FBA_CMD30
CKE_H
CKE_L
RST_H*
RST_L*
FBA_CMD14
FBA_CMD29
FBA_CMD13
RV339
10K_0402_5%~D
1 2
RV340
10K_0402_5%~D
1 2
RV341
10K_0402_5%~D
1 2
for Test/Debug for Test/Debug
CLKA0 [29] CLKA0# [29]
CLKA1 [30] CLKA1# [30]
FBA_WCK01 [29] FBA_WCK01# [29] FBA_WCK23 [29] FBA_WCK23# [29] FBA_WCK45 [30] FBA_WCK45# [30] FBA_WCK67 [30] FBA_WCK67# [30]
+1.5VSDGPU
FBB_D[0..31]
FBB_D[32..63]
FBB_CMD[0..31]
FBB_DBI[4..7]
FBB_DBI[0..3]
FBB_EDC[4..7]
FBB_EDC[0..3]
FBB_D0 FBB_D1 FBB_D2 FBB_D3 FBB_D4 FBB_D5 FBB_D6 FBB_D7
CV636
1 2
FBB_D8 FBB_D9 FBB_D10 FBB_D11 FBB_D12 FBB_D13 FBB_D14 FBB_D15 FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 FBB_D27 FBB_D28 FBB_D29 FBB_D30 FBB_D31 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 FBB_D38 FBB_D39 FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63
+FBA_PLL_AVDD
@
RV347
60.4_0402_1%~D
1 2
+1.5VSDGPU +1.5VSDGPU
+FBA_PLL_AVDD
1
0.1U_0402_10V7K~D
2
@
RV346
60.4_0402_1%~D
UV1C
G9
E9
G8
F9
F11
G11
F12
G12
G6
F5 E6 F6 F4
G4
E2
F3 C2 D4 D3 C1
B3 C4
B5 C5
A11 C11 D11 B11
D8
A8 C8
B8
F24 G23 E24 G24 D21 E21 G21
F21 G27 D27 G26 E27 E29
F29 E30 D30 A32 C31 C32 B32 D29 A29 C29 B29 B21 C23 A21 C21 B24 C24 B26 C26
H17
G14 G20
FBB_D00 FBB_D01 FBB_D02 FBB_D03 FBB_D04 FBB_D05 FBB_D06 FBB_D07 FBB_D08 FBB_D09 FBB_D10 FBB_D11 FBB_D12 FBB_D13 FBB_D14 FBB_D15 FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 FBB_D27 FBB_D28 FBB_D29 FBB_D30 FBB_D31 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 FBB_D38 FBB_D39 FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63
FBB_PLL_AVDD
FBB_DEBUG0 FBB_DEBUG1
THE FBA_ECKBxx ARE USED ON GK107. NC ON GF108 AND GF117
N14P-GT-A2@
Part 3 of 7
MEMORY INTERFACE
FBB_CMD0 FBB_CMD1 FBB_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6 FBB_CMD7 FBB_CMD8
FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30 FBB_CMD31
FBB_DQM0 FBB_DQM1 FBB_DQM2 FBB_DQM3 FBB_DQM4 FBB_DQM5 FBB_DQM6 FBB_DQM7
FBB_DQS_RN0 FBB_DQS_RN1 FBB_DQS_RN2 FBB_DQS_RN3 FBB_DQS_RN4 FBB_DQS_RN5 FBB_DQS_RN6
B
FBB_DQS_RN7
FBB_DQS_WP0 FBB_DQS_WP1 FBB_DQS_WP2 FBB_DQS_WP3 FBB_DQS_WP4 FBB_DQS_WP5 FBB_DQS_WP6 FBB_DQS_WP7
FBB_CMD_RFU0 FBB_CMD_RFU1
FBB_CLK0
FBB_CLK0_N
FBB_CLK1
FBB_CLK1_N
FBB_WCK01
FBB_WCK01_N
FBB_WCK23
FBB_WCK23_N
FBB_WCK45
FBB_WCK45_N
FBB_WCK67
FBB_WCK67_N
FBB_WCKB01
FBB_WCKB01_N
FBB_WCKB23
FBB_WCKB23_N
FBB_WCKB45
FBB_WCKB45_N
FBB_WCKB67
FBB_WCKB67_N
D13
FBB_CMD0
E14
FBB_CMD1
F14
FBB_CMD2
A12
FBB_CMD3
B12
FBB_CMD4
C14
FBB_CMD5
B14
FBB_CMD6
G15
FBB_CMD7
F15
FBB_CMD8
E15
FBB_CMD9
D15
FBB_CMD10
A14
FBB_CMD11
D14
FBB_CMD12
A15
FBB_CMD13
B15
FBB_CMD14
C17
FBB_CMD15
D18
FBB_CMD16
E18
FBB_CMD17
F18
FBB_CMD18
A20
FBB_CMD19
B20
FBB_CMD20
C18
FBB_CMD21
B18
FBB_CMD22
G18
FBB_CMD23
G17
FBB_CMD24
F17
FBB_CMD25
D16
FBB_CMD26
A18
FBB_CMD27
D17
FBB_CMD28
A17
FBB_CMD29
B17
FBB_CMD30
E17
FBB_CMD31
E11
FBB_DBI0
E3
FBB_DBI1
A3
FBB_DBI2
C9
FBB_DBI3
F23
FBB_DBI4
F27
FBB_DBI5
C30
FBB_DBI6
A24
FBB_DBI7
D9 E4 B2 A9 D22 D28 A30 B23
D10
FBB_EDC0
D5
FBB_EDC1
C3
FBB_EDC2
B9
FBB_EDC3
E23
FBB_EDC4
E28
FBB_EDC5
B30
FBB_EDC6
A23
FBB_EDC7
C12 C20
D12 E12
E20 F20
F8
FBB_WCK01
E8
FBB_WCK01#
A5
FBB_WCK23
A6
FBB_WCK23#
D24
FBB_WCK45
D25
FBB_WCK45#
B27
FBB_WCK67
C27
FBB_WCK67#
D6 D7 C6 B6 F26 E26 A26 A27
CKE_H
CKE_L
RST_H*
RST_L*
CLKB0 [31] CLKB0# [31]
CLKB1 [32] CLKB1# [32]
FBB_WCK01 [31] FBB_WCK01# [31] FBB_WCK23 [31] FBB_WCK23# [31] FBB_WCK45 [32] FBB_WCK45# [32] FBB_WCK67 [32] FBB_WCK67# [32]
FBB_CMD30
FBB_CMD14
FBB_CMD29
FBB_CMD13
RV409
10K_0402_5%~D
1 2
RV410
10K_0402_5%~D
1 2
RV414
10K_0402_5%~D
1 2
RV418
10K_0402_5%~D
1 2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
1
0.1
0.1
28 62Tuesday, September 03, 2013
28 62Tuesday, September 03, 2013
28 62Tuesday, September 03, 2013
0.1
Page 29
5
Memory Partition A - Lower 32 bits
D D
C C
B B
A A
FBVREF_ALTV[24, 30,31,32]
64X32 GDDR5
5
2
G
+FBA_VREFD_L
RV357
931_0402_1%
RV359
931_0402_1%
13
D
QV22
L2N7002WT1G
S
12
12
RV348
40.2_0402_1%~D
1 2
RV349
40.2_0402_1%~D
1 2
1
CV643
0.01U_0402_16V7K~D
2
+1.5VSDGPU
RV358
549_0402_1%~D
RV360
549_0402_1%~D
+FBA_VREFC_L
12
12
CLKA0
CLKA0#
+FBA_VREFD_L
+FBA_VREFC_L
4
CV776
820P_0402_50V7K~D
1
2
CV651
820P_0402_50V7K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
CV659
1
1
2
2
4
CLKA0[28] CLKA0#[28]
1 2
RV352 1K_0402_1%~D
1 2
RV353 1K_0402_1%~D
1 2
RV354 121_0402_1%~D
FBA_WCK01#[28] FBA_WCK01[28]
FBA_WCK23#[28] FBA_WCK23[28]
1.33K_0402_1%~D
820P_0402_50V7K~D
1
12
RV355
CV650
2
12
1
RV356
1.33K_0402_1%~D
2
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
@
CV662
1
1
1
CV660
CV661
2
2
2
FBA_EDC0 FBA_EDC1 FBA_EDC2 FBA_EDC3
FBA_DBI0 FBA_DBI1 FBA_DBI2 FBA_DBI3
CLKA0 CLKA0# FBA_CMD14
FBA_CMD9
FBA_CMD6 FBA_CMD7 FBA_CMD4 FBA_CMD3
FBA_CMD1 FBA_CMD2 FBA_CMD11 FBA_CMD10
FBA_SEN0
FBA_CMD8 FBA_CMD12 FBA_CMD0 FBA_CMD15 FBA_CMD5
FBA_WCK01# FBA_WCK01
FBA_WCK23# FBA_WCK23
FBA_CMD13
+1.5VSDGPU
0.1U_0402_10V7K~D
CV663
3
NO
RMAL
UV5
MF=0 MF=1 MF=0MF=1
C2
EDC0 EDC3
C13
EDC1 EDC2
R13
EDC2 EDC1
R2
EDC3 EDC0
D2
DBI0# DBI3#
D13
DBI1# DBI2#
P13
DBI2# DBI1#
P2
DBI3# DBI0#
J12
CK
J11
CK#
J3
CKE#
J5
A12/A13
K4
A8/A7 A10/A0
K5
A11/A6 A9/A1
K10
BA1/A5 BA3/A3
K11
BA2/A4 BA0/A2
H10
BA3/A3 BA1/A5
H11
BA0/A2 BA2/A4
H5
A9/A1 A11/A6
H4
A10/A0 A8/A7
A5
NC
U5
NC
J1
MF
J10
SEN
J13
ZQ
J4
ABI#
G3
RAS# CAS#
G12
CS# WE#
L3
CAS# RAS#
L12
WE# CS#
D5
WCK01# W CK23#
D4
WCK01 WCK23
P5
WCK23# W CK01#
P4
WCK23 WCK01
A10
VREFD
U10
VREFD
J14
VREFC
J2
RESET#
G1
VDD
L1
VDD
G4
VDD
L4
VDD
C5
VDD
R5
VDD
C10
VDD
R10
VDD
D11
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VDD
H1
VSS
K1
VSS
B5
VSS
G5
VSS
L5
VSS
T5
VSS
B10
VSS
D10
VSS
G10
VSS
L10
VSS
P10
VSS
T10
VSS
H14
VSS
K14
VSS
170-BALL
SGRAM GDDR5
K4G41325FC-HC04_FBGA170~D
@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENTDIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENTDIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENTDIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9
DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
A4 A2 B4 B2 E4 E2 F4 F2 A11 A13 B11 B13 E11 E13 F11 F13 U11 U13 T11 T13 N11 N13 M11 M13 U4 U2 T4 T2 N4 N2 M4 M2
+1.5VSDGPU
B1
VDDQ
D1
VDDQ
F1
VDDQ
M1
VDDQ
P1
VDDQ
T1
VDDQ
G2
VDDQ
L2
VDDQ
B3
VDDQ
D3
VDDQ
F3
VDDQ
H3
VDDQ
K3
VDDQ
M3
VDDQ
P3
VDDQ
T3
VDDQ
E5
VDDQ
N5
VDDQ
E10
VDDQ
N10
VDDQ
B12
VDDQ
D12
VDDQ
F12
VDDQ
H12
VDDQ
K12
VDDQ
M12
VDDQ
P12
VDDQ
T12
VDDQ
G13
VDDQ
L13
VDDQ
B14
VDDQ
D14
VDDQ
F14
VDDQ
M14
VDDQ
P14
VDDQ
T14
VDDQ
A1
VSSQ
C1
VSSQ
E1
VSSQ
N1
VSSQ
R1
VSSQ
U1
VSSQ
H2
VSSQ
K2
VSSQ
A3
VSSQ
C3
VSSQ
E3
VSSQ
N3
VSSQ
R3
VSSQ
U3
VSSQ
C4
VSSQ
R4
VSSQ
F5
VSSQ
M5
VSSQ
F10
VSSQ
M10
VSSQ
C11
VSSQ
R11
VSSQ
A12
VSSQ
C12
VSSQ
E12
VSSQ
N12
VSSQ
R12
VSSQ
U12
VSSQ
H13
VSSQ
K13
VSSQ
A14
VSSQ
C14
VSSQ
E14
VSSQ
N14
VSSQ
R14
VSSQ
U14
VSSQ
Compal Secret Data
Compal Secret Data
Compal Secret Data
FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31
1
2
Deciphered Date
Deciphered Date
Deciphered Date
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
CV652
1
CV653
2
0.1U_0402_10V7K~D
CV655
1
2
2
1
1
CV654
2
2
FBA_CMD[0..31]
FBA_D[0..31]
FBA_DBI[0..3]
FBA_EDC[0..3]
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV656
1
2
1
FBA_CMD[0..31] [28,30]
FBA_D[0..31] [28]
FBA_DBI[0..3] [28]
FBA_EDC[0..3] [28]
0.1U_0402_10V7K~D
@
CV657
CV658
1
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Documen t Number Rev
Size Documen t Number Rev
Size Documen t Number Rev
Date: Shee t of
Date: Shee t of
Date: Shee t of
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
1
0.1
0.1
29 62Tuesday, September 03, 2 013
29 62Tuesday, September 03, 2 013
29 62Tuesday, September 03, 2 013
0.1
Page 30
5
Memory Partition A - Upper 32 bits
RV361
12
12
40.2_0402_1%~D
1 2
RV362
40.2_0402_1%~D
1 2
1
CV668
0.01U_0402_16V7K~D
2
+1.5VSDGPU
RV371
549_0402_1%~D
RV373
549_0402_1%~D
+FBA_VREFC_H
12
12
D D
C C
+FBA_VREFD_H
RV370
931_0402_1%
RV372
931_0402_1%
13
D
2
FBVREF_ALTV[24, 29,31,32]
B B
A A
5
QV23
G
L2N7002WT1G
S
4
CLKA1
CLKA1#
+FBA_VREFD_H
1
2
+FBA_VREFC_H
820P_0402_50V7K~D
10U_0603_6.3V6M~D
CV684
1
2
4
CLKA1[28] CLKA1#[28 ]
1 2
RV363 1K_0402_1 %~D
1 2
RV366 1K_0402_1 %~D
1 2
RV365 121_040 2_1%~D
FBA_WCK45#[28] FBA_WCK45[28]
FBA_WCK67#[28] FBA_WCK67[28]
820P_0402_50V7K~D
CV676
1
2
CV777
1U_0402_6.3V6K~D
CV685
1.33K_0402_1%~D
820P_0402_50V7K~D
1
12
RV368
CV675
2
12
1
RV369
1.33K_0402_1%~D
2
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
1
2
CV687
1
CV686
2
1
2
FBA_EDC5 FBA_EDC6 FBA_EDC7
FBA_DBI4 FBA_DBI5 FBA_DBI6 FBA_DBI7
CLKA1 CLKA1# FBA_CMD30
FBA_CMD25
FBA_CMD22 FBA_CMD23 FBA_CMD20 FBA_CMD19
FBA_CMD17 FBA_CMD18 FBA_CMD27 FBA_CMD26
FBA_SEN2
FBA_CMD24 FBA_CMD28 FBA_CMD16 FBA_CMD31 FBA_CMD21
FBA_WCK45# FBA_WCK45
FBA_WCK67# FBA_WCK67
FBA_CMD29
0.1U_0402_10V7K~D
@
CV688
+1.5VSDGPU
3
Issued Date
Issued Date
Issued Date
3
NORMAL
A4
DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9
DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
FBA_D32
A2
FBA_D33FBA_EDC4
B4
FBA_D34
B2
FBA_D35
E4
FBA_D36
E2
FBA_D37
F4
FBA_D38
F2
FBA_D39
A11
FBA_D40
A13
FBA_D41
B11
FBA_D42
B13
FBA_D43
E11
FBA_D44
E13
FBA_D45
F11
FBA_D46
F13
FBA_D47
U11
FBA_D48
U13
FBA_D49
T11
FBA_D50
T13
FBA_D51
N11
FBA_D52
N13
FBA_D53
M11
FBA_D54
M13
FBA_D55
U4
FBA_D56
U2
FBA_D57
T4
FBA_D58
T2
FBA_D59
N4
FBA_D60
N2
FBA_D61
M4
FBA_D62
M2
FBA_D63
+1.5VSDGPU
B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14
A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14
Compal Secret Data
Compal Secret Data
Compal Secret Data
ST
Deciphered Date
Deciphered Date
Deciphered Date
UV6
MF=0 MF=1 MF=0MF=1
C2
EDC0 EDC3
C13
EDC1 EDC2
R13
EDC2 EDC1
R2
EDC3 EDC0
D2
DBI0# DBI3#
D13
DBI1# DBI2#
P13
DBI2# DBI1#
P2
DBI3# DBI0#
J12
CK
J11
CK#
J3
CKE#
J5
A12/A13
K4
A8/A7 A10/A0
K5
A11/A6 A9/A1
K10
BA1/A5 BA3/A3
K11
BA2/A4 BA0/A2
H10
BA3/A3 BA1/A5
H11
BA0/A2 BA2/A4
H5
A9/A1 A11/A6
H4
A10/A0 A8/A7
A5
NC
U5
NC
J1
MF
J10
SEN
J13
ZQ
J4
ABI#
G3
RAS# CAS#
G12
CS# WE#
L3
CAS# RAS#
L12
WE# CS#
D5
WCK01# W CK23#
D4
WCK01 WCK23
P5
WCK23# W CK01#
P4
WCK23 WCK01
A10
VREFD
U10
VREFD
J14
VREFC
J2
RESET#
G1
VDD
L1
VDD
G4
VDD
L4
VDD
C5
VDD
R5
VDD
C10
VDD
R10
VDD
D11
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VDD
H1
VSS
K1
VSS
B5
VSS
G5
VSS
L5
VSS
T5
VSS
B10
VSS
D10
VSS
G10
VSS
L10
VSS
P10
VSS
T10
VSS
H14
VSS
K14
VSS
170-BALL
SGRAM GDDR5
K4G41325FC-HC04_FBGA170~D
@
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENTDIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENTDIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENTDIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_4V6M~D
CV677
1
2
1
1
CV679
CV678
2
2
2
FBA_CMD[0..31]
FBA_D[32..63]
FBA_DBI[4..7]
FBA_EDC[4..7]
0.1U_0402_10V7K~D
CV680
1
1
2
2
1
FBA_CMD[0..31] [28, 29]
FBA_D[32..63] [28]
FBA_DBI[4..7] [28]
FBA_EDC[4..7] [28]
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CV681
0.1U_0402_10V7K~D
@
CV682
CV683
1
1
2
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Documen t Number Rev
Size Documen t Number Rev
Size Documen t Number Rev
Date: Shee t of
Date: Shee t of
Date: Shee t of
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
1
0.1
0.1
30 62Tuesday, September 17, 2 013
30 62Tuesday, September 17, 2 013
30 62Tuesday, September 17, 2 013
0.1
Page 31
5
Memory Partition B - Lower 32 bits
D D
C C
B B
A A
64X32 GDDR5
FBVREF_ALTV[24,29,30,32]
RV374
40.2_0402_1%~D
1 2
RV375
40.2_0402_1%~D
1 2
1
CV693
0.01U_0402_16V7K~D
2
+FBB_VREFD_L
RV383
931_0402_1%
12
RV385
931_0402_1%
12
13
D
2
QV24
G
L2N7002WT1G
S
5
+1.5VSDGPU
RV384
549_0402_1%~D
RV386
549_0402_1%~D
+FBB_VREFC_L
12
12
4
CLKB0
CLKB0#
+FBB_VREFD_L
+FBB_VREFC_L
820P_0402_50V7K~D
10U_0603_6.3V6M~D
CV709
1
2
4
CLKB0[28] CLKB0#[28]
1 2
RV378 1K_0402_1%~D
1 2
RV379 1K_0402_1%~D
1 2
RV380 121_0402_1%~D
FBB_WCK01#[28] FBB_WCK01[28]
FBB_WCK23#[28] FBB_WCK23[28]
1
2
1
2
CV700
820P_0402_50V7K~D
1
2
1U_0402_6.3V6K~D
CV711
1.33K_0402_1%~D
12
RV381
12
RV382
1.33K_0402_1%~D
0.1U_0402_10V7K~D
CV712
1
2
CV778
820P_0402_50V7K~D
1
2
CV701
1U_0402_6.3V6K~D
1
CV710
2
FBB_EDC0 FBB_EDC1 FBB_EDC2 FBB_EDC3
FBB_DBI0 FBB_DBI1 FBB_DBI2 FBB_DBI3
CLKB0 CLKB0# FBB_CMD14
FBB_CMD9
FBB_CMD6 FBB_CMD7 FBB_CMD4 FBB_CMD3
FBB_CMD1 FBB_CMD2 FBB_CMD11 FBB_CMD10
FBB_CMD8 FBB_CMD12 FBB_CMD0 FBB_CMD15 FBB_CMD5
FBB_WCK01# FBB_WCK01
FBB_WCK23# FBB_WCK23
FBB_CMD13
0.1U_0402_10V7K~D
@
1
2
FBB_SEN0
+1.5VSDGPU
CV713
3
3
NORMAL
A4
DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9
DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
FBB_D0
A2
FBB_D1
B4
FBB_D2
B2
FBB_D3
E4
FBB_D4
E2
FBB_D5
F4
FBB_D6
F2
FBB_D7
A11
FBB_D8
A13
FBB_D9
B11
FBB_D10
B13
FBB_D11
E11
FBB_D12
E13
FBB_D13
F11
FBB_D14
F13
FBB_D15
U11
FBB_D16
U13
FBB_D17
T11
FBB_D18
T13
FBB_D19
N11
FBB_D20
N13
FBB_D21
M11
FBB_D22
M13
FBB_D23
U4
FBB_D24
U2
FBB_D25
T4
FBB_D26
T2
FBB_D27
N4
FBB_D28
N2
FBB_D29
M4
FBB_D30
M2
FBB_D31
+1.5VSDGPU
B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14
A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14
Compal Secret Data
Compal Secret Data
Compal Secret Data
10U_0603_6.3V6M~D
1
2
Deciphered Date
Deciphered Date
Deciphered Date
UV9
MF=0 MF=1 MF=0MF=1
C2
EDC0 EDC3
C13
EDC1 EDC2
R13
EDC2 EDC1
R2
EDC3 EDC0
D2
DBI0# DBI3#
D13
DBI1# DBI2#
P13
DBI2# DBI1#
P2
DBI3# DBI0#
J12
CK
J11
CK#
J3
CKE#
J5
A12/A13
K4
A8/A7 A10/A0
K5
A11/A6 A9/A1
K10
BA1/A5 BA3/A3
K11
BA2/A4 BA0/A2
H10
BA3/A3 BA1/A5
H11
BA0/A2 BA2/A4
H5
A9/A1 A11/A6
H4
A10/A0 A8/A7
A5
NC
U5
NC
J1
MF
J10
SEN
J13
ZQ
J4
ABI#
G3
RAS# CAS#
G12
CS# WE#
L3
CAS# RAS#
L12
WE# CS#
D5
WCK01# W CK23#
D4
WCK01 WCK23
P5
WCK23# W CK01#
P4
WCK23 WCK01
A10
VREFD
U10
VREFD
J14
VREFC
J2
RESET#
G1
VDD
L1
VDD
G4
VDD
L4
VDD
C5
VDD
R5
VDD
C10
VDD
R10
VDD
D11
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VDD
H1
VSS
K1
VSS
B5
VSS
G5
VSS
L5
VSS
T5
VSS
B10
VSS
D10
VSS
G10
VSS
L10
VSS
P10
VSS
T10
VSS
H14
VSS
K14
VSS
170-BALL
SGRAM GDDR5
K4G41325FC-HC04_FBGA170~D
@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
2
FBB_CMD[0..31]
FBB_D[0..31]
FBB_DBI[0..3]
FBB_EDC[0..3]
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CV702
1
1
CV704
CV703
2
2
2
0.1U_0402_10V7K~D
CV705
CV706
1
2
1
1
2
2
1
FBB_CMD[0..31] [28,32]
FBB_D[0..31] [28]
FBB_DBI[0..3] [28]
FBB_EDC[0..3] [28]
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
@
CV707
CV708
1
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
1
0.1
0.1
31 62Tuesday, September 03, 2013
31 62Tuesday, September 03, 2013
31 62Tuesday, September 03, 2013
0.1
Page 32
5
Memory Partition B - Upper 32 bits
FBB_EDC5 FBB_EDC6 FBB_EDC7
FBB_DBI4
RV387
D D
C C
+FBB_VREFD_H
RV396
931_0402_1%
RV398
931_0402_1%
13
D
2
FBVREF_ALTV[24,29,30,31]
B B
A A
QV25
L2N7002WT1G
G
S
5
40.2_0402_1%~D
1 2
CLKB1
RV388
40.2_0402_1%~D
1 2
CV718
0.01U_0402_16V7K~D
+1.5VSDGPU
12
12
CLKB1#
+FBB_VREFD_H
+FBB_VREFC_H
820P_0402_50V7K~D
1
2
1 2
RV389 1K_0402_1%~D
1 2
RV392 1K_0402_1%~D
1 2
RV391 121_0402_1%~D
FBB_WCK45#[28] FBB_WCK45[28]
FBB_WCK67#[28] FBB_WCK67[28]
820P_0402_50V7K~D
820P_0402_50V7K~D
1
1
CV789
CV725
2
2
1
CV726
2
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
CV734
1
1
CV735
2
2
1
2
RV397
549_0402_1%~D
12
RV399
549_0402_1%~D
12
+FBB_VREFC_H
FBB_DBI5 FBB_DBI6 FBB_DBI7 FBB_D42
CLKB1
CLKB1[28]
CLKB1#
CLKB1#[28]
FBB_CMD30
FBB_CMD25
FBB_CMD22 FBB_CMD23 FBB_CMD20 FBB_CMD19
FBB_CMD17 FBB_CMD18 FBB_CMD27 FBB_CMD26
FBB_CMD24 FBB_CMD28 FBB_CMD16 FBB_CMD31 FBB_CMD21
FBB_WCK45# FBB_WCK45
FBB_WCK67# FBB_WCK67
1.33K_0402_1%~D
12
RV394
FBB_CMD29
12
RV395
1.33K_0402_1%~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
@
CV737
1
1
CV736
2
2
FBB_SEN2
+1.5VSDGPU
CV738
4
NORMAL
UV10
MF=0 MF=1 MF=0MF=1
C2
EDC0 EDC3
C13
EDC1 EDC2
R13
EDC2 EDC1
R2
EDC3 EDC0
D2
DBI0# DBI3#
D13
DBI1# DBI2#
P13
DBI2# DBI1#
P2
DBI3# DBI0#
J12
CK
J11
CK#
J3
CKE#
J5
A12/A13
K4
A8/A7 A10/A0
K5
A11/A6 A9/A1
K10
BA1/A5 BA3/A3
K11
BA2/A4 BA0/A2
H10
BA3/A3 BA1/A5
H11
BA0/A2 BA2/A4
H5
A9/A1 A11/A6
H4
A10/A0 A8/A7
A5
NC
U5
NC
J1
MF
J10
SEN
J13
ZQ
J4
ABI#
G3
RAS# CAS#
G12
CS# WE#
L3
CAS# RAS#
L12
WE# CS#
D5
WCK01# WCK23#
D4
WCK01 WCK23
P5
WCK23# WCK01#
P4
WCK23 WCK01
A10
VREFD
U10
VREFD
J14
VREFC
J2
RESET#
G1
VDD
L1
VDD
G4
VDD
L4
VDD
C5
VDD
R5
VDD
C10
VDD
R10
VDD
D11
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VDD
H1
VSS
K1
VSS
B5
VSS
G5
VSS
L5
VSS
T5
VSS
B10
VSS
D10
VSS
G10
VSS
L10
VSS
P10
VSS
T10
VSS
H14
VSS
K14
VSS
170-BALL
SGRAM GDDR5
K4G41325FC-HC04_FBGA170~D
@
4
DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9 DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31
3
A4
FBB_D32
A2
FBB_D33FBB_EDC4
B4
FBB_D34
B2
FBB_D35
E4
FBB_D36
E2
FBB_D37
F4
FBB_D38
F2
FBB_D39
A11
FBB_D40
A13
FBB_D41
B11 B13
FBB_D43
E11
FBB_D44
E13
FBB_D45
F11
FBB_D46
F13
FBB_D47
U11
FBB_D48
U13
FBB_D49
T11
FBB_D50
T13
FBB_D51
N11
FBB_D52
N13
FBB_D53
M11
FBB_D54
M13
FBB_D55
U4
FBB_D56
U2
FBB_D57
T4
FBB_D58
T2
FBB_D59
N4
FBB_D60
N2
FBB_D61
M4
FBB_D62
M2
FBB_D63
+1.5VSDGPU
B1
VDDQ
D1
VDDQ
F1
VDDQ
M1
VDDQ
P1
VDDQ
T1
VDDQ
G2
VDDQ
L2
VDDQ
B3
VDDQ
D3
VDDQ
F3
VDDQ
H3
VDDQ
K3
VDDQ
M3
VDDQ
P3
VDDQ
T3
VDDQ
E5
VDDQ
N5
10U_0603_6.3V6M~D
VDDQ
E10
VDDQ
N10
VDDQ
B12
VDDQ
D12
VDDQ
F12
VDDQ
H12
VDDQ
K12
VDDQ
M12
VDDQ
P12
VDDQ
T12
VDDQ
G13
VDDQ
L13
VDDQ
B14
VDDQ
D14
VDDQ
F14
VDDQ
M14
VDDQ
P14
VDDQ
T14
VDDQ
A1
VSSQ
C1
VSSQ
E1
VSSQ
N1
VSSQ
R1
VSSQ
U1
VSSQ
H2
VSSQ
K2
VSSQ
A3
VSSQ
C3
VSSQ
E3
VSSQ
N3
VSSQ
R3
VSSQ
U3
VSSQ
C4
VSSQ
R4
VSSQ
F5
VSSQ
M5
VSSQ
F10
VSSQ
M10
VSSQ
C11
VSSQ
R11
VSSQ
A12
VSSQ
C12
VSSQ
E12
VSSQ
N12
VSSQ
R12
VSSQ
U12
VSSQ
H13
VSSQ
K13
VSSQ
A14
VSSQ
C14
VSSQ
E14
VSSQ
N14
VSSQ
R14
VSSQ
U14
VSSQ
1U_0402_6.3V6K~D
CV727
1
1
2
2
FBB_CMD[0..31]
FBB_D[32..63]
FBB_DBI[4..7]
FBB_EDC[4..7]
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
CV730
1
1
1
CV729
CV728
2
2
2
FBB_CMD[0..31] [28,31]
FBB_D[32..63] [28]
FBB_DBI[4..7] [28]
FBB_EDC[4..7] [28]
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
@
CV731
CV732
CV733
1
1
2
2
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.
3
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.
Issued Date
Issued Date
Issued Date
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2
Deciphered Date
Deciphered Date
Deciphered Date
1
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Block Diagram
Block Diagram
Block Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
32 62Tuesday, September 03, 2013
32 62Tuesday, September 03, 2013
32 62Tuesday, September 03, 2013
0.1
0.1
0.1
Page 33
5
+1.05VS to +1.05VSDGPU
+VCCP
UZ1
SI4634DY-T1-GE3
8 7 6
D D
3.3VS_GFX_EN
ST
1 2
RZ5 60.4K_0402_1%~D
GC6
C C
DGPU_PWR_EN
DGPU_PWROK[20,59]
B B
PT
FB_Clamp
5
PT
+3VS
RZ484 10K_0402_5%~D
1 2
QZ18
13
D
2N7002_SOT23-3
2
G
S
1 2
RZ9 0_0402_5%~D@
DZ2
2
1
3
BAT54CW-7-F_SOT323-3~D
4
0.047U_0402_16V4Z~D
1
2
G
2
1 2 3
0.047U_0402_16V4Z~D
1
CZ6
2
3
S
D
1
RZ472 10K_0402_5%~D
1 2
12
@
100K_0402_5%~D
+1.05VSDGPU
3.5A
PT
CZ8
FB_Clamp
QZ25 AO3413_SOT23-3~D
FB_CLAMP_MON
DGPU_FB_EN
RZ485
PT
4
FB_Clamp [24,28,38]
FB_CLAMP_MON [24]
DGPU_FB_EN [57]
3
+3VS to +3VS_DELAY
+3VALW
DGPU_PWR_EN[18,24,59]
DGPU_PWR_EN
2
GPU Power Up Power Rail Sequence
Driver call
+3V_GPU
+GPU_CORE
+1.5V_GPU
+1.05V_GPU
The ramp time for any rail must be more than 40us.
GPU Power Down Sequence
First rail to power down
Last rail to power down
Toff < 10ms
to enable GPU
Power EN
NV3V3Pgood
27Mhz
GPU all PG
CLK REQ#
100MHz
GPU Reset#
PCIe Training
2
+3VS +3VS_DELAY
+VSBP
12
RZ8
12
RZ3 100K_0402_5%~D
3.3VS_GFX_ON#
61
QZ2A DMN66D0LDW-7_SOT363-6~D
GPU Power Up Sub-system Sequence
T1
100K_0402_5%~D
3
5
QZ2B DMN66D0LDW-7_SOT363-6~D
4
3.3VS_GFX_EN
T9 T 2 T 3
QZ1
SI3456DDV-T1-GE3_TSOP6~D
D
6
2 1
G
T8
T4 T5 T6 T7
1.4A
S
45
3
1
CZ7
0.01U_0402_16V7K~D
2
1
GPU Power Down Sub-system Sequence
T1
T7
PT
T1 Custom T2 >0 T3 >0 T4 >0 T5 >100us T6 >0 T7 <48ms T8 500ms T9 >0
GPU Disable call
Link tear down
GPU Reset#
Discharge
RZ15 1_0402_5%
QZ17A
+3VS_DELAY
12
3
5
4
PTPT
RZ6
100_0603_5%~D
2N7002DW-7-F_SOT363-6
QZ17B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
+1.5VSDGPU +1.05VSDGPU
+3VALW
12
A A
DGPU_FB_EN
2
G
RZ12 100K_0402_5%~D
13
D
QZ19 2N7002_SOT23-3
S
5
12
RZ10 10_0402_1%
2N7002DW-7-F_SOT363-6
61
QZ5A
2
3.3VS_GFX_ON#
12
3
5
4
RZ11 1_0402_5%
2N7002DW-7-F_SOT363-6
QZ5B
+GPU_CORE
12
61
2
4
2N7002DW-7-F_SOT363-6
Power EN
27Mhz
100MHz
NV3V3Pgood
Call Return
Deciphered Date
Deciphered Date
Deciphered Date
T1 Custom T2 >0 T3 >0 T4 <=0 T5 >=0 T6 Custom T7 Custom
T2 T3 T4 T5 T6
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
1
0.1
0.1
33 62Tuesday, September 03, 2013
33 62Tuesday, September 03, 2013
33 62Tuesday, September 03, 2013
0.1
Page 34
A
+5VALW to +5VS +3VALW to +3VS
+5VALW +5VS
PM_SLP_S3#[18,38,40,43,55,56]
1 1
PM_SLP_S3#
+5VALW
PM_SLP_S3#
PT
+3VALW +3VS
UZ4
1
VIN1
2
VIN1
3
ON1
4
VBIAS
5
ON2
6
VIN2
7
VIN2
TPS22966DPUR_SON14_2X3~D
VOUT1 VOUT1
VOUT2 VOUT2
GPAD
B
14 13
12
CT1
11
GND
10
CT2
9 8
15
JP802
@
2
+5VS_TPS
CZ15 470P_0603_50V7K
CZ38 470P_0603_50V7K
+3VS_TPS
JUMP_43X118
1 2
1 2
2
JUMP_43X118
112
JP803
@
112
1495mA
41mA
20
C
D
E
+3VALW+5VALW
Close UZ4Close UZ4
1U_0603_10V6K
RZ600
11K_0402_1%
RZ601
20K_0402_1%
1
CZ28
@
1U_0603_10V6K~D
2
+3VS
12
CZ600
+1.5VS_G9141
12
12
RZ602
100K_0603_1%
1 2
VSET
12
CZ602
0.1U_0402_25V6
UZ600
1
SHDN#
2
IN
3
OUT
4
SET
G9141P11U_SO8
1
CZ11
10U_0805_10V6M~D
2
8
GND
7
GND
6
GND
5
GND
1
CZ29
@
1U_0603_10V6K~D
2
+3VS To +1.5VS +3VALW to +3V_PCH
2 2
@
JP11
CZ601
4.7U_0603_6.3VAK
PAD-OPEN 43x39
12
PT
12
4mA
46
+1.5VS
Discharge
3 3
+3VS+5VS
1
CZ20 10U_0805_10V6M~D
2
+3VALW
1
2
CZ32 1U_0603_10V6K~D
For deep S3
PM_SLP_SUS#[18,38]
ST
5
4
UZ14
VOUT
VIN
GND
SS
G5243AT11U_SOT23-5
100K_0402_5%~D
@
JP14
PAD-OPEN 43x39
CZ45 10U_0805_10V6M~D
12
+3V_PCH_APL
1
2
3
EN
1
2
12
RZ30
483mA
+3V_PCH
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
A
B
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
C
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet of
Compal Electronics, Inc.
DC/DC Interface
DC/DC Interface
DC/DC Interface
LA-9941P
E
34 62T uesday, September 03, 2013
34 62T uesday, September 03, 2013
34 62T uesday, September 03, 2013
of
of
0.1
0.1
0.1
Page 35
5
eDP Redriver
D D
4
3
eDP Conn.
ENBKL[ 18,38]
eDP_PWM[18]
QT
BKOFF#
EDP_TXP0[8]
EDP_TXN0[8]
EDP_TXP1[8]
EDP_TXN1[8]
EDP_TXP2[8]
EDP_TXN2[8]
BKOFF#[38]
RV11 0_0402_5%~D
T
Q
1 2
RV12 0_0402_5%~D
EC_INV_PWM[38]
QT
BKOFF#
1 2
BAT54CW-7-F_SOT323-3~D
DV10
2
3
BAT54CW-7-F_SOT323-3~D
DV21 RB751V40_SC76-2
@
1 2
CH23 0.1U_0402_10V7K~D
1 2
CH25 0.1U_0402_10V7K~D
1 2
CH29 0.1U_0402_10V7K~D
1 2
CH32 0.1U_0402_10V7K~D
1 2
CH31 0.1U_0402_10V7K~D
1 2
CH40 0.1U_0402_10V7K~D
DV13
2
1
3
1
12
EDP_TXP0_C
EDP_TXN0_C
EDP_TXP1_C
EDP_TXN1_C
EDP_TXN2_C
DISPOFF#
12
RV403 10K_0402_5%~D
INV_PWM
12
RV408 100K_0402_5%~D
LV16
EMC@
1 2
QT
DLP11SN900HL2L_4P
LV17
EMC@
1 2
QT
DLP11SN900HL2L_4P
LV19
EMC@
1 2
Q
T
DLP11SN900HL2L_4P
2
+EDPVDD
10U_0805_10V4Z~D
0.1U_0402_16V7K~D
QT
@
CV3508
CV3501
1
1
2
2
EDP_TXP0_R
34
EDP_TXN0_R
EDP_TXP1_R
34
EDP_TXN1_R
EDP_TXP2_REDP_TXP2_C
34
EDP_TXN2_R
+INV_PWR_SRC
LCD_TEST[38]
LCD_DCR[20]
LCD_DBC[20]
60mils
W=
1 2
RV480 0_0402_5%@
ST
ST
1 2
RV481 0_0402_5%@
+EDPVDD
W=60mils
ST
1 2
RV482 0_0402_5%@
Color_CLK Color_DAT
INV_PWM DISPOFF#
EDP_HPD_S
EDP_AUXN_R EDP_AUXP_R
EDP_TXP0_R EDP_TXN0_R
EDP_TXP1_R EDP_TXN1_R
EDP_TXP2_R EDP_TXN2_R
EDP_TXP3_R EDP_TXN3_R
1
JEDP1
CONNTST40MGND1
39
LCD_VDD
38
LCD_VDD
37
V_EDID
36
BIST
35
EDID_CLK
34
EDID_DATA
33
LVDS_A0-
32
LVDS_A0+
31
LVDS_A1-
30
LVDS_A1+
29
LVDS_A2-
28
LVDS_A2+
27
GND
26
LVDS_A_CLK-
25
LVDS_A_CLK+
24
GND
23
LVDS_B0-
22
LVDS_B0+
21
LVDS_B1-
20
LVDS_B1+
19
LVDS_B2-
18
LVDS_B2+
17
GND
16
LCD_B_CLK-
15
LCD_B_CLK+
14
VR_GND
13
VR_GND
12
VR_GND
11
CONNTST_GND
10
PWM
9
DISP_ON/OFF#
8
NC
7
VR_SRC
6
VR_SRC
5
VR_SRC
4
BREATH_WHITE_LED
3
BATT_YELLOW_LED
2
BATT_WHITE_LED
1
GND
MGND2 MGND3 MGND4 MGND5 MGND6
ACES_59003-04006-001
CONN@
41 42 43 44 45 46
DLP11SN900HL2L_4P
1 2
EDP_AUXN[8]
EDP_AUXP[8]
CH41 0.1U_0402_10V7K~D
1 2
CH42 0.1U_0402_10V7K~D
1 2
CH43 0.1U_0402_10V7K~D
1 2
CH44 0.1U_0402_10V7K~D
LI4
@
DLW21SN900HQ2L_0805_4P~D
4
4
112
1 2
RI9 0_0402_5%~DEMC@
1 2
RI8 0_0402_5%~DEMC@
2.2K_0402_5%~D
Color_CLK
Color_DAT
3
3
2
EDP_TXP3[8]
EDP_TXN3[8]
C C
LCD PWR CTRL
+3VS
W=
60mils
1
CV26 1U_0603_10V6K~D
2
eDP_LVDDEN
eDP_LVDDEN[18]
EC_ENVDD
EC_ENVDD[38]
12
DV18 RB751V40_SC76-2
12
DV19 RB751V40_SC76-2@
1 2
RV415 0_0402_5%@
UV12
VOUT
5
VIN
GND
4
SS
EN
APL3512ABI-TRG_SOT23-5
QT
T
P
+LCDVDD_R
12
RV405 10K_0402_5%~D
ST
B B
LCD backlight PWR CTRL
1
CV751
0.1U_0402_25V6K~D
2
+LCDVDD_R
B+
QV29 SI3457BDV-T1-E3_TSOP6~D
D
6
12
RV412 1M_0402_5%~D
PWR_SRC_ON
12
RV413 1M_0402_5%~D
13
D
QV30 SSM3K7002FU_SC70-3~D
S
S
4 5
G
3
2 1
mil
60
2
G
W=60mils
1
2
3
1
CV752
0.1U_0402_25V6K~D
2
+EDPVDD
+INV_PWR_SRC
Touch Screen
60mil
USB20_P9[19]
USB20_N9[19]
EDP_TXN3_C
RV334
EDP_AUXN_C
EDP_AUXP_C
+EDPVDD
12
12
RV333
2.2K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
USB20_P9_R
USB20_N9_R
QT
EMC@
EMC@
QT
1 2
LV20
LV18
1 2
DLP11SN900HL2L_4P
+EDPVDD
RV416
@
1_0402_5%
1 2
2
6 1
QV7A
354
DMN66D0LDW-7_SOT363-6~D
34
EDP_TXP3_REDP_TXP3_C
EDP_TXN3_R
EDP_AUXN_R
34
EDP_AUXP_R
1 2
RV419 1_0402_5%
QV7B
PCH to EC
PCH_SMLCLK [17,25,38,40]
PCH_SMLDATA [17,25,38,40]
USB20_P9_R USB20_N9_R
LCD_DELAY [38]
PESD5V0U2BT_SOT23-3~D
@
2
3
DI3
1
EDP_HPD_S
PT
TS_sleep#[38]
LID_SW_IN#[38,40]
+3VS
PT
+VCCIO_OUT
12
13
2
G
12
RV469 100K_0402_5%~D
+3VS
PT
1 2
DV17 RB751V40_SC76-2
1 2
DV20 RB751V40_SC76-2
1 2
RV5 10K_0402_5%~D
RV470 10K_0402_5%~D
D
QV38 SSM3K7002FU_SC70-3~D
S
EDP_HPD [8]
JTS
1
1
2
2
3
3
4
4
5
5
6
6
7
GND
8
GND
ACES_50208-00601-P01
CONN@
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
eDP /camera conn.
eDP /camera conn.
eDP /camera conn.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LA-9941P
Date: Sheet
Date: Sheet
Date: Sheet
1
of
of
of
35 62Wednesday, September 04, 2013
35 62Wednesday, September 04, 2013
35 62Wednesday, September 04, 2013
0.1
0.1
0.1
Page 36
5
HDMI Active Level Shift(ALS type)
D D
+3VS
12
RV431
@
4.7K_0402_5%~D
HDMI_BUF
12
RV430
@
4.7K_0402_5%~D
Enable active DDC buffer; Internal pull down at ~150KΩ, 3.3V I/O L: default, passive DDC pass-through H: active DDC buffer with internal pull up2.36K resistor
C C
M: active DDC buffer without internal pull up resistor
+3VS +3VS
12
RV450 10K_0402_1%~D
12
RV451
@
10K_0402_1%~D
PT
12
RV448
@
4.7K_0402_5%~D
HDMI_PRE HDMI_EQ
12
@
4.7K_0402_5%~D
RV449
ST
Output pre-emphasis setting; Internal pull down at ~150kΩ, 3.3V I/O. L: no pre-emphasis H: 1.6dB pre-emphasis M: 3.0dB pre-emphasis
B B
Receiver equalization setting; Internal pull down at ~150kΩ, 3.3V I/O. L: programmable EQ for channel loss up to 5.3dB H: programmable EQ for channel loss up to 10dB M: programmable EQ for channel loss up to 14dB
HDMI_A2P_VGA[8] HDMI_A2N_VGA[8]
HDMI_A1P_VGA[8] HDMI_A1N_VGA[8]
HDMI_A0P_VGA[8] HDMI_A0N_VGA[8]
HDMI_A3P_VGA[8] HDMI_A3N_VGA[8]
4
CV765 0.1U_0402_10V7K~D CV764 0.1U_0402_10V7K~D
CV763 0.1U_0402_10V7K~D CV762 0.1U_0402_10V7K~D
CV761 0.1U_0402_10V7K~D CV760 0.1U_0402_10V7K~D
CV759 0.1U_0402_10V7K~D CV758 0.1U_0402_10V7K~D
+3VS
+3VS
+3VS
12
RV460
@
4.7K_0402_5%~D
HDMI_ISET
12
RV459
@
4.7K_0402_5%~D
+1.5VS
0.1U_0402_10V7K~D
1
CV772
2
1 2
1 2
T118 PAD@
1 2
0.01U_0402_16V7K~D
1
CV744
2
0.1U_0402_10V7K~D
1
CV775
2
12 12
12 12
12 12
12 12
RV429 4.7K_0402_5%~D@
RV458 4.99K_0402_1%~D
RV444 4.7K_0402_5%~D
0.01U_0402_16V7K~D
1
CV756
2
TMDS_TX2P TMDS_TX2N
TMDS_TX1P TMDS_TX1N
TMDS_TX0P TMDS_TX0N
TMDS_TXCP TMDS_TXCN
HDMI_BUF
HDMI_EQ
HDMI_HPLUG
HDMI_PD#
HDMI_PRE
3
U22
19
VDD15_1
20
VDD15_2
31
VDD15_3
40
VDD15_4
1
IN_D2+
2
IN_D2-
4
IN_D1+
5
IN_D1-
6
IN_D0+
7
IN_D0-
9
IN_CLK+
10
IN_CLK-
14
DDCBUF/SDA_CTL
13
DCIN_EN/SCL_CTL
17
EQ/I2C_ADDR
8
I2C_CTL_EN
28
HPD_SNK
18
REXT
36
PD#
23
CFG
16
PRE
PS8201ATQFN40GTR2A0_TQFN40_5X5
PS8201A --- SA00005PJ00 PS
8401A --- SA00005CW10
VDD33
OUT_D2+ OUT_D2-
OUT_D1+ OUT_D1-
OUT_D0+ OUT_D0-
OUT_CLK+
OUT_CLK-
SDA_SRC
SCL_SRC
SDA_SNK
SCL_SNK
HPD_SRC
NC_1 NC_2 NC_3 NC_4
GND
EPAD
11
30 29
27 26
25 24
22 21
39 38 33 32
3
12 15 34 37
35 41
1
2
TMDS_RD_TX2P TMDS_RD_TX2N
TMDS_RD_TX1P TMDS_RD_TX1N
TMDS_RD_TX0P TMDS_RD_TX0N
TMDS_RD_TXCP
TMDS_RD_TXCN
HDMI_DDB_CTRLDATA HDMI_DDB_CTRLCLK DDC_DAT_HDMI DDC_CLK_HDMI
HDMI_PCH_HPD
HDMI_ISET
for PS8401, PS8201 NC
+1.5VS
+3VS
TMDS_L_TXCN
TMDS_L_TXCP
TMDS_L_TX0N
TMDS_L_TX0P
+3VS
0.1U_0402_10V7K~D
0.01U_0402_16V7K~D
1
CV771
CV743
2
close pin12,37
@
1
2
4
5
3
AZ1045-04F_DFN2510P10E-10-9
2
HDMI_DDB_CTRLDATA [18]
HDMI_DDB_CTRLCLK [18]
HDMI_PCH_HPD [18]
+3VS +1.5VS
1
2
DV4
1
2
4
3
8
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
CV774
CV745
2
9
TMDS_L_TXCN
10
8
TMDS_L_TXCP
9
7
TMDS_L_TX0N
7
6
TMDS_L_TX0P
65
1
Place close to JHDMI1
LV7
EMC@
TMDS_RD_TXCN
TMDS_RD_TXCP TMDS_L_TXCP
TMDS_RD_TX0N
TMDS_RD_TX0P
TMDS_RD_TX1N
TMDS_RD_TX1P
TMDS_RD_TX2N
TMDS_RD_TX2P TM DS_L_TX2P
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
LV8
EMC@
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
LV9
EMC@
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
LV10
EMC@
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
TMDS_L_TX2P
TMDS_L_TX2N
TMDS_L_TX1P
TMDS_L_TX1N
2
TMDS_L_TXCN
2
3
3
2
TMDS_L_TX0N
2
3
TMDS_L_TX0P
3
2
TMDS_L_TX1N
2
3
TMDS_L_TX1P
3
2
TMDS_L_TX2N
2
3
3
DV5
@
1
1
2
4
5
3
AZ1045-04F_DFN2510P10E-10-9
10
2
9
7
4
65
3
8
9
TMDS_L_TX2P
8
TMDS_L_TX2N
7
TMDS_L_TX1P
6
TMDS_L_TX1N
For EMI
HDMI DDC
+5VS
DV11
RB751V40_SC76-2
RV447
1 2
For EMI Reserve
1 2
CV768 0.1U_0402_25V6K~D@
1 2
CV795 0.1U_0402_25V6K~D@
1 2
CV796 0.1U_0402_25V6K~D@
+5V_HDMI_DDC
12
12
RV445
2.2K_0402_5%~D
DDC_CLK_HDMI
A A
DDC_DAT_HDMI
2.2K_0402_5%~D
Place close to JHDMI1
HDMI conn
+5VS
DV8
2 1 3
NC
BAT1000-7-F_SOT23-3~D
HDMI_HPLUG
HDMI_Reserved
HDMI_CEC
W=40mils
HDMIF1 1.5A_6V_1206L150PR~D
12
0.1U_0402_10V7K~D CV766
1
2
JHDMI
HDMI_HPLUG +VDISPLAY_VCC
10U_0603_6.3V6M~D
DDC_DAT_HDMI
CV767
1
DDC_CLK_HDMI HDMI_Reserved HDMI_CEC
2
TMDS_L_TXCN
TMDS_L_TXCP TMDS_L_TX0N
TMDS_L_TX0P TMDS_L_TX1N
TMDS_L_TX1P TMDS_L_TX2N
TMDS_L_TX2P
19
HPD
18
+5V
17
DDC/CEC GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
11
CK_Shield
10
CK+
9
D0-
8
D0_Shield
7
D0+
6
D1-
5
D1_Shield
4
D1+
3
D2-
2
D2_Shield
1
D2+
ACON_HMRB9-AK120C
CONN@
GND1 GND2 GND3 GND4
20 21 22 23
close to JHDMI
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HDMI
HDMI
HDMI
LA-9941P
1
36 62Tuesday, September 03, 2013
36 62Tuesday, September 03, 2013
36 62Tuesday, September 03, 2013
0.1
0.1
0.1
Page 37
5
Mini DP
D D
mDP_A0P_CPU[8] mDP_A0N_CPU[8] mDP_A1P_CPU[8] mDP_A1N_CPU[8] mDP_A2P_CPU[8] mDP_A2N_CPU[8] mDP_A3P_CPU[8] mDP_A3N_CPU[8]
PT
CV779 0.1U_0402_10V6K~D CV780 0.1U_0402_10V6K~D CV781 0.1U_0402_10V6K~D CV782 0.1U_0402_10V6K~D CV783 0.1U_0402_10V6K~D CV784 0.1U_0402_10V6K~D CV785 0.1U_0402_10V6K~D CV786 0.1U_0402_10V6K~D
12 12 12 12 12 12 12 12
DISP_C_A0P DISP_C_A0N DISP_C_A1P DISP_C_A1N DISP_C_A2P DISP_C_A2N DISP_C_A3P DISP_C_A3N
PT
mDP_AUXP_PCH[18] mDP_AUXN_PCH[18]
4
3
2
1
DP Re-Driver config
+3VS +3VS_mDPR +3VS_mDPR
1 2
R8 0_0805_5%@
ST
mDP_DDC_CTRLCLK[18] mDP_DDC_CTRLDATA[18]
CV813 0.1U_0402_10V6K~D CV812 0.1U_0402_10V6K~D
1
1
1
2
C37
0.1U_0402_10V7K~D
1 2
2
C48
1
2
C38
0.1U_0402_10V7K~D
DISP_C_A0P DISP_C_A0N DISP_C_A1P DISP_C_A1N DISP_C_A2P DISP_C_A2N DISP_C_A3P DISP_C_A3N
mDP_PEQ mDP_CFG0
R25154.99K_0402_1%
mDP_HPD
mDP_AUXP_PCH_C mDP_AUXN_PCH_C
0.1U_0402_10V7K~D
38 39 41 42 44 45 47 48
3
4 5
26
7
8
9
33 34
30 29
U11
IN0p IN0n IN1p IN1n IN2p IN2n IN3p IN3n
I2C_ADDR
SCL_CTL/PEQ SDA_CTL/CFG0
PD#
REXT
CAD_SRC
HPD_SRC
SCL_DDC SDA_DDC
AUX_SRCP AUX_SRCN
+3VS_mDPR
25
1
6
12
VCC4
VCC1
VCC2
VCC3
36
23
VCC532VCC6
OUT0p
22
OUT0n
20
OUT1p
19
OUT1n
17
OUT2p
16
OUT2n
14
OUT3p
13
OUT3n
40
CFG1
46
NC
35
RST#
10
CAD_SNK
11
HPD_SINK
28
AUX_SNKP
27
AUX_SNKN
2
CEXT
15
NC2
21
NC3
37
NC4
43
NC5
EPAD
GND3
GND118GND2
49
31
24
PS8330BQFN48GTR-A0_QFN48_7X7
mDP_A0P_R mDP_A0N_R mDP_A1P_R mDP_A1N_R mDP_A2P_R mDP_A2N_R mDP_A3P_R mDP_A3N_R
mDP_CFG1_INPUT
mDP_RST#
CAB_DET_SINK
mDP_HPD_SINK
1
C2020
2.2U_0402_6.3V6M~D
2
12
C93 0.1U_0402_16V7K~D
12
C47 0.1U_0402_16V7K~D
12
C42 0.1U_0402_16V7K~D
12
C53 0.1U_0402_16V7K~D
12
C59 0.1U_0402_16V7K~D
12
C57 0.1U_0402_16V7K~D
12
C54 0.1U_0402_16V7K~D
12
C56 0.1U_0402_16V7K~D
DISP_CLK_AUXP_CONN DISP_DAT_AUXN_CONN
DISP_A0P_R DISP_A0N_R DISP_A1P_R DISP_A1N_R DISP_A2P_R DISP_A2N_R DISP_A3P_R DISP_A3N_R
2
C43
0.1U_0402_10V7K~D
12 12
mDP_RST#
mDP_PEQ
mDP_CFG1_INPUT
mDP_CFG0
1 2
R2534 10K_0402_1%~D
1 2
C2021 2.2U_0402_6.3V6M~D
1 2
R2532 4.7K_0402_5%~D@
1 2
R2535 4.7K_0402_5%~D@
1 2
R2536 4.7K_0402_5%~D@
1 2
R2533 4.7K_0402_5%~D@
1 2
R2530 4.7K_0402_5%~D@
1 2
R2531 4.7K_0402_5%~D@
+3VS_mDPR
+3VS_mDPR
+3VS_mDPR
C C
DV2
@
1
2
21 9
4
4
5
3
3
8
DV3
1
2
21 9
4
4
5
3
3
8
9
DISP_A3P_R
10
8
DISP_A3N_R
7
DISP_A0P_R
7
6
DISP_A0N_R
65
9
DISP_A2N_R
10
8
DISP_A2P_R
7
DISP_A1N_R
7
6
DISP_A1P_R
65
CAB_DET_SINK[18]
Close to JMDP1
2N7002_SOT23-3
+3VS
12
RV452 100K_0402_5%~D
13
D
2
QV37
G
S
DISP_A3P_R
DISP_A3N_R
DISP_A0P_R
DISP_A0N_R
AZ1045-04F_DFN2510P10E-10-9
@
DISP_A2N_R
DISP_A2P_R
DISP_A1N_R
DISP_A1P_R
B B
AZ1045-04F_DFN2510P10E-10-9
DDC Dongle SW for DP
DV9
+3VS
0.01U_0402_16V7K~D
2
1
2 1 3
BAT1000-7-F_SOT23-3~D
12
CV32
RV453 1M_0402_5%~D
DPF1
1 2
1.5A_6V_1206L150PR~D
mDP_HPD_SINK DISP_A0P_R CAB_DET_SINK DISP_A0N_R DISP_CEC
100K_0402_5%~D
DISP_A1P_R
RV491
DISP_A3P_R DISP_A1N_R DISP_A3N_R
DISP_A2P_R DISP_CLK_AUXP_CONN DISP_A2N_R DISP_DAT_AUXN_CONNCAB_DET_SINK#
12
RV490 100K_0402_5%~D
+3VS_DP
NC
+3VS
PT
1 2
DP HPD to PCH (iGPU)
CV770
0.1U_0402_16V7K~D
10U_0603_6.3V6M~D
1
1
CV769
2
2
JMDP
1
GND
2
HPD
3
LANE0_P
4
CONFIG1
5
LANE0_N
6
CONFIG2
7
GND
8
GND
9
LANE1_P
10
LANE3_P
11
LANE1_N
12
LANE3_N
13
GND
14
GND
15
LANE2_P
16
AUX_CH_P
17 18 19
RV456 5.1M_0402_5%
12
1 2
CONN@
CV788 0.1U_0402_10V6K~D
CV787 22U_0805_6.3V6M~D
1
1
2
2
RV411 0_0402_5%@
LANE2_N AUX_CH_N GND DP_PWR20GND4
600032GB020M207ZL
21
GND1
22
GND2
23
GND3
24
ST
PT
DP_PCH_HPD[16,18]
mDP_HPD
DP HPD for DGPU output (Optimus)
PT
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.
5
4
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Mini DP
Mini DP
Mini DP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-9941P
Date: Sheet
Date: Sheet
Date: Sheet
of
of
of
37 62Tuesday, September 03, 2013
37 62Tuesday, September 03, 2013
37 62Tuesday, September 03, 2013
1
0.1
0.1
0.1
Page 38
5
EC KB9012
12
D D
+3VS
+3VALW_EC
RE11 47K_0402_5%~D
RE28 10K_0402_5%~D@
RE76 10K_0402_5%~D@
+3VALW_EC
+3VS
RE43 10K_0402_5%~D@
1 2
C C
RE57 10K_0402_5%~D@
1 2
CE14 0.1U_0402_16 V7K~D
T43 revrese under Keyboard for easy to debug
+3VALW_EC
B B
+3VALW
RE64 10K_0402_5%~D@
A A
PT
RE56 0_0402_5%~D@
+3VLP
RE60 0_0402_5%@
+3VALW
ST
CLK_PCI_LPC
RE13
@
33_0402_5%~D
1
CE11
@
22P_0402_50V8J~D
2
RPE2
1 8 2 7 3 6 4 5
4.7K_8P4R_5%
1 2
1 2
1 2
RPH19
1 8 2 7 3 6 4 5
2.2K_8P4R_5%
1 2
T43 PAD@
RE20 47K_0402_5%~D
1 2
CE20 0.1U_0402_16 V7K~D
1 2
H_PROCHOT#[53,58,8]
TP_CLK TP_DATA ESB_CLK ESB_DAT
EC_RST#
EAPD#
WAKE_PCH#
PCH_SMLCLK PCH_SMLDATA EC_SMB_CK1 EC_SMB_DA1
KSO3
PLT_RST#
EC_RST#
PCH_SMLCLK[17,25,35,40]
EC to Ambient Light Sensor, GPU,RTC Counter
1 2
PCH_SMLDATA[17,25,35,40]
PM_SLP_S3#[18,34,40,43,55 ,56] PM_SLP_S5#[18]
EC_TX[42]
LCD_TEST
H_PROCHOT# H_PROCHOT#_EC
1
CE21
47P_0402_50V8J~D
2
1 2
1 2
EC to BAT,Charge
SUSCLK_R[18,40]
KC3810_RST#
PT
+3VALW_EC
10U_0603_6.3V6M~D
CE22
1
2
EC_RUNTIME_SCI#[20]
DRAMRST_CNTRL_S3[14,8]
KSI[0..7][39]
KSO[0..16][39]
QT
SYSTEM_FAN2_FB[40]
RE39 0_0402_5%~DEMC@
+3VS
1
CE19
0.1U_0402_16V7K~D
2
5
UE2 SN74LVC1G06DCKR_SC70-5
P
2
Y4A
G3NC
1
0.1U_0402_16V7K~D
1
2
LPC_FRAME#[17,40,42]
CLK_PCI_LPC[17]
PLT_RST#[18,40,42,6,8]
KSO[0..16]
PCH_SUSWARN#[18]
EC_SMB_CK1[52,53] EC_SMB_DA1[52,53]
BATT_LED#_LV5[49] EC_INV_PWM[35]
SYSTEM_FAN_FB[39]
AUD_MUTE[48]
WAKE_PCH#[20]
1 2
PT
1
CE4
2
GATEA20[20] KB_RST#[20]
SERIRQ[17,40]
LPC_AD3[17,40,42] LPC_AD2[17,40,42] LPC_AD1[17,40,42] LPC_AD0[17,40,42]
KSI[0..7]
EC_SMI#[20]
PS_ID[52]
SUSACK#[18]
VR_ON[58]
100K_0402_5%~D
FB_Clamp_REQ#[24]
12
RE42 100K_0402_5%~D
0.1U_0402_16V7K~D
Power on Circuit
RE47 10K_0402_5%~D
1 2
+3VLP
BATBTN#[49]
PBTN_SW#[39]
RE48 10K_0402_5%~D
+3VLP
1 2
PBTN_SW#
5
DE8 RB751V40_SC76-2
1 2
DE9 RB751V40_SC76-2
1 2
CE5
RE40
GPU_HOT#[24]
USB_D_PD#[40,45]
LCD_DELAY[35]
LCD_TEST[35]
1
2
FB_Clamp[24,28,33]
TS_sleep#[35]
4
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1
CE6
2
GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0
CLK_PCI_LPC PLT_RST# EC_RST# EC_RUNTIME_SCI#
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16
PCH_SUSWARN#
EC_SMB_CK1 EC_SMB_DA1 PCH_SMLCLK PCH_SMLDATA
EC_SMI# PS_ID ESB_CLK ESB_DAT BATT_LED#_LV5
SYSTEM_FAN_FB SYSTEM_FAN2_FB EC_TX EC_RX AUD_MUTE
WAKE_PCH#
VR_ON
EC_CRY2
12
1
EMC@
2
+3VLP
12
1
2
4
1000P_0402_50V7K~D
1
CE7
CE8
2
M2
L2 M3 K4 N3 M4 K5 N4
N5 M5
K13
N6 M6
D9
E12 E13 D12 D13 C12 C13 D10 J13 J12 H12 H13 H10
H9 G9
G10 G13 G12
F13 F12 F10
F9
E10
E9 E8 D8
A8 A7 B8 A6
J5 N9
L13
K6 N7 M7 N8 K8
M11
N11 K10
K9
N12
M13
L12
J1 K1
CE18
20P_0402_50V8J~D
ESB_CLK
GPU_HOT#
KC3810_RST#
ESB_DAT
USB2_DET_EC#_D
FB_Clamp_REQ#
THM_OVERT#[24]
RE49 100K_0402_5%~D
EC_ON_CTRL#BATBTN#
CE26
0.1U_0402_25V6K~D
1000P_0402_50V7K~D
1
CE9
2
UE1
GA20/GPIO00 KBRST#/GPIO01 SERIRQ# LFRAME# LAD3 LAD2 LAD1
LPC & MISC
LAD0
PCICLK PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D
KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24
Int. K/B
KSO5/GPIO25
Matrix
KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49
SCL0/GPIO44 SDA0/GPIO45
SM Bus
SCL1/GPIO46 SDA1/GPIO47
PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 LID_SW#/GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C EC_PME#/GPIO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB0/GPIO14 FANFB1/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A
XCLKI XCLKO
KB9012BF A4 LFBGA128P
UE36
1
ESB_CLK
2
GPIO00
3
RST#
4
ESB_DAT
5
GPIO01
6
GPIO02
7
GPIO03
8
GPIO04
9
GPIO05
10
GPIO06
11
GPIO07/CAS_CLK
12
GND
KC3810_QFN24_4X4
USBCHG_DET_D
2.2K_0402_1%
EC_ON
2.2K_0402_1%
VCOUT0_PH#
LE1 FBMA-L11-160808-8 00LMT_0603
1 2
+EC_VCCA
J7
K12
M12
B11
K7
J4
J6
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
INVT_PWM/PWM0/GPIO0F
ACOFF/FANPWM1/GPIO13
PWM Output
AD Input
DA Output
PS2 Interface
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
SPI Device Interface
SPI Flash ROM
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
GPIO
BATT_LOW_LED#/GPIO54
VR_ON/XCLK32K/GPIO57
EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04
GPO
GPIO
PM_SLP_S4#/GPXIOD01
GPI
GND
GND
GND
AGND
GND
GND
J8
J9
G2
J10
A11
N13
GPIO08/CAS_DAT
GPIO0C/PWM0
GPIO0D/PWM1
GPIO0E/PWM2
GPIO0F/PWM3
GPIO10/ESB_RUN#
GPIO11/BaseAddOpt
DE305 RB751V40_SC76-2
1 2
RE341
DE303 RB751V40_SC76-2
1 2
RE340
DE304 RB751V40_SC76-2
1 2
1 2
RE321
@
0_0402_5%
DE306 RB751V40_SC76-2
1 2
1 2
RE322
@
0_0402_5%
ST
3
1
CE10
0.1U_0402_16V7K~D
2
ECAGND
M9
KB_LED_PWM
M8
BEEP#/PWM1/GPIO10
FANPWM0/GPIO12
BATT_TEMP/AD0/GPI38
BATT_OVP/AD1/GPI39
ADP_I/AD2/GPI3A
SELIO2#/AD5/GPI43
DAC_BRIG/DA0/GPO3C EN_DFAN1/DA1/GPO3D
IREF/DA2/GPO3E
DA3/GPO3F
PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D
SDICS#/GPXIOA00 SDICLK/GPXIOA01
SDIDO/GPXIOA02
SDIDI/GPXIOD00
SPICLK/GPIO58
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
CAPS_LED#/GPIO53
SUSP_LED#/GPIO55
SYSON/GPIO56
AC_IN/GPIO59
EC_ON/GPXIOA05
EC_SWI#/GPXIOA06
ICH_PWROK/GPXIOA07
BKOFF#/GPXIOA08
WL_OFF#/GPXIOA09
ENBKL/GPXIOD02
20mil
ECAGND
TEST_EN#
GPIO09
GPIO0A
GPIO0B
VCC
GND
25
12
12
BEEP#
M10 N10
B13 A13 B12
ADP_I
A12
AD_BID0
AD3/GPI3B
E7
AD4/GPI42
D7
B10
BATT_LED#_LV1
A9
ACOFF
A10
EC_ENVDD
B9
BATT_LED#_LV2
D6 E6
PCH_PWROK_EC
E5
AC_PRESENT
D5 A5
TP_CLK
B5
TP_DATA
B1 A1 C1
HDA_SDO
C2
J2
USB1_DET_EC#_D
MOSI
K2
USB0_DET_EC#_D
MISO
M1
EC_BATT_PRS#
N2
BATT_LED#_LV3
SPICS#
B6 B7 B4 A4 B3
CAPS_LED#
A3
PWRBTN_LED#
A2
BATT_LED#_LV4
B2
5VA_EN
H5
LID_SW_IN#
N1
PM_SLP_S4#
D4
PCH_RSMRST#
D1 D2 E2
H_PROCHOT#_EC
E4
VCOUT0_PH#
E1
BKOFF#
F4
EN_WLANPWR#
F2
PM_SLP_SUS#
GPXIOA10
F1
HWPG
GPXIOA11
F5
AC_IN
G1
EC_ON
G5
GPXIOD03
H1
GPXIOD04
G4
BATBTN#
GPXIOD05
H4
PBTN_OUT#
GPXIOD06
H2
GPXIOD07
EC_PECI
L1
+V18R
V18R
LE2 FBMA-L11-1 60808-800LMT_0603
1 2
13
RE74 4.7K_0402_5%~D
1 2
14
15
16
17
18
USB3_DET_EC#_D
19
20
CCD_INT#
21
WLAN_WAKE#
22
USB_ILIM_SEL
23
1 2
QT
RE469 0_0402_5%~D@
24
+3VALW_EC
0.1U_0402_16V7K~D
1
CE15
2
3VA_EN
12
@
3
2
+3VLP
CE13 100P_0402 _50V8J~DEMC@
KB_LED_PWM [39] BEEP# [47] SYSTEM_FAN2_PWM [40] SYSTEM_FAN_PWM [39]
MEM_TEMP0 [41] FAN_TEMP0 [41]
ADP_I [52,53]
SKIN_TEMP0 [41] SKIN_TEMP1 [41]
BATT_LED#_LV1 [49] ACOFF [53] EC_ENVDD [35]
BATT_LED#_LV2 [49]
EAPD# [47]
PCH_PWROK_EC [18]
AC_PRESENT [1 8]
USB1_PWR_EN_EC [44 ]
TP_CLK [39] TP_DATA [39]
USB0_PWR_EN_EC [44 ]
IMVP_VR_PG [18,58,6]
HDA_SDO [16]
VCIN0_PH [8]
EC_BATT_PRS# [52,53 ] BATT_LED#_LV3 [49]
MEM_TEMP1 [41] FAN_TEMP1 [41] USB0_CTL1 [44]
BATT_LOW_LED# [49 ] CAPS_LED# [39] PWRBTN_LED# [39] BATT_LED#_LV4 [49]
5VA_EN [54] LID_SW_IN# [35,40] PM_SLP_S4# [18,55]
PCH_RSMRST# [18]
H_PROCHOT#_EC [53]
BKOFF# [35] EN_WLANPWR# [40]
PM_SLP_SUS# [18,34]
USB1_CTL1 [44]
PBTN_OUT# [18,6]
1 2
+3VALW_EC
USB2_CTL1 [40]
USB3_CTL1 [40]
USB2_PWR_EN_EC [40 ]
DSP_PD# [46]
USB3_PWR_EN_EC [40 ]
CCD_INT# [40]
USB_ILIM_SEL [40,44]
ENBKL
ENBKL [18,35 ]
3VA_EN [54]
1 2
T126PAD @
VCIN1_PH [52]
QT
QT
USB0_DET_EC#[45]
USB1_DET_EC#[45]
USB2_DET_EC#[40]
USB3_DET_EC#[40]
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
EC_BATT_PRS#
RE38 43_0402_1%
1
CE17
4.7U_0805_10V6
2
60 mil
CE322
1U_0603_10V6K~D
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIONOF R&D
ANDTRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIONOF R&D
ANDTRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIONOF R&D DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THEINFORMATION IT CONTAINS
DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THEINFORMATION IT CONTAINS
DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THEINFORMATION IT CONTAINS MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTYWITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTYWITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTYWITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Close to pin B13
VCOUT0_PH#
EC_ON_CTRL#
H_PECI [8]
QT
CCD_INT#
ECAGND
RE32 10K_0402_5%~D@
1 2
AC_IN [53]EC_RX[42]
HWPG
+V1.05S_VCCP_PWRGOOD[56,8]
PT
RE34 10K_0402_5%~D
1 2
DE7 RB751V40_SC76-2
1 2
DE13 RB751V40_SC76-2
1 2
DE14 RB751V40_SC76-2
1 2
DE17 RB751V40_SC76-2
1 2
DE10 RB751V40_SC76-2
1 2
DE15 RB751V40_SC76-2
1 2
DE16 RB751V40_SC76-2
1 2
DE18 RB751V40_SC76-2
1 2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
EC_WLAN_WAKE#[40]
+3VS
RE12
QT
100K_0402_1%
N15@
FB_Clamp_REQ#
USB_ILIM_SEL
AC_IN
VR_ON
AC_IN
EC_ON
+3VLP
RE27 0_0402_5%@
1 2
10K_0402_5%~D
10K_0402_5%~D
RE72
RE71
12
12
+3VLP
12
RE50 100K_0402_5%~D
USBCHG_DET#_D
12
RE44
@
150K_0402_5%
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1
Board ID
+3VALW_EC
12
RE9
Ra
100K_0402_5%~D
AD_BID0
12
RE12 33K_0402_1%
Rb
N14@
Analog Board ID definition, Please see page 4.
RE33 10K_0402_5%~D
1 2
RE61 10K_0402_5%~D
1 2
RE58 100K_0402_5%~D@
1 2
RE36 10K_0402_5%~D
1 2
CE16 100P_0402 _50V8J~DEMC@
1 2
CE23 0.1U_0402_16 V7K~D
1 2
DE12 RB751V40_SC76-2
1 2
+3VALW_EC
12
RE29 10K_0402_5%~D
+3VALW_EC
10K_0402_5%~D
10K_0402_5%~D
RE55
RE69
12
12
USB0_DET_EC#_D
USB1_DET_EC#_D
USB2_DET_EC#_D
USB3_DET_EC#_D
+3VLP
12
RE59 100K_0402_5%~D
USBCHG_DET_D
13
D
QE1
2
2N7002_SOT23-3
G
S
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
EC ENE-KB930/ ENE3810
EC ENE-KB930/ ENE3810
EC ENE-KB930/ ENE3810
LA-9941P
1
1
CE12
0.1U_0402_16V7K~D
2
+3VALW_EC
HWPG
@
+3VALW
12
RE66 10K_0402_5%~D
WLAN_WAKE#
38 62Tuesday, September 17, 2013
38 62Tuesday, September 17, 2013
38 62Tuesday, September 17, 2013
0.1
0.1
0.1
of
of
of
Page 39
5
Power on Button
L1 BLM18AG601SN1D_0603~DEMC@ L2 BLM18AG601SN1D_0603~DEMC@
12
PCH_SMBCLK[14,15,17,43,6]
EMC@
10P_0402_50V8J~D
SW1
2
4
6
1 2 1 2
1
3
R67 3.3K_0402_1%
5
R66 3.3K_0402_1%
TML-3WWW -Q-T-R_6P
C14
PESD5V0U2BT_SOT23-3~D
12
DE6
@
1 2
1 2
C15
EMC@
10P_0402_50V8J~D
2
3
1
D D
PWRBTN_LED#[38]
C C
Touch pad
TP_CLK[38]
TP_DATA[38]
B B
13
D
2
G
S
12
C13
EMC@
10P_0402_50V8J~D
PT
QZ20 2N7002_SOT23-3
PCH_SMBDATA[14,15,17,43,6]
Keyboard back light
+5VS +5VS_KBL +5VS_KBL
20mil
ST
2 1
F1
0.5A_13.2V_NANOSMDC050F-13.2-2
1
C11 1U_0603_10V6K~D
A A
2
5
1
C12
10U_0603_6.3V6M~D
2
KB_BL_DET[20]
KB_LED_PWM[38]
KB_BL_DET
4
+5VALW
+5VALW
ST
TP_CLK_R TP_DATA_R
12
C16
EMC@
10P_0402_50V8J~D
TP_DATA_R TP_CLK_R
2
3
1
1 2
R30 47K_0402_5%~D
12
R31 100K_0402_5%~D
13
2
G
4
2
3
PESD24VS2UT_SOT23-3~D
1
PESD5V0U2BT_SOT23-3~D
+3VS
@
DE5
20mil
KB_BL_PWM
A150420-SAHR22
D
Q11
SSM3K7002FU_SC70-3~D
S
DE2
@
10
PBTN_SW# [38]
JTP
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
GND1 GND2
ACES_50506-00841-P01
CONN@
JKBL
4
G264
5
33G1
2
2
1
1
CONN@
3
2
PWM FAN
+3VS +5VS +5VS
12
RE51 100K_0402_5%~D
SYSTEM_FAN_FB[38]
IN
T_KBD CONN
CAPS_LED#[38]
1 2
CE28 100P_0402_50V8J~D@
KSO15
KSO14
KSO13
KSO12
KSI0
KSO11
KSO10
KSI1
KSI2
KSO9
KSI3
KSO8
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
1 2
CE30 100P_0402_50V8J~D@
1 2
CE32 100P_0402_50V8J~D@
1 2
CE34 100P_0402_50V8J~D@
1 2
CE36 100P_0402_50V8J~D@
1 2
CE38 100P_0402_50V8J~D@
1 2
CE40 100P_0402_50V8J~D@
1 2
CE42 100P_0402_50V8J~D@
1 2
CE44 100P_0402_50V8J~D@
1 2
CE46 100P_0402_50V8J~D@
1 2
CE48 100P_0402_50V8J~D@
1 2
CE50 100P_0402_50V8J~D@
1 2
CE52 100P_0402_50V8J~D@
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2 1
DE4 CH 751H-40PT_SOD323-2~D
1
CE27
0.01U_0402_16V7K~D
2
+3VALW
12
RE52
100K_0402_5%~D
Compal Secret Data
Compal Secret Data
Compal Secret Data
12
RE53
10K_0402_5%~D
+VSBP
12
100K_0402_5%~D
2N7002DW-7-F_SOT363-6
61
2
KSI[0..7][38]
KSO[0..16][38]
KB_DET#KSO16
KSO7
KSO6
KSO5
KSO4
KSO3
KSI4
KSO2
KSO1
KSO0
KSI5
KSI6
KSI7
Deciphered Date
Deciphered Date
Deciphered Date
RE54
QZ24A
SYSTEM_FAN_PWM[38]
+5VS
3
4
RE84 470_0402_5%~D
QZ24B 2N7002DW-7-F_SOT363-6
5
1
CE58
@
0.1U_0402_25V6K~D
2
KSI[0..7]
KSO[0..16]
1 2
CE29 100P_0402_50V8J~D@
1 2
CE31 100P_0402_50V8J~D@
1 2
CE33 100P_0402_50V8J~D@
1 2
CE35 100P_0402_50V8J~D@
1 2
CE37 100P_0402_50V8J~D@
1 2
CE39 100P_0402_50V8J~D@
1 2
CE41 100P_0402_50V8J~D@
1 2
CE43 100P_0402_50V8J~D@
1 2
CE45 100P_0402_50V8J~D@
1 2
CE47 100P_0402_50V8J~D@
1 2
CE49 100P_0402_50V8J~D@
1 2
CE51 100P_0402_50V8J~D@
1 2
CE53 100P_0402_50V8J~D@
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
+5VS
1
CE57
2.2U_0603_6.3V6K~D
2
PT
PT
JFAN1
1
1
2
2
3
3
4
4
5
G1
6
G2
ACES_50224-00401-001
CONN@
1 2
KB_DET#[17]
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
KB_DET# KSI7 KSI6 KSI4 KSI2 KSI5 KSI1 KSI3 KSI0 KSO5 KSO4 KSO7 KSO6 KSO8 KSO3 KSO1 KSO2 KSO0 KSO12 KSO16 KSO15 KSO13 KSO14 KSO9 KSO11 KSO10 KB_CAPS_LED
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SW/TP/SCREW
SW/TP/SCREW
SW/TP/SCREW
LA-9941P
KB_CAPS_LED
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
ACES_50692-03041-001
CONN@
1
JKB
31
GND
32
GND
39 62Tuesday, September 03, 2013
39 62Tuesday, September 03, 2013
39 62Tuesday, September 03, 2013
0.1
0.1
0.1
Page 40
5
4
3
2
1
ATMEL TPM
+3VS
0.1U_0402_25V6K~D
TPM@
4700P_0402_25V7K~D
TPM@
1
1
C1
C2
2
2
D D
1 2
R72 10K_0402_5%~DTPM@
+3VS
PT
LPC_AD0[17,38,42] LPC_AD1[17,38,42] LPC_AD2[17,38,42] LPC_AD3[17,38,42]
CLK_PCI_TPM[17]
LPC_FRAME#[ 17,38,42]
PLT_RST#[18,38,42,6,8]
SERIRQ[17,38]
PM_CLKRUN#[18]
CLK_PCI_TPM
12
R2
@
33_0402_5%~D
C C
1
C8
@
27P_0402_50V8J~D
2
CLK_PCI_TPM LPC_LFRAME# PLT_RST#
U1
5
SB3V
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
1
ATEST_1
2
ATEST_2
3
ATEST_3
AT97SC3204-X2A1D-AB_TSSOP28TPM@
VCC_0 VCC_1 VCC_2
V_BAT NBO_13 NBO_14
GPIO6
TESTBI
TESTI
GND_4 GND_11 GND_18 GND_25
NC_7
+3VS
10 19 24
12 13 14
6
9 8
7
PP
4 11 18 25
1
2
2200P_0402_50V7K~D
TPM@
C3
1 2
R1 4.7K_0402_5%~D@
2200P_0402_50V7K~D
TPM@
1
C4
2
0.1U_0402_25V6K~D
TPM@
2200P_0402_50V7K~D
TPM@
1
1
C6
C5
2
2
+3VS
M/B to D/B conn.
USB20_P3[19] USB20_N3[19]
USB20_P4[19] USB20_N4[19]
USB20_P2[19] USB20_N2[19]
USB20_P12[19]
CLK_PCIE_MINI3[17] CLK_PCIE_MINI3#[17]
PCIE_PRX_CARDTX_P4[19] PCIE_PRX_CARDTX_N4[19]
PCIE_PRX_WLANTX_N3[19] PCIE_PRX_WLANTX_P3[19]
PCIE_PTX_WLANRX_N3[19] PCIE_PTX_WLANRX_P3[19]
PCIE_PTX_CARDRX_P4[19] PCIE_PTX_CARDRX_N4[19]
USB20_N12[19]
CLK_PCIE_CD[17]
CLK_PCIE_CD#[17]
USB3RP4[19] USB3RN4[19]
USB3RP3[19] USB3RN3[19]
USB3TN3[19] USB3TP3[19]
USB3TP4[19] USB3TN4[19]
+3VS
CONN@
JTB1
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89
HRS_DF40HC(3P0)-90DS-0P4V(51)
2
1
2
4
3
4
6
5
6
8
7
8
10
9
10
12
11
12
14
13
14
16
15
16
18
17
18
20
19
20
22
21
22
24
23
24
26
25
26
28
27
28
30
29
30
32
31
32
34
33
34
36
35
36
38
37
38
40
39
40
42
41
42
44
43
44
46
45
46
48
47
48
50
49
50
52
51
52
54
53
54
56
55
56
58
57
58
60
59
60
62
61
62
64
63
64
66
65
66
68
67
68
70
69
70
72
71
72
74
73
74
76
75
76
78
77
78
80
79
80
82
81
82
84
83
84
86
85
86
88
87
88
90
89
90
PLT_RST#
DMIC0_R DMIC_CLK_R
+RTCBATT
USB2_DET_EC# [38]
USB2_PWR_EN_EC [38]
USB2_CTL1 [38] USB_OC1# [19] USB_ILIM_SEL [38,44]
USB3_DET_EC# [38]
USB3_PWR_EN_EC [38]
USB3_CTL1 [38]
MINI3CLK_REQ# [17] EC_WLAN_WAKE# [38]
SUSCLK_R [18,38] BT_RADIO_DIS# [20] WL_OFF# [18] EN_WLANPWR# [38]
CDCLK_REQ# [17]
PCH_SMLCLK [17, 25,35,38] PCH_SMLDATA [17,25,35,38]
SYSTEM_FAN2_PWM [38] SYSTEM_FAN2_FB [38] USB_D_PD# [38,45] PM_SLP_S3# [18,34,38,43,55,56] CCD_INT# [38]
+3VALW
+RTCBATT
+5VS
QT
+5VALW
PLT_RST#
1
2
close JB1 33pi n
+3VS
+5VS
0.01U_0402_25V7K
0.1U_0402_16V4Z~D
1
1
CM33
2
2
CM22
@
1000P_0402_50V7K~D
0.047U_0402_16V4Z~D
1
1
CM30
CM31
2
2
4.7U_0603_6.3V6K~D
CM32
PT
1 2
DMIC0[47]
RV424 0_0402_5%~DEMC@
DMIC0_R
12
@
10P_0402_50V8J~D
CV753
Lid Switch
B B
0.1U_0402_16V7K~D
Screw Hole
PC
B x 9
H2
H_2P3
H_2P3
@
1
H13
H_2P5
@
1
H16
A A
H_2P5
CPU x 4
H3
@
H_3P9
1
@
H_4P1X3P7
1
+3VALW +3VALW
U5
APX9131AAI-TRG_SOT23-3
VDD2VOUT
1
C17
2
H9
H11
@
H_2P1X2P5
ST
5
H_3P7
H12
H_2P5
@
1
H10
@
H4
@
1
H_2P3
@
1
H5
@
1
1
1
H_3P9
@
GND
1
GPU x 2
QT
EMIST_SUL-12A2M_1P
@
EMIST_SUL-12A2M_1P
@
EMIST_SUL-12A2M_1P
@
H6
1
H_3P3
H7
H19
H23
12
R28
@
47K_0402_5%~D
3
1
C18 10P_0402_50V8J~D
2
H8
H_3P3
@
@
1
1
1
1
H18
H_2P1
@
1
H15
1
EMIST_SUL-12A2M_1P
H14
@
1
EMIST_SUL-12A2M_1P
H20
@
1
EMIST_SUL-12A2M_1P
H25
@
1
ST
LID_SW_IN#
CLIP_C5
H28
@
FD1 FIDUCAL@
1
EMIST_SUL-12A2M_1P
H17
@
1
EMIST_SUL-12A2M_1P
H21
@
1
EMIST_SUL-12A2M_1P
H24
@
1
CLIP_C5
H29
@
1
1
4
LID_SW_IN# [35,38]
FD2
FD3
FIDUCIAL@
FIDUCAL@
1
EMIST_SUL-12A2M_1P
H27
@
1
EMIST_SUL-12A2M_1P
H26
@
1
Q
H x 2
PC
FD4 FIDUCIAL@
1
1
T
Q
T
DMIC_CLK[47]
PT
Wedcam PWR CTRL
1 2
RV417 68_0402_1%~DEMC@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .
3
DMIC_CLK_R
12
CV754
@
10P_0402_50V8J~D
Compal Secret Data
Compal Secret Data
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
CONN & LID
CONN & LID
CONN & LID
LA-9941P
1
40 62T hursday, September 05, 2013
40 62T hursday, September 05, 2013
40 62T hursday, September 05, 2013
of
of
of
0.1
0.1
0.1
Page 41
5
4
3
2
1
Thermal sensor
D D
+5VS
1U_0402_6.3V6K
1
CT44
2
+5VS
C C
B B
FAN_TEMP1[38]
U4
1
IN
2
GND
3
SHDN
NCT3705U-33_SOT23-5
+3V_Thermal
2
1
5
OUT
4
SET
1
CT21
0.01U_0402_16V7K~D
2
+3V_Thermal
16.9K_0402_1% RT2
1 2
12
HT6
100K_0402_1%_TSM0B104F4251RZ~D
4.7U_0603_6.3V6K~D
CT22
Close JDIMM1 Close JDIMM2
+3V_Thermal +3V_Thermal
16.9K_0402_1% RT5
1 2
12
HT1
100K_0402_1%_TSM0B104F4251RZ~D
16.9K_0402_1% RT4
1 2
12
HT5
100K_0402_1%_TSM0B104F4251RZ~D
MEM_TEMP1[38]MEM_TEMP0[38]
SKIN_TEMP0[38]FAN_TEMP0[38]
16.9K_0402_1% RT3
1 2
12
HT3
100K_0402_1%_TSM0B104F4251RZ~D
+3V_Thermal+3V_Thermal
16.9K_0402_1% RT6
1 2
12
HT2
100K_0402_1%_TSM0B104F4251RZ~D
+3V_Thermal
16.9K_0402_1% RT1
SKIN_TEMP1[38]
1 2
12
HT4
100K_0402_1%_TSM0B104F4251RZ~D
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Thermal Sensor EMC1412
Thermal Sensor EMC1412
Thermal Sensor EMC1412
LA-9941P
1
41 62Tuesday, September 03, 2013
41 62Tuesday, September 03, 2013
41 62Tuesday, September 03, 2013
0.1
0.1
0.1
Page 42
5
4
3
2
1
WLAN / BT4.0 PCIE Mini Card
D D
C C
+3V_mSATA+3VS
JP12
@
2
mSATA SSD
B B
PLT_RST#[18,38,40,6,8]
CLK_PCI_DEBUG[17]
SATA_PRX_DTX_P1[16] SATA_PRX_DTX_N1[16]
SATA_PTX_DRX_N1_C[16] SATA_PTX_DRX_P1_C[16]
EC_TX[38] EC_RX[38]
A A
5
4
1 2
RM12 100K_0402_5%~D
CLK_PCI_DEBUG
SATA_PRX_DTX_P1 SATA_PRX_DTX_N1
SATA_PTX_DRX_N1_C SATA_PTX_DRX_P1_C
EC_TX
JSSD
1
1
3
3
5
5
7
7
9
9 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152
GND153GND2
ACES_50711-0520W-001
CONN@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
3
+3V_mSATA+3V_mSATA
2
2
4
4
6
6
8
8
10
10
12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
54
Compal Secret Data
Compal Secret Data
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
LPC_LFRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0
2
LPC_FRAME# [17,38,40] LPC_AD3 [17,38,40] LPC_AD2 [17,38,40] LPC_AD1 [17,38,40] LPC_AD0 [17,38,40]
112
JUMP_43X39
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-9941P
Date: Sheet of
Date: Sheet of
Date: Sheet of
0.01U_0402_25V7K
0.047U_0402_16V7K
CM11
1
1
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
WLAN/WWAN/SIM/BT
WLAN/WWAN/SIM/BT
WLAN/WWAN/SIM/BT
CM12
2
1
4.7U_0805_10V6
0.1U_0402_25V6K~D
1
2
CM14
1
CM13
2
42 62Tuesday, September 03, 2013
42 62Tuesday, September 03, 2013
42 62Tuesday, September 03, 2013
0.1
0.1
0.1
Page 43
5
SATA III Re-driver for HDD
+3VS
PAD-OPEN1x1m
1 2
SATA_PTX_DRX_P0_C
SATA_PTX_DRX_N0_C
SATA_PRX_DTX_P0_C
SATA_PRX_DTX_N0_C
SATA_BPRE1 SATA_APRE1
SATA_TEST
SATA_TEST
SATA_PTX_DRX_P0 SATA_PTX_DRX_P0_C SATA_PTX_DRX_N0
SATA_PRX_DTX_P0 SATA_PRX_DTX_P0_C SATA_PRX_DTX_N0 SATA_PRX_DTX_N0_C
SATA_BPRE1 SATA_APRE0
SATA_APRE1
+3VS_RD
RN10 0_0402_5%~D@ RN11 0_0402_5%~D@
RN12 0_0402_5%~D@ RN13 0_0402_5%~DHDDT@
SATA_PTX_DRX_P0[16]
1
CN14 10U_0603_6.3V6M~D
2
FFS_INT1[18] FFS_INT2[20]
PCH_SMBDATA[14,15,17,39,6] PCH_SMBCLK[14,15,17,39,6]
1 2
1
CN2
0.1U_0402_25V6K~D
2
PM_SLP_S3#
1 2 1 2
1 2 1 2
SATA_PTX_DRX_N0[16]
SATA_PRX_DTX_P0[16] SATA_PRX_DTX_N0[16]
RN14 0_0402_5%~DHDDP@
RN15 0_0402_5%~D@
1 2
1 2
1 2
RN42 0_0402_5%~D@
1
CN15
0.1U_0402_25V6K~D
2
FFS_INT1 FFS_INT2
PCH_SMBDATA PCH_SMBCLK
FFS_INT1
1
CN1
0.01U_0402_16V7K~D
2
D D
PM_SLP_S3#
ST
UN1
SN75LVCP601
HDDT@
T
S
C C
Free Fall Sensor
+3VS
+3VS
B B
RN33 100K_0402_5%~D
+3VS_RD+3VS
JP13
@
UN1
HDDP@
7
EN
1
A_INp
2
A_INn
5
B_OUTp
4
B_OUTn
17
B_PRE1
19
A_PRE1
18
TEST
3
GND
13
GND
21
EPAD
PI3EQX6741STZDEX TQFN 20P _4X4
1 2
CN19 0.01U_0402_16V7K~D
1 2
CN18 0.01U_0402_16V7K~D
1 2
CN11 0.01U_0402_16V7K~D
1 2
CN10 0.01U_0402_16V7K~D
UN2
LNG3DM
1
VDD_IO
14
VDD
11
INT 1
9
INT 2
7
SDO/SA0
6
SDA / SDI / SDO
4
SCL/SPC
8
CS
LNG3DMTR_LGA16_3X3~D
A_PRE0 B_PRE0
A_OUTp A_OUTn
SATA_BPRE0
RES RES RES RES
GND GND
NC NC
4
+3VS_RD
0_0402_5%~D
0_0402_5%~D
@
@
RN18
RN19
1 2
1 2
ST
6
DEW2
VDD
16
VDD
10
NC
20
REXT_SATA
REXT
9
SATA_APRE0
8
SATA_BPRE0
15
SATA_PTX_DRX_P0_RC
14
SATA_PTX_DRX_N0_RC SATA_PTX_DRX_N0_RC1
11
SATA_PRX_DTX_P0_RC
B_INp
12
SATA_PRX_DTX_N0_RC
B_INn
SATA_PTX_DRX_N0_C
1 2
RN6 0_0402_5%~DHDDP@
1 2
RN20 0_0402_5%~D@
10 13 15 16
5 12
2 3
FFS_INT2
+3VS_RD
0_0402_5%~D
1 2
RN3 0_0402_5%~D@ RN4 0_0402_5%~D@
CN12 0.01U_0402_16V7K~D CN13 0.01U_0402_16V7K~D
CN8 0.01U_0402_16V7K~D CN9 0.01U_0402_16V7K~D
RN17
1 2 1 2
1 2 1 2
1 2 1 2
2
ST
+3VS
1
CN28
0.01U_0402_16V7K~D
2
DEW2
RN21 0_0402_5%~D@
12
RN26 100K_0402_5%~D
61
QN2A DMN66D0LDW-7_SOT363-6~D
1 2
+3VS_RD
SATA_PTX_DRX_P0_RC1
SATA_PRX_DTX_P0_RC1 SATA_PRX_DTX_N0_RC1
+3VS_RD
REXT_SATA
+5VS
12
3
5
DMN66D0LDW-7_SOT363-6~D
4
3
1
CN29
0.1U_0402_25V6K~D
2
RN16
0_0402_5%~D
1 2
12
RN40
@
4.99K_0402_1%~D
RN23 100K_0402_5%~D
FFS_INT2_Q
QN2B
2
HDD CONN
+3VS
HDD_DETECT#[20]
+5VS_HDD
Place near HDD CONN (JHDD1)
+3VS +5VS_HDD
1
CN3
0.1U_0402_16V7K~D
2
1
CN4 1000P_0402_50V7K~D
2
1
CN5
0.1U_0402_16V7K~D
2
HDD power control for AOAC
+5VALW
1
2
CN34 1U_0603_10V6K~D
ST
PM_SLP_S3#
UN3
5
VIN
4
SS
G5243AT11U_SOT23-5
SATA_PTX_DRX_P0_RC1 SATA_PTX_DRX_N0_RC1
SATA_PRX_DTX_N0_RC1 SATA_PRX_DTX_P0_RC1
1
CN6 1U_0402_6.3V6K~D
2
1
VOUT
2
GND
3
EN
HDD_DETECT#
FFS_INT2_Q
+5VS_HDDAPL
12
100K_0402_5%~D
1
2
RN30
1
CN7
10U_0805_10V6M~D
1300mA
JP15
@
2
112
JUMP_43X118
JHDD
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
GND
22
GND
23
GND
24
GND
J-L_UCNR2234B020-0
CONN@
+5VS_HDD
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
5
4
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
DC/DC INTERFACE
DC/DC INTERFACE
DC/DC INTERFACE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-9941P
Date: Sheet
Date: Sheet
2
Date: Sheet
43 62T uesday, September 03, 2013
43 62T uesday, September 03, 2013
43 62T uesday, September 03, 2013
1
0.1
0.1
0.1
of
of
of
Page 44
5
USB Powershare
4
3
2
1
+5VALW
1 2
RI19 10K_0402_5%~D
1 2
D D
C C
RE63 100K_0402_5%~D
1 2
RE62 100K_0402_5%~D
+3VALW
1 2
RI17 10K_0402_5%~D
1 2
RI30 10K_0402_5%~D
1 2
RE68 100K_0402_5%~D
1 2
RE65 100K_0402_5%~D
+3VALW
1 2
RI32 10K_0402_5%~D
PWRSHARE_OE#1
USB0_CTL1
CTL2/3_1
USB0_PWR_EN_EC
PWRSHARE_OE#3
CTL2/3_3
USB1_CTL1
USB1_PWR_EN_EC
1
CI24
0.1U_0402_25V6K~D
2
+5VALW
1
CI26
0.1U_0402_25V6K~D
2
US1
1
IN
USB_OC0#[19]
USB20_N0[19] USB20_P0[19]
USB_ILIM_SEL[38,40]
USB0_PWR_EN_EC[38]
USB0_CTL1[38]
USB20_N1[19] USB20_P1[19]
USB1_PWR_EN_EC[38]
USB1_CTL1[38]
USB_ILIM_SEL
USB_ILIM_SEL
USB0_PWR_EN_EC
CTL2/3_1
USB_OC0# PWRSHARE_OE#3
CTL2/3_3
13
2 3
4 5
6 7 8
TPS2546RTER_QFN16_3X3
1
13
2 3
4 5
6 7 8
OUT
STATUS#
FAULT#
DM_OUT
DM_IN
DP_OUT
DP_IN
ILIM_SEL
ILIM_LO
EN
ILIM_HI
CTL1 CTL2
GND
CTL3
GPAD
US2
IN
OUT
STATUS#
FAULT#
DM_OUT
DM_IN
DP_OUT
DP_IN
ILIM_SEL
ILIM_LO
EN
ILIM_HI
CTL1 CTL2
GND
CTL3
TPS2546RTER_QFN16_3X3
GPAD
12
9
11 10
15 16
14 17
+5V_CHGUSB_1+5VALW
A
2.1
PWRSHARE_OE#1USB_OC0#
USBP0_D­USBP0_D+
ILIM_LO1
R47 48.7K_0402_1%
ILIM_HI1
R48 22.1K_0402_1%
+5V_CHGUSB_3+5VALW
2.1A
12
9
11
USBP1_D-
10
USBP1_D+
15
ILIM_LO3
16
14 17
R52 48.7K_0402_1%
ILIM_HI3USB1_PWR_EN_EC
R51 22.1K_0402_1%
1 2 1 2
1 2 1 2
USBP0_D- [45] USBP0_D+ [45]
USBP1_D- [45] USBP1_D+ [45]
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
USB Powershare
USB Powershare
USB Powershare
LA-9941P
1
0.1
0.1
44 62Tuesday, September 03, 2013
44 62Tuesday, September 03, 2013
44 62Tuesday, September 03, 2013
0.1
Page 45
5
4
3
2
1
USB3.0 Re-driver
+3VALW
1 2
RI74 0_0805_5%@
T
S
D D
C C
USB3TN1_8723
USB3TP1_8723
+3V_PS8723
1
1
2
2
CI50
CI27
0.01U_0402_16V7K~D
0.1U_0402_10V7K~D
UI5
PTN36242LBS HVQFN
USBN@
USBP0_D-[44]
USBP0_D+[44]
ST
1 2
CI3 0.1U_0402_10V7K~D
1 2
CI4 0.1U_0402_10V7K~D
ST
1 2
USB3RN1
USB3RN1[19] USB3RP1[19]
USB3TN1[19] USB3TP1[19]
USB3RN2[19] USB3RP2[19]
USB3TN2[19] USB3TP2[19]
USBP0_D- USBP0_R_D-
USBP0_D+
USB3T_N1 U SB3TN1_D-
USB3T_P1
CI5 0.1U_0402_10V7K~D
1 2
USB3RP1
CI6 0.1U_0402_10V7K~D
1 2
USB3TN1
CI7 0.1U_0402_10V7K~D
1 2
USB3TP1
CI8 0.1U_0402_10V7K~D
1 2
USB3RN2
CI11 0.1U_0402_10V7K~D
1 2
USB3RP2
CI12 0.1U_0402_10V7K~D
1 2
USB3TN2
CI13 0.1U_0402_10V7K~D
1 2
USB3TP2
CI20 0.1U_0402_10V7K~D
I2C_EN8723
LI1
EMC@
DLW21SN900HQ2L_0805_4P~D
4
4
1
1
LI2
EMC@
DLW21SN900HQ2L_0805_4P~D
4
4
1
1
LI3
EMC@
DLW21SN900HQ2L_0805_4P~D
4
4
1
1
+3V_PS8723
USB_D_PD#[38,40]
1 2
RI6 0_0402_5%~D
3
3
2
2
3
3
2
2
3
3
2
2
USB3RN1_C USB3RP1_C
USB3TN1_C USB3TP1_C I2C_EN8723 USB3RN2_C USB3RP2_C
USB3TN2_C USB3TP2_C
USBP0_R_D+
USB3TP1_D+
USB3RN1_D-USB3RN1_8723
USB3RP1_D+USB3RP1_8723
B_EQ0 B_EQ1 B_DE0 B_DE1
UI5
USBP@
1
A1_OUTn
2
A1_OUTp
3
GND
4
B1_INn
5
B1_INp
6
I2C_EN
7
A2_OUTn
8
A2_OUTp
9
VDD
10
B2_INn
11
B2_INp
12
PD#
13
B_EQ0/SDA_CTL
14
B_EQ1/SCL_CTL
15
B_DE0
16
B_DE1
PS8723BTQFN32GTR-A0_TQFN32_3X6
EMC@
USB3RN1_D-
USB3TN1_D-
USB3TP1_D+
AZ1045-04F_DFN2510P10E-10-9
EPAD A_EQ0 A_EQ1
REXT A_DE0 A_DE1
A1_INn A1_INp
VDD B1_OUTn B1_OUTp
TEST A2_INn A2_INp
GND B2_OUTn B2_OUTp
DI1
1
1
2
2
4
4
5
3
3
8
33 32
A_EQ0
31
A_EQ1
30
RI320 4.99K_0402_1%~D
29
A_DE0
28
A_DE1
27
USB3RN1_8723
26
USB3RP1_8723
25 24
USB3TN1_8723
23
USB3TP1_8723
22
USB8723_test
21
USB3RN2_8723
20
USB3RP2_8723
19 18
USB3TN2_8723
17
USB3TP2_8723
10
9
7
65
Place close to JUSB1
9
8
7
6
1 2
+3V_PS8723
USB3RN1_D-
USB3TN1_D-
USB3TP1_D+
ST
A_EQ0 A_EQ1
B_EQ0
B_EQ1
A_DE0 A_DE1
B_DE0 B_DE1
USB8723_test
RI460 0_0402_5%~DUSBN@ RI461 0_0402_5%~DUSBN@
RI464 4.7K_0402_5%~D@ RI465 0_0402_5%~DUSBN@
RI462 4.7K_0402_5%~D@ RI463 4.7K_0402_5%~D@
RI467 4.7K_0402_5%~D@ RI466 4.7K_0402_5%~D@
RI468 4.7K_0402_5%~D@
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2
+3V_PS8723
+3V_PS8723
+3V_PS8723
+3V_PS8723
+3V_PS8723
USB3.0 / USB2.0 Port1
+5V_CHGUSB_1
10U_0805_10V6K~D
0.1U_0402_25V6K~D
1
1
CI1
2
47U_1206_6.3V6M~D
1
CI2
CI19
2
2
223
1
AZC199-02SPR7G_SOT23-3
EMC@
3
DI2
1
USB0_DET_EC#[38]
Equalizer control and program for channel A1&A2/B1&B2
3.3V tolerant. Internally pulled down at ~150K [EQ1, EQ0] == LL: equalization for channel loss up to 9.5dB (default) LH: equalization for channel loss up to 13 dB HL: equalization for channel loss up to 4.5dB HH: equalization for channel loss up to 7.5dB
Programmable output de-emphasis level setting for channel A1&A2/B1&B2
3.3V tolerant. Internally pulled down at ~150K [DE1, DE0] == LL: 3.5dB de-emphasis (default) LH: No de-emphasis HL: 2.7dB de-emphasis HH: 5.0dB de-emphasis
LFPS swing adjust.
3.3V tolerant. Internally pulled down at ~150K. TST == L: Normal LFPS swing (default) H: Tune down LFPS swing
JUSB1
USB3TP1_D+
USB3TN1_D­USBP0_R_D+USB3RP1_D+USB3RP1_D+
USBP0_R_D­USB3RP1_D+
USB3RN1_D-
USB0_DET_EC#
9
SSTX+
1
VBUS
8
SSTX-
3
D+
7
GND
2 6 4 5
10
GND
D-
GND
SSRX+ GND
GND
SSRX-
GND
Plug_DET
TAIWI_USB019-107CRL-TW D
CONN@
11 12 13 14
B B
USB
LI7
EMC@
DLW21SN900HQ2L_0805_4P~D
USBP1_D-[44]
USBP1_D+[44]
ST
USB3TN2_8723
USB3TP2_8723
A A
1 2
CI16 0.1U_0402_10V7K~D
1 2
CI17 0.1U_0402_10V7K~D
5
USBP1_D- USBP1_R_D-
USBP1_D+
USB3T_N2 USB3TN2_D-
USB3T_P2
4
4
1
1
EMC@
DLW21SN900HQ2L_0805_4P~D
4
4
1
1
EMC@
DLW21SN900HQ2L_0805_4P~D
4
4
1
1
3
3
2
2
LI8
3
2
LI9
3
2
USBP1_R_D+
USB3RN2_D-
USB3RP2_D+
3
2
3
2
USB3TP2_D+
USB3RN2_D-USB3RN2_8723
USB3RP2_D+USB3RP2_8723
4
USB3TN2_D-
USB3TP2_D+
DI6
EMC@
1
1
2
2
4
4
5
3
3
8
AZ1045-04F_DFN2510P10E-10-9
9
USB3RN2_D-
10
8
USB3RP2_D+
9
7
USB3TN2_D-
7
6
USB3TP2_D+
65
Place close to JUSB3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OFC OMPALE LECTRONICS, INC.
3
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
3.0 / USB2.0 Port3
+5V_CHGUSB_3
10U_0805_10V6K~D
0.1U_0402_25V6K~D
1
1
CI9
2
47U_1206_6.3V6M~D
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
1
CI23
CI15
2
2
2
223
1
AZC199-02SPR7G_SOT23-3
EMC@
3
DI5
1
JUSB3
USB3TP2_D+
USB3TN2_D­USBP1_R_D+
USBP1_R_D­USB3RP2_D+
USB3RN2_D-
USB1_DET_EC#[38]
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
USB1_DET_EC#
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
USB conn.
USB conn.
USB conn.
LA-9941P
9
SSTX+
1
VBUS
8
SSTX-
3
D+
7
GND
2
D-
6
SSRX+
4
GND
5
SSRX-
10
Plug_DET
TAIWI_USB019-107CRL-TW D
CONN@
1
11
GND
12
GND
13
GND
14
GND
0.1
0.1
45 62Tuesday, September 03, 2013
45 62Tuesday, September 03, 2013
45 62Tuesday, September 03, 2013
0.1
Page 46
5
HD Audio DSP
4
3
2
1
+1.2V_5505SWR_S
30mil 30mil
D D
+2.5V_5505LDO_S
C C
1 2
LA3 4.7UH_NRH3010T4R7MN_20%DSP@
Close to Pin 1 3
0.1U_0402_16V7K~D
DSP@
20K_0402_1%~D
10U_0805_10V6K~D
1
1
CA79
CA67DSP@
2
2
1 2
20K_0402_1%~D
1 2
Close to Pin 4 0
When not support DSP, RA13 change to 0ohm When support DSP, RA13 change to 33ohm
4.7U_0603_6.3V6K~D
DSP@
0.1U_0402_16V7K~D
DSP@
4.7U_0603_6.3V6K~D
CA81
HDA_BITCLK_AUDIO[16] HDA_SDOUT_AUDIO[16]
2
CA78
1
RA81 33_0402_5%~DDSP@
HDA_SYNC_AUDIO[16] HDA_RST_AUDIO#[16,47]
RA81
0_0402_5%~D
NDSP@
2
1
1 2
DSP@
4.7U_0603_6.3V6K~D
DSP@
1
2
CA64
CA84
2
1
+3VS
PT
4.7U_0603_6.3V6K~D
DSP@
10U_0805_10V6K~D
1
2
1
CA82
CA66DSP@
2
1
2
GND_DSP
0.1U_0402_16V7K~D
DSP@
DSP@
RA62
CA77
1
2
DDR_VREF_IN
DSP@
0.1U_0402_16V7K~D
DSP@
RA59
1
CA65
2
+1.2V_5505SWR
0.1U_0402_16V7K~D
DSP@
0.1U_0402_16V7K~D
DSP@
0.1U_0402_16V7K~D
DSP@
1
1
CA80
CA63
CA83
2
2
CA40/CA43 clos e pin1 CA41/CA44 clos e pin25 CA42/CA45 clos e pin37
+1.2V_5505SWR
1 2
10U_0805_10V6K~DCA90DSP@
+1.2V_5505SWR +1.2V_5505SWR_S
+2.5V_5505LDO_S DDR_VREF_IN
HDA_BITCLK_AUDIO
HDA_SDIN0_C HDA_SYNC_AUDIO HDA_RST_AUDIO#
XTAL_5505_IN XTAL_5505_OUT
GND_DSP
PT
HDA_BITCLK_AUDIO HDA_SDOUT_AUDIO HDA_SDIN0_C HDA_SYNC_AUDIO HDA_RST_AUDIO#
When not support DSP, need POP
U12
DSP@
1
DVDD-12-I
25
DVDD-12-I
37
DVDD-12-I
9
DVDD-IO
15
FB-SWR
13
DVDD-12-SWR
43
DVDD-25-LDO-O
40
DDR-VERF
6
BITCLK/I2SCLKI-2
5
SDTA-OUT/I2SSDO0-2
8
SDATA-IN/I2SSDI0-2
10
SYNC/I2SLRCLKI-2
11
RESETB
45
VDMIC-CLK2/I2SSDI1
46
VDMIC-DAT2/I2SSDI2
47
VDIMC-CLK1
48
VDMIC-DAT1
2
XTAL-IN
3
XTAL-OUT
12
DVSS-SWR
44
DVSS
49
DGND
ALC5505_QFN48_7X7~D
1 2
RA50 0_0402_5%~DNDSP@
1 2
RA63 0_0402_5%~DNDSP@
1 2
RA56 0_0402_5%~DNDSP@
1 2
RA57 0_0402_5%~DNDSP@
1 2
RA58 0_0402_5%~DNDSP@
DVDD-33-SWR
DVDD-33-SWR-C
DVDD-33-LDO-I
ALC5505
I2SCLRCKO
BITCLK-V/MCLKI-2
SDATA-OUT-V/I2SSDO1
VGPIO1/SDATA-IN-V/I2SSDI3
SYNC-V/I2SSDO2
RESETB-V/I2SSDO3
VGPIO0/TRST#
VGPIO2/TMS
VGPIO3/VOL-DN/TDI
VGPIO4/VOL-UP/TCLK
VGPIO5/VOL-MUTE/TDO
I2C-MASTER-SCL/I2C-SLAVE-SCL
I2C-MASTER-SDA/I2C-SLAVE-SDA
14
16
42
32
MCLKO
29
I2SCLKO
30 31
I2SSDO0
38
I2SCLKI
39
I2SLRCKI
41
I2SSDI0
17
DSP-PD#
23 24 21 19 18
7 28 4 20 22
26 27
33
CS-L
34
SCK
35
SI
36
SO
HDA_BITCLK_5505_R HDA_SDOUT_5505_R HDA_SDIN_5505_R HDA_SYNC_5505_R HDA_RST_5505_R
+3VS +3VS+3VS
DSP@
1
CA92
2
1 2
RA67 0_0402_5%~DNDSP@
1 2
RA68 0_0402_5%~DNDSP@
1 2
RA64 0_0402_5%~DNDSP@
1 2
RA65 0_0402_5%~DNDSP@
1 2
RA66 0_0402_5%~DNDSP@
10U_0805_10V6K~D
CA88DSP@
HDA_SDOUT_5505 [47] HDA_SDIN_5505 [47]HDA_SDIN0[16] HDA_SYNC_5505 [47] HDA_RST_5505 [47]
30mil 30mil
0.1U_0402_16V7K~D
DSP@
10U_0805_10V6K~D
1
1
2
1
CA87
CA85DSP@
2
2
HDA_BITCLK_5505 HDA_SDOUT_5505 HDA_SDIN_5505 HDA_SYNC_5505 HDA_RST_5505
30mil
0.1U_0402_16V7K~D
1
2
GND_DSP GND_DSP
Close pin14 Close pin16 Close pin42
1 2
RA75 10K_0402_5%~DDSP@
DSP_PD#
HDA_BITCLK_5505 HDA_SDOUT_5505HDA_SDOUT_AUDIO HDA_SDIN_5505 HDA_SYNC_5505 HDA_RST_5505
0.1U_0402_16V7K~D
DSP@
10U_0805_10V6K~D
1
CA89
CA86DSP@
2
+3VS
DSP@
10K_0402_5%~D
12
RA91
12
@
0_0402_5%~D
1
@
22P_0402_50V8J~D
2
DSP_PD#
HDA_BITCLK_5505 [47]
RA76
CA91
DSP_PD#[38]
When DSP_ON/OFF is high,trun on DSP. When DSP_ON/OFF is low,trun off DSP. Recommend : DSP set power up/down state when HD-A should be in D3Cold.
HDA_BITCLK_5505
12
@
0_0402_5%~D
1
@
22P_0402_50V8J~D
2
XTAL_5505_IN XTAL_5505_OUT
RA89
CA94
YA2
DSP@
24MHZ_12PF_X3G024000DC1H
123
1
CA96
DSP@
18P_0402_50V8J~D
2
CA97
GND_DSP and GN D moat 20mil
1 2
RA90 0_0805_5%~DDSP@
GND_DSP
4
1
DSP@
18P_0402_50V8J~D
2
B B
HDA_SYNC_AUDIO HDA_BITCLK_AUD IO
12
CA93
DSP@
10P_0402_50V8J~D
HDA_SDOUT_AUDIO
12
CA95
@
10P_0402_50V8J~D
Green Clock
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.
5
4
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
RTC Counter/Green Clock
RTC Counter/Green Clock
RTC Counter/Green Clock
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
of
of
of
46 62Wednesday, September 04, 2013
46 62Wednesday, September 04, 2013
46 62Wednesday, September 04, 2013
1
Page 47
A
B
C
D
E
F
G
H
HDA_Audio Codec
+VDDA +5VS
RA33
@
0_0402_5%
1 2
PCBEEP
LINE1-R LINE1-L
LINE2-IN-R/SLEEVE
LINE2-IN-L/RING2
MIC1-R
MIC1-L/MIC-CAP
MIC2-R
MIC2-L
SENSE A SENSE B
SURR-R SURR-L
FRONT-R FRONT-L
SPDIF-OUT
SPDIF-in
GPIO/DMIC-CLK
GPIO1/DMIC-DATA GPIO2/Combo-Jack1 GPIO3/Combo-Jack2
EAPD
ST
2
46 45 32 31
37 36 48 47
34 33
27 26 19
CEN
18
LFE
44 43
15 16
12 13 17 3
14
+3VS
1 2
LA1 BLM21PG600SN1D_0805~D
1 1
CA39 22P 50V +-5% NPO 0402EMC@
@
JP10
2 2
PAD-OPEN 43x39
@
JP8
PAD-OPEN 43x39
@
JP9
PAD-OPEN 43x39
D
GN
HDA_SDOUT_5505[46] HDA_BITCLK_5505[46]
HDA_SDIN_5505[46]
HDA_SYNC_5505[46] HDA_RST_5505[46]
1 2
0.1U_0402_16V7K~D
10U_0805_10V6K~D
1
1
CA5
2
2
AGND
HDA_BITCLK_R
12
12
12
AGND
CA6
HDA_SDIN_5505 HDA_SDOUT_5505 HDA_BITCLK_5505 HDA_SYNC_5505 HDA_RST_5505
0.1U_0402_16V7K~D
1
CA7
2
+3VS+3VS
0.1U_0402_16V7K~D
4.7U_0603_6.3V6K~D
1
2
CA9
CA8
2
1
1 2
RA24 22_0402_1%~D
1 2
RA26 33_0402_5%~D
0.1U_0402_16V7K~D
10U_0805_10V6K
1
1
CA19
CA18
2
2
AGND
+VDDA
0.1U_0402_16V7K~D
1
2
CA10
2
1
AGND
AGND
AGND
AGND
+3VS
+MIC1_VREFO
1 2
1 2
1 2
1 2 1 2
10U_0805_10V6K~D
1
2
AGND
HDA_SDIN_R
HDA_BITCLK_R
12
+
0.1U_0402_16V7K~D
1
CA12
2
LDO_OUT
AGND
4.7U_0603_6.3V6K~D
CA11
MIC2_VREF
MIC1_VREF
Close to Chip Side
CA15 1U_0402_6.3V6K
RA7 20K_0402_1%~D
CA16 2.2U_0603_10V6K
CA26 100U_B2_6.3VM_R35M
PT
CA20 1U_0402_6.3V6K CA21 10U_0805_10V6K
CA13
U15
23
HVDD
39
LDO-IN
11
DVDD
7
DVDD-IO
25
DVDD-IO-CP
8
SDATA-IN
4
SDATA-OUT
5
BCLK
9
SYNC
6
RESETB
1
MIC2-VREFO
29
LINE2-VREFO
30
MIC1-VREFO
24
CBP
21
CBN
35
JDREF
40
LDO-CAP
41
VREF
38
VRP
20
CPVEE
10
REGREF
28
CPVREF
22
AVSS1
42
AVSS2
49
Thermal PAD
ALC3661-CG_MQFN48_6X6~D
0.1U_0402_16V7K~D
10U_0805_10V6K~D
1
1
CA4
CA3
2
2
PT
1 2
RA9 47K_0402_5%~D
1 2
MONO_IN
CA17 1U_0402_6.3V6K@
SLEEVE RING2
1 2
CA14 10U_0805_10V6K
MIC2R MIC2L
SENSE_B# JACK_PLUG#_DL_R
10mil
HP2_OUTR HP2_OUTL
AUD_SPK_RC_R+_C AUD_SPK_RC_L+_C
DMIC_CLK_RA DMIC0_RA
RA96 0_0402_5%~DEMC@ RA97 0_0402_5%~DEMC@
EAPD#
PT
AGND
Close to U2 pin33
1 2
RA22 5.1K_0402_1%~D
Combo JACK
1 2
CA24 1U_0402_16V6K
1 2
CA25 1U_0402_16V6K
1 2 1 2
EAPD# [38]
RA10 47K_0402_5%~D
RA11 1K_0402_5%~D
RA5
@
4.7K_0402_5%~D
1 2
DMIC_CLK DMIC0
1 2
1 2
1
2
DMIC_CLK [40]
DMIC0 [40]
CA32
@
100P_0402_25V8K
CA30 100P_0402_25V8K
PT
AUD_SPK_R+ [48] AUD_SPK_L+ [48]
DMIC_CLK
EMC@
10P_0402_50V8J~D
DMIC0
EMC@
10P_0402_50V8J~D
Close to U2
BEEP# [38]
HDA_SPKR [16]
12
PT
CA27
CA23
EC Beep
PC
JACK_PLUG#_DL
2
CA31
@
10U_0805_10V6K
1
12
12
I Beep
2
G
AGND
SPK_LC+ [48]
JACK_PLUG#_DL_R
13
D
QA5 SSM3K7002FU_SC70-3~D
S
PT
Prevent S3/S4/S5 Noise Reserved Delay Circuit For De-pop noise
100K_0402_5%~D
JACK_PLUG#
+3VS
12
RA44
@
3
5
4
AGND
1 2
RA55 100K_0402_5%~D@
QA4B
@
DMN66D0LDW-7_SOT363-6~D
1 2
RA98 0_0402_5%@
PT
S
T
1 2
HDA_RST_AUDIO#[16,46]
3 3
MUTE#
RA101 0_0402_5%@
1 2
RA102 0_0402_5%~D@
+3VS
1 2
+RTCVCC
10K_0402_5%~D
@
RA42
5
AGND
12
RA43 100K_0402_5%~D
3
DMN66D0LDW-7_SOT363-6~D
QA3B DMN66D0LDW-7_SOT363-6~D
4
SLEEVE
61
2
QA3A
AGND
100K_0402_5%~D
0.1U_0402_16V7K~D
1
@
CA22
2
ST
+3VS
12
RA54
@
61
2
QA4A
@
DMN66D0LDW-7_SOT363-6~D
JACK_PLUG#_DL HP 2_OUTL_R
MUTE#[48]
EAPD#
MUTE#
RA99 0_0402_5%~D@
RA100 0_0402_5%~D@
1 2
1 2
HP2_OUTR_R
2
0.1U_0402_16V7K~D
1
AGND
A1
A3 B1
B3
CA28
@
UA2
@
MAX9892ERT+T_UCSP6~D
INL
INR /MUTE
VDD
SET
GND
A2
+3VS
B2
2
CA29
@
0.1U_0402_16V7K~D
1
AGND
HeadPhone / Mic. combo JACK
HeadPhone / Mic. combo JACK
MIC2_VREF
MIC1_VREF
1 2
CA68 2.2U_0603_10V6K
1 2
MIC2R MIC2R_C
CA69 2.2U_0603_10V6K
PT
HP2_OUTL
RA18 8.2_0402_1%~D
HP2_OUTR
RA17 8.2_0402_1%~D
4 4
A
B
1 2
1 2
+MIC1_VREFO
C
MIC2L_CMIC2L
1 2
RA93 2.2K_0402_5%~D
RA95 2.2K_0402_5%~D
1 2
RA92 1K_0402_5%~D
1 2
RA94 1K_0402_5%~D
1 2
LA5 BLM15GA750SN1D_2PEMC@
1 2
LA6 BLM15GA750SN1D_2PEMC@
1 2
RA19 2.2K_0402_5%~D
1 2
RA20 2.2K_0402_5%~D
D
12
HP2_OUTL_R
HP2_OUTR_R
RING2
SLEEVE
CA33 100P_0402_25V8K
CA38 100P_0402_25V8K
@
@
@
1
1
2
2
AGND AGND
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIE TARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS S HEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, IN C. NEITHER THIS SHEET NO R THE INFORMATION IT CONTAINS MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONICS, INC.
E
1 2
RA2 10K_0402_1%~D@
1 2
RA3 10K_0402_1%~D@
P
T
CA34 100P_0402_25V8K
CA37 100P_0402_25V8K
@
1
1
2
2
DA2
EMC@
PJDLC05_SOT23-3
AGND
2
3
2
3
DA3
EMC@
1
1
PJDLC05_SOT23-3
For ESD
Compal Secret Data
Compal Secret Data
Compal Secret Data
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Deciphered Date
Deciphered Date
Deciphered Date
F
100K_0402_5%~D
PT
T
P
+3VS
RA4 10K_0402_1%~D
JHP2
1 2
3 1
5
JACK_PLUG#
12
RA70
AGND
6 2 4 7
SINGA_2SJ3080-000111F
CONN@
AGND
wait symbol and PN.
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
HD Audio ALC275/Audio Jack
HD Audio ALC275/Audio Jack
HD Audio ALC275/Audio Jack
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
G
PT
of
of
of
47 62Tuesday, September 03, 2013
47 62Tuesday, September 03, 2013
47 62Tuesday, September 03, 2013
H
Page 48
A
B
C
D
E
Audio AMP
+VSBP
RA53 0_0805_5%@
1 2
T
S
1 1
Close to UA5 pin 3,pin4,pin11,pin 12
RA45 60.4K_0402_1%~D
AUD_SPK_L+[47]
AUD_SPK_R+[47]
2 2
1 2
1 2
RA48 60.4K_0402_1%~D
ST
60.4K_0402_1%~D
RA49
12
AGND
+VSBP_AMP_PVCC
1
2
AGND
AGND
12
RA52
60.4K_0402_1%~D
RA47 10_0805_5%~D
100P_0402_25V8K
100P_0402_25V8K
1
CA41
CA42
2
AUD_SPK_L+_R
1 2
RA46
AUD_SPK_R+_R
1 2
RA51
S
T
AUD_MUTE[38]
1 2
1
CA45
2
10U_0805_25V6K
1
2
30K_0402_1%
30K_0402_1%
10U_0805_25V6K
10U_0805_25V6K
1
CA43
CA46
2
CA53 0.022U_0402_25V7K
AUD_SPK_L-_R
CA58 0.022U_0402_25V7K
CA59 0.022U_0402_25V7K
AUD_SPK_R-_R
CA60 0.022U_0402_25V7K
100K_0402_5%~D
RZ38
2
G
+5VS
+VSBP_AMP_AVCC
1
CA71
2
AGND
1 2
1 2
1 2
1 2
12
L2N7002WT1G
13
D
S
1U_0603_25V6-K~D
UA5
7
AVCC
15
PVCCR
16
PVCCR
27
PVCCL
28
SPK_LC+[47]
SPK_LC+
SPK_LC-
SPK_RC+
SPK_RC-
MUTE#
QA2
PVCCL
PT
3
LINP
4
LINN
12
RINP
11
RINN
5
GAIN0
6
GAIN1
1
SD#
2
FAULT#
13
NC
29
GND
TPA3113D2PWPR_HTSSOP28
MUTE# [47]
BSPL
OUTPL
OUTNL
BSNL
BSPR
OUTPR
OUTNR
BSNR
PBTL
PLIMIT
GVDD
PGND PGND AGND
26
25
23
22
17
18
20
21
14
10
9
24 19 8
AGND
CA61 0.22U_0603_16V7K
SPKL+
SPK_OUT_L+
SPK_OUT_L-
SPKL-
SPKR+
SPK_OUT_R+
SPK_OUT_R-
SPKR-
1 2
1 2
CA62 0.22U_0603_16V7K
CA72 0.22U_0603_16V7K
1 2
1 2
CA73 0.22U_0603_16V7K
12
1
1U_0603_25V6-K~D
2
RA61 10K_0402_1%~D
CA76
12
RA60 10K_0402_1%~D
LA11 BLM18PG181SN1D_2PEMC@
LA8 BLM18PG181SN1D_2PEMC@
LA7 BLM18PG181SN1D_2PEMC@
LA9 BLM18PG181SN1D_2PEMC@
1 2
1 2
1 2
1 2
1
1U_0603_25V6-K~D
2
CA75
ST
SPK_L+
SPK_L-
SPK_R+
SPK_R-
3 3
4 4
A
B
Int. Speaker Conn.
SPK_L+ SPK_L­SPK_R+ SPK_R-
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
EMC@
EMC@
680P_0603_50V7K
680P_0603_50V7K
12
12
CA54
CA55
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
EMC@
680P_0603_50V7K
12
12
CA56
D
40mil = For 4ohm 2W Speaker
EMC@
680P_0603_50V7K
2
CA57
3
DA4
DA5
@
@
1
PJDLC05C_SOT23-3
For ESD
2012/07/212011/08/25
2012/07/212011/08/25
2012/07/212011/08/25
2
3
1
JSPK1
1
1
2
2
3
3
4
4
5
G1
6
G2
ACES_50224-00401-001
CONN@
PJDLC05C_SOT23-3
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Speaker/Audio Jack
Speaker/Audio Jack
Speaker/Audio Jack
LA-9941P
E
48 62Tuesday, September 03, 2013
48 62Tuesday, September 03, 2013
48 62Tuesday, September 03, 2013
0.1
0.1
0.1
Page 49
BATT LED
5
+5VALW +5VALW
4
3
2
1
BATT LED Power Button
12
D D
BATT_LED#_LV5[38]
DMN66D0LDW-7_SOT363-6~D
BATT_LED#_LV2[38]
C C
BATT_LED#_LV1[38] BATT_LOW_LED#[38]
B B
DMN66D0LDW-7_SOT363-6~D
R11 100K_0402_5%~D
Q15A
2
G
12
R17 100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
12
R32 100K_0402_5%~D
2
12
R12 100K_0402_5%~D
61
D
S
Q17A
2
G
+5VALW +5VALW
12
61
D
Q19A
G
S
R10 8 20_0402_5%~D
1 2
IBAT5 BAT5 IBAT3 BAT3
34
D
Q15B
5
G
DMN66D0LDW-7_SOT363-6~D
+5VALW
12
R18 100K_0402_5%~D
61
D
S
R27 100K_0402_5%~D
5
G
S
IBAT2 BAT2
34
D
Q17B
5
G
S
R23 8 20_0402_5%~D
IBAT1 BAT1
34
D
Q19B
DMN66D0LDW-7_SOT363-6~D
S
BATT_LED#_LV3[38]
R16 8 20_0402_5%~D
1 2
DMN66D0LDW-7_SOT363-6~D
1 2
12
R20 100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
BATT_LED#_LV4[38]
12
R21 100K_0402_5%~D
61
D
Q16A
2
G
S
12
R26 100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
12
R34 100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
2
R19 8 20_0402_5%~D
1 2
34
D
Q16B
5
G
DMN66D0LDW-7_SOT363-6~D
S
+5VALW
12
R25 100K_0402_5%~D
5
61
D
Q18A
2
G
S
12
R33 100K_0402_5%~D
BATT_LOW BATT_LOW_LED#_D
34
D
Q20B
5
G
61
Q20A
G
S
D
S
R22 8 20_0402_5%~D
IBAT4
34
D
Q18B
G
DMN66D0LDW-7_SOT363-6~D
S
R24 8 20_0402_5%~D
1 2
DMN66D0LDW-7_SOT363-6~D
1 2
BAT4
BATBTN#[3 8]
BAT1
BATT_LOW_LED#_D
2
D8
EMC@
PESD24VS2UT_SOT23-3~D
BAT2
BAT3
BAT4
BAT5
1
ST
LED7 27-21-T3D-CP1Q2B1 6Y-3C_WHITE
LED8 27-21-T3D-CP1Q2B1 6Y-3C_WHITE
LED9 27-21-T3D-CP1Q2B1 6Y-3C_WHITE
LED6 27-21-T3D-CP1Q2B1 6Y-3C_WHITE
Yellow
2
3
White
LED3
12-22/Y2ST3D-C30/2C
3
21
21
21
21
+5VALW
1
SW2
3
4
NTC311-EA1T-A160T_4P
1
2
+5VALW
ST
NFC Connector
ST
RN5 0_0402_5%@
RN8 10K_0402_5%~D@
RN9 0_0402_5%@
S
T
RN7 0_0402_5%~D@
@
1 2
1 2
1 2
DN2
2
3
PESD5V0U2BT_SOT23-3~D
+3V_PCH
NFC_VDD_SIM
A A
NFC_DET#
SML0CLK
SML0DATA
+3V_NFC
+3V_NFC
1
C1135
0.1U_0402_10V7K~D
2
RN1 100K_0402_5%~D
N14@
NFC_RST#
NFC_VDD_SIM
NFC_DET#[17]
4
NFC_IRQ
NFC_RST#[17]
SML0CLK[17 ]
SML0DATA[17]
1 2
+3V_NFC
12
1
5
NFC_IRQ[17]
+3V_NFC
N14@
NFC_DET#
JNFC1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
GND
17
GND
CONN@
HB_A531515-SCHR21
PT
RTC counter
15. MOD_GND
14. VDD_IO
13. MOD_VDD
12. SWP*1
11. SE_DOUT_CLK*1
10. SE_DIN_DIO*1
9. MOD_GND
8. I2C_SCL
7. I2C_SDA
6. VDD_SIM*2
5. IRQ
4. SE_PWR*1
3. SWP_PWR*1
2. MOD_GND
1. MOD_VDD
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ANDTRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIONOF R&D
ANDTRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIONOF R&D
ANDTRADE SECRET INFORMATION. THIS SHEET MAYNOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIONOF R&D DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THEINFORMATION IT CONTAINS
DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THEINFORMATION IT CONTAINS
DEPARTMENTEXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THEINFORMATION IT CONTAINS MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTYWITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTYWITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
MAYBE USED BY OR DISCLOSED TO ANY THIRD PARTYWITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
2012/07/152011/08/25
2012/07/152011/08/25
2012/07/152011/08/25
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Speaker/Audio Jack
Speaker/Audio Jack
Speaker/Audio Jack
Custom
Custom
Custom
LA-9941P
1
0.1
0.1
0.1
49 62Tu esday, September 17, 2013
49 62Tu esday, September 17, 2013
49 62Tu esday, September 17, 2013
of
of
of
Page 50
5
Module REV Change list
X00 Remove Audio codec to DB --- page 47 X X00
X00 Add GC6 function for GPU N14P --- page 24/28/33
X00 Follow GPIO table modify pin assign --- page 38
X00 Change to PWM FAN --- page 39
X00 Change R45 PU to +3VALW for leakage current --- page 38 X X00
X00 Rmovie Audio DSP chip and add KC3801 --- page 46 and page 38 X X00
X00 Add RTC counter and add SSC chip for Audio bit clock --- page 46 and page 40 X X00
X00 Just support N14P-GS, so remove GPU board ID. --- page 20 X X00
X00 Co-layout Sata Re-driver PS8520B/C --- page 43 X X00
X00 Buyer request Change YH2/YL1 to SJ10000DE00 --- page 17/41 X X00
X00 Buyer request Change YH1/Y4 to SJ10000DE00 --- page 16/46 X X00
X00 Change RH85 connector to +1.5VS --- page 17 X X00
D D
X00 Change RPH1/RPH2/RPH3/RPH4/RPH5 tp single resister --- page 18/19 X X00
X00 Modify eDP connector pin define, remove +3VS --- page 35 X X00
X00 Modify support quad ROM, add RH10/RH41 --- page 17 X X00
X00 Change HDMI level shift to active --- page 36 X X00
X00 EMC request add CA36 --- page 40 X X00
X00 NFC SMBus change to PCH SMBus0 --- page 17 X X00
X00 CCD SMBus reserve connector to PCH, and CCD INT reserve connector to EC --- page 35 X X00
X00 Update VRAM PN --- page 1 X X00
X00 X X00Remove NFC function --- page 49
X00 X X00
X00 Use dual MOSFET to reduce single MOSFET
X00 Use Anpec APL3512 to reduce Component
X00 Use TI TPS22966 to reduce Component
X00 Add DV9 for display have leakage issue --- page 37
X01 X01X00Remove DV7 for EMC component should close device connector side --- page 40
X01 Remove +1.5V_PWROK and +1.35V_PWROK connect to HWPG for power good issue --- page 38 X00 X01
C C
X01 Change S3_DRAMPWRGD circuit, that change 1.5VPWRGD to +V1.05S_VCCP_PWRGOOD and un-stuff RU50 ---- page 8 X00 X01
X01 Remove RZ13 for power value issue --- page 34 X00 X01
X01 Remove RV471 for Touch screen power issue --- page 35 X01X00
X01 Un-stuff RH32 for +3V backdrive --- page 16 X00 X01
X01 Un-stuff RH158 for +3V backdrive --- page 20 X00 X01
X01 X01X00
X01 X01X00Change PCH_GPIO72 and WAKE# PU to +3VALW for DSx issue --- page 18
X01 Update power circuit
X01 Un-stuff QZ26/QZ27 for EC multi SPI function --- page 17 X00 X01
X01 SML0CLK/ SML0DATA PU to 499 ohm and reserve RH65 for NFC suggest --- page 17 X00 X01
X01 Change RPH11 8P4R to RH448/RH456 single type --- page 17 X00 X01
X01 X00 X01
X01 X00 X01Add JRTC to MB --- page 16
B B
X01 X00 X01
X02 USB3.0 CAP CI5,CI6,CI7,CI8,CI11,CI12,CI13,CI20,CI3,CI4,CI16,CI17 change to 0.1uF for USB3.0 issue --- page 45 X01 X02
X02 modify eDP chock LV16~LV20 for footprint issue --- page 35 X01 X02
X02 LA7/LA8/LA9/LA11 change footprint size --- page 48 X01 X02
A A
X02 X01 X02
A00 X02 A00
A00
A00 X02 A00
A00 X02 A00
5
4
Modify USB port detect pin to independent --- page 38 and page 45X00
Change mDP output from GPU --- page 25X00
CCD connector change to 11 pin, add CCD_INT signal. --- page 35X00
3
2
1
From To
XXX00
X
X
X
X
EMC request add CM22 to close JTB1 pin17 --- page 40X00 X00X
Modify USB charger schematic, change RI17/RI31/RI32connect to +3VALW, and remove RI18/RI28 --- page 44X00 X X00
SWAP DA4 pin2 and pin3 --- page 48
Use array resister to reduce componentX00 X X00 Change RH45/RH46/RH47/RH49to array resister RPH11 --- page 17 Change RH50/RH51 to arrayresister RPH14 ---page 17 Change RH66/RH83/RH88/RH90to array resisterRPH24 --- page 17 Change RH69/RH74/RH77/RH81to array resisterRPH25 --- page 17 Change RH71/RH72 to arrayresister RPH15 ---page 17 Change RH137/RH139/RH140/RH141 to array resister RPH1 --- page 18 Change RH147/RH149/RH150/RH153to array resisterRPH2 --- page 18 Change RH116/RH117/RH118/RH124to array resisterRPH4 --- page 18 Change RH134/RH135/RH142/RH168/RH178/RH186/RH192/RH187 to array resister RPH26 --- page 19 Change RH189/RH183/RH179/RH181 to array resister RPH7 --- page 20 Change RH160/RH185/RH184/RH172to array resisterRPH8 --- page 20 Change RH190/RH178/RH177/RH182to array resisterRPH9 --- page 20 Change RV291/RV293/RV295/RV400to array resisterRPH12 --- page 24 Change RV292/RV294/RV296/RV297to array resisterRPH13 --- page 24 Change RV299/RV300 to array resister RPH16 --- page 24 Change RV325/RV326 to arrayresister RPH17 ---page 25 Change RV331/RV333/RV334/RV335to array resiterRPH10 --- page 26 Change RH94/RH96 to arrayresister RPH27 ---page 35 Change RV445/RV447 to arrayresister RPH18 ---page 36 Change RE72/RE73 to arrayresister RPH20 ---page 38 Change RE17/RE18/RE36/RE37 to array resiter RPH19 --- page 38 Change RE14/RE15 to array resister RPH21 --- page 38 Change RH82/RH93 to arrayresister RPH22 ---page 42 Change R136/R137 to arrayresister RPH23 ---page 46
Change QZ15/QZ20 to dual MOS QZ23 --- page 34 Change QE4/QE6 to dual MOS QZ24 --- page 39
Remove RV401/RV402/QV26/QV28/RV404/CV745/QV27, Add CV26/CV28/UV12 --- page 35
Remove RZ20/RZ14/QZ6/QZ10/CZ15/RZ17/QZ9/CZ38/QZ8/QZ7/RZ37, Add UZ4/RZ132/RZ133/CZ28/CZ29/QZ9/RZ17 --- page 34
Use Green Clock to reduce componentX00 Unstuff RH1/YH1/CH3/CH4, add RH96 --- page 16 Unstuff RH89/YH2/CH27/CH28, add RH102 --- page 17 Unstuff YV1/CV575/CV576, add RV13 --- page 24 Unstuff YL1/CL22/CL25, Stuff RL10 --- page 41 Add C28/C27/C26/C84/R67/R68/U3/C34/R91/Y5/C41/C32 --- page 46
X X00
X X00
X X00
X X00
X X00
Un-stuff RE56 and stuff RE60 for EC power on issue --- page 38X01 X00 X01
Remove PCH control TPM PD pin for +3V backdrive --- page 40X01 X00 X01
Crete EC 3810 GPIO11 SUS_ON for DDR power enable --- page 38X01 X00 X01
Stuff RV450/RV451 10K ohm for HDMI EA measure issue --- page 36X01 X00 X01
Stuff CZ7 to 0.01u change CZ6 to 0.047u and add CZ8 0.047u cap for 1.05VDGPU delay --- page 33 Stuff RZ10 10 ohm, RZ11/RZ15 1 ohm, RZ6 100 ohm. change DZ2 enable pin2 to DGPU_PWROK and remove RZ485 Change RZ5 to 100k ohm
Remove RV504 and add QV40 for GPU thermal function --- page 24X01 X00 X01
Audio vendor suggest for Iphone Add RA11/CA30/RA2/RA3 Change CA26 to 100U Change RA18/RA17 to 8.2 ohm
Add +1.35V enable signal SUS_ON and rename PM_SLP_S5# to PM_SLP_S4#. Add 33uF*1 OS-CON for acoustic issue.
Change DP from GPU output to Internal outputX01 X00 X01
Add DSP bypass circuit --- page 46X01 X00 X01
Modify I/O connector JTB1 pin define --- page 40
Add DI15 for Touch screen function --- page 35X01 X00 X01
Add LCD_TEST RE64 PU to +EDPVDD --- page38X01 X00 X01
Power SW LED resistor R66 change to 560 ohm --- page39X01 X00 X01
Add JP802/JP803/JP11/JP14/JP15 for power measureX01 X00 X01
Change JP5 size --- page 21X01 X00 X01
Change FAN connector --- page 39X01 X00 X01
PCH_GPIO12 change to PU +3VALW --- page 20X01 X00 X01
Change LA7/LA8/LA9/LA11 to 180 ohm bead --- page 48X01 X00 X01
Remove JRTC --- page 16X01 X00 X01
Add RV411 for mDP voltage issue --- page 36X01 X00 X01
Add RF shielding EMIST_SUL-15A3M_1P footprint 12pcs --- page 40X01 X01X00
Change ODD_DA# to RPH2, un-stuff RH164, and RH416 for GPU enable issue --- page 18X01 X00 X01
BIOS setting request PCH_GPIO70 for UMA/DIS, PCH_GPIO1 for GPU N14/N15 --- page 20X01 X00 X01
Change SW1 connector --- page 39X01 X00 X01
Change NFC connector --- page 49X01 X00 X01
Stuff RU7/RU12/RU36 --- page 6X01 X00 X01
Change Touch screen sleep circuit, remove DI5, add DV17/DV20/RV5 --- page 35X01 X00 X01
Un-stuff RV466--- page 37X01 X00 X01
Change DSP bypass circuit --- page 46X01 X00 X01
Update power circuitX01 X00 X01
Remove GPU DP HDP circuit --- page 24/37X01 X00 X01
Remove GPU DP port power --- page 26X01 X00 X01
Remove GPU VRAM power for N14E-GL --- page 28X01 X00 X01
Change JHP2 connector --- page 47X01 X00 X01
Add CV639 for vendor request --- page 28X01 X00 X01
Change SD302100280 to SD309100280 for EOLX01 X00 X01
CA17 un-stuff for pop issueX01 X00 X01
Remove DV16, add DV18/DV19/RV415 for LCD power control --- page 35 Add RV416/RV419 for EC control LCD SMBUS --- page 35
Remove RV483 and add RH178 for ST test --- page 20X01 X00 X01
RZ5 change to 60.4K ohm for GPU sequence --- page 33X02 X01 X02
CA53/CA58/CA59/CA60 change to 22nf for pop issue --- page 48X02 X01 X02
Hynix “0”. ROM_SI=PD 5K ohm, Samsung”1”. ROM_SI=PD 10K ohm for VRAM SETTING --- page 25X02 X01 X02
RA45/48 change to 60Kohm,RA46/51 changr to 30Kohm for Audio issue --- page 48X02 X01 X02
change F1 to SP040002400 --- page 39X02 X01 X02
Stuff RV460 and change RV458 to 4.7K ohm for HDMI EA issue --- page 36X02 X01 X02
Change CV677 to X6S --- page 30X02 X01 X02
Change UZ14 for G5243 for +3V_PCH issue --- page 34X02 X01 X02
Add TI HDD redriver co-layout --- page 43X02 X02X01
Change LED footprint and change LED control circuit --- page 49X02 X01 X02
Add PD resistor for SATA redriver EA issue --- page 43X02 X01 X02
Change RU118 to 10K for OTP issue --- page 8X02 X01 X02
Change Board ID --- page38X02 X01 X02
Change H10/H18 footprint --- page 40 X02X01X02
Reserve PD resistor for SATA redriver --- page 43X02 X01 X02
Change RA33/RA98/RA101/RE60/RE321/RE322/RN5/RN9/RU37/RU43/RU53/RV8/RV480/RV481/RV482/RV503/RV510/RH416 RV411/RV415/RV337/R8/R53/R54/R56/R58/RA53/RH202/RH213/RI74 to 0ohm short pad
Change UV12 and UN3 to GMT G5243X02 X01 X02
UV12 change to APL3512ABI-TRG_SOT23-5 for bring up issue --- page 35 Remove CV3508 for panel EA issue --- page 35 Add CCD_INT# pin --- page 38
EMI shielding clip footprint change to SOLUTION_ICSRC6510-015SFR-B_1P(H7/H14/H17/H27/H19/H20/H21/H23/H25/H24/H26) --- page 40 change SM070002000 to SM070002Q00 --- page 35
EMI shielding clip footprint change to EMIST_SUL-12A2M_1P(H7/H14/H17/H27/H19/H20/H21/H23/H25/H24/H26) --- page 40 Remove N15P external ROM and strap --- page 25
Remove eDP co-layout component, and add EC_INV_PWM conntrol PWM from EC --- page 35
4
Security Classific ation
Security Classif ication
Security Classif ication
Compal Secret Data
Compal Secret Data
Compal Secret Data
2011/08/25 2012/ 07/25
2011/08/25 2012/ 07/25
2011/08/25 2012/ 07/25 Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERIN G DRAWING IS T HE P ROPRIET ARY PROP ERTY OF COMPAL ELECT RONICS, INC. A ND CONTAI NS CONFIDENT IAL
THIS SHEET OF ENGINEERIN G DRAWING IS T HE P ROPRIET ARY PROP ERTY OF COMPAL ELECT RONICS, INC. A ND CONTAI NS CONFIDENT IAL
THIS SHEET OF ENGINEERIN G DRAWING IS T HE P ROPRIET ARY PROP ERTY OF COMPAL ELECT RONICS, INC. A ND CONTAI NS CONFIDENT IAL AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE T RANSFERE D FROM THE CUST ODY OF THE COMPETE NT DIVI SION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE T RANSFERE D FROM THE CUST ODY OF THE COMPETE NT DIVI SION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE T RANSFERE D FROM THE CUST ODY OF THE COMPETE NT DIVI SION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL E LECTRONICS , INC. NEIT HER T HIS SHE ET N OR THE INFORMAT ION IT CONT AINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL E LECTRONICS , INC. NEIT HER T HIS SHE ET N OR THE INFORMAT ION IT CONT AINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL E LECTRONICS , INC. NEIT HER T HIS SHE ET N OR THE INFORMAT ION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRI TTE N CONSENT OF COMPAL ELEC TRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRI TTE N CONSENT OF COMPAL ELEC TRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRI TTE N CONSENT OF COMPAL ELEC TRONICS, INC .
3
Deciphered Date
Deciphered Date
Deciphered Date
2
X00For GPU power sequence issue
X00 X01
X00 X01X01 change CH27,CH28=12pF,CV575,CV576=10pF
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Block Diagram
Block Diagram
Block Diagram
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
Date: Sheet
Date: Sheet
Date: Sheet
1
X01RZ484 change PU to +3VS for GPU GC6 function issue --- page 33X01 X00
A00X02
50 62Tuesday, September 03, 2013
50 62Tuesday, September 03, 2013
50 62Tuesday, September 03, 2013
of
of
of
X00
X00
X00
X00
X00
X01X00X01 Change RZ600 to 11K ohm for 1.5V power value issue --- page 34
X01X01
0.1
0.1
0.1
Page 51
5
EN_INVPWR
SI3457BDV
RT8207MZQW
D D
ADAPTER
BATTERY
SYSON
TPS51212DSCR
SUSP#
B+
VR_ON
ISL95836HRTZ
CHARGER
EC_ON / VCOUT0_PH
RT8205LZQW
C C
PU300
PU200
QV2
PU500
PU700
9
+INV_PWR_SRC
CPU1.5V_S3_GATE
SUSP#
+1.5V
+0.75VS
+VCCP
+VCC_CORE / +VCC_GFXCORE_AXG
PWRSHARE_EN_EC#
+5VALW
+V1.05S_VCCP_PWRGOOD
ALW
+3V
PM_SLP_S3#
SUSP#
PCH_PWR_EN
PCH_PWR_EN
EN_WOL
SUSP#
SUSP#
AO4728L
QU6
SI3456DDV
UZ4
TPS2062ADR
UI2
SI3456DDV
QN1
SI4800BDY
QZ6
AO3419L
QH5
TPS51461RGER
PU600
SI3456DDV
2
QZ1
AO3419L
QL3
SY8033BDBC
PU400
SI4800BDY
QZ8
+1.5VS
+
1.5V_CPU_VDDQ
+5V_CHGUSB
+5VS_HDD
+5VS
+5V_PCH
+VCCSA
+3V_PCH
+LAN_IO
+1.8VS
+3VS
4
ODD_EN#
EN_DFAN1
EC_ENVDD / VGA_LVDDEN
EN_CAM
WLAN_EN
FDC655BN
QN4
APE8873M
UE4
AO3419L
QV2
SI2301CDS
QV3
SI3456DDV
QM1
3
AC mode Ta -> Tb -> Tc
Power Button & BATBTN & USBCHG_DET
Tc
DC mode Tc -> Ta -> Tb
ON/OFF
ENE KB9012
PWRBTN#
PCH
DPWROK
RSMRST# PCH_RSMRST#
ACPRESENT
SYS_PWROK
ISL95836HRTZ-T
PGOOD
AO4728L
SLP_S5#
SLP_S3#
APWROK
PWROK
18
+5VS_ODD
+FAN_POWER
+VCC_CORE/+VCC_GFXCORE_AXG
+
LCDVDD
7
+3VS_CAM
1
+1.5V_CPU_VDDQ
+3VS_WLAN
PBTN_OUT#
4
PCH_DPWROK
5
6
AC_PRESENT
7
PM_SLP_S5#
8
PM_SLP_S3#
10
PCH_APWROK
11
PCH_PWROK
17
VR_ON
16
VGATE
CPU1.5V_S3_GATE
13
EC_ON
SYSON
SUSP#
SA_PGOOD
2
+3V/+5V_ALW
Ta
4
9
12
15
RT8205LZQW
PGOOD
Tb
AO3419L/SI3456DDVPCH_PWR_EN
RT8207MZQW
PGOOD
TP0610K
SY8033BDBC
PGOOD
SI4800BDY
SI4800BDY
SI3456DDV
TPS51212DSCR
PGOOD
+VSBP
+3V/+5V_PCH
+1.5V/+0.75VS
14
+1.8VS
+3VS
+5VS
+1.5VS
+VCCP
TPS51461RGER
PGOOD
1
+VCCSA
GPU
+3VS
AO3419L
DGPU_PWR_EN
QZ1
+3VS_DELAY
B B
A A
RC delay
B+
ISL62883CHRTZ
PU800
+GPU_CORE
5
+1.5V
RC delay
SI4634DY
UZ2
+1.5VSDGPU
RC delay
+VCCP
SI4634DY
UZ1
+1.05VSDGPU
+3VLP
+3VLP
+3VLP
100k
100k
100k
Power Button
A
BATBTN
B
USBCHG_DET
C
Charger_LDO
4
3
ON/OFF
2
PBTN_SW#
BATBTN#
+3V_ALW
10k
USBCHG_DET#
+3VLP
100k
100k
2n7002
150k
When press power button : A -> 2 -> 3 -> A1 When press Battery button : B -> 2 -> 3 -> B1 When USB charge device plug in : C -> 2 -> 3 -> C1
+3V_ALW
ENE KB9012
EC check which button is pressed
4
PCH_PWR_EN
...
PCH_PWROK
BATT_CAP_LED#_LV[1...5]
PWRSHARE_OE# & PWRSHARE_EN_EC#
EC_ON
+3V_ALW
10k
VCOUT0_PH#
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ANDTRADESECRETINFORMATION.THISSHEETMAYNOTBETRANSFEREDFROMTHECUSTODYOFTHECOMPETENTDIVISIONOFR&D
ANDTRADESECRETINFORMATION.THISSHEETMAYNOTBETRANSFEREDFROMTHECUSTODYOFTHECOMPETENTDIVISIONOFR&D
ANDTRADESECRETINFORMATION.THISSHEETMAYNOTBETRANSFEREDFROMTHECUSTODYOFTHECOMPETENTDIVISIONOFR&D DEPARTMENTEXCEPTASAUTHORIZEDBYCOMPALELECTRONICS,INC.NEITHERTHISSHEETNORTHEINFORMATIONITCONTAINS
DEPARTMENTEXCEPTASAUTHORIZEDBYCOMPALELECTRONICS,INC.NEITHERTHISSHEETNORTHEINFORMATIONITCONTAINS
DEPARTMENTEXCEPTASAUTHORIZEDBYCOMPALELECTRONICS,INC.NEITHERTHISSHEETNORTHEINFORMATIONITCONTAINS MAYBEUSEDBY ORDISCLOSEDTOANYTHIRDPARTYWITHOUTPRIORWRITTENCONSENTOFCOMPALELECTRONICS,INC.
MAYBEUSEDBY ORDISCLOSEDTOANYTHIRDPARTYWITHOUTPRIORWRITTENCONSENTOFCOMPALELECTRONICS,INC.
MAYBEUSEDBY ORDISCLOSEDTOANYTHIRDPARTYWITHOUTPRIORWRITTENCONSENTOFCOMPALELECTRONICS,INC.
2
Turn on Other system power
A1
Turn on
B1
Battery LED
Turn on USB
C1
power charge
RT8205LZQW
3
Compal Secret Dat a
Compal Secret Dat a
Compal Secret Dat a
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
Deciphered Date
Deciphered Date
Deciphered Date
+3V/+5V_ALW
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Power Sequence
Power Sequence
Power Sequence
Size Document Num ber Re v
Size Document Num ber Re v
Size Document Num ber Re v
Date: Sheet
Date: Sheet
Date: Sheet
1
51 62Tuesday, Septem ber 03, 2 013
51 62Tuesday, Septem ber 03, 2 013
51 62Tuesday, Septem ber 03, 2 013
of
of
of
0.1
0.1
0.1
Page 52
A
12
PC101
PC100
1000P_0402_50V7K
FBMA-L11-201209-221LM A35_2P
FBMA-L11-201209-221LM A35_2P
100P_0402_50V8J
ADP100
CONN@
ACES_50290-00701-001
1 1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
12
12
PL108
PL103
FBMA-L11-201209-221LMA35_2P
12
FBMA-L11-201209-221LMA35_2P
ADPIN
12
12
PC120
0.1U_0402_25V6
PL101
BLM15AG102SN1D_2P
PSID
PC121
0.1U_0402_25V6
1 2
B
PL100
1 2
PL106
1 2
C
PR101
@
0_0402_5%
1 2
PQ100 FDV301N-G_SOT23-3
1 3
D
G
2
PSID-2
C
2
PQ101
B
MMST3904-7-F_SOT3 23-3
E
3 1
ESD Parts
S
PSID-3
PR103
33_0402_5%
1 2
PR105
10K_0402_1%
1 2
2
3
PD100
@
BAV99W-7-F_SOT323-3
1
+5VALW
VIN
12
12
PC102
1000P_0402_50V7K
12
PC130
PC103
100P_0402_50V8J
EMI Parts
15P_0402_50V8J
PD102
PESD24VS2UT_SOT23-3 ~D
@
12
PR104 100K_0402_1%
2
3
1
12
PR106 15K_0402_1%
PSID-1
+3VALW+5VALW
D
12
PR102
2.2K_0402_1%
PS_ID
38
PL105
HCB2012KF-121T50_0805
1 2
PL102
HCB2012KF-121T50_0805
1 2
12
12
2 2
3 3
PC105
PC104
100P_0402_50V8J
0.01UF_0402_25V7K
BAT100
CONN@
ACES_50290-01201-P01
1
1
2
2
3
3
4
4
5
5 6 7 8
9 10 11 12
CLK_SMB
6
DAT_SMB
7
BATT_PRS
8 9 10 11 12
JIMBTY battery connector
SMART
SMART
SMARTSMART Battery:
Battery:
Battery:Battery:
01.BAT+
01.BAT+
01.BAT+01.BAT+
02.BAT+
02.BAT+
02.BAT+02.BAT+
03.BAT+
03.BAT+
03.BAT+03.BAT+
04.BAT+
04.BAT+
04.BAT+04.BAT+
05.CLK_SMB
05.CLK_SMB
05.CLK_SMB05.CLK_SMB
06.DAT_SMB
06.DAT_SMB
06.DAT_SMB06.DAT_SMB
07.BATT_PRS
07.BATT_PRS
07.BATT_PRS07.BATT_PRS
08.SYS_PRS
08.SYS_PRS
08.SYS_PRS08.SYS_PRS
09.GND
09.GND
09.GND09.GND
10.GND
10.GND
10.GND10.GND
11.GND
11.GND
11.GND11.GND
12.GND
12.GND
12.GND12.GND
BATT++BATT+
1
PD103
@
12
12
PC106
PC107
100P_0402_50V8J
1000P_0402_50V7K
PESD24VS2UT_SOT23-3 ~D
2
3
PESD24VS2UT_SOT23-3 ~D
100_0402_1%
1 2
100_0402_1%
1 2
PR109
PR111
@
PD104
2
1
3
ESD Parts
PR113
100_0402_1%
1 2
EC_SMB_CK1
EC_SMB_DA1
38,53
38,53
PR114
10K_0402_1%
1 2
EC_BATT_PRS#
+3VALW_EC
38,53
18,54
38,53
38
ESD Parts
VCIN1_PH
close EC
POK
ADP_I
+3VALW
12
B+
PR110 100K_0402_1%
PR112
@
0_0402_5%
1 2
PC110
.1U_0402_16V7K
12
PC111
@
0.1U_0402_25V6
VSB_N_002
12
12
PR116
13.7K_0402_1%
12
PR118
13.7K_0402_1%
2
G
1M_0402_5%
PR108
37.4K_0402_1%
1 2
VSB_N_003
13
D
PQ103 L2N7002WT1G _SC70-3
S
PR107
12
12
VSB_N_001
PQ102
SI3457CDV-T1-GE3_TSO P6
S
4
PC108
0.22U_0603_25V7K
6 5 2
D
1
G
3
PC109
+VSBP
12
0.1U_0402_25V6
4 4
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
A
B
C
Title
Title
Title
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR-DCIN / BATT CONN / OTP
PWR-DCIN / BATT CONN / OTP
PWR-DCIN / BATT CONN / OTP
LA-9941P
LA-9941P
LA-9941P
D
52 62Wednesday, September 04, 2013
52 62Wednesday, September 04, 2013
52 62Wednesday, September 04, 2013
0.1
0.1
0.1
Page 53
5
VIN
12
12
PR203
PR202
@
D D
C C
B B
A A
For DT mode
38
ACOFF
Delay Adaptor OC H_PROCHOT# 200 us while Hybrid pow er transition
38
H_PROCHOT#_EC
@
13
D
2
G
S
5.1K_0805_1%
PQ202
@
2N7002-7-F_SOT23-3
ACOK
PR290
1 2
160K_04 02_1%
5.1K_0805_1%
D
PQ203B
@
DMN66D0LDW-7_SOT363-6
PR212
@
200K_04 02_1%
1 2
@
.1U_0402 _16V7K
12
PC260
.01U_0402_16V7K
S
34
PC213
38,52
38,52
5
G
2
12
12
PR216
82.5K_0402_1%
EC_BATT_PRS#
2
G
G
ADP_I
H_PROCHOT#
13
D
PQ230 L2N7002 WT1G_SC70 -3
S
12
PR204
@
1M_0402_5%
For
ErpLot6
12
61
D
PR211
PQ203A
@
S
1M_0402_5%
@
DMN66D0LDW-7_SOT363-6
VIN
12
PR214
499K_0402_1%
12
PC218
0.01UF_0 402_25V7K
PC219
100P_04 02_50V8J
1 2
ADP_I
For LEARN mode disable (pulse)
PC228
@
0.01UF_0 402_25V7K
1 2
PR225
@
100K_04 02_1%
H_PROCHOT#
12
PC208
0.022U_0 402_25V7 K
PD200
1 2
RB751V-40_SOD323-2
EC_SMB_D A138,52
EC_SMB_C K138,52
12
38,58,8
4
PQ200
MDS1521U RH_SO8
8 7 6 5
4
12
@
0_0603_ 5%
38
AC_IN
PR213
10_1206 _5%
1 2
12
PC214 1U_0805 _25V6K
EC_SMB_D A1
EC_SMB_C K1
PR224
10K_040 2_1%
1 2
VCC
ACDET
CELL
Pull high for 3 CELL operation
13
D
2
G
PQ207
@
2N7002K W_SOT323-3
S
Battery Current Sensor - BMON circuits
+3VALW
1 2 3
12
PC200
0.1U_040 2_25V6
PR207
PR220
@
0_0402_ 5%
1 2
PR230
@
0_0402_ 5%
1 2
EC_SMB_D A1_R
1 2
EC_SMB_C K1_R
PR231
@
0_0402_ 5%
REGN
1 2
PR280
@
0_0402_ 5%
ST change to short pads
1 2
PR282
@
1_0402_ 5%
PR200
1 2
4.02K_0 402_1%
1 2 3
PR208
4.02K_0 402_1%
1 2
REGN
12
PC252
@
CMSRC
PQ201
MDS1521U RH_SO8
12
12
INA199A2 DCKR_SC70-6~ D
0.1U_0402_25V6
4
ACDRV
PR217 100K_04 02_1%
PR223 120K_04 02_1%
6
ACDET
7
IOUT
8
SDA
9
SCL
10
CELL
PU202
@
1
REF
2
GND
3
V+
8 7 6 5
ACOK
5
ACOK
BQ24715 RGRR_QFN20_ 3P5x3P5
/BATDRV
11
BATDRV#
Out
IN-
IN+
10_0402 _1%
ACDRV
4
12
SRN
6
5
4
PR283
@
1U_0603 _25V6K
1 2
CMSRC
3
ACDRV
CMSRC
PU200
SRN
SRP
13
SRP
BMON_OUT
IN+
12
CSON_B
PC209
ACP
ACN
2
1
ACP
GND
14
15
@
1 2
0_0402_ 5%
IN-
PC251
@
1U_0402 _6.3V6K
1 2
CSSP_1
12
ACN
PHASE
HIDRV
BTST
REGN
LODRV
PR281
3
PR209
@
0_0402_ 5%
0.1U_040 2_25V6
21
PAD
VCC
@
12
@
10_0402 _1%
CSOP_B
PR201
0.01_25 12_1%
1
2
PC210
1 2
20
19
18
17
16
12
PC250
0.1U_0402_25V6
PR284
4
3
VCC
CHG_UGATE
BTST
REGN
CHG_LGATE
PAD@ PT200
CSSN_1
12
PR210
@
0_0402_ 5%
0.1U_040 2_25V6
1 2
PR215
2.2_060 3_5%
PC211
1 2
PR218
@
0_0402_ 5%
1 2
PR221
@
0_0402_ 5%
1 2
P1
CHG_LX
12
PC216
0.047U_0 603_25V7 K~D
12
PD201 BAT54HT1G_S OD323-2
1 2
PC212
1U_0603 _10V6K
2
PL205
FBMA-L11-2 01209-221 LMA35_2P
1 2
1 2
PL206
FBMA-L11-2 01209-221 LMA35_2P
EMI Parts
12
PC271
15P_0402_50V8J
CHG_UGATE
CHG_LX
CHG_LGATE
2
3
4
PQ204
CSD87351 Q5D_SON8-7
EMI Parts
1
8
EMI Parts
4.7_120 6_5%
PC224
680P_06 03_50V7K
Battery protection:
asserts H_PROCHO T# when adaptor is unplugged, keep low for 10ms till SW PROCHOT# is issued by E C
12
PR291 1M_0402 _1%
12
PR293 1M_0402 _1%
VIN
2
G
12
PR292 10K_040 2_1%
61
D
PQ231A
S
+3VALW
1U_0603 _10V6K
DMN66D0LDW-7_SOT363-6
PC261
1 2
12
12
PC202
PC203
0.1U_0402_25V6 2200P_0402_50V7K
7 6 5
2.2UH_FDV E1040-H-2R2M-P 3_14.2A_2 0%
12
PR222
12
5
G
12
PR294
100K_0402_1%
12
PL203
1 2
@
0.1U_040 2_25V6
1 2
H_PROCHOT#
34
D
PQ231B
S
12
PC205
PC204
10U_0805_25V6K
10U_0805_25V6K
B+
CSOP_B CSON_B
PC225
DMN66D0LDW-7_SOT363-6
12
PC206
10U_0805_25V6K
PC230
10U_080 5_16V6K
1 2
PC231
10U_080 5_16V6K
1 2
PC232
10U_080 5_16V6K
1 2
PC233
10U_080 5_16V6K
1 2
PC215
10U_080 5_16V6K
1 2
PC217
10U_080 5_16V6K
1 2
PR219
0.01_25 12_1%
1
2
PC226
0.1U_040 2_25V6
1 2
+VCHGR
BATDRV#
12
PC207
10U_0805_25V6K
4
3
4.02K_0 402_1%
1 2
PR227
1
12
PC220
0.1U_0402_25V6
PC227
0.1U_040 2_25V6
1 2
PD202
SX34H_S MA2
21
PQ208
AO4407A L_SO8
1 2 3 6
4
3S3P
CC = 5.28A
CV = 3S (12.6V)
+VCHGR
12
PC222
PC221
10U_0805_16V6K
8 7
5
EMI Parts
12
12
PC223
10U_0805_16V6K
10U_0805_16V6K
BATT+
12
PC270
15P_0402_50V8J
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPE CIFICATIONS CONTAINS CONFIDENT IAL TRADE SECRET AND OTHER PROPRI ETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITH OUT THE EXPRESS WRITTEN AUTHOR IZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE IN FORMATION IT CONTAINS WAY BE U SED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Siz
Size Documen t Number Rev
Size Documen t Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR-Charger
PWR-Charger
e Document N umber Rev
PWR-Charger
LA-9941P
LA-9941P
LA-9941P
1
53 62W ednesday, Septemb er 04, 2013
53 62W ednesday, Septemb er 04, 2013
53 62W ednesday, Septemb er 04, 2013
of
0.1
0.1
0.1
Page 54
A
1 1
B+
PJP300
@
JUMP_43X118
2
112
12
2 2
EMI Parts
PC340
12
15P_0402_50V8J
+3VALWP
B++
12
12
PC304
PC303
0.1U_0402_25V6
PC305
2200P_0402_50V7K
10U_0805_25V6K
3.3UH_FDSD0630-H-3R3M-P3_6.6A_20%
1
+
2
PL301
1 2
PC312
150U_B2_6.3VM_R35M
PR309
4.7_1206_5%
PC316
680P_0603_50V7K
B
5
PQ300 MDV1528URH_PDFN33-8-5
4
38
4
12
3VA_EN
18,52
POK
1 2
PC310
0.1U_0603_50V7K
PC315
@
.1U_0402_16V7K
123
12
SNUB_3V
12
5
PQ302
213
MDV1524URH_PDFN33-8-5
3VA_EN
BST1_3V BST_3V
1 2
PR307
2.2_0603_5%
PR340
@
0_0402_5%
1 2
PR337
@
1 2
0_0402_5%
LX_3V
UG_3V
LG_3V
C
1U_0603_10V6K
PC301
@
100P_0402_50V8J
1 2
PR300
13.7K_0402_1%
1 2
PR302
20K_0402_1%
1 2
PR305
62K_0402_1%
1 2
6
7
8
9
10
+3VLP
12
PC307
FB_3V
5
4
CS2
VFB2
EN2
PGOOD
SW2
VBST2
DRVH2
DRVL211VIN12VREG513VO114DRVL1
12
@
0_0402_5%
3
VREG3
PR335
100P_0402_50V8J
30.9K_0402_1%
FB_5V
40.2K_0402_1%
1
2
TPS51225CRUKR_QFN20_3X3
CS1
PAD
VFB1
EN1
VCLK
SW1
VBST1
DRVH1
15
PC302
@
1 2
PR301
1 2
PR304
20K_0402_1%
1 2
PR306
1 2
PU300
21
20
19
18
17
16
PR341
@
0_0402_5%
1 2
PR350
@
1 2
200_0402_1%
LX_5V
BST_5V
UG_5V
LG_5V
5VA_EN
PR308
2.2_0603_5%
1 2
D
0.1U_0603_50V7K
BST1_5V
.1U_0402_16V7K
5VA_EN
PC311
1 2
PC314
@
E
B++
EMI Parts
5
PQ301
4
38
5
PQ303
4
12
12
123
MDU1516URH_POWERDFN56-8-5
1.5UH_ETQP3W1R5W FN_9.5A_20%
12
SNUB_5V
12
123
MDU1512RH_POWERDFN56-8-5
12
PC306
0.1U_0402_25V6
1 2
PR310
4.7_1206_5%
PC317
EMI Parts
680P_0603_50V7K
PC308
PL300
12
PC309
2200P_0402_50V7K
10U_0805_25V6K
+5VALWP
1
+
PC313
2
150U_B2_6.3VM_R35M
EMI Parts
3 3
PR338
@
0_0402_5%
B++
12
12
PC320
0.1U_0402_25V6
+3VALWP
12
PC319
1U_0603_10V6K
@
1 2
PAD-OPEN 4x4m
PJP302
+3VALW
+5VALWP
PJP303
@
1 2
PAD-OPEN 4x4m
PJP301
@
1 2
PAD-OPEN 4x4m
+5VALW
3.3VALWP TDC 4.6A Peak Current 6.5A OCP current 7.8A
4 4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL T
RADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
A
B
C
5VALWP TDC 7.9A Peak Current 11.3A OCP current 13.4A
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR-3VALWP/5VALWP
PWR-3VALWP/5VALWP
PWR-3VALWP/5VALWP
LA-9941P
LA-9941P
LA-9941P
54 62Wednesday, September 04, 2013
54 62Wednesday, September 04, 2013
54 62Wednesday, September 04, 2013
E
0.1
0.1
0.1
Page 55
5
4
3
2
1
PJP400
@
JUMP_43 X118
D D
B+
112
2
1.35V_B+
12
PC400
10U_0805_25V6K
+1.35V
PJP403
@
PAD-OPEN 4x4m
PJP404
@
C C
PAD-OPEN 4x4m
+1.35V_MEN_P
12
12
1UH_FDS D0630-H-1R0M-P3 _11A_20%
1
+
PC408
2
330U_B2_2.5VM_R9M
EMI Parts
12
12
PC401
10U_0805_25V6K
PL400
1 2
4.7_1206 _5%
680P_06 03_50V7K
12
PC402
0.1U_0402_25V6
12
PR403
SNUB_1.35V
12
PC409
EMI Parts
PC403
2200P_0402_50V7K
8
18,38
5
PQ400
123
MDV1527URH_POWERDFN33-8-5
5
PQ401
213
MDV1522URH_PDFN33-8-5
+1.35V_PWR OK
PM_SLP_S4#
PJP401
21
1
2
3
4
5
1.35V_FB
@
PAD-OPEN 1x1m
+1.35V_M EN_P
16.2K_04 02_1%
1 2
22P_040 2_50V8J
1 2
12
PR408 20K_040 2_1%
PC404
0.22U_06 03_16V7K
1 2
4
+5VALW
4
PR407
@
0_0402_ 5%
1 2
PR400
2.2_0603 _5%
1 2
PR401
7.15K_04 02_1%
1 2
PR402
5.1_0603 _5%
1 2
12
PC410 1U_0603 _10V6K
ST change to short pads
BOOT_1.3 5V
DH_1.35V
SW_1 .35V
PC407
1U_0603 _10V6K
1 2
VDD_1.35 V
DL_1.35V
CS_1.35V
+5VALW
+1.35V_P WROK
1.35V_B+
S5_1.35V
15
DL
14
PGND
13
CS
12
VPP
11
VCC
1M_0402 _1%
1 2
16
LX
G5616AR Z1U_TQFN20_3 X3
PGOOD
10
PR406
17
DH
PU400
TON
9
18
8
+VLDOIN_1 .35V
19
20
VTT
BST
S5
7
VLDOIN
S3
PAD
VTTGND
VTTSNS
GND
VTTREF
VDDQSNS
VDDQSET
6
12
PR405
PC412
@
12
+1.35V_MEN_P
+0.675VSP
PC405
+0.675VS
PJP402
@
1 2
PAD-OPEN 3x3m
12
PC406
10U_0805_6.3V6M
10U_0805_6.3V6M
+V_DDR_REF
12
PC411 .1U_0402 _16V7K
B B
18,34,38,40,43,56
PM_SLP_S3#
PR409
@
0_0402_ 5%
1 2
FB sense trace
0.675Volt +/- 5%
1.35Volt +/- 5% T
DC 7.2A Peak Current 10.2A OCP current 12.2A
A A
Title
Title
Title
+1.35V_MEN/+0.675V_DDR_VTT
+1.35V_MEN/+0.675V_DDR_VTT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
+1.35V_MEN/+0.675V_DDR_VTT
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
TDC 0.7A Peak Current 1A OCP Current 1.1A
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
LA-9941P
LA-9941P
LA-9941P
55 62Thu rsday, September 05, 2013
55 62Thu rsday, September 05, 2013
55 62Thu rsday, September 05, 2013
1
0.1
0.1
0.1
Page 56
5
4
3
2
1
EMI Parts
PJP500
@
12
PC511
2
JUMP_43 X118
0.1U_0402_25V6
PJP501
@
1 2
PAD-OPEN 4x4m
PJP502
@
1 2
PAD-OPEN 4x4m
112
B+
+VCCP
+VCCP(1.05V) TDC 6.5A Peak Current 9.2A OCP current 11.1A
+V1.05V_ B+
5
12
D D
4
38,8
+V1.05S_VCCP_PW RGOOD
PU500
PR502
90.9K_04 02_1%
PR503
@
0_0402_ 5%
PM_SLP_S3#
18,34,38,40,43,55
C C
1 2
1 2
TRIP_+V1.0 5V
EN_+V1.0 5V
FB_+V1.0 5V
RF_+V1.0 5V
12
PR505 200K_04 02_1%
1
PGOOD
2
CS
3
EN
4
FB
5
RF
RT8237E ZQW(2)_W DFN10_3X3
PC510
@
1000P_0 402_50V7K
1 2
BOOT
UGATE
PHASE
VCC
LGATE
10
BST_+V1 .05V
9
UG_+V1.0 5V
8
SW_+ V1.05V
7
6
LG_+V1.0 5V
11
TP
PR501
2.2_0603 _5%
1 2
1U_0603 _10V6K
PR510
10_0603 _5%
1 2
1 2
PC506
PC504
0.1U_060 3_50V7K
1 2
+5VALW
4
PQ500
123
MDV1528URH_PDFN33-8-5
5
PQ501
213
MDV1524URH_PDFN33-8-5
12
PC500
0.1U_0402_25V6
1UH_FDS D0630-H-1R0M-P3 _11A_20%
12
12
PL500
1 2
PR504
4.7_1206 _5%
PC509 1000P_0 402_50V7K
12
12
PC503
PC502
PC501
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
1
+
PC507
2
150U_B2_6.3VM_R35M
EMI Parts
PR507
10.5K_04 02_1%
1 2
12
PR508 20K_040 2_1%
B B
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
ADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
TR BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
PWR-V1.05S_VCCPP
PWR-V1.05S_VCCPP
PWR-V1.05S_VCCPP
LA-9941P
LA-9941P
LA-9941P
56 62W ednesday, September 04, 2013
56 62W ednesday, September 04, 2013
56 62W ednesday, September 04, 2013
1
0.1
0.1
0.1
Page 57
5
4
3
2
1
D D
+1.5V_VSNS
PC602
12
PR602
300K_0402_1%
24
C C
PC605
.1U_0402_16V7K
1 2
33
B B
PR600
100K_0402_1%
1 2
DGPU_FB_EN
REF_+1.5V_RUNP
REFIN2
25
REFIN
26
VREF
27
RA
28
EN
29
TP
PT601
@
PAD
4700P_0402_25V7K
23
22
VSNS
GSNS
TPS51367RVER_QFN28_4 P5X3P5
PGOOD1LP#2MODE
.1U_0603_25V7K
12
21
SLEW
3
PC614
PC604
1U_0603_10V7K
1 2
19
20
GND
TRIP
PU600
NC
BST5SW6SW7SW8SW
4
BST_+1.5VRUN
12
+1.5V_RUN_B+
17V518
VIN16VIN
12
PR608
5.1_0603_5%
15
VIN
PGND
PGND
PGND
PGND
PGND
9
SW_+1.5VRUN
14
13
12
11
10
EMI Parts
12
12
PC620
PC600
47P_0402_50V8J
.1U_0402_16V7K
12
PC607 33P_0603_50V8J
12
PR607 10_1206_5%
0.68UH_PCMC063T-R68 MN_15.5A_20%
PL600
1 2
EMI Parts
B+
PJP600
@
PAD-OPEN 3x3m
12
12
12
PC601
2200P_0402_50V7K
12
PC621
PC610
PC603
4.7U_0805_16V7K
@
4.7U_0805_16V7K
4.7U_0805_16V7K
12
+1.5VSDGPU
1
PC613
PC612
PC611
2
22U_0805_6.3VAM
22U_0805_6.3VAM
2
2
22U_0805_6.3VAM
+1.5V_VSNS
PJP601
@
1 2
PAD-OPEN 4x4m
PJP602
@
1 2
PAD-OPEN 4x4m
1
1
1.5Volt +/-5% TDC 9.7A Peak Current 13.8A OCP current 16A (Fix)
+5VALW
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_+1.5VRUN
PWR_+1.5VRUN
PWR_+1.5VRUN
LA-9941P
LA-9941P
LA-9941P
57 62Wednesday, September 04, 2013
57 62Wednesday, September 04, 2013
57 62Wednesday, September 04, 2013
1
0.1
0.1
0.1
Page 58
5
PR700 130_0402_5%
PR702 54.9_0402_1%
1 2
0_0402_5%@
1 2
0_0402_5%@
1 2
0_0402_5%@
1 2
PR710
@
0_0402_5%
1 2
3.83K_0402_1%
1 2
12
PC724 33P_0402_50V8J
PR732
1K_0402_1%
1 2
FB
PR738
@
2K_0402_1%
PC725
@
330P_0402_50V7K
VCCSENSE
VSSSENSE
1 2
PR701 75_0402_5%@
1 2
PR703
PR705
PR706
VR_ON_VCORE VCC_PGOOD
VR_HOT_CPU
PR724
100P_0402_50V8J
PR733
1.65K_0402_1%
1 2
PC718
1 2
330P_0402_50V7K
0.01U_0402_50V7K
+VCCIO_OUT
D D
12
VR_SVID_DAT
12
VR_SVID_ALRT#
12
VR_SVID_CLK
38
VR_ON
PR711
1.91K_0402_1%
1000P_0402_50V8-J
PR726
@
100K_0402_5%
1 2
0.022U_0402_25V7K
0.022U_0402_25V7K
.1U_0402_16V7K
1 2
PC709
1 2
PR718
95.3K_0402_1%
1 2
PC732
1 2
PC733
1 2
PC738
470K_0402_5%_TSM0B474J4702RE
12
PC710
47P_0402_50V8J
2K_0402_1%
0.022U_0402_16V7K
ISUMN
12
PR722
499_0402_1%
1 2
1 2
PH700
1 2
PR727
27.4K_0402_1%
12
PR736
12
PC726
12
13
PR719
@
0_0402_5%
1 2
12
12
18,38,6
IMVP_VR_PG
38,53,8
H_PROCHOT#
C C
+VCCP
ISEN2
ISEN1
B B
A A
+3VS
SCLK
IMON
NTC COMP FB
PR728
6.04K_0402_1%
1 2
PC734
@
1 2
PC737
1 2
SDA
ALERT#
4
73.2K_0402_1%
1 2
3.24K_0402_1%
1 2
16.9K_0402_1%
1 2
1
SCLK
2
VR_ON
3
PGOOD
4
IMON
5
VR_HOT#
6
NTC
7
COMP
8
FB
33
PAD
FB2/VSEN
12
PR704
PR707
PR709
@
PC736
0.082U_0402_16V7K
30
32
28
31
29
SDA
PROG2
PROG3
ALERT#
SLOPE/PROG1
FB2/VSEN9ISEN310ISEN211ISEN112RTN13ISUMN14ISUMP15VDD
VCC_core (Base on PDDG rev 1.0) (1.8V) TDC 21A TDC PL2 (40Sec):26A Peak Current 55A DC Load line -1.5mV/A AC Load line -2.4mV/A Icc_Dyn_VID1 35A OCP Current 66A DCR 0.82mohm +/-5%
H/S Rds(on) : 7.4mohm, 8.8mohm L/S Rds(on) : 2.6mohm, 3.1mohm
TYP MAX
+5VS
BOOT2
UGATE2
PHASE2
25
26
27
BOOT2
PHASE2
UGATE2
24
LGATE2
23
VDDP
22
PWM3
21
LGATE1
20
PHASE1
19
UGATE1
18
BOOT1
17
VIN
PU700
16
ISL95812HRZ-T_QFN32_4x4
12
PC722
12
@
2700P_0402_50V7K
PR734
12
390_0402_1%
PR739
@
845_0402_1%
PC729
@
0.082U_0402_16V7K
1 2
PR747
@
0_0402_5%
1 2
PR748
11K_0402_1%
1 2
1 2
PH701
10K_0402_5%_ERTJ0ER103J
1U_0603_10V6K
12
0.33U_0603_10V7K
1 2
0.022U_0603_50V7K
1 2
3.57K_0402_1%
1 2
PC708
1 2
LGATE2
LGATE1 PHASE1 UGATE1 BOOT1
1_0603_1%
1 2
PC714
0.1U_0603_16V7K
PC730
PC731
PR749
PR730
12
VCORE_VDDP
12
ISUMP
ISUMN
PR712
@
0_0402_5%
PC711
0.22U_0603_25V7K
PR725
0_0402_5%@
1 2
+5VS
3
+VCC_PWR_SRC1
UGATE1
PHASE1
BOOT1
LGATE1
PR740
2.2_0603_5%
1 2
UGATE2
PHASE2
PR713
2.2_0603_5%
1 2
BOOT2
LGATE2
1 2
PC727
0.22U_0603_16V7K
1 2
PC706
0.22U_0603_16V7K
2
3
4
2
+VCC_PWR_SRC2
1
8
1
2
3
4
8
1
+
PC700
2
100U_D2_16VM_R50M
PQ703 CSD87351Q5D_SON8-7
7 6 5
+VCC_PWR_SRC1
12
PC701
10U_0805_25V6K
PQ700 CSD87351Q5D_SON8-7
7 6 5
PR716
10_1206_5%
PC707
33P_0603_50V8J
EMI Parts
PC715
PR743
10_1206_5%
PC728
33P_0603_50V8J
EMI Parts
1
EMI Parts
12
12
PC702
10U_0805_25V6K
12
12
PC703
10U_0805_25V6K
ISUMP
12
PC704
0.1U_0402_25V6
PR714
3.65K_0603_1%
1 2
ISEN2
V1N
12
PC705
2200P_0402_50V7K
0.36UH_FDUE1040J-H-R36M-P3_33A_20%
P2_SW
PR715
100K_0603_1%
1 2
PR721
@
1_0402_5%
1 2
12
PC762
47P_0402_50V8J
1
2
@
2
JUMP_43X118
@
HCB2012KF-121T50_0805
1 2
PL701
PJP700
PL705
4
3
112
V2N
12
PR717 10_0402_1%
ISUMN
B+
+VCC_CORE
B+
EMI Parts
12
12
12
10U_0805_25V6K
PC717
PC716
10U_0805_25V6K
10U_0805_25V6K
12
PR741
3.65K_0603_1%
1 2
12
ISEN1
ISUMP
V2N
12
12
PC719
PC721
0.1U_0402_25V6 2200P_0402_50V7K
0.36UH_FDUE1040J-H-R36M-P3_33A_20%
1
2
P1_SW
PR742
100K_0603_1%
1 2
PR744
@
1_0402_5%
1 2
12
HCB2012KF-121T50_0805
PC761
47P_0402_50V8J
PL702
PJP701
@
2
112
JUMP_43X118
PL700
@
1 2
4
3
12
ISUMN
+VCC_CORE
V1N
PR745 10_0402_1%
Local sense pu t on HW site
DELL CONFIDENTIAL/PROPRIETARY
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
+VCC_CORE
+VCC_CORE
+VCC_CORE
LA-9941P
LA-9941P
LA-9941P
1
58 62Wednesday, September 04, 2013
58 62Wednesday, September 04, 2013
58 62Wednesday, September 04, 2013
0.1
0.1
0.1
Page 59
25
GPU_VSS_SENSE
25
GPU_VDD_SENSE
+VGA_B+
+GPU_CORE
PR815
20_0402_1%
1 2
PR827
@
15.8K_0402_1%
1 2
0.01UF_0402_25V7K
12
PC807
0.1U_0402_25V6
PR818
@
0_0402_5%
1 2
PR819
100_0402_1%
1 2
PR823
@
0_0402_5%
1 2
PR825
100_0402_1%
1 2
.01U_0402_16V7K
1 2
PC825
@
@
PC824
1 2
GPU_CORE (0.95V) TDC 45A Peak Current 75A OCP current 86A
PR836 0_0402_5%@
1 2
PR809
20K_0402_1%
1 2
10K_0402_1%
1 2
10
11
12
7
8
9
PR850
PU800
REFIN
VREF
TON
RGND
VSNS
SS
24
+3VS_DELAY
12
PR803
2.2K_0402_1%
24
GPU_PSI
Pull high by EE side
PR841
47K_0402_1%
1 2
12
PC812
0.01UF_0402_25V7K
U2_BOOT1
GPU_REFADJ
6
GND
13
25
U2_UGATE1U2_UGATE2
GPU_EN
GPU_VID
3
1
4
2
5
EN
PSI
VID
REFADJ
TALERT/ISEN2
TSNS/ISEN3
14
BOOT1
UGATE1
PHASE1
LGATE1
GND/PWM3
PVCC
LAGTE2
PHASE2
BOOT218UGATE2
PGOOD
VCC/ISNE1
RT8813AGQW_WQFN24_4X4
17
16
15
GPU_PGOOD
U2_BOOT2
PR842 1_0402_5%
1 2
12
24
23
22
21
20
19
Pul
l high by EE side
PR837
10.5K_0402_1%
+5VS
U2_PHASE1
U2_LGATE1
U2_PWM3
GPU_PVCC
U2_LGATE2
U2_PHASE2
DGPU_PWROK
DGPU_PWR_EN 18,24,33
20,33
PR853
@
0_0402_5%
1 2
U2_PWM3
U2_UGATE1
U2_BOOT1
U2_PHASE1
U2_LGATE1
PR821
2.2_0603_5%
1 2
12
PC823 .1U_0603_25V7K
U2_UGATE2
U2_BOOT2
U2_PHASE2
U2_LGATE2
PU801
RT9610BZQW_WDFN8_2X2~D
1
UGATE
EN
8
BOOT
VCC
5
PWM
PHASE
6
GND
9
LGATE
GND
PR801
2.2_0603_5%
1 2
+5VS
PR813
2.2_0603_5%
1 2
3
U2_UGATE3
4
U2_BOOT3
2
U2_PHASE3
7
U2_LGATE3
PC800
0.1U_0603_50V7K
1 2
PC813
0.1U_0603_50V7K
1 2
PR832
2.2_0603_5%
1 2
GPU_VID_0
12
PR804
19.6K_0402_1%
PR807
2K_0402_1%
1 2
12
12
PC810
PR812
@
18.2K_0402_1% .01U_0402_16V7K
PR817
620K_0402_1%
1 2
12
PC820
@
.01U_0402_16V7K
33P_0402_50V8J
1 2
PR824
@
0_0402_5%
PC821
@
1 2
U2_PHASE3
U2_PHASE2
U2_PHASE1
12
PC811 2700P_0402_50V7K
GPU_REFIN
GPU_VREF
GPU_TON
GPU_FBRTN
GPU_FB
PR852
10K_0402_1%
1 2
GPU_COMP
PR851
10K_0402_1%
1 2
DCR 0.97mohm +/- 5%
H/S Rds(on) : 7.4mohm , 8.1mohm L/S Rds(on) : 2.6mohm , 3.1mohm
2
3
4
TYP MAX
12
PC801
4.7U_0805_16V7K
PQ800
1
CSD87351Q5D_SON8-7
7 6 5
8
PC802
4.7U_0805_16V7K
EMI Parts
12
PC814
PC815
4.7U_0805_16V7K
PQ801
1
CSD87351Q5D_SON8-7
2
7 6 5
8
PC832
PQ802
1
CSD87351Q5D_SON8-7
2
7
3
4
6 5
8
PC839
0.1U_0603_50V7K
1 2
3
4
12
12
12
PC804
PC803
4.7U_0805_16V7K
PC850
47P_0402_50V8J
4.7U_0805_16V7K
EMI Parts
PR806 10_1206_5%
PC809 33P_0603_50V8J
12
PC816
PC817
4.7U_0805_16V7K
12
PR822 10_1206_5%
12
PC822 33P_0603_50V8J
12
PC833
PC834
4.7U_0805_16V7K
12
PR830 10_1206_5%
12
PC838 33P_0603_50V8J
PL801
1 2
12
PC851
47P_0402_50V8J
4.7U_0805_16V7K
0.22UH_FDUE0640-H-R22M=P3_25A_20%
EMI Parts
12
PC835
4.7U_0805_16V7K
4.7U_0805_16V7K
0.22UH_FDUE0640-H-R22M=P3_25A_20%
EMI Parts
0.22UH_FDUE0640-H-R22M=P3_25A_20%
12
12
12
4.7U_0805_16V7K
12
4.7U_0805_16V7K
12
PC805
@
0.1U_0402_25V6
12
PC818
@
0.1U_0402_25V6
EMI Parts
12
+VGA_B+
12
PC806
@
2200P_0402_50V7K
1
+
2
+VGA_B+
12
PC819
@
2200P_0402_50V7K
PL802
1 2
12
PC852
@
47P_0402_50V8J
EMI Parts
PL803
1 2
PJP800
@
2
112
1
+
2
+VGA_B+
PC836
@
JUMP_43X118
+GPU_CORE
1
+
PC830
PC831
2
330U_B2_2.5VM_R9M
330U_B2_2.5VM_R9M
12
2200P_0402_50V7K
12
PC829
330U_B2_2.5VM_R9M
12
12
PC837
0.1U_0402_25V6
B+
DELL CONFIDENTIAL/PROPRIETARY
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
VGA_CORE
VGA_CORE
VGA_CORE
LA-9941P
LA-9941P
LA-9941P
59 62Wednesday, September 04, 2013
59 62Wednesday, September 04, 2013
59 62Wednesday, September 04, 2013
0.1
0.1
0.1
Page 60
5
4
3
2
1
+VCC_CORE
+GPU_CORE
+GPU_CORE (place under GPU)
12
PC901
PC900
D D
1U_0402_6.3V6K
12
12
PC927
PC926
1U_0402_6.3V6K
12
PC902
PC903
1U_0402_6.3V6K
1U_0402_6.3V6K
12
1U_0402_6.3V6K
1U_0402_6.3V6K
12
PC929
PC928
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
12
12
PC905
PC904
1U_0402_6.3V6K
12
12
PC930
PC931
1U_0402_6.3V6K
12
12
PC907
PC906
1U_0402_6.3V6K
12
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
12
PC933
PC932
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
PC909
PC908
1U_0402_6.3V6K
1U_0402_6.3V6K
12
12
PC934
PC935
1U_0402_6.3V6K
1U_0402_6.3V6K
+VCC_CORE
C C
1
1
1
PC954
PC953
2
2
10U_0805_6.3V6K
10U_0805_6.3V6K
+VCC_CORE
1
12
PC955
2
2
10U_0805_6.3V6K
PC991
PC956
@
10U_0805_6.3V6K
12
12
PC992
@
15P_0402_50V8J
12
PC993
@
@
15P_0402_50V8J
15P_0402_50V8J
12
12
PC996
PC994
15P_0402_50V8J
@
@
15P_0402_50V8J
12
12
PC998
15P_0402_50V8J
PC997
PC995
@
@
15P_0402_50V8J
15P_0402_50V8J
EMI Parts
+VCC_CORE
1
1
1
+
+
PC922
PC921
2
2
@
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
1
+
+
PC923
2
PC924
2
@
330U_D2_2.5VY_R9M
Based on PDDG rev 1.1 Table 5-2.
Design guilde: +VCC_CORE
1. 470uF*4 (SGA0000420L)
2. 22uF*20 (SE000008L80)
3. 10uF*4 (SE160106M8L)
4. 1uF*20 (SE000000K8L)
12
12
PC910
4.7U_0603_6.3VAK
330U_D2_2.5VY_R9M
12
12
PC936
PC937
.1U_0402_16V7K
.1U_0402_16V7K
12
12
PC911
PC912
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
12
12
PC938
PC939
.1U_0402_16V7K
.1U_0402_16V7K
12
12
PC914
PC913
4.7U_0603_6.3VAK
12
12
PC915
PC916
PC917
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
12
4.7U_0603_6.3VAK
12
12
PC942
PC941
PC940
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
4.7U_0603_6.3VAK
12
12
12
PC918
4.7U_0603_6.3VAK
12
PC943
4.7U_0603_6.3VAK
+GPU_CORE
PC919
4.7U_0603_6.3VAK
PC944
4.7U_0603_6.3VAK
+GPU_CORE (place near GPU)
22U_0805_6.3V6M
PC959
12
12
PC958
47U_0805_6.3V6M
1
2
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
PC961
1
2
4.7U_0805_6.3V6K
PC962
PC963
1
1
2
2
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
PC990
PC964
1
2
1
PC965 22U_080 5_6.3VAM
2
B B
1
PC970 22U_080 5_6.3VAM
2
1
PC966 22U_080 5_6.3VAM
2
1
PC971 22U_080 5_6.3VAM
2
1
PC967 22U_080 5_6.3VAM
2
1
PC972 22U_080 5_6.3VAM
2
1
PC968 22U_080 5_6.3VAM
2
1
PC973 22U_080 5_6.3VAM
2
1
PC969 22U_080 5_6.3VAM
2
1
PC974 22U_080 5_6.3VAM
2
12
12
PC1002
PC1000
@
@
15P_0402_50V8J
15P_0402_50V8J
Under:
1. 4.7uF*10 (SE000008L80)
12
12
PC999
PC1001
@
@
15P_0402_50V8J
15P_0402_50V8J
2. 0.1uF*4 (SE160106M8L) Near:
1
PC975 22U_080 5_6.3VAM
2
1
PC980 22U_080 5_6.3VAM
A A
2
1
PC976 22U_080 5_6.3VAM
2
1
PC981 22U_080 5_6.3VAM
2
1
PC977 22U_080 5_6.3VAM
2
1
PC982 22U_080 5_6.3VAM
2
1
PC978 22U_080 5_6.3VAM
2
1
PC983 22U_080 5_6.3VAM
2
1
PC979 22U_080 5_6.3VAM
2
1
PC984 22U_080 5_6.3VAM
2
1. 4.7uF*5 (SE093475K80)
2. 22uF*1 (SE000001120)
3. 47uF*1 (SE00000PL0L)
4. 33uF*1 (SGA20331E10)
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
LA-9941P
LA-9941P
LA-9941P
60 62W ednesday, September 04, 2013
60 62W ednesday, September 04, 2013
60 62W ednesday, September 04, 2013
1
0.1
0.1
0.1
Page 61
5
4
3
2
1
DC IN
D D
NVDC CHARGER BQ24715
Page 53
B+
+VCC_CORE TDC: 21A IS
L95812
VGA_CORE TDC: 45A
8813A
RT
Page 58
Page 59
+VCC_CORE
+G
PU_CORE
Battery
S3P)
(3
+VCCP TDC:6.5A RT8237E
C C
+1.35V TDC:7.2A +0.675VS TDC:0.7A G5616A
Page 56
Pa
+3VALW TDC:4.6A +5
VALW TDC:7.9A
TPS51225C
Page 54
+1.5V_RUN TDC: 9.7A TPS51367
Page 57
ge 55
+VCCP
+1.35V
+0.675VS
+5VALW
+3VALW
+1.5VS
B B
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
ADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
TR BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
POWER BLOCK DIAGRAM
POWER BLOCK DIAGRAM
POWER BLOCK DIAGRAM
LA-9941P
Wednesday, September 04, 2013
1
61 62
61 62
61 62
0.1
0.1
0.1
Page 62
5
4
3
2
1
[AC in]
B+
ACIN
VLP
+3
E
C_ON
D D
C C
B B
PCH Output
A A
PCH
+5VALW
+3VALW
SBP
N_SW#
PBT
Output
PCH_PWR_EN
+3V_PCH
Output
PCH
_DPWROK
Output
PCH_RSMRST#
SUSCLKPCH Output
AC_PRESENT
Output
PBTN_OUT#
Output
Input
PM_SLP_S5#
ut
Inp
PM_SLP_S4#
WLAN_EN
Output
+3VS_WLAN
SYSON
Output
+1.5V
+1.5V_PWROK
PM_SLP_S3#Input
SUSP#
Output
+5VS
+3VS
+1.5VS
+1.8VS
+1.8V_PWROK
+VCCP
+V1.05S_VCCP_PWRGOOD
+VCCSA
SA_PGOOD
CPU1.5V_S3_GATEOutput
+1.5V_CPU_VDDQ
75VSP
+0.
Input
HWPG
VR_ON
Output
Output
PCH_PWROK
PM_DRAM_PWRGD
H_CPUPWRGD
SVID
+VCC_CORE
Input
VGATE
SYS_PWROK
Output
PCH_PLTRST#
Ta
Tb
Tc
Td
Te
Tf+V
T1
T2
10ms < T3 (DPWROK assert at least 10 ms after VccDSW power are valid)
10ms < T4 (RSMRST# de-assert at least 10 ms after VccSUS power are valid)
T5
5
T6 < 90ms
16ms < T7 < 4s
30us < T8
1ns < Tg < 4s
Minimum duration of PWRBTN # assertion = 16mS after SUSCLK stable
T9
T10
T11
T12
T13
30us < T14
T15
[Battery only, AC absent]
B+
A
CIN Ta
PBTN_SW#
VLP
EC_ON
+5VALW
+3VALW
+VSBP
T16
T17
T18
T19
4
< Tg < 4s
1ns
Tc+3
Td
Te
Tf
Tg
T20
T21
T22
T23
T24
T25
T26
T27
T28
T29
T30
9ms < T31
9
T3
2
T33
5m
s > T34
T35
T36
3
EC pay attention timing
T37
T38
Discrete Power On Sequence
[AC in]
Ta
ACIN
Tb
+3VLP
Tc
EC_ON +5VALW
Td
EC_ON
Te
EC_ON
Tf
PBTN_SW#
Tg
ITEM Measure Point
PBTN_SW#
T1
PCH_PWR_EN
T2
+3V_PCH
T3
+3V_PCH
T4
PCH_RSMRST# SUSCLK
T5
PCH_RSMRST# AC_PRESENT
T6
TN_OUT#
T7
PM_SLP_S5# PM_SLP_S4#
T8 T9
WLAN_EN +3VS_WLAN
T10
PM_SLP_S4# SYSON
T11 T12 T13
PM_SLP_S4# PM_SLP_S3#
T14
PM_SLP_S3# SUSP#
T15
SUSP# +5VS
T16
SUSP#
T17
SUSP#
T18
SUSP# +1.8VS
T19
+1.8VS +1.8V_PWROK
T20
SUSP# +VCCP
T21
+VCCP
T22
+V1.05S_VCCP_PWRGOOD
T23
+VCCSA SA
T24
SA_PGOOD VR_ON
T25
CPU1.5V_S3_GATE VR_ON
T26
CPU1.5V_S3_GATE +1.5V_CPU_VDDQ
T27 T28
+0.75VSP HWPG
T29
HWPG VR_ON
T30
HWPG PCH_PW ROK
T31 T32 T33
VR_ON SVID
T34
H_CPUPWRGD +VCC_CORE
T35 T36 T37
SYS_PWROK PCH_PLTRST#
T38
SUSP# DGPU_PWREN
T39
DGPU_PWREN
T40
DGPU_PWREN
T41
DGPU_PWREN
T42
DGPU_PWREN
T43
ACINB+
To
+3VLP
To
EC_ON
To To
+3VALW
To
+VSBP
To
Low pluse width N/A
PCH_PWR_EN
To
+3V_PCH
To
PCH_DPWROK
To
PCH_RSMRST#
To To To
Low pluse widthPB
To To
WLAN_ENPM_SLP_S5#
To To To
+1.5VSYSON
To
+1.5V_PWROK+1.5V
To To To To
+3VS
To
+1.5VS
To To To To
+V1.05S_VCCP_PWRGOOD
To
+VCCSA
To
_PGOOD
To To To To
+0.75VSPCPU1.5V_S3_GATE
To To To To
PM_DRAM_PWRGDPCH_PWROK
To
H_CPUPWRGDPM_DRAM_PWRGD
To To To
VGATE+VCC_CORE
To
SYS_PWROKVGATE
To To To
+3VS_DELAY
To
+GPU_CORE
To
+1.5VSDGPU
To
+1.05VSDGPU
To
GPU power on sequence
SUSP#
DGPU_PWREN
+3VS_DELAY
+GPU_CORE
+1.5VSDGPU
05VSDGPU
+1.
T39
RC Delay
T40
T41
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DI SCLOSED TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DI SCLOSED TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
MAY BE USED BY OR DI SCLOSED TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.
RC Delay
T42
Issued Date
Issued Date
Issued Date
RC Delay
T43
2
TimeMeasure PointITEM
Time
RC Delay
2011/08/25 2012/07/25
2011/08/25 2012/07/25
2011/08/25 2012/07/25
[Battery only, AC absent]
B+ ACIN
Ta Tb
PBTN_SW# +3VLP
Tc
+3VLP
Td
EC_ON +5VALW
Te
EC_ON
Tf Tg
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Measure PointITEM Time
To
To
EC_ON
To To
+3VALW
To
+VSBPEC_ON
To
N/ALow pluse widthPBTN_SW#
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Power Sequence
Power Sequence
Power Sequence
1
0.1
0.1
0.1
of
of
of
62 62Wednesday, September 04, 2013
62 62Wednesday, September 04, 2013
62 62Wednesday, September 04, 2013
Page 63
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