Compal LA-9912P VAWGA, G505, LA-9912P VAWGB Schematic

A

1 1

B

C

D

E

Compal Confidential

VAWGA/B Schematics Document

2 2

AMD "Kabini" Platform

AMD 25W APU With Jaguar Core and Integrated Yangtze FCH + ATI Sun

LA-9912P REV: 1.0

3 3

4 4

A

B

2013-04-01

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2012/04/22 2015/04/22

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

COVER PAGE

VAWGA/GB

1 37Monday, April 01, 2013

E

1.0

A

B

C

D

E

Compal Confidential

Model Name : VAWGA/B

1 1

AMD Kabini

Memory BUS(DDR3)

Single Channel

USB

HDA

SATA

USB2.0

USB3.0

HD Audio

1.5V DDRIII 1600MHz

P.11

CMOS Camera

Port 3

Port 8 Port 9

P.17

MB

3.0 Conn. LP1

Port 0

Gen3

WLAN BT Combo

Port 0

HDD Conn.

GFX

LVDS Conn.

HDMI Conn.

CRT Conn.

2 2

P11

P10

P12

DP0

DP1

DAC

GPP

AMD FT3 APU

Jaguar Core

GPP1GPP2

MINI Card (WLAN/BT)

P16

LAN Atheros AR8162/8172

P14

Integrated Yangtze FCH

BGA 769-balls

Transformer RJ45

BIOS (4M)

Int.KBD

P.20

ENE KBC9012

3 3

PS2

Touch Pad

P.5

P.18

P.20

Thermal Sensor

P.19

P15

SPI

LPC

P.4~P.7

204pin DDRIII-SO-DIMM X2

BANK 0, 1, 2

P.16

Port 5

P.17

MB

3.0 Conn. LP2

Port 1

ODD Conn.

P.13 P.13

Card Reader

P.20

Port 4

P.8~P.9

Touch S

creen

Audio Conexant CX20757

P.16

Port 1

P.21

S/B

2.0 Conn.

Port 0

P.17

Int. MIC

page 21

Int. Speaker Conn.

page 21

Audio Combo Jacks

HP & MIC

page 21

Sub-borad

15"

14"

IO/B

LS9633P

page 20

4 4

A

Power/B

USB/B

LS9632P

S9631P

L

page 20

page 17

ODD/B

LS9634P

LED/B

LS9635P

page 13

page 20

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2012/04/22 2015/04/22

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

BLOCK DIAGRAMS

VAWGA/GB

E

1.0

2 37Thursday, March 28, 2013

1.0

A

B

C

D

E

Voltage Rails

Power Plane Description

VIN

B+

+APU_CORE

+APU_CORE_NB ON OFF OFFVoltage for On-die VGA of APU

1 1

+VGA_CORE OFFOFFON0.95-1.2V switched power rail

+VDDCI OFF0.95-1.2V switched power rail ON OFF

+3VALW

+3VS

+1.8VALW

+1.8VS

+0.95VALW

+0.95VS

+1.5V

+3VGS

+1.8VGS

+1.5VGS

+0.95VGS

+5VALW

+5VS

2 2

+VSB ON ON

+RTC_APU

+0.75VS ON OFFOFF

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for APU

3.3V always on power rail

3.3V switched power rail

1.8V always on power rail

1.8V switched power rail

0.95V always on power rail

0.95V switched power rail

1.5V power rail for APU and DDR

1.5V switched power rail

3.3V switched power rail for VGA

1.8V switched power rail for VGA

1.5V switched power rail for VGA

0.95V switched power rail for VGA

5V always on power rail

5V switched power rail

VSB always on power rail

RTC power

0.75V switched power rail for DDR terminator

S0 S3 S5

ON ON ON

ON OFF

ONON OFF

ON OFF OFF

ON ON*ON

ON OFF OFF

ON OFFON

OFFON OFF+1.5VS

OFF

ON

OFF OFF

ON

ON OFF OFF

OFF

ON

OFF

ON

SMBUS Control Table

SOURCE

SMB_EC_CK1 SMB_EC_DA1

APU_SCLK0 APU_SDATA0

SMB_EC_CK2 SMB_EC_DA2

3 3

KB9012

+3VALW

APU

+3VS

KB9012

+3VS

VGA BATT KB9012 SODIMM

X V

+3VALW

X

V V

+3VS +3VS

X X

WLAN WWAN

X X

VX

+3VS +3VS

X

V

EC SM Bus1 address EC SM Bus2 address

Device Address

Smart Battery

0001 011X b

HEX

Device Address HEX

16H

Thermal Sen sor

SB-TSI (APU)

VGA Internal Thermal

1001 101X b

1001 100X b

1000 001X b

APU SM Bus address

4 4

Device Address

DDR DIMM1

DDR DIMM2

1010 000Xb

1010 001Xb

HEX

A0H

A2H

A

B

BOARD ID Table

PCB Revision MP PVT DVT EVT

ONONON

OFF

Board ID

0 1 2 3 4 5 6 7

Board ID / SKU ID Table for AD channel

OFF

ON

OFFON

ONON

Thermal Sensor

XX

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7 NC

FCH

100K +/- 5%R1562

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

APU RTD2132

X

+3VS

R1564 V min

0

X X

V

X

USB Port Table

USB 2.0 USB 3.0

9AH

98H

82H

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF) LOW

AD_BID

0 V

V typ

AD_BID

0 V 0 V

V

AD_BID

max

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

2.200 V

3.300 V

2.341 V

3.300 V

APU PCIE PORT LIST

DevicePort

0 1 2 3

Port

0

XHCI

1

2012/04/22 2015/04/22

C

LAN WLAN

3 External USB Port

0

RIGHT USB

1

Touch Screen

2 3

Camera

4

CardReader

5

WLAN/BT Combo

6

LEFT USB (for colay)

7

LEFT USB (for colay)

8

LEFT USB3.0

9

LEFT USB3.0

Compal Secret Data

Deciphered Date

SIGNAL

D

SLP_S3# SLP_S5# +VALW +V +VS Clock

ON

OFF

ON ON

ON

OFF

HIGH HIGH

HIGHHIGH

HIGH

LOW

HIGH

LOW

ON

USB OC MAPPING

USB PortOC#

USB20 port0

0

USB20 port1,2,8,9

1

USB30 port0,1

2 3

BOM Structure Table

BOM Structure BTO Item

A6@ A4@ E2@ E1@ E1PC@ X4@ X5@ X2@ EMICU@ EMICP@ EMIUSB2RU@ EMIUSB2RP@ USB2R@ SUN@ MARS@ 14@ 15@ PX@ CMOS@ HDMI@ EMIGASP@ 8162@ 8172@ SWR@ LDO@ THERMAL@ ME@ UMA@ @ ZODD@ TS@ EMIP@ EMIU@ ESDP@ ESDU@

Date: Sheet of

A6 R3 BGA APU

A4 R3 BGA APU

E2 R3 BGA APU

E1 R3 BGA APU

E1 PC BGA APU

X4 ES2 BGA APU

X5 ES2 BGA APU

X2 ES2 BGA APU

CardReader EMI Un pop

CardReadear EMI pop

Right USB2.0 port EMI un pop

Right USB2.0 port EMI pop

Right USB2.0 port component

SUN PRO GPU (R3 compal part)

MARS XT GPU (R1 compal part)

for 14" componect

for 15" componect

Common VGA circuit

CMOS Camera part

HDMI part

Gastube

Ateros AR8162 LAN Chip

Ateros AR8172 LAN Chip

LAN Switching mode

LAN LDO mode

Lenovo Thermal Sensor

ME part

UMA part

Unpop

Zero Power ODD part

Touch Screen

EMI pop component

EMI Un pop component

ESD pop component

ESD Un pop component

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Compal Electronics, Inc.

NOTES LIST

VAWGA/GB

E

LOW

OFF

1.0

3 37Monday, April 01, 2013

1.0

A

<8,9>

DDRAB_SMA[15..0]

1 1

<8,9>

DDRAB_SBS0#

<8,9>

DDRAB_SBS1#

<8,9>

DDRAB_SBS2#

<8,9>

DDRAB_SDM[7..0]

<8,9>

DDRAB_SDQS0

<8,9>

DDRAB_SDQS0#

<8,9>

DDRAB_SDQS1

<8,9>

DDRAB_SDQS1#

<8,9>

DDRAB_SDQS2

<8,9>

DDRAB_SDQS2#

<8,9>

DDRAB_SDQS3

<8,9>

DDRAB_SDQS3#

<8,9>

DDRAB_SDQS4

<8,9>

DDRAB_SDQS4#

<8,9>

DDRAB_SDQS5

<8,9>

DDRAB_SDQS5#

<8,9>

DDRAB_SDQS6

<8,9>

DDRAB_SDQS6#

2 2

<8,9>

DDRAB_SDQS7

<8,9>

DDRAB_SDQS7#

<8>

DDRA_CLK0

<8>

DDRA_CLK0#

<8>

DDRA_CLK1

<8>

DDRA_CLK1#

<9>

DDRB_CLK0

<9>

DDRB_CLK0#

<9>

DDRB_CLK1

<9>

DDRB_CLK1#

<8,9>

MEM_MAB_RST#

<8,9>

MEM_MAB_EVENT#

<8>

DDRA_CKE0

<8>

DDRA_CKE1

<9>

DDRB_CKE0

<9>

DDRB_CKE1

<8>

DDRA_ODT0

<8>

DDRA_ODT1

<9>

DDRB_ODT0

<9>

DDRB_ODT1

<8>

DDRA_SCS0#

<8>

DDRA_SCS1#

<9>

DDRB_SCS0#

<9>

<8,9> <8,9> <8,9>

DDRB_SCS1#

DDRAB_SRAS# DDRAB_SCAS# DDRAB_SWE#

+MEM_VREF +VREF_DQ

ZZZ

LA9912P

DAZ0Y600201

14@

3 3

MEM_MAB_EVENT#

R576 0_0402_5%@R576 0_0402_5%@

ZZZ

LA9912P

DAZ0Y700201

DDRAB_SMA0 DDRAB_SMA1 DDRAB_SMA2 DDRAB_SMA3 DDRAB_SMA4 DDRAB_SMA5 DDRAB_SMA6 DDRAB_SMA7 DDRAB_SMA8 DDRAB_SMA9 DDRAB_SMA10 DDRAB_SMA11 DDRAB_SMA12 DDRAB_SMA13 DDRAB_SMA14 DDRAB_SMA15

DDRAB_SDM0 DDRAB_SDM1 DDRAB_SDM2 DDRAB_SDM3 DDRAB_SDM4 DDRAB_SDM5 DDRAB_SDM6 DDRAB_SDM7

1 2

15@

AG38

M_ADD0

W35

M_ADD1

W38

M_ADD2

W34

M_ADD3

U38

M_ADD4

U37

M_ADD5

U34

M_ADD6

R35

M_ADD7

R38

M_ADD8

N38

M_ADD9

AG34

M_ADD10

R34

M_ADD11

N37

M_ADD12

AN34

M_ADD13

L38

M_ADD14

L35

M_ADD15

AJ38

M_BANK0

AG35

M_BANK1

N34

M_BANK2

B32

M_DM0

B38

M_DM1

G40

M_DM2

N41

M_DM3

AG40

M_DM4

AN41

M_DM5

AY40

M_DM6

AY34

M_DM7

Y40

M_DM8

B33

M_DQS_H0

A33

M_DQS_L0

B40

M_DQS_H1

A40

M_DQS_L1

H41

M_DQS_H2

H40

M_DQS_L2

P41

M_DQS_H3

P40

M_DQS_L3

AH41

M_DQS_H4

AH40

M_DQS_L4

AP41

M_DQS_H5

AP40

M_DQS_L5

BA40

M_DQS_H6

AY41

M_DQS_L6

AY33

M_DQS_H7

BA34

M_DQS_L7

AA40

M_DQS_H8

Y41

M_DQS_L8

AC35

M_CLK_H0

AC34

M_CLK_L0

AA34

M_CLK_H1

AA32

M_CLK_L1

AE38

M_CLK_H2

AE37

M_CLK_L2

AA37

M_CLK_H3

AA38

M_CLK_L3

G38

M_RESET_L

AE34

M_EVENT_L

L34

M0_CKE0

J38

M0_CKE1

J37

M1_CKE0

J34

M1_CKE1

AN38

M0_ODT0

AU38

M0_ODT1

AN37

M1_ODT0

AR37

M1_ODT1

AJ34

M0_CS_L0

AR38

M0_CS_L1

AL38

M1_CS_L0

AN35

M1_CS_L1

AJ37

M_RAS_L

AL34

M_CAS_L

AL35

M_WE_L

AD40

M_VREF

AC38

M_VREFDQ

UAPU

X5 ES2 ZM201079J4460 2G BGA 769P

+VREF_DQ

MEMORY VREF

4 4

+1.5V

RP2

1 8

+MEM_VREF

2 7 3 6

MEM_MAB_EVENT#

4 5

1K_0804_8P4R_1%

A

1

@

C342

C342 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C337

C337 1U_0402_6.3V6K

1U_0402_6.3V6K

2

@

C164

0.1U_0402_16V7K

1

FT3 REV 0.51

X5@UAPU

X5@

2

C163

0.1U_0402_16V7K

1

MEMORY

UAPUA

M_ZVDDIO_MEM_S

ESDP@ C195

ESDP@

0.1U_0402_16V7K

RP11

@RP11

@

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

M_DATA0

M_DATA1

M_DATA2

M_DATA3

M_DATA4

M_DATA5

M_DATA6

M_DATA7

M_DATA8

M_DATA9

M_DATA10

M_DATA11

M_DATA12

M_DATA13

M_DATA14

M_DATA15

M_DATA16

M_DATA17

M_DATA18

M_DATA19

M_DATA20

M_DATA21

M_DATA22

M_DATA23

M_DATA24

M_DATA25

M_DATA26

M_DATA27

M_DATA28

M_DATA29

M_DATA30

M_DATA31

M_DATA32

M_DATA33

M_DATA34

M_DATA35

M_DATA36

M_DATA37

M_DATA38

M_DATA39

M_DATA40

M_DATA41

M_DATA42

M_DATA43

M_DATA44

M_DATA45

M_DATA46

M_DATA47

M_DATA48

M_DATA49

M_DATA50

M_DATA51

M_DATA52

M_DATA53

M_DATA54

M_DATA55

M_DATA56

M_DATA57

M_DATA58

M_DATA59

M_DATA60

M_DATA61

M_DATA62

M_DATA63

M_CHECK0

M_CHECK1

M_CHECK2

M_CHECK3

M_CHECK4

M_CHECK5

M_CHECK6

M_CHECK7

X4@

B30 A32 B35 A36 B29 A30 A34 B34

B37 A38 D40 D41 B36 A37 B41 C40

F40 F41 K40 K41 E40 E41 J40 J41

M41 N40 T41 U40 L40 M40 R40 T40

AF40 AF41 AK40 AK41 AE40 AE41 AJ40 AJ41

AM41 AN40 AT41 AU40 AL40 AM40 AR40 AT40

AV41 AW40 BA38 AY37 AU41 AV40 AY39 AY38

BA36 AY35 BA32 AY31 BA37 AY36 BA33 AY32

V41 W40 AB40 AC40 U41 V40 AA41 AB41

AD41

FT3_BGA769

C195

APU_TRST#

B

DDRAB_SDQ0 DDRAB_SDQ1 DDRAB_SDQ2 DDRAB_SDQ3 DDRAB_SDQ4 DDRAB_SDQ5 DDRAB_SDQ6 DDRAB_SDQ7

DDRAB_SDQ8 DDRAB_SDQ9 DDRAB_SDQ10 DDRAB_SDQ11 DDRAB_SDQ12 DDRAB_SDQ13 DDRAB_SDQ14 DDRAB_SDQ15

DDRAB_SDQ16 DDRAB_SDQ17 DDRAB_SDQ18 DDRAB_SDQ19 DDRAB_SDQ20 DDRAB_SDQ21 DDRAB_SDQ22 DDRAB_SDQ23

DDRAB_SDQ24 DDRAB_SDQ25 DDRAB_SDQ26 DDRAB_SDQ27 DDRAB_SDQ28 DDRAB_SDQ29 DDRAB_SDQ30 DDRAB_SDQ31

DDRAB_SDQ32 DDRAB_SDQ33 DDRAB_SDQ34 DDRAB_SDQ35 DDRAB_SDQ36 DDRAB_SDQ37 DDRAB_SDQ38 DDRAB_SDQ39

DDRAB_SDQ40 DDRAB_SDQ41 DDRAB_SDQ42 DDRAB_SDQ43 DDRAB_SDQ44 DDRAB_SDQ45 DDRAB_SDQ46 DDRAB_SDQ47

DDRAB_SDQ48 DDRAB_SDQ49 DDRAB_SDQ50 DDRAB_SDQ51 DDRAB_SDQ52 DDRAB_SDQ53 DDRAB_SDQ54 DDRAB_SDQ55

DDRAB_SDQ56 DDRAB_SDQ57 DDRAB_SDQ58 DDRAB_SDQ59 DDRAB_SDQ60 DDRAB_SDQ61 DDRAB_SDQ62 DDRAB_SDQ63

E2 PR KABINI EM3000IBJ23HM 1.65G BGA 769P APU

M_ZVDDIO

+1.8VS

2

1

B

DDRAB_SDQ[63..0]

<10> <10>

HDMI

<10> <10>

<11> <11>

LVDS

<11> <11>

<29> <29> <29>

<18,19> <18,19>

<29>

<18,24,29,6>

<29> <29>

<29>

APU_VDD_RUN_FB_L

A6 PR KABINI AM5200IAJ44HM 2G BGA769P APU

UAPU

E2@UAPU

E2@

1 2

R74

39.2_0402_1%

+1.5V

X2 ES2 KABINI ZMA5B078J2360 1.65G BGA CPU

HDT+

JHDT2

1

3

5

7

9

11

13

15

17

19

SAMTE_ASP-136446-07-B@

HDMI & LVDS should be reverse in KABINI:

<8,9>

APU TX0 to Connector TX2 ; APU TX1 to Connector TX1 APU TX2 to Connector TX0 ; APU TX3 to Connector CLK

DP2_TXP0 DP2_TXN0

DP2_TXP1 DP2_TXN1

DP2_TXP2 DP2_TXN2

DP2_TXP3 DP2_TXN3

LVDS_A2 LVDS_A2#

LVDS_A1 LVDS_A1#

LVDS_A0 LVDS_A0#

LVDS_ACLK LVDS_ACLK#

APU_SVT APU_SVC APU_SVD

EC_SMB_CK2

EC_SMB_DA2

R124 0_0402 _5%@R124 0_0402 _5%@ R127 0_0402 _5%@R127 0_0402 _5%@

R117 0_0402_5%@R117 0_040 2_5%@

APU_PWRGD

H_PROCHOT#

APU_VDDNB_SEN

APU_VDD_SEN

UAPU

A6@UAPU

A6@

UAPU

E1 PR KABINI EM2100ICJ23HM 1G BGA769P APU

UAPU

X2@UAPU

X2@

2

APU_TCK

2

4

APU_TMS

4

6

APU_TDI

6

8

APU_TDO

8

10

APU_PWRGD

10

12

APU_RST#

12

14

APU_DBRDY

14

16

APU_DBREQ#

16

18

APU_PLLTEST0

18

20

APU_PLLTEST1

20

R118 0_0402_5%@R118 0_040 2_5%@

R120 0_0402_5%@R120 0_040 2_5%@

E1@UAPU

E1@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

APU_SVT APU_SVC

1 2 1 2

1 2

A4 PR KABINI AM5000IBJ44HM 1.5G BGA 769P APU

APU_PWRGD

APU_RST#

E1 PC 2M101082J2361 1G BGA 769P

APU_TDI APU_TMS APU_TCK APU_DBREQ#

APU_SVD

APU_SIC APU_SID

APU_RST#

LDT_RST#

APU_PWRGD

LDT_PWRGD

APU_PROCHOT#

APU_ALERT#

APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#

UAPU

A4@UAPU

A4@

ESDU@

1 2

C1270 100P_0402_50V8J

ESDU@

1 2

C1273 100P_0402_50V8J

UAPU

E1PC@UAPU

E1PC@

RP6

1 8 2 7 3 6 4 5

1K_0804_8P4R_5%

+1.8VS

RP11, RP6 will @ when MP

Compal Secret Data

2012/04/22 2015/04/22

C

Compal Secret Data

A9

TDP1_TXP0

B9

TDP1_TXN0

A10

TDP1_TXP1

B10

TDP1_TXN1

A11

TDP1_TXP2

B11

TDP1_TXN2

A12

TDP1_TXP3

B12

TDP1_TXN3

A4

LTDP0_TXP0

B4

LTDP0_TXN0

A5

LTDP0_TXP1

B5

LTDP0_TXN1

A6

LTDP0_TXP2

B6

LTDP0_TXN2

A7

LTDP0_TXP3

B7

LTDP0_TXN3

K15

DISP_CLKIN_H

H15

DISP_CLKIN_L

G31

SVT

D27

SVC

E29

SVD

B22

SIC

B21

SID

B20

APU_RST_L

A20

LDT_RST_L

B19

APU_PWROK

A19

LDT_PWROK

A22

PROCHOT_L

B18

ALERT_L

D29

TDI

D31

TDO

D35

TCK

D33

TMS

G27

TRST_L

B25

DBRDY

A25

DBREQ_L

D23

VDDCR_NB_SENSE

G23

VDDCR_CPU_SENSE

E25

VDDIO_MEM_S_SENSE

E23

VSS_SENSE

AV33

VDD_095_FB_H

AU33

VDD_095_FB_L

DP_STEREOSYNC CRT_HSYNC

Deciphered Date

D

UAPUC

DISPLAY/SVI2/JTAG/TEST

FT3 REV 0.51

DP_150_ZVSS

DP_2K_ZVSS

DP_BLON

DP_DIGON

DP_VARY_BL

TDP1_AUXP

TDP1_AUXN

TDP1_HPD

LTDP0_AUXP

LTDP0_AUXN

LTDP0_HPD

DAC_RED

DAC_GREEN

DAC_BLUE

DAC_HSYNC

DAC_VSYNC

DAC_SCL

DAC_SDA

DAC_ZVSS

THERMDA

THERMDC

DIECRACKMON

BP0

BP1

BP2

BP3

PLLTEST1

PLLTEST0

BYPASSCLK_H

BYPASSCLK_L

PLLCHRZ_H

PLLCHRZ_L

M_TEST

FREE_2

GIO_TSTDTM0_SERIALCLK

GIO_TSTDTM0_CLKINIT

USB_ATEST0

USB_ATEST1

M_ANALOGIN

M_ANALOGOUT

TMON_CAL

HDMI_EN/DP_STEREOSYNC

X4@

FT3_BGA769

+1.8VS +3VS

R114

1K_0402_5%

1 2

For HDMI Need

PU +1.8VS + PD

RP3

@RP3

@

APU_SCLK APU_CLKINT APU_SCLK APU_CLKINT

1 8 2 7 3 6 4 5

1K_0804_8P4R_5%

D

B16

DP_150_ZVSS

A21

DP_2K_ZVSS

B17 A17 A18

D17 E17

H19

D15 E15

H17

1 2

R897 100K_0402_5%R897 100K_0402_5%

B14

A14

B15

G19

CRT_HSYNC

E19

D19 D21

A16

DAC_ZVSS

H27 H29 D25 A27

APU_BP0

B27

APU_BP1

A26

APU_BP2

B26

APU_BP3

B28

APU_PLLTEST1

A28

APU_PLLTEST0

B24

APU_BPCLK_H

A24

APU_BPCLK_L

AV35 AU35 E33

A29 H21

APU_SCLK

H25

APU_CLKINT

AJ10 AJ8 R32 N32 AP29

E21

DP_STEREOSYNC

R113

R113 1K_0402_5%

1K_0402_5%

1 2

+1.8VS

Title

Size Document Number Rev

Custom

Date: Sheet of

1 2

R400 2K_0 402_1%R400 2K_0 402_1%

+3VS

1 2

R416 499_04 02_1%R416 499_0402_1%

EDID_CLK EDID_DATA

T39T39 T40T40 T41T41

T42T42

T45T45 T43T43 T44T44 T46T46 T47T47

PU +3VS

APU_ALERT# APU_SID APU_PROCHOT# APU_SIC

PU +1.8VS

APU_SVT APU_SVC APU_SVD

APU_RST# APU_PWRGD APU_BPCLK_L

PD

APU_BP2 APU_BP3 APU_BP0 APU_BP1

APU_TRST# APU_PLLTEST0 APU_PLLTEST1

APU_BPCLK_H

Compal Electronics, Inc.

FT3 DDR3/DISP/MISC//HDT+

VAWGA/GB

E

ENBKL <18> APU_ENVDD APU_INVT_PWM

HDMI_CLK HDMI_DATA

HDMI_DET

EDID_CLK EDID_DATA

DAC_RED

DAC_GRN

DAC_BLU

CRT_HSYNC CRT_VSYNC

CRT_DDC_CLK CRT_DDC_DATA

R255 4.7K_0402_5%R255 4.7K_0402_5% R256 4.7K_0402_5%R256 4.7K_0402_5%

R80 300_0402_5%R80 300_0402_5% R82 300_0402_5%R82 300_0402_5% R18 511_0402_1%R18 511_0402_1%

R19 511_0402_1%R19 511_0402_1%

12 12

RP23

18 27 36 45

150_0804_8P4R_1%

RP4

1 8 2 7 3 6 4 5

1K_0804_8P4R_5%

RP5

@RP5

@

1 8 2 7 3 6 4 5

1K_0804_8P4R_5%

1 2 1 2 1 2

RP7

@RP7

@

1 8 2 7 3 6 4 5

1K_0804_8P4R_5%

RP8

1 8 2 7 3 6 4 5

1K_0804_8P4R_5%

1 2

E

DAC_BLU DAC_GRN DAC_RED DP_150_ZVSS

+1.8VS

4 37Monday, April 01, 2013

+3VS

+1.8VS

<11> <11>

<10,12> <10,12>

<10>

<11> <11>

<12>

CRT

<12>

<12> <12>

1.0

A

R10

P_GPP_RXP0

R8

P_GPP_RXN0

R5

<14>

PCIE_DTX_C_ARX_P1

<14>

PCIE_DTX_C_ARX_N1

<16>

WLAN WLAN

1 1

2 2

HDD

ODD

PCIE_DTX_C_ARX_P2

<16>

PCIE_DTX_C_ARX_N2

<13>

SATA_ATX_DRX_P0

<13>

SATA_ATX_DRX_N0

<13>

SATA_DTX_C_ARX_N0

<13>

SATA_DTX_C_ARX_P0

<13>

SATA_ATX_DRX_P1

<13>

SATA_ATX_DRX_N1

<13>

SATA_DTX_C_ARX_N1

<13>

SATA_DTX_C_ARX_P1

R90 1K_0402_1%R90 1K_0402_1% R96 1K_0402_1%R96 1K_0402_1%

+0.95VS

1 2

P_TX_ZVDD_095 P_RX_ZVDD_095

R404

1.69K_0402_1%

12 12

SATA_ZVSS SATA_ZVDD

T48T48

0_0402_5%

LAN

3 3

<14>

CLK_PCIE_LAN

<14>

CLK_PCIE_LAN#

<16>

CLK_PCIE_WLAN

<16>

CLK_PCIE_WLAN#

WLAN

R116 R119

R125 R126

0_0402_5%

1 2

@R116

@

1 2

@R119

@

0_0402_5%

1 2

@R125

@

1 2

@R126

@

0_0402_5%

48M_X1

1 2 1 2

48M_X2

R103 R104 for EMI

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

SERIRQ

A

R103 0_0402 _5%@R103 0_0402 _5%@ R104 0_0402 _5%@R104 0_0402 _5%@

<18,6>

LPC_CLK0_EC

<6>

LPC_CLK1

<18> <18> <18> <18> <18,6>

<18>

4 4

R4

N5 N4

N10

N8

W8

L5 L4

J5 J4

G5 G4

D7

E7

GPP_CLK1P GPP_CLK1N

GPP_CLK2P GPP_CLK2N

T50T50

P_GPP_RXP1

P_GPP_RXN1

P_GPP_RXP2

P_GPP_RXN2

P_GPP_RXP3

P_GPP_RXN3

P_TX_ZVDD_095

P_GFX_RXP0

P_GFX_RXN0

P_GFX_RXP1

P_GFX_RXN1

P_GFX_RXP2

P_GFX_RXN2

P_GFX_RXP3

P_GFX_RXN3

BA14

SATA_TX0P

AY14

SATA_TX0N

BA16

SATA_RX0N

AY16

SATA_RX0P

AY19

SATA_TX1P

BA19

SATA_TX1N

AY17

SATA_RX1N

BA17

SATA_RX1P

AR19

SATA_ZVSS

AP19

SATA_ZVDD_095

BA30

SATA_ACT_L/GPIO67

AY12

SATA_X1

BA12

SATA_X2

U4

GFX_CLKP

U5

GFX_CLKN

AC8

GPP_CLK0P

AC10

GPP_CLK0N

AE4

GPP_CLK1P

AE5

GPP_CLK1N

AC4

GPP_CLK2P

AC5

GPP_CLK2N

AA5

GPP_CLK3P

AA4

GPP_CLK3N

AP13

X14M_25M_48M_OSC

N2

X48M_X1

N1

X48M_X2

AY2

LPCCLK0

AW2

LPCCLK1

AT2

LAD0

AT1

LAD1

AR2

LAD2

AR1

LAD3

AP2

LFRAME_L

AP1

LDRQ0_L

AV29

SERIRQ/GPIO48

AP25

LPC_CLKRUN_L

AV2

LPC_PD_L/GEVENT5_L/SPI_TPM_CS_L

FT3 REV 0.51

UAPUB

PCIE

B

P_GPP_TXP0

P_GPP_TXN0

P_GPP_TXP1

P_GPP_TXN1

P_GPP_TXP2

P_GPP_TXN2

P_GPP_TXP3

P_GPP_TXN3

P_RX_ZVDD_095

P_GFX_TXP0

P_GFX_TXN0

P_GFX_TXP1

P_GFX_TXN1

P_GFX_TXP2

P_GFX_TXN2

P_GFX_TXP3

P_GFX_TXN3

X4@

UAPUE

CLK/SATA/USB/SPI/LPC

FT3 REV 0.51

B

L2 L1

K2

PCIE_ATX_DRX_P1

K1

PCIE_ATX_DRX_N1

J2

PCIE_ATX_DRX_P2

J1

PCIE_ATX_DRX_N2

H2 H1

W7

G2 G1

F2 F1

E2 E1

D2 D1

FT3_BGA769

USBCLK/14M_25M_48M_OSC

USB_SS_ZVSS

USB_SS_ZVDD_095_USB3_DUAL

USB_SS_0TXP

USB_SS_0TXN

USB_SS_0RXP

USB_SS_0RXN

USB_SS_1TXP

USB_SS_1TXN

USB_SS_1RXP

USB_SS_1RXN

SPI_CLK/GPIO162

SPI_CS1_L/GPIO165

SPI_CS2_L/GPIO166

SPI_DO/GPIO163

SPI_DI/GPIO164

SPI_HOLD_L/GEVENT9_L

SPI_WP_L/GPIO161

FT3_BGA769X4@

USB_ZVSS

USB_HSD0P

USB_HSD0N

USB_HSD1P

USB_HSD1N

USB_HSD2P

USB_HSD2N

USB_HSD3P

USB_HSD3N

USB_HSD4P

USB_HSD4N

USB_HSD5P

USB_HSD5N

USB_HSD6P

USB_HSD6N

USB_HSD7P

USB_HSD7N

USB_HSD8P

USB_HSD8N

USB_HSD9P

USB_HSD9N

1 2

C19 0.1U_0402_16V7KC19 0.1U_0402_16V7K

1 2

C20 0.1U_0402_16V7KC20 0.1U_0402_16V7K

1 2

C17 0.1U_0402_16V7KC17 0.1U_0402_16V7K

1 2

C18 0.1U_0402_16V7KC18 0.1U_0402_16V7K

12

R73

R73 1K_0402_1%

1K_0402_1%

W4

AG4

USB_ZVSS

AL4 AL5

AJ4 AJ5

AG7 AG8

AG1 AG2

AF1 AF2

AE1 AE2

AD1 AD2

AC1 AC2

AB1 AB2

AA1 AA2

AE10 AE8

T2 T1

V2 V1

R1 R2

W1 W2

AU7 AW9 AR4 AR11 AR7 AU11 AU9

R641 11.8K_040 2_1%R641 11.8K_0402_1%

USBSS_ZVSS USBSS_ZVDD

APU_SPI_CLK APU_SPI_CS1#

APU_SPI_AOSI

APU_SPI_AISO

APU_SPI_HOLD# APU_SPI_WP#

R644 1K_0 402_1%R644 1K_0 402_1% R645 1K_0 402_1%R645 1K_0 402_1%

C

D

APU POWER SEQUENCE

PCIE_ATX_C_DRX_P1 PCIE_ATX_C_DRX_N1

PCIE_ATX_C_DRX_P2 PCIE_ATX_C_DRX_N2

+0.95VS_APU_GFX+0.95VS_APU_GFX

<14> <14>

<16> <16>

LANLAN

G-B

G-C

G-D

G-E

G-A

1 2

USB20_P0 USB20_N0

USB20_P1 USB20_N1

USB20_P3 USB20_N3

USB20_P4 USB20_N4

USB20_P5 USB20_N5

USB20_P6 USB20_N6

USB20_P7 USB20_N7

USB30_P8 USB30_N8

USB30_P9 USB30_N9

1 2 1 2

USB30_MTX_C_DRX_P0 USB30_MTX_C_DRX_N0

USB30_MRX_DTX_P0 USB30_MRX_DTX_N0

USB30_MTX_C_DRX_P1 USB30_MTX_C_DRX_N1

USB30_MRX_DTX_P1 USB30_MRX_DTX_N1

1 2

R110 33_040 2_5%R110 33_0402_5%

1 2

R111 33_040 2_5%R111 33_0402_5%

T51T51

1 2

R109 33_040 2_5%R109 33_0402_5%

<17>

Right USB port

<17>

<16>

Touch Screen

<16>

<11>

CAMERA

<11>

<20>

CardReader

<20>

<16>

WLAN/BT combo

<16>

<17>

USB2.0 LP1

<17>

USB2.0 LP2

<17>

MB USB3.0 port0

<17>

MB USB3.0 port1

<17>

+0.95VALW

<17> <17>

R109,R110,R111 close to APU

APU_SPI_CLK_U APU_SPI_CS1#_U

APU_SPI_AISO

APU_SPI_AOSI_U

APU_SPI_CLK_U

APU_SPI_CS1#_U

APU_SPI_AOSI_U

APU_SPI_AISO

R108 close to ROM

1 2

R108 33_040 2_5%R108 33_0402_5%

RP12

1 8 2 7 3 6 4 5

0_0804_8P4R_5%

APU->EC->ROM must route as Daisy Chain for Share ROM quality (RP12 was request to added for the recoverable solution as original method--backup)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2012/04/22 2015/04/22

Compal Secret Data

Deciphered Date

+RTC

EC_ON

+3VALW/+5VALW

+1.8VALW

+0.95VALW

SYSON

+1.5V

SUSP#

+3VS

+1.8VS

+1.5VS

+0.95VS

VR_ON

+APU_CORE

+APU_CORE_NB

EC_SPI_AISO EC_SPI_AOSI

EC_SPI_CLK EC_SPI_CS1#

EC_SPI_AISO EC_SPI_AOSI EC_SPI_CLK EC_SPI_CS1#

4MB SPI ROM (Current Share mode)

+3VALW

R614

R614 10K_0402_5%

10K_0402_5%

1 2

R616

R616 10K_0402_5%

10K_0402_5%

D

APU_SPI_CS1#_U APU_SPI_AISO_U APU_SPI_WP#

1 2 3 4

Custom

Date: Sheet of

E

48MHz CRYSTAL

1

4

1 2

12

EMIU@R617

EMIU@

48M_X2

48M_X1

C795

C795 6P_0402_50V8

6P_0402_50V8

@

12

C635

0.1U_0402_16V4Z

R615

R615 10K_0402_5%

10K_0402_5%

1 2

C636 10P_0402_50V8J

10P_0402_50V8J

5 37Thursday, March 28, 2013

+3VALW

EMIU@C636

EMIU@

R938

R938 1M_0402_5%

1M_0402_5%

2

3

Y20

Y20 48MHZ_8PF_X3S048000D81H-W

48MHZ_8PF_X3S048000D81H-W

12

C794

<18>

6P_0402_50V8

<18> <18> <18>

U56

CS# SO/SIO1 WP# GND

W25Q32FVSSIG SOIC 8P SPI ROM

Title

Size Document Number Rev

8

VCC

7

HOLD#

SCLK

SI/SIO0

APU_SPI_HOLD#

6

APU_SPI_CLK_U

5

APU_SPI_AOSI_U

APU_SPI_CLK_U

Compal Electronics, Inc.

FT3 PCIE/SATA/CLK/USB/SPI

VAWGA/GB

1 2

R617 10_0402_5%

10_0402_5%

E

1.0

A

1 2

C615

C615 150P_0402_50V8J

<18>

1 1

<17> <17>

<21>

HDA_SDIN0

2 2

LPC_RST#

USB_OC0#

USB_OC1#

150P_0402_50V8J

<18>

<16>

<18> <18>

<18> <18> <18> <18>

<14> <16>

1 2

PBTN_OUT#

APU_PCIE_WAKE#

SLP_S3# SLP_S5#

KBRST# GATEA20 EC_SCI# EC_SMI#

LAN_CLKREQ#

WLAN_CLKREQ#

R602

R602 33_0402_5%

33_0402_5%

T55T55 T56T56 T57T57

LPC_RST_A# APU_PCIE_RST#_BUF

EC_RSMRST#_R

PWR_GOOD_APU

APU_PCIE_WAKE#

TEST0 CS_JTAG_TMS_TEST1 TEST2

LAN_CLKREQ# WLAN_CLKREQ#

HDA_BITCLK HDA_SDOUT HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3 HDA_SYNC HDA_RST#

32K_X1

32K_X2

T36T36

T53T53

T52T52 T54T54

AY4

LPC_RST_L

AY9

PCIE_RST_L

AY5

RSMRST_L

BA8

PWR_BTN_L

AM19

PWR_GOOD

AY7

SYS_RESET_L/GEVENT19_L

AW11

WAKE_L/GEVENT8_L

AY3

SLP_S3_L

BA5

SLP_S5_L

AU13

TEST0

AY10

TEST1/TMS

AY6

TEST2

AR23

KBRST_L

AR31

GA20IN/GEVENT0_L

AN5

LPC_PME_L/GEVENT3_L

AL7

LPC_SMI_L/GEVENT23_L

AP15

AC_PRES/IR_RX0/GEVENT16_L

AV13

IR_TX0/GEVENT21_L

BA9

IR_TX1/GEVENT6_L

BA10

IR_RX1/GEVENT20_L

AV15

IR_LED_L/LLB_L/GPIO184

AU29

CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/GPIO60

AW29

CLK_REQ1_L/GPIO61

AR27

CLK_REQ2_L/GPIO62

AV27

CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/GPIO63

AY29

CLK_REQG_L/GPIO65/OSCIN

AY8

USB_OC0_L/SPI_TPM_CS_L/TRST_L/GEVENT12_L

AW1

USB_OC1_L/TDI/GEVENT13_L

AV1

USB_OC2_L/TCK/GEVENT14_L

AY1

USB_OC3_L/TDO/GEVENT15_L

AN2

AZ_BITCLK

AN1

AZ_SDOUT

AK2

AZ_SDIN0/GPIO167

AK1

AZ_SDIN1/GPIO168

AM1

AZ_SDIN2/GPIO169

AL2

AZ_SDIN3/GPIO170

AM2

AZ_SYNC

AL1

AZ_RST_L

AJ2

X32K_X1

AJ1

X32K_X2

PU +3VALW + PD

+3VALW

3 3

1 2

R691 10K_ 0402_5%@R691 10K_ 0402_5%@

1 2

R686 10K_ 0402_5%R686 10K_ 0402_5%

APU_GPIO174

<21>

HDA_RST#_AUDIO

<21>

HDA_SYNC_AUDIO

<21>

HDA_BITCLK_AUDIO

<21>

HDA_SDOUT_AUDIO

PU +3VALW

+3VALW

RP14

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

1 2

R656 100K _0402_5%@R656 100K _0402_5%@

1 2

R650 100K _0402_5%R650 100K_0402_5%

1 2

R651 100K _0402_5%R651 100K_0402_5%

APU_SCLK1 APU_SDATA1 APU_PCIE_WAKE#

EC_LID_OUT# USB_OC0# USB_OC1#

PU +3VS

+3VS

4 4

PD

1 2

R622 8.2K_0402 _5%@R622 8.2K_0402 _5%@

1 2

R621 8.2K_0402 _5%@R621 8.2K_0402 _5%@

1 2

R673 2.2K_0402 _5%R673 2.2K_0402_5%

1 2

R674 2.2K_0402 _5%R674 2.2K_0402_5%

1 2

R684 10K_ 0402_5%@R684 10K_ 0402_5%@

1 2

R688 10K_ 0402_5%@R688 10K_ 0402_5%@

A

WLAN_CLKREQ#

LAN_CLKREQ# APU_SCLK0 APU_SDATA0

HDA_BITCLK

HDA_SDIN0

EC_RSMRST# , POWER_GOOD follow CRB (APU side 1.8V power rail)

<18>

EC_RSMRST#

<18>

SYS_PWRGD_EC

PU +3VALW + PD

TEST0 CS_JTAG_TMS_TEST1 TEST2

B

UAPUD

ACPI/SD/AZ/GPIO/RTC/MISC

FT3 REV 0.51

RP13

1 8 2 7 3 6 4 5

33_0804_8P4R_5%

Must connected to 10 ms RC delay circuit on +1.8-V S5 power rail.

D3

1 2

RB751V-40TE17_SOD323-2

D5

1 2

RB751V-40TE17_SOD323-2

RP9

@RP9

@

1 8 2 7 3 6 4 5

1K_0804_8P4R_5%

RP10

@RP10

@

1 8 2 7 3 6 4 5

15K_0804_8P4R_5%

B

15K_0804_8P4R_5%

HDA_RST# HDA_SYNC HDA_BITCLK HDA_SDOUT

EC_RSMRST#_R

PWR_GOOD_APU

1U_0402_6.3V6K

+3VALW

SD_PWR_CTRL

SD_CLK/GPIO73

SD_CMD/GPIO74

SD_CD/GPIO75

SD_WP/GPIO76

SD_DATA0/GPIO77

SD_DATA1/GPIO78

SD_DATA2/GPIO79

SD_DATA3/GPIO80

SD_LED/GPIO45

SCL0/GPIO43

SDA0/GPIO47

SCL1/GPIO227

SDA1/GPIO228

GPIO49

GPIO50

GPIO51

GPIO55

GPIO57

GPIO58

GPIO59

GPIO64

SPKR/GPIO66

GPIO68

GPIO69

GPIO70

GPIO71

GPIO174

GEVENT2_L

GEVENT4_L

GEVENT7_L

GEVENT10_L

GEVENT11_L

GEVENT17_L

BLINK/GEVENT18_L

GEVENT22_L

GENINT1_L/GPIO32

GENINT2_L/GPIO33

FANOUT0/GPIO52

FANIN0/GPIO56

RTCCLK

X4@

BA23 AY22

AY23 AY20 BA20

BA22 AY21 AY24 BA24

AY25

AU25 AV25

AY11 BA11

AP27 AY28 BA28 AV23 AP21 BA26 AV19 AY27 BA27 AU21 AY26 AV21 AM21 BA3

AV17 BA4 AR15 AP17 AP11 AN8 AU17 BA6

BA29 AP23

AV31 AU31

AV11

FT3_BGA769

C

APU_SCLK0 APU_SDATA0

1 2

R661 0_0402_5%@R661 0_040 2_5%@

APU_GPIO174

GEVENT2#

EC_LID_OUT#

APU_SCLK1 APU_SDATA1

Board_ID1

APU_SCLK0 APU_SDATA0

H_PROCHOT#

EC_LID_OUT#

BT_DISABLE#

<16,8,9> <16,8,9>

<18>

<16>

RTC_CLK

APU_PCIE_RST#_BUF

BT_OFF#

WL_OFF# ODD_EN

APU_SPKR

<18,24,29,4>

<18>

D

1 2

R907

R907 33_0402_5%

33_0402_5%

C912

150P_0402_50V8J

If use as SMBUS : Pulled-up to VDD_33(port0) , VDD_33_ALW(port1) with a resistor of: Qty: 1; Value: 2.2 KΩ; Tol: 5% If no use : Pulled-up to VDD_33(port0) , VDD_33_ALW(port1) with a resistor of:

<16>

Qty: 1; Value: 10 KΩ; Tol: 5%

<16> <13>

<21>

STRAPS OF APU

LPC_FRAME# LPC_CLK0_EC LPC_CLK1 GEVENT2_L

SPI ROM (

H

+1.8VALW

L

R345

47K_0402_5%

C209

R685

R685 10K_0402_5%

10K_0402_5%

1 2

<18,5>

LPC_FRAME#

<18,5>

1

1U_0402_6.3V6K

1U_0402_6.3V6K C212

C212

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2012/04/22 2015/04/22

LPC_CLK0_EC

<5>

LPC_CLK1

Compal Secret Data

Deciphered Date

DEFAULT)

LPC ROM

GEVENT2#

RTC_CLK

D

12

R902

R902 10K_0402_5%

10K_0402_5%

12

@

R903

R903 2K_0402_5%

2K_0402_5%

BOOT FAIL TIMER ENABLED

BOOT FAIL TIMER D (DEFAULT)

ISABLED

1

2

12

@

R904

R904 10K_0402_5%

10K_0402_5%

12

R926

R926 2K_0402_5%

2K_0402_5%

E

APU_PCIE_RST#

+3VS

12

R911

UMA@ R911

UMA@

10K_0402_5%

Board_ID1

0 PX5.5

1

Function

UMA

12

R912

PX@ R912

PX@

10K_0402_5%

32.768KMHz CRYSTAL

1

2

NORMAL POWR UP/RESET TIMING (DEFAULT)

FAST POWER U FOR SIMULATION

R949

R949 10K_0402_5%

10K_0402_5%

@

R950

2.2K_0402_5%

E

32K_X1

32K_X2

C686

C686 18P_0402_50V8J

18P_0402_50V8J

RTC_CLK

P/RESET TIMING

6 37Thursday, March 28, 2013

1 2

R914

R914 20M_0402_5%

20M_0402_5%

Y3

32.768KHZ_12.5P_1TJF125DP1A000D

1 2

1

C682

C682 22P_0402_50V8J

22P_0402_50V8J

2

CLKGEN ENABLE (DEFAULT)

CLKGEN DISABLED

12

R925

R925 10K_0402_5%

10K_0402_5%

12

@

R927

R927 2K_0402_5%

2K_0402_5%

Title

Size Document Number Rev

Custom

Date: Sheet of

.8V SPI ROM

1

3.3V SPI ROM (DEFAULT)

+3VALW

12

@

R928

R928 10K_0402_5%

10K_0402_5%

12

Compal Electronics, Inc.

FT3 GPIO/AZ/MISC

VAWGA/GB

R929

2.2K_0402_5%

12

<14,16>

1.0

A

B

C

D

E

CORE POWER OF APU

+APU_CORE

1 1

VDDCR_CPU

C179 1U_0402_6.3V6KC179 1U_0402_6.3V6K

C184 1U_0402_6.3V6KC184 1U_0402_6.3V6K

C186 1U_0402_6.3V6KC186 1U_0402_6.3V6K

C180 1U_0402_6.3V6KC180 1U_0402_6.3V6K

C181 1U_0402_6.3V6KC181 1U_0402_6.3V6K

C182 1U_0402_6.3V6K@C182 1U_0402_6.3V6K

1

2

C183 1U_0402_6.3V6KC183 1U_0402_6.3V6K

1

2

C187 1U_0402_6.3V6KC187 1U_0402_6.3V6K

1

2

C190 180P_0402_50V8JC190 180P_0402_50V8J

C188 1U_0402_6.3V6KC188 1U_0402_6.3V6K

C189 1U_0402_6.3V6KC189 1U_0402_6.3V6K

1

2

1

2

RTC OF APU

+RTCBATT_R

C166

0.22U_0402_10V6K

VDDBT_RTC_G

W=20mils

1

2

+RTCBATT

1 2

R93 10K_0402_5%R93 10K_0402_5%

12

CLRP1

J@CLRP1

J@

SHORT PADS

Need OPEN

for Clear CMOS

@

INTEGRATED GPU POWER OF APU +3VALW/+3VS OF APU

+APU_CORE_NB

2 2

+1.5V/+1.5VS OF APU

C924 10U_0603_6.3V6MC924 10U_0603_6.3V6M

+0.95VALW/+0.95VS OF APU

3 3

+0.95VS +0.95VS_APU_GFX

VDD_095

C934 10U_0603_6.3V6MC934 10U_0603_6.3V6M

C935 10U_0603_6.3V6MC935 10U_0603_6.3V6M

C198 1U_0402_6.3V6KC198 1U_0402_6.3V6K

1

2

4 4

VDD_095_USB3_DUAL

VDDCR_NB

C201 1U_0402_6.3V6KC201 1U_0402_6.3V6K

C202 1U_0402_6.3V6KC202 1U_0402_6.3V6K

C200 1U_0402_6.3V6KC200 1U_0402_6.3V6K

1

2

C194 1U_0402_6.3V6KC194 1U_0402_6.3V6K

C191 1U_0402_6.3V6KC191 1U_0402_6.3V6K

C192 1U_0402_6.3V6KC192 1U_0402_6.3V6K

C193 1U_0402_6.3V6KC193 1U_0402_6.3V6K

1

2

VDDIO_MEM_S

C923 0.1U_0402_16V7KC923 0.1U_0402_16V7K

C927 0.1U_0402_16V7KC927 0.1U_0402_16V7K

C928 0.1U_0402_16V7KC928 0.1U_0402_16V7K

C931 0.1U_0402_16V7KC931 0.1U_0402_16V7K

C932 0.1U_0402_16V7KC932 0.1U_0402_16V7K

C949 10U_0603_6.3V6M@C949 10U_0603_6.3V6M

C925 10U_0603_6.3V6MC925 10U_0603_6.3V6M

1

2

C926 0.1U_0402_16V7KC926 0.1U_0402_16V7K

1

2

1

2

@

C930 0.1U_0402_16V7KC930 0.1U_0402_16V7K

C929 0.1U_0402_16V7K@C929 0.1U_0402_16V7K

1

2

C211 180P_0402_50V8JC211 180P_0402_50V8J

1

2

@

VDD_095_GFX

L22

FBMA-L11-201209-121LMA50T_0805

C205 1U_0402_6.3V6KC205 1U_0402_6.3V6K

C206 1U_0402_6.3V6KC206 1U_0402_6.3V6K

C199 1U_0402_6.3V6K@C199 1U_0402_6.3V6K

C204 1U_0402_6.3V6K@C204 1U_0402_6.3V6K

1

2

@

FBMA-L11-201209-121LMA50T_0805

C213 180P_0402_50V8JC213 180P_0402_50V8J

C260 1U_0402_6.3V6KC260 1U_0402_6.3V6K

1

2

12

+0.95VALW +0.95VALW

C214 1U_0402_6.3V6KC214 1U_0402_6.3V6K

C216 1U_0402_6.3V6KC216 1U_0402_6.3V6K

C938 10U_0603_6.3V6MC938 10U_0603_6.3V6M

C937 10U_0603_6.3V6MC937 10U_0603_6.3V6M

1

2

C221 1U_0402_6.3V6K@C221 1U_0402_6.3V6K

C218 180P_0402_50V8JC218 180P_0402_50V8J

1

2

1

2

C220 1U_0402_6.3V6KC220 1U_0402_6.3V6K

@

VDD_095_ALW VDD_18_ALW

A

+3VS

C197 180P_0402_50V8JC197 180P_0402_50V8J

1

2

C257 180P_0402_50V8JC257 180P_0402_50V8J

C249 1U_0402_6.3V6KC249 1U_0402_6.3V6K

1

2

+3VALW_APU

C253 1U_0402_6.3V6KC253 1U_0402_6.3V6K

C252 1U_0402_6.3V6KC252 1U_0402_6.3V6K

1

2

R582 0_0603_5%

1

2

+1.5V +APU_CORE

VDD_33_ALWVDD_33

VDDIO_AZ_ALW

PLANE SPLIT

C230 180P_0402_50V8JC230 180P_0402_50V8J

C231 180P_0402_50V8JC231 180P_0402_50V8J

C207 180P_0402_50V8J@C207 180P_0402_50V8J

C208 180P_0402_50V8J@C208 180P_0402_50V8J

C210 180P_0402_50V8JC210 180P_0402_50V8J

1

2

1

2

@

(Could be S0 or S5 power rail)

+1.5VS+1.5V

C259 180P_0402_50V8JC259 180P_0402_50V8J

C258 180P_0402_50V8JC258 180P_0402_50V8J

1

2

C161 4.7U_0603_6.3V6KC161 4.7U_0603_6.3V6K

1

2

C232 180P_0402_50V8JC232 180P_0402_50V8J

C254 1U_0402_6.3V6KC254 1U_0402_6.3V6K

C256 1U_0402_6.3V6K@C256 1U_0402_6.3V6K

C255 1U_0402_6.3V6KC255 1U_0402_6.3V6K

1

2

@

+1.8VALW/+1.8VS OF APU

+1.8VS

C203 1U_0402_6.3V6KC203 1U_0402_6.3V6K

C936 10U_0603_6.3V6MC936 10U_0603_6.3V6M

1

2

C219 1U_0402_6.3V6KC219 1U_0402_6.3V6K

C222 1U_0402_6.3V6KC222 1U_0402_6.3V6K

C217 1U_0402_6.3V6K@C217 1U_0402_6.3V6K

1

2

C933 10U_0603_6.3V6MC933 10U_0603_6.3V6M

1

2

1

2

@

VDD_18

C236 1U_0402_6.3V6KC236 1U_0402_6.3V6K

C237 1U_0402_6.3V6KC237 1U_0402_6.3V6K

C238 1U_0402_6.3V6KC238 1U_0402_6.3V6K

C239 1U_0402_6.3V6KC239 1U_0402_6.3V6K

C240 1U_0402_6.3V6KC240 1U_0402_6.3V6K

1

2

+1.8VALW

C160 4.7U_0603_6.3V6KC160 4.7U_0603_6.3V6K

1

2

B

C233 180P_0402_50V8JC233 180P_0402_50V8J

1

2

+1.5VS

+1.8VALW

+3VALW_APU

C250 1U_0402_6.3V6KC250 1U_0402_6.3V6K

C244 1U_0402_6.3V6KC244 1U_0402_6.3V6K

1

2

C245 180P_0402_50V8JC245 180P_0402_50V8J

C246 1U_0402_6.3V6KC246 1U_0402_6.3V6K

C248 1U_0402_6.3V6KC248 1U_0402_6.3V6K

1

2

1

2

+0.95VALW

+RTCBATT_R

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

+3VALW

@

12

UAPUH

UAPUF

POWER

J35

VDDIO_MEM_S_1

L32

VDDIO_MEM_S_2

L37

VDDIO_MEM_S_3

N35

VDDIO_MEM_S_4

R31

VDDIO_MEM_S_5

R37

VDDIO_MEM_S_6

U32

VDDIO_MEM_S_7

U35

VDDIO_MEM_S_8

W31

VDDIO_MEM_S_9

W32

VDDIO_MEM_S_10

W37

VDDIO_MEM_S_11

AA31

VDDIO_MEM_S_12

AA35

VDDIO_MEM_S_13

AC32

VDDIO_MEM_S_14

AC37

VDDIO_MEM_S_15

AE31

VDDIO_MEM_S_16

AE35

VDDIO_MEM_S_17

AG32

VDDIO_MEM_S_18

AG37

VDDIO_MEM_S_19

AJ35

VDDIO_MEM_S_20

AL32

VDDIO_MEM_S_21

AL37

VDDIO_MEM_S_22

AR35

VDDIO_MEM_S_23

AL10

VDDIO_AZ_ALW_1

AL11

VDDIO_AZ_ALW_2

B1

VDD_18_ALW_1

B2

VDD_18_ALW_2

AL13

VDD_33_ALW_1

AM13

VDD_33_ALW_2

AR5

VDD_095_USB3_DUAL_1

AU4

VDD_095_USB3_DUAL_2

AV7

VDD_095_USB3_DUAL_3

AW5

VDD_095_USB3_DUAL_4

AE11

VDD_095_ALW_1

AE13

VDD_095_ALW_2

AJ11

VDD_095_ALW_3

AJ13

VDD_095_ALW_4

AN4

VDDBT_RTC_G

2012/04/22 2015/04/22

C

POWER

FT3 REV 0.51

Compal Secret Data

L21

VDDCR_CPU_1

L23

VDDCR_CPU_2

L25

VDDCR_CPU_3

L27

VDDCR_CPU_4

L29

VDDCR_CPU_5

N21

VDDCR_CPU_6

N23

VDDCR_CPU_7

N27

VDDCR_CPU_8

R21

VDDCR_CPU_9

R23

VDDCR_CPU_10

R27

VDDCR_CPU_11

U21

VDDCR_CPU_12

U23

VDDCR_CPU_13

U27

VDDCR_CPU_14

W21

VDDCR_CPU_15

W23

VDDCR_CPU_16

W27

VDDCR_CPU_17

AA21

VDDCR_CPU_18

AA23

VDDCR_CPU_19

AA27

VDDCR_CPU_20

AC21

VDDCR_CPU_21

AC23

VDDCR_CPU_22

AC27

VDDCR_CPU_23

AE21

VDDCR_CPU_24

AE23

VDDCR_CPU_25

AE27

VDDCR_CPU_26

L13

VDDCR_NB_1

L17

VDDCR_NB_2

N11

VDDCR_NB_3

N13

VDDCR_NB_4

N17

VDDCR_NB_5

R11

VDDCR_NB_6

R13

VDDCR_NB_7

R17

VDDCR_NB_8

U13

VDDCR_NB_9

U17

VDDCR_NB_10

W13

VDDCR_NB_11

W17

VDDCR_NB_12

AA13

VDDCR_NB_13

AA17

VDDCR_NB_14

AC13

VDDCR_NB_15

AC17

VDDCR_NB_16

AE15

VDDCR_NB_17

AE17

VDDCR_NB_18

AE19

VDDCR_NB_19

AG17

VDDCR_NB_20

AG21

VDDCR_NB_21

A2

VDD_18_1

A3

VDD_18_2

B3

VDD_18_3

C3

VDD_18_4

AM15

VDD_33_1

AM17

VDD_33_2

AG23

VDD_095_1

AG27

VDD_095_2

AJ21

VDD_095_3

AJ27

VDD_095_4

AL21

VDD_095_5

AL23

VDD_095_6

AL27

VDD_095_7

AM23

VDD_095_8

AM25

VDD_095_9

U10

VDD_095_GFX_1

W10

VDD_095_GFX_2

AA10

VDD_095_GFX_3

X4@

FT3_BGA769

Deciphered Date

+APU_CORE_NB

+1.8VS

+3VS

+0.95VS

+0.95VS_APU_GFX

D

A8 A13 A23 A31 A35 A39

B8 B13 B23 B31 B39

C1

C2

C5

C7

C9 C11 C13 C15 C17 C19 C21 C23 C25 C27 C29 C31 C33 C35 C37 C39 C41

D9 D11 D13

E3

E4

E9 E11 E13 E27 E31 E35 E38 E39

G3

G7 G11 G13 G15 G17 G21 G25 G29 G35 G37 G39 G41 H11 H13 H23 H31

UAPUG

GND

VSS_1

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

VSS_38

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_48

VSS_49

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_56

VSS_57

VSS_58

VSS_59

VSS_60

VSS_61

VSS_62

GND

FT3 REV 0.51

Custom

J3

VSS_63

J7

VSS_64

J8

VSS_65

J39

VSS_66

K11

VSS_67

K13

VSS_68

K17

VSS_69

K19

VSS_70

K21

VSS_71

K23

VSS_72

K25

VSS_73

K27

VSS_74

K29

VSS_75

K31

VSS_76

L3

VSS_77

L7

VSS_78

L8

VSS_79

L10

VSS_80

L11

VSS_81

L15

VSS_82

L19

VSS_83

L31

VSS_84

L39

VSS_85

L41

VSS_86

M1

VSS_87

M2

VSS_88

N3

VSS_89

N7

VSS_90

N15

VSS_91

N19

VSS_92

N25

VSS_93

N29

VSS_94

N31

VSS_95

N39

VSS_96

P1

VSS_97

P2

VSS_98

R3

VSS_99

R7

VSS_100

R15

VSS_101

R19

VSS_102

R25

VSS_103

R29

VSS_104

R39

VSS_105

R41

VSS_106

U1

VSS_107

U2

VSS_108

U3

VSS_109

U7

VSS_110

U8

VSS_111

U11

VSS_112

U15

VSS_113

U19

VSS_114

U25

VSS_115

U29

VSS_116

U31

VSS_117

U39

VSS_118

W3

VSS_119

W5

VSS_120

W11

VSS_121

W15

VSS_122

W19

VSS_123

W25

VSS_124

X4@

FT3_BGA769

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

W29

VSS_125

W39

VSS_126

W41

VSS_127

Y1

VSS_128

Y2

VSS_129

AA3

VSS_130

AA7

VSS_131

AA8

VSS_132

AA11

VSS_133

AA15

VSS_134

AA19

VSS_135

AA25

VSS_136

AA29

VSS_137

AA39

VSS_138

AC3

VSS_139

AC7

VSS_140

AC11

VSS_141

AC15

VSS_142

AC19

VSS_143

AC25

VSS_144

AC29

VSS_145

AC31

VSS_146

AC39

VSS_147

AC41

VSS_148

AE3

VSS_149

AE7

VSS_150

AE25

VSS_151

AE29

VSS_152

AE32

VSS_153

AE39

VSS_154

AG3

VSS_155

AG5

VSS_156

AG10

VSS_157

AG11

VSS_158

AG13

VSS_159

AG15

VSS_160

AG19

VSS_161

AG25

VSS_162

AG29

VSS_163

AG31

VSS_164

AG39

VSS_165

AG41

VSS_166

AH1

VSS_167

AH2

VSS_168

AJ3

VSS_169

AJ7

VSS_170

AJ15

VSS_171

AJ17

VSS_172

AJ19

VSS_173

AJ23

VSS_174

AJ25

VSS_175

AJ29

VSS_176

AJ31

VSS_177

AJ32

VSS_178

AJ39

VSS_179

AL3

VSS_180

AL8

VSS_181

AL15

VSS_182

AL17

VSS_183

AL19

VSS_184

AL25

VSS_185

AL29

VSS_186

Compal Electronics, Inc.

FT3 PW R/GND

VAWGA/GB

E

GND

FT3 REV 0.51

VSS_187

VSS_188

VSS_189

VSS_190

VSS_191

VSS_192

VSS_193

VSS_194

VSS_195

VSS_196

VSS_197

VSS_198

VSS_199

VSS_200

VSS_201

VSS_202

VSS_203

VSS_204

VSS_205

VSS_206

VSS_207

VSS_208

VSS_209

VSS_210

VSS_211

VSS_212

VSS_213

VSS_214

VSS_215

VSS_216

VSS_217

VSS_218

VSS_219

VSS_220

VSS_221

VSS_222

VSS_223

VSS_224

VSS_225

VSS_226

VSS_227

VSS_228

VSS_229

VSS_230

VSS_231

VSS_232

VSS_233

VSS_234

VSS_235

VSS_236

VSS_237

VSS_238

VSS_239

VSS_240

VSS_241

VSS_242

VSSBG_DAC

VBURN

X4@

7 37Thursday, March 28, 2013

PSEN

FT3_BGA769

of

AL39 AL41 AM11 AM27 AM31 AN3 AN7 AN39 AP31 AR3 AR13 AR17 AR21 AR25 AR29 AR39 AR41 AU1 AU2 AU3 AU15 AU19 AU23 AU27 AU39 AV9 AW3 AW7 AW13 AW15 AW17 AW19 AW21 AW23 AW25 AW27 AW31 AW33 AW35 AW37 AW39 AW41 AY13 AY15 AY18 AY30 BA2 BA7 BA13 BA15 BA18 BA21 BA25 BA31 BA35 BA39 A15 AL31 AM29

1.0

A

B

C

D

E

+1.5V +1.5V+VREF_DQ

2

1

C176

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1000P_0402_50V7K

DDRAB_SDQS1# DDRAB_SDQS1

DDRAB_SDQS2# DDRAB_SDQS2

DDRA_CKE0

DDRAB_SBS2#

DDRA_CLK0 DDRA_CLK0#

DDRAB_SBS0#

DDRAB_SWE#

DDRAB_SCAS#

DDRA_SCS1#

DDRAB_SDQS4# DDRAB_SDQS4

DDRAB_SDQS6# DDRAB_SDQS6

1

2

1000P_0402_50V7K

1

C136

0.1U_0402_16V4Z

2

A

1 1

<4,9> <4,9>

<4>

2 2

3 3

4 4

<4,9>

<4> <4>

<4,9>

<4,9> <4,9>

<4>

<4,9> <4,9>

C135

2.2U_0603_6.3V6K

+3VS

DDRAB_SDQ0 DDRAB_SDQ1

C142

DDRAB_SDM0

DDRAB_SDQ2 DDRAB_SDQ3

DDRAB_SDQ8 DDRAB_SDQ9

DDRAB_SDQS1# DDRAB_SDQS1

DDRAB_SDQ10 DDRAB_SDQ11

DDRAB_SDQ16 DDRAB_SDQ17

DDRAB_SDQS2# DDRAB_SDQS2

DDRAB_SDQ18 DDRAB_SDQ19

DDRAB_SDQ24 DDRAB_SDQ25

DDRAB_SDM3

DDRAB_SDQ26 DDRAB_SDQ27

DDRA_CKE0

DDRAB_SBS2#

DDRAB_SMA12 DDRAB_SMA9

DDRAB_SMA8 DDRAB_SMA5

DDRAB_SMA3 DDRAB_SMA1

DDRA_CLK0 DDRA_CLK0#

DDRAB_SMA10 DDRAB_SBS0#

DDRAB_SWE# DDRAB_SCAS# DDRA_ODT0

DDRAB_SMA13 DDRA_SCS1#

DDRAB_SDQ32 DDRAB_SDQ33

DDRAB_SDQS4# DDRAB_SDQS4

DDRAB_SDQ34 DDRAB_SDQ35

DDRAB_SDQ40 DDRAB_SDQ41

DDRAB_SDM5

DDRAB_SDQ42 DDRAB_SDQ43

DDRAB_SDQ48 DDRAB_SDQ49

DDRAB_SDQS6# DDRAB_SDQS6

DDRAB_SDQ50 DDRAB_SDQ51

DDRAB_SDQ56 DDRAB_SDQ57

DDRAB_SDM7

DDRAB_SDQ58 DDRAB_SDQ59

R69 10K_0402_5%R69 10K_0402_5%

+3VS

1 2

12

R70

10K_0402_5%

JDIMM1

15mil

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205

VREF_CA VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0

EVENT# VDDSPD SA1 VTT1

G1

FOX_AS0A626-U8SN-7F

ME@

DIMM_A H:8mm

<Address: 00>

DQ4 DQ5

VSS3

DQS#0

DQS0 VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1 CK1#

VDD12

BA1 RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

SDA

SCL VTT2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78

A15

80

A14

82 84

A11

86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102 104 106 108 110 112 114

S0#

116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

G2

B

DDRAB_SDQ4 DDRAB_SDQ5

DDRAB_SDQS0# DDRAB_SDQS0

DDRAB_SDQ6 DDRAB_SDQ7

DDRAB_SDQ12 DDRAB_SDQ13

DDRAB_SDM1 MEM_MAB_RST#

DDRAB_SDQ14 DDRAB_SDQ15

DDRAB_SDQ20 DDRAB_SDQ21

DDRAB_SDM2

DDRAB_SDQ22 DDRAB_SDQ23

DDRAB_SDQ28 DDRAB_SDQ29

DDRAB_SDQS3# DDRAB_SDQS3

DDRAB_SDQ30 DDRAB_SDQ31

DDRA_CKE1

DDRAB_SMA15 DDRAB_SMA14

DDRAB_SMA11 DDRAB_SMA7

DDRAB_SMA6 DDRAB_SMA4

DDRAB_SMA2 DDRAB_SMA0

DDRA_CLK1 DDRA_CLK1#

DDRAB_SBS1# DDRAB_SRAS#

DDRA_SCS0#

DDRA_ODT1

15mil

DDRAB_SDQ36 DDRAB_SDQ37

DDRAB_SDM4

DDRAB_SDQ38 DDRAB_SDQ39

DDRAB_SDQ44 DDRAB_SDQ45

DDRAB_SDQS5# DDRAB_SDQS5

DDRAB_SDQ46 DDRAB_SDQ47

DDRAB_SDQ52 DDRAB_SDQ53

DDRAB_SDM6

DDRAB_SDQ54 DDRAB_SDQ55

DDRAB_SDQ60 DDRAB_SDQ61

DDRAB_SDQS7# DDRAB_SDQS7

DDRAB_SDQ62 DDRAB_SDQ63

MEM_MAB_EVENT#

+0.75VS

DDRAB_SDQS0# DDRAB_SDQS0

MEM_MAB_RST#

DDRAB_SDQS3# DDRAB_SDQS3

DDRA_CKE1

DDRA_CLK1 DDRA_CLK1#

DDRAB_SBS1# DDRAB_SRAS#

DDRA_SCS0# DDRA_ODT0

DDRA_ODT1

1

C134

2

0.1U_0402_16V4Z

1000P_0402_50V7K

DDRAB_SDQS5# DDRAB_SDQS5

DDRAB_SDQS7# DDRAB_SDQS7

MEM_MAB_EVENT# <4,9>

APU_SDATA0 APU_SCLK0

<4,9> <4,9>

<4,9>

<4,9> <4,9>

<4>

<4> <4>

<4,9> <4,9>

<4> <4>

<4>

+VREF_CA

2

C167

1

<4,9> <4,9>

<16,6,9> <16,6,9>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

DDRAB_SDQ[0..63]

DDRAB_SDM[0..7]

DDRAB_SMA[0..15]

DDRAB_SDQ[0..63]

DDRAB_SDM[0..7] <4,9>

DDRAB_SMA[0..15] <4,9>

+1.5V/+0.75VS OF DIMM1

+1.5V +0.75VS

C115 0.1U_0402_16V4ZC115 0.1U_0402_16V4Z

C116 0.1U_0402_16V4Z@C116 0.1U_0402_16V4Z

C114 0.1U_0402_16V4Z@C114 0.1U_0402_16V4Z

1

2

@

C120 0.1U_0402_16V4Z@C120 0.1U_0402_16V4Z

C121 0.1U_0402_16V4Z@C121 0.1U_0402_16V4Z

C117 0.1U_0402_16V4ZC117 0.1U_0402_16V4Z

C118 0.1U_0402_16V4ZC118 0.1U_0402_16V4Z

1

2

C122 0.1U_0402_16V4ZC122 0.1U_0402_16V4Z

C119 0.1U_0402_16V4Z@C119 0.1U_0402_16V4Z

1

2

@

VREF for DIMM1,2

+VREF_DQ

Compal Secret Data

2012/04/22 2015/04/22

C

Compal Secret Data

Deciphered Date

<4,9>

C123 0.1U_0402_16V4Z@C123 0.1U_0402_16V4Z

1

2

@

+1.5V +1.5V

1 2

R65

R65 20K_0402_1%

20K_0402_1%

R67

R67 20K_0402_1%

20K_0402_1%

C126 0.1U_0402_16V4ZC126 0.1U_0402_16V4Z

C127 4.7U_0603_6.3V6KC127 4.7U_0603_6.3V6K

1

2

+VREF_CA

D

R66

R66 1K_0402_1%

1K_0402_1%

1 2

R68

R68 1K_0402_1%

1K_0402_1%

1 2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DDR3 SODIMM-I Socket

VAWGA/GB

8 37Thursday, March 28, 2013

E

1.0

A

B

C

D

E

+VREF_DQ

15mil

DDRAB_SDQ0

2

1

C177

C143

2

1000P_0402_50V7K

DDRAB_SDQS1# DDRAB_SDQS1

DDRAB_SDQS2# DDRAB_SDQS2

DDRB_CKE0

DDRAB_SBS2#

DDRB_CLK0 DDRB_CLK0#

DDRAB_SBS0#

DDRAB_SWE#

DDRAB_SCAS#

DDRB_SCS1#

DDRAB_SDQS4# DDRAB_SDQS4

DDRAB_SDQS6# DDRAB_SDQS6

C143

+3VS

1

0.1U_0402_16V4Z

<4,8> <4,8>

<4>

<4,8>

<4> <4>

<4,8>

<4,8> <4,8>

<4>

<4,8> <4,8>

0.1U_0402_16V4Z

1 1

2 2

3 3

4 4

DDRAB_SDQ1

DDRAB_SDM0

DDRAB_SDQ2 DDRAB_SDQ3

DDRAB_SDQ8 DDRAB_SDQ9

DDRAB_SDQS1# DDRAB_SDQS1

DDRAB_SDQ10 DDRAB_SDQ11

DDRAB_SDQ16 DDRAB_SDQ17

DDRAB_SDQS2# DDRAB_SDQS2

DDRAB_SDQ18 DDRAB_SDQ19

DDRAB_SDQ24 DDRAB_SDQ25

DDRAB_SDM3

DDRAB_SDQ26 DDRAB_SDQ27

DDRB_CKE0

DDRAB_SBS2#

DDRAB_SMA12 DDRAB_SMA9

DDRAB_SMA8 DDRAB_SMA5

DDRAB_SMA3 DDRAB_SMA1

DDRB_CLK0 DDRB_CLK0#

DDRAB_SMA10 DDRAB_SBS0#

DDRAB_SWE#

DDRAB_SMA13 DDRB_SCS1#

DDRAB_SDQ32 DDRAB_SDQ33

DDRAB_SDQS4# DDRAB_SDQS4

DDRAB_SDQ34 DDRAB_SDQ35

DDRAB_SDQ40 DDRAB_SDQ41

DDRAB_SDM5

DDRAB_SDQ42 DDRAB_SDQ43

DDRAB_SDQ48 DDRAB_SDQ49

DDRAB_SDQS6# DDRAB_SDQS6

DDRAB_SDQ50 DDRAB_SDQ51

DDRAB_SDQ56 DDRAB_SDQ57

DDRAB_SDM7

DDRAB_SDQ58 DDRAB_SDQ59

R71 10K_0402_5%R71 10K_0402_5%

1 2

R72 10K_0402_5%R72 10K_0402_5%

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U4SN-7F

E@

M

VSS3

DQS#0

DQS0

VSS6

VSS8 DQ12 DQ13

VSS10

DQ14 DQ15

DQ20 DQ21

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44

DQ45 VSS35 DQS#5

DQS5

VSS38

DQ46

DQ47 VSS40

DQ52

DQ53 VSS42

VSS43

DQ54

DQ55 VSS45

DQ60

DQ61 VSS47 DQS#7

DQS7

VSS50

DQ62

DQ63 VSS52

EVENT#

VTT2

DQ4 DQ5

DQ6 DQ7

DM1

DM2

CK1

BA1

NC2

DM4

DM6

SDA SCL

A15 A14

A11

S0#

+1.5V+1.5V

2 4

DDRAB_SDQ4

6

DDRAB_SDQ5

8 10

DDRAB_SDQS0#

12

DDRAB_SDQS0

14 16

DDRAB_SDQ6

18

DDRAB_SDQ7

20 22

DDRAB_SDQ12

24

DDRAB_SDQ13

26 28

DDRAB_SDM1

30

MEM_MAB_RST#

32 34

DDRAB_SDQ14

36

DDRAB_SDQ15

38 40

DDRAB_SDQ20

42

DDRAB_SDQ21

44 46

DDRAB_SDM2

48 50

DDRAB_SDQ22

52

DDRAB_SDQ23

54 56

DDRAB_SDQ28

58

DDRAB_SDQ29

60 62

DDRAB_SDQS3#

64

DDRAB_SDQS3

66 68

DDRAB_SDQ30

70

DDRAB_SDQ31

72

74 76 78 80 82 84 86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

G2

DDRB_CKE1

DDRAB_SMA15 DDRAB_SMA14

DDRAB_SMA11 DDRAB_SMA7

DDRAB_SMA6 DDRAB_SMA4

DDRAB_SMA2 DDRAB_SMA0

DDRB_CLK1 DDRB_CLK1#

DDRAB_SBS1# DDRAB_SRAS#

DDRB_SCS0# DDRB_ODT0DDRAB_SCAS#

DDRB_ODT1

15mil

DDRAB_SDQ36 DDRAB_SDQ37

DDRAB_SDM4

DDRAB_SDQ38 DDRAB_SDQ39

DDRAB_SDQ44 DDRAB_SDQ45

DDRAB_SDQS5# DDRAB_SDQS5

DDRAB_SDQ46 DDRAB_SDQ47

DDRAB_SDQ52 DDRAB_SDQ53

DDRAB_SDM6

DDRAB_SDQ54 DDRAB_SDQ55

DDRAB_SDQ60 DDRAB_SDQ61

DDRAB_SDQS7# DDRAB_SDQS7

DDRAB_SDQ62 DDRAB_SDQ63

MEM_MAB_EVENT#

+0.75VS

DDRAB_SDQS0# DDRAB_SDQS0

MEM_MAB_RST#

DDRAB_SDQS3# DDRAB_SDQS3

DDRB_CKE1

DDRB_CLK1 DDRB_CLK1#

DDRAB_SBS1# DDRAB_SRAS#

DDRB_SCS0# DDRB_ODT0

DDRB_ODT1

1000P_0402_50V7K

DDRAB_SDQS5# DDRAB_SDQS5

DDRAB_SDQS7# DDRAB_SDQS7

MEM_MAB_EVENT# <4,8>

APU_SDATA0 APU_SCLK0

<4,8> <4,8>

<4,8>

<4,8> <4,8>

<4>

<4> <4>

<4,8> <4,8>

<4> <4>

<4>

+VREF_CA

1

2

C139

C174

2

1

0.1U_0402_16V4Z

<4,8> <4,8>

<16,6,8> <16,6,8>

DDRAB_SDQ[0..63]

DDRAB_SDM[0..7]

DDRAB_SMA[0..15]

DDRAB_SDQ[0..63]

DDRAB_SDM[0..7] <4,8>

DDRAB_SMA[0..15] <4,8>

<4,8>

+1.5V/+0.75VS OF DIMM2

C132 0.1U_0402_16V4ZC132 0.1U_0402_16V4Z

C133 0.1U_0402_16V4Z@C133 0.1U_0402_16V4Z

C162 0.1U_0402_16V4ZC162 0.1U_0402_16V4Z

C155 0.1U_0402_16V4ZC155 0.1U_0402_16V4Z

C165 0.1U_0402_16V4ZC165 0.1U_0402_16V4Z

C168 0.1U_0402_16V4Z@C168 0.1U_0402_16V4Z

C169 0.1U_0402_16V4Z@C169 0.1U_0402_16V4Z

C170 0.1U_0402_16V4ZC170 0.1U_0402_16V4Z

C171 0.1U_0402_16V4ZC171 0.1U_0402_16V4Z

1

2

@

C172 0.1U_0402_16V4Z@C172 0.1U_0402_16V4Z

1

2

@

+1.5V+1.5V +0.75VS

C158 4.7U_0603_6.3V6KC158 4.7U_0603_6.3V6K

C175 0.1U_0402_16V4ZC175 0.1U_0402_16V4Z

1

2

1

+

C644

2

220U_6.3V_M

Security Classification

Issued Date

DIMM_B H:4mm

<Address: 10>

A

B

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2012/04/22 2015/04/22

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DDR3 SODIMM-II Socket

VAWGA/GB

9 37Thursday, March 28, 2013

E

1.0

5

D D

HDMI_DET<4>

<4> <4>

C C

B B

DP2_TXP0 DP2_TXN0

DP2_TXP1 DP2_TXN1

DP2_TXP2 DP2_TXN2

DP2_TXP3 DP2_TXN3

HDMI_CLKP

HDMI_CLKN

HDMI_TX0P

HDMI_TX0N

HDMI_TX1P

HDMI_TX1N

HDMI_TX2P

HDMI_TX2N

4

1

4

1

2

3

WCM-2012HS-900T

2

3

WCM-2012HS-900T

DP2_TXP0 DP2_TXN0

DP2_TXP1 DP2_TXN1

DP2_TXP2 DP2_TXN2

DP2_TXP3 DP2_TXN3

WCM-2012HS-900T

4

1

L30

EMIP@L30

EMIP@

WCM-2012HS-900T

4

1

L31

EMIP@L31

EMIP@

L39

EMIP@ L39

EMIP@

2

3

L40

EMIP@ L40

EMIP@

2

3

2

3

2

1

4

1

4

C51 0.1U_0402_16V7KHDMI@C51 0.1U_0 402_16V7KHDMI@ C52 0.1U_0402_16V7KHDMI@C52 0.1U_0 402_16V7KHDMI@

C53 0.1U_0402_16V7KHDMI@C53 0.1U_0 402_16V7KHDMI@ C54 0.1U_0402_16V7KHDMI@C54 0.1U_0 402_16V7KHDMI@

C55 0.1U_0402_16V7KHDMI@C55 0.1U_0 402_16V7KHDMI@ C56 0.1U_0402_16V7KHDMI@C56 0.1U_0 402_16V7KHDMI@

C57 0.1U_0402_16V7KHDMI@C57 0.1U_0 402_16V7KHDMI@

C5888 0.1U_0402_16V7KHDMI@C5888 0.1U_0402_16V7KHDMI@

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

1 2 1 2

+3VS

HDMI CLK DATA Pull high in Page 22 for 8P4R

HDMI_CLK<12,4>

A A

HDMI_DATA<12,4>

5

HDMI_CLK

HDMI_DATA

4

HDMI_TX2P HDMI_TX2N

HDMI_TX1P HDMI_TX1N

HDMI_TX0P HDMI_TX0N

HDMI_CLKP HDMI_CLKN

Q75A

HDMI@

2

DMN66D0LDW-7_SOT 363-6

5

3

Q75B

HDMI@

DMN66D0LDW-7_SOT 363-6

61

4

HDMI@

Q87

MMBT3904_NL_SOT23-3

Q87

+3VS

C

E

3 1

12

HDMI@

R898

R898 100K_0402_5%

100K_0402_5%

B

2

3

HDMI@

R434

1 2

150K_0402_5%

@

R894

200K_0402_5%

1 2

2

0.1U_0402_16V7K

Close to HDMI connector

D1

ESDU@D 1

ESDU@

HDMI_TX2+_CONN

HDMI_TX2-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMICLK_R

HDMIDAT_R

HDMICLK_R

HDMIDAT_R

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

4

5

3

TVWDF1004AD0_D FN9

D2

ESDU@

1

2

4

5

3

TVWDF1004AD0_D FN9

3

9

HDMI_TX2+_CONN

8

HDMI_TX2-_CONN

7

HDMI_TX1+_CONN

6

HDMI_TX1-_CONN

9

8

7

6

2

D69

D69 L30ESDL5V0C3-2_SOT23 -3

L30ESDL5V0C3-2_SOT23 -3

ESDU@

1

2012/04/22 2015/04/22

3

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_CLK+_CONN

HDMI_CLK-_CONN

Compal Secret Data

Deciphered Date

HDMI_CLK-_CONN

HDMI_CLK+_CONN

HDMI_TX1-_CONN

HDMI_TX1+_CONN

HDMI_TX0-_CONN

HDMI_TX0+_CONN

HDMI_TX2-_CONN

HDMI_TX2+_CONN

2

+5VS

C544

R1470

HDMI@ R1470

HDMI@

2.2K_0402_5%

1

U73

1

2

IN

AP2330W-7_SC59-3

R1471

2.2K_0402_5%

1 2

HDMI_DET_R

HDMIDAT_R HDMICLK_R

HDMI_CLK-_CONN

HDMI_CLK+_CONN HDMI_TX0-_CONN

HDMI_TX0+_CONN HDMI_TX1-_CONN

HDMI_TX1+_CONN HDMI_TX2-_CONN

HDMI_TX2+_CONN

1 2

R432 499_0402_1%HDMI@R4 32 499_0402_1%HDMI@

1 2

R433 499_0402_1%HDMI@R4 33 499_0402_1%HDMI@

1 2

R435 499_0402_1%HDMI@R4 35 499_0402_1%HDMI@

1 2

R436 499_0402_1%HDMI@R4 36 499_0402_1%HDMI@

1 2

R439 499_0402_1%HDMI@R4 39 499_0402_1%HDMI@

1 2

R440 499_0402_1%HDMI@R4 40 499_0402_1%HDMI@

1 2

R441 499_0402_1%HDMI@R4 41 499_0402_1%HDMI@

1 2

R442 499_0402_1%HDMI@R4 42 499_0402_1%HDMI@

Title

Size Document Number Rev

B

Date: Sheet of

OUT

GND

HDMI@R1471

HDMI@

+5V_Display

+3VS

Compal Electronics, Inc.

HDMI CONN

VAWGA/GB

W=40mils

3

2

JHDMI1

19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

SUYIN_100042GR019M23DZL

ME@

13

D

2

G

2N7002K_SOT23-3

S

0.1U_0402_16V7K

HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CKCK_shield CK+ D0D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+

Q76

HDMI@

1

+5V_Display

C543

G1 G2 G3 G4

10 37Monday, April 01, 2013

20 21 22 23

1

2

1.0

5

4

3

2

1

LCD POWER CIRCUIT

CMOS Camera

+3VS

@

1

CMOS@

C1152

0.1U_0402_16V4Z

2

12

R02

R694 0_0402_5%

D

13

VGA LCD/PANEL BD. Conn.

Add for protect BKOFF# damage

EMIU@C1160

EMIU@

1 2

R1466 0_0402_5%R1466 0_0402_5%

LVDS_ACLK LVDS_ACLK#

LVDS_A2 LVDS_A2# LVDS_A1 LVDS_A1# LVDS_A0

LVDS_A0# EDID_DATA EDID_CLK

1

+LCDVDD_CONN

+3VS_CMOS

CMOS

USB20_P3_R USB20_N3_R

+3VS

2

(60 MIL)

(40 MIL)(40 MIL)

680P_0402_50V7K

BKOFF# INVT_PWM

USB20_P3_R USB20_N3_R

+3VS_CMOS

10U

1

@

C1153

C1153 10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

C1158

EMIU@

2

JLVDS1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

ACES_88341-3001 ME@

R813 0_0805_5%

1

C1159

4.7U_0805_25V6-K

2

31

G1

32

G2

33

G3

34

G4

1 2

@

B++LEDVDD

R652

R652 100K_0402_5%

100K_0402_5%

1 2

W=60mils

1

C522

2

4.7U_0603_6.3V6K

<18>

CMOS_ON#

R1458

CMOS@R1458

CMOS@

150K_0402_5%

1

C1155

CMOS@C1155

CMOS@

0.1U_0402_16V4Z

2

CMOS@

Q70

Q70 PMV65XP_SOT23-3

PMV65XP_SOT23-3

S

G

2

+3VS +LCDVDD_CONN

D D

C C

W=60mils

1500P_0402_50V7K

<4>

C16

U72

5

4

1

APL3512ABI-TRG_SOT23-5

2

APU_ENVDD

VIN

SS

GND

2

3

EN

1

+LCDVDD_CONN

VOUT

Use APU control for WIN8

1 2

<4>

APU_INVT_PWM

B B

<18>

BKOFF#

12

R899

R899 10K_0402_5%

10K_0402_5%

<5> <5>

R1463 0_0402_5%@R1463 0_0402_5%@

USB20_P3 USB20_N3

R826

100K_0402_5%

12

680P_0402_50V7K

0_0402_5%

@ R696

@ @ R695

@

0_0402_5%

+3VS

C1160

<4> <4>

<4> <4> <4> <4> <4> <4> <4> <4>

12

R696

12

R695

L58

EMIU@L58

EMIU@

1

USB20_P3

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/04/22 2015/04/22

Compal Secret Data

USB20_N3

Deciphered Date

1

4

WCM-2012-900T_4P

2

3

2

USB20_P3_R

3

USB20_N3_R

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

LVDS CONN / Camera

VAWGA/GB

11 37Thursday, March 28, 2013

1

1.0

A

<4>

1 1

2 2

<4>

RP22

150_0804_8P4R_1%

18 27 36 45

+5VS

DAC_RED

DAC_GRN

DAC_BLU

DAC_BLU DAC_GRN DAC_RED

DAC_RED

DAC_GRN

DAC_BLU

HDMI_CLK<10,4> HDMI_DATA<10,4>

C1094

C1094 6P_0402_50V8

6P_0402_50V8

B

12

C1103

C1103 6P_0402_50V8

6P_0402_50V8

HDMI_CLK HDMI_DATA CRT_DDC_DAT _CONN CRT_DDC_CLK_ CONN

FCM1608CF-121T03 0603

1 2

EMIP@

L36

FCM1608CF-121T03 0603

1 2

L37

FCM1608CF-121T03 0603

1 2

L38

12

C1104

C1104 6P_0402_50V8

6P_0402_50V8

12

C1105

C1105 6P_0402_50V8

6P_0402_50V8

1 8 2 7 3 6 4 5

12

C1106

C1106 6P_0402_50V8

6P_0402_50V8

RP1

4.7K_8P4R_5%

C

12

C1107

C1107 6P_0402_50V8

6P_0402_50V8

+3VS

+5V_Display

1

ESDP@ C6 00

ESDP@

C600 1000P_0402_50V7K

1000P_0402_50V7K

2

RED

GREEN

BLUE

D

E

1

C529

0.1U_0402_16V7K

3 3

4 4

2

C537

0.1U_0402_16V7K

+3VS

A

+3VS

1

2

R693 4.7K_0402_5%R693 4.7K_0402_5%

R697 4.7K_0402_5%R697 4.7K_0402_5%

<4>

1 2

CRT_DDC_DAT A

CRT_DDC_CLK

CRT_VSYNC

CRT_HSYNC

CRT_DDC_DAT A

CRT_DDC_CLK

U10

1

VCC_SYNC

2

VCC_VIDEO

7

VCC_DDC

10

DDC_IN1

11

DDC_IN2

13

SYNC_IN1

15

SYNC_IN2

6

GND

TPD7S019-15DBQR_SSOP16

B

8

BYP

VIDEO1

VIDEO2

VIDEO3

DDC_OUT1

DDC_OUT2

SYNC_OUT1

SYNC_OUT2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

C23 0.22U_0402_10V6KC23 0.22U_0402_1 0V6K

3

RED

4

GREEN

5

BLUE

9

CRT_DDC_DAT _CONN

12

CRT_DDC_CLK_ CONN

14

16

JVGA_VS_U

JVGA_HS_U

1 2

R106 22_0402_5%EMIP@R106 22_0402_5%EMIP@

1 2

R107 22_0402_5%EMIP@R107 22_0402_5%EMIP@

R106 R107 for EMI

2012/04/22 2015/04/22

C

JVGA_VS

JVGA_HS

1

@

C411

Compal Secret Data

1

@

C412

2

10P_0402_50V8J

Deciphered Date

10P_0402_50V8J

RED

CRT_DDC_DAT _CONN GREEN

JVGA_HS BLUE

JVGA_VS

CRT_DDC_CLK_ CONN

+5V_Display

JCRT1

6

T49T49

T58T58

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

11

1 7

12

2 8

13

3 9

14

4 10 15

5

B

16

G

17

G

CONTE_80431-5K1- 152

ME@

Compal Electronics, Inc.

CRT CONN

VAWGA/GB

E

1.0

12 37Thursday, March 28, 2013

Compal LA-9912P VAWGA, G505, LA-9912P VAWGB Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual