Compal LA-9866P VSKAA Schematic

A

1 1

B

C

D

E

VSKAA Schematics Document

2 2

Haswell with DDR3L + Lynx Point PCH

nVIDIA N14P-GV2 (Dual Rank) nVIDIA N14M-GL

3 3

Intel Processor (Haswell) / PCH(Lynx Point)

2013-02-03 Rev 0.3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

VSKAA

1 57Monday, March 18, 2013

E

0.3

A

B

C

D

E

VGA (DDR3)

nVIDIA N14P-GV2 & N14M-GL

1 1

page 13,14,15,16,17,18,19,20,21

PCI-Express 4X Gen3 8GT/s

eDP 1X 5.4GT/s

Intel CPU Haswell (37W)

rPGA946

Memory BUS(DDR3L)

Dual Channel

1.35V DDR3L 1333/1600 MT/s

204pin DDR3-SO-DIMM X2

BANK 0, 1, 2

page 11,12

37.5mm x 37.5mm

LVDS Conn. Colay eDP

page 23

HDMI Conn.

page 25

2 2

Sub Boards

LVDS Translator RTD2132R (Single)

page 22

HDMI Re-driver PS8201&PS8401

PCIeMini Card WLAN

PCIeMini Card WIMAX

SATA HDD

page 24

PCIe port 4

page 38

USB20 port 9

page 38

SATA port 4

page 37

PCIe Gen1 1x

1.5V 5GT/s

USB20 1x

5V 480MHz

SATA Gen3 port 4

5V 6GHz(600MB/s)

page 5,6,7,8,9,10

FDI X2

2.7GT/s

Intel PCH Lynx Point HM86

FCBGA 695Balls 20mm x 20mm

DMI X4

5GT/s

USB30 2x

5V 5GT/s

USB20 2x

5V 480MHz

USB20 1x

5V 480MHz

USB20 1x

5V 480MHz

USB20 1x

5V 480MHz

USB Right

USB20 port 0,1 USB30 port 1,2

page 41

CardReader GL834L

USB20 port 3

page 40

Touch Screen

USB20 port 8

page 23

Int. Camera

USB20 port 11

page 23

GCLK

SLG3NB304VTR page 38

LAN (Port 3)+USB (Port 2)/B RTL8106E/RTL8111G

page 39

3 3

Power/B

page 44

SATA ODD

SATA port 2

page 37

SPI ROM

RTC CKT.

page 27

8MB

page 30

SATA Gen2 port 2

5V 6GHz(600MB/s)

Debug Port

page 45

page 27,28,29,30,31,32,33,34,35,36

LPC BUS

3.3V 33 MHz

KB9012

page 44

HD Audio

3.3V 24MHz

HDA Codec

ALC259 (w/o S&M) ALC269 (w/ S&M)

page 42

CRT

page 26

DC/DC Interface CKT.

page 46

Power Circuit DC/DC

4 4

page 47,48,49,50,51,52,53,54,55

Touch Pad

Int.KBD

page 45page 45

G-Sensor

page 37

SPK Conn

page 43

JLINE & JEXMIC

page 43

Power On/Off CKT.

page 45

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

VSKAA

2 57Monday, March 18, 2013

E

0.3

5

4

3

2

1

DESIGN CURRENT 0.1A

B+

D D

Ipeak=8.13A, Imax=5.69A, Iocp min=8.7

DESIGN CURRENT 5A

+3VL

+5VALW

SUSP#

TPS22966

RT8243AZQW

Ipeak=5A, Imax=3.5A, Iocp min=6.2A

SUSP#

TPS22966

WOL_EN#

P-CHANNEL

AO-3413

LCD_ENVDD

APL3512

DGPU_PWR_EN

C C

P-CHANNEL

AO-3413

PJ6

DESIGN CURRENT 4A

DESIGN CURRENT 5A

DESIGN CURRENT 330mA

DESIGN CURRENT 4A

DESIGN CURRENT 1.5A

DESIGN CURRENT 60mA

DESIGN CURRENT 2A

+5VS

+3VALW

+3V_LAN

+3VS

+LCD_VDD

+3VS_DGPU

+3V_WLAN

VR_ON

TPS51631

DESIGN CURRENT 55A

+CPU_CORE

SUSP#

B B

TPS51212

SUSP#

TPS51212

Ipeak=20.53A, Imax=14.37A, Iocp min=23.91A

VGA_PWROK

P-CHANNEL

AO-3416

VGA_PWROK

N-CHANNEL

FDS6676AS

DESIGN CURRENT 60mA

DESIGN CURRENT 2A

DESIGN CURRENT 8.6A

+1.05VS_VCCP

+1.05VS_DGPU

+1.5VS

+VRAM_1.5VS

SYSON

RT8207M

Ipeak=15A, Imax=10.5A, Iocp min=18A

0.675VR_EN

A A

DESIGN CURRENT 10A

DESIGN CURRENT 1.5A

+1.35V

+0.675VS

DGPU_PWR_EN

NCP81172

5

Ipeak=33.8A, Imax=23.4A, Iocp min=40A

4

DESIGN CURRENT 20.5A

+VGA_CORE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Power Tree

VSKAA

1

3 57Monday, March 18, 2013

0.3

A

Voltage Rails

power plane

1 1

State

( O MEANS ON X MEANS OFF )

+RTCVCC

B+

+5VL

+3VL

+5VALW

+3VALW

+VSB

B

Platform

+1.35V

+5VS

+3VS

+1.8VS

+1.5VS

+CPU_CORE

+VGA_CORE

+VRAM_1.5VS

+3VS_DGPU

+1.05VS_DGPU

Chief River

BTO Option Table

Function

C

SKU CPU PCH

Ivy Bridge i3 (CPUI3@) Ivy Bridge i5 (CPUI5@)

SKU MIC

HM77C1(HM77@) HM77C1_R1(HM77R1@) HM77C1_R3(HM77R3@)

LAN

D

E

VGA

nVIDIA N13P-GL (N13PGL@)

description

explain

BTO

S0

S1

S3

2 2

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

O

X

O

X

O

X

O

X X

X

X X

OO

X

Function

description

X

explain

BTO

Function

PCH SM Bus Address

Power

+3VS

Device

DDR SO-DIMM 0

DDR SO-DIMM 1

HEX

Address

1010 0000 bA0 H

1010 0100 bA4 H

description

explain

BTO

Function

3 3

description

explain

BTO

EC SM Bus1 Address

Device Address Address

+3VL

EC SM Bus2 Address

HEX HEX

0001 0110 bSmart Battery

16 H

12 HSmart Charger 0001 0010 b+3VL

PowerPower

+3VS

HEXDevice AddressPower

Device

96 H

NVIDIA GPU 1001 1010 b

9E H

STATE

Full ON

1001 0110 bPCH

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LOW LOWLOW

SIGNAL

SLP_S3# SLP_S4# SLP_S5#

HIGH HIGHHIGH

LOW

LOW LOW

OW

HIGH HIGHHIGH

HIGH

LOW LOWL

HIGH

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

VSKAA

4 57Monday, March 18, 2013

E

0.3

A

B

C

D

E

+VCCIO_OUT

RC44 62_0402_5%RC44 62_0402_5%

RC45 10K_0402_5%RC45 10K_0402_5%

12

H_PROCHOT#

H_PWRGOOD

H_DRAMRST#

@

1 2

CC34 180P_0402_50V8J

by ESD requestion and place near CPU

DDR3 Compensation CAD Note:

Haswell rPGA EDS

1 1

2 2

Please place near JCPU

If no use eDP, please stuff them.

@

ESD@

@

@ESD@

1 2

12

DRAMPWROK

CC621000P_0402_50V7K

H_PWRGOOD

CC63100P_0402_50V8J

CC701000P_0402_50V7K

CC671000P_0402_50V7K

CC661000P_0402_50V7K

CC2100P_0402_50V8J

H_PECI

H_PM_SYNC

CPU_PLTRST#

H_THERMTRIP#

H_PROCHOT#<44,47>

135 MHz

35 MHz

1

100 MHz

H_PECI<44>

1 2

RC60 56_0402_5%RC60 56_0402_5%

H_THERMTRIP#<33>

H_PM_SYNC<28> H_PWRGOOD<33> DRAMPWROK<28> CPU_PLTRST#<33>

CLK_CPU_EDP#<29> CLK_CPU_EDP<29> CLK_CPU_SSC_EDP#<29> CLK_CPU_SSC_EDP<29> CLK_CPU_DMI#<29> CLK_CPU_DMI<29>

T2 PAD

TP@

H_CATERR#

H_PECI

H_PROCHOT#_R

H_PM_SYNC H_PWRGOOD DRAMPWROK CPU_PLTRST#

CLK_CPU_SSC_EDP# CLK_CPU_SSC_EDP

JCPUB

AP32

SKTOCC

AN32

CATERR

AR27

PECI

AK31

FC_AK31

AM30

PROCHOT

AM35

THERMTRIP

AT28

PM_SYNC

AL34

PWRGOOD

AC10

SM_DRAMPWROK

AT26

PLTRSTIN

G28

DPLL_REF_CLKN

H28

DPLL_REF_CLKP

F27

SSC_DPLL_REF_CLKN

E27

SSC_DPLL_REF_CLKP

D26

BCLKN

E26

BCLKP

Conn@

Haswell rPGA EDS

MISC

THERMAL

PWR

TEL_HASWELL_HASWELL

IN

DDR3

CLOCK

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 SM_DRAMRST

JTAG

BPM_N_0 BPM_N_1 BPM_N_2 BPM_N_3 BPM_N_4 BPM_N_5 BPM_N_6 BPM_N_7

2 OF 9

PRDY PREQ

TCK TMS

TRST

TDO DBR

AP3 AR3 AP2 AN3

AR29 AT29 AM34 AN33 AM33 AM31

TDI

AL33 AP33

AR30 AN31 AN29 AP31 AP30 AN28 AP29 AP28

Trace width=12~15 mil, Spacing=20 mils Max trace length= 500 mil

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 H_DRAMRST#

XDP_PRDY# XDP_PREQ# XDP_TCLK XDP_TMS XDP_TRST# XDP_TDI XDP_TDO XDP_DBRESET#

1 2

RC56 100_0402_1%RC56 100_0402_1%

1 2

RC59 75_0402_1%RC59 75_0402_1%

1 2

RC61 100_0402_1%RC61 100_0402_1%

Close to CPU side

H_DRAMRST# <11>

T42PAD TP@T42PAD TP@ T43PAD TP@T43PAD TP@

T19PAD TP@T19PAD TP@

T18PAD TP@T18PAD TP@

T35PAD TP@T35PAD TP@

XDP_DBRESET#

1 2

CC3 100P_0402_50V8J

XDP Connector reserve test point

@ESD@

PU/PD for JTAG signals

+1.05VS_VCCP

SM_DRAMPWROK for nonsupport Deep S3

+1.35V

12

RC16

1.8K_0402_1%

DRAMPWROK

12

RC14

3.3K_0402_1%

3 3

XDP_TDO

XDP_TCLK

XDP_TRST#

1 2

RC49 51_0402_1%RC49 51_0402_1%

1 2

RC42 51_0402_1%RC42 51_0402_1%

1 2

RC41 51_0402_1%RC41 51_0402_1%

ESD@

CC68100P_0402_50V8J

ESD@

CC69100P_0402_50V8J

ESD@

CC83100P_0402_50V8J

+1.05VS_VCCP

Buffered Rest to CPU

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

FAN Control Circuit

+3VS

12

R2

R2 10K_0402_5%

10K_0402_5%

+5VS

FAN_SPEED1<44>

1A

1 2

D

R1

0_0603_5%

+FAN1

1

C4

0.01U_0402_25V7K

@

2

Title

Size Document Number Rev

Date: Sheet of

Custom

FANPWM<44>

+FAN1

12

D1

BAS16_SOT23-3

Compal Electronics, Inc.

Haswell_JTAG/XDP/FAN

VSKAA

1

C5

2

10U_0603_6.3V6M

E

JFAN

Conn@JFAN

Conn@

6

G6

5

G5

4

3

2

1

ACES_50273-0040N-001

5 57Monday, March 18, 2013

0.3

A

1 1

2 2

3 3

DMI_PTX_CRX_N0<28> DMI_PTX_CRX_N1<28> DMI_PTX_CRX_N2<28> DMI_PTX_CRX_N3<28>

DMI_PTX_CRX_P0<28> DMI_PTX_CRX_P1<28> DMI_PTX_CRX_P2<28> DMI_PTX_CRX_P3<28>

DMI_CTX_PRX_N0<28> DMI_CTX_PRX_N1<28> DMI_CTX_PRX_N2<28> DMI_CTX_PRX_N3<28>

DMI_CTX_PRX_P0<28> DMI_CTX_PRX_P1<28> DMI_CTX_PRX_P2<28> DMI_CTX_PRX_P3<28>

FDI_CSYNC<28> FDI_INT<28>

B

Haswell rPGA EDS

JCPUA

PEG_RCOMP

D21 C21 B21 A21

D20 C20 B20 A20

D18 C17 B17 A17

D17 C18 B18 A18

H29

J29

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

FDI_CSYNC DISP_INT

IN

DMI FDI

TEL_HASWELL_HASWELLConn@

PEG_RXN_0 PEG_RXN_1 PEG_RXN_2 PEG_RXN_3 PEG_RXN_4 PEG_RXN_5 PEG_RXN_6

PEG

PEG_RXN_7 PEG_RXN_8

PEG_RXN_9 PEG_RXN_10 PEG_RXN_11 PEG_RXN_12 PEG_RXN_13 PEG_RXN_14 PEG_RXN_15

PEG_RXP_0

PEG_RXP_1

PEG_RXP_2

PEG_RXP_3

PEG_RXP_4

PEG_RXP_5

PEG_RXP_6

PEG_RXP_7

PEG_RXP_8

PEG_RXP_9

PEG_RXP_10 PEG_RXP_11 PEG_RXP_12 PEG_RXP_13 PEG_RXP_14 PEG_RXP_15

PEG_TXN_0

PEG_TXN_1

PEG_TXN_2

PEG_TXN_3

PEG_TXN_4

PEG_TXN_5

PEG_TXN_6

PEG_TXN_7

PEG_TXN_8

PEG_TXN_9

PEG_TXN_10 PEG_TXN_11 PEG_TXN_12 PEG_TXN_13 PEG_TXN_14 PEG_TXN_15

PEG_TXP_0

PEG_TXP_1

PEG_TXP_2

PEG_TXP_3

PEG_TXP_4

PEG_TXP_5

PEG_TXP_6

PEG_TXP_7

PEG_TXP_8

PEG_TXP_9

PEG_TXP_10 PEG_TXP_11 PEG_TXP_12 PEG_TXP_13 PEG_TXP_14 PEG_TXP_15

1 OF 9

C

E23

PEG_COMP

M29

PCIE_GTX_C_CRX_N0

K28

PCIE_GTX_C_CRX_N1

M31

PCIE_GTX_C_CRX_N2

L30

PCIE_GTX_C_CRX_N3

M33 L32 M35 L34 E29 D28 E31 D30 E35 D34 E33 E32 L29

PCIE_GTX_C_CRX_P0

L28

PCIE_GTX_C_CRX_P1

L31

PCIE_GTX_C_CRX_P2

K30

PCIE_GTX_C_CRX_P3

L33 K32 L35 K34 F29 E28 F31 E30 F35 E34 F33 D32 H35

PCIE_CTX_GRX_N0

H34

PCIE_CTX_GRX_N1

J33

PCIE_CTX_GRX_N2

H32

PCIE_CTX_GRX_N3

J31 G30 C33 B32 B31 A30 B29 A28 B27 A26 B25 A24 J35

PCIE_CTX_GRX_P0

G34

PCIE_CTX_GRX_P1

H33

PCIE_CTX_GRX_P2

G32

PCIE_CTX_GRX_P3

H31 H30 B33 A32 C31 B30 C29 B28 C27 B26 C25 B24

RC1

24.9_0402_1%

+VCOMP_OUT

CAD Note:

12

Trace width=12 mils ,Spacing=15mil Max length= 400 mils.

1 2

CC8 0.22U_0402_16V7KCC8 0.22U_0402_16V7K

1 2

CC11 0.22U_0402_16V7KCC11 0.22U_0402_16V7K

1 2

CC16 0.22U_0402_16V7KCC16 0.22U_0402_16V7K

1 2

CC20 0.22U_0402_16V7KCC20 0.22U_0402_16V7K

1 2

CC10 0.22U_0402_16V7KCC10 0.22U_0402_16V7K

1 2

CC5 0.22U_0402_16V7KCC5 0.22U_0402_16V7K

1 2

CC6 0.22U_0402_16V7KCC6 0.22U_0402_16V7K

1 2

CC7 0.22U_0402_16V7KCC7 0.22U_0402_16V7K

D

PCIE_GTX_C_CRX_N[0..3] <13>

PCIE_GTX_C_CRX_P[0..3] <13>

PCIE_CTX_C_GRX_N0 PCIE_CTX_C_GRX_N1 PCIE_CTX_C_GRX_N2 PCIE_CTX_C_GRX_N3

PCIE_CTX_C_GRX_P0 PCIE_CTX_C_GRX_P1 PCIE_CTX_C_GRX_P2 PCIE_CTX_C_GRX_P3

E

PCIE_CTX_C_GRX_N[0..3] <13>

PCIE_CTX_C_GRX_P[0..3] <13>

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Haswell_DMI/PEG/FDI

VSKAA

6 57Monday, March 18, 2013

E

0.3

A

B

C

D

E

DDR_A_D[0..63]<11>

JCPUC

1 1

2 2

3 3

+V_SM_VREF +VREF_DQA_M3 +VREF_DQB_M3

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AR15 AT14 AM14 AN14 AT15 AR14 AN15 AM15

AM9

AN9

AM8

AN8 AR9 AT9 AR8 AT8

AK9

AK6

AJ10

AK10

AK7 AF4 AF5 AF1 AF2 AG4 AG5 AG1 AG2

D12

D11

AM3

AJ9

AJ6

AJ7

J1 J2

J5 H5 H2 H1

J4 H4 F2 F1 D2 D3 D1 F3 C3 B3 B5 E6 A5 D6 D5 E5 B6 A6

E12

B11 A11 E11

B12 A12

F16 F13

JCPUC

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63 SM_VREF SA_DIMM_VREFDQ SB_DIMM_VREFDQ

TEL_HASWELL_HASWELLConn@

IN

Haswell rPGA EDS

SA_CK_N_0 SA_CK_P_0

SA_CKE_0 SA_CK_N_1 SA_CK_P_1

SA_CKE_1 SA_CK_N_2 SA_CK_P_2

SA_CKE_2 SA_CK_N_3 SA_CK_P_3

SA_CKE_3

SA_CS_N_0 SA_CS_N_1 SA_CS_N_2 SA_CS_N_3

SA_ODT_0

SA_ODT_1

SA_ODT_2

SA_ODT_3

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS

SA_WE

SA_CAS

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14 SA_MA_15

SA_DQS_N_0 SA_DQS_N_1 SA_DQS_N_2 SA_DQS_N_3 SA_DQS_N_4 SA_DQS_N_5 SA_DQS_N_6 SA_DQS_N_7 SA_DQS_P_0 SA_DQS_P_1 SA_DQS_P_2 SA_DQS_P_3 SA_DQS_P_4 SA_DQS_P_5 SA_DQS_P_6 SA_DQS_P_7

3 OF 9

RSVD

VSS

AC7 U4 V4 AD9 U3 V3 AC9 U2 V2 AD8 U1 V1 AC8

M7 L9 M9 M10 M8 L7 L8 L10 V5 U5 AD1

V10 U6 U7 U8

V8 AC6 V9 U9 AC5 AC4 AD6 AC3 AD5 AC2 V6 AC1 AD4 V7 AD3 AD2

AP15 AP8 AJ8 AF3 J3 E2 C5 C11 AP14 AP9 AK8 AG3 H3 E3 C6 C12

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8

DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7 DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDRA_CLK0# <11> DDRA_CLK0 <11> DDRA_CKE0 <11> DDRA_CLK1# <11> DDRA_CLK1 <11> DDRA_CKE1 <11>

DDRA_SCS0# <11> DDRA_SCS1# <11>

DDRA_ODT0 <11> DDRA_ODT1 <11>

DDR_A_BS0 <11> DDR_A_BS1 <11> DDR_A_BS2 <11>

DDR_A_RAS# <11> DDR_A_WE# <11> DDR_A_CAS# <11>

DDR_A_MA[0..15] <11>

DDR_A_DQS#[0..7] <11>

DDR_A_DQS[0..7] <11>

DDR_B_D[0..63]<12>

Haswell rPGA EDS

RSVD

SB_CKN0

SB_CK0

SB_CKE_0

SB_CKN1

SB_CK1

SB_CKE_1

SB_CKN2

SB_CK2

SB_CKE_2

SB_CKN3

SB_CK3

SB_CKE_3

SB_CS_N_0 SB_CS_N_1 SB_CS_N_2 SB_CS_N_3

SB_ODT_0 SB_ODT_1 SB_ODT_2 SB_ODT_3

SB_BS_0 SB_BS_1 SB_BS_2

SB_RAS

SB_WE

SB_CAS

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14 SB_MA_15

SB_DQS_N_0 SB_DQS_N_1 SB_DQS_N_2 SB_DQS_N_3 SB_DQS_N_4 SB_DQS_N_5 SB_DQS_N_6 SB_DQS_N_7 SB_DQS_P_0 SB_DQS_P_1 SB_DQS_P_2 SB_DQS_P_3 SB_DQS_P_4 SB_DQS_P_5 SB_DQS_P_6 SB_DQS_P_7

4 OF 9

VSS

AG8 Y4 AA4 AF10 Y3 AA3 AG10 Y2 AA2 AG9 Y1 AA1 AF9

P4 R2 P3 P1

R4 R3 R1 P2 R7 P8 AA9

R10 R6 P6 P7

R8 Y5 Y10 AA5 Y7 AA6 Y6 AA7 Y8 AA10 R9 Y9 AF7 P9 AA8 AG7

AP18 AP11 AP5 AJ3 L3 H9 C8 C14 AP17 AP12 AP6 AK3 M3 H8 C9 C15

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8

DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0

DDR_B_DQS1

DDR_B_DQS2

DDR_B_DQS3

DDR_B_DQS4

DDR_B_DQS5

DDR_B_DQS6

DDR_B_DQS7

DDRB_CLK0# <12> DDRB_CLK0 <12> DDRB_CKE0 <12> DDRB_CLK1# <12> DDRB_CLK1 <12> DDRB_CKE1 <12>

DDRB_SCS0# <12> DDRB_SCS1# <12>

DDRB_ODT0 <12> DDRB_ODT1 <12>

DDR_B_BS0 <12> DDR_B_BS1 <12> DDR_B_BS2 <12>

DDR_B_RAS# <12> DDR_B_WE# <12> DDR_B_CAS# <12>

DDR_B_MA[0..15] <12>

DDR_B_DQS#[0..7] <12>

DDR_B_DQS[0..7] <12>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AR18 AT18 AM17 AM18 AR17 AT17 AN17 AN18 AT12 AR12 AN12 AM11 AT11 AR11 AM12 AN11

AR5 AR6 AM5 AM6 AT5 AT6 AN5 AN6

AK4

AM1 AN1 AK2 AK1

G10

D15

D14

AJ4

AJ1 AJ2

J10

E15

A15 B15 E14

A14 B14

L2

M2

L4

M4

L1

M1

L5 M5 G7

J8 G8 G9

J7

J9

A8

B8

A9

B9 D8

E8 D9

E9

JCPUD

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

TEL_HASWELL_HASWELLConn@

IN

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Haswell_DDR3

VSKAA

7 57Monday, March 18, 2013

E

0.3

A

1 1

B

C

D

E

COMPENSATION PU FOR eDP

+VCOMP_OUT

12

RC2

24.9_0402_1%

Haswell rPGA EDS

H_HDMI_TX2-<25> H_HDMI_TX2+<25> H_HDMI_TX1-<25> H_HDMI_TX1+<25> H_HDMI_TX0-<25> H_HDMI_TX0+<25> H_HDMI_TXC-<25> H_HDMI_TXC+<25>

2 2

3 3

T28 U28 T30 U30 U29 V29 U31 V31

T34 U34 U35 V35 U32 T32 U33 V33

P29 R29 N28 P28 P31 R31 N30 P30

DDIB_TXBN_0 DDIB_TXBP_0 DDIB_TXBN_1 DDIB_TXBP_1 DDIB_TXBN_2 DDIB_TXBP_2 DDIB_TXBN_3 DDIB_TXBP_3

DDIC_TXCN_0 DDIC_TXCP_0 DDIC_TXCN_1 DDIC_TXCP_1 DDIC_TXCN_2 DDIC_TXCP_2 DDIC_TXCN_3 DDIC_TXCP_3

DDID_TXDN_0 DDID_TXDP_0 DDID_TXDN_1 DDID_TXDP_1 DDID_TXDN_2 DDID_TXDP_2 DDID_TXDN_3 DDID_TXDP_3

IN

JCPUH

eDP

EDP_RCOMP

EDP_DISP_UT IL

TEL_HASWELL_HASWELLConn@

EDP_AUXN EDP_AUXP

EDP_HPD

EDP_TXN_0 EDP_TXP_0 EDP_TXN_1 EDP_TXP_1

FDI_TXN_0

FDI_TXP_0

FDI_TXN_1

FDI_TXP_1

DDI

8 OF 9

M27 N27 P27 E24 R27

P35 R35 N34 P34 P33 R33 N32 P32

H_EDP_HPD# EDP_RCOMP

T12PAD TP@T12PAD TP@

H_EDP_AUXN <22> H_EDP_AUXP <22>

H_EDP_TXN0 <22> H_EDP_TXP0 <22> H_EDP_TXN1 <22> H_EDP_TXP1 <22> FDI_CTX_PRX_N0 <28> FDI_CTX_PRX_P0 <28> FDI_CTX_PRX_N1 <28> FDI_CTX_PRX_P1 <28>

24.9_0402_1%

EDP_RCOMP

CAD Note:Trace width=20 mils ,Spacing=25mil, Max length=100 mils.

+VCCIO_OUT

12

RC5

RC5 10K_0402_5%

10K_0402_5%

H_EDP_HPD#

1

OUT

H_EDP_HPD<22,23>

2

IN

GND

QC1

DTC124EKAT146_SC59-3

3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Haswell_DDI/eDP

VSKAA

8 57Monday, March 18, 2013

E

0.3

A

B

C

D

E

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCC VCC VCC VCC

VCC VCC

AA26 AA28 AA34 AA30 AA32 AB26 AB29 AB25 AB27 AB28 AB30 AB31 AB33 AB34 AB32 AC26 AB35 AC28 AD25 AC30 AD28 AC32 AD31 AC34 AD34 AD26 AD27 AD29 AD30 AD32 AD33 AD35 AE26 AE32 AE28 AE30 AG28 AG34 AE34 AF25 AF26 AF27 AF28 AF29 AF30 AF31 AF32 AF33 AF34 AF35 AG26 AH26 AH29 AG30 AG32 AH32 AH35 AH25 AH27 AH28 AH30 AH31 AH33 AH34 AJ25 AJ26 AJ27 AJ28 AJ29 AJ30 AJ31 AJ32 AJ33 AJ34 AJ35 G25 H25 J25 K25 L25 M25 N25 P25 R25 T25

U25 U26 V25 V26

W26 W27

+CPU_CORE

Haswell rPGA EDS

JCPUE

1 1

2 2

VCC_SENSE

VCCSENSE<54>

VSSSENSE<10,54,9>

+CPU_CORE

RC93

RC93 100_0402_1%

100_0402_1%

1 2

RC95

RC95 100_0402_1%

100_0402_1%

1 2

Reserve short pad on power side

VCCSENSE

VSSSENSE

lose to CPU

C

VSSSENSE <10,54,9>

+1.35V

CC51

10U_0603_6.3V6M

CC64

22U_0805_6.3V6M

VDDQ DECOUPLING

10U_0603_6.3V6M

1

CC52

2

22U_0805_6.3V6M

1

CC73

2

10U_0603_6.3V6M

1

CC55

CC54

2

10U_0603_6.3V6M

22U_0805_6.3V6M

1

CC74

CC75

2

22U_0805_6.3V6M

1

CC56

2

10U_0603_6.3V6M

1

CC76

2

22U_0805_6.3V6M

10U_0603_6.3V6M

1

CC57

CC58

2

10U_0603_6.3V6M

22U_0805_6.3V6M

1

CC77

CC78

2

22U_0805_6.3V6M

10U_0603_6.3V6M

1

CC59

CC60

2

10U_0603_6.3V6M

22U_0805_6.3V6M

1

CC80

CC79

2

22U_0805_6.3V6M

10U_0603_6.3V6M

1

CC61

2

22U_0805_6.3V6M

1

CC81

CC82

2

22U_0805_6.3V6M

12

CC53

47U_0805_6.3V6M

1

2

+CPU_CORE

+1.35V

Reserve 0.1u to avoid noise

+VCCIO_OUT +VCCIO_OUT

0.1U_0402_10V7K

1 2

CC49

@

12

RC89

RC89 75_0402_5%

75_0402_5%

VR_SVID_ALRT#<54> VR_SVID_CLK<54> VR_SVID_DAT<54>

Pull high resistor on VR side

3 3

4 4

0.1U_0402_10V7K

1 2

CC50

@

1 2

RC96 43_0402_1%RC96 43_0402_1%

1 2

RC88 0_0402_5%Rshort@RC88 0_0402_5%Rshort@

1 2

RC92 0_0402_5%Rshort@RC92 0_0402_5%Rshort@

12

RC91

RC91 130_0402_5%

130_0402_5%

H_CPU_SVIDALRT#

H_CPU_SVIDCLK H_CPU_SVIDDAT

+VCCIO_OUT+1.05VS_VCCP

@

1 2

RC10 0_0603_5%

RESISTOR STUFFING OPTIONS ARE PROVIDED FOR TESTING PURPOSES

+VCCIO_OUT

+VCOMP_OUT

+CPU_CORE

VCCSENSE

T13 PAD

TP@

H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT

T57 PADTP@T57 PADTP@

T14 PADTP@T14 PADTP@ T15 PADTP@T15 PADTP@ T16 PADTP@T16 PADTP@ T17 PADTP@T17 PADTP@

K27

V27

AB11

AB2 AB5 AB8

AE11

AE2 AE5 AE8

AH11

K11 N11

W11

N26 K26

AL27

AK27

AL35

E17

AN35

A23

W32

AL16

AL13

AM28 AM29

AL28

AP35

H27 AP34 AT35 AR35 AR32

AL26

AT34

AL22 AT33 AM21 AM25 AM22 AM20 AM24

AL19 AM23 AT32

Y25 Y26 Y27 Y28 Y29 Y30 Y31 Y32 Y33 Y34 Y35

L27 T27

N8

T11

T2 T5 T8

W2 W5 W8

F22

J27

JCPUE

RSVD RSVD RSVD RSVD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VDDQ

VDDQ VDDQ

4

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

RSVD VCC RSVD RSVD

VCC_SENSE RSVD VCCIO_OUT RSVD VCOMP_OUT RSVD RSVD RSVD RSVD

VIDALERT VIDSCLK VIDSOUT

VSS PWR_DEBUG VSS RSVD_TP RSVD_TP RSVD_TP RSVD_TP VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

IN

.2A

TEL_HASWELL_HASWELLConn@

VCC 55A

5 OF 9

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Haswell_POWER

VSKAA

9 57Monday, March 18, 2013

E

0.3

A

B

C

D

E

Haswell rPGA EDS

A10 A13 A16 A19 A22 A25 A27 A29

A3

AA11 AA25 AA27 AA31 AA29

AB10 AA33 AA35

AC25 AC27

AC11 AD11 AC29 AC31 AC33 AC35

AD7

AE1 AE10 AE25 AE29

AE3 AE27 AE35

AE4

AE6

AE7

AE9 AF11

AF6

AF8 AG11 AG25 AE31 AG31 AE33

AG6

AH1 AH10

AH2 AG27 AG29

AH3 AG33 AG35

AH4

AH5

AH6

AH7

AH8

AH9

AJ11

AK11 AK25 AK26 AK28 AK29 AK30 AK32

A31 A33

A4 A7

AB1

AB3

AB4 AB6 AB7 AB9

AJ5

E19

1 1

2 2

3 3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

JCPUF

NTEL_HASWELL_HASWELLConn@

I

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

6 OF 9

AK34 AK5 AL1 AL10 AL11 AL12 AL14 AL15 AL17 AL18 AL2 AL20 AL21 AL23 E22 AL3 AL4 AL5 AL6 AL7 AL8 AL9 AM10 AM13 AM16 AM19 E25 AM32 AM4 AM7 AN10 AN13 AN16 AN19 AN2 AN21 AN24 AN27 AN30 AN34 AN4 AN7 AP1 AP10 AP13 AP16 AP19 AP4 AP7 W25 AR10 AR13 AR16 AR19 AR2 AR22 AR25 AR28 AR31 AR34 AR4 AR7 AT10 AT13 AT16 AT19 AT21 AT24 AT27 AT3 AT30 AT4 AT7 B10 B13 B16 B19 B2 B22

Haswell rPGA EDS

B34

VSS

B4

VSS

B7

VSS

C1

VSS

C10

VSS

C13

VSS

C16

VSS

C19

VSS

C2

VSS

C22

VSS

C24

VSS

C26

VSS

C28

VSS

C30

VSS

C32

VSS

C34

VSS

C4

VSS

C7

VSS

D10

VSS

D13

VSS

D16

VSS

D19

VSS

D22

VSS

D25

VSS

D27

VSS

D29

VSS

D31

VSS

D33

VSS

D35

VSS

D4

VSS

D7

VSS

E1

VSS

E10

VSS

E13

VSS

E16

VSS

E4

VSS

E7

VSS

F10

VSS

F11

VSS

F12

VSS

F14

VSS

F15

VSS

F17

VSS

F18

VSS

F20

VSS

F21

VSS

F23

VSS

F24

VSS

F26

VSS

F28

VSS

F30

VSS

F32

VSS

F34

VSS

F4

VSS

F6

VSS

F7

VSS

F8

VSS

F9

VSS

G1

VSS

G11

VSS

G2

VSS

G27

VSS

G29

VSS

G3

VSS

G31

VSS

G33

VSS

G35

VSS

G4

VSS

G5

VSS

H10

VSS

H26

VSS

H6

VSS

H7

VSS

J11

VSS

J26

VSS

J28

VSS

J30

VSS

J32

VSS

J34

VSS

J6

VSS

K1

VSS

NTEL_HASWELL_HASWELL

I

Conn@

JCPUG

VSS_SENSE

RSVD

7 OF 9

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

K10 K2 K29 K3 K31 K33 K35 K4 K5 K7 K8 K9 L11 L26 L6 M11 M26 M28 M30 M32 M34 M6 N1 N10 N2 N29 N3 N31 N33 N35 N4 N5 N6 N7 N9 P11 P26 P5 R11 R26 R28 R30 R32 R34 R5 T1 T10 T29 T3 T31 T33 T35 T4 T6 T7 T9 U11 U27 V11 V28 V30 V32 V34 W1 W10 W3 W35 W4 W6 W7 W9 Y11 H11 AL24 F19 T26 AK35 AK33

T20 PADTP@T20 PADTP@ T21 PADTP@T21 PADTP@

T22 PADTP@T22 PADTP@ T23 PADTP@T23 PADTP@

T24 PADTP@T24 PADTP@ T25 PADTP@T25 PADTP@

+CPU_CORE

T26 PADTP@T26 PADTP@ T27 PADTP@T27 PADTP@

T28 PADTP@T28 PADTP@

T29 PADTP@T29 PADTP@ T30 PADTP@T30 PADTP@

T41 PADTP@T41 PADTP@ T44 PADTP@T44 PADTP@

T40 PADTP@T40 PADTP@

VSSSENSE <54,9>

CPU_TESTLO_G26

CPU_TESTLO

CFG2

CFG4 CFG5 CFG6

1 2

RC100 49.9_0402_1%RC100 49.9_0402_1%

1 2

RC101 49.9_0402_1%RC101 49.9_0402_1%

1 2

RC102 49.9_0402_1%RC102 49.9_0402_1%

Haswell rPGA EDS

AT1

RSVD_TP

AT2

RSVD_TP

AD10

RSVD

A34

RSVD_TP

A35

RSVD_TP

W29

RSVD_TP

W28

RSVD_TP

G26

TESTLO_G26

W33

RSVD

AL30

RSVD

AL29

RSVD

F25

VCC

C35

RSVD_TP

B35

RSVD_TP

AL25

RSVD_TP

W30

RSVD_TP

W31

RSVD_TP

W34

TESTLO

AT20

CFG_0

AR20

CFG_1

AP20

CFG_2

AP22

CFG_3

AT22

CFG_4

AN22

CFG_5

AT25

CFG_6

AN23

CFG_7

AR24

CFG_8

AT23

CFG_9

AN20

CFG_10

AP24

CFG_11

AP26

CFG_12

AN25

CFG_13

AN26

CFG_14

AP25

CFG_15

NTEL_HASWELL_HASWELLConn@

I

CPU_TESTLO_G26

CPU_TESTLO

CFG_RCOMP

JCPUI

RSVD_TP RSVD_TP RSVD_TP RSVD_TP

CFG_RCOMP

CFG_16 CFG_18 CFG_17 CFG_19

RSVD

FC_G6

RSVD RSVD RSVD RSVD RSVD

RSVD

RSVD RSVD

RSVD

RSVD_TP

RSVD_TP RSVD_TP

RSVD RSVD

VSS VSS

9 OF 9

C23 B23 D24 D23

AT31

CFG_RCOMP

AR21 AR23 AP21 AP23

AR33 G6 AM27 AM26 F5 AM2 K6

E18

U10 P10

B1

NC

A2 AR1

E21 E20

AP27 AR26

AL31 AL32

CFG Straps for Processor

(CFG[17:0] internal pull high 5~15K to VCCIO)

T31PAD TP@T31PAD TP@ T32PAD TP@T32PAD TP@ T33PAD TP@T33PAD TP@ T34PAD TP@T34PAD TP@

T53PAD TP@T53PAD TP@ T54PAD TP@T54PAD TP@

PEG Static Lane Reversal - CFG2 is for the 16x

T55PAD TP@T55PAD TP@ T56PAD TP@T56PAD TP@

T39PAD TP@T39PAD TP@

T36PAD TP@T36PAD TP@

T37PAD TP@T37PAD TP@ T38PAD TP@T38PAD TP@

CFG2

Embedded Display Port Presence Strap

CFG4

CFG2

1: Normal Operation; Lane # definition

*

atches socket pin map definition

m

0:Lane Reversed

CFG4

1 : Disabled; No Physical Display Port attached to Embedded Display Port

0 : Enabled; An external Display Port

*

evice is connected to the Embedded

d Display Port

CFG6

CFG5

1K_0402_1%

RC83

12

RC79

RC79 1K_0402_1%

1K_0402_1%

@

12

RC82

RC82 1K_0402_1%

1K_0402_1%

12

RC84

RC84 1K_0402_1%

1K_0402_1%

@

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2

*

disabled

CFG[6:5]

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

D

10: x8, x8 - Device 1 function 1 enabled; function 2 disabled

0

1: Reserved - (Device 1 function 1 disabled;

function 2 enabled)

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Haswell_GND/RSVD/CFG

VSKAA

10 57Monday, March 18, 2013

E

0.3

A

+VREF_DQA

1

CD1

0.1U_0402_10V7K

2

Close to JDDR3L.1

1 1

DDRA_CKE0<7>

DDR_A_BS2<7>

2 2

DDRA_CLK0<7>

DDRA_CLK0#<7>

DDR_A_BS0<7>

DDR_A_WE#<7>

DDR_A_CAS#<7>

DDRA_SCS1#<7>

3 3

+3VS

4 4

CD26

DDR_A_D0 DDR_A_D1

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_D26 DDR_A_D27

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

DDR_A_MA10

DDR_A_MA13

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_D58 DDR_A_D59

1

2

0.1U_0402_10V7K

SPD setting (SA0, SA1) PU/PD by Channel A/B

->Channel A 00

->Channel B 01

A

+0.675VS

+1.35V

3 5 7

9 11 13 15 17 19 21 23 25 27

33 35

39 41

45 47 49 51 53 55 57 59

63

67 69

73 75 77 79 81 83 85 87 89 91 93 95 97 99

101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205

JDDR3L

VREF_DQ1VSS1 VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS129RESET# VSS1131VSS12 DQ10 DQ11 VSS1337VSS14 DQ16 DQ17 VSS1543VSS16 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS2261DQS#3 DM3 VSS2365VSS24 DQ26 DQ27 VSS2571VSS26

CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1

G1

LCN_DAN06-K4406-0103_204P

C

onn@

DQ4 DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6 DQ7

VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA SCL

VTT2

A15 A14

A11

A7

A6 A4

A2 A0

S0#

G2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

+1.35V

DDR_A_D4 DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

SM_DRAMRST#

DDR_A_D14 DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_D22 DDR_A_D23

DDR_A_D28 DDR_A_D29

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D30 DDR_A_D31

DDR_A_MA15 DDR_A_MA14

DDR_A_MA11 DDR_A_MA7

DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

DDR_A_D36 DDR_A_D37

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

+0.675VS

B

DDR3 SO-DIMM A Reverse Type H=4.0mm

DDRA_CKE1 <7>

DDRA_CLK1 <7> DDRA_CLK1# <7>

DDR_A_BS1 <7> DDR_A_RAS# <7>

DDRA_SCS0# <7> DDRA_ODT0 <7>

DDRA_ODT1 <7>

1

CD16 0.1U_0402_10V7KCD16 0.1U_0402_10V7K

2

close to JDDR3L.126

PM_SMBDATA <12,30,38,45> PM_SMBCLK <12,30,38,45>

C

DDR_A_DQS[0..7] <7>

DDR_A_DQS#[0..7] <7>

DDR_A_D[0..63] <7>

DDR_A_MA[0..15] <7>

+1.35V

@

RC78

1 2

RC78

1K_0402_5%

Compal Secret Data

SM_DRAMRST#<12>

+V_SM_VREF_CNT

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

SM_DRAMRST#

Layout Note: Place near JDDR3L

+1.35V

CD8 10U_0603_6.3V6MCD8 10U_0603_6.3V6M

CD9 10U_0603_6.3V6MCD9 10U_0603_6.3V6M

CD10 10U_0603_6.3V6MCD10 10U_0603_6.3V6M

CD11 10U_0603_6.3V6MCD11 10U_0603_6.3V6M

CD13 10U_0603_6.3V6MCD13 10U_0603_6.3V6M

CD14 10U_0603_6.3V6MCD14 10U_0603_6.3V6M

2012/04/19 2015/04/19

1 2

12

Deciphered Date

D

RC80

RC80 1K_0402_5%

1K_0402_5%

H_DRAMRST# <5>

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

+1.35V

1 2

CD17 1U_0402_6.3V6KCD17 1U_0402_6.3V6K

1 2

CD18 1U_0402_6.3V6KCD18 1U_0402_6.3V6K

1 2

CD19 1U_0402_6.3V6KCD19 1U_0402_6.3V6K

1 2

CD20 1U_0402_6.3V6KCD20 1U_0402_6.3V6K

D

E

SM_DRAMRST#

Layout Note: Place near JDDR3L.203 and 204

+0.675VS

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMM0

VSKAA

1 2

CD2 100P_0402_50V8J

@ESD@

12

CD24 1U_0402_6.3V6KCD24 1U_0402_6.3V6K

12

CD21 1U_0402_6.3V6KCD21 1U_0402_6.3V6K

11 57Monday, March 18, 2013

E

0.3

A

+VREF_DQB

0.1U_0402_10V7K

1 1

Close to JDDR3H.1

DDRB_CKE0<7>

DDR_B_BS2<7>

2 2

DDRB_CLK0<7> DDRB_CLK0#<7>

DDR_B_BS0<7>

DDR_B_WE#<7> DDR_B_CAS#<7>

DDRB_SCS1#<7>

3 3

+3VS

1

4 4

2

0.1U_0402_10V7K

CD27

RD15

RD15 10K_0402_5%

10K_0402_5%

CD49

1

2

1 2

DDR_B_D0 DDR_B_D1

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26 DDR_B_D27

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

DDR_B_MA10

DDR_B_MA13

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D59

+0.675VS

+1.35V

JDDR3H

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205

VREF_CA

VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1

G1

LCN_DAN06-K4806-0103_204P

LCN_DAN06-K4806-0103_204P C

C

onn@

DQ4 DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6 DQ7

VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA SCL

VTT2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78

A15

80

A14

82 84

A11

86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102 104 106 108

BA1

110 112 114

S0#

116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

G2

B

+1.35V

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_D22 DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

DDR_B_D36 DDR_B_D37

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

+0.675VS

DDR3 SO-DIMM B Reverse Type H=9.0mm

SM_DRAMRST# <11>

DDRB_CKE1 <7>

DDRB_CLK1 <7> DDRB_CLK1# <7>

DDR_B_BS1 <7> DDR_B_RAS# <7>

DDRB_SCS0# <7> DDRB_ODT0 <7>

DDRB_ODT1 <7>

1

CD47 0.1U_0402_10V7KCD47 0.1U_0402_10V7K

2

Close to JDDR3H.126

PM_SMBDATA <11,30,38,45> PM_SMBCLK <11,30,38,45>

+VREF_DQA_M3

@ CC71

@

+V_SM_VREF_CNT

C

+1.35V

12

1 2

RC187 2_0402_1%RC187 2_0402_1%

12

CC71

0.022U_0402_25V7K

12

RC8

24.9_0402_1%@

12

Layout Note: Place near JDDR3H

+1.35V

CD31 47U_0805_6.3V6MCD31 47U_0805_6.3V6M

CD41 10U_0603_6.3V6MCD41 10U_0603_6.3V6M

CD36 10U_0603_6.3V6MCD36 10U_0603_6.3V6M

CD37 10U_0603_6.3V6MCD37 10U_0603_6.3V6M

CD39 10U_0603_6.3V6MCD39 10U_0603_6.3V6M

CD40 10U_0603_6.3V6MCD40 10U_0603_6.3V6M

CD58 10U_0603_6.3V6MCD58 10U_0603_6.3V6M

DDR_B_DQS#[0..7] <7>

DDR_B_DQS[0..7] <7>

DDR_B_D[0..63] <7>

DDR_B_MA[0..15] <7>

All VREF traces should have 20 mil trace width

+VREF_DQA +1.35V

RC121

RC121 1K_0402_1%

1K_0402_1%

RC110

RC110 1K_0402_1%

1K_0402_1%

1 2

SE00000PL00

1 2

+VREF_DQB_M3

D

+VREF_DQB +1.35V

12

RC122

RC122 1K_0402_1%

1K_0402_1%

1 2

RC188 2_0402_1%RC188 2_0402_1%

12

CC72

@ CC72

@

0.022U_0402_25V7K

12

RC9

24.9_0402_1%@

Layout Note: Place these 4 Caps near Command and Control signals of DIMMB

+1.35V

12

RC111

RC111 1K_0402_1%

1K_0402_1%

12

CD29 1U_0402_6.3V6KCD29 1U_0402_6.3V6K

12

CD30 1U_0402_6.3V6KCD30 1U_0402_6.3V6K

12

CD32 1U_0402_6.3V6KCD32 1U_0402_6.3V6K

12

CD33 1U_0402_6.3V6KCD33 1U_0402_6.3V6K

+V_SM_VREF

1 2

RC189 2_0402_1%RC189 2_0402_1%

12

CC65

@ CC65

@

0.022U_0402_25V7K

12

RC3

24.9_0402_1%@

Layout Note: Place near JDDR3H.203 and 204

+0.675VS

CD45 1U_0402_6.3V6KCD45 1U_0402_6.3V6K

CD42 1U_0402_6.3V6KCD42 1U_0402_6.3V6K

12

RC120

RC120 1K_0402_1%

1K_0402_1%

12

RC109

RC109 1K_0402_1%

1K_0402_1%

12

E

+V_SM_VREF_CNT

SPD setting (SA0, SA1) PU/PD by Channel A/B

->Channel A 00

->Channel B 01

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMM1

VSKAA

12 57Monday, March 18, 2013

E

0.3

of

A

PCIE_GTX_C_CRX_P[0..3]<6>

PCIE_GTX_C_CRX_N[0..3]<6>

PCIE_CTX_C_GRX_P[0..3]<6>

PCIE_CTX_C_GRX_N[0..3]<6>

1 1

PCIE_GTX_C_CRX_P0 PCIE_GTX_C_CRX_N0 PCIE_GTX_C_CRX_P1 PCIE_GTX_C_CRX_N1 PCIE_GTX_C_CRX_P2 PCIE_GTX_C_CRX_N2 PCIE_GTX_C_CRX_P3 PCIE_GTX_C_CRX_N3

2 2

3 3

CLK_REQ_VGA#<29>

4 4

PCIE_GTX_C_CRX_P[0..3]

PCIE_GTX_C_CRX_N[0..3]

PCIE_CTX_C_GRX_P[0..3]

PCIE_CTX_C_GRX_N[0..3]

1 2

CV1 0.22U_0402_16V7KOPT@CV1 0.22U_0402_16V7KOPT@

1 2

CV2 0.22U_0402_16V7KOPT@CV2 0.22U_0402_16V7KOPT@

1 2

CV3 0.22U_0402_16V7KOPT@CV3 0.22U_0402_16V7KOPT@

1 2

CV4 0.22U_0402_16V7KOPT@CV4 0.22U_0402_16V7KOPT@

1 2

CV5 0.22U_0402_16V7KOPT@CV5 0.22U_0402_16V7KOPT@

1 2

CV6 0.22U_0402_16V7KOPT@CV6 0.22U_0402_16V7KOPT@

1 2

CV7 0.22U_0402_16V7KOPT@CV7 0.22U_0402_16V7KOPT@

1 2

CV8 0.22U_0402_16V7KOPT@CV8 0.22U_0402_16V7KOPT@

CLK_PCIE_VGA<29>

CLK_PCIE_VGA#<29>

PLTRST_VGA#<31>

61

QV2A

2N7002DW-T/R7_SOT363-6

OPT@

2

1 2

RV4 200_0402_1%

@

+3VS_DGPU

PCIE_CTX_C_GRX_P0 PCIE_CTX_C_GRX_N0 PCIE_CTX_C_GRX_P1 PCIE_CTX_C_GRX_N1 PCIE_CTX_C_GRX_P2 PCIE_CTX_C_GRX_N2 PCIE_CTX_C_GRX_P3 PCIE_CTX_C_GRX_N3

PCIE_GTX_CRX_P0 PCIE_GTX_CRX_N0 PCIE_GTX_CRX_P1 PCIE_GTX_CRX_N1 PCIE_GTX_CRX_P2 PCIE_GTX_CRX_N2 PCIE_GTX_CRX_P3 PCIE_GTX_CRX_N3

CLK_PCIE_VGA CLK_PCIE_VGA# CLK_REQ_GPU#

PEX_TSTCLK_OUT PEX_TSTCLK_OUT#

RV5

2.49K_0402_1%

OPT@

1 2

B

UV1A

AG6

PEX_RX0

AG7

PEX_RX0_N

AF7

PEX_RX1

AE7

PEX_RX1_N

AE9

PEX_RX2

AF9

PEX_RX2_N

AG9

PEX_RX3

AG10

PEX_RX3_N

AF10

PEX_RX4

AE10

PEX_RX4_N

AE12

PEX_RX5

AF12

PEX_RX5_N

AG12

PEX_RX6

AG13

PEX_RX6_N

AF13

PEX_RX7

AE13

PEX_RX7_N

AE15

NC

AF15

NC

AG15

NC

AG16

NC

AF16

NC

AE16

NC

AE18

NC

AF18

NC

AG18

NC

AG19

NC

AF19

NC

AE19

NC

AE21

NC

AF21

NC

AG21

NC

AG22

NC

AC9

PEX_TX0

AB9

PEX_TX0_N

AB10

PEX_TX1

AC10

PEX_TX1_N

AD11

PEX_TX2

AC11

PEX_TX2_N

AC12

PEX_TX3

AB12

PEX_TX3_N

AB13

PEX_TX4

AC13

PEX_TX4_N

AD14

PEX_TX5

AC14

PEX_TX5_N

AC15

PEX_TX6

AB15

PEX_TX6_N

AB16

PEX_TX7

AC16

PEX_TX7_N

AD17

NC

AC17

NC

AC18

NC

AB18

NC

AB19

NC

AC19

NC

AD20

NC

AC20

NC

AC21

NC

AB21

NC

AD23

NC

AE23

NC

AF24

NC

AE24

NC

AG24

NC

AG25

NC

AE8

PEX_REFCLK

AD8

PEX_REFCLK_N

AC6

PEX_CLKREQ_N

AF22

PEX_TSTCLK_OUT

AE22

PEX_TSTCLK_OUT_N

AC7

PEX_RST_N

AF25

PEX_TERMP

N14P-GV2-S-A2_FCBGA595

N14PGV2@

1

CV17

CV17 18P_0402_50V8J

18P_0402_50V8J

NOGCLK@

2

Part 1 of 6

PCI EXPRESS

YV1

1

DACsI2C GPIO

120mA

52mA

71mA

41mA

CLK

NOGCLK@

27MHZ_16PF

GND

2

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21

DACA_RED

DACA_GREEN

DACA_BLUE

DACA_HSYNC DACA_VSYNC

DACA_VDD DACA_VREF DACA_RSET

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

I2CC_SCL

I2CC_SDA

I2CS_SCL

I2CS_SDA

CORE_PLLVDD

SP_PLLVDD

VID_PLLVDD

XTAL_IN

XTAL_OUT

XTAL_SSIN

XTAL_OUTBUFF

3

GND

4

18P_0402_50V8J

NC

XTAL_OUTXTALIN

NOGCLK@

C6 B2 D6 C7 F9 A3 A4 B6 A6 F8 C5 E7 D7 B4 B3 C3 D5 D4 C2 F7 E6 C4

AB6

AG3 AF4 AF3

AE3 AE4

W5 AE2 AF2

B7 A7

C9 C8

A9 B9

D9 D8

L6 M6

N6

C11 B10

A10 C10

CV18

FB_CLAMP_MON

FB_CLAMP_REQ#

OVERT#_VGA GPU_EVENT

DGPU_VID GPS_DOWN# PSI

VGA_CRT_CLK VGA_CRT_DATA

HDCP_SCL HDCP_SDA

VGA_EDID_CLK VGA_EDID_DATA

SMB_CLK_GPU SMB_DATA_GPU

+PLLVDD

+GPU_PLLVDD

XTALIN XTAL_OUT

XTAL_SSIN XTAL_OUTBUFF

1

2

C

DV1

+3VS_DGPU

2

G

QV8

13

D

S

2N7002KW_SOT323-3

DGPU_VID <55>

GPS_DOWN# <44>

PSI <55>

1

OPT@

2

CV42, CV43 under GPU close to ball : AE8,AD7

VGA_X1<38>

10_0402_5%

10P_0402_50V8J

N14PGV2@

CV9

0.1U_0402_10V7K

RV7

CV113

RB751V40_SC76-2

OPT@

1

CV10

2

0.1U_0402_10V7K

OPT@

12

@EMI@RV7

@EMI@

1

@EMI@CV113

@EMI@

2

for EMI

12

CLK_REQ_GC6# <44>

LV1

BLM18PG181SN1D_2P

1 2

1

CV11

CV12

2

4.7U_0603_6.3V6K

OPT@

1 2

RV8 0_0402_5%

GCLK@

FB_CLAMP <14,17,44>

+1.05VS_DGPU

OPT@

22U_0805_6.3V6M

XTALIN

D

For GC6

1

CV13

2

10U_0603_6.3V6M

JTAG_TRST<15> TESTMODE<15>

Internal Thermal Sensor

SMB_CLK_GPU

SMB_DATA_GPU

under GPU close to AD8

OPT@

QV1A

2N7002DW-T/R7_SOT363-6

+PLLVDD

1

2

GPS_DOWN# GPU_EVENT XTAL_OUTBUFF XTAL_SSIN

VGA_EDID_CLK VGA_EDID_DATA SMB_CLK_GPU SMB_DATA_GPU

VGA_CRT_CLK VGA_CRT_DATA HDCP_SDA HDCP_SCL

FB_CLAMP FB_CLAMP_REQ# FB_CLAMP_MON OVERT#_VGA

CLK_REQ_GC6#

CLK_REQ_GPU#

+3VS_DGPU

5

OPT@

QV1B

4

2

2N7002DW-T/R7_SOT363-6

61

1

CV14

2

OPT@ CV14

OPT@

0.1U_0402_10V7K

E

RPV1

1 8 2 7 3 6 4 5

10K_8P4R_5%

OPT@

RPV2

1 8 2 7 3 6 4 5

2.2K_8P4R_5%

OPT@

RPV3

1 8 2 7 3 6 4 5

2.2K_8P4R_5%

OPT@

RPV12

1 8 2 7 3 6 4 5

10K_8P4R_5%

OPT@

RPV13

1 8 2 7 3 6 4 5

10K_8P4R_5%

OPT@

3

LV2

1 2

FBMA-L11-160808300LMA25T_2P

CV15

OPT@ CV15

OPT@

22U_0805_6.3V6M

EC_SMB_CK2 <24,30,37,44>

+1.05VS_DGPU

OPT@LV2

OPT@

+3VS_DGPU

+3VS

EC_SMB_DA2 <24,30,37,44>

1

CV16

2

OPT@ CV16

OPT@

10U_0603_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/09/28 2013/09/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

VGA_N14x PEG & DAC

13 57Monday, March 18, 2013

E

13 57Monday, March 18, 2013

0.3

of

A

VRAM Interface

+FB_PLLAVDD

CV20

22U_0805_6.3V6M

1

OPT@CV20

OPT@

2

MDA[15..0]

MDA[31..16]

MDA[47..32]

MDA[63..48]

Close to H22

CV21

0.1U_0402_10V7K

2

OPT@CV21

OPT@

1

CV22

1

OPT@CV22

OPT@

2

Close to P22

CV114

0.1U_0402_10V7K

1

OPT@CV114

OPT@

2

0.1U_0402_10V7K

UV1B

Part 2 of 6

FBA_D00 FBA_D01 FBA_D02 FBA_D03 FBA_D04 FBA_D05 FBA_D06 FBA_D07 FBA_D08 FBA_D09 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FB_PLLAVDD_1 FB_PLLAVDD_2

FB_VREF_PROBE

FB_DLLAVDD

FB_CLAMP

FBA_DEBUG0 FBA_DEBUG1

Part 2 of 6

62mA

2mA

6

35mA

MEMORY

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_DQS_RN0 FBA_DQS_RN1

INTERFACE A

FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_CLK0_N

FBA_CLK1_N

FBA_WCK01

FBA_WCK01_N

FBA_WCK23

FBA_WCK23_N

FBA_WCK45

FBA_WCK45_N

FBA_WCK67

FBA_WCK67_N

FBA_CLK0

FBA_CLK1

C27 C26 E24 F24 D27 D26 F25 F26 F23 G22 G23 G24 F27 G25 G27 G26 M24 M23 K24 K23 M27 M26 M25 K26 K22 J23 J25 J24 K27 K25 J27 J26

D19 D14 C17 C22 P24 W24 AA25 U25

F19 C14 A16 A22 P25 W22 AB27 T27

E19 C15 B16 B22 R25 W23 AB26 T26

D24 D25

N22 M22

D18 C18 D17 D16 T24 U24 V24 V25

CMDA0 CMDA1 CMDA2 CMDA3 CMDA4 CMDA5 CMDA6 CMDA7 CMDA8 CMDA9 CMDA10 CMDA11 CMDA12 CMDA13 CMDA14 CMDA15 CMDA16 CMDA17 CMDA18 CMDA19 CMDA20 CMDA21 CMDA22 CMDA23 CMDA24 CMDA25 CMDA26 CMDA27 CMDA28 CMDA29 CMDA30

DQSA#0 DQSA#1 DQSA#2 DQSA#3 DQSA#4 DQSA#5 DQSA#6 DQSA#7

TP@

D20 D21

D15

C13

D13

C16

C19

C23

C20 C21 R22 R24

R23 N25 N26 N23 N24

U22

AA24

AA23 AD27 AB25 AD26 AC25 AA27 AA26

W26

R26

N27 R27

W27 W25

D23

H22

E18 F18 E16 F17

F20 E21 E15

F15 F13

B13 E13

B15

A13 A15 B18 A18 A19

B24

A25 A24 A21 B21

T22

V23 V22 T23

Y24

Y22

Y25

T25

V26 V27

F16 P22

F22 J22

F3

N14P-GV2-S-A2_FCBGA595

N14PGV2@

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

+FB_PLLAVDD

FB_CLAMP<13,17,44>

TV1 PAD

TV1 PAD TV2 PAD

TV2 PAD

DQMA0 DQMA1 DQMA2 DQMA3 DQMA4 DQMA5 DQMA6 DQMA7

DQSA0 DQSA1 DQSA2 DQSA3 DQSA4 DQSA5 DQSA6 DQSA7

CMDA[30..0] <18,19,20,21>

CLKA0 <18,20> CLKA0# <18,20>

CLKA1 <19,21> CLKA1# <19,21>

DQMA[3..0] <18,20>

DQMA[7..4] <19,21>

DQSA#[3..0] <18,20>

DQSA#[7..4] <19,21>

DQSA[3..0] <18,20>

DQSA[7..4] <19,21>

MDA[15..0]<18,20>

MDA[31..16]<18,20>

MDA[47..32]<19,21>

MDA[63..48]<19,21>

1 1

30ohms (ESR=0.01)

+1.05VS_DGPU

LV3

OPT@LV3

OPT@

1 2

FBMA-L11-160808300LMA25T_2P

Place close to BGA

Near GPU Close to F16

Place close to the first T point

+VRAM_1.5VS

109876

12345

+VRAM_1.5VS

109876

12345

+VRAM_1.5VS

DDR3

CMDA16 CMDA19 CMDA3 CMDA0 CMDA20

RV10 100_0402_5%

RV12 100_0402_5%

CMDA12 CMDA14 CMDA15 CMDA7

RPV4

RPV4 100_1206_10P8R_5%

100_1206_10P8R_5%

OPT@

CMDA11 CMDA4 CMDA5 CMDA6

CMDA22 CMDA9 CMDA21 CMDA24

RPV6

RPV6 100_1206_10P8R_5%

100_1206_10P8R_5%

OPT@

CMDA23 CMDA13 CMDA8 CMDA10

RPV8

18

CMDA26

27

CMDA25

36

CMDA27

45

CMDA28

100_0804_8P4R_5%

OPT@

12

OPT@

12

OPT@

Command Bit Default Pull-down

ODTx

CKEx

RST

CS* No Termination

1 2

RV36 10K_0402_5%OPT@RV36 10K_0402_5%OPT@

1 2

RV37 10K_0402_5%OPT@RV37 10K_0402_5%OPT@

1 2

RV38 10K_0402_5%OPT@RV38 10K_0402_5%OPT@

1 2

RV40 10K_0402_5%OPT@RV40 10K_0402_5%OPT@

1 2

RV15 10K_0402_5%OPT@RV15 10K_0402_5%OPT@

CMDA29

CMDA30

10k

109876

12345

109876

12345

1 8

CMDA28

2 7

CMDA27

3 6

CMDA25

4 5

CMDA26

RV11 100_0402_5%

RV13 100_0402_5%

RPV5

RPV5 100_1206_10P8R_5%

100_1206_10P8R_5%

OPT@

RPV7

RPV7 100_1206_10P8R_5%

100_1206_10P8R_5%

OPT@

RPV9

100_0804_8P4R_5%

OPT@

12

OPT@

12

OPT@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2012/09/28 2013/09/28

Compal Secret Data

Deciphered Date

Custom

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

N14x VRAM Interface

14 57Monday, March 18, 2013

0.3

5

UV1C

AC3

IFPA_TXC

AC4

IFPA_TXC_N

Y4

IFPA_TXD0

Y3

IFPA_TXD0_N

AA3

IFPA_TXD1

AA2

IFPA_TXD1_N

AB1

IFPA_TXD2

AA1

IFPA_TXD2_N

AA4

D D

C C

B B

A A

IFPA_TXD3

AA5

IFPA_TXD3_N

AB5

IFPB_TXC

AB4

IFPB_TXC_N

AB3

IFPB_TXD4

AB2

IFPB_TXD4_N

AD3

IFPB_TXD5

AD2

IFPB_TXD5_N

AE1

IFPB_TXD6

AD1

IFPB_TXD6_N

AD4

IFPB_TXD7

AD5

IFPB_TXD7_N

T2

IFPC_L0

T3

IFPC_L0_N

T1

IFPC_L1

R1

IFPC_L1_N

R2

IFPC_L2

R3

IFPC_L2_N

N2

IFPC_L3

N3

IFPC_L3_N

V3

IFPD_L0

V4

IFPD_L0_N

U3

IFPD_L1

U4

IFPD_L1_N

T4

IFPD_L2

T5

IFPD_L2_N

R4

IFPD_L3

R5

IFPD_L3_N

N1

NC

M1

NC

M2

NC

M3

NC

K2

NC

K3

NC

K1

NC

J1

NC

M4

NC

M5

NC

L3

NC

L4

NC

K4

NC

K5

NC

J4

NC

J5

NC

N4

IFPC_AUX_I2CW_SCL

N5

IFPC_AUX_I2CW_SDA_N

P3

IFPD_AUX_I2CX_SCL

P4

IFPD_AUX_I2CX_SDA_N

J2

IFPE_AUX_I2CY_SCL

J3

IFPE_AUX_I2CY_SDA_N

H3

IFPF_AUX_I2CZ_SCL

H4

IFPF_AUX_I2CZ_SDA_N

N14P-GV2-S-A2_FCBGA595

N14PGV2@

Part 3 of 6

NC

GENERAL

MULTI_STRAP_REF0_GND

LVDS/TMDS

VDD_SENSE

GND_SENSE

TEST

JTAG_TRST_N

SERIAL

BUFRST_N

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

THERMDP

THERMDN

TESTMODE

JTAG_TCK

JTAG_TDI JTAG_TDO JTAG_TMS

ROM_CS_N

ROM_SI

ROM_SO

ROM_SCLK

F11

NC

AD10

NC

AD7

NC

B19

NC

V5

NC

V6

NC

G1

NC

G2

NC

G3

NC

G4

NC

G5

NC

G6

NC

G7

NC

V1

NC

V2

NC

W1

NC

W2

NC

W3

NC

W4

NC

D11

D10

NC

E9

NC

E10

NC

F10

NC

D1 D2 E4 E3 D3 C1

NC

F6 F4

NC

F5

NC

F12

E12

F2

F1

AD9 AE5 AE6 AF6 AD6 AG4

D12 B12 A12 C12

4

OPT@

1 2

RV16 10K_0402_5%

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

MULTI_STRAP_REF0_GND

VGA_VCC_SENSE

trace width: 16mils differential voltage sensing.

VGA_VSS_SENSE

JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS

ROM_SI ROM_SO ROM_SCLK

differential signal routing.

PAD

PAD PAD

PAD PAD TP@

PAD TP@ PAD

PAD

N14PGV2@

1 2

RV17 40.2K_0402_1%

+VGA_CORE

RV26

RV26 100_0402_1%

100_0402_1%

OPT@

1 2

OPT@

12

RV35

100_0402_1%

TESTMODE <13>

TP@

TV3

TP@

TV4

TV4 TV5

TV5 TV6

TP@TV6

TP@

JTAG_TRST <13>

VGA_VCC_SENSE <55>

VGA_VSS_SENSE <55>

N14P-GV2

3

ogical

Physical Strapping pin

ROM_SO

ROM_SCLK

ROM_SI

STRAP0

STRAP1

TRAP2

S

STRAP3

STRAP4

ower Rail

P

+3VS_DGPU

+

3VS_DGPU

+3VS_DGPU

+3VS_DGPU 3

+3VS_DGPU

+3VS_DGPU SOR0_EXPOSEDSOR2_EXPOSED SOR1_EXPOSED

3VS_DGPU DP_PLL_VDD33V

+

L Strapping Bit3

FB[1]

PCI_DEVID[4]

AMCFG[3] RAMCFG[2]

USER[3]

3GIO_PADCFG[3]

PCI_DEVID[3]

SOR3_EXPOSED

RESERVED

SKU Device ID biit5 to bit0

N14P-GV2

N14M-GL

MULTI LEVEL STRAPS

12

@

N14PGV2@

RV18

45.3K_0402_1%

STRAP0 STRAP1 STRAP3 STRAP2

45.3K_0402_1%

12

@

RV27

4.99K_0402_1%

N14PGV2@

12

0x1140 000000

+3VS_DGPU

12

@

10K_0402_1%

12

N14PGV2@

45.3K_0402_1%

10K_0402_1%

RV20

RV29

15K_0402_1%

RV19

RV28

N14PGV2@

FB Memory gDDR3

K4W2G1646E-BC11

icron

amsung

900MHz

GHz

1

900MHz

1GHz

900MHz

K4W2G1646E-BC1A

H5TQ2G63DFR-11C

H5TQ2G63DFR-N0C

MT41K128M16JT-107G

K4W4G1646B-HC11S

MT41K256M16HA-107G

1 2 8 M

x 1 6

2 5 6 M

x 1 6

Samsung

Hynix

M

Micron

12

@

RV21

4.99K_0402_1%

12

RV30

4.99K_0402_1%

0100100x1292

12

@

RV22

12

N14PGV2@

RV31

ROM_SIGPU

PD 45.3K

PD 34.8K

PD 30K

PD 20K

PD 10K

2

10K_0402_1%

STRAP4

45.3K_0402_1%

Logical Strapping Bit2

B[0]

F

SUB_VENDOR

PCIE_SPEED_CHANGE_GEN3

Resistor Values

RV31

10K_0402_1%

N14MGL@

For X76 (N14P-GV2)For X76 (N14M-GL)

N14M-GL

Logical Strapping Bit1

S

MB_ALT_ADDR

PCI_DEVID[5]

RAMCFG[1]R

PCIE_MAX_SPEED

Pull-up to +3VS _D

ROM_SI ROM_SO ROM_SCLK

GPU

1000

1001

1010

1011

1100

1101

1110

1111

N14MGL@

12

@

RV23

4.99K_0402_1%

RV32

10K_0402_1%

5K

10K

1

20K

25K

30K

35K

45K

5K

FB Memory gDDR3

Samsung

1 2 8 M

Hynix

x 1 6

Micron

Samsung K4W4G1646B-HC11

2 5 6 M

Hynix

x 1 6

M

icron

1GHz

900MHz

9

00MHz

9

00MHz

K4W2G1646E-BC11900MHz

K4W2G1646E-BC1A

H5TQ2G63DFR-11C900MHz

5TQ2G63DFR-N0C

H

MT41K128M16JT-107G

H5TC4G63AFR-11C

MT41K256M16HA-107G

1

Logical S

trapping Bit0

VGA_DEVICE

PEX_PLLEN_TERM

RAMCFG[0]

USER[0]USER[1]USER[2]

GIO_PADCFG[0]3GIO_PADCFG[1]3GIO_PADCFG[2]

PCI_DEVID[0]PCI_DEVID[1]PCI_DEVID[2]

Pull-down to Gnd

0000

0001

0010

0011

0100

0101

0110

0111

+3VS_DGPU

12

N14PGV2@

RV24

4.99K_0402_1%

12

N14MGL@

RV33

10K_0402_1%

12

RV25

4.99K_0402_1%

12

RV34

10K_0402_1%

STRAP[3:0]GPU

0101

0110

0001

1011

0100

1

101

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/09/28 2013/09/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VGA_N14x LVDS&TMDS

15 57Monday, March 18, 2013

1

15 57Monday, March 18, 2013

0.3

of

5

+VRAM_1.5VS

D D

C C

B B

1

CV32

2

OPT@ CV32

OPT@

1

CV43

2

OPT@ CV43

OPT@

nder GPU

U

1

CV24

2

OPT@ CV24

OPT@

4.7U_0603_6.3V6K

N

ear GPU

1

CV44

2

OPT@ CV44

OPT@

22U_0805_6.3V6M

1

CV33

2

OPT@ CV33

OPT@

1U_0402_6.3V6K

10U_0603_6.3V6M

1

2

1

CV34

2

OPT@ CV34

OPT@

1U_0402_6.3V6K

4

1

CV25

2

OPT@ CV25

OPT@

0.1U_0402_10V7K

CV35

OPT@ CV35

OPT@

0.1U_0402_10V7K

UV1D

B26 C25 E23 E26 F14 F21 G13 G14 G15 G16 G18 G19 G20 G21 H24 H26

J21 K21 L22 L24 L26

M21

N21 R21 T21 V21

W21

V7

W7 AA6

W6

Y6

M7 N7

T6 P6

T7 R7 U6 R6

J7

K7

K6 H6

J6

N14P-GV2-S-A2_FCBGA595

N14PGV2@

Part 4 of 6

3500 mA 2000 mA

FBVDDQ_01 FBVDDQ_02 FBVDDQ_03 FBVDDQ_04 FBVDDQ_05 FBVDDQ_06 FBVDDQ_07 FBVDDQ_08 FBVDDQ_09 FBVDDQ_10 FBVDDQ_11 FBVDDQ_12 FBVDDQ_13 FBVDDQ_14 FBVDDQ_15 FBVDDQ_16 FBVDDQ_17 FBVDDQ_18 FBVDDQ_19 FBVDDQ_20 FBVDDQ_21 FBVDDQ_22 FBVDDQ_23 FBVDDQ_24 FBVDDQ_25 FBVDDQ_26 FBVDDQ_27

IFPAB_PLLVDD_1 IFPAB_PLLVDD_2 IFPAB_RSET IFPA_IOVDD IFPB_IOVDD

IFPC_PLLVDD_1 IFPC_PLLVDD_2 IFPC_RSET IFPC_IOVDD

IFPD_PLLVDD_2 IFPD_PLLVDD_1 IFPD_RSET IFPD_IOVDD

NC NC NC NC NC

PEX_IOVDDQ_1 PEX_IOVDDQ_2 PEX_IOVDDQ_3 PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8

PEX_IOVDDQ_9 PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13 PEX_IOVDDQ_14

PEX_IOVDD_1 PEX_IOVDD_2 PEX_IOVDD_3 PEX_IOVDD_4 PEX_IOVDD_5 PEX_IOVDD_6

VDD33_1 VDD33_2 VDD33_3 VDD33_4

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CAL_TERM_GND

PEX_PLL_HVDD_1 PEX_PLL_HVDD_2

PEX_SVDD_3V3

120mA

PEX_PLLVDD_1

PEX_PLLVDD_2

3

AA10 AA12 AA13 AA16 AA18 AA19 AA20 AA21 AB22 AC23 AD24 AE25 AF26 AF27

AA22 AB23 AC24 AD25 AE26 AE27

G10 G12 G8 G9

D22

+FB_CAL_PD_VDDQ

C24

FB_CAL_PU_GND

B25

FB_CAL_TERM_GND

AA8 AA9

AB8

AA14 AA15

Under GPU

Near Ball

1

CV54

2

OPT@ CV54

OPT@

1 2

1

2

0.1U_0402_10V7K

Near GPU

Under GPU

1

CV26

2

OPT@ CV26

OPT@

1U_0402_6.3V6K

1

CV36

2

OPT@ CV36

OPT@

1U_0402_6.3V6K

RV3940.2_0402_1%

OPT@

12

RV4142.2_0402_1%

OPT@

12

RV4251.1_0402_1%

OPT@

1

CV55

2

OPT@ CV55

OPT@

1U_0402_6.3V6K

1

CV23

2

OPT@ CV23

OPT@

1U_0402_6.3V6K

1

CV37

2

OPT@ CV37

OPT@

1U_0402_6.3V6K

+VRAM_1.5VS

+PEX_PLLVDD

CV56

OPT@ CV56

OPT@

4.7U_0603_6.3V6K

1

CV27

2

OPT@ CV27

OPT@

1

CV38

2

OPT@ CV38

OPT@

4.7U_0603_6.3V6K

m and Power supply

1

2

1

2

Near GPU

Under GPU

1

CV45

2

OPT@ CV45

OPT@

0.1U_0402_10V7K

LV4

BLM18PG121SN1D_0603

N14MGL@

RV1

0_0603_5%

N14PGV2@

2

idway between GPU

CV28

OPT@ CV28

OPT@

10U_0603_6.3V6M

CV39

OPT@ CV39

OPT@

10U_0603_6.3V6M

2

1

2

OPT@ CV29

OPT@

10U_0603_6.3V6M

CV40

OPT@ CV40

OPT@

10U_0603_6.3V6M

2

1

2

1

CV29

Near GPU

1

CV47

CV46

2

OPT@ CV47

OPT@

OPT@ CV46

OPT@

0.1U_0402_10V7K

+1.05VS_DGPU

12

+1.05VS_DGPU

1

CV30

CV31

2

OPT@ CV30

OPT@

OPT@ CV31

OPT@

22U_0805_6.3V6M

+1.05VS_DGPU

1

CV42

CV41

2

OPT@ CV42

OPT@

OPT@ CV41

OPT@

22U_0805_6.3V6M

+3VS_DGPU

1

CV48

CV49

2

OPT@ CV48

OPT@

OPT@ CV49

OPT@

1U_0402_6.3V6K

4.7U_0603_6.3V6K

Under GPU C

lose to AH12/AG12

1

2

CV50

OPT@ CV50

OPT@

0.1U_0402_10V7K

1

2

Near GPU

CV51

OPT@ CV51

OPT@

0.1U_0402_10V7K

1

CV52

2

OPT@ CV52

OPT@

+3VS_DGPU

1

CV53

2

OPT@ CV53

OPT@

4.7U_0603_6.3V6K

1

4.7U_0603_6.3V6K

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/09/28 2013/09/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VGA_N14x POWER

1

0.3

16 57Monday, March 18, 2013

0.3

5

4

3

2

1

+1.05VS_VCCP to +1.05VS_DGPU

+5VALW

12

RV43

RV43 270K_0402_5%

270K_0402_5%

OPT@

61

2N7002DW-T/R7_SOT363-6

0.01U_0402_25V7K

VGA_PWROK

OPT@

QV4A

2

VGA_PWROK#

QV5A

2

G

OPT@

AO3416_SOT23-3

+1.05VS_DGPU

+1.05VS_VCCP

Vgs=4.5V,Id=6.5A,Rds<22mohm

QV3

OPT@

QV3

OPT@

13

D

2

G

S

CV57

OPT@

1

2

+1.5V to +VRAM_1.5VS

CV59

OPT@

+1.5VS

QV6

OPT@QV6

OPT@

8

D

7

D

6

D

5

D

FDS6676AS_SO8

1

CV60

OPT@

2

4.7U_0603_6.3V6K

+VRAM_1.5VS

Vgs=10V,Id=14.5A,Rds=6mohm

1

S

2

S

3

S

4

G

VRAM_1.5VS_GATE

1

12

RV48

RV48 820K_0402_5%OPT@

0.01U_0402_25V7K

820K_0402_5%OPT@

2N7002DW-T/R7_SOT363-6

2

1.5V_PWR_EN

OPT@

RV47

1 2

180K_0402_5%

61

QV7A

2

OPT@

QV5B

5

G

OPT@

B+

1.5V_PWR_EN#

34

D

2N7002KDWH_SOT363-6

S

2N7002DW-T/R7_SOT363-6

1 2

OPT@

61

D

2N7002KDWH_SOT363-6

S

RV46

RV46 470_0805_5%

470_0805_5%

OPT@

1 2

3

QV7B

5

2N7002DW-T/R7_SOT363-6

OPT@

4

1 2

RV49100K_0402_5%

OPT@

+1.05VS_DGPU

RV44

22_0805_5%OPT@

1 2

3

OPT@

QV4B

5

4

RV45100K_0402_5%

+5VALW

V18 V16 V14 V12 V10 U17 U15 U13 U11 T18 T16 T14 T12 T10 R17 R15 R13 R11 P18 P16 P14

+3VS

UV2

5

N14PGV2@

4

Vcc

Y

G

NC7SZ32P5X_SC70-5

3

+VGA_CORE+VGA_CORE

1.5V_PWR_EN

UV1F

K10 K12 K14 K16 K18 L11 L13 L15

L17 M10 M12 M14 M16 M18 N11 N13 N15 N17

P10

P12

FB_CLAMP<13,14,44>

UV1F

VDD_001 VDD_002 VDD_003 VDD_004 VDD_005 VDD_006 VDD_007 VDD_008 VDD_009 VDD_010 VDD_011 VDD_012 VDD_013 VDD_014 VDD_015 VDD_016 VDD_017 VDD_018 VDD_019 VDD_020

N

14P-GV2-S-A2_FCBGA595

N14PGV2@

Part 6 of 6

VDD_041 VDD_040 VDD_039 VDD_038 VDD_037 VDD_036 VDD_035 VDD_034 VDD_033 VDD_032 VDD_031 VDD_030 VDD_029 VDD_028 VDD_027 VDD_026 VDD_025 VDD_024 VDD_023 VDD_022 VDD_021

2

B

1

A

1 2

RV50 0_0402_5%

N14MGL@

UV1E

A2

A26 AB11 AB14 AB17 AB20

D D

C C

B B

AB24

AC2 AC22 AC26

AC5

AC8 AD12 AD13 AD15 AD16 AD18 AD19 AD21 AD22 AE11 AE14 AE17 AE20

AF1 AF11 AF14 AF17 AF20 AF23

AF5

AF8

AG2 AG26

B1 B11 B14 B17 B20 B23 B27

B5

B8 E11 E14 E17

E2 E20 E22 E25

E5

E8

H2 H23 H25

H5

N14P-GV2-S-A2_FCBGA595

N14PGV2@

GND_001 GND_002 GND_003 GND_004 GND_005 GND_006 GND_007 GND_008 GND_009 GND_010 GND_011 GND_012 GND_013 GND_014 GND_015 GND_016 GND_017 GND_018 GND_019 GND_020 GND_021 GND_022 GND_023 GND_024 GND_025 GND_026 GND_027 GND_028 GND_029 GND_030 GND_031 GND_032 GND_033 GND_034 GND_035 GND_036 GND_037 GND_038 GND_039 GND_040 GND_041 GND_042 GND_043 GND_044 GND_045 GND_046 GND_047 GND_048 GND_049 GND_050 GND_051 GND_052 GND_053 GND_054 GND_055 GND_056

Part 5 of 6

GND_057 GND_058 GND_059 GND_060 GND_061 GND_062 GND_063 GND_064 GND_065 GND_066 GND_067 GND_068 GND_069 GND_070 GND_071 GND_072 GND_073 GND_074 GND_075 GND_076 GND_077 GND_078 GND_079 GND_080 GND_081 GND_082 GND_083 GND_084 GND_085 GND_086 GND_087 GND_088 GND_089 GND_090 GND_091 GND_092 GND_093 GND_094 GND_095 GND_096 GND_097 GND_098 GND_099 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112

GND GND

K11 K13 K15 K17 L10 L12 L14 L16 L18 L2 L23 L25 L5 M11 M13 M15 M17 N10 N12 N14 N16 N18 P11 P13 P15 P17 P2 P23 P26 P5 R10 R12 R14 R16 R18 T11 T13 T15 T17 U10 U12 U14 U16 U18 U2 U23 U26 U5 V11 V13 V15 V17 Y2 Y23 Y26 Y5

AA7 AB7

For GC6

VGA_PWROK<33,55>

+3VS to +3VS_DGPU

+VGA_CORE

RV51

470_0805_5%

OPT@

1 2 3

QV9B

5

2N7002DW-T/R7_SOT363-6

A A

5

4

OPT@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DGPU_PWR_EN#

4

3

RV52

470_0805_5%

OPT@

1 2 3

QV2B

5

2N7002DW-T/R7_SOT363-6

OPT@

4

Compal Secret Data

2012/09/28 2013/09/28

Compal Secret Data

Deciphered Date

DGPU_PWR_EN<31>

2

DGPU_PWR_EN#

+3VS+3VS_DGPU

RV53

RV53 10K_0402_5%OPT@

10K_0402_5%OPT@

1 2

RV54

1 2

33K_0402_5%

61

OPT@

QV9A

2N7002DW-T/R7_SOT363-6

OPT@

2

OPT@

Title

Size Document Number Rev

Custom

Date: Sheet of

2

CV61

0.1U_0402_10V7K

OPT@

1

AO3413_SOT23

2

CV62

OPT@

0.01U_0402_25V7K

1

Compal Electronics, Inc.

VGA_N14x POWER & GND

+3VS

Vgs=-4.5V,Id=3A,Rds<97mohm

S

QV11

G

2

OPT@

D

1 3

+3VS_DGPU

17 57Monday, March 18, 2013

1

17 57Monday, March 18, 2013

0.3

5

RANK 0 [31...0]

VRAM DDR3 Chips

+VRAM_1.5VS

12

+VRAM_1.5VS

12

DQSA[3..0]

DQSA#[3..0]

DQMA[3..0]

MDA[31..0]

CMDA[30..0]

+MEM_VREF_CA0

1

CV63

0.01U_0402_25V7K

OPT@

2

+MEM_VREF_DQ0

1

CV64

0.01U_0402_25V7K

OPT@

2

+MEM_VREF_CA0

+MEM_VREF_DQ0

243_0402_1%

DQSA[3..0]<14,20>

D D

DQSA#[3..0]<14,20>

DQMA[3..0]<14,20>

MDA[31..0]<14,20>

CMDA[30..0]

RV55

1K_0402_1%

OPT@

RV56

1K_0402_1%

OPT@

C C

RV57

1K_0402_1%

OPT@

RV58

1K_0402_1%

OPT@

B B

4

UV3

@

UV3

@

+MEM_VREF_CA0 +MEM_VREF_DQ0

OPT@

RV60

M8

VREFCA

H1

VREFDQ

N3

CMDA7 CMDA10 CMDA24 CMDA6 CMDA22 CMDA26 CMDA5 CMDA21 CMDA8 CMDA4 CMDA25 CMDA23 CMDA9 CMDA12 CMDA14

CMDA29 CMDA13 CMDA27

CLKA0 CLKA0 CLKA0# CMDA3

CMDA0 CMDA2 CMDA11 CMDA15 CMDA28

DQSA1 DQSA2

DQMA1 DQMA2

DQSA#1 DQSA#2

CMDA20

12

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA9 MDA12 MDA8 MDA15 MDA13 MDA11 MDA10 MDA14

MDA18 MDA22 MDA16 MDA23 MDA17 MDA20 MDA19 MDA21

+VRAM_1.5VS

3

Group1

Group2

OPT@

RV61

243_0402_1%

+MEM_VREF_CA0 +MEM_VREF_DQ0

CMDA7 CMDA10 CMDA24 CMDA6 CMDA22 CMDA26 CMDA5 CMDA21 CMDA8 CMDA4 CMDA25 CMDA23 CMDA9 CMDA12 CMDA14

CMDA29 CMDA13 CMDA27

CLKA0# CMDA3

CMDA0 CMDA2 CMDA11 CMDA15 CMDA28

DQSA0 DQSA3

DQMA0 DQMA3

DQSA#0 DQSA#3

CMDA20

ZQ1ZQ0

12

UV4

@

UV4

M8 H1

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

J1

L1

J9

L9

@

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

3

10mA

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

+VRAM_1.5VS

B2 D9 G7 K2 K8 N1 N9 R1 R9

+VRAM_1.5VS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA6 MDA1 MDA5 MDA0 MDA4 MDA2 MDA7 MDA3

MDA30 MDA26 MDA29 MDA24 MDA28 MDA27 MDA31 MDA25

2

Mode E Address

CMD0

Rank 0 Rank 1

0..31

ODT

CMD1

Group0

Group3

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CS0#

CKE

A9

A6

A3

A0

A8

A12

A1

RAS#

A13

BA1

A14

CAS#

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21 A7

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

RST

A7

A4

A11

A2

A10

A5

BA2

WE#

BA0

CMD30

1

32..63

0..31 32..63

ODT

CS1#

CKE

A11

A6

A3

A0

A8

A12 A0

A1

A7 A7

BA1 BA1

A12 A12

A8 A8

A0

A2 A2

RAS# RAS# RAS#

A13

A14

A3

A14

CAS#

A13 A13

CAS# CAS#

ODT

CS0#

CKE

RST RST RST

A6

A4

A11

A2

A10

A5

A5 A5

A9 A9

A1 A1

WE# WE#

A4 A4

BA2

WE#

BA0

A10 A10

BA0 BA0

BA2

A11A9

A14

A3BA1

ODT

CS1#

CKE

A6

BA2

Place close to the first T point

CLKA0<14,20>

CLKA0#<14,20>

12

OPT@

RV63

RV63 160_0402_1%

160_0402_1%

lace close to RANK0 VRAM

P

+VRAM_1.5VS +VRAM_1.5VS

1

2

A A

5

1

CV67

2

OPT@ CV67

OPT@

1U_0402_6.3V6K

4

1

CV68

2

OPT@ CV68

OPT@

1U_0402_6.3V6K

1

CV69

2

OPT@ CV69

OPT@

1U_0402_6.3V6K

1

CV70

2

OPT@ CV70

OPT@

1U_0402_6.3V6K

1

CV71

2

OPT@ CV71

OPT@

1U_0402_6.3V6K

1

CV72

2

OPT@ CV72

OPT@

0.1U_0402_10V7K

1

CV73

2

OPT@ CV73

OPT@

0.1U_0402_10V7K

1

CV75

CV74

OPT@ CV74

OPT@

0.1U_0402_10V7K

CV76

2

OPT@ CV75

OPT@

OPT@ CV76

OPT@

0.1U_0402_10V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/09/28 2013/09/28

1

2

1

CV77

2

OPT@ CV77

OPT@

1U_0402_6.3V6K

1

CV78

CV79

CV80

2

OPT@ CV78

OPT@

OPT@ CV79

OPT@

OPT@ CV80

1U_0402_6.3V6K

Compal Secret Data

OPT@

1U_0402_6.3V6K

Deciphered Date

1

2

1

CV81

2

OPT@ CV81

OPT@

1U_0402_6.3V6K

1

CV82

2

OPT@ CV82

OPT@

0.1U_0402_10V7K

2

1

CV83

2

OPT@ CV83

OPT@

0.1U_0402_10V7K

1

CV84

2

OPT@ CV84

OPT@

0.1U_0402_10V7K

1

CV85

2

OPT@ CV85

OPT@

0.1U_0402_10V7K

+VRAM_1.5VS

1

CV86

OPT@ CV86

OPT@

0.1U_0402_10V7K

Title

Size Document Number Rev

Custom

Date: Sheet of

CV87

2

OPT@ CV87

OPT@

22U_0805_6.3V6M

Compal Electronics, Inc.

VGA_N14x VRAM RANK 0L

18 57Monday, March 18, 2013

1

18 57Monday, March 18, 2013

0.3

5

RANK 0 [63...32]

VRAM DDR3 Chips

12

+MEM_VREF_CA1

12

+MEM_VREF_DQ1

12

DQSA[7..4]

DQSA#[7..4]

DQMA[7..4]

MDA[63..32]

CMDA[30..0]

1

CV65

0.01U_0402_25V7K

OPT@

2

1

CV66

0.01U_0402_25V7K

OPT@

2

+MEM_VREF_CA1

+MEM_VREF_DQ1

243_0402_1%

DQSA[7..4]<14,21>

D D

C C

B B

DQSA#[7..4]<14,21>

DQMA[7..4]<14,21>

MDA[63..32]<14,21>

CMDA[30..0]<14,18,20,21>

RV59

1K_0402_1%

OPT@

RV62

1K_0402_1%

OPT@

RV64

1K_0402_1%

OPT@

RV65

1K_0402_1%

OPT@

+VRAM_1.5VS

OPT@

RV71

CMDA7 CMDA10 CMDA24 CMDA6 CMDA22 CMDA26 CMDA5 CMDA21 CMDA8 CMDA4 CMDA25 CMDA23 CMDA9 CMDA12 CMDA14

CMDA29 CMDA13 CMDA27

CLKA1 CLKA1# CMDA19

CMDA16 CMDA18 CMDA11 CMDA15 CMDA28

DQSA4 DQSA7

DQMA4 DQMA7

DQSA#4 DQSA#7

CMDA20

12

4

M8 H1

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

ZQ2

J1

L1

J9

L9

3

UV5

@

UV5

@

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

310mA 310mA

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA35 MDA37 MDA32 MDA36 MDA33 MDA38 MDA34 MDA39

MDA58 MDA62 MDA56 MDA63 MDA57 MDA61 MDA59 MDA60

+VRAM_1.5VS

Group4

+MEM_VREF_CA1 +MEM_VREF_DQ1

CMDA7 CMDA10 CMDA24 CMDA6 CMDA22 CMDA26 CMDA5 CMDA21 CMDA8 CMDA4 CMDA25 CMDA23 CMDA9 CMDA12 CMDA14

CMDA29 CMDA13 CMDA27

CLKA1 CLKA1# CMDA19

CMDA16 CMDA18 CMDA11 CMDA15 CMDA28

DQSA5 DQSA6

DQMA5 DQMA6

DQSA#5 DQSA#6

CMDA20

OPT@

RV72

243_0402_1%

M8 H1

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

ZQ3

12

J1

L1

J9

L9

UV6

@

UV6

@

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

K4B1G1646E-HC12_FBGA96

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

+VRAM_1.5VS

B2 D9 G7 K2 K8 N1 N9 R1 R9

+VRAM_1.5VS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA45+MEM_VREF_CA1 MDA41 MDA46 MDA40 MDA44 MDA43 MDA47 MDA42

MDA54 MDA50 MDA55 MDA48 MDA53 MDA51 MDA52 MDA49

2

Mode E Address

CMD0

Rank 0 Rank 1

0..31

ODT

CMD1

Group5

Group6Group7

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CS0#

CKE

A9

A6

A3

A0

A8

A12

A1

RAS#

A13

BA1

A14

CAS#

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21 A7

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

RST

A7

A4

A11

A2

A10

A5

BA2

WE#

BA0

CMD30

1

32..63

0..31 32..63

ODT

CS1#

CKE

11

A

A6

A3

A0

A8

A12 A0

A1

A7 A7

BA1 BA1

A12 A12

A8 A8

A0

A2 A2

RAS# RAS# RAS#

A13

A14

A3

A14

CAS#

A13 A13

CAS# CAS#

ODT

CS0#

CKE

RST RST RST

A6

A4

A11

A2

A10

A5

A5 A5

A9 A9

A1 A1

WE# WE#

A4 A4

BA2

WE#

BA0

A10 A10

BA0 BA0

BA2

A11A9

A14

A3BA1

ODT

CS1#

CKE

A6

BA2

Place close to the first T point

CLKA1<14,21>

CLKA1#<14,21>

12

OPT@

RV74

RV74 160_0402_1%

160_0402_1%

lace close to RANK1 VRAM

P

+VRAM_1.5VS +VRAM_1.5VS +VRAM_1.5VS

1

CV93

2

OPT@ CV93

OPT@

1U_0402_6.3V6K

1

CV94

2

OPT@ CV94

OPT@

1U_0402_6.3V6K

1

CV92

2

OPT@ CV92

OPT@

1U_0402_6.3V6K

A A

5

4

1

CV95

2

OPT@ CV95

OPT@

1U_0402_6.3V6K

1

CV96

2

OPT@ CV96

OPT@

1U_0402_6.3V6K

1

CV97

2

OPT@ CV97

OPT@

0.1U_0402_10V7K

1

CV98

2

OPT@ CV98

OPT@

0.1U_0402_10V7K

1

CV99

OPT@ CV99

OPT@

0.1U_0402_10V7K

CV101

CV100

2

OPT@CV101

OPT@

OPT@CV100

OPT@

0.1U_0402_10V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/09/28 2013/09/28

1

CV103

CV102

2

OPT@CV103

OPT@

OPT@CV102

OPT@

1U_0402_6.3V6K

Compal Secret Data

1

CV104

2

OPT@CV104

OPT@

1U_0402_6.3V6K

Deciphered Date

1

2

1

CV105

2

OPT@CV105

OPT@

1U_0402_6.3V6K

1

CV106

2

OPT@CV106

OPT@

1U_0402_6.3V6K

2

1

CV107

2

OPT@CV107

OPT@

0.1U_0402_10V7K

1

CV108

2

OPT@CV108

OPT@

0.1U_0402_10V7K

1

CV109

2

OPT@CV109

OPT@

0.1U_0402_10V7K

1

CV111

CV110

2

OPT@CV111

OPT@

OPT@CV110

OPT@

0.1U_0402_10V7K

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

1

CV112

2

22U_0805_6.3V6M

DRANK@ CV112

DRANK@

Compal Electronics, Inc.

VGA_N14x VRAM RANK 0H

1

0.3

of

19 57Monday, March 18, 2013

5

RANK 1 [31...0]

VRAM DDR3 Chips

DQSA[3..0]<14,18>

D D

DQSA#[3..0]<14,18>

DQMA[3..0]<14,18>

MDA[31..0]<14,18>

CMDA[30..0]

C C

B B

DQSA[3..0]

DQSA#[3..0]

DQMA[3..0]

MDA[31..0]

CMDA[30..0]

+MEM_VREF_CA0 +MEM_VREF_DQ0

CLKA0<14,18> CLKA0#<14,18>

RV77

243_0402_1%

DRANK@

0.01U_0402_25V7K

12

CV88

CMDA9 CMDA24 CMDA10 CMDA13 CMDA26 CMDA22 CMDA21 CMDA5 CMDA8 CMDA23 CMDA28 CMDA4 CMDA7 CMDA14 CMDA12

CMDA29 CMDA6 CMDA30

CMDA3

CMDA0 CMDA1 CMDA11 CMDA15 CMDA25

DQSA1 DQSA2

DQMA1 DQMA2

DQSA#1 DQSA#2

ZQ4

12

4

UV7

@

UV7

@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA 310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA12 MDA9 MDA15 MDA8 MDA14 MDA10 MDA11 MDA13

MDA22 MDA18 MDA23 MDA16 MDA21 MDA19 MDA20 MDA17

+VRAM_1.5VS

Group1

Group2

+MEM_VREF_CA0 +MEM_VREF_DQ0

3

CV89

0.01U_0402_25V7K

DRANK@

1

2

243_0402_1%

RV78

DRANK@

CMDA9 CMDA24 CMDA10 CMDA13 CMDA26 CMDA22 CMDA21 CMDA5 CMDA8 CMDA23 CMDA28 CMDA4 CMDA7 CMDA14 CMDA12

CMDA29 CMDA6 CMDA30

CLKA0 CLKA0# CMDA3

CMDA0 CMDA1 CMDA11 CMDA15 CMDA25

DQSA0 DQSA3

DQMA0 DQMA3

DQSA#0 DQSA#3

CMDA20CMDA20

12

UV8

M8

H1

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3

L7 R7 N7 T3 T7

M7

M2

N8

M3

J7 K7 K9

K1

L2

J3 K3

L3

F3 C7

E7 D3

G3 B7

T2

L8

ZQ5

J1

L1

J9

L9

K4B1G1646E-HC12_FBGA96

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

2

Mode E Address

CMD0

Rank 0

0..31

ODT

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA1 MDA6 MDA0 MDA5 MDA3 MDA7 MDA2 MDA4

MDA26 MDA30 MDA24 MDA29 MDA25 MDA31 MDA27 MDA28

+VRAM_1.5VS

Group0

Group3

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

CS0#

CKE

A9

A6

A3

A0

A8

A12

A1

RAS#

A13

BA1

A14

CAS#

RST

A7

A4

A11

A2

A10

A5

BA2

WE#

BA0

1

Rank 1

32..63

ODT

CS1#

CKE

A9

A11

A6

A3

BA1

A0

A8

A0

A1

RAS#RAS#

A13

BA1 A3

A14

A3

A14

CAS#

DT

O

CS0#

CKE

RST

A7CMD21

A4

A6

A5

A11

A2

A1

A10

A5

A4

BA2

WE#

BA0

BA2

32..630..31

A11

A7A7

BA1

A12A12

A8

A0A12

A2A2

RAS#

A14

A13A13

CAS#CAS#

ODT

CS1#

CKE

RSTRST

A6

A5

A9A9

A1

WE#WE#

A4

A10A10

BA0

BA2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/09/28 2013/09/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VGA_N14x VRAM RANK 1L

20 57Monday, March 18, 2013

1

20 57Monday, March 18, 2013

0.3

5

RANK 1[63...32]

VRAM DDR3 Chips

DQSA[7..4]<14,19>

DQSA#[7..4]<14,19>

D D

DQMA[7..4]<14,19>

MDA[63..32]<14,19>

CMDA[30..0]

C C

B B

DQSA[7..4]

DQSA#[7..4]

DQMA[7..4]

MDA[63..32]

CMDA[30..0]

+MEM_VREF_CA1 +MEM_VREF_DQ1

CLKA1<14,19> CLKA1#<14,19>

RV79

243_0402_1%

DRANK@

0.01U_0402_25V7K

12

CV90

CMDA9 CMDA24 CMDA10 CMDA13 CMDA26 CMDA22 CMDA21 CMDA5 CMDA8 CMDA23 CMDA28 CMDA4 CMDA7 CMDA14 CMDA12

CMDA29 CMDA6 CMDA30

CMDA19

CMDA16 CMDA17 CMDA11 CMDA15 CMDA25

DQSA4 DQSA7

DQMA4 DQMA7

DQSA#4 DQSA#7

CMDA20

ZQ6 ZQ7

12

4

UV9

@

UV9

@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA37 MDA35 MDA36 MDA32 MDA39 MDA34 MDA38 MDA33

MDA62 MDA58 MDA63 MDA56 MDA60 MDA59 MDA61 MDA57

+VRAM_1.5VS

Group7

+MEM_VREF_CA1 +MEM_VREF_DQ1

0.01U_0402_25V7K

3

CV91

DRANK@

1

2

RV80

243_0402_1%

DRANK@

CMDA9 CMDA24 CMDA10 CMDA13 CMDA26 CMDA22 CMDA21 CMDA5 CMDA8 CMDA23 CMDA28 CMDA4 CMDA7 CMDA14 CMDA12

CMDA29 CMDA6 CMDA30

CLKA1 CLKA1# CMDA19

CMDA16 CMDA17 CMDA11 CMDA15 CMDA25

DQSA5 DQSA6

DQMA5 DQMA6

DQSA#5 DQSA#6

CMDA20

12

UV10

@

UV10

M8 H1

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

J1

L1

J9

L9

@

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

310mA

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA41 MDA45 MDA40 MDA46 MDA42 MDA47 MDA43 MDA44

MDA50 MDA54 MDA48 MDA55 MDA49 MDA52 MDA51 MDA53

+VRAM_1.5VS

2

Mode E Address

CMD0

Rank 0

0..31

ODT

CMD1

CS0#

CKE

A9

A6

A3

A0

A8

A12

A1

RAS#

A13

BA1

14

A

CAS#

Group5Group4

Group6

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

RST

A7

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

A4

A11

A2

A10

A5

BA2

WE#

BA0

CMD30

1

Rank 1

32..63

ODT

CS1#

CKE

A9

A11

A6

A3

BA1

A0

A8

A0

A1

RAS#RAS#

A13

BA1 A3

A14

A3

A14

CAS#

ODT

CS0#

CKE

RST

A7CMD21

A4

A6

A5

A11

A2

A1

A10

A5

A4

BA2

WE#

BA0

BA2

32..630..31

A11

A7A7

BA1

A12A12

A8

A0A12

A2A2

RAS#

A14

A13A13

CAS#CAS#

ODT

CS1#

CKE

RSTRST

A6

A5

A9A9

A1

WE#WE#

A4

A10A10

BA0

BA2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/09/28 2013/09/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VGA_N14x VRAM RANK 1H

21 57Monday, March 18, 2013

1

21 57Monday, March 18, 2013

0.3

5

4

3

2

1

Mode Configure

+3VS +3VS_RT

100mil 100mil

Close to Pin3

10U_0603_6.3V6M

D D

LVDS@

1

CT1

2

2132S

2132R

C C

B B

※※※※ If use 2132R, please select LDO mode as default.

H_EDP_AUXP<8>

H_EDP_AUXN<8>

H_EDP_TXP0<8>

H_EDP_TXN0<8>

Rshort@

1 2

RT1 0_0603_5%

0.1U_0402_16V4Z

1

2

LVDS@

CT2

0.1U_0402_16V4Z

LVDS@

+DP_V33

1

CT3

2

SWR / LDO Mode select

LDO SWR

D

o not support mount LT3

Use 0 ohm mount LT3

Close to LT2

0.1U_0402_16V4Z

10U_0603_6.3V6M

1

CT4

2

LVDS@

+3VS_RT

EC_SMB_CK3<44> EC_SMB_DA3<44>

IEDP@

1 2

C7 0.1U_0402_10V6K

IEDP@

1 2

C8 0.1U_0402_10V6K

LVDS@

1 2

C9 0.1U_0402_10V6K

LVDS@

1 2

C10 0.1U_0402_10V6K

LVDS@

1 2

C11 0.1U_0402_10V6K

LVDS@

1 2

C12 0.1U_0402_10V6K

IEDP@

1 2

C13 0.1U_0402_10V6K

IEDP@

1 2

C14 0.1U_0402_10V6K

Close to Pin18 Close to LT3

0.1U_0402_16V4Z

22U_0603_6.3V6M

CT5

LVDS@

Close to Pin13

100mil 40mil

H_EDP_HPD<23,8>

1

CT7

CT6

2

LVDS@

LT1

LT1 FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

LVDS@

LT2

LT2 FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

12K_0402_1%

Close to Pin8

H_EDP_AUXP_C_R

H_EDP_AUXN_C_R

H_EDP_AUXP_C_TL

H_EDP_AUXN_C_TL

H_EDP_TXP0_C_TL

H_EDP_TXN0_C_TL

H_EDP_TXP0_C_R

H_EDP_TXN0_C_R

+SWR_VDD

0.1U_0402_16V4Z

1

CT8

2

LVDS@

12

+DP_V33

12

+SWR_VDD

+SWR_V12

H_EDP_AUXP_C_TL H_EDP_AUXN_C_TL

H_EDP_TXP0_C_TL H_EDP_TXN0_C_TL

RT8

LVDS@

1 2

LCD_EDID_CLK_TL LCD_EDID_DATA_TL LCD_TL_TXOUT0LCD_TL_TXOUT0+

H_EDP_AUXP_C_R H_EDP_AUXN_C_R H_EDP_TXN0_C_R H_EDP_TXP0_C_R

40mil

100mil

40mil 40mil 40mil 40mil

3

13 18

12 11 27

7

2 1

5 6

9

10

32

8 4

UT2

DP_V33

SWR_VDD PVCC

SWR_LX SWR_VCCK VCCK DP_V12

AUX_P AUX_N

LANE0P LANE0N

CIICSCL1 CIICSDA1

HPD

DP_REXT DP_GND

LVDS@

0.1U_0402_16V4Z

22U_0603_6.3V6M

1

CT9

2

LVDS@

Power

LVDS

RTD2132R

DP-IN

GPIO(PWM OUT)

GPIO(Panel_VCC)

GPIO(PWM IN)

GPIO

LVDS

Other

EDID

ROM

RTD2132R-VE-CG_QFN32_5X5

RP4

LVDS@RP4

LVDS@

1 8 2 7 3 6 4 5

0_0804_8P4R_5%

RP5

IEDP@RP5

IEDP@

1 8 2 7 3 6 4 5

0_0804_8P4R_5%

1

CT10

2

TXEC+

TXEC-

TXE2+ TXE2-

TXE1+ TXE1-

TXE0+ TXE0-

GPIO(BL_EN)

MIICSCL1

MIICDA1

MIICSCL0 MIICSDA0

GND

0.1U_0402_16V4Z

1

CT11

2

LVDS@

Close to Pin27

19 20

21 22

23 24

25 26

14 15

80mil

16 17

29

LCD_EDID_CLK_TL

28

LCD_EDID_DATA_TL

31 30

33

0.1U_0402_16V4Z

1

2

LVDS@

Close to Pin7

LCD_TL_TXOUT1+ LCD_TL_TXOUT1-

LCD_TL_TXOUT0+ LCD_TL_TXOUT0-

+LCD_VDD_TL

MIIC_SCL MIIC_SDA

CT12

+SWR_V12

LCD_TXCLK+ <23> LCD_TXCLK- <23>

LCD_TXOUT2+ <23> LCD_TXOUT2- <23>

TL_INVT_PWM <23>

PCH_PWM_TL <31>

EC_ENBKL <23,31,44>

LCD_EDID_CLK <23> LCD_EDID_DATA <23> LCD_TXOUT0- <23> LCD_TXOUT0+ <23>

ROM only mode : PIN 30 4.7k pull low, Pin 31 4.7k pull high.

※

EP mode : PIN 30 4.7k pull high, Pin 31 4.7k pull low. EEPROM : PIN 30 4.7k pull high, Pin 31 4.7k pull high.

〈 ※

Default mode

MIIC_SDA MIIC_SCL

IN30

LCD_EDID_DATA_TL

LCD_EDID_CLK_TL

2132S

2132R

* Version R internal Power Switch, can output 1A, Rds(on)=0.2 ohm

〉

+3VS_RT +3VS_RT

RT4

@

4.7K_0402_5%

1 2

RT6

4.7K_0402_5%LVDS@

1 2

LVDS@

1 2

RT9 4.7K_0402_5%

LVDS@

1 2

RT10 4.7K_0402_5%

P

IN15

TL_ENVDD

+LCD_VDD *

PIN16 Accept voltage input (high level)

2132S

2132R

* Version R has internal level shifter, remove

level shifter circuit on AMD platform

PIN31P

+3VS_RT

LVDS@

1.5~3.3V

1 2

3.3V

Different between 2132S and 2132R

2132R2132S

1. Support SWR mode

1. Support LDO mode and SWR mode

2. Internal ROM

3. Support LCD_VDD(internal Power switch)

4. Integrates Level shifter

RT12

4.7K_0402_5%

RT7

4.7K_0402_5%@

Place co-lay Resistor back to back on TOP and BOT

IEDP@

Remove RT106 on PreMP

IEDP@

1 2

C914 0.1U_0402_10V7K

H_EDP_TXP1<8> LCD_TXOUT1+ <23>

A A

LCD_TL_TXOUT1+

LCD_TL_TXOUT1-

5

C914 0.1U_0402_10V7K

IEDP@

1 2

C915 0.1U_0402_10V7K

LVDS@

1 2

R524 0_0402_5%

LVDS@

1 2

R490 0_0402_5%

LCD_TXOUT1- <23>H_EDP_TXN1<8>

4

+LCD_VDD_TL

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

RT106 0_0805_5%

LVDS@

Close to Pin15

3

2

CT13

4.7U_0603_6.3V6K

C

lose to Panel conn.

2011/06/30 2013/06/30

LVDS@

1

Compal Secret Data

12

RT113

RT113 100K_0402_5%

100K_0402_5%

LVDS@

Deciphered Date

+LCD_VDD

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LVDS Translator - RTD2132S

VSKAA

1

of

22 57Monday, March 18, 2013

0.3

A

B

C

D

E

@TOUCH_EMI@

1 2

R104 0_0402_5%

TOUCH_EMI@

3

1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

31 32 33 34 35

1

4

WCM-2012-900T_0805

L57

@TOUCH_EMI@

1 2

R105 0_0402_5%

L55

CAM_EMI@

4

1

WCM-2012-900T_0805

2

D89

D89 YSLC05CH_SOT23-3

YSLC05CH_SOT23-3

@ESD@

+5VS_LVDS_TOUCH USB20_N8_R USB20_P8_R BKOFF#

USB20_P11_R USB20_N11_R +3VS_LVDS_CAM

LED_PWM BKOFF#_R

BTO : TOUCH@EMI@

1 1

2 2

3 3

USB20_P8_R

USB20_N8_R

USB20_P11_R

USB20_N11_R

JLVDS

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

GND GND GND GND GND

Conn@

2

3

2

R389 0_0603_5%

USB20_P8 <32>

USB20_N8 <32>

INT_MIC_DATA INT_MIC_CLK

Rshort@

1 2

+LCD_VDD

LCD_EDID_CLK <22> LCD_EDID_DATA <22> LCD_TXOUT0- <22> LCD_TXOUT0+ <22> LCD_TXOUT1- <22> LCD_TXOUT1+ <22> LCD_TXOUT2- <22> LCD_TXOUT2+ <22>

LCD_TXCLK- <22> LCD_TXCLK+ <22> H_EDP_HPD <22,8>

+LCD_INV

+LCD_INV B+

FBMA-L11-201209-221LMA30T_0805

USB20_P11 <32>

USB20_N11 <32>

R390 0_0603_5%

Irush=1.5A

L2

EMI@

Rshort@

1 2

60mils

12

INT_MIC_DATA <42>

INT_MIC_CLK <42>

60m

ils

+5VS

+3VS

20mils

+3VS

20mils

When you use 2132R series type of LVDS translator, You can delete this portion. If you use 2132S, please don't.

Reserve for power consumption

+3VS

W=80mils

+LCD_VDD_SS

12

IEDP@

C17

0.015u_0402_16V_X7R

U18

5

4

INT_MIC_DATA

INT_MIC_CLK

VOUT

VIN

GND

SS

APL3512ABI-TRG_SOT23-5

IEDP@

1

2

3

EN

D3

ESD@

CK0402101V05_0402-2

CK0402101V05_0402-2 D2

D2

ESD@

CK0402101V05_0402-2

Remove R83 on PreMP

=80mils W=80mils

W

+LCD_VDD_OUT

R112

100K_0402_5%

IEDP@

12

1 2

R83 0_0805_5%

IEDP@

LCD_ENVDD <31>

+LCD_VDD

@TOUCH_EMI@

LCD POWER CIRCUIT (For EDP panel only)

Reserve for eDP panel

IEDP@

1 2

R103 0_0402_5%

BKOFF#_R

4 4

1 2

D16 RB751V40_SC76-2

LVDS@

12

R114

R114 10K_0402_5%

10K_0402_5%

A

+3VS

IEDP@

5

U19

1

P

IN1

4

O

2

BKOFF#

IN2

G

3

SN74AHC1G08DCKR_SC70-5

1 2

R147 0_0402_5%

LVDS@

R

eserve for LVDS panel

EC_ENBKL <22,31,44>

BKOFF# <44>

IEDP@

1 2

D17 RB751V40_SC76-2

12

1 2

D18 RB751V40_SC76-2

LVDS@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LED_PWM

R131

47K_0402_5%

B

PCH_PWM_EDP <31>

TL_INVT_PWM <22>

C

Compal Secret Data

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

LVDS

VSKAA

23 57Monday, March 18, 2013

E

0.3

5

4

3

2

1

Default to PS8401 & PS8201 I2C Control Mode

2

EHDMI@

C196

C197

1

0.1U_0402_16V7K

0.01U_0402_25V7K

EC_SMB_DA2<13,30,37,44>

EC_SMB_CK2<13,30,37,44>

UMA_HDMI_DATA<25,31>

UMA_HDMI_CLK<25,31>

HDMI_HPD<25,31,33>

0.01U_0402_25V7K

+3VS

Become I2C Bus Control

Become

2C Bus

I Control

NC

+3VS

EHDMI@

EHDMI@ 1 2

R167

4.7K_0402_5%

@

1 2

4.7K_0402_5%

@

1 2

4.7K_0402_5%

R79

4.99K_0402_1%

EHDMI@

D D

HDMI_TXD0+_C_U<25> HDMI_TXD0-_C_U<25>

I2C Mode HDMI ID Setting

If PS8401 use I2C Mode , EQ=I2C_ADDR0 , CFG = I2C_AD

For PS8401 I2C control bus address LSB; Internal pull down at 150kohz±20%, 3.3V I/O. [I2C_ADDR1, I2C_ADDR0] ; I2C Address (W/R)= LL: 0x4C/4D (default) LH: 0x5C/5D HL: 0xCC/CD HH: 0xEC/ED

DR1

Use Automatic Power Management ; PD# set to NC Interanl pull up at 150kΩ±20% 3.3 I/O

I2C Control Mode Use; Pull up 3.3VS Power at EC Side

HDMI_TXD1+_C_U<25> HDMI_TXD1-_C_U<25> HDMI_TXD2+_C_U<25> HDMI_TXD2-_C_U<25> HDMI_TXC+_C_U<25> HDMI_TXC-_C_U<25>

If PS8401 use I2C Mode , EQ=I2C_ADDR

For PS8201

2C control bus address LSB; Internal pull down at ~150k ohz, 3.3V I/O.

I [I2C_ADDR] ; I2C Address (W/R)= L: 0x64/65 (default) H: 0xE4/E5

C C

Strap

H:3.3V M:1.65V L:0V

PS8401

DescriptionNet name

DCIN_EN

DDCBUF Enable active DDC buffer; Internal pull down at 150k?±20%, 3.3V I/O.

ISET

B B

CFG CFG: Configuration pin, 3.3V IO, internal pull down at 150kΩ±20%. 3.3V I/O

DC cou;ing enable; Internal pull down at 150k ohz ±20%, 3.3V I/O. L: default, AC coupling input H: DC coupling input

L: default, passive DDC pass-through H: active DDC buffer with default threshold M: active DDC buffer without internal pull up resistor

TMDS output swing adjustment; Internal pull down at 150kΩ±20%, 3.3V I/O. For PS8401 Only ISET = L: Default H: Increase +13% M: Reduce -13%

CFG = L: HDMI ID disable H: HDMI ID enable

Pin Control Mode I2C Control Mode

L

M

L

H

Re-dirver to CPU

Become I

2C Bus

Control

Become I2C Bus Control

NC

PS8201

in Control Mode I2C Control Mode

P

L

M

N

C

H

2

EHDMI@

C186

1

0.1U_0402_16V7K

For Pin 37For Pin 11 For Pin 12 For Pin 31 For Pin 19 For Pin 20 For Pin 40

6 7 4 5 1 2 9

10

36

8

13 14

34

38 39

23

R168

17

R169

16

3

18

12

11

37

12

U17

IN_D0p IN_D0n IN_D1p IN_D1n IN_D2p IN_D2n IN_CKp IN_CKn

PD#

I2C_CTL_EN

DCIN_EN / SCL_CTL DDCBUF / SDA_CTL

ISET / NC

SCL_SRC SDA_SRC

CFG/I2C_ADDR1 / I2C_ADDR

EQ / I2C_ADDR0 PRE

HPD_SRC

REXT

40

VDD33

VDD33 / NC

VDDRX / NC

GND / NC

GND

GND_PAD

PS8401ATQFN40GTR-A3_TQFN40_5X5

15

35

41

SA00005CW00

SA00005CW00SA00005CW00

20

VDDTX / VDD15

VDDRX / VDD15

31

19

VDDTX / VDD15

VDDTA / VDD15

OUT_D0p OUT_D0n OUT_D1p OUT_D1n OUT_D2p

OUT_D2n OUT_CKp OUT_CKn

SCL_SNK SDA_SNK

HPD_SNK

EHDMI@

2

EHDMI@

C194

C195

1

0.01U_0402_25V7K

25 24 27 26 30 29 22 21

32 33

28

2

EHDMI@

C182

1

HDMI_SCLK <25> HDMI_SDATA <25>

HDMI_HPD_C <25>

C183

0.1U_0402_16V7K

Connector to Re-dirver

2

8401@

1

0.1U_0402_16V7K

2

EHDMI@

C187

C185

1

0.1U_0402_16V7K

HDMI_TXD0+_U <25> HDMI_TXD0-_U <25> HDMI_TXD1+_U <25> HDMI_TXD1-_U <25> HDMI_TXD2+_U <25> HDMI_TXD2-_U <25> HDMI_TXC+_U <25> HDMI_TXC-_U <25>

2

1

0.1U_0402_16V7K

+1.5VS+3VS

EQ

PRE

I2C_CTL_EN

A A

Note: PS8401 have Jitter cleaning function and can

EQ:Receiver equalization setting;; Internal pull down at ~150k?, 3.3V I/O. For PS801 EQ = L:programmable EQ for channel loss up to 6.5dB @ 3.0Gbps H:programmable EQ for channel loss up to 9.5dB @ 3.0Gbps M:programmable EQ for channel loss up to 3dB @ 3.0Gbps

For PS8401 EQ = L:programmable EQ for channel loss up to 12.4dB H:programmable EQ for channel loss up to 4.3dB M:programmable EQ for channel loss up to 8.6dB

Output pre-emphasis setting; Internal pull down at 150kΩ±20%, 3.3V I/O. PRE = L: No pre-emphasis H: 1.6dB pre-emphasis M: 2.5dB pre-emphasis

I2C Control enable. Internal pull down at 150kΩ±20%. 3.3V I/O I2C_CTL_EN = LOW (L): Pin Control is selected. HIGH (H): I2C Control is selected.

control TMDS output swing , PS8201 don't have.

5

4

M

L

M

L

N

CNC

NCNC

H LL H

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/??/?? 2015/??/??

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HDMI Re-driver

PS8201A & PS8401A

1

of

24 57Monday, March 18, 2013

0.3

A

H_HDMI_TXC+<8>

H_HDMI_TXC-<8>

1 1

2 2

H_HDMI_TX0+<8>

H_HDMI_TX0-<8>

H_HDMI_TX1+<8>

H_HDMI_TX1-<8>

H_HDMI_TX2+<8>

H_HDMI_TX2-<8>

+HDMI_5V_OUT

1

5

P

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

IHDMI@

3

U9

4

IHDMI@

1 2

C16 0 .1U_0402_10V7K

EHDMI@

1 2

C29 0 .1U_0402_10V7K

IHDMI@

1 2

C22 0 .1U_0402_10V7K

EHDMI@

1 2

C30 0 .1U_0402_10V7K

IHDMI@

1 2

C23 0 .1U_0402_10V7K

EHDMI@

1 2

C31 0 .1U_0402_10V7K

IHDMI@

1 2

C24 0 .1U_0402_10V7K

EHDMI@

1 2

C32 0 .1U_0402_10V7K

IHDMI@

1 2

C25 0 .1U_0402_10V7K

EHDMI@

1 2

C33 0 .1U_0402_10V7K

IHDMI@

1 2

C26 0 .1U_0402_10V7K

EHDMI@

1 2

C34 0 .1U_0402_10V7K

IHDMI@

1 2

C27 0 .1U_0402_10V7K

EHDMI@

1 2

C35 0 .1U_0402_10V7K

IHDMI@

1 2

C28 0 .1U_0402_10V7K

EHDMI@

1 2

C36 0 .1U_0402_10V7K

R145

1 2

1K_0402_5%

IHDMI@

HDMI_HPD

100K_0402_5%

R186

IHDMI@

HDMI_HPD_CHDMI_HPD_U

2

1

1 2

C265

0.1U_0402_10V7K

IHDMI@

HDMI_HPD

B

H_DVI_TXC+

H_DVI_TXC-

H_DVI_TXD0+

H_DVI_TXD0-

H_DVI_TXD1+

H_DVI_TXD1-

H_DVI_TXD2+

H_DVI_TXD2-

IHDMI@

R571

2.2K_0402_5%

HDMI_TXC+_C_U <24>

HDMI_TXC-_C_U <24>

HDMI_TXD0+_C_U <24>

HDMI_TXD0-_C_U <24>

HDMI_TXD1+_C_U <24>

HDMI_TXD1-_C_U <24>

HDMI_TXD2+_C_U <24>

HDMI_TXD2-_C_U <24>

12

+3VS

HDMI_HPD <24,31,33>

C

D

HDMI TMDS BUS

Componet close to Conn. Impedance depend on platform design guide

+HDMI_5V_OUT

+3VS

RP3

1 8 2 7 3 6 4 5

2.2K_0804_8P4R_5%

UMA_HDMI_CLK<24,31>

UMA_HDMI_DATA<24,31>

HDMI_SCLK HDMI_SDATA UMA_HDMI_CLK UMA_HDMI_DATA

UMA_HDMI_CLK

UMA_HDMI_DATA

2

3 1

SGD

BSH111_SOT23-3

IHDMI@

HDMI POWER CIRCUIT

VIN = 5V, IOUT = 0.5A , RDS(ON) TYP=95m ; MAX=115m Current Limit: TYP=0.8A ; MAX=1A

+3VS+3VS

2

3 1

SGD

BSH111_SOT23-3

IHDMI@

Q19

PS8401 PS8201

Q18

E

Choke

Colay ResistorColay Cap

ZZZ

HDMI45@ZZZ

HDMI Royalty

HDMI45@

RO0000003HM

HDMI W/Logo + HDCP

HDMI W/O Logo: RO0000001HM HDMI W/Logo: RO0000002HM HDMI W/Logo + HDCP: RO0000003HM

please manually load this virtual material to 45@ BOM

HDMI_SCLK

HDMI_SDATA

HDMI_SCLK <24>

HDMI_SDATA <24>

IHDMI@

H_DVI_TXC+

HDMI_TXC+_U<24>

3 3

4 4

HDMI_TXC-_U<24>

H_DVI_TXC-

H_DVI_TXD0-

HDMI_TXD0-_U<24 >

HDMI_TXD0+_U<24>

H_DVI_TXD0+

H_DVI_TXD1+

HDMI_TXD1+_U<24>

HDMI_TXD1-_U<24 >

H_DVI_TXD1-

H_DVI_TXD2-

HDMI_TXD2-_U<24 >

HDMI_TXD2+_U<24>

H_DVI_TXD2+

A

1 2

R9 0_0402_5%

EHDMI@

1 2

R6 0_0402_5%

EHDMI@

1 2

R7 0_0402_5%

IHDMI@

1 2

R8 0_0402_5%

IHDMI@

1 2

R14 0_0402_5%

EHDMI@

1 2

R11 0_0402_5%

EHDMI@

1 2

R12 0_0402_5%

IHDMI@

1 2

R13 0_0402_5%

IHDMI@

1 2

R18 0_0402_5%

EHDMI@

1 2

R15 0_0402_5%

EHDMI@

1 2

R16 0_0402_5%

IHDMI@

1 2

R17 0_0402_5%

IHDMI@

1 2

R22 0_0402_5%

EHDMI@

1 2

R19 0_0402_5%

EHDMI@

1 2

R20 0_0402_5%

IHDMI@

1 2

R21 0_0402_5%

L8

H_DVI_TXC+_R

H_DVI_TXC-_R

H_DVI_TXD0-_R

H_DVI_TXD0+_R

H_DVI_TXD1+_R

H_DVI_TXD1-_R

H_DVI_TXD2-_R

H_DVI_TXD2+_R

1

4

WCM-2012HS-900T_4P

4

1

L9

L10

1

4

WCM-2012HS-900T_4P

4

1

L11

Common CHOKE use 90ohm

B

EMI@

EMI@L9

EMI@

EMI@L11

EMI@

2

HDMI_R_CK+

2

3

HDMI_R_CK-

3

HDMI_R_D0-

3

2

HDMI_R_D0+

2

HDMI_R_D1+

2

3

HDMI_R_D1-

3

HDMI_R_D2-

3

2

HDMI_R_D2+

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

+HDMI_5V_OUT

1

C259

0.1U_0402_10V7K

2

HDMI_R_D0+ HDMI_R_D0HDMI_R_CK+ HDMI_R_CK-

HDMI_R_D2+ HDMI_R_D2HDMI_R_D1+ HDMI_R_D1-

Compal Secret Data

2012/04/19 2015/04/19

Compal Secret Data

RP1

IHDMI@RP1

IHDMI@

1 8 2 7 3 6 4 5

680_8P4R_5%

RP2

IHDMI@RP2

IHDMI@

1 8 2 7 3 6 4 5

680_8P4R_5%

+5VS

U16

1

OUT

2

GND

3

FLG

AP2151DWG-7_SOT25-5

SA00006H000

Q24

2

G

Deciphered Date

5

IN

4

EN

13

D

IHDMI@

S

2N7002KW_SOT323-3

D

+5VS

HDMI_HPD_C<24>

+HDMI_5V_OUT

HDMI Connector

JHDMI

HDMI_HPD_C

HDMI_SDATA HDMI_SCLK

HDMI_R_CK-

HDMI_R_CK+ HDMI_R_D0-

HDMI_R_D0+ HDMI_R_D1-

HDMI_R_D1+ HDMI_R_D2-

HDMI_R_D2+

Title

Size Document Number Rev

Date: Sheet of

19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

TYCO_2041343-1~D

Compal Electronics, Inc.

HDMI Conn.

VSKAA

HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CKCK_shield CK+ D0D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+

GND GND GND GND

Conn@JHDMI

Conn@

23 22 21 20

25 57Monday, March 18, 2013

E

0.3

A

B

C

D

E

CRT CONNECTOR

BTO : CRT_EMI@

1 1

UMA_CRT_R<31>

UMA_CRT_G<31>

UMA_CRT_B<31>

CRT@

1

C239

C238

R138

R138 150_0804_8P4R_1%

150_0804_8P4R_1%

CRT@

1 8

2 7

3 6

4 5

2 2

3 3

C238

UMA_CRT_DATA<31>

UMA_CRT_CLK<31>

UMA_CRT_VSYNC<31>

UMA_CRT_HSYNC<31>

2

2.2P_0402_50V8C

+HDMI_5V_OUT

2

CRT_EMI@

1 2

L3 NBQ100505T-800Y_0402

CRT_EMI@

1 2

L4 NBQ100505T-800Y_0402

CRT_EMI@

1 2

L5 NBQ100505T-800Y_0402

CRT@

1

C240

2

2.2P_0402_50V8C

+5VS

+3VS

CRT@

C241

CRT@

1

C242

2

2.2P_0402_50V8C

1

2

7

10

11

13

15

6

CRT@

1

C243

2

2.2P_0402_50V8C

U3

CRT@

VCC_SYNC

VCC_VIDEO

VCC_DDC

DDC_IN1

DDC_IN2

SYNC_IN1

SYNC_IN2

GND

TPD7S019-15DBQR_SSOP16

SYNC_OUT1

SYNC_OUT2

BYP

VIDEO1

VIDEO2

VIDEO3

DDC_OUT1

DDC_OUT2

CRT_R_L

CRT_G_L

CRT_B_L

8

3

4

5

9

12

14

16

CRT@

1 2

C15 0.22U_0402_16V7K

CRT_R_L

CRT_G_L

CRT_B_L

R62

VSYNC_R

R63

HSYNC_R

+HDMI_5V_OUT

4.7K_0402_5%

CRT@

1 2

CRT@

1 2

R153

CRT@

22_0402_5%

T65, T66: for ATE

CRT_R_L

CRT_DDC_DAT CRT_G_L

HSYNC CRT_B_L

VSYNC

CRT_DDC_CLK

+HDMI_5V_OUT

R159

4.7K_0402_5%

CRT@

1 2

VSYNC

HSYNC

TP@

T65 PAD

TP@

T66 PAD

CRT_DDC_DAT

CRT_DDC_CLK

JCRT

6

11

1 7

12

2 8

13

3 9

14

G

4

G

10 15

5

C-H_13-12201513CP

Conn@

16 17

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/11/11 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

CRT

VSKAA

26 57Monday, March 18, 2013

E

0.3

A

1 1

+RTCVCC

CMOS Setting, near DDR Door

1 2

PCH_RTCRST#

PCH_SRTCRST#

1U_0402_6.3V6K

RH23

RH23 20K_0402_5%

20K_0402_5%

iME Setting.

RH24

RH24 20K_0402_5%

20K_0402_5%

CH4

CH5

JCMOS SP@JCMOS SP@

1 2

JME SP@JME SP@

1 2

Placement near to YH1

PCH_RTCX1_R<38>

Integrated SUS 1.05V VRM Enable

PCH_INTVRMEN

+3VALW_PCH

+RTCVCC

2 2

+3VS

3 3

High - Enable Internal VRs (must be always pulled high)

12

RH207 1K_0402_5%RH207 1K_0402_5%

1 2

RH12

RH33

RH36 1K_0402_5%

*

HDA_SDO

ME debug mode, this signal has a weak internal pull down Low = Disable (default)

*

High = Enable (flash descriptor security overide)

1M_0402_5%

1 2

330K_0402_5%

@

1 2

PCH_SPKR

igh = Enabled "No Reboot Mode"

H Low = Disabled (Default)

AZ_BITCLK_HD<42> AZ_SDOUT_HD<42> AZ_RST_HD#<42> AZ_SYNC_HD<42>

EC_LID_OUT#

SM_INTRUDER#

PCH_INTVRMEN

PCH_SPKR

RPH1

1 8 2 7 3 6 4 5

33_8P4R_5%

EMI@

AZ_BITCLK AZ_SDOUT AZ_RST# AZ_SYNC

B

1 2

PCH_RTCX1

GCLK@

RH26 0_0402_5%

32.768KHZ_12.5P_1TJF125DP1A000D

PCH_SPKR<42>

AZ_SDIN0_HD<42>

PWRME_CTRL<44>

EC_LID_OUT#<44>

12

NOGCLK@

CH2 15P_0402_50V8J

YH1

NOGCLK@

12

NOGCLK@

CH3 15P_0402_50V8J

Rshort@

1 2

RH25 0_0402_5%

Rshort@

1 2

RH27 0_0402_5%

1 2

T45 PADTP@T45 PADTP@

T9 PADTP@T9 PADTP@

T10 PADTP@T10 PADTP@

T11 PADTP@T11 PADTP@

RH2

10M_0402_5%

12

PCH_RTCX1

PCH_RTCX2

PCH_SRTCRST#

SM_INTRUDER#

NOGCLK@

PCH_INTVRMEN

PCH_RTCRST#

AZ_BITCLK

AZ_SYNC

PCH_SPKR

AZ_RST#

AZ_SDOUT

EC_LID_OUT#_R

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

C

UH1A

B5

RTCX1

B4

RTCX2

B9

SRTCRST#

A8

INTRUDER#

G10

INTVRMEN

D9

RTCRST#

B25

HDA_BCLK

A22

HDA_SYNC

AL10

SPKR

C24

HDA_RST#

L22

HDA_SDI0

K22

HDA_SDI1

G22

HDA_SDI2

F22

HDA_SDI3

A24

HDA_SDO

B17

DOCKEN#/GPIO33

C22

HDA_DOCK_RST#/GPIO13

AB3

JTAG_TCK

AD1

JTAG_TMS

AE2

JTAG_TDI

AD3

JTAG_TDO

F8

TP25

C26

TP22

AB6

TP20

H82LPMS-QC4C-A1_FCBGA695~D

D

LPT_PCH_M_EDS

JTAGRTC AZALIA

1 OF 11

HM86

SATA

Gen3

SATA_RXN_0 SATA_RXP_0

Gen2

SATA_TXN_0 SATA_TXP_0

SATA_RXN_1 SATA_RXP_1

NA

SATA_TXN_1 SATA_TXP_1

SATA_RXN_2 SATA_RXP_2

Gen2

SATA_TXN_2 SATA_TXP_2

SATA_RXN_3 SATA_RXP_3

NA

SATA_TXN_3 SATA_TXP_3

SATA_RXN4/PERN1

SATA_RXP4/PERP1

SATA_TXN4/PETN1

SATA_TXP4/PETP1

SATA_RXN5/PERN2

SATA_RXP5/PERP2

SATA_TXN5/PETN2

SATA_TXP5/PETP2

SATA_RCOMP

SATA0GP/GPIO21

SATA1GP/GPIO19

D

SATALED#

SATA_IREF

E

BC8 BE8

AW8 AY8

BC10 BE10

AV10 AW10

BB9 BD9

AY13 AW13

BC12 BE12

AR13 AT13

BD13 BB13

AV15 AW15

BC14 BE14

AP15 AR15

AY5

SATAICOMP

AP3

AT1

PCH_GPIO21

AU2

PCH_GPIO19

BD4

SATAIREF

BA2

TP9

BB2

TP8

RH43 7.5K_0402_1%RH43 7.5K_0402_1%

Un-mount for reduce power consumption at S0, S3 stat

1 2

+RTCVCC

SATA_PRX_C_DTX_N2 <37> SATA_PRX_C_DTX_P2 <37>

SATA_PTX_DRX_N2 <37> SATA_PTX_DRX_P2 <37>

SATA_PRX_C_DTX_N4 <37> SATA_PRX_C_DTX_P4 <37>

SATA_PTX_DRX_N4 <37> SATA_PTX_DRX_P4 <37>

PCH_GPIO21

PCH_GPIO19

+1.5VS

1

2

3

1

CH15

0.1U_0402_10V7K

2

ODD

H

DD

RH34 10K_0402_5%RH34 10K_0402_5%

RH28 10K_0402_5%RH28 10K_0402_5%

BOOT BIOS Strap Bit 0

DH2

DH2 BAS40-04_SOT23-3

BAS40-04_SOT23-3

12

1 2

+RTCBATT

+3VL

e

+3VS

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PCH_HDA/JTAG/SATA

VSKAA

E

0.3

of

27 57Monday, March 18, 2013

A

B

C

D

E

+3VALW_PCH

12

RH235 10K_0402_5%RH235 10K_0402_5%

1 1

2 2

RH158 10K_0402_5%RH158 10K_0402_5%

RH156 10K_0402_5%RH156 10K_0402_5%

RH169 10K_0402_5%RH169 10K_0402_5%

RH284 10K_0402_5%RH284 10K_0402_5%

12

PCH_SUSPWRDN#_R

RI#

PCH_LOW_BAT#

PCH_RSMRST#

PM_PWROK

PCH_SUSPWRDN#<44>

+3VALW_PCH

ACIN<44,47,49>

DMI_CTX_PRX_N0<6> DMI_CTX_PRX_N1<6>

DMI_CTX_PRX_N2<6> DMI_CTX_PRX_N3<6>

DMI_CTX_PRX_P0<6> DMI_CTX_PRX_P1<6>

DMI_CTX_PRX_P2<6> DMI_CTX_PRX_P3<6>

DMI_PTX_CRX_N0<6> DMI_PTX_CRX_N1<6>

DMI_PTX_CRX_N2<6> DMI_PTX_CRX_N3<6>

DMI_PTX_CRX_P0<6> DMI_PTX_CRX_P1<6>

DMI_PTX_CRX_P2<6> DMI_PTX_CRX_P3<6>

+1.5VS

SUSACK#<44>

+3VS

VGATE<44,54>

PM_PWROK<44>

DRAMPWROK<5>

PCH_RSMRST#<44>

PBTN_OUT#<44>

1 2

RH168 330K_0402_5%RH168 330K_0402_5%

CH751H-40PT_SOD323-2

DMI_IREF

1 2

RH48 7.5K_0402_1%RH48 7.5K_0402_1%

1 2

Rshort@

RH283 0_0402_5%

1 2

DH8

21

DMI_RCOMP

1 2

SUSACK#_R

@

RH134 0_0402_5%

1 2

@

SYS_RESET#

SYS_PWROK

PM_PWROK

PCH_RSMRST#

PCH_SUSPWRDN#_R

RH1 1K_0402_1%RH1 1K_0402_1%

RH135 0_0402_5%

PCH_ACIN

PCH_LOW_BAT#

RI#

UH1B

AW22

DMI_RXN_0

AR20

DMI_RXN_1

AP17

DMI_RXN_2

AV20

DMI_RXN_3

AY22

DMI_RXP_0

AP20

DMI_RXP_1

AR17

DMI_RXP_2

AW20

DMI_RXP_3

BD21

DMI_TXN_0

BE20

DMI_TXN_1

BD17

DMI_TXN_2

BE18

DMI_TXN_3

BB21

DMI_TXP_0

BC20

DMI_TXP_1

BB17

DMI_TXP_2

BC18

DMI_TXP_3

BE16

DMI_IREF

AW17

TP12

AV17

TP7

AY17

DMI_RCOMP

R6

SUSACK#

AM1

SYS_RESET#

AD7

SYS_PWROK

F10

PWROK

AB7

APWROK

H3

DRAMPWROK

J2

RSMRST#

J4

SUSWARN#/SUSPWRNACK/GPIO30

K1

PWRBTN#

E6

ACPRESENT/GPIO31

K7

BATLOW#/GPIO72

N4

RI#

AB10

TP21

D2

SLP_WLAN#/GPIO29

LPT_PCH_M_EDS

DMI

System Power

Management

H82LPMS-QC4C-A1_FCBGA695~D

D

FDI

FDI_RCOMP

DSWVRMEN

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

4 OF 11

FDI_RXN_0

FDI_RXN_1

FDI_RXP_0

FDI_RXP_1

TP16

TP15

TP10

FDI_CSYNC

FDI_INT

FDI_IREF

TP17

TP13

DPWROK

WAKE#

CLKRUN#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN#

AJ35

AL35

AJ36

AL36

AV43

AY45

TP5

AV45

AW44

AL39

AL40

AT45

FDI_IREF

AU42

AU44

AR44

FDI_RCOMP

RH49 7.5K_0402_1%RH49 7.5K_0402_1%

C8

DSWVREN

L13

PCH_RSMRST#

K3

PCIE_WAKE#

AN7

PM_CLKRUN#

U7

SUS_STAT#

Y6

Y7

C6

H1

F3

PM_SLP_A#

F1

PM_SLP_SUS#

AY3

G5

1 2

TP@

T90 PAD

T92 PAD TP@T92 PAD TP@

T91 PAD TP@T91 PAD TP@

FDI_CTX_PRX_N0 <8>

FDI_CTX_PRX_N1 <8>

FDI_CTX_PRX_P0 <8>

FDI_CTX_PRX_P1 <8>

FDI_CSYNC <6>

FDI_INT <6>

+1.5VS

PCIE_WAKE# <39,44>

32.768 KHz

CLK_EC <44>

PM_SLP_S5# <44>

PM_SLP_S4# <44>

PM_SLP_S3# <44>

H_PM_SYNC <5>

+RTCVCC

DSWVREN

RH152 330K_0402_5%RH152 330K_0402_5%

12

DSWVREN must be always pulled high to +RTCVCC

DSWVREN - Internal Deep Sleep 1.05V regulator

：：：：

Enable

H

*

L

：：：：

Disable

@

PM_CLKRUN#

PCIE_WAKE#

1 2

RH172 10K_0402_5%

1 2

RH171 10K_0402_5%RH171 10K_0402_5%

+3VALW_PCH

3 3

DH9

12

PCH_SUSPWRDN#_RSUSACK#_R

@

RH289 0_0402_5%

Stuff RH289 if EC does not want to

4 4

involve in the handshake mechanism for the DeepSX state entry and exit

A

PM_PWROK PCH_RSMRST#PCH_RSMRST#

POK<44,50>

2 1

CH751H-40PT_SOD323-2

B

DH10

21

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PCH_DMI/FDI/PM

VSKAA

28 57Monday, March 18, 2013

E

0.3

of

A

1 1

+3VS

1 2

RH95 10K_0402_5%RH95 10K_0402_5 %

2 2

+3VALW_PCH

3 3

1 2

RH104 10K_0402_5%RH104 10K_0402_5%

1 2

@

RH99 10K_0402_5%

1 2

@

RH110 10K_0402_5%

1 2

@

RH112 10K_0402_5%

1 2

@

RH119 10K_0402_5%

CLKREQ_LAN#

CLK_PCI_EC<44>

CLKREQ_WLAN#

PCH_GPIO73

PCH_GPIO44

PCH_GPIO45

PCH_GPIO46

LAN

WLAN

CLKREQ_LAN#<39>

CLK_WLAN#<38> CLK_WLAN<38>

CLKREQ_WLAN#<38>

1

CH29

CH29 22P_0402_50V8J

22P_0402_50V8J

2

RF@

CLK_LAN#<39>

CLK_LAN<39>

CLK_PCILOOP

PCH_GPIO73

CLKREQ_LAN#

CLKREQ_WLAN#

PCH_GPIO44

PCH_GPIO45

PCH_GPIO46

EMI@

1 2

RH7 22_0402_5%

1 2

Rshort@

RH6 0_0402_5%

CLK_EC_R

CLK_PCILOOP_R

B

Y43

Y45

AB1

AA44 AA42

AF1

AB43

AB45

AF3

AD43 AD45

T3

AF43 AF45

V3

AE44 AE42

AA2

AB40 AB39

AE4

AJ44

AJ42

Y3

AH43

AH45

D44

E44

B42

F41

A40

UH1C

CLKOUT_PCIE_N_0

CLKOUT_PCIE_P_0

PCIECLKRQ0#/GPIO73

CLKOUT_PCIE_N_1 CLKOUT_PCIE_P_1

PCIECLKRQ1#/GPIO18

CLKOUT_PCIE_N_2

CLKOUT_PCIE_P_2

PCIECLKRQ2#/GPIO20/SMI#

CLKOUT_PCIE_N_3 CLKOUT_PCIE_P_3 PCIECLKRQ3#/GPIO25

CLKOUT_PCIE_N_4 CLKOUT_PCIE_P_4 PCIECLKRQ4#/GPIO26

CLKOUT_PCIE_N5 CLKOUT_PCIE_P_5 PCIECLKRQ5#/GPIO44

CLKOUT_PCIE_N_6 CLKOUT_PCIE_P_6 PCIECLKRQ6#/GPIO45

CLKOUT_PCIE_N_7

CLKOUT_PCIE_P_7

PCIECLKRQ7#/GPIO46

CLKOUT_ITPXDP

CLKOUT_ITPXDP_P

CLKOUT_33MHZ0

CLKOUT_33MHZ1

CLKOUT_33MHZ2

CLKOUT_33MHZ3

CLKOUT_33MHZ4

H82LPMS-QC4C-A1_FCBGA695~D

D

LPT_PCH_M_EDS

CLOCK SIGNAL

C

CLKOUT_PEG_A

CLKOUT_PEG_A_P

PEGA_CLKRQ#/GPIO47

CLKOUT_PEG_B

CLKOUT_PEG_B_P

PEGB_CLKRQ#/GPIO56

CLKOUT_DMI

CLKOUT_DMI_P

CLKOUT_DP

CLKOUT_DP_P

CLKOUT_DPNS

CLKOUT_DPNS_P

CLKIN_DMI

CLKIN_DMI_P

CLKIN_GND

CLKIN_GND_P

CLKIN_DOT96N CLKIN_DOT96P

CLKIN_SATA

CLKIN_SATA_P

REFCLK14IN

CLKIN_33MHZLOOPBACK

XTAL25_IN

XTAL25_OUT

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

ICLK_IREF

TP19 TP18

DIFFCLK_BIASREF

2 OF 11

AB35

AB36

AF6

Y39

Y38

U4

AF39

AF40

AJ40 AJ39

AF35 AF36

AY24 AW24

AR24 AT24

H33 G33

BE6 BC6

F45 D17

AM43 AL44

C40

F38

F36

F39

AM45

AD39 AD38

AN44

CLK_REQ_VGA#

PASSWORD_CLEAR#

PCH_CLK_DMI# PCH_CLK_DMI

CLKIN_GND1# CLKIN_GND1

CLK_DOT# CLK_DOT

CLK_SATA# CLK_SATA

CLK_14M_PCH CLK_PCILOOP

PCH_X1 PCH_X2

CLK_FLEX0

CLK_FLEX1

CLK_FLEX2

DGPU_PRSNT#

RH261 10K_0402_5%RH261 10K_0402_5%

ICLK_IREF

PCH_CLK_BIASREF

DGPU_PRSNT#

M

/B SKU UMA

T72

TP@T72

TP@

PAD

T74

TP@T74

TP@

PAD

TP@

T73 PAD

1 2

RH52 7.5K_0402_1%RH52 7.5K_0402_1%

H L

D

CLK_PCIE_VGA# <13>

CLK_PCIE_VGA <13>

CLK_REQ_VGA# <13>

CLK_CPU_DMI# <5>

CLK_CPU_DMI <5>

CLK_CPU_SSC_EDP# <5> CLK_CPU_SSC_EDP <5>

CLK_CPU_EDP# <5> CLK_CPU_EDP <5>

From Clock Gen.

+1.5VS

+1.05V_+1.5V_RUN

OPT

VGA

12

JPW

SP@

CH26

27P_0402_50V8J

NOGCLK@

E

PCH_CLK_DMI PCH_CLK_DMI# CLKIN_GND1 CLKIN_GND1#

CLK_DOT# CLK_DOT CLK_SATA# CLK_SATA CLK_14M_PCH

PCH_X1_R<38>

CLK_REQ_VGA#

PASSWORD_CLEAR#

RH89 10K_0402_5%RH89 10K_0402_5%

RH115 10K_0402_5%RH115 10K_0402_5%

RPH4

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

1 2

RH80 10K_0402_5%RH80 10K_0402_5%

1 2

RH81 10K_0402_5%RH81 10K_0402_5%

1 2

RH83 10K_0402_5%RH83 10K_0402_5%

1 2

RH84 10K_0402_5%RH84 10K_0402_5%

1 2

RH87 10K_0402_5%RH87 10K_0402_5%

RH42

1 2

0_0402_5%

GCLK@

Placement near to YH2

NOGCLK@

GND

12

25MHZ_20PF_7V25000016NOGCLK@

2

GND

3

4

RH117 1M_0402_5%

YH2

1

PCH_X1 PCH_X2

1

2

12

PCH_X1

1

CH27

27P_0402_50V8J

2

NOGCLK@

+3VALW_PCH

12

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/19 2015/04/19

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PCH_CLOCK

VSKAA

29 57Monday, March 18, 2013

E

0.3

A

1 1

+3VS

1 2

2 2

SERIRQ

RH4710K_0402_5% RH4710K_0402_5%

LPC_AD0<44>

LPC_AD1<44>

LPC_AD2<44>

LPC_AD3<44>

LPC_FRAME#<44>

SERIRQ<44>

SERIRQ

PCH_SPICLK

PCH_SPICS0#

PCH_SPIDI

PCH_SPIDO1

PCH_SPIDO2

PCH_SPIDO3

A20

C20

A18

C18

B21

D21

G20

AL11

AJ11

AJ7

AL7

AJ10

AH1

AH3

AJ4

AJ2

UH1D

LAD_0

LAD_1

LAD_2

LAD_3

LFRAME#

LDRQ0#

LDRQ1#/GPIO23

SERIRQ

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_CS2#

SPI_MOSI

SPI_MISO

SPI_IO2

SPI_IO3

B

LPT_PCH_M_EDS

SMBus

LPC

C-Link

SPI

Thermal

SMBALERT#/GPIO11

SMBCLK

SMBDATA

SML0ALERT#/GPIO60

SML0CLK

SML0DATA

SML1ALERT#/PCHHOT#/GPIO74

SML1CLK/GPIO58

SML1DATA/GPIO75

CL_CLK

CL_DATA

CL_RST#

TP1

TP2

TP4

TP3

TD_IREF

C

N7

PCH_SMBALERT#

R10

PCH_SMBCLK

U11

PCH_SMBDATA

N8

PCH_GPIO60

U8

PCH_SMLCLK0

R7

PCH_SMLDATA0

H6

LAN_EN

K6

PCH_SMLCLK1

N11

PCH_SMLDATA1

AF11

AF10

AF7

BA45

BC45

BE43

BE44

AY43

PCH_TD_IREF

1 2

RH337 8.2K_0402_1%RH337 8.2K_0402_1%

LAN_EN <39>

+3VALW_PCH

RPH2

1 8 2 7 3 6 4 5

2.2K_8P4R_5%

D

PCH_SMBDATA PCH_SMBCLK PCH_SMLDATA1 PCH_SMLCLK1

6 1

QH3A

QH3A 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

6 1

QH4A

QH4A 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

PCH_SMBALERT#

PCH_GPIO60

LAN_EN

PCH_SMLCLK0

PCH_SMLDATA0

5

3 4

2

QH3B

QH3B 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

3 4

2

QH4B

QH4B 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

RH262 10K_0402_5%RH262 10K_0402_5%

RH76 1K_0402_5%RH76 1K_0402_5%

RH75 10K_0402_5%RH75 10K_0402_5%

RH73 2.2K_0402_5%RH73 2.2K_0402_5%

RH77 2.2K_0402_5%RH77 2.2K_0402_5%

RH102 4.7K_0402_5%RH102 4.7K_0402_5%

RH103 4.7K_0402_5%RH103 4.7K_0402_5%

5

1 2

E

+3VS

PM_SMBDATA <11,12,38,45>

PM_SMBCLK <11,12,38,45>

+3VS

EC_SMB_DA2 <13,24,37,44>

EC_SMB_CK2 <13,24,37,44>

+3VALW_PCH

12

H82LPMS-QC4C-A1_FCBGA695~D

D

3 3

+3VALW_PCH

RH5 1K_0402_5%RH5 1K_0402_5%

RH16 1K_0402_5%RH16 1K_0402_5%

12

EC_CS0#<44>

EC_SDIO<44>

PCH_SPIDO2

PCH_SPIDO3

PCH_SPIDO1 PCH_SPIDO2 PCH_SPI0_DO2

RH62 15_0402_5%885@RH62 15_0402_5%885@ RH96 15_0402_5%RH96 15_0402_5% RH97 15_0402_5%RH97 15_0402_5%

RH79 15_0402_5%885@RH79 15_0402_5%885@

1 2 1 2 1 2

1 2

3 OF 11

SPI ROM for Win8 (8MByte )

UH4

PCH_SPICS0# PCH_SPI0_DO1

1

CS#

2 3 4

VCC

SO

HOLD#

WP#

SCLK

GND

64M EN25QH64-104HIP SOP 8P

SI

+3VALW_PCH

CH10 0.1U_0402_10V7KCH10 0.1U_0402_10V7K

8 7 6 5

1 2

PCH_SPI0_DO3 PCH_SPIDO3 PCH_SPI0_CLK PCH_SPI0_DI

1 2

RH92 15_0402_5%RH92 15_0402_5%

1 2

RH93 0_0402_5%Rshort@RH93 0_0402_5%Rshort@

1 2

RH94 15_0402_5%RH94 15_0402_5%

1 2

RH74 15_0402_5%885@RH74 15_0402_5%885@

1 2

RH78 15_0402_5%885@RH78 15_0402_5%885@

PCH_SPICLK PCH_SPIDI

EC_SCK <44>

EC_SDI <44>

Socket: SP07000F500/SP07000H900

Please place U13 & U4 close to U2 PCH,

4 4

please place RH66, RH67, RH68 near UH3 Please place RH267 near RH66, Please place RH271 near RH67, Please place RH269 near RH68.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PCH_LPC/SPI/SMBUS

VSKAA

E

0.3

of

30 57Monday, March 18, 2013

A

+3VS

CRT@

12

RH142 2.2K_0402_5%

CRT@

1 1

2 2

3 3

RH144 2.2K_0402_5%

1 2

RH125 100K_0402_5%RH125 100K_0402_5%

+3VS

CRT@

RH155

RH155 150_0804_8P4R_1%

150_0804_8P4R_1%

CRT@

1 2

1 8 2 7 3 6 4 5

UMA_CRT_DATA

12

UMA_CRT_CLK

18

UMA_CRT_B

27

UMA_CRT_G

36

UMA_CRT_R

45

EC_ENBKL

RH3328.2K_0402_5% RH3328.2K_0402_5%

RH18810K_0402_5% RH18810K_0402_5%

RH18110K_0402_5% RH18110K_0402_5%

RPH3

10K_0804_8P4R_5%

RPH6

10K_0804_8P4R_5%

1 2

PCH_GPIO52

DGPU_RST#

DGPU_PWR_EN

ODD_DA# PCH_GPIO4 PCH_GPIO5 PCI_PIRQC#

PCH_GPIO2 PCI_PIRQD# PCI_PIRQB# PCI_PIRQA#

DGPU_PWR_EN

RH2961K_0402_5% @ RH2961K_0402_5% @

PCH_PWM_TL<22>

PCH_PWM_EDP<23>

EC_ENBKL<22,23,44>

B

UMA_CRT_B<26>

UMA_CRT_G<26>

UMA_CRT_R<26>

UMA_CRT_CLK<26>

UMA_CRT_DATA<26>

UMA_CRT_HSYNC<26>

UMA_CRT_VSYNC<26>

1 2

RH17 0_0402_5%LVDS@RH17 0_0402_5%LVDS@

1 2

RH18 0_0402_5%IEDP@RH18 0_0402_5%IEDP@

1 2

R462 0_0402_5%IEDP@R462 0_0402_5%IEDP@

LCD_ENVDD<23>

DGPU_PWR_EN<17>

RF_OFF#

PCH_GPIO51

0 0 1 1 1

CRT_IREF

PCH_PWM

T45

U44

V45

M43

M45

N42

N44

U40

U39

N36

K36

G36

H20

L20

K17

M20

A12

B13

C12

C10

A10

AL6

UMA_CRT_B

UMA_CRT_G

UMA_CRT_R

UMA_CRT_CLK

UMA_CRT_DATA

EC_ENBKL_R

PCI_PIRQA#

PCI_PIRQB#

PCI_PIRQC#

PCI_PIRQD#

DGPU_RST#

PCH_GPIO52

DGPU_PWR_EN

Boot BIOS Strap

PCH_GPIO19 Boot BIOS Loaction

0 1 0

LPC

Reserved

SPI

UH1E

VGA_BLUE

VGA_GREEN

VGA_RED

VGA_DDC_CLK

VGA_DDC_DATA

VGA_HSYNC

VGA_VSYNC

DAC_IREF

VGA_IRTN

EDP_BKLTCTL

EDP_BKLTEN

EDP_VDDEN

PIRQA#

PIRQB#

PIRQC#

PIRQD#

GPIO50

GPIO52

GPIO54

GPIO51

GPIO53

GPIO55

*

C

LPT_PCH_M_EDS

LVDSCRT

PCI

H82LPMS-QC4C-A1_FCBGA695~D

D

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPB_AUXN

DDPC_AUXN

DISPLAY

DDPD_AUXN

DDPB_AUXP

DDPC_AUXP

DDPD_AUXP

DDPB_HPD

DDPC_HPD

DDPD_HPD

PIRQE#/GPIO2

PIRQF#/GPIO3

PIRQG#/GPIO4

PIRQH#/GPIO5

PME#

PLTRST#

5 OF 11

R40

R39

R35

R36

N40

N38

H45

K43

J42

H43

K45

J44

K40

HDMI_HPD

1 2

K38

RH127 100K_0402_5%RH127 100K_0402_5%

1 2

H39

RH128 100K_0402_5%RH128 100K_0402_5%

G17

PCH_GPIO2

F17

ODD_DA#

L15

PCH_GPIO4

M15

PCH_GPIO5

AD10

PCI_PME#

Y11

PLT_RST#

D

UMA_HDMI_CLK <24,25>

UMA_HDMI_DATA <24,25>

HDMI_HPD <24,25,33>

ODD_DA# <37>

TP@

T93PAD

PLT_RST# <38,39,44>

PLT_RST#

DGPU_RST#

For Optimus

+3VS

5

UH6

1

P

IN1

2

IN2

G

SN74AHC1G08DCKR_SC70-5

2

CH12

0.47U_0402_6.3V6K

@

1

3

OPT@

E

ESD@

1 2

ODD_DA#

CH6 180P_0402_50V8J

ESD@

PLT_RST#

CH104 100P_0402_50V8J

4

O

PLTRST_VGA# <13>

A16 Swap Override Strap

WL_OFF#

Low= A16 swap override Enable H

igh= A16 swap override Disable

*

CRT Disabling

4 4

CRT@

1 2

RH126 649_0402_1%

RH126

NOCRT@RH126

NOCRT@

1K_0402_5%

A

CRT_IREF

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

D

PLT_RST#

RH173

100K_0402_5%

1 2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH_CRT/LVDS/HDMI/PCI

VSKAA

E

0.3

31 57Monday, March 18, 2013

0.3

A

1 1

PCIE_PRX_C_LANTX_N3<39>

LAN

WLAN

2 2

PCIE_PRX_C_LANTX_P3<39>

PCIE_PTX_C_LANRX_N3<39> PCIE_PTX_C_LANRX_P3<39>

PCIE_PRX_WLANTX_N4<38> PCIE_PRX_WLANTX_P4<38>

PCIE_PTX_C_WLANRX_N4<38> PCIE_PTX_C_WLANRX_P4<38>

12

CH13 0.1U_0402_10V7KCH13 0.1U_0402_10V7K

12

CH11 0.1U_0402_10V7KCH11 0.1U_0402_10V7K

12

CH14 0.1U_0402_10V7KCH14 0.1U_0402_10V7K

12

CH17 0.1U_0402_10V7KCH17 0.1U_0402_10V7K

+1.5VS

1 2

RH53 7.5K_0402_1%RH53 7.5K_0402_1%

PCIE_PTX_LANRX_N3 PCIE_PTX_LANRX_P3

PCIE_PTX_WLANRX_N4 PCIE_PTX_WLANRX_P4

PCIE_IREF

PCIE_RCOMP

B

LPT_PCH_M_EDS

UH1I

AW31

PERN1/USB3RN3

AY31

PERP1/USB3RP3

BE32

PETN1/USB3TN3

BC32

PETP1/USB3TP3

AT31

PERN2/USB3RN4

AR31

PERP2/USB3RP4

BD33

PETN2/USB3TN4

BB33

PETP2/USB3TP4

AW33

PERN_3

AY33

PERP_3

BE34

PETN_3

BC34

PETP_3

AT33

PERN_4

AR33

PERP_4

BE36

PETN_4

BC36

PETP_4

AW36

PERN_5

AV36

PERP_5

BD37

PETN_5

BB37

PETP_5

AY38

PERN_6

AW38

PERP_6

BC38

PETN_6

BE38

PETP_6

AT40

PERN_7

AT39

PERP_7

BE40

PETN_7

BC40

PETP_7

AN38

PERN_8

AN39

PERP_8

BD42

PETN_8

BD41

PETP_8

BE30

PCIE_IREF

BC30

TP11

BB29

TP6

BD29

PCIE_RCOMP

H82LPMS-QC4C-A1_FCBGA695~D

D

LPT_PCH_M_EDS

PCIe

EHCI 1

E

HCI 2

USB

9 OF 11

NA

C

USB2N0 USB2P0 USB2N1 USB2P1 USB2N2 USB2P2 USB2N3 USB2P3 USB2N4 USB2P4 USB2N5 USB2P5 USB2N6 USB2P6 USB2N7 USB2P7 USB2N8 USB2P8 USB2N9

USB2P9 USB2N10 USB2P10 USB2N11 USB2P11 USB2N12 USB2P12 USB2N13 USB2P13

USB3RN1

USB3RP1 USB3TN1 USB3TP1

USB3RN2

USB3RP2 USB3TN2 USB3TP2

USB3RN5

USB3RP5 USB3TN5 USB3TP5

USB3RN6

USB3RP6 USB3TN6 USB3TP6

USBRBIAS#

USBRBIAS

TP24 TP23

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

B37 D37 A38 C38 A36 C36 A34 C34 B33 D33 F31 G31 K31 L31 G29 H29 A32 C32 A30 C30 B29 D29 A28 C28 G26 F26 F24 G24

AR26 AP26 BE24 BD23 AW26 AV26 BD25 BC24 AW29 AV29 BE26 BC26 AR29 AP29 BD27 BE28

K24

USBBIAS

K26

M33 L33

P3

USB_OC#0

V1

USB_CHG_OC#

U2

USB_OC#2

P1

SLP_CHG_CB1

M3

SLP_CHG_CB0

T1 N2 M1

USB20_N0 <41> USB20_P0 <41> USB20_N1 <41> USB20_P1 <41> USB20_N2 <39> USB20_P2 <39> USB20_N3 <40> USB20_P3 <40>

USB20_N8 <23> USB20_P8 <23> USB20_N9 <38> USB20_P9 <38>

USB20_N11 <23> USB20_P11 <23>

1 2

RH165 22.6_0402_1%RH165 22.6_0402_1%

Within 500 mils

USB_OC#0 <41,44> USB_CHG_OC# <41,44> USB_OC#2 <39,44> SLP_CHG_CB1 <41> SLP_CHG_CB0 <41>

USB_OC#5

Touch Screen

WiMAX/BT

Int. Camera

U3RXDN1 <41> U3RXDP1 <41>

U3TXDN1 <41> U3TXDP1 <41>

U3RXDN2 <41> U3RXDP2 <41>

U3TXDN2 <41> U3TXDP2 <41>

USB-Right Rear USB-Right Front USB-Left

USB-Right Rear

U

SB-Right Front

USB-Left

CardReader

D

1 2

USB_OC#2

RH183 10K_0402_5%RH183 10K_0402_5%

1 2

USB_CHG_OC#

RH186 10K_0402_5%RH186 10K_0402_5%

RPH5

1 8

USB_OC#0

2 7

SLP_CHG_CB1

3 6

USB_OC#5

4 5

SLP_CHG_CB0

10K_0804_8P4R_5%

E

+3VALW_PCH

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PCH_PCIE/USB

VSKAA

32 57Monday, March 18, 2013

E

0.3

A

1 1

+3VS

RPH7

1 8 2 7 3 6 4 5

+3VALW_PCH

1 8

+3VS

2 7 3 6 4 5

2 2

+3VS

PCH_GPIO49 PCH_GPIO39 PCH_GPIO16

PCH_GPIO34

10K_0804_8P4R_5%

RPH8

10K_0804_8P4R_5%

RPH9

10K_0804_8P4R_5%

RH185 10K_0402_5%

RH178 200K_0402_5%RH178 200K_0402_5%

RH304 10K_0402_5%

DRANK@

1 2

269@

SPK_DET

PCH_GPIO71

EC_SCI#

ODD_EN#

EC_SMI# PCH_GPIO1 PROJECT_ID PCH_GPIO6

VRAM_DR_SR#

ODD_DETECT#

SM_DET

For OPT

B

UH1F

HDMI_HPD<24,25,31>

EC_SCI#<44>

EC_SMI#<44>

VGA_PWROK<17,55>

TP@

T81 PAD

ODD_DETECT#<37>

ODD_EN#<46>

SPK_DET<43>

PCH_GPIO1

PCH_GPIO6

EC_SCI#

EC_SMI#

PCH_GPIO16

VRAM_DR_SR#

PCH_GPIO27

PCH_GPIO34

PCH_GPIO35

ODD_DETECT#

PCH_GPIO37

OPTIMUS_EN#

PCH_GPIO39

SM_DET

PCH_GPIO49

ODD_EN#

PROJECT_ID

SPK_DET

PCH_GPIO71

AT8

BMBUSY#/GPIO0

F13

TACH1/GPIO1

A14

TACH2/GPIO6

G15

TACH3/GPIO7

Y1

GPIO8

K13

LAN_PHY_PWR_CTRL/GPIO12

AB11

GPIO15

AN2

SATA4GP/GPIO16

C14

TACH0/GPIO17

BB4

SCLOCK/GPIO22

Y10

GPIO24

R11

GPIO27

AD11

GPIO28

AN6

GPIO34

AP1

GPIO35/NMI#

AT3

SATA2GP/GPIO36

AK1

SATA3GP/GPIO37

AT7

SLOAD/GPIO38

AM3

SDATAOUT0/GPIO39

AN4

SDATAOUT1/GPIO48

AK3

SATA5GP/GPIO49

U12

GPIO57

C16

TACH4/GPIO68

D13

TACH5/GPIO69

G13

TACH6/GPIO70

H15

TACH7/GPIO71

BE41

VSS

BE5

VSS

C45

VSS

A5

VSS

H82LPMS-QC4C-A1_FCBGA695~D

D

LPT_PCH_M_EDS

GPIO

NCTF

C

6 OF 11

CPU/Misc

RCIN#

PROCPWRGD

THRMTRIP#

PLTRST_PROC#

TP14

PECI

VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AN10

AY1

AT6

AV3

AV1

AU4

N10

A2 A41 A43 A44 B1 B2 B44 B45 BA1 BC1 BD1 BD2 BD44 BD45 BE2 BE3 D1 E1 E45 A4

GATEA20

KB_RST#

PCH_THRMTRIP#

1 2

RH191 390_0402_5%RH191 390_0402_5%

D

GATEA20 <44>

KB_RST# <44>

H_PWRGOOD <5>

H_THERMTRIP# <5>

CPU_PLTRST# <5>

GATEA20

KB_RST#

H_THERMTRIP#

E

1 2

RH182 10K_0402_5%RH182 10K_0402_5%

1 2

RH184 10K_0402_5%RH184 10K_0402_5%

1 2

CH7 100P_0402_50V8J

@ESD@

+3VS

SM_DET BIOS setup

SRANK@

1 2

RH187 10K_0402_5%

3 3

RH187 10K_0402_5%

1 2

RH198 10K_0402_5%RH198 10K_0402_5%

@

RH199 10K_0402_5%

1 2

259@

RH307 10K_0402_5%

RH201 10K_0402_5%RH201 10K_0402_5%

VRAM_DR_SR#

PCH_GPIO37

12

PCH_GPIO27

SM_DET

12

OPTIMUS_EN#

S

KU UMA

Follow Compal ORB a

nd Intel Check list 460603 V1.5

H L

Optimus

PROJECT_ID

S

KU SharkBay SV

H L

SharkBay ULT

1

0

Non-Harman detection

0

SPK_DET

Speaker Type

Harman/KardonS&M option 269@

Non Harman

ONKYO

BOM

259@

1 Non-Brand

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PCH_CPU/GPIO

VSKAA

33 57Monday, March 18, 2013

E

0.3

A

B

C

D

E

1 1

LPT_PCH_M_EDS

UH1G

AA24 AA26 AD20 AD22 AD24 AD26 AD28 AE18 AE20 AE22 AE24 AE26 AG18 AG20 AG22 AG24

AA18

Y26

U14

U18 U20 U22 U24 V18 V20 V22 V24 Y18 Y20 Y22

UH1G

VCC VCC VCC VCC VCC VCC VCC

1

.312A

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

DCPSUSBYP VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW

0.67A

+1.05VS_VCCP

RH9

2 2

3 3

RH9

5.1_0402_1%

1 2

1

CH50

CH50 1U_0402_6.3V6K

1U_0402_6.3V6K

2

PJ4

JP@

2

112

JUMP_43X79

10U_0603_6.3V6M

CH32

1

CH33

2

1U_0402_6.3V6K

22U_0805_6.3V6M

1U_0402_6.3V6K

1

CH31

2

+1.05VS_PCH

1U_0402_6.3V6K

1

CH67

CH64

2

+1.05VS_PCH

1

CH34

2

1U_0402_6.3V6K

+PCH_VCCDSW+PCH_VCCDSW

1

CH68

2

1U_0402_6.3V6K

LPT_PCH_M_EDS

CRT DAC

FDI

HVCMOS

Core

USB3

PCIe/DMI

SATA

VCCMPHY

H82LPMS-QC4C-A1_FCBGA695~D

D

Rshort@

1 2

RH70 0_0603_5%

0.07A

0.0133A

0.183A

0.133A

0.261A

VCCADACBG3_3

3.629A

7 OF 11

+1.05V_+1.5V_RUN+1.5VS

VCCADAC1_5

VCCVRM

VCCIO

VCC3_3_R30 VCC3_3_R32

DCPSUS1

VCCSUS3_3 VCCSUS3_3

DCPSUS3 DCPSUS3

VCCIO VCCVRM VCCVRM

VCCVRM

VCCIO

VCCVRM

VCCIO

VSS

P45

P43

M31

BB44

AN34

AN35

R30 R32

Y12

+VCCA_USBSUS1

AJ30 AJ32

AJ26

+VCCA_USBSUS3

AJ28 AK20 AK26 AK28

BE22

AK18

AN11

AK22

AM18 AM20 AM22 AP22 AR22 AT22

CH98

1U_0402_6.3V6K

+3VALW to +3VALW_PCH

+3VALW

4 4

JP@

2

112

PJ2 JUMP_43X39

QH2

QH2 AO3413_SOT23

AO3413_SOT23

D

S

D

S

13

G

1

2

CH1110.1U_0402_25V6 CH1110.1U_0402_25V6

CH1120.01U_0402_25V7K CH1120.01U_0402_25V7K

2

1

CH1130.1U_0402_10V7K CH1130.1U_0402_10V7K

2

+3VALW_PCH

+VCCA_DAC

+VCCADACBG3_3

+VCCAFDI_VRM

1U_0402_6.3V6K

1

CH97

CH99

2

1U_0402_6.3V6K

10U_0603_6.3V6M

0.1U_0402_10V7K

1

CH36

CH35

CRT@

0.01U_0402_16V7K

+1.05VS_PCH

+1.05V_+1.5V_RUN

+1.05VS_PCH

+1.05V_+1.5V_RUN

+1.05VS_PCH

1U_0402_6.3V6K

1

CH57

CH80

2

10U_0603_6.3V6M

+VCCA_USBSUS1

1

2

+VCCA_USBSUS3 +VCCADACBG3_3

1

CH103

@

2

+3VS

+3VALW_PCH

1

CH45

0.1U_0402_10V7K

2

1

2

1 2

@

RH59 0_0402_5%

CH53

@

10U_0603_6.3V6M

1 2

RH60 0_0402_5%@RH60 0_0402_5%@

CH102

@

10U_0603_6.3V6M

1

2

0_0402_5%

1

CH37

CRT@

2

10U_0603_6.3V6M

+1.05VS_PCH

1

CH43

1U_0402_6.3V6K

2

CH44

0.1U_0402_10V7K

+1.05VS_PCH

RH20

12

CRT@

+1.05V_+1.5V_RUN

1

CH41

@

10U_0603_6.3V6M

2

+VCCA_DAC_R

BLM18PG181SN1D_0603

LH1

CRT@

+1.5VS

12

PCH Power Rail Table (EDS Rev1.0)

Voltage Rail

VCC 1.312 A1.05V

VCCCLK 0.306 A1.05V

VCCCLK3_3

VCCSPI 0.022 A3.3V

Voltage

1.05VVCCIO

3.3V

1.5V

CRT Disabling

+3VS

RH4

RH4 0_0402_5%

0_0402_5%

CRT@

1 2

RH19

RH19 0_0402_5%

0_0402_5%

NOCRT@

1 2

+VCCA_DAC

RH21

RH21 0_0402_5%

0_0402_5%

NOCRT@

1 2

S0 Iccmax Current (A)

3.629 A

0.07 A1.5VVCCADAC1_5

0.0133 AVCCADAC3_3

0.055 A

0.183 AVCCVRM

0.133 A3.3VVCC3_3

0.67 A1.05VVCCASW

0.01 A3.3VVCCSUSHDA

0.261 A3.3VVCCSUS3_3

0.015 A3.3VVCCDSW3_3

0.004 A1.05VV_PROC_IO

PCH_PWR_EN#<46>

PCH_PWR_EN#

A

12

RH3 47K_0402_5%RH3 47K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PCH_POWER-1

VSKAA

34 57Monday, March 18, 2013

E

0.3

of

A

B

C

D

E

+3VALW_PCH

LPT_PCH_M_EDS

0.055A

0.306A

CH87

CH87 1U_0402_6.3V6K

1U_0402_6.3V6K

LPT_PCH_M_EDS

USB

ICC

GPIO/LPC

Azalia

RTC

CPU

SPI

Thermal

1

CH88

CH88 1U_0402_6.3V6K

1U_0402_6.3V6K

2

0.015A

0.01A

0.004A

8 OF 11

0.022A

VCCSUS3_3 VCCSUS3_3

VCCDSW3_3

DCPSST

VCC3_3 VCC3_3 VCC3_3

VCCIO

VCCSUSHDA

VCCSUS3_3

VCCRTC

DCPRTC DCPRTC

V_PROC_IO V_PROC_IO

VCCSPI

VCCASW

VCCVRM

VCC3_3

1

CH66

R20 R22

A16

+VCCDSW3_3

AA14

AE14 AF12 AG14

U36

A26

K8

A6

P14 P16

AJ12 AJ14

AD12

P18

VCC

P20

VCC

L17

R18

AW40

AK30

AK32

CH70 0.1U_0402_10V7KCH70 0.1U_0402_10V7K

+VCCSST

+1.05VS_PCH

CH95 0.1U_0402_10V7KCH95 0.1U_0402_10V7K

+DCPRTC

+V_PROC

+VCCCFUSE

+1.05VS_PCH

+1.05V_+1.5V_RUN

0.1U_0402_10V7K

1 2

CH66

+3VALW_PCH

1

CH96

1U_0402_6.3V6K

2

+3VS

1

CH106

0.1U_0402_10V7K

2

0.1U_0402_10V7K

UH1H

+3VALW_PCH

1 1

0.1U_0402_10V7K

+1.05VS_PCH +1.05V_+1.5V_RUN

1 2

RH63 0_0402_5%

+1.05VS_PCH

1 2

4.7UH_LQM18FN4R7M00D_20%

2 2

@

LH2

0.1U_0402_10V7K

1

CH65

+1.05VS_PCH

2

1

CH69

2

+V1.05M_VCCDUSBSUS

1

CH78

CH78 1U_0402_6.3V6K

1U_0402_6.3V6K

@

2

+3VS

1

CH73

0.1U_0402_10V7K

2

+PCH_VCC

10U_0603_6.3V6M

+1.05VS_PCH

CH81

1U_0402_6.3V6K

10U_0603_6.3V6M

1

CH84

2

1

2

CH83

1

CH79

CH79 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

2

+V1.05M_VCCDUSBSUS

+PCH_VCC

+PCH_VCCCLK

+PCH_VCCCLK3_3

+PCH_VCCCLK

Place near pin AP45

+1.05VS_PCH

3 3

RH10

RH10 0_0805_5%

0_0805_5%

1 2

Rshort@

+PCH_VCCCLK

1

CH85

CH85 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CH86

CH86 1U_0402_6.3V6K

1U_0402_6.3V6K

2

UH1H

R24

VCCSUS3_3

R26

VCCSUS3_3

R28

VCCSUS3_3

U26

VCCSUS3_3

M24

VSS

U35

VCCUSBPLL

L24

VCC3_3

U30

VCCIO

V28

VCCIO

V30

VCCIO

Y30

VCCIO

Y35

DCPSUS2

AF34

VCCVRM

AP45

VCC

Y32

VCCCLK

M29

VCCCLK3_3

L29

VCCCLK3_3

L26

VCCCLK3_3

M26

VCCCLK3_3

U32

VCCCLK3_3

V32

VCCCLK3_3

AD34

VCCCLK

AA30

VCCCLK

AA32

VCCCLK

AD35

VCCCLK

AG30

VCCCLK

AG32

VCCCLK

AD36

VCCCLK

AE30

VCCCLK

AE32

VCCCLK

H82LPMS-QC4C-A1_FCBGA695~D

D

1

2

0.1U_0402_10V7K

+RTCVCC

0.1U_0402_10V7K

1

CH76

CH77

2

+VCCDSW3_3

1

CH72

2

+3VALW_PCH

1

CH94

2

1U_0402_6.3V6K

0.1U_0402_10V7K

+3VALW_PCH

1

CH93

1U_0402_6.3V6K

2

+V_PROC

0.1U_0402_10V7K

1

CH109

2

+VCCCFUSE

1

2

CH110

1U_0402_6.3V6K

Check use which power rail

1 2

RH71 0_0402_5%RH71 0_0402_5%

1 2

@

RH88 0_0402_5%

0.1U_0402_10V7K

1

CH75

0.1U_0402_10V7K

2

1

CH107

CH108

2

1U_0402_6.3V6K

+3VS

CH74

1

2

RH13

RH13 0_0805_5%

0_0805_5%

1 2

Rshort@

RH14

RH14 0_0805_5%

0_0805_5%

1 2

Rshort@

RH15

0_0805_5%

1 2

@

+3VALW_PCH

+3VALW

+1.05VS_PCH

+3VS

PCH Power Rail Table (EDS Rev1.0)

Voltage Rail

VCC 1.05V 1.312 A

VCCIO 1.05V 3.629 A

VCCADAC1_5 1.5V 0.07 A

VCCADAC3_3 0.0133 A3.3V

VCCCLK 0.306 A1.05V

VCCCLK3_3 0.055 A

VCCVRM 0.183 A1.5V

VCC3_3 3.3V 0.133 A

VCCASW 1.05V 0.67 A

VCCSUSHDA 3.3V 0.01 A

VCCSPI 3.3V 0.022 A

VCCSUS3_3 3.3V 0.261 A

VCCDSW3_3 3.3V 0.015 A

V_PROC_IO 1.05V 0.004 A

Voltage S0 Iccmax Current (A)

3.3V

Place near pin Y32,AA30,AA32 Place near pin AD34 Place near pin AD35,AD36 Place near pin AG30,AG32,AE30,AE32

+3VS

RH11

RH11 0_0805_5%

0_0805_5%

1 2

Rshort@

+PCH_VCCCLK3_3

1

CH89

CH89 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CH90

CH90 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CH91

CH91 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CH92

CH92 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Place near pin M29 Place near pin L29 Place near pin L26,M26 Place near pin U32,V32

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH_POWER-2

VSKAA

E

35 57Monday, March 18, 2013

0.3

A

1 1

2 2

3 3

B

LPT_PCH_M_EDS

UH1J

AL34

VSS

AL38

VSS

AL8

VSS

AM14

VSS

AM24

VSS

AM26

VSS

AM28

VSS

AM30

VSS

AM32

VSS

AM16

VSS

AN36

VSS

AN40

VSS

AN42

VSS

AN8

VSS

AP13

VSS

AP24

VSS

AP31

VSS

AP43

VSS

AR2

VSS

AK16

VSS

AT10

VSS

AT15

VSS

AT17

VSS

AT20

VSS

AT26

VSS

AT29

VSS

AT36

VSS

AT38

VSS

D42

VSS

AV13

VSS

AV22

VSS

AV24

VSS

AV31

VSS

AV33

VSS

BB25

VSS

AV40

VSS

AV6

VSS

AW2

VSS

F43

VSS

AY10

VSS

AY15

VSS

AY20

VSS

AY26

VSS

AY29

VSS

AY7

VSS

B11

VSS

B15

VSS

H82LPMS-QC4C-A1_FCBGA695~D

D

10 OF 11

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

K39 L2 L44 M17 M22 N12 N35 N39 N6 P22 P24 P26 P28 P30 P32 R12 R14 R16 R2 R34 R38 R44 R8 T43 U10 U16 U28 U34 U38 U42 U6 V14 V16 V26 V43 W2 W44 Y14 Y16 Y24 Y28 Y34 Y36 Y40 Y8

C

UH1K

AA16

VSS

AA20

VSS

AA22

VSS

AA28

VSS

AA4

VSS

AB12

VSS

AB34

VSS

AB38

VSS

AB8

VSS

AC2

VSS

AC44

VSS

AD14

VSS

AD16

VSS

AD18

VSS

AD30

VSS

AD32

VSS

AD40

VSS

AD6

VSS

AD8

VSS

AE16

VSS

AE28

VSS

AF38

VSS

AF8

VSS

AG16

VSS

AG2

VSS

AG26

VSS

AG28

VSS

AG44

VSS

AJ16

VSS

AJ18

VSS

AJ20

VSS

AJ22

VSS

AJ24

VSS

AJ34

VSS

AJ38

VSS

AJ6

VSS

AJ8

VSS

AK14

VSS

AK24

VSS

AK43

VSS

AK45

VSS

AL12

VSS

AL2

VSS

BC22

VSS

BB42

VSS

D

LPT_PCH_M_EDS

H82LPMS-QC4C-A1_FCBGA695~D

11 OF 11

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

B19 B23 B27 B31 B35 B39 B7 BA40 BD11 BD15 BD19 AY36 AT43 BD31 BD35 BD39 BD7 D25 AV7 F15 F20 F29 F33 BC16 D4 G2 G38 G44 G8 H10 H13 H17 H22 H24 H26 H31 H36 H40 H7 K10 K15 K20 K29 K33 BC28

E

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PCH_GND

VSKAA

36 57Monday, March 18, 2013

E

0.3

A

B

C

D

E

SATA HDD Conn.

JHDD Conn@

1 1

26

boss

25

boss

24

GND

23

GND

SANTA_191501-1

SATA ODD Conn

2 2

JODD

15

GND

14

GND

SANTA_202401-1

GND

RX+

RX-

GND

TX-

TX+

GND

3.3V

3.3V GND GND GND

5V 5V 5V

GND

Rsv

GND

12V 12V 12V

Conn@JODD

Conn@

GND

GND GND

1 2

SATA_PTX_C_DRX_P4

3

SATA_PTX_C_DRX_N4

4 5

SATA_PRX_DTX_N4

6

SATA_PRX_DTX_P4

7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

1 2

A+

3

A-

4 5

B-

6

B+

7

8

DP

9

+5V

10

+5V

11

MD

12 13

+5VS

12

C356

C356 10U_0805_6.3V6M

10U_0805_6.3V6M

+5VS_ODD

1.1A

1

C355

C355 10U_0805_10V4Z

10U_0805_10V4Z

2

SATA_PTX_C_DRX_P2 SATA_PTX_C_DRX_N2

SATA_PRX_DTX_N2 SATA_PRX_DTX_P2

+5VS_ODD

Close to JHDD

1 2

C369 0.01U_0402_25V7KC369 0.01U_0402_25V7K

1 2

C367 0.01U_0402_25V7KC367 0.01U_0402_25V7K

1 2

C368 0.01U_0402_25V7KC368 0.01U_0402_25V7K

1 2

C370 0.01U_0402_25V7KC370 0.01U_0402_25V7K

+3VS

+5VS

Place closely JHDD SATA CONN.

1.2A

1

C357

0.1U_0402_10V7K

2

Place components closely ODD CONN.

1

C380

0.1U_0402_10V7K

2

C376 0.01U_0402_25V7KC376 0.01U_0402_25V7K C377 0.01U_0402_25V7KC377 0.01U_0402_25V7K

C378 0.01U_0402_25V7KC378 0.01U_0402_25V7K C375 0.01U_0402_25V7KC375 0.01U_0402_25V7K

ODD_DETECT# <33>

ODD_DA# <31>

1 2 1 2

1

C372

0.1U_0402_10V7K

2

1

C358

0.1U_0402_10V7K

2

SATA_PTX_DRX_P4 <27>

SATA_PTX_DRX_N4 <27>

SATA_PRX_C_DTX_N4 <27> SATA_PRX_C_DTX_P4 <27>

SATA_PTX_DRX_P2 <27>

SATA_PTX_DRX_N2 <27>

SATA_PRX_C_DTX_N2 <27> SATA_PRX_C_DTX_P2 <27>

G-Sensor

+5VS +3VS_HDP

CG12

1U_0402_6.3V6K

GSENSOR@

+3VS_HDP

RPG1

1 8 2 7 3 6 4 5

4.7K_8P4R_5%

GSENSOR@

HDPINT<44>

2

1

RESET# GXOUT GXIN MODE

UG3

GSENSOR@UG3

GSENSOR@

1

VIN

VOUT

2

GND

3

SHDN#

BP

G9191-330T1U_SOT23-5

EC_SMB_CK2<13,24,30,44>

+3VS_HDP

RG7 1K_0402_5%

GSENSOR@

0.1U_0402_10V7K

5

4

SELF_TEST

MODE

CG7

GSENSOR@

12

2

CG13

CG13 1U_0402_6.3V6K

1U_0402_6.3V6K

1

GSENSOR@

RESET#

GXOUT

GXIN

1

CG8

GSENSOR@

0.1U_0402_10V7K

2

+3VS_HDP

SELF_TEST

2

Vdd1

12

Vdd2

4

ST

6

PD

8

FS

9

Rev

TSH352TR LGA 16P

Voutx Vouty Voutz

NC1 NC2 NC3 NC4 NC5

GND1 GND2

3 5 7

10 11 14 15 16

1 13

UG1

GSENSOR@UG1

GSENSOR@

Place UG1 and UG4 on TOP Layer

UG5

1

P3_5/SSCK/SCL/CMP1_2

2

P3_7/CNTR0#/SSO/TXD1

3

RESET#

4

XOUT/P4_7

5

VSS/AVSS

6

XIN/P4_6

7

VCC/AVCC

8

MODE

9

P4_5/INT0#/RXD1

10

P1_7/CNTR00/INT10#

R5F211B4D34SP GSENSOR@

P1_5/RXD0/CNTR01/INT11#

P3_3/TCIN/INT3#/SSI00/CMP1_0

GSENSOR@

1 2

VOUTX

CG1 0.033U_0402_16V7K

1 2

VOUTY

CG2 0.033U_0402_16V7K

1 2

VOUTZ

P1_6/CLK0/SSI01

P1_3/KI3#/AN11/TZOUT

P1_2/KI2#/AN10/CMP0_2

P1_1/KI1#/AN9/CMP0_1

P1_0/KI0#/AN8/CMP0_0

P3_4/SCS#/SDA/CMP1_1

GSENSOR@

CG3 0.033U_0402_16V7K

GSENSOR@

11

12

13

P1_4/TXD0

14

15

16

P4_2/VREF

17

18

19

20

VOUTZ

VOUTX

VOUTY

RG9

RG9 47K_0402_5%

47K_0402_5%

GSENSOR@

1 2

HDPACT <44>

HDPLOCK <44>

RG10 47K_0402_5%

12

GSENSOR@

+3VS_HDP

1

CG6

0.1U_0402_10V7K

GSENSOR@

2

EC_SMB_DA2 <13,24,30,44>

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

HDD/Gsensor

VSKAA

E

0.3

of

37 57Monday, March 18, 2013

A

Slot 1 Half PCIe Mini Card-WLAN

B

WLAN&BT Combo module circuits

BT on module

C

D

E

Slot 2 Full PCIe Mini Card- mSATA 14" no support

EnableLHDisable

40 mils

+3V_WLAN

0.1U_0402_10V7K

1 1

1

CM1

2

0.1U_0402_10V7K

CM2

1

CM3

2

4.7U_0603_6.3V6K

1

2

BT_ON

1 2

RM27

BT_ON<44>

For isolate Intel Rainbow Peak and Compal Debug Card.

RM27

1K_0402_5%

E51_RXDBT_ON

+RTC

+3VALW

+3VL

+3V_WLAN

PLT_RST#

RM6 100K_0402_5%RM6 100K_0402_5%

22U_0805_6.3V6M

RCL4

120_0603_5%

12

GCLK@

PM_SMBCLK <11,12,30,45> PM_SMBDATA <11,12,30,45>

USB20_N9 <32> USB20_P9 <32>

LED_WIMAX# <45>

1 2

1

CCL6

GCLK@

2

+RTCGCLK

CLK_X1 CLK_X2

SLG3NB304VTR_TQFN16_2X3

WL_OFF# <44> PLT_RST# <31,39,44>

WiMax/ BT

+3VS

UCL1

GCLK@UCL1

GCLK@

10

VBAT

15

+V3.3A

2

VDD

VDDIO_27M1127MHz

8

VDDIO_25M_A

3

VDDIO_25M_B

1

XTAL_IN

16

XTAL_OUT

VDD_RTC_OUT

32kHz

25MHz_A

25MHz_B

GND1

GND2

GND3

4

7

13

1

CCL9

2.2U_0402_6.3V6M

GCLK@

2

14

9

12

6

5

GND4

17

GCLK@

1 2

VGA_X1_R

RCL3 22_0402_5%

22 ohm for NV chip

PCH_X1_R_R

PCH_RTCX1_R <27>

VGA_X1 <13>

JWLAN

CCL5

JWLAN

112 334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

GND53GND

ACES_88914-5204

Conn@

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

+3VS_DGPU

+1.05VS_VCCP

To EC (Need pull-up +3VL)

2 2

WLAN/ WiFi

WLAN_WAKE#<44>

CLKREQ_WLAN#<29>

PCIE_PRX_WLANTX_N4<32> PCIE_PRX_WLANTX_P4<32>

PCIE_PTX_C_WLANRX_N4<32> PCIE_PTX_C_WLANRX_P4<32>

1 2

RM25

+3V_WLAN

0_0402_5%@

E51_TXD E51_RXD

BT_CTRL_R

BT_ON

CLK_WLAN#<29> CLK_WLAN<29>

E51_TXD<44>

E51_RXD<44>

Debug card using

+1.05VS_VCCP+3VL +3VS_DGPU +3VALW

3 3

1

CCL1

GCLK@

2

0.1U_0402_10V7K

1

CCL3

GCLK@

2

0.1U_0402_10V7K

1

CCL4

GCLK@

2

0.1U_0402_10V7K

1

GCLK@

2

0.1U_0402_10V7K

GCLK@

YCL1 25MHZ 12PF X3G025000DK1H-X

1

CLK_X1 CLK_X2

1

4 4

1

CCL7

CCL7 18P_0402_50V8J

18P_0402_50V8J

GCLK@

2

A

GND

2

GND

3

4

1

CCL8

CCL8 18P_0402_50V8J

18P_0402_50V8J

GCLK@

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

PCH_X1_R_R

Rshort@

1 2

RCL1 0_0402_5%

Compal Secret Data

2012/04/19 2015/04/19

Compal Secret Data

PCH_X1_R <29>

Deciphered Date

D

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCIe-WLAN/mSATA/GCLK

VSKAA

Monday, March 18, 2013

E

38 57

0.3

A

1 1

Left USB 2.0 x 1

LR5

EMI@ LR5

EMI@

USB20_P2<32>

USB20_N2<32>

2 2

2

3

WCM-2012-900T_0805

1

4

USB20_P2_L

USB20_N2_L

B

2.0A

U13

2

IN

3

IN

USB_EN#2<44>

4

EN/ENB

1

GND

SY6288DCAC_MSOP8

SA00004KB00 SA00003TV00

OUT OUT OUT OCB

C

W=80mils

+USB_VCCC+5VALW

@EMI@

6 7

CR38 1000P_0402_50V7K

8 5

For EMI

12

USB_OC#2 <32,44>

D

JLAN

Conn@JLAN

Conn@

24

G4

23

G3

22

G2

21

+USB_VCCC

PCIE_PRX_C_LANTX_P3<32>

PCIE_PRX_C_LANTX_N3<32> PCIE_PTX_C_LANRX_P3<32> PCIE_PTX_C_LANRX_N3<32>

CLK_LAN<29> CLK_LAN#<29>

PCIE_WAKE#<28,44>

PLT_RST#<31,38,44>

+3V_LAN

W=80mils

USB20_N2_L USB20_P2_L

ISOLATE# LANCLK_REQ#

G1

20

20 20

19

18

18 18

17

16

16 16

15

14

14 14

13

12

12 12

11

10

10 10

9

8

8 8

7

6

6 6

5

4

4 4

3

2

2 2

1

ACES_50559-02001-001

E

For LAN function

+3VS

RL24 10K_0402_5%RL24 10K_0402_5%

LAN_EN<3 0>

CLKREQ_LAN#<29>

3 3

12

2N7002KW_SOT323-3

LANCLK_REQ#

2

G

1 3

D

QL53

S

LANCLK_REQ#

+3VS

12

1K_0402_5%

1K_0402_5% RL6

RL6

@

15K_0402_5%

ISOLATE#

RL433 0_0402_5%

RL7

Rshort@

1 2

WOL_EN#

S

x Enable

Wake up

LOW

WOL_EN# <44>

Sx Disable Wake up

HIGH HIGH

PJ7

JP@PJ7

JP@

+3VALW_PCH +3V_LAN

2

JUMP_43X39

112

S0

+3V_LAN rising time (10%~90%) need > 1ms and <100ms.

LAN WOL LAN_EN ISOLATEB S0 Sx S0 Sx

--------------------------------------------- 0 0 0 0 1 1 0 1 0 0 1 1 1 0 1 1 1 1 1 1 1 1 1 0*

4 4

* S3: after SUSP# assert low over 100ms S4/S5: after SYSON assert low over 100ms

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PCIe-LAN-RTL8105E

VSKAA

E

0.3

39 57Monday, March 18, 2013

0.3

5

D D

30m

ils

1 2

+3VS

RW1

0_0402_5%

please close the pin19 of UW1

+3VS_CR

30mils

C C

+3VS_CR

1

CW2

0.1U_0402_16V4Z

2

4

1

CW1

2.2U_0402_6.3V6M

2

CW8

0.1U_0402_16V4Z

USB20_N3<32> USB20_P3<32>

+VCC_3IN1

30mils

CW5

0.1U_0402_16V4Z

+3VS_CR

+3VS_CR +3VS_CR

+3VS_CR +VDD18

12mils

1

2

1

UW1

2

22

RSTZ

2

DM

3

DP

1

DVDD

24

PMOS

19

DVDD

23

DVDD

20

GPIO0

4

AVDD

18

VDD18

25

Thermal pad

GL834L-OGY01_QFN24_4X4

3

MS_INS SD_D2/MS_D5/SB13 SD_D3/MS_D4/SB12

SD CMD/SD_CMD

SD CLK/SD_CLK

SD_CDZ SD_D0/MS_D6/SB9 SD_D1/MS_D7/SB8

MS BS/MS_BS

SD_WP/MS_D1/SB5

SD_D4/MS_D0/SB4 SD_D5/MS_D2/SB3 SD_D6/MS_D3/SB1

SD_D7/MS_CLK/SB0

For EMI request

Place close to chip)

(

5 17

SD_DATA2

16

SD_DATA3

15

SDCMD

14

SDCLK

21

SDCD#

13

SD_DATA0

12

SD_DATA1

11 10

SDWP

9 8 7 6

LW6

EMI@LW6

BLM15BB121SN1D_0402

EMI@

12

SDCMD_R

2

1

NC (default)

GPIO0 Normal mode

Power saving mode

2

LW5

EMI@LW5

BLM15BB121SN1D_0402

CW14

@EMI@CW14

@EMI@

4.7P_0402_50V8J

EMI@

10K pull down

SD_DATA0

SD_DATA1

SD_DATA2

SD_DATA3

12

LW1

EMI@LW1

SDCLK_R

EMI@CW9

EMI@

LW2

LW3

LW4

EMI@

EMI@LW2

EMI@

EMI@LW3

EMI@

EMI@LW4

EMI@

BLM15BB121SN1D_0402

2

CW9

4.7P_0402_50V8J

1

12

SD_DATA0_R

12

SD_DATA1_R

12

SD_DATA2_R

12

SD_DATA3_R

EMI@

1

EMI@

2

CW12

CW13

1

4.7P_0402_50V8J

2

CW10

CW11

1

4.7P_0402_50V8J

please close the pin4 of UW1

+3VS_CR

30mils

CW3

2.2U_0402_6.3V6M

B B

1

CW4

0.1U_0402_16V4Z

2

+3VS_CR

1

2

De-coupling and Bulk capacitor should place near to

< 2 in 1 Card Reader >

Conn@ JCARD

Conn@

12

GND_SW

13

GND_SW

T-SOL_156-2000302604

JCARD

VDD

CMD

CLK VSS VSS

DAT0 DAT1 DAT2

CD/DAT3

WP_SW

CD_SW

5 3 6 7 4

8 9 1 2

10 11

SDCMD_R SDCLK_R

SD_DATA0_R SD_DATA1_R SD_DATA2_R SD_DATA3_R

SDWP# SDCD

lose to connector

C

1

2

"Normal Close" type connector

CD_SW WP_SW

Card Uninsertion

Close

Protect disable

Close

Card Insertion

A A

Open

Open Close

Protect Enable

Close

Cardreader chip and Combo Socket

Close to IC

1

CW7

CW6

0.1U_0402_16V4Z

CW7

4.7U_0402_6.3V6M

2

For normal close type connector invert circuit

12

RW3

RW3 100K_0402_5%

100K_0402_5%

QW1A

2

SDCD

G

30mil

+VCC_3IN1

SDCD#

61

D

2N7002KDWH_SOT363-6

S

RW4

RW4 100K_0402_5%

100K_0402_5%

SDWP#

+3VS_CR+3VS_CR

12

5

G

QW1B

34

S

SDWP

D

2N7002KDWH_SOT363-6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/19 2015/04/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

USB-CardReader Genesys GL834L

VSKAA

40 57Monday, March 18, 2013

1

0.3

5

4

3

2

1

Right side USB 3.0 x 2/ Sleep&Charge

U5

14641@U5

14641@

1

CHG_PWR_GATE#<44>

RR2

SLP_CHG_CB1<32>

D D

QR1A

EC_SMB_CK1<44,48,49>

WCM-2012-900T_0805

3

2

LR7

1

4

L56

1

4

L60

EC_SMB_DA1<44,48,49>

4

USB20_P0_R

4

1

USB20_N0_R

1

EMI@LR7

EMI@

2

U3RXDP1_L

2

3

U3RXDN1_L

3

EMI@

2

U3TXDP1_C_L

2

3

EMI@

Right rear USB3.0 Conn.

Right rear USB3.0 Conn.Right rear USB3.0 Conn.

USB20_P0<32>

USB20_N0<32>

C C

KINGCORE WCM-2012HS-670T

U3RXDP1<32>

U3RXDN1<32>

1 2

U3TXDP1<32>

U3TXDN1<32>

U3TXDP1_C

C903 0.1U_0402_10V7KC903 0.1U_0402_10V7K

1 2

U3TXDN1_C U3TXDN1_C_L

C904 0.1U_0402_10V7KC904 0.1U_0402_10V7K

KINGCORE WCM-2012HS-670T

6 1

2N7002KDWH_SOT363-6

14640@

2N7002KDWH_SOT363-6

14640@

RR2

+3VALW +3VALW

4.7K_0402_5%

2

5

QR1B

3 4

0_0402_5%

14640@

14641@

RR3

1 2

USB20_N1_S USB20_P1_S CHG_CB1

RR4

4.7K_0402_5%

14640@

1 2

CHG_CB1

CHG_CB0

CEN

2

DM

3

DP

4

CB1

9

PGND

MAX14641ETA+TGH7_TDFN-EP8_2X2

U5

MAX14640ETA+TGH7

14640@

Address 0x35

8

CHG_CB0

CB0

7

USB20_N1

TDM

6

USB20_P1

TDP

5

VCC

Right front USB3.0 Conn.

Right front USB3.0 Conn.Right front USB3.0 Conn.

(Support S&C function)

(Support S&C function)(Support S&C function)

U3TXDP2<32>

U3TXDN2<32>

1

C892

0.1U_0402_10V7K

2

USB20_N1 <32> USB20_P1 <32>

+5VALW

U3TXDP2

U3TXDN2

RR10_0402_5% 14641@ RR10_0402_5% 14641@

U3RXDP2<32>

U3RXDN2<32>

1 2

C905 0.1U_0402_10V7KC905 0.1U_0402_10V7K

1 2

C906 0.1U_0402_10V7KC906 0.1U_0402_10V7K

SLP_CHG_CB0 <32>

USB20_P1_S

USB20_N1_S

U3TXDN2_C

State table for MAX14641

0

USB20_P1_R

USB20_N1_R

U3RXDP2_L

U3RXDN2_L

U3TXDP2_C_LU3TXDP2_C

U3TXDN2_C_L

Mode

2A auto-detection charger mode for Apple device.

AM2

Resistor dividers are connected to DP/DM. Including DCP

Forced 1A charger mode for Apple devices.

AP1

Resistor dividers are connected to DP/DM.

USB pass-through mode.DP/DM are connected to TDP/TDM

PM

USB pass-through mode with CDP emulation.

CM

Auto connects DP/DM to TDP/TDM depending on CDP detection status.

CB0 STATUS

CB1

0

1

0

1 1

WCM-2012-900T_0805

3

2

LR8

KINGCORE WCM-2012HS-670T

1

4

KINGCORE WCM-2012HS-670T

1

4

1

EMI@LR8

EMI@

2

3

2

3

1

4

L58

1

4

L59

+USB_VCCA

47U_0805_6.3V6M

SE00000PL00

D88

1

2

4

5

3

8

12

@ESD@

W=80mils

C987

0.1U_0402_10V7K

9

10

8

9

7

6

65

1

CR8

C898

@

2

4.7U_0603_6.3V6K

U3TXDP2_C_L

U3TXDN2_C_L

U3RXDP2_L

U3RXDN2_L

Compal Electronics, Inc.

Title

RUSB/S&C

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

VSKAA

1

0.3

of

41 57Monday, March 18, 2013

6

OUT

7

OUT

8

OUT

5

OCB

W=80mils

+USB_VCCA

@EMI@

12

CR40 1000P_0402_50V7K

USB_CHG_OC# <32,44>

JUSBF

1

VBUS

2

D-

3

D+

4

GND

5

StdA-SSRX-

6

StdA-SSRX+

7

GND-DRAIN

8

StdA-SSTX-

9

StdA-SSTX+

LOTES_AUSB0015-P001A

Compal Secret Data

Deciphered Date

2

For EMI

Conn@JUSBF

Conn@

GND GND GND GND

U3TXDP2_C_L

U3TXDN2_C_L

U3RXDP2_L

U3RXDN2_L

10 11 12 13

YSCLAMP0524P_SLP2510P8-10-9

10 11 12 13

1

2

4

3

8

D87

+USB_VCCB

12

47U_0805_6.3V6M

SE00000PL00

@ESD@

9

U3TXDP1_C_L

10

8

U3TXDN1_C_L

9

7

U3RXDP1_L

7

6

U3RXDN1_L

65

4

W=80mils

0.1U_0402_10V7K

C900

1

C901

2

1

CR7

@

2

4.7U_0603_6.3V6K

+5VALW

2.5A

U14

2

IN

3

IN

USB_CHG_EN#<44>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

EN/ENB

1

GND

SY6288DCAC_MSOP8

SA00006DN00

+USB_VCCA

USB20_N1_R USB20_P1_R

U3RXDN2_L U3RXDP2_L

U3TXDN2_C_L U3TXDP2_C_L

2012/04/19 2015/04/19

W=80mils

+5VALW

2.0A

U15

2

IN

3

IN

B B

A A

USB_EN#0<44>

+USB_VCCB

5

4

EN/ENB

1

GND

SY6288DCAC_MSOP8

SA00004KB00 SA00003TV00

USB20_N0_R USB20_P0_R

U3RXDN1_L U3RXDP1_L

U3TXDN1_C_L U3TXDP1_C_L

+USB_VCCB

6

OUT

7

OUT

8

OUT

5

OCB

1 2 3 4 5 6 7 8 9

For EMI

@EMI@

12

CR39 1000P_0402_50V7K

USB_OC#0 <32,44>

JUSBR

Conn@JUSBR

Conn@

VBUS DD+ GND StdA-SSRXStdA-SSRX+

GND

GND-DRAIN

GND

StdA-SSTX-

GND

StdA-SSTX+

GND

LOTES_AUSB0015-P001A

1

U3TXDP1_C_L

2

U3TXDN1_C_L

4

U3RXDP1_L

5

U3RXDN1_L

3

YSCLAMP0524P_SLP2510P8-10-9

A

UA1

MIC1_LINE1_R_R MIC1_LINE1_R_L

close to pin19

RA30 20K_0402_1%RA30 20K_0402_1%

CA54 2.2U_0402_6.3V6MCA54 2.2U_0402_6.3V6M

CA53 2.2U_0402_6.3V6MCA53 2.2U_0402_6.3V6M

INT_MIC_DATA<23>

12

@

INT_MIC_CLK_R

EC_MUTE_INT<44>

1 2

EC_MUTE#<44>

1 1

@ESD@

CA65 0.01U_0402_25V7K

1 2

AZ_RST_HD#<27>

close to pin 28

1 2

CA60 10U_0603_6.3V6MCA60 10U_0603_6.3V6M

1

12

CA25

2.2U_0603_10V6K

2 2

INT_MIC_CLK<23>

CA55

0.1U_0402_10V7K

2

RA34 20K_0402_1%

For EMI reserve

RA42

1 2

FBMA-10-100505-301T_2P

CAM_EMI@

+MIC1_VREFO_L +MIC1_VREFO_R

AZ_SYNC_HD<27>

12

CA584.7U_0603_6.3V6K CA584.7U_0603_6.3V6K CA574.7U_0603_6.3V6K CA574.7U_0603_6.3V6K

MONO_IN

INT_MIC_CLK_R

SENSE_A SENSE_B

269@ RA50

269@

1 2

22 21

17 16

31 30 29

15 14

20

12

10

11

10 mil

19

AC_JDREF

28

LDO_CAP

27

AC_VREF

34

CPVEE

35

CBN

36

CBP

2 3

13 18

47

4

ALC259-VC2-CG_MQFN48_6X6

259@

Hight

OW

L

259@

Internal AMP

Enable Disable

RA50

4.7K_0402_5%

To solve S&M noise issue

EC_MUTE#

B

MIC1_R MIC1_L

MIC2_R MIC2_L

MIC1_VREFO_L MIC1_VREFO_R MIC2_VREFO

LINE2_R LINE2_L

MONO_OUT

PCBEEP

SYNC

RESET#

JDREF LDO_CAP VREF CPVEE CBN CBP

GPIO0/DMIC_DATA GPIO1/DMIC_CLK

SENSE_A SENSE_B

EAPD PD#

DVDD

DVDD_IO

AVDD1 AVDD2

PVDD1 PVDD2

SPK_OUT_R+ SPK_OUT_R-

SPK_OUT_L+

SPK_OUT_L-

HPOUT_R HPOUT_L

SDATA_OUT

SDATA_IN

BCLK

LINE1_L

LINE1_R

AVSS1 AVSS2 PVSS1 PVSS2

DVSS

Thermal Pad

NC

1 9

25 38

39 46

45 44

40 41

33 32

5 8

AZ_SDIN0_HD_R

6

AZ_BITCLK_HD

23

LINE1_R_C_L

24

LINE1_R_C_R

48

26 37 42 43 7

49

DGND

+DVDD +DVDD

+AVDD +AVDD

+PVDD +PVDD

SPKR+ SPKR-

SPKL+ SPKL-

HPOUT_R HPOUT_L

AGND

75_0402_1%

RA19

RA19 RA20

RA20

75_0402_1%

RA23 33_0402_5%RA23 33_0402_5%

269@

1 2

CA9 0.1U_0402_10V6K

269@

1 2

CA10 0.1U_0402_10V6K

or EMI reserve

F close to codec

AZ_BITCLK_HD

20 mil

0.1U_0402_16V4Z

close to pin1

0.1U_0402_16V4Z

close to pin9

HP_R <43>

HP_L <43>

12

MIC1_LINE1_R_L

MIC1_LINE1_R_R

For S&M

@EMI@

RA4110_0402_5%

C

CA4

CA45

AZ_SDOUT_HD <27>

AZ_SDIN0_HD <27>

AZ_BITCLK_HD <27>

CA51

1 2

12

10P_0402_50V8J

35mA for 3.3V level

+DVDD

1

2

1

2

@EMI@

1

CA3

2.2U_0402_6.3V6M

2

For P/N and footprint P

lease place them to ISPD page

UA1

ALC269Q-VB6-CG

269@

RA22

0_0402_5%

1 2

RA44 0_0603_5%

1 2

RA43 0_0603_5%

1 2

RA39 0_0603_5%

1 2

RA38 0_0603_5%

1 2

RA31 0_0603_5%

+3VS +5VALW

Rshort@

@EMI@

D

40 mil

+AVDD

10U_0603_6.3V6M

0.1U_0402_10V7K

2

CA47

CA42

1

CA33

0.1U_0402_10V7K

close to pin39

CA32

0.1U_0402_10V7K

close to pin46

2

59@ No

269@ Yes

650mA for 5V level

lose to pin 38close to pin 25

c

0.1U_0402_10V7K

1

2

CA50

CA37

1

10U_0603_6.3V6M

60 mil

+PVDD

1

2

1

2

Sleep and Music

2

CA35

1

10U_0603_6.3V6M

E

RA18

1 2

0_0603_5%

RA24

1 2

0_0603_5%

+5VALW

Beep sound

3 3

Sense Pin

SENSE A

4 4

PCI Beep

PCH_SPKR<27>

Impedance

39.2K

20K

10K

5.1K

Codec Signals

PORT-I (PIN 32, 33)

PORT-B (PIN 21, 22)

PORT-C (PIN 23, 24)

(PIN 48)

RA52

1 2

47K_0402_5%

RA49

4.7K_0402_5%

Function

H

eadphone out

Ext. MIC

1 2

CA70

1 2

MONO_IN

0.1U_0402_10V7K

CA27

100P_0402_50V8J

For better sound by customer request

SPK

2W 4ohm =40mil 1W 8ohm =20mil

SPKL+

SPKL-

SPKR+

SPKR-

For EMI reserve close to codec

1 2

Rshort@

RA7 0_0603_5%

1 2

Rshort@

RA8 0_0603_5%

1000P_0402_50V7K

@EMI@

1 2

Rshort@

RA9 0_0603_5%

1 2

Rshort@

RA10 0_0603_5%

1000P_0402_50V7K

@EMI@

CA31

CA34

1

2

1

2

1

CA30

CA30 1000P_0402_50V7K

1000P_0402_50V7K

2

@EMI@

1

CA36

CA36 1000P_0402_50V7K

1000P_0402_50V7K

2

@EMI@

SPK_L1 <43>

SPK_L2 <43>

SPK_R1 <43>

SPK_R2 <43>

39.2K PORT-E (PIN 14, 15)

Security Classification

SENSE B PORT-F (PIN 16, 17)

20K

10K

PORT-H (PIN 20)

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

MIC/LINE IN

MIC1_LINE1_R_R

MIC1_LINE1_R_L

+3VL

SM_SENSE#<44>

EC

D

RA48 2.2K_0402_5%RA48 2.2K_0402_5%

RA46 2.2K_0402_5%RA46 2.2K_0402_5%

61

RA29 100K_0402_5%

100K_0402_5%

2

3

5

4

12

269@RA29

269@

+MIC1_VREFO_R

+MIC1_VREFO_L

RA47

1K_0402_5%

RA45

MIC_SENSE

QA1A

2N7002DW-T/R7_SOT363-6

RA35 100K_0402_5%RA35 100K_0402_5%

2N7002DW-T/R7_SOT363-6

QA1A

269@

QA1B

269@

12

place close to chip

RA32 20K_0402_1%RA32 20K_0402_1%

NBA_PLUG<43>

Date: Sheet of

RA33 39.2K_0402_1%RA33 39.2K_0402_1%

Title

Size Document Number Rev

Custom

12

Compal Electronics, Inc.

HDA-ALC259-VC

E

RA37

RA37 0_0402_5%

0_0402_5%

SENSE_AMIC_SENSE

MIC1_R <43>

MIC1_L <43>

259@

JACK_SENSE <43>

42 57Monday, March 18, 2013

SPK Conn.

BIOS setupSM_DET

Speaker Type

BOM

SPK_R1<42> SPK_R2<42> SPK_L1<42> SPK_L2<42>

SPK_DET<33>

HeadPhone/LINE Out JACK

1 2

HP_L<42>

HP_R<42>

RA54 0_0402_5%Rshort@RA54 0_0402_5%Rshort@

1 2

RA53 0_0402_5%Rshort@RA53 0_0402_5%Rshort@

YSDA0502C_SOT23-3

HP_R_L

HP_R_R

@ESD@

<SM_DET> Intel : GPIO48 AMD Richland : GPIO173

JSPK

8

GND

7

GND

6

5

4

3

2

1

ACES_50228-0067N-001

Conn@

2

3

DA6

1

AMD Kabini :GPIO70

<SPK_DET> Intel : GPIO70 AMD Richland : GPIO74 AMD Kabini :GPIO62

NBA_PLUG<42>

JLINE

6 1 2

3

4

5

SINGA_2SJ-0960-D11

1

0

S&M option

Non-Harman detection

SPK_DET

Conn@JLINE

Conn@

Harman/Kardon

Non Harman

ONKYO

0

1 Non-Brand

269@

259@

MIC/LINE IN JACK

1 2

MIC1_L<42>

MIC1_R<42>

RA56 0_0402_5%Rshort@RA56 0_0402_5%Rshort@

1 2

RA55 0_0402_5%Rshort@RA55 0_0402_5%Rshort@

MIC1_R_L

MIC1_R_R

DA7

@ESD@

DA7

YSDA0502C_SOT23-3

JEXMIC

6 1 2

3

RA36

RA36 0_0402_5%

0_0402_5%

259@

4

5

SINGA_2SJ-0960-D11

2

3

1

+3VL

JACK_SENSE<42>

RA40

4.7K_0402_5%

269@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Conn@JEXMIC

Conn@

Compal Secret Data

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

AUDIO CONN

Monday, March 18, 2013

43 57

0.3

A

0.1U_0402_10V7K

1

CB1

0.1U_0402_10V7K

For EMI

CLK_PCI_EC

12

RB4

10_0402_5%

@EMI@

22P_0402_50V8J

+3VL

47K_0402_5%

1 2

CB12 0.1U_0402_10V7KCB12 0.1U_0402_10V7K

RB12 10K_0402_5%RB12 10K_0402_5%

@ESD@

CB19 100P_0402_50V8J

100K_0402_5%

1 2

RB17 4.7K_0402_5%RB17 4.7K_0402_5%

@EMI@

CB11

@EMI@

RB2

1 2

RPB1

1 8 2 7 3 6 4 5

2.2K_8P4R_5%

1 2

RB27

1

2

EC_RST#

CHG_PWR_GATE#

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_PWROK

E51_TXD

EC_MUTE_INT_R

1 1

2 2

+3VL

+3VS

3 3

4 4

0.1U_0402_10V7K

KSI[0..7]<45>

KSO[0..15]<45>

EC_MUTE_INT<42>

2

GATEA20<33>

KB_RST#<33>

SERIRQ<30>

LPC_FRAME#<30>

LPC_AD3<30> LPC_AD2<30> LPC_AD1<30> LPC_AD0<30>

CLK_PCI_EC<29>

PLT_RST#<31,38,39>

EC_SCI#<33>

WOWL_EN#<46>

KSI[0..7]

KSO[0..15]

CHG_PWR_GATE#<41>

EC_SMB_CK1<41,48,49> EC_SMB_DA1<41,48,49> EC_SMB_CK2<13,24,30,37> EC_SMB_DA2<13,24,30,37>

PM_SLP_S3#<28> PM_SLP_S5#<28>

USB_OC#2<32,39> USB_CHG_OC#<32,41> USB_CHG_EN#<41> USB_EN#2<39>

FAN_SPEED1<5>

WL_OFF#<38>

PM_PWROK<28>

SM_SENSE#<42>

CLK_EC<2 8>

POK<28,50>

1 2

RB13 0_0402_5%@RB13 0_0402_5%@

1 2

RB14 0_0402_5%RB14 0_0402_5%

1

CB2

CB4

2

0.1U_0402_10V7K

EC_SMI#<33>

KB_LED<45>

E51_TXD<38>

E51_RXD<38>

BT_ON<38>

RB38 0_0402_5%

1 2

Rshort@

0.1U_0402_10V7K

1

2

CHG_PWR_GATE#

100K_0402_5%

Voltage Comparator Pins FOR 9012 A3

VCIN0 pin109 V

CIN1 pin102

VCOUT0 pin104

VCOUT1 pin103

A

B

1000P_0402_50V7K

1

CB5

CB6

2

1000P_0402_50V7K

1 2 3 4 5 7 8

10

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

12

12 13 37 20 38

55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82

77 78 79 80

6 14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

1

CB16

CB16 20P_0402_50V8

20P_0402_50V8

2

CLK_PCI_EC

EC_RST#

TRANS_SEL

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

E51_TXD

PM_PWROK

EC_MUTE_INT_R POK_R

RB22

>1.2V <1.2V

HIGH

(default)

HIGH

LOW

LOW (default)

B

+3VL

1

CB7

2

UB1

GATEA20/GPIO00 KBRST#/GPIO01 SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1

LPC & MISC

LPC_AD0

CLK_PCI_EC PCIRST#/GPIO05 EC_RST# EC_SCII#/GPIO0E GPIO1D

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

EC_SMB_CK1/GPIO44 EC_SMB_DA1/GPIO45 EC_SMB_CK2/GPIO46 EC_SMB_DA2/GPIO47

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 GPIO0A GPIO0B GPIO0C GPIO0D EC_INVT_PWM/GPIO11 FAN_SPEED1/GPIO14 EC_PME#/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 PCH_PWROK/GPIO18 SUSP_LED#/GPIO19 NUM_LED#/GPIO1A

XCLKI/GPIO5D XCLKO/GPIO5E

Int. K/B

Int. K/B Matrix

Matrix

9

22

33

EC_VDD/VCC

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SM Bus

GPIO

GND/GND

11

24

+3VL

CB3

0.1U_0402_10V7K

1 2

96

125

67

111

EC_VDD0

EC_VDD/VCC

EC_VDD/AVCC

BATT_TEMP/GPIO38

AD Input

DAC_BRIG/GPIO3C

EN_DFAN1/GPIO3D

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B CAP_INT#/GPIO4C

TP_CLK/GPIO4E

TP_DATA/GPIO4F

CPU1.5V_S3_GATE/GPXIOA00

WOL_EN/GPXIOA01

ME_EN/GPXIOA02

VCIN0_PH/GPXIOD00

SPI Flash ROM

PECI_KB930/GPIO41

FSTCHG/GPIO50

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

GPIO

PWR_LED#/GPIO54

BATT_LOW_LED#/GPIO55

PM_SLP_S4#/GPIO59

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04

PROCHOT_IN/GPXIOA05

H_PROCHOT#_EC/GPXIOA06

VCOUT0_PH/GPXIOA07

GPO

BKOFF#/GPXIOA08

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

SA_PGOOD/GPXIOA11

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

GPI

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

PECI_KB9012/GPXIOD07

GND/GND

AGND/AGND

GND/GND

GND0

KB9012QF-A3_LQFP128_14X14

69

94

113

KB9012QF-A3_LQFP128_14X14

9012@

35

GPIO0F

BEEP#/GPIO10

GPIO12

ACOFF/GPIO13

GPIO39

ADP_I/GPIO3A

GPIO3B

GPIO42

IMON/GPIO43

IREF/GPIO3E

EAPD/GPIO4D

SPIDI/GPIO5B

SPIDO/GPIO5C SPICLK/GPIO58 SPICS#/GPIO5A

ENBKL/GPIO40

SYSON/GPIO56

VR_ON/GPIO57

GPXIOD06

V18R

UB1

UB1 NPCE885NB0DX LQFP 128P

NPCE885NB0DX LQFP 128P

885@

EC_ON_R

885_EC_ON

C

21 23 26

FANPWM

27

63

BATT_PRES

64 65 66 75 76

68 70

885_EC_ON

71 72

83 84 85

EC_SMB_CK3

86

EC_SMB_DA3

87

TP_CLK

88

TP_DATA

97 98 99 109

119 120 126 128

73

WLAN_WAKE#

74 89 90 91 92 93 95

SYSON

121

VR_ON

127

RB5 0_0402_5%Rshort@RB5 0_0402_5%Rshort@

100 101 102 103

H_PROCHOT#_EC

104

VCOUT0_PH_L

105 106 107 108

110

ACIN_D

112

EC_ON_R

114

ON/OFFBTN#

115

LID_SW#

116

SUSP#

117

+VTT_EC

118

EC_PECI

124

+EC_V18R

1

2

1 2

9012@

RB36 0_0402_5%

1 3

D

S

D

S

QB2

2N7002K_SOT23-3

G

2

1 2

CB15

4.7U_0805_10V4Z

885@

WL_BT_LED# <45> USB_EN#0 <41>

FANPWM <5> CLK_REQ_GC6# <13>

BATT_PRES <47,48> USB_OC#0 <32,41> ADP_I <48,49> ADP_V <49> HDPLOCK <37> EC_ENBKL <22,23,31>

HDPINT <37>

PCH_SUSPWRDN# <28>

SUSACK# <28>

EC_MUTE# <42>

PM_SLP_S4# <28>

EC_SMB_CK3 <22> EC_SMB_DA3 <22>

TP_CLK <45>

TP_DATA <45>

ON/OFFBTN# <45> LID_SW# <45>

SUSP# <46,52,53>

1

@

2

Reserve this signal to EC by SW demand 2

VGATE <28,54>

GPS_DOWN# <13> PWRME_CTRL <27>

VCIN0_PH <48>

EC_SDIO <30> EC_SDI <30> EC_SCK <30> EC_CS0# <30>

WLAN_WAKE# <38>

WOL_EN# <39>

HDPACT <37> BATT_FULL_LED# <45> CAPS_LED# <45> PWR_SUSP_LED# <45> BATT_CHG_LOW_LED# <45> SYSON <51> VR_ON <54>

PCH_RSMRST# <28> EC_LID_OUT# <27> PROCHOT_IN <48>

BKOFF# <23>

PBTN_OUT# <28> PCH_PWR_EN <46> PCIE_WAKE# <28,39>

885@

RB20 330K_0402_5%

1U_0402_6.3V6K

1U_0402_6.3V6K CB50

CB50

RB24

885@RB24

885@

10K_0402_5%

011/10/18a

FB_CLAMP <13,14,17>

PROCHOT_IN connect to power portion (9012 only)

1 2

885@

1 2

RB3 0_0402_5%

RB3 0_0402_5% RB19 43_0402_5%RB19 43_0402_5%

12

EC_ON <50>

12

D

VR_HOT#<54>

VCIN0_PH connect to

ower portion (9012 only)

p

+1.05VS_VCCP

H_PECI <5>

+3VL

RB1 0_0402_5%

H_PROCHOT#_EC

SSM3K7002F_SC59-3

For KB9012 EC_ON low pulse work around

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

D

E

Rshort@

1 2

1

D

QB1

2

G

S

3

BATT_PRES

ACIN_D

FANPWM

ON/OFFBTN#

H_PROCHOT#_EC

LID_SW#

WLAN_WAKE#

TP_CLK

TP_DATA

EC_SMB_CK3

EC_SMB_DA3

SYSON

SUSP#

VR_ON

VCOUT0_PH_L

VCOUT0_PH connect to power portion (9012 only)

ACIN_D

Title

Size Document Number Rev

Date: Sheet of

1 2

CB9 100P_0402_50V8JCB9 100P_0402_50V8J

1 2

CB10 100P_0402_50V8JCB10 100P_0402_50V8J

1 2

CB17 100P_0402_50V8J

@ESD@

1 2

CB18 100P_0402_50V8J

@ESD@

1 2

@

RB6 10K_0402_5%

1 2

RB35 47K_0402_5%RB35 47K_0402_5%

1 2

RB37 47K_0402_5%RB37 47K_0402_5%

1 2

RB8 4.7K_0402_5%RB8 4.7K_0402_5%

1 2

RB9 4.7K_0402_5%RB9 4.7K_0402_5%

1 2

RB15 2.2K_0402_5%RB15 2.2K_0402_5%

1 2

RB16 2.2K_0402_5%RB16 2.2K_0402_5%

1 2

RB10 4.7K_0402_5%RB10 4.7K_0402_5%

1 2

RB21 10K_0402_5%RB21 10K_0402_5%

1 2

RB23 10K_0402_5%RB23 10K_0402_5%

Rshort@

1 2

RB34 0_0402_5%

RB18

330K_0402_5%

12

+3VALW_PCH

TRANS_SEL

Close to EC

SUSP#

Monday, March 18, 2013

1 2

@

1 2

CB14 180P_0402_50V8J

Compal Electronics, Inc.

LPC-EC-KB9012&930

1

CB8

CB8 47P_0402_50V8J

47P_0402_50V8J

2

+3VL

12

DB1RB751V40_SC76-2 DB1RB751V40_SC76-2

RB7

RB7 10K_0402_5%

10K_0402_5%

LVDS@

RB11

RB11 10K_0402_5%

10K_0402_5%

IEDP@

E

H_PROCHOT# <47,5>

+3VS

+3VL

+3VS

VS_ON <50>

ACIN <28,47,49>

44 57

0.3

5

4

3

2

1

Power Button

+3VL

R395

100K_0402_5%

TJG-533-V-T/R_6P

D D

Place on TOP

Place on BOT

TJG-533-V-T/R_6P

3

4

SW3

5

6

TJG-533-V-T/R_6P

3

4

SW4

5

6

1

2

1

2

LED/LID

BATT CHARGE /FULL LED

D24

2 1

HT-F196BP5_WHITE

+5VALW

C C

White LED bright when both AC-adaptor is plugged in Amber LED bright while charging battery from AC-adaptor. Amber LED blink during Critical Low Battery

HT-F196BP5_WHITE

D23

2 1

HT-191UD5_AMBER_0603

R60

R60 390_0402_5%

390_0402_5%

1 2

R5

R5 510_0402_5%

510_0402_5%

POWER LED

R61

3

C452

R61 390_0402_5%

390_0402_5%

1 2

R66

R66 510_0402_5%

510_0402_5%

1

@

2

LID_SW# <44>

D25

+5VALW

White LED bright when system is power on. White LED blink when system is sleep mode.

B B

WLAN/WiMAX LED

WOWL@

1 2

+5VALW

R268 0_0402_5%

1 2

+5VS

R269 0_0402_5%

NOWOWL@

2 1

HT-F196BP5_WHITE

D26

2 1

HT-191UD5_AMBER_0603

Amber LED bright while Wireless and/or WiMAX turns on.

+3VL

U21

U21 APX9132ATI-TRL_SOT23-3

APX9132ATI-TRL_SOT23-3

VDD2VOUT

A A

1

C453

0.1U_0402_16V4Z

2

GND

1

10P_0402_50V8J

100K_0402_5%

1 2

ON/OFFBTN#

BATT_FULL_LED# <44>

BATT_CHG_LOW_LED# <44>

and Battery is full charged

PWR_SUSP_LED# <44>

R819

12

10K_0402_5%

@

6 1

5

Q157A

Q157A 2N7002DW-T/R7_SOT363-6

3

2N7002DW-T/R7_SOT363-6

4

@

Q157B 2N7002DW-T/R7_SOT363-6

@

WL_BT_LED# <44>

2

Conn. Touchpad Connector

JPWR

Conn@JPWR

Conn@

2

ON/OFFBTN#

112

4

334

6

556

ON/OFFBTN# <44>

8

778

ACES_50611-0040N-001

+5VS

JTP

Conn@JTP

Conn@

16

15

16

14

13

14

12

11

12

10

9

10

8

7

8

6

5

6

4

3

4

2

1

2

HB_A060877-SAVR01

15 13 11 9 7 5 3 1

Keyboard LED

Q38

LED_WIMAX# <38>

Q38

+5VS

AO3413_SOT23

S

12

G

R587

10K_0402_5%

KBL@

KB_LED<44>

N

EW KEYBOARD CONN.

FC

N

2

G

KSI[0..7]

KSO[0..15]

CAPS_LED#<44>

+3VS

13

D

Q52

Q52 2N7002KW_SOT323-3

2N7002KW_SOT323-3

KBL@

S

KSI[0..7] <44>

KSO[0..15] <44>

R3 300_0402_5%R3 300_0402_5%

2

12

KBL@

D

13

+5VS_LED

JKB

1

2

3

4

5

KSI1 KSI6 KSI5 KSI0 KSI4 KSI3 KSI2 KSI7 KSO15 KSO12 KSO11 KSO10 KSO9 KSO8 KSO13 KSO7 KSO6 KSO14 KSO5 KSO3 KSO4 KSO0 KSO1 KSO2

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

34 GND1 GND2

CVILU_CF17341U0R0-NH

Conn@

JBLGConn@

GND GND

ACES_50578-0040N-001

35 36

1

2

3

4

5 6

+3VS

TP_DATA <44> TP_CLK <44>

PM_SMBDATA <11,12,30,38> PM_SMBCLK <11,12,30,38>

S

+5VS_LED

ISPD

ZZZ

PCB LA-9866P

crew Hole

H1

H2

H_4P6

H_4P6x4P2

@

H_3P0

@

1

H7

H_4P0

@

1

H12

H_3P0

@

1

H6

1

Battery Reset

TJG-533-V-T/R_6P

3

ENLDO<50>

H3

H_4P2

@

1

4

VGACPU WLAN standoff

H4

H5

H_3P3

@

1

PTH NPTH

H9

H10

H11

H8

H_3P0

H_3P2

@

1

H13

H14

H15

H_3P0

@

1

H15

H_7P0

@

1

H11

H_3P0

@

1

H_3P0

@

1

PCB Fedical Mark PAD

FD1@FD1

@

FD3@FD3

FD2@FD2

@

1

FD4@FD4

@

1

H_3P3

@

5

SW2

6

GPU

1

2

H17

1

UV1

N14MGL@UV1

N14MGL@

SA000069000

N14M-GL

H_3P2

@

H29

H18

1

H_3P3

@

1

H_3P2x3P7N

@

H19

H_3P2N

@

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

TP/ISPD/KB/Screw

VSKAA

Monday, March 18, 2013

1

of

45 57

0.3

A

+3VALW TO +3VS

+5VALW

VIN 5V and 3.3V (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm

+5VALW TO +5VS

C45

Load Switch

1U_0402_6.3V6K

1 1

1

@

+5VALW

2

+3VALW

1

C44

@ C44

@

1U_0402_6.3V6K

2

SUSP#

B

U1

1

VOUT1

VIN1

2

VOUT1

VIN1

3

4

5

6 7

CT1

ON1

GND

VBIAS

ON2

CT2

VIN2

VOUT2

VIN2

VOUT2

GPAD

TPS22966DPUR_SON14_2X3

C

14

+5VS_LS

13

12

11

10

9 8

15

C19 180P_0402_50V8JC19 180P_0402_50V8J

1 2

C18 330P_0402_50V7KC18 330P_0402_50V7K

1 2

+3VS_LS

1 2

PAD-OPEN 4x4m

PJ5

JP@

1 2

PAD-OPEN 4x4m

+3VS

1

C21

@

2

0.1U_0402_10V7K

1

C20

@

2

0.1U_0402_10V7K

+5VS

PJ3

JP@

+3VALW TO +3V_WLAN

or AOAC and WOWL

f

WOWL_EN#<44>

D

WOWL@

RM2

100K_0402_5%

+3VALW

12

R1459

R1459 10K_0402_5%

10K_0402_5%

1 2

47K_0402_5%

R1458

WOWL@

2

C910

0.1U_0402_10V7K

1

2

WOWL@

C911

0.01U_0402_25V7K

1

+3VALW

Vgs=-4.5V,Id=3A,Rds<97mohm

S

G

2

AO3413_SOT23

AO3413_SOT23 Q211

Q211

D

1 3

WOWL@

+3V_WLAN

E

RM1

1 2

0_0603_5%

NOWOWL@

+3VS

For S3 CPU Power Saving

+3VL

R4

R4 10K_0402_5%

10K_0402_5%

885@

VCCP_PWRGOOD<52>

2 2

1 2

R158 220K_0402_5%R158 220K_0402_5%

SUSP

Reserve CAP to avoid Power Noise

3 3

4 4

0.675VR_EN

34

Q6B

5

2N7002KDWH_SOT363-6

0.675VR_EN <51>

+5VS_ODD

R457

470_0805_5%

ZPODD@

1 2 61

Q53A

2

2N7002DW-T/R7_SOT363-6

ZPODD@

ODD_EN#<33>

PCH_PWR_EN<44>

SUSP

SUSP#<44,52,53>

ODD_EN#

2N7002DW-T/R7_SOT363-6

2

4

ZPODD@

+5VALW

1 2

61

+3VS

5

Q53B

885@

1 2

R422

R422 100K_0402_5%

100K_0402_5%

Q6A

Q6A 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

+5VS TO +5VS_ODD

+5VS

R441

R441 100K_0402_5%

100K_0402_5%

ZPODD@

R440

1 2

3

47K_0402_5%

ZPODD@

+5VALW

2

G

+0.675VS

R421

R421 22_0805_5%

22_0805_5%

1 2

13

D

Q189

2N7002KW_SOT323-3

S

2

1

2

1

R5545

R5545 10K_0402_5%

10K_0402_5%

1 2

PCH_PWR_EN#

13

D

Q5527

SB00000EN00

S

2N7002E-T1-E3_SOT23-3

2

SUSP

G

2N7002KW_SOT323-3

C471

0.1U_0402_10V7K

ZPODD@

Q45

2

AO3413_SOT23

C217

0.01U_0402_25V7K

ZPODD@

PCH_PWR_EN# <34>

+1.05VS_VCCP

R468

R468 470_0805_5%

470_0805_5%

1 2

13

D

Q60

2

G

S

+5VS

Vgs=-4.5V,Id=3A,Rds<97mohm

12

S

G

D

1 3

ZPODD@

NONZP@

R120

R120 0_0805_5%

0_0805_5%

+5VS_ODD

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DC-DC INTERFACE

VSKAA

Monday, March 18, 2013

E

46 57

0.3

A

B

C

D

PC101

VIN

12

PC104

EMI@ PC104

EMI@

1000P_0603_50V7K

Other component (37.1)

H_PROCHOT#<44,5>

PQ101A

@

PQ101A

@

DMN66D0LDW-7_SOT363-6

PQ101B

@

PQ101B

@

DMN66D0LDW-7_SOT363-6

61

D

S

34

D

S

2

G

12

PD102

LL4148_LL34-2

Dual package?

5

G

12

PD103

LL4148_LL34-2

PR104

47K_0402_1%

PC105

0.022U_0402_16V7K

12

PR108

1.5M_0402_5%

47K_0402_1%

PC107

0.022U_0402_16V7K

12

PR107

1.5M_0402_5%

12

PR106

1

PU102A

LM393DR_SO8

12

LM393DR_SO8

+5VS

+3VALW

12

PR103

10K_0402_1%

12

10K_0402_1%

12

100K_0402_1%

PR105

8

3

P

+

O

2

-

G

4

100P_0402_50V8J

PU102B

8

5

P

+

7

O

6

-

G

4

BATT_PRES <44,48>

PC106

ACIN <28,44,49>

Other component (37.1)

PJP1

@PJP1

1 1

2 2

@

ACES_50299-00401-001

1

2

3

4

A51 need add fuse

PF1

7A_32V_S1206-H-7.0A

21

EMI Part (47.1)

DC_IN_S1

12

PC102

EMI@ PC102

EMI@

1000P_0603_50V7K

PL101

EMI@ PL101

EMI@

FBMA-L11-201209-121LMA50T_0805

1 2

PL102

EMI@ PL102

EMI@

FBMA-L11-201209-121LMA50T_0805

12

PC103

EMI@ PC103

EMI@

100P_0603_50V8

12

EMI@ PC101

EMI@

100P_0603_50V8

For ML1220 RTC (38.2)

PBJ101@

ML1220T13RE

- +

3 3

12

+RTC

PR101

560_0603_5%

1 2

+RTC_R

PR102

560_0603_5%

1 2

+RTCBATT

Remark : C

heck Adapter/Battery surge load when Iccmax.

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/24 20 12/07/12

Compal Secret Data

Deciphered Date

C

Date: Sheet of

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Compal Electronics, Inc.

DCIN/Surge load protect

VSKAA

D

47 57

0.3

A

B

C

D

Other component (37.1)

1 1

2 2

PJP2

@PJP2

@

ACES_50299-01001-W01

1

2

3

4

5

6

7

8

9

10

BATT_P5 EC_SMDA EC_SMCA

PR20

100_0402_1%

BATT_S1

1 2

PF2

10A_125V_TR2/6125FF10-R

PR21

PR21 100_0402_1%

100_0402_1%

1 2

21

12

PR19

1K_0402_1%

12

PR14

PR14 1K_0402_1%

1K_0402_1%

PR16

6.49K_0402_1%

12

BATT_PRES <44,47>

EC_SMB_DA1 <41,44,49>

EC_SMB_CK1 <41,44,49>

VMB

+3VL

EMI Part (47.1)

PL2

EMI@ PL2

EMI@

FBMA-L11-201209-121LMA50T_0805

1 2

PL3

EMI@ PL3

EMI@

FBMA-L11-201209-121LMA50T_0805

12

PC7

EMI@ PC7

EMI@

1000P_0402_50V7K

12

PC8

EMI@ PC8

EMI@

0.01U_0402_25V7K

BATT+

OTP (39.7)

ADP_I<44,49>

@PR2

@

0_0402_5%

PROCHOT_IN<44> VCIN0_PH<44>

1 2

Initial Recovery

75W N14M-GL

90W N

14P-GV2

0.90V 0.72V

1.05V

PR2

PR1

1 2

PR3

1 2

0.90V

+3VL

12

PR4

1K_0402_1%

20K_0402_1%

PR5

@PR5

@

0_0402_5%

1 2

12

PC11

@PC11

@

0.1U_0402_10V7K

12.1K_0402_1%

12

PH1

100K_0402_1%_TSM0B104F4251RZ

3 3

CPU OTP

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/24 2012/07/12

Compal Secret Data

Deciphered Date

C

Initial Recovery

90 C

70 C

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

BATTERY CONN / OTP

VSKAA

D

48 57

0.3

A

B

C

D

for reverse input protection

13

D

2

PQ209

PQ209 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

G

S

PR225

1 2

1M_0402_5%

1 1

2 2

3 3

1M_0402_5%

PQ203

PQ203 TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

5

12

PC230

2200P_0402_50V7K

1 2 3

4

BQ24735_ACDRV_1

1 2

3M_0402_5%

PR226

S

SI7716ADN-T1-GE3_POWERPAK8-5

1 2 3

12

PC231

0.1U_0402_25V6

12

PR234

PR235

4.12K_0603_1%

PQ205

4

+3VL

P2VIN B+P1

PC238

0.1U_0603_25V7K

PR239

10K_0402_1%

1 2

1

2

0.1U_0402_25V6

12

BQ24735_CMSRC

BQ24735_ACDRV

5

ACIN<28,44,47>

VIN

Vin Dectector

Min. Typ Max. H-->L 17.23V L-->H 17.63V

ILIM and external DPM

3.61A

4 4

Charger controller (40.1), Support component (40.2)

EMI Part (47.1)

PL201

EMI@ PL201

PR211

0.01_1206_1%

1 2

PC236

BQ24735_ACN

BQ24735_ACP

BQ24735_ACOK

12

PC244

4

3

0.1U_0402_25V6

12

PC235

12

PR228

0.1U_0402_25V6

1 2

PC239

1U_0603_25V6K

PU200

21

PAD

1

ACN

2

ACP

3

CMSRC

4

ACDRV

5

ACOK

PR244

422K_0402_1%

PR245

66.5K_0402_1%

66.5K_0402_1% PC245

PC245

100P_0402_50V8J

VIN

2

3

1 12

10_1206_1%

BQ24735_VCC

20

VCC

BQ24735RGRR_QFN20_3P5X3P5

ACDET6IOUT7SDA8SCL9ILIM

BQ24735_ACDET

12

EMI@

1UH_NRS4018T1R0NDGJ_3.2A_30%

1 2

PD230

PD230 BAS40CW_SOT323-3

BAS40CW_SOT323-3

PC237

0.047U_0402_25V7K

1 2

12

PR229

2.2_0603_5%

BQ24735_LX

DH_CHG

BQ24735_BST

17

18

19

BTST

HIDRV

PHASE

1 2

PR246

@PR246

@

0_0402_5%

12

PD231

PD231 RB751V-40_SOD323-2

RB751V-40_SOD323-2

DH_CHG

1 2

BQ24735_REGN

PC205

1U_0603_25V6K

16

REGN

15

LODRV

BATDRV

10

12

DL_CHG

14

GND

13

SRP

12

SRN

11

BQ24735_BATDRV

BQ24735_ILIM

12

PC243

PR242

100K_0402_1%

12

PC246

@PC246

@

0.1U_0402_10V7K

Please locate the RC Near EC chip 2011-02-22

12

PC214

@EMI@ PC214

@EMI@

0.01U_0402_25V7K

EC_SMB_CK1 <41,44,48>

EC_SMB_DA1 <41,44,48>

2200P_0402_25V7K

PR210

PR210 0_0603_5%

0_0603_5%

1 2

PR236

10_0603_1%

1 2

PR237

6.8_0603_5%

1 2

PR241

357K_0402_1%

ADP_I <44,48>

PC211

10U_0805_25V6K

AON7406L

CSOP1

CSON1

PQ202

+3VALW

12

PC213

10U_0805_25V6K

4

12

PC242

0.1U_0603_16V7K

5

PQ201

PQ201 AON7408L

AON7408L

123

4.7UH_ETQP3W4R7WFN_5.5A_20%

BQ24735_LX

5

123

EMI Part (47.1)

BQ24735_BATDRV

12

F

1 2

PR233

4.12K_0603_1%

PL202

1 2

PR206

4.7_1206_5%

@EMI@

PC206

@EMI@ PC206

@EMI@

680P_0603_50V8J

CHG

CSOP1

12

or A51 ADP_V function

PR247

309K_0402_1%

PR249

47K_0402_1%

PQ207

PQ207 SI7716ADN-T1-GE3_POWERPAK8-5

SI7716ADN-T1-GE3_POWERPAK8-5

5

BQ24735_BATDRV_1

PR227

0.01_1206_1%

1

2

PC240

0.1U_0402_25V6

1 2 3

4

3

CSON1

12

PC241

0.1U_0402_25V6

VIN

12

PR248

10K_0402_1%

1 2

12

PC247

@PC247

@

0.1U_0402_10V7K

12

PC234

0.01U_0402_50V7K

BATT+

12

PC223

PC222

10U_0805_25V6K

ADP_V <44>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/24 2012/07/12

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

CHARGER

VSKAA

D

49 57

0.3

A

B

C

D

3/5VALW controller (35.1), Support component (35.2)

5V Peak Current 10 A OCP current 12 A FSW=390kHz

1 1

Delta I= 1.28 A,ripple V = 1.28 * 25 m= 32 mV DCR 13.2mohm +/-5% TYP MAX H/S Rds(on) : 27mohm , 34mohm

PC345@

100P_0402_50V8J

PR409

1 2

PR333

0_0402_5%

1 2

PR330

14K_0402_1%

1 2

PR331

20K_0402_1%

1 2

BST_3V

UG_3V

LX_3V

LG_3V

499K_0402_1%

1 2

12

PC360

@PR341

@

0_0402_5%

1 2

FB_3V

10

PR334

0.1U_0603_25V7K

PR340

2.2K_0402_1%

1 2

PR341

5

FB2

6

PGOOD

7

BOOT2

8

UGATE2

9

PHASE2

LGATE2

VIN11ENLDO12SECFB13LDO514LDO3

12

PR338

100K_0402_1%

PR342

PR337

PR357

56K_0402_1%

1 2

165K_0402_1%

143K_0402_1%

FB_5V

ENTRIP_5V

ENTRIP_3V

TON_35V

1

2

4

3

FB1

TON

ENTRIP1

ENTRIP2

BOOT1

UGATE1

PHASE1

LGATE1

PU330

15

RT8243AZQW_WQFN20_3X3

12

PC342

1U_0603_10V6K

12

PR332

PC343

@ PR332

@

1 2

100K_0402_5%

4.7U_0603_6.3V6K

EMI Part (47.1)

B+

PL331

EMI@ PL331

EMI@

HCB2012KF-121T50_0805

1 2

2 2

+3VALWP

3 3

3.3V Peak Current 6 A

3/5V_B+

12

PC339

2200P_0402_50V7K

@EMI@ PC339

@EMI@

12

PC340

10U_0805_25V6K

PL332

4.7UH_ETQP3W4R7WFN_5.5A_20%

1

+

PC332

2

150U_D2_6.3VY_R15M

12

PR336

4.7_1206_5%

@EMI@ PR336

@EMI@

SNUB_3V

12

PC336

@EMI@ PC336

@EMI@

680P_0603_50V8J

EMI Part (47.1)

5

PQ331

4

AON7408L

123

5

4

AON7406L

123

PQ332

PC335

0.1U_0402_10V7K

1 2

+3VL

POK<28,44>

BST1_3V

100K_0402_1%

3/5V_B+

EC_ON<44>

VS_ON<44>

OCP current 7.2 A Delta I= 4.29 A ,ripple= 4.29 x m= mV FSW=455kHz DCR 35mohm +/-15% TYP MAX H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :19mohm , 23.5mohm

PR350

30K_0402_1%

1 2

PR351

19.1K_0402_1%

1 2

21

PAD

20

BYP1

19

BST_5V

18

UG_5V

17

LX_5V

16

LG_5V

PR355

0_0402_5%

1 2

+3VLP

12

PC344

4.7U_0603_10V6K

12

PC341

4.7U_0603_10V6K

ENLDO <45>

PJ332

@ PJ332

@

+3VLP +3VL

(100mA,40mils ,Via NO.= 2)

2

JUMP_43X39

112

L/S Rds(on) :10.8mohm , 13.6mohm

3/5V_B+

12

PC361

10U_0805_25V6K

0.1U_0402_10V7K

BST1_5V

PC355

1 2

FDMC7692S_MLP8-5

10U_0805_25V6K

4

PQ352

+3VALWP +3VALW

+5VALWP +5VALW

PQ351

PQ351 AON7408L_DFN8-5

AON7408L_DFN8-5

3 5

241

2.2UH_ETQP3W2R2WFN_8.5A_20%

5

123

E

MI Part (47.1)

JUMP_43X118

12

SNUB_5V

12

@ PJ331

@

112

@ PJ351

@

112

PL352

1 2

PR356

4.7_1206_5%

@EMI@ PR356

@EMI@

PC356

@EMI@ PC356

@EMI@

680P_0603_50V8J

PJ331

2

PJ351

2

+5VALWP

1

+

PC352

2

150U_D2_6.3VY_R15M

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/24 2012/07/12

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

3VALW/5VALW

3VALW/5VALW VSKAA

50 57

D

50 57

0.3

A

DDR controller (35.3), Support component (35.4)

EMI Part (47.1)

PL151

EMI@ PL151

EMI@

HCB1608KF-121T30_0603

B+

+1.35VP

1 1

1 2

PL152

1UH_PCMB053T-1R0MS_7A_20%

1

+

PC157

2

330U_D2_2.5VY_R9M

12

EMI Part (47.1)

1.35V_B+

PC152

2200P_0402_50V7K

@EMI@ PC152

@EMI@

12

@EMI@ PR156

@EMI@

4.7_1206_5%

SNUB_+1.35VP

12

@EMI@ PC156

@EMI@

680P_0402_50V7K

PR156

PC156

PR155

0_0603_5%

PC164

1 2

SW_1.35V

DL_1.35V

12

EN_1.35V

BST_1.35V-1

12

PC154

10U_0805_25V6K

PQ151

AON7408L

123

PQ152

FDMC7692S_MLP8-5

123

SYSON<44>

PC155

5

1 2

0.1U_0603_25V7K

4

PR159

5.1_0603_5%

4

1 2

+5VALW

1U_0603_10V6K

PR163

@PR163

@

0_0402_5%

1 2

PR158

15.4K_0402_1%

1 2

PC162

1U_0603_10V6K

1 2

VDD_1.35V

+5VALW

BST_1.35V

DH_1.35V

CS_1.35V

1.35V_B+

15

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

PR161

510K_0402_1%

1 2

18

17

16

PHASE

RT8207MZQW_WQFN20_3X3

PGOOD

10

19

BOOT

UGATE

VLDOIN

S5

S3

TON

8

7

9

TON_1.35V

20

PU150

VTT

PAD

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

6

FB_1.35V

21

1

2

3

4

5

VTTREF_1.35V

PR162

PR162 10K_0402_1%

10K_0402_1%

1 2

PR160

8.06K_0402_1%

+1.35V

+1.35VP

12

+0.675VSP

12

PC160

PC159

10U_0805_6.3V6K

12

PC163

0.033U_0402_16V7K

+1.35VP

1.35V Peak Current 10 A OCP current 12 A FSW= 495 kHz DCR mohm TYP MAX H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :10.8 mohm , 13.6 mohm

DDR 1.35V I

peak : 10 A Imax : 7A Iocp : 12 A FSW : 495 kHz

12

PC166

@PC166

@

0.1U_0402_10V7K

PR164

0_0402_5%

12

0.675VR_EN<46>

+0.675VSP +1.35VP

(0.5A,40mils ,Via NO.= 1)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2011/06/24 2012/07/12

EN_0.675VSP

12

PC167

@PC167

@

0.1U_0402_10V7K

PJ675

@ PJ675

@

2

112

JUMP_43X39

Compal Secret Data

Deciphered Date

+0.675VS

Date: Sheet of

@

PJ1351

2

112

JUMP_43X118

(7A, 600mils ,Via NO.= 15)

Title

Size Document Number Rev

Custom

JUMP_43X118

Compal Electronics, Inc.

1.35VP/0.675VSP

1.35VP/0.675VSP VSKAA

+1.35V

51 57

0.3

5

D D

4

3

2

1

1.05VCCP controller (35.5), Support component (35.6)

PR402

0_0402_5%

12

PC402

@PC402

@

0.1U_0402_16V7K

SUSP# <44,46,53>

E

MI Part (47.1)

PU400

PL401

EMI@ PL401

EMI@

HCB2012KF-121T50_0805

C C

B B

B+

HCB2012KF-121T50_0805

The current limit is set to 8A, 12A or 16A when this is pull low, floating or pull high respectively.

12

PC404

2200P_0402_50V7K

@EMI@ PC404

@EMI@

+3VS

VCCP_PWRGOOD<46>

12

PC401

10U_0805_25V6K

1 2

100K_0402_5%

PR401

+3VS

PU400 SY8208DQNC_QFN10_3X3

SY8208DQNC_QFN10_3X3

8

IN

EN

GND

ILMT

PG

BS

LX

FB

BYP

LDO

9

3

2

1

6

PC406

10

0.1U_0603_25V7K

4

7

5

1 2

12

PC412

12

4.7U_0603_6.3V6K

SW_+1.05VSP

PC413

PR403

@EMI@ PR403

@EMI@

4.7_1206_5%

1 2

SNUB_+1.05VSP

PL402

1UH_VMPI0703AR-1R0M-Z01_11A_20%

1 2

+3VALW

2.2U_0603_6.3V6K

@EMI@ PC403

@EMI@

680P_0603_50V7K

1 2

12

PR404

75K_0402_1%

12

PR405

PR405 100K_0402_1%

100K_0402_1%

PC403

+1.05VS_VCCPP

12

PC407

4700P_0402_16V7K

PR406

1K_0402_1%

PC408

22U_0603_6.3V6M

+1.05VS_VCCPP +1.05VS_VCCP

12

PC409

22U_0603_6.3V6M

12

PC410

PC411

22U_0603_6.3V6M

PJ401

@ PJ401

@

2

JUMP_43X118

(17A,680mils ,Via NO.=34) OCP=23.91A

JUMP_43X118

112

1.05V

EMI Part (47.1)

P

eak Current 11.35 A OCP current 16 A FSW=800kHz Delta I= 1.24 A,Rippe= x m= mV DCR 8.3~10 mohm TYP MAX H/S Rds(on) :22 mohm , mohm L/S Rds(on) :11 mohm , mohm

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/24 2012/07/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

+1.05VS_VCCP

VSKAA

52 57

1

52 57

0.3

5

4

3

2

1

EMI Part (47.1)

PL601

EMI@ PL601

1.5VS controller (35.31), Support component (35.32)

D D

PC604

PR603

0_0603_5%

PU600

PR602

133K_0402_1%

12

PR601

1K_0402_1%

SUSP#<44,46,52>

C C

1 2

PC605

0.1U_0402_16V7K

12

TRIP_1.5VSG

FB_1.5VSG

RF_1.5VSG

12

470K_0402_1%

FB=0.704V

PR607

10K_0402_1%

PR605

1

PGOOD

2

TRIP

3

EN

4

VFB

5

TST

TPS51212DSCR_SON10_3X3

PR606

11.5K_0402_1%

12

VBST

DRVH

V5IN

DRVL

10

BST_1.5VSG

9

DH_1.5VSG

8

SW

TP

SW_1.5VSGEN_1.5VSG

7

6

DL_1.5VSG

11

12

0_0603_5%

1 2

+5VALW

PC606

1U_0603_10V6K

PC604

0.1U_0603_25V7K

1 2

Rds=13.5mΩ(Typ)

16.5mΩ(Max)

1.5V Peak Current 0.75 A OCP current 0.95 A FSW= 290 kHz

4

1.5VSG_B+

5

12

PC601

PQ601

AON7408L

123

PL602

2.2UH_ETQP3W2R2WFN_8.5A_20%

5

PQ602

123

MI Part (47.1)

SI7716ADN-T1-GE3_POWERPAK8-5

E

+1.5VSP

(15A, 600mils ,Via NO.= 30) OCP=18A

PL602

1 2

12

@EMI@ PR604

@EMI@

4.7_1206_5%

12

@EMI@ PC608

@EMI@

680P_0402_50V7K

@

2

JUMP_43X118

PR604

PC608

PJ150

10U_0805_25V6K

112

EMI@

HCB2012KF-121T50_0805

12

PC602

2200P_0402_50V7K

@EMI@ PC602

@EMI@

1

+

2

+1.5VS

12

PC607

330U_2.5V_M

B+

+1.5VSP

Delta I= A,Rippe= x m= mV DCR 8.3~10 mohm TYP MAX H/S Rds(on) : 27 mohm , 34 mohm

B B

L/S Rds(on) :13.5 mohm , 16.5 mohm

TPS51212 for DIS SKU

PL5930 for UMA SKU

A Confirm with HW for sequence control

A A

Security Classification

2012/07/10 2013/07/10

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2012/07/10 2013/07/10

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

+

1.5VS

VSKAA

53 57Monday, March 18, 2013

1

0.3Custom

A

VREF

12

PR550

@ PR550

@

10K_0402_1%

1 1

PR551

39K_0402_1%

PR552

10K_0402_1%

CPU_B+

2 2

+3VS

VSSSENSE

VCCSENSE<9>

10K_0402_1%

PR528

@PR528

@

0_0402_5%

1 2

PR529 0_0402_5%@PR529 0_0402_5%@

PR566

@PR566

@

0_0402_5%

1 2

PR567

@PR567

@

0_0402_5%

2.2P_0402_50V8C

PR531

10K_0402_1%

1 2

CSP1

CSN1

CSN2

CSP2

PC514

@PC514

@

1 2

PR530

10K_0402_1%

1 2

330P_0402_50V7K

12

GFB

VFB

PC515

1 2

PH501

100K_0402_1%_TSM0B104F4251RZ

12

PC527

PR549

10K_0402_1%

SLEWA

PU500

17

CSP1

18

CSN1

19

CSN2

20

CSP2

21

CSP3

22

CSN3

23

GFB

24

VFB

PR532

3.24K_0402_1%

1 2

0.33U_0402_10V6K

12

PC526

4700P_0402_16V7K

12

.1U_0402_16V7K

15

16

14

13

VBAT

IMON

SLEWA

THERM

TPS51631RSMR_QFN32_4X4

COMP

V5A

DROOP

VREF

26

28

25

27

VREF

12

PC517

OCP-I

12

29

12

PR547

196K_0402_1%

12

PR548

39K_0402_1%

F-IMAX

B-RAM

O-USR

11

10

9

OCP-I

O-USR

F-IMAX

B-RAMP

VR_ON

SKIP#

PWM1

PWM2

PWM3

PGOOD

VDD

VDIO

VCLK

ALERT#

GND

VR_HOT#

31

32

30

VR_HOT#

33

VR_SVID_CLK

VR_SVID_ALRT#

PAD

8

7

6

5

4

3

2

1

12

PR545

@ PR545

@

100K_0402_1%

12

PR546

150K_0402_1%

SKIP

PWM1

PWM2

VR_SVID_DAT

PC522

1U_0603_25V6

CPU_CORE

DC 16A

T Peak Current 29A OCP current 48.5A Load line -2.9mV/A

PR533

10_0402_1%

3 3

+5VALW

10_0402_1%

1 2

PC519

1U_0402_6.3V6K

12

FSW=1MHz DCR 0.62mohm +/-5% TYP MAX H/S Rds(on) : mohm , mohm L/S Rds(on) : mohm , mohm

+VCCIO_OUT

12

PC524

.1U_0402_16V7K

VR_SVID_CLK<9>

VR_SVID_ALRT#<9>

VR_SVID_DAT<9>

4 4

VR_HOT#<44>

PC566

@PC566

@

47P_0402_50V8J

PR536

54.9_0402_1%

1 2

12

PR543

549K_0402_1%

12

PR544

150K_0402_1%

VR_ON <44>

12

PR540

130_0402_1%

B

C

D

+CPU_CORE

1

PC959

12

PR541

64.9K_0402_1%

12

PR542

20K_0402_1%

PC959 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC969

PC969 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC979

PC979 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC989

PC989 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC999

@PC999

@

22U_0603_6.3V6M

2

1

PC960

PC960 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC970

PC970 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC980

PC980 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC990

PC990 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC1000

@PC1000

@

22U_0603_6.3V6M

2

1

PC961

PC961 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC971

PC971 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC981

PC981 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC991

PC991 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC962

PC962 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC972

PC972 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC982

PC982 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC992

PC992 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC963

PC963 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC973

PC973 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC983

PC983 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC993

PC993 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC964

PC964 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC974

PC974 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC984

PC984 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC994

PC994 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC965

PC965 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC975

PC975 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC985

PC985 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC995

PC995 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC966

PC966 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC976

PC976 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC986

PC986 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC996

PC996 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC967

PC967 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC977

PC977 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC987

PC987 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC997

PC997 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC968

PC968 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC978

PC978 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC988

PC988 22U_0603_6.3V6M

22U_0603_6.3V6M

2

1

PC998

@PC998

@

22U_0603_6.3V6M

2

EMI Part (47.1)

PL503

EMI@ PL503

SUPPRE_ FBMA-L11-453215-800LMA90T_1812

VGATE <28,44>

PR539

PR534

1 2

10_0402_1%

10K_0402_1%

+3VS

PC518

PWM1

PC531

PWM2

CPU_B+

12

CPU_B+

12

SUPPRE_ FBMA-L11-453215-800LMA90T_1812

B+ CPU_B+

12

PC520

10U_0805_25V6K

PR527 2.2_0402_1%PR527 2.2_0402_1%

1 2

PC516 .1U_0402_16V7KPC516 .1U_0402_16V7K

12

PC532

10U_0805_25V6K

PR558 2.2_0402_1%PR558 2.2_0402_1%

1 2

PC530 .1U_0402_16V7KPC530 .1U_0402_16V7K

EMI@

EMI Part (47.1)

12

PC521

5

1000P_0402_25V8J

VIN

12

6

BOOT_R

7

BOOT

8

PWM

PU501

CSD97374CQ4M_SON8_3P5X4P5

EMI Part (47.1)

12

PC533

5

1000P_0402_25V8J

12

VIN

6

BOOT_R

7

BOOT

8

PWM

PU504

CSD97374CQ4M_SON8_3P5X4P5

12

PGND2

9

PGND1

9

PGND1

VSW

VDD

SKIP#

VSW

VDD

SKIP#

1

+

PC554

100U_25V_M

2

PC523

@EMI@ PC523

@EMI@

680P_0402_50V7K

1 2

4

3

2

1

1 2

@PR538

@

0_0402_5%

PC534

@EMI@ PC534

@EMI@

680P_0402_50V7K

1 2

4

3

2

1 2

1

@PR561

@

0_0402_5%

PR538

PR561

1

+

2

PC555

100U_25V_M

@EMI@ PR535

@EMI@

4.7_1206_5%

@EMI@ PR559

@EMI@

4.7_1206_5%

SKIP

PR559

12

PR535

12

PR554

2.26K_0402_1%

1 2

PL502

0.15UH_ETQP4LR15AFM_29A_20%

+5VS

PC525

PC525 1U_0402_6.3V6K

1U_0402_6.3V6K

PR562

2.26K_0402_1%

1 2

PL505

0.15UH_ETQP4LR15AFM_29A_20%

+5VS

PC535

PC535 1U_0402_6.3V6K

1U_0402_6.3V6K

12

PR555

18.7K_0402_1%

PH502

12

PR556

3.01K_0402_1%

3.01K_0402_1% 10K_0402_1%_TSM0A103F34D1RZ

10K_0402_1%_TSM0A103F34D1RZ

12

PC528

0.12U_0402_10V6K~D

CSP1

PC537

CSN1

0.12U_0402_10V6K~D

+CPU_CORE

12

PR563

18.7K_0402_1%

PH503

12

PR557

3.01K_0402_1%

3.01K_0402_1% 10K_0402_1%_TSM0A103F34D1RZ

10K_0402_1%_TSM0A103F34D1RZ

12

PC529

0.12U_0402_10V6K~D

CSP2

PC538

CSN2

0.12U_0402_10V6K~D

+CPU_CORE

CPU_CORE controller (36.1), Support component (36.3)

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/24 2012/07/12

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

CPU_CORE-37W

VSKAA

D

54 57

0.3

A

B

C

D

+VGA_CORE

12

1 1

12

+VGA_CORE

1

2

2 2

PRV11 = 71.5K ==>Fsw = 450KHz

VGA_VSS_SENSE<15>

VGA_VCC_SENSE<15>

3 3

R1 PR913

R

2 PR915

R3 PR930

R4 PR914

C PC940

nder VGA Core

U

12

PC905

PC904

PC903

4.7U_0603_6.3V6M

12

PC919

PC920

PC918

0.1U_0402_10V7K

PC920

0.1U_0402_10V7K

Near VGA Core

12

PC923

22U_0603_6.3V6M

12

PC924

47U_0805_6.3V6M

@PR917

@

0_0402_5%

1 2

@PR920

@

0_0402_5%

1 2

12

PC908

PC926

PC907

12

4.7U_0603_6.3V6M

PC936

PC908

4.7U_0603_6.3V6M

12

PC927

4.7U_0603_6.3V6M

12

47P_0402_50V8J

1000P_0402_50V7K

4.7U_0603_6.3V6M

PC909

4.7U_0603_6.3V6M

PC921

0.1U_0402_10V7K

12

4.7U_0603_6.3V6M

0.1U_0402_10V7K

PR917

PR920

12

PC925

4.7U_0603_6.3V6M

N14P-GV2 N14M-GL

20 Kohm

2 Kohm

18 Kohm

2.7 nF

GB4-128 package

12

PC912

4.7U_0603_6.3V6M

12

PC953

@ PC953

@

VREF

GV@ PR914

GV@

18K_0402_1%

12

PC913

4.7U_0603_6.3V6M

12

PC955

@ PC955

@

4.7U_0603_6.3V6M

GV@ PR915

GV@

20K_0402_1%

1500P_0402_50V7K

PR914

12

1 2

PC939

100P_0402_50V8J

12

PC928

4.7U_0603_6.3V6M

PC937

1 2

12

PC958

4.7U_0603_6.3V6M

12

PC929

4.7U_0603_6.3V6M

.01U_0603_16V7K

PR921

10K_0402_1%

1 2

39 Kohm

30 Kohm

3 Kohm

27 Kohm

1.8 nF

12

PC911

4.7U_0603_6.3V6M

12

PC952

@ PC952

@

1 2

PC934

PR919

51_0402_1%

1 2

4.7U_0603_6.3V6M

12

PC950

@ PC950

@

4.7U_0603_6.3V6M

12

4.7U_0603_6.3V6M

PR915

PC933

@PC933

@

12

PR931 34K_0402_1%PR931 34K_0402_1%

PC938 10P_0402_50V8JPC938 10P_0402_50V8J

FB2_VGA

GL@ PR913

GL@

39K_0402_1%

GL@ PR915

GL@

30K_0402_1%

GL@ PR930

GL@

3K_0402_1%

GL@ PR914

GL@

27K_0402_1%

GL@ PC940

GL@

1800P_0402_50V7K

PC949

PC951

@ PC949

@

@ PC951

@

4.7U_0603_6.3V6M

12

PC954

PC956

@ PC954

@

@ PC956

@

4.7U_0603_6.3V6M

12

PC940

GV@ PC940

GV@

2700P_0402_50V7K

12

1 2

PR922

82K_0402_1%

PR913

PR915

PR930

PR914

PC940

12

4.7U_0603_6.3V6M

GV@ PR913

GV@

20K_0402_1%

12

GV@ PR930

GV@

2K_0402_1%

REFIN

VREF

FS

FB_VGA

COMP_VGAFB1_VGA

PC902

@ PC902

@

PR913

4.7U_0603_6.3V6M

PR930

PR909

0_0402_5%

@ PR909

@

12

VIDBUF

PU900

7

REFIN

8

VREF

9

FS

10

FBRTN

11

FB

12

COMP

VGA_CORE controller (43.1), Support component (43.2)

PQ901

AON7518

12

UGATE1_2_VGA

TPCA8059

10K_0402_5%

+5VS

12

UGATE2_2_VGA

PC944

0.22U_0603_10V7K

1 2

PQ902

AON7518

TPCA8059

<13>

+3VS_DGPU

DGPU_VID

12

1 2

PR929 10K_0402_5%PR929 10K_0402_5%

PR932 0_0402_5%@ PR932 0_0402_5%@

GPU_VID

PSI_VGA

4

5

6

VID

VIDBUF

TSNS13TALERT#14VCC15PGOOD16HG217BST2

GND

25

VCC_VGA

12

1 2

PR926 5.9K_0402_ 1%PR926 5.9K_0402_1%

VREF

+3VS_DGPU

PSI

<13>

12

1 2

PR912 10K_0402_5%PR912 10K_0402_5%

UGATE1_VGA

EN_VGA

1

2EN3

PSI

HG1

18

PR925 10K_0402_5%PR925 10K_0402_5%

PR927 2.2_0402_5%PR927 2.2_0402_5%

PC946

1U_0402_10V6K

PR907

2.2_0603_5%

<13,15,16,17,38>

BOOT1_VGA

PC930 .1U_0402_ 16V7KPC930 .1U_0402_ 16V7K

BST1

24

PH1

23

LG1

22

PGND

21

PVCC_VGA

PVCC

20

LG2

19

PH2

NCP81172MNTWG_QFN24_4X4

BOOT2_VGA

UGATE2_VGA

VGA_PWROK <17,33>

+3VS

12

+5VS

12

PHASE1_VGA

12

BOOT1_2_VGA

LGATE1_VGA

PR901

@PR901

@

0_0402_5%

0_0603_5%

PC922

0.22U_0603_10V7K

1 2

PC935 4.7U_0603_10V6KPC935 4.7U_0603_10V6K

1 2

12

0_0603_5%

PR924

2.2_0603_5%

12

PHASE2_VGA

LGATE2_VGA

PR908

12

PR911

@

PR923

BOOT2_2_VGA

PQ903

PQ904

EMI Part (47.1)

+VGA_B+

SUPPRE_ FBMA-L11-453215-800LMA90T_1812

PC917

PL903

10U_0805_25V6K

7x7

12

5

4

123

5

4

123

12

PC910

10U_0805_25V6K

0.22UH_MMD-06DZNR22MEO1L_25A_20%

1 2

12

PR906

@EMI@ PR906

@EMI@

4.7_1206_5%

SNUB1_VGA

12

PC906

@EMI@ PC906

@EMI@

680P_0402_50V7K

PC915

@EMI@ PC915

@EMI@

2200P_0402_50V7K

1

+

2

PL901

EMI@ PL901

EMI@

PC931

560U_D2_2VM_R4.5M

12

B+

+VGA_CORE

EMI Part (47.1)

+VGA_B+

5

4

123

5

4

123

12

PC942

PC943

10U_0805_25V6K

7x7

PL904

0.22UH_MMD-06DZNR22MEO1L_25A_20%

1 2

12

PR916

@EMI@ PR916

@EMI@

4.7_1206_5%

SNUB2_VGA

12

PC916

@EMI@ PC916

@EMI@

680P_0402_50V7K

10U_0805_25V6K

+VGA_CORE

1

+

PC947

2

330U_D2_2V_Y

E

MI Part (47.1)

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

2012/09/24 2013/09/24

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

+VGA_COREP

VSKAA

D

55 57

0.3

A

B

C

D

E

It e m T im e (W h e n ) P ag e ( W h e r e ) L o c a ti o n / D i sc r ip t i o n ( H o w / W h a t) R e q u e s t ( W h o ) R e so n ( W h y )

1 E V T --2 0 1 2 / 1 0 / 2 4 P 4 8 - P W R -B A T T ER Y C O N N / O T P @ P D 5 / R e m o v e ES D d i o d e C O M P A N Y F o r p ar t c o u n t r e d u c a ti o n 2 E V T --2 0 1 2 / 1 0 / 2 4 P 4 8 - P W R -B A T T ER Y C O N N / O T P @ P D 6 / R e m o v e ES D d i o d e C O M P A N Y F o r p ar t c o u n t r e d u c a ti o n 3 E V T --2 0 1 2 / 1 0 / 2 4 P 4 9 - P W R -C H A R G ER @ P C 2 2 1 / R e m o ve 1 0 u F c ap a c it o r C O M P A N Y F o r p ar t c o u n t r e d u c a ti o n 4 E V T --2 0 1 2 / 1 0 / 2 4 P 5 0 - P W R -3 V A L W / 5 V A L W P C 3 3 1 ,@ P C 3 3 2 / P C 3 3 1 R e se rv e & P C 3 3 2 M o u n t M E M E li m i t at i o n 5 E V T --2 0 1 2 / 1 0 / 2 4 P 5 1 - P W R -1 . 3 5 V P / 0 . 6 7 5 V SP @ P J6 7 5 / J U M P _ 4 3 x 7 9 c h a n g e to JU M P _ 4 3 x 3 9 P W R F o r d e si gn c h a n g e 6 E V T --2 0 1 2 / 1 0 / 2 4 P 5 1 - P W R -1 . 3 5 V P / 0 . 6 7 5 V SP @ P J1 3 5 2 / R e m o v e P W R F o r d e si gn c h a n g e 7 E V T --2 0 1 2 / 1 0 / 2 4 P 5 4 - P W R -C P U _ C O R E- 3 7 W P R 5 4 1 / 4 7 5 K c h a n ge to 1 6 9 K P W R F o r T P S5 1 6 3 1 u n d e r -sh o o t s e t ti n g

1 1

8 E V T --2 0 1 2 / 1 0 / 2 4 P 5 4 - P W R -C P U _ C O R E- 3 7 W @ P R 5 5 3 / R e m o v e (P W M 3 fl o at i n g) C O M P A N Y F o r p ar t c o u n t r e d u c a ti o n

9 E V T --2 0 1 2 / 1 0 / 2 4 P 5 4 - P W R -C P U _ C O R E- 3 7 W @ P C 5 3 7 / A d d 0 4 0 2 C a p fo o t p r in t P W R F o r TP S 5 1 6 3 1 t h e r m a l se t t in g 1 0 E V T --2 0 1 2 / 1 0 / 2 4 P 5 4 -P W R- C P U _C O R E -3 7 W @ P C 5 3 8 / A d d 0 4 0 2 C a p fo o t p ri n t P W R F o r T P S 5 1 6 3 1 t h e r m a l s e t ti n g 1 1 E V T --2 0 1 2 / 1 0 / 2 4 P 5 5 -P W R- G P U _ C OR E P R 9 2 9 / A d d 1 0 K r e s is to r H W P u l l h i g h P SI p o r t 1 2 E V T --2 0 1 2 / 1 0 / 2 4 P 5 5 -P W R- G P U _ C OR E P R 9 1 3 / 3 9 K c h a n ge to 2 0 K (G V @ ) P W R F o r N 1 4 P W M V ID se t t in g 1 3 E V T --2 0 1 2 / 1 0 / 2 4 P 5 5 -P W R- G P U _ C OR E P R 9 1 5 / 3 9 K c h a n ge to 2 0 K (G V @ ), 3 0 K (G L @ ) P W R F o r N 1 4 P W M V ID se t t in g 1 4 E V T --2 0 1 2 / 1 0 / 2 4 P 5 5 -P W R- G P U _ C OR E P R 9 3 0 / 1 .5 K c h an g e t o 2 K (G V @ ) , 3 K ( G L @ ) P W R F o r N 1 4 P W M V ID se t t in g 1 5 E V T --2 0 1 2 / 1 0 / 2 4 P 5 5 -P W R- G P U _ C OR E P R 9 1 4 / 3 0 K c h a n ge to 1 8 K (G V @ ), 2 4 K (G L @ ) P W R F o r N 1 4 P W M V ID se t t in g 1 6 E V T --2 0 1 2 / 1 0 / 2 4 P 5 5 -P W R- G P U _ C OR E P R 9 0 4 / 1 .5 K c h an g e t o 0 (G V @ ) , 3 K ( G L @ ) P W R F o r N 1 4 P W M V ID se t t in g 1 7 E V T --2 0 1 2 / 1 0 / 2 4 P 5 5 -P W R- G P U _ C OR E P C 9 4 0 / A d d 2 . 7 n F (G V @ ), 1 . 8 n F (G L @ ) P W R F o r N 1 4 P W M V ID se t t in g 1 8 E V T --2 0 1 2 / 1 0 / 2 4 P 5 5 -P W R- G P U _ C OR E P C 9 3 3 / R e se rv e P W R F o r N 1 4 P W M V ID se t t in g 1 9 E V T --2 0 1 2 / 1 0 / 2 4 P 5 0 -P W R- 3 V A L W / 5 V A L W P R 3 3 7 / 2 3 5 K c h an g e t o 1 6 5 K P W R F o r RT 8 2 4 3 3 V O C P s e tt i n g 2 0 E V T --2 0 1 2 / 1 0 / 2 4 P 5 0 -P W R- 3 V A L W / 5 V A L W P R 3 5 7 / 1 5 6 K c h an g e t o 1 4 3 K P W R F o r RT 8 2 4 3 5 V O C P s e tt i n g 2 1 E V T --2 0 1 2 / 1 0 / 2 4 P 5 1 -P W R- 1 .3 5 V P / 0 . 6 7 5 V S P P R 1 5 8 / 1 6 .2 K c h an g e t o 1 5 . 4 K P W R F or R T 8 2 0 8 1 . 3 5 V O C P se t ti n g 2 2 E V T --2 0 1 2 / 1 0 / 2 4 P 5 5 -P W R- G P U _ C OR E P R 9 3 1 / 7 1 . 5 K c h an g e t o 3 4 K P W R F o r N C P 8 1 1 7 2 F sw se t t in g 2 3 E V T --2 0 1 2 / 1 0 / 2 4 P 5 4 -P W R- C P U _C O R E -3 7 W P C 5 2 1 / A d d 1 0 0 0 P _ 0 4 0 2 C a p a c it o r P W R F o r d e si gn c h a n g e 2 4 E V T --2 0 1 2 / 1 0 / 2 4 P 5 4 -P W R- C P U _C O R E -3 7 W P C 5 3 3 / A d d 1 0 0 0 P _ 0 4 0 2 Ca p a c it o r P W R F o r d e si gn ch a n g e 2 5 E V T --2 0 1 2 / 1 0 / 2 4 P 5 5 -P W R- G P U _ C OR E P R 9 2 7 / c h an g e r e s is to r P N P W R F o r P N se t t in g e r ro r

2 2

2 6 D V T- -2 0 1 2 / 1 2 / 0 7 P 4 8 - P W R -B A T T ER Y C O N N / O T P P F 2 / c h a n ge c o m p o n e n t fo r c o st d o w n C O M P A N Y F o r c o s t d o w n 2 7 D V T- -2 0 1 2 / 1 2 / 0 7 P 4 9 - P W R -C H A R G ER P Q 2 0 3 / A O N 6 5 0 4 C h an g e t o T P C A 8 0 5 7 P W R F o r d e si g n is su e 2 8 D V T- -2 0 1 2 / 1 2 / 0 7 P 5 0 - P W R -3 V A L W / 5 V A L W P C 3 5 1 , P C 3 5 2 / R e m o v e O S C O N m o u n t p o l ym e r C A P M E M E l im it a ti o n 2 9 D V T- -2 0 1 2 / 1 2 / 0 7 P 5 0 - P W R -3 V A L W / 5 V A L W P R 4 0 9 / A d d 1 0 0 K P W R P u l l h i g h fo r P G O O D p o rt 3 0 D V T- -2 0 1 2 / 1 2 / 0 7 P 5 0 - P W R -3 V A L W / 5 V A L W 3 1 D V T- -2 0 1 2 / 1 2 / 0 7 P 5 1 - P W R -1 . 3 5 V P / 0 . 6 7 5 V SP P L 1 5 2 / C h a n ge c h o ke va l u e P W R C o m m o n d e s ig n c h a ng e 3 2 D V T- -2 0 1 2 / 1 2 / 0 7 P 5 2 - 1 .0 5 V S _V C C P P L 4 0 1 / C h an g e b e a d P W R C o m m o n d e s ig n c h a ng e 3 3 D V T- -2 0 1 2 / 1 2 / 0 7 P 5 2 - 1 .0 5 V S _V C C P P R 4 0 3 , P C 4 0 3 / R e s e r ve P R 4 0 3 & P C 4 0 3 3 4 D V T- -2 0 1 2 / 1 2 / 0 7 P 5 4 - P W R -C P U _ C O R E- 3 7 W P L 5 0 2 , P L 5 0 5 / C h an g e c h o k e v al u e P W R C o m m o n d e s ig n c h a ng e 3 5 D V T- -2 0 1 2 / 1 2 / 0 7 P 5 4 - P W R -C P U _ C O R E- 3 7 W P C 5 2 8 , P C 5 2 9 , P C 5 3 7 , P C 5 3 8 / A d d 0 4 0 2 C a p fo o t pr i n t P W R C o m m o n d e si g n c h an g e 3 6 D V T- -2 0 1 2 / 1 2 / 0 7 P 5 5 -P W R -G P U _ C O R E P C 9 9 3 , P C 9 9 4 , P C 9 9 5 , P C 9 9 6 , P C 9 9 7 , P C 1 1 0 1 , P C 1 1 0 3 / A d d

3 7 D V T- -2 0 1 2 / 1 2 / 0 7 P 5 5 - P W R -G P U _ C O R E P C 9 3 4 / P W R C o m m o n d e s ig n c h a ng e 3 8 D V T- -2 0 1 2 / 1 2 / 0 7 P 5 5 - P W R -G P U _ C O R E P L 9 0 3 , P L 9 0 4 / C h a n ge ve n d o r P W R C h a ng e f o r l o si n g 3 9 D V T- -2 0 1 2 / 1 2 / 0 7 P 5 5 - P W R -G P U _ C O R E P R 9 1 2 / C h a n ge sh o r t p ad t o 1 0 K P W R P u l l h i g h fo r EN p o r t 4 0 D V T- -2 0 1 2 / 1 2 / 0 7 P 5 2 - 1 .0 5 V S _V C C P P C 4 0 7 / P W R C o m m o n d e s ig n c h a ng e 4 1 P V T- -2 0 1 3 / 0 2 / 2 5 P 5 4 -P W R -C P U _ C O RE -3 7 W P R 5 4 1 ch a n g e fr o m 1 6 9 K t o 6 4 .9 K

3 3

4 2 P V T- -2 0 1 3 / 0 3 / 0 4 P 5 5 -P W R -V G A _C O R E P R 9 0 4 ,P R 9 1 8 ,P R 9 2 8 , P C 9 4 5 r e m o ve

4 3 P V T- -2 0 1 3 / 0 3 / 0 4 P 5 2 -1 . 0 5 V S _ V C C P P R 4 0 6 a d d 1 K

P C 3 4 1 , P C 3 4 4 / A d d 4 .7 U fo r L D O 5 & C h a n g e P C 3 4 1 s iz e t o 0 6 0 3 P W R f or I C d e fa u lt s e t ti n g

P W R F o r H F d e s ig n

M L C C P C 9 9 3 ~ P C 9 9 7 , re m o v e p o l ym e r P C 1 1 0 1 , P C 1 1 0 3

P W R fo r I C TP S 5 1 6 3 1 e d it i o n c h an g e fr o m ES 1 . 1 t o ES 2 . 1 P R 5 4 2 c h a n ge fr o m 1 5 0 K to 2 0 K P R 5 4 7 c h a n ge fr o m 1 7 4 K to 1 9 6 K P C 5 1 4 r e s e rv e P R 5 3 2 c h a n ge fr o m 3 . 1 6 K t o 3 . 2 4 K P R 5 5 4 , P R 5 6 2 c h a ng e f ro m 2 . 3 7 K t o 2 .2 6 K P R 5 5 5 , P R 5 6 3 c h a ng e f ro m 1 7 . 8 K t o 1 8 .7 K

P R 9 1 4 c h a n ge fr o m 2 4 K to 2 7 K

P W R R e m o v e a n d c h a n ge f o r R i c h t e k s o lu t i o n se t t in g

P W R C o m m o n d e s ig n c h a ng e

fi n e t u n e

P C 4 0 7 c h a n g e fr o m 3 3 0 p t o 4 7 0 0 p

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DC-DC INTERFACE

56 57Monday, March 18, 2013

E

0.3

5

4

3

2

1

HW PIR (Product Improve Record)

VSKAA LA-9866P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.2 GERBER-OUT DATE: 2012/12/05 NO DATE PAGE MODIFICATION LIST PURPOSE

----------------------------------------------------------------------------------------------------------------------------------------------------------------Item Date Page Action Component Request

D D

-----------------------------------------------------------------------------------------------------------------------------------------------------------------

1) 11/19 24 Delete R23,R24,R25,R26 HDMI Redriver SMBus connect to EC directly

2) 11/19 31 Change Config RH17 to LVDS@

3) 11/19 31 Change Config RH18 to IEDP@

4) 11/19 44 Change RB36 from 2.2K to 0 ohm Change EC_ON workround to power side

5) 11/19 44 Change Config CB50 to @

6) 11/19 42 Change Config CA32 to always mount

7) 11/19 30 Change PCH_SPICS1# to UH3, PCH_SPICS0# to UH4 For Shark Bay ME code location

8) 11/19 44 Change EC pin128 from EC_CS0# to EC_CS1# For SW request

9) 11/22 33 Change PCH_GPIO69 to PROJECT_ID For SW request

10) 11/22 33 Change PCH_GPIO22 to VRAM_DR_SR# For VBIOS setting of DRANK or SRANK

11) 11/23 26 Change Config C238~C243 to CRT@EMI@

12) 11/23 23 Add D92 For isolate the +3VL power rail form LID_SW#

13) 11/28 41 Change Change C987,C900 from 1206 to 0805 To avoid MLCC from cracking

14) 11/29 23 Change Change JLVDS.4 from LID_SW# to BK_OFF# Common design change

15) 11/29 43 Change Change JSPK from 8 pins to 6 pins Common design change

16) 11/29 33 Change Delete SPK_DET1 and change SPK_DET0 netname to SPK_DET SPK detection method was changed

C C

17) 11/29 42 Change Change RA50 to 269@ Used for avoiding from S&M noise issue

18) 11/29 12 Change Change CD31 from 1206 to 0805 To avoid MLCC from cracking

19) 11/29 24 Change Stuff 8401@ as default add reserve R168,R169 For the purpose of HDMI 4K2K jetter cleaner

20) 11/29 40 Add Add QW1,RW3,RW4 to have inversion circuit For normal close connector type

21) 11/29 45 Add Add H19, change H7 to H_4P0,change H4,H5 to H_3P3 ME's requirement

22) 12/02 26 Add Add R62 R63 22ohm For CRT undershoot issue

23) 12/02 44 Change Change PM_SLP_S4# from pin127 to pin84 For EC fix code design

24) 12/02 44 Change Change USB_EN#0 from pin84 to pin23 For EC fix code design

25) 12/02 44 Change Change FB_CLAMP from pin23 to pin127 For EC fix code design

26) 12/03 05 Add Add CC63,CC68,CC69,CC83 100P For ESD

27) 12/03 31 Change Change CH104 to 0.1U For ESD

28) 12/03 10 Change Change CC53 to 47U For cost down

29) 12/03 41 Add Add QR1,RR1,RR2,RR3,RR4 For colay 14640 Charge IC ==================== PVT Modify Items ===================

1) 02/03 05 Del Del C6 (1000P on +FAN1)

2) 02/03 11 Change Change RC78 to 1K For SM_DRAMRST# rising smoothly

3) 02/03 11 Del Del CD15,CD2,CD22,CD23,CD12 For cost down

4) 02/03 12 Del Del CD28,CD46,CD43,CD44,CD38 For cost down

B B

5) 02/03 12 Change RC109,RC110,RC111,RC120,RC121,RC122 from 0.5% to 1% For cost down

6) 02/03 12 Reserve CC65,CC71,CC72,RC3,RC8,RC9 For common design

7) 02/03 17 Del CV58 For part coumt

8) 02/03 25 Del C264 For part coumt

9) 02/03 25 Change U16 to SA00006H000 For common design

10) 03/08 23 Reserve D89 For ESD request

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

HW-PIR

57 57Monday, March 18, 2013

1

0.3

of

Compal LA-9866P VSKAA Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual