Compal LA-9863P Schematics Rev1.0

CyberForum.ru

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1 1

B

C

D

E

VFKAA

2 2

Rosetta 10FG

LA-9863P SchematicsREV 1.0

3 3

Intel Processor(Ivy Bridge / Sandy Bridge) PCH(Panther Point)

2013-01-14 Rev 1.0

4 4

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/12/ 07 2013/12/ 07

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

VFKAA

1 56Monday, March 11 , 2013

E

1.0

CyberForum.ru

A

B

C

D

E

VGA (DDR3)

nVIDIA N14x

page 13,14,15,16,17,18,19,20,21

1 1

PCI-Express Gen3 4X

8GT/s

eDP 1.1 2x

2.7GT/s

LVDS colay eDP Conn.

page 22

LVDS 1ch

CRT Conn.

page 23

2 2

3 3

HDMI Conn.

RJ45 Conn.

page 24

RTL8106E & 8111G

PCIe port 1 25mm*25mm

USB Left

USB20 port 2

page 36

PCIe Gen1 1x

1.5V 5GT/s

USB20 1x

5V 480MHz

To sub-board

Intel CPU Ivy Bridge Sandy Bridge

rPGA-989

37.5mm*37.5mm

page 5,6,7,8,9,10

FDI X8

2.7GT/s

DMI X4

5GT/s

Intel PCH Panther Point

FCBGA-989

page 25,26,27,28,29,30,31,32,33

LPC BUS

3.3V 33 MHz

HD Audio

3.3V 24MHz

Memory BUS(DDRIII)

Dual Channel

1.5V DDR3/DDR3L 1333/1600 MT/s

USB30 2x

5V 5GT/s

USB20 2x

5V 480MHz

USB Right

USB20 port 0,1 USB30 port 1,2

CardReader GL834L

USB20 4x

5V 480MHz

Touch Screen

PCIe Gen1 1x

1.5V 5GT/s

USB20 1x

5V 480MHz

SATA Gen3 1x

5V 6GHz(600MB/s)

SATA Gen2 1x

5V 3GHz(300MB/s)

PCIeMini Card WLAN/WiMAX/BT

SATA HDD

SATA ODD

200pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

page 38

page 11,12

Int. Camera

USB port 8

page 42

SATA port 0

page 34

SATA port 2

page 34

USB20 port 3

page 37

PCIe port 2 &USB port 9

page 35

USB port 11

page 22

RTC CKT.

page 25

SPI ROM (4MB + 2MB)

page 25

KB9012

page 41

HDA Codec

ALC259/269

page 39

DC/DC Interface CKT.

page 43

D

JLINE JEXMIC

page 40

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

VFKAA

2 56Monday, March 11, 2013

E

1.0

SPK Conn

page 40

Compal Secret Data

Deciphered Date

C

LED+LID

page 42

2012/12/07 2013/12/07

Power Circuit DC/DC

page 44,45,46,47,48, 49,50,51,52,53,54

4 4

GCLK

Power/B

page 35

EC Reset

page 41

Touch Pad

page 42

Int.KBD

page 42page 42

To sub-board

A

B

G-Sensor

page 34

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

CyberForum.ru

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4

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2

1

DESIGN CURRENT 0.1A

B+

D D

RT8243AZQW

C C

VR_ON

B B

NCP81012BMNR

SP#

SU

SY8208QKC

SYSON

RT8207M

A A

DGPU_PWR_EN

NCP81172MNTWG

5

Ipeak=8.13A, Imax=5.69A, Iocp min=8.7

SUSP#

SY8032ABC

SUSP#

TPS22966DPUR

Ipeak=5A, Imax=3.5A, Iocp min=6.2A

SUSP#

TPS22966DPUR

Ipeak=20.53A, Imax=14.37A, Iocp min=23.91A

VGA_PWROK#

N-CHANNEL

AO3416

VCCP_PWRGOOD

G978F11U

Ipeak=15A, Imax=10.5A, Iocp min=18A

0.75VR_ON

SUSP

N-CHANNEL

FDS6676AS

1.5_PWR_EN#

N-CHANNEL

S6676AS

FD

Ipeak=59A, Imax=45.7A, Iocp min=70A

P-CHANNEL

G9191-330T1U

P-CHANNEL

APL3512ABI

P-CHANNEL

4

PCH_PWR_EN#

AO-3413

KB_LED

AO-3413

+5VS

LDO

ODD_EN#

AO-3413

WOWL_EN#

AO-3413

PCH_PWR_EN#

AO-3413

LCD_ENVDD

DGPU_PWR_EN

AO-3413

DESIGN CURRENT 5A

DESIGN CURRENT 2A

DESIGN CURRENT 6A

DESIGN CURRENT 400mA

DESIGN CURRENT 300mA

DESIGN CURRENT 1.6A

DESIGN CURRENT 5A

DESIGN CURRENT 330mA

DESIGN CURRENT 3A

DESIGN CURRENT 6A

DESIGN CURRENT 1.5A

DESIGN CURRENT 0.1A

DESIGN CURRENT 65A

DESIGN CURRENT 40A

DESIGN CURRENT 3A

DESIGN CURRENT 6A

DESIGN CURRENT 2A

DESIGN CURRENT 1.5A

DESIGN CURRENT 2A

DESIGN CURRENT 11A

DESIGN CURRENT 30A

+3VL

+5VALW

+5VALW_PCH

+1.8VS

+5VS

+5VS_LED

+3VS_HDP

+5VS_ODD

+3VALW

+3V_LAN

+3V_WLAN

+3VALW_PCH

+3VS

+LCD_VDD

+3VS_DGPU

+CPU_CORE

+GFX_CORE

+1.05VS_VCCP

+1.05VS_DGPU

+VCCSA

+1.5V

+0.75VS

+1.5V_CPU

+1.5VS

+VRAM_1.5VS

+VGA_CORE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NTDI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NTDI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NTDI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WI THOUTPRIOR WRI TTEN CONSENT OFCOMPA L ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WI THOUTPRIOR WRI TTEN CONSENT OFCOMPA L ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WI THOUTPRIOR WRI TTEN CONSENT OFCOMPA L ELECTRONICS, INC.

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Power Tree

VFKAA

1

3 56Monday, March 11, 2013

1.0

CyberForum.ru

A

B

C

D

E

Voltage Rails

power

1 1

2 2

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

plane

State

S0

S1

S3

S5 S4/AC

( O MEANS ON X MEANS OFF )

+RTCVCC

O

B+

O

X

+5VL

+3VL

O

X

+5VALW

+3VALW

O

X

+1.5V

+5VS

+3VS

+1.8VS

+1.5VS

+1.05VS

+0.75VS

+CPU_CORE

+VGA_CORE

+GFX_CORE

+VTT

+VRAM_1.5V S

+3VS_DGPU

+1.05VS_DG PU

O

X X

X

X X

OO

X

BTO Option Table

Function

description

explain

BTO

Function

description

explain

BTO

Function

description

explain

BTO

Function

description

explain

BTO

SKU

Optimus

OPT@

LVDS-eDP

LVDS eDP

LVDS@ IEDP@

WOWL

w/

WOWL@

Sleep & Music

w/ S&M w/o S&M

269@ 259@

Panther Point

HM76R1@

HM76R3@ HM70R3@

w/o

NOWOWL@

PCH

HM70HM76

HM70R1@

Camera & Mic

CAM_EMI@

G-SENSOR

GSENSOR@

K

B Light

KB Light

KBL@

GPU

14M-GL

N

N14MGL@

N14MGLR1@ N14PGV2R1@

N14MGLR3@ N14PGV2R3@

14640 14641

14640

14640@

ZPODD@

EMI/ESD part

EMI@ ESD@

USB S&C

w/

N14P-GV2

N14P-GV2N14M-GL

N14PGV2@

14641

14641@

ZPODD

w/o

NONZP@

VRAM

Dual Rank

DRANK@

CRT

w/ CRT w/o CRT

CRT@ CRT_EMI@ NOCRT@

GCLK

GCLK non-GCLK

GCLK@

non-GCLK

EC

KB9012 NPCE885N

9012@ 885@

NOGCLK@

Touch Screen

TOUCH_EMI@

VRAM SKU for GV2

Single Rank

GVSR@

ISPD

HDMI Logo

HDMI45@

Dual Rank

GVDR@

PCH SM Bus Address

Power

+3VS

3 3

+3VS

+3VS 2

Device

DDR SO-DIMM 0

DDR SO-DIMM 1

WLAN/WIMAX

EC SM Bus1 Address

Device Address Address

+3VL

+3VL USB S&C 14640 35 H 0011 0101 b

4 4

A

HEX

Address

1010 0000 bA0 H

1010 0100 bA4 H

C H 0010 1100 bTouch Pad

EC SM Bus2 Address

HEX HE

16 H

0001 0110 bSmart Battery

12 H 0001 0010 bSmart Charger+3VL

Po

+3VS

Device

werPower

96 H

IDIA GPU 1001 1010 b

NV

G-Sensor

B

9E H

40 H

X

1001 0110 bPCH

0100 0000 b

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LOW LOWLOW

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2012/12/07 2013/12/07

SIGNAL

SLP_S3# SLP_S4# SLP_S5#

HIGH HIGHHIGH

LOW

LOW LOW

Compal Secret Data

Deciphered Date

HIGH HIGHHIGH

HIGH

LOW LOWLOW

HIGH

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Compal Electronics, Inc.

Notes List

VFKAA

4 56Monday, March 11, 2013

E

1.0

CyberForum.ru

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4

3

2

1

JCPUB

100 MHz

@

12

PM_DRAM_PWR GD_R

CC621000P_0402_50V7K

ESD@

D D

C C

by ESD requestion and place near CPU

+1.05VS_VCCP

RC44 62_0402_5%RC44 62_0402_5%

RC45 10K_0402_5%RC45 10K_0402_5%

1 2

12

@

12

@

12

@

12

CC63180P_0402_50V8J

CC701000P_0402_50V7K

CC671000P_0402_50V7K

CC661000P_0402_50V7K

H_PWRGOOD

H_PM_SYNC

BUF_CPU_RST#

H_PROCHOT#<41>

H_PECI

H_PWRGOOD<30>

H_SNB_IVB#<30>

T1 PADT1 PAD

T2 PADT2 PAD

H_PECI<41>

H_PROCHOT#H_PROCHOT#

H_PM_SYNC<27>

1 2

RC159 56_0402_5%RC159 56_0402_5%

H_THERMTRIP#<30>

H_PWRGOOD H_PWRGOOD_R

RC183 0_0402_5%

1 2

RC170 130_0402_5%RC 170 130_0402_5%

Please place near JCPU

+3VALW_PCH

12

RC11 200_0402_5%RC11 200_0402_5%

DRAMPWROK<27>

DRAMPWROK

+3VS

10K_0402_5%

RC13

+3VALW_PCH

0206: Delete 0.1uF

UC3

5

74AHC1G09GW_TSSOP5

12

74AHC1G09GW_TSSOP5

1

P

B

2

A

G

3

4

PM_SYS_PWRGD_BUF

O

+1.5V_CPU

12

RC14

RC14 200_0402_5%

200_0402_5%

1 2

Rshort@

BUF_CPU_RST#

H_SNB_IVB#

TP_SKTOCC#

H_CATERR#

H_PECI

H_PROCHOT#_R

H_PM_SYNC

PM_DRAM_PWR GD_RPM_SYS_PW RGD_BUF

C26

PROC_SELECT#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWR OK

AR33

RESET#

TYCO_2013620-2_IVY BRIDGE

Conn@

MISCTHERMALPWR MANAGEMENT

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

DDR3

MISC

DDR3

MISC

JTAG & BPM

BCLK

BCLK#

PRDY#

PREQ#

TRST#

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

TCK TMS

TDO

A28 A27

120 MHz

A16

CLK_CPU_EDP

A15

CLK_CPU_EDP#

R8

H_DRAMRST#

AK1

SM_RCOMP_0

A5

SM_RCOMP_1

A4

SM_RCOMP_2

AP29 AP27

AR26

XDP_TCK

AR27

XDP_TMS

AP30

XDP_TRST#

AR28

XDP_TDI

TDI

AP26

XDP_TDO

AL35

AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32

Close to CPU side

CLK_CPU_DMI <26> CLK_CPU_DMI# <26>

CLK_CPU_EDP <26> CLK_CPU_EDP# <26>

H_DRAMRST# <7>

RC56 140_0402_1%RC56 140_0402_1% RC59 25.5_0402_1%RC 59 25.5_0402_1% RC61 200_0402_1%RC61 200_0402_1%

12 12 12

T13 PADT13 PAD T15 PADT15 PAD

1 2

RC55 51_0402_5%RC55 51_0402_5%

T7 PADT7 PAD T10 PADT10 PAD

Stuff R41 and R42 if do not support eDP

+1.05VS_VCCP

CLK_CPU_EDP#

CLK_CPU_EDP

H_DRAMRST#

1 2

RC157 1K_0402_5%LVDS@RC157 1K_0402_5%LVDS@

1 2

RC158 1K_0402_5%LVDS@RC158 1K_0402_5%LVDS@

@ESD@

1 2

CC34 180P_0402_50V8J

by ESD requestion and place near CPU

DDR3 Compensati on Signals L

ayout Note:Plac e these

resistors near Processor

B B

FAN Control Circuit

Buffered Reset to CPU

+3VS

0206: Delete 0.1uF

PLT_RST# <29,35,36,41>

UC2

1

OE#

2

IN

3

A A

GND

74AHC1G125GW_SOT353-5

5

VCC

4

BUFO_CPU_RST# BUF_CPU_RST#

OUT

+1.05VS_VCCP

12

RC38

RC38 75_0402_5%

75_0402_5%

43_0402_1%

1 2

RC35

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

+5VS

1A

1 2

Rshort@

R1 0_0603_5%

Compal Secret Data

Deciphered Date

+FAN1

+3VS

12

R2

R2 10K_0402_5%

10K_0402_5%

FAN_SPEED1<41>

2

FANPWM<41>

+FAN1

12

D1

BAS16_SOT23-3

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

Ivy Bridge_JTAG/XDP/FAN

VFKAA

JFAN

6

G6

5

G5

4

3

2

1

ACES_50273-0040N-001

Conn@

1

C5

10U_0603_6.3V6M

2

1

1.0

of

5 56Monday, March 11, 2013

CyberForum.ru

5

4

3

2

1

+1.05VS_VCCP

RC1

24.9_0402_1%

JCPUA

D D

C C

+1.05VS_VCCP

eDP_COMP signals should be shorted near balls and routed with typical impedance <25m ohm

B B

+1.05VS_VCCP

1 2

1

OUT

CPU_EDP_HPD<22>

A A

2

IN

GND

3

DMI_PTX_CRX_N0<27> DMI_PTX_CRX_N1<27> DMI_PTX_CRX_N2<27> DMI_PTX_CRX_N3<27>

DMI_PTX_CRX_P0<27> DMI_PTX_CRX_P1<27> DMI_PTX_CRX_P2<27> DMI_PTX_CRX_P3<27>

DMI_CTX_PRX_N0<27> DMI_CTX_PRX_N1<27> DMI_CTX_PRX_N2<27> DMI_CTX_PRX_N3<27>

DMI_CTX_PRX_P0<27> DMI_CTX_PRX_P1<27> DMI_CTX_PRX_P2<27> DMI_CTX_PRX_P3<27>

FDI_CTX_PRX_N0<27> FDI_CTX_PRX_N1<27> FDI_CTX_PRX_N2<27> FDI_CTX_PRX_N3<27> FDI_CTX_PRX_N4<27> FDI_CTX_PRX_N5<27> FDI_CTX_PRX_N6<27> FDI_CTX_PRX_N7<27>

FDI_CTX_PRX_P0<27> FDI_CTX_PRX_P1<27> FDI_CTX_PRX_P2<27> FDI_CTX_PRX_P3<27> FDI_CTX_PRX_P4<27> FDI_CTX_PRX_P5<27> FDI_CTX_PRX_P6<27> FDI_CTX_PRX_P7<27>

FDI_FSYNC0<27> FDI_FSYNC1<27>

FDI_INT<27>

FDI_LSYNC0<27> FDI_LSYNC1<27>

1 2

RC2 24.9_0402_1%RC2 24.9_0402_1%

H_EDP_AUXP<22> H_EDP_AUXN<22>

H_EDP_TXP0<22> H_EDP_TXP1<22>

H_EDP_TXN0<22> H_EDP_TXN1<22>

RC9

RC9 1K_0402_5%

1K_0402_5%

H_EDP_HPD#

QC1

DTC124EKAT146_SC59-3

IEDP@

EDP_COMP

H_EDP_HPD#

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD#

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

TYCO_2013620-2_IVY BRIDGE

Conn@

DMI

Intel(R) FDI

eDP

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12]

PCI EXPRESS* - GRAPHICS

PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

J22 J21 H22

K33

PCIE_GTX_C_CRX_N0

M35

PCIE_GTX_C_CRX_N1

L34

PCIE_GTX_C_CRX_N2

J35

PCIE_GTX_C_CRX_N3

J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32

J33

PCIE_GTX_C_CRX_P0

L35

PCIE_GTX_C_CRX_P1

K34

PCIE_GTX_C_CRX_P2

H35

PCIE_GTX_C_CRX_P3

H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32

M29

PCIE_CTX_GRX_N0

M32

PCIE_CTX_GRX_N1

M31

PCIE_CTX_GRX_N2

L32

PCIE_CTX_GRX_N3

L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25

M28

PCIE_CTX_GRX_P0

M33

PCIE_CTX_GRX_P1

M30

PCIE_CTX_GRX_P2

L31

PCIE_CTX_GRX_P3

L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25

PEG_COMP

24.9_0402_1%

1 2

CC8 0.22U_0402_16V7KCC8 0.22U_0402_16V7K

1 2

CC11 0.22U _0402_16V7KCC11 0.22U_0402_16V7K

1 2

CC16 0.22U _0402_16V7KCC16 0.22U_0402_16V7K

1 2

CC20 0.22U _0402_16V7KCC20 0.22U_0402_16V7K

1 2

CC10 0.22U _0402_16V7KCC10 0.22U_0402_16V7K

1 2

CC5 0.22U_0402_16V7KCC5 0.22U_0402_16V7K

1 2

CC6 0.22U_0402_16V7KCC6 0.22U_0402_16V7K

1 2

CC7 0.22U_0402_16V7KCC7 0.22U_0402_16V7K

IVY Bridge

SANDY Bridge Gen1/Gen2 180 nF~265 nF

NV N14x Gen1/2/3 Suggest 220 nF

PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical

12

impedance = 43 m ohm (4 mils) PEG_ICOMPO signals should be routed with max length = 500 mils

- typical impedance = 14.5 m ohm (12 mils)

PCIE_GTX_C_CRX_N[0..3] <13>

PCIE_GTX_C_CRX_P[0..3] <13>

PCIE_CTX_C_GRX_N0 PCIE_CTX_C_GRX_N1 PCIE_CTX_C_GRX_N2 PCIE_CTX_C_GRX_N3

PCIE_CTX_C_GRX_P0 PCIE_CTX_C_GRX_P1 PCIE_CTX_C_GRX_P2 PCIE_CTX_C_GRX_P3

PEG DG suggest AC cap

Gen1/Gen2

n3 180 nF~265 nF

Ge

75 nF~265 nF

PCIE_CTX_C_GRX_N[0..3] <13 >

PCIE_CTX_C_GRX_P[0..3] <13>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Ivy Bridge_DMI/PEG/FDI

VFKAA

6 56Monday, March 11, 2013

1

1.0

CyberForum.ru

5

JCPUC

G10

M10

AG6 AG5 AK6 AK5 AH5 AH6

AK8

AK9 AH8 AH9

AP11 AN11

AL12 AM12 AM11

AL11 AP12 AN12

AJ14 AH14

AL15 AK15

AL14 AK14

AJ15 AH15

AE10

AF10

AE8 AD9

JCPUC

C5

SA_DQ[0]

D5

SA_DQ[1]

D3

SA_DQ[2]

D2

SA_DQ[3]

D6

SA_DQ[4]

C6

SA_DQ[5]

C2

SA_DQ[6]

C3

SA_DQ[7]

F10

SA_DQ[8]

F8

SA_DQ[9] SA_DQ[10]

G9

SA_DQ[11]

F9

SA_DQ[12]

F7

SA_DQ[13]

G8

SA_DQ[14]

G7

SA_DQ[15]

K4

SA_DQ[16]

K5

SA_DQ[17]

K1

SA_DQ[18]

J1

SA_DQ[19]

J5

SA_DQ[20]

J4

SA_DQ[21]

J2

SA_DQ[22]

K2

SA_DQ[23]

M8

SA_DQ[24]

N10

SA_DQ[25]

N8

SA_DQ[26]

N7

SA_DQ[27] SA_DQ[28]

M9

SA_DQ[29]

N9

SA_DQ[30]

M7

SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37]

AJ5

SA_DQ[38]

AJ6

SA_DQ[39]

AJ8

SA_DQ[40] SA_DQ[41]

AJ9

SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45]

AL9

SA_DQ[46]

AL8

SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1]

V6

SA_BS[2]

SA_CAS# SA_RAS#

AF9

SA_WE#

DDR SYSTEM MEMORY A

DDR_A_D[0..63]<11>

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3

D D

C C

B B

DDR_A_BS0<11> DDR_A_BS1<11> DDR_A_BS2<11>

DDR_A_CAS#<11> DDR_A_RAS#<11>

DDR_A_WE#<11>

DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

4

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1] RSVD_TP[2] RSVD_TP[3]

RSVD_TP[4] RSVD_TP[5] RSVD_TP[6]

SA_CS#[0]

SA_CS#[1] RSVD_TP[7] RSVD_TP[8]

SA_ODT[0]

SA_ODT[1] RSVD_TP[9]

RSVD_TP[10]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AB6 AA6 V9

AA5 AB5 V10

AB4 AA4 W9

AB3 AA3 W10

AK3 AL3 AG1 AH1

AH3 AG3 AG2 AH2

C4 G6 J3 M6 AL6 AM8 AR12 AM15

D4 F6 K3 N6 AL5 AM9 AR11 AM14

AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8

DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

3

JCPUD

D10

K10

AM5 AM6 AR3

AP3 AN3 AN2 AN1

AP2

AP5 AN9

AT5

AT6

AP6 AN8 AR6 AR5 AR9

AJ11

AT8

AT9

AH11

AR8

AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15

AA9

AA7

AA10

AB8

AB9

J10

C9 A7

C8 A9 A8 D9 D8 G4 F4 F1 G1 G5 F5 F2 G2 J7 J8

K9 J9

K8

K7 M5 N4 N2 N1 M4 N5 M2 M1

R6

JCPUD

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

DDR_B_D[0..63]<12>

DDRA_CLK0 <11> DDRB_CLK0 <12> DDRA_CLK0# <11> DDRA_CKE0 <11> DDRB_CKE0 <12>

DDRA_CLK1 <11> DDRA_CLK1# <11> DDRB_CLK1# <12> DDRA_CKE1 <11>

DDRA_SCS0# <11> DDRA_SCS1# <11> DDRB_SCS1# <12>

DDRA_ODT0 <11> DDRB_ODT0 <12> DDRA_ODT1 <11> DDRB_ODT1 <12>

DDR_A_DQS#[0..7] <11>

DDR_A_DQS[0..7] <11>

DDR_A_MA[0..15] <11>

DDR_B_BS0<12> DDR_B_BS1<12> DDR_B_BS2<12>

DDR_B_CAS#<12> DDR_B_RAS#<12>

DDR_B_WE#<12>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

2

AE2

SB_CLK[0]

AD2

SB_CLK#[0]

R9

SB_CKE[0]

AE1

SB_CLK[1]

AD1

SB_CLK#[1]

R10

SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

AB2 AA2 T9

AA1 AB1 T10

AD3 AE3 AD6 AE6

AE4 AD4 AD5 AE5

D7 F3 K6 N3 AN5 AP9 AK12 AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8

DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

RSVD_TP[11] RSVD_TP[12] RSVD_TP[13]

RSVD_TP[14] RSVD_TP[15] RSVD_TP[16]

RSVD_TP[17] RSVD_TP[18]

RSVD_TP[19] RSVD_TP[20]

DDR SYSTEM MEMORY B

DDRB_CLK0# <12>

DDRB_CLK1 <12>

DDRB_CKE1 <12>

DDRB_SCS0# <12>

DDR_B_DQS#[0..7] <12>

DDR_B_DQS[0..7] <12>

DDR_B_MA[0..15] <12>

1

TYCO_2013620-2_IVY BRIDGE

Conn@

+1.5V

12

RC76

1K_0402_5%

QC3

D

S

D

S

13

H_DRAMRST#<5>

RC78

4.99K_0402_1%

A A

DRAMRST_CNTRL_PC H<26,9>

5

4.99K_0402_1%

1 2

Rshort@

RC73 0_0402_5%

DRAMRST_CNTRL

1 2

BSS138_NL_SOT23-3

G

2

1

CC37

0.047U_0402_25V6K

2

DDR3_DRAMRST#_R

4

RC77

RC77 1K_0402_5%

1K_0402_5%

1 2

SM_DRAMRST# <11 ,12>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

TYCO_2013620-2_IVY BRIDGE

Conn@

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Ivy Bridge_DDR3

VFKAA

7 56Monday, March 11, 2013

1

1.0

CyberForum.ru

5

4

3

2

1

+CPU_CORE

JCPUF

53

AG35

D D

C C

B B

A A

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

TYCO_2013620-2_IVY BRIDGE

Conn@

A

5

POWER

PEG AND DDR

CORE SUPPLY

VSS_SENSE_VCCIO

SENSE LINES SVID

VCCIO_SENSE

8.5A

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE VSS_SENSE

+1.05VS_VCCP

AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12

E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

J23

AJ29

H_CPU_SVIDALRT#

AJ30 AJ28

AJ35 AJ34

B10 A10

RC96

10_0402_1%

Close to CPU

+1.05VS_VCCP

1

CC17

2

ESD@ CC17

ESD@

100P_0402_50V8J

1

CC18

CC19

2

ESD@ CC18

ESD@

ESD@ CC19

ESD@

100P_0402_50V8J

by ESD requestion and place near CPU

+1.05VS_VCCP+1.05VS_VCCP

12

RC91

RC91 130_0402_5%

130_0402_5%

1 2

RC90 43 _0402_1%RC90 43_0402_1%

RC98

RC98 10_0402_1%

10_0402_1%

+1.05VS_VCCP

4

VCCIO_SENSE <49>

12

RC89

RC89 75_0402_5%

75_0402_5%

VR_SVID_ALRT# <51> VR_SVID_CLK <51> VR_SVID_DAT <51>

Pull high resistor on VR side

+CPU_CORE

RC93

Close to CPU

100_0402_1%

1 2

12

RC97

RC97 100_0402_1%

100_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

VCCSENSE <51> VSSSENSE <51>

3

Compal Secret Data

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Ivy Bridge_POWER-1

VFKAA

8 56Monday, March 11, 2013

1

1.0

CyberForum.ru

5

4

3

2

1

+GFX_CORE

JCPUG

3A

3

AT24

VAXG1

AT23

D D

C C

AT21 AT20 AT18 AT17 AR24 AR23 AR21 AR20 AR18 AR17 AP24 AP23 AP21 AP20 AP18 AP17 AN24 AN23 AN21 AN20 AN18

AN17 AM24 AM23 AM21 AM20 AM18 AM17

AL24 AL23 AL21 AL20 AL18

AL17 AK24 AK23 AK21 AK20 AK18 AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17 AH24 AH23 AH21 AH20 AH18 AH17

VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54

VCCPLL Decoupling: 1X 10U, 1x 1U

1 2

Rshort@

+1.8VS

B B

A A

Rshort@

RC119 0_0805_5%

10U_0603_6.3V6M

CC59

+1.8VS_VCCPLL

1

CC60

2

1U_0402_6.3V6K

1

2

1.2A

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

TYCO_2013620-2_IVY BRIDGE

Conn@

POWER

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

SA_DIMM_VREFDQ SB_DIMM_VREFDQ

VREFMISC

GRAPHICS

DDR3 -1.5V RAILS

SA RAIL

VCCSA_SENSE

1.8V RAIL

VAXG_SENSE

SM_VREF

5A

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15

6A

VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8

VCCSA_VID[0] VCCSA_VID[1]

VCCIO_SEL

AK35 AK34

+V_SM_VREF should have 20 mil trace width

AL1

B4 D1

AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1

+V_SM_VREF

+VREF_DQA_M3 +VREF_DQB_M3

CC57

10U_0603_6.3V6M

Bottom Socket Cavity

M27

10U_0603_6.3V6M

M26 L26 J26 J25 J24 H26 H25

10U_0603_6.3V6M

H23

C22 C24

A19

CC42

1

CC41

2

1

CC43

2

10U_0603_6.3V6M

H_VCCSA_VID0 < 50> H_VCCSA_VID1 < 50>

0.1U_0402_10V7K

1

CC51

2

Bottom Socket Edge

12

RC105

Close to CPU

10_0402_1%

VCC_AXG_SENSE <51>

RC120

RC120 1K_0402_0.5%

1K_0402_0.5%

1K_0402_0.5% RC109

RC109

10U_0603_6.3V6M

1

CC56

2

VSS_AXG_SENSE <51>

+1.5V_CPU

1

2

1

CC65

2

10U_0603_6.3V6M

1

CC52

CC55

2

10U_0603_6.3V6M

1 2

RC106

RC106 10_0402_1%

10_0402_1%

1 2

1

CC54

2

10U_0603_6.3V6M

+VCCSA Decoupling: 1X 47U (MLCC), 3X 10U

+VCCSA

1

2

12

CC44

CC44 47U_0805_6.3V6M

47U_0805_6.3V6M

@

Please kindly c heck whether there is pull-d own resister in PWR-side or HW-side

10/3: confirmed with PWR, IC intergrate PD

+1.5V_CPU +1.5V

1 2

CC46 0.1U_0402_10V7K

@

1 2

CC47 0.1U_0402_10V7K

@

1 2

CC48 0.1U_0402_10V7K

@

1 2

CC45 0.1U_0402_10V7K

@

+1.5V_CPU Decoupling: 1X 47U (MLCC), 6X 10U

12

CC50

CC50 47U_0805_6.3V6M

47U_0805_6.3V6M

@

Intel DDR Vref M3

+VREF_DQA_M3

+VREF_DQB_M3

Vgs=10V,Id=14.5 A,Rds=6mohm

RC203

470_0805_5%

QC5B

5

SUSP

2N7002DW-T/R7_SOT363-6

0

1

1 1

1 2 3

4

1

CC68

CC68 10U_0603_6.3V6M

10U_0603_6.3V6M

2

0.1U_0402_25V6

Place near SO-DIMM side

BSS138_NL_SOT23-3

S

G

2

G

2

S

BSS138_NL_SOT23-3

+VCCSAVCCSA_VID0 VCCSA_VID1

0

1

0

0.90 V

0.80 V

0.725 V

0.675 V

JP@

PJ1

2

112

JUMP_43X39

QC4

1

S

D

2

S

D

3

S

D

4

G

D

FDS6676AS_SO8

RUN_ON_CPU1.5VS3

12

1

RC205

CC69

RC205 820K_0402_5%

820K_0402_5%

2

QC7

D

13

D

QC8

VREF traces should be at least 20 mils wide and 20 mils spacing to other signals/planes.

+VREF_DQA

DRAMRST_CNTRL_PC H <26,7>

+VREF_DQB

For Sandy Bridge

+1.5VS+1.5V_CPU

+1.5V

8 7 6 5

RC204

1 2

220K_0402_5%

61

QC5A

2

SUSP

2N7002DW-T/R7_SOT363-6

B+

SUSP <43>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

Ivy Bridge_POWER-2

VFKAA

9 56Monday, March 11, 2013

1

1.0

of

CyberForum.ru

5

JCPUH

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

AT13

VSS9

AT10

VSS10

AT7

VSS11

AT4

D D

C C

B B

VSS12

AT3

VSS13

AR25

VSS14

AR22

VSS15

AR19

VSS16

AR16

VSS17

AR13

VSS18

AR10

VSS19

AR7

VSS20

AR4

VSS21

AR2

VSS22

AP34

VSS23

AP31

VSS24

AP28

VSS25

AP25

VSS26

AP22

VSS27

AP19

VSS28

AP16

VSS29

AP13

VSS30

AP10

VSS31

AP7

VSS32

AP4

VSS33

AP1

VSS34

AN30

VSS35

AN27

VSS36

AN25

VSS37

AN22

VSS38

AN19

VSS39

AN16

VSS40

AN13

VSS41

AN10

VSS42

AN7

VSS43

AN4

VSS44

AM29

VSS45

AM25

VSS46

AM22

VSS47

AM19

VSS48

AM16

VSS49

AM13

VSS50

AM10

VSS51

AM7

VSS52

AM4

VSS53

AM3

VSS54

AM2

VSS55

AM1

VSS56

AL34

VSS57

AL31

VSS58

AL28

VSS59

AL25

VSS60

AL22

VSS61

AL19

VSS62

AL16

VSS63

AL13

VSS64

AL10

VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68

AK33

VSS69

AK30

VSS70

AK27

VSS71

AK25

VSS72

AK22

VSS73

AK19

VSS74

AK16

VSS75

AK13

VSS76

AK10

VSS77

AK7

VSS78

AK4

VSS79

AJ25

VSS80

TYCO_2013620-2_IVY BRIDGE

Conn@

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

JCPUI

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

TYCO_2013620-2_IVY BRIDGE

Conn@

4

VSS

VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285

3

JCPUE

F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3

T14 PADT14 PAD T20 PADT20 PAD T23 PADT23 PAD T18 PADT18 PAD T22 PADT22 PAD T21 PADT21 PAD T24 PADT24 PAD T25 PADT25 PAD

CFG2

CFG4 CFG5 CFG6 CFG7

CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

J15

RSVD27

TYCO_2013620-2_IVY BRIDGE

Conn@

CFG

RESERVED

VCC_DIE_SENSE VSS_DIE_SENSE

RSVD28 RSVD29 RSVD30 RSVD31

RSVD32

RSVD33 RSVD34 RSVD35

RSVD37 RSVD38 RSVD39 RSVD40

RSVD_NCTF1 RSVD_NCTF2 RSVD_NCTF3 RSVD_NCTF4 RSVD_NCTF5

RSVD_NCTF6 RSVD_NCTF7 RSVD_NCTF8 RSVD_NCTF9

RSVD_NCTF10

RSVD51 RSVD52

BCLK_ITP

BCLK_ITP#

RSVD_NCTF11 RSVD_NCTF12 RSVD_NCTF13

KEY

2

AH27 AH26

L7 AG7 AE7 AK2

W8

AT26 AM33 AJ27

T8 J16 H16 G16

AR35 AT34 AT33 AP35 AR34

B34 A33 A34 B35 C35

AJ32 AK32

AN35 AM35

AT2 AT1 AR1

B1

T3PAD T3PAD

PEG Static Lane Reversal - CFG 2 is for the 16x

CFG2

Embedded Display Port Presence Strap

CFG4

T64PAD T64PAD

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

*

CFG[6:5]

10: x8, x8 - Device 1 function 1 enabled ; function 2

01: Reserved - (Device 1 function 1 disabled ; function

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

1

CFG Straps for Processor

(CFG[17:0] internal pull high 5~15K to VCCIO)

CFG2

1: Normal Operation; Lane # definition matches so

*

cket pin map definition

12

RC79

RC79 1K_0402_1%

1K_0402_1%

@

0:Lane Reversed

CFG4

1 : Disabled; No Physical Display Port attached to Embedded Display Port

*

0 : Enabled; An external Display Port device is co

nnected to the Embedded Display Port

CFG6

CFG5

RC83

1K_0402_1%

12

@

RC82

RC82 1K_0402_1%

1K_0402_1%

IEDP@

12

RC84

RC84 1K_0402_1%

1K_0402_1%

@

disabled

2 enabled)

CFG7

12

RC85

RC85 1K_0402_1%

1K_0402_1%

@

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB de assertion

CFG7

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

2

0: PEG Wait for BIOS for training

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Ivy Bridge_GND/RSVD/CFG

VFKAA

10 56Monday, March 11, 2013

1

10 56Monday, March 11, 2013

1.0

CyberForum.ru

5

4

3

2

1

+1.5V

JDDR3L

+VREF_DQA

CD1

0.1U_0402_10V7K

D D

Close to JDDR3L.1

C C

B B

A A

+3VS

DDR_A_BS2<7>

DDRA_CLK0<7> DDRA_CLK0#<7>

DDR_A_BS0<7>

DDR_A_WE#<7>

DDR_A_CAS#<7>

DDRA_SCS1#<7>

0.1U_0402_10V7K

DDR_A_D0 DDR_A_D1

1

2

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_D26 DDR_A_D27

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

DDR_A_MA10

DDR_A_MA13

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_D58 DDR_A_D59

1

CD26

2

SPD setting (SA 0, SA1) PU/PD by Channe l A/B

->Channel A 00

->Channel B 01

5

+0.75VS

JDDR3L

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LCN_DAN06-K4406-0102

o

nn@

C

VSS3

DQS#0

DQS0

VSS6

VSS8 DQ12 DQ13

VSS10

DQ14 DQ15

DQ20 DQ21

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

VTT2

DQ4 DQ5

DQ6 DQ7

DM1

DM2

CK1

BA1

NC2

DM4

DM6

SDA SCL

+1.5V

2 4

DDR_A_D4

6

DDR_A_D5

8 10

DDR_A_DQS#0

12

DDR_A_DQS0

14 16

DDR_A_D6

18

DDR_A_D7

20 22

DDR_A_D12

24

DDR_A_D13

26 28 30 32 34

DDR_A_D14

36

DDR_A_D15

38 40

DDR_A_D20

42

DDR_A_D21

44 46 48 50

DDR_A_D22

52

DDR_A_D23

54 56

DDR_A_D28

58

DDR_A_D29

60 62

DDR_A_DQS#3

64

DDR_A_DQS3

66 68

DDR_A_D30

70

DDR_A_D31

72

74 76 78

A15 A14

A11

A7

A6 A4

A2 A0

S0#

G2

DDR_A_MA15

80

DDR_A_MA14

82 84

DDR_A_MA11

86

DDR_A_MA7

88 90

DDR_A_MA6

92

DDR_A_MA4

94 96

DDR_A_MA2

98

DDR_A_MA0

100 102 104 106 108 110 112 114 116 118 120 122 124 126

+VREF_CAA

128 130

DDR_A_D36

132

DDR_A_D37

134 136 138 140

DDR_A_D38

142

DDR_A_D39

144 146

DDR_A_D44

148

DDR_A_D45

150 152

DDR_A_DQS#5

154

DDR_A_DQS5

156 158

DDR_A_D46

160

DDR_A_D47

162 164

DDR_A_D52

166

DDR_A_D53

168 170 172 174

DDR_A_D54

176

DDR_A_D55

178 180

DDR_A_D60

182

DDR_A_D61

184 186

DDR_A_DQS#7

188

DDR_A_DQS7

190 192

DDR_A_D62

194

DDR_A_D63

196 198 200 202 204

+0.75VS

206

4

DDR3 SO-DIMM A Standard Type

SM_DRAMRST# <12,7>

DDRA_CKE1 <7>DDRA_CKE0<7>

DDRA_CLK1 <7> DDRA_CLK1# <7>

DDR_A_BS1 <7> DDR_A_RAS# <7>

DDRA_SCS0# <7> DDRA_ODT0 <7>

DDRA_ODT1 <7>

1

CD16

0.1U_0402_10V7K

2

close to JDDR3L.126

PM_SMBDATA <12,26,35,42> PM_SMBCLK <12,26,35,42>

DDR_A_DQS[0..7] <7>

DDR_A_DQS#[0..7] <7>

DDR_A_D[0..63] <7>

DDR_A_MA[0..15] <7>

+1.5V

12

RD1

1K_0402_1%

+VREF_DQA

+1.5V

12

RD6

1K_0402_1%

12

RD7

1K_0402_1%

Layout Note: Place near JDDRL

+1.5V +1.5V +0.75VS

1 2

CD8 10U_0603 _6.3V6MCD8 10U_0603_6.3V6M

1 2

CD9 10U_0603 _6.3V6MCD9 10U_0603_6.3V6M

1 2

CD10 10U_0603_6.3V6MCD10 10U_0603_6.3V6M

1 2

CD11 10U_0603_6.3V6MCD11 10U_0603_6.3V6M

1 2

CD12 10U_0603_6.3V6MCD12 10U_0603_6.3V6M

1 2

CD13 10U_0603_6.3V6MCD13 10U_0603_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

12

1K_0402_1%

Deciphered Date

RD2

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

1 2

CD20 0.1U_0402_10V7KCD20 0.1U_0402_10V7K

1 2

CD17 0.1U_0402_10V7KCD17 0.1U_0402_10V7K

1 2

CD18 0.1U_0402_10V7KCD18 0.1U_0402_10V7K

1 2

CD19 0.1U_0402_10V7KCD19 0.1U_0402_10V7K

2

Date: Sheet of

Date: Sheet

Layout Note: Place near JDDRL1.203 a nd 204

12

CD24 1U_0402_6.3V6KCD24 1U_0402_6.3V6K

12

CD21 1U_0402_6.3V6KCD21 1U_0402_6.3V6K

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Compal Electronics, Inc.

DDRIII-SODIMM0

VFKAA

11 56Monday, March 11, 2013

1

of

1.0

CyberForum.ru

A

B

C

D

E

DQ4 DQ5

DQ6 DQ7

DM1

DM2

CK1

BA1

NC2

DM4

DM6

SDA SCL

+1.5V

2 4

DDR_B_D4

6

DDR_B_D5

8 10

DDR_B_DQS#0

12

DDR_B_DQS0

14 16

DDR_B_D6

18

DDR_B_D7

20 22

DDR_B_D12

24

DDR_B_D13

26 28 30 32 34

DDR_B_D14

36

DDR_B_D15

38 40

DDR_B_D20

42

DDR_B_D21

44 46 48 50

DDR_B_D22

52

DDR_B_D23

54 56

DDR_B_D28

58

DDR_B_D29

60 62

DDR_B_DQS#3

64

DDR_B_DQS3

66 68

DDR_B_D30

70

DDR_B_D31

72

74 76 78

A15 A14

A11

A7

A6 A4

A2 A0

S0#

G2

DDR_B_MA15

80

DDR_B_MA14

82 84

DDR_B_MA11

86

DDR_B_MA7

88 90

DDR_B_MA6

92

DDR_B_MA4

94 96

DDR_B_MA2

98

DDR_B_MA0

100 102 104 106 108 110 112 114 116 118 120 122 124 126

+VREF_CAB

128 130

DDR_B_D36

132

DDR_B_D37

134 136 138 140

DDR_B_D38

142

DDR_B_D39

144 146

DDR_B_D44

148

DDR_B_D45

150 152

DDR_B_DQS#5

154

DDR_B_DQS5

156 158

DDR_B_D46

160

DDR_B_D47

162 164

DDR_B_D52

166

DDR_B_D53

168 170 172 174

DDR_B_D54

176

DDR_B_D55

178 180

DDR_B_D60

182

DDR_B_D61

184 186

DDR_B_DQS#7

188

DDR_B_DQS7

190 192

DDR_B_D62

194

DDR_B_D63

196 198 200 202 204

+0.75VS

206

B

DDRB_CKE1 <7>

DDRB_CLK1 <7> DDRB_CLK1# <7>

DDR_B_BS1 <7> DDR_B_RAS# <7>DDR_B_BS0<7>

DDRB_SCS0# <7> DDRB_ODT0 <7>

DDRB_ODT1 <7>

CD47

Close to JDDR3H.126

PM_SMBDATA <11,26,35,42> PM_SMBCLK <11,26,35,42>

DDR3 SO-DIMM B Standard Type

SM_DRAMRST# <11,7>

1

0.1U_0402_10V7K

2

DDR_B_DQS#[0..7] <7>

DDR_B_DQS[0..7] <7>

DDR_B_D[0..63] <7>

DDR_B_MA[0..15] <7>

+1.5V

12

RD10

1K_0402_1%

+VREF_DQB

+1.5V

12

RD12

1K_0402_1%

12

RD13

1K_0402_1%

Layout Note: Place near JDDRH

+1.5V +0.75VS+1.5V

1 2

CD31 47U_0805_6.3V6MCD31 47U_0805_6.3V6M

1 2

CD41 10U_0603_6.3V6MCD41 10U_0603_6.3V6M

1 2

CD36 10U_0603_6.3V6MCD36 10U_0603_6.3V6M

1 2

CD37 10U_0603_6.3V6MCD37 10U_0603_6.3V6M

1 2

CD38 10U_0603_6.3V6MCD38 10U_0603_6.3V6M

1 2

CD39 10U_0603_6.3V6MCD39 10U_0603_6.3V6M

1 2

CD40 10U_0603_6.3V6MCD40 10U_0603_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

12

RD11

1K_0402_1%

Layout Note: Place these 4 Caps near Command and Control signals of DIMMB

1 2

CD33 0.1U_0402_10V7KCD33 0.1U_0402_10V7K

1 2

CD29 0.1U_0402_10V7KCD29 0.1U_0402_10V7K

1 2

CD30 0.1U_0402_10V7KCD30 0.1U_0402_10V7K

1 2

CD32 0.1U_0402_10V7KCD32 0.1U_0402_10V7K

D

Date: Sheet of

Layout Note: Place near JDDRH.203 and 2 04

12

CD45 1U_0402_6.3V6KCD45 1U_0402_6.3V6K

12

CD42 1U_0402_6.3V6KCD42 1U_0402_6.3V6K

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Compal Electronics, Inc.

DDRIII-SODIMM1

VFKAA

12 56Monday, March 11, 2013

E

1.0

+1.5V

JDDR3H

+VREF_DQB

CD27

0.1U_0402_10V7K

1 1

Close to JDDR3H.1

+3VS

DDRB_CKE0<7>

DDR_B_BS2<7>

DDRB_CLK0<7> DDRB_CLK0#<7>

DDR_B_WE#<7> DDR_B_CAS#<7>

DDRB_SCS1#<7>

1

CD49

2

0.1U_0402_10V7K

2 2

3 3

4 4

DDR_B_D0 DDR_B_D1

1

DDR_B_D2

2

DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26 DDR_B_D27

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

DDR_B_MA10

DDR_B_MA13

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D59

12

RD15 10K_0402_5%RD15 10K_0402_5%

SPD setting (SA 0, SA1) PU/PD by Channe l A/B

->Channel A 00

->Channel B 01

A

+0.75VS

JDDR3H

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LCN_DAN06-K4806-0102

Conn@

VSS3

DQS#0

DQS0 VSS6

VSS8 DQ12 DQ13

VSS10

DQ14 DQ15

DQ20 DQ21

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44

DQ45 VSS35 DQS#5

DQS5 VSS38

DQ46

DQ47 VSS40

DQ52

DQ53 VSS42

VSS43

DQ54

DQ55 VSS45

DQ60

DQ61 VSS47 DQS#7

DQS7 VSS50

DQ62

DQ63 VSS52

EVENT#

VTT2

CyberForum.ru

A

PCIE_GTX_C_CRX_P[0..3]<6>

PCIE_GTX_C_CRX_N[0..3]<6>

PCIE_CTX_C_GRX_P[0..3]<6>

PCIE_CTX_C_GRX_N[0..3]<6>

1 1

PCIE_GTX_C_CRX_P0 PCIE_GTX_C_CRX_N0 PCIE_GTX_C_CRX_P1 PCIE_GTX_C_CRX_N1 PCIE_GTX_C_CRX_P2 PCIE_GTX_C_CRX_N2 PCIE_GTX_C_CRX_P3 PCIE_GTX_C_CRX_N3

2 2

3 3

CLK_REQ_VGA#<26>

4 4

PCIE_GTX_C_CRX_P[0..3]

PCIE_GTX_C_CRX_N[0..3]

PCIE_CTX_C_GRX_P[0..3]

PCIE_CTX_C_GRX_N[0..3]

1 2

CV1 0.22U_0402_16V 7KOPT@CV1 0.22U_0402_16V7KOPT@

1 2

CV2 0.22U_0402_16V 7KOPT@CV2 0.22U_0402_16V7KOPT@

1 2

CV3 0.22U_0402_16V 7KOPT@CV3 0.22U_0402_16V7KOPT@

1 2

CV4 0.22U_0402_16V 7KOPT@CV4 0.22U_0402_16V7KOPT@

1 2

CV5 0.22U_0402_16V7KOPT@C V5 0.22U_0402_16V7KOPT@

1 2

CV6 0.22U_0402_16V 7KOPT@CV6 0.22U_0402_16V7KOPT@

1 2

CV7 0.22U_0402_16V 7KOPT@CV7 0.22U_0402_16V7KOPT@

1 2

CV8 0.22U_0402_16V 7KOPT@CV8 0.22U_0402_16V7KOPT@

CLK_PCIE_VGA<26>

CLK_PCIE_VGA#<26>

PLTRST_VGA#<29>

61

QV2A

2N7002DW-T/R7_SOT363-6

OPT@

2

1 2

RV4 200_0402_1%

@

+3VS_DGPU

PCIE_CTX_C_GRX_P0 PCIE_CTX_C_GRX_N0 PCIE_CTX_C_GRX_P1 PCIE_CTX_C_GRX_N1 PCIE_CTX_C_GRX_P2 PCIE_CTX_C_GRX_N2 PCIE_CTX_C_GRX_P3 PCIE_CTX_C_GRX_N3

PCIE_GTX_CRX_P0 PCIE_GTX_CRX_N0 PCIE_GTX_CRX_P1 PCIE_GTX_CRX_N1 PCIE_GTX_CRX_P2 PCIE_GTX_CRX_N2 PCIE_GTX_CRX_P3 PCIE_GTX_CRX_N3

CLK_PCIE_VGA CLK_PCIE_VGA# CLK_REQ_GPU#

PEX_TSTCLK_OUT PEX_TSTCLK_OUT#

RV5

2.49K_0402_1%

OPT@

1 2

B

UV1A

AG6

PEX_RX0

AG7

PEX_RX0_N

AF7

PEX_RX1

AE7

PEX_RX1_N

AE9

PEX_RX2

AF9

PEX_RX2_N

AG9

PEX_RX3

AG10

PEX_RX3_N

AF10

PEX_RX4

AE10

PEX_RX4_N

AE12

PEX_RX5

AF12

PEX_RX5_N

AG12

PEX_RX6

AG13

PEX_RX6_N

AF13

PEX_RX7

AE13

PEX_RX7_N

AE15

NC

AF15

NC

AG15

NC

AG16

NC

AF16

NC

AE16

NC

AE18

NC

AF18

NC

AG18

NC

AG19

NC

AF19

NC

AE19

NC

AE21

NC

AF21

NC

AG21

NC

AG22

NC

AC9

PEX_TX0

AB9

PEX_TX0_N

AB10

PEX_TX1

AC10

PEX_TX1_N

AD11

PEX_TX2

AC11

PEX_TX2_N

AC12

PEX_TX3

AB12

PEX_TX3_N

AB13

PEX_TX4

AC13

PEX_TX4_N

AD14

PEX_TX5

AC14

PEX_TX5_N

AC15

PEX_TX6

AB15

PEX_TX6_N

AB16

PEX_TX7

AC16

PEX_TX7_N

AD17

NC

AC17

NC

AC18

NC

AB18

NC

AB19

NC

AC19

NC

AD20

NC

AC20

NC

AC21

NC

AB21

NC

AD23

NC

AE23

NC

AF24

NC

AE24

NC

AG24

NC

AG25

NC

AE8

PEX_REFCLK

AD8

PEX_REFCLK_N

AC6

PEX_CLKREQ_N

AF22

PEX_TSTCLK_OUT

AE22

PEX_TSTCLK_OUT_N

AC7

PEX_RST_N

AF25

PEX_TERMP

N14P-GV2-S-A2_FCBGA595

N14PGV2R3@

1

CV17

CV17 18P_0402_50V8J

18P_0402_50V8J

NOGCLK@

2

Part 1 of 6

PCI EXPRESS

YV1

1

DACsI2C GPIO

120mA

52mA

71mA

41mA

CLK

NOGCLK@

27MHZ_16PF

GND

2

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21

DACA_RED

DACA_GREEN

DACA_BLUE

DACA_HSYNC DACA_VSYNC

DACA_VDD DACA_VREF DACA_RSET

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

I2CC_SCL

I2CC_SDA

I2CS_SCL

I2CS_SDA

CORE_PLLVDD

SP_PLLVDD

VID_PLLVDD

XTAL_IN

XTAL_OUT

XTAL_SSIN

XTAL_OUTBUFF

3

GND

4

18P_0402_50V8J

NC

3

NOGCLK@

C6 B2 D6 C7 F9 A3 A4 B6 A6 F8 C5 E7 D7 B4 B3 C3 D5 D4 C2 F7 E6 C4

AB6

AG3 AF4 AF3

AE3 AE4

W5 AE2 AF2

B7 A7

C9 C8

A9 B9

D9 D8

L6 M6

N6

C11 B10

A10 C10

XTAL_OUTXTALIN

CV18

FB_CLAMP_MON

FB_CLAMP_REQ#

OVERT#_VGA GPU_EVENT

DGPU_VID GPS_DOWN# PSI

VGA_CRT_CLK VGA_CRT_DATA

HDCP_SCL HDCP_SDA

VGA_EDID_CLK VGA_EDID_DATA

SMB_CLK_GPU SMB_DATA_GPU

+PLLVDD

+GPU_PLLVDD

XTALIN XTAL_OUT

XTAL_SSIN XTAL_OUTBUFF

1

2

C

+3VS_DGPU

G

2

QV8

N14PGV2@

13

D

S

2N7002KW_SOT323-3

DGPU_VID <54>

GPS_DOWN# <41>

PSI <54>

1

CV9

CV10

0.1U_0402_10V7K

RV7

CV113

OPT@

CV10

2

0.1U_0402_10V7K

12

@EMI@RV7

@EMI@

1

@EMI@CV113

@EMI@

2

OPT@

2

CV42, CV43 under GPU close to ball : AE8,AD7

VGA_X1<35>

10_0402_5%

10P_0402_50V8J

for EMI

DV1

12

RB751V40_SC76-2

OPT@

CLK_REQ_GC6# <41>

BLM18PG181SN1D_2P

1

CV11

2

4.7U_0603_6.3V6K

OPT@

1 2

RV8 0_040 2_5%

GCLK@

FB_CLAMP <14,17,41>

LV1

1 2

OPT@

CV12

22U_0805_6.3V6M

XTALIN

For GC6

+1.05VS_DGPU

1

OPT@

2

D

GPS_DOWN# GPU_EVENT XTAL_OUTBUFF XTAL_SSIN

VGA_EDID_CLK VGA_EDID_DATA SMB_CLK_GPU SMB_DATA_GPU

VGA_CRT_CLK VGA_CRT_DATA HDCP_SDA HDCP_SCL

FB_CLAMP FB_CLAMP_REQ# FB_CLAMP_MON OVERT#_VGA

JTAG_TRST<15> TESTMODE<15>

CLK_REQ_GC6#

CLK_REQ_GPU#

E

RPV1

1 8 2 7 3 6 4 5

10K_8P4R_5%

OPT@

RPV2

1 8 2 7 3 6 4 5

2.2K_8P4R_5%

OPT@

RPV3

1 8 2 7 3 6 4 5

2.2K_8P4R_5%

OPT@

RPV12

1 8 2 7 3 6 4 5

10K_8P4R_5%

OPT@

RPV13

1 8 2 7 3 6 4 5

10K_8P4R_5%

OPT@

+3VS_DGPU

+3VS

Internal Thermal Sensor

+3VS_DGPU

5

OPT@

QV1B

3

SMB_CLK_GPU

CV13

10U_0603_6.3V6M

SMB_DATA_GPU

under GPU close to AD8

OPT@

2N7002DW-T/R7_SOT363-6

+PLLVDD

2

2N7002DW-T/R7_SOT363-6

QV1A

1

CV14

2

OPT@ CV14

OPT@

0.1U_0402_10V7K

4

61

FBMA-L11-160808300LMA25T_2P

1

CV15

2

OPT@ CV15

OPT@

22U_0805_6.3V6M

LV2

OPT@LV2

OPT@

1 2

EC_SMB_CK2 <26,34,41>

EC_SMB_DA2 <26,34,41>

+1.05VS_DGPU

1

CV16

2

OPT@ CV16

OPT@

10U_0603_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet

Compal Electronics, Inc.

VGA_N14x PEG & DAC

13 56Monday, March 11, 2013

E

13 56Monday, March 11, 2013

1.0

of

CyberForum.ru

A

VRAM Interface

+FB_PLLAVDD

CV20

22U_0805_6.3V6M

1

OPT@CV20

OPT@

2

MDA[15..0]

MDA[31..16]

MDA[47..32]

MDA[63..48]

Close to H22

CV21

0.1U_0402_10V7K

2

OPT@CV21

OPT@

1

CV22

1

OPT@CV22

OPT@

2

Close to P22

CV114

0.1U_0402_10V7K

OPT@CV114

OPT@

UV1B

Part 2 of 6

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58

0.1U_0402_10V7K

1

2

FB_CLAMP<13,17,41>

MDA59 MDA60 MDA61 MDA62 MDA63

+FB_PLLAVDD

TV1 PADTV1 PAD TV2 PADTV2 PAD

E18

FBA_D00

F18

FBA_D01

E16

FBA_D02

F17

FBA_D03

D20

FBA_D04

D21

FBA_D05

F20

FBA_D06

E21

FBA_D07

E15

FBA_D08

D15

FBA_D09

F15

FBA_D10

F13

FBA_D11

C13

FBA_D12

B13

FBA_D13

E13

FBA_D14

D13

FBA_D15

B15

FBA_D16

C16

FBA_D17

A13

FBA_D18

A15

FBA_D19

B18

FBA_D20

A18

FBA_D21

A19

FBA_D22

C19

FBA_D23

B24

FBA_D24

C23

FBA_D25

A25

FBA_D26

A24

FBA_D27

A21

FBA_D28

B21

FBA_D29

C20

FBA_D30

C21

FBA_D31

R22

FBA_D32

R24

FBA_D33

T22

FBA_D34

R23

FBA_D35

N25

FBA_D36

N26

FBA_D37

N23

FBA_D38

N24

FBA_D39

V23

FBA_D40

V22

FBA_D41

T23

FBA_D42

U22

FBA_D43

Y24

FBA_D44

AA24

FBA_D45

Y22

FBA_D46

AA23

FBA_D47

AD27

FBA_D48

AB25

FBA_D49

AD26

FBA_D50

AC25

FBA_D51

AA27

FBA_D52

AA26

FBA_D53

W26

FBA_D54

Y25

FBA_D55

R26

FBA_D56

T25

FBA_D57

N27

FBA_D58

R27

FBA_D59

V26

FBA_D60

V27

FBA_D61

W27

FBA_D62

W25

FBA_D63

F16

FB_PLLAVDD_1

P22

FB_PLLAVDD_2

D23

FB_VREF_PROBE

H22

FB_DLLAVDD

F3

FB_CLAMP

F22

FBA_DEBUG0

J22

FBA_DEBUG1

N14P-GV2-S-A2_FCBGA595

N14PGV2R3@

Part 2 of 6

MEMORY

62mA 6

2mA

35mA

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_DQS_RN0 FBA_DQS_RN1

INTERFACE A

FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_CLK0_N

FBA_CLK1_N

FBA_WCK01

FBA_WCK01_N

FBA_WCK23

FBA_WCK23_N

FBA_WCK45

FBA_WCK45_N

FBA_WCK67

FBA_WCK67_N

FBA_CLK0

FBA_CLK1

C27 C26 E24 F24 D27 D26 F25 F26 F23 G22 G23 G24 F27 G25 G27 G26 M24 M23 K24 K23 M27 M26 M25 K26 K22 J23 J25 J24 K27 K25 J27 J26

D19 D14 C17 C22 P24 W24 AA25 U25

F19 C14 A16 A22 P25 W22 AB27 T27

E19 C15 B16 B22 R25 W23 AB26 T26

D24 D25

N22 M22

D18 C18 D17 D16 T24 U24 V24 V25

CMDA0 CMDA1 CMDA2 CMDA3 CMDA4 CMDA5 CMDA6 CMDA7 CMDA8 CMDA9 CMDA10 CMDA11 CMDA12 CMDA13 CMDA14 CMDA15 CMDA16 CMDA17 CMDA18 CMDA19 CMDA20 CMDA21 CMDA22 CMDA23 CMDA24 CMDA25 CMDA26 CMDA27 CMDA28 CMDA29 CMDA30

DQMA0 DQMA1 DQMA2 DQMA3 DQMA4 DQMA5 DQMA6 DQMA7

DQSA#0 DQSA#1 DQSA#2 DQSA#3 DQSA#4 DQSA#5 DQSA#6 DQSA#7

DQSA0 DQSA1 DQSA2 DQSA3 DQSA4 DQSA5 DQSA6 DQSA7

CMDA[30..0] <18,19,20,21>

CLKA0 <18,20> CLKA0# <18,20>

CLKA1 <19,21> CLKA1# <19,21>

DQMA[3..0] <18,20>

DQMA[7..4] <19,21>

DQSA#[3..0] <18,20>

DQSA#[7..4] <19,21>

DQSA[3..0] < 18,20>

DQSA[7..4] < 19,21>

MDA[15..0]<18,20>

MDA[31..16]<18,20>

MDA[47..32]<19,21>

MDA[63..48]<19,21>

1 1

30ohms (ESR=0.01)

+1.05VS_DGPU

LV3

OPT@LV3

OPT@

1 2

FBMA-L11-160808300LMA25T_2P

Place close to BGA

Near GPU Close to F16

Place close to the first T po int

+VRAM_1.5VS

109876

12345

+VRAM_1.5VS

109876

12345

+VRAM_1.5VS

DDR3

CMDA16 CMDA19 CMDA3 CMDA0 CMDA20

RV10 100_0402_5%

RV12 100_0402_5%

CMDA12 CMDA14 CMDA15 CMDA7

RPV4

RPV4 100_1206_10P8R_5%

100_1206_10P8R_5%

OPT@

CMDA11 CMDA4 CMDA5 CMDA6

CMDA22 CMDA9 CMDA21 CMDA24

RPV6

RPV6 100_1206_10P8R_5%

100_1206_10P8R_5%

OPT@

CMDA23 CMDA13 CMDA8 CMDA10

RPV8

18

CMDA26

27

CMDA25

36

CMDA27

45

CMDA28

100_0804_8P4R_5%

OPT@

12

OPT@

12

OPT@

Command Bit Default Pull-down

ODTx

CKEx

RST

CS* No Termination

1 2

RV36 10K_0402_5%OPT@RV36 10K_0402_5%OPT@

1 2

RV37 10K_0402_5%OPT@RV37 10K_0402_5%OPT@

1 2

RV38 10K_0402_5%OPT@RV38 10K_0402_5%OPT@

1 2

RV40 10K_0402_5%OPT@RV40 10K_0402_5%OPT@

1 2

RV15 10K_0402_5%OPT@RV15 10K_0402_5%OPT@

CMDA29

CMDA30

10k

109876

12345

109876

12345

1 8

CMDA28

2 7

CMDA27

3 6

CMDA25

4 5

CMDA26

RV11 100_0402_5%

RV13 100_0402_5%

RPV5

RPV5 100_1206_10P8R_5%

100_1206_10P8R_5%

OPT@

RPV7

RPV7 100_1206_10P8R_5%

100_1206_10P8R_5%

OPT@

RPV9

100_0804_8P4R_5%

OPT@

12

OPT@

12

OPT@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

N14x VRAM Interface

14 56Monday, March 11, 2013

1.0

CyberForum.ru

5

4

3

2

1

MULTI LEVEL STRAPS (for N14P-GV2)BINARY STRAPS (for N14M-GL)

ogical

RV21

4.99K_0402_1%

RV30

4.99K_0402_1%

L Strapping Bit3

FB[1]

PCI_DEVID[4]

USER[3]

3GIO_PADCFG[3]

PCI_DEVID[3]

SOR3_EXPOSED

RESERVED

0100100x1292

12

@

10K_0402_1%

RV22

STRAP4

12

N14PGV2@

RV31

45.3K_0402_1%

ROM_SIGPU

PD 45.3K

PD 34.8K

PD 30K

PD 20K

PD 10K

RV31

10K_0402_1%

N14MGL@

12

N14PGV2@

12

@

Sa

msung

Hynix

cron

Mi

Micron

Physical Strapping pin

ROM_SO

ROM_SCLK

ROM_SI

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

Power Rail

+3VS_DGPU

+3VS_DGPU 3GIO_PADCFG[0]3GIO_PADCFG[1]3GIO_PADCFG[2]

+3VS_DGPU

+3VS_DGPU SOR0_EXPOSEDSOR2_EXPOSED SOR1_EXPOSED

+3VS_DGPU DP_PLL_VDD33V

SKU Device ID biit5 to bit0

N14P-GV2

RV18

RV27

45.3K_0402_1%

4.99K_0402_1%

N14M-GL

12

@

RV19

12

N14PGV2@

RV28

10K_0402_1%

45.3K_0402_1%

0x1140 000000

+3VS_DGPU

12

@

10K_0402_1%

RV20

12

N14PGV2@

RV29

15K_0402_1%

12

@

12

FB Memory gDDR3

900MHz

K4W2G1646E-BC11

K4W2G1646E-BC1A

1GHz

900MHz

H5TQ2G63DFR-11C

H5TQ2G63DFR-N0C

1GHz

MT41K128M16JT-107G

900MHz

K4W4G1646B-HC11Samsung

900MHz

MT41K256M16HA-107G

900MHz

Strap Pin Strap Mapping

UV1C

AC3

IFPA_TXC

AC4

IFPA_TXC_N

Y4

IFPA_TXD0

Y3

IFPA_TXD0_N

AA3

D D

C C

B B

A A

IFPA_TXD1

AA2

IFPA_TXD1_N

AB1

IFPA_TXD2

AA1

IFPA_TXD2_N

AA4

IFPA_TXD3

AA5

IFPA_TXD3_N

AB5

IFPB_TXC

AB4

IFPB_TXC_N

AB3

IFPB_TXD4

AB2

IFPB_TXD4_N

AD3

IFPB_TXD5

AD2

IFPB_TXD5_N

AE1

IFPB_TXD6

AD1

IFPB_TXD6_N

AD4

IFPB_TXD7

AD5

IFPB_TXD7_N

T2

IFPC_L0

T3

IFPC_L0_N

T1

IFPC_L1

R1

IFPC_L1_N

R2

IFPC_L2

R3

IFPC_L2_N

N2

IFPC_L3

N3

IFPC_L3_N

V3

IFPD_L0

V4

IFPD_L0_N

U3

IFPD_L1

U4

IFPD_L1_N

T4

IFPD_L2

T5

IFPD_L2_N

R4

IFPD_L3

R5

IFPD_L3_N

N1

NC

M1

NC

M2

NC

M3

NC

K2

NC

K3

NC

K1

NC

J1

NC

M4

NC

M5

NC

L3

NC

L4

NC

K4

NC

K5

NC

J4

NC

J5

NC

N4

IFPC_AUX_I2CW_SCL

N5

IFPC_AUX_I2CW_SDA_N

P3

IFPD_AUX_I2CX_SCL

P4

IFPD_AUX_I2CX_SDA_N

J2

IFPE_AUX_I2CY_SCL

J3

IFPE_AUX_I2CY_SDA_N

H3

IFPF_AUX_I2CZ_SCL

H4

IFPF_AUX_I2CZ_SDA_N

N14P-GV2-S-A2_FCBGA595

N14PGV2R3@

Part 3 of 6

NC

GENERAL

MULTI_STRAP_REF0_GND

LVDS/TMDS

VDD_SENSE

GND_SENSE

TEST

JTAG_TRST_N

SERIAL

BUFRST_N

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

THERMDP

THERMDN

TESTMODE

JTAG_TCK

JTAG_TDI JTAG_TDO JTAG_TMS

ROM_CS_N

ROM_SI

ROM_SO

ROM_SCLK

F11

NC

AD10

NC

AD7

NC

B19

NC

V5

NC

V6

NC

G1

NC

G2

NC

G3

NC

G4

NC

G5

NC

G6

NC

G7

NC

V1

NC

V2

NC

W1

NC

W2

NC

W3

NC

W4

NC

D11

RV16 10K_0402_5%

D10

NC

E9

NC

E10

NC

F10

NC

D1

STRAP0

D2

STRAP1

E4

STRAP2

E3

STRAP3

D3

STRAP4

C1

NC

F6

MULTI_STRAP_REF0_GND

F4

NC

F5

NC

F12

E12

F2

VGA_VCC_SENSE

F1

VGA_VSS_SENSE

AD9 AE5

JTAG_TCK

AE6

JTAG_TDI

AF6

JTAG_TDO

AD6

JTAG_TMS

AG4

D12 B12

ROM_SI

A12

ROM_SO

C12

ROM_SCLK

OPT@

1 2

trace width: 16mils differential voltage sensing. differential signal routing.

PAD

PAD PAD

PAD

ROM_SCLK

ROM_SI

ROM_SO

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

N14PGV2@

1 2

RV17 40.2K_0402_1%

+VGA_CORE

RV26

RV26 100_0402_1%

100_0402_1%

OPT@

1 2

OPT@

12

RV35

100_0402_1%

TV3

TV3 TV4

TV4 TV5

TV5 TV6

TV6

TESTMODE <13>

JTAG_TRST <13>

SMB_ALT_ADDR

SUB_VENDOR

VGA_DEVICE

RAMCFG[0]

RAMCFG[1]

RAMCFG[2]

RAMCFG[3]

PCIE_MAX_SPEED

VGA_VCC_SENSE <54>

VGA_VSS_SENSE <54>

PD 10k

PU 10k if VBIOS ROM exists PD 10k if no VB IOS ROM

PD 10k (no display)

Refer to RVL

PD 10k

MULTI LEVEL STRAPS

STRAP0 STRAP1 STRAP3 STRAP2

1 2 8 M

x 1 6

N14P-GV2

2 5 6 M

x 1 6

Logical Strapping Bit2

FB[0]

SUB_VENDOR

PCIE_SPEED_CHANGE_GEN3

For X76 (N14P-GV2)For X76 (N14M-GL)

1 2 8 M

x 1 6

N14M-GL

2 5 6 M

x 1 6

Logical Strapping Bit1

SMB_ALT_ADDR

PCI_DEVID[5]

RAMCFG[1]RAMCFG[3] RAMCFG[2]

PCIE_MAX_SPEED

ROM_SI ROM_SO ROM_SCLK

Pull-up to +3VS

DGPU

_

1000

1001

1010

1011

1100

1101

1110

1111

12

@

RV23

4.99K_0402_1%

12

N14MGL@

RV32

10K_0402_1%

Resistor Values

5K

10K

15K

20K

25K

30K

35K

45K

FB Memory gDDR3

Sa

msung

Hynix

Micron

msung K4W4G1646B-HC11

Sa

Micron

1GHz

900MHz

K4W2G1646E-BC11900MHz

K4W2G1646E-BC1A

H5TQ2G63DFR-11C900MHz

H5TQ2G63DFR-N0C

MT41K128M16JT-107G

MT41K256M16HA-107G

Logical Strapping Bit0

VGA_DEVICE

PEX_PLLEN_TERM

RAMCFG[0]

USER[0]USER[1]USER[2]

PCI_DEVID[0]PCI_DEVID[1]PCI_DEVID[2]

Pull-down to Gnd

+3VS_DGPU

12

N14PGV2@

RV24

4.99K_0402_1%

12

N14MGL@

RV33

10K_0402_1%

0000

0001

0010

0011

0100

0101

0110

0111

12

N14PGV2@

RV25

4.99K_0402_1%

12

N14MGL@

RV34

10K_0402_1%

STRAP[3:0]GPU

0101

0110

01

00

1011

1101

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

VGA_N14x LVDS&TMDS

15 56Monday, March 11, 2013

1

15 56Monday, March 11, 2013

1.0

of

CyberForum.ru

5

4

3

2

1

Under GPU

+VRAM_1.5VS

D D

C C

B B

Un

der GPU

1

CV24

CV32

2

OPT@ CV24

OPT@

OPT@ CV32

OPT@

4.7U_0603_6.3V6K

1

CV43

2

OPT@ CV43

OPT@

22U_0805_6.3V6M

4.7U_0603_6.3V6K

Ne

CV44

OPT@ CV44

OPT@

1

2

ar GPU

10U_0603_6.3V6M

1

CV34

CV33

2

OPT@ CV34

OPT@

OPT@ CV33

OPT@

1U_0402_6.3V6K

1

CV35

CV25

2

OPT@ CV35

OPT@

OPT@ CV25

OPT@

1U_0402_6.3V6K

0.1U_0402_10V7K

UV1D

3500 mA 2

B26

FBVDDQ_01

C25

FBVDDQ_02

E23

FBVDDQ_03

E26

FBVDDQ_04

F14

FBVDDQ_05

F21

FBVDDQ_06

G13

FBVDDQ_07

G14

FBVDDQ_08

G15

FBVDDQ_09

G16

FBVDDQ_10

G18

FBVDDQ_11

G19

FBVDDQ_12

G20

FBVDDQ_13

G21

FBVDDQ_14

H24

FBVDDQ_15

H26

FBVDDQ_16

J21

FBVDDQ_17

K21

FBVDDQ_18

L22

FBVDDQ_19

L24

FBVDDQ_20

L26

FBVDDQ_21

M21

FBVDDQ_22

N21

FBVDDQ_23

R21

FBVDDQ_24

T21

FBVDDQ_25

V21

FBVDDQ_26

W21

FBVDDQ_27

V7

IFPAB_PLLVDD_1

W7

IFPAB_PLLVDD_2

AA6

IFPAB_RSET

W6

IFPA_IOVDD

Y6

IFPB_IOVDD

M7

IFPC_PLLVDD_1

N7

IFPC_PLLVDD_2

T6

IFPC_RSET

P6

IFPC_IOVDD

T7

IFPD_PLLVDD_2

R7

IFPD_PLLVDD_1

U6

IFPD_RSET

R6

IFPD_IOVDD

J7

NC

K7

NC

K6

NC

H6

NC

J6

NC

N14P-GV2-S-A2_FCBGA595

N14PGV2R3@

Part 4 of 6

FB_CAL_TERM_GND

000 mA

PEX_IOVDDQ_1 PEX_IOVDDQ_2 PEX_IOVDDQ_3 PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8

PEX_IOVDDQ_9 PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13 PEX_IOVDDQ_14

PEX_IOVDD_1 PEX_IOVDD_2 PEX_IOVDD_3 PEX_IOVDD_4 PEX_IOVDD_5 PEX_IOVDD_6

VDD33_1 VDD33_2 VDD33_3 VDD33_4

POWER

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

PEX_PLL_HVDD_1 PEX_PLL_HVDD_2

PEX_SVDD_3V3

120mA

PEX_PLLVDD_1

PEX_PLLVDD_2

AA10 AA12 AA13 AA16 AA18 AA19 AA20 AA21 AB22 AC23 AD24 AE25 AF26 AF27

AA22 AB23 AC24 AD25 AE26 AE27

G10 G12 G8 G9

D22

+FB_CAL_PD_VDDQ

C24

FB_CAL_PU_GND

B25

FB_CAL_TERM_GND

AA8 AA9

AB8

AA14 AA15

Under GPU

Near Ball

1

CV54

2

OPT@ CV54

OPT@

1 2

1

2

0.1U_0402_10V7K

Near GPU

OPT@

CV55

OPT@ CV55

OPT@

1U_0402_6.3V6K

1

2

1

2

CV26

OPT@ CV26

OPT@

1U_0402_6.3V6K

CV36

OPT@ CV36

OPT@

1U_0402_6.3V6K

RV3940.2_0402_1%

12

RV4142.2_0402_1%

12

RV4251.1_0402_1%

1

CV56

2

OPT@ CV56

OPT@

Near GPU

1

CV23

2

OPT@ CV23

OPT@

1U_0402_6.3V6K

1

CV37

2

OPT@ CV37

OPT@

1U_0402_6.3V6K

+VRAM_1.5VS

+PEX_PLLVDD

4.7U_0603_6.3V6K

midway between GPU and Power suppl y

1

CV28

CV27

2

OPT@ CV28

OPT@

OPT@ CV27

OPT@

4.7U_0603_6.3V6K

1

CV38

CV39

2

OPT@ CV39

OPT@

OPT@ CV38

OPT@

4.7U_0603_6.3V6K

Under GPU

1

CV46

CV45

2

OPT@ CV46

OPT@

OPT@ CV45

OPT@

0.1U_0402_10V7K

LV4

N14MGL@

RV1

0_0603_5%

N14PGV2@

12

BLM18PG121SN1D_0603

1

CV29

2

OPT@ CV29

OPT@

10U_0603_6.3V6M

1

CV40

2

OPT@ CV40

OPT@

10U_0603_6.3V6M

1

CV47

2

OPT@ CV47

OPT@

0.1U_0402_10V7K

+1.05VS_DGPU

10U_0603_6.3V6M

Near GPU

0.1U_0402_10V7K

1

CV30

2

OPT@ CV30

OPT@

22U_0805_6.3V6M

1

CV41

2

OPT@ CV41

OPT@

22U_0805_6.3V6M

1

CV48

2

OPT@ CV48

OPT@

1U_0402_6.3V6K

Under GPU C

lose to AH12/AG 12

+1.05VS_DGPU

CV31

OPT@ CV31

OPT@

22U_0805_6.3V6M

+1.05VS_DGPU

CV42

OPT@ CV42

OPT@

22U_0805_6.3V6M

+3VS_DGPU

CV49

OPT@ CV49

OPT@

4.7U_0603_6.3V6K

1

2

Near GPU

1

CV50

CV51

2

OPT@ CV50

OPT@

OPT@ CV51

OPT@

0.1U_0402_10V7K

+3VS_DGPU

1

CV52

CV53

2

OPT@ CV52

OPT@

OPT@ CV53

OPT@

4.7U_0603_6.3V6K

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

VGA_N14x POWER

1

1.0

of

16 56Monday, March 11, 2013

CyberForum.ru

5

4

3

2

1

+1.05VS_VCCP to +1.05VS_DGPU

+5VALW

12

RV43

RV43 270K_0402_5%

270K_0402_5%

OPT@

61

2N7002DW-T/R7_SOT363-6

0.01U_0402_25V7K

VGA_PWROK

OPT@

QV4A

2

VGA_PWROK#

QV5A

2

G

OPT@

AO3416_SOT23-3

+1.05VS_DGPU

+1.05VS_VCCP

Vgs=4.5V,Id=6.5 A,Rds<22mohm

QV3

OPT@

QV3

OPT@

13

D

2

G

S

CV57

OPT@

1

2

+1.5V to +VRAM_1.5VS

CV59

OPT@

+1.5V

QV6

OPT@QV6

OPT@

8

D

7

D

6

D

5

D

FDS6676AS_SO8

1

CV60

OPT@

2

4.7U_0603_6.3V6K

+VRAM_1.5VS

Vgs=10V,Id=14.5 A,Rds=6mohm

1

S

2

S

3

S

4

G

VRAM_1.5VS_GATE

1

12

RV48

RV48 820K_0402_5%OPT@

0.01U_0402_25V7K

820K_0402_5%OPT@

2N7002DW-T/R7_SOT363-6

2

1.5V_PWR_EN

OPT@

RV47

1 2

180K_0402_5%

61

QV7A

2

OPT@

QV5B

5

G

OPT@

B+

1.5V_PWR_EN#

34

D

2N7002KDWH_SOT363-6

S

2N7002DW-T/R7_SOT363-6

1 2

OPT@

61

D

2N7002KDWH_SOT363-6

S

RV46

RV46 470_0805_5%

470_0805_5%

OPT@

1 2

3

QV7B

5

2N7002DW-T/R7_SOT363-6

OPT@

4

1 2

RV49100K_0402_5%

OPT@

+1.05VS_DGPU

RV44

22_0805_5%OPT@

1 2

3

OPT@

QV4B

5

4

RV45100K_0402_5%

+5VALW

V18 V16 V14 V12 V10 U17 U15 U13 U11 T18 T16 T14 T12 T10 R17 R15 R13 R11 P18 P16 P14

+3VS

5

UV2

B

Vcc

Y

A

G

NC7SZ32P5X_SC70-5

3

+VGA_CORE+VGA_CORE

N14PGV2@UV2

N14PGV2@

4

1.5V_PWR_EN

UV1F

K10

VDD_001

K12

VDD_002

K14

VDD_003

K16

VDD_004

K18

VDD_005

L11

VDD_006

L13

VDD_007

L15

VDD_008

L17

VDD_009

M10

VDD_010

M12

VDD_011

M14

VDD_012

M16

VDD_013

M18

VDD_014

N11

VDD_015

N13

VDD_016

N15

VDD_017

N17

VDD_018

P10

VDD_019

P12

VDD_020

N14P-GV2-S-A2_FCBGA595

N14PGV2R3@

FB_CLAMP<13,14,41>

UV1F

Part 6 of 6

POWER

VDD_041

VDD_040

VDD_039

VDD_038

VDD_037

VDD_036

VDD_035

VDD_034

VDD_033

VDD_032

VDD_031

VDD_030

VDD_029

VDD_028

VDD_027

VDD_026

VDD_025

VDD_024

VDD_023

VDD_022

VDD_021

2

1

1 2

RV50 0_0402_5%

N14MGL@

UV1E

A2

A26 AB11 AB14 AB17 AB20

D D

C C

B B

AB24

AC2 AC22 AC26

AC5

AC8 AD12 AD13 AD15 AD16 AD18 AD19 AD21 AD22 AE11 AE14 AE17 AE20

AF1 AF11 AF14 AF17 AF20 AF23

AF5

AF8

AG2 AG26

B1 B11 B14 B17 B20 B23 B27

B5

B8 E11 E14 E17

E2 E20 E22 E25

E5

E8

H2 H23 H25

H5

N14P-GV2-S-A2_FCBGA595

N14PGV2R3@

GND_001 GND_002 GND_003 GND_004 GND_005 GND_006 GND_007 GND_008 GND_009 GND_010 GND_011 GND_012 GND_013 GND_014 GND_015 GND_016 GND_017 GND_018 GND_019 GND_020 GND_021 GND_022 GND_023 GND_024 GND_025 GND_026 GND_027 GND_028 GND_029 GND_030 GND_031 GND_032 GND_033 GND_034 GND_035 GND_036 GND_037 GND_038 GND_039 GND_040 GND_041 GND_042 GND_043 GND_044 GND_045 GND_046 GND_047 GND_048 GND_049 GND_050 GND_051 GND_052 GND_053 GND_054 GND_055 GND_056

Part 5 of 6

GND

GND_057 GND_058 GND_059 GND_060 GND_061 GND_062 GND_063 GND_064 GND_065 GND_066 GND_067 GND_068 GND_069 GND_070 GND_071 GND_072 GND_073 GND_074 GND_075 GND_076 GND_077 GND_078 GND_079 GND_080 GND_081 GND_082 GND_083 GND_084 GND_085 GND_086 GND_087 GND_088 GND_089 GND_090 GND_091 GND_092 GND_093 GND_094 GND_095 GND_096 GND_097 GND_098 GND_099 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112

GND GND

K11 K13 K15 K17 L10 L12 L14 L16 L18 L2 L23 L25 L5 M11 M13 M15 M17 N10 N12 N14 N16 N18 P11 P13 P15 P17 P2 P23 P26 P5 R10 R12 R14 R16 R18 T11 T13 T15 T17 U10 U12 U14 U16 U18 U2 U23 U26 U5 V11 V13 V15 V17 Y2 Y23 Y26 Y5

AA7 AB7

For GC6

VGA_PWROK<30,54>

+3VS to +3VS_DGPU

+VGA_CORE

RV52

RV51

470_0805_5%

OPT@

1 2 3

QV9B

5

2N7002DW-T/R7_SOT363-6

A A

5

4

OPT@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

DGPU_PWR_EN#

4

3

RV52

470_0805_5%

OPT@

1 2 3

QV2B

5

2N7002DW-T/R7_SOT363-6

OPT@

4

Compal Secret Data

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

DGPU_PWR_EN<29>

2

DGPU_PWR_EN#

+3VS+3VS_DGPU

RV53

RV53 10K_0402_5%OPT@

10K_0402_5%OPT@

1 2

RV54

1 2

33K_0402_5%

61

OPT@

QV9A

2N7002DW-T/R7_SOT363-6

OPT@

2

OPT@

Title

Size Document Number Rev

Custom

Date: Sheet of

2

CV61

0.1U_0402_10V7K

OPT@

1

AO3413_SOT23

2

CV62

OPT@

0.01U_0402_25V7K

1

Compal Electronics, Inc.

VGA_N14x POWER & GND

+3VS

Vgs=-4.5V,Id=3A ,Rds<97mohm

S

QV11

G

2

OPT@

D

1 3

+3VS_DGPU

17 56Monday, March 11, 2013

1

17 56Monday, March 11, 2013

1.0

CyberForum.ru

5

RANK 0 [31...0]

VRAM DDR3 Chips

+VRAM_1.5VS

12

+VRAM_1.5VS

12

DQSA[3..0]

DQSA#[3..0]

DQMA[3..0]

MDA[31..0]

CMDA[30..0]

+MEM_VREF_CA0

1

CV63

0.01U_0402_25V7K

OPT@

2

+MEM_VREF_DQ0

1

CV64

0.01U_0402_25V7K

OPT@

2

+MEM_VREF_CA0

+MEM_VREF_DQ0

243_0402_1%

DQSA[3..0]<14,20>

D D

DQSA#[3..0]<14,20>

DQMA[3..0]<14,20>

MDA[31..0]<14,20>

CMDA[30..0]

RV55

1K_0402_1%

OPT@

RV56

1K_0402_1%

OPT@

C C

RV57

1K_0402_1%

OPT@

RV58

1K_0402_1%

OPT@

B B

4

UV3

@

UV3

@

+MEM_VREF_CA0 +MEM_VREF_DQ0

OPT@

RV60

M8

VREFCA

H1

VREFDQ

N3

CMDA7 CMDA10 CMDA24 CMDA6 CMDA22 CMDA26 CMDA5 CMDA21 CMDA8 CMDA4 CMDA25 CMDA23 CMDA9 CMDA12 CMDA14

CMDA29 CMDA13 CMDA27

CLKA0 CLKA0 CLKA0# CMDA3

CMDA0 CMDA2 CMDA11 CMDA15 CMDA28

DQSA1 DQSA2

DQMA1 DQMA2

DQSA#1 DQSA#2

CMDA20

12

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA9 MDA12 MDA8 MDA15 MDA13 MDA11 MDA10 MDA14

MDA18 MDA22 MDA16 MDA23 MDA17 MDA20 MDA19 MDA21

+VRAM_1.5VS

3

Group1

Group2

OPT@

RV61

243_0402_1%

+MEM_VREF_CA0 +MEM_VREF_DQ0

CMDA7 CMDA10 CMDA24 CMDA6 CMDA22 CMDA26 CMDA5 CMDA21 CMDA8 CMDA4 CMDA25 CMDA23 CMDA9 CMDA12 CMDA14

CMDA29 CMDA13 CMDA27

CLKA0# CMDA3

CMDA0 CMDA2 CMDA11 CMDA15 CMDA28

DQSA0 DQSA3

DQMA0 DQMA3

DQSA#0 DQSA#3

CMDA20

ZQ1ZQ0

12

UV4

@

UV4

M8 H1

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

J1

L1

J9

L9

@

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

3

10mA

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA6 MDA1 MDA5 MDA0 MDA4 MDA2 MDA7 MDA3

MDA30 MDA26 MDA29 MDA24 MDA28 MDA27 MDA31 MDA25

+VRAM_1.5VS

2

Mode E Address

CMD0

Rank 0 Rank 1

0..31

ODT

CMD1

Group0

Group3

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CS0#

CKE

A9

A6

A3

A0

A8

A12

A1

RAS#

A13

BA1

A14

CAS#

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21 A7

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

RST

A7

A4

A11

A2

A10

A5

BA2

WE#

BA0

CMD30

1

32..63

0..31 32..63

ODT

CS1#

CKE

A11

A6

A3

A0

A8

A12 A0

A1

A7 A7

BA1 BA1

A12 A12

A8 A8

A0

A2 A2

RAS# RAS# RAS#

A13

A14

A3

A14

CAS#

A13 A13

CAS# CAS#

ODT

CS0#

CKE

RST RST RST

A6

A4

A11

A2

A10

A5

A5 A5

A9 A9

A1 A1

WE# WE#

A4 A4

BA2

WE#

BA0

A10 A10

BA0 BA0

BA2

A11A9

A14

A3BA1

ODT

CS1#

CKE

A6

BA2

Place close to the first T po int

CLKA0<14,20>

CLKA0#<14,20>

12

OPT@

RV63

RV63 160_0402_1%

160_0402_1%

P

lace close to R ANK0 VRAM

+VRAM_1.5VS +VRAM_1.5VS

1

CV67

2

OPT@ CV67

OPT@

1U_0402_6.3V6K

A A

5

4

1

CV69

CV68

2

OPT@ CV69

OPT@

OPT@ CV68

OPT@

1U_0402_6.3V6K

1

CV70

CV71

2

OPT@ CV70

OPT@

OPT@ CV71

OPT@

1U_0402_6.3V6K

1

CV72

CV73

2

OPT@ CV72

OPT@

OPT@ CV73

OPT@

0.1U_0402_10V7K

1

CV74

OPT@ CV74

OPT@

0.1U_0402_10V7K

CV76

CV75

2

OPT@ CV76

OPT@

OPT@ CV75

OPT@

0.1U_0402_10V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

1

2

2012/12/07 2013/12/07

1

CV78

CV77

2

OPT@ CV78

OPT@

OPT@ CV77

OPT@

1U_0402_6.3V6K

Compal Secret Data

1

2

1

CV79

CV80

2

OPT@ CV79

OPT@

OPT@ CV80

OPT@

1U_0402_6.3V6K

Deciphered Date

1

CV81

CV82

2

OPT@ CV81

OPT@

OPT@ CV82

OPT@

0.1U_0402_10V7K

1U_0402_6.3V6K

2

1

CV83

2

OPT@ CV83

OPT@

0.1U_0402_10V7K

1

CV85

CV84

2

OPT@ CV85

OPT@

OPT@ CV84

OPT@

0.1U_0402_10V7K

+VRAM_1.5VS

1

CV86

OPT@ CV86

OPT@

0.1U_0402_10V7K

Title

Size Document Number Rev

Custom

Date: Sheet of

CV87

2

OPT@ CV87

OPT@

22U_0805_6.3V6M

Compal Electronics, Inc.

VGA_N14x VRAM RANK 0L

18 56Monday, March 11, 2013

1

18 56Monday, March 11, 2013

1.0

CyberForum.ru

5

RANK 0 [63...32]

VRAM DDR3 Chips

12

+MEM_VREF_CA1

12

+MEM_VREF_DQ1

12

DQSA[7..4]

DQSA#[7..4]

DQMA[7..4]

MDA[63..32]

CMDA[30..0]

1

CV65

0.01U_0402_25V7K

OPT@

2

1

CV66

0.01U_0402_25V7K

OPT@

2

+MEM_VREF_CA1

+MEM_VREF_DQ1

243_0402_1%

DQSA[7..4]<14,21>

D D

C C

B B

DQSA#[7..4]<14,21>

DQMA[7..4]<14,21>

MDA[63..32]<14,21>

CMDA[30..0]<14,18,20,21>

RV59

1K_0402_1%

OPT@

RV62

1K_0402_1%

OPT@

RV64

1K_0402_1%

OPT@

RV65

1K_0402_1%

OPT@

+VRAM_1.5VS

OPT@

RV71

CMDA7 CMDA10 CMDA24 CMDA6 CMDA22 CMDA26 CMDA5 CMDA21 CMDA8 CMDA4 CMDA25 CMDA23 CMDA9 CMDA12 CMDA14

CMDA29 CMDA13 CMDA27

CLKA1 CLKA1# CMDA19

CMDA16 CMDA18 CMDA11 CMDA15 CMDA28

DQSA4 DQSA7

DQMA4 DQMA7

DQSA#4 DQSA#7

CMDA20

12

4

M8

H1

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7

M7

M2

N8

M3

J7 K7 K9

K1 L2

J3 K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

ZQ2

J1 L1

J9 L9

3

UV5

@

UV5

@

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

310mA 310mA

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA35 MDA37 MDA32 MDA36 MDA33 MDA38 MDA34 MDA39

MDA58 MDA62 MDA56 MDA63 MDA57 MDA61 MDA59 MDA60

+VRAM_1.5VS

Group4

+MEM_VREF_CA1 +MEM_VREF_DQ1

CMDA7 CMDA10 CMDA24 CMDA6 CMDA22 CMDA26 CMDA5 CMDA21 CMDA8 CMDA4 CMDA25 CMDA23 CMDA9 CMDA12 CMDA14

CMDA29 CMDA13 CMDA27

CLKA1 CLKA1# CMDA19

CMDA16 CMDA18 CMDA11 CMDA15 CMDA28

DQSA5 DQSA6

DQMA5 DQMA6

DQSA#5 DQSA#6

CMDA20

OPT@

RV72

243_0402_1%

M8 H1

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

ZQ3

12

J1

L1

J9

L9

UV6

@

UV6

@

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

K4B1G1646E-HC12_FBGA96

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA45+MEM_VREF_CA1 MDA41 MDA46 MDA40 MDA44 MDA43 MDA47 MDA42

MDA54 MDA50 MDA55 MDA48 MDA53 MDA51 MDA52 MDA49

+VRAM_1.5VS

2

Mode E Address

CMD0

Rank 0 Rank 1

0..31

ODT

CMD1

Group5

Group6Group7

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CS0#

CKE

A9

A6

A3

A0

A8

A12

A1

RAS#

A13

BA1

A14

CAS#

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21 A7

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

RST

A7

A4

A11

A2

A10

A5

BA2

WE#

BA0

CMD30

1

32..63

0..31 32..63

ODT

CS1#

CKE

A11

A6

A3

A0

A8

A12 A0

A1

A7 A7

BA1 BA1

A12 A12

A8 A8

A0

A2 A2

RAS# RAS# RAS#

A13

A14

A3

A14

CAS#

A13 A13

CAS# CAS#

ODT

CS0#

CKE

RST RST RST

A6

A4

A11

A2

A10

A5

A5 A5

A9 A9

A1 A1

WE# WE#

A4 A4

BA2

WE#

BA0

A10 A10

BA0 BA0

BA2

A11A9

A14

A3BA1

ODT

CS1#

CKE

A6

BA2

Place close to the first T po int

CLKA1<14,21>

CLKA1#<14,21>

12

OPT@

RV74

RV74 160_0402_1%

160_0402_1%

P

lace close to R ANK1 VRAM

+VRAM_1.5VS +VRAM_1.5VS +VRAM_1.5VS

1

2

A A

5

1

CV92

CV93

2

OPT@ CV92

OPT@

OPT@ CV93

OPT@

1U_0402_6.3V6K

4

1

CV94

2

OPT@ CV94

OPT@

1U_0402_6.3V6K

1

CV96

CV95

2

OPT@ CV96

OPT@

OPT@ CV95

OPT@

1U_0402_6.3V6K

1

CV97

2

OPT@ CV97

OPT@

0.1U_0402_10V7K

1

CV99

CV98

OPT@ CV98

OPT@

0.1U_0402_10V7K

CV100

2

OPT@ CV99

OPT@

0.1U_0402_10V7K

CV101

2

OPT@ CV100

OPT@

OPT@ CV101

OPT@

0.1U_0402_10V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

1

CV102

2

OPT@ CV102

OPT@

1U_0402_6.3V6K

Compal Secret Data

2012/12/07 2013/12/07

Compal Secret Data

1

CV103

2

OPT@ CV103

OPT@

1U_0402_6.3V6K

1

CV104

2

OPT@ CV104

OPT@

1U_0402_6.3V6K

Deciphered Date

1

CV105

2

OPT@ CV105

OPT@

1U_0402_6.3V6K

1

CV107

CV106

OPT@ CV106

OPT@

1U_0402_6.3V6K

CV108

2

OPT@ CV107

OPT@

OPT@ CV108

OPT@

0.1U_0402_10V7K

2

1

2

0.1U_0402_10V7K

1

CV110

CV109

OPT@ CV109

OPT@

0.1U_0402_10V7K

CV111

2

OPT@ CV110

OPT@

OPT@ CV111

OPT@

0.1U_0402_10V7K

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

1

CV112

2

22U_0805_6.3V6M

DRANK@ CV112

DRANK@

Compal Electronics, Inc.

VGA_N14x VRAM RANK 0H

of

19 56Monday, March 11, 2013

1

19 56Monday, March 11, 2013

1.0

CyberForum.ru

5

ANK 1 [31...0]

R

VRAM DDR3 Chips

DQSA[3..0]<14,18>

D D

DQSA#[3..0]<14,18>

DQMA[3..0]<14,18>

MDA[31..0]<14,18>

CMDA[30..0]

C C

B B

DQSA[3..0]

DQSA#[3..0]

DQMA[3..0]

MDA[31..0]

CMDA[30..0]

+MEM_VREF_CA0 +MEM_VREF_DQ0

CLKA0<14,18> CLKA0#<14,18>

243_0402_1%

DRANK@

0.01U_0402_25V7K

12

CV88

CMDA9 CMDA24 CMDA10 CMDA13 CMDA26 CMDA22 CMDA21 CMDA5 CMDA8 CMDA23 CMDA28 CMDA4 CMDA7 CMDA14 CMDA12

CMDA29 CMDA6 CMDA30

CMDA3

CMDA0 CMDA1 CMDA11 CMDA15 CMDA25

DQSA1 DQSA2

DQMA1 DQMA2

DQSA#1 DQSA#2

ZQ4

12

RV77

4

UV7

@

UV7

@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA 310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA12 MDA9 MDA15 MDA8 MDA14 MDA10 MDA11 MDA13

MDA22 MDA18 MDA23 MDA16 MDA21 MDA19 MDA20 MDA17

+VRAM_1.5VS

Group1

Group2

+MEM_VREF_CA0 +MEM_VREF_DQ0

3

CV89

0.01U_0402_25V7K

DRANK@

1

2

243_0402_1%

RV78

DRANK@

CMDA9 CMDA24 CMDA10 CMDA13 CMDA26 CMDA22 CMDA21 CMDA5 CMDA8 CMDA23 CMDA28 CMDA4 CMDA7 CMDA14 CMDA12

CMDA29 CMDA6 CMDA30

CLKA0 CLKA0# CMDA3

CMDA0 CMDA1 CMDA11 CMDA15 CMDA25

DQSA0 DQSA3

DQMA0 DQMA3

DQSA#0 DQSA#3

CMDA20CMDA20

12

UV8

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ5

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4B1G1646E-HC12_FBGA96

@

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

2

MDA1 MDA6 MDA0 MDA5 MDA3 MDA7 MDA2 MDA4

MDA26 MDA30 MDA24 MDA29 MDA25 MDA31 MDA27 MDA28

+VRAM_1.5VS

Group0

Group3

Mode E Address

CMD0

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

0..31

ODT

CS0#

CKE

A9

A6

A3

A0

A8

A12

A1

RAS#

A13

BA1

A14

CAS#

RST

A7

A4

A11

A2

A10

A5

BA2

WE#

BA0

1

Rank 0

32..63

A9

A6

A3

A0

A8

A1

A13

BA1 A3

A14

CAS#

ODT

CS0#

CKE

RST

A7CMD21

A4

A11

A2

A10

A5

BA2

WE#

BA0

ODT

CS1#

CKE

A11

BA1

A8

A0

RAS#RAS#

A14

A3

A6

A5

A1

A4

BA0

BA2

Rank 1

32..630..31

A11

A7A7

BA1

A12A12

A8

A0A12

A2A2

RAS#

A14

A13A13

CAS#CAS#

ODT

CS1#

CKE

RSTRST

A6

A5

A9A9

A1

WE#WE#

A4

A10A10

BA0

BA2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VGA_N14x VRAM RANK 1L

20 56Monday, March 11, 2013

1

20 56Monday, March 11, 2013

1.0

CyberForum.ru

5

RANK 1[63...32]

VRAM DDR3 Chips

DQSA[7..4]<14,19>

DQSA#[7..4]<14,19>

D D

DQMA[7..4]<14,19>

MDA[63..32]<14,19>

CMDA[30..0]

C C

B B

DQSA[7..4]

DQSA#[7..4]

DQMA[7..4]

MDA[63..32]

CMDA[30..0]

+MEM_VREF_CA1 +MEM_VREF_DQ1

CLKA1<14,19> CLKA1#<14,19>

RV79

243_0402_1%

DRANK@

0.01U_0402_25V7K

12

CV90

CMDA9 CMDA24 CMDA10 CMDA13 CMDA26 CMDA22 CMDA21 CMDA5 CMDA8 CMDA23 CMDA28 CMDA4 CMDA7 CMDA14 CMDA12

CMDA29 CMDA6 CMDA30

CMDA19

CMDA16 CMDA17 CMDA11 CMDA15 CMDA25

DQSA4 DQSA7

DQMA4 DQMA7

DQSA#4 DQSA#7

CMDA20

ZQ6 ZQ7

12

4

UV9

@

UV9

@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA37 MDA35 MDA36 MDA32 MDA39 MDA34 MDA38 MDA33

MDA62 MDA58 MDA63 MDA56 MDA60 MDA59 MDA61 MDA57

+VRAM_1.5VS

Group7

+MEM_VREF_CA1 +MEM_VREF_DQ1

0.01U_0402_25V7K

3

CV91

DRANK@

1

2

RV80

243_0402_1%

DRANK@

CMDA9 CMDA24 CMDA10 CMDA13 CMDA26 CMDA22 CMDA21 CMDA5 CMDA8 CMDA23 CMDA28 CMDA4 CMDA7 CMDA14 CMDA12

CMDA29 CMDA6 CMDA30

CLKA1 CLKA1# CMDA19

CMDA16 CMDA17 CMDA11 CMDA15 CMDA25

DQSA5 DQSA6

DQMA5 DQMA6

DQSA#5 DQSA#6

CMDA20

12

UV10

@

UV10

M8

H1

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3

L7 R7 N7 T3 T7

M7

M2

N8

M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

J1

L1

J9

L9

@

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

310mA

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

MDA41 MDA45 MDA40 MDA46 MDA42 MDA47 MDA43 MDA44

MDA50 MDA54 MDA48 MDA55 MDA49 MDA52 MDA51 MDA53

+VRAM_1.5VS

2

Mode E Address

CMD0

Rank 0

0..31

ODT

CMD1

Group5Group4

Group6

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CS0#

CKE

A9

A6

A3

A0

A8

A12

A1

RAS#

A13

BA1

A14

CAS#

CMD18

CMD19

CMD20

RST

A7

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

A4

A11

A2

A10

A5

BA2

WE#

BA0

CMD30

1

Rank 1

32..63

ODT

CS1#

CKE

A9

A11

A6

A3

BA1

A0

A8

A0

A1

RAS#RAS#

A13

BA1 A3

A14

A3

A14

CAS#

ODT

CS0#

CKE

RST

A7CMD21

A4

A6

A5

A11

A2

A1

A10

A5

A4

BA2

WE#

BA0

BA2

32..630..31

A11

A7A7

BA1

A12A12

A8

A0A12

A2A2

RAS#

A14

A13A13

CAS#CAS#

ODT

CS1#

CKE

RSTRST

A6

A5

A9A9

A1

WE#WE#

A4

A10A10

BA0

BA2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VGA_N14x VRAM RANK 1H

21 56Monday, March 11, 2013

1

21 56Monday, March 11, 2013

1.0

CyberForum.ru

A

B

C

D

E

For eDP Panel

USB20_N11_R

IEDP@

1 2

C890 0.1U_0402_1 0V7K

H_EDP_AUXP<6>

1 1

H_EDP_AUXN<6>

H_EDP_TXP0<6>

H_EDP_TXN0<6>

H_EDP_TXP1<6>

H_EDP_TXN1<6>

C890 0.1U_0402_1 0V7K

IEDP@

1 2

C891 0.1U_0402_1 0V7K

IEDP@

1 2

C912 0.1U_0402_1 0V7K

IEDP@

1 2

C913 0.1U_0402_1 0V7K

IEDP@

1 2

C914 0.1U_0402_1 0V7K

IEDP@

1 2

C915 0.1U_0402_1 0V7K

LVDS_EDID_CLK

LVDS_EDID_DATA

LVDS_TXOUT0+

LVDS_TXOUT0-

LVDS_TXOUT1+

LVDS_TXOUT1-

USB20_P11_R

USB20_P8_R

USB20_N8_R

CAM_EMI@

1

4

L55

2

3

WCM-2012-900T_0805

Reserve fo r EMI requ est

1 2

R267 0_0402_5%

@TOUCH_EMI@

TOUCH_EMI@

1

4

L57

1 2

R266 0_0402_5%

@TOUCH_EMI@

2

3

WCM-2012-900T_0805

USB20_N11 <29>

USB20_P11 <29>

USB20_P8 <29>

USB20_N8 <29>

LCD POWER CIRCUIT

eDP&LVDS both 3V power rail

+3VS

W=60mils

1

+LCD_VDD_SS

12

C7

0.015U_0402_50V7K

.5A

U16

5

VIN

4

SS

APL3512ABI-TRG_SOT23-5

LCD_ENVDD<28>

VOUT

GND

EN

1

+LCD_VDD_OUT

2

3

1 2

R106 0_0805_5%

R112

R112 100K_0402_5%

100K_0402_5%

1 2

Rshort@

+LCD_VDD

W=60mils

I rush=1.5A

Reserve fo r EMI requ est

For LVDS 1ch Panel

1 2

LVDS@

2 2

3 3

LCD_TXOUT0+<28>

LCD_TXOUT0-<28>

LCD_TXOUT1+<28>

LCD_TXOUT1-<28>

LCD_TXOUT2+<28>

LCD_TXOUT2-<28>

LCD_TXCLK+<28>

LCD_TXCLK-<28>

LCD_EDID_CLK<28>

LCD_EDID_DATA<28>

Reserve for eDP panel potential issue

LVDS@

R262 0_0402_5%

1 2

LVDS@

R263 0_0402_5%

1 2

LVDS@

R265 0_0402_5%

1 2

LVDS@

R264 0_0402_5%

1 2

LVDS@

R300 0_0402_5%

1 2

LVDS@

R299 0_0402_5%

+3VS

LVDS_TXOUT0+

LVDS_TXOUT0-

LVDS_TXOUT1+

LVDS_TXOUT1-

LCD_TXOUT2+

LCD_TXOUT2-

LCD_TXCLK+

LCD_TXCLK-

LVDS_EDID_CLK

LVDS_EDID_DATA

LVDS colay eDP cable

pin1-4 Touch function for panel

pin5-10 For Webcam with single or dual MIC

pin11-30 For LVDS or EDP panel

JLVDS

Conn@

GND GND GND GND GND

+5VS

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31 32 33 34 35

+5VS_LVDS_TOUCH USB20_N8_R USB20_P8_R BKOFF# INT_MIC_DATA INT_MIC_CLK

USB20_P11_R USB20_N11_R +3VS_LVDS_CAM +LCD_VDD

+3VS LVDS_EDID_CLK LVDS_EDID_DATA LVDS_TXOUT0LVDS_TXOUT0+ LVDS_TXOUT1LVDS_TXOUT1+ LCD_TXOUT2LCD_TXOUT2+

LCD_TXCLKLCD_TXCLK+

LED_PWM BKOFF#_R

1 2

Rshort@

R389 0_0603_5%

+LCD_VDD

+LCD_INV

Irush=1.5A

+LCD_INV

CPU_EDP_HPD <6>

1 2

Rshort@

R390 0_0603_5%

INT_MIC_DATA <39>

INT_MIC_CLK <39>

I

rush=1.5A

Irush=1.5A

6

0mils

60mils

L2

EMI@

12

FBMA-L11-201209-221LMA30T_0805

+3VS

20mils

+3VS

20mils

B+

1 2

IEDP@

R103 0_0402_5%

BKOFF#_R

4 4

1 2

D15 RB751V40_S C76-2

LVDS@

12

R113

R113 10K_0402_5%

10K_0402_5%

A

IEDP@

5

U17

1

P

IN1

4

O

2

IN2

G

3

SN74AHC1G08DCKR_SC70-5

1 2

R147 0_0402_5%

LVDS@

EC_ENBKL <28,41>

BKOFF# <41>

LED_PWM

12

R131

47K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

D

1 2

D17RB751V40_SC76-2 D17RB751V40_SC 76-2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

LVDS

VFKAA

E

PCH_PWM <28>

of

22 56Monday, March 11, 2013

1.0

CyberForum.ru

A

B

C

D

E

1 1

CRT CONNECTOR

1 2

L3 N BQ100505T-800Y_0402

UMA_CRT_R<28>

UMA_CRT_G<28>

UMA_CRT_B<28>

CRT@

C238

+HDMI_5V_OUT

+3VS

CRT@

1

2

CRT@

R139

R138

R140

12

150_0402_1%

2 2

3 3

UMA_CRT_DATA<28>

UMA_CRT_CLK<28>

UMA_CRT_VSYNC<28>

UMA_CRT_HSYNC<28>

L3 N BQ100505T-800Y_0402

CRT_EMI@

1 2

L4 N BQ100505T-800Y_0402

CRT_EMI@

1 2

L5 N BQ100505T-800Y_0402

CRT_EMI@

CRT@

1

C240

C239

2.2P_0402_50V8C

C239

2

2.2P_0402_50V8C

10

11

13

15

CRT@

1

C241

C242

2

2.2P_0402_50V8C

U49

1

VCC_SYNC

2

VCC_VIDEO

7

VCC_DDC

DDC_IN1

DDC_IN2

SYNC_IN1

SYNC_IN2

6

GND

TPD7S019-15DBQR_SSOP16

CRT@

1

C243

2

2.2P_0402_50V8C

VIDEO1

VIDEO2

VIDEO3

DDC_OUT1

DDC_OUT2

SYNC_OUT1

SYNC_OUT2

CRT@

BYP

CRT@

1

2

8

3

4

5

9

12

14

16

CRT_R_L

CRT_G_L

2.2P_0402_50V8C

CRT@

1 2

C15 0.22U _0402_16V7K

VSYNC_R

HSYNC_R

CRT_B_L

CRT_R_L

CRT_G_L

CRT_B_L

R62

R63

4.7K_0402_5%

CRT@

1 2

CRT@

1 2

+HDMI_5V_OUT

USE HDMI POWER

+HDMI_5V_OUT

R153

R159

4.7K_0402_5%

1 2

4.7K_0402_5%

CRT@

1 2

VSYNC

HSYNC

CRT@

22_0402_5%

CRT_DDC_DAT

CRT_DDC_CLK

T65, T66: for A TE

T65 PADT65 PAD

CRT_R_L

CRT_DDC_DAT CRT_G_L

HSYNC CRT_B_L

VSYNC

T66 PADT66 PAD

CRT_DDC_CLK

JCRT

6

11

1 7

12

2 8

13

3 9

14

G

4

G

10 15

5

C-H_13-12201513CP

Conn@

16 17

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet

Compal Electronics, Inc.

CRT

VFKAA

23 56Monday, March 11, 2013

E

1.0

of

CyberForum.ru

A

B

C

D

E

RPY1

OE# A Y

RPY1

+3VS

+HDMI_5V_OUT

1 1

UMA_HDMI_CLK<28>

UMA_HDMI_DATA<28>

2 2

UMA_HDMI_CLK-<28>

UMA_HDMI_CLK+<28>

UMA_HDMI_TX0-<28>

UMA_HDMI_TX0+<28>

3 3

UMA_HDMI_TX1-<28>

UMA_HDMI_TX1+<28>

UMA_HDMI_DATA HDMI_SDA TA

1 8 2 7 3 6 4 5

2.2K_0804_8P4R_5%

UMA_HDMI_CLK HDM I_SCLK

BSS138_NL_SOT23-3

CY2 0.1U_0402_ 10V7KCY2 0.1U_0402_10V7K

CY1 0.1U_0402_ 10V7KCY1 0.1U_0402_10V7K

CY5 0.1U_0402_ 10V7KCY5 0.1U_0402_10V7K

CY3 0.1U_0402_ 10V7KCY3 0.1U_0402_10V7K

CY7 0.1U_0402_ 10V7KCY7 0.1U_0402_10V7K

CY6 0.1U_0402_ 10V7KCY6 0.1U_0402_10V7K

G

2

S

1 2

UMA_HDMI_CLK UMA_HDMI_DATA

HDMI_SCLK HDMI_SDATA

+3VS

G

2

13

D

S

D

S

QY1

BSS138_NL_SOT23-3

13

D

QY2

HDMI_TXC-

HDMI_TXC+

HDMI_TXD0-

HDMI_TXD0+

HDMI_TXD1-

HDMI_TXD1+

LY1

EMI@LY1

EMI@

1

4

WCM-2012HS-900T_4P

LY2

EMI@LY2

EMI@

1

4

WCM-2012HS-900T_4P

LY3

EMI@LY3

EMI@

1

4

WCM-2012HS-900T_4P

L

L L

L

H H

H

X Z

+HDMI_5V_OUT

5

1

UY1

P

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

3

HDMI_HPD

2

3

2

3

2

3

4

HDMI_HPD

RY1

1 2

1K_0402_5%

RY3

2.2K_0402_5%

12

RY2

100K_0402_5%

+3VS

HDMI_HPD <28,30>

HDMI_HPD_CHDMI_HPD_U

1 2

2

CY4

0.1U_0402_10V7K

1

HDMI POWER CIRCUIT

VIN = 5V, IOUT = 0.5A , RDS(ON) TYP=95m ; MAX=115m

rrent Limit: TYP=0.8A ; MAX=1A

Cu

+HDMI_5V_OUT

CY18

0.1U_0402_10V7K

1

2

UY2

1

IN

OUT

2

GND

3

EN

FLG

AP2151DWG-7_SOT25-5

SA00006H00 0

5

4

+5VS

HDMI Connector

JHDMI

+HDMI_5V_OUT

HDMI_HPD_C

HDMI_SDATA HDMI_SCLK

HDMI_R_CK-

HDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

Conn@

GND GND GND GND

23 22 21 20

680 +-5% 8P4R

HDMI_R_CK+ HDMI_R_CK-

LY4

EMI@LY4

1 2

UMA_HDMI_TX2-<28>

UMA_HDMI_TX2+<28>

HDMI Royalty

4 4

HDMI W/O Logo: RO0000001HM HDMI W/Logo: RO0000002HM HDMI W/Logo + HDCP: RO0000003HM

please manually load this virtual material to 45@ BOM

A

CY9 0.1U_0402_ 10V7KCY9 0.1U_0402_10V7K

1 2

CY8 0.1U_0402_ 10V7KCY8 0.1U_0402_10V7K

ZZZ

HDMI45@ZZZ

HDMI45@

RO0000003HM

HDMI W/Logo + HDCP

HDMI_TXD2-

HDMI_TXD2+

B

EMI@

1

4

WCM-2012HS-900T_4P

2

3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2012/12/07 2013/12/07

HDMI_R_D0+

HDMI_R_D0-

HDMI_R_D2+

HDMI_R_D2HDMI_R_D1+ HDMI_R_D1-

+5VS

Compal Secret Data

Deciphered Date

45 36 27 18

RPY3

680 +-5% 8P4R

45 36 27 18

RPY4

2

G

D

13

D

QY4

S

2N7002KW_SOT323-3

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

HDMI Conn.

VFKAA

24 56Monday, March 11, 2013

E

of

1.0

CyberForum.ru

5

SP@

CH4

CH5

JCMOS

1 2

JME

1 2

SP@

PCH_RTCX1_R<35>

Placement near to YH 1

CMOS Setting, near DDR Door

1 2

PCH_RTCRST#

PCH_SRTCRST#

1U_0402_6.3V6K

RH23

+RTCVCC

D D

RH23 20K_0402_5%

20K_0402_5%

iME Setting.

RH24

RH24 20K_0402_5%

20K_0402_5%

Integrated SUS 1.05V VRM Enable

PCH_INTVRMEN

+RTCVCC

RH12

RH33

+3VS

+RTCVCC

C C

AZ_BITCLK_HD<39> AZ_SYNC_HD<39> AZ_RST_HD#<39> AZ_SDOUT_HD<39>

HDA_SDO

ME debug mode, this signal has a weak internal pull down Low = Disable (default)

*

High = Enable (flash descriptor security overide)

B B

HDA_SYNC

This signal has a weak internal pull down

*

H=>On Die PLL is supplied by 1.5V L=>On Die PLL is supplied by 1.8V Need to pull high for Chief River Mobile platform

High - Enable Internal VRs

must be always pulled high)

(

1 2

1M_0402_5%

1 2

330K_0402_5%

@

1 2

RH36 1K_0402_5%

1

DH1

DH1 BAS40-04_SOT23-3

BAS40-04_SOT23-3

2

3

1

CH8

0.1U_0402_10V7K

2

AZ_BITCLK_HD

AZ_SYNC_R

RH56

1M_0402_5%

1 2

SM_INTRUDER#

PCH_INTVRMEN

PCH_SPKR

+RTCBATT

+3VL

1 8 2 7 3 6 4 5

+5VS

G

2

QH1

13

D

S

D

S

BSS138_NL_SOT23-3

PCH_SPKR High = Enabled "No Reboot Mode"

*

Low = Disabled (Default)

RPH2

AZ_BITCLK AZ_SYNC_R AZ_RST# AZ_SDOUT

33_8P4R_5%

+3VALW_PCH

RH55

RH55 1K_0402_5%

1K_0402_5%

1 2

AZ_SYNC

4

RH26

GCLK@RH26

GCLK@

1 2

0_0402_5%

PCH_RTCX1

CH2 15P_0402_50V8J

32.768KHZ_12.5P_1TJF125DP1A000D

CH3 15P_0402_50V8J

PWRME_CTRL<41>

Change Net name due to this function is high active

SPI ROM for BIOS & ME (4MByte )

1 2

Rshort@

RH68

0_0402_5%

+3VALW_PCH

12

NOGCLK@

YH1

12

PCH_SPICS0#

PCH_SPI0_DOPCH_SPIDO

NOGCLK@

RH2

1 2

NOGCLK@

10M_0402_5%

PCH_SPKR<39>

AZ_SDIN0_HD<39>

1 2

Rshort@

RH25 0_0402_5%

T70 PADT70 PAD

T67 PADT67 PAD

T68 PADT68 PAD

T69 PADT69 PAD

UH3

1

CS#

2

DO

3

WP#

4

GND

W25Q32BVSSIG_SO8

4MB ROM P/N: SA00003K800 SA00004LI00

12

NOGCLK@

VCC

HOLD#

3

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

AZ_BITCLK

AZ_SYNC

PCH_SPKR

AZ_RST#

AZ_SDIN0_HD

AZ_SDOUT

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_SPICLK

PCH_SPICS0#

PCH_SPICS1#

PCH_SPIDI

PCH_SPIDO

8 7 6

CLK

5

DI

A20

C20

D20

G22

K22

C17

N34

L34

T10

K34

E34

G34

C34

A34

A36

C36

N32

J3

H7

K5

H1

T3

Y14

T1

V4

U3

PANTHER-POINT_FCBGA989

HM76R3@

+3VALW_PCH

0206: Delete 0.1uF 0206: Delete 0.1uF

RH66 0_0402_5%

PCH_SPI0_DI PCH_SPIDI

RH66 0_0402_5%

RH67 0_0402_5%

UH1A

Rshort@

Rshort@ Rshort@

Rshort@

INT.PH 20K INT.PH 20K INT.PH 20K I

NT.PH 20K

INT.PD 20K

INT.PH 20K

JTAG

INT.PD 20K

INT.PH 20K

PCH_SPICLKPCH_SPI0_CLK

RTCX1

RTCX2

RTCRST#

SRTCRST#

INTRUDER#

INTVRMEN

HDA_BCLK

HDA_SYNC

SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

HDA_SDIN2

HDA_SDIN3

HDA_SDO

HDA_DOCK_EN# / GPIO33

HDA_DOCK_RST# / GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_MOSI

SPI_MISO

1 2 1 2

LPC

INT.PH 20K INT.PH 20K

RTCIHDA

SATA

SPI

SATA0GP / GPIO21

SATA1GP / GPIO19

INT.PH 20K

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

SERIRQ

SATA0RXN SATA0RXP

SATA0TXN SATA0TXP

SATA1RXN SATA1RXP

SATA 6G

SATA1TXN SATA1TXP

SATA2RXN SATA2RXP

SATA2TXN SATA2TXP

SATA3RXN SATA3RXP

SATA3TXN SATA3TXP

SATA4RXN SATA4RXP

SATA4TXN SATA4TXP

SATA5RXN SATA5RXP

SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

PCH_SPIDO

C38 A38 B37 C37

D36

E36 K36

V5

AM3 AM1 AP7 AP5

AM10 AM8 AP11 AP10

AD7 AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

Y10

AB12

AB13

AH1

P3

V14

P1

RH269

1 2

0_0402_5%

2

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

SERIRQ

SATA_PRX_C_DTX_N0 SATA_PRX_C_DTX_P0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0

SATA_PRX_C_DTX_N2 SATA_PRX_C_DTX_P2 SATA_PTX_DRX_N2 SATA_PTX_DRX_P2

SATAICOMP

SATA3_COMP

RBIAS_SATA3

SATA_LED#

PCH_GPIO21

PCH_GPIO19

PCH_SPICS1#

@RH269

@

PCH_SPI1_DO

+3VALW_PCH

LPC_AD0 <41> LPC_AD1 <41> LPC_AD2 <41> LPC_AD3 <41>

LPC_FRAME# <41>

SERIRQ <41>

SATA_PRX_C_DTX_N0 <34> SATA_PRX_C_DTX_P0 <34> SATA_PTX_DRX_N0 <34 > SATA_PTX_DRX_P0 <34>

SATA_PRX_C_DTX_N2 <34> SATA_PRX_C_DTX_P2 <34> SATA_PTX_DRX_N2 <34 > SATA_PTX_DRX_P2 <34>

1 2

RH43 37.4_0402_1%RH43 37.4_0402_1%

1 2

RH48 49.9_0402_1%RH48 49.9_0402_1%

1 2

RH41 750_0402_1%RH41 750_0402_1%

PCH_GPIO19 <29>

BOOT BIOS Strap Bit 0

SPI ROM (2MByte )

UH4

1

CS#

2

SO

HOLD#

3

WP#

4

GND

MX25L1606EM2I-12G_SO8

2MB ROM P/N: SA000041N00 SA00003FO10

1

HDD

ODD

SERIRQ PCH_GPIO21 PCH_GPIO19 SATA_LED#

+1.05VS_PCH

+3VALW_PCH

@UH4

@

8

VCC

7 6

PCH_SPI1_CLK

SCLK

5

PCH_SPI1_DI PCH_SPIDI

SI

RPH1

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

RH267 0_0402_5%

1 2

PCH_SPICLK

1 2

@

RH271 0_0402_5%@RH271 0_0402_5%@

+3VS

Please place UH3 & UH4 close to UH1 PCH, please place RH66, RH67, RH68 near UH3

A A

RPH9

EC_SDIO<41>

EC_CS0#<41> EC_SCK<41>

EC_SDI<41>

1 8 2 7 3 6 4 5

33_8P4R_5%

885@

PCH_SPI0_DO PCH_SPICS0# PCH_SPI0_CLK PCH_SPI0_DI

Reserve for NPCE885N EC

5

4

Please place RH267 near RH66, Please place RH271 near RH67, Please place RH269 near RH68.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Compal Electronics, Inc.

PCH_HDA/JTAG/SATA/SPI/LPC

VFKAA

25 56Monday, March 11, 2013

1

1.0

CyberForum.ru

5

PCIE_PRX_C_LANTX_N1<36>

LAN

WLAN

D D

+3VS

Intel Spec: PCIECLK_RQ0# is suspend well, but we pull high to +3VS for LAN en/disable function

+3VALW_PCH

C C

PCIE_PRX_C_LANTX_P1<36>

PCIE_PTX_C_LANRX_N1<36>

PCIE_PTX_C_LANRX_P1<36>

PCIE_PRX_WLANTX_ N2<35>

PCIE_PRX_WLANTX_ P2<35> PCIE_PTX_C_WLANR X_N2<35> PCIE_PTX_C_WLANR X_P2<35>

1 2

RH104 10K_0402_5%RH104 10K_0402_5%

1 2

RH95 10 K_0402_5%RH95 10K_0402_5%

RPH10

18 27 36

10K_0804_8P4R_5%

45

CLKREQ_WLAN#

CLKREQ_LAN#

RI# LVDS_SEL

PCH_GPIO28

PASSWORD_CLEAR #

LAN

WLAN

+3VALW_PCH

B B

+3VALW_PCH

RPH6

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

1 2

LVDS@

RH119 10K_0402_5%

1 2

IEDP@

RH276 10K_0402_5%

EC_SWI# LAN_EN PCH_SUSPWRD N#_R USB_CHG_OC#

PANEL_SEL

12

CH13 0.1U_0402_10V7KCH13 0.1U_0402_10V7K

12

CH11 0.1U_0402_10V7KCH11 0.1U_0402_10V7K

12

CH14 0.1U_0402_10V7KCH14 0.1U_0402_10V7K

12

CH17 0.1U_0402_10V7KCH17 0.1U_0402_10V7K

RI# <27>

PCH_GPIO28 <30>

CLK_LAN#<36> CLK_LAN<36>

CLKREQ_LAN#<36>

CLK_WLAN#<35> CLK_WLAN<35>

CLKREQ_WLAN#<35>

EC_SWI# <27,36>

PCH_SUSPWRD N#_R <27> USB_CHG_OC# <29,38,41>

N

ote: place in D DR area

LVDS_SEL

VDS_SEL

L

A A

Channel

H L

Single (Default)

5

Dual

PCIE_PRX_C_LANTX_N1 PCIE_PRX_C_LANTX_P1 PCIE_PTX_LANRX_N1 PCIE_PTX_LANRX_P1

PCIE_PRX_WLANTX_ N2 PCIE_PRX_WLANTX_ P2 PCIE_PTX_WLANRX_ N2 PCIE_PTX_WLANRX_ P2

CLK_LAN# CLK_LAN

CLKREQ_LAN#

CLK_WLAN# CLK_WLAN

CLKREQ_WLAN#

PASSWORD_CLEAR #

12

JPW

SP@

LVDS_SEL

PANEL_SEL

Channel LVDS

4

UH1B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

PANTHER-POINT_FCBGA989

HM76R3@

H L

EDP

4

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

PCI-E*

CLOCKS

INT. PH 20K

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N

CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_DP_N CLKOUT_DP_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_SATA_N

CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_OUT

XCLK_RCOMP

INT. PD 20K

CLKOUTFLEX0 / GPIO64

INT. PD 20K

CLKOUTFLEX1 / GPIO65

INT. PD 20K

CLKOUTFLEX2 / GPIO66

INT. PD 20K

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

XTAL25_IN

3

E12

PCH_SMBALERT#

H14

PCH_SMBCLK

C9

PCH_SMBDATA

A12

DRAMRST_CNTRL_PC H

C8

PCH_SMLCLK0

G12

PCH_SMLDATA0

C13

LAN_EN

E14

PCH_SMLCLK1

M16

PCH_SMLDATA1

M7

Control Link only for support Intel IAMT.

T11

P10

M10

CLK_REQ_VGA#

AB37

CLK_PCIE_VGA#

AB38

CLK_PCIE_VGA

AV22 AU22

AM12 AM13

BF18

PCH_CLK_DMI#

BE18

PCH_CLK_DMI

BJ30

CLKIN_GND1#

BG30

CLKIN_GND1

G24

CLK_DOT#

E24

CLK_DOT

AK7

CLK_SATA#

AK5

CLK_SATA

K45

CLK_14M_PCH

H45

CLK_PCILOOP

V47

PCH_X1

V49

PCH_X2

Y47

K43

F47

H47

K49

1 2

XCLK_RCOMP

RH38 0_0402_5%

CLK_FLEX0

CLK_FLEX1

CLK_FLEX2

DGPU_PRSNT#

Rshort@

PCH_SMBALERT# <27>

DRAMRST_CNTRL_PC H <7,9>

LAN_EN <36>

CLK_REQ_VGA# <13>

CLK_PCIE_VGA# <13> CLK_PCIE_VGA <13>

CLK_CPU_DMI# <5> CLK_CPU_DMI <5>

CLK_CPU_EDP# <5> CLK_CPU_EDP <5>

CLK_PCILOOP <29>

XCLK_RCOMP_R

T72 PADT72 PAD

T74 PADT74 PAD

T73 PADT73 PAD

1 2

90.9_0402_1%

1 2

RH261 10K_0402_5%RH261 10K_0402_5%

From Clock Gen.

RH115

2

+3VALW_PCH

VGA

120 MHz for eDP

+1.05VS_VCCDIFFCLKN

RPH5

45 36 27 18

2.2K_0804_8P4R_5%

DGPU_PRSNT#

M/B SKU UMA

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

H L

DIS/OPT

Compal Secret Data

Deciphered Date

Compal common design SW request to add DGPU_Present on this GPIO67

2

PCH_SMBDATA PCH_SMBCLK PCH_SMLDATA1 PCH_SMLCLK1

DRAMRST_CNTRL_PC H

PCH_SMLCLK0

PCH_SMLDATA0

CLK_REQ_VGA#

PCH_CLK_DMI PCH_CLK_DMI# CLKIN_GND1# CLKIN_GND1

CLK_DOT# CLK_DOT CLK_SATA# CLK_SATA

CLK_14M_PCH

CLK_PCILOOP

PCH_X1_R<35>

CH26

27P_0402_50V8J

NOGCLK@

1

RH102 4.7K_0402_5%RH102 4.7K_0402_5%

5

4

1 2

RH103 4.7K_0402_5%RH103 4.7K_0402_5%

PM_SMBDATA <11,12,35,42>

PM_SMBCLK <11,12,35,42>

+3VS

EC_SMB_DA2 <13,34,41>

EC_SMB_CK2 <13,34,41>

+3VALW_PCH

12

+3VALW_PCH

12

QH3B

3

2

QH3A

2N7002DW-T/R7_SOT363-6

6 1

2N7002DW-T/R7_SOT363-6

QH4B

3

2

2N7002DW-T/R7_SOT363-6

QH4A

6 1

2N7002DW-T/R7_SOT363-6

RH76 1K _0402_5%RH76 1K_0402_5%

RH73 2.2K_ 0402_5%RH73 2.2K_0402_5%

RH77 2.2K_ 0402_5%RH77 2.2K_0402_5%

RH89 10 K_0402_5%RH89 10K_0402_5%

5

Need to check d GPU

RPH3

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

RPH4

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

1 2

RH87 10 K_0402_5%RH87 10K_0402_5%

@EMI@

1 2

RH70 10_0402_5%

RH37

1 2

0_0402_5%

GCLK@

@EMI@

@EMI@ 1 2

CH9 1 0P_0402_50V8J

PCH_X1

Placement near to YH 2

NOGCLK@

RH117 1M_0402_5%

YH2

1

PCH_X1 PCH_X2

1

2

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

12

25MHZ_20PF_7V25000016NOGCLK@

GND

2

Compal Electronics, Inc.

3

GND

4

PCH_PCI-E/SMBUS/CLK

VFKAA

1

CH27

27P_0402_50V8J

2

NOGCLK@

of

26 56Monday, March 11, 2013

+3VS

1.0

CyberForum.ru

5

DMI_CTX_PRX_N0<6>

+3VALW_PCH

D D

C C

Stuff R137 if EC does not want to involve in the handshake mechanism for the DeepSX state entry and exit

B B

RPH7

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

RH163 10K_0402_5%RH163 10K_0402_5%

RPH17

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

RH282 0_0402_5%

PCH_LOW_BAT# SLP_CHG_CB0

PCH_SMBALERT#

EC_SMI#

12

PM_PWROK PCH_GPIO32 PCH_GPIO37 OPTIMUS_EN#

12

PCH_SUSPWRD N#_RSU SACK#_R

@

PCH_RSMRST#

SLP_CHG_CB0 <29,38> PCH_SMBALERT# <26> EC_SMI# <30,41>

PCH_GPIO37 <30> OPTIMUS_EN# <30>

Reserve this signal to EC by SW demand 2011/10/18a

SUSACK#<41>

PCH_SUSPWRD N#_R<26>

PCH_SUSPWRD N#<41>

+3VALW_PCH

ACIN<41,46>

Reserve this signal to EC by SW demand 2011/10/18a

DMI_CTX_PRX_N1<6> DMI_CTX_PRX_N2<6> DMI_CTX_PRX_N3<6>

DMI_CTX_PRX_P0<6> DMI_CTX_PRX_P1<6> DMI_CTX_PRX_P2<6> DMI_CTX_PRX_P3<6>

DMI_PTX_CRX_N0<6> DMI_PTX_CRX_N1<6> DMI_PTX_CRX_N2<6> DMI_PTX_CRX_N3<6>

DMI_PTX_CRX_P0<6> DMI_PTX_CRX_P1<6> DMI_PTX_CRX_P2<6> DMI_PTX_CRX_P3<6>

+1.05VS_PCH

+3VS

VGATE<41,51>

DRAMPWROK<5>

PCH_RSMRST#<41>

PBTN_OUT#<41>

1 2

RH161 330K_0402_5%R H161 330K_0402_5%

RB751V40_SC76-2

1 2

RH126 49.9_0402_1%RH126 49.9_0402_1%

1 2

RH127 750_0402_1%RH 127 750_0402_1%

1 2

RH47 1K_0402_5%RH47 1K_0402_5%

PM_PWROK<41>

1 2

@

RH132 0_0402_5%

DH2

1 2

4

1 2

@

RH133 0_0402_5%

RI#<26>

DMI_COMP

RBIAS_CPY

SUSACK#_R

XDP_DBRESET#

PM_PWROK

DRAMPWROK

PCH_RSMRST#

PCH_SUSPWRD N#_R

PBTN_OUT#

PCH_ACIN

PCH_LOW_BAT#

RI#

UH1C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

INT.PH 20K

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPW RDNACK/GPIO30

E20

H20

E10

A10

INT.PH 20K

PWRBTN#

ACPRESENT / GPIO31

BATLOW# / GPIO72

RI#

PANTHER-POINT_FCBGA989

HM76R3@

3

BJ14

FDI_RXN0

AY14

FDI_RXN1

BE14

FDI_RXN2

BH13

FDI_RXN3

BC12

FDI_RXN4

BJ12

FDI_RXN5

BG10

FDI_RXN6

BG9

FDI_RXN7

BG14

FDI_RXP0

BB14

FDI_RXP1

BF14

FDI_RXP2

BG13

FDI_RXP3

BE12

FDI_RXP4

BG12

FDI_RXP5

BJ10

FDI_RXP6

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

INT.PD 20K

INT.PH 20K

SLP_LAN# / GPIO29

FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

DSWVREN

PCH_DPWROK

EC_SWI#

PCH_GPIO32

SUS_STAT#

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

PM_SLP_A#

PM_SLP_SUS#

H_PM_SYNC

FDI_CTX_PRX_N0 <6> FDI_CTX_PRX_N1 <6> FDI_CTX_PRX_N2 <6> FDI_CTX_PRX_N3 <6> FDI_CTX_PRX_N4 <6> FDI_CTX_PRX_N5 <6> FDI_CTX_PRX_N6 <6> FDI_CTX_PRX_N7 <6>

FDI_CTX_PRX_P0 <6> FDI_CTX_PRX_P1 <6> FDI_CTX_PRX_P2 <6> FDI_CTX_PRX_P3 <6> FDI_CTX_PRX_P4 <6> FDI_CTX_PRX_P5 <6> FDI_CTX_PRX_P6 <6> FDI_CTX_PRX_P7 <6>

FDI_INT <6>

FDI_FSYNC0 <6>

FDI_FSYNC1 <6>

FDI_LSYNC0 <6>

FDI_LSYNC1 <6>

EC_SWI# <26,36>

T76 PADT76 PAD

32.768 KHz

CLK_EC <41>

PM_SLP_S5# <41>

PM_SLP_S4# <41>

PM_SLP_S3# <41>

T77 PADT77 PAD

T78 PADT78 PAD

H_PM_SYNC <5>

2

RH128 0_0402_5%

1 2

Rshort@

1

PCH_RSMRST#PCH_DPWROK

Do not support DeepSX state

+RTCVCC

DSWVREN

RH150 330K_0402_5%RH150 330K_0402_5%

12

DSWVREN must be always pulled high to +RTCVCC

DSWVREN - Internal Deep Sleep 1.05V regulator H

：：：：

Enable

*

L

：：：：

Disable

Follow EC check list demand, but don't implement CLKRUN# this fuction

DH5

12

PCH_RSMRST#PM_PWROK PCH_RSMRST#

RB751V40_SC76-2

DH6

POK<41,47>

A A

5

1 2

RB751V40_SC76-2

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Compal Electronics, Inc.

PCH_DMI/FDI/PM

VFKAA

1

27 56Monday, March 11, 2013

1.0

CyberForum.ru

5

1 2

RH125 100K_0402_5%R H125 100K_0402_5%

D D

+3VS

RPH8

1 8 2 7 3 6 4 5

2.2K_0804_8P4R_5%

RH142 2.2K_0402_5%

RH144 2.2K_0402_5%

C C

1 2

RH154 150_0402_1%

1 2

RH156 150_0402_1%

1 2

RH152 150_0402_1%

B B

CRT@

EC_ENBKL

LCTL_CLK LCTL_DATA LCD_EDID_CLK LCD_EDID_DATA

12

UMA_CRT_DATA

12

UMA_CRT_CLK

UMA_CRT_B

UMA_CRT_G

UMA_CRT_R

UMA_CRT_HSYNC<23> UMA_CRT_VSYNC<23>

4

EC_ENBKL<22,41> LCD_ENVDD<22>

PCH_PWM<22>

LCD_EDID_CLK<22>

LCD_EDID_DATA<22>

1 2

RH143 2.37K_0402_1%RH143 2.37K_0402_1%

LCD_TXCLK-<22> LCD_TXCLK+<22>

LCD_TXOUT0-<22> LCD_TXOUT1-<22> LCD_TXOUT2-<22>

LCD_TXOUT0+<22> LCD_TXOUT1+<22> LCD_TXOUT2+<22>

UMA_CRT_B<23> UMA_CRT_G<23> UMA_CRT_R<23>

UMA_CRT_CLK<23> UMA_CRT_DATA<23>

EC_ENBKL LCD_ENVDD

PCH_PWM

LCD_EDID_CLK LCD_EDID_DATA

LCTL_CLK LCTL_DATA

LVDS_IBG

UMA_CRT_B UMA_CRT_G UMA_CRT_R

UMA_CRT_CLK UMA_CRT_DATA

12

CRT@

CRT_IREF

RH138 1K_0402_0.5%

RH138

RH138 1K_0402_5%

1K_0402_5%

NOCRT@

UH1D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

INT.PD 20K

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

PANTHER-POINT_FCBGA989

HM76R3@

3

SDVO_INTN SDVO_INTP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

INT.PD 50 INT.PD 50

LVDS

CRT

SDVO_TVCLKINN SDVO_TVCLKINP

INT.PD 50 INT.PD 50

SDVO_STALLN SDVO_STALLP

INT.PD 50 INT.PD 50

SDVO_CTRLCLK

SDVO_CTRLDATA

INT.PD 20K

DDPB_AUXN DDPB_AUXP

DDPC_CTRLCLK

DDPC_CTRLDATA

INT.PD 20K

DDPC_AUXN

DDPC_AUXP

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

INT.PD 20K

DDPD_AUXN

DDPD_AUXP

UMA_HDMI_CLK <24> UMA_HDMI_DATA <24>

HDMI_HPD

RH141 100K_0402_5%RH141 100K_0402_5%

RH255 100K_0402_5%RH255 100K_0402_5%

HDMI_HPD <24,30>

UMA_HDMI_TX2- <24> UMA_HDMI_TX2+ <24> UMA_HDMI_TX1- <24> UMA_HDMI_TX1+ <24> UMA_HDMI_TX0- <24> UMA_HDMI_TX0+ <24> UMA_HDMI_CLK- <24> UMA_HDMI_CLK+ <24>

12

2

1

HDMI

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

PCH_CRT/LVDS/HDMI

VFKAA

1

1.0

of

28 56Monday, March 11, 2013

CyberForum.ru

5

D D

+3VS

C C

B B

RPH12

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

RPH13

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

RH17610K_0402_5% RH17610K_0402_5 %

1 2

RH3058.2K_0402_5% RH3058.2K_0402_5%

1 2

RH3068.2K_0402_5% RH3068.2K_0402_5%

1 2

PCH_GPIO52 PCH_GPIO2 PCH_GPIO51 ODD_DA#

PCI_PIRQD# PCI_PIRQA# PCI_PIRQB# PCI_PIRQC#

DGPU_PWR_EN

PCH_GPIO4

PCH_GPIO5

CLK_PCI_EC<41> CLK_PCILOOP<26 >

ODD_DA#<34>

PLT_RST#<35,36,41,5>

1 2 1 2

T80 PADT80 PAD

T81 PADT81 PAD

U3RXDN1 U3RXDN2

U3RXDP1 U3RXDP2

U3TXDN1 U3TXDN2

U3TXDP1 U3TXDP2

RH16722_0402_5% EMI@ RH16722_0402_5% EMI@ RH1660_0402_5% Rshort@ RH1660_0402_5% Rshort@

U3RXDN1<38> U3RXDN2<38>

U3RXDP1<38> U3RXDP2<38>

U3TXDN1<38> U3TXDN2<38>

U3TXDP1<38> U3TXDP2<38>

DGPU_PWR_EN<17>

1

@RF@

CH115

2

22P_0402_50V8J

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

DGPU_RST# PCH_GPIO52 DGPU_PWR_EN

PCH_GPIO51

PCH_GPIO2 ODD_DA# PCH_GPIO4 PCH_GPIO5

PCI_PME#

PLT_RST#

CLK_EC_R CLK_PCH CLK_PCI_DDR

4

BG26

BJ26

BH25

BJ16 BG16 AH38 AH37 AK43 AK45

C18 N30

H3

AH12

AM4 AM5

Y13 K24

L24 AB46 AB45

B21

M20 AY16 BG46

BE28 BC30 BE32

BJ32 BC28 BE30 BF32 BG32 AV26 BB26 AU28 AY30 AU26 AY26 AV28

AW30

K40 K38 H38 G38

C46 C44 E40

D47 E42 F46

G42 G40 C42 D44

K10

C6

H49 H43

J48 K42 H40

UH1E

TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 TP20

RSVD

TP21 TP22 TP23 TP24

USB3Rn1 USB3Rn2 USB3Rn3 USB3Rn4 USB3Rp1 USB3Rp2 USB3Rp3 USB3Rp4 USB3Tn1 USB3Tn2 USB3Tn3 USB3Tn4 USB3Tp1 USB3Tp2 USB3Tp3 USB3Tp4

PIRQA# PIRQB# PIRQC# PIRQD#

REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54

GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55

PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5

PME#

PLTRST#

CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4

PANTHER-POINT_FCBGA989

HM76R3@

RSVD

INT.PU 20K I

NT.PU 20K

INT.PU 20K

INT.PD 20K INT.PD 20K INT.PD 20K INT.PD 20K INT.PD 20K

PCI

INT.PD 20K

EHCI 1

EHCI 2

USB

RSVD1 RSVD2 RSVD3 RSVD4

RSVD5 RSVD6

RSVD7 RSVD8

RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22

RSVD23 RSVD24

RSVD25

RSVD26 RSVD27

RSVD28 RSVD29

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P

USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

AV5 AV10

AT8

AY5 BA2

AT12 BF3

C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

C33

B33

A14 K20 B17 C16 L16 A16 D14 C14

3

For Optimus

100K_0402_5%

NV_ALE

Note: HM70 only enable USB port 0, 1, 2, 3, 8, 9, 10, 11

USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3

USB20_N8 USB20_P8 USB20_N9 USB20_P9

USB20_N11 USB20_P11

USBBIAS

USB_OC#0 USB_CHG_OC# USB_OC#2 SLP_CHG_CB1 SLP_CHG_CB0 USB_OC#5_7

USB20_N0 <38> USB20_P0 <38> USB20_N1 <38> USB20_P1 <38> USB20_N2 <36> USB20_P2 <36> USB20_N3 <37> USB20_P3 <37>

USB20_N8 <22> USB20_P8 <22> USB20_N9 <35> USB20_P9 <35>

USB20_N11 <22> USB20_P11 <22>

1 2

RH165 22.6_0402_1%RH165 22.6_0402_1%

Within 500 mils

USB_OC#0 <38,41> USB_CHG_OC# <26,38,41>

USB_OC#2 <36,41> SLP_CHG_CB1 <38> SLP_CHG_CB0 <27,38>

PLT_RST#

DGPU_RST#

RH173

1 2

USB-Right1

USB-Right2

USB-Left

CardReader

Touch Screen

BT

Int. Camera

USB-Right Rear USB-Right Front USB-Left

2

+3VS

12

RH175

RH175 10K_0402_5%

10K_0402_5%

2

CH12

0.47U_0402_6.3V6K

1

+3VS

0206: Delete 0.1uF

5

UH6

1

P

IN1

4

O

2

IN2

G

SN74AHC1G08DCKR_SC70-5

3

100K_0402_5%

NV_ALE

PLTRST_VGA# <13>

RH288

12

Intel Anti-Thef t Techonlogy

High=Endabled

Low=Disable(floating)

NV_ALE

USB_OC#0 USB_OC#5_7 SLP_CHG_CB1 USB_OC#2

1 2

@

RH164 1K_0402_5%

+3VALW_PCH

RPH11

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

1

*

+1.8VS

Boot BIOS Strap

PCH_GPIO51

ESD@

1 2

A A

ODD_DA#

CH105180P_0402_50V8J

12

PCH_GPIO51

RH2931K_ 0402_5% @ RH2931K_0402_5% @

12

PCH_GPIO19

RH2941K_0402_5% @ RH29 41K_0402_5% @

PCH_GPIO19 <25>

PCH_GPIO19 Boot BIOS Loaction

0 0 1

0 1 0

1 1

LPC

Reserved

PCI

SPI

*

A16 Swap Override Strap

WL_OFF#

5

Low= A16 swap override Enable High= A16 swap override Disable

*

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Compal Electronics, Inc.

PCH_PCI/USB/NAND

VFKAA

29 56Monday, March 11, 2013

1

1.0

CyberForum.ru

5

4

3

2

1

UH1F

+3VALW_PCH

12

RH204 1K_0402_5%RH204 1K_0402_5%

D D

+3VS

1 2

RH178 200K_0402_5%RH178 200 K_0402_5%

+3VS

C C

S (GPIO48)

RPH15

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

GVDR@

RH202 10K_0402_5%

RH200 10K_0402_5%269@RH200 10K_0402_5%269@

GVSR@

RH203 10K_0402_5%

RH201 10K_0402_5%259@RH201 10K_0402_5%259@

RH199 10K_0402_5%@RH199 10K_0402_5%@

M_DET

BIOS setup

1

0

B B

EC_LID_OUT#

ODD_DETECT#

PCH_GPIO34 PCH_GPIO16 EC_SCI# PCH_GPIO49

12

VRAM_DR_SR#

12

SM_DET

12

VRAM_DR_SR#

12

SM_DET

12

PCH_GPIO27

Speaker Type

Follow Compal ORB and Intel Check list 460603 V1.5

BOM

For Optimus

Harman/KardonS&M option 269@

Non Harman

259@

HDMI_HPD<24,28>

EC_SCI#<41>

EC_SMI#<27,41>

EC_LID_OUT#<41>

VGA_PWROK<17,54>

PCH_GPIO28<26>

ODD_DETECT#<34>

PCH_GPIO37<27>

OPTIMUS_EN#<27>

HDMI_HPD

EC_SCI#

EC_LID_OUT#

PCH_GPIO16

VGA_PWROK

VRAM_DR_SR#

PCH_GPIO27

PCH_GPIO34

ODD_DETECT#

SM_DET

PCH_GPIO49

T7

BMBUSY# / GPIO0

A42

H36

E38

C10

C4

G2

U2

D40

T5

E8

E16

P8

K1

K4

V8

M5

N2

M3

V13

V3

D6

A4

A44

A45

A46

A5

A6

B3

B47

BD1

BD49

BE1

BE49

BF1

BF49

PANTHER-POINT_FCBGA989

INT.PH 20K

TACH1 / GPIO1

INT.PH 20K

TACH2 / GPIO6

INT.PH 20K

TACH3 / GPIO7

T.PH 20K

IN

GPIO8

LAN_PHY_PWR_CTRL / GPIO12

INT.PD 20K

GPIO15

SATA4GP / GPIO16

INT.PH 20K

TACH0 / GPIO17

SCLOCK / GPIO22

GPIO24

INT.PH 20K

GPIO27

INT.PH 20K

GPIO28

STP_PCI# / GPIO34

GPIO35

SATA2GP / GPIO36

SATA3GP / GPIO37

SLOAD / GPIO38

SDATAOUT0 / GPIO39

SDATAOUT1 / GPIO48

SATA5GP / GPIO49 / TEMP_ALERT#

GPIO57

VSS_NCTF_1

VSS_NCTF_2

VSS_NCTF_3

VSS_NCTF_4

VSS_NCTF_5

VSS_NCTF_6

VSS_NCTF_7

VSS_NCTF_8

VSS_NCTF_9

VSS_NCTF_10

VSS_NCTF_11

VSS_NCTF_12

VSS_NCTF_13

VSS_NCTF_14

HM76R3@

INT.PD 20K

GPIO28

On-Die PLL Voltage Regulator

: Enable

H

*

L: Disable

INT.PH 20K

TACH4 / GPIO68

INT.PH 20K

TACH5 / GPIO69

INT.PH 20K

TACH6 / GPIO70

INT.PH 20K

TACH7 / GPIO71

INT.PD 350

GPIO

INT.PH 20K

INT.PD 20K

CPU/MISC

NCTF

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

NC_1

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

C40

B41

C41

A40

P4

AU16

P5

AY11

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

ODD_EN#

CPU_PGA_BGA#

SPK_DET

GATEA20

KB_RST#

H_PWRGOOD

PCH_THRMTRIP#

NV_CLE

ODD_EN# <43>

for common BIOS on PBA/BGA CPU

SPK_DET <40>

GATEA20 <41>

KB_RST# <41>

1 2

RH191 390_0402_5%RH 191 390_0402_5%

This signal has weak internal pull-up, can't be pulled low

H_PWRGOOD <5>

H_THERMTRIP# <5>

ODD_EN# GATEA20 KB_RST# CPU_PGA_BGA#

SPK_DET (GPIO70)

DMI & FDI Termination Voltage

S

NV_CLE

et to VCC when HIGH

Set to VSS when LOW

12

RH189 1K_0402_5%RH189 1K_0402_5%

RPH16

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

Non-Harman detection

0

+1.8VS

12

RH187

2.2K_0402_5%

+3VS

ONKYO

Non-Brand1

H_SNB_IVB# <5>

GPIO8

Integrated Clock Chip Enable (Removed) H: Disable L: Enable

*

A A

Integrated clock enable functionality is achieved by soft-strap The current default is clock enable

5

OPTIMUS_EN#

SK

U NonOPT

H L

4

Optimus

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Compal Electronics, Inc.

PCH_CPU/GPIO

VFKAA

30 56Monday, March 11, 2013

1

of

1.0

CyberForum.ru

5

+1.05VS_VCCP

D D

C C

B B

JP@

2

JUMP_43X79

10U_0603_6.3V6M

+1.05VS_PCH

CH43

10U_0603_6.3V6M

PJ4

112

1

CH32

2

This pin can be left as NC if On-Die VR is enabled (Default)

1

CH45

2

1U_0402_6.3V6K

This pin can be left as NC if On-Die VR is enabled (Default)

1

CH33

2

1U_0402_6.3V6K

1

CH46

2

+3VS

1U_0402_6.3V6K

CH31

CH47

1U_0402_6.3V6K

+VCCP_VCCDMI

+1.05VS_PCH +VCCA_DAC

1

CH34

2

1U_0402_6.3V6K

+1.05VS_PCH

1

CH44

1U_0402_6.3V6K

2

1

CH50

0.1U_0402_10V7K

2

+VCCAFDI_VRM

+1.05VS_PCH

4

UH1G

1730mA

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

T82PAD T82PAD

T83PAD T83PAD

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

PANTHER-POINT_FCBGA989

HM76R3@

3709mA

POWER

VCC CORE

VCCIO

FDI

1mA

CRTLVDS

1mA

VCCTX_LVDS[1]

VCCTX_LVDS[2]

60mA

VCCTX_LVDS[3]

VCCTX_LVDS[4]

DMI

75mA

VCCDFTERM

VCCDFTERM[1]

VCCDFTERM[2]

190mA

VCCDFTERM[3]

VCCDFTERM[4]

DFT / SPI HVCMOS

20mA

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCSPI

U48

U47

AK36

AK37

AM37

AM38

AP36

AP37

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

3

0.01U_0402_25V7K

+VCCA_LVDS

+VCCTX_LVDS

CH38

0.01U_0402_25V7K

1

2

+VCCAFDI_VRM

+VCCP_VCCDMI

+1.05VS_VCC_DMI

1

2

1

2

CH35

0.01U_0402_25V7K

+3VS

CH42

0.1U_0402_10V7K

+VCCP_VCCDMI

RH214 0_0402_5%

1 2

1

CH49

CH49 1U_0402_6.3V6K

1U_0402_6.3V6K

2

CH51

0.1U_0402_10V7K

+3VALW_PCH

CH53

CH53 1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_10V7K

1

CH36

2

1 2

Rshort@

RH208 0_0402_5%

1

CH40

CH39

22U_0805_6.3V6M

2

+VCCAFDI_VRM

+1.05VS_PCH

Rshort@

+1.8VS

RH309

1 2

1_0603_1%

1

CH37

CH37 10U_0603_6.3V6M

10U_0603_6.3V6M

2

+3VS

RH221 0_0402_5%

1 2

Rshort@

+VCCA_DAC_R

BLM18PG181SN1D_0603

RH213 0_0402_5%

1

CH48

CH48 1U_0402_6.3V6K

1U_0402_6.3V6K

2

LH2

1 2

Rshort@

BLM18PG181SN1D_0603

12

+1.5VS

2

LH1

12

+1.8VS

+1.05VS_VCCP

+3VS

1

PCH Power Rail Table

efer to PCH EDS R1.0

R

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Vo

ltage

1.05

3.3

1.05

1.1

S0 Iccmax Current (A)

0.001

5

0.001

0.228

0.063

0.08

1.7

0.047

1.05VccIO 3.711

1.05VccASW 0.903

3.3VccSPI 0.01

3.3VccDSW 0.001

1.8 0. 002VccDFTERM

3.3VccRTC N/A

3.3VccSus3_3

3.3VccSusHDA

0.095

0.01

VccVRM 1.5 0.167

VccSSC 1

1.05VccCLKDMI

.05 0.095

0.07

VccDIFFCLKN 1.05 0.055

VccALVDS 3.3

0.001

1.8VccTX_LVDS 0.04

+3VALW to +3VALW_PCH

+3VALW

A A

PCH_PWR_EN#<32,43>

PCH_PWR_EN#

5

12

RH3 47K_0402_5%RH3 47K_0402_5%

JP@

2

JUMP_43X39

QH2

QH2 AO3413_SOT23

AO3413_SOT23

S

G

1

CH1110.1U_0402_25V6 CH 1110.1U_0402_25V6

2

PJ2

112

D

13

2

CH1120.01U_0402_25V7K CH1120 .01U_0402_25V7K

+3VALW_PCH

1

CH1130.1U_0402_10V7K C H1130.1U_0402_10V7K

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_POWER-1

VFKAA

31 56Monday, March 11, 2013

1

1.0

CyberForum.ru

5

4

3

2

1

JP@

1

CH80

2

0.1U_0402_10V7K~D

12

+5VS +3VS

12

JP@

JUMP_43X39

PJ5

2

QH6

D

S

D

S

G

2

DH3

DH3 RB751V40_SC76-2

RB751V40_SC76-2

1 2

+PCH_V5REF_SUS

1

CH63

0.1U_0402_10V7K

2

DH4

DH4 RB751V40_SC76-2

RB751V40_SC76-2

1 2

+PCH_V5REF_RUN

1

CH71

CH71 1U_0402_6.3V6K

1U_0402_6.3V6K

2

112

AO3413_SOT23

13

+3VS

LH5

1 2

10UH_LB2012T100MR_20%

D D

C C

+1.05VS_PCH

BLM18PG181SN1D_0603

B B

1

CH73

CH73 10U_0603_6.3V6M

10U_0603_6.3V6M

2

LH7

1 2

LH8

1 2

+3VS_VCC_CLKF33

1

CH74

CH74 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VS_VCCADPLLB

1

CH93

CH94

1U_0402_6.3V6K

2

10U_0603_6.3V6M

+1.05VS_VCCADPLLA

1

2

1

CH95

2

10U_0603_6.3V6M

+3VALW_PCH

+1.05VS_PCH

1U_0402_6.3V6K

1

CH96

CH96 1U_0402_6.3V6K

1U_0402_6.3V6K

2

0.1U_0402_10V7K

+1.05VS_PCH

Place CH79 near pin AF17

1U_0402_6.3V6K

+1.05VS_PCH +1.05VS_VCCDIFFCLKN

A A

RH247 0_0402_5%

1 2

Rshort@

+1.05VS_VCCDIFFCLKN

1

CH81

CH81 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VS_VCCP

4.7U_0603_6.3V6K

lace CH86, CH87 , CH88 near pi n BJ8

P

1U_0402_6.3V6K

+1.05VS_PCH

1U_0402_6.3V6K

0.1U_0402_10V7K

1

CH87

CH86

2

This pin can be left as NC if On-Die VR is enabled (Default)

1

CH55

0.1U_0402_10V7K

2

+1.05VS_PCH

1

CH64

2

22U_0805_6.3V6M

1U_0402_6.3V6K

1

CH78

2

1

2

1

2

1

CH68

2

1

2

1

0.1U_0402_10V7K

CH85

2

CH67

CH79

1

CH84

2

1

CH88

0.1U_0402_10V7K

2

+3VS_VCC_CLKF33

1

CH65

22U_0805_6.3V6M

2

1

CH69

1U_0402_6.3V6K

2

+VCCRTCEXT

+VCCAFDI_VRM

+1.05VS_VCCADPLLA

+1.05VS_VCCADPLLB

+1.05VS_VCCDIFFCLKN

+VCCSST

+RTCVCC

0.1U_0402_10V7K

CH90

UH1J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCDIFFCLKN[1]

AF34

VCCDIFFCLKN[2]

AG34

VCCDIFFCLKN[3]

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

1

2

VCCRTC

PANTHER-POINT_FCBGA989

POWER

3mA

119mA

VCCSUS3_3[10]

1010mA

1mA

Clock and Miscellaneous

PCI/GPIO/LPCMISC

80mA 80mA

55mA

SATA USB

95mA

1mA

CPURTC

10mA

HDA

HM76R3@

HDA

VCCIO[29]

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

1mA

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

N26

P26

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

+PCH_V5REF_SUS

+PCH_V5REF_RUN

+VCCAFDI_VRM

+1.05VS_PCH

1

CH56

CH56 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VALW_PCH

1

CH60

0.1U_0402_10V7K

2

+1.05VS_PCH

+3VALW_PCH

1 2

CH66 0.1U_0402_10V7KCH66 0.1U_0402_10V7K

+3VALW_PCH

1

CH70

CH70 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VS

1 2

CH75

0.1U_0402_10V7K

1

2

+3VS

1

CH76

0.1U_0402_10V7K

2

This pin can be left as NC if On

-Die VR is enabled (Default)

+VCCAFDI_VRM

+1.05VS_PCH

+3VALW_PCH

CH92

0.1U_0402_10V7K

+3VALW_PCH

1

CH61

0.1U_0402_10V7K

2

1

CH72

0.1U_0402_10V7K

2

+1.05VS_PCH

1

CH82

CH82 1U_0402_6.3V6K

1U_0402_6.3V6K

2

PCH_PWR_EN#<31,43>

Change RH232, RH237 to 10 ohm by follow Compal ORB abd Intel CRB

+3VS

+1.05VS_PCH

1

CH77

CH77 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Place CH77 near pin AF13, AH1 3, AH14, AF14

Place CH82 near pin AC16, AC1 7, AD17

RH328

47K_0402_5%

10_0402_5%

12

+5VALW_PCH +3VALW_PC H

RH232

RH237

+5VALW_PCH+5VALW

1

CH59

2

0.1U_0402_10V7K~D

CH63 & CH71 are different by Intel CRB.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_POWER-2

VFKAA

1

32 56Monday, March 11, 2013

1.0

CyberForum.ru

5

UH1H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

D D

C C

B B

A A

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

PANTHER-POINT_FCBGA989

HM76R3@

VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]

AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28

4

3

UH1I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

PANTHER-POINT_FCBGA989

HM76R3@

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_GND

VFKAA

33 56Monday, March 11, 2013

1

1.0

CyberForum.ru

A

SATA HDD Conn.

JHDD

True

1 1

23

GND

24

GND

SUYIN_127043FR022G196ZR

Conn@

ensor

G-S

2 2

GND

GND GND GND

GND

DAS/DSS

GND

1 2

A+

A-

B-

B+

V33 V33 V33

V5 V5 V5

V12 V12 V12

SATA_PTX_C_DRX_P0

3

SATA_PTX_C_DRX_N0

4 5

SATA_PRX_DTX_N0

6

SATA_PRX_DTX_P0 SATA_PTX_C_DRX_N2

7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

Close to JHDD

1 2

C369 0.01U_0402_25V7KC369 0.01U_0402_25V7K

1 2

C367 0.01U_0402_25V7KC367 0.01U_0402_25V7K

1 2

C368 0.01U_0402_25V7KC368 0.01U_0402_25V7K

1 2

C370 0.01U_0402_25V7KC370 0.01U_0402_25V7K

+3VS

+5VS

1.2A

1

C356

10U_0805_10V4Z

2

Place closely JHDD SATA CONN.

1

C357

0.1U_0402_10V7K

2

B

SATA_PTX_DRX_P0 <25> SATA_PTX_DRX_N0 <25>

SATA_PRX_C_DTX_N0 <25>

SATA_PRX_C_DTX_P0 <25>

1

C358

0.1U_0402_10V7K

2

SATA ODD Conn

15 14

C

JODD

GND

SANTA_202401-1

Conn@

D

Close to JODD

1 2 3 4 5 6 7

8 9 10 11 12 13

SATA_PTX_C_DRX_P2

SATA_PRX_DTX_N2 SATA_PRX_DTX_P2

+5VS_ODD

A+

A-

B-

B+

DP +5V +5V

MD

1 2

C376 0.01U_0402_ 25V7KC376 0.01U_0402_25V7K

1 2

C377 0.01U_0402_ 25V7KC377 0.01U_0402_25V7K

1 2

C378 0.01U_0402_ 25V7KC378 0.01U_0402_25V7K

1 2

C375 0.01U_0402_ 25V7KC375 0.01U_0402_25V7K

ODD_DETECT# <30>

ODD_DA# <29>

+5VS_ODD

SATA_PTX_DRX_P2 <25> SATA_PTX_DRX_N2 <25>

SATA_PRX_C_DTX_N2 <25>

SATA_PRX_C_DTX_P2 <25>

Pl

ace components closely ODD CONN.

1

C355

10U_0805_10V4Z

2

1

C360

0.1U_0402_10V7K

2

1

C380

0.1U_0402_10V7K

2

Power Consumption

P Read (CD) 1100 mA Read (DVD) 950 mA Write 1300 mA Standby 20mA

E

eak 1800 mA

+5VS +3VS_HDP

1

CG12

1U_0402_6.3V6K

GSENSOR@

3 3

4 4

2

+3VS_HDP

UG3

GSENSOR@U G3

GSENSOR@

1

VIN

VOUT

2

GND

3

SHDN#

BP

G9191-330T1U_SOT23-5

SA

000022I00

RPG1

1 8 2 7 3 6 4 5

4.7K_8P4R_5%

GSENSOR@

5

4

+3VS_HDP_R GXOUT GXIN +3VS_HDP_M

1

CG13

1U_0402_6.3V6K

GSENSOR@

2

HDPINT<41>

HDPINT

+3VS_HDP

SELF_TEST

+3VS_HDP

EC_SMB_CK2<13,26,41>

SELF_TEST

+3VS_HDP_R

GXOUT

GXIN

+3VS_HDP

+3VS_HDP_M

RG7 1K_0402_5%

GSENSOR@

CG7

0.1U_0402_10V7K

GSENSOR@

12

UG1

2

Vdd1

12

Vdd2

4

ST

6

PD

8

FS

9

Rev

TSH352TR LGA 16P

SA00004GB00

1

CG8

GSENSOR@

0.1U_0402_10V7K

2

GSENSOR@UG1

GSENSOR@

3

VOUTX

Voutx

5

VOUTY

Vouty

7

VOUTZ

Voutz

10

NC1

11

NC2

14

NC3

15

NC4

16

NC5

1

GND1

13

GND2

UG2

1

P3_5/SSCK/SCL/CMP1_2

2

P3_7/CNTR0#/SSO/TXD1

3

RESET#

4

XOUT/P4_7

5

VSS/AVSS

6

XIN/P4_6

7

VCC/AVCC

8

MODE

9

P4_5/INT0#/RXD1

10

P1_7/CNTR00/INT10#

R5F211B4D34SP GSENSOR@

1 2

CG1 0.033U_0402_16V7KGSENSOR@CG1 0.033U_0402_16V7KGSENSOR@

1 2

CG2 0.033U_0402_16V7KGSENSOR@CG2 0.033U_0402_16V7KGSENSOR@

1 2

CG3 0.033U_0402_16V7KGSENSOR@CG3 0.033U_0402_16V7KGSENSOR@

SA00003A600

P3_3/TCIN/INT3#/SSI00/CMP1_0

P1_5/RXD0/CNTR01/INT11#

P1_3/KI3#/AN11/TZOUT

P1_2/KI2#/AN10/CMP0_2

P1_1/KI1#/AN9/CMP0_1

P1_0/KI0#/AN8/CMP0_0

P3_4/SCS#/SDA/CMP1_1

P1_6/CLK0/SSI01

P1_4/TXD0

P4_2/VREF

11

12

13

14

15

VOUTZ

16

17

VOUTX

18

VOUTY

19

20

RG9

RG9 47K_0402_5%

47K_0402_5%

GSENSOR@

1 2

HDPACT <41>

HDPLOCK <41>

RG10 47K_0402_5%

12

GSENSOR@

+3VS_HDP

1

CG6

0.1U_0402_10V7K

GSENSOR@

2

EC_SMB_DA2 <13,26,41>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

HDD/ODD/G-Sensor

VFKAA

E

1.0

of

34 56Monday, March 11, 2013

CyberForum.ru

A

B

C

D

E

Slot 1 Half PCIe Mini Card-WLAN

40 mils

+3V_WLAN

0.1U_0402_10V7K

1

CM1

CM2

1 1

0.1U_0402_10V7K

To EC (Need pull-up + 3VL)

T

o PCH

To PCH

2 2

WLAN/ WiFi

To PCH

CM2

2

WLAN_WAKE #<41>

CLKREQ_WLAN#<26>

PCIE_PRX_WLANTX_ N2<26> PCIE_PRX_WLANTX_ P2<26>

PCIE_PTX_C_WLANR X_N2<26> PCIE_PTX_C_WLANR X_P2<26>

Debug card using

1

CM3

2

4.7U_0603_6.3V6K

BT_ON

CLK_WLAN#<26> CLK_WLAN<26>

E51_TXD<41>

E51_RXD<41>

1

2

1 2

RM24

+3V_WLAN

0_0402_5%@

E51_TXD E51_RXD

BT_CTRL_R

JWLAN

1

3

5

7

7 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

GND153GND2

LOTES_AAA-PCI-049-P06-A

Conn@

2

4

6

8

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

+3V_WLAN

LED_WIMAX#

1 2

RM6 100K_0402_5%RM6 100 K_0402_5%

To EC

WL_OFF# <41> PLT_RST# <29,36,41,5>

To PCH

PM_SMBCLK <11,12,26,42> PM_SMBDATA <11,12,26,42>

USB20_N9 <29> USB20_P9 <29>

WiMax/ BT

LED_WIMAX# <42>

+3VS

From EC

WLAN&BT Combo module circuits

BT on module

Enable Disable

BT_ON

BT_ON<41>

For isolate BT_ ON and C

ompal Debug Car d.

To EC

H

WOWL_EN#<41>

L

1 2

RM27

1K_0402_5%

WOWL@

RM2

100K_0402_5%

+3VALW

E51_RXDBT_ON

+3VALW TO +3V_WLAN for WOWL

+3VALW

12

RM31

RM31 10K_0402_5%

10K_0402_5%

1 2

47K_0402_5%

12

RM30

WOWL@

2

CM9

0.1U_0402_10V7K

1

2

WOWL@

CM10

0.01U_0402_25V7K

1

Vgs=-4.5V,Id=3A ,Rds<97mohm

S

G

2

AO3413_SOT23

AO3413_SOT23 QM2

QM2

D

1 3

WOWL@

If system don't support WOWL

+3V_WLAN

RM1

1 2

0_0603_5%

NOWOWL@

+3VS

+3VL +1.05VS_VCC P +3VS_DGPU +3VALW

1

CCL1

GCLK@

3 3

4 4

2

0.1U_0402_10V7K

1

CCL9

CCL9 18P_0402_50V8J

18P_0402_50V8J

GCLK@

2

1

CCL3

GCLK@

2

0.1U_0402_10V7K

YCL1 25MHZ 12PF X3G025000DK1H-X

1

GND

2

A

GCLK@

GND

1

CCL6

GCLK@

2

0.1U_0402_10V7K

3

CLK_X2CLK_X1

3

4

1

CCL8

GCLK@

2

0.1U_0402_10V7K

for safety request

+RTC

+3VL

+3VALW

+3VS_DGPU

+1.05VS_VCCP

1

CCL12

CCL12 18P_0402_50V8J

18P_0402_50V8J

GCLK@

2

22U_0805_6.3V6M

RCL4

120_0603_5%

12

+RTCGCLK

GCLK@

CLK_X1 CLK_X2

PN: SA000063300

B

1

CCL7

GCLK@

SLG3NB304VTR_TQFN16_2X3

UCL1

2

10

VBAT

15

+V3.3A

2

VDD

VDDIO_27M1127MHz

8

VDDIO_25M_A

3

VDDIO_25M_B

1

XTAL_IN

16

XTAL_OUT

GCLK@UCL1

GCLK@

VDD_RTC_OUT

32kHz

25MHz_A

25MHz_B

GND1

GND2

GND3

4

7

13

1

CCL11

2.2U_0402_6.3V6M

GCLK@

2

14

9

12

6

5

GND4

17

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

GCLK@

1 2

VGA_X1_R

RCL3 22_0402_5%

PCH_X1_R_R PCH_X1_R_R

Issued Date

22 ohm for NV chip

C

PCH_RTCX1_R <25>

VGA_X1 <13>

1 2

Rshort@

RCL1 0_0402_5%

Compal Secret Data

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

D

PCH_X1_R <26>

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

WLAN/GCLK

VFKAA

Monday, March 11, 2013

E

35 56

1.0

CyberForum.ru

A

Left USB 2.0 x 1

B

C

D

E

OUT OUT OUT OCB

Rshort@

W=80mils

+USB_VCCC

6 7

CR38 1000P_0402_50V7K

8 5

WOL_EN#

Sx Enable Wake up

LOW

For EMI

@EMI@

12

USB_OC#2 <29,41>

WOL_EN# <41>

Sx Disable Wake up

HIGH

JLAN

+3V_LAN

PLT_RST#<29,35,41,5>

EC_SWI#<26,27>

CLK_LAN#<26> CLK_LAN<26>

PCIE_PTX_C_LANRX_N1<26>

PCIE_PTX_C_LANRX_P1<26> PCIE_PRX_C_LANTX_N1<26> PCIE_PRX_C_LANTX_P1<26>

+USB_VCCC

LANCLK_REQ# ISOLATE#

USB20_P2_L USB20_N2_L

W=80mils

1

2

2 2

3

4

4 4

5

6

6 6

7

8

8 8

9

10

10 10

11

12

12 12

13

14

14 14

15

16

16 16

17

18

18 18

19

20

20 20

21

G1

22

G2

23

G3

24

G4

ACES_50559-02001-001

Conn@

S0

+5VALW

LR1

EMI@ LR1

EMI@

USB20_N2<29>

1 1

USB20_P2<29>

USB20_N2

USB20_P2

2

3

WCM-2012-900T_0805

For LAN function

+3VS

RL24 10K_0402_5%RL 24 10K_0402_5%

2 2

LAN_EN<26>

CLKREQ_LAN#<26>

12

LAN_EN

CLKREQ_LAN#

LANCLK_REQ#

2

1 3

D

QL53

2N7002KW_SOT323-3

G

S

1

4

LANCLK_REQ#

USB20_N2_L

USB20_P2_L

USB_EN#2< 41>

USB_EN#2

+3VS

12

1K_0402_5%

1K_0402_5% RL6

RL6

@

ISOLATE#

RL7

15K_0402_5%

2.0A

UR1

2

IN

3

IN

4

EN/ENB

1

GND

SY6288DCAC_MSOP8

SA00004KB00 SA00003TV00

1 2

RL433 0_0402_5%

WOL_EN#

JP@

PJ29

+3VALW_PCH +3V_LAN

2

JUMP_43X39

112

3 3

LAN WOL LAN_EN ISOLATEB

S0 Sx S0 Sx

----------------------------------------------

+3V_LAN rising time (10%~90%) need > 1ms and <100ms.

0

0 0 0 1 1 0 1 0 0 1 1 1 0 1 1 1 1 1 1 1 1 1 0*

* S3: after SUSP# assert low over 100ms S4/S5: after SYSON assert low over 100ms

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

LUSB20/LAN conn.

VFKAA

E

36 56Monday, March 11, 2013

1.0

CyberForum.ru

5

4

3

2

1

CW8

0.1U_0402_10V7K

USB20_N3<29>

D D

30mils

+3VS

RW1 0_0402_5%

1 2

Rshort@

1

CW1

2.2U_0402_6.3V6M

2

USB20_P3<29>

+VCC_3IN1

30mils

please close the pin19 of UW1

+3VS_CR

30mils

please close the pin4 of UW1

+3VS_CR

30mils

CW3

C C

CW3

2.2U_0402_6.3V6M

+3VS_CR

1

CW2

0.1U_0402_10V7K

2

1

CW4

0.1U_0402_10V7K

2

+3VS_CR

1

2

CW5

0.1U_0402_10V7K

De-coupling and Bulk capacitor should place near to Cardreader chip and Combo Socket

< 2 in 1 Card Reader >

Conn@ JCARD

Conn@

B B

12

GND_SW

13

GND_SW

T-SOL_156-2000302604

JCARD

VDD CMD

VSS VSS

DAT0 DAT1 DAT2

CD/DAT3

WP_SW

CD_SW

CLK

5 3 6 7 4

8 9 1 2

10 11

SDCLK_R

SD_DATA0_R SD_DATA1_R SD_DATA2_R SD_DATA3_R

SDWP# SDCD

CW12

EMI@

1

2

4.7P_0402_50V8C

1 2

@EMI@ CW16

@EMI@

1

CW13

2

4.7P_0402_50V8C

EMI@

"Normal Close" type connector

1

UW1

2

22

2 3

1

+3VS_CR

24

19 23

+3VS_CR

20

4

+3VS_CR

18

+VDD18

12mils

25

1

GL834L-OGY01_QFN24_4X4

2

GL834L-OGY01_QFN24_4X4

Close to connector

1

CW6

0.1U_0402_10V7K

2

CW16

4.7P_0402_50V8C

1

CW15

CW14

2

4.7P_0402_50V8C

EMI@

RSTZ

DM DP

DVDD PMOS

DVDD DVDD GPIO0

AVDD VDD18

Thermal pad

MS_INS SD_D2/MS_D5/SB13 SD_D3/MS_D4/SB12

SD CMD/SD_CMD

SD CLK/SD_CLK

SD_CDZ SD_D0/MS_D6/SB9 SD_D1/MS_D7/SB8

MS BS/MS_BS

SD_WP/MS_D1/SB5

SD_D4/MS_D0/SB4 SD_D5/MS_D2/SB3 SD_D6/MS_D3/SB1

SD_D7/MS_CLK/SB0

Close to IC

1

CW7

2.2U_0402_6.3V6M

2

For EMI request (Place close to connector)

12

LW6BLM15BD121SN1D_0402

@EMI@

12

LW1BLM15BD121SN1D_0402 EMI@LW 1BLM15BD121SN1D_0402 EMI@

12

LW2BLM15BD121SN1D_0402 EMI@LW 2BLM15BD121SN1D_0402 EMI@

12

LW3BLM15BD121SN1D_0402 EMI@LW 3BLM15BD121SN1D_0402 EMI@

12

LW4BLM15BD121SN1D_0402 EMI@LW 4BLM15BD121SN1D_0402 EMI@

For EMI request

5 17 16 15 14 21 13 12 11 10 9 8 7 6

(Place close to chip)

SD_DATA2 SD_DATA3 SDCMD SDCLK SDCD# SD_DATA0 SD_DATA1

SDWP+3VS_CR

BLM15BD121SN1D_0402

Power saving mode

+VCC_3IN1

LW5

12

EMI@

NC (default)

SDCLK_R

2

CW9

4.7P_0402_50V8J

EMI@

1

10K pull down

Normal modeGPIO0

30mil

SDCMDSDCMD_R

SD_DATA0 SD_DATA1 SD_DATA2 SD_DATA3

For normal close type connector invert circuit

WP_SWCD_SW

Card Uninsertion

Card Insertion

A A

5

Close

Open CloseOpen

Protect disable Protect Enable

Close

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

+3VS_CR +3VS_CR

RW3

RW3 100K_0402_5%

100K_0402_5%

SDCD

12

2

G

2

QW1A

S

SDCD#

61

D

2N7002KDWH_SOT363-6

Title

Size Document Number Rev

Custom

Date: Sheet of

12

RW4

RW4 100K_0402_5%

100K_0402_5%

5

SDWP#

Compal Electronics, Inc.

USB-CardReader GL834L

VFKAA

G

QW1B

1

S

SDWP

34

D

2N7002KDWH_SOT363-6

37 56Monday, March 11, 2013

1.0

CyberForum.ru

5

4

3

2

1

USB Sleep & Charge

State table for MAX14641

CB0 STATUS

0

D D

0

1

1 1

Right rear USB3.0 Conn.

Right rear USB3.0 Conn. Right front USB3.0 Conn.

Right rear USB3.0 Conn.Right rear USB3.0 Conn.

USB20_N0<29>

USB20_P0<29>

C C

U3TXDN1<29>

U3TXDP1<29>

U3RXDN1<29>

U3RXDP1<29>

1 2

CR14 0.1U_0402_10V7KCR14 0 .1U_0402_10V7K

1 2

CR15 0.1U_0402_10V7KCR15 0 .1U_0402_10V7K

U3TXDP1_C U3TXDP1_C_L

CB1

0

1

0

Mode

AM

AP1

PM

CM

LR6

EMI@LR6

EMI@

EMI@LR2

EMI@

EMI@LR5

EMI@

1

4

2

3

2

3

2

3

WCM-2012-900T_0805

LR2

1

4

KINGCORE WCM-2012HS-670T

LR5

1

4

KINGCORE WCM-2012HS-670T

2A auto-detection charger mode for Apple device.

2

Resistor dividers are connected to DP/DM. Including DCP

Forced 1A charger mode for Apple devices. Resistor dividers are connected to DP/DM.

USB pass-through mode.DP/DM are connected to TDP/TDM

USB pass-through mode with CDP emulation. Auto connects DP/DM to TDP/TDM depending on CDP detection status.

Right front USB3.0 Conn.

Right front USB3.0 Conn.Right front USB3.0 Conn. (Support S&C function)

(Support S&C function)

(Support S&C function)(Support S&C function)

USB20_N0_R

USB20_P0_R

U3RXDN1_L

U3RXDP1_L

U3TXDN1_C_LU3TXDN1_C

U3TXDN2<29>

U3TXDP2<29>

U3RXDN2<29>

U3RXDP2<29>

1 2

CR16 0.1U_0402_10V7KCR16 0 .1U_0402_10V7K

1 2

CR17 0.1U_0402_10V7KCR17 0 .1U_0402_10V7K

CHG_PWR_GATE#<41>

SLP_CHG_CB1<29>

LR7

EMI@LR7

2

USB20_P1_S USB20_P1_R

U3TXDP2_C U3TXDP2_C_L

3

1

4

1

4

EMI@

1

2

3

WCM-2012-900T_0805

LR3

KINGCORE WCM-2012HS-670T

LR4

KINGCORE WCM-2012HS-670T

4

EMI@LR3

EMI@

1

2

3

4

EMI@LR4

EMI@

1

2

3

4

14641@

RR2

0_0402_5%

1

USB20_N1_RUSB20_N1_S

4

2

U3RXDN2_L

3

U3RXDP2_L

2

U3TXDN2_C_LU3TXDN2_C

3

USB20_N1_S USB20_P1_S

CHG_CB1

UR2

14641@UR 2

14641@

1

CEN

2 3 4 9

CB0

DM

TDM

DP

TDP

CB1

VCC

PGND

MAX14641ETA-TGH7_TDFN8

UR2

Address 0x35

MAX14640ETA+TGH7

14640@

EC_SMB_CK1<41,45,46>

EC_SMB_DA1<41,45,46>

8

CHG_CB0

7 6 5

1

2

2N7002KDWH_SOT363-6

14641@

RR1 0 _0402_5%

+5VALW

CR9

0.1U_0402_10V7K

+3VALW

2

QR1A

6 1

14640@

3 4

14640@

5

QR1B2N 7002KDWH_SOT363-6

+3VALW

RR3

4.7K_0402_5%

14640@

SLP_CHG_CB0 <27,29>

USB20_N1 <29> USB20_P1 <29>

RR4

4.7K_0402_5%

14640@

1 2

CHG_CB1

CHG_CB0

+USB_VCCA+USB_VCCB

W=100milsW=8

0.1U_0402_10V7K

12

CR10

47U_0805_6.3V6M

U3TXDP2_C_L U3TXDN2_C_L

U3RXDP2_L U3RXDN2_L

USB20_P1_R USB20_N1_R

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

RUSB30/S&C

1

CR11

2

JUSBF

9

StdA-SSTX+

8

StdA-SSTX-

7

GND-DRAIN

6

StdA-SSRX+

5

StdA-SSRX-

4

GND

3

D+

2

D-

1

VBUS

LOTES_AUSB0015-P001A

VFKAA

1000P_0402_50V7K

1

CR40

@EMI@

2

Conn@JUSBF

Conn@

GND GND GND GND

1

13 12 11 10

of

38 56Monday, March 11, 2013

1.0

OUT OUT OUT

OCB

9

8

7

6

W=100mils

6 7 8 5

U3TXDP2_C_L

U3TXDN2_C_L

U3RXDP2_L

U3RXDN2_L

USB_CHG_OC# <26,29,41>USB_OC#0 <29,41>

+USB_VCCA

2

W=80mils

2.0A

UR4

2

IN

3

IN

USB_EN#0< 41>

B B

D3

@ESD@

1

U3TXDP1_C_L

2

U3TXDN1_C_L

4

U3RXDP1_L

5

U3RXDN1_L

3

TVWDF1004AD0_DFN 9

A A

4

EN/ENB

1

GND

SY6288DCAC_MSOP8

SA00004KB00

00003TV00

SA

9

U3TXDP1_C_L

8

U3TXDN1_C_L

7

U3RXDP1_L

6

U3RXDN1_L

5

+USB_VCCB+5VALW +USB_VCCA+5VALW

6

OUT

7

OUT

8

OUT

5

OCB

47U_0805_6.3V6M

U3TXDP1_C_L U3TXDN1_C_L

U3RXDP1_L U3RXDN1_L

USB20_P0_R

+USB_VCCB

USB20_N0_R

4

0mils

0.1U_0402_10V7K

12

CR12

JUSBR

9

StdA-SSTX+

8

StdA-SSTX-

7

GND-DRAIN

6

StdA-SSRX+

5

StdA-SSRX-

4

GND

3

D+

2

D-

1

VBUS

LOTES_AUSB0015-P001A

1

CR13

2

1000P_0402_50V7K

1

CR39

@EMI@

2

Conn@JUSBR

Conn@

13

GND

12

GND

11

GND

10

GND

2.5A

UR3

2

IN

3

IN

USB_CHG_EN#<41>

U3TXDP2_C_L

U3TXDN2_C_L

U3RXDP2_L

U3RXDN2_L

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/12/07 2013/12/07

4

EN/ENB

1

GND

SY6288DCAC_MSOP8

SA00006DN00

DR4

@ESD@

1

2

4

5

3

TVWDF1004AD0_DFN 9

Compal Secret Data

Deciphered Date

CyberForum.ru

A

UA1

MIC1_LINE1_R_R MIC1_LINE1_R_L

1 1

@ESD@

0.01U_0402_25V7K

1 2

CA65

AZ_RST_HD#<25>

close to pin 28

1 2

CA60 10U_0603_6.3V6MCA60 10U_0603_6.3V6M

1

12

CA25

2.2U_0402_6.3V6M

2 2

CA55

0.1U_0402_10V7K

2

RA34 20K_0402_1%

@

For EMI reserve

RA42

INT_MIC_CLK<22>

RA42

FBMA-10-100505-301T

CAM_EMI@

CA584.7U_0603_6.3V6K CA5 84.7U_0603_6.3V6K CA574.7U_0603_6.3V6K CA5 74.7U_0603_6.3V6K

+MIC1_VREFO_L +MIC1_VREFO_R EC_MUTE_INT<41 >

AZ_SYNC_HD<25>

close to pin19

12

RA30 20K_0402_1%RA30 20K_0402_1%

1 2

CA54 2.2U_0402_6.3V6MCA54 2.2U_0402_6.3V6M

1 2

CA53 2.2U_0402_6.3V6MCA53 2.2U_0402_6.3V6M

INT_MIC_DATA<22>

12

EC_MUTE#<41>

INT_MIC_CLK_R

MIC1_LINE1_R_C_L

MONO_IN

INT_MIC_CLK_R

SENSE_A SENSE_B

269@

1 2

22 21

17 16

31 30 29

15 14

20

12

10

11

0 mil

1

19

AC_JDREF

28

LDO_CAP

27

AC_VREF

34

CPVEE

35

CBN

36

CBP

2 3

13 18

47

4

RA50

4.7K_0402_5%

To solve S&M noise issue

Internal AMP

EC_MUTE#

Hight

Enable

LOW

Disable

B

MIC1_R MIC1_L

MIC2_R MIC2_L

MIC1_VREFO_L MIC1_VREFO_R MIC2_VREFO

LINE2_R LINE2_L

MONO_OUT

PCBEEP

SYNC

RESET#

JDREF LDO_CAP VREF CPVEE CBN CBP

GPIO0/DMIC_DATA GPIO1/DMIC_CLK

SENSE_A SENSE_B

EAPD PD#

ALC259-VC2-CG_MQFN48_6X6

259@

DVDD_IO

SPK_OUT_R+

SPK_OUT_R-

SPK_OUT_L+

SPK_OUT_L-

HPOUT_R HPOUT_L

SDATA_OUT

SDATA_IN

LINE1_L

LINE1_R

Thermal Pad

DVDD

AVDD1 AVDD2

PVDD1 PVDD2

BCLK

AVSS1 AVSS2 PVSS1 PVSS2

DVSS

NC

1 9

25 38

39 46

45 44

40 41

33 32

5 8

AZ_SDIN0_HD_R

6

AZ_BITCLK_HD

23

LINE1_R_C_L

24

LINE1_R_C_R

48

26 37 42 43 7

49

DGND

+DVDDMIC1_LINE1_R_C_R +DVDD

+AVDD +AVDD

+PVDD +PVDD

SPKR+ SPKR-

SPKL+ SPKL-

HPOUT_R HPOUT_L

AGND

75_0402_1%

RA19

RA19 RA20

RA20

75_0402_1%

12

RA23 33_0402_5%RA23 33_040 2_5%

269@

1 2

CA9 0.1U_0402_10V6K

269@

1 2

CA10 0.1U_0402_10V 6K

or EMI reserve

F close to codec

AZ_BITCLK_HD

C

0.1U_0402_10V7K

close to pin1

0.1U_0402_10V7K

close to pin9

HP_R <40>

HP_L <40>

MIC1_LINE1_R_L

MIC1_LINE1_R_R

For S&M

@EMI@

12

RA4110_0402_5%

35mA for 3.3V level

CA4

CA45

AZ_SDOUT_HD <25>

AZ_SDIN0_HD <25>

AZ_BITCLK_HD <25>

CA51

1 2

@EMI@

10P_0402_50V8J

+DVDD

1

2

1

2

1 2

Rshort@

RA22 0_0402_5%

1

CA3

2.2U_0402_6.3V6M

2

For P/N and footprint Please place them to ISPD page

UA1

ALC269Q-VB6-CG

269@

RA44 0_0603_5%

RA43 0_0603_5%

RA39 0_0603_5%

RA38 0_0603_5%

RA31 0_0603_5%

+3VS +5VALW

1 2

Rshort@

1 2

Rshort@

1 2

Rshort@

1 2

Rshort@

1 2

Rshort@

D

40 mil20 mil

close to pin 25 c

+AVDD

CA42

10U_0603_6.3V6M

0.1U_0402_10V7K

close to pin39

0.1U_0402_10V7K

close to pin46

259@

26

650mA for 5V level

0.1U_0402_10V7K

1

2

CA47

2

1

CA33

CA32

Sleep and Music

9@

2

CA37

CA50

1

10U_0603_6.3V6M

60 mil

+PVDD

1

2

1

2

No

Yes

0.1U_0402_10V7K

lose to pin 38

1

2

CA35

1

10U_0603_6.3V6M

E

1 2

Rshort@

RA18

0_0603_5%

1 2

RA24

0_0603_5%

Rshort@

+5VALW

Beep sound

P

CI Beep

PCH_SPKR<25>

3 3

Sense Pin Impedance

39.2K

E

NSE A

S

4 4

20K

10K

5.1K

39.2K

20K

10K

A

RA52

1 2

47K_0402_5%

RA49

4.7K_0402_5%

Codec Signals

PORT-I (PIN 32, 33)

PORT-B (PIN 21, 22)

PORT-C (PIN 23, 24)

(PIN 48)

PORT-E (PIN 14, 15)

PORT-F (PIN 16, 17)SENSE B

PORT-H (PIN 20)

1 2

Headphone out

Ext. MIC

CA70

1 2

0.1U_0402_10V7K

1

CA27

100P_0402_50V8J

2

For better sound by customer request

Function

MONO_IN

B

SPK

2W 4ohm =40mil For EMI reserve 1W 8ohm =20mil

SPKL+

SPKL-

SPKR+

SPKR-

close to codec

1 2

Rshort@

RA7 0_06 03_5%

1 2

Rshort@

RA8 0_06 03_5%

1000P_0402_50V7K

@EMI@

1 2

Rshort@

RA9 0_06 03_5%

1 2

Rshort@

RA10 0_0603_5%

1000P_0402_50V7K

@EMI@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

SPK_L1 <40 >

1

CA31

2

1

CA34

2

2012/12/07 2013/12/07

SPK_L2 <40 >

1

CA30

CA30 1000P_0402_50V7K

1000P_0402_50V7K

2

@EMI@

SPK_R1 <40>

SPK_R2 <40>

1

CA36

CA36 1000P_0402_50V7K

1000P_0402_50V7K

2

@EMI@

Compal Secret Data

Deciphered Date

MIC/LINE IN

MIC1_LINE1_R_R

MIC1_LINE1_R_L

+3VL

SM_SENSE#<41>

EC

D

RA48 2.2K_0402_5%R A48 2.2K_0402_5%

RA46 2.2K_0402_5%R A46 2.2K_0402_5%

61

RA29 100K_0402_5%

100K_0402_5%

2

34

5

12

269@RA29

269@

+MIC1_VREFO_R

+MIC1_VREFO_L

RA37

RA37 0_0402_5%

0_0402_5%

259@

RA47

1K_0402_5%

RA45

MIC_SENSE

QA1A

2N7002KDWH_SOT363-6

QA1A

269@

RA35 100K_0402_5%RA35 100K_0402_5%

QA1B

269@

12

place close to chip

MIC_SENSE SENSE_A

RA32 20K_0402_ 1%RA32 20K_0402_1%

NBA_PLUG<40>

Title

Size Document Number Rev

Custom

Date: Sheet of

RA33 39.2K_0402_1%RA33 39.2K_0402_1%

12

Compal Electronics, Inc.

HDA-ALC259-VC/269-VB

E

MIC1_R <40>

MIC1_L <40>

JACK_SENSE <40>

39 56Monday, March 11, 2013

1.0

CyberForum.ru

SPK Conn.

For common design, pull-high resistor should be placed at connector side.

RA95

10K_0402_5%

SPK_R1<39> SPK_R2<39> SPK_L1<39> SPK_L2<39>

SPK_DET<30>

HeadPhone/LINE Out JACK

1 2

Rshort@

HP_L<39>

HP_R<39>

Rshort@

RA54 0_0402_5%

1 2

Rshort@

RA53 0_0402_5%

YSDA0502C_SOT23-3

@ESD@

+3VS

DA6

M_DET

S (GPIO48)

1

JSPK

8

GND

7

1 2

HP_R_L

HP_R_R

2

3

1

GND

6

5

4

3

2

1

ACES_50228-0067N-001

Conn@

CA11100P_0402_50V8J

CA12100P_0402_50V8J

1

2

@EMI@

NBA_PLUG<39>

0

Non-Harman detection

SPK_DET (GPIO70)

BIOS setup

ONKYO

0

Non-Brand1

JLINE

Conn@JLINE

Conn@ 6 1 2

3

4

5

TYCO_2041280-1_3.6D

Speaker Type

Harman/KardonS&M option

Non Harman

BOM

269@

259@

M

IC/LINE IN JACK

JEXMIC

Conn@JEXMIC

Conn@

6

1 2

Rshort@

MIC1_L<39>

MIC1_R<39>

Rshort@

RA56 0_0402_5%

1 2

Rshort@

RA55 0_0402_5%

YSDA0502C_SOT23-3

@ESD@

DA7

MIC1_R_L

MIC1_R_R

JACK_SENSE<39>

1

2

3

1

CA13100P_0402_50V8 J

CA14100P_0402_50V8 J

2

@EMI@

+3VL

2

@EMI@

RA40

4.7K_0402_5%

269@

1 2

3

4

5

TYCO_2041280-1_3.6D

RA36

RA36 0_0402_5%

0_0402_5%

259@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

AUDIO CONN

Monday, March 11, 2013

40 56

1.0

CyberForum.ru

A

CB1

0.1U_0402_10V7K

For RF

CLK_PCI_EC

12

RB3

22_0402_5% @RF@

1 1

10P_0402_50V8J

+3VL

2 2

+3VL

+3VS

3 3

1

CB11

@RF@CB11

@RF@

2

RB2

47K_0402_5%

1 2

CB12 0.1U_0402_10V7KCB12 0.1U_0402_10V7K

ESD@

1 2

CB13 100P_0402_50V8J

1 2

RB11 10K_0402_5%RB11 10K_0402_5%

100K_0402_5%

1 2

RB12 4.7K_0402_5%R B12 4.7K_0402_5%

RPB1

1 8 2 7 3 6 4 5

2.2K_8P4R_5%

RB27

CHG_PWR_GATE#

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

E51_TXD

EC_MUTE_INT_R

EC_RST#

PLT_RST#

KSI[0..7]<42>

KSO[0..15]<42>

EC_MUTE_INT<39 >

CLK_EC<27>

0.1U_0402_10V7K

GATEA20<30>

KB_RST#<30>

SERIRQ<25>

LPC_FRAME#<25>

LPC_AD3<25> LPC_AD2<25> LPC_AD1<25> LPC_AD0<25>

CLK_PCI_EC<29>

PLT_RST#<29,35,36,5>

EC_SCI#<30>

WOWL_EN#<35>

KSI[0..7]

KSO[0..15]

CHG_PWR_GATE#<38>

EC_SMB_CK1<38,45,46> EC_SMB_DA1<38,45,46> EC_SMB_CK2<13,26,34> EC_SMB_DA2<13,26,34>

PM_SLP_S3#<27> PM_SLP_S5#<27>

EC_SMI#<27,30>

USB_OC#2<29,36>

USB_CHG_OC#<26,29,38>

USB_CHG_EN#<38>

USB_EN#2< 36>

KB_LED<42>

FAN_SPEED1<5>

WL_OFF#<35>

E51_TXD<35> E51_RXD<35>

PM_PWROK<27>

BT_ON<35>

SM_SENSE#<39>

POK<27,47>

RB13 0_0402_5%@RB13 0_0402_5%@

RB14 0_0402_5%RB14 0_0402_5%

CHG_PWR_GATE#

RB37 0_0402_5%

1 2

Rshort@

1 2

100K_0402_5%

1

2

EC_RST#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

E51_TXD

EC_MUTE_INT_R

POK_R

12

RB22

@

B

1

CB2

0.1U_0402_10V7K

2

1 2 3 4 5 7 8

10

12 13 37 20 38

55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82

77 78 79 80

6 14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

1

CB16

CB16 20P_0402_50V8

20P_0402_50V8

@

2

+3VL

UB1

GATEA20/GPIO00 KBRST#/GPIO01 SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1

LPC & MISC

LPC_AD0

CLK_PCI_EC PCIRST#/GPIO05 EC_RST# EC_SCII#/GPIO0E GPIO1D

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24

Int. K/B

KSO5/GPIO25

Matrix

KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

EC_SMB_CK1/GPIO44 EC_SMB_DA1/GPIO45 EC_SMB_CK2/GPIO46 EC_SMB_DA2/GPIO47

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 GPIO0A GPIO0B GPIO0C GPIO0D EC_INVT_PWM/GPIO11 FAN_SPEED1/GPIO14 EC_PME#/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 PCH_PWROK/GPIO18 SUSP_LED#/GPIO19 NUM_LED#/GPIO1A

XCLKI/GPIO5D XCLKO/GPIO5E

9

22

33

EC_VDD/VCC

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SM Bus

GPIO

GND/GND

11

24

+3VL

CB3

0.1U_0402_10V7K

1 2

96

125

111

67

EC_VDD0

EC_VDD/VCC

EC_VDD/AVCC

BATT_TEMP/GPIO38

AD Input

DAC_BRIG/GPIO3C

EN_DFAN1/GPIO3D

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

CAP_INT#/GPIO4C

CPU1.5V_S3_GATE/GPXIOA00

WOL_EN/GPXIOA01

ME_EN/GPXIOA02

VCIN0_PH/GPXIOD00

SPI Flash ROM

PECI_KB930/GPIO41

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

GPIO

PWR_LED#/GPIO54

BATT_LOW_LED#/GPIO55

PM_SLP_S4#/GPIO59

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04

PROCHOT_IN/GPXIOA05

H_PROCHOT#_EC/GPXIOA06

VCOUT0_PH/GPXIOA07

GPO

BKOFF#/GPXIOA08

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

SA_PGOOD/GPXIOA11

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

GPI

LID_SW#/GPXIOD04

PECI_KB9012/GPXIOD07

GND/GND

AGND/AGND

GND/GND

GND0

KB9012QF-A3_LQFP128_14X14

69

94

113

KB9012QF-A3_LQFP128_14X14

35

GPIO0F

BEEP#/GPIO10

GPIO12

ACOFF/GPIO13

GPIO39

ADP_I/GPIO3A

GPIO3B GPIO42

IMON/GPIO43

IREF/GPIO3E

USB_EN#/GPIO4B

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

SPIDI/GPIO5B

SPIDO/GPIO5C SPICLK/GPIO58 SPICS#/GPIO5A

ENBKL/GPIO40

FSTCHG/GPIO50

SYSON/GPIO56 VR_ON/GPIO57

AC_IN/GPXIOD01

SUSP#/GPXIOD05

GPXIOD06

V18R

9012@

UB1

UB1 NPCE885NB0DX LQFP 128P

NPCE885NB0DX LQFP 128P

885@

C

21 23 26 27

63 64 65 66 75 76

68 70 71 72

83 84 85 86 87 88

97 98 99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

BATT_PRES

885_EC_ON

TP_CLK TP_DATA

WLAN_WAKE #

SYSON VR_ON FB_CLAMP_R

RB5 0_04 02_5%

H_PROCHOT#_EC VCOUT0_PH_L

ACIN_D EC_ON_R

LID_SW# SUSP# +VTT_EC EC_PECI

+EC_V18R

1

CB15

4.7U_0603_6.3V6K

2

FANPWM <5> CLK_REQ_GC6# <13>

BATT_PRES <45> USB_OC#0 <29,38> ADP_I <45,46> ADP_V <46> HDPLOCK <34> EC_ENBKL <22,28>

EC_MUTE# <39> PM_SLP_S4# <27>

TP_DATA <42>

1 2

Rshort@

ON/OFFBTN# <42> LID_SW# <42>

SUSP# <43,48,49>

WL_BT_LED# <42> USB_EN#0 <38>

HDPINT <34>

PCH_SUSPWRD N# <27>

SUSACK# <27>

Reserve this signal to EC by SW demand 2011/10/18a

TP_CLK < 42>

VGATE <27,51>

GPS_DOWN# <13> PWRME_CTRL <25>

VCIN0_PH <45>

EC_SDIO <25>

EC_SDI <25> EC_SCK <25> EC_CS0# <25>

WLAN_WAKE # <35>

WOL_EN# <36>

HDPACT <34> BATT_FULL_LED# <42> CAPS_LED# <42> PWR_SUSP_LED# <42> BATT_CHG_LOW_LED# <42> SYSON <48> VR_ON <51>

PCH_RSMRST# <27> EC_LID_OUT# <30>

PROCHOT_IN <45>

BKOFF# <22>

PBTN_OUT# <27> PCH_PWR_EN <4 3>

SA_PGOOD <50>

RB4 0_0402_5 %

RB4 0_0402_5 % RB19 43_0402_5%RB19 43_0402_5%

D

VCIN0_PH connec t to po

wer portion (90 12 only)

FB_CLAMP <13,14,17>

PROCHOT_IN connect to power portion (9012 only)

1 2

885@

1 2

VR_HOT#<51>

+1.05VS_VCCP

H_PECI <5>

1 2

Rshort@

RB1 0_04 02_5%

H_PROCHOT#_EC

2N7002KW_SOT323-3

BATT_PRES

ACIN_D

H_PROCHOT#_EC

LID_SW#

WLAN_WAKE #

TP_CLK

TP_DATA

SYSON

SUSP#

VR_ON

VCOUT0_PH_L

VCOUT0_PH connect to power portion (9012 only)

ACIN_D

13

2

G

QB1

CB9 100P_0402_50V8J

CB10 100P_0402_50V8JCB10 100P_0402_50V8J

1 2

RB6 10K _0402_5%

1 2

RB35 47K_0402_5%RB35 47K_0402_5%

1 2

RB7 10K _0402_5%RB7 10K_0402_5%

1 2

RB8 4.7K_040 2_5%RB8 4.7K_0402_5%

1 2

RB9 4.7K_040 2_5%RB9 4.7K_0402_5%

1 2

RB10 4.7K_0402_5%R B10 4.7K_0402_5%

1 2

RB21 10K_0402_5%RB21 10K_0402_5%

1 2

RB23 10K_0402_5%RB23 10K_0402_5%

1 2

Rshort@

RB34 0_0402_5%

D

S

@

1 2

@

RB18

330K_0402_5%

12

1

CB8

CB8 47P_0402_50V8J

47P_0402_50V8J

2

+3VS

+3VL

+3VS

+3VL

12

DB1RB751V40_SC76-2 DB1RB751V40_SC76-2

Close to EC

@ESD@

1 2

CB14 180P_0402_50V8J

SUSP#

E

H_PROCHOT# <5>

VS_ON <47>

ACIN <27,46>

885@

12

RB20 330K_0402_5%

EC_ON_R

2N7002KW_SOT323-3

4 4

A

Voltage Comparator Pins FOR 9012 A3

VCIN0 pin109 VC

IN1 pin102

VCOUT0 pin104

OUT1 pin103

VC

>1.2V <1.2V

HIGH

(default)

HIGH

LOW

(default)

B

2N7002KW_SOT323-3

885_EC_ON

1 2

9012@

RB36 0_0402_5%

S

1 3

D

QB2

885@

G

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

RB20 330K_0402_5%

RB24

885@RB24

885@

12

10K_0402_5%

2012/12/07 2013/12/07

+3VL

EC_ON <47>

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

LPC-EC-KB9012&NPCE885N

Monday, March 11, 2013

E

41 56

1.0

CyberForum.ru

5

4

3

2

1

Power Button Conn.

JPWR

2

+3VL

R395

D D

R395

100K_04 02_5%

1 2

ON/OFFBTN#

ON/OFFBTN# <41>

112 334 556 778

ACES_50 611-0040N-0 01

Conn@

ON/OFFBTN#

4 6 8

+5VS

Touchpad Connector

JTP

Conn@JTP

Conn@

16 14 12 10

8 6 4 2

HB_A060 877-SAVR01

15

16

13

14

11

12

9

10

7

8

5

6

3

4

1

2

+3VS TP_DATA <41> TP_CLK <41>

PM_SMBDA TA <11,12,2 6,35> PM_SMBCL K <11,12 ,26,35>

ESD diode on SB

BATT CHARGE /FULL LED

D24

2 1

HT-F196BP5_ WHITE

+5VALW

C C

White LED brigh t when both AC -adaptor is pl ugged in and Ba ttery is full charged A

mber LED bright while chargin g battery from AC-adaptor.

Amber LED blink during Critic al Low Battery

HT-F196BP5_ WHITE

D23

2 1

HT-191UD5_A MBER_0603

R60

R60 390_040 2_5%

390_040 2_5%

1 2

R3

R3 510_040 2_5%

510_040 2_5%

BATT_FULL_L ED# <41>

BATT_CHG_LO W_LED# <4 1>

POWER LED

D25

+5VALW

White LED brigh t when system is power on. White LED blink when system i s sleep mode.

2 1

HT-F196BP5_ WHITE

R61

R61 390_040 2_5%

390_040 2_5%

1 2

PWR_SU SP_LED# <41 >

WLAN/WiMAX LED

LED_WI MAX# <35 >

R819

B B

D26

2 1

+5VS

HT-191UD5_A MBER_0603

1 2

R66

R66 510_040 2_5%

510_040 2_5%

+5VS

R819

10K_040 2_5%

@

3

2

6 1

12

5

Q157A

Q157A 2N7002DW -T/R7_SOT363 -6

2N7002DW -T/R7_SOT363 -6

4

@

Q157B 2N70 02DW-T/R7_S OT363-6

@

WL_BT_L ED# <41 >

Amber LED brigh t while Wirele ss and/or WiMA X turns on.

Lid SW

+3VL

U21

U21 APX9132 ATI-TRL_SOT23-3

APX9132 ATI-TRL_SOT23-3

A A

1

2

5

VDD2VOUT

C453

0.1U_040 2_10V7K

GND

1

10P_040 2_50V8J

3

C452

LID_SW # <41>

1

@

2

Keyboard LED

10K_040 2_5%

KB_LED<41>

KEYBOARD CONN.

KSI[0..7]

KSO[0..1 5]

KSI[0..7] <41>

KSO[0..1 5] <41>

EC Reset

ENLDO<47>

4

2

G

R587

KBL@

CAPS_LE D#<41>

+5VS

12

13

D

Q52

Q52 2N7002K W_SOT323-3

2N7002K W_SOT323-3

KBL@

S

Q38

Q38 AO3413_ SOT23

AO3413_ SOT23

D

S

D

S

G

2

+3VS

TJG-533-V-T/R_6 P

3

4

KBL@

13

R376 300_0 402_5%R376 300_ 0402_5%

SW4

5

6

+5VS_LED

1

2

+5VS_LED

12

KSI1 KSI6 KSI5 KSI0 KSI4 KSI3 KSI2 KSI7 KSO15 KSO12 KSO11 KSO10 KSO9 KSO8 KSO13 KSO7 KSO6 KSO14 KSO5 KSO3 KSO4 KSO0 KSO1 KSO2

3

Screw Hole

H3

JBLG Conn@

1

2

3

4

5

GND

6

GND

ACES_50 578-0040N-0 01

H1

H2

H_4P6

@

1

H_4P6x4P2

@

H3

H_4P2

@

1

PTH

H6

H_3P0

@

1

H12

JKB

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

GND1

36

GND2

CVILU_CF1 7341U0R0-NH

Conn@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

ISPD

H12

H_3P0

@

1

PCH

UH1

SA00005FHA0

BD82HM76 SLJ8E C1

UH1

SA00005MQ50

BD82HM70 SJTNV C1

ZZZ

DAZ0WG00100

PCB LA-98 63P

2012/12/07 2013/12/07

H8

H7

H13

H_3P2

H_4P0

@

1

H14

H_3P0

H_7P0

@

1

PCB Fedical Mark PAD

HM76R1@

HM70R1@

Compal Secret Data

Deciphered Date

2

H9

H_3P0

@

1

H15

H_3P0

@

1

FD1@FD1

FD2@FD2

@

1

(Default)

M76R3@

H BD82HM76 SLJ8E C1 SA00005FHE0

UH1

HM70R3@

UH1

HM70R3@

SA00005MQC0

BD82HM70 SJTNV C1

V

H4

1

H10

H_3P0

@

1

H17

H_3P2

@

1

FD3@FD3

FD4@FD4

@

1

GA standoffCPU

H_3P3

@

H5

H_3P3

@

1

WLAN standoff

NPTH

H11

H_3P0

H18

1

H_3P0

@

H_3P2x3P7

@

H19

H_3P2N

@

1

GPU

UV1

N14PGV2 R1@

UV1

N14PGV2 R1@

SA00006DO00

N14P-GV2 -S-A1 FCBGA

UV1

N14MGLR1 @

UV1

N14MGLR1 @

SA000069000

N14M-GL-S-A 2 FCBGA

Title

TP/ISPD/KB/LED/Screw

Size Document Number Rev

Monday, March 11, 2013

Date: Sheet of

(Default) N14PGV2R3@ N14P-GV2-S-A1 SA00006DO40

UV1

SA000069010

N14M-GL-S-A 2 FCBGA

Compal Electronics, Inc.

VFKAA

1

H29

H_3P3

@

1

N14MGLR3 @

42 5 6

1.0

CyberForum.ru

A

+5VALW TO +5VS +3VALW TO +3VS Load switch

1 1

+5VALW

@

B

VIN 5V and 3.3V (VBIAS=5V),IMA X(per channel)=6A,Rds=18mohm

U1

1

VIN1

2

C1

1

1U_0402_6.3V6K

+5VALW

2

+3VALW

1

C10

@ C10

@

1U_0402_6.3V6K

2

SUSP#

VIN1

3

ON1

4

VBIAS

5

ON2

6

VIN2

7

VIN2

TPS22966DPUR_SON14_2X3

VOUT1 VOUT1

GND

VOUT2 VOUT2

GPAD

14 13

12

CT1

11

10

CT2

9 8

15

C

C2 180P_0402_50V8JC2 180P_0402_50V8J

1 2

C9 330P_0402_50V7KC9 330P_0402_50V7K

1 2

+3VS

2

@ C8

@

1

C8

+5VS

@ C3

@

0.1U_0402_10V7K

D

2

C3

0.1U_0402_10V7K

1

E

2

G

Q5527

+5VALW

R5545

R5545 10K_0402_5%

10K_0402_5%

1 2

PCH_PWR_EN#

13

D

2N7002KW_SOT323-3

S

PCH_PWR_EN# <31,32>

2N7002KW_SOT323-3

+1.8VS

S

1 2

13

D

Q190

R470

R470 470_0805_5%

470_0805_5%

2

G

SUSP

SUSP<9>

SUSP#<41,48,49>

+3VL

R5546

885@ R5546

885@

10K_0402_5%

PCH_PWR_EN<41>

2 2

1 2

SUSP#

SUSP

+5VALW

1 2

61

2

R422

R422 100K_0402_5%

100K_0402_5%

Q6A

Q6A 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

+0.75VS

R421

22_0805_5%

1 2

13

D

Q189

2N7002KW_SOT323-3

S

2

G

+1.05VS_VCCP

2

SUSP

G

2N7002KW_SOT323-3

R468

R468 470_0805_5%

470_0805_5%

1 2

13

D

Q60

S

For S3 CPU Power Saving

VCCP_PWRGOOD<49,50>

3 3

1 2

R158 220K_0402_5%R158 220K_0402_5%

SUSP

34

5

0.75VR_EN

Q6B

Q6B 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

0.75VR_EN <48>

ZPODD@

+5VS_ODD

+5VS TO +5VS_ODD

R457

470_0805_5%ZPODD@

1 2 61

Q53A

2

ODD_EN#

2N7002DW-T/R7_SOT363-6

ODD_EN#<30>

2N7002DW-T/R7_SOT363-6

4

ZPODD@

+3VS

+5VS

2

C471

ZPODD@ C471

ZPODD@

R441

R441 100K_0402_5%

Q53B

3

100K_0402_5%

1 2

47K_0402_5%

R440

ZPODD@

5

ZPODD@

0.1U_0402_10V7K

1

2

AO3413_SOT23

C217

0.01U_0402_25V7K

1

Vgs=-4.5V,Id=3A,Rds<97mohm

ZPODD@

S

Q45

G

2

D

1 3

12

NONZP@

R120

R120 0_0805_5%

0_0805_5%

+5VS_ODD

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/12/07 2013/12/07

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet

Compal Electronics, Inc.

DC-DC INTERFACE

VFKAA

Monday, March 11, 2013

E

of

43 56

1.0

CyberForum.ru

A

B

C

D

EMI Part (47.1)

EMI@

PL102

A51 need add fuse

1 1

@

PJP1

1

2

3

4

ACES_50299-00401-001

2 2

PF1

21

7A_32V_S1206-H-7.0A

DC_IN_S1

- +

PBJ101 @

12 EMI@

EMI@

PC102

PC102 1000P_0603_50V7K

1000P_0603_50V7K

12

F

or ML1220 RTC (38.2)

560_0603_5%

1 2

PL102

FBMA-L11-201209-121LMA50T_0805

1 2

EMI@

PL101

FBMA-L11-201209-121LMA50T_0805

1 2

12

EMI@

PC103

100P_0603_50V8

PR101

+RTC_R

560_0603_5%

1 2

PR102

12

EMI@

PC101

100P_0603_50V8

VIN

12

EMI@

PC104

PC104 1000P_0603_50V7K

1000P_0603_50V7K

+RTCBATT

ML1220T13RE

+RTC

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

2012/09/24 2013/09/24

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

DCIN/PRECHARGE

VFKAA

D

of

44 55

1.0

CyberForum.ru

A

@

ACES_50299-01001-W01

1

2

3

4

5

6

7

PJP2

8

9

10

1 1

2 2

Other component (37.1)

BATT_S1

BATT_P5 EC_SMDA

EC_SMCA

PR20

100_0402_1%

1 2

PR21

PR21 100_0402_1%

100_0402_1%

1 2

PF2

21

10A_125V_TR2/6125FF10-R

12

PR14

PR14 1K_0402_1%

1K_0402_1%

12

PR19

1K_0402_1%

PR16

6.49K_0402_1%

12

BATT_PRES <41>

EC_SMB_DA1 <38,41,46>

EC_SMB_CK1 <38,41,46>

VMB

+3VL

B

PL3

EMI@ PL3

EMI@

FBMA-L11-201209-121LMA50T_0805

1 2

PL2

EMI@ PL2

EMI@

FBMA-L11-201209-121LMA50T_0805

1 2

EMI@

12

PC7

1000P_0402_50V7K

EMI Part (47.1)

EMI@

12

PC8

0.01U_0402_25V7K

BATT+

C

O

P (39.7)

T

ADP_I<41,46>

PR2

@PR2

@

0_0402_5%

PROCHOT_IN<41> VCIN0_PH<41>

1 2

D

+3VL

12

PR4

PR1

1 2

1K_0402_1%

PR3

1 2

20K_0402_1%

PR5

@PR5

@

0_0402_5%

1 2

12

PC11

@PC11

@

0.1U_0402_10V7K

PR4

12.1K_0402_1%

12

PH1

100K_0402_1%_TSM0B104F4251RZ

PH1 under CPU botten side : CPU thermal protection at 93 +-3 degree C Recovery at 56 +-3 degree C

Initial Protect Recovery

65W

75W

3 3

0.75V

0.9V

0.752V

0.902V

0.626V

0.722V

Initial Protect Recovery

CPU OTP 65W 93 C

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

2012/09/24 2013/09/24

Compal Secret Data

Deciphered Date

C

56 C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

BATTERY CONN / OTP

VFKAA

D

45 55

1.0

CyberForum.ru

A

B

C

D

for reverse input protection

Charger controller (40.1), Support component (40.2)

13

D

2

PQ209

G

SSM3K7002FU_SC70-3

S

PR225

1 2

1M_0402_5%

1 1

2 2

3 3

1M_0402_5%

TPCA8057-H_PPAK56-8-5

PQ203

5

12

PC230

2200P_0402_50V7K

1 2 3

4

BQ24735_ACDRV_1

1 2

3M_0402_5%

Vin Dectector

Min. Typ Max. H-->L 17.23V L--> H 17.63V

ILIM and external DPM

3.61A

4 4

PR226

S

EMI Part (47.1)

P2P1 B+VIN

1

PQ205

2 3

12

SI7716ADN-T1-GE3_POWERPAK8-5

PC231

0.1U_0402_25V6

12

PR234

PR235

4.12K_0603_1%

5

4

PC238

0.1U_0603_25V7K

+3VL

PR239 10K_0402_1%PR239 10K_0402_1%

1

2

0.1U_0402_25V6

12

BQ24735_ACP

BQ24735_CMSRC

BQ24735_ACDRV

1 2

PR211

0.01_1206_1%

1 2

PC236

BQ24735_ACN

BQ24735_ACOK

4

3

12

PC235

0.1U_0402_25V6

PC239

1 2

1U_0603_25V6K

21

1

2

3

4

5

1UH_NRS4018T1R0NDGJ_3.2A_30%

VIN

2

3

PD230

PD230 BAS40CW_SOT323-3

BAS40CW_SOT323-3

1 12

1 2

PR228

10_1206_1%

BQ24735_VCC

BQ24735_LX

20

PU200

19

VCC

PAD

ACN

ACP

CMSRC

ACDRV

ACOK

PHASE

BQ24725RGRR_QFN20_3P5X3P5

ACDET6IOUT7SDA8SCL9ILIM

ACIN<27,41>

VIN

A

12

PR244

BQ24735_ACDET

422K_0402_1%

12

PR245

PC244

66.5K_0402_1%

0.1U_0402_25V6

0.1U_0402_25V6 PC245

PC245

12

100P_0402_50V8J

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

EMI@

PL201

1 2

0.047U_0402_25V7K

PC237

12

PR229

2.2_0603_5%

DH_CHG

BQ24735_REGN

BQ24735_BST

17

18

16

BTST

HIDRV

10

12

PR246

@PR246

@

0_0402_5%

1 2

REGN

LODRV

BATDRV

BQ24735_ILIM

12

PC211

10U_0805_25V6K

12

PC213

PC214

10U_0805_25V6K

2200P_0402_25V7K

@EMI@ PC214

@EMI@

5

PQ201

123

5

4

123

12

PC242

Deciphered Date

PQ201 AON7408L

AON7408L

4.7UH_ETQP3W4R7WF N_5.5A_20%

BQ24735_LX

PQ202

AON7406L

PD231

PD231 RB751V-40_SOD323-2

RB751V-40_SOD323-2

1U_0603_25V6K

GND

SRP

SRN

PR242

100K_0402_1%

12

0.1U_0402_10V7K

1 2

DH_CHG

PC205

1 2

15

14

13

12

11

12

PC246

@PC246

@

PR210 0_0603_5%

DL_CHG

PR236

10_0603_1%

1 2

SRP

PR237

6.8_0603_5%

1 2

SRN

BQ24735_BATDRV

1 2

PR241

357K_0402_1%

PC243

0.01U_0402_25V7K

EC_SMB_CK1 <38,41,45>

EC_SMB_DA1 <38,41,45>

ADP_I <41,45>

Please locate t he RC Near EC chip 2011-02-22

2012/09/24 2013/09/24

4

CSOP1

CSON1

0.1U_0603_16V7K

+3VALW

Compal Secret Data

5

SI7716ADN-T1-GE3_POWERPAK8-5

PL202

1 2

PR206

4.7_1206_5%

@EMI@

PC206

680P_0603_50V8J

@EMI@ PC206

@EMI@

1 2

PR233

4.12K_0603_1%

CHG

CSOP1

12

BQ24735_BATDRV_1

PR227

0.01_1206_1%

1

2

PC240

0.1U_0402_25V6

BQ24735_BATDRV

12

EMI Part (47.1)

VIN

12

PR247

309K_0402_1%

12

PR249

47K_0402_1%

For A51 ADP_V function

C

1

PQ207

2 3

4

12

0.1U_0402_10V7K

Title

Size Document Number Rev

Date: Sheet of

4

3

10K_0402_1%

1 2

PC247

@PC247

@

Custom

12

PC234

0.01U_0402_50V7K

CSON1

12

PR248

PC241

12

PC222

10U_0805_25V6K

0.1U_0402_25V6

Compal Electronics, Inc.

CHARGER

10U_0805_25V6K

VFKAA

12

PC223

10U_0805_25V6K

ADP_V <41>

BATT+

46 56

D

1.0

CyberForum.ru

A

B

C

D

3/5VALW controller (35.1), Support component (35.2)

5V Peak Current 10A OCP current 12.03A FSW=390kHz Delta I=4.29A,ripple=4.29*17m=72.93mV DCR 15.5mohm+/-15%

1 1

ESR 17mohm

TYP MAX

H/S Rds(on) :27mohm , 34mohm

PC345@

100P_0402_50V8J

PR333

@PR333

@

1 2

PR330

14K_0402_1%

1 2

PR331

20K_0402_1%

1 2

BST_3V

UG_3V

LX_3V

LG_3V

499K_0402_1%

1 2

12

PC360

@PR341

@

0_0402_5%

1 2

PR334

0.1U_0603_25V7K

PR340

2.2K_0402_1%

1 2

PR341

FB_3V

6

7

8

9

10

PGOOD

BOOT2

UGATE2

PHASE2

LGATE2

PR338

100K_0402_1%

5

12

PR337

PR357

PR342

56K_0402_1%

1 2

226K_0402_1%

2

4

3

FB2

TON

ENTRIP1

ENTRIP2

VIN11ENLDO12SECFB13LDO514LDO3

12

4.7U_0603_10V6K

12

PC342

1U_0603_10V6K

12

PC343

PR332

@ PR332

@

1 2

100K_0402_5%

4.7U_0603_6.3V6K

FB_5V

143K_0402_1%

1

FB1

BOOT1

UGATE1

PHASE1

LGATE1

PU330

15

RT8243AZQW_WQFN2 0_3X3

PC344

EMI Part (47.1)

B+

2 2

EMI@

PL331

HCB2012KF-121T50_0805

1 2

+3VALWP

3/5V_B+

PC339

2200P_0402_50V7K

@EMI@ PC339

@EMI@

12

PC340

10U_0805_25V6K

PL332

4.7UH_ETQP3W4R7W FN_5.5A_20%

1

+

PC331

2

150U_D2_6.3VY_R15M

12

PR336

@EMI@ PR336

@EMI@

PC336

@EMI@ PC336

@EMI@

12

4.7_1206_5%

SNUB_3V

12

680P_0603_50V8J

5

PQ331

4

AON7408L

123

5

123

4

AON7406L

AON7406L PQ332

PQ332

PC335

0.1U_0402_10V7K

1 2

+3VL

POK<27>

BST1_3V

1 2

PR335

100K_0402_1%

0_0402_5%

1 2

3/5V_B+

EMI Part (47.1)

3 3

EC_ON<41>

VS_ON<41>

3.3V Peak Current 8A OCP current 9.68A Delta I=1.28A ,ripple=1.28x15m=19.2mV FSW=455kHz DCR 35mohm +/-15% ESR 15mohm

TYP MAX

PR350

30K_0402_1%

1 2

PR351

19.1K_0402_1%

1 2

21

PAD

20

BYP1

19

BST_5V

18

UG_5V

17

LX_5V

16

LG_5V

PR355

@PR355

@

0_0402_5%

1 2

BST1_5V

+3VLP

12

PC341

4.7U_0603_10V6K

ENLDO <42>

PJ333

@ PJ333

@

+3VLP +3VL

(100mA,40mils ,Via NO.= 2)

2

JUMP_43X39

112

0.1U_0402_10V7K

H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :19mohm , 23.5mohm

L/S Rds(on) :10.8mohm , 13.6mohm

3/5V_B+

12

PC361

10U_0805_25V6K

PC355

1 2

PQ352

FDMC7692S_MLP8-5

5

4

+3VALWP +3VALW

+5VALWP +5VALW

AON7408L

AON7408L PQ351

PQ351

123

2.2UH_ETQP3W2R2W FN_8.5A_20%

5

12

SNUB_5V

123

12

M

I Part (47.1)

E

JUMP_43X118

PL352

1 2

PR356

@EMI@

4.7_1206_5%

PC356

@EMI@

680P_0603_50V8J

PJ331

@ PJ331

@

112

PJ332

@ PJ332

@

112

+5VALWP

1

+

PC351

2

150U_D2_6.3VY_R15M

2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

2012/09/24 2013/09/24

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

3VALW/5VALW

VFKAA

D

47 56

1.0

CyberForum.ru

A

DDR controller (35.3), Support component (35.4)

EMI@

PL151

HCB1608KF-121T30_0603

B+

1 2

PL152

0.68UH_PCMB053T-1R0MS_8.5A_20%

PL152

+1.5VP

1

+

PC157

390U_2.5V_M+PC157

390U_2.5V_M

2

1 1

1.5V_B+

12

PC152

@EMI@ PC152

@EMI@

12

EMI Part (47.1)

2200P_0402_50V7K

12

@EMI@

PR156

4.7_1206_5%

SNUB_+1.5VP

12

@EMI@

PC156

680P_0402_50V7K

PR155 0_0603_5%

PR159

5.1_0603_5%

1 2

PC164

1U_0603_10V6K

1 2

BST_1.5V-1

12

PC154

10U_0805_25V6K

PQ151

AON7408L

123

PQ152

FDMC7692S_MLP8-5

123

SYSON<41>

PC155

5

1 2

0.1U_0603_25V7K

4

+5VALW

PR163

@PR163

@

0_0402_5%

1 2

@

SW_1.5V

DL_1.5V

12

EN_1.5V

BST_1.5V

PR158

27.4K_0402_1%

1 2

PC162

1U_0603_10V6K

1 2

VDD_1.5V

+5VALW

DH_1.5V

CS_1.5V

1.5V_B+

15

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

PR161

510K_0402_1%

1 2

17

16

PHASE

RT8207MZQW_W QFN20_3X3

PGOOD

10

19

18

BOOT

UGATE

VLDOIN

S5

S3

TON

8

7

9

TON_1.5V

20

PU150

VTT

PAD

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

6

FB_1.5V

21

1

2

3

4

5

VTTREF_1.5V

PR162

PR162 10K_0402_1%

10K_0402_1%

1 2

PR160

10.2K_0402_1%

+1.5V

+1.5VP

12

+0.75VSP

12

PC159

PC160

10U_0805_6.3V6K

12

PC163

0.033U_0402_16V7K

+1.5VP

PJ153

@ PJ153

@

+0.75VSP +0.75VS

2

JUMP_43X39

112

+1.5VP

(0.5A,40mils ,Via NO.= 1)

1.5V ea

k Current 16.8A

P OCP current 20 A FSW=495kHz DCR 13mohm ESR 9mohm

TYP MAX H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :10.8mohm , 13.6mohm

STATE S3 S5 1.5VP VTT_REFP 0.75VSP

S0

S3

S4/S5

Hi Hi

HiLo

Lo Lo

On

Off

(Discharge)

On

Off

(Discharge)

Note: S3 - sleep ; S5 - power off

@

PJ151

2

112

JUMP_43X118

@

PJ152

2

112

JUMP_43X118

(15A, 600mils ,Via NO.= 30) OCP=18A

JUMP_43X118

+5VALW

On

Off (Hi-Z)

Off

+1.5V

SUSP#<41,43,49>

12

PC166

@PC166

@

0.1U_0402_10V7K

PL181

HCB1608KF-121T30_0603

1 2

@

PR181

1 2

0_0402_5%

499K_0402_1%

PR164

@PR164

@

0_0402_5%

0.75VR_EN<43>

1 2

EN_0.75VSP

12

PC167

@PC167

@

0.1U_0402_10V7K

1.8VS controller (35.15), Support component (35.16)

PU180

SY8032ABC_SOT23-6

4

IN

5

12

PC184

PC184 22U_0805_6.3VAM

22U_0805_6.3VAM

EN_1.8V

12

@

PR182

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

12

PC185

0.1U_0402_10V7K

@

PG

FB6EN

2012/09/24 2013/09/24

3

LX

2

GND

1

Compal Secret Data

Deciphered Date

LX_1.8V

1UH_NRS4018T1R0NDGJ_3.2A_30%

PR186

4.7_0402_1%

PC186

1 2

12

1 2

680P_0402_50V7K

PL182

PR183

20K_0402_1%

FB_1.8V

PJ180

@ PJ180

@

+1.8VSP +1.8VS

JUMP_43X79

112

2

+1.8VSP

12

PC187

12

68P_0402_50V8J

12

PR184

PR184 10K_0402_1%

10K_0402_1%

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

12

PC183

PC182

22U_0603_6.3V6M

Compal Electronics, Inc.

1.5VP/0.75VSP/1.8VSP

VFKAA

of

48 56

1.0

CyberForum.ru

5

D D

4

3

2

1

1.05VCCP controller (35.5), Support component (35.6)

PR402

@

0_0402_5%

12

PC402

@PC402

@

0.1U_0402_16V7K

12

SUSP# <41,43,48>

@EMI@

EMI Part (47.1)

PL401

EMI@

C C

B B

EMI@

HCB2012KF-121T50_0805

B+

The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high respectively.

12

PC404

2200P_0402_50V7K

@EMI@ PC404

@EMI@

+3VS

VCCP_PWRGOOD<43,50>

12

PC401

1 2

PR401

100K_0402_5%

10U_0805_25V6K

+1.05VSP_B+

+3VS

PGD_1.05V

PU400

8

IN

EN

9

3

2

BS

LX

GND

FB

BYP

ILMT

PG

LDO

SY8208DQNC_QFN10_3X3

1

PC406

0.1U_0603_25V7K

6

1 2

10

4

7

5

12

PC412

4.7U_0603_6.3V6K

12

@EMI@

PR403

4.7_1206_5%

1 2

0.68UH_PCMC063T-R68MN_15.5A_20 %

SW_+1.05VSP

+3VALW

PC413

2.2U_0603_6.3V6K

EMI Part (47.1)

SNUB_+1.05VSP

PL402

1 2

12

@EMI@

PC403

680P_0603_50V7K

1 2

12

PR404

75K_0402_1%

PR405

PR405 100K_0402_1%

100K_0402_1%

12

PC407

4700P_0402_16V7K

PR406

1K_0402_1%

+1.05VS_VCCPP +1.05VS_VCCP

PC408

22U_0603_6.3V6M

(17A,680mils ,Via NO.=34) OCP=23.91A

PC409

22U_0603_6.3V6M

2

JUMP_43X118

12

PC410

PJ401

@ PJ401

@

22U_0603_6.3V6M

112

+1.05VS_VCCPP

12

PC411

22U_0603_6.3V6M

12

@PR413

@

0_0402_5%

PR413

VCCIO_SENSE <8>

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2013/09/242012/09/24

2

Title

Size Document Number Rev

Date: Sheet of

+1.05VS_VCCP

VFKAA

Monday, March 11, 2013

5649

1

5649

1.0

CyberForum.ru

5

4

3

2

1

VID [0] VID[1] VCCSA Vout

0 0 0.9V 0 1 0.85V 1 0 0.775V 1 1 0.75V

D D

VCCSA controller (35.17), Support component (35.18)

PJ602

@ PJ602

@

112

JUMP_43X118

PR611

PEN@ PR611

PEN@

+1.05VS_VCCP +VCCSA

C C

SA_PGOOD<41>

+3VS

12

PR610

100K_0402_5%

+VCCSA_B+

12

PC628

22U_0603_6.3V6M

+5VALW

PR601

@PR601

@

0_0402_5%

VCCP_PWRGOOD<43,49>

1 2

12

PU601

PC626

22U_0603_6.3V6M

12

PC629

PC624

1U_0603_6.3V6M

PU601

9

GND

5

VIN

6

VPP

7

POK

8

VEN/MODE

G978F11U_SO8

12

1U_0603_6.3V6M

4

Vo

3

PR621

@PR621

@

Vo

0_0402_5%

2

1 2

PR622

@PR622

@

D1

0_0402_5%

1

1 2

D0

H_VCCSA_VID1 <9>

H_VCCSA_VID0 <9>

12

PC615

PC616

PC613

22U_0603_6.3V6M

PC616

22U_0603_6.3V6M

12

PC618

22U_0603_6.3V6M

1 2

0.005_1206_1%

+VCCSAP

0.9V

+VCCSA+VCCSAP

2

PJ601

@ PJ601

@

B B

+1.05VS_VCCP

2

JUMP_43X79

112

+VCCSA_B+

(6A, 240mils ,Via NO.= 6)

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/09/24 2013/09/24

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VCC_SAP

VFKAA

1

50 56

1.0

CyberForum.ru

5

4

3

2

1

CSP1A, CSP2A to +5VS.

+5VS

1 2

PR502 @0_0402_5%P R502 @0_0402_5%

LGA, SWA, HGA, BSTA, DIFFA, TRBSTA#, ILIMA, PWMA are float. VSPA, VSNA to GND (HW side).

CSREFA, TSNSA, IOUTA to GND.

D D

1 2

PR501

10_0402_1%

TRBSTA#

C C

1 2

8.06K_0402_1%

VCC_AXG_SENSE<9>

VSS_AXG_SENSE<9>

+1.05VS_VCCP

12

PC518

PR534

.1U_0402_16V7K

130_0402_1%

VR_SVID_DAT<8>

VR_SVID_ALRT#<8>

VR_SVID_CLK<8>

1 2

+1.05VS_VCCP

12

PR523

PR523 @75_0402_1%

@75_0402_1%

VR_HOT#<41>

VSSSENSE<8>

B B

VCCSENSE<8>

A A

VGATE<27,41>

TRBST#

FBA and COMPA are short. CSCOMPA, CSSUMA, DROOPA are short.

1 2

FBA3

PR549

0.033U_0402_16V7K

PR533

0.033U_0402_16V7K

PC505

12

PC519

54.9_0402_1%

1 2

PC501

FBA1

12

.1U_0402_16V7K

+3VS

12

3P: 330p 2P: 1000p

PR514

1 2

FB_CPU3

10_0402_1%

PR511

1 2

8.06K_0402_1%

PR503

1 2

1K_0402_1%

3P: 806 2P

: 1K

PR548

1 2

806_0402_1%

VR_ON<41>

CPU_B+

PR522

PR522 10K_0402_5%

10K_0402_5%

PC531

1 2

0.033U_0402_16V7K

CSP1A

PR525 1K_0402_1%PR525 1K_0402_1%

49.9_0402_1%

FB_CPU2

PC534

DROOP

PR545

1 2

10_0402_1%

1 2

PR542

1K_0402_1%

+5VS

PR527

66.5K_0402_1%

1 2

12

PR517

1 2

12

0.033U_0402_16V7K

PC539

1 2

1000P_0402_50V7K

FBA2

560P_0402_50V7K

1 2

2_0603_5%

PC517

1 2

2.2U_0603_10V7K

1 2

PR532 0_0402_5%@ PR532 0_0402_5%@

1 2

12

PC522

PC524

PC524 1000P_0402_50V7K

1000P_0402_50V7K

1 2

PR519

1K_0402_1%

PC529

1 2

FB_CPU1

560P_0402_50V7K

PR510

1 2

806_0402_1%

CSREFCSCOMP

PC508

1 2

PR535

PR529

10K_0402_1%

0.01U_0402_25V7K

DIS only: All AXG components are @. Except PR272 and PR273 are 0ohm. PC223, PC226, PR202 are 0ohm. PC220, PC215, PR206 are 0ohm.

PC502

1 2

.1U_0402_16V7K

PR550

1 2

24.9K_0402_1%

PC509

1 2

10P_0402_50V8J

COMPA1

1 2

PU501

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15

PC527

10P_0402_50V8J

COMP_CPU1

24.9K_0402_1%

PC510

1 2

1500P_0402_50V7K

DIFFA

TRBSTA#

59

60

57

61

58

PAD

VSPA

VSNA

DIFFA

VCC VDDBP VRDYA EN SDIO ALERT# SCLK VBOOT

NCP81012BMNR2G_QFN60_7X7

ROSC VRMP VRHOT# VRDY VSN VSP DIFF

COMP

TRBST#

18

17

19

16

FB_CPU

TRBST#

COMP_CPU

IMONIMON

12

PC530

12

1800P_0402_50V7K

1 2

PC537

PR508

1 2

24.9K_0402_1%

PUT COLSE TO VCORE Phase 1 Inductor

FBA

56

FBA

TRBSTA#

IOUT

ILIM

20

ILIM_CPU

1 2

1000P_0402_50V7K

81012_VCC

VR_ON_CPU

VR_SVID_DAT VR_SVID_ALRT# VR_SVID_CLK

VBOOT

VRMP VR_HOT# VGATE

DIFF_CPU

PR515

6.34K_0402_1%

3P: 6.04K 2P

2P: 24K 1P: 24.9K

PR541

1 2

5.11K_0402_1%

2P: 21.5K 1P: 15.8K

PC513

ROSC_CPU

3P: 22p 2P: 10p

12

: 4.32K

3P: 23.7K 2P: 24.9K

COMPA

IMONAIMONA

54

55

IOUTA

COMPA

CSCOMP22CSP325CSREF24CSSUM

DROOP21FB

DROOP

PR520 12.4K_ 0402_1%PR520 12.4K_0402_1%

CSCOMPCSCOMPCSCOMPCSCOMPCSCOMPCSCOMP

.1U_0402_16V7K

PC503

PR538

1 2

15.8K_0402_1%

DROOPA

CSCOMPA

ILIMA

51

53

52

ILIMA

DROOPA

23

1 2

PR505

1 2

75K_0402_1%

PH501

1 2

PC504

@330P_0402_50V7K

1000P_0402_50V7K

165K_0402_1%

PR540

1 2

59K_0603_1%

PC512

PC512 1000P_0402_50V7K

1000P_0402_50V7K

1 2

+5VS

PC514

1 2

CSP1A

.1U_0402_16V7K

CSSUMA

CSREFA

TSENSEA

48

47

46

50

49

CSP2A

CSP1A

TSNSA

CSREFA

CSSUMA

PWMA

CSCOMPA

BSTA

HGA

SWA

LGA

BST2

HG2 SW2

LG2

PVCC

PGND

LG1 SW1 HG1

BST1

CSP1

DRVEN

CSP2

TSNS

PWM

27

29

26

28

30

TSENSETSENSE

PC525

1 2

.1U_0402_16V7K

CSP1 CSP2

3P: 21K 2P: 12.4K

PC532

PC532 1000P_0402_50V7K

1000P_0402_50V7K

CSSUM

PC535

1 2

1000P_0402_50V7K

1 2

330P_0402_50V7K

NTC_PH201

12

220K_0402_5%_ERTJ0EV224J

PR551

1 2

PR544

12

CSREFA <52>

45 44 43 42 41 40

BST2

39 38 37 36

81012P_VCCP

35 34 33 32 31

BST1

1 2

PR521

41.2K_0402_1%

+5VS

CSREF <52>

PC538

PR504

1 2

165K_0402_1%

75K_0402_1%

NTC_PH203

SW1A <51,52>

1 2

26.1K_0402_1%

DRVEN <52>

3P: 1500p 2P: 1200p

12

3P: 73.2K 2P

PUT COLSE TO

PH503

Inductor

220K_0402_5%_ERTJ0EV224J

CSREFA

1 2

CSP1A

PR543

2P: 36K 1P: 26.1K

1 2

PR530

2.2_0603_5%

HG2 <52>

LG2 <52>

LG1 <52>

HG1 <52>

PR524

1 2

2.2_0603_5%

: 41.2K

CSREF

1 2

PR509

120K_0603_1%

PR507

1 2

120K_0603_1%

GT

PC511

0.047U_0402_16V7K

PR539 4.7K_0402_1%PR539 4.7K_0402_1%

1 2

6132_PWMA <52>

BST2_1

1 2

PR528 0_0402_5%@ PR528 0_0402_5%@

BST1_1

CSP2

12

PC528

0.047U_0402_16V7K

CSP1

12

PC533

0.047U_0402_16V7K

SW1

SW2

PC520

1 2

0.22U_0402_10V6K

PC523

1 2

0.22U_0402_10V6K

PR518

1 2

4.7K_0402_1%

1 2

PR513

4.7K_0402_1%

SW1A <51,52>

PC521

1 2

2.2U_0603_10V7K

1 2

1K_0402_1%

2P: 1.65K 1P: 1K

SW2 <51,52>

SW1 <51,52>

SW2 <51,52>

SW1 <51,52>

PR546

+5VS

PC507

1 2

1000P_0402_50V7K

TSENSEA

12

PR537

23.2K_0402_1%

PUT COLSE TO V_GT HOT SPOT

TSENSE

12

PR512

23.2K_0402_1%

PUT COLSE TO VCORE HOT SPOT

CSREFACSCOMPA DROOPA

PH504

100K_0402_1%_TSM0B104F4251RZ

1 2

PH502

100K_0402_1%_TSM0B104F4251RZ

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/09/24 2013/09/24

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

PWR-CPU_CORE

VFKAA

1

51 56

1.0

CyberForum.ru

5

4

3

2

1

EMI Part (47.1)

12

PC542

D D

HG1<51>

SW1<51,52>

LG1<51>

HG1_1 HG2_1

1

7

2

D1

G1

S1/D2

FDMS3664S_PO WER56-8-7

S2

G26S2

S2

PQ501

4

5

3

PC552

@EMI@ PC552

@EMI@

PC542

PC541

10U_0805_25V6K

2200P_0402_25V7K

CPU_B+

12

PL502

0.22UH_MMD -06DZNR22MEO1L_2 5A_20%

EMI@

PR506

4.7_1206_5%

EMI@

PC506

680P_0402_ 50V7K

1 2

12

SNUB_CPU1

12

EMI Part (47.1)

B+

+CPU_CORE

PR552

10_0402_1 %

EMI@

PL501

FBMA-L11-20120 9-121LMA50T_0805

1 2

EMI@

PL505

FBMA-L11-20120 9-121LMA50T_0805

1 2

12

CSREF <51>

SW1 <51,52> SW2 <51,52>

1

+

PC551

2

100U_25V_M

CPU_B+

1

+

PC598

2

@

HG2<51>

33U_D2_25VM_R60M

SW2<51,52>

LG2<51>

PQ505

FDMS3664S_PO WER56-8-7

PQ505

7

2

1

D1

G1

S1/D2

S2

G26S2

S2

4

5

3

CPU_B+

12

PC544

PC543

10U_0805_25V6K

PL503

0.22UH_MMD -06DZNR22MEO1L_2 5A_20%

1 2

12

EMI@

PR526

4.7_1206_5%

SNUB_CPU2

EMI@

12

PC526

680P_0402_ 50V7K

+CPU_CORE

PR553

12

10_0402_1 %

CSREF

EMI Part (47.1)

C C

CPU_B+

12

PR284

1 2

BSTA1

PU202

1

BST

6132_PWMA<51 >

B B

DRVEN<5 1>

+5VS

A A

PR272

@

0_0402_5%

PR285

2K_0402_1%

12

VCC_GFX1

12

@ PR275

@

0_0402_5%

PC289

2.2U_0603_ 10V6K

12

EN_GFX1

PR275

5

2

3

4

12

PWM

EN

VCC

NCP5911MN TBG_DFN8_2X2

2.2_0603_5%

FLAG

DRVH

SW

GND

DRVL

9

8

7

6

5

BSTA1_1

PC286

HG1A

12

0.22U_0402_10V6K

SW1A

LG1A

FDMS3664S_PO WER56-8-7

PQ503

1

7

2

D1

G1

S1/D2

S2

G26S2

S2

4

5

3

4

PC547

10U_0805_25V6K

12

PC548

10U_0805_25V6K

0.22UH_MMD -06DZNR22MEO1L_2 5A_20%

12

EMI@

PR516

4.7_1206_5%

SNUB_GFX1

EMI@

12

PC516

680P_0402_ 50V7K

EMI Part (47.1)

PL504

1 2

12

PR554

10_0402_1 %

DC 35W GT2 VID1=1.23V IccMax=33A Icc_Dyn=20.2A Icc_TDC=21.5A R_LL=3.9m ohm OCP~40A

+GFX_CORE

CSREFA <51>

SW1A <51>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/09/24 2013/09/24

Compal Secret Data

Deciphered Date

2

DC 35W CPU VID1=1.05V IccMax=53A Icc_Dyn=43A Icc_TDC=33A R_LL=1.9m ohm OCP~65A

Title

Size Document Number Rev

Custom

Date: Sheet of

PWR-CPU_CORE

VFKAA

1

52 56Monday, March 11, 2013

1.0

Compal Electronics, Inc.

CyberForum.ru

5

4

3

2

1

CPU_CORE output cap (36.4)

+CPU_CORE

GFX_CORE output cap (36.5) VCCP output cap (36.6)

D D

+GFX_CORE

1

PC584

2

22U_0603_6.3V6M

1

PC590

C C

2

22U_0603_6.3V6M

1

+

PC596

2

330U_D2_2V_Y

1

PC585

PC586

2

22U_0603_6.3V6M

1

PC591

PC592

2

22U_0603_6.3V6M

1

PC587

2

22U_0603_6.3V6M

1

PC593

2

22U_0603_6.3V6M

1

PC588

PC589

2

22U_0603_6.3V6M

1

PC594

PC595

2

22U_0603_6.3V6M

+CPU_CORE

PC555

22U_0603_6.3V6M

PC555

22U_0603_6.3V6M

12

PC560

22U_0603_6.3V6M

PC560

22U_0603_6.3V6M

12

PC565

22U_0603_6.3V6M

PC565

22U_0603_6.3V6M

1

2

PC573

22U_0603_6.3V6M

PC573

22U_0603_6.3V6M

1

2

PC556

22U_0603_6.3V6M

PC556

22U_0603_6.3V6M

12

PC567

22U_0603_6.3V6M

PC567

22U_0603_6.3V6M

PC574

22U_0603_6.3V6M

PC574

22U_0603_6.3V6M

12

22U_0603_6.3V6M

PC561

22U_0603_6.3V6M

PC561

22U_0603_6.3V6M

12

PC566

22U_0603_6.3V6M

PC566

22U_0603_6.3V6M

1

2

PC575

22U_0603_6.3V6M

PC575

22U_0603_6.3V6M

1

2

PC558

22U_0603_6.3V6M

PC558

22U_0603_6.3V6M

PC557

12

22U_0603_6.3V6M

PC562

12

PC568

22U_0603_6.3V6M

PC568

22U_0603_6.3V6M

1

2

PC576

22U_0603_6.3V6M

PC576

22U_0603_6.3V6M

1

2

PC559

22U_0603_6.3V6M

PC559

22U_0603_6.3V6M

12

PC564

22U_0603_6.3V6M

PC564

22U_0603_6.3V6M

PC563

12

PC571

22U_0603_6.3V6M

PC571

22U_0603_6.3V6M

PC570

22U_0603_6.3V6M

PC570

22U_0603_6.3V6M

PC569

22U_0603_6.3V6M

PC569

22U_0603_6.3V6M

PC577

22U_0603_6.3V6M

PC577

22U_0603_6.3V6M

1

2

PC578

22U_0603_6.3V6M

PC578

22U_0603_6.3V6M

1

2

22U_0603_6.3V6M

1

2

PC572

22U_0603_6.3V6M

PC572

22U_0603_6.3V6M

1

2

PC580

22U_0603_6.3V6M

PC580

22U_0603_6.3V6M

PC579

1

2

1

+

PC581

PC581 330U_D2_2V_Y

330U_D2_2V_Y

2

B B

+1.05VS_VCCP

1

PC417

2

22U_0603_6.3V6M

1

PC427

2

22U_0603_6.3V6M

A A

22U_0603_6.3V6M

5

1

PC419

PC418

2

22U_0603_6.3V6M

1

PC429

PC428

2

22U_0603_6.3V6M

1

PC421

PC420

2

22U_0603_6.3V6M

1

PC431

PC430

2

22U_0603_6.3V6M

1

PC422

2

22U_0603_6.3V6M

1

PC432

2

22U_0603_6.3V6M

1

PC423

PC424

2

PC433

PC424

2

22U_0603_6.3V6M

1

PC434

2

22U_0603_6.3V6M

4

1

PC426

PC425

2

22U_0603_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/09/24 2013/09/24

3

Compal Secret Data

Deciphered Date

1

+

PC582

PC582 330U_D2_2V_Y

330U_D2_2V_Y

2

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

CPU_CORE_CAP

VFKAA

53 56Monday, March 11, 2013

1

1.0

of

CyberForum.ru

A

B

C

D

+VGA_CORE

1 1

+VGA_CORE

1

2

2 2

Under VGA Core

12

PC904

PC903

4.7U_0603_6.3V6M

12

PC918

PC919

0.1U_0402_10V7K

Near VGA Core

12

PC924

PC923

47U_0805_6.3V6M

22U_0603_6.3V6M

12

PC905

4.7U_0603_6.3V6M

12

PC920

0.1U_0402_10V7K

12

PC925

4.7U_0603_6.3V6M

12

PC907

PC909

4.7U_0603_6.3V6M

PC921

0.1U_0402_10V7K

12

PC908

4.7U_0603_6.3V6M

12

PC926

PC927

4.7U_0603_6.3V6M

PRV11 = 71.5K ==>Fsw = 450KHz

PR917

@PR917

@

0_0402_5%

VGA_VSS_SENSE<15>

VGA_VCC_SENSE<15>

1 2

PR920

@PR920

@

0_0402_5%

1 2

12

PC936

1000P_0402_50V7K

47P_0402_50V8J

N14P-GV2 N14M-GL

3 3

R1 PR913

R2 PR915

R3 PR930

R4 PR914

C PC940

20 Kohm

2 Kohm

18 Kohm

2.7 nF

GB4-128 package

12

PC928

4.7U_0603_6.3V6M

PC937

1 2

12

PC912

PC929

PR921

PC911

12

4.7U_0603_6.3V6M

PC912

4.7U_0603_6.3V6M

12

PC952

@ PC952

@

4.7U_0603_6.3V6M

1 2

PR919

51_0402_1%

1 2

PC958

4.7U_0603_6.3V6M

12

PC934 .01U_0603_16V7KPC934 .01U_0603_16V7K

10K_0402_1%

1 2

39 Kohm

30 Kohm

3 Kohm

27 Kohm

1.8 nF

12

PC913

4.7U_0603_6.3V6M

12

PC953

@ PC953

@

4.7U_0603_6.3V6M

GV@ PR915

GV@

20K_0402_1%

VREF

1500P_0402_50V7K

PR914

GV@ PR914

GV@

18K_0402_1%

100P_0402_50V8J

4.7U_0603_6.3V6M

12

PC939

12

PC955

@ PC955

@

1 2

12

PC950

@ PC950

@

4.7U_0603_6.3V6M

12

4.7U_0603_6.3V6M

PR915

PC933

@PC933

@

PC940 2700P_0402_50V7KGV@ PC940 2700P_0402_50V7KGV@

12

PR931 34K_0402_1%PR931 34 K_0402_1%

PC938 10P_0402_50V8JPC938 10P_0402_50V8J

FB2_VGA

GL@ PR913

GL@

39K_0402_1%

GL@ PR915

GL@

30K_0402_1%

GL@ PR930

GL@

3K_0402_1%

GL@ PR914

GL@

27K_0402_1%

GL@ PC940

GL@

1800P_0402_50V7K

PC954

@ PC954

@

4.7U_0603_6.3V6M

12

1 2

PR913

PR915

PR930

PR914

PC940

PC951

@ PC951

@

4.7U_0603_6.3V6M

12

PC956

@ PC956

@

4.7U_0603_6.3V6M

12

1 2

PR922

82K_0402_1%

PC949

@ PC949

@

12

4.7U_0603_6.3V6M

GV@ PR913

GV@

20K_0402_1%

12

GV@ PR930

GV@

2K_0402_1%

REFIN

VREF

FS

FB_VGA

COMP_VGAFB1_VGA

PC902

@ PC902

@

PR913

4.7U_0603_6.3V6M

PR930

PR909

0_0402_5%

@ PR909

@

12

VIDBUF

PU900

7

REFIN

8

VREF

9

FS

10

FBRTN

11

FB

12

COMP

VGA_CORE controller (43.1), Support component (43.2)

AON7518

UGATE1_2_VGA

10K_0402_5%

+5VS

UGATE2_2_VGA

PC944

0.22U_0603_10V7K

1 2

AON7518

TPCA8059

<13>

DGPU_VID

+3VS_DGPU

12

1 2

PR932 0_0402_5%@ PR932 0_0402_5%@

PR929 10K_0402_5%PR929 10K_0402_5%

GPU_VID

PSI_VGA

6

4

5

VID

VIDBUF

TSNS13TALERT#14VCC15PGOOD16HG217BST2

GND

25

VCC_VGA

12

1 2

PR926 5.9K_0402_1%PR926 5.9K_0402_1%

VREF

PSI

+3VS_DGPU

12

PR912

10K_0402_5%

1 2

UGATE1_VGA

EN_VGA

3

2

1

EN

PSI

HG1

18

UGATE2_VGA

PR925 10K_0402_5%PR925 10K_0402_ 5%

PR927 2.2_0402_5%PR927 2.2_0402 _5%

PC946

1U_0402_10V6K

PR907

2.2_0603_5%

BOOT1_VGA

PC930 .1U_0402_16V 7KPC930 .1U_040 2_16V7K

BST1

24

PH1

23

LG1

22

PGND

21

PVCC_VGA

PVCC

20

LG2

19

PH2

NCP81172MNTWG_QFN24_4X 4

BOOT2_VGA

VGA_PWROK <17,30>

+3VS

12

+5VS

12

PHASE1_VGA

12

BOOT1_2_VGA

LGATE1_VGA

PR901

@PR901

@

0_0402_5%

PC922

0.22U_0603_10V7K

1 2

PC935 4.7U_0603_10V6KPC935 4.7U_0603_10V6K

1 2

12

PR924

2.2_0603_5%

PHASE2_VGA

LGATE2_VGA

12

PR908

0_0603_5%

PR923

@

0_0603_5%

BOOT2_2_VGA

@

12

PR911

@

12

MDU1512, Rdson(max)=5mohm

PQ901

PQ902

PQ903

AON7518

PQ904

TPCA8059

4

5

123

5

123

680P_0402_50V7K

EMI Part (47.1)

5

4

123

5

4

123

12

EMI@

PR906

4.7_1206_5%

SNUB1_VGA

EMI@

12

PC906

EMI@

PR916

4.7_1206_5%

EMI@

PC916

680P_0402_50V7K

EM

I Part (47.1)

EMI Part (47.1)

+VGA_B+

12

PC915

PC910

PC917

2200P_0402_50V7K

10U_0805_25V6K

7x7

+VGA_B+

PC942

10U_0805_25V6K

PL904

12

7x7

10U_0805_25V6K

PC943

10U_0805_25V6K

EMI@ PC915

EMI@

PL903

0.22UH_MMD-06DZNR22MEO1L_25 A_20%

1 2

12

0.22UH_MMD-06DZNR22MEO1L_25 A_20%

1 2

12

SNUB2_VGA

12

EMI@

PL901

SUPPRE_ FBMA-L11-453215-800LMA90T_ 1812

12

+VGA_CORE

1

+

PC931

2

560U_D2_2VM_R4.5M

+VGA_CORE

1

+

PC947

2

@

330U_D2_2V_Y

B+

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

2012/09/24 2013/09/24

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

+VGA_COREP

VFKAA

D

54 56

1.0

CyberForum.ru

NO DATE PAGE MODIFICATION LIST PURPOSE

--------------------------------------------------------------------------------------------------------------------------------

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

2012/10/26 2 013/10/26

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Power PIR

QFKAA

55 56Monday, March 11, 2013

1.0

CyberForum.ru

5

4

3

2

1

HW PIR (Product Improve Record)

VFKAA LA-9863P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 to 0.2 GERBER-OUT DATE: 2012/12/06

NO DATE PAGE MODIFICATION LIST PURPOSE

-----------------------------------------------------------------------------------------------------------------------------------

1. 11/20 06 Mount CC37 To solve S3 shutdown issue

D D

2. 11/20 29 Change USB port 10 to NC No support NFC

3. 11/20 42 Delete JNFC No support NFC

4. 11/20 37 Add QW1, RW3, RW4; change JCARD.10 to SDWP# and JCARD.11 to SDCD To solve card reader no function issue

5. 11/27 40 Change JSPK to ACES_50228-0067N-001_6P For SPK recognize design

6. 11/28 08 Mount CC17, CC18, CC19 For ESD request

7. 11/28 29 Mount CB13 For ESD request

8. 11/28 05 Mount CC63 For ESD request

9. 12/03 38 Add S&C 14640/14641 co-layout circuit Reserved for S&C SPEC update

VFKAA LA-9863P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.2 to 0.3 GERBER-OUT DATE: 2013/01/23

NO DATE PAGE MODIFICATION LIST PURPOSE

1. 12/19 41 Change CB13 to SE071101J80 (100pF) ESD request

C C

3. 01/16 41 Add RB12, RB37, connect EC_MUTE_INT from codec to EC To solve audio "bo" sound issue

5. 01/16 13 Connect GPIO12 as GPS_DOWN# to EC For GPS function

Change RV43 to 270K, RV53 to 10K, RV54 to 33K 1712/262. For VGA power sequence

For ME drawing updateModify JTP pin define4201/164.

Mount RH382601/166. For EMI request

For EMI requestReserve R266, R2672201/167.

B B

A A

Security Classification

Issued Date

5

4

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

2012/12/07 2013/12/07

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2

Title

Size Document Number Rev

Compal Electronics, Inc.

HW-PIR

1

Compal LA-9863P Schematics Rev1.0

Specifications and Main Features

Frequently Asked Questions

User Manual