Compal LA-9862P VFKTA Rosetta 10FT, Satellite L40, LA-9862P VFKTA Rosetta 10FTG Schematic

A

1 1

B

C

D

E

VFKTA

Rosetta 10FT/10FTG

2 2

LA-9862P REV 1.0 Schematic

Intel Processor (Ivy Bridge/Sandy Bridge)+

3 3

PCH(Panther Point)

2013-02-06 Rev 1.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OFC OMPALEL ECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OFC OMPALEL ECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OFC OMPALEL ECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

VFKTA

1 46Monday, March 11, 2013

E

1.0

A

B

C

D

E

Intel CPU Ivy Bridge

17W

1 1

eDP 1.1 2x

2.7GT/s

BGA-1023

31mm*24mm

page 5,6,7,8,9,10

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 1066/1333/1600 MT/s

200pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

page 11,12

FDI X8

2.7GT/s

LVDS & eDP Conn.

page 13

2 2

HDMI Conn.

RJ45 Conn.

page 15

RTL8106E & 8111G

PCIe port 1

USB Left

USB20 port 2

page 27

PCIe Gen1 1x

1.5V 5GT/s

USB20 2x

5V 480MHz

To sub-board

3 3

RTC CKT.

page 16

SPI ROM (4MB)

page 16

Intel PCH Panther Point

FCBGA-989

25mm*25mm

page 16,17,18,19,20,21,22,23,24

LPC BUS

3.3V 33 MHz

KB9012

page 32

DMI X4

5GT/s

HD Audio

3.3V 24MHz

USB30 2x

5V 5GT/s

USB20 3x

5V 480MHz

USB20 2x

5V 480MHz

PCIe Gen1 1x

1.5V 5GT/s

USB20 2x

5V 480MHz

SATA Gen3 1x

5V 6GHz(600MB/s)

SA

TA Gen2 1x

5V 3GHz(300MB/s)

HDA Codec

ALC259/269

page 30

USB Right

USB20 port 0,1 USB30 port 1,2

page 29

CardReader GL834L

USB20 port 8

page 28

Int. Camera

PCIeMini Card WLAN and BT

PCIe port 2 &USB port 9

page 26

SATA HDD

SATA port 0

page 25

SATA ODD

SATA port 2

page 25

USB port 11

page 22

DC/DC Interface CKT.

page 34

Power Circuit DC/DC

page 35,36,37,38,39,40, 41,42,43

Touch Pad

Int.KBD

page 33page 33

G-Sensor

page 25

LED+LID/B

page 33

SPK Conn

page 31

JPIO (HP & MIC)

page 31

GCLK

4 4

SLG3NB244VTR

Power/B

A

page 26

page 33

To sub-board

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OFC OMPALEL ECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OFC OMPALEL ECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OFC OMPALEL ECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

VFKTA

2 46Monday, March 11, 2013

E

1.0

5

4

3

2

1

DESIGN CURRENT 0.1A

B+

Ipeak=8.5A, Imax=5.95A, Iocp min=10.2

DESIGN CURRENT 5A

+3VL

+5VALW

PCH_PWR_EN#

D D

SUSP#

SY8032ABC

P-CHANNEL

AO-3413

DESIGN CURRENT 2A

+5VALW_PCH

+1.8VS

SUSP#

TPS22966DPUR

RT8243AZQW

KB_LED

P

-CHANNEL AO-3413

+5VS

LDO

G9191-330T1U

ODD_EN#

P-CHANNEL

AO-3413

Ipeak=5A, Imax=3.5A, Iocp min=6.12A

C C

WOWL_EN#

P-CHANNEL

AO-3413

DESIGN CURRENT 6A

DESIGN CURRENT 400mA

DESIGN CURRENT 300mA

DESIGN CURRENT 1.6A

DESIGN CURRENT 5A

DESIGN CURRENT 330mA

DESIGN CURRENT 3A

+5VS

+5VS_LED

+3VS_HDP

+5VS_ODD

+3VALW

+3V_LAN

+3V_WLAN

PCH_PWR_EN#

+3VALW_PCH

+3VS

+LCD_VDD

SUSP#

TPS22966DPUR

P-CHANNEL

AO-3413

LCD_ENVDD

APL3512ABI

DESIGN CURRENT 6A

DESIGN CURRENT 1.5A

VR_ON

B B

ISL95833HRTZ

USP#

S

SY8208DQNC

Ipeak=14.37A, Imax=10.06A, Iocp min=17.24A

VCCP_PWRGOOD

SYSON

RT8207MZQW

G978F11U

Ipeak=16.66A, Imax=11.66A, Iocp min=20A

0.75VR_ON

DESIGN CURRENT 65A

DESIGN CURRENT 40A

DESIGN CURRENT 6A

DESIGN CURRENT 2A

DESIGN CURRENT 1.5A

+CPU_CORE

+GFX_CORE

+1.05VS_VCCP

+VCCSA

+1.5V

+0.75VS

SUSP

N

-CHANNEL

FDS6676AS

A A

5

4

DESIGN CURRENT 2A

+1.5V_CPU

+1.5VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WI THOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WI THOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WI THOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Power Tree

VFKTA

1

of

3 46Monday, March 11, 2013

of

3 46Monday, March 11, 2013

of

3 46Monday, March 11, 2013

1.0

A

Voltage Rails

power plane

1 1

State

( O MEANS ON X MEANS OFF )

+RTCVCC

B+

+5VL

+3VL

+5VALW

+3VALW

+VSB

B

C

D

E

BTO Option Table

+1.5V

+5VS

+3VS

+1.8VS

+1.5VS

+1.5V_CPU

+0.75VS

+CPU_CORE

+GFX_CORE

+VCCSA

+1.05VS_VCCP

+

3V_WLAN

+3V_LAN

+LCD_VDD

Function

description

explain

BTO

Function

description

explain

BTO

IVB i5 3337U

CPUI53337UR1@

CPUI53337UR3@

LVDS-eDP

LVDS eDP

LVDS@ IEDP@

IVB i3 3227U

CPUI33227UR1@

CPUI33227UR3@

Camera & Mic

CAM_EMI@

CPU

IVB i3 2375M

CPUI32375MR1@

CPUI32375MR3@

USB S&C

14640

14641

14640

14641

14640@

14641@

IVB P 2117U

CPUP2117UR1@

CPUP2117UR3@

CRT@ CRT_EMI@ NOCRT@

IVB C 847

IVB C 847IVB P 2117U

CPUC847R1@

CPUC847R3@ HM76R3@ HM70R3@

CRT

w/ CRT w/o CRT

HM76 HM70

HM76R1@ HM70R1@

KB9012

9012@

PCH

Panther Point

EC

NPCE885N

885@

S0

S1

S3

2 2

S5 S4/AC

S5 S4/ Bat tery only

S5 S4/AC & Battery don't exis t

O

X

O

X

O

X

O

X X

X

X X

OO

X

description

explain

BTO

Function

X

description

explain

BTO

Function

WOWL

w/o

w/

NOWOWL@

WOWL@

Sleep & Music

w/ S&M w/o S&M

269@ 259@

G-SENSOR

GSENSOR@

KB Light

KBL@

ZPODD

w/

w/o

ZPODD@

NONZP@

EMI/ESD/RF part

EM

EMI@ @EMI@ ESD@ @ESD@ @RF@

GCLK

GCLK non-GCLK

GCLK@

I/ESD/RF part

non-GCLK

NOGCLK@

Touch Screen

TOUCH_EMI@

ISPD

HDMI Logo

HDMI45@

Red Word: always un-mount

PCH SM Bus Address

HEX

0001 0110 bSmart Battery

0011 0101 b35 HUSB S&C 14640+3VL

Address

1010 0000 bA0 H

1010 0100 bA4 H

Po

+3VS

EC SM Bus2 Address

Device

werPower

10/22A Add G-sensor reference Hemen

96 H

40 H

X

1001 0110 bPCH

0100 0000 b

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LOW LOWLOW

SIGNAL

SLP_S3# SLP_S4# SLP_S5#

HIGH HIGHHIGH

LOW

LOW LOW

HIGH HIGHHIGH

HIGH

LOW LOWLOW

HIGH

VS

Device

DDR SO-DIMM 0

DDR SO-DIMM 1

Power

+3VS

+3

+3VS 2C H 0010 1100 bTouch Pad

3 3

EC SM Bus1 Address

Device Address Address

+3VL

10/22A Add Smart Charger SMBus address: 0x12 Hemen we Add already

4 4

HEX HE

16 H

12 HSmart Charger 0001 0010 b+3VL +3VS G-Sensor

HEXDevice AddressPower

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

VFKTA

4 46Monday, March 11, 2013

E

1.0

A

@

12

PM_DRAM_PWR GD_R

CC621000P_0402_50V7K

ESD@

1 2

ESD@

1 2

CC20

1 1

100P_0402_50V8J

H_PWRGOOD_R

CC63180P_0402_50V8J

H_THERMTRIP#

by ESD requestion and place near CPU

+1.05VS_VCCP

12

DRAMPWROK

+3VS

DRAMPWROK

12

RC44 62_0402_5%

RC45 10K_0402_5%

2 2

+3VALW_PCH

RC11 200_0402_5%

DRAMPWROK18

H_PROCHOT#

H_PWRGOOD

@

12

CC701000P_0402_50V7K

@

12

CC671000P_0402_50V7K

@

12

CC661000P_0402_50V7K

H_PECI

H_PM_SYNC

BUF_CPU_RST#

Please place near JCPU

+3VALW_PCH

02/20 Delete CC33 0.1U

UC3

5

1

12

B

2

A

74AHC1G09GW_TSSOP5

P

4

PM_SYS_PWRGD_BUF

O

G

3

10K_0402_5%

RC13

21

11/30 Change CC63 from @ESD@ to ESD@ for ESD request

32

21

H_PROCHOT#32

H_THERMTRIP#

H_PM_SYNC18

H_PWRGOOD21

+1.5V_CPU

12

RC14 200_0402_5%

B

H_SNB_IVB#

H_PECI

T1 PAD TP@

T2 PAD TP@

1 2

RC170 130_0402_5%

H_SNB_IVB#

TP_SKTOCC#

H_CATERR#

H_PECI

RC159

1 2

H_PROCHOT#_R

56_0402_5%

H_THERMTRIP#

H_PM_SYNC

1 2

H_PWRGOOD_R

Rshort@

RC183 0_0402_5%

PM_DRAM_PWR GD_RPM_SYS_PW RGD_BUF

BUF_CPU_RST#

UC1B

F49

PROC_SELECT#

C57

PROC_DETECT#

C49

CATERR#

A48

PECI

C45

PROCHOT#

D45

THERMTRIP#

C48

PM_SYNC

B46

UNCOREPWRGOOD

BE45

SM_DRAMPWR OK

D44

RESET#

IVY-BRIDGE_BGA1023

P

U@

C

MISC THERMAL PWR MANAGEMENT

CLOCKS

DDR3

JTAG & BPM

DPLL_REF_CLK

DPLL_REF_CLK#

SM_DRAMRST#

MISC

BCLK

BCLK#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PRDY#

PREQ#

TCK TMS

TRST#

TDO

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

TDI

<BOM>

J3 H2

AG3 AG1

AT30

BF44 BE43 BG43

N53 N55

L56 L55 J58

M60 L59

K58

G58 E55 E59 G55 G59 H60 J59 J61

100 MHz

CLK_CPU_DMI CLK_CPU_DMI#

120 MHz

CLK_CPU_EDP CLK_CPU_EDP#

H_DRAMRST#

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

XDP_TCK XDP_TMS XDP_TRST#

XDP_TDI XDP_TDO

D

CLK_CPU_DMI CLK_CPU_DMI#

CLK_CPU_EDP CLK_CPU_EDP#

H_DRAMRST#

RC56 140_0402_1% RC59 25.5_0402_1% RC61 200_0402_1%

12 12 12

T3 PADTP@ T4 PADTP@

1 2

RC55 51_0402_5%

T6 PADTP@ T7 PADTP@

Close to CPU side

Stuff RC158&RC157 if do not support eDP

17 17

CLK_CPU_EDP#

17 17

CLK_CPU_EDP

7

by ESD requestion and place near CPU

DDR3 Compensati on Signals Layout Note:Pla ce these resistors near Processor

E

LVDS@

1 2

RC157 1K_0402_5%

1 2

RC158 1K_0402_5%

LVDS@

@ESD@

H_DRAMRST#

1 2

CC34 180P_0402_50V8J

ESD@

1 2

100P_0402_50V8J

CC35

Routed as a sin gle daisy chain

+1.05VS_VCCP

3 3

Buffered Rest to CPU

+3VS

02/20 Delete CC36 0.1U

PLT_RST# 20,26,27,32

UC2

PLT_RST#

4 4

1

OE#

IN

GND

VCC

OUT

A

2

3

74AHC1G125GW_SOT353-5

5

4

BUFO_CPU_RST# BUF_CPU_RST#

+1.05VS_VCCP

12

RC38 75_0402_5%

43_0402_1%

1 2

RC35

B

XDP Connector

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

Issued Date

For power consumption

+5VS +3VS

Rshort@

1A

1 2

R1

0_0603_5%

32

FAN_SPEED1

02/20 change R1 to short pad for part count reduce

Compal Secret Data

2012/04/19 2015/04/19

C

Compal Secret Data

Deciphered Date

D

FAN Control Circuit

12

R2 10K_0402_5%

FANPWM32

+FAN1

02/20 Delete C4 0.01U

12

D1

BAS16_SOT23-3

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Ivy Bridge_JTAG/XDP/FAN

VFKTA

1

C5

2

10U_0603_6.3V6M

E

JFAN

Conn@

6

GND

5

GND

4

3

2

1

ACES_50273-0040N-001

5 46Monday, March 11, 2013

1.0

A

1 1

2 2

eDP_COMP signals should be shorted near balls and routed with typical impedance <25m ohm

3 3

02/20 Swap H_EDP_TXN[0\1] to H_EDP_TXP[0\1]

10/24 SWAP pin H_EDP_AUXN/P

+1.05VS_VCCP

18

DMI_PTX_CRX_N0

18

DMI_PTX_CRX_N1

18

DMI_PTX_CRX_N2

18

DMI_PTX_CRX_N3

18

DMI_PTX_CRX_P0

18

DMI_PTX_CRX_P1

18

DMI_PTX_CRX_P2

18

DMI_PTX_CRX_P3

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

18

FDI_CTX_PRX_N0

18

FDI_CTX_PRX_N1

18

FDI_CTX_PRX_N2

18

FDI_CTX_PRX_N3

18

FDI_CTX_PRX_N4

18

FDI_CTX_PRX_N5

18

FDI_CTX_PRX_N6

18

FDI_CTX_PRX_N7

18

FDI_CTX_PRX_P0

18

FDI_CTX_PRX_P1

18

FDI_CTX_PRX_P2

18

FDI_CTX_PRX_P3

18

FDI_CTX_PRX_P4

18

FDI_CTX_PRX_P5

18

FDI_CTX_PRX_P6

18

FDI_CTX_PRX_P7

FDI_FSYNC018 FDI_FSYNC118

FDI_INT18

FDI_LSYNC018 FDI_LSYNC118

1 2

RC2 24.9_0402_1%

H_EDP_AUXN13 H_EDP_AUXP13

13

H_EDP_TXN0

13

H_EDP_TXN1

13

H_EDP_TXP0

13

H_EDP_TXP1

B

DMI_PTX_CRX_N0 DMI_PTX_CRX_N1 DMI_PTX_CRX_N2 DMI_PTX_CRX_N3

DMI_PTX_CRX_P0 DMI_PTX_CRX_P1 DMI_PTX_CRX_P2 DMI_PTX_CRX_P3

DMI_CTX_PRX_N0

18

DMI_CTX_PRX_N1

18

DMI_CTX_PRX_N2

18

DMI_CTX_PRX_N3

18

DMI_CTX_PRX_P0

18

DMI_CTX_PRX_P1

18

DMI_CTX_PRX_P2

18

DMI_CTX_PRX_P3

18

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT

FDI_LSYNC0 FDI_LSYNC1

EDP_COMP

H_EDP_HPD#

UC1A

M2

DMI_RX#[0]

P6

DMI_RX#[1]

P1

DMI_RX#[2]

P10

DMI_RX#[3]

N3

DMI_RX[0]

P7

DMI_RX[1]

P3

DMI_RX[2]

P11

DMI_RX[3]

K1

DMI_TX#[0]

M8

DMI_TX#[1]

N4

DMI_TX#[2]

R2

DMI_TX#[3]

K3

DMI_TX[0]

M7

DMI_TX[1]

P4

DMI_TX[2]

T3

DMI_TX[3]

U7

FDI0_TX#[0]

W11

FDI0_TX#[1]

W1

FDI0_TX#[2]

AA6

FDI0_TX#[3]

W6

FDI1_TX#[0]

V4

FDI1_TX#[1]

Y2

FDI1_TX#[2]

AC9

FDI1_TX#[3]

U6

FDI0_TX[0]

W10

FDI0_TX[1]

W3

FDI0_TX[2]

AA7

FDI0_TX[3]

W7

FDI1_TX[0]

T4

FDI1_TX[1]

AA3

FDI1_TX[2]

AC8

FDI1_TX[3]

AA11

FDI0_FSYNC

AC12

FDI1_FSYNC

U11

FDI_INT

AA10

FDI0_LSYNC

AG8

FDI1_LSYNC

AF3

eDP_COMPIO

AD2

eDP_ICOMPO

AG11

eDP_HPD#

AG4

eDP_AUX#

AF4

eDP_AUX

AC3

eDP_TX#[0]

AC4

eDP_TX#[1]

AE11

eDP_TX#[2]

AE7

eDP_TX#[3]

AC1

eDP_TX[0]

AA4

eDP_TX[1]

AE10

eDP_TX[2]

AE6

eDP_TX[3]

IVY-BRIDGE_BGA1023

P

U@

C

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

<BOM>

G3 G1 G4

H22 J21 B22 D21 A19 D17 B14 D13 A11 B10 G8 A8 B6 H8 E5 K7

K22 K19 C21 D19 C19 D16 C13 D12 C11 C9 F8 C8 C5 H6 F6 K6

G22 C23 D23 F21 H19 C17 K15 F17 F14 A15 J14 H13 M10 F10 D9 J4

F22 A23 D24 E21 G19 B18 K17 G17 E14 C15 K13 G13 K10 G10 D8 K4

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

DMI Intel(R) FDI

PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PCI EXPRESS -- GRAPHICS

eDP

PEG_COMP

RC1

24.9_0402_1%

+1.05VS_VCCP

12

D

PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical impedance = 43 m ohm (4 mils) PEG_ICOMPO signals should be routed with max length = 500 mils

- typical impedance = 14.5 m ohm (12 mils)

E

RC10 1K_0402_5%

1 2

H_EDP_HPD#

13

D

2N7002_SOT23-3

CPU_EDP_HPD13

4 4

A

2

G

IEDP@

RC9 100K_0402_5%

1 2

QC1

IEDP@

S

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Ivy Bridge_DMI/PEG/FDI

VFKTA

6 46Monday, March 11, 2013

E

1.0

A

11

DDR_A_D[0..63]

UC1C

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6

1 1

2 2

DDR_A_BS0 DDR_A_BS1

3 3

DDR_A_BS2

DDR_A_CAS# DDR_A_RAS#

DDR_A_WE#

DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_A_CAS# DDR_A_RAS# DDR_A_WE#

AG6

SA_DQ[0]

AJ6

SA_DQ[1]

AP11

SA_DQ[2]

AL6

SA_DQ[3]

AJ10

SA_DQ[4]

AJ8

SA_DQ[5]

AL8

SA_DQ[6]

AL7

SA_DQ[7]

AR11

SA_DQ[8]

AP6

SA_DQ[9]

AU6

SA_DQ[10]

AV9

SA_DQ[11]

AR6

SA_DQ[12]

AP8

SA_DQ[13]

AT13

SA_DQ[14]

AU13

SA_DQ[15]

BC7

SA_DQ[16]

BB7

SA_DQ[17]

BA13

SA_DQ[18]

BB11

SA_DQ[19]

BA7

SA_DQ[20]

BA9

SA_DQ[21]

BB9

SA_DQ[22]

AY13

SA_DQ[23]

AV14

SA_DQ[24]

AR14

SA_DQ[25]

AY17

SA_DQ[26]

AR19

SA_DQ[27]

BA14

SA_DQ[28]

AU14

SA_DQ[29]

BB14

SA_DQ[30]

BB17

SA_DQ[31]

BA45

SA_DQ[32]

AR43

SA_DQ[33]

AW48

SA_DQ[34]

BC48

SA_DQ[35]

BC45

SA_DQ[36]

AR45

SA_DQ[37]

AT48

SA_DQ[38]

AY48

SA_DQ[39]

BA49

SA_DQ[40]

AV49

SA_DQ[41]

BB51

SA_DQ[42]

AY53

SA_DQ[43]

BB49

SA_DQ[44]

AU49

SA_DQ[45]

BA53

SA_DQ[46]

BB55

SA_DQ[47]

BA55

SA_DQ[48]

AV56

SA_DQ[49]

AP50

SA_DQ[50]

AP53

SA_DQ[51]

AV54

SA_DQ[52]

AT54

SA_DQ[53]

AP56

SA_DQ[54]

AP52

SA_DQ[55]

AN57

SA_DQ[56]

AN53

SA_DQ[57]

AG56

SA_DQ[58]

AG53

SA_DQ[59]

AN55

SA_DQ[60]

AN52

SA_DQ[61]

AG55

SA_DQ[62]

AK56

SA_DQ[63]

BD37

11

SA_BS[0]

BF36

11

SA_BS[1]

BA28

11

SA_BS[2]

BE39

11

SA_CAS#

BD39

11

SA_RAS#

AT41

11

SA_WE#

DDR SYSTEM MEMORY A

B

SA_CK[0] SA_CK#[0] SA_CKE[0]

SA_CK[1] SA_CK#[1] SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

C

12

DDR_B_D[0..63]

UC1D

AU36

DDRA_CLK0

AV36

DDRA_CLK0#

AY26

DDRA_CKE0

AT40

DDRA_CLK1 DDRB_ CLK1

AU40

DDRA_CLK1# DDRB_ CLK1#

BB26

DDRA_CKE1 DDRB_CKE1

BB40

DDRA_SCS0# DDRB_SCS0#

BC41

DDRA_SCS1#

AY40

DDRA_ODT0 DDRB_ODT0

BA41

DDRA_ODT1

AL11

DDR_A_DQS#0

AR8

DDR_A_DQS#1

AV11

DDR_A_DQS#2

AT17

DDR_A_DQS#3

AV45

DDR_A_DQS#4

AY51

DDR_A_DQS#5

AT55

DDR_A_DQS#6

AK55

DDR_A_DQS#7

AJ11

DDR_A_DQS0

AR10

DDR_A_DQS1

AY11

DDR_A_DQS2

AU17

DDR_A_DQS3

AW45

DDR_A_DQS4

AV51

DDR_A_DQS5

AT56

DDR_A_DQS6

AK54

DDR_A_DQS7

BG35

DDR_A_MA0

BB34

DDR_A_MA1

BE35

DDR_A_MA2

BD35

DDR_A_MA3

AT34

DDR_A_MA4

AU34

DDR_A_MA5

BB32

DDR_A_MA6

AT32

DDR_A_MA7

AY32

DDR_A_MA8

AV32

DDR_A_MA9

BE37

DDR_A_MA10

BA30

DDR_A_MA11

BC30

DDR_A_MA12

AW41

DDR_A_MA13

AY28

DDR_A_MA14

AU26

DDR_A_MA15

DDRA_CLK0 DDRA_CLK0# DDRA_CKE0

DDRA_CLK1 DDRA_CLK1# DDRA_CKE1

DDRA_SCS0# DDRA_SCS1#

DDRA_ODT0 DDRA_ODT1

DDR_A_MA[0..15]

DDR_A_DQS#[0..7]

DDR_A_DQS[0..7]

11 11 11

11 11

11

DDR_B_BS0 DDR_B_BS1 DDR_B_BS2

DDR_B_CAS# DDR_B_RAS#

DDR_B_WE#

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_BS0 DDR_B_BS1 DDR_B_BS2

DDR_B_CAS# DDR_B_RAS# DDR_B_WE#

AL4

SB_DQ[0]

AL1

SB_DQ[1]

AN3

SB_DQ[2]

AR4

SB_DQ[3]

AK4

SB_DQ[4]

AK3

SB_DQ[5]

AN4

SB_DQ[6]

AR1

SB_DQ[7]

AU4

SB_DQ[8]

AT2

SB_DQ[9]

AV4

SB_DQ[10]

BA4

SB_DQ[11]

AU3

SB_DQ[12]

AR3

SB_DQ[13]

AY2

SB_DQ[14]

BA3

SB_DQ[15]

BE9

SB_DQ[16]

BD9

SB_DQ[17]

BD13

SB_DQ[18]

BF12

SB_DQ[19]

BF8

SB_DQ[20]

BD10

SB_DQ[21]

BD14

SB_DQ[22]

BE13

SB_DQ[23]

BF16

SB_DQ[24]

BE17

SB_DQ[25]

BE18

SB_DQ[26]

BE21

SB_DQ[27]

BE14

SB_DQ[28]

BG14

SB_DQ[29]

BG18

SB_DQ[30]

BF19

SB_DQ[31]

BD50

SB_DQ[32]

BF48

SB_DQ[33]

BD53

SB_DQ[34]

BF52

SB_DQ[35]

BD49

SB_DQ[36]

BE49

SB_DQ[37]

BD54

SB_DQ[38]

BE53

SB_DQ[39]

BF56

SB_DQ[40]

BE57

SB_DQ[41]

BC59

SB_DQ[42]

AY60

SB_DQ[43]

BE54

SB_DQ[44]

BG54

SB_DQ[45]

BA58

SB_DQ[46]

AW59

SB_DQ[47]

AW58

SB_DQ[48]

AU58

SB_DQ[49]

AN61

SB_DQ[50]

AN59

SB_DQ[51]

AU59

SB_DQ[52]

AU61

SB_DQ[53]

AN58

SB_DQ[54]

AR58

SB_DQ[55]

AK58

SB_DQ[56]

AL58

SB_DQ[57]

AG58

SB_DQ[58]

AG59

SB_DQ[59]

AM60

SB_DQ[60]

AL59

SB_DQ[61]

AF61

SB_DQ[62]

AH60

SB_DQ[63]

BG39

12

SB_BS[0]

BD42

12

SB_BS[1]

AT22

12

SB_BS[2]

AV43

12

SB_CAS#

BF40

12

SB_RAS#

BD45

12

SB_WE#

D

BA34

SB_CK[0]

AY34

SB_CK#[0]

AR22

SB_CKE[0]

BA36

SB_CK[1]

BB36

SB_CK#[1]

BF27

SB_CKE[1]

BE41

SB_CS#[0]

BE47

SB_CS#[1]

AT43

SB_ODT[0]

BG47

SB_ODT[1]

AL3

SB_DQS#[0]

AV3

SB_DQS#[1]

BG11

SB_DQS#[2]

BD17

SB_DQS#[3]

BG51

SB_DQS#[4]

BA59

SB_DQS#[5]

AT60

SB_DQS#[6]

AK59

SB_DQS#[7]

AM2

SB_DQS[0]

AV1

SB_DQS[1]

BE11

SB_DQS[2]

BD18

SB_DQS[3]

BE51

SB_DQS[4]

BA61

SB_DQS[5]

AR59

SB_DQS[6]

AK61

SB_DQS[7]

DDR SYSTEM MEMORY B

BF32

SB_MA[0]

BE33

SB_MA[1]

BD33

SB_MA[2]

AU30

SB_MA[3]

BD30

SB_MA[4]

AV30

SB_MA[5]

BG30

SB_MA[6]

BD29

SB_MA[7]

BE30

SB_MA[8]

BE28

SB_MA[9]

BD43

SB_MA[10]

AT28

SB_MA[11]

AV28

SB_MA[12]

BD46

SB_MA[13]

AT26

SB_MA[14]

AU22

SB_MA[15]

DDRB_CLK0 DDRB_CLK0# DDRB_CKE0

DDRB_SCS1#

DDRB_ODT1

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8

DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

DDRB_CLK0 DDRB_CLK0# DDRB_CKE0

DDRB_CLK1 DDRB_CLK1# DDRB_CKE1

DDRB_SCS0# DDRB_SCS1#

DDRB_ODT0 DDRB_ODT1

DDR_B_DQS#[0..7]

DDR_B_DQS[0..7]

DDR_B_MA[0..15]

E

12 12 12

12 12

12

IVY-BRIDGE_BGA1023

P

U@

C

2013/02/06 change QC3 to SB00000PF00 for X1 code

QC3

D

S

13

H_DRAMRST#5

RC78

RC73

1 2

Rshort@

0_0402_5%

4.99K_0402_1%

1 2

DRAMRST_CNTRL

11/28 Change RC73 to 0 ohm

4 4

(do not use short pad on this location)

DRAMRST_CNTRL_PC H9,17

2013/02/06 PVT Delete RC3.

A

DDR3_DRAMRST#_RH_DRAMRST#

BSS138_NL_SOT23-3

G

2

02/20 Change RC73 to short pad for part count reduce

1

CC37

0.047U_0402_25V6K

2

<BOM>

+1.5V

12

RC76

1K_0402_5%

RC77 1K_0402_5%

1 2

2013/02/06 Confim with rick_Chu , delete CC22 , because HW timing

B

SM_DRAMRST#

11,12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

IVY-BRIDGE_BGA1023

P

U@

C

Compal Secret Data

Deciphered Date

<BOM>

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Ivy Bridge_DDR3

VFKTA

7 46Monday, March 11, 2013

E

1.0

A

B

C

D

E

+CPU_CORE +1.05VS_VCCP

1 1

2 2

3 3

UC1F

A26

VCC[1]

A29

VCC[2]

A31

VCC[3]

A34

VCC[4]

A35

VCC[5]

A38

VCC[6]

A39

VCC[7]

A42

VCC[8]

C26

VCC[9]

C27

VCC[10]

C32

VCC[11]

C34

VCC[12]

C37

VCC[13]

C39

VCC[14]

C42

VCC[15]

D27

VCC[16]

D32

VCC[17]

D34

VCC[18]

D37

VCC[19]

D39

VCC[20]

D42

VCC[21]

E26

VCC[22]

E28

VCC[23]

E32

VCC[24]

E34

VCC[25]

E37

VCC[26]

E38

VCC[27]

F25

VCC[28]

F26

VCC[29]

F28

VCC[30]

F32

VCC[31]

F34

VCC[32]

F37

VCC[33]

F38

VCC[34]

F42

VCC[35]

G42

VCC[36]

H25

VCC[37]

H26

VCC[38]

H28

VCC[39]

H29

VCC[40]

H32

VCC[41]

H34

VCC[42]

H35

VCC[43]

H37

VCC[44]

H38

VCC[45]

H40

VCC[46]

J25

VCC[47]

J26

VCC[48]

J28

VCC[49]

J29

VCC[50]

J32

VCC[51]

J34

VCC[52]

J35

VCC[53]

J37

VCC[54]

J38

VCC[55]

J40

VCC[56]

J42

VCC[57]

K26

VCC[58]

K27

VCC[59]

K29

VCC[60]

K32

VCC[61]

K34

VCC[62]

K35

VCC[63]

K37

VCC[64]

K39

VCC[66]

K42

VCC[67]

L25

VCC[68]

L28

VCC[69]

L33

VCC[70]

L36

VCC[71]

L40

VCC[72]

N26

VCC[73]

N30

VCC[74]

N34

VCC[75]

N38

VCC[76]

POWER

CORE SUPPLY

8.5A33A

AF46

VCCIO[1]

AG48

VCCIO[3]

AG50

VCCIO[4]

AG51

VCCIO[5]

AJ17

VCCIO[6]

AJ21

VCCIO[7]

AJ25

VCCIO[8]

AJ43

VCCIO[9]

AJ47

VCCIO[10]

AK50

VCCIO[11]

AK51

VCCIO[12]

AL14

VCCIO[13]

AL15

VCCIO[14]

AL16

VCCIO[15]

AL20

VCCIO[16]

AL22

VCCIO[17]

AL26

VCCIO[18]

AL45

VCCIO[19]

AL48

VCCIO[20]

AM16

VCCIO[21]

AM17

VCCIO[22]

AM21

VCCIO[23]

AM43

VCCIO[24]

AM47

VCCIO[25]

AN20

VCCIO[26]

AN42

VCCIO[27]

AN45

VCCIO[28]

AN48

VCCIO[29]

AA14

VCCIO[30]

AA15

VCCIO[31]

AB17

VCCIO[32] VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49]

VCCIO50 VCCIO51

1mA

VCCIO_SEL

VCCPQE[1] VCCPQE[2]

VIDALERT#

VIDSCLK VIDSOUT

AB20 AC13 AD16 AD18 AD21 AE14 AE15 AF16 AF18 AF20 AG15 AG16 AG17 AG20 AG21 AJ14 AJ15

+1.05VS_VCCP

W16 W17

BC22

+1.05VS_VCCP

AM25 AN22

A44

H_CPU_SVIDALRT#

B43 C44

PEG IO AND DDR IO

RAILS

For DDR

For PEG

1

CC71 1U_0402_6.3V6K

2

+1.05VS_VCCP

1

CC17

2

ESD@

100P_0402_50V8J

1

CC19

CC18

2

ESD@

100P_0402_50V8J

by ESD requestion and place near CPU

11/30 install 3 CAP(100pF)CC17,CC18,CC19 on +1.05Vs_Vccp and must close to CPU

+1.05VS_VCCP+1.05VS_VCCP

12

RC91 130_0402_5%

1 2

RC90 43_0402_1%

+CPU_CORE

12

RC89 75_0402_5%

VR_SVID_ALRT# VR_SVID_CLK VR_SVID_DAT

Pu

ll high resistor on VR side

42 42 42

RC93 100_0402_1%

Issued Date

1 2

12

40

RC97 100_0402_1%

Close to CPU

C

VCCSENSE VSSSENSE

2012/04/19 2015/04/19

42 42

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Ivy Bridge_POWER-1

VFKTA

8 46Monday, March 11, 2013

E

1.0

<BOM>

F43 G43

AN16 AN17

VCCIO_SENSE

12

RC96 10_0402_1%

Close to CPU

VCCIO_SENSE

12

RC98 10_0402_1%

+1.05VS_VCCP

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

VCC_SENSE VSS_SENSE

4 4

IVY-BRIDGE_BGA1023

P

U@

C

A

VCCIO_SENSE

VSS_SENSE_VCCIO

SENSE LINES SVID QUIET

B

A

B

C

D

E

+GFX_CORE

UC1G

A

29

AA46

VAXG[1]

AB47

VAXG[2]

AB50

VAXG[3]

AB51

1 1

2 2

+GFX_CORE

12

RC105 100_0402_1%

C

lose to CPU

VCC_AXG_SENSE

1

2

10U_0603_6.3V6M

1U_0402_6.3V6K

VSS_AXG_SENSE

1 2

+1.8VS_VCCPLL

CC60

1

2

CC43

2

12

1

10U_0603_6.3V6M

CC75

1

2

1U_0402_6.3V6K

42 42

RC106

100_0402_1%

02/20 Delete CC61

1U_0402_6.3V6K

CC40

@

47U_0805_6.3V6M

CC74

CC73

1

2

1U_0402_6.3V6K

VCC_AXG_SENSE VSS_AXG_SENSE

3 3

4 4

VCCPLL Decoupling: 1X 330U (6m ohm), 1X 10U, 2x1U

02/20 change RC119 to short pad

Reserve for power consumption R

emove on PVT phase

+VCCSA Decoupling: 2X 47U (MLCC), 3X 10U, 5X 1U

11/28 Change CC44 100u to 0805 size (SE00000PL00), Add CC40 (SE00000PL00)

1 2

+1.8VS

RC119 0_0805_5%

+VCCSA

Rshort@

CC44

12

@

47U_0805_6.3V6M

10U_0603_6.3V6M

CC42

2

1

CC77

1

2

A

CC59

Place TOP IN BGA

CC41

2

1

10U_0603_6.3V6M

lace BOT OUT BGA

P

CC76

1

2

1U_0402_6.3V6K

VAXG[4]

AB52

VAXG[5]

AB53

VAXG[6]

AB55

VAXG[7]

AB56

VAXG[8]

AB58

VAXG[9]

AB59

VAXG[10]

AC61

VAXG[11]

AD47

VAXG[12]

AD48

VAXG[13]

AD50

VAXG[14]

AD51

VAXG[15]

AD52

VAXG[16]

AD53

VAXG[17]

AD55

VAXG[18]

AD56

VAXG[19]

AD58

VAXG[20]

AD59

VAXG[21]

AE46

VAXG[22]

N45

VAXG[23]

P47

VAXG[24]

P48

VAXG[25]

P50

VAXG[26]

P51

VAXG[27]

P52

VAXG[28]

P53

VAXG[29]

P55

VAXG[30]

P56

VAXG[31]

P61

VAXG[32]

T48

VAXG[33]

T58

VAXG[34]

T59

VAXG[35]

T61

VAXG[36]

U46

VAXG[37]

V47

VAXG[38]

V48

VAXG[39]

V50

VAXG[40]

V51

VAXG[41]

V52

VAXG[42]

V53

VAXG[43]

V55

VAXG[44]

V56

VAXG[45]

V58

VAXG[46]

V59

VAXG[47]

W50

VAXG[48]

W51

VAXG[49]

W52

VAXG[50]

W53

VAXG[51]

W55

VAXG[52]

W56

VAXG[53]

W61

VAXG[54]

Y48

VAXG[55]

Y61

VAXG[56]

F45

VAXG_SENSE

G45

VSSAXG_SENSE

1.2A

BB3

VCCPLL[1]

BC1

VCCPLL[2]

BC4

VCCPLL[3]

6A

L17

VCCSA[1]

L21

VCCSA[2]

N16

VCCSA[3]

N20

VCCSA[4]

N22

VCCSA[5]

P17

VCCSA[6]

P20

VCCSA[7]

R16

VCCSA[8]

R18

VCCSA[9]

R21

VCCSA[10]

U15

VCCSA[11]

V16

VCCSA[12]

V17

VCCSA[13]

V18

VCCSA[14]

V21

VCCSA[15]

W20

VCCSA[16]

IVY-BRIDGE_BGA1023

P

U@

C

POWER

VREF

DDR3 - 1.5V RAILS

GRAPHICS

SENSE

LINES

1.8V RAIL

SA RAIL

VCCSA VID

B

SM_VREF

SA_DIMM_VREFDQ SB_DIMM_VREFDQ

VDDQ[1] VDDQ[2] VDDQ[3] VDDQ[4] VDDQ[5] VDDQ[6] VDDQ[7] VDDQ[8]

VDDQ[9] VDDQ[10] VDDQ[11] VDDQ[12] VDDQ[13] VDDQ[14] VDDQ[15] VDDQ[16] VDDQ[17] VDDQ[18] VDDQ[19] VDDQ[20] VDDQ[21] VDDQ[22] VDDQ[23] VDDQ[24] VDDQ[25] VDDQ[26]

1mA

VCCDQ[1] VCCDQ[2]

QUIET RAILS

VDDQ_SENSE

VSS_SENSE_VDDQ

VCCSA_SENSE

SENSE LINES

VCCSA_VID[0] VCCSA_VID[1]

lines

5A

+V_SM_VREF should

ave 20 mil trace width

h

<BOM>

AY43

BE7 BG7

AJ28 AJ33 AJ36 AJ40 AL30 AL34 AL38 AL42 AM33 AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33

AM28 AN26

BC43 BA43

U10

D48 D49

+V_SM_VREF

+VREF_DQA_M3 +VREF_DQB_M3

+1.5V_CPU

1

CC72 1U_0402_6.3V6K

2

H_VCCSA_VID0 H_VCCSA_VID1

Please kindly c heck whether there is pull-d own resister in PWR-side or HW-side

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

Place TOP IN BGA

CC57

CC51

2

1

10U_0603_6.3V6M

CC81

CC82

1

2

1U_0402_6.3V6K

H_VCCSA_VID0 H_VCCSA_VID1

C

RC120 1K_0402_0.5%

CC65

RC109 1K_0402_0.5%

1

2

0.1U_0402_10V7K

CC52

CC55

2

1

10U_0603_6.3V6M

Place BOT OUT BGA

CC80

CC79

1

2

1U_0402_6.3V6K

41 41

2012/04/19 2015/04/19

+1.5V_CPU

1 2

11/28 Change CC53 100u to 47U 0805 (SE00000PL00) Add CC50 (SE00000PL00)

+1.5V_CPU

CC56

CC54

2

1

10U_0603_6.3V6M

CC87

CC78

1

2

1U_0402_6.3V6K

VCCSA_VID0

0

1

+1.5V_CPU +1.5V

CC46 0.1U_0402_10V7K@

CC47 0.1U_0402_10V7K@

CC48 0.1U_0402_10V7K@

CC45 0.1U_0402_10V7K@

2013/02/06 change QC5,QH3,QH4,QW1, Q6 ,QA1 QR1 Q53 from SB00000EO10 to SB00000DH00 DVT 2nd source for X1 code issue

CC50

CC53

12

@

10U_0603_6.3V6M

CC86

1

2

1U_0402_6.3V6K

47U_0805_6.3V6M

CC85

1

2

1U_0402_6.3V6K

VCCSA_VID1

0

1

0

1

1 2

2N7002DW-T/R7_SOT363-6

Compal Secret Data

Deciphered Date

Intel DDR Vref M3

BSS138_NL_SOT23-3

+VREF_DQA_M3

+VREF_DQB_M3

BSS138_NL_SOT23-3

+1.5V_CPU Decoupling: 2X 47U(MLCC), 6X 10U, 8X 1U

+VCCSA

0.90 V

0.80 V

0.725 V

0.675 V

Vgs=10V,Id=14.5 A,Rds=6mohm

RC203

470_0805_5%

1 2 3

QC5B

5

SUSP

4

D

For Sandy Bridge

1

CC68 10U_0603_6.3V6M@

2

0.1U_0402_25V6

CC69

QC7

D

S

13

G

2

G

2

13

D

S

QC8

PJ1

JP@

2

112

JUMP_43X39

QC4

1

S

D

2

S

D

3

S

D

4

G

D

FDS6676AS_SO8

RUN_ON_CPU1.5VS3

12

1

RC205 820K_0402_5%

2

Title

Size Document Number Rev

Custom

Date: Sheet of

+VREF_DQA

DRAMRST_CNTRL_PC H

+VREF_DQB

+1.5VS+1.5V_CPU

+1.5V

8 7 6 5

Compal Electronics, Inc.

VFKTA

02/20 Delete CC83

RC204

1 2

220K_0402_5%

61

QC5A

2

SUSP

2N7002DW-T/R7_SOT363-6

Ivy Bridge_POWER-2

E

7,17

B+

9 46Monday, March 11, 2013

SUSP

34

1.0

UC1H

A13

VSS[1]

A17

VSS[2]

A21

VSS[3]

A25

VSS[4]

A28

VSS[5]

A33

VSS[6]

A37

VSS[7]

A40

VSS[8]

A45

VSS[9]

A49

AA13 AA50 AA51 AA52 AA53 AA55 AA56

AB16 AB18 AB21 AB48

AB61 AC10 AC14 AC46

AD17 AD20

AD61

AE13

AF17

AF21

AF47

AF48

AF50

AF51

AF52

AF53

AF55

AF56

AF58

AF59 AG10 AG14 AG18 AG47 AG52 AG61

AH58

AJ13 AJ16 AJ20 AJ22 AJ26 AJ30 AJ34 AJ38 AJ42 AJ45 AJ48

AK52

AL10

AL13

AL17

AL21

AL25

AL28

AL33

AL36

AL40

AL43

AL47

AL61 AM13 AM20 AM22 AM26 AM30 AM34

AC6

AD4

AE8 AF1

AG7 AH4

AK1

VSS[10]

A53

VSS[11]

A9

VSS[12]

AA1

VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20]

AA8

VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69]

AJ7

VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90]

1 1

2 2

3 3

A

VSS

VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180]

AM38 AM4 AM42 AM45 AM48 AM58 AN1 AN21 AN25 AN28 AN33 AN36 AN40 AN43 AN47 AN50 AN54 AP10 AP51 AP55 AP7 AR13 AR17 AR21 AR41 AR48 AR61 AR7 AT14 AT19 AT36 AT4 AT45 AT52 AT58 AU1 AU11 AU28 AU32 AU51 AU7 AV17 AV21 AV22 AV34 AV40 AV48 AV55 AW13 AW43 AW61 AW7 AY14 AY19 AY30 AY36 AY4 AY41 AY45 AY49 AY55 AY58 AY9 BA1 BA11 BA17 BA21 BA26 BA32 BA48 BA51 BB53 BC13 BC5 BC57 BD12 BD16 BD19 BD23 BD27 BD32 BD36 BD40 BD44 BD48 BD52 BD56 BD8 BE5 BG13

UC1I

BG17 BG21 BG24 BG28 BG37 BG41 BG45 BG49 BG53

BG9 C29 C35 C40 D10 D14 D18 D22 D26 D29 D35

D4 D40 D43 D46 D50 D54 D58

D6

E25 E29

E3

E35 E40 F13 F15 F19 F29 F35 F40 F55

G51

G6 G61 H10 H14 H17 H21

H4 H53 H58

J1 J49 J55

K11 K21 K51

K8 L16 L20 L22 L26 L30 L34 L38 L43 L48 L61

M11 M15

IVY-BRIDGE_BGA1023

C

VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240] VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249]

P

U@

B

VSS

VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258] VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301]

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11

NCTF

VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14

<BOM>

M4 M58 M6 N1 N17 N21 N25 N28 N33 N36 N40 N43 N47 N48 N51 N52 N56 N61 P14 P16 P18 P21 P58 P59 P9 R17 R20 R4 R46 T1 T47 T50 T51 T52 T53 T55 T56 U13 U8 V20 V61 W13 W15 W18 W21 W46 W8 Y4 Y47 Y58 Y59 G48

A5 A57 BC61 BD3 BD59 BE4 BE58 BG5 BG57 C3 C58 D59 E1 E61

C

UC1E

B50

T89 PADTP@

CFG0

CFG2

CFG4 CFG5 CFG6 CFG7

T87PADTP@

CFG[0]

C51

CFG[1]

B54

CFG[2]

D53

CFG[3]

A51

CFG[4]

C53

CFG[5]

C55

CFG[6]

H49

CFG[7]

A55

CFG[8]

H51

CFG[9]

K49

CFG[10]

K53

CFG[11]

F53

CFG[12]

G53

CFG[13]

L51

CFG[14]

F51

CFG[15]

D52

CFG[16]

L53

CFG[17]

H43

VCC_VAL_SENSE

K43

VSS_VAL_SENSE

H45

VAXG_VAL_SENSE

K45

VSSAXG_VAL_SENSE

F48

VCC_DIE_SENSE

H48

RSVD6

K48

RSVD7

BA19

RSVD8

AV19

RSVD9

AT21

RSVD10

BB21

RSVD11

BB19

RSVD12

AY21

RSVD13

BA22

RSVD14

AY22

RSVD15

AU19

RSVD16

AU21

RSVD17

BD21

RSVD18

BD22

RSVD19

BD25

RSVD20

BD26

RSVD21

BG22

RSVD22

BE22

RSVD23

BG26

RSVD24

BE26

RSVD25

BF23

RSVD26

BE24

RSVD27

IVY-BRIDGE_BGA1023

P

U@

C

BCLK_ITP

BCLK_ITP#

RSVD30 RSVD31 RSVD32 RSVD33

RSVD34 RSVD35 RSVD36 RSVD37 RSVD38

RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44

RESERVED

RSVD45

These pins are for s older join t

eliability and non-c ritical to

r function. For BGA on ly.

DC_TEST_A4 DC_TEST_C4 DC_TEST_D3 DC_TEST_D1

DC_TEST_A58 DC_TEST_A59 DC_TEST_C59 DC_TEST_A61 DC_TEST_C61

DC_TEST_D61 DC_TEST_BD61 DC_TEST_BE61 DC_TEST_BE59

DC_TEST_BG61 DC_TEST_BG59 DC_TEST_BG58

DC_TEST_BG4 DC_TEST_BG3 DC_TEST_BE3 DC_TEST_BG1 DC_TEST_BE1 DC_TEST_BD1

<BOM>

N59 N58

N42 L42 L45 L47

M13 M14 U14 W14 P13

AT49 K24

AH2 AG13 AM14 AM15

N50

A4 C4 D3 D1 A58 A59 C59 A61 C61 D61 BD61 BE61 BE59 BG61 BG59 BG58 BG4 BG3 BE3 BG1 BE1 BD1

D

DC_TEST_C4_D3

DC_TEST_A59_C59

DC_TEST_A61_C61

DC_TEST_BE61_BE59

DC_TEST_BG61_BG59

DC_TEST_BG3_BE3

DC_TEST_BG1_BE1

E

CFG Straps for Processor

(CFG[17:0] internal pull high 5~15K to VCCIO)

CFG2

12

RC79 1K_0402_1%

@

PEG Static Lane Reversal - CFG2 is for the 16x

1: Normal Operation; Lane # definition

atches socket pin map definition

CFG2

m

0:Lane Reversed

*

CFG4

12

RC82 1K_0402_1%

IEDP@

Embedded Display Port Presence Strap

1 : Disabled; No Physical Display Port attached to Embedded Display Port

*

CFG4

0 : Enabled; An external Display Port

evice is connected to the Embedded

d Display Port

CFG7

12

RC85 1K_0402_1%

@

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB de assertion

*

CFG7

0

: PEG Wait for BIOS for training

CFG6

CFG5

1K_0402_1%

RC83

12

RC84 1K_0402_1%

@

PCIE Port Bifurcation Straps

IVY-BRIDGE_BGA1023

P

U@

C

4 4

<BOM>

CFG[6:5]

1: (Default) x16 - Device 1 functions 1 and 2

1 disabled

*

10: x8, x8 - Device 1 function 1 enabled; function 2 disabled

1: Reserved - (Device 1 function 1 disabled;

0 function 2 enabled)

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Ivy Bridge_GND/RSVD/CFG

VFKTA

10 46Monday, March 11, 2013

E

1.0

5

4

3

2

1

+1.5V

+VREF_DQA

1

CD1

0.1U_0402_10V7K

2

D D

Close to JDDRL.1

02/20 Delete CD2, CD15

7

DDRA_CKE0

C C

7

DDR_A_BS2

7

DDRA_CLK0

7

DDRA_CLK0#

7

DDR_A_BS0

7

DDR_A_WE#

7

DDR_A_CAS#

7

DDRA_SCS1#

B B

+3VS

A A

0.1U_0402_10V7K

DDR_A_D0 DDR_A_D1

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_D26 DDR_A_D27

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

DDR_A_MA10

DDR_A_MA13

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_D58 DDR_A_D59

1

CD26

2

SPD setting (SA 0, SA1) PU/PD by Channe l A/B

->Channel A 00

->Channel B 01

5

+0.75VS

JDDR3L

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LCN_DAN06-K4406-0102

o

nn@

C

DQS#0

DQS0 VSS6

VSS8 DQ12 DQ13

VSS10

DQ14 DQ15

DQ20 DQ21

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44

DQ45 VSS35 DQS#5

DQS5 VSS38

DQ46

DQ47 VSS40

DQ52

DQ53 VSS42

VSS43

DQ54

DQ55 VSS45

DQ60

DQ61 VSS47 DQS#7

DQS7 VSS50

DQ62

DQ63 VSS52

EVENT#

DQ4 DQ5

VSS3

DQ6 DQ7

DM1

DM2

CK1

CK1#

BA1

NC2

DM4

DM6

SDA SCL

VTT2

+1.5V

2 4

DDR_A_D4

6

DDR_A_D5

8 10

DDR_A_DQS#0

12

DDR_A_DQS0

14 16

DDR_A_D6

18

DDR_A_D7

20 22

DDR_A_D12

24

DDR_A_D13

26 28 30 32 34

DDR_A_D14

36

DDR_A_D15

38 40

DDR_A_D20

42

DDR_A_D21

44 46 48 50

DDR_A_D22

52

DDR_A_D23

54 56

DDR_A_D28

58

DDR_A_D29

60 62

DDR_A_DQS#3

64

DDR_A_DQS3

66 68

DDR_A_D30

70

DDR_A_D31

72

74 76 78

A15 A14

A11

A7

A6 A4

A2 A0

S0#

G2

DDR_A_MA15

80

DDR_A_MA14

82 84

DDR_A_MA11

86

DDR_A_MA7

88 90

DDR_A_MA6

92

DDR_A_MA4

94 96

DDR_A_MA2

98

DDR_A_MA0

100 102 104 106 108 110 112 114 116 118 120 122 124 126

+VREF_CAA

128 130

DDR_A_D36

132

DDR_A_D37

134 136 138 140

DDR_A_D38

142

DDR_A_D39

144 146

DDR_A_D44

148

DDR_A_D45

150 152

DDR_A_DQS#5

154

DDR_A_DQS5

156 158

DDR_A_D46

160

DDR_A_D47

162 164

DDR_A_D52

166

DDR_A_D53

168 170 172 174

DDR_A_D54

176

DDR_A_D55

178 180

DDR_A_D60

182

DDR_A_D61

184 186

DDR_A_DQS#7

188

DDR_A_DQS7

190 192

DDR_A_D62

194

DDR_A_D63

196 198 200 202 204

+0.75VS

206

4

DDR3 SO-DIMM A Standard Type

1

2

7,12

7

7 7

7

0.1U_0402_10V7K

12,17,26,33 12,17,26,33

SM_DRAMRST#

DDRA_CKE1

DDRA_CLK1 DDRA_CLK1#

DDR_A_BS1 DDR_A_RAS#

DDRA_SCS0# DDRA_ODT0

DDRA_ODT1

CD16

close to JDDRL.126

PM_SMBDATA PM_SMBCLK

DDR_A_DQS[0..7] 7

DDR_A_DQS#[0..7]

DDR_A_D[0..63] 7

DDR_A_MA[0..15]

+VREF_DQA

+1.5V

12

RD6

1K_0402_1%

12

RD7

1K_0402_1%

0

2/20 Delete CD2, CD15

Layout Note: Place near JDDRL

+1.5V +1.5V +0.75VS

1 2

CD8 10U_0603_6.3V6M

1 2

CD9 10U_0603_6.3V6M

1 2

CD10 10U_0603_6.3V6M

1 2

CD11 10U_0603_6.3V6M

1 2

CD12 10U_0603_6.3V6M

1 2

CD13 10U_0603_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

7

+1.5V

12

RD1

1K_0402_1%

12

RD2

1K_0402_1%

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

1 2

CD20 0.1U_0402_10V7K

1 2

CD17 0.1U_0402_10V7K

1 2

CD18 0.1U_0402_10V7K

1 2

CD19 0.1U_0402_10V7K

2

Layout Note: Place near JDDRL1.203 a nd 204

12

CD24 1U_0402_6.3V6K

12

CD21 1U_0402_6.3V6K

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMM0

VFKTA

11 46Monday, March 11, 2013

1

1.0

A

B

C

D

E

DQ4 DQ5

DQ6 DQ7

DM1

DM2

CK1

BA1

NC2

DM4

DM6

SDA SCL

+1.5V

2 4

DDR_B_D4

6

DDR_B_D5

8 10

DDR_B_DQS#0

12

DDR_B_DQS0

14 16

DDR_B_D6

18

DDR_B_D7

20 22

DDR_B_D12

24

DDR_B_D13

26 28 30 32 34

DDR_B_D14

36

DDR_B_D15

38 40

DDR_B_D20

42

DDR_B_D21

44 46 48 50

DDR_B_D22

52

DDR_B_D23

54 56

DDR_B_D28

58

DDR_B_D29

60 62

DDR_B_DQS#3

64

DDR_B_DQS3

66 68

DDR_B_D30

70

DDR_B_D31

72

74 76 78

A15 A14

A11

A7

A6 A4

A2 A0

S0#

G2

DDR_B_MA15

80

DDR_B_MA14

82 84

DDR_B_MA11

86

DDR_B_MA7

88 90

DDR_B_MA6

92

DDR_B_MA4

94 96

DDR_B_MA2

98

DDR_B_MA0

100 102 104 106 108 110 112 114 116 118 120 122 124 126

+VREF_CAB

128 130

DDR_B_D36

132

DDR_B_D37

134 136 138 140

DDR_B_D38

142

DDR_B_D39

144 146

DDR_B_D44

148

DDR_B_D45

150 152

DDR_B_DQS#5

154

DDR_B_DQS5

156 158

DDR_B_D46

160

DDR_B_D47

162 164

DDR_B_D52

166

DDR_B_D53

168 170 172 174

DDR_B_D54

176

DDR_B_D55

178 180

DDR_B_D60

182

DDR_B_D61

184 186

DDR_B_DQS#7

188

DDR_B_DQS7

190 192

DDR_B_D62

194

DDR_B_D63

196 198 200 202 204

+0.75VS

206

B

DDRB_CKE1

DDRB_CLK1 DDRB_CLK1#

DDR_B_BS1 DDR_B_RAS#

DDRB_SCS0# DDRB_ODT0

DDRB_ODT1

CD47

Close to JDDRH.126

PM_SMBDATA PM_SMBCLK

DDR3 SO-DIMM B Standard Type

SM_DRAMRST#

7,11

7

7 7

7

0.1U_0402_10V7K

1

2

11,17,26,33 11,17,26,33

DDR_B_DQS#[0..7]7

DDR_B_DQS[0..7]

DDR_B_D[0..63] 7

DDR_B_MA[0..15] 7

+1.5V

12

RD10

1K_0402_1%

+VREF_DQB

+1.5V

12

RD12

1K_0402_1%

02/20 Delete CD28, CD46

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

12

RD13

1K_0402_1%

Layout Note: Place near JDDRH

+1.5V +0.75VS+1.5V

1 2

CD31 47U_0805_6.3V6M

1 2

CD41 10U_0603_6.3V6M

1 2

CD36 10U_0603_6.3V6M

1 2

CD37 10U_0603_6.3V6M

1 2

CD38 10U_0603_6.3V6M

1 2

CD39 10U_0603_6.3V6M

1 2

CD40 10U_0603_6.3V6M

11/28 Change CD31 47U 1206 to 0805 size (SE00000PL00)

2012/04/19 2015/04/19

C

12

RD11

1K_0402_1%

Compal Secret Data

Deciphered Date

7

11/28 Move RD10, RD11 to page 12

Layout Note: Place these 4 Caps near Command and Control signals of DIMMB

1 2

CD33 0.1U_0402_10V7K

1 2

CD29 0.1U_0402_10V7K

1 2

CD30 0.1U_0402_10V7K

1 2

CD32 0.1U_0402_10V7K

D

Layout Note: Place near JDDRH.203 and 2 04

12

CD45 1U_0402_6.3V6K

12

CD42 1U_0402_6.3V6K

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMM1

VFKTA

12 46Monday, March 11, 2013

E

1.0

+1.5V

+VREF_DQB

1 1

02/20 Delete CD28, CD46

Close to JDDRH.1

7

+3VS

7

7 7

7

7 7

7

DDRB_CKE0

DDR_B_BS2

DDRB_CLK0 DDRB_CLK0#

DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDRB_SCS1#

1

CD49

2

0.1U_0402_10V7K

2 2

3 3

4 4

DDR_B_D0 DDR_B_D1

CD27

1

DDR_B_D2 DDR_B_D3

0.1U_0402_10V7K

2

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26 DDR_B_D27

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

DDR_B_MA10

DDR_B_MA13

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D59

12

RD15 10K_0402_5%

SPD setting (SA 0, SA1) PU/PD by Channe l A/B

->Channel A 00

->Channel B 01

A

+0.75VS

JDDR3H

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LCN_DAN06-K4806-0102

Conn@

VSS3

DQS#0

DQS0

VSS6

VSS8 DQ12 DQ13

VSS10

DQ14 DQ15

DQ20 DQ21

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

VTT2

A

B

C

D

E

For eDP Panel

USB20_N11_R

IEDP@

1 2

H_EDP_AUXP6

1 1

H_EDP_AUXN6

H_EDP_TXP0 6

H_EDP_TXN0 6

H_EDP_TXP1 6

H_EDP_TXN1 6

C890 0.1U_0402_10V7K

IEDP@

1 2

C891 0.1U_0402_10V7K

IEDP@

1 2

C912 0.1U_0402_10V7K

IEDP@

1 2

C913 0.1U_0402_10V7K

IEDP@

1 2

C914 0.1U_0402_10V7K

IEDP@

1 2

C915 0.1U_0402_10V7K

LVDS_EDID_CLK

LVDS_EDID_DATA

LVDS_TXOUT0+

LVDS_TXOUT0-

LVDS_TXOUT1+

LVDS_TXOUT1-

USB20_P11_R

USB20_P8_R

USB20_N8_R

CAM_EMI@

1

4

L55

R

eserve for EMI reque st

@TOUCH_EMI@

1 2

R267 0_0402_5%

TOUCH_EMI@

1

4

L57

1 2

R266 0_0402_5%

@TOUCH_EMI@

2

3

WCM-2012-900T_0805

2

3

WCM-2012-900T_0805

USB20_N11

USB20_P11

2013/02/06 Add R266 ,

267 Co-lay L57

R

USB20_P8

USB20_N8

LCD POWER CIRCUIT

Need check eDP&LVDS both 3V power rail.

20

+3VS

02/20 Change C7 to SE076153K80 (15nF) for LCD sequence tuning

W=60mils

1.5A

+LCD_VDD_SS

12

C7

0.015u_0402_16V_X7R

19

U16

5

VIN

4

SS

APL3512ABI-TRG_SOT23-5

LCD_ENVDD

VOUT

GND

EN

Reserve for power consumption R

move on PVT phase

e

02/20 Change R106 to shortpad

1

+LCD_VDD_OUT

2

3

1 2

R112 100K_0402_5%

1 2

Rshort@

R106 0_0805_5%

+LCD_VDD

W=60mils

I rush=1.5A

Reserve fo r EMI requ est

For LVDS 1ch Panel

1 2

2 2

3 3

LCD_TXOUT0+ 19

LCD_TXOUT0- 19

LCD_TXOUT1+ 19

LCD_TXOUT1- 19

LCD_TXOUT2+ 19

LCD_TXOUT2- 19

LCD_TXCLK+ 19

LCD_TXCLK- 19

LCD_EDID_CLK19

LCD_EDID_DATA19

Reserve for eDP panel potential issue

LVDS@

R262 0_0402_5%

1 2

LVDS@

R263 0_0402_5%

1 2

LVDS@

R265 0_0402_5%

1 2

LVDS@

R264 0_0402_5%

1 2

LVDS@

R300 0_0402_5%

1 2

LVDS@

R299 0_0402_5%

+3VS

LVDS_TXOUT0+

LVDS_TXOUT0-

LVDS_TXOUT1+

LVDS_TXOUT1-

LCD_TXOUT2+

LCD_TXOUT2-

LCD_TXCLK+

LCD_TXCLK-

LVDS_EDID_CLK

LVDS_EDID_DATA

LVDS colay eDP cable

Pin define will be change after ME ready

pin1-4 Touch function for panel

pin5-10 For Webcam with single or dual MIC

pin11-30 For LVDS or EDP panel

JLVDS

Conn@

GND GND GND GND GND

+5VS

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31 32 33 34 35

+5VS_LVDS_TOUCH USB20_N8_R USB20_P8_R BKOFF# INT_MIC_DATA INT_MIC_CLK

USB20_P11_R USB20_N11_R +3VS_LVDS_CAM +LCD_VDD

+3VS LVDS_EDID_CLK LVDS_EDID_DATA LVDS_TXOUT0LVDS_TXOUT0+ LVDS_TXOUT1LVDS_TXOUT1+ LCD_TXOUT2LCD_TXOUT2+

LCD_TXCLKLCD_TXCLK+

LED_PWM BKOFF#_R

1 2

Rshort@

R389 0_0603_5%

+LCD_VDD

+LCD_INV

Irush=1.5A

+LCD_INV

CPU_EDP_HPD

1 2

Rshort@

R390 0_0603_5%

INT_MIC_DATA

INT_MIC_CLK

I

rush=1.5A

Irush=1.5A

60mils

6

0mils

60mils

L2

FBMA-L11-201209-221LMA30T_0805

12

EMI@

20mils

30 30

+3VS

20mils

+3VS

B+

1 2

IEDP@

R103 0_0402_5%

BKOFF#_R

4 4

1 2

D15 RB751V40_S C76-2

LVDS@

12

R113 10K_0402_5%

A

IEDP@

5

U17

1

P

IN1

4

O

2

IN2

G

3

SN74AHC1G08DCKR_SC70-5

1 2

R147 0_0402_5%

LVDS@

EC_ENBKL

BKOFF#

19,32

32

LED_PWM

12

R131

47K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

D

1 2

D17RB751V40_SC76-2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

LVDS

VFKTA

E

PCH_PWM 19

13 46Monday, March 11, 2013

1.0

A

B

C

D

E

CRT CONNECTOR

1 1

1 2

UMA_CRT _R 19

UMA_CRT _G 19

UMA_CRT _B 19

CRT@

R138

R140

R139

12

150_0402_1%

2 2

02/20 Delete C250 0.1u

UMA_CRT _DATA

19

UMA_CRT _CLK

19

3 3

19

UMA_CRT _VSYNC

19

UMA_CRT _HSYNC

150_0402_1%

+HDMI_5V_ OUT

+3VS

C238

CRT@

1

C239

2

2.2P_0402_50V8C

L3 NBQ1005 05T-800Y_0402

CRT_EMI@

1 2

L4 NBQ1005 05T-800Y_0402

CRT_EMI@

1 2

L5 NBQ1005 05T-800Y_0402

CRT_EMI@

CRT@

1

C240

2

2.2P_0402_50V8C

11/28 change BOM structureC238 C239 C240 C241 C242 C243 to CRT@EMI@

U49

1

VCC_SYNC

2

VCC_VIDEO

7

VCC_DDC

10

DDC_IN1

11

DDC_IN2

13

SYNC_IN1

15

SYNC_IN2

6

GND

TPD7S01 9-15DBQR_SSOP 16

CRT@

1

C241

2

VIDEO1

VIDEO2

VIDEO3

DDC_OUT1

DDC_OUT2

SYNC_OUT1

SYNC_OUT2

CRT@

C242

2.2P_0402_50V8C

8

BYP

3

4

5

9

12

14

16

1

C243

2

2.2P_0402_50V8C

C15 0.22U_04 02_16V7K

CRT@

1

2

2.2P_0402_50V8C

CRT@

1 2

CRT_R_L

CRT_G_L

CRT_B_L

+HDMI_5V_ OUT

USE HDMI POWER

+HDMI_5V_ OUT

CRT_R_L

CRT_G_L

CRT_B_L

1 2

VSYNC_R

1 2

HSYNC_R

11/29 add 22-ohm (PN: SD028220A80) on CRT HSYNC/VSYNC trace.

R153

4.7K_040 2_5%

CRT@

R6222_0402 _5% CRT@

R6322_0402 _5% CRT@

1 2

VSYNC

HSYNC

R159

4.7K_040 2_5%

CRT@

1 2

CRT_R_L

CRT_DDC _DAT CRT_G_L

HSYNC CRT_B_L

VSYNC

CRT_DDC _CLK

CRT_DDC _DAT

CRT_DDC _CLK

T65, T66: for A TE

T65 PAD

T66 PAD

JCRT

6

11

1 7

12

2 8

13

3 9

14

G

4

G

10 15

5

C-H_13-12 201513CP

Conn@

16 17

4 4

Security Class ification

2012/04/ 19 2015/04/ 19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/ 19 2015/04/ 19

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

CRT

VFKTA

14 46Monday, March 11 , 2013

E

1.0

A

B

C

D

E

RPY1

+3VS

+HDMI_5V_OUT

1 1

19

UMA_HDMI_CLK

19

UMA_HDMI_DATA

2 2

19

UMA_HDMI_CLK-

19

UMA_HDMI_CLK+

19

UMA_HDMI_TX0-

19

UMA_HDMI_TX0+

19

UMA_HDMI_TX1-

UMA_HDMI_TX1+

UMA_HDMI_TX2-

UMA_HDMI_TX2+

3 3

UMA_HDMI_DATA HDMI_SD ATA

HDMI Royalty

4 4

HDMI W/O Logo: RO0000001HM HDMI W/Logo: RO0000002HM HDMI W/Logo + HDCP: RO0000003HM

please manually load this virtual material to 45@ BOM

A

1 8 2 7 3 6 4 5

2.2K_0804_8P4R_5%

UMA_HDMI_CLK HDMI_SCLK

CY2 0.1U_0402_16V7K

CY1 0.1U_0402_16V7K

CY5 0.1U_0402_16V7K

CY3 0.1U_0402_16V7K

CY7 0.1U_0402_16V7K

CY6 0.1U_0402_16V7K

CY9 0.1U_0402_16V7K

CY8 0.1U_0402_16V7K

ZZZ

RO0000003HM

HDMI W/Logo + HDCP

UMA_HDMI_CLK UMA_HDMI_DATA

HDMI_SCLK HDMI_SDATA

+3VS

G

2

BSS138 1N SOT23-3

13

D

S

G

2

S

2013/02/06 change QY1 QY2 to SB00000PF00 for X1 code

1 2

HDMI45@

QY1

BSS138 1N SOT23-3

13

D

QY2

HDMI_TXC-

HDMI_TXC+

HDMI_TXD0-

HDMI_TXD0+

HDMI_TXD1-

HDMI_TXD1+

HDMI_TXD2-

HDMI_TXD2+

10/18 Modify the BOM structure @ to HDMI45@ , change Location HDMI to ZZZ.

B

1

4

WCM-2012HS-900T_4P

LY2

EMI@

1

4

WCM-2012HS-900T_4P

LY3

EMI@

1

4

WCM-2012HS-900T_4P

LY4

EMI@

1

4

WCM-2012HS-900T_4P

2

3

2

3

2

3

2

3

LY1

EMI@

1

L

L L

L

H H

H

X Z

+HDMI_5V_OUT

5

1

UY1

P

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

3

HDMI_HPD

2

3

2

3

2

3

2

3

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

4

HDMI_HPD

Issued Date

RY1

1 2

1K_0402_5%

12

RY3

2.2K_0402_5%

12/04 SWAP RPY4 netname

C

HDMI_HPD_CHDMI_HPD_U

2

RY2

1 2

HDMI_HPD

CY4

0.1U_0402_16V4Z

1

19,21

Compal Secret Data

HDMI_R_D0HDMI_R_D0+ HDMI_R_CK-

HDMI_R_CK+

HDMI_R_D1-

HDMI_R_D1+ HDMI_R_D2HDMI_R_D2+

Deciphered Date

+5VS

100K_0402_5%

+3VS

2012/04/19 2015/04/19

HDMI POWER CIRCUIT

VIN = 5V, IOUT = 0.5A , RDS(ON) TYP=95m ; MAX=115m Current Limit: TYP=0.8A ; MAX=1A

+HDMI_5V_OUT

CY18

0.1U_0402_10V7K

1

2

UY2

1

2

3

AP2151DWG-7_SOT25-5

SA00006H00 0

11/28 Update HDMI current limited IC from AP230W-7 to AP2151DDWG-7.

OUT

GND

FLG

5

IN

4

EN

HDMI Connector

19 18 17 16 15 14 13 12 11 10

11/28 Add @ to JHDMI

Compal Electronics, Inc.

HDMI Conn.

VFKTA

680 +-5% 8P4R

RPY3

680 +-5% 8P4R

RPY4

2

G

D

45 36 27 18

13

QY4

+HDMI_5V_OUT

D

S

2N7002KW_SOT323-3

HDMI_HPD_C

HDMI_SDATA HDMI_SCLK

HDMI_R_CK-

HDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

JHDMI

HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CKCK_shield CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

Conn@

E

GND GND GND GND

+5VS

23 22 21 20

1.0

of

15 46Monday, March 11, 2013

OE# A Y

5

CMOS Setting, near DDR Door

1 2

PCH_RTCRST#

PCH_SRTCRST#

+RTCVCC

D D

RH23 20K_0402_5%

iME Setting.

RH24 20K_0402_5%

CH4

1U_0402_6.3V6K

CH5

1U_0402_6.3V6K

JCMOS S P@

1 2

JME SP@

1 2

26

PCH_RTCX1_R

Placement near to YH 1

Integrated SUS 1.05V VRM Enable

PCH_INTVRMEN

+RTCVCC

RH12

RH33

+3VS

+RTCVCC

C C

30

AZ_BITCLK_HD

30

AZ_SYNC_HD

30

AZ_RST_HD#

30

AZ_SDOUT_HD

HDA_SDO

ME debug mode, this signal has a weak internal pull down

Low = Disable (default)

*

High = Enable (flash descriptor security overide)

B B

HDA_SYNC

This signal has a weak internal pull down

*

H=>On Die PLL is supplied by 1.5V L=>On Die PLL is supplied by 1.8V Need to pull high for Chief River Mobile platform

A A

High - Enable Internal VRs

must be always pulled high)

(

1 2

1M_0402_5%

1 2

330K_0402_5%

@

1 2

RH36 1K_0402_5%

1

DH1 BAS40-04_SOT23-3

2

3

1

CH8

0.1U_0402_10V7K

2

AZ_BITCLK_HD

AZ_SYNC_R

RH56

1M_0402_5%

1 2

32

EC_SDIO

32

EC_CS0#

32

EC_SCK

32

EC_SDI

SM_INTRUDER#

PCH_INTVRMEN

PCH_SPKR

+RTCBATT

+3VL

1 8 2 7 3 6 4 5

+5VS

G

2

QH1

13

D

S

BSS138_NL_SOT23-3

RPH2

33_8P4R_5%

+3VALW_PCH

1 2

1 8 2 7 3 6 4 5

*

RH55 1K_0402_5%

RPH9

33_8P4R_5%

885@

PCH_SPKR

igh = Enabled "No Reboot Mode"

H Low = Disabled (Default)

AZ_BITCLK AZ_SYNC_R AZ_RST# AZ_SDOUT

AZ_SYNC

PCH_SPI0_DO PCH_SPICS0# PCH_SPI0_CLK PCH_SPI0_DI

Reserve for NPCE885N EC

5

4

RH26

GCLK@

1 2

0_0402_5%

10/19A Change RH66 to short pad

PCH_RTCX1

CH2 15P_0402_50V8J

NOGCLK@

32.768KHZ_12.5P_1TJF125DP1A000D

CH3 15P_0402_50V8J

32

PWRME_CTRL

Change Net name due to this function is high active

PCH_SPICS0#

1 2

PCH_SPI0_DOPCH_SPIDO

Rshort@

RH68

02/20 change RH67, RH68 to short pad

0_0402_5%

+3VALW_PCH

12

NOGCLK@

12

YH1

12

NOGCLK@

30

RH2

1 2

10M_0402_5%

PCH_SPKR

AZ_SDIN0_HD30

1 2

Rshort@

RH25 0_0402_5%

T70 PAD

T67 PAD

T68 PAD

T69 PAD

11/28 Change UH3 from socket to IC, modify the footprint

SPI ROM for BIOS & ME (4MByte )

UH3

1

CS#

2 3 4

2013/02/06 change UH3 from SA00003K800

（

EOL）to SA00004LI00 for X1 code

VCC

DO

HOLD#

WP#

CLK

GND

32M EN25Q32B-104HIP SOP 8P

3

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

NOGCLK@

SM_INTRUDER#

PCH_INTVRMEN

AZ_BITCLK

AZ_SYNC

PCH_SPKR

AZ_RST#

AZ_SDIN0_HD

AZ_SDOUT

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_SPICLK

PCH_SPICS0#

PCH_SPICS1#

PCH_SPIDI

PCH_SPIDO

+3VALW_PCH

8 7 6 5

PCH_SPI0_DI PCH_SPIDI

DI

A20

C20

D20

G22

K22

C17

N34

L34

T10

K34

E34

G34

C34

A34

A36

C36

N32

J3

H7

K5

H1

T3

Y14

T1

V4

U3

02/20 Delete CH6 0.1U

RH66 0_0402_5%

1 2 1 2

RH67 0_0402_5%

UH1A

RTCX1

RTCX2

RTCRST#

SRTCRST#

INTRUDER#

INTVRMEN

HDA_BCLK

HDA_SYNC

SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

HDA_SDIN2

HDA_SDIN3

HDA_SDO

HDA_DOCK_EN# / GPIO33

HDA_DOCK_RST# / GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_MOSI

SPI_MISO

PANTHER-POINT_FCBGA989

HM76R3@

Rshort@ Rshort@

4MB ROM P/N: SA00003K800 SA00004LI00

INT.PH 20K INT.PH 20K INT.PH 20K I

NT.PH 20K

INT.PD 20K

INT.PH 20K

INT.PD 20K

INT.PH 20K

10/18B change from +3vs to +3VALW_PCH

PCH_SPICLKPCH_SPI0_CLK

RTCIHDA

JTAG

SPI

Socket: SP07000F500/SP07000H900

Please place UH3 & UH4 close to UH1 PCH, please place RH66, RH67, RH68 near UH3 Please place RH267 near RH66, Please place RH271 near RH67, Please place RH269 near RH68.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

2

C38

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

LPC

FWH4 / LFRAME#

INT.PH 20K INT.PH 20K

LDRQ1# / GPIO23

SATA0RXN SATA0RXP

SATA0TXN SATA0TXP

SATA1RXN SATA1RXP

SATA 6G

SATA1TXN SATA1TXP

SATA2RXN SATA2RXP

SATA2TXN SATA2TXP

SATA3RXN SATA3RXP

SATA3TXN SATA3TXP

SATA4RXN SATA4RXP

SATA4TXN

SATA

SATA4TXP

SATA5RXN SATA5RXP

SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

INT.PH 20K

LDRQ0#

SERIRQ

LPC_AD0

A38

LPC_AD1

B37

LPC_AD2

C37

LPC_AD3

D36

LPC_FRAME#

E36 K36

V5

SERIRQ

AM3

SATA_PRX_C_DTX_N0

AM1

SATA_PRX_C_DTX_P0

AP7

SATA_PTX_DRX_N0

AP5

SATA_PTX_DRX_P0

AM10 AM8 AP11 AP10

AD7

SATA_PRX_C_DTX_N2

AD5

SATA_PRX_C_DTX_P2

AH5

SATA_PTX_DRX_N2

AH4

SATA_PTX_DRX_P2

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

Y10

SATAICOMP

AB12

AB13

SATA3_COMP

AH1

RBIAS_SATA3

P3

SATA_LED#

V14

PCH_GPIO21

P1

PCH_GPIO19

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

SERIRQ

SATA_PRX_C_DTX_N0 SATA_PRX_C_DTX_P0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0

SATA_PRX_C_DTX_N2 SATA_PRX_C_DTX_P2 SATA_PTX_DRX_N2 SATA_PTX_DRX_P2

1 2

RH43 37.4_0402_1%

1 2

RH48 49.9_0402_1%

1 2

RH41 750_0402_1%

PCH_GPIO19

BOOT BIOS Strap Bit 0

11/29 change UH4 2M ROM circuit to "@".

32 32 32 32

32

25 25 25 25

+1.05VS_PCH

20

(PH)

+3VALW_PCH

SERIRQ PCH_GPIO21 PCH_GPIO19 SATA_LED#

SPI ROM for Win8 (2MByte )

UH4

PCH_SPIDO

0_0402_5%

10/19A Remove RH65, CH7 10/19A Remove RH69, CH21

@

2

PCH_SPI1_DO

+3VALW_PCH

PCH_SPICS1#

RH269

1 2

1 2 3 4

MX25L1606EM2I-12G_SO8

@

CS# SO WP# GND

2MB ROM P/N: SA000041N00 SA00003FO10

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

8

VCC

7

HOLD#

6

PCH_SPI1_CLK PCH_SPICLK

SCLK

5

PCH_SPI1_DI PCH_SPIDI

SI

10/19A Change RH267 to short pad

Compal Electronics, Inc.

PCH_HDA/JTAG/SATA/SPI/LPC

VFKTA

1

HDD

ODD

RPH1

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

11/29 change RH267 change from shortpad to 0-ohm

02/20 Delete CH100 0.1U

RH267 0_0402_5%

1 2

@

1 2

RH271 0_0402_5%@

16 46Monday, March 11, 2013

1

+3VS

1.0

of

5

27

PCIE_PRX_C_LANTX_N1

27

LAN

WLAN

D D

+3VS

Intel Spec: P

CIECLK_RQ0# is suspend well, but we pull high to +3VS for LAN en/disable function

+3VALW_PCH

C C

PCIE_PRX_C_LANTX_P1 PCIE_PTX_C_LANRX_N1 27 PCIE_PTX_C_LANRX_P1 27

26

PCIE_PRX_WLANTX_ N2

26

PCIE_PRX_WLANTX_ P2 PCIE_PTX_C_WLANR X_N2 26 PCIE_PTX_C_WLANR X_P2 26

1 2

RH104 10K_0402_5%

1 2

RH95 10K_0402_5%

RPH10

10K_0804_8P4R_5%

18 27 36 45

CLKREQ_WLAN#

CLKREQ_LAN#

EC_SMI# USB_OC#0

SLP_CHG_CB1

SLP_CHG_CB0

LAN

WLAN

+3VALW_PCH

B B

+3VALW_PCH

RPH6

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

1 2

LVDS@

RH119 10K_0402_5%

1 2

IEDP@

RH276 10K_0402_5%

LVDS_SEL PASSWORD_CLEAR # PCH_SMBALERT# LAN_EN

PANEL_SEL

12

CH13 0.1U_0402_10V7K

12

CH11 0.1U_0402_10V7K

12

CH14 0.1U_0402_10V7K

12

CH17 0.1U_0402_10V7K

EC_SMI# 21,32 USB_OC#0 20,29,32 SLP_CHG_CB1 20,29

SLP_CHG_CB0

CLK_LAN# CLK_LAN

CLKREQ_LAN#

CLK_WLAN# CLK_WLAN

CLKREQ_WLAN#

Note: place in DDR area

LVDS_SEL

VDS_SEL

L

A A

Channel

H L

Single (Default)

5

Dual

PCIE_PRX_C_LANTX_N1 PCIE_PRX_C_LANTX_P1 PCIE_PTX_LANRX_N1 PCIE_PTX_LANRX_P1

PCIE_PRX_WLANTX_ N2 PCIE_PRX_WLANTX_ P2 PCIE_PTX_WLANRX_ N2 PCIE_PTX_WLANRX_ P2

20,29

CLK_LAN# CLK_LAN

CLKREQ_LAN#

CLK_WLAN# CLK_WLAN

CLKREQ_WLAN#

PASSWORD_CLEAR #

12

JPW

SP@

LVDS_SEL

PANEL_SEL

Channel LVDS

27 27

27

26 26

26

HM76R3@

H L

4

UH1B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

PANTHER-POINT_FCBGA989

EDP

4

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

PCI-E*

CLOCKS

INT. PH 20K

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_DP_N CLKOUT_DP_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_SATA_N CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_OUT

XCLK_RCOMP

INT. PD 20K

CLKOUTFLEX0 / GPIO64

INT. PD 20K

CLKOUTFLEX1 / GPIO65

INT. PD 20K

CLKOUTFLEX2 / GPIO66

INT. PD 20K

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

XTAL25_IN

3

E12

PCH_SMBALERT#

H14

PCH_SMBCLK

C9

PCH_SMBDATA

A12

DRAMRST_CNTRL_PC H

C8

PCH_SMLCLK0

G12

PCH_SMLDATA0

C13

LAN_EN

E14

PCH_SMLCLK1

M16

PCH_SMLDATA1

M7

Control Link only for support Intel IAMT.

T11

P10

M10

PCH_GPIO47

AB37 AB38

AV22 AU22

AM12 AM13

BF18

PCH_CLK_DMI#

BE18

PCH_CLK_DMI

BJ30

CLKIN_GND1#

BG30

CLKIN_GND1

G24

CLK_DOT#

E24

CLK_DOT

AK7

CLK_SATA#

AK5

CLK_SATA

K45

CLK_14M_PCH

H45

CLK_PCILOOP

V47

PCH_X1

V49

PCH_X2

Y47

XCLK_RCOMP

K43

CLK_FLEX0

F47

CLK_FLEX1

H47

CLK_FLEX2

K49

PCH_GPIO67

9/28 Change DGPU_PRSNT# to PCH_GPIO67, then pull high to +3VS

9/28 Delete CLK _VGA, change CLK_REQ_ VGA#to PCH_GPIO 47

1 2

RH115 90.9_0402_1%

DRAMRST_CNTRL_PC H

LAN_EN

CLK_CPU_DMI# CLK_CPU_DMI

CLK_CPU_EDP# CLK_CPU_EDP

CLK_PCILOOP

T72 PAD

T74 PAD

T73 PAD

RH261 10K_0402_5%

(PH)

7,9

27

5 5

From Clock Gen.

20

+1.05VS_VCCDIFFCLKN

1 2

2

+3VALW_PCH

2013/02/06 change QC5,QH3,QH4,QW1, Q6 ,QA1 QR1 Q53 from SB00000EO10 to SB00000DH00 DVT 2nd source for X1 code issue

RPH5

45 36 27 18

2.2K_0804_8P4R_5%

120 MHz for eDP

+3VS

PCH_GPIO67

M/B SKU UMA

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/04/19 2015/04/19

H L

DIS/OPT

Compal Secret Data

Deciphered Date

Compal common design SW request to add DGPU_Present on this GPIO67

2

PCH_SMBDATA PCH_SMBCLK PCH_SMLDATA1 PCH_SMLCLK1

DRAMRST_CNTRL_PC H

PCH_SMLCLK0

PCH_SMLDATA0

PCH_CLK_DMI PCH_CLK_DMI# CLKIN_GND1# CLKIN_GND1

CLK_DOT# CLK_DOT CLK_SATA CLK_SATA#

CLK_14M_PCH

CLK_PCILOOP

PCH_X1_R

CH26

27P_0402_50V8J

NOGCLK@

1

RH102 4.7K_0402_5%

5

QH3B

3

2

2N7002DW-T/R7_SOT363-6

QH3A

6 1

2N7002DW-T/R7_SOT363-6

QH4B

3

2

QH4A

2N7002DW-T/R7_SOT363-6

6 1

2N7002DW-T/R7_SOT363-6

RH76 1K_0402_5%

RH73 2.2K_0402_5%

RH77 2.2K_0402_5%

PCH_GPIO47

RH87 10K_0402_5%

@EMI@

1 2

RH70 10_0402_5%

1 2

0_0402_5%

5

1 8 2 7 3 6 4 5

1 2

RH37

GCLK@

RH103 4.7K_0402_5%

4

+3VS

4

1 2

12

RH89 10K_0402_5%

RPH3

10K_0804_8P4R_5%

RPH4

10K_0804_8P4R_5%

@EMI@

1 2

CH9 10P_0402_50V8J

PCH_X1

26

PM_SMBDATA

PM_SMBCLK

EC_SMB_DA2

EC_SMB_CK2

+3VALW_PCH

11,12,26,33

25,32

Placement near to YH 2

NOGCLK@

RH117 1M_0402_ 5%

YH2

1

PCH_X1 PCH_X2

1

2

Title

Size Document Number Rev

Custom

Date: Sheet of

12

25MHZ_20PF_7V25000016NOGCLK@

GND

2

Compal Electronics, Inc.

PCH_PCI-E/SMBUS/CLK

VFKTA

GND

3

4

1

CH27

27P_0402_50V8J

2

NOGCLK@

17 46Monday, March 11, 2013

+3VS

1.0

5

DMI_CTX_PRX_N06

+3VALW_PCH

D D

C C

Stuff R137 if EC does not want to involve in the handshake mechanism for the DeepSX state entry and exit

B B

RPH7

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

RPH17

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

10/12 Delete OPTIMUS_EN# pull down

2

@ESD@

CC26 100P_0402_50V8J

1

PCH_SUSPWRD N#_R RI#

PCH_LOW_BAT#

EC_SWI#

RH163 10K_0402_5%

12

PM_PWROK PCH_GPIO32 PCH_GPIO37

PM_PWROK

2013/02/06 PVT Reserve CC26 CC27

@

RH282 0_0402_5%

@ESD@

12

PCH_SUSPWRD N#_RSUSACK#_R

PCH_RSMRST#

XDP_DBRESET#

2

CC27 100P_0402_50V8J

1

PCH_GPIO37

21

Reserve this signal to EC by SW demand 2011/10/18a

SUSACK#32

5

(PH)

32

PCH_SUSPWRD N#

+3VALW_PCH

32,37

ACIN

Reserve this signal to EC by SW demand 2011/10/18a

DMI_CTX_PRX_N16 DMI_CTX_PRX_N26 DMI_CTX_PRX_N36

DMI_CTX_PRX_P06 DMI_CTX_PRX_P16 DMI_CTX_PRX_P26 DMI_CTX_PRX_P36

6

DMI_PTX_CRX_N0

6

DMI_PTX_CRX_N1

6

DMI_PTX_CRX_N2

6

DMI_PTX_CRX_N3

6

DMI_PTX_CRX_P0

6

DMI_PTX_CRX_P1

6

DMI_PTX_CRX_P2

6

DMI_PTX_CRX_P3

+1.05VS_PCH

+3VS

VGATE32,42

DRAMPWROK

PCH_RSMRST#

PBTN_OUT#32

1 2

RH161 330K_0402_5%

CH751H-40PT_SOD323-2

4

1 2

RH126 49.9_0402_1%

1 2

RH127 750_0402_1%

1 2

@

RH133 0_0402_5%

1 2

RH47 1K_0402_5%

PM_PWROK32

1 2

@

RH132 0_0402_5%

DH2

21

(PH)

DMI_COMP

RBIAS_CPY

SUSACK#_R

XDP_DBRESET#

PM_PWROK

DRAMPWROK

PCH_RSMRST#

32

PCH_SUSPWRD N#_R

PBTN_OUT#

PCH_ACIN

PCH_LOW_BAT#

RI#

UH1C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

INT.PH 20K

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPW RDNACK/GPIO30

E20

H20

E10

A10

INT.PH 20K

PWRBTN#

ACPRESENT / GPIO31

BATLOW# / GPIO72

RI#

PANTHER-POINT_FCBGA989

HM76R3@

3

BJ14

FDI_RXN0

AY14

FDI_RXN1

BE14

FDI_RXN2

BH13

FDI_RXN3

BC12

FDI_RXN4

BJ12

FDI_RXN5

BG10

FDI_RXN6

BG9

FDI_RXN7

BG14

FDI_RXP0

BB14

FDI_RXP1

BF14

FDI_RXP2

BG13

FDI_RXP3

BE12

FDI_RXP4

BG12

FDI_RXP5

BJ10

FDI_RXP6

DMI

FDI

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

INT.PD 20K

INT.PH 20K

SLP_LAN# / GPIO29

FDI_RXP7

FDI_INT

DPWROK

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

DSWVREN

PCH_DPWROK

EC_SWI#

PCH_GPIO32

SUS_STAT#

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

PM_SLP_A#

PM_SLP_SUS#

H_PM_SYNC

T76 PAD

T77 PAD

T78 PAD

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

EC_SWI#

(PH)

32.768 KHz

CLK_EC

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

H_PM_SYNC

2

6 6 6 6 6 6 6 6

6

DSWVREN

RH128 0_0402_5%

1 2

Rshort@

Do not support DeepSX state

RH150 330K_0402_5%

12

1

PCH_RSMRST#PCH_DPWROK

+RTCVCC

DSWVREN must be always pulled high to +RTCVCC

27

32

5

DSWVREN - Internal Deep Sleep 1.05V regulator

：：：：

Enable

H

*

：：：：

Disable

L

Follow EC check list demand, but don't implement CLKRUN# this fuction

DH5

2 1

CH751H-40PT_SOD323-2

POK

A A

5

DH6

CH751H-40PT_SOD323-2

4

32,38

21

PCH_RSMRST#PM_PWROK PCH_RSMRST#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH_DMI/FDI/PM

VFKTA

1

18 46Monday, March 11, 2013

1.0

5

13,32

1 2

RH125 100K_0402_5%

D D

+3VS

RPH8

1 8 2 7 3 6 4 5

2.2K_080 4_8P4R_5%

RH142 2.2K_0402_5%

C C

B B

RH144 2.2K_0402_5%

1 2

RH154 150_0402_1%

CRT@

1 2

RH156 150_0402_1%

CRT@

1 2

RH152 150_0402_1%

CRT@

EC_ENBK L

LCTL_CL K LCTL_DA TA LCD_EDID_ CLK LCD_EDID_ DATA

12

UMA_CRT _DATA

12

UMA_CRT _CLK

UMA_CRT _B

UMA_CRT _G

UMA_CRT _R

13

LCD_EDID_ CLK13

LCD_EDID_ DATA13

13 13

13 13 13

14 14 14

UMA_CRT _CLK

14

UMA_CRT _DATA

14

UMA_CRT _HSYNC

14

UMA_CRT _VSYNC

EC_ENBK L LCD_ENV DD

LCD_TXC LKLCD_TXC LK+

LCD_TXO UT0LCD_TXO UT1LCD_TXO UT2-

LCD_TXO UT0+ LCD_TXO UT1+ LCD_TXO UT2+

UMA_CRT _B UMA_CRT _G UMA_CRT _R

4

PCH_PW M

1 2

RH143 2.37K_0402_1%

RH138 1K_0402_0.5%

CRT@

RH138 1K_0402 _5%

NOCRT@

EC_ENBK L LCD_ENV DD

PCH_PW M

LCD_EDID_ CLK LCD_EDID_ DATA

LCTL_CL K LCTL_DA TA

LVDS_IBG

UMA_CRT _B UMA_CRT _G UMA_CRT _R

UMA_CRT _CLK UMA_CRT _DATA

12

CRT_IREF

J47

M45

P45

13

T40

K47

T45

P39

AF37 AF36

AE48 AE47

AK39 AK40

AN48 AM47 AK47

AJ48

AN47 AM49 AK49

AJ47

AF40 AF39

AH45 AH47

AF49 AF45

AH43 AH49

AF47 AF43

N48 P49

T49

T39

M40

M47 M49

T43 T42

UH1D

L_BKLTEN L_VDD_EN

L_BKLTCTL

L_DDC_CLK L_DDC_DATA

L_CTRL_CLK L_CTRL_DATA

INT.PD 20K

LVD_IBG LVD_VBG

LVD_VREFH LVD_VREFL

LVDSA_CLK# LVDSA_CLK

LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDSB_CLK# LVDSB_CLK

LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

CRT_BLUE CRT_GREEN CRT_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

DAC_IREF CRT_IRTN

PANTHER -POINT_FCBGA989

HM76R3@

INT.PD 50 INT.PD 50

LVDS

CRT

3

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

HDMI_HPD

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

RH141 100K_04 02_5%

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

RH255 100K_04 02_5%

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

SDVO_TVCLKINN

SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

INT.PD 50 INT.PD 50

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

INT.PD 20K

DDPB_AUXN

DDPB_AUXP

DDPB_HPD

DDPC_CTRLCLK

DDPC_CTRLDATA

INT.PD 20K

DDPC_AUXN DDPC_AUXP

DDPC_HPD

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

INT.PD 20K

DDPD_AUXN DDPD_AUXP

DDPD_HPD

12

2

UMA_HDM I_CLK UMA_HDM I_DATA

HDMI_HPD

UMA_HDM I_TX2UMA_HDM I_TX2+ UMA_HDM I_TX1UMA_HDM I_TX1+ UMA_HDM I_TX0UMA_HDM I_TX0+ UMA_HDM I_CLKUMA_HDM I_CLK+

15 15

15,21

15 15 15 15 15 15 15 15

1

02/20 Delete RH254 100K

HDMI

A A

Security Class ification

2012/04/ 19 2015/04/ 19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/ 19 2015/04/ 19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_CRT/LVDS/HDMI

VFKTA

1

1.0

19 46Monday, March 11 , 2013

5

4

3

2

1

UH1E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

D D

+3VS

C C

B B

11/30 Move PLT_RST# ESD capacitor (CH104) to EC side (CB13) and mount 0.1u for ESD request

A A

RPH12

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

RPH13

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

1 2

9/28 change DGPU_RST#/ DGPU_PWR_EN to PCH_GPIO50/54, then PCH_GPIO50 8.2k pull high to +3vs

2013/02/28change RH167 pin2 netname from CLK_EC_R to CLK_PCI_EC_R 2013 back to CLK_EC_R as the same for DIS

RH17610K_0 402_5%

RH3058.2K_0402_ 5%

RH3068.2K_0402_ 5%

RH3078.2K_0402_ 5%

32 17

ESD@

1 2

PCH_GPIO52 PCH_GPIO2 PCH_GPIO51 ODD_DA#

PCI_PIRQD# PCI_PIRQA# PCI_PIRQB# PCI_PIRQC#

PCH_GPIO54

PCH_GPIO4

PCH_GPIO5

PCH_GPIO50

CLK_PCI_EC CLK_PCILOOP

CH105180P_0402_50V8J

12

RH2931K_0402_5% @

12

RH2941K_0402_5% @

ODD_DA#

PCH_GPIO51

PCH_GPIO19

29 29

U3RXDN1 U3RXDN2

U3RXDP1 U3RXDP2

U3TXDN1 U3TXDN2

U3TXDP1 U3TXDP2

ODD_DA#

T80 PAD

PLT_RST#

1 2

RH1660_0402_ 5%

T81 PAD

2012/10/19A Change RH166 to short pad 2013/02/06 PVT change back to 0 ohm again

16

25

5,26,27,32

1

CH115

2

PCH_GPIO19

U3RXDN1 U3RXDN2

U3RXDP1 U3RXDP2

U3TXDN1 U3TXDN2

U3TXDP1 U3TXDP2

@RF@

22P_0402_50V8J

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

PCH_GPIO50 PCH_GPIO52 PCH_GPIO54

PCH_GPIO51

PCH_GPIO2 ODD_DA# PCH_GPIO4 PCH_GPIO5

PCI_PME#

PLT_RST#

RH16722_0402_5% EMI@

CLK_EC_R

CLK_PCH

CLK_PCI_DDR

PCH_GPIO51

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

USB3Rn1

BC30

USB3Rn2

BE32

USB3Rn3

BJ32

USB3Rn4

BC28

USB3Rp1

BE30

USB3Rp2

BF32

USB3Rp3

BG32

USB3Rp4

AV26

USB3Tn1

BB26

USB3Tn2

AU28

USB3Tn3

AY30

USB3Tn4

AU26

USB3Tp1

AY26

USB3Tp2

AV28

USB3Tp3

AW30

USB3Tp4

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

INT.PU 20K

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

PANTHER-POINT_FCBGA989

HM76R3@

Boot BIOS Strap

PCH_GPIO19 Boot BIOS Loaction

0 0 1

0 1 0

1 1

RSVD

PCI

INT.PU 20K I

NT.PU 20K

INT.PU 20K

INT.PD 20K INT.PD 20K INT.PD 20K INT.PD 20K INT.PD 20K

Reserved

USB

LPC

PCI

SPI

INT.PD 20K

EHCI 1

EHCI 2

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

*

RSVD1 RSVD2 RSVD3 RSVD4

RSVD5 RSVD6

RSVD7 RSVD8

RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22

RSVD23 RSVD24

RSVD25

RSVD26 RSVD27

RSVD28 RSVD29

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P

USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

AY7

10/24B PLT_RST# Add RH173 100K Pull Down to GND

AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

AV5 AV10

AT8

AY5 BA2

AT12 BF3

C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

C33

B33

A14 K20 B17 C16 L16 A16 D14 C14

NV_ALE

USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3

USB20_N8 USB20_P8 USB20_N9 USB20_P9

USB20_N11 USB20_P11

USBBIAS

USB_OC#0 USB_CHG_OC# USB_OC#2 SLP_CHG_CB1 SLP_CHG_CB0 USB_OC#5_7

PLT_RST#

RH173

100K_0402_5%

1 2

Note: HM70 only enable USB port 0, 1, 2, 3, 8, 9, 10, 11

USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3

USB20_N8 USB20_P8 USB20_N9 USB20_P9

USB20_N11 USB20_P11

1 2

RH165 22.6_0402_1%

Within 500 mils

USB_OC#0 USB_CHG_OC#

USB_OC#2 SLP_CHG_CB1 SLP_CHG_CB0

29

USB-Right1

29 29

USB-Right2

29 27

USB-Left

27 28

CardReader

28

13

Touch Screen

13 26

BT

26

NFC

13

Int. Camera

13

USB-Right Rear

17,29,32

USB-Right Front

29,32

USB-Left

27,32 17,29 17,29

9/28 Delete PLTRST_VGA# Circuit

10/18B Add USB port 10 for NFC

21

PCH_GPIO28

Intel Anti-Thef t Techonlogy

High=Endabled

NV_ALE

Low=Disable(floating)

NV_ALE

11/28 Delete NFC Function

OC#1 PH @ page 26 CB0 PH @ page 27

PCH_GPIO28 USB_CHG_OC# USB_OC#2 USB_OC#5_7

1 2

@

RH164 1K_0402_5%

RPH11

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

*

+1.8VS

+3VALW_PCH

10/18 Need confirm PCH_GPIO55, 10/19A remove RH295

5

A16 Swap Override Strap

WL_OFF#

*

4

Low= A16 swap override Enable High= A16 swap override Disable

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH_PCI/USB/NAND

VFKTA

1

20 46Monday, March 11, 2013

1.0

5

4

3

2

1

UH1F

HDMI_HPD

EC_SCI#

EC_LID_OU T#

PCH_GPIO1 6

PCH_GPIO1 7

PCH_GPIO2 7

PCH_GPIO3 4

ODD_DET ECT#

PCH_GPIO3 8

SM_DET

PCH_GPIO4 9

(

(PH)

PH)

HDMI_HPD

EC_SCI#32

EC_SMI#17,32

EC_LID_OU T#32

PCH_GPIO2 8

ODD_DET ECT#

PCH_GPIO3 7

+3VALW _PCH

RH204 1K_0402 _5%

D D

+3VS

RH178 200K_ 0402_5%

RH179 10K _0402_5%

RH180 10K _0402_5%

+3VS

C C

RH200 10K _0402_5%

RH201 10K _0402_5%

RH199 10K _0402_5%

SM_DET (GPIO48)

12

1 2

12

RPH15

1 8 2 7 3 6 4 5

10K_080 4_8P4R_5%

269@

12

259@

12

@

1

B B

0

EC_LID_OU T#

ODD_DET ECT#

PCH_GPIO1 7

PCH_GPIO3 8

PCH_GPIO3 4 PCH_GPIO1 6 EC_SCI# PCH_GPIO4 9

SM_DET

PCH_GPIO2 7

BIOS setup

9/28 change VGA_PWROK to PCH_GPIO17, 10k pull high to +3vs

10/24DChange BT_ON# to PCH_GPIO34

9/28 change OPTIMUS_EN# to PCH_GPIO38, 10k pull high to +3vs

Follow Compal ORB and Intel Check list 460603 V1.5

Speaker Type

BOM

Harman/KardonS&M option 269@

Non Harman

259@

25

(PH)

GPIO28

On-Die PLL Voltage Regulator H: Enable

*

L: Disable

15,19

20

18

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49 / TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

PANTHER -POINT_FCBGA989

IN

INT.PD 20K

INT.PH 20K

HM76R3@

INT.PH 20K

T.PH 20K

INT.PH 20K

INT.PD 20K

INT.PH 20K

TACH4 / GPIO68

INT.PH 20K

TACH5 / GPIO69

INT.PH 20K

TACH6 / GPIO70

INT.PH 20K

TACH7 / GPIO71

INT.PD 350

GPIO

INT.PH 20K

INT.PD 20K

CPU/MISC

NCTF

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

NC_1

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

C40

B41

C41

A40

P4

AU16

P5

AY11

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

ODD_EN#

CPU_PGA _BGA#

SPK_DET

11/28 Change SPK_DET0 to SPK_DET, delete SPK_DET1

GATEA20

KB_RST#

H_PW RGOOD

PCH_THR MTRIP#

for common BIOS on PBA/BGA CPU

1 2

RH191 390_0402_5%

NV_CLE

ODD_EN#

SPK_DET

This signal has weak internal pull-up, can't be pulled low

34

31

GATEA20

KB_RST#

H_PW RGOOD

H_THERM TRIP#

ODD_EN# GATEA20 KB_RST#

CPU_PGA _BGA#

32

5

@ESD@

1 2

DMI & FDI Termination Voltage

NV_CLE

Set to VCC when HIGH

Set to VSS when LOW

RH189 1K_0402 _5%

12

RPH16

1 8 2 7 3 6 4 5

10K_080 4_8P4R_5%

RH181 10K _0402_5%

Non-Harman detection

SPK_DET (GPIO70)

CC21

100P_04 02_50V8J

+1.8VS

12

RH187

2.2K_040 2_5%

12

0

+3VS

ONKYO

Non-Brand1

H_SNB_IVB # 5

OPTIMUS_EN#

GPIO8

Integrated Clock Chip Enable (Removed) H:

Disable

L: Enable

*

A A

Integrated clock enable functionality

achieved by soft-strap

is The current default is clock enable

5

OPTIMUS_EN#

U NonOPT

SK

4

H L

Optimus

Security Class ification

2012/04/ 19 2015/04/ 19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/ 19 2015/04/ 19

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

PCH_CPU/GPIO

VFKTA

21 46Monday, March 11 , 2013

1

1.0

5

4

3

2

1

+1.05VS_VCCP

D D

C C

10U_0603_6.3V6M

B B

PJ4

JP@

2

112

JUMP_43X79

CH32

10U_0603_6.3V6M

This pin can be left as NC if

-Die VR is enabled (Default)

On

+1.05VS_PCH

1

CH45

CH43

2

1U_0402_6.3V6K

This pin can be left as NC if

n-Die VR is enabled (Default)

O

1

CH33

2

1U_0402_6.3V6K

1

CH46

2

+3VS

1U_0402_6.3V6K

1

CH31

2

1

CH47

2

1U_0402_6.3V6K

1

CH34

2

1U_0402_6.3V6K

+1.05VS_PCH

1

CH44

1U_0402_6.3V6K

2

1

CH50

0.1U_0402_10V7K

2

+1.05VS_PCH

+VCCP_VCCDMI

+1.05VS_PCH +VCCA_DAC

1

2

T82PAD

1

2

+VCCAFDI_VRM

T83PAD

UH1G

1730mA

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

PANTHER-POINT_FCBGA989

HM76R3@

3709mA

POWER

VCC CORE

VCCIO

FDI

1mA

CRTLVDS

1mA

VCCTX_LVDS[1]

VCCTX_LVDS[2]

60mA

VCCTX_LVDS[3]

VCCTX_LVDS[4]

DMI

75mA

VCCDFTERM

VCCDFTERM[1]

VCCDFTERM[2]

190mA

VCCDFTERM[3]

VCCDFTERM[4]

DFT / SPI HVCMOS

20mA

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCSPI

U48

U47

AK36

AK37

AM37

AM38

AP36

AP37

0.01U_0402_25V7K

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

0.01U_0402_25V7K

+VCCA_LVDS

+VCCTX_LVDS

CH38

1

CH42

0.1U_0402_10V7K

2

+VCCAFDI_VRM

+VCCP_VCCDMI

+1.05VS_VCC_DMI

1

CH51

0.1U_0402_10V7K

2

1

CH53 1U_0402_6.3V6K

2

0.1U_0402_10V7K

CH35

0.01U_0402_25V7K

1

CH49 1U_0402_6.3V6K

2

+3VALW_PCH

1

CH36

2

1 2

Rshort@

RH208 0_0402_5%

CH39

+3VS

+VCCP_VCCDMI

RH214 0_0402_5%

1 2

Rshort@

+1.8VS

10/18B Change VCCSPI from +3VS to +3VALW_PCH

1

CH37 10U_0603_6.3V6M

2

1

CH40 22U_0805_6.3V6M

2

+VCCAFDI_VRM

+1.05VS_PCH

1 2

RH309

+VCCA_DAC_R

1_0603_1%

+3VS

LH2

BLM18PG181SN1D_0603

RH221 0_0402_5%

1 2

Rshort@

RH213 0_0402_5%

1 2

Rshort@

1

CH48 1U_0402_6.3V6K

2

BLM18PG181SN1D_0603

12

+1.5VS

LH1

12

+1.8VS

+1.05VS_VCCP

+3VS

PCH Power Rail Table

efer to PCH EDS R1.0

R

.05

S0 Iccmax Current (A)

0.001

5

0.001

0.228

0.063

08

0.

0.08

1.7

0.047

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Vo

ltage

1.05

3.3

1

1.05

1.1

1.05Vc cIO 3.711

1.05Vc cASW 0.903

3.3VccSPI 0.01

3.3VccDSW 0.001

1.8 0.002VccDFTERM

3.3VccRTC N/A

3.3VccSus3_3

3.3VccSusHDA

Vc

cVRM 1.5 0.167

1.05Vc cCLKDMI

VccSSC 1

.05 0.095

0.095

0.01

0.07

VccDIFFCLKN 1.05 0.055

VccALVDS 3.3

0.001

1.8VccTX_LVDS 0.0 4

+3VALW to +3VALW_PCH

+3VALW

QH2 AO3413_SOT23

D

S

13

G

1

2

CH1120.01U_0402_25V7K

CH1110.1U_0402_25V6

A A

23,34

PCH_PWR_EN#

5

12

RH3 47K_0402_5%

2

CH1130.1U_0402_10V7K

1

2

4

+3VALW_PCH

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH_POWER-1

VFKTA

1

22 46Monday, March 11, 2013

1.0

5

+3VS

LH5

1 2

10UH_LB2012T100MR_20%

D D

C C

+1.05VS_PCH

BLM18PG181SN1D_0603

B B

1

CH73 10U_0603_6.3V6M

2

LH7

1 2

LH8

1 2

+3VS_VCC_CLKF33

1

CH74 1U_0402_6.3V6K

2

+1.05VS_VCCADPLLB

1

CH94

CH93

1U_0402_6.3V6K

2

10U_0603_6.3V6M

+1.05VS_VCCADPLLA

1

CH95

2

10U_0603_6.3V6M

1

2

+3VALW_PCH

+1.05VS_PCH

1U_0402_6.3V6K

1

CH96 1U_0402_6.3V6K

2

0.1U_0402_10V7K

+1.05VS_PCH

Place CH79 near pin AF17

+1.05VS_PCH +1.05VS_VCCDIFFCLKN

A A

RH247 0_0402_5%

1 2

Rshort@

+1.05VS_VCCDIFFCLKN

1

CH81 1U_0402_6.3V6K

2

+1.05VS_VCCP

4.7U_0603_6.3V6K

lace CH86, CH87 , CH88 near pin BJ8

P

1U_0402_6.3V6K

+1.05VS_PCH

1U_0402_6.3V6K

0.1U_0402_10V7K

1

CH87

CH86

2

CH84

4

This pin can be left as NC if On-Die VR is enabled (Default)

1

CH55

0.1U_0402_10V7K

2

+1.05VS_PCH

1

CH65

CH64

22U_0805_6.3V6M

2

22U_0805_6.3V6M

1U_0402_6.3V6K

1

CH68

CH67

2

CH78

1

CH79

2

1

2

1

CH88

0.1U_0402_10V7K

2

CH69

1U_0402_6.3V6K

2

+VCCRTCEXT

1

+VCCAFDI_VRM

2

+1.05VS_VCCADPLLA

+1.05VS_VCCADPLLB

+1.05VS_VCCDIFFCLKN

+VCCSST

1

0.1U_0402_10V7K

CH85

2

+RTCVCC

+3VS_VCC_CLKF33

1

2

1

2

0.1U_0402_10V7K

1

CH90

2

UH1J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCDIFFCLKN[1]

AF34

VCCDIFFCLKN[2]

AG34

VCCDIFFCLKN[3]

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

1mA

BJ8

V_PROC_IO

A22

VCCRTC

PANTHER-POINT_FCBGA989

3

POWER

VCCIO[29]

119mA

1mA

PCI/GPIO/LPCMISC

SATA USB

10mA

HDA

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

1mA

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

3mA

1010mA

Clock and Miscellaneous

80mA 80mA

55mA

95mA

CPURTC

HM76R3@

N26

P26

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

+1.05VS_PCH

1

CH56 1U_0402_6.3V6K

2

+3VALW_PCH

1

CH60

0.1U_0402_10V7K

2

+1.05VS_PCH

+PCH_V5REF_SUS

1 2

CH66 0.1U_0402_10V7K

+PCH_V5REF_RUN

1

CH70 1U_0402_6.3V6K

2

1 2

CH75

0.1U_0402_10V7K

1

CH76

0.1U_0402_10V7K

2

This pin can be left as NC if On

-Die VR is enabled (Default)

+VCCAFDI_VRM

+1.05VS_PCH

+3VALW_PCH

1

CH92

0.1U_0402_10V7K

2

+3VALW_PCH

1

CH61

0.1U_0402_10V7K

2

+3VALW_PCH

+3VS

2

22,34

PCH_PWR_EN#

RH328

47K_0402_5%

Change RH232, RH237 to 10 ohm by follow Compal ORB abd Intel CRB

+3VS

1

CH72

0.1U_0402_10V7K

2

+1.05VS_PCH

1

CH77 1U_0402_6.3V6K

2

Place CH77 near pin AF13, AH13 , AH14, AF14

+1.05VS_PCH

1

CH82 1U_0402_6.3V6K

2

Place CH82 near pin AC16, AC17 , AD17

1

+5VALW_PCH+5VALW

QH6

AO3413_SOT23

D

S

13

G

2

1

CH80

2

12

0.1U_0402_10V7K~D

+5VALW_PCH +3VALW_PC H

12

RH232

10_0402_5%

+5VS +3VS

12

RH237

10_0402_5%

1

CH59

2

0.1U_0402_10V7K~D

21

DH3

CH751H-40PT_SOD323-2

+PCH_V5REF_SUS

1

CH63

0.1U_0402_10V7K

2

CH63 & CH71 are different by Intel CRB.

21

DH4

CH751H-40PT_SOD323-2

+PCH_V5REF_RUN

1

CH71 1U_0402_6.3V6K

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_POWER-2

VFKTA

1

23 46Monday, March 11, 2013

1.0

of

5

UH1H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

D D

C C

B B

A A

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

PANTHER-POINT_FCB GA989

HM76R3@

VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]

AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28

4

3

UH1I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

PANTHER-POINT_FCB GA989

HM76R3@

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2012/04/19 2015/04/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH_GND

VFKTA

24 46Monday, March 11, 2013

1

1.0

A

SATA HDD Conn.

JHDD

1

GND

2

A+

A-

GND

B-

B+

1 1

23 24

G

2 2

GND

V33 V33

V33 GND GND GND

V5 V5 V5

GND

DAS/DSS

GND

V12

GND

V12

GND

V12

SUYIN_127043FR022G196ZR

Conn@

-Sensor

SATA_PTX_C_DRX_P0

3

SATA_PTX_C_DRX_N0

4 5

SATA_PRX_DTX_N0

6

SATA_PRX_DTX_P0 SATA_PTX_C_DRX_N2

7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

Close to JHDD

1 2

C369 0.01U_0402_25V7K

1 2

C367 0.01U_0402_25V7K

1 2

C368 0.01U_0402_25V7K

1 2

C370 0.01U_0402_25V7K

+3VS

+5VS

10/19A Add +3VS on JHDD

+5VS

1.2A

1

C356

10U_0805_10V4Z

2

Place closely JHDD SATA CONN.

1

C357

0.1U_0402_10V7K

2

B

SATA_PTX_DRX_P0 SATA_PTX_DRX_N0

SATA_PRX_C_DTX_N0

SATA_PRX_C_DTX_P0

10/24Dchange JHDD pin 10 from +3vs to NC

16 16

1

C358

0.1U_0402_10V7K

2

SATA ODD Conn

15 14

C

JODD

GND

SANTA_202401-1

Conn@

D

Close to JODD

1 2 3 4 5 6 7

8 9 10 11 12 13

SATA_PTX_C_DRX_P2

SATA_PRX_DTX_N2 SATA_PRX_DTX_P2

+5VS_ODD

A+

A-

B-

B+

DP +5V +5V

MD

1 2

C376 0.01U_0402_25V7K

1 2

C377 0.01U_0402_25V7K

1 2

C378 0.01U_0402_25V7K

1 2

C375 0.01U_0402_25V7K

ODD_DETECT#

ODD_DA#

21

20

+5VS_ODD

SATA_PTX_DRX_P2 SATA_PTX_DRX_N2

SATA_PRX_C_DTX_N2

SATA_PRX_C_DTX_P2

P

lace components closely ODD CONN.

1

C355

10U_0805_10V4Z

2

16 16

1

C360

0.1U_0402_10V7K

2

1

C380

0.1U_0402_10V7K

2

Power Consumption

Peak 1800 mA Read (CD) 1100 mA Read (DVD) 950 mA Write 1300 mA Standby 20mA

E

+5VS +3VS_HDP

HDPINT

1

CG13 1U_0402_6.3V6K

GSENSOR@

2

17,32

HDPINT

1

CG12

1U_0402_6.3V6K

GSENSOR@

3 3

4 4

2

+3VS_HDP

UG3

GSENSOR@

1

VIN

VOUT

2

GND

3

SHDN#

BP

G9191-330T1U_SOT23-5

S

A000022I00

RPG1

1 8 2 7 3 6 4 5

4.7K_8P4R_5%

GSENSOR@

32

5

4

+3VS_HDP_R GXOUT GXIN +3VS_HDP_M

+3VS_HDP

SELF_TEST

+3VS_HDP

EC_SMB_CK2

SELF_TEST

+3VS_HDP_R

GXOUT

GXIN

+3VS_HDP

+3VS_HDP_M

RG7 1K_0402_5%

GSENSOR@

CG7

0.1U_0402_10V7K

GSENSOR@

12

UG1

2

12

4 6 8

9

TSH352TR LGA 16P

SA00004GB00

1

CG8

GSENSOR@

0.1U_0402_10V7K

2

GSENSOR@

3

VOUTX

Vdd1 Vdd2

ST PD FS

Rev

Voutx

5

Vouty

7

Voutz

10

NC1

11

NC2

14

NC3

15

NC4

16

NC5

1

GND1

13

GND2

UG2

1

P3_5/SSCK/SCL/CMP1_2

2

P3_7/CNTR0#/SSO/TXD1

3

RESET#

4

XOUT/P4_7

5

VSS/AVSS

6

XIN/P4_6

7

VCC/AVCC

8

MODE

9

P4_5/INT0#/RXD1

10

P1_7/CNTR00/INT10#

R5F211B4D34SP GSE NSOR@

VOUTY VOUTZ

SA00003A600

CG1 0.033U_0402_16V7KGSENSOR@ CG2 0.033U_0402_16V7KGSENSOR@ CG3 0.033U_0402_16V7KGSENSOR@

1 2 1 2 1 2

P1_6/CLK0/SSI01

P1_5/RXD0/CNTR01/INT11#

P1_4/TXD0

P1_3/KI3#/AN11/TZOUT

P1_2/KI2#/AN10/CMP0_2

P4_2/VREF

P1_1/KI1#/AN9/CMP0_1

P1_0/KI0#/AN8/CMP0_0

P3_3/TCIN/INT3#/SSI00/CMP1_0

P3_4/SCS#/SDA/CMP1_1

11

12

13

14

15

VOUTZ

16

17

VOUTX

18

VOUTY

19

20

RG9 47K_0402_5%

GSENSOR@

1 2

HDPACT 32

HDPLOCK 32

RG10 47K_0402_5%

12

GSENSOR@

+3VS_HDP

1

CG6

0.1U_0402_10V7K

GSENSOR@

2

EC_SMB_DA2

17,32

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

HDD/ODD/G-Sensor

VFKTA

E

1.0

of

25 46Monday, March 11, 2013

A

B

C

D

E

Slot 1 Half PCIe Mini Card-WLAN

40 mils

WLAN&BT Combo m odule circuits

+3V_WLAN

0.1U_0402_10V7K

1

CM2

CM1

2

0.1U_0402_10V7K

1 1

1

CM3

2

4.7U_0603_6.3V6K

Reserve +1.5 po wer rail & cap.

o supoort unkno wn keypart.

t

10/24 Remove +1.5VS on WLAN pin6/28/48, delete CM7, CM8 Delete RM22 (EC will programming H/L)

BT_ON

10/24D Delete QM1, change BT_ON design

From EC

32

BT_ON

BT o

n module

BT on module

Enable Dis able

H L

1 2

RM27

For isolate BT_ON and Compal Debug Card.

1K_0402_5%

E51_RXDBT_ON

10/24Dchange RM24 pin1 netname

o PCH

T

To PCH

32 32

from BT_CTRL to BT_ON

32

WLAN_WAKE#

BT_ON

17

CLKREQ_WLAN#

17

CLK_WLAN#

17

CLK_WLAN

17

PCIE_PRX_WLANTX_N2

17

PCIE_PRX_WLANTX_P2

17

PCIE_PTX_C_WLANRX_N2

17

PCIE_PTX_C_WLANRX_P2

E51_TXD

E51_RXD

1 2

RM24

+3V_WLAN

0_0402_5%@

E51_TXD E51_RXD

BT_CTRL_R

To EC (Need pull-up +3VL)

WLAN/ WiFi

2 2

Debug card using

+3VL +1.05VS_VCCP +3VALW

02/20 Delete CCL2, RCL5

1

CCL1

GCLK@

3 3

4 4

2

0.1U_0402_10V7K

10/24 10/24 Change CCL2 to @

1

CCL9 18P_0402_50V8J

GCLK@

2

GCLK@

YCL1 25MHZ 12PF X3G0 25000DK1H-X

GND

2

GND

1

CCL3

GCLK@

2

0.1U_0402_10V7K

+3VALW

+1.05VS_VCCP

3

CLK_X2CLK_X1

3

4

1

CCL12 18P_0402_50V8J

GCLK@

2

+3VL

JWLAN

1

3

5

7

7 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

GND153GND2

LOTES_AAA-PCI-049-P06-A

CLK_X1 CLK_X2

Conn@

2

4

6

8

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

1

CCL8

GCLK@

2

0.1U_0402_10V7K

+3V_WLAN

WL_OFF# PLT_RST#

LED_WIMAX#

RM6 100 K_0402_5%

GCLK@

UCL1

2

VDD

15

+V3.3A

8

VDDIO_25M_A

3

VDDIO_25M_B

1

XTAL_IN

16

XTAL_OUT

4

VSS

7

VSS

13

VSS

17

Thermal Pad

SLG3NB244VTR_TQFN16_2X3

VDD_RTC_OUT

PN: SA000057I00

PM_SMBCLK 11,12,17 ,33 PM_SMBDATA 11,12,17,33

USB20_N9 20 USB20_P9 20

LED_WIMAX#

1 2

CCL14

22U_0805_6.3V6M

GCLK@

10

VBAT

11

NC

9

32K

12

NC

5

25M_B

6

25M_A

14

To EC

WL_OFF# 32 PLT_RST#

To PCH

5,20,27,32

WiMax/ BT

33

+3VS

1

for safety requ est

RCL4

2

120_0603_5%

GCLK@

PCH_X1_R_R

2

CCL13

2.2U_0402_6.3V6M

1

GCLK@

+3VALW TO +3V_WLAN for WOWL

+3VALW

10/24Dchange RM31 to 10K, Add RM2

32

WOWL_EN#

To EC

10/19A Change RCL2 to short pad

12

+RTC

PCH_RTCX1_R

16

PCH_X1_R_R

02/20 Delete RCL2 LAN_X1_R_R, LAN_X1_R

1 2

Rshort@

RCL1 0_0402_5%

12

RM31

WOWL@

10K_0402_5%

1 2

47K_0402_5%

RM30

12

RM2

100K_0402_5%

WOWL@

10/24 Change PJ3 to RM1 and add BOM structure "NOWOWL@"

PCH_X1_R

WOWL@

2

CM9

0.1U_0402_10V7K

1

2

WOWL@

CM10

0.01U_0402_25V7K

1

+3VALW

Vgs=-4.5V,Id=3A,Rds<97mohm

S

G

2

AO3413_SOT23 QM2

D

1 3

WOWL@

17

Need short PJ3 if system don't support WOWL

+3V_WLAN

RM1

1 2

0_0603_5%

NOWOWL@

+3VS

Security Classif ication

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/0 4/19

Compal Secret Data

Deciphered D ate

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

WLAN/GCLK

VFKTA

Monday, March 11, 2013

E

26 46

1.0

A

Left USB 2.0 x 1

B

C

D

E

OUT OUT OUT

OCB

Rshort@

W=80mils

+USB_VCCC

6 7

CR38 1000P_0402_50V7K

8 5

WOL_EN#

Sx Enable Wake up

LOW

For EMI

@EMI@

12

USB_OC#2 20,32

WOL_EN#

Sx Disable Wake up

HIGH

JLAN

5,20,26,32

18

17 17

PCIE_PTX_C_LANRX_N1 17

PCIE_PTX_C_LANRX_P1 17 PCIE_PRX_C_LANTX_N1 PCIE_PRX_C_LANTX_P1

+3V_LAN

PLT_RST#

EC_SWI#

02/20 Delete net: LAN_X1_R

CLK_LAN# CLK_LAN

+USB_VCCC

LANCLK_REQ# ISOLATE#

USB20_P2_L USB20_N2_L

17 17

W=80mils

10/16 Swap JLAN pin define due to FFC fold

32

1

2

2 2

3

4

4 4

5

6

6 6

7

8

8 8

9

10

10 10

11

12

12 12

13

14

14 14

15

16

16 16

17

18

18 18

19

20

20 20

21

G1

22

G2

23

G3

24

G4

ACES_50559-02001-001

Conn@

S0

+5VALW

LR1

EMI@

USB20_P2

20

USB20_N2

1 1

20

USB20_P2

USB20_N2

2

3

WCM-2012-900T_0805

For LAN function

+3VS

RL24 10K_0402_5%

2 2

LAN_EN

17

CLKREQ_LAN#

+3VALW_PCH +3V_LAN

LAN_EN

CLKREQ_LAN#

PJ29

JP@

2

JUMP_43X39

12

17

1 3

2N7002KW_SOT323-3

112

LANCLK_REQ#

2

G

D

QL53

S

1

4

LANCLK_REQ#

USB20_P2_L

USB20_N2_L

32

USB_EN#2

+3VS

12

10/24 Add note for WOL_EN# S0 status

2.0A

UR1

2

IN

3

IN

4

EN/ENB

1

GND

G547I2P81U_MSOP8

SA00004KB00 SA00003TV00

2013/02/06 change UR1 UR4 from SA00004KB00 to SA00003TV00 DVT 2nd source X1 code issue

1K_0402_5% RL6

@

RL7

15K_0402_5%

ISOLATE#

RL433 0_0 402_5%

1 2

WOL_EN# HIGH

3 3

4 4

A

LAN WOL LAN_EN

--------------------------------------------- 0 0 0 0 1 1 0 1 0 0 1 1 1 0 1 1 1 1 1 1 1 1 1 0*

* S3: after SUSP# assert low over 100ms S4/S5: after SYSON assert low over 100ms

B

S0 Sx S0 Sx

ISOLATEB

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

Compal Secret Data

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

LUSB20/LAN conn.

VFKTA

E

27 46Monday, March 11, 2013

1.0

+3V_LAN rising time (10%~90%) need > 1ms and <100ms.

5

4

3

2

1

For EMI request (Place close to chip)

D D

CW8

0.1U_0402_16V4Z

USB20_N3

20

USB20_P3

3

0mils

+3VS

RW1 0_0402_5%

1 2

Rshort@

20

1

CW1

2.2U_0402_6.3V6M

2

+VCC_3IN1

30mils

please close the pin19 of UW1

+3VS_CR

30mils

C C

please close the pin4 of UW1

+3VS_CR

30mils

CW3

2.2U_0402_6.3V6M

B B

+3VS_CR

1

CW2

0.1U_0402_16V4Z

2

1

CW4

0.1U_0402_16V4Z

2

+3VS_CR

1

2

CW5

0.1U_0402_16V4Z

De-coupling and Bulk capacitor should place near to Cardreader chip and Combo Socket

Conn@

12

GND_SW

13

GND_SW

"Normal Close" type connector

1

UW1

2

22

RSTZ

2

DM

3

DP

1

+3VS_CR

+3VS_CR +VDD18

12mils

1

2

DVDD

24

PMOS

19

DVDD

23

DVDD

20

GPIO0

4

AVDD

18

VDD18

25

Thermal pad

GL834L-OGY01_QFN24_4X4

< 2 in 1 Card Reader >

JCARD

VDD

CMD

CLK VSS VSS

DAT0 DAT1 DAT2

CD/DAT3

WP_SW

CD_SW

T-SOL_156-2000302604

5 3 6 7 4

8 9 1 2

10 11

MS_INS SD_D2/MS_D5/SB13 SD_D3/MS_D4/SB12

SD CMD/SD_CMD

SD CLK/SD_CLK

SD_CDZ SD_D0/MS_D6/SB9 SD_D1/MS_D7/SB8

MS BS/MS_BS

SD_WP/MS_D1/SB5

SD_D4/MS_D0/SB4 SD_D5/MS_D2/SB3 SD_D6/MS_D3/SB1

SD_D7/MS_CLK/SB0

SDCMD_R SDCLK_R

SD_DATA0_R SD_DATA1_R SD_DATA2_R SD_DATA3_R

SDWP# SDCD

5 17

SD_DATA2

16

SD_DATA3

15

SDCMD

14

SDCLK

21

SDCD#

13

SD_DATA0

12

SD_DATA1

11 10

SDWP+3VS_CR

9 8 7 6

Close to connector

1 2

LW6 0_0402_5%

NC (default)

Power saving mode

1

CW6

0.1U_0402_16V4Z

2

For normal close type connector invert circuit

EMI@

SDCMD_R

@EMI@

Close to IC

1

CW7

2.2U_0402_6.3V6M

2

BLM15BD121SN1D_0402

2

CW14

4.7P_0402_50V8J

1

10K pull down

Normal modeGPIO0

30mil

+VCC_3IN1

LW5

EMI@

SD_DATA0

SD_DATA1

SD_DATA2

SD_DATA3

12

LW1

BLM15BD121SN1D_0402

EMI@

LW2

BLM15BD121SN1D_0402

EMI@

LW3

BLM15BD121SN1D_0402

EMI@

LW4

BLM15BD121SN1D_0402

EMI@

SDCLK_R

2

CW9

EMI@

10P_0402_50V8J

1

12

SD_DATA0_R

12

SD_DATA1_R

12

SD_DATA2_R

12

SD_DATA3_R

EMI@

2

1

CW12

CW13

10P_0402_50V8J

2

1

CW11

CW10

10P_0402_50V8J

WP_SWCD_SW

Card Uninsertion

Card Insertion

A A

5

4

Close

Open CloseOpen

Protect disable Protect Enable

3

Close

Compal Secret Data

2012/10/26 2013/10/26

Compal Secret Data

Deciphered Date

Close

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

+3VS_CR +3VS_CR

RW3 100K_0402_5%

SDCD

12

2

G

2

QW1A

61

S

SDCD#

D

2N7002KDWH_SOT363-6

Title

Size Document Number Rev

Custom

Date: Sheet of

12

RW4 100K_0402_5%

5

SDWP#

Compal Electronics, Inc.

USB-CardReader GL834L

VFKTA

G

QW1B

S

1

SDWP

34

D

2N7002KDWH_SOT363-6

1.0

28 46Monday, March 11, 2013

1.0

5

4

3

2

1

USB Sleep & Charge

State table for MAX14641

CB0 STATUS

0

D D

0

1

12/05 S&C IC Pin1 was connected to the EC(GPIO49) Pin82.

32

CHG_PW R_GATE#

SLP_CHG_ CB1 17,20

Right rear USB3.0 Conn.

Right rear USB3.0 Conn. Right front USB3.0 Conn.

Right rear USB3.0 Conn.Right rear USB3.0 Conn.

LR6

EMI@

2

USB20_N0

USB20_P 0

C C

20

U3RXDP1

20

U3RXDN1

20

U3TXDP1

20

U3TXDN1

1 2

CR14 0 .1U_0402_ 10V7K

1 2

U3TXDN1_C U3TXDN1_ C_L

CR15 0 .1U_0402_ 10V7K

20

2

3

20

3

WCM-201 2-900T_0805

LR2 EMI@

1 2

SW_W CM2012F2S_ 4P

LR5 EMI@

1 2

SW_W CM2012F2S_ 4P

1

USB20_N0 _R

1

4

USB20_P 0_R

4

U3RXDP1_ L

34

U3RXDN1_L

U3TXDP1_C_ LU3TXDP1_C

34

2013/02/06 change LR2,LR3,LR4, LR5 from SM070001U00 to SM070001R0 0 DVT 2nd source for X1 code iss ue

Right front USB3.0 Conn.

Right front USB3.0 Conn.Right front USB3.0 Conn.

(Support S&C function)

(Support S&C function)(Support S&C function)

02/22 SAWP CR16 pin1 U3TXDN2 to CR17 pin1 U3TXDP2

20

U3TXDP2

20

U3TXDN2

1 1

14641@

RR2

0_0402_ 5%

U3RXDP2

U3RXDN2

1 2

CR16 0.1U_04 02_10V7K

1 2

U3TXDN2_C U3TXDN2_C_L

CR17 0.1U_04 02_10V7K

CB1

1

0

USB20_N1 _S USB20_P 1_S

CHG_CB1

USB20_P 1_S USB20_P 1_R

0

UR2

1

CEN

2

DM

3

DP

4

CB1

9

PGND

MAX1464 1ETA-TGH7_TDFN8

UR2

Address 0x35

MAX1464 0ETA+TGH7

14640@

LR7

2

3

WCM-201 2-900T_0805

LR3 EMI@

1 2

SW_W CM2012F2S_ 4P

LR4 EMI@

1 2

SW_W CM2012F2S_ 4P

Mode

2A auto-detection charger mode for Apple device.

M2

A

Resistor dividers are connected to DP/DM. Including DCP

Forced 1A charger mode for Apple devices.

AP1

Resistor dividers are connected to DP/DM.

USB pass-through mode.DP/DM are connected to TDP/TDM

PM

USB pass-through mode with CDP emulation.

CM

Auto connects DP/DM to TDP/TDM depending on CDP detection status.

14641@

8

CHG_CB0

CB0

7

TDM

6

TDP

5

VCC

EMI@

1

4

34

1

2

USB20_N1 _RUSB20_ N1_S

U3RXDP2_ L

U3RXDN2_L

U3TXDP2_C_ LU3TXDP2_C

14641@

RR1 0_0 402_5%

+5VALW

CR9

0.1U_040 2_10V7K

EC_SMB_C K1

EC_SMB_D A1

SLP_CHG_ CB0

17,20 20

USB20_N1

20

USB20_P 1

+3VALW +3V ALW

2

QR1A

6 1

32,36,37

2N7002K DWH_SOT363 -6

14640@

32,36,37

12/04 Update S&C to 14640/14641 co-layout circuit(add RR1~RR4, QR1, modify net-name)

2013/02/06 change QC5,QH3,QH4, QW1, Q6 ,QA1 QR1 Q53 from SB00000EO 10 to SB00000DH00 DVT 2nd source for X1 code issue

3 4

14640@

5

QR1B2N7002K DWH_SOT363 -6

RR3

4.7K_04 02_5%

14640@

1 2

RR4

4.7K_04 02_5%

14640@

1 2

CHG_CB1

CHG_CB0

2013/02/06 change UR1 UR4 from SA00004KB00 to SA00003TV00 DVT 2nd source X1 code issue

W=80mils

2.0A

B B

32

USB_EN#0

U3TXDP1_C_ L

U3TXDN1_C_L

U3RXDP1_ L

U3RXDN1_L

A A

UR4

2

IN

3

IN

4

EN/ENB

1

GND

G547I2P 81U_MSOP8

SA00004KB00

A00003TV00

S

D3

1

2

4

5

3

TVWDF100 4AD0_DFN9

10/22A ESD request Delete DR1, DR2

5

+USB_VCCB+5VALW +USB_VCCA+5VALW

6

OUT

7

OUT

8

OUT

5

OCB

@ESD@

9

U3TXDP1_C_ L

8

U3TXDN1_C_L

7

U3RXDP1_ L

6

U3RXDN1_L

U3TXDP1_C_ L U3TXDN1_C_L

U3RXDP1_ L U3RXDN1_L

USB20_P 0_R USB20_N0 _R

+USB_VCCB

12

47U_080 5_6.3V6M

=80mils

0.1U_040 2_10V7K

CR12

1

CR13

2

JUSBR

9

StdA-SSTX+

8

StdA-SSTX-

7

GND-DRAIN

6

StdA-SSRX+

5

StdA-SSRX-

4

GND

3

D+

2

D-

1

VBUS

LOTES_AUS B0015-P001 A

4

1000P_0 402_50V7 K

Conn@

13

GND

12

GND

11

GND

10

GND

1

2

CR39

@EMI@

02/20 Delete CR7, CR8

11/28 Change CR10, CR12 from 47u 1206 to 0805 size (SE00000PL00)

32

USB_CHG_ EN#

Security Classification

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

U3TXDP2_C_ L

U3TXDN2_C_L

U3RXDP2_ L

U3RXDN2_L

10/22A ESD request Delete DR1, DR2

Issued Date

OUT OUT OUT OCB

@ESD@

W=100mils

6 7 8 5

9

U3TXDP2_C_ L

8

U3TXDN2_C_L

7

U3RXDP2_ L

6

U3RXDN2_L

Compal Secret Data

USB_CHG_ OC# 2 0,32USB_OC#0 17,20,32

+USB_VCCA

Deciphered Date

2

2.5A

UR3

2

IN

3

IN

4

EN/ENB

1

GND

SY6288DCA C_MSOP8

SA00006DN00

DR4

1

2

4

5

3

TVWDF100 4AD0_DFN9

2012/04/19 2015/04/19

+USB_VCCA+USB_VCCB

47U_080 5_6.3V6M

U3TXDP2_C_ L U3TXDN2_C_L

U3RXDP2_ L U3RXDN2_L

USB20_P 1_R USB20_N1 _R

W=100milsW

0.1U_040 2_10V7K

12

CR10

1

CR11

2

JUSBF

9 8 7 6 5 4 3 2 1

LOTES_AUS B0015-P001 A

1000P_0 402_50V7 K

1

CR40

@EMI@

2

Conn@

StdA-SSTX+ StdA-SSTXGND-DRAIN StdA-SSRX+ StdA-SSRXGND D+ DVBUS

13

GND

12

GND

11

GND

10

GND

Compal Electronics, Inc.

Title

RUSB30/S&C

Size Document Number Rev

Custom

Date: Sheet of

VFKTA

1

1.0

29 46Monday, March 11, 2013

1.0

A

UA1

MIC1_LINE1_R_R MIC1_LINE1_R_L

1 1

10/19A Add CA65 for ESD reserved

@ESD@

0.01U_0402_25V7K

1 2

CA65

16

AZ_RST_HD#

close to pin 28

1 2

CA60 10U_0603_6.3V6M

1

12

CA25

2.2U_0402_6.3V6M

2 2

CA55

0.1U_0402_10V7K

2

@

RA34 20K_0402_1%

11/28 Change RA50 to 269@

For EMI reserve

INT_MIC_CLK

RA42

MBK1005301YZF

CAM_EMI@

2013/02/06 change RA42 from SM01000CY00 to SM01000A900 PVT 2nd for X1 code issue

CA584.7U_0603_6.3V6K CA574.7U_0603_6.3V6K

16

close to pin19

RA30 20K_0402_1%

1 2

CA54 2.2U_0402_6.3V6M

1 2

CA53 2.2U_0402_6.3V6M

13

INT_MIC_DATA

12

32

INT_MIC_CLK_R

13

+MIC1_VREFO_L +MIC1_VREFO_R

EC_MUTE_INT

AZ_SYNC_HD

12

EC_MUTE#

MIC1_LINE1_R_C_L

MONO_IN

INT_MIC_CLK_R

SENSE_A SENSE_B

269@

1 2

22 21

17 16

31 30 29

32

15 14

20

12

10

11

0 mil

1

19

AC_JDREF

28

LDO_CAP

27

AC_VREF

34

CPVEE

35

CBN

36

CBP

2 3

13 18

47

4

RA50

4.7K_0402_5%

To solve noise issue

Internal AMP

EC_MUTE#

H

ight

Enable

LOW

Disable

B

MIC1_R MIC1_L

MIC2_R MIC2_L

MIC1_VREFO_L MIC1_VREFO_R MIC2_VREFO

LINE2_R LINE2_L

MONO_OUT

PCBEEP

SYNC

RESET#

JDREF LDO_CAP VREF CPVEE CBN CBP

GPIO0/DMIC_DATA GPIO1/DMIC_CLK

SENSE_A SENSE_B

EAPD PD#

ALC259-VC2-CG_MQFN48_6X6

259@

DVDD_IO

AVDD1 AVDD2

PVDD1 PVDD2

SPK_OUT_R+

SPK_OUT_R-

SPK_OUT_L+

SPK_OUT_L-

HPOUT_R HPOUT_L

SDATA_OUT

SDATA_IN

LINE1_L

LINE1_R

Thermal Pad

DVDD

BCLK

AVSS1 AVSS2 PVSS1 PVSS2

DVSS

NC

1 9

25 38

39 46

45 44

40 41

33 32

5 8

AZ_SDIN0_HD_R

6

AZ_BITCLK_HD

23

LINE1_R_C_L

24

LINE1_R_C_R

48

26 37 42 43 7

49

DGND

+DVDDMIC1_LINE1_R_C_R +DVDD

+AVDD +AVDD

+PVDD +PVDD

SPKR+ SPKR-

SPKL+ SPKL-

HPOUT_R HPOUT_L

AGND

75_0402_1% RA19 RA20

75_0402_1%

12

RA23 33_0402_5%

269@

1 2

CA9 0.1U_0402_10V6K

269@

1 2

CA10 0.1U_0402_10V6K

or EMI reserve

F close to codec

AZ_BITCLK_HD

C

0.1U_0402_16V4Z

close to pin1

0.1U_0402_16V4Z

close to pin9

HP_R

HP_L

MIC1_LINE1_R_L

MIC1_LINE1_R_R

For S&M

EMI@

12

RA4110_0402_5%

CA4

CA45

31 31

AZ_SDOUT_HD 16

AZ_SDIN0_HD

AZ_BITCLK_HD

CA51

1 2

EMI@

10P_0402_50V8J

35mA for 3.3V level

+DVDD

1

2

1

11/28 mount CA32 (modify BOM structure)

2

16

1 2

Rshort@

RA22 0_0402_5%

1

CA3

2.2U_0402_6.3V6M

2

For P/N and footprint

ease place them to ISPD page

Pl

UA1

ALC269Q-VB6-CG

269@

RA44 0_0603_5%

RA43 0_0603_5%

RA39 0_0603_5%

RA38 0_0603_5%

RA31 0_0603_5%

D

40 mil20 mil

close to pin 25 c

+AVDD

+3VS +5VALW

CA42

10U_0603_6.3V6M

close to pin39

close to pin46

650mA for 5V level

0.1U_0402_10V7K

2

1

CA33

CA32

2

CA37

10U_0603_6.3V6M

60 mil

+PVDD

1

2

1

2

CA47

1

0.1U_0402_10V7K

lose to pin 38

0.1U_0402_10V7K

2

1

CA50

1

2

CA35

1

10U_0603_6.3V6M

Sleep and Music

1 2

Rshort@

1 2

Rshort@

1 2

Rshort@

1 2

@EMI@

1 2

@EMI@

259@

26

9@

11/30 Reserve RA31,RA38 for EMI request

No

Yes

E

1 2

Rshort@

RA18

0_0603_5%

02/20 Change RA22, RA18, RA24 to short pad

1 2

Rshort@

RA24

0_0603_5%

+5VALW

Beep sound

P

PCH_SPKR

CI Beep

16

3 3

Sense Pin Impedance

39.2K

SE

NSE A

4 4

20K

10K

5.1K

39.2K

20K

10K

A

RA52

1 2

47K_0402_5%

RA49

4.7K_0402_5%

Codec Signals

PORT-I (PIN 32, 33)

PORT-B (PIN 21, 22)

PORT-C (PIN 23, 24)

(PIN 48)

PORT-E (PIN 14, 15)

PORT-F (PIN 16, 17)SENSE B

PORT-H (PIN 20)

1 2

Headphone out

Ext. MIC

CA70

1 2

0.1U_0402_10V7K

1

CA27

100P_0402_50V8J

2

For better sound by customer request

Function

MONO_IN

B

SPK

2W 4ohm =40mil For EMI reserve 1W 8ohm =20mil

SPKL+

SPKL-

SPKR+

SPKR-

close to codec

1 2

Rshort@

RA7 0_06 03_5%

1 2

Rshort@

RA8 0_06 03_5%

1000P_0402_50V7K

@EMI@

Rshort@

1 2

RA9 0_06 03_5%

1 2

Rshort@

RA10 0_0603_5%

1000P_0402_50V7K

@EMI@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

SPK_L1

1

CA31

2

1

CA34

2

2012/04/19 2015/04/19

SPK_L2

1

CA30 1000P_0402_50V7K

2

@EMI@

SPK_R1

SPK_R2

1

CA36 1000P_0402_50V7K

2

@EMI@

Compal Secret Data

2013/02/06 change QC5,QH3,QH4,QW1, Q6 ,QA1 QR1 Q53 from SB00000EO10 to SB00000DH00 DVT 2nd source for X1 code issue

Deciphered Date

MIC/LINE IN

MIC1_LINE1_R_R

31

10/24DChange RA35 to always mount

31

32

MIC1_LINE1_R_L

SM_SENSE#

EC

D

MIC_SENSE

2N7002KDWH_SOT363-6

RA35 100K_0402_5%

+3VL

2N7002KDWH_SOT363-6

RA48 2.2K_0402_5%

RA46 2.2K_0402_5%

61

RA29 100K_0402_5%

2

34

5

12

269@

+MIC1_VREFO_R

+MIC1_VREFO_L

RA37 0_0402_5%

259@

MIC1_R

MIC1_L

JACK_SENSE

RA47

1K_0402_5%

RA45

QA1A

269@

QA1B

269@

12

place close to chip

MIC_SENSE SENSE_A

RA32 20K_0402_1%

NBA_PLUG31

Title

Size Document Number Rev

Custom

Date: Sheet of

RA33 39.2K_0402_1%

12

Compal Electronics, Inc.

HDA-ALC259-VC/269-VB

30 46Monday, March 11, 2013

E

31

SPK Conn.

30 30 30 30 21

SPK_R1 SPK_R2 SPK_L1 SPK_L2

SPK_DET

10/22A ESD request Delete DA5, DA8 covered by ME design

HeadPhone/LINE Out JACK

1 2

HP_L

HP_R

Rshort@

RA54 0_0402 _5%

1 2

Rshort@

RA53 0_0402 _5%

+3VS

RA95

10K_040 2_5%

YSDA0502C _SOT23-3

DA6

@E

SD@

For common design, pull-high resistor should be placed at connector side.

10/19A Follow the latest connector list to change SPK footprint, The ME drawing with new

JSPK

8

GND

7

1 2

GND

6

5

4

3

2

1

ACES_50 228-0067N-001

Conn@

JSPK will be updated 10/20

SM_DET (GPIO48)

BIOS setup

1

0

Non-Harman detection

0

Conn@

SPK_DET (GPIO70)

Non-Brand1

11/28 Change SPK connector to 6 pin, change SPK_DET0 to SPK_DET, delete SPK_DET1 and RA96

JLINE

6 1

HP_R_L

HP_R_R

2

3

30

CA11100P_0402_50V8J

1

2

NBA_PLU G

CA12100P_0402_50V8J

1

2

3

4

5

TYCO_2041 280-1_3.6D

ONKYO

Speaker Type

Harman/KardonS&M option

Non Harman

BOM

269@

259@

MIC/LINE IN JACK

MIC1_L

MIC1_R

RA56 0_0402 _5%

RA55 0_0402 _5%

1 2

Rshort@

1 2

Rshort@

10/24 Change RA53~56 to short pad..........again......~

YSDA0502C _SOT23-3

DA7

@ESD@

1

MIC1_R_L

MIC1_R_R

2

3

1

@EMI@

JEXMIC

Conn@

6 1 2

3

30

CA13100P_0402_50V8J

1

2

@EMI@

JACK_SE NSE

+3VL

RA40

4.7K_040 2_5%

269@

1

CA14100P_0402_50V8J

2

@EMI@

4

5

TYCO_2041 280-1_3.6D

RA36

0_0402_ 5%

259@

Security Class ification

2012/04/ 19 2015/04/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/ 19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

Date: Sheet of

Compal Electronics, Inc.

AUDIO CONN

Monday, March 11, 2013

31 46

1.0

A

0.1U_0402_10V7K

1

2

EC_SMI#

KB_LED

E51_TXD E51_RXD

BT_ON

RB37 0_0402_5%

1 2

Rshort@

@

1

CB2

2

CHG_PWR_GATE#

EC_MUTE_INT_R

100K_0402_5%@

CB1

EC_MUTE_INT

EC_MUTE_INT_R

1 2

0.1U_0402_10V7K

21

GATEA20

21

KB_RST#

16

SERIRQ

16

LPC_FRAME#

16

LPC_AD3

16

LPC_AD2

16

LPC_AD1

16

LPC_AD0

20

CLK_PCI_EC

5,20,26,27

PLT_RST#

21

EC_SCI#

26

WOWL_EN#

KSI[0..7]

KSO[0..15]

29

CHG_PWR_GATE#

29,36,37

EC_SMB_CK1

29,36,37

EC_SMB_DA1

17,25

EC_SMB_CK2

17,25

EC_SMB_DA2

18

PM_SLP_S3#

18

PM_SLP_S5# 17,21 20,27

USB_OC#2

20,29

USB_CHG_OC#

29

USB_CHG_EN#

27

USB_EN#2 33 5

FAN_SPEED1

26

WL_OFF# 26 26 18

PM_PWROK 26 30

SM_SENSE#

POK

1 2 1 2

RB13 0_0402_5% RB14 0_0402_5%

2013/02/06 PVT Add RB12 RB37

CLK_EC

Voltage Comparator Pins FOR 9012 A3

VCIN0 pin109 V

CIN1 pin102

For RF

CLK_PCI_EC

12

RB3

22_0402_5% @RF@

1 1

10P_0402_50V8J

+3VL

2 2

+3VL

+3VS

10/24D Change GPIO0B netname from USB_OC#1 to USB_CHG_OC#, Also change this netname to P20 P29

3 3

2012/02/28 Connect RB14 form CLK_EC_R to POK and reserve RB13,RB22,CB16

2013/03/04 change CLK_EC_R to POK_R

4 4

1

CB11

@RF@

2

RB2

47K_0402_5%

1 2

CB12 0.1U_0402_10V7K

1 2

CB13 100P_0402_50V8J

100K_0402_5%

ESD@

RPB1

1 8 2 7 3 6 4 5

2.2K_8P4R_5%

RB27

1 2

PLT_RST#

33

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

EC_RST#

11/30 Move PLT_RST# ESD capacitor (CH104) to EC side (CB13) and mount 0.1u for ESD request

KSI[0..7]

KSO[0..15]

10/24D Add BT_ON on GPIO19

E51_TXD

10/16Change SM_SENSE# from pin 85

30 18 18,38

RB12

4.7K_0402_5%

VCOUT0 pin104

COUT1 pin103

V

A

B

02/20 Delete CB4, CB5

1 2 3 4 5 7 8

10

12 13

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

12

37 20 38

55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82

77 78 79 80

6 14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

1

CB16 20P_0402_50V8

@

2

EC_RST#

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

E51_TXD

POK_R

RB22

>1.2V <1.2V

HIGH

(default)

HIGH

L

OW

LOW

(default)

B

+3VL

UB1

GATEA20/GPIO00 KBRST#/GPIO01 SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1

LPC & MISC

LPC_AD0

CLK_PCI_EC PCIRST#/GPIO05 EC_RST# EC_SCII#/GPIO0E GPIO1D

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24

Int. K/B

KSO5/GPIO25

Matrix

KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

EC_SMB_CK1/GPIO44 EC_SMB_DA1/GPIO45 EC_SMB_CK2/GPIO46 EC_SMB_DA2/GPIO47

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 GPIO0A GPIO0B GPIO0C GPIO0D EC_INVT_PWM/GPIO11 FAN_SPEED1/GPIO14 EC_PME#/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 PCH_PWROK/GPIO18 SUSP_LED#/GPIO19 NUM_LED#/GPIO1A

XCLKI/GPIO5D XCLKO/GPIO5E

9

22

33

EC_VDD/VCC

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SM Bus

GPIO

GND/GND

11

24

+3VL

CB3

0.1U_0402_10V7K

1 2

96

125

111

67

EC_VDD0

EC_VDD/VCC

EC_VDD/AVCC

BATT_TEMP/GPIO38

AD Input

DAC_BRIG/GPIO3C

EN_DFAN1/GPIO3D

EC_MUTE#/GPIO4A

CAP_INT#/GPIO4C

CPU1.5V_S3_GATE/GPXIOA00

WOL_EN/GPXIOA01

VCIN0_PH/GPXIOD00

SPI Flash ROM

PECI_KB930/GPIO41

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

GPIO

PWR_LED#/GPIO54

BATT_LOW_LED#/GPIO55

PM_SLP_S4#/GPIO59

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04

PROCHOT_IN/GPXIOA05

H_PROCHOT#_EC/GPXIOA06

VCOUT0_PH/GPXIOA07

GPO

BKOFF#/GPXIOA08

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

SA_PGOOD/GPXIOA11

ON/OFF/GPXIOD03

GPI

LID_SW#/GPXIOD04

PECI_KB9012/GPXIOD07

GND/GND

AGND/AGND

GND/GND

GND0

35

KB9012QF-A3_LQFP128_14X14

69

94

113

11/28 Change RB36 from 2.2k to 0 ohm and CB50 to @

C

2013/02/06 change QB1 to SB00000EN00 for X1 code

21

GPIO0F

BEEP#/GPIO10

ACOFF/GPIO13

ADP_I/GPIO3A

IMON/GPIO43

IREF/GPIO3E

CHGVADJ/GPIO3F

USB_EN#/GPIO4B

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

ME_EN/GPXIOA02

SPIDI/GPIO5B

SPIDO/GPIO5C SPICLK/GPIO58 SPICS#/GPIO5A

ENBKL/GPIO40

FSTCHG/GPIO50

SYSON/GPIO56 VR_ON/GPIO57

AC_IN/GPXIOD01

EC_ON/GPXIOD02

SUSP#/GPXIOD05

EC_ON_R

885_EC_ON

23 26

GPIO12

27

63

BATT_PRES

64

GPIO39

65 66

GPIO3B

75

GPIO42

76

68 70

885_EC_ON

71 72

83 84 85 86 87

TP_CLK

88

TP_DATA

97 98 99 109

119 120 126 128

73

WLAN_WAKE #

74 89 90 91 92 93 95

SYSON

121

VR_ON

127

100 101 102 103

H_PROCHOT#_EC

104

VCOUT0_PH_L

105 106 107 108

110

ACIN_D

112

EC_ON_R

114 115

LID_SW#

116

SUSP#

117

GPXIOD06

V18R

9012@

UB1 NPCE885NB0DX LQFP 128P

885@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

+VTT_EC

118

EC_PECI

124

+EC_V18R

1 2

9012@

RB36 0_0402_5%

1 3

D

S

QB2

2N7002K_SOT23-3

G

2

C

1

2

885@

WL_BT_LED# USB_EN#0

FANPWM

BATT_PRES USB_OC#0 ADP_I ADP_V HDPLOCK EC_ENBKL

EC_MUTE#

PM_SLP_S4#

TP_DATA

SYSON VR_ON

ON/OFFBTN# LID_SW#

SUSP#

CB15

4.7U_0603_6.3V6K

RB20 330K_0402_5%

02/20 Delete CB50

RB24

10K_0402_5%

2012/04/19 2015/04/19

33 29 5

10/18B Change BATT_TEMPA to BATT_PRES

36 17,20,29 36,37 37

10/16change HDPLOCK from pin 86

25 13,19

PCH_SUSPWRD N#18

SUSACK#

TP_CLK

VGATE

VCIN0_PH

EC_SCK EC_CS0#

WLAN_WAKE #

WOL_EN#

HDPACT BATT_FULL_LED# CAPS_LED# PWR_SUSP_LED# BATT_CHG_LOW_LED#

PCH_RSMRST# EC_LID_OUT# PROCHOT_IN

BKOFF#

PBTN_OUT# PCH_PWR_EN

SA_PGOOD

885@

12

HDPINT

PWRME_CTRL

EC_SDIO EC_SDI

12

Compal Secret Data

25

18

Reserve this signal to EC by SW demand 2011/10/18a

30 18

11/30 Change USB_EN#0 from pin84 to pin23. To implement fix code design

33 33

18,42

16 36

16 16 16 16

26 27 25 33 33 33

33 39 42

18 21 36

PROCHOT_IN connect to power portion (9012 only)

13 18

11/30 Change FB_CLAMP from pin23 to pin127

34

(UMA don’t use FB_CLAMP), SO I NC

41

33 33 34,39,40

1 2

885@

1 2

RB4 0_0402_5% RB19 43_0402_5%

+3VL

EC_ON

10/18B Add RB24

Deciphered Date

D

42

VR_HOT#

10/16 NC EC Pin23 FB_CLAMP /Pin27 CLK_REQ_GC6#

12/05 Add CHG_PWR_GATE# and add RB11 10K pull high to 3VL

VCIN0_PH connec t to p

ower portion (9 012 only)

11/30 Change PM_SLP_S4# from pin127 to pin84 To implement fix code design

+1.05VS_VCCP

H_PECI

38

D

H_PROCHOT#_EC

E

1 2

Rshort@

RB1 0_0402_5%

BATT_PRES

ACIN_D

H_PROCHOT#_EC

LID_SW#

WLAN_WAKE #

CHG_PWR_GATE#

TP_CLK

TP_DATA

SYSON

SUSP#

VR_ON

VCOUT0_PH_L

VCOUT0_PH connect to power portion (9012 only)

ACIN_D

5

13

D

QB1

2

G

2N7002K_SOT23-3

S

@

1 2

CB9 100P_0402_50V8J

1 2

CB10 100P_0402_50V8J

10/22A chang CB10 to mount

1 2

@

RB6 10K _0402_5%

1 2

RB35 47K_0402_5%

1 2

RB7 10K _0402_5%

1 2

RB11 10K_0402_5%

1 2

RB8 4.7K_040 2_5%

1 2

RB9 4.7K_040 2_5%

1 2

RB10 4.7K_0402_5%

1 2

RB21 10K_0402_5%

1 2

RB23 10K_0402_5%

1 2

Rshort@

RB34 0_0402_5%

RB18

330K_0402_5%

12

DB1RB751V40_SC76-2

1

CB8 47P_0402_50V8J

2

+3VS

+3VL

+3VS

VS_ON

+3VL

12

H_PROCHOT#

ACIN

Close to EC

@ESD@

1 2

CB14 180P_0402_50V8J

2013/02/06 PVT Reserve CC21 CC23 CC24 CC25 CC26 CC27,ADD CC35 CC20 main source SCV00001K00,2nd source SCV2100P010

ON/OFFBTN#PM_PWROK

2

@ESD@

CC25 100P_0402_50V8J

1

Title

Size Document Number Rev

Date: Sheet of

@ESD@

Compal Electronics, Inc.

Monday, March 11, 2013

SUSP#

FANPWM

2

1

LPC-EC-KB9012&NPCE885N

CC24 100P_0402_50V8J

E

@ESD@

5

38

18,37

2

CC23 100P_0402_50V8J

1

32 46

1.0

5

4

3

2

1

26

Conn.

JPWR

2

112

4

334

6

556

8

778

ACES_50 611-0040N-0 01

Conn@

ESD diode on SB

Keyboard LED

32

KB_LED

KEYBOARD CONN.

KSI[0..7]

KSO[0..1 5]

10/18B Update Keyboard pin define

KSO[0..1 5]

Battery Reset

10/16Add Battery Reset function

38

ON/OFFBTN#

10K_040 2_5%

KSI[0..7]

ENLDO

2

G

+5VS

R587

KBL@

CAPS_LE D#

+5VS

Q38 AO3413_ SOT23

S

12

G

13

D

Q52 2N7002K W_SOT323-3

KBL@

S

32

+3VS

KBL@

D

13

2

3

4

+5VS_LED

R376 3 00_0402_ 5%

TJG-533-V-T/R_6 P

SW4

5

6

Touchpad Connector

JTP

Conn@

16 14 12 10

8 6 4 2

HB_A060 877-SAVR01

2013/02/06 SWAP JTP pindefine for Pre_MP

+5VS_LED

32

12

10/25A Change SW4 netname from BI to ENLDO and change pin1,2 to GND (delete R5)

1

2

15

16

13

14

11

12

9

10

7

8

5

6

3

4

1

2

10/22A ESD request Delete D90, covered by ME design

10/19A Swap JBLG pin define

JBLG Conn@

1 2 3 4 5 6

ACES_50 578-0040N-0 01

JKB

1

2

3

4

5

KSI1 KSI6 KSI5 KSI0 KSI4 KSI3 KSI2 KSI7 KSO15 KSO12 KSO11 KSO10 KSO9 KSO8 KSO13 KSO7 KSO6 KSO14 KSO5 KSO3 KSO4 KSO0 KSO1 KSO2

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

34 GND1 GND2

CVILU_CF1 7341U0R0-NH

Conn@

1 2 3 4 GND GND

35 36

+3VS

32

TP_DATA

32

TP_CLK

11,12,17 ,26

PM_SMBDA TA

11,12,17 ,26

PM_SMBCL K

Screw Hole

ISPD

ZZZ

DA6000WJ000

PCB LA-98 62P

(Default) H BD82HM76 SLJ8E C1 SA00005FHA0

Panther Point 82HM70 C-1 HM7 0

H1

H6

PCH

M76R1@

UH1

HM70R1@

SA00005MQ50

H_4P2

@

PTH

1

H9

1

H_7P0

@

H_3P0

@

H15

10/18B Update NFC pin define

11/28 Delete NFC Function

10/10 Delete VGA screw hole H4/H5

H10

H11

H_3P0

@

1

H_4P0

11/28 Change H15 from H_3P0 to H_4P0

@

1

10/19A Add R6, R7 for NFC

WLAN standoff

NPTH

H17

H_3P2N

@

1

11/28 Add H18 ME only change to heng yuan kong, don't need modify

H29

H_3P3

@

1

H18

H19 H_3P2x3P7 N

@

1

11/28 Add H19 For ME po kong

1

H_3P2N

@

NFC

C

PU

H2 H_4P6

@

1

H7 H_3P0

@

1

H12

H_3P0

@

1

H_3P0

@

H_4P6x4P2

@

H13

1

H8

H_3P0

@

H3

1

H_3P2

@

1

H14

PCB Fedical Mark PAD

FD3

FD2

FD1

@

1

(Default) CPU@ SA00004SX00

UC1

SA00006DB40

Ivy Bridge i7 35 37U R1

UC1

SA00006D970

Ivy Bridge i3 32 27U R1

UC1

SA000061230

Ivy Bridge Pentiu m 2117U R1

@

1

CPUI7353 7UR1@

CPUI3322 7UR1@

CPUP2117 UR1@

FD4

@

1

UC1

CPUI5333 7UR1@

SA00006D850

Ivy Bridge i5 33 37U R1

UC1

CPUI3237 5MR1@

SA00006ED40

Ivy Bridge i3 23 75M R1

UC1

CPUC847R1 @

SA00005VK00

Ivy Bridge Celeron 84 7 R1

CPU

UC1

CPUI7353 7UR3@

????????????

Ivy Bridge i7 35 37U R3

UC1

CPUI3322 7UR3@

????????????

Ivy Bridge i3 32 27U R3

UC1

CPUP2117 UR3@

????????????

Ivy Bridge Pentiu m 2117U R3

11/30 Update CPU config and PN

UC1

CPUI5333 7UR3@

????????????

Ivy Bridge i5 33 37U R3

UC1

CPUI3237 5MR3@

????????????

Ivy Bridge i3 23 75M R3

UC1

CPUC847R3 @

????????????

Ivy Bridge Celeron 84 7 R3

Power Button

02/20 Delete SW2, SW3

D D

BATT CHARGE /FULL LED

D24

2 1

+5VALW

C C

White LED brigh t when both AC- adaptor is plug ged in and Batt ery is full cha rged A

mber LED bright while charging battery from A C-adaptor.

Amber LED blink during Critica l Low Battery

HT-F196BP5_ WHITE

D23

2 1

HT-191UD5_A MBER_0603

R60 390_040 2_5%

1 2

R3 510_040 2_5%

POWER LED

D25

+5VALW

White LED brigh t when system i s power on. White LED blink when system is sleep mode.

2 1

HT-F196BP5_ WHITE

R61 390_040 2_5%

1 2

WLAN/WiMAX LED

B B

1 2

+5VALW

+5VS

R268 0_0402_ 5%

1 2

R269 0_0402_ 5%

D26

2 1

@

HT-191UD5_A MBER_0603

1 2

R66 510_040 2_5%

Amber LED brigh t while Wireles s and/or WiMAX turns on.

R819

10K_040 2_5%

@

+3VL

R395

100K_04 02_5%

1 2

ON/OFFBTN#

10/22A ESD request Delete D2, covered by ME design

BATT_FULL_L ED#

BATT_CHG_LO W_LED#

PWR_SU SP_LED#

2

6 1

12

5

Q157A

3

2N7002DW -T/R7_SOT363 -6

4

@

Q157B 2N70 02DW-T/R7_S OT363-6

@

WL_BT_L ED#

ON/OFFBTN# 32

32

LED_WI MAX#

32

Lid SW

+3VL

U21 APX9132 ATI-TRL_SOT23-3

A A

1

C453

0.1U_040 2_16V4Z

2

VDD2VOUT

GND

1

10P_040 2_50V8J

3

1

@

C452

2

LID_SW #

32

Security Classification

Issued Date

10/18 Power side need add off- page type

5

4

3

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

TP/ISPD/KB/LED/Screw

VFKTA

Monday, March 11, 2013

1

33 46

1.0

A

+5VALW TO +5VS +3VALW TO +3VS Load switch

1 1

B

+5VALW

@

C1

1

2

VIN 5V and 3.3V (VBIAS=5V),IMA X(per channel)=6A,Rds=18mohm

U1

1

VIN1

2

VIN1

1U_0402_6.3V6K

+3VALW

@

SUSP#

+5VALW

1

C10

1U_0402_6.3V6K

2

SUSP#

3

ON1

4

VBIAS

5

ON2

6

VIN2

7

VIN2

TPS22966DPUR_SON14_2X3

VOUT1 VOUT1

VOUT2 VOUT2

GPAD

GND

C

+3VS

+5VS

2

C3

@

0.1U_0402_10V7K

1

2

C8

@

0.1U_0402_10V7K

1

14 13

12

CT1

11

10

CT2

9 8

15

C2 180P_0402_50V8J

1 2

C9 330P_0402_50V7K

1 2

D

E

2

G

+5VALW

Q5527

R5545 10K_0402_5%

1 2

PCH_PWR_EN#

13

D

2N7002KW_SOT323-3

S

PCH_PWR_EN# 22,23

2N7002KW_SOT323-3

+1.8VS

R470 470_0805_5%

1 2

13

D

Q190

2

G

S

2013/02/06 chan ge QC5,QH3,QH4, QW1, Q6 ,QA1 QR1 Q53 from SB00000EO 10 to SB00000DH00 DVT 2nd source for X1 code issue

SUSP

9

32,39,40

SUSP

SUSP#

R5546

885@

10K_0402_5%

+3VL

1 2

10/18B Add R5546

PCH_PWR_EN32

2 2

SUSP#

SUSP

+5VALW

1 2

61

2

R422 100K_0402_5%

Q6A 2N7002KDWH_SOT363-6

+0.75VS

R421

22_0805_5%

1 2

13

D

Q189

2N7002KW_SOT323-3

S

2

G

+1.05VS_VCCP

2

SUSP

G

2N7002KW_SOT323-3

R468 470_0805_5%

1 2

13

D

Q60

S

For S3 CPU Power Saving

VCCP_PWRGOOD

3 3

1 2

40,41

R158 220K_0402_5%

SUSP

34

5

0.75VR_EN

Q6B 2N7002KDWH_SOT363-6

0.75VR_EN

39

ZPODD@

+5VS_ODD

1 2 61

+5VS TO +5VS_ODD

R457

470_0805_5%ZPODD@

Q53A

2

ODD_EN#

2N7002DW-T/R7_SOT363-6

+3VS

ODD_EN#

4

2N7002DW-T/R7_SOT363-6

ZPODD@

2013/02/06 chan ge QC5,QH3,QH4, QW1, Q6 ,QA1 QR1 Q53 from SB00000EO 10 to SB00000DH00 DVT 2nd source for X1 code issue

+5VS

ZPODD@

2

C471

0.1U_0402_10V7K

1

2

AO3413_SOT23

C217

0.01U_0402_25V7K

1

5

Q53B

ZPODD@

R441 100K_0402_5%

R440

1 2

3

21

47K_0402_5%

ZPODD@

+5VS

Vgs=-4.5V,Id=3A,Rds<97mohm

ZPODD@

S

Q45

G

2

D

1 3

12

NONZP@

R120 0_0805_5%

+5VS_ODD

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

DC-DC INTERFACE

VFKTA

Monday, March 11, 2013

E

of

34 46

of

34 46

of

34 46

1.0

A

B C D

EMI Part (47.1)

A51 need add fuse

1 1

2 2

@

PJP1

1

2

3

4

ACES_50299-00401-001

PF1

21

7A_32V_S1206-H-7.0A

DC_IN_S1

12

PC102 1000P_0603_50V7K

PL102

FBMA-L11-201209-121LMA50T_0805

1 2

PL101

FBMA-L11-201209-121LMA50T_0805

1 2

12

PC103

100P_0603_50V8

12

PC101

100P_0603_50V8

VIN

12

PC104 1000P_0603_50V7K

For ML1220 RTC (38.2)

PBJ101 @

- +

ML1220T13RE

3 3

12

+RTC

PR101

560_0603_5%

1 2

PR102

560_0603_5%

1 2

+RTC_R

01/17: Change PBJ101 footprint to BJ_ML1220T10_2P

+RTCBATT

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

STODY OF THE COMPETENT DIVISION OF R&D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DCIN/PRECHARGE

VFKTA

D

35 46

1.0

A

@

ACES_50299-01001-W01

1

2

3

PJP2

4

5

6

7

8

9

10

1 1

2 2

Other component (37.1)

BATT_S1

BATT_P5 EC_SMDA

EC_SMCA

PR20

100_0402_1%

1 2

PR21 100_0402_1%

1 2

PF2

21

10A_125V_TR2/6125FF10-R

12

PR14 1K_0402_1%

12

PR19

1K_0402_1%

PR16

6.49K_0402_1%

12

BATT_PRES

EC_SMB_DA1

EC_SMB_CK1

VMB

+3VL

32

29,32,37

B

PL3

FBMA-L11-201209-121LMA50T_0805

1 2

PL2

FBMA-L11-201209-121LMA50T_0805

1 2

12

PC7

1000P_0402_50V7K

EMI Part (47.1)

12

PC8

0.01U_0402_25V7K

BATT+

C

OTP (39.7)

32,37

32

ADP_I

PROCHOT_IN

PR2

@

0_0402_5%

1 2

D

+3VL

12

PR1

1 2

1K_0402_1%

32

VCIN0_PH

PR3

1 2

20K_0402_1%

PR5

@

0_0402_5%

1 2

12

PC11

@

0.1U_0402_10V7K

PR4

12.1K_0402_1%

12

PH1

100K_0402_1%_TSM0B104F4251RZ

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

BATTERY CONN / OTP

VFKTA

D

36 46

1.0

A

B

C

D

for reverse input protection

Charger controller (40.1), Support component (40.2)

13

D

2

PQ209

G

SSM3K7002FU_SC70-3

PR225

1 2

1 1

2 2

3 3

1M_0402_5%

TPCA8057-H_PPAK56-8-5

PQ203

5

12

PC230

2200P_0402_50V7K

1 2

3M_0402_5%

1 2 3

4

BQ24735_ACDRV_1

Vin Dectector

Min. Typ Max. H-->L 17.23V L--> H 17.63V

ILIM and external DPM

3.61A

4 4

PR226

S

EMI Part (47.1)

P2P1 B+VIN

1

PQ205

2 3

12

SI7716ADN-T1-GE3_POWERPAK8-5

PC231

0.1U_0402_25V6

12

PR235

PR234

4.12K_0603_1%

5

4

PC238

0.1U_0603_25V7K

+3VL

PR239 10K_0402_1%

1

2

0.1U_0402_25V6

12

BQ24735_CMSRC

BQ24735_ACDRV

1 2

PR211

0.01_1206_1%

1 2

PC236

BQ24735_ACP

4

3

12

PC235

BQ24735_ACN

BQ24735_ACOK

0.1U_0402_25V6

PC239

1 2

1U_0603_25V6K

PU200

21

PAD

1

ACN

2

ACP

3

CMSRC

4

ACDRV

5

ACOK

1UH_NRS4018T1R0NDGJ_3.2A_30%

VIN

2

3

PD230 BAS40CW_SOT323-3

1 12

1 2

PR228

10_1206_1%

BQ24735_VCC

BQ24735_LX

19

20

VCC

PHASE

BQ24725RGRR_QFN20_3P5X3P5

ACDET6IOUT7SDA8SCL9ILIM

ACIN18,32

VIN

12

PR244

BQ24735_ACDET

422K_0402_1%

12

PR245

PC244

66.5K_0402_1%

0.1U_0402_25V6 PC245

12

100P_0402_50V8J

PL201

1 2

0.047U_0402_25V7K

PC237

12

PR229

2.2_0603_5%

DH_CHG

BQ24735_BST

17

18

BTST

HIDRV

PR246

@

0_0402_5%

1 2

12

BQ24735_REGN

16

REGN

LODRV

BATDRV

10

BQ24735_ILIM

12

PC211

12

PC213

PD231 RB751V-40_SOD323-2

DH_CHG

PR210 0_0603_5%

PC205

1 2

1U_0603_25V6K

15

DL_CHG

14

GND

SRP

SRN

PR242

12

10_0603_1%

13

1 2

SRP

6.8_0603_5%

1 2

12

SRN

11

BQ24735_BATDRV

1 2

12

PC243

100K_0402_1%

0.01U_0402_25V7K

EC_SMB_CK1

EC_SMB_DA1

ADP_I

PC246

@

0.1U_0402_10V7K

Please locate t he RC Near EC chip 2011-02-22

10U_0805_25V6K

12

10U_0805_25V6K

1 2

@

PR236

PR237

PR241

357K_0402_1%

PC214

0.1U_0402_25V7K

CSOP1

CSON1

+3VALW

29,32,36

32,36

5

4

123

5

4

12

PC242

0.1U_0603_16V7K

BQ24735_BATDRV

PQ201 AON7408L

4.7UH_ETQP3W4R7WF N_5.5A_20%

BQ24735_LX

12

PQ202

AON7406L

123

12

E

1 2

4.12K_0603_1%

PL202

1 2

PR206

@EMI@

4.7_1206_5%

PC206

@EMI@

680P_0603_50V8J

MI Part (47.1)

PR247

309K_0402_1%

PR249

47K_0402_1%

For A51 ADP_V function

PQ207

5

SI7716ADN-T1-GE3_POWERPAK8-5

PR233

CHG

CSOP1

12

4

BQ24735_BATDRV_1

PR227

0.01_1206_1%

1

2

PC240

0.1U_0402_25V6

4

3

CSON1

12

VIN

12

PR248

10K_0402_1%

1 2

12

PC247

@

0.1U_0402_10V7K

1 2 3

12

PC234

0.01U_0402_50V7K

BATT+

12

PC241

0.1U_0402_25V6

PC223

PC222

10U_0805_25V6K

ADP_V

32

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

CHARGER

VFKTA

D

37 46

1.0

A

B

C

D

3/5VALW controller (35.1), Support component (35.2)

1 1

PC345@

100P_0402_50V8J

PR333

@

0_0402_5%

1 2

PR330

14K_0402_1%

1 2

PR331

20K_0402_1%

1 2

UG_3V

LX_3V

LG_3V

499K_0402_1%

1 2

12

PC360

1 2

BST_3V

PR334

0.1U_0603_25V7K

PR340

2.2K_0402_1%

1 2

PR341

@

0_0402_5%

FB_3V

6

7

8

9

10

PGOOD

BOOT2

UGATE2

PHASE2

LGATE2

PR338

100K_0402_1%

12

PR337

PR342

56K_0402_1%

1 2

226K_0402_1%

2

3

4

5

FB2

TON

ENTRIP2

VIN11ENLDO12SECFB13LDO514LDO3

12

PC342

1U_0603_10V6K

12

PC343

PR332

@

1 2

100K_0402_5%

4.7U_0603_6.3V6K

PR357

FB_5V

143K_0402_1%

1

ENTRIP1

UGATE1

PHASE1

LGATE1

PU330

15

RT8243AZQW_WQFN2 0_3X3

PC344

4.7U_0603_10V6K

EMI Part (47.1)

B+

2 2

PL331

HCB2012KF-121T50_0805

1 2

+3VALWP

3/5V_B+

PC339

0.1u_0402_50V7K

12

PC340

10U_0805_25V6K

PL332

4.7UH_ETQP3W4R7W FN_5.5A_20%

1

+

PC331

220U_6.3V_M

2

12

PR336

4.7_1206_5%

@EMI@

SNUB_3V

12

PC336

680P_0603_50V8J

@EMI@

5

18,32

PQ331

4

AON7408L

4

AON7406L PQ332

0.1U_0402_10V7K

123

5

123

+3VL

POK

PC335

1 2

100K_0402_1%

BST1_3V

PR335

3/5V_B+

EMI Part (47.1)

32

3 3

EC_ON

VS_ON32

3.3V P

eak Current 8A OCP current 9.68A Delta I=1.28A ,ripple=1.28x15m=19.2mV FSW=455kHz DCR 35mohm +/-15% ESR 15mohm

H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :19mohm , 23.5mohm

TYP MAX

PR350

30K_0402_1%

1 2

PR351

19.1K_0402_1%

1 2

21

FB1

PAD

20

BYP1

BOOT1

19

BST_5V

18

UG_5V

17

LX_5V

16

LG_5V

PR355

@

0_0402_5%

1 2

+3VLP

12

PC341

4.7U_0603_10V6K

ENLDO

33

PJ333

@

+3VLP +3V L

(100mA,40m ils ,Via N O.= 2)

2

JUMP_43X39

112

0.1U_0402_10V7K

BST1_5V

5V Peak Current 10A OCP current 12.03A FSW=390kHz Delta I=4.29A,ripple=4.29*17m=72.93mV DCR 15.5mohm+/-15% ESR 17mohm

H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :10.8mohm , 13.6mohm

3/5V_B+

12

PC361

10U_0805_25V6K

PC355

1 2

FDMC7692S_MLP8-5

4

PQ352

+3VALWP +3VALW

+5VALWP +5VALW

TYP MAX

5

AON7408L PQ351

123

2.2UH_ETQP3W2R2W FN_8.5A_20%

5

12

SNUB_5V

123

12

MI Part (47.1)

E

@

112

JUMP_43X118

@

112

JUMP_43X118

PL352

1 2

PR356

@EMI@

4.7_1206_5%

PC356

@EMI@

680P_0603_50V8J

PJ331

2

PJ332

2

+5VALWP

1

+

PC351

220U_6.3V_M

2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

3VALW/5VALW

VFKTA

D

38 46

1.0

DDR controller (35.3), Support component (35.4)

A

PL151

HCB1608KF-121T30_0603

B+

1 2

0.68UH_PCMB053T-1R0MS_8.5A_20%

PL152

+1.5VP

1

+

PC157

2

330U_D2_2V_Y

1 1

PJ153

@

2

112

JUMP_43X39

1.5V_B+

12

PC152

330P_0402_50V7K

12

SNUB_+1.5VP

12

(0.5A,40mi ls ,Via NO .= 1)

EMI Part (47.1)

12

PC154

10U_0805_25V6K

PQ151

AON7408L

PR156

4.7_1206_5%

PC156

680P_0402_50V7K

32

+1.5VP

(

15A, 600mi ls ,Via NO .= 30)

OCP=18A

PQ152

FDMC7692S_MLP8-5

SYSON

@

2

JUMP_43X118

@

2

JUMP_43X118

123

PJ151

PJ152

PR155

@

PC166

PC164

1 2

2.2_0603_5%

SW_1.5V

DL_1.5V

12

EN_1.5V

34

BST_1.5V-1

PC155

5

1 2

0.1U_0603_25V7K

4

PR159

5.1_0603_5%

4

1 2

+5VALW

1U_0603_10V6K

PR163

@

0_0402_5%

1 2

12

112

+1.5V+0.75VSP +0.75VS

0.1U_0402_10V7K

PR158

27.4K_0402_1%

1 2

PC162

1U_0603_10V6K

1 2

VDD_1.5V

+5VALW

0.75VR_EN

BST_1.5V

DH_1.5V

CS_1.5V

1.5V_B+

15

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

PR161

510K_0402_1%

1 2

16

17

19

18

BOOT

PHASE

UGATE

RT8207MZQW_W QFN20_3X3

S5

PGOOD

TON

8

7

9

10

TON_1.5V

PR164

0_0402_5%

12

EN_0.75VSP

12

20

PU150

VTT

PAD

VLDOIN

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

S3

6

FB_1.5V

PC167

@

0.1U_0402_10V7K

21

1

2

3

4

5

VTTREF_1.5V

PR162 10K_0402_1%

1 2

PR160

10.2K_0402_1%

+1.5V

+1.5VP

12

+0.75VSP

12

PC160

PC159

10U_0805_6.3V6K

12

PC163

0.033U_0402_16V7K

+1.5VP

PJ180

@

+1.8VSP +1.8VS

JUMP_43X79

112

2

1.5V e

ak Current 16.8A

P OCP current 20 A FSW=495kHz DCR 13mohm ESR 9mohm

H/S Rds(on) :27mohm , 34mohm L/S Rds(on) :10.8mohm , 13.6mohm

TYP MAX

STATE S3 S5 1.5VP VTT_REFP 0.75VSP

S0

S3

S4/S5

Hi Hi

HiLo

Lo Lo

On

Off

(Discharge)

On

Off

(Discharge)

On

Off (Hi-Z)

Off

(Discharge)

Note: S3 - sleep ; S5 - power off

+5VALW

SUSP#

PL181

HCB1608KF-121T30_0603

1 2

PR181

@

1 2

32,34,40

0_0402_5%

499K_0402_1%

1.8VS controller (35.15), Support component (35.16)

PU180

SY8032ABC_SOT23-6

4

IN

5

12

PC184 22U_0805_6.3VAM

EN_1.8V

12

@

PR182

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

12

PC185

0.1U_0402_10V7K

@

PG

FB6EN

2012/04/19 2015/04/19

3

LX

2

GND

1

Compal Secret Data

Deciphered Date

LX_1.8V

1UH_NRS4018T1R0NDGJ_3.2A_30%

PR186

4.7_0402_1%

PC186

1 2

12

PL182

1 2

20K_0402_1%

FB_1.8V

680P_0402_50V7K

PR183

12

+1.8VSP

12

PC187

68P_0402_50V8J

12

PR184

10K_0402_1%

Title

Size Document Number Rev

Custom

Date: Sheet of

12

PC183

PC182

22U_0603_6.3V6M

Compal Electronics, Inc.

1.5VP/0.75VSP/1.8VSP

VFKTA

39 46

1.0

5

D D

4

3

2

1

1.05VCCP controller (35.5), Support component (35.6)

0_0402_5%@

PR402

12

PC402

@

0.1U_0402_16V7K

12

SUSP#

32,34,39

C C

B B

E

MI Part (47.1)

PL401

HCB2012KF-121T50_0805

B+

The current limit is set to 8A, 12A or 16A when this pin is pull low, floating or pull high respectively.

12

34,41

VCCP_PWRGOOD

+1.05VSP_B+

12

PC404

0.1U_0402_50V7K

+3VS

12

PC401

10U_0805_25V6K

1 2

PR401

100K_0402_5%

+3VS

PGD_1.05V

PU400

8

IN

EN

9

3

2

BS

LX

GND

FB

BYP

ILMT

PG

LDO

SY8208DQNC_QFN10_3X3

1

PC406

0.1U_0603_25V7K

1 2

6

10

4

7

5

12

PC412

4.7U_0603_6.3V6K

12

@EMI@

PR403

4.7_1206_5%

1 2

0.68UH_PCMC063T-R68MN_15.5A_20 %

SW_+1.05VSP

+3VALW

PC413

2.2U_0603_6.3V6K

EMI Part (47.1)

SNUB_+1.05VSP

PL402

1 2

680P_0603_50V7K

12

PR404

75K_0402_1%

12

PR405 100K_0402_1%

@EMI@

PC403

1 2

12

+1.05VS_VCCPP

12

PC407

4700P_0402_16V7K

PR406

1K_0402_1%

PC408

PC409

22U_0603_6.3V6M

+1.05VS_VCCPP +1.05VS_VCCP

12

PC411

PC410

22U_0603_6.3V6M

12

PR413

@

0_0402_5%

VCCIO_SENSE

PJ401

@

2

112

(17A,680mi ls ,Via NO .=34) OCP=23.91A

JUMP_43X118

8

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED B YC OMPALE LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED B YC OMPALE LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED B YC OMPALE LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

5

4

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2015/04/192012/04/19

2

Title

+1.05VS_VCCP

Size Document Number Rev

Date: Sheet of

+1.05VS_VCCP

VFKTA

Monday, March 11, 2013

4640

1

1.0

5

4

3

2

1

VID [0] VID[1] VCCSA Vout

0 0 0.9V 0 1 0.85V 1 0 0.775V

D D

VCCSA controller (35.17), Support component (35.18)

C C

+3VS

12

+VCCSA_B+

PR610

32

SA_PGOOD

B B

+1.05VS_VCCP

@

2

JUMP_43X79

PJ601

112

100K_0402_5%

+VCCSA_B+

VCCP_PWRGOOD

34,40

12

PC628

22U_0603_6.3V6M

+5VALW

PR601

@

0_0402_5%

1 2

(6A, 240mils ,Via NO.= 6)

12

PC626

22U_0603_6.3V6M

12

PC624

PC629

1U_0603_6.3V6M

PU601

9

GND

5

VIN

6

VPP

7

POK

8

VEN/MODE

G978F11U_SO8

12

1U_0603_6.3V6M

4

Vo

3

PR621

@

Vo

0_0402_5%

2

1 2

PR622

@

D1

0_0402_5%

1

1 2

D0

H_VCCSA_VID1

H_VCCSA_VID0

9

1 1 0.75V

+1.05VS_VCCP +VCCSA

12

PC615

PC613

22U_0603_6.3V6M

12

PC616

22U_0603_6.3V6M

PC618

22U_0603_6.3V6M

PEN@

+VCCSAP

PJ602

@

112

JUMP_43X118

PR611

1 2

0.005_1206_1%

0.9V

+VCCSA+VCCSAP

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VCC_SAP

VFKTA

1

41 46

1.0

5

4

3

2

1

CPU_Core controller (36.1), Support component (36.3)

local sense rev ese HW

PH5

D D

.1U_0402_16V7K

PR549

3.83K_0402_1%

12

PC550

PC549

1 2

PR548

1 2

0_0402_5%

PR560

2K_0402_1%

1 2

PR566

499_0402_1%

PR567

2.05K_0402_1%

1 2

12

PR553

@

499_0402_1%

12

0.1U_0402_16V7K

C C

32

8

32

VR_ON

VR_SVID_CLK

VR_SVID_ALRT#

VR_SVID_DAT

VR_HOT#

PC547

@

47P_0402_50V8J

+1.05VS_VCCP +3VS

B B

470P_0402_50V7K

10K_0402_1%_ERTJ0EG103FA

VSUMG-

12

PC541

VSUMG+

PR547 27.4K_0402_1%

1 2

PH2 470K_0402_5%_ TSM0B474J4702RE

12

PR554

130_0402_1%

PC548

@

1 2

PR568

137K_0402_1%

12

PR545

2.61K_0402_1%

12

@

PR555

PR556

75_0402_5%

54.9_0402_1%

PR561

42.2K_0402_1%

1 2

PC551

68P_0402_50V8J

1 2

150P_0402_50V8J

1 2

12

PR543 11K_0402_1%

12

PC554

0.1U_0603_25V7K

+5VS

12

PH3

12

470K_0402_5%_ TSM0B474J4702 RE

12

PC542

NTCG

SCLK

ALERT#

SDA

PR552

1 2

0_0402_5%

PR557

27.4K_0402_1%

PR559

3.83K_0402_1%

9 9

PC537

6800P_0402_25V7K

1 2

12

PR537 649_0402_1%

1 2

PR539 422_0402_1%

PC543

12

2200p_0402_25V7K

PU500

1

NTCG

2

VR_ON

3

SCLK

4

ALERT#

5

SDA

6

VR_HOT#

7

NTC

8

ISEN2

VCC_AXG_SENSE VSS_AXG_SENSE

29

30

31

32

33

PAD

FBG

RTNG

ISUMPG

ISUMNG

ISL95833HRTZ-T_TQFN32_4X4

ISEN19ISUMP10ISUMN11RTN12FB13COMP14PGOOD15BOOT1

PC555

6800P_0402_25V7K

+3VS

28

COMPG

12

137K_0402_1%

12

PR546 1.91K_0402_1%

27

26

BOOTG

PGOODG

PR563

649_0402_1%

PR540

1 2

12

PR544

13.3K_0402_1%

25

UGATEG

PHASEG

LGATEG

LGATE1

PHASE1

UGATE1

16

12

PR564

422_0402_1%

68P_0402_50V8J

1 2

150P_0402_50V8J

VCCP

VDD

PWM2

PR558

1 2

1.91K_0402_1%

PC538

PC540

1 2

PR542

2K_0402_1%

24

23

22

21

20

19

18

17

12

PC553

0.022U_0402_16V7K

1000P_0402_50V7K

1 2

12

BOOTG

UGATEG

PHASEG

LGATEG

PC545 1U_0603_10V6K

LGATE1

PHASE1

UGATE1

BOOT1

12

local sense rev ese HW

A A

8

VCCSENSE

8

VSSSENSE

local sense rev ese HW

5

PC557

330P_0402_50V7K

1 2

PC558

0.01U_0402_25V7K

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PC535

@

PR538

PC539

499_0402_1%

1 2

470P_0402_50V7K

1 2

PR541

2.67K_0402_1%

PC544 470P_0402_50V7K

12

VGATE

12

PC552

PR565 11K_0402 _1%

0.1U_0603_25V7K

3

12

PC536

0.01U_0402_25V7K

UGATE1

PHASE1

BOOT1

LGATE1

+5VS

PR551

@

PR550

1_0603_5%

0_0603_5%

18,32

VSUM+

12

PR562

12

2.61K_0402_1%

PH4

10K_0402_1%_ERTJ0EG103FA

VSUM-

Close Phase 1 choke

12

PC556

.1U_0402_16V7K

2012/04/19 2015/04/19

PR528 0_0603_5%

PR530

2.2_0603_5%

1 2

12

PC546

1U_0603_10V6K

UGATEG

PHASEG

BOOTG

1 2

PC527

0.22U_0603_16V7K

1 2

PR504 0_0603_5%

UGATE1-1

@

TPCA8059-H_PPAK56-8-5

Rds(on)=2.2m-3.3m ohm

Rds(on)=2.2m-3.3m ohm Rds(on)=2.2m-3.3m ohm

For ULT 17W 1+1

For ULT 17W 1+1For ULT 17W 1+1 CPU_CORE LL= -2.9mΩ, Fsw = 450 kHz

CPU_CORE LL= -2.9mΩ, Fsw = 450 kHz

CPU_CORE LL= -2.9mΩ, Fsw = 450 kHzCPU_CORE LL= -2.9mΩ, Fsw = 450 kHz Icc_TDC=16A, Iocp_cpu=39.6A

Icc_TDC=16A, Iocp_cpu=39.6A

Icc_TDC=16A, Iocp_cpu=39.6A Icc_TDC=16A, Iocp_cpu=39.6A GFX_CORE LL= -3.9mΩ, Fsw = 450 kHz

GFX_CORE LL= -3.9mΩ, Fsw = 450 kHz

GFX_CORE LL= -3.9mΩ, Fsw = 450 kHzGFX_CORE LL= -3.9mΩ, Fsw = 450 kHz Icc_TDC=21.5A, Iocp_gfx=39.6A

Icc_TDC=21.5A, Iocp_gfx=39.6A

Icc_TDC=21.5A, Iocp_gfx=39.6A Icc_TDC=21.5A, Iocp_gfx=39.6A

@

UGATEG-1

12

PC516

0.22U_0603_16V7K

12

LGATEG

PR516

2.2_0603_5%

TPCA8059-H_PPAK56-8-5

Rds(on)=2.2m-3.3m ohm

Rds(on)=2.2m-3.3m ohm Rds(on)=2.2m-3.3m ohm

Compal Secret Data

Deciphered Date

PQ502

4

5

+CPU_B+

5

PQ501

AON7518_DFN8-5

123

5

123

+CPU_B+

PQ503

AON7518_DFN8-5

123

PQ504

123

2

PL501

HCB2012KF-121T50_0805

100U_25V_M

PL502

PL503

12

CPU_CORE

VFKTA

1 2

12

PR514

1_0402_5%

VSUMG-

1

+CPU_CORE

12

PC531

10U_0805_25V6K

PC506

@EMI@

12

PC533

10U_0805_25V6K

12

PC532

10U_0805_25V6K

12

PR506

4.7_1206_5%

VSUM+

12

@EMI@

680P_0402_50V7K

VSUM-

12

PC534

10U_0805_25V6K

12

PR526

4.7_1206_5%

12

@EMI@

PC526

@EMI@

680P_0402_50V7K

1

+

PC510

PC500

2

0.1U_0402_50V7K

0.22UH_MMD-06DZNR22MEO1L_25A_20%

1 2

PR532

3.65K_0603_1%

1 2

PR536

1_0402_5%

0.22UH_MMD-06DZNR22MEO1L_25A_20%

12

PR513

3.65K_0603_1%

VSUMG+

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

B+

+GFX_CORE

of

42 46Monday, March 11, 2013

1.0

5

4

3

2

1

CPU_Core output CAP (Including MLCC) 36.4

+GFX_CORE

GFX output CAP (Including MLCC) 36.5

+CPU_CORE

1

12

PC806

D D

2.2U_040 2_6.3V6M

12

PC807

2.2U_040 2_6.3V6M

12

PC808

2.2U_040 2_6.3V6M

12

PC809

2.2U_040 2_6.3V6M

12

PC810

2.2U_040 2_6.3V6M

PC854

PC853

2

22U_0603_6.3V6M

1

PC855

PC856

PC857

2

22U_0603_6.3V6M

PC858

2

22U_0603_6.3V6M

VCCP output Cap (Including MLCC) 36.6

1

+1.05VS_VCCP

12

PC811

2.2U_040 2_6.3V6M

12

PC816

2.2U_040 2_6.3V6M

C C

12

PC812

2.2U_040 2_6.3V6M

12

PC817

2.2U_040 2_6.3V6M

12

PC813

2.2U_040 2_6.3V6M

12

PC818

2.2U_040 2_6.3V6M

12

PC814

2.2U_040 2_6.3V6M

12

PC819

2.2U_040 2_6.3V6M

12

PC815

2.2U_040 2_6.3V6M

12

PC820

2.2U_040 2_6.3V6M

12

PC821

2.2U_040 2_6.3V6M

12

PC859

10U_0603_6.3V6M

12

PC865

1U_0402_6.3V6K

12

PC860

PC861

10U_0603_6.3V6M

12

PC867

PC866

1U_0402_6.3V6K

12

PC862

PC863

PC864

10U_0603_6.3V6M

12

1U_0402_6.3V6K

10U_0603_6.3V6M

12

PC868

1U_0402_6.3V6K

PC870

PC869

1U_0402_6.3V6K

12

PC454

PC423

10U_0603_6.3V6M

12

PC427

PC428

1U_0402_6.3V6K

1

12

PC417

PC424

2

10U_0603_6.3V6M

12

PC429

PC430

1U_0402_6.3V6K

1

PC419

PC418

2

22U_0603_6.3V6M

12

PC431

PC432

1U_0402_6.3V6K

1

PC420

2

22U_0603_6.3V6M

12

PC433

1U_0402_6.3V6K

1

PC421

PC422

2

22U_0603_6.3V6M

12

PC435

PC434

1U_0402_6.3V6K

1

PC425

2

22U_0603_6.3V6M

12

PC436

1U_0402_6.3V6K

1

PC426

PC453

2

22U_0603_6.3V6M

12

1U_0402_6.3V6K

22U_0603_6.3V6M

12

PC437

PC438

PC439

1U_0402_6.3V6K

+CPU_CORE

1

PC834 22U_060 3_6.3V6M

2

1

PC822 22U_060 3_6.3V6M

2

B B

1

PC828 22U_060 3_6.3V6M

2

1

PC835 22U_060 3_6.3V6M

2

1

PC823 22U_060 3_6.3V6M

2

1

PC829 22U_060 3_6.3V6M

2

1

PC824 22U_060 3_6.3V6M

2

1

PC830 22U_060 3_6.3V6M

2

1

PC825 22U_060 3_6.3V6M

2

1

PC831 22U_060 3_6.3V6M

2

1

PC826 22U_060 3_6.3V6M

2

1

PC832 22U_060 3_6.3V6M

2

1

PC827 22U_060 3_6.3V6M

2

1

PC833 22U_060 3_6.3V6M

2

12

PC872

1U_0402_6.3V6K

1

+

PC852

2

560U_D2_2VM_R4.5M

12

PC873

PC874

1U_0402_6.3V6K

12

PC876

PC875

1U_0402_6.3V6K

12

PC440

12

PC441

1U_0402_6.3V6K

12

PC442

1U_0402_6.3V6K

12

PC444

PC443

1U_0402_6.3V6K

12

PC446

PC445

1U_0402_6.3V6K

12

PC447

1U_0402_6.3V6K

12

PC449

PC448

1U_0402_6.3V6K

12

PC450

PC451

PC452

1U_0402_6.3V6K

+CPU_CORE

1

+

PC802 330U_D2 _2V_Y

2

A A

5

1

+

PC803 470U_D2 _2VM_R4.5M

2

4

Chief River ULV 330uF*9m 22uF 10uF

CPU

GFX_CORE

1.05V_VCCP

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2 14

6 6

10

Compal Secret Data

2012/04/ 19 2015/04/ 19

3

Compal Secret Data

Deciphered Date

2.2uF

16

2

1uF

11

26

Title

PWR - PROCESSOR DECOUPLING

Size Docum ent Number Rev

Date: Sheet of

470uF 560uF

1

Compal Electronics, Inc.

VFKTA

43 46Monday, March 11 , 2013

1

1.0

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1

for PWR

D D

C C

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2012/04/19 2015/04/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR-PIR

VFKTA

44 46Monday, March 11, 2013

1

1.0

A

B

C

D

E

HW PIR (Product Improve Record)

VFKTA LA-9862P SCHEMATIC CHANGE LIST R

EVISION CHANGE: 0.1 TO 0.2

NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------------------------------------

1. 11/28 (P.30) Mount CA32(SE102104K00) BOM structure change

2. 11/28 (P.32) Change RB36 from 2.2k to 0 ohm and CB50 to @ Design change

1 1

3. 11/28 (P.24) Add @ to JHDMI BOM structure change

4. 11/28 (P.11) Move RD10, RD11 to page 12.

5. 11/28 (P.33) Delete NFC Function Design change

6. 11/28 (P.28) Change JCARD.10 to SDWP# and JCARD.11 to SDCD. Design change

7. 11/28 (P.13) Add D92 for LID_SW#_D to isolate the +3VL power rail from LID_SW# Design change

8. 11/28 (P.15) Update HDMI power circuit Design change

9. 11/28 (P.20) Change USB port 10 to NC. Design change

10. 11/28 (P.16) Change UH3 from socket to IC Design change

11. 11/28 (P.09) Change CC44 to 0805 size (SE00000PL00), Add CC40 For 1206 MLCC Crack issue

12. 11/28 (P.14) change BOM structure C238,C239,C240,C241,C242,C243 to CRT@EMI@ EMI request

13. 11/28 (P.16) Change UH3 from socket to IC Design change

14. 11/28 (P.07) Change RC73 to 0 ohm (do not use short pad on this location) For debug

15. 11/28 (P.30) Change RA50 to 269@ Design change

16. 11/28 (P.31) Change SPK connector to 6 pin, change SPK_DET0 to SPK_DET, delete SPK_DET1 and RA96 Design change

17. 11/28 (P.21) Change SPK_DET0 to SPK_DET, delete SPK_DET1 Design change

18. 11/28 (P.13) Delete D92 and change the netname to BKOFF# for touch Screen Avoid LCD_INV leak to Touch/B

19. 11/28 (P.13) SWAP R92,R100 L60 config,SWAP R93.R101,L59 config BOM structure change

2 2

20. 11/28 (P.13) Reverse LVDS connector pin definition Design change

21. 11/28 (P.33) Change H15 from H_3P0 to H_4P0,Add h19 H_3P2N ME follow ME change ME request

22. 11/29 (P.28) Modify Jcard @ to update Netlist BOM structure change

23. 11/29 (P.13) Delete R87,R88,R89,R90,R92,R93,R100,R101,L59,L60,JCAM,JEDP Design change

24. 11/29 (P.14) add R62,R63,22-ohm (PN: SD028220A80) on CRT HSYNC/VSYNC trace. For CRT undershoot issue

25. 11/29 (P.16) Chane UH4, RH269, RH271 to @,change RH267 from shortpad to 0-ohm Design change

26. 11/30 (P.8) Add CC17~CC19 for ESD request ESD request

27. 11/30 (P.20) Move PLT_RST# ESD capacitor (CH104) to EC side (CB13) and mount 0.1uF ESD request

28. 11/30 (P.5) Change CC63 from @ESD@ to ESD@ for ESD request ESD request

29. 11/30 (P.30) Reserve RA31,RA38 for EMI request EMI request

30. 11/30 (P.32)Change PM_SLP_S4# from pin127 to pin84.

31. 11/31 (P.33)Update CPU config&PN

32. 12/04 (P.29) Update S&C to 14640/14641 co-layout circuit ,add RR1~RR4, QR1, modify net-name Design change

(P.28) Add QW1, RW3, RW4 for normal clos

(P.09) Change CC53 to 47U 0805 (SE00000P (P.12) Change CD31 to 0805 size (SE00000PL00) (P.29) Change CR10, CR12 to 0805 size (SE00000PL00)

(P.13) Change L56 toL55,L58 to L57, JLVDS type and modify net name for LVDS Design change

(P.32)Change USB_EN#0 from pin84 to pin23.

e

type connector

L00),Add CC50 (SE00000PL00)

REVISION CHANGE: 0.2 TO 0.3

NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------------------------------------

3 3

1. 01/18 (P.28) Delete QW2 Design Change

2. 01/18 (P.20) Change RH166 from ShortPad to 0 ohm resistor. For ESD Request

3. 01/18 (P.07) Delete RC3. Design Change

4. 01/18 (P.32) Add RB12, RB37, connect EC_MUTE_INT from codec to EC For boot bobo issue

5. 01/18 (P.05) Add CC35,CC20 For ESD Request

6. 01/18 (P.21) reserve CC21 For ESD Request

7. 01/18 (P.32) reserve CC23,CC24,CC25 For ESD Request

8. 01/18 (P.18) reserve CC26,CC27 For ESD Request

9. 01/18 (P.32) Change CB13 to 100P P/NSE071101J80 Design Change

10.01/18 (P.28) Add RW2 CW9 For EMI Request

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2012/04/19 2015/04/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

HW-PIR

VFKTA

45 46Monday, March 11, 2013

E

1.0

5

4

3 2

1

HW PIR (Product Improve Record)

VFKTA LA-9862P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.3 TO 1.0

NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------------------------------------

D D

1. 01/28 (P.33) Modify JTP pin with the same as VFKTA DIS Design Change

2. 01/28 (P.13) Reserve R267&R266 0 ohm For EMI cost down

3. 01/28 (P.32) Change QB1 to SB00000EN00 For X1 code issue

4. 01/28 (P.07) Change QC3 to SB00000PF00 For X1 code issue

5. 01/28 (P.15) Change QY1 QY2 to SB00000PF00 For X1 code issue

6. 01/28 (P.16) Change UH3 from SA00003K800 to SA00004LI00 For X1 code issue

7. 01/28 (P.27/29)Change UR1 UR4 from SA00004KB00 to SA00003TV00 For X1 code issue

8. 01/28 (P.13) Change L2 SM01000CD00E to SM01000JB00 For EOL issue

9. 01/28 (P.9/17/28/34/30/29) Change QC5,QH3,QH4,QW1,Q6 ,QA1, QR1, Q53 from SB00000EO10 to SB00000DH00 For X1 code issue

10.01/28 (P.30) Change RA42 from SM01000CY00 to SM01000A900 For X1 code issue

11.01/28 (P.29) Change LR2,LR3,LR4,LR5 from SM070001U00 to SM070001R00 For X1 code issue

12.02/18 (P.06) Swap H_EDP_TXN[0\1] to H_EDP_TXP[0\1] Design mistake

13.02/18 (P.13) Change C7 to SE076153K80 (15nF) for LCD sequence tuning

14.02/19 (P.05) Delete CC33, CC36, C4; change R1 to short pad for part count reduce

15.02/19 (P.07) Change RC73 to short pad for part count reduce

16.02/19 (P.09) Delete CC61, CC83; change RC119 to short pad for part count reduce

17.02/19 (P.11) Delete CD2, CD15 for part count reduce

18.02/19 (P.12) Delete cD28, CD46 for part count reduce

19.02/19 (P.13) Change R106 to shortpad for part count reduce

C C

20.02/19 (P.14) Delete C250 for part count reduce

21.02/19 (P.16) Delete CH6, CH100; change RH67, RH68 to short pad for part count reduce

22.02/19 (P.19) Delete RH254 for part count reduce

23.02/19 (P.26) Delete CCL2, RCL5, RCL2, net: LAN_X1_R_R, LAN_X1_R for part count reduce

24.02/19 (P.27) Delete net: LAN_X1_R for part count reduce

25.02/19 (P.28) Change RW1 to shortpad for part count reduce

26.02/19 (P.29) Delete CR7, CR8 for part count reduce

27.02/19 (P.30) Change RA22, RA18, RA24 to short pad for part count reduce

28.02/19 (P.41) Delete CB4, CB5, CB50 for part count reduce

29.02/19 (P.42) Delete SW2, SW3 for part count reduce

30.02/28 (P.32) Connect RB14 form CLK_EC_R to POK and reserve RB13,RB22,CB16 for abnormal shut down power request

31.02/28 (P.20) change RH167 pin2 netname from CLK_EC_R to CLK_PCI_EC_R

32.03/04 (P.20) change RH167 pin2 netname from CLK_PCI_EC_R to CLK_EC_R For keep the same as DIS

33.03/04 (P.32) Connect RB14 from POK_R to POK and reserve RB13,RB22,CB16 for abnormal shut down power request

34.03/04 (P.28) Add RW5~RW8 for EMI request and change netname SD_DATA[0…3] to SD_DATA[0…3]_R on connector side for EMI request

35.03/06 (P.28) Add 10pF CV10~CV13 on SD_DATA[0:3] for EMI request.

B B

A A

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/ 19 2015/04/ 19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

A3

Date: Sheet of

Compal Electronics, Inc.

HW-PIR

46 46Monday, March 11 , 2013

1.0

Compal LA-9862P VFKTA Rosetta 10FT, Satellite L40, LA-9862P VFKTA Rosetta 10FTG Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual