COMPAL LA-7011P Schematics

A

ZZZ3

ZZZ2

ZZZ1

PCB

14"DAZ@

1 1

14"DAZ@

ZZZ2

LA-7011P

14"DA@

ZZZ3

LS-7011P

14"DA@

ZZZ4

LS-7013P

14"DA@

ZZZ5

LS-7014P

14"DA@

B

C

D

E

Compal Confidential

Schematics Document

2 2

PAW10

Montevina

3 3

4 4

with Intel Cantiga + ICH9 core logic

REV:1.0A

2010-12-24

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

2010/09/10 2010/08/19

C

Compal Secret Data

Deciphered Date

Compal Electronics,Ltd.

Title

Cover Sheet

Size Document Num ber Rev

Custom

LA7011P

Date: Sheet of

D

Date: Sheet of

1 41Friday, December 24, 2010

E

1.0

A

Compal confidential

File Name :

1 1

Clock Generator

SLG8SP556VTR

B

page16

C

Mobile Penryn

uPGA-478 CPU

page4,5,6

D

For 14" LS-7011P 4PIN PWR/B LS7013P Audio/B LS7014P Touch/B

E

For 15" LS-7012P 8PIN PWR/B LS7013P Audio/B LS7014P Touch/B

H_A#(3..35) H_D#(0..63)

FSB 667/800MHz

CRT Connector

page21

LVDS Connector

2 2

page22

Intel Cantiga GMCH

GM45

uFCBGA 1329

page 7,8,9,10,11,12,13

DMI

＊＊＊＊

4

C-Link

Dual Channel

DDR3-667/800(1.5V)

AZALIA

DDR3-SO-DIMM X2

BANK 0, 1, 2, 3

up to 4G

page 14,15

Audio Codec

CONEXTAN CX20671

page26

2Channel Speaker

Analog MIC_Int

page26

Wire Less Mini card Slot 1

6*PCI-E BUS

page23

SPI ROM

Intel ICH9-M

page 17,18,19,20

14*USB2.0

6*SATA serial

CMOS Camera

BlueTooth CONN

page22

page30

BIOS

USB CONN X1(Right)

LPC BUS

3 3

AR8151/8152

10/100/Giga LAN

RJ45 CONN

page25

page24

EC

ENE KB926 E0

page27

Int.KBD

page32

USB PORT X1(Left)

page29

Audio Jack SB CONN

HP X 1+ MIC_Ext X1

Card Reader RTS5139

page30

SPI ROM BIOS

4 4

A

B

Touch Pad

page32

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

C

page28

Compal Secret Data

2010/09/10 2010/08/19

Compal Secret Data

SATA HDD CONN

SATA ODD CONN

Deciphered Date

D

page28

page32

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

MB Block Diagram

LA7011P

2 41Friday, December 24, 2010

E

1.0

A

DDR3 Voltage Rails

B

C

D

E

SMBUS Control Table

X X

+3VS

HEX

A0

D2

WLAN WWAN

+3VALW

+5VS

power plane

1 1

+B

State

S0

S3

2 2

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

O

X

+5VALW

+3VALW

O

X

X X X

+1.5V

O

X X

X

+3VS

+1.5VS

+CPU_CORE

+VGA_CORE

+1.8VS

+0.75VS

+1.05VS

OO

X

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 ICH_SMBCLK ICH_SMBDATA

SOURCE

KB926

+3VALW

KB926

+3VALW

ICH

+3VALW

BATT KB926 SODIMM CLK CHIP

V

+3VALW

X X

X X X

X X

V V

+3VS

I2C / SMBUS ADDRESSING

DEVICE

DDR SO-DIMM 0

DDR SO-DIMM 1

CLOCK GENERATOR (EXT.)

X X

V

ADDRESS

1 0 1 0 0 0 0 0 1 0 1 0 0 1 0 0A4 1 1 0 1 0 0 1 0

ICH9

X X X

Therml

X

V

+3VS

X

@ FUNCTION

DescriptionStructure

45@ 45 BOM BT@

CMOS@

3 3

4 4

Blue Tooth function CMOS CAMERA function

NON-USE

PCIE PORT LIST

DEVICEPORT

LAN

1 2

WLAN

3 4 5 6 7 8

USB PORT LIST

DEVICEPORT

0

RIGHT SIDE

1

LEFT SIDE CMOS

2 3 4

CARD READER

5

WIRELESS BT6

USB PORT(ESATA)

7 8 9 10 11 12 13

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

MB Notes List

LA7011P

3 41Friday, December 24, 2010

E

1.0

A

ME@

JCPU1A

H_A#[3..16]<7>

1 1

H_ADSTB#0<7>

H_REQ#0<7> H_REQ#1<7> H_REQ#2<7> H_REQ#3<7> H_REQ#4<7>

H_A#[17..35]<7>

2 2

H_ADSTB#1<7>

H_A20M#<18>

H_FERR#<18>

H_IGNNE#<18>

H_STPCLK#<18> H_INTR<18>

H_NMI<18> H_SMI#<18>

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_ADSTB#0

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_ADSTB#1

H_A20M# H_FERR# H_IGNNE#

H_STPCLK# H_INTR H_NMI H_SMI#

RSVD pins on the CPU should be left as NO CONNECT

JCPU1A

J4

ADDR GROUP_0

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

ADDR GROUP_1

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

V1

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD[01]

N5

RSVD[02]

T2

RSVD[03]

V3

RSVD[04]

B2

RSVD[05]

D2

RSVD[06]

D22

RSVD[07]

D3

RSVD[08]

F6

RSVD[09]

XDP/ITP SIGNALS

THERMAL

PROCHOT#

THERMDA THERMDC

ICH

THERMTRIP#

H CLK

RESERVED

ADS# BNR# BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HIT#

HITM#

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY# PREQ#

TCK

TDO TMS

TRST#

DBR#

BCLK[0] BCLK[1]

B

H_ADS#

H1

H_BNR#

E2

H_BPRI#

G5

H_DEFER#

H5

H_DRDY#

F21

H_DBSY#

E1

H_BR0#

F1

H_IERR#

D20

H_INIT#

B3

H_LOCK#

H4

H_RESET#

C1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3

H_TRDY#

G2

H_HIT#

G6

H_HITM#

E4

AD4 AD3 AD1 AC4 AC2 AC1

XDP_TCK

AC5

XDP_TDI

AA6

TDI

XDP_TDO

AB3

XDP_TMS

AB5

XDP_TRST#

AB6

XDP_DBRESET#

C20

H_PROCHOT#

D21

H_THERMDA

A24

H_THERMDC

B25

H_THERMTRIP#

C7

CLK_CPU_BCLK

A22

CLK_CPU_BCLK#

A21

H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil

H_ADS# <7> H_BNR# <7>

H_BPRI# <7>

H_DEFER# <7>

H_DRDY# <7> H_DBSY# <7>

H_BR0# <7>

H_INIT# <18>

H_LOCK# <7>

H_RESET# <7> H_RS#0 <7> H_RS#1 <7> H_RS#2 <7> H_TRDY# <7>

H_HIT# <7> H_HITM# <7>

T6T6 T9T9

XDP_DBRESET# <19>

H_THERMTRIP# <8,18>

CLK_CPU_BCLK <1 6> CLK_CPU_BCLK# < 16>

C

H_IERR#

H_PROCHOT#

R714 56_0402_5%R714 56_0402_5%

1 2

R715 68_0402_5%R715 68_0402_5%

1 2

1

C831

0.1U_0402_16V4Z

2

1 2

C832 2200P_0402_50V7KC832 2200P_0402_50V7K

1 2

+3VS

R716 10K_0402_5%R716 10K_0402_5%

H_THERMDA

H_THERMDC

THERM#

D

+1.05VS

U1

1

VDD

2

DP

3

DN

4

THERM#

EMC1402-1-ACZL-TR_MSOP8

SMDATA

PVT ESD solution. Please close to R715

+1.05VS

1

2

+3VS+3VS

12

R713 10K_0402_5%

10K_0402_5%

EC_SMB_CK2

8

SMCLK

ALERT#

GND

EC_SMB_DA2

7

6

5

C864

0.1U_0402_16V4Z

R713

E

EC_SMB_CK2 <27>

EC_SMB_DA2 <27>

Address:100_1100

Penryn

10/01 Add for reduce noise

H_RESET#

3 3

4 4

XDP Reserve for debug , Please close to CPU side

XDP_DBRESET#

XDP_TDI

XDP_TMS

XDP_TDO

XDP_TRST#

XDP_TCK

A

R718 1K_0402_5%@R718 1K_0402_5%@

1 2

R8 54.9_0402_1%R8 54.9_0402_1%

1 2

R9 54.9_0402_1%R9 54.9_0402_1%

1 2

R10 54.9_0402_1%@R10 54.9_0402_1%@

1 2

R11 54.9_0402_1%R11 54.9_0402_1%

1 2

R12 54.9_0402_1%R12 54.9_0402_1%

1 2

+3VS

+1.05VS

Place closely pin C1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

C651

1

@

2

100P_0402_50V8J

D

09/16 Add C834 For ESD

XDP_DBRESET#

1

C834

0.1U_0402_16V4Z

2

Place closely pin C20

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Penryn(1/3)-AGTL+THM,FAN

LA7011P

4 41Friday, December 24, 2010

E

1.0

5

ME@

JCPU1B

H_D#[0..15]<7>

D D

H_DSTBN#0<7> H_DSTBP#0<7> H_DINV#0<7>

H_D#[16..31]<7>

H_DSTBN#1<7> H_DSTBP#1<7>

C C

FSB

533

667

800

B B

A A

1067 266 0 0 0

Layout note: Z0=55 ohm

0.5" max for GTLREF.

Close to CPU pin AD26 within 500mils.

H_DINV#1<7>

R14 1K_0402_5%@R14 1K_0402_5%@

1 2

R16 1K_0402_5%@R16 1K_0402_5%@

1 2

CPU_BSEL0<16> CPU_BSEL1<16> CPU_BSEL2<16>

BCLK BSEL2 BSEL1 BSEL0

133

0 0 1

166

200

+CPU_GTLREF

+1.05VS

12

R19

R19 1K_0402_1%

1K_0402_1%

12

R20

R20 2K_0402_1%

2K_0402_1%

1 00

T1T1 T2T2 T3T3 T4T4 T157T157

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_DSTBN#0 H_DSTBP#0 H_DINV#0

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_DSTBN#1 H_DSTBP#1 H_DINV#1

+CPU_GTLREF

TEST1 TEST2 TEST3 TEST4 TEST5 TEST6

TEST7 CPU_BSEL0 CPU_BSEL1 CPU_BSEL2

110

JCPU1B

E22

D[0]#

F24

D[1]#

AD26

AF26

E26 G22 F23 G25 E25 E23 K24 G24 J24 J23 H22 F26 K22 H23 J26 H26 H25

N22 K25 P26 R23 L23 M24 L22 M23 P25 P23 P22 T24 R24 L25 T25 N25 L26 M26 N24

C23 D25 C24

AF1 A26

C3 B22 B23 C21

D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#

D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#

GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 BSEL[0] BSEL[1] BSEL[2]

Penryn

MISC

DATA GRP 0

DATA GRP 1

DATA GRP 2DATA GRP 3

DSTBN[2]# DSTBP[2]#

DINV[2]#

DSTBN[3]# DSTBP[3]#

DINV[3]#

COMP[0] COMP[1] COMP[2] COMP[3]

DPRSTP#

PWRGOOD

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

4

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]# D[47]#

D[48]# D[49]# D[50]# D[51]# D[52]# D[53]# D[54]# D[55]# D[56]# D[57]# D[58]# D[59]# D[60]# D[61]# D[62]# D[63]#

DPSLP# DPWR#

SLP#

PSI#

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 18mils and Space 25mils (27.4Ohms) COMP1, COMP3 layout : Width 5mils and Space 25mils (55Ohms)

AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

COMP0 COMP1 COMP2 COMP3

H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_DSTBN#2 H_DSTBP#2 H_DINV#2

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DSTBN#3 H_DSTBP#3 H_DINV#3

H_DPRSTP# H_DPSLP# H_DPWR# H_PWRGOOD H_CPUSLP# H_PSI#

R719 27.4_0402_1%R719 27.4_0402_1%

1 2

R15 54.9_0402_1%R15 54.9_0402_1%

1 2

R720 27.4_0402_1%R720 27.4_0402_1%

1 2

R18 54.9_0402_1%R18 54.9_0402_1%

1 2

H_D#32

Y22

H_D#[32..47] <7>

H_DSTBN#2 <7> H_DSTBP#2 <7> H_DINV#2 <7>

H_D#[48..63] <7>

H_DSTBN#3 <7> H_DSTBP#3 <7> H_DINV#3 <7>

H_DPRSTP# <8,18,40> H_DPSLP# <18> H_DPWR# <7> H_PWRGOOD <18> H_CPUSLP# <7>

H_PSI# <40>

09/29 Add for power noise

H_DPRSTP#

1

C652

C652 470P_0402_50V7K

470P_0402_50V7K

2

Close to Power IC (PU9.12) within 500mils.

3

H_DPRSTP# H_DPSLP#

1

C630

C630 470P_0402_50V7K

470P_0402_50V7K

2

Close to CPU pin E5 within 500mils.

ME@

JCPU1D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080] VSS[081]P3VSS[162]

Penryn

2

P6

VSS[082]

P21

VSS[083]

P24

VSS[084]

R2

VSS[085]

R5

VSS[086]

R22

VSS[087]

R25

VSS[088]

T1

VSS[089]

T4

VSS[090]

T23

VSS[091]

T26

VSS[092]

U3

VSS[093]

U6

VSS[094]

U21

VSS[095]

U24

VSS[096]

V2

VSS[097]

V5

VSS[098]

V22

VSS[099]

V25

VSS[100]

W1

VSS[101]

W4

VSS[102]

W23

VSS[103]

W26

VSS[104]

Y3

VSS[105]

Y6

VSS[106]

Y21

VSS[107]

Y24

VSS[108]

AA2

VSS[109]

AA5

VSS[110]

AA8

VSS[111]

AA11

VSS[112]

AA14

VSS[113]

AA16

VSS[114]

AA19

VSS[115]

AA22

VSS[116]

AA25

VSS[117]

AB1

VSS[118]

AB4

VSS[119]

AB8

VSS[120]

AB11

VSS[121]

AB13

VSS[122]

AB16

VSS[123]

AB19

VSS[124]

AB23

VSS[125]

AB26

VSS[126]

AC3

VSS[127]

AC6

VSS[128]

AC8

VSS[129]

AC11

VSS[130]

AC14

VSS[131]

AC16

VSS[132]

AC19

VSS[133]

AC21

VSS[134]

AC24

VSS[135]

AD2

VSS[136]

AD5

VSS[137]

AD8

VSS[138]

AD11

VSS[139]

AD13

VSS[140]

AD16

VSS[141]

AD19

VSS[142]

AD22

VSS[143]

AD25

VSS[144]

AE1

VSS[145]

AE4

VSS[146]

AE8

VSS[147]

AE11

VSS[148]

AE14

VSS[149]

AE16

VSS[150]

AE19

VSS[151]

AE23

VSS[152]

AE26

VSS[153]

A2

VSS[154]

AF6

VSS[155]

AF8

VSS[156]

AF11

VSS[157]

AF13

VSS[158]

AF16

VSS[159]

AF19

VSS[160]

AF21

VSS[161]

A25 AF25

VSS[163]

.

1

C636

100P_0402_50V8J

Close to CPU pin B5 within 500mils.

2

H_PSI#

1

C642

C642 470P_0402_50V7K

470P_0402_50V7K

2

Close to Power IC

1

PVT for ESD solution

H_PWRGOOD

1

C637

C637 330P_0402_50V7K

330P_0402_50V7K

2

Close to CPU pin D6 within 500mils.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Penryn(2/3)-AGTL+GND

LA7011P

1

5 41Friday, December 24, 2010

1.0

5

+CPU_CORE +CPU_CORE

D D

C C

B B

AA10 AA12 AA13 AA15 AA17 AA18 AA20

AC10 AB10 AB12 AB14 AB15 AB17 AB18

ME@

JCPU1C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

B7

VCC[010]

B9

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA7

VCC[051]

AA9

VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059]

AB9

VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067]

Penryn

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]

VCCA[01] VCCA[02]

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

VCCSENSE

VSSSENSE

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18

+1.05VS

AF20

G21 V6

1

J6

+

C60

K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

.

C60 330U_D2E_2.5VM_R9M

330U_D2E_2.5VM_R9M

2

CPU_VID0 <40> CPU_VID1 <40> CPU_VID2 <40> CPU_VID3 <40> CPU_VID4 <40> CPU_VID5 <40> CPU_VID6 <40>

VCCSENSE

VSSSENSE

NEAR PIN B26

20mils

1

C52

C51

2

10U_0805_10V4Z

VCCSENSE <40>

VSSSENSE <40>

1

2

The trace width/space/other is 18/7/25.

Layout Note: Route VCCSENSE and VSSSENSE traces at

27.4 Ohms with 50 mil s pacing. Place PU and PD within 1 inch of CPU. Length matched to within 25 m ils.

4

+CPU_CORE

330U_D2E_2.5VM_R9M

1

C81

330U_D2E_2.5VM_R9M

2

330U_D2E_2.5VM_R9M

1

+

2

C86

@

330U_D2E_2.5VM_R9M

1

+

C82

2

1

+

C94

2

PVT Change C82 a nd C94 from SF0 00002O00 to SGA1 9331D10.

+CPU_CORE

1

C18

Place these capacitors on L1 (North side,Secondary Layer)

Place these capacitors on L1 (South side,Secondary Layer)

+1.5VS

Place these capacitors on L1 (South side,Secondary Layer)

0.01U_0402_16V7K

Mid Frequence Decoupling

2

+CPU_CORE

1

2

+CPU_CORE

1

2

+CPU_CORE

1

2

C18

10U_0805_6.3V6M

C26

10U_0805_6.3V6M

C35

10U_0805_6.3V6M

C43

10U_0805_6.3V6M

3

+1.05VS

Place these inside socket cavity on L8 (North side Secondary)

1

C8

0.1U_0402_10V6K

2

1

C19

10U_0805_6.3V6M

2

1

C27

10U_0805_6.3V6M

2

1

C36

10U_0805_6.3V6M

2

1

C44

10U_0805_6.3V6M

2

09/29 Add for power noise

Close to Power IC

1

C20

10U_0805_6.3V6M

2

1

C28

10U_0805_6.3V6M

2

1

C37

10U_0805_6.3V6M

2

1

C45

10U_0805_6.3V6M

2

1

C9

0.1U_0402_10V6K

2

1

C21

10U_0805_6.3V6M

2

1

C29

10U_0805_6.3V6M

2

1

C38

10U_0805_6.3V6M

2

1

C46

10U_0805_6.3V6M

2

1

C10

0.1U_0402_10V6K

2

1

C22

10U_0805_6.3V6M

2

1

C30

10U_0805_6.3V6M

2

1

C39

10U_0805_6.3V6M

2

1

C47

10U_0805_6.3V6M

2

1

2

C11

0.1U_0402_10V6K

1

C23

10U_0805_6.3V6M

2

1

C31

10U_0805_6.3V6M

2

1

C40

10U_0805_6.3V6M

2

1

C48

10U_0805_6.3V6M

2

CPU_VID0

CPU_VID1

CPU_VID2

CPU_VID3

CPU_VID4

CPU_VID5

CPU_VID6

1

C12

0.1U_0402_10V6K

2

1

C24

10U_0805_6.3V6M

2

1

C32

10U_0805_6.3V6M

2

1

C41

10U_0805_6.3V6M

2

1

C49

10U_0805_6.3V6M

2

1

C835

0.1U_0402_10V6K

2

1

C836

10U_0805_6.3V6M

2

1

C837

10U_0805_6.3V6M

2

1

C42

10U_0805_6.3V6M

2

1

C50

10U_0805_6.3V6M

2

1

C644

C643

2

100P_0402_50V8J

+CPU_CORE

A A

R21

R21 100_0402_1%

100_0402_1%

1 2

R22

R22 100_0402_1%

100_0402_1%

1 2

VCCSENSE

VSSSENSE

100P_0402_50V8J

C646

2

100P_0402_50V8J

1

C647

2

100P_0402_50V8J

1

C649

C648

2

100P_0402_50V8J

1

C650

2

100P_0402_50V8J

Close to CPU pin within 500mils.

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Penryn(3/3)-PWR+Bypass

LA7011P

6 41Friday, December 24, 2010

1

1.0

5

4

3

2

1

U3A

AD14

AA13

AA11 AD11 AD10 AD13 AE12

AE14

AE11

F2 G8 F8 E6 G2 H6 H2 F6 D4 H3 M9

M11

J1

J2

N12

J6 P2

L2 R2 N9

L6 M5

J3 N2 R1 N5 N6

P13

N8

L7

N10

M3 Y3

Y6

Y10 Y12 Y14

Y7

W2

AA8

Y9

AA9

AE9 AA2 AD8 AA3 AD3 AD7

AF3 AC1 AE3 AC3

AE8 AG2 AD6

C5 E3

C12 E11

A11 B11

U3A

H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63

H_SWING H_RCOMP

H_CPURST# H_CPUSLP#

H_AVREF H_DVREF

CANTIGA ES_FCBGA1329

GM45@

H_ADSTB#_0 H_ADSTB#_1

H_DEFER#

HOST

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_BREQ#

H_DBSY#

H_DRDY#

H_HIT# H_HITM#

H_LOCK# H_TRDY#

H_RS#_0 H_RS#_1 H_RS#_2

H_D#[0..63]<5>

D D

C C

B B

H_RESET#<4> H_CPUSLP#<5>

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWNG H_RCOMP

H_RESET# H_CPUSLP#

H_VREF

U3

GL40

GL40@

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20

H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BR0# H_DEFER# H_DBSY# CLK_MCH_BCLK CLK_MCH_BCLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY#

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

H_A#[3..35] <4>

H_ADS# <4> H_ADSTB#0 <4> H_ADSTB#1 <4> H_BNR# <4> H_BPRI# <4> H_BR0# <4> H_DEFER# <4> H_DBSY# <4> CLK_MCH_BCLK <16> CLK_MCH_BCLK# <16> H_DPWR# <5> H_DRDY# <4> H_HIT# <4> H_HITM# <4> H_LOCK# <4> H_TRDY# <4>

H_DINV#0 <5> H_DINV#1 <5> H_DINV#2 <5> H_DINV#3 <5>

H_DSTBN#0 <5> H_DSTBN#1 <5> H_DSTBN#2 <5> H_DSTBN#3 <5>

H_DSTBP#0 <5> H_DSTBP#1 <5> H_DSTBP#2 <5> H_DSTBP#3 <5>

H_REQ#0 <4> H_REQ#1 <4> H_REQ#2 <4> H_REQ#3 <4> H_REQ#4 <4>

H_RS#0 <4> H_RS#1 <4> H_RS#2 <4>

Layout Note: H_RCOMP / H_VREF / H_SWNG trace width and spacing is 10/20

12

R23

R23 1K_0402_1%

1K_0402_1%

12

R25

R25 2K_0402_1%

2K_0402_1%

H_VREF

1

C53

0.1U_0402_16V4Z

2

within 100 mils from NB

PVT ESD solution.

Please close to R23

+1.05VS

1

C70

0.1U_0402_16V4Z

2

12

R26

24.9_0402_1%

H_RCOMP

+1.05VS+1.05VS

12

R24

R24 221_0603_1%

221_0603_1%

12

R27

R27 100_0402_1%

100_0402_1%

H_SWNG

1

C54

0.1U_0402_16V4Z

2

Near B3 pin

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Cantiga(1/7)-AGTL+

LA7011P

1

7 41Friday, December 24, 2010

1.0

5

Strap Pin Table

011 = FSB667

CFG[2:0]

Internal pull-up

CFG5

Internal pull-up

CFG6

D D

C C

B B

Internal pull-up

CFG7

Internal pull-up

CFG9

Internal pull-up

CFG10

CFG[13:12]

Internal pull-up

CFG16

Internal pull-down

CFG19

CFG20

Internal pull-down

(PCIE/SDVO select)

+1.05VS

12

R722

54.9_0402_1%

@

MCH_TSATN# TSATN#

+3VS

ICH_POK<19,27>

VGATE<19,40>

PLT_RST#<17,23,24>

1

C861

C861 1000P_0402_50V7K

1000P_0402_50V7K

2

09/16 Add C838 For noise

Place closely pin AT11

A A

PLT_RST#_R

1

C838

0.1U_0402_16V4Z

2

010 = FSB800 000 = FSB1067

0 = DMI x 2 1 = DMI x 4

0 = iTPM Host Interface is enabled

1 = iTPM Host Interface is Disabled

0 = Intel Management Engine Crypto Transport Layer Security (TLS) cipher suite with no confidentiality

1 = Intel Management Engine Crypto TLS cipher suite with confidentiality

0 = Lane Reversal Enable 1 = Normal Operation (Default)

0 = PCIe Loopback Enable 1 = Disable*(Default)

01 = All Z Mode Enabled 00 = Reserved 10 = XOR Mode Enabled 11 = Normal Operation

0 = Dynamic ODT Disabled 1 = Dynamic ODT Enabled

0 = Normal Operation 1 = DMI Lane Reversal Enable

(Default)

*

(Default)

*

(Default)

*

can support disble by SW.

(Default)

*

(Default)

*

0 = Only PCIE or [SDVO/DP/HDMI] is operational.

1 = PCIE/[SDVO/DP/HDMI] are operating simu.

12

+3VS

R33

R33 1K_0402_5%

1K_0402_5%

@

12

R723

R723 1K_0402_5%

12

R48

R48 10K_0402_5%

10K_0402_5%

1K_0402_5%

@

PM_EXTTS#0 PM_EXTTS#1

TSATN# <27>

+3VS

PM_POK_R

PLT_RST#_R

B

2

E

3 1

C

Q42

Q42 MMBT3904_SOT23-3

MMBT3904_SOT23-3

@

12

R47

R47 10K_0402_5%

10K_0402_5%

R51 0_0402_5%R51 0_0402_5%

1 2

R727 0_0402_5%@R727 0_0402_5%@

1 2

R728 100_0402_5%R728 100_0402_5%

1 2

Place closely pin PR132.2Place closely pin U3.R32

DPRSLPVRDPRSLPVR

1

C862

C862 1000P_0402_50V7K

1000P_0402_50V7K

2

Place closely pin B7 Place closely pin AR36

H_DPRSTP# SM_PWROK

C638

1

2

100P_0402_50V8J

5

1

C631

C631 470P_0402_50V7K

470P_0402_50V7K

2

(Default)

*

MCH_CLKSEL0<16> MCH_CLKSEL1<16> MCH_CLKSEL2<16>

R725 2.21K_0402_1%@R725 2.21K_0402_1%@

1 2

R39 2.21K_0402_1%@R39 2.21K_0402_1%@

1 2

R40 2.21K_0402_1%@R40 2.21K_0402_1%@

1 2

R41 2.21K_0402_1%@R41 2.21K_0402_1%@

1 2

R42 2.21K_0402_1%@R42 2.21K_0402_1%@

1 2

R44 2.21K_0402_1%@R44 2.21K_0402_1%@

1 2

R45 2.21K_0402_1%@R45 2.21K_0402_1%@

1 2

R46 2.21K_0402_1%@R46 2.21K_0402_1%@

1 2

R49 4.02K_0402_1%@R49 4.02K_0402_1%@

1 2

R50 4.02K_0402_1%@R50 4.02K_0402_1%@

1 2

PM_BMBUSY#<19>

H_DPRSTP#<5,18,40>

PM_EXTTS#0<14,15>

H_THERMTRIP#<4,18>

DPRSLPVR<19,40>

*

4

(Default)

4

MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2

MCH_CFG_5 MCH_CFG_6 MCH_CFG_7

MCH_CFG_9 MCH_CFG_10

MCH_CFG_12 MCH_CFG_13

MCH_CFG_16

MCH_CFG_19 MCH_CFG_20

PM_BMBUSY# H_DPRSTP# PM_EXTTS#0 PM_EXTTS#1 PM_POK_R PLT_RST#_R H_THERMTRIP# DPRSLPVR

AH10 AH12 AH13

AL34 AK34 AN35 AM35

AY21

BG23

BF23 BH18

BF18

AT40

AT11

BG48

BF48 BD48 BC48 BH47 BG47 BE47 BH46

BF46 BG45 BH44 BH43

M36 N36 R33

T33

AH9

K12

T24

B31

B2 M1

T25 R25 P25 P20 P24 C25 N24 M24 E21 C23 C24 N21 P21

T21 R20 M20

L21 H21 P29 R28

T28

R29

B7 N33 P32

T20

R32

BH6 BH5 BG4 BH3 BF3 BH2 BG2 BE2 BG1 BF1 BD1 BC1

F1 A47

GM45@

U3B

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14

RSVD15 RSVD16 RSVD17

RSVD20

RSVD22 RSVD23 RSVD24 RSVD25

CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20

PM_SYNC# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR

NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20 NC_21 NC_22 NC_23 NC_24 NC_25 NC_26

CANTIGA ES_FCBGA1329

RSVD CFG PM NC

DDR CLK/ CONTROL/ COMPENSATIONHDA

CLKDMI

GRAPHICS VID

MEMISC

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1

SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1

SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1

SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1

SA_ODT_0 SA_ODT_1

SB_ODT_O

SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST# CL_VREF

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

3

M_CLK_DDR0

AP24

M_CLK_DDR1

AT21

M_CLK_DDR2

AV24

M_CLK_DDR3

AU20

M_CLK_DDR#0

AR24

M_CLK_DDR#1

AR21

M_CLK_DDR#2

AU24

M_CLK_DDR#3

AV20

DDR_CKE0_DIMMA

BC28

DDR_CKE1_DIMMA

AY28

DDR_CKE2_DIMMB

AY36

DDR_CKE3_DIMMB

BB36

DDR_CS0_DIMMA#

BA17

DDR_CS1_DIMMA#

AY16

DDR_CS2_DIMMB#

AV16

DDR_CS3_DIMMB#

AR13

M_ODT0

BD17

M_ODT1

AY17

M_ODT2

BF15

M_ODT3

AY13

SMRCOMP

BG22

SMRCOMP#

BH21

SMRCOMP_VOH

BF28

SMRCOMP_VOL

BH28

+DDR_MCH_REF

AV42

SM_PWROK

AR36

SM_REXT

BF17

SM_DRAMRST#

BC36

CLK_MCH_DREFCLK

B38

CLK_MCH_DREFCLK#

A38

MCH_SSCDREFCLK

E41

MCH_SSCDREFCLK#

F41

CLK_MCH_3GPLL

F43

CLK_MCH_3GPLL#

E43

DMI_TXN0

AE41

DMI_TXN1

AE37

DMI_TXN2

AE47

DMI_TXN3

AH39

DMI_TXP0

AE40

DMI_TXP1

AE38

DMI_TXP2

AE48

DMI_TXP3

AH40

DMI_RXN0

AE35

DMI_RXN1

AE43

DMI_RXN2

AE46

DMI_RXN3

AH42

DMI_RXP0

AD35

DMI_RXP1

AE44

DMI_RXP2

AF46

DMI_RXP3

AH43

For independent Power Rail : connect to PWM CORE VID For Common Power Rail : left it No Connect

B33 B32 G33 F33 E33

C34

For AMT function

CL_CLK0

AH37

CL_DATA0

AH36

M_PWROK

AN36

CL_RST#

AJ35

CL_VREF

AH34

N28 M28

SDVO_SCLK

G36 E36

MCH_CLKREQ#

K36

MCH_ICH_SYNC#

H36

MCH_TSATN#

B12

B28 B30 B29 C29 A28

R57 56_0402_5%R57 56_0402_5%

M_CLK_DDR0 <14> M_CLK_DDR1 <14> M_CLK_DDR2 <15> M_CLK_DDR3 <15>

M_CLK_DDR#0 <14> M_CLK_DDR#1 <14> M_CLK_DDR#2 <15> M_CLK_DDR#3 <15>

DDR_CKE0_DIMMA <14> DDR_CKE1_DIMMA <14> DDR_CKE2_DIMMB <15> DDR_CKE3_DIMMB <15>

DDR_CS0_DIMMA# <14> DDR_CS1_DIMMA# <14> DDR_CS2_DIMMB# <15> DDR_CS3_DIMMB# <15>

M_ODT0 <14> M_ODT1 <14> M_ODT2 <15> M_ODT3 <15>

1 2

R29 80.6_0402_1%R29 80.6_0402_1%

SM_DRAMRST# <14,15>

CLK_MCH_DREFCLK <16> CLK_MCH_DREFCLK# <16> MCH_SSCDREFCLK <16> MCH_SSCDREFCLK# <16>

CLK_MCH_3GPLL <16> CLK_MCH_3GPLL# <16>

DMI_TXN0 <19> DMI_TXN1 <19> DMI_TXN2 <19> DMI_TXN3 <19>

DMI_TXP0 <19> DMI_TXP1 <19> DMI_TXP2 <19> DMI_TXP3 <19>

DMI_RXN0 <19> DMI_RXN1 <19> DMI_RXN2 <19> DMI_RXN3 <19>

DMI_RXP0 <19> DMI_RXP1 <19> DMI_RXP2 <19> DMI_RXP3 <19>

CL_CLK0 <19> CL_DATA0 <19>

M_PWROK <19> CL_RST# <19>

T110T110 T109T109

MCH_CLKREQ# <16> MCH_ICH_SYNC# <19>

1 2

20mil

R30 0_0402_5%R30 0_0402_5%

1 2

R53 12K_0402_5%@R53 12K_0402_5%@

1 2

R721 10K_0402_5%@R721 10K_0402_5%@ R32 499_0402_1%R32 499_0402_1%

1

C59

0.1U_0402_16V4Z

2

SDVO_CTRLDATA

(Internal pull-down)

+1.05VS

SM_DRAMRST# is only for DDR3. DDR2 left it No Connect

1 2 1 2

SMRCOMP_VOH

SMRCOMP_VOL

+1.05VS

12

R726

R726 1K_0402_1%

1K_0402_1%

R729

R729 499_0402_1%

499_0402_1%

Strap Pin Table

2

For DDR3 : 1.5V power rail For DDR2 : 1.8V power rail

+1.5V

12

R28

80.6_0402_1%

1.5V_PGOOD <39> DDR3_SM_PWROK <27>

1

2

1

2

0 = SDVO interface disabled 1 = SDVO interface enabled

0 = Digital display (iHDMI/DP) interface disabled 1 = Digital display (iHDMI/DP) interface enabled

Notice: Please check HDA power rail to select HDA controller.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

2

For Crestline: 20ohm For Calero: 80.6ohm For Cantiga: 80.6ohm

SDVO_SCLK

1

C56

2.2U_0603_6.3V4Z

2

1

C58

2.2U_0603_6.3V4Z

2

(Default)

*

R56

@R56

@

C55

0.01U_0402_25V7K

C57

0.01U_0402_25V7K

1

Layout Note: +DDR_MCH_REF trace width and spacing is 20/20. CLOSE TO PIN.AV42

+DDR_MCH_REF

+1.5V

12

R34

R34 1K_0402_1%

1K_0402_1%

12

R724

3.01K_0402_1%

12

R43

R43 1K_0402_1%

1K_0402_1%

(Default)DDPC_CTRLDATA

*

+3VS

2.2K_0402_5%

12

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Cantiga(2/7)-DMI/DDR/STRP

LA7011P

1

2

C61

0.1U_0402_16V4Z

+1.5V

12

R58

R58 10K_0402_1%

10K_0402_1%

12

R64

R64 10K_0402_1%

10K_0402_1%

8 41Friday, December 24, 2010

1.0

5

4

3

2

1

D D

C C

B B

DDR_A_D[0..63]<14> DDR_A_BS[0..2] <14>

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_DQS#0 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AJ38 AJ41 AN38 AM38 AJ36 AJ40 AM44 AM42 AN43 AN44 AU40 AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37 AT36 AY38 BB38 AV36

AW36

BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12

AU10

BA11

AN10 AM11

AN12 AM13 AJ11 AJ12

BB9 BA9

AV9

BD9 AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6 AT5

AM5 AJ9 AJ8

U3D

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

CANTIGA ES_FCBGA1329

GM45@

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7

SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3

DDR SYSTEM MEMORY A

SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

BG18 AT25

BB20 BD20 AY20

AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7

AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

DDR_A_BS1 DDR_A_BS2

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14

DDR_A_RAS# <14> DDR_A_CAS# <14> DDR_A_WE# <14>

DDR_A_BS0

BD21

DDR_A_DM[0..7] <14>

DDR_A_DQS[0..7] <14>

DDR_A_DQS#[0..7] <14>

DDR_A_MA[0..14] <14>

DDR_B_D[0..63]<15> DDR_B_BS[0..2] <15>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AK47 AH46 AP47 AP46

AM48 AP48 AU47 AU46 BA48 AY48

AT47 AR47 BA47 BC47 BC46 BC44 BG43

BF43 BE45 BC41

BF40

BF41 BG38

BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11

BH12

BF11

AJ46 AJ48

BG8

BG7

AM2 AM3

BF8

BC5 BC6 AY3 AY1 BF6 BF5 BA1 BD3 AV2 AU3 AR3 AN2 AY2 AV1 AP3 AR1 AL1 AL2 AJ1 AH1

AH3 AJ3

U3E

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

CANTIGA ES_FCBGA1329

GM45@

SB_BS_0 SB_BS_1 SB_BS_2

SB_RAS# SB_CAS#

SB_WE#

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7

SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2

DDR SYSTEM MEMORY B

SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

BB17 BB33

AU17 BG16 BF14

AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6

AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

DDR_B_BS1 DDR_B_BS2

DDR_B_RAS# DDR_B_CAS# DDR_B_WE#

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14

DDR_B_RAS# <15> DDR_B_CAS# <15> DDR_B_WE# <15>

DDR_B_BS0

BC16

DDR_B_DM[0..7] <15>

DDR_B_DQS[0..7] <15>

DDR_B_DQS#[0..7] <15>

DDR_B_MA[0..14] <15>

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

Cantiga(3/7)-DDR3 A/B CH

LA7011P

1

9 41Friday, December 24, 2010

of

1.0

5

4

3

2

1

Place the resistor within 500mils (1.27mm)of the (G)MCH

PEGCOMP trace width

U3C

+3VS

D D

R730 10K_0402_5%R730 10K_0402_5%

1 2

R731 10K_0402_5%R731 10K_0402_5%

1 2

R732 2.2K_0402_5%R732 2.2K_0402_5%

1 2

R734 2.2K_0402_5%R734 2.2K_0402_5%

ENBKL

R259

100K_0402_1%

1 2

C C

B B

L_CTRL_CLK

L_CTRL_DATA

EDID_CLK

EDID_DATA

For Cantiga:2.37kohm For Crestline:2.4kohm For Calero: 1.5Kohm

Note: All LVDS data signals/and it's compliments should be routed Differentially

Layout Note: Place 150 Ω termination resistors close to GMCH

R736 150_0402_1%R736 150_0402_1%

1 2

R72 150_0402_1%R72 150_0402_1%

1 2

R73 150_0402_1%R73 150_0402_1%

1 2

CRT_HSYNC<21>

CRT_VSYNC<21>

10/01 change R74,R75 from 30ohm to 33ohm

DAC_RED DAC_GRN DAC_BLU

GMCH_PWM<22>

ENBKL<27>

EDID_CLK<22> EDID_DATA<22>

GMCH_ENVDD<22>

LVDS_ACLK#<22> LVDS_ACLK<22>

LVDS_A0#<22> LVDS_A1#<22> LVDS_A2#<22>

LVDS_A0<22> LVDS_A1<22> LVDS_A2<22>

R481 75_0402_5%R481 75_0402_5%

1 2

R482 75_0402_5%R482 75_0402_5%

1 2

R483 75_0402_5%R483 75_0402_5%

1 2

DAC_BLU<21>

DAC_GRN<21>

DAC_RED<21>

CRT_DDC_CLK<21> CRT_DDC_DATA<21>

1 2

R74 33_0402_5%R74 33_0402_5%

1 2

R75 33_0402_5%R75 33_0402_5%

GMCH_PWM

ENBKL

L_CTRL_CLK

L_CTRL_DATA EDID_CLK EDID_DATA GMCH_ENVDD

1 2

R735 2.37K_0402_1%R735 2.37K_0402_1%

LVDS_IBG

LVDS_ACLK# LVDS_ACLK

LVDS_A0# LVDS_A1# LVDS_A2#

LVDS_A0 LVDS_A1 LVDS_A2

TVA_DAC TVB_DAC TVC_DAC

DAC_BLU

DAC_GRN

DAC_RED

CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC_R

CRT_VSYNC_R

20mil

L32 G32 M32 M33 K33

J33 M29

C44 B43 E37 E38

C41 C40 B37 A37

H47 E46 G40 A40

H48 D45

F40 B40

A41 H38 G37

J37

B42 G38

F37 K37

F25 H25 K25

H24

C31 E32

E28

G28

J28

G29

H32

J32

J29 E29

L29

12

R78

1.02K_0402_1%

U3C

L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK L_CTRL_DATA L_DDC_CLK L_DDC_DATA L_VDD_EN

LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL

LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK

LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3

LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3

LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3

LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3

TVA_DAC TVB_DAC TVC_DAC

TV_RTN

TV_DCONSEL_0 TV_DCONSEL_1

CRT_BLUE

CRT_GREEN

CRT_RED

CRT_IRTN

CRT_DDC_CLK CRT_DDC_DAT A CRT_HSYNC CRT_TVO_IREF

CRT_VSYNC

GM45@

LVDS TV VGA

PCI-EXPRESS GRAPHICS

CANTIGA ES_FCBGA1329

PEG_COMPI

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8

PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9

PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_0

PEG_TX_1

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_5

PEG_TX_6

PEG_TX_7

PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

and spacing is 20/25 mils.

T37

PEGCOMP

T36

H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39

H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40

J41 M46 M47 M40 M42 R48 N38 T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46

J42 L46 M48 M39 M43 R47 N37 T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46

1 2

R733 49.9_0402_1%R733 49.9_0402_1%

+VCC_PEG

Please check Power source if want support IAMT

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

For Cantiga:1.02kohm For Crestline:1.3kohm For Calero: 255ohm

Compal Secret Data

2010/09/10 2010/08/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Cantiga(4/7)-VGA/LVDS

LA7011P

10 41Friday, December 24, 2010

1

1.0

5

4

3

2

1

0.1U_0402_16V4Z

1

C62

2

0.1U_0402_16V4Z

1

C71

2

R743

1 2

0_0603_5%

0.022U_0402_16V7K

+3VS_DAC_CRT

0.022U_0402_16V7K

1

C63

2

+3VS_DAC_BG

0.022U_0402_16V7K

1

C72

2

+1.05VS

+3VS_TVDAC

1

C105

2

10U_0805_10V4Z

C64

10U_0805_10V4Z

C73

1

2

220U_6.3V_M

1

C106

0.1U_0402_16V4Z

2

C839

1

2

10U_0805_10V4Z

1

2

1

C89

2

R742

0_0603_5%

C116

1

2

1 2

0.1U_0402_16V4Z

10U_0805_10V4Z

12

0_0805_5%

10U_0805_10V4Z

VCC_AXF: 321.35mA (10UF*1, 1UF*1)

+1.05VS

R81

0_0603_5%

VCC_SM_CK: 119.85mA (10UF*1, 0.1UF*1)

1

2

VCCD_TVDAC: 58.696mA (0.1UF*1, 0.01UF*1)

+1.8V_TXLVDS: 118.8mA (22UF*1, 1000PF*1)

R744

R745

0_0805_5%

R737

1 2

0_0805_5%

C80

R739

0_0603_5%

+1.8VS

12

+1.5V

+1.5VS

12

+1.05VS

VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8 VTT_9

U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47

C35 B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

A8 L1 AB2

+1.05VS

440mA

149.5mA

80mA

1782mA

456mA

1

2

OSCON

220U_6.3V_M

C65

1

+

2

1

C740.47U_0402_6.3V6K C740.47U_0402_6.3V6K

2

+V1.05VS_AXF

+1.5V_SM_CK

+1.8V_TXLVDS

+3VS_HV

105.3mA

+VCC_PEG

+VCC_DMI

VCC_DMI: 456mA (0.1UF*1)

20mils

0.47U_0402_6.3V6K

1

C112

C111

2

852mA

C75

C103

C113

4.7U_0805_10V4Z

1

C66

2

4.7U_0805_10V4Z

1

2

0.1U_0402_16V4Z

1

2

0.47U_0402_6.3V6K

+1.05VS_DPLLA

0.1U_0402_16V4Z

1

C67

2

+1.05VS_DPLLB

0.1U_0402_16V4Z

1

C77

2

+1.05VS_HPLL

1

C84

0.1U_0402_16V4Z

+1.05VS

RB751V_SOD323

+3VS

10/01 Danson

Change D38 from SC1H751H010 t o SCS00000Z00 .

+1.05VS_MPLL

C99

0.1U_0402_16V4Z

D38

@

2 1

2

1

2

C107

1

2

+VCCP_D

R80

1 2

10U_0805_10V4Z

MCK3225151YZF 1210

1

C68

2

+1.05VS_DPLLA +1.05VS_DPLLB: 64.8mA (470UF*1, 0.1UF*1)

R83

1 2

10U_0805_10V4Z

MCK3225151YZF 1210

1

C78

2

+1.05VS_HPLL: 24mA (4.7UF*1, 0.1UF*1)

L33

MBK2012121YZF_2P

1

C85

2.2U_0603_6.3V4Z

2

1.05VS_MPLL: 139.2mA

L34

(22UF*1, 0.1UF*1)

MBK2012121YZF_2P

1

C100

2.2U_0603_6.3V4Z

2

L1

BLM18PG121SN1D_0603

1

C108

2.2U_0603_6.3V4Z

2

R746

@R746

@

12

10_0402_5%

+1.05VS

12

+1.05VS

12

+1.05VS

+1.5VS_PEG_PLL: 50mA (0.1UF*1)

12

+1.05VS

R747

12

0_0402_5%

+3VS_HV

U3H

1

2

VCCA_CRT_DAC: 73mA (0.1UF*1, 0.01UF*1)

+3VS_DAC_CRT

VCCA_DAC_BG: 2.68mA (0.1UF*1, 0.01UF*1)

+3VS_DAC_BG

+1.05VS_DPLLA

+1.05VS_DPLLB

+1.05VS_HPLL

+1.05VS_MPLL

1

C76

2

20 mils

+1.05VS_PEGPLL

747.5mA

1U_0603_10V4Z

37.95mA

0.1U_0402_16V4Z

1

C98

2

+1.5VS_TVDAC

+1.5VS_QDAC

+1.05VS_HPLL

+1.05VS_PEGPLL

+1.8V_LVDS

139.2mA

1

2

157.2mA

30mA

+1.5VS_PEG_BG: 0.414mA (0.1UF*1)

OSCON

1

+

C90

2

+1.5VS

R740

1 2

0_0805_5%

10U_0805_10V4Z

R741

0_0603_5%

C91

12

R738

1

2

C95

1

2

+1.5VS_PEG_BG

12

4.7U_0805_10V4Z

4.7U_0805_10V4Z C92

C92

+1.05VS_A_SM_CK

1U_0402_6.3V4Z

10U_0805_10V4Z

1

C96

2

+1.8V_TXLVDS

1000P_0402_50V7K

0.41mA

1

C83

0.1U_0402_16V4Z

2

+1.05VS_A_SM

1

2

1U_0603_10V4Z

C97

1

2

+3VS_TVDAC: 40mA (0.1UF*1, 0.01UF*1 for each DAC)

+3VS_TVDAC

73mA

5mA

32.4mA

24mA

10mA

50mA

C93

79mA

35mA

1mA

50mA

U3H

B27

VCCA_CRT_DAC_1

A26

VCCA_CRT_DAC_2

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

F47

VCCA_DPLLA

L48

VCCA_DPLLB

AD1

VCCA_HPLL

AE1

VCCA_MPLL

J48

VCCA_LVDS

J47

VSSA_LVDS

AD48

VCCA_PEG_BG

AA48

VCCA_PEG_PLL

AR20

VCCA_SM_1

AP20

VCCA_SM_2

AN20

VCCA_SM_3

AR17

VCCA_SM_4

AP17

VCCA_SM_5

AN17

VCCA_SM_6

AT16

VCCA_SM_7

AR16

VCCA_SM_8

AP16

VCCA_SM_9

AP28

VCCA_SM_CK_1

AN28

VCCA_SM_CK_2

AP25

VCCA_SM_CK_3

AN25

VCCA_SM_CK_4

AN24

VCCA_SM_CK_5

AM28

VCCA_SM_CK_NCT F_1

AM26

VCCA_SM_CK_NCT F_2

AM25

VCCA_SM_CK_NCT F_3

AL25

VCCA_SM_CK_NCT F_4

AM24

VCCA_SM_CK_NCT F_5

AL24

VCCA_SM_CK_NCT F_6

AM23

VCCA_SM_CK_NCT F_7

AL23

VCCA_SM_CK_NCT F_8

B24

VCCA_TV_DAC_1

A24

VCCA_TV_DAC_2

A32

VCC_HDA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

M38

VCCD_LVDS_1

L37

VCCD_LVDS_2

GM45@

CRTPLLA LVDSA PEG

VTT

POWER

A SM

AXF

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

SM CK

VCC_TX_LVDS

A CK

HV

TV

HDA

DMI PEG

VTTLF

LVDS D TV/CRT

CANTIGA ES_FCBGA1329

VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25

VCC_AXF_1 VCC_AXF_2 VCC_AXF_3

VCC_HV_1 VCC_HV_2 VCC_HV_3

VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5

VCC_DMI_1 VCC_DMI_2 VCC_DMI_3 VCC_DMI_4

VTTLF1 VTTLF2 VTTLF3

20 mils

OSCON

C104

220U_6.3V_M

20 mils

+V1.05VS_AXF

10U_0805_10V4Z

+1.5VS_TVDAC

C87

1000P_0402_50V7K

C101

1

2

+VCC_PEG+1.05VS_PEGPLL

1

+

2

+VCC_DMI

1U_0603_10V4Z

C114

1

2

C69

1

2

+1.5V_SM_CK

0.022U_0402_16V7K

1

C88

2

+1.8V_TXLVDS

C102

1

2

C109

1

2

C115

1

2

1U_0603_10V4Z

C79

0.1U_0402_16V4Z

10U_0805_10V4Z

+3VS

1 2

R79

R79 0_0603_5%

0_0603_5%

D D

+3VS

1 2

R82

R82 10_0603_5%

10_0603_5%

VCCA_SM:720mA (22UF*2, 4.7UF*1, 1UF*1)

C C

VCCA_SM_CK: 220mA (22UF*1, 2.2UF*1, 0.1UF*1)

+3VS

B B

0.1U_0402_16V4Z

1

C118

2

VCCD_QDAC: 48.363mA (0.1UF*1, 0.01UF*1)

R748

12

0_0603_5%

0_0603_5% 10U_0805_10V4Z

10U_0805_10V4Z

1

C119

2

5

+1.5VS

+1.8V_LVDS

10U_0805_10V4Z

C120

1

2

+1.5VS_QDAC

1U_0402_6.3V4Z

C117

A A

C117

1.8V_LVDS: 60.311111mA (1UF*1)

R98

0_0603_5%

0_0603_5% 1U_0603_10V4Z

1U_0603_10V4Z

C840

1

2

12

+1.8VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SH EET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SH EET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SH EET NOR THE INF ORMATION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Cantiga(6/7)-VCC-1

LA7011P

1

1.0

11 41Friday, December 24, 2010

1.0

5

+1.05VS

D D

3060mA

0.22U_0402_10V4Z

10U_0805_10V4Z

1

C843

2

C C

B B

A A

0.1U_0402_16V4Z

0.22U_0402_10V4Z

C849

C848

C847

1

2

AG34 AC34 AB34 AA34

AM33 AK33

AJ33

AG33

AF33

AE33 AC33 AA33

W33

AH28

AF28 AC28 AA28

AJ26 AG26 AE26 AC26 AH25 AG25

AF25 AG24

AJ23 AH23

AF23

U3G

VCC_1 VCC_2 VCC_3 VCC_4

Y34

VCC_5

V34

VCC_6

U34

VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12

VCC_13 VCC_14 VCC_15

Y33

VCC_16 VCC_17

V33

VCC_18

U33

VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34

T32

VCC_35

GM45@

VCC CORE

POWER

VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8

VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28

VCC NCTF

VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31 VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38 VCC_NCTF_39 VCC_NCTF_40 VCC_NCTF_41 VCC_NCTF_42 VCC_NCTF_43 VCC_NCTF_44

CANTIGA ES_FCBGA1329

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

4

+1.05VS

4140mA

+1.5V

1U_0603_10V4Z

OSCON

C844

220U_6.3V_M

C850

0.1U_0402_16V4Z

EMI +1.5V decoupling

1

C851

2

C852

220U_6.3V_M

OSCON

1

2

1

2

@

10U_0805_10V4Z

1

+

C853

2

+

1

2

10U_0805_10V4Z

C842

1

2

1

C139

0.1U_0402_16V4Z

2

@

1

C854

2

10U_0805_10V4Z

T11T11 T12T12

0.01U_0402_16V7K

2

1

+1.05VS

0.1U_0402_16V4Z

1

C138

2

VCC_AXG_SENSE VSS_AXG_SENSE

3

U3F

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

AP33

VCC_SM_1

AN33

VCC_SM_2

BH32

VCC_SM_3

BG32

VCC_SM_4

BF32

VCC_SM_5

BD32

VCC_SM_6

BC32

C846

BB32 BA32 AY32

AW32

AV32 AU32

AT32 AR32 AP32 AN32 BH31 BG31

BF31 BG30 BH29 BG29

BF29 BD29 BC29 BB29 BA29 AY29

AW29

AV29 AU29

AT29 AR29 AP29

BA36 BB24 BD16 BB21

AW16 AW13

AT13

AE25 AB25 AA25 AE24 AC24 AA24

AE23 AC23 AB23 AA23

AJ21 AG21 AE21 AC21 AA21

AH20

AF20 AE20 AC20 AB20 AA20

AM15

AL15 AE15

AJ15 AH15 AG15

AF15 AB15 AA15

AN14 AM14

AJ14 AH14

Y26

Y24

Y21

T17 T16

Y15 V15 U15

U14

T14

VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35

VCC_SM_36/NC VCC_SM_37/NC VCC_SM_38/NC VCC_SM_39/NC VCC_SM_40/NC VCC_SM_41/NC VCC_SM_42/NC

VCC_AXG_1 VCC_AXG_2 VCC_AXG_3 VCC_AXG_4 VCC_AXG_5 VCC_AXG_6 VCC_AXG_7 VCC_AXG_8 VCC_AXG_9 VCC_AXG_10 VCC_AXG_11 VCC_AXG_12 VCC_AXG_13 VCC_AXG_14 VCC_AXG_15 VCC_AXG_16 VCC_AXG_17 VCC_AXG_18 VCC_AXG_19 VCC_AXG_20 VCC_AXG_21 VCC_AXG_22 VCC_AXG_23 VCC_AXG_24 VCC_AXG_25 VCC_AXG_26 VCC_AXG_27 VCC_AXG_28 VCC_AXG_29 VCC_AXG_30 VCC_AXG_31 VCC_AXG_32 VCC_AXG_33 VCC_AXG_34 VCC_AXG_35 VCC_AXG_36 VCC_AXG_37 VCC_AXG_38 VCC_AXG_39 VCC_AXG_40 VCC_AXG_41 VCC_AXG_42

VCC_AXG_SENSE VSS_AXG_SENSE

GM45@

VCC_AXG_NTCF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8

VCC SM

VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43

VCC GFX NCTF

VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52

POWER

VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55 VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60

VCC GFX

VCC SM LF

CANTIGA ES_FCBGA1329

+1.05VS

VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7

2

Check : power

C845

0.1U_0402_16V4Z

1

2

PLACE AS CLOSE PIN AS COULD.

C140 0.1U_0402_16V4ZC140 0.1U_0402_16V4Z

C141 0.1U_0402_16V4ZC141 0.1U_0402_16V4Z

1

2

C129

0.22U_0402_10V4Z

1

2

C142 0.22U_0402_10V4ZC142 0.22U_0402_10V4Z

1

2

1

8000mA

C841

1

4.7U_0603_6.3V6K

2

C857 1U_0402_6.3V4ZC857 1U_0402_6.3V4Z

C856 1U_0402_6.3V4ZC856 1U_0402_6.3V4Z

C143 0.22U_0402_10V4ZC143 0.22U_0402_10V4Z

C855 0.47U_0402_6.3V6KC855 0.47U_0402_6.3V6K

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Cantiga(6/7)-VCC-1

LA7011P

1

12 41Fri day, December 24, 2010

1.0

5

U3I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

AF47

VSS_8

AD47

D D

C C

B B

A A

AB47

G47

BD46

BA46 AY46

AV46 AR46 AM46

BF44 AH44 AD44

AA44

M44

BC43

AV43 AU43 AM43

BG42

AY42

AT42 AN42

AJ42

AE42

BD41 AU41 AM41 AH41 AD41

AA41

M41 G41

BG40

BB40

AV40 AN40

AT39 AM39

AJ39

AE39

BH38 BC38

BA38 AU38 AH38 AD38

AA38

BF37

BB37 AW37

AT37 AN37

AJ37

BG36 BD36

AK15 AU36

Y47 T47 N47 L47

V46 R46 P46 H46 F46

Y44 U44 T44

F44

J43 C43

N42 L42

Y41 U41 T41

B41

H40 E40

N39 L39 B39

Y38 U38 T38 J38 F38 C38

H37 C37

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99

CANTIGA ES_FCBGA1329

GM45@

VSS

VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

4

BG21

L12

AW21

AU21 AP21 AN21 AH21 AF21 AB21

R21

M21

J21

G21 BC20 BA20

AW20

AT20 AJ20

AG20

Y20

N20

K20

F20 C20 A20

BG19

A18

BG17

BC17

AW17

AT17

R17 M17 H17 C17

BA16

AU16 AN16

N16 K16 G16 E16

BG15

AC15

W15

A15

BG14

AA14

C14

BG13

BC13 BA13

AN13 AJ13 AE13

N13

L13 G13 E13

BF12 AV12 AT12

AM12

AA12

J12 A12

BD11 BB11 AY11 AN11 AH11

Y11 N11 G11 C11

BG10

AV10 AT10 AJ10 AE10 AA10

M10 BF9

BC9 AN9 AM9 AD9

BH8

BB8 AV8 AT8

U3J

VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233

VSS_235

VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252

VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273

VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290

G9

VSS_291

B9

VSS_292 VSS_293 VSS_294 VSS_295 VSS_296

GM45@

VSS

CANTIGA ES_FCBGA1329

VSS NCTF

VSS SCB

NC

VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325

VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350

VSS_351 VSS_352 VSS_353 VSS_354

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16

VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5

NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34 NC_35 NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_42

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1

U24 U28 U25 U29

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

BH48 BH1 A48 C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

3

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Cantiga(7/7)-GND

LA7011P

1

13 41Fri day, December 24, 2010

1.0

5

+VREF_DQ_DIMMA

2.2U_0603_6.3V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K C303

C303

1

2

D D

C C

B B

A A

2

DDR_CKE0_DIMMA<8>

DDR_A_BS2<9>

M_CLK_DDR0<8> M_CLK_DDR#0<8>

DDR_A_BS0<9>

DDR_A_WE#<9> DDR_A_CAS#<9>

DDR_CS1_DIMMA#<8>

+3VS

1

2

DDR_A_D0

C347

DDR_A_D1

DDR_A_DM0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS# M_ODT0

DDR_A_MA13 DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

1 2

10K_0402_5%

2.2U_0603_6.3V4Z

0.1U_0402_10V6K

C608

C617

1

2

+1.5V +1.5V

3A@1.5V

3A@1.5V3A@1.5V

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

R571

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U4RN-7F

ME@

R570

10K_0402_5%

12

VSS3

DQS#0

DQS0

VSS6

VSS8 DQ12 DQ13

VSS10

DQ14 DQ15

DQ20 DQ21

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1

VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

VTT2

2 4

DQ4

6

DQ5

8 10 12 14 16

DQ6

18

DQ7

20 22 24 26 28

DM1

30 32 34 36 38 40 42 44 46

DM2

48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78

A15

80

A14

82 84

A11

86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102

CK1

104 106 108

BA1

110 112 114

S0#

116 118 120 122

NC2

124 126 128 130 132 134 136

DM4

138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170

DM6

172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

SDA

202

SCL

204

206

G2

DDR3 SO-DIMM A H=4mm Reverse type

5

DDR_A_D4 DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

DDR_A_DM1 SM_DRAMRST#

DDR_A_D14 DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_DM2

DDR_A_D22 DDR_A_D23

DDR_A_D28 DDR_A_D29

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D30 DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA14

DDR_A_MA11 DDR_A_MA7

DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_BS1 DDR_A_RAS#

DDR_CS0_DIMMA#

M_ODT1

DDR_A_D36 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

PM_EXTTS#0

+0.75VS

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

4

SM_DRAMRST# <8,15>

DDR_CKE1_DIMMA <8>

M_CLK_DDR1 <8> M_CLK_DDR#1 <8>

DDR_A_BS1 <9> DDR_A_RAS# <9>

DDR_CS0_DIMMA# <8> M_ODT0 <8>

M_ODT1 <8>

0.1U_0402_10V6K

0.1U_0402_10V6K C346

C346

1

2

VDDQ(1.5V) =

VTT(0.75V) =

VREF =

VDDSPD (3.3V)=

PM_EXTTS#0 <8,15>

CLK_SMBDATA <15,16> CLK_SMBCLK <15,16>

3

DDR_A_D[0..63]<9>

DDR_A_DM[0..7]<9>

DDR_A_DQS[0..7]<9>

DDR_A_DQS#[0..7]<9>

DDR_A_MA[0..14]<9>

+VREF_DQ_DIMMA

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z C355

C355

1

2

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)

6*0603 10uf (PER CONNECTOR)

3*0805 10uf

1*0402 0.1uf

4*0402 1uf

1*0402 2.2uf

1*0402 0.1uf 1*0402 2.2uf

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Layout Note: Place near DIMM

Issued Date

2

Pre MP ADD for ESD solution

C659

+1.5V

1

2

Near R297

0.1U_0402_16V4Z

+1.5V

12

R297

1K_0402_1%

12

R305

1K_0402_1%

For Arranale only +VREF_DQ_DIMMA supply from a external 1.5V voltage divide circuit. 07/17/2009

1

+VREF_DQ_DIMMA

Place closely pin JDIMM1.30

SM_DRAMRST#

1

C639

@

100P_0402_50V8J

2

1224 Change C639 to @ for download image fail issue

+1.5V

10U_0603_6.3V6M

C589

1

@

2

10U_0603_6.3V6M

C586

C588

1

2

+0.75VS

C607

C605

1U_0603_10V4Z

C605

1U_0603_10V4Z

1

2

2010/09/10 2010/08/19

C581

C310

1

2

C606

1U_0603_10V4Z

1

2

Compal Secret Data

10U_0603_6.3V6M

1

2

C300

1

2

1U_0603_10V4Z

Deciphered Date

10U_0603_6.3V6M

C309

1

2

10U_0603_6.3V6M

1

2

10U_0603_6.3V6M

C570

C308

1

2

C301

0.1U_0402_10V6K

0.1U_0402_10V6K C315

C315

C314

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K C316

C316

C317

1

2

Title

Size Document Number Rev

Custom

Date: Sheet of

1

+

C569

C569 220U_6.3V_M

220U_6.3V_M

OSCON

2

Compal Electronics, Inc.

DDRIII SO-DIMM A

LA7011P

1

14 41Fri day, December 24, 2010

1.0

5

4

3

2

1

+VREF_DQ_DIMMB

0.1U_0402_10V6K

2.2U_0603_6.3V4Z

1

C382

2

+3VS

2

DDR_CKE2_DIMMB<8>

DDR_B_BS2<9>

M_CLK_DDR2<8> M_CLK_DDR#2<8>

DDR_B_BS0<9>

DDR_B_WE#<9> DDR_B_CAS#<9>

DDR_CS3_DIMMB#<8>

2.2U_0603_6.3V4Z

1

2

D D

C C

B B

A A

DDR_B_D0 DDR_B_D1

DDR_B_DM0

C384

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13 DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_DM7

DDR_B_D58 DDR_B_D59

1 2

10K_0402_5%

0.1U_0402_10V6K

C618

C616

1

2

+1.5V +1.5V

3A@1.5V

3A@1.5V3A@1.5V

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

R572

1 2

R573 10K_0402_5%R573 10K_0402_5%

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U8RN-7F

ME@

VSS3

DQS#0

DQS0

VSS6

VSS8 DQ12 DQ13

VSS10

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1

VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44

DQ45 VSS35 DQS#5

DQS5

VSS38

DQ46

DQ47 VSS40

DQ52

DQ53 VSS42

VSS43

DQ54

DQ55 VSS45

DQ60

DQ61 VSS47 DQS#7

DQS7

VSS50

DQ62

DQ63 VSS52

EVENT#

VTT2

DDR_B_DQS#[0..7]<9>

DDR_B_D[0..63]<9>

+VREF_DQ_DIMMB

2.2U_0603_6.3V4Z

C383

1

2

4*0402 1uf

1*0402 2.2uf

DDR_B_DM[0..7]<9>

DDR_B_DQS[0..7]<9>

DDR_B_MA[0..14]<9>

For Arranale only +VREF_DQ_DIMMB supply from a external 1.5V voltage divide circuit. 07/17/2009

Place closely pin JDIMM2.30

1224 Change C640 to @ for download image fail issue

Layout Note: Place near DIMM

10U_0603_6.3V6M

C582

1

@

2

10U_0603_6.3V6M

C587

1

@

2

Layout Note: Place near DIMM

+0.75VS

+1.5V

10U_0603_6.3V6M

C576

C311

1

2

1U_0603_10V4Z

10U_0603_6.3V6M

1

2

1U_0603_10V4Z

C595

C596

C299

1

2

1

2

10U_0603_6.3V6M

C313

C590

1

2

1U_0603_10V4Z

C598

10U_0603_6.3V6M

C575

1

2

0.1U_0402_10V6K

C307

C304

C312

1

2

C304

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K C306

C306

C305

1

2

DDR_B_D4

4

DQ4 DQ5

DQ6 DQ7

DM1

DM2

A15 A14

A11

A7

A6 A4

A2 A0

CK1

BA1

S0#

NC2

DM4

DM6

SDA

SCL

G2

6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1 SM_DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2

DDR_B_D22 DDR_B_D23DDR_B_D18

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_CKE3_DIMMB

DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

M_CLK_DDR3 M_CLK_DDR#3

DDR_B_BS1 DDR_B_RAS#

DDR_CS2_DIMMB# M_ODT2

M_ODT3

DDR_B_D36 DDR_B_D37

DDR_B_DM4

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_DM6

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

PM_EXTTS#0

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

SM_DRAMRST# <8,14>

DDR_CKE3_DIMMB <8>

M_CLK_DDR3 <8> M_CLK_DDR#3 <8>

DDR_B_BS1 <9> DDR_B_RAS# <9>

DDR_CS2_DIMMB# <8> M_ODT2 <8>

M_ODT3 <8>

0.1U_0402_10V6K

C385

1

2

VDDQ(1.5V) =

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)

6*0603 10uf (PER CONNECTOR)

VTT(0.75V) =

3*0805 10uf

1*0402 0.1uf

VDDSPD (3.3V)=

1*0402 0.1uf 1*0402 2.2uf

PM_EXTTS#0 <8,14>

CLK_SMBDATA <14,16> CLK_SMBCLK <14,16>

+0.75VS

R341

1K_0402_1%

SM_DRAMRST#

1

@

2

+1.5V

12

R340

C640

100P_0402_50V8J

+VREF_DQ_DIMMB

DDR3 SO-DIMM A H=8mm Reverse type

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DDRIII SO-DIMM B

LA7011P

1

15 41Fri day, December 24, 2010

1.0

5

PCI

SRC

CPU

CLKSEL1

0

FSA

CLKSEL0

MHz

266

MHz

1000

MHz

33.30

14.318 96.0 48.0

DOT_96 MHz

USB MHz

FSC FSB REF

CLKSEL2

0 1000 133 33.31 14.318 96.0 48.0

D D

0 1001 200 33.30 14.318 96.0 48.0

0 1001 166 33.31 14.318 96.0 48.0

1 1000 333 33.30 14.318 96.0 48.0

1 1000 100 33.31 14.318 96.0 48.0

1 1001 400 33.30 14.318 96.0 48.0

1 1 1

FSA

R680 2.2K_0402_5%R680 2.2K_0402_5%

C C

CPU_BSEL0<5>

CPU_BSEL1<5>

B B

CPU_BSEL2<5>

12

@

R707

R707 10K_0402_5%

10K_0402_5%

ITP_EN PCI4_SEL PCI2_TME

12

A A

R710

R710 10K_0402_5%

10K_0402_5%

R678 0_0402_5%R678 0_0402_5%

R690 0_0402_5%R690 0_0402_5%

FSC

R696 10K_0402_5%R696 10K_0402_5%

R699 0_0402_5%R699 0_0402_5%

+3VS+3VS +3VS

12

@

R708

R708 10K_0402_5%

10K_0402_5%

12

R711

R711 10K_0402_5%

10K_0402_5%

1 2

12

R709

R709 10K_0402_5%

10K_0402_5%

12

@

R712

R712 10K_0402_5%

10K_0402_5%

FSB

Reserved

+1.05VS

@

R675

R675 56_0402_5%

56_0402_5%

1 2

R676 1K_0402_5%R676 1K_0402_5%

1 2

12

@

R679

R679 1K_0402_5%

1K_0402_5%

+1.05VS

12

@

R686

R686 1K_0402_5%

1K_0402_5%

R688 1K_0402_5%R688 1K_0402_5%

1 2

12

@

R691

R691 0_0402_5%

0_0402_5%

+1.05VS

12

@

R692

R692 1K_0402_5%

1K_0402_5%

R697 1K_0402_5%R697 1K_0402_5%

1 2

12

@

R704

R704 0_0402_5%

0_0402_5%

PVT

Close to CLK_PCI_LPC signal.

+3VS

1

C657

C657 470P_0402_50V7K

470P_0402_50V7K

2

MCH_CLKSEL0 <8>

MCH_CLKSEL1 <8>

MCH_CLKSEL2 <8>

For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#

For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# Pin28/29 : LCDCLK / LCDCLK# 1 = Pin24/25 : SRC_0 / SRC_0# Pin28/29 : 27M/27M_SS

5

4

R668 0_0805_5%R668 0_0805_5%

+3VS

R673 0_0805_5%R673 0_0805_5%

+1.05VS

CLK_48M_ICH<19>

CLK_14M_ICH<19>

CK_PWRGD<19>

H_STP_CPU#<19>

CLK_PCI_LPC<27>

CLK_PCI_ICH<17>

1 2

H_STP_PCI#<19>

+3VSM_CK505

R685 33_0402_5%R685 33_0402_5%

1 2

R687 33_0402_5%R687 33_0402_5%

1 2

T5T5

R700 33_0402_5%@R700 33_0402_5%@

1 2

R705 33_0402_5%R705 33_0402_5%

1 2

R706 33_0402_5%R706 33_0402_5%

1 2

1

C811

C811 10U_0805_10V4Z

10U_0805_10V4Z

2

+VDD_CK505

Change Y4 from SJ114P3M720 to SJ100002600.

C825 27P_0402_50V8J

14.31818MHZ X5H01431AFG1H-X

C828 27P_0402_50V8J

Routing the trace at least 10mil

4

Y4

CLK_XTAL_IN

12

CLK_XTAL_OUT

3

1

C818

C818 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C812

0.1U_0402_16V4Z

2

1

C819

0.1U_0402_16V4Z

2

1

C813

0.1U_0402_16V4Z

2

1

2

1

2

C820

0.1U_0402_16V4Z

C814

0.1U_0402_16V4Z

1

C821

0.1U_0402_16V4Z

2

1

C815

0.1U_0402_16V4Z

2

1

C822

0.1U_0402_16V4Z

2

SA000020K00 (Silego : SLG8SP556VTR ) SA000020H00 (ICS : ICS9LPRS387AKLFT)

+3VSM_CK505

U30

55

VDD_SRC

6

VDD_REF

12

+VDD_CK505

CK_PWRGD

H_STP_CPU#

H_STP_PCI#

CLK_XTAL_IN

CLK_XTAL_OUT

FSA

FSB

FSC

PCI2_TME

PCI4_SEL

ITP_EN

VDD_PCI

72

VDD_CPU

19

VDD_48

27

VDD_PLL3

66

VDD_CPU_IO

31

VDD_PLL3_IO

62

VDD_SRC_IO

52

VDD_SRC_IO

23

VDD_IO

38

VDD_SRC_IO

20

USB_0/FS_A

2

FS_B/TEST_MODE

7

REF_0/FS_C/TEST_

8

REF_1

1

CKPWRGD/PD#

11

NC

53

CPU_STOP#

54

PCI_STOP#

5

XTAL_IN

4

XTAL_OUT

13

PCI_1

14

PCI_2

15

PCI_3

16

PCI_4/SEL_LCDCL

17

PCIF_5/ITP_EN

18

VSS_PCI

3

VSS_REF

22

VSS_48

26

VSS_IO

69

VSS_CPU

30

VSS_PLL3

34

VSS_SRC

59

VSS_SRC

42

VSS_SRC

73

VSS

SLG8SP556VTR_QFN72_10X10

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

CPU_0

CPU_0#

CPU_1

CPU_1#

SRC_0/DOT_96

SRC_0#/DOT_96#

LCDCLK/27M

LCDCLK#/27M_SS

SRC_2

SRC_2#

SRC_3

SRC_3#

SRC_4

SRC_4#

SRC_6

SRC_6#

SRC_7

SRC_7#

SRC_8/CPU_ITP

SRC_8#/CPU_ITP#

SRC_9

SRC_9#

SRC_10

SRC_10#

SRC_11

SRC_11#

CLKREQ_3#

CLKREQ_4#

CLKREQ_6#

CLKREQ_7#

CLKREQ_9#

SLKREQ_10#

CLKREQ_11#

USB_1/CLKREQ_A#

2010/09/10 2010/08/19

1

C816

0.1U_0402_16V4Z

2

SDA

SCL

1

C823

0.1U_0402_16V4Z

2

CLK_SMBDATA

9

CLK_SMBCLK

10

CLK_CPU_BCLK

71

CLK_CPU_BCLK#

70

CLK_MCH_BCLK

68

CLK_MCH_BCLK#

67

CLK_MCH_DREFCLK

24

CLK_MCH_DREFCLK#

25

MCH_SSCDREFCLK

28

MCH_SSCDREFCLK#

29

CLK_MCH_3GPLL

32

CLK_MCH_3GPLL#

33

35

36

39

40

57

56

CLK_PCIE_WLAN1

61

CLK_PCIE_WLAN1#

60

64

63

CLK_PCIE_LAN

44

CLK_PCIE_LAN#

45

CLK_PCIE_ICH

50

CLK_PCIE_ICH#

51

CLK_PCIE_SATA

48

CLK_PCIE_SATA#

47

37

41

58

WLAN_CLKREQ1#

65

CLKREQ_LAN#

43

49

SATA_CLKREQ#

46

MCH_CLKREQ#

21

Compal Secret Data

1

C817

0.1U_0402_16V4Z

2

1

C824

0.1U_0402_16V4Z

2

Deciphered Date

2

CLK_SMBDATA <14,15>

CLK_SMBCLK <14,15>

CLK_CPU_BCLK <4>

CLK_CPU_BCLK# <4>

CLK_MCH_BCLK <7>

CLK_MCH_BCLK# <7>

CLK_MCH_DREFCLK <8>

CLK_MCH_DREFCLK# <8>

MCH_SSCDREFCLK <8>

MCH_SSCDREFCLK# <8>

CLK_MCH_3GPLL <8>

CLK_MCH_3GPLL# <8>

CLK_PCIE_WLAN1 <23>

CLK_PCIE_WLAN1# <23>

CLK_PCIE_LAN <24>

CLK_PCIE_LAN# <24>

CLK_PCIE_ICH <19>

CLK_PCIE_ICH# <19>

CLK_PCIE_SATA <18>

CLK_PCIE_SATA# <18>

WLAN_CLKREQ1# <23>

CLKREQ_LAN# <24>

SATA_CLKREQ# <19>

MCH_CLKREQ# <8>

2

ICH_SMBDATA<19,23>

+3VS

ICH_SMBCLK<19,23>

CPU

NB

NB(96MHz)

NB_SSC(100MHz)

MCH_PEGPLL

WLAN

LAN

ICH-DMIPCIE

ICH-SATA

1

+3VS

@

R669 0_0402_5%

1 2

2N7002DW-T/R7_SOT363-6

6 1

3

2N7002DW-T/R7_SOT363-6

R674 0_0402_5%

1 2

@

R670

2.2K_0402_5%

Q1A

2

5

Q1B

4

R671

2.2K_0402_5%

CLK_SMBDATA

CLK_SMBCLK

SRC PORT LIST

DEVICEPORT

SRC0

MCH_DREFCLK MCH_3GPLL

SRC2 SRC3 SRC4 SRC6 SRC7

PCIE_WLAN1 SRC8 SRC9

PCIE_LAN SRC10

PCIE_ICH

PCIE_SATA

SRC11

SATA_CLKREQ#

WLAN_CLKREQ1# MCH_CLKREQ# CLKREQ_LAN#

R693 10K_0402_5%R693 10K_0402_5%

R695 10K_0402_5%R695 10K_0402_5%

R698 10K_0402_5%R698 10K_0402_5%

R701 10K_0402_5%R701 10K_0402_5%

12

12 12 12

REQ PORT LIST

DEVICEPORT

REQ_3# REQ_4# REQ_6# REQ_7# REQ_9#

PCIE_WLAN1

PCIE_LAN REQ_10# REQ_11# REQ_A#

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Clock Generator CK505

PCIE_SATA

MCH_3GPLL

LA7011P

1

16 41Fri day, December 24, 2010

+3VS

1.0

5

4

3

2

1

09/16 Add C858 For ESD

Place closely pin C14

+3VS

1 2

R788 8.2K_0402_5%R788 8.2K_0402_5%

1 2

R789 8.2K_0402_5%R789 8.2K_0402_5%

D D

C C

1 2

R790 8.2K_0402_5%R790 8.2K_0402_5%

1 2

R791 8.2K_0402_5%R791 8.2K_0402_5%

1 2

R792 8.2K_0402_5%R792 8.2K_0402_5%

1 2

R793 8.2K_0402_5%R793 8.2K_0402_5%

1 2

R794 8.2K_0402_5%R794 8.2K_0402_5%

1 2

R795 8.2K_0402_5%R795 8.2K_0402_5%

+3VS

1 2

R796 8.2K_0402_5%R796 8.2K_0402_5%

1 2

R797 8.2K_0402_5%R797 8.2K_0402_5%

1 2

R798 8.2K_0402_5%R798 8.2K_0402_5%

1 2

R799 8.2K_0402_5%R799 8.2K_0402_5%

1 2

R800 8.2K_0402_5%R800 8.2K_0402_5%

1 2

R801 8.2K_0402_5%R801 8.2K_0402_5%

1 2

R802 8.2K_0402_5%R802 8.2K_0402_5%

1 2

R803 8.2K_0402_5%R803 8.2K_0402_5%

1 2

R805 8.2K_0402_5%R805 8.2K_0402_5%

1 2

R806 8.2K_0402_5%R806 8.2K_0402_5%

1 2

R807 8.2K_0402_5%R807 8.2K_0402_5%

1 2

R808 8.2K_0402_5%R808 8.2K_0402_5%

PCI_DEVSEL#

PCI_STOP#

PCI_TRDY#

PCI_FRAME#

PCI_PLOCK#

PCI_IRDY#

PCI_SERR#

PCI_PERR#

PCI_PIRQA#

PCI_PIRQB#

PCI_PIRQC#

PCI_PIRQD#

PCI_PIRQE#

PCI_PIRQF#

PCI_PIRQG#

PCI_PIRQH#

PCI_REQ0#

PCI_REQ1#

PCI_REQ2#

PCI_REQ3#

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

U9B

D11

AD0

C8

AD1

D9

AD2

E12

AD3

E9

AD4

C9

AD5

E10

AD6

B7

AD7

C7

AD8

C5

AD9

G11

AD10

F8

AD11

F11

AD12

E7

AD13

A3

AD14

D2

AD15

F10

AD16

D5

AD17

D10

AD18

B3

AD19

F7

AD20

C3

AD21

F3

AD22

F4

AD23

C1

AD24

G7

AD25

H7

AD26

D1

AD27

G5

AD28

H6

AD29

G1

AD30

H3

AD31

J5

PIRQA#

E1

PIRQB#

J6

PIRQC#

C4

PIRQD#

ICH9-M ES_FCBGA676

PCI

REQ1#/GPIO50

GNT1#/GPIO51

REQ2#/GPIO52

GNT2#/GPIO53

REQ3#/GPIO54

GNT3#/GPIO55

DEVSEL#

Interrupt I/F

PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

REQ0# GNT0#

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PAR

PCIRST#

PERR#

PLOCK#

SERR# STOP#

TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PCI_REQ0#

F1

PCI_GNT0#

G4

PCI_REQ1#

B6 A7

PCI_REQ2#

F13 F12

PCI_REQ3#

E6

PCI_GNT3#

F6

D8 B4 D6 A5

PCI_IRDY#

D3 E3

PCI_RST#

R1

PCI_DEVSEL#

C6

PCI_PERR#

E4

PCI_PLOCK#

C2

PCI_SERR#

J4

PCI_STOP#

A4

PCI_TRDY#

F5

PCI_FRAME#

D7

PLT_RST#

C14

CLK_PCI_ICH

D4

PCI_PME#

R2

1 2

R804 10K_0402_5%@R804 10K_0402_5%@

PCI_PIRQE#

H4

PCI_PIRQF#

K6

PCI_PIRQG#

F2

PCI_PIRQH#

G2

T107T107

T108T108

CLK_PCI_ICH <16> PCI_PME# <27>

+3VALW

PCI_RST#

PLT_RST#

12

R813

R813 100K_0402_5%

100K_0402_5%

12

R814

R814 100K_0402_5%

100K_0402_5%

PLT_RST#

1

C858

0.1U_0402_16V4Z

2

Place closely pin D4

CLK_PCI_ICH

1 2

1

2

PCI_RST# <27>

PLT_RST# <8,23,24>

R811

R811 0_0402_5%

0_0402_5%

C869

C869 18P_0402_50V8J

18P_0402_50V8J

12

SPI@

R809

R809 1K_0402_5%

1K_0402_5%

B B

1 2

R812 1K_0402_5%@R812 1K_0402_5%@

PCI_GNT3#

SB_SPI_CS#1<19>

SB_SPI_CS#1PCI_GNT0#

12

@

R810

R810 1K_0402_5%

1K_0402_5%

Boot BIOS Strap

PCI_GNT#0 SPI_CS#1 Boot BIOS Loaction

A16 Swap Override Strap

PCI_GNT#3

A A

5

Low= A16 swap override Enable High= Default*

4

0

1 1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1 SPI

01

PCI

LPC*

Compal Secret Data

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

ICH9M(1/4)-PCI

LA7011P

1

17 41Fri day, December 24, 2010

1.0

5

D D

C C

+RTCVCC

R934 330K_0402_1%R934 330K_0402_1%

1 2

R936 1M_0402_5%R936 1M_0402_5%

1 2

R820 330K_0402_1%R820 330K_0402_1%

1 2

LAN100_SLP

SM_INTRUDER#

ICH_INTVRMEN

+RTCVCC

2

1

R823

1 2

100_0603_1%

C872

0.1U_0402_16V4Z

HDD_LED#<32>

+RTCBATT

HDD_LED# SATA_LED#

Change Y2 from SJ100001U00 to SJ100003300.

32.768KHZ_12.5PF_Q13MC14610002

+RTCVCC

1 2

R822 20K_0402_5%R822 20K_0402_5%

close to RAM door

CLRP1

@

2 1

2MM

1 2

C873 1U_0603_10V4ZC873 1U_0603_10V4Z

HDA_BITCLK_CODEC<26>

HDA_SYNC_CODEC<26>

HDA_RST_CODEC#<26>

HDA_SDIN0<26>

HDA_SDOUT_CODEC<26>

D30

2 1

RB751V_SOD323

1 2

R92 0_0402_5%R92 0_0402_5%

10/01 Danson

Change D30 from SC1H751H010 to SCS00000Z00 .

Add R92 from SATA_LED# to HDD_ LED#.

B B

4

1 2

C870 15P_0402_50V8JC870 15P_0402_50V8J

C871 15P_0402_50V8JC871 15P_0402_50V8J

2

3

1 2

+RTCVCC

NC

Y5

1

OSC

4

OSC

R180 20K_0402_5%R180 20K_0402_5%

C248 1U_0603_10V6KC248 1U_0603_10V6K

9/14 Add R937 by Danson.

+1.5VS

R829 33_0402_5%R829 33_0402_5%

1 2

R831 33_0402_5%R831 33_0402_5%

1 2

R832 33_0402_5%R832 33_0402_5%

1 2

R834 33_0402_5%R834 33_0402_5%

+3VS

@

1 2

R835 10K_0402_5%R835 10K_0402_5%

HDD

ODD

1 2

R365

@R365

@

10K_0603_5%

1 2

R828

24.9_0402_1%

SATA_DTX_C_IRX_N0<28> SATA_DTX_C_IRX_P0<28> SATA_ITX_C_DRX_N0<28> SATA_ITX_C_DRX_P0<28>

SATA_DTX_C_IRX_N1<32> SATA_DTX_C_IRX_P1<32> SATA_ITX_C_DRX_N1<32> SATA_ITX_C_DRX_P1<32>

12

R819

R819 10M_0402_5%

10M_0402_5%

+3VALW

1 2

ICH_RTCX1

ICH_RTCX2

ICH_RTCRST# ICH_SRTCRST# SM_INTRUDER#

12

R937

R937 10K_0402_5%

10K_0402_5%

GLAN_COMP

HDA_BITCLK_ICHHDA_BITCLK_ICH HDA_SYNC_R

HDA_RST_R#

HDA_SDOUT_R

ICH_INTVRMEN LAN100_SLP

T111T111

U9A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD_0

D12

LAN_TXD_1

E13

LAN_TXD_2

B10

GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9-M ES_FCBGA676

3

RTC

LPCCPU

LAN / GLAN

IHDA

SATA

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

INIT# INTR

RCIN#

SMI#

STPCLK#

THRMTRIP#

TP12

SATA4RXN

SATA4RXP SATA4TXN SATA4TXP

SATA5RXN

SATA5RXP SATA5TXN SATA5TXP

SATA_CLKN

SATA_CLKP

SATARBIAS#

SATARBIAS

2

R933

10K_0402_5%

56_0402_5%

12

R826

R826 56_0402_5%

56_0402_5%

Place closely pin AG26

C641

R933

R935

R821

R824

GATEA20

KB_RST#

LPC_AD0

K5

LPC_AD1

K4

LPC_AD2

L6

LPC_AD3

K2

LPC_FRAME#

K3

J3 J1

GATEA20

N7

H_A20M#

AJ27

AJ25

H_DPSLP#

AE23

H_FERR#_S

AJ26

H_PWRGOOD

AD22

H_IGNNE#

AF25

H_INIT#

AE22

H_INTR

AG25

KB_RST#

L3

H_NMI

AF23

NMI

AF24

AH27

AG26

AG27

AH11 AJ11 AG12 AF12

AH9 AJ9 AE10 AF10

AH18 AJ18 AJ7 AH7

H_SMI#

H_STPCLK#

THRMTRIP_ICH#

R836 1K_0402_5%@R836 1K_0402_5%@

1 2

R837 1K_0402_5%@R837 1K_0402_5%@

1 2

CLK_PCIE_SATA# CLK_PCIE_SATA

SATARBIAS

LPC_AD[0..3] <27>

LPC_FRAME# <27>

GATEA20 <27> H_A20M# <4>

R825 0_0402_5%R825 0_0402_5%

R838 24.9_0402_1%R838 24.9_0402_1%

12

R827 56_0402_5%R827 56_0402_5%

1 2

H_PWRGOOD <5>

H_IGNNE# <4>

H_INIT# <4> H_INTR <4>

KB_RST# <27>

H_NMI <4> H_SMI# <4>

H_STPCLK# <4>

R833 54.9_0402_1%R833 54.9_0402_1%

1 2

CLK_PCIE_SATA# <16> CLK_PCIE_SATA <16>

1 2

H_DPRSTP#H_DPRSTP_R#

H_DPRSTP# <5,8,40> H_DPSLP# <5>

+1.05VS

R833 need to place within 2" o f ICH9M

12

R830 must be place within 2" o f R833 w/o stub.

R830

R830 56_0402_5%

56_0402_5%

H_THERMTRIP#

10mils width less than 500mils

H_DPRSTP#

H_DPSLP#

+1.05VS

H_THERMTRIP# <4,8>

12

H_FERR# <4>

THRMTRIP_ICH#

1

100P_0402_50V8J

2

+3VS

+1.05VS

@R821

@

@R824

@

1

Need check

+3VS

R839

R839 1K_0402_5%

1K_0402_5%

@

HDA_SDOUT_R

A A

5

4

1 2

XOR Chain Entrance Strap

HDA_SDOUTICH_TP3 Description

0

1

Flash Descriptor Security Override Strap

GPIO33

Low= Descriptor Security override High= Default* (Internal pull-up)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

RSVD

0

Enter XOR Chain

1

Normal Operation

0

Set PCIE port config bit 1

11

Compal Secret Data

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

2

SATA PORT LIST

DEVICEPORT

HDD

0

ODD

1 4 5

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

ICH9M(2/4)-LAN,ATA,LPC,RTC

LA7011P

1

18 41Fri day, December 24, 2010

1.0

5

+3VS

R840 10K_0402_5%R840 10K_0402_5%

1 2

R841 8.2K_0402_5%R841 8.2K_0402_5%

1 2

R842 10K_0402_5%@R842 10K_0402_5%@

1 2

R843 8.2K_0402_5%R843 8.2K_0402_5%

1 2

R848 10K_0402_5%R848 10K_0402_5%

1 2

D D

R851 8.2K_0402_5%@R851 8.2K_0402_5%@

1 2

R858 10K_0402_5%@R858 10K_0402_5%@

1 2

R852 10K_0402_5%R852 10K_0402_5%

1 2

+3VALW

R856 10K_0402_5%R856 10K_0402_5%

1 2

R861 10K_0402_5%@R861 10K_0402_5%@

1 2

R864 10K_0402_5%R864 10K_0402_5%

1 2

R866 10K_0402_5%R866 10K_0402_5%

1 2

R867 1K_0402_5%R867 1K_0402_5%

1 2

R868 8.2K_0402_5%R868 8.2K_0402_5%

1 2

R870 10K_0402_5%R870 10K_0402_5%

1 2

R872 10K_0402_5%R872 10K_0402_5%

1 2

R915 10K_0402_5%R915 10K_0402_5%

1 2

+3VS

R916 10K_0402_5%R916 10K_0402_5%

1 2

R876 10K_0402_5%R876 10K_0402_5%

1 2

R878 10K_0402_5%R878 10K_0402_5%

1 2

R879 10K_0402_5%@R879 10K_0402_5%@

C C

B B

A A

1 2

R880 10K_0402_5%@R880 10K_0402_5%@

1 2

R882 10K_0402_5%R882 10K_0402_5%

1 2

R883 10K_0402_5%R883 10K_0402_5%

1 2

+3VS

R888 10K_0402_5%@R888 10K_0402_5%@

1 2

R889 100K_0402_5%@R889 100K_0402_5%@

1 2

R890 100K_0402_5%@R890 100K_0402_5%@

1 2

R891 1K_0402_5%@R891 1K_0402_5%@

1 2

+3VALW

RP1

45 36 27 18

10K_1206_8P4R_5%

RP2

45 36 27 18

10K_1206_8P4R_5%

RP3

45 36 27 18

10K_1206_8P4R_5%

1

SPI@

C1171

0.1U_0402_16V4Z

Change U33 footprint from WIESO_G6179-100000_8P to MX25L1606EM2I-12G_SO8 0920 Change Value from MX25L8005M2C-15G SOP 8P to MX25L1606EM2I-12G_SO8 0920

2

USB_OC#6 USB_OC#1 USB_OC#2 USB_OC#4

USB_OC#5 USB_OC#7 USB_OC#9 USB_OC#0

USB_OC#8 USB_OC#3 USB_OC#10 USB_OC#11

+3VS

20mils

ICH_SPI_CS0#

ICH_SPI_CLK_1

SERIRQ

PCI_CLKRUN#

GPIO38

EC_THERM#

OCP#

PM_BMBUSY#

GPIO39

GPIO48

LINKALERT#

CL_RST#

XDP_DBRESET#

ICH_RI#

ICH_PCIE_WAKE#

ICH_LOW_BAT#

LID_OUT#

WOL_EN

GPIO14

GPIO6

GPIO7

GPIO13

GPIO17

GPIO18

GPIO20

GPIO22

SB_SPKR

GPIO57

DPRSLPVR

ICH_RSVD

CLK_ENABLE#<40>

5

2

G

U33

SPI@U33

SPI@

8

VCC

VSS

3

W

7

HOLD

1

S

6

C

5

Q

D

MX25L1606EM2I-12G_SO8

+3VALW

12

H_STP_PCI#<16> H_STP_CPU#<16>

R849

R849 10K_0402_5%

10K_0402_5%

+3VS

@

R853

R853 10K_0402_5%

10K_0402_5%

1 2

12

R847

R847 10K_0402_5%

10K_0402_5%

Place closely pin G19

XDP_DBRESET#

1

C833

0.1U_0402_16V4Z

2

09/16 Add C833 For ESD

Place closely pin D21

VRMPWRGD

1

C860

C860 1000P_0402_50V7K

1000P_0402_50V7K

2

11/5 Add C860 For Noise

Change Lan from Port6 to Port 1 for power consumption.

PCIE_IRX_PTX_N1<24> PCIE_IRX_PTX_P1<24>

LAN

PCIE_ITX_C_PRX_N1<24> PCIE_ITX_C_PRX_P1<24>

WLAN

+3VS

@

R898

R898 330_0402_5%

330_0402_5%

1 2

R899 0_0402_5%@R899 0_0402_5%@

1 2

13

D

@

Q9

Q9 RHU002N06_SOT323

RHU002N06_SOT323

S

VRMPWRGD

SPI Flash (16Mb*1)

FOR SB 16M SPI ROM

4

SPI@

ICH_SPI_MISO_1 ICH_SPI_MISOICH_SPI_MOSI_1

2

SPI@

12

R917 0_0402_5%

4

ICH_SMBDATA<16,23>

12

@

R859

R859 10K_0402_5%

10K_0402_5%

R862 0_0402_5%R862 0_0402_5%

1 2

VGATE

ODD_DA#<27,32>

PCIE_RXN3<23>

PCIE_RXP3<23> PCIE_TXN3<23> PCIE_TXP3<23>

ICH_SPI_CLK_1 ICH_SPI_CS0#

SB_SPI_CS#1<17>

ICH_SPI_MOSI_1

USB_OC#0<29>

USB_OC#1_7<29>

4

+3VALW

ICH_SMBCLK<16,23>

XDP_DBRESET#<4>

PM_BMBUSY#<8>

EC_LID_OUT#<27>

ICH_PCIE_WAKE#<23,24>

SERIRQ<27>

EC_THERM#<27>

R869 0_0402_5%R869 0_0402_5%

1 2

R927

@R927

@

0_0402_5%

EC_SMI#<27> EC_SCI#<27>

SATA_CLKREQ#<16>

ODD_EN<32>

SB_SPKR<26>

MCH_ICH_SYNC#<8>

C891 0.1U_0402_10V7KC891 0.1U_0402_10V7K C892 0.1U_0402_10V7KC892 0.1U_0402_10V7K

C884 0.1U_0402_10V7KC884 0.1U_0402_10V7K C885 0.1U_0402_10V7KC885 0.1U_0402_10V7K

R919 33_0402_5%SPI@R919 33_0402_5%SPI@

1 2

R920 0_0402_5%SPI @R920 0_0402_5%SPI@

R422 0_0402_5%SPI @R422 0_0402_5%SPI@

12

1 2

USB_OC#0 USB_OC#1

R900 22.6_0402_1%R900 22.6_0402_1%

1 2

Within 500 mils

3

R844

2.2K_0402_5%

LINKALERT# ME__EC_CLK1 ME__EC_DATA1

ICH_RI#

XDP_DBRESET#

PM_BMBUSY#

1 2

H_STP_PCI# R_STP_CPU#

PCI_CLKRUN#

ICH_PCIE_WAKE# SERIRQ EC_THERM#

T96T96

OCP#

GPIO6

12

GPIO7 EC_SMI# EC_SCI# GPIO13 GPIO17 GPIO18 GPIO20 GPIO22

T98T98

GPIO38 GPIO39 GPIO48 GPIO49 GPIO57

SB_SPKR MCH_ICH_SYNC#

ICH_RSVD

T99T99 T100T100 T101T101

12

R845

2.2K_0402_5%

LID_OUT#

VRMPWRGD

SST_CTL

SATA_CLKREQ#

PCIE_IRX_PTX_N1 PCIE_IRX_PTX_P1 PCIE_ITX_PRX_N1 PCIE_ITX_PRX_P1

PCIE_RXN3 PCIE_RXP3 PCIE_C_TXN3 PCIE_C_TXP3

ICH_SPI_CLK ICH_SPI_CS0#_R SB_SPI_CS#1

ICH_SPI_MOSI ICH_SPI_MISO

USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11

USBRBIAS

U9C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

TP11

AG19

GPIO1

AH21

GPIO6

AG21

GPIO7

A21

GPIO8

C12

GPIO12

C21

GPIO13

AE18

GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

TP8

AJ20

TP9

AJ21

TP10

ICH9-M ES_FCBGA676

U9D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9-M ES_FCBGA676

SPI

USB

SMB

PCI - Express

clocks

SYS / GPIOGPIOMISC

Controller Link

DMI0RXN DMI0RXP DMI0TXN DMI0TXP

DMI1RXN DMI1RXP DMI1TXN DMI1TXP

DMI2RXN DMI2RXP DMI2TXN DMI2TXP

DMI3RXN DMI3RXP DMI3TXN DMI3TXP

DMI_CLKN DMI_CLKP

DMI_ZCOMP

Direct Media I nterface

DMI_IRCOMP

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

12

R855 0_0402_5%R855 0_0402_5%

Change U26 P/N from SA00000XT00 to SA000041N00 0915

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

CLK14 CLK48

SUSCLK

SLP_S3# SLP_S4# SLP_S5#

S4_STATE#/GPIO26

PWROK

DPRSLPVR/GPIO16

BATLOW#

PWRBTN#

LAN_RST#

RSMRST#

Power MGT

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0 CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST0# CL_RST1#

MEM_LED/GPIO24

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

WOL_EN/GPIO9

10/01

Change D31 from SC1H751H010 to SCS00000Z00 .

DMI_RXN0

V27

DMI_RXP0

V26

DMI_TXN0

U29

DMI_TXP0

U28

DMI_RXN1

Y27

DMI_RXP1

Y26

DMI_TXN1

W29

DMI_TXP1

W28

DMI_RXN2

AB27

DMI_RXP2

AB26

DMI_TXN2

AA29

DMI_TXP2

AA28

DMI_RXN3

AD27

DMI_RXP3

AD26

DMI_TXN3

AC29

DMI_TXP3

AC28

CLK_PCIE_ICH#

T26

CLK_PCIE_ICH

T25

AF29 AF28

USB20_N0

AC5

USB20_P0

AC4

USB20_N1

AD3

USB20_P1

AD2

USB20_N2

AC1

USB20_P2

AC2 AA5 AA4

USB20_N4

AB2

USB20_P4

AB3

USB20_N5

AA1

USB20_P5

AA2

USB20_N6

W5

USB20_P6

W4

USB20_N7

Y3

USB20_P7

Y2 W1 W2 V2 V3 U5 U4 U1 U2

2

09/10 Add for Project ID

+3VS

R846

8.2K_0402_5%

AH23 AF19 AE21 AD20

H1 AF3

P1

C16 E16 G17

C10

G20

M2

B13

R3

D20

D22

R5

R6

B16

F24 B19

F22 C19

C25 A19

F21 D18

A16 C18 C11 C20

DMI_IRCOMP

2010/09/10 2010/08/19

8.2K_0402_5%

1 2

PROJECT_ID1 PROJECT_ID2

CLK_14M_ICH CLK_48M_ICH

ICH_SUSCLK

SLP_S3# SLP_S4# SLP_S5#

S4_STATE#

ICH_POK

R865 499_0402_1%R 865 499_0402_1%

ICH_LOW_BAT#

PBTN_OUT#

CK_PWRGD_R CK_PWRGD

M_PWROK

CL_VREF0_ICH CL_VREF1_ICH

CL_RST#

GPIO14

WOL_EN

DMI_RXN0 <8> DMI_RXP0 <8> DMI_TXN0 <8> DMI_TXP0 <8>

DMI_RXN1 <8> DMI_RXP1 <8> DMI_TXN1 <8> DMI_TXP1 <8>

DMI_RXN2 <8> DMI_RXP2 <8> DMI_TXN2 <8> DMI_TXP2 <8>

DMI_RXN3 <8> DMI_RXP3 <8> DMI_TXN3 <8> DMI_TXP3 <8>

CLK_PCIE_ICH# <16> CLK_PCIE_ICH <16>

R897 24.9_0402_1%R897 24.9_0402_1%

USB20_N0 <29> USB20_P0 <29> USB20_N1 <29> USB20_P1 <29> USB20_N2 <22> USB20_P2 <22>

USB20_N4 <30> USB20_P4 <30> USB20_N5 <23> USB20_P5 <23> USB20_N6 <30> USB20_P6 <30> USB20_N7 <29> USB20_P7 <29>

1 2

R873 0_0402_5%R873 0_0402_5%

R874 0_0402_5%R874 0_0402_5%

+3VALW

R886

1 2

Card Reader

Compal Secret Data

CLK_14M_ICH <16> CLK_48M_ICH <16>

T95T95

T97T97

RIGHT USB

LEFT USB

CMOS

WLAN

BT

LEFT USB

Deciphered Date

SLP_S3# <27> SLP_S4# <27> SLP_S5# <27>

DPRSLPVR

PBTN_OUT# <27>

1 2

CL_CLK0 <8>

CL_DATA0 <8>

CL_RST# <8>

12

10K_0402_5%@

Within 500 mils

+1.5VS

2

PROJECT_ID1

PROJECT_ID2

EC_RSMRST#REC_RSMRST#R

D31 RB751V_SOD323

@

2 1

R887 0_0402_5%@R887 0_0402_5%@

10K_0402_5% 20@

R943

12

10K_0402_5% 10@

R1150

12

10K_0402_5% 20@

R1159

12

10K_0402_5% 10@

R1052

12

+3VALW

12

@

R854

R854 10K_0402_5%

10K_0402_5%

R860 100_0402_5%@R860 100_0402_5%@

1 2

DPRSLPVR <8,40>

M_PWROK <8> VGATE <8,40>

ACIN

12

ICH_POK <8,27>

R871 10K_0402_5%R871 10K_0402_5%

1 2

ACIN <27,36>

RSMRST circuit

SPOK<35,37>

0_0402_5%

EC_RSMRST#R

BAV99DW-7_SOT363

@

R895

2.2K_0402_5%

1 2

4.7K_0402_5%

PCIE PORT LIST

DEVICEPORT

LAN

1 2

WLAN

3 4 5 6

1

Place closely pin B2 Place closely pin AC1

CLK_14M_ICHCLK_48M_ICH

M_PWROK

1

C880

C880 1000P_0402_50V7K

1000P_0402_50V7K

2

12

R857

R857 10_0402_5%

10_0402_5%

@

1

C878

C878 10P_0402_50V8J

10P_0402_50V8J

@

2

+3VS

1 2

CK_PWRGD <16>

1

C881

0.1U_0402_16V4Z

2

1

C882

0.1U_0402_16V4Z@

2

12

R850

R850 22_0402_5%

22_0402_5%

@

1

C879

C879 10P_0402_50V8J

10P_0402_50V8J

2

@

M_PWROK

R863

10K_0402_5%

R875 3.24K_0402_1%R875 3.24K_0402_1%

1 2

12

R877

R877 453_0402_1%

453_0402_1%

R881 3.24K_0402_1%@R881 3.24K_0402_1%@

1 2

12

R885

@ R885

@

453_0402_1%

Change Q8 from SB000009S80 to SB000006780

R893

@R893

@

R892

@R892

12

D32B

R896

@

12

0_0402_5%

Q8

123

C

E

MMBT3906_SOT23-3

1 2

B

R894 4.7K_0402_5%R894 4.7K_0402_5%

1

2

4

5

D32A

D32A BAV99DW-7_SOT363

BAV99DW-7_SOT363

6

3

EC_RSMRST# <27>

+3VALW

USB PORT LIST

DEVICEPORT

RIGHT SIDE0 LEFT SIDE

1

CMOS

2 3 4

CARD READER

5

WIRELESS BT6

7

LEFT SIDE 8 9 10 11

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

ICH9M(3/4)-USB,GPIO,PCIE

LA7011P

1

19 41Friday, December 24, 2010

+3VS

+3VALW

1.0

5

646mA

1

C912

2

2.2U_0603_6.3V4Z

1U_0603_10V4Z

+1.5VS

1U_0603_10V4Z

1

C801

2

C972

12

23mA

1

C805

2

10U_0805_10V4Z

20 mils

ICH_V5REF_RUN

2mA

ICH_V5REF_SUS

+1.5VS_PCIE_ICH

47mA

+1.5VS_SATAPLL_ICH

+1.5VS

1

C917

2

+1.5VS

1

C921

2

1342mA

1

C924

2

11mA

VCC_LAN1_05_INT_ICH

19mA

+VCC_GLANPLL_ICH

1

2.2U_0603_6.3V4Z

2

80mA

+3VS

1mA

+RTCVCC

0.1U_0402_16V4Z

+5VS +3VS

D D

R901

100_0402_5%

+3VALW+5VALW

R903

100_0402_5%

C C

+1.5VS

B B

+1.5VS

0.1U_0402_16V4Z

A A

+1.5VS

R904

0_0805_5%

1 2

220U_6.3V_M

OSCON

R907

1 2

CHB1608U301_0603

C800

+3VS

1

C802

2

R911

1 2

CHB1608U301_0603

1

C898

2

D33

D33 RB751V_SOD323

RB751V_SOD323

ICH_V5REF_RUN

20 mils

C893

1U_0603_10V4Z

D34

D34 RB751V_SOD323

RB751V_SOD323

ICH_V5REF_SUS

20 mils

C905

1U_0603_10V4Z

C898

0.1U_0402_16V4Z

10/01 Danson

Change D33 and D 34 from SC1H751H010 to S CS00000Z00 .

C894

21

1

2

21

1

2

40 mils

1

+

C910

C908

2

10U_0805_10V4Z

1

C918

2

1U_0603_10V4Z

+1.5VS

1

2

close to AC7

+1.5VS

(10UF*1, 2.2UF*1)

4.7U_0805_10V4Z

1

C806

2

5

10U_0805_10V4Z

1

C911

2

1

C919

2

10U_0805_10V4Z

0.1U_0402_16V4Z

Follow KHLBX and CRB.

CHB1608U301_0603

1 2

R910

C804

U9F

A23

VCCRTC

A6

V5REF

AE1

V5REF_SUS

AA24

VCC1_5_B[01]

AA25

VCC1_5_B[02]

AB24

VCC1_5_B[03]

AB25

VCC1_5_B[04]

AC24

VCC1_5_B[05]

AC25

VCC1_5_B[06]

AD24

VCC1_5_B[07]

AD25

VCC1_5_B[08]

AE25

VCC1_5_B[09]

AE26

VCC1_5_B[10]

AE27

VCC1_5_B[11]

AE28

VCC1_5_B[12]

AE29

VCC1_5_B[13]

F25

VCC1_5_B[14]

G25

VCC1_5_B[15]

H24

VCC1_5_B[16]

H25

VCC1_5_B[17]

J24

VCC1_5_B[18]

J25

VCC1_5_B[19]

K24

VCC1_5_B[20]

K25

VCC1_5_B[21]

L23

VCC1_5_B[22]

L24

VCC1_5_B[23]

L25

VCC1_5_B[24]

M24

VCC1_5_B[25]

M25

VCC1_5_B[26]

N23

VCC1_5_B[27]

N24

VCC1_5_B[28]

N25

VCC1_5_B[29]

P24

VCC1_5_B[30]

P25

VCC1_5_B[31]

R24

VCC1_5_B[32]

R25

VCC1_5_B[33]

R26

VCC1_5_B[34]

R27

VCC1_5_B[35]

T24

VCC1_5_B[36]

T27

VCC1_5_B[37]

T28

VCC1_5_B[38]

T29

VCC1_5_B[39]

U24

VCC1_5_B[40]

U25

VCC1_5_B[41]

V24

VCC1_5_B[42]

V25

VCC1_5_B[43]

U23

VCC1_5_B[44]

W24

VCC1_5_B[45]

W25

VCC1_5_B[46]

K23

VCC1_5_B[47]

Y24

VCC1_5_B[48]

Y25

VCC1_5_B[49]

AJ19

VCCSATAPLL

AC16

VCC1_5_A[01]

AD15

VCC1_5_A[02]

AD16

VCC1_5_A[03]

AE15

VCC1_5_A[04]

AF15

VCC1_5_A[05]

AG15

VCC1_5_A[06]

AH15

VCC1_5_A[07]

AJ15

VCC1_5_A[08]

AC11

VCC1_5_A[09]

AD11

VCC1_5_A[10]

AE11

VCC1_5_A[11]

AF11

VCC1_5_A[12]

AG10

VCC1_5_A[13]

AG11

VCC1_5_A[14]

AH10

VCC1_5_A[15]

AJ10

VCC1_5_A[16]

AC9

VCC1_5_A[17]

AC18

VCC1_5_A[18]

AC19

VCC1_5_A[19]

AC21

VCC1_5_A[20]

G10

VCC1_5_A[21]

G9

VCC1_5_A[22]

AC12

VCC1_5_A[23]

AC13

VCC1_5_A[24]

AC14

VCC1_5_A[25]

AJ5

VCCUSBPLL

AA7

VCC1_5_A[26]

AB6

VCC1_5_A[27]

AB7

VCC1_5_A[28]

AC6

VCC1_5_A[29]

AC7

VCC1_5_A[30]

A10

VCCLAN1_05[1]

A11

VCCLAN1_05[2]

A12

VCCLAN3_3[1]

B12

VCCLAN3_3[2]

A27

VCCGLANPLL

D28

VCCGLAN1_5[1]

D29

VCCGLAN1_5[2]

E26

VCCGLAN1_5[3]

E27

VCCGLAN1_5[4]

A26

VCCGLAN3_3

ICH9-M ES_FCBGA676

4

VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16]

CORE

VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24]

VCCA3GP

VCC1_05[25] VCC1_05[26]

VCCDMIPLL

VCC_DMI[1] VCC_DMI[2]

V_CPU_IO[1] V_CPU_IO[2]

VCC3_3[01] VCC3_3[02] VCC3_3[07]

VCC3_3[03] VCC3_3[04] VCC3_3[05] VCC3_3[06]

VCCP_CORE

VCC3_3[08] VCC3_3[09] VCC3_3[10] VCC3_3[11] VCC3_3[12]

PCI

VCC3_3[13] VCC3_3[14]

VCCHDA

VCCSUSHDA

VCCSUS1_05[1] VCCSUS1_05[2]

ARX

ATX

ATXARX

4

VCCPSUS

VCCPUSB

USB CORE

GLAN POWER

VCCSUS1_5[1]

VCCSUS1_5[2]

VCCSUS3_3[01] VCCSUS3_3[02] VCCSUS3_3[03] VCCSUS3_3[04]

VCCSUS3_3[05]

VCCSUS3_3[06] VCCSUS3_3[07] VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20]

VCCCL1_05

VCCCL1_5

VCCCL3_3[1] VCCCL3_3[2]

+1.05VS

A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

23mA

+1.5VS_DMIPLL_ICH

R29

48mA

W23 Y23

2mA

AB23 AC23

AG29 AJ6 AC10

AD19 AF20 AG24 AC20

B9 F9 G3 G6 J2 J7 K7

11mA

AJ4

11mA

AJ3

TP_VCCSUS1_05_ICH_1

AC8

TP_VCCSUS1_05_ICH_2

F17

VCCSUS1_5_ICH_1

AD8

VCCSUS1_5_ICH_2

F18

A18 D16 D17 E22

AF1

T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7

VCCCL1_05_ICH

G22

+VCCCL1_5_INT_ICH

G23

19mA

A24

+3VS

B24

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

0.1U_0402_16V4Z

1

C895

2

+3VS

0.1U_0402_16V4Z

1

C907

2

+VCC_HDA_ICH

+VCCSUS_HDA_ICH

Follow KHLBX and CRB.

212mA

0.1U_0402_16V4Z

+3VALW

1

2

1634mA

1

C899 0.1U_0402_16V4ZC899 0.1U_0402_16V4Z

2

0.01U_0402_16V7K

1

C896

C897 10U_0805_6.3V6MC897 10U_0805_6.3V6M

2

C900 10U_0805_10V4ZC900 10U _0805_10V4Z

308mA

1

C909

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

T102T102 T103T103

1

R908

C971

0_0402_5%

0.1U_0402_16V4Z

2

+3VALW

1

C922

C923

0.1U_0402_16V4Z

2

C799

4.7U_0603_6.3V6K

1

C803

C803 1U_0603_10V4Z@

1U_0603_10V4Z@

2

Follow KHLBX and CRB.

3

2

0.1U_0402_16V4Z

C1168

C1169

1

2

R902

1 2

CHB1608U301_0603

1

2

+1.05VS

1

2

+3VS

1

C906

0.1U_0402_16V4Z

2

1

C916

2

12

@R908

@

2010/09/10 2010/08/19

(SATA)

1

C913

0.1U_0402_16V4Z

2

1 2

1

C920

4.7U_0603_6.3V6M

2

1

C970

0.1U_0402_16V4Z

2

+1.5VS

+3VS

(DMI)

1

C901

0.1U_0402_16V4Z

2

+3VS

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z C915

C915

2

+3VALW

R909

R909 0_0402_5%

0_0402_5%

Compal Secret Data

Deciphered Date

+1.05VS

4.7U_0603_6.3V6M

1

C914

0.1U_0402_16V4Z

2

1

2

0.1U_0402_16V4Z

C902

0_0402_5%

R905

2

0.1U_0402_16V4Z

C903

1

2

+1.5VS+3VS

1 2

C904

1

2

1 2

R906

@R906

@

0_0402_5%

1

U9E

AA26

VSS[001]

AA27

VSS[002]

AA3

VSS[003]

AA6

VSS[004]

AB1

VSS[005]

AA23

VSS[006]

AB28

VSS[007]

AB29

VSS[008]

AB4

VSS[009]

AB5

VSS[010]

AC17

VSS[011]

AC26

VSS[012]

AC27

VSS[013]

AC3

VSS[014]

AD1

VSS[015]

AD10

VSS[016]

AD12

VSS[017]

AD13

VSS[018]

AD14

VSS[019]

AD17

VSS[020]

AD18

VSS[021]

AD21

VSS[022]

AD28

VSS[023]

AD29

VSS[024]

AD4

VSS[025]

AD5

VSS[026]

AD6

VSS[027]

AD7

VSS[028]

AD9

VSS[029]

AE12

VSS[030]

AE13

VSS[031]

AE14

VSS[032]

AE16

VSS[033]

AE17

VSS[034]

AE2

VSS[035]

AE20

VSS[036]

AE24

VSS[037]

AE3

VSS[038]

AE4

VSS[039]

AE6

VSS[040]

AE9

VSS[041]

AF13

VSS[042]

AF16

VSS[043]

AF18

VSS[044]

AF22

VSS[045]

AH26

VSS[046]

AF26

VSS[047]

AF27

VSS[048]

AF5

VSS[049]

AF7

VSS[050]

AF9

VSS[051]

AG13

VSS[052]

AG16

VSS[053]

AG18

VSS[054]

AG20

VSS[055]

AG23

VSS[056]

AG3

VSS[057]

AG6

VSS[058]

AG9

VSS[059]

AH12

VSS[060]

AH14

VSS[061]

AH17

VSS[062]

AH19

VSS[063]

AH2

VSS[064]

AH22

VSS[065]

AH25

VSS[066]

AH28

VSS[067]

AH5

VSS[068]

AH8

VSS[069]

AJ12

VSS[070]

AJ14

VSS[071]

AJ17

VSS[072]

AJ8

VSS[073]

B11

VSS[074]

B14

VSS[075]

B17

VSS[076]

B2

VSS[077]

B20

VSS[078]

B23

VSS[079]

B5

VSS[080]

B8

VSS[081]

C26

VSS[082]

C27

VSS[083]

E11

VSS[084]

E14

VSS[085]

E18

VSS[086]

E2

VSS[087]

E21

VSS[088]

E24

VSS[089]

E5

VSS[090]

E8

VSS[091]

F16

VSS[092]

F28

VSS[093]

F29

VSS[094]

G12

VSS[095]

G14

VSS[096]

G18

VSS[097]

G21

VSS[098]

G24

VSS[099]

G26

VSS[100]

G27

VSS[101]

G8

VSS[102]

H2

VSS[103]

H23

VSS[104]

H28

VSS[105]

H29

VSS[106]

ICH9-M ES_FCBGA676

Compal Electronics, Inc.

Title

ICH9M(4/4)-POWER&GND

Size Document Number Rev

Date: Sheet of

Date: Sheet

ICH9M(4/4)-POWER&GND

B

VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04] VSS_NCTF[05] VSS_NCTF[06] VSS_NCTF[07] VSS_NCTF[08] VSS_NCTF[09] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12]

LA7011P

VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198]

1

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29

of

20 41Friday, December 24, 2010

1.0

A

B

C

D

E

+5VS +5VS +5VS +5VS +5VS

3

1

2

@

D1

DAC_RED<10>

DAC_GRN<10>

DAC_BLU<10 >

CRT_HSYNC<10>

CRT_VSYNC<10>

D1 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

0.1U_0402_16V4Z

1 1

2 2

3 3

3

2

12

R153

R153 150_0402_1%

150_0402_1%

12

CLOSE TO CONN

+CRT_VCC

1

C619

2

5

P

A2Y

G

3

+CRT_VCC

1

C620

2

5

P

A2Y

G

3

1

R90

R90 150_0402_1%

150_0402_1%

2

@

D3

1

C158

2

10P_0402_50V8J

Follow KHLBx

1 2

R576 39_0402_1%R576 39_0402_1%

Follow KHLBx

1 2

R577 39_0402_1%R577 39_0402_1%

@

D2

D2 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

12

R131

R131 150_0402_1%

150_0402_1%

R575

1 2

10K_0402_5%

1

CRT_HSYNC_1

4

OE#

U26

U26 TC7SET125FUF_SC70

TC7SET125FUF_SC70

R580

1 2

10K_0402_5%

1

CRT_VSYNC_1 JVGA_VS

4

OE#

U25

U25 TC7SET125FUF_SC70

TC7SET125FUF_SC70

REDGREENBLUE

1

BAT54S-7-F_SOT23-3

1

C146

2

10P_0402_50V8J

3

2

@

D27

D27 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

FCM1608CF-121T03 0603

1 2

L11

FCM1608CF-121T03 0603

1 2

L10

FCM1608CF-121T03 0603

1 2

L9

1

C137

C137 10P_0402_50V8J

10P_0402_50V8J

2

CRT_HSYNC_2

CRT_VSYNC_2

FCM1608CF-121T03 0603

1

C157

2

10P_0402_50V8J

L32

1 2

L31

1 2

1

C145

2

10P_0402_50V8J

3

2

@

D26

D26 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

RED

BLUE

1

C136

C136 10P_0402_50V8J

10P_0402_50V8J

2

1

@

C626

C626 10P_0402_50V8J

10P_0402_50V8J

2

1

C625

@C62 5

@

10P_0402_50V8J

2

1

JVGA_HS

JVGA_VSJVGA_HS

Pre MP ADD for ESD solution

Near D26 Near D3 Near D21

0.1U_0402_16V4Z

CRT_DDC_DAT A<10>

CRT_DDC_CLK<10>

Change Q13 from SB00000EO10 to SB00000AR00.

+5VS +5VS +5VS

C624

+5VS

2.2K_0402_5%

1

2

D21

2 1

RB491D_SC59-3

R91

@R91

@

1 2

0_0603_5%

RED

CRT_DDC_DAT _CONN GREEN

JVGA_HS BLUE

JVGA_VS

CRT_DDC_CLK_ CONN

12

R159

0.1U_0402_16V4Z

+CRT_VCC

1.1A_6V_SMD1812P110TF

T10T10

100P_0402_50V8J

+3VS

12

R162

2.2K_0402_5%

2

Q13A

2N7002DW-T /R7_SOT363-6

1

C627

2

CRT Connector

F1

21

W=40mils

1

C628

2

5

2.2K_0402_5%

4

Q13B

2N7002DW-T /R7_SOT363-6

61

11

12

13

14

10 15

+CRT_VCC

R157

3

100P_0402_50V8J

+CRTVCC_CONNGREEN

1

C629

0.1U_0402_16V4Z

2

JCRT1

6

1 7

2 8

3 9

4

5

TYCO_1775763-1

ME@

12

@

C178

0.1U_0402_16V4Z

G

G G

G

12

R158

2.2K_0402_5%

1

2

1

C658

2

16 17

CRT_DDC_DAT _CONN

CRT_DDC_CLK_ CONN

1

@

C177

C177 68P_0402_50V8K

68P_0402_50V8K

2

4 4

Security Classification

2010/09/10 2010/08/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

2010/09/10 2010/08/19

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

CRT Connector

LA7011P

21 41Friday, December 24, 2010

E

1.0

5

INVPWM

DAC_BRIG

DISPOFF#

C15

@

D D

C C

B B

1

2

470P_0402_50V7K

BKOFF#<27>

GMCH_PWM<10>

@

1

C13

2

470P_0402_50V7K

@

1

C296

2

470P_0402_50V7K

EMI demand

+3VS

R392

@ R392

@

2.2K_0402_5%

EDID_CLK<10 > EDID_DATA<10>

BKOFF# DISPOFF#

R751 10K_0402_5%

10K_0402_5%

12

R751

INVT_PWM<27>

R395

2.2K_0402_5%

R261

0_0402_5%

1 2

D12

@

21

RB751V_SOD323

10/01

Change D12 from SC1H751H010 to SCS00000Z00 .

680P_0402_50V7K

@R395

@

R432 0_0402_5%

0_0402_5%

1 2

R430 0_0402_5%

0_0402_5%

1 2

@

C14

@

+3VS

12

@ R2 50

@

@R 430

@

+3VS

5

U22

P

NC A

G

TC7SZ14FU_SSOP5

3

1

2

DAC_BRIG<27 >

EDID_CLK EDID_DATA

R250

4.7K_0402_5%

R432

4

Y

4

+LEDVDD B+

+LCDVDD_CONN

(60 MIL)

INVPWM DISPOFF#

INVPWM

680P_0402_50V7K

C567

@ C567

@

JLVDS1

2

1

2

4

3

4

6

5

6

8

7

8

10 12 14 16 18 20 22 24 26 28 30

32

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

GND

ACES_87142-3041

ME@

1

2

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29

31

4.7U_0805_25V6-K

1

C566

2

+CMOS_PW+3VS

USB20_N2 USB20_P2

LVDS_A0# LVDS_A0

LVDS_A1# LVDS_A1

LVDS_A2# LVDS_A2

LVDS_ACLK# LVDS_ACLK

1 2

3

(40MIL)

R549 0_0805_5%R549 0_0805_5%

USB20_N2 <19>

USB20_P2 <19>

LVDS_A0# <10>

LVDS_A0 <10>

LVDS_A1# <10>

LVDS_A1 <10>

LVDS_A2# <10>

LVDS_A2 <10>

LVDS_ACLK# <10>

LVDS_ACLK <10>

GMCH_ENVDD<10>

CMOS

2N7002H_SOT23-3

CMOS_OFF#<27>

+5VS

+3VS

R35

0_0402_5%

(20 MIL)

+5VS

100K_0402_5%

+LCDVDD

Q3

LCD_ENVDD

12

100K_0402_5%

2

CMOS Camera

R539

@R539

@

0_0603_5%

1 2

R596

CMOS@R596

CMOS@

0_0603_5%

1 2

R270

CMOS@R270

CMOS@

CMOS1

R435

R435 150K_0402_5%

150K_0402_5%

1

CMOS@

2

OUT

IN

GND

3

Q21

Q21 DTC124EKAT146_SC5 9-3

DTC124EKAT146_SC5 9-3

CMOS@

LCD POWER CIRCUIT

+5VALW

R13

R13 150_0603_1%

150_0603_1%

13

D

S

R37

2

G

DTC124EK

12

R31

R31 100K_0402_5%

100K_0402_5%

R38

1 2

220K_0402_5%

1

0.1U_0402_16V4Z

2

OUT

IN

GND

Q5

DTC124EKAT146_SC5 9-3

3

@R37

@

Q24

CMOS@Q24

CMOS@

AP2301GN-HF_SOT23-3

3 1

C34

CAM_1CAM_3

2

1

C326

0.01U_0402_16V7K

2

CMOS@

2

1

2

FBMA-L11-201209-221LMA30T_08 05

1 2

1

C275

0.1U_0402_16V4Z

2

CMOS@

+3VS

W=60mils

1

C539

4.7U_0603_6.3V6K

Q4

31

2

AP2301GN-HF_SOT23-3

+LCDVDD

R280

CMOS@R280

CMOS@

0_0603_5%

L2

1 2

4.7U_0805_10V4Z

1

+CMOS_PW

1

C337

C337 10U_0805_10V4Z

10U_0805_10V4Z

2

CMOS@

W=60mils

+LCDVDD_CONN

1

C33

2

1

C25

0.1U_0402_16V4Z

2

G

Q82

2

INVPWM

13

D

S

D

S

@

For GMCH DPST

R431

@R431

@

10K_0402_5%

12

+3VS

4

Security Classification

2010/09/10 2010/08/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

2010/09/10 2010/08/19

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Num ber Rev

B

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

LVDS/CAMERA

LA7011P

1

of

22 41Friday, December 24, 2010

1.0

A A

2N7002H_SOT23-3

5

A

B

C

D

E

Mini-Express Card for WLAN(Half)

+3VS_WLAN

J6

@J6

1 1

JWLAN1

1

WAKE#

3

NC

5

NC

7

CLKREQ#

9

GND

11

REFCLK-

13

REFCLK+

15

GND

17

NC

19

NC

21

GND

23

PERn0

25

PERp0

27

GND

29

GND

31

PETn0

33

PETp0

35

GND

37

NC

39

NC

41

NC

43

NC

45

NC

47

NC

49

NC

51

NC

53

GND

TAITW_PFPET0-AFGLBG1ZZ4N 0

ME@

EC_TX_P80_DATA<27> EC_RX_P80_CLK<27>

ICH_PCIE_WAKE# BT_ACTIVE

WLAN_CLKREQ1#<16>

CLK_PCIE_WLAN1#<16>

CLK_PCIE_WLAN1<16>

PCIE_RXN3<19> PCIE_RXP3<19>

PCIE_TXN3<19> PCIE_TXP3<19>

For EC to detect debug card insert.

ICH_PCIE_WAKE#<19,24>

BT_ACTIVE<30>

2 2

1 2

R334 0_0402_5%

1 2

R333 0_0402_5%@R333 0_040 2_5%@

1 2 1 2

@

ICH_PCIE_WAKE#_R

+3VS_WLAN

R274100_0402_1% R274100_0402_1% R273100_0402_1% R273100_0402_1%

R625

R625 100K_0402_5%

100K_0402_5%

1 2

@

112

JUMP_43X79

PERST#

+3.3Vaux

SMB_CLK

SMB_DATA

USB_D-

USB_D+

LED_WWAN#

LED_WLAN# LED_WPAN#

2

3.3V GND

1.5V

GND

+1.5V

GND

+1.5V

GND

+3.3V

GND

JUMP_43X79

+3VS_WLAN

2 4 6 8

NC

10

NC

12

NC

14

NC

16

NC

18 20

NC

22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

+1.5VS+3VS_WLAN+3VS

2Watt

2

J4

@J4

@

2

1

+1.5VS_CONN

R377 0_0402_5%R377 0_0402_5%

1 2

R376 0_0402_5%@R376 0_0402_5%@

1 2

R375 0_0402_5%R375 0_0402_5%

1 2

R374 0_0402_5%@R374 0_0402_5%@

1 2

R373 0_0402_5%@R373 0_0402_5%@

1 2

USB20_N5 <19>

R372 300_0402_5%@R3 72 300_0402_5%@ R371 0_0402_5%R371 0_0402_5%

USB20_P5 <19>

12 12

+3VALW +3VS_WLAN

ICH_SMBCLK <16,19> ICH_SMBDATA <16,19>

WLAN_LED# <32>

R626

R626 100K_0402_5%

100K_0402_5%

1 2

+5VS

WL_OFF# <27> PLT_RST# <8,17,24>

C422

0.01U_0402_16V7K

C425

0.01U_0402_16V7K

1

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2

C423

C426

1

4.7U_0603_6.3V6M

2

1

4.7U_0603_6.3V6M

2

1

C424

@

2

+1.5VS_CONN

1

C433

@

2

3 3

4 4

Security Classification

2010/09/10 2010/08/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

2010/09/10 2010/08/19

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Date: Sheet of

D

Date: Sheet

Compal Electronics, Inc.

Mini-Card/DEBUG-PORT

LA7011P

E

of

23 41Friday, December 24, 2010

1.0

5

4

3

2

1

+3VALW

J8

112

JUMP_43X79

@

D D

Atheros request can't disable LAN power

@

Atheros request reserve

+3V_LAN

Layout Notice : Place as close

2

chip as possible.

Close together

L39

+1.7_VDDCT +1.7_LX

1

C549

C548

2

GIGA@ C549

GIGA@

1000P_0402_50V7K

Close to Pin40

L39

1 2

4.7UH_SIA4012-4R7M_20%

1

C547

Note: Place Close to LAN chip L39 DCR< 0.15 ohm

2

Rate current > 1A

0.1U_0402_16V4Z

0.1U_0402_16V4Z 10U_0805_10V4Z

10U_0805_10V4Z

+3V_LAN

R251 4.7K_0402_5%@R251 4.7K_0402_5%@

1 2

R252 4.7K_0402_5%@R252 4.7K_0402_5%@

1 2

R253 4.7K_0402_5%@R253 4.7K_0402_5%@

1 2

C C

B B

PCIE_IRX_PTX_N1<19>

PCIE_IRX_PTX_P1<19>

PCIE_ITX_C_PRX_N1<19>

PCIE_ITX_C_PRX_P1<19>

CLK_PCIE_LAN#<16> CLK_PCIE_LAN<16>

PLT_RST#<8,17,23>

ICH_PCIE_WAKE#<1 9,23> LAN_WAKE#<27>

CLKREQ_LAN#<16>

Near Pin13

Place Close to Chip

C553 0.1U_0402_16V7KC553 0.1U_040 2_16V7K

C552 0.1U_0402_16V7KC552 0.1U_040 2_16V7K

C559 0.1U_0402_16V4Z

CLKREQ_LAN#

R525 0_0402_5%

1

C565

C564

2

GIGA@ C 565

GIGA@

GIGA@ C 564

GIGA@

0.1U_0402_16V4Z

Near Pin19

PLT_RST#

PCIE_WAKE#_R

CLKREQ_LAN#

1 2

R517 0_0402_5%R517 0_ 0402_5%

12

R518 0_0402_5%R518 0_ 0402_5%

12

R519 0_0402_5%@R519 0_0402_5%@

1 2

R521 0_0402_5%R521 0_0402_5%

1 2

8152@

1 2

GIGA@

1 2

1

C568

2

0.1U_0402_16V4Z

Near

Pin31

Pin34

PCIE_PRX_LANTX_N1

PCIE_PRX_LANTX_P1

CLK_PCIE_LAN#_C CLK_PCIE_LAN_C

PLT_RST#

1

C601

2

0.1U_0402_16V4Z

PCIE_WAKE#_R

LAN_XTALO LAN_XTALI

CLKREQ_LAN#_R

+1.1_AVDDL +1.1_AVDDL +1.1_AVDDL +1.1_AVDDL +1.1_AVDDL

1

C600

C597

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

Near Pin6

U29

8152@U29

8152@

S IC AR8152-AL1E QFN 40P E-LAN CTRL

U29

29

TX_N

Atheros

30

36

35

32 33

2

3

25 26

28 27

7 8

4

13 19 31 34

6

41

Atheros

TX_P

8151-AL1A

RX_N

RX_P

REFCLK_N REFCLK_P

PERST#

WAKE#

SMCLK SMDATA

TEST_RST TESTMODE

XTLO XTLI

CLKREQ#

AVDDL AVDDL AVDDL AVDDL AVDDL_REG

GND

AR8151-AL1A_QFN40_5X5

GIGA@

Y6

1 2

25MHZ_20PF_7A25000012

1

C578

2

27P_0402_50V8J

LAN_XTALI

LAN_XTALO

1

C579

2

DVDDL_REG

AVDDH_REG

27P_0402_50V8J

LED_0 LED_1 LED_2

TRXN0

TRXP0

TRXN1

TRXP1

TRXN2

TRXP2

TRXN3

TRXP3

RBIAS

VDD33

VDDCT

DVDDL

AVDDH AVDDH

38 39 23

12 11 15 14 18 17 21 20

10

1

40

LX

5

24 37

16 22 9

+1.7_LX+1.7_VDDCT

R1160

0_0402_5%

NONSURGE@

no overclocking PD 5.1K

1 2

R515 5.1K_0402_5%R515 5.1K_0402_ 5%

ACTIVITY LAN_LINK#

LAN_RBIAS

+3V_LAN

+1.7_LX

+1.7_VDDCT

+1.1_DVDDL +1.1_DVDDL

+2.7_AVDDH +2.7_AVDDH

1

C572

2

Near Pin9

R516 0_0402_5%

MDI0MDI0+ MDI1MDI1+ MDI1+_R

1 2

R522 2.37K_0402_1%R522 2.37K_0402_1%

+1.7_LX

1 2

C561 0.1U_0402_1 6V4ZC561 0.1U_0402_16V4 Z

1

C571

C574

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

Near Pin22

8152@

1 2

R1160 3.9_0402_1%SURGE@ R1160 3.9_0402_1%SURGE@

1 2

R1161 3.9_0402_1%SURGE@ R1161 3.9_0402_1%SURGE@

1 2

R1162 3.9_0402_1%SURGE@ R1162 3.9_0402_1%SURGE@

1 2

R1163 3.9_0402_1%SURGE@ R1163 3.9_0402_1%SURGE@

1 2

0.1U_0402_16V4Z

R1161

0_0402_5%

NONSURGE@

LED0,1,2 intel Pull UP

ACTIVITY <25> LAN_LINK# <25>

Pre MP Add it for EMI

Close Pin 10

C554 & C555 Close pin1 < 200mil C557 & C558 Close pin < 400mil

+1.7_VDDCT

+2.7_AVDDH+2.7_AVDDH_R

R5200_0402_5%

GIGA@

Near Pin16

R1162

0_0402_5%

NONSURGE@

CLKREQ_LAN#

1

C573

2

GIGA@ C573

GIGA@

0.1U_0402_16V4Z

Near Pin37

1

C563

2

0.1U_0402_16V4Z

R1163

0_0402_5%

NONSURGE@

1

C554

2

1

C562

2

1U_0402_6.3V4Z

Near Pin24

0.1U_0402_16V4Z

MDI0-_R MDI0+_R MDI1-_R

MDI2MDI2+ MDI3MDI3+

1

C555

2

C560

1

Power On strapping

Pin Description Chip Default

H:Over Clock Enable

LED0

L:Over Clock Disable

H:SWR Switch mode regulator Select

LED1

AR8151 Pin23=LED2.

*

H

*

--

AR8152, Pin23 is CLKREQ

Place Close to LAN chip

MDI0+

R526

1 2

49.9_0402_1%

R527

R528

R529

R530

R531

R532

R533

49.9_0402_1%

1 2

49.9_0402_1%

1 2

49.9_0402_1%

1 2

49.9_0402_1%

1 2

49.9_0402_1%GIGA@

1 2

49.9_0402_1%GIGA@

1 2

49.9_0402_1%GIGA@

1 2

49.9_0402_1%GIGA@

MDI0-

MDI1+

MDI1-

MDI2+

MDI2-

MDI3+

MDI3-

Note 1 : 8152 no mount MDI3+, MDI3-, MDI2-, MDI2+ resister and cap

Note 2 : C594, C577, C580, C599, reserved for EMI.

MDI0-_R <25> MDI0+_R <25> MDI1-_R <25> MDI1+_R <25> MDI2- <25> MDI2+ <25> MDI3- <25> MDI3+ <25>

+3V_LAN

1

C557

C558

@ C558

@

2

1U_0402_6.3V4Z

10U_0805_10V4Z

9/27 Add it for avoid to be struck by lightning

MDI0+

MDI0-

TCLAMP3304N.TCT_SLP2626P10-10

Customer Lan surge Suggesttion

MDI2+

MDI2-

0.1U_0402_16V4Z

TCLAMP3304N.TCT_SLP2626P10-10

C594 1000P_0402_50V7K@ C594 1000P _0402_50V7K@

1 2

C592 0.1U_0402_16V4ZC592 0.1U_0402_16V4Z

1 2

C577 1000P_0402_50V7K@ C577 1000P _0402_50V7K@

1 2

C593 0.1U_0402_16V4ZC593 0.1U_0402_16V4Z

1 2

C580 1000P_0402_50V7K@ C580 1000P _0402_50V7K@

1 2

C591 0.1U_0402_16V4Z

1 2

GIGA@

C599 1000P_0402_50V7K@ C599 1000P _0402_50V7K@

1 2

C583 0.1U_0402_16V4Z

1 2

GIGA@

Part Number = SC300001J00

D16

1 2 3 4

1 2 3 4 556

10

9 8 7

GND

SURGE@

11

10 9 8 7 6

Will used Semtech 3304N

Part Number = SC300001J00

D17

1 2 3 4

1 2 3 4 556

10

9

8

7

6

GND

11

@

MDI1-

MDI1+

MDI3-

MDI3+

A A

Pin4

VDDCT_REG CLKREQn

AR8152

CLKREQn LED[2]

AR8151

R525*C559

5

Configure

Pin23

Configure

R516

**

Security Classification

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LAN-AR8151/8152

LA7011P

Friday, December 24, 2010

LA7011P

1.0

24 41

1

24 41

1.0

5

4

3

2

1

9/27 Add it for avoid to be struck by lightning

C602BS201N-LV SCV00001400

MCT3

MDO3-

MDO3+

MDO1-

MDO2-

MDO2+

MDO1+

MDO0-

MDO0+

12

MCT2

MCT1

MCT0

+3V_LAN_R

1

C395

2

Place closely JRJ45

2

3

1

JRJ45

12

Amber LED-

11

Amber LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

FOX_JM36113-P2221-7F

ME@

D D

+1.7_VDDCT

Customer Lan surge Suggesttion

R306

R306 0_0603_5%

0_0603_5%

C427 1U_040 2_6.3V4Z

C435 0.1U_040 2_16V4Z

C436 0.1U_040 2_16V4Z

C438 0.1U_040 2_16V4ZC438 0.1U_04 02_16V4Z

C440 0.1U_040 2_16V4ZC440 0.1U_04 02_16V4Z

C C

12

GIGA@

12

GIGA@

12

MDI1+_R MDI1-_R +1.7_VDDCT_R

+1.7_VDDCT_R MDI0+_R MDI0-_R

1 2

+1.7_VDDCT_R

T7

8152@T7

8152@

1

TD+

2 3 4 5 6 7

TX+

TD-

TX-

CT

NC

CT

RD+

RX+

RD-8RX-

S X'FORM_ NS681680

T8

GIGA@T 8

GIGA@ 1 2 3 4 5 6 7 8 9

10 11 12

TCT1 TD1+ TD1TCT2 TD2+ TD2TCT3 TD3+ TD3TCT4 TD4+ TD4-

GSL5009LF

MDO1+ MDO1MCT1

MCT0 MDO0+ MDO0-

MDI3+ MDI3-

MDI1+_R MDI1-_R

MDI2+ MDI2-

MDI0+_R MDI0-_R

MDI3+<24> MDI3-<24>

MDI1+_R<24> MDI1-_R<24>

MDI2+<24> MDI2-<24>

MDI0+_R<24> MDI0-_R<24>

16 15 14 13 12 11 10 9

MCT1 MX1+

MX1MCT2 MX2+

MX2MCT3 MX3+

MX3MCT4 MX4+

MX4-

ACTIVITY< 24>

MCT3

24

MDO3+

23

MDO3-

22

MCT2

21

MDO1+

20

MDO1-

19

MCT1

18

MDO2+

17

MDO2-

16

MCT0

15

MDO0+

14

MDO0-

13

ACTIVITY ACTIVITY_R

12/13 PreMP Add it for avoid to be struck by lightning

C387

Near to near JRJ45.

B B

MDO0-

MDO1-

1 2 3 4

SURGE@

1 2 3 4

SURGE@

D55

1 2 3 4 556

D52

1 2 3 4 556

MDO0+

10

9

8

7

6

GND

11

TCLAMP3302N.TCT_SLP26 26P10-10

MDO1+

10

9

8

7

6

GND

11

TCLAMP3302N.TCT_SLP26 26P10-10

PVT Add EMI solution.

R97

BLM18PG181SN1D_0603

C863 0.1U_0603_25V7KC86 3 0.1U_0603_25V7K

1 2

R884 0_0402_5%

1 2

12

LAN_LINK#<24>

C387

470P_0402_50V7K

LAN_LINK#

C386

470P_0402_50V7K

Will used BS-201N-LV

R534

75_0402_5%

R535

75_0402_5%

R536

75_0603_5%

R537

75_0603_5%

R538 220_0402_5%R538 220_0402_5%

1

2

1

2

+3V_LAN

12

GIGA@R534

GIGA@

GIGA@R535

GIGA@

12

40 mil

RJ45_GND

1

C585

C585 1000P_1206_2KV7K

1000P_1206_2KV7K

2

220_0402_5%

R702

470P_0402_50V7K

C602BS201N-LV SCV00001400

1 2

@

C603BS201N-LV SCV00001400

1 2

@

C604BS201N-LV SCV00001400

1 2

@

C609BS201N-LV SCV00001400

1 2

@

D11

D11 PESD5V0U2BT 3P

PESD5V0U2BT 3P

@

SHLD4

SHLD3

SHLD2

SHLD1

3

1

16

15

14

13

LAN_GND

2

D13

D13 PESD5V0U2BT 3P

PESD5V0U2BT 3P

@

40 mil

LAN_GND

A A

Security Classification

2010/09/10 2010/08/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

2010/09/10 2010/08/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

B

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LAN_Transformer

LA7011P

25 41Friday, December 24, 2010

1

1.0

5

CX20671 High Definition Audio Codec SoC With Integrated Class-D Stereo Amplifier. An integrated 5 V to 3.3 V Low-dropout voltage regulator (LDO).

An integrated 3.3 V to 1.8V Low-dropout voltage regulator (LDO).

D D

+3VS

+VAUX_3.3

+3VS

+3VALW

To support Wake-on-Jack or W ake-on-Ring, the CODEC VAUX_3.3 & VDD_IO pins must be powerd by a rail that is not removed unless AC power is removed. *DSH page42 has more detail.

+3VS

+3VALW

C C

C416

1 2

0.1U_0402_16V4Z

C396

1 2

0.1U_0402_16V4Z

R355

@R355

B B

@

1 2

R354

@R354

@

1 2

R362

@R362

@

1 2

0_0402_5%

12

R3390_0402_5% R3390_0402_5%

@

12

R3370_0402_5%

C381

12

R3280_0402_5% R3280_0402_5%

@

12

R3290_0402_5%

HDA_RST_CODEC#<18>

HDA_BITCLK_CODEC<18> HDA_SYNC_CODEC<18>

HDA_SDIN0<18>

HDA_SDOUT_CODEC<18>

EAPD active low 0=power down ex AMP 1=power up ex AMP

EAPD<27>

EC_MUTE#<27>

Internal SPEAKER

1

2

C369

GND GNDA

PC Beep

@

PC_BEEP1

12

R598 0_0402_5%

EC Beep

ICH Beep

A A

BEEP#<27>

SB_SPKR<19>

2 1

D18 RB751V_SOD323 D18 RB751V_SOD323

2 1

D35 RB751V_SOD323 D35 RB751V_SOD323

12

R599 0_0402_5%@R599 0_0402_5%@

5

PC_BEEP2

1 2

33_0402_5%

12

@

R585

R585 10K_0402_5%

10K_0402_5%

R582

1 2

C645 0.1U_0402_16V4ZC645 0.1U_0402_16V4Z

R309

0_0603_5%

C380

10U_0805_10V4Z

+VDD_IO

1

2

1U_0603_10V4Z

PC_BEEP

1

2

1

C377

2

EC_MUTE#

4

+DVDD_3_3

12

1

C400

C407

2

10U_0805_10V4Z

0.1U_0402_16V4Z

10K only needed if supply to VAUX_3.3 is removed during system re-start.

12

0.1U_0402_16V4Z

R332

HDA_RST_CODEC#

HDA_BITCLK_CODEC

HDA_SYNC_CODEC

R33633_0402_5% R33633_0402_5%

1 2

HDA_SDOUT_CODEC

PC_BEEP

1 2

SPK_L2+ SPK_L1-

SPK_R2+ SPK_R1-

4

1

2

C371

10K_0402_5%

1

C408

2

0.1U_0402_16V4Z

1

2

10U_0805_10V4Z

HDA_SDIN0_R

R3380_0402_5% R3380_0402_5%

12

R3430_0402_5% R3430_0402_5%

3

+3VS

12

R363

4.7K_0402_5%@

HDA_RST_CODEC#

1

C584

@

100P_0402_50V8J

+LDO_OUT_3_3V_RFILT_1_65

1

0.1U_0402_16V4Z

18

27

29

28

FILT_1.65

VAUX_3.3

AVDD_3.3

DVDD_3.3

CX20671-11Z_QFN40_6X6

1

C410

2

26

LPWR_5.0

RPWR_5.0

AVDD_5V

AVDD_HP CLASS-D_REF

SENSE_A

PORTB_R

PORTB_L

PORTC_R PORTC_L

PORTA_R

PORTA_L

C409

10U_0805_10V4Z

+AVDD_5V

B_BIAS

C_BIAS

AVEE FLY_P FLY_N

2

0.1U_0402_16V4Z

NC NC NC

AVDD_3.3 pinis output of internal LDO. NOT connect to external supply.

1

C411

C413

2

10U_0805_10V4Z

0.1U_0402_16V4Z

12 15

+CLASSD_5V_C

17

36

35 34 33

+MICBIASB

32 31 30

23 22

24 25 39

21 19 20

+MICBIASC

EXT_MICR EXT_MICL

HP_OUTR_R HP_OUTL_R

1 2

C401 1U_0603_10V4ZC401 1U_0603_10V4Z

R311

12

+5VS

0_0603_5%

1

C392

C391

2

0.1U_0402_16V4Z

SENSE_A

1 2 1 2

C406

0.1U_0402_16V4Z

Please bypass caps very close to device.

MIC_INR

MIC_INL

1

C404

2

10U_0805_10V4Z

0.1U_0402_16V4Z

1

C393

2

C403 2.2U_0603_10V7KC403 2.2U_0603_10V7K C415 2.2U_0603_10V7KC415 2.2U_0603_10V7K

R601 15_0402_5%

R601 15_0402_5% R602 15_0402_5%

R602 15_0402_5%

Changed from 5.1ohm to 15ohm for "zi zi"noise.

1

0.1U_0402_16V4Z

9

5 8 6 4

10

38 37

40

1

11 13

16 14

1

C414

2

FILT_1_8

U17

RESET#

BIT_CLK SYNC SDATA_IN SDATA_OUT

PC_BEEP

GPIO0/EAPD# GPIO1/SPK_MUTE#

DMIC_CLK DMIC_1/2

LEFT+ LEFT-

RIGHT+ RIGHT-

41

C412

2

1U_0603_10V4Z

7

2

3

VDD_IO

FILT_1.8

GND

0.1U_0402_16V4Z

1

C379

2

@

2

Layout Note:Path from +5VS to LPW R_5.0 RPW R_5.0 must be very low resistance (<0.01 ohms)

+CLASSD_5V

1

C390

C399

2

10U_0805_10V4Z

R344 5.11K_0402_1%R344 5.11K_0402_1%

R345 10K_0402_1%R345 10K_0402_1% R346 39.2K_0402_1%R346 39.2K_0402_1%

Internal MIC

R352 3.3K_0402_5%R352 3.3K_0402_5% R351 3.3K_0402_5%R351 3.3K_0402_5%

HP_OUTR <30> HP_OUTL <30>

Add for ESD solution.

wide 20MIL

SPK_R1SPK_R2+ SPK_L1SPK_L2+

L19 0_0603_5%L19 0_0603_5%

1 2

L20 0_0603_5%L20 0_0603_5%

1 2

L22 0_0603_5%L22 0_0603_5%

1 2

L23 0_0603_5%L23 0_0603_5%

1 2

SPK_R1-_CONN SPK_R2+_CONN SPK_L1-_CONN SPK_L2+_CONN

2

HDA_RST_CODEC#

HDA_SYNC_CODEC

HDA_SDOUT_CODEC

1

C375

2

@

22P_0402_50V8J

R348

1 2

0.1_1206_1%

1 2

1 2 1 2

Vender advise: Change R352 and R351 frorm 2.2K to 3.3K by Danson

1 2 1 2

EXT_MICR_C EXT_MICL_C

+5VS

+VAUX_3.3

+MICBIASC

R350 100_0402_1%R350 100_0402_1%

R356 100_0402_1%R356 100_0402_1%

C376

2

@

22P_0402_50V8J

MIC_JD <30>

PLUG_IN <30>

1

C378

2

@

Port C Port A

EXT_MIC_R <30> EXT_MIC_L <30>

22P_0402_50V8J

Headphone

Vender advise: Change R349 frorm 4.7K to 2. 2K and C347 from 2.2u to 4.7 by Danson

MIC1

MIC_IN

1

GNDA

2

WM-64PCY_2P

45@

1

C633

C632

2

1000P_0402_50V7K

1

C634

C635

2

1000P_0402_50V7K

3

1

3

2

D5

D5 PESD5V0U2BT 3P

PESD5V0U2BT 3P

1 2

1

C370

2

@

R33133_0402_5% @ R33133_0402_5% @

Sense resistors must be connected same power that is used for VAUX_3.3

External MIC

+MICBIASB

R349

2.2K_0402_5%

1 2

C394 4.7U_0603_6.3V6K

2

D4

D4 PESD5V0U2BT 3P

PESD5V0U2BT 3P

1

Add for ESD solution.

3

@

1

EMI

1 2

2

D6

D6 PESD5V0U2BT 3P

PESD5V0U2BT 3P

@

1

HDA_BITCLK_CODEC

MIC_INR

MIC_INL

JSPK1

1

2

3

4

5

GND1

6

GND2

ACES_88231-04001

ME@

Add for ESD solution.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

CX20671 Codec

Size Document Number Rev

C

Date: Sheet of

LA7011P

1

26 41Friday, December 24, 2010

1.0

L21

+3VALW +EC_AVCC

1 2

FBM-11-160808-6 01-T_0603

0.1U_0402_16V4Z

1 2

L24 FBM-11-16 0808-601-T_0603L24 FBM-11-1608 08-601-T_0603

10/01 Danson

KB_RST#<18>

C521

2

1

ECAGND

1

C522

1000P_0402_50V7K

2

R60 0 _0402_5%R60 0_04 02_5%

RB751V_SOD323

Change D46 from SC1H751H010 to SCS00000Z00 .

+3VALW

R931

47K_0402_5%

LAN_WAKE#<24>

PCI_PME#<17>

+3VALW

+5VALW

12

C525 22P_0402_50V8J@C525 22P_0402_50 V8J@

1 2

R63 47K_0402_5%R63 47K_0402 _5%

0.1U_0402_16V4Z

+3VALW

12

R932

R932 47K_0402_5%

47K_0402_5%

KSO1

KSO2

1 2

R70 0 _0402_5%R70 0_04 02_5%

1 2

R71 0_0402_5%@R71 0_0402_5%@

S

+3VALW

R234

2.2K_0402_5%

@

C533

C533 100P_0402_50V8J

100P_0402_50V8J

FRD#SPI_SO

FSEL#SPICS#

EC_SMB_CK1

EC_SMB_DA1

1 2

R99 100K_0402_1%@R99 100K_0402_1%@

1 2

R86 10 0K_0402_1%@R86 100 K_0402_1%@

1 2

R84 4.7K_0402_5%R84 4.7K_0402_5%

1 2

R236 4 .7K_0402_5%R236 4.7K_04 02_5%

+3VS

1 2

1

2

C524

D

13

G

2N7002H_SOT23-3

2

R235

2.2K_0402_5%

1 2

EC_SMB_CK2 EC_SMB_DA2

1

@

C534

C534 100P_0402_50V8J

100P_0402_50V8J

2

12

2

PVT

1

Add BATT_LEN# on Pin38

+3VALW

1 2

Q19

@

Q19

@

R100

09/16 Add C859 For ESD

R69

R69 10K_0402_5%

10K_0402_5%

+3VALW

1 2

D46

@

2 1

10_0402_5%@

Place closely pin13

PCI_RST#

1

C859

0.1U_0402_16V4Z

2

KSO[0..15]<32>

KSI[0..7]<32>

SLP_S3#<19> SLP_S5#<19>

EC_PME#

EC_TX_P80_DATA<23> EC_RX_P80_CLK<23>

1 2

R85 100K_0402_1%@R85 100K_0402_1%@

C516

0.1U_0402_16V4Z

C516

0.1U_0402_16V4Z

KSO[0..15]

KSI[0..7]

EC_SMB_CK2<4>

EC_SMI#<19>

LID_SW#<32>

PWR_LED#<30,32> NUM_LED#<32>

LID_SW#

0.1U_0402_16V4Z

C517

0.1U_0402_16V4Z

C517

0.1U_0402_16V4Z

1

2

GATEA20<18 >

SERIRQ<19>

LPC_FRAME#<18>

LPC_AD3<18> LPC_AD2<18> LPC_AD1<18> LPC_AD0<18>

CLK_PCI_LPC<16>

PCI_RST#<17>

EC_SCI#<19>

BATT_LEN#<35>

EC_SMB_CK1<3 5> EC_SMB_DA1<3 5>

EC_SMB_DA2<4>

KILL_SW#<32>

ODD_DA#<19,32>

ON/OFF#<30>

1

2

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

R950_0402_5% R950_0402_5%

1 2

R960_0402_5% R960_0402_5%

1 2

EC_SMI# LID_SW#

FAN_SPEED1

EC_TX_P80_DATA EC_RX_P80_CLK

NUM_LED#

XCLKI XCLKO

1

2

KB_RST#_EC

LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

EC_RST# EC_SCI# BATT_LEN#

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

1

2

1 2 3 4 5 7 8

10

12 13 37 20 38

55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82

77 78 79 80

S3#

6

S5#

14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

C520

1000P_0402_50V7K

C520

1000P_0402_50V7K

1

2

GA20/GPIO00 KBRST#/GPIO01 SERIRQ# LFRAME# LAD3 LAD2 LAD1

LPC & MISC

LAD0

PCICLK PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 LID_SW#/GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C EC_PME#/GPIO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A

XCLK1 XCLK0

KB926QFE0_LQFP128

KB926QFE0_LQFP128 U46

U46

C519

0.1U_0402_16V4Z

C519

0.1U_0402_16V4Z

C518

0.1U_0402_16V4Z

C518

E0 version SA00001J5A0

Change D46 from SJ100001U00 to SJ132P7KW10

C532

XCLKO

12

R237

R237 20M_0603_5%

20M_0603_5%

@

XCLKI

C532

15P_0402_50V8J

X1

4

1

C535

15P_0402_50V8J

3

OSC

NC

2

OSC

NC

32.768KHZ_12.5PF_Q 13MC14610002

+3VALW

C523

1000P_0402_50V7K

C523

1000P_0402_50V7K

1

2

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

+EC_AVCC

9

22

33

96

111

125

VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

GPO

GPIO

GPI

GND

11

24

35

94

113

67

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

AGND

69

ECAGND

SPI_CLK_R

For SED Team

21 23 26 27

63 64 65 66 75 76

68 70 71 72

83 84 85 86 87 88

97 98 99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

12

R227

R227 0_0402_5%

0_0402_5%

1

C531

C531 10P_0402_50V8J

10P_0402_50V8J

2

INVT_PWM BEEP#

ACOFF

BATT_TEMP

TSATN#_EC

DAC_BRIG

IREF

USB_ON#

TP_CLK TP_DATA

EN_WOL#

FRD#SPI_SO FWR#SPI_SI SPI_CLK FSEL#SPICS#

CHARGE_LED0# CAPS_LED# CHARGE_LED1#

SYSON

ACIN

EC_RSMRST#

EC_LID_OUT#

EC_ON

BKOFF#

S4#

R93 0_0402_5%R9 3 0_04 02_5%

1 2

PBTN#

1 2

1

C529

4.7U_0603_6.3V6K

2

INVT_PWM <22> BEEP# <26>

ACOFF <34,36>

BATT_TEMP <35>

ADP_I <36>

R59 0_0603_5%@R59 0_0603_ 5%@

1 2

DAC_BRIG <22>

IREF <36> CHGVADJ <36>

EC_MUTE#

EC_MUTE# <2 6> USB_ON# <29> NOVO# <30>

TP_CLK <32>

TP_DATA <32>

BATT_SEL_EC <36 > CMOS_OFF# <22>

FRD#SPI_SO <28>

R818 0_0402_5% R818 0_0402_5% R817 33_0402_5% R817 33_0402_5 % R421 0_0402_5% R421 0_0402_5%

FSTCHG <36>

CHARGE_LED0# <32> CAPS_LED# <32> CHARGE_LED1# <32>

SYSON <31,39> VR_ON <40> ACIN < 19,36>

EC_RSMRST# <19> EC_LID_OUT# <19> EC_ON <30,37>

ICH_POK_EC

BKOFF# <22> WL_OFF# <23> DDR3_SM_PWROK <8>

ENBKL EAPD

EC_THERM#

SUSP#

R94 0_0402_5%R9 4 0_0402_ 5%

BT_OFF# <30>

SUSP#

1

2

Add C388 for noise

VR_ON

1000P_0402_50V7K

+3VS

@ R105

@

R65 10K_0402_5%@R65 10K_0402_5%@

R67 4.7K_0402_5%@R67 4 .7K_0402_5%@

1 2

12 1 2 1 2

1 2

R76

SLP_S4# <19>

ENBKL < 10>

EAPD <26>

EC_THERM# <19>

SUSP# <31,38 >

PBTN_OUT# < 19>

1

@

C927

C927 1U_0603_10V4Z

1U_0603_10V4Z

2

@

C530

C530 1000P_0402_50V7K

1000P_0402_50V7K

1

C388

2

12

R105 10K_0402_5%

10K_0402_5%

EC_FAN_PWM

1 2

0_0402_5%

TSATN# <8>

ICH_POK

+3VALW

KB926 SPI STRAP PIN

SPI_SI < 28>

SPI_CLK_R <28>

SPI_CS# <28>

ICH_POK <8,19>

1 2

R77 4.7K_0 402_5%

@

FAN_SPEED1 EC_FAN_PWM

+3VS

R102 10K_0 402_5%@R102 10 K_0402_5%@

R103 10K_0 402_5%@R103 10 K_0402_5%@

10/01 Add for reduce noise

1

C655

2

TP_CLK

TP_DATA

BATT_TEMP

ACIN

USB_ON#

EN_WOL#

change to 'L' active

+3VS

10K_0402_5%

1 2

R68

1 2 1 2

FAN1 Conn

C490

10U_0805_10V4Z

R619 0_0402_5%R6 19 0_0402_5%

R620 0_0402_5%R6 20 0_0402_5%

1 2

C655 closely PU3.3

1

@

C656

100P_0402_50V8J

+5VS

2

1

FAN_PWM_R

C656 closely U46.65

2

100P_0402_50V8J

R61 4.7K_0402_5%R61 4.7K_0402_5%

1 2

R62 4.7K_0402_5%R62 4.7K_0402_5%

1 2

C527 100P_0402_50 V8JC527 100P_0402_50 V8J

1 2

C528 100P_0402_50 V8JC528 100P_0402_50 V8J

@ R36

@

EC_RSMRST#

R66 10K_0402_5 %R66 10K_0402_5%

1 2

R104 10K_0 402_5%@R104 10 K_0402_5%@

1

TACH_R

2

3

4

5

G5

6

G6

ACES_85205-04001

ME@

NUM_LED#

CAPS_LED#

FSTCHG

+3VALW

12

R36 10K_0402_5%

10K_0402_5%

JFAN1

ADP_I

+5VS

+3VALW

Close PR131.1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF CO MPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF CO MPAL ELECTRONICS, INC.

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

EC / FAN Conn

LA7011P

27 41Friday, December 24, 2010

1.0

SPI Flash (16Mb*1)

C1170

0.1U_0402_16V4Z

FOR EC 16M SPI ROM

+3VALW

20mils

1

2

R921 0 _0402_5%

R922 0 _0402_5%

SPI_CS#<27>

SPI_CLK_R<27>

SPI_SI<27>

SPI_W#

12

SPI_HOLD#

12

SPI_CS#

SPI_CLK_R

Change U31 P/N from SA00000XT00 to SA000041N00 0915

Change U31 footprint from WIESO_G6179-100000_8P to MX25L1606EM2I-12G_SO8 0920

U31

LPC@U31

LPC@

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

MX25L1606EM2I-12G_SO8

VSS

4

SPI_SO FRD# SPI_SOSPI_SI

2

Q

R816 0 _0402_5%

12

+5VALW +5VALW +5VS+5VS +3VALW +3VS+3VS+5VS

FRD#SPI_SO < 27>

FOR EC 256K SPI ROM (NONShare ROM)

2010/09/24 Add U23 for NONShare SPI ROM.

+3VALW

U23

SPI@U23

SPI_CS# SPI_W#

SPI_HOLD#

SPI@

1

CE#

3

WP#

7

HOLD#

4

VSS

W25X20BVSNIG SOICP 8P

VDD

SCK

SO

SA00003GM10

256kB(NAU00 2nd)

8

SPI_CLK_R

6

SPI_SI

5

SI

SPI_SO

2

SATA_ITX_C_DRX_P0<18> SATA_ITX_C_DRX_N0<1 8>

SATA_DTX_C_IRX_N0<18>

SATA_DTX_C_IRX_P0<18>

C125

1000P_0402_50V7K

C441 0.01U_04 02_16V7KC441 0.01U _0402_16V7K

1 2

C442 0.01U_04 02_16V7KC442 0.01U _0402_16V7K

1 2

C444 0.01U_04 02_16V7KC444 0.01U _0402_16V7K

1 2

C445 0.01U_04 02_16V7KC445 0.01U _0402_16V7K

1 2

+5VS

1

2

C126

0.1U_0402_16V4Z

1

2

R749

1 2

0_0805_5%

1

C123

C123 10U_0805_10V4Z

10U_0805_10V4Z

2

SATA_ITX_DRX_P0 SATA_ITX_DRX_N0

SATA_DTX_IRX_N0 SATA_DTX_IRX_P0

C121

@C 121

0.1U_0402_16V4Z

@

+5VS_HDD

SATA HDD Conn.

JHDD1

1

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

+3VS

8

3.3V

1

2

OCTEKCONN SP01000QT00

SMT, 22P, Standart Type, H:9.2mm, P=1.27

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18

Reserved

19

GND

20

12V 12V 12V

ME@

GND GND

21 22

OCTEKCONN_SAT-22 SW1G

C122

0.1U_0402_16V4Z

C122

1

0.1U_0402_16V4Z

2

C124

1

C124

2

C128

0.1U_0402_16V4Z

C128

1

0.1U_0402_16V4Z

2

C130

1

C130

2

0.1U_0402_16V4Z

Near H1 Near H7 Near H3 Near H2 Near H6 Near H22 Near H4 Near H16

A:H_2P8

H4 HOLEAH4HOLEA

1

H9 HOLEAH9HOLEA

1

H_4P2

H11

H11 HOLEA

HOLEA

1

H5

H6

HOLEAH5HOLEA

1

H12

H12 HOLEA

HOLEA

1

Compal Secret Data

H_4P2

HOLEAH6HOLEA

1

H19

H20

HOLEA

1

Deciphered Date

H18

H18 HOLEA

HOLEA

1

BOTTOM SIDE VGA

1

D:H_3P8

H15

H15 HOLEA

HOLEA

1

3P2 X1

H23

H23 HOLEA

HOLEA

BOTTOM SIDE WLAN

1

H1 HOLEAH1HOLEA

1

H7 HOLEAH7HOLEA

1

23 24

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

HOLEAH3HOLEA

HOLEAH2HOLEA

1

H8 HOLEAH8HOLEA

1

H17

H17 HOLEA

HOLEA

1

BOTTOM SIDE

FAN

2010/09/10 2010/08/19

H3

H2

C131

1

C131

0.1U_0402_16V4Z

2

C150

0.1U_0402_16V4Z

FD1FD1

1

FD3FD3

1

C132

0.1U_0402_16V4Z

2

1

C150

2

FD2FD2

1

FD4FD4

1

C149

0.1U_0402_16V4Z

J:H_2P8 X1

C133

C149

H16

H16 HOLEA

HOLEA

1

C133

2

1

2

0.1U_0402_16V4Z

I:H_3P0N X1

H_4P5X3P0N H_6P0NH_3P0X4P0N

H24

H24 HOLEA

HOLEA

1

Title

Size Document Num ber Rev

B

Date: Sheet of

H21

H21 HOLEA

HOLEA

1

Compal Electronics, Inc.

HDD / SPI ROM / Hold

LA7011P

C147

C148

Near C147Near C490Near C490

H10

H10 HOLEA

HOLEA

H22

H22 HOLEA

HOLEA

1

28 41Friday, December 24, 2010

1

C147

2

+3VS+3VS+5VS

1

C148

2

1

1.0

A

B

C

D

E

+USB_VCCA

PVT Change U19 and U27 part number from SA000039E00 to SA00002XX00

1 1

C421 0.1U_0402_16V4ZC4 21 0.1U_0402_16V4Z

2 2

0.1U_0402_16V4Z

3 3

12

USB_ON#<27>

C621

+5VALW

1

2

USB_ON#

U19

1

GND

2

VIN VIN3VOUT

4

EN

RT9715BGS_SO8

U27

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

4

EN

RT9715BGS_SO8

FLG

VOUT VOUT

FLG

+USB_VCCA

8 7 6 5

+USB_VCCB

8 7 6 5

RIGHT USB PORT X1

1

C429

2

LEFT USB PORT x2

C610

1000P_0402_50V7K@

USB_OC#1_7 <19>

1

2

1000P_0402_50V7K@

USB_OC#0 <19>

220U_6.3V_M

+USB_VCCB

C623

220U_6.3V_M

+USB_VCCB

C430

+USB_VCCB

1

+

2

+USB_VCCA

1

+

C615

1

+

2

+USB_VCCB

C715

C715 470P_0402_50V7K

470P_0402_50V7K

2

USB20_N0

USB20_P0

1

C432

C432 470P_0402_50V7K

470P_0402_50V7K

2

Change JUSB3 connector from ESATA to USB

1

C622

C622 470P_0402_50V7K

470P_0402_50V7K

2

USB20_N1

USB20_P1

USB20_N7<19>

USB20_P7<19>

W=80mils

USB20_N0<19> USB20_P0<19>

WCM-2012-900T_ 4P

4

1

L66

@L6 6

@

W=80mils

USB20_N1<19> USB20_P1<19>

L63

4

1

WCM-2012-900T_ 4P

W=80mils

USB20_N0_R

3

USB20_P0_R

2

@L6 3

@

3

2

R924 0 _0402_5%R924 0_0402_5% R923 0 _0402_5%R923 0_0402_5%

R914 0 _0402_5%R914 0_0402_5%

12

R912 0 _0402_5%R912 0_0402_5%

12

D25

@

PJDLC05_SOT23-3

R918 0 _0402_5%R918 0_0402_5%

12

R913 0 _0402_5%R913 0_0402_5%

12

USB20_N1_R

3

USB20_P1_R

2

12 12

USB20_N0_R USB20_P0_R

2

3

1

D47

@

3

PJDLC05_SOT23-3

USB20_N7_R USB20_P7_R

USB20_N1_R USB20_P1_R

2

1

Pre MP ADD for ESD solution

2

3

D10

@

PJDLC05_SOT23-3

1

Near D10

0.1U_0402_16V4Z

C661

C660

+USB_VCCB+5VALW

1

2

USB20_N7

USB20_P7

Near C622

1

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

L64

@L6 4

@

4

1

WCM-2012-900T_ 4P

3

2

USB20_N7_R

3

USB20_P7_R

2

JUSB1

ME@J USB1

ME@

1

2

3

4

5

G5

6

G6

ACES_85205-04001

JUSB2

1

2

3

4

5

GND

6

GND

7

GND

8

GND

SUYIN_020173MR004S558ZL

ME@

JUSB3

1

2

3

4

5

GND

6

GND

7

GND

8

GND

SUYIN_020173MR004S558ZL

ME@

Right USB Conn.

Left USB Conn.

Left2 USB Conn.

4 4

Security Classification

2010/09/10 2010/08/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

2010/09/10 2010/08/19

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

USB ports/BT

LA7011P

E

1.0

29 41Friday, December 24, 2010

Power Button

TOP Side

Bottom Side

EC_ON< 27,37>

BT_OFF#<27>

BT_LED#<32>

SW1

1

2

@

1 2

SHORT PADS

ON/OFFBTN#

EC_ON

6

J5

2

5 @

@

1 2

IN

3

4

R302

R302 10K_0402_5%

10K_0402_5%

+5VALW

ON/OFF switch

SMT1-05_4P

D14

1

DAN202UT106_SC7 0-3

12

BT@

R304

R304 100K_0402_5%

100K_0402_5%

1 2

1

OUT

BT@

Q31

Q31 DTC124EKAT146_SC5 9-3

DTC124EKAT146_SC5 9-3

GND

3

BT@

Q29

1

DTC124EKAT146_SC5 9-3

OUT

2

IN

GND

3

+3VALW

3

2

G

BT MODULE CONN

R616

100K_0402_5%

BT@

R272

R272 100K_0402_5%

100K_0402_5%

1 2

1000P_0402_50V7K

13

D

Q28

Q28 2N7002H_SOT23-3

2N7002H_SOT23-3

S

BT@

C353

1 2

+3VS

USB20_P6<19> USB20_N6<19>

BT_ACTIVE<23>

ON/OFF#

51_ON#

12

2

C356

@

0.1U_0402_16V4Z

3 1

2

AP2301GN-HF_SOT23-3

Q32

BT@

1

D15

RLZ20A_LL34

+3VS_BT_R

USB20_P6 USB20_N6

BT_ACTIVE

@

BTON_LED

ON/OFF# < 27>

R583

0_0603_5%

1 2

BT@

+3VS_BT

30mils

NOVO#<27>

51_ON#<34>

1

C354

BT@

0.1U_0402_16V4Z

2

JBT1

1 2 3 4 5 6

ACES_87213-0600G

Power Bottom Board Conn. 6pin

10/11 Change JPWRB1 P/N from SP010009O10 to SP01000LB00

Add C359 to PWR_LED# for ESD solution.

+5VALW

JPWRB1

1 2 3 4 5 6 7 8

ACES_85201-0605N

ME@

PVT ESD solution.

CardReader

USB20_P4<19>

USB20_N4<19>

USB20_P4

USB20_N4

R296

100K_0402_5%

NOVO#

51_ON#

ME@J BT1

ME@

1 2 3 4

7

5

G1

8

6

G2

PWR_LED#<27,32>

+3VALW

1 2

NOVO_BTN# ON/OFFBTN#

D44

2

3

1

DAN202UT106_SC7 0-3

NOVO_BTN#

+3VS

1 2 3 4 5 6 GND GND

4

1

WCM-2012-900T_ 4P

NOVO_BTN#

ON/OFFBTN#

2

3

D19

D19 PJSOT24C 3P C/A SOT-23

PJSOT24C 3P C/A SOT-23

1

EMI REQUEST 1ST = SCA00000E00

2ST = SCA00000R00

+5VALW NOVO_BTN# ON/OFFBTN#

C360

1

C364

C365

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

+5VALW

PWR_LED#

2

3

D49

D49 AZ5125-02S.R7G_SOT23-3

AZ5125-02S.R7G_SOT23-3

1

Card Reader/Audio Jack SB CONN

PLUG_IN<26> HP_OUTR<26> HP_OUTL<26 >

MIC_JD<26> EXT_MIC_L<26> EXT_MIC_R<26>

R926 0 _0402_5%R926 0_0402_5% R925 0 _0402_5%R925 0_0402_5%

L65

@L65

@

4

1

PLUG_IN

MIC_JD

2

3

1

PLUG_IN HP_OUTR HP_OUTL

MIC_JD

EXT_MIC_L EXT_MIC_R

12 12

USB20_P4_R

3

USB20_N4_R

2

D7

D7 PESD5V0U2BT 3P

PESD5V0U2BT 3P

USB20_P4_R USB20_N4_R

HP_OUTR

HP_OUTL

2

3

D8

D8 PESD5V0U2BT 3P

PESD5V0U2BT 3P

1

10 11 12

@

PWR_LED#

1

2

0.1U_0402_16V4Z

JCR1

1

2

3

4

5

6

7

8

9

9 10 11

GND

12

GND

ACES_85201-1205N

ME@

EXT_MIC_L

EXT_MIC_R

2

3

D9

D9 PESD5V0U2BT 3P

PESD5V0U2BT 3P

@

1

C359

13 14

Security Classification

2010/09/10 2010/08/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

Compal Electronics,Ltd.

Title

Audio Jack & SW & BT Conn.

Size Document Num ber Rev

B

Date: Sheet of

LA7011P

30 41Friday, December 24, 2010

1.0

A

B

C

D

E

+VSB

12

R229

R229 10K_0402_5%

10K_0402_5%

5VS_GATE

13

D

1 1

2 2

12

R142

R142 470_0603_5%

470_0603_5%

@

13

D

2

G

Q10

S

2N7002H_SOT23-3

@

SUSP

D

2

G

S

1

C279

C279 10U_0805_10V4Z

10U_0805_10V4Z

2

+1.5V+1.8VS +0.75VS+1.05VS

12

R342

R342 470_0603_5%

470_0603_5%

@

13

D

SYSON# SUSPSUSP SUSP

2

G

Q35

S

2N7002H_SOT23-3

@

R228

10K_0402_5%

Q20

Q20 2N7002H_SOT23-3

2N7002H_SOT23-3

+5VALW

5 6 7 8

U10

U10 AO4468L_SO8

AO4468L_SO8

12

4

12

R143

R143 470_0603_5%

470_0603_5%

@

13

D

Q11

S

2N7002H_SOT23-3

@

Change U10 from SB548000320 to SB000009510 Change U14 from SB548000320 to SB000009510

5VS_GATE_R

2

G

3 2 1

1

2

+5VS

1

C277

C277 10U_0805_10V4Z

10U_0805_10V4Z

2

C278

0.1U_0603_25V7K

12

R568

R568 470_0603_5%

470_0603_5%

@

13

D

S

1

C276

C276 1U_0603_10V4Z

1U_0603_10V4Z

2

G

Q40

Q40 2N7002H_SOT23-3

2N7002H_SOT23-3

@

12

R202

R202 470_0603_5%

470_0603_5%

@

13

D

G

Q16

S

2N7002H_SOT23-3

@

SUSP

2

SUSP

Pre MP Change SUSP pull high from +5VALW to +3VLP

3 3

SUSP<39>

SUSP#<27,38> SYSON<27,39>

+3VLP

R4

SUSP

DTC124EKAT146_SC59-3

12

R4 100K_0402_5%

100K_0402_5%

Q45

2

IN

+5VALW

12

@

1

3

PVT Change R5 from 100Kto 10K .

R5

R5 10K_0402_5%

10K_0402_5%

OUT

GND

100K_0402_5%

SYSON#

DTC124EKAT146_SC59-3

SYSON

+5VALW

12

@

R6

Q2

1

@

OUT

2

IN

GND

3

+VSB

2

G

+VSB

12

1.5VS_GATE

Q33

13

D

2

G

2N7002H_SOT23-3

S

12

R89

R89 47K_0402_5%

47K_0402_5%

3VS_GATE

13

D

Q46

Q46 2N7002H_SOT23-3

2N7002H_SOT23-3

S

1

C127

C127 10U_0805_10V4Z

10U_0805_10V4Z

2

100K_0402_5%

100K_0402_5% R312

R312

1

C389

C389 10U_0805_10V4Z

10U_0805_10V4Z

2

3VS_GATE_R

12

R88 0_0402_5%R88 0_0402_5%

+3VALW

5 6 7 8

U4

U4 AO4468L_SO8

AO4468L_SO8

R313 0_0402_5%R313 0_0402_5%

12

5 6 7 8

U16

U16 AO4468L_SO8

AO4468L_SO8

+3VALW TO +3VS+5VALW TO +5VS

1

C144

0.1U_0603_25V7K

2

+3VS

4

3 2

1

C134

C134 10U_0805_10V4Z

10U_0805_10V4Z

2

Change U16 from SB548000320 to SB000009510

1.5VS_GATE_R

4

1

2

0.1U_0603_25V7K

+1.5VS+1.5V

3 2

1

2

C373

@

C362

C362 10U_0805_10V4Z

10U_0805_10V4Z

1

C135

C135 1U_0603_10V4Z

1U_0603_10V4Z

2

+1.5V to +1.5VS

1

C361

0.1U_0603_25V7K

2

1

C363

C363 1U_0603_10V4Z

1U_0603_10V4Z

2

12

R87

R87 470_0603_5%

470_0603_5%

@

13

D

2

G

Q6

S

2N7002H_SOT23-3

@

12

R314

R314 470_0603_5%

470_0603_5%

@

13

D

2

G

Q34

S

2N7002H_SOT23-3

@

SUSP

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2010/09/10 2010/08/19

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DC Interface

LA7011P

31 41Friday, December 24, 2010

E

1.0

5

4

3

2

1

Lid Switch

+3VALW

R614

1 2

0_0402_5%

D D

0_0402_5%

0.1U_0402_16V4Z

C694

+VCC_LID

1

2

U32

R615

100K_0402_5%

1 2

2

VDD

3

OUTPUT

GND

1

S-5711ACDL-M3T1S_SOT23-3

2

C695

10P_0402_50V8J

1

LID_SW# <27>

Kill Switch

STATUS 1,2(LOW) 2,3(HI) ON

+3VALW

R617

R617 100K_0402_5%

100K_0402_5%

12

KILL_SW#<27>

OFF

SW2

3

2

1

LSSM12-P-V-T-R_3P

KSI[0..7]<27>

KSO[0..15]<27>

PVT Change U32 part number from SA032120010 to SA000031C00

LED

LED1

PWR_LED#<27,30>

C C

B B

CHARGE_LED1#<27>

CHARGE_LED0#<27>

WLAN_LED#<23>

BT_LED#<30>

HDD_LED#<18>

Orange

White

BATT_LOW_LED#

BATT_CHG_LED#

D22

RB751V_SOD323

D23

RB751V_SOD323

White

19-213A-T1D-CP2Q2HY-3T_WHITE

18-225A-S2T3D-C01-3T_ORG-WHITE

White

21

19-213A-T1D-CP2Q2HY-3T_WHITE

21

White

19-213A-T1D-CP2Q2HY-3T_WHITE

ODD Power Control

J9

@ J9

@R677

@

112

JUMP_43X79

3 1

AP2301GN-HF_SOT23-3

2

1 2

Q99

C613

11/05 Add this function.

+5VS +5VS_ODD

12

R552

@ R552

@

10K_0402_5%

1

OUT

ODD_EN<19>

A A

2

IN

GND

3

5

R677

1 2

100K_0402_5%

@

Q100

Q100 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

LED1

LED2

O

W

LED3

LED4

2

@Q99

@

0.01U_0402_16V7K@

4

LED1_5V

21

LED2_3V

21

LED2_5V

43

LED3_5V

21

LED4_5V

21

1

C611

C611 10U_0805_10V4Z

10U_0805_10V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF CO MPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF CO MPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

12

+5VALW

R622300_0402_5% R622300_0402_5%

12

+3VALW

R623300_0402_5% R623300_0402_5%

12

+5VALW

R624470_0402_5% R624470_0402_5%

12

+5VS

R627300_0402_5% R627300_0402_5%

12

+5VS

R628300_0402_5% R628300_0402_5%

1

C612

0.1U_0402_16V4Z

2

2010/09/10 2010/08/19

3

CONN PIN define need double check

SATA_ITX_C_DRX_P1<18> SATA_ITX_C_DRX_N1<18>

SATA_DTX_C_IRX_N1<18>

SATA_DTX_C_IRX_P1<18>

Compal Secret Data

Reserve for ESD.

TP_CLK<27> TP_DATA<27>

ODD_DA#<19,27>

+3VS

Deciphered Date

1 2

R555

@R555

@

1 2

INT_KBD Conn.

KSI[0..7]

KSO[0..15]

KSO0

C721100P_0402_50V8J C721100P_0402_50V8J

12

KSO1

C722100P_0402_50V8J C722100P_0402_50V8J

12

KSO2

C723100P_0402_50V8J C723100P_0402_50V8J

12

KSO3

C724100P_0402_50V8J C724100P_0402_50V8J

12

KSO4

C725100P_0402_50V8J C725100P_0402_50V8J

12

KSO5

C726100P_0402_50V8J C726100P_0402_50V8J

12

KSO6

C727100P_0402_50V8J C727100P_0402_50V8J

12

KSO7

C728100P_0402_50V8J C728100P_0402_50V8J

12

KSO8

C729100P_0402_50V8J C729100P_0402_50V8J

12

KSO9

C730100P_0402_50V8J C730100P_0402_50V8J

12

KSO10

C731100P_0402_50V8J C731100P_0402_50V8J

12

KSO11

C732100P_0402_50V8J C732100P_0402_50V8J

12

KSO12

C733100P_0402_50V8J C733100P_0402_50V8J

12

KSO13

C734100P_0402_50V8J C734100P_0402_50V8J

12

KSO14

C735100P_0402_50V8J C735100P_0402_50V8J

12

KSO15

C736100P_0402_50V8J C736100P_0402_50V8J

12

KSI0

C737100P_0402_50V8J C737100P_0402_50V8J

12

KSI1

C738100P_0402_50V8J C738100P_0402_50V8J

12

KSI2

C739100P_0402_50V8J C739100P_0402_50V8J

12

KSI3

C740100P_0402_50V8J C740100P_0402_50V8J

12

KSI4

C741100P_0402_50V8J C741100P_0402_50V8J

12

KSI5

C742100P_0402_50V8J C742100P_0402_50V8J

12

KSI6

C743100P_0402_50V8J C743100P_0402_50V8J

12

KSI7

C744100P_0402_50V8J C744100P_0402_50V8J

12

check connector & pin define.

+5VS

C701

0.1U_0402_16V4Z

1

@

C699

C699 100P_0402_50V8J

100P_0402_50V8J

2

1

@

C700

C700 100P_0402_50V8J

100P_0402_50V8J

2

SATA ODD Conn.

C428 0.01U_0402_16V7KC428 0.01U_0402_16V7K

1 2

C431 0.01U_0402_16V7KC431 0.01U_0402_16V7K

1 2

C437 0.01U_0402_16V7KC437 0.01U_0402_16V7K

1 2

C439 0.01U_0402_16V7KC439 0.01U_0402_16V7K

1 2

R717

@R717

@

ODD_DA#

10K_0402_5%

0_0402_5%

ODD_DETECT#

R554

@R554

@

1 2

2

JKB1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

ME@

100P_0402_50V8J@

31

G1

32

G2

Reserve for ESD.

+5VS

NUM_LED#<27>

CAPS_LED#<27>

12 12

100P_0402_50V8J

C654

@

KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10

KSO15

R130300_0402_5% R130300_0402_5% R129300_0402_5% R129300_0402_5%

2

1

ACES_85201-3005N

C653

To TP/B Conn.

Add for ESD solution.

TP_CLK

JTP1

4

TP_CLK TP_DATA

SATA_ITX_DRX_P1 SATA_ITX_DRX_N1

SATA_DTX_IRX_N1 SATA_DTX_IRX_P1

+5VS_ODD

0_0402_5%

Title

KB/TP/LID/KLL/ODD/LED FOR 14

Size Document Number Rev

Custom

Date: Sheet of

4

3

2

1

E&T_6905-E04N-00R

ME@

JODD1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

11 12 13

Compal Electronics, Inc.

GND

MD

GND GND GND

OCTEK_SLS-13SB1G_RV

ME@

LA7011P

2

3

1

17 16

1

TP_DATA

D48

PESD5V2S2UT_SOT23-3

32 41Friday, December 24, 2010

1.0

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1 for HW

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

1

D D

C C

B B

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

A A

31

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW PIR

LA7011P

33 41Friday, December 24, 2010

1

1.0

5

4

3

2

1

12

PC123

1000P_0402_50V7K

12

PR9

PR9 68_1206_5%

68_1206_5%

+CHGRTC

+3VLP

VIN

Precharge detector

15.97V/14.84V FOR ADAPTOR

12

PC4

PC3

100P_0402_50V8J

1000P_0402_50V7K

VS

VIN

ACOFF<27,36>

+5VALW<20,22,27,28,29,30,31,32,37,38,39>

PR1

PR1 1K_1206_5%

1K_1206_5%

1 2

PR2

PR2 1K_1206_5%

1K_1206_5%

1 2

PR3

PR3 1K_1206_5%

1K_1206_5%

1 2

PR6

PR6 1K_1206_5%

1K_1206_5%

1 2

PreCHG

PD4

2

3

RB715F_SOT323-3

1

PD1

12

LL4148_LL34-2

@

2

12

PR4

100K_0402_1%

13

PQ1

TP0610K-T1-E3_SOT23-3

12

PR5

100K_0402_1%

PQ2

PQ2 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

2

13

@

2

12

PR7

100K_0402_1%

13

PQ3

PQ3 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

B+

PR12

2.2M_0402_5%

12

VL

12

PR14

100K_0402_1%

MAINPWON<35,37>

ACON<36>

PD5

2

1

3

RB715F_SOT323-3@

12

PC8

0.1U_0603_25V7K

6251VREF

LM393DG_SO8

PU1A

1

O

VS

8

P

+

-

G

4

PR19

34K_0402_1%

12

PC7

0.01U_0402_25V7K

3

2

12

PC9

1000P_0402_50V7K

12

PR21

66.5K_0402_1%

1 2

12

PR15

205K_0402_1%

PRG++

2N7002W-T/R7_SOT323-3

13

D

PQ5

2

G

S

47K_0402_1%

13

PR13

499K_0402_1%

@

12

PR16

499K_0402_1%

PR20

12

PQ6

PQ6 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

2

+5VALW

PC10

0.01U_0402_25V7K

PACIN<36>

DC030006J00

PF1

APDIN

4

3

2

D D

C C

B B

2

1

@

4602-Q04C-09R 4P P2.5

4602-Q04C-09R 4P P2.5 JDCIN1

JDCIN1

BATT+

51_ON#<30>

JRTC1

- +

ML1220T13RE

45@

PD3

LL4148_LL34-2

PR10

100K_0402_1%

PR11

22K_0402_1%

1 2

12

+RTCBATT

APDIN1

21

N1

12

PC5

0.22U_0603_25V7K

12

PC122

1000P_0402_50V7K

TP0610K-T1-E3_SOT23-3

+RTCBATT

560_0603_5%

1 2

12

PQ4

PR17

PC1

2

PF1

7A_24VDC_429007.WRML

SMB3025500YA_2P

12

1000P_0402_50V7K

560_0603_5%

1 2

PL1

1 2

PC2

100P_0402_50V8J

VIN

13

PR18

PD2

PD2 LL4148_LL34-2

LL4148_LL34-2

1 2

12

PR8

PR8 68_1206_5%

68_1206_5%

12

PC6

0.1U_0603_25V7K

1 2

12

PD6

RB751V-40_SOD323-2

ACIN

Precharge detector Min. typ. Max.

A A

L-->H 14.991V 15.381V 15.782V H-->L 13.860V 14.247V 14.621V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

2

BATT ONLY

Precharge detector

Min. typ. Max. L-->H 7.196V 7.349V 7.505V H-->L 6.138V 6.214V 6.056V

Compal Electronics, Inc.

Title

DCIN / Vin Detector /Pre-charge

Size Document Number Rev

Custom

Date: Sheet of

1.0

34 41Friday, December 24, 2010

1

1.0

5

4

3

2

1

JBATT1

1

2

EC_SMCA

3

EC_SMDA

4

D D

C C

4

5

6

7

8

GND

9

GND

TYCO_1775789-1

@

1 2

PR28

6.49K_0402_1%

1 2

PR30

PR30 10K_0402_1%

PD16

PJSOT24C@

10K_0402_1%

2

3

1

VMB2

PR33

PR33 649K_0402_1%

649K_0402_1%

PR35

10K_0402_1%

1 2

PR36

PR36 232K_0402_1%

VMB2

B B

232K_0402_1%

1 2

12

PC14

5

6

PR38

PR38 10K_0402_1%

10K_0402_1%

PF2

PF2 12A_65V_451012MRL

12A_65V_451012MRL

+3VALW

VS

0.01U_0402_25V7K

5.1M_0402_5%

8

P

+

O

-

G

LM393DG_SO8

4

12

21

BATT_TEMP < 27>

PR34

1 2

7

PU1B

6251VREF

VMB

12

2

3

1

+3VALW

PR31

PR31 100K_0402_1%

100K_0402_1%

1 2

BATT_LEN#<27>

PL2

SMB3025500YA_2P

1 2

PC11

PC11 1000P_0402_50V7K

1000P_0402_50V7K

100_0402_1%

1 2

PD15

PJSOT24C@

+3VS

1 2

13

D

2

G

S

PR23

PR22

100_0402_1%

A/D

PR32

PR32 10K_0402_1%

10K_0402_1%

PQ7

2N7002W-T/R7_SOT323-3

2

G

BATT+

12

PC12

0.01U_0402_25V7K

PQ44

13

D

2N7002W-T/R7_SOT323-3

S

EC_SMB_CK1 <27>

EC_SMB_DA1 <27>

BATT_OUT <36>

100K_0402_1%

SPOK<19,37>

PR40

VL

1 2

0.1U_0603_25V7K

PR41

PR41 1K_0402_1%

1K_0402_1%

1 2

PC13

12

VL

2

G

PC17

PH1 under CPU botten side :

CPU thermal protection at 92 degree C Recovery at 56 degree C

12

B+

PR39

22K_0402_1%

1 2

13

D

PQ9

2N7002W-T/R7_SOT323-3

S

PU2

1

VCC

2

GND

3

OT1

4

OT2

G718TM1U_SOT23-8

12

PR37

100K_0402_1%

TMSNS1

RHYST1

TMSNS2

RHYST2

PC15

PR24

10K_0402_1%

8

7

6

5

PQ8

TP0610K-T1-E3_SOT23-3

2

0.22U_0603_25V7K

12

1 2

12

PH1

PR29

100K_0402_1%_TSM0B104F4251RZ

47K_0402_1%@

1 2

PH2

PH2 100K_0402_1%_TSM0B104F4251RZ@

100K_0402_1%_TSM0B104F4251RZ@

13

12

0.1U_0603_25V7K

+VSBP

12

PR25

21.5K_0402_1%

PR27

9.76K_0402_1%

1 2

+VSBP

PC16

VL

1 2

PJ1

PJ1 JUMP_43X39@

JUMP_43X39@

112

PR26

PR26 100K_0402_1%@

100K_0402_1%@

MAINPWON <34,37>

2

+VSB

1U_0402_6.3V6K

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

BATTERY CONN/OTP

35 41Friday, December 24, 2010

1

1.0

5

PQ10

AO4407A_SO8

VIN

D D

C C

B B

BATT_ON

2

ACOFF<27,34>

BATT_OUT<35>

12

PR43

61

2N7002KDW-2N_SOT363-6

PACIN<34>

ACON<3 4>

PR65

PR65 10K_0402_1%

10K_0402_1%

BATT_OUT

2N7002W-T/R7_SOT323-3

8 7

5

PQ13

PDTA144EU

47K_0402_1%

2

13

2

PQ16A

PACIN

1 2

PDTC115EU_SOT323-3

ACOFF-1

1 2

2

G

PQ23

4

PQ14

1 3

PDTC115EU_SOT323-3

PR59

47K_0402_1%

PQ21

2

PR66

PR66 0_0402_5%

0_0402_5%

1 2

13

D

S

P2

1 2 36

12

PR44

PC21

0.1U_0603_25V7K

P2-1

12

P2-2

34

5

13

IREF<27>

PQ11

PQ11 AO4409_SO8

AO4409_SO8

1 2 3 6

4

200K_0402_1%

12

PR53

PR53 10K_0402_1%

10K_0402_1%

PR54

13

D

BATT_OUT

2

G

150K_0402_1%

S

PQ17

2N7002W-T/R7_SOT323-3

PQ16B

PQ16B 2N7002KDW-2N_SOT363-6

2N7002KDW-2N_SOT363-6

0.01U_0402_25V7K

ADP_I<27 >

PR68

154K_0402_1%

PR71

100K_0402_1%

Connect to EC A/D Pin.

CHGVADJ=(Vcell-4)/0.10627

Vcell

4V

4.2V

4.35V

CC=0.25A~3A

IREF=1.016*Icharge

IREF=0.254V~3.048V

CHGVADJ

0V

1.882V

3.2935V

DIS CP mode (65W*85%) Vaclim=2.39*((2.2K//152K)/(2.2K//152K+21K//152K))=0.25136V Iinput=(1/0.02)((0.05*Vaclim)/2.39+0.05) where Vaclim=0.25136V, Iinput=2.76293A

PR70=21K

PR73=2.2K

PR42=20mohm

VCHLIM need over 95mV

4

P3

PR42

8 7

5

PC131

PC131 5600p_0402_25V7K

5600p_0402_25V7K

1 2

PR50

0_0402_5%

FSTCHG<27>

PC29 6800P_0402_25V7KPC29 6800P_0402_25V7K

6251_VCOMP-1

6251VREF

12

PC37

0.01U_0402_25V7K

1 2

PR61 10K_0402_1%PR 61 10K_040 2_1%

1 2

PC32

0.1U_0402_16V7K

PC30

1 2

12

CHGVADJ<27>

0.02_1206_1%

1

2

12

PR56

1 2

PR70

PR70 21K_0402_1%

21K_0402_1%

1 2

2.2K_0402_1%

PR74

15.4K_0402_1%

1 2

PR42

4

3

CSIN CSIP

6251_VDD

12

PC24

2.2U_0603_10V7K

ACSETIN

6251_EN CSON

100K_0402_1%

CELLS

6251_ICOMP

6251_VCOMP

6251_ICM

1 2

PR63

PR63 100_0402_1%

100_0402_1%

6251VREF

6251_CHLIM

6251_ACLIM

12

6251_VADJ

PR73

12

PR75

31.6K_0402_1%

ACPRN<37>

B+

12

PC126

10U_0805_25V6K

RB751V-40_SOD323-2

PU3

1

VDD

2

ACSET

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

ICM

8

VREF

9

CHLIM

10

ACLIM

11

VADJ

12

GND

ISL6251AHAZ-T_QSOP24

PR78

47K_0402_1%

ACPRN

DCIN

ACPRN

CSON

CSOP

CSIN

CSIP

PHASE

UGATE

BOOT

VDDP

LGATE

PGND

12

PC127

10U_0805_25V6K

PD7

PR51

10_1206_5%

24

23

22

21

20

19

18

17

16

15

14

13

6251_VDD

2

3

1.2UH_1231AS-H-1R2N=P3_2.9A_30%

12

PC128

10U_0805_25V6K

VIN

12

PR46

191K_0402_1%

1 2 12

PR52

14.3K_0402_1%

PC25

0.1U_0603_25V7K

6251_DCIN

12

ACPRN

6251_CSON

12

PC28

0.047U_0402_16V7K

6251_CSOP

1 2

20_0402_5%

6251_CSIN

BST_CHG

DL_CHG

12

13

20_0402_5%

PC31

0.1U_0402_16V7K

6251_CSIP

1 2

LX_CHG

DH_CHG

PR69

0_0603_5%

1 2

6251_VDDP

12

PR79

PR79 10K_0402_1%

10K_0402_1%

PQ25

PQ25 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

PL11

1 2

PC137

0.1U_0402_25Y5V

PreCHG

12

PR47

PR47 191K_0402_1%

191K_0402_1%

@

ACSETIN

12

PR57

20_0402_5%

1 2

PR58

PR60

PR60 20_0402_5%

20_0402_5%

1 2

PR62

2_0402_5%

0.1U_0603_25V7K

BST_CHGA

12

PD10

RB751V-40_SOD323-2

1 2

PC39

4.7U_0805_10V6K

PR80

10K_0402_1%

1 2

PACIN

12

PR83

14.3K_0402_1%

PC23

1000P_0402_50V7K

12

PC33

PR72

4.7_0402_5%

12

6251_VDD

ACIN <19,27>

2

CHG_B+

DISCHG_G

PC20

1 2

PC22

PC18

4.7U_0805_25V6-K

CSOP

PC20

1 2

PC19

2200P_0402_50V7K

4.7U_0805_25V6-K

6

578

4

123

6

578

4

123

PR45

47K_0402_1%

1 2

PR48

PR48 10K_0402_1%

10K_0402_1%

1 2

1SS355_SOD323-2

DISCHG_G-1

13

PQ15

PQ15 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

2

PR55

@

1 2

BATT_ON

@

100K_0402_1%

ACPRN

PQ19

AO4466L_SO8

10U_LF919AS-100M-P3_4.5A_20%

1 2

12

PQ22

AO4466L_SO8

6251_SN

PR67

4.7_1206_5%

12

PC38

680P_0603_50V7K

6251_VDD 6251_VD D

4cell : VDD 3cell : GND

CELLS

12

PR81

PR81 0_0402_5%

0_0402_5%

PQ24A

2N7002KDW-2N_SOT363-6@

AO4407A_SO8

1 2 3 6

ACOFF-1

PD8

1 2

12

PC26

2200P_0402_50V7K

13

D

2

G

S

PL3

PR76

PR76 100K_0402_1%@

100K_0402_1%@

1 2

61

2

PQ12

4

PD9

1SS355_SOD323-2

1 2

PQ20

@

2N7002W-T/R7_SOT323-3

CHGCHG

1

2

1 2

34

2N7002KDW-2N_SOT363-6@

8 7

5

PR49

PR49 200K_0402_1%

200K_0402_1%

1 2

D

12

S

PC27

0.1U_0603_25V7K

PR64

0.02_1206_1%

4

3

PR77

PR77 100K_0402_1%@

100K_0402_1%@

5

BATT_SEL_EC<27>

PQ24B

1

VIN

PQ18

2N7002W-T/R7_SOT323-3

13

PACIN

2

G

12

PC35

PC34

10U_0805_25V6K

12

PR82

PR82 0_0402_5%@

0_0402_5%@

BATT+

12

PC36

PC130

10U_0805_25V6K

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2010/08/192010/09/10

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CHARGER

1

1.0

36 41Friday, December 24, 2010

1.0

5

Note: Use TPS51125 IC can remove RTC refernece LDO Use TPS51427 IC must keep RTC refernece LDO

4

3

2

1

2VREF_8205

+3VALWP +3VALW

D D

PR84

13K_0402_1%

1 2

PR86

20K_0402_1%

BST_3V

UG_3V

LX_3V

LG_3V

PR93

@PR93

@

0_0402_5%

12

2VREF_8205

20K_0402_1%

1 2

PC119

2200P_0402_50V7K@

1 2

PR88

110K_0402_1%

1 2

PU4

25

7

8

9

10

11

12

PC56

1U_0603_10V6K

P PAD

VO2

VREG3

BOOT2

UGATE2

PHASE2

LGATE2

RT8205_B+

PJ5

B+

C C

B B

PJ5

2

112

JUMP_43X118@

12

PC129

1U_0603_25V6

MAINPWON<34,35>

12

PC41

PC42

0.1U_0603_25V7K

+3VALWP

150U_B2_6.3VM_R45M

PR97

PR97 0_0402_5%

0_0402_5%

12

PC43

4.7U_0805_25V6-K

12

PC44

4.7U_0805_25V6-K

2200P_0402_50V7K

4.7UH_FMJ-0630T-4R7 HF_5.5A_20%

1

+

PC52

2

2N7002KDW-2N_SOT363-6

VL

PL4

1 2

PQ30A

PR92

4.7_1206_5%

PC53

680P_0603_50V7K

61

100K_0402_1%

3 5

241

12

3 5

241

2

PR98

12

PQ28

PQ28 SI7716ADN-T1-GE3_PAK1212-8

SI7716ADN-T1-GE3_PAK1212-8

Typ: 175mA

12

PC45

4.7U_0805_10V6K

PQ26

PQ26 SIS412DN-T1-GE3_PAK1212-8

SIS412DN-T1-GE3_PAK1212-8

4.7U_0805_10V6K

0.1U_0603_25V7K

B+

ENTRIP2ENTRIP1

34

PQ30B

PQ30B 2N7002KDW-2N_SOT363-6

2N7002KDW-2N_SOT363-6

5

+3VLP

1 2

PC50

MAINPWON

PR95

499K_0402_1%

1 2

PR90

1 2

0_0603_5%

PR96

100K_0402_1%

12

PC40

1U_0603_10V6K

ENTRIP2

5

6

FB2

ENTRIP2

VFB=2.0V

SKIPSEL

EN

14

13

RT8205_B+

+5VALWP +5VALW

PR85

30K_0402_1%

1 2

PR87

20K_0402_1%

1 2

PC120

2200P_0402_50V7K@

1 2

PR89

121K_0402_1%

ENTRIP1

1 2

2

3

1

4

FB1

REF

TONSEL

ENTRIP1

24

VO1

23

PGOOD

BOOT1

UGATE1

PHASE1

LGATE1

NC18VREG5

VIN16GND

17

15

12

PC57

12

4.7U_0805_10V6K

PC58

0.1U_0603_25V7K

BST_5V

22

UG_5V

21

LX_5V

20

LG_5V

19

RT8205EGQW_WQFN24_4X 4

VL

Typ: 175mA

PC46

4.7U_0805_25V6-K

PR91

0_0603_5%

1 2

RT8205_B+

12

PC47

PC48

4.7U_0805_25V6-K

2200P_0402_50V7K

SPOK <19,35>

PC51

0.1U_0603_25V7K

1 2

12

PC49

0.1U_0603_25V7K

PQ29

PQ29 SI7716ADN-T1-GE3_PAK1212-8

SI7716ADN-T1-GE3_PAK1212-8

PJ3

2

112

JUMP_43X118@

PJ4

2

112

JUMP_43X118

@

PQ27

PQ27 SIS412DN-T1-GE3_PAK1212-8

SIS412DN-T1-GE3_PAK1212-8

3 5

241

4.7UH_FMJ-0630T-4R7 HF_5.5A_20%

1 2

12

PR94

4.7_1206_5%

12

PC55

3 5

PC55

241

680P_0603_50V7K

PL5

+5VALWP

1

+

PC54

PC54 150U_B2_6.3VM_R45M

150U_B2_6.3VM_R45M

2

13

PQ31

PQ31 PDTC115EU_SOT323-3

4

PDTC115EU_SOT323-3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

2

TONSEL=VREF (1)SMPS1=300KHZ(+5VALWP) (2)SMPS2=375KHZ(+3VALWP)

Compal Electronics, Inc.

Title

3VALWP/5VALWP

Size Document Number Rev

Custom

Date: Sheet of

37 41Friday, December 24, 2010

1

1.0

PR99

200K_0402_1%

ACPRN<36>

EC_ON<27,30>

A A

12

2

5

2

G

13

PQ33

PQ33 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

13

D

S

VS

PQ32

2N7002W-T/R7_SOT323-3

1 2

PR100

100K_0402_1%

12

2

12

PC59

PR101

40.2K_0402_1%

2.2U_0603_10V7K

5

D D

PR103

150k_0402_1%

SUSP#<27,31>

+5VALW

C C

1 2

PR106

100_0603_5%

1 2

PC65

4.7U_0603_6.3V6K

12

PC62

PC62 .1U_0402_16V7K

.1U_0402_16V7K

12

PR108

4.12K_0402_1%

1 2

12

PR109

PR109 10K_0402_1%

10K_0402_1%

4

PR102

255K_0402_1%

1 2

1

PU5

2

TON

EN/DEM

3

VOUT

4

VDD

5

FB

6

PGOOD

GND7PGND

PR104

1 2

2.2_0603_5%

14NC15

BOOT UGATE

PHASE

CS

VDDP

LGATE

RT8209BGQW_WQFN14_3P 5X3P5

8

13

12

11

10

9

PD13

1 2

1SS355_SOD323-2

@

BST_VCCP

DH_VCCP

LX_VCCP

1 2

PR107

11K_0402_1%

DL_VCCP

+5VALW

PC63

1 2

0.1U_0603_25V7K

+5VALW

12

PC67

4.7U_0805_10V6K

PQ35

AO4726L_SO8

3

1.1VALW_B+

12

786

5

PQ34

PQ34 AO4406AL_SO8

578

3 6

AO4406AL_SO8

123

241

4

12

PC132

680P_0402_50V7K

1.8UH_MSCDRI-104A-1R8N-E_9.5A_30%

1 2

12

PR105

4.7_1206_5%

12

PC66

680P_0603_50V7K

12

PC60

PC133

680P_0402_50V7K

PL6

PC60

PC134

4.7U_0805_25V6-K

680P_0402_50V7K

PC64

220U_6.3V_M

2

PJ6

2

112

JUMP_43X118@

12

PC61

PC135

4.7U_0805_25V6-K

0.1U_0402_25Y5V

+VCCPP

1

+

2

B+

12

PC124

1U_0603_25V6

PJ7

2

@

JUMP_43X118

1

112

+1.05VS+VCCPP

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VCCP

38 41Friday, December 24, 2010

1

1.0

5

PR111

0_0402_5%

+5VALW

SUSP<31>

1 2

PR112

PR115

100_0603_5%

1 2

4.7U_0603_6.3V6K

47K_0402_1%

12

1 2

12

PC76

PR118

10K_0402_1%

PC70

@PC70

@

.1U_0402_16V7K

PR117

10.2K_0402_1%

1 2

12

+1.5VP

PR120

0_0402_5%

1 2

100K_0402_1%

12

SYSON<27,31>

D D

C C

B B

SUSP<31>

A A

4

PR110

255K_0402_1%

1 2

12

PR165

PC80

PC80 .1U_0402_16V7K

.1U_0402_16V7K

@

PQ38

PQ38 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

13

D

2

G

S

PR123

31.6K_0402_1%

1 2

PC85

0.1U_0402_16V7K

PU6

2

TON

3

VOUT

4

VDD

5

FB

6

PGOOD

PC121

0.1U_0402_16V7K

PC83

4.7U_0603_6.3V6K

2

G

12

1

14NC15

BOOT UGATE

EN/DEM

PHASE

VFB=0.75V

LGATE

GND7PGND

RT8209BGQW_WQFN14_3P 5X3P5

8

1.5V_PGOOD <8>

+1.5V

PC77

4.7U_0603_6.3V6K

+3VS

1

PJ12

1

JUMP_43X79

2

12

1K_0402_1%

13

D

S

PQ39

2N7002W-T/R7_SOT323-3

VDDP

PR122

CS

2

1

12

1 2

PR113

0_0603_5%

13

12

11

10

9

PJ10

PJ10 JUMP_43X79

JUMP_43X79

@

PR121

12

LDO_1.8V_REF

12

PR124

1.24K_0402_1%

DH_1.5V

LX_1.5V

DL_1.5V

12

PR119

PR119 1K_0402_1%

1K_0402_1%

12

1K_0402_1%

LDO_1.8V_IN

PC87

1 2

PD14

1SS355_SOD323-2@

PC79

0.1U_0402_16V7K

12

0.1U_0402_16V7K

BST_1.5V-1

12

PR116

12

PC81

12

3

+5VALW

12

11K_0402_1%

PU7

2

3

4

G2992F1U_SO8

12

10U_0603_6.3V6M

PU8

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

12

PC86

10U_0603_6.3V6M

PC71

0.1U_0603_25V7K

1 2

+5VALW

PC73

4.7U_0805_10V6K

VIN1VCNTL

GND

VREF

VOUT

PC82

12

10U_0603_6.3V6M

NC

TP

PC88

10U_0603_6.3V6M

6

5

NC

7

NC

8

NC

9

TP

+0.75VSP

6

5

7

8

9

+1.8VSP

PQ37

AO4726L_SO8

PC138

12

786

5

4

578

3 6

241

12

.1U_0402_16V7K

+5VS

PC84

PC84 1U_0603_6.3V6M

1U_0603_6.3V6M

PQ36

PQ36 AO4406AL_SO8

AO4406AL_SO8

123

12

PC78

PC78 1U_0603_6.3V6M

1U_0603_6.3V6M

2

1.5_51117_B+

12

PC68

4.7U_0805_25V6-K

PL7

1.8UH_MSCDRI-104A-1R8N-E_9.5A_30%

12

PR114

4.7_1206_5%

12

PC74

680P_0603_50V7K

PL7

1 2

+3VALW

+1.5VP

PJ9

JUMP_43X118@

112

1

112

+1.5V

+0.75VS+0.75VSP

+1.8VS+1.8VSP

PJ8

2

112

JUMP_43X118@

12

PC69

4.7U_0805_25V6-K

1

+

PC72

2

220U_6.3V_M

+1.5VP

B+

12

PC125

1U_0603_25V6

12

PC139

1U_0603_25V6

2

PJ11

2

JUMP_43X118@

PJ13

2

JUMP_43X118@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

1.5VP/1.8VSP/0.75VSP

39 41Friday, December 24, 2010

1

1.0

5

4

3

2

1

VR_ON<27>

12

PR125

D D

C C

CPU_CSP1

PR140 470_0402_1%PR140 470_0402_1%

CPU_CSN1

PR143 470_0402_1%PR143 470_0402_1%

CPU_CSN2

PR144 470_0402_1%PR144 470_0402_1%

CPU_CSP2

PR145 470_0402_1%PR145 470_0402_1%

B B

12

PC102

100P_0402_50V8J

12

PC113

100P_0402_50V8J

12

CLK_ENABLE#<19>

1 2

PR153

100_0402_1%

VGATE<8,19>

CPU_VREF

1 2

PR138

4.75K_0402_1%

1 2

PC98 68P_0402_50V8JPC98 68P_0402_50V8J

1 2

PC99 0.22U_0603_10V7KPC99 0.22U_0603_10V7K

1 2

PC103 33P_0402_50V8KPC103 33P_0402_50V8K

1 2

PC105 33P_0402_50V8KPC105 33P_0402_50V8K

1 2

PC107 33P_0402_50V8KPC107 33P_0402_50V8K

1 2

PC114 33P_0402_50V8KPC114 33P_0402_50V8K

12

PR147

0_0402_5%

PR147

0_0402_5%

12

VSSSENSE

1 2

PR128

PR128 0_0402_5%@

0_0402_5%@

1U_0603_10V6K

CPU_DROOP

CPU_VREF

CPU_CSP1-2

CPU_CSN1-1

CPU_CSN2-1

CPU_CSP2-2

CPU_GNDSNS

CPU_VSNS

12

PR148

0_0402_5%

PR148

0_0402_5%

12

PR154

PR154 100_0402_1%

100_0402_1%

<6>

VCCSENSE

+CPU_CORE

PR125

PC97

CPU_THERM

12

PR150

PR150 20K_0402_1%

20K_0402_1%

+3VS

12

PR127

PR126

10K_0402_1%

1.91K_0402_1% @

1.91K_0402_1%

1

2

3

4

5

6

7

8

9

10

<6>

+3VS +5VS

12

PR130

0_0402_5%

PR130

0_0402_5%

PR129

0_0402_5%@

PR129

0_0402_5%@

12

CPU_VREF

12

41

GND

DROOP

VREF

GND

CSP1

CSN1

CSN2

CSP2

GNDSNS

VSNS

THERM

12

PR133 124K _0402_1%PR133 124K_0402_1%

PR135 0_0402_5%PR135 0_0402_5%

PR134 0_0402_5%PR134 0_0402_5%

CPU_OSRSEL

CPU_TONSEL

CPU_V5FILT

40

V5FILT

VR_TT#11DPRSTP#12PSI#13VID614VID515VID416VID317VID218VID119VID0

CPU_TRIPSEL

CPU_ISLEW

36

37

38

39

ISLEW

TONSEL

OSRSEL

TRIPSEL

PU9

TPS51620RHAR_QFN40_6X6

VID5

VID6

PSI#

CPU_DPRSTP#

12

1 2

PR157 0_0402_5%PR157 0_0402_5%12PR156 0_0402_5%PR156 0_0402_5%

PR158 0_0402_5%PR158 0_0402_5%

PR159 0_0402_5%PR159 0_0402_5%

H_PSI#

CPU_VID5

CPU_VID6

H_DPRSTP#

VR_ON

DPRSLPVR

12

1 2

PR131 0_0402_5%PR131 0_0402_5%

PR132 0_0402_5%PR132 0_0402_5%

CPU_CLK_EN#

CPU_VR_ON

CPU_DPRSLPVR

32

33

34

35

VR_ON

CLK_EN#

PWRMON

DPRSLPVR

VID1

VID2

VID3

VID4

1 2

PR161 0_0402_5%PR161 0_0402_5%

PR163 0_0402_5%PR163 0_0402_5%

PR162 0_0402_5%PR162 0_0402_5%

PR160 0_0402_5%PR160 0_0402_5%

<5>

<6>

<5,8,18>

CPU_VID3

CPU_VID2

CPU_VID1

CPU_VID4

31

20

VID0

1 2

<6>

CPU_VID0

PGOOD DRVH1

VBST

DRVL1

V5IN

PGND

DRVL2

VBST2

DRVH2

PR164 0_0402_5%PR164 0_0402_5%

<27>

30

29

28

LL1

27

26

25

24

23

LL2

22

21

<6>

<8,19>

UGATE_CPU1

BOOT_CPU1

PHASE_CPU1

LGATE_CPU1

1 2

PC106 10U_0603_6.3V6MPC106 10U_0603_6.3V6M

LGATE_CPU2

PHASE_CPU2

BOOT_CPU2

UGATE_CPU2

<6>

1 2

2.2_0603_5%

PR142

1 2

3.3_0603_5%

PR146

1 2

3.3_0603_5%

1 2

2.2_0603_5%

PR166

+5VS

1 2

BOOT_CPU1-1

PC100

0.22U_0603_10V7K

+5VS

PC116

0.22U_0603_10V7K

1 2

PD12

PR167

1SS355_SOD323-2

TPCA8028-H_SOP-ADVANCE8-5

PD11

PD11 1SS355_SOD323-2

1SS355_SOD323-2

1 2

+5VS

TPCA8028-H_SOP-ADVANCE8-5

PQ41

PQ43

+CPU_B+

12

PC89

PC90

PC91

10U_0805_25V6K

PQ40

PQ40 CSD17308Q3 1N SON

CSD17308Q3 1N SON

3 5

241

12

PR136

4.7_1206_5%

4

3 5

4

CPU1_SNB

123 5

PC108

10U_0805_25V6K

PQ42

PQ42 CSD17308Q3 1N SON

CSD17308Q3 1N SON

241

123 5

12

PC101

PC101 680P_0603_50V7K

680P_0603_50V7K

12

PC109

10U_0805_25V6K

12

CPU2_SNB

12

PC110

10U_0805_25V6K

PR149

4.7_1206_5%

PC117

PC117 680P_0603_50V7K

680P_0603_50V7K

12

PC92

10U_0805_25V6K

1000P_0402_50V7K

12

PC111

PC112

1000P_0402_50V7K

0.1U_0603_25V7K

1 2

+CPU_B+

1 2

12

PC94

PC93

0.1U_0603_25V7K

PR137

17.8K_0402_1%

12

PC115

PR151

17.8K_0402_1%

PC95

2200P_0402_50V7K

PL9

0.36UH_PCMC104T-R36MN1R1 7_30A_20%

1

CPU_CSP1-1

2

12

PR139

69.8K_0402_1%

1 2

PR141

28.7K_0402_1%

1 2

PC104

0.033U_0402_16V7K

CPU_CSP1

PL10

0.36UH_PCMC104T-R36MN1R1 7_30A_20%

2200P_0402_50V7K

1

CPU_CSP2-1

2

12

PR152

69.8K_0402_1%

1 2

PR155

28.7K_0402_1%

1 2

PC118

0.033U_0402_16V7K

CPU_CSP2

PL8

HCB4532KF-800T90_1812

1 2

1

+

2

100U_25V_M

4

3

CPU_SN-1

1 2

4

3

CPU_SN-2

1 2

B+

1

12

+

PC136

PC96

PH3

100K_0603_1% TSM1A104F4361RZ

CPU_CSN1

PH4

100K_0603_1% TSM1A104F4361RZ

CPU_CSN2

PC136

2

100U_25V_M

0.1U_0402_25Y5V

+CPU_CORE

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10 2010/08/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

+CPU_CORE

Friday, December 24, 2010

1.0

40 41

1

1.0

5

V ersio n C han ge L ist ( P . I. R . L ist ) for P ower C ircuit

V ersio n C han ge L ist ( P . I. R . L ist ) for P ower C ircuitV ersio n C han ge L ist ( P . I. R . L ist ) for P ower C ircuit

P a ge#

P a ge#P ag e#

D D

Title

TitleT itle

D ate

D ateD ate

4

R e q ue s t

R e q ue s tR e q ue s t

O w ner

O w nerO w n er

Issue D es c r ip tio n

Issue D es c r ip tio nI s s u e D escrip t io n

3

So lu tion D esc r iption

So lu tion D esc r iptionS olu tion D esc r ip tion

2

1

Add PC132,PC133,PC134,PC135,PC136,PC137Add capacities for EMI requestP35,37,39 2010.11.12 EMI EMI test fail

P37

P35

P34

P39

C C

P35

B B

Change resistance for EMI request

Add one capacitor for prevent inrush current too large

Add one transistor for improve design margin

Change resistance for CPU loadline fine tuning

Add one capacitor for improve ripple current

2010.11.12 EMI EMI test fail

2010.11.12 PWR Add PC131 which value is 5600PF

2010.11.12 PWR Add PQ44

2010.11.12 PWR Change PR138 from 4.3k to 4.75k

2010.11.12 PWR Add PC130

If there isn't add capacity, the MOS of PQ11 have damged risk.

If there isn't add transitor, the design margin of PQ11 is not enough.

For meet the load line of intel spec

For meet the ripple current spec of Compal

Change PR104 from 0 ohm to 2.2ohm

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/10

Compal Secret Data

Deciphered Date

2

2010/08/19

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Friday, December 24, 2010

Date: Sheet of

Power PIR

LA7011P

1

41 41

1.0

COMPAL LA-7011P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual