Compal LA-6961P PAP00, Alienware M11x R3 Schematic

MODEL NAME :

PCB NO :

BOM P/N :

1 1

LA-6961P ( DA********** )

TBD

PAP00

Schematic Document

2 2

Phantom(Huron River)

Sandy Bridge(BGA1023) + Cougar Point(SFF)

DISCRETE VGA N12P-GS(optimus)

3 3

2010-11-29

Rev: 0.4

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/06 2011/07/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Cover Page

LA-6961P

0.4

154Monday, January 24, 2011

Compal Confidential

Project Code : PAP00

FFS

Small card

Fan Control

P.31

CPU XDP Conn.

P.5

File Name : LA-6961P

1 1

HDMI Conn.

DP Conn.

HDMI

DisplayPort

GPU N12P-GS

PEG x16 (DIS)

P.30~41

Intel

Sandy Bridge

Processor

2C 17W ULV

Memory Bus (DDRIII)

Dual Channel

1.5V DDRIII 1066/1333 MHz

204pin DDRIII SO-DIMM x2

BANK 0, 1, 2, 3

P.10,11

BGA 1023

P.4~9

DMI x4FDI x8

(UMA)

100MHz

2.7GT/s

LVDS

2 2

Conn.

P.20

LVDS

Intel

PCI-E x1

Port 3 Port 2 Port 1 Port 4

Mini Card-2

WLAN (Half)

USB[x]

3 3

port4

WWAN (Full)

P.23 P.23 P.21 P.22

USB[x] port5

LAN(GbE)

AR8151-BL1A

RJ45

Card ReaderMini Card-1

JMB380

3 in 1 Socket

P.22P.21

USB 3.0/2.0 Host Ctrl.

USB 3.0/2.0 Combo Conns x2

Port 6

Small card

1394 Conn.

RTC CKT.

Power On/Off CKT.

DC/DC Interface CKT.

P.12

P.27

P.43

SPI ROM

ENE 3810

P.12 P.32

Cougar Point

PCH SFF

BGA 1017 Balls

SPI

P.32

100MHz 5GB/s

HD Audio

P12~19

LPC Bus

ENE KB930

SATA3.0

USB2.0

Port 0

Port 1

Port 3

Port 4

Port 5

Port 6

Port 2

SATA HDD-1 Conn.

USB 2.0

( USB Charger )

Digital Camera

Mini Card-1 (WLAN)

( Half )

Mini Card-2 (WWAN)

( Full )

AlienFX/ELC

BT 2.1 /BT 3.0

P.26

P.24

P.20

P.23

P.23 P.23

P.27

P.34

Audio Codec ALC665-GR

Small card

SIM Card

Audio Jack x3

( HeadPhone x2, MIC)

Digital MIC

Int. SpeakerAMP. APA2031RI

Small card

4 4

Power Circuit DC/DC

P.43

Touch Pad Int.KBD

P.33

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/10 2011/07/06

BIOS ROM

P.33 P.33

Compal Secret Data

Deciphered Date

Compal Electronics,Inc.

Title

PCH (6/8) PWR

Size Document Number Rev

Date: Sheet

254Monday, January 24, 2011

0.4

Board ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7NC

SMBUS Control Table

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

PCH_SML0CLK PCH PCH_SML0DATA

PCH_SML1CLK PCH_SML1DATA

MEM_SMBCLK MEM_SMBDATA

100K +/- 5%Ra

Rb V min

00 V

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5%

100K +/- 5% 200K +/- 5%

SOURCE

KB930

PCH

AD_BID

0.168 V

0.375 V 0.503 V

0.634 V

0.958 V

1.372 V

1.851 V 2.200 V

2.433 V

MINI2

MINI1 BATT SODIMM

V typ

AD_BID

0 V 0.155 V

0.250 V

0.819 V

1.185 V

1.650 V

3.300 V

Thermal Sensor 1

AD_BID

0.362 V

0.621 V

0.945 V

1.359 V

1.838 V

2.420 V

3.300 V

FFS

max

VGA Thermal Sensor

EC AD3 0x00-0x0C 0x0D-0x1C 0x1D-0x30 0x31-0x49 0x4A-0x69 0x6A-0x8E 0x8F-0xBB 0xBC-0xFF

SMSC

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

Link

PCB Revision

0.1

0.2

0.3

0.4

0.5

PCH

USB PORT#

DESTINATION

None

JUSB1 (Ext Left Side)

Bluetooth

CAMERA

JMINI1 (WLAN)

JMINI2 (WWAN)

ELC

None

1 1

DESTINATION

HDD

None

Symbol Note :

: means Digital Ground

: means Analog Ground

Compal Secret Data

Deciphered Date

PCI EXPRESS

Lane 1

Lane 2

Lane 3

Lane 4

Lane 5

Lane 6

Lane 7

Lane 8 None

CLK

DESTINATIONDIFFERENTIAL

CLKOUT_PCIE0

CLKOUT_PCIE1

CLKOUT_PCIE2

CLKOUT_PCIE3

CLKOUT_PCIE4

CLKOUT_PCIE5

CLKOUT_PCIE6

10/100/1G LAN

MINI CARD-2 WWAN

MINI CARD-1 WLAN

CARD READER

None

USB 3.0

CLKOUT_PCIE7 None

CLKOUT_PEG_B

None

FLEX CLOCKS DESTINATION

CLKOUTFLEX0None

CLKOUTFLEX1

CLKOUTFLEX2

CLKOUTFLEX3

CLKOUT

PCI0

PCI1

PCI2

PCI3

PCI4

None

DESTINATION

PCH_LOOPBACK

None

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SATA

SATA0

SATA1

SATA2

SATA3

SATA4

SATA5

2010/07/06 2011/07/06

None

DESTINATION

10/100/1G LAN

MINI CARD-2 WWAN/DMC

MINI CARD-1 WLAN

CARD READER and 1394

None

USB 3.0

None

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Notes List

LA-6961P

354Monday, January 24, 2011

0.4

UCPU1A

D D

DMI_CRX_PTX_N014 DMI_CRX_PTX_N114 DMI_CRX_PTX_N214 DMI_CRX_PTX_N314

DMI_CRX_PTX_P014 DMI_CRX_PTX_P114 DMI_CRX_PTX_P214 DMI_CRX_PTX_P314

DMI_CTX_PRX_N014 DMI_CTX_PRX_N114 DMI_CTX_PRX_N214 DMI_CTX_PRX_N314

DMI_CTX_PRX_P014 DMI_CTX_PRX_P114 DMI_CTX_PRX_P214 DMI_CTX_PRX_P314

10K_0402_5%

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT

FDI_LSYNC0 FDI_LSYNC1

+EDP_COM

FDI_CTX_PRX_N014 FDI_CTX_PRX_N114 FDI_CTX_PRX_N214 FDI_CTX_PRX_N314 FDI_CTX_PRX_N414 FDI_CTX_PRX_N514

C C

B B

FDI_CTX_PRX_N614 FDI_CTX_PRX_N714

FDI_CTX_PRX_P014 FDI_CTX_PRX_P114 FDI_CTX_PRX_P214 FDI_CTX_PRX_P314 FDI_CTX_PRX_P414 FDI_CTX_PRX_P514 FDI_CTX_PRX_P614 FDI_CTX_PRX_P714

FDI_FSYNC014 FDI_FSYNC114

FDI_INT14

FDI_LSYNC014 FDI_LSYNC114

+1.05VS

1 2

RC36 24.9_0402_1%RC36 24.9_0402_1%

RC126

UCPU1A

DMI_RX#[0]

DMI_RX#[1]

DMI_RX#[2]

P10

DMI_RX#[3]

DMI_RX[0]

DMI_RX[1]

DMI_RX[2]

P11

DMI_RX[3]

DMI_TX#[0]

DMI_TX#[1]

DMI_TX#[2]

DMI_TX#[3]

DMI_TX[0]

DMI_TX[1]

DMI_TX[2]

DMI_TX[3]

FDI0_TX#[0]

W11

FDI0_TX#[1]

FDI0_TX#[2]

AA6

FDI0_TX#[3]

FDI1_TX#[0]

FDI1_TX#[1]

FDI1_TX#[2]

AC9

FDI1_TX#[3]

FDI0_TX[0]

W10

FDI0_TX[1]

FDI0_TX[2]

AA7

FDI0_TX[3]

FDI1_TX[0]

FDI1_TX[1]

AA3

FDI1_TX[2]

AC8

FDI1_TX[3]

AA11

FDI0_FSYNC

AC12

FDI1_FSYNC

U11

FDI_INT

AA10

FDI0_LSYNC

AG8

FDI1_LSYNC

AF3

eDP_COMPIO

AD2

eDP_ICOMPO

AG11

eDP_HPD

AG4

eDP_AUX#

AF4

eDP_AUX

AC3

eDP_TX#[0]

AC4

eDP_TX#[1]

AE11

eDP_TX#[2]

AE7

eDP_TX#[3]

AC1

eDP_TX[0]

AA4

eDP_TX[1]

AE10

eDP_TX[2]

AE6

eDP_TX[3]

SANDY-BRIDGE_BGA1023~D

DMI Intel(R) FDI DP

+1.05VS

PEG_COMP

CC185 0.1U_0402_10V7K~DCC185 0.1U_0402_10V7K~D CC186 0.1U_0402_10V7K~DCC186 0.1U_0402_10V7K~D CC187 0.1U_0402_10V7K~DCC187 0.1U_0402_10V7K~D CC188 0.1U_0402_10V7K~DCC188 0.1U_0402_10V7K~D CC189 0.1U_0402_10V7K~DCC189 0.1U_0402_10V7K~D CC190 0.1U_0402_10V7K~DCC190 0.1U_0402_10V7K~D CC191 0.1U_0402_10V7K~DCC191 0.1U_0402_10V7K~D CC192 0.1U_0402_10V7K~DCC192 0.1U_0402_10V7K~D CC193 0.1U_0402_10V7K~DCC193 0.1U_0402_10V7K~D CC194 0.1U_0402_10V7K~DCC194 0.1U_0402_10V7K~D CC195 0.1U_0402_10V7K~DCC195 0.1U_0402_10V7K~D CC196 0.1U_0402_10V7K~DCC196 0.1U_0402_10V7K~D CC197 0.1U_0402_10V7K~DCC197 0.1U_0402_10V7K~D CC198 0.1U_0402_10V7K~DCC198 0.1U_0402_10V7K~D CC199 0.1U_0402_10V7K~DCC199 0.1U_0402_10V7K~D CC200 0.1U_0402_10V7K~DCC200 0.1U_0402_10V7K~D

CC201 0.1U_0402_10V7K~DCC201 0.1U_0402_10V7K~D CC202 0.1U_0402_10V7K~DCC202 0.1U_0402_10V7K~D CC203 0.1U_0402_10V7K~DCC203 0.1U_0402_10V7K~D CC204 0.1U_0402_10V7K~DCC204 0.1U_0402_10V7K~D CC205 0.1U_0402_10V7K~DCC205 0.1U_0402_10V7K~D CC206 0.1U_0402_10V7K~DCC206 0.1U_0402_10V7K~D CC207 0.1U_0402_10V7K~DCC207 0.1U_0402_10V7K~D CC208 0.1U_0402_10V7K~DCC208 0.1U_0402_10V7K~D CC209 0.1U_0402_10V7K~DCC209 0.1U_0402_10V7K~D CC210 0.1U_0402_10V7K~DCC210 0.1U_0402_10V7K~D CC211 0.1U_0402_10V7K~DCC211 0.1U_0402_10V7K~D CC212 0.1U_0402_10V7K~DCC212 0.1U_0402_10V7K~D CC213 0.1U_0402_10V7K~DCC213 0.1U_0402_10V7K~D CC214 0.1U_0402_10V7K~DCC214 0.1U_0402_10V7K~D CC215 0.1U_0402_10V7K~DCC215 0.1U_0402_10V7K~D CC216 0.1U_0402_10V7K~DCC216 0.1U_0402_10V7K~D

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

G3 G1 G4

PEG_GTX_C_HRX_N0

H22

PEG_GTX_C_HRX_N1

J21

PEG_GTX_C_HRX_N2

B22

PEG_GTX_C_HRX_N3

D21

PEG_GTX_C_HRX_N4

A19

PEG_GTX_C_HRX_N5

D17

PEG_GTX_C_HRX_N6

B14

PEG_GTX_C_HRX_N7

D13

PEG_GTX_C_HRX_N8

A11

PEG_GTX_C_HRX_N9

B10

PEG_GTX_C_HRX_N10

PEG_GTX_C_HRX_N11

PEG_GTX_C_HRX_N12

PEG_GTX_C_HRX_N13

PEG_GTX_C_HRX_N14

PEG_GTX_C_HRX_N15

PEG_GTX_C_HRX_P0

K22

PEG_GTX_C_HRX_P1

K19

PEG_GTX_C_HRX_P2

C21

PEG_GTX_C_HRX_P3

D19

PEG_GTX_C_HRX_P4

C19

PEG_GTX_C_HRX_P5

D16

PEG_GTX_C_HRX_P6

C13

PEG_GTX_C_HRX_P7

D12

PEG_GTX_C_HRX_P8

C11

PEG_GTX_C_HRX_P9

PEG_GTX_C_HRX_P10

PEG_GTX_C_HRX_P11

PEG_GTX_C_HRX_P12

PEG_GTX_C_HRX_P13

PEG_GTX_C_HRX_P14

PEG_GTX_C_HRX_P15

PEG_HTX_GRX_N0

G22

PEG_HTX_GRX_N1

C23

PEG_HTX_GRX_N2

D23

PEG_HTX_GRX_N3

F21

PEG_HTX_GRX_N4

H19

PEG_HTX_GRX_N5

C17

PEG_HTX_GRX_N6

K15

PEG_HTX_GRX_N7

F17

PEG_HTX_GRX_N8

F14

PEG_HTX_GRX_N9

A15

PEG_HTX_GRX_N10

J14

PEG_HTX_GRX_N11

H13

PEG_HTX_GRX_N12

M10

PEG_HTX_GRX_N13

F10

PEG_HTX_GRX_N14

PEG_HTX_GRX_N15

PEG_HTX_GRX_P0

F22

PEG_HTX_GRX_P1

A23

PEG_HTX_GRX_P2

D24

PEG_HTX_GRX_P3

E21

PEG_HTX_GRX_P4

G19

PEG_HTX_GRX_P5

B18

PEG_HTX_GRX_P6

K17

PEG_HTX_GRX_P7

G17

PEG_HTX_GRX_P8

E14

PEG_HTX_GRX_P9

C15

PEG_HTX_GRX_P10

K13

PEG_HTX_GRX_P11

G13

PEG_HTX_GRX_P12

K10

PEG_HTX_GRX_P13

G10

PEG_HTX_GRX_P14

PEG_HTX_GRX_P15

Typ- suggest 220nF. The change in AC capacitor value from 100nF to 220nF is to enable compatibility with future platforms having PCIE Gen3 (8GT/s)

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12]

PCI EXPRESS -- GRAPHICS

PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

RC2

24.9_0402_1%

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical impedance = 43 mohms PEG_ICOMPO signals should be routed with - max length = 500 mils

- typical impedance = 14.5 mohms

PEG_GTX_C_HRX_N0 30 PEG_GTX_C_HRX_N1 30 PEG_GTX_C_HRX_N2 30 PEG_GTX_C_HRX_N3 30 PEG_GTX_C_HRX_N4 30 PEG_GTX_C_HRX_N5 30 PEG_GTX_C_HRX_N6 30 PEG_GTX_C_HRX_N7 30 PEG_GTX_C_HRX_N8 30 PEG_GTX_C_HRX_N9 30 PEG_GTX_C_HRX_N10 30 PEG_GTX_C_HRX_N11 30 PEG_GTX_C_HRX_N12 30 PEG_GTX_C_HRX_N13 30 PEG_GTX_C_HRX_N14 30 PEG_GTX_C_HRX_N15 30

PEG_GTX_C_HRX_P0 30 PEG_GTX_C_HRX_P1 30 PEG_GTX_C_HRX_P2 30 PEG_GTX_C_HRX_P3 30 PEG_GTX_C_HRX_P4 30 PEG_GTX_C_HRX_P5 30 PEG_GTX_C_HRX_P6 30 PEG_GTX_C_HRX_P7 30 PEG_GTX_C_HRX_P8 30 PEG_GTX_C_HRX_P9 30 PEG_GTX_C_HRX_P10 30 PEG_GTX_C_HRX_P11 30 PEG_GTX_C_HRX_P12 30 PEG_GTX_C_HRX_P13 30 PEG_GTX_C_HRX_P14 30 PEG_GTX_C_HRX_P15 30

PEG_HTX_C_GRX_N0 30 PEG_HTX_C_GRX_N1 30 PEG_HTX_C_GRX_N2 30 PEG_HTX_C_GRX_N3 30 PEG_HTX_C_GRX_N4 30 PEG_HTX_C_GRX_N5 30 PEG_HTX_C_GRX_N6 30 PEG_HTX_C_GRX_N7 30 PEG_HTX_C_GRX_N8 30 PEG_HTX_C_GRX_N9 30 PEG_HTX_C_GRX_N10 30 PEG_HTX_C_GRX_N11 30 PEG_HTX_C_GRX_N12 30 PEG_HTX_C_GRX_N13 30 PEG_HTX_C_GRX_N14 30 PEG_HTX_C_GRX_N15 30

PEG_HTX_C_GRX_P0 30 PEG_HTX_C_GRX_P1 30 PEG_HTX_C_GRX_P2 30 PEG_HTX_C_GRX_P3 30 PEG_HTX_C_GRX_P4 30 PEG_HTX_C_GRX_P5 30 PEG_HTX_C_GRX_P6 30 PEG_HTX_C_GRX_P7 30 PEG_HTX_C_GRX_P8 30 PEG_HTX_C_GRX_P9 30 PEG_HTX_C_GRX_P10 30 PEG_HTX_C_GRX_P11 30 PEG_HTX_C_GRX_P12 30 PEG_HTX_C_GRX_P13 30 PEG_HTX_C_GRX_P14 30 PEG_HTX_C_GRX_P15 30

UCPU1I

BG17

VSS[181]

BG21

VSS[182]

BG24

VSS[183]

BG28

VSS[184]

BG37

VSS[185]

BG41

VSS[186]

BG45

VSS[187]

BG49

VSS[188]

BG53

VSS[189]

BG9

VSS[190]

C29

VSS[191]

C35

VSS[192]

C40

VSS[193]

D10

VSS[194]

D14

VSS[195]

D18

VSS[196]

D22

VSS[197]

D26

VSS[198]

D29

VSS[199]

D35

VSS[200]

VSS[201]

D40

VSS[202]

D43

VSS[203]

D46

VSS[204]

D50

VSS[205]

D54

VSS[206]

D58

VSS[207]

VSS[208]

E25

VSS[209]

E29

VSS[210]

VSS[211]

E35

VSS[212]

E40

VSS[213]

F13

VSS[214]

F15

VSS[215]

F19

VSS[216]

F29

VSS[217]

F35

VSS[218]

F40

VSS[219]

F55

VSS[220]

G48

VSS[221]

G51

VSS[222]

VSS[223]

G61

VSS[224]

H10

VSS[225]

H14

VSS[226]

H17

VSS[227]

H21

VSS[228]

VSS[229]

H53

VSS[230]

H58

VSS[231]

VSS[232]

J49

VSS[233]

J55

VSS[234]

K11

VSS[235]

K21

VSS[236]

K51

VSS[237]

VSS[238]

L16

VSS[239]

L20

VSS[240]

L22

VSS[241]

L26

VSS[242]

L30

VSS[243]

L34

VSS[244]

L38

VSS[245]

L43

VSS[246]

L48

VSS[247]

L61

VSS[248]

M11

VSS[249]

M15

VSS[250]

SANDY-BRIDGE_BGA1023~D

VSS

VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258] VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301]

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9

VSS_NCTF_10

NCTF

VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14

M4 M58 M6 N1 N17 N21 N25 N28 N33 N36 N40 N43 N47 N48 N51 N52 N56 N61 P14 P16 P18 P21 P58 P59 P9 R17 R20 R4 R46 T1 T47 T50 T51 T52 T53 T55 T56 U13 U8 V20 V61 W13 W15 W18 W21 W46 W8 Y4 Y47 Y58 Y59

A5 A57 BC61 BD3 BD59 BE4 BE58 BG5 BG57 C3 C58 D59 E1 E61

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/06 2011/07/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(1/6) DMI,FDI,PEG

LA-6961P

454Monday, January 24, 2011

0.4

XDP_PREQ#

XDP_BPM#0 XDP_BPM#1

D D

PBTN_OUT#14,25

CFG07

VGATE14,25,54

CLK_CPU_ITP13

CLK_CPU_ITP#13

The resistor for HOOK2 should be placed such that the stub is very small on CFG0 net

C C

PROC_DETECT (Processor Detect): pulled to ground on the processor package. There is no connection to the processor silicon for this signal. System board designers may use this signal to determine if the processor is present

B B

A A

H_PROCHOT#25,44

PLT_RST# XDP_RST#_R

PCH_JTAG_TDO12

PCH_JTAG_TDI12

PCH_JTAG_TMS12

PCH_JTAG_TCK12

+1.05VS

RC43

62_0402_5%

1 2

XDP_BPM#2 XDP_BPM#3

1K_0402_5%~D

1 2 1 2 1 2 1 2

1K_0402_5%

0_0402_5% @

1 2

+3VALW

RC121 10K_0402_5%

H_PECI16,25

H_THERMTRIP#16

H_PM_SYNC14

H_CPUPWRGD16

VDDPWRGOOD

XDP_PRDY#

RC35 0_0402_5%

RC35 0_0402_5% RC114 0_0402_5%@RC114 0_0402_5%@

RC117 0_0402_5%@RC117 0_0402_5%@ RC115 0_0402_5%@RC115 0_0402_5%@

H_CPUPWRGD_XDPH_CPUPWRGD

RC22

CFD_PWRBTN#_XDP

RC230_0402_5%~D @ RC230_0402_5%~D @

CFG0_R

RC71K_0402_5%~D RC71K_0402_5%~D

SYS_PWROK_XDP

RC260_0402_5%~D @ RC260_0402_5%~D @

CLK_CPU_ITP CLK_CPU_ITP#

RC25

XDP_DBRESET#

XDP_TDO

RC280_0402_5% @ RC280_0402_5% @

XDP_TRST# XDP_TDI

RC310_0402_5% @ RC310_0402_5% @

XDP_TMS

RC290_0402_5% @ RC290_0402_5% @

XDP_TCK1

RC30

XDP_TCK

RC27

RC27 1K_0402_5%~D

1K_0402_5%~D

SYS_PWROK_XDP

H_SNB_IVB#15

T1PAD~D @T1PAD~D @

1 2

56_0402_5%

1 2

0_0402_5%

1 2

0_0402_5%

1 2

130_0402_1%

RC41

RC49

RC53

RC57

12 12

+1.05VS

H_CATERR#

H_PROCHOT#_R

H_THERMTRIP#

H_PM_SYNC_R

H_CPUPWRGD_R

VDDPWRGOOD_R

BUF_CPU_RST#

JXDP

@ JXDP

ACES_87152-26051

UCPU1B

F49

C57

C49

A48

C45

D45

C48

B46

BE45

D44

SANDY-BRIDGE_BGA1023~D

27 28

PROC_SELECT#

PROC_DETECT#

CATERR#

PECI

PROCHOT#

THERMTRIP#

PM_SYNC

UNCOREPWRGOOD

SM_DRAMPWROK

RESET#

+1.05VS

0.1U_0402_16V4Z~D

CC67

CC66

RC127

RC4

RC127

RC128

1 2

SYSTEM_PWROK14

PCH_PWROK14,25

PM_DRAM_PWRGD14

+3V_PCH

0_0402_5%~D

RC11 0_0402_5%RC11 0_0402_5%

200_0402_1%

Place near JXDP1

RUN_ON_CPU1.5VS3#9,43

PLT_RST#15,21,22,23,24,25

MISC THERMAL PWR MANAGEMENT

CLOCKS

DDR3

MISC

DDR3

MISC

JTAG & BPM

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BCLK

BCLK#

DPLL_REF_CLK

DPLL_REF_CLK#

BCLK_ITP

BCLK_ITP#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PRDY# PREQ#

TRST#

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

CLK_CPU_DMI#_R

CLK_CPU_DPLL_R

AG3

CLK_CPU_DPLL#_R

AG1

N59 N58

H_DRAMRST#

AT30

SM_RCOMP0

BF44

SM_RCOMP1

BE43

SM_RCOMP2

BG43

DDR3 Compensation Signals

XDP_PRDY#

N53

XDP_PREQ#

N55

XDP_TCK

L56

TCK

XDP_TMS

L55

TMS

XDP_TRST#

J58

XDP_TDI_R

M60

TDI

XDP_TDO_R

L59

TDO

XDP_DBRESET#_R

K58

XDP_BPM#0_R

G58

XDP_BPM#1_R

E55

XDP_BPM#2_R

E59

XDP_BPM#3_R

G55

XDP_BPM#4_R

G59

XDP_BPM#5_R

H60

XDP_BPM#6_R

J59

XDP_BPM#7_R

J61

XDP_BPM#4 XDP_BPM#5 XDP_BPM#6 XDP_BPM#7

2010/07/06 2011/07/06

CLK_CPU_DMI_R

RC37 0_0402_5%RC37 0_0402_5%

1 2

RC38 0_0402_5%RC38 0_0402_5%

1 2

RC39 0_0402_5%RC39 0_0402_5%

1 2

RC40 0_0402_5%RC40 0_0402_5%

1 2

H_DRAMRST# 6

RC55140_0402_1% RC55140_0402_1%

1 2

RC5825.5_0402_1% RC5825.5_0402_1%

1 2

RC60200_0402_1% RC60200_0402_1%

1 2

RC50 0_0402_5%RC50 0_0402_5%

1 2

RC51 0_0402_5%RC51 0_0402_5%

1 2

RC56

0_0402_5%

1 2

RC59 0_0402_5%RC59 0_0402_5%

1 2

RC61 0_0402_5%RC61 0_0402_5%

1 2

RC62 0_0402_5%RC62 0_0402_5%

1 2

RC63 0_0402_5%RC63 0_0402_5%

1 2

RC64 0_0402_5%RC64 0_0402_5%

1 2

RC65 0_0402_5%RC65 0_0402_5%

1 2

RC66 0_0402_5%RC66 0_0402_5%

1 2

RC67 0_0402_5%RC67 0_0402_5%

1 2

RC68 0_0402_5%RC68 0_0402_5%

1 2

RC69 0_0402_5%RC69 0_0402_5%

1 2

RC70 0_0402_5%RC70 0_0402_5%

1 2

RC71 0_0402_5%RC71 0_0402_5%

1 2

Compal Secret Data

Deciphered Date

XDP_TDI XDP_TDO

XDP_DBRESET#

XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_BPM#6 XDP_BPM#7

CFG12 7 CFG13 7 CFG14 7 CFG15 7

+3VS

@RC128

1 2

CLK_CPU_DMI 13 CLK_CPU_DMI# 13

CLK_CPU_DPLL 13 CLK_CPU_DPLL# 13

CLK_RES_ITP 13 CLK_RES_ITP# 13

RC6

10K_0402_5%

D_PWG

XDP_DBRESET# 14

+3VALW

0.1U_0402_16V4Z~D

+1.5V_CPU_VDDQ

CC65

UC1

VCC

GND3Y

MC74VHC1G09DFT2G_SC70-5

RUN_ON_CPU1.5VS3#

UC2

1 2

SN74LVC1G07DCKR_SC70-5~D

VCC A GND3Y

+3VS

RC19

RC19 39_0402_1%

39_0402_1%

1 2

@ QC1

QC1 2N7002_SOT23

2N7002_SOT23

0.1U_0402_16V4Z~D

CC68

BUFO_CPU_RST#

RC8

RC8 200_0402_1%

200_0402_1%

VDDPWRGOOD

RC8 CRB 1.1K CHECK LIST 0.7 --> 4.75K INTEL recommand 1.1K PDG 0.71 rev -->200

+1.05VS

RC32

RC32 75_0402_5%

75_0402_5%

RC33

1 2

43_0402_1%

PU/PD for JTAG signals

XDP_TMS

XDP_TDI_R

XDP_PREQ#

XDP_TDO

XDP_TCK

XDP_TRST#

XDP_DBRESET#

H_CPUPWRGD_R

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(2/6) PM,XDP,CLK

LA-6961P

1 2

BUF_CPU_RST#

RC34

RC34 0_0402_5%

0_0402_5%

+1.05VS

RC4551_0402_5% RC4551_0402_5%

RC4651_0402_5% RC4651_0402_5%

RC4751_0402_5% @ RC4751_0402_5% @

RC4851_0402_5% RC4851_0402_5%

RC5251_0402_5% RC5251_0402_5%

RC5451_0402_5% RC5451_0402_5%

+3VS

RC421K_0402_5% RC421K_0402_5%

RC4410K_0402_5% RC4410K_0402_5%

554Monday, January 24, 2011

0.4

UCPU1C

DDR_A_D[0..63]10

D D

C C

DDR_A_BS010 DDR_A_BS110

B B

A A

DDR_A_BS210

DDR_A_CAS#10 DDR_A_RAS#10 DDR_A_WE#10

H_DRAMRST#5

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

H_DRAMRST#

4.99K_0402_1%~D

UCPU1C

AG6

SA_DQ[0]

AJ6

SA_DQ[1]

AP11

SA_DQ[2]

AL6

SA_DQ[3]

AJ10

SA_DQ[4]

AJ8

SA_DQ[5]

AL8

SA_DQ[6]

AL7

SA_DQ[7]

AR11

SA_DQ[8]

AP6

SA_DQ[9]

AU6

SA_DQ[10]

AV9

SA_DQ[11]

AR6

SA_DQ[12]

AP8

SA_DQ[13]

AT13

SA_DQ[14]

AU13

SA_DQ[15]

BC7

SA_DQ[16]

BB7

SA_DQ[17]

BA13

SA_DQ[18]

BB11

SA_DQ[19]

BA7

SA_DQ[20]

BA9

SA_DQ[21]

BB9

SA_DQ[22]

AY13

SA_DQ[23]

AV14

SA_DQ[24]

AR14

SA_DQ[25]

AY17

SA_DQ[26]

AR19

SA_DQ[27]

BA14

SA_DQ[28]

AU14

SA_DQ[29]

BB14

SA_DQ[30]

BB17

SA_DQ[31]

BA45

SA_DQ[32]

AR43

SA_DQ[33]

AW48

SA_DQ[34]

BC48

SA_DQ[35]

BC45

SA_DQ[36]

AR45

SA_DQ[37]

AT48

SA_DQ[38]

AY48

SA_DQ[39]

BA49

SA_DQ[40]

AV49

SA_DQ[41]

BB51

SA_DQ[42]

AY53

SA_DQ[43]

BB49

SA_DQ[44]

AU49

SA_DQ[45]

BA53

SA_DQ[46]

BB55

SA_DQ[47]

BA55

SA_DQ[48]

AV56

SA_DQ[49]

AP50

SA_DQ[50]

AP53

SA_DQ[51]

AV54

SA_DQ[52]

AT54

SA_DQ[53]

AP56

SA_DQ[54]

AP52

SA_DQ[55]

AN57

SA_DQ[56]

AN53

SA_DQ[57]

AG56

SA_DQ[58]

AG53

SA_DQ[59]

AN55

SA_DQ[60]

AN52

SA_DQ[61]

AG55

SA_DQ[62]

AK56

SA_DQ[63]

BD37

SA_BS[0]

BF36

SA_BS[1]

BA28

SA_BS[2]

BE39

SA_CAS#

BD39

SA_RAS#

AT41

SA_WE#

SANDY-BRIDGE_BGA1023~D

RC77

1 2

RC74 0_0402_5%~D

QC2

BSS138_SOT23

DRAMRST_CNTRL

CC69

0.047U_0402_16V4Z~D

DDR SYSTEM MEMORY A

DDR3_DRAMRST#_R

AU36

SA_CLK[0]

AV36

SA_CLK#[0]

AY26

SA_CKE[0]

AT40

SA_CLK[1]

AU40

SA_CLK#[1]

BB26

SA_CKE[1]

BB40

SA_CS#[0]

BC41

SA_CS#[1]

AY40

SA_ODT[0]

BA41

SA_ODT[1]

AL11

SA_DQS#[0]

AR8

SA_DQS#[1]

AV11

SA_DQS#[2]

AT17

SA_DQS#[3]

AV45

SA_DQS#[4]

AY51

SA_DQS#[5]

AT55

SA_DQS#[6]

AK55

SA_DQS#[7]

AJ11

SA_DQS[0]

AR10

SA_DQS[1]

AY11

SA_DQS[2]

AU17

SA_DQS[3]

AW45

SA_DQS[4]

AV51

SA_DQS[5]

AT56

SA_DQS[6]

AK54

SA_DQS[7]

BG35

SA_MA[0]

BB34

SA_MA[1]

BE35

SA_MA[2]

BD35

SA_MA[3]

AT34

SA_MA[4]

AU34

SA_MA[5]

BB32

SA_MA[6]

AT32

SA_MA[7]

AY32

SA_MA[8]

AV32

SA_MA[9]

BE37

SA_MA[10]

BA30

SA_MA[11]

BC30

SA_MA[12]

AW41

SA_MA[13]

AY28

SA_MA[14]

AU26

SA_MA[15]

+1.5V

RC75

RC75 1K_0402_5%~D

1K_0402_5%~D

1 2

RC76 1K_0402_5%RC76 1K_0402_5%

DG 1.0 Figure 61 RC76=1K

M_CLK_DDR0 M_CLK_DDR#0 DDR_CKE0_DIMMA M_CLK_DDR2

M_CLK_DDR1 M_CLK_DDR#1 DDR_CKE1_DIMMA

DDR_CS0_DIMMA# DDR_CS1_DIMMA#

M_ODT0 M_ODT1

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

1 2

RC72 0_0402_5%~DRC72 0_0402_5%~D

1 2

RC73 0_0402_5%~D

M_CLK_DDR0 10 M_CLK_DDR#0 10 DDR_CKE0_DIMMA 10 M_CLK_DDR2 11

M_CLK_DDR1 10 M_CLK_DDR#1 10 DDR_CKE1_DIMMA 10

DDR_CS0_DIMMA# 10 DDR_CS1_DIMMA# 10

M_ODT0 10 M_ODT1 10

DDR_A_DQS#[0..7] 10

DDR_A_DQS[0..7] 10

DDR_A_MA[0..15] 10

DDR3_DRAMRST# 10,11

DRAMRST_CNTRL_PCH 13

DRAMRST_CNTRL_EC 25

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DDR_B_D[0..63]11

DDR_B_BS011 DDR_B_BS111 DDR_B_BS211

DDR_B_CAS#11 DDR_B_RAS#11 DDR_B_WE#11

2010/07/06 2011/07/06

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

Compal Secret Data

Deciphered Date

UCPU1D

AL4

SB_DQ[0]

AL1

SB_DQ[1]

AN3

SB_DQ[2]

AR4

SB_DQ[3]

AK4

SB_DQ[4]

AK3

SB_DQ[5]

AN4

SB_DQ[6]

AR1

SB_DQ[7]

AU4

SB_DQ[8]

AT2

SB_DQ[9]

AV4

SB_DQ[10]

BA4

SB_DQ[11]

AU3

SB_DQ[12]

AR3

SB_DQ[13]

AY2

SB_DQ[14]

BA3

SB_DQ[15]

BE9

SB_DQ[16]

BD9

SB_DQ[17]

BD13

SB_DQ[18]

BF12

SB_DQ[19]

BF8

SB_DQ[20]

BD10

SB_DQ[21]

BD14

SB_DQ[22]

BE13

SB_DQ[23]

BF16

SB_DQ[24]

BE17

SB_DQ[25]

BE18

SB_DQ[26]

BE21

SB_DQ[27]

BE14

SB_DQ[28]

BG14

SB_DQ[29]

BG18

SB_DQ[30]

BF19

SB_DQ[31]

BD50

SB_DQ[32]

BF48

SB_DQ[33]

BD53

SB_DQ[34]

BF52

SB_DQ[35]

BD49

SB_DQ[36]

BE49

SB_DQ[37]

BD54

SB_DQ[38]

BE53

SB_DQ[39]

BF56

SB_DQ[40]

BE57

SB_DQ[41]

BC59

SB_DQ[42]

AY60

SB_DQ[43]

BE54

SB_DQ[44]

BG54

SB_DQ[45]

BA58

SB_DQ[46]

AW59

SB_DQ[47]

AW58

SB_DQ[48]

AU58

SB_DQ[49]

AN61

SB_DQ[50]

AN59

SB_DQ[51]

AU59

SB_DQ[52]

AU61

SB_DQ[53]

AN58

SB_DQ[54]

AR58

SB_DQ[55]

AK58

SB_DQ[56]

AL58

SB_DQ[57]

AG58

SB_DQ[58]

AG59

SB_DQ[59]

AM60

SB_DQ[60]

AL59

SB_DQ[61]

AF61

SB_DQ[62]

AH60

SB_DQ[63]

BG39

SB_BS[0]

BD42

SB_BS[1]

AT22

SB_BS[2]

AV43

SB_CAS#

BF40

SB_RAS#

BD45

SB_WE#

SANDY-BRIDGE_BGA1023~D

BA34

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

DDR SYSTEM MEMORY B

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

Title

Size Document Number Rev

Date: Sheet

M_CLK_DDR#2

AY34

DDR_CKE2_DIMMB

AR22

M_CLK_DDR3

BA36

M_CLK_DDR#3

BB36

DDR_CKE3_DIMMB

BF27

DDR_CS2_DIMMB#

BE41

DDR_CS3_DIMMB#

BE47

M_ODT2

AT43

M_ODT3

BG47

DDR_B_DQS#0

AL3

DDR_B_DQS#1

AV3

DDR_B_DQS#2

BG11

DDR_B_DQS#3

BD17

DDR_B_DQS#4

BG51

DDR_B_DQS#5

BA59

DDR_B_DQS#6

AT60

DDR_B_DQS#7

AK59

DDR_B_DQS0

AM2

DDR_B_DQS1

AV1

DDR_B_DQS2

BE11

DDR_B_DQS3

BD18

DDR_B_DQS4

BE51

DDR_B_DQS5

BA61

DDR_B_DQS6

AR59

DDR_B_DQS7

AK61

DDR_B_MA0

BF32

DDR_B_MA1

BE33

DDR_B_MA2

BD33

DDR_B_MA3

AU30

DDR_B_MA4

BD30

DDR_B_MA5

AV30

DDR_B_MA6

BG30

DDR_B_MA7

BD29

DDR_B_MA8

BE30

DDR_B_MA9

BE28

DDR_B_MA10

BD43

DDR_B_MA11

AT28

DDR_B_MA12

AV28

DDR_B_MA13

BD46

DDR_B_MA14

AT26

DDR_B_MA15

AU22

Compal Electronics, Inc.

PROCESSOR(3/6) DDRIII

LA-6961P

M_CLK_DDR#2 11 DDR_CKE2_DIMMB 11

M_CLK_DDR3 11 M_CLK_DDR#3 11 DDR_CKE3_DIMMB 11

DDR_CS2_DIMMB# 11 DDR_CS3_DIMMB# 11

M_ODT2 11 M_ODT3 11

DDR_B_DQS#[0..7] 11

DDR_B_DQS[0..7] 11

DDR_B_MA[0..15] 11

654Monday, January 24, 2011

0.4

CFG Straps for Processor

D D

UCPU1E

CFG05

T51PAD~D@T51PAD~D

T53PAD~D@T53PAD~D

T59PAD~D@T59PAD~D T60PAD~D@T60PAD~D T61PAD~D@T61PAD~D

T62PAD~D@T62PAD~D CFG125 CFG135 CFG145

+VCC_CORE

RC80

@RC80

50_0402_1%

+VCC_GFXCORE_AXG

C C

B B

+V_DDR_REFB

+V_DDR_REFA

RC82 0_0402_5%~D@RC82 0_0402_5%~D@

1 2

RC83 0_0402_5%~D@RC83 0_0402_5%~D@

1 2

RC84

1K_0402_1%

INTEL 12/28 recommand to add 1k pull down

RC79

@RC79

50_0402_1%

RC85

RC85 1K_0402_1%

1K_0402_1%

CFG155

T64PAD~D@T64PAD~D

T63PAD~D@T63PAD~D

1 2

RC91 50_0402_1%@RC91 50_0402_1%@

1 2

RC90 50_0402_1%

+V_DDR_REFA_R +V_DDR_REFB_R

CFG0 CFG1

CFG2 CFG3

CFG4 CFG5 CFG6 CFG7 CFG8

CFG9

CFG10

CFG11

CFG12 CFG13 CFG14 CFG15 CFG16

CFG17

VCC_VAL_SENSE VSS_VAL_SENSE

VCC_AXG_VAL_SENSE

VSS_AXG_VAL_SENSE

T19PAD~D @T19PAD~D @

T25PAD~D @T25PAD~D @ T26PAD~D @T26PAD~D @

T28PAD~D @T28PAD~D @ T30PAD~D @T30PAD~D @

T33PAD~D @T33PAD~D @ T34PAD~D @T34PAD~D @ T35PAD~D @T35PAD~D @ T29 PAD~D@ T29 PAD~D@

T38PAD~D @T38PAD~D @ T39PAD~D @T39PAD~D @ T40PAD~D @T40PAD~D @ T41PAD~D @T41PAD~D @ T42PAD~D @T42PAD~D @ T43PAD~D @T43PAD~D @ T44PAD~D @T44PAD~D @ T45PAD~D @T45PAD~D @ T46PAD~D @T46PAD~D @ T47PAD~D @T47PAD~D @

B50

CFG[0]

C51

CFG[1]

B54

CFG[2]

D53

CFG[3]

A51

CFG[4]

C53

CFG[5]

C55

CFG[6]

H49

CFG[7]

A55

CFG[8]

H51

CFG[9]

K49

CFG[10]

K53

CFG[11]

F53

CFG[12]

G53

CFG[13]

L51

CFG[14]

F51

CFG[15]

D52

CFG[16]

L53

CFG[17]

H43

VCC_VAL_SENSE

K43

VSS_VAL_SENSE

H45

VAXG_VAL_SENSE

K45

VSSAXG_VAL_SENSE

F48

VCC_DIE_SENSE

H48

RSVD6

K48

RSVD7

BA19

RSVD8

AV19

RSVD9

AT21

RSVD10

BB21

RSVD11

BB19

RSVD12

AY21

RSVD13

BA22

RSVD14

AY22

RSVD15

AU19

RSVD16

AU21

RSVD17

BD21

RSVD18

BD22

RSVD19

BD25

RSVD20

BD26

RSVD21

BG22

RSVD22

BE22

RSVD23

BG26

RSVD24

BE26

RSVD25

BF23

RSVD26

BE24

RSVD27

SANDY-BRIDGE_BGA1023~D

RESERVED

DC_TEST_A4 DC_TEST_C4 DC_TEST_D3

DC_TEST_D1 DC_TEST_A58 DC_TEST_A59

DC_TEST_C59

DC_TEST_A61

DC_TEST_C61

DC_TEST_D61 DC_TEST_BD61 DC_TEST_BE61 DC_TEST_BE59 DC_TEST_BG61 DC_TEST_BG59 DC_TEST_BG58

DC_TEST_BG4

DC_TEST_BG3

DC_TEST_BE3

DC_TEST_BG1

DC_TEST_BE1 DC_TEST_BD1

RSVD28 RSVD29

RSVD30 RSVD31 RSVD32 RSVD33

RSVD34 RSVD35 RSVD36 RSVD37 RSVD38

RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44

RSVD45

BE7 BG7

N42 L42 L45 L47

M13 M14 U14 W14 P13

AT49 K24

AH2 AG13 AM14 AM15

N50

A4 C4 D3 D1 A58 A59 C59 A61 C61 D61 BD61 BE61 BE59 BG61 BG59 BG58 BG4 BG3 BE3 BG1 BE1 BD1

T2 PAD~D@T2 PAD~D@ T3 PAD~D@T3 PAD~D@

T4 PAD~D@T4 PAD~D@ T5 PAD~D@T5 PAD~D@ T6 PAD~D@T6 PAD~D@ T7 PAD~D@T7 PAD~D@

T8 PAD~D@T8 PAD~D@ T9 PAD~D@T9 PAD~D@ T10 PAD~D@ T10 PAD~D@ T11 PAD~D@ T11 PAD~D@ T12 PAD~D@ T12 PAD~D@

T13 PAD~D@ T13 PAD~D@ T14 PAD~D@ T14 PAD~D@

T15 PAD~D@ T15 PAD~D@ T16 PAD~D@ T16 PAD~D@ T17 PAD~D@ T17 PAD~D@ T204 PAD~D@T204 PAD~D@

T20 PAD~D@ T20 PAD~D@

T21 PAD~D@ T21 PAD~D@

T22 PAD~D@ T22 PAD~D@

T24 PAD~D@ T24 PAD~D@

T31 PAD~D@ T31 PAD~D@ T36 PAD~D@ T36 PAD~D@

T48 PAD~D@ T48 PAD~D@

PEG Static Lane Reversal - CFG2 is for the 16x

Display Port Presence Strap

PCIE Port Bifurcation Straps

CFG[6:5]

CFG2

RC78

@RC78

1K_0402_1%~D

1:(Default) Normal Operation; Lane #

CFG2

definition matches socket pin map definition

0:Lane Reversed

CFG4

RC81

@RC81

1K_0402_1%~D

1 : Disabled; No Physical Display Port

CFG4

attached to Embedded Display Port

0 : Enabled; An external Display Port device is connected to the Embedded Display Port

CFG6

CFG5

RC87

@RC87

1K_0402_1%~D

11: (Default) x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

RC86

@RC86

1K_0402_1%~D

CFG7

RC89

@RC89

1K_0402_1%~D

PEG DEFER TRAINING

1: (Default) PEG Train immediately

CFG7

following xxRESETB de assertion

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/06 2011/07/06

Compal Secret Data

Deciphered Date

0: PEG Wait for BIOS for training

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(4/6) RSVD,CFG

LA-6961P

754Monday, January 24, 2011

0.4

D D

+VCC_CORE

CC242

22U_0805_6.3V6M

CC242

CC241

22U_0805_6.3V6M

CC241

22U_0805_6.3V6M

C C

+VCC_CORE

B B

A A

22U_0805_6.3V6M

CC252

22U_0805_6.3V6M

CC252

22U_0805_6.3V6M

,ŝŐŚͲ&ƌĞƋƵĞŶĐǇĞĐŽƵƉůŝŶŐ

2.2U_0402_6.3V6K

CC266

CC265

2.2U_0402_6.3V6K

CC275

CC276

22U_0805_6.3V6M

CC230

CC253

22U_0805_6.3V6M

2.2U_0402_6.3V6K

CC267

2.2U_0402_6.3V6K

CC277

CC231

CC254

2.2U_0402_6.3V6K

CC268

2.2U_0402_6.3V6K

CC278

CC232

22U_0805_6.3V6M

CC232

22U_0805_6.3V6M

CC255

22U_0805_6.3V6M

CC255

22U_0805_6.3V6M

2.2U_0402_6.3V6K

CC269

CC270

2.2U_0402_6.3V6K

CC279

CC280

22U_0805_6.3V6M

CC256

22U_0805_6.3V6M

CC256

22U_0805_6.3V6M

2.2U_0402_6.3V6K

CC271

CC233

22U_0805_6.3V6M

CC233

22U_0805_6.3V6M

1 C106

C106

2 3

470U_D2_2VM_R4.5M

2.2U_0402_6.3V6K

CC272

C107

2 3

2.2U_0402_6.3V6K

CC273

placed internal

DC=33A

CC234

22U_0805_6.3V6M

CC234

22U_0805_6.3V6M

C108

2 3

470U_D2_2VM_R4.5M

2.2U_0402_6.3V6K

CC274

+VCC_CORE

UCPU1F

A26

VCC[1]

A29

VCC[2]

A31

VCC[3]

A34

VCC[4]

A35

VCC[5]

A38

VCC[6]

A39

VCC[7]

A42

VCC[8]

C26

VCC[9]

C27

VCC[10]

C32

VCC[11]

C34

VCC[12]

C37

VCC[13]

C39

VCC[14]

C42

VCC[15]

D27

VCC[16]

D32

VCC[17]

D34

VCC[18]

D37

VCC[19]

D39

VCC[20]

D42

VCC[21]

E26

VCC[22]

E28

VCC[23]

E32

VCC[24]

E34

VCC[25]

E37

VCC[26]

E38

VCC[27]

F25

VCC[28]

F26

VCC[29]

F28

VCC[30]

F32

VCC[31]

F34

VCC[32]

F37

VCC[33]

F38

VCC[34]

F42

VCC[35]

G42

VCC[36]

H25

VCC[37]

H26

VCC[38]

H28

VCC[39]

H29

VCC[40]

H32

VCC[41]

H34

VCC[42]

H35

VCC[43]

H37

VCC[44]

H38

VCC[45]

H40

VCC[46]

J25

VCC[47]

J26

VCC[48]

J28

VCC[49]

J29

VCC[50]

J32

VCC[51]

J34

VCC[52]

J35

VCC[53]

J37

VCC[54]

J38

VCC[55]

J40

VCC[56]

J42

VCC[57]

K26

VCC[58]

K27

VCC[59]

K29

VCC[60]

K32

VCC[61]

K34

VCC[62]

K35

VCC[63]

K37

VCC[64]

K39

VCC[66]

K42

VCC[67]

L25

VCC[68]

L28

VCC[69]

L33

VCC[70]

L36

VCC[71]

L40

VCC[72]

N26

VCC[73]

N30

VCC[74]

N34

VCC[75]

N38

VCC[76]

SANDY-BRIDGE_BGA1023~D

CORE SUPPLY

POWER

VCCIO[1] VCCIO[3] VCCIO[4] VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8]

VCCIO[9] VCCIO[10] VCCIO[11] VCCIO[12] VCCIO[13] VCCIO[14] VCCIO[15] VCCIO[16] VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20] VCCIO[21] VCCIO[22] VCCIO[23] VCCIO[24] VCCIO[25] VCCIO[26] VCCIO[27] VCCIO[28] VCCIO[29]

VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33]

PEG AND DDRSENSE LINES SVID QUIET RAILS

VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49]

VCCIO50

VCCIO51

VCCIO_SEL

VCCPQE[1] VCCPQE[2]

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE VSS_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

8.5A

AF46 AG48 AG50 AG51 AJ17 AJ21 AJ25 AJ43 AJ47 AK50 AK51 AL14 AL15 AL16 AL20 AL22 AL26 AL45 AL48 AM16 AM17 AM21 AM43 AM47 AN20 AN42 AN45 AN48

AA14 AA15 AB17 AB20 AC13 AD16 AD18 AD21 AE14 AE15 AF16 AF18 AF20 AG15 AG16 AG17 AG20 AG21 AJ14 AJ15

W16 W17

BC22

+VCCP_VCCPQ +1.05VS

AM25 AN22

H_CPU_SVIDALRT#

A44

H_CPU_SVIDCLK

B43

H_CPU_SVIDDAT

C44

VCCSENSE_R

F43

VSSSENSE_R

G43

AN16 AN17

10U_0603_6.3V6M

1U_0402_6.3V6K

330U_D2_2VM_R6M~D

RC122

1 2

0_0805_5%

H_VCCP_SEL

RC123

1 2

0_0805_5%

1 2

CC281

1U_0402_6.3V6K

RC98 0_0402_5%~DRC98 0_0402_5%~D RC99 0_0402_5%~DRC99 0_0402_5%~D

RC124

1 2

RC125

RC125 10_0402_1%

10_0402_1%

10U_0603_6.3V6M

CC235

CC236

1U_0402_6.3V6K

CC238

CC224

1U_0402_6.3V6K

CC243

CC244

1U_0402_6.3V6K

CC258

CC257

330U_D2_2VM_R6M~D

CC110

CC111

+1.05VS

1 2 1 2

10_0402_1%

VCCIO_SENSE 50 VSSIO_SENSE 50

10U_0603_6.3V6M

CC217

1U_0402_6.3V6K

CC239

1U_0402_6.3V6K

CC245

1U_0402_6.3V6K

CC259

330U_D2_2VM_R6M~D

CC112

+1.05VS

RC113

RC113 75_0402_5%

75_0402_5%

10U_0603_6.3V6M

CC237

1U_0402_6.3V6K

CC225

1U_0402_6.3V6K

CC246

1U_0402_6.3V6K

CC260

10U_0603_6.3V6M

CC218

1U_0402_6.3V6K

CC226

1U_0402_6.3V6K

CC247

1U_0402_6.3V6K

CC261

10U_0603_6.3V6M

CC219

1U_0402_6.3V6K

CC240

1U_0402_6.3V6K

CC248

1U_0402_6.3V6K

CC262

Need PWR add new circuit on 1.05V(refer CRB)

12 RC880_0402_5%~D RC880_0402_5%~D

RC95

130_0402_1%~D

RC94 43_0402_1%RC94 43_0402_1% RC92 0_0402_5%~DRC92 0_0402_5%~D RC96 0_0402_5%~DRC96 0_0402_5%~D

+1.05VS

1 2 1 2 1 2

VCCP_PWRCTRL 50

+1.05VS

+VCC_CORE

RC93

RC93 75_0402_5%

75_0402_5%

RC97

RC97 100_0402_1%~D

100_0402_1%~D

RC100

RC100 100_0402_1%~D

100_0402_1%~D

10U_0603_6.3V6M

CC221

CC220

1U_0402_6.3V6K

CC228

CC227

1U_0402_6.3V6K

CC249

CC250

1U_0402_6.3V6K

CC263

CC264

placed internal

Place the PU resistors close to CPU

VR_SVID_ALRT# 54 VR_SVID_CLK 54 VR_SVID_DAT 54

Place the PU resistors close to CPU

VCCSENSE 54 VSSSENSE 54

Place the PU resistors close to VR

10U_0603_6.3V6M

CC222

1U_0402_6.3V6K

CC229

1U_0402_6.3V6K

CC251

+1.05VS

10U_0603_6.3V6M

CC223

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/06 2011/07/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(5/6) PWR,BYPASS

LA-6961P

854Monday, January 24, 2011

0.4

+1.5V_CPU_VDDQ Source

+1.5V +1.5V_CPU_VDDQ

B+_BIAS+3VALW

RC102

RC102 100K_0402_5%~D

100K_0402_5%~D

22U_0805_6.3V6M

CC288

1U_0402_6.3V6K

CC328

10U_0603_6.3V6M

CC318

1U_0402_6.3V6K

CC301

VCC_AXG_SENSE

VSS_AXG_SENSE

1U_0402_6.3V6K~D

CC174

10U_0805_4VAM~D

CC168

CC169

1U_0402_6.3V6K

CC316

RUN_ON_CPU1.5VS3#

QC5A

QC5A 2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

18A

22U_0805_6.3V6M

CC289

CC175

10U_0603_6.3V6M~D

CC170

1U_0402_6.3V6K

CC317

UCPU1G

AA46

VAXG[1]

AB47

VAXG[2]

AB50

VAXG[3]

AB51

VAXG[4]

AB52

VAXG[5]

AB53

VAXG[6]

AB55

VAXG[7]

AB56

VAXG[8]

AB58

VAXG[9]

AB59

VAXG[10]

AC61

VAXG[11]

AD47

VAXG[12]

AD48

VAXG[13]

AD50

VAXG[14]

AD51

VAXG[15]

AD52

VAXG[16]

AD53

VAXG[17]

AD55

VAXG[18]

AD56

VAXG[19]

AD58

VAXG[20]

AD59

VAXG[21]

AE46

VAXG[22]

N45

VAXG[23]

P47

VAXG[24]

P48

VAXG[25]

P50

VAXG[26]

P51

VAXG[27]

P52

VAXG[28]

P53

VAXG[29]

P55

VAXG[30]

P56

VAXG[31]

P61

VAXG[32]

T48

VAXG[33]

T58

VAXG[34]

T59

VAXG[35]

T61

VAXG[36]

U46

VAXG[37]

V47

VAXG[38]

V48

VAXG[39]

V50

VAXG[40]

V51

VAXG[41]

V52

VAXG[42]

V53

VAXG[43]

V55

VAXG[44]

V56

VAXG[45]

V58

VAXG[46]

V59

VAXG[47]

W50

VAXG[48]

W51

VAXG[49]

W52

VAXG[50]

W53

VAXG[51]

W55

VAXG[52]

W56

VAXG[53]

W61

VAXG[54]

Y48

VAXG[55]

Y61

VAXG[56]

TBD

F45

VAXG_SENSE

G45

VSSAXG_SENSE

BB3

VCCPLL[1]

BC1

VCCPLL[2]

BC4

VCCPLL[3]

L17

VCCSA[1]

L21

VCCSA[2]

N16

VCCSA[3]

N20

VCCSA[4]

N22

VCCSA[5]

P17

VCCSA[6]

P20

VCCSA[7]

R16

VCCSA[8]

R18

VCCSA[9]

R21

VCCSA[10]

U15

VCCSA[11]

V16

VCCSA[12]

V17

VCCSA[13]

V18

VCCSA[14]

V21

VCCSA[15]

W20

VCCSA[16]

SANDY-BRIDGE_BGA1023~D

D D

RC104

@RC104

470U_D2_2VM_R4.5M

CC294

22U_0805_6.3V6M

CC286

1U_0402_6.3V6K

CC325

CC327

10U_0603_6.3V6M

CC321

CC322

1U_0402_6.3V6K

CC298

CC297

330U_D2_5VM_R6M~D

1 2 0_0402_5%~D

0_0402_5%~D

RC107

1 2 0_0402_5%~D

0_0402_5%~D

470U_D2_2VM_R4.5M

CC295

22U_0805_6.3V6M

CC287

CC283

1U_0402_6.3V6K

CC324

CC326

10U_0603_6.3V6M

CC320

placed internal

1U_0402_6.3V6K

CC299

CC300

VCC_AXG_SENSE54

VSS_AXG_SENSE54

10U_0805_4VAM~D

CC176

CC172

10U_0805_4VAM~D

CC173

CC167

RC120

0_0402_5%~D

1U_0402_6.3V6K

CC313

CC314

1U_0402_6.3V6K

CC319

1U_0402_6.3V6K

+1.8VS_VCCPLL

placed internal

10U_0805_4VAM~D

CC315

SUSP#17,25,43,48,49,50,51

CPU1.5V_S3_GATE25

+VCC_GFXCORE_AXG

22U_0805_6.3V6M

CC282

C C

B B

+VCCSA

330U_D2_2VM_R6M~D

VSSSA_SENSE52

A A

10U_0603_6.3V6M

CC323

1U_0402_6.3V6K

CC296

+1.8VS

RC109 0_0805_5%RC109 0_0805_5%

1 2

CC171

2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D 4

GRAPHICS

SENSE

LINES

SENSE

LINES

1.8V RAIL

SA RAIL

RC101

RC101 100K_0402_5%~D

100K_0402_5%~D

RUN_ON_CPU1.5VS3

QC5B

RUN_ON_CPU1.5VS3# 5,43

DDR3 - 1.5V RAILS

POWER

QUIET RAILS

VSS_SENSE_VDDQ

SENSE LINES

SM_VREF

VDDQ[1] VDDQ[2] VDDQ[3] VDDQ[4] VDDQ[5] VDDQ[6] VDDQ[7] VDDQ[8]

VDDQ[9] VDDQ[10] VDDQ[11] VDDQ[12] VDDQ[13] VDDQ[14] VDDQ[15] VDDQ[16] VDDQ[17] VDDQ[18] VDDQ[19] VDDQ[20] VDDQ[21] VDDQ[22] VDDQ[23] VDDQ[24] VDDQ[25] VDDQ[26]

VCCDQ[1] VCCDQ[2]

VDDQ_SENSE

VCCSA_SENSE

VCCSA_VID[0] VCCSA_VID[1]

QC3

AO4728L_SO8~D

8 7 6 5

0.1U_0603_50V_X7R

RC105

330K_0402_1%

+V_SM_VREF should have 10 mil trace width

AY43

AJ28 AJ33 AJ36 AJ40 AL30 AL34 AL38 AL42 AM33 AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33

AM28 AN26

BC43 BA43

U10

VCCSA_VID0

D48 D49

CC139

1 2 3

CC138

VCCSA_SEL 52

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

10U_0805_4VAM~D

CC160

1U_0402_6.3V6K

CC302

1U_0402_6.3V6K

1 2

CC312

RC111

10K_0402_5%

RC103

20K_0402_5%~D

CC284

10U_0805_4VAM~D

CC161

CC162

1U_0402_6.3V6K

CC304

CC303

placed internal

+1.5V_CPU_VDDQ

1 2

RC106 0_0402_5%@ RC106 0_0402_5%@

NTR4503NT1G 1N_SOT23-3~D

RUN_ON_CPU1.5VS3

10U_0805_4VAM~D

CC164

CC163

1U_0402_6.3V6K

CC306

CC305

+1.5V_CPU_VDDQ

RC112

100_0402_1%

+V_SM_VREF+V_SM_VREF_CNT

QC4

10U_0805_4VAM~D

CC165

CC177

1U_0402_6.3V6K

CC308

CC307

+1.5V_CPU_VDDQ +1.5V

add CC181 , CC182, 4 caps are all pop. follow checklist 1.0 5/24

VCCSA_SENSE 52

RC110

@ RC110

0_0402_5%~D

RC116

RC116 100_0402_1%

100_0402_1%

+1.5V_CPU_VDDQ

10U_0805_4VAM~D

CC178

1U_0402_6.3V6K

CC309

CC182 0.1U_0402_10V7K~DCC182 0.1U_0402_10V7K~D

CC184 0.1U_0402_10V7K~DCC184 0.1U_0402_10V7K~D

CC181 0.1U_0402_10V7K~DCC181 0.1U_0402_10V7K~D

CC183 0.1U_0402_10V7K~DCC183 0.1U_0402_10V7K~D

@J8

1 2

PAD-OPEN 4x4m

PJP30 OPEN

CC166

CC166 330U_D2_2VM_R6M

330U_D2_2VM_R6M

1U_0402_6.3V6K

CC310

CC311

VID[0] VID[1] 2011 2012 0 0 0.90 V Yes Yes 0 1 0.80 V Yes Yes 1 0 0.725 V No Yes 1 1 0.675 V No Yes

+1.5V

UCPU1H

A13

VSS[1]

A17

VSS[2]

A21

VSS[3]

A25

VSS[4]

A28

VSS[5]

A33

VSS[6]

A37

VSS[7]

A40

VSS[8]

A45

VSS[9]

A49

VSS[10]

A53

VSS[11]

VSS[12]

AA1

VSS[13]

AA13

VSS[14]

AA50

VSS[15]

AA51

VSS[16]

AA52

VSS[17]

AA53

VSS[18]

AA55

VSS[19]

AA56

VSS[20]

AA8

VSS[21]

AB16

VSS[22]

AB18

VSS[23]

AB21

VSS[24]

AB48

VSS[25]

AB61

VSS[26]

AC10

VSS[27]

AC14

VSS[28]

AC46

VSS[29]

AC6

VSS[30]

AD17

VSS[31]

AD20

VSS[32]

AD4

VSS[33]

AD61

VSS[34]

AE13

VSS[35]

AE8

VSS[36]

AF1

VSS[37]

AF17

VSS[38]

AF21

VSS[39]

AF47

VSS[40]

AF48

VSS[41]

AF50

VSS[42]

AF51

VSS[43]

AF52

VSS[44]

AF53

VSS[45]

AF55

VSS[46]

AF56

VSS[47]

AF58

VSS[48]

AF59

VSS[49]

AG10

VSS[50]

AG14

VSS[51]

AG18

VSS[52]

AG47

VSS[53]

AG52

VSS[54]

AG61

VSS[55]

AG7

VSS[56]

AH4

VSS[57]

AH58

VSS[58]

AJ13

VSS[59]

AJ16

VSS[60]

AJ20

VSS[61]

AJ22

VSS[62]

AJ26

VSS[63]

AJ30

VSS[64]

AJ34

VSS[65]

AJ38

VSS[66]

AJ42

VSS[67]

AJ45

VSS[68]

AJ48

VSS[69]

AJ7

VSS[70]

AK1

VSS[71]

AK52

VSS[72]

AL10

VSS[73]

AL13

VSS[74]

AL17

VSS[75]

AL21

VSS[76]

AL25

VSS[77]

AL28

VSS[78]

AL33

VSS[79]

AL36

VSS[80]

AL40

VSS[81]

AL43

VSS[82]

AL47

VSS[83]

AL61

VSS[84]

AM13

VSS[85]

AM20

VSS[86]

AM22

VSS[87]

AM26

VSS[88]

AM30

VSS[89]

AM34

VSS[90]

SANDY-BRIDGE_BGA1023~D

VSS

VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180]

AM38 AM4 AM42 AM45 AM48 AM58 AN1 AN21 AN25 AN28 AN33 AN36 AN40 AN43 AN47 AN50 AN54 AP10 AP51 AP55 AP7 AR13 AR17 AR21 AR41 AR48 AR61 AR7 AT14 AT19 AT36 AT4 AT45 AT52 AT58 AU1 AU11 AU28 AU32 AU51 AU7 AV17 AV21 AV22 AV34 AV40 AV48 AV55 AW13 AW43 AW61 AW7 AY14 AY19 AY30 AY36 AY4 AY41 AY45 AY49 AY55 AY58 AY9 BA1 BA11 BA17 BA21 BA26 BA32 BA48 BA51 BB53 BC13 BC5 BC57 BD12 BD16 BD19 BD23 BD27 BD32 BD36 BD40 BD44 BD48 BD52 BD56 BD8 BE5 BG13

placed internal

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/06 2011/07/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(6/6) PWR,VSS

LA-6961P

954Monday, January 24, 2011

0.4

+1.5V

CD6

10U_0603_6.3V6M~D

CD11

1U_0402_6.3V6K~D

CD20

RD1

RD1 1K_0402_1%

1K_0402_1%

+V_DDR_REFA

RD3

RD3 1K_0402_1%

1K_0402_1%

All VREF traces should have 10 mil trace width

10U_0603_6.3V6M~D

CD12

CD13

DDR_A_DQS#[0..7]6

DDR_A_DQS[0..7]6

DDR_A_D[0..63]6

DDR_A_MA[0..15]6

D D

Layout Note: Place near JDIMM1

+1.5V

1U_0402_6.3V6K~D

+1.5V

10U_0603_6.3V6M~D

C C

B B

Layout Note: Place near JDIMM1.203,204

+0.75VS

1U_0402_6.3V6K~D

CD3

CD4

10U_0603_6.3V6M~D

CD7

CD8

1U_0402_6.3V6K~D

CD17

1U_0402_6.3V6K~D

CD5

10U_0603_6.3V6M~D

CD9

1U_0402_6.3V6K~D

CD18

CD19

1U_0402_6.3V6K~D

CD10

330U_SX_2VY~D

CD14

+V_DDR_REFA

DQS0#

DQS0

DQ12 DQ13

RESET#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3

DQ30 DQ31

CKE1

CK1#

RAS#

ODT0

ODT1

VREF_CA

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5

DQ46 DQ47

DQ52 DQ53

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7

DQ62 DQ63

EVENT#

GND2

+1.5V+1.5V

VSS DQ4 DQ5

VSS

VSS DQ6 DQ7

VSS

VSS DM1

VSS

VSS DM2

VSS

VDD

A15 A14

VDD

A11

VDD

CK1

VDD

BA1

VDD

S0#

VDD

VSS

VSS DM4

VSS

VSS DM6

VSS

SDA

SCL

VTT

DDR_A_D4

DDR_A_D5

DDR_A_DQS#0

DDR_A_DQS0

DDR_A_D6

DDR_A_D7

DDR_A_D12

24 26 28

DDR3_DRAMRST#

30 32

DDR_A_D14

DDR_A_D15

36 38

DDR_A_D20DDR_A_D16

DDR_A_D21

42 44 46 48

DDR_A_D22

DDR_A_D23

52 54

DDR_A_D28

DDR_A_D29

58 60

DDR_A_DQS#3

DDR_A_DQS3

64 66

DDR_A_D30

DDR_A_D31

70 72

74 76

DDR_A_MA15

DDR_A_MA14

80 82

DDR_A_MA11DDR_A_MA12

DDR_A_MA7DDR_A_MA9

DDR_A_MA6DDR_A_MA8

DDR_A_MA4DDR_A_MA5

DDR_A_MA2

DDR_A_MA0

100

M_CLK_DDR1

102

M_CLK_DDR#1

104 106

DDR_A_BS1

108

DDR_A_RAS#

110 112

DDR_CS0_DIMMA#

114

M_ODT0

116 118

M_ODT1

120

122

124

126 128

DDR_A_D36

130

DDR_A_D37

132 134 136 138

DDR_A_D38

140

DDR_A_D39

142 144

DDR_A_D44

146

DDR_A_D45

148 150

DDR_A_DQS#5

152

DDR_A_DQS5

154 156

DDR_A_D46

158

DDR_A_D47

160 162

DDR_A_D52

164

DDR_A_D53

166 168 170 172

DDR_A_D54

174

DDR_A_D55

176 178

DDR_A_D60

180

DDR_A_D61

182 184

DDR_A_DQS#7

186

DDR_A_DQS7

188 190

DDR_A_D62

192

DDR_A_D63

194 196 198

PCH_SMBDATA

200

PCH_SMBCLK

202 204

+0.75VS

206

RD2 0_0402_5%~DRD2 0_0402_5%~D

1 2

2.2U_0603_6.3V6K~D

CD1

DDR_CKE0_DIMMA6 DDR_CKE1_DIMMA 6

DDR_A_BS26

M_CLK_DDR06 M_CLK_DDR#06

DDR_A_BS06

DDR_A_WE#6 DDR_A_CAS#6

DDR_CS1_DIMMA#6

+3VS

0.1U_0402_16V4Z~D

+DIMM0_VREF

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D DDR_A_D0 DDR_A_D1

CD2

DDR_A_D2

DDR_A_D3

DDR_A_D8 DDR_A_D9 DDR_A_D13

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA DDR_CKE1_DIMMA

DDR_A_BS2

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS#

DDR_A_MA13

DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_D58 DDR_A_D59

1 2

RD6 10K_0402_5%~DRD6 10K_0402_5%~D

1 2

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D RD7 10K_0402_5%~DRD7 10K_0402_5%~D

CD22

CD21

+0.75VS

JDIMM1

VREF_DQ

VSS

DQ0

DQ1

VSS

DM0

VSS

DQ2

DQ3

VSS

DQ8

DQ9

VSS

DQS1#

DQS1

VSS

DQ10

DQ11

VSS

DQ16

DQ17

VSS

DQS2#

DQS2

VSS

DQ18

DQ19

VSS

DQ24

DQ25

VSS

DM3

VSS

DQ26

DQ27

VSS

CKE0

VDD

BA2

VDD

A12/BC#

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

FOX AS0A626-U2RN-7F 204P DDR3

FOX AS0A626-U2RN-7F 204P DDR3 CONN@

CONN@

M_CLK_DDR1 6 M_CLK_DDR#1 6

DDR_A_BS1 6 DDR_A_RAS# 6

DDR_CS0_DIMMA# 6 M_ODT0 6

M_ODT1 6

+VREF_CA

2.2U_0603_6.3V6K~D

PCH_SMBDATA 11,13,24 PCH_SMBCLK 11,13,24

CD15

DDR3_DRAMRST# 6,11

0.1U_0402_16V4Z~D

CD16

+1.5V

RD4

RD4 1K_0402_1%

1K_0402_1%

RD5

RD5 1K_0402_1%

1K_0402_1%

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/06 2011/07/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DDRIII DIMMA

LA-6961P

0.4

10 54Monday, January 24, 2011

0.4

+1.5V

DDR_B_DQS#[0..7]6

DDR_B_DQS[0..7]6

DDR_B_D[0..63]6

D D

DDR_B_MA[0..15]6

330U_SX_2VY~D

CD39

All VREF traces should have 10 mil trace width

Layout Note: Place near JDIMMB

+1.5V

1U_0402_6.3V6K~D

CD28

C C

+1.5V

10U_0603_6.3V6M~D

CD33

CD32

Layout Note: Place near JDIMMB.203,204

B B

+0.75VS

1U_0402_6.3V6K~D

CD42

1U_0402_6.3V6K~D

CD29

CD30

10U_0603_6.3V6M~D

CD35

CD34

1U_0402_6.3V6K~D

CD43

1U_0402_6.3V6K~D

CD31

10U_0603_6.3V6M~D

CD36

1U_0402_6.3V6K~D

CD45

CD44

10U_0603_6.3V6M~D

CD37

CD38

RD15

RD15 1K_0402_1%

1K_0402_1%

RD16

RD16 1K_0402_1%

1K_0402_1%

+V_DDR_REFB

RD14 0_0402_5%~DRD14 0_0402_5%~D

+V_DDR_REFB

1 2

2.2U_0603_6.3V6K~D

CD27

Note: Check voltage tolerance of VREF_DQ at the DIMM socket

DDR_CS3_DIMMB#6

+3VS

RD19

10K_0402_5%~D

0.1U_0402_16V4Z~D

DDR_B_BS26

M_CLK_DDR26 M_CLK_DDR#26

DDR_B_BS06

DDR_B_WE#6 DDR_B_CAS#6

+3VS

10K_0402_5%~D

RD20

CD26

+DIMM1_VREF

DDR_B_D0 DDR_B_D1

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26 DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13 DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D59

2.2U_0603_6.3V6K~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D +0.75VS

CD46

+1.5V

JDIMM2

VREF_DQ

VSS

DQ0

DQ1

VSS

DM0

VSS

DQ2

DQ3

VSS

DQ8

DQ9

VSS

DQS1#

DQS1

VSS

DQ10

DQ11

VSS

DQ16

DQ17

VSS

DQS2#

DQS2

VSS

DQ18

DQ19

VSS

DQ24

DQ25

VSS

DM3

VSS

DQ26

DQ27

VSS

CKE0

VDD

BA2

VDD

A12/BC#

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

CD47

GND1

FOX AS0A626-UARN-7F 204P DDR3

FOX AS0A626-UARN-7F 204P DDR3 CONN@

CONN@

DQS0#

DQS0

DQ12 DQ13

RESET#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3

DQ30 DQ31

CKE1

CK1#

RAS#

ODT0

ODT1

VREF_CA

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5

DQ46 DQ47

DQ52 DQ53

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7

DQ62 DQ63

EVENT#

GND2

+1.5V

VSS DQ4 DQ5 VSS

VSS DQ6 DQ7 VSS

VSS

DM1

VSS

DM2

VSS

VDD

A15 A14

VDD

A11

VDD

CK1

VDD

BA1

VDD

S0#

VDD

VSS

DM4

VSS

DM6

VSS

SDA SCL VTT

DDR_B_D4

DDR_B_D5

6 8

DDR_B_DQS#0

DDR_B_DQS0

12 14

DDR_B_D6

DDR_B_D7

18 20

DDR_B_D12

DDR_B_D13

24 26 28

DDR3_DRAMRST#

30 32

DDR_B_D14

DDR_B_D15

36 38

DDR_B_D20

DDR_B_D21

42 44 46 48

DDR_B_D22

DDR_B_D23

52 54

DDR_B_D28

DDR_B_D29

58 60

DDR_B_DQS#3

DDR_B_DQS3

64 66

DDR_B_D30

DDR_B_D31

70 72

DDR_CKE3_DIMMB

74 76

DDR_B_MA15

DDR_B_MA14

80 82

DDR_B_MA11

DDR_B_MA7

DDR_B_MA6

DDR_B_MA4

DDR_B_MA2

DDR_B_MA0

100

M_CLK_DDR3

102

M_CLK_DDR#3

104 106

DDR_B_BS1

108

DDR_B_RAS#

110 112

DDR_CS2_DIMMB#

114

M_ODT2

116 118

M_ODT3

120 122

124 126 128

DDR_B_D36

130

DDR_B_D37

132 134 136 138

DDR_B_D38

140

DDR_B_D39

142 144

DDR_B_D44

146

DDR_B_D45

148 150

DDR_B_DQS#5

152

DDR_B_DQS5

154 156

DDR_B_D46

158

DDR_B_D47

160 162

DDR_B_D52

164

DDR_B_D53

166 168 170 172

DDR_B_D54

174

DDR_B_D55

176 178

DDR_B_D60

180

DDR_B_D61

182 184

DDR_B_DQS#7

186

DDR_B_DQS7

188 190

DDR_B_D62

192

DDR_B_D63

194 196 198

PCH_SMBDATA

200

PCH_SMBCLK

202 204

+0.75VS

206

DDR3_DRAMRST# 6,10

DDR_CKE3_DIMMB 6DDR_CKE2_DIMMB6

M_CLK_DDR3 6 M_CLK_DDR#3 6

DDR_B_BS1 6 DDR_B_RAS# 6

DDR_CS2_DIMMB# 6 M_ODT2 6

M_ODT3 6

+VREF_CB

0.1U_0402_16V4Z~D

2.2U_0603_6.3V6K~D

CD40

PCH_SMBDATA 10,13,24 PCH_SMBCLK 10,13,24

RD17

RD17 1K_0402_1%

1K_0402_1%

CD41

+1.5V

RD18

RD18 1K_0402_1%

1K_0402_1%

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/06 2011/07/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DDRIII DIMMB

LA-6961P

0.4

11 54Monday, January 24, 2011

0.4

PCH_RTCX1

1 2

RH2 10M_0402_5%RH2 10M_0402_5%

18P_0402_50V8J

CH2

OSC4OSC

YH1

D D

C C

B B

A A

YH1

NC3NC

far away hot spot

HDA_BITCLK_AUDIO24

HDA_RST_AUDIO#24

HDA_SYNC_AUDIO24

+3V_PCH +3V_PCH+3V_PCH

RH38

@RH38

@ 200_0402_5%

200_0402_5%

PCH_JTAG_TDO PCH_JTAG_TDIPCH_JTAG_TMS

RH44

RH44 100_0402_1%

100_0402_1%

22P_0402_50V8J

PCH_RTCX2

32.768KHZ_12.5PF_Q13MC14610002

CH3

CH3 18P_0402_50V8J

18P_0402_50V8J

+RTCVCC

1U_0603_10V4Z

1U_0603_10V4Z 1 2

RH25 20K_0402_5%RH25 20K_0402_5%

1 2

RH23 20K_0402_5%RH23 20K_0402_5%

1U_0603_10V4Z

HDA_BIT_CLK

RH27 33_0402_5%RH27 33_0402_5%

HDA_RST#

RH28 33_0402_5%RH28 33_0402_5%

RH33 33_0402_5%RH33 33_0402_5%

RH275 1M_0402_5%~DRH275 1M_0402_5%~D

HDA_SDO25

HDA_SDOUT_AUDIO24

RH40

@RH40

@ 200_0402_5%

200_0402_5%

RH46

100_0402_1%

12 RH5351_0402_5% RH5351_0402_5%

HDA_SDOUT

C108310P_0402_50V8J @ C108310P_0402_50V8J @

RH256

PCH_SPI_CLK

1 2

33_0402_5%

+3V_PCH

PCH_JTAG_TCK

RH39

@RH39

@ 200_0402_5%

200_0402_5%

RH45

RH45 100_0402_1%

100_0402_1%

CH94

1 2

Reserve for EMI please close to UH1

CH4

CH5

QH1BSS138_SOT23

1 2

RH36 0_0402_5%~D

RH24 0_0402_5%~D

RH30 33_0402_5%RH30 33_0402_5%

CMOS

CLRP1

SHORT PADS

CLRP2

SHORT PADS

ME CMOS

CLP1 & CLP2 place near DIMM

+5VS

HDA_SPKR24

HDA_SYNC

1 2

HDA_SDIN024

HDA_SDOUT

PCH_DP_HPD29

PCH_JTAG_TCK5

PCH_JTAG_TMS5

PCH_JTAG_TDI5

PCH_JTAG_TDO5

1 2

RH58 0_0402_5%RH58 0_0402_5%

PCH_SPI_SO PCH_SPI_SO_R

1 2

RH60 0_0402_5%RH60 0_0402_5%

1 2

RH54 3.3K_0402_5%RH54 3.3K_0402_5%

C107710P_0402_50V8J @ C107710P_0402_50V8J @

+3V_PCH

@ RH57

1 2

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK

HDA_SYNC

HDA_SPKR

HDA_RST#

HDA_SDIN0

HDA_SDOUT

HDA_DOCK_EN#

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_SPI_CLK

PCH_SPI_CS#

PCH_SPI_SI

PCH_SPI_SO

RH57

3.3K_0402_5%

PCH_SPI_CS#_RPCH_SPI_CS#

PCH_SPI_WP#

UH1A

A19

RTCX1

C19

RTCX2

F19

RTCRST#

A23

SRTCRST#

K22

INTRUDER#

C21

INTVRMEN

H35

HDA_BCLK

H37

HDA_SYNC

SPKR

F35

HDA_RST#

D36

HDA_SDIN0

B36

HDA_SDIN1

C35

HDA_SDIN2

A35

HDA_SDIN3

K37

HDA_SDO

K35

HDA_DOCK_EN# / GPIO33

M35

HDA_DOCK_RST# / GPIO13

M17

JTAG_TCK

M15

JTAG_TMS

U12

JTAG_TDI

M12

JTAG_TDO

AD12

SPI_CLK

AB8

SPI_CS0#

AB6

SPI_CS1#

SPI_MOSI

SPI_MISO

COUGAR-POINT-SFF_BGA1017~D

RTCIHDA

JTAG

SPI

FWH4 / LFRAME#

LDRQ1# / GPIO23

LPC

SATA3

SATA

SATA3RCOMPO

SATA0GP / GPIO21

SATA1GP / GPIO19

SPI ROM FOR ME ( 4MByte )

U48

/CS

/WP

GND4DIO

W25X32VSSIG_SO8~D

SPI BIOS Pinout

(1)CS# (5)DIO (2)DO (6)CLK (3)WP# (7)HOLD# (4)GND (8)VCC

W25X32

/HOLD

VCC

PCH_SPI_HOLD#

PCH_SPI_CLK_R

CLK

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

LDRQ0#

SERIRQ

SATA0RXN

SATA0RXP SATA0TXN SATA0TXP

SATA1RXN

SATA1RXP SATA1TXN SATA1TXP

SATA2RXN

SATA2RXP SATA2TXN SATA2TXP

SATA3RXN

SATA3RXP SATA3TXN SATA3TXP

SATA4RXN

SATA4RXP SATA4TXN SATA4TXP

SATA5RXN

SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3COMPI

SATA3RBIAS

SATALED#

RH255 0_0402_5%RH2550_0402_5%

RH63 0_0402_5%RH63 0_0402_5%

A37 A39 C39 C37

K40

H40 F37

AN3 AN1 AU3 AU1

AN6 AN8 AR3 AR1

AD4 AD2 AL3 AL1

AD8 AD6 AG3 AG1

AE3 AE1 AH8 AH6

AC3 AC1 AJ3 AJ1

AB10

AB12

AF10

AF12

AH4

W10

RH563.3K_0402_5% RH563.3K_0402_5%

1 2

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

SERIRQ

SATA_PTX_DRX_N0 SATA_PTX_DRX_P0

SATA_COMP

SATA3_COMP

RBIAS_SATA3

PCH_SATALED#

PCH_GPIO21

BBS_BIT0_R

PCH_SPI_CLK

PCH_SPI_SIPCH_SPI_SI_R

LPC_AD0 23,25 LPC_AD1 23,25 LPC_AD2 23,25 LPC_AD3 23,25

LPC_FRAME# 23,25

SERIRQ 25

CH91 0.01U_0402_16V7KCH91 0.01U_0402_16V7K

1 2

CH90 0.01U_0402_16V7KCH90 0.01U_0402_16V7K

1 2

PCH_SATALED# 27

CH6

0.1U_0402_16V4Z

+1.05VS_VCC_SATA

+1.05VS_SATA3

1 2

RH41 37.4_0402_1%RH41 37.4_0402_1%

1 2

RH43 49.9_0402_1%

1 2

RH48 750_0402_1%

+3V_PCH

SATA_PRX_DTX_N0 26 SATA_PRX_DTX_P0 26 SATA_PTX_DRX_N0_C 26 SATA_PTX_DRX_P0_C 26

RTC Battery

+RTCBATT

RH259

1K_0402_5%

20mils

+RTCVCC

Place CH95 close to PCH.

HDD1

HDA_SDO

ME debug mode , this signal has a weak internal PD

L=>security measures defined in the Flash Descriptor will be in effect (default)

H=>Flash Descriptor Security will be overridden

HDA_SYNC

This signal has a weak internal pull-down On Die PLL VR is supplied by

1.5V when smapled high

+3VLP

1.8V when sampled low Needs to be pulled High for Huron River platfrom

20mils

1 2 2

DH4

DH4 BAT54CW_SOT323-3

BAT54CW_SOT323-3

CH95

CH95 1U_0603_10V4Z

1U_0603_10V4Z

HDA_DOCK_EN#

PCH_GPIO21

+RTCVCC

PCH_INTVRMEN

INTVRMEN

BBS_BIT0_R

SERIRQ

PCH_GPIO21

PCH_SATALED#

HDA_SDOUT

HDA_SYNC

RH52 1K_0402_5% RH52 1K_0402_5%

RH47 10K_0402_5%

RH11

1 2

1M_0402_5%

RH31 330K_0402_5%RH31 330K_0402_5%

RH34 330K_0402_5%@RH34 330K_0402_5%@

烉

Integrated VRM enable

烉

Integrated VRM disable

RH49 10K_0402_5%

RH29 10K_0402_5%RH29 10K_0402_5%

RH32 10K_0402_5%RH32 10K_0402_5%

RH35 10K_0402_5%RH35 10K_0402_5%

HDA_SPKR

RH37 1K_0402_5%@RH37 1K_0402_5%@

LOW=Default HIGH=No Reboot

RH42 1K_0402_5%@RH42 1K_0402_5%@

Low = Disabled

High = Enabled

+3V_PCH

RH55

1K_0402_5%@

SM_INTRUDER#

+3V_PCH

+RTCVCC

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/06 2011/07/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PCH (1/8) SATA,HDA,SPI, LPC

LA-6961P

12 54Monday, January 24, 2011

0.4

PCIE_PRX_GLANTX_N121

10/100/1G LAN --->

MiniWWAN --->

D D

MiniWWAN --->

MiniWLAN (Mini Card 2)--->

1394/Card Reader --->

PCIE_PRX_GLANTX_P121 PCIE_PTX_GLANRX_N121 PCIE_PTX_GLANRX_P121

PCIE_PRX_WWANTX_N223

PCIE_PRX_WWANTX_P223 PCIE_PTX_WWANRX_N223 PCIE_PTX_WWANRX_P223

PCIE_PRX_WLANTX_N323

PCIE_PRX_WLANTX_P323 PCIE_PTX_WLANRX_N323 PCIE_PTX_WLANRX_P323

PCIE_PRX_CARDTX_N422

PCIE_PRX_CARDTX_P422 PCIE_PTX_CARDRX_N422 PCIE_PTX_CARDRX_P422

CH9 0.1U_0402_10V7K~DCH9 0.1U_0402_10V7K~D

1 2

CH14 0.1U_0402_10V7K~DCH14 0.1U_0402_10V7K~D

1 2

CH10 0.1U_0402_10V7K~DCH10 0.1U_0402_10V7K~D

1 2

CH15 0.1U_0402_10V7K~DCH15 0.1U_0402_10V7K~D

1 2

CH11 0.1U_0402_10V7K~DCH11 0.1U_0402_10V7K~D

1 2

CH16 0.1U_0402_10V7K~DCH16 0.1U_0402_10V7K~D

1 2

CH12 0.1U_0402_10V7K~DCH12 0.1U_0402_10V7K~D

1 2

CH13 0.1U_0402_10V7K~DCH13 0.1U_0402_10V7K~D

1 2

EXPRESS_CARD --->

PCIE_PRX_USB3TX_N624

CLK_PCH_14M

USB 3.0 --->

RH86

33_0402_5%

22P_0402_50V8J

@ CH21

CH21

1 2

PCIE_PRX_USB3TX_P624 PCIE_PTX_USB3RX_N624 PCIE_PTX_USB3RX_P624

Reserve for EMI please close to UH1

C C

CLK_PCI_LPBACK

Reserve for EMI please close to UH1

RH89

33_0402_5%

MiniWWAN (Mini Card 1)--->

MiniWLAN (Mini Card 2)--->

1394/Card Reader --->

B B

YH2

25MHZ_18PF_1Y725000CE1A~D

1 2

CH23

27P_0402_50V8J

CH22

1 2

22P_0402_50V8J

10/100/1G LAN --->

EXPRESS_CARD --->

USB 3.0 --->

XTAL25_IN

CH24

27P_0402_50V8J

XTAL25_OUT

RH1171M_0402_5% RH1171M_0402_5%

CLK_PCIE_LAN#21 CLK_PCIE_LAN21

LANCLK_REQ#21

CLK_PCIE_WWAN#23 CLK_PCIE_WWAN23

CLKREQ_WWAN#23

CLK_PCIE_WLAN#23 CLK_PCIE_WLAN23

CLKREQ_WLAN#23

CLK_PCIE_CD#22 CLK_PCIE_CD22

CLK_PCIE_USB30#24 CLK_PCIE_USB3024

USB30_CLKREQ#24

CLK_CPU_ITP#5 CLK_CPU_ITP5

CLK_RES_ITP#5 CLK_RES_ITP5

CH19 0.1U_0402_10V7K~DCH19 0.1U_0402_10V7K~D

1 2

CH20 0.1U_0402_10V7K~DCH20 0.1U_0402_10V7K~D

1 2

+3V_PCH

+3VS

+3V_PCH

CLK_CPU_ITP# CLK_CPU_ITP

RH91 10K_0402_5%~DRH91 10K_0402_5%~D

RH93 0_0402_5%~DRH93 0_0402_5%~D RH94 0_0402_5%~DRH94 0_0402_5%~D

RH95 10K_0402_5%~D

RH96 0_0402_5%~DRH96 0_0402_5%~D RH97 0_0402_5%~DRH97 0_0402_5%~D RH100 10K_0402_5%~DRH100 10K_0402_5%~D

+3VS

RH101 0_0402_5%~DRH101 0_0402_5%~D RH102 0_0402_5%~DRH102 0_0402_5%~D RH103 10K_0402_5%~DRH103 10K_0402_5%~D

RH104 0_0402_5%~DRH104 0_0402_5%~D RH106 0_0402_5%~DRH106 0_0402_5%~D

RH107 10K_0402_5%~DRH107 10K_0402_5%~D

RH110 10K_0402_5%~DRH110 10K_0402_5%~D

RH112 10K_0402_5%~DRH112 10K_0402_5%~D

RH114 0_0402_5%~DRH114 0_0402_5%~D RH115 0_0402_5%~DRH115 0_0402_5%~D RH116 10K_0402_5%~DRH116 10K_0402_5%~D

RH118 10K_0402_5%~DRH118 10K_0402_5%~D

RH119 0_0402_5%~DRH119 0_0402_5%~D RH120 0_0402_5%~DRH120 0_0402_5%~D

RH121 0_0402_5%~D@RH121 0_0402_5%~D@ RH122 0_0402_5%~D@RH122 0_0402_5%~D@

1 2

1 2 1 2

1 2

12 12 12

12 12

PCIE_PRX_GLANTX_N1 PCIE_PRX_GLANTX_P1 PCIE_PTX_GLANRX_N1_C PCIE_PTX_GLANRX_P1_C

PCIE_PRX_WWANTX_N2 PCIE_PRX_WWANTX_P2 PCIE_PTX_WWANRX_N2_C PCIE_PTX_WWANRX_P2_C

PCIE_PRX_WLANTX_N3 PCIE_PRX_WLANTX_P3 PCIE_PTX_WLANRX_N3_C PCIE_PTX_WLANRX_P3_C

PCIE_PRX_CARDTX_N4 PCIE_PRX_CARDTX_P4 PCIE_PTX_CARDRX_N4_C PCIE_PTX_CARDRX_P4_C

PCIE_PRX_USB3TX_N6 PCIE_PRX_USB3TX_P6 PCIE_PTX_USB3RX_N6_C PCIE_PTX_USB3RX_P6_C

T81PAD~D @T81PAD~D @ T82PAD~D @T82PAD~D @

PCIECLKREQ0#

PCIE_LAN# PCIE_LAN

LANCLK_REQ#

PCIE_MINI2# PCIE_MINI2

MINI2CLK_REQ#

PCIE_MINI1# PCIE_MINI1

MINI1CLK_REQ#

PCIE_CD# PCIE_CD

CDCLK_REQ#

PEG_B_CLKREQ#

PCIE_USB30# PCIE_USB30

USB30_CLKREQ#

GPIO46

CLK_BCLK_ITP# CLK_BCLK_ITP

CLK_BCLK_ITP

UH1B

BJ33

PERN1

BL33

PERP1

BB30

PETN1

AY30

PETP1

BJ35

PERN2

BL35

PERP2

BB33

PETN2

AY33

PETP2

BH36

PERN3

BK36

PERP3

BF33

PETN3

BD33

PETP3

BJ37

PERN4

BL37

PERP4

BD35

PETN4

BF35

PETP4

BJ39

PERN5

BL39

PERP5

AY35

PETN5

BB35

PETP5

BH40

PERN6

BK40

PERP6

BD37

PETN6

BF37

PETP6

BJ41

PERN7

BL41

PERP7

AY37

PETN7

BB37

PETP7

BJ43

PERN8

BL43

PERP8

AY40

PETN8

BB40

PETP8

AD48

CLKOUT_PCIE0N

AD50

CLKOUT_PCIE0P

PCIECLKRQ0# / GPIO73

AE49

CLKOUT_PCIE1N

AE51

CLKOUT_PCIE1P

PCIECLKRQ1# / GPIO18

AD40

CLKOUT_PCIE2N

AD42

CLKOUT_PCIE2P

PCIECLKRQ2# / GPIO20

AA49

CLKOUT_PCIE3N

AA51

CLKOUT_PCIE3P

PCIECLKRQ3# / GPIO25

Y48

CLKOUT_PCIE4N

Y50

CLKOUT_PCIE4P

M19

PCIECLKRQ4# / GPIO26

AB40

CLKOUT_PCIE5N

AB42

CLKOUT_PCIE5P

PCIECLKRQ5# / GPIO44

AF40

CLKOUT_PEG_B_N

AF42

CLKOUT_PEG_B_P

PEG_B_CLKRQ# / GPIO56

AB44

CLKOUT_PCIE6N

AB46

CLKOUT_PCIE6P

PCIECLKRQ6# / GPIO45

W44

CLKOUT_PCIE7N

W46

CLKOUT_PCIE7P

PCIECLKRQ7# / GPIO46

AR12

CLKOUT_ITPXDP_N

AR10

CLKOUT_ITPXDP_P

COUGAR-POINT-SFF_BGA1017~D

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

PCI-E*

CLOCKS

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_DP_N CLKOUT_DP_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_SATA_N CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

SMBCLK

SMBDATA

SML0CLK

CL_CLK1

CL_DATA1

CL_RST1#

PCH_LID_SW_IN#

H12

SMBCLK

F17

SMBDATA

F10

DRAMRST_CNTRL_PCH

H22

SML0CLK

K12

SML0DATA

PCH_GPIO74

SML1CLK

D12

SML1DATA

C11

PRGLILHG

PEG_A_CLKRQ#

CLK_PEG_VGA#

AF44

CLK_PEG_VGA

AF46

CLK_CPU_DMI#

BB24

CLK_CPU_DMI

AY24

CLK_CPU_DPLL#

AN10

CLK_CPU_DPLL

AN12

CLKIN_DMI#

BD17

CLKIN_DMI

BF17

CLKIN_DMI2#

BB26

CLKIN_DMI2

AY26

CLKIN_DOT96#

M24

CLKIN_DOT96

K24

CLKIN_SATA#

AK8

CLKIN_SATA

AK6

CLK_PCH_14M

J49

CLK_PCI_LPBACK

E51

XTAL25_IN

W49

XTAL25_OUT

W51

XCLK_RCOMP

AC49

H50

D48

BT_DET#

G49

CAM_DET#

J51

Total device

PCH_GPIO64

PCH_GPIO65

EC_LID_OUT#

1 2

RH680_0402_5% RH680_0402_5%

1 2

RH710_0402_5%@RH710_0402_5%

MEMORY

DRAMRST_CNTRL_PCH 6

20090512 add double mosfet prevent ATI M92 electric leakage

RH141

10K_0402_5%~D

1 2

CLK_PEG_VGA# 30 CLK_PEG_VGA 30

CLK_CPU_DMI# 5 CLK_CPU_DMI 5

CLK_CPU_DPLL# 5 CLK_CPU_DPLL 5

CLK_PCI_LPBACK 15

1 2

RH113 90.9_0402_1%RH113 90.9_0402_1%

BT_DET# 23

CAM_DET# 20

EC_LID_OUT# 25

LID_SW_IN# 24,25,27

+3V_PCH

CLK_REQ_VGA# 30

SMBCLK

2N7002DW-T/R7_SOT363-6

SMBDATA

+1.05VS_VCCDIFFCLKN

SML1CLK

SML1DATA

6 1

QH3A

RH105

RH105 @

1 2

0_0402_5%

2N7002DW-T/R7_SOT363-6

1 2

0_0402_5%

+3VS

6 1

2N7002DW-T/R7_SOT363-6

+3VS

2.2K_0402_5%

QH3B

RH111

RH111 @

QH4A

QH4B

2N7002DW-T/R7_SOT363-6

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK

SML1DATA

DRAMRST_CNTRL_PCH

PCH_GPIO74

LID_SW_IN#

CLKIN_DMI2# CLKIN_DMI2 CLKIN_DMI# CLKIN_DMI CLKIN_DOT96# CLKIN_DOT96 CLKIN_SATA# CLKIN_SATA CLK_PCH_14M

If use extenal CLK gen, please place close to CLK gen else, please place close to PCH

+3VS

RH98

1 2

RH67 2.2K_0402_5%RH67 2.2K_0402_5%

1 2

RH69 2.2K_0402_5%RH69 2.2K_0402_5%

1 2

RH70 2.2K_0402_5%

1 2

RH72 2.2K_0402_5%

1 2

RH73 2.2K_0402_5%RH73 2.2K_0402_5%

1 2

RH74 2.2K_0402_5%RH74 2.2K_0402_5%

1 2

RH75 1K_0402_5%

5/24 change to 10K

1 2

RH87 10K_0402_5%RH87 10K_0402_5%

RH85

1 2

RH76 10K_0402_5%RH76 10K_0402_5%

1 2

RH77 10K_0402_5%RH77 10K_0402_5%

1 2

RH78 10K_0402_5%RH78 10K_0402_5%

1 2

RH79 10K_0402_5%RH79 10K_0402_5%

1 2

RH80 10K_0402_5%RH80 10K_0402_5%

1 2

RH81 10K_0402_5%RH81 10K_0402_5%

1 2

RH82 10K_0402_5%RH82 10K_0402_5%

1 2

RH83 10K_0402_5%RH83 10K_0402_5%

1 2

RH84 10K_0402_5%RH84 10K_0402_5%

1 2

PCH_GPIO64

PCH_GPIO65

CAM_DET#

BT_DET#

1 2

RH166 10K_0402_5%RH166 10K_0402_5%

1 2

RH108 10K_0402_5%RH108 10K_0402_5%

1 2

RH179 10K_0402_5%RH179 10K_0402_5%

1 2

RH109 10K_0402_5%RH109 10K_0402_5%

RH99

2.2K_0402_5%

1 2

PCH_SMBCLK 10,11,24

PCH_SMBDATA 10,11,24

PCH_SMLCLK 23,25,26,31,46

PCH_SMLDATA 23,25,26,31,46

47K_0402_5%~D

+3V_PCH

+3VALW

+3VS

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/06 2011/07/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

PCH (2/8) PCIE, SMBUS, CLK

LA-6961P

13 54Monday, January 24, 2011

0.4

UH1C

DMI_CTX_PRX_N04 DMI_CTX_PRX_N14 DMI_CTX_PRX_N24 DMI_CTX_PRX_N34

DMI_CTX_PRX_P04 DMI_CTX_PRX_P14 DMI_CTX_PRX_P24 DMI_CTX_PRX_P34

DMI_CRX_PTX_N04

D D

XDP_DBRESET#5

C C

PM_DRAM_PWRGD5

SUSWARN# SUSACK#_R

PCH_GPIO29

B B

GPIO72

RI#

WAKE#

AC_PRESENT

SUSWARN#

PCH_RSMRST#

SYSTEM_PWROK

A A

DMI_CRX_PTX_N14 DMI_CRX_PTX_N24 DMI_CRX_PTX_N34

DMI_CRX_PTX_P04 DMI_CRX_PTX_P14 DMI_CRX_PTX_P24 DMI_CRX_PTX_P34

+1.05VS

SUSACK#25

PCH_PWROK

PCH_APWROK25

PCH_RSMRST#25

SUSWARN#25

PBTN_OUT#5,25

AC_PRESENT25

1 2

RH139 0_0402_5%~DRH139 0_0402_5%~D

RH148 10K_0402_5%@RH148 10K_0402_5%@

1 2

RH143 10K_0402_5%RH143 10K_0402_5%

1 2

RH145 10K_0402_5%RH145 10K_0402_5%

1 2

RH146 1K_0402_5%RH146 1K_0402_5%

1 2

RH150 10K_0402_5%@RH150 10K_0402_5%@

1 2

RH154 10K_0402_5%RH154 10K_0402_5%

1 2

RH159 10K_0402_5%RH159 10K_0402_5%

1 2

RH272 10K_0402_5%RH272 10K_0402_5%

1 2

RH124 49.9_0402_1%RH124 49.9_0402_1%

RH125 750_0402_1%~DRH125 750_0402_1%~D

4mil width and place within 500mil of the PCH

RH273 0_0402_5%

GPIO72

PCH_PWROK5,25

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

1 2

XDP_DBRESET#

1 2

PM_DRAM_PWRGD

1 2

+3V_PCH

DMI_IRCOMP

RBIAS_CPY

SUSACK#_R

SYSTEM_PWROK

PM_PWROK_R

PCH_RSMRST#_R

SUSWARN#_R

PBTN_OUT#_R

AC_PRESENT_R

RI#

PCH_PWROK

1 2

RH127 0_0402_5%~DRH127 0_0402_5%~D

RH130 0_0402_5%RH130 0_0402_5%

RH131 0_0402_5%RH131 0_0402_5%

RH133 0_0402_5%~DRH133 0_0402_5%~D

RH134 0_0402_5%~DRH134 0_0402_5%~D

RH135 0_0402_5%~DRH135 0_0402_5%~D

RH137 0_0402_5%~DRH137 0_0402_5%~D

VGATE5,25,54

UH1C

BL21

DMI0RXN

BL23

DMI1RXN

BJ19

DMI2RXN

BL17

DMI3RXN

BJ21

DMI0RXP

BJ23

DMI1RXP

BL19

DMI2RXP

BJ17

DMI3RXP

BD22

DMI0TXN

BB22

DMI1TXN

BB19

DMI2TXN

BB17

DMI3TXN

BF22

DMI0TXP

AY22

DMI1TXP

AY19

DMI2TXP

AY17

DMI3TXP

BF19

DMI_ZCOMP

BD19

DMI_IRCOMP

BK20

DMI2RBIAS

F15

SUSACK#

SYS_RESET#

M10

SYS_PWROK

M22

PWROK

APWROK

B12

DRAMPWROK

B20

RSMRST#

C13

SUSWARN#/SUSPWRDNACK/GPIO30

K19

PWRBTN#

H19

ACPRESENT / GPIO31

H10

BATLOW# / GPIO72

F12

RI#

COUGAR-POINT-SFF_BGA1017~D

DSWODVREN

CH96

0.1U_0402_16V4Z

RH147 330K_0402_5%RH147 330K_0402_5%

RH151 330K_0402_5%@RH151 330K_0402_5%@

DSWODVREN - On Die DSW VR Enable

H烉Enable

烉

Disable

+3VS

UH7

IN1

VCC

OUT

IN2

GND

MC74VHC1G08DFT2G_SC70-5

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6

DMI

FDI

DMI

FDI

FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

SYSTEM_PWROK

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

Check EC for S3 S4 LED

+RTCVCC

SYSTEM_PWROK 5

BL13 BJ15 BD12 BJ11 AY15 AY12 BJ9 BF10

BJ13 BL15 BF12 BL11 BB15 BB12 BL9 BD10

BB10

BH12

BK8

BK12

BH8

F22

A21

K10

A15

BB8

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWODVREN

PCH_DPWROK

WAKE#

PM_CLKRUN#

SUS_STAT#

SUSCLK

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

PM_SLP_SUS#

H_PM_SYNC

RH126 0_0402_5%~D

1 2

RH128 0_0402_5%~DRH128 0_0402_5%~D

RH132 0_0402_5%

PCH_GPIO29

If not using integrated LAN,signal may be left as NC.

+3VS

RH264 2.2K_0402_5%RH264 2.2K_0402_5%

RH265 2.2K_0402_5%RH265 2.2K_0402_5%

RH248

RH167

FDI_CTX_PRX_N0 4 FDI_CTX_PRX_N1 4 FDI_CTX_PRX_N2 4 FDI_CTX_PRX_N3 4 FDI_CTX_PRX_N4 4 FDI_CTX_PRX_N5 4 FDI_CTX_PRX_N6 4 FDI_CTX_PRX_N7 4

FDI_CTX_PRX_P0 4 FDI_CTX_PRX_P1 4 FDI_CTX_PRX_P2 4 FDI_CTX_PRX_P3 4 FDI_CTX_PRX_P4 4 FDI_CTX_PRX_P5 4 FDI_CTX_PRX_P6 4 FDI_CTX_PRX_P7 4

FDI_INT 4

FDI_FSYNC0 4

FDI_FSYNC1 4

FDI_LSYNC0 4

FDI_LSYNC1 4

PCH_RSMRST#_R

PCH_DPWROK 25

PCIE_WAKE# 21,23,24,25

T76 PAD~DT76 PAD~D

RH155 2.2K_0402_5%~DRH155 2.2K_0402_5%~D

RH157 2.2K_0402_5%~DRH157 2.2K_0402_5%~D

RH144 2.37K_0402_1%~DRH144 2.37K_0402_1%~D

RH158 100K_0402_5%~DRH158 100K_0402_5%~D

RH123 100K_0402_5%RH123 100K_0402_5%

PM_SLP_SUS# 25

H_PM_SYNC 5

1 2

SUSCLK_R 25

PM_SLP_S5# 25,27

PM_SLP_S4# 25

PM_SLP_S3# 25,27

Can be left NC when IAMT is not support on the platfrom

8.2K_0402_5%@

8.2K_0402_5%

C108210P_0402_50V8J @ C108210P_0402_50V8J @

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LVDS_DDC_CLK

LVDS_DDC_DATA

PM_CLKRUN#

CTRL_CLK

CTRL_DATA

PM_CLKRUN#

LVDS_IBG

VGA_LVDDEN

ENBKL

SUSCLK

Issued Date

UH1D

ENBKL25

VGA_LVDDEN20,25

PCH_VGA_PWM20

LVDS_DDC_CLK20

LVDS_DDC_DATA20

LVDS_ACLK-20 LVDS_ACLK+20

LVDS_A0-20 LVDS_A1-20 LVDS_A2-20

LVDS_A0+20 LVDS_A1+20 LVDS_A2+20

2010/07/06 2011/07/06

ENBKL

LVDS_DDC_CLK LVDS_DDC_DATA

T203PAD~D T203PAD~D

LVDS_ACLKLVDS_ACLK+

LVDS_A0LVDS_A1LVDS_A2-

LVDS_A0+ LVDS_A1+ LVDS_A2+

RH140

1K_0402_0.5%~D

CTRL_CLK CTRL_DATA

LVDS_IBG

CRT_IREF

Compal Secret Data

M44 M42

L49

L51

K46

R42 M40

AH42 AH40

AG51 AG49

AK44 AK46

AR46 AN49 AN44 AK40

AR44 AN51 AN46 AK42

AH46 AH44

AM50

AL49

AJ51

AH50

AM48

AL51

AJ49

AH48

M46 R46 U46

R49 N49

M50 N51

R51

T48

Deciphered Date

UH1D

L_BKLTEN L_VDD_EN

L_BKLTCTL

L_DDC_CLK L_DDC_DATA

L_CTRL_CLK L_CTRL_DATA

LVD_IBG LVD_VBG

LVD_VREFH LVD_VREFL

LVDSA_CLK# LVDSA_CLK

LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDSB_CLK# LVDSB_CLK

LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

CRT_BLUE CRT_GREEN CRT_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

DAC_IREF CRT_IRTN

COUGAR-POINT-SFF_BGA1017~D

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

HDMI

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

mDP

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

CRT

DMC

AU40 AU42

AR51 AR49

AT50

SDVO_INTN

AT48

SDVO_INTP

W42 R44

AW51

DDPB_AUXN

AW49

DDPB_AUXP

AY42

DDPB_HPD

AY48

DDPB_0N

AY50

DDPB_0P

AY44

DDPB_1N

AY46

DDPB_1P

BB44

DDPB_2N

BB46

DDPB_2P

BA49

DDPB_3N

BA51

DDPB_3P

T50 U44

AU51

DDPC_AUXN

AU49

DDPC_AUXP

BE46

DDPC_HPD

BC49

DDPC_0N

BC51

DDPC_0P

BD48

DDPC_1N

BD50

DDPC_1P

BF46

DDPC_2N

BF45

DDPC_2P

BE49

DDPC_3N

BE51

DDPC_3P

M48 U42

AU46

DDPD_AUXN

AU44

DDPD_AUXP

BK44

DDPD_HPD

BG51

DDPD_0N

BG49

DDPD_0P

BF42

DDPD_1N

BD42

DDPD_1P

BJ47

DDPD_2N

BL47

DDPD_2P

BL45

DDPD_3N

BJ45

DDPD_3P

Title

PCH (3/8) DMI,FDI,PM,GFX,DP

Size Document Number Rev

LA-6961P

Date: Sheet

RH142 100K_0402_5%RH142 100K_0402_5%

1 2

RH149 100K_0402_5%RH149 100K_0402_5%

1 2

RH152 100K_0402_5%RH152 100K_0402_5%

1 2

Compal Electronics, Inc.

14 54Monday, January 24, 2011

0.4

Compal Electronics, In

D D

C C

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

DGPU_HOLD_RST# DGPU_SELECT#

DGPU_PWR_EN30,33,43,53

WWAN_RADIO_OFF#23

WLAN_BT_RADIO_OFF#23

WL_OFF#23

FFS_INT124

CR_CPPEN22

B B

A A

CLK_PCI_LPBACK13

CLK_PCI_LPC25

CLK_PCI_LPBACK CLK_PCI_LPC

WL_OFF# PCI_PIRQB# PCI_PIRQD# PCI_PIRQC#

WWAN_RADIO_OFF# DGPU_SELECT# DGPU_PWR_EN FFS_INT1

CR_CPPEN PCI_PIRQA# DP_CBL_DET GPIO3

WLAN_BT_RADIO_OFF#

DGPU_HOLD_RST#

RH164 22_0402_5%RH164 22_0402_5% RH165 22_0402_5%RH165 22_0402_5%

1 8 2 7 3 6 4 5

RH184

1 2

CLK_PCI1

C107810P_0402_50V8J @ C107810P_0402_50V8J @

RPH3

8.2K_0804_8P4R_5%

RPH4

8.2K_0804_8P4R_5%

RPH5

8.2K_0804_8P4R_5%

8.2K_0402_5%

RH173

8.2K_0402_5%@

RH185

8.2K_0402_5%

DGPU_PWR_EN

WWAN_RADIO_OFF# WLAN_BT_RADIO_OFF# WL_OFF#

FFS_INT1 GPIO3 DP_CBL_DET CR_CPPEN

T123PAD~D @T123PAD~D @

PCH_PLTRST#

T170PAD~D @T170PAD~D @ T166PAD~D @T166PAD~D @ T168PAD~D @T168PAD~D @

+3VS

CLK_PCI0 CLK_PCI1 CLK_PCI2 CLK_PCI3 CLK_PCI4

UH1E

BH24

TP1

BK24

TP2

BH20

TP3

BK16

TP4

BH16

TP5

AN42

TP6

AN40

TP7

AR40

TP8

AR42

TP9

D20

TP10

M30

TP11

TP12

AM4

TP13

AT4

TP14

AT2

TP15

AD10

TP16

B24

TP17

D24

TP18

AD44

TP19

AD46

TP20

BJ48

TP21

BL7

TP22

W40

TP23

K30

TP24

BH49

TP41

BB42

TP42

BJ25

TP25

BJ27

TP26

BJ31

TP27

BJ29

TP28

BL25

TP29

BL27

TP30

BL31

TP31

BL29

TP32

BF26

TP33

BB28

TP34

BF28

TP35

BF30

TP36

BD26

TP37

AY28

TP38

BD28

TP39

BD30

TP40

D49

PIRQA#

C48

PIRQB#

C47

PIRQC#

C45

PIRQD#

G46

REQ1# / GPIO50

K44

REQ2# / GPIO52

F46

REQ3# / GPIO54

F42

GNT1# / GPIO51

H42

GNT2# / GPIO53

D44

GNT3# / GPIO55

A47

PIRQE# / GPIO2

C41

PIRQF# / GPIO3

F45

PIRQG# / GPIO4

F40

PIRQH# / GPIO5

PME#

PLTRST#

G51

CLKOUT_PCI0

E49

CLKOUT_PCI1

H48

CLKOUT_PCI2

J43

CLKOUT_PCI3

G45

CLKOUT_PCI4

COUGAR-POINT-SFF_BGA1017~D

10K_0402_5%

PLT_RST#5,21,22,23,24,25

RH169

+3VS

1 2

RSVD

PCI

USB

RH171

RH171 100K_0402_5%

100K_0402_5%

BE3

RSVD1

BE1

RSVD2

AU8

RSVD3

BJ7

RSVD4

BA3

RSVD5

BH3

RSVD6

AU6

RSVD7

AW3

RSVD8

AW1

RSVD9

AY6

RSVD10

AY2

RSVD11

AY4

RSVD12

BC3

RSVD13

BC1

RSVD14

BG1

RSVD15

BG3

RSVD16

BE6

RSVD17

BH4

RSVD18

BF7

RSVD19

BJ4

RSVD20

BJ5

RSVD21

BK6

RSVD22

RSVD23

DF_TVS

RSVD24

RSVD25

RSVD26 RSVD27

RSVD28 RSVD29

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

USBP12N

USBP12P

USBP13N

USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

1 2

RH168 0_0402_5%

+3VS +3VS

UH5

IN1

IN2

SN74AHC1G08DCKR_SC70-5

NV_ALE

AY8

NV_CLE

BC7

BL5

BB6

BD2 BD4

BA1 BF6

F24 H24

USB20_N1

C25

USB20_P1

A25

USB20_N2

C27

USB20_P2

A27

USB20_N3

H28

USB20_P3

F28

USB20_N4

M26

USB20_P4

K26

USB20_N5

D28

USB20_P5

B28

USB20_N6

H26

USB20_P6

F26 D32 B32 M28 K28 C29 A29 C31 A31 H33 F33 H30 F30 M33 K33

USBRBIAS

C33

A33

USB_OC0#

C17

USB_OC1#

A17

1.5VDDR_VID0

A13

1.5VDDR_VID1

D16

USB_OC2#

A11

USB_OC5#

B16

USB_OC6#

C23

USB3_SMI#

H15

PCH_PLTRST#

10K_0402_5%

USB20_N1 24 USB20_P1 24 USB20_N2 23 USB20_P2 23 USB20_N3 20 USB20_P3 20 USB20_N4 23 USB20_P4 23 USB20_N5 23 USB20_P5 23 USB20_N6 27 USB20_P6 27

Within 500 mils

1 2

RH163 22.6_0402_1%RH163 22.6_0402_1%

PLTRST_VGA#30

RH192

1/24 SPECTER RESERVE

USB/Left

Bluetooth

Camera

Mini Card(WLAN)

Mini Card(WWAN)

ELC LED

USB_OC0# 24

1.5VDDR_VID0 48

1.5VDDR_VID1 48

USB30_SMI# 24

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

(For USB Port 9)

RH170

100_0402_5%

RH172

100K_0402_5%

2010/07/06 2011/07/06

1 2

RH254 0_0402_5%@ RH254 0_0402_5%@

UH6

NC7SZ08P5X_NL_SC70-5

Compal Secret Data

DGPU_HOLD_RST#

Deciphered Date

DMI Termination Voltage

Set to Vcc when HIGH

NV_CLE

Set to Vss when LOW

RH162

+1.8VS

RH161

2.2K_0402_5%

H_SNB_IVB# 5

Weak internal PU,Do not pull low

1K_0402_5%

NV_CLE

CLOSE TO THE BRANCHING POINT

Intel Anti-Theft Techonlogy

High=Endabled

NV_ALE

Low=Disable(floating)

NV_ALE

RH160 1K_0402_5%@RH160 1K_0402_5%@

1 2

USB_OC0# USB_OC1# USB_OC2# USB_OC5#

10K_1206_8P4R_5%~D

1.5VDDR_VID0

1.5VDDR_VID1 USB30_SMI# USB_OC6#

10K_1206_8P4R_5%~D

1 2

RH267 0_0402_5%@ RH267 0_0402_5%@

1 2

RH266 0_0402_5%RH266 0_0402_5%

DGPU_PWROK

PCH_PLTRST#

Title

Size Document Number Rev

Date: Sheet of

DGPU_PWROK 16,30,53

Compal Electronics, Inc.

PCH (4/8) PCI, USB, NVRAM

LA-6961P

RPH1

4 5 3 6 2 7 1 8

RPH2

4 5 3 6 2 7 1 8

+1.8VS

+3V_PCH

0.4

15 54Tuesday, January 25, 2011

0.4

D D

GPIO28

On-Die PLL Voltage Regulator This signal has a weak internal pull up

烉

On-Die voltage regulator enable

L烉On-Die PLL Voltage Regulator disable

RH177 1K_0402_5%~D@RH177 1K_0402_5%~D@

PCH_GPIO37

C C

FDI TERMINATION VOLTAGE OVERRIDE

LOW - Tx, Rx terminated

to same voltage (DC Coupling Mode)

+3VS

RH181 1K_0402_5%@RH181 1K_0402_5%@

RH182

100K_0402_5%

1 2

PCH_GPIO28

PCH_GPIO37

GPIO27

PCH_GPIO27 (Have internal Pull-High) High: VCCVRM VR Enable

Low: VCCVRM VR Disable

RH186 10K_0402_5%@RH186 10K_0402_5%@

B B

1 2

PCH_GPIO27

PCH_GPIO28 needs to be connected to XDP_FN8 PCH_GPIO35 needs to be connected to XDP_FN9 PCH_GPIO15 needs to be connected to XDP_FN16

Please refer to Huron River Debug Board DG 0.5

A A

UH1F

GPIO0

DGPU_EDIDSEL#

GPIO6

EC_SCI#25

EC_SMI#25

BT_RADIO_OFF#23

PCH_HDMI_HPD#28

DGPU_PWROK15,30,53

BT_ON#23

FFS_INT224,26

HDD_DETECT#26

EC_SCI#

EC_SMI#

BT_RADIO_OFF#

PCH_HDMI_HPD#

PCH_GPIO16

DGPU_PWROK

PCH_GPIO22

PCH_GPIO27

PCH_GPIO28

BT_ON#

GPIO36

PCH_GPIO37

PCH_GPIO38

PCH_GPIO39

FFS_INT2

GPIO49

HDD_DETECT#

UH1F

BMBUSY# / GPIO0

B40

TACH1 / GPIO1

C43

TACH2 / GPIO6

A45

TACH3 / GPIO7

H17

GPIO8

LAN_PHY_PWR_CTRL / GPIO12

GPIO15

AA3

SATA4GP / GPIO16

B44

TACH0 / GPIO17

SCLOCK / GPIO22

K15

GPIO24 / MEM_LED

C15

GPIO27

GPIO28

STP_PCI# / GPIO34

W12

GPIO35

SATA2GP / GPIO36

SATA3GP / GPIO37

SLOAD / GPIO38

U10

SDATAOUT0 / GPIO39

SDATAOUT1 / GPIO48

AA1

SATA5GP / GPIO49

K17

GPIO57

VSS_NCTF_1

A48

VSS_NCTF_2

A49

VSS_NCTF_3

VSS_NCTF_4

A51

VSS_NCTF_5

BH1

VSS_NCTF_6

BH51

VSS_NCTF_7

BJ1

VSS_NCTF_8

BJ3

VSS_NCTF_9

BJ49

VSS_NCTF_10

BJ51

VSS_NCTF_11

BL1

VSS_NCTF_12

BL3

VSS_NCTF_13

BL4

VSS_NCTF_14

COUGAR-POINT-SFF_BGA1017~D

GPIO

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

CPU/MISC

NCTF

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

NC_1

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

K42

A43

LVDS_CAB_DET#

D40

A41

AU12

AU10

BC9

AK10

AH12

AK12

AH10

U40

BL48

BL49

BL51

C49

C51

D51

GPIO68

GPIO69

PCH_PECI_R

KB_RST#

H_THERMTRIP#_C

INIT3_3V#

T126 PAD~D@ T126 PAD~D@

1 2

RH1750_0402_5%@RH1750_0402_5%

KB_RST# 25

H_CPUPWRGD 5

1 2

RH176390_0402_5% RH176390_0402_5%

H_PECI 5,25

H_THERMTRIP#

RH178

RH178 10K_0402_5%

10K_0402_5%

+3VS

RH174

RH174 10K_0402_5%

10K_0402_5%

1 2

INIT3_3V

This signal has weak internal PU, can't pull low

add RH185,RH229,RH251 5/25

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/06 2011/07/06

Compal Secret Data

Deciphered Date

GATEA20 25

H_THERMTRIP# 5

BT_RADIO_OFF#

GPIO68

HDD_DETECT#

PCH_HDMI_HPD#

EC_SMI#

PCH_GPIO16

DGPU_EDIDSEL#

GPIO6

GPIO0

GPIO36

BT_ON#

KB_RST#

remove PCH_GPIO48 pull high

PCH_GPIO22

PCH_GPIO38

PCH_GPIO39

FFS_INT2

GPIO49

LVDS_CAB_DET#

DGPU_PWROK

1 2

RH191

1 2

RH187

1 2

RH188

RH189

1 2

RH190

RH183 10K_0402_5%RH183 10K_0402_5%

1 2

RH180 10K_0402_5%RH180 10K_0402_5%

1 2

RH252

1 2

RH198

1 2

RH193

1 2

RH195

1 2

RH196

1 2

RH197

1 2

RH262

1 2

RH263

1 2

RH229

1 2

RH258

1 2

RH251

1 2

RH253

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

+3V_PCH

10K_0402_5%@

10K_0402_5%

10K_0402_5%<BOM Structure>

1K_0402_5%

10K_0402_5%<BOM Structure>

+3VS

8.2K_0402_5%

10K_0402_5%

200K_0402_5%

10K_0402_5%

10K_0402_5%<BOM Structure>

10K_0402_5%

10K_0402_5%<BOM Structure>

10K_0402_5%

Compal Electronics, Inc.

PCH (5/8) GPIO, CPU, MISC

LA-6961P

0.4

16 54Monday, January 24, 2011

+1.05VS

POWER

2925mA

POWER

VCC CORE

VCCIO

FDI

1mA

CRTLVDS

1mA

60mA

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCTX_LVDS[3]

VCCTX_LVDS[4]

20mA

DMI

190mA

VccDFTERM[1]

VccDFTERM[2]

VccDFTERM[3]

VccDFTERM[4]

20mA

NAND / SPI HVCMOS

VCCADAC

VSSADAC

VCCALVDS[1] VCCALVDS[2]

VSSALVDS[1] VSSALVDS[2]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3] VCCVRM[4]

VCCDMI[1]

VCCCLKDMI

VCCSPI

+VCCADAC

U51

V50

+VCCA_LVDS

AF33 AG33

AC33 AE33

AF37

AG37

AG39

AJ37

+3VS_VCC3_3_6

T39

U37

+VCCAFDI_VRM

AU21 AW21

+VCCP_VCCDMI

AM23

+1.05VS_VCC_DMI_CCI

AP39

placed internal

AJ13

AJ15

AK15

AL13

+3V_VCCPSPI

Y19

placed internal

+VCCTX_LVDS

CH32

CH36

0.1U_0402_10V7K~D

CH30

CH29

0.1U_0402_10V7K

0.01U_0402_16V7K

Near AP43

0.01U_0402_16V7K

placed internal

RH202

1 2

0_0805_5%

+VCCP_VCCDMI

1 2

10UH_LBR2012T100M_20%~D

CH43

CH43 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+VCCPNAND

CH45

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D RH210

RH210

1 2

0_0805_5%

CH47

1U_0402_6.3V6K~D

BLM18PG181SN1_0603~D

CH31

CH31 10U_0805_4VAM~D

10U_0805_4VAM~D

RH199 0.022_0805_1% RH199 0.022_0805_1%

1 2

CH33

0.01U_0402_16V7K

+3VS

LH9

+1.05VS

1 2

RH207 0_0805_5%~DRH207 0_0805_5%~D

+3V_PCH

LH1

CH34

placed internal

UH1G

J10

PAD-OPEN 4x4m

PAD-OPEN 4x4m @

D D

+1.05VS

+VCCAPLLEXP_R +VCCAPLLEXP

RH201 0_0603_5%~D

RH200 0_0603_5%~DRH200 0_0603_5%~D

1 2

1UH_LB2012T1R0M_20%~D

Place CH35 Near AP19 pin

+1.05VS

+3VS

0.1U_0402_10V7K

RH203

1 2

0_0805_5%

0_0805_5% @

RH206

RH206 0_0805_5%

0_0805_5% @

+3VS_VCCA3GBG

CH44

CH37

10U_0805_4VAM~D

C C

+1.05VS_VCCCORE

CH27

CH28

10U_0805_4VAM~D

1U_0402_6.3V6K~D

placed internal

@ LH3

+1.05VS_VCC_EXP

CH38

CH39

1U_0402_6.3V6K~D

placed internal

CH25

LH3

CH40

1U_0402_6.3V6K~D

CH26

1U_0402_6.3V6K~D

+1.05VS_VCCDPLLEXP

CH35

10U_0805_4VAM~D

CH41

1U_0402_6.3V6K~D

+VCCAFDI_VRM

Place CH53 Near AP13,AP15 pin

+1.05VS

CH46

1U_0402_6.3V6K~D

+1.05VS_VCCAPLL_FDI

RH209

+1.05VS_VCCDPLL_FDI

1 2

0_0805_5%

+VCCP_VCCDMI

RH208 0_0603_5%~D

B B

RH208 0_0603_5%~D

UH1G

1300mA

AB21

VCCCORE[1]

AB23

VCCCORE[2]

AC21

VCCCORE[3]

AC23

VCCCORE[4]

AE21

VCCCORE[5]

AE23

VCCCORE[6]

AF21

VCCCORE[7]

AF23

VCCCORE[8]

AG21

VCCCORE[9]

AG23

VCCCORE[10]

AG25

VCCCORE[11]

AG27

VCCCORE[12]

AJ21

VCCCORE[13]

AJ23

VCCCORE[14]

AJ25

VCCCORE[15]

AJ27

VCCCORE[16]

AJ29

VCCCORE[17]

AJ31

VCCCORE[18]

AK29

VCCCORE[19]

AK31

VCCCORE[20]

AK33

VCCCORE[21]

AM33

VCCCORE[22]

AM35

VCCCORE[23]

AM21

VCCIO[28]

AP19

VCCAPLLEXP

AR15

VCCIO[15]

AT13

VCCIO[16]

AR23

VCCIO[17]

AR25

VCCIO[18]

AR27

VCCIO[19]

AR29

VCCIO[20]

AU23

VCCIO[21]

AU25

VCCIO[22]

AU27

VCCIO[23]

AU29

VCCIO[24]

AU35

VCCIO[25]

AW34

VCCIO[26]

BK28

VCC3_3[3]

AU19

VCCVRM[5]

AW18

VCCVRM[6]

AP13

VCCAFDPLL[1]

AP15

VCCAFDPLL[2]

AK21

VCCIO[27]

AU15

VCCDMI[2]

AW16

VCCDMI[3]

COUGAR-POINT-SFF_BGA1017~D

+3VS

LH2

0.1UH_MLF1608DR10KT_10%_1608

0.1uH inductor, 200mA

22U_0805_6.3V6M

RH204

1 2

0_0805_5%

CH42

1U_0402_6.3V6K~D

+1.8VS

+3VS

LH2

+1.05VS

+1.8VS

PCH Power Rail Table

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05

3.3

1.05

S0 Iccmax Current (A)

0.001

0.266

0.001

0.08

1.3

0.042

1.05VccIO 2.925

1.05VccASW 1.01

3.3VccSPI 0.02

3.3VccDSW 0.003

1.8 0.19VccpNAND

3.3VccRTC 6 uA

3.3VccSus3_3

3.3 / 1.5VccSusHDA

0.119

0.01

VccVRM 1.8 / 1.5 0.16

1.05VccCLKDMI

0.02

VccSSC 1.05 0.095

VccDIFFCLKN 1.05 0.055

VccALVDS 3.3

0.001

1.8VccTX_LVDS 0.06

+3VALW

C432

1U_0402_6.3V6K~D

A A

C432

SUSP#9,25,43,48,49,50,51

SUSP#

U623

VIN

RT9013-15GB_SOT23-5

+1.5VS +VCCAFDI_VRM

RH211

+VCCAFDI_VRM

0_0603_5%~D

VOUT

GND

5 4

0_0603_5%~D

RH212

5/18 modified

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

2010/07/06 2011/07/06

Compal Secret Data

Deciphered Date

VCCVRM = 160mA detal waiting for newest spec

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PCH (6/8) PWR

LA-6961P

0.4

17 54Monday, January 24, 2011

+ 39 hidden pages