COMPAL LA-4892P Schematics

A

1 1

B

C

D

E

Compal Confidential

Schematics Document

2 2

AUBURNDALE with Intel
IBEX PEAK-M core logic

Dior UMA

3 3

2009-05-16

REV:0.3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

Title

Size Doc umen t Nu mber R ev

Cu sto m

D

Dat e: Shee t o f

Compal Electronics, Inc.

Cover Sheet

LA -4 8 92 P

E

1 45Fri day, May 15, 2 009

0.3

A

Compal Confidential

File Name : Dior UMA

Fan Control

Page 4

1 1

2 2

Ex press Card 54

Sub-board

Page 29

10 /100/1000 LAN

Marvell

88 E 8059/ 8 8E807 2

RJ45 CONN

3 3

RTC CKT.

Page 28

Page 22

Page 24

LED

Page 28

LCD co nn

C R T

CRT to Docking

DP con n

DP to Do cking

WWAN Card

WLAN Card

Page 24

Page 21

Page 20

Page 28

Page 19

Page 28

Page 24

PCI-E BUS

1394/Card Reader

Sub-board

13 94 port

B

SD/MM C /
MS/ XD Slo t

C

Dior UMA

Mobile

CPU Dual Core

Socket-rPGA989

37.5mm *37.5mm

FD I DM I X4

Intel Ibex Peak M

10 7 1p ins

25mm*27mm

Page 1 3,14,1 5,16,17,18

Page 29

Br a id woo d

NA ND card

LP C BUS

Page 4 ,5,6,7,8

ONFI I nterface

Page 19

USB2.0

Azalia

SATA0

SATA1

Dual Channel

D

XDP Conn.

Page 4

DDR3-SO-DIMM X 2DD R 3 10 66/ 133 3MH z 1 .5V

BAN K 0, 1, 2, 3

USB x2(Docking)

USB x 2(Sub/B)

Page 9 ,10,11

Page 28

Page 26

FingerPrinter VFM451
US B x 1

Page 27

USB conn x 2(For I/O)
BT Conn USB x 1

USB x 1(Camara)

MD C V1.5

Audio CKT

Sub-board

SATA ODD Connector

Page 29

Page 21

Page 25

92HD75

Page 29

Page 19

2. 5" SATA HDD Connector

Page 19

E

Acc elerometer

LI S 302DLT R

Page 26

CK5 05

Clock Generator
xS L G8SP58 5

Page 12

daughter board

RJ 1 1

Page 25

TPA6047A

AMP & Audio Jack

Page. 28

(2) PS/2 Interfaces
(2) USB 2.channels
(2) SATA Channels
(2) Display Port Channels
(1) Serial Port
(1) Parallel Port

Docking CONN.

Page 29

(1 ) Line In

Power OK CKT.

Page 31

4 4

Po wer On/Off CKT.

Page 24

DC/DC Interface CKT.

Page 32

A

TPM1.2

SLB9635TT

Page 27 page 30

Touch Pad CONN.

TrackPoint CONN.

SP I ROM
4M B

B

SMSC KBC
1098

Page 29

Page 25

Page 27

Int.KBD

Page 25

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Super I/O
LPC47N217

C O M 1 L P T
( Docking ) ( Docking )

Page 28 Page 28

2008/10/31 2009/11/06

Page 31

Compal Secret Data

Deciphered Date

D

Title

Size Doc umen t Nu mber R ev

Cu sto m

Dat e: Shee t o f

(1 ) Line Out
(1) RJ45 (10/100/1000)
( 1) VGA
(1) 2 LAN indicator LED's
(1) Power Button
(1) I2C interface

Compal Electronics, Inc.

Block Diagram

LA -4 892 P

E

2 45Fri day, May 15, 2 009

0.3

A

Voltage Rails

power
plane

State

( O ME ANS ON X M EANS O FF )

+RTCVCC

+B

+3VL +0.75V

+5VALW

+3VALW

+1.5V

+5VS

+3VS

+1.5VS

+VCCP

+CPU_C ORE

+1.05 VS

+1.8VS

Symbol Note :

: means Digital Ground

: means Analog Ground

Install below 43 level BOM structure for ver. 0.2

S0

S1

S3

S5 S4/ AC

S5 S4/ Batte ry only

S5 S4/ AC & B attery
don't exist

1 1

O

O

O

O

O

O

O

O

O

O

O

X

O

O

O

O

X

O

X X

X

X X X

OO

OO

X

X

8072@ : Install for 8072 NIC controller

Install below 45 level BOM structure for ver. 0.2

45@ : means just put it in the BOM of 45 level.

Reserve below BOM structure for ver. 0.2

@ : means just reserve , no build

CONN@ : means ME part.

8059@ : Install for 8059 NIC controller

SMBUS Contro l Table

SOURCE

SMB_EC _CK1
SMB_EC _DA1

SMBCLK
SMBDATA

SML0CLK
SML0DA TA

SML1CLK
SML1DA TA

SMSC10 98

Calpel la

Calpel la

Calpel la

BATT

V

X
X
X

THERMAL

SODIMM CLK CH IP

XDP G-SENS OR

X

X X

V V

X

X

X X

MINI C ARD

X

V V V

X

X

X X

DOCK

X

V

X
X

SENSOR

NIC

X X

X
X
X

X

V

X

V

X
X

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/10/31 2009/11/06

A

Compal Secret Data

Deciphered Date

Title

Size Do cumen t Nu mber R ev

Cu sto m

Dat e: Shee t o f

Compal Electronics, Inc.

Notes List

LA -4 892 P

3 45Fri day, May 15, 2009

0.3

H_CPUR ST#

1 2

1.5K_0402_1%

09/01/22 HP

5

T1PAD

R14

1 2

0_0402_5%

R15

1 2

0_0402_5%

R19

1 2

0_0402_5%

1 2

R20

1 2

R21

0_0402_5%

R23

1 2

0_0402_5%

R25

1 2

0_0402_5%

R29

1 2

0_0402_5%

R30

1 2

R220_0402_1%

1 2

R920_0402_1%

1 2

R349.9_0402_1%

1 2

R549.9_0402_1%

1 2

TP_SKTOCC#

H_CAT ERR#

H_PE CI_ISO

H_PROCHO T#_D

H_THERMT RIP#_R

R18

0_0402_5%

H_PM_ SYNC_R

0_0402_5%

VCCPWR GOOD_1

VCCPWR GOOD_0

VDDPW RGOOD_R

H_PWR GD_XDP_RH_PWR GD_XDP

PLT_RST#_R

12

R32
750_0402_1%

COMP3

COMP2

COMP1

COMP0

H_CPUR ST#_R

JCPU 1B

AT23

COMP3

AT24

COMP2

G16

COMP1

AT26

COMP0

AH24

SKTOCC#

AK14

CATERR#

AT15

PECI

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_ 1

AN27

VCCPWRGOOD_ 0

AK13

SM_DRAMPWR OK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

IC,A UB_CFD_rP GA,R1P0

MISC THERMAL

PWR MANAGEMENT

Layo ut rule：10mil w idth tra ce
leng th < 0. 5", s pacing 2 0mil

D D

H_PE CI16

H_PROCHO T#42

H_THERMT RIP#16

H_PM_ SYNC15

H_C PUPWRGD

H_CPU PWRGD16

C C

PM_DRAM_PW RGD15

VTTPWRGOOD32

BUF_PLT_RST#16

4

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSC LK

DPLL_REF_SSC LK#

CLOCKS

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

PM_EXT_TS#[0]
PM_EXT_TS#[1]

DDR3

MISC

JTAG & BPM

BCLK

BCLK#

PRDY#

PREQ#

TRST#

TDI_M

TDO_M

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

3

PM_EXTTS#0

A16
B16

CLK_CPU_XD P

AR30

CLK_CPU_XD P#

AT30

E16
D16

A18
A17

F6

SM_RCOMP0

AL1

SM_RCOMP1

AM1

SM_RCOMP2

AN1

PM_EXTTS#0

AN15

PM_EXTTS#1

AP15

XDP_ PRDY#

AT28

XDP_PREQ#

AP27

XDP_TCK

AN28

TCK

XDP_TMS

AP28

TMS

XDP_TRST#

AT27

XDP_TDI

AT29

TDI

XDP_TDO

AR27

TDO

XDP_TDI_M

AR29

XDP_TDO_M

AP29

XDP_DBRESET#

AN25

XDP_BPM#0

AJ22

XDP_BPM#1

AK22

XDP_BPM#2

AK24

XDP_BPM#3

AJ24

XDP_BPM#4

AJ25

XDP_BPM#5

AH22

XDP_BPM#6

AK23

XDP_BPM#7

AH23

CLK_CPU _BCLK 16
CLK_CPU _BCLK# 16

CLK_EXP 14
CLK_EXP# 14

T91 P AD

1 2

R17 0_0402_5%

12/03 HP

0.1U_0402 _10V6K

11/10 HP

DRAMRST# 9,10

PM_EXTTS#1_R 9,10

XDP_BPM#0

CFG125

XDP_BPM#1

CFG135

XDP_BPM#2

CFG145

XDP_BPM#3

CFG155

11/14 HP

+VCCP

1

C1

2

@

PM_PWRBT N#_R15

PM_EXTTS#1

VDDPW RGOOD_R

09/04/07 Intel

from DDR

R870 0_0402_5%

1 2

R871 0_0402_5%@

1 2

R872 0_0402_5%

1 2

R873 0_0402_5%@

1 2

R874 0_0402_5%

1 2

R875 0_0402_5%@

1 2

R876 0_0402_5%

1 2

R877 0_0402_5%@

1 2

H_C PUPWRGD

H_PWR GD_XDP

R26 0_0402_5%

12/05 HP

R1 10K_0402_5%

R7 10K_0402_5%

R12 1.1K_0402_1%

R13 3K_0402_1%

XDP_PREQ#
XDP_ PRDY#

CFG175
CFG165

XDP_BPM#4
XDP_BPM#5

XDP_BPM#6
XDP_BPM#7

R24
1K_0402_5%

H_CP UPWRGD _R

1 2

PM_PWRBT N#_R

1 2

T127PAD
T128PAD

XDP_TCK

1 2

1 2

1 2

1 2

XDP_BPM#0_R
XDP_BPM#1_R

XDP_BPM#2_R
XDP_BPM#3_R

2

+VCCP

XDP_TDO

+1.5V

This s hall place near XDP

XDP Connector

JP1

1

GND0

3

OBSFN_A0

5

OBSFN_A1

7

GND2

9

OBSDATA_A0

11

OBSDATA_A1

13

GND4

15

OBSDATA_A2

17

OBSDATA_A3

19

GND6

21

OBSFN_B0

23

OBSFN_B1

25

GND8

27

OBSDATA_B0

29

OBSDATA_B1

31

GND10

33

OBSDATA_B2

35

OBSDATA_B3

37

GND12

39

PWRGOOD/HOOK0

41

HOOK1

43

VCC_OBS_AB

45

HOOK2

47

HOOK3

49

GND14

51

SDA

53

SCL

55

TCK1

57

TCK0

59

GND16

SAMTE_BSH- 030-01-L-D-A CONN @

OBSDATA_C0
OBSDATA_C1

OBSDATA_C2
OBSDATA_C3

OBSDATA_D0
OBSDATA_D1

OBSDATA_D2
OBSDATA_D3

ITPCLK/HOOK4

ITPCLK#/HOOK5

VCC_OBS_CD

RESET#/HOOK6

DBR#/HOOK7

1 2

R6 51_0402_5%

2

GND1

4

OBSFN_C0

6

OBSFN_C1

8

GND3

10
12
14

GND5

16
18
20

GND7

22

OBSFN_D0

24

OBSFN_D1

26

GND9

28
30
32

GND11

34
36
38

GND13

40
42
44
46
48
50

GND15

52

TD0

54

TRST#

56

TDI

58

TMS

60

GND17

+VCCP

2009/0 3/31 HP

CLK_CPU_XD P
CLK_CPU_XD P#

XDP_RST#_R
XDP_DBRESET#

XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS

XDP_RST#_R

12/05 HP

CFG8 5
CFG9 5

CFG0 5
CFG1 5

CFG2 5
CFG3 5

CFG10 5
CFG11 5

CFG4 5
CFG5 5

CFG6 5
CFG7 5

+VCCP

1 2

R27 1K_0402_5%

PLT_RST#

@

1 2

R31 0_0402_5%

H_CPUR ST#

1

+3VS

R22
1K_0402_5%

1 2

PLT_RST# 13,16,22,24, 27,29

XDP_DBRESET# 13,15

09/05/14 HP

SCLK

SDATA

ALERT#

FAN_PW M30

8

7

6

5

B B

H_PROCHO T#

09/05/14 HP

A A

+3VS

THERMAL_D+

THERMAL_D-

+VCCP

B

2

E

3 1

Q98
MMBT3904W_SOT323-3

+3VS

2

C945

0.1U_0402 _10V6K

R917 2.2K_0402_5%

THERM_INT

12

1

+3VS

R965 10K_0402_5%

C

U48

1

VDD

2

D+

3

D-

THERM#4GND

ADM1032ARMZ R EEL_MSOP8

1 2

PWM Fan Control circuit

U47

1
2

74AHC1G00GW _SOT353-5

SMB_CLK_S3 9,10,12,1 4,26

SMB_DATA_S3 9,10,12,14, 26

THERM_SCI# 16

B
A
GND3Y

5

Vcc

R42 22_0402_5%

4

2200P_0402_50V7K

THERMAL_D+

C946

THERMAL_D-

12

2

1

+5VS+5VS

1

C2

0.1U_0402 _10V6K

@

2

C

Q86

2

B

MMBT3904W_SOT323-3

E

3 1

Layo ut No te:

Plac e n ear t he hotte st
spot area

conn@

JP2

1

1

2

2

3

3

ACES_85204- 03001

G1
G2

Put the sensor colse to CPU

5

4

11/12

09/02/05 HP

4
5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/11/06

Proces sor Pullups JTAG MAPPING

H_CAT ERR#

H_PROCHO T#_D

H_CPUR ST#_R

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

1 2

R34 49.9_0402_1%

1 2

R36 68_0402_5%

1 2

R37 68_0402_5%@

DDR3 C ompen sation Signals

1 2

R44 100_0402_1%

1 2

R45 24.9_0402_1%

1 2

R46 130_0402_1%

Layout Note :Please these
resist ors n ear Processor

Compal Secret Data

Deciphered Date

2

+VCCP

Close to XDP

XDP_TRST#

1 2

R47 51_0402_5%

Title

Auburndale(1/5)-Thermal/XDP

Size Document Num ber R ev

Cust om

LA -4 892 P

Date: Sheet

11/12 remov e the maping option

Compal Electronics, Inc.

1

4 45Satu rday, May 16, 2009

0.3

of

5

JCPU 1A

DMI_CRX_PTX_N015
DMI_CRX_PTX_N115
DMI_CRX_PTX_N215
DMI_CRX_PTX_N315

DMI_CRX_PTX_P015
DMI_CRX_PTX_P115

D D

DMI_CRX_PTX_P215
DMI_CRX_PTX_P315

DMI_CTX_PRX_N015
DMI_CTX_PRX_N115
DMI_CTX_PRX_N215
DMI_CTX_PRX_N315

DMI_CTX_PRX_P015
DMI_CTX_PRX_P115
DMI_CTX_PRX_P215
DMI_CTX_PRX_P315

FDI_CTX_ PRX_N015
FDI_CTX_ PRX_N115
FDI_CTX_ PRX_N215
FDI_CTX_ PRX_N315
FDI_CTX_ PRX_N415
FDI_CTX_ PRX_N515
FDI_CTX_ PRX_N615
FDI_CTX_ PRX_N715

FDI_CTX_PRX_P015
FDI_CTX_PRX_P115
FDI_CTX_PRX_P215
FDI_CTX_PRX_P315
FDI_CTX_PRX_P415
FDI_CTX_PRX_P515

C C

FDI_CTX_PRX_P615
FDI_CTX_PRX_P715

FDI_ FSYNC 015
FDI_ FSYNC 115

FDI_IN T15

FDI_ LSYNC015
FDI_ LSYNC115

FDI_CTX_ PRX_N0
FDI_CTX_ PRX_N1
FDI_CTX_ PRX_N2
FDI_CTX_ PRX_N3
FDI_CTX_ PRX_N4
FDI_CTX_ PRX_N5
FDI_CTX_ PRX_N6
FDI_CTX_ PRX_N7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FD I_FSY NC0
FD I_FSY NC1

FDI_ INT

FDI_ LSYNC 0
FDI_ LSYNC 1

A24
C23
B22
A21

B24
D23
B23
A22

D24
G24
F23
H23

D25
F24
E23
G23

E22
D21
D19
D18
G21
E19
F21
G18

D22
C21
D20
C18
G22
E20
F20
G19

F17
E17

C17

F18
D17

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]

FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]

FDI_FSYNC[0]
FDI_FSYNC[1]

FDI_INT

FDI_LSYNC[0]
FDI_LSYNC[1]

PEG_RCOMPO

DMI Intel(R) FDI

PCI EXPRESS -- GRAPHICS

B B

IC,A UB_CFD_rP GA,R1P0

PEG_ICOMPI

PEG_ICOMPO

PEG_RBIAS

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

B26
A26
B27
A25

K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31

J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30

L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26

L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25

EXP_ICOMPI

EXP_RBIAS

4

R49 49.9_0402_1%

1 2

R50 750_0402_1%

1 2

Layo ut rule tra ce
leng th < 0.5"

11/06 HP

3

2

1

：

CFG04
CFG14
CFG24
CFG34
CFG44
CFG54
CFG64
CFG74
CFG84
CFG94
CFG104
CFG114
CFG124
CFG134
CFG144
CFG154
CFG164
CFG174

T20 P AD

R58

0_0402_5%@

1 2
1 2

0_0402_5%@

R59

CFG 0
CFG 1
CFG 2
CFG 3
CFG 4
CFG 5
CFG 6
CFG 7
CFG 8
CFG 9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18

AP25

AL25
AL24
AL22
AJ33

AM30
AM28
AP31

AL32

AL30
AM31
AN29
AM32
AK32
AK31
AK28

AJ28
AN30
AN32

AJ32

AJ29

AJ30
AK30

AG9
M27
L28

J17
H17
G25
G17
E31
E30

H16

B19
A19

A20
B20

U9
T9

AC9
AB9

C1
A3

J29

J28

A34
A33

C35
B35

JCPU 1E

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
SA_DIMM_VREF
SB_DIMM_VREF
RSVD11
RSVD12
RSVD13
RSVD14

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86

RSVD15
RSVD16

RSVD17
RSVD18

RSVD19
RSVD20

RSVD21
RSVD22

RSVD_NCTF_2 3
RSVD_NCTF_2 4

RSVD26
RSVD27

RSVD_NCTF_2 8
RSVD_NCTF_2 9

RSVD_NCTF_3 0
RSVD_NCTF_3 1

RSVD_NCTF_3 7

RSVD_NCTF_4 0
RSVD_NCTF_4 1

RSVD_NCTF_4 2
RSVD_NCTF_4 3

RSVD_NCTF_5 4
RSVD_NCTF_5 5
RSVD_NCTF_5 6
RSVD_NCTF_5 7

RESERVED

RSVD32
RSVD33

RSVD34
RSVD35

RSVD36

RSVD38
RSVD39

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53

RSVD58

RSVD_TP_59
RSVD_TP_60

RSVD62
RSVD63
RSVD64
RSVD65

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

AJ13
AJ12

AH25
AK26

AL26
AR2

AJ26
AJ27

AP1
AT2

AT3
AR1

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

E15
F15
A2

KEY

D15
C15

R53 0_0402_5%@

AJ15

R54 0_0402_5%@

AH15

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

AP34

VSS

1 2
1 2

09/02/13 HP

Deciphered Date

2

IC,A UB_CFD_rP GA,R1P0

Compal Electronics, Inc.

Title

Auburndale(2/5)-DMI/PEG/FDI

Size Document Num ber R ev

Cust om

LA -4 892 P

Date: Sheet of

1

5 45Satu rday, May 16, 2009

0.3

CFG Straps for PROCESSOR

CFG 0

1 2

R60 3.01K_0402_1%@

PCI-Ex press Configuration Select

1: Sin gle PEG
0: Bif urcat ion enabled

CFG0

Not ap plica ble fo r Clarksfield Processor

CFG 3

1 2

R62 3.01K_0402_1%@

CFG3-P CI Ex press Static Lane Reversal

1: Nor mal Operation
0: Lan e Num bers Reversed

CFG3

15 -> 0, 14 ->1, .....

A A

CFG 4

5

R63

1 2

3.01K_0402_1%@

CFG4-D ispla y Port Presence

1: Dis abled ; No P hysical Display Port
attach ed to Embedded Display Port

CFG4

0: Ena bled; An ex ternal Display Port
device is c onnect ed to the Embedded
Displa y Port

4

CFG 7

1 2

R61 3.01K_0402_1%@

Only t empor ary fo r earl y CFD samples (rPGA/BGA)
No nee ded by MoW41.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/11/06

Compal Secret Data

5

4

3

2

1

AR10
AT10

JCPU 1D

W8

SB_CK[0]

W9

SB_CK#[0]

B5

SB_DQ[0]

A5

SB_DQ[1]

C3

SB_DQ[2]

B3

SB_DQ[3]

E4

SB_DQ[4]

A6

SB_DQ[5]

A4

SB_DQ[6]

C4

SB_DQ[7]

D1

SB_DQ[8]

D2

SB_DQ[9]

F2

SB_DQ[10]

F1

SB_DQ[11]

C2

SB_DQ[12]

F5

SB_DQ[13]

F3

SB_DQ[14]

G4

SB_DQ[15]

H6

SB_DQ[16]

G2

SB_DQ[17]

J6

SB_DQ[18]

J3

SB_DQ[19]

G1

SB_DQ[20]

G5

SB_DQ[21]

J2

SB_DQ[22]

J1

SB_DQ[23]

J5

SB_DQ[24]

K2

SB_DQ[25]

L3

SB_DQ[26]

M1

SB_DQ[27]

K5

SB_DQ[28]

K4

SB_DQ[29]

M4

SB_DQ[30]

N5

SB_DQ[31]

AF3

SB_DQ[32]

AG1

SB_DQ[33]

AJ3

SB_DQ[34]

AK1

SB_DQ[35]

AG4

SB_DQ[36]

AG3

SB_DQ[37]

AJ4

SB_DQ[38]

AH4

SB_DQ[39]

AK3

SB_DQ[40]

AK4

SB_DQ[41]

AM6

SB_DQ[42]

AN2

SB_DQ[43]

AK5

SB_DQ[44]

AK2

SB_DQ[45]

AM4

SB_DQ[46]

AM3

SB_DQ[47]

AP3

SB_DQ[48]

AN5

SB_DQ[49]

AT4

SB_DQ[50]

AN6

SB_DQ[51]

AN4

SB_DQ[52]

AN3

SB_DQ[53]

AT5

SB_DQ[54]

AT6

SB_DQ[55]

AN7

SB_DQ[56]

AP6

SB_DQ[57]

AP8

SB_DQ[58]

AT9

SB_DQ[59]

AT7

SB_DQ[60]

AP9

SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

AB1

SB_BS[0]

W5

SB_BS[1]

R7

SB_BS[2]

AC5

SB_CAS#

Y7

SB_RAS#

AC6

SB_WE#

DDR SYSTEM MEMORY - B

SB_CKE[0]

SB_CK[1]
SB_CK#[1]
SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

M3

V7
V6
M2

AB8
AD6

AC7
AD1

D4
E1
H3
K1
AH1
AL2
AR4
AT8

D5
F4
J4
L4
AH2
AL4
AR5
AR8

C5
E3
H4
M5
AG2
AL5
AP5
AR7

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

DDR _B_DM0
DDR _B_DM1
DDR _B_DM2
DDR _B_DM3
DDR _B_DM4
DDR _B_DM5
DDR _B_DM6
DDR _B_DM7

DDR_ B_DQS#0
DDR_ B_DQS#1
DDR_ B_DQS#2
DDR_ B_DQS#3
DDR_ B_DQS#4
DDR_ B_DQS#5
DDR_ B_DQS#6
DDR_ B_DQS#7

DDR _B_DQS0
DDR _B_DQS1
DDR _B_DQS2
DDR _B_DQS3
DDR _B_DQS4
DDR _B_DQS5
DDR _B_DQS6
DDR _B_DQS7

DDR_ B_MA0
DDR_ B_MA1
DDR_ B_MA2
DDR_ B_MA3
DDR_ B_MA4
DDR_ B_MA5
DDR_ B_MA6
DDR_ B_MA7
DDR_ B_MA8
DDR_ B_MA9
DDR_B_ MA10
DDR_B_ MA11
DDR_B_ MA12
DDR_B_ MA13
DDR_B_ MA14
DDR_B_ MA15

M_CLK_DD R2 10
M_CLK_DDR# 2 10
DDR_ CKE2_DIMMB 10

M_CLK_DD R3 10
M_CLK_DDR# 3 10
DDR_ CKE3_DIMMB 10

DDR_ CS2_DIMMB# 10
DDR_ CS3_DIMMB# 10

M_ODT2 10
M_ODT3 10

DDR_ B_DM[0..7] 10

DDR_ B_DQS#[0. .7] 10

DDR_ B_DQS[0.. 7] 10

DDR_ B_MA[0..15] 10

JCPU 1C

D D

DDR_ A_D[0..6 3]9

C C

B B

DDR_A_ BS09
DDR_A_ BS19
DDR_A_ BS29

DDR_ A_CAS#9
DDR_ A_RAS#9
DDR_A_W E#9

DDR_ A_D0
DDR_ A_D1
DDR_ A_D2
DDR_ A_D3
DDR_ A_D4
DDR_ A_D5
DDR_ A_D6
DDR_ A_D7
DDR_ A_D8
DDR_ A_D9
DDR _A_D10
DDR _A_D11
DDR _A_D12
DDR _A_D13
DDR _A_D14
DDR _A_D15
DDR _A_D16
DDR _A_D17
DDR _A_D18
DDR _A_D19
DDR _A_D20
DDR _A_D21
DDR _A_D22
DDR _A_D23
DDR _A_D24
DDR _A_D25
DDR _A_D26
DDR _A_D27
DDR _A_D28
DDR _A_D29
DDR _A_D30
DDR _A_D31
DDR _A_D32
DDR _A_D33
DDR _A_D34
DDR _A_D35
DDR _A_D36
DDR _A_D37
DDR _A_D38
DDR _A_D39
DDR _A_D40
DDR _A_D41
DDR _A_D42
DDR _A_D43
DDR _A_D44
DDR _A_D45
DDR _A_D46
DDR _A_D47
DDR _A_D48
DDR _A_D49
DDR _A_D50
DDR _A_D51
DDR _A_D52
DDR _A_D53
DDR _A_D54
DDR _A_D55
DDR _A_D56
DDR _A_D57
DDR _A_D58
DDR _A_D59
DDR _A_D60
DDR _A_D61
DDR _A_D62
DDR _A_D63

AJ10

AL10
AK12

AK11

AM10
AR11

AL11

AT11
AP12
AM12
AN12
AM13

AT14

AT12

AL13
AR14
AP14

A10

SA_DQ[0]

C10

SA_DQ[1]

C7

SA_DQ[2]

A7

SA_DQ[3]

B10

SA_DQ[4]

D10

SA_DQ[5]

E10

SA_DQ[6]

A8

SA_DQ[7]

D8

SA_DQ[8]

F10

SA_DQ[9]

E6

SA_DQ[10]

F7

SA_DQ[11]

E9

SA_DQ[12]

B7

SA_DQ[13]

E7

SA_DQ[14]

C6

SA_DQ[15]

H10

SA_DQ[16]

G8

SA_DQ[17]

K7

SA_DQ[18]

J8

SA_DQ[19]

G7

SA_DQ[20]

G10

SA_DQ[21]

J7

SA_DQ[22]

J10

SA_DQ[23]

L7

SA_DQ[24]

M6

SA_DQ[25]

M8

SA_DQ[26]

L9

SA_DQ[27]

L6

SA_DQ[28]

K8

SA_DQ[29]

N8

SA_DQ[30]

P9

SA_DQ[31]

AH5

SA_DQ[32]

AF5

SA_DQ[33]

AK6

SA_DQ[34]

AK7

SA_DQ[35]

AF6

SA_DQ[36]

AG5

SA_DQ[37]

AJ7

SA_DQ[38]

AJ6

SA_DQ[39]
SA_DQ[40]

AJ9

SA_DQ[41]
SA_DQ[42]
SA_DQ[43]

AK8

SA_DQ[44]

AL7

SA_DQ[45]
SA_DQ[46]

AL8

SA_DQ[47]

AN8

SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]

AM9

SA_DQ[52]

AN9

SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

AC3

SA_BS[0]

AB2

SA_BS[1]

U7

SA_BS[2]

AE1

SA_CAS#

AB3

SA_RAS#

AE9

SA_WE#

DDR SYSTEM MEMORY A

SA_CK[0]
SA_CK#[0]
SA_CKE[0]

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

SA_CS#[0]
SA_CS#[1]

SA_ODT[0]
SA_ODT[1]

SA_DM[0]

SA_DM[1]

SA_DM[2]

SA_DM[3]

SA_DM[4]

SA_DM[5]

SA_DM[6]

SA_DM[7]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]

SA_MA[1]

SA_MA[2]

SA_MA[3]

SA_MA[4]

SA_MA[5]

SA_MA[6]

SA_MA[7]

SA_MA[8]

SA_MA[9]

SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AA6
AA7
P7

Y6
Y5
P6

AE2
AE8

AD8
AF9

B9
D7
H7
M7
AG6
AM7
AN10
AN13

C9
F8
J9
N9
AH7
AK9
AP11
AT13

C8
F9
H9
M9
AH8
AK10
AN11
AR13

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

DDR _A_DM0
DDR _A_DM1
DDR _A_DM2
DDR _A_DM3
DDR _A_DM4
DDR _A_DM5
DDR _A_DM6
DDR _A_DM7

DDR_ A_DQS#0
DDR_ A_DQS#1
DDR_ A_DQS#2
DDR_ A_DQS#3
DDR_ A_DQS#4
DDR_ A_DQS#5
DDR_ A_DQS#6
DDR_ A_DQS#7

DDR _A_DQS0
DDR _A_DQS1
DDR _A_DQS2
DDR _A_DQS3
DDR _A_DQS4
DDR _A_DQS5
DDR _A_DQS6
DDR _A_DQS7

DDR_ A_MA0
DDR_ A_MA1
DDR_ A_MA2
DDR_ A_MA3
DDR_ A_MA4
DDR_ A_MA5
DDR_ A_MA6
DDR_ A_MA7
DDR_ A_MA8
DDR_ A_MA9
DDR_A_ MA10
DDR_A_ MA11
DDR_A_ MA12
DDR_A_ MA13
DDR_A_ MA14
DDR_A_ MA15

M_CLK_DD R0 9
M_CLK_DDR# 0 9
DDR_ CKE0_DIMMA 9

M_CLK_DD R1 9
M_CLK_DDR# 1 9
DDR_ CKE1_DIMMA 9

DDR_ CS0_DIMMA# 9
DDR_ CS1_DIMMA# 9

M_ODT0 9
M_ODT1 9

DDR_ A_DM[0..7] 9

DDR_ A_DQS#[0. .7] 9

DDR_ A_DQS[0.. 7] 9

DDR_ A_MA[0..15] 9

DDR_ B_D[0..6 3]10

DDR_B_ BS010
DDR_B_ BS110
DDR_B_ BS210

DDR_ B_CAS#10
DDR_ B_RAS#10
DDR_B_W E#10

DDR_ B_D0
DDR_ B_D1
DDR_ B_D2
DDR_ B_D3
DDR_ B_D4
DDR_ B_D5
DDR_ B_D6
DDR_ B_D7
DDR_ B_D8
DDR_ B_D9
DDR _B_D10
DDR _B_D11
DDR _B_D12
DDR _B_D13
DDR _B_D14
DDR _B_D15
DDR _B_D16
DDR _B_D17
DDR _B_D18
DDR _B_D19
DDR _B_D20
DDR _B_D21
DDR _B_D22
DDR _B_D23
DDR _B_D24
DDR _B_D25
DDR _B_D26
DDR _B_D27
DDR _B_D28
DDR _B_D29
DDR _B_D30
DDR _B_D31
DDR _B_D32
DDR _B_D33
DDR _B_D34
DDR _B_D35
DDR _B_D36
DDR _B_D37
DDR _B_D38
DDR _B_D39
DDR _B_D40
DDR _B_D41
DDR _B_D42
DDR _B_D43
DDR _B_D44
DDR _B_D45
DDR _B_D46
DDR _B_D47
DDR _B_D48
DDR _B_D49
DDR _B_D50
DDR _B_D51
DDR _B_D52
DDR _B_D53
DDR _B_D54
DDR _B_D55
DDR _B_D56
DDR _B_D57
DDR _B_D58
DDR _B_D59
DDR _B_D60
DDR _B_D61
DDR _B_D62
DDR _B_D63

IC,A UB_CFD_rP GA,R1P0

IC,A UB_CFD_rP GA,R1P0

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

2

Title

Size Document Num ber R ev

Cust om

Date: Sheet o f

Compal Electronics, Inc.

Auburndale(3/5)-DDR3

LA -4 892 P

1

6 45Satu rday, May 16, 2009

0.3

5

+CPU_C ORE

JCPU 1F

D D

C C

B B

A A

48A 1

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

IC,A UB_CFD_rP GA,R1P0

CPU CO RE SUPPLY

POWER

CPU VIDS

SENSE LINES

5

1.1V R AIL POWER

PROC_DPRSLP VR

VTT_SELECT

VCC_SENSE
VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8

VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

ISENSE

+VCCP

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

+VCCP

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

AN33

PSI#

H_VI D0

AK35

H_VI D1

AK33

H_VI D2

AK34

H_VI D3

AL35

H_VI D4

AL33

H_VI D5

AM33

H_VI D6

AM35

PM_DPRSL PVR_R

AM34

G15

AN35

VCC _SENSE

AJ34

VSS_SENSE

AJ35

B15
A15

VCC SENSE

VSSSENSE

PSI# 42

H_VID [0..6] 42

1 2

R67 0_0402_5%

H_VTTVID1 38

H_VTTVID1 = Low, 1.1V

H_VTTVID1 = High, 1.05V

IMVP_IMON 42

0_0402_5%

R68

1 2
1 2

R69 0_0402_5%

VTT_SENSE 38
VSS_SENSE_VTT 38

Clo se to CPU

1 2

R70 100_0402_1%

1 2

R71 100_0402_1%

+VCCP

+VCCP

22U_0805_6.3V6M

C958

1

2

10U_0805_10V4K

C65

1

2

VCC SENSE
VSSSENSE

4

+VCCP

09/05/11 HP

22U_0805_6.3V6M

C957

1

1

2

2

10U_0805_10V4K

C66

1

1

2

2

PROC _DPRSLPVR 42

+CPU_C ORE

4

22U_0805_6.3V6M

22U_0805_6.3V6M

C42

1

2

10U_0805_10V4K

10U_0805_10V4K

C45

1

2

VCCSEN SE 42
VSSSENSE 42

3

330U 2V M X LESR6M SX H1.9

330U 2V M X LESR6M SX H1.9

1

C968

+

2

09/04/16 Compal

22U_0805_6.3V6M

22U_0805_6.3V6M

C40

1

2

10U_0805_10V4K

C46

1

2

22U_0805_6.3V6M

C39

C68

C959

1

1

10U_0805_10V4K

C38

2

10U_0805_10V4K

C67

1

1

2

2

Inside cavity

10U_0805_10V4K

C60

Under cavity

2

C41

1

2

CPU

47P_0402_50V8J@

+GFX_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C969

1

+

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C925

C924

C880

1

1

1

2

2

2

09/03/31 HP

47P_0402_50V8J@

12

C935

47P_0402_50V8J@

C936

12

12

C938

C937

12

47P_0402_50V8J@

C881

JCPU1 G

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

+VCCP

+VCCP

AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16

AL21
AL19
AL18

AL16
AK21
AK19
AK18
AK16

AJ21

AJ19

AJ18

AJ16
AH21
AH19
AH18
AH16

47P_0402_50V8J@

J24
J23

H25

K26

J27
J26

J25
H27
G28
G27
G26
F26
E26
E25

IC,A UB_CFD_rP GA,R1P0

5A18A

VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36

VTT1_45
VTT1_46
VTT1_47

VTT1_48
VTT1_49
VTT1_50
VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58

+VCCP +CPU_C ORE+GFX_CORE +1.5V

FDI PEG & DMI

47P_0402_50V8J@

12

12

C743

C744

47P_0402_50V8J@

2

AR22

VAXG_SENSE

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

GFX_VR_EN

GFX_IMON

AT22

AM22
AP22
AN22
AP23
AM23
AP24
AN24

AR25
AT25
AM24

VSSAXG_SENSE

SENSE

LINES

GRAPH ICS

GFX_DPRSLPVR

GR APH ICS VID s

AJ1

VDDQ1

AF1

VDDQ2

AE7

VDDQ3

AE4

VDDQ4

AC1

VDDQ5

AB7

VDDQ6

AB4

VDDQ7

Y1

VDDQ8

W7

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

VTT0_59
VTT0_60
VTT0_61
VTT0_62

VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68

VCCPLL1
VCCPLL2
VCCPLL3

47P_0402_50V8J@

W4
U1
T7
T4
P1
N7
N4
L1
H1

P10
N10
L10
K10

J22
J20
J18
H21
H20
H19

L26
L27
M26

3A

POWER

DDR3 - 1.5V RAILS

1.1V1.8V

0.6A

47P_0402_50V8J@

12

12

C742

C741

+VCCP

+VCCP

12

47P_0402_50V8J@

C745

1

2

VCC_AXG_SENSE 44
VSS_AXG_SENSE 44

GFXVR_VID_0 44
GFXVR_VID_1 44
GFXVR_VID_2 44
GFXVR_VID_3 44
GFXVR_VID_4 44
GFXVR_VID_5 44
GFXVR_VID_6 44

GFXVR_EN 44
GFXVR_DPR SLPVR 44
GFXVR_IMON 44

1U_0603_1 0V4Z

C47

1

2

1U_0603_1 0V4Z

1U_0603_1 0V4Z

C71

1

2

12

C746

47P_0402_50V8J@

1U_0603_1 0V4Z

C48

1

2

C72

1

2

47P_0402_50V8J@

12

C747

C50

C49

1

1

2

2

+1.8VS

22U_0805_6.3V6M

2.2U_0603 _6.3V4Z

4.7U_0603 _6.3V6K

C74

C73

1

1

2

2

12

C748

+1.5V

1U_0603_1 0V4Z

1U_0603_1 0V4Z

GFXVR_EN

1U_0603_1 0V4Z

1

2

C75

47P_0402_50V8J@

C51

1

1 2

R844 4.7K_0402_5%

09/04/13 Intel

22U_0805_6.3V6M

22U_0805_6.3V6M

C955

C956

1

1

2

2

09/03/31 HP

47P_0402_50V8J@

12

12

C931

47P_0402_50V8J@

C932

47P_0402_50V8J@

12

12

C933

C934

11/25 HP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Num ber R ev

Cust om

Date: Sheet of

Auburndale(4/5)-PWR

LA -4 892 P

1

7 45Satu rday, May 16, 2009

0.3

5

JCPU 1H

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

D D

C C

B B

AR17
AR15
AR12

AP20
AP17
AP13
AP10

AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11

AL34
AL31
AL23
AL20
AL17
AL12

AK29
AK27
AK25
AK20
AK17

AJ31
AJ23
AJ20
AJ17
AJ14
AJ11

AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13

AG10

AE35

VSS8
VSS9
VSS10
VSS11

AR9

VSS12

AR6

VSS13

AR3

VSS14
VSS15
VSS16
VSS17
VSS18

AP7

VSS19

AP4

VSS20

AP2

VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33

AM8

VSS34

AM5

VSS35

AM2

VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72

AH9

VSS73

AH6

VSS74

AH3

VSS75
VSS76

AF8

VSS77

AF4

VSS78

AF2

VSS79
VSS80

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

4

JCPU 1I

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

VSS

NCTF

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

AT35
AT1
AR34
B34
B2
B1
A35

VSS_NCTF 1_R
VSS_NCTF 2_R
VSS_NCTF 3_R
VSS_NCTF 4_R
VSS_NCTF 5_R
VSS_NCTF 6_R
VSS_NCTF 7_R

3

+CPU_C ORE

1

2

1

2

1

2

1

2

T54
T55
T78
T79
T80
T56
T57

09/01/15 HP

2

CPU CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

C76

22U_0805_6.3V6M

C90

22U_0805_6.3V6M

C98

22U_0805_6.3V6M

C975

22U_0805_6.3V6M

C77

C78

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C92

C91

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C99

C100

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C976

C977

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C80

C79

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C93

C94

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C983

C101

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C978

C979

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C81

1

2

22U_0805_6.3V6M

C95

1

2

22U_0805_6.3V6M

C103

1

2

22U_0805_6.3V6M

C980

1

2

C82

1

2

22U_0805_6.3V6M

C96

1

2

22U_0805_6.3V6M

C110

1

2

22U_0805_6.3V6M

C981

1

2

22U_0805_6.3V6M

C83

1

2

Under cavity

22U_0805_6.3V6M

C111

1

2

22U_0805_6.3V6M

C982

1

2

09/05/14 HP

22U_0805_6.3V6M

C84

1

between Inductor and socket

2

22U_0805_6.3V6M

C112

1

2

22U_0805_6.3V6M

C88

1

2

+CPU_C ORE

330U 2V M X LESR6M SX H1.9

C108

1

+

@

2

22U_0805_6.3V6M

C984

1

2

22U_0805_6.3V6M

C102

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C89

C985

1

1

2

2

10U_0805_10V4K

22U_0805_6.3V6M

C988

C113

1

1

2

2

330U 2V M X LESR6M SX H1.9

330U 2V M X LESR6M SX H1.9

C109

C107

1

1

+

+

@

2

2

Inside cavity

1

330U 2V M X LESR6M SX H1.9

C105

1

+

2

330U 2V M X LESR6M SX H1.9

330U 2V M X LESR6M SX H1.9

C106

C104

1

1

+

+

2

2

Bulk caps

09/01/15 HP

IC,A UB_CFD_rP GA,R1P0

A A

5

IC,A UB_CFD_rP GA,R1P0

4

BGA Ball Cracking Prevention and Detection

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Auburndale(5/5)-GND/Bypass

Size Document Num ber R ev

Cust om

LA -4 892 P

Date: Sheet of

1

8 45Fri day, M ay 15, 2009

0.3

5

09/04/23 HP

+V_D DR_REF_DIMMA_DQ

2.2U_0603 _6.3V4Z

0.1U_0402 _10V6K
C115

C114

1

1

2

D D

C C

B B

A A

2

DDR_ CKE0_DIMMA6

DDR_A_ BS26

M_CLK_DD R06
M_CLK_DDR# 06

DDR_A_ BS06

DDR_A_W E#6
DDR_ A_CAS#6

DDR_ CS1_DIMMA#6

1 2

10K_0402_5%

0.1U_0402 _10V6K

+3VS

2.2U_0603 _6.3V4Z
C136

C135

1

1

2

2

+1.5V +1.5V

3 A

3 A @1 . 5 V

@ 1. 5V

3 A3 A

@ 1. 5V@ 1. 5V

DDR3 SO-DIMM A

JDIMA1 CONN @

VREF_DQ1VSS1

3

R80

VSS2

5

DQ0

7

DQ1
VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9
VSS925VSS10
DQS#127DM1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16
DQS#245DM2
DQS247VSS17
VSS1849DQ22

51

DQ18
DQ1953VSS19
VSS2055DQ28

57

DQ24
DQ2559VSS21
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3
A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1
VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

DDR_ A_D0
DDR_ A_D1

DDR _A_DM0

DDR_ A_D2
DDR_ A_D3

DDR_ A_D8
DDR_ A_D9

DDR_ A_DQS#1
DDR _A_DQS1

DDR _A_D10
DDR _A_D11

DDR _A_D16
DDR _A_D17

DDR_ A_DQS#2
DDR _A_DQS2

DDR _A_D18
DDR _A_D19

DDR _A_D24
DDR _A_D25

DDR _A_DM3

DDR _A_D26
DDR _A_D27

DDR_ CKE0_DIMMA

DDR_ A_BS2

DDR_A_ MA12
DDR_ A_MA9

DDR _A_MA8
DDR_ A_MA5

DDR_ A_MA3
DDR_ A_MA1

M_CLK_D DR0
M_CLK_D DR#0

DDR_A_ MA10
DDR_ A_BS0

DDR_A_ WE#
DDR _A_CAS# M_ODT0

DDR_A_ MA13
DDR_ CS1_DIMMA#

DDR _A_D32
DDR _A_D33

DDR_ A_DQS#4
DDR _A_DQS4

DDR _A_D34
DDR _A_D35

DDR _A_D40
DDR _A_D41

DDR _A_DM5

DDR _A_D42
DDR _A_D43

DDR _A_D48
DDR _A_D49

DDR_ A_DQS#6
DDR _A_DQS6

DDR _A_D50
DDR _A_D51

DDR _A_D56
DDR _A_D57

DDR _A_DM7

DDR _A_D58
DDR _A_D59

R79

10K_0402_5%

12

VSS3

DQS0

VSS6

VSS8
DQ12
DQ13

DQ14
DQ15

DQ20
DQ21

DQ23

DQ29

DQS3

DQ30
DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

VSS31

DQ38
DQ39

VSS33

DQ44

DQ45
VSS35
DQS#5

DQS5

VSS38

DQ46

DQ47
VSS40

DQ52

DQ53
VSS42

VSS43

DQ54

DQ55
VSS45

DQ60

DQ61
VSS47
DQS#7

DQS7

VSS50

DQ62

DQ63
VSS52

EVENT#

VTT2

DQ4
DQ5

DQ6
DQ7

A15
A14

A7

A6
A4

A2
A0

CK1

BA1

S0#

NC2

DM4

DM6

SDA

SCL

G2

TOP SLOT

5

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

4

DDR_ A_D4
DDR_ A_D5

DDR_ A_DQS#0
DDR _A_DQS0

DDR_ A_D6
DDR_ A_D7

DDR _A_D12
DDR _A_D13

DDR _A_DM1
DRAMRST#

DDR _A_D14
DDR _A_D15

DDR _A_D20
DDR _A_D21

DDR _A_DM2

DDR _A_D22
DDR _A_D23

DDR _A_D28
DDR _A_D29

DDR_ A_DQS#3
DDR _A_DQS3

DDR _A_D30
DDR _A_D31

DDR_ CKE1_DIMMA

DDR_A_ MA15
DDR_A_ MA14

DDR_ A_MA11
DDR_ A_MA7

DDR _A_MA6
DDR_ A_MA4

DDR_ A_MA2
DDR_ A_MA0

M_CLK_D DR1
M_CLK_D DR#1

DDR_ A_BS1
DDR _A_RAS#

DDR_ CS0_DIMMA#

M_ODT1

DDR _A_D36
DDR _A_D37

DDR _A_DM4

DDR _A_D38
DDR _A_D39

DDR _A_D44
DDR _A_D45

DDR_ A_DQS#5
DDR _A_DQS5

DDR _A_D46
DDR _A_D47

DDR _A_D52
DDR _A_D53

DDR _A_DM6

DDR _A_D54
DDR _A_D55

DDR _A_D60
DDR _A_D61

DDR_ A_DQS#7
DDR _A_DQS7

DDR _A_D62
DDR _A_D63

PM_EXTTS#1_R
SMB_DATA_S3
SMB_CLK_S3

+0.75VS

0000 .6 5 A @ 0. 75 V

. 65 A@ 0 . 7 5V

. 65 A@ 0 . 7 5V. 65 A@ 0 . 7 5V

4

DRAMRST# 4,10

DDR_ CKE1_DIMMA 6

M_CLK_DD R1 6
M_CLK_DDR# 1 6

DDR_A_ BS1 6
DDR_ A_RAS# 6

DDR_ CS0_DIMMA# 6
M_ODT0 6

M_ODT1 6

0.1U_0402 _10V6K
C129

1

2

PM_EXTTS#1_R 4,10

SMB_DATA_S3 4,10,12,14, 26
SMB_CLK_S3 4,10,12,1 4,26

DDR_ A_D[0..6 3]6

DDR_ A_DM[0..7]6

DDR_ A_DQS[0.. 7]6

DDR_ A_DQS#[0. .7]6

DDR_ A_MA[0..15]6

09/04/23 HP

+V_D DR_REF_DIMMA_CA

2.2U_0603 _6.3V4Z
C130

1

2

3

La yout Note :
Pl ac e n ear D IM M

+1.5V

10U_0603_6.3V6M

C118

C119

1

1

2

2

La yout Note :
Pl ac e n ear D IM M

+0.75VS

C131

1U_0603_1 0V4Z

C132

1U_0603_1 0V4Z

1

1

2

2

+0.75VS

C159

10U_0603_6.3V6M

C962

10U_0603_6.3V6M

1

1

2

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/11/06

Compal Secret Data

10U_0603_6.3V6M

C120

1

2

C133

1U_0603_1 0V4Z

1

2

C963

10U_0603_6.3V6M

1

2

Deciphered Date

2

10U_0603_6.3V6M

C121

1

2

09/03/31 HP

C134

1U_0603_1 0V4Z

1

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

C122

1

2

330U 2V M X LESR6M SX H1.9

10U_0603_6.3V6M

C123

C128

1

1

+

2

2

La yout Note :
Sha red be twe en th e t wo
SO- DIM Ms.
Pl ac e t wo ca paci tors c lose
to t he VR and one
be tw ee n t he tw o SODI MMs

1

Title

Size Document Num ber R ev

Cust om

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

LA -4 892 P

1

of

9 45Satu rday, May 16, 2009

0.3

5

09/04/23 HP

D D

C C

B B

A A

+V_D DR_REF_DIMMB_DQ

2.2U_0603 _6.3V4Z

1

C137

2

DDR_ CKE2_DIMMB6

DDR_B_ BS26

M_CLK_DD R26
M_CLK_DDR# 26

DDR_B_ BS06

DDR_B_W E#6
DDR_ B_CAS#6

DDR_ CS3_DIMMB#6

+3VS

1

2

0.1U_0402 _10V6K

2.2U_0603 _6.3V4Z

DDR_ B_D0
DDR_ B_D1

1

C138

DDR _B_DM0

2

DDR_ B_D2
DDR_ B_D3

DDR_ B_D8
DDR_ B_D9

DDR_ B_DQS#1
DDR _B_DQS1

DDR _B_D10
DDR _B_D11

DDR _B_D16
DDR _B_D17

DDR_ B_DQS#2
DDR _B_DQS2

DDR _B_D18
DDR _B_D19

DDR _B_D24
DDR _B_D25

DDR _B_DM3

DDR _B_D26
DDR _B_D27

DDR_ CKE2_DIMMB

DDR_ B_BS2

DDR_B_ MA12
DDR_ B_MA9

DDR _B_MA8
DDR_ B_MA5

DDR_ B_MA3
DDR_ B_MA1

M_CLK_D DR2
M_CLK_D DR#2

DDR_B_ MA10
DDR_ B_BS0

DDR_B_ WE#
DDR _B_CAS# M_ODT2

DDR_B_ MA13
DDR_ CS3_DIMMB#

DDR _B_D32
DDR _B_D33

DDR_ B_DQS#4
DDR _B_DQS4

DDR _B_D34
DDR _B_D35

DDR _B_D40
DDR _B_D41

DDR _B_DM5

DDR _B_D42
DDR _B_D43

DDR _B_D48
DDR _B_D49

DDR_ B_DQS#6
DDR _B_DQS6

DDR _B_D50
DDR _B_D51

DDR _B_D56
DDR _B_D57

DDR _B_DM7

DDR _B_D58
DDR _B_D59

1 2

10K_0402_5%

0.1U_0402 _10V6K

C157

C158

1

2

+1.5V +1.5V

3 A

3 A @1 . 5 V

@ 1. 5V

3 A3 A

@ 1. 5V@ 1. 5V

CONN @

JDIMB1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1
VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9
VSS925VSS10

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2
DQS247VSS17
VSS1849DQ22

51

DQ18
DQ1953VSS19
VSS2055DQ28

57

DQ24
DQ2559VSS21
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3
A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1
VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

R82

1 2

R83 10K_0402_5%

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

VSS3

DQS0

VSS6

VSS8
DQ12
DQ13

DQ14
DQ15

DQ20
DQ21

DQ23

DQ29

DQS3

DQ30
DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

VTT2

2
4

DQ4

6

DQ5

8
10
12
14
16

DQ6

18

DQ7

20
22
24
26
28

DM1

30
32
34
36
38
40
42
44
46

DM2

48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78

A15

80

A14

82
84
86

A7

88
90

A6

92

A4

94
96

A2

98

A0

100
102

CK1

104
106
108

BA1

110
112
114

S0#

116
118
120
122

NC2

124
126
128
130
132
134
136

DM4

138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170

DM6

172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

SDA

202

SCL

204

206

G2

BOT SLOT

5

4

DDR_ B_D4
DDR_ B_D5

DDR_ B_DQS#0
DDR _B_DQS0

DDR_ B_D6
DDR_ B_D7

DDR _B_D12
DDR _B_D13

DDR _B_DM1
DRAMRST#

DDR _B_D14
DDR _B_D15

DDR _B_D20
DDR _B_D21

DDR _B_DM2

DDR _B_D22
DDR _B_D23

DDR _B_D28
DDR _B_D29

DDR_ B_DQS#3
DDR _B_DQS3

DDR _B_D30
DDR _B_D31

DDR_ CKE3_DIMMB

DDR_B_ MA15
DDR_B_ MA14

DDR_ B_MA11
DDR_ B_MA7

DDR _B_MA6
DDR_ B_MA4

DDR_ B_MA2
DDR_ B_MA0

M_CLK_D DR3
M_CLK_D DR#3

DDR_ B_BS1
DDR _B_RAS#

DDR_ CS2_DIMMB#

M_ODT3

+VREF_ CA

DDR _B_D36
DDR _B_D37

DDR _B_DM4

DDR _B_D38
DDR _B_D39

DDR _B_D44
DDR _B_D45

DDR_ B_DQS#5
DDR _B_DQS5

DDR _B_D46
DDR _B_D47

DDR _B_D52
DDR _B_D53

DDR _B_DM6

DDR _B_D54
DDR _B_D55

DDR _B_D60
DDR _B_D61

DDR_ B_DQS#7
DDR _B_DQS7

DDR _B_D62
DDR _B_D63

PM_EXTTS#1_R
SMB_DATA_S3
SMB_CLK_S3

4

0000 .6 5 A @ 0. 75 V

. 65 A@ 0 . 7 5V

. 65 A@ 0 . 7 5V. 65 A@ 0 . 7 5V

DRAMRST# 4,9

DDR_ CKE3_DIMMB 6

M_CLK_DD R3 6
M_CLK_DDR# 3 6

DDR_B_ BS1 6
DDR_ B_RAS# 6

DDR_ CS2_DIMMB# 6
M_ODT2 6

M_ODT3 6

0.1U_0402 _10V6K

C151

1

1

2

2

PM_EXTTS#1_R 4,9

SMB_DATA_S3 4,9,12,14,2 6
SMB_CLK_S3 4,9,12,14 ,26

+0.75VS

DDR_ B_DQS#[0. .7]6

DDR_ B_D[0..6 3]6

DDR_ B_DM[0..7]6

DDR_ B_DQS[0.. 7]6

DDR_ B_MA[0..15]6

09/04/23 HP

+V_D DR_REF_DIMMB_CA

2.2U_0603 _6.3V4Z

C152

3

La yout Note :
Pl ac e n ear D IM M

La yout Note :
Pl ac e n ear D IM M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

09/03/31 HP

+1.5V

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C141

1

2

+0.75VS

1U_0603_1 0V4Z

C153

1

1

2

2

2008/10/31 2009/11/06

C143

C142

1

1

2

2

1U_0603_1 0V4Z

1U_0603_1 0V4Z

1U_0603_1 0V4Z

C154

C156

C155

1

1

2

2

Compal Secret Data

2

10U_0603_6.3V6M

C145

C144

1

1

2

2

Deciphered Date

2

10U_0603_6.3V6M

10U_0603_6.3V6M

C146

1

2

09/04/29 HP

330U_D2_2VM_R6M

C964

1

+

2

1

Compal Electronics, Inc.

Title

Size Document Num ber R ev

Date: Sheet

DDRIII-SODIMM SLOT2

LA -4 892 P

1

10 45S aturd ay, May 16, 2009

of

0.3

5

4

3

2

1

09/04/ 03 Auburndale/Arrandale only supports M1 change Vref to +V_DDR_CPU_REF

+1.5V

12

R76

+V_D DR_REF_DIMMA_CA

D D

1K_0402_1%

12

R77

1K_0402_1%

+1.5V

12

12

R952

1K_0402_1%

R953

1K_0402_1%

+V_D DR_REF_DIMMA_DQ

09/04/23 HP

+1.5V

12

R948

1K_0402_1%

+V_D DR_REF_DIMMB_CA

+1.5V

12

R954

1K_0402_1%

+V_D DR_REF_DIMMB_DQ

12

R949

C C

1K_0402_1%

12

R955

1K_0402_1%

11/20 Auburndale does not require to support M2 for VrefDQ, HP

11/20 HP

09/03/31 Auburndale/Arrandale only supports M1,HP

B B

11/20 HP

09/03/31 Auburndale/Arrandale only supports M1,HP

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/15 2009/11/06

Compal Secret Data

Deciphered Date

2

Title

Size Document Num ber R ev

Cust om

Date: Sheet

Compal Electronics, Inc.

DDRIII SO-DIMM VREFDQ (M1/M2/M3)

LA -4 892 P

1

of

11 45F rida y, May 15, 2009

0.3

5

D D

4

3

2

1

VDD_REF

XTAL_IN

XTAL_OUT

VSS_REF

VDD_CPU

CPU_0

CPU_0#

VSS_CPU

CPU_1

CPU_1#

VDD_SRC

+3VS_CK505 +1.05VS_CK505+3VS_CK505 +1.05VS_CK505

32

SCL

31

SDA

30
29
28
27
26
25

24
23
22
21
20
19
18
17

SMB_CLK_S3
SMB_DATA_S3
REF _0/CPU_SEL

CLK_XTAL_IN
CLK_XTAL_OUT

CK_PW RGD

R_C LK_BUF_BCLK CLK_B UF_BCLK
R_CL K_BUF_BCLK# CLK_BUF_BC LK#

R94 0_0402_5%

1 2
1 2

R96 0_0402_5%

CLK_14M_ PCH

R90

12

33_0402_1%

CK_PW RGD

2N7002DW T/R7_SOT-363-6

R152

Q96A

SMB_CLK_S3 4,9,10,14 ,26
SMB_DATA_S3 4,9,10,14,2 6

CLK_14M_PC H 14

CLK_BUF _BCLK 14
CLK_BUF_ BCLK# 14

1 2

10K_0402_5%

61

2

+3VS_CK505

CLK_EN# 42

C182

33P_0402_50V8J

14.31818MHZ_20P_1BX14318BE1A

CLK_XTAL_OUT

CLK_XTAL_IN

Y1

12

2

2

1

C183

33P_0402_50V8J

1

U2

1

+3VS_CK505

VDD_DOT

2

VSS_DOT

3

DOT_96

4

DOT_96#

5

VDD_27

6

27MHZ

7

27MHZ_SS

8

VSS_27

9

VSS_SATA

10

SRC_1/SATA

11

SRC_1#/SATA#

12

VSS_SRC

13

SRC_2

14

SRC_2#

15

VDD_SRC_IO

16

CPU_STOP#

SLG8SP585VT R_QFN32_5X5

REF_0/CPU_SEL

CKPWRGD/PD #

VDD_CPU_IO

TGND

33

R85 0_0402_5%

R87 0_0402_5%

R91 0_0402_5%

R92 0_0402_5%
R93 0_0402_5%
R95

0.1U_0402 _10V6K

47P_0402_50V8J

C179

C180

1

1

2

2

0.1U_0402 _10V6K

47P_0402_50V8J

C169

C168

1

1

2

2

1 2
1 2

1 2
1 2

1 2
1 2

C181

0.1U_0402 _10V6K
C170

1

2

0_0402_5%

CPU_STOP#

C221

C174

L_CLK_BUF _DOT96
L_CLK_BUF _DOT96#

L_CL K_BUF_CKSSCD
L_C LK_BUF_CKSSCD#

L_CLK _DMI
L_CLK _DMI#

CPU_STOP#

R99 10K_0402_5%

1 2

CLK_14M_ PCH

12

10P_0402_50V8J@

REF _0/CPU_SEL

12

10P_0402_50V8J@

C177

0.1U_0402 _10V6K

1

2

Close to U2

0.1U_0402 _10V6K
C178

1

2

11/06 HP

Close to U2

0.1U_0402 _10V6K

C166

1

2

CLK_BUF_D OT96
CLK_BUF_D OT96#

CLK_ BUF_CKSSCD
CLK_ BUF_CKSSCD#

CLK _DMI
CLK _DMI#

0.1U_0402 _10V6K

1

2

C167

CLK_BUF_D OT9614

CLK_BUF_D OT96#14

CLK_ BUF_CKSSCD14

+1.05VS_CK505+1.05VS

+3VS_CK505

CLK_ BUF_CKSSCD#14

CLK_D MI14

CLK_DMI#14

10U_0805_10V4K

10U_0805_10V4K

C176

1

1

2

2

0.1U_0402 _10V6K

10U_0805_10V4K

C165

C164

1

1

2

2

C C

1 2

R970_0603_5%

B B

+3VS

1 2

R840_0603_5%

EMI Capacitor

11/06 HP

A A

(Def ault )

1

CPU_ 1CPU_ 0PIN 30

133MHz

133MHz0

100MHz100MHz

5

+VCCP

1 2

R100 10K_0402_5%@

1 2

R101 10K_0402_5%

REF _0/CPU_SEL

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

2

Title

Size Document Num ber R ev

Date: Sheet o f

Compal Electronics, Inc.

CLOCK GENERATOR

LA -4 892 P

1

12 45S aturd ay, May 16, 2009

0.3

5

PCH_RTCX1

1 2

R134 10M_0402_5%

18P_0402_50V8J

1

1

C188

D D

C752 47P_0402 _50V8J

C753 39P_0402 _50V8J

C754 47P_0402 _50V8J

C755 47P_0402 _50V8J

C C

B B

PCH_JTAG_TMS
PCH_JT AG_TDO
PCH_JT AG_TDI
PCH_JT AG_RST#

A A

OSC4OSC

2

NC3NC

Y2

2

HDA_BIT _CLK_MDC

1 2

HDA_B IT_CLK_CODEC

1 2

HDA_SDO UT_MDC

1 2

HDA_S DOUT_CODE C

1 2

09/02/19 EMI

+3VALW +3VALW +3VALW

R355

PCH Pin

PCH_JT AG_TDO

PCH_JT AG_TMS

PCH_JT AG_TDI

PCH_JT AG_TCK
PCH_JT AG_RST#

PCH_RTCX2

32.768KH Z_12.5PF_Q 13MC14610002

1

C189
18P_0402_50V8J

2

12

200_0402_5%

12

R354
100_0402_1%

PRE-PR ODUCTION
ES1 ES2

R358

No Install

R535

No Install
200ohm

R355

100ohm 10 0ohm

R354

200ohm

R536

100ohm 10 0ohm

R537

51ohm 51ohm 51ohm

R156

20Kohm

R643

10Kohm NA

R353

5

HDA_BIT_ CLK_MDC25

HDA_BIT _CLK_CODEC29

HDA_ SYNC_ CODEC29

HDA_SDOU T_CODEC29

12

R358

12

+RTCVC C

HDA_ SYNC_MDC25

HDA_RST# _MDC25

HDA_RST #_CODEC29

HDA_SDOU T_MDC25

AMT_OVERR IDE30

200_0402_5%

R535
100_0402_1%

200ohm
100ohm
200ohm

200ohm

+RTCVC C

C190

1U_0603_1 0V4Z

1 2

R139 20K_0402_1%

1 2

R140 20K_0402_1%

C193

1U_0603_1 0V4Z

HDA_S PKR29

HDA_ SDIN029

HDA_ SDIN125

LID_SW #21,25, 30

+3VALW

1 2

R147 10K_0402_5%

for SMSC EC

notice KBC state

R356

PRODUCTION

No Install
No Install
No Install
No Install
No Install
No Install

NA NA

R135

1 2

R137

1 2

1

12

CLRP1

SHORT PADS

2

1

2

09/05/05

R141 33 _0402_5%

1 2

R142 33 _0402_5%

1 2

R143 33 _0402_5%

1 2

R144 33 _0402_5%

1 2

R145 33 _0402_5%

1 2

R146 33 _0402_5%

1 2

R148 33 _0402_5%

1 2

R149 33 _0402_5%

1 2

LID_SW #

KBC_SP I_CLK_R30

KBC_SPI_C S0#_R30

PCH_ SPI_CS1#_R30

KBC_ SPI_SI_R30

KBC_SPI_SO30

12

200_0402_5%

12

R537
100_0402_1%

QSRefDes

NA

1M_0402_5%

330K_0402_5%

High = Inte rnal V R Enabled(Default)

T151
PAD

4

SM_INT RUDER#

PCH _INTVRMEN

PCH_RTCX1
PCH_RTCX2

PCH_RTC RST#

PCH_SRTC RST#

SM_INT RUDER#

PCH _INTVRMEN

HDA_BIT _CLK

HD A_SYN C

HDA _SPKR

HDA_RST#

HDA_ SDIN0

HDA_ SDIN1

HDA_SDOUT

PCH_JT AG_TCK

PCH_JTAG_TMS

PCH_JT AG_TDI

PCH_JT AG_TDO

PCH_JT AG_RST#

1 2

R157 15_0402_5%

1 2

R165 15_0402_5%

PM_PWROK30,42

PLT_RST#4,16,22,2 4,27,29

XDP_DBRESET#4 ,15

1 2

R156 51_0402_5%

4

U4A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN# / GPIO33

J30

HDA_DOCK_RST # / GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IBEXPEAK-M_FCBGA1071

R163 1K_0402_5%

3

+3VS

D33
B33
C32
A32

C34

A34
F34

AB9

AK7
AK6
AK11
AK9

AH6
AH5
AH9
AH8

AF11
AF9
AF7
AF6

AH3
AH1
AF3
AF1

AD9
AD8
AD6
AD5

AD3
AD1
AB3
AB1

AF16

AF15

T3

Y9

V1

SIRQ

HDA _SPKR

NAND_D ET#

SIRQ

SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
SATA_PTX_DRX_N0
SATA_PTX_DRX_P0

SATA_PRX_DTX_N1
SATA_PRX_DTX_P1
SATA_PTX_DRX_N1
SATA_PTX_DRX_P1

SATA_PRX_DTX_N2
SATA_PRX_DTX_P2
SATA_PTX_DRX_N2
SATA_PTX_DRX_P2

SATA_PRX_DTX_N5
SATA_PRX_DTX_P5
SATA_PTX_DRX_N5
SATA_PTX_DRX_P5

SATAICOMP

1 2

R158 10K_0402_5%

GPIO21

HDD_HA LTLED

1 2

R136 10K_0402_5%

1 2

R138 1K_0402_5%@

LOW=Default HIGH=N o Reboot

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

LP C

RT CIH DA

SA TA

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

SPI JTAG

09/05/05 HP

+3VS +BATT1.1+VREG3_51125+ RTCVCC

R162

1 2

1K_0402_5%

1 2

PCH_JT AG_TDO

PCH_JT AG_TDI
PCH_JTAG_TMS

PCH_JT AG_TCK

JP3

CONN @

E-T_670 1K-Q24N-00R_24P-T

24

TCK0

GND

23

GND

GND

22

TCK1

21

TMS

20

TDI

19

TRST#

18

TDO

17

GND

16

HOOK7

15

HOOK6

14

VCCOBS_AB

13

HOOK5

12

HOOK4

11

HOOK2

10

HOOK0

9

GND

8

OBSDATA_A3

7

OBSDATA_A2

6

GND

5

OBSDATA_A1

4

OBSDATA_A0

3

GND

2

OBSFN_A1

1

OBSFN_A0

26
25

3

2

LPC_LAD0 27,30, 31
LPC_LAD1 27,30, 31
LPC_LAD2 27,30, 31
LPC_LAD3 27,30, 31

LPC_LFRAME# 27,30 ,31

LPC_LDRQ# 0 31

R155

1 2

37.4_0402_1%

NAND_DET # 19

SIRQ 2 7,30,31

SATA_PRX_DTX_N0 19
SATA_PRX_DTX_P0 19
SATA_PTX_DRX_N0 19
SATA_PTX_DRX_P0 19

SATA_PRX_DTX_N1 19
SATA_PRX_DTX_P1 19
SATA_PTX_DRX_N1 19
SATA_PTX_DRX_P1 19

+1.05VS

+3VS

SATA_LED# 28,29

09/03/31 HP

HDD_HALT LED 29

PAD

PAD

T130

T131

PAD

PAD
T132

T133

09/01/15 HP

09/03/31 HP

NB HDD

NB ODD

09/01/15 HP

11/11 HP

NAND_D ET#

GPIO21

SATA_PRX_DTX_N2 28
SATA_PRX_DTX_P2 28
SATA_PTX_DRX_N2 28
SATA_PTX_DRX_P2 28

SATA_PRX_DTX_N5 28
SATA_PRX_DTX_P5 28
SATA_PTX_DRX_N5 28
SATA_PTX_DRX_P5 28

+3VS

09/04/23 HP

R160
10K_0402_5%

1 2

1 2

R966 10K_0402_5%

Dock Up grade Bay

09/04/23 HP

eSATA i n doc king

+3VS

09/02/09 Power team

D38

2

W=20 mils

C208

1

1U_0603_1 0V4Z

2

Pla ce ne ar I BEX-M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

BAV70W_SOT323-3

2008/10/31 2009/11/06

+BATT_D

3

Compal Secret Data

1 2

W=20 mils

Deciphered Date

2

R748

1K_0402_5%

W=20 mils

CONN @

JBATT1
E-T_380 1-E02N-01R_2P

1

2

1

Title

Size Document Num ber R ev

Cust om

Date: Sheet

Compal Electronics, Inc.

IBEX-M(1/6)-HDA/JTAG/SATA

LA -4 892 P

1

of

13 45S aturd ay, May 16, 2009

0.3

5

D D

PCIE_PRX_DTX_N229

EXP

Med ia C ard

WLAN

C C

NIC

PCIE_PRX_DTX_P229
PCIE_PTX_C _DRX_N229
PCIE_PTX_C_DRX_P229

PCIE_PRX_DTX_N329
PCIE_PRX_DTX_P329
PCIE_PTX_C _DRX_N329
PCIE_PTX_C_DRX_P329

PCIE_PRX_DTX_N424
PCIE_PRX_DTX_P424
PCIE_PTX_C _DRX_N424
PCIE_PTX_C_DRX_P424

PCIE_PRX_DTX_N622
PCIE_PRX_DTX_P622
PCIE_PTX_C _DRX_N622
PCIE_PTX_C_DRX_P622

C210 0.1U_0402 _10V6K

1 2

C211 0.1U_0402 _10V6K

1 2

C209 0.1U_0402 _10V6K

1 2

C212 0.1U_0402 _10V6K

1 2

C213 0.1U_0402 _10V6K

1 2

C214 0.1U_0402 _10V6K

1 2

C217 0.1U_0402 _10V6K

1 2

C218 0.1U_0402 _10V6K

1 2

PCIE_PRX_DTX_N2
PCIE_PRX_DTX_P2
PCIE_PTX_DRX_N2
PCIE_PTX_DRX_P2

PCIE_PRX_DTX_N3
PCIE_PRX_DTX_P3
PCIE_PTX_DRX_N3
PCIE_PTX_DRX_P3

PCIE_PRX_DTX_N4
PCIE_PRX_DTX_P4
PCIE_PTX_DRX_N4
PCIE_PTX_DRX_P4

PCIE_PRX_DTX_N6
PCIE_PRX_DTX_P6
PCIE_PTX_DRX_N6
PCIE_PTX_DRX_P6

11/07 HP

+3VALW

1 2

R676 10K_0402_5%

+3VS

1 2

0_0402_5%
0_0402_5%

0_0402_5%
0_0402_5%

CLK_ PCIE_MCARD _PCH#_R

0_0402_5%

CLK_ PCIE_MCARD _PCH_R

0_0402_5%

+3VALW

+3VALW

R640 10K_0402_5%

CLK_PCIE_ EXP_PCH#_R
CLK_PCIE_ EXP_PCH_R

CLK_ PCIE_C ARD_PCH#_R
CLK_ PCIE_C ARD_PCH_R

1 2

R770 10K_0402_5%

1 2

R825 10K_0402_5%

R180

1 2
1 2

R181

R183

1 2
1 2

R184

R185

1 2
1 2

R186

+3VS

5

CLKR EQ_CARD#

3

2N7002DW T/R7_SOT-363-6
Q96B

CLK_ PCIE_CARD_ PCH#29
CLK_ PCIE_CARD_ PCH29

CLK_ PCIE_MCARD_PC H#24
CLK_ PCIE_MCARD_PC H24

09/02/19 HP

CLK_PCIE_EXP_ PCH#29
CLK_PCIE_EXP_ PCH29

CLKREQ_EXP#29

CLKRE Q_CARD#29

CLKREQ_W LAN#24

4

5

B B

EXP

Med ia C ard

WLAN

A A

CLKR EQ_CARD#_R16

T123P AD
T124P AD
T125P AD
T126P AD

4

U4B

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1# / GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4# / GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5# / GPIO44

AK53

CLKOUT_PEG_ B_N

AK51

CLKOUT_PEG_ B_P

P13

PEG_B_CLKRQ# / GPIO56

IBEXPEAK-M_FCBGA1071

4

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1ALERT# / GPIO74

SMBus

PCI-E *

Link

Con troll er

PEG_A_CLKRQ# / GPIO47

PEG

CLKOUT_DP_ N / CLKOUT_BCLK1_N
CLKOUT_DP_ P / CLKOUT_BCLK1_P

From C LK BUFFER

CLKIN_SATA_N / CKSSCD _N
CLKIN_SATA_P / CKSSCD _P

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

Clock Flex

SMB_CLK_S3
SMB_DATA_S3

09/02/05 HP

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_ A_N
CLKOUT_PEG_ A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_BCLK_N
CLKIN_BCLK_P

CLKIN_DOT_96 N
CLKIN_DOT_96 P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

3

CONN @

JSMBUS

1

G14GND

2

5

CLK

G2

3

DATA

MOLEX_53261-0319

Set it as GPI11

SMBALERT#

B9

SMBCLK

H14

SMBDATA

C8

SML0ALERT#

J14

SML0CLK

C6

SML0DATA

G8

SML1ALERT#

M14

SML1CLK

E10

SML1DATA

G12

T13

T11

T9

PEG_CLKREQ#

H1

AD43
AD45

AN4
AN2

CLK_DP#

AT1

CLK_D P

AT3

AW24
BA24

AP3
AP1

F18
E18

AH13
AH12

P41

J42

XTAL25_IN

AH51

XTAL25_OUT

AH53

R187 90.9 _0402_1%

AF38

T45

T140 PAD

P43

T141 PAD

CLK_14M_SIO_P CLK_14M_SIO

T42

N50

T142 PAD

CLK_14M_SIO

3

T51 PAD

CLK_EXP# 4
CLK_EXP 4

T52 PAD
T53 PAD

CLK_DMI# 12
CLK_D MI 12

CLK_BUF_ BCLK# 12
CLK_BUF _BCLK 12

CLK_BUF_D OT96# 12
CLK_BUF_D OT96 12

CLK_ BUF_CKSSCD# 12
CLK_ BUF_CKSSCD 12

CLK_14M_PCH 12

CLK_P CI_FB 16

1 2

12

R118 22_0402_5%

@

1 2

C923 10P_0402 _50V8J

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

SMB_CLK_S3

SMB_DATA_S3

1 2

R169 10K_0402_5%

1 2

R171 10K_0402_5%

09/01/15 HP

SMBCLK

R351 0_ 0402_5%@

1 2

PEG_CLKREQ#

SMBALERT# SML1ALERT# S ML1ALERT#

1 2

R177 10K_0402_5%

R350

1 2

09/01/17 HP

SMBDATA

R352 0_ 0402_5%@

SML1CLK

SML1DATA

11/10 HP

1 2

R906 0_ 0402_5%

1 2

R907 0_ 0402_5%

1 2

XTAL25_IN

XTAL25_OUT

+3VALW

SMBCLK

SMBDATA

+3VS

09/02/14 HP

09/04/07 Intel

+1.05VS

CLK_14M_SIO 31

09/01/06 Intel

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

2

+3VS

0_0402_5%@

Q8A

2N7002DW T/R7_SOT-363-6

2N7002DW T/R7_SOT-363-6

61

2

Q8B

3

4

5

09/01/15 HP

Q7A

2N7002DW T/R7_SOT-363-6

6 1

2N7002DW T/R7_SOT-363-6

3

R182 1M_0402_5%@

25MHZ_20P_1 BG25000CK1A

18P_0402_50V8J

C223

1

@

2

Not e: r emov e 25M Hz c rysta l

or E S2 s ilico n.

f

2

Q7B

4

5

1 2

Y3

1 2

SMB_CLK_S3

SMB_DATA_S3

@

18P_0402_50V8J

1

2

1

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK

SML1DATA

SMBALERT#

SML0ALERT#

1 2

R167 2.2K_0402_5%

1 2

R168 2.2K_0402_5%

1 2

R170 2.2K_0402_5%

1 2

R172 2.2K_0402_5%

1 2

R174 4.7K_0402_5%

1 2

R176 4.7K_0402_5%

1 2

R207 10K_0402_5%

1 2

R272 10K_0402_5%

1 2

R771 10K_0402_5%

R357

1 2

0_0402_5%

R360

1 2

0_0402_5%

SMB_CLK_S3 4,9,10,12 ,26

SMB_DATA_S3 4,9,10,12,2 6

+3VALW

12/19 HP

CAP_CLK 25,30

CAP_DAT 25,30

09/04/08 HP

XTAL25_IN

C224

@

Title

Size Document Num ber R ev

Cust om

Date: Sheet o f

Compal Electronics, Inc.

IBEX-M(2/6)-PCI-E/SMBUS/CLK

LA -4 892 P

12

R944 0_0402_5%

1

14 45S aturd ay, May 16, 2009

0.3

5

DMI_CTX_PRX_N05
DMI_CTX_PRX_N15
DMI_CTX_PRX_N25
DMI_CTX_PRX_N35

DMI_CTX_PRX_P05
DMI_CTX_PRX_P15
DMI_CTX_PRX_P25

D D

DMI_CTX_PRX_P35

DMI_CRX_PTX_N05
DMI_CRX_PTX_N15
DMI_CRX_PTX_N25
DMI_CRX_PTX_N35

DMI_CRX_PTX_P05
DMI_CRX_PTX_P15
DMI_CRX_PTX_P25
DMI_CRX_PTX_P35

+1.05VS

1 2

R196 49.9_0402_1%

XDP_DBRESET#4 ,13

PGD_ IN30
VGATE42

1 2

R963 1K_0402_5%

09/05/13 HP

C C

PM_DRAM_PW RGD4

RPGOOD37

SUS_PW R_ACK30

PM_PWRBT N#_R4

PM_CL KRUN#

LOW_BAT#_R

SLP_LAN#

IBEX_R#

PCIE_W AKE#

AC_PRESENT

PM_RSMRST#

PWROK

SLP_S3#

SLP_S4#

SLP_S5#

PM_RSMRST#30

ON/OFF BTN#25

AC_PRESENT30

11/18

1 2

R205 10K_0402_5%

1 2

R209 10K_0402_5%

1 2

R340 10K_0402_5%

1 2

R211 10K_0402_5%

1 2

R212 1K_0402_5%

1 2

R439 10K_0402_5%@

1 2

R206 100K_0402_5%

1 2

R747 10K_0402_5%

1 2

R538 10K_0402_5%@

1 2

R546 10K_0402_5%@

1 2

R547 10K_0402_5%@

09/01/22 HP

B B

A A

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

DMI_I RCOMP

09/05/15 HP

1 2

R198 0_0402_5%

1 2

R210 10K_0402_5%

PM_DRAM_PW RGD

R200

1 2
1 2

R201 10K_0402_5%

1 2

R202 0_0402_5%

+3VS

+3VALW

09/05/15 HP

09/05/11 HP

5

PWROK

AUXPWROK

0_0402_5%

LOW_BAT#_R

IBEX_R#

U4C

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_ DN_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

IBEXPEAK-M_FCBGA1071

DMI

SUS_STAT# / GPIO61

Syste m Power Manag ement

SLP_LAN# / GPIO29

FDI

CLKRUN# / GPIO32

SLP_S5# / GPIO63

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

WAKE#

SUSCLK / GPIO62

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

4

4

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

BJ14

BF13

BH13

BJ12

BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

FDI_CTX_ PRX_N0
FDI_CTX_ PRX_N1
FDI_CTX_ PRX_N2
FDI_CTX_ PRX_N3
FDI_CTX_ PRX_N4
FDI_CTX_ PRX_N5
FDI_CTX_ PRX_N6
FDI_CTX_ PRX_N7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_ INT

FD I_FSY NC0

FD I_FSY NC1

FDI_ LSYNC 0

FDI_ LSYNC 1

PCIE_W AKE#

PM_CL KRUN#

SUS_C LK

SLP_LAN#

FDI_CTX_ PRX_N0 5
FDI_CTX_ PRX_N1 5
FDI_CTX_ PRX_N2 5
FDI_CTX_ PRX_N3 5
FDI_CTX_ PRX_N4 5
FDI_CTX_ PRX_N5 5
FDI_CTX_ PRX_N6 5
FDI_CTX_ PRX_N7 5

FDI_CTX_PRX_P0 5
FDI_CTX_PRX_P1 5
FDI_CTX_PRX_P2 5
FDI_CTX_PRX_P3 5
FDI_CTX_PRX_P4 5
FDI_CTX_PRX_P5 5
FDI_CTX_PRX_P6 5
FDI_CTX_PRX_P7 5

FDI_ INT 5

FDI_ FSYNC 0 5

FDI_ FSYNC 1 5

FDI_ LSYNC0 5

FDI_ LSYNC1 5

EDID _CLK

EDID_D ATA

PCIE_WAK E# 22 ,24,29

PM_CLKRUN # 27 ,30,31

SUS_STAT# 27,31

T109PAD

SLP_S5# 28

SLP_S4# 33

SLP_S3# 22,29,30,3 2,33,35,38,3 9,40

H_PM_ SYNC 4

11/18 HP

1 2

R865 2.2K_0402_5%

1 2

R866 2.2K_0402_5%

3

+3VS

12

R832

2.37K_0402_1%

+3VS

ENABLT21
ENAV DD21

INV_PW M21

EDID _CLK21
EDID_DAT A21

R830 10K_0 402_5%
R831 10K_0 402_5%

LVDS_AC LKN21
LVDS_ACLK P21

LVDS_A0N21
LVDS_A1N21
LVDS_A2N21

LVDS_A0P21
LVDS_A1P21
LVDS_A2P21

LVDS_BC LKN21
LVDS_BCLK P21

LVDS_B0N21
LVDS_B1N21
LVDS_B2N21

LVDS_B0P21
LVDS_B1P21
LVDS_B2P21

DAC_B LU20
DAC_ GRN20
DAC_ RED20

CRT_ DDC_CLK20
CRT_DDC _DATA20

CRT _HSYNC20
CRT _VSYNC20

1 2
1 2

T122

U4D

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_C LK

V48

L_CTRL_D ATA

AP39

LVD_IBG

PAD

AP41

LVD_VBG

AT43

LVD_VREFH

AT42

LVD_VREFL

AV53

LVDSA_CLK#

AV51

LVDSA_CLK

BB47

LVDSA_DATA#0

BA52

LVDSA_DATA#1

AY48

LVDSA_DATA#2

AV47

LVDSA_DATA#3

BB48

LVDSA_DATA0

BA50

LVDSA_DATA1

AY49

LVDSA_DATA2

AV48

LVDSA_DATA3

AP48

LVDSB_CLK#

AP47

LVDSB_CLK

AY53

LVDSB_DATA#0

AT49

LVDSB_DATA#1

AU52

LVDSB_DATA#2

AT53

LVDSB_DATA#3

AY51

LVDSB_DATA0

AT48

LVDSB_DATA1

AU50

LVDSB_DATA2

AT51

LVDSB_DATA3

AA52

CRT_BLUE

AB53

CRT_GREEN

AD53

CRT_RED

V51

CRT_DDC_ CLK

V53

CRT_DDC_ DATA

Y53

CRT_HSYNC

Y51

CRT_VSYNC

AD48

1.02K_04 02_0.5%

12

R833

DAC_IREF

AB51

CRT_IRTN

IBEXPEAK-M_FCBGA1071

2

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_CTRLCL K

SDVO_CTRLDATA

LVDS

DDPC_CTR LCLK

DDPC_CTR LDATA

Digit al Disp lay In terfac e

DDPD_CTR LCLK

DDPD_CTR LDATA

CRT

12/03 HP

2N7002DW T/R7_SOT-363-6

2N7002DW T/R7_SOT-363-6

DDC_ EN

+3VS

@

R889

100K_0402_5%

2N7002DW T/R7_SOT-363-6

1 2

MB_DP_AUXN_C

12

2N7002DW T/R7_SOT-363-6

12

@

R890
100K_0402_5%

Q81A

2

Q82A

2

Q81B

2N7002DW T/R7_SOT-363-6

3

61

2N7002DW T/R7_SOT-363-6

61

3

Q83A

61

2

Q89A

61

2

4

5

Q82B

4

5

09/02/09 HP

Q83B
2N7002DW T/R7_SOT-363-6

3

5

Q89B
2N7002DW T/R7_SOT-363-6

3

5

1 2

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

4

DP_EN

4

2

R895

2.2K_0402_5%

DDPD_CT RLDATA

DDPD_ CTRLCLK

2.2K_0402_5%

MB_DP_AUXN

R896

1 2

DDC_ EN19

1 2

+3VS

12/03 HP

C929

0.1U_0402 _16V4Z

09/05/14 HP

MB_DP_AUXP MB_DP_AUXP_C

3

0.1U_0402 _16V4Z
C930

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SDVO_STALLN

SDVO_STALLP

SDVO_INTN
SDVO_INTP

DDPB_AUXN

DDPB_AUXP

DDPB_HPD

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

DP_EN 19

BJ46
BG46

BJ48
BG48

BF45
BH45

T51
T53

BG44
BJ44
AU38

BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38

Y49
AB49

BE44
BD44
AV40

BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

U50
U52

BC46
BD46
AT38

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

+3VS+3VS

R887
100K_0402_5%

1 2

1 2

DDPB_CT RLCLK
DDPB_CTR LDATA

DPB_R

DDPC_ CTRLCLK
DDPC_CT RLDATA

DPC_ R

DDPD_ CTRLCLK
DDPD_CT RLDATA

MB_DP_AUXN
MB_DP_AUXP
MB_DP_HPD #

09/05/14 HP

R888
100K_0402_5%

1

DPB_R

DPC_ R

MB_DP_HPD #

DDPB_CT RLCLK 28
DDPB_CTR LDATA 28

DPB_AUX# 28
DPB_AUX 28
DPB_H PD 28

DPB_TXN0 28
DPB_TXP0 28
DPB_TXN1 28
DPB_TXP1 28
DPB_TXN2 28
DPB_TXP2 28
DPB_TXN3 28
DPB_TXP3 28

DDPC_C TRLCLK 28
DDPC_CT RLDATA 28

DPC_AUX# 28
DPC_AUX 28
DPC_ HPD 28

DPC_TXN0 28
DPC_TXP0 28
DPC_TXN1 28
DPC_TXP1 28
DPC_TXN2 28
DPC_TXP2 28
DPC_TXN3 28
DPC_TXP3 28

MB_DP_HPD # 19

MB_DP_TXN0 19
MB_DP_TXP0 19
MB_DP_TXN1 19
MB_DP_TXP1 19
MB_DP_TXN2 19
MB_DP_TXP2 19
MB_DP_TXN3 19
MB_DP_TXP3 19

1 2

R822 100K_0402_5%

1 2

R826 100K_0402_5%

1 2

R827 100K_0402_5%

11/25 HP

11/25 HP

11/06 HP

Clost to JDP1

MB_DP_AUXN_C ONN 19

MB_DP_AUXP_CO NN 19

Clost to JDP1

11/22 HP

Title

Size Document Num ber R ev

Cust om

Date: Sheet o f

Compal Electronics, Inc.

IBEX-M(3/6)-DMI/GPIO/LVDS

LA -4 892 P

1

15 45S aturd ay, May 16, 2009

0.3

5

PC I_IRD Y#
PCI_P IRQD#
PCI_P IRQA#
PCI_S ERR#

PCI_ PIRQG#
PCI_P IRQC#
PCI_P IRQE#

D D

C C

PCI_STOP#

PCI_REQ 2#
PCI_REQ 1#
PCI_F RAME#
PCI_T RDY#

PCI_GNT3#

09/04/15 HP

09/02/13 HP

B B

RP17

1 8
2 7
3 6
4 5

8.2K_0804_ 8P4R_5%

RP18

1 8
2 7
3 6
4 5

8.2K_0804_ 8P4R_5%

RP16

1 8
2 7
3 6
4 5

8.2K_0804_ 8P4R_5%

1 2

R257 1K_0402_5%@

A16 sw ap ov eride Strap/Top-Block
Swap O verride jumper

Low=A1 6 swap
overri de/Top-Block

PCI_GNT3#

Swap O verride enabled
High=D efault

T148 PAD
T149 PAD
T113 PAD

CLKR EQ_CARD#_R14

ACCEL_INT #26

T129 PAD

PCI_S ERR#27,30

PLT_RST#4,13,22,2 4,27,29

CLK_ PCI_SIO_PCH31

CLK_ PCI_KBC_PCH30

CLK_ PCI_DB_PCH27

CLK_P CI_FB14

CLK_PCI_T PM_PCH27

+3VS

PCI_P IRQA#
PCI_P IRQB#
PCI_P IRQC#
PCI_P IRQD#

PCI_REQ 0#
PCI_REQ 1#
PCI_REQ 2#
PCI_REQ 3#

PCI_GNT0#
PCI_GNT1#
PCI_GNT2#
PCI_GNT3#

PCI_P IRQE#

PCI_ PIRQG#
ACCEL_IN T#

PCI_S ERR#
PCI_P ERR#

PC I_IRD Y#

PCI_D EVSEL#
PCI_F RAME#

PCI_LO CK#

PCI_STOP#
PCI_T RDY#

CLK_ PCI_KBC_R
CLK_ PCI_FB_R

CLK_PCI_T PM_R

CLK _PCI_DB_P

R223 22 _0402_5%

1 2

R225 22 _0402_5%

1 2

09/01/13 Port80 Delete

R189 22 _0402_5%

R224 22 _0402_5%

1 2

R228 22 _0402_5%

1 2

U4E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1# / GPIO50

B45

REQ2# / GPIO52

M53

REQ3# / GPIO54

F48

GNT0#

K45

GNT1# / GPIO51

F36

GNT2# / GPIO53

H53

GNT3# / GPIO55

B41

PIRQE# / GPIO2

K53

PIRQF# / GPIO3

A36

PIRQG# / GPIO4

A48

PIRQH# / GPIO5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IBEXPEAK-M_FCBGA1071

12

PC I

11/06 HP

CLK_ PCI_KBC_R

CLK_ PCI_KBC_R

CLK _PCI_DB_P

CLK_ PCI_FB_R

CLK_PCI_T PM_R

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11

NV RAM

NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

NV_WR#0_ RE#
NV_WR#1_ RE#

NV_WE#_CK 0
NV_WE#_CK 1

USB

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

09/01/06 Intel

PCI_P ERR#

A A

PCI_LO CK#
PCI_D EVSEL#
ACCEL_IN T#

09/02/14 HP

PCI_REQ 3#
PCI_P IRQB#
PCI_REQ 0#

RP19

1 8
2 7
3 6
4 5

8.2K_0804_ 8P4R_5%

RP20

1 8
2 7
3 6
4 5

8.2K_0804_ 8P4R_5%

5

+3VS

BUF_PLT_RST#4

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

NV_DQS0
NV_DQS1

NV_ALE

NV_CLE

NV_RCOMP

NV_RB#

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

4

AY9
BD1
AP15
BD8

AV9
BG8

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

NV_ALE

BD3

NV_CL E

AY6

AU2

AV7

AY8
AY5

AV11
BF5

USB20_N 0

H18

USB20_P0

J18

USB20_N 1

A18

USB20_P1

C18

USB20_N 2

N20

USB20_P2

P20

USB20_N 3

J20

USB20_P3

L20

USB20_N 4

F20

USB20_P4

G20
A20
C20

USB20_N 6

M22

USB20_P6

N22
B21
D21

USB20_N 8

H22

USB20_P8

J22

USB20_N 9

E22

USB20_P9

F22

USB20_N10

A22

USB20_P10

C22

USB20_N11

G24

USB20_P11

H24

USB20_N12

L24

USB20_P12

M24

USB20_N13

A24

USB20_P13

C24

USBR BIAS

B25

D25

Withi n
500 mils

USB_OC0#

N16

BT_OFF

J16

GPIO41

F16

FPR _OFF

L16

USB_OC4#

E14

ISO_PREP #

G16

LANLINK_ST ATUS#

F12

USB_OC#7

T15

09/04/13 HP

Boot B IOS Strap

PCI_GNT0#PCI _GNT1# Boo t BIOS Location
0 1
1 0
1 1
0 0

1 2

R250 0_0402_5%

+3VS

5

U5

IN1

4

O

12

R258
100K_0402_5%

4

IN2

3

NV_CE0# 19
NV_CE1# 19
NV_CE2# 19
NV_CE3# 19

NV_DQS0 19
NV_DQS1 19

NV_DQ0 19
NV_DQ1 19
NV_DQ2 19
NV_DQ3 19
NV_DQ4 19
NV_DQ5 19
NV_DQ6 19
NV_DQ7 19
NV_DQ8 19
NV_DQ9 19
NV_DQ10 19
NV_DQ11 19
NV_DQ12 19
NV_DQ13 19
NV_DQ14 19
NV_DQ15 19

NV_ALE 19
NV_CLE 19

1 2

R220 32.4_0402_1%

NV_RB# 19

NV_RE#_W R#0 19
NV_RE#_W R#1 19

NV_WE# _CK0 19
NV_WE# _CK1 19

USB20_N0 26
USB20_P0 26
USB20_N1 26
USB20_P1 26
USB20_N2 29
USB20_P2 29
USB20_N3 26
USB20_P3 26
USB20_N4 29
USB20_P4 29

USB20_N6 24
USB20_P6 24

USB20_N8 26
USB20_P8 26
USB20_N9 24
USB20_P9 24
USB20_N10 27
USB20_P10 27
USB20_N11 28
USB20_P11 28
USB20_N12 21
USB20_P12 21
USB20_N13 28
USB20_P13 28

1 2

R221 22.6_0402_1%

09/01/23 HP

Reserved
PCI
SPI*
LPC

1

P

2

G

SN74AHC1 G08DCKR_SC70- 5@

CONN

CONN

CONN

CONN

EXPRESS

WLAN

Bluetoo th

WWAN

Finge rprint

DOCK

USB Camera

DOCK

BT_OFF 26

T150 PAD

FPR_ OFF 27

ISO_PREP# 28

LANLINK_ST ATUS# 22, 23,28,30

09/04/09 HP

PLT_RST#

R213 10 K_0402_5%

+3VS

1 2

2009/03/31 HP

WW AN_TRANSMIT_OFF#24

09/04/21 HP

WEBCAM_O N_PCH21

11/17 HP

11/06 HP

CLK_PCIE_ LAN_REQ#22

+3VALW

11/07 HP

WLAN_T RANSMIT_OFF#24

Danbur y Tec hnology Enable
NV_ALE High=E ndabled

Low=Di sable (@)

NV_ALE

DMI Te rmina tion Voltage
NV_CLE Set to Vss when LOW

Set to Vcc when HIGH

NV_CL E

3

BMBUSY#

OCP#

OCP#43

RUNS CI_EC#30

THERM_SCI#4

WW AN_DET#24

LAN_D IS#22

NPCI_RST #30,31

DOCK _ID028

DOCK _ID128

R460

PCH_NCT F618
PCH_NCT F718

PCH_NCT F1918

PCH_NCT F2618

R245

1 2

1 2

R254 1K_0402_5%@

3

RUNS CI_EC#

THERM_SCI#

GPIO8

CB_I N#

CB_IN #23

GPIO15

GPIO16

ALS_EN#

WW AN_DET#

GPIO24

WW AN_TRANSMIT_OFF#

LAN _DIS#

STP_PCI#

SATA_CLKREQ#

NPCI_RST #

WEB CAM_ON_PCH

CLK_P CIE_LAN_REQ#

CLKREQ_W WAN#

1 2

10K_0402_5%

GPIO48

GPIO49

WLAN_T RANSMIT_OFF#

+V_NVRAM_VC CQ

1K_0402_5%@

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

U4F

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

K9

LAN_PHY_PWR _CTRL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IBEXPEAK-M_FCBGA1071

WLAN_T RANSMIT_OFF#

GPIO24

GPIO15

ISO_PREP #

USB_OC0#

USB_OC4#

09/01/23 HP

09/04/08 HP

2008/10/31 2009/11/06

USB_OC#7

GPIO8

WW AN_TRANSMIT_OFF#

Compal Secret Data

2

MISC

CLKOUT_BCL K0_N / CLKOUT_PCIE8N

CLKOUT_BCL K0_P / CLKOUT_PCIE8P

GPIO

CPU

NCTF

RSVD

R231 10 K_0402_5%

1 2

R235 10 K_0402_5%

1 2

R246 1K_ 0402_5%

1 2

R239 10 K_0402_5%

1 2

11/06 HP

R284 10 K_0402_5%

1 2

R226 10 K_0402_5%

1 2

R229 10 K_0402_5%

1 2

R230 10K_0 402_5%@

1 2

R233 10K_0 402_5%@

1 2

on-die VR:

Enable: 1 (internal PU)

*
Disable: 0 (install R233)

Deciphered Date

2

CLKOUT_PCIE6N
CLKOUT_PCIE6P

CLKOUT_PCIE7N
CLKOUT_PCIE7P

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

TP10

TP11

TP12

TP13

TP14

TP15

TP16

TP17

TP18

TP19

NC_1

NC_2

NC_3

NC_4

NC_5

INIT3_3V#

TP24

AH45
AH46

AF48
AF47

U2

AM3

AM1

BG10

T1

BE10

BD10

BA22

TP1

AW22

TP2

BB22

TP3

AY45

TP4

AY46

TP5

AV43

TP6

AV45

TP7

AF13

TP8

M18

TP9

N18

AJ24

AK41

AK42

M32

N32

M30

N30

H12

AA23

AB45

AB38

AB42

AB41

T39

P6

C10

+3VALW

2009/03/31 HP

1

CLK_ PCIE_LAN_PCH #_R
CLK_ PCIE_LAN_P CH_R

+3VS

12

R216 10K_0402_5%

PCH_ PECI_R

KB_RST#

H_THERMT RIP#_L

1 2

1 2

R2185 6_0402_1%

11/20 HP

T24 PAD

T25 PAD

T26 PAD

T27 PAD

T28 PAD

T29 PAD

T30 PAD

T31 PAD

T32 PAD

T33 PAD

T34 PAD

T35 PAD

T36 PAD

T37 PAD

T38 PAD

T39 PAD

T40 PAD

T41 PAD

T42 PAD

T43 PAD

T44 PAD

T45 PAD

T46 PAD

T47 PAD

T48 PAD

T49 PAD

KB_RST#

NPCI_RST #

SATA_CLKREQ#

GPIO49

WW AN_DET#

ALS_EN#

RUNS CI_EC#

WEB CAM_ON_PCH

GPIO16

DOCK _ID0

DOCK _ID1

GPIO48

STP_PCI#

THERM_SCI#

Title

Size Docu ment Numbe r Re v

Cust om

Date: Sheet

Compal Electronics, Inc.

IBEX-M(4/6)-PCI/USB/RSVD

LA -4 892 P

R1920_0402_5%

12
12

R1940_0402_5%

CLK_CPU _BCLK# 4

CLK_CPU _BCLK 4

H_PE CI 4

R2170 _0402_5%

KB_RST# 30

H_CPU PWRGD 4

H_THERMT RIP# 4

12

R219
56_0402_1%

R259 10 K_0402_5%

1 2

R222 10 K_0402_5%

1 2

R435 10 K_0402_5%

1 2

R243 10 K_0402_5%

1 2

R240 10 K_0402_5%

1 2

R237 10 K_0402_5%

1 2

R247 10 K_0402_5%

1 2

R248 10 K_0402_5%

1 2

R251 10 K_0402_5%

1 2

R252 10 K_0402_5%

1 2

R256 10 K_0402_5%

1 2

R255 10 K_0402_5%

1 2

R878 10 K_0402_5%

1 2

R283 10 K_0402_5%

1 2

1

+VCCP

CLK_ PCIE_LAN_PCH# 22

CLK_ PCIE_LAN_PCH 22

11/06 HP

GATEA20 30

16 45S aturd ay, May 16, 2009

LAN

+3VS

0.3

of

5

4

3

2

1

+1.05VS

1U_0603_1 0V4Z

C227

C226

1

2

+1.05VS

T145 PAD

+1.05VS

1U_0402_6 .3V4Z

C244

C245

1

2

1U_0402_6 .3V4Z

1U_0402_6 .3V4Z

C250

C249

C248

1

1

2

2

+3VS

12

C967 0.1U_0402 _10V6K

T147 PAD

+1.05VS

+1.05VS

1

2

1

2

1

2

4

V24
V26
Y24
Y26

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

U23

V23

F24

K49

J38

L38

M36

N36

P36

U35

AD13

AK3
AK1

AH22

AT20

AH19

AD20

AF22

AD19
AF20
AF19
AH20

AB19
AB20
AB22
AD22

AA34
Y34
Y35
AA35

L30

+1.05VS

1

C232
1U_0402_6 .3V4Z

2

+3VALW

0.1U_0402 _10V6K

C236

1

2

+1.05VS

ICH_ V5REF_SUS

ICH_ V5REF _RUN

+3VS

1

C247

0.1U_0402 _10V6K

2

+3VS

1 2

C255 0.1U_0402_1 0V6K

+1.8VS

+PCH_VCC1 _1_20
+PCH_VCC1 _1_21
+PCH_VCC1 _1_22
+PCH_VCC1 _1_23

+3VALW

1

C272
1U_0402_6 .3V4Z

2

0.1U_0402 _10V6K

C237

1

2

T146PAD

09/03/31 HP

1U_0402_6 .3V4Z

C263

1

2

R265

1 2

R266

1 2

R267

1 2

R268

1 2

+1.05VS

0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%

+1.05VS

09/03/31 HP

09/03/31 HP

+1.8VS

09/03/31 HP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

U4J

VCCACLK[1]

VCCACLK[2]

VCCLAN[1]

VCCLAN[2]

DCPSUSBYP

VCCME[1]

VCCME[2]

VCCME[3]

VCCME[4]

VCCME[5]

VCCME[6]

1.998A

VCCME[7]

VCCME[8]

VCCME[9]

VCCME[10]

VCCME[11]

VCCME[12]

DCPRTC

0.035A

VCCVRM[3]

0.072A

VCCADPLLA[1]
VCCADPLLA[2]

0.073A

VCCADPLLB[1]
VCCADPLLB[2]

VCCIO[21]
VCCIO[22]
VCCIO[23]

3.208A

VCCIO[2]

VCCIO[3]

VCCIO[4]

DCPSST

DCPSUS

VCCSUS3_3[29]

VCCSUS3_3[30]

VCCSUS3_3[31]

VCCSUS3_3[32]

VCC3_3[5]

VCC3_3[6]

VCC3_3[7]

V_CPU_IO[1]

>1mA

V_CPU_IO[2]

2mA

VCCRTC

POWER

0.052A

0.344A

VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]

VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]

USB

VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]

0

.163A

VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]

VCCSUS3_3[28]

VCCIO[56]

>1mA

V5REF_SUS

>1mA

V5REF

VCC3_3[8]

0.357A

PCI/G PIO/LPC

0.032A

SA TA

6mA

HDA

VCC3_3[9]

VCC3_3[10]

VCC3_3[11]

VCC3_3[12]

VCC3_3[13]

VCC3_3[14]

VCCSATAPLL[1]
VCCSATAPLL[2]

VCCIO[9]

VCCVRM[4]

VCCIO[10]

VCCIO[11]

VCCIO[12]

VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]

VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]

VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]

VCCSUSHDA

Clock and Mi scella neous

CPU

RTC PCI/G PIO/LPC

1

2

22U_0805_6.3V6M

1 2

C256

1 2

C257

1 2

C261

1 2

C262

09/02/14 HP

C276

C241

0.1U_0402 _10V6K

0.1U_0402 _10V6K

0.1U_0402 _10V6K

0.1U_0402 _10V6K

T144 PAD

1 2

C233 0.1U_040 2_10V6K

C966

1

2

22U_0805_6.3V6M

C242

1

1

2

2

C243

1 2

0.1U_0402 _10V6K

+1.8VS

+V1.05S_VC CA_A_DPL

+V1.05S_VC CA_B_DPL

+1.05VS

1U_0402_6 .3V4Z

C252

C253

1

1

2

2

+V1.1A_INT _VCCSUS

+3VALW

+3VS

+VCCP

C267

1

2

1U_0402_6 .3V4Z

C275

1

1

2

2

5

09/03/31 HP

D D

T50PAD

09/05/13 HP

La yout Note :
Pl ac e n ear PIN AD38

+1.05VS

09/04/09 HP

C965

C C

B B

+RTCVCC

A A

09/03/31 HP

22U_0805_6.3V6M

C240

1

2

1U_0402_6 .3V4Z

C235

1

2

+VCCRTCEXT

1U_0402_6 .3V4Z

C254

1

2

+VCCSST

0 .

0 . 2A @ 3 . 3 V

2 A@ 3. 3 V

0 .0 .

2 A@ 3. 3 V2 A@ 3. 3 V

0 .

0 . 4A @ 3 . 3 V

4 A@ 3. 3 V

0 .0 .

4 A@ 3. 3 V4 A@ 3. 3 V

0 .

0 . 1A @ 1 . 1 V

1 A@ 1. 1 V

0 .0 .

1 A@ 1. 1 V1 A@ 1. 1 V

0.1U_0402 _10V6K

4.7U_0603 _6.3V6K
C268

1

2

2 m

2 m A@ 3 . 3 V

A @3 .3 V

2 m2 m

A @3 .3 VA@ 3 . 3 V

0.1U_0402 _10V6K

22U_0805_6.3V6M

1U_0402_6 .3V4Z

1U_0402_6 .3V4Z

0.1U_0402 _10V6K

C269

1

2

AP51

AP53

AF23

AF24

Y20

AD38

AD39

AD41

AF43

AF41

AF42

V39

V41

V42

Y39

Y41

Y42

V9

AU24

BB51
BB53

BD51
BD53

AH23

AJ35

AH35

AF34

AH34

AF32

V12

Y22

P18

U19

U20

U22

V15

V16

Y16

AT18

AU18

A12

IBEXPEAK-M_FCBGA1071

U4G

1.524A

0.042A

0.035A

6mA

L5

1 2

1U_0402_6 .3V4Z

C264

L6

1 2

C271

1U_0402_6 .3V4Z

Compal Secret Data

POWER

0.069A

CRTLVDS

0.030A

VCC C ORE

0.059A

HVCMO S

DMI

PCI E *

0.156A

NAND / SPI

0.085A

FDI

+V1.05S_VC CA_A_DPL

1

1

+

2

2

+V1.05S_VC CA_B_DPL

1

1

+

2

2

Deciphered Date

2

VCCADAC[1]

VCCADAC[2]

VSSA_DAC[1]

VSSA_DAC[2]

VCCALVDS

VSSA_LVDS

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

VCC3_3[2]

VCC3_3[3]

VCC3_3[4]

VCCVRM[2]

VCCDMI[1]

0.061A

VCCDMI[2]

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]

C265
220U_B2_2. 5VM_R15

C270
220U_B2_2. 5VM_R15

AE50

AE52

AF53

AF51

AH38

AH39

AP43
AP45
AT46
AT45

AB34

AB35

AD35

AT24

AT16

AU16

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

AM8
AM9
AP11
AP9

12

AB24

10U_0603_6.3V6M

VCCCORE[1]

AB26

VCCCORE[2]

AB28

VCCCORE[3]

AD26

VCCCORE[4]

AD28

VCCCORE[5]

AF26

VCCCORE[6]

AF28

VCCCORE[7]

AF30

VCCCORE[8]

AF31

VCCCORE[9]

AH26

VCCCORE[10]

AH28

VCCCORE[11]

AH30

VCCCORE[12]

AH31

VCCCORE[13]

AJ30

VCCCORE[14]

AJ31

VCCCORE[15]

AK24

VCCIO[24]

BJ24

VCCAPLLEXP

AN20

VCCIO[25]

AN22

VCCIO[26]

AN23

VCCIO[27]

AN24

VCCIO[28]

AN26

VCCIO[29]

AN28

VCCIO[30]

BJ26

VCCIO[31]

BJ28

VCCIO[32]

AT26

VCCIO[33]

AT28

VCCIO[34]

AU26

VCCIO[35]

AU28

1U_0402_6 .3V4Z

VCCIO[36]

AV26

VCCIO[37]

AV28

VCCIO[38]

AW26

VCCIO[39]

AW28

VCCIO[40]

BA26

VCCIO[41]

BA28

VCCIO[42]

BB26

VCCIO[43]

BB28

VCCIO[44]

BC26

VCCIO[45]

BC28

10U_0603_6.3V6M

VCCIO[46]

BD26

VCCIO[47]

BD28

VCCIO[48]

BE26

VCCIO[49]

BE28

VCCIO[50]

BG26

VCCIO[51]

BG28

VCCIO[52]

BH27

VCCIO[53]

AN30

VCCIO[54]

AN31

VCCIO[55]

AN35

VCC3_3[1]

AT22

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

VCCIO[1]

IBEXPEAK-M_FCBGA1071

10UH_LB201 2T100MR_20%_0805

10UH_LB201 2T100MR_20%_0805

2008/10/31 2009/11/06

+3VS

R264

@

0_0603_5%

R270

100_0402_1%

09/02/03 HP

0.01U_040 2_16V7K

10U_0603_6.3V6M

C229

C266

C231

1

1

2

2

C948

0.01U_040 2_16V7K

C947

0.01U_040 2_16V7K

1

1

2

2

1 2

C239 0.1U_040 2_10V6K

+1.8VS

+VCCP

1 2

C246 1U_0603_1 0V4Z

+V_NVRAM_VCC Q

0.1U_0402 _10V6K

C251

1

2

+3VS

0.1U_0402 _10V6K

C260

1

2

21

D4

CH751H-4 0PT_SOD323-2

1 2

1

C273
1U_0402_6 .3V4Z

2

Title

Size Docu ment Numbe r Re v

Cust om

Date: Sheet o f

L45

MURATA_BLM18 AG601SN1D_0603

0.1U_0402 _10V6K

1

2

+3VS

0.1UH_MLF1 608DR10KT_10%

C949

22U_0805_6.3V6M

1

2

09/02/ 02 In tel request

ICH_ V5REF_SUS

Compal Electronics, Inc.

IBEX-M(5/6)-PWR

LA -4 892 P

12

L47

1 2

100_0402_1%

R271

+3VS

+1.8VS

+5VS +3VS+3VALW+5VALW

21

D5

CH751H-4 0PT_SOD323-2

1 2

ICH_ V5REF _RUN

20 m ils20 m ils

1

C274
1U_0402_6 .3V4Z

2

1

17 45F rida y, May 15, 2009

0.3

5

4

3

2

1

U4I

AY7

VSS[159]

B11

VSS[160]

B15

VSS[161]

B19

VSS[162]

B23

VSS[163]

B31

VSS[164]

B35

VSS[165]

B39

VSS[166]

B43

VSS[167]

B47

D D

C C

B B

BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49

BC10
BC14
BC18

BC22
BC32
BC36
BC40
BC44
BC52

BD48
BD49

BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50

BF49
BF51
BG18
BG24

BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47

AF39

VSS[168]

B7

VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]

BB5

VSS[180]
VSS[181]
VSS[182]
VSS[183]

BC2

VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]

BH9

VSS[191]
VSS[192]
VSS[193]

BD5

VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]

BE6

VSS[206]

BE8

VSS[207]

BF3

VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]

BG4

VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]

BH7

VSS[224]

C12

VSS[225]

C50

VSS[226]

D51

VSS[227]

E12

VSS[228]

E16

VSS[229]

E20

VSS[230]

E24

VSS[231]

E30

VSS[232]

E34

VSS[233]

E38

VSS[234]

E42

VSS[235]

E46

VSS[236]

E48

VSS[237]

E6

VSS[238]

E8

VSS[239]

F49

VSS[240]

F5

VSS[241]

G10

VSS[242]

G14

VSS[243]

G18

VSS[244]

G2

VSS[245]

G22

VSS[246]

G32

VSS[247]

G36

VSS[248]

G40

VSS[249]

G44

VSS[250]

G52

VSS[251]
VSS[252]

H16

VSS[253]

H20

VSS[254]

H30

VSS[255]

H34

VSS[256]

H38

VSS[257]

H42

VSS[258]

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

U4H

AB16

VSS[0]

AA19

VSS[1]

AA20

VSS[2]

AA22

VSS[3]

AM19

VSS[4]

AA24

VSS[5]

AA26

VSS[6]

AA28

VSS[7]

AA30

VSS[8]

AA31

VSS[9]

AA32

VSS[10]

AB11

VSS[11]

AB15

VSS[12]

AB23

VSS[13]

AB30

VSS[14]

AB31

VSS[15]

AB32

VSS[16]

AB39

VSS[17]

AB43

VSS[18]

AB47

VSS[19]

AB5

VSS[20]

AB8

VSS[21]

AC2

VSS[22]

AC52

VSS[23]

AD11

VSS[24]

AD12

VSS[25]

AD16

VSS[26]

AD23

VSS[27]

AD30

VSS[28]

AD31

VSS[29]

AD32

VSS[30]

AD34

VSS[31]

AU22

VSS[32]

AD42

VSS[33]

AD46

VSS[34]

AD49

VSS[35]

AD7

VSS[36]

AE2

VSS[37]

AE4

VSS[38]

AF12

VSS[39]

Y13

VSS[40]

AH49

VSS[41]

AU4

VSS[42]

AF35

VSS[43]

AP13

VSS[44]

AN34

VSS[45]

AF45

VSS[46]

AF46

VSS[47]

AF49

VSS[48]

AF5

VSS[49]

AF8

VSS[50]

AG2

VSS[51]

AG52

VSS[52]

AH11

VSS[53]

AH15

VSS[54]

AH16

VSS[55]

AH24

VSS[56]

AH32

VSS[57]

AV18

VSS[58]

AH43

VSS[59]

AH47

VSS[60]

AH7

VSS[61]

AJ19

VSS[62]

AJ2

VSS[63]

AJ20

VSS[64]

AJ22

VSS[65]

AJ23

VSS[66]

AJ26

VSS[67]

AJ28

VSS[68]

AJ32

VSS[69]

AJ34

VSS[70]

AT5

VSS[71]

AJ4

VSS[72]

AK12

VSS[73]

AM41

VSS[74]

AN19

VSS[75]

AK26

VSS[76]

AK22

VSS[77]

AK23

VSS[78]

AK28

VSS[79]

IBEXPEAK-M_FCBGA1071

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

+3VS

12

R179

100K_0402_5%

PCH_NC TF616

R178

100K_0402_5%

PCH_NC TF716

R234

100K_0402_5%

PCH_NCT F1916

R88

100K_0402_5%

PCH_NCT F2616

+3VS

+3VS

+3VS

2

12

5

12

2

12

5

61

Q4A
2N7002DW T/R7_SOT-363-6

CRACK _BGA

3

Q4B
2N7002DW T/R7_SOT-363-6

4

CRACK _BGA

61

Q5A
2N7002DW T/R7_SOT-363-6

CRACK _BGA

3

Q5B
2N7002DW T/R7_SOT-363-6

4

CRACK_B GA 30

BGA Ball Cracking Prevention and Detection

A A

5

IBEXPEAK-M_FCBGA1071

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

2

Title

Size Docu ment Numbe r Re v

Cust om

Date: Sheet

Compal Electronics, Inc.

IBEX-M(6/6)-GND

LA -4 892 P

1

of

18 45S aturd ay, May 16, 2009

0.3

5

4

3

2

1

+1.8VS

12

22U_0805_6.3V6M

C729

1

2

NV_CE0#

NV_CE1#

NV_CE2#

NV_CE3#

TP_NV_CK_0#

TP_NV_CK_1#

TP_NV_WP0#

TP_NV_VR EF

MB_DP_HPD #15

TP_NV_DOS_0#

TP_NV_DOS_1#

TP_NV_RF U_1
TP_NV_RF U_2
TP_NV_RF U_3
TP_NV_RF U_4

09/04/23 HP

T119PAD

NV_DQS0 16

T114PAD

NV_DQS1 16

T117PAD
T120PAD
T112PAD
T115PAD

NV_CE0# 16

NV_CE1# 16

NV_CE2# 16

NV_CE3# 16

T118PAD

NV_WE# _CK0 16

T111PAD

NV_WE# _CK1 16

NV_RB# 16

T116PAD

T121PAD

+5VS

2

61

Q85A
2N7002DW T/R7_SOT-363-6

R897 0_ 0402_5%

1 2

CONN @

P-TW O_121056-22251_NR

CONN @

JODD 1

SANTA_202001-1_13P-T

MB_DP_ HPD_CONN#

VCC_11VCC_22VCC_33VCC_440VCC_541VCC_6

+V_NVRAM_VCC Q+3.3V_NVR AM+3VS

42

CK_0/WE_0 #

CK_1/WE_1 #

R684 0_0603_5%

78

VCCQ_138VCCQ_239VCCQ_3

9

DOS_0#

10

DOS_0

31

DOS_1#

32

DOS_1

15

RFU_1

16

RFU_2

63

RFU_3

64

RFU_4

24

CE_0#

25

CE_2#

22

CE_1#

61

CE_3#

4

CE_4#

43

CE_6#

37

CE_5#

76

CE_7#

48

CK_0#

49
70

CK_1#

71

54

R/B#

55

WP#

77

VREF

44

VSS_13

47

VSS_14

50

VSS_15

53

VSS_16

56

VSS_17

59

VSS_18

62

VSS_19

65

VSS_20

66

VSS_21

69

VSS_22

72

VSS_23

75

VSS_24

80

GND

Braidwood

D D

NV_DQ016
NV_DQ116
NV_DQ216
NV_DQ316
NV_DQ416
NV_DQ516
NV_DQ616
NV_DQ716
NV_DQ816

NV_DQ916
NV_DQ1016
NV_DQ1116
NV_DQ1216
NV_DQ1316
NV_DQ1416
NV_DQ1516

NV_CLE16

C C

09/02/13 HP

NV_ALE16

NV_RE#_W R#116
NV_RE#_W R#016

NAND_DET #13

NV_CL E

NV_ALE

NAND_D ET#

12

R686 0_0603_5%

150U_B2_6.3VM_R35M

1

C724

+

JP14

2

6

DQ0

7

DQ1

45

DQ2

46

DQ3

12

DQ4

13

DQ5

51

DQ6

52

DQ7

28

DQ8

29

DQ9

67

DQ10

68

DQ11

34

DQ12

35

DQ13

73

DQ14

74

DQ15

18

CLE_0

57

CLE_1

19

ALE_0

58

ALE_1

60

W/R_1#/RE _1#

21

W/R_0#/RE _0#

5

VSS_1

8

VSS_2

11

VSS_3

14

VSS_4

17

VSS_5

20

VSS_6

23

VSS_7

26

VSS_8

27

VSS_9

30

VSS_10

33

VSS_11

36

VSS_12

79

GND

NVRAM Co nnector

+3VS

21

Display port Connector

B B

D41

@

SDM10U4 5-7_SOD523-2

0_1206_5%

R839

1 2

+DPB_3V

SATA HDD CONN.

JHD D1

1

Reserved

GND

A+

A-

GND

B-

B+

GND

V33
V33

V33
GND
GND
GND

V5
V5
V5

GND

GND

V12

V12

V12
GND
GND

2
3
4
5
6
7

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0

SATA_PRX_C_DTX_N0
SATA_PRX_C_DTX_P0

+5VS

SATA ODD CONN.

1

GND

A+

A-

GND

B-

B+

GND

DP

V5
V5

MD
GND
GND
GND
GND

SATA_PTX_C_DRX_P1

2

SATA_PTX_C_DRX_N1

3
4

SATA_PRX_C_DTX_N1 SATA_PRX_DTX_N1

5
6

7
8
9
10
11
12
13
14
15

+5VS

12/03 HP

lace ca ps. ne ar HDD CONN.

P

+5VS

Placea caps. near HDD CO NN.

0.1U_0402 _10V6K

1U_0603_1 0V4Z

C383

C398

1

1

2

2

Place c aps. near ODD CON N.

09/02/13 HP

T143PAD

1

2

1 2
1 2

1 2
1 2

10U_0805_10V4K

1 2
1 2

1 2
1 2

C738

C7330.01U_040 2_16V7K
C7340.01U_040 2_16V7K

C7370.01U_040 2_16V7K
C3970.01U_040 2_16V7K

10U_0805_10V4K

1

2

C3770.01U_040 2_16V7K
C7300.01U_040 2_16V7K

C7320.01U_040 2_16V7K
C3850.01U_040 2_16V7K

SATA_PTX_DRX_P0
SATA_PTX_DRX_N0

SATA_PRX_DTX_N0
SATA_PRX_DTX_P0

C384

SATA_PTX_DRX_P1
SATA_PTX_DRX_N1

SATA_PRX_DTX_P1SATA_PRX_C_DTX_P1

SATA_PTX_DRX_P0 13
SATA_PTX_DRX_N0 13

SATA_PRX_DTX_N0 13
SATA_PRX_DTX_P0 13

SATA_PTX_DRX_P1 13
SATA_PTX_DRX_N1 13

SATA_PRX_DTX_N1 13
SATA_PRX_DTX_P1 13

+5VS

Placea caps. near ODD C ONN.

10U_0805_10V4K

0.1U_0402 _10V6K

0.1U_0402 _10V6K

C376

C735

1

2

C736

1

2

1

1

2

2

0.1U_0402 _10V6K

C731

+DPD_ VCC

21

@

NANO SMDC050F 0.5A 13.2V PO LY-FUSE

12/19 HP

MB_DP_AUXN_ CONN15

A A

12

R842

5.1M_0402_5%

MB_DP_AUXP_CO NN15

MB_DP_TXN315

MB_DP_TXP315

R843

1 2

MB_DP_TXN215

MB_DP_TXP215

1M_0402_5%

MB_DP_TXN115

MB_DP_TXP115
MB_DP_TXN015

MB_DP_TXP015

5

F2

MB_DP_ HPD_CONN#

MB_DP_ DCAD

1

0_1206_5%

C904

R840

2

1 2

0.01U_040 2_16V7K

R_MB_DP_TXN3

C9080.1U_0402 _16V4Z

12

R_MB_DP_TXP3

C9090.1U_0402 _16V4Z

12

R_MB_DP_TXN2

C9100.1U_0402 _16V4Z

12

R_MB_DP_TXP2

C9110.1U_0402 _16V4Z

12

R_MB_DP_TXN1

C9120.1U_0402 _16V4Z

12

R_MB_DP_TXP1

C9130.1U_0402 _16V4Z

12

R_MB_DP_TXN0

C9140.1U_0402 _16V4Z

12

R_MB_DP_TXP0

C9150.1U_0402 _16V4Z

12

12/03 HP

1

C905

12

2

10U_0805_ 10V4Z

R841

@

100K_0402_5%

4

12/05 HP

JDP1

20

DP_PWR

19

RTN

18

HP_DET

17

AUX_CH-

16

GND

15

AUX_CH+

14

GND

13

CA_DET

12

LAN3-

11

LAN3_shield

10

LAN3+

9

LAN2-

8

LAN2_shield

7

LAN2+

6

LAN1-

5

LAN1_shield

4

LAN1+

3

LAN0-

2

LAN0_shield

1

LAN0+

MOLEX_105020-0001_20P-T

09/01/15 HP

+5VALW +5VALW

12/03 HP

R891
10K_0402_5%

1 2

DP_EN

61

MB_DP_ DCAD

21

GND

22

GND

23

GND

24

GND

R893 0_ 0402_5%

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2N7002DW T/R7_SOT-363-6

2

Q84A

2008/10/31 2009/11/06

DP_EN 15

Compal Secret Data

Deciphered Date

1 2

3

5

4

2

12/03 HP

R892
10K_0402_5%

DDC_ EN 15

2N7002DW T/R7_SOT-363-6
Q84B

12/19

11/22 HP

Title

Size Docu ment Numbe r Re v

Cust om

Date: Sheet o f

Compal Electronics, Inc.

IBEX-M(1/6)-HDA/JTAG/SATA

LA -4 892 P

1

19 45S aturd ay, May 16, 2009

0.3

A

B

C

D

E

CRT Connector

F1

1.1A_ 6VDC_FUSE

1 1

0_0805_5%

0_0805_5%

0_0805_5%

VGA_RE

VGA_GR

VGA_BL

C350

1

2

R472 0_ 0805_5%

1 2

R473 0_ 0805_5%

1 2

R565 0_ 0805_5%

1 2

10P_0402_50V8J@

10P_0402_50V8J@

10P_0402_50V8J@

C342

C343

1

1

2

2

D_DDCD ATA28

D_DD CCLK28

R294

VGA_RED28

VGA_GRN28

VGA_BLU28

+5VS

74AHCT1G125GW _SOT353-5

CRT _HSYNC15

2 2

CRT _VSYNC15

5

A2Y

3

C284

0.1U_0402 _10V6K

1 2

1

U6

P

4

OE#

G

+5VS

C285

0.1U_0402 _10V6K

1 2

HSY NC D_H SYNC

R276 0_ 0402_5%

5

1

U7

P

4

OE#

A2Y

G

74AHCT1G125GW _SOT353-5

3

Pl ac e cloce to U4

L

1 2

VS YNC D_ VSYNC

R278 0_ 0402_5%

1 2

C286

@

5P_0402_50V8C

1

1

C287

@

5P_0402_50V8C

2

2

D_HS YNC & D_ VSYNC

L

shou ld be rou ted to
dock ing conn ector th en
to V GA connecto r

D_H SYNC 28

D_VS YNC 28

1 2

R304

1 2

R318

1 2

R323

150_0402_1%

R334

150_0402_1%

R322

150_0402_1%

1 2

1 2

1 2

D6
CH491D _SC59

21

2 1

1

C277

0.1U_0402 _10V6K

2

VGA_R

D_DD CDATA
VGA_G

VGA_B

D_DD CCLK

1 2

R688 0_0402_5%

1 2

R689 0_0402_5%

+CRTVDD+RCRT_V CC+5VS

W=40 mils

suyin_070 912fr015s20 7cr_15p
JP4

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

+CRTVDD

R279

2.2K_0402_5%

2.2K_0402_5%

12

12

Pl ac e cloce to U4

L

16
17

CONN @

R280

6 1

2N7002DW T/R7_SOT-363-6

Q94A

2

+CRTVDD

VGA_R

+CRTVDD

+CRTVDD

D_ VSYNC

+3VS

R281

2.2K_0402_5%

12

5

3

4

2N7002DW T/R7_SOT-363-6
Q94B

D9

4

VIN

3

GND

IO2

CM1293A-02SR_SOT143-4@

D10

4

VIN

3

IO2

CM1293A-02SR_SOT143-4@

D11

4

VIN

3

IO2

CM1293A-02SR_SOT143-4@

12/20

R277

2.2K_0402_5%

12

2

IO1

1

2

IO1

1

GND

2

IO1

1

GND

CRT_DDC _DATA 15

CRT_ DDC_CLK 15

VGA_G

VGA_B

D_ HSYNC

3 3

DAC_ RED15

DAC_ GRN15

DAC_B LU15

4 4

A

Pl ac e cloce to U4

L

L7

12

12

R273

R274

150_0402_1%

39NH_0805 CS-390XJLC_5%

1 2

L9
39NH_0805 CS-390XJLC_5%

1 2

L11
39NH_0805 CS-390XJLC_5%

1 2

12

R275

150_0402_1%

150_0402_1%

18P_0402_50V8J

1

2

DAC_ RED

DAC_ GRN

DAC _BLU DAC_BL

DAC _RE

DAC _GR

C281

1

2

B

L8
110NH_080 5CS-111XJLC_5%

1 2

L10
110NH_080 5CS-111XJLC_5%

1 2

L12
110NH_080 5CS-111XJLC_5%

1 2

18P_0402_50V8J

18P_0402_50V8J

C283

C282

1

2

RED_R 28

GREEN_ R 28

BLUE_R 28

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

D

Title

Size Docu ment Numbe r Re v

Date: Sheet

Compal Electronics, Inc.

CRT Connector

LA -4 892 P

E

20 45S aturd ay, May 16, 2009

of

0.3

5

4

3

2

1

LCD/PANEL BD. CONN.

09/02/11 HP

D D

INVPWR _B+ +3VS

R898 0_ 0805_5%

DISP_ OFF#

USB20_P1216
USB20_N1216

LVDS_AC LKN15
LVDS_ACLKP15

LVDS_A0N15
LVDS_A0P15
LVDS_A1N15
LVDS_A1P15
LVDS_A2N15
LVDS_A2P15

+LCD VDD

12/05 RF 12/05 RF

+5V_WE BCAM

R287 0_ 0402_5%
R288 0_ 0402_5%

1 2
1 2

1 2

USB20_P12_R

USB20_N 12_R

JLVDS1

CONN @

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30
3231

33

34

35

36

37

38

39

40

41

42

ACES_87216- 4016_40P

WEBCAM_ON
INV_PW M_R

EDID_D ATA
EDID _CLK

09/04/21 HP

11/27 Change the footprint

EDID_DAT A 15
EDID _CLK 15

LVDS_B2P 15
LVDS_B2N 15
LVDS_B1P 15
LVDS_B1N 15
LVDS_B0P 15
LVDS_B0N 15

LVDS_BCLKP 15
LVDS_BC LKN 15

R900 0_ 0402_5%

1 2

1

680P_0402_50V7K
C297

2

INV_PW M 15

DISP_ OFF# ENABLT

1 2

R293 2K_0402_5%

D31

LID_SW #

2 1

CH751H-4 0PT_SOD323-2

12

R286
100K_0402_5%

ENABLT 15

LID_SW # 13 ,25,30

C C

R298

100K_0402_5%

R947 0_ 0402_5%

+LCD VDD

Q95A

12

WEBCAM_O N_PCH16

+5V_WEBCAM

USB20_P12_R

+LCD VDD INVPWR _B+ B+

680P_0402_50V7K

C289

C749

47P_0402_50V8J@

1

12

B B

2

+3VS

C750

47P_0402_50V8J@

12

680P_0402_50V7K

C290

1

2

1 2

R285 0_0805_5%

For C CFL onl y

12

C291

680P_0402_50V7K

D12

4

VIN

3

IO2

CM1293A-02SR_SOT143-4@

USB20_N 12_R

2

IO1

1

GND

09/04/21 HP

2N7002DW T/R7_SOT-363-6

ENAVDD15

Webcam POWER CIRCUIT

1 2

100K_0402_5%

12

WEBCAM_ON

R290

LCD POWER CIRCUIT

0.1U_0402 _10V6K

+LCD VDD

C300

1

2

12

R295
100_0402_1%

61

R297 47K_0 402_5%

2

1 2

1

OUT

2

IN

GND

3

Q19
DTC124 EKAGZT146 NPN SC59-3

Q17

D

S

SI2301CDS- T1-GE3 1P SOT23-3

1 3

G

2

R296 15 0K_0402_1%

C299 0.1U_0402 _10V6K

1

C301

4.7U_0805 _10V4Z

2

+5VS +5V_WEBCAM

0.01U_040 2_16V7K

0.1U_0402 _10V6K

C293

C294

C295

1

1

1

2

2

2

+3VS

+5VS

1

C302

4.7U_0805 _10V4Z

@

2

1 2

1 2

C751

47P_0402_50V8J@

12

4.7U_0805 _10V4Z

09/05/ 14 Compal

09/04/13 HP

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

LCD CONN & Q-Switch & GPIO Ext.

Size Docu ment Numbe r Re v

LA -4 892 P

Date: Sheet

1

of

21 45S aturd ay, May 16, 2009

0.3

5

4

3

2

1

12

R555

10K_0 402_5%

2

PCIE_ PRX_DTX_P 614
PCIE _PRX_DTX_ N614

PCI E_WA KE#1 5,24,2 9

PLT_RS T#4,1 3,16,2 4,27,29

LAN _MDI0P23

LAN _MDI 0N23

LAN _MDI1P23

LAN _MDI 1N23

LAN _MDI2P23

LAN _MDI 2N23

LAN _MDI3P23

LAN _MDI 3N23

1 2

4.7K_ 0402_5 %

8072 @

R43 3

+3V_ LAN

12

LAN_X1

LAN_X2

+3V_ LAN

12

R43 2
10K_0 402_5%

CLK _LAN _REQ#

CLK _LAN _REQ#

PCI E_WA KE#

Remove 8075 @ 09/02/03 HP

LAN _DIS #_D

Remove 8075 @ 09/02/03 HP

09/04/ 23 HP

12

R434

4.7K_ 0402_5%

8072@

C50 60.1U_ 0402_1 0V6K

12

C50 90.1U_ 0402_1 0V6K

12

R43 6 0_04 02_5%

1 2

LAN _EE_C LK
LAN _EE_DA TA

LAN_X1
LAN_X2

1 2

R65 3 0_0 402_5%

+3V_ LAN

+3VS

+3V_ LAN

1 2

R939 0_ 0402_5%8072 @

R919 10 K_0402_5%805 9@

1 2

R43 7 4. 99K_040 2_1%

LAN _DIS#16

2N7 002DW T/R7_SO T-363-6

ADP _PRES29, 30,33,3 5,43

SLP_ S3#15, 29,30, 32,33,3 5,38,39 ,40

2N7 002DW T/R7_SO T-363-6

12

CH7 51H-40P T_SOD323 -2

42
49
50
54
53

55
56

17
18
20
21
26
27
30
31

38
41

34
35
37
36

15
14

10

11
12
47

16

D42

PCI E_RXP2 _LAN
PCI E_RX N2_LAN

Q54A

2

6 1

3

Q54B

5

4

U15

CLKREQn
TX_P
TX_N

PCI-E

RX_P
RX_N

6

WAKEn
REFCLKP
REFCLKN

5

PERSTn

MDIP0
MDIN0
MDIP1
MDIN1

Media

MDIP2
MDIN2
MDIP3
MDIN3

VPD_CLK

EEPROM

VPD_DATA

SPI_DO
SPI_DI

FLASH

SPI_CLK

MEMORY

SPI_CS

XTALI

CLOCK

XTALO

LOM_DISABLEn(USB_DM-)

9

SWITCH_VAUX(USB_DP+)

SWITCH_VCC(LOM_DISABLEn)
VAUX_AVLBL
VMAIN_AVLBL

4

CTRL18

3

CTRL12

Analog

RSET

+3V_ LAN

R23 2
10K_0 402_5%

1 2

21

SI23 01CDS-T1 -GE3 1P SOT23-3

+3VALW

12

R58 6
47K_0 402_5%

47K_0 402_5%

LED

LED_LINK10/100n

LED_LINK1000n

LED_DUPLEXn

TESTMODE

TEST

POWER

&

GROUND

VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL

(PD18LDO)NC

SMALERTn

No Con nect

88E 8072 -NNC1 C000_QFN 64

12/03 HP

LAN _DIS #_D

R58 8

LED_ACTn

AVDDH

AVDD

AVDD

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

EAPD

SMCLK

Reserved
Reserved
Reserved
SMDATA

S

D

Q55

G

2

12

LAN _PWR _EN# 41

09/04 /23 HP

R92 7 0_ 0402_5%8059@

59

R92 8 0_ 0402_5%8072@

60
62

LAN LINK_ STATUS#LANL INK_S TATUS#

LAN LINK_ STATUS#

63

46

8

19
22

NC

23

NC

28

1
40
45
61

2
7
13
33
39
44
48
58

+1.2 V_+1.0V _LAN

65

51

NC

52

NC

32
57
64

24
25
29
43

Remov e 8075 @ 09/02/03 HP

+3V_LAN

13

1 2

C97 0 4 .7U_0 805_10V 4Z

1 2

1 2

R46 5 10K_0 402_5%

1 2

+1. 8V_LAN_ D

+3V_ LAN

+1.2 V_+1.0V_ LAN

LAN _PIN4 8

09/04 /21 HP

+5V ALW

+3V_ LAN+3V ALW

12

R55 6

10K_0 402_5%

CLK _PCI E_LAN_ REQ#16

D D

C C

C52 1 2 7P_0402 _50V8J

25M HZ_20P_ 1BG2500 0CK1A

B B

A A

C52 2 2 7P_0402 _50V8J

C505 0. 1U_0402 _10V6K

8072@

U14

1

CS#

2

SO

3

WP#

4

GND

AT24 C08BN-S H-T

12

12

8072 @

HOLD#

VCC

SCK

12

8
7
6
5

SI

6 1

Q80A
2N7 002DW T/R7_SOT- 363-6

PCIE_ PTX_C_DR X_P614
PCI E_PTX_C_ DRX_N614

CLK _PCI E_LA N_PCH16
CLK _PCI E_LA N_PCH#16

Y5

LAN _EE_C LK
LAN _EE_DA TA

+3V_ LAN

0.1U_ 0402_1 0V6K

1

C51 2

2

0.1U_ 0402_1 0V6K

11/20 HP

+1. 8V_LAN_ D

LAN _ACT# 2 3,28

LAN LINK_ STATUS# 1 6,23,2 8,30

1 2

R92 9 0_04 02_5%8 072@

1 2

R93 0 0_04 02_5%8 059@

1 2

R93 1 0_04 02_5%8 072@

1 2

R93 2 0_04 02_5%8 059@

1 2

R93 3 0_04 02_5%8 059@

1 2

R93 4 0_04 02_5%8 072@

1 2

R93 5 0_04 02_5%8 072@

1 2

R93 6 0_04 02_5%8 059@

1 2

R93 7 0_04 02_5%8 072@

1 2

R93 8 0_04 02_5%8 059@

C531

4.7 U_0805_ 10V4Z

8072@

8072@

1 2

C92 6 1 U_0603 _10V4Z

8072@

1 2

R81 7 75 0_0402 _5%

LAN _PWR _EN#

1

C50 7

2

0.1U_ 0402_1 0V6K

+1. 8V_LAN _D

1

C51 3

2

0.1U_ 0402_1 0V6K

+3V_ LAN

LAN _ACT#

+1. 5VALW

1

2

3

Q80B

5

2N7 002DW T/R7_SOT- 363-6

4

1

C51 0

2

1

2

0.1U_ 0402_1 0V6K

C51 4

0.1U_ 0402_1 0V6K

+3V_ LAN

+1. 8V_LAN_ D

+3V_ LAN

+1.2 V_+1.0V _LAN

+3V_ LAN

+1.2 V_+1.0V _LAN

+3V_ LAN

+1.2 V_+1.0V _LAN

+1. 8V_LAN_ D

+1.2 V_+1.0V _LAN

1

1

C51 1

C50 8

0.1U _0402_ 10V6K

2

2

LAN _PIN4 8

U4 4

VIN3VOUT

2

5

G96 9A-25 ADJP81U _MSOP8

8072 @

VPP

GND/HS

GND/HS

GND/HS6GND/HS

ADJ

+1.2 V_+1.0V _LAN

0.1U _0402_ 10V6K

1

1

C52 3

C52 4

2

2

0.1U_ 0402_1 0V6K

+1.2 V_+1.0V _LAN

0.1U_ 0402_1 0V6K

1

1

C52 8

C52 7

2

2

0.1U_ 0402_1 0V6K

+1. 8V_LAN _D +1.8V_L AN

1 2

R94 0 0_ 0402_5%8072@

1 2

C952 4. 7U_080 5_10V4 Z

Close as p ossibl e to Pin 58

+1.2 V_+1.0V_ LAN

4

1

7

8

8072@

12

C53 2 10 U_0805 _10V4K

8072@

1 2

R81 8 10 K_0402_ 5%

8072@

1 2

R81 9 20 K_0402_ 1%

1

C52 5

2

0.1U_ 0402_1 0V6K

1

C52 9

2

0.1U_ 0402_1 0V6K

12

R94 10_08 05_5%80 72@

1

C52 6

0.1U _0402_ 10V6K

2

1

C53 0

0.1U _0402_ 10V6K

2

+1.2 V_+1.0V _LAN

+1.2 V_+1.0V _LAN

+1. 2V _+1.0V_LAN:
807 2: 1.2V
805 9: 1.0V

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Giga LAN 88E805

Giga LAN 88E8059/88E807

Giga LAN 88E805

Title

Size Do cumen t Nu mber R ev

Dat e: Shee t o f

Giga LAN 88E805

LA - 48

LA - 48 92 P

LA - 48L A -4 8

92 P

92 P9 2P

1

9/88E8072

9/88E8072

9/88E8072

2

22 45Sat urda y, M ay 16 , 2009

0.3

5

4

3

2

1

LAN_MDI0P22

LAN_MDI0 N22

LAN_MDI1P22
LAN_MDI1 N22

LAN_MDI2P22

R282
0_0603_5%

LAN_MDI2 N22

LAN_MDI3P22
LAN_MDI3 N22

D D

+1.8V_LAN

11/20 HP

1 2

1 2

C540

0.1U_0402 _10V6K

C C

09/04/29 HP

B B

1 2

C971

1U_0402_6 .3V4Z

1 2

C543

0.1U_0402 _10V6K

1 2

C545

0.1U_0402 _10V6K

1 2

C547

0.1U_0402 _10V6K

LAN_MDI0 P
LAN_ MDI0N

LAN_MDI1 P
LAN_ MDI1N

LAN_MDI2 P
LAN_ MDI2N

LAN_MDI3 P
LAN_ MDI3N

LAN_ MDI0N

LAN_MDI0 P

TRM_CT

LAN_ MDI1N

LAN_MDI1 P

TRM_CT

LAN_ MDI2N

LAN_MDI2 P

TRM_CT

LAN_ MDI3N

LAN_MDI3 P MDO3+

TRM_CT

12

11

10

9

8

7

6

5

4

3

2

1

U35

TD4-

TD4+

TCT4

TD3-

TD3+

TCT3

TD2-

TD21+

TCT2

TD1-

TD1+

TCT1

NS892402 1G

MDO0-

13

MX4-

MDO0+

1:1

1:1

1:1

1:1

MX4+

MCT4

MX3-

MX3+

MCT3

MX2-

MX2+

MCT2

MX1-

MX1+

MCT1

14

MCT0

15

MDO1-

16

MDO1+

17

MCT1

18

MDO2-

19

MDO2+

20

MCT2

21

MDO3-

22

23

MCT3

24

11/11 HP

MDO0- 28

MDO0+ 28

C541 0.01U_040 2_16V7K

1 2

MDO1- 28

MDO1+ 28

C544 0.01U_040 2_16V7K

1 2

MDO2- 28

MDO2+ 28

C546 0.01U_040 2_16V7K

1 2

MDO3- 28

MDO3+ 28

C548 0.01U_040 2_16V7K

1 2

R444

75_0402_1%

1 2

R446

75_0402_1%

1 2

R447

75_0402_1%

1 2

R448
75_0402_1%

1 2

C549

1 2

1000P_1808_3KV7K

+V_3P3_LAN _LED

16

9

10

15

LANLINK_ST ATUS#

LAN_ACT#

2

3

D39
PJDLC05_SOT 23-3

+3V_LAN

R519

10K_0402_5%

12

2

1

CB_IN # 16

C719

0.1U_0402 _10V6K@

Fix CB _IN# can't work 09/01/06

+3V_LAN

1

2

0.1U_0402 _10V6K

C943

11/25 HP

R457

10K_0402_5%

12

JP5

MDO3-

MDO3+

MDO1-

MDO2-

MDO2+

MDO1+

MDO0-

MDO0+

13

Yellow LED+

14

Yellow LED-

8

PR4-

DETECT PIN1

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

DETCET PIN2

1

PR1+

11

Green LED+

12

Green LED-

FOX_JM361 1A-P1123-7HC

SHLD1

SHLD1

LAN_ACT#22,28

LAN_ACT#

1 2

LANLINK_ST ATUS#16,22,28,30

LANLINK_ST ATUS#

1 2

+3V_LAN +V_3P3_LAN_LED

+V_3P3_LAN _LED

R442 30 0_0402_5%

1 2

C539680P_04 02_50V7K@

+V_3P3_LAN _LED

R445 30 0_0402_5%

1 2

C542680P_04 02_50V7K@

09/04/09 HP

20 m il

1 2

R471 0_0402_5%

1

11/19 ESD

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

2

Title

Size Docu ment Numbe r Re v

Date: Sheet o f

Compal Electronics, Inc.

Magnetic & RJ45

LA -4 892 P

1

23 45S aturd ay, May 16, 2009

0.3

A

CONN @

+3V_WW AN

DAN217T 146_SC59-3@

4.7U_0805 _10V4Z
C564

1

2

+3V_WW AN

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

+3V_WW AN

3

1

2

0.1U_0402 _10V6K

WWAN

1 1

09/01/23 HP

T92 P AD
T93 P AD

11/07 HP

+3V_WW AN

T94 P AD

U17

1

6

CH1

CH4

2

5

Vn

Vp

4

CH23CH3

S DIO(BR) NUP4301MR6T 1 TSOP-6@

JP8

4

12

UIM_PW R

GND

5

VPP

6

I/O

7

DET

TAITW _PMPAT6-06GLBS7N14N0CONN @

2 2

UIM_VPP
UIM_DATA

R467

47K_0402_5%

@

3 3

VCC
RST
CLK

GND
GND

JP6

112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152

GND153GND2

FOXCONN AS0B226-S40N- 7F 52P

UIM_PW R

1

UIM_RST

2

UIM_CL K

3

18P_0402_50V8J

1

C562

C563

2

8

1

9

2

@

MC1_DISABL E30

D15

UIM_PW R
UIM_DATA
UIM_CL K
UIM_RST
UIM_VPP

M_WXMIT_OFF#

WW AN_DET#

WW _LED#

WW AN_TRANSMIT_OFF#16

R942
10K_0402_5%

1 2

1 2

R885
220K_0402_1%

0.1U_0402 _10V6K

09/04/29 HP

B

09/05/13 HP

11/22 HP

+3V_WW AN

C550

39P_0402_50V8J

C551

39P_0402_50V8J

C552

39P_0402_50V8J

1

1

1

2

2

2

11/20 HP

WW AN_DET# 16

2009/03/31 HP

C645

+3VALW

11/07 HP

USB20_N9 16
USB20_P9 16

WW _LED# 29

1

2

D14

CH751H-4 0PT_SOD323-2

+3VALW

S

G

SI2305BDS_SOT23

2

7W

D

Q87

1 3

R918 0_0805_5%

+3V_WW AN

1 2

0.01U_040 2_16V7K

C559

1

2

M_WXMIT_OFF#

21

@

C560

1

2

+3V_WW AN

0.1U_0402 _10V6K
C561

1

2

4.7U_0805 _10V4Z

+3VS

C

WLAN

CLK_ PCIE_MCARD_ PCH14

CLK_ PCIE_MCARD_PC H#14

PCIE_PRX_DTX_N414
PCIE_PRX_DTX_P414

PCIE_PTX_C _DRX_N414
PCIE_PTX_C_DRX_P414

MC2_DISABL E30

C557

+3VALW

0.01U_040 2_16V7K
C558

1

1

2

2

+3VALW

09/04/23 HP

+3V_WLAN

0.1U_0402 _10V6K

4.7U_0805 _10V4Z

C554

C555

1

2

PCIE_WAK E#15,22, 29

CLKREQ_W LAN#14

R461 0_ 0402_5%

1 2

R462 0_ 0402_5%

1 2

10K_0402_5%

12

R469

R470

1 2

220K_0402_1%

0.1U_0402 _10V6K

+1.5VS

0.01U_040 2_16V7K@

0.1U_0402 _10V6K@

4.7U_0805 _10V4Z@

C553

C556

1

1

1

2

2

2

R750 10K_0 402_5%@

1 2

R459

1 2

10K_0402_5%

09/01/13 Port80 Delete

+3V_WLAN

@

C928

+3VALW

1

2

G

2

PCIE_C_ RXN4
PCIE_C_R XP4

T95 P AD

S

D

1 3

D

PCIE_W AKE#

Q32
SI2301CDS- T1-GE3 1P SOT23-3

JP7

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

FOXCONN AS0B226-S40N- 7F 52P

CONN @

+3V_WLAN

5W

09/01/13 Port80 Delete

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

XMIT_D_OFF#

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

WL_LED#

44

44

46

46

48

48

50

50

52

52

54

GND2

XMIT_D_OFF#

Add to prev ent l eakage i ssue.

2 1

D16 CH751H-4 0PT_SOD323-2

PLT_RST# 4,13,16,22,2 7,29

USB20_N6 16
USB20_P6 16

09/02/02 HP

WL_LED# 29

E

+3V_WLAN

+1.5VS

WLAN_T RANSMIT_OFF# 16

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

D

Title

Size Docu ment Numbe r Re v

Date: Sheet

Compal Electronics, Inc.

WWAN/NAND mini

LA -4 892 P

E

of

24 45S aturd ay, May 16, 2009

0.3

CAP SWITCH BOARD.

+3VL +3VS +V REG3_51125 +3VS+VREG3_51125

R480 5.1K_0402_5%

R479 5.1K_0402_5%

12

12

CAP_RST_ EC30

R681 0_0402_5%

CAP_CLK14,30
CAP_DAT14,30
CAP_INT30

1 2

R682 0_0402_5%

1 2

R683 0_0402_5%

1 2

R481

10K_0402_5%

12

EMI

2

2

C588

C644

1

1

@

@

10P_0402_50V8J

10P_0402_50V8J

WL/BT _LED#29

2

1

STB_LED#28,29
ON/O FF#28
LID_SW #13,21,30

C587

@

10P_0402_50V8J

MDC 1.5 Conn.

JP13

ACES 88021 -12011 12PCONN @

1

1

3

3

5

5

7

7

9

9
11

GND13GND14GND15GND16GND17GND

10
12

18

11

1 2

1 2

HDA_SDO UT_MDC

HDA_ SYNC_ MDC
HDA_ SDIN1_MDC

09/01/15 HP

HDA_SDOU T_MDC13

HDA_ SYNC_MDC13
HDA_ SDIN113

HDA_RST# _MDC13

R482 33_0402_5%

R908 0_ 0402_5%

CAP_C LK_R
CAP_DAT_R
CAP_INT _R

STB_LED# STB_LED#

LID_SW # L ID_SW#

+3VS

2

2

4

4

6

6

8

8

10
12

R483 0_0402_5%

1 2

1 2

C586

10P_0402_50V8J@

12/01 For HDA

09/02/14 HP

JP11

1

2

1

2

3

4

3

4

5

6

5

6

7

8

7

8

9

10

9

10

11

12

11

12

13

14

13

14

15

16

15

16

17

18

17

18

19

20

19

20

21

22

21

22

23

24

23

24

ACES 85203 -12021 12P P1.0

CONN @

HDA_BIT_ CLK_MDC 13

CAP_RST_ EC
WL/BT _LED#

CAP_C LK_R
CAP_DAT_R
CAP_INT _R

ON/ OFF#ON/OFF#

12/01 For HDA

INT_KBD CONN.

KSO[0.. 13]30

KSI[0 ..7]30

KSO11
KSO0
KSO2
KSO5
KSI_D_1 4
KSI_D_8
KSI_D_1 2
KSI_D_1 0
KSI_D_0
KSI_D_4
KSI_D_2
KSI_D_1
KSI_D_3
KSO3
KSO8
KSO4
KSO7
KSO6
KSO10
KSO1
KSI_D_5
KSI_D_6
KSI7

+3VS

C583

1000P_0402_50V7K

C585

4.7U_0805 _10V4Z

C584

0.1U_0402 _10V6K

1

2

1

1

2

2

@

KSI_D_1 3
KSI_D_1 1

KSO9
KSO12
KSO13

JP12

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

61

GND1

62

GND2

HIROSE FH12HP-30S- 1SV 55 30PCONN @

KSI0

1

KSI1

1

KSI2

1

KSO[0 ..13]

KSI[0 ..7]

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

54

56

56

58

58

60

60

63

GND3

64

GND4

D17

KSI_D_0

2

KSI_D_8

3

DAP202U_SOT323-3
D19

KSI_D_1

2

KSI_D_9

3

DAP202U_SOT323-3
D21

KSI_D_2

2

KSI_D_1 0

3

DAP202U_SOT323-3

KSO11
KSO0
KSO2
KSO5
KSI_D_1 4
KSI_D_8
KSI_D_1 2
KSI_D_1 0
KSI_D_0
KSI_D_4
KSI_D_2
KSI_D_1
KSI_D_3
KSO3
KSO8
KSO4
KSO7
KSO6
KSO10
KSO1
KSI_D_5
KSI_D_6
KSI7
KSI_D_1 3
KSI_D_1 1
KSI_D_9
KSO9
KSO12
KSO13

KSI3

KSI4

KSI5

KSI6

1

1

1

1

KSO11
KSO0
KSO2
KSO5

KSI_D_0
KSI_D_4
KSI_D_2
KSI_D_1

KSO7
KSO6
KSO10
KSO1

KSO13

D18

KSI_D_3

2

KSI_D_1 1

3

DAP202U_SOT323-3
D20

KSI_D_4

2

KSI_D_1 2

3

DAP202U_SOT323-3
D22

KSI_D_5

2

KSI_D_1 3

3

DAP202U_SOT323-3
D23

KSI_D_6

2

KSI_D_1 4

3

DAP202U_SOT323-3

CP1

@

81

2

7

3

6

4 5

100P_1206_ 8P4C_50V8K

CP3

@

81

2

7

3

6

4 5

100P_1206_ 8P4C_50V8K

CP5

@

81

2

7

3

6

4 5

100P_1206_ 8P4C_50V8K

1 2

C756
100P_0402_50V8J@

11/11 HP

KSI_D_1 4
KSI_D_8

2

KSI_D_1 2

3

KSI_D_1 0

4 5

100P_1206_ 8P4C_50V8K

KSI_D_3
KSO3

2

KSO8

3

KSO4

4 5

100P_1206_ 8P4C_50V8K

KSI_D_5
KSI_D_6

2

KSI7

3

KSI_D_1 3

4 5

100P_1206_ 8P4C_50V8K

KSI_D_1 1KSI_D_9
KSI_D_9

2

KSO9

3

KSO12

4 5

100P_1206_ 8P4C_50V8K

CP2

@

81
7
6

CP4

@

81
7
6

CP6

@

81
7
6

CP7

@

81
7
6

Power button

ON/ OFF#

1 2

R486
47_0402_5%

C591
1U_0603_1 0V4Z

+3VL

12

R484
100K_0402_5%

1

2

ON/OFF BTN_KBC# 30

D25

21

CH751H-4 0PT_SOD323-2

1 2

R487 100K_0402_5%@

+3VALW

ON/OFF BTN# 15

TrackPoint CONN.

JP16

1

+5VS

SP_CLK30

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

221

3

443

5

665

7

887

9

G1

G2

11

G3

G4

ACES_87153- 08011

10
12

09/03/ 31 Up date Pin Out

+5VS

SP_DATA 30

1

C589

0.1U_0402 _10V6K

2

Title

Size Docu ment Numbe r Re v

Date: Sheet o f

Compal Electronics, Inc.

MDC/KBD/ON_OFF/LID

LA -4 892 P

25 45S aturd ay, May 16, 2009

0.3

5

4

USB_VC CA+5VALW

3

2

1

+5VALW

4.7U_0805 _10V4Z

SLP_S4

SLP_S4

4.7U_0805 _10V4Z

SLP_S4

C593

+5VALW

C598

4.7U_0805 _10V4Z@

+5VALW

C773

D D

C C

B B

A A

SLP_S429,33

U20

1

GND

2

IN

3

IN

4

EN#

1

G548A2P8U_MSOP8

(2A,10 0mils ,Via NO.=4)

2

USB_VC CA USB_VC CB

U21

1

GND

2

IN

3

IN

4

EN#

1

G548A2P8U_MSOP8@

(2A,10 0mils ,Via NO.=4)

2

U37

1

GND

2

IN

3

IN

4

EN#

1

G548A2P8U_MSOP8

(2A,10 0mils ,Via NO.=4)

2

8

OUT

7

OUT

6

OUT

5

OC#

J1

2 1

PAD-SHO RT 2x2m

8

OUT

7

OUT

6

OUT

5

OC#

8

OUT

7

OUT

6

OUT

5

OC#

R488
10K_0402_5%

1 2

W=100mils

150U_B2_6.3VM_R35M

0.1U_0402 _10V6K

1

1

+

C592

2

R491

@

10K_0402_5%

1 2

W=100mils

150U_B2_6.3VM_R35M

1

+

C599

@

2

+5VALW USB_ VCCC

R790
10K_0402_5%

1 2

W=100mils

150U_B2_6.3VM_R35M

1

+

C774

2

1

C594

C595

2

2

USB_VC CB+5VALW

0.1U_0402 _10V6K@

1

1

C601

C600

2

2

0.1U_0402 _10V6K

1

1

C775

C776

2

2

USB20_N016

1000P_0402_50V7K

USB20_P016

09/02/10 HP

USB20_N316

1000P_0402_50V7K@

USB20_P316

D27

1

I/O1

2

1

2

REF1

I/O23I/O3

PJUSB208_SOT23-6@

D40

I/O1

REF1

I/O23I/O3

PJUSB208_SOT23-6@

USB20_P3 USB20_N 3

09/02/10 HP

USB20_N116

1000P_0402_50V7K

USB20_P116

USB20_P1 USB20_N 1

REF2

I/O4

1

2

I/O4

REF2

1
2
3
4
5
6
7
8

SUYIN_02 0167MR004S511ZR _4PCO NN@

D26

I/O1

REF1

I/O23I/O3

PJUSB208_SOT23-6@

1
2
3
4
5
6
7
8

SUYIN_02 0167MR004S511ZR _4PCO NN@

6

5

4

1
2
3
4
5
6
7
8

6

5

4

JP17

REF2

SUYIN_02 0167MR004S511ZR _4PCO NN@

JP29

1
2
3
4
GND
GND
GND
GND

I/O4

JP19

1
2
3
4
GND
GND
GND
GND

1
2
3
4
GND
GND
GND
GND

6

5

4

USB_VC CB

09/02/ 17 ESD

USB_ VCCC

09/02/ 17 ESD

USB_VC CA

USB20_N 0USB20_P0

09/02/ 17 ESD

+3VS

+3VS

ACCEL_INT #16

SMB_DATA_S34,9,10,1 2,14

SMB_CLK_S34,9,10,1 2,14

R494 10 K_0402_5%

+3VS

BT Connector

JP18

1
2

USB20_P8_R

R489 0_04 02_5%

1 2

R490 0_04 02_5%

1 2

R492
10K_0402_5%

R493

1 2

220K_0402_1%

ACES_87212- 05G0_5P

CONN @

BT_OFF16

3

USB20_N 8_R

4576

12

ACCELEROMETER

U22

LIS302DL

1

VDD_IO

6

8

12
13
14

12

L

7

Mu st be pl aced i n the center of th e syst em.

Chan ge U22 part descrip tion fro m
LIS3 02D LTR LGA to HP30 2DLTR8 a s HP
chan ge list. 12/03

GND

VDD

GND
GND

INT 1
INT 29GND

SDO
SDA / SDI / SDO
SCL / SPC

RSVD

CS

RSVD

HP302DLT R8_LGA14_3X5

Q35
SI2301CDS- T1-GE3 1P SOT23-3

S

D

13

G

2

2
4
5
10

3
11

+3VAUX_BT

+3VS

+3VAUX_BT+3VALW

C596 0.1U_0 402_10V6K

1

2

C602

1

2

USB20_P8 16
USB20_N8 16
BT_LED 29

C597 10U_08 05_10V4K

1

2

+3VS

0.1U_0402 _10V6K
C603

1

2

10U_0805_10V4K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

2

Title

Size Docu ment Numbe r Re v

Date: Sheet o f

Compal Electronics, Inc.

USB & BT Connector & Acclerometer

LA -4 892 P

1

26 45S aturd ay, May 16, 2009

0.3

5

Finger printer

D D

+3VALW

Q36 SI2301 CDS-T1-GE 3 1P SOT23-3

S

D

13

C608 0.1U_040 2_10V6K

C609 10U_0805_10V4K

G

2

R496
10K_0402_5%

1 2

R501
220K_0402_1%

FPR_ OFF16

C C

1 2

1

2

BIOS ROM(4MB)

C613

B B

+3VL

SPI_CS0#30

SPI_CLK30

SPI_SI30

A A

20mils

SPI_CLK

SPI_CS0 # SPI_C S0#_JP

SPI_SO_ R S PI_SO_JP

0.1U_0402 _10V6K

R506 3.3K_0402_5%

20mils

+3VL

1 2

1 2

R508 3.3K _0402_5%

12

R5100_04 02_5%

12

R5110_04 02_5%

12

R5120_04 02_5%

12

R5130_04 02_5%

12

R5140_04 02_5%

USB20_N1016
USB20_P1016

1

2

+FP_PWR

D29

4

CM1293A-02SR_SOT143-4

20mils

SPI_WP#

SPI_HOLD #_1

SPI_CS0 #

VIN

3

IO2

SPI ROM Socket SPI ROM

8

3

7

1

6

5

USB20_P10

+3VL

1

2

SPI_WP#

SPI_HOLD #_0SPI_HOLD #_1

SPI_CLK _JPSPI_CLK

SPI_ SI_JPSPI_ SI

4

+FP_PWR

USB20_N10

2

IO1

1

GND

U24

4

VCC

VSS

W

HOLD

S

C

2

Q

D

WIESO_G 6179-100000_8P

1 2

R509 0_0402_5%@

09/01/07 ME

JP20

2

112

4

334
665
887

CONN @

ACES_85203- 04021

SPI_SO_ RSPI_ SI

R507 15_0402_5%

+FP_PWR

5
7

45@

AT25DF321-SU SOIC 8P

1 2

3

TPM1.2 on board

C605

0.1U_0402 _10V6K

C604

LPC_LAD 0
LPC_LAD 1
LPC_LAD 2
LPC_LAD 3
LPC_LF RAME#
PLT_RST#

SIRQ

@

TPM_XTALO

TPM_XTALI

+3VL

12

R505

100K_0402_5%

LPC_LFRAME#13,30,31

PLT_RST#4,13,16,2 2,24,29

PCI_S ERR#16,30

LPC_LAD013,30,31
LPC_LAD113,30,31
LPC_LAD213,30,31
LPC_LAD313,30,31

8051_RECO VER#30

DEBUG_KBCR ST37

KBC_SPI_C S1#_R30

0.1U_0402 _10V6K

1

1

2

2

U23

26

LAD0

23

LAD1

20

LAD2

17

LAD3

22

LFRAME#

16

LRESET#

28

LPCPD#

27

SERIRQ

21

LCLK

15

CLKRUN#

7

PP

14

XTALO

13

XTALI/32K IN

SIRQ13,30,31

8051TX30
8051RX30

1 2

C611 22P_0402_50V8J

Y6

2

IN

NC

3

OUT

NC

32.768KHZ 1TJS125DJ 4A420P

1 2

C612 22P_0402_50V8J

+3VS

12

R502

4.7K_0402_5%@

12

R503

0_0402_5%

12/19 HP

&U1

SPI_SO 30

TPM_XTALI

12

R504

1

10M_0402_5%

4

TPM_XTALO

SUS_STAT#15,31

CLK_PCI_T PM_PCH16

1 2

@

10P_0402_50V8J

PM_CLKRUN #15, 30,31

Add SIRQ and connect to
pin5. 10/08

8051_RECO VER#

1 2

C610

R499 10_0402_5%

CLK_ PCI_DB_PCH16

2

+3VS

+3VALW

C607

C606

0.1U_0402 _10V6K

1

2

24

VDD

SL B 96 35

SL B 96 35 T T 1.2

SL B 96 35 SL B 96 35

GND

25

1

2

5

10

19

VSB

VDD

VDD

GPIO

GPIO2

TT 1. 2

TT 1. 2T T 1.2

TEST1

TESTB1/BADD

NC
NC
NC

GND

GND

GND

SLB 9635 T T 1.2_TSSOP28

4

11

18

0.1U_0402 _10V6K

6
2

Base I/O Address
0 = 02Eh
1 = 04Eh*

8
9

3
12
1

LPC Debug Port

B+_DEBUG

JP21

1

Ground

2

LPC_PCI_CLK

3

Ground

4

SIRQ

8051_RECO VER#

SPI_CLK _JP
SPI_CS0 #_JP
SPI_ SI_JP
SPI_SO_J P
SPI_HOLD #_0

LPC_FRAME#

5

+V3S

6

LPC_RESET#

7

+V3S

8

LPC_AD0

9

LPC_AD1

10

LPC_AD2

11

LPC_AD3

12

VCC_3VA

13

PWR_LED #

14

CAPS_LED#

15

NUM_LED#

16

VCC1_PWRGD

17

SPI_CLK

18

SPI_CS#

19

SPI_SI

20

SPI_SO

21

SPI_HOLD#

22

Reserved

23

Reserved

24

Reserved

ACES_87216- 2404_24P

CONN @

TPM_GPIO
TPM_GPIO2

R498

0_0402_5%

1 2

T106PAD
T107PAD

R497

4.7K_0402_5%

1 2

R500

4.7K_0402_5%

1

+3VS

12

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

2

Title

Size Docu ment Numbe r Re v

Date: Sheet o f

Compal Electronics, Inc.

TCG/BIOS ROM/PS2/SW LPC DEBUG

LA -4 892 P

1

27 45S aturd ay, May 16, 2009

0.3

(2) PS /2 Interfaces
(2) US B 2.c hannels
(2) SA TA Channels
(2) Di splay Port Channels
(1) Se r ial Port
(1) Pa ra llel Port
(1) L ine In
(1) Li ne Out
(1) RJ 45 (1 0/100/1000)
(1) VGA
(1) 2 LAN i ndicator LED's
(1) Po wer Button
(1) I2 C interface

DPB_TXP015
DPB_TXN015

DPB_TXP115
DPB_TXN115

DPB_TXP215
DPB_TXN215

DPB_TXP315
DPB_TXN315

DPB_AUX#15

ADP IN

+5VS

C616 0.1U_0603 _50V4Z

C615 0.1U_0603 _50V4Z

+5VS

C617

10U_0805_10V4K

1

2

ADPIN

1

1

2

2

MDO3+

MDO3+23

MDO3-

MDO3-23

MDO2+

MDO2+23

MDO2-

MDO2-23

DETECT

09/01/15 HP 09/01/15 HP

DPB_AUX15

12/19 HP 12/19 HP

DOCK CONN. 190PIN

C618

1

2

0.1U_0402 _10V6K

1

2

12A

C620

C619

0.1U_0402 _10V6K

0.1U_0402 _10V6K

1

2

JP22A

190

P1

188

188

187

187

186

186

185

185

184

184

183

183

182

182

181

181

180

180

179

179

178

178

177

177

176

176

175

175

174

174

173

173

172

172

171

171

170

170

169

169

168

168

167

167

166

166

165

165

164

164

163

163

162

162

161

161

160

160

159

159

158

158

157

157

156

156

155

155

154

154

153

153

152

152

151

151

150

150

149

149

148

148

147

147

146

146

145

145

144

144

FOX_QL00 94L-D26601-5H

12/19 HP

DOCKING CONNECTOR

+5VALW

R926
10K_0402_5%

1 2

STB_LED#_R

61

Q68A

2N7002DW T/R7_SOT-363-6

+5VS

2

09/02/11 HP

MDO1+ 23
MDO1- 23

MDO0+ 23
MDO0- 23

LANLINK_ST ATUS# 16, 22,23,30

LAN_ACT# 22,23

USB20_N11 16
USB20_P11 16

DPC_TXP0 15
DPC_TXN0 15

DPC_TXP1 15
DPC_TXN1 15

DPC_TXP2 15
DPC_TXN2 15

DPC_TXP3 15
DPC_TXN3 15

DPC_AUX 15
DPC_AUX# 15

SER_SH D29

2N7002DW T/R7_SOT-363-6

STB_LED#25,2 9

189

G1

1

1

MDO1+

2

2

MDO1-

3

3

4

4

MDO0+

5

5

MDO0-

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

41

41

42

42

43

43

44

44

45

45

09/04/17 HP

DDPB_CT RLCLK
DDPB_CTR LDATA
DDPC_ CTRLCLK
DDPC_CT RLDATA

11/25 HP 11/25 HP

09/04/29 HP

09/04/29 HP

+5VS

1 2

SER_ SHD

3

Q68B

4

R528 2. 2K_0402_5%
R530 2. 2K_0402_5%
R529 2. 2K_0402_5%
R531 2. 2K_0402_5%

R946
10K_0402_5%

ISO_PREP #

5

1 2
1 2
1 2
1 2

DDPB_CT RLCLK15
DDPB_CTR LDATA15

SATA_PTX_DRX_P513
SATA_PTX_DRX_N513

SATA_PRX_DTX_P513
SATA_PRX_DTX_N513

SATA_PTX_DRX_P213
SATA_PTX_DRX_N213

SATA_PRX_DTX_P213
SATA_PRX_DTX_N213

DPB_H PD15

SLP_S5#15

LPTSTB#31
LPTAFD#31
LPTERR#31
LPTACK#31
LPTBUSY31

LPTPE31

LPTSLCT31

LPTSLCTIN#31

LPTINIT#31

SATA_LED#13,29

ISO_PREP #16

USB20_N1316
USB20_P1316

DOCK _RED
DOC K_GRN
DOCK _BLU

T58PAD

LPD731
LPD631
LPD531
LPD431
LPD331
LPD231
LPD131
LPD031

+3VS

DOCK _ID

12/19 HP

R517

JP22B

143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100

99
98
97
96
95

192
194
196
198
200

FOX_QL00 94L-D26601-5H

DC AD DCAD 2

ADP_SIG NAL

LPTSTB#
LPTAFD#
LPTERR#
LPTACK#
LPTBU SY
LPTPE
LPTSLCT
LPD7
LPD6
LPD5
LPD4
LPD3
LPD2
LPD1
LPD0
LPTSLCTIN#
LPTINIT#
STB_LED#_R

DOCK _ID
ISO_PREP #

R677 15 0_0402_1%@
R680 15 0_0402_1%@
R687 15 0_0402_1%@

ADP_SIG NAL

12
12
12

12

1K_0402_5%

1 2

10K_0402_5%

143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95

G2
G4
G6
G8
G10

R515

+3VALW

46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94

G1
G3
G5
G7
G9

DOCK _RED
DOC K_GRN
DOCK _BLU

46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94

191
193
195
197
199

ON/ OFF#
VA_ON#

R_DO CK_RED

R_DO CK_GRN
R_D OCK_BLU

DCD #1
RI#1
DTR#1
CTS#1
RTS#1
DSR#1
TXD1
RXD1

KBD_DATA
KBD_C LK
PS2_DATA
PS2_CLK

LINE_OUT _SENSE

DLINE_OUT _L
DLINE_O UT_R

DETECT

C665 0.1U_0 402_10V6K@

1 2

C698 0.1U_0 402_10V6K@

1 2

C699 0.1U_0 402_10V6K@

1 2

VA_ON#

R524 0_0402_5%

1 2

R525 0_0402_5%

1 2

R526 0_0402_5%

1 2

12

R516

1K_0402_5%

T59 PAD

DPC_ HPD 15

ON/O FF# 25

DDPC_C TRLCLK 15

DDPC_CT RLDATA 15

D_DDCD ATA 20

D_DD CCLK 20

D_V SYNC 20
D_ HSYNC 20

DOCK _RED

DOC K_GRN
DOCK _BLU

DCD# 1 29,31
RI#1 29,31

DTR#1 29,31
CTS#1 29,31
RTS#1 29,31

DSR#1 29, 31

TXD1 29,31

RXD1 29,31

DOCK _ID0 16
DOCK _ID1 16

KBD_DATA 30
KBD_CLK 30
PS2_DATA 30
PS2_CLK 30
LINE_ IN_SENSE 29

LINE_OUT _SENSE 29

DOCK _LINE_IN_L 29
DOCK _LINE_IN_ R 29

DLINE_OUT _L 29
DLINE_OU T_R 29

1

C614

0.1U_0402 _10V6K

2

09/04/22 HP

11/26 HP

12/20 HP

U25

VGA_RED20 VGA_GRN20 VGA_BLU20

DOCK _RED DOC K_GRN DOCK _BLU

1

NO

2

GND

NC3COM

TS5A3157_SC70-6

IN

L

H

DOCK _ID DOCK _ID DOCK _ID

6

IN

VCC

5

4

NC<-->COM

ON

OFF

C691

+3VS +3VS +3VS

12

0.1U_0402 _10V6K

NO<-->COM

OFF

ON

U26

1

2

TS5A3157_SC70-6

6

NO

IN

5

GND

VCC

4

NC3COM

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C692

12

0.1U_0402 _10V6K

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

U27

1

NO

2

GND

VCC

NC3COM

TS5A3157_SC70-6

6

IN

5

4

C693

12

0.1U_0402 _10V6K

BLUE_R 20RED_R 20 GREEN_ R 20

Compal Electronics, Inc.

Title

DOCK CONN

Size Docu ment Numbe r Re v

Cust om

LA -4 892 P

Date: Sheet of

28 45S aturd ay, May 16, 2009

0.3

5

Audio/Express Card/TP/LEDs Connector

DOC K_LI NE_IN _L28
DOC K_LI NE_I N_R28 DLI NE_O UT_R 28

LIN E_IN _SENSE28 LIN E_OU T_SENSE 28

HDA _BIT_ CLK_ CODEC13

D D

C C

B B

A A

HDA _SDO UT_CO DEC13

HDA _RST# _CO DEC13

HD A_S YNC _COD EC13

HD A_SD IN013

SLP_S3 #15, 22,30, 32,33,3 5,38,39 ,40

PCI E_WA KE#1 5,22,24

PLT_RS T#4, 13,16,2 2,24,27

CLKR EQ_EXP#14

AMBE R_BATLED #30

AQU AWHI TE_BATLE D#30

SATA_ LED#13 ,28

HDD _HAL TLED13

STB_L ED#25, 28

WL/ BT_LED#25

WL_ LED#

WW _LED #

DTA 114Y KAGZT1 46 PNP S C59-3

WW _LED #24

DTA 114Y KAGZT1 46 PNP S C59-3

1 2

R950 0_ 0402_5%

1 2

R951 0_ 0402_5%

DOC K_LI NE_I N_L
DOC K_LI NE_I N_R DLI NE_O UT_R
LIN E_IN _SEN SE LI NE_O UT_SEN SE

HDA _BIT_ CLK_ CODEC
HDA _SDO UT_CO DEC
HDA _RST# _CO DEC
HD A_S YN C_CO DEC
HD A_S DIN0

+3VL

+3V ALW

+5VS
+3VS

+1.5 VS

SLP_S3 #
PCI E_WA KE#
PLT_RS T#
CL KREQ_EXP#
AMB ER_BATLE D#
AQU AWHI TE_BATL ED#
SATA _LED#
HDD _HAL TLED
STB_ LED#
WL/ BT_LED #

09/04/ 23 HP

+3VS

47K

@

Q37

10K

2

1 3

13

2

10K

@

47K

Q39

+3VS

BT_LE D26WL_ LED#24

BT_L ED

WL_ LED

4

JP2 7

1

1

3
5
7
9

13
15
17
19
21
23
25
27
29
31
33
35

39
41
43
45
47
49

55

2

3

4

5

6

7

8

9

10

111112

14

13

16

15

18

17

20

19

22

21

24

23

26

25

28

27

30

29

32

31

34

33

36

35
373738
39

40

41

42

43

44

45

46

47

48

49

50

515152
535354

56

55

ACES_8 8075-0 5071_50P-T

CO NN@

BT_L ED

2

WL_ LED

R53 3 100K_ 0402_5%

1 2

R53 4 100K_ 0402_5%

1 2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

52
54
56

+3VS

12

R53 2
47K_0 402_5%

61

5

3

4

DLI NE_O UT_L

A_S D#
MUTE _LED_ CNTL
HD A_SP KR

PCI E_PTX_C_ DRX_N2
PCIE _PTX_C_D RX_P2

PCIE _PRX_DTX_ N2
PCIE_ PRX_DTX_P 2

USB 20_N4
USB 20_P4

TP_C LK
TP_D ATA

For A udio power

WL/ BT_LED #

Q38A
2N7 002DW T/R7_SOT- 363-6

Q38B
2N7 002DW T/R7_SOT- 363-6

DLI NE_O UT_L 28

A_S D# 30

MUTE _LED_ CNTL 30

HD A_SPK R 13

CLK _PCI E_EXP_PCH # 14

CLK _PCI E_EXP_PCH 14

PCI E_PTX_C_ DRX_N2 14
PCIE _PTX_C_D RX_P2 14

PCIE_ PRX_DTX_ N2 14

PCIE_ PRX_DTX_P 2 14

USB 20_N4 1 6
USB2 0_P4 16

TP_C LK 30
TP_DA TA 30

+3VS

3

12/20 HP

09/05 /04 HP

09/03 /31 HP

2N7 002DW T/R7_SOT- 363-6

C739

0.1U _0402_ 10V6K@

1 2

+3VL +3VA LW +5VS +3VS +1.5VS

1

1

2

0.1U_ 0402_1 0V6K

+3VS

+5V ALW

1

C65 1

2

0.1U _0402_ 10V6K

0.1U _0402_ 10V6K

12/06 HP

CLK REQ_ CARD #

CRD _RST # PLT_RS T#

09/04 /03 HP

CLK REQ_ CARD #

1

C64 7

C64 6

2

2

0.1U_ 0402_1 0V6K

0.1U_ 0402_1 0V6K

1

C94 4

2

11/25 HP

19
20

CO NN@

P-TWO_ 196087 -18021-3_18 P-T

R746 10K_040 2_5%

61

2

Q91A

3

Q91B
2N7 002DW T/R7_SOT- 363-6

5

4

1

1

C64 8

C64 9

2

2

0.1U_ 0402_1 0V6K

0.1U_ 0402_1 0V6K

JP2 8

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

19

18

18

20

1 2

1 2

R92 2 10K_0 402_5%

@

1 2

R92 4 15K_0 402_5%

1

C95 1

0.022 U_0402 _25V7K

2

ADP _PRES 22,30 ,33,35, 43

C65 0

09/04 /17 HP

09/04 /07 HP

+5V ALW

USB 20_N 2_R
USB 20_P2_ R
SLP_ S4
CRD _RST #

CLK REQ_ CARD #

2

1

Serial Port CONN

+5VS

DC D#128 ,31
DSR #128 ,31
RXD128,31
RTS#12 8,31
TXD128 ,31
CTS#12 8,31

RI# 128, 31

DTR #12 8,31

SE R_SH D28

14v s15_ FF_D ETECT30

DC D#1
DS R#1
RXD1
RTS# 1
TXD1
CTS# 1
RI# 1
DTR #1
SE R_SH D
14v s15_ FF_D ETECT

E-T_3 800K-F12 N-03R_ 12P

Card Reader 7 in 1 + 1 Port USB Connector

SLP_ S4 26 ,33

+3V S_CD

CLK REQ_ CARD # 14

CL K_PC IE_C ARD_P CH 14

CLK _PCI E_CAR D_PC H# 14

PCIE _PTX_C_D RX_P3 14
PCI E_PTX_C_ DRX_N3 14

PCIE_ PRX_DTX_P 3 14
PCIE _PRX_DTX_ N3 14

USB 20_N216
USB 20_P216

09/05 /13 EMI

+3V ALW

09/05 /14 HP

09/05 /14 HP

100K_ 0402_5%

2N7 002DW T/R7_SOT- 363-6

CLK REQ_ CARD #

SI23 01CDS-T1 -GE3 1P SOT23-3

R92 5

1 2

5

61

Q93A

2

09/04 /21 Up date Footprint

JP2 3

CO NN@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

14

10

14

11

13

11

13

12

12

R961 0_0402_ 5%

1 2

L46

@

1

1

4

4

WCM20 12F2S-90 0T04_08 05

1 2

R962 0_0402_ 5%

2 1

PAD -SHO RT 2x 2m

Q90

@

+5VS

R92 3
47K_0 402_5%

1 2

3

Q93B
2N7 002DW T/R7_SOT- 363-6

4

2

3

J2

D

S

13

G

2

2

USB 20_N 2_R
USB 20_P2_ R

3

+3V S_CD+3VS

1

C95 0

4.7 U_0805 _10V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

Title

ize Doc umen t Nu mber R ev

S

Cu sto m

2

Dat e: Shee t o f

Compal Electronics, Inc.

CR&LEDS&PW&Audio&Exp Conn

LA -4 892 P

29 45Sat urda y, M ay 16 , 2009

1

0.3

+3VL

RP21

1 8
2 7
3 6
4 5

10K_0804_8 P4R_5%

RP22

1 8
2 7
3 6
4 5

10K_0804_8 P4R_5%

+3VL

@

1 2

R943 100K_0402_5%

+5VS

RP34

1 8
2 7
3 6
4 5

10K_0804_8 P4R_5%

RP23

1 8
2 7
3 6
4 5

10K_0804_8 P4R_5%

1 2

C989 47P_0402_50V8J

1 2

C990 47P_0402_50V8J

1

4

22P_0402_50V8J

Y7

C661

IN

1

2

2

+RTCVC C

12

R596

1 2

0_0402_5%@

C664

1

2

KSI3
KSI2
KSI1
KSI0

KSI7
KSI6
KSI5
KSI4

09/04/06 HP

KBD_DATA
KBD_C LK
TP_CLK
TP_DATA

SP_CLK
SP_DATA
PS2_CLK
PS2_DATA

TP_CLK

TP_DATA

C662

OUT

1

NC3NC

2

32.768KH Z 1TJS125 DJ4A420P

R591
0_0402_5%

1U_0603_1 0V4Z

SPI_CS0 #

09/05/ 15 EMI

22P_0402_50V8J

C666

1

2

La yout Note :
On e pi n on e cap

SPI_SI27

KBC_ SPI_SI_R13

SPI_CS0#27

KBC_SPI_C S0#_R13

SPI_SO27

KBC_SPI_SO13

KSO[0.. 13]25

KSI[0 ..7]25

TP_CLK29
TP_DATA29
SP_CLK25
SP_DATA25
PS2_CLK28

PS2_DATA28

PM_CLKRUN #15, 27,31
SIRQ13,27,31

CLK_ PCI_KBC_PCH16

RUNS CI_EC#16

LPC_LAD313,27,31
LPC_LAD213,27,31
LPC_LAD113,27,31
LPC_LAD013,27,31

LPC_LFRAME#13,27,31
NPCI_RST #16,31

+VCC0

BAT_ALARM36
KBC_SP I_CLK_R13
SPI_CLK27
MC2_DISABL E24
PCH_ SPI_CS1#_R13
KBC_SPI_C S1#_R27
MC1_DISABL E24

PMC35

OCP_ A_IN43

0.1U_0402 _10V6K

1 2

R958 30 0_0402_5%

1 2

R959 30 0_0402_5%

+VCC0

09/0 5/0 7 SMS C reques t

0.1U_0402 _10V6K

0.1U_0402 _10V6K
C986

1

1

2

2

128
127

SPI_CS0 #

T138PAD

C972

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

TP_CLK
TP_DATA
SP_CLK
SP_DATA
PS2_CLK
PS2_DATA

RUNS CI_EC#

CRY 1
CRY 2

12

12

2200P_0402_50V7K

97
96
95
94

21
20
19
18
17
16
13
12
10

9
8
7
6
5

29
28
27
26
25
24
23
22

35
36
61
62
66
67

55
57
54
76

51
50
48
46

52
53

70
71

68

1
2

3
30
31
32
33
34
43
44

C973

2200P_0402_50V7K

0.1U_0402 _10V6K

0.1U_0402 _10V6K

C653

U29

FLDATAOUT
HSTDATAOUT/GPIO45
FLCS0#
HSTCS0#/GPIO44
FLDATAIN
HSTDATAIN/GPIO43

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12/GPIO00/KBRST
KSO13/GPIO18

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

IMCLK
IMDAT
KCLK
KDAT
EMCLK
EMDAT

CLKRUN#
SER_IRQ
PCI_CLK
EC_SCI#

LAD[3]
LAD[2]
LAD[1]
LAD[0]

LFRAME#
LRESET#

XTAL1
XTAL2

VCC0

Alarm [CKT#2]/GPIO36
HSTCLK/GPIO41
FLCLK
GPIO39
HSTCS1#/GPIO42
FLCS1#
GPIO38
GPIO37
ADC1/GPIO46
ADC_TO_PW M_IN

KBC1098-N U_VTQFP_128P

C655

C654

1

1

2

2

Po wer Mgm t/S IRQ

LPC
Bus

09/04/29 HP

+3VL

0.1U_0402 _10V6K

0.1U_0402 _10V6K
C657

C656

1

1

2

2

14

106

119

49

VCC1

VCC139VCC158VCC184VCC1

VCC1

Ke ybo ard/ Mou se I nte rfac e

Ge ner al P urp ose I/O Int erf ace

SMSC_1098-NU_TQFP-128P

Acce ss Bus I nterface

72

AGND

VSS11VSS37VSS47VSS56VSS

VSS82VSS

104

117

AVSS

45

R960 0_0402_5%

1 2

0.1U_0402 _10V6K
R548 0_0402_5%

C658

1

2

VCC2

ADP_PRES[CKT#2 ]/GPIO27/WK_SE05

32KHZ_OUT/GPIO22/W K_SE01

ADC_TO_PW M_OUT/GPIO19

Mi sce llan eou s

GPIO28
GPIO29
GPIO30
GPIO31
GPIO32

OUT0/(SCI)

OUT1/IRQ8#

CFETA/OUT7/nSMI

OUT8/KBRST

OUT9/PWM2

OUT10/PWM 0

PWM_CHR GCTL

GPIO01
GPIO02

GPIO03
GPIO04/KSO14
GPIO05/KSO15

GPIO07/PWM3

GPIO08/RXD

GPIO09/TXD

GPIO11/AB2A_DATA

GPIO12/AB2A_CLK

GPIO13/AB2B_DATA

GPIO14/AB2B_CLK
GPIO15/FAN_TACH1
GPIO16/FAN_TACH2

GPIO17/A20M

GPIO20/PS2CLK

GPIO21/PS2DAT

GPIO24/KSO16

AB1A_DATA

AB1A_CLK

AB1B_DATA

AB1B_CLK

GPIO25

GPIO26/KSO17

NC_CLOCKI

RESET_OUT# /GPIO06

PWRGD

VCC1_RST#

TEST PIN

CFETB/GPIO10

BAT_LED#

PWR_LED #/8051TX

FDD_LED#/80 51RX

AC[CKT#2]/GPIO23

ADC2/GPIO40

Q/GPIO33

GPIO34
GPIO35

AVCC

12

CAP

+3VS

CAP

15

93
98
99
100
126

KBC_PW R_ON

124

AQUAW HITE_BATLED#

125

123

KBRST#

122
121
120
118

THM_TRAVEL#

107
79

14vs15_F F_DETECT

80
81
83

PM_RSMRST#

85

CRACK _BGA

86

GFX_SEL

87

AB2A_DATA

88

AB2A_CLK

89
90
91

ADP_DET#

92
101
102

103
105
4
74

AB1A_DATA

111

AB1A_CLK

112

AB1B_DATA

109

AB1B_CLK

110

73

108
59

32K_CLK

75

PGD_ IN

60

PWR_G D

78
77
38

69

116
113
115
114

41
42
65
64
63
40

12

C974

2200P_0402_50V7K

TEST

Security Classification

11/18 remove
all options of 1091

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Syste m Board ID De tect

C659 4.7U_0805 _10V4Z

1 2

T134PAD

09/04/03 HP

R560 0_ 0402_5%

1 2

R561 0_ 0402_5%

1 2

R562 0_ 0402_5%

1 2

R563 0_ 0402_5%

1 2

R564 0_ 0402_5%

1 2

T139PAD

R568 0_ 0402_5%

1 2

R569 22 0_0402_1%

1 2

R572 1K_ 0402_5%

1 2

1 2

R574 100K_0402_5%

R957

R581

C987 0.1U_0402 _10V6K

Issued Date

1 2

1 2

1 2

300_0402_5%

0_0402_5%

+3VL

09/01/22 HP

KSI3
KSI2
KSI1
KSI0

11/12 remov e the duplicate part

11/25 Chang e Y5V to X5R HP

09/04/29 HP

D32CH751H-40PT_ SOD323-2

21

AB1A_DATA 34
AB1A_CLK 34

AB1B_DATA 34
AB1B_CLK 34

09/0 5/13 HP

FET_B 36

+3VL

09/0 3/2 4 BI OS tea m reques t

09/0 5/0 7 SMS C reques t

+3VL

R910
10K_0402_5%

UMA

1 2

GFX_SEL

2008/10/31 2009/11/06

Compal Secret Data

11/12 chang e back to 10K to fix K/B issue

1 2

R645 10K_0402_5%@

1 2

R647 10K_0402_5%@

1 2

R648 10K_0402_5%

1 2

R649 10K_0402_5%@

2N7002DW T/R7_SOT-363-6

09/01/22 HP

SUS_PW R_ACK 15
AC_PRESENT 15
MUTE_LED_CNTL 29
PCI_S ERR# 16,27

KBC_PWR _ON 37
AQUAW HITE_BATLED# 29

FET_A 36
KB_RST# 16
FAN_PWM 4
BAT_PWM_OUT 35
CHGCTR L 35

THM_TRAVEL# 34
ON/OFF BTN_KBC# 25
14vs15_FF_ DETECT 29
SLP_S3# 15,22,29,3 2,33,35,38,3 9,40
8051_RECO VER# 27

PM_RSMRST# 15
CRACK_B GA 18

CAP_DAT 14,25
CAP_CLK 14,25
CELLS 35
A_SD# 29
ADP_DET# 43
THM_MAIN# 34
GATEA20 16

KBD_CLK 28
KBD_DATA 28
LANLINK_ST ATUS# 16, 22,23,28
ADP_PRES 22,29, 33,35,43

CAP_INT 25

ADP_EN 43
PM_PWROK 13,42
PWR_G D 32
VCC1_PW RGD 37,43
OCP 43
PGD_ IN 15

AMBER_BATLED# 29
8051TX 27
8051RX 27

AC_ADP_ PRES 35
ADP_A_ ID 43
LATCH 36
LID_SW # 13, 21,25
CAP_RST_ EC 25

2N7002DW T/R7_SOT-363-6

09/01/15 HP

09/05/04 HP
09/01/10 HP

Deciphered Date

Q57A

2N7002DW T/R7_SOT-363-6

6 1

2

3

Q57B

+3VL

4

5

1 2

R964 10K_0402_5%

61

Q97A

ADP_EN

2

AQUAW HITE_BATLED#

2N7002DW T/R7_SOT-363-6

AQUAW HITE_BATLED#

5

Q85B

5

R912 0_ 0402_5% @

1 2

09/02/13 HP

AMT M E Overr ide Fu nction

09/05/ 13 Compal

3

Q97B
2N7002DW T/R7_SOT-363-6

4

09/01/10 HP

ADP_DET#

09/05/11 HP

KBRST#

VCC1_ PWRGD

CRACK _BGA

09/04/10 HP

14vs15_F F_DETECT

KBC_PW R_ON

LATCH

FET_A

FET_B

The Ti ming from PWR_GD to
PM_PWR OK should be more than
99ms.

PGD_ IN

+3VS

R909

@

10K_0402_5%

1 2

R921 1K_ 0402_5%

3

09/02/13 HP

4

Compal Electronics, Inc.

Title

Size Docu ment Numbe r Re v

LA -4 892 P

Date: Sheet of

ID R645R6 47R6 48R64 9

DB1

DB2

DBx

SI1

SI2

SIx

PV

N/A

N/A

N/A

N/A

MV

R558 10K_0402_5%@

R549 10K_0402_5%@

R551 10K_0402_5%

R553 100K_0402_5%

R945 100K_0402_5%

R557 10K_0402_5%

R559 10K_0402_5%

R575 10K_0402_5%

R576 10K_0402_5%

AB1A_CLK
AB1A_DATA
AB1B_CLK
AB1B_DATA

09/05/05 HP

1 2

KBC1091

X

X

X

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

RP24

4.7K_0804_ 8P4R_5%

1 8
2 7
3 6
4 5

1 2

R577 10K_0402_5% @

09/01/15 HP

X

X

X

X

X

X

+3VL

+3VL

AMT_OVERR IDE 13

30 45S aturd ay, May 16, 2009

X

X

XPVx

0.3

5

D D

+3VS

RP37

1 8
2 7
3 6
4 5

10K_0804_8 P4R_5%

1 2

R905 10K_0402_5%

RP35

1 8
2 7
3 6

C C

B B

10K_0804_8 P4R_5%

10K_0804_8 P4R_5%

12

R607

10_0402_5%

1

C670
33P_0402_50V8J

2

4 5

RP36

1 8
2 7
3 6
4 5

SIO_GPIO43
SIO_GPIO44
SIO_GPIO45
SIO_GPIO46

SIO_GPIO10
SIO_GPIO12

SIO_ IRQ

SIO_GPIO47

CLK_14M_SIOC LK_PC I_SIO_PCH

12

R608
10_0402_5%

1

C671
10P_0402_50V8J

2

SIO_GPIO23
SIO_GPIO41
SIO_GPIO42

SYSOPT

09/04/24 HP

09/04/17 HP

Base I/ O Addres s
0 = 02E h
* 1 = 04E h

09/02/19 EMI

4

1 2

LPC_LAD 0
LPC_LAD 1
LPC_LAD 2
LPC_LAD 3

LPC_LF RAME#

LPC_LD RQ#0

NPCI_RST #

PM_CL KRUN#

SIO_PME#

SIO_GPIO41
SIO_GPIO42
SIO_GPIO43
SIO_GPIO44
SIO_GPIO45
SIO_GPIO46
SIO_GPIO47
SIO_GPIO10
SYSOPT
SIO_GPIO12
SIO_ IRQ

SIO_GPIO23

LPC_LAD013,27, 30
LPC_LAD113,27, 30
LPC_LAD213,27, 30
LPC_LAD313,27, 30

LPC_LFRAME#13,27,30

LPC_LDRQ #013

NPCI_RST #16,30
SUS_STAT#15,27

PM_CLKR UN#1 5,27,30

CLK_ PCI_SIO_PCH16

SIRQ13,27,30

+3VS

CLK_14M_SIO14

R605 10K_0402_5%

09/04/24 HP

SIRQ

U30

9

LAD0

11

LAD1

12

LAD2

13

LAD3

14

LFRAME#

15

LDRQ#

16

PCI_RESET#

17

LPCPD#

18

CLKRUN#

19

PCI_CLK

20

SER_IRQ

6

IO_PME#

8

CLK14

21

GPIO41

22

GPIO42

24

GPIO43

25

GPIO44

26

GPIO45

27

GPIO46

28

GPIO47

29

GPIO10

30

GPIO11/SYSOPT

31

GPIO12/IO_SMI#

32

GPIO13/IRQIN1

33

GPIO14/IRQIN2

34

GPIO23

57

EPAD

LPC47N217N -ABZJ_QFN 56_8X8

CLOC K

LPC I/F

GPIO

POWER

3

RXD1

TXD1
DSR1#
RTS1#
CTS1#
DTR1#

RI1#

SERIAL I/FPARALLEL I/F

DCD1#

INIT#

SLCTIN#

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

SLCT

BUSY

ACK#

ERROR#

ALF#

STROBE#

VTR
VCC
VCC
VCC
VCC

2

@

RXD1
TXD1
RTS#1
DTR#1

09/05/14 SMSC

RI#1
CTS#1
DSR#1
DCD #1

C667

1

2

LPTSLCTIN# 28

LPTBUSY 28

+3VS
+3VS

4.7U_0805 _10V4Z

RXD1 28,29

TXD1 28,2 9
DSR#1 28,29
RTS#1 28,2 9
CTS#1 28,2 9
DTR#1 28,29
RI#1 28,29
DCD# 1 28,29

LPTINIT# 28

LPD0 28
LPD1 28
LPD2 28
LPD3 28
LPD4 28
LPD5 28
LPD6 28
LPD7 28

LPTSLCT 28

LPTPE 28

LPTACK# 28
LPTERR# 28
LPTAFD# 28

LPTSTB# 28

LPTERR#

LPD1
LPD0
LPTSTB#
LPTSLCT

LPD5
LPD4
LPD3
LPD2

LPTAFD#
LPTINIT#
LPD7
LPD6

LPTACK#
LPTBU SY
LPTPE
LPTSLCTIN#

RXD1

54
55
56
1
2
3
4
5

35
36
37
39
40
41
42
43
44
45
47
48

PE

49
50
51
52
53

7
10
23
38
46

R603 1K_ 0402_5%

TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD #1

LPTINIT#
LPTSLCTIN#

LPD0
LPD1
LPD2LPD2
LPD3
LPD4LPD4
LPD5
LPD6LPD6

LPD7
LPTSLCT
LPTPE
LPTBU SY
LPTACK#
LPTERR#
LPTAFD#
LPTSTB#

1

1

C689

C690

2

2

0.1U_0402 _10V6K

1 2

1

C668

2

0.1U_0402 _10V6K

0.1U_0402 _10V6K

RP38

1 8
2 7
3 6
4 5

4.7K_0804_ 8P4R_5%

RP25

1 8
2 7
3 6
4 5

4.7K_0804_ 8P4R_5%

+5VS_PRN

R609

1 2

4.7K_0402_5%

RP27

1 8
2 7
3 6
4 5

4.7K_0804_ 8P4R_5%
RP28

1 8
2 7
3 6
4 5

4.7K_0804_ 8P4R_5%
RP29

1 8
2 7
3 6
4 5

4.7K_0804_ 8P4R_5%
RP26

1 8
2 7
3 6
4 5

4.7K_0804_ 8P4R_5%

1

+3VS

+3VS

+5VS

21

D35

CH751H-4 0PT_SOD323-2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

2

Title

Size Docu ment Numbe r Re v

Cust om

Date: Sheet

Compal Electronics, Inc.

Super I/O LPC47N217

LA -4 892 P

1

of

31 45S aturd ay, May 16, 2009

0.3

11/22 HP

1.05VS_POK40

GFXVR_PW RGD44

09/05/13 HP

R610

1 2

1

2

2VREF_393

1M_0402_5%

+5VALW

8

U31A

3

P

+

2

-

G

LM393DR2G_SO8

4

C672
1000P_0402_50V7K

R620

1 2

1M_0402_5%

+5VALW

8

5

+

6

-

4

1

O

U31B

P

7

O

G

LM393DR2G_SO8

1 2

R668 3.3K_0402_5%

10/31

+5VS

+0.75VS

SLP_S3#15,22,29, 30,33,35,38, 39,40

+3VS

+1.5VS

+1.8VS

1 2

R613 76.8K_04 02_1%

1 2

R616 11.5K_0402_1%

11/20 HP

1 2

R619 3.3K_0402_5%

11/11 HP

R670 3.3K_040 2_5%@

R671 75K_0402_1%

R672 34K_0402_1%

R880 41.2K_04 02_1%

D37

CH751H-4 0PT_SOD323-2

1 2

1 2

1 2

1 2

R673

30.1K_0402_1%

21

1 2

2VREF_51125

1

C673

3300P_0402_25V7K

2

1

C687

3300P_0402_25V7K

2

1 2

R614 10K_0402_5%

2VREF_393

1 2

R615 34.8K_0402_1%

1 2

R617 49.9K_0402_1%

1 2

R621 10K_0402_5%

2VREF_393

+3VS

12

R611
10K_0402_5%

VCCP_POK38

MC74AHC1G08 DFT2G SC7 0 5P

VCCP_ EN 38

+3VL

5

U28

1

P

IN1

4

O

2

IN2

G

3

12

R674

4.99K_0402_1%

12

R675

2.49K_0402_1%

PWR_G D 30

VTTPWRGOOD 4

H1
HOLEA

1

H9
HOLEA

1

H14
HOLEA

1

H2
HOLEA

1

H10
HOLEA

1

H15
HOLEA

1

H3
HOLEA

1

H11
HOLEA

1

H16
HOLEA

1

H12
HOLEA

1

H17
HOLEA

1

H7
HOLEA

1

H18
HOLEA

H8
HOLEA

1

H13
HOLEA

1

H24

H23

H22

H20
HOLEA

1

H21
HOLEA

1

HOLEA

1

HOLEA

1

HOLEA

1

H19
HOLEA

1

1

H26

H27

H25

HOLEA

HOLEA

1

FM2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

H29

HOLEA

HOLEA

1

1

FM1

FM3

1

1

H28
HOLEA

1

1

FM4

1

ZZZ 1

PCB-LA-4982P

Compal Electronics, Inc.

Title

Size Docu ment Numbe r Re v

LA -4 892 P

Date: Sheet

POK CKT

0.3

of

32 45S aturd ay, May 16, 2009

A

B

C

D

E

+3VALW to +3VS Transfer

4

R867
0_0402_5%

1 2

+3VS+3VALW

1
2
35

C677

1

2

11/11 HP

12

R631
470_0402_5%

1

C686

0.01U_040 2_16V7K

2

10U_0805_10V4K

0.1U_0402 _10V6K
C679

1

2

B+

1 1

2 2

R629
330K_0402_5%

SLP_S3

2N7002DW T/R7_SOT-363-6

11/20 HP

2

ADP_PRES22,29,30,3 5,43

2N7002DW T/R7_SOT-363-6

12

1

2

61

Q1A

C676
10U_0805_ 10V4K

SI7326DN-T 1-GE3 1N 1212-8

U33

RU NON

12

R630
820K_0402_5%

3

5

Q1B

4

+5VALW to +5VS Transfer

SI7326DN-T 1-GE3 1N 1212-8

1

C678
10U_0805_ 10V4K

2

U34

4

RU NON

+5VS+5VALW

1
2
35

0.1U_0402 _10V6K

C680

1

2

1

C681
10U_0805_ 10V4K

2

+1.5VALW to +1.5V Transfer

+1.5VALW

Q75
AO4430L 1 N SOIC-8

8
7

5

10U_0805_10V4K

C781

0.1U_0402 _10V6K

1

2

12

R793
820K_0402_5%

3

5

Q69B

4

R791
330K_0402_5%

SLP_S4

2N7002DW T/R7_SOT-363-6

11/20 HP

2

2N7002DW T/R7_SOT-363-6

B+

12

61

ADP_PR ES

C780

1

2

Q69A

1
2
36

4

12

R794
470_0402_5%

1

C785

0.01U_040 2_16V7K

2

+1.5V

C782

0.1U_0402 _10V6K

C783

10U_0805_10V4K

1

1

2

2

+1.5VALW to +1.5VS Transfer

+1.5VALW +1.5VS

SI7326DN-T 1-GE3 1N 1212-8

1

C777
10U_0805_ 10V4K

2

U38

4

1

2

1 2

C784

0.01U_040 2_16V7K@

R792

1
2
35

C778

1

2

0_0402_5%

0.1U_0402 _10V6K

1

2

RU NON

C779
10U_0805_ 10V4K

+1.8V_LAN to +1.8VS Transfer

+1.8V_LAN +1.8VS

SI7326DN-T 1-GE3 1N 1212-8

1

C786
10U_0805_ 10V4K

2

U39

4

1

2

1 2

C789

0.01U_040 2_16V7K@

R795

1
2
35

C787

1

2

0_0402_5%

0.1U_0402 _10V6K

1

2

RU NON

C788
10U_0805_ 10V4K

11/20 HP

Discharge circuit-1

+1.05VS

12

R634
470_0402_5%

61

SLP_S3

3 3

2N7002DW T/R7_SOT-363-6

2N7002DW T/R7_SOT-363-6

2

Q45A

+1.5V + 0.75VS

12

R650
470_0402_5%

61

SLP_S4 SLP_S3 SLP_S3

2

Q65A

2N7002DW T/R7_SOT-363-6

2N7002DW T/R7_SOT-363-6

SLP_S3

+5VS

12

R637
470_0402_5%

3

5

Q45B

4

12

R651
470_0402_5% @

3

5

Q65B

4

SLP_S3

2N7002DW T/R7_SOT-363-6

5

+1.8VS

12

3

4

R638
470_0402_5%

Q64B

2N7002DW T/R7_SOT-363-6

2N7002DW T/R7_SOT-363-6

SLP_S4

5

2

+GFX_CORE

12

R797
470_0402_5%

3

Q95B

4

+1.5VS

12

R636
470_0402_5%

61

Q64A

SLP_S426,29

SLP_S4#15

2N7002DW T/R7_SOT-363-6

SLP_S4

2

+3VL

12

R632
100K_0402_5%

61

Q63A

SLP_S3

SLP_S3#15,22,29, 30,32,35,38, 39,40

2N7002DW T/R7_SOT-363-6

5

+3VL

12

R633
100K_0402_5%

3

Q63B

4

+3VS

12

4 4

SLP_S3

2N7002DW T/R7_SOT-363-6

100_0402_1%

R635

61

2

Q50A

A

2N7002DW T/R7_SOT-363-6

SLP_S3

+VCCP

12

R798
470_0402_5%

3

5

Q50B

4

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/10/31 2009/11/06

Compal Secret Data

Deciphered Date

D

Title

Size Docu ment Numbe r Re v

Date: Sheet o f

Compal Electronics, Inc.

DC/DC Circuits

LA -4 892 P

E

33 45S aturd ay, May 16, 2009

0.3

1

2

3

4

PJP1

4

V-

5

V-

6

A A

PJP2

@SUY IN_20004 6GR008G 102ZR_8P-T

B B

THM_ MAIN#30

SSM3 K7002FU_SC 70-3

OCP _ADJ43

C C

PCN 1

@SUY IN_20163 S-06G1-K

210K_ 0402_1%

D D

7

8

9

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

100K_ 0402_5%

BATT+

SMD
SMC

B/I
TS

GND

PR9

BAV99 WT1G_SC70-3

GND_1

GND_2

GND_3

GND_4

FOX_J PD1131- DB371-7F

PR2 1M_0402 _1%

PR4

PQ30

1

2
3
4
5

6

+3VL

1 2

ID

V+

V+

12

12

MMBT3906_SOT23-3

13

D

2

G

S

220K_ 0402_5%

294K_ 0402_1%

1 2

PR11

1K_04 02_5%

PD18

PR92

2

3

ADPIN

1

ADP IN

2

VL+3VL

E

3

C

1

12

3

PD1

1

PJSO T24C_SOT23

PR88

69.8K _0402_1%

1 2

12

PR89

100K_ 0402_1%

B

2

12

PR90

150K_ 0402_1%

12

PC1

100P_ 0402_50V8J

12

PR3

PC7

1K_04 02_5%

100P_ 0402_50V8J

PD15
BAV99 WT1G_SC70-3

1

2

3

12

PC2
1000P _0402_50V7K

12

VL

2

PQ29

PR91

SMB3 025500YA_2P

1 2

12

PC8

PR5

100_0 402_5%

PD16

1

BAV99 WT1G_SC70-3

2

3

PL1

100P_ 0402_50V8J

12

PR6

100P_ 0402_50V8J

PC3

12

12

100_0 402_5%

PD17

1

BAV99 WT1G_SC70-3

2

3

12

12

PC4

1000P _0402_50V7K

VMB_A

12

PC5
1000P _0402_50V7K

PC9
100P_ 0402_50V8J

+3VL

VIN

12

PR1

@15K _0402_5%

PL2

HCB20 12KF-12 1T50_0805

1 2

PL4

HCB20 12KF-12 1T50_0805

1 2

AB1A_D ATA 30

AB1A_ CLK 30

BATT_A

12

PC6

0.01U _0402_50 V4Z

PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C
(Need to be checked)

VMB_B

PR7

1K_04 02_5%

1 2

1000P _0402_50V7K

12

12

PC27

1 2

100P_ 0402_50V8J

1

3

1

PC28

PR14

100_0 402_5%

PD19

1

BAV99 WT1G_SC70-3

2

3

12

PR15

100_0 402_5%

1

2

3

12

PC29
100P_ 0402_50V8J

PD20
BAV99 WT1G_SC70-3

AB1B_D ATA 30

AB1B_ CLK 30THM_TRAVEL#3 0

+3VL

12

100P_ 0402_50V8J

12

PC11

PL3

HCB20 12KF-12 1T50_0805

1 2

1 2

PL5

HCB20 12KF-12 1T50_0805

0.1

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BATT_B

Issued Date

PC10

12

0.01U _0402_50 V4Z

0.1U 25V K X7R 0603

2VREF _51125

12

PH1

Clo se to CPU

PC12

2008/10/31 2009/10/31

100K_ 0603_1%_ TSM1A104F4361RZ

2VREF _51125

12

12

PR16

51.1K _0402_1%

Compal Secret Data

PR12

150K_ 0603_1%

1 2

1 2

PR13

75K_0 402_1%

150K_ 0402_1%

Deciphered Date

3

PR17

12

470K_ 0402_1%

1 2

5

+

6

-

12

PC13

1000P _0402_50V7K

PR8

8

P

G

PU15B
LM393 DG_SO8

4

VL

PR10
100K_ 0402_5%

1 2

13

D

7

O

Title

DC-IN/ BATTERY CONN

Size Doc ument Number R ev

Cus tom

LA-3942P

Dat e: Sh eet o f

PQ1

2

SSM3 K7002FU_SC 70-3

G

S

Compal Electronics, Inc.

4

EN0 37

34 45Sat urday , May 16, 2009

ADP_SIGNAL

A

VIN

PQ101

AO4407A 1P SO8

1
2
3 6

1 1

2 2

3 3

1 2

PC101

0.22U 2 5V K X7R 0603

1 2

PR101

200K_0402_5%

ADP_EN#

1 2

100K_0402_1%

P2

12

PR119
200K_0402_1%

12

PR123

41.2K_0402_1%

P2BATT

PR136

4

12

PR111
150K_0402_5%

PR135

100K_0402_1%

1 2

PR137

24K_0603_1%

1 2

PR118
255K_0402_1%

1 2

5

+

6

-

2VREF_51125

8
7

5

8

P

G

4

3

+

2

-

12

PR140

23.7K_0402_1%

7

O

PU103B
LM393DG_SO8

PQ102

AO4407A 1P SO8

8
7

5

4

12

13

D

S

VL

PR138

1 2

100K_0402_5%

PR139

1 2

1M_0402_5%

8

P

1

O

G

PU10A
LM393DG_SO8

4

BAT_PWM_OUT30

+3VL

12

PR120

22K_0402_5%

Cha rg e Detector

P4

1
2
36

1 2

PR103

47K_0402_5%

PR105
15K_0402_5%

2

G

PQ104
SSM3K7002FU_SC70-3

1 2

PR114

422K_0402_1%

1U_0603_6.3V6M

AC Detector
Hig h 11.85
Low 10.55

ADP_PRES 22,29 ,30,33,43

PC116

+3VL

56K_0402_1%

PR104

1 2

SLP_S3#15,22,29,30,32,33,38,39,40

12

1 2

PC111
1U_0603_6.3V6M

12

PR113
453K_0402_1%

12

PR115
1M_0402_1%

22.6K_0402_1%

IADAPT43

Hig h 17.588
Low 17.292

PR125
604K_0402_1%

1 2

3

2

VL

8

P

+

-

G

4

12

PC124

0.1U_0402_10V7K

1

O

PU103A
LM393DG_SO8

AC_A ND_CHG

+3VL

12

PR150
22K_0402_5%

AC_ADP_PRES 30

VIN

P2

12

12

PR128

PR127

76.8K_0402_1%
@76.8K_0402_1%

4 4

12

PR131

10K_0603_0.1%

B

12

PC107

0.01U_0402_16V7K

PR109
0_0402_5%

1 2

BQ24740VREF

+3VL

PR116

100P_0402_50V8J

CHGC TRL

12

8

9

10

11

12

13

14

IADAPT

PC119

1K_0402_5%

1 2

IADSLP

AGND

VREF

VDAC

VADJ

EXTPWR

ISYNSET

PR130

ACDET

+3VL

7

5

6

LPREF

ACSET

ACDET

PU101
BQ24740 RHDR_QFN28_5X5

BAT

IADAPT

SRSET

17

15

16

BATT

12

12

PR124
147K_0402_1%

PD103

1SS355_SOD323-2

PC123

0.047U_0402_16V7K

Note: X7R type

1

2

ACP

1U_0603_6.3V6M

12

PC108

0.1U_0603_50V7K

4

LPMD

SRN

18

12

12

PR102

0.01_2512_1%

PC105

1 2

3

2

ACP

ACN

SRP

CELLS

19

20

PR122

210K_0402_1%

12

PC122
1U_0603_6.3V6M

12

PR134

470K_0402_5%

B+

PL101

HCB2012 KF-121T50_0805

4

1 2

3

ACN

12

PC106
@0.1U_0603_25V7K

CHGE N#

1

29

TP

CHGEN

28

PVCC

27

BTST

26

HIDRV

25

PH

24

REGN

23

LODRV

22

PGND

DPMDET

21

SRSET 43

12

+3VL

12

PR126

100K_0402_5%

12

PR133
220K_0402_5%

CHGE N#

13

D

PQ109

2

G

BSS138_SOT23-3

S

1 2

PC109
1U_0805_25V6K

BST_CHG

DH_C HG

LX_CHG

REGNVADJ

DL_C HG

PC118

12

1U_0603_10V6K

CHGCTR L 30

B

2

C

12

PC102

4.7U_0805_25V6M

1 2

PR121

0_0402_5%

1 2

PR145

0_0402_5%

PD102

12

RLS4148_LL34-2

+3VL

E

3

PQ108

MMBT3906_SOT23-3

C

1

1 2

PR129

47K_0402_5%

12

12

PC103

4.7U_0805_25V6M

PR110
10_0805_5%

1 2

PC110

0.1U_0402_10V7K

1 2

AO4468_SO8

PR117
100K_0402_5%

1 2

PC120

0.1U_0603_50V7K

ACDETACD ET

12

PR132
300K_0402_5%

PC104

4.7U_0805_25V6M

PQ107

CELLS 30

12

P4P2

CHG_B+

CHG_B+

5

D8D7D6D

PQ106

S1S2S3G

AO4466_SO8

4

10U_LF9 19AS-100M-P3_4.5A_20%

578

3 6

241

12

PC121
@0.1U_0603_25V7K

11K_0402_5%

IADAPT

1 2

1U_0603_10V6K

1
2
3 6

PL102

1 2

PR141
@4.7_1206_5%

1 2
12

PC126

@680P_0603_50V8J

PR142

PC127

PQ103

AO4407A 1P SO8

<BOM Str ucture>

4

PR106
0_0402_5%

1 2

12

PR144

49.9K_0402_1%

8
7

5

P2

12

12

PC112

PC113

4.7U_0805_25V6M

1

+IN

2

V-

3

-IN

PU104

LMV321AS5X SOT23 5P

1 2

12

PR143

39.2K_0402_1%

D

0.01_1206_1%

1 2

4.7U_0805_25V6M

PC117

0.1U_0402_10V7K

V+

OUTPUT

PR112

1 2

5

4

+5VALW

BATT

12

PC114

4.7U_0805_25V6M

PMC 30

12

12

PC115

PC128

4.7U_0805_25V6M

4.7U_0805_25V6M

2VREF_51125

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2008/10/31 2009/10/31

Compal Secret Data

Deciphered Date

C

Title

Size D ocument Num ber R ev

Date: Sheet o f

Compal Electronics, Inc.

Charger

LA -39 42P

D

35 45Sa turday, May 16, 2009

0.1

A

1 2

PR110 0

5

6

VL

8

P

+

-

G

4

1M_0402_5%

12

PC110 0

0.1U_ 0603_50V4Z

7

O

PU10B
LM393 DG_SO8

+3VL

12

PR1104

100K_ 0402_5%

BAT_ALARM 30

2VREF _51125

1 1

BATT

12

12

12

PR110 5

93.1K _0603_1%

PR110 9
20K_0 402_1%

PR111 0

8.06K _0402_1%

12

PR1103
10K_0 402_5%

13

D

2

G

PQ1100

S

SSM3 K7002FU_SC 70-3

CFET_ B

B

BATT_B

LATCH30

S

Vin

BATT_A

B+_DEBUG

G

2

C

PD110 2
1SS35 5_SOD323-2

PD110 0
RB715 F_SOT323-3

2

3

B+_DE BUG

PR111 2

0_0402_5%

D

13

1 2

PQ1102
BSS84LT1G_S OT23-3

D

2 1

0_0402_5%

1 2

PD111 0
RLZ 27V

PR110 1

B++ 51125_PWR

12

PD110 1

1SS35 5_SOD323-2

12

PR110 6

100_0 805_5%

1 2

1

12

PC110 2

0.1U_ 0603_50V4Z

BATT_IN

BATT

2 2

12

PR111 4
470K_ 0402_5%

1

2

CFET_A43

PR111 9

10K_0 402_5%

1 2

BATT_IN

10K_0 402_5%

CFET_ A

34

PQ1106B
2N700 2KDW- 2N_SOT363-6

5

12

PR111 7

61

2

PQ1106A

2N700 2KDW- 2N_SOT363-6

1 2

PD110 6
1SS35 5_SOD323-2

PQ1105
PMBT2222A_SOT23-3

3

BATT

3 3

4 4

FET_A 30

FET_B 30

1 2

PR112 7

10K_0 402_5%

CFET_B

BATT_IN

CFET_ B

2

10K_0 402_5%

61

12

PR112 2
470K_ 0402_5%

12

PR112 6

5

PQ1112A
2N700 2KDW- 2N_SOT363-6

1 2

PD110 9
1SS35 5_SOD323-2

34

PQ1112B
2N700 2KDW- 2N_SOT363-6

1

2

3

PQ1111

PR111 5
470K_ 0402_5%

1 2

PD110 7
SX34-40_SMA

4

3 6
2
1

PQ1107
AO440 7A 1P SO8

PQ1109

AO440 7A 1P SO8

1
2
3 6

4

470K_ 0402_5%

1 2

PR112 4

PMBT2222A_ SOT23-3

PD110 8
SX34-40_SMA

BATT_IN

21

BATT_A_P

5

7
8

8
7

5

21

BATT_IN

5

2

5

7
8

PQ1108
AO440 7A 1P SO8

PQ1110

AO440 7A 1P SO8

8
7

5

BATT_B_P

5

2

34

PQ1113B
2N700 2KDW- 2N_SOT363-6

PQ1113A

61

2N700 2KDW- 2N_SOT363-6

4

36
2
1

1
2
36

4

34

PQ1114B
2N700 2KDW- 2N_SOT363-6

61

PQ1114A
2N700 2KDW- 2N_SOT363-6

12

PR111 8

4.7K_ 0402_5%

12

PR112 0
470K_ 0402_5%

12

PR112 1
470K_ 0402_5%

12

PR112 5

4.7K_ 0402_5%

BATT_A

BATT_B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2008/10/31 2009/10/31

Compal Secret Data

Deciphered Date

C

Title

Size Doc ument Number R ev

Cus tom

Dat e: Sh eet o f

Compal Electronics, Inc.

Battery selector

LA-3942P

D

36 45Sat urday , May 16, 2009

A

B

C

D

E

2VREF_51125

12

PC302

0.22U_0603_10V7K

1 1

PR301

13.7K_0402_1%

+3VALWP

B+

PL301

HCB2012 KF-121T50_0805

1 2

2 2

+3VALWP

150U 6. 3V M B2 LESR45M

PC310

B++

12

12

12

PC303

PC317

PC301

SIS412DN -T1-GE3 1N POW ERPAK1212-8

4.7UH_P CMC063T-4R7MN_5.5A_20%

1

+

2

2200P_0402_50V7K

0.1U_0402_25V6

4.7U_0805_25V6-K

PL302

12

PR311

4.7_1206_5%

PC312

1000P_0603_50V7K

PQ301

12

12

241

123

UG1_3V

3 5

5

4

PQ304
AON7406L _DFN8-5

PC307

10U_0805_6.3V6M

PR309

0_0402_5%

1 2

+3VLP

12

1 2

PC308

0.1U_0402_10V7K

PR307

1 2

0_0402_5%

1 2

PR303

20K_0402_1%

1 2

PR305

105K_0402_1%

1 2

BST_3V

UG_3V UG_5V

LX_3V

LG_3V

PR315

@620K_0402_5%

ENTRIP2

5

3

4

6

25

P PAD

VFB2

VREF

TONSEL

ENTRIP2

7

VO2

8

VREG3

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

GND

VIN

SKIPSEL

EN0

15

16

14

13

12

12

2VREF_51125

PC314

3 3

2N7002K DW-2N_SOT363-6

4 4

ENTRIP1

61

PQ305A

SSM3K7002FU_SC70-3

ENTRIP2

34

PQ305B

2

13

D

S

PQ307

5

2

G

PR316

100K_0402_5%

1 2

330K_0402_5%

2N7002K DW-2N_SOT363-6

VL

PR317

12

12

PD305
1SS355_SOD323-2

12

PD301
1SS355_SOD323-2

+5VALWP

+3VALWP

KBC_PWR_ON 30

DEBUG_KBCRST 27

VCC1_PWRGD 30,43

PJP301

1 2

PAD-OPE N 4x4m
PJP303

1 2

PAD-OPE N 4x4m

0.1U_0603_25V7K

(4.5A,180mils ,Via NO.= 9)

+5VALW

(3A,120mils ,Via NO.= 6)

+3VALW

PJP302

2 1

PAD-OPE N 2x2m

PJP304

2 1

PAD-OPE N 2x2m

PJP305

2 1

PAD-OPE N 2x2m

+VREG3_51125+3VLP

VL+5VLP

+3VL+3VEXTLP

PR302

30.9K_0402_1%

1 2

PR304

20K_0402_1%

1 2

PR306

97.6K_0402_1%

ENTRIP1

1 2

2

1

VFB1

ENTRIP1

24

VO1

23

PGOOD

22

VBST1

21

DRVH1

20

LL1

19

DRVL1

VREG5

VCLK

PU301

17

18

TPS51125RGER_QFN24_4X4

+5VLP

1 2

12

PR319

@0_0402_5%
PC315
10U_0805_10V6K

1U_0603_10V6K

BST_5V

LX_5V

LG_5V

PC321

PR308

0_0402_5%

1 2

+3VL

12

51125_PWR

B++

PR320

255K_0402_1%

12

+5VALWP

12

PC318

PC309

0.1U_0402_10V7K

1 2

PR314
@100K_0402_5%

DEBUG_KBCRST27

P2

12

12

PR321

11.5K_0402_1%

12

12

PC304

0.1U_0402_25V6
2200P_0402_50V7K

PR310

0_0402_5%

1 2

IRF8707TR PBF 1N SO8

RPGOOD 15

10U_0805_10V6K

PU302

LMV321AS5X_SOT23-5

1

+IN

2

V-

3

-IN

PC305

PC319

B++

12

PC306

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PQ303

PQ302
SIS412DN -T1-GE3 1N POWERPAK1212-8

3 5

241

4.7UH_P CMC063T-4R7MN_5.5A_20%

578

3 6

241

12

PR312

4.7_1206_5%

12

PC313
1000P_0603_50V7K

PL303

1 2

+5VALWP

1

+

PC311

2

150U 6. 3V M B2 LESR45M

+3VEXTLP

OUT

V+

12

+5VLP

PR325

220K_0402_5%

+5VLP

5

4

PU303

1

12

2

3

12

PR326

470K_0402_5%

1 2

PR327

680K_0402_5%

VIN

GND

EN

APL5317

VOUT

FB

PR324

16.5K_0402_1%

12

PD304
1SS355_SOD323-2

12

PR322

12

64.9K_0402_1%

12

PR323

20K_0402_1%

5

4

12

PC320

2.2U_0603_10V6K

EN0 34

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/10/31 2009/10/31

C

Compal Secret Data

Deciphered Date

Title

Size Do cument Numbe r R ev

Custo m

D

Date: Sheet o f

Compal Electronics, Inc.

3.3VALWP/5VALWP

LA -39 42P

37 45Sa turday, May 16, 2009

E

0.1

A

1 1

B+

PL401

HCB2012 KF-121T50_0805

1 2

12

PC417

0.1U_0402_25V6

VCCP_B+

+VCCP

PR427

10K_0402_5%

+3VS

12

PR401

@10K_0402_5%

12

12

PC416

12

12

PC402

PC401

0.1U_0402_25V6

4.7U_0805_25V6-K

2200P_0402_50V7K

12

12

PC404

PC403

4.7U_0805_25V6-K

4.7U_0805_25V6-K

VCCP_POK32

17

GND

COMP5FB6FSET

12

PR409

90.9K_0402_1%

12

16

PGOOD

FB_VC CP

PU401

1

PC414

VIN

2

VCC

3

FCCM

4

EN

12

+6269_VCC

12

2 2

SLP_S3#15,22,29,30,32,33,35,39,40

VCCP_EN32

PC407

2.2U_06 03_6.3V6K

1 2

PR406

@0_0402_5%

1 2

PR428

0_0402_5%

PR405

0_0402_5%

1 2

12

PC411
@0.1U_0402_25V4K

22P_0402_50V8J

B

1 2

PR417

1 2

PR402

2.2_0603_5%

+5VALW

LX_VCCP

DH_ VCCP

BST_VCCP

15

14

13

UG

BOOT

PHASE

PVCC

PGND

ISEN

0_0402_5%

LG

PR403

12

11

10

9

12

2.2_0603_5%

1 2

1 2

DL_VC CP

SE_VCCP

PR404

0_0603_5%

1 2

PC405

0.22U_0603_16V7K

+6269_VCC

PC406

2.2U_06 03_6.3V6K

1 2

PR407

7.87K_0402_1%

578

DH_V CCP1

3 6

241

C

PQ401
AO4474_SO8

PL402

0.47UH_ FDV0630-R47M-P3_18A_20%

1 2

12

PR408

4.7_1206_5%

D

+VCCP

1

1

+

PC410

2

1

+

+

PC408

2

PC409

2

VO

8

7

ISL6269ACR Z-T_QFN16

+VCCP

12

12

PR410

49.9K_0402_1%

PC413

0.01U_0402_16V7K

PQ402

3 5

241

AON67 18L 1N DFN

PC412

1 2

1000P_0603_50V7K

330U 2V M X LESR6M SX H1.9

330U 2V M X LESR6M SX H1.9

330U 2V M X LESR6M SX H1.9

3 3

H_VTTVID17

H_VT TVID1= Low, 1.1 V
H_VT TVID1= High, 1. 05V

4 4

A

1 2

PR416

35.7K_0402_1%

PC415

6800P_0603_50V7K

1 2

PR411

1.58K_0402_1%

12

PR412

1.96K_0402_1%

+VCCP

1 2

PR413
10_0402_5%

1 2

PR414
0_0402_5%

1 2

PR415
10_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

VTT_SENSE 7

VSS_SENSE_VTT 7

2008/10/31 2009/10/31

Compal Secret Data

Deciphered Date

C

Title

Size D ocument Num ber R ev

Date: Sheet o f

Compal Electronics, Inc.

1.05V_VCCP

LA -39 42P

D

38 45Sa turday, May 16, 2009

0.1

A

1 1

B

C

D

+1.5V

12

12

PR601

1K_0402_1%

PC602

PC601

10U_0805_6.3V6M

@10U_0805_10V4Z

61

12

PR603
1K_0402_1%

+0.75VS

PQ601A

2

1 2

12

PJP601

2 2

PR604

0_0402_5%

SLP_S3#15,22,29,30,32,33,35,38,40

1 2

PC606

@0.1U_0402_16V7K

+5VALW

12

PR602

10K_0402_5%

2N7002K DW-2N_SOT363-6

34

PQ601B
2N7002K DW-2N_SOT363-6

5

12

+0.75VSP

PU601

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

6

5

NC

7

NC

8

NC

9

TP

+0.75VSP

12

12

PC605
10U_0805_6.3V6M

0.1U_0402_10V7K

PC604

(2A,80mils ,Via NO.= 4)

12

PC603
1U_0603_10V6K

+5VALW

PAD-OP EN 3x3m

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2008/10/31 2009/10/31

Compal Secret Data

Deciphered Date

C

Title

Size D ocument Num ber R ev

Date: Sheet o f

Compal Electronics, Inc.

0.75VSP

LA -39 42P

D

39 45Sa turday, May 16, 2009

0.1

A

1 1

B

C

D

PR516

SLP_S3#15,22,29,3 0,32,33,35,38,39

2 2

+5VALW

+5VALW

1 2

PR518

316_0402_1%

PC520

1U_0603_10V6K

0_0402_5%

+1.05VSP

+1.05VSP

12

12

PC519

12

@1000P_0402_50V7K

1 2

PR519 0_0402_5%

1 2

4.12K_0402_1%

1 2

PC526

@10P_0402_50V8J

10K_0402_1%

PR503

PR504

PR524
255K_0402_1%

1 2

12

PR511

0_0402_5%

BST_1.05V

1 2

15

14

1

PU501

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

TP

VBST

EN_PSV

DRVH

TRIP

V5DRV

DRVL

GND7PGND

TPS51117 RGYR_QFN14_3.5 x3.5

8

13

12

LL

11

10

9

UG_1.05V

LX_1.05V

PR517

1 2

+5VALW

LG_1.05V

PC511

0.1U_0402_10V7K

1 2

15.4K_0402_1%

SIS412DN -T1-GE3 1N POWERPAK1212-8

PR509

0_0402_5%

1 2

12

PC521

4.7U_0805_10V6K

UG1_1.05V

AON77 02L 1N DFN

PQ502

PQ504

3 5

241

3 5

241

1.05VS_B+

12

12

PC505

PC504

@1000P_0402_50V7K

2.2UH_P CMC063T-2R2MN_8A_20%

12

PR513
@4.7_1206_5%

12

PC517
@680P_0603_50V8J

@0.1U_0402_25V6

12

PC506

4.7U_0805_25V6M

PL503

1 2

4.7U_08 05_6.3V6K

PL501

HCB1608 KF-121T30_0603

1 2

12

PC507

4.7U_0805_25V6M

12

PC514

B+

+1.05VSP

1

+

PC515

2

220U_B2_2.5VM_R25M

1.05VS_POK 32

3 3

+1.05VSP

PJP501

1 2

+1.05VS

(8A,320mils ,Via NO.= 16)

PAD-OP EN 4x4m

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2008/10/31 2009/10/31

Compal Secret Data

Deciphered Date

C

Title

Size D ocument Num ber R ev

Date: Sheet

Compal Electronics, Inc.

1.05VSP

LA -39 42P

D

40 45Sa turday, May 16, 2009

o f

0.1

5

4

3

2

1

D D

PL800

HCB2012KF -121T50_0805

1 2

B+

12

12

PC819

0.1U_0402 _25V6

C C

SIS412DN-T 1-GE3 1N POWERPAK1212-8

+1.8V_LANP

PL801

4.7UH_MSCDR I-74D-4R7M-E_ 4A_20%

1

+

PC809

220U_B2_2.5VM

B B

A A

PC810

4.7U_0805 _6.3V6K

1 2

2

12

LAN_PW R_EN#22

12

PR809

4.7_1206_5%

12

PC811
1000P_0603_50V7K

PC800

2200P_0402_50V7K

AON7406L_ DFN8-5

100K_0402_5%

12

PQ802

PR815

2

G

4.7U_0805 _25V6-K

PQ800

+3VALW

PC801

3 5

241

5

123

12

13

D

PQ804

S

SSM3K7002FU_ SC70-3

4

UG1_1.8V

PC806

0.1U_0402 _10V7K

PR816

0_0402_5%

12

PC817

@1000P_0402_50V7K

+1.8V_LANP

PR805

0_0402_5%

1 2

PR807

2.2_0402_5%

1 2

12

12

PR800

105K_0402_1%

1 2

PR801

75K_0402_1%

1 2

PR804

0_0402_5%

PR802

75K_0402_1%

1 2

1 2

3

4

2

5

6

PU800

25

VO2

P PAD

PGOOD2

EN2

VBST2

DR VH2

LL2

DR VL2

VFB2

7

8

BST_1.8V

9

UG_1.8V

10

LX_1.8V

11

LG_1.8V LG_1.5V

12

PGND2

14

13

PR811

7.15K_0402_1%

1 2

12

PR813

3.3_0402_5%

PC814

1U_0603_1 0V6K

GND

TONSEL

V5IN16TRIP2

15

12

12

1

VO1

VFB1

24

PGOOD1

23

EN1

22

VBST1

21

DR VH1

20

LL1

19

DR VL1

TRIP117V5FILT

PGND1

TPS51124 RGER_QFN24_4x4

18

PR812

18.2K_0402_1%

+5VALW

12

PC815

4.7U_0805 _10V6K

+1.5VALWP

+1.8V_LANP

PR803

75K_0402_1%

1 2

BST_1.5V

UG_1.5V

LX_1.5V

PJP800

1 2

PAD- OPEN 4x4m

PJP801

1 2

PAD- OPEN 4x4m

+1.5VALWP

+1.5VALWP+1.8V_LANP

PR806

0_0402_5%

1 2

PR808

0_0402_5%

1 2

0.1U_0402 _10V7K

1 2

0_0402_5%

12

PR814

PC816
@1000P_0402_50V7K

+1.5VALW

+1.8V_LAN

PQ801
SIS412DN-T 1-GE3 1N POWERPAK1212-8

3 5

UG1_1.5V

1 2

PC807

241

3 5

241

PQ803
IRFH 3707TRPBF 1N PQFN

+3VALW

(8A,32 0mils ,Via NO.= 16)

(3A,12 0mils ,Via NO.= 6)

2.2UH_PCMC0 63T-2R2MN_8A_20%

12

PR810

4.7_1206_5%

12

PC813
1000P_0603_50V7K

12

PL802

1 2

B+++B+++

12

0.1U_0402 _25V6

PC818

4.7U_0805 _6.3V6K

12

0.1U_0402 _25V6
PC803

PC802

12

12

PC805

PC804

4700P_0402_25V7K

4.7U_0805 _25V6-K

4.7U_0805 _25V6-K

+1.5V ALWP

1

12

PC812

+

PC808

2

220U_B2_2.5VM_R25M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/11/23 2007/11/23

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

1.8V_LANP/1.5VALWP

Size Docu ment Numbe r Re v

Date: Sheet of

LA -3 942 P

1

41 45S aturd ay, May 16, 2009

0.2

8

H H

H _VID 0

H_ VID 07

H _VID 1

H_ VID 17

H _VID 2

H_ VID 27

H _VID 3

H_ VID 37

H _VID 4

H_ VID 47

H _VID 5

H_ VID 57

H _VID 6

H_ VID 67

G G

PM_ PWROK13,30

PR OC_D PRS LPVR7

PR OC_ DPRS LPVR

CLK _EN#12

PSI #

1 2

PR2 23 147K _0402_1%

1 2

PR2 19
0_0 402_5%

1 2

VGATE15

F F

+VC CP

PSI #7

+V CCP

H_P ROCH OT#4

PR2 27 @4. 02K_04 02_1%

E E

D D

C C

12

PR2 35

8.0 6K_040 2_1%

PC2 27

150 P_040 2_50V8J

1 2

1 2

10P _0402_ 50V8K

1 2

VC CSEN SE7

1 2

PR2 25

0_0 402_5%

PC2 20 @56 P_040 2_50V8

1 2

1 2

@47 0K_0 402_5%_ TSM0B47 4J4702RE

PH2 02

12

PC2 22

1 2

100 0P_040 2_50V7K

562 _0402_1 %

PC2 25

1 2

PR2 41

412 K_0402_ 1%

1 2

PR2 51 0_0 402_5%

PR2 21 @1 K_0402 _5%

PR2 83 1K_0 402_5%

12

1 2

PR2 24

68_ 0402_5%

390 P_0402_ 50V7K

PR2 36

1 2

PR2 38

2.4 3K_040 2_1%

ISE N2

ISE N1

1 2

PR2 26
0_0 402_5%

+3V ALW

1 2

PC2 21

22P _0402_ 50V8J

1 2

PC2 24

330 P_0402 _50V7K

B B

PR2 63 0_0 402_5%

VSS SENSE7

1 2

100 0P_040 2_50V7K

PR2 15

47K _0402_5 %

1 2

12

PC2 36

0.2 2U_0 402_10 V4Z

PC2 44

PC2 47

PC2 37

0.2 2U_0 402_10 V4Z

7

CLK _EN#

PU2 01

1

PGOOD

2

PSI#

3

RBIAS

4

VR_TT#

5

NTC

6

VW

7

COMP

8

FB

9

ISEN3

10

ISEN2

41

AGND

12

12

12

12

@12 00P_04 02_50V7K

40

CLK_EN#

ISEN111VSEN12RTN13ISUM-14ISUM+15VDD

PC2 48

330 P_0402 _50V7K

6

H _VID 0

H _VID 1

H _VID 2

H _VID 3

H _VID 4

H _VID 5

H _VID 6

PR OC_ DPRS LPVR

PR2 66 1K_0 402_5%

12

PR2 67 1K_0 402_5%

12

PR2 68 1K_0 402_5%

12

PR2 69 @1K_ 0402_5%

12

PR2 70 @1K_ 0402_5%

12

PR2 71 1K_0 402_5%

12

PR2 72 @1K_ 0402_5%

12

PR2 73 1K_0 402_5%

12

+VC CP

5

H _VID 0

H _VID 1

H _VID 2

H _VID 3

H _VID 4

H _VID 5

H _VID 6

PR OC_ DPRS LPVR

BOO ST_C PU2

UGA TE_C PU2

PHA SE_C PU2

LGA TE_C PU2

PR2 08

2.2 _0603_5 %

PR2 80 @1K_ 0402_5%

12

PR2 81 @1K_ 0402_5%

12

PR2 82 @1K_ 0402_5%

12

PR2 75 1K_0 402_5%

12

PR2 76 1K_0 402_5%

12

PR2 77 @1K_ 0402_5%

12

PR2 78 1K_0 402_5%

12

PR2 79 @1K_ 0402_5%

12

12

4

PC2 09

0.2 2U_0 603_10V7 K

1 2

PR2 49

0_0 603_5%

12

UGA TE1_ CPU2

3

PC2 12

578

PQ2 01
AO4 474_SO 8

3 6

241

PQ2 02

3 5

241

TPC A802 8-H 1N SOP ADVANCE

2

CPU_B+

12

0.1 U_04 02_25V6

12

12

PC2 01

PC2 02

0.1 U_04 02_25V6
220 0P_040 2_50V7K

12

12

12

12

PC2 03

PC2 07

4.7 U_08 05_25V6- K

PC2 08

4.7 U_08 05_25V6 -K

4.7 U_08 05_25V6- K

12

PR2 11

PR2 13

4.7 _1206_ 5%

3.6 5K +- 1% 0603

PC2 10

PL2 01

SMB 3025 500YA_2P

12

12

12

PC2 04

4.7 U_08 05_25V6 -K

PL2 02

0.3 6UH _PCM C104 T-R36M N1R17_3 0A_20%

1

LF 2 V2N

2

12

PR2 14

10K _0402_5 %

ISE N2

VSUM +

4

3

1

B+

1

1

+

+

PC2 06

PC2 05

@10 0U_25V _M

@10 0U_25V _M

2

2

+C PU_C ORE

12

PR2 16
1_0 402_5%

VSU M-

100 0P_060 3_50V7K

PC2 11

VID031VID132VID233VID334VID536VID6
BOOT2

VSSP2

VCCP

PWM3

VSSP1

12

1 2

1 2

PC2 29

1U_ 0603_ 10V6K

1 2

30
29
28
27
26
25
24
23
22
21

12

PC2 23
1U_ 0603_ 10V6K

PR2 42 0_0 402_5%

PR2 44 1_0 402_5%

8.2 5K_040 2_1%

0.2 2U_0 603_25V 7K

+5V ALW

PR2 28
0_0 402_5%

1 2

CPU_B+

+5V ALW

12

0.2 2U_0 603_10V 7K

PC2 42

PR2 39 0_0 402_5%

PR2 46

12

0.0 47U_ 0603_16V 7K

PC2 43

PR2 62

1 2

12

12

PC2 30

0.2 2U_0 603_25V 7K

VSS SENS E

VSUM +

12

PR2 52

2.6 1K_040 2_1%

12

12

PH2 01

10K B_06 03_5 %_ERTJ1 VR103J

11K _0402_1 %

VSU M-

IMV P_IMON 7

BOO ST_C PU1

UGA TE_C PU1

PHA SE_C PU1

LGA TE_C PU1

PR2 48

2.2 _0603_ 5%

CPU_B+

578

PR2 74
0_0 603_5%

UGA TE1_ CPU1

12

PC2 40

0.2 2U_0 603_10V7 K

1 2

12

3 6

241

PQ20 5
AO4 474_SO8

12

12

PC2 35

0.1 U_04 02_25V6

12

PC2 31

PC2 32

0.1 U_04 02_25V6
220 0P_040 2_50V7K

12

PR2 53

4.7 _1206_5 %

3 5

241

PQ20 6
TPC A802 8-H 1N SOP ADVANCE

12

PC2 46

100 0P_060 3_50V7K

12

12

PC2 34

PC2 33

4.7 U_08 05_25V6- K

4.7 U_08 05_25V6- K

12

12

PR2 55

3.6 5K +- 1% 0603

12

12

PC2 39

PC2 38

4.7 U_08 05_25V6- K

4.7 U_08 05_25V6- K

PL20 4

0.3 6UH _PCM C104 T-R36 MN1R17_ 30A_20%

1

LF 1 V1N

PR2 56

10K _0402_5 %

ISE N1

VSUM +

4

3

2

VSU M-

12

PR2 57
1_0 402_5%

+C PU_C ORE

39

37

35

38

VID4

VR_ON

UGATE2

DPRSLPVR

PHASE2

LGATE2

LGATE1

PHASE1

VIN

IMON18BOOT119UGATE1

ISL 6288 3HRZ- T_QFN40 _5X5

17

16

20

12

PC2 28

1U_ 0603_ 10V6K

82.5_0402_1%

PR250

12

PC2 45

0.0 1U_0 402_25V7 K

PR2 60

1.1 K_0402 _1%

1 2

1 2

1 2

PC2 49

PR2 65
@10 0_0402_ 1%

12

A A

8

7

PC2 50

0.1 U_04 02_16V7 K

6

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

2008/10/31 2009/10/31

Compal Secret Data

Deciphered Date

3

Compal Electronics, Inc.

Title

Size Do cume nt Numbe r R ev

Dat e: She et o f

2

CPU_CORE

L A-39 42P

42 45Sat urda y, May 16, 2009

1

0. 1

5

BQ24740VREF

12

PR1000
165K_0402_1%

150K_0402_5%

BSS138_SOT23-3

13

D

PQ1002

S

SSM3K7002FU_SC70-3

1 2

PR1022

12

PR1042

8.06K_0402_1%

12

3

C

PQ1006

1

MMBT3906_SOT23-3

8.66K_0402_1%

ADP_ A_ID

12

12

PR1059

45.3K_0402_1%

1 2

PR1013

10K_0402_1%

1 2

PR1014

PQ1000

1 3

E

B

2

D

+3VL

G

2

G

S

2

13

D

S

PQ1001

BSS138_SOT23-3

OCP_AD J 34

NDS0610 _NL_SOT23-3

12

PQ1003

IADAPT35

D D

CFET_A36

ADP_SIGN AL

4.7K_0402_5%

PD1004

1SS355_SOD323-2

2

G

100_0402_5%

PR1046

ADP_PRES

C C

VIN

12

PR1030
68K_0402_5%

12

PR1040
33K_0402_5%

12

PR1045

B B

4

PC1000

0.22U_0603_10V7K

1 2

1

+IN

2

V-

OUTPUT

3

-IN

PU1000

LMV321AS5X SOT23 5P

PR1018
105K_0402_1%

PD1000

1SS355_SOD323-2

D

S

13

G

2

3

+5VS

5

V+

4

12

12

PC1001

0.01U_0402_16V7K

12

PR1017
2K_0402_5%

PD1001
1SS355_SOD323-2

1 2

12

1

PR1025

2

3.9K_0402_5%

PC1003

3900P_0402_50V7K

2N7002K DW-2N_SOT363-6

100K_0402_5%

1 2

PR1032

100_0402_5%

PQ1007B

1 2

PR1028

OCP_ A_IN

34

2

B

12

5

C

PQ1005

MMBT3904W_SOT323-3

E

3 1

OCP_A_ IN 30

PD1003

GLZ4.7B_LL34-2

ADP_EN# 35

VCC1_PW RGD 30,37

SRSET 35

OCP30

PR1010

27.4K_0402_1%

PC1002

0.01U_0402_16V7K

12

12

PR1011

100K_0402_1%

1 2

PR1016

100K_0402_1%

2

1 2

PR1023
@0_0402_5%

1 2

12

PR1021
200K_0402_1%

1 2

PU1

1

IN+

VCC+

2

GND

OUT

3

IN-

LMV331IDCK RG4_SC70-5

+3VS

PR1015
100K_0402_1%

1

+3VS

PR1019
10K_0402_5%

1 2

1 2

PR1020
0_0402_5%

13

D

2

G

S

PQ1004
SSM3K7002FU_SC70-3

+3VS

12

PR1012

+5VS

5

4

10K_0402_5%

OCP# 16

2VREF_51125

12

PR1063
130K_0402_1%

A A

12

PR1065
10K_0402_1%

1 2

PR1062

1M_0402_5%

VL

8

3

P

+

2

-

G

4

1 2

PR1066

10K_0402_5%

5

1

O

PU15A
LM393DG_SO8

ADP_ A_ID

+3VL

12

PR1064
22K_0402_5%

ADP_A_ ID 30

ADP_DET# 30

2N7002K DW-2N_SOT363-6

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PQ1007A

Issued Date

61

2

ADP_EN 30

2008/10/31 2009/10/31

3

Compal Secret Data

Deciphered Date

Title

Size Do cument Numbe r R ev

Custo m

2

Date: Sheet

Compal Electronics, Inc.

ADP_OCP

LA -39 42P

o f

43 45Sa turday, May 16, 2009

1

5

4

3

2

1

SMB3025500YA_2P

1 2

PR704

10_0402_5%

1 2

PR706

10_0402_5%

1 2

150P_0402_50V8J

PL701

PC720

GFX_B+

12

PC701

2200P_0402_50V7K

PC709
1000P_0402_50V7K

PC712
330P_0402_50V7K

PR710
10K_0402_1%

12

PR1009

17.8K_0402_1%

12

1 2

1 2

12

PC702

4.7U_0805_25V6-K

825K_0402_1%

1 2

12

12

PC703

4.7U_0805_25V6-K

12

PR711

1 2

PC716

100P 50 V J NPO 0402

PC721

22P_0402_50V8J

1 2

GFXVR_PW RGD32

GFXVR_CLKEN#

12

12

PC704

4.7U_0805_25V6-K

PC711
330P_0402_50V7K

PC717

1000P_0402_50V7K

8.06K_0402_1%

PC705

4.7U_0805_25V6-K

PR1008

12

12

PC728

PC727

0.1U_0402_25V6

0.1U_0402_25V6

47K_0402_1%

12

+GFX_CORE

12

+5VALW

PR712

12

PR719

@1.91K_0402_1%

PR701

1_0603_5%

12

PR720

@10K_0402_1%

12

12

PC706
1U_0603_6.3V6M

29

7

VSEN

6

FB

5

COMP

4

VW

3

12

RBIAS

2

PGOOD

1

CLK_EN#

AGND

PR702

0_0603_5%

ISUM+

ISUM-

8

10

9

12

11

RTN

PU701
ISL62881 HRZ-T_QFN28_4X4

28

VIN

VDD

ISUM

ISUM+

VID5

VID626VR_ON27DPRSLPVR

25

24

1 2
12

13

IMON

VID323VID4

PC707

0.22U_0603_25V7K

BST_GFX

14

BOOT

UGATE

PHASE

VSSP

LGATE

VCCP

VID2

22

VID0

VID1

12

PR703

22.6K_0402_1%

1 2

PR705

2.2_0603_5%

15

LX_GFX

16

17

DL_GFX

18

19

20

21

12

PC708

0.22U_0 402_6.3V6K

1 2

PC710

0.22U_0603_16V7K

PR733

0_0603_5%

1 2

PR713

1 2

0_0603_5%

12

PC718

2.2U_06 03_6.3V6K

GFXVR_IMON 7

VSS_AXG_SENSE 7

DH_GFX1D H_GFX

+5VALW

AON671 8L 1N DFN

12
12
12
12
12
12
12
12
12

PR7210_0402_5%
PR7220_0402_5%
PR7240_0402_5%
PR7260_0402_5%
PR7270_0402_5%
PR7280_0402_5%
PR7300_0402_5%
PR7310_0402_5%
PR7320_0402_5%

PQ702

578

PQ701
AO4474_SO8

3 6

241

3 5

241

GFXVR_VID_0 7
GFXVR_VID_1 7
GFXVR_VID_2 7
GFXVR_VID_3 7
GFXVR_VID_4 7
GFXVR_VID_5 7
GFXVR_VID_6 7
GFXVR_EN 7
GFXVR_DP RSLPVR 7

.56UH + -20% PCMC104T- R56MN 25A

12

PR707

2.2_1206_5%

PC719

1 2

680P_0603_50V7K

ISUM+

ISUM-

12

PR708

3.65K_0805_1%

1 2

PR714

2.61K_0402_1%

82.5_0402_1%

1 2

PL702

1 2

PH701

1 2

10KB_06 03_5%_ERTJ1VR103J

PR717

1 2

11K_0402_1%

PC722

0.1U_0402_16V7K

1 2

1 2

PC724

0.068U 16V K X7R 0402

PR729

PR723

3.01K_0402_1%

1 2

PC725

0.01U_0402_16V7K

12

PR709
0_0402_5%

1 2

+GFX_CORE

PR725
100_0402_1%

1 2

PC726
1200P_0402_50V7K

1 2

B+

D D

VSS_AXG_SENSE7

VCC_AXG_SENSE7

+GFX_CORE

C C

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/10/31 2009/10/31

3

Compal Secret Data

Deciphered Date

Title

Size Do cument Numbe r R ev

Custo m

2

Date: Sheet o f

Compal Electronics, Inc.

VCCGFX

LA -39 42P

44 45Sa turday, May 16, 2009

1

5

4

3

2

Vers ion cha nge list (P.I.R. List) Power section Page 1 of 1

1

Item Reas on for change PG# Mo dify List

Date

Phase

1

D D

2

3

4

5

6

7

C C

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/10/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Changed-List History

Size Doc ument Number R ev

2

Date: Sheet of

LA -3 942 P

1

0.1

45 45Saturday , May 16, 2009