COMPAL LA-4571P Schematics

A

1 1

B

C

D

E

KTKAA

2 2

LA-4571P

3 3

Los Angeles 10/10G

REV 2.0

Intel Penryn/ Cantiga/ ICH9M

Schematic

2008-09-19 Rev. 2.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

E

of

143Wednesday, September 16, 2009

of

143Wednesday, September 16, 2009

of

143Wednesday, September 16, 2009

A

Compal Confidential

B

C

D

E

Clock Generator

SLG8SP556VTR

page 16

200pin DDRII-SO-DIMM X2

BANK 0, 1, 2, 3

USB conn

USB port 2

page 24

Felica

USB port 9

page 24

USB

USB port 3

page 25

FP conn

USB port 4

page 24

Int. Camera

USB port 11

page 24

HDA Codec

ALC272

page 14,15

TV

CRT

Fan Control

page 18

page 4

Intel Penryn Processor

uPGA-478 Package

(Socket P)

H_A#(3..35) H_D#(0..63)

FSB

667/800/1066MHz

page 4,5,6

Model Name : KTKAA File Name : LA-4571P

1 1

Thermal Sensor

ADT7421

page 4

Memory BUS(DDRII)

VGA/B

ATI/M82,64bit with 128/256MB

ATI M86,128bit with 256M/512MB

EC SMBUS

2 2

RTC CKT.

DC/DC Interface CKT.

3 3

HDMI CEC Controller

R5F211A4SP

page 21

page 18

PCIeMini Card WiMax

USB port 7

page 27

PCIeMini Card WLAN

PCIe port 4

page 27

page 35

HDMI Conn.

page 18

PCIeMini Card 3G/GPS/UWB

PCIeMini Card Reserve

RJ45

page 28

USB port 6

page 27

PCIe port 5 PCIe port 2

page 27

Express Card

RTL8102E 10/100M RTL8111C Giga

JMB380

Power Circuit DC/DC

page 36,37,38,39 40,41,42

CRT/B

page 18

Finger print/B

page 26

LCD Conn.

page 17

PCIE-Express 16X

Level Shifter

page 18

PCIeMini Card ROBSON

page 27

USB port 8

PCIe port 1

PCIe port 3

page 25

page 28

5IN1/1394

PCIe port 6

page 31

FM tuner Conn

page 29

5V 480MHz

PCIe 1x [2,4,5]

1.5V 2.5GHz(250MB/s)

5V 480MHz

PCIe 1x

1.5V 2.5GHz(250MB/s)

PCIe 1x

1.5V 2.5GHz(250MB/s)

PCIe 1x

1.5V 2.5GHz(250MB/s)

I2C from SB

USB

Debug Port

Intel Cantiga

PM45/GM45/GL40

uFCBGA-1329

page 7,8,9,10,11,12,13

DMI x 4

Intel ICH9-M

BGA-676

page 20,21,22,23

ENE KB926 D1

page 33

C-Link

3.3V 33 MHz

LPC BUS

page 32

USB

5V 480MHz

SATA port 0

5V 1.5GHz(150MB/s)

SATA port 0

5V 1.5GHz(150MB/s)

SATA port 4

5V 1.5GHz(150MB/s)

SATA port 5

5V 1.5GHz(150MB/s)

USB port 3

5V 480MHz

HD Audio

MDC 1.5 Conn

Dual Channel

1.8V DDRII 533/667/800

USB/B

USB port 0,1

page 24

BT conn

USB port 5

page 24

SATA HDD0

SATA HDD1

SATA ODD

eSATA

page 25

3.3V 24.576MHz/48Mhz

page 26 page 29

USB/B

Power/B

4 4

FUN/B

LED/B

page 26

page 34

page 32

Touch Pad

page 34

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Int.KBD

page 33

SPI ROM

page 33

Compal Secret Data

2008/09/19 2009/09/19

C

Compal Secret Data

CIR

page 32

Deciphered Date

D

Int.

MIC CONN

page 30

MIC CONN

page 30 page 30

Title

Size Document Number Rev

Date: Sheet

HP CONN

page 30

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

AMP.

TPA6017

SPK CONN

E

page 30

243Wednesday, September 16, 2009

E

of

A

B

C

D

E

Voltage Rails

OFF

OFF OFF OFF

OFF ON ON OFF

OFF OFF

OFF

OFF ON ON OFF OFF+5V_SB 5V power rail for SB ON ON

OFF

OFFON

OFF ONON

ON OFF

OFF OFF

OFF

G3

BTO Option Table

Function

description

explain

BTO

Function

Power Plane Description

1 1

VIN B+ +CPU_CORE

Adapter power supply (19V) AC or battery power rail for power circuit.

Core voltage for CPU +0.9VS 0.9V switched power rail for DDR terminator +1.05VS +1.5VS +1.8V +3VALW

1.05V switched power rail

1.5V switched power rail

1.8V power rail for DDR

3.3V always on power rail

S1 S3 S5

ON ON ON OFF ON ON ON ON ON OFF ON OFF ON OFF OFF ON OFF OFF ON OFF

ON ON ON

ON +3VL 3.3V always on power rail ONON +3V_SB 3.3V power rail for LAN ON ON +3V_LAN 3.3V power rail for LAN ON ON +3V_WLAN 3.3V power rail for LAN ON ON +3VS +5VALW

3.3V switched power rail 5V always on power rail

ON

OFF ON ON

+5VL 5V always on power rail ON ON

2 2

+5VS +VSB VSB always on power rail ON ON +RTCVCC RTC power +CPU_CORE +VGA_PCIE_1.1VS +1.8VS

5V switched power rail

Core voltage for VGA chip

1.1V switched power rail for VGA PCIE

1.8V power rail for VRAM

ON

OFF

ON ON ON

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LOWLOWLOWLOW

(2H) (E) (C) (D2)

2HDD@ 8102E@ 8111C@

description

Intel(UMA)

IHDMI@

External PCI Devices

explain

BTO

SIGNAL

SLP_S1# SLP_S3#

SLP_S4# SLP_S5#

HIGH HIGH HIGH HIGH

LOW

HIGH

HIGHHIGHHIGH

HIGH

LOWLOWLOW

HIGH

LOW LOW LOW LOW

LAN2nd HDD Mini card

(D3)

RJ11/FM tuner

(R) (M)

10/100M Giga Two Crads three Crads RJ11 FM

HDMI

(Y)

ATI VGA/B

NIHDMI@ HDMI@

WLAN@ GPS@ NAND@

TV-out

(S)

CIR

(I)

COMMON

H@

TVOUT@

CIR@

MDC@ FM@

CAMERA & MIC

(X)

CAMERA MIC

CAM@ MIC@

3G SIM slot

(G)

3G@

Finger printer

(F)

FP@

EC SM Bus1 address

3 3

Device

EC KB926 C0+5VL EC KB926 C0+3VS Smart Battery+5VL HDMI-CEC

+5VL +5VL

FUN/B (CAP Sensor)

Address Address

0001 011X b 0011 010x b

EC SM Bus2 address

Device

PowerPower

CPU THM Sen

+3VS

SMSC SMC1402 VGA THM Sen

+3VS

ADM1032ARMZ VGA on die

thermal sensor

0100 110x b 1001 110Xb

1001 111Xb

need to confirm

Function

description

explain

BTO

Felica BLUE TOOTH

(J)

FLICA@

(B)

BT@

ICH9M SM Bus address

Power

+3V_SB

4 4

+3VS +3VS +3VS +3VS +3VS

Device

ICH9M Clock Generator

(SLG8SP556V) DDR DIMM0 DDR DIMM1 Express FM Module

A

Address

1101 001Xb

1001 000Xb 1001 010Xb

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

E

of

343Wednesday, September 16, 2009

of

343Wednesday, September 16, 2009

of

343Wednesday, September 16, 2009

E

5

@

AA4 AB2 AA3

D22

K5 M3 N2

N3 P5 P2

P4 P1 R1 M1

K3 H2 K2

Y2 U5 R3

W6

U4 Y5 U1 R4 T5

T3 W2 W5

Y4

U2

V4 W3

V1

A6

A5

C4

D5

C6

B4

A3

M4

N5

T2

V3

B2

D2

D3

F6

J4 L5 L4

J1

L2

J3 L1

@ JCPUA

JCPUA

A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#

REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#

A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]#

A20M# FERR# IGNNE#

STPCLK# LINT0 LINT1 SMI#

RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09]

Penryn

ADDR GROUP_0

ADS# BNR# BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HIT#

HITM#

ADDR GROUP_1

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY# PREQ#

TCK

TDI TDO TMS

TRST#

DBR#

XDP/ITP SIGNALS

THERMAL

PROCHOT#

THERMDA THERMDC

ICH

THERMTRIP#

H CLK

BCLK[0] BCLK[1]

RESERVED

H1 E2 G5

H5 F21 E1

F1 D20

B3 H4 C1

F3 F4 G3 G2

G6 E4

AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20

D21 A24 B25

C7

A22 A21

H_A#[3..16]7

D D

H_ADSTB#07

H_REQ#07 H_REQ#17 H_REQ#27 H_REQ#37 H_REQ#47

H_A#[17..35]7

C C

H_ADSTB#17

H_A20M#21 H_FERR#21 H_IGNNE#21

H_STPCLK#21 H_INTR21 H_NMI21 H_SMI#21

Reserve for debug close to South Bridge

B B

H_FERR#

C596 180P_0402_50V8J@C596 180P_0402_50V8J@

12

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8

H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_A20M# H_FERR# H_IGNNE#

H_STPCLK# H_INTR H_NMI H_SMI#

4

H_IERR#

R1 56_0402_5%R1 56_0402_5%

XDP_TCK XDP_TDI

XDP_TMS

XDP_TRST#

XDP_DBRESET#

H_PROCHOT# H_THERMDA H_THERMDC

1 2

H_INIT#

H_RESET#

H_ADS# 7 H_BNR# 7

H_BPRI# 7

H_DEFER# 7 H_DRDY# 7 H_DBSY# 7

H_BR0# 7

H_INIT# 21

H_LOCK# 7

H_RESET# 7

H_RS#0 7

H_RS#1 7

H_RS#2 7

H_TRDY# 7

H_HIT# 7 H_HITM# 7

XDP_DBRESET# 22

H_THERMTRIP# 8,21

CLK_CPU_BCLK 16 CLK_CPU_BCLK# 16

+1.05VS

if use XDP,these resistor are 51ohm

XDP_TMS XDP_TDI

XDP_TCK XDP_TRST#

+1.05VS

3

+1.05VS

1 2

R4 54.9_0402_1%R4 54.9_0402_1%

1 2

R5 54.9_0402_1%R5 54.9_0402_1%

1 2

R6 54.9_0402_1%R6 54.9_0402_1%

1 2

R7 54.9_0402_1%R7 54.9_0402_1%

1 2

R8 56_0402_5%@R8 56_0402_5%@

1 2

R9 56_0402_5%R9 56_0402_5%

H_PROCHOT#

PROCHOT# PU: 68Ohm near CPU and MVP6. 56Ohm near CPU if no used.

H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil

B

2

E

3 1

Q6

Q6 MMBT3904_SOT23@

MMBT3904_SOT23@

C

EN_DFAN132

+3VS

OCP# 22

+FAN1

10mil

+3VS

0.1U_0402_16V4Z

C2

1 2

2200P_0402_50V7K

R3

1 2

10K_0402_5%

+5VS

1A

1

2

1

C1

2

H_THERMDA H_THERMDC CPU_THERM#

U2

1

VEN

2

VIN

3

VO

4

VSET

G990P11U_SOP8

C5

C5 10U_0805_10V4Z

10U_0805_10V4Z

2

U1

1

VDD

2

DP

3

DN

4

THERM#

EMC1402-1-ACZL-TR_MSOP8

Address:0100_1100 EMC1402-1 Address:0100_1101 EMC1402-2

SMCLK

SMDATA

ALERT#

GND

8 7 6 5

1 2

R2 10K_0402_5%

FAN Control Circuit

12

1SS355_SOD323-2

1SS355_SOD323-2 D1

D1

12

D2

BAS16_SOT23-3

2

1

+FAN1

C4 1000P_0402_25V8J@C41000P_0402_25V8J@

C3

10U_0805_10V4Z

8

GND

7

GND

6

GND

5

GND

2

1

EC_SMB_CK2 17,32 EC_SMB_DA2 17,32

@

Reserve for source control

+3VS

1 2 3

4 5

ACES_85204-0300N

R10 10K_0402_5%R10 10K_0402_5%

2

C6

0.01U_0402_16V7K

1

@

JFAN

1 2 3

GND GND

12

+3VS

FAN_SPEED1 32

H_SMI# H_INIT# H_NMI H_A20M# H_INTR H_IGNNE#

H_STPCLK#

A A

12

C597 180P_0402_50V8J@C597 180P_0402_50V8J@

12

C598 180P_0402_50V8J@C598 180P_0402_50V8J@

12

C599 180P_0402_50V8J@C599 180P_0402_50V8J@

12

C600 180P_0402_50V8J@C600 180P_0402_50V8J@

12

C601 180P_0402_50V8J@C601 180P_0402_50V8J@

12

C602 180P_0402_50V8J@C602 180P_0402_50V8J@

12

C603 180P_0402_50V8J@C603 180P_0402_50V8J@

Reserve for debug close to CPU

5

Security Classification

2008/09/19 2009/09/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

1

E

of

443Wednesday, September 16, 2009

of

443Wednesday, September 16, 2009

of

443Wednesday, September 16, 2009

5

H_D#[0..15]7

D D

H_DSTBN#07 H_DSTBP#07 H_DINV#07 H_D#[16..31]7

C C

R11

1K_0402_1%

R17

2K_0402_1%

+1.05VS

12

Close to CPU pin AD26 within 500mils.

+CPU_GTLREF

H_DSTBN#17 H_DSTBP#17 H_DINV#17

CPU_BSEL08,16 CPU_BSEL18,16 CPU_BSEL28,16

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

+CPU_GTLREF

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

B B

CPU_BSEL CPU_BSEL2 CPU_BSEL1

166

200

01

0

1

CPU_BSEL0

266 0 0 0

G22 G25

G24

H26 H25

M24 M23

R24

N25 M26

N24

AD26

C23 D25 C24

AF26

AF1

C21

1

0

E22 F24 E26

F23 E25

E23 K24

H22 F26 K22 H23

N22 K25 P26 R23 L23

L22 P25

P23 P22 T24

L25 T25

L26

A26 B22

B23

J24 J23

J26

C3

4

@

@ JCPUB

JCPUB

D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#

D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#

GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 BSEL[0] BSEL[1] BSEL[2]

Penryn

DATA GRP 0

MISC

DATA GRP 1

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]#

DATA GRP 2DATA GRP 3

D[41]# D[42]# D[43]# D[44]# D[45]# D[46]#

D[47]# DSTBN[2]# DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]# DSTBN[3]# DSTBP[3]#

DINV[3]# COMP[0]

COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

H_CPUSLP#

H_PWRGOOD

H_DPRSTP# H_DPSLP#

Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

C650 180P_0402_50V8J@C650 180P_0402_50V8J@ C651 180P_0402_50V8J@C651 180P_0402_50V8J@ C652 180P_0402_50V8J@C652 180P_0402_50V8J@ C653 180P_0402_50V8J@C653 180P_0402_50V8J@

H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

COMP0 COMP1 COMP2 COMP3

H_DPRSTP# H_DPSLP#

H_PWRGOOD H_CPUSLP#

12 12 12 12

3

H_D#[32..47] 7

H_DSTBN#2 7 H_DSTBP#2 7 H_DINV#2 7 H_D#[48..63] 7

H_DSTBN#3 7 H_DSTBP#3 7 H_DINV#3 7

H_DPRSTP# 8,21,42 H_DPSLP# 21 H_DPWR# 7 H_PWRGOOD 21 H_CPUSLP# 7 H_PSI# 42

2

Resistor placed within

0.5" of CPU pin.Trace should be at least 25 mils away from any other toggling signal. COMP[0,2] trace width is 18 mils. COMP[1,3] trace width is 4 mils.

COMP0

1 2

R12 27.4_0402_1%R12 27.4_0402_1%

COMP1

1 2

R13 54.9_0402_1%R13 54.9_0402_1%

COMP2

1 2

R15 27.4_0402_1%R15 27.4_0402_1%

COMP3

1 2

R18 54.9_0402_1%R18 54.9_0402_1%

layout note: Please use "Daisy Chain" to layout and the signal (H_DPRSTP#) is routed from ICH9 to power IC, then to NB and CPU

Reserve for debug close to CPU

@

@ JCPUD

JCPUD

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080] VSS[081]P3VSS[162]

Penryn

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]

VSS[163]

1

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

.

A A

Security Classification

2008/09/19 2009/09/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

1

E

of

543Wednesday, September 16, 2009

of

543Wednesday, September 16, 2009

of

543Wednesday, September 16, 2009

5

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]

VCCA[01] VCCA[02]

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

VCCSENSE

VSSSENSE

+CPU_CORE

330U_D2_2VY_R7M

1

+

C8

C7

C7 @

@

.

VCCSENSE

C8

2

330U_D2_2VY_R7M

change highly to H1.9 for thermal type issue.

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

VCCSENSE

AF7

VSSSENSE

AE7

330U_D2_2VY_R7M

1

+

2

1

+

C9

2

+1.05VS

1

2

CPU_VID0 42 CPU_VID1 42 CPU_VID2 42 CPU_VID3 42 CPU_VID4 42 CPU_VID5 42 CPU_VID6 42

VCCSENSE 42

VSSSENSE 42

Near CPU CORE regulator

ESR <= 1.5m ohm Capacitor > 1980uF

D D

+CPU_CORE +CPU_CORE

C C

B B

AA10 AA12 AA13 AA15 AA17 AA18 AA20

AC10 AB10 AB12 AB14 AB15 AB17 AB18

A10 A12 A13 A15 A17 A18 A20

B10 B12 B14 B15 B17 B18 B20

C10 C12 C13 C15 C17 C18

D10 D12 D14 D15 D17 D18

E10 E12 E13 E15 E17 E18 E20

F10 F12 F14 F15 F17 F18 F20 AA7 AA9

AB9

A7 A9

B7 B9

C9

D9

E7 E9

F7 F9

@

@ JCPUC

JCPUC

VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067]

Penryn

4

1

+

C10

2

330U_D2_2VY_R7M

+

C43

C43 330U_D2_2VY_R7M

330U_D2_2VY_R7M

Near pin B26

1

2

+CPU_CORE

R19100_0402_1% R19100_0402_1%

12

Mid Frequence Decoupling

+1.05VS

1

2

C50

0.01U_0402_16V7K

+CPU_CORE

Place these capacitors on L8 (North side,Secondary Layer)

+CPU_CORE

Place these capacitors on L8 (North side,Secondary Layer)

+CPU_CORE

Place these capacitors on L8 (Sorth side,Secondary Layer)

+CPU_CORE

Place these capacitors on L8 (Sorth side,Secondary Layer)

Place these inside socket cavity on L8 (North side Secondary)

1

C45

C44

0.1U_0402_10V6K

+1.5VS

1

C51

C51 10U_0805_6.3V6M

10U_0805_6.3V6M

2

C45

0.1U_0402_10V6K

2

1

C11

C11 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C19

C19 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C27

C27 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C35

C35 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

2

3

1

C12

C12 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C20

C20 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C28

C28 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C36

C36 10U_0805_6.3V6M

10U_0805_6.3V6M

2

C46

0.1U_0402_10V6K

1

C47

0.1U_0402_10V6K

2

1

C13

C13 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C21

C21 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C29

C29 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C37

C37 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C48

0.1U_0402_10V6K

2

1

C14

C14 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C22

C22 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C30

C30 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C38

C38 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C49

0.1U_0402_10V6K

2

1

C15

C15 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C23

C23 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C31

C31 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C39

C39 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C16

C16 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C24

C24 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C32

C32 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C40

C40 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C17

C17 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C25

C25 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C33

C33 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C41

C41 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C18

C18 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C26

C26 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C34

C34 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C42

C42 10U_0805_6.3V6M

10U_0805_6.3V6M

2

VSSSENSE

A A

Close to CPU pin

R20100_0402_1% R20100_0402_1%

12

within 500mils.

Security Classification

Length match within 25 mils. The trace width/space/other is 14/7/25.

5

Security Classification

2008/09/19 2009/09/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

643Wednesday, September 16, 2009

1

E

of

5

4

3

2

1

U3A

H_D#[0..63]5

D D

C C

Layout Note: H_RCOMP / +H_VREF / H_SWNG

trace width and spacing is 10/20

within 100 mils from NB

+1.05VS+1.05VS

12

B B

R21

R21 1K_0402_1%

1K_0402_1%

12

R23

R23 2K_0402_1%

2K_0402_1%

1

C52

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

H_RCOMP+H_VREF

12

R24

24.9_0402_1%

12

R22

R22 221_0402_1%

221_0402_1%

H_SWING=0.3125*VCCP

12

R25

R25 100_0402_1%

100_0402_1%

H_SWNG

1

2

C53

0.1U_0402_16V4Z

H_RESET#4

H_CPUSLP#5

Near B3 pin

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWNG H_RCOMP

+H_VREF

U3A

F2

H_D#_0

G8

H_D#_1

F8

H_D#_2

E6

H_D#_3

G2

H_D#_4

H6

H_D#_5

H2

H_D#_6

F6

H_D#_7

D4

H_D#_8

H3

H_D#_9

M9

H_D#_10

M11

H_D#_11

J1

H_D#_12

J2

H_D#_13

N12

H_D#_14

J6

H_D#_15

P2

H_D#_16

L2

H_D#_17

R2

H_D#_18

N9

H_D#_19

L6

H_D#_20

M5

H_D#_21

J3

H_D#_22

N2

H_D#_23

R1

H_D#_24

N5

H_D#_25

N6

H_D#_26

P13

H_D#_27

N8

H_D#_28

L7

H_D#_29

N10

H_D#_30

M3

H_D#_31

Y3

H_D#_32

AD14

H_D#_33

Y6

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

Y7

H_D#_38

W2

H_D#_39

AA8

H_D#_40

Y9

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

C5

H_SWING

E3

H_RCOMP

C12

H_CPURST#

E11

H_CPUSLP#

A11

H_AVREF

B11

H_DVREF

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329 GMR3@

GMR3@

H_ADSTB#_0 H_ADSTB#_1

H_BREQ#

H_DEFER#

HOST

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_HIT#

H_HITM#

H_RS#_0 H_RS#_1 H_RS#_2

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20

H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_A#[3..35] 4

H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4

H_BNR# 4 H_BPRI# 4

H_BR0# 4 H_DEFER# 4

H_DBSY# 4

CLK_MCH_BCLK 16 CLK_MCH_BCLK# 16

H_DPWR# 5

H_DRDY# 4 H_HIT# 4 H_HITM# 4

H_LOCK# 4

H_TRDY# 4

H_DINV#0 5 H_DINV#1 5 H_DINV#2 5 H_DINV#3 5

H_DSTBN#0 5 H_DSTBN#1 5 H_DSTBN#2 5 H_DSTBN#3 5

H_DSTBP#0 5 H_DSTBP#1 5 H_DSTBP#2 5 H_DSTBP#3 5

H_REQ#0 4 H_REQ#1 4 H_REQ#2 4 H_REQ#3 4 H_REQ#4 4

H_RS#0 4 H_RS#1 4 H_RS#2 4

A A

Security Classification

2008/09/19 2009/09/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

743Wednesday, September 16, 2009

1

E

of

Strap Pin Table

5

011 = FSB667

CFG[2:0]

Internal pull-up

CFG5

Internal pull-up

CFG6

D D

C C

B B

+3VS

A A

Internal pull-up

CFG7

Internal pull-up

CFG9

Internal pull-up

CFG10 CFG[13:12]

Internal pull-up

CFG16

Internal pull-down

CFG19 CFG20

Internal pull-down

(PCIE/SDVO select)

1 2

R52 10K_0402_5%R52 10K_0402_5%

PM_PWROK22,32

010 = FSB800 000 = FSB1067

0 = DMI x 2 1 = DMI x 4

0 = iTPM Host Interface is enabled

1 = iTPM Host Interface is Disabled 0 = Intel Management Engine Crypto Transport Layer Security

(TLS) cipher suite with no confidentiality 1 = Intel Management Engine Crypto TLS cipher suite with

confidentiality 0 = Lane Reversal Enable

0 = PCIe Loopback Enable 1 = Disable

01 = All Z Mode Enabled 00 = Reserved 10 = XOR Mode Enabled 11 = Normal Operation

0 = Dynamic ODT Disabled 1 = Dynamic ODT Enabled

0 = Normal Operation 1 = DMI Lane Reversal Enable

(Default)

*

(Default)

*

(Default)

*

(Default)1 = Normal Operation

*

(Default)

*

can support disble by SW.

(Default)

*

(Default)

*

0 = Only PCIE or [SDVO/DP/HDMI] is operational. 1 = PCIE/[SDVO/DP/HDMI] are operating simu.

R35 1K_0402_5%R35 1K_0402_5% R36 1K_0402_5%R36 1K_0402_5% R37 1K_0402_5%R37 1K_0402_5%

R39 2.21K_0402_1%@R39 2.21K_0402_1%@ R40 2.21K_0402_1%@R40 2.21K_0402_1%@ R43 2.21K_0402_1%@R43 2.21K_0402_1%@

R44 2.21K_0402_1%@R44 2.21K_0402_1%@ R45 2.21K_0402_1%@R45 2.21K_0402_1%@

R46 2.21K_0402_1%@R46 2.21K_0402_1%@ R47 2.21K_0402_1%@R47 2.21K_0402_1%@

+3VS

R48 2.21K_0402_1%@R48 2.21K_0402_1%@

R49 4.02K_0402_1%R49 4.02K_0402_1% R50 4.02K_0402_1%@R50 4.02K_0402_1%@

R51 0_0402_5%R51 0_0402_5%

R53 0_0402_5%R53 0_0402_5% R54 100_0402_5%R54 100_0402_5%

R55 0_0402_5%R55 0_0402_5% R56 0_0402_5%R56 0_0402_5%

GMCH_PWROK

1 2 1 2 1 2

1 2 1 2

1 2

1 2 1 2

1 2

1 2 1 2

PM_EXTTS#_R

Use VGATE for GMCH_PWROK

VGATE22,32,42

5

CPU_BSEL05,16 CPU_BSEL15,16 CPU_BSEL25,16

PM_SYNC#22

PM_EXTTS#14,15

PLT_RST#17,20,25,27,28,31,32,33 H_THERMTRIP#4,21 PM_DPRSLPVR22,42

1 2

R58 0_0402_5%@R58 0_0402_5%@

1 2

R59 0_0402_5%R59 0_0402_5%

4

U3B

M36

RSVD1

N36

RSVD2

R33

RSVD3

T33

RSVD4

AH9

RSVD5

AH10

RSVD6

AH12

RSVD7

AH13

RSVD8

K12

RSVD9

AL34

RSVD10

AK34

RSVD11

AN35

RSVD12

AM35

RSVD13

T24

RSVD14

B31

RSVD15

B2

RSVD16

M1

RSVD17

AY21

RSVD20

BG23

RSVD22

BF23

RSVD23

BH18

RSVD24

BF18

RSVD25

(Default)

*

4

MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2

MCH_CFG_5 MCH_CFG_6 MCH_CFG_7

MCH_CFG_9 MCH_CFG_10

MCH_CFG_12 MCH_CFG_13

MCH_CFG_16

MCH_CFG_19 MCH_CFG_20

PM_SYNC#_R

PM_EXTTS#_R GMCH_PWROK MCH_RSTIN# NB_THERMTRIP# DPRSLPVR

12 12 12

H_DPRSTP#5,21,42

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC_1

BF48

NC_2

BD48

NC_3

BC48

NC_4

BH47

NC_5

BG47

NC_6

BE47

NC_7

BH46

NC_8

BF46

NC_9

BG45

NC_10

BH44

NC_11

BH43

NC_12

BH6

NC_13

BH5

NC_14

BG4

NC_15

BH3

NC_16

BF3

NC_17

BH2

NC_18

BG2

NC_19

BE2

NC_20

BG1

NC_21

BF1

NC_22

BD1

NC_23

BC1

NC_24

F1

NC_25

A47

NC_26

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329 GMR3@

GMR3@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

RSVD CFG PM NC

3

DDR CLK/ CONTROL/ COMPENSATIONHDA

DPLL_REF_SSCLK#

CLKDMIGRAPHICS VIDMEMISC

3

AP24

SA_CK_0

AT21

SA_CK_1

AV24

SB_CK_0

AU20

SB_CK_1

AR24

SA_CK#_0

AR21

SA_CK#_1

AU24

SB_CK#_0

AV20

SB_CK#_1

BC28

SA_CKE_0

AY28

SA_CKE_1

AY36

SB_CKE_0

BB36

SB_CKE_1

BA17

SA_CS#_0

AY16

SA_CS#_1

AV16

SB_CS#_0

AR13

SB_CS#_1

BD17

SA_ODT_0

AY17

SA_ODT_1

BF15

SB_ODT_O

AY13

SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

PEG_CLK

PEG_CLK#

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

CL_VREF

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

2008/09/19 2009/09/19

SMRCOMP

BG22

SMRCOMP#

BH21

+SM_RCOMP_VOH

BF28

+SM_RCOMP_VOL

BH28

+SM_VREF

AV42

SM_PWROK

AR36

SM_REXT

BF17 BC36

CLK_DREF_96M

B38

CLK_DREF_96M#

A38

CLK_DREF_SSC

E41

CLK_DREF_SSC#

F41 F43

E43

AE41 AE37 AE47 AH39

AE40 AE38 AE48 AH40

AE35 AE43 AE46 AH42

AD35 AE44 AF46 AH43

B33 B32 G33 F33 E33

C34

AH37 AH36

PM_PWROK

AN36 AJ35

+CL_VREF

AH34

+CL_VREF=0.355V

N28 M28

SDVO_SCLK

G36

SDVO_SDATA

E36 K36 H36

MCH_TSATN#

B12

B28 B30

AZ_SDIN2_MCH_R

B29 C29 A28

Compal Secret Data

DDRA_CLK0 14 DDRA_CLK1 14 DDRB_CLK0 15 DDRB_CLK1 15

DDRA_CLK0# 14 DDRA_CLK1# 14 DDRB_CLK0# 15 DDRB_CLK1# 15

DDRA_CKE0 14 DDRA_CKE1 14 DDRB_CKE0 15 DDRB_CKE1 15

DDRA_SCS0# 14 DDRA_SCS1# 14 DDRB_SCS0# 15 DDRB_SCS1# 15

DDRA_ODT0 14 DDRA_ODT1 14 DDRB_ODT0 15 DDRB_ODT1 15

R29 80.6_0402_1%R29 80.6_0402_1%

1 2

R30 80.6_0402_1%R30 80.6_0402_1%

1 2

R32 0_0402_5%R32 0_0402_5%

1 2

R33 499_0402_1%R33 499_0402_1%

1 2

CLK_DREF_96M 16 CLK_DREF_96M# 16 CLK_DREF_SSC 16 CLK_DREF_SSC# 16

CLK_MCH_3GPLL 16 CLK_MCH_3GPLL# 16

DMI_ITX_MRX_N0 20 DMI_ITX_MRX_N1 20 DMI_ITX_MRX_N2 20 DMI_ITX_MRX_N3 20

DMI_ITX_MRX_P0 20 DMI_ITX_MRX_P1 20 DMI_ITX_MRX_P2 20 DMI_ITX_MRX_P3 20

DMI_MTX_IRX_N0 20 DMI_MTX_IRX_N1 20 DMI_MTX_IRX_N2 20 DMI_MTX_IRX_N3 20

DMI_MTX_IRX_P0 20 DMI_MTX_IRX_P1 20 DMI_MTX_IRX_P2 20 DMI_MTX_IRX_P3 20

CL_CLK0 22 CL_DATA0 22

CL_RST#0 22

SDVO_SCLK 19 SDVO_SDATA 19

CLKREQ_3GPLL# 16

MCH_ICH_SYNC# 22

AZ_BITCLK_MCH 21 AZ_RST_MCH# 21

AZ_SDOUT_MCH 21 AZ_SYNC_MCH 21

Deciphered Date

2

SM_DRAMRST# would be needed for DDR3 only

For Cantiga 80 Ohm

+1.8V

20mil

1

C58

0.1U_0402_16V4Z

2

@

Lane reversal

SDVO_CTRLDATA

(Internal pull-down)

DDPC_CTRLDATA

(Internal pull-down)

Width:Spacing 12mil:12mil

1

C59

0.1U_0402_16V4Z

2

1 2

R63 33_0402_5%

IHDMI@

1

+SM_RCOMP_VOH

1

C54

0.01U_0402_16V7K

+SM_RCOMP_VOL

0.01U_0402_16V7K

+1.8V

54.9_0402_1%

MCH_TSATN#

0.01U_0402_16V7K

R31

R31 1K_0402_1%

1K_0402_1%

1 2

R34

R34 1K_0402_1%

1K_0402_1%

1 2

CLK_DREF_96M CLK_DREF_96M# CLK_DREF_SSC CLK_DREF_SSC#

Please place these resistors close to related balls

+1.05VS

12

R41

B

2

E

3 1

Q7

Q7 MMBT3904_SOT23-3

MMBT3904_SOT23-3

2

1

C56

2

PM@

1 2

R575 0_0402_5%

PM@

1 2

R576 0_0402_5%

PM@

1 2

R577 0_0402_5%

PM@

1 2

R578 0_0402_5%

+3VS

R38

R38 1K_0402_5%

1K_0402_5%

C

Strap Pin Table

0 = SDVO interface disabled 1 = SDVO interface enabled

0 = Digital display (iHDMI/DP) interface disabled 1 = Digital display (iHDMI/DP) interface enabled

+1.05VS

R57

1K_0402_1%

CL_VREF

1 2

should be

0.35 V

R60

499_0402_1%

1 2

SDVO_SCLK

R61

SDVO_SDATA

R62

the strap pin will impact no IHDMI SKU if mount R62

AZ_SDIN2_MCH 21

Title

Size Document Number Rev

Date: Sheet

(Default)

*

R61

PM@

R61

PM@

0_0402_5%

R62

PM@

R62

PM@

0_0402_5%

2.2K_0402_5%

12

GM@R61

GM@

2.2K_0402_5%

12

IHDMI@R62

IHDMI@

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

1

1K_0402_1%

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K C55

C55

3.01K_0402_1%

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K C57

C57

1K_0402_1%

12

R42

R42 1K_0402_5%

1K_0402_5%

(Default)

*

GM@

1 2

R579 0_0402_5%

PM@

1 2

R580 0_0402_5%

843Wednesday, September 16, 2009

+1.8V

12

R26

12

R27

12

R28

MCH_TSATN_EC# 32

+3VS

of

E

5

D D

DDR_A_D[0..63]14 DDR_B_D[0..63]15

C C

B B

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

U3D

AJ38

SA_DQ_0

AJ41

SA_DQ_1

AN38

SA_DQ_2

AM38

SA_DQ_3

AJ36

SA_DQ_4

AJ40

SA_DQ_5

AM44

SA_DQ_6

AM42

SA_DQ_7

AN43

SA_DQ_8

AN44

SA_DQ_9

AU40

SA_DQ_10

AT38

SA_DQ_11

AN41

SA_DQ_12

AN39

SA_DQ_13

AU44

SA_DQ_14

AU42

SA_DQ_15

AV39

SA_DQ_16

AY44

SA_DQ_17

BA40

SA_DQ_18

BD43

SA_DQ_19

AV41

SA_DQ_20

AY43

SA_DQ_21

BB41

SA_DQ_22

BC40

SA_DQ_23

AY37

SA_DQ_24

BD38

SA_DQ_25

AV37

SA_DQ_26

AT36

SA_DQ_27

AY38

SA_DQ_28

BB38

SA_DQ_29

AV36

SA_DQ_30

AW36

SA_DQ_31

BD13

SA_DQ_32

AU11

SA_DQ_33

BC11

SA_DQ_34

BA12

SA_DQ_35

AU13

SA_DQ_36

AV13

SA_DQ_37

BD12

SA_DQ_38

BC12

SA_DQ_39

BB9

SA_DQ_40

BA9

SA_DQ_41

AU10

SA_DQ_42

AV9

SA_DQ_43

BA11

SA_DQ_44

BD9

SA_DQ_45

AY8

SA_DQ_46

BA6

SA_DQ_47

AV5

SA_DQ_48

AV7

SA_DQ_49

AT9

SA_DQ_50

AN8

SA_DQ_51

AU5

SA_DQ_52

AU6

SA_DQ_53

AT5

SA_DQ_54

AN10

SA_DQ_55

AM11

SA_DQ_56

AM5

SA_DQ_57

AJ9

SA_DQ_58

AJ8

SA_DQ_59

AN12

SA_DQ_60

AM13

SA_DQ_61

AJ11

SA_DQ_62

AJ12

SA_DQ_63

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329 GMR3@

GMR3@

DDR SYSTEM MEMORY A

4

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7

SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

BD21 BG18 AT25

BB20 BD20 AY20

AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7

AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8

DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14

DDR_A_BS0 14 DDR_A_BS1 14 DDR_A_BS2 14

DDR_A_RAS# 14 DDR_A_CAS# 14 DDR_A_WE# 14

DDR_A_DM[0..7] 14

DDR_A_DQS[0..7] 14

DDR_A_DQS#[0..7] 14

DDR_A_MA[0..14] 14

3

U3E DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

U3E

AK47 AH46 AP47 AP46

AJ46

AJ48 AM48 AP48 AU47 AU46 BA48 AY48 AT47 AR47 BA47 BC47 BC46 BC44 BG43

BF43 BE45 BC41

BF40

BF41 BG38

BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11

BG8

BH12

BF11

BF8 BG7 BC5 BC6 AY3 AY1

BF6

BF5 BA1 BD3 AV2 AU3 AR3 AN2 AY2 AV1 AP3 AR1

AL1

AL2

AJ1 AH1 AM2 AM3 AH3

AJ3

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329 GMR3@

GMR3@

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

2

BC16

SB_BS_0

BB17

SB_BS_1

BB33

SB_BS_2

AU17

SB_RAS#

BG16

SB_CAS#

BF14

SB_WE#

DDR_B_DM0

AM47

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7

SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2

DDR SYSTEM MEMORY B

SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6

AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8

DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14

1

DDR_B_BS0 15 DDR_B_BS1 15 DDR_B_BS2 15

DDR_B_RAS# 15 DDR_B_CAS# 15 DDR_B_WE# 15

DDR_B_DM[0..7] 15

DDR_B_DQS[0..7] 15

DDR_B_DQS#[0..7] 15

DDR_B_MA[0..14] 15

A A

Security Classification

2008/09/19 2009/09/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

943Wednesday, September 16, 2009

1

E

of

5

4

3

2

1

+3VS

UMA_LCD_EDID_CLK UMA_LCD_EDID_DATA

(Default)0 = LFP Disable

*

GM@

GM@ GM@

GM@

LCTLA_CLK LCTLB_DATA

TV_COMPS TV_LUMA TV_CRMA

UMA_CRT_B UMA_CRT_G UMA_CRT_R

UMA_CRT_CLK UMA_CRT_DATA

UMA_CRT_HSYNC UMA_CRT_VSYNC

UMA_ENBKL32

UMA_LCD_EDID_CLK17 UMA_LCD_EDID_DATA17

UMA_ENVDD17

R69

2.37K_0402_1%

2.37K_0402_1% R501 0_0402_5%GM@R501 0_0402_5%GM@ R502 0_0402_5%GM@R502 0_0402_5%GM@

UMA_LCD_TXCLK-17 UMA_LCD_TXCLK+17 UMA_LCD_TZCLK-17 UMA_LCD_TZCLK+17

UMA_LCD_TXOUT0-17 UMA_LCD_TXOUT1-17 UMA_LCD_TXOUT2-17

UMA_LCD_TXOUT0+17 UMA_LCD_TXOUT1+17 UMA_LCD_TXOUT2+17

UMA_LCD_TZOUT0-17 UMA_LCD_TZOUT1-17 UMA_LCD_TZOUT2-17

UMA_LCD_TZOUT0+17 UMA_LCD_TZOUT1+17 UMA_LCD_TZOUT2+17

UMA_CRT_B18 UMA_CRT_G18 UMA_CRT_R18

UMA_CRT_CLK18 UMA_CRT_DATA18

UMA_CRT_HSYNC18

R78 1.02K_0402_1%GM@R78 1.02K_0402_1%GM@

UMA_CRT_VSYNC18

UMA_LCD_EDID_CLK UMA_LCD_EDID_DATA

GM@R69

GM@

1 2

Spacing=20mil

1 2 1 2

TV_COMPS TV_LUMA TV_CRMA

UMA_CRT_B UMA_CRT_G UMA_CRT_R

UMA_CRT_CLK UMA_CRT_DATA UMA_CRT_HSYNC UMA_CRT_IREF

12

UMA_CRT_VSYNC

LCTLA_CLK LCTLB_DATA

UMA_ENVDD

LVDS_IBG

GM@

1 2

R499 0_0402_5%GM@R499 0_0402_5%GM@

1 2

R500 0_0402_5%PM@R500 0_0402_5%PM@

D D

GM@

1 2

R64 10K_0402_5%

GM@

1 2

R66 10K_0402_5%

GM@

1 2

R67 2.2K_0402_5%

GM@

1 2

R68 2.2K_0402_5%

L_DDC_DATA 1 = LFP Card Present; PCIE disable

R64

PM@

R64

PM@

0_0402_5%

R66

PM@

R66

PM@

0_0402_5%

R67

PM@

R67

PM@

0_0402_5%

R68

PM@

R68

PM@

0_0402_5%

C C

R70

PM@

R70

PM@

0_0402_5%

R71

PM@

R71

PM@

0_0402_5%

R72

PM@

R72

PM@

0_0402_5%

R73

PM@

R73

PM@

0_0402_5%

R74

PM@

R74

PM@

0_0402_5%

R75

PM@

R75

PM@

0_0402_5%

R78

PM@

R78

B B

0_0402_5%

PM@

1 2

R70 75_0402_1%

1 2

R71 75_0402_1%

1 2

R72 75_0402_1%

1 2

R73 150_0402_1%GM@R73 150_0402_1%GM@

1 2

R74 150_0402_1%GM@R74 150_0402_1%GM@

1 2

R75 150_0402_1%GM@R75 150_0402_1%GM@

+3VS

1 2

R76 4.7K_0402_5%GM@R76 4.7K_0402_5%GM@

1 2

R77 4.7K_0402_5%GM@R77 4.7K_0402_5%GM@

1 2

R503 0_0402_5%PM@R503 0_0402_5%PM@

1 2

R504 0_0402_5%PM@R504 0_0402_5%PM@

U3C

L32

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

within 500 mils

PEG_COMP

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9

PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8 PEG_TX_9

T37 T36

PCIE_GTX_C_MRX_N0

H44

PCIE_GTX_C_MRX_N1

J46

PCIE_GTX_C_MRX_N2

L44

PCIE_GTX_C_MRX_N3

L40

PCIE_GTX_C_MRX_N4

N41

PCIE_GTX_C_MRX_N5

P48

PCIE_GTX_C_MRX_N6

N44

PCIE_GTX_C_MRX_N7

T43

PCIE_GTX_C_MRX_N8

U43

PCIE_GTX_C_MRX_N9

Y43

PCIE_GTX_C_MRX_N10

Y48

PCIE_GTX_C_MRX_N11

Y36

PCIE_GTX_C_MRX_N12

AA43

PCIE_GTX_C_MRX_N13

AD37

PCIE_GTX_C_MRX_N14

AC47

PCIE_GTX_C_MRX_N15

AD39

PCIE_GTX_C_MRX_P0

H43

PCIE_GTX_C_MRX_P1

J44

PCIE_GTX_C_MRX_P2

L43

PCIE_GTX_C_MRX_P3

L41

PCIE_GTX_C_MRX_P4

N40

PCIE_GTX_C_MRX_P5

P47

PCIE_GTX_C_MRX_P6

N43

PCIE_GTX_C_MRX_P7

T42

PCIE_GTX_C_MRX_P8

U42

PCIE_GTX_C_MRX_P9

Y42

PCIE_GTX_C_MRX_P10

W47

PCIE_GTX_C_MRX_P11

Y37

PCIE_GTX_C_MRX_P12

AA42

PCIE_GTX_C_MRX_P13

AD36

PCIE_GTX_C_MRX_P14

AC48

PCIE_GTX_C_MRX_P15

AD40

PCIE_MTX_GRX_N0

J41

PCIE_MTX_GRX_N1

M46

PCIE_MTX_GRX_N2

M47

PCIE_MTX_GRX_N3

M40

PCIE_MTX_GRX_N4

M42

PCIE_MTX_GRX_N5

R48

PCIE_MTX_GRX_N6

N38

PCIE_MTX_GRX_N7

T40

PCIE_MTX_GRX_N8

U37

PCIE_MTX_GRX_N9

U40

PCIE_MTX_GRX_N10

Y40

PCIE_MTX_GRX_N11

AA46

PCIE_MTX_GRX_N12

AA37

PCIE_MTX_GRX_N13

AA40

PCIE_MTX_GRX_N14

AD43

PCIE_MTX_GRX_N15

AC46

PCIE_MTX_GRX_P0

J42

PCIE_MTX_GRX_P1

L46

PCIE_MTX_GRX_P2

M48

PCIE_MTX_GRX_P3

M39

PCIE_MTX_GRX_P4

M43

PCIE_MTX_GRX_P5

R47

PCIE_MTX_GRX_P6

N37

PCIE_MTX_GRX_P7

T39

PCIE_MTX_GRX_P8

U36

PCIE_MTX_GRX_P9

U39

PCIE_MTX_GRX_P10

Y39

PCIE_MTX_GRX_P11

Y46

PCIE_MTX_GRX_P12

AA36

PCIE_MTX_GRX_P13

AA39

PCIE_MTX_GRX_P14

AD42

PCIE_MTX_GRX_P15

AD46

PCIE_MTX_GRX_N0 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_N3

PCIE_MTX_GRX_P0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_P3

PCIE_GTX_C_MRX_P3

10mils

PEG_COMPI

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9

LVDS TV VGA

PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8

PCI-EXPRESS GRAPHICS

PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_10

PEG_TX_11

PEG_TX_12

PEG_TX_13

PEG_TX_14

PEG_TX_15

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329 GMR3@

GMR3@

1 2

R65 49.9_0402_1%R65 49.9_0402_1%

C612 0.1U_0402_16V7KPM@C612 0.1U_0402_16V7KPM@

1 2

C614 0.1U_0402_16V7KPM@C614 0.1U_0402_16V7KPM@

1 2

C616 0.1U_0402_16V7KPM@C616 0.1U_0402_16V7KPM@

1 2

C618 0.1U_0402_16V7KPM@C618 0.1U_0402_16V7KPM@

1 2

C620 0.1U_0402_16V7KPM@C620 0.1U_0402_16V7KPM@

1 2

C622 0.1U_0402_16V7KPM@C622 0.1U_0402_16V7KPM@

1 2

C624 0.1U_0402_16V7KPM@C624 0.1U_0402_16V7KPM@

1 2

C626 0.1U_0402_16V7KPM@C626 0.1U_0402_16V7KPM@

1 2

C628 0.1U_0402_16V7KPM@C628 0.1U_0402_16V7KPM@

1 2

C630 0.1U_0402_16V7KPM@C630 0.1U_0402_16V7KPM@

1 2

C632 0.1U_0402_16V7KPM@C632 0.1U_0402_16V7KPM@

1 2

C634 0.1U_0402_16V7KPM@C634 0.1U_0402_16V7KPM@

1 2

C636 0.1U_0402_16V7KPM@C636 0.1U_0402_16V7KPM@

1 2

C638 0.1U_0402_16V7KPM@C638 0.1U_0402_16V7KPM@

1 2

C640 0.1U_0402_16V7KPM@C640 0.1U_0402_16V7KPM@

1 2

C642 0.1U_0402_16V7KPM@C642 0.1U_0402_16V7KPM@

1 2

C61 0.1U_0402_16V7KIHDMI@C61 0.1U_0402_16V7KIHDMI@

1 2

C63 0.1U_0402_16V7KIHDMI@C63 0.1U_0402_16V7KIHDMI@

1 2

C65 0.1U_0402_16V7KIHDMI@C65 0.1U_0402_16V7KIHDMI@

1 2

C67 0.1U_0402_16V7KIHDMI@C67 0.1U_0402_16V7KIHDMI@

1 2

R505 0_0402_5%IHDMI@R505 0_0402_5%IHDMI@

+1.05VS

PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15] PCIE_MTX_C_GRX_N[0..15] PCIE_MTX_C_GRX_P[0..15]

C611 0.1U_0402_16V7KPM@C611 0.1U_0402_16V7KPM@

1 2

C613 0.1U_0402_16V7KPM@C613 0.1U_0402_16V7KPM@

1 2

C615 0.1U_0402_16V7KPM@C615 0.1U_0402_16V7KPM@

1 2

C617 0.1U_0402_16V7KPM@C617 0.1U_0402_16V7KPM@

1 2

C619 0.1U_0402_16V7KPM@C619 0.1U_0402_16V7KPM@

1 2

C621 0.1U_0402_16V7KPM@C621 0.1U_0402_16V7KPM@

1 2

C623 0.1U_0402_16V7KPM@C623 0.1U_0402_16V7KPM@

1 2

C625 0.1U_0402_16V7KPM@C625 0.1U_0402_16V7KPM@

1 2

C627 0.1U_0402_16V7KPM@C627 0.1U_0402_16V7KPM@

1 2

C629 0.1U_0402_16V7KPM@C629 0.1U_0402_16V7KPM@

1 2

C631 0.1U_0402_16V7KPM@C631 0.1U_0402_16V7KPM@

1 2

C633 0.1U_0402_16V7KPM@C633 0.1U_0402_16V7KPM@

1 2

C635 0.1U_0402_16V7KPM@C635 0.1U_0402_16V7KPM@

1 2

C637 0.1U_0402_16V7KPM@C637 0.1U_0402_16V7KPM@

1 2

C639 0.1U_0402_16V7KPM@C639 0.1U_0402_16V7KPM@

1 2

C641 0.1U_0402_16V7KPM@C641 0.1U_0402_16V7KPM@

1 2

C60 0.1U_0402_16V7KIHDMI@C60 0.1U_0402_16V7KIHDMI@

1 2

C62 0.1U_0402_16V7KIHDMI@C62 0.1U_0402_16V7KIHDMI@

1 2

C64 0.1U_0402_16V7KIHDMI@C64 0.1U_0402_16V7KIHDMI@

1 2

C66 0.1U_0402_16V7KIHDMI@C66 0.1U_0402_16V7KIHDMI@

1 2

PCIE_GTX_C_MRX_N[0..15] 17 PCIE_GTX_C_MRX_P[0..15] 17 PCIE_MTX_C_GRX_N[0..15] 17

PCIE_MTX_C_GRX_P[0..15] 17

PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_N15

PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_P15

PCIE_MTX_C_GRX_HDMI_N0 19 PCIE_MTX_C_GRX_HDMI_N1 19 PCIE_MTX_C_GRX_HDMI_N2 19 PCIE_MTX_C_GRX_HDMI_N3 19

PCIE_MTX_C_GRX_HDMI_P0 19 PCIE_MTX_C_GRX_HDMI_P1 19 PCIE_MTX_C_GRX_HDMI_P2 19 PCIE_MTX_C_GRX_HDMI_P3 19

PCIE_GTX_C_MRX_HDMI_P3 19

A A

Security Classification

2008/09/19 2009/09/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

10 43Wednesday, September 16, 2009

1

E

of

5

DDR2,667MHz,2600mA

+1.8V

DDR PWR

C68

@

1

+

2

10U_0805_10V4Z

1

+

D D

C78

220U_6.3V_M

+

220U_D2_4VM_R15

2

10U_0805_10V4Z

1

C69

2

C70

C71

2

0.1U_0402_16V4Z

DDR2,800MHz,3000mA

1

2

reserve for test

C C

Could be NC for DDR2 Board.

For layout placement un-mound C123 and mound C84

Int. Graphic

220U_D2_4VM_R15

1

+

C83

C83 GM@

GM@

2

220U_D2_4VM_R15

For layout issue to separate 220u*2 to +1.05VS

B B

A A

+NB_VCCAXG+1.05VS

0.47U_0603_10V7K

1

+

C84

C84 @

@

2

10U_0805_10V4Z

1

C85

C86

GM@

2

10U_0805_10V4Z

1

C87

C87 GM@

GM@

2

1U_0402_6.3V4Z

0.47U_0603_10V7K

1

C88

C88 GM@

GM@

2

1

C89

C89 GM@

GM@

2

0.1U_0402_16V4Z

1

2

Intel:AXG and AXG_NCTF -- 220U*2, ESR 15mOhm

C86

PM@ C86

PM@

0_0805_5%

+1.05VS +NB_VCCAXG

PJ27

2

112

JUMP_43X39 @

PJ28

2

112

JUMP_43X39 @

PJ29

2

112

JUMP_43X39 @

PJ30

2

112

JUMP_43X39 @

PJ31

112

JUMP_43X39 @

PJ32

112

JUMP_43X39 @

2

T3PAD T3PAD T4PAD T4PAD

C90

C90 GM@

GM@

1

2

4

U3F

AP33

VCC_SM_1

AN33

VCC_SM_2

BH32

VCC_SM_3

BG32

VCC_SM_4

BF32

VCC_SM_5

BD32

VCC_SM_6

BC32

VCC_SM_7

BB32

VCC_SM_8

BA32

VCC_SM_9

AY32

VCC_SM_10

AW32

VCC_SM_11

AV32

VCC_SM_12

AU32

VCC_SM_13

AT32

VCC_SM_14

AR32

VCC_SM_15

AP32

VCC_SM_16

AN32

VCC_SM_17

BH31

VCC_SM_18

BG31

VCC_SM_19

BF31

VCC_SM_20

BG30

VCC_SM_21

BH29

VCC_SM_22

BG29

VCC_SM_23

BF29

VCC_SM_24

BD29

VCC_SM_25

BC29

VCC_SM_26

BB29

VCC_SM_27

BA29

VCC_SM_28

AY29

VCC_SM_29

AW29

VCC_SM_30

AV29

VCC_SM_31

AU29

VCC_SM_32

AT29

VCC_SM_33

AR29

VCC_SM_34

AP29

VCC_SM_35

BA36

VCC_SM_36/NC

BB24

VCC_SM_37/NC

BD16

VCC_SM_38/NC

BB21

VCC_SM_39/NC

AW16

VCC_SM_40/NC

AW13

VCC_SM_41/NC

AT13

VCC_SM_42/NC

8700mA

Y26

VCC_AXG_1

AE25

VCC_AXG_2

AB25

VCC_AXG_3

AA25

VCC_AXG_4

AE24

VCC_AXG_5

AC24

VCC_AXG_6

AA24

VCC_AXG_7

Y24

VCC_AXG_8

AE23

VCC_AXG_9

AC23

VCC_AXG_10

AB23

VCC_AXG_11

AA23

VCC_AXG_12

AJ21

VCC_AXG_13

AG21

VCC_AXG_14

AE21

VCC_AXG_15

AC21

VCC_AXG_16

AA21

VCC_AXG_17

Y21

VCC_AXG_18

AH20

VCC_AXG_19

AF20

VCC_AXG_20

AE20

VCC_AXG_21

AC20

VCC_AXG_22

AB20

VCC_AXG_23

AA20

VCC_AXG_24

T17

VCC_AXG_25

T16

VCC_AXG_26

AM15

VCC_AXG_27

AL15

VCC_AXG_28

AE15

VCC_AXG_29

AJ15

VCC_AXG_30

AH15

VCC_AXG_31

AG15

VCC_AXG_32

AF15

VCC_AXG_33

AB15

VCC_AXG_34

AA15

VCC_AXG_35

Y15

VCC_AXG_36

V15

VCC_AXG_37

U15

VCC_AXG_38

AN14

VCC_AXG_39

AM14

VCC_AXG_40

U14

VCC_AXG_41

T14

VCC_AXG_42

AJ14

VCC_AXG_SENSE

AH14

VSS_AXG_SENSE

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329 GMR3@

GMR3@

VCC_AXG_NTCF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8

VCC SM

VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43

VCC GFX NCTF

VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52

POWER

VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55 VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60

VCC GFX

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

VCC SM LF

+NB_VCCAXG

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

VCCSM_LF1

AV44

VCCSM_LF2

BA37

VCCSM_LF3

AM40

VCCSM_LF4

AV21

VCCSM_LF5

AY5

VCCSM_LF6

AM10

VCCSM_LF7

BB13

0.1U_0402_16V4Z

3

Int. Graphic

1

C91

2

Extnal Graphic: 1210.34mA integrated Graphic: 1930.4mA Intel Management Engine Link:508.12mA

+1.05VS

NB Core,Intel Management Engine Link

220U_6.3V_M

1

+

C73

C74

1

2

C74

2

10U_0805_10V4Z

1

0.47U_0603_10V7K

C94

2

0.22U_0603_10V7K

C72

C72 GM@

GM@

2

220U_6.3V_M

Intel: VCC -- 220U*2, ESR 12mOhm

C93

1

0.22U_0603_10V7K

0.22U_0603_10V7K C92

C92

2

0.1U_0402_16V4Z

0.22U_0402_10V4Z

1

C75

2

C95

1

2

0.1U_0402_16V4Z

1

C77

C76

2

0.22U_0402_10V4Z

C96

1

1U_0402_6.3V4Z

2

1U_0402_6.3V4Z

2

U3G

AG34

VCC_1

AC34

VCC_2

1

2

C97

AB34

VCC_3

AA34

VCC_4

Y34

VCC_5

V34

VCC_6

U34

VCC_7

AM33

VCC_8

AK33

VCC_9

AJ33

VCC_10

AG33

VCC_11

AF33

VCC_12

AE33

VCC_13

AC33

VCC_14

AA33

VCC_15

Y33

VCC_16

W33

VCC_17

V33

VCC_18

U33

VCC_19

AH28

VCC_20

AF28

VCC_21

AC28

VCC_22

AA28

VCC_23

AJ26

VCC_24

AG26

VCC_25

AE26

VCC_26

AC26

VCC_27

AH25

VCC_28

AG25

VCC_29

AF25

VCC_30

AG24

VCC_31

AJ23

VCC_32

AH23

VCC_33

AF23

VCC_34

T32

VCC_35

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329 GMR3@

GMR3@

1

2

VCC CORE

POWER

VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8

VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28

VCC NCTF

VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31 VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38 VCC_NCTF_39 VCC_NCTF_40 VCC_NCTF_41 VCC_NCTF_42 VCC_NCTF_43 VCC_NCTF_44

1

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

+1.05VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/19 2009/09/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

11 43Wednesday, September 16, 2009

1

E

of

5

+3VS_TVCRT_DACBG

0_0603_5%

0_0603_5% GM@

GM@

D D

R81

10U_FLC-453232-100K_0.25A_10%

C108

220U_B2_2.5VM

R83

KC FBM-L11-160808-121LMT 0603

4.7U_0805_10V4Z

PCIe&DMI

1 2

+1.5VS

R87 0_0603_5%R87 0_0603_5%

0.1U_0402_16V4Z

C C

B B

0.1U_0402_16V4Z

+1.5VS

R95

0_0603_5%

10U_0805_10V4Z@

+3VS_TVCRT_DAC

CRT TV

R80

0.01U_0402_25V4Z

12

1

C99

C99 GM@

GM@

0.1U_0402_16V4Z

GM@R81

GM@

12

1

+

@

2

12

1

C115

2

Pin AD48 Pin AA48

1

C100

C100 GM@

GM@

Pin B27

2

+1.05VS_DPLLA+1.05VS +1.05VS_DPLLB+1.05VS

10U_0805_10V4Z

1

C110

C110 GM@

GM@

+1.05VS_AHPLL+1.05VS +1.05VS_MPLL+1.05VS

C116

0.1U_0402_16V4Z

Pin AD1

+1.5VS_PEG_BG

C122

1

C111

C111 GM@

GM@

Pin F47 Pin L48

2

0.1U_0402_16V4Z

1

2

1

2

TV

0.01U_0402_25V4Z

0.01U_0402_25V4Z 1

C135

12

C139

+1.05VS +1.05VS_DHPLL

1

C136

Pin B24

2

+1.5VS_TVDAC

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

1

C140

2

0.01U_0402_25V4Z

R98

1 2

0_0402_5%

0.1U_0402_16V4Z

1

C141

Pin M25 Pin L28

2

C150

Pin AF1

1

C100

C100 0_0402_5%

0_0402_5% C101

C101 0_0402_5%

0_0402_5%

C110

PM@

C110

PM@

0_0805_5%

R84

MBK2012121YZF_0805

1 2

R85 0.5_0805_1%R85 0.5_0805_1%

C114

C114 10U_0805_10V4Z

10U_0805_10V4Z

+1.05VS_PEGPLL

1

C121

0.1U_0402_16V4Z

2

PCIe&DMI

+1.5VS +1.5VS_HDA

R94

1 2

0_0402_5%

0_0402_5% IHDMI@

IHDMI@

0.1U_0402_16V4Z

0.1U_0402_16V4Z IHDMI@

IHDMI@

TV TV

+1.5VS

0.1U_0402_16V4Z

+3VS_TVCRT_DACBG

PM@

PM@ PM@

PM@

12

0.01U_0402_25V4Z

0.01U_0402_25V4Z 1

C101

C101 GM@

GM@

2

0.1U_0402_16V4Z

R82

GM@R82

GM@

10U_FLC-453232-100K_0.25A_10%

220U_B2_2.5VM

1

C117

Pin AE1

2

0.1U_0402_16V4Z

HDMI's HDA

1

C138

Pin A32

2

+1.5VS_QDAC

R96

0.01U_0402_25V4Z

12

0_0603_5%

1

C143

C142

2

C102

C102 GM@

GM@

12

C109

@

220U_D2_4VM_R15

1

2

1

+

2

1

2

4

Pin A25 GNDtoB25

10U_0805_10V4Z

1

C112

C113

GM@

2

0.1U_0402_16V4Z

+1.8V_TXLVDS

LVDS

1

C118

C118 1000P_0402_50V7K

1000P_0402_50V7K

2

GM@

Pin J48

GND to J47

+1.05VS

1

C123

C123 @

@

2

+1.05VS

R92

1 2

0_0603_5%

10U_0805_10V4Z

+3VS

R79

GM@R79

10U_0805_10V4Z

1

2

10U_0805_10V4Z

1

C132

2

GM@

C112

C112 0_0805_5%

0_0805_5%

BLM18PG181SN1D_0603

R88

1 2

0_0805_5%

+

+3VS_TVCRT_DACBG

12

1

C98

2

GM@

1

2

2.2U_0603_6.3V4Z

+3VS_TVCRT_DACBG

PM@

C118

PM@

C118

PM@

0_0402_5%

DDR2

4.7U_0805_10V4Z

4.7U_0805_10V4Z 1

C125

C124

2

1U_0402_6.3V4Z

DDR2

+1.05VS_A_SM_CK

0.1U_0402_16V4Z

1

C133

C134

@

2

+1.05VS_PEGPLL

+1.8V_LVDS

+3VS_TVCRT_DAC

+1.05VS_A_SM

+1.05VS_DPLLA +1.05VS_DPLLB

+1.05VS_AHPLL

+1.05VS_MPLL

+1.8V_TXLVDS

+1.5VS_PEG_BG

+1.05VS_PEGPLL

1

C126

2

Pin AR20

1

2

Pin AP28

+3VS_TVCRT_DAC

+1.5VS_HDA

+1.5VS_TVDAC +1.5VS_QDAC

+1.05VS_DHPLL

3

U3H

73mA

B27

VCCA_CRT_DAC_1

A26

VCCA_CRT_DAC_2

5mA

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

F47

VCCA_DPLLA

L48

VCCA_DPLLB

AD1

VCCA_HPLL

AE1

VCCA_MPLL

13.2mA

J48

VCCA_LVDS

J47

VSSA_LVDS

414uA

AD48

VCCA_PEG_BG

50mA

AA48

VCCA_PEG_PLL

667MTs,480mA 800MTs,720mA

AR20

VCCA_SM_1

AP20

VCCA_SM_2

AN20

VCCA_SM_3

AR17

VCCA_SM_4

AP17

VCCA_SM_5

AN17

VCCA_SM_6

AT16

VCCA_SM_7

AR16

VCCA_SM_8

AP16

VCCA_SM_9

667MTs,24mA 800MTs,26mA

AP28

VCCA_SM_CK_1

AN28

VCCA_SM_CK_2

AP25

VCCA_SM_CK_3

AN25

VCCA_SM_CK_4

AN24

VCCA_SM_CK_5

AM28

VCCA_SM_CK_NCTF_1

AM26

VCCA_SM_CK_NCTF_2

AM25

VCCA_SM_CK_NCTF_3

AL25

VCCA_SM_CK_NCTF_4

AM24

VCCA_SM_CK_NCTF_5

AL24

VCCA_SM_CK_NCTF_6

AM23

VCCA_SM_CK_NCTF_7

AL23

VCCA_SM_CK_NCTF_8

79mA

B24

VCCA_TV_DAC_1

A24

VCCA_TV_DAC_2

50mA

A32

VCC_HDA

35mA

M25

VCCD_TVDAC

L28

VCCD_QDAC

157.2mA

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

60.31mA

M38

VCCD_LVDS_1

L37

VCCD_LVDS_2

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329 GMR3@

GMR3@

64.8mA

64.8mA 24mA

139.2mA

HDA

500uA

50mA

FSB=1067Mhz,852mA

U13

VTT_1

T13

VTT_2

U12

VTT_3

T12

VTT_4

U11

VTT_5

T11

VTT_6

U10

VTT_7

T10

VTT_8

CRTPLLA LVDSA PEG

VTT

POWER

Host Interface I/O and HSIO

321.35mA

A SM

AXF

DDR2,667MHz,119.85mA DDR2,800MHz,124mA

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

SM CK

118.8mA

VCC_TX_LVDS

105.3mA

A CK

HV

1782mA

TV

456mA

DMI PEG

VTTLF

LVDS D TV/CRT

VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25

VCC_AXF_1 VCC_AXF_2 VCC_AXF_3

VCC_HV_1 VCC_HV_2 VCC_HV_3

VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5

VCC_DMI_1 VCC_DMI_2 VCC_DMI_3 VCC_DMI_4

VTTLF1 VTTLF2 VTTLF3

U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47

C35 B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

A8 L1 AB2

0.47U_0603_10V7K

VTTLF1 VTTLF2 VTTLF3

C147

1

C104

0.47U_0603_10V7K

0.47U_0603_10V7K 2

+1.05VS_AXF

+1.8V_SM_CK

+1.8V_TXLVDS

+3VS

+1.05VS_PEG_DMI

1

0.47U_0603_10V7K

2

C148

1

C105

2.2U_0603_6.3V6K

2

C130

C130 0_0402_5%

0_0402_5%

1

0.47U_0603_10V7K

2

+1.05VS_AXF

NB I/O

2

C119

C119 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C107

4.7U_0805_10V4Z

2

1

C106

4.7U_0805_10V4Z

2

Intel: VTT 270U*1 ESR 12mOhm

Pin B22

+1.8V_SM_CK

DDR2

1

C127

0.1U_0402_16V4Z

2

Pin BF21

+1.8V_TXLVDS +1.8V

LVDS

1

C130

C130 1000P_0402_50V7K

1000P_0402_50V7K

2

GM@

Pin K47

1

2

+1.05VS_PEG_DMI

1

C144

2

10U_0805_10V4Z

Pin V48

+1.05VS_PEG_DMI

1

C151

0.1U_0402_16V4Z

2

Pin AH48

R93

R93 10_0603_5%

10_0603_5%

C137

0.1U_0402_16V4Z

Pin C35

10U_0805_10V4Z

C149

PM@

1

2

AGTL+

R86

1 2

0_0603_5%

1

C120

C120 10U_0805_10V4Z

10U_0805_10V4Z

2

@

R90

R90 1_0805_1%

1_0805_1%

1 2

10U_0805_10V4Z

R91 1 2

0_0603_5%

1

C131

C131 10U_0805_10V4Z

10U_0805_10V4Z

2

GM@

12

CH751H-40PT_SOD323-2

PCIe&DMI

1

C145

2

PCIe&DMI

1

+1.05VS

1

+

C103

C103 220U_D2_4VM_R15

220U_D2_4VM_R15

2

+1.05VS

C129

GM@R91

GM@

D3

21

R89

1 2

0_0805_5%

1

C128

C128 10U_0805_10V4Z

10U_0805_10V4Z

2

@

+1.05VS+3VS

1

+

C146

C146 @

@

2

220U_6.3V_M

+1.8V

PJ26

112

JUMP_43X79 @

+1.05VS

2

+1.05VS

A A

BLM18PG121SN1D_0603

R100

1_0805_1%

L1

12

PCIe&DMI

+1.05VS_PEGPLL

0.1U_0402_16V4Z

C154

12

10U_0805_10V4Z

5

C152

1

2

Pin AA47

+1.8V

R99

R99 0_0603_5%

0_0603_5%

+1.8V_LVDS

12

C153

1U_0402_6.3V4Z

LVDS

1

2

Pin M38

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

12 43Wednesday, September 16, 2009

1

of

E

5

U3I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

AF47

VSS_8

AD47

VSS_9

AB47

VSS_10

Y47

VSS_11

T47

BD46 BA46 AY46 AV46 AR46

AM46

BF44 AH44 AD44 AA44

M44

BC43 AV43 AU43

AM43

BG42 AY42

AT42 AN42

AJ42 AE42

BD41 AU41

AM41

AH41 AD41 AA41

M41

BG40 BB40 AV40 AN40

AT39

AM39

AJ39 AE39

BH38 BC38 BA38 AU38 AH38 AD38 AA38

BF37 BB37

AW37

AT37 AN37

AJ37

BG36 BD36 AK15 AU36

VSS_12

N47

VSS_13

L47

VSS_14

G47

VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21

V46

VSS_22

R46

VSS_23

P46

VSS_24

H46

VSS_25

F46

VSS_26 VSS_27 VSS_28 VSS_29 VSS_30

Y44

VSS_31

U44

VSS_32

T44

VSS_33 VSS_34

F44

VSS_35 VSS_36 VSS_37 VSS_38 VSS_39

J43

VSS_40

C43

VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47

N42

VSS_48

L42

VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55

Y41

VSS_56

U41

VSS_57

T41

VSS_58 VSS_59

G41

VSS_60

B41

VSS_61 VSS_62 VSS_63 VSS_64 VSS_65

H40

VSS_66

E40

VSS_67 VSS_68 VSS_69 VSS_70 VSS_71

N39

VSS_72

L39

VSS_73

B39

VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81

Y38

VSS_82

U38

VSS_83

T38

VSS_84

J38

VSS_85

F38

VSS_86

C38

VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93

H37

VSS_94

C37

VSS_95 VSS_96 VSS_97 VSS_98 VSS_99

VSS

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329 GMR3@

GMR3@

D D

C C

B B

A A

VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

4

3

U3J

BG21

AW21

AU21 AP21 AN21 AH21 AF21 AB21

BC20 BA20

AW20

AT20

AJ20

AG20

BG19 BG17

BC17

AW17

AT17

BA16 AU16

AN16

BG15

AC15

W15

BG14

AA14

BG13

BC13 BA13

AN13

AJ13

AE13

BF12 AV12 AT12

AM12

AA12

BD11 BB11 AY11 AN11 AH11

BG10

AV10 AT10

AJ10 AE10 AA10

AM9

VSS_199

L12

VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207

R21

VSS_208

M21

VSS_209

J21

VSS_210

G21

VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217

Y20

VSS_218

N20

VSS_219

K20

VSS_220

F20

VSS_221

C20

VSS_222

A20

VSS_223 VSS_224

A18

VSS_225 VSS_226 VSS_227 VSS_228 VSS_229

R17

VSS_230

M17

VSS_231

H17

VSS_232

C17

VSS_233 VSS_235 VSS_237

VSS_238

N16

VSS_239

K16

VSS_240

G16

VSS_241

E16

VSS_242 VSS_243 VSS_244 VSS_245

A15

VSS_246 VSS_247 VSS_248

C14

VSS_249 VSS_250 VSS_251 VSS_252

VSS_255 VSS_256 VSS_257

N13

VSS_258

L13

VSS_259

G13

VSS_260

E13

VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266

J12

VSS_267

A12

VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273

Y11

VSS_275

N11

VSS_276

G11

VSS_277

C11

VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284

M10

VSS_285

BF9

VSS_286

BC9

VSS_287

AN9

VSS_288 VSS_289

AD9

VSS_290

G9

VSS_291

B9

VSS_292

BH8

VSS_293

BB8

VSS_294

AV8

VSS_295

AT8

VSS_296

VSS

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329 GMR3@

GMR3@

VSS_NCTF_10

VSS NCTF

VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16

VSS SCB

NC

VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325

VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350

VSS_351 VSS_352 VSS_353 VSS_354

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9

VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5

NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34 NC_35 NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_42

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1

U24 U28 U25 U29

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

BH48 BH1 A48 C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

13 43Wednesday, September 16, 2009

1

E

of

5

+DIMM_VREF

2.2U_0603_6.3V6K

+1.8V

D D

C C

B B

A A

12

R101

R101 1K_0402_1%

1K_0402_1%

12

R102

R102 1K_0402_1%

1K_0402_1%

C155

1

0.1U_0402_16V4Z

2

20mils

C156

+DIMM_VREF

DDRA_CKE08

DDR_A_BS29

DDR_A_BS09

DDR_A_WE#9

DDR_A_CAS#9

DDRA_SCS1#8

DDRA_ODT18

PM_SMBDATA15,16,22,25,27 PM_SMBCLK15,16,22,25,27

+3VS

SO-DIMM A

1

2

DDR_A_D4 DDR_A_D1

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D14

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D9 DDR_A_D15

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D29 DDR_A_D24

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDRA_CKE0

+1.8V

DDR_A_BS2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA7 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3 DDR_A_MA1

DDR_A_MA10 DDR_A_BS0 DDR_A_WE#

DDR_A_CAS# DDRA_SCS1#

DDRA_ODT1 DDR_A_D37

DDR_A_D36 DDR_A_DQS#4

DDR_A_DQS4 DDR_A_D35

DDR_A_D32 DDR_A_D40

DDR_A_D44 DDR_A_DM5 DDR_A_D41

DDR_A_D46 DDR_A_D49

DDR_A_D48

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D54 DDR_A_D50

DDR_A_D61 DDR_A_D60

DDR_A_DM7 DDR_A_D59

DDR_A_D58

C180

REVERSE

Top side

5

1

2

0.1U_0402_16V4Z

4

JDDRL

@JDDRL

@

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

SUPPORT_PAD

203

4

2

VSS

4

DQ4

6

DQ5

8

VSS

10

DM0

12

VSS

14

DQ6

16

DQ7

18

VSS

20

DQ12

22

DQ13

24

VSS

26

DM1

28

VSS

30

CK0

32

CK0#

34

VSS

36

DQ14

38

DQ15

40

VSS

42

VSS

44

DQ20

46

DQ21

48

VSS

50

NC

52

DM2

54

VSS

56

DQ22

58

DQ23

60

VSS

62

DQ28

64

DQ29

66

VSS

68

DQS3#

70

DQS3

72

VSS

74

DQ30

76

DQ31

78

VSS

80

NC/CKE1

82

VDD

84

NC/A15

86

NC/A14

88

VDD

90

A11

92

A7

94

A6

96

VDD

98

A4

100

A2

102

A0

104

VDD

106

BA1

108

RAS#

110

S0#

112

VDD

114

ODT0

116

NC/A13

118

VDD

120

NC

122

VSS

124

DQ36

126

DQ37

128

VSS

130

DM4

132

VSS

134

DQ38

136

DQ39

138

VSS

140

DQ44

142

DQ45

144

VSS

146

DQS5#

148

DQS5

150

VSS

152

DQ46

154

DQ47

156

VSS

158

DQ52

160

DQ53

162

VSS

164

CK1

166

CK1#

168

VSS

170

DM6

172

VSS

174

DQ54

176

DQ55

178

VSS

180

DQ60

182

DQ61

184

VSS

186

DQS7#

188

DQS7

190

VSS

192

DQ62

194

DQ63

196

VSS

198

SAO

200

SA1

SUPPORT_PAD

FOX_AS0A426-M2RN-7F

204

DDR_A_D5 DDR_A_D0

DDR_A_DM0 DDR_A_D6

DDR_A_D7 DDR_A_D13

DDR_A_D12 DDR_A_DM1

DDR_A_D11 DDR_A_D10

DDR_A_D20 DDR_A_D21

DDR_A_DM2 DDR_A_D23

DDR_A_D22 DDR_A_D28

DDR_A_D25 DDR_A_DQS#3

DDR_A_DQS3 DDR_A_D31

DDR_A_D30 DDRA_CKE1

DDR_A_MA14 DDR_A_MA11 DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

DDR_A_BS1 DDR_A_RAS# DDRA_SCS0#

DDRA_ODT0 DDR_A_MA13

DDR_A_D39 DDR_A_D38

DDR_A_DM4 DDR_A_D34

DDR_A_D33 DDR_A_D45

DDR_A_D43 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D47

DDR_A_D42 DDR_A_D52

DDR_A_D53

DDR_A_DM6 DDR_A_D51

DDR_A_D55 DDR_A_D57

DDR_A_D56 DDR_A_DQS#7

DDR_A_DQS7 DDR_A_D62

DDR_A_D63

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

DDRA_CLK0 8 DDRA_CLK0# 8

PM_EXTTS# 8,15

DDRA_CKE1 8

+1.8V

DDR_A_BS1 9 DDR_A_RAS# 9 DDRA_SCS0# 8

DDRA_ODT0 8

DDRA_CLK1 8 DDRA_CLK1# 8

Compal Secret Data

2008/09/19 2009/09/19

3

Compal Secret Data

Deciphered Date

+1.8V

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K C158

C158

1

2

+0.9VS

0.1U_0402_16V4Z

1

2

C167

Layout Note: Place these resistor closely JP3,all trace length Max=1.5"

DDR_A_MA8 DDR_A_BS2 DDR_A_MA12 DDR_A_MA1

DDR_A_MA14 DDR_A_MA11 DDR_A_MA6 DDR_A_MA7

DDRA_ODT1 DDR_A_CAS# DDR_A_WE# DDR_A_BS0

DDRA_SCS1# DDRA_CKE0 DDRA_CKE1

2

DDR_A_DQS#[0..7] 9

DDR_A_D[0..63] 9

DDR_A_DM[0..7] 9

DDR_A_DQS[0..7] 9

DDR_A_MA[0..14] 9

Layout Note: Place near JP3

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K C160

C160

C159

1

2

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS

0.1U_0402_16V4Z

1

2

C169

RP1

RP3

RP5

1 2 1 2 1 2

2

C170

18 27 36 45

C168

56_0804_8P4R_5%

R480 56_0402_5%R480 56_0402_5% R481 56_0402_5%R481 56_0402_5% R482 56_0402_5%R482 56_0402_5%

C161

1

2

0.1U_0402_16V4Z

1

2

C171

+0.9VS

RP2

56_0804_8P4R_5%

RP4

56_0804_8P4R_5%

RP12

1 8 2 7 3 6 4 5

56_0804_8P4R_5%

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K C162

C162

1

2

0.1U_0402_16V4Z

1

2

C172

DDR_A_MA13

18

DDRA_ODT0

27

DDR_A_RAS#

36

DDRA_SCS0#

45

DDR_A_MA5

18

DDR_A_MA3

27

DDR_A_MA9

36

DDR_A_MA10

45

DDR_A_MA4 DDR_A_MA2 DDR_A_BS1 DDR_A_MA0

Title

Size Document Number Rev

Date: Sheet

2.2U_0603_6.3V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z C163

C163

1

2

0.1U_0402_16V4Z

1

2

C173

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1

2

C174

Compal Electronics, Inc.

401605

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z C166

C165

0.1U_0402_16V4Z

1

2

C177

C166

1

2

0.1U_0402_16V4Z

1

2

C178

4.4

0.1U_0402_16V4Z

1

2

C179

14 43Wednesday, September 16, 2009

C164

1

2

0.1U_0402_16V4Z

1

2

C176

C175

SCHEMATIC MB A4571

1

+

C157

C157 220U_Y_4VM

220U_Y_4VM @

@

2

of

E

A

+DIMM_VREF

2.2U_0603_6.3V6K

1 1

2 2

3 3

4 4

C181

@

1

0.1U_0402_16V4Z

2

SO-DIMM B STANDARD

1

C182

2

DDRB_CKE08

DDR_B_BS29

DDR_B_BS09

DDR_B_WE#9

DDR_B_CAS#9

DDRB_SCS1#8

DDRB_ODT18

PM_SMBDATA14,16,22,25,27 PM_SMBCLK14,16,22,25,27

+3VS

DDR_B_D0 DDR_B_D1

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D17 DDR_B_D20

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D28 DDR_B_D25

DDR_B_DM3

DDR_B_D30 DDR_B_D31

DDRB_CKE0

+1.8V

DDR_B_BS2 DDR_B_MA12

DDR_B_MA9 DDR_B_MA8

DDR_B_MA5 DDR_B_MA3 DDR_B_MA1

DDR_B_MA10 DDR_B_BS0 DDR_B_WE#

DDR_B_CAS# DDRB_SCS1#

DDRB_ODT1 DDR_B_D32

DDR_B_D33 DDR_B_DQS#4

DDR_B_DQS4 DDR_B_D34

DDR_B_D35 DDR_B_D40

DDR_B_D41 DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D48

DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D51 DDR_B_D50

DDR_B_D56 DDR_B_D61 DDR_B_D57

DDR_B_DM7 DDR_B_D59

DDR_B_D58

1

C205

0.1U_0402_16V4Z

2

Bottom side

A

B

JDDRH

@JDDRH

@

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

SUPPORT_PAD

201

B

2

VSS

4

DQ4

6

DQ5

8

VSS

10

DM0

12

VSS

14

DQ6

16

DQ7

18

VSS

20

DQ12

22

DQ13

24

VSS

26

DM1

28

VSS

30

CK0

32

CK0#

34

VSS

36

DQ14

38

DQ15

40

VSS

42

VSS

44

DQ20

46

DQ21

48

VSS

50

NC

52

DM2

54

VSS

56

DQ22

58

DQ23

60

VSS

62

DQ28

64

DQ29

66

VSS

68

DQS3#

70

DQS3

72

VSS

74

DQ30

76

DQ31

78

VSS

80

NC/CKE1

82

VDD

84

NC/A15

86

NC/A14

88

VDD

90

A11

92

A7

94

A6

96

VDD

98

A4

100

A2

102

A0

104

VDD

106

BA1

108

RAS#

110

S0#

112

VDD

114

ODT0

116

NC/A13

118

VDD

120

NC

122

VSS

124

DQ36

126

DQ37

128

VSS

130

DM4

132

VSS

134

DQ38

136

DQ39

138

VSS

140

DQ44

142

DQ45

144

VSS

146

DQS5#

148

DQS5

150

VSS

152

DQ46

154

DQ47

156

VSS

158

DQ52

160

DQ53

162

VSS

164

CK1

166

CK1#

168

VSS

170

DM6

172

VSS

174

DQ54

176

DQ55

178

VSS

180

DQ60

182

DQ61

184

VSS

186

DQS7#

188

DQS7

190

VSS

192

DQ62

194

DQ63

196

VSS

198

SAO

200

SA1

SUPPORT_PAD

FOX_AS0A426-MARG-7F

202

DDR_B_D5 DDR_B_D4

DDR_B_DM0 DDR_B_D6

DDR_B_D7 DDR_B_D12

DDR_B_D13 DDR_B_DM1

DDR_B_D14 DDR_B_D15

DDR_B_D21 DDR_B_D16

DDR_B_DM2 DDR_B_D22

DDR_B_D23 DDR_B_D26

DDR_B_D24 DDR_B_DQS#3

DDR_B_DQS3 DDR_B_D29

DDR_B_D27 DDRB_CKE1

DDR_B_MA14 DDR_B_MA11

DDR_B_MA7 DDR_B_MA6

DDR_B_MA4 DDR_B_MA2 DDR_B_MA0

DDR_B_BS1 DDR_B_RAS# DDRB_SCS0#

DDRB_ODT0 DDR_B_MA13

DDR_B_D36 DDR_B_D37

DDR_B_DM4 DDR_B_D39

DDR_B_D38 DDR_B_D44

DDR_B_D45 DDR_B_DQS#5

DDR_B_DQS5 DDR_B_D46

DDR_B_D47 DDR_B_D52

DDR_B_D53

DDR_B_DM6 DDR_B_D54

DDR_B_D55 DDR_B_D60

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Layout Note:

+1.8V

Place near JP4

2.2U_0603_6.3V6K

DDRB_CLK0 8 DDRB_CLK0# 8

PM_EXTTS# 8,14

DDRB_CKE1 8

+1.8V

DDR_B_BS1 9 DDR_B_RAS# 9 DDRB_SCS0# 8

DDRB_ODT0 8

DDRB_CLK1 8 DDRB_CLK1# 8

+3VS

Compal Secret Data

2008/09/19 2009/09/19

C

Compal Secret Data

2.2U_0603_6.3V6K

C183

1

2

Layout Note: Place one cap close to every 2 pullup

+0.9VS

Resistors terminated to +0.9VS

0.1U_0402_16V4Z

1

2

C192

Layout Note: Place these resistor closely JP4,all trace length Max=1.5"

DDR_B_CAS# DDR_B_WE# DDR_B_MA10 DDR_B_BS0

DDR_B_RAS# DDRB_SCS0# DDRB_ODT0 DDR_B_MA13

DDR_B_MA12 DDR_B_BS2 DDRB_CKE0 DDR_B_MA9

DDRB_ODT1 DDRB_SCS1# DDRB_CKE1

Deciphered Date

DDR_B_DQS#[0..7] 9 DDR_B_D[0..63] 9

DDR_B_DM[0..7] 9

DDR_B_DQS[0..7] 9

DDR_B_MA[0..14] 9

2.2U_0603_6.3V6K

C185

C184

1

2

0.1U_0402_16V4Z

1

2

C193

C195

C194

RP8

56_0804_8P4R_5%

RP10

56_0804_8P4R_5%

RP6

56_0804_8P4R_5%

R483 56_0402_5%R483 56_0402_5%

1 2

R484 56_0402_5%R484 56_0402_5%

1 2

R485 56_0402_5%R485 56_0402_5%

1 2

D

2.2U_0603_6.3V6K

C186

1

2

0.1U_0402_16V4Z

1

2

C196

+0.9VS

18 27 36 45

56_0804_8P4R_5%

18 27 36 45

56_0804_8P4R_5%

18 27 36 45

56_0804_8P4R_5%

D

1

2

1

2

C197

RP9

RP11

RP13

C187

E

0.1U_0402_16V4Z

0.1U_0402_16V4Z C189

C189

C188

1

2

0.1U_0402_16V4Z

1

2

C198

18 27 36 45

2

C199

DDR_B_MA7 DDR_B_MA6 DDR_B_MA14 DDR_B_MA11

DDR_B_MA8 DDR_B_MA5 DDR_B_MA1 DDR_B_MA3

DDR_B_BS1 DDR_B_MA0 DDR_B_MA4 DDR_B_MA2

Title

Size Document Number Rev

Date: Sheet

0.1U_0402_16V4Z

C190

C191

1

2

0.1U_0402_16V4Z

1

2

C201

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

0.1U_0402_16V4Z

C202

1

2

C203

0.1U_0402_16V4Z

E

0.1U_0402_16V4Z

C200

1

2

1

2

C204

E

of

15 43Wednesday, September 16, 2009

of

15 43Wednesday, September 16, 2009

of

15 43Wednesday, September 16, 2009

A

FSC FSB REF

CLKSEL2

CLKSEL1

FSA

CLKSEL0

0

CPU MHz

266

0 1000 133 33.31 14.318 96.0 48.0

0 1001 200 33.30 14.318 96.0 48.0

1 1

0 1001 166 33.31 14.318 96.0 48.0

1 1000 333 33.30 14.318 96.0 48.0

1 1000 100 33.31 14.318 96.0 48.0

1 1001 400 33.30 14.318 96.0 48.0

111

+/-30ppm

2

14.31818MHZ_16P

C220

18P_0402_50V8J

2 2

3 3

18P_0402_50V8J

CLK_ICH

CLK_EC

4 4

1

CPU_BSEL05,8

CPU_BSEL15,8

CPU_BSEL25,8

0 = SRC8/SRC8# (100MHz) 1 = ITP/ITP# (266MHz) 0 = Enable DOT96 & SRC1(UMA) 1 = Enable SRC0 & 27MHz(DIS)

+3VS +3VS

12

R121

R121 10K_0402_5%@

10K_0402_5%@

12

R127

R127 10K_0402_5%

10K_0402_5%

A

CLK_XTAL_OUT

Y1

CLK_ICH CLK_EC

CLK_XTAL_IN

12

2

C221

C221 18P_0402_50V8J

18P_0402_50V8J

1

R116 2.2K_0402_5%R116 2.2K_0402_5%

R109 10K_0402_5%R109 10K_0402_5%

SRC MHz

1000

12

B

PCI MHz

MHz

33.30

14.318 96.0 48.0

Reserved

Routing the trace at least 10mil

CLK_14M_ICH22

CLK_FSA

CPU_BSEL1

CLK_FSC

CLK_PCI_DDR33

CLK_PCI_EC32 CLK_PCI_ICH20

R122

R122 10K_0402_5%

10K_0402_5% PM@

PM@

R128

R128 10K_0402_5%

10K_0402_5% GM@

GM@

B

DOT_96 MHz

CLK_48M_ICH22

C

USB MHz

+1.05VS

R117 33_0402_5%R117 33_0402_5%

1 2

R111 33_0402_5%R111 33_0402_5%

1 2

CK_PWRGD22

H_STP_CPU#22 H_STP_PCI#22

R115 33_0402_5%R115 33_0402_5%

1 2

R113 33_0402_5%R113 33_0402_5%

1 2

R112 33_0402_5%R112 33_0402_5%

1 2

C

D

R108

1 2

0_0805_5%

10U_0805_10V4Z

+1.05VS_CK505

FSB

0.1U_0402_16V4Z

C213

+3VS_CK505

CLK_FSA

CLK_14ICH

CLK_DDR

CLK_EC CLK_ICH

Issued Date

1

C214

2

0.1U_0402_16V4Z

U4

55

VDD_SRC

6

VDD_REF

12

VDD_PCI

72

VDD_CPU

19

VDD_48

27

VDD_PLL3

66

VDD_CPU_IO

31

VDD_PLL3_IO

62

VDD_SRC_IO

52

VDD_SRC_IO

23

VDD_IO

38

VDD_SRC_IO

20

USB_0/FS_A

2

FS_B/TEST_MODE

7

REF_0/FS_C/TEST_

8

REF_1

1

CKPWRGD/PD#

11

NC

53

CPU_STOP#

54

PCI_STOP#

5

XTAL_IN

4

XTAL_OUT

13

PCI_1

14

PCI_2

15

PCI_3

16

PCI_4/SEL_LCDCL

17

PCIF_5/ITP_EN

18

VSS_PCI

3

VSS_REF

22

VSS_48

26

VSS_IO

69

VSS_CPU

30

VSS_PLL3

34

VSS_SRC

59

VSS_SRC

42

VSS_SRC

73

THERMAL_PAD

SLG8SP556VTR_QFN72_10X10

D

1

2

CPU_BSEL1 CLK_FSC

CLK_XTAL_IN CLK_XTAL_OUT

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10U_0805_10V4Z

1

2

1

C215

C216

2

2008/09/19 2009/09/19

E

0.1U_0402_16V4Z

1

C217

2

0.1U_0402_16V4Z

Compal Secret Data

E

+1.05VS_CK505

1

C218

2

0.1U_0402_16V4Z

SDA SCL

CPU_0

CPU_0#

CPU_1

CPU_1#

SRC_0/DOT_96

SRC_0#/DOT_96#

LCDCLK/27M

LCDCLK#/27M_SS

SRC_2

SRC_2#

SRC_3

SRC_3#

SRC_4

SRC_4#

SRC_6

SRC_6#

SRC_7

SRC_7#

SRC_8/CPU_ITP

SRC_8#/CPU_ITP#

SRC_9

SRC_9#

SRC_10

SRC_10#

SRC_11

SRC_11#

CLKREQ_3# CLKREQ_4# CLKREQ_6# CLKREQ_7#

CLKREQ_9# SLKREQ_10# CLKREQ_11#

USB_1/CLKREQ_A#

Deciphered Date

1

C219

2

9 10

71 70 68 67

24 25

28 29

32 33

35 36

39 40

57 56

61 60

64 63

44 45

50 51

48 47

37 41 58 65 43 49 46 21

+3VS

CLK_96M CLK_96M#

SRC_1 SRC_1#

CLK_LAN_R CLK_LAN#_R

CLKREQ_SATA# CLKREQ_WLAN# CLKREQ_NEW# CLKREQ_3GPLL# CLKREQ_ROB# CLKREQ_5IN1# CLKREQ_TV#

F

+3VS_CK505

R107

1 2

0_0805_5%

10U_0805_10V4Z

1 2 1 2

F

250mA80mA

0.1U_0402_16V4Z

1

2

R509

R509 R510 0_0402_5%GM@R510 0_0402_5%GM@ R511 0_0402_5%PM@R511 0_0402_5%PM@

R512 0_0402_5%PM@R512 0_0402_5%PM@ R555

R555 R556

R556 R557

R557 R558

R558

R4860_0402_5% R4860_0402_5% R4870_0402_5% R4870_0402_5%

1

C207

2

1 2 1 2

CLK_LAN CLK_LAN#

C207

0.1U_0402_16V4Z

CPU

NB

0_0402_5%GM@

0_0402_5%GM@ 0_0402_5%GM@

0_0402_5%GM@ 0_0402_5%@

0_0402_5%@ 0_0402_5%@

0_0402_5%@

ICH-DMI

SATA

WLAN

ExpressCard

3G_PLL

CLK_LAN 28 CLK_LAN# 28

NAND

5IN1

TV

Title

Size Document Number Rev

Date: Sheet

C206

PM_SMBDATA 14,15,22,25,27 PM_SMBCLK 14,15,22,25,27

CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4 CLK_MCH_BCLK 7

CLK_MCH_BCLK# 7

CLK_PCIE_ICH 20 CLK_PCIE_ICH# 20

CLK_PCIE_SATA 21 CLK_PCIE_SATA# 21

CLK_WLAN 27 CLK_WLAN# 27

CLK_NEW 25 CLK_NEW# 25

CLK_MCH_3GPLL 8 CLK_MCH_3GPLL# 8

CLK_ROB 27 CLK_ROB# 27

CLK_5IN1 31 CLK_5IN1# 31

CLK_TV 27 CLK_TV# 27

CLKREQ_SATA# 22 CLKREQ_WLAN# 27 CLKREQ_NEW# 25 CLKREQ_3GPLL# 8 CLKREQ_ROB# 27

CLKREQ_TV# 27

G

0.1U_0402_16V4Z

1

C208

2

1

C209

2

0.1U_0402_16V4Z

CLK_DREF_96M 8 CLK_DREF_96M# 8

CLK_PCIE_VGA 17 CLK_PCIE_VGA# 17

CLK_DREF_SSC 8 CLK_DREF_SSC# 8

27M_CLK 17 27M_SSC 17

0.1U_0402_16V4Z

1

C210

2

NB (96MHz)

VGA (100MHz)

NB_SSC (100MHz) VGA_SSC (27MHz)

LOM

CLK_LAN_R

R472 0_0402_5%@R472 0_0402_5%@

CLK_LAN#_R

R473 0_0402_5%@R473 0_0402_5%@

for debug using, please place the resistors close to CLK gen. if need to use XDP,set "CLK_ICH" to high(266MHz)

CLKREQ_SATA# CLKREQ_WLAN# CLKREQ_NEW# CLKREQ_3GPLL#

CLKREQ_ROB# CLKREQ_5IN1# CLKREQ_TV#

Compal Electronics, Inc.

401605

G

12 12

R125 10K_0402_5%R125 10K_0402_5% R124 10K_0402_5%R124 10K_0402_5% R119 10K_0402_5%R119 10K_0402_5% R118 10K_0402_5%R118 10K_0402_5% R123 10K_0402_5%R123 10K_0402_5% R126 10K_0402_5%R126 10K_0402_5% R120 10K_0402_5%R120 10K_0402_5%

SCHEMATIC MB A4571

12 12 12 12 12 12 12

H

C211

+3VS

16 43Wednesday, September 16, 2009

1

C212

0.1U_0402_16V4Z

2

CLK_XDP

CLK_XDP#

of

H

E

1

2

5

PCIE_MTX_C_GRX_N[0..15]10

PCIE_MTX_C_GRX_P[0..15]10

PCIE_MTX_C_GRX_N15 PCIE_MTX_C_GRX_P15

PCIE_MTX_C_GRX_N14

D D

C C

CLK_PCIE_VGA16

CLK_PCIE_VGA#16 VGA_HDMI_TX0+19

VGA_HDMI_TX0-19

VGA_HDMI_TX1+19

VGA_HDMI_TX1-19

VGA_HDMI_TX2+19

VGA_HDMI_TX2-19

VGA_HDMI_CLK+19

VGA_HDMI_CLK-19

B B

VGA_HDMI_CLK19

VGA_HDMI_DATA19

VGA_HDMI_HPD19

VGA_CRT_CLK18

VGA_CRT_DATA18

VGA_CRT_R18 VGA_CRT_G18 VGA_CRT_B18

VGA_CRT_HSYNC18 VGA_CRT_VSYNC18

SUSP#25,29,32,35,40

A A

PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_N13

PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N12

PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_N11

PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N10

PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_N9

PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N8

PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N7

PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_N6

PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_N5

PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N4

PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_P0

LCD_EDID_CLK LCD_EDID_DATA VGA_ENVDD

+1.8VS

5

PCIE_MTX_C_GRX_N[0..15] PCIE_MTX_C_GRX_P[0..15]

1

3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99

101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 205

JAE_WB3F200VD1R1000~D

JAE_WB3F200VD1R1000~D JVGA

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

65

66

67

68

69

70

71

72

73

74

75

76

77

78

79

80

81

82

83

84

85

86

87

88

89

90

91

92

93

94

95

96

97

98

99

100

101

102

103

104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

136

137

138

139

140

141

142

143

144

145

146

147

148

149

150

151

152

153

154

155

156

157

158

159

160

161

162

163

164

165

166

167

168

169

170

171

172

173

174

175

176

177

178

179

180

181

182

183

184

185

186

187

188

189

190

191

192

193

194

195

196

197

198

199

200

201

202

203

204

205

206

@JVGA

@

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206

4

PCIE_GTX_C_MRX_N[0..15]10

PCIE_GTX_C_MRX_P[0..15]10

PCIE_GTX_C_MRX_N15 PCIE_GTX_C_MRX_P15

PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P14

PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P13

PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P12

PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P11

PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P10

PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P9

PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P8

PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P7

PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_P6

PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_P5

PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_P4

PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P3

PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P2

PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_P1

PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_P0

LCD_TXOUT0+ LCD_TXOUT0-

LCD_TXOUT1+ LCD_TXOUT1-

LCD_TXOUT2+ LCD_TXOUT2-

LCD_TXCLK+ LCD_TXCLK-

LCD_TZOUT0+ LCD_TZOUT0-

LCD_TZOUT1+ LCD_TZOUT1-

LCD_TZOUT2+ LCD_TZOUT2-

LCD_TZCLK+ LCD_TZCLK-

+5VALW +3VS

+1.8VS

B+

4

3

PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]

2N7002DW-T/R7_SOT363-6

UMA_ENVDD10

VGA_ENVDD

LCD_TXOUT0+ LCD_TXOUT0-

LCD_TXOUT1+ LCD_TXOUT1-

LCD_TXOUT2+ LCD_TXOUT2-

LCD_TZOUT0+ LCD_TZOUT0-

LCD_TZOUT1+ LCD_TZOUT1-

LCD_TZOUT2+ LCD_TZOUT2-

BKOFF#32

+3VS

27M_CLK 16 27M_SSC 16

VGA_TV_LUMA 18 VGA_TV_CRMA 18

PLT_RST# 8,20,25,27,28,31,32,33

EC_SMB_CK2 4,32 EC_SMB_DA2 4,32

VGA_ENBKL 32

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

3

BKOFF#

@

1 2

R627 4.7K_0402_5%

Compal Secret Data

1 2

R624 0_0402_5%GM@R624 0_0402_5%GM@

1 2

R625 0_0402_5%PM@R625 0_0402_5%PM@

2 4 6

8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42

ACES_88242-4001

BKOFF#

Deciphered Date

LCD/PANEL BD. Conn.

JLVDS

1

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 GND

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

GND

@

68P_0402_50V8J

please link to VGA Conn. then link to LVDS Conn.

2

+LCD_VDD

12

61

Q17A

ENVDD

R626

100K_0402_5%

LCD_TXCLK+ LCD_TXCLK-

LCD_TZCLK+ LCD_TZCLK-

LCD_EDID_CLK

LCD_EDID_DATA

+LCDVDD_R

C677

2

R621

R621 300_0603_5%

300_0603_5%

2

5

12

+LCD_INV

1

2

LCD_TXOUT0+ LCD_TXOUT0-

LCD_TXOUT1+ LCD_TXOUT1-

LCD_TXOUT2+ LCD_TXOUT2-

LCD_TXCLK+

LCD_TXCLK-

LCD_TZOUT0+ LCD_TZOUT0-

LCD_TZOUT1+ LCD_TZOUT1-

LCD_TZOUT2+ LCD_TZOUT2-

LCD_TZCLK+

LCD_TZCLK-

LCD_EDID_CLK LCD_EDID_DATA

+3V_SB

12

R622

R622 1M_0402_5%

1M_0402_5%

1 2

R623 100K_0402_5%R623 100K_0402_5%

3

1000P_0402_50V7K

Q17B

Q17B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

+LCDVDD_R

1

DAC_BRIG 32 INVT_PWM 32

LVDS_SEL 22

FBMA-L11-201209-221LMA30T_0805

Rated Current MAX:3000mA

1

C678

0.1U_0402_25V4Z

2

specially control signal for 16" panel by cable selection High-->one channel Low-->two channel

L17

Title

SCHEMATIC MB A4571

Size Document Number Rev

Date: Sheet

1

+3VS

W=60mils

S

G

Q18

2

AO3413_SOT23

D

C672

1.5A

12

12 12

D

1 3

1

2

@

+LCD_VDD

1

C675

4.7U_0805_10V4Z

2

+3VS

NB sideLVDS conn.VGA side

R6290_0402_5% GM@ R6290_0402_5% GM@ R6310_0402_5% GM@ R6310_0402_5% GM@

R6330_0402_5% GM@ R6330_0402_5% GM@ R6350_0402_5% GM@ R6350_0402_5% GM@

R6370_0402_5% GM@ R6370_0402_5% GM@ R6390_0402_5% GM@ R6390_0402_5% GM@

R6410_0402_5% GM@ R6410_0402_5% GM@ R6430_0402_5% GM@ R6430_0402_5% GM@

R6450_0402_5% GM@ R6450_0402_5% GM@ R6470_0402_5% GM@ R6470_0402_5% GM@

R6490_0402_5% GM@ R6490_0402_5% GM@ R6510_0402_5% GM@ R6510_0402_5% GM@

R6530_0402_5% GM@ R6530_0402_5% GM@ R6550_0402_5% GM@ R6550_0402_5% GM@

R6570_0402_5% GM@ R6570_0402_5% GM@ R6590_0402_5% GM@ R6590_0402_5% GM@

R6610_0402_5% GM@ R6610_0402_5% GM@ R6630_0402_5% GM@ R6630_0402_5% GM@

+LCD_VDD

1

C676

0.1U_0402_16V4Z

2

UMA_LCD_TXOUT0+ 10

UMA_LCD_TXOUT0- 10

UMA_LCD_TXOUT1+ 10

UMA_LCD_TXOUT1- 10

UMA_LCD_TXOUT2+ 10

UMA_LCD_TXOUT2- 10

UMA_LCD_TXCLK+ 10

UMA_LCD_TXCLK- 10

UMA_LCD_TZOUT0+ 10

UMA_LCD_TZOUT0- 10

UMA_LCD_TZOUT1+ 10

UMA_LCD_TZOUT1- 10

UMA_LCD_TZOUT2+ 10

UMA_LCD_TZOUT2- 10

UMA_LCD_TZCLK+ 10

UMA_LCD_TZCLK- 10

UMA_LCD_EDID_CLK 10

UMA_LCD_EDID_DATA 10

1

2

C671

1

4.7U_0805_10V4Z

L16

0_0805_5%

C674

0.1U_0402_16V4Z

B+

12

Compal Electronics, Inc.

401605

W=60mils

1

C673

0.1U_0402_16V4Z

2

of

17 43Wednesday, September 16, 2009

of

17 43Wednesday, September 16, 2009

of

17 43Wednesday, September 16, 2009

E

A

CRT CONNECTOR

12

R671

150_0402_1%

CRT_R

CRT_G

CRT_B

R672

150_0402_1%

1 1

UMA_CRT_R10 VGA_CRT_R17 UMA_CRT_G10 VGA_CRT_G17 UMA_CRT_B10 VGA_CRT_B17

1 2

R664 0_0402_5%GM@R664 0_0402_5%GM@

1 2

R665 0_0402_5%PM@R665 0_0402_5%PM@

1 2

R666 0_0402_5%GM@R666 0_0402_5%GM@

1 2

R667 0_0402_5%PM@R667 0_0402_5%PM@

1 2

R668 0_0402_5%GM@R668 0_0402_5%GM@

1 2

R669 0_0402_5%PM@R669 0_0402_5%PM@

R670

12

C680

150_0402_1%

B

1

C681

2

2.2P_0402_50V8C

NBQ100505T-800Y_0402

1

C682

2

2.2P_0402_50V8C

L18

1 2

L19

1 2

L20

1 2

1

2

2.2P_0402_50V8C

C683

1

C684

2

2.2P_0402_50V8C

D55

DAN217_SC59

DAN217_SC59 @

@

CRT_R_L

CRT_G_L

CRT_B_L

1

C685

2

2.2P_0402_50V8C

C

1

2

3

1

2

2.2P_0402_50V8C

1

D56

DAN217_SC59

2

3

@

1

D57

DAN217_SC59

2

3

@

+3VS

D

+CRT_VCC

+5VS +CRT_VCC_R +CRT_VCC

D58

2 1

RB491D_SC59-3

If=1A

CRT_B_L CRT_G_L CRT_R_L VSYNC

HSYNC CRT_DDC_CLK

CRT_DDC_DAT

F3

1.1A_6V_MINISMDC110F-2

30mil

21

0.1U_0402_16V4Z@

JCRTB

1

2

3

4

5

6

7

8

9

10

11

12

ACES_85201-1205N

ACES_85201-1205N @

@

GND GND

13 14

C679

E

1

2

+CRT_VCC

1 2

C686 0.1U_0402_16V4ZC686 0.1U_0402_16V4Z

UMA_CRT_HSYNC10

2 2

VGA_CRT_HSYNC17

UMA_CRT_VSYNC10

VGA_CRT_VSYNC17

1 2

R675 0_0402_5%GM@R675 0_0402_5%GM@

1 2

R676 0_0402_5%PM@R676 0_0402_5%PM@

1 2

R681 0_0402_5%GM@R681 0_0402_5%GM@

1 2

R683 0_0402_5%PM@R683 0_0402_5%PM@

CRT_HSYNC

SN74AHCT1G125GW_SOT353-5

CRT_VSYNC

1

5

P

4

OE#

A2Y

G

U38

3

+CRT_VCC

1

5

P

OE#

A2Y

G

U39

SN74AHCT1G125GW_SOT353-5

U39

3

12

R673 10K_0402_5%R673 10K_0402_5%

D_CRT_HSYNC

4

1 2

L21 10_0402_5%L21 10_0402_5%

1 2

L22 10_0402_5%L22 10_0402_5%

C687

1

C688

2

10P_0402_50V8J

HSYNC

VSYNCD_CRT_VSYNC

1

2

10P_0402_50V8J

UMA_CRT_DATA10 VGA_CRT_DATA17 UMA_CRT_CLK10 VGA_CRT_CLK17

1 2

R679 0_0402_5%GM@R679 0_0402_5%GM@

1 2

R680 0_0402_5%PM@R680 0_0402_5%PM@

1 2

R682 0_0402_5%GM@R682 0_0402_5%GM@

1 2

R684 0_0402_5%PM@R684 0_0402_5%PM@

CRT_DATA

CRT_CLK

C850

33P_0402_50V8K

@

1

2

Q19B

1

C849

C849 33P_0402_50V8K

33P_0402_50V8K

2

@

+3VS

12

R674

R674 0_0402_5%

0_0402_5%

4.7K_0402_5%

2

Q19A

5

2N7002DW-T/R7_SOT363-6

4

3

2N7002DW-T/R7_SOT363-6

470P_0402_50V8J

+CRT_VCC

R678

@

R678

4.7K_0402_5%

1 2

CRT_DDC_DAT

CRT_DDC_CLK

1

C690

C690 470P_0402_50V8J

470P_0402_50V8J

2

@

R677

61

C689

TV CONNECTOR

@

@ DAN217_SC59

DAN217_SC59

1

D59

3 3

C691 22P_0402_50V8J

C691 22P_0402_50V8J @

@

VGA_TV_LUMA17

VGA_TV_CRMA17

12

R687

150_0402_1%

150_0402_1% TVOUT@

TVOUT@

12

R688

R688 150_0402_1%

150_0402_1% TVOUT@

TVOUT@

1

C693

C693 100P_0402_50V8J

100P_0402_50V8J

2

TVOUT@

1 2

C692 22P_0402_50V8J

C692 22P_0402_50V8J @

@

1

C694

C694 100P_0402_50V8J

100P_0402_50V8J

2

TVOUT@

+3VS

1 2

L23

L23 FBMA-L11-160808-121LMT_0603

FBMA-L11-160808-121LMT_0603 L24

L24 FBMA-L11-160808-121LMT_0603

FBMA-L11-160808-121LMT_0603

1 2

100P_0402_50V8J

TVOUT@

C695

TVOUT@

D59

2

3

1

2

@

@ DAN217_SC59

DAN217_SC59 D60

D60

2

TV_CRMA_L TV_LUMA_L

1

C696

C696 100P_0402_50V8J

100P_0402_50V8J

2

TVOUT@

1

3

JTV

4

CRMA

3

LUMA

2

GND

1

GND

ALLTO_C10888-10405-L

@

GND GND

6 5

TV-OUT Conn.

1. Y ground

2. C ground

3. Y (luminance+sync)

4. C (crominance)

4 4

Security Classification

2008/09/19 2009/09/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

E

of

18 43Wednesday, September 16, 2009

of

18 43Wednesday, September 16, 2009

of

18 43Wednesday, September 16, 2009

E

+3VS

1

2

10U_0805_10V4Z

D D

C C

B B

VGA_HDMI_TX0-17 VGA_HDMI_TX1-17 VGA_HDMI_TX2-17

VGA_HDMI_CLK+17 VGA_HDMI_TX0+17 VGA_HDMI_TX1+17 VGA_HDMI_TX2+17

A A

1

C242

C242 IHDMI@

IHDMI@

0.1U_0402_16V4Z

2

RB161M_SOD123 H@

+5VS

RB161M_SOD123 H@

VGA_DVI_TXC-

VGA_DVI_TXC+

VGA_DVI_TXD0-

VGA_DVI_TXD0+

VGA_DVI_TXD1-

VGA_DVI_TXD1+

VGA_DVI_TXD2-

VGA_DVI_TXD2+

HDMI_R_CK+ HDMI_R_CKHDMI_R_D1HDMI_R_D1+ HDMI_R_D0HDMI_R_D0+ HDMI_R_D2+ HDMI_R_D2-

+5VS

5

1

C243

C243 IHDMI@

IHDMI@

2

0.1U_0402_16V4Z

D8

2 1

D53

2 1

CV165 0.1U_0402_16V7K HDMI@CV165 0.1U_0402_16V7K HDMI@ CV167 0.1U_0402_16V7K HDMI@CV167 0.1U_0402_16V7K HDMI@

CV169 0.1U_0402_16V7K HDMI@CV169 0.1U_0402_16V7K HDMI@ CV171 0.1U_0402_16V7K HDMI@CV171 0.1U_0402_16V7K HDMI@

HDMI@

1 2

R690 499_0402_1%

HDMI@

1 2

R691 499_0402_1%

HDMI@

1 2

R692 499_0402_1%

HDMI@

1 2

R693 499_0402_1%

HDMI@

1 2

R694 499_0402_1%

HDMI@

1 2

R695 499_0402_1%

HDMI@

1 2

R696 499_0402_1%

HDMI@

1 2

R697 499_0402_1%

@

1 2

R698 100K_0402_5%

5

1

C244

C244 IHDMI@

IHDMI@

0.1U_0402_16V4Z

2

1.1A_6V_MINISMDC110F-2

1 2

L9

1

4

WCM-2012-900T_0805H@L9WCM-2012-900T_0805H@

1 2

L10

1

4

WCM-2012-900T_0805H@

1 2

L11

1

4

WCM-2012-900T_0805H@

1 2

L12

1

4

WCM-2012-900T_0805H@

1 2

1 2 1 2

13

D

2

G

S

1

C245

C245 IHDMI@

IHDMI@

2

0.1U_0402_16V4Z

F2

H@F2

H@

2 1

R164

0_0402_5%@

2

3

R166

0_0402_5%@

R167

0_0402_5%@

2

3

R172

0_0402_5%@

R173

0_0402_5%@

2

3

R176

0_0402_5%@

R177

0_0402_5%@

2

3

R178

0_0402_5%@

Q20

Q20 2N7002_SOT23-3

2N7002_SOT23-3 HDMI@

HDMI@

1

C246

C246 IHDMI@

IHDMI@

0.1U_0402_16V4Z

2

1

C250

C250 H@

H@

0.1U_0402_16V4Z

2

HDMI_R_CK-

HDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

CV164 0.1U_0402_16V7K HDMI@CV164 0.1U_0402_16V7K HDMI@ CV166 0.1U_0402_16V7K HDMI@CV166 0.1U_0402_16V7K HDMI@

CV168 0.1U_0402_16V7K HDMI@CV168 0.1U_0402_16V7K HDMI@ CV170 0.1U_0402_16V7K HDMI@CV170 0.1U_0402_16V7K HDMI@

1

C247

C247 IHDMI@

IHDMI@

+HDMI_5V_OUT+5VL

C248

C248 IHDMI@

IHDMI@

2

0.1U_0402_16V4Z

Vendor suggest un-mound for these.

VGA_DVI_TXC-

VGA_DVI_TXD1-

VGA_DVI_TXD0- VGA_DVI_TXD0+

CEC_RST#

+5VL C592

C592

1U_0402_6.3V4Z

@

1 2 1 2

HDMI Connector

HDMI_HPD

+HDMI_5V_OUT

HDMI_SDATA HDMI_SCLK

HDMI_CEC HDMI_R_CK-

HDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

4

1

C249

C249 IHDMI@

IHDMI@

0.1U_0402_16V4Z

2

R159

@R159

@

1 2

68_0402_5%

R160

@R160

@

1 2

68_0402_5%

R161

@R161

@

1 2

68_0402_5%

R162

@R162

@

1 2

68_0402_5%

U34

@U34

@

VCC

2

RESET#

GND

G691L308T72UF_SOT23-3

1

HDMI_CECIN

2

VGA_DVI_TXCVGA_DVI_TXD0VGA_DVI_TXD1VGA_DVI_TXD2-

VGA_DVI_TXC+ VGA_DVI_TXD0+ VGA_DVI_TXD1+ VGA_DVI_TXD2+

JHDMI

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CKCK_shield CK+ D0D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+

TYCO_1939864-1_19P@

GND GND GND GND

4

11 10

9 8 7 6 5 4 3 2 1

+3VS

12

VGA_DVI_TXC+

1 2

C251 0.5P_0402_50V8B

@

VGA_DVI_TXD2+VGA_DVI_TXD2-

1 2

C252 0.5P_0402_50V8B

@

VGA_DVI_TXD1+

1 2

C253 0.5P_0402_50V8B

@

1 2

C254 0.5P_0402_50V8B

@

+5VL

3

1

C593

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

1

2

U33

@U33

@

5

NC

Vcc

4

GND

Y

TC7SET14FU_SOT353-5

HDMI_CECOUT

20 21 22 23

3

U7

R141

R141 20K_0402_5%

20K_0402_5% IHDMI@

IHDMI@

PCIE_GTX_C_MRX_HDMI_P3

R145

7.5K_0402_1%

7.5K_0402_1% IHDMI@

IHDMI@

R148 0_0402_5%@R148 0_0402_5%@

+3VS

1 2

R150 0_0402_5%@R150 0_0402_5%@

1 2

R152 0_0402_5%IHDMI@R152 0_0402_5%IHDMI@

1 2

R154 0_0402_5%IHDMI@R154 0_0402_5%IHDMI@

1 2

PCIE_GTX_C_MRX_HDMI_P310

SDVO_SDATA8

R689 0_0402_5%

SDVO_SCLK8

IHDMI@

1 2

No P/N

1

HDMI_CEC

2

A

3

22P_0402_50V8J

HDMI_CECIN

2N7002_SOT23-3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C594

C594 @

@

12

10K_0402_5%

13

D

Q49

H@

S

R163

1 2

27K_0402_5%

27K_0402_5% H@

H@

100K_0402_5%

R157

R157 H@

H@

R165

R165 H@

H@

8MHZ_20PF_X8A008000IK1H

1 2

2

1

2

G

12

+3VS

2

VCC3V

11

VCC3V

15

VCC3V

21

VCC3V

26

VCC3V

33

VCC3V

40

VCC3V

46

VCC3V

3

FUNCTION1

4

FUCNTION2

R156

12

6

3.9K_0402_1% IHDMI@

VGA_DVI_TXC+ VGA_DVI_TXC-

VGA_DVI_TXD2+ VGA_DVI_TXD2-

VGA_DVI_TXD1+ VGA_DVI_TXD1-

VGA_DVI_TXD0+ VGA_DVI_TXD0-

Y4

@Y4

@

+3VL+5VL

21

12

R581

R581 27K_0402_5%

27K_0402_5% H@

H@

HDMI_CEC

13

D

2

G

S

2008/09/19 2009/09/19

3

ANALOG1(REXT)

7

HPD_SOURCE

8

SDA_SOURCE

9

SCL_SOURCE

10

ANALOG2

13

OUT_D4+

14

OUT_D4-

16

OUT_D3+

17

OUT_D3-

19

OUT_D2+

20

OUT_D2-

22

OUT_D1+

23

OUT_D1-

1

GND

5

GND

12

GND

18

GND

24

GND

27

GND

31

GND

36

GND

37

GND

43

GND

STHDLS101TQTR QFN 48P HDMI SHIFTER_QFN48_7X7

STHDLS101TQTR QFN 48P HDMI SHIFTER_QFN48_7X7 IHDMI@

IHDMI@

CEC_XOUTCEC_XIN

2

C595

C595 22P_0402_50V8J

22P_0402_50V8J

1

@

EC_SMB_CK132,37

+5VL

D9

D9 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2 H@

H@

Q50

Q50 2N7002_SOT23-3

2N7002_SOT23-3 H@

H@

0.1U_0402_16V4Z

0.1U_0402_16V4Z H@

H@

R169 4.7K_0402_5%

R171 4.7K_0402_5%

R174 47K_0402_5%

R175 4.7K_0402_5%

C256

1

HDMI_CECIN HDMI_HPD_R

2

HDMI_CECOUT

Compal Secret Data

Deciphered Date

H@

12

CEC_XOUT

12

CEC_XIN

12

THERMAL_PAD

HDMI CEC Controller

U8

1

P3_5/SSCK/SCL/CMP1_2

2

P3_7/CNTR0#/SSO/TXD1

3

RESET#

4

XOUT/P4_7

5

VSS/AVSS

6

XIN/P4_6

7

VCC/AVCC

8

MODE

9

P4_5/INT0#/RXD1

10

P1_7/CNTR00/INT10#

R5F211A4C32SP-W4_LSSOP20

R5F211A4C32SP-W4_LSSOP20 H@

H@

2

OE

10K_0402_5%

10K_0402_5% IHDMI@

IHDMI@

SCL_SINK SDA_SINK

HPD_SINK

FUNCTION3 FUNCTION4

2

R144

OE*

DDC_EN

IN_D4+

IN_D4-

IN_D3+

IN_D3-

IN_D2+

IN_D2-

IN_D1+

IN_D1-

+HDMI_5V_OUT

12

R142

4.7K_0402_5%

4.7K_0402_5% H@

H@

OE

25

HDMI_SCLK

28 29

HDMI_SDATA

30

HDMI_HPD_R

32

R149 0_0402_5% @R149 0_0402_5% @

34

R151 0_0402_5% @R151 0_0402_5% @

35

R153 0_0402_5% IHDMI@R153 0_0402_5%IHDMI@ R155 0_0402_5% IHDMI@R155 0_0402_5%IHDMI@

HDMI_HPD_R32

48 47

45 44

42 41

39 38

49

0.1U_0402_16V4Z

P3_3/TCIN/INT3#/SSI00/CMP1_0

Title

Size Document Number Rev

Date: Sheet

R143

4.7K_0402_5%

4.7K_0402_5% H@

H@

Q47

Q47 BSH111_SOT23-3

BSH111_SOT23-3 HDMI@

HDMI@

R147 4.7K_0402_5%

IHDMI@

1 2 1 2

R570

H@R570

H@

2.2K_0402_5%

2.2K_0402_5% HDMI_HPD_R

PCIE_MTX_C_GRX_HDMI_P3 10 PCIE_MTX_C_GRX_HDMI_N3 10

PCIE_MTX_C_GRX_HDMI_P0 10 PCIE_MTX_C_GRX_HDMI_N0 10

PCIE_MTX_C_GRX_HDMI_P1 10 PCIE_MTX_C_GRX_HDMI_N1 10

PCIE_MTX_C_GRX_HDMI_P2 10 PCIE_MTX_C_GRX_HDMI_N2 10

2

C658

C658 H@

H@

1

P1_5/RXD0/CNTR01/INT11#

P1_3/KI3#/AN11/TZOUT

P1_2/KI2#/AN10/CMP0_2

P1_1/KI1#/AN9/CMP0_1

P1_0/KI0#/AN8/CMP0_0

P3_4/SCS#/SDA/CMP1_1

2

SGD

12

12 12

12

D54

CH751H-40PT_SOD323-2

HDMI@

+5VL

1

5

U37

P

4

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5 H@

H@

3

P1_6/CLK0/SSI01

P1_4/TXD0

P4_2/VREF

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

1

RV67 2.2K_0402_5%

RV67 2.2K_0402_5% HDMI@

HDMI@

31

2

Q48

Q48 BSH111_SOT23-3

BSH111_SOT23-3 HDMI@

HDMI@

31

SGD

+3VS

R571

HDMI@R571

HDMI@

2.2K_0402_5%

21

R572

100K_0402_5%

H@

HDMI_HPD_R

11

CEC_TEST

12

CEC_FSHUPDCEC_RST#

13

CEC_FSHUPD (Pin13)

14

Low= Force to update flash.

C848

15

C255

16

HDMI_SCLK

17

HDMI_SDATA

18

19

20

1

VGA_HDMI_HPD 17

CEC_INT# 32VGA_HDMI_CLK-17

1 2 1 2

12

+3VS

VGA_HDMI_CLK 17

VGA_HDMI_DATA 17

+3VS

12

+3VS+5VL

HDMI_HPD

2

C659

C659 H@

H@

1

0.1U_0402_16V4Z

1 2

H@

1 2

R168 4.7K_0402_5%

H@

1 2

R170 4.7K_0402_5%

1U_0402_6.3V4ZH@

0.1U_0402_16V4ZH@

0.1U_0402_16V4ZH@ +5VL

EC_SMB_DA1 32,37

of

19 43Wednesday, September 16, 2009

of

19 43Wednesday, September 16, 2009

of

19 43Wednesday, September 16, 2009

+5VL

E

5

D D

+3VS +3VS

C C

B B

A A

RP18

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

For Express Card

For NAND

For LAN

For WLAN

For TV

For 5 IN 1

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

PCIE_IRX_C_NEWTX_N125 PCIE_IRX_C_NEWTX_P125 PCIE_ITX_C_NEWRX_N125 PCIE_ITX_C_NEWRX_P125

PCIE_IRX_C_NANDTX_N227 PCIE_IRX_C_NANDTX_P227

PCIE_ITX_C_NANDRX_N227 PCIE_ITX_C_NANDRX_P227

PCIE_IRX_C_LANTX_N328 PCIE_IRX_C_LANTX_P328 PCIE_ITX_C_LANRX_N328 PCIE_ITX_C_LANRX_P328

PCIE_IRX_C_WLANTX_N427 PCIE_IRX_C_WLANTX_P427 PCIE_ITX_C_WLANRX_N427 PCIE_ITX_C_WLANRX_P427

PCIE_IRX_C_TVTX_N527 PCIE_IRX_C_TVTX_P527 PCIE_ITX_C_TVRX_N527 PCIE_ITX_C_TVRX_P527

PCIE_IRX_C_5IN1TX_N631 PCIE_IRX_C_5IN1TX_P631 PCIE_ITX_C_5IN1RX_N631 PCIE_ITX_C_5IN1RX_P631

+3V_SB

RP21

RP22

1 2

R183 10K_0402_5%R183 10K_0402_5%

4

D11

C8 D9

E12

E9

C9

E10

B7 C7 C5

G11

F8

F11

E7

A3 D2

F10

D5

D10

B3

F7 C3

F3

F4 C1 G7 H7 D1 G5 H6 G1 H3

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

C258

C258 C259

C259

C260 0.1U_0402_16V7K NAND@C260 0.1U_0402_16V7K NAND@ C261 0.1U_0402_16V7K NAND@C261 0.1U_0402_16V7K NAND@

C262 0.1U_0402_16V7KC262 0.1U_0402_16V7K C263 0.1U_0402_16V7KC263 0.1U_0402_16V7K

C264 0.1U_0402_16V7K WLAN@C264 0.1U_0402_16V7K WLAN@ C265 0.1U_0402_16V7K WLAN@C265 0.1U_0402_16V7K WLAN@

C846 0.1U_0402_16V7KC846 0.1U_0402_16V7K C847 0.1U_0402_16V7KC847 0.1U_0402_16V7K

C268 0.1U_0402_16V7KC268 0.1U_0402_16V7K C269 0.1U_0402_16V7KC269 0.1U_0402_16V7K

USB_OC#4

45

USB_OC#6

36

USB_OC#11

27

USB_OC#10

18

10K_0804_8P4R_5%

USB_OC#5

45

USB_OC#0

36

USB_OC#8

27

USB_OC#2

18

10K_0804_8P4R_5%

USB_OC#9

0.1U_0402_16V7K

12

0.1U_0402_16V7K

12

12 12

ICH_SPI_MOSI22

J5

E1

J6 C4

SPI_CS#122

USB_OC#026

USB_OC#225

EXP_CPPE#25

U9B

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

PIRQA# PIRQB# PIRQC# PIRQD#

ICH9-M ES_FCBGA676

ICH9-M ES_FCBGA676 ICH9R3@

ICH9R3@

Within 500 mils

PCI

Interrupt I/F

PCIE_ITX_NEWRX_N1 PCIE_ITX_NEWRX_P1

PCIE_ITX_NANDRX_N2 PCIE_ITX_NANDRX_P2

PCIE_ITX_LANRX_N3

PCIE_ITX_LANRX_P3

PCIE_ITX_WLANRX_N4 PCIE_ITX_WLANRX_P4

PCIE_ITX_TVRX_N5 PCIE_ITX_TVRX_P5

PCIE_ITX_5IN1RX_N6 PCIE_ITX_5IN1RX_P6

1 2

R186

22.6_0402_1%

REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55

PCIRST#

DEVSEL#

PLOCK#

FRAME#

PLTRST#

PCICLK

PIRQE#/GPIO2

PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

USB_OC#0 USB_OC#2 USB_OC#4

USB_OC#5 USB_OC#6

USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11

USBBIAS

REQ0# GNT0#

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PAR

PERR# SERR#

STOP#

TRDY#

PME#

N29 N28 P27 P26

L29

L28 M27 M26

J29

J28 K27 K26

G29 G28 H27 H26

E29 E28 F27 F26

C29 C28 D27 D26

D23 D24 F23

D25 E23

AG2 AG1

N4 N5 N6 P6

M1

N2 M4 M3

N3

N1

P5

P3

F1 G4 B6 A7 F13 F12 E6 F6

D8 B4 D6 A5

D3 E3 R1 C6 E4 C2 J4 A4 F5 D7

C14 D4 R2

H4 K6 F2 G2

U9D

ICH9-M ES_FCBGA676

ICH9-M ES_FCBGA676 ICH9R3@

ICH9R3@

3

PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3

PCI_IRDY#

PCI_DEVSEL# PCI_PERR# PCI_PLOCK# PCI_SERR# PCI_STOP# PCI_TRDY#

PCI_FRAME#

CLK_PCI_ICH

PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

PERN1 PERP1 PETN1 PETP1

PERN2 PERP2 PETN2 PETP2

PERN3 PERP3 PETN3 PETP3

PERN4 PERP4 PETN4 PETP4

PERN5 PERP5 PETN5 PETP5

PERN6/GLAN_RXN PERP6/GLAN_RXP PETN6/GLAN_TXN PETP6/GLAN_TXP

SPI_CLK SPI_CS0# SPI_CS1#GPIO58/CLGPIO6

SPI_MOSI SPI_MISO

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43 OC5#/GPIO29 OC6#/GPIO30 OC7#/GPIO31 OC8#/GPIO44 OC9#/GPIO45 OC10#/GPIO46 OC11#/GPIO47

USBRBIAS USBRBIAS#

PCI - Express

SPI

USB

RP15

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5% RP16

RP16

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5% RP17

RP17

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

CLK_PCI_ICH

RP19

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

DMI_IRCOMP

Within 500 mils

R180 24.9_0402_1%R180 24.9_0402_1%

V27 V26 U29 U28

Y27 Y26 W29 W28

AB27 AB26 AA29 AA28

AD27 AD26 AC29 AC28

T26 T25

AF29 AF28

AC5 AC4 AD3 AD2 AC1 AC2 AA5 AA4 AB2 AB3 AA1 AA2 W5 W4 Y3 Y2 W1 W2 V2 V3 U5 U4 U1 U2

PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3

PCI_IRDY# PCI_DEVSEL# PCI_PERR# PCI_PLOCK#

PCI_SERR# PCI_STOP# PCI_TRDY# PCI_FRAME#

PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

PCI_GNT#0 22

STRAP_A16 22

PLT_RST# 8,17,25,27,28,31,32,33 CLK_PCI_ICH 16

DMI0RXN DMI0RXP DMI0TXN DMI0TXP

DMI1RXN DMI1RXP DMI1TXN DMI1TXP

DMI2RXN DMI2RXP DMI2TXN DMI2TXP

DMI3RXN DMI3RXP DMI3TXN DMI3TXP

DMI_CLKN DMI_CLKP

DMI_ZCOMP

Direct Media Interface

DMI_IRCOMP

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P

2

+3VS

DMI_MTX_IRX_N3 8 DMI_MTX_IRX_P3 8 DMI_ITX_MRX_N3 8 DMI_ITX_MRX_P3 8

DMI_MTX_IRX_N2 8 DMI_MTX_IRX_P2 8 DMI_ITX_MRX_N2 8 DMI_ITX_MRX_P2 8

DMI_MTX_IRX_N1 8 DMI_MTX_IRX_P1 8 DMI_ITX_MRX_N1 8 DMI_ITX_MRX_P1 8

DMI_MTX_IRX_N0 8 DMI_MTX_IRX_P0 8 DMI_ITX_MRX_N0 8 DMI_ITX_MRX_P0 8

CLK_PCIE_ICH# 16 CLK_PCIE_ICH 16

1 2

USB20_N0 26 USB20_P0 26 USB20_N1 26 USB20_P1 26 USB20_N2 24 USB20_P2 24 USB20_N3 25 USB20_P3 25 USB20_N4 26 USB20_P4 26 USB20_N5 26 USB20_P5 26 USB20_N6 27 USB20_P6 27 USB20_N7 27 USB20_P7 27 USB20_N8 25 USB20_P8 25 USB20_N9 26 USB20_P9 26

USB20_N11 26 USB20_P11 26

R179

10_0402_5%@

USB/B-Right USB/B-Right USB conn.-left eSATA-USB FP BT 3G/GPS/UWB WiMax(WLAN) ExpressCard Felica

Int. Camera

12

+1.5VS

1 2

10P_0402_50V8J@

C257

Lane reversal

1

Security Classification

2008/09/19 2009/09/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

20 43Wednesday, September 16, 2009

1

E

of

5

4

3

2

1

D D

1

+RTCVCC

1

C271

0.1U_0402_16V4Z

2

+RTCVCC

C C

AZ_BITCLK_HD29 AZ_BITCLK_MD26

AZ_BITCLK_MCH8

AZ_SYNC_HD29 AZ_SYNC_MD26

AZ_SYNC_MCH8

AZ_RST_HD#29 AZ_RST_MD#26 AZ_RST_MCH#8

AZ_SDOUT_HD29 AZ_SDOUT_MD26

AZ_SDOUT_MCH8

+3VS

B B

A A

+3V_SB

+3VS

2

3

1M_0402_5%

R200 33_0402_5%R200 33_0402_5% R202 33_0402_5%MDC@R202 33_0402_5%MDC@ R203 33_0402_5%IHDMI@R203 33_0402_5%IHDMI@

R205 33_0402_5%R205 33_0402_5% R206 33_0402_5%MDC@R206 33_0402_5%MDC@ R207 33_0402_5%IHDMI@R207 33_0402_5%IHDMI@

R209 33_0402_5%R209 33_0402_5%

R210 33_0402_5%MDC@R210 33_0402_5%MDC@

R211 33_0402_5%IHDMI@R211 33_0402_5%IHDMI@

R212 33_0402_5%R212 33_0402_5% R213 33_0402_5%MDC@R213 33_0402_5%MDC@ R214 33_0402_5%IHDMI@R214 33_0402_5%IHDMI@

1 2

R220 10K_0402_5%@R220 10K_0402_5%@

1 2

R222 10K_0402_5%@R222 10K_0402_5%@

1 2

R215 10K_0402_5%R215 10K_0402_5%

+3VS

+1.5VS

+RTCBATT

D10

D10 BAS40-04_SOT23-3

BAS40-04_SOT23-3

+CHGRTC

CMOS Setting, near DDR Door

R190

1 2

20K_0402_5%

ICH_RTCRST#

SHORT PADS

1U_0402_6.3V6K

ITPM Setting, near DDR Door

1 2

CR_WAKE# CR_CPPE# SATA_LED#

ICH_SRTCRST#

SM_INTRUDER#

AZ_BITCLK_HD_R

1ST HDD

SHORT PADS

1U_0402_6.3V6K

AZ_BITCLK

AZ_SYNC

AZ_RST#

AZ_SDOUT

R194

R194 20K_0402_5%

20K_0402_5%

R196

1 2 1 2 1 2

2ND HDD

@

1 2

R617 0_0603_5%

1 2

R618 5.1_0603_5%

@

R217

10K_0402_5%

@

R218

10K_0402_5%

R619

R619 10K_0402_5%

10K_0402_5%

AZ_BITCLK

AZ_BITCLK AZ_BITCLK_HD_R

J1

1 2

C273

1 2

J2

1 2

C274

1 2

SATA_IRX_C_DTX_N024 SATA_IRX_C_DTX_P024

SATA_ITX_DRX_N024 SATA_ITX_DRX_P024

SATA_IRX_C_DTX_N124 SATA_IRX_C_DTX_P124

SATA_ITX_DRX_N124 SATA_ITX_DRX_P124

reserve for EMI request

U11

1

CLKIN

2

PD#/OE

3

FS GND4ModOUT

PCS3P73Z11BXG-08-CR_TDFN8_2X2

@

C270

12P_0402_50V8J

X132.768KHZ_12.5P_MC-306 X132.768KHZ_12.5P_MC-306

3

NC

2

NC

C272

12P_0402_50V8J

ICH_INTVRMEN22

AZ_SDIN2_MCH8

VDD

SSEXTR

DLY_CTRL

12

R2040_0402_5% R2040_0402_5%

12

4

OUT

1

R189

IN

12

LAN100_SLP22

CR_CPPE#31

R198

1 2

24.9_0402_1%

AZ_SDIN0_HD29 AZ_SDIN1_MD26

AZ_SDOUT22

CR_WAKE#31 SATA_LED#34

1 2

8

C275 0.1U_0402_16V4Z

7 6

AZ_BITCLK_HD_R

5

12

10M_0402_5%

ICH_RTCX1 ICH_RTCX2

ICH_RTCRST# ICH_SRTCRST# SM_INTRUDER#

CR_CPPE#

AZ_SYNC AZ_RST#

AZ_SDOUT

CR_WAKE# SATA_LED#

C275

@ C275

@

2.2U_0402_X5R

@

C670

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

C23 C24

A25

F20

C22 B22

A22 E25 C13

F14 G13 D14

D13 D12 E13

B10 B28

B27 AF6

AH4 AE7 AF4

AG4 AH3 AE5

AG5 AG7

AE8 AG8

AJ16

AH16

AF17

AG17 AH13

AJ13

AG14

AF14

U11

@ U11

@

PCS3P73Z11BWHG

12

2

R620

1.5M_0402_5%

1.5M_0402_5% @

@

1

U9A

RTCX1 RTCX2

RTCRST# SRTCRST# INTRUDER#

INTVRMEN LAN100_SLP

GLAN_CLK LAN_RSTSYNC LAN_RXD0

LAN_RXD1 LAN_RXD2

LAN_TXD_0 LAN_TXD_1 LAN_TXD_2

GPIO56 GLAN_COMPI

GLAN_COMPO HDA_BIT_CLK

HDA_SYNC HDA_RST# HDA_SDIN0

HDA_SDIN1 HDA_SDIN2 HDA_SDIN3

HDA_SDOUT HDA_DOCK_EN#/GPIO33

HDA_DOCK_RST#/GPIO34 SATALED# SATA0RXN

SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

ICH9-M ES_FCBGA676

ICH9-M ES_FCBGA676 ICH9R3@

ICH9R3@

RTC

LPCCPU

LAN / GLAN

IHDA

SATA

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

INIT# INTR

RCIN#

NMI

SMI#

STPCLK#

THRMTRIP#

TP12

SATA4RXN

SATA4RXP SATA4TXN SATA4TXP

SATA5RXN

SATA5RXP SATA5TXN SATA5TXP

SATA_CLKN SATA_CLKP

SATARBIAS#

SATARBIAS

K5 K4 L6 K2

K3 J3

J1 N7

AJ27 AJ25

AE23 AJ26 AD22 AF25 AE22

AG25 L3

AF23 AF24

AH27

THRMTRIP_ICH#

AG26 AG27

AH11 AJ11 AG12 AF12

AH9 AJ9 AE10 AF10

AH18 AJ18 AJ7 AH7

EC_GA20

R195 56_0402_5%R195 56_0402_5%

1 2

EC_KBRST#GLAN_COMP

1 2

R208 54.9_0402_1%R208 54.9_0402_1%

TP12

SATARBIAS

24.9_0402_1%

PADT5PAD

SATA_IRX_C_DTX_N4 24 SATA_IRX_C_DTX_P4 24

SATA_ITX_DRX_N4 24

SATA_ITX_DRX_P4 24

SATA_IRX_C_DTX_N5 25 SATA_IRX_C_DTX_P5 25

SATA_ITX_DRX_N5 25

SATA_ITX_DRX_P5 25

CLK_PCIE_SATA# 16

CLK_PCIE_SATA 16

10mils width

R216

less than 500mils

1 2

LPC_AD0 32,33 LPC_AD1 32,33 LPC_AD2 32,33 LPC_AD3 32,33

LPC_FRAME# 32,33

FELICA_PWR 26 EC_GA20 32

H_A20M# 4 H_DPRSTP# 5,8,42

H_DPSLP# 5

H_PWRGOOD 5 H_IGNNE# 4 H_INIT# 4

H_INTR 4 EC_KBRST# 32

H_NMI 4 H_SMI# 4

H_STPCLK# 4

H_FERR#FERR#

H_THERMTRIP#

T5

EC_GA20 H_DPRSTP# H_FERR#

H_FERR# 4

EC_KBRST#

+1.05VS

R201

R201 56_0402_5%

56_0402_5%

H_THERMTRIP#

H_THERMTRIP# 4,8

SATA ODD

eSATA

R191 10K_0402_5%@R191 10K_0402_5%@ R192 56_0402_5%@R192 56_0402_5%@ R193 56_0402_5%R193 56_0402_5%

R197 10K_0402_5%@R197 10K_0402_5%@

1 2

3

12 12

12

R199

R199 330_0402_5% @

330_0402_5% @

2

@

CBE

2SC2411K_SOT23

1

Q10

12

1

2

3

+3VS +1.05VS

+3VS

+1.05VS+1.5VS

D50

D50 DAN202UT106_SC70-3

DAN202UT106_SC70-3 @

@

ENTRIP1 37,39

ENTRIP2 37,39

Security Classification

2008/09/19 2009/09/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

1

E

of

21 43Wednesday, September 16, 2009

of

21 43Wednesday, September 16, 2009

of

21 43Wednesday, September 16, 2009

5

+3VS

PM_SMBDATA14,15,16,25,27

D D

+3V_SB

C C

PM_SMBCLK14,15,16,25,27

R230 10K_0402_5%R230 10K_0402_5%

1 2

R232 10K_0402_5%R232 10K_0402_5%

1 2

R233 10K_0402_5%R233 10K_0402_5%

1 2

R234 10K_0402_5%R234 10K_0402_5%

1 2

R236 10K_0402_5%R236 10K_0402_5%

1 2

R238 10K_0402_5%R238 10K_0402_5%

1 2

R240 8.2K_0402_5%R240 8.2K_0402_5%

+3VS

+3V_SB

+3VS

+3VS +3VS

+3V_SB

+3VS

+3V_SB

+3VS

1 2

R242 1K_0402_5%R242 1K_0402_5%

1 2

R244 10K_0402_5%R244 10K_0402_5%

1 2

R245 8.2K_0402_5%@R245 8.2K_0402_5%@

1 2

R246 10K_0402_5%R246 10K_0402_5%

1 2

ACIN32,34,36

R250 8.2K_0402_5%R250 8.2K_0402_5% R251 10K_0402_5%R251 10K_0402_5%

R253 8.2K_0402_5%R253 8.2K_0402_5%

R255 10K_0402_5%@R255 10K_0402_5%@ R257 100K_0402_5%R257 100K_0402_5%

1 2

1 2 1 2

1 2

1 2 1 2

1 2

4.7K_0402_5%

R248 330K_0402_5%R248 330K_0402_5%

D12 CH751H-40PT_SOD323-2D12 CH751H-40PT_SOD323-2

R807 100K_0402_5%R807 100K_0402_5%

R808 1K_0402_5%2HDD@R808 1K_0402_5%2HDD@

12 12

R809 100K_0402_5%R809 100K_0402_5%

R810 1K_0402_5%CIR@R810 1K_0402_5%CIR@

R264 10K_0402_5%@R264 10K_0402_5%@

R2190_0402_5% R2190_0402_5%

R2234.7K_0402_5% R2234.7K_0402_5%

12

2

12

R226

2N7002DW-T/R7_SOT363-6

LINKALERT#

ME_EC_CLK1

ME_EC_DATA1

ICH_RI#

XDP_DBRESET#

EC_LID_OUT# PM_CLKRUN#

EC_SWI#

SERIRQ

EC_THERM#

OCP#

ICH_ACIN

21

EC_SMI#

EC_SCI#

2HDD_DET#

BT_DET#

GPIO57

CIR_EN# CIR_EN#

LAN_DSM#

61

5

Q4A

4

THRM# not used, 8.2K to 10K PU to +3VS.

R221 4.7K_0402_5%R221 4.7K_0402_5% R224 4.7K_0402_5%R224 4.7K_0402_5%

ICH_SMBDATA

3

2N7002DW-T/R7_SOT363-6

Q4B

iTPM Physical Presence

CLGPIO5 Mobil Platform

GPIO57

Assert = iTPM Physical Presence Enable De-assert = iTPM disable **Only used in iAMT w/ME Firmware Desktop Platform used only

1 2 1 2

ICH_SMBCLK

XDP_DBRESET#4

PM_SYNC#8

EC_LID_OUT#32

H_STP_PCI#16 H_STP_CPU#16

EC_SWI#25,32

EC_THERM#32

FM_I2CCLK26

CAM_PWR26

BT_DET#26

FM_I2CDAT26

FM_I2CINT26

CLKREQ_SATA#16

LAN_DSM#28

LAN_ISOLATE#28

SB_SPKR29

MCH_ICH_SYNC#8

4

+3V_SB

U9C ICH_SMBCLK ICH_SMBDATA LINKALERT# ME_EC_CLK1 ME_EC_DATA1

ICH_RI#

XDP_DBRESET#

EC_LID_OUT#

PM_CLKRUN# EC_SWI#

PADT6PAD

PADT7PAD PADT8PAD PADT9PAD

SERIRQ EC_THERM#

VGATE

TP11

OCP# ICH_ACIN

EC_SMI# EC_SCI#

2HDD_DET# BT_DET#

LAN_DSM#

GPIO57 SB_SPKR ICH_TP3

TP8 TP9 TP10

SERIRQ32,33

VGATE8,32,42

T6

OCP#4

EC_SMI#32 EC_SCI#32

T7 T8 T9

U9C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

TP11

AG19

GPIO1

AH21

GPIO6

AG21

GPIO7

A21

GPIO8

C12

GPIO12

C21

GPIO13

AE18

GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

TP8

AJ20

TP9

AJ21

TP10

ICH9-M ES_FCBGA676

ICH9R3@

SMB

3

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

SYS / GPIOGPIOMISC

Power MGT

CK_PWRGD

MEM_LED/GPIO24

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

WOL_EN/GPIO9

Controller Link

2

specially control signal for 16" panel by cable selection High-->one channel Low-->two channel

LVDS_SEL

R262

1 2

+3VS

10K_0402_5%

CLK14

CLK48 SUSCLK SLP_S3#

SLP_S4# SLP_S5#

PWROK

BATLOW# PWRBTN# LAN_RST#

RSMRST#

CLPWROK

SLP_M#

CL_CLK0 CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST0# CL_RST1#

AH23 AF19 AE21 AD20

CLK_14M_ICH

H1

CLK_48M_ICH

AF3 P1 C16

E16 G17

C10

PM_PWROK

G20 M2

ICH_LOW_BAT#

B13 R3 D20 D22 R5 R6 B16 F24

B19 F22

C19

+CL_VREF0_ICH

C25 A19

F21 D18

A16 C18 C11 C20

S4_STATE#

1 2

R247 0_0402_5%R247 0_0402_5%

SB_RSMRST#

PM_PWROK

SUS_PWR_ACK

GPIO10

SPK_SEL 29 LVDS_SEL 17 BT_PWR 26 BT_RST# 26

CLK_14M_ICH 16 CLK_48M_ICH 16

PM_SLP_S3# 32 PM_SLP_S4# 32 PM_SLP_S5# 32

PM_PWROK 8,32 PM_DPRSLPVR 8,42

PBTN_OUT# 32

CK_PWRGD 16

CL_CLK0 8

CL_DATA0 8

CL_RST#0 8 SB_INT_FLASH_SEL# 33

1 2

R256 10K_0402_5%R256 10K_0402_5%

Mobile Platform used only

Desktop Platform used only

BIOS need to set GPIO

BAV99DW-7_SOT363

Width:Spacing 12mil:12mil

+3V_SB

SB_RSMRST#

1 2

R241

R241 10K_0402_5%

10K_0402_5%

D11B

R249

2.2K_0402_5%

+3VS

12

R252

3.24K_0402_1%

12

R254

R254 453_0402_1%

453_0402_1%

CLK_14M_ICH

CLK_48M_ICH

PM_PWROK

S4_STATE# ICH_LOW_BAT#

R239 0_0402_5%@R239 0_0402_5%@

Q11

123

C

2

4

5

6

3

12

2

C278

0.1U_0402_16V4Z

1

1 2

R228

10_0402_5%@

1 2

R229

10_0402_5%@

1 2

R231 10K_0402_5%@R231 10K_0402_5%@

1 2

R235 10K_0402_5%@R235 10K_0402_5%@ R237 8.2K_0402_5%R237 8.2K_0402_5%

12

E

MMBT3906_SOT23-3

B

1 2

R243

1

4.7K_0402_5%

D11A

D11A BAV99DW-7_SOT363

BAV99DW-7_SOT363

12

C276

4.7P_0402_50V8C@

4.7P_0402_50V8C@ C277

C277

4.7P_0402_50V8C@

1 2

+3V_SB

EC_RSMRST# 32

+3V_SB

RSMRST# circuit

ICH9M Strap Pin

B B

A A

+3VS

1 2

R258 1K_0402_5%@R258 1K_0402_5%@

+3VS

1 2

R263 1K_0402_5%@R263 1K_0402_5%@

1 2

R265 1K_0402_5%@R265 1K_0402_5%@

1 2

R267 1K_0402_5%@R267 1K_0402_5%@

1 2

R261 1K_0402_5%@R261 1K_0402_5%@

ICH_SPI_MOSI 20

SB_SPKR

PCI_GNT#0 20

SPI_CS#1 20

STRAP_A16 20

5

Internal TPM Strap(Internal pull-down) SPI_MOSI Low= Disable

High= iTPM enable by MCH strap*

No Reboot Strap (Internal pull-up) SB_SPKR Low= *Default

Boot BIOS Strap

High= "No Reboot"

(Internal pull-up)

PCI_GNT#0 SPI_CS#1 Boot BIOS Loaction

0 0 RESERVED 0 1 1

1 0 1

A16 Swap Override Strap

PCI_GNT#3

Low= A16 swap override Enable High= Default* (Internal pull-up)

SPI PCI

LPC*

4

(Default)

Internal VR Enable Strap (Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)

Low = Internal VR Disabled High = Internal VR Enabled(Default)

+RTCVCC

1 2

R259 330K_0402_5%R259 330K_0402_5%

1 2

R260 0_0402_5%@R260 0_0402_5%@

ICH_INTVRMEN 21 LAN100_SLP 21

ICH_INTVRMEN

ICH8M LAN100 SLP Strap (Internal VR for VccLAN1.05 and VccCL1.05)

ICH_LAN100_SLP

XOR Chain Entrance Strap

ICH_TP3 (Internal pull-up)

0

+3VS

R266 1K_0402_5%@R266 1K_0402_5%@

R268 1K_0402_5%@R268 1K_0402_5%@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ICH_TP3

2008/09/19 2009/09/19

3

AZ_SDOUT 21

Compal Secret Data

0 1

Deciphered Date

HDA_SDOUT (Internal pull-down)

Flash Descriptor Security Override Strap

GPIO33

DMI Termination Voltage GPIO49

Low= Descriptor Security override High= Default* (Internal pull-up)

Low= Desktop used High= Mobile* (Internal pull-up)

Description

0 1 0 11

2

RSVD Enter XOR Chain Normal Operation

(Default)

Set PCIE port config bit 1

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

22 43Wednesday, September 16, 2009

1

of

E

5

+RTCVCC

1U_0402_6.3V4Z

Reserve for test

SBPWR_EN#

2N7002DW-T/R7_SOT363-6

D D

SBPWR_EN#35

0.1U_0402_16V4Z

C C

2N7002DW-T/R7_SOT363-6

Q16B

5

STAR@

4

R594

1 2

330K_0402_5%

330K_0402_5% STAR@

STAR@

AO3413_SOT23

@

1

C288

@

2

+1.5VS

1

C279

0.1U_0402_16V4Z

2

61

+5VALW+5V_SB

Q16A

Q16A STAR@

STAR@

2

R593

3

1 2

47K_0402_5%

47K_0402_5% STAR@

STAR@

+5VALW

Q12

S

G

2

D

1 3

Vgs=-4.5V, Id=3A,Rds<97mohm

+5V_SB

L14

KC FBM-L11-201209-221LMAT_0805

1

PJ37

1

JUMP_43X39

@

2

220U_D2_4VM_R15

+1.5VS

+VSB

L15

L15 MBK1608121YZF_0603

MBK1608121YZF_0603

C281

2 1

R270

100_0402_5%

10U_0805_10V4Z

1

+

C294

2

+1.5VS_SATAPLL_ICH+1.5VS

1

C304

2

1

2

D13

D13 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

R269

R269 100_0402_5%

100_0402_5%

D14

D14 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

1

2

10U_0805_10V4Z

C305

1

C280

0.1U_0402_16V4Z

2

+3VS +5VS

+3V_SB +5V_SB

+1.5VS_PCIE_ICH

12

C293

1 2

10U_0805_10V4Z

1

C307

C307 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

close to AE15 close to AF11

12

1

C284

C284 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+ICH_V5REF_SUS

12

2

C289

C289 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2.2U_0603_6.3V6K

1

C295

2

1

1U_0402_6.3V4Z

2

1

C308

C308 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

Symbol S0 S3 S4/S5

VCCLAN1_05

VCCCL1_5

B B

VCCCL1_05

VCCSUS1_5

VCCSUS1_05

Internal voltage regulators power these wells inside the ICH9 and current for this rail is accounted for in the sourcing voltage rail current requirements.

A A

VCC_1_05

VCC_1_5_A VCCCL3_3 VCCCL3_3

VCC_1_05 VCCCL3_3 VCCCL3_3

VCC_1_5_A

VCC_1_05

VCCLAN3_3 VCCLAN3_3

VCCSUS3_3

1

C318

0.1U_0402_16V4Z

5

2

VCCSUS3_3

+1.5VS

+3VS

C324

0.1U_0402_16V4Z

+1.5VS

1

C316

0.1U_0402_16V4Z

2

1

C322

0.1U_0402_16V4Z

2

+1.5VS

1

2

close to AC9

1

C314

0.1U_0402_16V4Z

2

+1.5VS

C315

0.1U_0402_16V4Z

close to AC14

close to AJ5close to AC7

1

C317

0.1U_0402_16V4Z

2

VCCLAN1_05_INT_ICH

1

C323

0.1U_0402_16V4Z

2

+ICH_V5REF

+ICH_V5REF_SUS

+ICH_V5REF

1

C296

2

1

2

+3VS

4

U9F

A23

VCCRTC

A6

V5REF

AE1

V5REF_SUS

AA24

VCC1_5_B[01]

AA25

VCC1_5_B[02]

AB24

VCC1_5_B[03]

AB25

VCC1_5_B[04]

AC24

VCC1_5_B[05]

AC25

VCC1_5_B[06]

AD24

VCC1_5_B[07]

AD25

VCC1_5_B[08]

AE25

VCC1_5_B[09]

AE26

VCC1_5_B[10]

AE27

VCC1_5_B[11]

AE28

VCC1_5_B[12]

AE29

VCC1_5_B[13]

F25

VCC1_5_B[14]

G25

VCC1_5_B[15]

H24

VCC1_5_B[16]

H25

VCC1_5_B[17]

J24

VCC1_5_B[18]

J25

VCC1_5_B[19]

K24

VCC1_5_B[20]

K25

VCC1_5_B[21]

L23

VCC1_5_B[22]

L24

VCC1_5_B[23]

L25

VCC1_5_B[24]

M24

VCC1_5_B[25]

M25

VCC1_5_B[26]

N23

VCC1_5_B[27]

N24

VCC1_5_B[28]

N25

VCC1_5_B[29]

P24

VCC1_5_B[30]

P25

VCC1_5_B[31]

R24

VCC1_5_B[32]

R25

VCC1_5_B[33]

R26

VCC1_5_B[34]

R27

VCC1_5_B[35]

T24

VCC1_5_B[36]

T27

VCC1_5_B[37]

T28

VCC1_5_B[38]

T29

VCC1_5_B[39]

U24

VCC1_5_B[40]

U25

VCC1_5_B[41]

V24

VCC1_5_B[42]

V25

VCC1_5_B[43]

U23

VCC1_5_B[44]

W24

VCC1_5_B[45]

W25

VCC1_5_B[46]

K23

VCC1_5_B[47]

Y24

VCC1_5_B[48]

Y25

VCC1_5_B[49]

47mA

AJ19

VCCSATAPLL

1342mA

AC16

VCC1_5_A[01]

AD15

VCC1_5_A[02]

AD16

VCC1_5_A[03]

AE15

VCC1_5_A[04]

AF15

VCC1_5_A[05]

AG15

VCC1_5_A[06]

AH15

VCC1_5_A[07]

AJ15

VCC1_5_A[08]

AC11

VCC1_5_A[09]

AD11

VCC1_5_A[10]

AE11

VCC1_5_A[11]

AF11

VCC1_5_A[12]

AG10

VCC1_5_A[13]

AG11

VCC1_5_A[14]

AH10

VCC1_5_A[15]

AJ10

VCC1_5_A[16]

AC9

VCC1_5_A[17]

AC18

VCC1_5_A[18]

AC19

VCC1_5_A[19]

AC21

VCC1_5_A[20]

G10

VCC1_5_A[21]

G9

VCC1_5_A[22]

AC12

VCC1_5_A[23]

AC13

VCC1_5_A[24]

AC14

VCC1_5_A[25]

AJ5

VCCUSBPLL

AA7

VCC1_5_A[26]

AB6

VCC1_5_A[27]

AB7

VCC1_5_A[28]

AC6

VCC1_5_A[29]

AC7

VCC1_5_A[30]

A10

VCCLAN1_05[1]

A11

VCCLAN1_05[2]

A12

VCCLAN3_3[1]

B12

VCCLAN3_3[2]

A27

VCCGLANPLL

D28

VCCGLAN1_5[1]

D29

VCCGLAN1_5[2]

E26

VCCGLAN1_5[3]

E27

VCCGLAN1_5[4]

A26

VCCGLAN3_3

ICH9-M ES_FCBGA676

ICH9-M ES_FCBGA676 ICH9R3@

ICH9R3@

6uA at G3 state 2mA

2mA

646mA

1634mA

VCCA3GP

ARX

ATX

11mA

USB CORE

78mA

GLAN POWER

23mA

80mA

1mA

VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16]

CORE

VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24] VCC1_05[25] VCC1_05[26]

23mA

VCCDMIPLL VCC_DMI[1]

48mA

VCC_DMI[2]

V_CPU_IO[1]

2mA

V_CPU_IO[2]

VCC3_3[01]

308mA

VCC3_3[02] VCC3_3[07]

VCC3_3[03] VCC3_3[04] VCC3_3[05] VCC3_3[06]

VCCP_CORE

VCC3_3[08] VCC3_3[09] VCC3_3[10] VCC3_3[11] VCC3_3[12]

PCI

VCC3_3[13] VCC3_3[14]

11mA

VCCHDA

11mA

VCCSUSHDA

VCCSUS1_05[1] VCCSUS1_05[2]

VCCSUS1_5[1] VCCSUS1_5[2]

212mA

VCCSUS3_3[01] VCCSUS3_3[02] VCCSUS3_3[03] VCCSUS3_3[04]

VCCPSUS

VCCSUS3_3[05]

VCCSUS3_3[06] VCCSUS3_3[07] VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16]

VCCPUSB

VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20]

VCCCL1_05

VCCCL1_5

VCCCL3_3[1] VCCCL3_3[2]

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

R29 W23

Y23 AB23

AC23 AG29

AJ6 AC10

AD19 AF20 AG24 AC20

B9 F9 G3 G6 J2 J7 K7

AJ4 AJ3

TP_VCCSUS1_05_ICH_1

AC8

TP_VCCSUS1_05_ICH_2

F17

AD8 F18

A18 D16 D17 E22

AF1

T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7

VCCCL1_05_INT_ICH

G22

VCCCL1_5_INT_ICH

G23

A24 B24

3

+1.05VS

1

C286

C286 10U_0805_10V4Z

10U_0805_10V4Z

2

+1.05VS

1

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

C298

close to AD19

@

PAD

T10

@

PAD

T11

+VCCSUS1_5_ICH_INT

1

C310

0.1U_0402_16V4Z

2

1

0.022U_0402_16V7K

2

1

C321

0.1U_0402_16V4Z

2

1

C283

0.1U_0402_16V4Z

2

L13

1 2

MBK1608121YZF_0603

1

C287

4.7U_0805_10V4Z

2

1

C291

2

close to AG24

C299

0.1U_0402_16V4Z

1

C312

2

Deciphered Date

1

2

+ICH_HDA

1

2

+ICH_SUSHDA

1

2

0.1U_0402_16V4Z

close to AF1close to T1

1

C319

0.1U_0402_16V4Z

2

1

2

Compal Secret Data

+1.05VS

1

C292

4.7U_0805_10V4Z

2

0.1U_0402_16V4Z

C300

close to B9, G6, K7

C306

0.1U_0402_16V4Z

R273 0_0603_5%

R273 0_0603_5% R274 0_0603_5%

R274 0_0603_5%

C309

0.1U_0402_16V4Z

C313

close to G22

1

C282

0.1U_0402_16V4Z

2

+1.5VS_DMIPLL_ICH +1.5VS

0.01U_0402_16V7K

C285

C290

0.1U_0402_16V4Z

close to AG29

1

C297

0.1U_0402_16V4Z

2

C311

0.022U_0402_16V7K

1

C320

+3VS

1U_0402_6.3V4Z

2

close to G23

2008/09/19 2009/09/19

2

1

C301

0.1U_0402_16V4Z

2

R271 0_0603_5%

R271 0_0603_5% R272 0_0603_5%

R272 0_0603_5%

NIHDMI@

IHDMI@

+3V_SB

1

2

0.1U_0402_16V4Z

1

C302

2

NIHDMI@

IHDMI@

+3V_SB +VCCSUS1_5_ICH_INT

+3VS

1

C303

0.1U_0402_16V4Z

2

close to AJ6

+3VS +1.5VS

1

U9E

AA26

VSS[001]

AA27

VSS[002]

AA3

VSS[003]

AA6

VSS[004]

AB1

VSS[005]

AA23

VSS[006]

AB28

VSS[007]

AB29

VSS[008]

AB4

VSS[009]

AB5

VSS[010]

AC17

VSS[011]

AC26

VSS[012]

AC27

VSS[013]

AC3

VSS[014]

AD1

VSS[015]

AD10

VSS[016]

AD12

VSS[017]

AD13

VSS[018]

AD14

VSS[019]

AD17

VSS[020]

AD18

VSS[021]

AD21

VSS[022]

AD28

VSS[023]

AD29

VSS[024]

AD4

VSS[025]

AD5

VSS[026]

AD6

VSS[027]

AD7

VSS[028]

AD9

VSS[029]

AE12

VSS[030]

AE13

VSS[031]

AE14

VSS[032]

AE16

VSS[033]

AE17

VSS[034]

AE2

VSS[035]

AE20

VSS[036]

AE24

VSS[037]

AE3

VSS[038]

AE4

VSS[039]

AE6

VSS[040]

AE9

VSS[041]

AF13

VSS[042]

AF16

VSS[043]

AF18

VSS[044]

AF22

VSS[045]

AH26

VSS[046]

AF26

VSS[047]

AF27

VSS[048]

AF5

VSS[049]

AF7

VSS[050]

AF9

VSS[051]

AG13

VSS[052]

AG16

VSS[053]

AG18

VSS[054]

AG20

VSS[055]

AG23

VSS[056]

AG3

VSS[057]

AG6

VSS[058]

AG9

VSS[059]

AH12

VSS[060]

AH14

VSS[061]

AH17

VSS[062]

AH19

VSS[063]

AH2

VSS[064]

AH22

VSS[065]

AH25

VSS[066]

AH28

VSS[067]

AH5

VSS[068]

AH8

VSS[069]

AJ12

VSS[070]

AJ14

VSS[071]

AJ17

VSS[072]

AJ8

VSS[073]

B11

VSS[074]

B14

VSS[075]

B17

VSS[076]

B2

VSS[077]

B20

VSS[078]

B23

VSS[079]

B5

VSS[080]

B8

VSS[081]

C26

VSS[082]

C27

VSS[083]

E11

VSS[084]

E14

VSS[085]

E18

VSS[086]

E2

VSS[087]

E21

VSS[088]

E24

VSS[089]

E5

VSS[090]

E8

VSS[091]

F16

VSS[092]

F28

VSS[093]

F29

VSS[094]

G12

VSS[095]

G14

VSS[096]

G18

VSS[097]

G21

VSS[098]

G24

VSS[099]

G26

VSS[100]

G27

VSS[101]

G8

VSS[102]

H2

VSS[103]

H23

VSS[104]

H28

VSS[105]

H29

VSS[106]

ICH9-M ES_FCBGA676

ICH9-M ES_FCBGA676 ICH9R3@

ICH9R3@

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04] VSS_NCTF[05] VSS_NCTF[06] VSS_NCTF[07] VSS_NCTF[08] VSS_NCTF[09] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12]

VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198]

1

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29

of

23 43Wednesday, September 16, 2009

of

23 43Wednesday, September 16, 2009

of

23 43Wednesday, September 16, 2009

E

5

SATA HDD1 Conn.

+5VS

1

C697

C697 10U_0805_10V4Z

10U_0805_10V4Z

2

Place closely JP25 SATA CONN.

1.2A

1

C698

0.1U_0402_16V4Z

2

1

C699

0.1U_0402_16V4Z

2

4

1

C700

0.1U_0402_16V4Z

2

3

SATA HDD2 Conn.

+5VS

1.2A

1

C701

C701 10U_0805_10V4Z

10U_0805_10V4Z 2HDD@

2HDD@

2

Place closely JP25 SATA CONN.

1

C702

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2HDD@

2HDD@

2

1

C703

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2HDD@

2HDD@

2

1

C704

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2HDD@

2HDD@

2

1

D D

C C

SATA ODD Conn

B B

A A

SSD HDD need 400mA for 3V(PHISON)

+3VS rail reserve for SSD

1

C705

C705 10U_0805_10V4Z

10U_0805_10V4Z @

@

2

24

GND

23

GND

OCTEK_SAT-22SO1G_RV

@

+5VS

15

GND

14

GND

SANTA_206401-1_RV

@

5

JHDD0

GND

A+

A-

GND

B-

B+

GND

V33 V33

V33 GND GND GND

V5 V5 V5

GND

Reserved

GND

V12

1.1A

1

C721

C721 10U_0805_10V4Z

10U_0805_10V4Z

2

JODD

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND

13

GND

1

C706

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

1 2 3 4 5 6 7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

C707

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_N0

SATA_IRX_DTX_N0 SATA_IRX_DTX_P0

1

C722

C722 10U_0805_10V4Z

10U_0805_10V4Z

2

+3VS

+5VS

1

1U_0402_6.3V4Z

2

1

C708

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

C713 0.01U_0402_25V7KC713 0.01U_0402_25V7K

1 2

C715 0.01U_0402_25V7KC715 0.01U_0402_25V7K

1 2

C717 0.01U_0402_25V7KC717 0.01U_0402_25V7K

1 2

C719 0.01U_0402_25V7KC719 0.01U_0402_25V7K

1 2

C723

C723 @

@

1

C724

0.1U_0402_16V4Z

2

Place component's closely ODD CONN.

SATA_ITX_C_DRX_P4 SATA_ITX_C_DRX_N4

SATA_IRX_DTX_N4 SATA_IRX_DTX_P4

C729 0.01U_0402_25V7KC729 0.01U_0402_25V7K

1 2

C730 0.01U_0402_25V7KC730 0.01U_0402_25V7K

1 2

C731 0.01U_0402_25V7KC731 0.01U_0402_25V7K

1 2

C732 0.01U_0402_25V7KC732 0.01U_0402_25V7K

1 2

+5VS

4

SSD HDD need 400mA for 3V(PHISON)

+3VS+3VS

1

2

SATA_ITX_DRX_P0 21 SATA_ITX_DRX_N0 21

SATA_IRX_C_DTX_N0 21

SATA_IRX_C_DTX_P0 21

SUYIN_127043FB022G208ZR_RV

1

C725

0.1U_0402_16V4Z

2

SATA_ITX_DRX_P4 21 SATA_ITX_DRX_N4 21

SATA_IRX_C_DTX_N4 21

SATA_IRX_C_DTX_P4 21

Security Classification

2008/09/19 2009/09/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

3

Compal Secret Data

Deciphered Date

+3VS rail reserve for SSD

C709

C709 10U_0805_10V4Z

10U_0805_10V4Z @

@

JHDD2

GND

A+

GND

B+

GND

VCC3.3 VCC3.3 VCC3.3

GND GND

GND VCC5 VCC5 VCC5

GND

RESERVED

23 24

GND GND

GND

VCC12 VCC12 VCC12

AB-

the footprint is temp

1

C710

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

1

SATA_ITX_C_DRX_P1

2

SATA_ITX_C_DRX_N1

3 4

SATA_IRX_DTX_N1

5

SATA_IRX_DTX_P1

6 7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

USB Conn.

1

PJDLC05_SOT23-3

USB20_N220 USB20_P220

2

1

C711

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

D61

2 3

1

C712

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

C714 0.01U_0402_25V7K 2HDD@C714 0.01U_0402_25V7K 2HDD@

1 2

C716 0.01U_0402_25V7K 2HDD@C716 0.01U_0402_25V7K 2HDD@

1 2

C718 0.01U_0402_25V7K 2HDD@C718 0.01U_0402_25V7K 2HDD@

1 2

C720 0.01U_0402_25V7K 2HDD@C720 0.01U_0402_25V7K 2HDD@

1 2

+3VS

+5VS

+USB_VCCB

C79

220U_6.3V_M

Title

Size Document Number Rev

Date: Sheet

W=60mils

0.1U_0402_16V4Z

1

+

C727

2

JUSB

1

VCC

2

D-

3

D+

4

GND

P-TWO_CU304G-A0G1G-P

@

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

1

C728

2

1000P_0402_50V7K

5

GND

6

GND

7

GND

8

GND

IOGND

1

SATA_ITX_DRX_P1 21 SATA_ITX_DRX_N1 21

SATA_IRX_C_DTX_N1 21

SATA_IRX_C_DTX_P1 21

of

24 43Wednesday, September 16, 2009

of

24 43Wednesday, September 16, 2009

of

24 43Wednesday, September 16, 2009

E

5

4

3

2

1

eSATA/USB

8

OUT

7

OUT

6

OUT

5

FLG

W=60mils

0.1U_0402_16V4Z

1

+

C749

2

JESATA

1

VBUS

2

D-

3

D+

4

GND

5

GND

6

A+

7

A-

8

GND

9

B-

10

B+

11

GND

FOX_3Q318111

FOX_3Q318111 @

@

W=60mils

1

2

1

2

1000P_0402_50V7K

USB

ESATA

SHIELD SHIELD SHIELD SHIELD

R699

1 2

0_0402_5%

C743

4.7U_0805_10V4Z

4.7U_0805_10V4Z @

@

1

C750

2

12 13 14 15

IOGND

USB_OC#2 20

+5VALW +USB_VCCB

D D

C C

C739 0.01U_0402_25V7KC739 0.01U_0402_25V7K

SATA_ITX_DRX_P521 SATA_ITX_DRX_N521

SATA_IRX_C_DTX_N521 SATA_IRX_C_DTX_P521

1 2

C740 0.01U_0402_25V7KC740 0.01U_0402_25V7K

1 2

C742 0.01U_0402_25V7KC742 0.01U_0402_25V7K

1 2

C744 0.01U_0402_25V7KC744 0.01U_0402_25V7K

1 2

USB_EN#26,32

1

PJDLC05_SOT23-3

USB20_N320

USB20_P320

D62

SATA_ITX_C_DRX_P5 SATA_ITX_C_DRX_N5

SATA_IRX_DTX_N5 SATA_IRX_DTX_P5

1.4A

U40

1

GND

2

IN

3

IN

4

EN#

G528_SO8

+USB_VCCB

C748

C748 @

@

150U_D_6.3VM

2

eSATA/USB Conn

3

+3VALW_CARD +3VS_CARD +1.5VS_CARD

B B

+3V_SB

CP_USB#

1 2

RN1 100K_0402_5%RN1 100K_0402_5%

EXP_CPPE#

1 2

RN2 100K_0402_5%RN2 100K_0402_5%

1 2

RN3 100K_0402_5%RN3 100K_0402_5%

+3VS

12

RN5

10K_0402_5%

A A

10K_0402_5%

RCLKEN

61

2

10K_0402_5%

CLKREQ#

Q21A

Q21A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

another at page35

5

share with USB OC PIN need always pull high

PLT_RST#

+3VS +3VS

12

RN4

2 1

1

5

2

UN2

B

4

Vcc

Y

A

G

NC7SZ32P5X_NL_SC70-5

3

CN7

0.1U_0402_16V4Z

CLKREQ_NEW#

PLT_RST#8,17,20,27,28,31,32,33

SYSON32,41

CLKREQ_NEW# 16

1

CN1

CN1 10U_0805_10V4Z

10U_0805_10V4Z

2

+3VS +3VS_CARD

+3V_SB

PLT_RST#

SUSP#17,29,32,35,40

EXP_CPPE# CP_USB#

RCLKEN

4

1

CN2

0.1U_0402_16V4Z

2

UN1

12

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

18

RCLKEN

G577NSR91U_TQFN20_4x4

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1.5Vout

3.3Vout

OC#

PERST#

GND

Thermal_Pad

Issued Date

Imax = 1.35A Imax = 0.75AImax = 0.275A

1

CN3

10U_0805_10V4Z

2

60mils

11 13

40mils

3 5

40mils

15 19 8 16

NC

7 21

1

CN4

0.1U_0402_16V4Z

2

+1.5VS_CARD+1.5VS

+3VALW_CARD

PERST#

2008/09/19 2009/09/19

3

1

CN5

10U_0805_10V4Z

2

Compal Secret Data

1

CN6

0.1U_0402_16V4Z

2

Deciphered Date

USB20_N820 USB20_P820

PM_SMBCLK14,15,16,22,27 PM_SMBDATA14,15,16,22,27

+1.5VS_CARD

EC_SWI#22,32

+3VALW_CARD

+3VS_CARD

CLK_NEW#16 CLK_NEW16

2

EXP_CPPE#20

PCIE_IRX_C_NEWTX_N120 PCIE_IRX_C_NEWTX_P120

PCIE_ITX_C_NEWRX_N120 PCIE_ITX_C_NEWRX_P120

Title

Size Document Number Rev

Date: Sheet

PM_SMBCLK PM_SMBDATA

PERST#

CLKREQ# EXP_CPPE#

Compal Electronics, Inc.

the footprint is temp.

JEXP

1

GND

2

USB_D-

3

CP_USB#

401605

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND

28

GND

SANTA_130801-5_RT

SANTA_130801-5_RT @

@

SCHEMATIC MB A4571

1

GND GND

29 30

E

of

25 43Wednesday, September 16, 2009

of

25 43Wednesday, September 16, 2009

of

25 43Wednesday, September 16, 2009

5

4

3

2

1

BlueTooth Interface

+5VS

R718

1M_0402_5%

BT@

R719

BT@R719

BT@

1 2

100K_0402_5%

D D

BT_PWR22

C C

BT@

2N7002_SOT23

BT_RST#22

Finger printer

R114

1 2

+3VS

B B

A A

0_0603_5%

0_0603_5% FP@

FP@

AZ_SDOUT_MD21

AZ_SYNC_MD21 AZ_RST_MD#21

AZ_SDIN1_MD21

100K_0402_5%

13

D

BT@ C753

BT@

1000P_0402_50V7K

2

G

Q23

S

BT@

1 2

R722 100K_0402_5%

0.1U_0402_16V4Z

1

C757

0.1U_0402_16V4Z

FP@

2

AZ_SDIN1_MD_R

12

R737 33_0402_5% MDC@R737 33_0402_5% MDC@

5

C753

BT_RESET#

USB20_N420 USB20_P420

1

D63 PJDLC05_SOT23-3

PJDLC05_SOT23-3

AZ_SDIN1_MD_R

+3VS

C751

BT@C751

BT@

0.1U_0402_16V4Z

S

G

2

D

Q22

BT@

Q22

2

1

C754

C754 BT@

BT@

FP@D63

FP@

BT@

1 3

AO3413_SOT23

+BT_VCC

USB20_P520 USB20_N520

WLAN_BT_CLK27

BT_DET#22

WLAN_BT_DATA27

+3VS

+BT_VCC

C755

4.7U_0805_10V4Z

4.7U_0805_10V4Z BT@

BT@

2 3

MDC 1.5 Conn.

+MDC

1

C761

0.1U_0402_16V4Z

2

MDC@

JMDC

1

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

Connector for MDC Rev1.5

+3V_SB

1

C762

C762 1000P_0402_50V7K

1000P_0402_50V7K

2

MDC@

IAC_BITCLK

GND13GND14GND15GND16GND17GND

1 2

R721 0_0402_5%

1 2

R723

(MAX=200mA)

1

0.1U_0402_16V4Z

2

+3VS_FP

12

R110

R110 0_0603_5%

0_0603_5% FP@

FP@

2

RES0

4

RES1

6

3.3V

8

GND3

10

GND4

12

ACES_88018-124G

18

MDC@

BT@

@R723

@

4.7K_0402_5%

C756

C756 BT@

BT@

JFP

1

2

3

GND

4

GND

ACES_85201-04051

@

1

C763

0.1U_0402_16V4Z

2

MDC@

1 2

R731 0_0603_5%NIHDMI@R731 0_0603_5%NIHDMI@

+MDC

1 2

R733 0_0603_5%IHDMI@R733 0_0603_5%IHDMI@

R736

R736 10_0402_5%

10_0402_5% @

@

1 2 1

C768

C768 10P_0402_50V8J

10P_0402_50V8J @

@

2

4

Bluetooth Connector

R724

BT@R724

BT@

4.7K_0402_5%

1 2

5 6

1

C764

4.7U_0805_10V4Z

2

MDC@

+3V_SB +VCCSUS1_5_ICH_INT

+3V_SB

AZ_BITCLK_MD 21

USB Board

8

OUT

7

OUT

6

OUT

5

FLG

+3VS

FM_I2CCLK 22

FM_I2CDAT 22

USB20_N9 20 USB20_P9 20

1

R181

0_0402_5%@

2

3

R182

0_0402_5%@

W=60mils

1 2

R720 0_0402_5%R720 0_0402_5%

1

C752

4.7U_0805_10V4Z

2

@

FM_I2CCLK FM_I2CDAT FM_I2CINT

1 2

R728 0_0402_5%@R728 0_0402_5%@

+FLICA_VCC

1

2

FELICA_PWR21

USB20_N11 20

USB20_P11 20

CAM_PWR22

2

JBT

1

2

3

4

5

6

7

8

9

10

11

GND1

12

GND2

ACES_87213-1000G

ACES_87213-1000G @

@

+5VALW +USB_VCCA +USB_VCCA

USB_EN#25,32

U42

1 2 3 4

G528_SO8

1.4A

GND IN IN EN#

FM tuner

JFM

1

2

FM_I2CCLK

3

FM_I2CDAT

4

FM_I2CINT_R

5

5 6 7 8

11

9

GND

12

10

GND

ACES_88514-1041

@

6 7 8 9 10

FM_LINE_R 29 FM_LINE_L 29

Felica

JFEL

1

2

3

4

5

6

7

G1 G2

ACES_87151-06051

@

12

8

Int. Camera

R732

+CAM_VDD

1 2

+5VALW

+5VS

JCAM

GND1 GND2

ACES_88266-05001

ACES_88266-05001 @

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

3

R821

1 2

1

2

3

4

5

6 7

0_0603_5%@

0_0603_5%CAM@

Compal Secret Data

R131

R131 0_0603_5%

0_0603_5% FLICA@

FLICA@

W=20mils

1 2

C765

0.1U_0402_16V4Z

0.1U_0402_16V4Z CAM@

CAM@

USB20_N11_R USB20_P11_R

Deciphered Date

2 3

D83

@D83

@

PJDLC05_SOT23-3

1 2

L26

1

4

WCM-2012-900T_0805

1 2

R725 4.7K_0402_5%FM@R725 4.7K_0402_5%FM@ R726 4.7K_0402_5%FM@R726 4.7K_0402_5%FM@ R727 100K_0402_5%FM@ R727 100K_0402_5%FM@

FM_I2CINT

C758

FLICA@C758

FLICA@

0.1U_0402_16V4Z

FLICA@

2N7002_SOT23-3

JUSBB

W=60mils

USB_OC#0 20

USB20_N020 USB20_P020

USB20_N120 USB20_P120

+3VS

1 2 1 2 1 2

FM_I2CINT 22

+5VS

R729

FLICA@R729

FLICA@

1M_0402_5%

R730

FLICA@R730

1 2 13

D

Q25

2

G

S

+5VS

1 2 13

2

G

Q27

Q27 @

@

Title

Size Document Number Rev

Date: Sheet

FLICA@

1 2

100K_0402_5%

C760

FLICA@C760

FLICA@

1000P_0402_50V7K

R734

R734 1M_0402_5%

1M_0402_5% @

@

100K_0402_5%

D

1000P_0402_50V7K

S

Compal Electronics, Inc.

2

1

R735

@R735

@

1 2

2

C767

C767 @

@

1

SCHEMATIC MB A4571

SCHEMATIC MB A4571 401605

401605

JUSBB

1 2 3 4 5 6 7 8

9 10 11 12 13 14

E&T_6905-E12N-00R

E&T_6905-E12N-00R @

@

+5VS

S

Q24

G

2

D

1 3

AO3413_SOT23-3

FLICA@

+5VS

S

G

2

D

1 3

Q26

Q26 AO3413_SOT23-3

AO3413_SOT23-3 @

@

1

1 2 3 4 5 6 7 8 9 10 11 12 GND GND

+FLICA_VCC

+CAM_VDD

26 43Wednesday, September 16, 2009

C759

FLICA@C759

FLICA@

0.1U_0402_16V4Z

C766

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

of

E

PCIe Mini Card-3G/GPS/UWB

CLKREQ_TV#16

CLK_TV#16 CLK_TV16

PCIE_IRX_C_TVTX_N520 PCIE_IRX_C_TVTX_P520

PCIE_ITX_C_TVRX_N520 PCIE_ITX_C_TVRX_P520

Reserve

+UIM_PWR

CM13

0.1U_0402_16V4Z

0.1U_0402_16V4Z 3G@

3G@

+UIM_PWR

1

2

+3VS

12

RLZ20A_LL34

RLZ20A_LL34 3G@

3G@

UIM_RESET UIM_CLK

DM1

CM15

10P_0402_50V8J

3G@

JGPS

1

3

5

7

9

1

2

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

GND1

1

2

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

GND2

CM16

CM16 10P_0402_50V8J

10P_0402_50V8J 3G@

3G@

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

FOX_AS0B226-S40N-7F

FOX_AS0B226-S40N-7F @

@

+3VS +1.5VS

0.1U_0402_16V4Z

CM4

CM4 GPS@

GPS@

UIM_VPP

2

0.1U_0402_16V4Z

1

CM5

CM5 GPS@

GPS@

2

+UIM_PWR

1

CM6

CM6 GPS@

GPS@

2

4.7U_0805_10V4Z

+UIM_PWR

12

1

2

1

2

RM1

4.7K_0402_5%

4.7K_0402_5% @

@

UIM_DATA

CM14

CM14 22P_0402_50V8J

22P_0402_50V8J @

@

0.1U_0402_16V4Z

1

CM1

CM1 GPS@

+1.5VS +3VS

2

4

6

8

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

1

3

DM2

DM2 DAN217_SC59

DAN217_SC59 @

@

2

UWB_DISABLE#

3G/GPS/UWB

0.01U_0402_25V4Z

UIM_DATA UIM_CLK UIM_RESET UIM_VPP

PLT_RST#

USB20_N6 20 USB20_P6 20

LED_WIMAX#_R

3

GPS@

1

CM2

CM2 GPS@

GPS@

2

+UIM_PWR

R811 0_0402_5%GPS@R811 0_0402_5%GPS@

1 2

J3GSIM

1

VCC

2

RST

3

CLK

7

NC

MOLEX_47273-0001~D

MOLEX_47273-0001~D @

@

DM3

DM3 DAN217_SC59

DAN217_SC59 @

@

2

1

CM3

CM3 GPS@

GPS@

2

4.7U_0805_10V4Z

GND VPP

I/O

NC

DAN217_SC59

1

2

4 5 6

8

DM4

DM4 @

@

0.01U_0402_25V4Z

UWB_OFF# 32

1

3

+3VS +1.5VS

0.1U_0402_16V4Z

1

CM7

NAND@

0.01U_0402_25V4Z

NAND@

2

CLKREQ_ROB#16

PCIE_IRX_C_NANDTX_N220 PCIE_IRX_C_NANDTX_P220

PCIE_ITX_C_NANDRX_N220 PCIE_ITX_C_NANDRX_P220

Robson

CM8

CLK_ROB#16 CLK_ROB16

1

2

1

CM9

NAND@

2

4.7U_0805_10V4Z

+3VS

1

CM10

NAND@

2

0.01U_0402_25V4Z

JNAND

1

3

5

7

9

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

GND1

GND2

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

FOX_AS0B226-S40N-7F

FOX_AS0B226-S40N-7F @

@

0.1U_0402_16V4Z

CM11

NAND@

+1.5VS +3VS

2

4

6

8

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

1

2

1

CM12

CM12 NAND@

NAND@

2

4.7U_0805_10V4Z

PLT_RST#

PCIe Mini Card-Robson

+3V_WLAN

WLAN_WAKE#32 WLAN_BT_DATA26 WLAN_BT_CLK26

CLKREQ_WLAN#16

CLK_WLAN#16 CLK_WLAN16

PCIE_IRX_C_WLANTX_N420 PCIE_IRX_C_WLANTX_P420

PCIE_ITX_C_WLANRX_N420 PCIE_ITX_C_WLANRX_P420

WLAN/ WiFi

PCIe Mini Card-WLAN/WiMax

RM4

1 2

100K_0402_5%

+3V_WLAN

JWLAN

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

ACES_88911-5204

ACES_88911-5204 @

@

GND2

+3V_WLAN

0.1U_0402_16V4Z

+3V_WLAN

+1.5VS

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

XMIT_OFF# PLT_RST#

LED_WIMAX#_R

1

CM17

WLAN@

2

0.01U_0402_25V4Z

PLT_RST# 8,17,20,25,28,31,32,33

PM_SMBCLK 14,15,16,22,25 PM_SMBDATA 14,15,16,22,25

USB20_N7 20 USB20_P7 20

CM18

WLAN@

WiMax

1

CM19

WLAN@

2

4.7U_0805_10V4Z

1

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CM20

WLAN@

0.01U_0402_25V4Z

Issued Date

+1.5VS

0.1U_0402_16V4Z

1

2

CM21

WLAN@

1

2

1

CM22

WLAN@

2

4.7U_0805_10V4Z

2008/09/19 2009/09/19

Kill SWITCH

+3V_WLAN

SW1

5

G2

4

G1

3

2

1

1BS003-1210L_3P

1BS003-1210L_3P WLAN@

WLAN@

+3V_WLAN

WL_OFF#32

KILL_SW#

Compal Secret Data

Deciphered Date

2

3

DM5

DM5 DAN217_SC59

DAN217_SC59 @

@

1

CM23 0.1U_0402_16V4Z

1 2

5

2

P

B

1

A

G

3

+3V_WLAN

RM5

1 2

100K_0402_5%

KS@

4

Y

UM1

UM1 NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5 KS@

KS@

KILL_SW# 32

XMIT_OFF#

+3V_WLAN

RM2

1 2

10K_0402_5%

WIMAX@

LED_WIMAX#_R

Title

Size Document Number Rev

Date: Sheet

1 3

QM1

QM1 2N7002_SOT23-3

2N7002_SOT23-3 WIMAX@

WIMAX@

1 2

RM6 0_0402_5%@RM6 0_0402_5%@

Compal Electronics, Inc.

SCHEMATIC MB A4571

Wednesday, September 16, 2009

D

2

G

S

401605

XMIT_OFF#

RM3

1 2

100K_0402_5%

100K_0402_5% WIMAX@

WIMAX@

+3VS

LED_WIMAX# 34

of

27 43

of

27 43

of

27 43

E

5

4

3

2

1

1 2 1 2 1 2 1 2

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

+3V_LAN

CL40.1U_0402_16V4Z CL40.1U_0402_16V4Z CL50.1U_0402_16V4Z CL50.1U_0402_16V4Z CL60.1U_0402_16V4Z CL60.1U_0402_16V4Z CL70.1U_0402_16V4Z CL70.1U_0402_16V4Z

+LAN_DVDD12

CL100.1U_0402_16V4Z CL100.1U_0402_16V4Z CL120.1U_0402_16V4Z CL120.1U_0402_16V4Z CL130.1U_0402_16V4Z CL130.1U_0402_16V4Z CL140.1U_0402_16V4Z CL140.1U_0402_16V4Z CL150.1U_0402_16V4Z CL150.1U_0402_16V4Z CL160.1U_0402_16V4Z CL160.1U_0402_16V4Z CL190.1U_0402_16V4Z CL190.1U_0402_16V4Z CL200.1U_0402_16V4Z8111C@ CL200.1U_0402_16V4Z8111C@ CL210.1U_0402_16V4Z8111C@ CL210.1U_0402_16V4Z8111C@ CL220.1U_0402_16V4Z8111C@ CL220.1U_0402_16V4Z8111C@ CL230.1U_0402_16V4Z8111C@ CL230.1U_0402_16V4Z8111C@

1 2

4 3 2 1

+LAN_AVDD12

12

1 2

RL9 0_0603_5%

RL9 0_0603_5% 8111C@

8111C@

RL1 3.6K_0402_5%RL1 3.6K_0402_5% UL2

UL2

DO

GND

DI

ORG

SK

NC

CS

VCC

CAT93C46VI-GT3_SO8

CAT93C46VI-GT3_SO8 @

@

LAN_DSM# 22

8111C@

1 2

RL11 75_0402_1%

8111C@

1 2

RL12 75_0402_1%

1 2

RL13 75_0402_1%RL13 75_0402_1%

1 2

RL15 75_0402_1%RL15 75_0402_1%

5 6 7 8

+LAN_CTRL18

Layout Note: LL1 must be within 500mil to Pin1 CL8,CL9 must be within 500mil to L18

1U_0402_6.3V4Z

Close to Pin28

+VDDSR

0.1U_0402_16V4Z

UL1

CL1 0.1U_0402_16V7K

PCIE_IRX_C_LANTX_P320

PCIE_IRX_C_LANTX_N320

D D

+3V_LAN

1 2

RL3 100K_0402_5%

RL6

1K_0402_1%

R398

LAN_ISOLATE#22

C C

12

1K_0402_1%

1K_0402_1% @

@

RL7

15K_0402_5%

27P_0402_50V8J

1 2

CL2 0.1U_0402_16V7K

PCIE_ITX_C_LANRX_P320 PCIE_ITX_C_LANRX_N320

LOM_WAKE#

+LAN_DVDD12

+3VS

0.01U_0402_25V4Z

12

25MHz_20pF_6X25000017

1

CL24

2

1 2

CLK_LAN16 CLK_LAN#16

PLT_RST#8,17,20,25,27,31,32,33

CL11

@

for better EMI performace

LOM_WAKE#32

ISOLATEB

YL1

27P_0402_50V8J

1

2

LAN_X2LAN_X1

12

+LAN_DVDD12

pin assignments table for difference

8111C 8102EPin SROUT12

1

FB12

5

AVDD12

8

MDIP2

9

MDIN2

10

B B

A A

AVDD12

11

MDIP3

12

MDIN3

13

AVDD12

14

NC

15

EVDD12

22

DVDD12

32

DVDD12

52

AVDD12

58

AVDD33

59

ENSR

62

VDDSR

63

VCTRL12A NC NC NC NC NC NC NC NC DVDD12 NC NC NC DVDD12 NC NC VCTRL12D

LAN_MDI3LAN_MDI3+

LAN_MDI2LAN_MDI2+

LAN_MDI1LAN_MDI1+

LAN_MDI0LAN_MDI0+

0.01U_0402_16V7K

PCIE_IRX_LANTX_P3 PCIE_IRX_LANTX_N3

+LAN_CTRL18

RL4

+3V_LAN

0_0402_5% 8111C@

0_0402_5% 8111C@ RL5 2.49K_0402_1%RL5 2.49K_0402_1%

LOM_WAKE# ISOLATEB

LAN_X1 LAN_X2

1

CL25

2

1

CL32

2

8111C@

2

Place these components colsed to LAN chip

1 2

CL33

0.01U_0402_16V7K

0.01U_0402_16V7K 8111C@

8111C@

29

HSOP

30

HSON

23

HSIP

24

HSIN

33

CLKREQB

26

REFCLK_P

27

REFCLK_N

20

PERSTB

1

SROUT12

5

FB12

62

ENSR

64

RSET

19

LANWAKEB

36

ISOLATEB

60

CKTAL1

61

CKTAL2

65

EXPOSE_PAD

25

EGND

31

EGND

15

NC

17

NC

18

NC

34

NC

35

NC

39

NC

40

NC

41

NC

42

NC

RTL8111C-GR_QFN64_9X9

RTL8111C-GR_QFN64_9X9 8111C@

8111C@

CL34

0.01U_0402_16V7K

EEDI/AUX

DVDD12 DVDD12 DVDD12 DVDD12 DVDD12 DVDD12

EVDD12 EVDD12

VDDSR

AVDD33 AVDD33

AVDD12 AVDD12 AVDD12 AVDD12

1 2 3

4 5

7 8 9

10 11 12

1

SUPERWORLD_SWG150401

CL35

2

0.01U_0402_16V7K

EEDO EESK

EECS

LED3 LED2 LED1 LED0

MDIP0

MDIN0

MDIP1

MDIN1

MDIP2

MDIN2

MDIP3

MDIN3

VDD33 VDD33 VDD33 VDD33

IGPIO

OGPIO

UL3

8111C@

LAN_DO

45

LAN_DI

47

LAN_SK

48

LAN_CS

44

54 55

LAN_LINK#

56

LAN_ACTIVITY#

57

LAN_MDI0+

3

LAN_MDI0-

4

LAN_MDI1+

6

LAN_MDI1-

7

LAN_MDI2+

9

LAN_MDI2-

10

LAN_MDI3+

12

LAN_MDI3-

13

21 32 38 43 49 52

22 28

16 37 46 53

63 2

59 8

11 14 58

50 51

TCT1

MCT1 TD1+ TD1-

TCT2

MCT2 TD2+ TD2-6MX2-

TCT3

MCT3 TD3+ TD3-

TCT4

MCT4 TD4+ TD4-

+LAN_DVDD12

+LAN_EVDD12

+3V_LAN

+VDDSR +3V_LAN

DSM#

R399

R399 0_0402_5%

0_0402_5% @

@

+LAN_DVDD12 +LAN_AVDD12

24 23

MX1+

22

MX1-

21 20

MX2+

19 18

17

MX3+

16

MX3-

15 14

MX4+

13

MX4-

+3V_LAN

2

CL3

CL3 @

@

1

0.1U_0402_16V4Z

1 2

RL2 0_0603_5%

RL2 0_0603_5% 8102E@

8102E@

1 2

4.7UH_1008HC-472EJFS-A_5%_1008

+LAN_EVDD12

1

CL17

2

8102E@

1 2

RL8 0_0603_5%

RL8 0_0603_5% 8102E@

8102E@

1

CL28

2

8111C@

RJ45_MIDI3-

RJ45_MIDI3+

RJ45_MIDI2-

RJ45_MIDI2+

RJ45_MIDI1-

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

RJ45_GND

LL1

8111C@

22U_0805_6.3V6M

+LAN_DVDD12

1 2

LL4 0_0603_5%

1

8111C@

CL29

CL29 22U_0805_6.3V6M

22U_0805_6.3V6M

2

8111C@

+3V_LAN

2

CL18

0.1U_0402_16V4Z

1

8111C@

Close to Pin16,37,46,53

+LAN_AVDD12

1

CL8

8111C@

+3V_LAN

2

CL9

0.1U_0402_16V4Z

2

1

1 2

LL2 0_0603_5%

LL2 0_0603_5% 8111C@

8111C@

CL17

0.1U_0402_16V4Z

+LAN_AVDD12

8111C@

CL26

CL26 8111C@

8111C@

2

1

+3V_LAN

2

CL27

0.1U_0402_16V4Z

1

Close to Pin2,59

LAN Conn.

JLAN

LAN_ACTIVITY#

68P_0402_50V8J

LAN_LINK#

68P_0402_50V8J

1

CL30

CL31

RJ45_GND LANGND

+3V_LAN

2

1

+3V_LAN

2

1 2

CL36

RL10

12

300_0402_5%

RJ45_MIDI3RJ45_MIDI3+ RJ45_MIDI1RJ45_MIDI2RJ45_MIDI2+

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

RL14

12

300_0402_5%

1000P_1808_3KV7K

JLAN

12

Yellow LED-

11

Yellow LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

SUYIN_100073FR012G101ZL

1

CL37

0.1U_0402_16V4Z

2

the footprint is tamp.

14

SHLD2

13

SHLD1

1

CL38

4.7U_0603_6.3V6K

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19

3

Compal Secret Data

Deciphered Date

2009/09/19

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

Wednesday, September 16, 2009

1

of

28 43

of

28 43

of

28 43

E

5

Codec

+AVDD

RA3

+VDDA

D D

RA3

0_0603_5%

Int. Mic

FM_LINE_L26

FM_LINE_R26

Ext. Mic

C C

AZ_SDIN0_HD21

B B

AZ_BITCLK_HD21

AZ_SDOUT_HD21

AZ_RST_HD#21

AZ_SYNC_HD21

GPIO0-->SPK_SEL HIGH:HARMAN LOW:NO-BRAND

10U_0805_10V4Z

12

CA3

10U_0805_10V4Z

1 2

CA12 2.2U_0603_6.3V6KCA12 2.2U_0603_6.3V6K

1 2

CA13 2.2U_0603_6.3V6KCA13 2.2U_0603_6.3V6K

1 2

CA14 100P_0402_50V8JCA14 100P_0402_50V8J

SPK_SEL22

EAPD32

1

2

MIC1_C_L30 MIC1_C_R30

CA4

MIC2_L30 MIC2_R30

AZ_SDIN0_HD_R

12

RA733_0402_5% RA733_0402_5%

SENSE_A SENSE_B EAPD

1

2

CA5

0.1U_0402_16V4Z

MONO_IN

DGND

40mil

0.1U_0402_16V4Z

1

CA6

2

38

U49

AVDD125AVDD2

14

LINE2-L

15

LINE2-R

16

MIC2_L

17

MIC2_R

23

LINE1_L

24

LINE1_R

21

MIC1_L

22

MIC1_R

12

BEEP_IN

6

BITCLK

5

SDATA_OUT

8

SDATA_IN

11

RESET#

10

SYNC

2

GPIO0/DMIC_DATA1/2

3

GPIO1/DMIC_DATA3/4

13

SENSE A

34

SENSE B

47

EAPD

43

NC

4

DVSS

7

DVSS

ALC272-GR_LQFP48_7X7

ALC272-GR_LQFP48_7X7 <BOM Structure>

need to re-link ALC272

+3VS_DVDD

1

DVDD

4

+1.5VS_DVDIO

9

DVDD_IO

LOUT1_L LOUT1_R LOUT2_L LOUT2_R SPDIFO1

SPDIFO2 HPOUT_L HPOUT_R

MONO_OUT

DMIC_CLK1/2

DMIC_CLK3/4 LINE2_VREFO LINE1_VREFO

MIC1_VREFO

MIC2_VREFO

CPVEE

VREF

JDREF

AVSS1 AVSS2

1

CA1

2

0.1U_0402_16V4Z

1

CA7

2

0.1U_0402_16V4Z

35 36 39 41 48 45 33 32

37

46 44 20 18

10mil

28

10mil

19 31 27 40 30

CBN

29

CBP

26 42

10U_0805_10V4Z

1

CA2

2

10U_0805_10V4Z

1

CA8

2

LA2

1 2

MBK1608121YZF_0603

AC_VREF AC_JDREF

1 2

CA17 2.2U_0603_6.3V6KCA17 2.2U_0603_6.3V6K

12

FBMA-L11-160808-800LMT_0603

RA5

1 2

63.4_0402_1%

RA6

1 2

63.4_0402_1%

+MIC1_VREFO +MIC2_VREFO

1 2

CA16 2.2U_0603_6.3V6KCA16 2.2U_0603_6.3V6K

RA10

1 2

20K_0402_1%

AGND

RA1

30mil

RA2

RA2 0_0603_5%

0_0603_5% NIHDMI@

NIHDMI@

20mil

RA1

0_0603_5%

LA1

1 2

IHDMI@

AMP_SPK_L 30

AMP_SPK_R 30

1 2

C851 33P_0402_50V8K@C851 33P_0402_50V8K@

CA18

1

2

10U_0805_10V4Z

1 2

RA12 0_0603_5%RA12 0_0603_5%

1 2

RA13 0_0603_5%RA13 0_0603_5%

1 2

RA14 0_0603_5%@RA14 0_0603_5%@

1 2

RA15 0_0603_5%RA15 0_0603_5%

3

12

+3VS

+1.5VS

SPDIF 30

HP_L 30 HP_R 30

CA19

1

2

0.1U_0402_16V4Z

reserve for EMI

Audio regulator

Beep sound

1U_0402_6.3V4Z

SUSP#17,25,32,35,40

EC Beep

BEEP#32

PCI Beep

SB_SPKR22

2

+5VALW

2

CA9

1

1 2

RA4 0_0402_5%RA4 0_0402_5%

UA1

1

VIN GND SHDN#

RA8

RA9

RA11

10K_0402_5%

VOUT

BP

12

0.1U_0402_16V4Z

2 3

APL5151-475BC-TRL_SOT23-5

1 2

47K_0402_5%

1 2

47K_0402_5%

5

CA11

12

4

0.22U_0402_10V4Z

CA15

MONO_IN

1 2

1

CA20

0.1U_0402_16V4Z

2

112

PJ33

@PJ33

@

JUMP_43X79

+VDDA

1

2

4.75V

2

CA10

CA10 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

@

+3VS

Sense Pin Impedance

39.2K

SENSE A

A A

SENSE B

20K 10K

5.1K

39.2K 20K 10K

5.1K

5

Codec Signals

PORT-A (PIN 39, 41) PORT-B (PIN 21, 22) PORT-C (PIN 23, 24) PORT-D (PIN 35, 36) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17) PORT-H (PIN 37) PORT-I (PIN 32, 33)

Function

Ext. MIC FM tuner SPK out

Int. MIC

Headphone out

4

place close to chip

RA18

MIC_SENSE30

NBA_PLUG30

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

20K_0402_1%

RA19

1 2

10K_0402_1%

FM@

1 2

RA16 5.1K_0402_5%RA16 5.1K_0402_5%

RA17

1 2

20K_0402_1%

20K_0402_1% MIC@

MIC@

SENSE_A

SENSE_B

Compal Secret Data

2008/09/19 2009/09/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

SCHEMATIC MB A4571

401605

Wednesday, September 16, 2009

1

of

29 43

of

29 43

of

29 43

E

TPA6017 Medium Range Amplifier

Rin =70Kohm

CA29 0.033U_0402_25V7KCA29 0.033U_0402_25V7K

AMP_SPK_R29

AMP_SPK_L29

CA30 0.033U_0402_25V7KCA30 0.033U_0402_25V7K

CA32 0.033U_0402_25V7KCA32 0.033U_0402_25V7K

setting 68Hz F=1/2πRC --> -3db C=0.033U,R=70K,F=68Hz

SW2

SW_XRE094_3P

5

DIP

A

COM

B

DIP

4

CA31 0.033U_0402_25V7KCA31 0.033U_0402_25V7K

EC_EAPD32

RA33

10K_0402_5%

2

1

3

+3VS

12

RA34

RA34 10K_0402_5%

10K_0402_5%

LINE_C_OUTR

LINE_C_OUTL

Volume Control

1 2

RA35 10K_0402_5%RA35 10K_0402_5%

1 2

RA36 10K_0402_5%RA36 10K_0402_5%

0.01U_0402_16V7K

CA37

17

19

UA3

7

RIN+

RIN-

9

LIN+

5

LIN-

SHUTDOWN

+3VS

1

2

+5VS

10U_0805_10V4Z

16

15

6

VDD

PVDD1

PVDD2

GAIN0 GAIN1

ROUT+

ROUT-

LOUT+

LOUT-

BYPASS

GND41GND311GND213GND1

GND5

TPA6017A2_TSSOP20

20

21

CA35 0.1U_0402_16V4ZCA35 0.1U_0402_16V4Z

1 2

1

5

P

NC

4

A2Y

G

74LVC1G14GW_SOT353-5

UA4

3

1

CA38

0.01U_0402_16V7K

2

CA23

NC

1

2

2 3

18

14

4

8

12 10

0.1U_0402_16V4Z

CA24

AMP_BYPASS

Ext. Mic

MIC1_C_L29

MIC1_C_R29

1

CA25

2

0.1U_0402_16V4Z

100K_0402_5%

SPKR+

100K_0402_5%

SPKR-

SPKL+

SPKL-

Keep 10 mil width

2

CA33

0.47U_0603_10V7K

1

+3VS

12

RA32

RA32 100K_0402_5%

100K_0402_5%

1

CA36

0.1U_0402_16V4Z

2

ENCODER_DIR 32 ENCODER_PULSE 32

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10 dB

12

RA28

RA30

RA27

RA27 100K_0402_5%

100K_0402_5%

@

12

RA29

RA29 100K_0402_5%

100K_0402_5% @

@

GAIN0 GAIN1 Av(db)Rin(ohm)

0 0 01 1 11

UA5

1

CD1#

VCC

2

D1

CD2#

3

CP1

4

SD1#

5 6 7

CP2

Q1

SD2# Q1# GND

Q2#

74LCX74MTC_TSSOP14

10

15.6

0

21.6

14 13 12

D2

11 10 09

Q2

08

0.1U_0402_16V4Z

2008/09/19 2009/09/19

6

+3VS

+5VS

1

2

90K 70K 45K 25K

CA39

Int. Mic

Left Connector

SPKL+ SPKL-

Right Connector

SPKR+ SPKR-

NBA_PLUG29

HP_R29 HP_L29

SPDIF29

Compal Secret Data

Deciphered Date

MIC2_L29 MIC2_R29

LA3 FBMA-L11-160808-800LMT_0603LA3 FBMA-L11-160808-800LMT_0603

1 2

LA4 FBMA-L11-160808-800LMT_0603LA4 FBMA-L11-160808-800LMT_0603

1 2

LA5 FBMA-L11-160808-800LMT_0603LA5 FBMA-L11-160808-800LMT_0603

1 2

LA6 FBMA-L11-160808-800LMT_0603LA6 FBMA-L11-160808-800LMT_0603

1 2

LA7

LA7 KC FBM-L11-160808-121LMT 0603

KC FBM-L11-160808-121LMT 0603 LA8

LA8 KC FBM-L11-160808-121LMT 0603

KC FBM-L11-160808-121LMT 0603

1

MIC_SENSE29

MIC1_R

LA9

LA9 KC FBM-L11-160808-121LMT 0603

KC FBM-L11-160808-121LMT 0603

MIC1_L

LA10

LA10 KC FBM-L11-160808-121LMT 0603

KC FBM-L11-160808-121LMT 0603

RA21

4.7U_0805_10V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z 1U_0402_6.3V4Z

1U_0402_6.3V4Z

CA21

1K_0402_5%

12 12

1K_0402_5%

CA22

MIC@

1K_0402_5%

CA26

12 12

1K_0402_5%

CA28

MIC@

DA4 PJDLC05_SOT23-3DA4 PJDLC05_SOT23-3

1

DA5 PJDLC05_SOT23-3DA5 PJDLC05_SOT23-3

1

RA25

RA26

RA21

RA22

2 3

3 2

MIC@RA25

MIC@

MIC@RA26

MIC@

12 12

RA20

4.7K_0402_5%

RA23

4.7K_0402_5%

1 2

220P_0402_50V7K

SPK_L1 SPK_L2

SPK_R1 SPK_R2

HeadPhone/LINE Out JACK

1 2

100P_0402_50V8J

HP_R_L HP_L_L

3 2

CA34

SPDIF_R

1

2

SPDIF_R

+5VS

1 2 1 2

DA6

DA6 PJDLC05_SOT23-3

PJDLC05_SOT23-3

RA31

RA31 0_0603_5%

0_0603_5%

Ext.MIC/LINE IN JACK

1 2 1 2

DA7

1

PJDLC05_SOT23-3

MIC1_L_R MIC1_L_L

3 2

1

CA41

CA40

120P_0402_50V8K

Title

Size Document Number Rev

Date: Sheet

CA41 120P_0402_50V8K

120P_0402_50V8K

2

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

CH751H-40PT_SOD323-2

12

DA1

MIC1_L

MIC1_R

12

DA2

CH751H-40PT_SOD323-2

MIC@

INT_MIC

CA27

MIC@

2

3

@

1

DA3

PSOT24C_SOT23

JSPKL

1

2

ACES_85204-0200N

ACES_85204-0200N @

@

JSPKR

1

2

ACES_85204-0200N

ACES_85204-0200N @

@

JLINE

1

2

3

10

AGND

3

4

5

8

9

9 10

SINGA_2SJ-A373-H01

SINGA_2SJ-A373-H01 @

@

JEXMIC

5 4 3

6 2 1

FOX_JA6333L-B3T0-7F

FOX_JA6333L-B3T0-7F @

@

AGND

21

12

+MIC2_VREFO

RA244.7K_0402_5%

JMIC

1

NC1

2

NC2

ACES_85204-0200N

@

3

NC1

4

NC2

3

NC1

4

NC2

DRIVE

DRIVE IC

IC

30 43Wednesday, September 16, 2009

+MIC1_VREFO

3 4

GND GND

of

6 7

E

A

B

C

D

E

+1.8VS_OUT

40mil

0.1U_0402_16V4Z

Power Circuit

UC1

XIN XOUT

3

APCLKN

4

APCLKP

9

APRXN

8

APRXP

11

APTXN

12

APTXP

7

APREXT

38

TXIN

39

TXOUT

JMB380

30

TAV33

1

XRSTN

2

XTEST

13

SEEDAT

14

SEECLK

15

CR1_CD1N

16

CR1_CD0N

17

CR1_PCTLN

21

CR1_LEDN

JMB380-QGAZ0A_QFN48_7X7

CLK_5IN1#16

1 1

PCIE_IRX_C_5IN1TX_N620 PCIE_IRX_C_5IN1TX_P620

CC11 22P_0402_50V8JCC11 22P_0402_50V8J

24.576MHz_16P_3XG-24576-43E1

CC13 22P_0402_50V8JCC13 22P_0402_50V8J

+3VS

2 2

7mil

12

XC1

12

7mil

1 2

RC5 4.7K_0402_5%RC5 4.7K_0402_5%

1 2

RC7 4.7K_0402_5%RC7 4.7K_0402_5%

+5VS

12

21

XDCD0#_SDCD#

RC11

RC11 120_0402_5%

120_0402_5%

CLK_5IN116

PCIE_ITX_C_5IN1RX_N620 PCIE_ITX_C_5IN1RX_P620

CC7 0.1U_0402_16V7KCC7 0.1U_0402_16V7K

1 2

CC8 0.1U_0402_16V7KCC8 0.1U_0402_16V7K

1 2

XIN

12

RC2

1M_0402_5%

XOUT

XDCD1#_MSCD#

DC1

DC1 HT-F196BP5_WHITE

HT-F196BP5_WHITE

1 2

CC12 0.1U_0402_16V4ZCC12 0.1U_0402_16V4Z

PCIE_IRX_5IN1TX_N6 PCIE_IRX_5IN1TX_P6

RC18.2K_0402_5% RC18.2K_0402_5%

+3VS

PLT_RST#8,17,20,25,27,28,32,33

CPPE

TC2 PADTC2 PAD

XDCD1#_MSCD# XDCD0#_SDCD#

+VCC_OUT

12

CR_LED

APVDD

APV18

DV33 DV33 DV33 DV18 DV18

MDIO0 MDIO1 MDIO2 MDIO3 MDIO4 MDIO5 MDIO6 MDIO7

MDIO8

MDIO9 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14

TPA1P

TPBIAS_1

TREXT

APGND

TCPS TPB1N TPB1P TPA1N

GND

5 10

19 20 44 18 37

XD_SD_MS_D0

48

XD_SD_MS_D1

47

XD_SD_MS_D2

46

XD_SD_MS_D3

45

SDCMD_MSBS_XDWE#

43

SDCLK_MSCLK_XDCE#

42

XDWP#_SDWP#

41

XD_CLE

40

XD_SD_D4

29

XD_SD_D5

28

XD_SD_D6

27

XD_SD_D7

26

XD_RE#

25

XD_RB#

23

XD_ALE

22

TPA+

34

TPBIAS

35

TREXT

36 6

TCPS

24

TPB-

31

TPB+

32

TPA-

33 49

1

CC2

CC1

+3VS

1 2

RC6 12K_0402_1% RC6 12K_0402_1%

RC9 10K_0402_5%RC9 10K_0402_5%

CC2

2

10U_0805_10V4Z

1 2

CC5 0.1U_0402_16V4ZCC5 0.1U_0402_16V4Z

1 2

CC6 0.1U_0402_16V4ZCC6 0.1U_0402_16V4Z

12

1000P_0402_50V7K

1

CC3

2

1

CC9

2

0.1U_0402_16V4Z

1

CC4

2

0.1U_0402_16V4Z

+1.8VS_OUT

1

CC10

0.1U_0402_16V4Z

2

1

2

XDWP#_SDWP#

XD_RB#

XD_CLE

XD_RE#

XD_ALE

+VCC_OUT

12

RC3 10K_0402_5%RC3 10K_0402_5%

12

RC4 10K_0402_5%RC4 10K_0402_5%

1 2

RC8 10K_0402_5%RC8 10K_0402_5%

1 2

RC10 200K_0402_5%RC10 200K_0402_5%

1 2

RC12 10K_0402_5%RC12 10K_0402_5%

D3E mode

CR_CPPE#21

CR_WAKE#21

Strapping setting

+3VS

Pin name

MDIO7

MDIO12

MDIO14

P.S CR1_PCTLN aslo can out 3V with 250mA for 5IN1 using.(MDIO12 can't be seted after MP IC)

High

on-board

+VCC_OUT high active

CR_LED high active

+3VALW

12

R129

R129 10K_0402_5%

10K_0402_5% @

@

13

D

2

G

Q54

S

2N7002_SOT23-3

2N7002_SOT23-3 @

@

XDCD0#_SDCD#

21

D81

CH751H-40PT_SOD323-2

use 0ohm

Description

★

CPPE

low

add-in card

+VCC_OUT low active

CR_LED low active

★

61

QC1A

2N7002DW-T/R7_SOT363-6

another at page34

3 3

+VCC_OUT

XDCD1#_MSCD# XDCD0#_SDCD#

4 4

QC1A

10U_0805_10V4Z

CC19

@CC19

@

100P_0402_50V8J

DC2

2 3

DAN202UT106_SC70-3

2

20 mils

1

CC17

2

@

12

RC24 100_0402_5%

1

A

1

2

12

CR_LED

RC17

4.7K_0402_5%

1 2

CC18

0.1U_0402_16V4Z

XDCE#

XD_CD#

1

CC21

270P_0402_50V7K

2

XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 XD_SD_D4 XD_SD_D5 XD_SD_D6 XD_SD_D7

SDCMD_MSBS_XDWE# XDWP#_SDWP# XD_ALE XD_CD# XD_RB# XD_RE# XDCE# XD_CLE

Card Reader Connector

JREAD

3

XD-VCC

32

XD-D0

10

XD-D1

9

XD-D2

8

XD-D3

7

XD-D4

6

XD-D5

5

XD-D6

4

XD-D7

34

XD-WE

33

XD-WP

35

XD-ALE

40

XD-CD

39

XD-R/B

38

XD-RE

37

XD-CE

36

XD-CLE

31

7IN1-GND

11

7IN1-GND

41

7IN1-GND

42

7IN1-GND

TAITW_R015-D10-LM_NR

TAITW_R015-D10-LM_NR @

@

B

SDCLK_MSCLK_XDCE# SDCLK_MSCLK_XDCE#_R

SD-VCC MS-VCC

SD_CLK

7 IN 1 CONN

SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3 SD-DAT4 SD-DAT5 SD-DAT6 SD-DAT7

SD-CD

SD-WP

SD-CMD

MS-SCLK MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

MS-INS

MS-BS

1 2

RC16 0_0402_5%RC16 0_0402_5%

33P_0402_50V8K

CC14

CC14 @

@

1

2

reserve for EMI

CC16

21 28

20 14 12 30 29 27 23 18 16 1 2 25

26 17 15 19 24 22 13

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+VCC_OUT

SDCLK XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 XD_SD_D4 XD_SD_D5 XD_SD_D6 XD_SD_D7 XDCD0#_SDCD# XDWP#_SDWP# SDCMD_MSBS_XDWE#

MSCLK XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 XDCD1#_MSCD# SDCMD_MSBS_XDWE#

Issued Date

220P_0402_50V8K

0.33U_0603_10V7K

Compal Secret Data

2008/09/19 2009/09/19

C

Compal Secret Data

SDCLK

12

MSCLK

RC1322_0402_5% RC1322_0402_5%

12

XDCE#

RC1422_0402_5% RC1422_0402_5%

12

RC1522_0402_5% RC1522_0402_5%

1

RC19

2

TPBIAS

CC20

Deciphered Date

Close to Chip

12

4.99K_0402_1%

1

2

12

RC20

RC20 56_0402_5%

56_0402_5%

RC22

56_0402_5%

12

RC21

RC21 56_0402_5%

56_0402_5%

2

3

401605

3

1

reserve for EMI

12

RC23

RC23 56_0402_5%

56_0402_5%

PJDLC05_SOT23-3

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

2

D77

1

Compal Electronics, Inc.

SCHEMATIC MB A4571

1394 Port

J1394

J1394 TPBTPB+ TPATPA+

TPB-1GND

2

TPB+

3

TPA-

4

TPA+

P-TWO_CU8047-A0G15

@

D78

D78 PJDLC05_SOT23-3

PJDLC05_SOT23-3

please place to BTM side and close to 1394 port

E

GND GND GND

R132

1 2

0_0805_5%

31 43Wednesday, September 16, 2009

5 6 7 8

IOGND

IOGNDGND

E

of

5

0.1U_0402_16V4Z

0.1U_0402_16V4Z C771

C771

1

C770

2

0.1U_0402_16V4Z

D D

@

10_0402_5%

@

22P_0402_50V8J

+3VL

C780 0.1U_0402_16V4ZC780 0.1U_0402_16V4Z

C C

+5VL +3VS

B B

0.1U_0402_16V4Z

PM_SLP_S5#22 PM_SLP_S4#22

EC_SMB_ESB_CK34 EC_SMB_ESB_DA34

12

R738

1

C778

2

R739

R739 47K_0402_5%

47K_0402_5%

12

RP23

1 8 2 7 3 6 4 5

4.7K_0804_8P4R_5%

C781

1 2

CLK_PCI_EC

12

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

+3VALW

2

B

1

A

ECRST#

5

P

SLP_S5#

4

Y

G

U44NC7SZ08P5X_NL_SC70-5 U44NC7SZ08P5X_NL_SC70-5

3

R772 0_0402_5%R772 0_0402_5%

R743 0_0402_5%SYNCS@R743 0_0402_5%SYNCS@ R744 0_0402_5%SYNCS@R744 0_0402_5%SYNCS@ R759 0_0402_5%ENECS@R759 0_0402_5%ENECS@ R760 0_0402_5%ENECS@R760 0_0402_5%ENECS@

KSI[0..7]33

KSO[0..15]33

12

12 12 12 12

KSI[0..7] KSO[0..15]

MCH_TSATN_EC#8

WLAN_WAKE#27 FAN_SPEED14

PWR_SUSP_LED34

NUM_LED#33

NEW_BOARD

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK119,37 EC_SMB_DA119,37 EC_SMB_CK24,17 EC_SMB_DA24,17

PM_SLP_S3#22

ON/OFFBTN#34

EC_KBRST#21

LPC_FRAME#21,33

CLK_PCI_EC16

WL_BT_LED#34

EC_SMI#22 CEC_INT#19

E51_TXD33 UWB_OFF#27

ESB_CK ESB_DA

0.1U_0402_16V4Z

EC_GA2021

SERIRQ22,33

LPC_AD321,33 LPC_AD221,33 LPC_AD121,33 LPC_AD021,33

PLT_RST#8,17,20,25,27,28,31,33

EC_SCI#22

reserve for ENE_CS board

C784

A A

15P_0402_50V8J

32.768KHZ_12.5P_1TJS125BJ4A421P

5

1

C772

2

1

2

4

0.1U_0402_16V4Z

1

C773

2

CLK_PCI_EC ECRST#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6

KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9

KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

NEW_BOARD

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

SLP_S5#

ESB_CK ESB_DA

CRY1 CRY2

R749

1 2

20M_0603_5%@

4

1

Y5

IN

OUT

NC3NC

2

4

2

C774

C774 1000P_0402_50V7K

1000P_0402_50V7K

1

U43

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

CRY2CRY1

1

C785

2

15P_0402_50V8J

+3VL

2

C775

C775 1000P_0402_50V7K

1000P_0402_50V7K

1

LPC & MISC

9

22

33

96

111

125

VCC

PWM Output

AD Input

DA Output

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SPI Device Interface

SPI Flash ROM

GPIO

SM Bus

GPO

GPIO

GPI

GND

11

24

35

94

113

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+3VL

C769

ECAGND

1 2

0.1U_0402_16V4Z

67

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

AGND

KB926QFA1_LQFP128_14X14

69

ECAGND

2008/09/19 2009/09/19

3

V18R

L25

12

0_0603_5%

21 23 26 27

BATT_TEMPA

63

BATT_OVP

64 65 66 75 76

68 70 71 72

83 84 85 86

TP_CLK

87

TP_DATA

88

VGATE

97 98 99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103

PM_PWROK_EC

104 105 106 107 108

110 112 114 115 116 117 118

+EC_V18R

124

Compal Secret Data

CIR_IN

ACIN_R

ENBKL

C782

4.7U_0805_10V4Z

Deciphered Date

INVT_PWM 17 BEEP# 29

VR_LED 34 ACOFF 38

BATT_TEMPA 37

BATT_OVP 38

KILL_SW# 27

DAC_BRIG 17 EN_DFAN1 4 IREF 38

CHGVADJ 38

EC_EAPD 30 USB_EN# 25,26 CAP_INT# 34 ENCODER_PULSE 30

TP_CLK 34

TP_DATA 34

VGATE 8,22,42

WOL_EN 35

SBPWR_EN 35 LID_SW# 33

EC_SI_SPI_SO 33

EC_SO_SPI_SI 33

EC_SPICLK 33

SPI_CS# 33

PWR_ON_LED 34

FSTCHG 38 BATT_FULL_LED# 34 CAPS_LED# 33 BATT_CHG_LOW_LED# 34

CURS_LED# 33 SYSON 25,41 VR_ON 42

EC_RSMRST# 22 EC_LID_OUT# 22

EC_ON 34

EC_SWI# 22,25

BKOFF# 17

WL_OFF# 27

HDMI_HPD_R 19

STB_WLAN 35

ENCODER_DIR 30

EAPD 29 EC_THERM# 22 SUSP# 17,25,29,35,40 PBTN_OUT# 22 LOM_WAKE# 28

2

1 2

+5VL

2

BATT_OVP ACIN_R

TP_CLK TP_DATA

CIR_IN

+3VALW

21

D79

CH751H-40PT_SOD323-2

R757 0_0402_5%

@

ENBKL

R750 100_0805_5%

1

1 2

C776 100P_0402_50V8JC776 100P_0402_50V8J

1 2

C777 100P_0402_50V8JC777 100P_0402_50V8J

1 2

C779 100P_0402_50V8JC779 100P_0402_50V8J

1 2 1 2

R748 100K_0402_5%R748 100K_0402_5%

1 2

ACIN_R

ECAGNDBATT_TEMPA

+5VS

R7404.7K_0402_5% R7404.7K_0402_5% R7414.7K_0402_5% R7414.7K_0402_5%

+5VL

12

R742100K_0402_5% R742100K_0402_5%

CH751H-40PT_SOD323-2

2 1

PM_PWROK 8,22

1 2

R130 2.2K_0402_5%R130 2.2K_0402_5%

1 2

R745 0_0402_5%GM@R745 0_0402_5%GM@

1 2

R746 0_0402_5%PM@R746 0_0402_5%PM@

1 2

R747 100K_0402_5%R747 100K_0402_5%

D64

ACIN 22,34,36

+3VS

UMA_ENBKL 10 VGA_ENBKL 17

CIR

U45

1

C783

4.7U_0805_10V4Z

CIR@

Title

Size Document Number Rev

Date: Sheet

C783 CIR@

CIR@

+5VALW_CIR

12

2

CIR_IN

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

U45

1

GND

2

GND

3

VCC

4

ROUT

TSOP6238-TR_4P

CIR@

1

of

32 43Wednesday, September 16, 2009

of

32 43Wednesday, September 16, 2009

of

32 43Wednesday, September 16, 2009

E

SPI Flash (16Mb*1)

1

C786

0.1U_0402_16V4Z

2

SPI_CS#

1 2

R751 0_0402_5%R751 0_0402_5%

EC_SPICLK32

EC_SO_SPI_SI32

External Flash ROM

SPI_CS#32

SB_INT_FLASH_SEL#22

SPI_CS# EC_SI_SPI_SO

E&T_2941-G08N-00E~D

+3VL

JP35

112 334 556 778

@

20mils

INT_SPI_CS#

EC_SPICLK

2 4 6 8

8 3 7 1 6 5

SST25LF080A_SO8-200mil

EC_SPICLK

INT_FLASH_EN# EC_SPICLK EC_SO_SPI_SI

M25P80-VMW6TP_SO8-->16Mb ROM WIESO_G6179-100000_8P-->BIOS Conn.

U46

VCC W HOLD S C D

10_0402_5%@

VSS

Q

1 2

R752

4

2

4.7P_0402_50V8C@

+3VL

C787

1 2

EC_SI_SPI_SO 32

If these TEST@ components are mounded, please delete R751

INT_SPI_CS#

R754

1 2

22_0402_5%

22_0402_5% @

@

+3VL

5

U47

4

Y

3

@

C788 0.1U_0402_16V4Z

12

INT_FLASH_EN#

2

B

Vcc

SPI_CS#

1

A

G

NC7SZ32P5X_NL_SC70-5

NC7SZ32P5X_NL_SC70-5 @

@

1 2

@

R753 100K_0402_5%

Please place the connector under DDR door

JP34

For EC

SB_INT_FLASH_SEL

SPI#

EXT_CS#

External Flash ROM

JP34

1

2

3

4

ACES_85205-0400@

H

L

H

STOP RUN

E51_TXD

L

H

L

H

L

STOP

+5VL

SB_INT_FLASH_SEL

SPI#

INT_SPI_CS#

External Flash ROM

RUN

L

H

L

STOP

L

HINT_FLASH_EN#

H

L

H

STOP

TP_SWL34 TP_SWR34

180P_0402_50V8J

C793

1

2

LPC Debug Port

Please place the PAD under DDR DIMM.

+3VALW

SERIRQ

LPC_AD321,32

LPC_AD121,32

1 2

R761 0_0402_5%R761 0_0402_5%

LPC_AD3

LPC_AD1

LPC_FRAME#

SERIRQ22,32

LPC_FRAME#21,32

7

8

9

10

2

3

1

DEBUG_PAD@H1DEBUG_PAD@

SMT1-05_4P

1 2

D65

D65 PJDLC05_SOT23-3

PJDLC05_SOT23-3

H1

Left switch Right Switch

SW3

3 4

5

6

180P_0402_50V8J

need to relink the footprint

C794

1

2

3

2

1

SW4

SW4 SMT1-05_4P

SMT1-05_4P

1 2

D66

D66 PJDLC05_SOT23-3

PJDLC05_SOT23-3

5

6

Lid SW

+3VALW

56

4

3

2

1

1 2

R758 0_0402_5%@R758 0_0402_5%@

PLT_RST#

LPC_AD2

LPC_AD0

R764

22_0402_5%

1 2 2

C820

C820 22P_0402_50V8J

22P_0402_50V8J

1

E51_TXD

PLT_RST# 8,17,20,25,27,28,31,32

LPC_AD2 21,32

LPC_AD0 21,32

CLK_PCI_DDR 16

E51_TXD 32

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

1

C822

0.1U_0402_16V4Z

2

U48

U48 APX9132ATI-TRL_SOT23-3

APX9132ATI-TRL_SOT23-3

VDD2VOUT

3

GND

1

10P_0402_50V8J

2008/09/19 2009/09/19

3 4

+3VALW

12

R766

R766 47K_0402_5%

47K_0402_5%

1

C823

2

Compal Secret Data

Deciphered Date

LID_SW# 32

KEYBOARD CONN.

KSI[0..7]

KSO[0..15]

JKB

34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4

CAPS_LED#

3

CURS_LED#

2

NUM_LED#

1

ACES_88170-3400

@

KSO2 KSO1 KSO0 KSO4 KSO3 KSO5 KSO14 KSO6 KSO7 KSO13 KSO8 KSO9 KSO10 KSO11 KSO12 KSO15 KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1

R762 300_0402_5%R762 300_0402_5%

KSO2 KSO1

KSI[0..7] 32 KSO[0..15] 32

1 2

R755 300_0402_5%R755 300_0402_5%

1 2

R756 300_0402_5%R756 300_0402_5%

12

Title

Size Document Number Rev

Date: Sheet

+3VS

+3VS CAPS_LED# 32 CURS_LED# 32 NUM_LED# 32

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

Wednesday, September 16, 2009

KSO0 KSO4 KSO3 KSO5 KSO14 KSO6 KSO7 KSO13 KSO8 KSO9 KSO10 KSO11 KSO12 KSO15

KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1

CAPS_LED#

CURS_LED#

NUM_LED#

1 2

C789 100P_0402_50V8JC789 100P_0402_50V8J

1 2

C790 100P_0402_50V8JC790 100P_0402_50V8J

1 2

C791 100P_0402_50V8JC791 100P_0402_50V8J

1 2

C792 100P_0402_50V8JC792 100P_0402_50V8J

1 2

C795 100P_0402_50V8JC795 100P_0402_50V8J

1 2

C796 100P_0402_50V8JC796 100P_0402_50V8J

1 2

C797 100P_0402_50V8JC797 100P_0402_50V8J

1 2

C798 100P_0402_50V8JC798 100P_0402_50V8J

1 2

C799 100P_0402_50V8JC799 100P_0402_50V8J

1 2

C800 100P_0402_50V8JC800 100P_0402_50V8J

1 2

C801 100P_0402_50V8JC801 100P_0402_50V8J

1 2

C802 100P_0402_50V8JC802 100P_0402_50V8J

1 2

C803 100P_0402_50V8JC803 100P_0402_50V8J

1 2

C804 100P_0402_50V8JC804 100P_0402_50V8J

1 2

C805 100P_0402_50V8JC805 100P_0402_50V8J

1 2

C807 100P_0402_50V8JC807 100P_0402_50V8J

1 2

C808 100P_0402_50V8JC808 100P_0402_50V8J

1 2

C810 100P_0402_50V8JC810 100P_0402_50V8J

1 2

C811 100P_0402_50V8JC811 100P_0402_50V8J

1 2

C812 100P_0402_50V8JC812 100P_0402_50V8J

1 2

C813 100P_0402_50V8JC813 100P_0402_50V8J

1 2

C814 100P_0402_50V8JC814 100P_0402_50V8J

1 2

C815 100P_0402_50V8JC815 100P_0402_50V8J

1 2

C816 100P_0402_50V8JC816 100P_0402_50V8J

1 2

C817 100P_0402_50V8JC817 100P_0402_50V8J

1 2

C818 100P_0402_50V8JC818 100P_0402_50V8J

1 2

C819 100P_0402_50V8JC819 100P_0402_50V8J

of

33 43

of

33 43

of

33 43

E

5

Power Button/ PWR/B

JPOWER

+3VL

R765

3 4

R765 100K_0402_5%

100K_0402_5%

1 2

ON/OFFBTN#

EC_ON32

D D

TOP side

BTM side

1 2

SW5

@SW5

@

SMT1-05-A_4P

5

6

SW6

@SW6

@

SMT1-05-A_4P

5

6

ON/OFFBTN# 32

R767

10K_0402_5%

5

GND

6

GND

ACES_85201-04051

@

1 2

debug phase using

POWER_ON_LED

1

2

ON/OFFBTN#

3

4

61

Q28A

Q28A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

another at page35

2

4

51_ON# 36

+5VS

1U_0402_6.3V4Z

3

R106

0_0603_5%

Touch/B Connector

C821

12

TP_CLK32

2

TP_DATA32 TP_SWL33 TP_SWR33

1

D80

D80 PJDLC05_SOT23-3

PJDLC05_SOT23-3

LED/B Connector

+5VS

LEDB_LED#

13

D

VR_LED

D

Q51

2

G

2N7002_SOT23-3

S

+5VS_TOUCH

2 3

JLED

2 1

4

2

NC2

3

1

NC1

ACES_85204-0200N

@

12

R105

R105 0_0603_5%

0_0603_5%

JTOUCH

1

2

3

4

5

6

7

GND

8

GND

ACES_85201-06051

2

ISPD

NB_GL_R1

U3

CANTIGA GL40 A1

CANTIGA GL40 A1 GMLR1@

GMLR1@ U9

U9

ICH9-M ES

ICH9-M ES ICH9R1@

ICH9R1@

NB_PM

NB_PM_R1

NB_GM_R1

1

ZZZ

PCB ZKU LA-4571P REV4

U3

CANTIGA PM

CANTIGA PM PMR3@

PMR3@ U3

U3

CANTIGA PM

CANTIGA PM PMR1@

PMR1@ U3

U3

Trans former

CANTIGA GM45

CANTIGA GM45 GMR1@

GMR1@

LANPCB

DC-IN

NB_GL

UL1

8102E

8102E 8102E@

8102E@ PJP1

PJP1

PJP1 45@

45@ U3

U3

CANTIGA GL40 A1

CANTIGA GL40 A1 GMLR3@

GMLR3@ UL3

UL3

10/100M transformer

10/100M transformer 8102E@

8102E@

DC-IN LED

C C

+5VALW

1 2

R768 120_0402_5%R768 120_0402_5%

BATT CHARGE/FULL LED

+5VALW

1 2

R773 300_0402_5%R773 300_0402_5%

1 2

R775 120_0402_5%R775 120_0402_5%

WL&BT LED

+5VS

R777 300_0402_5%

WiMAX LED

B B

1 2

+5VS

R778 300_0402_5%

HDD LED

1 2

+5VS

R780 120_0402_5%R780 120_0402_5%

Logo LED

A A

+5VS

LOGO_LED#

R514

1 2

0_0402_5%

0_0402_5% @

@

R515

1 2

0_0402_5%

Vf=2.8V(typ),3.15V(max)

D67

2 1

HT-F196BP5_WHITE

D70

2 1

HT-191UD_AMBER_0603

D72

2 1

HT-F196BP5_WHITE

Vf=1.9V(typ),2.4V(max)

D74

1 2

WLAN@

Vf=2.8V(typ),3.15V(max)

WIMAX@

1 2

R774 120_0402_5%R774 120_0402_5%

1 2

R776 120_0402_5%R776 120_0402_5%

D74

HT-110UD_1204

HT-110UD_1204 WLAN@

WLAN@

D75

2 1

HT-110NB5 1204 BLUE

WIMAX@

+5VS

10K_0402_5%

D76

2 1

HT-F196BP5_WHITE

2 1

HT-110TW_WHITE

2 1

HT-110TW_WHITE

5

3

2N7002DW-T/R7_SOT363-6

another at page31

12

WIMAX_LED_GND

R819

+5VS

WIMAX_LED_GND

R779

D71

D73

R819

10K_0402_5%

3

6 1

12

5

3

4

Q31B 2N7002DW-T/R7_SOT363-6Q31B 2N7002DW-T/R7_SOT363-6

D5

D5 HT-SV116BP_WHITE

HT-SV116BP_WHITE

21

@D71

@

@D73

@

1 2

21

D6

D6 HT-SV116BP_WHITE

HT-SV116BP_WHITE

0_0402_5%

0_0402_5% @

@

0_0402_5%

ACIN 22,32,36

5

QC1B

4

BATT_CHG_LOW_LED# 32

BATT_FULL_LED# 32

WL_BT_LED# 32

R506

1 2

0_0402_5%

0_0402_5% @

@

6 1

12

5

Q52A

Q52A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

Q52B 2N7002DW-T/R7_SOT363-6Q52B 2N7002DW-T/R7_SOT363-6

2

Q31A

Q31A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

LOGO_LED#

R516

R517

2

SATA_LED# 21

6 1

+5VS

LED_WIMAX# 27

2

Q30A

Q30A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

another at page39

4

FUN/B Connector

R97 0_0603_5%R97 0_0603_5%

+5VALW

R518 0_0402_5%SYNCS@R518 0_0402_5%SYNCS@

CAP_INT#32

EC_SMB_ESB_DA32 EC_SMB_ESB_CK32

1

D82

D82 PJDLC05_SOT23-3

PJDLC05_SOT23-3

R133 0_0603_5%

+3VL +5VL

ENECS@

R103 0_0603_5%

SYNCS@

SUSPEND LED

+3VALW

47K

Q29

10K

2

DTA114YKAT146_SOT23-3

1 3

POWER LED

+5VALW

47K

10K

DTA114YKAT146_SOT23-3

1 3

VR_LED 32

1 2

R769 120_0402_5%R769 120_0402_5%

1 2

R771 120_0402_5%R771 120_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

R770 120_0402_5%R770 120_0402_5%

Q42

2

1 2

2 3

12 12

POWER_ON_LED

12

+5VL_CS

D68

2 1

HT-F196BP5_WHITE

3

JCS

C854 10P_0402_50V8JC854 10P_0402_50V8J

1

2

+5VALW_CS

C852 10P_0402_50V8JC852 10P_0402_50V8J

C853 10P_0402_50V8JC853 10P_0402_50V8J

1

2

12

R104

R104 0_0603_5%

0_0603_5%

JCS

1

2

3

4

5

6

7

GND

8

GND

ACES_85201-06051

ACES_85201-06051 @

@

Screw Hole

H2

H_3P0

1

@

H12

H_3P0

1

@

H16

H_3P0N

1

@

MINI CARD-1

PWR_SUSP_LED 32

MINI CARD-2 VGA

D69

2 1

HT-191UD_AMBER_0603

MINI CARD-3

PWR_ON_LED 32

PCB Fedical Mark PAD

Compal Secret Data

2008/09/19 2009/09/19

Compal Secret Data

Deciphered Date

2

H7

H8

H_3P0

1

@

H11

1

H20

H_3P7

1

@

H25

H_4P0

1

@

H27

H_1P2

1

@

401605

H8

H_5P0

H_5P0 @

@

1

H26

H33

H_3P0

H_3P0 @

@

H22

1

H_4P0

1

@

H_1P2

1

@

H_3P8

H_3P8 @

@

H3

H4

H6

H_3P0

1

@

H14

H13

H_3P0

1

@

H36

H_5P0X3P0N

1

@

H34

H32

H_3P8

1

@

H28

H31

H_3P8

1

@

H24

H29

H_3P8

1

@

FD1@FD1

FD2@FD2

@

1

@

1

H_3P0

1

@

H15

H_3P0

1

@

H38

H_11P0X4P0N

1

@

CPU

H_3P8

1

@

H_3P8

1

@

MDC

H_3P8

1

@

FD4@FD4

FD3@FD3

@

1

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

SCHEMATIC MB A4571

Wednesday, September 16, 2009

H10

H9

H_3P0

1

H30

@

1

H19

1

H_4P0

H_4P0 @

@

H_3P8X4P8

H_3P8X4P8 @

@

34 43

H21

of

1

H_3P8X4P8

H_3P8X4P8 @

@

E

A

B

C

D

E

+3VALW TO +3VS

+3VALW +3VS

Q32

8

D

7

D

6

D

1 1

5

D

SI4800BDY_SO8

1

C830

2

4.7U_0805_10V4Z

1

S

2

S

3

S

4

G

0.022U_0402_25V7K

C824

1

C831

2

Vgs=-0V,Id=9A,Rds=18.5mohm

1

2

1U_0402_6.3V4Z

12

R787

R787 330K_0402_5%

330K_0402_5%

61

1

C825 4.7U_0805_10V4ZC825 4.7U_0805_10V4Z

2

R784

1 2

47K_0402_5%

Q35A

2N7002DW-T/R7_SOT363-6

+VSB

SUSP

2

R781

5

470_0805_5%

1 2 3

Q35B

4

+3VALW TO +3V_LAN

+3V_LAN

R508

R508 0_0402_5%

0_0402_5% @

@

1 2

12

+5VALW

R793

R793 100K_0402_5%

100K_0402_5% STAR@

STAR@

1 2

R795 4.7K_0402_5%

R795 4.7K_0402_5% STAR@

STAR@

3

Q39B

5

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 STAR@

STAR@

4

+3VALW

Vgs=-4.5V,Id=3A,Rds<97mohm

Q41

AO3413_SOT23

2

C837

0.1U_0402_16V7K

0.1U_0402_16V7K STAR@

STAR@

1

4.7U_0805_10V4Z

STAR@

2

C840

S

G

D

1 3

1

2

@

2

PJ35

2

JUMP_43X79

JUMP_43X79 @

@

1

C841 1U_0402_6.3V4Z

R791

R791 470_0805_5%

470_0805_5% STAR@

STAR@

1 2

Q39A

61

2N7002DW-T/R7_SOT363-6

2 2

2N7002DW-T/R7_SOT363-6 STAR@

STAR@

WOL_EN#

2

reserve for test

WOL_EN32

R798

100K_0402_5%

STAR@

+3VALW TO +3V_SB

3 3

C842

10U_0805_10V4Z

STAR@

+VSB

R804 20K_0402_5%

R804 20K_0402_5% STAR@

STAR@

SBPWR_EN#

2N7002DW-T/R7_SOT363-6

+3VALW

1

2

12

3

Q46B

Q46B STAR@

STAR@

5

4

PJ36

2

JUMP_43X79@

Q44

STAR@

STAR@ SI3456BDV-T1-E3_TSOP6

SI3456BDV-T1-E3_TSOP6

Vgs=10V,Id=6A,Rds=35mohm

D

6

S

45 2 1

4.7U_0805_10V4Z

G

3

12

R805

R805 200K_0402_5%

200K_0402_5% STAR@

STAR@

112

+3V_SB

1

C843

STAR@

2

1

C845

0.1U_0402_25V6

0.1U_0402_25V6 STAR@

STAR@

2

1U_0402_6.3V4Z

1

C844

STAR@

2

Q46A

STAR@

R803

R803 470_0805_5%

470_0805_5% STAR@

STAR@

1 2 61

SBPWR_EN#

2

2N7002DW-T/R7_SOT363-6

+5VALW TO +5VS

+5VALW

1

2

4.7U_0805_10V4Z

2N7002DW-T/R7_SOT363-6

+3V_LAN

1

STAR@

2

Q33

S

D

S

D

S

D

G

D

SI4800BDY_SO8

1 2 3 4

1

C833

2

0.01U_0402_25V7K

8 7 6 5

C832

+3VALW TO +3V_WLAN

+3V_WLAN

R790

R790 470_0805_5%

470_0805_5% STAR@

STAR@

1 2 61

Q38A

STAR@

2

reserve for test

STB_WLAN32

SBPWR_EN32

+5VS

C826

1U_0402_6.3V4Z

12

R788

R788 200K_0402_5%

200K_0402_5%

STB_WLAN#

R797

STAR@

100K_0402_5%

SBPWR_EN#23

reserve for test

4.7U_0805_10V4Z

1

C827

2

1 2

61

100K_0402_5%

STAR@

R513

R513 0_0402_5%

0_0402_5% @

@

1 2

5

12

100K_0402_5%

1

2

R785

20K_0402_5%

Q36A

2N7002DW-T/R7_SOT363-6

R792

STAR@

+VSB

SUSP

2

+5VALW

1 2

R794 4.7K_0402_5%

R794 4.7K_0402_5% STAR@

STAR@

3

Q38B

Q38B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 STAR@

STAR@

4

SBPWR_EN#

R507

R507 0_0402_5%

0_0402_5% @

@

1 2

2

G

12

R806

+5VALW

R782

1 2 3

5

4

2

1

R800

R800 100K_0402_5%

100K_0402_5% STAR@

STAR@

1 2

13

D

Q45

Q45 2N7002_SOT23-3

2N7002_SOT23-3 STAR@

STAR@

S

470_0805_5%

Q36B

AO3413_SOT23

STAR@

2

C836

0.1U_0402_16V7K

0.1U_0402_16V7K STAR@

STAR@

4.7U_0805_10V4Z

Vgs=10V,Id=14.5A,Rds=6mohm

+3VALW

Q40

S

G

D

1 3

1

C838

@

2

+1.8V to +1.8VS

+1.8V

Q34

8 7 6 5

1

FDS6676AS

C834

C834 PM@

PM@

2

4.7U_0805_10V4Z

2

PJ34

2

JUMP_43X79

JUMP_43X79 @

@

1

S

D

2

S

D

3

S

D

4

G

D

SI4856ADY_SO8

SI4856ADY_SO8 PM@

PM@

C835

PM@

+3V_WLAN

1

C839

C839 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

STAR@

2N7002DW-T/R7_SOT363-6

another at page25

+1.8VS

C828

PM@

1U_0402_6.3V4Z

1

2

0.1U_0402_25V6

Q21B

4.7U_0805_10V4Z

1

2

12

R789

R789 330K_0402_5%

330K_0402_5% PM@

PM@

SUSP41

SUSP#17,25,29,32,40

R799

10K_0402_5%

+1.5VS +0.9VS

R801

R801 470_0805_5%

470_0805_5%

1 2 3

SUSP SUSP

5

4

1

C829

C829 PM@

PM@

2

R786

1 2

47K_0402_5%

61

PM@

Q37A

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 PM@

PM@

SUSP

5

1 2

+VSB

SUSP

2

+5VALW

R796

R796 10K_0402_5%

10K_0402_5%

1 2 3

Q28B

Q28B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

another at page34

4

R802

470_0805_5%

1 2 3

Q30B

Q30B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

5

another at page34

4

R783

R783 PM@

PM@

5

470_0805_5%

1 2 3

Q37B

Q37B PM@

PM@

4

4 4

Security Classification

2008/09/19 2009/09/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

SCHEMATIC MB A4571

401605

Wednesday, September 16, 2009

E

of

35 43

of

35 43

of

35 43

E

A

PL1

SMB3025500YA_2P

PF1

DC301001M80

PJP1

1

SINGA_2DW-0005-B03@

+CHGRTC

+

2

+

3

-

4

-

1 1

2 2

PR15

560_0603_5%

1 2

DC_IN_S1

51_ON#34

PF1

10A_125V_451010MRL

BATT+

RLS4148_LL34-2

CHGRTCP

PR16

560_0603_5%

1 2

21

PD4

PR11

200_0603_5%

1 2

100K_0402_1%

1 2

PR13

22K_0402_1%

RTCVREF

3.3V

12

DC_IN_S2

12

PC1

PC1 1000P_0402_50V7K

1000P_0402_50V7K

12

PR12

PU2 G920AT24U_SOT89-3PU2 G920AT24U_SOT89-3

3

OUT

PC9

PC9 10U_0805_10V4Z

10U_0805_10V4Z

N1

12

PC7

0.22U_1206_25V7K

GND

1

SMB3025500YA_2P

1 2

12

PC2

100P_0402_50V8J

PQ1

TP0610K-T1-E3_SOT23-3

12

PR14

PR14 200_0603_5%

200_0603_5%

N2

2

IN

12

PC10

1U_0805_25V4Z

2

PR9

68_1206_5%

13

B

12

PC3

PC3 1000P_0402_50V7K

1000P_0402_50V7K

VIN

PD3

PD3 RLS4148_LL34-2

RLS4148_LL34-2

1 2

12

PC8

0.1U_0603_25V7K

12

PR10

PR10 68_1206_5%

68_1206_5%

VIN

12

PC4

PC4 100P_0402_50V8J

100P_0402_50V8J

VS

ACIN22,32,34

RTC Battery

PBJ1

-+

MAXEL_ML1220T10@

SP093MX0000

12

+RTCBATT

C

PR4

0_0402_1%

PR7

10K_0402_1%

+RTCBATT

12

PD2

PD2 GLZ4.3B_LL34-2

GLZ4.3B_LL34-2

PR1

1M_0402_1%

1 2

VS

PR5

PR2

1 2

10K_0402_1%

8

P

1

0

G

4

PU1A

3

+

2

-

LM358DT_SO8

PR5 22K_0402_1%

22K_0402_1%

1 2

PR8

10K_0402_1%

Vin Detector

High 18.384 17.901 17.430 Low 17.728 17.257 16.976

12

PC5

0.1U_0603_25V7K

VIN

12

D

PR3

84.5K_0402_1%

12

PR6

20K_0402_1%

RTCVREF

PC6

PC6 1000P_0402_50V7K

1000P_0402_50V7K

3 3

PJ3

PJ2

PJ1

+3VALWP +3VALW

+5VALWP

+VSBP +VSB

(120mA,40mils ,Via NO.= 1)

2

112

JUMP_43X118@

(5A,200mils ,Via NO.= 10)

JUMP_43X118@

PJ5

2

112

JUMP_43X118@

PJ7

2

112

JUMP_43X39@

+5VALW

+1.8VP +1.8V

(12A,480mils ,Via NO.= 24)

+1.05VSP +1.05VS

(10A,400mils ,Via NO.=20)

PJ10

2

112

JUMP_43X79@

4 4

(2A,80mils ,Via NO.= 4)

JUMP_43X79@

A

+0.9VS+0.9VSP

(2.0A,80mils ,Via NO.=4)

PJ2

2

112

JUMP_43X118@

JUMP_43X118@ PJ4

PJ4

2

112

JUMP_43X118@

PJ8

2

112

JUMP_43X118@

JUMP_43X118@ PJ9

PJ9

2

112

JUMP_43X118@

PJ11

2

112

JUMP_43X79@

+1.5VS+1.5VSP

B

VL +5VL

(100mA,40mils ,Via NO.= 2)

+3VLP +3VL

(100mA,40mils ,Via NO.= 2)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PJ3

2

112

JUMP_43X39@

PJ6

2

112

JUMP_43X39@

Compal Secret Data

2008/09/19 2009/09/19

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

D

36 43Wednesday, September 16, 2009

E

of

A

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 92 degree C Recovery at 56 degree C

1 1

PJP2

10

GND

11

GND

12

GND

13

GND

OCTEK_BTJ-09HA1G@

2 2

1

2

3

4

5

6

7

8

9

BATT_S1

EC_SMDA EC_SMCA

PR23

100_0402_1%

1 2

PF2

15A_65V_451015MRL

PR24

PR24 100_0402_1%

100_0402_1%

1 2

12

21

12

PR28

PR28 1K_0402_1%

1K_0402_1%

1 2

PR17

1K_0402_1%

PR20

PR20 1K_0402_1%

1K_0402_1%

1 2

47K_0402_1%

PR25

6.49K_0402_1%

6.49K_0402_1% 12

PR18

VMB

+3VLP

12

PC11

PC11 1000P_0402_50V7K

1000P_0402_50V7K

+3VLP

BATT_TEMPA 32

EC_SMB_DA1 19,32 EC_SMB_CK1 19,32

PL2

SMB3025500YA_2P

1 2

BATT+

12

PC12

0.01U_0402_25V7K

VL

12

PH1

100K_0603_1%_TH11-4H104FT

PH1

12

PC14

0.22U_0805_16V7K

0.1U_0603_25V7K

12

PR26

15.4K_0402_1%

13.7K_0402_1%

13.7K_0402_1% 1 2

PH2 near main Battery CONN :

PR22

PC13

TM_REF1

12

PC15

1000P_0402_50V7K

12

PR29

PR29 100K_0402_1%

100K_0402_1%

VL

47K_0402_1%

1 2

8

PU3A

3

P

+

2

-

G

LM393DG_SO8

4

PR27

100K_0402_1%

12

PR21

O

13

D

PQ2

PQ2 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

13

D

PQ3

PQ3 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

ENTRIP1 21,39

ENTRIP2 21,39

VL

PR19

PR19 47K_0402_1%

47K_0402_1%

1 2

1

RLS4148_LL34-2

VL

PD5

12

2

G

2

G

BAT. thermal protection at 90 degree C Recovery at 53 degree C

VLVL

PQ4

TP0610K-T1-E3_SOT23-3

13

2

B

VL

1 2

B+

PR37

PR37 0_0402_5%

0_0402_5%

1 2

12

PC19

13

D

2

G

S

0.1U_0402_16V7K

@

12

PR32

PR34

22K_0402_1%

1 2

PQ5

PQ5 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

12

PC16

100K_0402_1%

@

0.22U_1206_25V7K

3 3

PR36

100K_0402_1%

POK39

4 4

A

+VSBP

12

PC17

0.1U_0603_25V7K

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

100K_0603_1%_TH11-4H104FT

PC18

0.22U_0805_16V7K

Compal Secret Data

2008/09/19 2009/09/19

Compal Secret Data

12

PH2

12

PR35

16.9K_0402_1%

Deciphered Date

C

PR33

13.7K_0402_1%

13.7K_0402_1% 1 2

TM_REF1

47K_0402_1%

1 2

5

+

6

-

PR30

PR30 47K_0402_1%

PR31

8

P

G

4

47K_0402_1%

1 2

PU3B

7

O

LM393DG_SO8

Title

Size Document Number Rev

Date: Sheet

12

PD6

RLS4148_LL34-2

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

D

E

of

37 43Wednesday, September 16, 2009

of

37 43Wednesday, September 16, 2009

of

37 43Wednesday, September 16, 2009

A

PQ6

8 7

5

PR43

PR43 340K_0402_1%

340K_0402_1%

1 2

PR47

54.9K_0402_1%

1 2

PR49

PR49 340K_0402_1%

340K_0402_1%

PR50

54.9K_0402_1%

13

D

PQ13

PQ13 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

PQ6 AO4407_SO8

AO4407_SO8

100K_0402_1%

0.1U_0603_25V7K

1 2 36

4

1 2

ACDET

SI2301BDS-T1-E3_SOT23-3

PR51

1 2

PC41

ACGOOD#

VIN

PR39

3.3_1210_5%

1 2

PR41

3.3_1210_5%

2.2U_0805_25V6K

100K_0402_1%

1 2

PC43

3.3_1210_5%

PR54

PC29

VREF

12

PR58

PR58 340K_0402_1%

340K_0402_1%

1 2 12

VREF

2

G

1 2

PC21

0.01U_0603_50V7K

1 2

OVPSET

1 2

12

PR53

PR53 200K_0402_1%

200K_0402_1%

2

G

13

D

PQ14

PQ14 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

1 1

2 2

ACOFF

3 3

0.1U_0402_16V7K

1 2 3 6

12

PR42

PC22

100K_0402_1%

0.01U_0402_25V7K

VREF

2

12

ACSET

PQ7

PQ7 AO4407_SO8

AO4407_SO8

4

71.5K_0402_1%

71.5K_0402_1% 1 2

0.01U_0402_25V7K@

PQ12

1 3

75W,Iadapter=3.947A,PR38=0.015ohm,PR46=100K,PR48=120K,CP=3.63A 90W,Iadapter=4.736A,PR38=0.015ohm,PR46=54.9K,PR48=100K,CP=4.357A 120W,Iadapter=6.316A,PR38=0.01ohm,PR46=71.5K,PR48=100K,CP=5.81A

CHGVADJ32

VMB

PC46

0.01U_0402_25V7K

12

PR62

340K_0402_1%

12

PR64

499K_0402_1%

12

PR66

105K_0402_1%

12

PC47

0.01U_0402_25V7K

VS

12

4 4

BATT_OVP32

PR65

10K_0402_1%

1 2

A

8

PU1B

5

P

+

7

0

6

-

G

LM358DT_SO8

4

PR46

PC34

B

1

8 7

2

5

0.1U_0402_16V7K

12

PC27

0.1U_0603_25V7K

12

PC40

1U_0603_10V6K

RTCVREF

PR52

100K_0402_1%

1 2

PR60

210K_0402_1%

1 2

B

PR38 0.01_2512_1%

PC26

1 2

ACSET

12

PR48

PR48 100K_0402_1%

100K_0402_1%

1 2

0.47U_0603_16V7K

VREF

12

VADJ

/BATDRV

REGN

C

B+

4 3

CHGEN#

12

@

PC37

12

PR61

PR61 499K_0402_1%

499K_0402_1%

PC30

0.1U_0603_25V7K

10

11

12

13

14

PR59

PR59 0_0402_5%@

0_0402_5%@

VADJ

PU5

1

CHGEN

2

ACN

3

ACP

4

ACDRV

5

ACDET

6

ACSET

7

ACOP

8

OVPSET

9

AGND

VREF

VDAC

VADJ

ACGOOD

BATDRV

BQ24751ARHDR_QFN28_5X5

LODRV

LEARN

SRSET

IADAPT

CHGVADJ Pre Cell

3.28V 4.35V

PVCC

BTST

HIDRV

PH

REGN

PGND

CELLS

SRP

SRN

BAT

TP

28

PR44

0_0603_5%

1 2

27

26

25

PD7

RLS4148_LL34-2

REGN

24

12

PC35

PC35 1U_0603_10V6K

1U_0603_10V6K

23

22

21

CELLS

20

19 18 17

12

29

16

1 2

15

PR56

10_0603_5%

PC45

100P_0402_50V8J

2

PC28

0.1U_0805_25V7K

1 2

12

ACOFF 32

PC42

0.1U_0603_25V7K

12

PJ14

112

JUMP_43X118@

1 2

PC31

0.1U_0603_25V7K

12

PR57

PR57 100K_0402_1%

100K_0402_1%

CHG_B+

1 2

PC23

578

3 6

241

578

3 6

241

49.9K_0402_1%

12

PC44

0.01U_0402_25V7K

@

PC23

PQ10

PQ10 AO4466_SO8

AO4466_SO8

PL3

10UH_SIL1045RA-100PF_4.5A_30%

1 2

PQ11

PQ11 AO4466_SO8

AO4466_SO8

PR55

12

IREF Current

2.968V 3A

1.484V 1.5A

0V 4V

要接到

CHGVADJ

EC DA pin

LI-3S :13.5V----BATT-OVP=1.5V BATT-OVP=0.111*BATT+

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

Compal Secret Data

Deciphered Date

C

1 2

PC24

4.7U_1206_25V6K

IREF 32

PC20

0.01U_0402_25V7K

/BATDRV

PR45

0.02_2512_1%

0.02_2512_1% 1 2

1 2

0.01U_0402_25V7K

PC36

4 3

1 2

PC25

12

PC32

10U_1206_25V6M

12

PC38

0.1U_0603_25V7K

4.7U_1206_25V6K

0.1U_0402_16V7K

FSTCHG32

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

1 2

PR40

100K_0402_1%

12

401605

D

12

PC39

0.1U_0603_25V7K

@

VREF

1 2

13

D

2

G

S

D

PQ8

PQ8 AO4407_SO8

AO4407_SO8

1 2 3 6

4

PQ9

PQ9 AO4407_SO8

AO4407_SO8

1 2 3 6

4

12

PR63

PR63 100K_0402_1%

100K_0402_1%

CHGEN#

PQ15

PQ15 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

38 43Wednesday, September 16, 2009

8 7

5

8 7

5

PC33

10U_1206_25V6M

of

BATT+

E

5

4

3

2

1

2VREF_51125

D D

PR67

13K_0402_1%

1 2

PR69

150K_0402_1%

BST_3V UG_3V LX_3V LG_3V

PR78

100K_0402_5%

2VREF_51125

PR69

20K_0402_1%

1 2

PR71

1 2

PU6

25

P PAD

7

VO2

8

VREG3

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

12

B++

PJ15

2

B+

C C

B B

112

JUMP_43X118@

+3VALWP

12

PC49

2200P_0402_50V7K

12

SSM3K7002FU_SC70-3

PC130

0.1U_0402_16V7K

220U_D2_4VM

PQ20

12

PC50

10U_1206_25V6M

4.7U_LF919AS-4R7M-P3_5.2A_20%

1 2

1

+

PC56

2

13

D

2

G

S

PL4

12

PR75

@

4.7_1206_5%

12

PC58 @ PC58

@

680P_0603_50V8J

13

D

2

G

S

578

PQ16

PQ16 AO4466_SO8

AO4466_SO8

3 6

241

578

PQ18

PQ18 AO4712_SO8

AO4712_SO8

3 6

241

ENTRIP2 21,37ENTRIP1 21,37

PQ21

PQ21 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

PC134

12

0.1U_0402_16V7K

12

PC53

4.7U_0805_10V6K

1 2

PC54

0.1U_0402_16V7K

B+

+3VLP

PR73

1 2

0_0603_1%

PR77

499K_0402_1%

1 2

PC48

0.22U_0603_10V7K

ENTRIP2

6

5

VFB2

ENTRIP2

SKIPSEL

EN0

14

13

1 2

PR79

0_0402_5%@

B++

12

PR68

30K_0402_1%

1 2

PR70

20K_0402_1%

4

15

TONSEL

GND

3

2

VREF

VIN

17

16

12

PC61

0.1U_0603_25V7K

20K_0402_1%

1 2

PR72

150K_0402_1%

ENTRIP1

1 2

1

VFB1

ENTRIP1

24

VO1

23

PGOOD

22

VBST1

21

DRVH1

20

LL1

19

DRVL1

VREG5

VCLK

TPS51125RGER_QFN24_4X4

18

PC60

4.7U_0805_10V6K

12

BST_5V UG_5V LX_5V LG_5V

VL

PC135

0.1U_0402_16V7K

PR74

0_0603_1%

1 2

B++

12

PC51

2200P_0402_50V7K

POK 37

PC55

0.1U_0402_16V7K

1 2

12

PC52

10U_1206_25V6M

AO4466_SO8

AO4712_SO8

PQ17

PQ19

578

3 6

241

4.7U_LF919AS-4R7M-P3_5.2A_20%

1 2

578

12

PR76

@

12

3 6

241

PC59 @ PC59

@

PL5

4.7_1206_5%

4.7_1206_5% PC57

PC57

680P_0603_50V8J

220U_6.3V_M

+5VALWP

1

12

+

PC129

2

PC129

0.1U_0402_16V7K

VL

100K_0402_1%

1 2

VS

PR81

100K_0402_1%

A A

100K_0402_1%

5

PR80

12

PR82

49.9K_0402_1%

12

2

G

PC62 @ PC62

@

0.01U_0402_16V7K

13

D

PQ22

PQ22 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

Security Classification

2008/09/19 2009/09/19

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

39 43Wednesday, September 16, 2009

1

E

of

A

B

C

D

1 1

+1.5VSP

51124_B+

12

PC63

PC64

4.7U_1206_25V6K

2 2

+1.5VSP

12

PC131

0.1U_0402_16V7K

3 3

1.8U_D104C-919AS-1R8N_9.5A_30%

1

12

+

PC73

2

220U_D2_4VM

1 2

PC71

4.7U_0805_6.3V6K

PC65

4.7U_1206_25V6K

4.7U_1206_25V6K 2200P_0402_50V7K

2200P_0402_50V7K

PL6

12

PR90

@

4.7_1206_5%

4.7_1206_5% 12

PC75 @ PC75

@

680P_0603_50V8J

241

578

3 6

578

3 6

PQ23

AO4466_SO8

PQ25

PQ25 AO4712_SO8

AO4712_SO8

SUSP#

PC69

0.1U_0402_16V7K

PR94

0_0402_5%

0.1U_0402_16V7K@

0_0603_1%

12

PC80

12

PR88

PR83

75K_0402_1%

1 2

12

BST_1.5V UG_1.5V

LX_1.5V

1U_0603_10V6K

75K_0402_1%

1 2

PU7

25

P PAD

7

PGOOD2

8

EN2

9

VBST2

10

DR VH2

11

LL2

12

DR VL2

PR93

13.7K_0402_1%

13.7K_0402_1% 1 2

PC77

PR84

PR87

0_0402_5%

1 2

3.3_0402_5%

12

6

VO2

PGND2

13

PR95

5

VFB2

TRIP2

14

1 2

4

TONSEL

V5FILT

15

3

GND

V5IN

16

12

2

17

12

PC78

4.7U_0805_10V6K

PR85

75K_0402_1%

1

VO1

VFB1

PGOOD1

EN1

VBST1

DR VH1

LL1

DR VL1

TRIP1

PGND1

TPS51124RGER_QFN24_4x4

18

PR92

13.7K_0402_1%

+5VALW

12

24 23 22 21 20 19

PR86

29.4K_0402_1%

BST_1.05V UG_1.05V

LX_1.05V

LG_1.05VLG_1.5V

12

1 2

12

PC79

0.1U_0402_16V7K@

+1.05VSP

PR89

0_0603_1%

PR96

0_0402_5%

0.1U_0402_16V7K

12

AO4466_SO8

PC70

1 2

FDS6670AS_NL_SO8

SUSP# 17,25,29,32,35

PQ24

PQ26

51124_B+

578

3 6

241

D6D5D7D

4

G

S

3

2

PJ16

2

112

JUMP_43X118@

12

PC66

PC67

4.7U_1206_25V6K

PL7

1.8U_D104C-919AS-1R8N_9.5A_30%

1.8U_D104C-919AS-1R8N_9.5A_30% 1 2

8

12

PR91

@

4.7_1206_5%

12

S

1

PC76 @ PC76

@

680P_0603_50V8J

B+

12

PC68

2200P_0402_50V7K

PC72

4.7U_0805_6.3V6K

1 2

+1.05VSP

1

+

PC74

PC74 220U_6.3V_M

220U_6.3V_M

2

12

+1.05VSP

PC132

0.1U_0402_16V7K

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

D

40 43Wednesday, September 16, 2009

of

E

5

4

3

2

1

D D

578

PQ27

SI4686DY-T1-E3_SO8

0.1U_0603_25V7K

PR105

PR107

SI4686DY-T1-E3_SO8

PC84

1 2

+5VALW

SI4634DY-T1-E3_SO8

12

PC89

4.7U_0805_10V6K

12

PC92

0.1U_0402_16V7K

3 6

241

786

5

PQ28

4

123

PU9

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TRL_SO8

12

PC94

12

10U_0805_6.3V6M

PR97

255K_0402_1%

PR98

0_0402_5%

SYSON25,32

+5VALW

C C

B B

1 2

PR100

422_0603_1%

422_0603_1% 1 2

1U_0603_10V6K

PC86

12

PC83

0.1U_0402_16V7K

@

12

PC88

47P_0402_50V8J@

1 2

PR103

28.7K_0402_1%

28.7K_0402_1% 1 2

12

PR104

20.5K_0402_1%

SUSP35

1 2

15

1

PU8

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

EN_PSV

GND7PGND

0_0402_5%

1 2

0.1U_0402_16V7K@

TP

8

4.7U_0805_6.3V6K

PR106

PC93

PR99

0_0603_1%

BST_1.8V

1 2

14

VBST

13

DRVH

12

LL

11

TRIP

10

V5DRV

9

DRVL

TPS51117RGYR_QFN14_3.5x3.5

PC90

12

2

G

1 2

10K_0402_1%

DL_1.8V

+1.8V

1

2

12

13

D

S

BST_1.8V-1 DH_1.8V LX_1.8V

PR101

PJ18

PJ18 JUMP_43X79@

JUMP_43X79@

1K_0402_1%

PQ29

PQ29 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

51117_B+

12

PC81

4.7U_1206_25V6K

PL8

1.0UH_PCMC104T-1R0MN_20A_20%

1.0UH_PCMC104T-1R0MN_20A_20% 1 2

12

PR102

4.7_1206_5%@

12

PC87

680P_0603_50V7K

@

6 5

NC

7

NC

8

NC

9

TP

+0.9VSP

PC136

0.1U_0402_16V7K

2

JUMP_43X118@

PC82

4.7U_1206_25V6K

+3VALW

12

PC91

PC91 1U_0603_6.3V6M

1U_0603_6.3V6M

PJ17

112

1

+

PC85

PC85 220U_D2_4VM

220U_D2_4VM

2

B+

+1.8VP

12

PC133

0.1U_0402_16V7K

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

41 43Wednesday, September 16, 2009

1

E

of

5

D D

PR110 0_0402_5%PR110 0_0402_5%

PM_DPRSLPVR8,22

H_DPRSTP#5,8,21

CLK_ENABLE#

12

1 2

12

PR119 0_0402_5%PR119 0_0402_5%

12

PR121

PC122 0.018U_0603_50V7JPC122 0.018U_0603_50V7J

12

PC123

0.018U_0603_50V7J

PR153 1K_0402_1%PR153 1K_0402_1%

0.22U_0603_10V7K

+3VS

PR123

499_0402_1%

1 2

VGATE8,22,32

H_PSI#5

PGD_IN

C C

B B

PR131 4.22K_0402_1%@PR131 4.22K_0402_1%@

VR_TT#

VCCSENSE6

+CPU_CORE

PR148 20_0402_5%PR148 20_0402_5%

PR126 147K_0402_1%PR126 147K_0402_1%

1 2

100K_0603_1%_TH11-4H104FT@

1 2

PC1100.015U_0402_16V7K@ PC1100.015U_0402_16V7K@

PR132 13K_0402_1%PR132 13K_0402_1%

PR139 97.6K_0402_1%PR139 97.6K_0402_1%

1 2

PC117 220P_0402_50V7KPC117 220P_0402_50V7K 255_0402_1%

255_0402_1%

1 2

PR146 1K_0402_1%PR146 1K_0402_1%

1 2

VSSSENSE6

PH3

PC114 1000P_0402_50V7KPC114 1000P_0402_50V7K

1 2

PR144

1 2

PR130 0_0402_5%@PR130 0_0402_5%@

1 2

PC1110.022U_0603_25V7K PC1110.022U_0603_25V7K

1 2

1 2 1 2

PC1131000P_0402_50V7K PC1131000P_0402_50V7K

PR135 6.81K_0402_1%PR135 6.81K_0402_1%

1 2

PC116 470P_0402_50V7KPC116 470P_0402_50V7K

PC119 1000P_0402_50V7KPC119 1000P_0402_50V7K

1 2

PR147 0_0402_5%PR147 0_0402_5%

PR151

20_0402_5%

VCC_PRM

PR109 0_0402_5%PR109 0_0402_5%

PR111 0_0402_5%PR111 0_0402_5%

1 2

12

PC104

1U_0603_6.3V6M

1.91K_0402_1%

1 2 3 4 5 6 7 8

9 10 11 12

PR140

@

0_0402_5%

1 2

PR150 0_0402_5%PR150 0_0402_5%

PC125 180P_0402_50V8JPC125 180P_0402_50V8J

1 2

PC127

1 2

48

49

3V3

GND

PGOOD PSI# PMON RBIAS VR_TT# NTC SOFT OCSET VW COMP FB FB2

VDIFF13VSEN14RTN15DROOP16DFB17VO18VSUM19VIN20GND21VDD22ISEN223ISEN1

12

PR141

PR141 1K_0402_5%

1K_0402_5%

1 2

PR154 4.42K_0402_1%PR154 4.42K_0402_1%

4

VR_ON

PR112

12

0_0402_5%

45

44

46

47

VR_ON

CLK_EN#

DPRSTP#

DPRSLPVR

ISL6262ACRZ-T_QFN48_7X7

12

PC124

0.018U_0603_50V7J

PC126 0.1U_0402_16V7KPC126 0.1U_0402_16V7K

1 2

PC128 0.22U_0402_6.3V6KPC128 0.22U_0402_6.3V6K

12

6

32

CPU_VID46CPU_VID3

CPU_VID56CPU_VID26CPU_VID16CPU_VID0

CPU_VID6

PR114

PR115

PR120

PR116

12

0_0402_5%

12

PR152

PR116

PR117

12

0_0402_5%

12

PC118

PC118 1U_0402_6.3V6K

1U_0402_6.3V6K

10_0603_5%

1 2

PC121

0.1U_0603_25V7K

12

PR149

12

11K_0402_1%

1 2

PR113

PR113 12

0_0402_5%

43

12

6

PR118

12

0_0402_5%

BOOT_CPU1

VID037VID138VID239VID340VID441VID542VID6

36

BOOT1 UGATE1 PHASE1

PGND1

LGATE1

PVCC

LGATE2

PGND2 PHASE2 UGATE2

BOOT2

24

1 2

PR137 1_0603_5%PR137 1_0603_5%

PR145

VSUM

2.61K_0402_1%

PH4

PH4 10KB_0603_5%_ERTJ1VR103J

10KB_0603_5%_ERTJ1VR103J

UGATE_CPU1

35

PHASE_CPU1

34 33

LGATE_CPU1

32 31

LGATE_CPU2

30 29

PHASE_CPU2

28

UGATE_CPU2

27

BOOT_CPU2

26

PR133

2.2_0603_1%

25

NC

PU10

ISEN1 ISEN2

+5VS

+CPU_B+

2.2_0603_1%

1 2

12

PC101

PC96

0.022U_0402_16V7K

0.22U_0603_10V7K

PR122

1 2

SI4634DY-T1-E3_SO8

1 2

PC112

0.22U_0603_10V7K

3

+5VS

PR108

PR108 1_0603_5%

1_0603_5%

1 2

12

2.2U_0603_6.3V6K

PC105

1 2

PQ31

SI4634DY-T1-E3_SO8

PQ34

2

+CPU_B+

12

PC95

PC97

10U_1206_25V6M

PQ30

PQ30 SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

3 5

241

5

4

5

D8D7D6D

S1S2S3G

D8D7D6D

S1S2S3G

PQ32

4

SI4634DY-T1-E3_SO8

3 5

241

5

D8D7D6D

S1S2S3G

4

SI4634DY-T1-E3_SO8

PQ35

D8D7D6D

S1S2S3G

5

4

10U_1206_25V6M

12

PR124

@PR124

@

4.7_1206_5%

12

PC106

@PC106

@ 680P_0603_50V8J

680P_0603_50V8J

PQ33

PQ33 SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

12

PR134

@PR134

@

4.7_1206_5%

12

PC115

@PC115

@

680P_0603_50V8J

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20% 1

12

PR125

VSUM

12

PC108

10U_1206_25V6M

PR136

2

12

PR127

3.65K_0805_1%

10K_0402_1%

ISEN1

0.22U_0603_10V7K

12

PC109

10U_1206_25V6M

0.36UH_PCMC104T-R36MN1R17_30A_20%

12

PR138

3.65K_0805_1%

10K_0402_1%

VSUM

1

PC98

2

220U_25V_M

PL10

4 3

PR129 0_0603_5%@PR129 0_0603_5%@

1 2

PC107

1 2

PL11

1 2

12

PR143 0_0603_5%@PR143 0_0603_5%@

1 2

PC120

1 2

0.22U_0603_10V7K

0.22U_0603_10V7K ISEN2

+

+CPU_B+

4 3

PC99

12

1_0402_5%

VCC_PRM

12

VCC_PRM

PL9

HCB4532KF-800T90_1812

1 2

1

+

0.01U_0402_25V7K

2

220U_25V_M@

PR128

PR142

PR142 1_0402_5%

1_0402_5%

PC100

1

12

+CPU_CORE

12

PC102

680P_0603_50V8J

12

PC103

3300P_0402_50V7K

B+

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/19 2009/09/19

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

42 43Wednesday, September 16, 2009

1

E

of

5

4

3

2

1

PIR (Product Improve Record)

KTKAA LA-4571P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 TO 0.2

NO DATE PAGE MODIFICATION LIST PURPOSE

--------------------------------------------------------------------------------------------------------------------1 6/18 34 change Q29.3 to pull up with +3VALW and R770, R720 to 120ohm to solve suspend led issue. 2 6/18 27 exchange J3GSIM pin2 and pin3 link to error pin definition. 3 6/18 27 change CM15,CM16 to 10P and un-mount RM1 and Cm14. for customer request.

D D

4 6/24 18 add C849, C850 for EMI request. for EMI request. 5 6/24 11 add 220u to +1.8V with C78. reserve for test. 6 6/24 24 add 220u to +USB_VCCB with C79. reserve for test. 7 6/24 29 add C851 to SPDIF. for EMI request. 8 6/24 27 link JNAND.39,41 to +3VS,and 39,43 pin link to GND this is standard pin define 9 6/25 19 change U37 power from +HDMI_5V_OUT to +5VL for customer request and follow Toshiba design guide with CEC. 10 6/25 27 reserve some circuit for change Mini card 1 and 2 reserve for GPS issue 11 6/26 30 change CA29~CA32 from 0.47u to 0.033u set high pass frequency to 68Hz REVISION CHANGE: 0.2 TO 0.3

--------------------------------------------------------------------------------------------------------------------1 7/19 34 add R506 and Q52 for Wimax LED control reserve Wimax LED control to avoid MINI card module damage. 2 7/19 35 change R788,R805 from 330K to 200K reduce the voltage on the Vgs of MOS as AC mode. 3 7/19 35 mount R507 and un-mount Q45,R800,R806 use another control for +5V_SB 4 7/19 23 mount Q16,R593,R594 and un-mount Q12 use another control for +5V_SB 5 7/22 35 add R508,R513 reserve for tset 5 7/22 31 add D77,D78 on 1394 port reserve for EMI request 6 7/22 26 exchange JFEL all pin to solve the cable reverse issue 7 7/24 3 delete XDP conn and related compoments to improve ESD issue 8 7/24 34 add Q42 and link to EC U43.72 to solve the power on LED need 2.1S will be light after press power button 9 7/24 31 add Q54,R129,R220,R222,D81 and link to U9.B10,U9.AE8 reserve D3E mode as JMB380 10 7/24 28 add R398,R399,R264 for LAN and link to U9.AH24,U9.C21 reserve LAN saving mode 11 7/24 32 add R757,R130,D79 to avoid glitch issue when KB926 power on

C C

12 7/24 34 add D80 reserve for ESD request 13 7/24 26 add L26,R181,R182 on camera conn. reserve for EMI request 14 7/24 34 add R514~R517,D5,D6 reserve for LED type option 15 7/25 34 add R97,R103,R518,C852~C854,D82 on CS/B conn reserve for ESD request 16 7/25 34 add R105,R106 on Touch/B conn reserve for ESD request 17 7/25 26 add R110,R114 on Finger/B conn reserve for ESD request 18 7/25 26 add R131,D83 on Felica conn reserve for ESD request 19 7/25 28 change LAN footprint to "TYCO_2068888-1_12P-T" for ME team request 20 7/25 31 add R132 and separate support pin of 1394,USB,eSATA to IOGND for ESD request 21 7/25 18 change C680~C685 to 2.2pF for customer request 22 7/25 26 change R722 form 0ohm to 100Kohm it's to let the power on first then reset# will be high later to meet spec 23 7/25 34 mount D5,D6,R515,R517 and un-mount D71,D73,R514,R516 change logo LED to high illumination REVISION CHANGE: 0.3 TO 1.0

--------------------------------------------------------------------------------------------------------------------1 8/10 27 exchange QM1 Pin2,3 2 8/10 27 add R820 and link to both JGPS.16 and J3GSIM.5 reserve 3G SMI card VPP function. 3 8/10 27 link JGPS.24 to +3V_WLAN,link JNAND.24 to +3VS add more power pin for standard definition 4 8/10 19 change D8,D53 from RB491D to RB161M reduce the forward voltage for HDMI logo Spec. 5 8/10 30 change CA29~CA32 form 0603 type to 0402 no 0603 type part in Compal Hub and improve the audio perfermance 6 8/10 34 change H19,H21 from 4P8X3P8 to 3P8X4P8 for Layout team request 7 8/10 26 add R821 and link +5VS to +CAM_VDD change camera power to +5VS for energy star 8 8/11 11 change C72,C73,C78,C79,C146 Footprint to C_PXC6P3VC220MF60 for DFX request to easy check when SMT

B B

9 8/11 34 delete R772 2008 no amber LED on power button 10 8/18 4 change R4~R7 from 49.9ohm to 54.9ohm follow Intel design guide when no XDP schematic 11 8/18 19 Change RV67 from 10K to 2.2Kohm to solve measure HDMI logo can't be detected with test implement 12 8/18 19 use common choke(L9~L12) to replace 0ohm solve EMI issue 13 8/18 18 change L18~L20 to high speed bead to solve the word is blurred when CRT mode 14 8/18 21 mount EMI SSIC and related conpomemts for Bit_CLK solve EMI issue 15 8/18 33 mount C793,C794 for EMI request 16 8/18 34 change C831 from 0.01u to 0.022u to solve VGA/B external thermal sensor can't normal work when VGA chip is very high temp. 17 8/31 31 change D81 to 0805_0 enable D3E mode 18 8/31 32 change R130 form 10K to 2.2K expand PM_PWROK voltage from 2.4V to 3.05V 19 9/5 30 mount CA40 and CA41 to 120P for EMI request 20 9/5 8 change R62 BOM config from GM@ to IHDMI@ set right strap pin when no IHDMI SKU 21 9/8 18 change R674 from 10K to 0ohm solve some CRT device will appear most resolution when CRT only mode REVISION CHANGE: 1.0 TO 2.0

--------------------------------------------------------------------------------------------------------------------1 9/19 27 change JGPS power from +3V_WLAN to +3VS Solve GPS disappear when link 850Mhz only

2. 9/19 N/A change PCB from 6 layer to 8 layer imporve EMI and slove assembly procedure not easy issue

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/19 2009/09/19

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A4571

401605

1

E

of

43 43Wednesday, September 16, 2009

of

43 43Wednesday, September 16, 2009

of

43 43Wednesday, September 16, 2009

COMPAL LA-4571P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual