COMPAL LA-4391P Schematics

A
1 1
B
C
D
E
Compal Confidential
2 2
JAWD0 Schematics Document
AMD Griffin Processor with RS780M+SB700
3 3
2008-07-01
REV:1.0
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/03/25 2008/12/20
2008/03/25 2008/12/20
2008/03/25 2008/12/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
401575
401575
401575
D
D
145Tuesday, August 19, 2008
145Tuesday, August 19, 2008
145Tuesday, August 19, 2008
E
D
A
B
C
D
E
Compal Confidential
Model Name : JAWD0
1 1
Fan Control
CRT
page 18
page 36
AMD S1G2 Processor
uPGA-638 Package
page 4,5,6,7
Hyper Transport Link 16 x 16
Memory BUS(DDRII)
Dual Channel
1.8V DDRII 533/667
200pin DDRII-SO-DIMM X2
BANK 0, 1, 2, 3
page 8,9
LVDS
page 18
ATI RS780
Thermal Sensor
ADM1032
page 5 page 15
Clock Generator
ICS9LPRS488B
uFCBGA-1299
PCI-Express 1x
page 10,11,12,13
USB
MINI Card x1
WLAN
page 29
2 2
LAN(GbE) RT8111C
page 27
port 3port 1,2
RJ45
page 28
Card Reader JMB385
page 26
port 4
5 in 1 socket
page 25
A link Express2
ATI SB700
conn X3/4
USB port 0,7,2
3.3V 48MHz
3.3V 24.576MHz/48Mhz
page 16 page 30 page 29
CMOS Camera
Bluetooth Conn
USB port 5 USB port 6 USB port 8,10
USB
HD Audio
page 29
New Card conn
USB port 11
Mini card
BGA-676
SATA HDD Conn.
page 24
port 0
S-ATA
CDROM Conn.
page 24
port 2
page 19,20,21,22,23
LPC BUS
MDC 1.5 Conn
page 33
HDA Codec ALC268
page 34
Audio AMP
page 35
Analog internal MIC
ENE KB926
3 3
RTC CKT.
page 19
Power On/Off CKT.
page 33
PWR/B Conn.
page 32
LED/B Conn.
page 32
Touch Pad
page 32
EC I/O Buffer
page 32
page 31
Phone Jack x3
page 35
Int.KBD
page 32
BIOS
page 32
DC/DC Interface CKT.
page 38
Hall SW/B Conn.
USB port 2
page 29
Power Circuit DC/DC
4 4
page 39,40,41 42,43,44,45
A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/03/25 2008/12/20
2008/03/25 2008/12/20
2008/03/25 2008/12/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
401575
401575
401575
D
D
245Tuesday, August 19, 2008
245Tuesday, August 19, 2008
245Tuesday, August 19, 2008
E
D
A
Voltage Rails
Power Plane Description
VIN
1 1
2 2
B+ +CPU_CORE +0.9VS 0.9V switched power rail for DDR terminator +1.05VS +1.25VS 1.25V switched power rail ON OFF OFF +1.5VS +1.8V +1.8VS 1.8V switched power rail +2.5VS +3VALW +3V +3V_LAN +3VS +5VALW +5VS +VSB VSB always on power rail ON ON* +RTCVCC RTC power
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU
1.05V switched power rail
1.5V switched power rail
1.8V power rail for DDR
2.5V switched power rail
3.3V always on power rail
3.3V power rail for SB
3.3V power rail for LAN
3.3V switched power rail 5V always on power rail 5V switched power rail
B
S1 S3 S5
N/A N/A N/A
ON OFF ON OFF ON OFF OFF
ON OFF OFF ON ON ON ON ON ON ON ONXX ON ON
ON ON
N/AN/AN/A OFF OFF
ON
OFF OFF
OFF OFF
OFF
ON ON*
OFF
OFF
ON*
ON
OFFON
OFF
ONON
C
STATE
SIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3#
SLP_S4# SLP_S5# +VALW +V +VS Clock
HIGH HIGH HIGH HIGH
LOW
LOW
LOW
LOW LOW LOW LOW
HIGH
LOWLOWLOW
D
HIGHHIGHHIGH
HIGH
HIGH
Board ID / SKU ID Table for AD channel
Vcc 3.3V +/- 5%
Board ID
0 1 2 3 4 5 6 7NC
100K +/- 5%Ra/Rc/Re
Rb / Rd / Rf V min
0
8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%
AD_BID
0 V
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
V typ
ON
ON
ON
OFF
OFF
V
AD_BID
ON ON
ON
OFF
OFF
OFF
ON
ON
ON
ON
ON
AD_BID
0 V 0 V
0.503 V
0.819 V
0.538 V
0.875 V
1.185 V 1.264 V
2.200 V
3.300 V
2.341 V
3.300 V
E
LOW
OFF
OFF
OFF
max
BOARD ID Table BTO Option Table
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
Board ID
0 1 2 3 4 5 6 7
PCB Revision
0.1
BTO Item BOM Structure
EC SM Bus1 address
3 3
Device
Smart Battery EEPROM(24C16/02)
Address Address
1010 000X b
EC SM Bus2 address
Device
ADI ADM1032
1001 100X b0001 011X b
PROJECT ID Table
Board ID
0 1
PROJECT
JALB0
2 3
SB700 SM Bus 0 address
Device
Clock Generator (ICS9LPRS365)
DDR DIMM0 DDR DIMM2
Minicard
4 4
A
Address
1101 001Xb
1001 000Xb 1001 010Xb
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4 5
JAWD0
6 7
2008/03/25 2008/12/20
2008/03/25 2008/12/20
2008/03/25 2008/12/20
C
JALC0
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
401575
401575
401575
D
D
345Tuesday, August 19, 2008
345Tuesday, August 19, 2008
345Tuesday, August 19, 2008
E
D
A
1 1
B
C
D
E
+1.2V_HT
250 mil
1
C455
H_CADIP[0..15]10
H_CADIP[0..15] H_CADIN[0..15]
H_CADOP[0..15] H_CADON[0..15]
H_CADOP[0..15] 10 H_CADON[0..15] 10H_CADIN[0..15]10
C455
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C133
C133
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
VLDT CAP.
1
C131
C131
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
2
C451
C451
0.22U_0603_16V4Z
0.22U_0603_16V4Z
1
C138
C138 180P_0402_50V8J
180P_0402_50V8J
2
1
C444
C444 180P_0402_50V8J
180P_0402_50V8J
2
Near CPU Socket
+1.2V_HT
2 2
3 3
VLDT=500mA
H_CADIP0 H_CADIN0 H_CADIP1 H_CADIN1 H_CADIP2 H_CADIN2 H_CADIP3 H_CADIN3 H_CADIP4 H_CADIN4 H_CADIP5 H_CADIN5 H_CADIP6 H_CADIN6 H_CADIP7 H_CADIN7 H_CADIP8 H_CADIN8 H_CADIP9 H_CADIN9 H_CADIP10 H_CADIN10 H_CADIP11 H_CADIN11 H_CADIP12 H_CADIN12 H_CADIP13 H_CADIN13 H_CADIP14 H_CADIN14 H_CADIP15 H_CADIN15
H_CLKIP010 H_CLKIN010 H_CLKIP110 H_CLKIN110
H_CTLIP010 H_CTLIP110 H_CTLOP1 10
H_CTLIN110
D1 D2 D3 D4
E3 E2 E1
F1 G3 G2 G1
H1
J1 K1 L3 L2 L1
M1
N3 N2 E5 F5 F3 F4
G5
H5 H3 H4 K3 K4 L5
M5 M3 M4
N5 P5
J3
J2
J5 K5
N1 P1 P3 P4
VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3
L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15
L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1
L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1
6090022100G_B
6090022100G_B
Athlon 64 S1 Processor Socket
JCPU1A
JCPU1A
HT LINK
HT LINK
VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3
L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9 L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1 L0_CTLOUT_H0
L0_CTLOUT_L0 L0_CTLOUT_H1 L0_CTLOUT_L1
+1.2V_HT
AE2 AE3 AE4 AE5
AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3
Y1 W1 Y4 Y3
R2 R3 T5 R5
1 2
C134 4.7U_0805_10V4ZC134 4.7U_0805_10V4Z
H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7 H_CADOP8 H_CADON8 H_CADOP9 H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15
H_CLKOP0 10 H_CLKON0 10 H_CLKOP1 10 H_CLKON1 10
H_CTLOP0 10 H_CTLON0 10H_CTLIN010
H_CTLON1 10
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/03/25 2008/12/20
2008/03/25 2008/12/20
2008/03/25 2008/12/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
401575
401575
401575
445Tuesday, August 19, 2008
445Tuesday, August 19, 2008
445Tuesday, August 19, 2008
E
D
D
D
of
A
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
DDRA_CLK0
AD10 AF10
AE10
AA16
D10 C10 B10
H16 T19
V22 U21 V19
T20 U19 U20 V20
J22 J20
N19 N20 E16 F16 Y16
P19 P20
N21 M20 N22 M19 M22 L20 M24 L21 L19 K22 R21 L22 K20 V24 K24 K19
R20 R23
J21
R19 T22 T24
DDRA_CLK0# DDRA_CLK1
DDRA_CLK1#
DDRB_CLK0
DDRB_CLK0# DDRB_CLK1
DDRB_CLK1#
VTT1
MEM:CMD/CTRL/CLK
MEM:CMD/CTRL/CLK
VTT2 VTT3 VTT4
MEMZP MEMZN
RSVD_M1 MA0_ODT0
MA0_ODT1 MA1_ODT0 MA1_ODT1
MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1
MA_CKE0 MA_CKE1
MA_CLK_H0 MA_CLK_L0 MA_CLK_H1 MA_CLK_L1 MA_CLK_H2 MA_CLK_L2 MA_CLK_H3 MA_CLK_L3
MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15
MA_BANK0 MA_BANK1 MA_BANK2
MA_RAS_L MA_CAS_L MA_WE_L
Athlon 64 S1 Processor Socket
1 1
2 2
R77
R77
1K_0402_1%
1K_0402_1%
R75
R75
1K_0402_1%
1K_0402_1%
+1.8V
1 2
1 2
+MCH_REF
1
C164
C164
2
1
C168
C168
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1000P_0402_25V8J
1000P_0402_25V8J
Place them close to CPU within 1"
R347 39.2_0402_1%R347 39.2_0402_1%
1 2
DDRA_SBS0#8 DDRA_SBS1#8 DDRA_SBS2#8
DDRA_SRAS#8 DDRA_SCAS#8 DDRA_SWE#8
1 2
R338 39.2_0402_1%R338 39.2_0402_1%
DDRA_ODT0 DDRA_ODT1
DDRA_SCS0# DDRA_SCS1# DDRB_SCS0#
DDRA_CKE0 DDRA_CKE1
DDRA_CLK0 DDRA_CLK0# DDRA_CLK1
DDRA_SMA0 DDRA_SMA1 DDRA_SMA2 DDRA_SMA3 DDRA_SMA4 DDRA_SMA5 DDRA_SMA6 DDRA_SMA7 DDRA_SMA8 DDRA_SMA9 DDRA_SMA10 DDRA_SMA11 DDRA_SMA12 DDRA_SMA13 DDRA_SMA14 DDRA_SMA15
DDRA_SBS0# DDRA_SBS1# DDRA_SBS2#
DDRA_SRAS# DDRA_SCAS# DDRA_SWE#
+1.8V +0.9V
DDRA_ODT08 DDRA_ODT18
DDRA_SCS0#8 DDRA_SCS1#8 DDRB_SCS0# 9
DDRA_CKE08 DDRA_CKE18
DDRA_CLK08
DDRA_CLK0#8
DDRA_CLK18
DDRA_CLK1#8
3 3
4 4
DDRA_SMA[15..0]8 DDRB_SMA[15..0] 9
JCPU1B
JCPU1B
B
1
2
1
2
1
2
1
2
VTT5 VTT6 VTT7 VTT8 VTT9
VTT_SENSE
MEMVREF
RSVD_M2
MB0_ODT0 MB0_ODT1 MB1_ODT0
MB0_CS_L0 MB0_CS_L1 MB1_CS_L0
MB_CKE0 MB_CKE1
MB_CLK_H0
MB_CLK_L0
MB_CLK_H1
MB_CLK_L1
MB_CLK_H2
MB_CLK_L2
MB_CLK_H3
MB_CLK_L3
MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8
MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15
MB_BANK0 MB_BANK1 MB_BANK2
MB_RAS_L MB_CAS_L
MB_WE_L
C219
C219
1.5P_0402_50V8C
1.5P_0402_50V8C
C162
C162
1.5P_0402_50V8C
1.5P_0402_50V8C
C483
C483
1.5P_0402_50V8C
1.5P_0402_50V8C
C413
C413
1.5P_0402_50V8C
1.5P_0402_50V8C
W10 AC10 AB10 AA10 A10
Y10 W17 B18 W26
W23 Y26
V26 W25 U22
J25 H26
P22 R22 A17 A18 AF18 AF17 R26 R25
P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24
R24 U26 J26
U25 U24 U23
+0.9V+0.9V
+MCH_REF
DDRB_ODT0 DDRB_ODT1
DDRB_SCS1#
DDRB_CKE0 DDRB_CKE1
DDRB_CLK0 DDRB_CLK0# DDRB_CLK1 DDRB_CLK1#DDRA_CLK1#
DDRB_SMA0 DDRB_SMA1 DDRB_SMA2 DDRB_SMA3 DDRB_SMA4 DDRB_SMA5 DDRB_SMA6 DDRB_SMA7 DDRB_SMA8 DDRB_SMA9 DDRB_SMA10 DDRB_SMA11 DDRB_SMA12 DDRB_SMA13 DDRB_SMA14 DDRB_SMA15
DDRB_SBS0# DDRB_SBS1# DDRB_SBS2#
DDRB_SRAS# DDRB_SCAS# DDRB_SWE#
R257 0_0402_5%
R257 0_0402_5%
1 2
@
@
DDRB_ODT0 9 DDRB_ODT1 9
DDRB_SCS1# 9
DDRB_CKE0 9 DDRB_CKE1 9
DDRB_CLK0 9 DDRB_CLK0# 9 DDRB_CLK1 9 DDRB_CLK1# 9
DDRB_SBS0# 9 DDRB_SBS1# 9 DDRB_SBS2# 9
DDRB_SRAS# 9 DDRB_SCAS# 9 DDRB_SWE# 9
C
D
E
Processor DDR2 Memory Interface
JCPU1C
AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11
AE14 AF14 AF11 AD11
AB26 AE22 AC16 AD12
AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12
C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24
Y11
A12 B16 A22 E25
C12 B12 D16 C16 A24 A23 F26 E26
JCPU1C
MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63
MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7
MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7
6090022100G_B
6090022100G_B
MEM:DATA
MEM:DATA
MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8
MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63
MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
Athlon 64 S1 Processor Socket
G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12
E12 C15 E19 F24 AC24 Y19 AB16 Y13
G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13
DDRA_SDQ0 DDRA_SDQ1 DDRA_SDQ2 DDRA_SDQ3 DDRA_SDQ4 DDRA_SDQ5 DDRA_SDQ6 DDRA_SDQ7 DDRA_SDQ8 DDRA_SDQ9 DDRA_SDQ10 DDRA_SDQ11 DDRA_SDQ12 DDRA_SDQ13 DDRA_SDQ14 DDRA_SDQ15 DDRA_SDQ16 DDRA_SDQ17 DDRA_SDQ18 DDRA_SDQ19 DDRA_SDQ20 DDRA_SDQ21 DDRA_SDQ22 DDRA_SDQ23 DDRA_SDQ24 DDRA_SDQ25 DDRA_SDQ26 DDRA_SDQ27 DDRA_SDQ28 DDRA_SDQ29 DDRA_SDQ30 DDRA_SDQ31 DDRA_SDQ32 DDRA_SDQ33 DDRA_SDQ34 DDRA_SDQ35 DDRA_SDQ36 DDRA_SDQ37 DDRA_SDQ38 DDRA_SDQ39 DDRA_SDQ40 DDRA_SDQ41 DDRA_SDQ42 DDRA_SDQ43 DDRA_SDQ44 DDRA_SDQ45 DDRA_SDQ46 DDRA_SDQ47 DDRA_SDQ48 DDRA_SDQ49 DDRA_SDQ50 DDRA_SDQ51 DDRA_SDQ52 DDRA_SDQ53 DDRA_SDQ54 DDRA_SDQ55 DDRA_SDQ56 DDRA_SDQ57 DDRA_SDQ58 DDRA_SDQ59 DDRA_SDQ60 DDRA_SDQ61 DDRA_SDQ62 DDRA_SDQ63
DDRA_SDM0 DDRA_SDM1 DDRA_SDM2 DDRA_SDM3 DDRA_SDM4 DDRA_SDM5 DDRA_SDM6 DDRA_SDM7
DDRA_SDQS0 DDRA_SDQS0# DDRA_SDQS1 DDRA_SDQS1# DDRA_SDQS2 DDRA_SDQS2# DDRA_SDQS3 DDRA_SDQS3# DDRA_SDQS4 DDRA_SDQS4# DDRA_SDQS5 DDRA_SDQS5# DDRA_SDQS6 DDRA_SDQS6# DDRA_SDQS7 DDRA_SDQS7#
DDRA_SDQ[63..0] 8
DDRA_SDQS0 8 DDRA_SDQS0# 8 DDRA_SDQS1 8 DDRA_SDQS1# 8 DDRA_SDQS2 8 DDRA_SDQS2# 8 DDRA_SDQS3 8 DDRA_SDQS3# 8 DDRA_SDQS4 8 DDRA_SDQS4# 8 DDRA_SDQS5 8 DDRA_SDQS5# 8 DDRA_SDQS6 8 DDRA_SDQS6# 8 DDRA_SDQS7 8 DDRA_SDQS7# 8
DDRB_SDQ[63..0]9
DDRB_SDM[7..0]9 DDRA_SDM[7..0] 8
DDRB_SDQS09 DDRB_SDQS0#9 DDRB_SDQS19 DDRB_SDQS1#9 DDRB_SDQS29 DDRB_SDQS2#9 DDRB_SDQS39 DDRB_SDQS3#9 DDRB_SDQS49 DDRB_SDQS4#9 DDRB_SDQS59 DDRB_SDQS5#9 DDRB_SDQS69 DDRB_SDQS6#9 DDRB_SDQS79 DDRB_SDQS7#9
DDRB_SDQ0 DDRB_SDQ1 DDRB_SDQ2 DDRB_SDQ3 DDRB_SDQ4 DDRB_SDQ5 DDRB_SDQ6 DDRB_SDQ7 DDRB_SDQ8 DDRB_SDQ9 DDRB_SDQ10 DDRB_SDQ11 DDRB_SDQ12 DDRB_SDQ13 DDRB_SDQ14 DDRB_SDQ15 DDRB_SDQ16 DDRB_SDQ17 DDRB_SDQ18 DDRB_SDQ19 DDRB_SDQ20 DDRB_SDQ21 DDRB_SDQ22 DDRB_SDQ23 DDRB_SDQ24 DDRB_SDQ25 DDRB_SDQ26 DDRB_SDQ27 DDRB_SDQ28 DDRB_SDQ29 DDRB_SDQ30 DDRB_SDQ31 DDRB_SDQ32 DDRB_SDQ33 DDRB_SDQ34 DDRB_SDQ35 DDRB_SDQ36 DDRB_SDQ37 DDRB_SDQ38 DDRB_SDQ39 DDRB_SDQ40 DDRB_SDQ41 DDRB_SDQ42 DDRB_SDQ43 DDRB_SDQ44 DDRB_SDQ45 DDRB_SDQ46 DDRB_SDQ47 DDRB_SDQ48 DDRB_SDQ49 DDRB_SDQ50 DDRB_SDQ51 DDRB_SDQ52 DDRB_SDQ53 DDRB_SDQ54 DDRB_SDQ55 DDRB_SDQ56 DDRB_SDQ57 DDRB_SDQ58 DDRB_SDQ59 DDRB_SDQ60 DDRB_SDQ61 DDRB_SDQ62 DDRB_SDQ63
DDRB_SDM0 DDRB_SDM1 DDRB_SDM2 DDRB_SDM3 DDRB_SDM4 DDRB_SDM5 DDRB_SDM6 DDRB_SDM7
DDRB_SDQS0 DDRB_SDQS0# DDRB_SDQS1 DDRB_SDQS1# DDRB_SDQS2 DDRB_SDQS2# DDRB_SDQS3 DDRB_SDQS3# DDRB_SDQS4 DDRB_SDQS4# DDRB_SDQS5 DDRB_SDQS5# DDRB_SDQS6 DDRB_SDQS6# DDRB_SDQS7 DDRB_SDQS7#
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/03/25 2008/12/20
2008/03/25 2008/12/20
2008/03/25 2008/12/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
401575
401575
401575
545Tuesday, August 19, 2008
545Tuesday, August 19, 2008
545Tuesday, August 19, 2008
E
D
D
D
A
L60
+2.5VS
1
C500
C500
+
+
150U_D2_6.3VM
150U_D2_6.3VM
1 1
LDT_RST#17
2 2
H_PWRGD17
LDT_STOP#11,17
3 3
4 4
change to polymer
+1.8VS
1 2
1
2
+1.8VS
1 2
1
2
+1.8VS
1 2
1
2
+3VS
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C399
C399
1 2
2200P_0402_50V7K
2200P_0402_50V7K
close to U24
A
CLK_CPU_BCLK14
CLK_CPU_BCLK#14
R403
R403 300_0402_5%
300_0402_5%
LDT_RST#
C482
C482
0.01U_0402_25V4Z
0.01U_0402_25V4Z @
@
R402
R402 300_0402_5%
300_0402_5%
H_PWRGD
C481
C481
0.01U_0402_25V4Z
0.01U_0402_25V4Z @
@
R103
R103 300_0402_5%
300_0402_5%
LDT_STOP#
C221
C221
0.01U_0402_25V4Z
0.01U_0402_25V4Z @
@
C392
C392
THERMDA_CPU THERMDC_CPU
2
C488
C488
C489 3900P_0402_50V7KC489 3900P_0402_50V7K
+CPU_CORE_0
+CPU_CORE_1
CPU_SID_SB18
CPU_SIC_SB18
U24
U24
1
VDD
2
D+
3
D­THERM#4GND
ADM1032ARMZ_MSOP8
ADM1032ARMZ_MSOP8
1 2
1 2
R90 10_0402_5%R90 10_0402_5%
R92 10_0402_5%R92 10_0402_5%
R78 10_0402_5%R78 10_0402_5%
R76 10_0402_5%R76 10_0402_5%
SCLK
SDATA
ALERT#
L60
1 2
FBM_L11_201209_300L_0805
FBM_L11_201209_300L_0805
4.7U_0805_10V4Z
4.7U_0805_10V4Z
3900P_0402_50V7K
3900P_0402_50V7K
12
R396
R396 169_0402_1%
169_0402_1%
CPU_VDD0_FB_H
1 2
CPU_VDD0_FB_L
1 2
CPU_VDD1_FB_H
1 2
CPU_VDD1_FB_L
1 2
+1.8V
@
@
1 2
R561 0_0402_5%
R561 0_0402_5%
+1.8V
@
@
1 2
R564 0_0402_5%
R564 0_0402_5%
EC_SMB_CK2
8
EC_SMB_DA2
7 6 5
+2.5VDDA
+1.2V_HT
+3VS
R345
R345
2.2K_0402_5%
2.2K_0402_5% CPU_SID
R346
R346
2.2K_0402_5%
2.2K_0402_5% CPU_SIC
B
3300P_0402_50V7K
3300P_0402_50V7K
1
1
2
@R344
@
20K_0402_5%
20K_0402_5%
B
C218
C218
C473
C473
2
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
CPU_LDT_REQ#11
R81 44.2_0402_1%R81 44.2_0402_1%
1 2
R84 44.2_0402_1%R84 44.2_0402_1%
1 2
CPU_VDD0_FB_H43 CPU_VDD0_FB_L43
CPU_VDD1_FB_H43 CPU_VDD1_FB_L43
R344
12
12
G
G
2
S
S
Q32
@
Q32
@
FDV301N_NL_SOT23-3
FDV301N_NL_SOT23-3
12
G
G
2
S
S
Q33
@
Q33
@
FDV301N_NL_SOT23-3
FDV301N_NL_SOT23-3
EC_SMB_CK2 28
EC_SMB_DA2 28
1
C220
C220
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST#
CPU_TDI T2 PADT2 PAD T8 PADT8 PAD
T12 PADT12 PAD T21 PADT21 PAD
T15 PADT15 PAD T4 PADT4 PAD
T24 PADT24 PAD T26 PADT26 PAD T25 PADT25 PAD T3 PADT3 PAD T23 PADT23 PAD
R407 0_0402_5%R407 0_0402_5%
1 2
T22 PADT22 PAD
C410 0.1U_0402_16V4Z@C410 0.1U_0402_16V4Z@
1 2
R348
@R348
@
12
34.8K_0402_1%~N
34.8K_0402_1%~N
13
D
D
13
D
D
LDT_RST# H_PWRGD LDT_STOP# CPU_LDT_REQ#
CPU_SIC CPU_SID
CPU_HTREF0 CPU_HTREF1
CPU_VDD0_FB_H CPU_VDD0_FB_L
CPU_VDD1_FB_H CPU_VDD1_FB_L
CPU_TEST23 CPU_TEST18
CPU_TEST19 CPU_TEST25H
CPU_TEST25L CPU_TEST21
CPU_TEST20 CPU_TEST24 CPU_TEST22 CPU_TEST12 CPU_TEST27
CPU_TEST6
1 2
R562 0_0402_5%
R562 0_0402_5%
1 2
R565 0_0402_5%
R565 0_0402_5%
C
+1.8V
JCPU1D
JCPU1D
F8
VDDA1
F9
VDDA2
A9
CLKIN_H
A8
CLKIN_L
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
C6
LDTREQ_L
AF4
SIC
AF5
SID
AE6
ALERT_L
R6
HT_REF0
P6
HT_REF1
F6
VDD0_FB_H
E6
VDD0_FB_L
Y6
VDD1_FB_H
AB6
VDD1_FB_L
G10
DBRDY
AA9
TMS
AC9
TCK
AD9
TRST_L
AF9
TDI
AD7
TEST23
H10
TEST18
G9
TEST19
E9
TEST25_H
E8
TEST25_L
AB8
TEST21
AF7
TEST20
AE7
TEST24
AE8
TEST22
AC8
TEST12
AF8
TEST27
C2
TEST9
AA6
TEST6
A3
RSVD1
A5
RSVD2
B3
RSVD3
B5
RSVD4
C1
RSVD5
@
@
@
@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
6090022100G_B
6090022100G_B
EC_SMB_DA1 28,37
EC_SMB_CK1 28,37
C
THERMTRIP_L
PROCHOT_L
VDDIO_FB_H VDDIO_FB_L
VDDNB_FB_H VDDNB_FB_L
M11
KEY1
W18
KEY2
CPU_SVC
A6
SVC
CPU_SVD
A4
SVD
AF6 AC7 AA8
MEMHOT_L
THERMDC_CPU
W7
THERMDC THERMDA
DBREQ_L
TEST28_H
TEST28_L
TEST17 TEST16 TEST15 TEST14
TEST10
TEST29_H
TEST29_L
RSVD10
RSVD9 RSVD8 RSVD7 RSVD6
THERMDA_CPU
W8
W9 Y9
CPU_VDDNB_FB_H
H6
CPU_VDDNB_FB_L
G6
CPU_DBREQ#
E10
CPU_TDO
AE9
TDO
CPU_TEST28_H_PLLCHRZ_P
J7
CPU_TEST28_L_PLLCHRZ_N
H8
CPU_TEST17
D7
CPU_TEST16
E7
CPU_TEST15
F7
CPU_TEST14
C7
CPU_TEST7
C3
TEST7
CPU_TEST10
K8
CPU_TEST8
C4
TEST8
CPU_TEST29_H_FBCLKOUT_P
C9
CPU_TEST29_L_FBCLKOUT_N
C8
H18 H19 AA7 D5 C5
2008/03/25 2008/12/20
2008/03/25 2008/12/20
2008/03/25 2008/12/20
CPU_SVC 43 CPU_SVD 43
CPU_THERMTRIP#_R H_PROCHOT#
@
@
12
R570 300_0402_5%
R570 300_0402_5%
T5PAD T5PAD T6PAD T6PAD
CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
+1.8V
CPU_VDDNB_FB_H 43 CPU_VDDNB_FB_L 43
T18PAD T18PAD T19PAD T19PAD T11PAD T11PAD T20PAD T20PAD
T13PAD T13PAD T7PAD T7PAD
T14PAD T14PAD
+1.8V
@ SAMTEC_ASP-68200-07
@
D
1 2
R350 10K_0402_5%R350 10K_0402_5%
1 2
R351 300_0402_5%R351 300_0402_5%
CPU_THERMTRIP#_R
+1.8V
T9PAD T9PAD T10PAD T10PAD
T17PAD T17PAD T16PAD T16PAD
JP1
JP1
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
2423 26
SAMTEC_ASP-68200-07
D
1 2
R383 300_0402_5%R383 300_0402_5%
H_PROCHOT#
CPU_VDDNB_FB_H CPU_VDDNB_FB_L
E
@
B
B
2
Q34
Q34
E
E
3 1
C
C
MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
R104
R104
1 2
0_0402_5%
0_0402_5%
R97 10_0402_5%R97 10_0402_5% 1 2 1 2
R102 10_0402_5%R102 10_0402_5%
CPU_SVC CPU_SVD
CPU_DBREQ#
CPU_TEST21 CPU_TEST24
R335 0_0402_5%@R335 0_0402_5%@
U23
HDT_RST#
U23
4
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
@ R334
R334
1 2
0_0402_5%
0_0402_5%
R333
R333
1 2
0_0402_5%
0_0402_5%
+CPU_CORE_NB
+1.8V
1 2
R397 1K_0402_5%R397 1K_0402_5%
1 2
R398 1K_0402_5%R398 1K_0402_5%
+1.8V
12
R516 300_0402_5%R516 300_0402_5%
12
R517 300_0402_5%R517 300_0402_5%
12
R518 300_0402_5%R518 300_0402_5%
1 2
+3VS
5
2
P
B
Y
1
A
G
NC7SZ08P5X_NL_SC70-5@
NC7SZ08P5X_NL_SC70-5@
3
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
401575
401575
401575
LDT_RST#
SB_PWRGD 18,31
E
MAINPWON 37,38 H_THERMTRIP# 18
H_PROCHOT_R# 17
645Tuesday, August 19, 2008
645Tuesday, August 19, 2008
645Tuesday, August 19, 2008
D
D
D
of
A
VDD(+CPU_CORE) decoupling.
+CPU_CORE_0
1
+
+
C40
1 1
C40
330U_X_2VM_R6M
330U_X_2VM_R6M
2
1
+
+
C39
C39 330U_X_2VM_R6M
330U_X_2VM_R6M
2
Near CPU Socket
+CPU_CORE_0
1
C194
C194 22U_0805_6.3V6M
22U_0805_6.3V6M
2
+CPU_CORE_0
1
C198
C198
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
2 2
1
C206
C206 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C195
C195
0.01U_0402_25V4Z
0.01U_0402_25V4Z
2
1
C199
C199 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C196
C196 180P_0402_50V8J
180P_0402_50V8J
2
1
C205
C205 22U_0805_6.3V6M
22U_0805_6.3V6M
2
Under CPU Socket
VDDIO decoupling.
+1.8V
1
C188
C188 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C210
C210 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C197
C197
0.22U_0603_16V4Z
0.22U_0603_16V4Z 2
Under CPU Socket
1
C214
C214
0.22U_0603_16V4Z
0.22U_0603_16V4Z 2
B
+CPU_CORE_1
+CPU_CORE_1
1
C179
C179 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C175
C175
180P_0402_50V8J
180P_0402_50V8J 2
1
+
+
C36
C36
330U_X_2VM_R6M
330U_X_2VM_R6M
2
+CPU_CORE_1
1
C169
C169 180P_0402_50V8J
180P_0402_50V8J
2
1
C180
C180 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C185
C185
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
C
JCPU1E
G4 H2
J9 J11 J13 J15
K6 K10 K12 K14
L4 L7
L9 L11 L13 L15
M2 M6 M8
M10
N7 N9
N11
K16
M16
P16 T16 V16
H25
J17 K18 K21 K23 K25 L17
M18 M21 M23 M25 N17
6090022100G_B
6090022100G_B
Athlon 64 S1 Processor Socket
JCPU1E
VDD0_1 VDD0_2 VDD0_3 VDD0_4 VDD0_5 VDD0_6 VDD0_7 VDD0_8 VDD0_9 VDD0_10 VDD0_11 VDD0_12 VDD0_13 VDD0_14 VDD0_15 VDD0_16 VDD0_17 VDD0_18 VDD0_19 VDD0_20 VDD0_21 VDD0_22 VDD0_23
VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5
VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12
1
+
+
C37
C37 330U_X_2VM_R6M
330U_X_2VM_R6M
2
1
C170
C170 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C167
C167
0.01U_0402_25V4Z
0.01U_0402_25V4Z
2
1
C186
C186 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C163
C163 180P_0402_50V8J
180P_0402_50V8J
2
+CPU_CORE_0
+CPU_CORE_NB
+1.8V
+CPU_CORE_NB decoupling.
+CPU_CORE_NB
1
C183
C183 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C191
C191 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C207
C207 22U_0805_6.3V6M
22U_0805_6.3V6M
2
VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8
VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26
VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13
D
JCPU1F
JCPU1F
AA4
P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2
Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18
+CPU_CORE_1
+1.8V
AA11 AA13 AA15 AA17 AA19
AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21
AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23
AB2 AB7 AB9
AD6 AD8
B4 B6 B8
B9 B11 B13 B15 B17 B19 B21 B23 B25
D6 D8
D9 D11 D13 D15 D17 D19 D21 D23 D25
E4
F2 F11 F13 F15 F17 F19 F21 F23 F25
H7
H9 H21 H23
J4
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65
6090022100G_B
6090022100G_B
Athlon 64 S1 Processor Socket
VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129
E
J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6
3 3
4 4
+1.8V
1
C431
C431
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
+1.8V +1.8V
1
C421
C421
0.01U_0402_25V4Z
0.01U_0402_25V4Z
2
+1.8V
1
2
Between CPU Socket and DIMM
C216
C216
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
C430
C430
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C422
C422
0.01U_0402_25V4Z
0.01U_0402_25V4Z
2
1
C151
C151
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C424
C424
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch>
1
C423
C423 180P_0402_50V8J
180P_0402_50V8J
2
1
C152
C152
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C425
C425
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C433
C433 180P_0402_50V8J
180P_0402_50V8J
2
1
C217
C217
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C434
C434 180P_0402_50V8J
180P_0402_50V8J
2
1
+
+
C149
C149 220U_Y_4VM
220U_Y_4VM @
@
2
NBO CAP
1
C432
C432 180P_0402_50V8J
180P_0402_50V8J
2
VTT decoupling.
change to polymer
+0.9V
1
C407
C407
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
+0.9V
1
C499
C499
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C406
C406
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
Near CPU Socket Right side.
1
C498
C498
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C411
C411
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C491
C491
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
+0.9V
Near Power Supply
1
C517
C517
+
+
220U_D2_4VM_R15
220U_D2_4VM_R15
2
1
C412
C412
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C492
C492
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C510
C510 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C156
C156 1000P_0402_25V8J
1000P_0402_25V8J
2
1
C478
C478 1000P_0402_25V8J
1000P_0402_25V8J
2
1
C155
C155 1000P_0402_25V8J
1000P_0402_25V8J
2
1
C485
C485 1000P_0402_25V8J
1000P_0402_25V8J
2
1
C154
C154 180P_0402_50V8J
180P_0402_50V8J
2
1
C479
C479 180P_0402_50V8J
180P_0402_50V8J
2
1
C157
C157 180P_0402_50V8J
180P_0402_50V8J
2
1
C486
C486 180P_0402_50V8J
180P_0402_50V8J
2
Near CPU Socket Left side.
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/03/25 2008/12/20
2008/03/25 2008/12/20
2008/03/25 2008/12/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
401575
401575
401575
745Tuesday, August 19, 2008
745Tuesday, August 19, 2008
745Tuesday, August 19, 2008
E
D
D
D
A
B
C
D
E
+1.8V +1.8V
JDIMM1
JDIMM1
+V_DDR_MCH_REF
DDRA_SDQS0#5
1 1
2 2
3 3
4 4
DDRA_SDQS05
DDRA_SDQS1#5 DDRA_SDQS15
DDRA_SDQS2#5 DDRA_SDQS25
DDRA_CKE05
DDRA_SBS2#5
DDRA_SBS0#5 DDRA_SWE#5
DDRA_SCAS#5 DDRA_SCS1#5
DDRA_ODT15
DDRA_SDQS4#5 DDRA_SDQS45
DDRA_SDQS6#5 DDRA_SDQS65
ICH_SMBDATA09,14,18,26 ICH_SMBCLK09,14,18,26
DDRA_SDQ0 DDRA_SDQ1
DDRA_SDQS0# DDRA_SDQS0
DDRA_SDQ2 DDRA_SDQ3
DDRA_SDQ8 DDRA_SDQ9
DDRA_SDQS1# DDRA_SDQS1
DDRA_SDQ10 DDRA_SDQ11
DDRA_SDQ16 DDRA_SDQ17
DDRA_SDQS2# DDRA_SDQS2
DDRA_SDQ18 DDRA_SDQ19
DDRA_SDQ24 DDRA_SDQ25 DDRA_SDQ29
DDRA_SDM3
DDRA_SDQ26 DDRA_SDQ27
DDRA_SBS2# DDRA_SMA12
DDRA_SMA9 DDRA_SMA8
DDRA_SMA5 DDRA_SMA3 DDRA_SMA1
DDRA_SMA10 DDRA_SBS0# DDRA_SWE#
DDRA_SCAS# DDRA_SCS1#
DDRA_ODT1 DDRA_SDQ32
DDRA_SDQ33 DDRA_SDQS4#
DDRA_SDQS4 DDRA_SDQ34
DDRA_SDQ35 DDRA_SDQ40
DDRA_SDQ41 DDRA_SDM5 DDRA_SDQ42
DDRA_SDQ43 DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQS6# DDRA_SDQS6
DDRA_SDQ50 DDRA_SDQ51
DDRA_SDQ56 DDRA_SDQ57
DDRA_SDM7 DDRA_SDQ58
DDRA_SDQ59
ICH_SMBDATA0 ICH_SMBCLK0
+3VS
+3VS
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
203
GND
FOX_AS0A426-M2RN-7F
FOX_AS0A426-M2RN-7F CONN@
CONN@
DQ12 DQ13
CK0# DQ14
DQ15
DQ20 DQ21
DQ22 DQ23
DQ28 DQ29
DQS3#
DQS3 DQ30
DQ31
NC/CKE1
NC/A15 NC/A14
RAS#
ODT0
NC/A13
DQ36 DQ37
DQ38 DQ39
DQ44 DQ45
DQS5#
DQS5 DQ46
DQ47 DQ52
DQ53
CK1#
DQ54 DQ55
DQ60 DQ61
DQS7#
DQS7 DQ62
DQ63
GND
VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7 VSS
VSS DM1 VSS CK0
VSS
VSS
VSS
VSS DM2
VSS
VSS
VSS
VSS
VSS VDD
VDD
VDD
VDD BA1
VDD
VDD VSS
VSS DM4 VSS
VSS
VSS
VSS
VSS
VSS CK1
VSS DM6 VSS
VSS
VSS
VSS
VSS SAO SA1
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50
NC
52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90
A11
92
A7
94
A6
96 98
A4
100
A2
102
A0
104 106 108 110
S0#
112 114 116 118 120
NC
122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 204
DDRA_SDQ4 DDRA_SDQ5
DDRA_SDM0 DDRA_SDQ6
DDRA_SDQ7 DDRA_SDQ12
DDRA_SDQ13 DDRA_SDM1
DDRA_SDQ14 DDRA_SDQ15
DDRA_SDQ20 DDRA_SDQ21
DDRA_SDM2 DDRA_SDQ22
DDRA_SDQ23 DDRA_SDQ28
DDRA_SDQS3# DDRA_SDQS3
DDRA_SDQ30 DDRA_SDQ31
DDRA_CKE1DDRA_CKE0 DDRA_SMA15
DDRA_SMA14 DDRA_SMA11
DDRA_SMA7 DDRA_SMA6
DDRA_SMA4 DDRA_SMA2 DDRA_SMA0
DDRA_SBS1# DDRA_SRAS# DDRA_SCS0#
DDRA_ODT0 DDRA_SMA13
DDRA_SDQ36 DDRA_SDQ37
DDRA_SDM4 DDRA_SDQ38
DDRA_SDQ39 DDRA_SDQ44
DDRA_SDQ45 DDRA_SDQS5#
DDRA_SDQS5 DDRA_SDQ46
DDRA_SDQ47 DDRA_SDQ52
DDRA_SDQ53
DDRA_SDM6 DDRA_SDQ54
DDRA_SDQ55 DDRA_SDQ60
DDRA_SDQ61 DDRA_SDQS7#
DDRA_SDQS7 DDRA_SDQ62
DDRA_SDQ63
R36 10K_0402_5%R36 10K_0402_5%
1 2
R33 10K_0402_5%R33 10K_0402_5%
1 2
DDRA_CLK0 5 DDRA_CLK0# 5
DDRA_SDQS3# 5 DDRA_SDQS3 5
DDRA_CKE1 5
DDRA_SBS1# 5 DDRA_SRAS# 5 DDRA_SCS0# 5
DDRA_ODT0 5
DDRA_SDQS5# 5 DDRA_SDQS5 5
DDRA_CLK1 5 DDRA_CLK1# 5
DDRA_SDQS7# 5 DDRA_SDQS7 5
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SMA[0..15]
+V_DDR_MCH_REF
1
C238
C238
2
1000P_0402_25V8J
1000P_0402_25V8J
1
C239
C239
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDRA_SDQ[0..63] 5
DDRA_SDM[0..7] 5
DDRA_SMA[0..15] 5
+1.8V
R140
R140 1K_0402_1%
1K_0402_1%
1 2
R138
R138 1K_0402_1%
1K_0402_1%
1 2
+V_DDR_MCH_REF
RESERVE +V_DDR_MCH_REF BUFFER CIRCUIT
+0.9V
RP12 DDRA_SMA6 DDRA_SMA7 DDRA_SMA11 DDRA_SMA15
DDRA_CKE0 DDRA_SBS2# DDRA_SMA14 DDRA_CKE1
DDRA_SBS1# DDRA_SMA0 DDRA_SMA2 DDRA_SMA4
DDRA_SMA5 DDRA_SMA8 DDRA_SMA9 DDRA_SMA12
DDRA_SBS0# DDRA_SMA10 DDRA_SMA1 DDRA_SMA3
DDRA_SCS1# DDRA_ODT1 DDRA_SWE# DDRA_SCAS#
DDRA_SMA13 DDRA_ODT0 DDRA_SCS0# DDRA_SRAS#
RP12
1 8 2 7 3 6 4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
RP13
RP13
47_0804_8P4R_5%
47_0804_8P4R_5%
RP8
RP8
1 8 2 7 3 6 4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
RP11
RP11
47_0804_8P4R_5%
47_0804_8P4R_5%
RP7
RP7
47_0804_8P4R_5%
47_0804_8P4R_5%
RP3
RP3
47_0804_8P4R_5%
47_0804_8P4R_5%
RP4
RP4
1 8 2 7 3 6 4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
1 2
C147 0.1U_0402_16V4ZC147 0.1U_0402_16V4Z
1 2
C192 0.1U_0402_16V4ZC192 0.1U_0402_16V4Z
18
1 2
C176 0.1U_0402_16V4ZC176 0.1U_0402_16V4Z
27 36
1 2
C178 0.1U_0402_16V4ZC178 0.1U_0402_16V4Z
45
1 2
C184 0.1U_0402_16V4ZC184 0.1U_0402_16V4Z
1 2
C182 0.1U_0402_16V4ZC182 0.1U_0402_16V4Z
1 2
18
C140 0.1U_0402_16V4ZC140 0.1U_0402_16V4Z
27 36
1 2
C165 0.1U_0402_16V4ZC165 0.1U_0402_16V4Z
45
1 2
18
C190 0.1U_0402_16V4ZC190 0.1U_0402_16V4Z
27
1 2
36
C143 0.1U_0402_16V4ZC143 0.1U_0402_16V4Z
45
18
1 2
C153 0.1U_0402_16V4ZC153 0.1U_0402_16V4Z
27
1 2
36
C160 0.1U_0402_16V4ZC160 0.1U_0402_16V4Z
45
1 2
C166 0.1U_0402_16V4ZC166 0.1U_0402_16V4Z
1 2
C145 0.1U_0402_16V4ZC145 0.1U_0402_16V4Z
+1.8V
1
C33
C33
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2.2U_0805_10V6K
2.2U_0805_10V6K
A
1
C47
C47
2
DIMM1 REV H:5.2mm (BOT)
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/03/25 2008/12/20
2008/03/25 2008/12/20
2008/03/25 2008/12/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
401575
401575
401575
845Tuesday, August 19, 2008
845Tuesday, August 19, 2008
845Tuesday, August 19, 2008
E
D
D
D
A
+1.8V
JDIMM2
JDIMM2
+V_DDR_MCH_REF
1 1
2 2
3 3
4 4
DDRB_SDQS0#5 DDRB_SDQS05
DDRB_SDQS1#5 DDRB_SDQS15
DDRB_SDQS2#5 DDRB_SDQS25
DDRB_CKE05
DDRB_SBS2#5
DDRB_SBS0#5 DDRB_SWE#5
DDRB_SCAS#5 DDRB_SCS1#5
DDRB_ODT15
DDRB_SDQS4#5 DDRB_SDQS45
DDRB_SDQS6#5 DDRB_SDQS65
ICH_SMBDATA08,14,18,26 ICH_SMBCLK08,14,18,26
DDRB_SDQ0 DDRB_SDQ1
DDRB_SDQS0# DDRB_SDQS0
DDRB_SDQ2 DDRB_SDQ3
DDRB_SDQ8 DDRB_SDQ9
DDRB_SDQS1# DDRB_SDQS1
DDRB_SDQ10 DDRB_SDQ11
DDRB_SDQ16 DDRB_SDQ17
DDRB_SDQS2# DDRB_SDQS2
DDRB_SDQ18 DDRB_SDQ19
DDRB_SDQ24 DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ26 DDRB_SDQ30 DDRB_SDQ27
DDRB_CKE0
DDRB_SBS2# DDRB_SMA12
DDRB_SMA9 DDRB_SMA8
DDRB_SMA5 DDRB_SMA3 DDRB_SMA1
DDRB_SMA10 DDRB_SBS0# DDRB_SWE#
DDRB_SCAS# DDRB_SCS1#
DDRB_ODT1 DDRB_SDQ32
DDRB_SDQ33 DDRB_SDQS4#
DDRB_SDQS4 DDRB_SDQ34
DDRB_SDQ35 DDRB_SDQ40
DDRB_SDQ41 DDRB_SDM5 DDRB_SDQ42
DDRB_SDQ43 DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQS6# DDRB_SDQS6
DDRB_SDQ50 DDRB_SDQ51
DDRB_SDQ56 DDRB_SDQ57
DDRB_SDM7 DDRB_SDQ58
DDRB_SDQ59
ICH_SMBDATA0 ICH_SMBCLK0
+3VS
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
201
GND
FOX_AS0A426-MARG-7F
FOX_AS0A426-MARG-7F CONN@
CONN@
DIMM1 REV H:9.2mm (BOT)
A
VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7
VSS DQ12 DQ13
VSS
DM1
VSS CK0#
VSS DQ14 DQ15
VSS
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
NC/CKE1
VDD
NC/A15 NC/A14
VDD
VDD
VDD RAS#
VDD ODT0
NC/A13
VDD
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS CK1#
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
SAO
GND
B
+1.8V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
CK0
32 34 36 38 40
42 44 46 48 50
NC
52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90
A11
92
A7
94
A6
96 98
A4
100
A2
102
A0
104 106
BA1
108 110
S0#
112 114 116 118 120
NC
122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164
CK1
166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
SA1
202
B
DDRB_SDQ4 DDRB_SDQ5
DDRB_SDM0 DDRB_SDQ6
DDRB_SDQ7 DDRB_SDQ12
DDRB_SDQ13 DDRB_SDM1
DDRB_SDQ14 DDRB_SDQ15
DDRB_SDQ20 DDRB_SDQ21
DDRB_SDM2 DDRB_SDQ22
DDRB_SDQ23 DDRB_SDQ28
DDRB_SDQ29 DDRB_SDQS3#
DDRB_SDQS3
DDRB_SDQ31 DDRB_CKE1 DDRB_SMA15
DDRB_SMA14 DDRB_SMA11
DDRB_SMA7 DDRB_SMA6
DDRB_SMA4 DDRB_SMA2 DDRB_SMA0
DDRB_SBS1# DDRB_SRAS# DDRB_SCS0#
DDRB_ODT0 DDRB_SMA13
DDRB_SDQ36 DDRB_SDQ37
DDRB_SDM4 DDRB_SDQ38
DDRB_SDQ39 DDRB_SDQ44
DDRB_SDQ45 DDRB_SDQS5#
DDRB_SDQS5 DDRB_SDQ46
DDRB_SDQ47 DDRB_SDQ52
DDRB_SDQ53
DDRB_SDM6 DDRB_SDQ54
DDRB_SDQ55 DDRB_SDQ60
DDRB_SDQ61 DDRB_SDQS7#
DDRB_SDQS7 DDRB_SDQ62
DDRB_SDQ63
R330 10K_0402_5%R330 10K_0402_5%
1 2
R325 10K_0402_5%R325 10K_0402_5%
1 2
DDRB_CLK0 5 DDRB_CLK0# 5
DDRB_SDQS3# 5 DDRB_SDQS3 5
DDRB_CKE1 5
DDRB_SBS1# 5 DDRB_SRAS# 5 DDRB_SCS0# 5
DDRB_ODT0 5
DDRB_SDQS5# 5 DDRB_SDQS5 5
DDRB_CLK1 5 DDRB_CLK1# 5
DDRB_SDQS7# 5 DDRB_SDQS7 5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+3VS
C
DDRB_SMA[0..15]
330U_X_2VM_R6M
330U_X_2VM_R6M
Place near to DIMM2
+V_DDR_MCH_REF
1
1
C679
C679
2
2
@
@
@
@
1000P_0402_25V8J
1000P_0402_25V8J
AMD recommend
2008/03/25 2008/12/20
2008/03/25 2008/12/20
2008/03/25 2008/12/20
C
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
C32
C32
@
@
1
C680
C680
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8V
1
+
+
2
+V_DDR_MCH_REF
C687
C687
@
@
22U_0805_6.3V6M
22U_0805_6.3V6M
Compal Secret Data
Compal Secret Data
Compal Secret Data
DDRB_SDQ[0..63] 5
DDRB_SDM[0..7] 5
DDRB_SMA[0..15] 5
Deciphered Date
Deciphered Date
Deciphered Date
D
DDRB_SRAS# DDRB_SMA0 DDRB_SMA2 DDRB_SMA4
DDRB_SMA6 DDRB_SMA7 DDRB_SMA11 DDRB_SMA14
DDRB_CKE0 DDRB_SBS2# DDRB_SMA15 DDRB_CKE1
DDRB_SMA8 DDRB_SMA5 DDRB_SMA12 DDRB_SMA9
DDRB_SBS0# DDRB_SMA10 DDRB_SMA3 DDRB_SMA1
DDRB_ODT1 DDRB_SCS1# DDRB_SWE# DDRB_SCAS#
DDRB_SMA13 DDRB_ODT0 DDRB_SCS0# DDRB_SBS1#
D
RP5
RP5 1 8 2 7 3 6 4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
RP9
RP9 1 8 2 7 3 6 4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
RP14
RP14
47_0804_8P4R_5%
47_0804_8P4R_5%
RP10
RP10
47_0804_8P4R_5%
47_0804_8P4R_5%
RP6
RP6
47_0804_8P4R_5%
47_0804_8P4R_5%
RP1
RP1
47_0804_8P4R_5%
47_0804_8P4R_5%
RP2
RP2 1 8 2 7 3 6 4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
E
+0.9V
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
Custom
Custom
Custom
12
C187 0.1U_0402_16V4ZC187 0.1U_0402_16V4Z
1 2
C171 0.1U_0402_16V4ZC171 0.1U_0402_16V4Z
12
C146 0.1U_0402_16V4ZC146 0.1U_0402_16V4Z
1 2
C177 0.1U_0402_16V4ZC177 0.1U_0402_16V4Z
12
C173 0.1U_0402_16V4ZC173 0.1U_0402_16V4Z
1 2
C158 0.1U_0402_16V4ZC158 0.1U_0402_16V4Z
12
C144 0.1U_0402_16V4ZC144 0.1U_0402_16V4Z
1 2
C141 0.1U_0402_16V4ZC141 0.1U_0402_16V4Z
12
C161 0.1U_0402_16V4ZC161 0.1U_0402_16V4Z
1 2
C150 0.1U_0402_16V4ZC150 0.1U_0402_16V4Z
12
C148 0.1U_0402_16V4ZC148 0.1U_0402_16V4Z
1 2
C189 0.1U_0402_16V4ZC189 0.1U_0402_16V4Z
12
C181 0.1U_0402_16V4ZC181 0.1U_0402_16V4Z
1 2
C193 0.1U_0402_16V4ZC193 0.1U_0402_16V4Z
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Compal Electronics, Inc.
+1.8V
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
401575
401575
401575
945Tuesday, August 19, 2008
945Tuesday, August 19, 2008
945Tuesday, August 19, 2008
E
D
D
D
of
A
U22B
U22B
D4
GFX_RX0P
C4
GFX_RX0N
A3
GFX_RX1P
B3
1 1
2 2
PCIE_PTX_C_IRX_N027
PCIE_PTX_C_IRX_P226 PCIE_PTX_C_IRX_N226 PCIE_PTX_C_IRX_P324 PCIE_PTX_C_IRX_N324 PCIE_PTX_C_IRX_P423 PCIE_PTX_C_IRX_N423
SB_RX0P17 SB_RX0N17 SB_RX1P17 SB_RX1N17 SB_RX2P17 SB_RX2N17 SB_RX3P17 SB_RX3N17
GFX_RX1N
C2
GFX_RX2P
C1
GFX_RX2N
E5
GFX_RX3P
F5
GFX_RX3N
G5
GFX_RX4P
G6
GFX_RX4N
H5
GFX_RX5P
H6
GFX_RX5N
J6
GFX_RX6P
J5
GFX_RX6N
J7
GFX_RX7P
J8
GFX_RX7N
L5
GFX_RX8P
L6
GFX_RX8N
M8
GFX_RX9P
L8
GFX_RX9N
P7
GFX_RX10P
M7
GFX_RX10N
P5
GFX_RX11P
M5
GFX_RX11N
R8
GFX_RX12P
P8
GFX_RX12N
R6
GFX_RX13P
R5
GFX_RX13N
P4
GFX_RX14P
P3
GFX_RX14N
T4
GFX_RX15P
T3
GFX_RX15N
AE3
GPP_RX0P
AD4
GPP_RX0N
AE2
GPP_RX1P
AD3
GPP_RX1N
AD1
GPP_RX2P
AD2
GPP_RX2N
V5
GPP_RX3P
W6
GPP_RX3N
U5
GPP_RX4P
U6
GPP_RX4N
U8
GPP_RX5P
U7
GPP_RX5N
AA8
SB_RX0P
Y8
SB_RX0N
AA7
SB_RX1P
Y7
SB_RX1N
AA5
SB_RX2P
AA6
SB_RX2N
W5
SB_RX3P
Y5
SB_RX3N
RS780M_FCBGA528
RS780M_FCBGA528
PART 2 OF 6
PART 2 OF 6
PCIE I/F GFX
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN)
RS780MN-SA00002DR30 Ver:A13
3 3
4 4
RS780M Display Port Support (muxed on GFX)
DP0
DP1
GFX_TX0,TX1,TX2 and TX3 AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7 AUX1 and HPD1
GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N
SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N
B
A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2
PCIE_ITX_PRX_P0
AC1
PCIE_ITX_PRX_N0
AC2 AB4 AB3
PCIE_ITX_PRX_P2
AA2
PCIE_ITX_PRX_N2
AA1
PCIE_ITX_PRX_P3
Y1
PCIE_ITX_PRX_N3
Y2
PCIE_ITX_PRX_P4
Y4
PCIE_ITX_PRX_N4
Y3 V1 V2
SB_TX0P_C
AD7
SB_TX0N_C
AE7
SB_TX1P_C
AE6
SB_TX1N_C
AD6
SB_TX2P_C
AB6
SB_TX2N_C
AC6
SB_TX3P_C
AD5
SB_TX3N_C
AE5 AC8
AB8
C600 0.1U_0402_16V7KC600 0.1U_0402_16V7K
1 2
C601 0.1U_0402_16V7KC601 0.1U_0402_16V7K
1 2
C5 0.1U_0402_16V7KC5 0.1U_0402_16V7K
1 2
C4 0.1U_0402_16V7KC4 0.1U_0402_16V7K
1 2
C6 0.1U_0402_16V7KC6 0.1U_0402_16V7K
1 2
C7 0.1U_0402_16V7KC7 0.1U_0402_16V7K
1 2
C14 0.1U_0402_16V7KC14 0.1U_0402_16V7K
1 2
C13 0.1U_0402_16V7KC13 0.1U_0402_16V7K
1 2
C244 0.1U_0402_16V7KC244 0.1U_0402_16V7K
1 2
C242 0.1U_0402_16V7KC242 0.1U_0402_16V7K
1 2
C250 0.1U_0402_16V7KC250 0.1U_0402_16V7K
1 2
C251 0.1U_0402_16V7KC251 0.1U_0402_16V7K
1 2
C236 0.1U_0402_16V7KC236 0.1U_0402_16V7K
1 2
C234 0.1U_0402_16V7KC234 0.1U_0402_16V7K
1 2
C243 0.1U_0402_16V7KC243 0.1U_0402_16V7K
1 2
C241 0.1U_0402_16V7KC241 0.1U_0402_16V7K
1 2 1 2
1 2
R29 1.27K_0402_1%R29 1.27K_0402_1% R32 2K_0402_1%R32 2K_0402_1%
+1.1VS
C
PCIE_ITX_C_PRX_P0 27PCIE_PTX_C_IRX_P027 PCIE_ITX_C_PRX_N0 27
PCIE_ITX_C_PRX_P2 26 PCIE_ITX_C_PRX_N2 26 PCIE_ITX_C_PRX_P3 24 PCIE_ITX_C_PRX_N3 24 PCIE_ITX_C_PRX_P4 23 PCIE_ITX_C_PRX_N4 23
SB_TX0P 17 SB_TX0N 17 SB_TX1P 17 SB_TX1N 17 SB_TX2P 17 SB_TX2N 17 SB_TX3P 17 SB_TX3N 17
New Card
Mini1 GLAN Card Reader
H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15
H_CLKOP04 H_CLKON04 H_CLKOP14 H_CLKON14
H_CTLOP04 H_CTLON04
H_CTLON14
0718 Place within 1" layout 1:2
H_CTLOP0 H_CTLON0 H_CTLOP1 H_CTLON1
R67
R67
1 2
301_0402_1%~D
301_0402_1%~D
D
HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N
HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P
HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP HT_TXCALN
H_CADIP[0..15]H_CADOP[0..15] H_CADIN[0..15]
D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22
F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18
H24 H25 L21 L20
M24 M25 P19 R18
B24 B25
H_CTLIP0 H_CTLIN0 H_CTLIP1 H_CTLIN1
H_CADOP[0..15]4 H_CADON[0..15]4 H_CADIN[0..15] 4
H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7
H_CADOP8 H_CADON8 H_CADOP9 H_CADON9
AC24 AC25 AB25 AB24 AA24 AA25
W21 W20
AB23 AA22
M22 M23
Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25
Y22 Y23
V21 V20 U20 U21 U19 U18
T22 T23
R21 R20
C23 A24
H_CADON[0..15]
U22A
U22A
HT_RXCAD0P
PART 1 OF 6
PART 1 OF 6
HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N
HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N
HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N
HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N
HT_RXCALP HT_RXCALN
RS780M_FCBGA528
RS780M_FCBGA528
RS780MN-SA00002DR30 Ver:A13
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
E
H_CADIP[0..15] 4
H_CADIP0 H_CADIN0 H_CADIP1 H_CADIN1 H_CADIP2 H_CADIN2 H_CADIP3 H_CADIN3 H_CADIP4 H_CADIN4 H_CADIP5 H_CADIN5 H_CADIP6 H_CADIN6 H_CADIP7 H_CADIN7
H_CADIP8 H_CADIN8 H_CADIP9
H_CADIN9 H_CADIP10 H_CADIN10 H_CADIP11 H_CADIN11 H_CADIP12 H_CADIN12 H_CADIP13 H_CADIN13 H_CADIP14 H_CADIN14 H_CADIP15 H_CADIN15
H_CLKIP0 4 H_CLKIN0 4 H_CLKIP1 4 H_CLKIN1 4
H_CTLIP0 4
H_CTLIN0 4
H_CTLIP1 4H_CTLOP14
H_CTLIN1 4
R71
R71
1 2
301_0402_1%~D
301_0402_1%~D
0718 Place within 1" layout 1:2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/03/25 2008/12/20
2008/03/25 2008/12/20
2008/03/25 2008/12/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
401575
401575
401575
10 45Tuesday, August 19, 2008
10 45Tuesday, August 19, 2008
10 45Tuesday, August 19, 2008
E
D
D
D
of
A
B
C
D
E
Need check 140_0402_1% stock
1 2
MBK2012121YZF 0805
MBK2012121YZF 0805
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1 2
R38
R38
4.7K_0402_5%
4.7K_0402_5%
GMCH_CRT_R GMCH_CRT_G GMCH_CRT_B
L43
L43
C400
C400
1 2
R39
R39
4.7K_0402_5%
4.7K_0402_5%
+NB_PLLVDD
1
2
POWER_SEL40
+1.8VS
1 2
MBK2012170YZF_0805
MBK2012170YZF_0805
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
PLT_RST#13,17,23,24,26,27,28
NB_PWRGD18
CLK_NB_14.318M14
Strap pin
+3VS
1 2 R55 140_0402_1%R55 140_0402_1%
1 2
1 1
R52 150_0402_1%R52 150_0402_1% 1 2
R58 150_0402_1%R58 150_0402_1%
Very Close to U22
+NB_HTPVDD+1.8VS
L10
L10
1 2
MBK2012121YZF 0805
MBK2012121YZF 0805
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
+1.8VS
1 2
MBK2012121YZF 0805
MBK2012121YZF 0805
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2 2
+1.8VS
1 2
MBK2012121YZF 0805
MBK2012121YZF 0805
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
+3VS
R323 4.7K_0402_5%R323 4.7K_0402_5%
3 3
1 2
R322 4.7K_0402_5%R322 4.7K_0402_5%
1 2
R488 4.7K_0402_5%R488 4.7K_0402_5%
1 2
R489 4.7K_0402_5%R489 4.7K_0402_5%
1 2
L24
L24
L5
L5
C78
C78
+VDDA18HTPLL
C136
C136
C24
C24
1
2
1
2
+VDDA18PCIEPLL
1
2
+1.1VS
GMCH_LCD_CLK GMCH_LCD_DATA GMCH_CRT_CLK GMCH_CRT_DATA
+1.1VS
+3VS
MBK2012170YZF_0805
MBK2012170YZF_0805
+1.8VS
MBK2012170YZF_0805
MBK2012170YZF_0805
L25
L25
1
C142
C142
2
GMCH_CRT_HSYNC13,16 GMCH_CRT_VSYNC13,16
+1.8VS
CLK_NBGFX14 CLK_NBGFX#14
CLK_SBLINK_BCLK14 CLK_SBLINK_BCLK#14
12
R327 10K_0402_5%R327 10K_0402_5%
POWER_SEL
R552 2K_0402_1%
R552 2K_0402_1%
1 2
@
@
L7
L7
1 2
L23
L23
1 2
C135
C135
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
+AVDDQ
GMCH_CRT_R16 GMCH_CRT_G16 GMCH_CRT_B16
GMCH_CRT_CLK16 GMCH_CRT_DATA16
R319
R319
1 2 1 2
R326 300_0402_5%R326 300_0402_5%
R47 715_0402_1%R47 715_0402_1%
+NB_PLLVDD
+NB_HTPVDD
+VDDA18HTPLL
+VDDA18PCIEPLL
0_0402_5%
0_0402_5%
CLK_NBHT14 CLK_NBHT#14
GMCH_LCD_CLK15
GMCH_LCD_DATA15
+AVDD1
22U_0805_6.3V6M
22U_0805_6.3V6M
+AVDD2
1
2
GMCH_CRT_R GMCH_CRT_G GMCH_CRT_B
GMCH_CRT_HSYNC GMCH_CRT_VSYNC
GMCH_CRT_CLK GMCH_CRT_DATA
1 2
+NB_PLLVDD +NB_HTPVDD
NB_LDTSTOP#
NB_ALLOW_LDTSTOP
GMCH_LCD_CLK GMCH_LCD_DATA
AUX_CAL13
Strap pin
AVDD=100mA
C29
C29
1
2
NB_RESET#
U22C
U22C
F12
AVDD1(NC)
E12
AVDD2(NC)
F14
AVDDDI(NC)
G15
AVSSDI(NC)
H15
AVDDQ(NC)
H14
AVSSQ(NC)
E17
C_Pr(DFT_GPIO5)
F17
Y(DFT_GPIO2)
F15
COMP_Pb(DFT_GPIO4)
G18
RED(DFT_GPIO0)
G17
REDb(NC)
E18
GREEN(DFT_GPIO1)
F18
GREENb(NC)
E19
BLUE(DFT_GPIO3)
F19
BLUEb(NC)
A11
DAC_HSYNC(PWM_GPIO4)
B11
DAC_VSYNC(PWM_GPIO6)
F8
DAC_SCL(PCE_RCALRN)
E8
DAC_SDA(PCE_TCALRN)
G14
DAC_RSET(PWM_GPIO1)
A12
PLLVDD(NC)
D14
PLLVDD18(NC)
B12
PLLVSS(NC)
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESETb
A10
POWERGOOD
C10
LDTSTOPb
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN(OSCIN)
F11
REFCLK_N(PWM_GPIO3)
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP(SB_REFCLKP)
V3
GPPSB_REFCLKN(SB_REFCLKN)
B9
I2C_CLK
A9
I2C_DATA
B8
DDC_DATA0/AUX0N(NC)
A8
DDC_CLK0/AUX0P(NC)
B7
DDC_CLK1/AUX1P(NC)
A7
DDC_DATA1/AUX1N(NC)
B10
STRP_DATA
G11
RSVD
C8
AUX_CAL(NC)
RS780M_FCBGA528
RS780M_FCBGA528
PART 3 OF 6
PART 3 OF 6
TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U3P(PCIE_RESET_GPIO5)
CRT/TVOUT
CRT/TVOUT
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)
LVTM
LVTM
PM
PM
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
CLOCKs PLL PWR
CLOCKs PLL PWR
MIS.
MIS.
SUS_STAT#(PWM_GPIO5)
TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U2P(NC) TXOUT_U2N(NC)
TXOUT_U3N(NC)
TXCLK_LP(DBG_GPIO1) TXCLK_LN(DBG_GPIO3)
VDDLTP18(NC) VSSLTP18(NC)
VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)
VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)
TMDS_HPD(NC)
HPD(NC)
THERMALDIODE_P
THERMALDIODE_N
TESTMODE
A22 B22 A21 B21 B20 A20 A19 B19
B18 A18 A17 B17 D20 D21 D18 D19
B16 A16 D16 D17
A13 B13
A15 B15 A14 B14
C14 D15 C16 C18 C20 E20 C22
E9 F7 G12
D9 D10
R6 10K_0402_5%@R6 10K_0402_5%@
D12 AE8
AD8 D13
1.8K_0402_5%
1.8K_0402_5%
+VDDLT18
R14
R14
1 2
1.27K_0402_1%
1.27K_0402_1%
1 2
R7 0_0402_5%R7 0_0402_5%
1 2
R343
R343
GMCH_TXOUT0+ 15 GMCH_TXOUT0- 15 GMCH_TXOUT1+ 15 GMCH_TXOUT1- 15 GMCH_TXOUT2+ 15 GMCH_TXOUT2- 15
GMCH_TZOUT0+ 15 GMCH_TZOUT0- 15 GMCH_TZOUT1+ 15 GMCH_TZOUT1- 15 GMCH_TZOUT2+ 15 GMCH_TZOUT2- 15
GMCH_TXCLK+ 15 GMCH_TXCLK- 15 GMCH_TZCLK+ 15 GMCH_TZCLK- 15
1 2
R11 0_0402_5%R11 0_0402_5%
1 2
R12 0_0402_5%R12 0_0402_5%
R13
R13
1 2
1.27K_0402_1%
1.27K_0402_1%
12
SUS_STAT# 18 SUS_STAT_R# 13 NB_THERMAL_DA 19 NB_THERMAL_DC 19
+VDDLTP18+VDDLTP18
+VDDLT18
C100
C100
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Strap pin
1 2
MBC1608121YZF_0603
MBC1608121YZF_0603
1
C409
C409
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
1
1
C414
C414
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
2
GMCH_ENVDD 15 ENBKL 28
NB temp to SB
L45
L45
L49
L49
1 2
MBC1608121YZF_0603
MBC1608121YZF_0603
+1.8VS
+1.8VS
RS780MN-SA00002DR30 Ver:A13
+3VS
+1.8VS
G
G
2
13
D
S
D
LDT_STOP#6,17
4 4
S
Q2 FDV301N_NL_SOT23-3
Q2 FDV301N_NL_SOT23-3
@
@
R85 0_0402_5%R85 0_0402_5%
1 2
@
@
R86
R86
4.7K_0402_5%
4.7K_0402_5%
1 2
NB_LDTSTOP#
0_0402_5%
0_0402_5%
CPU_LDT_REQ#6
ALLOW_LDTSTOP17
1 2
R406
R406
1 2
+1.8VS+1.8VS
R519
R519
300_0402_5%
300_0402_5%
G
G
S
S
Q49 FDV301N_NL_SOT23-3
Q49 FDV301N_NL_SOT23-3
R553 0_0402_5%R553 0_0402_5%
1 2
+3VS
R411
@ R411
@
4.7K_0402_5%
4.7K_0402_5%
2
@
@
1 2
13
D
D
NB_ALLOW_LDTSTOP
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
2008/03/25 2008/12/20
2008/03/25 2008/12/20
2008/03/25 2008/12/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
401575
401575
401575
11 45Tuesday, August 19, 2008
11 45Tuesday, August 19, 2008
11 45Tuesday, August 19, 2008
E
D
D
D
A
1 1
For ver:A12, use 1.2HT
2 2
+1.8VS
3 3
4 4
+1.1VS
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
L20
+1.2V_HT
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
L20
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
1
C51
C51 22U_0805_6.3V6M
22U_0805_6.3V6M
2
2A
L22
L22
12
L8
L8
12
22U_0805_6.3V6M
22U_0805_6.3V6M
L14
L14
22U_0805_6.3V6M
22U_0805_6.3V6M
C44
C44
12
C95
C95
22U_0805_6.3V6M
22U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
2A
1
C139
C139
2
2A
C129
C129
22U_0805_6.3V6M
22U_0805_6.3V6M
2A
1
C26
C26
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C102
C102
2
1
C121
C121
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C108
C108
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C52
C52
2
+1.8VS
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
1
C103
C103
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C132
C132
C115
C115
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C128
C128
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C45
C45
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C398
C398
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C101
C101
C106
C106
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C127
C127
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C118
C118
C117
C117
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C46
C46
C43
C43
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
+VDDHTRX
+VDDHT
0.68A
1
2
0.68A
+VDDHTTX
1
2
+VDDA18PCIE
0.6A
1
2
0.64A
B
U22E
U22E
J17
VDDHT_1
M16 R16
H18 G19
D22
AE25 AD24 AC23 AB22 AA21
W19 U17 R17 M17
M10
R10 AA9
AB9 AD9 AE9 U10
AE11 AD11
K16 L16
P16 T16
F20 E21
B23 A23
Y20 V18 T17 P17
J10 P10 K10
L10 W9
H9
T10
Y9
F9
G9
PART 5/6
PART 5/6
VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7
VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7
VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13
VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15
VDD18_1 VDD18_2 VDD18_MEM1(NC) VDD18_MEM2(NC)
RS780M_FCBGA528
RS780M_FCBGA528
RS780MN-SA00002DR30 Ver:A13
VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8
VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17
VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8
VDDC_9 VDDC_10 VDDC_11 VDDC_12
POWER
POWER
VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22
VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)
VDD33_1(NC) VDD33_2(NC)
VDDA_12=2.5A
A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9
K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16
AE10 AA11 Y11 AD10 AB10 AC10
H11 H12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C
R571 0_0805_5%
R571 0_0805_5%
1 2
+VDDA11PCIE
1.1A
+1.1VS +NB_CORE
C16 22U_0805_6.3V6M
C16 22U_0805_6.3V6M C15 22U_0805_6.3V6M
C15 22U_0805_6.3V6M C25 1U_0402_6.3V4ZC25 1U_0402_6.3V4Z
C41 1U_0402_6.3V4ZC41 1U_0402_6.3V4Z C30 1U_0402_6.3V4ZC30 1U_0402_6.3V4Z C27 1U_0402_6.3V4ZC27 1U_0402_6.3V4Z
C42 0.1U_0402_16V4ZC42 0.1U_0402_16V4Z C34 0.1U_0402_16V4ZC34 0.1U_0402_16V4Z
L2 FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805 L1
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
7.6A
C930.1U_0402_16V4Z C930.1U_0402_16V4Z
C920.1U_0402_16V4Z C920.1U_0402_16V4Z
C900.1U_0402_16V4Z C900.1U_0402_16V4Z
C540.1U_0402_16V4Z C540.1U_0402_16V4Z
C850.1U_0402_16V4Z C850.1U_0402_16V4Z
1
1
1
1
1
2
2
2
2
2
1
1
C55
C55
C86
C86
2
2
1 2 1 2
1 2 1 2 1 2 1 2
1 2 1 2
@L2
@
1 2
@L1
@
1 2
VDD_CORE=5A
C790.1U_0402_16V4Z C790.1U_0402_16V4Z
C970.1U_0402_16V4Z C970.1U_0402_16V4Z
C880.1U_0402_16V4Z C880.1U_0402_16V4Z
1
1
1
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
B0 use 10u x 2
C890.1U_0402_16V4Z C890.1U_0402_16V4Z
C1722U_0805_6.3V6M C1722U_0805_6.3V6M
1
2
2
1
+3VS+1.8VS
D
U22F
U22F
A25
VSSAHT1
D23
VSSAHT2
E22
VSSAHT3
G22
VSSAHT4
G24
VSSAHT5
G25
VSSAHT6
H19
VSSAHT7
J22
VSSAHT8
L17
VSSAHT9
L22
VSSAHT10
L24
VSSAHT11
+1.1VS
330U_D2E_2.5VM
330U_D2E_2.5VM
1
C1822U_0805_6.3V6M C1822U_0805_6.3V6M
C10
C10
2
+
+
2
1
L25
VSSAHT12
M20
VSSAHT13
N22
VSSAHT14
P20
VSSAHT15
R19
VSSAHT16
R22
VSSAHT17
R24
VSSAHT18
R25
VSSAHT19
H20
VSSAHT20
U22
VSSAHT21
V19
VSSAHT22
W22
VSSAHT23
W24
VSSAHT24
W25
VSSAHT25
Y21
VSSAHT26
AD25
VSSAHT27
L12
VSS11
M14
VSS12
N13
VSS13
P12
VSS14
P15
VSS15
R11
VSS16
R14
VSS17
T12
VSS18
U14
VSS19
U11
VSS20
U15
VSS21
V12
VSS22
W11
VSS23
W15
VSS24
AC12
VSS25
AA14
VSS26
Y18
VSS27
AB11
VSS28
AB15
VSS29
AB17
VSS30
AB19
VSS31
AE20
VSS32
AB21
VSS33
K11
VSS34
RS780M_FCBGA528
RS780M_FCBGA528
RS780MN-SA00002DR30 Ver:A13
U22D
U22D
AB12
MEM_A0(NC)
AE16
MEM_A1(NC)
V11
MEM_A2(NC)
AE15
MEM_A3(NC)
AA12
MEM_A4(NC)
AB16
MEM_A5(NC)
AB14
MEM_A6(NC)
AD14
MEM_A7(NC)
AD13
MEM_A8(NC)
AD15
MEM_A9(NC)
AC16
MEM_A10(NC)
AE13
MEM_A11(NC)
AC14
MEM_A12(NC)
Y14
MEM_A13(NC)
AD16
MEM_BA0(NC)
AE17
MEM_BA1(NC)
AD17
MEM_BA2(NC)
W12
MEM_RASb(NC)
Y12
MEM_CASb(NC)
AD18
MEM_WEb(NC)
AB13
MEM_CSb(NC)
AB18
MEM_CKE(NC)
V14
MEM_ODT(NC)
V15
MEM_CKP(NC)
W14
MEM_CKN(NC)
AE12
MEM_COMPP(NC)
AD12
MEM_COMPN(NC)
RS780M_FCBGA528
RS780M_FCBGA528
RS780MN-SA00002DR30 Ver:A13
VSSAPCIE1
PART 6/6
PART 6/6
VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8
VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30
GROUND
GROUND
VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9
VSS10
PAR 4 OF 6
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)
MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC) MEM_DQS1N(NC)
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
IOPLLVDD18(NC)
IOPLLVDD(NC)
MEM_VREF(NC)
IOPLLVSS(NC)
A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2
AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15
E
AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21
Y17 W18 AD20 AE21
W17 AE19
AE23 AE24
AD23 AE18
1 2
R349 0_0402_5%R349 0_0402_5%
+1.8VS
+1.1VS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/03/25 2008/12/20
2008/03/25 2008/12/20
2008/03/25 2008/12/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
401575
401575
401575
12 45Tuesday, August 19, 2008
12 45Tuesday, August 19, 2008
12 45Tuesday, August 19, 2008
E
D
D
D
A
B
C
D
E
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
GMCH_CRT_VSYNC11,16
1 1
12
R337 3K_0402_5%R337 3K_0402_5%
12
R336 3K_0402_5%@R336 3K_0402_5%@
+3VS
Enables the Test Debug Bus using GPIO. (VSYNC) 1 : Disable (RS780) 0 : Enable (Rs780)
DFT_GPIO1: LOAD_EEPROM_STRAPS
AUX_CAL11
RS780 DFT_GPIO1
2 2
SUS_STAT_R#11 PLT_RST# 11,17,23,24,26,27,28
1 2
R315 150_0402_1%@R315 150_0402_1%@
@
@
2 1
D20 CH751H-40PT_SOD323-2
D20 CH751H-40PT_SOD323-2
Selects Loading of STRAPS from EPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected RS740/RX780: DFT_GPIO1 RS780:SUS_STAT
RS780 use HSYNC to enable SIDE PORT
RS780 use HSYNC to enable SIDE PORT
GMCH_CRT_HSYNC11,16
12
R332 3K_0402_5%R332 3K_0402_5%
@
@
12
R331 3K_0402_5%
R331 3K_0402_5%
+3VS
RS740/RS780: Enables Side port memory ( RS780 use HSYNC#)
0. Enable (RS780) 1 : Disable(RS780)
3 3
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/03/25 2008/12/20
2008/03/25 2008/12/20
2008/03/25 2008/12/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
401575
401575
401575
13 45Tuesday, August 19, 2008
13 45Tuesday, August 19, 2008
13 45Tuesday, August 19, 2008
E
D
D
D
of
5
+1.2V_HT
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
D D
C290
C290
22P_0402_50V8J
22P_0402_50V8J
C C
+VDDCLK_IO
L32
L32
1 2
1
2
1
C260
C260
2
22U_0805_6.3V6M
22U_0805_6.3V6M
CLK_XTAL_OUT CLK_XTAL_IN
Y4
Y4
12
14.31818MHZ_20P_6X1430004201
14.31818MHZ_20P_6X1430004201 1
C288
C288 22P_0402_50V8J
22P_0402_50V8J
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
1
C264
C264
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C298
C298
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
+3VS_CLK
+3VS_CLK
1
C293
C293
2
L33
L33
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C280
C280
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS_CLKVDDA
1
C258
C258
2
C277
C277
+VDDCLK_IO
+3VS_CLK
Routing the trace at least 10mil
1 2
1 2
R490 8.2K_0402_5%R490 8.2K_0402_5%
R162 8.2K_0402_5%R162 8.2K_0402_5%
NewCard request MiniCard1 request
B B
+3VS_CLK
R181
R181
8.2K_0402_5% @
8.2K_0402_5% @
1 2
R182
R182
8.2K_0402_5%
8.2K_0402_5%
A A
1 2
EXP_CLKREQ#27 MINI1_CLKREQ#26
For LPC Debug
R187
R187
@
@
8.2K_0402_5%
8.2K_0402_5%
1 2
SEL_SATA
SEL_HT66
R188
R188
8.2K_0402_5%
8.2K_0402_5%
1 2
1 2
R178 100_0402_5%R178 100_0402_5%
CLK_NB_14.318M11
CLK_14M_SIO28
CLK_48M_USB18
R179 200_0402_1%R179 200_0402_1%
@
@
1 2
R260 0_0402_5%
R260 0_0402_5%
Main--SLG8SP626VTR-SA00001Z310 Second--ICS9LPRS488CKLFT-SA000023H10
1
C269
C269
2
1
C265
C265
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+VDD48
1 2
SEL_HT66
R193
R193
33_0402_5%
33_0402_5%
CLK_XTAL_IN CLK_XTAL_OUT
4
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
C263
C263
2
CLK_14.318M SEL_SATA
CLK_48M
12
+3VS
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
U15
U15
ICS 9LPRS488
49 48
62 66
12 18 28 37 53
17 29 38 44 54 61 69
24 51 50 43 42
63 64 65
71 70
67 68
11 19 27 36 47 52 58 72 73
ICS 9LPRS488
VDDA GNDA
VDDREF GNDREF
VDDSRC_IO VDDSRC_IO VDDATIG_IO VDDSB_SRC_IO VDDCPU_IO
3
VDDDOT VDDSRC VDDATIG VDDSB_SRC VDDSATA VDDCPU VDDHTT VDD48
CLKREQ0 # CLKREQ1# CLKREQ2# CLKREQ3# CLKREQ4#
REF2/SEL_27 REF1/SEL_SATA REF0/SEL_HTT66
48MHz_0 48MHz_1
X1 X2
6
GNDDOT GNDSRC GNDSRC GNDATIG GNDSB_SRC GNDSATA GNDCPU GNDHTT GND48 GNDPAD
ICS9LPRS488AKLFT_MLF72_10x10
ICS9LPRS488AKLFT_MLF72_10x10
+3VS_CLK
L31
L31
1 2
SB_SRC_SLOW#
CPUKG0T_LPRS
CPUKG0C_LPRS
HTT0T_LPRS / 66 M HTT0C_LPRS / 66 M
SB_SRC0T_LPRS
SB_SRC0C_LPRS
SB_SRC1T_LPRS
SB_SRC1C_LPRS
ATIG0T_LPRS
ATIG0C_LPRS
ATIG1T_LPRS
ATIG1C_LPRS
ATIG2T_LPRS
ATIG2C_LPRS
SRC0T_LPRS
SRC0C_LPRS
SRC1T_LPRS
SRC1C_LPRS
SRC2T_LPRS
SRC2C_LPRS
SRC3T_LPRS
SRC3C_LPRS
SRC4T_LPRS
SRC4C_LPRS
SRC5T_LPRS
SRC5C_LPRS
SRC6T/SATAT_LPRS
SRC6C/SATAC_LPRS
SRC7T_LPRS/27MHz_SS SRC7C_LPRS/27MHz_NS
SMBCLK SMBDAT
PD#
1
2
C256
C256 22U_0805_6.3V6M
22U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
SRC_SLOW
41
56 55
60 59
40 39
35 34
33 32
31 30
26 25
23 22
21 20
16 15
14 13
10 9
8 7
46 45
5 4
57
D39
D39 @
@
3
1
C267
C267
2
CLK_CPU CLK_CPU#
CLK_HTT CLK_HTT#
CLK_ATIG0 CLK_ATIG0#
CLK_SRC0 CLK_SRC0#
CLK_SRC1 CLK_SRC1#
CLK_SRC2 CLK_SRC2#
CLK_SRC4 CLK_SRC4#
CLK_SRC5 CLK_SRC5#
CLK_SRC6 CLK_SRC6#
2
3
PSOT24C_SOT23
PSOT24C_SOT23
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
2
+3VS
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
1 2
R170 0_0402_5%R170 0_0402_5%
1 2
R168 0_0402_5%R168 0_0402_5%
1 2
R175 0_0402_5%R175 0_0402_5%
1 2
R172 0_0402_5%R172 0_0402_5%
1 2
R174 0_0402_5%R174 0_0402_5%
1 2
R176 0_0402_5%R176 0_0402_5%
1 2
R189 0_0402_5%R189 0_0402_5%
1 2
R190 0_0402_5%R190 0_0402_5%
1 2
R491 0_0402_5%R491 0_0402_5%
1 2
R492 0_0402_5%R492 0_0402_5%
1 2
R197 0_0402_5%R197 0_0402_5%
1 2
R196 0_0402_5%R196 0_0402_5%
1 2
R200 0_0402_5%R200 0_0402_5%
1 2
R199 0_0402_5%R199 0_0402_5%
1 2
R208 0_0402_5%R208 0_0402_5%
1 2
R207 0_0402_5%R207 0_0402_5%
R163
R163
1 2
R164
R164
1 2
R173 8.2K_0402_5%R173 8.2K_0402_5%
2
C676
@ C676
@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
1
C278
C278
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
L34
L34
1 2
ICH_SMBCLK0 8,9,18,26
ICH_SMBDATA0 8,9,18,26
0_0402_5%
0_0402_5% 0_0402_5%
0_0402_5%
12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C296
C296
1
C295
C295
2
+VDD48
1
C287
C287
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
R169
R169 261_0402_1%~D
261_0402_1%~D @
@
CLK_NBGFX 11 CLK_NBGFX# 11
CLK_PCIE_LAN 24 CLK_PCIE_LAN# 24
CLK_PCIE_CARD 27 CLK_PCIE_CARD# 27
CLK_PCIE_MINI1 26 CLK_PCIE_MINI1# 26
CLK_SBLINK_BCLK 11 CLK_SBLINK_BCLK# 11
CLK_PCIE_READER 23 CLK_PCIE_READER# 23
CLK_SBSRC_BCLK 17 CLK_SBSRC_BCLK# 17
+3VS_CLK
1
C274
C274
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C292
C292
2.2U_0805_10V6K
2.2U_0805_10V6K
2
CLK_NBHT 11 CLK_NBHT# 11
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
C262
C262
2
CLK_CPU_BCLK 6
CPU
CLK_CPU_BCLK# 6
NB HTT
NB GFX
GLAN
New Card
MiniCard_1
NB A LINK
Card Reader
SB RCLK
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C266
C266
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C268
C268
1
C294
C294
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
1U CLOSE PIN 69
SRC_SLOW
SRC 0
LAN NEW CARD
SRC 1
MINI1 (WLAN)
SRC 2 SRC 3
NB-Alink
SRC 4 SRC 5
CardReader
SRC 6
SB-Alink
NB CLOCK INPUT TABLE
NB CLOCKS HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK GPP_REFCLK GPPSB_REFCLK 100M DIFF 100M DIFF
RS740 RX780 RS780
66M SE(SINGLE END)
NC
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V) NC NC vref
100M DIFF NC 100M DIFF
100M DIFF 100M DIFF
100M DIFF 100M DIFF
C297
C297 1U_0402_6.3V4Z
1U_0402_6.3V4Z
+3VS_CLK
12
12
@
@
100M DIFF 100M DIFF
100M DIFF(IN/OUT)*
NC
R161
R161
8.2K_0402_5%
8.2K_0402_5%
R167
R167
8.2K_0402_5%
8.2K_0402_5%
ESD solution
SEL_HTT66
SEL_SATA
* default
configure as single-ended 66MHz output
1
*0
configure as differential 100MHz output
1*
100M SATA SRC6 output SPREAD 100M SATA SRC6 output
0
5
NB_OSC_14.318M
configure as 27M and 27M_SS output
1
*0
configure as SRC_7 output
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/03/25 2008/12/20
2008/03/25 2008/12/20
2008/03/25 2008/12/20
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
SCHEMATICS, MB A4391
401575
401575
401575
14 45Tuesday, August 19, 2008
14 45Tuesday, August 19, 2008
14 45Tuesday, August 19, 2008
1
D
D
D
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