COMPAL LA-4241P Schematics

A

hexainf@hotmail.com

ZZZ1

PCB

14WDAZ@

1 1

ZZZ2

ZZZ3

LA-4241P

14WDA@

ZZZ8

ZZZ4

LS-4243P

14WDA@

ZZZ9

ZZZ5

LS-4244P

14WDA@

ZZZ10

ZZZ6

LS-4249P

14WDA@

ZZZ11

ZZZ12

B

PJP1

14W_DCIN

14W_45@

ZZZ13

12/21 Add PJP1 for DCIN Cable on 45 Level One for 14W DCIN , PN: DC301001Y00

C

PJP1

15W_DCIN

15W_45@

D

E

Another for 15W DCIN , PN: DC301001V00

LS-4242P

PCB

15WDAZ@

LA-4241P

15WDA@

LS-4242P

15WDA@

LS-4243P

15WDA@

LS-4244P

15WDA@

LS-4245P

15WDA@

LS-4246P

15WDA@

05/20 Add DAZ PCB Panel P/N

Compal Confidential

2 2

JHXXX Schematics Document

Intel Penryn Processor with Cantiga + DDRII + ICH9M

(With nVIDIA MXM/B)

2008-06-03

REV: 1.0

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/18 2008/8/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Page

JHXXX M/B LA-4241P Schematic

149Tuesday, June 03, 2008

E

of

0.4

A

B

C

D

E

Compal Confidential

Model Name : JHXXX

Fan Control

page 4

File Name : LA-4241P

1 1

LCD Conn.

page 18

LVDS

HDMI

page 25

CRT

page 19

PCI-Express

MXM II VGA/B

page 17

2 2

PCI-Express

Intel Penryn Processor

uPGA-478 Package

H_A#(3..35)

FSB

667/800MHz

Intel Cantiga

uFCBGA-1329

page 7,8,9,10,11,12,13

DMI X4 mode

Intel ICH9-M

page 4,5,6

H_D#(0..63)

3.3V 48MHz

3.3V 24.576MHz/48Mhz

Thermal Sensor

ADT7421

page 4

Memory BUS(DDRII)

Dual Channel

1.8V DDRII 533/667

USB conn x3 TO I/O/B

page 35 page 34 page 40

USB

BGA-676

New Card Socket

page 31

3 3

MINI Card x3

WLAN, TV-Tuner Robson

page 30

LAN(GbE)

RTL8111C/8102E

page 28

RJ45

page 29

Card Reader

JMB385

page 26

socket

page 26

page 20,21,22,23

LPC BUS

S-ATA

port 0

S-ATA HDD Conn.

page 24

S-ATA ODD Conn.

page 24

Clock Generator

ICS9LPRS387

page 16

200pin DDRII-SO-DIMM X2

BANK 0, 1, 2, 3

Bluetooth

page 14,15

CMOS Camera

Conn

HD Audio

GMCH HDA

page 8

MDC 1.5 Conn

page 40

Finger Print Conn

page 40

HDA Codec

ALC268

page 36

Audio AMP3 in 1

page 37

RTC CKT.

page 21

Function/B

Power On/Off CKT.

page 35

Power USB/B

page 33

Touch Pad

USB I/O Conn.

DC/DC Interface CKT.

page 41

Power Circuit DC/DC

4 4

page 41,42,43,45 46,47,48

CIR LID SW Debug port

page 35

ENE KB926

page 34

page 32

Int.KBD

page 33

BIOS

page 34

SCREW

page 39

TPM

CHARGER

page 44

A

LED

page 40

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/18 2008/8/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Block Diagrams

JHXXX M/B LA-4241P Schematic

E

of

249Friday, April 11, 2008

0.4

A

hexainf@hotmail.com

B

C

D

E

Voltage Rails

S5

Power Plane

VIN

1 1

B+ +CPU_CORE

+1.05VS +1.5VS +1.8V +1.8VS +3VALW +3VS +5VALW +5VS +VSB +RTCVCC

Description

Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU

0.9V switched power rail for DDR terminator+0.9VS ( Actual +0.9V )

1.05V switched power rail

1.5V switched power rail

1.8V power rail for DDR

1.8V switched power rail

3.3V always on power rail

3.3V switched power rail 5V always on power rail 5V switched power rail VSB always on power rail RTC power

S3S1

OFF

ON

ON OFF

OFF ON OFF

N/AN/AN/A

OFF OFF OFFOFF OFFOFF OFF OFF ON*ON OFF ON* OFF ON*ON ON

N/A N/A N/A ON ON ON ON ON ON ON ON ON ON

ONONON

EC SM Bus1 address

Device

Smart Battery EEPROM(24C16/02)

Address

1010 000X b

EC SM Bus2 address

Device

ADI ADM1032 NVIDIA NB8X

Address

1001 100X b0001 011X b

2 2

STATE

SIGNAL

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S3#SLP_S1#

SLP_S4#

HIGH HIGH HIGH

LOW

HIGH

LOW

LOW LOW LOW

LOWLOWLOW

SLP_S5#

HIGHHIGHHIGHHIGH

HIGH

LOW

+VALW

ON

+V +VS Clock

ON

OFF

ONON

LOW

OFF

ON

OFF

ICH9M SM Bus address

Device

Clock Generator (ICS9LPRS325AKLFT_MLF72)

DDR DIMM0 DDR DIMM1

Address

1101 001Xb

1010 000Xb 1010 010Xb

SKU ID Table

Vcc 3.3V +/- 5%

47K +/- 5%Rb

R472

4.7K_0402_5%

H_14_C@

R472

10K_0402_5%

H_14_MP@

R472

18K_0402_5%

H_15_B@

R472

27K_0402_5%

H_15_C@

R472

39K_0402_5%

H_15_MP@

R472

Rb~ R470

PROJECT ID Table

3 3

JHT00 ( 00@ )

ID1 R361

JHT01 ( 01@ )

R360

JHL91 ( 11@ ) R360 R355

ID0 R357 R355R361 R357JHL90 ( 10@ )

MIC ID Table

R

R585 Single MIC R583 Array MIC

Structure

SINGLE@ DUAL@

Ra~ R472

Board ID

1 2 3 4 5 6 7 8 9 10 11 12

Rb

NA 4.7K +/- 5% 47K(RB@) 47K(RB@) 47K(RB@) 47K(RB@) 47K(RB@) 47K(RB@) 47K(RB@) 47K(RB@) 47K(RB@) 47K(RB@) 47K(RB@)

4.7K +/- 5% 10K +/- 5% 18K +/- 5% 27K +/- 5% 39K +/- 5% 56K +/- 5% 82K +/- 5% 120K +/- 5% 220K +/- 5% 470K +/- 5% NA

56K_0402_5%

L_14_B@

Ra V min

AD_BID

82K_0402_5%

L_14_C@

0 V

0.274 V 0.300 V 0.328 V

0.553V

0.849V

1.129 V

1.415 V 1.496 V 1.579 V

1.712 V

2.020V

2.303 V

2.670 V

2.972 V

3.135 V

120K_0402_5%

L_14_MP@

V typ

AD_BID

220K_0402_5%

L_15_B@

V

AD_BID

0 V 0 V

0.578 V

0.913V

0.628 V

0.981 V

1.204 V 1.282 V

1.794 V

2.097 V

2.371 V

2.719 V

3.000 V

3.300 V

1.876 V

2.173 V

2.437 V

2.765 V

3.026 V

3.465 V

470K_0402_5%

L_15_C@

Ra BOM Structure

max

H_14_B@ H_14_C@ H_14_MP@ H_15_B@ H_15_C@ H_15_MP@ L_14_B@ L_14_C@ L_14_MP@ L_15_B@ L_15_C@

NA for L_15_MP

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/18 2008/8/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Notes List

JHXXX M/B LA-4241P Schematic

349Tuesday, June 03, 2008

E

of

0.4

5

4

3

2

1

EMI Recommend

+1.05VS

Which to follow?

D D

H_A#[3..35]<7> H_REQ#[0..4]<7> H_RS#[0..2]<7>

C C

B B

A A

H_A#[3..35] H_REQ#[0..4] H_RS#[0..2]

JCPU1A

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15

H_ADSTB#0<7>

H_ADSTB#1<7> H_A20M#<21>

H_FERR#<21> H_IGNNE#<21>

H_STPCLK#<21> H_INTR<21> H_NMI<21> H_SMI#<21>

H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

JCPU1A

J4

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

V1

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD[01]

N5

RSVD[02]

T2

RSVD[03]

V3

RSVD[04]

B2

RSVD[05]

C3

RSVD[06]

D2

RSVD[07]

D22

RSVD[08]

D3

RSVD[09]

F6

RSVD[10]

Merom Ball-out Rev 1a

CONN@

ADDR GROUP 0 ADDR GROUP 1

XDP/ITP SIGNALS

THERMAL

PROCHOT#

THERMDA THERMDC

ICH

THERMTRIP#

H CLK

RESERVED

ADS# BNR#

BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HIT#

HITM#

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY# PREQ#

TCK

TDO TMS

TRST#

DBR#

BCLK[0] BCLK[1]

H1 E2 G5

H5 F21 E1

F1

H_IERR#

D20 B3

H4

H_RESET#

C1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3 G2

G6 E4

AD4 AD3 AD1 AC4 AC2

EMI Recommend

AC1

ITP_TCK

AC5

ITP_TDI

AA6

TDI

AB3

ITP_TMS

AB5

ITP_TRST#

AB6

ITP_DBRESET#

C20

H_PROCHOT#

D21

THERMDA_R

A24

THERMDC_R

B25 C7

A22 A21

1 2

R705 0_0402_5%R705 0_0402_5%

Layout Note: THERMDA&THERMDC Trace / Space = 10 / 10 mil THERMDA_R&THERMDC_R Trace / Space = 10 / 10 mil

H_ADS# <7> H_BNR# <7> H_BPRI# <7>

H_DEFER# <7> H_DRDY# <7> H_DBSY# <7>

H_BR0# <7>

H_INIT# <21> H_LOCK# <7> H_RESET# <7>

H_TRDY# <7> H_HIT# <7>

H_HITM# <7>

ITP_DBRESET# <22> H_PROCHOT# <48>

R19 100_0402_5%SMSC@R19 100_0402_5%SMSC@ R20 100_0402_5%SMSC@R20 100_0402_5%SMSC@

CLK_CPU_BCLK <16> CLK_CPU_BCLK# <16>

R19

0_0402_5%

NS@

THERMDA THERMDC

H_THERMTRIP# <8,21>

R20

0_0402_5%

NS@

TCK TDI TMS TRST# PREQ#

Checklist CRB

55_5% 55_5% 55_1% 55_5% x

EMC1402

2200P_0402_50V7K

+3VS

Address:100_1100

FAN1 Conn

EN_FAN1<32>

54.9_1%

1/29 change to EMC1402 pn

1

C2

THERMDA

2

THERMDC

1 2

R18 10K_0402_5%R18 10K_0402_5%

+5VS

+VCC_FAN1

EN_FAN1_R

R815

1 2

330_0402_5%

12

C769

0.047U_0402_16V7K

FAN_SPEED1<32>

+3VS

H_IERR# ITP_TMS ITP_TDI H_PROCHOT# ITP_TCK ITP_TRST#

C1

0.1U_0402_16V4Z

1 2

U1

1

VDD

2

D+

3

ALERT/THERM2

D-

4

THERM

ADT7421ARMZ-REEL_MSOP8

SMSC@

C3 10U_0805_10V4ZC3 10U_0805_10V4Z

1 2

U2

1

VEN

2 3 4

GND

VIN

GND GND

VO

GND

VSET

G990P11U_SOP8

+3VS

12

R21

R21 10K_0402_5%

10K_0402_5%

1

C6

C6 1000P_0402_50V7K

1000P_0402_50V7K

2

R12 56_0402_5%R12 56_0402_5%

1 2

R13 54.9_0402_1%R13 54.9_0402_1%

1 2

R14 54.9_0402_1%R14 54.9_0402_1%

1 2

R15 56_0402_5%R15 56_0402_5%

1 2

R16 54.9_0402_1%R16 54.9_0402_1%

1 2

R17 54.9_0402_1%R17 54.9_0402_1%

1 2

U1

LM95245CIMMX NOPB MSOP 8P

NS@

8

SCLK

7

SDATA

6

R706 10K_0402_5%R706 10K_0402_5%

5

GND

+5VS

12

D1

8 7 6 5

D1 BAS16_SOT23-3

BAS16_SOT23-3

C4 10U_0805_10V4ZC4 10U_0805_10V4Z

1000P_0402_50V7K

40mil

+VCC_FAN1

EC_SMB_CK2 <17,32> EC_SMB_DA2 <17,32>

12

D2

1 2

BAS16_SOT23-3

1 2

C5

1 2

ACES_85205-03001

JP7

1 2 3

4 5

+3VS

1 2 3

GND GND

CONN@

Security Classification

2007/08/18 2008/08/18

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/18 2008/08/18

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

JHXXX M/B LA-4241P Schematic

Date: Sheet

2

Date: Sheet of

Compal Electronics, Inc.

Penryn (1/3)

449Tuesday, June 03, 2008

of

1

of

0.4

5

hexainf@hotmail.com

4

3

2

1

H_D#[0..63]

JCPU1B

H_D#0

PAD

PAD PAD

PAD

H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

GTL_REF0

@

TEST1 TEST2 TEST3 TEST4 TEST5 TEST6

D D

H_DSTBN#0<7> H_DSTBP#0<7> H_DINV#0<7>

C C

Trace Close CPU < 0.5'

Width=4 mil , Spacing: 15mil (55Ohm)

B B

R22

R22 1K_0402_1%

1K_0402_1%

R28

R28 2K_0402_1%

2K_0402_1%

+1.05VS

1 2

H_DSTBN#1<7> H_DSTBP#1<7> H_DINV#1<7>

R24 1K_0402_5%@R24 1K_0402_5%@ R26 1K_0402_5%@R26 1K_0402_5%@

C8

@

0.1U_0402_16V4Z

1 2

12 12

T1 PAD

T1 PAD T2

T2 T3

T3

CPU_BSEL0<16> CPU_BSEL1<16> CPU_BSEL2<16>

JCPU1B

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H22

D[12]#

F26

D[13]#

K22

D[14]#

H23

D[15]#

J26

DSTBN[0]#

H26

DSTBP[0]#

H25

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L23

D[20]#

M24

D[21]#

L22

D[22]#

M23

D[23]#

P25

D[24]#

P23

D[25]#

P22

D[26]#

T24

D[27]#

R24

D[28]#

L25

D[29]#

T25

D[30]#

N25

D[31]#

L26

DSTBN[1]#

M26

DSTBP[1]#

N24

DINV[1]#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

Merom Ball-out Rev 1a

CONN@

DATA GRP 0

DATA GRP 2DATA GRP 3

DSTBN[2]#

DSTBP[2]#

DINV[2]#

DATA GRP 1

DSTBN[3]#

DSTBP[3]#

DINV[3]# COMP[0]

MISC

COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

PWRGOOD

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]# D[47]#

D[48]# D[49]# D[50]# D[51]# D[52]# D[53]# D[54]# D[55]# D[56]# D[57]# D[58]# D[59]# D[60]# D[61]# D[62]# D[63]#

DPWR#

SLP#

PSI#

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

CPU_BSEL CPU_BSEL2 CPU_BSEL1

CPU_BSEL0

H_D#32

Y22

H_D#33

AB24

H_D#34

V24

H_D#35

V26

H_D#36

V23

H_D#37

T22

H_D#38

U25

H_D#39

U23

H_D#40

Y25

H_D#41

W22

H_D#42

Y23

H_D#43

W24

H_D#44

W25

H_D#45

AA23

H_D#46

AA24

H_D#47

AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

COMP0 COMP1 COMP2 COMP3

H_PWRGOOD H_CPUSLP#

R23 27.4_0402_1%R23 27.4_0402_1% R25 54.9_0402_1%R25 54.9_0402_1% R27 27.4_0402_1%R27 27.4_0402_1% R29 54.9_0402_1%R29 54.9_0402_1%

H_DSTBN#2 <7> H_DSTBP#2 <7> H_DINV#2 <7>

H_DSTBN#3 <7> H_DSTBP#3 <7> H_DINV#3 <7>

1 2 1 2 1 2 1 2

H_DPRSTP# <8,21,48> H_DPSLP# <21> H_DPWR# <7> H_PWRGOOD <21> H_CPUSLP# <7> H_PSI# <48>

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 18mils and Space 25mils (27.4Ohms) COMP1, COMP3 layout : Width 4mils and Space 25mils (55Ohms)

H_PSI# H_DPRSTP#

H_D#[0..63] <7>

C739 100P_0402_50V8J@C739 100P_0402_50V8J@

1 2 1 2

C762 470P_0402_50V7KC762 470P_0402_50V7K

+CPU_CORE

JCPU1C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

B7

VCC[010]

B9

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA7

VCC[051]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

Merom Ball-out Rev 1a

CONN@

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]

VCCA[01] VCCA[02]

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

VCCSENSE

VSSSENSE

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

.

20mils

VCCSENSE

VSSSENSE

+CPU_CORE

CPU_VID0 <48> CPU_VID1 <48> CPU_VID2 <48> CPU_VID3 <48> CPU_VID4 <48> CPU_VID5 <48> CPU_VID6 <48>

1 2

R30 100_0402_1%R30 100_0402_1%

1 2

R31 100_0402_1%R31 100_0402_1%

330u ESR 9m ohm Package(L*W*H)7.3*4.3*1.8 Rating 2.5V

+1.05VS

1

+

C7

C7 330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

2

1

C9

2

0.01U_0402_16V7K

+1.5VS

1

C10

C10 10U_0805_10V4Z

10U_0805_10V4Z

2

+CPU_CORE

VCCSENSE <48>

VSSSENSE <48>

166

200

266 0 0 0

A A

01

0

5

1

0

For 6 layer Z=27.4 ohm VCCSENSE, VSSSENSE/ 14mils (MS),

16mils (SL) width, 7mils space, 25mils space to other signals Mismatch =25mils.

Security Classification

2007/08/18 2008/08/18

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/18 2008/08/18

3

Compal Secret Data

Deciphered Date

Place PU and PD within 1 inch of CPU (CRB recommend) Route VCCSENSE and VSSSENSE traces at 27.4 Ohms with 50 mils spacing.

Length matching within 25 mils (Compal Common Design) Trace width/space/other is 20/7/25 Place these 2 resisters closk to CPU pins within 500 mils

Compal Electronics, Inc.

Title

Size Document Number Rev

B

JHXXX M/B LA-4241P Schematic

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Penryn (2/3)

of

549Wednesday, May 28, 2008

of

549Wednesday, May 28, 2008

of

549Wednesday, May 28, 2008

1

0.4

5

JCPU1D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

D D

C C

B B

A A

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080] VSS[081]P3VSS[162]

Merom Ball-out Rev 1a

CONN@

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]

VSS[163]

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

.

4

+CPU_CORE

1

+

C11

C11 330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

2

330U_D2E_2.5VM_R9

3

330u ESR 9m ohm Package(L*W*H)7.3*4.3*1.8 Rating 2.5V

2 x 330uF(9mOhm/3)

1

+

C12

C13

2

+CPU_CORE

1

+

330U_D2E_2.5VM_R9@

2

1

+

C14

@

330U_D2E_2.5VM_R9

2

2 x 330uF(9mOhm/3)

1

+

C15

2

330U_D2E_2.5VM_R9

1

+

C16

@

330U_D2E_2.5VM_R9

2

1

South Side Secondary North Side Secondary

+CPU_CORE

1

C17

2

10U_0805_6.3V6M

1

C18

10U_0805_6.3V6M

2

1

C19

2

10U_0805_6.3V6M

1

C20

10U_0805_6.3V6M

2

1

C21

2

10U_0805_6.3V6M

1

C22

10U_0805_6.3V6M

2

1

C23

2

10U_0805_6.3V6M

1

C24

10U_0805_6.3V6M

2

(Place these capacitors on South side,Secondary Layer)

+CPU_CORE

1

C25

2

10U_0805_6.3V6M

1

C26

10U_0805_6.3V6M

2

1

C27

2

10U_0805_6.3V6M

1

C28

10U_0805_6.3V6M

2

1

C29

2

10U_0805_6.3V6M

1

C30

10U_0805_6.3V6M

2

1

C31

2

10U_0805_6.3V6M

1

C32

10U_0805_6.3V6M

2

(Place these capacitors on North side,Secondary Layer)

+CPU_CORE

1

C33

2

10U_0805_6.3V6M

1

C34

10U_0805_6.3V6M

2

1

C35

@

2

10U_0805_6.3V6M

1

C36

10U_0805_6.3V6M

2

1

C37

2

10U_0805_6.3V6M

1

C38

10U_0805_6.3V6M

2

1

C39

@

2

10U_0805_6.3V6M

1

C40

10U_0805_6.3V6M

2

(Place these capacitors on South side,Primary Layer)

+CPU_CORE

1

C41

2

10U_0805_6.3V6M

1

C42

10U_0805_6.3V6M

2

1

C43

@

2

10U_0805_6.3V6M

1

C44

10U_0805_6.3V6M

2

1

C45

2

10U_0805_6.3V6M

1

C46

10U_0805_6.3V6M

2

1

C47

@

2

10U_0805_6.3V6M

1

C48

10U_0805_6.3V6M

2

(Place these capacitors on North side,Primary Layer)

+CPU-CORE Decoupling SPCAP,Polymer

MLCC 0805 X5R

+1.05VS

1

C49

2

0.1U_0402_16V4Z

C,uF ESL,nH

ESR, mohm

6X330uF 9m ohm/6 1.8nH/6 32X22uF

3m ohm/32 0.6nH/32

32X10uF 3m ohm/32 0.6nH/32

1

C50

0.1U_0402_16V4Z

2

1

2

0.1U_0402_16V4Z

C51

0.1U_0402_16V4Z

1

C52

2

0.1U_0402_16V4Z

1

C53

0.1U_0402_16V4Z

2

1

C54

2

(Place these capacitors inside socket cavity in 2 row on North side Secondary)

Security Classification

2007/08/18 2008/8/18

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/18 2008/8/18

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Penryn (3/3)

JHXXX M/B LA-4241P Schematic

649Friday, April 11, 2008

1

0.4

of

5

hexainf@hotmail.com

4

3

2

1

Change U3 from SA00001P900 to SA00001P930

3/4 Change U3 from SA00001P930 to SA00002JT10 (B0 to B2)

U3A

H_D#[0..63]<5>

D D

+1.05VS

C C

12

R32

R32 221_0402_1%

221_0402_1%

R33

R33 100_0402_1%

100_0402_1%

1 2

H_SWING

width=10mil

1

C55

0.1U_0402_16V4Z

2

Near C5 pin

H_RCOMP

12

R34

24.9_0402_1%

B B

Layout Note: H_RCOMP / H_VREF / H_SWING

trace width and spacing is 10/20

width / space =10mil / 20mil

+1.05VS

R35

R35 1K_0402_1%

1K_0402_1%

1 2 12

R36

R36 2K_0402_1%

2K_0402_1%

1

C56

@

0.1U_0402_16V4Z

2

H_RESET#<4> H_CPUSLP#<5>

width:spacing=10mil:20mil (<0.5")

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWING H_RCOMP

H_RESET# H_CPUSLP#

H_VREF

U3A

F2

H_D#_0

G8

H_D#_1

F8

H_D#_2

E6

H_D#_3

G2

H_D#_4

H6

H_D#_5

H2

H_D#_6

F6

H_D#_7

D4

H_D#_8

H3

H_D#_9

M9

H_D#_10

M11

H_D#_11

J1

H_D#_12

J2

H_D#_13

N12

H_D#_14

J6

H_D#_15

P2

H_D#_16

L2

H_D#_17

R2

H_D#_18

N9

H_D#_19

L6

H_D#_20

M5

H_D#_21

J3

H_D#_22

N2

H_D#_23

R1

H_D#_24

N5

H_D#_25

N6

H_D#_26

P13

H_D#_27

N8

H_D#_28

L7

H_D#_29

N10

H_D#_30

M3

H_D#_31

Y3

H_D#_32

AD14

H_D#_33

Y6

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

Y7

H_D#_38

W2

H_D#_39

AA8

H_D#_40

Y9

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

C5

H_SWING

E3

H_RCOMP

C12

H_CPURST#

E11

H_CPUSLP#

A11

H_AVREF

B11

H_DVREF

CANTIGA ES_FCBGA1329

GM@

H_ADSTB#_0 H_ADSTB#_1

H_BREQ#

H_DEFER#

HOST

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_HIT#

H_HITM#

H_RS#_0 H_RS#_1 H_RS#_2

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20

H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BR0# H_DEFER# H_DBSY# CLK_MCH_BCLK CLK_MCH_BCLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY#

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

H_A#[3..35] <4>

H_ADS# <4> H_ADSTB#0 <4> H_ADSTB#1 <4> H_BNR# <4> H_BPRI# <4> H_BR0# <4> H_DEFER# <4> H_DBSY# <4> CLK_MCH_BCLK <16> CLK_MCH_BCLK# <16> H_DPWR# <5> H_DRDY# <4> H_HIT# <4> H_HITM# <4> H_LOCK# <4> H_TRDY# <4>

H_DINV#0 <5> H_DINV#1 <5> H_DINV#2 <5> H_DINV#3 <5>

H_DSTBN#0 <5> H_DSTBN#1 <5> H_DSTBN#2 <5> H_DSTBN#3 <5>

H_DSTBP#0 <5> H_DSTBP#1 <5> H_DSTBP#2 <5> H_DSTBP#3 <5>

H_REQ#[0..4] <4>

H_RS#[0..2] <4>

U3

965PM

PM@

3/4 Change U3 PM@ from SA00001ZO30 to SA00002JJ00 (B0 to B2)

A A

Security Classification

2007/08/18 2008/8/18

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/18 2008/8/18

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga (1/7)-GTL

JHXXX M/B LA-4241P Schematic

1

of

749Tuesday, June 03, 2008

of

749Tuesday, June 03, 2008

of

749Tuesday, June 03, 2008

0.4

5

+1.8V

R38

R38 1K_0402_1%

1K_0402_1%

D D

C57

VGATE<16,22,48> ICH_PWROK<22,32>

C57

2.2U_0603_6.3V6K

C60

2.2U_0603_6.3V6K

PLT_RST_BUF#<17,20,26,28,30,40> H_THERMTRIP#<4,21> PM_DPRSLPVR_D<22,48>

+1.05VS

12

R76

54.9_0402_1%

1 2

330_0402_5%

PM_BMBUSY#<22> H_DPRSTP#<5,21,48> PM_EXTTS#0<14> PM_EXTTS#1<15>

R81

@

R43

3.01K_0402_1%

R39

R39 1K_0402_1%

1K_0402_1%

C C

B B

A A

MCH_TSATN#

SM_RCOMP_VOHSM_RCOMP_VOH

C59

0.01U_0402_16V7K

SM_RCOMP_VOL

C58

0.01U_0402_16V7K

MCH_CLKSEL0<16> MCH_CLKSEL1<16> MCH_CLKSEL2<16>

Use VGATE for GMCH_PWROK

VGATE

1 2

R52 0_0402_5%@R52 0_0402_5%@

ICH_PWROK

1 2

R53 0_0402_5%R53 0_0402_5%

+3VS +3VS

12

R71

R71 1K_0402_5%

1K_0402_5%

@

C

Q2

2

B

MMBT3904_SOT23-3

E

@

3 1

5

GMCH_PWROK

R57 0_0402_5%R57 0_0402_5%

1 2

R58 0_0402_5%R58 0_0402_5%

1 2

R61 100_0402_5%R61 100_0402_5% R63 0_0402_5%R63 0_0402_5%

1 2

R64 0_0402_5%R64 0_0402_5%

1 2

12

R72

R72 1K_0402_5%

1K_0402_5%

C

Q1

2

B

MMBT3904_SOT23-3

E

@

3 1

MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2

MCH_CFG_5 MCH_CFG_6 MCH_CFG_7

MCH_CFG_9 MCH_CFG_10

MCH_CFG_12 MCH_CFG_13

MCH_CFG_16

MCH_CFG_19 MCH_CFG_20

PM_BMBUSY#_R PM_DPRSTP#_R PM_EXTTS#0 PM_EXTTS#1 GMCH_PWROK MCH_RSTIN# THERMTRIP#_R DPRSLPVR_R

MCH_TSATN#_EC <32>

PM_DPRSLPVR_D H_DPRSTP#

4

U3B

M36

RSVD1

N36

RSVD2

R33

RSVD3

T33

RSVD4

AH9

RSVD5

AH10

RSVD6

AH12

RSVD7

AH13

RSVD8

K12

RSVD9

AL34

RSVD10

AK34

RSVD11

AN35

RSVD12

AM35

RSVD13

T24

RSVD14

B31

RSVD15

B2

RSVD16

M1

RSVD17

AY21

RSVD20

BG23

RSVD22

BF23

RSVD23

BH18

RSVD24

BF18

RSVD25

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC_1

BF48

NC_2

BD48

NC_3

BC48

NC_4

BH47

NC_5

BG47

NC_6

BE47

NC_7

BH46

NC_8

BF46

NC_9

BG45

NC_10

BH44

NC_11

BH43

NC_12

BH6

NC_13

BH5

NC_14

BG4

NC_15

BH3

NC_16

BF3

NC_17

BH2

NC_18

BG2

NC_19

BE2

NC_20

BG1

NC_21

BF1

NC_22

BD1

NC_23

BC1

NC_24

F1

NC_25

A47

NC_26

CANTIGA ES_FCBGA1329

GM@

4

RSVD CFG PM NC

DDR CLK/ CONTROL/ COMPENSATIONHDA

CLKDMIGRAPHICS VIDMEMISC

1 2

C760 470P_0402_50V7KC760 470P_0402_50V7K

1 2

C761 470P_0402_50V7KC761 470P_0402_50V7K

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1

SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1

SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1

SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1

SA_ODT_0 SA_ODT_1

SB_ODT_O

SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST# CL_VREF

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

AP24 AT21 AV24 AU20

AR24 AR21 AU24 AV20

BC28 AY28 AY36 BB36

BA17 AY16 AV16 AR13

BD17 AY17 BF15 AY13

BG22 BH21

BF28 BH28

AV42 AR36 BF17 BC36

B38 A38 E41 F41

F43 E43

AE41 AE37 AE47 AH39

AE40 AE38 AE48 AH40

AE35 AE43 AE46 AH42

AD35 AE44 AF46 AH43

B33 B32 G33 F33 E33

C34

AH37 AH36 AN36 AJ35 AH34

N28 M28 G36 E36 K36 H36

B12

B28 B30 B29 C29 A28

3

SMRCOMP SMRCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_PWROK SM_REXT

CLK_DREF_96M CLK_DREF_96M# CLK_DREF_SSC CLK_DREF_SSC#

CLK_MCH_3GPLL CLK_MCH_3GPLL#

DMI_ITX_MRX_N0 DMI_ITX_MRX_N1 DMI_ITX_MRX_N2 DMI_ITX_MRX_N3

DMI_ITX_MRX_P0 DMI_ITX_MRX_P1 DMI_ITX_MRX_P2 DMI_ITX_MRX_P3

DMI_MTX_IRX_N0 DMI_MTX_IRX_N1 DMI_MTX_IRX_N2 DMI_MTX_IRX_N3

DMI_MTX_IRX_P0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P3

ICH_PWROK CL_VREF

HDMICLK_NB HDMIDAT_NB MCH_CLKREQ#

MCH_TSATN#

GMCH_HDA_BITCLK GMCH_HDA_RST# MCH_HDA_SDIN GMCH_HDA_SDOUT GMCH_HDA_SYNC

R48 10K_0402_1%R48 10K_0402_1% R50 499_0402_1%R50 499_0402_1%

DDRA_CLK0 <14> DDRA_CLK1 <14> DDRB_CLK0 <15> DDRB_CLK1 <15>

DDRA_CLK0# <14> DDRA_CLK1# <14> DDRB_CLK0# <15> DDRB_CLK1# <15>

DDRA_CKE0 <14> DDRA_CKE1 <14> DDRB_CKE0 <15> DDRB_CKE1 <15>

DDRA_SCS0# <14> DDRA_SCS1# <14> DDRB_SCS0# <15> DDRB_SCS1# <15>

DDRA_ODT0 <14> DDRA_ODT1 <14> DDRB_ODT0 <15> DDRB_ODT1 <15>

SM_VREF

1 2 1 2

CLK_DREF_96M <16>

CLK_DREF_96M# <16>

CLK_DREF_SSC <16>

CLK_DREF_SSC# <16>

CLK_MCH_3GPLL <16>

CLK_MCH_3GPLL# <16>

DMI_ITX_MRX_N0 <22>

DMI_ITX_MRX_N1 <22>

DMI_ITX_MRX_N2 <22>

DMI_ITX_MRX_N3 <22>

DMI_ITX_MRX_P0 <22>

DMI_ITX_MRX_P1 <22>

DMI_ITX_MRX_P2 <22>

DMI_ITX_MRX_P3 <22>

DMI_MTX_IRX_N0 <22>

DMI_MTX_IRX_N1 <22>

DMI_MTX_IRX_N2 <22>

DMI_MTX_IRX_N3 <22>

DMI_MTX_IRX_P0 <22>

DMI_MTX_IRX_P1 <22>

DMI_MTX_IRX_P2 <22>

DMI_MTX_IRX_P3 <22>

CL_CLK0 <22>

CL_DATA0 <22>

CL_RST#0 <22>

HDMICLK_NB <25>

HDMIDAT_NB <25>

MCH_CLKREQ# <16>

MCH_ICH_SYNC# <22>

R78 33_0402_5%GM@R78 33_0402_5%GM@

1 2

SM_DRAMRST# would be needed for DDR3 only

For Cantiga 80 Ohm

R45 80.6_0402_1%R45 80.6_0402_1% R46 80.6_0402_1%R46 80.6_0402_1%

20mil

0.1U_0402_16V4Z

SM_PWROK: Pull L for DDR2 Driven by platform for DDR3

1 2

1

C61

R51

R51 1K_0402_1%

1K_0402_1%

2

1 2

Layout Note: SM_VREF trace width and spacing is 20/20.

*

C62

1

0.1U_0402_16V4Z

2

+1.8V

R49

+1.8V

1K_0402_1%

(Default)

10/22 intel recommend 2.21K iTPM spec use 10K

+1.05VS

R66

1K_0402_1%

1 2

R68

R68 511_0402_1%

511_0402_1%

1 2

GMCH_HDA_BITCLK <10> GMCH_HDA_RST# <10> GMCH_HDA_SDIN2 <10> GMCH_HDA_SDOUT <10> GMCH_HDA_SYNC <10>

CFG[17:3] have internal pull up CFG[19:18] have internal pull down

When ICH9M VCCHDA and VCCSUSHDA tie to 3V, don't stuff these resisters (follow CRB)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/08/18 2008/8/18

Compal Secret Data

Deciphered Date

2

1

CFG[2:0] CFG5 CFG6 CFG7

CFG9 CFG10

CFG[13:12]

CFG16 CFG19 CFG20

(PCIE/SDVO select)

SDVO_CTRLDATA

Add follow CRB

CLK_DREF_96M# CLK_DREF_SSC# CLK_DREF_96M CLK_DREF_SSC

011 = 667MT/s FSB 010 = 800MT/s FSB

0 = DMI x 2 1 = DMI x 4

0 = The ITPM Host Interface is enabled 1 = The ITPM Host Interface is disabled

0 = AMT Firmware will use TLS cipher suite with no confidentiality 1 = AMT Firmware will use TLS cipher suite with confidentiality 0 = Lane Reversal Enable

1 = Normal Operation 0 = PCIE Loopback Enable

1 = Disable 00 = Reserved

01 = XOR Mode Enabled 10 = All Z Mode Enabled 11 = Normal Operation

0 = Dynamic ODT Disabled 1 = Dynamic ODT Enabled

0 = Normal Operation 1 = DMI Lane Reversal Enable

0 = Only PCIE or SDVO is operational.

(Default)

1 = PCIE/SDVO are operating simu. 0 = No SDVO Device Present 1 = SDVO Device Present

MCH_CFG_5 MCH_CFG_9 MCH_CFG_12 MCH_CFG_13 MCH_CFG_16 MCH_CFG_10 MCH_CFG_6 MCH_CFG_7

1 2

R37 0_0402_5%PM@R37 0_0402_5%PM@

1 2

R40 0_0402_5%PM@R40 0_0402_5%PM@

1 2

R41 0_0402_5%PM@R41 0_0402_5%PM@

1 2

R42 0_0402_5%PM@R42 0_0402_5%PM@

(Default)

*

1 2

R54 2.21K_0402_1%@R54 2.21K_0402_1%@

1 2

R55 2.21K_0402_1%@R55 2.21K_0402_1%@

1 2

R56 2.21K_0402_1%@R56 2.21K_0402_1%@

1 2

R59 2.21K_0402_1%@R59 2.21K_0402_1%@

1 2

R60 2.21K_0402_1%@R60 2.21K_0402_1%@

1 2

R62 2.21K_0402_1%@R62 2.21K_0402_1%@

1 2

R65 2.21K_0402_1%@R65 2.21K_0402_1%@

1 2

R67 2.21K_0402_1%@R67 2.21K_0402_1%@

Change R from 4.02K to 2.21K following CRB

MCH_CFG_19 MCH_CFG_20

PM_EXTTS#0 PM_EXTTS#1

HDMICLK_NB HDMIDAT_NB

Title

Size Document Number Rev

Custom

Date: Sheet

R69 4.02K_0402_1%@R69 4.02K_0402_1%@ R70 4.02K_0402_1%@R70 4.02K_0402_1%@

R73 10K_0402_5%R73 10K_0402_5% R74 10K_0402_5%R74 10K_0402_5%

1 2

R80 0_0402_5%@R80 0_0402_5%@

1 2

R83 0_0402_5%@R83 0_0402_5%@

Compal Electronics, Inc.

Cantiga (2/7)-DMI/DDR

JHXXX M/B LA-4241P Schematic

1

Strap Pin Table

000 = 1066MT/s FSB

(Default)

*

(Default)

*

(Default)

*

(Default)

*

(Default)

*

+3VS

of

849Tuesday, June 03, 2008

*

0.4

5

hexainf@hotmail.com

4

3

2

1

DDRB_SDQ[0..63] DDRB_SDM[0..7] DDRB_SMA[0..14]

DDRA_SBS0 <14> DDRA_SBS1 <14> DDRA_SBS2 <14>

DDRA_SRAS# <14> DDRA_SCAS# <14> DDRA_SWE# <14>

DDRA_SDQS0 <14> DDRA_SDQS1 <14> DDRA_SDQS2 <14> DDRA_SDQS3 <14> DDRA_SDQS4 <14> DDRA_SDQS5 <14> DDRA_SDQS6 <14> DDRA_SDQS7 <14>

DDRA_SDQS0# <14> DDRA_SDQS1# <14> DDRA_SDQS2# <14> DDRA_SDQS3# <14> DDRA_SDQS4# <14> DDRA_SDQS5# <14> DDRA_SDQS6# <14> DDRA_SDQS7# <14>

DDRB_SDQ0 DDRB_SDQ1 DDRB_SDQ2 DDRB_SDQ3 DDRB_SDQ4 DDRB_SDQ5 DDRB_SDQ6 DDRB_SDQ7 DDRB_SDQ8 DDRB_SDQ9 DDRB_SDQ10 DDRB_SDQ11 DDRB_SDQ12 DDRB_SDQ13 DDRB_SDQ14 DDRB_SDQ15 DDRB_SDQ16 DDRB_SDQ17 DDRB_SDQ18 DDRB_SDQ19 DDRB_SDQ20 DDRB_SDQ21 DDRB_SDQ22 DDRB_SDQ23 DDRB_SDQ24 DDRB_SDQ25 DDRB_SDQ26 DDRB_SDQ27 DDRB_SDQ28 DDRB_SDQ29 DDRB_SDQ30 DDRB_SDQ31 DDRB_SDQ32 DDRB_SDQ33 DDRB_SDQ34 DDRB_SDQ35 DDRB_SDQ36 DDRB_SDQ37 DDRB_SDQ38 DDRB_SDQ39 DDRB_SDQ40 DDRB_SDQ41 DDRB_SDQ42 DDRB_SDQ43 DDRB_SDQ44 DDRB_SDQ45 DDRB_SDQ46 DDRB_SDQ47 DDRB_SDQ48 DDRB_SDQ49 DDRB_SDQ50 DDRB_SDQ51 DDRB_SDQ52 DDRB_SDQ53 DDRB_SDQ54 DDRB_SDQ55 DDRB_SDQ56 DDRB_SDQ57 DDRB_SDQ58 DDRB_SDQ59 DDRB_SDQ60 DDRB_SDQ61 DDRB_SDQ62 DDRB_SDQ63

AK47 AH46 AP47 AP46

AJ46 AJ48

AM48

AP48 AU47 AU46 BA48 AY48 AT47 AR47 BA47 BC47 BC46 BC44

BG43

BF43 BE45 BC41 BF40 BF41

BG38

BF38 BH35

BG35

BH40 BG39 BG34

BH34

BH14 BG12

BH11

BG8 BH12 BF11

BG7

BC5

BC6

AY3 AY1 BF6 BF5 BA1

BD3

AV2 AU3 AR3 AN2

AY2

AV1

AP3 AR1

AL1

AL2

AJ1 AH1 AM2 AM3 AH3

AJ3

BF8

U3E

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

BC16

SB_BS_0

BB17

SB_BS_1

BB33

SB_BS_2

AU17

SB_RAS#

BG16

SB_CAS#

BF14

SB_WE#

DDRB_SDM0

AM47

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7

SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2

DDR SYSTEM MEMORY B

SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

CANTIGA ES_FCBGA1329GM@

AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6

AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

DDRB_SDM1 DDRB_SDM2 DDRB_SDM3 DDRB_SDM4 DDRB_SDM5 DDRB_SDM6 DDRB_SDM7

DDRB_SDQS0 DDRB_SDQS1 DDRB_SDQS2 DDRB_SDQS3 DDRB_SDQS4 DDRB_SDQS5 DDRB_SDQS6 DDRB_SDQS7

DDRB_SDQS0# DDRB_SDQS1# DDRB_SDQS2# DDRB_SDQS3# DDRB_SDQS4# DDRB_SDQS5# DDRB_SDQS6# DDRB_SDQS7#

DDRB_SMA0 DDRB_SMA1 DDRB_SMA2 DDRB_SMA3 DDRB_SMA4 DDRB_SMA5 DDRB_SMA6 DDRB_SMA7 DDRB_SMA8 DDRB_SMA9 DDRB_SMA10 DDRB_SMA11 DDRB_SMA12 DDRB_SMA13 DDRB_SMA14

DDRB_SBS0 <15> DDRB_SBS1 <15> DDRB_SBS2 <15>

DDRB_SRAS# <15> DDRB_SCAS# <15> DDRB_SWE# <15>

DDRB_SDQS0 <15> DDRB_SDQS1 <15> DDRB_SDQS2 <15> DDRB_SDQS3 <15> DDRB_SDQS4 <15> DDRB_SDQS5 <15> DDRB_SDQS6 <15> DDRB_SDQS7 <15>

DDRB_SDQS0# <15> DDRB_SDQS1# <15> DDRB_SDQS2# <15> DDRB_SDQS3# <15> DDRB_SDQS4# <15> DDRB_SDQS5# <15> DDRB_SDQS6# <15> DDRB_SDQS7# <15>

U3D

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

DDRA_SDQ[0..63] DDRA_SDM[0..7] DDRA_SMA[0..14]

DDRB_SDQ[0..63]<15> DDRB_SDM[0..7]<15> DDRB_SMA[0..14]<15>

BD21

SA_BS_0

BG18

SA_BS_1

AT25

SA_BS_2

BB20

SA_RAS#

BD20

SA_CAS#

AY20

SA_WE#

DDRA_SDM0

AM37

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7

SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3

DDR SYSTEM MEMORY A

SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

CANTIGA ES_FCBGA1329GM@

AT41 AY41 AU39 BB12 AY6 AT7 AJ5

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7

AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

DDRA_SDM1 DDRA_SDM2 DDRA_SDM3 DDRA_SDM4 DDRA_SDM5 DDRA_SDM6 DDRA_SDM7

DDRA_SDQS0 DDRA_SDQS1 DDRA_SDQS2 DDRA_SDQS3 DDRA_SDQS4 DDRA_SDQS5 DDRA_SDQS6 DDRA_SDQS7

DDRA_SDQS0# DDRA_SDQS1# DDRA_SDQS2# DDRA_SDQS3# DDRA_SDQS4# DDRA_SDQS5# DDRA_SDQS6# DDRA_SDQS7#

DDRA_SMA0 DDRA_SMA1 DDRA_SMA2 DDRA_SMA3 DDRA_SMA4 DDRA_SMA5 DDRA_SMA6 DDRA_SMA7 DDRA_SMA8 DDRA_SMA9 DDRA_SMA10 DDRA_SMA11 DDRA_SMA12 DDRA_SMA13 DDRA_SMA14

DDRA_SDQ[0..63]<14>

D D

C C

B B

DDRA_SDM[0..7]<14> DDRA_SMA[0..14]<14>

DDRA_SDQ0 DDRA_SDQ1 DDRA_SDQ2 DDRA_SDQ3 DDRA_SDQ4 DDRA_SDQ5 DDRA_SDQ6 DDRA_SDQ7 DDRA_SDQ8 DDRA_SDQ9 DDRA_SDQ10 DDRA_SDQ11 DDRA_SDQ12 DDRA_SDQ13 DDRA_SDQ14 DDRA_SDQ15 DDRA_SDQ16 DDRA_SDQ17 DDRA_SDQ18 DDRA_SDQ19 DDRA_SDQ20 DDRA_SDQ21 DDRA_SDQ22 DDRA_SDQ23 DDRA_SDQ24 DDRA_SDQ25 DDRA_SDQ26 DDRA_SDQ27 DDRA_SDQ28 DDRA_SDQ29 DDRA_SDQ30 DDRA_SDQ31 DDRA_SDQ32 DDRA_SDQ33 DDRA_SDQ34 DDRA_SDQ35 DDRA_SDQ36 DDRA_SDQ37 DDRA_SDQ38 DDRA_SDQ39 DDRA_SDQ40 DDRA_SDQ41 DDRA_SDQ42 DDRA_SDQ43 DDRA_SDQ44 DDRA_SDQ45 DDRA_SDQ46 DDRA_SDQ47 DDRA_SDQ48 DDRA_SDQ49 DDRA_SDQ50 DDRA_SDQ51 DDRA_SDQ52 DDRA_SDQ53 DDRA_SDQ54 DDRA_SDQ55 DDRA_SDQ56 DDRA_SDQ57 DDRA_SDQ58 DDRA_SDQ59 DDRA_SDQ60 DDRA_SDQ61 DDRA_SDQ62 DDRA_SDQ63

AJ38

AJ41 AN38 AM38

AJ36

AJ40 AM44 AM42 AN43 AN44 AU40 AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37 AT36 AY38 BB38 AV36

AW36

BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12

AU10 BA11

BD9 AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6

AT5 AN10 AM11

AM5

AN12 AM13

AJ11 AJ12

BB9 BA9

AV9

AJ9 AJ8

A A

Security Classification

2007/08/18 2008/8/18

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/18 2008/8/18

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga (3/7)-DDRII

JHXXX M/B LA-4241P Schematic

949Tuesday, June 03, 2008

1

of

0.4

5

GMCH_LCD_CLK<18> GMCH_LCD_DATA<18>

1 2 1 2 1 2

30_0402_5%GM@

1 2

R84 0_0402_5%GM@R84 0_0402_5%GM@

1 2

R86 2.37K_0402_1%GM@R86 2.37K_0402_1%GM@

GMCH_TZCLK-<18> GMCH_TZCLK+<18> GMCH_TXCLK-<18> GMCH_TXCLK+<18>

GMCH_TZOUT0-<18> GMCH_TZOUT1-<18> GMCH_TZOUT2-<18>

GMCH_TZOUT0+<18> GMCH_TZOUT1+<18> GMCH_TZOUT2+<18>

GMCH_TXOUT0-<18> GMCH_TXOUT1-<18> GMCH_TXOUT2-<18>

GMCH_TXOUT0+<18> GMCH_TXOUT1+<18> GMCH_TXOUT2+<18>

12 12 12

GMCH_CRT_CLK GMCH_CRT_DATA CRT_HSYNC

CRT_VSYNC

GMCH_ENBKL<18>

D D

GMCH_ENVDD<18>

1 2

C63 100P_0402_50V8J@C63 100P_0402_50V8J@

Change to @ state

C C

R88 150_0402_1%R88 150_0402_1% R89 150_0402_1%R89 150_0402_1% R90 150_0402_1%R90 150_0402_1%

GMCH_CRT_B<19> GMCH_CRT_G<19> GMCH_CRT_R<19>

GMCH_CRT_CLK<19>

B B

GMCH_CRT_DATA<19>

GMCH_CRT_HSYNC<19>

GMCH_CRT_VSYNC<19>

Conntc to 0 Ohm when use PM chip

R91 150_0402_1%GM@R91 150_0402_1%GM@ R92 150_0402_1%GM@R92 150_0402_1%GM@ R93 150_0402_1%GM@R93 150_0402_1%GM@

R94

R95

10/22 follow CRB and Checklist recommend use 30 Ohm (SD028300A80)

Common design recommend H/VSYNC width=8 mil

+3VS

R101 2.2K_0402_5%GM@R101 2.2K_0402_5%GM@

1 2

R103 2.2K_0402_5%GM@R103 2.2K_0402_5%GM@

1 2

R105 10K_0402_5%GM@R105 10K_0402_5%GM@

1 2

R107 10K_0402_5%GM@R107 10K_0402_5%GM@

1 2

A A

R91

0_0402_5%

PM@

5

GMCH_LCD_CLK GMCH_LCD_DATA LCTLB_DATA LCTLA_CLK

R92

0_0402_5%

PM@

R93

0_0402_5%

PM@

4

1

2

100P_0402_50V8J

C96

C97

@

4

LBKLT_EN LCTLA_CLK LCTLB_DATA GMCH_LCD_CLK GMCH_LCD_DATA GMCH_ENVDD

LVDS_IBG

GMCH_TZCLKGMCH_TZCLK+ GMCH_TXCLKGMCH_TXCLK+

GMCH_TZOUT0GMCH_TZOUT1GMCH_TZOUT2-

GMCH_TZOUT0+ GMCH_TZOUT1+ GMCH_TZOUT2+

GMCH_TXOUT0GMCH_TXOUT1GMCH_TXOUT2-

GMCH_TXOUT0+ GMCH_TXOUT1+ GMCH_TXOUT2+

GMCH_TV_COMPS GMCH_TV_LUMA GMCH_TV_CRMA

TV_DCONSEL_0 TV_DCONSEL_1

CRT_IREF

R98

1

1.02K_0402_1%

1 2

2

U3C

L32

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

R99 0_0402_5%PM@R99 0_0402_5%PM@

1 2

R100 0_0402_5%PM@R100 0_0402_5%PM@

1 2

R102 0_0402_5%PM@R102 0_0402_5%PM@

1 2

R104 0_0402_5%PM@R104 0_0402_5%PM@

1 2

R106 0_0402_5%PM@R106 0_0402_5%PM@

1 2

R108 0_0402_5%PM@R108 0_0402_5%PM@

1 2

R109 0_0402_5%R109 0_0402_5%

1 2

R110 0_0402_5%R110 0_0402_5%

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

PEG_COMP

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9

PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8 PEG_TX_9

T37 T36

PCIE_GTX_C_MRX_N0

H44

PCIE_GTX_C_MRX_N1

J46

PCIE_GTX_C_MRX_N2

L44

PCIE_GTX_C_MRX_N3

L40

PCIE_GTX_C_MRX_N4

N41

PCIE_GTX_C_MRX_N5

P48

PCIE_GTX_C_MRX_N6

N44

PCIE_GTX_C_MRX_N7

T43

PCIE_GTX_C_MRX_N8

U43

PCIE_GTX_C_MRX_N9

Y43

PCIE_GTX_C_MRX_N10

Y48

PCIE_GTX_C_MRX_N11

Y36

PCIE_GTX_C_MRX_N12

AA43

PCIE_GTX_C_MRX_N13

AD37

PCIE_GTX_C_MRX_N14

AC47

PCIE_GTX_C_MRX_N15

AD39

PCIE_GTX_C_MRX_P0

H43

PCIE_GTX_C_MRX_P1

J44

PCIE_GTX_C_MRX_P2

L43

PCIE_GTX_C_MRX_P3

L41

PCIE_GTX_C_MRX_P4

N40

PCIE_GTX_C_MRX_P5

P47

PCIE_GTX_C_MRX_P6

N43

PCIE_GTX_C_MRX_P7

T42

PCIE_GTX_C_MRX_P8

U42

PCIE_GTX_C_MRX_P9

Y42

PCIE_GTX_C_MRX_P10

W47

PCIE_GTX_C_MRX_P11

Y37

PCIE_GTX_C_MRX_P12

AA42

PCIE_GTX_C_MRX_P13

AD36

PCIE_GTX_C_MRX_P14

AC48

PCIE_GTX_C_MRX_P15

AD40

PCIE_MTX_GRX_N0

J41

PCIE_MTX_GRX_N1

M46

PCIE_MTX_GRX_N2

M47

PCIE_MTX_GRX_N3

M40

PCIE_MTX_GRX_N4

M42

PCIE_MTX_GRX_N5

R48

PCIE_MTX_GRX_N6

N38

PCIE_MTX_GRX_N7

T40

PCIE_MTX_GRX_N8

U37

PCIE_MTX_GRX_N9

U40

PCIE_MTX_GRX_N10

Y40

PCIE_MTX_GRX_N11

AA46

PCIE_MTX_GRX_N12

AA37

PCIE_MTX_GRX_N13

AA40

PCIE_MTX_GRX_N14

AD43

PCIE_MTX_GRX_N15

AC46

PCIE_MTX_GRX_P0

J42

PCIE_MTX_GRX_P1

L46

PCIE_MTX_GRX_P2

M48

PCIE_MTX_GRX_P3

M39

PCIE_MTX_GRX_P4

M43

PCIE_MTX_GRX_P5

R47

PCIE_MTX_GRX_P6

N37

PCIE_MTX_GRX_P7

T39

PCIE_MTX_GRX_P8

U36

PCIE_MTX_GRX_P9

U39

PCIE_MTX_GRX_P10

Y39

PCIE_MTX_GRX_P11

Y46

PCIE_MTX_GRX_P12

AA36

PCIE_MTX_GRX_P13

AA39

PCIE_MTX_GRX_P14

AD42

PCIE_MTX_GRX_P15

AD46

PEG_COMPI

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9

LVDS TV VGA

PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8

PCI-EXPRESS GRAPHICS

PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_10

PEG_TX_11

PEG_TX_12

PEG_TX_13

PEG_TX_14

PEG_TX_15

CANTIGA ES_FCBGA1329GM@

Reserved for 1.5V level shift circuit

GMCH_LCD_CLK GMCH_LCD_DATA LCTLB_DATA LCTLA_CLK GMCH_CRT_CLK GMCH_CRT_DATA TV_DCONSEL_0 TV_DCONSEL_1

3

2007/08/18 2008/8/18

HDA_BITCLK_NB<21> HDA_RST_NB#<21> HDA_SDOUT_NB<21> HDA_SYNC_NB<21> HDA_SDIN2<21>

U67 pn is SA00002CT00 for 030 used

Compal Secret Data

2

20/25mils R492 Close to GMCH < 0.5'

1 2

R85 49.9_0402_1%R85 49.9_0402_1%

+1.05VS_PEG

PCIE_MTX_C_GRX_N[0..15] PCIE_MTX_C_GRX_P[0..15] PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]

Routing notice:

PCIE_GTX_C_MRX_P3

NB Ext VGA

C64 0.1U_0402_10V7KC64 0.1U_0402_10V7K

C65 0.1U_0402_10V7KC65 0.1U_0402_10V7K

1 2

C67 0.1U_0402_10V7KC67 0.1U_0402_10V7K

1 2

C69 0.1U_0402_10V7KPM@C69 0.1U_0402_10V7KPM@

1 2

C71 0.1U_0402_10V7KPM@C71 0.1U_0402_10V7KPM@

1 2

C73 0.1U_0402_10V7KPM@C73 0.1U_0402_10V7KPM@

1 2

C75 0.1U_0402_10V7KPM@C75 0.1U_0402_10V7KPM@

1 2

C77 0.1U_0402_10V7KPM@C77 0.1U_0402_10V7KPM@

1 2

C79 0.1U_0402_10V7KPM@C79 0.1U_0402_10V7KPM@

1 2

C81 0.1U_0402_10V7KC81 0.1U_0402_10V7K

1 2

C83 0.1U_0402_10V7KC83 0.1U_0402_10V7K

1 2

C85 0.1U_0402_10V7KPM@C85 0.1U_0402_10V7KPM@

1 2

C87 0.1U_0402_10V7KPM@C87 0.1U_0402_10V7KPM@

1 2

C89 0.1U_0402_10V7KPM@C89 0.1U_0402_10V7KPM@

1 2

C91 0.1U_0402_10V7KPM@C91 0.1U_0402_10V7KPM@

1 2

C93 0.1U_0402_10V7KPM@C93 0.1U_0402_10V7KPM@

1 2

C95 0.1U_0402_10V7KPM@C95 0.1U_0402_10V7KPM@

1 2

1

C748

0.1U_0402_16V4Z

Deciphered Date

2

@

HDA_SDOUT_NB HDA_SYNC_NB HDA_SDIN2

1 2

C66 0.1U_0402_10V7KC66 0.1U_0402_10V7K

1 2

C68 0.1U_0402_10V7KPM@C68 0.1U_0402_10V7KPM@ C70 0.1U_0402_10V7KPM@C70 0.1U_0402_10V7KPM@ C72 0.1U_0402_10V7KPM@C72 0.1U_0402_10V7KPM@ C74 0.1U_0402_10V7KPM@C74 0.1U_0402_10V7KPM@ C76 0.1U_0402_10V7KPM@C76 0.1U_0402_10V7KPM@ C78 0.1U_0402_10V7KPM@C78 0.1U_0402_10V7KPM@

C80 0.1U_0402_10V7KC80 0.1U_0402_10V7K

1 2

C82 0.1U_0402_10V7KC82 0.1U_0402_10V7K

1 2

C84 0.1U_0402_10V7KPM@C84 0.1U_0402_10V7KPM@ C86 0.1U_0402_10V7KPM@C86 0.1U_0402_10V7KPM@ C88 0.1U_0402_10V7KPM@C88 0.1U_0402_10V7KPM@ C90 0.1U_0402_10V7KPM@C90 0.1U_0402_10V7KPM@ C92 0.1U_0402_10V7KPM@C92 0.1U_0402_10V7KPM@ C94 0.1U_0402_10V7KPM@C94 0.1U_0402_10V7KPM@

0.1U_0402_16V4Z

U67

16

VCCB

15

CLK_OUT

14

CMD_B

13

B0

12

B1

11

B2

10

B3

9

GND

FXL2SD106BQX_DQFN16_2P5X3P5~D

@

2

PCIE_MTX_C_GRX_N[0..15] <17,25> PCIE_MTX_C_GRX_P[0..15] <17,25> PCIE_GTX_C_MRX_N[0..15] <17> PCIE_GTX_C_MRX_P[0..15] <17>

GM@

R87 0_0402_5%

1 2

R

PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3

1 2 1 2 1 2 1 2 1 2 1 2

+1.5VS+3.3VS

1

C747

2

@

R787

1

VCCA CLK_IN CMD_A

1 2

2

GMCH_HDA_BITCLKHDA_BITCLK_NB

3

GMCH_HDA_RST#HDA_RST_NB#

4

A0

GMCH_HDA_SDOUT

5

A1

GMCH_HDA_SYNC

6

A2

GMCH_HDA_SDIN2

7

A3

8

OE

+1.5VS

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

PCIE_MTX_C_GRX_N4

PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_N15

PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_P3

PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_P15

HDA_BITCLK_NB GMCH_HDA_BITCLK HDA_RST_NB# HDA_SDOUT_NB HDA_SYNC_NB

HDA_SDIN2 GMCH_HDA_SDIN2

10K_0402_5%

Compal Electronics, Inc.

Cantiga (4/7)-VGA/LVDS/TV

JHXXX M/B LA-4241P Schematic

1

TMDS_B_HPD# <25>

CH7318

PCIE_MTX_C_GRX_N0 <17,25> PCIE_MTX_C_GRX_N1 <17,25> PCIE_MTX_C_GRX_N2 <17,25> PCIE_MTX_C_GRX_N3 <17,25>

PCIE_MTX_C_GRX_P0 <17,25> PCIE_MTX_C_GRX_P1 <17,25> PCIE_MTX_C_GRX_P2 <17,25> PCIE_MTX_C_GRX_P3 <17,25>

RP60

45

GMCH_HDA_RST#

36

GMCH_HDA_SDOUT

27

GMCH_HDA_SYNC

18

0_0804_8P4R_5%

0_0804_8P4R_5% R786

R786

1 2

0_0402_5%

GMCH_HDA_BITCLK <8> GMCH_HDA_RST# <8> GMCH_HDA_SDOUT <8> GMCH_HDA_SYNC <8> GMCH_HDA_SDIN2 <8>

10 49Tuesday, June 03, 2008

1

0.4

of

5

hexainf@hotmail.com

U3F

+1.8V

D D

C C

+VCC_AXG

B B

@

T22 PAD

@

T23 PAD

A A

U3F

AP33

VCC_SM_1

AN33

VCC_SM_2

BH32

VCC_SM_3

BG32

VCC_SM_4

BF32

VCC_SM_5

BD32

VCC_SM_6

BC32

VCC_SM_7

BB32

VCC_SM_8

BA32

VCC_SM_9

AY32

VCC_SM_10

AW32

VCC_SM_11

AV32

VCC_SM_12

AU32

VCC_SM_13

AT32

VCC_SM_14

AR32

VCC_SM_15

AP32

VCC_SM_16

AN32

VCC_SM_17

BH31

VCC_SM_18

BG31

VCC_SM_19

BF31

VCC_SM_20

BG30

VCC_SM_21

BH29

VCC_SM_22

BG29

VCC_SM_23

BF29

VCC_SM_24

BD29

VCC_SM_25

BC29

VCC_SM_26

BB29

VCC_SM_27

BA29

VCC_SM_28

AY29

VCC_SM_29

AW29

VCC_SM_30

AV29

VCC_SM_31

AU29

VCC_SM_32

AT29

VCC_SM_33

AR29

VCC_SM_34

AP29

VCC_SM_35

BA36

VCC_SM_36/NC

BB24

VCC_SM_37/NC

BD16

VCC_SM_38/NC

BB21

VCC_SM_39/NC

AW16

VCC_SM_40/NC

AW13

VCC_SM_41/NC

AT13

VCC_SM_42/NC

Y26

VCC_AXG_1

AE25

VCC_AXG_2

AB25

VCC_AXG_3

AA25

VCC_AXG_4

AE24

VCC_AXG_5

AC24

VCC_AXG_6

AA24

VCC_AXG_7

Y24

VCC_AXG_8

AE23

VCC_AXG_9

AC23

VCC_AXG_10

AB23

VCC_AXG_11

AA23

VCC_AXG_12

AJ21

VCC_AXG_13

AG21

VCC_AXG_14

AE21

VCC_AXG_15

AC21

VCC_AXG_16

AA21

VCC_AXG_17

Y21

VCC_AXG_18

AH20

VCC_AXG_19

AF20

VCC_AXG_20

AE20

VCC_AXG_21

AC20

VCC_AXG_22

AB20

VCC_AXG_23

AA20

VCC_AXG_24

T17

VCC_AXG_25

T16

VCC_AXG_26

AM15

VCC_AXG_27

AL15

VCC_AXG_28

AE15

VCC_AXG_29

AJ15

VCC_AXG_30

AH15

VCC_AXG_31

AG15

VCC_AXG_32

AF15

VCC_AXG_33

AB15

VCC_AXG_34

AA15

VCC_AXG_35

Y15

VCC_AXG_36

V15

VCC_AXG_37

U15

VCC_AXG_38

AN14

VCC_AXG_39

AM14

VCC_AXG_40

U14

VCC_AXG_41

T14

VCC_AXG_42

AJ14

VCC_AXG_SENSE

AH14

VSS_AXG_SENSE

CANTIGA ES_FCBGA1329

GM@

5

VCC_AXG_NTCF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8

VCC SM

VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44

VCC GFX NCTF

VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52

POWER

VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55 VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60

VCC GFX

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

VCC SM LF

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

+VCC_AXG

VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7

C127

0.1U_0402_16V4Z

4

Checklist 220u ESR max 15m ohm 330u ESR max 12m ohm

220u ESR 15m ohm Package(L*W*H)7.3*4.3*1.9 Rating 4V

330u ESR 15m ohm Package(L*W*H)7.3*4.3*1.8 Rating 2.5V

C106

C106 220U_D2_4VM_R15

220U_D2_4VM_R15

C111

330U_D2E_2.5VM

+VCC_AXG

C118

330U_D2E_2.5VM

GM@

Add these caps around PCI-E bus of NB

1

2

C128

0.1U_0402_16V4Z

4

C129

0.22U_0402_6.3V6K

2

1

C130

2

0.22U_0402_6.3V6K

3

+1.05VS

VCC: 2898.52mA (220UF*1, 22UF*1, 0.22UF*2, 0.1UF*1)

1

+

2

10U_0805_10V4Z

VCC_SM: 3300mA

+1.8V

(330UF*1,22UF*2, 0.1UF*1)

1

+

2

22U_0805_6.3V6M@

VCC_AXG: 8700mA (330UF*2,22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2)

1

C119

+

2

GM@

330U_D2E_2.5VM

+1.05VS

1

C763

0.1U_0402_16V4Z

2

1

C131

0.47U_0603_16V4Z

2

C108

C107

0.22U_0603_16V7K

1

C112

10U_0805_10V4Z

2

C120

1

10U_0805_10V4Z

2

GM@

1

C764

0.1U_0402_16V4Z

2

C132

1U_0603_10V4Z

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.22U_0603_16V7K

C113

4.7U_0805_10V4Z

C121

1

2

GM@

10U_0805_10V4Z

1

2

C133

C133 1U_0603_10V4Z

1U_0603_10V4Z

Issued Date

C109

0.1U_0402_16V4Z

C114

1U_0603_10V4Z

C122

1U_0603_10V4Z

GM@

C765

0.1U_0402_16V4Z

3

1

C110

2

9/14 add for reservation (IFTXX)

1

C116

C117

C115

2

0.1U_0402_16V4Z@

C123

GM@

0.47U_0603_16V4Z

1

C766

0.1U_0402_16V4Z

2

C117 1U_0603_10V4Z

1U_0603_10V4Z

@

C124

1

0.1U_0402_16V4Z

2

GM@

1

C767

0.1U_0402_16V4Z

2

C125

1

2

GM@

0.1U_0402_16V4Z

R114

R114 0_0805_5%

0_0805_5%

PM@

10/05 This is for GM@ (IFTXX) Remember open stencil at GM@

+1.05VS +VCC_AXG

J1

1 2

PAD-OPEN 3x3m

GM@

J5 JOPENGM@J5 JOPENGM@ J6 JOPENGM@J6 JOPENGM@ J7 JOPENGM@J7 JOPENGM@

12 12 12

1/25 Change J5, J6, J7 from 43x79 to 43x39

Compal Secret Data

2007/08/18 2008/8/18

Compal Secret Data

Deciphered Date

2

C126

1U_0603_10V4Z

@

2

+1.05VS

1

U3G

AG34

VCC_1

AC34

VCC_2

AB34

VCC_3

AA34

VCC_4

Y34

VCC_5

V34

VCC_6

U34

VCC_7

AM33

VCC_8

AK33

VCC_9

AJ33

VCC_10

AG33

VCC_11

AF33

VCC_12

AE33

VCC_13

AC33

VCC_14

AA33

VCC_15

Y33

VCC_16

W33

VCC_17

V33

VCC_18

U33

VCC_19

AH28

VCC_20

AF28

VCC_21

AC28

VCC_22

AA28

VCC_23

AJ26

VCC_24

AG26

VCC_25

AE26

VCC_26

AC26

VCC_27

AH25

VCC_28

AG25

VCC_29

AF25

VCC_30

AG24

VCC_31

AJ23

VCC_32

AH23

VCC_33

AF23

VCC_34

T32

VCC_35

CANTIGA ES_FCBGA1329

GM@

Title

Size Document Number Rev

Custom

Date: Sheet

VCC CORE

POWER

11 49Tuesday, June 03, 2008

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8

VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28

VCC NCTF

VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31 VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38 VCC_NCTF_39 VCC_NCTF_40 VCC_NCTF_41 VCC_NCTF_42 VCC_NCTF_43 VCC_NCTF_44

Compal Electronics, Inc.

Cantiga GMCH(5/7)-GTL

JHXXX M/B LA-4241P Schematic

1

of

+1.05VS

0.4

5

L2

+1.05VS

VCCA_HPLL: 24mA

Please check Power source if want support IAMT

D D

(4.7UF*1, 0.1UF*1)

VCCA_MPLL: 139.2mA (22UF*1, 0.1UF*1)

1 2

MBK1608121YZF_0603

120Ohm@100MHz

L3

1 2

MBK1608121YZF_0603

C134

4.7U_0805_10V4Z

R116

1_0603_1%

+1.05VS_HPLL

1

2

+1.05VS_MPLL

12

1

2

VCCA_CRT_DAC: 73mA (0.1UF*1, 0.01UF*1)

+3VS_TV_CRT_DAC

1 2

R120

R120 0_0603_5%

0_0603_5%

GM@

1

C149

GM@

0.1U_0402_16V4Z

2

0.01U_0402_16V7K

1

C135

2

0.1U_0402_16V4Z

Please check Power source if want support IAMT

1

C146

2

C147

C147 10U_0805_10V4Z

10U_0805_10V4Z

+3VS_CRTDAC

1

C150

GM@

2

+1.05VS

0.1U_0402_16V4Z

12

L1

10U_FLC-453232-100K_0.25A_10%

10uH 10% 201005-548

GM@

L55

MBK1608121YZF_0603

VCCA_DPLLA VCCA_DPLLB: 64.8mA (220UF*1, 0.1UF*1)

GM@

L56

MBK1608121YZF_0603

L4

10U_FLC-453232-100K_0.25A_10%

10uH 10% 201005-548

220u ESR 15m ohm Package(L*W*H)7.3*4.3*1.9 Rating 4V

+3VS

+1.5VS

Please check Power source if want support IAMT

R121

R121 0_0402_5%

0_0402_5%

PM@

Close to Ball A26, B27

C C

+3VS_TV_CRT_DAC

220u ESR 15m ohm Package(L*W*H)7.3*4.3*1.9 Rating 4V

VCCA_DAC_BG: 2.6833333mA (0.1UF*1, 0.01UF*1)

1 2

R127

R127 0_0603_5%

0_0603_5%

C164

GM@

0.1U_0402_16V4Z

1

C165

GM@

2

0.01U_0402_16V7K

Please check Power source if want support IAMT

+3VS_DACBG

1

C166

GM@

10U_0805_10V4Z

2

12

R128

R128 0_0402_5%

0_0402_5%

PM@

+1.05VS

C155

C155 220U_D2_4VM_R15

220U_D2_4VM_R15

Close to Ball A25

1 2

+3VS

R131

R131 0_0603_5%

0_0603_5%

B B

GM@

+3VS

A A

1

C707

@

1U_0402_6.3V4Z

2

VCCA_TV_DAC: 40mA (0.1UF*1,

0.01UF*1 for each DAC)

L8

1 2

MBK1608221YZF_0603

GM@

180Ohm@100MHz

+1.5VS

copy G913CF_SOT23-5 Footprint

U36

1

Vin

3

SHDN

2

GND

G916T1UF

GM@

VCCD_TVDAC: 58.696mA (0.1UF*1, 0.01UF*1)

1 2

R136

R136 0_0603_5%

0_0603_5%

@U36

@

4

Vout

R679 2K_0402_1%

5

SET

R680 10K_0402_1%

5

1

C174

GM@

0.1U_0402_16V4Z

2

1

C183

0.1U_0402_16V4Z

2

0.022U_0402_16V7K

+1.5VS_LDO

@

1 2

@

1 2

+3VS_TV_CRT_DAC

1

C175

GM@

2

0.01U_0402_16V7K

+1.5VS_TVDAC

1

C184

Also power for internal Thermal Sensor

2

+1.5VS

1 2

R681 0_0402_5%R681 0_0402_5%

C710

@

4.7U_0805_10V4Z

12

R133

R133 0_0402_5%

0_0402_5%

PM@

L9

1 2

MBK1608221YZF_0603

180Ohm@100MHz

4

+1.05VS_DPLLA

@L1

1 2

+1.05VS

C154

C154 10U_0805_10V4Z

10U_0805_10V4Z

@

C136

@

220U_D2_4VM_R15

+1.05VS_DPLLB

@L4

@

C142

@

220U_D2_4VM_R15

R118

R118 0_0603_5%@

0_0603_5%@

1 2

R119

R119 0_0603_5%

0_0603_5%

1 2

L5

L5 MBK1608221YZF_0603

MBK1608221YZF_0603

1 2

12

R123

R123 1_0402_1%

1_0402_1%

1 2

R124

1

0_0603_5%

+

2

Please check Power source if want support IAMT

1 2

+1.05VS

R126

R126 0_0603_5%

0_0603_5%

+1.5VS

Please check Power source if want support IAMT

VCCD_QDAC: 48.363mA (0.1UF*1, 0.01UF*1)

1

C186

0.1U_0402_16V4Z

2

0.01U_0402_16V7K

4

0.1U_0402_16V4Z

1

+

C137

GM@

2

0.1U_0402_16V4Z

1

+

C143

GM@

2

+1.8V_TX_LVDS

+VCCA_PEG_BG

1

0.1U_0402_16V4Z

2

1 2

+1.05VS_A_SM

C156

C156 22U_0805_6.3V6M

22U_0805_6.3V6M

@

NO_STUFF

1 2

R132

R132 0_0603_5%

0_0603_5%

GM@

0_0402_5%

+1.05VS

1

C187

2

1

2

1

2

C144

GM@

1000P_0402_50V7K

VCCA_PEG_BG: 0.414mA

C148

(0.1UF*1)

1

C157

2

10U_0805_10V4Z

+1.05VS_A_SM_CK

C162

@

2.2U_0603_6.3V6K

1

R115

PM@

R117

PM@

0_0402_5%

C705

GM@

2

0_0402_5%

10U_0805_10V4Z

12

1

C706

GM@

2

1

2

+1.05VS_A_PEGPLL

1

C151

0.1U_0402_16V4Z

2

VCCA_SM: (22UF*2, 4.7UF*1, 1UF*1)

1

C158

4.7U_0805_10V4Z

2

VCCA_SM_CK: 24mA (22UF*1, 2.2UF*1,0.1UF*1)

1

C167

2

10U_0805_10V4Z

12

NO_STUFF

+3VS_TV_CRT_DAC

+1.5VS_HDA

R134

PM@

12

C176

GM@

0.1U_0402_16V4Z

VCCD_HDA: 50mA (0.1UF*1)

1

Close to A32

2

VCCD_HPLL: 157.2mA (0.1UF*1)

1

C178

0.1U_0402_16V4Z

2

Close to AF1

VCCD_PEG_PLL: 50mA (0.1UF*1)

+1.8V

+1.5VS_QDAC

3

Checklist 220u ESR max 15m ohm

220u ESR 15m ohm Package(L*W*H)7.3*4.3*1.9 Rating 4V

+3VS_CRTDAC

+3VS_DACBG

+1.05VS_DPLLA

+1.05VS_DPLLB

+1.05VS_HPLL +1.05VS_MPLL

VCCA_LVDS: 13.2mA (1000PF*1)

VCCA_PEG_PLL: 50mA (10UF*1,0.1UF*1)

1

C159

2

1U_0402_6.3V4Z

1

C163

0.1U_0402_16V4Z

2

+1.5VS_TVDAC

+1.5VS_QDAC

+1.05VS_A_PEGPLL

1

C179

Close to AA47

0.1U_0402_16V4Z

2

1 2

R137

R137 0_0402_5%

0_0402_5%

GM@

1U_0402_6.3V4Z

VCCD_LVDS: 60.31mA (1UF*1)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AD1 AE1

AD48

AA48

AR20 AP20 AN20 AR17 AP17 AN17 AT16 AR16 AP16

AP28 AN28 AP25 AN25

AN24 AM28 AM26 AM25

AL25 AM24

AL24 AM23

AL23

M25

AA47

M38

+1.8V_LVDS

1

C185

GM@

2

3

U3H

73mA

B27

VCCA_CRT_DAC_1

A26

VCCA_CRT_DAC_2

5mA

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

64.8mA

F47

VCCA_DPLLA

L48

VCCA_DPLLB

24mA

VCCA_HPLL

139.2mA

VCCA_MPLL

13.2mA

J48

VCCA_LVDS

J47

VSSA_LVDS

0.414mA

VCCA_PEG_BG

50mA

VCCA_PEG_PLL

720mA

VCCA_SM_1 VCCA_SM_2 VCCA_SM_3 VCCA_SM_4 VCCA_SM_5 VCCA_SM_6 VCCA_SM_7 VCCA_SM_8 VCCA_SM_9

26mA

VCCA_SM_CK_1 VCCA_SM_CK_2 VCCA_SM_CK_3 VCCA_SM_CK_4 VCCA_SM_CK_5 VCCA_SM_CK_NCTF_1 VCCA_SM_CK_NCTF_2 VCCA_SM_CK_NCTF_3 VCCA_SM_CK_NCTF_4 VCCA_SM_CK_NCTF_5 VCCA_SM_CK_NCTF_6 VCCA_SM_CK_NCTF_7 VCCA_SM_CK_NCTF_8

79mA

B24

VCCA_TV_DAC_1

A24

VCCA_TV_DAC_2

50mA

A32

VCC_HDA

35mA

VCCD_TVDAC

1mA

L28

VCCD_QDAC

157.2mA

AF1

VCCD_HPLL

50mA

VCCD_PEG_PLL

60.31mA

VCCD_LVDS_1

L37

VCCD_LVDS_2

CANTIGA ES_FCBGA1329

GM@

12

R138

R138 0_0402_5%

0_0402_5%

PM@

2007/08/18 2008/8/18

POWER

HDA

TV+CRT use Ivccd_qdac = 0.5u+0.5u =1mA

852mA

VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7

VTT

VTT_8

VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25

CRTPLLA LVDSA PEG

321.35mA

VCC_AXF_1 VCC_AXF_2

A SM

VCC_AXF_3

AXF

124mA

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

SM CK

118.8mA

VCC_TX_LVDS

105.3mA

A CK

VCC_HV_1 VCC_HV_2 VCC_HV_3

HV

1782mA

VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5

TV

456mA

VCC_DMI_1 VCC_DMI_2 VCC_DMI_3 VCC_DMI_4

DMI PEG

VTTLF1 VTTLF2 VTTLF3

VTTLF

LVDS D TV/CRT

Compal Secret Data

Deciphered Date

U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47

C35 B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

A8 L1 AB2

0.47U_0603_16V4Z

2

220u ESR 15m ohm Package(L*W*H)7.3*4.3*1.9 Rating 4V

+1.05VS

1

+

C138

C138 220U_D2_4VM_R15

220U_D2_4VM_R15

2

+1.05VS_AXF

1

C152

@

10U_0805_6.3V6M

+1.8V_TX_LVDS: 118.8mA (22UF*1, 1000PF*1)

VCC_HV: 105.3mA (0.1UF*1)

VCC_DMI: 456mA (0.1UF*1)

VTTLF_CAP1 VTTLF_CAP2 VTTLF_CAP3

C180

2

1

2

1

C181

2

0.47U_0603_16V4Z

+1.05VS +3VS

2

VTT: 852mA (270UF*1, 4.7UF*2, 2.2UF*1, 0.47UF*1)

1

C139

C140

4.7U_0805_10V4Z

2

2.2U_0603_6.3V6K

4.7U_0805_10V4Z

VCC_AXF: 321.35mA (10UF*1, 1UF*1)

1

C153

C153 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+1.8V_SM_CK

1

C160

0.1U_0402_16V4Z

2

12

R129

PM@

0_0402_5%

+3VS

C170

0.1U_0402_16V4Z

+1.05VS_PEG: 1782mA (220UF*1, 22UF*1, 4.7UF*1)

1

C171

2

4.7U_0805_10V4Z

+1.05VS_DMI

1

C177

0.1U_0402_16V4Z

2

1

C182

0.47U_0603_16V4Z

2

D3

2 1

@

CH751H-40PT_SOD323-2

2.2U_0603_6.3V6K

1 2

R122

R122 0_0603_5%

0_0603_5%

VCC_SM_CK: 124mA ( 10UF*1,0.1UF*1)

1 2

R125

R125 1_0402_1%

1_0402_1%

+1.8V_TX_LVDS

1

C168

GM@

1000P_0402_50V7K

2

+1.05VS_PEG

1

+

C172

2

10U_0805_10V4Z

R139

1 2

10_0603_5%

Title

Size Document Number Rev

Custom

Date: Sheet

2

220U_V_6.3VM_R15

1 2

R135

R135 0_0805_5%

0_0805_5%

CRB have reserved another filter for +VCC_DMI separated from +1.05VS_PEG, should we?

@

Compal Electronics, Inc.

Cantiga GMCH(6/7)-GTL

JHXXX M/B LA-4241P Schematic

1

C141

C145

0.47U_0603_16V4Z

2

Please check Power source if want support IAMT

+1.05VS

1uH 30%

1 2

L6

L6 MBK1608121YZF_0603

MBK1608121YZF_0603

1 2

C161

C161 10U_0805_10V4Z

10U_0805_10V4Z

0.1uH 20%

1 2

L7 MBK1608121YZF_0603GM@L7 MBK1608121YZF_0603GM@

C169

GM@

10U_0805_10V4Z

CRB use 0.1uH, should we?

1 2

R733

R733 0_0805_5%

0_0805_5%

1 2

R130

R130 0_0805_5%

0_0805_5%

C173

+1.05VS_PEG

1

+1.8V

Please check Power source if want support IAMT

+1.05VS

220u ESR 15m ohm Package(L*W*H)7.3*6.6*5.9 Rating 6.3V

of

12 49Tuesday, June 03, 2008

1

0.4

5

hexainf@hotmail.com

U3I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

AF47

VSS_8

AD47

VSS_9

AB47

VSS_10

Y47

VSS_11

T47

BD46 BA46 AY46 AV46 AR46

AM46

BF44 AH44 AD44 AA44

BC43 AV43 AU43

AM43

BG42 AY42 AT42 AN42

AJ42

AE42

BD41 AU41

AM41

AH41 AD41 AA41

BG40 BB40 AV40 AN40

AT39

AM39

AJ39

AE39

BH38 BC38 BA38 AU38 AH38 AD38 AA38

BF37 BB37

AW37

AT37 AN37

AJ37

BG36 BD36 AK15 AU36

VSS_12

N47

VSS_13

L47

VSS_14

G47

VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21

V46

VSS_22

R46

VSS_23

P46

VSS_24

H46

VSS_25

F46

VSS_26 VSS_27 VSS_28 VSS_29 VSS_30

Y44

VSS_31

U44

VSS_32

T44

VSS_33

M44

VSS_34

F44

VSS_35 VSS_36 VSS_37 VSS_38 VSS_39

J43

VSS_40

C43

VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47

N42

VSS_48

L42

VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55

Y41

VSS_56

U41

VSS_57

T41

VSS_58

M41

VSS_59

G41

VSS_60

B41

VSS_61 VSS_62 VSS_63 VSS_64 VSS_65

H40

VSS_66

E40

VSS_67 VSS_68 VSS_69 VSS_70 VSS_71

N39

VSS_72

L39

VSS_73

B39

VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81

Y38

VSS_82

U38

VSS_83

T38

VSS_84

J38

VSS_85

F38

VSS_86

C38

VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93

H37

VSS_94

C37

VSS_95 VSS_96 VSS_97 VSS_98 VSS_99

VSS

CANTIGA ES_FCBGA1329GM@

D D

C C

B B

A A

VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

4

U3J

BG21

VSS_199

L12

VSS_200

AW21

VSS_201

AU21

VSS_202

AP21

VSS_203

AN21

VSS_204

AH21

VSS_205

AF21

VSS_206

AB21

VSS_207

R21

VSS_208

M21

VSS_209

J21

VSS_210

G21

VSS_211

BC20

VSS_212

BA20

VSS_213

AW20

VSS_214

AT20

VSS_215

AJ20

VSS_216

AG20

VSS_217

Y20

VSS_218

N20

VSS_219

K20

VSS_220

F20

VSS_221

C20

VSS_222

A20

VSS_223

BG19

VSS_224

A18

VSS_225

BG17

VSS_226

BC17

VSS_227

AW17

VSS_228

AT17

VSS_229

R17

VSS_230

M17

VSS_231

H17

VSS_232

C17 BA16 AU16

AN16

BG15 AC15

W15

BG14 AA14

BG13 BC13 BA13

AN13

AJ13

AE13

BF12 AV12 AT12

AM12

AA12

BD11 BB11 AY11 AN11 AH11

BG10 AV10 AT10

AJ10 AE10 AA10

N16 G16

C14

N13 G13

N11 G11 C11

M10 BF9 BC9 AN9 AM9 AD9

BH8 BB8 AV8 AT8

VSS_233 VSS_235 VSS_237

VSS_238 VSS_239

K16

VSS_240 VSS_241

E16

VSS_242 VSS_243 VSS_244 VSS_245

A15

VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252

VSS_255 VSS_256 VSS_257 VSS_258

L13

VSS_259 VSS_260

E13

VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266

J12

VSS_267

A12

VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273

Y11

VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290

G9

VSS_291

B9

VSS_292 VSS_293 VSS_294 VSS_295 VSS_296

VSS

CANTIGA ES_FCBGA1329GM@

VSS NCTF

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16

VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5

VSS SCB

NC

3

VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325

VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350

VSS_351 VSS_352 VSS_353 VSS_354

NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34 NC_35 NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_42

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1

U24 U28 U25 U29

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

BH48 BH1 A48 C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/18 2008/8/18

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga GMCH(7/7)-GTL

JHXXX M/B LA-4241P Schematic

13 49Tuesday, June 03, 2008

of

1

0.4

5

4

3

2

1

+1.8V +1.8V

JDIMM1

+DIMM_VREF

DDRA_SDQ0 DDRA_SDQ1

DDRA_SDQS0#<9> DDRA_SDQS0<9>

D D

DDRA_SDQS1#<9> DDRA_SDQS1<9>

DDRA_SDQS2#<9> DDRA_SDQS2<9>

EC_TX_P80_DATA<15,32>

C C

EC_RX_P80_CLK<15,32>

B B

EC_RX_P80_CLK

A A

DDRA_CKE0<8>

DDRA_SBS2<9>

DDRA_SBS0<9> DDRA_SWE#<9>

DDRA_SCAS#<9> DDRA_SCS1#<8>

DDRA_ODT1<8>

DDRA_SDQS4#<9> DDRA_SDQS4<9>

R144 0_0402_5%R144 0_0402_5%

1 2

EC_RX_P80_CLK_R<15>

DDRA_SDQS6#<9> DDRA_SDQS6<9>

D_CK_SDATA<15,16> D_CK_SCLK<15,16>

+3VS

DDRA_SDQS0# DDRA_SDQS0

DDRA_SDQ2 DDRA_SDQ3

DDRA_SDQ8 DDRA_SDQ9

DDRA_SDQS1# DDRA_SDQS1

DDRA_SDQ10 DDRA_SDQ11

DDRA_SDQ16 DDRA_SDQ17

DDRA_SDQS2# DDRA_SDQS2

DDRA_SDQ18 DDRA_SDQ19

DDRA_SDQ24 DDRA_SDQ25

DDRA_SDM3 EC_TX_P80_DATA

DDRA_SDQ26 DDRA_SDQ27

DDRA_CKE0 EC_RX_P80_CLK

DDRA_SBS2 DDRA_SMA12

DDRA_SMA9 DDRA_SMA8

DDRA_SMA5 DDRA_SMA3 DDRA_SMA1

DDRA_SMA10 DDRA_SBS0 DDRA_SWE#

DDRA_SCAS# DDRA_SCS1#

DDRA_ODT1 DDRA_SDQ32

DDRA_SDQ33 DDRA_SDQS4#

DDRA_SDQS4 DDRA_SDQ34

DDRA_SDQ35 DDRA_SDQ40

DDRA_SDQ41 DDRA_SDM5 DDRA_SDQ42

DDRA_SDQ43 DDRA_SDQ48

DDRA_SDQ49

EC_RX_P80_CLK_R

DDRA_SDQS6# DDRA_SDQS6

DDRA_SDQ50 DDRA_SDQ51

DDRA_SDQ56 DDRA_SDQ57

DDRA_SDM7 DDRA_SDQ58

DDRA_SDQ59 D_CK_SDATA

D_CK_SCLK

+3VS

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

FOX_ASOA426-M2RN-7F

CONN@

DQ4 DQ5

DM0 DQ6

DQ7

DQ12 DQ13

DM1

CK0#

DQ14 DQ15

DQ20 DQ21

DM2

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3 DQ30

DQ31

NC/CKE1

VDD NC/A15 NC/A14

VDD

RAS#

VDD

ODT0

NC/A13

VDD

DQ36 DQ37

DM4

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5 DQ46

DQ47 DQ52

DQ53

CK1#

DM6

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7 DQ62

DQ63

VSS

VSS VSS

VSS

VSS VSS

CK0 VSS

VSS

BA1

VSS

VSS VSS

VSS

VSS CK1

VSS VSS

VSS

VSS SA0 SA1

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50

NC

52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90

A11

92

A7

94

A6

96 98

A4

100

A2

102

A0

104 106 108 110

S0#

112 114 116 118 120

NC

122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

DIMM1 STD H:5.2mm (BOT)

1

C215

C214

0.1U_0402_16V4Z

2.2U_0603_6.3V6K

12/22 Change from 0805 to 0603 (IFTXX)

5

2

4

11/12 Change to HEL80's

DDRA_SDQ4 DDRA_SDQ5

DDRA_SDM0 DDRA_SDQ6

DDRA_SDQ7 DDRA_SDQ12

DDRA_SDQ13 DDRA_SDM1

DDRA_CLK0 <8>

1 2

DDRA_CLK0# <8>

DDRA_SDQS3# <9> DDRA_SDQS3 <9>

DDRA_CKE1 <8>

DDRA_SBS1 <9> DDRA_SRAS# <9> DDRA_SCS0# <8>

DDRA_ODT0 <8>

DDRA_SDQS5# <9> DDRA_SDQS5 <9>

DDRA_CLK1 <8> DDRA_CLK1# <8>

DDRA_SDQS7# <9> DDRA_SDQS7 <9>

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DDRA_SDQ14 DDRA_SDQ15

DDRA_SDQ20 DDRA_SDQ21

R143 0_0402_5%R143 0_0402_5%

DDRA_SDM2 DDRA_SDQ22

DDRA_SDQ23 DDRA_SDQ28

DDRA_SDQ29 DDRA_SDQS3#

DDRA_SDQS3 DDRA_SDQ30

DDRA_SDQ31 DDRA_CKE1

DDRA_SMA14 DDRA_SMA11

DDRA_SMA7 DDRA_SMA6

DDRA_SMA4 DDRA_SMA2 DDRA_SMA0

DDRA_SBS1 DDRA_SRAS# DDRA_SCS0#

DDRA_ODT0 DDRA_SMA13

DDRA_SDQ36 DDRA_SDQ37

DDRA_SDM4 DDRA_SDQ38

DDRA_SDQ39 DDRA_SDQ44

DDRA_SDQ45 DDRA_SDQS5#

DDRA_SDQS5 DDRA_SDQ46

DDRA_SDQ47 DDRA_SDQ52

DDRA_SDQ53

DDRA_SDM6 DDRA_SDQ54

DDRA_SDQ55 DDRA_SDQ60

DDRA_SDQ61 DDRA_SDQS7#

DDRA_SDQS7 DDRA_SDQ62

DDRA_SDQ63

R146 10K_0402_5%R146 10K_0402_5%

1 2

R147 10K_0402_5%R147 10K_0402_5%

1 2

PM_EXTTS#0 <8>

Issued Date

+1.8V

12

R141

+DIMM_VREF

20mils

1

C189

C188

0.1U_0402_16V4Z

2

2.2U_0603_6.3V6K

DDRA_SMA[0..14]<9> DDRA_SDQ[0..63]<9> DDRA_SDM[0..7]<9>

DDRA_CKE0 DDRA_SBS2

RP1 56_0404_4P2R_5%RP1 56_0404_4P2R_5%

DDRA_SMA12 DDRA_SMA9

RP2 56_0404_4P2R_5%RP2 56_0404_4P2R_5%

DDRA_SMA8 DDRA_SMA5

RP3 56_0404_4P2R_5%RP3 56_0404_4P2R_5%

DDRA_SMA3 DDRA_SMA1

RP4 56_0404_4P2R_5%RP4 56_0404_4P2R_5%

DDRA_SMA10 DDRA_SBS0

RP5 56_0404_4P2R_5%RP5 56_0404_4P2R_5%

DDRA_SWE# DDRA_SCAS#

RP6 56_0404_4P2R_5%RP6 56_0404_4P2R_5%

DDRA_SCS1# DDRA_ODT1

RP7 56_0404_4P2R_5%RP7 56_0404_4P2R_5%

DDRA_SMA11 DDRA_SMA14

RP8 56_0404_4P2R_5%RP8 56_0404_4P2R_5%

DDRA_SMA6 DDRA_SMA7

RP9 56_0404_4P2R_5%RP9 56_0404_4P2R_5%

DDRA_SMA2 DDRA_SMA4

RP10 56_0404_4P2R_5%RP10 56_0404_4P2R_5%

DDRA_SBS1 DDRA_SMA0

RP11 56_0404_4P2R_5%RP11 56_0404_4P2R_5%

DDRA_SCS0# DDRA_SRAS#

RP12 56_0404_4P2R_5%RP12 56_0404_4P2R_5%

DDRA_SMA13 DDRA_ODT0

RP13 56_0404_4P2R_5%RP13 56_0404_4P2R_5%

DDRA_CKE1

R145 56_0402_5%R145 56_0402_5%

Layout Note: Place these resistor closely JP35,all trace length Max=1.5"

2007/08/18 2008/8/18

3

DDRA_SMA[0..14] DDRA_SDQ[0..63] DDRA_SDM[0..7]

1 4 2 3

1 2

Compal Secret Data

Deciphered Date

R141

1K_0402_1%

R142

1K_0402_1%

+0.9VS

12

1

C190

C190 220P_0402_50V7K

220P_0402_50V7K

2

@

+1.8V

C191

2.2U_0603_6.3V6K

+1.8V

1

C197

0.1U_0402_16V4Z

2

+0.9VS

1

C201

0.1U_0402_16V4Z

2

+0.9VS

1

C206

0.1U_0402_16V4Z

2

+0.9VS

1

C211

0.1U_0402_16V4Z

2

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS

2

+DIMM_VREF

C192

2.2U_0603_6.3V6K

1

C198

0.1U_0402_16V4Z

2

1

C202

0.1U_0402_16V4Z

2

1

C207

0.1U_0402_16V4Z

2

1

C212

0.1U_0402_16V4Z

2

Title

Size Document Number Rev

B

Date: Sheet

330u ESR 15m ohm Package(L*W*H)7.3*4.3*1.8 Rating 2.5V

Layout Note: Place near JP34

C195

C193

2.2U_0603_6.3V6K

C194

2.2U_0603_6.3V6K

1

C199

0.1U_0402_16V4Z

2

1

C203

0.1U_0402_16V4Z

2

1

C208

0.1U_0402_16V4Z

2

1

C213

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

JHXXX M/B LA-4241P Schematic

C195

2.2U_0603_6.3V6K

1

C200

0.1U_0402_16V4Z

2

1

C204

0.1U_0402_16V4Z

2

1

C209

0.1U_0402_16V4Z

2

1

C702

0.1U_0402_16V4Z

2

DDRII-SODIMM1

1

C196

+

@

330U_D2E_2.5VM

2

1

C205

0.1U_0402_16V4Z

2

1

C210

0.1U_0402_16V4Z

2

14 49Wednesday, May 28, 2008

of

0.4

A

hexainf@hotmail.com

B

C

D

E

11/12 Change DIMM1 as HEL80's

JDIMM2

+DIMM_VREF

DDRB_SDQ0 DDRB_SDQ1

1 1

2 2

3 3

4 4

EC_TX_P80_DATA<14,32>

EC_RX_P80_CLK<14,32>

EC_RX_P80_CLK_R<14>

DDRB_SDQS0#<9> DDRB_SDQS0<9>

DDRB_SDQS1#<9> DDRB_SDQS1<9>

DDRB_SDQS2#<9> DDRB_SDQS2<9>

DDRB_CKE0<8>

DDRB_SBS2<9>

DDRB_SBS0<9> DDRB_SWE#<9>

DDRB_SCAS#<9> DDRB_SCS1#<8>

DDRB_ODT1<8>

DDRB_SDQS4#<9> DDRB_SDQS4<9>

DDRB_SDQS6#<9> DDRB_SDQS6<9>

D_CK_SDATA<14,16> D_CK_SCLK<14,16>

DDRB_SDQS0# DDRB_SDQS0

DDRB_SDQ2 DDRB_SDQ3

DDRB_SDQ8 DDRB_SDQ9

DDRB_SDQS1# DDRB_SDQS1

DDRB_SDQ10 DDRB_SDQ11

DDRB_SDQ16

DDRB_SDQS2# DDRB_SDQS2

DDRB_SDQ18 DDRB_SDQ19

DDRB_SDQ24 DDRB_SDQ25

DDRB_SDM3 EC_TX_P80_DATA

DDRB_SDQ26 DDRB_SDQ30 DDRB_SDQ27

DDRB_CKE0 EC_RX_P80_CLK

DDRB_SBS2 DDRB_SMA12

DDRB_SMA9 DDRB_SMA8

DDRB_SMA5 DDRB_SMA3 DDRB_SMA1

DDRB_SMA10 DDRB_SBS0 DDRB_SWE#

DDRB_SCAS# DDRB_SCS1#

DDRB_ODT1 DDRB_SDQ32

DDRB_SDQ33 DDRB_SDQS4#

DDRB_SDQS4 DDRB_SDQ34

DDRB_SDQ35 DDRB_SDQ40

DDRB_SDQ41 DDRB_SDM5 DDRB_SDQ42

DDRB_SDQ43 DDRB_SDQ48

DDRB_SDQ49

EC_RX_P80_CLK_R

DDRB_SDQS6# DDRB_SDQS6

DDRB_SDQ50 DDRB_SDQ51

DDRB_SDQ56

DDRB_SDM7 DDRB_SDQ58

DDRB_SDQ59 D_CK_SDATA

D_CK_SCLK

+3VS

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

P-TWO_A5692B-A0G16-P

CONN@

Change PCB Footprint

DQS3#

NC/CKE1

NC/A15 NC/A14

NC/A13

DQS5#

DQS7#

DIMM2 STD H:9.2mm (BOT)

A

VSS DQ4 DQ5

VSS DM0

VSS DQ6 DQ7

VSS

DQ12 DQ13

VSS DM1

VSS

CK0

CK0#

VSS

DQ14 DQ15

VSS

DQ20 DQ21

VSS DM2

VSS

DQ22 DQ23

VSS

DQ28 DQ29

VSS

DQS3

VSS

DQ30 DQ31

VSS VDD

VDD

BA1

RAS#

VDD

ODT0

VDD

VSS

DQ36 DQ37

VSS DM4

VSS

DQ38 DQ39

VSS

DQ44 DQ45

VSS

DQS5

VSS

DQ46 DQ47

VSS

DQ52 DQ53

VSS

CK1

CK1#

VSS DM6

VSS

DQ54 DQ55

VSS

DQ60 DQ61

VSS

DQS7

VSS

DQ62 DQ63

VSS SAO

SA1

+1.8V+1.8V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50

NC

52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90

A11

92

A7

94

A6

96 98

A4

100

A2

102

A0

104 106 108 110

S0#

112 114 116 118 120

NC

122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

B

DDRB_SDQ4 DDRB_SDQ5

DDRB_SDM0 DDRB_SDQ6

DDRB_SDQ7 DDRB_SDQ12

DDRB_SDQ13 DDRB_SDM1

DDRB_SDQ14 DDRB_SDQ15

DDRB_SDQ20 DDRB_SDQ21DDRB_SDQ17

DDRB_SDM2 DDRB_SDQ22

DDRB_SDQ23 DDRB_SDQ28

DDRB_SDQ29 DDRB_SDQS3#

DDRB_SDQS3

DDRB_SDQ31 DDRB_CKE1

DDRB_SMA14 DDRB_SMA11

DDRB_SMA7 DDRB_SMA6

DDRB_SMA4 DDRB_SMA2 DDRB_SMA0

DDRB_SBS1 DDRB_SRAS# DDRB_SCS0#

DDRB_ODT0 DDRB_SMA13

DDRB_SDQ36 DDRB_SDQ37

DDRB_SDM4 DDRB_SDQ38

DDRB_SDQ39 DDRB_SDQ44

DDRB_SDQ45 DDRB_SDQS5#

DDRB_SDQS5 DDRB_SDQ46

DDRB_SDQ47 DDRB_SDQ52

DDRB_SDQ53

DDRB_SDM6 DDRB_SDQ54

DDRB_SDQ55 DDRB_SDQ60

DDRB_SDQ61DDRB_SDQ57 DDRB_SDQS7#

DDRB_SDQS7 DDRB_SDQ62

DDRB_SDQ63

R150 10K_0402_5%R150 10K_0402_5%

1 2

R151 10K_0402_5%R151 10K_0402_5%

1 2

R148

0_0402_5%

1 2

DDRB_SMA[0..14]<9> DDRB_SDQ[0..63]<9> DDRB_SDM[0..7]<9>

DDRB_CLK0 <8> DDRB_CLK0# <8>

PM_EXTTS#1 <8>

DDRB_SDQS3# <9> DDRB_SDQS3 <9>

DDRB_CKE1 <8>

DDRB_SBS1 <9> DDRB_SRAS# <9> DDRB_SCS0# <8>

DDRB_ODT0 <8>

DDRB_SDQS5# <9> DDRB_SDQS5 <9>

DDRB_CLK1 <8> DDRB_CLK1# <8>

DDRB_SDQS7# <9> DDRB_SDQS7 <9>

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/18 2008/8/18

DDRB_CKE0 DDRB_SBS2

DDRB_SMA12 DDRB_SMA9

DDRB_SMA8 DDRB_SMA5

DDRB_SMA3 DDRB_SMA1

DDRB_SMA10 DDRB_SBS0

DDRB_SWE# DDRB_SCAS#

DDRB_SCS1# DDRB_ODT1

DDRB_SMA11 DDRB_SMA14

DDRB_SMA6 DDRB_SMA7

DDRB_SMA2 DDRB_SMA4

DDRB_SBS1 DDRB_SMA0

DDRB_SCS0# DDRB_SRAS#

DDRB_SMA13 DDRB_ODT0

DDRB_CKE1

Layout Note: Place these resistor closely JP35,all trace length Max=1.5"

Compal Secret Data

Deciphered Date

DDRB_SMA[0..14] DDRB_SDQ[0..63] DDRB_SDM[0..7]

1 4 2 3

RP14 56_0404_4P2R_5%RP14 56_0404_4P2R_5%

1 4 2 3

RP15 56_0404_4P2R_5%RP15 56_0404_4P2R_5%

1 4 2 3

RP16 56_0404_4P2R_5%RP16 56_0404_4P2R_5%

1 4 2 3

RP17 56_0404_4P2R_5%RP17 56_0404_4P2R_5%

1 4 2 3

RP18 56_0404_4P2R_5%RP18 56_0404_4P2R_5%

1 4 2 3

RP19 56_0404_4P2R_5%RP19 56_0404_4P2R_5%

1 4 2 3

RP20 56_0404_4P2R_5%RP20 56_0404_4P2R_5%

1 4 2 3

RP21 56_0404_4P2R_5%RP21 56_0404_4P2R_5%

1 4 2 3

RP22 56_0404_4P2R_5%RP22 56_0404_4P2R_5%

1 4 2 3

RP23 56_0404_4P2R_5%RP23 56_0404_4P2R_5%

1 4 2 3

RP24 56_0404_4P2R_5%RP24 56_0404_4P2R_5%

1 4 2 3

RP25 56_0404_4P2R_5%RP25 56_0404_4P2R_5%

1 4 2 3

RP26 56_0404_4P2R_5%RP26 56_0404_4P2R_5%

1 2

R149 56_0402_5%R149 56_0402_5%

D

+0.9VS

+DIMM_VREF

C216

2.2U_0603_6.3V6K

+1.8V

C218

C219

2.2U_0603_6.3V6K

+1.8V

1

C224

C225

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

+0.9VS

1

C229

C228

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

+0.9VS

1

C233

C234

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

+0.9VS

1

C239

C238

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS

Title

Size Document Number Rev

B

Date: Sheet

1

C217

0.1U_0402_16V4Z

2

330u ESR 15m ohm Package(L*W*H)7.3*4.3*1.8 Rating 2.5V

Layout Note: Place near JP35

C222

C221

C227

C231

C236

C222

2.2U_0603_6.3V6K

1

2

1

C232

2

0.1U_0402_16V4Z

1

C237

0.1U_0402_16V4Z

2

E

C220

2.2U_0603_6.3V6K

1

C226

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

C230

0.1U_0402_16V4Z

2

1

2

1

2

JHXXX M/B LA-4241P Schematic

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

C235

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

C240

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

DDRII-SODIMM2

C223

@

330U_D2E_2.5VM

1

2

1

2

15 49Wednesday, May 28, 2008

of

1

+

2

0.4

A

+1.05VS

R155

12

+1.05VS

12

R155 56_0402_5%

56_0402_5%

@

1 2

12

R160

R160 1K_0402_5%

1K_0402_5%

@

R161

R161 1K_0402_5%

1K_0402_5%

@

1 2

12

R167

R167 0_0402_5%

0_0402_5%

@

R173

R173 1K_0402_5%

1K_0402_5%

@

1 2

12

R179

R179 0_0402_5%

0_0402_5%

@

CPU MHz

166.6

2000

R158

R158 1K_0402_5%

1K_0402_5%

R162

R162 1K_0402_5%

1K_0402_5%

R176

R176 1K_0402_5%

1K_0402_5%

SRC MHz

1000

100

1 1

CPU_BSEL0<5>

CPU_BSEL1<5>

2 2

FSA

R157

2.2K_0402_5%

1 2

R159

R159 0_0402_5%

0_0402_5%

FSB

1 2

R168

R168 0_0402_5%

0_0402_5%

Follow CRB and Checklist

R175

R175 10K_0402_5%

10K_0402_5%

FSC

CLKSEL1

1 2

R177

R177 0_0402_5%

0_0402_5%

FSLA

CLKSEL0

CPU_BSEL2<5>

3 3

FSLC0FSLB

CLKSEL2

1

266.600 0 100 33.3

For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP# For 27_SEL, 0 = Enable DOT96 & SRC1,

For TME, 0 = Overclocking of CPU and SRC allowed

1 = Overclocking of CPU and SRC NOT allowed

C255 18P_0402_50V8JC255 18P_0402_50V8J

4 4

14.31818MHZ_16PF_DSX840GA

C256 18P_0402_50V8JC256 18P_0402_50V8J

Y1

CLK_XTAL_IN

12

CLK_XTAL_OUT

Routing the trace at least 10mil

A

B

+3VS

MCH_CLKSEL0 <8>

MCH_CLKSEL1 <8>

MCH_CLKSEL2 <8>

PCI MHz

33.31

33.3

1= Enable SRC0 & 27MHz

+3VS +3VS

R191

R191 10K_0402_5%

10K_0402_5%

@

1 2

ITP_EN 27_SEL

R195

R195 10K_0402_5%

10K_0402_5%

1 2

B

+1.05VS

PM_STP_CPU#<22> PM_STP_PCI#<22>

CLK_PCI_EC<32>

CLK_PCI_TPM<40> CLK_PCI_DB<35> CLK_PCI_ICH<20> VGATE<8,22,48>

CLK_EN#<48> CK_PWRGD<22>

CLK_ICH_48M<22>

CLK_ICH_14M<22> CLK_14M_SIO<35>

R192

R192 10K_0402_5%

10K_0402_5%

PM@

1 2

R196

R196 10K_0402_5%

10K_0402_5%

GM@

1 2

C

R152

0_0805_5%

R156

0_0805_5%

C

+CLK_VDD

1

C241

C241 10U_0805_10V4Z

10U_0805_10V4Z

2

+CLK_VDDSRC

1

C248

C248 10U_0805_10V4Z

10U_0805_10V4Z

2

+CLK_VDDSRC

R623 0_0402_5%@R623 0_0402_5%@

1 2

R624 0_0402_5%@R624 0_0402_5%@

1 2

R625 0_0402_5%R625 0_0402_5%

1 2

+3VS

R193

R193 10K_0402_5%

10K_0402_5%

@

1 2

TME

R197

R197 10K_0402_5%

10K_0402_5%

1 2

1

C242

0.1U_0402_16V4Z

2

1

2

+CLK_VDD

1 2

1 2 1 2 1 2

1 2

1 2 1 2

D

C249

0.1U_0402_16V4Z

1

C243

0.1U_0402_16V4Z

2

1

C250

0.1U_0402_16V4Z

2

1

C244

0.1U_0402_16V4Z

2

1

C251

0.1U_0402_16V4Z

2

E

1

C245

0.1U_0402_16V4Z

2

1

C252

0.1U_0402_16V4Z

2

1

C246

0.1U_0402_16V4Z

2

1

C253

0.1U_0402_16V4Z

2

F

1

2

C247

0.1U_0402_16V4Z

10/3 Change symbol

U4

6

VDDREF

19

VDD48

72

VDDCPU

12

VDDPCI

27

VDDPLL3

55

VDDSRC

52

VDDSRC_IO

38

VDDSRC_IO

62

VDDSRC_IO

31

VDDPLL3_IO

66

VDDCPU_IO

23

VDD96_IO

PM_STP_CPU#

PM_STP_PCI#

R17433_0402_5% R17433_0402_5%

R70433_0402_5% R70433_0402_5% R17833_0402_5% R17833_0402_5% R18033_0402_5% R18033_0402_5%

CLK_XTAL_IN CLK_XTAL_OUT

R18133_0402_5% R18133_0402_5%

R18233_0402_5% R18233_0402_5% R18333_0402_5% R18333_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

PCI1 TME PCI_TPM 27_SEL ITP_EN

FSA FSB

FSC

REF1

53

CPU_STOP#

54

PCI_STOP#

13

PCI1

14

PCI2/TME

15

PCI3

16

PCI4/27_SELECT

17

PCI_F5/ITP_EN

1

CK_PWRGD/PD#

5

X1

4

X2

11

NC

20

USB_48MHz/FSLA

2

FSLB/TEST_MODE

7

FSLC/TEST_SEL/REF0

8

REF1

73

Thermal GND

69

GNDCPU

3

GNDREF

18

GNDPCI

22

GND48

30

GND

26

GND

34

GNDSRC

59

GNDSRC

42

GNDSRC

ICS9LPRS387AKLFT_MLF72_10x10

11/29 Modify symbol to have additional pin 73

SDATA

CPUT0_LPR_F CPUC0_LPR_F

CPUT1_LPR_F CPUC1_LPR_F

SRCT0_LPR/DOTT_96_LPR

SRCC0_LPR/DOTC_96_LPR

27MHz_NonSS/SRCT1_LPR/SE1

27MHz_SS/SRCC1_LPR/SE2

SRCT2_LPR/SATAT_LPR

SRCC2_LPR/SATAC_LPR

SRCT3_LPR SRCC3_LPR

SRCT4_LPR SRCC4_LPR

SRCT6_LPR SRCC6_LPR

SRCT7_LPR SRCC7_LPR

CPUT2_ITP_LPR/SRCT8_LPR

CPUC2_ITP_LPR/SRCC8_LPR

SRCT9_LPR SRCC9_LPR

SRCT10_LPR SRCC10_LPR

SRCT11_LPR SRCC11_LPR

SCLK

CR#3 CR#4 CR#6 CR7#

CR#9 CR10# CR#11

CR#A

D_CK_SCLK

10

CLK_CPU_BCLK

71

CLK_CPU_BCLK#

70

CLK_MCH_BCLK

68

CLK_MCH_BCLK#

67

R_CLK_DOT

24

R_CLK_DOT#

25

CLK_PCIE0

28

CLK_PCIE0#

29

CLK_PCIE_SATA

32

CLK_PCIE_SATA#

33

CLK_PCIE_ICH

35

CLK_PCIE_ICH#

36

CLK_MCH_3GPLL

39

CLK_MCH_3GPLL#

40

CLK_PCIE_EXP

57

CLK_PCIE_EXP#

56

CLK_PCIE_LAN

61

CLK_PCIE_LAN#

60

CLK_PCIE_CARD

64

CLK_PCIE_CARD#

63

CLK_PCIE_WLAN

44

CLK_PCIE_WLAN#

45

CLK_PCIE_NAND

50

CLK_PCIE_NAND#

51

CLK_PCIE_3G

48

CLK_PCIE_3G#

47

37 41 58 65 43 49 46 21

D_CK_SDATA

9

Rev:B

Compal Secret Data

E

Compal Secret Data

Deciphered Date

F

2007/08/18 2008/8/18

1

C254

0.1U_0402_16V4Z

2

CR#9

CR#11

R799 0_0402_5%@R799 0_0402_5%@ R797 0_0402_5%

R797 0_0402_5%

ICH_SMBDATA<22,30,31>

ICH_SMBCLK<22,30,31>

R163 0_0402_5%GM@R163 0_0402_5%GM@

1 2

R164 0_0402_5%PM@R164 0_0402_5%PM@

1 2

R165 0_0402_5%GM@R165 0_0402_5%GM@

1 2

R166 0_0402_5%PM@R166 0_0402_5%PM@

1 2

R169 0_0402_5%GM@R169 0_0402_5%GM@

1 2

R170 0_0402_5%@R170 0_0402_5%@

1 2

R171 0_0402_5%GM@R171 0_0402_5%GM@

1 2

R172 0_0402_5%@R172 0_0402_5%@

1 2

R796 0_0402_5% R796 0_0402_5%

1 2

1 2 1 2

3G_CLKREQ# SATA_CLKREQ#CR#A

@

3G_CLKREQ# WLAN_CLKREQ#

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

G

+3VS

R153

2.2K_0402_5%

2N7002DW-T/R7_SOT363-6

+3VS

2N7002DW-T/R7_SOT363-6

Clock generator-ICS9LPRS387

G

2.2K_0402_5%

Q3A

6 1

2 5

3

4

Q3B

D_CK_SDATA <14,15> D_CK_SCLK <14,15>

CLK_CPU_BCLK <4> CLK_CPU_BCLK# <4>

CLK_MCH_BCLK <7> CLK_MCH_BCLK# <7>

CLK_DREF_96M <8> CLK_PCIE_VGA <17> CLK_DREF_96M# <8> CLK_PCIE_VGA# <17>

CLK_DREF_SSC <8> CLK_27M_VGA <17> CLK_DREF_SSC# <8> CLK_27M_VGA# <17>

CLK_PCIE_SATA <21> CLK_PCIE_SATA# <21>

CLK_PCIE_ICH <22> CLK_PCIE_ICH# <22>

CLK_MCH_3GPLL <8> CLK_MCH_3GPLL# <8>

CLK_PCIE_EXP <31> CLK_PCIE_EXP# <31>

CLK_PCIE_LAN <28> CLK_PCIE_LAN# <28>

CLK_PCIE_CARD <26> CLK_PCIE_CARD# <26>

CLK_PCIE_WLAN <30> CLK_PCIE_WLAN# <30>

CLK_PCIE_NAND <30> CLK_PCIE_NAND# <30>

CLK_PCIE_3G <30> CLK_PCIE_3G# <30>

R184 10K_0402_5%R184 10K_0402_5%

1 2

R186 10K_0402_5%R186 10K_0402_5%

1 2

R190 10K_0402_5%R190 10K_0402_5%

1 2 1 2

R194 10K_0402_5%R194 10K_0402_5%

3G_CLKREQ# <30> SATA_CLKREQ# <22>

C750 100P_0402_50V8J@C750 100P_0402_50V8J@

1 2

C749 100P_0402_50V8J C749 100P_0402_50V8J

1 2

Compal Electronics, Inc.

JHXXX M/B LA-4241P Schematic

H

R154

2.2K_0402_5%

D_CK_SDATA

D_CK_SCLK

+3VS

MCH_CLKREQ# <8>

+3VS

EXP_CLKREQ# <31> LAN_CLKREQ# <28>

+3VS

WLAN_CLKREQ# <30>

+3VS

16 49Wednesday, May 28, 2008

of

16 49Wednesday, May 28, 2008

of

16 49Wednesday, May 28, 2008

H

0.4

5

hexainf@hotmail.com

4

3

2

1

PCIE_MTX_C_GRX_N[0..15]<10,25> PCIE_MTX_C_GRX_P[0..15]<10,25> PCIE_GTX_C_MRX_N[0..15]<10> PCIE_GTX_C_MRX_P[0..15]<10>

D D

B+

PCIE_GTX_C_MRX_N15 PCIE_GTX_C_MRX_P15

PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P14

C C

B B

PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P13

PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P12

PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P11

PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P10

PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P9

PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P8

PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P7

PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_P6

PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_P5

PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_P4

PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P3

PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P2

PCIE_MTX_C_GRX_N[0..15] PCIE_MTX_C_GRX_P[0..15] PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]

JMXM1A

1

PWR_SRC

3

PWR_SRC

5

PWR_SRC

7

PWR_SRC

9

PWR_SRC

11

PWR_SRC

13

PWR_SRC

15

PWR_SRC

17

GND

19

GND

21

GND

23

GND

25

PEX_RX15#

27

PEX_RX15

29

GND

31

PEX_RX14#

33

PEX_RX14

35

GND

37

PEX_RX13#

39

PEX_RX13

41

GND

43

PEX_RX12#

45

PEX_RX12

47

GND

49

PEX_RX11#

51

PEX_RX11

53

GND

55

PEX_RX10#

57

PEX_RX10

59

GND

61

PEX_RX9#

63

PEX_RX9

65

GND

67

PEX_RX8#

69

PEX_RX8

71

GND

73

PEX_RX7#

75

PEX_RX7

77

GND

79

PEX_RX6#

81

PEX_RX6

83

GND

85

PEX_RX5#

87

PEX_RX5

89

GND

91

PEX_RX4#

93

PEX_RX4

95

GND

97

PEX_RX3#

99

PEX_RX3

101

GND

103

PEX_RX2#

105

PEX_RX2

107

GND

ACES_88990-2D08

1V8RUN 1V8RUN 1V8RUN 1V8RUN 1V8RUN 1V8RUN 1V8RUN

RUNPWROK

5VRUN

GND GND GND

PRSNT2#

PEX_TX15#

PEX_TX15

GND

PEX_TX14#

PEX_TX14

GND

PEX_TX13#

PEX_TX13

GND

PEX_TX12#

PEX_TX12

GND

PEX_TX11#

PEX_TX11

GND

PEX_TX10#

PEX_TX10

GND

PEX_TX9#

PEX_TX9

GND

PEX_TX8#

PEX_TX8

GND

PEX_TX7#

PEX_TX7

GND

PEX_TX6#

PEX_TX6

GND

PEX_TX5#

PEX_TX5

GND

PEX_TX4#

PEX_TX4

GND

PEX_TX3#

PEX_TX3

GND

PEX_TX2#

PEX_TX2

9/13 modify this footprint from ACES_88990-2D08_230P to ACES_88990-2D28_230P 12/19 modify this footprint from ACES_88990-2D28_230P to QUASA_CA0330-230N20_230P 0208 : Modify this footprint from QUASA_CA0330-230N20_230P to QUASA_CA0330-230N20_230P-S 12/10 footprint QUASA_CA0330-230N20_230P

PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_P1

2 4 6 8 10 12 14 16 18 20 22 24

26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108

SUSP# <31,32,41,46,47>

+5VS

PCIE_MTX_C_GRX_N15 PCIE_MTX_C_GRX_P15

PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P14

PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_P13

PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P12

PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_P11

PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P10

PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P9

PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_P8

PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P7

PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P6

PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_P5

PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P4

PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P3

PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P2

CLK_PCIE_VGA#<16> CLK_PCIE_VGA<16>

PLT_RST_BUF#<8,20,26,28,30,40> HDA_SYNC_MXM<21> HDA_BITCLK_MXM<21> EC_SMB_DA2<4,32> EC_SMB_CK2<4,32> VGA_THERM#<32> VGA_CRT_HSYNC<19> VGA_CRT_VSYNC<19> VGA_DDC_CLK<19> VGA_DDC_DATA<19> HDA_SDIN3<21> HDA_SDOUT_MXM<21>

CLK_27M_VGA#<16> CLK_27M_VGA<16> VGA_AC_DET<32>

VGA_HDMI_DETECT<25> VGA_HDMI_CLK-<25> VGA_HDMI_CLK+<25>

VGA_HDMI_TX2-<25> VGA_HDMI_TX2+<25>

VGA_HDMI_TX1-<25> VGA_HDMI_TX1+<25>

VGA_HDMI_TX0-<25> VGA_HDMI_TX0+<25>

PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_P0

CLK_PCIE_VGA# CLK_PCIE_VGA

HDA_SYNC_MXM HDA_BITCLK_MXM

VGA_THERM# VGA_CRT_VSYNC

VGA_DDC_CLK VGA_DDC_DATA HDA_SDIN3 HDA_SDOUT_MXM

CLK_27M_VGA# CLK_27M_VGA VGA_AC_DET HDA_RST_030

VGA_HDMI_DETECT VGA_HDMI_CLKVGA_HDMI_CLK+

VGA_HDMI_TX2VGA_HDMI_TX2+

VGA_HDMI_TX1VGA_HDMI_TX1+

VGA_HDMI_TX0VGA_HDMI_TX0+

JMXM1B

109

PEX_RX1#

111

PEX_RX1

113

GND

115

PEX_RX0#

117

PEX_RX0

119

GND

121

PEX_REFCLK#

123

PEX_REFCLK

125

CLK_REQ#

127

PEX_RST#

129

RSVD

131

RSVD

133

SMB_DAT

135

SMB_CLK

137

THERM#

139

VGA_HSYNC

141

VGA_VSYNC

143

DDCA_CLK

145

DDCA_DAT

147

IGP_UCLK#

149

IGP_UCLK

151

GND

153

RSVD

155

RSVD

157

RSVD

159

IGP_UTX2#

161

IGP_UTX2

163

GND

165

IGP_UTX1#

167

IGP_UTX1

169

GND

171

IGP_UTX0#

173

IGP_UTX0

175

GND

177

IGP_LCLK#/DVI_B_CLK#

179

IGP_LCLK/DVI_B_CLK

181

DVI_B_HPD/GND

183

RSVD

185

RSVD

187

GND

189

IGP_LTX2#/DVI_B_TX2#

191

IGP_LTX2/DVI_B_TX2

193

GND

195

IGP_LTX1#/DVI_B_TX1#

197

IGP_LTX1/DVI_B_TX1

199

GND

201

IGP_LTX0#/DVI_B_TX0#

203

IGP_LTX0/DVI_B_TX0

205

DVI_A_HPD

207

DVI_A_CLK#

209

DVI_A_CLK

211

GND

213

DVI_A_TX2#

215

DVI_A_TX2

217

GND

219

DVI_A_TX1#

221

DVI_A_TX1

223

GND

225

DVI_A_TX0#

227

DVI_A_TX0

229

GND

ACES_88990-2D08

GND

PEX_TX1#

PEX_TX1

GND

PEX_TX0#

PEX_TX0

PRSNT1#

TV_C/HDTV_Pr

GND

TV_Y/HDTV_Y

TV_CVBS/HDTV_Pb

GND GND

VGA_RED

GND

VGA_GRN

GND

VGA_BLU

GND

LVDS_UCLK#

LVDS_UCLK

GND

LVDS_UTX3#

LVDS_UTX3

GND

LVDS_UTX2#

LVDS_UTX2

GND

LVDS_UTX1#

LVDS_UTX1

GND

LVDS_UTX0#

LVDS_UTX0

GND

LVDS_LCLK#

LVDS_LCLK

GND

LVDS_LTX3#

LVDS_LTX3

GND

LVDS_LTX2#

LVDS_LTX2

GND

LVDS_LTX1#

LVDS_LTX1

GND

LVDS_LTX0#

LVDS_LTX0

GND DDCC_DAT DDCC_CLK

LVDS_PPEN

LVDS_BL_BRGHT

LVDS_BLEN

DDCB_DAT DDCB_CLK

2V5RUN

GND

3V3RUN 3V3RUN 3V3RUN

110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230

PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_P1

PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P0

VGA_TV_CRMA VGA_TV_LUMA VGA_TV_COMPS

HDA_RST_NB9X# VGA_CRT_R

VGA_CRT_GVGA_CRT_HSYNC VGA_CRT_B TXCLK-

TXCLK+

SPDIFO TXOUT2TXOUT2+

TXOUT1TXOUT1+

TXOUT0TXOUT0+

TZCLKTZCLK+

TZOUT2TZOUT2+

TZOUT1TZOUT1+

TZOUT0TZOUT0+

I2CC_SDA I2CC_SCL ENVDD

VGA_ENBKL VGA_HDMIDAT VGA_HDMICLK

+3VS

PAD

T4

@

PAD

T5

@

PAD

T6

@

VGA_CRT_R <19> VGA_CRT_G <19> VGA_CRT_B <19> TXCLK- <18>

TXCLK+ <18>

10/3 for HDMI

SPDIFO <36> TXOUT2- <18> TXOUT2+ <18>

TXOUT1- <18> TXOUT1+ <18>

TXOUT0- <18> TXOUT0+ <18>

TZCLK- <18> TZCLK+ <18>

TZOUT2- <18> TZOUT2+ <18>

TZOUT1- <18> TZOUT1+ <18>

TZOUT0- <18> TZOUT0+ <18>

I2CC_SDA <18> I2CC_SCL <18> ENVDD <18>

VGA_ENBKL <18> VGA_HDMIDAT <25> VGA_HDMICLK <25>

10/3 for HDMI

+3VS +5VSB+

2

C257

0.1U_0603_25V7K

A A

PM@

5

1

C260

4.7U_0805_10V4Z

PM@

1

2

C261

0.1U_0402_16V4Z

2

PM@

1

C263

0.1U_0402_16V4Z

2

PM@

4

1 2

HDA_RST_MXM#<21>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HDA_RST_MXM#

2007/08/18 2008/8/18

3

R693 0_0402_5%NB9X@R693 0_0402_5%NB9X@

1 2

R694 0_0402_5%PM@R694 0_0402_5%PM@

Compal Secret Data

Deciphered Date

HDA_RST_NB9X#

HDA_RST_030

2

SPDIFO

R198 0_0402_5%

1 2

GM@

R693 R694 NB9X 030 NB9X NB8X

Title

Size Document Number Rev

Date: Sheet

Mount No stuff

No stuff No stuff

Compal Electronics, Inc.

Custom

JHXXX M/B LA-4241P Schematic

MountNo stuff

MXM Connector

1

17 49Wednesday, May 28, 2008

of

0.4

5

4

3

2

1

LCD POWER CIRCUIT

+3VS

S

G

2

D

1 3

1

C266

@ C266

@

4.7U_0805_10V4Z

2

W=60mils

Q5

Q5 SI2301BDS_SOT23

SI2301BDS_SOT23

+LCDVDD

1

C264

4.7U_0805_10V4Z

2

W=60mils

1

C267

0.1U_0402_16V4Z

2

R199

R199 300_0603_5%

300_0603_5%

2

G

12

R204

+3VALW

12

R200

R200 100K_0402_5%

100K_0402_5%

R201 100K_0402_5%R201 100K_0402_5%

13

D

Q6

2

SSM3K7002FU_SC70-3

G

S

2

1

12

C265

0.1U_0402_10V7K

+LCDVDD

12

D D

13

D

Q4

1 2 1 2

Q4

GM@

GM@ PM@

PM@

100K_0402_5%

S

SSM3K7002FU_SC70-3

R202 0_0402_5%

GMCH_ENVDD<10> ENVDD<17>

R202 0_0402_5% R203 0_0402_5%

R203 0_0402_5%

LCD/PANEL BD. Conn. (IFTXX)

TZOUT0+<17> TZOUT0-<17>

C C

+3VS

1

C268

0.1U_0402_16V4Z

2

+LCDVDD_L

1

C271

C271 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C272

0.1U_0402_16V4Z

2

+LCDVDD

FBMA-L11-201209-221LMA30T_0805

TZOUT1+<17> TZOUT1-<17>

TZOUT2+<17> TZOUT2-<17>

TZCLK+<17> TZCLK-<17>

L10

+3VS

LTCX000G500 footprint is still use ACES_88242-3001

B B

A A

TZOUT0+ TZOUT0-

TZOUT1+ TZOUT1- TXOUT1-

TZOUT2+ TZOUT2-

TZCLK+ TZCLK-

+LCDVDD_L

12

(60 MIL)

1

C269

C269 220P_0402_50V7K

220P_0402_50V7K

2

<EMI>

Follow HEL80's pin definition Except pin 29

JLVDS1

112

3

5

7

7 9910 111112

13

15

17

19

21

23

25

27

29

31

GND1

32

GND2

ACES_88242-3001

ACES_88242-3001 CONN@

CONN@

TXOUT0+

2

TXOUT0-

4

6

6 8

14 16 18 20 22 24 26 28 30

TXOUT1+

8 10 12

TXOUT2+

14

TXOUT2-

16 18

TXCLK+

20

TXCLK-

22 24 26 28 30

I2CC_SDA I2CC_SCL

1

C270

C270 220P_0402_50V7K

220P_0402_50V7K

2

<EMI>

+3VS

TXOUT0+ <17> TXOUT0- <17>

TXOUT1+ <17> TXOUT1- <17>

TXOUT2+ <17> TXOUT2- <17>

TXCLK+ <17> TXCLK- <17>

I2CC_SDA <17> I2CC_SCL <17>

0208 Add C796 , C797 for EMI

Routing Diagram

MXMII Conn.

LVDS

LVDS Bus

Use Daisy chain to route

I2CC_SDA GMCH_LCD_DATA TXOUT0+

TXOUT0TXOUT1-

TXOUT1+ TXOUT2-

TXOUT2+ TXCLK+

TXCLKTZOUT0+

TZOUT0TZOUT1+

TZOUT1TZOUT2-

TZOUT2+ TZCLK+

TZCLK-

1 4 2 3

RP27 0_0404_4P2R_5%GM@RP27 0_0404_4P2R_5%GM@

1 4 2 3

RP28 0_0404_4P2R_5%GM@RP28 0_0404_4P2R_5%GM@

1 4 2 3

RP29 0_0404_4P2R_5%GM@RP29 0_0404_4P2R_5%GM@

1 4 2 3

RP30 0_0404_4P2R_5%GM@RP30 0_0404_4P2R_5%GM@

1 4 2 3

RP31 0_0404_4P2R_5%GM@RP31 0_0404_4P2R_5%GM@

1 4 2 3

RP32 0_0404_4P2R_5%GM@RP32 0_0404_4P2R_5%GM@

1 4 2 3

RP33 0_0404_4P2R_5%GM@RP33 0_0404_4P2R_5%GM@

1 4 2 3

RP34 0_0404_4P2R_5%GM@RP34 0_0404_4P2R_5%GM@

1 4 2 3

RP35 0_0404_4P2R_5%GM@RP35 0_0404_4P2R_5%GM@

GMCH_LCD_CLKI2CC_SCL

GMCH_TXOUT0+ GMCH_TXOUT0-

GMCH_TXOUT1GMCH_TXOUT1+

GMCH_TXOUT2GMCH_TXOUT2+

GMCH_TXCLK+ GMCH_TXCLK-

GMCH_TZOUT0+ GMCH_TZOUT0-

GMCH_TZOUT1+ GMCH_TZOUT1-

GMCH_TZOUT2GMCH_TZOUT2+

GMCH_TZCLK+ GMCH_TZCLK-

INVERTER Conn.

JP37

1

<EMI>

2 3 4 5 6 7

MOLEX_53780-0790

CONN@

D4

D4 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

21

R206 0_0402_5%GM@R206 0_0402_5%GM@ R207 0_0402_5%PM@R207 0_0402_5%PM@

12

INVT_PWM<32> DAC_BRIG<32>

+INVPWR_B+

BKOFF#<32>

GMCH_ENBKL<10> VGA_ENBKL<17>

C276

0.1U_0603_50V4Z

DISPOFF#

BKOFF# DISPOFF#

+INVPWR_B+

L11

KC FBM-L11-201209-221LMAT_0805

L12

KC FBM-L11-201209-221LMAT_0805

1

C277

C277 68P_0402_50V8K

68P_0402_50V8K

2

@

12/22 Change to SE071680J80

NBR

12 12

B+

GMCH_LCD_CLK <10> GMCH_LCD_DATA <10>

GMCH_TXOUT0+ <10> GMCH_TXOUT0- <10>

GMCH_TXOUT1- <10> GMCH_TXOUT1+ <10>

GMCH_TXOUT2- <10> GMCH_TXOUT2+ <10>

GMCH_TXCLK+ <10> GMCH_TXCLK- <10>

GMCH_TZOUT0+ <10> GMCH_TZOUT0- <10>

GMCH_TZOUT1+ <10> GMCH_TZOUT1- <10>

GMCH_TZOUT2- <10> GMCH_TZOUT2+ <10>

GMCH_TZCLK+ <10> GMCH_TZCLK- <10>

12/18 modified from 220p @ to 470p mount by EMI request

DAC_BRIG INVT_PWM DISPOFF#

+3VS

12

1 2

R205

4.7K_0402_5%

ENBKL

R208

R208 100K_0402_5%

100K_0402_5%

<EMI>

1 2

C273 470P_0402_50V7K

<EMI>

1 2

C274 470P_0402_50V7K

<EMI>

1 2

C275 470P_0402_50V7K

ENBKL <32>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/08/18 2008/8/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

LVDS & DVI Connector

JHXXX M/B LA-4241P Schematic

1

of

18 49Wednesday, May 28, 2008

0.4

A

hexainf@hotmail.com

CRT Connector

1 1

R734 0_0402_5%PM@R734 0_0402_5%PM@

VGA_CRT_R<17> GMCH_CRT_R<10>

VGA_CRT_G<17> GMCH_CRT_G<10>

VGA_CRT_B<17> GMCH_CRT_B<10>

2 2

1 2

R209 0_0402_5%GM@R209 0_0402_5%GM@

1 2

R735 0_0402_5%PM@R735 0_0402_5%PM@

1 2

R210 0_0402_5%GM@R210 0_0402_5%GM@

1 2

R736 0_0402_5%PM@R736 0_0402_5%PM@

1 2

R211 0_0402_5%GM@R211 0_0402_5%GM@

1 2

Place closed to chipset

12

R212

150_0402_1%

VGA_CRT_HSYNC<17> GMCH_CRT_HSYNC<10>

R213

150_0402_1%

VGA_CRT_VSYNC<17> GMCH_CRT_VSYNC<10>

B

C

Checklist recommend: 2-pole filter on R/G/B signals C - L - C - L - C 10p - 47 Ohm/100MHz - 22p - 47 Ohm/100MHz - 10p

12/15 Modified. Note L26~L30 are 0 Ohm resisters (IFTXX)

VGA_CRT_R1

VGA_CRT_G1 CRT_G_1

VGA_CRT_B1

12

R214

150_0402_1%

1 2

R737 0_0402_5%PM@R737 0_0402_5%PM@

1 2

R217 0_0402_5%GM@R217 0_0402_5%GM@

C279

10P_0402_50V8J

1

C280

2

10P_0402_50V8J

1 2

C289 0.1U_0402_16V4ZC289 0.1U_0402_16V4Z

VGA_CRT_HSYNC1

Place closed to chipset

1 2

R738 0_0402_5%PM@R738 0_0402_5%PM@

1 2

R219 0_0402_5%GM@R219 0_0402_5%GM@

L14 0_0603_5%L14 0_0603_5%

L16 0_0603_5%L16 0_0603_5%

L18 0_0603_5%L18 0_0603_5%

1

C281

2

10P_0402_50V8J

+CRT_VCC

1 2

C294 0.1U_0402_16V4ZC294 0.1U_0402_16V4Z

VGA_CRT_VSYNC1

1

5

U5

P

4

OE#

A2Y

G

TC7SET125FUF_SC70

3

+CRT_VCC

1

C282

C283

2

22P_0402_50V8J

CRT_HSYNC_0

5

1

U6

P

OE#

A2Y

G

TC7SET125FUF_SC70

3

CRT_R_1

CRT_B_1

1

2

CRT_VSYNC_0

4

C285

22P_0402_50V8J

L15

1 2

FBMA-L10-160808-800LMT_0603

FBMA-L10-160808-800LMT_0603 L17

L17

1 2

FBMA-L10-160808-800LMT_0603

FBMA-L10-160808-800LMT_0603 L19

L19

1 2

FBMA-L10-160808-800LMT_0603

1

2

12

R215 10K_0402_5%R215 10K_0402_5%

CRT_HSYNC_1

1 2

R216 39_0402_1%R216 39_0402_1%

1 2

R218 39_0402_1%R218 39_0402_1%

+3VS

C284

10P_0402_50V8J

CRT_VSYNC_1

D6

D5

@

DAN217_SC59

1

2

D6

@

DAN217_SC59

1

2

3

1

C286

C286 10P_0402_50V8J

10P_0402_50V8J

2

1 2

L20 FCM1608C-121T_0603

<EMI>

1 2

L21 FCM1608C-121T_0603

<EMI>

D

1

2

3

10P_0402_50V8J

+5VS

D7

@

DAN217_SC59

1

2

3

CRT_R_2

CRT_G_2

CRT_B_2

1

C287

C287 10P_0402_50V8J

10P_0402_50V8J

2

CRT_HSYNC_2

CRT_VSYNC_2

1

C291

2

<EMI>

DAN217_SC59

+5VS

L13

KC FBM-L11-201209-221LMAT_0805

<EMI>

D9

@

1 2

+L_CRT_VCC

1

2

2 1

C292

C292 10P_0402_50V8J

10P_0402_50V8J

<EMI>

1

2

3

D8

RB491D_SC59-3

2

1

C288

2

<EMI>

100P_0402_50V8J

1

D10

<EMI>

DAN217_SC59

@

3

E

W=40mils

F1

21

1.1A_6VDC_FUSE

1

C278

0.1U_0402_16V4Z

2

1

C290

<EMI>

68P_0402_50V8K

2

1

C293

C293 68P_0402_50V8K

68P_0402_50V8K

2

<EMI>

12/22 Change to SE071680J80 (IFTXX)

W=40mils

JCRT1

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

SUYIN_070546FR015S233CR

DSUB_12

DSUB_15

Add IFTXX Andy_1102

+CRT_VCC+R_CRT_VCC

16 17

+CRT_VCC

12

3 3

2.2K_0402_5%

DSUB_12

DSUB_15

R221

12

R222

2.2K_0402_5%

2N7002DW-T/R7_SOT363-6

+3VS

6 1

Q44A

2N7002DW-T/R7_SOT363-6

10/5 Change to SB00000AR00

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/18 2008/8/18

Compal Secret Data

Deciphered Date

D

+3VS

12

R220

2.2K_0402_5%

E

VGA_DDC_DATA <17>

GMCH_CRT_DATA <10>

GMCH_CRT_CLK <10>

VGA_DDC_CLK <17>

19 49Wednesday, May 28, 2008

of

2

R223 0_0402_5%GM@R223 0_0402_5%GM@

5

3

4

R224 0_0402_5%GM@R224 0_0402_5%GM@

Q44B

12

+3VS

Title

Size Document Number Rev

B

Date: Sheet

12

R225

2.2K_0402_5%

Compal Electronics, Inc.

CRT Connector

JHXXX M/B LA-4241P Schematic

0.4

5

4

3

2

1

+3VS

RP40

1 8 2 7 3 6 4 5

8.2K_1206_8P4R_5%

D D

+3VS

C C

8.2K_1206_8P4R_5% RP41

RP41

1 8 2 7 3 6 4 5

8.2K_1206_8P4R_5%

RP42

1 8 2 7 3 6 4 5

8.2K_1206_8P4R_5%

8.2K_1206_8P4R_5% RP43

RP43

1 8 2 7 3 6 4 5

8.2K_1206_8P4R_5%

8.2K_1206_8P4R_5% RP44

RP44

1 8 2 7 3 6 4 5

8.2K_1206_8P4R_5%

PCI_REQ#2 PCI_FRAME# PCI_REQ#1 PCI_DEVSEL#

PCI_PLOCK# PCI_IRDY# PCI_PIRQD# PCI_PERR#

PCI_PIRQA# PCI_PIRQB# PCI_PIRQE# PCI_SERR#

PCI_PIRQG# PCI_PIRQH# PCI_PIRQC# PCI_PIRQF#

PCI_STOP# PCI_REQ#3 PCI_TRDY# PCI_REQ#0

3/4 Change U7 from SA00002AN10 to SA00002JH00 (A2 to A3)

U7B

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

U7B

D11

AD0

C8

AD1

D9

AD2

E12

AD3

E9

AD4

C9

AD5

E10

AD6

B7

AD7

C7

AD8

C5

AD9

G11

AD10

F8

AD11

F11

AD12

E7

AD13

A3

AD14

D2

AD15

F10

AD16

D5

AD17

D10

AD18

B3

AD19

F7

AD20

C3

AD21

F3

AD22

F4

AD23

C1

AD24

G7

AD25

H7

AD26

D1

AD27

G5

AD28

H6

AD29

G1

AD30

H3

AD31

Interrupt I/F

J5

PIRQA#

E1

PIRQB#

J6

PIRQC#

C4

PIRQD#

ICH9-M ES_FCBGA676

PCI

REQ0#

GNT0# REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#

STOP#

TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2

PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

F1 G4 B6 A7 F13 F12 E6 F6

D8 B4 D6 A5

D3 E3 R1 C6 E4 C2 J4 A4 F5 D7

C14 D4 R2

H4 K6 F2 G2

PCI_REQ#0 PCI_GNT#0 PCI_REQ#1 PCI_GNT#1 PCI_REQ#2 PCI_GNT#2 PCI_REQ#3 PCI_GNT#3

PCI_IRDY# PCIRST#

PCI_DEVSEL# PCI_PERR# PCI_PLOCK# PCI_SERR# PCI_STOP# PCI_TRDY#

PCI_FRAME#

PLT_RST# CLK_PCI_ICH PCI_PME#

PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

PCI_GNT#1

@

@ @

@

DMI for ESI-compatible operation

Low= DMI for ESI-compatible operation High= Default* (Internal pull-up)

PAD

T7

PAD

T8

CLK_PCI_ICH <16> PCI_PME# <32>

Place closely pin D4

CLK_PCI_ICH

R240

10_0402_5%

@

1 2 1

C295

10P_0402_50V8J

@

2

R247 1K_0402_5%

1 2

R250 1K_0402_5%

1 2

R251 1K_0402_5%

1 2

B B

@

PCI_GNT#3

PCI_GNT#0

SPI_CS#1 <22>

PLT_RST#

A16 Swap Override Strap

PCI_GNT#3

CRB: GNT#0 and SPI_CS#1 have a weak internal pull up

Low= A16 swap override Enable High= Default*

Boot BIOS Strap

Update Footprint

PCIRST#

+3V_AND1

U8

5

NC7SZ08P5X_NL_SC70-5

@

2 1

1 2

R253 0_0402_5%R253 0_0402_5%

2 1

@

P

B

4

Y

A

G

3

+3V_AND2

U9

5

NC7SZ08P5X_NL_SC70-5

@

P

B

4

Y

A

G

3

1 2

C296 0.1U_0402_16V4Z@C296 0.1U_0402_16V4Z@

12

R252

R252 100K_0402_5%

100K_0402_5%

@

1 2

C297 0.1U_0402_16V4Z@C297 0.1U_0402_16V4Z@

1 2

R248 0_0402_5%@R248 0_0402_5%@

1 2

R249 0_0402_5%@R249 0_0402_5%@

1 2

R254 0_0402_5%@R254 0_0402_5%@

1 2

R255 0_0402_5%@R255 0_0402_5%@

+3VS +3VALW

PLT_RST_BUF# <8,17,26,28,30,40>

+3VS +3VALW

PCI_RST# <31,32,35>

PCI_GNT#0 SPI_CS#1 Boot BIOS Loaction

1 2

A A

0 1 1

5

1 SPI 0 1

PCI LPC*

Security Classification

2007/08/18 2008/8/18

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/18 2008/8/18

3

Compal Secret Data

R257 0_0402_5%R257 0_0402_5%

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet of

Compal Electronics, Inc.

ICH9M(1/4)-PCI

JHXXX M/B LA-4241P Schematic

20 49Tuesday, June 03, 2008

1

0.4

of

5

hexainf@hotmail.com

+RTCVCC

1 2

R258 1M_0402_5%R258 1M_0402_5%

1 2

R262 330K_0402_5%R262 330K_0402_5%

D D

C C

B B

1 2

R265 330K_0402_5%R265 330K_0402_5%

+3VS

1 2

R664 10K_0402_5%R664 10K_0402_5%

+3VALW

1 2

R675 10K_0402_5%R675 10K_0402_5%

1 2

R663 20K_0402_5%@R663 20K_0402_5%@

1 2

C751 100P_0402_50V8J

HDA_BITCLK_AUDIO<36> HDA_SYNC_AUDIO<36> HDA_RST_AUDIO#<36> HDA_SDOUT_AUDIO<36>

HDA_BITCLK_MXM<17> HDA_SYNC_MXM<17> HDA_RST_MXM#<17> HDA_SDOUT_MXM<17>

HDA_BITCLK_NB<10> HDA_SYNC_NB<10> HDA_RST_NB#<10> HDA_SDOUT_NB<10>

SM_INTRUDER# ICH_RTCX1

ICH_INTVRMEN

LAN100_SLP

+RTCVCC

SATA_LED#

GPIO56

GPIO33

HDA_SDIN1

@

close to RAM door

1 2

R288 33_0402_5%R288 33_0402_5%

1 2

R289 33_0402_5%R289 33_0402_5%

1 2

R290 33_0402_5%R290 33_0402_5%

1 2

R291 33_0402_5%R291 33_0402_5%

1 2

R626 33_0402_5%PM@R626 33_0402_5%PM@

1 2

R627 33_0402_5%PM@R627 33_0402_5%PM@

1 2

R628 33_0402_5%PM@R628 33_0402_5%PM@

1 2

R629 33_0402_5%PM@R629 33_0402_5%PM@

1 2

R292 33_0402_5%GM@R292 33_0402_5%GM@

1 2

R293 33_0402_5%GM@R293 33_0402_5%GM@

1 2

R294 33_0402_5%GM@R294 33_0402_5%GM@

1 2

R295 33_0402_5%GM@R295 33_0402_5%GM@

Need check

+3VS

R297

R297 1K_0402_5%

1K_0402_5%

@

A A

ICH_TP3<22>

HDA_SDOUT_ICH

@

R298

R298 1K_0402_5%

1K_0402_5%

@

5

12/7 Modified X4 to SJ100001U00 10ppm

3 2

32.768KHZ_12.5P_1TJS125BJ2A251

1 2

R266

R266 20K_0402_5%

20K_0402_5%

C302 15P_0402_50V8JC302 15P_0402_50V8J

+RTCVCC

close to RAM door

12

J2 JOPEN@J2 JOPEN@

C300

1U_0603_10V4Z

1 2

Need check

+1.5VS

HDA_BITCLK_MDC<40>

HDA_SYNC_MDC<40> HDA_RST_MDC#<40>

HDA_SDOUT_MDC<40>

SATA_LED#<40>

SATA HDD

SATA_DTX_C_IRX_N0<24> SATA_DTX_C_IRX_P0<24>

HDA_BITCLK_ICH HDA_SYNC_ICH HDA_RST_ICH# HDA_SDOUT_ICH

SATA_DTX_C_IRX_N1<24> SATA_DTX_C_IRX_P1<24>

Flash Descriptor Security Override Strap GPIO33

XOR Chain Entrance Strap

0 0 1

Low= Descriptor Security override High= Default* (Internal pull-up)

HDA_SDOUTICH_TP3 Description

0 1 0 11

4

C299

C299 15P_0402_50V8J

15P_0402_50V8J

12

X1

4

OUT

NC NC

1

IN

12

1 2

R267

R267 180K_0402_5%

180K_0402_5%

@

1 2

R271

R271 10K_0603_5%

10K_0603_5%

C301

0.1U_0402_16V4Z

1 2

GPIO56

1 2

R278 24.9_0402_1%R278 24.9_0402_1%

1 2

R279 33_0402_5%R279 33_0402_5%

1 2

R281 33_0402_5%R281 33_0402_5%

1 2

R282 33_0402_5%R282 33_0402_5%

HDA_SDIN0<36> HDA_SDIN1<40> HDA_SDIN2<10> HDA_SDIN3<17>

1 2

R285 33_0402_5%R285 33_0402_5%

@

PAD

T9

SATA_ITX_C_DRX_N0<24> SATA_ITX_C_DRX_P0<24>

ICH_RTCX2

ICH_RTCRST# ICH_SRTCRST# SM_INTRUDER#

ICH_INTVRMEN LAN100_SLP

12

R662

@

0_0402_5%

GLAN_COMP KB_RST# HDA_BITCLK_ICH HDA_SYNC_ICH HDA_RST_ICH# HDA_SDIN0

HDA_SDIN1 HDA_SDIN2

HDA_SDIN3 HDA_SDOUT_ICH GPIO33

SATA_LED# SATA_DTX_C_IRX_N0

SATA_DTX_C_IRX_P0 SATA_ITX_DRX_N0 SATA_ITX_DRX_P0

SATA_DTX_C_IRX_N1 SATA_DTX_C_IRX_P1 SATA_ITX_DRX_N1 SATA_ITX_DRX_P1

RSVD Enter XOR Chain Normal Operation Set PCIE port config bit 1

4

R263

10M_0402_5%

3

ICH9M Internal VR Enable Strap

12

R661

@

0_0402_5%

(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)

ICH_INTVRMEN

ICH9M LAN100 SLP Strap (Internal VR for VccLAN1.05 and VccCL1.05)

ICH_LAN100_SLP

U7A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD_0

D12

LAN_TXD_1

E13

LAN_TXD_2

B10

GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9-M ES_FCBGA676

Low = Internal VR Disabled High = Internal VR Enabled(Default)

RTC

LPCCPU

LAN / GLAN

IHDA

SATA

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

LDRQ1#/GPIO23

CPUPWRGD

THRMTRIP#

SATA4RXN SATA4RXP

SATA4TXN SATA4TXP

SATA5RXN SATA5RXP

SATA5TXN SATA5TXP

SATA_CLKN SATA_CLKP

SATARBIAS#

SATARBIAS

LDRQ0#

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

IGNNE#

INIT#

INTR

RCIN#

NMI

SMI#

STPCLK#

TP12

K5 K4 L6 K2

K3 J3

J1 N7

AJ27 AJ25

AE23 AJ26 AD22 AF25 AE22

AG25 L3

AF23 AF24

AH27 AG26 AG27

AH11 AJ11 AG12 AF12

AH9 AJ9 AE10 AF10

AH18 AJ18 AJ7 AH7

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME# LPC_DRQ0#

GATEA20 H_A20M#

FERR# H_FERR# H_PWRGOOD H_IGNNE# H_INIT#

H_INTR

H_NMI H_SMI#

H_STPCLK# THRMTRIP_ICH#

SATA ODD

SATA_DTX_C_IRX_N4 SATA_DTX_C_IRX_P4 SATA_ITX_DRX_N4 SATA_ITX_DRX_P4

CLK_PCIE_SATA# CLK_PCIE_SATA SATARBIAS

4mils width less than 500mils

close ICH9

SATA_ITX_C_DRX_N0 SATA_ITX_DRX_N1 SATA_ITX_C_DRX_P0

H_DPRSTP#

100P_0402_50V8J

C303 0.01U_0402_16V7KC303 0.01U_0402_16V7K C305 0.01U_0402_16V7KC305 0.01U_0402_16V7K

C738

@

1 2 1 2

1

2

SATA_ITX_DRX_N0 SATA_ITX_DRX_P0

EMI Request

HDA_BITCLK_ICH

10_0402_5%

10P_0402_50V8J

R630

C648

SATA_ITX_DRX_P1 SATA_ITX_C_DRX_P1

RTC Battery

BATT1

-+

1 2 1

2

ML1220T13RE

@

9/29 Checked. Same as HEL80's

Security Classification

2007/08/18 2008/8/18

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/18 2008/8/18

3

Compal Secret Data

Deciphered Date

2

LPC_AD0 <32,35,40> LPC_AD1 <32,35,40> LPC_AD2 <32,35,40> LPC_AD3 <32,35,40>

LPC_FRAME# <32,35,40>

R273 8.2K_0402_5%R273 8.2K_0402_5%

R274 0_0402_5%R274 0_0402_5% R275 0_0402_5%R275 0_0402_5%

C304 0.01U_0402_16V7KC304 0.01U_0402_16V7K C306 0.01U_0402_16V7KC306 0.01U_0402_16V7K

LPC_DRQ0# <35>

12

GATEA20 <32> H_A20M# <4>

1 2 1 2

1 2

R276 56_0402_5%R276 56_0402_5%

H_PWRGOOD <5> H_IGNNE# <4> H_INIT# <4>

H_INTR <4>

H_NMI <4> H_SMI# <4>

H_STPCLK# <4>

R283 54.9_0402_1%R283 54.9_0402_1%

1 2

T24 PAD@T24 PAD @ T25 PAD@T25 PAD @ T26 PAD@T26 PAD @ T27 PAD@T27 PAD @

CLK_PCIE_SATA# <16> CLK_PCIE_SATA <16>

R287 24.9_0402_1%R287 24.9_0402_1%

SATA_ITX_C_DRX_N1

1 2 1 2

+RTCBATT

12

2

12

Change BATT1 P/N : SP093PA0200 (Panasonic) SP093MX0000 (MAXELL)

R296

1 2

511_0603_1%

1

+1.05VS

H_DPRSTP#

R268 56_0402_5%@R268 56_0402_5%@

H_DPSLP#

R272 56_0402_5%@R272 56_0402_5%@

H_FERR#

+3VS

H_DPRSTP#DPRSTP# H_DPSLP#DPSLP#

R277 10K_0402_5%R277 10K_0402_5%

R308 need to place within 2" of ICH9M R310 must be place within 2" of R308 w/o stub.

Title

Size Document Number Rev

Date: Sheet

H_THERMTRIP#

R284 56_0402_5%R284 56_0402_5%

+1.05VS

SATA_ITX_C_DRX_N1 <24> SATA_ITX_C_DRX_P1 <24>

9/29 modified to follow ISKAA

D11

+RTC_BATT

Custom

D11

1

BAS40-04_SOT23

Compal Electronics, Inc.

ICH9M(2/4)-LAN,IDELPC,RTC

JHXXX M/B LA-4241P Schematic

R270 56_0402_5%R270 56_0402_5%

H_DPRSTP# <5,8,48> H_DPSLP# <5>

H_FERR# <4>

12

R286

330_0402_5%@

1 2

2

B

H_THERMTRIP#

2

3

12 12 12

+3VS

KB_RST# <32>

H_THERMTRIP# <4,8>

+1.05VS

MAINPWON <43,45>

1

C

Q7

E

2SC2411K_SOT23

3

@

+CHGRTC

1

C307

0.1U_0402_16V4Z

2

1

21 49Tuesday, June 03, 2008

+RTCVCC

of

0.4

+3VS

8.2K_0402_5%

R303

1 2

8.2K_0402_5%

R311

1 2

10K_0402_5%

R304

@R304

@

1 2

10K_0402_5%

R305

@R305

@

1 2

10K_0402_5%

R676

@R676

@

D D

C C

+3VALW

B B

1 2

10K_0402_5%

R732

1 2

RP37

10K_1206_8P4R_5%

RP45

+3VALW

10K_1206_8P4R_5%

RP38

10K_1206_8P4R_5%

RP46

10K_1206_8P4R_5%

10K_0402_5%

R709

1 2

1K_0402_5%

R324

1 2

8.2K_0402_5%

R326

100K_0402_5%

R329

1 2

10K_0402_5%

R330

1 2

100K_0402_5%

R331

1 2

100K_0402_5%

R333

1 2

RP36

10K_1206_8P4R_5%

RP39

10K_1206_8P4R_5%

1 2

R344 20K_0402_5%@R344 20K_0402_5%@

1 2

R347 10K_0402_5%R347 10K_0402_5%

@R709

@

@R329

@

@R330

@

@R331

@

JHT00 ( 00 ) R357 JHT01 ( 01 ) JHL90 ( 10 ) R360 JHL91 ( 11 )

A A

+3VS

R355

R357

R360

R361

10K_0402_5%91@

1 2

10K_0402_5%00@

1 2

10K_0402_5%91@

1 2

10K_0402_5%00@

1 2

5

PM_CLKRUN#

EC_THERM#

PM_STP_PCI#

PM_STP_CPU#

PM_BMBUSY#

GPIO7

SATA_CLKREQ#

45

OCP#

36

D_ACIN

27

CR_WAKE#

18

SERIRQ

45

GPIO38

36

GPIO48

27

GPIO39

18

ICH_RI#

45

ICH_SMLINK1

36

ICH_SMLINK0

27

LINKALERT#

18

ITP_DBRESET#

45

GPIO14

36

GPIO10

27 18

follow iTPM spec

ICH_GPIO57

ICH_PCIE_WAKE#

PM_BATLOW#

12

ICH_GPIO57

ICH_GPIO49

PM_DPRSLPVR_D

ICH_VGATE

USB_OC#1

45

USB_OC#2

36

USB_OC#10

27

USB_OC#3

18

45

USB_OC#9

36

USB_OC#6

27

USB_OC#8

18

ICH_SPI_MOSI ICH_SPI_MOSI

ID1

ID0 R361 R361

R355

R357 R360

R355

PROJECT_ID0

PROJECT_ID1

5

CH751H-40PT_SOD323-2 @

ACIN<32,42,44>

For Express Card

For Robson

For Wireless LAN

For PCIE LAN

For CardReader

follow iTPM spec

12/13 Modified by Andy

R355

R361

10K_0402_5%

01@

R360

10K_0402_5%

90@

R355

10K_0402_5%

01@

R357

10K_0402_5%

90@

+3VALW

ICH_SMBCLK<16,30,31> ICH_SMBDATA<16,30,31>

SUS_STAT#<40> ITP_DBRESET#<4>

PM_BMBUSY#<8> EC_LID_OUT#<32> PM_STP_PCI#<16>

PM_STP_CPU#<16> PM_CLKRUN#<32,40>

ICH_PCIE_WAKE#<28,30,31>

SERIRQ<32,35,40> EC_THERM#<32>

VGATE<8,16,48>

EC_SMI#<32> EC_SCI#<32>

GPIO18<26> CR_WAKE#<26>

SB_SPKR<36>

MCH_ICH_SYNC#<8>

ICH_TP3<21>

SB_SPKR

ICH_SPI_CLK_R<34> ICH_SPI_CS0#_R<34> SPI_CS#1<20>

ICH_SPI_MOSI_R<34>

D12

R299 2.2K_0402_5%R299 2.2K_0402_5%

1 2

R300 2.2K_0402_5%R300 2.2K_0402_5%

1 2

T12

T14

SATA_CLKREQ#<16>

+3VS

No Reboot Strap

PCIE_PTX_C_IRX_N1<31> PCIE_PTX_C_IRX_P1<31> PCIE_ITX_C_PRX_N1<31> PCIE_ITX_C_PRX_P1<31>

PCIE_PTX_C_IRX_N2<30> PCIE_PTX_C_IRX_P2<30> PCIE_ITX_C_PRX_N2<30> PCIE_ITX_C_PRX_P2<30>

PCIE_PTX_C_IRX_N3<30> PCIE_PTX_C_IRX_P3<30> PCIE_ITX_C_PRX_N3<30> PCIE_ITX_C_PRX_P3<30>

PCIE_PTX_C_IRX_N4<28> PCIE_PTX_C_IRX_P4<28> PCIE_ITX_C_PRX_N4<28> PCIE_ITX_C_PRX_P4<28>

PCIE_PTX_C_IRX_N5<26> PCIE_PTX_C_IRX_P5<26> PCIE_ITX_C_PRX_N5<26> PCIE_ITX_C_PRX_P5<26>

SPI_MOSI

4

ICH_SMBCLK ICH_SMBDATA LINKALERT# ICH_SMLINK0 ICH_SMLINK1

ICH_RI# SUS_STAT#

ITP_DBRESET# PM_BMBUSY# EC_LID_OUT# PM_STP_PCI#

PM_STP_CPU# PM_CLKRUN# ICH_PCIE_WAKE#

SERIRQ

@

PAD

21

@

PAD

R327 1K_0402_5%@R327 1K_0402_5%@

1 2

EC_THERM#

R316 0_0402_5%R316 0_0402_5%

ICH_TP11 OCP#

D_ACIN GPIO7 EC_SMI#

EC_SCI# GPIO18

ICH_GPIO20 CR_WAKE#

SATA_CLKREQ# GPIO38 GPIO39 GPIO48 ICH_GPIO49 ICH_GPIO57

SB_SPKR MCH_ICH_SYNC# ICH_TP3

ICH_VGATE

12

Low= Default* High= "No Reboot"

C311 0.1U_0402_10V7KC311 0.1U_0402_10V7K C312 0.1U_0402_10V7KC312 0.1U_0402_10V7K

C313 0.1U_0402_10V7KC313 0.1U_0402_10V7K C314 0.1U_0402_10V7KC314 0.1U_0402_10V7K

C315 0.1U_0402_10V7KC315 0.1U_0402_10V7K C316 0.1U_0402_10V7KC316 0.1U_0402_10V7K

C317 0.1U_0402_10V7KC317 0.1U_0402_10V7K C318 0.1U_0402_10V7KC318 0.1U_0402_10V7K

C319 0.1U_0402_10V7KC319 0.1U_0402_10V7K C320 0.1U_0402_10V7KC320 0.1U_0402_10V7K

ICH_SPI_CS0#_R

ICH_SPI_MOSI_R

R345 15_0402_5%@R345 15_0402_5%@ R346 15_0402_5%@R346 15_0402_5%@

R348 15_0402_5%@R348 15_0402_5%@

ICH_SPI_MISO<34>

USB_OC#04<35>

USB_OC#511<35> CP_PE#<31>

Internal TPM Strap

Low= Disable High= iTPM enable by MCH strap*

4

AJ23

AG19 AH21 AG21

AE18

AJ22

AE19 AG22 AF21 AH24

AJ24

AH20

AJ20 AJ21

12 12

U7C

G16

A13 E17

C17

B18 F19

R4

G19

M6 A17 A14

E19

L4 E20

M5

D21

A20

A21

C12 C21

K1

AF8

A9

D19

L1

A8

M7 B21

ICH9-M ES_FCBGA676

R356

22.6_0402_1%

Within 500 mils

SMBCLK SMBDATA LINKALERT#/GPIO60/CLGPIO4 SMLINK0 SMLINK1

RI# SUS_STAT#/LPCPD#

SYS_RESET# PMSYNC#/GPIO0 SMBALERT#/GPIO11 STP_PCI#

STP_CPU# CLKRUN# WAKE#

SERIRQ THRM#

VRMPWRGD TP11 GPIO1

GPIO6 GPIO7 GPIO8 GPIO12 GPIO13 GPIO17 GPIO18 GPIO20 SCLOCK/GPIO22 GPIO27 GPIO28 SATACLKREQ#/GPIO35 SLOAD/GPIO38 SDATAOUT0/GPIO39 SDATAOUT1/GPIO48 GPIO49 GPIO57/CLGPIO5

SPKR MCH_SYNC# TP3 TP8 TP9 TP10

SMB

PCIE_PTX_C_IRX_N1 PCIE_PTX_C_IRX_P1

PCIE_ITX_PRX_N1 PCIE_ITX_PRX_P1

PCIE_PTX_C_IRX_N2 PCIE_PTX_C_IRX_P2

PCIE_ITX_PRX_N2 PCIE_ITX_PRX_P2

PCIE_PTX_C_IRX_N3 PCIE_PTX_C_IRX_P3

PCIE_ITX_PRX_N3 PCIE_ITX_PRX_P3

PCIE_PTX_C_IRX_N4 PCIE_PTX_C_IRX_P4

PCIE_ITX_PRX_N4 PCIE_ITX_PRX_P4

PCIE_PTX_C_IRX_N5 PCIE_PTX_C_IRX_P5

PCIE_ITX_PRX_N5 PCIE_ITX_PRX_P5

ICH_SPI_CLKICH_SPI_CLK_R ICH_SPI_CS0#

ICH_SPI_MOSI ICH_SPI_MISO

USB_OC#04 USB_OC#1 USB_OC#2 USB_OC#3

USB_OC#6 CP_PE# USB_OC#8 USB_OC#9 USB_OC#10

USBRBIAS

12

3

PROJECT_ID1

CLK14 CLK48

SUSCLK

SLP_S3# SLP_S4# SLP_S5#

PWROK

BATLOW# PWRBTN#

LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0 CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST0# CL_RST1#

SPI

AH23

PROJECT_ID0

AF19

MIC_ID

AE21

R308 10K_0402_5%R308 10K_0402_5%

AD20 H1

AF3 P1 C16

E16 G17

C10 G20 M2 B13 R3 D20 D22 R5 R6 B16 F24

B19 F22

C19 C25

A19 F21

D18 A16

C18 C11 C20

PCI - Express

USB

1 2

CLK_ICH_14M CLK_ICH_48M

SUS_CLK PM_SLP_S3#

PM_SLP_S4# PM_SLP_S5#

ICH_PWROK DPRSLPVR

R313 0_0402_5%R313 0_0402_5%

PM_BATLOW# PBTN_OUT# LAN_RST# EC_RSMRST#R CK_PWRGD CLPWROK PM_SLP_M#

CL_VREF0_ICH CL_VREF1_ICH

GPIO10 GPIO14

1 2

R317 0_0402_5%R317 0_0402_5%

Check

1 2

R325 0_0402_5%R325 0_0402_5%

PAD

@

1 2

PAD

@

CLK_ICH_14M <16> CLK_ICH_48M <16>

T11

PM_SLP_S3# <32> PM_SLP_S4# <32> PM_SLP_S5# <32>

PBTN_OUT# <32>

CK_PWRGD <16>

T13

CL_CLK0 <8>

CL_DATA0 <8>

CL_RST#0 <8>

DMI Termination Voltage

GPIO49

DMI0RXN

DMI0RXP DMI0TXN DMI0TXP

DMI1RXN

DMI1RXP DMI1TXN DMI1TXP

DMI2RXN

DMI2RXP DMI2TXN DMI2TXP

DMI3RXN

DMI3RXP DMI3TXN DMI3TXP

DMI_CLKN DMI_CLKP

DMI_ZCOMP

Direct Media Interface

DMI_IRCOMP

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P

2007/08/18 2008/8/18

Low= Desktop used High= Mobile* (Internal pull-up)

DMI_MTX_IRX_N0

V27

DMI_MTX_IRX_P0

V26

DMI_ITX_MRX_N0

U29

DMI_ITX_MRX_P0

U28

DMI_MTX_IRX_N1

Y27

DMI_MTX_IRX_P1

Y26

DMI_ITX_MRX_N1

W29

DMI_ITX_MRX_P1

W28

DMI_MTX_IRX_N2

AB27

DMI_MTX_IRX_P2

AB26

DMI_ITX_MRX_N2

AA29

DMI_ITX_MRX_P2

AA28

DMI_MTX_IRX_N3

AD27

DMI_MTX_IRX_P3

AD26

DMI_ITX_MRX_N3

AC29

DMI_ITX_MRX_P3

AC28

CLK_PCIE_ICH#

T26

CLK_PCIE_ICH

T25 AF29

DMI_IRCOMP

AF28

USB20_N0

AC5

USB20_P0

AC4

USB20_N1

AD3

USB20_P1

AD2

USB20_N2

AC1

USB20_P2

AC2

USB20_N3

AA5

USB20_P3

AA4 AB2 AB3

USB20_N5

AA1

USB20_P5

AA2

USB20_N6

W5

USB20_P6

W4 Y3 Y2

USB20_N8

W1

USB20_P8

W2 V2 V3

USB20_N10

U5

USB20_P10

U4

USB20_N11

U1

USB20_P11

U2

Compal Secret Data

Deciphered Date

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

SYS / GPIOGPIOMISC

Power MGT

MEM_LED/GPIO24

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

WOL_EN/GPIO9

Controller Link

U7D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9-M ES_FCBGA676

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

12/13 Add

R301

+3VS

R307

1 2

PM_DPRSLPVR_D <8,48>

IFT use 100 ohm

ICH_PWROK <8,32>

DMI_MTX_IRX_N0 <8> DMI_MTX_IRX_P0 <8> DMI_ITX_MRX_N0 <8> DMI_ITX_MRX_P0 <8>

DMI_MTX_IRX_N1 <8> DMI_MTX_IRX_P1 <8> DMI_ITX_MRX_N1 <8> DMI_ITX_MRX_P1 <8>

DMI_MTX_IRX_N2 <8> DMI_MTX_IRX_P2 <8> DMI_ITX_MRX_N2 <8> DMI_ITX_MRX_P2 <8>

DMI_MTX_IRX_N3 <8> DMI_MTX_IRX_P3 <8> DMI_ITX_MRX_N3 <8> DMI_ITX_MRX_P3 <8>

CLK_PCIE_ICH# <16> CLK_PCIE_ICH <16>

R340 24.9_0402_1%R340 24.9_0402_1%

1 2

USB20_N0 <35> USB20_P0 <35> USB20_N1 <40> USB20_P1 <40> USB20_N2 <40> USB20_P2 <40> USB20_N3 <30> USB20_P3 <30>

USB20_N5 <35> USB20_P5 <35> USB20_N6 <34> USB20_P6 <34>

USB20_N8 <30> USB20_P8 <30>

USB20_N10 <31> USB20_P10 <31> USB20_N11 <35> USB20_P11 <35>

2

10K_0402_5%

1 2

SINGLE@

10K_0402_5%DUAL@

Within 500 mils

+1.5VS_PCIE_ICH

USB(IO/B) FP CAMERA WLAN

USB(IO/B) BT

TV

New Card USB(IO/B)

1

Place closely pin B2 Place closely pin AC1

MIC_ID

12

R309

R309 10_0402_5%

10_0402_5%

@

1

C308

C308 10P_0402_50V8J

10P_0402_50V8J

@

2

PM_DPRSLPVR_D

ICH_PCIE_WAKE#

VGATE

ICH_SMBCLK

ICH_SMBDATA

C737

100P_0402_50V8J

C730

100P_0402_50V8J

C740

100P_0402_50V8J

C741

100P_0402_50V8J

C742

100P_0402_50V8J

1 2

12

1

2

@C737

@

@C730

@

@C740

@

@C741

@

@C742

@

CLK_ICH_14MCLK_ICH_48M

R310

R310 10_0402_5%

10_0402_5%

@

C309

C309 10P_0402_50V8J

10P_0402_50V8J

@

RSMRST circuit

R332 0_0402_5%

1 2

<EMI>

Q8

C

3

E

EC_RSMRST#<32>

BAV99DW-7_SOT363@

R335

D13B

2.2K_0402_5%@

D13B

1 2

R336

1 2

CL_VREF0_ICH

1

C323

0.1U_0402_16V4Z

2

Title

Size Document Number Rev

Custom

JHXXX M/B LA-4241P Schematic

Date: Sheet

E

B

2 1

2

4

5

6

3

2.2K_0402_5%@

ICH_PWROK

EC_RSMRST#R

Compal Electronics, Inc.

ICH9M(3/4)-USB,GPIO,PCIE

R338 10K_0402_5%R338 10K_0402_5%

R342 10K_0402_5%R342 10K_0402_5%

+3VS +3VALW

R349

3.24K_0402_1%

R353

R353 453_0402_1%

453_0402_1%

EC_RSMRST#R

1

MMBT3906_SOT23@

1 2

R334 4.7K_0402_5%@R334 4.7K_0402_5%@ D13A

@D13A

@

BAV99DW-7_SOT363

1 2

CL_VREF1_ICH

1

C324

@

0.1U_0402_16V4Z

2

1

22 49Tuesday, June 03, 2008

+3VALW

R350

@

3.24K_0402_1%

R354

@

453_0402_1%

of

0.4

+5VS

hexainf@hotmail.com

+3VS

R363

100_0402_5%

D D

R362

10_0402_5%

C C

21

1 2

+ICH_V5REF

2

C331

0.1U_0402_16V4Z

1

+5VALW

+3VALW

21

1 2

+ICH_V5REF_SUS

2

C326

0.1U_0402_16V4Z

1

+1.5VS

10/22 CRB use 330 Ohm@100Mhz, We use 220 Ohm 3A check!

+1.5VS

5

D14

D14 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

(0.1UF*1)

D15

D15 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

(0.1UF*1)

L23

KC FBM-L11-201209-221LMAT_0805

+1.5VS_SATAPLL_R

R367

R367 0_0603_5%

0_0603_5%

+RTCVCC

L24

L24 MBK1608121YZF_0603

MBK1608121YZF_0603

(10UF*1, 1UF*1)

1

C327

C328

2

1U_0402_6.3V4Z

220u ESR 15m ohm Package(L*W*H)7.3*4.3*1.9 Rating 4V

1 2

0.1U_0402_16V4Z

+1.5VS_PCIE_ICH

(220UF*1, 22UF*2, 2.2UF*1)

12

1

+

C337

C335

220U_D2_4VM_R15

2

10U_0805_10V4Z

+1.5VS_SATAPLL_ICH

C348

10U_0805_10V4Z

(1UF*1, 0.1UF*2)

1

2

646mA

1

C336

C338

10U_0805_10V4Z

2

2.2U_0603_6.3V6K

(10UF*1, 1UF*1)

1

C349

2

1U_0402_6.3V4Z

+ICH_V5REF

2mA

+ICH_V5REF_SUS

2mA

47mA

+1.5VS

B B

1

C351

C351 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+1.5VS

1U_0402_6.3V4Z

C355

1342mA

1

2

10/22 follow common design 0928

+1.5VS

(0.1UF*1)

+3VS

1

C362

2

0.1U_0402_16V4Z

A A

+1.5VS

+VCC_GLANPLL_R +VCC_GLANPLL_ICH

R372

R372 0_0603_5%

0_0603_5%

(2.2UF*1, 10UF*1)

+1.5VS_PCIE_ICH

(4.7UF*1)

5

1

C358

0.1U_0402_16V4Z

2

1

C360

0.1U_0402_16V4Z

2

12

C361 0.1U_0402_16V4ZC361 0.1U_0402_16V4Z

1 2

MBK1608121YZF_0603

MBK1608121YZF_0603 L25

L25

C366

C366 10U_0805_10V4Z

10U_0805_10V4Z

C368

4.7U_0805_10V4Z

(0.1UF*1)

+VCCLAN1_05_INT_ICH

19mA

23mA

1

C367

2

2.2U_0603_6.3V6K

80mA

+3VS

11mA 11mA

1mA

4

U7F

A23

VCCRTC

A6

V5REF

AE1

V5REF_SUS

AA24

VCC1_5_B[01]

AA25

VCC1_5_B[02]

AB24

VCC1_5_B[03]

AB25

VCC1_5_B[04]

AC24

VCC1_5_B[05]

AC25

VCC1_5_B[06]

AD24

VCC1_5_B[07]

AD25

VCC1_5_B[08]

AE25

VCC1_5_B[09]

AE26

VCC1_5_B[10]

AE27

VCC1_5_B[11]

AE28

VCC1_5_B[12]

AE29

VCC1_5_B[13]

F25

VCC1_5_B[14]

G25

VCC1_5_B[15]

H24

VCC1_5_B[16]

H25

VCC1_5_B[17]

J24

VCC1_5_B[18]

J25

VCC1_5_B[19]

K24

VCC1_5_B[20]

K25

VCC1_5_B[21]

L23

VCC1_5_B[22]

L24

VCC1_5_B[23]

L25

VCC1_5_B[24]

M24

VCC1_5_B[25]

M25

VCC1_5_B[26]

N23

VCC1_5_B[27]

N24

VCC1_5_B[28]

N25

VCC1_5_B[29]

P24

VCC1_5_B[30]

P25

VCC1_5_B[31]

R24

VCC1_5_B[32]

R25

VCC1_5_B[33]

R26

VCC1_5_B[34]

R27

VCC1_5_B[35]

T24

VCC1_5_B[36]

T27

VCC1_5_B[37]

T28

VCC1_5_B[38]

T29

VCC1_5_B[39]

U24

VCC1_5_B[40]

U25

VCC1_5_B[41]

V24

VCC1_5_B[42]

V25

VCC1_5_B[43]

U23

VCC1_5_B[44]

W24

VCC1_5_B[45]

W25

VCC1_5_B[46]

K23

VCC1_5_B[47]

Y24

VCC1_5_B[48]

Y25

VCC1_5_B[49]

AJ19

VCCSATAPLL

AC16

VCC1_5_A[01]

AD15

VCC1_5_A[02]

AD16

VCC1_5_A[03]

AE15

VCC1_5_A[04]

AF15

VCC1_5_A[05]

AG15

VCC1_5_A[06]

AH15

VCC1_5_A[07]

AJ15

VCC1_5_A[08]

AC11

VCC1_5_A[09]

AD11

VCC1_5_A[10]

AE11

VCC1_5_A[11]

AF11

VCC1_5_A[12]

AG10

VCC1_5_A[13]

AG11

VCC1_5_A[14]

AH10

VCC1_5_A[15]

AJ10

VCC1_5_A[16]

AC9

VCC1_5_A[17]

AC18

VCC1_5_A[18]

AC19

VCC1_5_A[19]

AC21

VCC1_5_A[20]

G10

VCC1_5_A[21]

G9

VCC1_5_A[22]

AC12

VCC1_5_A[23]

AC13

VCC1_5_A[24]

AC14

VCC1_5_A[25]

AJ5

VCCUSBPLL

AA7

VCC1_5_A[26]

AB6

VCC1_5_A[27]

AB7

VCC1_5_A[28]

AC6

VCC1_5_A[29]

AC7

VCC1_5_A[30]

A10

VCCLAN1_05[1]

A11

VCCLAN1_05[2]

A12

VCCLAN3_3[1]

B12

VCCLAN3_3[2]

A27

VCCGLANPLL

D28

VCCGLAN1_5[1]

D29

VCCGLAN1_5[2]

E26

VCCGLAN1_5[3]

E27

VCCGLAN1_5[4]

A26

VCCGLAN3_3

ICH9-M ES_FCBGA676

4

VCCA3GP

ARX

ATX

USB CORE

GLAN POWER

VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16]

CORE

VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24] VCC1_05[25] VCC1_05[26]

V_CPU_IO[1] V_CPU_IO[2]

VCCP_CORE

PCI

VCCSUSHDA

VCCSUS1_05[1] VCCSUS1_05[2]

VCCSUS1_5[1] VCCSUS1_5[2]

VCCSUS3_3[01] VCCSUS3_3[02] VCCSUS3_3[03] VCCSUS3_3[04]

VCCPSUS

VCCSUS3_3[05]

VCCSUS3_3[06] VCCSUS3_3[07] VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16]

VCCPUSB

VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20]

VCCCL3_3[1] VCCCL3_3[2]

VCCDMIPLL VCC_DMI[1]

VCC_DMI[2]

VCC3_3[01] VCC3_3[02] VCC3_3[07]

VCC3_3[03] VCC3_3[04] VCC3_3[05] VCC3_3[06]

VCC3_3[08] VCC3_3[09] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13] VCC3_3[14]

VCCHDA

VCCCL1_05

VCCCL1_5

1634mA

A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

23mA

R29

48mA

W23 Y23

2mA

AB23 AC23

AG29 AJ6 AC10

AD19 AF20 AG24 AC20

B9 F9 G3 G6 J2 J7 K7

11mA

AJ4

11mA

AJ3

TP_VCCSUS1_05_ICH_1

AC8

TP_VCCSUS1_05_ICH_2

F17

TP_VCCSUS1_5_ICH_1

AD8

+VCCSUS1_5_ICH_INT_2

F18

A18 D16 D17 E22

AF1

212mA

T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7

+VCCCL1_05_INT_ICH

G22

+VCCCL1_5_INT_ICH

G23

A24 B24

19mA

3

(0.1UF*2)

1

C325

2

0.1U_0402_16V4Z

+1.5VS_DMIPLL_ICH

1

C332

10U_0805_10V4Z

2

VCC_DMI

C339

4.7U_0805_10V4Z

1

C342

0.1U_0402_16V4Z

2

(0.1UF*1)

(0.1UF*1, 0.022UF*2)

0.1U_0402_16V4Z

C359

+3VS

+1.05VS

1

+

C330

C329

0.1U_0402_16V4Z

2

L22

L22 MBK1608121YZF_0603

MBK1608121YZF_0603

C333

0.01U_0402_16V7K

1

C334

4.7U_0805_10V4Z

2

1

C340

2

0.1U_0402_16V4Z

@

220U_D2_4VM_R15

2

+1.5VS_DMIPLL_R

1 2

(10UF*1, 0.01UF*1)

R366 0_0603_5%R366 0_0603_5%

(22UF*1)

1

C341

(4.7UF*1, 0.1UF*2)

0.1U_0402_16V4Z

2

R364 0_0603_5%R364 0_0603_5%

+1.05VS

close to AC20 close to G6close to AG29

1

C346

C343

C344

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

close to AD19 close to B9 close to K7

T15

T15 T16

T16

T17

C357

1

0.1U_0402_16V4Z

2

1

C365

@

2

(0.1UF*1)

1

2

1

2

0.1U_0402_16V4Z

@

PAD

@

PAD

@

PAD

1

C353

0.1U_0402_16V4Z

2

C356

+3VALW

4.7U_0805_10V4Z

C363

@

1U_0402_6.3V4Z

C346

C345

0.1U_0402_16V4Z

2

+VCC_HDA_ICH

1

C350

0.1U_0402_16V4Z

2

+VCCSUS_HDA_ICH

1

C354

0.1U_0402_16V4Z

2

1

C364

(0.1UF*1)

0.1U_0402_16V4Z

2

308mA

1

C347

2

0.1U_0402_16V4Z

PM@

R368 0_0603_5%

GM@

R369 0_0603_5%

TP_VCCSUS1_5_ICH_1

1 2

R798 0_0402_5%

+3VALW

(1UF*1, 0.1UF*1)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/08/18 2008/8/18

Compal Secret Data

Deciphered Date

2

220u ESR 15m ohm Package(L*W*H)7.3*4.3*1.9 Rating 4V

+1.5VS

+3VS

1

(0.1UF*6)

2

+3VALW

+3VS +1.5VS

R671

R671 180_0402_1%

180_0402_1%

@

GM@

1 2

R671

0_0402_5%

PM@

@

R670

R670 150_0402_1%

150_0402_1%

@

Custom

U7E

AA26

VSS[001]

AA27

VSS[002]

AA3

VSS[003]

AA6

VSS[004]

AB1

VSS[005]

AA23

VSS[006]

AB28

VSS[007]

AB29

VSS[008]

AB4

VSS[009]

AB5

VSS[010]

AC17

VSS[011]

AC26

VSS[012]

AC27

VSS[013]

AC3

VSS[014]

AD1

VSS[015]

AD10

VSS[016]

AD12

VSS[017]

AD13

VSS[018]

AD14

VSS[019]

AD17

VSS[020]

AD18

VSS[021]

AD21

VSS[022]

AD28

VSS[023]

AD29

VSS[024]

AD4

VSS[025]

AD5

VSS[026]

AD6

VSS[027]

AD7

VSS[028]

AD9

VSS[029]

AE12

VSS[030]

AE13

VSS[031]

AE14

VSS[032]

AE16

VSS[033]

AE17

VSS[034]

AE2

VSS[035]

AE20

VSS[036]

AE24

VSS[037]

AE3

VSS[038]

AE4

VSS[039]

AE6

VSS[040]

AE9

VSS[041]

AF13

VSS[042]

AF16

VSS[043]

AF18

VSS[044]

AF22

VSS[045]

AH26

VSS[046]

AF26

VSS[047]

AF27

VSS[048]

AF5

VSS[049]

AF7

VSS[050]

AF9

VSS[051]

AG13

VSS[052]

AG16

VSS[053]

AG18

VSS[054]

AG20

VSS[055]

AG23

VSS[056]

AG3

VSS[057]

AG6

VSS[058]

AG9

VSS[059]

AH12

VSS[060]

AH14

VSS[061]

AH17

VSS[062]

AH19

VSS[063]

AH2

VSS[064]

AH22

VSS[065]

AH25

VSS[066]

AH28

VSS[067]

AH5

VSS[068]

AH8

VSS[069]

AJ12

VSS[070]

AJ14

VSS[071]

AJ17

VSS[072]

AJ8

VSS[073]

B11

VSS[074]

B14

VSS[075]

B17

VSS[076]

B2

VSS[077]

B20

VSS[078]

B23

VSS[079]

B5

VSS[080]

B8

VSS[081]

C26

VSS[082]

C27

VSS[083]

E11

VSS[084]

E14

VSS[085]

E18

VSS[086]

E2

VSS[087]

E21

VSS[088]

E24

VSS[089]

E5

VSS[090]

E8

VSS[091]

F16

VSS[092]

F28

VSS[093]

F29

VSS[094]

G12

VSS[095]

G14

VSS[096]

G18

VSS[097]

G21

VSS[098]

G24

VSS[099]

G26

VSS[100]

G27

VSS[101]

G8

VSS[102]

H2

VSS[103]

H23

VSS[104]

H28

VSS[105]

H29

VSS[106]

ICH9-M ES_FCBGA676

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

ICH9M(4/4)-POWER&GND

JHXXX M/B LA-4241P Schematic

1

VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04] VSS_NCTF[05] VSS_NCTF[06] VSS_NCTF[07] VSS_NCTF[08] VSS_NCTF[09] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12]

1

VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198]

23 49Tuesday, June 03, 2008

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29

of

0.4

A

B

C

D

E

F

G

H

14W SATA ODD Conn.

1000P_0402_50V7K

SATA_DTX_C_IRX_N1<21>

SATA_DTX_C_IRX_P1<21>

+5VS

1

2

0.1U_0402_16V4Z

C369

14W@

1

C370

14W@

2

10U_0805_10V4Z

SATA_DTX_C_IRX_N1

SATA_DTX_C_IRX_P1

1

C371

14W@

2

SATA_ITX_C_DRX_P1<21> SATA_ITX_C_DRX_N1<21>

1 2

C372 0.01U_0402_16V7KC372 0.01U_0402_16V7K

1 2

C373 0.01U_0402_16V7KC373 0.01U_0402_16V7K

SATA_DTX_IRX_N1

SATA_DTX_IRX_P1

SATA_ITX_C_DRX_P1 SATA_ITX_C_DRX_N1

SATA_DTX_IRX_N1 SATA_DTX_IRX_P1

R373 1K_0402_1%@R373 1K_0402_1%@

1 2

+5VS

SATA ODD Conn.

Copy JIWA2 Symbol

JSATA1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND

13

GND

OCTEK_SLS-13SB1G

Update FootPrint from OCTEK_SLS-13SB1G_13P-T to OCTEK_SLS-13SB1G_13P_RV-T

SATA HDD Conn.

+5VS +3VS

0.1U_0402_16V4Z

1

C374

2

1000P_0402_50V7K

1

C375

2

1U_0603_10V4Z

1

C376

2

10U_0805_10V4Z

1

C377

2

1

C378

2

10U_0805_10V4Z

1

C379

0.1U_0402_16V4Z

2

@

1 1

2 2

15W SATA ODD Conn.

+5VS_ODD

0.1U_0402_16V4Z

3 3

SATA_ITX_C_DRX_P1 SATA_ITX_C_DRX_P1_R SATA_ITX_C_DRX_N1 SATA_DTX_IRX_N1 SATA_DTX_IRX_P1

4 4

A

0.1U_0402_16V4Z

1

2

1000P_0402_50V7K

R374 0_0402_5%

R374 0_0402_5% R375 0_0402_5%

R375 0_0402_5% R376 0_0402_5%

R376 0_0402_5% R377 0_0402_5%

R377 0_0402_5%

1

C381

15W@

C382

15W@

2

12

15W@

12

15W@

12

15W@

12

15W@

+5VS +5VS_ODD

1

C380

15W@

2

10U_0805_10V4Z

SATA_ITX_C_DRX_N1_R SATA_DTX_IRX_N1_R SATA_DTX_IRX_P1_R

1 2

R778 0_1206_5%15W@R778 0_1206_5%15W@

1 2

R779 0_1206_5%15W@R779 0_1206_5%15W@

B

SATA_ITX_C_DRX_P1_R SATA_ITX_C_DRX_N1_R

SATA_DTX_IRX_N1_R SATA_DTX_IRX_P1_R

R378 1K_0402_1%@R378 1K_0402_1%@

1 2 +5VS_ODD

C

SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0

SATA ODD Conn.

SATA_DTX_C_IRX_N0<21> SATA_DTX_C_IRX_P0<21>

Copy JIWA2 Symbol

JSATA2

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND

13

GND

OCTEK_SLS-13SB1G

Update FootPrint from OCTEK_SLS-13SB1G_13P-T to OCTEK_SLS-13SB1G_13P_RV-T

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2007/08/18 2008/8/18

E

Compal Secret Data

Deciphered Date

SATA_ITX_C_DRX_P0<21> SATA_ITX_C_DRX_N0<21>

1 2

C383 3900P_0402_50V7KC383 3900P_0402_50V7K

1 2

C384 3900P_0402_50V7KC384 3900P_0402_50V7K

F

SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_N0

SATA_DTX_IRX_N0 SATA_DTX_IRX_P0

+3VS

+5VS

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

HDD & ODD Connector

HDD & ODD Connector JHXXX M/B LA-4241P Schematic

JHXXX M/B LA-4241P Schematic

G

JSATA3

S1

GND

S2

A+

S3

A-

S4

GND

S5

B-

S6

B+

S7

GND

P1

V33

P2

V33

P3

V33

P4

GND

P5

GND

P6

GND

P7

V5

P8

V5

P9

V5

P10

GND

P11

Reserved

P12

GND

P13

V12

P14 P15

FOX_LD2122H-S43_NR

CONN@

Update Symbol SP01000G800 FOX_LD2122H-S43_NR

23

V12

GND

24

V12

GND

Manually update pin number

of

24 49Wednesday, May 28, 2008

H

0.4

5

hexainf@hotmail.com

WCM2012F2SF-121T04_0805

HDMI_CLK+ HDMI_CLK+_R

4

HDMI_CLK- HDMI_CLK-_R

1

L43

1 2 1 2

WCM2012F2SF-121T04_0805

D D

C C

B B

WCM2012F2SF-121T04_0805

HDMI_TX2+ HDMI_TX2+_R

4

HDMI_TX2- HDMI_TX2-_R

1

L45

1 2 1 2

R388

1.2K_0402_1%

7318@

HDMIDAT_NB<8> HDMICLK_NB<8>

2.2K_0402_5%

Inverting level shift for hot-plug detect

TMDS_B_HPD#<10>

A A

3

2

<EMI>

<EMI> @

R643 0_0402_5%

R643 0_0402_5% R645 0_0402_5%

R645 0_0402_5%

<EMI>

3

2

<EMI> @

<EMI>

R647 0_0402_5%

R647 0_0402_5% R649 0_0402_5%

R649 0_0402_5%

<EMI>

Symbol modified pn to SD034120180. Never use this symbol for other platform

+3VS

12

R382

R381

GM@

7.5K_0402_1%

R382

2.2K_0402_5%

GM@

C391 0.5P_0402_50V8B

@

C391 0.5P_0402_50V8B

@

R389 68_0402_5%

@

R389 68_0402_5%

@

C392 0.5P_0402_50V8B

@

C392 0.5P_0402_50V8B

@

R390 68_0402_5%

@

R390 68_0402_5%

@

C393 0.5P_0402_50V8B

@

C393 0.5P_0402_50V8B

@

R391 68_0402_5%

@

R391 68_0402_5%

@

C395 0.5P_0402_50V8B

@

C395 0.5P_0402_50V8B

@

R392 68_0402_5%

@

R392 68_0402_5%

@

+3VS

R395

7318@

20K_0402_5%

1 2

R810 0_0402_5%8101@R810 0_0402_5%8101@

12

R401

7318@

Change L43,L44,L45,L46 from SM070000M00 to SM070000K00

U12

CH7318C-BF-TR QFN 48P

7318@

Change U12 from SA00001U900(CH7318A) to SA00002D700(PS8101T) Add U12 from SA00001U920(CH7318C)

+3VS

2 11 15 21 26 33 40

HPD_SOURCE

R405

7318@

100K_0402_5%

1 2

46

3

4

6

7

8

9

10

13 14

16 17

19 20

22 23

1

5 12 18 24 27 31 36 37 43

R388 430_0402_1%8101@R388 430_0402_1%8101@

1 2

D

S

+VCC3V

1 2

HDMI_CLK+ HDMI_CLK-

HDMI_TX2+ HDMI_TX2-

HDMI_TX1+ HDMI_TX1-

HDMI_TX0+ HDMI_TX0-

Q11

Q11 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

13

7318@

2

G

HPD_SOURCE

4

U12

VCC3V VCC3V VCC3V VCC3V VCC3V VCC3V VCC3V VCC3V

FUNCTION1 FUCNTION2

ANALOG1(REXT) HPD_SOURCE SDA_SOURCE SCL_SOURCE

ANALOG2

OUT_D4+ OUT_D4-

OUT_D3+ OUT_D3-

OUT_D2+ OUT_D2-

OUT_D1+ OUT_D1-

GND GND GND GND GND GND GND GND GND GND

PS8101TQFN48G QFN 48P

8101@

3

WCM2012F2SF-121T04_0805

4

HDMI_TX1- HDMI_TX1-_R

1

L44

<EMI> @

<EMI> @ 1 2 1 2

WCM2012F2SF-121T04_0805

4

HDMI_TX0- HDMI_TX0-_R

1

L46

<EMI> @

<EMI> @ 1 2 1 2

SCL_SINK

SDA_SINK

HPD_SINK

DDC_EN

FUNCTION3 FUNCTION4

IN_D4+ IN_D4-

IN_D3+ IN_D3-

IN_D2+ IN_D2-

IN_D1+ IN_D1-

3

2

<EMI>

R651 0_0402_5%

R651 0_0402_5% R653 0_0402_5%

R653 0_0402_5%

<EMI>

3

2

<EMI>

R655 0_0402_5%

R655 0_0402_5% R657 0_0402_5%

R657 0_0402_5%

<EMI>

25

OE*

28 29

30 32

34 35

48 47

45 44

42 41

39 38

HDMI_TX0+_RHDMI_TX0+

HDMI_TX1+_RHDMI_TX1+

IN_D4+ IN_D4-

IN_D3+ IN_D3-

IN_D2+ IN_D2-

IN_D1+ IN_D1-

R380 0_0402_5%@R380 0_0402_5%@ R383 0_0402_5%7318@R383 0_0402_5%7318@

HDMICLK HDMIDAT

HDMI_DETECT

R386 4.7K_0402_5%GM@R386 4.7K_0402_5%GM@ R387 0_0402_5%@R387 0_0402_5%@

R800 4.7K_0402_5%7318@R800 4.7K_0402_5%7318@ R801 0_0402_5%@R801 0_0402_5%@

R802 4.7K_0402_5%7318@R802 4.7K_0402_5%7318@ R803 0_0402_5%@R803 0_0402_5%@

RP47 0_0404_4P2R_5%GM@RP47 0_0404_4P2R_5%GM@

RP48 0_0404_4P2R_5%GM@RP48 0_0404_4P2R_5%GM@

RP49 0_0404_4P2R_5%GM@RP49 0_0404_4P2R_5%GM@

RP50 0_0404_4P2R_5%GM@RP50 0_0404_4P2R_5%GM@

0.1U_0402_16V4Z

Layout Notice:

Cantiga NB Ext VGA

C

R

Near MXM conn.

HDMIDAT

HDMICLK

12 12

1 4 2 3

C650

PM@

+5VS

2

1

R

D16

1

DAN217_SC59

@

<EMI>

D17

1

DAN217_SC59

@

<EMI>

1

5

P

OE#

A2Y

G

3

Need short

CH7318

3

+5VS

2

3

+5VS

2

+3VS

PCIE_MTX_C_GRX_P3 <10,17> PCIE_MTX_C_GRX_N3 <10,17>

PCIE_MTX_C_GRX_P0 <10,17> PCIE_MTX_C_GRX_N0 <10,17>

PCIE_MTX_C_GRX_P1 <10,17> PCIE_MTX_C_GRX_N1 <10,17>

PCIE_MTX_C_GRX_P2 <10,17> PCIE_MTX_C_GRX_N2 <10,17>

HDMI_HPD

+3VS

12

R631

PM@

2.2K_0402_5%

HDMI_DETECT

4

U35

U35 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

PM@

HDMI Conn.

2

Place close pin 11 and 12

Place close pin 15 and 18

2.2K_0402_5%

HDMICLK

12

R811

GM@

0_0402_5%

Place close pin 21 and 24

+VCC3V

2

C386

C385

GM@

1

0.1U_0402_16V4Z

GM@

C387

GM@

1

0.1U_0402_16V4Z

Place close pin 33 and 36

+5VS_HDMI

12

R384

12

R385

2.2K_0402_5%

6 1

PM@ Q10A

PM@

2N7002DW-T/R7_SOT363-6

10/16 change symbol from SC1B411D000 to SC1B411D010

+5VS

D18

RB491D_SC59-3

+VCC_HDMI

2 1

HDMI Connector

12

R632

R632 100K_0402_5%

100K_0402_5%

1

C649

0.1U_0402_16V4Z

2

VGA_HDMI_CLK+<17> VGA_HDMI_CLK-<17>

VGA_HDMI_TX0+<17> VGA_HDMI_TX0-<17>

VGA_HDMI_TX1+<17> VGA_HDMI_TX1-<17>

VGA_HDMI_TX2+<17> VGA_HDMI_TX2-<17>

VGA_HDMI_DETECT<17>

VGA_HDMIDAT<17> VGA_HDMICLK<17>

2

1

0.1U_0402_16V4Z

+3VS

2

Q10A

3

Q10B

PM@ Q10B

PM@

HDMIDAT HDMICLK

HDMI_CLK-_R HDMI_CLK+_R

HDMI_TX0-_R HDMI_TX0+_R

HDMI_TX1-_R HDMI_TX1+_R

HDMI_TX2-_R HDMI_TX2+_R

Place close pin 40 and 37

2

C388

GM@

2

C389

GM@

1

0.1U_0402_16V4Z

Place close pin 46 and 43

5

4

R807

@R807

@

1 2

0_0805_5%

F2

1.1A_6VDC_FUSE

RP51 0_0404_4P2R_5%PM@RP51 0_0404_4P2R_5%PM@

RP52 0_0404_4P2R_5%PM@RP52 0_0404_4P2R_5%PM@

RP53 0_0404_4P2R_5%PM@RP53 0_0404_4P2R_5%PM@

RP54 0_0404_4P2R_5%PM@RP54 0_0404_4P2R_5%PM@

R406 0_0402_5%PM@R406 0_0402_5%PM@

RP59 0_0404_4P2R_5%PM@RP59 0_0404_4P2R_5%PM@

21

1 4 2 3

+5VS_HDMI

12

1

R379

1 2

0_0603_5%

GM@

2

C390

GM@

1

0.1U_0402_16V4Z

Pull high on VGA/B

VGA_DDC_HDMIDATHDMIDAT

VGA_DDC_HDMICLK

1

C394

0.1U_0402_16V4Z

2

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CKCK_shield CK+ D0D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+

TYCO_1775040-6

CONN@

HDMI_CLK+ HDMI_CLK-

HDMI_TX0+ HDMI_TX0-

HDMI_TX1+ HDMI_TX1-

HDMI_TX2+ HDMI_TX2-

HDMI_DETECT VGA_DDC_HDMIDAT

VGA_DDC_HDMICLK

GND GND GND GND

11 10

9 8 7 6 5 4 3 2 1

+3VS+VCC3V

20 21 22 23

If there is 5% resister availble,just change

Security Classification

100K follow DG 0.8

5

4

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Security Classification

2007/08/18 2008/8/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

CH7318A&HDMI Connector

JHXXX M/B LA-4241P Schematic

25 49Tuesday, June 03, 2008

of

1

of

0.4

5

Use 0805 type and over 20 mils trace width on both side

+VCC_3IN1+VCC_OUT

D D

mount JMB suggest

C C

+VCC_3IN1

CLK_PCIE_CARD#<16> CLK_PCIE_CARD<16>

PCIE_ITX_C_PRX_N5<22> PCIE_ITX_C_PRX_P5<22>

PCIE_PTX_C_IRX_N5<22> PCIE_PTX_C_IRX_P5<22>

R409

10U_0805_10V4Z

1 2

0_0805_5%

0_0805_5% C399

C399

1 2

R411 10K_0402_5%R411 10K_0402_5%

1 2

R412 10K_0402_5%R412 10K_0402_5%

1

C400

0.1U_0402_16V4Z

2

SDWP#_MMCWP#

XD_RB#

C407 0.1U_0402_10V7KC407 0.1U_0402_10V7K

1 2

C408 0.1U_0402_10V7KC408 0.1U_0402_10V7K

1 2

R414 8.2K_0402_5%R414 8.2K_0402_5%

1 2

+3VS

Refer JMB suggest 11/09

PCIE_PTX_IRX_N5 PCIE_PTX_IRX_P5

APREXT

12mil,length <250 mil

1 2

R665 0_0402_5%R665 0_0402_5%

11 12

38 39

3 4

9 8

7

U14

APCLKN APCLKP

APRXN APRXP

APTXN APTXP

APREXT

PCIES_EN PCIES

Change Pin definition for Rev:B

@

40 mil

1 2

@

C714

@

0.1U_0402_16V4Z

1

XRSTN

2

XTEST

13

D3E_WAKEN

14

NC

15

CR1_CD1N

16

CR1_CD0N

17

CR1_PCTLN

21

CR1_LEDN

JMB385-LGEZ0A_LQFP48_7X7

PLT_RST_BUF#<8,17,20,28,30,40> GPIO18<22>

+3VS

R415 4.7K_0402_5%R415 4.7K_0402_5% R416 4.7K_0402_5%R416 4.7K_0402_5%

CR_WAKE#<22>

B B

A A

5

R642 0_0402_5%@R642 0_0402_5%@

C701

270P_0402_50V7K

@

1 2 1 2

1 2

12

1 2

R673 0_0402_5%@R673 0_0402_5%@

T19

+VCC_OUT

D66

3

1

2

DAN202UT106_SC70-3

@

SUSP<41,47>

PAD

MSCD#_XDCD1 SDCD#_XDCD0#

SDCD#_XDCD0# MSCD#_XDCD1

R532 100K_0402_5%

4

JMB385

Rev :B

+1.8V

G

2

1 3

4

APVDD APV18

TAV33

DV33 DV33 DV33 DV18 DV18

MDIO0 MDIO1 MDIO2 MDIO3 MDIO4 MDIO5 MDIO6 MDIO7 MDIO8

MDIO9 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14

APGND

S

@

Q50

Q50 SI2301BDS_SOT23

SI2301BDS_SOT23

D

W=40mils

GND GND GND GND

NC NC NC

5 10 30

19 20 44 18 37

48 47 46 45 43 42 41 40 29 28 27 26 25 23 22

34 35 36

6 24

31 32 33

1

C713

@

1U_0603_10V4Z

2

20mil

C401

10U_0805_10V4Z

SDDATA0_MSDATA0 SDDATA1_MSDATA1 SDDATA2_MSDATA2 SDDATA3_MSDATA3 SDCMD_MSBS SDCLK_MSCLK SDWP#_MMCWP# XD_CLE

XD_RE# XD_RB# XD_ALE

+1.8VS_CRR

0.1U_0402_16V4Z

1

C402

2

1

C651

0.1U_0402_16V4Z

2

1

C403

2

1000P_0402_50V7K

1

2

1

2

C652

0.1U_0402_16V4Z

12mil

R420 22_0402_5%R420 22_0402_5%

1 2

R421 22_0402_5%R421 22_0402_5%

1 2

Damping need to close to IC

Refer JMB suggest 11/09

3

Active High EN 11/24 Andy

+3VS

+VCC_OUT

U13

3

VIN

4

C397

@

0.1U_0402_16V4Z

1

2

VIN/CE

2

GND

RT9701-PB_SOT23-5

@

reserved power circuit

+1.8VS_CR

C404

R413 0_0805_5%@R413 0_0805_5%@

1

0.1U_0402_16V4Z

2

1

C405

0.1U_0402_16V4Z

2

C409

0.1U_0402_16V4Z

1 2

1

2

SDCLK MSCLK

+1.8VS_CRR

40 mil

1

C406

0.1U_0402_16V4Z

2

1

C410

0.1U_0402_16V4Z

2

+3VS

+1.8VS_CR

Strap pin for JMicro

+3VS

1 2

R417 10K_0402_5%R417 10K_0402_5%

XD_CLE

XD_RE#

12

R418200K_0402_5% R418200K_0402_5%

XD_ALE

12

R419200K_0402_5% R419200K_0402_5%

The circuit need reserve for JMB385?

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/08/18 2008/8/18

2

40mil

+VCC_3IN1

1

VOUT

5

VOUT

Refer JMB suggest 11/14

Compal Secret Data

1

C398

2

1U_0603_10V4Z

+VCC_3IN1

10/17 add for JMB380

Deciphered Date

2

R410

R410 150K_0402_5%

150K_0402_5%

@

1 2

SDDATA0_MSDATA0 SDDATA1_MSDATA1 SDDATA2_MSDATA2 SDDATA3_MSDATA3 SDCLK SDWP#_MMCWP# SDCMD_MSBS SDCD#_XDCD0#

SDDATA1_MSDATA1 MSCLK

MSCD#_XDCD1 SDDATA0_MSDATA0 SDCMD_MSBS SDDATA3_MSDATA3 SDDATA2_MSDATA2

SDCLK

MSCLK

1 2

R633

100_0402_5%@

1 2

R634

100_0402_5%@

1

SD,MMC,MS muti-function pin define

MDIO PIN Name MDIO00

MDIO01 MDIO02 MDIO03 MDIO04 MDIO05 MDIO06

SD/MMC Card PIN Name

SD1_DAT0 SD1_DAT1 SD1_DAT2 SD1_DAT3 SD1_CMD SD1_CLK

SD1_WP MDIO07 MDIO08 MDIO09 MDIO10 MDIO11

MMC_DAT4

MMC_DAT5

MMC_DAT6

MMC_DAT7 MDIO12 MDIO13 MDIO14 CR1_LEDN CR1_PCTLN CR1_CD0

SD1_LED#

SD1_PCTL#

SD1_CD# CR1_CD1

3 in 1 Card Reader

JREAD1

6

VDD_SD

9

DAT0_SD

10

DAT1_SD

2

DAT2_SD

3

CD/DAT3_SD

7

CLK_SD

11

WP_SD

4

CMD_SD

1

CD_SD

5

VSS_SD

8

VSS_SD

19

VCC_MS

13

VCC_MS

14

SCLK_MS

16

INS_MS

18

SDIO_MS

20

BS_MS

15

RESERVED_MS

17

RESERVED_MS

21

VSS_MS

12

VSS_MS

22

GND

23

GND

PROCO_MDR019-C0-1202

CONN@

1 2

C412

C412 100P_0402_50V8J@

100P_0402_50V8J@

1 2

C413

C413 100P_0402_50V8J@

100P_0402_50V8J@

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

JMB385 CardReader

JHXXX M/B LA-4241P Schematic

1

MS Card PIN Name MS1_DAT0

MS1_DAT1 MS1_DAT2 MS1_DAT3 MS1_BS MS1_CLK

MS1_DAT4 MS1_DAT5 MS1_DAT6 MS1_DAT7

MS1_LED# MS1_PCTL#

MS1_CD#

26 49Tuesday, June 03, 2008

of

0.4

5

hexainf@hotmail.com

D D

C C

4

3

2

1

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/08/18 2008/8/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

3 in 1 Card Reader Conn

JHXXX M/B LA-4241P Schematic

27 49Friday, April 11, 2008

1

of

0.4

5

+3VALW

Max 541mA

D D

SI3445ADV-T1-E3_TSOP6

C C

LAN_CLKREQ#<16>

+3VS

12

R439

1K_0402_5%

B B

1K_0402_5%

ISOLATEB

12

R441

15K_0402_5%

R426

0_0603_5%

D

S

4 5

Q12

G

@

3

R678 10K_0402_5%

2

C429

@

0.1U_0402_16V4Z

1

PCIE_PTX_C_IRX_P4<22> PCIE_PTX_C_IRX_N4<22> PCIE_ITX_C_PRX_P4<22> PCIE_ITX_C_PRX_N4<22>

LAN_CLKREQ#

VDD33

R434 0_0402_5%8111C@R434 0_0402_5%8111C@ R435 0_0402_5%@R435 0_0402_5%@ R436 2.49K_0402_1%R436 2.49K_0402_1%

6

0.1U_0402_16V4Z

2 1

@

1 2

For soft start Andy 11/24

R432 0_0402_5%R432 0_0402_5%

CLK_PCIE_LAN<16> CLK_PCIE_LAN#<16> PLT_RST_BUF#<8,17,20,26,30,40>

1 2 1 2

ICH_PCIE_WAKE#<22,30,31>

width > 40mil

1

C421

C422

@

22U_0805_6.3V6M

2

EN_WOL# <32>

12

C442 0.1U_0402_10V7KC442 0.1U_0402_10V7K

12

C443 0.1U_0402_10V7KC443 0.1U_0402_10V7K

PCIE_ITX_C_PRX_P4 PCIE_ITX_C_PRX_N4

1 2

width > 60mil

12

C721 0.01U_0402_16V7KC721 0.01U_0402_16V7K

R429 0_0603_5%R429 0_0603_5%

PCIE_PTX_IRX_P4 PCIE_PTX_IRX_N4

CLK_PCIE_LAN CLK_PCIE_LAN# PLT_RST_BUF#

SROUT12

ENSR RSET

ICH_PCIE_WAKE# ISOLATEB

LAN_XTAL_IN LAN_XTAL_OUT

10/09 change to SJ125P0M200

LAN_XTAL_IN

Y2

1 2

25MHz_20pF_6X25000017

1

C448

C448 27P_0402_50V8J

27P_0402_50V8J

2

A A

LAN_XTAL_OUT

1

C449

C449 27P_0402_50V8J

27P_0402_50V8J

2

DVDD12

R445 0_0603_5%8102E@R445 0_0603_5%8102E@

4

1

C423

2

0.1U_0402_16V4Z

U15

29

HSOP

30

HSON

23

HSIP

24

HSIN

33

CLKREQB

26

REFCLK_P

27

REFCLK_N

20

PERSTB

1

SROUT12

5

FB12

62

ENSR

64

RSET

19

LANWAKEB

36

ISOLATEB

60

CKTAL1

61

CKTAL2

65

EXPOSE_PAD

25

EGND

31

EGND

15

NC

17

NC

18

NC

34

NC

35

NC

39

NC

40

NC

41

NC

42

NC

RTL8111C-GR_QFN64_9X9

8111C@

0.1U_0402_16V4Z

1

C424

C425

2

width > 40mil

1

C430

2

0.1U_0402_16V4Z

VDD33

1

C426

0.1U_0402_16V4Z

2

AVDD33

1

C431

0.1U_0402_16V4Z

2

8111C@

EEDO

EEDI/AUX

EESK EECS

LED3 LED2 LED1 LED0

MDIP0 MDIN0 MDIP1 MDIN1 MDIP2 MDIN2 MDIP3 MDIN3

DVDD12 DVDD12 DVDD12 DVDD12 DVDD12 DVDD12

EVDD12 EVDD12

VDD33 VDD33 VDD33 VDD33

VDDSR

AVDD33 AVDD33

AVDD12 AVDD12 AVDD12 AVDD12

IGPIO

OGPIO

VDD33

AVDD33

45 47 48 44

54 55 56 57

3 4 6 7 9 10 12 13

21 32 38 43 49 52

22 28

16 37 46 53

63 2

59 8

11 14 58

50 51

AVDD12

EVDD12

C722

8102E@

4.7U_0805_10V4Z

EEDO EEDI EESK EECS

LINK10

R431 0_0402_5%R431 0_0402_5%

LINKLED#CKREQB ACTIVITY#

MDI0+ MDI0MDI1+ MDI1MDI2+ MDI2MDI3+ MDI3-FB12

EVDD12

VDD33

width > 40mil Length < 200mil

AVDD33

AVDD12

R448 0_0603_5%8111C@R448 0_0603_5%8111C@ R449 0_0603_5%8102E@R449 0_0603_5%8102E@

3

2

width > 60mil

Length < 200mil to Pin1

AVDD12

0.1U_0402_16V4Z

8111C@

C414

1

2

0.1U_0402_16V4Z

8111C@

C415

0.1U_0402_16V4Z

1

C416

2

1

C417

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

2

Bead current rating:600mA

L28 MBK1608121YZF_0603

EVDD12

1

2

1 2

MDI0+ <29> MDI0- <29> MDI1+ <29> MDI1- <29> MDI2+ <29> MDI2- <29> MDI3+ <29> MDI3- <29>

DVDD12

1

C427

8111C@

0.1U_0402_16V4Z

2

DVDD12

1

C428

0.1U_0402_16V4Z

2

DVDD12

LINKLED# <29> ACTIVITY# <29>

0.1U_0402_16V4Z

8111C@

L28 MBK1608121YZF_0603

1 2

8111C@

R427 0_0603_5%@R427 0_0603_5%@

0.1U_0402_16V4Z

1

C437

C438

2

C438

2

0.1U_0402_16V4Z

C436

0.1U_0402_16V4Z

1

C439

2

R433

3.6K_0402_5%

EEDI

1

C440

2

0.1U_0402_16V4Z

VDD33

12

Pin 11,14,32,38,52,59 are NC pins when use 8102E

CTRL12

VDD33

DVDD12

R443 0_0603_5%8111C@R443 0_0603_5%8111C@

1

C447

8111C@

22U_0805_6.3V6M

2

U15

8102E

8102E@

1

C446

0.1U_0402_16V4Z

2

8111C@

1

C441

2

EECS EESK

EEDO

R425 0_0603_5%R425 0_0603_5%

0.1U_0402_16V4Z

R428

R428 0_0603_5%

0_0603_5%

8111C@

R430 0_0603_5%8102E@R430 0_0603_5%8102E@

0.1U_0402_16V4Z

1 2 3 4

1

C418

2

U16

CS

VCC

SK

NC

DI

NC

DO

GND

AT93C46-10SI-2.7_SO8

@

R424 0_0603_5%8102E@R424 0_0603_5%8102E@

FB12

L27

8111C@L27

8111C@

1 2

4.7UH_1008HC-472EJFS-A_5%_1008

1

C419

22U_0805_6.3V6M

2

8111C@

Inductor=4.7uH,600mA SHI00004C00

Max 340mA

CTRL12

VDD33

8 7 6 5

1

C445

@

0.1U_0402_16V4Z

2

1

Max 340mA

22U_0805_6.3V6M

C420

@

SROUT12

1

2

Security Classification

2007/08/18 2008/8/18

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/18 2008/8/18

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet of

LAN-RTL8111C/RTL8102E

JHXXX M/B LA-4241P Schematic

28 49Tuesday, June 03, 2008

of

1

of

0.4

5

hexainf@hotmail.com

D D

C450 0.01U_0402_16V7KC450 0.01U_0402_16V7K

1 2

C451 0.01U_0402_16V7K

1 2

8111C@

C452 0.01U_0402_16V7KC452 0.01U_0402_16V7K

1 2

C453 0.01U_0402_16V7K

1 2

8111C@

C C

MDI0+<28> MDI0-<28>

MDI2+<28> MDI2-<28>

MDI1+<28> MDI1-<28>

MDI3+<28> MDI3-<28>

V_DAC MDI0+ MDI0-

MDI2+

MDI1+ MDI1-

MDI3+ MDI3-

4

1 2 3 4 5 6 7 8

9 10 11 12

T20

TCT1 TD1+ TD1TCT2 TD2+ TD2TCT3 TD3+ TD3TCT4 TD4+ TD4-

GSL5009LF

8111C@

MCT1 MX1+

MX1MCT2 MX2+

MX2MCT3 MX3+

MX3MCT4 MX4+

MX4-

3

MCT0

24 23 22 21 20 19 18 17 16 15 14 13

R450 75_0402_5%R450 75_0402_5%

MDO0+ MDO0MCT1

R451 75_0402_5%8111C@R451 75_0402_5%8111C@

MDO2+ MDO2-MDI2MCT2

R452 75_0402_5%R452 75_0402_5%

MDO1+ MDO1-

R453 75_0402_5%8111C@R453 75_0402_5%8111C@

MDO3+ MDO3-

12

RJ45_PRMCT3

2

1

3/4 Change T20 Value from 350uH_GSL5009LF to GSL5009LF

Change T20 P/N fromSP050003T00 to SP050003T10

Lan Conn.

<EMI>

T21

MDI0+ MDI0V_DAC

V_DAC

B B

MDI1+ MDI1-

1

RD+

2

RD-

3

CT

4

NC

5

NC

6

CT

7

TD+ TD-8TX-

NS0013LF

8102E@

RX+

RX-

TX+

CT NC NC

CT

MDO0+

16

MDO0-

15

MCT0

14 13 12

MCT2

11

MDO1+

10

MDO1-

9

ACTIVITY#<28>

ACTIVITY#

Change T21 Value from 350uH_NS0013LF to NS0013LF

LINKLED#<28>

A A

Security Classification

2007/08/18 2008/8/18

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/18 2008/8/18

3

Compal Secret Data

LINKLED#

Deciphered Date

12

C454 470P_0402_50V7K

1 2

R454 300_0402_5%R454 300_0402_5%

1 2

R455 300_0402_5%R455 300_0402_5%

<EMI>

12

C455 470P_0402_50V7K

2

VDD33

LAN_ACT#

10mil

LAN_LINK#

VDD33

RJ45_PR

MDO3MDO3+ MDO1MDO2MDO2+ MDO1+ MDO0MDO0+

C456

1 2

1000P_1206_2KV7K

Title

LAN CONNECTOR

Size Document Number Rev

Custom

JHXXX M/B LA-4241P Schematic

Date: Sheet

JP23

12

Amber LED+

11

Amber LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

TYCO_3-440470-4

CONN@

<EMI>

0.1U_0402_16V4Z

Compal Electronics, Inc.

C457

1

2

16

SHLD2

15

SHLD1

14

SHLD2

13

SHLD1

LANGND

1

C458

4.7U_0805_10V4Z

2

29 49Wednesday, May 28, 2008

1

of

0.4

A

B

C

D

E

NAND mini Card(Robson support)

+1.5VS_ROB+3VS_ROB

1

C465

1 1

0.01U_0402_16V7K

2

ROBSON@

+3VS_ROB

CLK_PCIE_NAND#<16> CLK_PCIE_NAND<16>

2 2

+3VS_ROB

1

C466

0.1U_0402_16V4Z

2

ROBSON@

ROB_CLKREQ#

1 2

R457 10K_0402_5%

PCIE_PTX_C_IRX_N2_15 PCIE_PTX_C_IRX_P2_15

PCIE_ITX_C_PRX_N2_15 PCIE_ITX_C_PRX_P2_15

+3VS_ROB

1

C467

@

4.7U_0805_10V4Z

2

1

C468

@

4.7U_0805_10V4Z

2

JMIN3

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

GND2

FOX_AS0B226-S56N-7F

ROBCONN@

1

C469

0.01U_0402_16V7K

2

ROBSON@

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

+3VS_ROB

1

C470

0.1U_0402_16V4Z

2

ROBSON@

+1.5VS_ROB

Use Y topology to place these resisters between JMIN2 and JMIN1

PCIE_PTX_C_IRX_N2<22> PCIE_PTX_C_IRX_P2<22> PCIE_ITX_C_PRX_N2<22> PCIE_ITX_C_PRX_P2<22>

PLT_RST_BUF#

+3VS

+1.5VS

PLT_RST_BUF# <8,17,20,26,28,40>

ROBSON@

R780 0_0805_5%

ROBSON@

R781 0_0805_5%

+3VS_ROB

+1.5VS_ROB

Mini-Express Card for TV Tuner

1 2

R788 0_0402_5%14W@R788 0_0402_5%14W@

1 2

R789 0_0402_5%14W@R789 0_0402_5%14W@

1 2

R790 0_0402_5%14W@R790 0_0402_5%14W@

1 2

R791 0_0402_5%14W@R791 0_0402_5%14W@

1 2

R792 0_0402_5%15W@R792 0_0402_5%15W@

1 2

R793 0_0402_5%15W@R793 0_0402_5%15W@

1 2

R794 0_0402_5%15W@R794 0_0402_5%15W@

1 2

R795 0_0402_5%15W@R795 0_0402_5%15W@

PCIE_PTX_C_IRX_N2_14 PCIE_PTX_C_IRX_P2_14 PCIE_ITX_C_PRX_N2_14 PCIE_ITX_C_PRX_P2_14

PCIE_PTX_C_IRX_N2_15 PCIE_PTX_C_IRX_P2_15 PCIE_ITX_C_PRX_N2_15 PCIE_ITX_C_PRX_P2_15

Vcc 3.3V +/- 8% Peak Icc 2750mA with max supply droop 50mA Average Icc 1000mA

+3VS +3VS

1

2

ICH_PCIE_WAKE#<22,28,31> WLAN_ACTIVE<34> BT_ACTIVE<34>

+3VS

3G_CLKREQ#<16> CLK_PCIE_3G#<16> CLK_PCIE_3G<16>

10K_0402_5%

MINI2_OFF#

SSM3K7002FU_SC70-3

C459

@

4.7U_0805_10V4Z

R456 10K_0402_5%R456 10K_0402_5%

+3VS

R458

D

Q13

S

1

C460

0.1U_0402_16V4Z

2

ICH_PCIE_WAKE# WLAN_ACTIVE BT_ACTIVE 3G_CLKREQ#

1 2

PCIE_PTX_C_IRX_N2_14 PCIE_PTX_C_IRX_P2_14

PCIE_ITX_C_PRX_N2_14 PCIE_ITX_C_PRX_P2_14

+3VS

12

13

TV_ON#

2

G

TV_ON# <32>

+1.5VS

1

C461

@

4.7U_0805_10V4Z

2

JMIN1

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

FOX_AS0B226-S56N-7F

CONN@

USB20_R_N8 USB20_N8

USB20_R_P8 USB20_P8

1

C462

0.1U_0402_16V4Z

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

(WWAN_LED#)

44

46

48

50

52

54

GND2

@

WCM2012F2SF-121T04_0805

4

1

L51

4

1

<EMI>

<EMI> 1 2 1 2

1

C463

0.1U_0402_16V4Z

2

MINI2_OFF# PLT_RST_BUF#

ICH_SMBCLK ICH_SMBDATA

USB20_R_N8 USB20_R_P8

3

2

<EMI>

R666 0_0402_5%

R666 0_0402_5% R667 0_0402_5%

R667 0_0402_5%

<EMI>

1

C464

0.1U_0402_16V4Z

2

+3VS +1.5VS

+3VS

WLAN_LED# <40>

USB20_N8 <22>

USB20_P8 <22>

Mini-Express Card for WLAN

+1.5VS +3VS

0.1U_0402_16V4Z

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

L29

1 2

KC FBM-L11-201209-221LMAT_0805

+3VS

1

C471

2

Issued Date

C

+3VS

12

R462

10K_0402_5%

MINI_RF_OFF#

SSM3K7002FU_SC70-3

13

D

Q14

RF_ON#

2

G

S

RF_ON# <32>

Please place these caps between JMIN1 and JMIN2

ICH_SMBCLK ICH_SMBDATA

2007/08/18 2008/8/18

C757 100P_0402_50V8J@C757 100P_0402_50V8J@

1 2

C758 100P_0402_50V8J@C758 100P_0402_50V8J@

1 2

Compal Secret Data

Deciphered Date

D

Kill SWITCH

+3VALW

2

3

D21

DAN217_SC59

@

1

3

11223

SW2

SW2 1BS003-1211L_3P

1BS003-1211L_3P

01/22 change sw2 P/N DE100000300 11/23 Change SW2 to correct symbol (by Andy)

Title

Mini-Card/Kill SWITCH

Size Document Number Rev

Date: Sheet

JHXXX M/B LA-4241P Schematic

+3VALW

R461

R461 100K_0402_5%

100K_0402_5%

1 2

KILL_SW#

Compal Electronics, Inc.

E

KILL_SW# <32>

of

30 49Wednesday, May 28, 2008

of

30 49Wednesday, May 28, 2008

of

30 49Wednesday, May 28, 2008

0.4

R463

1 2

100K_0402_5%

C477

@

MINI_VCC

ICH_SMBCLK <16,22,31> ICH_SMBDATA <16,22,31>

WLAN_LED# <40>

+5VS

1

2

***

JMIN2

1 3 5 7 9

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

FOX_AS0B226-S56N-7F

CONN@

C475

0.01U_0402_16V7K

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

GND1

2 4 6

8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

GND2

1

0.1U_0402_16V4Z

2

C476

MINI_VCC

MINI_RF_OFF# PLT_RST_BUF# MINI_VCC

ICH_SMBCLK ICH_SMBDATA

USB20_R_N3 USB20_R_P3

WLAN_LED#

1

4.7U_0805_10V4Z

2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

B

1

4.7U_0805_10V4Z

2

ICH_PCIE_WAKE# WLAN_ACTIVE BT_ACTIVE WLAN_CLKREQ#

CLK_PCIE_WLAN# CLK_PCIE_WLAN

MINI_VCC

USB20_P3 <22>

USB20_N3 <22>

MINI_VCC +1.5VS

1

C474

@

2

ICH_PCIE_WAKE#<22,28,31> WLAN_ACTIVE<34> BT_ACTIVE<34> WLAN_CLKREQ#<16>

3 3

USB20_R_P3 USB20_P3

USB20_R_N3 USB20_N3

4 4

0.01U_0402_16V7K

CLK_PCIE_WLAN#<16> CLK_PCIE_WLAN<16>

PCIE_PTX_C_IRX_N3<22> PCIE_PTX_C_IRX_P3<22>

PCIE_ITX_C_PRX_N3<22> PCIE_ITX_C_PRX_P3<22>

@

WCM2012F2SF-121T04_0805

4

1

L59

4

1

<EMI>

<EMI> 1 2 1 2

C472

3

2

<EMI>

R808 0_0402_5%

R808 0_0402_5% R809 0_0402_5%

R809 0_0402_5%

<EMI>

1

0.1U_0402_16V4Z

2

A

3

2

C473

A

hexainf@hotmail.com

New Card Power Switch

New Card

+3VS

0.1U_0402_16V4Z

PCI_RST# SYSON SUSP# CP_PE# CP_USB#

+1.5VS

C694

0.1U_0402_16V4Z

12

1 1

+3VALW

C689

+3VALW

PCI_RST#<20,32,35> SYSON<32,41,46> SUSP#<17,32,41,46,47>

R635 100K_0402_5%R635 100K_0402_5% R636 100K_0402_5%R636 100K_0402_5%

0.1U_0402_16V4Z

12

C693

12

12 12

internal pull high to 3.3Vaux-in EC need setting at Hi-Z & output Low

U18

12

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

18

RCLKEN

R5538D001-TR-F_QFN20_4X4~D

1.5Vout

3.3Vout

OC#

PERST#

GND

B

11 13

3 5

15 19 8 16

NC

7

+1.5VS_CARD1

+3VS_CARD1

+3VALW_CARD1

C

C695

0.1U_0402_16V4Z

C697

0.1U_0402_16V4Z

C699

0.1U_0402_16V4Z

+3VS_CARD1

1

2

+1.5VS_CARD1

1

2

+3VALW_CARD1

1

2

1

C696

@

4.7U_0805_10V4Z

2

1

C698

@

4.7U_0805_10V4Z

2

1

C700

@

4.7U_0805_10V4Z

2

D

E

New Card Socket (Left/TOP)

JAQ60

JEXP1

1

GND

USB20_N10<22> USB20_P10<22>

ICH_SMBCLK<16,22,30> ICH_SMBDATA<16,22,30>

+1.5VS_CARD1

ICH_PCIE_WAKE#<22,28,30>

+3VALW_CARD1 +3VS_CARD1

EXP_CLKREQ#<16> CP_PE#<22> CLK_PCIE_EXP#<16> CLK_PCIE_EXP<16>

PCIE_PTX_C_IRX_N1<22> PCIE_PTX_C_IRX_P1<22>

PCIE_ITX_C_PRX_N1<22> PCIE_ITX_C_PRX_P1<22>

CP_USB#

PERST1#

EXP_CLKREQ# CP_PE#PERST1#

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND1

28

GND2

SANTA_130810-1

CONN@

GND3 GND4

29 30

Change to GMT PartNumber

Update FootPrint from SANTA_13181060-5_26P-T to

2 2

SANTA_130810-1_26P

Update FootPrint from SANTA_130810-1_26P to SANTA_130810-1_26P-S

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/18 2008/8/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

NEW CARD

JHXXX M/B LA-4241P Schematic

31 49Wednesday, May 28, 2008

E

of

0.4

5

4

3

2

1

+EC_DVCC+3VALW

L30

FBM-11-160808-601-T_0603

1 2

L31

1 2

L32 FBM-11-160808-601-T_0603L32 FBM-11-160808-601-T_0603

D D

KB_RST#<21>

C502

22P_0402_50V8J@

CLK_PCI_EC<16>

+3VALW

+3VS

@

1 2

R714 8.2K_0402_5%

C C

B B

+3VALW

PCI_PME#<20>

+5VALW

1 2

R490 4.7K_0402_5%R490 4.7K_0402_5%

1 2

R491 4.7K_0402_5%R491 4.7K_0402_5%

1 2

R711 10K_0402_5%R711 10K_0402_5%

1 2

R712 10K_0402_5%R712 10K_0402_5%

1 2

R713 10K_0402_5%R713 10K_0402_5%

+3VS

1 2

R492 4.7K_0402_5%R492 4.7K_0402_5%

1 2

R493 4.7K_0402_5%R493 4.7K_0402_5%

1 2

C513 100P_0402_50V8J@C513 100P_0402_50V8J@

ACK_GUEST<33>

SPI_CS#<34> SPI_CLK_R<34> SPI_SI<34>

R483 10K_0402_5%R483 10K_0402_5%

R487 0_0402_5%R487 0_0402_5%

EC DEBUG PORT

A A

+3VALW

EC_TX_P80_DATA EC_RX_P80_CLK

FBM-11-160808-601-T_0603

2

C492

0.1U_0402_16V4Z

KB_RST#

CH751H-40PT_SOD323-2

@

12

R478

PM_CLKRUN#

1 2

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

100P_0402_50V8J

SUSP#

SPI_CS# FSEL#SPICS# SPI_CLK_R SPI_SI

12

R476 10_0402_5%

1 2

47K_0402_5%

C504

0.1U_0402_16V4Z

12

L57 0_0402_5%

L58 0_0402_5%

CLK_GUEST_R DATA_GUEST_R ACK_GUEST_R

1

C511

@

2

ACK_GUEST ACK_GUEST_R

R814 0_0402_5%

1 2

R494 0_0402_5%R494 0_0402_5%

1 2

R495 0_0402_5%R495 0_0402_5%

1 2

R496 0_0402_5%R496 0_0402_5%

JP61

1

2

3

4

ACES_85205-0400

DBCONN@

5

1

C493

C493 1000P_0402_50V7K

1

1000P_0402_50V7K

2

ECAGND

1 2

R474 0_0402_5%R474 0_0402_5%

2 1

D23

@D23

@

1

2

EC_PME#

KSO[0..15]<33> KSI[0..7]<33>

<EMI>

CYPRESS@L57 0_0402_5%

CYPRESS@

1 2

CYPRESS@L58 0_0402_5%

CYPRESS@

1 2

<EMI>

1

DATA_GUEST ESB_DAT

C512

@

100P_0402_50V8J

2

CYPRESS@

1 2

SPI_CLK FWR#SPI_SI

+EC_AVCC+3VALW

PM_CLKRUN#<22,40>

CLK_GUEST DATA_GUEST

15P_0402_50V8J

0.1U_0402_16V4Z

C494

0.1U_0402_16V4Z

C494

0.1U_0402_16V4Z

1

2

GATEA20<21> SERIRQ<22,35,40>

LPC_FRAME#<21,35,40> LPC_AD3<21,35,40> LPC_AD2<21,35,40> LPC_AD1<21,35,40> LPC_AD0<21,35,40>

PCI_RST#<20,31,35> EC_SCI#<22>

KSO[0..15] KSI[0..7]

EC_SMB_CK1<34,43> EC_SMB_DA1<34,43> EC_SMB_CK2<4,17> EC_SMB_DA2<4,17>

PM_SLP_S3#<22> PM_SLP_S5#<22> EC_SMI#<22>

<EMI>

SM_KEY#<33>

L60 0_0402_5%

ENE@L60 0_0402_5%

ENE@

1 2

L61 0_0402_5%

ENE@L61 0_0402_5%

ENE@

1 2

<EMI>

P_USB#<33> USB2_ON#<35> FAN_SPEED1<4>

EC_TX_P80_DATA<14,15> EC_RX_P80_CLK<14,15> ON/OFF#<35> SM_KEY_LED#<33> NUM_LED#<33>

XCLKO XCLKI

1

C523

2

1 2

FBM-11-160808-601-T_0603

C498

1000P_0402_50V7K

C498

C497

0.1U_0402_16V4Z

C497

0.1U_0402_16V4Z

1

2

EC_SCI#

ESB_CLKCLK_GUEST

1000P_0402_50V7K

C499

1000P_0402_50V7K

C499

1000P_0402_50V7K

1

2

U21

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

KB926QFA1 LQFP 128P

1

2

Use KB926C0

C524

C524 15P_0402_50V8J

15P_0402_50V8J

1

2

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

C496

0.1U_0402_16V4Z

C496

0.1U_0402_16V4Z

C495

1

2

GATEA20 SERIRQ

LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC PCI_RST# EC_RST#

@

1 2

R479 0_0402_5%

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# EC_RSMRST# PM_SLP_S5# EC_SMI# SM_KEY#

P_USB# USB2_ON# FAN_SPEED1 ACK_GUEST_R EC_TX_P80_DATA EC_RX_P80_CLK ON/OFF# SM_KEY_LED# NUM_LED#

XCLKI XCLKO

R497

@

1 2

20M_0603_5%

1

OSC4OSC

X2

NC3NC

2

32.768KHZ_12.5PF_Q13MC14610002

4

+EC_AVCC

9

22

VCC

PS2 Interface

GND

11

67

33

96

111

125

VCC

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

ACOFF/FANPWM2/GPIO13

PWM Output

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

AD Input

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C EN_DFAN1/DA1/GPIO3D

DA Output

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SPI Device Interface

SPI Flash ROM

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

GPIO

BATT_LOW_LED#/GPIO54

VR_ON/XCLK32K/GPIO57

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

ICH_PWROK/GPXO06

GPO

GPIO

PM_SLP_S4#/GPXID1

GPI

GND

AGND

GND

24

35

69

94

113

ECAGND

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10/12 Add MB2 ID need check

INVT_PWM

21

BEEP#

23

VGA_THERM#

AD3/GPIO3B AD4/GPIO42

DA3/GPIO3F

SPIDI/RD#

SPIDO/WR#

SPICS#

GPXO10 GPXO11

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

26

ACOFF

27

BATT_TEMP

63

BATT_OVP

64

ADP_I

65 66

MB2_ID

75

MB_ID

76

DAC_BRIG

68

EN_FAN1

70

IREF

71

CHGVADJ

72

CLK_GUEST_R

83

DATA_GUEST_R

84 85

POWER_USB_LED#

86

TP_CLK

87

TP_DATA

88

97 98 99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

2007/08/18 2008/8/18

1 2

R637 0_0402_5%R637 0_0402_5%

1 2

R488 10K_0402_5%@R488 10K_0402_5%@

EN_WOL# GPXOA02 ACK_GUEST LID_SW#

FRD#SPI_SO FWR#SPI_SI SPI_CLK FSEL#SPICS#

RCIRRX MCH_TSATN#_EC FSTCHG CHARGE_LED0# CAPS_LED# CHARGE_LED1# PWR_LED# SYSON VR_ON ACIN

EC_LID_OUT# EC_ON TV_ON# ICH_PWROK BKOFF# RF_ON# BT_ON# VGA_AC_DET

PM_SLP_S4# ENBKL CIR_DET# EC_THERM# SUSP# PBTN_OUT# EC_PME#

2

C518

4.7U_0805_10V4Z

1

FANPWM1/GPIO12

ADP_I/AD2/GPIO3A

IREF/DA2/GPIO3E

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C

PSDAT2/GPIO4D

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPICLK/GPIO58

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

CAPS_LED#/GPIO53 SUSP_LED#/GPIO55

SYSON/GPIO56

AC_IN/GPIO59

EC_ON/GPXO05

EC_SWI#/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

ENBKL/GPXID2

3

MB2_ID

C500

@

0.1U_0402_16V4Z

INVT_PWM <18> BEEP# <36> VGA_THERM# <17> ACOFF <44>

1 2

C503 0.01U_0402_16V7KC503 0.01U_0402_16V7K

BATT_OVP <44> ADP_I <44>

DAC_BRIG <18> EN_FAN1 <4> IREF <44> CHGVADJ <44>

<EMI>

L53 0_0402_5%

TONTEK@L53 0_0402_5%

TONTEK@

1 2

L54 0_0402_5%

TONTEK@L54 0_0402_5%

TONTEK@

1 2

<EMI>

POWER_USB_LED# <33> TP_CLK <34> TP_DATA <34>

1 2

Deciphered Date

EN_WOL# <28> LID_SW# <35>

FRD#SPI_SO <34>

RCIRRX <35> MCH_TSATN#_EC <8> FSTCHG <44> CHARGE_LED0# <40> CAPS_LED# <33> CHARGE_LED1# <40> PWR_LED# <33,40> SYSON <31,41,46> VR_ON <48> ACIN <22,42,44>

EC_RSMRST# <22> EC_LID_OUT# <22> EC_ON <35> TV_ON# <30> ICH_PWROK <8,22> BKOFF# <18> RF_ON# <30> BT_ON# <34> VGA_AC_DET <17>

PM_SLP_S4# <22> ENBKL <18> CIR_DET# <35> EC_THERM# <22> SUSP# <17,31,41,46,47> PBTN_OUT# <22>

R812 0_0402_5%TONTEK@R812 0_0402_5%TONTEK@

Compal Secret Data

+3VALW

12

R469

@

RC

100K_0402_5%

1

2

12

R471

@

Rd

0_0402_5%

ECAGND

CLK_GUEST DATA_GUEST

KB926 SPI STRAP PIN

No stuff when use KB926C0

KILL_SW# <30>

2

BATT_TEMP <43>

CLK_GUEST <33> DATA_GUEST <33>

C501

@

0.1U_0402_16V4Z

TP_CLK TP_DATA

GPXOA02

CIR_DET# P_USB# RCIRRX SM_KEY#

PCI_RST# CLK_GUEST DATA_GUEST

22P_0402_50V8J

EC_RSMRST# BEEP# SYSON EC_SCI# EC_THERM# SERIRQ

1

2

100P_0402_50V8J

C508

C505

@

ICH_PWROK PBTN_OUT# EN_FAN1 EC_ON ON/OFF# TV_ON#

1

2

100P_0402_50V8J

C733

C732

BATT_TEMP BATT_OVP ACIN VR_ON ENBKL FSTCHG ACK_GUEST ADP_I EC_SMB_DA1 EC_SMB_CK1

Compal Electronics, Inc.

Title

ENE-KB926

Size Document Number Rev

Custom

Date: Sheet

C732

C517 100P_0402_50V8JC517 100P_0402_50V8J C519 100P_0402_50V8JC519 100P_0402_50V8J C520 100P_0402_50V8JC520 100P_0402_50V8J C521 100P_0402_50V8J@C521 100P_0402_50V8J@ C522 100P_0402_50V8J@C522 100P_0402_50V8J@ C734 100P_0402_50V8J C734 100P_0402_50V8J C735 100P_0402_50V8J C735 100P_0402_50V8J C736 100P_0402_50V8J@C736 100P_0402_50V8J@ C743 100P_0402_50V8J@C743 100P_0402_50V8J@ C744 100P_0402_50V8J@C744 100P_0402_50V8J@

JHXXX M/B LA-4241P Schematic

Tuesday, June 03, 2008

+3VALW

12

R470

Rb

47K_0402_5%

RB@

Ra

1 2 1 2

1 2

1 2 1 2

1 2

1

2

1

2

100P_0402_50V8J

C506

C509

@

1

2

100P_0402_50V8J

C731

C514

@

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

RB@

12

R472

@

0_0402_5%

12 12

1

C720

@

22P_0402_50V8J

2

<EMI>

1

2

100P_0402_50V8J

C507

@

C510

1

2

100P_0402_50V8J

C515

@

C516

1

2

100P_0402_50V8J

@

1

2

100P_0402_50V8J

@

32 49

MB_ID

1

2

R475 4.7K_0402_5%R475 4.7K_0402_5% R477 4.7K_0402_5%R477 4.7K_0402_5%

R813 10K_0402_5%TONTEK@R813 10K_0402_5%TONTEK@

R731 10K_0402_5%R731 10K_0402_5% R485 10K_0402_5%R485 10K_0402_5% R489 10K_0402_5%R489 10K_0402_5% R672 10K_0402_5%R672 10K_0402_5%

R256 100K_0402_5%R256 100K_0402_5%

C719

@

@ <EMI>

<EMI>

1

2

100P_0402_50V8J

@

1

2

100P_0402_50V8J

+5VS

+5VALW

+3VALW

0.4

of

5

hexainf@hotmail.com

INT_KBD Conn.

4

3

2

1

For JHL90 For JHT00

JP43

KSI1 KSI7

D D

C C

KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15

JP43

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

25 GND GND

ACES_88502-2501

CONN@

KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15

27 26

JP44

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

25 GND GND

ACES_88502-2501

CONN@

27 26

KSI[0..7] KSO[0..15]

Delete C525~C548 SE071101J80 (100pF) Add SI102101K80 (CP : 100pF) (EMI Recommend)

KSI4 KSI5 KSO0 KSI2

KSI1 KSI7 KSI6 KSO9

KSO2 KSO4 KSO7 KSO8

KSI[0..7] <32> KSO[0..15] <32>

CP1

<EMI>CP1

<EMI>

2 3 4 5

81 7 6

100P_1206_8P4C_50V8

100P_1206_8P4C_50V8 CP2

<EMI>CP2

<EMI>

81 7 6

100P_1206_8P4C_50V8

100P_1206_8P4C_50V8 CP3

<EMI>CP3

<EMI>

81 7 6

100P_1206_8P4C_50V8

KSO6 KSO3 KSO12 KSO13

KSI3 KSO5 KSO1 KSI0

KSO14 KSO11 KSO10 KSO15

CP4

<EMI>CP4

<EMI>

2 3 4 5

81 7 6

100P_1206_8P4C_50V8

CP5

<EMI>CP5

<EMI>

2 3 4 5

100P_1206_8P4C_50V8

100P_1206_8P4C_50V8 CP6

<EMI>CP6

<EMI>

2 3 4 5

100P_1206_8P4C_50V8

81 7 6

Function Board Conn.

Power USB Board Conn.

R817 0_0603_5%@R817 0_0603_5%@

+3VS

R816 0_0603_5%@R816 0_0603_5%@

+3VALW

R805 0_0603_5%@R805 0_0603_5%@

+5VS

R806 0_0603_5%R806 0_0603_5%

+5VALW

B B

12 12 12 12

CLK_GUEST<32> DATA_GUEST<32> ACK_GUEST<32> SM_KEY#<32> SM_KEY_LED#<32>

CAPS_LED#<32> NUM_LED#<32>

+5V_SW

CLK_GUEST DATA_GUEST ACK_GUEST SM_KEY# SM_KEY_LED#

CAPS_LED# NUM_LED#

JP48

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

ACES_85201-1005N

CONN@

+5VALW

JP62

1

ON/OFFBTN#<35> PWR_LED#<32,40>

POWER_USB_LED#<32>

ON/OFFBTN# D_P_USB# PWR_LED# POWER_USB_LED#

1

2

3

4

5

6

7

GND

8

GND

ACES_85201-06051

ACK_GUEST

A A

5

C759 100P_0402_50V8J@C759 100P_0402_50V8J@

1 2

D_P_USB#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

DAN202UT106_SC70-3

+3VALW

12

R659

R659 10K_0402_5%

10K_0402_5%

D67

3

P_USB#

2

51_ON#

3

Compal Secret Data

2007/08/18 2008/8/18

Compal Secret Data

P_USB# <32> 51_ON# <35,42>

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

KB/SW/PW Conn

KB/SW/PW Conn JHXXX M/B LA-4241P Schematic

JHXXX M/B LA-4241P Schematic

1

of

33 49Wednesday, May 28, 2008

of

33 49Wednesday, May 28, 2008

of

33 49Wednesday, May 28, 2008

0.4

+5VALW+3VALW

EEPROM_VCC

R521 0_0603_5%

R522 0_0603_5%

EEPROM_VCC

@

12

@

12

EC_SMB_CK1

@

1 2

R523 4.7K_0402_5%

R523 4.7K_0402_5% R524 4.7K_0402_5%

R524 4.7K_0402_5%

@

1 2

EC_SMB_DA1

12/28 Add

EC_SMB_CK1<32,43> EC_SMB_DA1<32,43>

0206 => change PN to SA00001N800 12/19 change pn to SA00001MP00 ( original part EOL )

EEPROM_VCC

@

C550 0.1U_0402_16V4Z

1 2

U24

@U24

@

8

VCC

7

WP

6

SCL

5

SDA

AT24C16AN-10SU-2-7_SO8

GND

16M SPI ROM

For EC+BIOS+VBIOS

C549

SA00001IT00 16Mbit 12/10 Andy

U23

8

VCC

3

W

7

SPI_CS# SPI_CLK_R SPI_SI SPI_SO

HOLD

1

S

6

C

5

D

SST25LF080A_SO8-200mil

VSS

4

2

Q

R527 0_0402_5%R527 0_0402_5%

ICH_SPI_CS0#_R<22> ICH_SPI_CLK_R<22> ICH_SPI_MOSI_R<22>

12

FRD#SPI_SO <32>

C551

SPI_CS#<32> SPI_CLK_R<32> SPI_SI<32>

+3VALW

1

2

20mils

EEPROM_VCC

12

R525

@

100K_0402_5%

1

A0

2

A1

3

A2

4

12

R528

@

100K_0402_5%

0.1U_0402_16V4Z

12/15 change from 15 to 0 ohm'12/25 change back to SA024160140 ( Samples can not on time )

C549

@

0.1U_0402_16V4Z

For iTPM+HDCP

+3VALW

20mils

1

2

ICH_SPI_CS0#_R ICH_SPI_CLK_R ICH_SPI_MOSI_R ICH_SPI_MISO_R

U22

@U22

@

8

VCC

VSS

3

W

7

HOLD

1

S

6

C

5

Q

D

SST25LF080A_SO8-200mil

4

2

follow CRB Check

SD028150A80

@

R526 15_0402_5%

ICH_SPI_MISO <22>

8M SPI ROM

Bluetooth Conn.

Need to check BT pin definition again! 9/20 modified this block

+5VS

R529

10K_0402_5%

BT_LED#<40>

BT_ON#<32>

BT_LED#

SSM3K7002FU_SC70-3

0.1U_0402_16V4Z

R531 100K_0402_5%R531 100K_0402_5%

Q18

1 2

D

S

12

13

C553

2

G

12

R530

R530 10K_0402_5%

10K_0402_5%

4.7U_0805_10V4Z

2

BT_ACTIVE<30> USB20_P6<22> USB20_N6<22>

C557

+3VALW

G

@

S

Q19

Q19 SI2301BDS_SOT23

SI2301BDS_SOT23

D

W=40mils

1 3

1

2

BT_ACTIVE USB20_N6

BTON_LED

1

C554

C554 1U_0603_10V4Z

1U_0603_10V4Z

2

C558

0.1U_0402_16V4Z

WCM2012F2SF-121T04_0805

WLAN_ACTIVE<30>

+BT_VCC

L39

<EMI>L39

<EMI>

1

4

@

R638 0_0402_5%

R638 0_0402_5% R639

<EMI>

1 2 1 2

<EMI>R639

<EMI>

2

3

2

3

0_0402_5%

WLAN_ACTIVE

+BT_VCC

USB20_R_P6USB20_P6 USB20_R_N6

JP42

1

2

3

4

5

6

7

8

9

GND1

10

GND2

MOLEX_53780-0870

CONN@

To TP/B Conn.

JP12

1

2

3

4

5

6

7

GND

8

GND

ACES_85201-06051

+5VS

C552

0.1U_0402_16V4Z

2

1

TP_DATA<32> TP_CLK<32>

SWR# SWL#

3

D25

@

PSOT24C_SOT23

+5VS

SWR# SWL# TP_DATA TP_CLK

Update Footprint

14W Use 15W Use

SW4

5

6

2

Left Switch Left Switch

1

2 1

SMT1-05_4P

14W@

5

6

SMT1-05_4P

14W@

SW6

4 3

SWL#SWL#

SWR#SWR#

Right SwitchRight Switch

2 1

SMT1-05_4P

15W@

2 1

SMT1-05_4P

15W@

SW5

5

6

4 3

SW7

5

6

4 3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/18 2008/8/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

BIOS, TP & BT Connector

JHXXX M/B LA-4241P Schematic

of

34 49Wednesday, May 28, 2008

0.4

A

hexainf@hotmail.com

ON/OFF switch

1 1

ON/OFFBTN#<33>

TOP Side

12

J3 JOPEN@J3 JOPEN@

12

J4 JOPEN@J4 JOPEN@

Bottom Side

ON/OFFBTN#

D26

1

DAN202UT106_SC70-3

+3VALW

2 3

Power Button

SMT1-05_4P

SMT1-05_4P SW3

SW3

A@

ON/OFFBTN#

1 2

2 2

3 4

5

6

10/09 add for debug

EC_ON<32>

EC_ON

R535

10K_0402_5%

2

G

1 2

B

12/4 Change D14 to correct symbols

R533

R533 100K_0402_5%

100K_0402_5%

1 2

ON/OFF#

51_ON#

2

C561

C561 1000P_0402_50V7K

1000P_0402_50V7K

1

13

D

S

Q21

Q21 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

ON/OFF# <32> 51_ON# <33,42>

12

D27

D27 RLZ20A_LL34

RLZ20A_LL34

C

JP57

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

ACES_85201-1005N

DBCONN@

+3VS

CLK_PCI_DB LPC_AD0

LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME#

PCI_RST#

1

C562

@

0.1U_0402_16V4Z

2

CLK_PCI_DB <16> LPC_AD0 <21,32,40>

LPC_AD1 <21,32,40> LPC_AD2 <21,32,40> LPC_AD3 <21,32,40> LPC_FRAME# <21,32,40>

PCI_RST# <20,31,32>

D

E

FOR LPC SIO DEBUG PORT FOR LPC DEBUG PORT

JP54

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

+5VS

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ0# PCI_RST#

CLK_PCI_DB SERIRQ

+3VS

CLK_14M_SIO <16>

LPC_DRQ0# <21>

SERIRQ <22,32,40>

A@

12

R534 10K_0402_5%

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20

ACES_85201-2005

DBCONN@

CIR

RCIRRX<32> CIR_DET#<32>

3 3

Lid Switch

+3VALW

JP51

1

5

1

RCIRRX CIR_DET#

5

2

6

2

6

3

4

ACES_85201-0405

15WCONN@

Change JP51 from 18 pin to 4 pin 11/09 Andy

150u ESR 0.9 ohm Package(L*W*H)7.3*4.3*2.9 Rating 6.3V

+USB_VCCC

1

+

C564

@

150U_D_6.3VM

2

USB20_N0<22> USB20_P0<22>

USB20_N5<22> USB20_P5<22>

USB20_N11<22> USB20_P11<22>

W=80mils

1

C563

C563 470P_0402_50V7K

470P_0402_50V7K

2

+USB_VCCC

USB20_N0 USB20_P0

USB20_N5 USB20_P5

USB20_N11 USB20_P11

1

C768

C768 10U_0805_10V4Z

10U_0805_10V4Z

2

USB IO Conn.

JP52

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

ACES_85201-20051

11/29 change this symbol's footprint as ADT7421ARMZ-REEL_MSOP8

+5VALW

copy LM75CIMMX-3_MSOP8

C565

+VCC_LID

1

2

+3VALW

4 4

1 2

R536 0_0402_5%R536 0_0402_5%

0.1U_0402_16V4Z

R537 100K_0402_5%R537 100K_0402_5%

1 2

2

VDD

3

OUTPUT

GND

U25

1

A3212ELHLT-T_SOT23W-3

2

C567

C567 10P_0402_50V8J

10P_0402_50V8J

1

LID_SW# <32>

4.7U_0805_10V4Z

USB2_ON#<32>

C566

1

2

footprint

1 2 3 4

U26

GND IN IN EN#

G545A2P8U MSOP 8P

OUT OUT

NC OC

+USB_VCCC

8 7 6 5

+3VALW

R468

R468 10K_0402_5%

10K_0402_5%

1 2

1

C568

0.1U_0402_16V4Z

2

@

R691 0_0402_5%R691 0_0402_5%

12

USB_OC#04 <22> USB_OC#511 <22>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/18 2008/8/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Power OK/Lid/Front,IO,DB Conn

JHXXX M/B LA-4241P Schematic

35 49Wednesday, May 28, 2008

of

E

of

0.4

5

HD Audio Codec

L34

D D

+VDDA

MIC2_L<38> MIC2_R<38>

C C

MIC1_L<37> MIC1_R<37>

EAPD<37>

B B

L34

0_0603_5%

10U_0805_10V4Z

1 2

R715 1K_0402_5%R715 1K_0402_5%

1 2

R716 1K_0402_5%R716 1K_0402_5%

1 2

R717 1K_0402_5%R717 1K_0402_5%

1 2

R718 1K_0402_5%R718 1K_0402_5%

R547

R547 10_0402_5%

10_0402_5%

@

1 2 1

C598

C598 15P_0402_50V8J

15P_0402_50V8J

2

@

0.1U_0402_16V4Z

1

C574

C573

2

0.1U_0402_16V4Z

MIC2_R_L

C589 2.2U_0603_6.3V6KC589 2.2U_0603_6.3V6K

MIC2_R_R

C585 2.2U_0603_6.3V6KC585 2.2U_0603_6.3V6K

2/01 Let them floating

MIC1_R_L

C591 2.2U_0603_6.3V6KC591 2.2U_0603_6.3V6K

MIC1_R_R

C592 2.2U_0603_6.3V6KC592 2.2U_0603_6.3V6K

C594 100P_0402_50V8J

1 2

@

HDA_RST_AUDIO#<21> HDA_SYNC_AUDIO<21> HDA_SDOUT_AUDIO<21>

SPDIFO<17>

SPDIFO

1

C575

2

MONO_IN

SENSE_A SENSE_B

R546 0_0402_5%PM@R546 0_0402_5%PM@

1

C577

@

100P_0402_50V8J

2

MIC2_C_L MIC2_C_R

MIC1_C_L MIC1_C_R

12

DGND

4

+AVDD_AC97

40mil

U27

AVDD125AVDD2

14

NC

15

NC

16

MIC2_L

17

MIC2_R

23

LINE1_L

24

LINE1_R

18

CD_L

20

CD_R

19

CD_GND

21

MIC1_L

22

MIC1_R

12

PCBEEP

11

RESET#

10

SYNC

5

SDATA_OUT

2

GPIO0

3

GPIO3

13

SENSE A

34

SENSE B

47

EAPD

48

SPDIFO

4

DVSS1

7

DVSS2

ALC268-GR_LQFP48

38

+3VS_DVDD

1

DVDD

LINE_OUT_L

LINE_OUT_R

HP_OUT_L

HP_OUT_R

DMIC_CLK

BIT_CLK

SDATA_IN

MONO_OUT

LINE1_VREFO

GPIO1

MIC1_VREFO_L

MIC1_VREFO_R

MIC2_VREFO

VREF

JDREF

AVSS1 AVSS2

10mil

+1.5VS_DVDD

10mil

9

DVDD_IO

35 36 39 41 45

NC

46 43

NC

44

NC

6

8 37 29 31 28 32 30 27 40 33

NC

26 42

0.1U_0402_16V4Z

AMP_LEFT AMP_RIGHT AMP_LEFT_HP AMP_RIGHT_HP

HDA_BITCLK_AUDIO

SDIN0

10mil 10mil 10mil

ACZ_VREF ACZ_JDREF

20K_0402_1%

AGND

3

1

2

1

2

R548

C571

C570

@

4.7U_0805_10V4Z

2

1

C580

C581

@

4.7U_0805_10V4Z

2

1 2

R545 33_0402_5%R545 33_0402_5%

+MIC1_VREFO_L +MIC1_VREFO_R +MIC2_VREFO

12

L33

1 2

FBMA-L11-160808-800LMT_0603

10/03 add +1.5VS

R539 0_0603_5%PM@R539 0_0603_5%PM@ L35

L35

1 2

FBMA-L11-160808-800LMT_0603

GM@

AMP_LEFT <37> AMP_RIGHT <37> AMP_LEFT_HP <37> AMP_RIGHT_HP <37>

HDA_BITCLK_AUDIO <21>

HDA_SDIN0 <21>

10mil

1

C596

C596 10U_0805_10V4Z

10U_0805_10V4Z

2

+3VS

+3VS +1.5VS

1

C597

C597 100P_0402_50V8J

100P_0402_50V8J

2

EC Beep

R804

R541

BEEP#<32>

SB_SPKR<22>

1 2

10K_0402_5%

R543

1 2

10K_0402_5%

PCI Beep

R544

10K_0402_5%

Sense Pin Impedance Codec Signals

39.2K

SENSE A / B

SENSE B

20K 10K

5.1K

39.2K 20K 10K

5.1K

R804

1 2

0_0402_5%

12

D28

2 1

PORT-A (PIN 39, 41) PORT-B (PIN 21, 22) PORT-C (PIN 23, 24) PORT-D (PIN 35, 36) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17) PORT-G (PIN 43, 44) PORT-H (PIN 45, 46)

1

+VDDA

12

R538

@

10K_0402_5%

C572 0.1U_0402_16V4ZC572 0.1U_0402_16V4Z

1 2

12

R540

R540 0_0402_5%

0_0402_5%

1 2

C582 0.1U_0402_16V4ZC582 0.1U_0402_16V4Z

1

C

2

B

E

R542

Q22

@

2SC2411K_SOT23

3

1 2

2.4K_0402_5%

Need Update Footprint

@

CH751H-40PT_SOD323-2

9/19 Realtek suggest Add bypass schematic.

Funnction HP MIC LINE IN LINE OUT HP MIC LINE IN LINE OUT

MONO_INMONO_IN_1

@R542

@

SENSE FOR Ext. Mic.

MIC_SENSE<37>

1 2

R550 20K_0402_1%R550 20K_0402_1%

SENSE_A

SENSE FOR Solo Int. Mic.

1 2

A A

R551 20K_0402_1%R551 20K_0402_1%

SENSE_B

Moat Bridge

SENSE FOR HP

SENSE_A

HP_SENSE<37>

R554 39.2K_0402_1%R554 39.2K_0402_1%

12

5

1 2

R555 0_0805_5%R555 0_0805_5%

1 2

R556 0_0805_5%R556 0_0805_5%

4

HDA_BITCLK_AUDIO

R549

R549 10_0402_5%

10_0402_5%

@

1 2

1

C599

C599 10P_0402_50V8J

10P_0402_50V8J

2

@

Regulator for CODEC

L36

+5VS

L36

0_0603_5%

60mil

10U_0805_10V4Z

C600

@

+5VS_VDDA

1

2

1

C601

2

0.1U_0402_16V4Z

10/2 change circuit

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/18

3

Compal Secret Data

Deciphered Date

2008/8/18

2

J9

@J9

@

1 2

PAD-OPEN 3x3m

U28

1

IN

OUT

2

GND

3

SHDN

BYP

G9191-475T1U_SOT23-5

0.01U_0402_16V7K

(Max output = 300 mA)

5

4

C603

1

2

40mil

C602

4.7U_0805_10V4Z

@

+VDDA

4.75V

U8 change footprint

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

<Title>

HD Audio Codec ALC268

JHXXX M/B LA-4241P Schematic

Wednesday, May 28, 2008

1

36 49

of

0.4

A

hexainf@hotmail.com

APA2057 SPK/HP Amplifier

1 1

fo=1/(2*3.14*R*C)=106Hz R=1.5K / C= 1uF

AMP_RIGHT<36> AMP_LEFT<36>

AMP_RIGHT_HP<36> AMP_LEFT_HP<36>

1 2

R569 0_0402_5%R569 0_0402_5%

9/5 If implement AMP BEEP, Swap C641 and R524.

2 2

R524 change from 0 Ohm to 47K

C609 1U_0603_10V4ZC609 1U_0603_10V4Z C608 1U_0603_10V4ZC608 1U_0603_10V4Z

C612 4.7U_0805_10V4ZC612 4.7U_0805_10V4Z C613 4.7U_0805_10V4ZC613 4.7U_0805_10V4Z

C614 0.47U_0603_16V4ZC614 0.47U_0603_16V4Z

1 2 1 2

1 2

R560 1.5K_0402_1%@R560 1.5K_0402_1%@

1 2

R562 1.5K_0402_1%@R562 1.5K_0402_1%@

1 2

R563 100K_0402_5%R563 100K_0402_5% R564 100K_0402_5%@R564 100K_0402_5%@

+5VS

AMP_RHPIN AMP_LHPIN AMP_SD#

1 2 1 2

1 2

R565 39K_0402_5%R565 39K_0402_5%

1 2

R566 39K_0402_5%R566 39K_0402_5%

1 2

R567 0_0402_5%R567 0_0402_5%

1 2

C617 1U_0603_10V6KC617 1U_0603_10V6K C618 2.2U_0603_6.3V6KC618 2.2U_0603_6.3V6K C620 0.1U_0402_16V4ZC620 0.1U_0402_16V4Z

IN_A Gain = 10dB (Internal Speaker) IN_H Gain = 0dB (Headphone)

W=40mil

C604

12

B

10/2 U6 APA2057A P/N:SA00001QD00

+5VALW

1

C605

680P_0402_50V7K

AMPR AMPL AMP_EN# HP_EN INR_H INL_H

AMP_BEEP AMP_CP+

AMP_CPAMP_BIAS

1

C606

2

10U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z U29

U29

3

INR_A

5

INL_A

27

/AMP EN

24

HP EN

4

INR_H

6

INL_H

26

/SD

28

BEEP

12

CP+

14

CP-

25

BIAS

APA2057A_TSSOP28

11/28 Modified to X5R 11/28 Change to SE080105K80

+3VALW

11

CVDD

19

HVDD

20

10

PVDD

ROUT+

1

VDD

ROUTLOUT+

LOUT-

HP_R

HP_L

CVSS

GND PGND PGND CGND

GND

VSS

2

C607

C607 1U_0603_10V4Z

1U_0603_10V4Z

1

22 21

8 9

17 18

15 16 2

23 7 13 29

SPKR+ SPKR-

SPKL+ SPKL-

HP_R HP_L

CVSS

C

12

C619

C619 1U_0603_10V6K

1U_0603_10V6K

D

+MIC1_VREFO_R

+MIC1_VREFO_L

12

1

2

12

R558

2.2K_0402_5%

L47

KC FBM-L11-160808-121LMT 0603

L48

KC FBM-L11-160808-121LMT 0603

1

C611

<EMI>

220P_0402_50V7K

2

10mil 10mil

R557

2.2K_0402_5%

MIC_SENSE<36>

MIC1_R<36> MIC1_L<36>

MIC_SENSE

MIC1_R MIC1_L

220P_0402_50V7K

<EMI>

C610

Trace width/spacing/other=8/6/50

R570

@

12

HP_SENSE

HP_R HP_L

12

R568

@

0_0402_5%

10P_0402_50V8J

C615

<EMI>

KC FBM-L11-160808-121LMT 0603

KC FBM-L11-160808-121LMT 0603 KC FBM-L11-160808-121LMT 0603

KC FBM-L11-160808-121LMT 0603

1

C616

<EMI>

2

10P_0402_50V8J

L49 L50

HP_SENSE<36>

0_0402_5%

Trace width/spacing=15/9

1 2 1 2

10mil

1 2 1 2

<EMI>L47

<EMI> <EMI>L48

<EMI>

<EMI>L49

<EMI> <EMI>L50

<EMI>

MIC1_R_1 MIC1_L_1

2

@

D29

D29 PSOT05C-LF-T7 SOT-23-3

PSOT05C-LF-T7 SOT-23-3

<EMI>

HPR HPL

2

@

D30

D30 PSOT05C-LF-T7 SOT-23-3

PSOT05C-LF-T7 SOT-23-3

<EMI>

E

MICROPHONE IN JACK

JP63

5 4 3

6 7 2

3

1

FOX_JA6333L-B3S0-7F~N

CONN@

RED

10 9 8

HEADPHONE OUT JACK

JP64

5 4 3

6 7 2

3

1

FOX_JA6333L-B3S0-7F~N

CONN@

GREEN

10 9 8

Add below circuit for APA2057 gain tunning use

+3VALW

3 3

EAPD<36>

EAPD

12

R577 0_0402_5%R577 0_0402_5%

SSM3K7002FU_SC70-3

R573

10K_0402_5%

2

G

Q24

C621

13

D

1 2

13

D

S

D

2

G

S

Q23

Q23 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

C621

0.01U_0402_16V7K

Gain= 10dB

Gain (dB) Low (V) High (V) Recommended (V) 10 11

4 4

12 13

3.45

3.56

3.68

3.80

3.51

3.62

3.73

3.85

A

3.48

3.59

3.70

3.82 +5VALW assume equal 5.1V

10 dB ---> 5.1 x 220 / 320 = 3.5

B

+5VALW

12

R571

R571 10K_0402_1%

10K_0402_1%

AMP_SD# HP_EN

R572 10K_0402_5%R572 10K_0402_5%

1 2

12

1

R574

R574 22K_0402_1%

22K_0402_1%

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

1

C622

0.1U_0402_16V4Z

2

Compal Secret Data

Deciphered Date

SPKL-

R580 0_0603_5%<EMI>R580 0_0603_5%<EMI>

1 2

SPKL+ SPK_L1+

R578 0_0603_5%<EMI>R578 0_0603_5%<EMI>

SPKRSPKR+

20mil

1 2

R581 0_0603_5%<EMI>R581 0_0603_5%<EMI>

1 2

R579 0_0603_5%<EMI>R579 0_0603_5%<EMI>

1 2

Speaker Conn.

2008/8/182007/08/18

D

PSOT24C_SOT23

Title

Size Document Number Rev

Custom

Date: Sheet

1/8 change JSPK1 following JAW91

SPK_L1SPK_R1-

SPK_R1+

2

D31

@

<EMI>

1

Compal Electronics, Inc.

JHXXX M/B LA-4241P Schematic

3

D32

@

PSOT24C_SOT23

<EMI>

1

AMP/VR/Audio Jack

E

JSPK1

4

3

2

1

ACES_88266-04001

CONN@

37 49Wednesday, May 28, 2008

of

6

G2

5

G1

0.4

SINGLE INT MIC/DUAL INT MIC

+3VS

12

R723

R723 10K_0402_5%

10K_0402_5%

@

+MIC2_VREFO

+MIC2_VREFO +MIC2_VREF_R

1 2

R725 0_0402_5%R725 0_0402_5%

+MIC2_VREF_R

0.1U_0402_16V4Z

JMIC1

1 2

GND GND

ACES_88231-02001

DUALCONN@

JMIC2

1 2

GND GND

ACES_88231-02001

C723

@

RLS4148_LL34-2

1 2

3 4

RLS4148_LL34-2

1 2

3 4

1

2

0_0402_5%@

0_0402_5%@ D70

R582

R586

D71

DUAL@D70

DUAL@

0_0402_5%SINGLE@

12

R724

R724 27K_0402_5%

27K_0402_5%

@

12

DUAL@D71

DUAL@

12

R583

DUAL@R583

DUAL@

1 2

2.2K_0402_5%

12

C623 220P_0402_50V7K

DUAL@<EMI>

R587

1 2

2.2K_0402_5%

12

C625 220P_0402_50V7K

<EMI>

12

R585

R585 0_0402_5%

0_0402_5%

SINGLE@

D34

@

3

1

2

PSOT05C-LF-T7 SOT-23-3

MIC2_R_OUT

2/01 Add D52 for INT MIC use( PN:SCD0T05CA20 )

D52 is a modified symbol

1 2

R707 0_0402_5%

<EMI>

1 2

R708 0_0402_5%

MIC2_R

MIC2_L <36>

MIC2_R <36>

MIC2_LMIC2_L_OUT

<EMI>

12/21 Place these parts close to CODEC (U7)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/18 2008/8/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

MIC

JHXXX M/B LA-4241P Schematic

of

38 49Wednesday, May 28, 2008

0.4

A

hexainf@hotmail.com

1 1

B

C

D

E

11/27 Add screw for layout request

H2 HOLEAH2HOLEA

1

H23

H23 HOLEA

HOLEA

1

H29

H29 HOLEA

HOLEA

1

H3 HOLEAH3HOLEA

1

H26

H26 HOLEA

HOLEA

1

H30

H30 HOLEA

HOLEA

1

H1 HOLEAH1HOLEA

H_3P0

H_3P7

2 2

H_4P2

1

H22

H22 HOLEA

HOLEA

1

H28

H28 HOLEA

HOLEA

1

H4 HOLEAH4HOLEA

1

H31

H31 HOLEA

HOLEA

1

H5 HOLEAH5HOLEA

1

H6 HOLEAH6HOLEA

1

H7 HOLEAH7HOLEA

1

H8 HOLEAH8HOLEA

1

H10

H10 HOLEA

HOLEA

1

H11

H11 HOLEA

HOLEA

1

H12

H12 HOLEA

HOLEA

1

H13

H13 HOLEA

HOLEA

1

H14

H14 HOLEA

HOLEA

1

2/22 change these from H_3P7 to H_3P8

H24

H9 HOLEAH9HOLEA

1

HOLEA

1

HOLEA

1

H25

H25 HOLEA

HOLEA

1

H24

H21

2/22 change these from H_3P2 to H_3P3

H15

3 3

H15 HOLEA

HOLEA

1

H16

H16 HOLEA

HOLEA

1

H17

H17 HOLEA

HOLEA

1

H18

H18 HOLEA

HOLEA

1

H27

H27 HOLEA

HOLEA

1

H19

H19 HOLEA

HOLEA

1

H32

H32 HOLEA

HOLEA

1

H20

H20 HOLEA

HOLEA

1

FD6@FD6

FD2@FD2

FD1@FD1

1

FD3@FD3

@

1

FD5@FD5

FD4@FD4

@

1

M1

M2

HOLEA

1

H_5P0X3P2N

4 4

H_5P2X3P2N

M3

M3 HOLEA

HOLEA

1

A

H_5P0X3P2N

M4

M4 HOLEA

HOLEA

1

H_3P1N

M5

M5 HOLEA

HOLEA

1

H_5P0X3P2N

11/27 Add screw for layout request

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/18 2008/8/18

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Screw

JHXXX M/B LA-4241P Schematic

39 49Friday, April 11, 2008

E

of

0.4

MDC Conn.

JMDC1

1

HDA_SDOUT_MDC<21> HDA_SYNC_MDC<21> HDA_RST_MDC#<21>

HDA_SDIN1<21>

Please add these caps close to JMDC1 as close as possible,

HDA_SDOUT_MDC HDA_SYNC_MDC

SDIN1_MDC HDA_RST_MDC# HDA_BITCLK_MDC

R593

HDA_SDIN1 SDIN1_MDC

HDA_SDOUT_MDC HDA_SYNC_MDC HDA_RST_MDC# HDA_SDIN1

R593

1 2

33_0402_5%

C752 100P_0402_50V8J@C752 100P_0402_50V8J@ C753 100P_0402_50V8J@C753 100P_0402_50V8J@ C754 100P_0402_50V8J@C754 100P_0402_50V8J@ C756 100P_0402_50V8J@C756 100P_0402_50V8J@

TPM X76 Information

X76 P/N X7611630L07 X7611630L08

Vendor Infineon Winbond

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

Connector for MDC Rev1.5

ACES_88018-124G

CONN@

1 2 1 2 1 2 1 2

IAC_BITCLK

GND13GND14GND15GND16GND17GND

18

Location C717,C718,R698,R702,R703,U32,X3 C724,U32

RES0 RES1

3.3V GND3 GND4

20mil

2 4 6 8 10 12

+VCC_MDC +3V_MDC

1

C629

C629 22P_0402_50V8J

22P_0402_50V8J

2

@

Bom Structure

IN_TPM@ WB_TPM@

R710 0_0402_5%

1 2

R695 0_0402_5%

1 2

R697 0_0402_5%R697 0_0402_5%

1 2

+VCC_MDC +3V_MDC

C746

0.1U_0402_16V4Z

@

PM@

+3VS

GM@

+1.5VS +3VS

HDA_BITCLK_MDC <21>

1

C745

0.1U_0402_16V4Z

2

@

Camera Conn

USB20_N2<22> USB20_P2<22>

USB20_N2 USB20_P2

Finger Print board

USB20_P1<22> USB20_N1<22>

+3VS

1 2 1 2

4.7U_0805_10V4Z

R590 0_0603_5%R590 0_0603_5% R591 0_0603_5%@R591 0_0603_5%@

3

2

+5VS

+5VALW

R594 0_0402_5%R594 0_0402_5% R595 0_0402_5%R595 0_0402_5%

@

WCM2012F2SF-121T04_0805

4

1

L42

05/26 Change D36 from SC300000X00 to SC300000K00

1/05 Modified D3 to SCA00000A00

12 12

1

C627

2

3

2

For EMI

0208 Remove D3 , Add D55 (SC300000G00)

EMI Request

D36

FP@D36

FP@

USB20_P1 USB20_N1

3

4

PJLCR05 SOT143

C630

4.7U_0805_10V4Z

I/O

VCC

@

I/O

GND

1

2

1

C631

0.1U_0402_16V4Z

1

C628

0.1U_0402_16V4Z

2

USB20_R_N2 USB20_R_P2

+5V_CAMERA

JP3

1

2

3

4

5

6

GND1

7

GND2

ACES_88266-05001

CAMCONN@

2/1 change JP4 pin 6 to +5VS for LTT FP use

@

WCM2012F2SF-121T04_0805

4

1

L40

R640 0_0402_5%R640 0_0402_5% R641

R641

4

1

1 2 1 2

0_0402_5%

3

2

USB20_R_P1 USB20_R_N1

+5VS

3

2

JP4

1

2

3

4

5

6

7

GND

8

GND

ACES_85201-06051

FPCONN@

LED

05/28 Change R660,R596,R597,R598,R599,R600 to 820ohm for 15W@ 05/28 Add R660,R596,R597,R598,R599,R600 to 2kohm for 14W@

R600

R660

2K_0402_5%

14W@

+5VS

+5VALW

+5VS

R596

2K_0402_5%

14W@

R660

15W@R660

15W@

820_0402_5%

1 2

R596

15W@R596

15W@

820_0402_5%

1 2

R597

15W@R597

15W@

820_0402_5%

1 2

R598

15W@R598

15W@

1 2

820_0402_5%

R599

15W@R599

15W@

820_0402_5%

1 2

R600

15W@R600

15W@

1 2

820_0402_5%

R597

2K_0402_5%

14W@

2 1

HT-191NB_BLUE_0603

2 1

HT-191NB_BLUE_0603

HT-191UD_AMBER_0603

2 1

HT-191NB_BLUE_0603

HT-191NB_BLUE_0603 HT-191UD_AMBER_0603

HT-191UD_AMBER_0603

2 1

HT-191NB_BLUE_0603

LED4

LED1

LED6

LED7

LED5

LED3

R598

2K_0402_5%

14W@

Amber Blue

R599

2K_0402_5%

14W@

SATA_LED# <21>

PWR_LED# <32,33>

CHARGE_LED0# <32>

CHARGE_LED1# <32>

WLAN_LED# <30>

BT_LED# <34>

12/7 Modified LED footprint to LED_HT-297UD-CB_4P

12/15 Modified to correct LED symbol!

R600

2K_0402_5%

14W@

+3VS

+3VALW

TPM 1.2

LPC_AD0<21,32,35> LPC_AD1<21,32,35> LPC_AD2<21,32,35> LPC_AD3<21,32,35>

CLK_PCI_TPM<16> LPC_FRAME#<21,32,35> PLT_RST_BUF#<8,17,20,26,28,30> SERIRQ<22,32,35> PM_CLKRUN#<22,32>

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

R698 4.7K_0402_5%

IN_TPM@

CLK_PCI_TPM

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

CLK_PCI_TPM LPC_FRAME# PLT_RST_BUF# SERIRQ PM_CLKRUN#

R699

R699 10_0402_5%@

10_0402_5%@

1 2 2

C716

15P_0402_50V8J@

1

2007/08/18 2008/8/18

26 23 20 17

21 22 16 27 15

7

Compal Secret Data

+3VS

19

10

U32

LAD0 LAD1 LAD2 LAD3

LCLK LFRAME# LRESET# SERIRQ CLKRUN# PP

U32

S IC WPCT200AA0WG TSSOP 28P TPM

WB_TPM@

Deciphered Date

5

VSB

VDD24VDD

VDD

TESTB1/BADD

TPM

TPM SLB 9635 TT 1.1

SLB 9635 TT 1.1

GND4GND11GND18GND

25

LPCPD#

SLB-9635-TT-1.2_TSSOP28

IN_TPM@

0.1U_0402_16V4Z

28 9 8

TEST1

14

XTALO

13

XTALI

2

GPIO2

6

GPIO

1

NC

3

NC

12

NC

C715

TPM@

SUS_STAT# TPM_TEST1 TPM_XTALO

TPM_XTALI

Let C724 close pin 10Let C715 close pin 24

1

C724

WB_TPM@

1U_0402_6.3V4Z

2

0 = 02Eh 1 = 04Eh

*

R703 0_0402_5%

Copy IFT

+3VS

12

R700

Base I/O Address

SUS_STAT# <22>

1 2

IN_TPM@

TPM_XTALI

12

10M_0402_5%

R702

IN_TPM@

R702

IN_TPM@

TPM_XTALO

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

MDC/LED/Camera/FP

JHXXX M/B LA-4241P Schematic

R700

4.7K_0402_5%

TPM@

12

R701

4.7K_0402_5%

@

C717

IN_TPM@C717

IN_TPM@

15P_0402_50V8J

X3

1 4

32.768KHZ_12.5P_1TJS125BJ2A251

IN_TPM@

C718 15P_0402_50V8J

15P_0402_50V8J

IN OUT

NC NC

IN_TPM@C718

IN_TPM@

2 3

of

40 49Tuesday, June 03, 2008

0.4

A

hexainf@hotmail.com

B

C

D

E

+1.5V TO +1.5VS

+5VALW TO +5VS

+5VALW

U30

8

S

2

G

Q28

10K_0402_5%

D

7

D

6

D

5

D

AO4468_SO8

5VS_GATE

13

D

S

SYSON

R614

S S G

SYSON#

12

1 1

+VSB

R604

R604 33K_0402_5%

33K_0402_5%

SUSP

SSM3K7002FU_SC70-3

2 2

SYSON<31,32,46>

1 2 3 4

2

G

+5VALW

+5VS

1

C632

C632 10U_0805_10V4Z

10U_0805_10V4Z

2

@

1

C638

0.1U_0603_25V7K

2

R613

R613 100K_0402_5%

100K_0402_5%

1 2

13

D

Q36

SSM3K7002FU_SC70-3

S

1

C633

2

1U_0603_10V4Z

R601

R601 470_0603_5%

470_0603_5%

@

1 2 61

Q51A

@

SUSP

2

2N7002DW-T/R7_SOT363-6

+VSB

3/14 Change R16 from 100K to 10K

1 2

R605

R605 47K_0402_5%

47K_0402_5%

SUSP

SSM3K7002FU_SC70-3

+3VALW TO +3VS

+3VALW +3VS

U31

8

S

D

7

S

D

6

S

D

5

G

D

AO4468_SO8

13

D

2

G

Q29

S

SUSP#<17,31,32,46,47>

10K_0402_5%

R622

12

1 2 3 4

2

G

+5VALW

1

C634

C634 10U_0805_10V4Z

10U_0805_10V4Z

2

@

1

C639

0.1U_0603_25V7K

2

R621

R621 100K_0402_5%

100K_0402_5%

1 2

SUSP

13

D

Q43

SSM3K7002FU_SC70-3

S

1

C635

2

1U_0603_10V4Z

1

C647

C647 100P_0402_50V8J

100P_0402_50V8J

2

R602

R602 470_0603_5%

470_0603_5%

@

1 2 3

Q51B

@

SUSP

5

2N7002DW-T/R7_SOT363-6

4

SUSP <26,47>

+VSB

SSM3K7002FU_SC70-3

+1.5V

1 2

R612

R612 47K_0402_5%

47K_0402_5%

@

SUSP

J8

J8 PAD-OPEN 3x3m

PAD-OPEN 3x3m

1 2

U34

8

D

7

D

6

D

5

D

AO4468_SO8

@

2

G

Q35

@

+1.5VS

1

S

2

S

3

S

4

G

13

D

S

1

C643

C643 10U_0805_10V4Z

10U_0805_10V4Z

2

@

1

C646

0.1U_0603_25V7K

2

@

1

C644

2

1U_0603_10V4Z

3 3

+1.5VS +1.05VS +1.8V+0.9VS

R617

R615

R615 470_0603_5%

470_0603_5%

@

1 2 3

Q47B

@

SUSP SUSP SUSP SYSON#

5

2N7002DW-T/R7_SOT363-6

4

4 4

A

R617 470_0603_5%

470_0603_5%

@

1 2 61

Q47A

@

2

2N7002DW-T/R7_SOT363-6

B

R618

R618 470_0603_5%

470_0603_5%

@

1 2 3

Q48B

@

5

2N7002DW-T/R7_SOT363-6

4

R619

R619 470_0603_5%

470_0603_5%

@

1 2 61

Q48A

@

2

2N7002DW-T/R7_SOT363-6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/18 2008/8/18

C

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

DC Interface

JHXXX M/B LA-4241P Schematic

41 49Wednesday, May 28, 2008

of

E

of

0.4

A

B

C

D

DC301001Y00

12

PC7

0.1U_0402_16V7K

2

IN

ADPIN

12

PC1

PR2

PR2 10K_0402_1% @

10K_0402_1% @

1 2

3 2

PR10

PR10 10K_0402_1%

10K_0402_1%

12

0.01U_0402_50V7K

PR3

PR3 1M_0402_1%

1M_0402_1%

1 2

VS

8

P

+

O

-

G

PU2A

PU2A LM393DG_SO8

LM393DG_SO8

4

12

PR15

PR15 200_0805_5%

200_0805_5%

PC9

1U_0805_25V4Z

SINGA_2DW-0268-B16

@

1

2

3

4

PJP1

1 1

VIN

12

PR4

PR7

84.5K_0402_1%

22K_0402_1%

1 2

2 2

12

3.3V

PR13

560_0603_5%

1 2

+CHGRTC

3 3

PR14

PR14 560_0603_5%

560_0603_5%

1 2

12

PR8

PC6

1000P_0603_50V7K

RTCVREF

12

PC8

4.7U_0805_10V4Z

20K_0402_1%

G920AT24U_SOT89-3

G920AT24U_SOT89-3 PU3

PU3

3

OUT

GND

1

PL1

HCB4532KF-800T90_1812

1 2

12

PC2

0.01U_0402_50V7K

PC5

0.01U_0402_25V7K@

1 2

1

RTCVREF

3.3V

BATT+

RLS4148_LL34-2

CHGRTCP

12

51_ON#<33,35>

12

PC142

2200P_0402_50V7K

VS

12

PD4

PR17

PR17 22K_0402_1%

22K_0402_1%

1 2

PR5

10K_0402_1%

PD2

12

PC3

RLZ4.3B_LL34

12

PR16

100K_0402_1%

VIN

12

PC4

0.022U_0603_50V7K

PR6

PR6 10K_0402_1%

10K_0402_1%

1 2

12

PR9

10K_0402_1%

12

PC10

0.22U_1206_25V7K

TP0610K-T1-E3_SOT23-3

0.022U_0603_50V7K

ACIN <22,32,44>

Vin Detector

High 18.764 17.901 17.063 Low 17.745 16.9 16.03

VIN

PD3

PD3 RLS4148_LL34-2

RLS4148_LL34-2

1 2

12

VS

PR11

PR12

68_1206_5%

13

12

PC11

0.1U_0603_25V7K

PQ1

2

7

PU2B

LM393DG_SO8

8

5

P

+

O

6

-

G

4

PJ1 PAD-OPEN 3x3mPJ1 PAD-OPEN 3x3m

+1.8VP

1 2

(8A,320mils ,Via NO.= 16)

PJ3

PJ2

PJ2 PAD-OPEN 3x3m

PAD-OPEN 3x3m

+5VALWP

1 2

(6A,240mils ,Via NO.= 12)

PJ5

4 4

+3VALWP

PJ5 PAD-OPEN 3x3m

PAD-OPEN 3x3m

1 2

(6A,240mils ,Via NO.=12)

PJ6

PJ6 PAD-OPEN 3x3m

PAD-OPEN 3x3m

+1.5VP +1.5V

1 2

+5VALW

+3VALW

+0.9VSP

(2A,80mils ,Via NO.= 4)

+VSBP +VSB

(0.3A,40mils ,Via NO.= 2)

PJ3 PAD-OPEN 3x3m

PAD-OPEN 3x3m

1 2

PJ7

PJ7 PAD-OPEN 3x3m

PAD-OPEN 3x3m

1 2

(6A,240mils ,Via NO.=12)

A

+1.8V

+0.9VS

PJ14 PAD-OPEN 3x3mPJ14 PAD-OPEN 3x3m

1 2

PJ4 PAD-OPEN 3x3mPJ4 PAD-OPEN 3x3m

+1.05VSP

1 2

(16A,800mils ,Via NO.= 24)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

+1.05VS

Compal Secret Data

2005/10/17 2006/10/17

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

DCIN/DECTOR

42 49Tuesday, June 03, 2008

D

42 49Tuesday, June 03, 2008

of

0.2

A

hexainf@hotmail.com

B

C

D

12

PC12

1000P_0402_50V7K

+VSBP

0.1U_0603_25V7K

BATT++

12

EC_SMB_CK1 <32,34> EC_SMB_DA1 <32,34>

DC040003600

PJP2

1 2 3

1 1

2 2

3 3

4 5 6 7 8

9 G1 G2

SUYIN_200275MR009G180ZR

BATT++

1 2

CNT1

3

CNT2

4

EC_SMCA

5

EC_SMDA

6

TS_A

7

GND

8 9 10 11

12

PR25

100_0402_1%

12

PR30

1K_0402_1%

B+

VL

PR20

1 2

PR26

100_0402_1%

PR33

PR33 22K_0402_1%

22K_0402_1%

1 2

PR19

1 2

100K_0402_5%@

1K_0402_1%

12

PR32

100K_0402_1%

+3VALWP

1 2

PR29

6.49K_0402_1%

12

PC18

PR21

1 2

1K_0402_1%

TP0610K-T1-E3_SOT23-3

0.22U_1206_25V7K

1 2

PR18

@PR18

@

100K_0402_5%

PQ2

2

+3VALWP

13

12

PC19

PJ8

PJ8 PAD-OPEN 3x3m

PAD-OPEN 3x3m

1 2

PC13

1000P_0402_50V7K

BATT_TEMP <32>

12

PC14

0.01U_0402_50V7K

BATT+

PH1 under CPU botten side :

CPU thermal protection at 89 degree C Recovery at 70 degree C

12

PC16

1000P_0402_50V7K

VL

12

PR22

12

10K_0402_1%

PR27

78.7K_0603_1%

1 2

TM_REF1

PH1

12

100K_0603_1%_TH11-4H104FT

12

PC15

LM358ADR_SO8

PC17

1U_0603_6.3V6M

12

0.1U_0603_25V7K

PU4A

3

+

2

-

PR28

PR28 150K_0402_1%

150K_0402_1%

PR31

150K_0402_1%

VS

1 2

8

P

0

G

4

12

PR24

PR24 442K_0603_1%

442K_0603_1%

PD5

1 2

1

1SS355TE-17_SOD323-2

VL

PR23

1 2

150K_0402_1%

MAINPWON <21,45>

PR34

PR35

10K_0402_1%

1 2

0_0402_5%

SPOK<45>

4 4

1 2

A

12

2

G

PC20

0.1U_0402_16V7K

13

D

PQ3

PQ3 SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

Security Classification

2005/10/17 2006/10/17

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2005/10/17 2006/10/17

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

BATTERY CONN. / OTP

43 49Tuesday, June 03, 2008

D

43 49Tuesday, June 03, 2008

of

0.1

A

B

C

D

65W, Iadapter=0~3.42A, Current sense=0.015ohm, PR45=110K, CP=3.175A 90W, Iadapter=0~4.74A, Current Sense=0.015ohm, PR45=54.9K, CP=4.303A

AO4407_SO8

PQ4

PR41

PR41 340K_0402_1%

340K_0402_1%

ACDET

PR42

54.9K_0402_1%

PQ4

4

VIN

1 1

12

PR37

3.3_1210_5%

12

PR43

3.3_1210_5%

12

PD6

RLZ24B_LL34

2 2

12

PC31

PC31 1U_0603_25V6K

1U_0603_25V6K

PC22

0.01U_0603_50V7K

1 2

Icharge=(Vsrset/Vvdac)*(0.1/PR44) Iadapter=(Vacset/Vvdac)*(0.1/PR36)

1 2

PR48

PR48 340K_0402_1%

340K_0402_1%

1 2

OVPSET

8 7

5

Input OVP : 22.3V Input UVP : 17.26V Fsw : 300KHz

VREF VREF

12

PR179

PR179 100K_0402_1%

100K_0402_1%

PC141

ACOFF

1 2

0.1U_0402_16V7K

3 3

12

PR180

PR180 340K_0402_1%

340K_0402_1%

2

G

PR178

12

200K_0402_1%

13

D

PQ31

PQ31 RHU002N06_SOT323-3

RHU002N06_SOT323-3

S

13

D

2

G

S

PQ30

PQ30 RHU002N06_SOT323-3

RHU002N06_SOT323-3

OVP voltage :

LI-3S :13.50V--BATT-OVP=1.5V BATT-OVP=0.111*BATT+

4 4

BATT_OVP<32>

PR63

10K_0402_1%

1 2

12

PC48

@

0.01U_0402_25V7K

7

0

A

1 2

VS

12

8

PU4B

5

P

+

6

-

G

LM358ADR_SO8

4

PR49

54.9K_0402_1%

0.1U_0603_25V7K

ACGOOD#

BATT+

PC47

0.01U_0402_25V7K

1 2

PC43

12

PR59

340K_0402_1%

12

PR62

499K_0402_1%

12

PR64

105K_0402_1%

PR51

PR51 100K_0402_1%

100K_0402_1%

1

2

3 6

36

PC26

1 2

0.01U_0402_25V7K

VREF

CP setting

2

12

ACSET

12

0.01U_0402_25V7K

PQ5

PQ5 AO4407_SO8

AO4407_SO8

4

12

PR39

100K_0402_1%

ACDRV

PR45

110K_0402_1%

1 2

PC35

0.01U_0402_25V7K@

VREF=3.3V

SI2301BDS-T1-E3_SOT23-3

1 3

CHGVADJ<32>

0V 4V

PC49

8 7

1

5

2

0.1U_0402_16V7K

12

PC29

0.1U_0603_25V7K

12

PC42

1U_0603_10V6K

PQ9

Per CellCHGVADJ

4.35V3.3V

B

PC27

1 2

ACP

12

PR47

PR47 100K_0402_1%

100K_0402_1%

VREF

12

BATDRV#

REGN

PR57

1 2

4.3K_0402_5%@

PR36

0.015_2512_1%

4 3

CHGEN#

PU5

1

CHGEN

12

PC30

0.1U_0603_25V7K

@

ACN

2

ACN

3

ACP

4

ACDRV

5

ACDET

ACSET

1 2

0.47U_0603_16V7K

6

ACSET

7

ACOP

PC38

8

OVPSET

9

AGND

10

VREF

11

VDAC

VADJ

12

VADJ

13

ACGOOD

14

BATDRV

BQ24751ARHDR_QFN28_5X5

12

PR56

PR56 0_0402_5%

0_0402_5%

VADJ

12

PR60

PR60 10K_0402_5%@

10K_0402_5%@

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

12

PC140

PC140 1000P_0402_50V7K

1000P_0402_50V7K

@

PVCC

BTST

HIDRV

PH

REGN

LODRV

PGND

LEARN

CELLS

SRP SRN BAT

SRSET

IADAPT

28

27

26

25

24

23

22

21

20

19 18 17

29

TP

16

15

100P_0402_50V8J

100K_0402_1%

ACGOOD#

CHG_PVCC

PR40

2.2_0603_5%

1 2

0_0603_5%

REGN

12

PC36

PC36 1U_0603_10V6K

1U_0603_10V6K

12

1 2

PR54

10_0603_5%

RTCVREF

PR52

B+

2

2200P_0402_50V7K

PC28

0.1U_0805_25V7K

1 2

PR181

PD7

12

RLS4148_LL34-2

PR50

1 2

0_0402_5%

SE_CHG+ SE_CHG-

PC44

0.1U_0603_25V7K

12

PC46

12

Compal Secret Data

PJ9

112

JUMP_43X118@

PC145

1 2

PC32

0.1U_0603_25V7K

PQ8

AO4466_SO8

ACOFF <32>

ADP_I<32>

2

G

Deciphered Date

C

12

578

3 6

578

3 6

ICHG setting

VREF

PR61

100K_0402_1%@

1 2

13

D

PQ11

PQ11 SSM3K7002F_SC59-3@

SSM3K7002F_SC59-3@

S

CHG_B+

241

12

PR55

PR55 100K_0402_1%

100K_0402_1%

1 2

PC23

10U_1206_25V6M

PQ6

PQ6 AO4466_SO8

AO4466_SO8

10UH_SIL1045RA-100PF_4.5A_30%

1 2

12

PR46

4.7_1206_5%

12

PC37

PC37 680P_0603_50V7K

680P_0603_50V7K

CurrentIREF

3A2.968V

ACIN <22,32,42> FSTCHG<32>

2007/05/182006/05/18

1 2

PC24

10U_1206_25V6M

PL2

PR53

49.9K_0402_1%

12

PC45

0.01U_0402_25V7K

@

12

PR38

PC21

0.01U_0402_25V7K

BATDRV#

PR44

0.02_2512_1%

1 2

PC39

0.1U_0402_16V7K

1 2

12

PC40

0.1U_0603_25V7K

12

IREF <32>

Title

Size Document Number Rev

Date: Sheet

PR38 100K_0402_1%

100K_0402_1%

1 2

4 3

12

Compal Electronics, Inc.

CHARGER

578

PC41

0.1U_0603_25V7K

@

VREF

1 2

13

D

2

G

S

D

36

241

PQ7

PQ7 AO4407_SO8

AO4407_SO8

12

PC33

10U_1206_25V6M

PR58

PR58 100K_0402_1%

100K_0402_1%

CHGEN#

PQ10

PQ10 RHU002N06_SOT323-3

RHU002N06_SOT323-3

12

44 49Wednesday, May 28, 2008

BATT+

PC34

10U_1206_25V6M

of

1.0

A

hexainf@hotmail.com

12

ISL6237_B+

B+

PJ10 PAD-OPEN 3x3mPJ10 PAD-OPEN 3x3m

1 2

PC50

4.7U_1206_25V6K

PL3

1 2

12

1 1

+3VALWP

1

+

220U_6.3V_M

PC59

2

2 2

12

PC150

4.7UH_SIL104R-4R7PF_5.7A_30%

PR70

0_0402_5%

1 2

PR74

10K_0402_1%

1 2

@

2200P_0402_50V7K

PC51

2200P_0402_50V7K

PR67

@ PR67

@

PC62

@

12

2.2_1206_5%

680P_0603_50V8J

Rds(on) = 18m ohm(max) ; Rds(on) = 15m ohm(typical)

PZD1

RLZ5.1B_LL34

3.3VALWP Imax=5.59A Ipeak=7.85A

VS

RLZ5.1B_LL34

1 2

PR77

100K_0402_1%

1 2

Iocp=10.133A

3 3

MAINPWON<21,43>

2

1 3

PQ29

PQ29 TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

PD8

1 2

1SS355TE-17_SOD323-2

4 4

1SS355TE-17_SOD323-2

PR85

0_0402_5%

3 6

241

3 6

241

12

B

PQ12

578

AO4466_SO8

578

PQ15

PQ15 AO4712_SO8

AO4712_SO8

PR78

1 2

200K_0402_5%

PC60

0.1U_0603_25V7K

1 2

Rds=18mOHM

PC66

0.22U_0603_25V7K

1 2

12

PC67

0.047U_0603_16V7K

PR65

1 2

0_0603_5%

0.1U_0603_25V7K

PR66

BST3A

12

0_0603_5%

VL

2VREF_ISL6237

1 2

PC65 0.22U_0603_10V7K

PR81

0_0402_5%@

1 2

PR86

@PR86

@

47K_0402_1%

PC68

@

0.047U_0402_16V7K

DH3

LX3

FB3

1 2

12

PC55

1 2

PU6

33

TP

26

UGATE2

24

BOOT2

25

PHASE2

23

LGATE2

30

OUT2

32

REFIN2

1

REF

8

LDOREFIN

20

NC

4

EN_LDO

14

EN1

27

EN2

PR82

0_0402_5%

1 2

2VREF_ISL6237

PC139

1U_0603_10V6K

C

D

ISL6237_B+

12

PC54

PC53

4.7U_1206_25V6K

PL4

4.7UH_SIL104R-4R7PF_5.7A_30%

2.2_1206_5%

680P_0603_50V8J

12

2200P_0402_50V7K

12

PR71

61.9K_0402_1%

@ PR71

@

1 2

PR72

1 2

0_0402_5%

+5VALWP

1

+

2

PC64

220U_6.3V_M

PQ14

578

3 6

578

3 6

241

PC52

12

PR69

@ PR69

@

12

PC63

@

Rds=18mOHM

PQ13

AO4466_SO8

PC61

AO4466_SO8

12

1 2

AO4712_SO8

VL

1 2

PC56

3

6

VIN

VCC

1U_0603_10V6K

7

LDO

PVCC

UGATE1

BOOT1

PHASE1

LGATE1

PGND

OUT1

FB1

PC57

12

4.7U_0805_6.3V6K

19 15

BST5A

17

16

18

22

10

11

PC58

1U_0603_10V6K

1 2

DH5

PR68

0_0603_5%

0.1U_0603_25V7K

LX5

DL5DL3

FB5

VFB=0.7V

9

BYP

29

SKIP

28

POK2

13

POK1

12

ILIM1

31

ILIM2

TON

2

12

GND

ISL6237IRZ-T_QFN32_5X5

21

PR84

PR84 0_0402_5%

0_0402_5%

NC

5

12

PR75 0_0402_5%@PR75 0_0402_5%@

PR76 0_0402_5%

1 2

ILM1

ILIM2

12

PR79

330K_0402_1%

PR80

330K_0402_1%

12

VL

SPOK <43>

Rds(on) = 18m ohm(max) ; Rds(on) = 15m ohm(typical)

5VALWP Imax=4.9A Ipeak=7A Iocp=10.146A

2VREF_ISL6237

Security Classification

2005/10/17 2006/10/17

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2005/10/17 2006/10/17

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

+5VALWP/+3VALWP

45 49Wednesday, May 28, 2008

D

45 49Wednesday, May 28, 2008

of

0.1

5

D D

PJ11

2

B+

JUMP_43X118

PR97

1 2

8.2K_0402_1%

C C

PC77

0.022U_0402_16V7K

1 2

+1.5VP

PC84

220U_6.3V_M

1.5VP

B B

Imax=2.89A Ipeak=4.13A Iocp=8.2A

1 2

1.8UH_SIL104R-1R8PF_9.5A_30%

1

+

DCR 10 mOHM

2

SUSP#<17,31,32,41,47>

SYSON<31,32,41>

112

PL5

ISL6228_B+

12

PC147

PC147 2200P_0402_50V7K

2200P_0402_50V7K

1000P_0402_50V7K

PC75

PR103

8.2K_0402_1%

1 2

Rds=18mOHM

0_0402_5%

1 2

PR177

PR110

0_0402_5%@

12

1 2

PR96

34K_0402_1%

ISL6228_B+

12

PC78

4.7U_1206_25V6K

PC146

12

1000P_0402_50V7K@

AO4712_SO8

12

3.3K_0402_5%

3.3K_0402_5% PR95

PR95

12

PC79

4.7U_1206_25V6K

PQ18

12

PC90

0.01U_0402_25V7K

@

241

3 6

241

1.5V_EN

22K_0402_1%

578

3 6

578

PR93

PQ16

PQ16 AO4466_SO8

AO4466_SO8

DH_1.5-2

1 2

0_0603_5%

PC85

0.1U_0402_16V7K

PR104

LX_1.5

12

1 2

+5VALWP

FB_1.5

VO_1.5

OCSET_1.5

1.5V_EN

12

PR107

2.2_0603_5%

DL_1.5

4

PC69

PR87

2.2_0603_1%

12

5

VIN1

PU7

12

4

VCC1

1U_0402_6.3V6K

+5VALWP +5VALWP

PC71

0.1U_0603_25V7K

PR89

ISL6228_B+ ISL6228_B+

PC73

1000P_0402_50V7K

PR94

1 2

@

0_0402_5%

7

PGOOD1

8

FB1

9

VO1

10

OCSET1

11

EN1

12

PHASE1

DH_1.5-1

13

UGATE1

BST_1.5

14

BOOT1

PVCC115LGATE116PGND117PGND218LGATE219PVCC220BOOT2

+5VALWP

PC89

1U_0402_6.3V6K

1 2

12

10_0603_1%

12

PR91

22K_0402_1%

1 2

6

FSET1

ISL6228HRTZ-T_QFN28_4X4

PC70

12

1U_0402_6.3V6K

2.2_0603_1%

1 2

3

VCC2

3

PR88

12

0.1U_0603_25V7K

PC74

1000P_0402_50V7K

2

VIN2

+5VALWP

PC87

PC87 1U_0402_6.3V6K

1U_0402_6.3V6K

1 2

VFB=0.6V

PC72

PR90

10_0603_1%

12

1

GND_T

FSET2

PGOOD2

OCSET2

PHASE2

UGATE2

21

BST_1.8

12

PR92

18.2K_0402_1%

1 2

29

28

27

FB2

26

VO2

25

24

EN2

23

22

PR109

1 2

2.2_0603_5%

FB_1.8

VO_1.8

OCSET_1.8

0_0402_5%

1 2

0.01U_0402_25V7K@

LX_1.8

DH_1.8-1

PR105

PC80

1 2

DL_1.8

PR98

1 2

@

0_0402_5%

PR108

1 2

0_0603_5%

PC88

0.1U_0402_16V7K

SYSON <31,32,41>

PQ17

AO4466_SO8

DH_1.8-2

+5VALWP

578

3 6

578

3 6

2

ISL6228_B+

241

PQ19

PQ19 AO4712_SO8

AO4712_SO8

241

Rds=18mOHM

12

1 2

PC81

4.7U_1206_25V6K

PR99

16.5K_0402_1%

12

PC82

4.7U_1206_25V6K

3.3K_0402_5%

3.3K_0402_5% 1000P_0402_50V7K

1000P_0402_50V7K

PR100

12.1K_0402_1%

1 2

1.8UH_SIL104R-1R8PF_9.5A_30%

PC76

12

1 2

PR101

1 2

34K_0402_1%

PR102

1 2

12.1K_0402_1%

0.022U_0402_16V7K

0.022U_0402_16V7K PC83

PC83

1 2

PR106

PL6

1 2

DCR 10 mOHM

1.8VP Imax=6.09A Ipeak=8.7A Iocp=12.1A

1

+

PC86

PC86 220U_6.3V_M

220U_6.3V_M

2

1

+1.8VP

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/10/17 2006/10/17

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

1.5VP/1.8VP

Wednesday, May 28, 2008

0.1

of

46 49

1

46 49

5

hexainf@hotmail.com

PJ12

D D

C C

B+

SUSP#<17,31,32,41,46>

2

12

PC149

PC149 3300P_0402_50V7K

3300P_0402_50V7K

JUMP_43X118@

PR118

1 2

0_0402_5%

112

PC91

4.7U_1206_25V6K

6268_B+

12

PC96

2.2U_0603_6.3V6K

12

PC99

0.1U_0402_16V7K

@

12

PC92

4.7U_1206_25V6K

PC94

1 2

0.1U_0603_25V7K@

6268_1.05V

12

4

3

2

1

For discrete PC97=>220UF/15m, PR119=>11.5K

+1.05VSP

1

+

PC97

PC97 330U_D2_2.5VY_R15M

330U_D2_2.5VY_R15M

2

12

PR114

PR114 0_0603_5%

0_0603_5%

6268_1.05V

10K_0402_1%

PU500

3

VIN

4

VCC

5

EN

12

PR112

8

2

GND

PGOOD

COMP6FB7FSET

1UG16

PHASE

9

PHASE_1.05V

DH_1.05-1

BOOT_1.05V

15

BOOT

PVCC

PGND

VO

10

PR111

1 2

PR113

1 2

2.2_0603_5%

+5VS

14

PC95 2.2U_0603_6.3V6K

13

LG

12

ISEN_1.05V

11

ISEN

@

0_0603_5%

PC93

1 2

0.1U_0402_16V7K

PR115

12

0_0603_5%

PR116

4.7_0603_5%

1 2

LG_1.05V

1 2

PR119

19.1K_0402_1%

ISL6268CAZ-T_SSOP16

DH_1.05-2

6268_1.05V

PQ21

AO4712_SO8

578

3 6

578

3 6

241

PQ20

PQ20 AO4466_SO8

AO4466_SO8

PL7

1.8UH_SIL104R-1R8PF_9.5A_30%

1 2

12

PR117

4.7_1206_5%

12

PC98

PC98 680P_0603_50V7K

680P_0603_50V7K

1.05VSP Imax=14.56A Ipeak=20.4A Iocp=24.5A

12

PR120

2.37K_0402_1%

Rds=18mOHM

12

PR123

PR123 3K_0402_1%

3K_0402_1%

ZZZ

ISL6268CAZ

PC100

22P_0402_50V8J

12

49.9K_0402_1%

12

PR121

12

PC102

6800P_0402_25V7K

PR122

57.6K_0402_1%

12

PC500

@PC500

@

0.01U_0402_25V7K

12

FB_1.05V

VFB=0.6V

B B

10U_0805_6.3V6M

PR125

0_0402_5%

SUSP<26,41>

A A

5

1 2

0.1U_0402_16V7K@

PC107

PC103

12

PQ22

SSM3K7002F_SC59-3

4

+1.8V

2

G

1

2

12

PJ13

JUMP_43X118

1K_0402_1%

13

D

S

PR124

12

PR126

PR126 1K_0402_1%

1K_0402_1%

12

PC105

0.1U_0402_16V7K

PU9

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TRL_SO8

+0.9VSP

PC106

PC106 10U_0805_6.3V6M

10U_0805_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

6 5

NC

7

NC

8

NC

9

TP

3

+3VALWP

12

PC104

PC104 1U_0603_6.3V6M

1U_0603_6.3V6M

Compal Secret Data

2005/10/17 2006/10/17

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

1.05VSP/0.9VSP

Wednesday, May 28, 2008

0.1

47 49

of

1

of

5

D D

PR128 0_0402_5%

PM_DPRSLPVR_D<8,22>

H_DPRSTP#<5,8,21>

CLK_EN#<16>

PR131 0_0402_5%

1 2

12

PR131 0_0402_5%

12

PR140

PC132 0.018U_0603_50V7J

12

PC134

0.018U_0603_50V7J

PR175 1K_0402_1%

0.22U_0603_10V7K

+3VS

PR142

499_0402_1%

VGATE<8,16,22>

H_PSI#<5>

PR152 4.22K_0402_1%@PR152 4.22K_0402_1%@

PC118

@ PC118

@

0.015U_0402_16V7K

VCCSENSE<5>

+CPU_CORE

PMON

PR151 0_0402_5%@ PR151 0_0402_5%@

1 2

100K_0603_1%_TH11-4H104FT@

1 2

PR161 97.6K_0402_1%

1 2

PC129 220P_0402_50V7KPC129 220P_0402_50V7K 255_0402_1%

255_0402_1%

1 2

PR170 20_0402_5%PR170 20_0402_5%

1 2

PR153 13K_0402_1%

1 2

PR168 1K_0402_1%

VSSSENSE<5>

C C

H_PROCHOT#<4>

B B

A A

1 2

PR149 0_0402_5%@PR149 0_0402_5%@

1 2

PR150 147K_0402_1%

VR_TT#

PH2

PC1210.022U_0603_50V7K PC1210.022U_0603_50V7K

1 2

1 2 1 2

PC1221000P_0402_50V7K PC1221000P_0402_50V7K

PR156 6.81K_0402_1%

1 2

PC124 1000P_0402_50V7K

PC126 470P_0402_50V7K

12

1 2

PC130 1000P_0402_50V7K

PR166

1 2

PR169 0_0402_5%

PR173

20_0402_5%

VCC_PRM

PR129 0_0402_5%

PR130 0_0402_5%@PR130 0_0402_5%@

1 2

12

PC114

1U_0603_6.3V6M

1.91K_0402_1%

1

PGOOD

2

PSI#

3

PMON

4

RBIAS

5

VR_TT#

6

NTC

7

SOFT

8

OCSET

9

VW

10

COMP

11

FB

12

FB2

PR162

@

0_0402_5%

1 2

PR172 0_0402_5%

PC135 180P_0402_50V8J

1 2

PC137

1 2

49

GND

12

PR165

PR165 1K_0402_1%

1K_0402_1%

PR176 4.02K_0402_1%

4

<5>

CPU_VID6

PR134

PR133

12

0_0402_5%

43

12

CPU_VID5

PR135

12

0_0402_5%

12

PR174

<32>

CPU_VID2

CPU_VID3

CPU_VID4

PR136

PR137

12

0_0402_5%

12

1 2

PC131

0.1U_0603_25V7K

PR171

12

11K_0402_1%

PR138

12

0_0402_5%

PC127

1U_0402_6.3V6K

PR167

10_0603_5%

VSUM

12

PH3

1 2

VR_ON

PR132

12

0_0402_5%

48

46

47

44

45

3V3

VDIFF13VSEN14RTN15DROOP16DFB17VO18VSUM19VIN20GND21VDD22ISEN223ISEN1

12

1 2

VR_ON

CLK_EN#

DPRSTP#

DPRSLPVR

ISL6262ACRZ-T_QFN48_7X7

PC133

0.018U_0603_50V7J

PC136 0.1U_0402_16V7K

1 2

PC138 0.22U_0402_6.3V6K

12

<5>

CPU_VID0

CPU_VID1

PR139

12

0_0402_5%

BOOT_CPU1

VID037VID138VID239VID340VID441VID542VID6

36

BOOT1 UGATE1 PHASE1

PGND1

LGATE1

PVCC

LGATE2

PGND2 PHASE2 UGATE2

BOOT2

24

1 2

PR163 1_0603_5%

2.61K_0402_1%

10KB_0603_5%_ERTJ1VR103J

35 34 33 32 31 30 29 28 27 26 25

NC

PU10

ISEN1 ISEN2

UGATE_CPU1-1

PHASE_CPU1

UGATE_CPU2-1

BOOT_CPU2

2.2_0603_5%

+CPU_B+

PHASE_CPU2

1 2

PR155

+5VS

PC108

0.022U_0402_16V7K

2.2_0603_5%

2.2_0603_5% PR141

PR141

1 2

LGATE_CPU1

LGATE_CPU2

PR154

1 2

0_0603_5%

0.22U_0603_10V7K

3

+5VS

1 2

12

PC109

2.2U_0603_6.3V6K

0.22U_0603_10V7K

0.22U_0603_10V7K PC115

PC115

1 2

0_0603_5%

PR143

1 2

PC123

AO4456-T1-E3_SO8

PR127

PR127 1_0603_5%

1_0603_5%

UGATE_CPU1-2

PQ24

PQ24 AO4456-T1-E3_SO8

AO4456-T1-E3_SO8

UGATE_CPU2-2

PQ27

2

+CPU_B+

1

12

PC112

PC111

PC110

10U_1206_25V6M

PQ23

PQ23 SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

3 5

241

5

4

D8D7D6D

S1S2S3G

D8D7D6D

S1S2S3G

5

D8D7D6D

PQ25

S1S2S3G

4

3 5

241

5

D8D7D6D

S1S2S3G

4

PQ28

AO4456-T1-E3_SO8

5

4

10U_1206_25V6M

12

PC144

@

AO4456-T1-E3_SO8

1000P_0402_50V7K

PQ26

PQ26 SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

12

PR157

4.7_1206_5%

12

PC125

PC125 680P_0603_50V8J

680P_0603_50V8J

PR144

PC116

12

10U_1206_25V6M

12

PR145

4.7_1206_5%

680P_0603_50V8J

12

PC119

10U_1206_25V6M

PR158

+

2

PC113

220U_25V_M

0.36UH_MPC1040LR36_24A_20%

12

PR146

10K_0402_1%

3.65K_0805_1%

VSUM

ISEN1

0.22U_0603_10V7K

12

PC120

0.36UH_MPC1040LR36_24A_20%

12

PR159

10K_0402_1%

3.65K_0805_1%

VSUM

PL8

HCB4532KF-800T90_1812

1 2

12

PC143

PC143 2200P_0402_50V7K

2200P_0402_50V7K

12

PL9

PR148 0_0603_5%@PR148 0_0603_5%@

1 2

PC117

1 2

VCC_PRM

+CPU_B+

10U_1206_25V6M

12

PL10

12

PR164 0_0603_5%@PR164 0_0603_5%@

1 2

PC128

1 2

0.22U_0603_10V7K

ISEN2

PR147

1_0402_5%

12

PR160

1_0402_5%

VCC_PRM

1

B+

+CPU_CORE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/10/17 2006/10/17

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

+CPU_CORE

48 49Tuesday, June 03, 2008

1

0.1

of

5

hexainf@hotmail.com

4

3

2

1

page Reason for change Modify list

Add original ACIN detector fun,and del TI fun. ADD PR6, Del PQ11, PR61 Change PC28 to 0.1U for common design PC28

D D

Change PR16,PR32 & PR77 to 1% for common part PR16 & PR32 & PR77 Change PC55 to 0.1U_0603 for common design PC55

Add PC139 for 3/5V 2nd source PC139 Change PQ21 to AO4712 and PL7 to 1.8UH for cost PQ21 & PL7 Change PC12 and PC13 to 0402 for source suggest PC12 & PC13 Change PR176 to 4.02K for load line PR176 Change 1.05V VIN from 5valwp to 5VS. reduse S3 power loss Del PR83 for extra pull-high R Add cpu_core boost and sunnber for EMI request Add PR141,PR144,PC116,PR155,PR157 &PC125 Add 1.05VSP boost and sunnber for EMI request Add PR113,PR117 &PC98

C C

Fixed CV mode Add PR56,Del PR57&PR60 Adjust 1.05V to 1.074 for HW request

Modify PR120 to 2.37K Modify PR93 to 22KAdjust 1.5V to 1.527 for HW request

DVT

Del PR73 for fix 3V in 2nd source Add PQ30,PQ31, PR178,PR179,PR180,PC141 Prevent ACOP protection by charger Modify PQ10 to SOT322 Layout limit Modify 1.5V to susp# Add PR177, Del PR170 Modify PR36 to 0.015 for rating & change PR45 to 100K Modify PL9 & PL10 form NEC to TOKO Modify PR108 to 2.2 for EMI request

B B

Fix 5valwp, so del PR71, change PR72 to 0PVT Change PC8 to Y5V type for costdown

Change PU6 & PC101 to PU500 &PC500 for BOM Add PC142,PC143,PC144,PC145,PC146,PC147,PC149,PC150 for EMI request Add PR40,PR181,PR107,PR109,PR46,PC37 & Del PR108 for EMI request Change PQ24,PQ25,PQ27,PQ28 to AO4456 for EOL Move PC500 & PU500 to X76 group.PVT-1

Del PC144 & PC146 for EMI requestPre-MP

A A

Title

<Title>

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

5

4

3

2

Date: Sheet

1

of

49 49Wednesday, May 28, 2008

of

49 49Wednesday, May 28, 2008

of

49 49Wednesday, May 28, 2008

COMPAL LA-4241P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual