Compal LA-4141P, IdeaPad Y430 Schematic

A

1 1

2 2

B

C

D

E

JITR1/R2_DDR3

Schematics Document

Mobile Penryn uFCPGA with Intel

3 3

4 4

A

Cantiga_GM/PM+ICH9-M core logic

Friday, April 18, 2008

REV:1.0

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

JITR1_LA-4141P

E

1.0

of

152

A

Compal confidential

File Name :

B

ZZZ2

14W_PCB_LA4142P

C

POWER Board

D

CAP SENSE LEDs Board

E

CONTROL Board

MODEM_CX20548

1 1

VRAM 16*16 VRAM 32*16

page20,21

PCI-E X16

nVIDIA NB9M

page16,19

CONN

page23

CH7318

page23

PCI-EHDMI

Intel Cantiga GMCH

Mobile Penryn

uFCPGA-478 CPU

H_A#(3..35) H_D#(0..63)

page5,6,7

FSB

667/800/1066MHz

DDR2 -667 (1.8V) DDR2 -800 (1.8V)

MDC board

Clock Gen. SLG8SP556VTR

ICS9LPRS387AKLFT

DDR2-SO-DIMM X2

BANK 0, 1, 2, 3

page22

page 14,15

CRT & TV OUT

page25

2 2

LVDS Connector

page24

LVDS I/F

PCBGA 1329

page 8,9,10,11,12,13

DMI

Dual Channel

C-Line

AMP&Audio Jack

AZALIA

PCI Express Mini card Slot 1

page32

PCI Express Mini card Slot 2

page32

New Card

BCM5906 10/100/LAN

3 3

RJ45 CONN

page33

page34

6*PCI-E BUS

3.3V / 33 MHz

page40

1394+Card Reader

O2 OZ129T

1394 Conn

page36

Intel ICH9-M

mBGA-676

PCI BUS

page26,27,28,29

LPC BUS

EC ENE KB926

page35

12*USB2.0

Audio Codec

AMOM_CX20561

4*SATA serial

CMOS Camera

BlueTooth Conn

USB conn X3

page24

page30

page40

page32

page43

Card reader(XD/SD MMC/MS/MS-Pro HD SD)

SUB Board

*RJ45 CONN *RJ11 CONN *MIC IN JACK

4 4

*HP OUT JACK *LED *SWITCH

page32,36

*1394 CONN *DC JACK *USB CONN *SWITCH

page36

Touch Pad

page37

Int.KBD

BIOS

page37

page38

SATA HDD Connector

page39

SATA CDROM Connector

page39

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

MB Block Diagram

JITR1_LA-4141P

252Wednesday, January 09, 2008

E

1.0

of

A

DDR2 Voltage Rails

B

C

D

E

+5VS +3VS +1.5VS

+0.9VS

+VCCP +CPU_CORE +VGA_CORE +1.8VS

OO OO

X

State

S0

S1

S3

S5 S4/AC

power plane

+B

O O O O O

X

+5VALW

+3VALW

O O O O

X XX X

+1.8V

O

XX X

1 1

2 2

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

DDR3 Voltage Rails

+5VS +3VS

power

3 3

plane

+B

+5VALW

+3VALW

+1.5V

+1.5VS

+0.75V

+VCCP +CPU_CORE +VGA_CORE +1.8VS

SMBUS, SPI and I2C Control Table

SOURCE

HDMI BATTEEPROM

LVDS

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

ICH_SMBCLK ICH_SMBDAT ICH9

LVDS_SCL LVDS_SDA

GMCH_CRT_CLK GMCH_CRT_DAT

HDMICLK_NB HDMIDAT_NB

VGA_DDCCLK VGA_DDCDATA

VGA_LVDS_SCL VGA_LVDS_DAT

VGA_HDMI_SCL VGA_HDMI_DAT

HDCP_SMB_CK1 HDCP_SMB_DA1

FSEL#SPICS#_SB FRD#SPI_SO_SB SPI_CLK_SB FWR#SPI_SI_SB

FSEL#SPICS# FRD#SPI_SO SPI_CLK FWR#SPI_SI

KB926

X

KB926

X

Cantiga

X

V

Cantiga

XX X XXX XXXXX X

Cantiga

VGA

ICH9

KB926

XXX XXX XXXXX X

V

X

V

X

V

X

XXX

X

SERIAL

HDCP

CRT

XX X

X XX X X XX X X

NEW CARD

V

XXX X

VV

XX

X

CLK GEN

X X

Mini

CAP sensor

XX

CARD1

X X

Mini CARD2

X X

VV

X

V

X X X

THERMAL SENSOR (VGA)

V V

X X

THERMAL SENSOR (CPU)

VV

V

X XXX XXXXX X

V

X

X XXX XXXXX X X

X

X XX

XXX XXXXX X

XX XXXXX

V

XX XXXXX

V V

XXXXXXX

X X

X

State

S0

S1

4 4

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

A

O O O O O

X

O O O O

X

O

XX X

OO OO

X

XX X

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

MB Notes List

JITR1_LA-4141P

352Wednesday, January 09, 2008

E

of

0.1

A

B

C

D

E

VGA and DDR2 Voltage Rails (NB9M-GS)

power

1 1

plane

+1.8V

State

S0

S1

2 2

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

O O O O O

X

O O O O

X

O

XX X

+3VS +VGA_CORE

OO OO

X

EDP at Tj = 97C*

Power Supply Rail

NVVDD

FB_DLLAVDD

FB_PLLAVDD

IFPC_IOVDD

IFPD_IOVDD

IFPE_IOVDD

IFPF_IOVDD

PEX_IOVDD/Q

PEX_PLLVDD

PLLVDD

SP_PLLVDD

VID_PLLVDD

TOTAL

FBVDD/Q

IFPA_IOVDD

IFPB_IOVDD

IFPAB_PLLVDD

IFPCD_PLLVDD

IFPEF_PLLVDD

TOTAL

DACA_VDD

DACB_VDD

DACC_VDD

MIOA_VDDQ

MIOB_VDDQ

VDD33

TOTAL

(V)

Variable

1.1

1.8

3.3

3.3 0.445A

NB9M-GS

GDDR3

11.22A 10.87A

2.24A

2.76A 2.69A 2.15A

DDR2

25mA 10mA 385mA 385mA 385mA 385mA 1550mA 165mA 55mA 25mA 50mA

3.425A

1.65A 2.17A 1.63A 50mA 50mA 100mA 160mA 160mA

2.17A

110mA 125mA 110mA 10mA 10mA 80mA

NB9M-GE

GDDR3

9.2A 8.88A

DDR2

POWER SQUENCE

The ramp time for any rail must be more than 40us

3 3

(+3VS)

(1.1VS)

(+VGA_CORE)

4 4

A

B

(1.8VS)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VDD33

PEX_VDD

NVVDD

FBVDDQ

C

PEX_VDD can ramp up any time

tNVVDD>=0

tFBVDDQ>=0

Compal Secret Data

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

D

tNV-FB

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

VGA Notes List

JITR1_LA-4141P

E

0.1

of

452Wednesday, January 09, 2008

5

4

3

2

1

XDP Reserve

XDP_DBRESET#

XDP_TDI

D D

H_A#[3..16]<8>

H_ADSTB#0<8>

H_REQ#0<8> H_REQ#1<8> H_REQ#2<8> H_REQ#3<8> H_REQ#4<8>

H_A#[17..35]<8>

C C

H_ADSTB#1<8>

H_A20M#<27>

H_FERR#<27>

H_IGNNE#<27> H_STPCLK#<27>

H_INTR<27>

H_NMI<27> H_SMI#<27>

B B

RSVD pins on the CPU should be left as NO CONNECT

A A

H_ADSTB#0 H_REQ#0

H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_ADSTB#1

H_A20M# H_FERR# H_IGNNE#

H_STPCLK# H_INTR H_NMI H_SMI#

AA4 AB2 AA3

D22

K5 M3 N2

N3 P5 P2

P4 P1 R1 M1

K3 H2 K2

Y2 U5 R3

W6

U4 Y5 U1 R4 T5

T3 W2 W5

Y4

U2

V4 W3

V1

A6

A5

C4

D5

C6

B4

A3

M4

N5

T2

V3

B2

D2

D3

J4 L5 L4

J1

L2

J3 L1

F6

CONN@

JCPUA

A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#

REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#

A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]#

A20M# FERR# IGNNE#

STPCLK# LINT0 LINT1 SMI#

RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09]

Penryn

ADDR GROUP_0

ADS# BNR#

BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HIT#

HITM#

ADDR GROUP_1

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY# PREQ#

TCK

TDI TDO TMS

TRST#

DBR#

XDP/ITP SIGNALS

THERMAL

PROCHOT#

THERMDA

THERMDC

ICH

THERMTRIP#

H CLK

BCLK[0] BCLK[1]

RESERVED

H1 E2 G5

H5 F21 E1

F1 D20

B3 H4 C1

F3 F4 G3 G2

G6 E4

AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20

D21 A24 B25

C7

A22 A21

H_ADS# H_BNR# H_BPRI#

H_DEFER#

H_DRDY#

H_DBSY# H_BR0# H_IERR#

H_INIT# H_LOCK# H_RESET#

H_RS#0 H_RS#1 H_RS#2 H_TRDY#

H_HIT# H_HITM#

XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST#

XDP_DBRESET#

H_PROCHOT# H_THERMDA

H_THERMDC H_THERMTRIP#

CLK_CPU_BCLK CLK_CPU_BCLK#

H_ADS# <8> H_BNR# <8>

H_BPRI# <8>

H_DEFER# <8>

H_DRDY# <8> H_DBSY# <8>

H_BR0# <8>

H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil

+VCCP

12

R83

R83 56_0402_5%

56_0402_5%

H_INIT# <27>

H_LOCK# <8>

H_RESET# <8> H_RS#0 <8> H_RS#1 <8> H_RS#2 <8> H_TRDY# <8>

H_HIT# <8> H_HITM# <8>

XDP_DBRESET# <28>

12

R84 68_0402_5%R84 68_0402_5%

H_THERMTRIP# <8,27>

CLK_CPU_BCLK <22> CLK_CPU_BCLK# <22>

+VCCP

H_PROCHOT#

+3VS

1

C89

2

0.1U_0402_16V4Z

C95

1 2

2200P_0402_50V7K

2200p change to 1000p for ADT7421

+3VS

2200P_0402_50V7K

R94

1 2

10K_0402_5%

FAN solution RC (R=1Kohm,C=0.1uF)

EN_FAN1<35>

EN_FAN1

1 2

R667

R667 1K_0402_5%

1K_0402_5%

+VCC_FAN1 EN_FAN1_R

1

C810

0.1U_0402_16V4Z

2

FAN_SPEED1<35>

U5

1

H_THERMDA H_THERMDC THERM#

VDD

2

D+

3

ALERT/THERM2

D-

4

THERM

S IC EMC1402-1-ACZL-TR MSOP 8P SENSOR

Address:100_1100

+5VS

U24

1 2 3 4

G993P1UF_SOP8

+3VS

XDP_TMS XDP_TDO

XDP_TRST# XDP_TCK

8

SCLK

7

SDATA

6 5

GND

FAN1 Conn

C594 10U_0805_10V4ZC594 10U_0805_10V4Z

1 2

GND GND GND GND

8 7 6 5

VEN VIN VO VSET

12

R469

R469 10K_0402_5%

10K_0402_5%

1

C596

C596 1000P_0402_50V7K

1000P_0402_50V7K

2

+3VS

+VCC_FAN1

1 2

R43

R11 54.9_0402_1%R11 54.9_0402_1%

1 2

R14 54.9_0402_1%R14 54.9_0402_1%

1 2

R12 54.9_0402_1%

1 2

@

R16 54.9_0402_1%R16 54.9_0402_1%

1 2

R15 54.9_0402_1%R15 54.9_0402_1%

1 2

R95

R95 10K_0402_5%

10K_0402_5%

1 2

EC_SMB_CK2 EC_SMB_DA2

+5VS

12

D17

D17 1SS355TE-17_SOD323-2@

1SS355TE-17_SOD323-2@

D16

1 2

C595

1U_0603_10V4Z

1 2

C597

0.1U_0402_16V4Z

1 2

40mil

+3VS

1K_0402_5%@

+VCCP

EC_SMB_CK2 <16,35,41>

EC_SMB_DA2 <16,35,41>

BAS16_SOT23-3@

JP13

1 2 3

ACES_85205-03001

ME@

Security Classification

2007/10/15 2008/10/15

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Penryn (1/3)

JITR1_LA-4141P

552Friday, May 02, 2008

of

1

of

0.1

5

4

3

2

1

+CPU_CORE +CPU_CORE

CONN@

H_D#[0..15]<8>

D D

H_DSTBN#0<8> H_DSTBP#0<8>

H_DINV#0<8>

H_D#[16..31]<8>

C C

H_DSTBN#1<8> H_DSTBP#1<8>

H_DINV#1<8>

R45 1K_0402_5%@R45 1K_0402_5%@

1 2

R46 1K_0402_5%@R46 1K_0402_5%@

1 2

Trace Close CPU < 0.5'

Width=4 mil , Spacing: 15mil (55Ohm)

B B

T16T16 T15T15 T14T14 T17T17 T10T10

CPU_BSEL0<22> CPU_BSEL1<22> CPU_BSEL2<22>

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_DSTBN#0 H_DSTBP#0 H_DINV#0

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_DSTBN#1 H_DSTBP#1 H_DINV#1

+CPU_GTLREF

TEST1 TEST2 TEST3 TEST4 TEST5 TEST6

TEST7 CPU_BSEL0 CPU_BSEL1 CPU_BSEL2

E22 F24 E26

G22

F23

G25

E25 E23 K24

G24

H22 F26 K22 H23

H26 H25

N22 K25 P26 R23 L23

M24

L22

M23

P25 P23 P22 T24

R24

L25 T25

N25

L26 M26 N24

AD26

C23 D25 C24

AF26

AF1

A26

B22

B23 C21

J24 J23

J26

C3

CONN@

JCPUB

D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#

D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#

GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 BSEL[0] BSEL[1] BSEL[2]

Penryn

DATA GRP 0

DATA GRP 1

MISC

PWRGOOD

H_D#[32..47] <8>

H_DSTBN#2 <8> H_DSTBP#2 <8> H_DINV#2 <8> H_D#[48..63] <8>

H_DSTBN#3 <8> H_DSTBP#3 <8> H_DINV#3 <8>

H_DPRSTP# <8,27,50> H_DPSLP# <27> H_DPWR# <8> H_PWRGOOD <27> H_CPUSLP# <8>

H_PSI# <50>

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]#

DATA GRP 2DATA GRP 3

D[41]# D[42]# D[43]# D[44]# D[45]# D[46]#

D[47]# DSTBN[2]# DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]# DSTBN[3]# DSTBP[3]#

DINV[3]# COMP[0]

COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

SLP#

PSI#

Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

COMP0 COMP1 COMP2 COMP3

H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_DSTBN#2 H_DSTBP#2 H_DINV#2

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DSTBN#3 H_DSTBP#3 H_DINV#3

R63 27.4_0402_1%R63 27.4_0402_1%

1 2

R64 54.9_0402_1%R64 54.9_0402_1%

1 2

R10 27.4_0402_1%R10 27.4_0402_1%

1 2

R9 54.9_0402_1%R9 54.9_0402_1%

H_DPRSTP# H_DPSLP# H_DPWR# H_PWRGOOD H_CPUSLP# H_PSI#

1 2

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 18mils and Space 25mils (27.4Ohms) COMP1, COMP3 layout : Width 4mils and Space 25mils (55Ohms)

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

+VCCP

12

R471

R471 1K_0402_1%

1K_0402_1%

Layout note: Z0=55 ohm

0.5" max for GTLREF.

A A

+CPU_GTLREF

12

R470

R470 2K_0402_1%

2K_0402_1%

FSB

BCLK BSEL2 BSEL1 BSEL0 533 667 800

133

166

200

001

100

1067 266 0 0 0

110

Close to CPU pin AD26 within 500mils.

5

4

Security Classification

2007/10/15 2008/10/15

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

CONN@

JCPUC

AA10 AA12 AA13 AA15 AA17 AA18 AA20

AC10 AB10 AB12 AB14 AB15 AB17 AB18

A10 A12 A13 A15 A17 A18 A20

B10 B12 B14 B15 B17 B18 B20

C10 C12 C13 C15 C17 C18

D10 D12 D14 D15 D17 D18

E10 E12 E13 E15 E17 E18 E20

F10 F12 F14 F15 F17 F18 F20 AA7 AA9

AB9

A7

VCC[001]

A9

VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009]

B7

VCC[010]

B9

VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018]

C9

VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025]

D9

VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032]

E7

VCC[033]

E9

VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041]

F7

VCC[042]

F9

VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064]

VCCSENSE VCC[065] VCC[066] VCC[067]

VSSSENSE

Penryn

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]

VCCA[01] VCCA[02]

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

R47 0_0402_5%R47 0_0402_5%

G21 V6

R8 0_0402_5%R8 0_0402_5%

J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

.

For testing purpose only

12 12

VCCSENSE

VSSSENSE

Length match within 25 mils. The trace width/space/other is 16/7/25.

Layout Note: Route VCCSENSE and VSSSENSE traces at

27.4 Ohms with 50 mil spacing. Place PU and PD within 1 inch of CPU. Length matched to within 25 mils.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

+VCCP

Near pin B26

20mils

CPU_VID0 <50> CPU_VID1 <50> CPU_VID2 <50> CPU_VID3 <50> CPU_VID4 <50> CPU_VID5 <50> CPU_VID6 <50>

VCCSENSE <50>

VSSSENSE <50>

+CPU_CORE

1

C599

2

R23

R23 100_0402_1%

100_0402_1%

1 2

R24

R24 100_0402_1%

100_0402_1%

1 2

1

C598

2

10U_0805_10V4Z

0.01U_0402_16V7K

VCCSENSE

VSSSENSE

Close to CPU pin within 500mils.

Compal Electronics, Inc.

Penryn (2/3)

JITR1_LA-4141P

652Friday, May 02, 2008

1

+1.5VS

of

0.1

5

CONN@

JCPUD

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

D D

C C

B B

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080] VSS[081]P3VSS[162]

Penryn

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]

VSS[163]

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

.

REMOVE?

220U_D2_4VM

4

Place these capacitors on L8 (North side,Secondary Layer)

Place these capacitors on L8 (Sorth side,Secondary Layer)

+VCCP

1

+

C8

2

1

2

+CPU_CORE

South Side Secondary

C11

0.1U_0402_16V4Z

1

C13

C13 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

@

C28

C28 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C583

C583 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C588

C588 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C10

0.1U_0402_16V4Z

2

1

C39

C39 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

@

C24

C24 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C585

C585 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C587

C587 10U_0805_6.3V6M

10U_0805_6.3V6M

2

+CPU_CORE

C47

1

2

3

1

+

2

330U_D2_2.5VY_R9M

C51

0.1U_0402_16V4Z

1

C36

C36 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C40

C40 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C586

C586 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C590

C590 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

+

C17

2

330U_D2_2.5VY_R9M

1

2

@

1

+

C41

2

330U_D2_2.5VY_R9M

C50

0.1U_0402_16V4Z

1

C30

C30 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C37

C37 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C589

C589 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C592

C592 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

+

C16

2

330U_D2_2.5VY_R9M

1

2

C48

0.1U_0402_16V4Z

2

1

C27

C27 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C31

C31 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C591

C591 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C35

C35 10U_0805_6.3V6M

10U_0805_6.3V6M

2

North Side Secondary

1

C9

0.1U_0402_16V4Z

2

1

C19

C19 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C26

C26 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C593

C593 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

@

C29

C29 10U_0805_6.3V6M

10U_0805_6.3V6M

2

Place these inside socket cavity on L8 (North side Secondary)

1

C14

C14 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C20

C20 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C582

C582 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C25

C25 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C12

C12 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C15

C15 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C584

C584 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

@

C33

C33 10U_0805_6.3V6M

10U_0805_6.3V6M

2

Mid Frequence Decoupling

ESR <= 1.5m ohm Capacitor > 1980uF

1

A A

Security Classification

2007/10/15 2008/10/15

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Penryn (3/3)

JITR1_LA-4141P

752Friday, March 07, 2008

of

1

of

0.1

5

H_D#[0..63]<6>

D D

C C

H_SWNG H_RCOMP

H_RESET#<5> H_CPUSLP#<6>

layout note: Route H_SCOMP and H_SCOMP# with trace width

spacing and impedance (55 ohm) same as FSB data traces

B B

+VCCP

12

R493

12

R488

H_RESET# H_CPUSLP#

H_VREF

Layout Note: H_RCOMP / H_VREF / H_SWNG

trace width and spacing is 10/20

1K_0402_1%

0.1U_0402_16V4Z

1

C623

2

2K_0402_1%

within 100 mils from NB

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

12

R89

24.9_0402_1%

AD14

AA13 AA11

AD11 AD10 AD13 AE12

AE14

AE11

AG2

M11

N12

P13

N10

Y10 Y12 Y14

AA8

AA9

AE9 AA2 AD8 AA3 AD3 AD7

AF3 AC1 AE3 AC3

AE8 AD6

C12 E11

A11 B11

F2

G8

F8 E6 G2 H6 H2

F6 D4 H3 M9

J1

J2

J6 P2

L2 R2 N9

L6 M5

J3 N2 R1 N5 N6

N8

L7 M3

Y3

Y6

Y7 W2

Y9

C5 E3

H_RCOMP H_SWNGH_VREF

U26A

H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63

H_SWING H_RCOMP

H_CPURST# H_CPUSLP#

H_AVREF H_DVREF

CANTIGA ES_FCBGA1329GM@

+VCCP

R482

R484

HOST

12

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS#

H_ADSTB#_0 H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#

H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_RS#_0 H_RS#_1 H_RS#_2

221_0603_1%

1

2

100_0402_1%

Near B3 pin

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20

H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

C616

0.1U_0402_16V4Z

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BR0# H_DEFER# H_DBSY# CLK_MCH_BCLK CLK_MCH_BCLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY#

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

4

H_A#[3..35] <5>

H_ADS# <5> H_ADSTB#0 <5> H_ADSTB#1 <5> H_BNR# <5> H_BPRI# <5> H_BR0# <5> H_DEFER# <5> H_DBSY# <5> CLK_MCH_BCLK <22> CLK_MCH_BCLK# <22> H_DPWR# <6> H_DRDY# <5> H_HIT# <5> H_HITM# <5> H_LOCK# <5> H_TRDY# <5>

H_DINV#0 <6> H_DINV#1 <6> H_DINV#2 <6> H_DINV#3 <6>

H_DSTBN#0 <6> H_DSTBN#1 <6> H_DSTBN#2 <6> H_DSTBN#3 <6>

H_DSTBP#0 <6> H_DSTBP#1 <6> H_DSTBP#2 <6> H_DSTBP#3 <6>

H_REQ#0 <5> H_REQ#1 <5> H_REQ#2 <5> H_REQ#3 <5> H_REQ#4 <5>

H_RS#0 <5> H_RS#1 <5> H_RS#2 <5>

ICH_POK<28,35>

VGATE<28,50>

PLT_RST#<16,26,32,33,40>

+DDR_MCH_REF

SMRCOMP_VOH

SMRCOMP_VOL

+3VS

12

R206

10K_0402_5%

R177 0_0402_5%R177 0_0402_5% R178 0_0402_5%@R178 0_0402_5%@

Layout Note: V_DDR_MCH_REF trace width and spacing is 20/20.

2

C641

1

C640

2.2U_0603_6.3V4Z

1

C635

2

C636

2.2U_0603_6.3V4Z

12

R217

R217 10K_0402_5%

10K_0402_5%

PM_EXTTS#0 PM_EXTTS#1

12 12

1 2

R103 100_0402_5%R103 100_0402_5%

+DDR_MCH_REF

R162

1

10K_0402_5%

C273

2

0.1U_0402_16V4Z

2

1

2

+1.5V

12

R126

R126 1K_0402_1%

1K_0402_1%

0.01U_0402_25V7K

12

R501

3.01K_0402_1%

NA lead free

12

R500

R500 1K_0402_1%

1K_0402_1%

0.01U_0402_25V7K

PM_POK_R

0309 add

PLT_RST#_R

12

R185

R185 10K_0402_5%

10K_0402_5%

12

MCH_CLKSEL0<22> MCH_CLKSEL1<22> MCH_CLKSEL2<22>

PM_BMBUSY#<28>

H_DPRSTP#<6,27,50> PM_EXTTS#0<14,15> PM_EXTTS#1

H_THERMTRIP#<5,27>

DPRSLPVR<28,50>

CFG5

3

MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2

CFG5 CFG6

T48T48

CFG7

T47T47

CFG8

T45T45

CFG9

T41T41

CFG10

T50T50

CFG11

T49T49

CFG12

T39T39

CFG13

T43T43

CFG14

T38T38

CFG15

T37T37

CFG16

T46T46

CFG17

T42T42

CFG18

T55T55

CFG19

T53T53

CFG20

T54T54

PM_BMBUSY# H_DPRSTP# PM_EXTTS#0 PM_EXTTS#1 PM_POK_R PLT_RST#_R H_THERMTRIP# DPRSLPVR

U26B

M36

T69T69

RSVD1

N36

T70T70

RSVD2

R33

T58T58

RSVD3

T33

T66T66

RSVD4

AH9

T23T23

RSVD5

AH10

T25T25

RSVD6

AH12

T27T27

RSVD7

AH13

T30T30

RSVD8

K12

T26T26

RSVD9

AL34

T62T62

RSVD10

AK34

T61T61

RSVD11

AN35

T67T67

RSVD12

AM35

T68T68

RSVD13

T24

T44T44

RSVD14

B31

T56T56

RSVD15

B2

T84T84

RSVD16

M1

T83T83

RSVD17

AY21

T40T40

RSVD20

BG23

T87T87

RSVD22

BF23

T88T88

RSVD23

BH18

T34T34

RSVD24

BF18

T35T35

RSVD25

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC_1

BF48

NC_2

BD48

NC_3

BC48

NC_4

BH47

NC_5

BG47

NC_6

BE47

NC_7

BH46

NC_8

BF46

NC_9

BG45

NC_10

BH44

NC_11

BH43

NC_12

BH6

NC_13

BH5

NC_14

BG4

NC_15

BH3

NC_16

BF3

NC_17

BH2

NC_18

BG2

NC_19

BE2

NC_20

BG1

NC_21

BF1

NC_22

BD1

NC_23

BC1

NC_24

F1

NC_25

A47

NC_26

RSVD CFG PM NC

DDR CLK/ CONTROL/ COMPENSATIONHDA

CLKDMI

GRAPHICS VID

MEMISC

SM_RCOMP_VOH SM_RCOMP_VOL

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CANTIGA ES_FCBGA1329GM@

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1

SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1

SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1

SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1

SA_ODT_0 SA_ODT_1

SB_ODT_O

SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DPLL_REF_CLK

PEG_CLK

PEG_CLK#

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST# CL_VREF

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

2

M_CLK_DDR0

AP24

M_CLK_DDR1

AT21

M_CLK_DDR2

AV24

M_CLK_DDR3

AU20

M_CLK_DDR#0

AR24

M_CLK_DDR#1

AR21

M_CLK_DDR#2

AU24

M_CLK_DDR#3

AV20

DDR_CKE0_DIMMA

BC28

DDR_CKE1_DIMMA

AY28

DDR_CKE2_DIMMB

AY36

DDR_CKE3_DIMMB

BB36

DDR_CS0_DIMMA#

BA17

DDR_CS1_DIMMA#

AY16

DDR_CS2_DIMMB#

AV16

DDR_CS3_DIMMB#

AR13

M_ODT0

BD17

M_ODT1

AY17

M_ODT2

BF15

M_ODT3

AY13

SMRCOMP

BG22

SMRCOMP#

BH21

SMRCOMP_VOH

BF28

SMRCOMP_VOL

BH28

+DDR_MCH_REF

AV42

SM_PWROK

AR36

SM_REXT

BF17

TP_SM_DRAMRST#

BC36

CLK_MCH_DREFCLK

B38

CLK_MCH_DREFCLK#

A38

MCH_SSCDREFCLK

E41

MCH_SSCDREFCLK#

F41

CLK_MCH_3GPLL

F43

CLK_MCH_3GPLL#

E43

DMI_TXN0

AE41

DMI_TXN1

AE37

DMI_TXN2

AE47

DMI_TXN3

AH39

DMI_TXP0

AE40

DMI_TXP1

AE38

DMI_TXP2

AE48

DMI_TXP3

AH40

DMI_RXN0

AE35

DMI_RXN1

AE43

DMI_RXN2

AE46

DMI_RXN3

AH42

DMI_RXP0

AD35

DMI_RXP1

AE44

DMI_RXP2

AF46

DMI_RXP3

AH43

B33

T90 PADT90 PAD

B32

T89 PADT89 PAD

G33

T65 PADT65 PAD

F33

T64 PADT64 PAD

E33

T63 PADT63 PAD

C34

T91T91

For AMT function

CL_CLK0

AH37

CL_DATA0

AH36 AN36

CL_RST#

AJ35

CL_VREF

AH34

N28 M28

HDMICLK_NB

G36

HDMIDAT_NB

E36

MCH_CLKREQ#

K36

MCH_ICH_SYNC#

H36

B12

MCH_HDA_BCLK

B28

MCH_HDA_RST#

B30

MCH_HDA_SDIN

B29

MCH_HDA_SDOUT

C29

MCH_HDA_SYNC

A28

M_CLK_DDR0 <14> M_CLK_DDR1 <14> M_CLK_DDR2 <15> M_CLK_DDR3 <15>

M_CLK_DDR#0 <14> M_CLK_DDR#1 <14> M_CLK_DDR#2 <15> M_CLK_DDR#3 <15>

DDR_CKE0_DIMMA <14> DDR_CKE1_DIMMA <14> DDR_CKE2_DIMMB <15> DDR_CKE3_DIMMB <15>

DDR_CS0_DIMMA# <14> DDR_CS1_DIMMA# <14> DDR_CS2_DIMMB# <15> DDR_CS3_DIMMB# <15>

M_ODT0 <14> M_ODT1 <14> M_ODT2 <15> M_ODT3 <15>

R497 80.6_0402_1%R497 80.6_0402_1%

1 2

SM_DRAMRST# <14,15>

DDR3

CLK_MCH_DREFCLK <22> CLK_MCH_DREFCLK# <22>

MCH_SSCDREFCLK <22>

MCH_SSCDREFCLK# <22>

CLK_MCH_3GPLL <22> CLK_MCH_3GPLL# <22>

DMI_TXN0 <28> DMI_TXN1 <28> DMI_TXN2 <28> DMI_TXN3 <28>

DMI_TXP0 <28> DMI_TXP1 <28> DMI_TXP2 <28> DMI_TXP3 <28>

DMI_RXN0 <28> DMI_RXN1 <28> DMI_RXN2 <28> DMI_RXN3 <28>

DMI_RXP0 <28> DMI_RXP1 <28> DMI_RXP2 <28> DMI_RXP3 <28>

connect to power CPU_CORE

CL_CLK0 <28> CL_DATA0 <28>

M_PWROK <28> CL_RST# <28>

T52T52 T51T51

1 2

56_0402_5%

R105

R80 0_0402_5%GM@R80 0_0402_5%GM@

1 2

R82 0_0402_5%GM@R82 0_0402_5%GM@

1 2

R79 33_0402_5%GM@R79 33_0402_5%GM@

1 2

R85 0_0402_5%GM@R85 0_0402_5%GM@

1 2

R81 0_0402_5%GM@R81 0_0402_5%GM@

1 2

Notice: Please check HDA power rail to select HDA controller.

20mil

R483 0_0402_5%R483 0_0402_5%

1 2

R175 12K_0402_5%

1 2

@

R148 10K_0402_5%@R148 10K_0402_5%@

1 2 1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z C238

HDMICLK_NB <23> HDMIDAT_NB <23>

C238

MCH_CLKREQ# <22> MCH_ICH_SYNC# <28>

TSATN# <35>

+VCCP

1

+1.5V

R125

80.6_0402_1%

1 2

For Crestline: 20ohm For Calero: 80.6ohm For Cantiga: 80.6ohm

1.5V_PGOOD <48> DDR3_SM_PWROK <35>

R111

R111 499_0402_1%

499_0402_1%

MCH_HDA_BCLK

10P_0402_50V8J

+VCCP

12

R143

R143 1K_0402_1%

1K_0402_1%

1

R147

R147 499_0402_1%

499_0402_1%

2

HDA_BITCLK_CODEC <16,27,30>

HDA_RST_CODEC# <16,27,30> HDA_SDIN0 <27> HDA_SDOUT_CODEC <16,27,30>

HDA_SYNC_CODEC <16,27,30>

C646

@

1

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet

Compal Electronics, Inc.

Cantiga GMCH(1/6)-GTL

JITR1_LA-4141P

1

of

852Wednesday, May 07, 2008

0.1

5

D D

4

3

2

1

DDR_A_D[0..63]<14> DDR_B_D[0..63]<15>

C C

B B

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8

DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AJ38 AJ41

AN38

AM38

AJ36

AJ40 AM44 AM42

AN43 AN44 AU40 AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37 AT36 AY38 BB38 AV36

AW36

BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12

AU10 BA11

BD9 AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6 AT5

AN10

AM11

AM5

AN12

AM13

AJ11

AJ12

BB9 BA9

AV9

AJ9 AJ8

U26D

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7

SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3

DDR SYSTEM MEMORY A

SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

CANTIGA ES_FCBGA1329GM@

DDR_A_BS#1

BG18

DDR_A_BS#2

AT25

DDR_A_RAS#

BB20

DDR_A_CAS#

BD20

DDR_A_WE# DDR_B_CAS#

AY20

DDR_A_DM0

AM37

DDR_A_DM1

AT41

DDR_A_DM2

AY41

DDR_A_DM3

AU39

DDR_A_DM4

BB12

DDR_A_DM5

AY6

DDR_A_DM6

AT7

DDR_A_DM7

AJ5

DDR_A_DQS0

AJ44

DDR_A_DQS1

AT44

DDR_A_DQS2

BA43

DDR_A_DQS3

BC37

DDR_A_DQS4

AW12

DDR_A_DQS5

BC8

DDR_A_DQS6

AU8

DDR_A_DQS7

AM7

DDR_A_DQS#0

AJ43

DDR_A_DQS#1

AT43

DDR_A_DQS#2

BA44

DDR_A_DQS#3

BD37

DDR_A_DQS#4

AY12

DDR_A_DQS#5

BD8

DDR_A_DQS#6

AU9

DDR_A_DQS#7

AM8

DDR_A_MA0

BA21

DDR_A_MA1

BC24

DDR_A_MA2

BG24

DDR_A_MA3

BH24

DDR_A_MA4

BG25

DDR_A_MA5

BA24

DDR_A_MA6

BD24

DDR_A_MA7

BG27

DDR_A_MA8

BF25

DDR_A_MA9

AW24

DDR_A_MA10

BC21

DDR_A_MA11

BG26

DDR_A_MA12

BH26

DDR_A_MA13

BH17

DDR_A_MA14

AY25

DDR_A_BS#0

BD21

DDR_A_BS#0 <14> DDR_A_BS#1 <14> DDR_A_BS#2 <14>

DDR_A_RAS# <14> DDR_A_CAS# <14> DDR_A_WE# <14>

DDR_A_DM[0..7] <14>

DDR_A_DQS[0..7] <14>

DDR_A_DQS#[0..7] <14>

DDR_A_MA[0..14] <14>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8

DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AK47 AH46 AP47 AP46

AJ46

AJ48 AM48 AP48 AU47 AU46 BA48 AY48 AT47 AR47 BA47 BC47 BC46 BC44 BG43

BF43 BE45 BC41

BF40

BF41 BG38

BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11

BG8

BH12

BF11

BF8 BG7 BC5 BC6 AY3 AY1

BF6

BF5 BA1 BD3 AV2 AU3 AR3 AN2 AY2 AV1 AP3 AR1

AL1

AL2

AJ1 AH1 AM2 AM3 AH3

AJ3

U26E

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

SB_BS_0 SB_BS_1 SB_BS_2

SB_RAS# SB_CAS#

SB_WE#

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7

SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2

DDR SYSTEM MEMORY B

SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

CANTIGA ES_FCBGA1329GM@

BB17 BB33

AU17 BG16 BF14

AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6

AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

DDR_B_BS#1 DDR_B_BS#2

DDR_B_RAS# DDR_B_WE#

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8

DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14

DDR_B_BS#0

BC16

DDR_B_BS#0 <15> DDR_B_BS#1 <15> DDR_B_BS#2 <15>

DDR_B_RAS# <15> DDR_B_CAS# <15> DDR_B_WE# <15>

DDR_B_DM[0..7] <15>

DDR_B_DQS[0..7] <15>

DDR_B_DQS#[0..7] <15>

DDR_B_MA[0..14] <15>

A A

Security Classification

2007/10/15 2008/10/15

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga GMCH (2/6)-DDRII

JITR1_LA-4141P

952Friday, May 02, 2008

of

1

of

0.1

5

4

3

2

1

Strap Pin Table

CFG[2:0] FSB Freq select

PCIE_MTX_C_GRX_N[0..15] PCIE_MTX_C_GRX_P[0..15]

D D

U26C

L32

GMCH_ENBKL<24>

+3VS

LVDS_SCL<24> LVDS_SDA<24> GM_ENVDD<24>

For Cantiga:2.37kohm For Crestline:2.4kohm For Calero: 1.5Kohm

Note: All LVDS data

C C

B B

A A

signals/and it's compliments should be routed Differentially

Layout Note: Place 150 Ohmtermination resistors close to GMCH

GM@

R127 75_0402_5%

R127 75_0402_5% R121 75_0402_5%GM@R121 75_0402_5%GM@ R122 75_0402_5%

R122 75_0402_5%

R132 150_0402_1%

R132 150_0402_1% R124 150_0402_1%

R124 150_0402_1% R123 150_0402_1%

R123 150_0402_1%

GMCH_CRT_HSYNC<25>

GMCH_CRT_VSYNC<25>

GM@

1 2

GM@

1 2

GM@

1 2

12 12 12

GMCH_CRT_R GMCH_CRT_G GMCH_CRT_B

5

R203 33_0402_1%GM@R203 33_0402_1%GM@

R204 33_0402_1%GM@R204 33_0402_1%GM@

For Cantiga:1.02kohm For Crestline:1.3kohm For Calero: 255ohm

R213 10K_0402_5%R213 10K_0402_5% R159 10K_0402_5%R159 10K_0402_5%

LVDS_SCL LVDS_SDA

GM_ENVDD

1 2

R167 2.37K_0402_1%R167 2.37K_0402_1%

LVDS_ACLK#<24> LVDS_ACLK<24> LVDS_BCLK# LVDS_BCLK

LVDS_A0#<24> LVDS_A1#<24> LVDS_A2#<24>

LVDS_A0<24> LVDS_A1<24> LVDS_A2<24>

LVDS_B0# LVDS_B1# LVDS_B2#

LVDS_B0 LVDS_B1 LVDS_B2

TVA_DAC TVB_DAC TVC_DAC

GMCH_CRT_B<25> GMCH_CRT_G<25> GMCH_CRT_R<25>

GMCH_CRT_CLK<25> GMCH_CRT_DATA<25>

R139

0_0402_5%

@

1 2 1 2

LVDS_ACLK# LVDS_ACLK LVDS_BCLK# LVDS_BCLK

LVDS_A0# LVDS_A1# LVDS_A2#

LVDS_A0 LVDS_A1 LVDS_A2

LVDS_B0# LVDS_B1# LVDS_B2#

LVDS_B0 LVDS_B1 LVDS_B2

R140

0_0402_5%

@

GMCH_ENBKL

T93T93

T94T94

T72T72

T73T73

TVA_DAC TVB_DAC TVC_DAC

GMCH_CRT_B GMCH_CRT_G GMCH_CRT_R

GMCH_CRT_CLK GMCH_CRT_DATA

T1T1

20mil

12

R138

1.02K_0402_1%

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

CANTIGA ES_FCBGA1329

GM@

4

PEG_COMPI

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9

LVDS TV VGA

PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8

PCI-EXPRESS GRAPHICS

PEG_TX#_9

PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_0

PEG_TX_1

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_5

PEG_TX_6

PEG_TX_7

PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]

Place the resistor within 500mils (1.27mm)of the (G)MCH

PEGCOMP trace width and spacing is 20/25 mils.

T37

PEGCOMP

R163

T36

PCIE_GTX_C_MRX_N0

H44

PCIE_GTX_C_MRX_N1

J46

PCIE_GTX_C_MRX_N2

L44

PCIE_GTX_C_MRX_N3

L40

PCIE_GTX_C_MRX_N4

N41

PCIE_GTX_C_MRX_N5

P48

PCIE_GTX_C_MRX_N6

N44

PCIE_GTX_C_MRX_N7

T43

PCIE_GTX_C_MRX_N8

U43

PCIE_GTX_C_MRX_N9

Y43

PCIE_GTX_C_MRX_N10

Y48

PCIE_GTX_C_MRX_N11

Y36

PCIE_GTX_C_MRX_N12

AA43

PCIE_GTX_C_MRX_N13

AD37

PCIE_GTX_C_MRX_N14

AC47

PCIE_GTX_C_MRX_N15

AD39

PCIE_GTX_C_MRX_P0

H43

PCIE_GTX_C_MRX_P1

J44

PCIE_GTX_C_MRX_P2

L43

PCIE_GTX_C_MRX_P3

L41

PCIE_GTX_C_MRX_P4

N40

PCIE_GTX_C_MRX_P5

P47

PCIE_GTX_C_MRX_P6

N43

PCIE_GTX_C_MRX_P7

T42

PCIE_GTX_C_MRX_P8

U42

PCIE_GTX_C_MRX_P9

Y42

PCIE_GTX_C_MRX_P10

W47

PCIE_GTX_C_MRX_P11

Y37

PCIE_GTX_C_MRX_P12

AA42

PCIE_GTX_C_MRX_P13

AD36

PCIE_GTX_C_MRX_P14

AC48

PCIE_GTX_C_MRX_P15

AD40

PCIE_MTX_GRX_N0

J41

PCIE_MTX_GRX_N1

M46

PCIE_MTX_GRX_N2

M47

PCIE_MTX_GRX_N3

M40

PCIE_MTX_GRX_N4

M42

PCIE_MTX_GRX_N5

R48

PCIE_MTX_GRX_N6

N38

PCIE_MTX_GRX_N7

T40

PCIE_MTX_GRX_N8

U37

PCIE_MTX_GRX_N9

U40

PCIE_MTX_GRX_N10

Y40

PCIE_MTX_GRX_N11

AA46

PCIE_MTX_GRX_N12

AA37

PCIE_MTX_GRX_N13

AA40

PCIE_MTX_GRX_N14

AD43

PCIE_MTX_GRX_N15

AC46

PCIE_MTX_GRX_P0

J42

PCIE_MTX_GRX_P1

L46

PCIE_MTX_GRX_P2

M48

PCIE_MTX_GRX_P3

M39

PCIE_MTX_GRX_P4

M43

PCIE_MTX_GRX_P5

R47

PCIE_MTX_GRX_P6

N37

PCIE_MTX_GRX_P7

T39

PCIE_MTX_GRX_P8

U36

PCIE_MTX_GRX_P9

U39

PCIE_MTX_GRX_P10

Y39

PCIE_MTX_GRX_P11

Y46

PCIE_MTX_GRX_P12

AA36

PCIE_MTX_GRX_P13

AA39

PCIE_MTX_GRX_P14

AD42

PCIE_MTX_GRX_P15

AD46

PCIE_MTX_GRX_P3 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_P0 PCIE_MTX_GRX_N0

PCIE_GTX_C_MRX_P3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R163

3

PCIE_MTX_C_GRX_N[0..15] <16> PCIE_MTX_C_GRX_P[0..15] <16>

PCIE_GTX_C_MRX_N[0..15] <16> PCIE_GTX_C_MRX_P[0..15] <16>

+VCC_PEG

49.9_0402_1%

1 2

Please check Power source if want support IAMT

C277 0.1U_0402_10V7KPM@C277 0.1U_0402_10V7KPM@

1 2

C303 0.1U_0402_10V7KPM@C303 0.1U_0402_10V7KPM@

1 2

C317 0.1U_0402_10V7KPM@C317 0.1U_0402_10V7KPM@

1 2

C315 0.1U_0402_10V7KPM@C315 0.1U_0402_10V7KPM@

1 2

C325 0.1U_0402_10V7KPM@C325 0.1U_0402_10V7KPM@

1 2

C343 0.1U_0402_10V7KPM@C343 0.1U_0402_10V7KPM@

1 2

C358 0.1U_0402_10V7KPM@C358 0.1U_0402_10V7KPM@

1 2

C349 0.1U_0402_10V7KPM@C349 0.1U_0402_10V7KPM@

1 2

C368 0.1U_0402_10V7KPM@C368 0.1U_0402_10V7KPM@

1 2

C354 0.1U_0402_10V7KPM@C354 0.1U_0402_10V7KPM@

1 2

C371 0.1U_0402_10V7KPM@C371 0.1U_0402_10V7KPM@

1 2

C356 0.1U_0402_10V7KPM@C356 0.1U_0402_10V7KPM@

1 2

C372 0.1U_0402_10V7KPM@C372 0.1U_0402_10V7KPM@

1 2

C364 0.1U_0402_10V7KPM@C364 0.1U_0402_10V7KPM@

1 2

C375 0.1U_0402_10V7KPM@C375 0.1U_0402_10V7KPM@

1 2

C348 0.1U_0402_10V7KPM@C348 0.1U_0402_10V7KPM@

1 2

C271 0.1U_0402_10V7KPM@C271 0.1U_0402_10V7KPM@

1 2

C296 0.1U_0402_10V7KPM@C296 0.1U_0402_10V7KPM@

1 2

C314 0.1U_0402_10V7KPM@C314 0.1U_0402_10V7KPM@

1 2

C311 0.1U_0402_10V7KPM@C311 0.1U_0402_10V7KPM@

1 2

C322 0.1U_0402_10V7KPM@C322 0.1U_0402_10V7KPM@

1 2

C336 0.1U_0402_10V7KPM@C336 0.1U_0402_10V7KPM@

1 2

C352 0.1U_0402_10V7KPM@C352 0.1U_0402_10V7KPM@

1 2

C344 0.1U_0402_10V7KPM@C344 0.1U_0402_10V7KPM@

1 2

C363 0.1U_0402_10V7KPM@C363 0.1U_0402_10V7KPM@

1 2

C346 0.1U_0402_10V7KPM@C346 0.1U_0402_10V7KPM@

1 2

C366 0.1U_0402_10V7KPM@C366 0.1U_0402_10V7KPM@

1 2

C351 0.1U_0402_10V7KPM@C351 0.1U_0402_10V7KPM@

1 2

C367 0.1U_0402_10V7KPM@C367 0.1U_0402_10V7KPM@

1 2

C359 0.1U_0402_10V7KPM@C359 0.1U_0402_10V7KPM@

1 2

C373 0.1U_0402_10V7KPM@C373 0.1U_0402_10V7KPM@

1 2

C347 0.1U_0402_10V7KPM@C347 0.1U_0402_10V7KPM@

1 2

C670 0.1U_0402_10V7KGM@C670 0.1U_0402_10V7KGM@

1 2

C674 0.1U_0402_10V7KGM@C674 0.1U_0402_10V7KGM@

1 2

C669 0.1U_0402_10V7KGM@C669 0.1U_0402_10V7KGM@

1 2

C673 0.1U_0402_10V7KGM@C673 0.1U_0402_10V7KGM@

1 2

C662 0.1U_0402_10V7KGM@C662 0.1U_0402_10V7KGM@

1 2

C663 0.1U_0402_10V7KGM@C663 0.1U_0402_10V7KGM@

1 2

C658 0.1U_0402_10V7KGM@C658 0.1U_0402_10V7KGM@

1 2

C661 0.1U_0402_10V7KGM@C661 0.1U_0402_10V7KGM@

1 2

R640 0_0402_5%

1 2

GM@

2007/10/15 2008/10/15

PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_N8

PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_N15

PCIE_MTX_C_GRX_P0

PCIE_MTX_C_GRX_P1

PCIE_MTX_C_GRX_P2

PCIE_MTX_C_GRX_P3

PCIE_MTX_C_GRX_P4

PCIE_MTX_C_GRX_P5

PCIE_MTX_C_GRX_P6

PCIE_MTX_C_GRX_P7

PCIE_MTX_C_GRX_P8

PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_P15

Compal Secret Data

Deciphered Date

TMDS_B_CLK <23> TMDS_B_CLK# <23> TMDS_B_DATA0 <23> TMDS_B_DATA0# <23> TMDS_B_DATA1 <23> TMDS_B_DATA1# <23> TMDS_B_DATA2 <23> TMDS_B_DATA2# <23>

TMDS_B_HPD# <23>

2

CFG[4:3]

CFG5 (DMI select)

CFG6

CFG7 (Intel Management Engine Crypto strap)

CFG8

CFG9 (PCIE Graphics Lane Reversal)

CFG10 (PCIE Lookback enable)

CFG11 CFG[13:12] (XOR/ALLZ)

CFG16 (FSB Dynamic ODT)

CFG19 (DMI Lane Reversal)

CFG20 (PCIE/SDVO concurrent)

Title

Size Document Number Rev

Custom

Date: Sheet

000 = FSB 1066MHz 010 = FSB 800MHz 011 = FSB 667MHz Others = Reserved

Reserved

0 = DMI x 2 1 = DMI x 4 0 = The iTPM Host Interface is enable

1 = The iTPM Host Interface is disable 0 =(TLS)chiper suite with no confidentiality

*

1 =(TLS)chiper suite with confidentiality

Reserved

0 = Reverse Lane,15->0, 14->1 1 = Normal Operation,Lane Number in order

0 = Enable 1 = Disable Reserved 00 = Reserved

01 = XOR Mode Enabled 10 = All Z Mode Enabled

*

ReservedCFG[15:14]

(Default)11 = Normal Operation

*

0 = Disabled 1 = Enabled

*

ReservedCFG[18:17]

0 = Normal Operation

(Lane number in Order)

*

1 = Reverse Lane

0 = Only PCIE or SDVO is operational.

*

1 = PCIE/SDVO are operating simu.

Compal Electronics, Inc.

Cantiga GMCH (3/6)-VGA/LVDS/TV

JITR1_LA-4141P

1

of

10 52Friday, May 02, 2008

0.1

5

GM@

+3VS_DAC_CRT

0.1U_0402_16V4Z

1

2

C206

0.022U_0402_16V7K

1

C213

GM@

2

VCCA_CRT_DAC: 73mA (0.1UF*1, 0.01UF*1)

+3VS

R120

1 2

0_0603_5%

GM@

VCCA_DAC_BG: 2.68mA (0.1UF*1, 0.01UF*1)

0.1U_0402_16V4Z

GM@

R117

1 2

0_0603_5%

0.022U_0402_16V7K

C181

0_0402_5%

PM@

+3VS_DAC_BG

1

C637

2

C181

1

C638

2

1

2

0.022U_0402_16V7K

GM@

+VCCP

+3VS_TVDAC

GM@

10U_0805_10V4Z

C639

1

GM@

2

C206

0_0402_5%

PM@

C605

220U_D2_4VY_R15M

1

C171

0.1U_0402_16V4Z

2

GM@

+1.5VS_PEG_BG: 0.414mA (0.1UF*1)

+1.5VS

0_0603_5%

R108

1 2

0_0805_5%

1

+

2

10U_0805_10V4Z

R134

0_0603_5%

C87

12

C194

R166

1

2

+1.05VS_A_SM_CK

1U_0402_6.3V4Z

1

2

+1.5VS_PEG_BG

12

4.7U_0805_10V4Z

4.7U_0805_10V4Z C96

C96

10U_0805_10V4Z

1

C211

2

+3VS

D D

C C

B B

R115

1 2

0_0603_5%

GM@

C637

0_0402_5%

PM@

VCCA_SM:720mA (22UF*2, 4.7UF*1, 1UF*1)

VCCA_SM_CK: 220mA (22UF*1, 2.2UF*1, 0.1UF*1)

+3VS

4

+3VS_DAC_CRT

+3VS_DAC_BG

+1.05VS_DPLLA +1.05VS_DPLLB

+1.05VS_HPLL +1.05VS_MPLL

+1.8V_TXLVDS

1000P_0402_50V7K

1

C301

0.1U_0402_16V4Z

2

C214

1

2

+3VS_TVDAC: 40mA (0.1UF*1, 0.01UF*1 for each DAC)

VCC_HDA: 50mA (0.1UF*1)

+1.05VS_PEGPLL

+1.05VS_A_SM

1

1U_0603_10V4Z

2

1U_0603_10V4Z

C210

+3VS_TVDAC

1

C300

2

0.1U_0402_16V4Z

1

2

+1.5VS_TVDAC +1.5VS_QDAC

+1.05VS_HPLL

+1.05VS_PEGPLL

+1.8V_LVDS

+1.5VS

20 mils

1

C102

2

U26H

B27

VCCA_CRT_DAC_1

A26

VCCA_CRT_DAC_2

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

F47

VCCA_DPLLA

L48

VCCA_DPLLB

AD1

VCCA_HPLL

AE1

VCCA_MPLL

J48

VCCA_LVDS

J47

VSSA_LVDS

AD48

VCCA_PEG_BG

AA48

VCCA_PEG_PLL

AR20

VCCA_SM_1

AP20

VCCA_SM_2

AN20

VCCA_SM_3

AR17

VCCA_SM_4

AP17

VCCA_SM_5

AN17

VCCA_SM_6

AT16

VCCA_SM_7

AR16

VCCA_SM_8

AP16

VCCA_SM_9

AP28

VCCA_SM_CK_1

AN28

VCCA_SM_CK_2

AP25

VCCA_SM_CK_3

AN25

VCCA_SM_CK_4

AN24

VCCA_SM_CK_5

AM28

VCCA_SM_CK_NCTF_1

AM26

VCCA_SM_CK_NCTF_2

AM25

VCCA_SM_CK_NCTF_3

AL25

VCCA_SM_CK_NCTF_4

AM24

VCCA_SM_CK_NCTF_5

AL24

VCCA_SM_CK_NCTF_6

AM23

VCCA_SM_CK_NCTF_7

AL23

VCCA_SM_CK_NCTF_8

B24

VCCA_TV_DAC_1

A24

VCCA_TV_DAC_2

A32

VCC_HDA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

M38

VCCD_LVDS_1

L37

VCCD_LVDS_2

CRTPLLA LVDSA PEG

POWER

A SM

TV

HDA

LVDS D TV/CRT

U26

VTT

AXF

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

SM CK

VCC_TX_LVDS

A CK

HV

VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5

DMI PEG

VTTLF

CANTIGA ES_FCBGA1329GM@

VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8

VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25

VCC_AXF_1 VCC_AXF_2 VCC_AXF_3

VCC_HV_1 VCC_HV_2 VCC_HV_3

VCC_DMI_1 VCC_DMI_2 VCC_DMI_3 VCC_DMI_4

VTTLF1 VTTLF2 VTTLF3

U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47

C35 B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

A8 L1 AB2

3

+VCCP

+1.8V_TXLVDS

+VCC_PEG

+VCC_DMI

VCC_DMI: 456mA (0.1UF*1)

20mils

1

C94

2

220U_D2_4VM

1

+

C747

2

1

C1260.47U_0402_6.3V6K C1260.47U_0402_6.3V6K

2

+V1.05VS_AXF

+1.5V_SM_CK

0.47U_0402_6.3V6K

1

C611

2

0.1U_0402_16V4Z

+VCCP

+3VS

+1.05VS_DPLLA

0.1U_0402_16V4Z

C278

1

2 GM@

GM@

+1.05VS_DPLLB

0.1U_0402_16V4Z

C312

1

2 GM@

GM@

+1.05VS_HPLL

1

C609

2

+1.05VS_MPLL

1

C608

2

+1.05VS_PEGPLL

0.1U_0402_16V4Z

0.1U_0402_16V4Z C342

C342

1

2

+VCCP_D

D1

@D1

@

2 1

CH751H-40PT_SOD323-2

4.7U_0805_10V4Z

1

@

C265

2

4.7U_0805_10V4Z

1

C136

2

+3VS_HV

0.1U_0402_16V4Z

1

C649

2

0.47U_0402_6.3V6K

1

C618

2

1 2

10U_0805_10V4Z

MCK3225151YZF 1210

1

C275

2

GM@

+1.05VS_DPLLA +1.05VS_DPLLB: 64.8mA (470UF*1, 0.1UF*1)

R191

1 2

10U_0805_10V4Z

MCK3225151YZF 1210

1

GM@

C310

2

GM@

R474

MBK2012121YZF_0805

1

C604

2.2U_0603_6.3V4Z

2

R473

MBK2012121YZF_0805

1

C603

2.2U_0603_6.3V4Z

2

BLM18PG121SN1D_0603

1

C355

2.2U_0603_6.3V4Z

2

R158

@R158

@

12

10_0402_5%

R151

+VCCP

GM@

+VCCP

+1.05VS_HPLL: 24mA (4.7UF*1, 0.1UF*1)

12

+VCCP

1.05VS_MPLL: 139.2mA (22UF*1, 0.1UF*1)

12

+VCCP

+1.5VS_PEG_PLL: 50mA (0.1UF*1)

L17

12

+VCCP

R157

12

0_0402_5%

C299

0_0402_5%

PM@

+3VS_HV

C180

0_0402_5%

PM@

40 mils

1000P_0402_50V7K

GM@

0316 add

+V1.05VS_AXF

10U_0805_10V4Z

+1.5VS_TVDAC

C180

1

C299

2

+VCC_PEG

1

C339

+

2

+VCC_DMI

C337

1

2

C629

1

2

0.022U_0402_16V7K

1

2

+1.8V_TXLVDS

C370

220U_D2_4VM

C323

1U_0603_10V4Z

C353

+1.5V_SM_CK

C627

1

C195

2

GM@

10U_0805_10V4Z

1

2

10U_0805_10V4Z

1

2

10U_0805_10V4Z

1

2

1U_0603_10V4Z

1

2

1

2

0.1U_0402_16V4Z

C198

R208

0_0603_5%

GM@

C795

1

VCC_AXF: 321.35mA (10UF*1, 1UF*1)

1 2

R495

0_0603_5%

C631

VCC_SM_CK: 119.85mA (10UF*1, 0.1UF*1)

10U_0805_10V4Z

0.1U_0402_16V4Z

C628

1

2

10U_0805_10V4Z

1

VCCD_TVDAC: 58.696mA

2

(0.1UF*1, 0.01UF*1)

GM@

12

+1.8V_TXLVDS: 118.8mA (22UF*1, 1000PF*1)

+VCCP

R202

0_0805_5%

10U_0805_10V4Z

1

2

+VCCP

R496

1 2

0_0805_5%

R136

0_0603_5%

GM@

+1.8V

+VCCP

12

+1.5V

+1.5VS

12

PM

PM@

+1.5VS_QDAC

1U_0402_6.3V4Z

C208

GM@

C208

A A

VCCD_QDAC: 48.363mA (0.1UF*1, 0.01UF*1)

0.1U_0402_16V4Z

1

C207

2

5

R142

12

GM@

+1.5VS

0_0603_5%

10U_0805_10V4Z

1

C221

2

+1.8V_LVDS

10U_0805_10V4Z

C226

GM@

1

2

1.8V_LVDS: 60.311111mA (1UF*1)

R137

0_0603_5%

1U_0603_10V4Z

GM@

C237

1

2

GM@

12

C237

0_0603_5%

PM@

4

+1.8V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Crestline GMCH (4/6)-VCC

JITR1_LA-4141P

1

of

11 52Friday, April 18, 2008

0.1

5

C175

+VCCP

0.1U_0402_16V4Z

C220

1

2

D D

0.22U_0402_10V4Z

10U_0805_10V4Z

C C

B B

A A

0.22U_0402_10V4Z

C193

1

C178

2

1

2

AG34 AC34 AB34 AA34

AM33

AK33

AJ33 AG33 AF33

AE33 AC33 AA33

W33

AH28 AF28 AC28 AA28

AJ26 AG26 AE26 AC26 AH25 AG25 AF25 AG24

AJ23 AH23 AF23

U26G

VCC_1 VCC_2 VCC_3 VCC_4

Y34

VCC_5

V34

VCC_6

U34

VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12

VCC_13 VCC_14 VCC_15

Y33

VCC_16 VCC_17

V33

VCC_18

U33

VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34

T32

VCC_35

VCC CORE

POWER

VCC NCTF

4

VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28 VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31 VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38 VCC_NCTF_39 VCC_NCTF_40 VCC_NCTF_41 VCC_NCTF_42 VCC_NCTF_43 VCC_NCTF_44

CANTIGA ES_FCBGA1329GM@

VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8 VCC_NCTF_9

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

+VCCP

1782mA

+1.5V

+VCCP +AXG_CORE

GM@

1

C84

C149

1U_0603_10V4Z

2

220U_D2_4VM_R15

3

220U_D2_4VM_R15

1

C177

+

2

@

J4

112

JUMP_43X118

10U_0805_10V4Z

1

GM@

+

C104

2

1

2

GM@

1

C157

2

10U_0805_10V4Z

C157

0_0805_5%

PM@

10U_0805_10V4Z

C643

0.1U_0402_16V4Z

GM@

1

C167

2

0.01U_0402_16V7K

2

1

+AXG_CORE

1

2

C645

2

U26F

AP33

VCC_SM_1

AN33

VCC_SM_2

BH32

VCC_SM_3

BG32

VCC_SM_4

BF32

VCC_SM_5

BD32

VCC_SM_6

BC32

VCC_SM_7

BB32

VCC_SM_8

BA32

VCC_SM_9

AY32

VCC_SM_10

AW32

VCC_SM_11

AV32

VCC_SM_12

AU32

VCC_SM_13

AT32

VCC_SM_14

AR32

VCC_SM_15

AP32

VCC_SM_16

AN32

VCC_SM_17

BH31

VCC_SM_18

BG31

VCC_SM_19

BF31

VCC_SM_20

BG30

VCC_SM_21

BH29

VCC_SM_22

BG29

VCC_SM_23

BF29

VCC_SM_24

BD29

VCC_SM_25

BC29

VCC_SM_26

BB29

VCC_SM_27

BA29

VCC_SM_28

AY29

VCC_SM_29

AW29

VCC_SM_30

AV29

VCC_SM_31

AU29

VCC_SM_32

AT29

VCC_SM_33

AR29

VCC_SM_34

AP29

VCC_SM_35

BA36

VCC_SM_36/NC

BB24

VCC_SM_37/NC

BD16

VCC_SM_38/NC

BB21

VCC_SM_39/NC

AW16

VCC_SM_40/NC

AW13

VCC_SM_41/NC

AT13

VCC_SM_42/NC

Y26

VCC_AXG_1

AE25

VCC_AXG_2

AB25

VCC_AXG_3

AA25

VCC_AXG_4

AE24

VCC_AXG_5

AC24

VCC_AXG_6

AA24

VCC_AXG_7

Y24

VCC_AXG_8

AE23

VCC_AXG_9

AC23

VCC_AXG_10

AB23

VCC_AXG_11

AA23

VCC_AXG_12

AJ21

VCC_AXG_13

AG21

VCC_AXG_14

AE21

VCC_AXG_15

AC21

VCC_AXG_16

AA21

VCC_AXG_17

Y21

VCC_AXG_18

AH20

VCC_AXG_19

AF20

VCC_AXG_20

AE20

VCC_AXG_21

AC20

VCC_AXG_22

AB20

VCC_AXG_23

AA20

VCC_AXG_24

T17

VCC_AXG_25

T16

VCC_AXG_26

AM15

VCC_AXG_27

AL15

VCC_AXG_28

AE15

VCC_AXG_29

AJ15

VCC_AXG_30

AH15

VCC_AXG_31

AG15

VCC_AXG_32

AF15

VCC_AXG_33

AB15

VCC_AXG_34

AA15

VCC_AXG_35

Y15

VCC_AXG_36

V15

VCC_AXG_37

U15

VCC_AXG_38

AN14

VCC_AXG_39

AM14

VCC_AXG_40

U14

VCC_AXG_41

T14

VCC_AXG_42

AJ14

T32T32 T31T31

AH14

VCC_AXG_SENSE VSS_AXG_SENSE

VCC_AXG_NTCF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8

VCC SM

VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43

VCC GFX NCTF

VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52

POWER

VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55 VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60

VCC GFX

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

VCC SM LF

CANTIGA ES_FCBGA1329GM@

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

+AXG_CORE

VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7

Check : power

0.1U_0402_16V4Z

0.1U_0402_16V4Z C197

C197

1

GM@

2

C121 0.1U_0402_16V4ZC121 0.1U_0402_16V4Z

C114 0.1U_0402_16V4ZC114 0.1U_0402_16V4Z

1

2

1

C129

1

GM@

2

0.22U_0402_10V4Z

C99

0_0603_5%

PM@

C101 0.22U_0402_10V4ZC101 0.22U_0402_10V4Z

C159 0.22U_0402_10V4ZC159 0.22U_0402_10V4Z

1

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K C99

C99

1

GM@

2

C264 0.47U_0402_6.3V6KC264 0.47U_0402_6.3V6K

C243 1U_0402_6.3V4ZC243 1U_0402_6.3V4Z

1

2

C297 1U_0402_6.3V4ZC297 1U_0402_6.3V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Crestline GMCH (5/6)-VCC

JITR1_LA-4141P

12 52Friday, April 18, 2008

1

0.1

of

5

U26I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

AF47

VSS_8

AD47

VSS_9

AB47

VSS_10

Y47

VSS_11

T47

BD46 BA46 AY46 AV46 AR46 AM46

BF44 AH44 AD44 AA44

BC43 AV43 AU43 AM43

BG42 AY42 AT42 AN42

AJ42 AE42

BD41 AU41 AM41 AH41 AD41 AA41

BG40 BB40 AV40 AN40

AT39 AM39

AJ39 AE39

BH38 BC38 BA38 AU38 AH38 AD38 AA38

BF37 BB37

AW37

AT37 AN37

AJ37

BG36 BD36 AK15 AU36

VSS_12

N47

VSS_13

L47

VSS_14

G47

VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21

V46

VSS_22

R46

VSS_23

P46

VSS_24

H46

VSS_25

F46

VSS_26 VSS_27 VSS_28 VSS_29 VSS_30

Y44

VSS_31

U44

VSS_32

T44

VSS_33

M44

VSS_34

F44

VSS_35 VSS_36 VSS_37 VSS_38 VSS_39

J43

VSS_40

C43

VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47

N42

VSS_48

L42

VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55

Y41

VSS_56

U41

VSS_57

T41

VSS_58

M41

VSS_59

G41

VSS_60

B41

VSS_61 VSS_62 VSS_63 VSS_64 VSS_65

H40

VSS_66

E40

VSS_67 VSS_68 VSS_69 VSS_70 VSS_71

N39

VSS_72

L39

VSS_73

B39

VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81

Y38

VSS_82

U38

VSS_83

T38

VSS_84

J38

VSS_85

F38

VSS_86

C38

VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93

H37

VSS_94

C37

VSS_95 VSS_96 VSS_97 VSS_98 VSS_99

VSS

D D

C C

B B

A A

VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199

CANTIGA ES_FCBGA1329GM@

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

4

U26J

BG21

VSS_199

L12

VSS_200

AW21

VSS_201

AU21

VSS_202

AP21

VSS_203

AN21

VSS_204

AH21

VSS_205

AF21

VSS_206

AB21

VSS_207

R21

VSS_208

M21

VSS_209

J21

VSS_210

G21

VSS_211

BC20

VSS_212

BA20

VSS_213

AW20

VSS_214

AT20

VSS_215

AJ20

VSS_216

AG20

VSS_217

Y20

VSS_218

N20

VSS_219

K20

VSS_220

F20

VSS_221

C20

VSS_222

A20

VSS_223

BG19

VSS_224

A18

VSS_225

BG17

VSS_226

BC17

VSS_227

AW17

VSS_228

AT17

VSS_229

R17

VSS_230

M17

VSS_231

H17

VSS_232

C17

VSS_233

BA16

VSS_235

AU16

VSS_237

AN16

VSS_238

N16

VSS_239

K16

VSS_240

G16

VSS_241

E16

VSS_242

BG15

VSS_243

AC15

VSS_244

W15

VSS_245

A15

VSS_246

BG14

VSS_247

AA14

VSS_248

C14

VSS_249

BG13

VSS_250

BC13

VSS_251

BA13

VSS_252

AN13

VSS_255

AJ13

VSS_256

AE13

VSS_257

N13

VSS_258

L13

VSS_259

G13

VSS_260

E13

VSS_261

BF12

VSS_262

AV12

VSS_263

AT12

VSS_264

AM12

VSS_265

AA12

VSS_266

J12

VSS_267

A12

VSS_268

BD11

VSS_269

BB11

VSS_270

AY11

VSS_271

AN11

VSS_272

AH11

VSS_273

Y11

VSS_275

N11

VSS_276

G11

VSS_277

C11

VSS_278

BG10

VSS_279

AV10

VSS_280

AT10

VSS_281

AJ10

VSS_282

AE10

VSS_283

AA10

VSS_284

M10

VSS_285

BF9

VSS_286

BC9

VSS_287

AN9

VSS_288

AM9

VSS_289

AD9

VSS_290

G9

VSS_291

B9

VSS_292

BH8

VSS_293

BB8

VSS_294

AV8

VSS_295

AT8

VSS_296

VSS

3

VSS NCTF

VSS SCB

NC

CANTIGA ES_FCBGA1329GM@

VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325

VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350

VSS_351 VSS_352 VSS_353 VSS_354

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16

VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5

NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34 NC_35 NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_42

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1

U24 U28 U25 U29

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

BH48 BH1 A48 C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga GMCH (6/6)-GND

JITR1_LA-4141P

13 52Friday, April 18, 2008

1

0.1

of

5

DDR_A_DQS#[0..7]<9>

DDR_A_D[0..63]<9>

DDR_A_DM[0..7]<9> DDR_A_DQS[0..7]<9> DDR_A_MA[0..14]<9>

D D

Layout Note:

C C

Layout Note: Place near JP4.203 & JP4.204

B B

A A

Place near JP4

+1.5V

10U_0805_6.3V6M

1

C766

C768

2

+0.75V

1U_0603_10V4Z

10U_0805_6.3V6M

2

C778

1

C767

1

C763

2

1U_0603_10V4Z

2

C779

1

5

10U_0805_6.3V6M

C776

+V_DDR3_DIMM_REF<15>

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

0.1U_0402_16V4Z

C762

0.1U_0402_16V4Z

C750

C752

1

2

10U_0805_6.3V6M

1

C764

C765

2

10U_0805_6.3V6M

1U_0603_10V4Z

10U_0805_6.3V6M

C777

1

2

1

4

+V_DDR3_DIMM_REF

1

C755

2

0.1U_0402_16V4Z

C749

1

2

4

1

2

C753

+1.5V

12

R625

R625 100_0402_1%

100_0402_1%

R626

100_0402_1%

1

+

C787

C787 470U_D2_2.5VM_R15

470U_D2_2.5VM_R15

@

2

+V_DDR3_DIMM_REF

3

+V_DDR3_DIMM_REF

DDR_A_D0 DDR_A_D1

DDR_A_DM0 DDR_A_D2

DDR_A_D3 DDR_A_D8

DDR_A_D9 DDR_A_DQS#1

DDR_A_DQS1 DDR_A_D10

DDR_A_D11 DDR_A_D16

DDR_A_D17 DDR_A_DQS#2

DDR_A_DQS2 DDR_A_D18

DDR_A_D19 DDR_A_D24

DDR_A_D25 DDR_A_DM3 DDR_A_D26

DDR_A_D27

2.2U_0603_6.3V4Z

1

C754

2

3

DDR_CKE0_DIMMA

DDR_A_BS2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3

DDR_A_MA1 M_CLK_DDR0

M_CLK_DDR#0 DDR_A_MA10

DDR_A_BS0 DDR_A_WE#

DDR_A_CAS# DDR_A_MA13

DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D48

DDR_A_D49 DDR_A_DQS#6

DDR_A_DQS6 DDR_A_D50

DDR_A_D51 DDR_A_D56

DDR_A_D57 DDR_A_DM7 DDR_A_D58

DDR_A_D59

R627

1 2

10K_0402_5%

1

2

0.1U_0402_16V4Z

DDR_CKE0_DIMMA<8>

DDR_A_BS#2<9>

M_CLK_DDR0<8> M_CLK_DDR#0<8>

DDR_A_BS#0<9>

DDR_A_WE#<9>

DDR_A_CAS#<9> M_ODT0 <8>

DDR_CS1_DIMMA#<8>

+3VS

C784

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.5V +1.5V

JP17

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET#

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

12

R628

10K_0402_5%

2007/09/29 2007/09/29

VTT1

205

G1

FOX _AS0A626-U2RN-7F_RV

Compal Secret Data

DQ4 DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

VSS10

DM1

VSS12

DQ14 DQ15

VSS14

DQ20 DQ21

VSS16

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

VSS24

DQ30 DQ31

VSS26

CKE1

VDD2

A15 A14

VDD4

A11

A7

VDD6

A6 A4

VDD8

A2 A0

VDD10

CK1 CK1#

VDD12

BA1 RAS#

VDD14

S0#

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

SCL VTT2

G2

Deciphered Date

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

2

DDR_A_D4 DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

DDR_A_DM1 SM_DRAMRST#

DDR_A_D14 DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_DM2 DDR_A_D22

DDR_A_D23 DDR_A_D28

DDR_A_D29 DDR_A_DQS#3

DDR_A_DQS3 DDR_A_D30

DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA14 DDR_A_MA11

DDR_A_MA7 DDR_A_MA6

DDR_A_MA4 DDR_A_MA2

DDR_A_MA0 M_CLK_DDR1

M_CLK_DDR#1 DDR_A_BS1

DDR_A_RAS# DDR_CS0_DIMMA#

M_ODT0 M_ODT1

DDR_VREF_CA_DIMMA DDR_A_D36

DDR_A_D37 DDR_A_DM4 DDR_A_D38

DDR_A_D39 DDR_A_D44

DDR_A_D45 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D46

DDR_A_D47 DDR_A_D52

DDR_A_D53 DDR_A_DM6 DDR_A_D54

DDR_A_D55 DDR_A_D60

DDR_A_D61 DDR_A_DQS#7

DDR_A_DQS7 DDR_A_D62

DDR_A_D63 PM_EXTTS#0_1

CLK_SMBDATA CLK_SMBCLK

+0.75V

2

SM_DRAMRST# <8,15>

DDR_CKE1_DIMMA <8>

M_CLK_DDR1 <8> M_CLK_DDR#1 <8>

DDR_A_BS#1 <9> DDR_A_RAS# <9>

DDR_CS0_DIMMA# <8>

M_ODT1 <8>

R623

1 2

0_0402_5%

PM_EXTTS#0 <8,15>

CLK_SMBDATA <15,22> CLK_SMBCLK <15,22>

DDR3 SO-DIMM A REVERSE

Title

Size Document Number Rev

Custom

Date: Sheet

1

+V_DDR3_DIMM_REF

2.2U_0805_16V4Z

0.1U_0402_16V4Z

1

C785

C751

2

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

Montevina UMA DDR3

1

1.0

of

14 52Friday, May 02, 2008

5

DDR_B_DQS#[0..7]<9>

DDR_B_D[0..63]<9>

DDR_B_DM[0..7]<9>

DDR_B_DQS[0..7]<9>

DDR_B_MA[0..14]<9>

D D

Layout Note: Place near JP5

Layout Note: Place these 4 Caps near Command

+1.5V

10U_0805_6.3V6M

1

C771

C C

B B

A A

2

Layout Note: Place near JP5.203 & JP5.204

+0.75V

1U_0603_10V4Z

C772

C775

2

1U_0603_10V4Z

2

C780

C781

1

10U_0805_6.3V6M

1

2

1U_0603_10V4Z

2

C783

1

5

C769

1

C774

2

10U_0805_6.3V6M

1

2

C770

C782

2

1

and Control signals of DIMMA

0.1U_0402_16V4Z

10U_0805_6.3V6M

1

C773

2

0.1U_0402_16V4Z

C756

1

2

C757

0.1U_0402_16V4Z

1

2

C760

4

+V_DDR3_DIMM_REF

+V_DDR3_DIMM_REF<14>

0.1U_0402_16V4Z

1

C759

1

+

C788

C788 470U_D2_2.5VM_R15

470U_D2_2.5VM_R15

@

2

DDR_B_BS#2<9>

M_CLK_DDR2<8> M_CLK_DDR#2<8>

DDR_B_BS#0<9>

DDR_B_WE#<9>

DDR_B_CAS#<9> M_ODT2 <8>

DDR_CS3_DIMMB#<8>

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C761

2

0.1U_0402_16V4Z

3

DDR_B_D0 DDR_B_D1

DDR_B_DM0 DDR_B_D2

DDR_B_D3 DDR_B_D8

DDR_B_D9 DDR_B_DQS#1

DDR_B_DQS1 DDR_B_D10

DDR_B_D11 DDR_B_D16

DDR_B_D17 DDR_B_DQS#2

DDR_B_DQS2 DDR_B_D18

DDR_B_D19 DDR_B_D24

DDR_B_D25 DDR_B_DM3 DDR_B_D26

DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2 DDR_B_MA12

DDR_B_MA9 DDR_B_MA8

DDR_B_MA5 DDR_B_MA3

DDR_B_MA1 M_CLK_DDR2

M_CLK_DDR#2 DDR_B_MA10

DDR_B_BS0 DDR_B_WE#

DDR_B_CAS# DDR_B_MA13

DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D48

DDR_B_D49 DDR_B_DQS#6

DDR_B_DQS6 DDR_B_D50

DDR_B_D51 DDR_B_D56

DDR_B_D57 DDR_B_DM7 DDR_B_D58

DDR_B_D59

R630

1 2

10K_0402_5%

1 2

R629

3

+1.5V +1.5V

JP16

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET#

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

10K_0402_5%

VTT1

205

G1

FOX_AS0A626-UARN-7F _RV

2007/09/29 2007/09/29

2 4

DQ4

6

DQ5

8

VSS3

10

DQS#0

12

DQS0

14

VSS6

16

DQ6

18

DQ7

20

VSS8

22

DQ12

24

DQ13

26

VSS10

28

DM1

30 32

VSS12

34

DQ14

36

DQ15

38

VSS14

40

DQ20

42

DQ21

44

VSS16

46

DM2

48

VSS17

50

DQ22

52

DQ23

54

VSS19

56

DQ28

58

DQ29

60

VSS21

62 64

DQS3

66

VSS24

68

DQ30

70

DQ31

72

VSS26

74

CKE1

76

VDD2

78

A15

80

A14

82

VDD4

84

A11

86

A7

88

VDD6

90

A6

92

A4

94

VDD8

96

A2

98

A0

100

VDD10

102

CK1

104

CK1#

106

VDD12

108

BA1

110

RAS#

112

VDD14

114

S0#

116

ODT0

118

VDD16

120

ODT1

122

NC2

124

VDD18

126

VREF_CA

128

VSS28

130

DQ36

132

DQ37

134

VSS30

136

DM4

138

VSS31

140

DQ38

142

DQ39

144

VSS33

146

DQ44

148

DQ45

150

VSS35

152

DQS#5

154

DQS5

156

VSS38

158

DQ46

160

DQ47

162

VSS40

164

DQ52

166

DQ53

168

VSS42

170

DM6

172

VSS43

174

DQ54

176

DQ55

178

VSS45

180

DQ60

182

DQ61

184

VSS47

186

DQS#7

188

DQS7

190

VSS50

192

DQ62

194

DQ63

196

VSS52

198

EVENT#

200

SDA

202

SCL

204

VTT2

206

G2

+0.75V

Compal Secret Data

Deciphered Date

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1 SM_DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2 DDR_B_D22

DDR_B_D23 DDR_B_D28

DDR_B_D29 DDR_B_DQS#3

DDR_B_DQS3 DDR_B_D30

DDR_B_D31

DDR_CKE3_DIMMB

DDR_VREF_CA_DIMMB

2

DDR_B_MA14 DDR_B_MA11

DDR_B_MA7 DDR_B_MA6

DDR_B_MA4 DDR_B_MA2

DDR_B_MA0 M_CLK_DDR3

M_CLK_DDR#3 DDR_B_BS1

DDR_B_RAS# DDR_CS2_DIMMB#

M_ODT2 M_ODT3

DDR_B_D36 DDR_B_D37

DDR_B_DM4 DDR_B_D38

DDR_B_D39 DDR_B_D44

DDR_B_D45 DDR_B_DQS#5

DDR_B_DQS5 DDR_B_D46

DDR_B_D47 DDR_B_D52

DDR_B_D53 DDR_B_DM6 DDR_B_D54

DDR_B_D55 DDR_B_D60

DDR_B_D61 DDR_B_DQS#7

DDR_B_DQS7 DDR_B_D62

DDR_B_D63 PM_EXTTS#0_1

CLK_SMBDATA CLK_SMBCLK

+0.75V

2

1

SM_DRAMRST# <8,14>

DDR_CKE3_DIMMB <8>DDR_CKE2_DIMMB<8>

M_CLK_DDR3 <8> M_CLK_DDR#3 <8>

DDR_B_BS#1 <9> DDR_B_RAS# <9>

DDR_CS2_DIMMB# <8>

M_ODT3 <8>

R624

0_0402_5%

1 2

2.2U_0805_16V4Z

1

C786

2

same with intel DDR3 CRB connection

PM_EXTTS#0 <8,14>

CLK_SMBDATA <14,22> CLK_SMBCLK <14,22>

+V_DDR3_DIMM_REF

0.1U_0402_16V4Z

1

C758

2

DDR3 SO-DIMM B REVERSE

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM SLOT2

Montevina UMA DDR3

15 52Friday, May 02, 2008

1

1.0

of

5

PCIE_MTX_C_GRX_P0

PCIE_MTX_C_GRX_N[0..15]<10> PCIE_MTX_C_GRX_P[0..15]<10> PCIE_GTX_C_MRX_N[0..15]<10> PCIE_GTX_C_MRX_P[0..15]<10>

D D

PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P4

C C

PCIE_GTX_C_MRX_N4 PCIE_GTX_MRX_N4 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P15 PCIE_GTX_C_MRX_N15

B B

OSC_SPREAD OSC_OUT

R99

10K_0402_5%

PM@

If External Spread Spectrum not stuff than stuff resistor

PCIE_MTX_C_GRX_N[0..15] PCIE_MTX_C_GRX_P[0..15] PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]

C261 0.1U_0402_10V7KPM@C261 0.1U_0402_10V7KPM@ C260 0.1U_0402_10V7KPM@C260 0.1U_0402_10V7KPM@ C294 0.1U_0402_10V7KPM@C294 0.1U_0402_10V7KPM@ C293 0.1U_0402_10V7KPM@C293 0.1U_0402_10V7KPM@ C259 0.1U_0402_10V7KPM@C259 0.1U_0402_10V7KPM@ C258 0.1U_0402_10V7KPM@C258 0.1U_0402_10V7KPM@ C292 0.1U_0402_10V7KPM@C292 0.1U_0402_10V7KPM@ C291 0.1U_0402_10V7KPM@C291 0.1U_0402_10V7KPM@ C257 0.1U_0402_10V7KPM@C257 0.1U_0402_10V7KPM@ C256 0.1U_0402_10V7KPM@C256 0.1U_0402_10V7KPM@ C290 0.1U_0402_10V7KPM@C290 0.1U_0402_10V7KPM@ C289 0.1U_0402_10V7KPM@C289 0.1U_0402_10V7KPM@ C255 0.1U_0402_10V7KPM@C255 0.1U_0402_10V7KPM@ C254 0.1U_0402_10V7KPM@C254 0.1U_0402_10V7KPM@ C287 0.1U_0402_10V7KPM@C287 0.1U_0402_10V7KPM@ C288 0.1U_0402_10V7KPM@C288 0.1U_0402_10V7KPM@ C253 0.1U_0402_10V7KPM@C253 0.1U_0402_10V7KPM@ C252 0.1U_0402_10V7KPM@C252 0.1U_0402_10V7KPM@ C285 0.1U_0402_10V7KPM@C285 0.1U_0402_10V7KPM@ C286 0.1U_0402_10V7KPM@C286 0.1U_0402_10V7KPM@ C251 0.1U_0402_10V7KPM@C251 0.1U_0402_10V7KPM@ C250 0.1U_0402_10V7KPM@C250 0.1U_0402_10V7KPM@ C284 0.1U_0402_10V7KPM@C284 0.1U_0402_10V7KPM@ C283 0.1U_0402_10V7KPM@C283 0.1U_0402_10V7KPM@ C249 0.1U_0402_10V7K

C249 0.1U_0402_10V7K C248 0.1U_0402_10V7K

C248 0.1U_0402_10V7K C282 0.1U_0402_10V7KPM@C282 0.1U_0402_10V7KPM@ C281 0.1U_0402_10V7KPM@C281 0.1U_0402_10V7KPM@ C267 0.1U_0402_10V7KPM@C267 0.1U_0402_10V7KPM@ C266 0.1U_0402_10V7KPM@C266 0.1U_0402_10V7KPM@ C280 0.1U_0402_10V7KPM@C280 0.1U_0402_10V7KPM@ C279 0.1U_0402_10V7KPM@C279 0.1U_0402_10V7KPM@

12

PM@

PM@ PM@

PM@

1 2

R48 22_0402_5%@ R48 22_0402_5%@

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

12

R100

R100 10K_0402_5%

10K_0402_5%

PM@

CLK_PCIE_VGA<22> CLK_PCIE_VGA#<22>

PLT_RST#<8,26,32,33,40>

PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N15

CLK_PCIE_VGA CLK_PCIE_VGA#

1 2

R183 200_0402_5% PM@R183 200_0402_5% PM@ R504 2.4K_0402_1% PM@R504 2.4K_0402_1% PM@

PLT_RST#

10K_0402_5%

1 2

R173

@R173

@

PCIE_GTX_MRX_P0 PCIE_GTX_MRX_N0 PCIE_GTX_MRX_P1 PCIE_GTX_MRX_N1 PCIE_GTX_MRX_P2 PCIE_GTX_MRX_N2 PCIE_GTX_MRX_P3 PCIE_GTX_MRX_N3 PCIE_GTX_MRX_P4

PCIE_GTX_MRX_P5 PCIE_GTX_MRX_N5 PCIE_GTX_MRX_P6 PCIE_GTX_MRX_N6 PCIE_GTX_MRX_P7 PCIE_GTX_MRX_N7 PCIE_GTX_MRX_P8 PCIE_GTX_MRX_N8 PCIE_GTX_MRX_P9 PCIE_GTX_MRX_N9 PCIE_GTX_MRX_P10 PCIE_GTX_MRX_N10 PCIE_GTX_MRX_P11 PCIE_GTX_MRX_N11 PCIE_GTX_MRX_P12 PCIE_GTX_MRX_N12 PCIE_GTX_MRX_P13 PCIE_GTX_MRX_N13 PCIE_GTX_MRX_P14 PCIE_GTX_MRX_N14 PCIE_GTX_MRX_P15 PCIE_GTX_MRX_N15

12

XTALOUT XTALIN

4

U27A

AE12

PEX_RX0

AF12

PEX_RX0_N

AG12

PEX_RX1

AG13

PEX_RX1_N

AF13

PEX_RX2

AE13

PEX_RX2_N

AE15

PEX_RX3

AF15

PEX_RX3_N

AG15

PEX_RX4

AG16

PEX_RX4_N

AF16

PEX_RX5

AE16

PEX_RX5_N

AE18

PEX_RX6

AF18

PEX_RX6_N

AG18

PEX_RX7

AG19

PEX_RX7_N

AF19

PEX_RX8

AE19

PEX_RX8_N

AE21

PEX_RX9

AF21

PEX_RX9_N

AG21

PEX_RX10

AG22

PEX_RX10_N

AF22

PEX_RX11

AE22

PEX_RX11_N

AE24

PEX_RX12

AF24

PEX_RX12_N

AG24

PEX_RX13

AF25

PEX_RX13_N

AG25

PEX_RX14

AG26

PEX_RX14_N

AF27

PEX_RX15

AE27

PEX_RX15_N

AD10

PEX_TX0

AD11

PEX_TX0_N

AD12

PEX_TX1

AC12

PEX_TX1_N

AB11

PEX_TX2

AB12

PEX_TX2_N

AD13

PEX_TX3

AD14

PEX_TX3_N

AD15

PEX_TX4

AC15

PEX_TX4_N

AB14

PEX_TX5

AB15

PEX_TX5_N

AC16

PEX_TX6

AD16

PEX_TX6_N

AD17

PEX_TX7

AD18

PEX_TX7_N

AC18

PEX_TX8

AB18

PEX_TX8_N

AB19

PEX_TX9

AB20

PEX_TX9_N

AD19

PEX_TX10

AD20

PEX_TX10_N

AD21

PEX_TX11

AC21

PEX_TX11_N

AB21

PEX_TX12

AB22

PEX_TX12_N

AC22

PEX_TX13

AD22

PEX_TX13_N

AD23

PEX_TX14

AD24

PEX_TX14_N

AE25

PEX_TX15

AE26

PEX_TX15_N

AB10

PEX_REFCLK

AC10

PEX_REFCLK_N

AF10

PEX_TSTCLK_OUT

AE10

PEX_TSTCLK_OUT_N

AG10

PEX_TERMP

AD9

PEX_RST_N

D11

XTAL_SSIN

E9

XTAL_OUTBUFF

E10

XTAL_OUT

D10

XTAL_IN

NB9M-GS_BGA533

PM@

Part 1 of 5

GPIO

DACA_HSYNC DACA_VSYNC

DACA_RED

DACA_BLUE

DACA_GREEN

DACA_VREF DACA_RSET

DACB_CSYNC

DACB_RED

DACB_BLUE

DACB_GREEN

DACBI2CHDA DACADACC

DACB_VREF DACB_RSET

DACC_HSYNC DACC_VSYNC

DACC_RED

DACC_BLUE

DACC_GREEN

DACC_VREF DACC_RSET

I2CA_SCL I2CA_SDA I2CB_SCL

PCI EXPRESS

I2CB_SDA

I2CC_SCL I2CC_SDA I2CD_SCL I2CD_SDA I2CE_SCL I2CE_SDA I2CH_SCL I2CH_SDA I2CS_SCL I2CS_SDA

JTAG_TCK

JTAG_TDI

JTAG_TDO JTAG_TMS

JTAG_TRST_N

TEST

TESTMODE

VDD_SENSE

HDA_RST_N

HDA_SDI

CLK

HDA_SDO

HDA_SYNC HDA_BCLK

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19

SPDIF

3

N1 G1 C1 M2 M3 K3 K2 J2 C2 M1 D2 D1 J3 J1 K1 F3 G3 G2 F1 F2

AD2 AD1

AE2 AD3 AE3

AF1 AE1

D6 F7

E6 E7

G6 F8

U6 U4

T5 R4 T4

R6 V6

R1 T3 R2 R3 A2 B1 N2 N3 Y6 W6 A3 A4 T1 T2

AF3 AG4 AE4 AF4 AG3 AD25

F9 W15

C6 A6 B6 B7 A7

NV_INVTPWM VGA_ENVDD VGA_ENBKL

VGA_HSYNC VGA_VSYNC

VGA_CRT_R VGA_CRT_B VGA_CRT_G

DACA_VREF DACA_RSET

R116 2.2K_0402_5% PM@R116 2.2K_0402_5% PM@ R119 2.2K_0402_5% PM@R119 2.2K_0402_5% PM@

R196 2.2K_0402_5% PM@R196 2.2K_0402_5% PM@ R193 2.2K_0402_5% PM@R193 2.2K_0402_5% PM@

SPDIF_IN +VGASENSE

HDA_RST_CODEC# HDA_SDIN1_R HDA_SDOUT_CODEC HDA_SYNC_CODEC HDA_BITCLK_CODEC

VGA_DDCCLK VGA_DDCDATA

1 2

VGA_LVDS_SCL VGA_LVDS_SDA

1 2

VGA_HDMI_SCL VGA_HDMI_SDA

HDCP_SMB_CK1 HDCP_SMB_DAI EC_SMB_CK2 EC_SMB_DA2

JTAG_TCK JTAG_TDO JTAG_TRST_N

TESTMODE

10P_0402_50V8J

R503 124_0402_1%PM@R503 124_0402_1%PM@

R86 33_0402_5%

C86

HDMI_DETECT_VGA <23>

PAD

T86

VGA_ENVDD <24> VGA_ENBKL <24>

PAD

T29

VGA_HSYNC <25> VGA_VSYNC <25>

VGA_CRT_R <25> VGA_CRT_B <25> VGA_CRT_G <25>

PM@

12

C648 0.1U_0402_16V4Z

EC_SMB_CK2 <5,35,41> EC_SMB_DA2 <5,35,41>

PAD

PM@R616

PM@

PAD

PM@

1 2

1

2

PAD

10K_0402_5%

T28

1 2

R616

VGA_DDCCLK <25> VGA_DDCDATA <25>

VGA_LVDS_SCL <24> VGA_LVDS_SDA <24>

VGA_HDMI_SCL <23> VGA_HDMI_SDA <23>

T60

T60 T59

T59 T92

T92

CRT OUT

+3VS

+VGASENSE

HDA_RST_CODEC# <8,27,30> HDA_SDIN1 <27> HDA_SDOUT_CODEC <8,27,30> HDA_SYNC_CODEC <8,27,30> HDA_BITCLK_CODEC <8,27,30>

2

HDCP_SMB_CK1 HDCP_SMB_DAI

2.2K_0402_5%

PM@

1

VGA_CRT_R VGA_CRT_G VGA_CRT_B

+3VS

R75

R69

2.2K_0402_5%

PM@

R71

2.2K_0402_5%

@

12

R65

R65 10K_0402_5%

10K_0402_5%

@

R164 150_0402_1%PM@R164 150_0402_1%PM@

1 2

R168 150_0402_1%PM@R168 150_0402_1%PM@

1 2

R180 150_0402_1%PM@R180 150_0402_1%PM@

1 2

PM@ C79

PM@

1 2

U4

8 7 6 5

AT24C16AN-10SU-2.7_SO8

PM@

C79

0.1U_0402_16V4Z

VCC WP SCL SDA

GND

1

A0

2

A1

3

A2

4

12

R70

100K_0402_1% PM@

External Spread Spectrum

Y3

PM@

OUT GND

Y3

4

GND

1

IN

18P_0402_50V8J

PM@

C614

OSC_OUT

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

2

3 2

27MHZ_16PF_X7S027000BG1H-U

1

C612

A A

18P_0402_50V8J

PM@

5

C612

2

U3

1

REFOUT

2

XOUT

3

XIN/CLKIN

ASM3P2872AF-06OR_TSOT-23-6@U3ASM3P2872AF-06OR_TSOT-23-6@

Title

NB9M-GS PCIE,LVDS,GPIO,CLK

Size Document Number Rev

B

Date: Sheet

6

VSS

MODOUT

VDD

Compal Electronics, Inc.

JITR1_LA-4141P

5 4

@

OSC_SPREAD

1 2

R55 22_0402_5%

1

+3VS

2

C66

0.1U_0402_16V4Z

1

@

16 52Wednesday, May 07, 2008

of

0.1

5

4

3

2

1

FBAD[0..63]

FBAA[0..12]

FBBA[2..5]

FBADQS[0..7]

D D

FBAD0

D21

FBAD1

C22

FBAD2

B22

FBAD3

A22

FBAD4

C24

FBAD5

B25

FBAD6

A25

FBAD7

A26

FBAD8

D22

FBAD9

E22

FBAD10

E24

FBAD11

D24

FBAD12

D26

FBAD13

D27

FBAD14

C27

FBAD15

B27

FBAD16

D16

FBAD17

E16

FBAD18

D17

FBAD19

F18

FBAD20

D20

FBAD21

C C

B B

FBAD22 FBAD23 FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31 FBAD32 FBAD33 FBAD34 FBAD35 FBAD36 FBAD37 FBAD38 FBAD39 FBAD40 FBAD41 FBAD42 FBAD43 FBAD44 FBAD45 FBAD46 FBAD47 FBAD48 FBAD49 FBAD50 FBAD51 FBAD52 FBAD53 FBAD54 FBAD55 FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63

W22 W23

W24 AA22 AB23 AB24 AC24

W25

W26

W27 AA25 AB25 AB26 AD26 AD27

F20 E21 F21 C16 B18 C18 D18 C19 C21 B21 A21 P22 P24 R23 R24 T23 U24 V23 V24 N25 N26 R25 R26 T25 V26 V25 V27 V22

U27B

FBA_D0

Part 2 of 5

FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

NB9M-GS_BGA533

PM@

FBADQS#[0..7]

FBADQM#[0..7]

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_DQS_RN0 FBA_DQS_RN1

MEMORY INTERFACE

FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_CLK0_N

FBA_CLK1_N FBA_DEBUG

FB_VREF

FBA_CLK0

FBA_CLK1

FBAD[0..63] <20,21>

FBAA[0..12] <20,21>

FBBA[2..5] <21>

FBADQS[0..7] <20,21>

FBADQS#[0..7] <20,21>

FBADQM#[0..7] <20,21>

FBAA3

F26

FBAA0

J24

FBAA2

F25

FBAA1

M23

FBBA3

N27

FBBA4

M27

FBBA5

K26

FBACS1#

J25

FBACS0#

J27

FBAWE#

G23

FBA_BA0

G26

FBA_CKE

J23

AODT0 FBAODT0

R494

M25 K27 G25 L24 K23 K24 G22 K25 H22 M26 H24 F27 J26 G24 G27 M24 K22

D23 C26 D19 B19 T24 T26 AA23 AB27

B24 D25 E18 A18 R22 R27 Y24 AA27

A24 C25 E19 A19 T22 T27 AA24 AA26

A16 F24

F23 N24

N23 M22

R494

1 2

FBBA2 FBAA12 FBARAS# FBAA11 FBAA10 FBA_BA1 FBAA8 FBAA9 FBAA6 FBAA5 FBAA7 FBAA4 FBACAS#

FBABA2

FBADQM#0 FBADQM#1 FBADQM#2 FBADQM#3 FBADQM#4 FBADQM#5 FBADQM#6 FBADQM#7

FBADQS#0 FBADQS#1 FBADQS#2 FBADQS#3 FBADQS#4 FBADQS#5 FBADQS#6 FBADQS#7

FBADQS0 FBADQS1 FBADQS2 FBADQS3 FBADQS4 FBADQS5 FBADQS6 FBADQS7

FB_VREF1

FBA_DEBUG

1 2

R113 10K_0402_5%

PM@

PAD

T33

FBACS0# <20,21> FBAWE# <20,21> FBA_BA0 <20,21>

0_0402_5%PM@

FBARAS# <20,21>

FBA_BA1 <20,21>

FBACAS# <20,21> FBABA2 <20,21>

FBACLK0 <20> FBACLK0# <20>

FBACLK1 <21> FBACLK1# <21>

FBAODT0

12

R129

R129 10K_0402_5%

10K_0402_5%

PM@

VGA_LVDS_ACLK<24> VGA_LVDS_ACLK#<24> VGA_LVDS_A0<24> VGA_LVDS_A0#<24> VGA_LVDS_A1<24> VGA_LVDS_A1#<24> VGA_LVDS_A2<24> VGA_LVDS_A2#<24>

VGA_HDMI_TX2+<23> VGA_HDMI_TX2-<23> VGA_HDMI_TX1+<23> VGA_HDMI_TX1-<23> VGA_HDMI_TX0+<23> VGA_HDMI_TX0-<23> VGA_HDMI_CLK+<23> VGA_HDMI_CLK-<23>

FBAODT0 <20,21>

FBA_CKE<20,21>

12

R118

R118 10K_0402_5%

10K_0402_5%

PM@

C269~C276 NEAR CONNECT

R186~R195 NEAR CONNECT PULL DOWN

TMDS pull down (500ohm) resistors G9x only

+1.8VS

VGA_LVDS_ACLK VGA_LVDS_ACLK# VGA_LVDS_A0 VGA_LVDS_A0# VGA_LVDS_A1 VGA_LVDS_A1# VGA_LVDS_A2 VGA_LVDS_A2#

VGA_HDMI_TX2+ VGA_HDMI_TX2VGA_HDMI_TX1+ VGA_HDMI_TX1VGA_HDMI_TX0+ VGA_HDMI_TX0VGA_HDMI_CLK+ VGA_HDMI_CLK-

R182 1K_0402_5%@R182 1K_0402_5%@

1 2

R98 1K_0402_5%@R98 1K_0402_5%@

1 2

R102 1K_0402_5%

1 2

PM@

U27C

AC4

IFPA_TXC

AD4

IFPA_TXC_N

V5

IFPA_TXD0

V4

IFPA_TXD0_N

AA5

IFPA_TXD1

AA4

IFPA_TXD1_N

W4

IFPA_TXD2

Y4

IFPA_TXD2_N

AB4

IFPA_TXD3

AB5

IFPA_TXD3_N

AB3

IFPB_TXC

AB2

IFPB_TXC_N

W1

IFPB_TXD4

V1

IFPB_TXD4_N

W3

IFPB_TXD5

W2

IFPB_TXD5_N

AA2

IFPB_TXD6

AA3

IFPB_TXD6_N

AB1

IFPB_TXD7

AA1

IFPB_TXD7_N

P4

IFPC_L0

N4

IFPC_L0_N

M5

IFPC_L1

M4

IFPC_L1_N

L4

IFPC_L2

K4

IFPC_L2_N

H4

IFPC_L3

J4

IFPC_L3_N

F5

IFPE_L0

F4

IFPE_L0_N

E4

IFPE_L1

D5

IFPE_L1_N

C3

IFPE_L2

C4

IFPE_L2_N

B3

IFPE_L3

B4

IFPE_L3_N

AB6

IFPAB_RSET

M6

IFPE_RSET

R5

IFPC_RSET

NB9M-GS_BGA533

PM@

Part 3 of 5

NC

STARP_REF_MIOB

STARP_REF_3V3

BUFRST_N

GENERAL STRAP

ROM_CS_N ROM_SCLK

L V D S / T M D S

SERIAL

IFPE_AUX_N IFPC_AUX_N

STRAP0 STRAP1 STRAP2

THERMDN THERMDP

ROM_SI

ROM_SO

IFPE_AUX

IFPC_AUX

C15

NC

D15

NC

E15

NC

F6

NC

J5

NC

J22

NC

L22

NC

T6

NC

AA6

NC

AC19

NC

AE9

NC

AG9

NC

STRAP0

C7

STRAP1

B9

STRAP2

A9

F10 F11

N5

PAD

T36

PAD

PAD PAD

PAD

ROM_SCLK ROM_SI ROM_SO

T36 T24

T24 T85

T85

D8 D9

B10 C9 A10 C10

D4 D3 G5 G4

STRAP0 <19> STRAP1 <19> STRAP2 <19>

12

R88

40.2K_0402_1%

PM@

ROM_SCLK <19>

ROM_SI <19>

ROM_SO <19>

12

R91

40.2K_0402_1%

PM@

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

NB9M-GS Memory

JITR1_LA-4141P

1

0.1

of

17 52Friday, May 02, 2008

5

4

3

2

1

+VGA_CORE

11.57A NEAR BALL

0.1U_0402_16V4Z

220U_D2_4VM

C606

220U_D2_4VM

D D

C C

110mA

+1.8VS

B B

+1.8VS

+1.1VS

A A

L32

MBK1608121YZF_0603

1 2

PM@

NEAR BGA

110mA

4.7U 6.3V K X5R 0603

L15

MBK1608121YZF_0603

1 2

NEAR BGA NEAR BALL 260mA

PM@

4.7U 6.3V K X5R 0603

MBK1608121YZF_0603

1 2

PM@

L9

MBK1608121YZF_0603

PM@

1 2

NEAR BGA

1

2

1

2

L13

4.7U 6.3V K X5R 0603

4700P_0402_25V7K

C634

PM@

4700P_0402_25V7K

C309

PM@

1

C231

PM@

2

1

C115

PM@

2

5

0.1U_0402_16V4Z

1

+

C182

PM@

2

0.1U_0402_16V4Z

0.47U_0402_6.3V6K

1

C144

PM@

2

0.47U_0402_6.3V6K

+3VS

2

C93

PM@

1

C633

PM@

2

1

C302

PM@

2

4700P_0402_25V7K

1

2

4700P_0402_25V7K

1

2

C135

PM@

C153

PM@

1U_0603_10V4Z

NEAR BALL

+IFPAB_PLLVDD

C173

PM@

C112

PM@

470P_0402_50V7K

0.1U_0402_16V4Z

1

2

1

2

0.47U_0402_6.3V6K

1

2

4.7U 6.3V K X5R 0603

0.1U_0402_16V4Z

470P_0402_50V7K

C141

PM@

0.47U_0402_6.3V6K

1

C160

C166

PM@

2

4.7U 6.3V K X5R 0603

1

C169

C133

PM@

2

1

C105

PM@

2

C632

PM@

+IFPC_IOVDD

1

C117

PM@

2

NEAR BALL

1

C148

PM@

2

0.1U_0402_16V4Z

1

C165

PM@

2

0.47U_0402_6.3V6K

NEAR BGA

NEAR BALLNEAR BGA

1

C120

PM@

2

0.1U_0402_16V4Z

12~16mil

+IFPC_PLLVDD

0.1U_0402_16V4Z

1

C146

PM@

2

0.1U_0402_16V4Z

1

2

1

C147

PM@

2

C186

PM@

0.47U_0402_6.3V6K

+IFPA_IOVDD +IFPB_IOVDD +IFPC_IOVDD

+IFPAB_PLLVDD

4

R10910K_0402_5%

R18110K_0402_5%

+PEX_PLLVDD

NEAR BALL

+IFPB_IOVDD

12

R622

R622 10K_0402_5%

10K_0402_5%

PM@

12

PM@

12

U27D

J9

VDD

J10

VDD

J12

VDD

J13

VDD

L9

VDD

M9

VDD

M11

VDD

M17

VDD

N9

VDD

N11

VDD

N12

VDD

N13

VDD

N14

VDD

N15

VDD

N16

VDD

N17

VDD

N19

VDD

P11

VDD

P12

VDD

P13

VDD

P14

VDD

P15

VDD

P16

VDD

P17

VDD

R9

VDD

R11

VDD

R12

VDD

R13

VDD

R14

VDD

R15

VDD

R16

VDD

R17

VDD

T9

VDD

T11

VDD

T17

VDD

U9

VDD

U19

VDD

W9

VDD

W10

VDD

W12

VDD

W13

VDD

W18

VDD

W19

VDD

A12

VDD33

B12

VDD33

C12

VDD33

D12

VDD33

E12

VDD33

F12

VDD33

V3

IFPA_IOVDO

V2

IFPB_IOVDD

J6

IFPC_IOVDD

H6

IFPE_IOVDD

AD5

IFPAB_PLLVDD

P6

IFPC_PLLVDD

N6

IFPE_PLLVDD

NB9M-GS_BGA533

PM@

0.1U_0402_16V4Z

1

C657

PM@

2

0.01U_0402_16V7K

Part 4 of 5

POWER

FB_CAL_PD_VDDQ

1

C660

PM@

2

A13

FBVDDQ

B13

FBVDDQ

C13

FBVDDQ

D13

FBVDDQ

D14

FBVDDQ

E13

FBVDDQ

F13

FBVDDQ

F14

FBVDDQ

F15

FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD

PEX_PLLVDD

VID_PLLVDD

SP_PLLVDD

PLLVDD

FB_PLLAVDD

FB_DLLAVDD

DACA_VDD DACB_VDD DACC_VDD

C748

1U_0402_6.3V4Z

1

2

F16 F17 F19 F22 H23 H26 J15 J16 J18 J19 L19 L23 L26 M19 N22 U22 Y22

AG6 AF6 AE6 AD6 AC13 AC7 AB17 AB16 AB13 AB9 AB8 AB7 AG7 AF7 AE7 AD8 AD7 AC9

AF9 K6 L6 K5

R19 T19 AG2

D7 W5

B15

10U_0805_10V4Z

PM@

+PEX_PLLVDD

12~16mil

+FB_PLLAVDD +FB_DLLAVDD +DACA_VDD

+DACB_VDD +DACC_VDD+IFPC_PLLVDD

PM@

1 2

1

C671

PM@

2

4700P_0402_25V7K

MBK1608121YZF_0603

NEAR BGA

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

0.022U_0402_16V7K

1

C128

PM@

2

0.022U_0402_16V7K

C134

PM@

1

2

1

C125

PM@

2

0.1U_0402_16V4Z

1

C124

PM@

2

4.7U 6.3V K X5R 0603

PLACE BELOW GPU

4700P_0402_25V7K

1

C111

PM@

2

1

C140

PM@

2

PM@

0.1U_0402_16V4Z

PM@

1 2

R101 10K_0402_5%

1 2

R130 10K_0402_5%PM@R130 10K_0402_5%PM@ R93

R93

30_0402_1%

L38

1 2

PM@

2007/10/15 2008/10/15

4700P_0402_25V7K

1

C108

PM@

2

4700P_0402_25V7K

0.022U_0402_16V7K

1

C139

PM@

2

4700P_0402_25V7K

0.1U_0402_16V4Z

1

C212

PM@

2

1U_0402_6.3V4Z

1

C200

PM@

2

0.1U_0402_16V4Z

1

C132

PM@

2

0.1U_0402_16V4Z

+1.8VS

+1.1VS

1

C109

C127

PM@

2

0.022U_0402_16V7K

1

C119

PM@

2

0.47U_0402_6.3V6K

C123

PM@

1U_0402_6.3V6K

0.47U_0402_6.3V6K

1

C138

PM@

2

Deciphered Date

1

C203

2

1

2

Compal Secret Data

1

2

1

C202

PM@

2

0.47U_0402_6.3V6K

NEAR BALL

1U_0402_6.3V6K

1

C145

PM@

2

+FB_PLLAVDD

+FB_DLLAVDD

4.7U 6.3V K X5R 0603

4.7U 6.3V K X5R 0603 C131

C131

PM@

1

2

1

C107

@

2

FBAVDDQ=1.72A

1U_0603_10V4Z

1

C118

C142

PM@

2

0.1U_0402_16V4Z

PM@

1U_0402_6.3V6K

1U_0603_10V4Z

1

C106

C97

PM@

2

1

C201

2

1

C262

PM@

2

4.7U 6.3V K X5R 0603

MBK1608121YZF_0603

L10

1

NEAR BALL

C122

PM@

2

1

C154

PM@

2

0.01U_0402_16V7K

1

C189

PM@

2

0.01U_0402_16V7K

150mA

2

PLACE NEAR BGA

+1.8VS

1

2

+1.8VS

1

2

PEX_IOVDDQ=1.6A PEX_IOVDD=500mA PEX_PLLVDD=100mA

10U_0805_10V4Z

1

C270

PM@

2

PLLVDD=65mA

PM@L10

PM@

C295

PM@

10U_0805_10V4Z

+1.1VS

12

SP_PLLVDD=25mA VID_PLLVDD=50mA

0.1U_0402_16V4Z

1

C172

PM@

2

0.1U_0402_16V4Z

1

C190

PM@

2

+DACA_VDD

4.7U 6.3V K X5R 0603

470P_0402_50V7K

Title

Size Document Number Rev

Custom

Date: Sheet

MBK1608121YZF_0603

1

C174

PM@

2

MBK1608121YZF_0603

1

C205

PM@

2

4700P_0402_25V7K

1

C652

PM@

2

Compal Electronics, Inc.

+1.1VS

1

2

L11

1 2

PM@

L14

1 2

PM@

MBK1608121YZF_0603

4.7U 6.3V K X5R 0603

1

C651

PM@

2

NB9M-GS Power

1

+1.1VS

L37

+3VS

PM@

1

C664

PM@

2

12

0.1

18 52Monday, May 05, 2008

0.1

of

5

4

3

2

1

A total of 8 signals are required for GB1 strapping this includes

2 reference signals 6 physical strapping pins

U27E

B2

GND

Part 5 of 5

B5

GND

B8

GND

B11

GND

B14

GND

B17

D D

C C

GND

B20

GND

B23

GND

B26

GND

E2

GND

E5

GND

E8

GND

E11

GND

E14

GND

E17

GND

E20

GND

E23

GND

E26

GND

H2

GND

H5

GND

J11

GND

J14

GND

J17

GND

K9

GND

K19

GND

L2

GND

L5

GND

L11

GND

L12

GND

L13

GND

L14

GND

L15

GND

L16

GND

L17

GND

M12

GND

M13

GND

M14

GND

M15

GND

M16

GND

P2

GND

P5

GND

P9

GND

P19

GND

P23

GND

P26

GND

T12

GND

T13

GND

NB9M-GS_BGA533

PM@

FB_CAL_PU_GND

FB_CAL_TERM_GND

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

GND

GND GND GND GND GND GND GND GND GND GND GND GND

GND_SENSE

U2 U5 U11 U12 U13 U14 U15 U16 U17 U23 U26 V9 V19 W11 W14 W17 Y2 Y5 Y23 Y26 AC2 AC5 AC6 AC8 AC11 AC14 AC17 AC20 AC23 AC26 AF2 AF5 AF8 AF11 AF14 AF17 AF20 AF23 AF26 T16 T15 T14

R161 0_0402_5%PM@R161 0_0402_5%PM@

W16

R97 30_0402_1%PM@R97 30_0402_1%PM@

A15

R96 40.2_0402_1%

B16

1 2

1 2 1 2

@

4 logical strapping bits

A total of 24 logical strapping bits are available

+3VS

12

R62

R60

10K_0402_1%

R59

@

10K_0402_5%

12

R60

@

10K_0402_5%

R57

PM@

10K_0402_1%

PM@

STRAP2<17> STRAP1<17> STRAP0<17> ROM_SCLK<17>

ROM_SI<17>

ROM_SO<17>

STRAP2 STRAP1 STRAP0 ROM_SCLK ROM_SI ROM_SO

12

GB1 Family GPU Strap Qptions

GPU

NB9M-GS (0x06E9)

Samsung

Hynix

Qimonda

FB Memory

16Mx16(1)

32Mx16(5)

16Mx16(3)

32Mx16(7)

16Mx16(2)

32Mx16(6)

ROM_SO ROM_SCLK ROM_SI STRAP2 STRAP1 STRAP0

PU 5K

12

R485

45.3K_0402_1%~D

12

R481

@

PD 15K

PM@

10K_0402_5%

12

R61

@

10K_0402_5%

R58

PM@

15K_0402_1%

X76

PD 10K

PD 30K

PD 20K

PD 45K

PD 15K

PD 35K

12

R54

@

2K_0402_5%

R51

X76@

20K_0402_1%

12

R53

PM@

12

R50

@

PU 10K

4.99K_0402_1%

2K_0402_5%

PD 10K

PU 45K

B B

A A

5

4

Component

DDR2 VRAM (32M*16)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Manufacturer Compal PN

Hynix Qimonda Samsung

2007/10/15 2008/10/15

3

SA000012G30 SA00001YF10 SA00001KH10

Compal Secret Data

Deciphered Date

Compal X76 PN

X7611338L04 X7611338L05 X7611338L06

2

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

NB9M-GE GND & STRAP

JITR1_LA-4141P

1

of

19 52Friday, May 02, 2008

0.1

5

FBA_BA0 FBA_BA1

FBAA12 FBAA11 FBAA10 FBAA9 FBAA8 FBAA7 FBAA6 FBAA5 FBAA4 FBAA3

D D

+1.8VS

12

R480

+VRAM_VREFA +VRAM_VREFA

C C

R479

1K_0402_1%

PM@

R480

1K_0402_1%

PM@

12

1

C613

0.047U_0402_16V4Z

PM@

2

Close to U6 Close to U4

FBABA2<17,21> FBABA2<17,21>

FBAA2 FBAA1 FBAA0

FBACLK0# FBACLK0

FBA_CKE

FBACS0# FBAWE# FBARAS# FBACAS# FBADQM#1

FBADQM#0

FBAODT0

FBADQS1 FBADQS#1

FBADQS0 FBADQS#0

(SSTL-1.8) VREF = .5*VDDQ

FBABA2 FBABA2

U6

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25X76@U6HY5PS561621F-25X76@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

DDR2 BGA MEMORY

+1.8VS

0.01U_0402_16V7K

1

C621

PM@

2

1000P_0402_50V7K

B B

1000P_0402_50V7K

1

C622

C624

PM@

2

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

2

1

C626

PM@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C625

PM@

2

C619

PM@

0.1U_0402_16V4Z

4

FBAD7

B9

FBAD3

B1

FBAD4

D9

FBAD0

D1

FBAD1

D3

FBAD6

D7

FBAD2

C2

FBAD5

C8

FBAD10

F9

FBAD15

F1

FBAD8

H9

FBAD13

H1

FBAD12

H3

FBAD9

H7

FBAD14

G2

FBAD11

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

1

2

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

1

C620

PM@

2

+1.8VS +1.8VS

1

+

C184

PM@

C184

PM@

220U_D2_4VM_R15

2

1

C617

C630

0.1U_0402_16V4Z

PM@

1

C615

PM@

2

0.01U_0402_16V7K

C617 1U_0402_6.3V4Z

1U_0402_6.3V4Z

PM@

2

(SSTL-1.8) VREF = .5*VDDQ

1

C91

0.047U_0402_16V4Z

PM@

2

+1.8VS

0.01U_0402_16V7K

1

C110

PM@

2

1000P_0402_50V7K

FBA_BA0 FBA_BA1

FBAA12 FBAA11 FBAA10 FBAA9 FBAA8 FBAA7 FBAA6 FBAA5 FBAA4 FBAA3 FBAA2 FBAA1 FBAA0

FBACLK0# FBACLK0

FBA_CKE

FBACS0# FBAWE# FBARAS# FBACAS# FBADQM#2

FBADQM#3

FBAODT0

FBADQS2 FBADQS#2

FBADQS3

1

C113

PM@

2

0.01U_0402_16V7K

3

0.1U_0402_16V4Z

1

C130

PM@

2

L2 L3

R2 P7 M2 P3 P8 P2 N7 N3 N8 N2 M7 M3 M8

K8

J8

K2

L8 K3 K7

L7 F3

B3

K9

F7 E8

B7 A8

J2 A2

E2

L1 R3 R7 R8

1

2

U28

BA0 BA1

A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

CK CK

CKE

CS WE RAS CAS LDM

UDM

ODT

LDQS LDQS

UDQS UDQS

VREF NC#A2

NC#E2 NC#L1 NC#R3 NC#R7 NC#R8

HY5PS561621F-25X76@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

DDR2 BGA MEMORY

0.1U_0402_16V4Z

1

C143

C103

C137

PM@

1U_0402_6.3V4Z

C103

PM@

2

0.1U_0402_16V4Z

2

FBAD25

B9

FBAD29

B1

FBAD24

D9

FBAD31

D1

FBAD28

D3

FBAD27

D7

FBAD30

C2

FBAD26

C8

FBAD18

F9

FBAD23

F1

FBAD17

H9

FBAD21

H1

FBAD19

H3

FBAD16

H7

FBAD22

G2

FBAD20

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

1

C92

0.1U_0402_16V4Z

PM@

2

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

1

C158

C100

PM@

2

0.01U_0402_16V7K

1

C98

C98 1U_0402_6.3V4Z

1U_0402_6.3V4Z

PM@

2

FBACLK0<17>

FBACLK0#<17>

FBBA[2..5]<17,21>

FBAD[0..63]<17,21>

FBAA[0..12]<17,21>

FBADQS[0..7]<17,21>

FBADQS#[0..7]<17,21>

FBADQM#[0..7]<17,21>

FBA_BA0<17,21>

FBA_BA1<17,21> FBAODT0<17,21> FBA_CKE<17,21> FBARAS#<17,21> FBACAS#<17,21> FBAWE#<17,21> FBACS0#<17,21>

Close to U5

12

R104

R104 475_0402_1%

475_0402_1%

PM@

FBBA[2..5]

FBAD[0..63]

FBAA[0..12]

FBADQS[0..7]

FBADQS#[0..7]

FBADQM#[0..7]

FBA_BA0 FBA_BA1

FBAODT0

FBA_CKE FBARAS# FBACAS#

FBAWE#

FBACS0#FBADQS#3

FBACLK0

FBACLK0#

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

VRAM DDRA

JITR1_LA-4141P

1

of

20 52Friday, May 02, 2008

0.1

5

FBA_BA0 FBA_BA1

FBAA12 FBAA11 FBAA10 FBAA9 FBAA8 FBAA7 FBAA6 FBBA5 FBBA4 FBBA3

D D

+1.8VS

12

R184

+VRAM_VREFB

C C

R190

1K_0402_1%

PM@

R184

1K_0402_1%

PM@

12

1

C319

0.047U_0402_16V4Z

PM@

2

Close to U3 Close to U7

FBABA2<17,20> FBABA2<17,20>

FBBA2 FBAA1 FBAA0

FBACLK1# FBACLK1

FBA_CKE

FBACS0# FBAWE# FBARAS# FBACAS# FBADQM#7

FBADQM#5

FBAODT0

FBADQS7 FBADQS#7

FBADQS5 FBADQS#5

(SSTL-1.8) VREF = .5*VDDQ

FBABA2 FBABA2

U29

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25X76@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

DDR2 BGA MEMORY

+1.8VS

0.01U_0402_16V7K

1

C272

PM@

2

B B

1000P_0402_50V7K

2

1

C234

C225

PM@

2

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

2

1

C304

PM@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C269

PM@

2

C263

PM@

0.1U_0402_16V4Z

4

FBAD40

B9

FBAD45

B1

FBAD41

D9

FBAD46

D1

FBAD47

D3

FBAD43

D7

FBAD44

C2

FBAD42

C8

FBAD61

F9

FBAD62

F1

FBAD58

H9

FBAD56

H1

FBAD59

H3

FBAD57

H7

FBAD63

G2

FBAD60

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

1

C305

0.1U_0402_16V4Z

PM@

2

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

1

C224

C224 1U_0402_6.3V4Z

1U_0402_6.3V4Z

PM@

2

+VRAM_VREFB

1

2

(SSTL-1.8) VREF = .5*VDDQ

C672

0.047U_0402_16V4Z

PM@

FBA_BA0 FBA_BA1

FBAA12 FBAA11 FBAA10 FBAA9 FBAA8 FBAA7 FBAA6 FBBA5 FBBA4 FBBA3 FBBA2 FBAA1 FBAA0

FBACLK1# FBACLK1

FBA_CKE

FBACS0# FBAWE# FBARAS# FBACAS# FBADQM#6

FBADQM#4

FBAODT0

FBADQS6 FBADQS#6

FBADQS4 FBADQS#4

3

U7

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25X76@U7HY5PS561621F-25X76@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

FBAD39

B9

FBAD34

B1

FBAD38

D9

FBAD35

D1

FBAD32

D3

FBAD36

D7

FBAD33

C2

FBAD37

C8

FBAD55

F9

FBAD51

F1

FBAD52

H9

FBAD50

H1

FBAD49

H3

FBAD54

H7

FBAD48

G2

FBAD53

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

1

C654

0.1U_0402_16V4Z

PM@

2

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

2

FBAD[0..63]<17,20>

FBAA[0..12]<17,20>

FBBA[2..5]<17>

FBADQS[0..7]<17,20>

+1.8VS+1.8VS

1

C655

C655 1U_0402_6.3V4Z

1U_0402_6.3V4Z

PM@

2

FBADQS#[0..7]<17,20>

FBADQM#[0..7]<17,20>

FBA_BA0<17,20> FBA_BA1<17,20>

FBAODT0<17,20> FBA_CKE<17,20> FBARAS#<17,20> FBACAS#<17,20> FBAWE#<17,20> FBACS0#<17,20>

1

FBAD[0..63]

FBAA[0..12]

FBBA[2..5]

FBADQS[0..7]

FBADQS#[0..7]

FBADQM#[0..7]

FBA_BA0

FBA_BA1 FBAODT0 FBA_CKE

FBARAS# FBACAS#

FBAWE#

FBACS0#

DDR2 BGA MEMORY

1

2

C239

PM@

1

C233

PM@

2

0.01U_0402_16V7K

+1.8VS

0.01U_0402_16V7K

1

C668

PM@

2

1000P_0402_50V7K

1

C666

PM@

2

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

C665

PM@

2

1

C659

PM@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C656

PM@

2

1

C647

PM@

2

0.1U_0402_16V4Z

1

2

C642

PM@

1

C667

PM@

2

0.01U_0402_16V7K

FBACLK1<17>

12

R154

R154 475_0402_1%

475_0402_1%

PM@

FBACLK1#<17>

Close to U7

FBACLK1

FBACLK1#

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

VRAM DDRB

JITR1_LA-4141P

1

of

21 52Friday, May 02, 2008

0.1

5

PCI

SRC

CPU

CLKSEL1

0

FSA

CLKSEL0

MHz

266

MHz

1000

MHz

33.30

14.318 96.0 48.0

DOT_96 MHz

USB MHz

FSC FSB REF

CLKSEL2

0 1000 133 33.31 14.318 96.0 48.0

0 1001 200 33.30 14.318 96.0 48.0

0 1001 166 33.31 14.318 96.0 48.0

D D

1 1000 333 33.30 14.318 96.0 48.0

1 1000 100 33.31 14.318 96.0 48.0

1 1001 400 33.30 14.318 96.0 48.0

111

Reserved

4

+3VM_CK505

1 2

+3VS

+1.5VS

+VCCP

R364 0_0805_5%R364 0_0805_5%

1 2

R306 0_0805_5%

1 2

R389 0_0805_5%R389 0_0805_5%

1

C419

C419 10U_0805_10V4Z

10U_0805_10V4Z

2

@

+1.5VM_CK505

1

C421

C421 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C422

0.1U_0402_16V4Z

2

1

C423

0.1U_0402_16V4Z

2

3

1

C472

0.1U_0402_16V4Z

2

1

C438

0.1U_0402_16V4Z

2

1

C425

0.1U_0402_16V4Z

2

1

C457

0.1U_0402_16V4Z

2

1

C463

0.1U_0402_16V4Z

2

1

C420

0.1U_0402_16V4Z

2

1

C474

0.1U_0402_16V4Z

2

1

C471

0.1U_0402_16V4Z

2

1

+3VS

1

C473

0.1U_0402_16V4Z

2

1

C444

0.1U_0402_16V4Z

2

ICH_SMBDATA<28,32,40>

ICH_SMBCLK<28,32,40>

2N7002DW-T/R7_SOT363-6

+3VS

2N7002DW-T/R7_SOT363-6

2.2K_0402_5%

Q27A

6 1

2 5

3

Q27B

R278

R263

2.2K_0402_5%

CLK_SMBDATA

4

CLK_SMBCLK

SA000020K00 (Silego : SLG8SP556VTR ) SA000020H00 (ICS : ICS9LPRS387AKLFT)

+3VM_CK505

C C

FSA

CPU_BSEL0<6>

CPU_BSEL1<6>

B B

A A

FSC

CPU_BSEL2<6>

+VCCP

R261

R267

2.2K_0402_5%

1 2

R257

R257 0_0402_5%

0_0402_5%

1 2

R367

R367 0_0402_5%

0_0402_5%

R311

R311 10K_0402_5%

10K_0402_5%

1 2

R296

R296 0_0402_5%

0_0402_5%

14.31818MHZ_16PF_DSX840GA

R261 56_0402_5%

56_0402_5%

@

1 2

12

1 2

R262

R262 1K_0402_5%

FSB

1K_0402_5%

12

R268

R268 1K_0402_5%

1K_0402_5%

@

+VCCP

R376

R376 1K_0402_5%

1K_0402_5%

@

1 2

R366

R366 1K_0402_5%

1K_0402_5%

12

R375

R375 0_0402_5%

0_0402_5%

@

+VCCP

R312

R312 1K_0402_5%

1K_0402_5%

@

1 2

12

R303

R303 1K_0402_5%

1K_0402_5%

12

R302

R302 0_0402_5%

0_0402_5%

@

C464 22P_0402_50V8JC464 22P_0402_50V8J

C476 22P_0402_50V8JC476 22P_0402_50V8J

Y2

Routing the trace at least 10mil

5

MCH_CLKSEL0 <8>

MCH_CLKSEL1 <8>

MCH_CLKSEL2 <8>

CLK_XTAL_IN

12

CLK_XTAL_OUT

CLK_48M_ICH<28>

CLK_14M_ICH<28> CLK_14M_SIO<37>

CK_PWRGD<28>

H_STP_CPU#<28>

H_STP_PCI#<28>

CLK_PCI_DB<37> CLK_PCI_1394<36> CLK_PCI_LPC<35> CLK_PCI_ICH<26>

For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#

For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# Pin28/29 : LCDCLK / LCDCLK#

1 = Pin24/25 : SRC_0 / SRC_0# Pin28/29 : 27M/27M_SS

+3VS+3VS +3VS

R285

R285 10K_0402_5%

10K_0402_5%

@

1 2

ITP_EN PCI4_SEL PCI2_TME

R275

R275 10K_0402_5%

10K_0402_5%

1 2

4

R287

R287 10K_0402_5%

10K_0402_5%

PM@

1 2

R277

R277 10K_0402_5%

10K_0402_5%

GM@

1 2

+1.5VM_CK505

1 2

1 2 1 2

1 2 1 2 1 2 1 2

R286

R286 10K_0402_5%

10K_0402_5%

1 2

R276

R276 10K_0402_5%

10K_0402_5%

@

1 2

R27047_0402_5% R27047_0402_5%

R31633_0402_5%

R31633_0402_5% R31033_0402_5%

R31033_0402_5%

@

CK_PWRGD

PM_STP_CPU# PM_STP_PCI#

CLK_XTAL_IN CLK_XTAL_OUT

R29033_0402_5% @ R29033_0402_5% @ R28433_0402_5% R28433_0402_5% R28933_0402_5% R28933_0402_5% R28833_0402_5%

R28833_0402_5%

FSA FSB FSC

PCI2_TME PCI_CLK3 PCI4_SEL ITP_EN

U14

55

VDD_SRC

6

VDD_REF

12

VDD_PCI

72

VDD_CPU

19

VDD_48

27

VDD_PLL3

66

VDD_CPU_IO

31

VDD_PLL3_IO

62

VDD_SRC_IO

52

VDD_SRC_IO

23

VDD_IO

38

VDD_SRC_IO

20

USB_0/FS_A

2

FS_B/TEST_MODE

7

REF_0/FS_C/TEST_

8

REF_1

1

CKPWRGD/PD#

11

NC

53

CPU_STOP#

54

PCI_STOP#

5

XTAL_IN

4

XTAL_OUT

13

PCI_1

14

PCI_2

15

PCI_3

16

PCI_4/SEL_LCDCL

17

PCIF_5/ITP_EN

18

VSS_PCI

3

VSS_REF

22

VSS_48

26

VSS_IO

69

VSS_CPU

30

VSS_PLL3

34

VSS_SRC

59

VSS_SRC

42

VSS_SRC

73

VSS

SLG8SP556VTR_QFN72_10X10

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

CPU_0#

CPU_1#

SRC_0/DOT_96

SRC_0#/DOT_96#

LCDCLK/27M

LCDCLK#/27M_SS

SRC_2#

SRC_3#

SRC_4#

SRC_6#

SRC_7#

SRC_8/CPU_ITP

SRC_8#/CPU_ITP#

SRC_9#

SRC_10

SRC_10#

SRC_11

SRC_11#

CLKREQ_3# CLKREQ_4# CLKREQ_6# CLKREQ_7#

CLKREQ_9# SLKREQ_10# CLKREQ_11#

USB_1/CLKREQ_A#

2007/10/15 2008/10/15

SDA SCL

CPU_0

CPU_1

SRC_2

SRC_3

SRC_4

SRC_6

SRC_7

SRC_9

9 10

71 70 68 67

24 25

28 29

32 33

35 36

39 40

57 56

61 60

64 63

44 45

50 51

48 47

37 41 58 65 43 49 46 21

CLK_SMBDATA CLK_SMBCLK

CLK_CPU_BCLK CLK_CPU_BCLK# CLK_MCH_BCLK CLK_MCH_BCLK#

R_CLK_DOT

R251 0_0402_5%GM@R251 0_0402_5%GM@

1 2

R255 0_0402_5%PM@R255 0_0402_5%PM@

1 2

R_CLK_DOT#

R250 0_0402_5%GM@R250 0_0402_5%GM@

1 2

R254 0_0402_5%PM@R254 0_0402_5%PM@

1 2

CLK_MCH_3GPLL CLK_MCH_3GPLL#

CLK_PCIE_EXP CLK_PCIE_EXP#

CLK_PCIE_WLAN CLK_PCIE_WLAN#

CLK_PCIE_WLAN1 CLK_PCIE_WLAN1#

CLK_PCIE_LAN CLK_PCIE_LAN#

CLK_PCIE_ICH CLK_PCIE_ICH#

CLK_PCIE_SATA CLK_PCIE_SATA#

EXP_CLKREQ#

WLAN_CLKREQ# WLAN_CLKREQ1# CLKREQ_LAN#

SATA_CLKREQ#_R MCH_CLKREQ#_R

Compal Secret Data

Deciphered Date

R307 0_0402_5%R307 0_0402_5%

R260 0_0402_5%R260 0_0402_5%

2

12 12

CLK_SMBDATA <14,15> CLK_SMBCLK <14,15>

CLK_CPU_BCLK <5> CLK_CPU_BCLK# <5> CLK_MCH_BCLK <8> CLK_MCH_BCLK# <8>

CLK_MCH_DREFCLK <8>

CLK_PCIE_VGA <16>

CLK_MCH_DREFCLK# <8>

CLK_PCIE_VGA# <16> MCH_SSCDREFCLK <8> MCH_SSCDREFCLK# <8>

CLK_MCH_3GPLL <8> CLK_MCH_3GPLL# <8>

CLK_PCIE_EXP <40> CLK_PCIE_EXP# <40>

CLK_PCIE_WLAN <32> CLK_PCIE_WLAN# <32>

CLK_PCIE_WLAN1 <32> CLK_PCIE_WLAN1# <32>

CLK_PCIE_LAN <33> CLK_PCIE_LAN# <33>

CLK_PCIE_ICH <28> CLK_PCIE_ICH# <28>

CLK_PCIE_SATA <27> CLK_PCIE_SATA# <27>

EXP_CLKREQ# <40>

WLAN_CLKREQ# <32> WLAN_CLKREQ1# <32> CLKREQ_LAN# <33>

SATA_CLKREQ# <28> MCH_CLKREQ# <8>

Title

Size Document Number Rev

Date: Sheet

SRC PORT LIST

DEVICEPORT

SRC0

MCH_DREFCLK

SRC2

MCH_3GPLL

SRC3

PCIE_EXP# SRC4 SRC6

PCIE_WLAN SRC7

PCIE_WLAN1 SRC8 SRC9

PCIE_LAN SRC10

PCIE_ICH

PCIE_SATA

SRC11

SATA_CLKREQ#_R EXP_CLKREQ# WLAN_CLKREQ1# MCH_CLKREQ#_R CLKREQ_LAN# WLAN_CLKREQ#

R315 10K_0402_5%R315 10K_0402_5% R295 10K_0402_5%R295 10K_0402_5% R373 10K_0402_5%R373 10K_0402_5% R256 10K_0402_5%R256 10K_0402_5% R304 10K_0402_5%R304 10K_0402_5% R372 10K_0402_5%R372 10K_0402_5%

12 12 12 12 12 12

REQ PORT LIST

DEVICEPORT

REQ_3# REQ_4# REQ_6# REQ_7# REQ_9# REQ_10# REQ_11# REQ_A#

Compal Electronics, Inc.

Clock generator

JITR1_LA-4141P

PCIE_EXP#

PCIE_WLAN PCIE_WLAN1 PCIE_LAN

PCIE_SATA MCH_3GPLL

1

22 52Monday, May 05, 2008

+3VS

1.0

of

5

4

3

2

1

+3VS

@

R2120_0402_5%

1 2

R2120_0402_5% R2110_0402_5%

R2110_0402_5%

@

HDMICLK HDMIDAT

GM@

R2094.7K_0402_5%

12

R2100_0402_5%

@

TMDS_B_CLK<10> TMDS_B_CLK#<10>

TMDS_B_DATA0<10>

TMDS_B_DATA0#<10>

TMDS_B_DATA1<10>

TMDS_B_DATA1#<10>

TMDS_B_DATA2<10> TMDS_B_DATA2#<10>

HDMI_DETECT

12 12

GM@

Q38

Q38 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

13

D

PM@

2

G

S

25

OE#

28

SCL_SINK

29

SDA_SINK

30

HPD_SINK

32

DDC_EN

R6414.7K_0402_5% GM@ R6414.7K_0402_5% GM@

34

+3VS

CFG0

35

CFG1

48

IN_D4+

47

IN_D4-

45

IN_D3+

44

IN_D3-

42

IN_D2+

41

IN_D2-

39

IN_D1+

38

IN_D1-

PS8101TQFN48G_QFN48_7X7

GM@

P/N:SA00002D700 (8101T) P/N:SA00001U900

R6424.7K_0402_5%

VCC VCC VCC VCC VCC VCC VCC VCC

PC1 PC0

REXT HPD#

SDA SCL

RT_EN#

OUT_D4+

OUT_D4-

OUT_D3+

OUT_D3-

OUT_D2+

OUT_D2-

OUT_D1+

OUT_D1-

GND GND GND GND GND GND GND GND GND GND

PAD

U8

1 2 1 2

D D

C C

+3VS

TMDS pull down (500ohm) resistors G9x only

HDMI_CLK+_CONN HDMI_CLK-_CONN HDMI_TX0+_CONN HDMI_TX0-_CONN HDMI_TX1+_CONN HDMI_TX1-_CONN HDMI_TX2+_CONN HDMI_TX2-_CONN

R155 499_0402_1%PM@R155 499_0402_1%PM@

1 2

R156 499_0402_1%PM@R156 499_0402_1%PM@

1 2

R150 499_0402_1%PM@R150 499_0402_1%PM@

1 2

R153 499_0402_1%PM@R153 499_0402_1%PM@

1 2

R145 499_0402_1%PM@R145 499_0402_1%PM@

1 2

R149 499_0402_1%PM@R149 499_0402_1%PM@

1 2

R141 499_0402_1%PM@R141 499_0402_1%PM@

1 2

R144 499_0402_1%PM@R144 499_0402_1%PM@

1 2

NEAR CONNECT

B B

L36

HDMI_CLK+

HDMI_CLK-

HDMI_TX0+

HDMI_TX0-

HDMI_TX1+

HDMI_TX1-

HDMI_TX2+

A A

HDMI_TX2-

HDMI_CLK+ HDMI_CLKHDMI_TX0+ HDMI_TX0HDMI_TX1+ HDMI_TX1HDMI_TX2+ HDMI_TX2-

L36

1

4

WCM-2012-900T_4P

WCM-2012-900T_4P L35

L35

1

4

WCM-2012-900T_4P

WCM-2012-900T_4P L34

L34

1

4

WCM-2012-900T_4P

L33

1

4

WCM-2012-900T_4P

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

5

2

3

2

3

2

3

2

3

R6450_0402_5% @ R6450_0402_5% @ R6460_0402_5% @ R6460_0402_5% @ R6470_0402_5% @ R6470_0402_5% @ R6480_0402_5% @ R6480_0402_5% @ R6490_0402_5% @ R6490_0402_5% @ R6500_0402_5% @ R6500_0402_5% @ R6510_0402_5% @ R6510_0402_5% @ R6520_0402_5% @ R6520_0402_5% @

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

HDMI_CLK+_CONN HDMI_CLK-_CONN HDMI_TX0+_CONN HDMI_TX0-_CONN HDMI_TX1+_CONN HDMI_TX1-_CONN HDMI_TX2+_CONN HDMI_TX2-_CONN

9/14 Reserve for VGA used;check pin name

HDMI_DETECT_VGA<16>

HDMI_DETECT_VGA

4

9/14 Modify for UMA used

D3

D3 RB751V_SOD323

RB751V_SOD323

@

2 1

PM@

R200

1 2

1K_0402_1%

12

R199

R199 10K_0402_1%

10K_0402_1%

PM@

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS

1

C318

C374

C357

2

2 11 15 21 26 33 40 46

R643 4.7K_0402_5%

4 3

6 7 8 9

10

13 14

16 17

19 20

22 23

1 5 12 18 24 27 31 36 37 43 49

1 2

R644 4.7K_0402_5%

1 2

HDP

HDMI_DETECT

L16

PM@L16

PM@

1 2

FBML10160808121LMT_0603

+5VS +5VS

3

2

D25

Issued Date

3

C374

GM@

2

0.1U_0402_16V4Z

+3VS

GM@

@

R189 499_0402_1%GM@ R189 499_0402_1%GM@

TMDS_B_HPD# <10>

HDMIDAT HDMICLK

1

@

BAT54S-7-F_SOT23-3

2007/10/15 2008/10/15

1

C335

GM@

2

0.1U_0402_16V4Z

2.2K_0402_5%

R216

1 2

C338

C338 330P_0402_50V7K

330P_0402_50V7K

PM@

Compal Secret Data

GM@

10U_0805_10V4Z

R187

GM@

GM@R216

GM@

0_0402_5%

R215 0_0402_5%

0_0402_5%

+3VS

R188

2.2K_0402_5%

GM@

1 2

VGA_HDMI_CLK-<17> VGA_HDMI_CLK+<17> VGA_HDMI_TX0-<17> VGA_HDMI_TX0+<17> VGA_HDMI_TX1-<17> VGA_HDMI_TX1+<17> VGA_HDMI_TX2-<17>

VGA_HDMI_TX2+<17> VGA_HDMI_SDA<16> VGA_HDMI_SCL<16>

PM@R215

PM@

3

2

D26

Deciphered Date

HDMIDAT_NB <8> HDMICLK_NB <8>

HDMI_CLK+ HDMI_CLK-

HDMI_TX0+ HDMI_TX0-

HDMI_TX1+ HDMI_TX1-

HDMI_TX2+ HDMI_TX2-

+5VS

2

3

BAT54S-7-F_SOT23-3

1

@

BAT54S-7-F_SOT23-3

2

C369 0.1U_0402_10V7KPM@C369 0.1U_0402_10V7KPM@

1 2

C362 0.1U_0402_10V7KPM@C362 0.1U_0402_10V7KPM@

1 2

C350 0.1U_0402_10V7KPM@C350 0.1U_0402_10V7KPM@

1 2

C341 0.1U_0402_10V7KPM@C341 0.1U_0402_10V7KPM@

1 2

C324 0.1U_0402_10V7KPM@C324 0.1U_0402_10V7KPM@

1 2

C321 0.1U_0402_10V7KPM@C321 0.1U_0402_10V7KPM@

1 2

C313 0.1U_0402_10V7KPM@C313 0.1U_0402_10V7KPM@

1 2

C308 0.1U_0402_10V7KPM@C308 0.1U_0402_10V7KPM@

1 2

R228 0_0402_5%PM@R228 0_0402_5%PM@ R227 0_0402_5%PM@R227 0_0402_5%PM@

0_0805_5%

D4

@D4

@

2.2K_0402_5%

HDMIDAT HDMICLK

HDMI_CLK-_CONN HDMI_CLK+_CONN

HDMI_TX0-_CONN HDMI_TX0+_CONN

HDMI_TX1-_CONN HDMI_TX1+_CONN

HDMI_TX2-_CONN HDMI_TX2+_CONN

HDMI_CLKHDMI_CLK+ HDMI_TX0HDMI_TX0+ HDMI_TX1HDMI_TX1+ HDMI_TX2-

HDMI_TX2+

12 12

+5VS

R659

R198

R194

2.2K_0402_5%

1 2

Title

Size Document Number Rev

Date: Sheet

HDMIDAT

HDMICLK

21

@

D2

D2 RB491D_SC59-3

RB491D_SC59-3

+5VS_HDMI

1

C276

0.1U_0402_16V4Z

2

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11 10

GND

CK_shield

GND

CK+

GND

9

D0-

GND

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

TYCO_16-004-6131

Compal Electronics, Inc.

Level shiftter-CH7318

JITR1_LA-4141P

20 21 22 23

1

1.0

of

23 52Friday, May 02, 2008

of

23 52Friday, May 02, 2008

of

23 52Friday, May 02, 2008

5

4

3

2

1

INVERTER Conn.

INVT_PWM

1

C21

2

For EMI

DAC_BRIG

DISPOFF#

1

C23

C22

2

470P_0402_50V7K

JP2

+3VS

12

R377

4.7K_0402_5%

R368

R368 100K_0402_5%

100K_0402_5%

1 2

JP2

1

2

3

4

5

6

G8

7

G9

ACES_87213-0700G

ME@

ENBKL

8 9

ENBKL <35>

470P_0402_50V7K

LCD POWER CIRCUIT

B+

L2

FBMA-L11-201209-221LMA30T_0805

1

C800

C800 470P_0402_50V7K

470P_0402_50V7K

2

BKOFF#<35>

GMCH_ENBKL<10> VGA_ENBKL<16>

12

Q2

2N7002_SOT23

100K_0402_5%

+LCDVDD

13

D

S

R1

D D

GM@

R2 0_0402_5%

GM_ENVDD<10>

VGA_ENVDD<16>

C C

1 2

R3 0_0402_5%

1 2

PM@

+5VALW

2

DTC124EK

2

@R1

@

IN

12

R5 100K_0402_5%

R6 220K_0402_5%R6 220K_0402_5%

1 2

1

OUT

Q1

Q1 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

GND

3

R4

R4 150_0603_1%

150_0603_1%R5100K_0402_5%

G

12

1

C2

0.47U_0402_6.3V6K

2

+3VS

S

G

2

D

Q3

1 3

1

C1

4.7U_0805_10V4Z

2

W=60mils

1

C4

4.7U_0805_10V4Z

2

SI2301BDS-T1-E3_SOT23-3

+LCDVDD

1

C3

0.1U_0402_16V4Z

2

W=60mils

INVT_PWM<35> DAC_BRIG<35>

D13

BKOFF# DISPOFF#

D13

CH751H-40PT_SOD323-2

21

R358 0_0402_5%GM@R358 0_0402_5%GM@ R351 0_0402_5%PM@R351 0_0402_5%PM@

DISPOFF#

+INVPWR_B+

0.1U_0603_50V4Z

12 12

C18

LCD/PANEL BD. Conn.

JLVDS2

22

GND

21

GND

20

19

18

17

16

15

14

13

12

11

10

B B

A A

5

10

9 8 7 6 5 4 3 2 1

ME@

ACES_87212-2000L

9 8 7 6 5 4 3 2 1

+LCDVDD_CONN

(60 MIL) (60 MIL)

LVDS_ACLK

LVDS_ACLK#

LVDS_A1 LVDS_A1#

LVDS_A0 LVDS_A0#

LVDS_A2 LVDS_A2#

L1

FBMA-L11-201209-221LMA30T_0805

12

+3VS

4

R18

2.2K_0402_5%

GM@

+LCDVDD

LVDS_ACLK <10>

LVDS_ACLK# <10>

LVDS_A1 <10>

LVDS_A1# <10>

LVDS_A0 <10>

LVDS_A0# <10>

LVDS_A2 <10>

LVDS_A2# <10>

+3VS

R17

2.2K_0402_5%

GM@

LVDS_SDA <10> LVDS_SCL <10>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

LCD/PANEL BD. Conn.

JLVDS1

22

GND

21

GND

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

ME@

ACES_87212-2000L

Compal Secret Data

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

+LCDVDD_CONN

VGA_LVDS_SDA VGA_LVDS_SCL VGA_LVDS_ACLK

VGA_LVDS_ACLK#

VGA_LVDS_A1 VGA_LVDS_A1#

VGA_LVDS_A0 VGA_LVDS_A0#

VGA_LVDS_A2 VGA_LVDS_A2#

2

+3VS

R21

R22

2.2K_0402_5%

PM@

R21

2.2K_0402_5%

PM@

VGA_LVDS_SDA <16>

VGA_LVDS_ACLK <17>

VGA_LVDS_ACLK# <17>

VGA_LVDS_A1 <17>

VGA_LVDS_A1# <17>

VGA_LVDS_A0 <17>

VGA_LVDS_A0# <17>

VGA_LVDS_A2 <17>

VGA_LVDS_A2# <17>

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

VGA_LVDS_SCL <16>

LVDS & DVI Connector

JITR1_LA-4141P

1

0.1

of

24 52Friday, May 02, 2008

A

B

C

D

E

CRT Connector

Place closed to chipset

GREEN

C384

10P_0402_50V8J

3

2

D29

RED

BLUE

C406

@

CRT_R_1

CRT_G_1

CRT_B_1

1

C391

10P_0402_50V8J

2

@

1

C385

10P_0402_50V8J

2

@

1 2

L22 FCM1608C-121T_0603

1 2

L21 FCM1608C-121T_0603

1 2

L20 FCM1608C-121T_0603

1 2

L19 FCM1608C-121T_0603

1 2

L18 FCM1608C-121T_0603

10P_0402_50V8J

+5VS +5VS +5VS

3

2

D27

C405

10P_0402_50V8J

1

C412

@C412

@

2

1

@

BAT54S-7-F_SOT23-3

1

2

1

C390

10P_0402_50V8J

2

1

C408

@C408

@

10P_0402_50V8J

2

3

2

D28

1

2

JVGA_HS

JVGA_VS

1

@

BAT54S-7-F_SOT23-3

VGA_CRT_R<16>

GMCH_CRT_R<10>

1 1

VGA_CRT_G<16>

GMCH_CRT_G<10>

VGA_CRT_B<16>

GMCH_CRT_B<10>

VGA_HSYNC<16>

2 2

3 3

4 4

GMCH_CRT_HSYNC<10>

VGA_DDCDATA<16>

GMCH_CRT_DATA<10>

VGA_DDCCLK<16>

1 2

R229 0_0402_5%PM@R229 0_0402_5%PM@

1 2

R231 0_0402_5%GM@R231 0_0402_5%GM@

1 2

R221 0_0402_5%PM@R221 0_0402_5%PM@

1 2

R224 0_0402_5%GM@R224 0_0402_5%GM@

1 2

R214 0_0402_5%PM@R214 0_0402_5%PM@

1 2

R218 0_0402_5%GM@R218 0_0402_5%GM@

GMCH_CRT_CLK<10>

1 2

R241 0_0402_5%PM@R241 0_0402_5%PM@

Place closed to chipset

VGA_VSYNC<16> GMCH_CRT_VSYNC<10>

2.2K_0402_5%

GM@ R621

GM@

0_0402_5%

GM@ R620

GM@

0_0402_5%

12

R230

R223

150_0402_1%

1 2

C413 0.1U_0402_16V4Z

1 2

R233 0_0402_5%PM@R233 0_0402_5%PM@

+3VS

12

2.2K_0402_5%

R247

R269

12

R2520_0402_5% PM@ R2520_0402_5% PM@

12

R621

12

R620

12

R2640_0402_5% PM@ R2640_0402_5% PM@

12

R219

150_0402_1%

1 2

C410 0.1U_0402_16V4Z

2

Q23A

Q23A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

+CRT_VCC

1

5

P

OE#

A2Y

G

SN74AHCT1G125DCKR_SC70-5

3

+3VS

R266

2.2K_0402_5%

5

3

4

Q23B

Q23B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

61

100P_0402_50V8J

U11

4

+CRT_VCC

2.2K2.2K

12

5

P

A2Y

G

3

12

R253

2.2K_0402_5%

C414

@

10P_0402_50V8J

R239 1K_0402_5%

CRT_HSYNC_1

1

U10

4

OE#

SN74AHCT1G125DCKR_SC70-5

1

2

CRT_VSYNC_1

1

C417

@

2

68P_0402_50V8K

CRT_DDC_DAT

CRT_DDC_CLK

12

+5VS

REDGREENBLUE

1

@

BAT54S-7-F_SOT23-3

D18

2 1

RB491D_SC59-3

W=40mils

RED CRT_DDC_DAT

GREEN JVGA_HS

BLUE JVGA_VS

CRT_DDC_CLK

+CRT_VCC

0.1U_0402_16V4Z

0.1U_0402_16V4Z C679

C679

1 2

JCRT1

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

SUYIN_070546FR015S202CR

ME@

16 17

PIN ASSIGMENT

D-SUB

9 1 6 2

7

3 8

14

5,

FUNCTION +CRT_VCC

RED GND

GREEN

GND

BLUE

GND

VSYNC

10 GND 13 11 12 15

4

HSYNC

SENSE

SM_DAT SM_CLK

PIN4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

CRT & TV-OUT Connector

Custom

JITR1_LA-4141P

0.1

25 52Friday, May 02, 2008

E

25 52Friday, May 02, 2008

0.1

of

5

4

3

2

1

D D

C C

+3VS

1 2

R425 8.2K_0402_5%R425 8.2K_0402_5%

1 2

R420 8.2K_0402_5%R420 8.2K_0402_5%

1 2

R430 8.2K_0402_5%R430 8.2K_0402_5%

1 2

R415 8.2K_0402_5%R415 8.2K_0402_5%

1 2

R464 8.2K_0402_5%R464 8.2K_0402_5%

1 2

R453 8.2K_0402_5%R453 8.2K_0402_5%

1 2

R449 8.2K_0402_5%R449 8.2K_0402_5%

1 2

R438 8.2K_0402_5%R438 8.2K_0402_5%

+3VS

1 2

R428 8.2K_0402_5%R428 8.2K_0402_5%

1 2

R580 8.2K_0402_5%R580 8.2K_0402_5%

1 2

R402 8.2K_0402_5%R402 8.2K_0402_5%

1 2

R563 8.2K_0402_5%R563 8.2K_0402_5%

1 2

R448 8.2K_0402_5%R448 8.2K_0402_5%

1 2

R427 8.2K_0402_5%R427 8.2K_0402_5%

1 2

R457 8.2K_0402_5%R457 8.2K_0402_5%

1 2

R456 8.2K_0402_5%R456 8.2K_0402_5%

1 2

R463 8.2K_0402_5%R463 8.2K_0402_5%

1 2

R419 8.2K_0402_5%R419 8.2K_0402_5%

1 2

R396 8.2K_0402_5%R396 8.2K_0402_5%

1 2

R426 8.2K_0402_5%R426 8.2K_0402_5%

1 2

R433

1K_0402_5%@

PCI_DEVSEL# PCI_STOP# PCI_TRDY# PCI_FRAME# PCI_PLOCK# PCI_IRDY# PCI_SERR# PCI_PERR#

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH# PCI_REQ0# PCI_REQ1# PCI_REQ2# PCI_REQ3#

PCI_GNT3#

PCI_GNT0#

U34B

PCI_AD[0..31]<36>

12

R434

1K_0402_5%@

SB_SPI_CS#1<28>

PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

U34B

D11

AD0

C8

AD1

D9

AD2

E12

AD3

E9

AD4

C9

AD5

E10

AD6

B7

AD7

C7

AD8

C5

AD9

G11

AD10

F8

AD11

F11

AD12

E7

AD13

A3

AD14

D2

AD15

F10

AD16

D5

AD17

D10

AD18

B3

AD19

F7

AD20

C3

AD21

F3

AD22

F4

AD23

C1

AD24

G7

AD25

H7

AD26

D1

AD27

G5

AD28

H6

AD29

G1

AD30

H3

AD31

Interrupt I/F

J5

PIRQA#

E1

PIRQB#

J6

PIRQC#

C4

PIRQD#

ICH9-M ES_FCBGA676

SB_SPI_CS#1

PCI_REQ0#

F1

REQ0#

PCI

12

R326

1K_0402_5%@

GNT0#

REQ1#/GPIO50

GNT1#/GPIO51

REQ2#/GPIO52

GNT2#/GPIO53

REQ3#/GPIO54

GNT3#/GPIO55

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PAR PCIRST# DEVSEL#

PERR#

PLOCK#

SERR# STOP# TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

PCI_GNT0#

G4

PCI_REQ1#

B6

PCI_GNT1#

A7

PCI_REQ2#

F13

PCI_GNT2#

F12

PCI_REQ3#

E6

PCI_GNT3#

F6

PCI_CBE#0

D8

PCI_CBE#1

B4

PCI_CBE#2

D6

PCI_CBE#3

A5

PCI_IRDY#

D3

PCI_PAR

E3

PCI_RST#

R1

PCI_DEVSEL#

C6

PCI_PERR#

E4

PCI_PLOCK#

C2

PCI_SERR#

J4

PCI_STOP#

A4

PCI_TRDY#

F5

PCI_FRAME#

D7

PLT_RST#

C14

CLK_PCI_ICH

D4

PCI_PME#

R2

PCI_PIRQE#

H4

PCI_PIRQF#

K6

PCI_PIRQG#

F2

PCI_PIRQH#

G2

Pull high?

1 2

R575 10K_0402_5%@R575 10K_0402_5%@

PCI_REQ0# <36> PCI_GNT0# <36>

PCI_CBE#0 <36> PCI_CBE#1 <36> PCI_CBE#2 <36> PCI_CBE#3 <33,36>

PCI_IRDY# <36> PCI_PAR <36>

PCI_DEVSEL# <36>

PCI_STOP# <36> PCI_TRDY# <36> PCI_FRAME# <36>

CLK_PCI_ICH <22> PCI_PME# <35>

+3VALW

PCI_PIRQG# <36>

Place closely pin D4

CLK_PCI_ICH

R444

10_0402_5%@

1 2 1

C567

8.2P_0402_50V@

2

B B

Boot BIOS Strap

A16 Swap Override Strap

PCI_GNT#3

A A

Low= A16 swap override Enable High= Default*

5

PCI_GNT#0 SPI_CS#1 Boot BIOS Loaction

0

11

4

1 SPI 01

PCI LPC*

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

2

PCI_RST#

PLT_RST#

12

Title

Size Document Number Rev

Date: Sheet

PCI_RST# <35,36,37>

R576

R576 100K_0402_5%

100K_0402_5%

PLT_RST# <8,16,32,33,40>

R390

R390 100K_0402_5%

100K_0402_5%

Compal Electronics, Inc.

ICH9M(1/4)-PCI

JITR1_LA-4141P

1

0.1

of

26 52Friday, May 02, 2008

of

26 52Friday, May 02, 2008

of

26 52Friday, May 02, 2008

5

+RTCVCC

R520 330K_0402_1%R520 330K_0402_1%

LAN100_SLP

1 2

R513 1M_0402_5%R513 1M_0402_5%

SM_INTRUDER#

1 2

R517 330K_0402_1%R517 330K_0402_1%

D D

C C

1 2

ICH_INTVRMEN

+RTCVCC

2

C451

0.1U_0402_16V4Z

1

SATA_DTX_C_IRX_N0<39> SATA_DTX_C_IRX_P0<39>

SATA_ITX_DRX_N0<39> SATA_ITX_DRX_P0<39>

SATA_DTX_C_IRX_N1<39> SATA_DTX_C_IRX_P1<39>

SATA_ITX_DRX_N1<39> SATA_ITX_DRX_P1<39>

R322

1 2

100_0603_1%

32.768KHZ_12.5P_1TJS125BJ2A251

+RTCBATT

SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0 SATA_ITX_DRX_N0

SATA_DTX_C_IRX_N1 SATA_DTX_C_IRX_P1 SATA_ITX_DRX_N1 SATA_ITX_DRX_P1

+RTCVCC

HDA_BITCLK_CODEC<8,16,30>

HDA_SDOUT_CODEC<8,16,30>

C721 0.01U_0402_16V7KC721 0.01U_0402_16V7K C719 0.01U_0402_16V7KC719 0.01U_0402_16V7K

C677 0.01U_0402_16V7KC677 0.01U_0402_16V7K C678 0.01U_0402_16V7KC678 0.01U_0402_16V7K

HDA_SYNC_CODEC<8,16,30>

HDA_RST_CODEC#<8,16,30>

HDA_SDIN0<8> HDA_SDIN1<16> HDA_SDIN2<30>

SATA_LED#<39>

1 2 1 2

1 2

R324 20K_0402_5%R324 20K_0402_5%

+3VS

4

C707

15P_0402_50V8J

Y4

2 3

15P_0402_50V8J

1 2

close to RAM door

1

IN

NC

4

OUT

NC

C706

CLRP1

2 1

2MM

C470

1 2

1U_0603_10V4Z

+1.5VS

24.9_0402_1%

R305

1 2

R554

1 2

R559

1 2

R550

1 2

R557 33_0402_5%R557 33_0402_5%

1 2

10K_0402_5%

R549

12

ICH_RTCX1

R515

10M_0402_5%

ICH_RTCX2

GLAN_COMP

HDA_BITCLK_R

33_0402_5%

HDA_SYNC_R

33_0402_5%

HDA_RST_R#

33_0402_5%

SATA_LED#

SATA_ITX_C_DRX_N0 SATA_ITX_C_DRX_P0SATA_ITX_DRX_P0

SATA_ITX_C_DRX_N1 SATA_ITX_C_DRX_P1

12

ICH_RTCRST# ICH_SRTCRST# SM_INTRUDER#

ICH_INTVRMEN

LAN100_SLP

HDA_SDOUT_R

U34A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD_0

D12

LAN_TXD_1

E13

LAN_TXD_2

B10

GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9-M ES_FCBGA676

3

RTC

LAN / GLAN

IHDA

LPCCPU

SATA

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

INIT# INTR

RCIN#

SMI#

STPCLK#

THRMTRIP#

TP12

SATA4RXN

SATA4RXP SATA4TXN SATA4TXP

SATA5RXN

SATA5RXP SATA5TXN SATA5TXP

SATA_CLKN SATA_CLKP

SATARBIAS#

SATARBIAS

LPC_AD0

K5

LPC_AD1

K4

LPC_AD2

L6

LPC_AD3

K2

LPC_FRAME#

K3

LPC_DRQ0#

J3 J1

GATEA20

N7

H_A20M#

AJ27 AJ25

AE23 AJ26 AD22 AF25 AE22

AG25 L3

AF23

NMI

AF24 AH27 AG26 AG27

AH11 AJ11 AG12 AF12

AH9 AJ9 AE10 AF10

AH18 AJ18 AJ7 AH7

10mils width less than 500mils

R511 0_0402_5%R511 0_0402_5%

H_DPSLP# H_DPSLP#

H_FERR#_S H_PWRGOOD H_IGNNE# H_INIT#

H_INTR KB_RST#

H_NMI H_SMI#

H_STPCLK# THRMTRIP_ICH#

@

R541 1K_0402_5%

R541 1K_0402_5% R540 1K_0402_5%

R540 1K_0402_5%

@

R544 1K_0402_5%

R544 1K_0402_5% R547 1K_0402_5%

R547 1K_0402_5%

@

CLK_PCIE_SATA# CLK_PCIE_SATA

SATARBIAS

2

LPC_AD[0..3] <35,37>

LPC_FRAME# <35,37> LPC_DRQ0# <37>

GATEA20 <35> H_A20M# <5>

12

H_PWRGOOD <6> H_IGNNE# <5> H_INIT# <5>

H_INTR <5>

KB_RST# <35>

H_NMI <5> H_SMI# <5>

H_STPCLK# <5>

R112 54.9_0402_1%R112 54.9_0402_1%

1 2

12 12

CLK_PCIE_SATA# <22> CLK_PCIE_SATA <22>

R553

12

24.9_0402_1%

1

GATEA20

KB_RST#

H_DPRSTP#

H_DPSLP#

H_DPRSTP#H_DPRSTP_R#

R2056_0402_5% R2056_0402_5%

12

H_DPRSTP# <6,8,50> H_DPSLP# <6>

H_THERMTRIP#

R114 56_0402_5%R114 56_0402_5%

12

H_THERMTRIP# <5,8>

R112 need to place within 2" of ICH9M R328 must be place within 2" of R258 w/o stub.

+VCCP

10K_0402_5%

56_0402_5%

R509

56_0402_5%

R407

R462

R510

R514

12

+3VS

12

+VCCP

@R510

@

12

@R514

@

12

+VCCP

H_FERR# <5>

B B

HDA_SDOUT_R

A A

5

4

Need check

+3VS

R556

R556 1K_0402_5%

1K_0402_5%

@

1 2

XOR Chain Entrance Strap

HDA_SDOUTICH_TP3 Description 0 0 1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

RSVD

0

Enter XOR Chain

1

Normal Operation

0

Set PCIE port config bit 1

11

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

ICH9M(2/4)-LAN,IDELPC,RTC

JITR1_LA-4141P

1

of

27 52Friday, May 02, 2008

0.1

5

10K_0402_5%

H_STP_PCI#<22> H_STP_CPU#<22>

TV TUNER

NEW CARD

VRMPWRGD

+3VALW

R361

+3VS

@R332

@

10K_0402_5%

WLAN

LAN

1 2

R332

VGATE<8,50>

R371

R371 10K_0402_5%

10K_0402_5%

1 2

10K_0402_5%

1 2

PCIE_RXN1<32> PCIE_RXP1<32> PCIE_TXN1<32>

PCIE_TXP1<32>

PCIE_RXN3<32> PCIE_RXP3<32> PCIE_TXN3<32>

PCIE_TXP3<32>

PCIE_RXN4<40> PCIE_RXP4<40> PCIE_TXN4<40>

PCIE_TXP4<40>

PCIE_RXN6<33> PCIE_RXP6<33>

PCIE_TXN6<33>

PCIE_TXP6<33>

SB_SPI_CS#1<26>

ICH_SMBCLK<22,32,40>

ICH_SMBDATA<22,32,40>

R538

@R538

@

R348 0_0402_5%R348 0_0402_5%

R639 1K_0402_5%

low-->default High -->No boot

SERIRQ

+3VS

D D

+3VALW

C C

+3VS

B B

CLK_ENABLE#<50>

+3VALW

A A

1 2

R406 10K_0402_5%R406 10K_0402_5%

R461 8.2K_0402_5%R461 8.2K_0402_5%

1 2

R352 10K_0402_5%

@

1 2

R519 8.2K_0402_5%

1 2

R579 10K_0402_5%R579 10K_0402_5%

R355 10K_0402_5%R355 10K_0402_5%

R524 10K_0402_5%

R410 8.2K_0402_5%

R336 10K_0402_5%

R345 10K_0402_5%R345 10K_0402_5%

R370 10K_0402_5%R370 10K_0402_5%

R338 10K_0402_5%

R374 10K_0402_5%R374 10K_0402_5%

R360 10K_0402_5%R360 10K_0402_5%

R350 1K_0402_5%R350 1K_0402_5%

R546 8.2K_0402_5%R546 8.2K_0402_5%

R539 10K_0402_5%R539 10K_0402_5%

R638 10K_0402_5%R638 10K_0402_5%

1 2

R349 10K_0402_5%R349 10K_0402_5%

1 2

R365 10K_0402_5%R365 10K_0402_5%

@

1 2

R363 10K_0402_5%

@

1 2

R578 10K_0402_5%

1 2

R548 10K_0402_5%R548 10K_0402_5%

1 2

R521 10K_0402_5%R521 10K_0402_5%

R411 100K_0402_5%@R411 100K_0402_5%@ R573 100K_0402_5%@R573 100K_0402_5%@

R522 1K_0402_5%@R522 1K_0402_5%@

1 2

+3VS

R408 10K_0402_5%@R408 10K_0402_5%@

10K_1206_8P4R_5%

1 2

@

1 2

@

1 2

@

1 2

@

1 2

1 2 1 2

2

G

RP15

45 36 27 18

RP14

45 36 27 18

RP13

45 36 27 18

PCI_CLKRUN#

GPIO38

EC_THERM#

SATA_CLKREQ#

OCP#

WOL_EN

PM_BMBUSY#

12

GPIO39

GPIO48

LINKALERT#

CL_RST#

XDP_DBRESET#

ICH_RI#

ICH_PCIE_WAKE#

ICH_LOW_BAT#

12

LID_OUT#

WOL_EN

GPIO57 DPRSLPVR

ICH_RSVD

12

SB_SPKR

+3VS

R319

1 2 13

D

S

USB_OC#6 USB_OC#2

USB_OC#4

USB_OC#5 USB_OC#7 USB_OC#9 USB_OC#0

USB_OC#8 USB_OC#3

USB_OC#10 USB_OC#11

5

330_0402_5%@

Q29

V

GPIO7 GPIO13 GPIO17 GPIO18 GPIO20 GPIO22

R328

1 2

0_0402_5%@

RHU002N06_SOT323@

SPI not used, Left NC

4

R378

2.2K_0402_5%

XDP_DBRESET#<5> PM_BMBUSY#<8>

EC_LID_OUT#<35>

12

PCI_CLKRUN#<36>

ICH_PCIE_WAKE#<32,33,40>

SERIRQ<35,37>

EC_THERM#<35>

1 2

R334 0_0402_5%R334 0_0402_5%

OCP#

CPUSB#<40>

EC_SMI#<35> EC_SCI#<35>

SATA_CLKREQ#<22>

@

12

SB_SPKR<30>

MCH_ICH_SYNC#<8>

SPI_CLK_SB<38>

FSEL#SPICS#_SB<38>

FWR#SPI_SI_SB<38>

FRD#SPI_SO_SB<38>

USB_OC#0<43>

USB_OC#4<43>

USB_OC#11<43>

Within 500 mils

4

+3VALW

12

R543

12

2.2K_0402_5%

1 2

R532 0_0402_5%R532 0_0402_5%

T98T98

T76T76

MCH_ICH_SYNC#

T96T96 T97T97 T95T95

C4350.1U_0402_10V7K C4350.1U_0402_10V7K C4360.1U_0402_10V7K C4360.1U_0402_10V7K

C4540.1U_0402_10V7K C4540.1U_0402_10V7K C4530.1U_0402_10V7K C4530.1U_0402_10V7K

C4390.1U_0402_10V7K C4390.1U_0402_10V7K C4400.1U_0402_10V7K C4400.1U_0402_10V7K

C4490.1U_0402_10V7K C4490.1U_0402_10V7K C4500.1U_0402_10V7K C4500.1U_0402_10V7K

SB_SPI_CS#1

12

LINKALERT# ME__EC_CLK1 ME__EC_DATA1

ICH_RI#

XDP_DBRESET# PM_BMBUSY# LID_OUT# H_STP_PCI#

R_STP_CPU# PCI_CLKRUN# ICH_PCIE_WAKE#

SERIRQ EC_THERM#

VRMPWRGD SST_CTL OCP# GPIO7

EC_SMI# EC_SCI# GPIO13 GPIO17 GPIO18 GPIO20 GPIO22 GPIO27

SATA_CLKREQ# GPIO38 GPIO39 GPIO48 GPIO49 GPIO57

SB_SPKR ICH_RSVD

PCIE_RXN1 PCIE_RXP1 PCIE_C_TXN1 PCIE_C_TXP1

PCIE_RXN3 PCIE_RXP3 PCIE_C_TXN3 PCIE_C_TXP3

PCIE_RXN4 PCIE_RXP4 PCIE_C_TXN4 PCIE_C_TXP4

PCIE_RXN6 PCIE_RXP6 PCIE_C_TXN6 PCIE_C_TXP6

USB_OC#0 USB_OC#1USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11

USBRBIAS

R44722.6_0402_1% R44722.6_0402_1%

U34C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

TP11

AG19

GPIO1

AH21

GPIO6

AG21

GPIO7

A21

GPIO8

C12

GPIO12

C21

GPIO13

AE18

GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

TP8

AJ20

TP9

AJ21

TP10

ICH9-M ES_FCBGA676

ICH9-M ES_FCBGA676 U34D

U34D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9-M ES_FCBGA676

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SMB

PCI - Express

SPI

USB

Issued Date

3

CLK14 CLK48

SUSCLK

SLP_S3# SLP_S4# SLP_S5#

PWROK

BATLOW# PWRBTN#

LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0 CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST0# CL_RST1#

DMI_RXN0 DMI_RXP0 DMI_TXN0 DMI_TXP0

DMI_RXN1 DMI_RXP1 DMI_TXN1 DMI_TXP1

DMI_RXN2 DMI_RXP2 DMI_TXN2 DMI_TXP2

DMI_RXN3 DMI_RXP3 DMI_TXN3 DMI_TXP3

CLK_PCIE_ICH# CLK_PCIE_ICH

AH23 AF19 AE21 AD20

H1 AF3

P1 C16

E16 G17

C10 G20 M2 B13 R3 D20 D22 R5 R6 B16 F24

B19 F22

C19 C25

A19 F21

D18 A16

C18 C11 C20

DMI_IRCOMP USB20_N0

USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3 USB20_N4 USB20_P4 USB20_N5 USB20_P5 USB20_N6 USB20_P6 USB20_N7 USB20_P7 USB20_N8 USB20_P8 USB20_N9 USB20_P9 USB20_N10 USB20_P10 USB20_N11 USB20_P11

Compal Secret Data

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

SYS / GPIOGPIOMISC

Power MGT

MEM_LED/GPIO24

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

WOL_EN/GPIO9

Controller Link

V27

DMI0RXN

V26

DMI0RXP

U29

DMI0TXN

U28

DMI0TXP

Y27

DMI1RXN

Y26

DMI1RXP

W29

DMI1TXN

W28

DMI1TXP

AB27

DMI2RXN

AB26

DMI2RXP

AA29

DMI2TXN

AA28

DMI2TXP

AD27

DMI3RXN

AD26

DMI3RXP

AC29

DMI3TXN

AC28

DMI3TXP

T26

DMI_CLKN

T25

DMI_CLKP

DMI_ZCOMP

DMI_IRCOMP

3

AF29

Direct Media Interface

AF28 AC5

USBP0N

AC4

USBP0P

AD3

USBP1N

AD2

USBP1P

AC1

USBP2N

AC2

USBP2P

AA5

USBP3N

AA4

USBP3P

AB2

USBP4N

AB3

USBP4P

AA1

USBP5N

AA2

USBP5P

W5

USBP6N

W4

USBP6P

Y3

USBP7N

Y2

USBP7P

W1

USBP8N

W2

USBP8P

V2

USBP9N

V3

USBP9P

U5

USBP10N

U4

USBP10P

U1

USBP11N

U2

USBP11P

2007/10/15 2008/10/15

CLK_14M_ICH <22> CLK_48M_ICH <22>

T101T101

SLP_S3# <35> SLP_S4# <35> SLP_S5# <35>

DPRSLPVR

PBTN_OUT# <35>

1 2

T78T78

CL_CLK0 <8> CL_CLK1

CL_DATA0 <8> CL_DATA1

CL_RST# <8>

R356

100K_0402_5%

Within 500 mils

+1.5VS

LEFT USB

CMOS 3G RIGHT USB

BT

WLAN

New Card RIGHT USB

2

R637 0_0402_5%R637 0_0402_5%

12

2

+3VS

R344

8.2K_0402_5%

1 2

CLK_14M_ICH CLK_48M_ICH

ICH_SUSCLK SLP_S3#

SLP_S4# SLP_S5#

S4_STATE# ICH_POK

ICH_LOW_BAT# PBTN_OUT#

CK_PWRGD_R CK_PWRGD M_PWROK

CL_VREF0_ICH CL_VREF1_ICH

CL_RST#

GPIO24 GPIO14

WOL_EN

R574

1 2

499_0402_1%

R423 0_0402_5%R423 0_0402_5%

+3VALW

DMI_RXN0 <8> DMI_RXP0 <8> DMI_TXN0 <8> DMI_TXP0 <8>

DMI_RXN1 <8> DMI_RXP1 <8> DMI_TXN1 <8> DMI_TXP1 <8>

DMI_RXN2 <8> DMI_RXP2 <8> DMI_TXN2 <8> DMI_TXP2 <8>

DMI_RXN3 <8> DMI_RXP3 <8> DMI_TXN3 <8> DMI_TXP3 <8>

CLK_PCIE_ICH# <22> CLK_PCIE_ICH <22>

R297 24.9_0402_1%R297 24.9_0402_1%

1 2

USB20_N0 <43> USB20_P0 <43>

USB20_N2 <40> USB20_P2 <40> USB20_N3 <32> USB20_P3 <32> USB20_N4 <43> USB20_P4 <43>

USB20_N6 <32> USB20_P6 <32>

USB20_N8 <32> USB20_P8 <32>

USB20_N10 <40> USB20_P10 <40> USB20_N11 <43> USB20_P11 <43>

Deciphered Date

+3VALW

R551

R551 10K_0402_5%

10K_0402_5%

1 2

@

EC_RSMRST#REC_RSMRST#R

M_PWROK <8> VGATE <8,50>

D14 RB751V_SOD323D14 RB751V_SOD323

R357 0_0402_5%

2 1

@

EC_RSMRST#<35>

ACIN

12

2.2K_0402_5%@

1

Place closely pin B2 Place closely pin AC1

12

1

2

R170 100_0402_5% @R170 100_0402_5% @

1 2

ACIN <35,44>

ICH_POK <8,35>

0.1U_0402_16V4Z

DPRSLPVR <8,50>

R335 10K_0402_5%R335 10K_0402_5%

CK_PWRGD <22>

R566

R566 10_0402_5%

10_0402_5%

@

C733

C733 10P_0402_50V8J

10P_0402_50V8J

@

1 2

10K_0402_5%@

1

2

1

2

M_PWROK

C441

C717

R362

12

R301

R301 453_0402_1%

453_0402_1%

12

R528

R528 453_0402_1%

453_0402_1%

12

1

2

R320 3.24K_0402_1%R320 3.24K_0402_1%

1 2

R383 3.24K_0402_1%R383 3.24K_0402_1%

1 2

RSMRST circuit

R656

@R656

@

0_0402_5%

1 2

C

EC_RSMRST#R

1

MMBT3906_SOT23-3

1 2

R279 4.7K_0402_5%R279 4.7K_0402_5%

D8A

D8A BAV99DW-7_SOT363

BAV99DW-7_SOT363

R272

1 2

D8B

R274

1 2

2.2K_0402_5%

5

1 2

4

3

@R271

@

0_0402_5%

Q26

3

E

B

2

6

R271

2 1

USB PORT LIST

DEVICEPORT

0

LEFT SIDE CMOS

2 3

3G RIGHT SIDE

4

BT

6

WIRELESS

8 10

NEW CARD RIGHT SIDE

11

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

ICH9M(3/4)-USB,GPIO,PCIE

JITR1_LA-4141P

1

CLK_14M_ICHCLK_48M_ICH

R460

R460 10_0402_5%

10_0402_5%

@

C576

C576 10P_0402_50V8J

10P_0402_50V8J

@

M_PWROK

1

C804

@

1000P_0402_50V7K

2

+3VALW

of

28 52Friday, May 02, 2008

+3VS

+3VALW

POK <45,47>

0.1

5

+RTCVCC

0.1U_0402_16V4Z

D D

100_0402_5%

C C

+1.5VS

1 2

+1.5VS

CHB1608U301_0603

B B

+1.5VS

0.1U_0402_16V4Z

C529

0.1U_0402_16V4Z

A A

+1.5VS

1 2

CHB1608U301_0603

1

C459

2

+5VS +3VS

R558

R582

R309

1 2

0_0805_5%

C455

220U_D2_4VM

R518

C712

1

C510

2

+3VS

1

2

(10UF*1, 2.2UF*1)

R281

5

1

C460

0.1U_0402_16V4Z

2

21

D21

D21 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

ICH_V5REF_RUN

1

C728

C728 1U_0603_10V4Z

1U_0603_10V4Z

2

+3VALW+5VALW

21

D22

D22 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

ICH_V5REF_SUS

1

C738

C738 1U_0603_10V4Z

1U_0603_10V4Z

2

40 mils

1

+

C445

2

10U_0805_10V4Z

1

2

1U_0603_10V4Z

+1.5VS

0.1U_0402_16V4Z

close to AC7

+1.5VS

4.7U_0805_10V4Z

1

C430

2

20 mils

10U_0805_10V4Z

1

C446

2

1

C710

2

10U_0805_10V4Z

1

C493

2

CHB1608U301_0603

1 2

R282

C431

20 mils

ICH_V5REF_RUN

ICH_V5REF_SUS

1

C447

2

2.2U_0603_6.3V4Z

+1.5VS

1

C542

1U_0603_10V4Z

+1.5VS

1U_0603_10V4Z

T100T100 T99T99

2.2U_0603_6.3V4Z

1

C434

2

10U_0805_10V4Z

2

+1.5VS

1

C492

2

1

C528

2

VCC_LAN1_05_INT_ICH_1 VCC_LAN1_05_INT_ICH_2 VCCCL1_05_ICH

1

2

+3VS

4

U34F

A23

VCCRTC

A6

V5REF

AE1

V5REF_SUS

AA24

VCC1_5_B[01]

AA25

VCC1_5_B[02]

AB24

VCC1_5_B[03]

AB25

VCC1_5_B[04]

AC24

VCC1_5_B[05]

AC25

VCC1_5_B[06]

AD24

VCC1_5_B[07]

AD25

VCC1_5_B[08]

AE25

VCC1_5_B[09]

AE26

VCC1_5_B[10]

AE27

VCC1_5_B[11]

AE28

VCC1_5_B[12]

AE29

VCC1_5_B[13]

F25

VCC1_5_B[14]

G25

VCC1_5_B[15]

H24

VCC1_5_B[16]

H25

VCC1_5_B[17]

J24

VCC1_5_B[18]

J25

VCC1_5_B[19]

K24

VCC1_5_B[20]

K25

VCC1_5_B[21]

L23

VCC1_5_B[22]

L24

VCC1_5_B[23]

L25

VCC1_5_B[24]

M24

VCC1_5_B[25]

M25

VCC1_5_B[26]

N23

VCC1_5_B[27]

N24

VCC1_5_B[28]

N25

VCC1_5_B[29]

P24

VCC1_5_B[30]

P25

VCC1_5_B[31]

R24

VCC1_5_B[32]

R25

VCC1_5_B[33]

R26

VCC1_5_B[34]

R27

VCC1_5_B[35]

T24

VCC1_5_B[36]

T27

VCC1_5_B[37]

T28

VCC1_5_B[38]

T29

VCC1_5_B[39]

U24

VCC1_5_B[40]

U25

VCC1_5_B[41]

V24

VCC1_5_B[42]

V25

VCC1_5_B[43]

U23

VCC1_5_B[44]

W24

VCC1_5_B[45]

W25

VCC1_5_B[46]

K23

VCC1_5_B[47]

Y24

VCC1_5_B[48]

Y25

VCC1_5_B[49]

AJ19

VCCSATAPLL

AC16

VCC1_5_A[01]

AD15

VCC1_5_A[02]

AD16

VCC1_5_A[03]

AE15

VCC1_5_A[04]

AF15

VCC1_5_A[05]

AG15

VCC1_5_A[06]

AH15

VCC1_5_A[07]

AJ15

VCC1_5_A[08]

AC11

VCC1_5_A[09]

AD11

VCC1_5_A[10]

AE11

VCC1_5_A[11]

AF11

VCC1_5_A[12]

AG10

VCC1_5_A[13]

AG11

VCC1_5_A[14]

AH10

VCC1_5_A[15]

AJ10

VCC1_5_A[16]

AC9

VCC1_5_A[17]

AC18

VCC1_5_A[18]

AC19

VCC1_5_A[19]

AC21

VCC1_5_A[20]

G10

VCC1_5_A[21]

G9

VCC1_5_A[22]

AC12

VCC1_5_A[23]

AC13

VCC1_5_A[24]

AC14

VCC1_5_A[25]

AJ5

VCCUSBPLL

AA7

VCC1_5_A[26]

AB6

VCC1_5_A[27]

AB7

VCC1_5_A[28]

AC6

VCC1_5_A[29]

AC7

VCC1_5_A[30]

A10

VCCLAN1_05[1]

A11

VCCLAN1_05[2]

A12

VCCLAN3_3[1]

B12

VCCLAN3_3[2]

A27

VCCGLANPLL

D28

VCCGLAN1_5[1]

D29

VCCGLAN1_5[2]

E26

VCCGLAN1_5[3]

E27

VCCGLAN1_5[4]

A26

VCCGLAN3_3

ICH9-M ES_FCBGA676

4

VCCA3GP

VCCP_CORE

ARX

ATX

USB CORE

GLAN POWER

VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16]

CORE

VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24] VCC1_05[25] VCC1_05[26]

VCCDMIPLL VCC_DMI[1]

VCC_DMI[2]

V_CPU_IO[1] V_CPU_IO[2]

VCC3_3[01] VCC3_3[02] VCC3_3[07]

VCC3_3[03] VCC3_3[04] VCC3_3[05] VCC3_3[06]

VCC3_3[08] VCC3_3[09] VCC3_3[10] VCC3_3[11] VCC3_3[12]

PCI

VCC3_3[13] VCC3_3[14]

VCCSUSHDA

VCCSUS1_05[1] VCCSUS1_05[2]

VCCSUS1_5[1] VCCSUS1_5[2]

VCCSUS3_3[01] VCCSUS3_3[02] VCCSUS3_3[03] VCCSUS3_3[04]

VCCPSUS

VCCSUS3_3[05]

VCCSUS3_3[06] VCCSUS3_3[07] VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16]

VCCPUSB

VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20]

VCCCL1_05

VCCCL3_3[1] VCCCL3_3[2]

VCCHDA

VCCCL1_5

1

C521

2

+3VS

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

+3VALW

+3VS

3

1

C515 0.1U_0402_16V4ZC515 0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

0.01U_0402_16V7K

1

C429 10U_0805_6.3V6MC429 10U_0805_6.3V6M

C426

2

C504 10U_0805_10V4ZC504 10U_0805_10V4Z

C486

1

C545

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

T82T82 T79T79

R657

R657 0_0402_5%

0_0402_5%

GM@

+3VALW

1

C546

C551

0.1U_0402_16V4Z

2

1

C560

4.7U_0603_6.3V6K

2

T75T75

1

C498

C498 1U_0603_10V4Z@

1U_0603_10V4Z@

2

2007/10/15 2008/10/15

3

1 2

CHB1608U301_0603

1

2

+VCCP

1

2

1

C549

0.1U_0402_16V4Z

2

C552

12

R280

+3VS

1

2

(SATA)

1

C532

0.1U_0402_16V4Z

2

1

C803

4.7U_0603_6.3V6M

2

+1.5VS

+3VS

(DMI)

1

C433

0.1U_0402_16V4Z

2

+3VS

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z C534

C534

2

1 2

Compal Secret Data

R614

R614 0_0402_5%

0_0402_5%

PM@

+3VALW

Deciphered Date

1

2

+VCCP

A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

R29 W23

Y23 AB23

AC23 AG29

AJ6 AC10

AD19 AF20 AG24 AC20

B9 F9 G3 G6 J2 J7 K7

AJ4 AJ3

AC8 F17

VCCSUS1_5_ICH_1

AD8

VCCSUS1_5_ICH_2

F18

A18 D16 D17 E22

AF1

T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7

G22 G23

A24 B24

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+VCCP

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M C502

C502

1

2

C519

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z C484

C484

1

2

R613

PM@

1 2

0_0402_5%

check HDMI

2

1

U34E

AA26

VSS[001]

AA27

VSS[002]

AA3

VSS[003]

AA6

VSS[004]

AB1

VSS[005]

AA23

VSS[006]

AB28

VSS[007]

AB29

VSS[008]

AB4

VSS[009]

AB5

VSS[010]

AC17

VSS[011]

AC26

VSS[012]

AC27

VSS[013]

AC3

VSS[014]

AD1

VSS[015]

AD10

VSS[016]

AD12

VSS[017]

AD13

VSS[018]

AD14

VSS[019]

AD17

VSS[020]

AD18

VSS[021]

AD21

VSS[022]

AD28

VSS[023]

AD29

VSS[024]

AD4

VSS[025]

AD5

VSS[026]

AD6

VSS[027]

AD7

VSS[028]

AD9

VSS[029]

AE12

VSS[030]

AE13

VSS[031]

AE14

VSS[032]

AE16

VSS[033]

AE17

VSS[034]

AE2

VSS[035]

0.1U_0402_16V4Z

0.1U_0402_16V4Z C466

C466

1

2

+1.5VS+3VS

R612

R612 0_0402_5%

0_0402_5%

GM@

1 2

AE20

VSS[036]

AE24

VSS[037]

AE3

VSS[038]

AE4

VSS[039]

AE6

VSS[040]

AE9

VSS[041]

AF13

VSS[042]

AF16

VSS[043]

AF18

VSS[044]

AF22

VSS[045]

AH26

VSS[046]

AF26

VSS[047]

AF27

VSS[048]

AF5

VSS[049]

AF7

VSS[050]

AF9

VSS[051]

AG13

VSS[052]

AG16

VSS[053]

AG18

VSS[054]

AG20

VSS[055]

AG23

VSS[056]

AG3

VSS[057]

AG6

VSS[058]

AG9

VSS[059]

AH12

VSS[060]

AH14

VSS[061]

AH17

VSS[062]

AH19

VSS[063]

AH2

VSS[064]

AH22

VSS[065]

AH25

VSS[066]

AH28

VSS[067]

AH5

VSS[068]

AH8

VSS[069]

AJ12

VSS[070]

AJ14

VSS[071]

AJ17

VSS[072]

AJ8

VSS[073]

B11

VSS[074]

B14

VSS[075]

B17

VSS[076]

B2

VSS[077]

B20

VSS[078]

B23

VSS[079]

B5

VSS[080]

B8

VSS[081]

C26

VSS[082]

C27

VSS[083]

E11

VSS[084]

E14

VSS[085]

E18

VSS[086]

E2

VSS[087]

E21

VSS[088]

E24

VSS[089]

E5

VSS[090]

E8

VSS[091]

F16

VSS[092]

F28

VSS[093]

F29

VSS[094]

G12

VSS[095]

G14

VSS[096]

G18

VSS[097]

G21

VSS[098]

G24

VSS[099]

G26

VSS[100]

G27

VSS[101]

G8

VSS[102]

H2

VSS[103]

H23

VSS[104]

H28

VSS[105]

H29

VSS[106]

ICH9-M ES_FCBGA676

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

ICH9M(4/4)-POWER&GND

VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04] VSS_NCTF[05] VSS_NCTF[06] VSS_NCTF[07] VSS_NCTF[08] VSS_NCTF[09] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12]

JITR1_LA-4141P

VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198]

1

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29

0.1

of

29 52Monday, May 05, 2008

A

B

C

D

E

0308_Change R294 and R295 from 0 ohm to bead, C363 from 10uF to 680pF, C365 and C368 from 0.1uF to 680p

+3VALW

12

R661

R661 100K_0402_5%

100K_0402_5%

@

1 1

2 2

3 3

VDD_IO

12

R662

R662 100K_0402_5%

100K_0402_5%

@

HDA_BITCLK_CODEC

12

R327

R327 33_0402_5%

33_0402_5%

1

C458

C458 22P_0402_50V8J

22P_0402_50V8J

2

In order for the modem wake on ring feature to function, the CODEC must be powered by a rail that is not removed when the system is in standby.

R333

1 2

+3VS

MBV2012301YZF_0805

R660

@R660

+3VALW

@

1 2

MBV2012301YZF_0805

+3VDD_CODEC

HDA_RST_CODEC#<8,16,27>

HDA_BITCLK_CODEC<8,16,27>

HDA_SYNC_CODEC<8,16,27>

HDA_SDIN2<27> HDA_SDOUT_CODEC<8,16,27>

DIB_P DIB_N

C478

680P_0402_50V7K

+1.5VS

R323 33_0402_5%R323 33_0402_5%

R387 121Y-N 0402R387 121Y-N 0402

1 2

R394 121Y-N 0402R394 121Y-N 0402

1 2

PC_BEEP dB control

1 2

R369 10K_0402_5%R369 10K_0402_5%

1 2

R359 10K_0402_5%R359 10K_0402_5%

+3VS

R666

4.7K_0402_5%

@

HDA_SYNC_CODEC HDA_RST_CODEC#

1

C807

@

1000P_0402_50V7K

2

1 2

2

@

C806

0.1U_0402_16V4Z

1

2

C475

C497

680P_0402_50V7K

1U_0603_10V4Z

1

C477

C481

2

0.1U_0402_16V4Z

1 2 1 2

1 2

SPDIF_OUT<41>

PM@

EAPD<35>

0.1U_0402_16V4Z

VDD_IO

DIBP_C DIBN_C

PC_BEEP

R611 0_0402_5%

R610 0_0402_5%GM@R610 0_0402_5%GM@

1

2

1

2

DIGITAL ANALOG

C553

1 2

0.1U_0402_16V4Z

C565

1 2

0.1U_0402_16V4Z

C490

1 2

0.1U_0402_16V4Z

C480

1 2

0.1U_0402_16V4Z

R443

1 2

0_0402_5%

R446

1 2

0_0402_5%

4 4

Place these C and R around AGND and DGND, then choose the one which is close to Codec to populate

R454

1 2

A

0_0402_5%

GNDAGND

AUDIO CODEC

1

2

C491

C479

0.1U_0402_16V4Z

@ C479

@

10U_0805_10V4Z

U15

11

RESET#

6

BIT_CLK

10

SYNC

8

SDATA_IN

5

SDATA_OUT

43

DIB_P

42

DIB_N

12

PC_BEEP

48

S/PDIF

45

GPIO2

46

GPIO1

47

EAPD/GPIO0

1

DMIC_CLOCK

2

DMIC_1/2

BEEP#<35>

C452

0.1U_0402_16V4Z@

SB_SPKR<28>

For Layout:

Place decoupling caps near the power pins of SmartAMC device.

+3VAMP_CODEC+3VDD_CODEC

680P_0402_50V7K

MIC_L

MIC_R MONO

VREF

FLY_P FLY_N

1

2

R313

C537

34 35

19 14 15

18 16 17

27 28

20 21

29 30 31

13 24 39

37 22

23 32 33

12

0.1U_0402_16V4Z

C536

2

B

1

2

1

2

1

2

1U_0603_10V4Z

C540

1

C541

2

10U_0805_10V4Z

0.1U_0402_16V4Z

MIC_C_BIAS

MIC_EXTL MIC_EXTR

MIC_INL MIC_INR

SENSE VC_REFA VREF_HI

VREF_LO

1 2

C533 1U_0603_10V4ZC533 1U_0603_10V4Z

VREF_MIC

+3VS

12

R347

R347 10K_0402_1%

10K_0402_1%

C465

12

1U_0603_10V4Z

R346

R346 10K_0402_1%

10K_0402_1%

1 2

R354 20K_0402_5%R354 20K_0402_5%

1

C

Q28

Q28 2SC2411KT146_SOT23-3

2SC2411KT146_SOT23-3

E

3

D10

@D10

@

RB751V_SOD323

2 1

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

0.1U_0402_16V4Z

44

4

3

9

VDD_IO

DVDD_44

DVDD_1-8

DVDD_3-3

DVSS_7

7

41

25

C456

1

1U_0603_10V4Z

2

1U_0603_10V4Z

B

C512

36

26

40

AVEE

PORTA_L

AVDD_26

AVDD_40

PORTA_R MICBIASB

PORTB_L

PORTB_R MICBIASC

PORTC_L

PORTC_R

PORTD_L

PORTD_R

STEREO_L

STEREO_R

SENSEA

VREF_LO

VREF_HI RESERVED_32 RESERVED_33

AVSS_3838DVSS_41

AVSS_25

CX20561-12Z_LQFP48_7X7

R318

1 2

12

560_0402_5%

C443

R317

1 2

12

560_0402_5%

10K_0402_5%

R395

R395 MBV2012301YZF_0805

MBV2012301YZF_0805

1 2

C524 4.7U_0805_10V4ZC524 4.7U_0805_10V4Z

R424

12

MBV2012301YZF_0805

@

C496 2.2U_0603_6.3V4ZC496 2.2U_0603_6.3V4Z C505 2.2U_0603_6.3V4ZC505 2.2U_0603_6.3V4Z

R607 0_0402_5%

MONO@

C516 2.2U_0603_6.3V4ZC516 2.2U_0603_6.3V4Z C525 2.2U_0603_6.3V4Z

C525 2.2U_0603_6.3V4Z

1

2

1U_0603_10V4Z

C526

C517

C485 1U_0603_10V4ZC485 1U_0603_10V4Z

PC_BEEP1 PC_BEEP

1 2

Issued Date

C

CHANGE TO 0ohm (2008/05/05)

+3VS

12

+VDDA_CODEC

4.7kohm for MICL + MICR

2.2kohm for MICL or MICR

MIC_C_BIAS

R3852.2K_0402_5% R3852.2K_0402_5%

HP_L <41> HP_R <41>

1 2 1 2

MIC_INLMIC_INR

12

1 2 1 2

ARRAY@

1

C535

2

12

R353

R353 20K_0402_5%

20K_0402_5%

@

LFE_OUT <31> LINE_OUTL <31> LINE_OUTR <31>

For Vista

1

C548

2

10U_0805_10V4Z

0.1U_0402_16V4Z

DIB_N DIB_P

22P_0402_50V8J

Compal Secret Data

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

W=40Mil

R3802.2K_0402_5% R3802.2K_0402_5%

ARRAY@

R653 100_0402_1%R653 100_0402_1%

R654 100_0402_1%R654 100_0402_1%

1 2

R392 5.1K_0402_1%R392 5.1K_0402_1%

1 2

R391 5.1K_0402_1%R391 5.1K_0402_1%

1 2

R386 20K_0402_5%R386 20K_0402_5%

R664

33_0402_5%

C809

1 2

D

CODEC POWER

+5VALW

@

1 2

C571 0.1U_0402_16V4Z

SUSP#<35,40,42,46,49>

R668 1K_0402_5%

1K_0402_5%

10U_0805_10V4Z@

1 2

C811

1 2

0_0402_5%

R669

R5882.2K_0402_5%

R4052.2K_0402_5%

ARRAY@

EXT_MIC_L <41> EXT_MIC_R <41>

INT_MICL <31> INT_MICR <41>

port A : 5.11K ohm port B : 10.0K ohm port C : 20.0K ohm port D : 39.2K ohm

R663

R663 33_0402_5%

33_0402_5%

1 2

C808

22P_0402_50V8J

(3.33V)

R405

4.7K_0402_5%

MONO@

4

G2

3

G1 2 1

1 2

GND GND

E

6 5

250mW

1

C562

4.7U_0805_10V4Z

2

@

30 52Wednesday, May 07, 2008

of

U21

1

VIN

OUT

2

GND SHDN#3BP

APE8805A-33Y5P_SOT23-5

@

0.1U_0402_16V4Z

@R668

@

12

+3VAMP_CODEC

VREF_MIC

5

4

C558

1

2

@

+VDDA_CODEC

1

C555

0.1U_0402_16V4Z

2

@

+3VAMP_CODEC

external MIC

Internal MIC / Array MIC

Internal WOOFER

Internal SPKR.

+3VAMP_CODEC

JACK_PLUG_HP <41>

JACK_PLUG_MIC <41>

DIB_N DIB_P

RJ_RING<34>

RJ_TIP<34>

Title

Size Document Number Rev

Custom

Date: Sheet

Port A

Port C

JP24

4 3 2 1

ACES_88514-0441_4P

JP8

1 2

3 4

MOLEX_53780-0270

ME@

Compal Electronics, Inc.

CX20561-AMOM Codec

JITR1_LA-4141P

0.1

A

B

C

D

E

C689

0.1U_0402_16V4Z

WOOFER+ WOOFER-

+5VAMP

1

2

+3VALW

2

C686

C686 10U_0805_10V4Z

10U_0805_10V4Z

1

R440

R440 10K_0402_5%

10K_0402_5%

@

1 2

0_0402_5%

1 2

FBMA-L11-160808-700LMT_0603

G1442 SubWoofer Amplifier

1nd = APA3011 (SA00001JM00) 2nd = TPA6211 (SA621110010 )

1 1

1000P_0402_50V7K

1 2

C687

C687 47K_0402_5%

1U_0603_10V4Z

LFE_OUT<30>

2 2

LFE_OUT

1 2

C683

18K_0402_5%

R505

47K_0402_5%

1 2

R506

+5VAMP

WIN1

WIN2

2

C427

2.2U_0603_6.3V4Z

1

filter

33K_0402_5%

1 2

R507

1500P_0402_50V7K

1 2

C424

W=40mil

U30

6

VDD

SHUTDOWN#

3

IN+

4

IN-

2

BYPASS

APA3011XA-TRL_MSOP8

GND

1 5

Vo+

8

Vo-

7

+5VS

L27

EC_MUTE#AMP_OFF#

R508

12

EC_MUTE# <35>

SubWoofer Conn.

20mil

WOOFERWOOFER+

L40

L40 L39

L39

1 2 1 2

FBMA-L11-160808-700LMT_0603

WOWO+

FBMA-L11-160808-700LMT_0603

JP9

1

2

3

GND

4

GND

MOLEX_53780-0270

ME@

Speaker Amplifier

1nd = APA2031 (SA00001RZ00) 2nd = G1431F2U (SA000012Y00)

3 3

+5VAMP

+5VAMP +5VAMP

R397

@ R397

@

100K_0402_1%

1 2

R400

100K_0402_1%

1 2

+3VALW

R401

100K_0402_1%

1 2

GAIN1GAIN0

R398

100K_0402_1%

@

1 2

GAIN0 GAIN1 0 0 6dB 0 1 10dB 1 0 15.6dB 1 1 21.6dB

SPKL+O SPKL-O SPKR+O SPKR-O

20mil

R413 0_0402_5%R413 0_0402_5%

1 2

R412 0_0402_5%R412 0_0402_5%

1 2

R435 0_0402_5%R435 0_0402_5%

1 2

R436 0_0402_5%R436 0_0402_5%

1 2

Speaker Conn.

SPK_L1+ SPK_L1SPK_R1+ SPK_R1-

E&T_3802-E04N-01R

6

G1

5

G1

4

3

2

1

JP10

C544 22P_0402_50V8J@C544 22P_0402_50V8J@

1

2

C557 22P_0402_50V8J@C557 22P_0402_50V8J@

C556 22P_0402_50V8J@C556 22P_0402_50V8J@

C543 22P_0402_50V8J@C543 22P_0402_50V8J@

1

2

W=40mil

R439

10K_0402_5%

SHUTDOWN#

LOUTROUTLOUT+

ROUT+

GND GND GND GND

BYPASS

10K_0402_5%

12

NC

19 8 14 4 18 1

11 13 20

10

B

@

1 2

R441

1

C523

4.7U_0805_10V4Z

2

1 2

0_0402_5%

EC_MUTE#AMP_OFF# SPKL-O SPKR-O SPKL+O

SPKR+O

EC_MUTE# <35>

20mil

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

INT MIC

Compal Secret Data

Deciphered Date

WM-64PCY_2P

D

MIC2

1 2

45@

2008/10/152007/10/15

INT_MICL

GNDA

1

2

Title

Size Document Number Rev

Custom

Date: Sheet

INT_MICL <30>

C742

C742 47P_0402_50V8J

47P_0402_50V8J

GNDA

Compal Electronics, Inc.

AMP/VR/Audio Jack/MIC

12

R414

R414 0_0402_5%

0_0402_5%

@

JITR1_LA-4141P

E

0.1

31 52Friday, May 02, 2008

0.1

of

1

C527

0.1U_0402_16V4Z

R409 0_0402_5%R409 0_0402_5%

LINE_OUTL<30> LINE_OUTR<30>

4 4

R455

1 2 1 2

0_0402_5%

1

C569

4.7U_0805_10V4Z

2

GAIN0 GAIN1

C550 3300P_0603_50V7KC550 3300P_0603_50V7K

LIN

C570 3300P_0603_50V7KC570 3300P_0603_50V7K

RIN

12

R417

R451

10K_0402_5%

C506

@

A

C506 3300P_0603_50V7K

3300P_0603_50V7K

U18

16

VDD

6

PVDD

15

PVDD

2

GAIN0

3

GAIN1

5

LIN-

17

RIN-

9

LIN+

7

RIN+

APA2031_TSSOP20~N

C507

C507 3300P_0603_50V7K

3300P_0603_50V7K

A

Mini-Express Card for 3G Or TV Tuner

Mini-Express Card for WLAN

+3VS

1

C734

4.7U_0805_10V4Z

1 1

2

1

C704

0.1U_0402_16V4Z

2

Mini-Express Card(Slot 1-WLAN WIMAX)

ICH_PCIE_WAKE#<28,33,40>

WLAN_CLKREQ#<22>

2 2

ICH_PCIE_WAKE# WLAN_ACTIVE

WLAN_CLKREQ#

+3VS

2005/09/27 modified. Base on OPTION GTM351E Datasheet Rev0.1

Vcc 3.3V +/- 8% Peak Icc 2750mA with max supply droop 50mA Average Icc 1000mA

R569 0_0402_5%@ R569 0_0402_5%@

1 2

R565 0_0402_5%@ R565 0_0402_5%@

1 2

CLK_PCIE_WLAN#<22>

CLK_PCIE_WLAN<22>

PCIE_RXN3<28> PCIE_RXP3<28>

PCIE_TXN3<28> PCIE_TXP3<28>

+1.5VS

1

C729

4.7U_0805_10V4Z

2

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

B

1

2

JP22

1

3

5

7

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

GND1

GND2

FOX_AS0B226-S56N-7F

ME@

C732

0.1U_0402_16V4Z

2

4

6

8

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42

(WWAN_LED#)

44 46 48 50 52

54

1

C709

0.1U_0402_16V4Z

2

R596 0_0402_5%@R596 0_0402_5%@

R592

R537 0_0402_5%@R537 0_0402_5%@

1 2

R534 0_0402_5%@R534 0_0402_5%@

1 2

0_0402_5%

1 2

WIMAX_LED# WLAN_LED#

C

+3VALW

1

2

2Watt

WL_OFF#

PLT_RST# <8,16,26,33,40>

USB20_N8 <28> USB20_P8 <28>

R552

R552 R555

R555

1 2 1 2

C725

0.1U_0402_16V4Z

+3VS +1.5VS

3G_OFF# <35>

WL_OFF# <35>

0_0402_5%@

+3VALW

0_0402_5%@

ICH_SMBCLK <22,28,40> ICH_SMBDATA <22,28,40>

+3VS

D

+5VS

12

R246

R246 10K_0402_1%

10K_0402_1%

1

OUT

BT_OFF#<35>

2

BT_LED#<38>

DTC124EKAT146_SC59-3

IN

3

Q16

WLAN_LED# WIMAX_LED#

Q17

Q17 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

GND

1

OUT

GND

3

2

IN

12

300_0402_5%

1 2

R525

D24

3 2

DAP202U_SOT323

@

BT MODULE CONN

SI2301BDS-T1-E3_SOT23-3

+3VS

USB20_N6<28> USB20_P6<28>

R245

R245 10K_0402_5%

10K_0402_5%

@

1

1 2

R526 300_0402_5%

E

Q18

D

13

USB20_N6 USB20_P6

+3VS_BT

S

G

2

BTON_LEDBT_ACTIVE BT_ACTIVE WLAN_ACTIVE

WLAN_WIMAX_LED# <38>

12

C409

0.1U_0402_16V4Z

JP7

1

2

3

4

5

6

7

8

9

GND1

10

GND2

MOLEX_53780-0870

ME@

Mini-Express Card(Slot 2-WLAN WIMAX)

JP23

3 3

4 4

ICH_PCIE_WAKE#<28,33,40>

WLAN_CLKREQ1#<22>

ICH_PCIE_WAKE# BT_ACTIVE WLAN_ACTIVE WLAN_CLKREQ1#

+3VS

2005/09/27 modified. Base on OPTION GTM351E Datasheet Rev0.1

Vcc 3.3V +/- 8% Peak Icc 2750mA with max supply droop 50mA Average Icc 1000mA

A

R570 0_0402_5%@ R570 0_0402_5%@

1 2

R567 0_0402_5%@ R567 0_0402_5%@

1 2

CLK_PCIE_WLAN1#<22>

CLK_PCIE_WLAN1<22>

PCIE_RXN1<28> PCIE_RXP1<28>

PCIE_TXN1<28> PCIE_TXP1<28>

JP23

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

GND2

FOX_AS0B226-S56N-7F

ME@

B

2

3G_GND1

4

6

8

10

12

14

16

16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

3G_GND2

18 20 22 24

3G_GND3

26 28 30 32

3G_GND4

34 36 38

3G_GND5

40 42 44 46 48

3G_GND6

50 52

54

3G_3VS 3G_1.5VS

R595 0_0402_5%@R595 0_0402_5%@

R593

R536 0_0402_5%@R536 0_0402_5%@

1 2

R533 0_0402_5%@R533 0_0402_5%@

1 2

+3VS +1.5VS

1 2

0_0402_5%

1 2

WIMAX_LED# WLAN_LED#

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

C

2Watt

USB20_N3 <28> USB20_P3 <28>

3G_OFF# <35>

WL_OFF# <35>

PLT_RST# <8,16,26,33,40>

1 2

R542

R542 R594 0_0402_5%@R594 0_0402_5%@

1 2

ICH_SMBCLK <22,28,40> ICH_SMBDATA <22,28,40>

2007/10/15 2008/10/15

0_0402_5%@

Compal Secret Data

+3VALW +3VS

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Mini-Card/3G/FeliCa/BT

JITR1_LA-4141P

E

32 52Monday, May 05, 2008

of

0.1

5

Layout Notice : Filter place as close chip as possible.

+2.5V_LAN

D D

C C

B B

A A

L4

FBM-L11-160808-601LMT_0603

+1.2V_LAN

L30 FBM-L11-160808-601LMT_0603L30 FBM-L11-160808-601LMT_0603

L6 FBM-L11-160808-601LMT_0603L6 FBM-L11-160808-601LMT_0603

L31 FBM-L11-160808-601LMT_0603L31 FBM-L11-160808-601LMT_0603

L5 FBM-L11-160808-601LMT_0603L5 FBM-L11-160808-601LMT_0603

Layout Notice : Place as close chip as possible.

0.1U_0402_16V4Z

0.1U_0402_16V4Z C52

C52

12

0.1U_0402_16V4Z

L7

12

0.047U_0402_16V4Z

L8

12

1U_0603_10V4Z

4.7U_0805_10V4Z

C64

4.7U_0805_10V4Z

1U_0603_10V4Z

+2.5V_LAN

2

C54

1

10U_0805_10V4Z

C56

C68

0.047U_0402_16V4Z

12

1

C73

2

12

2

C72

1

12

2

1

12

1

C69

2

C44

2

1

2

1

21.5

2

1

+LAN_BIASVDD

1

2

0.1U_0402_16V4Z

+XTALVDD

2

C76

1

C71

0.1U_0402_16V4Z

+AVDDL

2

C75

0.1U_0402_16V4Z

1

+GPHY_PLLVDD

2

C70

0.1U_0402_16V4Z

1

+PCIE_PLLVDD

2

C63

0.1U_0402_16V4Z

1

+PCIE_VDD

2

C60

0.1U_0402_16V4Z

1

+LAN_AVDD

1

C74

0.01U_0402_16V7K

2

EN_WOL<35>

(CLKREQ#) and (ENERGY_DET) are only supported in BCM5787M

2

C42

1

27P_0402_50V8J

R39

Y1

1 2

25MHZ_20P

2N7002_SOT23

200_0402_1%

12

EN_WOL

4

L3

@L3

@

FBM-L11-321611-260-LMT_1206

1 2

R25

R25 33K_0402_5%

33K_0402_5%

+3V_LAN

PCIE_TXN6<28> PCIE_TXP6<28>

PCIE_RXP6<28>

PLT_RST#<8,16,26,32,40>

1 2

R33 4.7K_0402_5%@R33 4.7K_0402_5%@

1 2

R32 4.7K_0402_5%@R32 4.7K_0402_5%@

+3VALW

+3VS +3VS

1

C34

0.1U_0603_50V7K

2

0.1U_0402_16V7K

+3V_LAN +3V_LAN

+3V_LAN

+5VALW

12

13

D

2

Q8

G

S

CLK_PCIE_LAN#<22>

CLK_PCIE_LAN<22> CLKREQ_LAN#<22>

PCI_CBE#3<26,36>

PCIE_RXN6<28>

ICH_PCIE_WAKE#<28,32,40> LAN_WAKE#<35>

XTALO

XTALI

2

C43

1

27P_0402_50V8J

D

S

D

S

Q7

1 3

AO3414_SOT23-3

G

2

1 2

R35 0_0402_5%@R35 0_0402_5%@

1 2

R52 1K_0402_5%R52 1K_0402_5%

1 2

R49 1K_0402_5%R49 1K_0402_5%

R40

1 2

0_0402_5%@

+GPHY_PLLVDD

PCIE_MRX_C_LTX_N6

C57

PCIE_MRX_C_LTX_P6

C59

@

1 2

R31 0_0402_5%

1 2

R42 47K_0402_5%@R42 47K_0402_5%@

1 2

R44 47K_0402_5%@R44 47K_0402_5%@

1 2

R34 0_0402_5%R34 0_0402_5%

LAN_WP GPIO2

1 2

R41 0_0402_5%@R41 0_0402_5%@

XTALI XTALO

3

Layout Notice : Place as close chip as possible.

+3V_LAN

2

C32

1

10U_0805_10V4Z

U1U1

28 29 11

3 53 54

59 35 32 31 25 26

10 12

58 57

4

7

8

9

21 22

16 24

2

C62

C55

1

0.1U_0402_16V4Z

PCIE_REFCLK_N PCIE_REFCLK_P CLKREQ

LOW PWR VMAIN_PRSNT VAUX_PRSNT

ENERGY_DET GPHY_PLLVDD PCIE_RXD_N PCIE_RXD_P PCIE_TXD_N PCIE_TXD_P

PERST WAKE

SMB_CLK SMB_DATA

GPIO_0(SERIAL_DO) GPIO_1(SERIAL_DI) GPIO_2 UART_MODE

XTALI XTALO

REG_GND PCIE_GND

SPD100LED SPD1000LED TRAFFICLED

SCLK(EECLK)

SO(EEDATA)

REGCTL12 REGCTL25

PCIE_PLLVDD

GND

69

1

C81

C81 1U_0603_10V4Z

1U_0603_10V4Z

2

TRD0_N TRD0_P TRD1_N TRD1_P TRD2_N TRD2_P TRD3_N TRD3_P

LINKLED

RDAC

XTALVDD

VDDIO VDDIO VDDIO VDDIO VDDIO

VDDP VDDP

VDDC VDDC VDDC VDDC VDDC VDDC

BIASVDD

PCIE_VDD PCIE_VDD

AVDD AVDD AVDD

AVDDL AVDDL AVDDL AVDDL

LAN_TX0-

41

LAN_TX0+

40

LAN_RX1-

42

LAN_RX1+

43 48

T20T20

47

T18T18

49

T21T21

50

T19T19

R36 0_0402_5%R36 0_0402_5%

2

1 2

R37 0_0402_5%R37 0_0402_5%

1

1 2

R38 0_0402_5%@R38 0_0402_5%@

67

1 2

66

LAN_CLK

65

SI

63

SI

CS

4.7K_0402_5%

LAN_DATA

64

CS#

62

CTL12

14

CTL25

18 37

1 2

R56 1K_0402_5%R56 1K_0402_5%

23

+XTALVDD

6 15 19 56 61

17

+2.5V_LAN

68 5

+1.2V_LAN

13 20 34 55 60

+LAN_BIASVDD

36 30

+PCIE_PLLVDD

27

+PCIE_VDD

33 38

+LAN_AVDD

45 52

39

+AVDDL

44 46 51

12

R28

LAN_WP LAN_CLK LAN_DATA

LAN_TX0- <34> LAN_TX0+ <34> LAN_RX1- <34> LAN_RX1+ <34>

+3V_LAN

12

R27

4.7K_0402_5%

LAN_CLK

1 2

R30 4.7K_0402_5%R30 4.7K_0402_5%

2

1 2

C38

0.1U_0402_16V4Z

U2

8

VCC

7

WP

6

SCL

5

SDA

AT24C02_SO8

Layout Notice : 1.2V filter. Place as close chip as possible.

+1.2V_LAN

2

C49

C67

C77

4.7U_0805_10V4Z

LINKLED# <34>

ACTIVITY# <34>

1

0.1U_0402_16V4Z

CTL12

Notice : 4.7u 6.3V capactor Thickness 1.25mm

Layout Notice : Filter place as close chip as possible.

1

A0

2

A1

3

NC

4

GND

C46

CTL25

0.1U_0402_16V4Z

2

1

Q6

+2.5V_LAN

C58

2

C65

1

0.1U_0402_16V4Z

+3V_LAN

C53 0.1U_0402_16V4ZC53 0.1U_0402_16V4Z

MMJT9435T1G_SOT223

2 3

4

Q9

MBT35200MT1G_TSOP6

3

C45

2

1

0.1U_0402_16V4Z

1 2

+3V_LAN

1

+1.2V_LAN

41

256

1

C61

C61 10U_0805_10V4Z

10U_0805_10V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

BCM5787MKML

JITR1_LA-4141P

1

0.1

of

33 52Friday, May 02, 2008

5

4

3

2

1

+2.5V_LAN

EMI request

C602 0.1U_0402_16V4ZC602 0.1U_0402_16V4Z

1 2

D D

C607 0.1U_0402_16V4ZC607 0.1U_0402_16V4Z

1 2

C601 0.1U_0402_16V4ZC601 0.1U_0402_16V4Z

1 2

12

R476

R476 0_0402_5%

0_0402_5%

U25

LAN_RX1+<33>

LAN_RX1-<33>

LAN_TX0+<33>

LAN_TX0-<33>

LAN_RX1+

LAN_RX1-

LAN_TX0+ LAN_TX0- MDO0-

TCT

U25

1

RD+

2

RD-

3

CT

4

NC

5

NC

6

CT

7

TD+ TD-8TX-

350uH_NS0013LF

RX+

TX+

RX-

CT NC NC CT

MCT0

14 13 12

MCT1

11

MDO0+

10 9

R72 75_0402_5%R72 75_0402_5%

R76 75_0402_5%R76 75_0402_5%

12

RJ45_PR

MDO1+

16

MDO1-

15

+3V_LAN

C80

0.01U_0402_16V7K

1

2

Change C468,C470,C473,C474,C475,C476 from 0.01uF to 0.1uF

+3V_LAN

LAN_RX1-

R475 49.9_0402_1%R475 49.9_0402_1%

LAN_RX1+

R472 49.9_0402_1%R472 49.9_0402_1%

C C

LAN_TX0-

R478 49.9_0402_1%R478 49.9_0402_1%

LAN_TX0+

R477 49.9_0402_1%R477 49.9_0402_1%

12 12

C600

1 2

C610

1 2

0.1U_0402_16V4Z

RJ_TIP<30>

RJ_RING<30>

0.01U_0402_16V7K

1

C88

2

RJ_TIP RJ_RING

RJ45_PR

near LAN controller

RJ_RING RJ_TIP

B B

RJ11+RJ45 CONN

R67

ACTIVITY#<33>

LINKLED#<33>

R110 FBMA-L11-160808-181LMA15TR110 FBMA-L11-160808-181LMA15T

R107 FBMA-L11-160808-181LMA15TR107 FBMA-L11-160808-181LMA15T

1 2

C85

1000P_1206_2KV7K

C168

0.1U_0402_16V4Z

330P 3KV J NPO 1808 X2Y3

C801

1

2

R67

MDO0+ MDO0MDO1+ MDO2+ MDO2MDO1MDO3+ MDO3-

R92

330_0402_5%

12 12

2

1

330P 3KV J NPO 1808 X2Y3

C802

1

2

330_0402_5%

12

2

C78

0.1U_0402_16V4Z

1

JP14

11

VDD

12

GND

1

TX1+

2

TX1-

3

RX1+

4

TX2+

5

TX2-

6

RX1-

7

RX2+

8

RX2-

RJ45

13

VDD

14

GND

9

RJ11_1

10

RJ11_2

15

SGND1

16

SGND2

ALLTO_C100B6-110A4-L

RJ11

SGND3 SGND4

17 18

P/N: SE00000BM00 P/N: SE00000CM80

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

2

EMI REQUEST

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

LAN CONTROLLER

JITR1_LA-4141P

34 52Friday, May 02, 2008

1

of

0.1

L23

+3VALW +EC_AVCC

+3VALW

R5_PME#<36>

LAN_WAKE#<33>

PCI_PME#<26>

+3VALW

+5VALW

+3VS

1 2

FBM-11-160808-601-T_0603

0.1U_0402_16V4Z

1 2

L24 FBM-11-160808-601-T_0603L24 FBM-11-160808-601-T_0603

12

C538 22P_0402_50V8J@ C538 22P_0402_50V8J@

1 2

R388 47K_0402_5%R388 47K_0402_5%

0.1U_0402_16V4Z

1 2

R442 0_0402_5%R442 0_0402_5%

1 2

R421 0_0402_5%R421 0_0402_5%

1 2

R422 0_0402_5%@R422 0_0402_5%@

S

+3VALW

1 2

R379 100K_0402_1%@R379 100K_0402_1%@

1 2

R399 100K_0402_1%@R399 100K_0402_1%@

1 2

R292 10K_0402_5%@R292 10K_0402_5%@

1 2

R294 4.7K_0402_5%R294 4.7K_0402_5%

1 2

R293 4.7K_0402_5%R293 4.7K_0402_5%

1 2

R258 4.7K_0402_5%R258 4.7K_0402_5%

1 2

R259 4.7K_0402_5%R259 4.7K_0402_5%

FRD#SPI_SO FSEL#SPICS#

KSO17

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

100P_0402_50V8J@

2

C432

1

KB_RST#<27>

C509

D

13

@

G

2N7002_SOT23

2

C416

ECAGND

2

1

Q31

+3VALW

1 2

1

2

1

C437

1000P_0402_50V7K

2

D23

2 1

RB751V_SOD323

12

R40310_0402_5%@R40310_0402_5%@

KSO[0..15]<37>

KSI[0..7]<37,41>

R404

R404 10K_0402_5%

10K_0402_5%

EC_PME#

1

C415

100P_0402_50V8J@

2

C513

0.1U_0402_16V4Z

C513

0.1U_0402_16V4Z

C531

0.1U_0402_16V4Z

C531

0.1U_0402_16V4Z

1

2

GATEA20<27>

SERIRQ<28,37>

LPC_FRAME#<27,37>

LPC_AD3<27,37> LPC_AD2<27,37> LPC_AD1<27,37> LPC_AD0<27,37>

CLK_PCI_LPC<22>

PCI_RST#<26,36,37>

EC_SCI#<28>

PWR_LED_SC#<41>

KSI1<37>

KSI2<37,41>

KSO[0..15] KSI[0..7]

KSO16<41>

KSO17<41>

EC_SMB_CK1<45> EC_SMB_DA1<45>

EC_SMB_CK2<5,16,41> EC_SMB_DA2<5,16,41>

SLP_S3#<28> SLP_S5#<28>

EC_SMI#<28>

LID_SW#<41> +3VALW +3VALW

EC_TX_P80_DATA<37> EC_RX_P80_CLK<37>

15P_0402_50V8J

1 2

R609 4.7K_0402_5%R609 4.7K_0402_5%

1 2

R608 4.7K_0402_5%R608 4.7K_0402_5%

KILL_SW#<43>

FAN_SPEED1<5>

3G_OFF#<32>

ON/OFF#<41>

NUM_LED#<41>

XCLKI XCLKO

C514

+3VALW

C448

1000P_0402_50V7K

C448

1000P_0402_50V7K

C487

1000P_0402_50V7K

C487

C530

0.1U_0402_16V4Z

C530

0.1U_0402_16V4Z

C520

0.1U_0402_16V4Z

C520

1

2

XCLKI XCLKO

XCLKO XCLKI

2

1

32.768KHZ_12.5P_1TJS125BJ2A251

0.1U_0402_16V4Z

1

2

KB_RST#_EC

LPC_AD3 LPC_AD2 LPC_AD1 BATT_TEMP LPC_AD0

EC_RST# EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

KSO16 KSO17

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

EC_SMI# LID_SW#

FAN_SPEED1

EC_TX_P80_DATA EC_RX_P80_CLK

122 123

R393

1 2

20M_0603_5%@

4

1

IN

OUT

NC3NC

2

X1

1000P_0402_50V7K

1

2

U17

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44 45 46 47 48 49 50 51 52 53 54 81 82

77 78 79 80

6 14 15 16 17 18 19 25 28 29 30 31 32 34 36

KB926QFA1_LQFP128

2

1

Int. K/B

KSO5/GPIO25

Matrix

KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 LID_SW#/GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C EC_PME#/GPIO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A

XCLK1 XCLK0

C501

C501 15P_0402_50V8J

15P_0402_50V8J

SM Bus

+EC_AVCC

9

22

33

96

111

125

VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

GPO

GPIO

GPI

GND

11

24

35

94

113

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

67

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

AGND

69

ECAGND

Issued Date

INVT_PWM

21

BEEP#

23 26

ACOFF

27

63

BATT_OVP

64 65

BRD_ID

66

TSATN#_EC

75 76

DAC_BRIG

68

EN_FAN1

70

IREF

71 72

83

USB_ON

84 85 86

TP_CLK

87

TP_DATA

88

97 98

UMA_DIS

99 109

FRD#SPI_SO

119

FWR#SPI_SI

120

SPI_CLK

126

FSEL#SPICS#

128

RCIRRX

73

I2C_INT I2C_INT

74 89

CHARGE_LED0#

90

CAPS_LED#

91

CHARGE_LED1#

92 93

SYSON

95 121

ACIN

127

100

EC_LID_OUT#

101

EC_ON

102

MODULE_ID

103

ICH_POK_EC ICH_POK

104

BKOFF#

105 106 107 108

110 112 114

EC_THERM#

115

SUSP#

116

PBTN_OUT#

117 118

124

V18R

1

4.7U_0805_10V4Z

2

2007/10/15 2008/10/15

INVT_PWM <24> BEEP# <30> NOVO# <41> ACOFF <44,46>

BATT_TEMPA <45>

BATT_OVP <46> ADP_I <46>

@

1 2

R382 0_0603_5%

DAC_BRIG <24> EN_FAN1 <5> IREF <46> BT_OFF# <32>

EC_MUTE# <31>

USB_ON <43>

TP_CLK <37>

TP_DATA <37>

R325 4.7K_0402_5%

EN_WOL <33> CMOS_OFF# <40>

FRD#SPI_SO <38>

FWR#SPI_SI <38>

SPI_CLK <38>

FSEL#SPICS# <38>

RCIRRX <40>

I2C_INT <41>

FSTCHG <46>

CHARGE_LED0# <38>

CAPS_LED# <41>

CHARGE_LED1# <38>

PWR_LED# <38>

SYSON <40,42,48> VR_ON <50> ACIN <28,44>

EC_RSMRST# <28> EC_LID_OUT# <28> EC_ON <41,46>

BKOFF# <24> WL_OFF# <32> DDR3_SM_PWROK <8> SCROLL_LED# <41>

SLP_S4# <28> ENBKL <24> EAPD <30> EC_THERM# <28>

SUSP# <30,40,42,46,49>

PBTN_OUT# <28>

C511

ENE suggesttion at C0 revision

Compal Secret Data

for G sensor

EC_MUTE#

@

1 2

D12 RB751V_SOD323D12 RB751V_SOD323

Deciphered Date

TSATN# <8>

1 2

R300 10K_0402_5%@R300 10K_0402_5%@

USB_ON

1 2

R340 0_0402_5%

@

SUSP#

BATT_OVP BATT_TEMP

ACIN

KB926 SPI STRAP PIN

21

1 2

R339 10K_0402_5%R339 10K_0402_5%

1

C805

@

1000P_0402_50V7K

2

C744 100P_0402_50V8JC744 100P_0402_50V8J

1 2

C745 100P_0402_50V8JC745 100P_0402_50V8J

1 2

C746 100P_0402_50V8JC746 100P_0402_50V8J

1 2

+3VALW

12

R29110K_0402_5% R29110K_0402_5%

+3VS

12

Analog Board ID definition, Please see page 3.

R635

R635 10K_0402_5%

10K_0402_5%

Vab

ICH_POK <8,28>

+3VS

Module ID

J I T R 1 R 2

Title

Size Document Number Rev

Custom

Date: Sheet

EC_SMB_CK1 EC_SMB_DA1

TP_CLK TP_DATA

R342

10K_0402_1%

1 2

MODULE_ID

R341

@ R341

@

0_0402_5%

1 2

ID

01

0 1

2

3

4 5 6

Ra=100K Ohm

+3VALW +3VALW

C418

@ C418

@

0.1U_0402_16V4Z

1 2

U12

8

VCC

7

WP

6

SCL

5

SDA

AT24C16AN-10SU-2.7_SO8

@

1 2

R299 4.7K_0402_5%R299 4.7K_0402_5%

1 2

R298 4.7K_0402_5%R298 4.7K_0402_5%

+3VALW+3VALW

GM@ R330

GM@

10K_0402_1%

1 2

UMA_DIS

Vab

PM@ R329

PM@

0_0402_5%

1 2

UMA_DIS

H

L

BRD ID

R01 (EVT) R02 (DVT) R03 (PVT) R10A (MP) R01 (EVT) R02 (DVT) R03 (PVT) R10A (MP)7

Compal Electronics, Inc.

BIOS & EC I/O Port

JITR1_LA-4141P

1

A0

2

A1

3

A2

4

GND

+5VS

+3VALW

R330

R321

R329

33K_0402_1%

Vab

UMA VGA

R321(Rb) Vab

0

8.2K 18K 33K 56K

100K 200K

NC

35 52Monday, May 05, 2008

R308

100K_0402_1%

1 2

Rb

1 2

12

R265

R265 100K_0402_1%

100K_0402_1%

@

12

R273

R273 100K_0402_1%

100K_0402_1%

@

Ra

BRD_ID

1

C442

2

0V

0.25V

0.50V

0.82V

1.19V

1.65V

2.20V

3.30V

of

0.1U_0402_16V4Z

0.1

5

+1.8VS

PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0

PCI_CBE#3 PCI_CBE#2 PCI_CBE#1 PCI_CBE#0

PCI_DEVSEL# PCI_FRAME# PCI_IRDY# PCI_TRDY# PCI_STOP# PCI_PAR PCI_REQ0# PCI_GNT0#

12

270P_0402_50V7K

Z3008

1 2

56.2_0402_1%

1 2

56.2_0402_1%

+3VS

1

2

R5_PME#

R571

5.1K_0402_1%

R564

56.2_0402_1%

R572

56.2_0402_1%

1

C727

C720

2

4.7U_0805_10V4Z

2

1

26

56

0.1U_0402_16V4Z

U33

19

AD31

20

AD30

PCI_VCC

21

AD29

22

AD28

23

AD27

24

AD26

25

AD25

27

AD24

29

AD23

30

AD22

31

AD21

32

AD20

34

AD19

35

AD18

36

AD17

37

AD16

47

AD15

48

AD14

49

AD13

50

AD12

51

AD11

52

AD10

53

AD9

54

AD8

57

AD7

58

AD6

59

AD5

60

AD4

61

AD3

62

AD2

63

AD1

64

AD0

28

C/BE3#

38

C/BE2#

46

C/BE1#

55

C/BE0#

5

IDSEL

45

PCI_CLK

42

DEVSEL#

39

FRAME#

40

IRDY#

41

TRDY#

43

STOP#

44

PAR

17

PCI_REQ#

18

PCI_GNT#

1

PCI_RST#

11

INTA#

3

PME#

6

CLKRUN#

106

MEDIA_LED

GND

12

16

33

vendor request rserve common chock or 0 ohm

C739

C739 1U_0603_10V4Z

1U_0603_10V4Z

1

2

D D

C C

R560 100_0402_5%R560 100_0402_5%

PCI_AD22 CBS_IDSEL

1 2

PCI_CLKRUN#<28>

3IN1_LED#

LED behave:

B B

A A

Idel ---------> low Accress data --> always high

CLK_PCI_1394

12

R545

@

10_0402_5%

2

C723

1

@

4.7P_0402_50V8C

IEEE1394_TPBN0 IEEE1394_TPBP0 IEEE1394_TPAN0 IEEE1394_TPAP0

1

C698

PCI_AD[0..31]<26>

IEEE1394_TPBIAS0

C731

C722

2

0.1U_0402_16V4Z

4.7U_0805_10V4Z

PCI_CBE#3<26,33> PCI_CBE#2<26> PCI_CBE#1<26> PCI_CBE#0<26>

CLK_PCI_1394<22>

PCI_DEVSEL#<26> PCI_FRAME#<26> PCI_IRDY#<26> PCI_TRDY#<26> PCI_STOP#<26> PCI_PAR<26>

PCI_REQ0#<26>

PCI_GNT0#<26> PCI_RST#<26,35,37>

PCI_PIRQG#<26>

R5_PME#<35>

R561 10K_0402_5%@R561 10K_0402_5%@

1 2

R562 0_0402_5%R562 0_0402_5%

1 2

3IN1_LED#

5

0.1U_0402_16V4Z

1

C736

2

R568

1 2

R577

1 2

15

VCC1.814VCC1.8

GND

68

66

104

91

VCC1.892VCC1.8

OZ129

GND

116

115

4

+3V_PHY

81

79

73

67

7

125

122

120

103

102

AVCC

VCC3.3

VCC1.8

VCC3.3

VCC1.8

VCC3.3

GND

124

123

121

REF

XI

XO

TPBIAS

TPA+

TPA-

TPB+

TPB-

MC_3V#

SD_CLK/MS_CLK

SD_D3 SD_D2 SD_D1 SD_D0

SD_CMD

SD_WP

SD_CD#

MS_D1/XD_D7

XD_D6 XD_D5

XD_D4 MS_BS/XD_D3 MS_D0/XD_D2 MS_D2/XD_D1 MS_D3/XD_D0

XD_CE# XD_RB# XD_CLE XD_ALE

XD_WE#

XD_RE#

XD_WPO#

MS_CD# XD_CD#

PHY_TEST0 PHY_TEST1

NC NC NC NC NC NC NC NC

AGND

AGND70AGND

AGND

OZ129TN_LQFP128_14X14

82

80

77

69

65

FBM-L11-160808-601LMT_0603

R516 5.9K_0402_1%R516 5.9K_0402_1%

78

OZ129XI

83

OZ129XO

84

IEEE1394_TPBIAS0

76

IEEE1394_TPAP0

75

IEEE1394_TPAN0

74

IEEE1394_TPBP0

72

IEEE1394_TPBN0

71

SDPWR0_MSPWR_XDPWR

4

SDCLK_MSCLK

113

SDDATA3

111

SDDATA2

112

SDDATA1

107

SDDATA0

108

SDCMD

110

SDWP#

117

SDCD#

114

XDDATA7_MSDATA1

95

XDD6

93

XDD5

89

XDD4

87

XDDATA3_MSBS

88

XDDATA2_MSDATA0

90

XDDATA1_MSDATA2

94

XDDATA0_MSDATA3

96

XDCE#

119

XDRB#

100

XDCLE

118

XDALE

109

XDWE#

105

XDRE#

101

XDWP#

98

MSCD#

99

XDCD#

97

85 86

2 8 9 10 13 126 127 128

L41

12

1 2

change L41,L42 from L to 0ohm

UPDATE 1394 SYMBOL

JP1394

IEEE1394_TPBN0_CONN IEEE1394_TPBP0_CONN IEEE1394_TPAN0_CONN IEEE1394_TPAP0_CONN

Layout Note: Shield GND for IEEE1394_TPA and TPB

4

JP1394

4

TPB-

3

TPB+

2

TPA-

1

TPA+

SUYIN_020015FB004S515ZL

+3VS

1

C724

C730

2

change L41,L42 from L to 0ohm

0.1U_0402_16V4Z

4.7U_0805_10V4Z

MMCDATA4 MMCDATA5

MMCDATA6 MMCDATA7

10/19 Update MMC DATA4~7 bit

15P_0402_50V8J

8

GND

7

GND

6

GND

5

GND

3

L42

+VCC_4IN1

OZ129XI

OZ129XO

12

1

C701

2

0.1U_0402_16V4Z

JREAD1

XDWP# XDDATA3_MSBS XDDATA2_MSDATA0

XDDATA0_MSDATA3 MMCDATA4 SDDATA2 SDCD# SDWP#

XDDATA0_MSDATA3 XDD5 XDDATA7_MSDATA1 XDD4 XDD6 XDWE#

XDDATA7_MSDATA1 XDCE# XDRE# XDDATA1_MSDATA2 XDCLE XDDATA1_MSDATA2 XDALE XDCLE XDRB# XDCD#

SDPWR0_MSPWR_XDPWR

2006/08/04 2006/10/06

JREAD1

33

8 9

24 27 30

1 2

32

6 7 5

34

3

4 37 38 10 36 10 35 36 39 40

TAITW_R015-A10-LM

ME@

+3VS

1

C715

2

0.1U_0402_16V4Z

Compal Secret Data

+3VS

FBM-L11-160808-601LMT_0603

C696

X2

24.576MHz_16P_1BG24576CKIA

C695

3

24.576MHz_16P_1BG24576CKIA

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3V_PHY

1

C702

2

0.1U_0402_16V4Z

xD-WP xD-D3 xD-D2

MS-DATA3 SD-DAT4 SD-DAT2 SD-CD SD-WP

xD-D0 xD-D5 xD-D4 xD-D6 xD-WE xD-VCC xD-D7 xD-CE xD-RE xD-D1 xD-CLE xD-D1 xD-ALE xD-CLE xD-R/B xD-CD

MSCD# SDCD#

U32

3

IN

4

EN

2

GND

G5250C2T1U_SOT23-5

Deciphered Date

2

C703

4.7U_0805_10V4Z

OUT OUT

2

D19

2 3

DAN202UT106_SC70-3

40mil40mil

+VCC_4IN1

1 5

C699

SD-DAT5 SD-DAT0 SD-CMD SD-DAT3 SD-DAT1

MS-SCLK

MS-INS

MS-VCC MS-DATA1 MS-DATA2 MS-DATA0

SD-CLK SD-DAT6 SD-DAT7

SD-VCC

7IN1-GND 7IN1-GND

@

XDCD#

1

12

1

2

1U_0603_10V4Z

MS-BS

GND GND

R527

23 14 25 29 12

26 13 22 28 15 19 17

20 18 16 21

31 11

41 42

1

2

150K_0402_5%

1

SDCLK

+VCC_4IN1

10P_0402_50V8J

MMCDATA5 SDDATA0 SDCMD SDDATA3 SDDATA1

R530 22_0402_5%R530 22_0402_5%

SDCLK_MSCLKMSCLK

1 2

XDDATA3_MSBS MSCD#

XDDATA1_MSDATA2 XDDATA2_MSDATA0

R531 22_0402_5%R531 22_0402_5%

SDCLK_MSCLKSDCLK

1 2

MMCDATA6 MMCDATA7

+VCC_4IN1

1

C700

C714

2

0.1U_0402_16V4Z

4.7U_0805_10V4Z

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

1394+3 in 1 Card

IGT30 LA-3571P

10P_0402_50V8J

1

C718

@

MSCLK

C713

@

1

2

1

2

36 52Friday, May 02, 2008

0.1

of

5

4

3

2

1

INT_KBD Conn.

JP6

KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15

JP6

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

ACES_85202-2405

TP_CLK<35> TP_DATA<35>

+5VS

C245

0.1U_0402_16V4Z

KSO2 KSO15 KSO6 KSO8 KSO13 KSO12 KSO11 KSO10 KSO3 KSO4 KSI0 KSO0

KSI[0..7] KSO[0..15]

C396 100P_0402_50V8J@C396 100P_0402_50V8J@ C334 100P_0402_50V8J@C334 100P_0402_50V8J@ C400 100P_0402_50V8J@C400 100P_0402_50V8J@ C399 100P_0402_50V8J@C399 100P_0402_50V8J@ C330 100P_0402_50V8J@C330 100P_0402_50V8J@ C329 100P_0402_50V8J@C329 100P_0402_50V8J@ C332 100P_0402_50V8J@C332 100P_0402_50V8J@ C333 100P_0402_50V8J@C333 100P_0402_50V8J@ C328 100P_0402_50V8J@C328 100P_0402_50V8J@ C397 100P_0402_50V8J@C397 100P_0402_50V8J@ C395 100P_0402_50V8J@C395 100P_0402_50V8J@ C382 100P_0402_50V8J@C382 100P_0402_50V8J@

D D

C C

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

KSI[0..7] <35,41> KSO[0..15] <35>

KSO1

C401 100P_0402_50V8J@C401 100P_0402_50V8J@

KSO7

C398 100P_0402_50V8J@C398 100P_0402_50V8J@

KSI2

C392 100P_0402_50V8J@C392 100P_0402_50V8J@

KSO5

C394 100P_0402_50V8J@C394 100P_0402_50V8J@

KSI3

C393 100P_0402_50V8J@C393 100P_0402_50V8J@

KSO14

C331 100P_0402_50V8J@C331 100P_0402_50V8J@

KSI7

C377 100P_0402_50V8J@C377 100P_0402_50V8J@

KSI6

C378 100P_0402_50V8J@C378 100P_0402_50V8J@

KSI5

C381 100P_0402_50V8J@C381 100P_0402_50V8J@

KSI4

C380 100P_0402_50V8J@C380 100P_0402_50V8J@

KSO9

C379 100P_0402_50V8J@C379 100P_0402_50V8J@

KSI1

C376 100P_0402_50V8J@C376 100P_0402_50V8J@

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

To TP/B Conn.

JP5

1

TP_CLK TP_DATA

TP_DATA TP_CLK

C327 100P_0402_50V8J@C327 100P_0402_50V8J@ C326 100P_0402_50V8J@C326 100P_0402_50V8J@

2 3 4 5 6

ACES_85201-0405N

ME@

1 2 1 2

1 2 3 4 G1 G2

EC_TX_P80_DATA<35> EC_RX_P80_CLK<35>

EC DEBUG PORT

+3VALW

EC_TX_P80_DATA EC_RX_P80_CLK

JP4

1

2

3

4

ACES_85205-0400

ME@

B B

A A

FOR LPC SIO DEBUG PORT

JP11

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

ACES_85201-2005

ME@

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ0# PCI_RST#

CLK_PCI_DB SERIRQ

5

+5VS

+3VS

CLK_14M_SIO <22> LPC_AD0 <27,35> LPC_AD1 <27,35> LPC_AD2 <27,35> LPC_AD3 <27,35>

LPC_FRAME# <27,35> LPC_DRQ0# <27> PCI_RST# <26,35,36>

CLK_PCI_DB <22>

SERIRQ <28,35>

R458 10K_0402_5%

12

@

Security Classification

2007/10/15 2008/10/15

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

KB /SW /LPC Debug Conn.

JITR1_LA-4141P

37 52Friday, May 02, 2008

of

1

of

0.1

FOR EC 16M SPI ROM

+3VALW

FSEL#SPICS#<35> FRD#SPI_SO<35>

+5VALW

SPI_CS# SPI_SO

R585 300_0402_5%R585 300_0402_5%

+3VALW

1

C566

0.1U_0402_16V4Z

R437 15_0402_5%R437 15_0402_5%

FRD#SPI_SO SPI_SO

JP12

112 334 556 778

E&T_2941-G08N-00E~D

ME@

1 2

2 4 6 8

2

12

R43115_0402_5% R43115_0402_5%

SPI_SI

LED

LED1

1 2

2 1

LED1

HT-191NB_BLUE_0603

20mils

SPI_CS#FSEL#SPICS#

+3VALW

R466

12

15_0402_5%

@

U22

1

CS#

2 3 4

VCC

SO

HOLD#

WP#

SCLK

GND

C573

SPI_CLK

SI

12

R459

R459 15_0402_5%

15_0402_5%

@

1

10P_0402_50V8J

2

PWR_LED# <35>

MX25L1605AM2C-12G_SO8

@

8 7 6 5

1 2

SPI_SI FWR#SPI_SI

1 2

15_0402_5%

SPI_CLK_R

R46515_0402_5% R46515_0402_5%

R467

+3VS

1

C743

0.1U_0402_16V4Z

R603

SPI_CS#_SB

15_0402_5%

@

FD3FD3

1

H5 HOLEAH5HOLEA

1

H26

H26 HOLEA

HOLEA

1

12

FD1FD1

1

H13

H13 HOLEA

HOLEA

1

H10

H10 HOLEA

HOLEA

1

FD6FD6

H1 HOLEAH1HOLEA

1

H20

H20 HOLEA

HOLEA

1

H8 HOLEAH8HOLEA

1

H21

H21 HOLEA

HOLEA

1

FSEL#SPICS#_SB<28>

FD5FD5

H4 HOLEAH4HOLEA

1

H14

H14 HOLEA

HOLEA

1

H6 HOLEAH6HOLEA

1

H24

H24 HOLEA

HOLEA

1

FD2FD2

H2 HOLEAH2HOLEA

1

H9 HOLEAH9HOLEA

1

H23

H23 HOLEA

HOLEA

1

FD4FD4

1

H3 HOLEAH3HOLEA

1

H18

H18 HOLEA

HOLEA

1

H7 HOLEAH7HOLEA

1

H22

H22 HOLEA

HOLEA

1

SPI_CLKSPI_CLK_R

SPI_CLK <35>

FWR#SPI_SI <35>

@

U35

1

CS#

3

WP#

7

HOLD#

4

GND

@

MX25L512AMC-12G_SO8

H19

H16

HOLEA

1

H11

H12

HOLEA

1

H27

H28

HOLEA

1

2

@

R606

8

VCC

SPI_CLK_SB

6

SCLK

SPI_SI_SB

5

SI

SPI_SO_SB

2

SO

1

R606

15_0402_5%

1 2

12

@

R605 15_0402_5%

SPI_CLK_SB <28>

FWR#SPI_SI_SB <28>

FRD#SPI_SO_SB <28>

+5VALW

+5VS

HT-297UD/NB_BLUE/AMB_0603

1 2

R591 300_0402_5%R591 300_0402_5%

1 2

R587 300_0402_5%R587 300_0402_5%

Blue&Amber

HT-297UD/NB_BLUE/AMB_0603

1 2

R586

300_0402_5%

3 4

2 1

LED4

3 4

2 1

LED6

Amber Blue

CHARGE_LED1# <35>

CHARGE_LED0# <35>

BT_LED# <32>

WLAN_WIMAX_LED# <32>

H29

H30

HOLEA

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

LED/EC SPI ROM

JITR1_LA-4141P

of

38 52Monday, May 05, 2008

0.1

A

B

C

D

E

+5VS +3VS

F

G

H

1

1 1

1000P_0402_50V7K

C274

1

2

C462

0.1U_0402_16V4Z

2

1

1U_0603_10V4Z

2

C298

1

10U_0805_10V4Z

2

C461

1

C469

10U_0805_10V4Z

2

1

C316

0.1U_0402_16V4Z

2

@

SATA HDD Conn. SATA ODD Conn.

JP15

JP18

1

SATA_ITX_DRX_P0<27>

2 2

SATA_DTX_C_IRX_N0<27> SATA_DTX_C_IRX_P0<27>

SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0

SATA_ITX_DRX_N0<27>

1 2

C684 0.01U_0402_16V7KC684 0.01U_0402_16V7K

1 2

C685 0.01U_0402_16V7KC685 0.01U_0402_16V7K

SATA_ITX_DRX_P0 SATA_ITX_DRX_N0

SATA_DTX_IRX_N0 SATA_DTX_IRX_P0

+3VS

+5VS

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

V33

9

V33

10

V33

11

GND

12

GND

13

GND

14

V5

15

V5

16

V5

17

GND

18

Reserved

19

GND

20

V12

21

V12

22

V12

ALLTO_C16694-12204-L_RV

ME@

SATA_ITX_DRX_P1<27>

SATA_DTX_C_IRX_N1<27>

SATA_DTX_C_IRX_P1<27>

SATA_DTX_C_IRX_N1 SATA_DTX_C_IRX_P1

SATA_ITX_DRX_N1<27>

1 2

C676 0.01U_0402_16V7KC676 0.01U_0402_16V7K

1 2

C675 0.01U_0402_16V7KC675 0.01U_0402_16V7K

SATA_ITX_DRX_P1 SATA_ITX_DRX_N1

SATA_DTX_IRX_N1 SATA_DTX_IRX_P1

+5VS

JP15

1

GND

2

TX+

3

TX-

4

GND

5

RX-

6

RX+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND

13

GND

TYCO_5-1759952-4

ME@

3 3

SATA_LED#<27>

4 4

A

B

C

D20 RB751V_SOD323D20 RB751V_SOD323

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

DRIVE_LED#SATA_LED#

21

DRIVE_LED# <41>

Compal Secret Data

2007/10/15 2008/10/15

E

Compal Secret Data

Deciphered Date

F

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

HDD & ODD Connector

JITR1_LA-4141P

G

of

39 52Friday, May 02, 2008

H

0.1

A

Express Card Power Switch

+1.5VS

1 1

PLT_RST#<8,16,26,32,33>

+3VALW

CPUSB#<28>

2 2

12

C482 0.1U_0402_16V4ZC482 0.1U_0402_16V4Z

12

C483 0.1U_0402_16V4ZC483 0.1U_0402_16V4Z

C500 0.1U_0402_16V4ZC500 0.1U_0402_16V4Z

SYSON<35,42,48> SUSP#<30,35,42,46,49>

12

R337 100K_0402_5%@R337 100K_0402_5%@

12

CPUSB#

+3VALW

+3VS

PLT_RST# SYSON SUSP#

U16

12

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

18

RCLKEN

R5538_QFN20

1.5Vout

3.3Vout

OC#

PERST#

GND

NC

11 13

3 5

15 19 8 16 7

B

+1.5VS_CARD1

+3VS_CARD1

+3VALW_CARD1

PERST#

40mil

60mils 40mil

+1.5VS_CARD1

C467

10U_0805_10V4Z

+3VS_CARD1

C468

10U_0805_10V4Z

+3VALW_CARD1

C495

10U_0805_10V4Z

@

Imax = 0.75A

1

0.1U_0402_16V4Z

2

Imax = 1.35A

1

0.1U_0402_16V4Z

2

Imax = 0.275A

1

0.1U_0402_16V4Z

2

C489

C488

C499

C

D

E

New Card Socket (Left/TOP)

1

2

1

2

1

2

USB20_N10<28> USB20_P10<28>

ICH_SMBCLK<22,28,32>

ICH_SMBDATA<22,28,32>

+1.5VS_CARD1

ICH_PCIE_WAKE#<28,32,33>

+3VALW_CARD1

+3VS_CARD1

EXP_CLKREQ#<22>

CLK_PCIE_EXP#<22> CLK_PCIE_EXP<22>

PCIE_RXN4<28> PCIE_RXP4<28>

PCIE_TXN4<28> PCIE_TXP4<28>

CPUSB#

PERST#

CPUSB#

JEXP1

1

GND

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND

28

GND

SANTA_130801-5_LT

ME@

(NEW)

+3VALW

3 3

RCIRRX<35>

+5VALW

+5VS

4 4

A

RCIRRX

R583

R583 100_0603_5%

100_0603_5%

@

1 2

R584

1 2

33_0402_5%

C740

22P_0402_50V8J

1 2

R590 100_0603_5%R590 100_0603_5%

1 2

R589 100_0603_5%

@

4.7U_0805_10V4Z

CIR

1

2

IR1

1

Vout

2

1

C741

2

VCC

3

GND

4

GND

IRM-V538/TR1_3P

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

CMOS_OFF#<35>

2007/10/15 2008/10/15

2

Compal Secret Data

CMOS Camera Conn

+5VS

12

R19

R19 10K_0402_5%

10K_0402_5%

1

OUT

IN

GND

3

Deciphered Date

USB20_N2<28> USB20_P2<28>

Q5

Q5 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

CMOS1

C6

S

D

SI2301BDS-T1-E3_SOT23-3

USB20_N2 USB20_P2

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

13

G

Q4

2

R7

R7 0_0603_5%

0_0603_5%

1 2

1

C5

10U_0805_10V4Z

B

2

Compal Electronics, Inc.

NEW CARD & CMOS Connector

C6

0.1U_0402_16V4Z

1

2

JP1

1

2

3

4

5

6

GND1

7

GND2

ACES_88266-05001

JITR1_LA-4141P

E

0.1

of

40 52Friday, May 02, 2008

ON/OFF switch

EC_ON<35,46>

Power Button

@

SW1

SMT1-05_4P

5

6

12 12

+3VALW

12

R243

4.7K_0402_5%

1 2

R244 33K_0402_5%R244 33K_0402_5%

13

D

2

G

Q19

S

2N7002_SOT23-3

3 4

J1 JOPEN@J1 JOPEN@ J2 JOPEN@J2 JOPEN@

Bottom Side

ON/OFFBTN#

EC_ON

1 2

TOP Side

Lid Switch

D5

3

1

2

DAN202UT106_SC70-3

2

+3VALW

1 2

IN

R242

R242 100K_0402_5%

100K_0402_5%

ON/OFF#

51_ON#

1

Q24

Q24 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

OUT

GND

3

C797

470P_0402_50V7K

INT_MICR

ON/OFF# <35>

C411

C411 1000P_0402_50V7K

1000P_0402_50V7K

+3VALW

ON/OFFBTN#

2

470P_0402_50V7K

1

@

C579

C579 47P_0402_50V8J

47P_0402_50V8J

2

GNDA

C798

1

2

1

C799

C799 1000P_0402_50V7K

1000P_0402_50V7K

EMI REQUEST

51_ON# <44>

2

1

12

D6

D6 RLZTE1120A LL34

RLZTE1120A LL34

KSI0 KSI2

EXT_MIC_L<30>

EXT_MIC_R<30>

JACK_PLUG_MIC<30>

ON/OFFBTN#NOVO_BTN#

2

3

1

2

3

1

2

3

1

D11

D11 PSOT24C_SOT23-3

PSOT24C_SOT23-3

@

KSO16KSO17

D15

D15 PSOT24C_SOT23-3

PSOT24C_SOT23-3

@

D7

D7 PSOT24C_SOT23-3

PSOT24C_SOT23-3

@

EXT_MIC_L

1

47P_0402_50V8J

2

GNDA

EXT_MIC_R

1

47P_0402_50V8J

2

GNDA

JACK_PLUG_MIC

BTN FUNCTION

1 2

L25

FBM-11-160808-700T_0603

C503

1 2

L26

FBM-11-160808-700T_0603

C508

UP

DOWN

OK

1

10P_0402_50V8J

2

GNDA

1

@C518

@

10P_0402_50V8J

2

GNDA

EC_SMB_CK2<5,16,35> EC_SMB_DA2<5,16,35>

C494

@

C518

KSO16<35> KSI0<35,37>

KSO17<35>

I2C_INT<35>

INT_MICR<30>

PWR_LED_SC#<35> SCROLL_LED#<35>

NUM_LED#<35> DRIVE_LED#<39> CAPS_LED#<35>

EXT_MIC_L-2

EXT_MIC_R-2

1

C522

@

2

GNDA

10P_0402_50V8J

+3VALW

KSI2<35,37>

R618 0_0402_5%

1 2

R617 0_0402_5%

1 2

+3VS

+5VS

KEY MATRIX

IN OUT

KSO16 KSO17 KSO17

GNDA

Switch Board Conn.

KSO16 KSI2 KSI0 KSO17

R_SMB_CK2

R_SMB_DA2 I2C_INT INT_MICR

NOVO_BTN# ON/OFFBTN#

1 2 1 2 1 2 1 2 1 2

PWR_LED_SC#_CONN SCROLL_LED#_CONN NUM_LED#_CONN DRIVE_LED#_CONN CAPS_LED#_CONN

R599 300_0402_5%R599 300_0402_5% R601 300_0402_5%R601 300_0402_5% R598 300_0402_5%R598 300_0402_5% R600 300_0402_5%R600 300_0402_5% R597 300_0402_5%R597 300_0402_5%

GNDA

KSI2 KSI2 KSI0

Audio Jack

MIC IN

JMIC1

1 2 6 3

4 5

SINGA_2SJ-S351-012

ME@

JP3

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

GND

22

GND

ACES_87151-2005N

ME@

+3VALW

1 2

R432 0_0402_5%R432 0_0402_5%

C561

0.1U_0402_16V4Z

NOVO#<35> 51_ON#<44>

NOVO#

+VCC_LID

1

2

100K_0402_5%

51_ON#

R429 100K_0402_5%R429 100K_0402_5%

1 2

2

A3212ELHLT-T_SOT23W-3

VDD

3

OUTPUT

GND

U19

1

+3VALW

R314

1 2

D9

2 3

DAN202UT106_SC70-3

C564

220P_0402_50V7K

12

C568

12

C547

10P_0402_50V8J

NOVO_BTN#

LID_SW# <35>

HP_R<30> HP_L<30>

JACK_PLUG_HP<30>

SPDIF_OUT<30>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

2

1

R445

@R445

@

1K_0402_5%

Compal Secret Data

GNDA

220P_0402_50V7K

Deciphered Date

12

R452

@R452

@

1K_0402_5%

L28

1 2

FBM-11-160808-700T_0603

L29

1 2

FBM-11-160808-700T_0603

12

C574

+5VS

PR-OUT PL-OUT

1

C7

0.1U_0402_16V4Z

2

Headphone

220P_0402_50V7K

JHP1

6 1

4 7 5 2

3 8

9

10 11

Title

Size Document Number Rev

B

Date: Sheet

DRIVE IC

SINGA_2SJ-B373-G03

ME@

Compal Electronics, Inc.

Audio Jack & SW connector

JITR1_LA-4141P

41 52Wednesday, May 07, 2008

0.1

of

A

B

C

D

E

1 1

1

C575

10U_0805_10V4Z@

2

+VSB

R226

R226 20K_0402_5%

20K_0402_5%

2N7002_SOT23

1

C789

@

2

R633

R633 150K_0402_5%

150K_0402_5%

SUSP

Q34

Q34 2N7002_SOT23

2N7002_SOT23

2 2

3 3

+VSB

4 4

+5VALW TO +5VS

+5VALW

1

C577

10U_0805_10V4Z

2

SUSP

2

G

Q14

G

Q14

+1.5V to +1.5VS

+1.5V

1

C790

2

10U_0805_10V4Z

1.5VS_GATE

13

D

2

G

S

1 2

8 7 6 5

AO4468_SO8

13

D

S

U36

8

D

7

D

6

D

5

D

AO4468_SO8

R673

R673 0_0402_5%

0_0402_5%

@

U23

D D D D

5VS_GATE

1 2

1

S

2

S

3

S

4

G

R670

R670 0_0402_5%

0_0402_5%

@

1

S

2

S

3

S

4

G

1

C793

@

2

0.1U_0603_50V7K

C580

1

C581

0.1U_0603_50V7K

2

+1.5VS

C791

R632

R632 100K_0402_5%

100K_0402_5%

1

C794

2

+5VS

1

C578

2

10U_0805_10V4Z

1

C792

2

10U_0805_10V4Z

@

0.1U_0603_50V7K

1

2

1U_0603_10V4Z

1

2

1U_0603_10V4Z

5VS_GATE

D

S

1 2 13

D

S

R468

R468 470_0603_5%

470_0603_5%

1 2 13

2

G

Q33

Q33 2N7002_SOT23

2N7002_SOT23

R631

R631 470_0603_5%

470_0603_5%

SUSP

2

G

Q36

Q36 2N7002_SOT23

2N7002_SOT23

SUSP

+VSB

1

C539

2

1 2

R450

R450 47K_0402_5%

47K_0402_5%

SUSP

Q32

2N7002_SOT23

+1.8V

R236

R236 470_0603_5%

470_0603_5%

1 2 13

D

S

+VCCP

R68

R68 470_0603_5%

470_0603_5%

1 2 13

D

S

+3VALW TO +3VS

+3VALW

U20

8

S

D

7

S

D

6

S

D

5

1

C559

@

2

10U_0805_10V4Z

13

D

2

G

S

SYSON#

2

G

Q20

Q20 2N7002_SOT23

2N7002_SOT23

SUSP SYSON#

2

G

Q10

Q10 2N7002_SOT23

2N7002_SOT23

G

D

AO4468_SO8

R671

R671 0_0402_5%

0_0402_5%

@

1 2

+1.5V

1 2 13

D

S

+0.75V

1 2 13

D

S

R634

R634 470_0603_5%

470_0603_5%

R165

R165 470_0603_5%

470_0603_5%

1 2 3

C563

4

1

C572

0.1U_0603_50V7K

2

SYSON#

2

G

Q35

Q35 2N7002_SOT23

2N7002_SOT23

2

G

Q12

Q12 2N7002_SOT23

2N7002_SOT23

1

C554

2

10U_0805_10V4Z

R416

R416 47K_0402_5%

47K_0402_5%

1 2

@

1

2

1U_0603_10V4Z

+3VS

D

S

5VS_GATE

SUSP<49>

R418

R418 470_0603_5%

470_0603_5%

1 2 13

2

G

Q30

Q30 2N7002_SOT23

2N7002_SOT23

100K_0402_5%

SUSP

RTCVREF

SUSP

R249

R234

10K_0402_5%

1 2

2

G

12

C365

@

+VSB

+5VALW

1 2

13

D

S

1

C383

2

10U_0805_10V4Z

R220

R220 100K_0402_5%

100K_0402_5%

SUSP

Q15

Q15 2N7002_SOT23

2N7002_SOT23

R238

R238 100K_0402_5%

100K_0402_5%

@

Q22

Q22 2N7002_SOT23

2N7002_SOT23

+1.8V to +1.8VS

+1.8V

U9

D D D

G

D

AO4468_SO8

1.8VS_GATE

R672

R672 0_0402_5%

0_0402_5%

1 2

SYSON<35,40,48>SUSP#<30,35,40,46,49>

1

S

2

S

3

S

4

@

SYSON#<48>

8 7 6 5

1

2

10U_0805_10V4Z

13

2

G

D

S

+1.8VS

C345

R222

R222 100K_0402_5%

100K_0402_5%

1

C386

2

SYSON

R248

100K_0402_5%

1

C360

2

10U_0805_10V4Z

@

0.1U_0603_50V7K

+5VALW

SYSON#

2

G

12

1

2

1U_0603_10V4Z

5VS_GATE

R237

R237 100K_0402_5%

100K_0402_5%

1 2

13

D

Q21

Q21 2N7002_SOT23

2N7002_SOT23

S

1 2 13

D

S

R207

R207 470_0603_5%

470_0603_5%

SUSP

2

G

Q13

Q13 2N7002_SOT23

2N7002_SOT23

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/18 2007/8/18

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

DC Interface

LA-3691P

42 52Monday, May 05, 2008

E

1.0

of

A

B

C

D

E

+5VALW

U13

1

C694 0.1U_0402_16V4ZC694 0.1U_0402_16V4Z

1 1

2 2

3 3

12

USB_ON<35>

C693

4.7U_0805_10V4Z

@

USB_ON<35>

+USB_VCCC

+5VALW

1

2

+USB_VCCC

1

+

C711

150U_D2_6.3VM

2

USB_ON

GND

2

IN

3

IN

4

EN#

G545A1P1U_SO8

U31

1

GND

2

IN

3

IN

4

EN#

G545A1P1U_SO8

1

C716

470P_0402_50V7K

2

+USB_VCCA

OUT OUT OUT OC#

8 7 6 5

+USB_VCCC

8 7 6 5

+USB_VCCC

1

C428

1000P_0402_50V7K@

2

1

C690

0.1U_0402_16V4Z

2

@

+USB_VCCC

1

C697

470P_0402_50V7K

2

USB_OC#0 <28>

USB_OC#4 <28> USB_OC#11 <28>

USB20_N11<28> USB20_P11<28>

LIFT USB CONN. 1

+USB_VCCA

1

+

C691

C691 150U_D2_6.3VM

150U_D2_6.3VM

2

USB20_N0<28>

USB20_P0<28>

W=80mils

1

C688

C688 470P_0402_50V7K

470P_0402_50V7K

2

USB20_N0 USB20_P0

RIGHT USB CONN. 3

+USB_VCCC

W=80mils

1

C726

C726 470P_0402_50V7K

470P_0402_50V7K

2

USB20_N11 USB20_P11

JP19

1

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020173MR004G579ZR

ME@

JP21

1

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020173MR004G579ZR

ME@

Kill Switch

+3VALW

KILL_SW#<35>

R581

KILL_SW#

RIGHT USB CONN. 2

+USB_VCCC

W=80mils

1

C692

C692 470P_0402_50V7K

470P_0402_50V7K

2

USB20_N4<28>

USB20_P4<28>

USB20_N4 USB20_P4

100K_0402_5%

12

SW2

3

2

1

1BS003-1211L_3P

JP20

1

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020173MR004G579ZR

ME@

4 4

Security Classification

2006/08/18 2007/8/18

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/18 2007/8/18

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Power OK, Reset and RTC Circuit, TP

LA-3691P

43 52Monday, May 05, 2008

of

E

of

1.0

A

B

C

D

12

PC50

1000P_0402_50V7K

VIN

PC52

100P_0402_50V8J

PL6

PF1

JDCIN

JDCIN 4602-Q04C-09R 4P P2.5@

4602-Q04C-09R 4P P2.5@

4

3

1 1

3

2

1

PF1

7A_24VDC_429007.WRML@

21

PJ9

2

112

JUMP_43X118@

12

PC53

1000P_0402_50V7K

SMB3025500YA_2P

1 2

12

PC54

100P_0402_50V8J

PC165

PL6

0.01U_0402_50V7K

12

PC164

0.01U_0402_50V7K

DC030006J00

Vin Detector

High 18.135 17.566 17.011 Low 14.866 14.355 14.063

PR85

12

PC113

0.1U_0402_16V7K

PD1

RLS4148_LL34-2

PR65

200_0603_5%

1 2

100K_0402_1%

1 2

PR74

22K_0402_1%

RTCVREF

3.3V

12

PC106

PC106 10U_0805_10V4Z

10U_0805_10V4Z

PR85 10K_0402_1%@

10K_0402_1%@

1 2

PR160

PR160 10K_0402_1%

10K_0402_1%

12

PR75

2 2

VIN

12

PR84

PR86

82.5K_0402_1%

215K_0402_1%

1 2

12

PC59

0.068U_0603_25V7M

3 3

4 4

+CHGRTC

PR113

560_0603_5%

1 2

PR82

24.9K_0402_1%

51_ON#<41>

A

BATT+

CHGRTCP

PR112

560_0603_5%

1 2

PR83

PR83 1M_0402_1%

1M_0402_1%

1 2

VS

8

PU8A

3

P

+

2

-

G

LM393DG_SO8

4

12

PU7

PU7 G920AT24U_SOT89-3

G920AT24U_SOT89-3

3

OUT

PC60

0.01U_0402_25V7K@

1 2

1

O

RTCVREF

TP0610K-T1-E3_SOT23-3

N1

12

PC57

0.22U_0603_25V7K

GND

1

IN

3.3V

2

PQ6

N2

VIN

12

PR88

10K_0805_5%

12

PD5

68_1206_5%

2

12

PR66

PR66 200_0603_5%

200_0603_5%

12

PC47

PC47 1U_0805_25V4Z

1U_0805_25V4Z

RLZ4.3B_LL34

PR67

13

PR87

PR87 10K_0402_5%

10K_0402_5%

1 2

PACIN

12

PR80

10K_0402_1%

VIN

PD2

PD2 RLS4148_LL34-2

RLS4148_LL34-2

1 2 12

12

PC48

0.1U_0603_25V7K

B

12

PR63

PR63 68_1206_5%

68_1206_5%

ACIN <28,35>

PACIN <46>

MAINPWON<45,47>

PRECHG<46>

VS

JRTC

-+

MAXEL_ML1220T10@

SP093MX0000

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VIN

VS

ACON<46>

12

ACIN

Precharge detector

Min. typ. Max. H-->L 13.843V 14.247V 14.636V L-->H 14.936V 15.381V 15.814V

PR69

PR69 1K_1206_5%

1K_1206_5%

1 2

PR70

PR70 1K_1206_5%

ACOFF<35,46>

1K_1206_5%

1 2

PR71

PR71 1K_1206_5%

1K_1206_5%

1 2

PR72

PR72 1K_1206_5%

1K_1206_5%

1 2

12

PD3

PD3 RLS4148_LL34-2

RLS4148_LL34-2

12

PD4

PD4 RLS4148_LL34-2@

RLS4148_LL34-2@

VL

12

PR161

PD15

RB715F_SOT323-3

2 3

PR154

PR154 200K_0402_1%

200K_0402_1%

100K_0402_1%

1

12

PC107

RTCVREF

PU8B

LM393DG_SO8

0.1U_0603_25V7K

7

O

PR153

PR153 10K_0402_5%

10K_0402_5%

RTC Battery

PR114

0_0603_5%

12

Compal Secret Data

Deciphered Date

C

PD6

1 2

RB751V-40TE17_SOD323-2

+RTCBATT

+CHGRTC

2008/06/222007/06/22

2

PR159

2.2M_0402_5%

VS

8

5

P

+

6

-

G

4

12

PR76

100K_0402_5%

13

12

PC109

0.01U_0402_25V7K

12

PC108

1000P_0402_50V7K

12

Size Document Number Rev

Date: Sheet

BATT ONLY

12

PR77

100K_0402_5%

PQ14

PQ14 DTC115EUA_SC70-3

DTC115EUA_SC70-3

2

12

PR156

PRG++

PQ10

PQ10 SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

13

D

S

PR155

66.5K_0402_1%

@

Title

Precharge detector

Min. typ. Max. H-->L 6.138V 6.214V 6.359V L-->H 7.196V 7.349V 7.505V

PQ16

TP0610K-T1-E3_SOT23-3

13

2

12

PR79

100K_0402_5%

13

B+

PQ13

PQ13 DTC115EUA_SC70-3

DTC115EUA_SC70-3

12

PR157

499K_0402_1%

12

PR158

PC111

205K_0402_1%

PR81

PR81 47K_0402_5%

2

G

Compal Electronics, Inc.

DCIN & DETECTOR

47K_0402_5%

13

PQ17

PQ17 DTC115EUA_SC70-3

DTC115EUA_SC70-3

D

2

499K_0402_1%

12

PC111

44 52Friday, May 02, 2008

0.01U_0402_25V7K

PACIN <46>

+5VALWP

of

0.1

A

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 92 degree C Recovery at 56 degree C

12

PC114

0.1U_0603_25V7K

3 2

PR164

12

100K_0402_1%

PR165

PR165 100K_0402_1%

100K_0402_1%

VL

+

-

1 2

8

P

G

4

1 1

PF2

PF2 12A_65V_451012MRL@

12A_65V_451012MRL@

21

PJ7

JBATT1

TYCO_1775768-1@

2 2

GND GND

BATT_S1

1

2

EC_SMCA

3

EC_SMDA

4

TS

5

6

7

8 9

PJ7

2

JUMP_43X118@

100_0402_1%

12

PR146

PR146 10K_0402_1%

10K_0402_1%

112

PR147

1 2

PR149

6.49K_0402_1%

12

PR148

PR148 100_0402_1%

100_0402_1%

VMB

SMB3025500YA_2P

12

PC101

PC101 1000P_0402_50V7K

1000P_0402_50V7K

+3VALWP

PL3

1 2

A/D

BATT+

12

PC26

0.01U_0402_25V7K

EC_SMB_CK1 <35> EC_SMB_DA1 <35>

BATT_TEMPA <35>

100K_0603_1%_TH11-4H104FT

PH2

12

PC116

0.22U_0603_16V7K

VL

12

PR166

13.7K_0402_1%

PR167

15.4K_0402_1%

1 2

12

TM_REF1

PC115

1000P_0402_50V7K

PR163

PR163 47K_0402_1%

47K_0402_1%

1

O

PU9A

PU9A LM393DG_SO8

LM393DG_SO8

12

VL

PR162

PR162 47K_0402_1%

47K_0402_1%

1 2

2

8

5

P

+

7

O

6

-

G

PU9B

LM393DG_SO8

4

13

PQ39

PQ39 DTC115EUA_SC70-3

DTC115EUA_SC70-3

MAINPWON <44,47>

PJ19

2

112

JUMP_43X39@

PQ26

TP0610K-T1-E3_SOT23-3@

B+

3 3

22K_0402_1%@

13

D

2

G

S

PC87

0.1U_0402_16V7K

@

22K_0402_1%@

VL

PR115

100K_0402_1%@

POK<28,47>

4 4

A

1 2

PR116

PR116 0_0402_5%@

0_0402_5%@

1 2

12

PR119

1 2

PQ25

PQ25 SSM3K7002F_SC59-3@

SSM3K7002F_SC59-3@

12

PR120

100K_0402_1%

@

12

PC88

@

0.22U_1206_25V7K

B

13

2

+VSBP

12

PC89

0.1U_0603_25V7K

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VALWP +3VALW

(5A,200mils ,Via NO.= 10)

+5VALWP

(5A,200mils ,Via NO.= 10)

(6.0A,240mils ,Via NO.=12)

+VSBP +VSB

(120mA,40mils ,Via NO.= 2)

(3000mA,120mils ,Via NO.= 6)

(2000mA,80mils ,Via NO.= 4)

Compal Secret Data

PJ14

2

JUMP_43X118@

PJ15

2

JUMP_43X118@

PJ13

2

JUMP_43X118@

PJ6

2

JUMP_43X39@

PJ17

112

JUMP_43X79@

PJ21

112

JUMP_43X79@

Deciphered Date

C

112

+1.8VP +1.8V+5VALW

(8A,320mils ,Via NO.=16)

112

2

+1.5V+1.5VP

+VGA_COREP +VGA_CORE

+VCCP+VCCPP

+VGA_CORE +VCCP+1.1VSP +1.1VS

(3000mA,120mils ,Via NO.= 6)

2008/6/222007/6/22

PJ23

2

112

JUMP_43X118@

PJ12

2

112

JUMP_43X118@

PJ3

2

112

JUMP_43X39@

(2A,80mils ,Via NO.= 4)

PJ10

2

112

JUMP_43X79@

PJ11

2

112

JUMP_43X79@

(15A,600mils ,Via NO.=30)

PJ18

2

112

JUMP_43X79@

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

BATTERY CONN / OTP

+0.75V+0.75VP

of

45 52Friday, May 02, 2008

of

45 52Friday, May 02, 2008

of

D

45 52Friday, May 02, 2008

0.1

A

1 2 3 4

12

PR78

150K_0402_1%

13

D

PQ11

S

SSM3K7002F_SC59-3

P2

1 2 3 4

12

PR73

PC56

200K_0402_1%

0.1U_0603_25V7K

MB39A126

12

PR27

PR27 100K_0402_1%

100K_0402_1%

IREF <35>

1 2

FSTCHG<35>

PQ38

PQ38 FDS4435BZ_SO8

FDS4435BZ_SO8

S

D

S

D

S

D

G

D

A/D

PR126

10K_0402_1%

1 2

12

PC6

PR12

10K_0402_1%

0.01U_0402_25V7K

12

PR22

8 7 6 5

ADP_I<35>

0.22U_0603_16V7K

12

100K_0402_1%

PQ37

PQ37 FDS4435BZ_SO8

FDS4435BZ_SO8

8

S

D

VIN

1 1

12

PR68

47K_0402_5%

2

13

D

PACIN<44>

ACON<44>

ACOFF<35,44>

2

G

S

PQ7

PQ7 SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

2 2

3 3

4 4

7 6 5

2

13

PQ8

PQ8 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR132

PR132 3K_0402_1%

3K_0402_1%

1 2

2

A

S

D

S

D

G

D

PQ9

PQ9 DTA144EUA_SC70-3

DTA144EUA_SC70-3

1 3

2

G

13

PQ15

PQ15 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PC92

4700P_0402_25V7K

PR1

65W: PR1=49.9K 90W: PR1=31.6K

31.6K_0402_1%

PC9

MB39A126

0.22U_0603_16V7K

12

PC16

0.01U_0402_25V7K

+3VALWP

2

7

B

CP mode 65W: 2.8A

P3

90W: 4.0A

12

PR122

10K_0402_5%

1 2

PR123

PC90

1 2

PR14

PR14 1K_0402_1%

1K_0402_1%

1 2

PR123 100K_0402_1%

100K_0402_1%

PC14

PC14 2200P_0402_50V7K

2200P_0402_50V7K

1 2

IREF=0.4~2.88V

12

PR2

47K_0402_5%

13

PQ2

PQ2 DTC115EUA_SC70-3

DTC115EUA_SC70-3

VS

8

P

+

0

-

G

PU3B

4

LM358DR_SO8

B

13

2

5 6

4 3

PR152

0.015_1206_1%

12

PR18

PR18 10K_0402_1%

10K_0402_1%

12

CS

PQ1

PQ1 DTC115EUA_SC70-3

DTC115EUA_SC70-3

1 2

PR33

0_0402_5%

12

C

D

Fosc=14100/Rt=14100/47=300KHz

B+

PJ1

PJ1 JUMP_43X118@

JUMP_43X118@

2

PU1

PU1 MB39A126PFV-ER_SSOP24

MB39A126PFV-ER_SSOP24

1

-INC2

+INC2

2

OUTC2

GND

3

+INE2

CS

4

-INE2

VCC

5

ACOK

OUT

6

VREF

VH

7

ACIN

XACOK

8

-INE1

RT

9

+INE1

-INE3

10

OUTC1

FB123

11

SEL

CTL

12

-INC1

+INC1

112

24

23

22

21

20

PC13

0.1U_0603_25V7K

19

18

PR19

PR19 47K_0402_1%

47K_0402_1%

17

16

MB39A126

15

14

13

1 2

PR28

PR28 33K_0402_1%

33K_0402_1%

PC21

PC21 10P_0402_50V8J

10P_0402_50V8J

12

CS

1 2

12

PC39

PC163

680P_0402_50V7K

PR17

0_0402_5%

1 2

PC1

0.22U_0603_16V7K

1 2

PC8

0.1U_0603_25V7K

PC17

PC17 1500P_0402_50V7K

1500P_0402_50V7K

1 2

12

PC38

PC37

4.7U_1206_25V6K

ACON

PR135

@

0_0402_5%

1 2

PR137

100K_0402_5%

CHG_B+

12

PC36

0.1U_0603_25V7K

0.1U_0603_25V7K 2200P_0402_50V7K

2200P_0402_50V7K

4

3

S1S2S

G

D8D7D6D

5

PQ5

FDS4435BZ_SO8

LXCHRG

ACON <44>

12

PD14

PD13

B340A_SMA2

PD11 RB751V-40TE17_SOD323-2PD11 RB751V-40TE17_SOD323-2

1 2

PD10 RB751V-40TE17_SOD323-2PD10 RB751V-40TE17_SOD323-2

1 2

PD12 RB751V-40TE17_SOD323-2@PD12 RB751V-40TE17_SOD323-2@

1 2

PC22

PC22 47P_0402_50V8J

47P_0402_50V8J

1 2

13

B340A_SMA2

FSTCHG <35>

SUSP# <30,35,40,42,49>

EC_ON <35,41>

LI-3S :13.5V----BATT-OVP=1.5V BATT-OVP=0.1112*BATT+

VMB

VS

12

PR23

PR23 10K_0402_1%

10K_0402_1%

BATT_OVP<35>

12

A/D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/08/04 2006/10/06

8

3

P

+

1

0

2

-

G

PU3A

4

LM358DR_SO8

Compal Secret Data

Deciphered Date

12

PR34

340K_0402_1%

12

PC5

PR29

0.01U_0402_25V7K

0.01U_0402_25V7K 499K_0402_1%

499K_0402_1%

12

PR35

105K_0402_1%

D

PQ32

PQ32 AO4407_SO8

AO4407_SO8

1 2 3 6

PR121

PR121 47K_0402_1%

47K_0402_1%

1 2

PD8

1SS355TE-17_SOD323-2

1 2

PR125

10K_0402_1%

200K_0402_1%

1 2

2

PC91

PL5

1 2

0.01U_0402_25V7K

200K_0402_1%

PQ27

PQ27 DTC115EUA_SC70-3

DTC115EUA_SC70-3

0.1U_0603_25V7K

10U_LF919AS-100M-P3_4.5A_20%

12

PR198

6.8_1206_5%

12

PC159

PC159 470P_0402_50V7K

470P_0402_50V7K

12

PC20

E

PJ8

8 7

5

4

VIN

ACOFF <35,44>

PR124

1 2

PD9

PD9 1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

12

13

D

2

G

PQ28

S

SSM3K7002F_SC59-3

4 3

PR150

0.02_1206_1%

VIN

PACIN <44>

1 2

PJ8 JUMP_43X118@

JUMP_43X118@

2

PQ34

AO4407_SO8@

8 7

5

12

PR138

10K_0402_1%

@

1 3

12

PC103

10U_1206_25V6M

Charger

112

1 2 36

4

1 2

PR139

PR139 100K_0402_1%@

100K_0402_1%@

PQ30

PQ30 DTA144EUA_SC70-3

DTA144EUA_SC70-3

@

2

13

PQ29

PQ29 DTC115EUA_SC70-3@

DTC115EUA_SC70-3@

PC102

10U_1206_25V6M

VMB

2

PRECHG <44>

CC=3.6A (100K/(100K+100K))*2.88V=1.44V

1.44/(20*0.02)=3.6A

Charge voltage 3S CC-CV MODE : 12.6V SEL is L

Adapter 65W CP Point=2.8A 5V*(10K/(49.9K+10K))=0.835V

0.835V/(20*0.015)=2.78A Adapter 90W CP Point=4A 5V*(10K/(31.6K+10K))=1.202V

1.202V/(20*0.015)=4.006A

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

CHARGER

46 52Friday, May 02, 2008

E

of

BATT+

0.1

5

4

3

2

1

ISL6237_B+

12

PL10

12

PC134

2200P_0402_50V7K

12

PC129

PC131

4.7U_1206_25V6K

4.7UH_PCMC063T-4R7MN_5.5A_20%

12

PR197

4.7_1206_5%

12

PC157

PC157 470P_0402_50V7K

470P_0402_50V7K

PR174

61.9K_0402_1%

1 2

PR172

1 2

10K_0402_1%

+5VALWP

1

+

PC135

PC135 220U_6.3V_M

220U_6.3V_M

OS-CON

2

12

PR118

100K_0402_1%

1 2

ISL6237_B+

578

AO4466_SO8

3 6

241

578

PQ41

PQ41 AO4712_SO8

AO4712_SO8

3 6

241

PR117

1 2

200K_0402_5%

PR179

0_0402_5%

0.047U_0402_16V7K

PQ42

PC86

0.22U_0603_25V7K

1 2

VL

PR181

12

PC123

PC126

0.1U_0603_25V7K

1 2

806K_0603_1%

12

0_0805_5%

1 2

PR183

PR183 0_0603_5%

0_0603_5%

PR182

47K_0402_5%@

1 2

PR168

PC119

0.22U_0603_10V7K

@PR180

@

0_0402_5%

0.1U_0603_25V7K

DH3

BST3A

12

LX3

DL3

FB3

VL

2VREF_ISL6237

1 2

PR180

1 2

12

2VREF_ISL6237

PC125

0.047U_0402_16V7K@

PC120

PR178

PR178 0_0402_5%

0_0402_5%

1 2

33 26 24

25

23

30

32

1

8

20

4

14

27

1 2

TP UGATE2 BOOT2

PHASE2

LGATE2

OUT2

REFIN2

REF

LDOREFIN

NC

EN_LDO

EN1

EN2

6

VIN

NC

5

1 2

PC147

1U_0402_6.3V6K

1 2

PC121

3

VCC

TON

2

12

PR169

PR169 0_0402_5%

0_0402_5%

2VREF_ISL6237

VL

12

PC122

1U_0402_6.3V6K

7

19

LDO

PVCC

15

UGATE1

17

BOOT1

16

PHASE1

18

LGATE1

22

PGND

10

OUT1

11

FB1

9

BYP

29

SKIP

28

POK2

13

POK1

12

ILIM1

31

ILIM2

GND

PU10

21

ISL6237IRZ-T_QFN32_5X5

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K 1U_0402_6.3V6K

1U_0402_6.3V6K

1 2

DH5 BST5A

PR184

PR184 0_0603_5%

0_0603_5%

LX5

DL5

FB5

ILM1

ILIM2

PC127

PR175

PR175 0_0402_5%@

0_0402_5%@

1 2

PR177

PR177 0_0402_5%

0_0402_5%

12

1 2

PC124

0.1U_0603_25V7K

12

PR176

PR176 301K_0402_1%

301K_0402_1%

PR170

PR170 301K_0402_1%

301K_0402_1%

578

PQ43

PQ43 AO4466_SO8

AO4466_SO8

3 6

241

578

3 6

241

PQ40

AO4712_SO8

VL

POK <28,45>

12

B+

2

112

PJ16

D D

12

PC149

1000P_0402_50V7K

+3VALWP

1

PC133

220U_6.3V_M

OS-CON

C C

B B

2

12

PC150

+

PJ16 JUMP_43X118@

JUMP_43X118@

470P_0402_50V7K

PR171

0_0402_5%

PR171

0_0402_5%

1 2

PR173

10K_0402_1%

1 2

@

MAINPWON<44,45>

12

PC132

PC130

PC128

4.7U_1206_25V6K

1 2

4.7UH_PCMC063T-4R7MN_5.5A_20%

VS

4.7U_1206_25V6K

4.7U_1206_25V6K 2200P_0402_50V7K

2200P_0402_50V7K

PL11

PR196

4.7_1206_5%

PC156

470P_0402_50V7K

PD16

1 2

RB751V-40TE17_SOD323-2

PD7

RLZ5.1B_LL34

1 2

PD17

1 2

RB751V-40TE17_SOD323-2@

A A

Security Classification

2007/06/22 2008/06/22

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/06/22 2008/06/22

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

+5V/+3V

Friday, May 02, 2008

1

47 52

of

0.1

A

1 1

2

B+

PJ5

PJ5 JUMP_43X118@

JUMP_43X118@

ISL6228_B+

112

B

12

PC78

1U_0402_6.3V6K

PR102

2.2_0603_1%

12

+5VALW +5VALW

PC80

0.1U_0603_25V7K

ISL6228_B+ ISL6228_B+

PR103

PR103 10_0603_1%

10_0603_1%

PC77

PC77 1U_0402_6.3V6K

1U_0402_6.3V6K

1 2

PR101

2.2_0603_1%

12

PC67

0.1U_0603_25V7K

PR97

PR97 10_0603_1%

10_0603_1%

12

C

D

12

PC81

1000P_0402_50V7K

PR105

PR111

1 2

12

1 2

PR109

34.8K_0402_1%

ISL6228_B+

12

PC73

4.7U_1206_25V6K

12

PR194

4.7_1206_5%

12

PC151

PC151 470P_0402_50V7K

470P_0402_50V7K

1.8V_EN

1

PJ4

1

JUMP_43X39@

2

12

1K_0402_1%

13

D

1K_0402_1%

PQ20

S

SSM3K7002F_SC59-3

PR111

3.3K_0402_5%

PC72

4.7U_1206_25V6K

241

12

PR91

12

PR90

3 6

0.1U_0402_16V7K

PC85

1000P_0402_50V7K

1 2

PR107

10.5K_0402_1%

2 2

+1.8VP

1

12

+

2

PC146

10U_0805_6.3V6M

3 3

4 4

SYSON<35,40,42>

SYSON#<42>

PC84

0.022U_0402_25V7K

1 2

PL8

1 2

1.8UH_SIL104R-1R8PF_9.5A_30%

PC118

PC118 220U_6.3V_M

220U_6.3V_M

OS-CON

PR106

PR106 0_0402_5%

0_0402_5%

12

PC64

4.7U_0603_6.3V6K

PR89

0_0402_5%

1 2

0.1U_0402_16V7K@

12

PC61

A

PR110

10.5K_0402_1%

1 2

PC83

0.01U_0402_25V7K@

+1.5V

2

G

16.5K_0402_1%

578

PQ21

PQ21 AO4466_SO8

AO4466_SO8

578

PQ23

PQ23 AO4712_SO8

AO4712_SO8

0.1U_0402_16V7K

PC63

PC82

12

PR105

1 2

1.8V_EN

12

LG_1.8V

12

1000P_0402_50V7K

+5VALW

PR185

PR185 100K_0402_5%@

100K_0402_5%@

LX_1.8V

UG_1.8V

BST_1.8V

12

PR104

PR104 0_0603_5%

0_0603_5%

PU5

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TRL_SO8

+0.75VP

PC62

PC62 10U_0805_6.3V6M

10U_0805_6.3V6M

12

8

FB1

9

VO1

10

OCSET1

11

EN1

12

PHASE1

13

UGATE1

14

BOOT1

6 5

NC

7

NC

8

NC

9

TP

B

PR108

PR108 22K_0402_1%

22K_0402_1%

1 2

7

6

5

VIN1

FSET1

PGOOD1

PU6

ISL6228HRTZ-T_QFN28_4X4

PVCC115LGATE116PGND117PGND218LGATE219PVCC220BOOT2

PC76

1 2

1U_0402_6.3V6K

+3VALW

12

PC65

PC65 1U_0402_6.3V6K

1U_0402_6.3V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

VCC1

1000P_0402_50V7K

3

VCC2

PC70

2

VIN2

+5VALW+5VALW

PC79

1 2

1U_0402_6.3V6K

12

1

GND_T

FSET2

PGOOD2

OCSET2

PHASE2

UGATE2

21

BST_1.5V

1 2

FB2

VO2

EN2

PR95

18.2K_0402_1%

29

28

27

26

25

PR100

0_0402_5%

1 2

24

12

PC71

0.01U_0402_25V7K@

23

UG_1.5V

22

1 2

PC69

PR99

PR99 0_0603_5%

0_0603_5%

PC69

0.1U_0402_16V7K

LG_1.5V

Compal Secret Data

Deciphered Date

C

12

PC148

0.1U_0402_16V7K@

1 2

PR186

PR186 0_0402_5%

0_0402_5%

SYSON <35,40,42>

LX_1.5V

1.5V_PGOOD <8>

12

+1.5V

578

3 6

241

578

3 6

241

2008/06/222007/06/22

22K_0402_1%

ISL6228_B+

PQ22

PQ22 AO4466_SO8

AO4466_SO8

PQ24

PQ24 AO4712_SO8

AO4712_SO8

PR96

12

PC75

12

4.7U_1206_25V6K

PC66

PR92

3.3K_0402_5%

1 2

12

PR195

4.7_1206_5%

PC154

PC154 470P_0402_50V7K

470P_0402_50V7K

3.3K_0402_5%

PC74

4.7U_1206_25V6K

1.8UH_SIL104R-1R8PF_9.5A_30%

Title

Size Document Number Rev

Date: Sheet

PC66

1000P_0402_50V7K

1 2

12

PR93

34.8K_0402_1%

1 2

PR98

10.5K_0402_1%

PC68

0.022U_0402_25V7K

1 2

PR94

10.5K_0402_1%

1 2

PL9

Compal Electronics, Inc.

1.8V / 1.5V.0.75V

D

1

+

PC117

PC117 220U_6.3V_M

220U_6.3V_M

OS-CON

2

+1.5VP

0.1

of

48 52Friday, May 02, 2008

of

48 52Friday, May 02, 2008

of

48 52Friday, May 02, 2008

5

PJ2

PJ2 JUMP_43X118@

JUMP_43X118@

B+

D D

C C

2

12

PC160

330P_0402_50V7K

112

12

PC161

330P_0402_50V7K

SUSP#<30,35,40,42,46>

12

PC162

1800P_0402_50V7K

12

PC58

PC55

10U_1206_25V6M

PR64

0_0402_5%

1 2

12

PC155

10U_1206_25V6M

1000P_0402_50V7K

PR62

PR62 0_0603_5%

0_0603_5%

1 2

6268_1.05V

12

PC46

2.2U_0603_6.3V6K

12

PC44

@

0.1U_0402_16V7K

6268_B+

12

PC51

@

0.1U_0402_16V7K

12

PC45

4

3

4

5

22P_0402_50V8J

PC49

6800P_0402_25V7K

6268_1.05V

PR60

10K_0402_1%

8

GND

VIN

VCC

EN

COMP6FB7FSET

12

PR61

49.9K_0402_1%

12

1

2

PHASE

PGOOD

PR51

37.4K_0402_1%

PHASE_1.05V

16

UG

9

12

PR54

1 2

2.2_0603_5%

BOOT_1.05V

15

BOOT

PVCC

LG

PGND

ISEN

VO

PU4

10

ISL6268CAZ-T_SSOP16

12

PC34

0.01U_0402_25V7K

+5VS

12

14

PC33

2.2U_0603_6.3V6K

13

12

ISEN_1.05V

11

PR52

5.1K_0402_1%

3

UG_1.05V

1 2

PC43 0.1U_0603_25V7K

PR49

PR49 0_0603_5%

0_0603_5%

1 2

PR50

4.7_0603_5%

1 2

LG_1.05V

1 2

6268_1.05V

2

5

PQ19

D8D7D6D

FDS6294_SO8

S1S3G

S

4

2

786

PQ18

5

4

PQ12

FDS8672S_SO8

123

786

5

4

123

PL7

1UH_PCMB103E-1R0MS_20A_20%

1 2

12

PR199

4.7_1206_5%

12

PC166

PC166 330P_0402_50V7K

330P_0402_50V7K

PR57

@

0_0402_5%

1 2

PR58

2.8K_0402_1%

1 2

12

PR59

PR59 3K_0402_1%

3K_0402_1%

PR55

PR55 0_0402_5%

0_0402_5%

PR53

PR53 0_0402_5%@

0_0402_5%@

1

+VGA_CORE

1

+

PC112

PC112 220U_6.3V_M

220U_6.3V_M

2

OS-CON

12

PC145

PC145 10U_0805_6.3V6M

10U_0805_6.3V6M

+VGASENSE

+VCCP

+VGA_COREP

B B

+VGA_CORE

PC141

10U_0805_6.3V6M

PR187

PR187 100K_0402_5%

100K_0402_5%

1 2

SUSP#<30,35,40,42,46>

A A

0.47U_0402_6.3V6K

5

12

PC110

+5VS

12

PC136

PC136 1U_0402_6.3V6K

1U_0402_6.3V6K

6 5 9

8 7

VCNTL VIN VIN

EN POK

1

3

VOUT

4

VOUT

2

FB

GND

PU11

PU11 APL5916-KAC-TRL_SO8

APL5916-KAC-TRL_SO8

4

PR188

1.27K_0402_1%

12

PR189

3.65K_0402_1%

12

PC139

0.01U_0402_25V7K

4.7U_0603_6.3V6K

+VCCPP

12

PC142

PC142 10U_0805_6.3V6M

10U_0805_6.3V6M

SUSP<42>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

PR190

0_0402_5%

1 2

PC144

0.1U_0402_16V7K@

Compal Secret Data

Deciphered Date

+1.8VS

2

PJ20

2

JUMP_43X79@

1

12

PC137

13

D

2

G

12

PQ44

S

SSM3K7002F_SC59-3

PR192

1.91K_0402_1%

PR191

3.16K_0402_1%

2008/6/222007/6/22

2

12

PC138

0.1U_0402_16V7K

12

PU12

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TRL_SO8

+1.1VSP

12

PC143

PC143 22U_0805_6.3V6M

22U_0805_6.3V6M

Title

Size Document Number Rev

Date: Sheet

6 5

NC

7

NC

8

NC

9

TP

Compal Electronics, Inc.

VGA_CORE/VCCP/1.1V

1

+5VS

12

PC140

PC140 1U_0402_6.3V6K

1U_0402_6.3V6K

49 52Friday, May 02, 2008

of

0.1

5

DPRSLPVR<8,28>

PGD_IN

VR_TT#

H_DPRSTP#<6,8,27>

CLK_ENABLE#<28>

VGATE<8,28>

H_PSI#<6>

1 2

PR127

4.22K_0402_1%@

4.22K_0402_1%@ PC4

PC4

0.015U_0402_16V7K@

1 2

PR129

PR129 20_0402_5%

20_0402_5%

PR13

499_0402_1%

1 2

PR5

PR5 13K_0402_1%

13K_0402_1%

PR133

6.81K_0402_1%

6.81K_0402_1% PC95

PC95 1000P_0402_50V7K

1000P_0402_50V7K

1 2

PR134

97.6K_0402_1%

1 2

PC93

PC93 220P_0402_50V7K

220P_0402_50V7K

1 2

PR11

PR11 255_0402_1%

255_0402_1%

VSSSENSE<6>

1 2

PR15

PR15 0_0402_5%

0_0402_5%

@

+3VS

1 2

PR6

PR6 147K_0402_1%

147K_0402_1%

PH3

100K_0603_1%_TH11-4H104FT@

1 2

PC3

0.022U_0402_16V7K

1 2 1 2

PC2

PC2 1000P_0402_50V7K

1000P_0402_50V7K

1 2

PC94

PC94 470P_0402_50V7K

470P_0402_50V7K

1 2

PR4

PR4 1K_0402_1%

1K_0402_1%

1 2

PR128

PR128 0_0402_5%

0_0402_5%

PR131

20_0402_5%

VCC_PRM

12

1 2

D D

C C

B B

VCCSENSE<6>

+CPU_CORE

A A

PR20

PR20 0_0402_5%

0_0402_5% PR16

PR16 0_0402_5%

0_0402_5%

PR193

PR193 10K_0402_5%@

10K_0402_5%@

1 2

12

PR8

1.91K_0402_1%

PR7

PR7 0_0402_5%@

0_0402_5%@

PC7

PC7 1000P_0402_50V7K

1000P_0402_50V7K

PC12

12

0.018U_0603_50V7J

PC11

0.018U_0603_50V7J

12

1 2

PR30

PR30 1K_0402_1%

1K_0402_1%

0.22U_0603_10V7K

1 2

PC10

1U_0402_6.3V6K

1 2 3 4 5 6 7 8

9 10 11 12

PR10

@

0_0402_5%

1 2

PR130

PR130 0_0402_5%

0_0402_5%

PC18

PR9

PR9 0_0402_5%

0_0402_5%

12

48

49

3V3

GND

PGOOD PSI# PMON RBIAS VR_TT# NTC SOFT OCSET VW COMP FB FB2

VDIFF13VSEN14RTN15DROOP16DFB17VO18VSUM19VIN20GND21VDD22ISEN223ISEN1

12

PR3

PR3 1K_0402_1%

1K_0402_1%

PC19

1 2

180P_0402_50V8J

1 2

PR24

4.42K_0402_1%

4

VR_ON

12

PR21 0_0402_5%PR21 0_0402_5%

46

47

44

45

VR_ON

CLK_EN#

DPRSTP#

DPRSLPVR

PU2

PU2 ISL6262ACRZ-T_QFN48_7X7

ISL6262ACRZ-T_QFN48_7X7

12

PC15

0.018U_0603_50V7J

1 2

PC23

0.1U_0402_16V7K

12

PC25

0.22U_0402_6.3V6K

CPU_VID6

12

PR25 0_0402_5%PR25 0_0402_5%

43

12

<35>

CPU_VID4

CPU_VID5

12

PR31 0_0402_5%PR31 0_0402_5%

PR26 0_0402_5%PR26 0_0402_5%

12

PC96

0.1U_0603_25V7K

12

PR38

<6>

CPU_VID3

CPU_VID2

CPU_VID1

CPU_VID0

12

PR37 0_0402_5%PR37 0_0402_5%

PR32 0_0402_5%PR32 0_0402_5%

PR36 0_0402_5%PR36 0_0402_5%

PR39 0_0402_5%PR39 0_0402_5%

VID037VID138VID239VID340VID441VID542VID6

BOOT1

UGATE1

PHASE1

PGND1

LGATE1

PVCC

LGATE2

PGND2

PHASE2

UGATE2

BOOT2

NC

24

1 2

12

PC24

PC24 1U_0402_6.3V6K

1U_0402_6.3V6K

1 2

PR136

PR136 10_0603_1%

10_0603_1%

VSUM

12

PR41

2.61K_0402_1%

PH1

PH1 10KB_0603_5%_ERTJ1VR103J

10KB_0603_5%_ERTJ1VR103J

11K_0402_1%

1 2

<6>

36 35 34 33 32 31 30 29 28 27 26 25

ISEN1 ISEN2

PR141

PR141 1_0603_5%

1_0603_5%

<6>

BOOT_CPU1

UGATE_CPU1 PHASE_CPU1

LGATE_CPU2

PHASE_CPU2 UGATE_CPU2 BOOT_CPU2

PR43

2.2_0603_5%

+5VS

+CPU_B+

2.2_0603_5%

LGATE_CPU1

1 2

+5VS

12

PC99

PC100

0.022U_0402_16V7K

2.2U_0603_6.3V6K

0.22U_0603_10V7K

PR42

1 2

PC29

0.22U_0603_10V7K

3

PC28

1 2

12

PR142

PR142 1_0603_5%

1_0603_5%

2

+CPU_B+

12

PC152

470P_0402_50V7K

PQ4

PQ4 SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

3 5

241 786

786

5

4

786

5

4

5

4

PQ35

FDS8672S_SO8

123

3 5

5

4

PQ33

FDS8672S_SO8

123

PQ36

FDS8672S_SO8

123

PQ3

PQ3 SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

241

786

PQ31

FDS8672S_SO8

123

12

PR151

6.8_1206_5%

12

PC104

PC104 470P_0402_50V7K

470P_0402_50V7K

12

PR145

6.8_1206_5%

12

PC98

PC98 470P_0402_50V7K

470P_0402_50V7K

12

PC35

PC32

10U_1206_25V6M

12

PC31

PC167

10U_1206_25V6M

2200P_0402_50V7K

12

PC153

2200P_0402_50V7K

12

PR48

VSUM

12

PC30

10U_1206_25V6M

12

VSUM

12

3.65K_0402_1%

12

PR46

3.65K_0402_1%

1

+

PC158

2

PC105

220U_25V_M

0.36UH_MPC1040LR36_24A_20%

12

PL4

PR45

PR40

PR40 0_0603_5%@

0_0603_5%@

10K_0402_1%

1 2

ISEN1

PC27

0.22U_0603_10V7K

+CPU_B+

PC169

330P_0402_50V7K

0.36UH_MPC1040LR36_24A_20%

PL2

12

PR143

PR140

10K_0402_1%

0_0603_5%@

1 2

PC97

0.22U_0603_10V7K

ISEN2

PL1

HCB4532KF-800T90_1812

1 2

12

0.01U_0402_25V7K

470P_0402_50V7K

12

PR44

1_0402_5%

VCC_PRM

12

PR144

PR144 1_0402_5%

1_0402_5%

VCC_PRM

PC41

12

+CPU_CORE

1

12

PC40

PC42

680P_0402_50V7K

12

PC168

330P_0402_50V7K

3300P_0402_50V7K

B+

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/6/22 2008/6/22

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

+CPU_CORE

Friday, May 02, 2008

0.1

of

50 52

1

NO DATE PAGE MODIFICATION LIST PURPOSE

-------------------------------------------------------------------------------------------------------------

10/12 Add PR185, PR186

P48 Reserve for debug use.

P49 Because HW reserve enough CAP.10/12 Delete PC110

10/17 P49 Add PU11, PC136, PC141, PC142, PC139, PC110,

10/17 P49 HW request change VGA_CORE from 1.1V to 1.16VChange PR58 from 2.7k_0402_1% to 2.8k_0402_1%

11/02 P49 HW request add VCCIO(1.1V) for VGA use.Add PU12, PR190, PR191, PR192, PC137,

PR187, PR188, PR189

PR59 from 3.24k_0402_1% to 3k_0402_1%.

PC138, PC140, PC143, PC144, PQ44

Because need separate +VCCP and +VGA_CORE

11/12 P47 To solve 3/5VALW reboot after remove AC.Add PD16, PD17

11/21 P49 To reduce VGA_CORE ripple.Add PC145

P49 To change VGA_CORE frequence to 350KHzChange PR51 from 44.4k to 37.4k.11/21

12/03 P48 To reduce 1.8VP ripple.Add PC146

12/03 P47 To reserve for 3/5V IC 2nd source.Add PC147

Change PR105 from 16.9k_0402_1% to

16.5k_0402_1%, PR96 from 16.9k_0402_1% to 22k_0402_1%, PR93 from 25.5k_0402_1% to 34.8k_0402_1%.

Adjust 1.5V to 1.549V, 1.8V to 1.8V to 1.865V12/17 P48

12/17 P48 Reserve for HW adjust power sequence.Add PC148.

12/27 P47, P48,

P49, P50

12/31 P49 For intel request, ES2 NB need adjust VCCP to 1.1V.Change PR58 from 2.8k_0402_1% to 3k_0402_1%

Add PC149, PC150, PC152, PC153, PC155, PC151, PC154, PC156, PC157, PC158, PR194, PR195, PR196, PR197

PR188 from 1.27k_0402_1% to 1.4k_0402_1%.

For EMI request, to decrease power broadband.

P46 Reserve charger sunbber.Add PR198, PC159.02/29

P4602/29 Change PR192 from 1.87k_0402_1% to 1.91k_0402_1%. HW request adjust 1.1V to 1.12V.

02/29 P49 HW adjust power sequence.Change PR64 from 0_0402_5% to 100k_0402_1%,

PC44 to 0.47u.

P44, 46, 4903/11 Add PC160, PC161, PC162, PC163, PC164, PC165. EMI requesst to solve power broadband.

P49 Reserve charger sunbber.Add PR199, PC166.03/12

P44, 46, 4903/11 Add PC160, PC161, PC162, PC163, PC164, PC165. EMI requesst to solve power broadband.

P49 Reserve charger sunbber.Add PR199, PC166.03/12

Add PC167, PC168, PC16904/29 P50 For EMI request, to decrease power broadband.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/06/01 2006/06/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Tuesday, April 29, 2008

Power PIR

LA-4141P

51 51

of

0.1

5

4

3

2

1

NO DATE PAGE MODIFICATION LIST PURPOSE

-------------------------------------------------------------------------------------------------------------

11/12 Change LVDS1 & LVDS2 connect type

11/12 11/14

D D

11/14 11/14 11/14 P17 11/14 P31 MIC P/N CHANGE FROM CY000000S00 TO CYWM64P0110 11/15 P18 Add pull down 10kohm (single LVDS signal) 11/15 P36 Update U32 for card reader power SW (SA000024X00) 11/22 P32 Add D24 , R526 (add WIMAX_LED# of JP22 JP23 42PIN) 11/22 P32 delete C737,C735,708,705,C682,C681,680 (for 3G issue)

12/11 12/11

C C

12/17 P28 GPIO49 add 1k Ohm pulled-down resistor 12/17 P7 REMOVE C41 12/21 P5 U5 CHANGE FROM ADI TO SMSC (SA00001Z700) 12/21 P10 UMA HDMI TMDS CHANGE FROM C306 TO R640 (0OHM) 12/21 P16 ADD External Spread Spectrum (ADD U3,R55,C66,R48;DEL R99,R100) 12/26 P30 ADD R653,R654 TO EXTERNAL MIC 12/27 P43 CHANGE KILL SW POWER FOR +3VS TO +3VALW 12/31 P16 UPDATE VGA_HDMI_SCL,VGA_HDMI_SDA FROM I2CD TO I2CE 2/13 P8 CHANGE R147 FROM 511ohm TO 499ohm 1% 2/13 P23 CHANGE THE D4 LOCATION 2/13 P23 ADD D25,D26 2/13 P25 ADD D27,D28,D29

B B

2/14 P38 CHANGE LED 2/14 P29 CHANGE R558,R582 FROM 10ohm TO 100ohm 2/14 P29 CHANGE C728,C738 FROM 0.1uF TO 0.1uF 2/14 P32 JP22,JP23 PIN37,PIN43 CONNECT TO GROUND 2/14 P23 DELETE LEVEL SHIFT CIRCUIT 2/14 P23 ADD R659 3/3 P10 REMOVE R240,R235 (GHCH_CRT_HSYNC,GHCH_CRT_VSYNC) 3/3 P11 REMOVE R186 (+VCCP_PEG) 3/3 P11 +1.5VS_TVDAC PULL DOWN 3/3 P28 TO USE THE RSMRST CIRCUIT 3/3 P28 ADD C804,C805,C806,C807 (ESD REQUESTION)

A A

3/17 P16 CHANGE R69,R71 FROM 10Kohm TO 2.2Kohm 4/18 P36 change L41,L42 from L to 0ohm

P24 P2311/12 Change HDMI channel

Change MDC connect JP8 , Add JP24P30 P16 Remove R492, R490, R489 & R491 (I2C pull- up resistor) ,Remove R66 ( HDCP) P16 Unstaff R486, R487, R483, R195, R192, R172, R106, R171, C116 & C183 (unused DACB & DACC) P17

Remove R499 (FB commend14)

Unstaff R87, R90 & C90 (FB_VREF)

ADD R636 IN TMDS_B_HPD#P2312/05 P8 DELETE R502,R498,RR160 (DELETE DDR2 FUNCTION)

R186 CHANGE FROM 0603 TO 0805P11 P28 ADD R638 CONNECT "WOL_EN" TO 3VALW12/11

P5 ADD R667,C810 FOR FAN solution RC (R=1Kohm,C=10nF)5/2 P30 ADD R668,C811,R669 FOR MIC solution RC (R=1Kohm,C=10uF) , INT_MIC CONNECT TO U15 PIN235/2 P42 ADD R670,R671,R672 FOR AO4468 VGS ISSUE solution 5/2

5

4

3

Title

<Title>

Size Document Number Rev

B

B

B

of

52 52Friday, May 02, 2008

of

52 52Friday, May 02, 2008

of

Date: Sheet

2

Date: Sheet

52 52Friday, May 02, 2008

1

Compal LA-4141P, IdeaPad Y430 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual