COMPAL LA-4092P Schematics

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1 1

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D

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Compal confidential

JBK00 LA-4092P Schematics Document

Mobile AMD S1G2 CPU with ATI RX781 & SB700 core logic with M82-S

3 3

2008-02-20

REV:0.4

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

LA-4092P

153Thursday, February 21, 2008

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0.4

of

A

B

C

D

E

Compal

Consumer AMD UMA/DISCRETE 17"

confidential

1 1

VRAM 256MB

page 19, 20

Discrete

ATI M82-S

P15,16,17,18,21

Thermal Sensor ADM1032ARMZ

P6

Fan conn

PCI-E Lane*16

AMD S1G2 CPU

638-PIN uFCPGA 638

P4, 5, 6, 7

P4

Hyper Transport Link

16X16

ATI RX781M

LVDS Panel Interface

2 2

CRT

HDMI

P24

P10, 11, 12, 13, 14

P23

A-Link Express II 4X PCI-E

P25

PCI-E BUS*5

ATI SB700

LED

P42

RTL8111C

10/100/1000

Mini-Card*2

WLAN & TV Tunner

P32

P33

Express Card

P33

P26, 27, 28, 29, 30

DDR2 667MHz 1.8V DDR2 800MHz 1.8V

Dual Channel

USB2.0 X12

Azalia SATA Master-1 SATA Master-2 SATA Slave SATA Slave

DDR2-SO-DIMM X2

BANK 0, 1, 2, 3

P8, 9

Finger Print

USB Camera with Digital MIC

USB conn x4

BT Conn

Touch Screen

Dock

Clock Generator SLG8SP626

P39

P43

72QFN

P22

3 3

RTC CKT.

P26

Power OK CKT.

Docking CKT.

P43

RJ45 Conn.

P32

CardReader

JMB380

P34

1394 Conn.

P34 P34

SPI ROM

SPI

P40

Touch Pad CONN.

P42

ENE

KB926

CIR

P37

LPC BUS

P41

Int.KBD

P41

DC/DC Interface CKT.

4 4

ACCELEROMETER.

LIS302DLTR

A

P44

P35

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Audio CKT AMP & Audio Jack

Codec_92HD71B7

MDC V1.5

SATA HDD Connector

SATA ODD Connector

SATA 2nd HDD Option Connector

e-SATA Connector

D

P36

P42

P31

P39

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Subwoofer

P31

Block Diagram

LA-4092P

TPA6020A2

SUBAMP

TPA3007D1

E

P37

P38

0.4

of

253Thursday, February 21, 2008

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B

C

D

E

Voltage Rails

Symbol Note :

+5VS

1 1

State

power plane

+B +3VL

+5VALW +3VALW +1.2VALW +3V_LAN+5VL

+1.8V +0.9V

+3VS +2.5VS +1.8VS +1.5VS +1.1VS +VGA_CORE +1.2V_HT +CPU_CORE_NB +CPU_CORE_0 +CPU_CORE_1

: means Digital Ground

: means Analog Ground

@ : means just reserve , no build DEBUG@ : means just reserve for debug.

Layout Notes

L

S0

2 2

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

O O O O O

X

O MEANS ON X MEANS OFF

I2C / SMBUS ADDRESSING

DEVICE

3 3

DDR SO-DIMM 0 DDR SO-DIMM 1 CLOCK GENERATOR (EXT.)

HEX

A0

D2 3AACCELEROMETER 0 0 1 1 1 0 1 0

EC SM Bus1 address

Device

Smart Battery

24C16

CPU SIC interface

4 4

HEX HEX

Address Address

0001 011X b

16H

1010 000X b

A0H

1001 100X b

98H

O O O O

X

O

XX X

OO OO

X

XX X

ADDRESS

1 0 1 0 0 0 0 0 1 0 1 0 0 1 0 0A4 1 1 0 1 0 0 1 0

EC SM Bus2 address

Device ADI1032-2 CPU ADI1032-1 VGA

9AH 98H

1001 101X b 1001 100X b

SMBUS Control Table

SOURCE

SMB_EC_CK1 SMB_EC_DA1 SMB_EC_CK2 SMB_EC_DA2 I2C_CLK I2C_DATA DDC_CLK0 DDC_DATA0 DDC_CLK1 DDC_DATA1 SCL0 SDA0 SCL1 SDA1 SCL2 SDA2 SCL3 SDA3

KB926

RS780M

SB700

THERMAL SENSORSERIAL

CPU & ADM1032

I / II

V

XXXXXX

V

X X

EEPROMBATTINVERTER

V

XX XX

X

XX XXX

XX

XX XXXX

XXX

XXXX XX

CLK CHIPSODIMM

X X

XXXX

VV

XX

MINI CARD

Slot 2

LCD

XX

X XXXXX XXX

V

XXX

XXXX XX

XXX

V

X X

HDMI

X X X

V

G-Sensor

X X X X X

V

X X X

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Notes List

LA-4092P

353Thursday, February 21, 2008

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of

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B

C

D

E

+1.2V_HT

250 mil

1

C1

H_CADIP[0..15]10

H_CADIP[0..15] H_CADIN[0..15]

H_CADOP[0..15] H_CADON[0..15]

H_CADOP[0..15] 10 H_CADON[0..15] 10H_CADIN[0..15]10

C1

4.7U_0805_10V4Z

2

1

C2

4.7U_0805_10V4Z

2

VLDT CAP.

1

C3

0.22U_0603_16V4Z

2

1

2

C4

0.22U_0603_16V4Z

1

C5

C5 180P_0402_50V8J

180P_0402_50V8J

2

1

C6

C6 180P_0402_50V8J

180P_0402_50V8J

2

Near CPU Socket

+1.2V_HT

2 2

3 3

VLDT=500mA

H_CADIP0 H_CADIN0 H_CADIP1 H_CADIN1 H_CADIP2 H_CADIN2 H_CADIP3 H_CADIN3 H_CADIP4 H_CADIN4 H_CADIP5 H_CADIN5 H_CADIP6 H_CADIN6 H_CADIP7 H_CADIN7 H_CADIP8 H_CADIN8 H_CADIP9 H_CADIN9 H_CADIP10 H_CADIN10 H_CADIP11 H_CADIN11 H_CADIP12 H_CADIN12 H_CADIP13 H_CADIN13 H_CADIP14 H_CADIN14 H_CADIP15 H_CADIN15

H_CLKIP010 H_CLKIN010 H_CLKIP110 H_CLKIN110

H_CTLIP010 H_CTLIP110 H_CTLOP1 10

H_CTLIN110

D1 D2 D3 D4

E3 E2 E1

F1 G3 G2 G1

H1

J1 K1 L3 L2 L1

M1

N3 N2 E5 F5 F3 F4

G5

H5 H3 H4 K3 K4 L5

M5 M3 M4

N5 P5

J3

J2

J5 K5

N1 P1 P3 P4

VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3

L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15

L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1

L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1

6090022100G_B

JP1A

HT LINK

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9

L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1 L0_CTLOUT_H0

L0_CTLOUT_L0 L0_CTLOUT_H1 L0_CTLOUT_L1

+VLDT_B

AE2 AE3 AE4 AE5

AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3

Y1 W1 Y4 Y3

R2 R3 T5 R5

1 2

C7 4.7U_0805_10V4ZC7 4.7U_0805_10V4Z

H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7 H_CADOP8 H_CADON8 H_CADOP9 H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15

H_CLKOP0 10 H_CLKON0 10 H_CLKOP1 10 H_CLKON1 10

H_CTLOP0 10 H_CTLON0 10H_CTLIN010

H_CTLON1 10

PWM Fan Control circuit

CH751H-40PT_SOD323-2

FAN_PWM41

+5VS

JP2

1

C8

D1

2 1

6

2

1

D

Q1

G

3

S

SI3456BDV-T1-E3_TSOP6

4 5

C8

4.7U_0805_10V4Z

2

+VCC_FAN

1

C9

0.1U_0402_16V4Z@C90.1U_0402_16V4Z@

2

12

D2

@D2

@

RLZ5.1B_LL34

1

2

3

GND

4

GND

ACES_88231-02001

CONN@

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

AMD CPU S1G2 HT I/F

LA-4092P

453Thursday, February 21, 2008

E

0.4

of

A

B

C

D

E

Processor DDR2 Memory Interface

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

AD10 AF10

AE10

AA16

D10 C10 B10

H16 T19

V22 U21 V19

T20 U19 U20 V20

J22 J20

N19 N20 E16 F16 Y16

P19 P20

N21 M20 N22 M19 M22 L20 M24 L21 L19 K22 R21 L22 K20 V24 K24 K19

R20 R23

J21

R19 T22 T24

DDR_A_CLK0

DDR_A_CLK#0 DDR_A_CLK1

DDR_A_CLK#1

DDR_B_CLK0

DDR_B_CLK#0 DDR_B_CLK1

DDR_B_CLK#1

VTT1

MEM:CMD/CTRL/CLK

VTT2 VTT3 VTT4

MEMZP MEMZN

RSVD_M1 MA0_ODT0

MA0_ODT1 MA1_ODT0 MA1_ODT1

MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1

MA_CKE0 MA_CKE1

MA_CLK_H0 MA_CLK_L0 MA_CLK_H1 MA_CLK_L1 MA_CLK_H2 MA_CLK_L2 MA_CLK_H3 MA_CLK_L3

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15

MA_BANK0 MA_BANK1 MA_BANK2

MA_RAS_L MA_CAS_L MA_WE_L

JP1B

1

2

1

2

1

2

1

2

VTT5 VTT6 VTT7 VTT8 VTT9

VTT_SENSE

MEMVREF

RSVD_M2

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CKE0 MB_CKE1

MB_CLK_H0

MB_CLK_L0

MB_CLK_H1

MB_CLK_L1

MB_CLK_H2

MB_CLK_L2

MB_CLK_H3

MB_CLK_L3

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_WE_L

C10

1.5P_0402_50V9C

C11

1.5P_0402_50V9C

C14

1.5P_0402_50V9C

C15

1.5P_0402_50V9C

W10 AC10 AB10 AA10 A10

Y10 W17 B18 W26

W23 Y26

V26 W25 U22

J25 H26

P22 R22 A17 A18 AF18 AF17 R26 R25

P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24

R24 U26 J26

U25 U24 U23

+0.9V+0.9V

VTT_SENSE

+MCH_REF

DDR_B_ODT0 DDR_B_ODT1

DDR_CS1_DIMMB#

DDR_CKE0_DIMMB DDR_CKE1_DIMMB

DDR_B_CLK0 DDR_B_CLK#0 DDR_B_CLK1 DDR_B_CLK#1DDR_A_CLK#1

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

DDR_B_BS#0 DDR_B_BS#1 DDR_B_BS#2

DDR_B_RAS# DDR_B_CAS# DDR_B_WE#

T1PAD T1PAD

T3PAD T3PAD

DDR_B_ODT0 9 DDR_B_ODT1 9

DDR_CS1_DIMMB# 9

DDR_CKE0_DIMMB 9 DDR_CKE1_DIMMB 9

DDR_B_CLK0 9 DDR_B_CLK#0 9 DDR_B_CLK1 9 DDR_B_CLK#1 9

DDR_B_BS#0 9 DDR_B_BS#1 9 DDR_B_BS#2 9

DDR_B_RAS# 9 DDR_B_CAS# 9 DDR_B_WE# 9

1 1

2 2

+1.8V

R1

1K_0402_1% R11K_0402_1%

1 2

+MCH_REF

1

R2

1K_0402_1% R21K_0402_1%

1 2

1

C12

C13

2

C13

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1000P_0402_25V8J

1000P_0402_25V8J

Place them close to CPU within 1"

R4 39.2_0402_1%

1 2

+1.8V

DDR_A_ODT08 DDR_A_ODT18

DDR_CS0_DIMMA#8 DDR_CS1_DIMMA#8 DDR_CS0_DIMMB# 9

DDR_CKE0_DIMMA8 DDR_CKE1_DIMMA8

DDR_A_CLK08

DDR_A_CLK#08

DDR_A_CLK18

DDR_A_CLK#18

3 3

DDR_A_MA[15..0]8 DDR_B_MA[15..0] 9

DDR_A_BS#08 DDR_A_BS#18 DDR_A_BS#28

DDR_A_RAS#8 DDR_A_CAS#8 DDR_A_WE#8

1 2

R3 39.2_0402_1%

T2 PADT2 PAD

DDR_A_ODT0 DDR_A_ODT1

DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMB#

DDR_CKE0_DIMMA DDR_CKE1_DIMMA

DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK1

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDR_A_BS#0 DDR_A_BS#1 DDR_A_BS#2

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

DDR_B_D[63..0]9

DDR_B_DM[7..0]9 DDR_A_DM[7..0] 8

DDR_B_DQS09 DDR_B_DQS#09 DDR_B_DQS19 DDR_B_DQS#19 DDR_B_DQS29 DDR_B_DQS#29 DDR_B_DQS39 DDR_B_DQS#39 DDR_B_DQS49 DDR_B_DQS#49 DDR_B_DQS59 DDR_B_DQS#59 DDR_B_DQS69 DDR_B_DQS#69 DDR_B_DQS79 DDR_B_DQS#79

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS7 DDR_B_DQS#7

AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11

AE14 AF14 AF11 AD11

AB26 AE22 AC16 AD12

AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24

Y11

A12 B16 A22 E25

C12 B12 D16 C16 A24 A23 F26 E26

JP1C

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7

6090022100G_B

MEM:DATA

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12

E12 C15 E19 F24 AC24 Y19 AB16 Y13

G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7

DDR_A_D[63..0] 8

DDR_A_DQS0 8 DDR_A_DQS#0 8 DDR_A_DQS1 8 DDR_A_DQS#1 8 DDR_A_DQS2 8 DDR_A_DQS#2 8 DDR_A_DQS3 8 DDR_A_DQS#3 8 DDR_A_DQS4 8 DDR_A_DQS#4 8 DDR_A_DQS5 8 DDR_A_DQS#5 8 DDR_A_DQS6 8 DDR_A_DQS#6 8 DDR_A_DQS7 8 DDR_A_DQS#7 8

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

AMD CPU S1G2 DDRII I/F

LA-4092P

553Thursday, February 21, 2008

E

0.4

of

A

L1

+2.5VS

C16

100U_D2_10VM@

1 1

CLK_CPU_BCLK22

CLK_CPU_BCLK#22

+1.8VS

R15

R15 300_0402_5%

300_0402_5%

1 2

LDT_RST#26

2 2

H_PWRGD26

LDT_STOP#11,26

3 3

LDT_RST#

1

C22

0.01U_0402_25V4Z

@

2

+1.8VS

R21

R21 300_0402_5%

300_0402_5%

1 2

H_PWRGD

1

C23

2

+1.8VS

R36

R36 300_0402_5%

300_0402_5%

1 2

LDT_STOP#

1

C25

0.01U_0402_25V4Z

2

0.1U_0402_16V4Z@

@

SI2: remove 100uF

1 2

C20

1 2

C21 3900P_0402_50V7KC21 3900P_0402_50V7K

Place close to CPU wihtin 1.5"

+CPU_CORE_0

R487 10_0402_5%R487 10_0402_5%

R486 10_0402_5%R486 10_0402_5%

+CPU_CORE_1

R489 10_0402_5%R489 10_0402_5%

R488 10_0402_5%R488 10_0402_5%

+1.8VS

R30

300_0402_5%@

1 2

CPU_LDT_REQ#

1

C24

0.01U_0402_25V4Z

@

2

+3VS

+1.8V

CPU_SID

L1

1 2

FBM_L11_201209_300L_0805

1

+

2

3900P_0402_50V7K

12

R8

R8 169_0402_1%

169_0402_1%

Address:100_1100

CPU_VDD0_FB_H

1 2

CPU_VDD0_FB_L

1 2

Close to CPU

CPU_VDD1_FB_H

1 2

CPU_VDD1_FB_L

1 2

PV:unmount R30 per AMD 4.1 change

R175

20K_0402_5%@

R18

12

2.2K_0402_5%

PV:change to 2.2K

R19

2.2K_0402_5%

CPU_SIC

8 7 6 5

12

SMB_EC_CK2 SMB_EC_DA2

+3VS

1

C26

4 4

2200p change to 1000p for ADT7421

0.1U_0402_16V4Z

C27

1 2

2200P_0402_50V7K

2

THERMDA_CPU THERMDC_CPU

+1.8V

U2

1

VDD

2 3

ADM1032ARMZ-2REEL_MSOP8

SCLK

D+

SDATA

ALERT#

DTHERM#4GND

Address:100_1101

A

B

+2.5VDDA

1

2

+1.2V_HT

CPU_LDT_REQ# 11,26

1 2

C939 0.1U_0402_16V4Z@C939 0.1U_0402_16V4Z@

R814

12

34.8K_0402_1%~N@

G

2

13

D

S

D

S

Q127 FDV301N_NL_SOT23-3@

G

2

13

D

S

D

S

Q129 FDV301N_NL_SOT23-3@

SMB_EC_CK2 21,41

B

VDDA=300mA

3300P_0402_50V7K

1

C174.7U_0805_10V4Z C174.7U_0805_10V4Z

C18

2

CPU_CLKIN_SC_P CPU_CLKIN_SC_N

R13 44.2_0402_1%R13 44.2_0402_1%

1 2

R14 44.2_0402_1%R14 44.2_0402_1%

1 2

CPU_VDD0_FB_H51 CPU_VDD0_FB_L51

CPU_VDD1_FB_H51 CPU_VDD1_FB_L51

+1.8V

R493 510_0402_5%@R493 510_0402_5%@

1 2 1 2

R492 510_0402_5%@R492 510_0402_5%@

12

2.09V for Gate

SMB_EC_DA1 40,41,42,45

EC is PU to 5VALW

SMB_EC_CK1 40,41,42,45

SMB_EC_DA2 21,41

C19

0.22U_0603_16V4Z

LDT_RST# H_PWRGD LDT_STOP# CPU_LDT_REQ#

CPU_SIC CPU_SID

CPU_HTREF0 CPU_HTREF1

CPU_VDD0_FB_H CPU_VDD0_FB_L

CPU_VDD1_FB_H CPU_VDD1_FB_L

CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST#

CPU_TDI CPU_TEST23_TSTUPD CPU_TEST19_PLLTEST0

CPU_TEST18_PLLTEST1 CPU_TEST25_H_BYPASSCLK_H

CPU_TEST25_L_BYPASSCLK_L CPU_TEST21_SCANEN

CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1 CPU_TEST22_SCANSHIFTEN CPU_TEST12_SCANSHIFTENB CPU_TEST27_SINGLECHAIN

R25 0_0402_5%R25 0_0402_5%

1 2

FDV301N, the Vgs is: min = 0.65V Typ = 0.85V Max = 1.5V

C

JP1D

F8

VDDA1

F9

VDDA2

A9

CLKIN_H

A8

CLKIN_L

B7

RESET_L

A7

PWROK

F10

LDTSTOP_L

C6

LDTREQ_L

AF4

SIC

AF5

SID

AE6

ALERT_L

R6

HT_REF0

P6

HT_REF1

F6

VDD0_FB_H

E6

VDD0_FB_L

Y6

VDD1_FB_H

AB6

VDD1_FB_L

G10

DBRDY

AA9

TMS

AC9

TCK

AD9

TRST_L

AF9

TDI

AD7

TEST23

H10

TEST18

G9

TEST19

E9

TEST25_H

E8

TEST25_L

AB8

TEST21

AF7

TEST20

AE7

TEST24

AE8

TEST22

AC8

TEST12

AF8

TEST27

C2

TEST9

AA6

TEST6

A3

RSVD1

A5

RSVD2

B3

RSVD3

B5

RSVD4

C1

RSVD5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

6090022100G_B

C

THERMTRIP_L

PROCHOT_L

VDDIO_FB_H VDDIO_FB_L

VDDNB_FB_H VDDNB_FB_L

M11

KEY1

W18

KEY2

CPU_SVC

A6

SVC

CPU_SVD

A4

SVD

AF6 AC7 AA8

MEMHOT_L

THERMDC_CPU

W7

THERMDC THERMDA

DBREQ_L

TEST28_H

TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST10

TEST29_H

TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

THERMDA_CPU

W8

W9 Y9

VDD_NB_FB_H

H6

VDD_NB_FB_L

G6

CPU_DBREQ#

E10

CPU_TDO

AE9

TDO

CPU_TEST28_H_PLLCHRZ_P

J7

CPU_TEST28_L_PLLCHRZ_N

H8

CPU_TEST17_BP3

D7

CPU_TEST16_BP2

E7

CPU_TEST15_BP1

F7

CPU_TEST14_BP0

C7 C3

TEST7

K8 C4

TEST8

CPU_TEST29_H_FBCLKOUT_P

C9

CPU_TEST29_L_FBCLKOUT_N

C8

H18 H19 AA7 D5 C5

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO

NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.

2007/08/02 2008/08/02

CPU_SVC 51 CPU_SVD 51

CPU_THERMTRIP#_R CPU_PROCHOT#_1.8

R48 300_0402_5%R48 300_0402_5%

12

+1.8V sense no support

T22PAD T22PAD T21PAD T21PAD

VDD_NB_FB_H 51 VDD_NB_FB_L 51

+1.8V

R38220_0402_5%@ R38220_0402_5%@

R40220_0402_5%@ R40220_0402_5%@

R39220_0402_5%@ R39220_0402_5%@

R37220_0402_5%@ R37220_0402_5%@

12

Compal Secret Data

12

Deciphered Date

D

1 2

R10 10K_0402_5%R10 10K_0402_5%

1 2

R5 300_0402_5%R5 300_0402_5%

CPU_THERMTRIP#_R

+1.8V

route as differential

T5PAD T5PAD

as short as possible

T6PAD T6PAD

testpoint under package

T13PAD T13PAD T14PAD T14PAD

+1.8V

T7PAD T7PAD T8PAD T8PAD T10PAD T10PAD T12PAD T12PAD

PV:AMD 4.1 recommend

HDT Connector

R41300_0402_5% R41300_0402_5%

JP3

1 3 5 7 9 11 13 15 17 19 21

SAMTEC_ASP-68200-07

CONN@ SAMTEC_ASP-68200-07

CONN@

D

Close to CPU

CPU_SVC CPU_SVD

CPU_TEST27_SINGLECHAIN

CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1 CPU_TEST22_SCANSHIFTEN CPU_TEST12_SCANSHIFTENB CPU_TEST15_BP1 CPU_TEST14_BP0 CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1 CPU_TEST23_TSTUPD

10 12 14 16 18 20 22 2423 26

3 1

MMBT3904_NL_SOT23-3

1 2

R9 300_0402_5%R9 300_0402_5%

CPU_PROCHOT#_1.8

VDD_NB_FB_H VDD_NB_FB_L

2 4 6 8

R484 10_0402_5%R484 10_0402_5%

1 2 1 2

R485 10_0402_5%R485 10_0402_5%

Title

Size Document Number Rev

Custom

Date: Sheet

B

2

Q3

E

C

R11

1 2

0_0402_5%@

R6

1 2

R7

1 2

0_0402_5%@R60_0402_5%@ 0_0402_5%

0_0402_5%

PV:change PROCHOT# & delete Q2

+CPU_CORE_NB

0718 AMD --> 1K ohm

1 2

R22 1K_0402_5%R22 1K_0402_5%

1 2

R23 1K_0402_5%R23 1K_0402_5%

1 2

R24 300_0402_5%R24 300_0402_5%

1 2

R26 300_0402_5%R26 300_0402_5% R27 300_0402_5%R27 300_0402_5% R28 300_0402_5%R28 300_0402_5% R29 300_0402_5%R29 300_0402_5% R31 300_0402_5%R31 300_0402_5% R32 300_0402_5%R32 300_0402_5% R33 300_0402_5%R33 300_0402_5% R34 300_0402_5%R34 300_0402_5% R35 300_0402_5%R35 300_0402_5% R49 300_0402_5%R49 300_0402_5%

HDT_RST#

12 12 12 12 12 12 12 12 12

+3VS

5

U1

4

Compal Electronics, Inc.

AMD CPU S1G2 CTRL

P

Y

G

3

LA-4092P

2

B

1

A

NC7SZ08P5X_NL_SC70-5@U1NC7SZ08P5X_NL_SC70-5@

E

+1.8V

LDT_RST#

E

ENTRIP2 47 H_THERMTRIP# 27,41

H_PROCHOT# 26

SB_PWRGD 27,41,51

of

653Thursday, February 21, 2008

0.4

A

VDD(+CPU_CORE) decoupling.

+CPU_CORE_0

1

+

C30

1 1

C30 330U_X_2VM_R6M

330U_X_2VM_R6M

2

1

+

C28

C28 330U_X_2VM_R6M

330U_X_2VM_R6M

2

Near CPU Socket

+CPU_CORE_0

1

C32

C32 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+CPU_CORE_0

1

C40

0.22U_0603_16V4Z

2

2 2

1

C33

C33 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C41

0.01U_0402_25V4Z

2

1

C34

C34 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

2

C42

C42 180P_0402_50V8J

180P_0402_50V8J

1

C35

C35 22U_0805_6.3V6M

22U_0805_6.3V6M

2

Under CPU Socket

VDDIO decoupling.

+1.8V

1

C46

C46 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C47

C47 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C48

0.22U_0603_16V4Z

2

Under CPU Socket

1

C49

0.22U_0603_16V4Z

2

B

+CPU_CORE_1

1

C36

C36 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C50

180P_0402_50V8J

2

1

+

C31

C31 330U_X_2VM_R6M

330U_X_2VM_R6M

2

+CPU_CORE_1

1

C51

C51 180P_0402_50V8J

180P_0402_50V8J

2

1

C37

C37 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C43

0.22U_0603_16V4Z

2

C

JP1E

G4 H2

J9 J11 J13 J15

K6 K10 K12 K14

L4 L7

L9 L11 L13 L15

M2 M6 M8

M10

N7 N9

N11

K16

M16

P16 T16 V16

H25

J17 K18 K21 K23 K25 L17

M18 M21 M23 M25 N17

6090022100G_B

Athlon 64 S1 Processor Socket

JP1E

VDD0_1 VDD0_2 VDD0_3 VDD0_4 VDD0_5 VDD0_6 VDD0_7 VDD0_8 VDD0_9 VDD0_10 VDD0_11 VDD0_12 VDD0_13 VDD0_14 VDD0_15 VDD0_16 VDD0_17 VDD0_18 VDD0_19 VDD0_20 VDD0_21 VDD0_22 VDD0_23

VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5

VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12

1

+

C29

C29 330U_X_2VM_R6M

330U_X_2VM_R6M

2

1

C38

C38 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C44

0.01U_0402_25V4Z

2

1

C39

C39 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C45

C45 180P_0402_50V8J

180P_0402_50V8J

2

+CPU_CORE_0

+CPU_CORE_NB

+1.8V

+CPU_CORE_NB decoupling.

+CPU_CORE_NB

1

C52

C52 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C53

C53 22U_0805_6.3V6M

22U_0805_6.3V6M

2

SI2: reserve 22u

1

C54

C54 22U_0805_6.3V6M@

22U_0805_6.3V6M@

2

VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8

VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

D

JP1F

AA4

P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

+CPU_CORE_1

+1.8V

AA11 AA13 AA15 AA17 AA19

AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21

AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23

AB2 AB7 AB9

AD6 AD8

B4 B6 B8

B9 B11 B13 B15 B17 B19 B21 B23 B25

D6 D8

D9 D11 D13 D15 D17 D19 D21 D23 D25

E4

F2 F11 F13 F15 F17 F19 F21 F23 F25

H7

H9 H21 H23

J4

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65

6090022100G_B

Athlon 64 S1 Processor Socket

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

E

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

3 3

4 4

+1.8V

1

C55

0.22U_0603_16V4Z

2

+1.8V +1.8V

1

C60

0.01U_0402_25V4Z

2

+1.8V

1

2

Between CPU Socket and DIMM

1

C57

0.22U_0603_16V4Z

2

180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch>

1

C62

C62 180P_0402_50V8J

180P_0402_50V8J

2

1

C76

4.7U_0805_10V4Z

2

C74

4.7U_0805_10V4Z

1

C56

0.22U_0603_16V4Z

2

1

C61

0.01U_0402_25V4Z

2

1

C75

4.7U_0805_10V4Z

2

1

C58

0.22U_0603_16V4Z

2

1

C63

C63 180P_0402_50V8J

180P_0402_50V8J

2

A: Add C165 and C176 to follow AMD Layout review recommand for EMI

1

C77

4.7U_0805_10V4Z

2

1

C64

C64 180P_0402_50V8J

180P_0402_50V8J

2

1

C: Change to NBO CAP

+

C78

C78 220U_Y_4VM

220U_Y_4VM

@

2

1

C65

C65 180P_0402_50V8J

180P_0402_50V8J

2

VTT decoupling.

+0.9V

1

C66

4.7U_0805_10V4Z

2

+0.9V

1

C79

4.7U_0805_10V4Z

2

1

C67

4.7U_0805_10V4Z

2

1

C68

0.22U_0603_16V4Z

2

Near CPU Socket Right side.

1

C80

4.7U_0805_10V4Z

2

1

C81

0.22U_0603_16V4Z

2

+0.9V

Near Power Supply

1

C: Change to NBO CAP

+

C59

C59 220U_Y_4VM

220U_Y_4VM

2

1

C69

0.22U_0603_16V4Z

2

1

C82

0.22U_0603_16V4Z

2

1

C70

C70 1000P_0402_25V8J

1000P_0402_25V8J

2

1

C83

C83 1000P_0402_25V8J

1000P_0402_25V8J

2

1

C71

C71 1000P_0402_25V8J

1000P_0402_25V8J

2

1

C84

C84 1000P_0402_25V8J

1000P_0402_25V8J

2

1

C72

C72 180P_0402_50V8J

180P_0402_50V8J

2

1

C85

C85 180P_0402_50V8J

180P_0402_50V8J

2

1

C73

C73 180P_0402_50V8J

180P_0402_50V8J

2

1

C86

C86 180P_0402_50V8J

180P_0402_50V8J

2

Near CPU Socket Left side.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

AMD CPU S1G2 PWR & GND

LA-4092P

E

of

753Thursday, February 21, 2008

0.4

A

+V_DDR_MCH_REF

JP4

1

VREF

3

DDR_A_D0 DDR_A_D1

DDR_A_DQS#0

1 1

2 2

3 3

4 4

DDR_CKE0_DIMMA5

DDR_A_BS#25

DDR_A_BS#05 DDR_A_WE#5

DDR_A_CAS#5 DDR_CS1_DIMMA#5

DDR_A_ODT15

SMB_CK_DAT09,22,27,35 SMB_CK_CLK09,22,27,35

+3VS

DDR_A_DQS0 DDR_A_D2

DDR_A_D3 DDR_A_D8

DDR_A_D9 DDR_A_DQS#1

DDR_A_DQS1 DDR_A_D10

DDR_A_D11

DDR_A_D16 DDR_A_D20 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS#2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 DDR_A_MA0

DDR_A_MA10 DDR_A_BS#0 DDR_A_WE#

DDR_A_CAS# DDR_A_ODT0 DDR_CS1_DIMMA#

DDR_A_ODT1 DDR_A_D32

DDR_A_D33 DDR_A_DQS#4

DDR_A_DQS4 DDR_A_D34

DDR_A_D35 DDR_A_D40

DDR_A_D41 DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D48

DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7 DDR_A_D58

DDR_A_D59

1

C103

0.1U_0402_16V4Z

2

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

P-TWO_A5692B-A0G16-P

CONN@

DQ12 DQ13

CK0#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3 DQ30

DQ31

NC/CKE1

NC/A15 NC/A14

RAS#

ODT0

NC/A13

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5 DQ46

DQ47 DQ52

DQ53

CK1#

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7 DQ62

DQ63

DQ4 DQ5

DM0 DQ6

DQ7

DM1

DM2

VDD

DM4

DM6

SAO

VSS

VSS VSS

VSS

VSS VSS

CK0 VSS

VSS

A11

BA1 S0#

VSS

VSS VSS

VSS

VSS CK1

VSS VSS

VSS

VSS SA1

B

+1.8V+1.8V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50

NC

52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92

A7

94

A6

96 98

A4

100

A2

102

A0

104 106 108 110 112 114 116 118 120

NC

122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

DDR_A_D4 DDR_A_D5

DDR_A_DM0 DDR_A_D6

DDR_A_D7 DDR_A_D12

DDR_A_D13 DDR_A_DM1

DDR_A_D14 DDR_A_D15

DDR_A_D21

DDR_A_DM2 DDR_A_D22

DDR_A_D23 DDR_A_D28

DDR_A_D29 DDR_A_DQS#3

DDR_A_DQS3 DDR_A_D30

DDR_A_D31 DDR_CKE1_DIMMA DDR_A_MA15

DDR_A_MA14 DDR_A_MA11

DDR_A_MA7 DDR_A_MA6

DDR_A_MA4 DDR_A_MA2

DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA#

DDR_A_MA13

DDR_A_D36 DDR_A_D37

DDR_A_DM4 DDR_A_D38

DDR_A_D39 DDR_A_D44

DDR_A_D45 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D46

DDR_A_D47 DDR_A_D52

DDR_A_D53

DDR_A_DM6 DDR_A_D54

DDR_A_D55 DDR_A_D60

DDR_A_D61 DDR_A_DQS#7

DDR_A_DQS7 DDR_A_D62

DDR_A_D63

DDR_A_D[0..63]

DDR_A_DM[0..7] DDR_A_DQS[0..7] DDR_A_MA[0..15]

DDR_A_DQS#[0..7]

DDR_A_CLK0 5 DDR_A_CLK#0 5

+V_DDR_MCH_REF

1

C95

2

DDR_CKE1_DIMMA 5

DDR_A_BS#1 5 DDR_A_RAS# 5 DDR_CS0_DIMMA# 5

DDR_A_ODT0 5

DDR_A_CLK1 5 DDR_A_CLK#1 5

C

DDR_A_D[0..63] 5

DDR_A_DM[0..7] 5

DDR_A_DQS[0..7] 5

DDR_A_MA[0..15] 5

DDR_A_DQS#[0..7] 5

+1.8V

R43

R43 1K_0402_1%

1K_0402_1%

1 2

1

C96

2

1 2

0.1U_0402_16V4Z

1000P_0402_25V8J

R44

R44 1K_0402_1%

1K_0402_1%

+V_DDR_MCH_REF 9

D

DDR_A_MA6 DDR_A_MA7 DDR_A_MA11 DDR_A_MA14

DDR_CKE0_DIMMA DDR_A_BS#2 DDR_A_MA15 DDR_CKE1_DIMMA

DDR_A_MA0 DDR_A_BS#1 DDR_A_MA2 DDR_A_MA4

DDR_A_MA5 DDR_A_MA8 DDR_A_MA9 DDR_A_MA12

DDR_A_BS#0 DDR_A_MA1 DDR_A_MA10 DDR_A_MA3

DDR_CS1_DIMMA# DDR_A_ODT1 DDR_A_WE# DDR_A_CAS#

DDR_A_ODT0 DDR_A_MA13 DDR_A_RAS# DDR_CS0_DIMMA#

RP1

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

RP2

47_0804_8P4R_5%

RP3

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

RP4

47_0804_8P4R_5%

RP5

47_0804_8P4R_5%

RP6

47_0804_8P4R_5%

RP7

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

+0.9V

1 2

C87 0.1U_0402_16V4Z

1 2

C88 0.1U_0402_16V4Z

1 2

18

C90 0.1U_0402_16V4Z

27

1 2

36

C89 0.1U_0402_16V4Z

45

1 2

C91 0.1U_0402_16V4Z

1 2

C92 0.1U_0402_16V4Z

1 2

18

C93 0.1U_0402_16V4Z

27

1 2

36

C94 0.1U_0402_16V4Z

45

1 2

18

C98 0.1U_0402_16V4Z

27

1 2

36

C97 0.1U_0402_16V4Z

45

1 2

18

C100 0.1U_0402_16V4Z

27

1 2

36

C99 0.1U_0402_16V4Z

45

1 2

C102 0.1U_0402_16V4Z

1 2

C101 0.1U_0402_16V4Z

E

+1.8V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

DDRII SO-DIMM 0

LA-4092P

853Thursday, February 21, 2008

E

0.4

of

A

B

C

D

E

+1.8V

+V_DDR_MCH_REF8

1

1 1

2 2

3 3

4 4

2

DDR_CKE0_DIMMB5

DDR_B_BS#25

DDR_B_BS#05 DDR_B_WE#5

DDR_B_CAS#5 DDR_CS1_DIMMB#5

DDR_B_ODT15

SMB_CK_DAT08,22,27,35 SMB_CK_CLK08,22,27,35

DDR_B_D0 DDR_B_D1

DDR_B_DQS#0 DDR_B_DQS0

C104

DDR_B_D2 DDR_B_D3

DDR_B_D8

1000P_0402_25V8J

DDR_B_D9 DDR_B_DQS#1

DDR_B_DQS1 DDR_B_D10

DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D22 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE0_DIMMB

DDR_B_BS#2 DDR_B_MA12

DDR_B_MA9

DDR_B_MA5 DDR_B_MA3 DDR_B_MA1

DDR_B_MA10 DDR_B_BS#0 DDR_B_WE#

DDR_B_CAS# DDR_B_ODT0 DDR_CS1_DIMMB#

DDR_B_ODT1 DDR_B_D32

DDR_B_D33 DDR_B_DQS#4

DDR_B_DQS4 DDR_B_D34

DDR_B_D35 DDR_B_D40

DDR_B_D41 DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D47 DDR_B_D48

DDR_B_D49 DDR_B_D53

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51 DDR_B_D55

DDR_B_D56 DDR_B_D57

DDR_B_DM7 DDR_B_D58

DDR_B_D59

+3VS

0.1U_0402_16V4Z

C119

1

2

JP5

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

PTI_A5652D-A0G16-P

CONN@

DQ4 DQ5 VSS DM0 VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

VSS

CK0

CK0#

VSS DQ14 DQ15

VSS

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

NC/CKE1

VDD

NC/A15 NC/A14

VDD

RAS#

VDD ODT0

NC/A13

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

CK1

CK1#

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

SAO

VSS

A11

BA1 S0#

SA1

NC

A7 A6

A4 A2 A0

NC

+1.8V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

DDR_B_D4 DDR_B_D5

DDR_B_DM0 DDR_B_D6

DDR_B_D7 DDR_B_D12

DDR_B_D13 DDR_B_DM1

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2

DDR_B_D23 DDR_B_D28

DDR_B_D29 DDR_B_DQS#3

DDR_B_DQS3 DDR_B_D30

DDR_B_D31 DDR_CKE1_DIMMB DDR_B_MA15

DDR_B_MA14 DDR_B_MA11

DDR_B_MA7 DDR_B_MA6DDR_B_MA8

DDR_B_MA4 DDR_B_MA2 DDR_B_MA0

DDR_B_BS#1 DDR_B_RAS# DDR_CS0_DIMMB#

DDR_B_MA13

DDR_B_D36 DDR_B_D37

DDR_B_DM4 DDR_B_D38

DDR_B_D39 DDR_B_D44

DDR_B_D45 DDR_B_DQS#5

DDR_B_DQS5 DDR_B_D46

DDR_B_D52

DDR_B_DM6 DDR_B_D54

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

+3VS

DDR_B_D[0..63]

DDR_B_DM[0..7] DDR_B_DQS[0..7] DDR_B_MA[0..15]

DDR_B_DQS#[0..7]

DDR_B_CLK0 5 DDR_B_CLK#0 5

DDR_CKE1_DIMMB 5

DDR_B_BS#1 5 DDR_B_RAS# 5 DDR_CS0_DIMMB# 5

DDR_B_ODT0 5

DDR_B_CLK1 5 DDR_B_CLK#1 5

DDR_B_D[0..63] 5

DDR_B_DM[0..7] 5

DDR_B_DQS[0..7] 5

DDR_B_MA[0..15] 5

DDR_B_DQS#[0..7] 5

DDR_B_BS#1 DDR_B_MA2 DDR_B_MA0 DDR_B_MA6

DDR_B_MA4 DDR_B_MA14 DDR_B_MA7 DDR_B_MA11

DDR_B_BS#2 DDR_CKE0_DIMMB DDR_CKE1_DIMMB DDR_B_MA15

DDR_B_MA5 DDR_B_MA8 DDR_B_MA9 DDR_B_MA12

DDR_B_BS#0 DDR_B_MA10 DDR_B_MA3 DDR_B_MA1

DDR_B_ODT1 DDR_CS1_DIMMB# DDR_B_CAS# DDR_B_WE#

DDR_B_MA13 DDR_B_ODT0 DDR_B_RAS# DDR_CS0_DIMMB#

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

RP10

RP11

RP12

RP13

RP8

RP9

RP14

+0.9V

C105 0.1U_0402_16V4Z

1 2

C106 0.1U_0402_16V4Z

C108 0.1U_0402_16V4Z

1 2

C107 0.1U_0402_16V4Z

18

C109 0.1U_0402_16V4Z

27

1 2

36

C110 0.1U_0402_16V4Z

45

18

C111 0.1U_0402_16V4Z

27

1 2

36

C112 0.1U_0402_16V4Z

45

18

C114 0.1U_0402_16V4Z

27

1 2

36

C113 0.1U_0402_16V4Z

45

18

C116 0.1U_0402_16V4Z

27 36

1 2

C115 0.1U_0402_16V4Z

45

C118 0.1U_0402_16V4Z

1 2

C117 0.1U_0402_16V4Z

12

+1.8V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

DDRII SO-DIMM 1

LA-4092P

953Thursday, February 21, 2008

E

0.4

of

A

B

C

D

E

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

SB_TX0P 26 SB_TX0N 26 SB_TX1P 26 SB_TX1N 26 SB_TX2P 26 SB_TX2N 26 SB_TX3P 26 SB_TX3N 26

PCIE_MTX_C_GRX_P[0..15]

PCIE_MTX_C_GRX_N[0..15]

PCIE_ITX_C_PRX_P0 33 PCIE_ITX_C_PRX_N0 33 PCIE_ITX_C_PRX_P1 34 PCIE_ITX_C_PRX_N1 34 PCIE_ITX_C_PRX_P2 33 PCIE_ITX_C_PRX_N2 33 PCIE_ITX_C_PRX_P3 32 PCIE_ITX_C_PRX_N3 32

PCIE_ITX_C_PRX_P5 33 PCIE_ITX_C_PRX_N5 33

PCIE_MTX_C_GRX_P[0..15] 15 PCIE_MTX_C_GRX_N[0..15] 15

PCIE_MTX_C_GRX_P0PCIE_MTX_GRX_P0 PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_N1PCIE_MTX_GRX_N1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P3PCIE_MTX_GRX_N3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N5PCIE_MTX_GRX_N5 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P6PCIE_MTX_GRX_N6 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P7PCIE_MTX_GRX_N7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N8PCIE_MTX_GRX_N8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P10PCIE_MTX_GRX_P10 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N13PCIE_MTX_GRX_N13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N15PCIE_MTX_GRX_N15

New Card Cardreader

WLAN GLAN

TV Tuner

H_CLKOP04 H_CLKON04 H_CLKOP14 H_CLKON14

H_CTLOP04

H_CTLON04 H_CTLON14

R57 301_0402_1%R57 301_0402_1%

1 2

0718 Place within 1" layout 1:2

Polarity inversion

H_CADOP[0..15]4 H_CADON[0..15]4 H_CADIN[0..15] 4

H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7

H_CADOP8 H_CADON8 H_CADOP9

H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15

H_CTLOP0 H_CTLON0 H_CTLOP1 H_CTLON1

H_CADON[0..15]

U3A

Y25

HT_RXCAD0P

Y24

HT_RXCAD0N

V22

HT_RXCAD1P

V23

HT_RXCAD1N

V25

HT_RXCAD2P

V24

HT_RXCAD2N

U24

HT_RXCAD3P

U25

HT_RXCAD3N

T25

HT_RXCAD4P

T24

HT_RXCAD4N

P22

HT_RXCAD5P

P23

HT_RXCAD5N

P25

HT_RXCAD6P

P24

HT_RXCAD6N

N24

HT_RXCAD7P

N25

HT_RXCAD7N

AC24

HT_RXCAD8P

AC25

HT_RXCAD8N

AB25

HT_RXCAD9P

AB24

HT_RXCAD9N

AA24

HT_RXCAD10P

AA25

HT_RXCAD10N

Y22

HT_RXCAD11P

Y23

HT_RXCAD11N

W21

HT_RXCAD12P

W20

HT_RXCAD12N

V21

HT_RXCAD13P

V20

HT_RXCAD13N

U20

HT_RXCAD14P

U21

HT_RXCAD14N

U19

HT_RXCAD15P

U18

HT_RXCAD15N

T22

HT_RXCLK0P

T23

HT_RXCLK0N

AB23

HT_RXCLK1P

AA22

HT_RXCLK1N

M22

HT_RXCTL0P

M23

HT_RXCTL0N

R21

HT_RXCTL1P

R20

HT_RXCTL1N

C23

HT_RXCALP

A24

HT_RXCALN

RS780M_FCBGA528

H_CADIP[0..15]H_CADOP[0..15] H_CADIN[0..15]

PART 1 OF 6

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCLK1P

HT_TXCLK1N

HYPER TRANSPORT CPU I/F

HT_TXCTL0P

HT_TXCTL0N

HT_TXCTL1P

HT_TXCTL1N

HT_TXCALP HT_TXCALN

H_CADIP[0..15] 4

H_CADIP0

D24

H_CADIN0

D25

H_CADIP1

E24

H_CADIN1

E25

H_CADIP2

F24

H_CADIN2

F25

H_CADIP3

F23

H_CADIN3

F22

H_CADIP4

H23

H_CADIN4

H22

H_CADIP5

J25

H_CADIN5

J24

H_CADIP6

K24

H_CADIN6

K25

H_CADIP7

K23

H_CADIN7

K22

H_CADIP8

F21

H_CADIN8

G21

H_CADIP9

G20

H_CADIN9

H21

H_CADIP10

J20

H_CADIN10

J21

H_CADIP11

J18

H_CADIN11

K17

H_CADIP12

L19

H_CADIN12

J19

H_CADIP13

M19

H_CADIN13

L18

H_CADIP14

M21

H_CADIN14

P21

H_CADIP15

P18

H_CADIN15

M18 H24

H25 L21 L20

H_CTLIP0

M24

H_CTLIN0

M25

H_CTLIP1

P19

H_CTLIN1

R18 B24

B25

0718 Place within 1" layout 1:2

H_CLKIP0 4 H_CLKIN0 4 H_CLKIP1 4 H_CLKIN1 4

H_CTLIP0 4

H_CTLIN0 4

H_CTLIP1 4H_CTLOP14

H_CTLIN1 4

R58 301_0402_1%R58 301_0402_1%

1 2

PCIE_GTX_C_MRX_P[0..15]15 PCIE_GTX_C_MRX_N[0..15]15

U3B

PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_N1

1 1

PCIE_PTX_C_IRX_P033 PCIE_PTX_C_IRX_N033

2 2

PCIE_PTX_C_IRX_P134 PCIE_PTX_C_IRX_N134 PCIE_PTX_C_IRX_P233 PCIE_PTX_C_IRX_N233 PCIE_PTX_C_IRX_P332 PCIE_PTX_C_IRX_N332

PCIE_PTX_C_IRX_P533 PCIE_PTX_C_IRX_N533

PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P15 PCIE_GTX_C_MRX_N15

SB_RX0P26 SB_RX0N26 SB_RX1P26 SB_RX1N26 SB_RX2P26 SB_RX2N26 SB_RX3P26 SB_RX3N26

U3B

D4

GFX_RX0P

C4

GFX_RX0N

A3

GFX_RX1P

B3

GFX_RX1N

C2

GFX_RX2P

C1

GFX_RX2N

E5

GFX_RX3P

F5

GFX_RX3N

G5

GFX_RX4P

G6

GFX_RX4N

H5

GFX_RX5P

H6

GFX_RX5N

J6

GFX_RX6P

J5

GFX_RX6N

J7

GFX_RX7P

J8

GFX_RX7N

L5

GFX_RX8P

L6

GFX_RX8N

M8

GFX_RX9P

L8

GFX_RX9N

P7

GFX_RX10P

M7

GFX_RX10N

P5

GFX_RX11P

M5

GFX_RX11N

R8

GFX_RX12P

P8

GFX_RX12N

R6

GFX_RX13P

R5

GFX_RX13N

P4

GFX_RX14P

P3

GFX_RX14N

T4

GFX_RX15P

T3

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

V5

GPP_RX3P

W6

GPP_RX3N

U5

GPP_RX4P

U6

GPP_RX4N

U8

GPP_RX5P

U7

GPP_RX5N

AA8

SB_RX0P

Y8

SB_RX0N

AA7

SB_RX1P

Y7

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

W5

SB_RX3P

Y5

SB_RX3N

RS780M_FCBGA528

PCIE_GTX_C_MRX_P[0..15] PCIE_GTX_C_MRX_N[0..15]

PART 2 OF 6

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN)

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P

GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N

PCIE I/F GFX

GPP_TX0P

GPP_TX0N

GPP_TX1P

GPP_TX1N

GPP_TX2P

GPP_TX2N

GPP_TX3P

GPP_TX3N

GPP_TX4P

GPP_TX4N

GPP_TX5P

GPP_TX5N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

A5

PCIE_MTX_GRX_N0

B5

PCIE_MTX_GRX_P1

A4 B4

PCIE_MTX_GRX_P2

C3

PCIE_MTX_GRX_N2

B2

PCIE_MTX_GRX_P3

D1 D2

PCIE_MTX_GRX_P4

E2

PCIE_MTX_GRX_N4

E1

PCIE_MTX_GRX_P5

F4 F3

PCIE_MTX_GRX_P6

F1 F2

PCIE_MTX_GRX_P7

H4 H3

PCIE_MTX_GRX_P8

H1 H2

PCIE_MTX_GRX_P9

J2

PCIE_MTX_GRX_N9

J1 K4

PCIE_MTX_GRX_N10

K3

PCIE_MTX_GRX_P11

K1

PCIE_MTX_GRX_N11

K2

PCIE_MTX_GRX_P12

M4

PCIE_MTX_GRX_N12

M3

PCIE_MTX_GRX_P13

M1 M2

PCIE_MTX_GRX_P14

N2

PCIE_MTX_GRX_N14

N1

PCIE_MTX_GRX_P15

P1 P2

PCIE_ITX_PRX_P0

AC1

PCIE_ITX_PRX_N0

AC2

PCIE_ITX_PRX_P1

AB4

PCIE_ITX_PRX_N1

AB3

PCIE_ITX_PRX_P2

AA2

PCIE_ITX_PRX_N2

AA1

PCIE_ITX_PRX_P3

Y1

PCIE_ITX_PRX_N3

Y2 Y4 Y3

PCIE_ITX_PRX_P5

V1

PCIE_ITX_PRX_N5

V2

SB_TX0P_C

AD7

SB_TX0N_C

AE7

SB_TX1P_C

AE6

SB_TX1N_C

AD6

SB_TX2P_C

AB6

SB_TX2N_C

AC6

SB_TX3P_C

AD5

SB_TX3N_C

AE5 AC8

AB8

C121 0.1U_0402_16V7KC121 0.1U_0402_16V7K

1 2

C123 0.1U_0402_16V7KC123 0.1U_0402_16V7K

1 2

C125 0.1U_0402_16V7KC125 0.1U_0402_16V7K

1 2

C127 0.1U_0402_16V7KC127 0.1U_0402_16V7K

1 2

C129 0.1U_0402_16V7KC129 0.1U_0402_16V7K

1 2

C131 0.1U_0402_16V7KC131 0.1U_0402_16V7K

1 2

C133 0.1U_0402_16V7KC133 0.1U_0402_16V7K

1 2

C135 0.1U_0402_16V7KC135 0.1U_0402_16V7K

1 2

C137 0.1U_0402_16V7KC137 0.1U_0402_16V7K

1 2

C139 0.1U_0402_16V7KC139 0.1U_0402_16V7K

1 2

C141 0.1U_0402_16V7KC141 0.1U_0402_16V7K

1 2

C143 0.1U_0402_16V7KC143 0.1U_0402_16V7K

1 2

C145 0.1U_0402_16V7KC145 0.1U_0402_16V7K

1 2

C147 0.1U_0402_16V7KC147 0.1U_0402_16V7K

1 2

C149 0.1U_0402_16V7KC149 0.1U_0402_16V7K

1 2

C151 0.1U_0402_16V7KC151 0.1U_0402_16V7K

1 2

C152 0.1U_0402_16V7KC152 0.1U_0402_16V7K

1 2

C153 0.1U_0402_16V7KC153 0.1U_0402_16V7K

1 2

C154 0.1U_0402_16V7KC154 0.1U_0402_16V7K

1 2

C155 0.1U_0402_16V7KC155 0.1U_0402_16V7K

1 2

C156 0.1U_0402_16V7KC156 0.1U_0402_16V7K

1 2

C157 0.1U_0402_16V7KC157 0.1U_0402_16V7K

1 2

C158 0.1U_0402_16V7KC158 0.1U_0402_16V7K

1 2

C159 0.1U_0402_16V7KC159 0.1U_0402_16V7K

1 2

C160 0.1U_0402_16V7KC160 0.1U_0402_16V7K

1 2

C161 0.1U_0402_16V7KC161 0.1U_0402_16V7K

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

1 2

C162 0.1U_0402_16V7KC162 0.1U_0402_16V7K C163 0.1U_0402_16V7KC163 0.1U_0402_16V7K C164 0.1U_0402_16V7KC164 0.1U_0402_16V7K C165 0.1U_0402_16V7KC165 0.1U_0402_16V7K C166 0.1U_0402_16V7KC166 0.1U_0402_16V7K C168 0.1U_0402_16V7KC168 0.1U_0402_16V7K C169 0.1U_0402_16V7KC169 0.1U_0402_16V7K C167 0.1U_0402_16V7KC167 0.1U_0402_16V7K

R55 1.27K_0402_1%R55 1.27K_0402_1%

1 2

R56 2K_0402_1%R56 2K_0402_1%

1 2

C120 0.1U_0402_16V7KC120 0.1U_0402_16V7K C122 0.1U_0402_16V7KC122 0.1U_0402_16V7K C124 0.1U_0402_16V7KC124 0.1U_0402_16V7K C126 0.1U_0402_16V7KC126 0.1U_0402_16V7K C128 0.1U_0402_16V7KC128 0.1U_0402_16V7K C130 0.1U_0402_16V7KC130 0.1U_0402_16V7K C132 0.1U_0402_16V7KC132 0.1U_0402_16V7K C134 0.1U_0402_16V7KC134 0.1U_0402_16V7K C136 0.1U_0402_16V7KC136 0.1U_0402_16V7K C138 0.1U_0402_16V7KC138 0.1U_0402_16V7K C140 0.1U_0402_16V7KC140 0.1U_0402_16V7K C142 0.1U_0402_16V7KC142 0.1U_0402_16V7K C144 0.1U_0402_16V7KC144 0.1U_0402_16V7K C146 0.1U_0402_16V7KC146 0.1U_0402_16V7K C148 0.1U_0402_16V7KC148 0.1U_0402_16V7K C150 0.1U_0402_16V7KC150 0.1U_0402_16V7K

+1.1VS

RS780M Display Port Support (muxed on GFX)

DP0

3 3

4 4

DP1

GFX_TX0,TX1,TX2 and TX3 AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7 AUX1 and HPD1

NEED CHECK R68 & R69 WITH AMD

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

RS780-HT/PCIE

LA-4092P

10 53Thursday, February 21, 2008

E

0.4

of

A

1 1

B

C

D

E

PV: follow check list connect to GND

U3C

RX781GND

12

R250 0_0402_5%R250 0_0402_5%

RX781GND RX781GND

12

R249 0_0402_5%R249 0_0402_5%

PV: follow check list connect to GND

+1.8VS

BLM18PG121SN1D_0603

2.2U_0603_6.3V4Z

2 2

+1.8VS

BLM18PG121SN1D_0603

2.2U_0603_6.3V4Z

+1.8VS

1 2

R371 300_0402_5%R371 300_0402_5%

2.2U_0603_6.3V4Z

NB_PWRGD

For SB700 A12 use

3 3

L10

1 2

L11

1 2

+1.1VS

4.7K_0402_5%

+VDDA18HTPLL

1

C179

2

+VDDA18PCIEPLL

1

C180

2

1 2

R71

1 2

R72

4.7K_0402_5%

UMA_HSYNC14 UMA_VSYNC14

RX781GND

+VDDA18HTPLL

R67 0_0402_5%R67 0_0402_5%

PLT_RST#14,15,26,32,33,34,40,41

NB_OSC_14.318M22

1 2

CLK_SBLINK_BCLK22 CLK_SBLINK_BCLK#22

+VDDA18PCIEPLL

NB_PWRGD27

LDT_STOP#6,26

CPU_LDT_REQ#6,26

CLK_NBHT22 CLK_NBHT#22

NBGFX_CLK22 NBGFX_CLK#22

+3VS

R251 0_0402_5%R251 0_0402_5%

NB_RESET#

NB_PWRGD

R88 10K_0402_5%R88 10K_0402_5%

12

AUX_CAL14

Strap pin

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

F8

DAC_SCL(PCE_RCALRN)

E8

DAC_SDA(PCE_TCALRN)

G14

DAC_RSET(PWM_GPIO1)

A12

12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN(OSCIN)

F11

REFCLK_N(PWM_GPIO3)

T2

GFX_REFCLKP

T1

GFX_REFCLKN

U1

GPP_REFCLKP

U2

GPP_REFCLKN

V4

GPPSB_REFCLKP(SB_REFCLKP)

V3

GPPSB_REFCLKN(SB_REFCLKN)

B9

I2C_CLK

A9

I2C_DATA

B8

DDC_DATA0/AUX0N(NC)

A8

DDC_CLK0/AUX0P(NC)

B7

DDC_CLK1/AUX1P(NC)

A7

DDC_DATA1/AUX1N(NC)

B10

STRP_DATA

G11

RSVD

C8

AUX_CAL(NC)

RS780M_FCBGA528

PART 3 OF 6

TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

TXCLK_UP(PCIE_RESET_GPIO4)

TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

PM

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

CLOCKs PLL PWR

MIS.

SUS_STAT#(PWM_GPIO5)

TXOUT_L0P(NC)

TXOUT_L0N(NC)

TXOUT_L1P(NC)

TXOUT_L1N(NC)

TXOUT_L2P(NC)

TXOUT_L2N(DBG_GPIO0)

TXOUT_L3P(NC)

TXOUT_L3N(DBG_GPIO2)

TXOUT_U0P(NC) TXOUT_U0N(NC)

TXOUT_U2P(NC) TXOUT_U2N(NC)

TXOUT_U3N(NC)

TXCLK_LP(DBG_GPIO1)

TXCLK_LN(DBG_GPIO3)

VDDLTP18(NC) VSSLTP18(NC)

VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)

VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)

TMDS_HPD(NC)

THERMALDIODE_P THERMALDIODE_N

HPD(NC)

TESTMODE

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

PV: follow check list connect to GND

RX781GND

A13 B13

RX781GND

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

D9 D10

D12 AE8

AD8 D13

1 2

R77 0_0402_5%R77 0_0402_5%

1 2

R80

1.8K_0402_5%

SUS_STAT# 27 SUS_STAT_R# 14

Strap pin

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

RS780 VEDIO/CLK GEN

LA-4092P

11 53Thursday, February 21, 2008

E

0.4

of

2

U3D

PAR 4 OF 6

MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)

MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)

MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)

MEM_CKP(NC) MEM_CKN(NC)

MEM_COMPP(NC) MEM_COMPN(NC)

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)

MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)

MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC)

MEM_DQS1P(NC)

MEM_DQS1N(NC)

MEM_DM0(NC)

MEM_DM1/DVO_D8(NC)

SBD_MEM/DVO_I/F

IOPLLVDD18(NC)

IOPLLVDD(NC) IOPLLVSS(NC)

MEM_VREF(NC)

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

AE23 AE24

AD23 AE18

+1.8VS +1.1VS

AB12 AE16

V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

Y14 AD16

AE17 AD17

B B

W12

Y12 AD18 AB13 AB18

V14

V15

W14

AE12 AD12

RS780M_FCBGA528

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Custom Date: Sheet

Date: Sheet

1

Date: Sheet

Compal Electronics, Inc.

RS780 SIDE PORT

LA-4092P

12 53Thursday, February 21, 2008

0.4

of

A

1 1

+1.1VS

PV:Change C215 from 4.7u to 10u

+1.2V_HT

+1.35VS

FBMA-L11-201209-221LMA30T_0805@

2 2

+1.8VS

3 3

L16

0_0805_5%

L18

0_0805_5%

L19

0_0805_5%

L43

L22

0_0805_5%

4.7U_0805_10V4Z

12

C209

4.7U_0805_10V4Z

12

2A

C215

10U_0805_10V4Z

12

C225

4.7U_0805_10V4Z

2A

12

1

C235

C246

2

4.7U_0805_10V4Z

2A

1

C206

2

0.1U_0402_16V4Z

1

C214

C216

2

0.1U_0402_16V4Z

2A

1

C226

2

0.1U_0402_16V4Z

1

C236

2

0.1U_0402_16V4Z

1

C207

2

0.1U_0402_16V4Z

1

C217

2

0.1U_0402_16V4Z

1

C227

2

0.1U_0402_16V4Z

1

C237

2

0.1U_0402_16V4Z

1U_0402_6.3V4Z

C208

C228

C238

1

C218

2

+1.8VS

1

C210

2

0.1U_0402_16V4Z

+VDDHTRX

1

2

0.1U_0402_16V4Z

1

C229

2

0.1U_0402_16V4Z

1

C239

2

0.1U_0402_16V4Z

1

C251

2

+VDDHT

1

2

+VDDHTTX

1

2

+VDDA18PCIE

1

2

B

U3E

J17

12

K16 L16

M16

P16

R16

T16

H18 G19

F20 E21

D22

B23 A23

AE25 AD24 AC23 AB22 AA21

Y20

W19

V18

U17

T17

R17

P17

M17

J10 P10 K10

M10

L10 W9

H9

T10

R10

Y9 AA9 AB9 AD9 AE9 U10

F9

G9 AE11 AD11

R252

R252 0_0402_5%

0_0402_5%

VDDHT_1

PART 5/6

VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7

VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7

VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13

VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15

VDD18_1 VDD18_2 VDD18_MEM1(NC) VDD18_MEM2(NC)

RS780M_FCBGA528

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12

POWER

VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)

VDD33_1(NC) VDD33_2(NC)

VDDA_12=2.5A

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

C

L17

1 2

FBMA-L11-201209-221LMA30T_0805

+VDDA11PCIE

FBMA-L11-201209-221LMA30T_0805

10U_0805_10V4Z

1 2 1 2 1 2 1 2

12 12

PJP3

1 2

PAD-OPEN 4x4m

10U_0805_10V4Z 10U_0805_10V4Z

10U_0805_10V4Z

C211

C211 C212

C212

C220 1U_0402_6.3V4ZC220 1U_0402_6.3V4Z C219 1U_0402_6.3V4ZC219 1U_0402_6.3V4Z C222 1U_0402_6.3V4ZC222 1U_0402_6.3V4Z C221 1U_0402_6.3V4ZC221 1U_0402_6.3V4Z C224 0.1U_0402_16V4ZC224 0.1U_0402_16V4Z C223 0.1U_0402_16V4ZC223 0.1U_0402_16V4Z

+1.1VS +NB_VDDC

VDD_CORE=10A

1

C2300.1U_0402_16V4Z C2300.1U_0402_16V4Z

C2410.1U_0402_16V4Z C2410.1U_0402_16V4Z

C2420.1U_0402_16V4Z C2420.1U_0402_16V4Z

C2430.1U_0402_16V4Z C2430.1U_0402_16V4Z

C2310.1U_0402_16V4Z C2310.1U_0402_16V4Z

2

1

C2440.1U_0402_16V4Z C2440.1U_0402_16V4Z

C23310U_0805_10V4Z C23310U_0805_10V4Z

C2320.1U_0402_16V4Z C2320.1U_0402_16V4Z

2

+3VS

1

C2400.1U_0402_16V4Z C2400.1U_0402_16V4Z

C2470.1U_0402_16V4Z C2470.1U_0402_16V4Z

2

D

U3F

A25

VSSAHT1

D23

VSSAHT2

E22

VSSAHT3

G22

VSSAHT4

G24

VSSAHT5

G25

VSSAHT6

H19

VSSAHT7

J22

VSSAHT8

L17

VSSAHT9

L22

VSSAHT10

L24

VSSAHT11

+1.1VS

330U_D2E_2.5VM

1

C234

1

C24510U_0805_10V4Z C24510U_0805_10V4Z

+

2

L25

VSSAHT12

M20

VSSAHT13

N22

VSSAHT14

P20

VSSAHT15

R19

VSSAHT16

R22

VSSAHT17

R24

VSSAHT18

R25

VSSAHT19

H20

VSSAHT20

U22

VSSAHT21

V19

VSSAHT22

W22

VSSAHT23

W24

VSSAHT24

W25

VSSAHT25

Y21

VSSAHT26

AD25

VSSAHT27

L12

VSS11

M14

VSS12

N13

VSS13

P12

VSS14

P15

VSS15

R11

VSS16

R14

VSS17

T12

VSS18

U14

VSS19

U11

VSS20

U15

VSS21

V12

VSS22

W11

VSS23

W15

VSS24

AC12

VSS25

AA14

VSS26

Y18

VSS27

AB11

VSS28

AB15

VSS29

AB17

VSS30

AB19

VSS31

AE20

VSS32

AB21

VSS33

K11

VSS34

RS780M_FCBGA528

PART 6/6

GROUND

VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8

VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30 VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VSS10

A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2

AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15

E

PV: follow check list connect to GND

+1.8VS

U67

VIN1VCNTL

1

C903

C903 10U_0805_10V4Z@

10U_0805_10V4Z@

2

Q56

2N7002_SOT23-3@

4 4

VLDT_EN#44

R601 0_0402_5%@R601 0_0402_5%@

1 2

A

2N7002_SOT23-3@

2

G

2

C703

0.1U_0402_16V7K@

1

12

R599

R599 1K_0402_1%

1K_0402_1%

+VREF1.35V

@

12

R600

3K_0402_5%@

13

D

S

3K_0402_5%@

2

GND

3

VREF

4

VOUT

G2992F1U_SO8@

2

1

C702

C905

1

2

10U_0805_10V4Z@

0.1U_0402_16V7K@

B

+1.35VS

6 5

NC

7

NC

8

NC

9

TP

+3VS

1

C489

1U_0603_10V6K@

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

RS780 PWR/GND

LA-4092P

13 53Thursday, February 21, 2008

E

0.4

of

A

B

C

D

E

RS780 DFT_GPIO5 mux at CRT_VSYNC pull high to 3K

SI2: Change to 3K pull high

1 1

UMA_VSYNC11

12

R101 3K_0402_5%R101 3K_0402_5%

12

R102 3K_0402_5%@R102 3K_0402_5%@

+3VS

DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb

Enables the Test Debug Bus using GPIO. 1 : Enable (RX780, RS780) 0 : Disable (RX780, RS780) PIN: RS740-->RS780_AUX_CAL; RX780-->NB_TV_C; RS780--> VSYNC#

DFT_GPIO[4:2]: STRAP_PCIE_GPP_CFG[2:0]

These pin straps are used to configure PCI-E GPP mode. 000 : 00001 001 : 00010

RS780 use register to control PCI-E configure

2 2

010 : 01011 011 : 00100 100 : 01010 101 : 01100 111 : 01011

DFT_GPIO1: LOAD_EEPROM_STRAPS

Selects Loading of STRAPS from EPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected RS740/RX780: DFT_GPIO1 RS780:SUS_STAT

RS780 DFT_GPIO1

AUX_CAL11

SUS_STAT_R#11 PLT_RST# 11,15,26,32,33,34,40,41

1 2

R104 150_0402_1%@R104 150_0402_1%@ D4 CH751H-40PT_SOD323-2@D4 CH751H-40PT_SOD323-2@

2 1

RX780 DFT_GPIO1 mux at GREEN(Ball E18) and change pull low form 150 to 3K.

3 3

4 4

A

RS780 use HSYNC to enable SIDE PORT (internal pull high)

UMA_HSYNC11

B

12

R107 3K_0402_5%@R107 3K_0402_5%@

12

R125 3K_0402_5%R125 3K_0402_5%

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb

RX780: Enables the Test Debug Bus using PCIE bus 1 : Disable ( Can still be enabled using nbcfg register access ) 0 : Enable

RS780: Enables Side port memory ( RS780 use HSYNC#)

1. Disable (RS780) 0 : Enable (RS780)

Compal Secret Data

2007/08/02 2008/08/02

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

RS780 STRAPS

LA-4092P

14 53Thursday, February 21, 2008

E

0.4

of

5

4

3

2

1

PCIE_GTX_C_MRX_P[0..15]10 PCIE_GTX_C_MRX_N[0..15]10 PCIE_MTX_C_GRX_P[0..15]10 PCIE_MTX_C_GRX_N[0..15]10

D D

PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N15

PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_N14

PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N13

PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_N12

PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N11

PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_N10

PCIE_MTX_C_GRX_P9

C C

B B

CLK_PCIE_VGA22 CLK_PCIE_VGA#22

PCIE_MTX_C_GRX_N9

PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N8

PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_N7

PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_N6

PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N5

PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N4

PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_N0 PEG_M_RXN0

PLT_RST#11,14,26,32,33,34,40,41

U5A

AC30

PCIE_RX0P

AC31

PCIE_RX0N

AC29

PCIE_RX1P

AB29

PCIE_RX1N

AB31

PCIE_RX2P

AB30

PCIE_RX2N

AA31

PCIE_RX3P

AA30

PCIE_RX3N

W30

PCIE_RX4P

W31

PCIE_RX4N

W29

PCIE_RX5P

V29

PCIE_RX5N

V31

PCIE_RX6P

V30

PCIE_RX6N

U31

PCIE_RX7P

U30

PCIE_RX7N

P30

PCIE_RX8P

P31

PCIE_RX8N

P29

PCIE_RX9P

N29

PCIE_RX9N

N31

PCIE_RX10P

N30

PCIE_RX10N

M31

PCIE_RX11P

M30

PCIE_RX11N

K30

PCIE_RX12P

K31

PCIE_RX12N

K29

PCIE_RX13P

J29

PCIE_RX13N

J31

PCIE_RX14P

J30

PCIE_RX14N

H31

PCIE_RX15P

H30

PCIE_RX15N

Clock

AD29

PCIE_REFCLKP

AD30

PCIE_REFCLKN

SM BUS

AC28

NC_SMBCLK

AC27

NC_SMBDATA

AG25

PERSTB

216-0707001-00/M82-S_BGA632

PCIE_GTX_C_MRX_P[0..15] PCIE_GTX_C_MRX_N[0..15] PCIE_MTX_C_GRX_P[0..15] PCIE_MTX_C_GRX_N[0..15]

PART 1 OF 6

P

P C

C I

I

-

E

E X

X P

P R

R E

E S

S S

S

I

I N

N T

T E

E R

R F

F A

A C

C E

E

PCIE_TX0P PCIE_TX0N

PCIE_TX1P PCIE_TX1N

PCIE_TX2P PCIE_TX2N

PCIE_TX3P PCIE_TX3N

PCIE_TX4P PCIE_TX4N

PCIE_TX5P PCIE_TX5N

PCIE_TX6P PCIE_TX6N

PCIE_TX7P PCIE_TX7N

PCIE_TX8P PCIE_TX8N

PCIE_TX9P PCIE_TX9N

PCIE_TX10P PCIE_TX10N

PCIE_TX11P PCIE_TX11N

PCIE_TX12P PCIE_TX12N

PCIE_TX13P PCIE_TX13N

PCIE_TX14P PCIE_TX14N

PCIE_TX15P PCIE_TX15N

Calibration

PCIE_CALRN PCIE_CALRP

PEG_M_RXP15

AA28

PEG_M_RXN15

AA27

PEG_M_RXP14

AA25

PEG_M_RXN14

AA24

PEG_M_RXP13

Y28

PEG_M_RXN13

Y27

PEG_M_RXP12

Y25

PEG_M_RXN12

Y24

PEG_M_RXP11

V28

PEG_M_RXN11

V27

PEG_M_RXP10

V25

PEG_M_RXN10

V24

PEG_M_RXP9

T28

PEG_M_RXN9 PCIE_GTX_C_MRX_N9

T27

PEG_M_RXP8

T25

PEG_M_RXN8 PCIE_GTX_C_MRX_N8

T24

PEG_M_RXP7

P28

PEG_M_RXN7

P27

PEG_M_RXP6

P25

PEG_M_RXN6

P24

PEG_M_RXP5

M28

PEG_M_RXN5

M27

PEG_M_RXP4 PCIE_GTX_C_MRX_P4

M25

PEG_M_RXN4

M24

PEG_M_RXP3

L28

PEG_M_RXN3

L27

PEG_M_RXP2 PCIE_GTX_C_MRX_P2

L25

PEG_M_RXN2

L24

PEG_M_RXP1 PCIE_GTX_C_MRX_P1

J28

PEG_M_RXN1

J27

PEG_M_RXP0

G28 G27

R108 2K_0402_1%R108 2K_0402_1%

AF25

1 2

R109 1.27K_0402_1%R109 1.27K_0402_1%

AE25

1 2

AE23

NC

AH30

NC

C284 0.1U_0402_16V7KC284 0.1U_0402_16V7K

1 2

C285 0.1U_0402_16V7KC285 0.1U_0402_16V7K

1 2

C282 0.1U_0402_16V7KC282 0.1U_0402_16V7K

1 2

C283 0.1U_0402_16V7KC283 0.1U_0402_16V7K

1 2

C280 0.1U_0402_16V7KC280 0.1U_0402_16V7K

1 2

C281 0.1U_0402_16V7KC281 0.1U_0402_16V7K

1 2

C278 0.1U_0402_16V7KC278 0.1U_0402_16V7K

1 2

C279 0.1U_0402_16V7KC279 0.1U_0402_16V7K

1 2

C276 0.1U_0402_16V7KC276 0.1U_0402_16V7K

1 2

C277 0.1U_0402_16V7KC277 0.1U_0402_16V7K

1 2

C274 0.1U_0402_16V7KC274 0.1U_0402_16V7K

1 2

C275 0.1U_0402_16V7KC275 0.1U_0402_16V7K

1 2

C272 0.1U_0402_16V7KC272 0.1U_0402_16V7K

1 2

C273 0.1U_0402_16V7KC273 0.1U_0402_16V7K

1 2

C270 0.1U_0402_16V7KC270 0.1U_0402_16V7K

1 2

C271 0.1U_0402_16V7KC271 0.1U_0402_16V7K

1 2

C268 0.1U_0402_16V7KC268 0.1U_0402_16V7K

1 2

C269 0.1U_0402_16V7KC269 0.1U_0402_16V7K

1 2

C266 0.1U_0402_16V7KC266 0.1U_0402_16V7K

1 2

C267 0.1U_0402_16V7KC267 0.1U_0402_16V7K

1 2

C264 0.1U_0402_16V7KC264 0.1U_0402_16V7K

1 2

C265 0.1U_0402_16V7KC265 0.1U_0402_16V7K

1 2

C262 0.1U_0402_16V7KC262 0.1U_0402_16V7K

1 2

C263 0.1U_0402_16V7KC263 0.1U_0402_16V7K

1 2

C260 0.1U_0402_16V7KC260 0.1U_0402_16V7K

1 2

C261 0.1U_0402_16V7KC261 0.1U_0402_16V7K

1 2

C258 0.1U_0402_16V7KC258 0.1U_0402_16V7K

1 2

C259 0.1U_0402_16V7KC259 0.1U_0402_16V7K

1 2

C256 0.1U_0402_16V7KC256 0.1U_0402_16V7K

1 2

C257 0.1U_0402_16V7KC257 0.1U_0402_16V7K

1 2

C254 0.1U_0402_16V7KC254 0.1U_0402_16V7K

1 2

C255 0.1U_0402_16V7KC255 0.1U_0402_16V7K

1 2

+1.1VS

PCIE_GTX_C_MRX_P15 PCIE_GTX_C_MRX_N15

PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N14

PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N13

PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N12

PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N11

PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N10

PCIE_GTX_C_MRX_P9

PCIE_GTX_C_MRX_P8

PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N7

PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N6

PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_N5

PCIE_GTX_C_MRX_N4

PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N3

PCIE_GTX_C_MRX_N2

PCIE_GTX_C_MRX_N1

PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_N0

PCIE LANE REVERSALPCIE LANE REVERSAL

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/09/25 2006/09/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

M82-S PCIE interface

LA-4092P

15 53Thursday, February 21, 2008

1

0.4

of

5

BLM18PG121SN1D_0603

+VGA_CORE

D D

+1.8VS

+1.1VS

C C

+1.8VS

12

R132

R132 499_0402_1%

499_0402_1%

12

R136

R136 249_0402_1%

249_0402_1%

B B

L23

BLM18PG121SN1D_0603

L26

10U_0603_6.3V6M

BLM18PG121SN1D_0603

+1.8VS

10U_0603_6.3V6M

BLM18PG121SN1D_0603

R115

10U_0603_6.3V6M

+VGA_VREF

1

2

R110

C325

0.1U_0402_16V4Z

SI: Per EMI request add SSC chip

Spread spectrum

27M_OUT

R630

0_0402_5%

1 2

27M_CLK 22

A A

1U_0402_6.3V4Z

12

1

C294

2

10U_0603_6.3V6M

0.1U_0402_16V4Z

12

1

C299

2

0.1U_0402_16V4Z

12

1

C307

2

0.1U_0402_16V4Z

12

1

C310

2

ENBKL41

+3.3V_DELAY

VGA_PWRSEL52

27M_SSC22 THM_ALERT#21

SCS#_GPIO2221

U4

1

REFOUT

2

XOUT XIN3VDD

ASM3P2872A

0.1U_0402_16V4Z@

VGA input level is 1.8V

1

2

22P_0402_50V8J

5

+MPVDD

1

C286

C290

1

2

1

2

C308

C311

2

1

2

0.1U_0402_16V4Z

+DPLL_PVDD

C291

C291 1U_0402_6.3V4Z

1U_0402_6.3V4Z

+PCIE_PVDD

1

C309

C309 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+DPLL_VDDC

1

C312

C312 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

SI2:unmount R188

R188

+3.3V_DELAY

@

6

VSS

5

27MCLK

@ Y6

@

GND IN

CV2

R178 33_0402_5%@R178 33_0402_5%@

4

C462

Y6

OUT

GND

1 2

1

2

MODOUT

4 1

27MHz_16PF_6P27000126

@ CV2

@

C287

R120

12

10K_0402_5%

12

10K_0402_5%@

1 2

R625 0_0402_5%R625 0_0402_5%

12

R12710K_0402_5%@ R12710K_0402_5%@

R130 10K_0402_5%R130 10K_0402_5% R131 1K_0402_5%R131 1K_0402_5%

27M_SSC_R

+3VS

1

C463

C463 1U_0402_6.3V4Z

1U_0402_6.3V4Z

@

2

75_0402_1%

27M_OUT

1 2

R177

XTALOUT

3 2

1

@ CV1

@

22P_0402_50V8J

2

VRAM_ID021 VRAM_ID121 VRAM_ID221 VRAM_ID321

SOUT_GPIO821

SIN_GPIO921

SCLK21 GPIO1121 GPIO1221 GPIO1321

VGA_CLKREQ#

12 12

120mA

40mA

230mA

300mA

CV1

PSYNC21

GPIO021 GPIO121

GPIO421 GPIO521 GPIO621

R189

R189 100_0402_5%

100_0402_5%

1 2

1K_0402_5%

27M_SSC_R

VGA_CTF

T35 PADT35 PAD T36 PADT36 PAD T37 PADT37 PAD T38 PADT38 PAD

TMDS_SSCOUT TMDS_CLKIN

+DPLL_PVDD

+PCIE_PVDD

+MPVDD

+DPLL_VDDC

+VGA_VREF

27MCLK

XTALOUT

12

R142

4

U5B

AJ4

TXCM_DPA0P

AJ5

TXCP_DPA0N

AL5

TX0M_DPA1P

AK5

TX0P_DPA1N

AL6

TX1M_DPA2P

AK6

TX1P_DPA2N

AK8

TX2M_DPA3P

AL8

TX2P_DPA3N

AD9

DVALID

AE7

PSYNC_NEW

AK4

DVPCNTL_MVP_0

AL3

DVPCNTL_MVP_1

V2

DVPCNTL_0

V1

DVPCNTL_1

W3

DVPCNTL_2

W1

DVPCLK

Y1

DVPDATA_0

Y2

DVPDATA_1

Y3

DVPDATA_2

AA2

DVPDATA_3

AA3

DVPDATA_4

AB1

DVPDATA_5

AB2

DVPDATA_6

AB3

DVPDATA_7

AC1

DVPDATA_8

AC3

DVPDATA_9

AD1

DVPDATA_10

AD2

DVPDATA_11

AD3

DVPDATA_12

AF3

DVPDATA_13

AG3

DVPDATA_14

AH3

DVPDATA_15

AG1

DVPDATA_16

AH2

DVPDATA_17

AH1

DVPDATA_18

AJ3

DVPDATA_19

AJ1

DVPDATA_20

AJ2

DVPDATA_21

AK2

DVPDATA_22

AK3

DVPDATA_23

Y4

GPIO_0

V3

GPIO_1

V4

GPIO_2

V5

GPIO_3

U3

GPIO_4

U2

GPIO_5

T4

GPIO_6

T5

GPIO_7_BLON

T7

GPIO_8_ROMSO

T8

GPIO_9_ROMSI

R1

GPIO_10_ROMSCK

R2

GPIO_11

R3

GPIO_12

P1

GPIO_13

P3

GPIO_14_HPD2

N1

GPIO_15_PWRCNTL_0

N2

GPIO_16_SSIN

P4

GPIO_17_THERMAL_INT

P7

GPIO_18_HPD3

P8

GPIO_19_CTF

P5

GPIO_20_PWRCNTL_1

V7

GPIO_21_BB_EN

N3

GPIO_22_ROMCSB

Y5

GPIO_23_CLKREQB

M4

GPIO_24_JMODE

M5

GPIO_25_TDI

M7

GPIO_26_TCK

M8

GPIO_27_TMS

L8

GPIO_28_TDO

Y8

GEN_A

Y7

GEN_B

V8

GEN_C

AH6

GEN_D_HPD4

AG6

GEN_E

AC11

VREFG

AH12

DPLL_PVDD

AG12

DPLL_PVSS

AH31

PCIE_PVDD

A9

MPVDD

B9

MPVSS

AE12

DPLL_VDDC

AJ31

XTALIN

AJ30

XTALOUT

AH26

TESTEN

AD12

PLLTEST

216-0707001-00/M82-S_BGA632

4

PART 2 OF 6

INTEGRATED

INTEGRATED TMDS/DP PORT

TMDS/DP PORT

EXT TMDS

EXT TMDS DVO

DVO

GENERAL

GENERAL PURPOSE

PURPOSE I/O

I/O

PLL &

PLL & XTAL

XTAL

TEST

3

polarity swap for ATI commond

DPA_PVDD

DPA_PVSS

DPB_PVDD

DPB_PVSS

DPA_VDDR DPA_VDDR

DPB_VDDR DPB_VDDR

DPB_VSSR DPB_VSSR DPB_VSSR DPB_VSSR DPB_VSSR

DPA_VSSR DPA_VSSR DPA_VSSR DPA_VSSR DPA_VSSR

DP_CALR

HPD1

HSYNC VSYNC

RSET

AVDD AVSSQ VDD1DI VSS1DI

R2B

G2B

B2B

COMP

V2SYNC H2SYNC

A2VDD

A2VDDQ

A2VSSQ

VDD2DI VSS2DI

R2SET

SCL SDA

DDC1DATA

DDC1CLK

DDC2DATA

DDC2CLK

TS_FDO

DPLUS

DMINUS

AK9 AL9

AJ9 AJ10

AL10 AK10

AL11 AK11

40mA

AL7 AK7

AE11 AF11

AJ12 AJ13

AK13 AL13

AL12 AK12 AJ11 AH9 AH11

AJ8 AF7 AG7 AJ7 AH7

AG11 AA8 AL28

R

AK28

RB

AL27

G

AK27

GB

AL26

B

AK26

BB

AK29 AK30

AJ28 AL29 AH28 AJ27 AJ26 AL17

R2

AK17 AL15

G2

AK15 AL14

B2

AK14 AJ17

C

AJ15

Y

AJ14 AE16

AF16 AH14 AH16 AG16 AF18 AE18 AG14

AA5 AA4

AJ29 AH29

AC5 AC4

AF4 AH4

AF9 AG9

AE14 AE5

AE4

+DPA_PVDD

+DPB_PVDD

R112 150_0402_1%R112 150_0402_1%

1 2

RED

GREEN

BLUE

CRT_HSYNC 21,23

+A2VDD +A2VDDQ

CRT_VSYNC 23

D+ 21 D- 21

3

1 2

R119 499_0402_1%R119 499_0402_1%

1 2

R135 715_0402_1%R135 715_0402_1%

LCD_DDC_CLK LCD_DDC_DAT

VGA_DDC_DAT VGA_DDC_CLK

HDMIDAT_VGA HDMICLK_VGA

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

TXCM_DPB0P TXCP_DPB0N

TX0M_DPB1P

TX0P_DPB1N

TX1M_DPB2P

TX1P_DPB2N

TX2M_DPB3P

TX2P_DPB3N

DAC1 / CRT

DAC2 (TV/CRT2)

SERIAL

SERIAL BUSES

BUSES

DDC3DATA_DP3_AUXN

DDC3CLK_DP3_AUXP

DDC4DATA_DP4_AUXN

DDC4CLK_DP4_AUXP

THERMAL

+1.8VS

1 2

L40

BLM18PG121SN1D_0603

HDMI_CLK-_VGA 25 HDMI_CLK+_VGA 25

HDMI_TX0-_VGA 25 HDMI_TX0+_VGA 25

HDMI_TX1-_VGA 25 HDMI_TX1+_VGA 25

HDMI_TX2-_VGA 25 HDMI_TX2+_VGA 25

1U_0402_6.3V4Z

1

C297

2

0.1U_0402_16V4Z

HPD 25 RED 23

GREEN 23

BLUE 23

1

C289

2

+DPA_VDDR

+DPB_VDDR

+AVDD

+VDD1DI

1U_0402_6.3V4Z

1

2

BLM18PG121SN1D_0603

10U_0603_6.3V6M

+1.8VS

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603 C298

C298 10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

RED GREEN BLUE

1 2

L24

BLM18PG121SN1D_0603

10U_0603_6.3V6M

L25

12

SI2: Add C598,C597,C599,L41 for AMD request

+DPB_PVDD

C3000.1U_0402_16V4Z C3000.1U_0402_16V4Z

1

C2920.1U_0402_16V4Z C2920.1U_0402_16V4Z

2

+1.8VS

1U_0402_6.3V4Z

1

C598

2

0.1U_0402_16V4Z

200mA

1

C301

C302

2

10U_0603_6.3V6M

200mA

1

C303

C293

2

10U_0603_6.3V6M

1 2

R116 150_0402_1%R116 150_0402_1%

1 2

R117 150_0402_1%R117 150_0402_1%

1 2

R118 150_0402_1%R118 150_0402_1%

1

2

100mA

1

C316

C317

2

0.1U_0402_16V4Z

TMDS_CLKIN

SI: Per EMI request add SSC chip

135mA

C323

0.1U_0402_16V4Z

L33 0_0603_5%L33 0_0603_5%

1

C324

2

1U_0402_6.3V4Z

LCD_DDC_CLK LCD_DDC_DAT VGA_DDC_DAT VGA_DDC_CLK HDMIDAT_VGA HDMICLK_VGA

2mA

1

2

10U_0603_6.3V6M

LCD_DDC_CLK 24

LCD_DDC_DAT 24

VGA_DDC_DAT 23 VGA_DDC_CLK 23

HDMIDAT_VGA 25 HDMICLK_VGA 25

C322

1

2

LCD

CRT HDMI

thermal

Compal Secret Data

2006/09/25 2006/09/25

Compal Secret Data

Deciphered Date

2

1U_0402_6.3V4Z

1

C390

2

1U_0402_6.3V4Z

1

C295

2

BLM18PG121SN1D_0603

1

C597

C599

2

10U_0603_6.3V6M

L27

BLM18PG121SN1D_0603

L28

BLM18PG121SN1D_0603

1

C318

C318 10U_0603_6.3V6M

10U_0603_6.3V6M

2

R182 33_0402_5%@R182 33_0402_5%@ R626 0_0402_5%@R626 0_0402_5%@ R627 0_0402_5%@R627 0_0402_5%@

12

+1.8VS

1

2

1

2

L41

1 2 1 2 1 2

+LVDDR

1

C389

C391

2

0.1U_0402_16V4Z

+LVDDC

1

C288

C296

2

0.1U_0402_16V4Z

12

+1.8VS

12

+1.1VS

12

+1.1VS

12

L31

BLM18PG121SN1D_0603

10U_0603_6.3V6M

0.1U_0402_16V4Z

Pin 5 have internal pull low

1

C320

C319

2

40mA

+1.8VS

320mA

80mA

1U_0402_6.3V4Z

1 2 3 4

P2040CF-08TR_TSSOP8@

1

2

SI: Per AMD request cahnge to +3.3V_DELAY

+3.3V_DELAY

1 2

R241 4.7K_0402_5%R241 4.7K_0402_5%

1 2

R242 4.7K_0402_5%R242 4.7K_0402_5%

1 2

R243 10K_0402_5%R243 10K_0402_5%

1 2

R244 10K_0402_5%R244 10K_0402_5%

1 2

R245 10K_0402_5%R245 10K_0402_5%

1 2

R246 10K_0402_5%R246 10K_0402_5%

SI2: change from 4.7K to 10K

2

1

U5F

PART 6 OF 6

AF20

LVDDR

AG20

LVDDR

AJ18

LVDDC

AH20

LVDDC

AF23

LVSSR

AF21

LVSSR

AL18

LVSSR

AJ22

LVSSR

AJ25

LVSSR

AK18

LVSSR

AK23

LVSSR

AK25

LVSSR

AJ21

LVSSR

AL23

LVSSR

AL25

LVSSR

AG18

LPVDD

AH18

LPVSS

216-0707001-00/M82-S_BGA632

10U_0603_6.3V6M

1

C304

2

1U_0402_6.3V4Z

U70

CLKIN

VDD

MRA

SR0

SR1

ModOUT

VSS

SSON#

L32 0_0603_5%L32 0_0603_5%

C321

1U_0402_6.3V4Z

Title

M82-S CRT/LVDS/TV-OUT

Size Document Number Rev

Date: Sheet

VARY_BL

Control

DIGON

LVDS channel

TXCLK_UP TXCLK_UN

TXOUT_U0P

TXOUT_U0N

TXOUT_U1P

TXOUT_U1N

TXOUT_U2P

TXOUT_U2N

TXOUT_U3P

TXOUT_U3N

TXCLK_LP

TXCLK_LN TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N

1

C305

2

1

2

8 7 6 5

Compal Electronics, Inc.

+LPVDD

1

C306

2

0.1U_0402_16V4Z

1

C313

C314

2

0.1U_0402_16V4Z

+3VS

1 2

C500 0.1U_0402_16V4Z@C500 0.1U_0402_16V4Z@

R629 0_0402_5%@R629 0_0402_5%@

1 2

R183 33_0402_5%@R183 33_0402_5%@

1 2

12

+3.3V_DELAY

LA-4092P

1

10U_0603_6.3V6M

2

T44 PADT44 PAD

AA7 AC6

AD21 AE21 AJ24 AJ23 AK24 AL24 AG21 AH21 AG23 AH23

AL19 AK19 AJ20 AJ19 AK20 AL20 AK21 AL21 AK22 AL22

L29

BLM18PG121SN1D_0603

C315

1

12

L30

TMDS_SSCOUT

16 53Thursday, February 21, 2008

VGA_ENVDD 24

LVDS_BCLK+ 24 LVDS_BCLK- 24 LVDS_B0+ 24 LVDS_B0- 24 LVDS_B1+ 24 LVDS_B1- 24 LVDS_B2+ 24 LVDS_B2- 24

LVDS_ACLK+ 24 LVDS_ACLK- 24 LVDS_A0+ 24 LVDS_A0- 24 LVDS_A1+ 24 LVDS_A1- 24 LVDS_A2+ 24 LVDS_A2- 24

+1.8VS

12

of

+1.8VS

0.4

5

MDA[63..32]20 MDA[31..0]19

D D

C C

+1.8VS

12

R143

100_0402_1%

1

12

C328

0.1U_0402_16V4Z

R144

100_0402_1%

B B

0.1U_0402_16V4Z

2

100_0402_1%

R148

+1.8VS

12

MDA[63..32] MDA[31..0]

+VDD_MEM18_REFD +VDD_MEM18_REFS

4.7K_0402_5%

R145

12

R146

4.7K_0402_5%

4

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

U5C

E29

DQ_0

E30

DQ_1

E31

DQ_2

D31

DQ_3

C29

DQ_4

B29

DQ_5

B30

DQ_6

A29

DQ_7

E26

DQ_8

D26

DQ_9

E25

DQ_10

D25

DQ_11

G23

DQ_12

G21

DQ_13

E21

DQ_14

D21

DQ_15

C28

DQ_16

B28

DQ_17

B27

DQ_18

A27

DQ_19

C25

DQ_20

A25

DQ_21

C24

DQ_22

B24

DQ_23

C23

DQ_24

B23

DQ_25

A23

DQ_26

B22

DQ_27

C20

DQ_28

B20

DQ_29

A20

DQ_30

C19

DQ_31

C8

DQ_32

C7

DQ_33

B7

DQ_34

A7

DQ_35

A5

DQ_36

C4

DQ_37

B4

DQ_38

A3

DQ_39

G9

DQ_40

E9

DQ_41

D9

DQ_42

G7

DQ_43

G5

DQ_44

F5

DQ_45

G4

DQ_46

F4

DQ_47

B3

DQ_48

B2

DQ_49

C2

DQ_50

C1

DQ_51

E3

DQ_52

F3

DQ_53

F2

DQ_54

F1

DQ_55

G2

DQ_56

G1

DQ_57

H3

DQ_58

H2

DQ_59

K2

DQ_60

L3

DQ_61

L2

DQ_62

L1

DQ_63

F30

MVREFD

F31

MVREFS

L5

TEST_MCLK

L7

TEST_YCLK

J7

MEMTEST

216-0707001-00/M82-S_BGA632

12

R149

R149 240_0402_1%

240_0402_1%

Part 3 of 6

MEMORY

MEMORY INTERFACE

INTERFACE

write strobe read strobe

MA_0 MA_1 MA_2 MA_3 MA_4 MA_5 MA_6 MA_7 MA_8

MA_9 MA_10 MA_11

MA_BA0 MA_BA1 MA_A12 MA_BA2

DQMB_0 DQMB_1 DQMB_2 DQMB_3 DQMB_4 DQMB_5 DQMB_6 DQMB_7

QS_0 QS_1 QS_2 QS_3 QS_4 QS_5 QS_6 QS_7

QS_0B QS_1B QS_2B QS_3B QS_4B QS_5B QS_6B QS_7B

ODT0

ODT1

CLK0 CLK1

CLK0B CLK1B

RAS0B RAS1B

CAS0B CAS1B

CS0B_0 CS0B_1

CS1B_0 CS1B_1

CKE0 CKE1

WE0B WE1B

DRAM_RST

B14 A14 B13 E14 B17 A17 C15 G16 E16 C14 A12 B12 C12 D14 B15 G14

D30 G25 C26 C21 C5 D6 D2 K3

C30 D23 B26 B21 B6 E7 E2 J2

C31 E23 A26 A21 A6 D7 E1 J1

E20 C11

A18 A11

B18 B11

G20 D12

D20 E12

E18 G18

G11 E11

D18 G12

D16 C10

J5

R147

4.7K_0402_5%

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 BA0 BA1 MAA12 BA2

DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7

QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7

QSA#0 QSA#1 QSA#2 QSA#3 QSA#4 QSA#5 QSA#6 QSA#7

ODTA0 ODTA1

CLKA0 CLKA1

CLKA0# CLKA1#

RASA#0 RASA#1

CASA#0 CASA#1

CSA0#

CSA1#

CKEA0 CKEA1

WEA#0 WEA#1

12

3

MAA[12..0] BA[2..0]

ODTA0 19 ODTA1 20

CLKA0 19 CLKA1 20

CLKA0# 19 CLKA1# 20

RASA#0 19 RASA#1 20

CASA#0 19 CASA#1 20

CSA0# 19

CSA1# 20

CKEA0 19 CKEA1 20

WEA#0 19 WEA#1 20

DQMA#[3..0] 19

DQMA#[7..4] 20

QSA[3..0] 19

QSA[7..4] 20

QSA#[3..0] 19

QSA#[7..4] 20

MAA[12..0] 19,20 BA[2..0] 19,20

2

1

12

R150

100_0402_1%

A A

5

1

C329

0.1U_0402_16V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/09/25 2006/09/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

M82-S MEM

LA-4092P

17 53Thursday, February 21, 2008

1

0.4

of

5

U5E

AA26

PCIE_VSS

AA29

PCIE_VSS

AC26

PCIE_VSS

AD31

PCIE_VSS

AE29

PCIE_VSS

AE30

PCIE_VSS

AE31

PCIE_VSS

F28

PCIE_VSS

G26

D D

C C

B B

PCIE_VSS

G29

PCIE_VSS

G30

PCIE_VSS

G31

PCIE_VSS

H29

PCIE_VSS

J25

PCIE_VSS

J26

PCIE_VSS

L26

PCIE_VSS

L29

PCIE_VSS

L30

PCIE_VSS

L31

PCIE_VSS

M26

PCIE_VSS

M29

PCIE_VSS

P26

PCIE_VSS

R29

PCIE_VSS

R30

PCIE_VSS

R31

PCIE_VSS

T26

PCIE_VSS

U29

PCIE_VSS

V26

PCIE_VSS

Y26

PCIE_VSS

Y29

PCIE_VSS

Y30

PCIE_VSS

Y31

PCIE_VSS

A13

VSS

A2

VSS

C18

VSS

A24

VSS

A30

VSS

AA1

VSS

AA11

VSS

AA14

VSS

AA17

VSS

AA20

VSS

AA6

VSS

AC2

VSS

AC7

VSS

AE3

VSS

AL4

VSS

AD14

VSS

AF12

VSS

AF14

VSS

AD16

VSS

AD18

VSS

AE6

VSS

AG2

VSS

AE9

VSS

AH25

VSS

AK1

VSS

AK31

VSS

AJ6

VSS

AL2

VSS

AL30

VSS

B1

VSS

C13

VSS

216-0707001-00/M82-S_BGA632

Part 5 of 6

PCI-Express GND

CORE GND

1.1VS_POK49

B25

VSS

J8

VSS

B5

VSS

D11

VSS

C17

VSS

C22

VSS

C27

VSS

D29

VSS

C3

VSS

C6

VSS

D3

VSS

D28

VSS

F29

VSS

D4

VSS

F11

VSS

F12

VSS

F14

VSS

F16

VSS

F18

VSS

F20

VSS

F21

VSS

F23

VSS

F25

VSS

F7

VSS

F9

VSS

G3

VSS

G6

VSS

H23

VSS

J3

VSS

J4

VSS

J6

VSS

K1

VSS

L12

VSS

L15

VSS

L18

VSS

L21

VSS

L6

VSS

M11

VSS

M14

VSS

M17

VSS

M20

VSS

M6

VSS

P12

VSS

P15

VSS

P18

VSS

P21

VSS

P6

VSS

AC21

VSS

R14

VSS

R17

VSS

R20

VSS

T6

VSS

U1

VSS

U12

VSS

U15

VSS

U18

VSS

U21

VSS

AE20

VSS

V14

VSS

V17

VSS

V20

VSS

P2

VSS

V6

VSS

W2

VSS

Y12

VSS

Y15

VSS

Y18

VSS

Y21

VSS

Y6

VSS

M9

VSS

SUSP44,50

+3VS

+1.8VS

1 2

R403 4.7K_0402_5%R403 4.7K_0402_5%

4

BLM18PG121SN1D_0603

L36

10U_0603_6.3V6M

50mA

10U_0603_6.3V6M

+1.8VS

+3.3V_DELAY

SI2301BDS_SOT23

R185

12

330K_0402_5%@

1 2

R42 0_0402_5%R42 0_0402_5%

12

1

C356

2

1U_0402_6.3V4Z

Q8

1 3

1

C883

2

0.01U_0402_25V7K

@

+1.8VS

1U_0402_6.3V4Z

1

C364

2

1

C378

2

1U_0402_6.3V4Z

D

2

13

D

2

G

S

1

2

10U_0603_6.3V6M

1

2

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1

C357

2

1

C365

2

1U_0402_6.3V4Z

10U_0603_6.3V6M

1

C379

2

S

G

1 2

Q9

Q9 2N7002_SOT23-3

2N7002_SOT23-3

10U_0603_6.3V6M

1

C330

2

1U_0402_6.3V4Z

1

C340

2

1U_0402_6.3V4Z

1

C347

2

C358

0.1U_0402_16V4Z

1U_0402_6.3V4Z

1

C366

2

1

C380

2

1U_0402_6.3V4Z

Back Bias Disable

+3VS

R151

R151 100K_0402_5%

100K_0402_5%

1

C336

2

10U_0603_6.3V6M

1

C333

2

1U_0402_6.3V4Z

1

C348

2

1U_0402_6.3V4Z

+VDD_CT

2

1

C367

2

1

C381

2

+VGA_CORE

10U_0603_6.3V6M

1

C331

2

1U_0402_6.3V4Z

1

C334

2

1U_0402_6.3V4Z

1

C349

2

1

C382

0.1U_0402_16V4Z

2

1

C387

2

1U_0402_6.3V4Z

3

1.1A

C332

C335

C350

110mA

150mA

+VDD_MEM_CLK0 +VDD_MEM_CLK1

120mA

1

C388

2

1U_0402_6.3V4Z

U5D

A15

VDDR1

A22

VDDR1

A28

VDDR1

A4

VDDR1

A8

VDDR1

B8

VDDR1

C9

VDDR1

D1

VDDR1

H1

VDDR1

H11

VDDR1

H12

VDDR1

H14

VDDR1

H16

VDDR1

H18

VDDR1

H20

VDDR1

H21

VDDR1

B31

VDDR1

M1

VDDR1

AA9

VDD_CT

Y9

VDD_CT

V9

VDD_CT

T9

VDD_CT

J11

VDD_CT

J20

VDD_CT

J21

VDD_CT

L9

VDD_CT

AC18

VDDR3

AC16

VDDR3

AC14

VDDR3

AC12

VDDR3

AF1

VDDR4

AF2

VDDR4

AE1

VDDR5

AE2

VDDR5

M2

NC

M3

NC

L4

NC

AD11

NC

A10

VDDRH

A19

VDDRH

B10

VSSRH

B19

VSSRH

V11

BBN

U11

BBN

R11

BBP

P11

BBP

216-0707001-00/M82-S_BGA632

PART 4 OF 6

I/O Internal

Memory

I/O

Clock

Memory

I/O

Clock

Memory I/O

P

P O

O W

W E

E R

R

Back Bias

PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR

PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC

PCI-Express

VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC

Core

VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC

VDDCI VDDCI VDDCI VDDCI

2

AF30 AF31 AF29 AF27 AF28 AG29 AG30 AG31

AA23 AC24 AC25 AE26 AE27 AE28 L23 M23 P23 T23 V23 Y23

L11 L14 L17 L20 M12 M15 M18 M21 AC20 P14 P17 P20 R12 R15 R18 R21 AD20 U14 U17 U20 V12 V15 V18 V21 Y11 Y14 Y17 Y20 AA12 AA15 AA18 AA21 P9

J12 J14 J16 J18

+VGA_PCIE_VDDR

10U_0603_6.3V6M

+VGA_PCIE_VDDC

10U_0603_6.3V6M

+VDDCI

1U_0402_6.3V4Z

1

C341

2

1

C351

2

10U_0603_6.3V6M

1

C359

2

10U_0603_6.3V6M

1

C368

2

10U_0603_6.3V6M

1

C373

2

10U_0603_6.3V6M

1U_0402_6.3V4Z

1

C383

2

1

C337

2

1U_0402_6.3V4Z

1

C342

2

1U_0402_6.3V4Z

1

C352

2

1U_0402_6.3V4Z

1

C360

2

1U_0402_6.3V4Z

1

C369

2

1U_0402_6.3V4Z

1

C374

2

1

C384

2

1U_0402_6.3V4Z

1

C338

2

0.1U_0402_16V4Z

1

C343

2

1

C353

2

1U_0402_6.3V4Z

1

C361

2

1U_0402_6.3V4Z

1

C370

2

1U_0402_6.3V4Z

1

C375

2

1U_0402_6.3V4Z

1

C385

2

BLM18PG121SN1D_0603

1 2

1

C339

2

0.1U_0402_16V4Z

1

C344

C345

2

1U_0402_6.3V4Z

1

C354

2

1U_0402_6.3V4Z

1

C362

2

1U_0402_6.3V4Z

1

C371

2

1U_0402_6.3V4Z

1

C376

2

1U_0402_6.3V4Z

BLM18PG121SN1D_0603

1

C386

2

10U_0603_6.3V6M

1

L34

0.5A

BLM18PG121SN1D_0603

1 2

L35

1

PCIE_VDDC 1.1V @2A)

C346

2

1U_0402_6.3V4Z

1 <BOM Structure>

1

C355

2

1U_0402_6.3V4Z

1

C363

2

1U_0402_6.3V4Z

1

C372

2

1U_0402_6.3V4Z

1

C377

2

12

L37

+1.8VS

+1.1VS

15A

+

C478

220U_B2_2.5VM

+VGA_CORE

+1.8VS +VDD_MEM_CLK0

12

L38

BLM18PG121SN1D_0603

10U_0603_6.3V6M

A A

L39

BLM18PG121SN1D_0603

10U_0603_6.3V6M

5

1

C392

2

1U_0402_6.3V4Z

12

1

C395

2

C393

C396

1U_0402_6.3V4Z

1

2

1

2

4

2

C394

1

0.1U_0402_16V4Z

+VDD_MEM_CLK1

2

C397

1

0.1U_0402_16V4Z

1.1A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/09/25 2006/09/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

M82-S POWER

LA-4092P

1

of

18 53Thursday, February 21, 2008

of

18 53Thursday, February 21, 2008

of

18 53Thursday, February 21, 2008

0.4

5

U6

BA0 BA1

MAA12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5

D D

+1.8VS

C C

R157

4.99K_0402_1%

R155

12

1

C402

0.1U_0402_16V4Z

2

MAA4 MAA3 MAA2 MAA1 MAA0

CLKA0# CLKA0

CKEA0

CSA0# WEA#0 RASA#0 CASA#0 DQMA#2

DQMA#0

ODTA0

QSA2 QSA#2

QSA0 QSA#0

+VRAM_REF1

BA2 BA2

SI2:Add BA2 for 64M*16 VRAM SI2:Add BA2 for 64M*16 VRAM

U6

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

0.1U_0402_16V4Z

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

4

MDA1 MDA6 MDA3 MDA4 MDA5 MDA0 MDA7 MDA2 MDA19 MDA21 MDA16 MDA22 MDA23 MDA17 MDA20 MDA18

1

2

3

U7

BA0 BA1

MAA12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0

+1.8VS +1.8VS

1

C399

C398

2

1U_0402_6.3V4Z

4.99K_0402_1%

12

R158

R156

+1.8VS

12

1

C403

0.1U_0402_16V4Z

2

CLKA0# CLKA0

CKEA0

CSA0# WEA#0 RASA#0 CASA#0 DQMA#1

DQMA#3

ODTA0

QSA1 QSA#1

QSA3 QSA#3

+VRAM_REF2

U7

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

2

MDA29 MDA27 MDA31 MDA24 MDA26 MDA28 MDA25 MDA30 MDA14 MDA9 MDA12 MDA8 MDA10 MDA15 MDA11 MDA13

0.1U_0402_16V4Z

1

C400

2

1

C401

2

1U_0402_6.3V4Z

1

R159

BA[2..0] QSA[7..0] QSA#[7..0]

DQMA#[7..0]

MAA[12..0]

MDA[63..0]

ODTA0

CKEA0 RASA#0 CASA#0

WEA#0

CSA0#

12

1

C404

C404 470P_0402_50V7K

470P_0402_50V7K

2

CLKA0 CLKA0#

R160

R160 56_0402_5%

56_0402_5%

BA[2..0]17,20

QSA[7..0]17,20 QSA#[7..0]17,20

DQMA#[7..0]17,20

MAA[12..0]17,20

MDA[63..0]17,20

ODTA017 CKEA017 RASA#017 CASA#017 WEA#017 CSA0#17

CLKA017 CLKA0#17

56_0402_5%

+1.8VS

10U_0603_6.3V6M

1

B B

10U_0603_6.3V6M

A A

C405

1

C406

2

5

1

C407

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C408

2

1

C409

2

0.1U_0402_16V4Z

1

C410

2

1

C411

2

0.1U_0402_16V4Z

0.01U_0402_16V7K

1

C412

2

4

1

+

C490

C490 220U_6.3VM_R15

220U_6.3VM_R15

2

@

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.8VS

C413

10U_0603_6.3V6M

Issued Date

3

0.1U_0402_16V4Z

1

C415

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C416

C417

2

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

1

2

10U_0603_6.3V6M

1

C414

2

2006/09/25 2006/09/25

0.1U_0402_16V4Z

1

C418

2

1

C419

2

0.1U_0402_16V4Z

0.01U_0402_16V7K

1

C420

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

M82-S VRAM

LA-4092P

1

19 53Thursday, February 21, 2008

of

0.4

5

U8

BA0 BA1

MAA12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4

D D

+1.8VS

12

R161

C C

4.99K_0402_1%

12

R163

R161

1

C425

0.1U_0402_16V4Z

2

MAA3 MAA2 MAA1 MAA0

CLKA1# CLKA1

CKEA1

CSA1#

WEA#1 RASA#1 CASA#1

ODTA1

QSA5 QSA#5

QSA#4

+VRAM_REF3

BA2 BA2

SI2:Add BA2 for 64M*16 VRAM SI2:Add BA2 for 64M*16 VRAM

U8

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

4

MDA36

B9

MDA35

B1

MDA39

D9

MDA32

D1

MDA33

D3

MDA38

D7

MDA34

C2

MDA37

C8

MDA45

F9

MDA43

F1

MDA46

H9 H1

MDA41 MDA52

H3

MDA44

H7

MDA42 MDA54

G2

MDA47

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

0.1U_0402_16V4Z

1

2

C421

+1.8VS

1

C422

2

1U_0402_6.3V4Z

4.99K_0402_1%

12

R164

R162

+1.8VS

12

1

C426

0.1U_0402_16V4Z

2

3

U9

BA0 BA1

MAA12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0

CLKA1# CLKA1

CKEA1

CSA1#

WEA#1 RASA#1 CASA#1

DQMA#6DQMA#5 DQMA#7DQMA#4

ODTA1

QSA6 QSA#6

QSA7QSA4 QSA#7

+VRAM_REF4

U9

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

2

MDA58 MDA59 MDA61 MDA56 MDA63 MDA62 MDA57 MDA60 MDA50 MDA53 MDA48 MDA55MDA40

MDA49 MDA51

0.1U_0402_16V4Z

1

C423

2

+1.8VS

+1.8VS+1.8VS

1

C424

2

1U_0402_6.3V4Z

1

BA[2..0]17,19 DQMA#[7..0]17,19 MAA[12..0]17,19

QSA#[7..0]17,19 QSA[7..0]17,19

MDA[63..0]17,19

ODTA117 CKEA117 RASA#117 CASA#117 WEA#117 CSA1#17

CLKA117 CLKA1#17

R165

56_0402_5%

CLKA1 CLKA1#

12

R166

R166 56_0402_5%

56_0402_5%

BA[2..0]

DQMA#[7..0]

MAA[12..0] QSA#[7..0]

QSA[7..0]

MDA[63..0]

ODTA1

CKEA1 RASA#1 CASA#1

WEA#1

CSA1#

1

C427

C427 470P_0402_50V7K

470P_0402_50V7K

+1.8VS +1.8VS

10U_0603_6.3V6M

1

B B

10U_0603_6.3V6M

A A

C428

1

C429

2

5

1

C430

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C431

2

1

C432

2

0.1U_0402_16V4Z

1

C433

2

1

C434

2

0.1U_0402_16V4Z

0.01U_0402_16V7K

1

C435

2

4

C436

10U_0603_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

10U_0603_6.3V6M

1

C437

2

2006/09/25 2006/09/25

1

C438

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C439

C440

2

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

0.1U_0402_16V4Z

1

C441

2

1

C442

2

0.1U_0402_16V4Z

2

1

C443

2

0.01U_0402_16V7K

1

2

Title

Size Document Number Rev

Date: Sheet

2

Compal Electronics, Inc.

M82-S VRAM

LA-4092P

1

20 53Thursday, February 21, 2008

0.4

of

+3.3V_DELAY

D D

5

@

R19310K_0402_5%

12

@

R18410K_0402_5%

12

@

R18710K_0402_5%

12

@

R19410K_0402_5%

12

@

R29110K_0402_5%

12

R19010K_0402_5% R19010K_0402_5%

12

@

R21910K_0402_5%

12

@

R23410K_0402_5%

12

@

R28710K_0402_5%

12

@

R28910K_0402_5%

12

@

SCS#_GPIO22

R24010K_0402_5%

12

GPIO0 16 GPIO1 16

GPIO4 16

GPIO5 16

GPIO6 16

SOUT_GPIO8 16

SIN_GPIO9 16

GPIO11 16 GPIO12 16 GPIO13 16

GPIO9 = 0 (BIOS_ROM_EN = 0)

GPIO[13:11]

0 0 0 0 0 1 0 1 0 1 0 0

4

MEMORY SIZE

128MB 256MB 64MB 512MB

3

STRAPS

TX_PWRS_ENB

TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS ENABLES

GPIO0

GPIO1

GPIO4

GPIO5BIF_GEN2_EN_A

GPIO6DEBUG_ I2C_ENABLE

DESCRIPTION OF RECOMMENDED SETTING

PCIE FULL TX OUTPUT SWING

DEBUG SIGNALS MUXED OUTBIF_DEBUG_ACCESS

PCI-E 5.0GT/s or 2.5 GT/s select

Internal use only

BIF_AUDIO_EN GPIO8 ENABLE HD AUDIO(M8X)

ROMIDCFG[3:0]

BIOS_ROM EN

GPIO [9,13,12,11]

GPIO_22_ROMCSB

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT

DISABLE EXTERNAL BIOS ROM

RECOMMENDED M8X

0

1

0 1 0 1

0

2

1

VRAM_ID 3 ,2 ,1 ,0

U11

5

D

6

C

1

S

7

HOLD

3

W

8

VCC

M25P10-AVMN6T_SO8~D@

Deciphered Date

0

1

0 0 0 0

0 0 0 1

0 0 1 0

0 0 1 1

0 1 0 1Qimonda 64Mx16 1.8V

Q

VSS

2

4

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

M82-S Filters / Strap

LA-4092P

1

21 53Thursday, February 21, 2008

0.3

of

@

R19610K_0402_5%

1 2

R19710K_0402_5% R19710K_0402_5%

C C

10K_0402_5%@

12

R213

1 2

R202 10K_0402_5%@R202 10K_0402_5%@

10K_0402_5%@

12

R215

1 2

R204 10K_0402_5%@R204 10K_0402_5%@

10K_0402_5%@

12

R216

1 2

R206 10K_0402_5%@R206 10K_0402_5%@

10K_0402_5%@

12

R212

1 2

R208 10K_0402_5%@R208 10K_0402_5%@

B B

VGA Thermal Sensor ADM1032ARMZ

A A

THM_ALERT#16

12

+1.8VS

VRAM_ID0 16

+1.8VS

VRAM_ID1 16

+1.8VS

VRAM_ID2 16

+1.8VS

VRAM_ID3 16

Closed to U80

0.1U_0402_16V4Z

D+16

D-16

+3.3V_DELAY

C467

1 2

2200P_0402_50V7K

R330 4.7K_0402_5%R330 4.7K_0402_5%

5

1 2

C466

+3VS

PSYNC 16

CRT_HSYNC 16,23

2

1

U12

1

VDD

2

D+

3

DTHERM#4GND

ADM1032ARMZ REEL_MSOP8

SCLK

SDATA

ALERT#

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESE

PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

8 7 6 5

SMB_EC_CK2 6,41

SMB_EC_DA2 6,41

4

BIF_VGA_DIS PSYNC

BIF_HDMI_EN

VRAM_ID[3:0]

HSYNC

DVPDATA (23,22,21,20)

ATI RESERVED CONFIGURATION STRAPS

GPIO2 GPIO3

GENERICC GPIO21_BB_EN

VGA ENABLED===0 is enable

HDMI ENABLE

Samsung 64Mx16 1.8V

Samsung 32Mx16 1.8V

Hynix 64Mx16 1.8V

Hynix 32Mx16 1.8V

Qimonda 32Mx16 1.8V 0 1 0 0

GPIO5 GPIO6 H2SYNC V2SYNC

GPIO_28_TDO

DVALID

FLASH ROM

SIN_GPIO916 SOUT_GPIO8 16

SCLK16

SCS#_GPIO2216

+3.3V_DELAY

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1 2

RV96 10K_0402_5%

@

SCLK

12

RV99

@ RV99

@

10K_0402_5%

Compal Secret Data

2006/09/25 2006/09/25

Compal Secret Data

A

B

C

D

E

R168

1 2

0_0805_5%

MiniCard_1 MiniCard_2

SEL_SATA

+VDDCLK_IO

1

2

SB LINK

0.1U_0402_16V4Z

1

C452

2

C453

0.1U_0402_16V4Z

1

C454

2

1

C455

2

0.1U_0402_16V4Z

1

C456

2

0.1U_0402_16V4Z

C464

22P_0402_50V8J

1

C457

2

CLK_XTAL_OUT CLK_XTAL_IN

Y2

12

14.31818MHZ_20P_6X1430004201

1

C465

C465 22P_0402_50V8J

2

22P_0402_50V8J

2

+3VS

Routing the trace at least 10mil

72

71

73

U10

GND

VSS_48

1

SMB_CK_CLK08,9,27,35 SMB_CK_DAT08,9,27,35

27M_CLK16 27M_SSC16

CLK_SBLINK_BCLK#11

CLK_SBLINK_BCLK11 CLK_SBSRC_BCLK# 26

CLK_PCIE_MCARD1#33

CLK_PCIE_MCARD133

CLK_PCIE_MCARD2#33

CLK_PCIE_MCARD233

+3VS_CLK

R226 33_0402_5%R226 33_0402_5%

1 2

R228 33_0402_5%R228 33_0402_5%

1 2

+VDDCLK_IO

+3VS_CLK

+VDDCLK_IO

SCL

2

SDA

3

VDD_DOT

4

SRC_7#/27M

5

SRC_7/27M_SS

6

VSS_DOT

7

SRC_5#

8

SRC_5

9

SRC_4#

10

SRC_4

11

VSS_SRC

12

VDD_SRC_IO

13

SRC_3#

14

SRC_3

15

SRC_2#

16

SRC_2

17

VDD_SRC

18

VDD_SRC_IO

48MHz_0

VSS_SRC19SRC_1#20SRC_121SRC_0#22SRC_023CLKREQ_0#24ATIGCLK_2#25ATIGCLK_226VSS_ATIG27VDD_ATIG_IO28VDD_ATIG29ATIGCLK_1#30ATIGCLK_131ATIGCLK_0#32VSS_SB_SRC36SB_SRC_1

+1.2V_HT

22U_0805_6.3V6M

1 1

2 2

PA_RS7X0A1

3 3

+3VS_CLK

R179

8.2K_0402_5%@

1 2

+3VS_CLK

70

69

VDD_48

48MHz_1

R167

1 2

0_0805_5%

CLK_XTAL_OUT

CLK_XTAL_IN

65

67

66

68

XTAL_IN

VSS_REF

XTAL_OUT

+3VS_CLK

NB_OSC_14.318M_R

+3VS_CLK

SEL_SATA

27M_SEL

63

64

61

62

VDD_HTT

VDD_REF

REF_2/SEL_27

REF_1/SEL_SATA

REF_0/SEL_HTT66

1

C444

C444 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+3VS_CLK

60

59

58

57

PD#

VSS_HTT

HTT_0/66M_0

HTT_0#/66M_1

SB_SRC_1#34ATIGCLK_0

35

33

1

C445

0.1U_0402_16V4Z

2

1

C458

0.1U_0402_16V4Z

2

1

C446

0.1U_0402_16V4Z

2

1

C459

0.1U_0402_16V4Z

2

SI2:follow AMD request modify resistor value

R170 33_0402_5%R170 33_0402_5%

1 2 1 2

R379 158_0402_1%R379 158_0402_1%

R220 33_0402_5%R220 33_0402_5%

1 2

R174 10K_0402_5%R174 10K_0402_5%

56

55

CPU_K8_0

CPU_K8_0#

VDD_CPU

VDD_CPU_I/O

VSS_CPU CLKREQ_1# CLKREQ_2#

VSS_SATA

SRC_6/SATA

SRC_6#/SATA#

VDD_SATA CLKREQ_3# CLKREQ_4#

SB_SRC_SLOW#

SB_SRC_0

SB_SRC_0#

VDD_SB_SRC

VDD_SB_SRC_IO

SLG8SP626VTR_QFN72_10x10

+3VS_CLK

1 2

R946 0_0402_5%R946 0_0402_5%

1 2

R945 0_0402_5%R945 0_0402_5%

54 53 52 51 50 49

VDD_A

48

VSS_A

47 46 45 44 43 42 41 40 39 38 37

+3VS_CLK +VDDCLK_IO

+3VS_CLK

1 2

R372 10K_0402_5%R372 10K_0402_5%

+3VS_CLK +VDDCLK_IO

SI2: Use new version CLK gen

CLKREQ_NCARD# CLKREQ_MCARD2#

CLKREQ_MCARD1#

1

C447

0.1U_0402_16V4Z

2

1

C460

0.1U_0402_16V4Z

2

R186

R186 261_0402_1%@

261_0402_1%@

1 2

+3VS_CLK

1

C448

0.1U_0402_16V4Z

2

1

C461

0.1U_0402_16V4Z

2

CLK_48M_USB 27 NB_OSC_14.318M 11

1 2

90.9_0402_1%

CLK_14M_SIO 40 CLK_NBHT 11 CLK_NBHT# 11

CLK_CPU_BCLK 6

CPU

CLK_CPU_BCLK# 6

CLKREQ_NCARD# 33 CLKREQ_MCARD2# 33

CLK_SBSRC_BCLK 26

CLKREQ_MCARD1# 33

R380

NB

SB SRC

1

C449

0.1U_0402_16V4Z

2

1

C450

0.1U_0402_16V4Z

2

1

C451

C451 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

R171/R183 (value may change)

RS780 1.1V 158R/90.0R

CLKREQ_NCARD# CLKREQ_MCARD2# CLKREQ_MCARD1# CLKREQ_LAN

PA_RS7X0A1

OSC_14M_NB

1 2

R324 8.2K_0402_5%R324 8.2K_0402_5%

1 2

R325 8.2K_0402_5%R325 8.2K_0402_5%

1 2

R326 8.2K_0402_5%R326 8.2K_0402_5%

1 2

R390 8.2K_0402_5%R390 8.2K_0402_5%

+3VS_CLK

R181

8.2K_0402_5%

SEL_SATA

4 4

1 2

configure as SATA output

1 0

*

configure as normal SRC(SRC_6) output

* default

Use voltage divider resistor R379 & R380 to pull low

NB_OSC_14.318M

configure as single-ended 66MHz output1

*0 configure as differential 100MHz output

* default

A

1 2

27M_SEL

R180

8.2K_0402_5%

27M_SEL

1* 0

* default

configure as 27M and 27M_SS output configure as SRC_7 output

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS_CLK

+VDDCLK_IO

CLKREQ_LAN

C

NBGFX_CLK 11 NBGFX_CLK# 11

CLK_PCIE_VGA 15 CLK_PCIE_VGA# 15

CLK_PCIE_MCARD0 34 CLK_PCIE_MCARD0# 34 CLKREQ_LAN 32 CLK_PCIE_LAN 32 CLK_PCIE_LAN# 32

CLK_PCIE_NCARD 33 CLK_PCIE_NCARD# 33

2007/08/02 2008/08/02

NB GFX VGA chip(Dis)

Card reader

GLAN New Card

Compal Secret Data

Deciphered Date

D

NB CLOCK INPUT TABLE

NB CLOCKS HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK GPP_REFCLK GPPSB_REFCLK 100M DIFF 100M DIFF

Size Document Number Rev

Custom

Date: Sheet

RX780 RS780

100M DIFF 100M DIFF

14M SE (1.8V) 14M SE (1.1V) NC vref

100M DIFF 100M DIFF

Compal Electronics, Inc.

Title

Compal Electronics, Inc.

Clock generator

LA-4092P

100M DIFF 100M DIFF

100M DIFF(IN/OUT)*

NC or 100M DIFF OUTPUT

E

0.4

of

22 53Thursday, February 21, 2008

A

B

C

D

E

CRT CONNECTOR

1 1

1

D35

DAN217_SC59

2

3

@

L47

BLM15AG121SN1D_0402

1

C469

2

6P_0402_50V8K

L47

1 2

L48

1 2

L49

1 2

6P_0402_50V8K

C858

R217

150_0402_1%

RED

GREEN

BLUE

12

C471

150_0402_1%

1

C859

2

6P_0402_50V8K

RED16

GREEN16

BLUE16

12

R211

R214

150_0402_1%

2 2

D37

DAN217_SC59

2

@

RED_L

GREEN_L

BLUE_L

1

C476

2

6P_0402_50V8K

1

3

C472

1

D34

DAN217_SC59

2

@

1

2

6P_0402_50V8K

3

+CRT_VCC

D36

2 1

RB491D_SOT23

+3VS

D_DDCDATA

HSYNC

VSYNC

D_DDCCLK

RED_L 43 GREEN_L 43 BLUE_L 43

+R_CRT_VCC

F2

21

1A_6VDC_MINISMDC110

0.1U_0402_16V4Z

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5 16

17

SI:change CRT Conn.

+CRT_VCC+5VS

1

C475

2

JP6

GND

GND GND

GND

SUYIN_070546FR015S265ZR

CONN@

+3VS

12

R237

4.7K_0402_5%

@

3 3

VGA_DDC_DAT16

R238

4.7K_0402_5%

@

1 2

4

Q10B

Q10B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

M82-S DDC3 & DDC4 is 5V tolerance

VGA_DDC_CLK16

RS780 DAC_SCL & SDA is 5V tolerance

4 4

A

SI2:change pull high from 6.8K to 2K ohm

+CRT_VCC

+3VS

5

3

+3VS

2

61

Q10A

Q10A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

B

2K_0402_5%

C857

@

470P_0402_50V8J

R100

1 2

1

2

1 2

C473

0.1U_0402_16V4Z

R218

R218 2K_0402_5%

2K_0402_5%

D_DDCDATA

D_DDCCLK

C856

@

470P_0402_50V8J

D_DDCDATA 43

D_DDCCLK 43

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

CRT_HSYNC16,21

CRT_VSYNC16

Compal Secret Data

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

0.1U_0402_16V4Z

1 2

C477

0.1U_0402_16V4Z

+CRT_VCC

D

5

P

A2Y

G

3

5

P

A2Y

G

3

1

4

OE#

U14

U14 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

D_VSYNC

4

OE#

U13

SN74AHCT1G125GW_SOT353-5

1 2

L84 10_0402_5%L84 10_0402_5%

1 2

L83 10_0402_5%L83 10_0402_5%

C474

@

D_HSYNC 43

D_VSYNC 43

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

CRT Connector

LA-4092P

HSYNCD_HSYNC

VSYNC

1

C470

@

2

10P_0402_50V8J

of

23 53Thursday, February 21, 2008

E

0.4

A

B

C

D

E

+LCDVDD

R225

470_0805_5%

1 1

2N7002DW-7-F_SOT363-6

VGA_ENVDD16

2 2

INVPWR_B++LCDVDD

C479

C480

+3VS

C481

D22

+5VALW

USB20_N5

3 3

4

VIN

3

IO2

PRTR5V0U2X_SOT143-4@

IO1

GND

12

C870680P_0402_50V7K @C870680P_0402_50V7K @

12

C871680P_0402_50V7K @C871680P_0402_50V7K @

USB20_P5

2 1

LVDS_BCLK+ LVDS_BCLK-

C481

12

680P_0402_50V7K

SI: Add +5VS jumper

+5VALW

+5VS

PJP4

PAD-OPEN 2x2m

C720

10U_0805_10V4Z

CAM_SHDN#28

4 4

R17 0_0402_5%@R17 0_0402_5%@

2 1 2

1

12

PJP7

PJP7 PAD-OPEN 2x2m

PAD-OPEN 2x2m

2 1

R16

R16 0_0402_5%

0_0402_5%

1 2

SI:Change to Richtek parts

U54

1

VIN

2

GND

3

EN

RT9193-39GB_SOT23-5

5

VOUT

4

BP

C511

0.1U_0402_16V4Z

215K_0402_1%@

1

2

12

R891

12

R892

R892 100K_0402_1%

100K_0402_1%

@

+USB_CAM

2

C719

C719 10U_0805_10V4Z

10U_0805_10V4Z

1

C480

1

12

2

680P_0402_50V7K

USB20_P527 USB20_N527

LVDS_BCLK+16 LVDS_BCLK-16

LVDS_B0+16 LVDS_B0-16 LVDS_B1+16 LVDS_B1-16 LVDS_B2+16 LVDS_B2-16

LVDS_BCLK+ LVDS_BCLK-

Q144B

2.2K_0402_5%

LVDS CONN

USB20_P5 USB20_N5

BKOFF#

LCD_DDC_CLK

LCD_DDC_DAT

1 3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39

12

3

5

4

2

R276

1 2

JP7

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

GND41GND

ACES_88242-4001

CONN@

1 2

@

1 2

+5VALW

R224

R224 1M_0402_5%

1M_0402_5%

1 2

R222

1 2

100K_0402_5%

61

Q144A

Q144A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

B+ INVPWR_B+

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42

+3VS

R4834.7K_0402_5%@ R4834.7K_0402_5%@

R2744.7K_0402_5% @ R2744.7K_0402_5% @

R2754.7K_0402_5%

2

C863

C863 1000P_0402_50V7K

1000P_0402_50V7K

1

L44

FBMA-L11-201209-221LMA30T_0805

LVDS_ACLKLVDS_ACLK+

DMIC_DAT DMIC_CLK

INVT_PWM BKOFF# DAC_BRIG

LCD_DDC_CLK

LCD_DDC_DAT

12

C866

@

680P_0402_50V7K

2

C487

4.7U_0805_10V4Z

12

LVDS_A2- 16 LVDS_A2+ 16 LVDS_A1- 16 LVDS_A1+ 16 LVDS_A0- 16 LVDS_A0+ 16 LVDS_ACLK- 16 LVDS_ACLK+ 16

DMIC_DAT 36 DMIC_CLK 36

1 2

+USB_CAM

12

C867

@

680P_0402_50V7K

G

+3VS

80mil

S

Q43

Q43 SI2301BDS-T1-E3_SOT23-3

SI2301BDS-T1-E3_SOT23-3

D

1 3

80mil

1

C491

0.1U_0402_16V4Z

2

+5VS

R491100_0805_5% R491100_0805_5%

LCD_DDC_CLK 16 LCD_DDC_DAT 16

+LCDVDD

LVDS_ACLKLVDS_ACLK+

DMIC_DAT DMIC_CLK

1 2

C868 680P_0402_50V7K@C868 680P_0402_50V7K@

1 2

C869 680P_0402_50V7K@C869 680P_0402_50V7K@

1 2

C923 220P_0402_50V7K@C923 220P_0402_50V7K@

1 2

C924 220P_0402_50V7K@C924 220P_0402_50V7K@

SI2: Add 220P for EMI

SI: Change R491 to 0805 size

C483

1

C628

2

470P_0402_50V7K

C482

1

2

470P_0402_50V7K

PV: mount for EMI

INV_PWM 41

BKOFF# 41

DAC_BRIG 41

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

LCD CONN.

LA-4092P

24 53Thursday, February 21, 2008

E

0.4

of

A

B

C

D

E

+3VS

+HDMI_5V_OUT

C851

0.1U_0402_16V4Z

1 1

0.1U_0402_16V4Z

2

1

5

1

P

OE#

A2Y

G

3

2.2K_0402_5%

4

U39

U39 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

R615

12

+3VS

HPD 16

R628

100K_0402_5%

1 2

HDMI_HPD

C850

2

0.1U_0402_16V4Z

1

@

4.7K_0402_5%

HDMIDAT_VGA16

HDMICLK_VGA16

R176

12

R209

4.7K_0402_5%@

1 2

SI2:change pull high from 6.8K to 2K ohm

+3VS

2K_0402_5%

5

3

4

Q139B

Q139B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

+3VS

2

61

Q139A

Q139A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

R210

+HDMI_5V_OUT

1 2

R236

R236 2K_0402_5%

2K_0402_5%

HDMI_SDATA

HDMI_SCLK

C:Chg. PN to SB770020010.

2 2

MP:Update D10 to meet HDMI.

HDMI_CLK-

SI:Add R6161~R624 for EMI requset

1 2

R616 0_0402_5%R616 0_0402_5%

L85

1

4

1

4

WCM-2012-900T_0805@

1 2

2

3

R617 0_0402_5%R617 0_0402_5%

HDMI_R_CK-

HDMI_R_CK+HDMI_CLK+

+5VS +HDMI_5V_OUT

D10

2 1

RB491D_SOT23

1

C468

0.1U_0402_16V4Z

2

C507 0.1U_0402_16V7KC507 0.1U_0402_16V7K

HDMI_CLK+_VGA16 HDMI_CLK-_VGA16

HDMI_TX0+_VGA16

3 3

4 4

HDMI_TX0-_VGA16

HDMI_TX1+_VGA16 HDMI_TX1-_VGA16

HDMI_TX2+_VGA16 HDMI_TX2-_VGA16

A

1 2

C508 0.1U_0402_16V7KC508 0.1U_0402_16V7K

1 2

C655 0.1U_0402_16V7KC655 0.1U_0402_16V7K

1 2

C675 0.1U_0402_16V7KC675 0.1U_0402_16V7K

1 2

C804 0.1U_0402_16V7KC804 0.1U_0402_16V7K

1 2

C827 0.1U_0402_16V7KC827 0.1U_0402_16V7K

1 2

C852 0.1U_0402_16V7KC852 0.1U_0402_16V7K

1 2

C853 0.1U_0402_16V7KC853 0.1U_0402_16V7K

1 2

HDMI_CLK+ HDMI_CLK-

HDMI_TX0+

HDMI_TX0-

HDMI_TX1+

HDMI_TX1-

HDMI_TX2+

HDMI_TX2-

HDMI_TX0-

HDMI_TX0+

HDMI_TX1-

HDMI_TX1+

HDMI_TX2+

B

1 2

R618 0_0402_5%R618 0_0402_5%

L86

1

4

WCM-2012-900T_0805@

1 2

R619 0_0402_5%R619 0_0402_5%

1 2

R620 0_0402_5%R620 0_0402_5%

L87

1

4

WCM-2012-900T_0805@

1 2

R621 0_0402_5%R621 0_0402_5%

1 2

R623 0_0402_5%R623 0_0402_5%

L88

1

4

WCM-2012-900T_0805@

1 2

R624 0_0402_5%R624 0_0402_5%

2

3

2

3

2

3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-HDMI_TX2-

HDMI_R_D2+

C

HDMI_R_CK+

HDMI_R_CK-

HDMI_R_D1HDMI_R_D1+ HDMI_R_D0HDMI_R_D0+ HDMI_R_D2+ HDMI_R_D2-

2007/08/02 2008/08/02

1 2

R307 499_0402_1%R307 499_0402_1%

1 2

R315 499_0402_1%R315 499_0402_1%

1 2

R297 499_0402_1%R297 499_0402_1%

1 2

R173 499_0402_1%R173 499_0402_1%

1 2

R304 499_0402_1%R304 499_0402_1%

1 2

R172 499_0402_1%R172 499_0402_1%

1 2

R141 499_0402_1%R141 499_0402_1%

1 2

R139 499_0402_1%R139 499_0402_1%

+5VS

100K_0402_5%

Compal Secret Data

Deciphered Date

R490

13

D

2

G

12

S

D

+HDMI_5V_OUT

Q136

Q136 2N7002_SOT23-3

2N7002_SOT23-3

HDMI Connector

JP8

18

HDMI_SDATA HDMI_SCLK HDMI_HPD

HDMI_R_CKHDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

Title

Size Document Number Rev

Custom

Date: Sheet

+5V

16

SDA

15

SCL

19

HP_DET

12

CK-

10

CK+

9

D0-

7

D0+

6

D1-

4

D1+

3

D2-

1

D2+

DDC/CEC_GND

SUYIN_100042MR019S153ZL

SI:Update HDMI footprint

CONN@

Compal Electronics, Inc.

LA-4092P

Reserved

HDMI

CEC

GND GND GND GND GND GND GND GND

13 14

2 5 8 11 20 21 22 23 17

E

25 53Thursday, February 21, 2008

0.4

of

A

B

C

D

E

Check AMD need pull low or not

NB_RST#_R

1 2

R300 8.2K_0402_5%@R300 8.2K_0402_5%@

NB_RST#_R

12 12

+SB_PCIEVDD

1

C505

1U_0402_6.3V4Z

2

CPU_LDT_REQ#

H_PROCHOT#

H_PWRGD

SB_RX0P_C SB_RX0N_C SB_RX1P_C SB_RX1N_C SB_RX2P_C SB_RX2N_C SB_RX3P_C SB_RX3N_C

SB_32KHI

SB_32KHO

C492 0.1U_0402_16V7KC492 0.1U_0402_16V7K

1 1

+3VALW

C506

12

5

U16

0.1U_0402_16V4Z@

2 2

3 3

NB_RST#_R

R314 20M_0402_5%@R314 20M_0402_5%@

1 2

C643

1 2

18P_0402_50V8J

R389

20M_0603_5%

C652

1 2

18P_0402_50V8J

12

U16

2

P

B

4

Y

1

A

G

NC7SZ08P5X_NL_SC70-5@

3

12

R312 33_0402_5%R312 33_0402_5%

Y3

4

OUT

1

IN

32.768KHZ_12.5P_1TJS125BJ4A421P

PLT_RST#

NC NC

3 2

SB_RX0P10

SB_RX0N10

SB_RX1P10

SB_RX1N10

SB_RX2P10

SB_RX2N10

SB_RX3P10

SB_RX3N10

SB_TX0P10 SB_TX0N10 SB_TX1P10 SB_TX1N10 SB_TX2P10 SB_TX2N10 SB_TX3P10 SB_TX3N10

+PCIE_VDDR

+1.2V_HT

PLT_RST# 11,14,15,32,33,34,40,41

SB_32KHI

SB_32KHO PCI_PIRQH#

1 2

BLM18PG121SN1D_0603

1 2

C493 0.1U_0402_16V7KC493 0.1U_0402_16V7K

1 2

C494 0.1U_0402_16V7KC494 0.1U_0402_16V7K

1 2

C495 0.1U_0402_16V7KC495 0.1U_0402_16V7K

1 2

C496 0.1U_0402_16V7KC496 0.1U_0402_16V7K

1 2

C497 0.1U_0402_16V7KC497 0.1U_0402_16V7K

1 2

C498 0.1U_0402_16V7KC498 0.1U_0402_16V7K

1 2

C499 0.1U_0402_16V7KC499 0.1U_0402_16V7K

1 2

R305 562_0402_1%R305 562_0402_1% R306 2.05K_0402_1%R306 2.05K_0402_1%

L53

1

C504

10U_0805_10V4Z

2

Close to SB

CLK_SBSRC_BCLK22 CLK_SBSRC_BCLK#22

Close to SB

H_PROCHOT#

+3VS

4 4

A

12

R319 10K_0402_5%R319 10K_0402_5%

CPU_LDT_REQ#6,11

H_PROCHOT#6

H_PWRGD6

LDT_STOP#6,11

LDT_RST#6

B

U15A

N2

A_RST#

V23

PCIE_TX0P

V22

PCIE_TX0N

V24

PCIE_TX1P

V25

PCIE_TX1N

U25

PCIE_TX2P

U24

PCIE_TX2N

T23

PCIE_TX3P

T22

PCIE_TX3N

U22

PCIE_RX0P

U21

PCIE_RX0N

U19

PCIE_RX1P

V19

PCIE_RX1N

R20

PCIE_RX2P

R21

PCIE_RX2N

R18

PCIE_RX3P

R17

PCIE_RX3N

T25

PCIE_CALRP

T24

PCIE_CALRN

P24

PCIE_PVDD

P25

PCIE_PVSS

N25

PCIE_RCLKP/NB_LNK_CLKP

N24

PCIE_RCLKN/NB_LNK_CLKN

K23

NB_DISP_CLKP

K22

NB_DISP_CLKN

M24

NB_HT_CLKP

M25

NB_HT_CLKN

P17

CPU_HT_CLKP

M18

CPU_HT_CLKN

M23

SLT_GFX_CLKP

M22

SLT_GFX_CLKN

J19

GPP_CLK0P

J18

GPP_CLK0N

L20

GPP_CLK1P

L19

GPP_CLK1N

M19

GPP_CLK2P

M20

GPP_CLK2N

N22

GPP_CLK3P

P22

GPP_CLK3N

L18

25M_48M_66M_OSC

J21

25M_X1

J20

25M_X2

A3

X1

B3

X2

RTC XTAL

F23 F24

F22 G25 G24

218S7EALA11FG_BGA528_SB700

RTC XTAL

ALLOW_LDTSTP PROCHOT# LDT_PG LDT_STP# LDT_RST#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SB700

Part 1 of 5

PCICLK5/GPIO41

PCI CLKS

PCI EXPRESS INTERFACE

PCI INTERFACE

REQ3#/GPIO70 REQ4#/GPIO71

GNT3#/GPIO72 GNT4#/GPIO73

CLKRUN#

INTE#/GPIO33 INTF#/GPIO34

INTG#/GPIO35

CLOCK GENERATOR

INTH#/GPIO36

LFRAME#

LDRQ1#/GNT5#/GPIO68

BMREQ#/REQ5#/GPIO65

INTRUDER_ALERT#

2007/08/02 2008/08/02

CPU

C

LPC

RTC

PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4

PCIRST#

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8

AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#

PAR

STOP# PERR# SERR# REQ0# REQ1# REQ2#

GNT0# GNT1# GNT2#

LOCK#

LPCCLK0 LPCCLK1

LAD0 LAD1 LAD2 LAD3

LDRQ0#

SERIRQ

RTCCLK

VBAT

P4 P3 P1 P2 T4 T3

N1

U2 P7 V4 T1 V3 U1 V1 V2 T2 W1 T9 R6 R7 R5 U8 U5 Y7 W8 V9 Y8 AA8 Y4 Y3

PCI_AD23

Y2

PCI_AD24

AA2

PCI_AD25

AB4

PCI_AD26

AA1

PCI_AD27

AB3

PCI_AD28

AB2 AC1 AC2 AD1 W2 U7 AA7 Y1 AA6 W5 AA5 Y5 U6 W6 W4 V7 AC3 AD4 AB7 AE6 AB6 AD2 AE4 AD5 AC6 AE5 AD6 V5

AD3 AC4 AE2 AE3

G22 E22 H24 H23 J25 J24 H25 H22 AB8 AD7 V15

C3 C2 B2

+SB_VBAT

Compal Secret Data

PCI_AD23 30 PCI_AD24 30 PCI_AD25 30 PCI_AD26 30 PCI_AD27 30 PCI_AD28 30

PCI_SERR# 41

T15PAD T15PAD

T16PAD T16PAD T17PAD T17PAD

R967 0_0402_5%R967 0_0402_5%

08/29 new add

LPC_AD0 40,41 LPC_AD1 40,41 LPC_AD2 40,41 LPC_AD3 40,41 LPC_FRAME# 40,41

LPC_DRQ1# 40

SIRQ 40,41

RTC_CLK 30

+SB_VBAT

1

C509

C510

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

Deciphered Date

1U_0402_6.3V4Z

12

R308 22_0402_5%R308 22_0402_5% R309 22_0402_5%R309 22_0402_5% R310 22_0402_5%@R310 22_0402_5%@

ACCEL_INT 35

1 2 1 2 1 2

STRAP PIN

R316

R316 120_0402_5%

120_0402_5%

1 2

1

W=20mils

2

J1

2

D

2

1

R317

R317 120_0402_5%

120_0402_5%

1 2

JUMP_43X39@J1JUMP_43X39@

PCI_CLK2 30 PCI_CLK3 30 PCI_CLK4 30 PCI_CLK5 30

CLK_PCI_EC CLK_PCI_SIO

+RTCVCC

D42

1

DAN202U_SC70

Title

Size Document Number Rev

Custom

Date: Sheet

1 2

R303 100_0402_5%@R303 100_0402_5%@

1 2

R369 100_0402_5%@R369 100_0402_5%@

CLK_PCI_EC 30,41 CLK_PCI_SIO 30,40 CLK_PCI_SIO2 40

+3VL

+RTCBATT

2

R876

3

1 2

W=20mils

1K_0402_5%

Compal Electronics, Inc.

SB700-PCIE/PCI/ACPI/LPC/RTC

LA-4092P

W=20mils

E

C501 100P_0402_25V8K@C501 100P_0402_25V8K@

1 2

C503 100P_0402_25V8K@C503 100P_0402_25V8K@

1 2

1 2 3 4

26 53Thursday, February 21, 2008

JBATT1

1 2 GND GND

ACES_85205-02001

of

0.4

A

+3VALW

R561

R561 10K_0402_5%

10K_0402_5%

1 2

LAN_PCIE_WAKE#32,33

1 1

+3VS

1 2

R388 4.7K_0402_5%R388 4.7K_0402_5%

MINI_PCIE_WAKE#32,33

SUS_STAT#

PCIE_WAKE#

SB700 has internal PD

+3VALW

1 2

R320 2.2K_0402_5%@R320 2.2K_0402_5%@

1 2

R321 2.2K_0402_5%@R321 2.2K_0402_5%@

1 2

R322 2.2K_0402_5%@R322 2.2K_0402_5%@

EC_RSMRST#

12

R327 100K_0402_5%R327 100K_0402_5%

SI2: change from 2.2K to 100K ohm

2 2

+3VS

R328 2.2K_0402_5%R328 2.2K_0402_5%

1 2

R329 2.2K_0402_5%R329 2.2K_0402_5%

1 2

+3VALW

R331 2.2K_0402_5%R331 2.2K_0402_5%

1 2

R332 2.2K_0402_5%R332 2.2K_0402_5%

1 2

3 3

STRAP PIN

SB_TEST2 SB_TEST1

SB_TEST0

EC_RSMRST#41

SMB_CK_CLK0 SMB_CK_DAT0

SMB_CK_CLK1 SMB_CK_DAT1

HDA_BITCLK_CODEC36 HDA_BITCLK_MDC42 HDA_SDOUT_MDC42

HDA_SDOUT_CODEC36 HDA_SDIN036 HDA_SDIN142

HDA_SYNC_MDC42

HDA_SYNC_CODEC36

HDA_RST#_CODEC36 HDA_RST#_MDC42

HDARST#30,41

R333 33_0402_5%R333 33_0402_5% R334 33_0402_5%R334 33_0402_5% R335 33_0402_5%R335 33_0402_5% R336 33_0402_5%R336 33_0402_5%

R337 33_0402_5%R337 33_0402_5% R338 33_0402_5%R338 33_0402_5%

R339 33_0402_5%R339 33_0402_5% R340 33_0402_5%R340 33_0402_5%

1 2 1 2 1 2 1 2

1 2 1 2

B

demo circuit LID use RI#

SLP_S3#41 SLP_S5#41

PWRBTN_OUT#41

SB_PWRGD6,41,51 SUS_STAT#11

GATEA2041

KB_RST#41

EC_SCI#41

EC_SMI#41

H_THERMTRIP#6,41

NB_PWRGD11

PV:delete R381 & R386

EC_RSMRST#

SB_SPKR36 SMB_CK_CLK08,9,22,35 SMB_CK_DAT08,9,22,35

SMB_CK_CLK133

SMB_CK_DAT133

EC_LID_OUT#41

EXP_CPPE#33 CR_CPPE#34 LAN_DSM#32

HDA_BITCLK HDA_SDOUT

HDA_SDIN0 HDA_SDIN1

SUS_STAT# SB_TEST2 SB_TEST1 SB_TEST0

PCIE_WAKE# H_THERMTRIP#

SMB_CK_CLK0 SMB_CK_DAT0 SMB_CK_CLK1 SMB_CK_DAT1

T47PAD T47PAD

HDA_SYNC

HDARST#

T41PAD T41PAD

U15D

E1

PCI_PME#/GEVENT4#

E2

RI#/EXTEVNT0#

H7

SLP_S2/GPM9#

F5

SLP_S3#

G1

SLP_S5#

H2

PWR_BTN#

H1

PWR_GOOD

K3

SUS_STAT#

H5

TEST2

H4

TEST1

H3

TEST0

Y15

GA20IN/GEVENT0#

W15

KBRST#/GEVENT1#

K4

LPC_PME#/GEVENT3#

K24

LPC_SMI#/EXTEVNT1#

F1

S3_STATE/GEVENT5#

J2

SYS_RESET#/GPM7#

H6

WAKE#/GEVENT8#

F2

BLINK/GPM6#

J6

SMBALERT#/THRMTRIP#/GEVENT2#

W14

NB_PWRGD

D3

RSMRST#

AE18

SATA_IS0#/GPIO10

AD18

CLK_REQ3#/SATA_IS1#/GPIO6

AA19

SMARTVOLT1/SATA_IS2#/GPIO4

W17

CLK_REQ0#/SATA_IS3#/GPIO0

V17

CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39

W20

CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40

W21

SPKR/GPIO2

AA18

SCL0/GPOC0#

W18

SDA0/GPOC1#

K1

SCL1/GPOC2#

K2

SDA1/GPOC3#

AA20

DDC1_SCL/GPIO9

Y18

DDC1_SDA/GPIO8

C1

LLB#/GPIO66

Y19

SMARTVOLT2/SHUTDOWN#/GPIO5

G5

DDR3_RST#/GEVENT7#

B9

USB_OC6#/IR_TX1/GEVENT6#

B8

USB_OC5#/IR_TX0/GPM5#

A8

USB_OC4#/IR_RX0/GPM4#

A9

USB_OC3#/IR_RX1/GPM3#

E5

USB_OC2#/GPM2#

F8

USB_OC1#/GPM1#

E4

USB_OC0#/GPM0#

M1

AZ_BITCLK

M2

AZ_SDOUT

J7

AZ_SDIN0/GPIO42

J8

AZ_SDIN1/GPIO43

L8

AZ_SDIN2/GPIO44

M3

AZ_SDIN3/GPIO46

L6

AZ_SYNC

M4

AZ_RST#

L5

AZ_DOCK_RST#/GPM8#

H19

IMC_GPIO0

H20

IMC_GPIO1

H21

SPI_CS2#/IMC_GPIO2

F25

IDE_RST#/F_RST#/IMC_GPO3

D22

IMC_GPIO4

E24

IMC_GPIO5

E25

IMC_GPIO6

D23

IMC_GPIO7

218S7EALA11FG_BGA528_SB700

C

SB700

USBCLK/14M_25M_48M_OSC

ACPI / WAKE UP EVENTS

USB OC

HD AUDIO

INTEGRATED uC

Part 4 of 5

USB_RCOMP

USB_FSD13P

USB MISC

USB_FSD13N USB_FSD12P

USB_FSD12N

USB 1.1

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P

USB_HSD9N

USB_HSD8P

USB_HSD8N

USB_HSD7P

USB_HSD7N

USB_HSD6P

USB_HSD6N

USB_HSD5P

USB_HSD5N

USB_HSD4P

USB 2.0

USB_HSD4N

USB_HSD3P

USB_HSD3N

GPIO

USB_HSD2P

USB_HSD2N

USB_HSD1P

USB_HSD1N

USB_HSD0P

USB_HSD0N

IMC_GPIO8 IMC_GPIO9

IMC_PWM0/IMC_GPIO10

SCL2/IMC_GPIO11

SDA2/IMC_GPIO12

SCL3_LV/IMC_GPIO13

SDA3_LV/IMC_GPIO14

IMC_PWM1/IMC_GPIO15

IMC_PWM2/IMC_GPO16 IMC_PWM3/IMC_GPO17

IMC_GPIO18 IMC_GPIO19 IMC_GPIO20 IMC_GPIO21 IMC_GPIO22 IMC_GPIO23 IMC_GPIO24 IMC_GPIO25

IMC_GPIO26 IMC_GPIO27 IMC_GPIO28 IMC_GPIO29 IMC_GPIO30 IMC_GPIO31 IMC_GPIO32 IMC_GPIO33 IMC_GPIO34 IMC_GPIO35 IMC_GPIO36 IMC_GPIO37 IMC_GPIO38 IMC_GPIO39 IMC_GPIO40 IMC_GPIO41

D

1 2

C8

USB_RCOMP

G8

E6 E7

USB10_P12

F7

USB10_N12

E8

USB20_P11

H11

USB20_N11

J10

USB20_P10

E11

USB20_N10

F11 A11

B11

USB20_P8

C10

USB20_N8

D10

USB20_P7

G11

USB20_N7

H12

USB20_P6

E12

USB20_N6

E14

USB20_P5

C12

USB20_N5

D12

USB20_P4

B12

USB20_N4

A12

USB20_P3

G12

USB20_N3

G14

USB20_P2

H14

USB20_N2

H15

USB20_P1

A13

USB20_N1

B13

USB20_P0

B14

USB20_N0

A14 A18

B18 F21 D21 F19 E20 E21 E19 D19 E18

G20 G21 D25 D24 C25 C24 B25 C23

B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18

R311 100_0402_5%@R311 100_0402_5%@

1 2

R32311.8K_0402_1% R32311.8K_0402_1%

USB10_P12 39 USB10_N12 39

USB20_P11 33 USB20_N11 33

USB20_P10 33 USB20_N10 33

USB20_P8 33 USB20_N8 33

USB20_P7 39 USB20_N7 39

USB20_P6 39 USB20_N6 39

USB20_P5 24 USB20_N5 24

USB20_P4 39 USB20_N4 39

USB20_P3 43 USB20_N3 43

USB20_P2 39 USB20_N2 39

USB20_P1 39 USB20_N1 39

USB20_P0 39 USB20_N0 39

GPIO16 30 GPIO17 30

C617 100P_0402_25V8K@C617 100P_0402_25V8K@

1 2

CLK_48M_USB 22

Touch Screen

USB-11 New Card USB-10 MiniCard(TV tuner) USB-9 Card Reader(delete) USB-8 WLAN USB-7 Fingerprint USB-6 Bluetooth USB-5 USB Camera USB-4 Left side USB-3 Dock USB-2 Left Side USB-1 Right side USB-0 Right side

STRAP PIN STRAP PIN

E

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SB700 USB/AC97

LA-4092P

27 53Thursday, February 21, 2008

E

0.4

of

A

1 1

SATA_TXP031 SATA_TXN031

SATA_RXN0_C31 SATA_RXP0_C31

SATA_TXP131 SATA_TXN131

SATA_RXN1_C31 SATA_RXP1_C31

SATA_TXP539 SATA_TXN539

SATA_RXN5_C39 SATA_RXP5_C39

SATA_TXP431 SATA_TXN431

SATA_RXN4_C31 SATA_RXP4_C31

2 2

3 3

C512 0.01U_0402_25V7KC512 0.01U_0402_25V7K

1 2

C513 0.01U_0402_25V7KC513 0.01U_0402_25V7K

1 2

C514 0.01U_0402_25V7KC514 0.01U_0402_25V7K

1 2

C515 0.01U_0402_25V7KC515 0.01U_0402_25V7K

1 2

C520 0.01U_0402_25V7KC520 0.01U_0402_25V7K

1 2

C521 0.01U_0402_25V7KC521 0.01U_0402_25V7K

1 2

C518 0.01U_0402_25V7KC518 0.01U_0402_25V7K

1 2

C519 0.01U_0402_25V7KC519 0.01U_0402_25V7K

1 2

+1.2V_HT

L54

BLM18PG121SN1D_0603

1U_0402_6.3V4Z

+3VS

BLM18PG121SN1D_0603

12

C522

L55

1U_0402_6.3V4Z

R343 10K_0402_5%R343 10K_0402_5%

1 2

+3VS

SATA_LED#42

+PLLVDD_SATA

2

C523

C523 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

1

+XTLVDD_SATA

1

C625

0.1U_0402_16V4Z@

2

12

C524

R342 1K_0402_1%R342 1K_0402_1%

PV:Reserve for EMI

C51610P_0402_50V8J C51610P_0402_50V8J

12

Y4

25MHZ_20P

C51710P_0402_50V8J C51710P_0402_50V8J

12

R341

10M_0402_5%

SATA_X1

SATA_X2

B

SATA_STX_DRX_P0 SATA_STX_DRX_N0

SATA_STX_DRX_P1 SATA_STX_DRX_N1

SATA_STX_DRX_P5 SATA_STX_DRX_N5

SATA_STX_DRX_P4 SATA_STX_DRX_N4

T24 PADT24 PAD T25 PADT25 PAD

T26 PADT26 PAD T27 PADT27 PAD

T18 PADT18 PAD T19 PADT19 PAD

T20 PADT20 PAD T23 PADT23 PAD

SATA_CAL

12

SATA_X1 SATA_X2

U15B

AD9

SATA_TX0P

AE9

SATA_TX0N

AB10

SATA_RX0N

AC10

SATA_RX0P

AE10

SATA_TX1P

AD10

SATA_TX1N

AD11

SATA_RX1N

AE11

SATA_RX1P

AB12

SATA_TX2P

AC12

SATA_TX2N

AE12

SATA_RX2N

AD12

SATA_RX2P

AD13

SATA_TX3P

AE13

SATA_TX3N

AB14

SATA_RX3N

AC14

SATA_RX3P

AE14

SATA_TX4P

AD14

SATA_TX4N

AD15

SATA_RX4N

AE15

SATA_RX4P

AB16

SATA_TX5P

AC16

SATA_TX5N

AE16

SATA_RX5N

AD16

SATA_RX5P

V12

SATA_CAL

Y12

SATA_X1

AA12

SATA_X2

W11

SATA_ACT#/GPIO67

AA11

PLLVDD_SATA

W12

XTLVDD_SATA

218S7EALA11FG_BGA528_SB700

SB700

Part 2 of 5

SATA PWR SERIAL ATA

HW MONITOR

C

IDE_IORDY

IDE_IRQ

IDE_A0 IDE_A1 IDE_A2

IDE_DACK#

IDE_DRQ IDE_IOR#

IDE_IOW#

IDE_CS1# IDE_CS3#

IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23

ATA 66/100/133

IDE_D9/GPIO24 IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30

SPI_DI/GPIO12

SPI_DO/GPIO11 SPI_CLK/GPIO47

SPI_HOLD#/GPIO31

SPI_CS1#/GPIO32

LAN_RST#/GPIO13

SPI ROM

ROM_RST#/GPIO14

FANOUT0/GPIO3

FANOUT1/GPIO48 FANOUT2/GPIO49

FANIN0/GPIO50

FANIN1/GPIO51

FANIN2/GPIO52

TEMP_COMM TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63

TEMPIN3/TALERT#/GPIO64

VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55 VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60

AVDD AVSS

AA24 AA25 Y22 AB23 Y23 AB24 AD25 AC25 AC24 Y25 Y24

AD24 AD23 AE22 AC22 AD21 AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23

G6 D2 D1 F4 F3

U15 J1

M8 M5 M7

P5 P8 R8

C6 B6 A6 A5 B5

A4 B4 C4 D4 D5 D6 A7 B7

F6 G7

C525

0.1U_0402_16V4Z

+SB_AVDD

1

2

BLM18PG121SN1D_0603

1

C526

2.2U_0603_6.3V4Z

2

CR_WAKE# 34

LAN_ISOLATE# 32

GSENSOR_LED# 42 SB_INT_FLASH_SEL 40

XMIT_OFF# 33 BT_COMBO_EN# 33

EC_THERM# 41

BT_OFF 39 CAM_SHDN# 24

L56

+3VALW

12

D

CH751H-40PT_SOD323-2

2 1

D41

1 2

R562 150K_0402_5%

AC_IN 41,46

+3VALW

PV:Add D41 and R562

E

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet of

Compal Electronics, Inc.

SB700 SATA/IDE/SPI

LA-4092P

28 53Thursday, February 21, 2008

E

0.4

of

A

+3VS

1 1

C528 22U_0805_6.3V6MC528 22U_0805_6.3V6M C531 1U_0402_6.3V4ZC531 1U_0402_6.3V4Z C530 1U_0402_6.3V4ZC530 1U_0402_6.3V4Z C533 1U_0402_6.3V4ZC533 1U_0402_6.3V4Z C536 1U_0402_6.3V4ZC536 1U_0402_6.3V4Z C535 1U_0402_6.3V4ZC535 1U_0402_6.3V4Z C539 0.1U_0402_16V4ZC539 0.1U_0402_16V4Z C541 0.1U_0402_16V4ZC541 0.1U_0402_16V4Z C542 0.1U_0402_16V4ZC542 0.1U_0402_16V4Z

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

12

No IDE device unmount CAP

+3VS

C543 22U_0805_6.3V6M@C543 22U_0805_6.3V6M@ C544 1U_0402_6.3V4Z@C544 1U_0402_6.3V4Z@ C547 1U_0402_6.3V4Z@C547 1U_0402_6.3V4Z@ C549 1U_0402_6.3V4Z@C549 1U_0402_6.3V4Z@

+1.2V_HT

2 2

+1.2V_HT

+3VALW

3 3

12

1 2 1 2 1 2

L61

12

0_0805_5%

12

C552 4.7U_0805_10V6KC552 4.7U_0805_10V6K C553 1U_0402_6.3V4Z@C553 1U_0402_6.3V4Z@

1 2

C555 1U_0402_6.3V4ZC555 1U_0402_6.3V4Z

1 2

C554 1U_0402_6.3V4ZC554 1U_0402_6.3V4Z

1 2

C558 1U_0402_6.3V4ZC558 1U_0402_6.3V4Z

1 2

C557 0.1U_0402_16V4ZC557 0.1U_0402_16V4Z

1 2

C560 0.1U_0402_16V4ZC560 0.1U_0402_16V4Z

1 2

L63

12

0_0805_5%

12

C566 22U_0805_6.3V6MC566 22U_0805_6.3V6M

C567 1U_0402_6.3V4ZC567 1U_0402_6.3V4Z

1 2

C568 1U_0402_6.3V4ZC568 1U_0402_6.3V4Z

1 2

C571 0.1U_0402_16V4ZC571 0.1U_0402_16V4Z

1 2

C572 0.1U_0402_16V4ZC572 0.1U_0402_16V4Z

1 2

L66

12

0_0805_5%

C576 10U_0805_10V4ZC576 10U_0805_10V4Z

1 2

C577 10U_0805_10V4ZC577 10U_0805_10V4Z

1 2

C580 1U_0402_6.3V4ZC580 1U_0402_6.3V4Z

1 2

C581 1U_0402_6.3V4ZC581 1U_0402_6.3V4Z

1 2

C583 0.1U_0402_16V4ZC583 0.1U_0402_16V4Z

1 2

C582 0.1U_0402_16V4ZC582 0.1U_0402_16V4Z

1 2

C584 0.1U_0402_16V4ZC584 0.1U_0402_16V4Z

1 2

+PCIE_VDDR

+1.2V_SATA

+AVDD_USB

B

U15C

L9

VDDQ_1

M9

VDDQ_2

T15

VDDQ_3

U9

VDDQ_4

U16

VDDQ_5

U17

VDDQ_6

V8

VDDQ_7

W7

VDDQ_8

Y6

VDDQ_9

AA4

VDDQ_10

AB5

VDDQ_11

AB21

VDDQ_12

Y20

VDD33_18_1

AA21

VDD33_18_2

AA22

VDD33_18_3

AE25

VDD33_18_4

P18

PCIE_VDDR_1

P19

PCIE_VDDR_2

P20

PCIE_VDDR_3

P21

PCIE_VDDR_4

R22

PCIE_VDDR_5

R24

PCIE_VDDR_6

R25

PCIE_VDDR_7

AA14

AVDD_SATA_1

AB18

AVDD_SATA_4

AA15

AVDD_SATA_2

AA17

AVDD_SATA_3

AC18

AVDD_SATA_5

AD17

AVDD_SATA_6

AE17

AVDD_SATA_7

A16

AVDDTX_0

B16

AVDDTX_1

C16

AVDDTX_2

D16

AVDDTX_3

D17

AVDDTX_4

E17

AVDDTX_5

F15

AVDDRX_0

F17

AVDDRX_1

F18

AVDDRX_2

G15

AVDDRX_3

G17

AVDDRX_4

G18

AVDDRX_5

218S7EALA11FG_BGA528_SB700

SB700

Part 3 of 5

PCI/GPIO I/O

IDE/FLSH I/O

POWER

A-LINK I/O

3.3V_S5 I/OCORE S5

SATA I/O

USB_PHY_1.2V_1 USB_PHY_1.2V_2

PLL CLKGEN I/O

USB I/O

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8

CORE S0

VDD_9

CKVDD_1.2V_1 CKVDD_1.2V_2 CKVDD_1.2V_3 CKVDD_1.2V_4

S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6 S5_3.3V_7

S5_1.2V_1 S5_1.2V_2

V5_VREF AVDDCK_3.3V AVDDCK_1.2V

AVDDC

L15 M12 M14 N13 P12 P14 R11 R15 T16

L21 L22 L24 L25

A17 A24 B17 J4 J5 L1 L2

G2 G4

A10 B10

AE7 J16 K17 E9

+1.2V_HT_R

+S5_3V

+S5_1.2V

+1.2_USB

+V5_VREF +AVDDCK_3.3V +AVDDCK_1.2V +AVDDC

C

+1.2V_CKVDD

1 2

R564 0_0805_5%R564 0_0805_5%

L65 0_0603_5%L65 0_0603_5%

0.1U_0402_16V4Z

1 2

R592 0_0805_5%@R592 0_0805_5%@

1 2

R593 0_0805_5%R593 0_0805_5%

1 2

C52910U_0805_6.3V6M C52910U_0805_6.3V6M

C5321U_0402_6.3V4Z C5321U_0402_6.3V4Z

12

C5341U_0402_6.3V4Z C5341U_0402_6.3V4Z

12

C5381U_0402_6.3V4Z C5381U_0402_6.3V4Z

12

C5371U_0402_6.3V4Z C5371U_0402_6.3V4Z

12

C5270.1U_0402_16V4Z C5270.1U_0402_16V4Z

12

C5400.1U_0402_16V4Z C5400.1U_0402_16V4Z

12

L60

12

0_0603_5%

C546 1U_0402_6.3V4ZC546 1U_0402_6.3V4Z

1 2

C545 1U_0402_6.3V4ZC545 1U_0402_6.3V4Z

1 2

C548 0.1U_0402_16V4ZC548 0.1U_0402_16V4Z

12

C551 0.1U_0402_16V4ZC551 0.1U_0402_16V4Z

12

C550 10U_0805_10V4ZC550 10U_0805_10V4Z

1 2

+3VALW

1 2

C55622U_0805_6.3V6M C55622U_0805_6.3V6M

C5591U_0402_6.3V4Z C5591U_0402_6.3V4Z

12

C5611U_0402_6.3V4Z C5611U_0402_6.3V4Z

12

C5621U_0402_6.3V4Z C5621U_0402_6.3V4Z

12

C5630.1U_0402_16V4Z C5630.1U_0402_16V4Z

12

C5640.1U_0402_16V4Z C5640.1U_0402_16V4Z

12

C5650.1U_0402_16V4Z C5650.1U_0402_16V4Z

12

+1.2VALW

1 2

C57310U_0805_10V4Z C57310U_0805_10V4Z

C5741U_0402_6.3V4Z C5741U_0402_6.3V4Z

12

C5751U_0402_6.3V4Z C5751U_0402_6.3V4Z

12

2

C579

1

L67

0_0603_5%

C579

1U_0603_10V4Z

1

12

12 12

C578

+1.2VALW +1.2V_HT

+1.2V_HT

L64 0_0603_5%L64 0_0603_5%

D14

CH751H-40PT_SOD323-2

+3VALW

C5852.2U_0603_6.3V4Z C5852.2U_0603_6.3V4Z C5860.1U_0402_16V4Z C5860.1U_0402_16V4Z

D

U15E

SB700

T10

AVSS_SATA_1

U10

AVSS_SATA_2

U11

AVSS_SATA_3

U12

AVSS_SATA_4

V11

AVSS_SATA_5

V14

AVSS_SATA_6

W9

AVSS_SATA_7

Y9

AVSS_SATA_8

Y11

AVSS_SATA_9

Y14

AVSS_SATA_10

Y17

AVSS_SATA_11

AA9

AVSS_SATA_12

AB9

AVSS_SATA_13

AB11

AVSS_SATA_14

AB13

AVSS_SATA_15

AB15

AVSS_SATA_16

AB17

AVSS_SATA_17

AC8

AVSS_SATA_18

AD8

AVSS_SATA_19

AE8

AVSS_SATA_20

A15

AVSS_USB_1

B15

AVSS_USB_2

C14

AVSS_USB_3

D8

AVSS_USB_4

D9

AVSS_USB_5

D11

AVSS_USB_6

D13

AVSS_USB_7

D14

AVSS_USB_8

D15

AVSS_USB_9

E15

AVSS_USB_10

F12

AVSS_USB_11

F14

AVSS_USB_12

G9

AVSS_USB_13

H9

+1.2VALW

C5691U_0402_6.3V4Z C5691U_0402_6.3V4Z

12

C5701U_0402_6.3V4Z C5701U_0402_6.3V4Z

12

R3461K_0402_5% R3461K_0402_5%

12

+5VS

21

+3VS

AVSS_USB_14

H17

AVSS_USB_15

J9

AVSS_USB_16

J11

AVSS_USB_17

J12

AVSS_USB_18

J14

AVSS_USB_19

J15

AVSS_USB_20

K10

AVSS_USB_21

K12

AVSS_USB_22

K14

AVSS_USB_23

K15

AVSS_USB_24

H18

PCIE_CK_VSS_1

J17

PCIE_CK_VSS_2

J22

PCIE_CK_VSS_3

K25

PCIE_CK_VSS_4

M16

PCIE_CK_VSS_5

M17

PCIE_CK_VSS_6

M21

PCIE_CK_VSS_7

P16

PCIE_CK_VSS_8

F9

AVSSC

Part 5 of 5

218S7EALA11FG_BGA528_SB700

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42

GROUND

VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50

PCIE_CK_VSS_9 PCIE_CK_VSS_10 PCIE_CK_VSS_11 PCIE_CK_VSS_12 PCIE_CK_VSS_13 PCIE_CK_VSS_14 PCIE_CK_VSS_15 PCIE_CK_VSS_16 PCIE_CK_VSS_17 PCIE_CK_VSS_18 PCIE_CK_VSS_19 PCIE_CK_VSS_20 PCIE_CK_VSS_21

AVSSCK

A2 A25 B1 D7 F20 G19 H8 K9 K11 K16 L4 L7 L10 L11 L12 L14 L16 M6 M10 M11 M13 M15 N4 N12 N14 P6 P9 P10 P11 P13 P15 R1 R2 R4 R9 R10 R12 R14 T11 T12 T14 U4 U14 V6 Y21 AB1 AB19 AB25 AE1 AE24

P23 R16 R19 T17 U18 U20 V18 V20 V21 W19 W22 W24 W25

L17

E

L68

+AVDDCK_1.2V

+AVDDCK_3.3V

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

L68

12

0_0603_5%

L69

0_0603_5%

2007/08/02 2008/08/02

+1.2V_HT

C5872.2U_0603_6.3V4Z C5872.2U_0603_6.3V4Z

12

C5880.1U_0402_16V4Z C5880.1U_0402_16V4Z

12

+3VS

C5892.2U_0603_6.3V4Z C5892.2U_0603_6.3V4Z

12

C5900.1U_0402_16V4Z C5900.1U_0402_16V4Z

12

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

LA-4092P

29 53Thursday, February 21, 2008

E

of

0.4

A

B

C

D

E

REQUIRED STRAPS

PCI_CLK2

PULL

1 1

2 2

HIGH

PULL LOW

PCI_CLK226 PCI_CLK326 PCI_CLK426

PCI_CLK526 CLK_PCI_EC26,41 CLK_PCI_SIO26,40

RTC_CLK26 HDARST#27,41

GPIO1727

GPIO1627

BOOTFAIL TIMER ENABLED

BOOTFAIL TIMER DISABLED

DEFAULT

R347

@

R357

PCI_CLK3

USE DEBUG STRAPS

IGNORE DEBUG STRAPS

DEFAULT

+3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW

12

R348

10K_0402_5%

R348

@

12

R358

12

10K_0402_5%

12

10K_0402_5%

PCI_CLK4 PCI_CLK5

RESERVED

R349

@

R359

@

12

10K_0402_5%

12

10K_0402_5%

RESERVED

NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK

R350

10K_0402_5%

@

R360

10K_0402_5%

@

12

LPC_CLK0

ENABLE PCI MEM BOOT

DISABLE PCI MEM BOOT

DEFAULT

12

R351

10K_0402_5%

@

12

R361

10K_0402_5%

LPC_CLK1

CLKGEN ENABLED

CLKGEN DISABLED

DEFAULT

R352

10K_0402_5%

@

R362

10K_0402_5%

RTC_CLK

INTERNAL RTC

DEFAULT

EXT. RTC

(PD on X1, apply 32KHz to RTC_CLK)

R353

10K_0402_5%

@

R363

2.2K_0402_5%

@

12

AZ_RST_CD#

EC ENABLED

EC DISABLED

DEFAULT

12

R354

10K_0402_5%

@

12

R364

10K_0402_5%

GP17

GP16

Internal pull up

H,H = Reserved

H,L = SPI ROM

L,H = LPC ROM (Default)

L,L = FWH ROM

12

R356

R355

10K_0402_5%

2.2K_0402_5%

@

SI2: mount 2.2K ohm

12

R366

R365

2.2K_0402_5%

@

DEBUG STRAPS

SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]

12

2.2K_0402_5%

PCI_AD27 PCI_AD26

USE PCI PLL

DEFAULT

BYPASS PCI PLL

R374

@

USE ACPI BCLK

DEFAULT

BYPASS ACPI BCLK

12

R375

2.2K_0402_5%

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCI_AD28

PULL

3 3

PCI_AD2826 PCI_AD2726 PCI_AD2626 PCI_AD2526 PCI_AD2426 PCI_AD2326

4 4

A

HIGH

PULL LOW

B

USE LONG RESET

DEFAULT

USE SHORT RESET

R373

@

12

2.2K_0402_5%

C

PCI_AD25 PCI_AD24

USE IDE PLL

DEFAULT

BYPASS IDE PLL

R376

@

USE DEFAULT PCIE STRAPS

DEFAULT

USE EEPROM PCIE STRAPS

12

R377

2.2K_0402_5%

@

2007/08/02 2008/08/02

12

2.2K_0402_5%

PCI_AD23

RESERVED

12

R378

2.2K_0402_5%

@

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SB700 STRAPS

LA-4092P

30 53Thursday, February 21, 2008

E

0.4

of

A

B

C

D

E

HDD Connector

JP9

CONN@

JP9

GND

GND GND GND

GND

Reserved

GND

JP10

GND

GND GND GND

GND

Reserved

GND

1 2

A+

3

AB-

B+

V33 V33 V33

V5 V5 V5

V12 V12 V12

A+

AB-

B+

V33 V33 V33

V5 V5 V5

V12 V12 V12

0.01U_0402_16V7K

4

SATA_RXN0 SATA_RXN0_C

5 6

0.01U_0402_16V7K

7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

1 2 3 4 5 6 7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

Near CONN side.

+3VS

+5VS

0.01U_0402_16V7K

SATA_RXN1 SATA_RXN1_C SATA_RXP1 SATA_RXP1_C

0.01U_0402_16V7K

Near CONN side.

+3VS

+5VS

SATA_TXP0 SATA_TXN0

C592

12

SATA_RXP0_CSATA_RXP0

C596

12

SATA_TXP1 SATA_TXN1

C605

12

C606

12

SATA_TXP0 28

SATA_TXN0 28

SATA_RXN0_C 28 SATA_RXP0_C 28

SATA_TXP1 28

SATA_TXN1 28

SATA_RXN1_C 28 SATA_RXP1_C 28

+5VS

1

2

0.1U_0402_16V4Z

1

C594

2

1 1

C593

10U_0805_10V4Z

1

C591

2

0.1U_0402_16V4Z

1

C595

2

0.1U_0402_16V4Z

Pleace near HD CONN (JP23)

SUYIN_127072FR022G210ZR_RV

2 2

+5VS

1

C601

10U_0805_10V4Z

1

2

0.1U_0402_16V4Z

1

C602

C603

2

C603

2

0.1U_0402_16V4Z

2nd HDD Connector-option

1

C604

2

0.1U_0402_16V4Z

Pleace near HD CONN (JP23)

SUYIN_127072FR022G210ZR_RV

3 3

SUYIN_127072FR022G210ZR_RV

CD-ROM Connector

JP11

+5VS

Placea caps. near ODD CONN.

0.1U_0402_16V4Z

C613

1

C614

2

4 4

A

10U_0805_10V4Z

1U_0603_10V4Z

1

2

C615

1

C616

C616 10U_0805_10V4Z

2

10U_0805_10V4Z

2

JP11

1

GND

2

A+

3

A-

GND

B-

B+

GND

DP V5 V5

GND GND

CONN@

GND GND

MD

B

15 14

SUYIN_127382FR013G509ZR

SI: Update ODD footprint to fix pin reverse issue

0.01U_0402_16V7K

4

SATA_RXN4 SATA_RXN4_C

5 6

0.01U_0402_16V7K

7

8 9 10 11 12 13

Near CONN side.

+5VS

C612

12

C611

12

SATA_TXP4 SATA_TXN4

SATA_RXP4_CSATA_RXP4

SATA_TXP4 28

SATA_TXN4 28

SATA_RXN4_C 28

SATA_RXP4_C 28

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

HDD/CDROM

LA-4092P

31 53Thursday, February 21, 2008

E

of

0.4

A

Place Close to Chip

0.1U_0402_16V7K

C485

R398

1K_0402_1%

PCIE_ITX_C_PRX_P310

PCIE_ITX_C_PRX_N310

LAN_PCIE_WAKE#27,33

+3VS

12

C485 C488

C488

CLKREQ_LAN22 CLK_PCIE_LAN22

CLK_PCIE_LAN#22

PLT_RST#11,14,15,26,33,34,40,41

12

R384

1K_0402_1%@

ISOLATE#

R401

R401 15K_0402_5%

15K_0402_5%

+LAN_VDD12

0.1U_0402_16V7K

R408 2.49K_0402_1%R408 2.49K_0402_1%

PCIE_PTX_C_IRX_P310 PCIE_PTX_C_IRX_N310

1 1

LAN_ISOLATE#28

2 2

12 12

+3V_LAN

1 2

PCIE_PTX_IRX_P3 PCIE_PTX_IRX_N3

+CTRL_18

ISOLATE#

LAN_X1 LAN_X2

U18

29

HSOP

30

HSON

23

HSIP

24

HSIN

33

CLKREQB

26

REFCLK_P

27

REFCLK_N

20

PERSTB

1

SROUT12

5

FB12

62

ENSR

64

RSET

19

LANWAKEB

36

ISOLATEB

60

CKTAL1

61

CKTAL2

65

EXPOSE_PAD

25

EGND

31

EGND

15

NC

17

NC

18

NC

34

NC

35

NC

39

NC

40

NC

41

NC

42

NC

RTL8111C-GR_QFN64_9X9

EEDO

EEDI/AUX

EESK EECS

LED3 LED2 LED1 LED0

MDIP0

MDIN0

MDIP1

MDIN1

MDIP2

MDIN2

MDIP3

MDIN3

DVDD12 DVDD12 DVDD12 DVDD12 DVDD12 DVDD12

EVDD12 EVDD12

VDD33 VDD33 VDD33 VDD33

VDDSR

AVDD33 AVDD33

AVDD12 AVDD12 AVDD12 AVDD12

IGPIO

OGPIO

B

LAN_DO

45

LAN_DI

47

LAN_SK

48 44

54 55 56 57

3 4 6 7 9 10 12 13

21 32 38 43 49 52

22 28

16 37 46 53

63 2

59 8

11 14 58

50 51

LAN_LINK# LAN_ACTIVITY#

LAN_MDI0+ LAN_MDI0LAN_MDI1+ LAN_MDI1LAN_MDI2+ LAN_MDI2LAN_MDI3+ LAN_MDI3-

DSM#

LAN_CS

+LAN_VDD12

+LAN_EVDD12

+3V_LAN

+AVDD33

+LAN_VDD12

+CTRL_18

+3V_LAN

L75

L75 0_0603_5%

0_0603_5%

C635 0.1U_0402_16V4ZC635 0.1U_0402_16V4Z

C634 10U_0805_10V4ZC634 10U_0805_10V4Z

T30PAD T30PAD

12

R3990_0402_5% R3990_0402_5%

1 2

LAN_DO LAN_DI LAN_SK LAN_CS

4.7uH choke

4.7UH_1008HC-472EJFS-A_5%_1008

4.7UH_1008HC-472EJFS-A_5%_1008 L71

L71

1 2

C626

22U_0805_6.3V6M

Close to Pin1

12

LAN_DSM# 27

1

2

C

1 2

R382 3.6K_0402_5%R382 3.6K_0402_5%

U17

4

DO

GND

3

DI

NC

2

SK

NC

1

CS

VCC

AT93C46-10SI-2.7_SO8

C627

0.1U_0402_16V4Z

2

1

5 6 7 8

+LAN_VDD12

+3V_LAN

2

C618

1

0.1U_0402_16V4Z

L72

2

C636

0.1U_0402_16V4Z

1

2

C644

0.1U_0402_16V4Z

1

+AVDD33

0.1U_0402_16V4Z

+3V_LAN

Bead for 8111

00m

A

0_0603_5%

2

C650

1

C3

2

C632

0.1U_0402_16V4Z

1

2

C637

0.1U_0402_16V4Z

1

2

C645

0.1U_0402_16V4Z

1

2

C651

0.1U_0402_16V4Z

1

D

Close to Pin16,37,46,53

2

C620

0.1U_0402_16V4Z

1

+LAN_EVDD12

2

C633

0.1U_0402_16V4Z

1

2

C638

0.1U_0402_16V4Z

1

2

C646

0.1U_0402_16V4Z

1

0_0603_5%

+3V_LAN

L74

2

C621

0.1U_0402_16V4Z

1

2

C639

0.1U_0402_16V4Z

1

2

C647

0.1U_0402_16V4Z

1

2

C622

0.1U_0402_16V4Z

1

2

C640

0.1U_0402_16V4Z

1

2

C648

0.1U_0402_16V4Z

1

+3V_LAN

2

1

+LAN_VDD12

2

1

C623

0.1U_0402_16V4Z

C641

0.1U_0402_16V4Z

E

Close to Pin2 & pin59

Y1

LAN_X2LAN_X1

12

25MHZ_20PY125MHZ_20P

1

C182

27P_0402_50V8J

2

3 3

1

C181

C181 27P_0402_50V8J

27P_0402_50V8J

2

PJP6

2

C707

1

0.1U_0402_16V4Z

1 2

PAD-OPEN 4x4m

S

D

13

G

2

Q61

Q61 SI2301BDS-T1-E3_SOT23-3

SI2301BDS-T1-E3_SOT23-3

40 mils

+3V_LAN

+3VALW

R713

@

100K_0402_5%

LANPWR41

1 2

R715 10K_0402_5%R715 10K_0402_5%

1 2

LAN Conn.

JP12

U19

1

LAN_MDI3LAN_MDI3+

LAN_MDI2LAN_MDI2+

LAN_MDI1LAN_MDI1+

LAN_MDI0LAN_MDI0+

1

C660

C659

0.01U_0402_16V7K

4 4

0.01U_0402_16V7K

A

0.01U_0402_16V7K

2

1

C663

0.01U_0402_16V7K

Place these components colsed to LAN chip

2

1

2

3

4

5

7

8

9

10 11 12

C664

0.01U_0402_16V7K

TCT1 TD1+ TD1-

TCT2 TD2+ TD2-6MX2-

TCT3 TD3+ TD3-

TCT4 TD4+ TD4-

NS892402

MCT1

MX1+

MCT2

MX2+

MCT3

MX3+

MCT4

MX4+

MX1-

MX3-

MX4-

C600 0.01U_0603_100V4ZC600 0.01U_0603_100V4Z

24

12 23 22

C607 0.01U_0603_100V4ZC607 0.01U_0603_100V4Z

21

12 20 19

C610 0.01U_0603_100V4ZC610 0.01U_0603_100V4Z

18

12 17 16

C619 0.01U_0603_100V4ZC619 0.01U_0603_100V4Z

15

12 14 13

B

R392 75_0402_1%R392 75_0402_1%

1 2

R393 75_0402_1%R393 75_0402_1%

1 2

R394 75_0402_1%R394 75_0402_1%

1 2

R396 75_0402_1%R396 75_0402_1%

1 2

RJ45_GND

RJ45_MIDI3RJ45_MIDI3+

RJ45_MIDI2RJ45_MIDI2+

RJ45_MIDI1RJ45_MIDI1+

RJ45_MIDI0RJ45_MIDI0+

1

C658

C658 1000P_1808_3KV7K

1000P_1808_3KV7K

2

RJ45_MIDI3- 43 RJ45_MIDI3+ 43

RJ45_MIDI2- 43 RJ45_MIDI2+ 43

RJ45_MIDI1- 43 RJ45_MIDI1+ 43

RJ45_MIDI0- 43 RJ45_MIDI0+ 43

C

PV:Add ESD diode for EMI request

LAN_ACTIVITY#

LAN_LINK#

2

3

D39

D39 PSOT24C_SOT23-3

PSOT24C_SOT23-3

@

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

LAN_ACTIVITY#

LAN_LINK#

D

+3V_LAN

R391 300_0402_5%R391 300_0402_5%

1

C656

C656 68P_0402_50V8K

68P_0402_50V8K

@

2

C657

C657 68P_0402_50V8K

68P_0402_50V8K

@

1

R395 300_0402_5%R395 300_0402_5%

12

+3V_LAN

12

Title

Size Document Number Rev

C

Date: Sheet

13

Yellow LED+

14

RJ45_MIDI3-

RJ45_MIDI3+

RJ45_MIDI1RJ45_MIDI2-

RJ45_MIDI2+

RJ45_MIDI1+ RJ45_MIDI0RJ45_MIDI0+

Yellow LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

11

Green LED+

12

Green LED-

FOX_JM36113-P1122-7F

1

C661

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

RTL8111C/8102E 10/100/1000 LAN

LA-4092P

SHLD1

DETECT PIN1

DETCET PIN2

SHLD1

1

C662

4.7U_0805_10V4Z

2

E

16 9

10 15

LANGND

0.4

32 53Thursday, February 21, 2008

0.4

of

A

1 1

New Card

+3VS

0.1U_0402_16V4Z

PLT_RST#

12

EXP_CPPE#

+1.5VS

100K_0402_5%@

C681

0.1U_0402_16V4Z

12

C679

0.1U_0402_16V4Z

12

C680

+3VALW

PLT_RST#11,14,15,26,32,34,40,41

SYSON41,44,48 SUSP#36,41,44,46,49,52

+3VALW

R412

EXP_CPPE#27

2 2

Power Switch internal pull high

R412

U21

12

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

THERMAL_PAD

18

RCLKEN

R5538D001-TR-F_QFN20_4X4~D

USE TI TPS2231MRGPR

1.5Vout

3.3Vout

OC#

PERST#

GND

B

11 13

3 5

15 19 8 16

NC

7

21

+1.5VS_PEC

+3VS_PEC

+3V_PEC

PERST#

C

+3VS_TV

0.1U_0402_16V4Z

1

C665

2

4.7U_0805_10V4Z

SI: Exchange TV & WLAN minicard location

CLKREQ_MCARD1#22

CLK_PCIE_MCARD1#22 CLK_PCIE_MCARD122

PCIE_PTX_C_IRX_N510 PCIE_PTX_C_IRX_P510

PCIE_ITX_C_PRX_N510 PCIE_ITX_C_PRX_P510

+3VS_TV

D

Mini Card---TV tuner

SI2: chagne power plan from +3VALW to +3VS_TV

+3VS_TV

1

C667

C666

R406 0_1206_5%R406 0_1206_5%

+1.5VS

R407 0_1206_5%R407 0_1206_5%

+3VS

CONN@

JP14

112 334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

GND153GND2

MOLEX 67910-0002 52P

1 2 1 2

C667

2

0.1U_0402_16V4Z

@

2 4 6 8 10 12 14 16

SI2: chagne power plan from +3VALW to +3VS_TV

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

0.01U_0402_16V7K

+3VS_TV +1.5VS_TV

PLT_RST#

+3VS_TV

SMB_CK_CLK1 SMB_CK_DAT1

+1.5VS_TV +3VS_TV

1

C668

2

0.1U_0402_16V4Z

E

+1.5VS_TV

4.7U_0805_10V4Z

1

C669

2

+1.5VS_TV

USB20_N10 27 USB20_P10 27

1

C670

2

Mini-Express Card---WLAN

+3VS_WLAN +3VALW+1.5VS_WLAN

4.7U_0805_10V4Z

0.01U_0402_16V7K

Near to Express Card slot.

+3VS_PEC

4.7U_0805_10V4Z

29 30

C677

C683

B

4.7U_0805_10V4Z

1

2

0.1U_0402_16V4Z

+1.5VS_PEC

4.7U_0805_10V4Z

1

2

0.1U_0402_16V4Z

C684

C678

C682

+3V_PEC

1

2

1

2

4.7U_0805_10V4Z

1

C685

2

0.1U_0402_16V4Z

BT_COMBO_EN#28

1

2

1 2

R547 0_0402_5%R547 0_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

JP16

1

GND

3 3

4 4

USB20_N1127

USB20_P1127

SMB_CK_CLK127

SMB_CK_DAT127

+1.5VS_PEC

MINI_PCIE_WAKE#27,32

CLKREQ_NCARD#22

CLK_PCIE_NCARD#22 CLK_PCIE_NCARD22

PCIE_PTX_C_IRX_N010

PCIE_PTX_C_IRX_P010 PCIE_ITX_C_PRX_N010

PCIE_ITX_C_PRX_P010

+1.5VS_PEC

+3V_PEC +3VS_PEC

A

EXP_CPPE#

MINI_PCIE_WAKE#

PERST#

EXP_CPPE#

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND1

28

GND2

SANTA_131851-A_LT

CONN@

SHIELD SHIELD

0.01U_0402_16V7K

1

C785

2

CH_CLK

R553

4.7K_0402_5%

1 2

PCIE_PTX_C_IRX_N210 PCIE_PTX_C_IRX_P210

PCIE_ITX_C_PRX_N210 PCIE_ITX_C_PRX_P210

2007/08/02 2008/08/02

4.7U_0805_10V4Z

1

C786

2

0.1U_0402_16V4Z

MINI_PCIE_WAKE#

CH_DATA39

CH_CLK39

CLKREQ_MCARD2#22

CLK_PCIE_MCARD2#22 CLK_PCIE_MCARD222

+3VS_WLAN

Compal Secret Data

1

C787

2

R556 0_0402_5%

1 2

CH_CLK

Deciphered Date

＠

0.01U_0402_16V7K

MOLEX 67910-0002 52P

1

C781

2

CONN@

JP26

112 334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

GND153GND2

D

4.7U_0805_10V4Z

1

C782

2

0.1U_0402_16V4Z

+1.5VS_WLAN +3VS_WLAN

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

1

C783

0.1U_0402_16V4Z

2

L78 0_1206_5%L78 0_1206_5%

1 2

L79 0_1206_5%L79 0_1206_5%

1 2

PLT_RST#

+3VAUX

SMB_CK_CLK1 SMB_CK_DAT1

USB20_N8 27 USB20_P8 27

WL_LED# 42

SI: Exchange TV & WLAN minicard location

Title

Mini-Card/Mini-PCI/Express Card

Size Document Number Rev

Custom

Date: Sheet

1

C784

2

+3VS

+1.5VS

XMIT_OFF# 28

R634 0_0603_5%@R634 0_0603_5%@

1 2

R635 0_0603_5%R635 0_0603_5%

1 2

Compal Electronics, Inc.

LA-4092P

E

+3VALW +3VS

33 53Thursday, February 21, 2008

0.4

of

A

SI:Per ME request change JP21 to new one

1 1

+VCC_4IN1

10K_0402_5%

+3VS

2 2

SI:Use build in Regulator Chip mount R383,C689,C694

3 3

4 4

R4510K_0402_5% R4510K_0402_5%

XDWP#_SDWP#

1 2

XD_RB#

1 2

R106

100P_0402_25V8K@

XD_CLE

12

R40510K_0402_5% R40510K_0402_5%

XD_ALE

12

R12210K_0402_5% R12210K_0402_5%

XD_RE#

12

R86200K_0402_5% R86200K_0402_5%

+3VS

12

R126

R126 10K_0402_5%

10K_0402_5%

2

G

Q54

R383

1 2

0_0603_5%

C689

R1214.7K_0402_5% R1214.7K_0402_5%

1 2

R1114.7K_0402_5% R1114.7K_0402_5%

1 2

C895

1 3

D

2N7002_SOT23-3

2N7002_SOT23-3 0_0402_5%

0_0402_5%

1 2

R397

1

2

XDCD0#_SDCD#

XDCD1#_MSCD#

+VCC_OUT

+3VS

1

2

CR_CPPE#27

CR_WAKE#28

+VCC_OUT

10U_0805_10V4Z

+3VS

SI:Use build in Regulator Chip unmount U22 and relation parts

0.1U_0402_16V4Z@

SI:Per Jmicro request change R405 & R122 from 200K to 10K

CPPE#

S

XDCD0#_SDCD#

+VCC_4IN1

1

C694

0.1U_0402_16V4Z

2

U22

3

IN

OUT

4

EN

OUT

2

GND

G5250C2T1U_SOT23-5@

1U_0603_10V4Z@

100P_0402_25V8K@

SI2:Support D3E function

PCIE_PTX_C_IRX_N110 PCIE_PTX_C_IRX_P110

+5VS

12

21

13

D

S

SI:Use new chip ,change to High active control

+VCC_4IN1

1 5

1

C896

2

12

C901

100_0402_5%@

R370

R370 470_0402_5%

470_0402_5%

D5

D5 HT-F196BP5_WHITE

HT-F196BP5_WHITE

Q53

CR_LED#

2

G

2N7002_SOT23-3

40mil

12

@

150K_0402_5%

150K_0402_5% R123

R123

PCIE_ITX_C_PRX_N110

PCIE_ITX_C_PRX_P110

C693 0.1U_0402_16V7KC693 0.1U_0402_16V7K C697 0.1U_0402_16V7KC697 0.1U_0402_16V7K

SI:Per Jmicro request change R114 from 10K to 8.2K

reserved power circuit

A

R411

CLK_PCIE_MCARD0#22 CLK_PCIE_MCARD022

1 2 1 2

R113

4.7K_0402_5%

1 2

12

B

+VCC_4IN1 +VCC_4IN1

XDCE#

1 2

C695 0.1U_0402_16V4ZC695 0.1U_0402_16V4Z

PLT_RST#11,14,15,26,32,33,40,41

24.576MHz_16P_3XG-24576-43E1

B

XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 XD_SD_D4 XD_SD_D5 XD_SD_D6 XD_SD_D7

SDCMD_MSBS_XDWE# XDWP#_SDWP# XD_ALE XD_CD# XD_RB# XD_RE# XDCE# XD_CLE

PCIE_PTX_IRX_N1 PCIE_PTX_IRX_P1

12

R1148.2K_0402_5% R1148.2K_0402_5%

XIN XOUT

+3VS

CPPE#

XDCD1#_MSCD# XDCD0#_SDCD#

+VCC_OUT

CR_LED#

C897

12

22P_0402_50V8J

X2

C898

12

22P_0402_50V8J

C

Card Reader Connector

JP21

3

XD-VCC

32

XD-D0

10

XD-D1

9

XD-D2

8

XD-D3

7

XD-D4

6

XD-D5

5

XD-D6

4

XD-D7

34

XD-WE

33

XD-WP

35

XD-ALE

40

XD-CD

39

XD-R/B

38

XD-RE

37

XD-CE

36

XD-CLE

11

7IN1 GND

31

7IN1 GND

41

7IN1 GND

42

7IN1 GND

TAITW_R015-B10-LM

CONN@

7 IN 1 CONN

SD-VCC MS-VCC

SD_CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3 SD-DAT4 SD-DAT5 SD-DAT6 SD-DAT7

SD-CMD

SD-CD-SW

SD-WP-SW

MS-SCLK MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

MS-INS

MS-BS

Power Circuit

U23

3

APCLKN

4

APCLKP

9

APRXN

8

APRXP

11

APTXN

12

APTXP

7

APREXT

38

TXIN

39

TXOUT

JMB380

30

TAV33

1

XRSTN

2

XTEST

13

SEEDAT

14

SEECLK

15

CR1_CD1N

16

CR1_CD0N

17

CR1_PCTLN

21

CR1_LEDN

JMB380-QGAZ0A_QFN48_7X7

SI2: Use B version chip

XIN

12

R134

XOUT

1M_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

APVDD

APV18

DV33 DV33 DV33 DV18 DV18

MDIO0 MDIO1 MDIO2 MDIO3 MDIO4 MDIO5 MDIO6 MDIO7 MDIO8

MDIO9 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14

TPA1P

TPBIAS_1

TREXT

APGND

TCPS TPB1N TPB1P TPA1N

GND

C

5 10

19 20 44 18 37

48 47 46 45 43 42 41 40 29 28 27 26 25 23 22

34 35 36

6 24

31 32 33

49

D

21 28

SDCLK

20

XD_SD_MS_D0

14

XD_SD_MS_D1

12

XD_SD_MS_D2

30

XD_SD_MS_D3

29

XD_SD_D4

27

XD_SD_D5

23

XD_SD_D6

18

XD_SD_D7

16

SDCMD_MSBS_XDWE#

25

XDCD0#_SDCD#

1

XDWP#_SDWP#

2

MSCLK

26

XD_SD_MS_D0

17

XD_SD_MS_D1

15

XD_SD_MS_D2

19

XD_SD_MS_D3

24

XDCD1#_MSCD#

22

SDCMD_MSBS_XDWE#

13

+1.8VS_OUT

0.1U_0402_16V4Z

1

2

1

C688

2

1

C692

2

0.1U_0402_16V4Z

C686

0.1U_0402_16V4Z

Deciphered Date

1

C892

2

10U_0805_10V4Z

C691

0.1U_0402_16V4Z

XD_SD_MS_D0

XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 SDCMD_MSBS_XDWE# SDCLK_MSCLK_XDCE# XDWP#_SDWP# XD_CLE XD_SD_D4 XD_SD_D5 XD_SD_D6 XD_SD_D7 XD_RE# XD_RB# XD_ALE

TPA+

TPBIAS

TREXT

1 2

R124 12K_0402_1%R124 12K_0402_1%

TPBTPB+ TPA-

Compal Secret Data

2007/08/02 2008/08/02

Compal Secret Data

SDCLK

MSCLK

1000P_0402_50V7K

1

C687

C893

2

0.1U_0402_16V4Z

+3VS

1

C690

0.1U_0402_16V4Z

2

Close to Chip

C899

220P_0402_50V7K

1 2

100_0402_5%@

1 2

100_0402_5%@

1

2

+1.8VS_OUT

1

2

0.33U_0603_10V7K

D

1 2

C902

R413

R410

C902

100P_0402_25V8K@

1 2

C900

C900 100P_0402_25V8K@

100P_0402_25V8K@

R387

1 2

0_0603_5%@

R140

4.99K_0402_1%

TPBIAS

C177

+1.8VS

SI:Use build in Regulator Chip unmount R387

SDCLKSDCLK_MSCLK_XDCE#

12

MSCLK

R45722_0402_5% R45722_0402_5%

12

XDCE#

R45622_0402_5% R45622_0402_5%

12

R45522_0402_5% R45522_0402_5%

XDCD1#_MSCD# XDCD0#_SDCD#

12

1

2

R133

R133 56_0402_5%

56_0402_5%

12

R200

56_0402_5%

Title

Size Document Number Rev

Custom

Date: Sheet

E

D40

2 3

DAN202U_SC70

1

XD_CD#

1

C696

270P_0402_50V7K

2

SI:Change 1394 connector

12

R199

R199 56_0402_5%

56_0402_5%

JP19

LA-4092P

JP19

1

TPB-

2 3 4

SUYIN_020115FR004S550ZL_4P-T@

TPB+ TPATPA+

5

GND

6

GND

of

34 53Thursday, February 21, 2008

E

TPBTPB+ TPATPA+

12

R290

R290 56_0402_5%

56_0402_5%

Compal Electronics, Inc.

JMB380/385 card reader/1394

0.4

5

4

3

2

1

D D

+3VS

1

C1030

C1031

2

0.1U_0402_16V4Z

10U_0805_6.3V6M

C C

+3VS +3VS

SMB_CK_CLK08,9,22,27

B B

SMB_CK_DAT08,9,22,27

ACCELEROMETER

14

U66

SCL / SPC

Vdd_IO

SDA / SDI / SDO GND Reserved GND GND Vdd

CS

7

12

I2C address:0111000Xb

U68

5

CSB

6

SCK

8

SDI reserved

1

reserved

+3VS

1 2 3 4 5 6

R964 10K_0402_5%R964 10K_0402_5%

10

13 12

SDO

11

Reserved

10

GND

9

INT 2

8

INT 1

LIS302DLTR_LGA14_3x5

9

VDDIO

2

VDD

4

INT

7

SDO

3

GND

11

GND

12

GND

BMA150_LGA12@

SMB_CK_CLK0 8,9,22,27

Pin12(internal pull high ) pull up I2C address :0011101b pull low I2C address:0011100b

ACCEL_INT 26

SMB_CK_DAT0 8,9,22,27

ACCEL_INT 26

+3VS

1 2

C830 0.1U_0402_16V4Z@C830 0.1U_0402_16V4Z@

1

C828

C829

2

0.1U_0402_16V4Z

@

10U_0805_6.3V6M

SI: Reserve Bosch solution

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

R5C833_1394

LA-4092P

1

0.4

35 53Thursday, February 21, 2008

0.4

of

A

B

C

D

E

R885

1 2

+3VS

BLM18BD601SN1D_0603

1 1

HDA_BITCLK_CODEC27 HDA_SDOUT_CODEC27 HDA_SDIN027

2 2

3 3

PV: add bead for EMI

DMIC_CLK24

R537

EC_BEEP41 SB_SPKR27

R537 R524

R524

R523 10K_0402_5%R523 10K_0402_5%

1 2

C956 0.1U_0402_16V4ZC956 0.1U_0402_16V4Z

1 2

HDA_SYNC_CODEC27 HDA_RST#_CODEC27

L58 FBMA-L10-160808-301LMT_0603L58 FBMA-L10-160808-301LMT_0603

1 2

47K_0402_5%

1 2

47K_0402_5%

+VDDA_CODEC

SENSE_B#43

R525

47_0402_5%@

C745

33P_0402_50V8K@

+3VDD_CODEC

1

2

C734

1U_0603_10V4Z

12

C913 1U_0603_10V4ZC913 1U_0603_10V4Z

R584 5.1K_0402_1%R584 5.1K_0402_1%

1 2

R916 39.2K_0402_1%R916 39.2K_0402_1%

1 2

0.1U_0402_16V4Z

HDA_BITCLK_CODEC

12

1

2

1

2

C733

C904

0.1U_0402_16V4Z

+3VDD_CODEC

+VDDA_CODEC

+3VDD_CODEC

HDA_BITCLK_CODEC

R522 33_0402_5%R522 33_0402_5%

1 2

R230 22_0402_5%R230 22_0402_5%

1 2

C955 0.1U_0402_16V4ZC955 0.1U_0402_16V4Z

1

C979

2

10U_0805_10V4Z

10U_0805_10V4Z C744

C744

1 2

SENSEB#

+VC_REFA

+VDDA_CODEC

1

2

1U_0603_10V4Z

C731

C730

0.1U_0402_16V4Z

U27

9

DVDD_CORE*

1

DVDD_CORE

25

AVDD1*

38

AVDD2**

3

DVDD_IO

32

MONO_OUT

6

BITCLK

5

SDO

8

SDI_CODEC

10

SYNC

11

RESET#

46

DMIC_CLK

33

CAP2

12

PCBEEP

40

NC / OTP

34

SENSE_B / NC

37

NC

18

NC

19

NC

20

NC

27

VREFFILT

26

AVSS1*

42

AVSS2**

7

DVSS**

92HD71B7X5NLGXA1X8_QFN48_7X7

W=40Mil

C728

EAPD/ SPDIF OUT 0 or 1 / GPIO 0

VOL_UP/DMIC_0/GPIO 1 VOL_DN/DMIC_1/GPIO 2

GPIO 3

VREFOUT-E / GPIO 4

GPIO 5 GPIO 6

SPDIF OUT1 / GPIO 7

SPDIF OUT0

VREFOUT-B VREFOUT-C

SENSE_A

PORTA_R

PORTA_L

PORTB_R

PORTB_L

PORTC_R PORTC_L

PORTD_R PORTD_L

PORTE_R

PORTE_L

PORTF_R

PORTF_L

SI2: Use new version Codec

0212_Change to +5VALW.

1 2

0.1U_0402_16V4Z

SUSP#33,41,44,46,49,52

47 2 4 30 31 43 44 45 48

28 29

13

41 39

22 21

24 23

36 35

DOCK_MICR

15

DOCK_MICL

14

17 16

CODEC POWER

+5VALW

SPDIF_OUT

SENSEA#

HP_OUTRMONO_INR HP_OUTL

MIC_EXT_R MIC_EXT_L

MIC_IN_R MIC_IN_L

LINE_OUT_R LINE_OUT_L

C908

C908 C907

C907

C972 1U_0603_10V6KC972 1U_0603_10V6K C973 1U_0603_10V6KC973 1U_0603_10V6K

U32

1

IN

OUT

2

GND

3

SHDN

BYP

G9191-475T1U_SOT23-5

EAPD_CODEC 41

DMIC_DAT 24

SUB_ENABLE 38

SPDIF_OUT 43

SI2: change to SPDIF to pin 45

+VREFOUT_B 37

HP_OUTR 37 HP_OUTL 37

1U_0603_10V4Z

1 2 1 2

1U_0603_10V4Z

MIC_IN_R 37 MIC_IN_L 37

LINE_OUT_R 37,38

LINE_OUT_L 37,38

1 2 1 2

+VDDA_CODEC

5

4

1

C732

0.1U_0402_16V4Z

2

12

HP Jack & Dock

Internal MIC

1.21K_0402_1%

2.2U_0805_16V4Z

1

C729

2

R5485.1K_0402_1% R5485.1K_0402_1%

12

R56920K_0402_1% R56920K_0402_1%

12

R57139.2K_0402_1% R57139.2K_0402_1%

12

R57010K_0402_1%@ R57010K_0402_1%@

12

C9510.1U_0402_16V4Z C9510.1U_0402_16V4Z

MIC_EXTR 37 MIC_EXTL 37

Internal SPKR.

12

R910

(4.75V) 300mA

+VDDA_CODEC

EXTMIC_DET# 37

JACK_DET# 37,43

INTMIC_DET# 37

Jack MIC

1 2

R943 10K_0402_5%R943 10K_0402_5%

1 2

R944 10K_0402_5%R944 10K_0402_5%

12

R911

1.21K_0402_1%

1/10*Vin need close to Codec

DOCK_MIC_R 43 DOCK_MIC_L 43

DOCK MIC

C746

1 2

1000P_0402_25V8J@

SENSE A SENSE B

Port Resistor Port Resistor

A 39.2K

B 20K

4 4

C 10K

D 5.11K

A

E

F

G

H

39.2K

20K

10K

5.11K

1000P_0402_25V8J@

C747

1 2

1000P_0402_25V8J@

C748

1 2

1000P_0402_25V8J@

C749

1 2

1000P_0402_25V8J@

R195 0_1206_5%R195 0_1206_5%

1 2

R198

1 2

0_0805_5%@

GNDAGND

B

GNDA 37,38,43

HP_DET#

0(LOW)

MIC_DET

0(LOW)

NC

0(LOW)

NC NC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

D

PORT-A

LINEOUT

NC

Title

Size Document Number Rev

Custom

Date: Sheet

OFF OFF

ON ON Enable

ON ON

OFF OFF

Compal Electronics, Inc.

Audio Codec-IDT9271B7

LA-4092P

MIC

ON

OFF

ON

OFF

E

EQ

Disable Disable

Enable

of

36 53Thursday, February 21, 2008

0.4

A

B

C

D

E

PV:change cap form 100uF to 150uF

JP17

SI2:change from 12.7K to 7.5K

EC_MUTE#38,41

1 1

LINE_OUT_R36,38

LINE_OUT_L36,38

C7700.1U_0402_16V7K C7700.1U_0402_16V7K C7750.1U_0402_16V7K C7750.1U_0402_16V7K

C7760.1U_0402_16V7K C7760.1U_0402_16V7K C8170.1U_0402_16V7K C8170.1U_0402_16V7K

SI2:change from 0.047u to 0.1u

2 2

3 3

C970

C970 C971 1U_0603_10V6K@C971 1U_0603_10V6K@

+3VS

INTMIC_DET#36

4.7K_0402_5%@

1U_0603_10V6K@

1 2 1 2

R906 0_0402_5%@R906 0_0402_5%@

R956 10K_0402_5%@R956 10K_0402_5%@

2N7002_SOT23-3@

+VDDA_CODEC

MIC_IN_L36 MIC_IN_R36

ANA_MIC_DET41

4 4

EC_MUTE#

R701

1 2 1 2

SI2:change from 10u to 1u for PA PA sound issue

1 2

7.5K_0402_1%

1 2

7.5K_0402_1%

1 2

7.5K_0402_1%

1 2

7.5K_0402_1%

Keep 10 mil width

C818

1U_0603_10V4Z

R702

R703

R703 R704

R704

1

2

C765

1

2

Analog MIC

1 2

12

C743 1U_0603_10V4Z@C743 1U_0603_10V4Z@

R905

4.7K_0402_5%@

MICIN_L MICIN_R

12

2N7002_SOT23-3@

13

D

Q28

2

G

S

R904

12

U28

14

RS/D

9

LS/D

16

RIN+

17

RIN-

12

LIN+

13

LIN-

15

RBYPASS

11

LBYPASS

2

GND

5

GND

THERMAL_PAD

+3VS

R555

10K_0402_5%@

1 2

JP20

1

2

3

4

5

GND1

Q27

2

G

12

R957

R957 100K_0402_5%@

100K_0402_5%@

6

GND2

ACES_88231-04001

CONN@

13

D

S

19

RVDD

7

LVDD

SPKR+

1

ROUT+

ROUT-

LOUT+

LOUT-

SPKR-

3

SPKL+

4

SPKL-

6

20

NC

18

NC

10

NC

8

NC

21

TPA6020A2RGWR_QFN20_5x5

C766

10U_0805_10V4Z

C767

R594

1 2

10U_0805_10V4Z

+5VS+5VAMP

0_1206_5%

10K_0402_5%

+3VALW

R47

10K_0402_5%

1 2

HP_DET#

SI: change 2n7002 to dual package

HP_OUTR36

HP_OUTL36

+3VALW

R46

1 2

2N7002DW-7-F_SOT363-6

2N7002_SOT23-3

61

Q20A

2

2N7002DW-7-F_SOT363-6

Q20B

+VREFOUT_B36

MIC_EXTR36 MIC_EXTL36

B+

3

12

R871

5

R871 330K_0402_5%

330K_0402_5%

4

13

D

Q21

2

G

S

HP_OUTR36

HP_OUTL36

SP02000D000 S W-CONN ACES 85204-04001 4P P1.25

SPKL+ SPKLSPKR+ SPKR-

1

C762

2

220P_0402_50V7K

C760

1

C761

2

220P_0402_50V7K

+

HP_OUT_R

1 2

C940 150U_D_6.3VM

+

HP_OUT_L

1 2

C941 150U_D_6.3VM

HP OUT For M/B

R909 0_0402_5%R909 0_0402_5%

12

R907

4.7K_0402_5%

MIC_EXTR MIC_EXTL

JACK_DET# 36,43

0.01U_0402_25V7K

1

C854

2

6 1

2N7002DW-7-F_SOT363-6

SI: change 2n7002 to dual package

SPEAKER

JP15

1 2 3 4

5 6

C763

1

2

220P_0402_50V7K

ACES_88231-04001

CONN@

1 2

12

C742 1U_0603_10V4ZC742 1U_0603_10V4Z

R908

4.7K_0402_5%

3

Q22B

Q22B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2

Q22A

1 2 3 4

GND1 GND2

EXTMIC_DET#36

CIR_IN41,43

PV:change cap form 100uF to 150uF

5

DOCK_R

DOCK_L

1 2

4

HP OUT For Docking

MIC_EXTR MIC_EXTL

HP_OUT_R HP_OUT_L

EXTMIC_DET# HP_DET#

CIR_IN

+5VL

SI2: Add cap & 44.2 ohm for dock

C945

R602 44.2_0603_1%R602 44.2_0603_1%

+

1 2

150U_D_6.3VM

150U_D_6.3VM C946

C946

R607 44.2_0603_1%R607 44.2_0603_1%

+

1 2

150U_D_6.3VM

JP17

1

2

3

4

5

6

7

8

9

10

11

12

13

14

ACES_87213-1400G

CONN@

DOCK_LOUT_R 43

DOCK_LOUT_L 43

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

AMP & Audio Jack

LA-4092P

37 53Thursday, February 21, 2008

E

0.4

of

A

SI2: Change C982 from 0.039u to 5600p

C982

1 2

5600P_0402_25V7K

1

2

B+

12

1 2

10K_0402_1%

100P_0402_50V8J

1

C996

2

4.7U_0805_10V4Z

RLS4148_LLDS2

@

R935

R935 0_0402_5%

0_0402_5%

1 2

3 4

5 7

8

17

18 19

5600P_0402_25V7K

R921

+VDDA_CODEC

U41A

3

+

2

-

C1021

4.7U_0805_25V6-K

1 2

D82

INN INP

GAIN0 GAIN1

SHUTDOWN VCLAMP

BSN BSP

AGND AGND

HPA00304PWR_TSSOP24

1 1

C986

LINE_OUT_R36,37

LINE_OUT_L36,37

2 2

3 3

EC_MUTE#37,41

SUB_ENABLE36

4 4

1 2

1U_0603_10V4Z

C989

1 2

1U_0603_10V4Z

+VDDA_CODEC +VREF

R930

1 2

10K_0603_5%

BASS_OUT

C1002 0.47U_0603_16V6KC1002 0.47U_0603_16V6K C1005 0.47U_0603_16V6KC1005 0.47U_0603_16V6K

R940 10K_0402_5%R940 10K_0402_5% R633 0_0402_5%R633 0_0402_5% R632 0_0402_5%@R632 0_0402_5%@

1

C1011

C1011 1U_0603_10V4Z

1U_0603_10V4Z

2

C1014

0.22U_0402_10V4Z

R932

1 2 1 2

R937

R937 R938

@R938

@

1 2 1 2 1 2

1

2

R923

1 2

20K_0402_1%

20K_0402_1% R925

R925

1 2

20K_0402_1%

+VREF

12

1K_0402_5%

1 2

0_0402_5%

1 2

0_0402_5%

R941

R941 R942

R942

1

C1015

0.22U_0402_10V4Z

2

C991

1

C995

2

0.1U_0402_16V7K

+VDDA_CODEC

12

R934

1 2

51_0402_5%

1 2

51_0402_5%

4

P

1

OUT

G

TLV2464_TSSOP14

11

D83

12

RLS4148_LLDS2

B

SI2: Change C984 from 0.039u to 0.027u

R920

1 2

30.1K_0402_1%

C987

1 2

0.056uF_0603_16V

SI2: Change C987 from 0.47u to 0.056u

R927

1 2

30.1K_0402_1%

SI: Change D82 & D83 to LLDS package

12

2

C1023

C1024

1

1U_0805_25V4Z

U60

24

VCC

23

VREF

22

BYPASS

21

COSC

20

ROSC

16

PVCC

9

PVCC

14

OUTP

15

OUTP

10

OUTN

11

OUTN

6

PGND

12

PGND

13

PGND

C1024

1

1U_0805_25V4Z

+VCC_WOOF

C1003 1U_0603_10V4ZC1003 1U_0603_10V4Z

1 2

C1004 2.2U_0603_10V6KC1004 2.2U_0603_10V6K

1 2

C1010 220P_0402_50V7KC1010 220P_0402_50V7K

1 2

R939 120K_0402_5%R939 120K_0402_5%

1 2

SUBWOOF+ SUBWOOF- SUBWOOF_L-

C

@

R917 0_0603_5%

1 2

+VREF

C983

100P_0402_50V8J

C984

1 2

0.027u_0402_16V7K

12

R922

R922 10K_0402_1%

10K_0402_1%

+VREF

C992

100P_0402_50V8J

C993

1 2

0.027u_0402_16V7K

12

R928

R928 10K_0402_1%

10K_0402_1%

SI2: Change C980,C990 from 0.056u to 0.027u

+VDDA_CODEC

1

5

2

6

+VDDA_CODEC

1

10

2

9

SI2: Change C984 from 0.039u to 0.027u

+VCC_WOOF

12

C1008

1U_0805_25V6K

2

1

1U_0805_25V6K

3

BAT54AW_SOT323-3~D

D44

SI: Change D44 to dual package

U41B

+

-

U41C

+

-

12

C1009

C980

1 2

0.027u_0402_16V7K

4

P

7

OUT

G

TLV2464_TSSOP14

11

R924

1 2

60.4K_0402_1%

60.4K_0402_1% C990

C990

1 2

0.027u_0402_16V7K

4

P

8

OUT

G

TLV2464_TSSOP14

11

R929

1 2

60.4K_0402_1%

4.7U_0805_25V6-K

R919

1 2

10K_0402_1%

R926

1 2

10K_0402_1%

1

C1017

2

4.7U_0805_25V6-K

L57

1 2

BLM18PG121SN1D_0603

L59

1 2

BLM18PG121SN1D_0603

D

+VREF

1

2

100P_0402_50V8J

1 2

+VREF

C1016

C985

C988

1 2

1U_0603_10V4Z

R931 0_1206_5%R931 0_1206_5%

Need check

SUBWOOF_L+

1

C1013

C1012

2

1000P_0402_50V7K

SI: Change C1012 & C1013 to 1000P to reduce power consumption

C981

1 2

5600P_0402_25V7K

5600P_0402_25V7K R918

R918

1 2

10K_0402_1%

+VDDA_CODEC

4

U41D

12

P

+

14

OUT

13

-

G

TLV2464_TSSOP14

11

JP13

1

2

3

GND

4

GND

ACES_88231-02001

CONN@

SUB wooffer

E

BASS_OUT

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/10/26 2006/07/26

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

EQ & Sub Woofer

LA-4092P

E

0.4

of

38 53Thursday, February 21, 2008

A

Left side USB CONNECTOR 0

B

C

D

E

Left side ESATA/USB combination Connector

U40

1

GND

2

IN

3

IN

1

C788

1 1

C788

4.7U_0805_10V4Z

2

USB_EN#

4

EN#

THERMAL_PAD

TPS2061IDGN_MSOP8~N

OUT OUT OUT OC#

8 7 6

1

5

+

9

C789

2

150U_D_6.3VM

W=100mils

1

C790

2

0.1U_0402_16V4Z

+USB_VCCA+5VALW

USB20_N427

1

C791

2

1000P_0402_50V7K

USB20_P427

+5VALW

USB20_N4_R

L46

4

1

WCM-2012-900T_0805

D8

4

IO1

VIN

3

GND

IO2

PRTR5V0U2X_SOT143-4@D8PRTR5V0U2X_SOT143-4@

2 1

USB Board Conn

2 2

+5VALW

USB_EN#41

USB20_N027 USB20_P027

USB20_N127 USB20_P127

JP47

1

2

3

4

5

6

7

8

9

10

11

GND1

12

GND2

ACES_87213-1000G

CONN@

3

2

USB20_P4_R

+USB_VCCA

USB20_N4_R USB20_P4_R

JP27

1

VCC

2

D-

3

D+

4

GND

5

GND

6

GND

7

GND

8

GND

SUYIN_020173MR004S50TZL_4P-T

CONN@

SI: change new footprint

Touch screen

JP18

1

2

3

4

5

6

GND1

7

GND2

ACES_88266-05001

CONN@

+5VS

USB10_N12 27 USB10_P12 27

+5VALW

USB20_N227

USB20_P227

SATA_RXN5_C28 SATA_RXP5_C28

SATA_TXN5

SATA_RXP5

WCM-2012-900T_0805

1

4

L51

SATA_TXP528 SATA_TXN528

D11

4

VIN

3

IO2

PRTR5V0U2X_SOT143-4@

D12

4

VIN

3

IO2

PRTR5V0U2X_SOT143-4@

L51

C792 0.01U_0402_16V7KC792 0.01U_0402_16V7K C793 0.01U_0402_16V7KC793 0.01U_0402_16V7K

2

IO1

1

GND

2

IO1

1

GND

12 12

SATA_TXP5

SATA_RXN5

2

3

+USB_VCCA

USB20_N2_R USB20_P2_R

SATA_TXP5 SATA_TXN5

SATA_RXN5 SATA_RXP5

1 2 3 4

5 6 7 8

9 10 11

SI: change new footprint

+5VALW

USB20_N2_R

SI: new add for ESD

JP28

USB

B_VCC B_DB_D+ B_GND

GND A+

ESATA

AGND

SHIELD

B-

SHIELD

B+

SHIELD

GND

SHIELD

TYCO_1759576-1

CONN@

D9

4

IO1

VIN

3

GND

IO2

PRTR5V0U2X_SOT143-4@D9PRTR5V0U2X_SOT143-4@

12 13 14 15

2 1

USB20_P2_R

CONN@

ACES_87213-0800G

10

3 3

Finger printer

1 2

R622 0_0603_5%@R622 0_0603_5%@

Q31

S

D

13

SI2301BDS_SOT23@

G

0.1U_0402_16V4Z

USB_EN#41

+5VALW

USB20_N7

4 4

PV: Change PN to SC300000K00 for ESD request

A

2

USB20_N727 USB20_P727

D21

4 3

PRTR5V0U2X_SOT143-4

2

IO1

VIN

1

GND

IO2

USB20_P7

1

2

USB20_N7 USB20_P7

+3VS_FB

C832

1 2

R581 0_0603_5%R581 0_0603_5%

1 2

R582 0_0603_5%@R582 0_0603_5%@

SI: Change finger print footprint

B

+3VS+3VALW

JP39

1

2

3

4

5

6

7

GND

8

GND

ACES_85201-06051

CONN@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

SI2: change form +3VALW to +3VS

1U_0603_10V4Z

2007/08/02 2008/08/02

9

1

C798

2

BT_OFF28

SI: change to 10K ohm to make sure MOS can turn on

Compal Secret Data

Deciphered Date

BT Connector

8

GND

7

6

5

4

3

2

1

GND

JP32

0.1U_0402_16V4Z

2

C802

1

1 2

10K_0402_5%

USB20_P6 USB20_N6

R517 1K_0402_5%@R517 1K_0402_5%@

1 2

R518 1K_0402_5%@R518 1K_0402_5%@

1 2

0612 no install

+5VALW

USB20_N6

Q24 SI2301BDS_SOT23

S

12

R519

R519 100K_0402_5%

100K_0402_5%

R520

D

4 3

PRTR5V0U2X_SOT143-4@

G

2

D16

IO1

VIN

GND

IO2

D

13

1

C799

2

0.01U_0402_16V7K

+3VAUX_BT

USB20_P6

2 1

0.1U_0402_16V4Z

1

C800

2

Title

Size Document Number Rev

Custom

Date: Sheet

USB20_P6 27 USB20_N6 27

BT_LED 42

CH_DATA 33

CH_CLK 33

+3VAUX_BT+3VS

1

C801

2

4.7U_0805_10V4Z

Compal Electronics, Inc.

Cover Sheet

LA-4092P

39 53Thursday, February 21, 2008

E

0.4

of

A

B

C

D

E

SI2: Change from +3VL to +3VALW and unmount this EEPROM

+3VALW+3VALW

1

C803

0.1U_0402_16V4Z@

1 1

SMB_EC_CK16,41,42,45 SMB_EC_DA16,41,42,45

2

U31

8

VCC

7

WP

6

SCL

5

SDA

GND

AT24C16AN-10SI-2.7_SO8@

12

R521

R521 100K_0402_5%@

100K_0402_5%@

1

A0

2

A1

3

A2

4

12

R526

R526 100K_0402_5%@

100K_0402_5%@

SPI Flash (8Mb*1)

0.1U_0402_16V4Z

SPI_CS#41 SPI_CLK41

EC_SO_SPI_SI41

SPI_CS# INT_SPI_CS#

SB_INT_FLASH_SEL28

+3VL

1

C484

2

1 2

R221 0_0402_5%R221 0_0402_5%

1 2

R227 33_0402_5%R227 33_0402_5%

12

R229 0_0402_5%R229 0_0402_5%

SPI_CLK_R

2

C794

C794 22P_0402_50V8J

22P_0402_50V8J

1

20mils

SPI_CLK_R

EC_SO_SPI_SI_R EC_SI_SPI_SO_R

SI2: chagne 0 ohm to 33ohm for EMI

U29

8

VCC

VSS

3

W

7

HOLD

1

S

6

C

5

SST25LF080A_SO8-200mil

Q

D

4

2

SI2: Add 22p for EMI

JP50

SPI_CS#

EC_SI_SPI_SO_R

JP50

2

112 334 556 778

E&T_2941-G08N-00E~D@

4 6 8

INT_FLASH_EN# SPI_CLK_R EC_SO_SPI_SI_R

12

R223 0_0402_5%R223 0_0402_5%

+3VL

EC_SI_SPI_SO 41

INT_SPI_CS#

SI2: Change from +3VALW to +3VL

+3VL

0.1U_0402_16V4Z@

5

U24

R385

1 2

22_0402_5%@

U24

B

4

Vcc

Y

A

G

NC7SZ32P5X_NL_SC70-5@

3

C624

INT_FLASH_EN#

2 1

12

SPI_CS#

R313 100K_0402_5%@R313 100K_0402_5%@

1 2

C:Chg. PN to LTC00000200

2 2

LPC Debug Port

JP41

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

ACES_85201-2005@

+3VS

R137 0_0402_5%@R137 0_0402_5%@

1 2

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

LPC_DRQ1#

PLT_RST#

SIRQ

CLK_14M_SIO 22

CLK_PCI_SIO2 26

3 3

LPC Debug Port

H31

+3VALW

SIRQ26,41

LPC_AD326,41

LPC_AD126,41

LPC_FRAME#26,41

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

LPC_AD3

LPC_AD1

LPC_FRAME#

Deciphered Date

H31

56

PLT_RST#

7

8

9

10

DEBUG_PAD@

D

4

LPC_AD2

3

LPC_AD0

2

CLK_PCI_SIO

1

1 2

2

1

Title

Size Document Number Rev

Custom

Date: Sheet

PLT_RST# 11,14,15,26,32,33,34,41

LPC_AD2 26,41

LPC_AD0 26,41

CLK_PCI_SIO 26,30

R232

22_0402_5%

@

C486

C486 22P_0402_50V8J

22P_0402_50V8J

@

Compal Electronics, Inc.

TCG/BIOS ROM/PS2/LED/SW

LA-4092P

LPC_DRQ1# 26

E

0.4

of

40 53Thursday, February 21, 2008

A

+3VL_EC

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1 1

2 2

3 3

4 4

SMB_EC_DA1 SMB_EC_CK1

SMB_EC_DA2 SMB_EC_CK2

0205_Add Pull down R402 for SUSP#.

ACES_85205-0400

C806

C805

2

R528 4.7K_0402_5%R528 4.7K_0402_5% R529 4.7K_0402_5%R529 4.7K_0402_5%

R531 4.7K_0402_5%R531 4.7K_0402_5% R532 4.7K_0402_5%R532 4.7K_0402_5%

SUSP#

12

R536

R536 100K_0402_5%

100K_0402_5%

ESB_CLK ESB_DAT

EC DEBUG port

@

JP34

1

LANPWR

2

E51_TXD

3

4

0.1U_0402_16V4Z

1

C807

2

1000P_0402_50V7K

1 2 1 2

CLK_PCI_EC26,30

+3VL

SYSON

12

R539

R539 100K_0402_5%

100K_0402_5%

R563 4.7K_0402_5%R563 4.7K_0402_5%

1 2

R576 4.7K_0402_5%R576 4.7K_0402_5%

1 2

DOCK_SLP_BTN#42,43

ON/OFF42,43

+5VL

1000P_0402_50V7K

1

C809

C808

2

+3VL

SI2: Change from +5VL to +3VL

+3VS

R530

C810

1 2

15P_0402_50V8J@

+3VALW

R530

1 2

33_0402_5%@

R533

1 2

47K_0402_5%

12

C811 0.1U_0402_16V4ZC811 0.1U_0402_16V4Z

SI2: Change from 10K to 100K

12

R538

R538 100K_0402_5%

100K_0402_5%

LID_SW#

+3VL

R543

4.7K_0402_5%

12

32.768KHZ_12.5PF_9H03200413

+3VL

C813

C813 15P_0402_50V8J

15P_0402_50V8J

1 2

Y7

3

NC

2

NC

1 2

C815

C815 15P_0402_50V8J

15P_0402_50V8J

B

+3VL +3VL_EC

R527

1 2

0_0805_5%

U33

CRY2

12

@

R545

R545 20M_0402_5%

20M_0402_5%

CRY1

GATEA20 KB_RST# SIRQ LPC_LFRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC

PLT_RST# ECRST# EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

SMB_EC_CK1 SMB_EC_DA1 SMB_EC_CK2 SMB_EC_DA2

SLP_S3# SLP_S5# EC_SMI# LID_SW# ESB_CLK ESB_DAT

E51_TXD LANPWR

GATEA2027 KB_RST#27 SIRQ26,40

LPC_FRAME#26,40

LPC_AD326,40 LPC_AD226,40 LPC_AD126,40 LPC_AD026,40

PLT_RST#11,14,15,26,32,33,34,40

EC_SCI#27

HDARST#27,30

SMB_EC_CK16,40,42,45 SMB_EC_DA16,40,42,45 SMB_EC_CK26,21 SMB_EC_DA26,21

SLP_S3#27 SLP_S5#27 EC_LID_OUT# 27 EC_SMI#27

LID_SW#42 ESB_CLK42 ESB_DAT42

H_THERMTRIP#6,27

CONA#43

VLDT_EN44 LANPWR32

DIM_LED42

4

OSC

1

OSC

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

+3VL_EC

+EC_AVCC

9

VCC

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

12

L80

L80 0_0603_5%

0_0603_5%

1 2

C816 0.1U_0402_16V4ZC816 0.1U_0402_16V4Z

C

+EC_AVCC

22

33

96

111

125

67

VCC

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

ACOFF/FANPWM2/GPIO13

PWM Output

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

AD Input

DAC_BRIG/DA0/GPIO3C EN_DFAN1/DA1/GPIO3D

DA Output

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SPI Device Interface

SPI Flash ROM

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

GPIO

BATT_LOW_LED#/GPIO54

VR_ON/XCLK32K/GPIO57

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

GPO

GPIO

GPI

GND

AGND

GND

KB926QFC0_LQFP128_14X14

35

94

113

ECAGND

KB926QFC0_LQFP128_14X14

69

11

24

FANPWM1/GPIO12

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

SELIO2#/AD5/GPIO43

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

CAPS_LED#/GPIO53 SUSP_LED#/GPIO55

SYSON/GPIO56

AC_IN/GPIO59

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

L81

1 2

0_0603_5%

INV_PWM

21

FAN_PWM

23 26

ACOFF

27

BATT_TEMP

63

BATT_OVP

64 65 66

TP_BTN#

75 76

68 70

IREF

71 72

83 84 85 86

TP_CLK

87

TP_DATA

88

AC_LED#

97 98 99 109

119 120 126 128

CIR_IN

73 74

FSTCHG

89 90 91

BAT_LED#

92

ON/OFFBTN_LED#

93

SYSON

95

VR_ON

121

ACIN_D

127

EC_RSMRST#

100 101 102

WL_BLUE_LED#

103

SB_PWRGD

104

BKOFF#

105 106

TP_LED#

107 108

110 112 114 115

SUSP#

116

PWRBTN_OUT#

117 118

124

C814 4.7U_0805_10V4ZC814 4.7U_0805_10V4Z

SI: Mount C814 for KB926C

12

SYSON 33,44,48

EC_RSMRST# 27

SB_PWRGD 6,27,51 BKOFF# 24

BATT_OVP

INV_PWM 24 FAN_PWM 4 EC_BEEP 36 ACOFF 46

C812

BATT_TEMP 45 BATT_OVP 45 ADP_I 46 ADP_ID 45

TP_BTN# 42 ANA_MIC_DET 37

DAC_BRIG 24 VCTRL 46 IREF 46 AC_SET 46

EC_MUTE# 37,38

USB_EN# 39

I2C_INT 42

MUTE_LED 43 TP_CLK 42 TP_DATA 42

AC_LED# 45 DOCK_VOL_UP# 43 DOCK_VOL_DWN# 43 VGATE 51

EC_SI_SPI_SO 40 EC_SO_SPI_SI 40 SPI_CLK 40 SPI_CS# 40

CIR_IN 37,43 FSTCHG 46

STD_ADP 46 CAPS_LED# 42 BAT_LED# 42 ON/OFFBTN_LED# 42

EC_ON 44,47 WL_BLUE_LED# 42

TP_LED# 42

VFIX_EN 51 ENBKL 16 EAPD_CODEC 36

EC_THERM# 28

SUSP# 33,36,44,46,49,52 PWRBTN_OUT# 27

D

SI2: Change keyboard conn

KBD CONN

CONN@

JP33

12

C327100P_0402_50V8J C327100P_0402_50V8J

0.01U_0402_16V7K

ECAGND

1 2

27

G1

28

G2

ACES_85201-26051

PV:Add for AC_LED function

CIR_IN

R541 10K_0402_5%R541 10K_0402_5%

12

R554 10K_0402_5%R554 10K_0402_5%

VR_ON 51

12

R231 0_0402_5%R231 0_0402_5%

remove in MP

KSO17

1

KSO16

2

KSO15

3

KSO10

4

KSO11

5

KSO14

6

KSO13

7

KSO12

8

KSO3

9

KSO6

10

KSO8

11

KSO7

12

KSO4

13

KSO2

14

KSI0

15

KSO1

16

KSO5

17

KSI3

18

KSI2

19

KSO0

20

KSI5

21

KSI4

22

KSO9

23

KSI6

24

KSI7

25

KSI1

26

KB Back Light Conn

ACES_85201-0405N

+5VL

PCI_SERR# 26

ACIN_D

JP48

G1 G2

CONN@

E

For EMI

KSO17

C213 100P_0402_25V8K@C213 100P_0402_25V8K@

D33

C609 100P_0402_25V8K@C609 100P_0402_25V8K@ C754 100P_0402_25V8K@C754 100P_0402_25V8K@ C756 100P_0402_25V8K@C756 100P_0402_25V8K@ C757 100P_0402_25V8K@C757 100P_0402_25V8K@ C758 100P_0402_25V8K@C758 100P_0402_25V8K@ C759 100P_0402_25V8K@C759 100P_0402_25V8K@ C764 100P_0402_25V8K@C764 100P_0402_25V8K@ C768 100P_0402_25V8K@C768 100P_0402_25V8K@ C769 100P_0402_25V8K@C769 100P_0402_25V8K@ C822 100P_0402_25V8K@C822 100P_0402_25V8K@ C823 100P_0402_25V8K@C823 100P_0402_25V8K@ C824 100P_0402_25V8K@C824 100P_0402_25V8K@ C825 100P_0402_25V8K@C825 100P_0402_25V8K@ C826 100P_0402_25V8K@C826 100P_0402_25V8K@ C875 100P_0402_25V8K@C875 100P_0402_25V8K@ C876 100P_0402_25V8K@C876 100P_0402_25V8K@ C877 100P_0402_25V8K@C877 100P_0402_25V8K@ C878 100P_0402_25V8K@C878 100P_0402_25V8K@ C884 100P_0402_25V8K@C884 100P_0402_25V8K@ C885 100P_0402_25V8K@C885 100P_0402_25V8K@ C886 100P_0402_25V8K@C886 100P_0402_25V8K@ C887 100P_0402_25V8K@C887 100P_0402_25V8K@ C888 100P_0402_25V8K@C888 100P_0402_25V8K@ C889 100P_0402_25V8K@C889 100P_0402_25V8K@ C890 100P_0402_25V8K@C890 100P_0402_25V8K@

+5VS_LED

12

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

1 2

KSO9 KSO16 KSI6 KSO14 KSO11 KSO10 KSO15 KSO6 KSO3 KSO12 KSO13 KSO2 KSO4 KSO7 KSO8 KSI3 KSO5 KSO1 KSI0 KSI4 KSI5 KSO0 KSI2 KSI1 KSI7

1

2

3

4

5 6

TP_BTN#

TP_CLK

TP_DATA

1 2

R560 150K_0402_5%R560 150K_0402_5%

2 1

CH751H-40PT_SOD323-2

C326 100P_0402_50V8JC326 100P_0402_50V8J

R540

R534

R535

10K_0402_5%

+3VL

AC_IN 28,46

+3VS

+5V_TP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

EC KB926/KB conn

LA-4092P

41 53Thursday, February 21, 2008

E

0.4

of

A

MDC 1.5 Conn.

Change type 4/25

JP25

1

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

Connector for MDC Rev1.5

CONN@

R495

1 2

33_0402_5%

+3VS

1

C778

2

1000P_0402_50V7K

10K_0402_5%

R577

12

HDA_SDOUT_MDC

HDA_SYNC_MDC

HDA_SDIN1_MDC

1

C779

C780

4.7U_0805_10V4Z

@

2

0.1U_0402_16V4Z

+3VS

12

13

D

Q55

2

2N7002_SOT23-3

G

S

D15

CH751H-40PT_SOD323-2

21

HDA_SDOUT_MDC27

HDA_SYNC_MDC27

HDA_SDIN127

HDA_RST#_MDC27

1 1

2 2

BT_LED39

R505

100K_0402_5%

WL_LED#33

PV: change from MOS to Diode

3 3

T/P Board (Inculde T/P_ON/OFF)

PV: Change PN to SCA00000G00 for ESD request

TP_DATA TP_CLK

PSOT24C_SOT23-3

+5V_TP

@

1

C819

0.1U_0402_16V4Z

+5VS_LED

@

C820

2

1

2

1

@

C821

C821 100P_0402_50V8J

100P_0402_50V8J

2

JP37

1

2

3

TP_CLK

4

TP_DATA

5

TP_BTN#

6

TP_LED#

7

8

9

GND

10

4 4

GND

ACES_85201-08051

CONN@

100P_0402_50V8J

IAC_BITCLK

GND13GND14GND15GND16GND17GND

18

WL_BLUE_LED# 41

3

1

TP_CLK 41 TP_DATA 41 TP_BTN# 41 TP_LED# 41

RES0 RES1

3.3V GND3 GND4

2

2 4 6 8 10 12

ACES_88018-124G

TP_BTN# TP_LED#

D31

B

2

3

1

+3VS +3VS

HDA_BITCLK_MDC 27

12

R496

R496 10_0402_5%@

10_0402_5%@

1 2

C777

C777 10P_0402_25V8K@

10P_0402_25V8K@

PV: Add LDO for ENE cap board

+5VL

1

C795

C795 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

ENE@

+3VL

PV: change from Q85 to R235

D32

D32 PSOT24C_SOT23-3

PSOT24C_SOT23-3

@

+5VALW +5V_TP

SYSON#43,44,50

1 2

R578 10K_0402_5%

ENE@

1 2

R247 0_0603_5%

CYPR@

1 2

R235 0_0603_5%R235 0_0603_5%

SI2301BDS-T1-E3_SOT23-3@

S

G

2

APL5151-33BC-TRL_SOT23-5

3

EN

BP

2

GND

1

VIN

VOUT

ENE@

U55

D

13

Q85

C

SATA_LED#28

4

C185 0.33U_0603_10V7KENE@C185 0.33U_0603_10V7KENE@

5

1 2

R248 0_0603_5%

ESB_CLK41 ESB_DAT41

I2C_INT41

+5VS

R631

10K_0402_5%

2

1 2

ENE@

+3VL_LDO

R603 0_0402_5%R603 0_0402_5%

1 2

R604 0_0402_5%R604 0_0402_5%

1 2

CAP_CLK CAP_DAT

R609

0_0402_5%@

C948

220P_0402_50V7K

@

PV: Add for EMI

Battery Charge LED(Left 2)

HDD LED(Left 3)

12

3

Q138B

Q138B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

5

4

61

Q138A

Q138A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

12

R608

0_0402_5%@

1

C947

C947 220P_0402_50V7K

220P_0402_50V7K

2

@

D

CAPS LOCK LED

CAPS_LED#41

POWER LED(Left 1)

ON/OFFBTN_LED#

BAT_LED#41

QSMF-C16E_AMBER-WHITE

White

GSENSOR_LED#28

Amber

LED1

Q32

DIM LED

+5VALW

DIM_LED41

R587

10K_0402_5%

2

G

Q32

SI2301BDS-T1-E3_SOT23-3

S

12

G

2

13

D

Q51

Q51 2N7002_SOT23-3

2N7002_SOT23-3

S

SWITCH BOARD.

PV: Add for EMI

R610 0_0402_5%R610 0_0402_5%

1 2

R611 0_0402_5%R611 0_0402_5%

1 2

SI: Add +5VALW_LED to support PWR LED S3 flash function

ON/OFFBTN_LED#41

+5VALW_LED

LID_SW#41

ON/OFF41,43 SMB_EC_CK16,40,41,45 SMB_EC_DA16,40,41,45

WHITE

D30

21

HT-F196BP5_WHITE

WHITE

D27

21

HT-F196BP5_WHITE

WHITE

D28

21

HT-F196BP5_WHITE

21

43

D

1 2

R551 470_0402_5%R551 470_0402_5%

1 2

R559 200_0402_5%R559 200_0402_5%

SI2: Change from +5VS to +3VS and change to 200 ohm

13

+5VS

1

C836

0.1U_0402_16V4Z

2

SI: Change to +3VL to support Qplay bottom boot in BATT mode

ON/OFFBTN_LED#

1 2

R705 150_0402_5%R705 150_0402_5%

R605 0_0402_5%R605 0_0402_5%

1 2

R606 0_0402_5%R606 0_0402_5%

1 2

ON/OFF ON/OFFBTN_LED#

D38

PSOT24C_SOT23-3

D38

@

SI2: Add diode for EMI

R552

1 2

470_0402_5%

+5VS_LED

CAP_CLK CAP_DAT

ON/OFF

3

1

R549

1 2

470_0402_5%

R_PWR_LED

2

R550

1 2

470_0402_5%

+5VS_LED

+3VL_LDO

E

+5VS_LED

+5VALW_LED

+3VS

Q58

SI2301BDS-T1-E3_SOT23-3

S

D

13

G

2

0.1U_0402_16V4Z

SI2: add 4.7u for Cypress cap board

1 2

C502 4.7U_0805_10V4Z

@

JP36

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

ACES_85201-1205N

PV: change to 12pin

+5VS_LED+5VALW_LED

C845

1

2

13 14

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

MDC/KBD/ON_OFF/LID

LA-4092P

42 53Thursday, February 21, 2008

E

0.4

of

A

B

C

D

E

Atlas/ Saturn Dock

+DOCKVIN

+5VS

1 1

+3VALW

1 2

R586 1K_0402_5%

1 2

R585 1K_0402_5%R585 1K_0402_5%

2N7002DW-7-F_SOT363-6

SYSON#42,44,50

Q145A

61

2

2 3

R588

R588 10K_0402_5%

10K_0402_5%

1 2

D43

1

DAN202U_SC70

DOCK_PWR_ON

DOCK_PWR_ON Spec 0V = Notebook S4/S5, Dock off

2.5V = Notebook S3, Dock on 4V = Notebook S0, Dock on

D_DDCDATA23 D_HSYNC23

D_DDCCLK23 USB20_N327 D_VSYNC23

USB20_P327 RJ45_MIDI3+32 RJ45_MIDI3-32 RJ45_MIDI2+32 RJ45_MIDI2-32 RJ45_MIDI1+32 RJ45_MIDI1-32 RJ45_MIDI0+32 RJ45_MIDI0-32

B+

GREEN_L23 RED_L23

BLUE_L23

PJP5

@

PAD-OPEN 2x2m

D_DDCDATA D_HSYNC

D_DDCCLK USB20_N3 D_VSYNC

USB20_P3 RJ45_MIDI3+ RJ45_MIDI3-

RJ45_MIDI2RJ45_MIDI1+ RJ45_MIDI1RJ45_MIDI0+ RJ45_MIDI0+V_BATTERY

21

need change to reverse type connector

+3VL

R565

1 2 3

5

4

R565 10K_0402_5%

10K_0402_5%

Q145B

Q145B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

CONA# 41

C942

1

2

220P_0402_50V7K

2 2

SI2:chang R572 to 22 ohm & R566 to 2K to fix dock usb issue

R572

DOCK_PRESENT

R572

1 2

22_0402_5%

12

R566

R566 2K_0402_1%

2K_0402_1%

0720 Add dock_present_gnd

43 44

40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10

41 42

DOCK_LOUT_R

DOCK_LOUT_L

1

2

C943

220P_0402_50V7K

8 6 4 2

JP38

43 44

40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2

41

SHIELD

42

SHIELD

FOX_QL1122L-H212AR-7F

CONN@

39

37

35

33

31

CIR_IN

29

DOCK_PWR_ON

27

MUTELED

25

DOCK_SLP_BTN#

23

21

R_VOL_UP# DOCK_VOL_UP#

19

R_VOL_DWN# DOCK_VOL_DWN#

17

SPDIFO_LRJ45_MIDI2+

15

AUDIO_OGND

13

DOCK_LOUT_R

11

DOCK_LOUT_L

9

DOCK_MIC_R_C

7

DOCK_MIC_L_C

5

AUDIO_IGND

3

DOCK_PRESENT

1

45 46

CIR_IN 37,41

DOCK_LOUT_R 37 DOCK_LOUT_L 37

@

MMBT3904_NL_SOT23-3

SPDIFO_L

1 2

R591 1K_0402_5%R591 1K_0402_5% R567 200_0402_5%R567 200_0402_5%

1 2

R568 200_0402_5%R568 200_0402_5%

1 2

+1.5VS

R574

R574 33_0402_5%@

33_0402_5%@

1 2

C

Q7

2

B

E

3 1

R575

1 2

0_0402_5%

C944

+3VS

DOCK_VOL_UP# DOCK_VOL_DWN#

MUTE_LED 41 DOCK_SLP_BTN# 41,42 JACK_DET# 36,37

DOCK_VOL_UP# 41 DOCK_VOL_DWN# 41

1 2

0.1U_0402_16V7K

12

R573

1

110_0402_5%

2

220P_0402_50V7K

0.1U_0402_16V7K

C894

1 2

R647 150_0402_5%R647 150_0402_5%

R589 10K_0402_5%R589 10K_0402_5% R590 10K_0402_5%R590 10K_0402_5%

12 12

SPDIF_OUT 36

R_VOL_UP#

1

C843

C843 1000P_0402_50V7K

Need 600 Ohm 500 mA

FBM-11-160808-601-T_0603

+3VS

1 2

C

Q16

2

B

E

3 1

C978

L94

L94 FBM-11-160808-601-T_0603

FBM-11-160808-601-T_0603

1 2 1 2

L93

C921

220P_0402_50V7K

10K_0402_5%

R915

2

R915

B

E

13

D

1 2

2

G

C

S

Q18

3 1

MMBT3904_NL_SOT23-3

DOCK_MIC_R_C DOCK_MIC_L_C

1

C922

2

220P_0402_50V7K

Q100

Q100 2N7002_SOT23-3

2N7002_SOT23-3

SENSE_B# 36

B

DOCK_MIC_R36 DOCK_MIC_L36

DOCK_MIC_L_C

MIC_Dock

10K_0402_5%

R912

MMBT3904_NL_SOT23-3

10K_0402_5%

1 2

R913

R913 47K_0402_5%

47K_0402_5%

1 2

1U_0603_10V6K

A

R914

2

1

3 3

4 4

1000P_0402_50V7K

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

R_VOL_DWN#

1

C844

C844 1000P_0402_50V7K

1000P_0402_50V7K

2

C

Compal Secret Data

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

DOCK CONN

LA-4092P

43 53Thursday, February 21, 2008

E

of

0.4

A

+5VALW TO +5VS

+5VALW

1 1

1

2

4.7U_0805_10V4Z

Q35

8

D

7

D

6

D

5

D

SI4800BDY_SO8

C864

S S S G

1 2 3 4

+5VS

1

C833

2

1U_0402_6.3V4Z

RUNON

4.7U_0805_10V4Z

C835

1

2

+1.8V TO +1.8VS

+1.8V

Q4

IRF8113PBF_SO8

2 2

8 7

5

1

C842

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z 10M_0402_5%

10M_0402_5%

IRF8113PBF_SO8

R809

SI2: Add this resistor to meet MOS voltage

1 2 36

4

1.8VS_ENABLE

12

+1.8VS

1

2

1U_0402_6.3V4Z

1

C849

2

0.01U_0402_25V7K

C848

13

D

S

2

C841

C841 10U_0805_10V4Z

10U_0805_10V4Z

1

R138

1 2

750K_0402_1%

Q13

2

2N7002_SOT23-3

G

B+

SUSP

Discharge circuit

2

G

2

G

+0.9V

+1.8VS

R279

R279 470_0805_5%

470_0805_5%

1 2 13

D

S

R292

R292 470_0805_5%

470_0805_5%

1 2 13

D

Q49

Q49 2N7002_SOT23-3

2N7002_SOT23-3

S

Q48

Q48 2N7002_SOT23-3

2N7002_SOT23-3

VLDT_EN# SYSON#

SUSP

2

G

3 3

4 4

+5VS

R239

R239 470_0805_5%

470_0805_5%

1 2 13

D

2

G

+3VS

D

S

1 2 13

D

S

Q46

Q46 2N7002_SOT23-3

2N7002_SOT23-3

R288

470_0805_5%

Q47

Q47 2N7002_SOT23-3

2N7002_SOT23-3

SYSON#

SUSP SUSP

SUSP

B

+3VALW TO +3VS

+3VALW +3VS

Q14

1

2

4.7U_0805_10V4Z

Q14

8

D

7

D

6

D

5

D

SI4800BDY_SO8

C840

C839

1

S

2

S

3

S

4

G

1

C834

2

0.01U_0402_25V7K

+1.2VALW TO +1.2V_HT

+1.2VALW +1.2V_HT

Q11

IRF8113PBF_SO8

8 7

5

1

C847

2

4.7U_0805_10V4Z

SI2: Add this resistor to meet MOS voltage

+1.2V_HT +1.8V

R280

R280 470_0805_5%

470_0805_5%

1 2 13

D

Q37

2

2N7002_SOT23-3

G

S

+1.5VS

R293

R293 470_0805_5%

470_0805_5%

1 2 13

D

Q50

Q50 2N7002_SOT23-3

2N7002_SOT23-3

S

SUSP

1

2

1U_0402_6.3V4Z

RUNON

D

S

1 2 36

4

12

R808

R808 10M_0402_5%

10M_0402_5%

1 2 13

D

2

G

S

+1.1VS

2

G

1

C838 4.7U_0805_10V4ZC838 4.7U_0805_10V4Z

2

R152

750K_0402_1%

13

Q17

2

2N7002_SOT23-3

G

1

C846

2

1U_0402_6.3V4Z

1

2

0.01U_0402_25V7K

R284

R284 470_0805_5%

470_0805_5%

Q41

Q41 2N7002_SOT23-3

2N7002_SOT23-3

R294

R294 470_0805_5%

470_0805_5%

1 2 13

D

Q52

Q52 2N7002_SOT23-3

2N7002_SOT23-3

S

12

B+

SUSP

C862 4.7U_0805_10V4ZC862 4.7U_0805_10V4Z

13

D

C837

S

EC_ON#

2

1

2

R233

330K_0402_5%

2

2N7002_SOT23-3

G

+1.2VALW

1 2 13

D

G

S

C

12

VLDT_EN#

Q12

R368

R368 470_0805_5%

470_0805_5%

@

Q42

Q42 2N7002_SOT23-3

2N7002_SOT23-3

@

D

H4

H1

H_4P5X3P0N

@

H5

H_3P0

@

H15

H_3P0

@

H21

4P0

@

H27

H_4P0

@

B+

VLDT_EN#13

VLDT_EN41

H2

H_7P0X5P0N

@

1

H6

H_3P0

@

1

H16

H_3P0

@

1

H22

4P0

@

1

H25

H_3P0

@

1

SYSON#42,43,50 SUSP 18,50

2N7002DW-7-F_SOT363-6

H_3P4N

@

1

H7

H_3P0

@

1

@

H23

4P0

@

1

H32

H_3P3

@

1

100K_0402_5%

SYSON# SUSP

Q142B

R597

100K_0402_5%

VLDT_EN#

Q143A

VLDT_EN

2

H3

H_3P0

4P0

R595

5

1

H8

H18

H24

@

+5VL

1

H_4P0

12

61

H4

3P0N

@

H9

H_3P0

@

H19

H_3P0

@

H33

1

12

3

4

+5VL

1

H10

H_3P0

@

1

H30

H_3P3

@

1

+5VL+5VL

12

R596

R596 100K_0402_5%

100K_0402_5%

61

Q142A

Q142A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2

12

R598

R598 100K_0402_5%

100K_0402_5%

EC_ON#

3

Q143B

2N7002DW-7-F_SOT363-6

5

4

H_3P0

1

H11

CF1CF1

1

H_3P0

@

CF2CF2

SUSP# 33,36,41,46,49,52SYSON33,41,48

EC_ON 41,47

E

H13

H12

@

1

CF3CF3

1

H_3P0

1

H14

H_3P0

@

1

CF4CF4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

DC/DC Circuits

LA-4092P

44 53Thursday, February 21, 2008

E

0.4

of

A

+3VALW

PQ3

PQ3 TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

B

C

D

PR8

PR8 100_0402_5%

100_0402_5%

ADP_SIGNAL

ADPINADPIN

PD1

PR16

6.49K_0402_1%

1 2

2

12

2

1

100_0402_5%

1 1

1 3

5

4

3

2

1

2

3

4

5

6

7

8

9 10

1 2

PJSOT24C_SOT23-3

12

PR17

PR17 1K_0402_5%

1K_0402_5%

ACES_88334-057N

PJP1

2 2

PJP2

GND GND

SUYIN_200275MR008GXOLZR@

3 3

4 4

SUYIN_200275MR008GXOLZR@

PR9

PR9 100K_0402_5%

100K_0402_5%

1 2

PR3

PR3 10K_0402_5%

10K_0402_5%

3

EC_SMD EC_SMC

PR13

BAT_ID 46

+3VL

AC_LED# 41

12

PC2

12

PR14

PR14 100_0402_5%

100_0402_5%

BATT_TEMP 41

12

PR2

PR2 10K_0402_5%

10K_0402_5% RLZ3.6B_LL34

RLZ3.6B_LL34

12

PC3

PC3 1000P_0402_50V7K

1000P_0402_50V7K

100P_0402_50V8J

PD2

SM05_SOT23@

3 2

12

PD4

PL1

SMB3025500YA_2P

1 2

1

12

@

12

PC4

100P_0402_50V8J

2

3

PD3

1

SM24.TC_SOT23-3@

SMB_EC_DA1

SMB_EC_CK1

PC12

PC12 1000P_0402_50V7K

1000P_0402_50V7K

VIN

12

PC5

1000P_0402_50V7K

VMB

PL3

SMB3025500YA_2P

1 2

12

PC8

PC8 1000P_0402_50V7K

1000P_0402_50V7K

ADP_ID 41

PL2

SMB3025500YA_2P

12

PC9

0.01U_0402_25V7K

SMB_EC_DA1 6,40,41,42

SMB_EC_CK1 6,40,41,42

+DOCKVIN

12

BATT

0.22U_0603_10V7K

BATT

12

+5VALW

PR1

340K_0402_1%

12

PC6

0.01U_0402_25V7K

340K_0402_1%

12

PR4

499K_0402_1%

12

PR6

105K_0402_1%

12

PC1

0.01U_0402_16V7K

3 2

PU1A

LM358ADT_SO8

8

P

+

-

G

4

PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C Recovery at 47 +-3 degree C

PC10

CPU

12

+5VS

12

PH1

PH1 10K_TH11-3H103FT_0603_1%

10K_TH11-3H103FT_0603_1%

PR10

15K_0402_1%

1 2

+5VALW

12

PR12

2.55K_0402_1%

1 2

150K_0402_1%

PR11

PR15

150K_0402_1%

12

PU1B

LM358ADT_SO8

5 6

12

PC11

1000P_0402_50V7K

47K_0402_1%

1 2

PR5

10K_0402_5%

1

0

PR7

8

P

+

7

0

-

G

4

12

BATT_OVP 41

ENTRIP1 47

13

D

PQ1

2

G

PQ1 @SSM3K7002FU_SC70-3

@SSM3K7002FU_SC70-3

S

EN0 47

13

D

PQ2

2

G

PQ2 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

Security Classification

2007/05/29 2008/05/29

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2007/05/29 2008/05/29

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DC Connector/CPU_OTP

LA-4092P

D

of

45 53Thursday, February 21, 2008

of

45 53Thursday, February 21, 2008

of

45 53Thursday, February 21, 2008

0.1

A

VIN

PQ101

1 1

PR101

47K_0402_5%

1 2

12

PC101

PR107

PR107 47K_0402_1%

47K_0402_1%

1 2

2

G

PC101

47P_0402_50V8J

2

13

D

S

13

PQ105

PQ105 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PQ107

PQ107 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

2

PQ101 AM4835EP-T1-PF_SO8

AM4835EP-T1-PF_SO8

8 7

5

DTA144EUA_SC70-3

PQ104

1 3

PACIN_1 47

PR111

3K_0402_1%

PACIN

1 2

2 2

ACOFF#

1 2

PD101

RLS4148_LL34-2

2

G

13

D

PQ109

PQ109 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

VCTRL41

4

1 2

1U_0603_10V6K

1 2 36

PC106

0.22U_0603_16V7K

PR114

PR114 0_0402_5%@

0_0402_5%@

PC117

P2

12

AM4835EP-T1-PF_SO8

1 2 3 6

12

PR106

200K_0402_5%

PR109

PR109 150K_0402_5%

150K_0402_5%

143K_0402_1%

12

PR113

4

PQ103

AC_SET41

SUSP#33,36,41,44,49,52

12

PR115

PR115 100K_0402_1%

100K_0402_1%

8 7

5

0.01U_0402_16V7K@

PC112

1 2

1U_0603_6.3V6M

Charge Detector

ADP_I41

VIN

PD104

PD104 RLS4148_LL34-2

RLS4148_LL34-2

1 2

PR123

PR123 1M_0402_5%

3 2

VIN_1

12

8

+

-

4

1M_0402_5%

1 2

PR125

PR125 47_1206_5%

47_1206_5%

12

P

1

O

G

PU102A

PU102A LM393DG_SO8

LM393DG_SO8

PC125

0.1U_0603_25V7K

+3VL

12

PR129

10K_0402_1%

STD_ADP 41

PR128

10K_0402_5%

2

G

FSTCHG41

+3VL

12

CHGEN#

13

D

PQ112

PQ112 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

FSTCHG#

1 2

PR137

PR137 20K_0402_1%

20K_0402_1%

+3VL

PR132

100K_0402_5%

2

G

ACDET

12

3 3

VIN

12

PR131

133K_0402_1%

12

PR135

10K_0603_0.1%

1.24VREF

4 4

PR104

PR104 0_0402_5%

0_0402_5%

1 2

PC107

PR110

PR110 0_0402_5%

0_0402_5%

1 2

PR116

39K_0402_5%

12

PC120

0.22U_0603_10V7K

12

13

D

PQ113

PQ113 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

PR138

100K_0402_1%

B

ACSET

12

BQ24740VREF

+3VL

12

PR118

10K_0402_5%

1 2

0.1U_0402_10V7K

12

PR140

PR140 100K_0402_5%

100K_0402_5%

8

IADSLP

9

AGND

10

VREF

11

VDAC

12

VADJ

13

EXTPWR

14

ISYNSET

PC121

PC123

ACDET

7

6

LPREF

ACSET

PU101

PU101 BQ24740RHDR_QFN28_5X5

BQ24740RHDR_QFN28_5X5

IADAPT

SRSET

15

16

IADAPT

12

100P_0402_50V8J

12

5

ACDET

BAT

17

BATT

P4

PC108

0.1U_0603_25V7K

4

LPMD

SRN

18

PR102

0.012_2512_1%

1 2

PC102

1U_0603_6.3V6M

12

3

ACP

SRP

19

PR120

133K_0402_1%

12

PR121

PR121 200K_0402_1%

200K_0402_1%

B+

PL101

PL101 HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1 2

12

PC109

0.1U_0603_25V7K@

CHGEN#

1

2

ACN

TP

CHGEN

PVCC

BTST

HIDRV

PH

REGN

LODRV

PGND

DPMDET

CELLS

21

20

PQ111

SSM3K7002FU_SC70-3

12

29

28

27

26

25

24

23

22

IREF 41

BST_CHG

DH_CHG

LX_CHG

REGNVADJ

DL_CHG

D

S

12

PC103

4.7U_0805_25V6-K

PR108

PR108 10_1206_5%

10_1206_5%

1 2

PC110

PC110 1U_0805_25V6K

1U_0805_25V6K

1 2

PD102

RLS4148_LL34-2

12

PC119

PC119 1U_0603_10V6K

1U_0603_10V6K

PR117

100K_0402_5%

1 2

13

2

G

12

PC104

4.7U_0805_25V6-K

PC111

0.1U_0402_10V7K

1 2

12

PC105

12

PR119

PC124

0.1U_0603_25V7K

47K_0402_5%

4.7U_0805_25V6-K

12

C

CHG_B+

578

BQ24740VREF

CHG_B+

PQ108

PQ108 AO4466_SO8

AO4466_SO8

PL102

3 6

241

10U_LF919AS-100M-P3_4.5A_20%

1 2

PQ110

PQ110 AO4468_SO8

AO4468_SO8

3 6

241

BAT_ID 45

12

PC122

0.1U_0603_25V7K

@

0.047U_0402_16V7K

133K_0402_1%

PC126

PR126

12

PC113

4.7U_0805_25V6-K

VIN

12

PR133

PR133 10K_0603_0.1%

10K_0603_0.1%

22P_0402_50V8J

12

PC114

4.7U_0805_25V6-K

PR130

2.15K_0402_1%

1 2

PC127

PQ102

PQ102 AM4835EP-T1-PF_SO8

AM4835EP-T1-PF_SO8

1 2 3 6

PR112

0.015_1206_1%

1 2

PC118

0.1U_0402_10V7K

12

4

PR122

PR122 1M_0402_5%

1M_0402_5%

1 2

5

+

6

-

8 7

5

ACOFF#

8

PU102B

P

7

O

G

LM393DG_SO8

4

RLZ4.3B_LL34

PR136

60.4K_0402_1%

1 2

4

REF

5

ANODE

LMV431ACM5X_SOT23-5

12

PC115

PD103

CATHODE

BATT

12

4.7U_0805_25V6-K

VIN_1

PU103

NC NC

BATT

PC116

4.7U_0805_25V6-K

VIN

12

PR127

PR127 10K_0402_1%

10K_0402_1%

12

3 2 1

D

PR103

47K_0402_5%

1 2

12

PR105

PR105 10K_0402_5%

10K_0402_5%

13

2

PQ106

PQ106 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR124

PR124 1K_0402_5%

1K_0402_5%

1 2

PACIN

12

PR134

PR134 10K_0402_5%

10K_0402_5%

1.24VREF

VIN

ACOFF 41

AC_IN 28,41

PACIN

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/05/29 2008/05/29

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Charger

LA-4092P

D

of

46 53Thursday, February 21, 2008

of

46 53Thursday, February 21, 2008

of

46 53Thursday, February 21, 2008

0.1

A

B

C

D

E

2VREF_51125

PC302

ENTRIP2

6

13

1 2

PR312

0_0402_5%@

PR317

PR317 0_0402_5%

0_0402_5%

12

0.22U_0603_10V7K

5

VFB2

ENTRIP2

SKIPSEL

EN0

14

B++

4

TONSEL

GND

15

2

1

3

VFB1

VREF

ENTRIP1

PGOOD

VBST1

DRVH1

DRVL1

VREG5

VIN

VCLK

17

16

18

TPS51125RGER_QFN24_4X4

12

PC311

12

10U_0805_10V6K

PR302

30.9K_0402_1%

1 2

PR304

20K_0402_1%

1 2

PR306

150K_0402_1%

ENTRIP1

1 2

24

VO1

23 22 21 20

LL1

19

VL

PR308

0_0402_5%

1 2

UG_5V LX_5V LG_5V

+3VL

1 2

PR318 0_0402_5%

B++

12

PC304

2200P_0402_50V7K

PC308

0.1U_0402_10V7K

1 2

12

PR316

100K_0402_5%

12

PR310

PR310 0_0402_5%

0_0402_5%

1 2

3/5V_OK 49

12

PC305

PC313

4.7U_0805_25V6-K

UG1_5V

578

PQ302

AO4466_SO8

3 6

241

PL303

PL303 10U_LF919AS-100M-P3_4.5A_20%

10U_LF919AS-100M-P3_4.5A_20%

1 2

578

3 6

241

PQ304

PQ304 FDS6690AS_NL_SO8

FDS6690AS_NL_SO8

+5VALWP

1

+

PC310

150U_D_6.3VM

2

4.7U_0805_25V6-K

OCP=7.644(min) MOSTemperature Factor=1.3 (100C)

1 1

PR301

13.7K_0402_1%

1 2

PR303

B+

2 2

OCP=4.59(min) MOSTemperature Factor=1.3 (100C)

3 3

PL301

HCB2012KF-121T50_0805

1 2

B++

12

PC301

2200P_0402_50V7K

+3VALWP

12

PC303

4.7U_0805_25V6-K

4.7UH_SIQB74B-4R7PF_4A_20%

1

+

PC309

2

150U_D_6.3VM

PQ301

PQ301 AO4466_SO8

AO4466_SO8

PL302

12

PQ303

PQ303 AO4468_SO8

AO4468_SO8

+3VLP

578

UG1_3V

PR309

0_0402_5%

3 6

241

3 6

241

ENTRIP26ENTRIP145

0_0402_5%

1 2

578

12

PC306

10U_0805_6.3V6M

0.1U_0402_10V7K

LX_3V

LG_3V

1 2

PC307

PR307

1 2

0_0402_5%

EN045

PR303

20K_0402_1%

1 2

PR305

180K_0402_1%

1 2

PU301

25

P PAD

7

VO2

8

BST_3V BST_5V

UG_3V

PR311

VREG3

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

@

12

@620K_0402_5%

SSM3K7002FU_SC70-3

PACIN_146

604K_0402_1%

4 4

A

PQ305

SSM3K7002FU_SC70-3

1 2

PR315

12

S

PQ308

2

G

PC314

0.022U_0603_25V7K

2

G

13

D

S

B

13

D

PQ305

13

D

2

G

S

1 2

PR313

100K_0402_5%

13

PQ307

2

G

SSM3K7002FU_SC70-3

PQ306

PQ306 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

VL

12

100K_0402_5%

100K_0402_5% PR314

PR314

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EC_ON 41,44

Issued Date

2VREF_51125

2007/05/29 2008/05/29

C

PC312

0.1U_0603_25V7K

+5VALWP

+3VALWP

Compal Secret Data

1 2

Deciphered Date

PJP302

PAD-OPEN 4x4m

PAD-OPEN 4x4m PJP303

PJP303

PAD-OPEN 4x4m

(4.5A,180mils ,Via NO.= 9)

+5VALW

(3A,120mils ,Via NO.= 6)

+3VALW

D

VL

+3VLP

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

3.3VALWP/5VALWP

LA-4092P

PJP304

2 1

PAD-OPEN 2x2m

PJP301

2 1

PAD-OPEN 2x2m

E

+5VL

+3VL

of

47 53Thursday, February 21, 2008

of

47 53Thursday, February 21, 2008

of

47 53Thursday, February 21, 2008

0.1

A

1 1

PR401

0_0402_5%

1000P_0402_50V7K@

1 2

PC401

+1.8VP

12

PR406

0_0402_5%

PR403

316_0402_1%

12

+5VALW

12

PC411

PC411 1U_0603_10V6K

1U_0603_10V6K

+1.8VP

PR411

1 2

14.3K_0603_0.1%

1 2

PC413

PC413 10P_0402_50V8J@

10P_0402_50V8J@

10K_0603_0.1%

PR405

PR405 255K_0402_1%

255K_0402_1%

1 2

12

PR409

2 3 4 5 6

PU401

TON VOUT V5FILT VFB PGOOD

SYSON33,41,44

2 2

B

1

14

15

TP

EN_PSV

GND7PGND

8

TPS51117RGYR_QFN14_3.5x3.5

BST_1.8V

VBST

DRVH

LL

TRIP

V5DRV

DRVL

1 2

PR404

0_0402_5%

DH_1.8V_1

13

LX_1.8V

12 11

+5VALW

10

DL_1.8V

9

PC407

1 2

0.1U_0402_10V7K

12

1 2

PR407 0_0402_5%PR407 0_0402_5%

1 2

PR408 18.2K_0402_1%

PC415

4.7U_0805_10V6K

DH_1.8V

C

578

3 6

578

3 6

241

1.8V_B+

12

PQ401

PQ401 AO4466_SO8

AO4466_SO8

PQ402

PQ402 FDS6690AS_NL_SO8

FDS6690AS_NL_SO8

4.7U_0805_25V6-K

3300P_0402_50V7-K

PC406

PC408

12

2.2UH_PCMC063T-2R2MN_8A_20%

1 2

12

PR410

4.7_1206_5%

PC410

680P_0603_50V7K

1 2

4.7U_0805_25V6-K

4.7U_0805_25V6-K PC403

PC403

12

PL402

PL401

HCB1608KF-121T30_0603

1 2

2200P_0402_50V7K

PC404

OCP=9.8913(min) MOSTemperature Factor=1.3 (100C)

1

+

PC409

2

330U_4V_M

+1.8VP

D

B+

12

PC405

PC405 680P_0402_50V7K

680P_0402_50V7K

3 3

PJP401

+1.8VP

4 4

A

1 2

PAD-OPEN 4x4m

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

(7A,280mils ,Via NO.= 14)

+1.8V

Compal Secret Data

2007/05/29 2008/05/29

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

1.8VP

LA-4021P

D

of

48 53Thursday, February 21, 2008

of

48 53Thursday, February 21, 2008

of

48 53Thursday, February 21, 2008

0.1

5

4

3

2

1

D D

B+++

12

PC501

4.7U_0805_25V6-K

C C

+1.2VALWP

3.3UH_SIQB74B-3R3PF_5.9A_20%

1

12

+

PC508

220U_D2_4VM

OCP=4.487(min) MOSTemperature Factor=1.3 (100C)

B B

+

2

PC509

4.7U_0805_6.3V6K

12

PC502

2200P_0402_50V7K

PQ501

AO4466_SO8

PL503

12

PQ503

AO4468_SO8

578

3 6

241

578

3 6

241

3/5V_OK47

PJP501

+1.1VSP

+1.2VALWP

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m PJP502

PJP502

1 2

PAD-OPEN 4x4m

(6A,240mils ,Via NO.=12)

+1.1VS

(4A,160mils ,Via NO.=8)

+1.2VALW

+1.2VALWP

PC506

0.1U_0402_10V7K

UG1_1.2V

12

1 2

PR506

PR506 0_0402_5%

0_0402_5%

PR5080_0402_5% PR5080_0402_5%

PR512

0_0402_5%

PR501

11.5K_0402_1%

1 2

12

BST_1.2V UG_1.2V

LX_1.2V

LG_1.2V

1U_0603_10V6K

PC512

0.1U_0402_10V7K@

18.7K_0402_1%

1 2

PU501

25

P PAD

7

PGOOD2

8

EN2

9

VBST2

10

DR VH2

11

LL2

12

DR VL2

PR511

19.1K_0402_1%

1 2

PC514

PR502

PR505

0_0402_5%

1 2

3.3_0402_5%

12

6

VO2

PGND2

13

PR514

5

VFB2

TRIP2

14

1 2

4

3

GND

TONSEL

V5FILT

V5IN

15

16

12

PR503

24.9K_0402_1%

2

1

VO1

VFB1

PGOOD1

EN1

VBST1

DR VH1

LL1

DR VL1

TRIP1

PGND1

TPS51124RGER_QFN24_4x4

17

18

12

PR510

19.1K_0402_1%

+5VALW

PC515

4.7U_0805_10V6K

0.1U_0402_10V7K

PR504

11.5K_0402_1%

12

PC503

0.022U_0603_25V7K

24 23

BST_1.1V

22

UG_1.1V

21

LX_1.1V

20

LG_1.1V

19

PC513

12

1.1VS_POK 18

PR507

0_0402_5%

PR513

21K_0402_1%

1 2

+1.1VSP

12

PR509

0_0402_5%

PQ502

AO4466_SO8

PC507

0.1U_0402_10V7K

1 2

UG1_1.1V

PQ504

AO4468_SO8

SUSP# 33,36,41,44,46,52

B+++ B+

578

3 6

241

578

3 6

241

PL502

HCB2012KF-121T50_0805

2.2UH_PCMC063T-2R2MN_8A_20%

OCP=9.6(min) MOSTemperature Factor=1.3 (100C)

12

PC504

4.7U_0805_25V6-K

PL501

1 2

4.7U_0805_6.3V6K

12

PC510

12

PC516

PC505

2200P_0402_50V7K

+1.1VSP

1

+

1 2

2

4.7U_0805_25V6-K

PC511

PC511 220U_6.3VM_R15

220U_6.3VM_R15

A A

Security Classification

2007/05/29 2008/05/29

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/05/29 2008/05/29

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

1.1VSP/1.2VALWP

LA-4092P

49 53Thursday, February 21, 2008

1

0.1

of

5

D D

4

3

2

1

+1.8V

PU601

VIN1VCNTL

12

PC601

10U_0805_10V6K

PR602

@

1 2

0_0402_5%

1 2

0_0402_5%

PQ601

SSM3K7002FU_SC70-3

PR604

12

PC606

0.1U_0402_10V7K@

2

+3VS

SYSON#42,43,44

SUSP18,44

C C

PJP601

B B

+0.9VP

+2.5VSP

+1.5VSP

PJP601

1 2

PAD-OPEN 3x3m

PAD-OPEN 3x3m PJP602

PJP602

1 2

PAD-OPEN 3x3m

PJP603

1 2

PAD-OPEN 3x3m

(2A,80mils ,Via NO.= 4)

+0.9V

(500mA,40mils ,Via NO.= 1)

+2.5VS

(1A,40mils ,Via NO.= 2)

+1.5VS

PC602

@

G

12

PR601

1K_0402_1%

10U_0805_10V6K

12

PR603

13

D

1K_0402_1%

S

12

PC607

1U_0603_6.3V6M

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

12

PC605

PC605 10U_0805_10V6K

10U_0805_10V6K

PC604

0.1U_0402_10V7K

(500mA,40mils ,Via NO.= 1)

PU602

PU602 APL5508-25DC-TRL_SOT89-3

APL5508-25DC-TRL_SOT89-3

2

IN

OUT

GND

1

3

+0.9VP

NC NC NC TP

6 5 7 8 9

12

PC608

+2.5VSP

12

PR605

PR605 150_1206_5%

150_1206_5%

@

4.7U_0805_6.3V6K

12

PC603

PC603 1U_0603_10V6K

1U_0603_10V6K

+5VALW

SUSP18,44

PC613

10U_0805_10V6K

SSM3K7002FU_SC70-3

1 2

PR608

0_0402_5%

+1.8V

PU603

VIN1VCNTL

12

0.1U_0402_10V7K

PC611

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

12

PC614

PC614 10U_0805_10V6K

10U_0805_10V6K

12

PC609

PR606

PR606 1K_0402_1%

1K_0402_1%

10U_0805_10V6K

@

VREF1.5V

PQ602

2

12

PC610

0.1U_0402_10V7K@

12

PR607

13

D

5.1K_0402_1%

G

S

NC NC NC TP

+1.5VSP

6 5 7 8 9

12

PC612

PC612 1U_0603_10V6K

1U_0603_10V6K

+5VALW

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/11/23 2007/11/23

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

0.9VSP/2.5VSP/1.5VSP

LA-4092P

1

0.2

of

50 53Thursday, February 21, 2008

of

50 53Thursday, February 21, 2008

of

50 53Thursday, February 21, 2008

5

+CPU_CORE_NB

VDD_NB_FB_H6

+5VS

2_0402_5%

1 2

0.1U_0603_25V7K

1 2

PR212

0_0402_5%

1 2

PR213

0_0402_5%@

1 2

PR215

10K_0402_5%@

ISL6265_PWROK

PR224

1 2

82.5K_0402_1%

PR232

1 2

6.81K_0402_1%

1 2

PC228

PC228 1000P_0402_50V7K

1000P_0402_50V7K

PR235 0_0402_5%PR235 0_0402_5%

PR237 0_0402_5%PR237 0_0402_5%

PR239 0_0402_5%PR239 0_0402_5%

PR241 0_0402_5%PR241 0_0402_5%

VDD_NB_FB_L6

PR208

PC216

SVD SVC

1 2

PR204

22K_0402_1%

1 2

PC205

1000P_0402_50V7K

PR205

2_0402_5%

1 2

PC207

0.1U_0402_10V7K

12

PU201

1

OFS/VFIXEN

2

PGOOD

3

PWROK

4

SVD

5

SVC

6

ENABLE

7

RBIAS

8

OCSET

9

VDIFF0

10

FB0

11

COMP0

12

VW0

D D

VFIX_EN41

Connect to EC Pin 110.

2

G

ISL6265_PWROK

13

D

PQ115

S

SSM3K7002FU_SC70-3

CPU_B+

+5VS

+3VS

C C

VGATE41

SB_PWRGD6,27,41

CPU_SVD6

CPU_SVC6

VR_ON41

PR225

1 2

255_0402_1%

PR227

1 2

1K_0402_1%

PR230

1 2

54.9K_0402_1%

54.9K_0402_1% PC227

B B

PC227 180P_0402_50V8J

180P_0402_50V8J

CPU_VDD0_FB_H6

CPU_VDD0_FB_L6

CPU_VDD1_FB_L6

CPU_VDD1_FB_H6

PR216

PC223

1 2

4700P_0402_25V7K

PC225

1 2

1200P_0402_50V7K

1 2

12

10K_0402_1%

1 2

PR234 100K_0402_5%

1 2

PR218 0_0402_5%PR218 0_0402_5%

1 2

PR222 0_0402_5%PR222 0_0402_5%

PR223

1 2

34.8K_0402_1%~N

12

48

47

VIN

ISP0

14

13

ISP 0

+CPU_CORE_0

VSEN0

12

PC238

PC238 1000P_0402_50V7K

1000P_0402_50V7K

@

RTN0

RTN1

12

PC239

PC239 1000P_0402_50V7K

1000P_0402_50V7K

@

VSEN1

4

12

PC208

PC209

1200P_0402_50V7K

33P_0402_50V8K

12

PR210

44.2K_0402_1%

46

44

45

VCC

FB_NB

FSET_NB

COMP_NB

ISL6265IRZ-T_QFN48_6X6

RTN1

VSEN0

RTN016ISN0

17

15

12

PR209 0_0402_5%PR209 0_0402_5%

PR206 0_0402_5%PR206 0_0402_5%

RTN_NB

VSEN_NB

42

43

VSEN_NB

VSEN1

19

18

4.7UH_SIQB74B-4R7PF_4A_20%

12

10U_0805_10V6K

12

PR207

15.4K_0402_1%

LGATE NB

39

40

41

RTN_NB

PGND_NB

LGATE_NB

OCSET_NB

VDIFF1

VW1

COMP121ISP1

FB1

22

20

+

PC201

PHASE NB

1

2

38

PHASE_NB

23

PL201

PC202

PC202 220U_B2_2.5VM

220U_B2_2.5VM

PC206

0.1U_0603_16V7K

PR211

1_0603_5%

UGATE NB

37

BOOT_NB

UGATE_NB

BOOT0 UGATE0 PHASE0

PGND0 LGATE0

PVCC

LGATE1

PGND1 PHASE1 UGATE1

BOOT1

ISN1

TP

24

49

12

BOOT_NB1

12

BOOT_NB

36 35

UGATE0

34

PHASE0

33 32

LGATE0

31 30

LGATE1

29 28

PHASE1

27

UGATE1

26

BOOT1

25

+CPU_CORE_1 ISP 1

6.81K_0402_1%

BOOT0

1 2

PR228

2.2_0603_5%

PC230

1000P_0402_50V7K

12

PR236

3

AO4468_SO8

1 2 3 6

4

LGATE NB

0.22U_0603_10V7K

2.2_0603_5%

2.2_0603_5% PR214

PR214

1 2

0_0603_5%

PR219

FDS6676AS_SO8

PR226

1 2

0_0603_5%

1 2

PC224

0.22U_0603_10V7K

PC232

1200P_0402_50V7K

4700P_0402_25V7K

PC233

PQ201

8 7

5

+5VS

12

PC210

2.2U_0603_6.3V6K

PC217

1 2

PQ204

PC231

180P_0402_50V8J

12

PR238

54.9K_0402_1%

12

PR240

1K_0402_1%

PR243

255_0402_1%

12

AO4466_SO8

1 2 3 6

PR203

0_0402_5%

PHASE NB

UGATE0_1

578

3 6

241

UGATE1_1

578

3 6

241

FDS6676AS_SO8

12

PQ202

4

1 2

UGATE NB

PQ207

8 7

5

PC203

PC203 2200P_0402_50V7K

2200P_0402_50V7K

5

D8D7D6D

S1S2S3G

4

578

3 6

241

5

4

578

3 6

241

12

PC241

820P_0402_50V7K

PQ203

PQ203 SI4684DY-T1-E3_SO8

SI4684DY-T1-E3_SO8

PQ205

FDS6676AS _SO8

PQ206

D8D7D6D

SI4684DY-T1-E3_SO8

S1S2S3G

PQ208

FDS6676AS _SO8

2

12

PC242

3300P_0402_50V7-K

12

PR220

4.7_1206_5%

12

CPU_B+

12

PC204

4.7U_0805_25V6-K

12

PC234

PC235

4.7U_0805_25V6-K

0.36UH_PCMC104T-R36MN1R17_30A_20%

PC218

PC219

0.1U_0603_25V7K

680P_0603_50V8J

12

PC221

PC220

4.7U_0805_25V6-K

PR229

4.7_1206_5%

PC226

PC226 680P_0603_50V8J

680P_0603_50V8J

0.1U_0603_25V7K

CPU_B+

12

PC213

PC212

4.7U_0805_25V6-K

12

PL203

PR221

PR217

4.02K_0402_1%

16.5K_0402_1%

1 2

ISP 0

12

PC222

2200P_0402_50V7K

4.7U_0805_25V6-K

0.36UH_PCMC104T-R36MN1R17_30A_20%

12

PR231

16.5K_0402_1%

4.02K_0402_1%

1 2

PC229

ISP 1

SMB3025500YA_2P

12

PC214

2200P_0402_50V7K

12

PC237

4.7U_0805_25V6-K

PL204

PR233

1 2

12

PC236

12

PL202

PC243

4.7U_0805_25V6-K

1

12

1

+

PC240

2

68U_25V_M_R0.44

12

PC244

820P_0402_50V7K

3300P_0402_50V7-K

1

+

PC211

2

68U_25V_M_R0.44

+CPU_CORE_0

CPU_B+

+CPU_CORE_1

12

PC215

1000P_0402_50V7K

B+

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/11/23 2007/11/23

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

+CPU_CORE

Size Document Number Rev

Date: Sheet

2

Date: Sheet

LA-4092P

51 53Thursday, February 21, 2008

1

0.2

of

A

1 1

PR701

0_0402_5%

1000P_0402_50V7K@

+5VALW

12

1 2

PC701

+VGA_COREP1

12

PR714

0_0402_5%

12

+VGA_CORE

10K_0402_1%

12

PR713

10_0402_5%

+VGA_COREP

1 2

PR708

1 2

PC713

@1000P_0402_50V7K

PR711

37.4K_0402_1%

SSM3K7002FU_SC70-3

PR705

PR705 255K_0402_1%

255K_0402_1%

1 2

12

PQ703

SUSP#33,36,41,44,46,49

2 2

+VGA_COREP

3 3

0_0402_5%

316_0402_1%

PR703

12

1U_0603_10V6K

PR702

PC702

B

PU701

2 3 4 5 6

12

PR712

49.9K_0402_1%

13

D

G

S

TON VOUT V5FILT VFB PGOOD

2

1

15

TP

EN_PSV

GND7PGND

PR717

1 2

10K_0402_1%

12

PC715

0.022U_0402_16V7K

BST_VGA

1 2

PR704

0_0402_5%

14

VBST

DRVH

LL

TRIP

V5DRV

DRVL

8

TPS51117RGYR_QFN14_3.5x3.5

+5VALW

12

13

D

S

DH_VGA

13

LX_VGA

12 11

+5VALW

10 9

DL_VGA

PR716

PR716 100K_0402_5%

100K_0402_5%

PQ704

PQ704 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

2

G

1 2

PC706

0.1U_0402_10V7K

12

PC707

4.7U_0805_10V6K

1 2

PR715

0_0402_5%

1 2

PR707

PR707 0_0402_5%

0_0402_5%

1 2

PR706

17.4K_0402_1%

VGA_PWRSEL 16

DH_VGA_1

C

PL701

HCB1608KF-121T30_0603

4.7U_0805_25V6-K

4.7U_0805_25V6-K PC704

PC704

12

PL702

1 2

PR710

4.7_1206_5%

PC709

PC709 680P_0603_50V7K

680P_0603_50V7K

1 2

2200P_0402_50V7K

PC710

OCP=10.098(min) MOSTemperature Factor=1.3 (100C)

578

3 6

578

3 6

241

VGA_B+

4.7U_0805_25V6-K

12

PQ701

PQ701 AO4466_SO8

AO4466_SO8

PQ702

PQ702 FDS6690AS_NL_SO8

FDS6690AS_NL_SO8

PC703

12

1UH_PCMC063T-1R0MN_11A_20%

12

1 2

D

B+

12

PC705

PC705 680P_0402_50V7K@

680P_0402_50V7K@

+VGA_COREP

1

+

PC708

330U_4V_M

2

PJP701

4 4

A

+VGA_COREP

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m PJP702

PJP702

1 2

PAD-OPEN 4x4m

+VGA_CORE

(7A,280mils ,Via NO.= 14)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2007/05/29 2008/05/29

High: VGA_CORE 0.9V Low: VGA_CORE 1.1V

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

VGA_CORE

LA-4092P

D

of

52 53Thursday, February 21, 2008

of

52 53Thursday, February 21, 2008

of

52 53Thursday, February 21, 2008

0.1

A

B

Version Change List ( P. I. R. List ) for Power Circuit

C

D

E

Page#

1

1 1

2 2

11 51

12

13

14 45

15

48

246

347

447

547

647

747

49

8

49

9

46

51

47

Title

Charger 10/30 Compal for power requset PQ104 swap the PQ104 1,3 Pin

3V/5V 10/30 Compal for power requset Change PR301 to 13.7K modify output voltage

3V/5V 10/30 Compal for power requset Change PR305 to 180K modify OCP

3V/5V 10/30 Compal for power requset Change PR306 to 150K modify OCP

3V/5V 10/30 Compal for power requset Change PR311 to 620K

3V/5V 10/30 Compal for power requset Change PR315 to 604K modify sequence

+1.1VSP 10/30 Compal for power requset Change PR510 to 19.1K modify OCP

+1.2VALWP 10/30 Compal for power requset Change PR511 to 19.1K modify OCP

Charger 10/3010Compal for power requset Del PR119

CPU_CORE 10/30 Compal for power requset Change PC202 to B2 type for ME limit

CPU_CORE 10/30 Compal for power requset Change PR223 to 17.8K and PR224 to 100K modify OCP

CPU_CORE 10/30 Compal for power requset Change PR221,PR231 to 16.5K and PR217,PR233 to 4.02K

DC connector 10/30 Compal for power requset Add PR3,PD4,PC12 for ADP_ID function

3V/5V 10/30 Compal for power requset Add PR317,PR318

Date

10/231.8VP for power requsetCompal

Request Owner

Solution Description

PU401 change the IC from "S IC RT8204PQW WQFN 16P" to "S IC TPS51117RGYR QFN 14P".

for CPU_CORE compensation

Rev.Issue DescriptionItem

16

3 3

17

18

19

20

21

22

23

4 4

46

49

46

50

46

49

51

49

Charger 10/30 Compal for power requset Change net from +3VLP to +3VL

+1.1VSP 10/30 Compal for power requset Change PR513 to 21K for HW power scquence.

Charger 11/09 Compal for power requset Pop PR119 Unpop PR9

0.9VSP 11/09 Compal for power requset Change PC601,PC605,PC611,PC603,PC613,PC614,PC612, PC201 for common part

Charger 11/09 Compal for power requset Change PR112 to 0.015 Ohm

+1.2VALWP 11/09 Compal for power requset Change PC508 to D2 size for ME limit

CPU_CORE 12/05 Compal for EMI requset Add PR220,PR229 for EMI

CPU_CORE 12/05 Compal for EMI requset Add PC218,PC226 for EMI

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Power Changed-List History-1

LA-4111P

E

of

53 52Thursday, February 21, 2008

0.1

A

B

Version Change List ( P. I. R. List ) for Power Circuit

C

D

E

Page#

1

1 1

2 2

46

247

347

448

552

652

752

845

946

10 47

Title

3V/5V 12/05 Compal for power requset Change PR302 to 30.9K for common part

3V/5V 12/05 Compal for power requset Change PR304 to 20K for common part

+1.8VP 12/05 Compal for power requset Change PR408 to 18.2K modify OCP

VGA_CORE 12/05 Compal for power requset Change PR306 to 150K modify OCP

VGA_CORE 12/05 Compal for power requset Change PR714 to 0 Ohm

VGA_CORE 12/05 Compal for power requset Add PR713 100 Ohm

DC Connector /CPU_OTP

Charger 12/25 Compal for power requset Reconnect from BQ24740VREF to +3VL

3V/5V 12/25 Compal for power requset Add PU302

5211

5112

4813

4814

5115

Date

12/05Charger for power requsetCompal

12/25 Compal for power requset Del PR9

12/25VGA_CORE

12/27CPU_CORE

1/2+1.8VP

1/2CPU_CORE

Request Owner

Solution Description

Change PR120 to 133K to change charger current

Del PC714 Change PC715 to 0.022u & PR713 to 10 Ohmfor power requsetCompal

ADD PC204 & PC211 68uFfor power requsetCompal

Add PR410 4.7ohm and PC410 680Pfor EMI requsetCompal

Add PC405 680P and 408 3.3nFfor EMI requsetCompal

ADD PC241 820p & PC242 3300pfor EMI requsetCompal

Rev.Issue DescriptionItem

5216

3 3

4 4

17

18

51

A

1/2VGA_CORE

1/2CPU_CORE

1/3CPU_CORE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Add PR710 and PC709for EMI requsetCompal

ADD PC243 to 3.3n PC244 to 820pfor EMI requsetCompal

ADD PR234 & PQ115for power requsetCompal

Compal Secret Data

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Power Changed-List History-1

LA-4111P

E

of

54 54Thursday, February 21, 2008

0.1

5

4

3

2

1

HW4 Product Improvement Record (P.I.R.)

1. Change R538 Pull high from +3VL to +3VALW

2. New add R563,R571 Pull high +3VS

D D

3. Unmount BKOFF# Pull high R483

4. Unmount CPU_LDT_REQ# Pull high R318

5. Change LED1 P/N to SC500004C00

6. Change JP36 Pin2 from +5VS_LED to +5VALW_LED

7. Change C1012 & C1013 from 4700P to 1000P

8. Change R186 size from 0603 to 0402

9. Delete TV function and relation component

10. Add R554 for CIR pull high

11.Add C327 on BATT_OVT

12.Change L57 & L59 to 0603 BLM18PG121SN1D

13. exchange TV & WLAN mini card location

14.add LAN cable detect circuit

15.update ODD CONN footporint and symbol

C C

16.delete Lid switch baord Conn

17.Change Cap sensor board power to +3VL to support Qplay boot

B B

ZZZ2

RTC

RTC45@

ZZZ

PCB

PCB 03X LA-4092P REV0 M/B

A A

PCB 03X LA-4092P REV0 M/B

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2008/5/182007/5/18

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PIR

55 54Thursday, February 21, 2008

1

0.4

of

COMPAL LA-4092P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual