COMPAL LA-3861P Schematics

A

http://shop36609371.taobao.com ; Email:[e-mail]

ZZZ2

ZZZ1

ZZZ1

PCB

PCB

1 1

ZZZ2

PCB

PCB

DAZ@

DAZ@

ZZZ3

ZZZ3

SW

SW

DAZ@

DAZ@

ZZZ4

ZZZ4

USB

USB

DAZ@

DAZ@

ZZZ5

ZZZ5

AUDIO

AUDIO

DAZ@

DAZ@

B

C

D

E

SE000008600

Compal Confidential

2 2

Tanglha Schematics Document

3 3

Intel Merom Processor with Crestline + DDRII + ICH8M

2007-08-16

REV: 1.0

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/08/18 2007/8/18

2006/08/18 2007/8/18

2006/08/18 2007/8/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

LA-3861P

LA-3861P

LA-3861P

0.1

0.1

1 47Monday, September 03, 2007

1 47Monday, September 03, 2007

1 47Monday, September 03, 2007

E

0.1

A

http://shop36609371.taobao.com ; Email:[e-mail]

Compal Confidential

B

C

D

E

Model Name : Everest
File Name : LA-3691P

1 1

NB8M

CRT

CRT

page 19

CRT

128M
VGA/B

2 2

LVDS

LCD Conn.

New Card
Socket

page 33

page 18

MINI Card

WLAN,
3G/TV-Tuner
Robson

page 32

LVDS

PCI-Express

PCI-Express

LAN(10/100M)

BCM5906

page 30

Intel Merom Processor

uPGA-478 Package

H_A#(3..35) H_D#(0..63)

667/800MHz

page 4,5,6

FSB

Intel Crestline

uFCBGA-1299

page 7,8,9,10,11,12,13

DMI
X4 mode

Intel ICH8-M

BGA-676

page 20,21,22,23

LPC BUS

3.3V 48MHz

3.3V 24.576MHz/48Mhz

3.3V ATA-100

S-ATA

Memory BUS(DDRII)

Dual Channel

1.8V DDRII 533/667

USB conn x2
TO M/B

page 33

USB conn x2
TO I/O/B

USB

IDE

port 0

S-ATA HDD
Conn.

page 24

200pin DDRII-SO-DIMM X2

BANK 0, 1, 2, 3

Bluetooth

page 37 page 33

Conn

HD Audio

page 14,15

Card Reader

MDC 1.5
Conn

page 42

CDROM
Co

nn.

page 24

RTS 5158

page 28

HDA Codec

ALC861VD

page 38

3 in 1
socket

CMOS
Camera

page 29

page 24

Audio AMP

RJ45

3 3

page 31

page 39

BIOS

page 36

Int SPK

Mic/Int

Mic/ExtLine-out

Sub BD

Fan Control

page 4

Clock Generator

ICS9LPRS365

page 16

USB BD

K_SW

USBx2

Audio BD

Touch Pad

page 36

ENE KB926

page 34

SPI ROM

Int.KBD

page 35

Thermal Sensor

4 4

ADM1032

page 4

SW Board

Power circuit

page X

HDD/ODD NUM CAP Scroll PowerUserMute

MB

A

NOVO

Power Battery W/L

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/08/18 2007/8/18

2006/08/18 2007/8/18

2006/08/18 2007/8/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

Block Diagrams

Block Diagrams

LA-3861P

LA-3861P

LA-3861P

2 47Monday, August 20, 2007

2 47Monday, August 20, 2007

2 47Monday, August 20, 2007

E

0.1

0.1

0.1

A

http://shop36609371.taobao.com ; Email:[e-mail]

B

C

D

E

1 1

2 2

Voltage Rails

VIN

B+

+CPU_CORE

+1.05VS

+1.5VS

+1.8V

+2.5VS

+3VALW

+3VS

+5VALW

+5VS

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

DescriptionPower Plane

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

0.9V switched power rail for DDR terminator+0.9VS

1.05V switched power rail

1.5V switched power rail

1.8V power rail for DDR

1.8V switched power rail+1.8VS

2.5V switched power rail

3.3V always on power rail

3.3V switched power rail

5V always on power rail

5V switched power rail

RTC power+RTCVCC

SLP_S3#SLP_S1#

SLP_S4#

SLP_S5#

HIGHHIGHHIGHHIGH

HIGH HIGH HIGH

LOW

HIGH

LOW

LOW

LOW LOW LOW

HIGH

HIGH

LOWLOWLOW

LOW

S3S1

N/A N/A N/A

OFFON

OFFON

ON1.25V switched power rail+1.25VS

ON

ON

OFF

ON

ON

OFF

ON

OFF

ON

ON

ON

OFF

ON OFF

ONONON

+VALW

+V +VS Clock

ON

ON

ON

ON

ON

ON

ON

OFF

ON

OFF

S5

N/AN/AN/A

OFF

OFF

OFFOFFON

OFFOFF

OFFOFFON

OFF

OFF

OFF

ON*ON

OFF

ON*

ON*ONVSB always on power rail+VSB

ON

ON

OFF

OFF

OFF

ONON

LOW

OFF

OFF

OFF

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices

DEVICE REQ/GNT #

IDSEL #

PIRQ

No PCI Device

EC SM Bus1 address

Device

Smart Battery

EEPROM(24C16/02)

Address

1010 000X b

EC SM Bus2 address

Device

GMT-781

NVIDIA NB8X

Address

1001 100X b0001 011X b

3 3

BOARD ID Table

ID1

0(R744)

1(R741)

ID0

0(R745)
1(R742)0(R744)
0(R745)

TEST

A-TEST
B-TEST
C-TEST

ICH8M SM Bus address

Device

Clock Generator
(ICS9LPRS325AKLFT_MLF72 )

DDR DIMM0

DDR DIMM1

Address

1101 001Xb

1010 000Xb

1010 010Xb

PANEL ID Table

R

Ra (R743)

4 4

A

Size

15W
14WRb (R740)

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/08/18 2007/8/18

2006/08/18 2007/8/18

2006/08/18 2007/8/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

Notes List

Notes List

LA-3861P

LA-3861P

LA-3861P

0.1

0.1

3 47Monday, August 20, 2007

3 47Monday, August 20, 2007

3 47Monday, August 20, 2007

E

0.1

5

http://shop36609371.taobao.com ; Email:[e-mail]

4

3

2

1

Place close to CPU within 500mil

H_A#[3..35 ](7)

H_REQ#[0 ..4](7)

H_RS#[0..2 ](7)

D D

C C

B B

A A

H_A#[3..35 ]

H_REQ#[0 ..4]

H_RS#[0..2 ]

JP15A

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15

H_ADSTB #0(7)

H_ADSTB #1(7)

H_A20M#(2 1)

H_FERR#(21)

H_IGNNE#(21)

H_STPCL K#(21)

H_INTR(21)

H_NMI(21)

H_SMI#(21)

H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_PROCH OT# OCP#

JP15A

J4

ADDR GROUP 0 ADDR GROUP 1

ADDR GROUP 0 ADDR GROUP 1

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4
AB2
AA3

V1

A6
A5
C4

D5
C6
B4
A3

M4
N5
T2
V3
B2
C3
D2

D22

D3
F6

FOX_PZ4 782A-274M-41_M erom

FOX_PZ4 782A-274M-41_M erom

ME@

ME@

+VCCP

12

B

B

2

E

E

3 1

Q4

@

Q4

@

MMBT390 4_SOT23

MMBT390 4_SOT23

A[33]#
A[34]#
A[35]#
ADSTB[1]#

A20M#
FERR#
IGNNE#

STPCLK#
LINT0
LINT1
SMI#

RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
RSVD[10]

R68

R68

56_0402 _5%@

56_0402 _5%@

C

C

THERMAL

THERMAL

PROCHOT#

ICH

ICH

THERMTRIP#

RESERVED

RESERVED

ADS#
BNR#

BPRI#

DEFER#

DRDY#
DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

CONTROL

RESET#

RS[0]#
RS[1]#
RS[2]#

TRDY#

HIT#

HITM#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#
PREQ#

TCK

TDO
TMS

TRST#

DBR#

XDP/ITP SIGNALS

XDP/ITP SIGNALS

THERMDA
THERMDC

H CLK

H CLK

BCLK[0]
BCLK[1]

OCP# (22 )

H1
E2
G5

H5
F21
E1

F1

H_IERR#

D20
B3

H4

H_RESET #

C1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1

XDP_TCK

AC5

XDP_TDI

AA6

TDI

AB3
AB5
AB6
C20

D21
A24
B25

C7

A22
A21

XDP_TDO
XDP_TMS
XDP_TRS T#

XDP_DBR ESET#

H_PROCH OT#

R70 56_0402 _5%

R70 56_0402 _5%

H_THERM DA
H_THERM DC

H_ADS# (7)
H_BNR# (7)
H_BPRI# (7 )

H_DEFER # (7)
H_DRDY# (7)
H_DBSY# (7)

H_BR0# (7)

R73 56 _0402_5%

R73 56 _0402_5%

12

H_INIT# (21)

H_LOCK# (7 )

H_RESET # (7)

H_TRDY# (7)

H_HIT# (7)
H_HITM# (7)

<BOM Struc ture>

<BOM Struc ture>

+VCCP

ESD concern

T5T5
T12T12
T10T10
T11T11
T8T8

Connect SB SYS_RESET# or just left NC

XDP_DBR ESET# (22)

H_PROCH OT# (46)

12

+VCCP

<BOM Struc ture>

<BOM Struc ture>

H_THERM TRIP# (8,21)

CLK_CPU _BCLK (16)
CLK_CPU _BCLK# (16 )

ESD Concern

U19

H_THERM DA

C328

C328

1 2

EC_SMB_ CK2(32)

EC_SMB_ DA2(32)

H_THERM DC

2200P_0 402_50V7K

2200P_0 402_50V7K

EC_SMB_ DA2

U19

2

3

8

7

G781F_S OP8

G781F_S OP8

Address:100_1100

<BOM Struc ture>

<BOM Struc ture>

FAN1 Conn

H_THERMDA, H_THERMDC routing together,
Trace width / Spacing = 10 / 10 mil

+5VS

+VCC_FA N1

EN_FAN1(32)

EN_FAN1

Thermal control Request

FAN_SPE ED1(32)

XDP Reserve

XDP_TDI

XDP_TMS

XDP_TDO

XDP_HOO K1

XDP_TRS T#

XDP_TCK

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

VDD1

D+

ALERT#

D-

THERM#

SCLK

GND

SDATA

C100 1U _0603_10V4ZC100 1U _0603_10V4Z

U6

U6

1

VEN

2

VIN

3

VO

4

VSET

G993P1U F_SOP8

G993P1U F_SOP8

<BOM Struc ture>

<BOM Struc ture>

+3VS

12

R276

R276
1K_0402 _5%

1K_0402 _5%

<BOM Struc ture>

<BOM Struc ture>

1

C341

C341
100P_04 02_50V8J

100P_04 02_50V8J

<BOM Struc ture>

<BOM Struc ture>

2

R33 150_040 2_1%

R33 150_040 2_1%

1 2

R32 39_0402 _1%

R32 39_0402 _1%

1 2

R31 54.9_040 2_1%@R31 54.9_040 2_1%@

1 2

<BOM Struc ture>

<BOM Struc ture>

R28 54.9_040 2_1%@R28 54.9_040 2_1%@

1 2

R27 54.9_040 2_1%@R27 54.9_040 2_1%@

1 2

R24 560_040 2_5%

R24 560_040 2_5%

1 2

R17 27_0402 _5%

R17 27_0402 _5%

1 2

<BOM Struc ture>

<BOM Struc ture>

+3VS

C327

C327

1 2

1

THERM_S CI#

6

THERM#EC_SMB_ CK2

4

5

8

GND

7

GND

6

GND

5

GND

<BOM Struc ture>

<BOM Struc ture>

<BOM Struc ture>

<BOM Struc ture>

1 2

R267 0_0402_ 5%@R267 0_0402_ 5%@

40mil

+VCC_FA N1

+VCCP

R268

R268
10K_040 2_5%

10K_040 2_5%

12

12

R26910K_0402_5% R26910K_0402_5%

+5VS

12

D8

D8

1SS355_ SOD323

1SS355_ SOD323

@

@

1 2

1000P_0 402_50V7K

1000P_0 402_50V7K

<BOM Struc ture>

<BOM Struc ture>

+3VS

Check : to sb

DIODE
Closed to
Connector

D7

1N4148_ SOT23@D71N4148_ SOT23@

C94

C94

1U_0603 _10V4Z

1U_0603 _10V4Z

C358

C358

1 2

JP17

JP17

1
2
3

4
5

ACES_85 205-03001

ACES_85 205-03001

ME@

ME@

EC_THER M# (22,32)

1
2
3

GND
GND

Security Class ification

Security Class ification

Security Class ification

2006/08/ 18 2007/8/1 8

2006/08/ 18 2007/8/1 8

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/ 18 2007/8/1 8

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

B

B

B

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Merom (1/3)

Merom (1/3)

Merom (1/3)

LA-3861P

LA-3861P

LA-3861P

0.1

0.1

0.1

of

4 47Monday, August 2 0, 2007

4 47Monday, August 2 0, 2007

4 47Monday, August 2 0, 2007

1

5

http://shop36609371.taobao.com ; Email:[e-mail]

4

3

2

1

H_D#[0..63 ]

JP15B

H_D#0

PAD

PAD

PADT2PAD
PAD

PAD

H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

GTL_REF

TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

D D

H_DSTBN #0(7) H_DSTBN #2 (7)
H_DSTBP #0(7) H_DSTBP#2 (7)

H_DINV#0(7)

Close to CPU pin AD26
within 500mils.

C C

Width=20 mil

B B

layout note: Route TEST3 & TEST5 traces on ground ref

+VCCP

R263

R263
1K_0402 _1%

1K_0402 _1%

<BOM Struc ture>

<BOM Struc ture>

R261

R261
2K_0402 _1%

2K_0402 _1%

<BOM Struc ture>

<BOM Struc ture>

1 2

R76 1K_0402 _5%@R76 1K_0402 _5%@
R67 1K_0402 _5%@R67 1K_0402 _5%@

C303 0.1U_040 2_16V4Z@C303 0.1U_0402_16V 4Z@

1 2

H_DSTBN #1(7) H_DSTBN #3 (7)
H_DSTBP #1(7) H_DSTBP#3 (7)

H_DINV#1(7)

12
12

T14

T14

1 2

T2
T13

T13

CPU_BSE L0(16)
CPU_BSE L1(16)
CPU_BSE L2(16)

CPU_BSEL CPU_BSEL2 CPU_BSEL1

JP15B

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H22

D[12]#

F26

D[13]#

K22

D[14]#

H23

D[15]#

J26

DSTBN[0]#

H26

DSTBP[0]#

H25

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L23

D[20]#

M24

D[21]#

L22

D[22]#

M23

D[23]#

P25

D[24]#

P23

D[25]#

P22

D[26]#

T24

D[27]#

R24

D[28]#

L25

D[29]#

T25

D[30]#

N25

D[31]#

L26

DSTBN[1]#

M26

DSTBP[1]#

N24

DINV[1]#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

FOX_PZ4 782A-274M-41_M erom

FOX_PZ4 782A-274M-41_M erom

ME@

ME@

MISC

MISC

DATA GRP 0

DATA GRP 0

DATA GRP 1

DATA GRP 1

DATA GRP 2

DATA GRP 2

DSTBN[2]#
DSTBP[2]#

DSTBN[3]#

DATA GRP 3

DATA GRP 3

DSTBP[3]#

DPRSTP#

PWRGOOD

erenced layer to the TPs

CPU_BSEL0

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#

DINV[2]#

D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#

DINV[3]#

COMP[0]
COMP[1]
COMP[2]
COMP[3]

DPSLP#

DPWR#

SLP#

PSI#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP0
COMP1
COMP2
COMP3

H_PW RGOOD
H_CPUSL P#

H_DINV#2 (7)

R266 27.4 _0402_1%

R266 27.4 _0402_1%
R264 54.9 _0402_1%

R264 54.9 _0402_1%
R35 27.4_040 2_1%

R35 27.4_040 2_1%
R39 54.9_040 2_1%

R39 54.9_040 2_1%

H_DINV#3 (7)

1 2
1 2
1 2

<BOM Struc ture>

<BOM Struc ture>

1 2

<BOM Struc ture>

<BOM Struc ture>
<BOM Struc ture>

<BOM Struc ture>
<BOM Struc ture>

<BOM Struc ture>

H_DPRST P# (8,21,4 6)
H_DPSLP # (21)
H_DPW R# (7)
H_PW RGOOD (21)
H_CPUSL P# (7 )
H_PSI# (46)

H_D#[0..63 ] (7 )

Resistor placed within

0.5" of CPU pin.Trace
should be at least 25
mils away from any other
toggling signal.
COMP[0,2] trace width is
18 mils. COMP[1,3] trace
width is 4 mils.

+CPU_CO RE

JP15C

JP15C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

B7

VCC[010]

B9

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA7

VCC[051]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

FOX_PZ4 782A-274M-41_M erom

FOX_PZ4 782A-274M-41_M erom

VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

VCCA[01]
VCCA[02]

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

VCCSENSE

VSSSENSE

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

AF7

AE7

.

.
ME

ME

@

@

+CPU_CO RE

VCCSENS E

VSSSENS E

Place this cap more close to
B26/C26 rather than 10UF

20mils

1

C326

CPU_VID0 (46)
CPU_VID1 (46)
CPU_VID2 (46)
CPU_VID3 (46)
CPU_VID4 (46)
CPU_VID5 (46)
CPU_VID6 (46)

1 2

R13 100_040 2_1%

R13 100_040 2_1%

R14 100_040 2_1%<B OM Structure>R14 100_040 2_1%<B OM Structure>

1 2

C326

<BOM Struc ture>

<BOM Struc ture>

2

0.01U_04 02_16V7K

0.01U_04 02_16V7K

<BOM Struc ture>

<BOM Struc ture>

1

+

+

C317

C317

330U_V_ 2.5VM

330U_V_ 2.5VM

2

1

<BOM Struc ture>

<BOM Struc ture>

2

+CPU_CO RE

VCCSENS E (46 )

VSSSENS E (46)

+VCCP

+1.5VS

C325

C325

10U_080 5_10V4Z

10U_080 5_10V4Z

166

200

0 1

0

1

1

0

Length match within 25 mils.
The trace width/space/other is
20/7/25.

Close to CPU pin

A A

Security Class ification

Security Class ification

Security Class ification

2006/08/ 18 2007/8/1 8

2006/08/ 18 2007/8/1 8

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/ 18 2007/8/1 8

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

within 500mils.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

B

B

B

LA-3861P

LA-3861P

LA-3861P

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Merom (2/3)

Merom (2/3)

Merom (2/3)

5 47Monday, August 2 0, 2007

5 47Monday, August 2 0, 2007

5 47Monday, August 2 0, 2007

1

0.1

0.1

0.1

5

http://shop36609371.taobao.com ; Email:[e-mail]

4

3

2

1

+CPU_CO RE

JP15D

JP15D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

D D

C C

B B

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]
VSS[081]P3VSS[162]

FOX_PZ4 782A-274M-41_M erom

FOX_PZ4 782A-274M-41_M erom

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]

VSS[163]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

.

.
ME

ME

@

@

330U_V_ 2.5VM

330U_V_ 2.5VM

3 x 330uF(9mOhm/2)

1

+

+

C298

C298

330U_V_ 2.5VM

330U_V_ 2.5VM

2

+CPU_CO RE

1

C26

C26

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

+CPU_CO RE

1

C56

C56

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

+CPU_CO RE

1

C315

C315

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

+CPU_CO RE

1

C313

C313

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

+CPU-CORE
Decoupling
SPCAP,Polymer

MLCC 0805 X5R

1

+

+

C324

C324

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

+

+

C297

C297

2

330U_V_ 2.5VM

330U_V_ 2.5VM

South Side Secondary North Side Secondary

1

C27

C27

10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C28

C28

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

10U_080 5_6.3V6M

10U_080 5_6.3V6M

(Place these capacitors on South side,Secondary Layer)

1

C55

C55

10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C54

C54

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

10U_080 5_6.3V6M

10U_080 5_6.3V6M

(Place these capacitors on North side,Secondary Layer)

1

C316

C316

10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

(

Place these capacitors on South side,Primary Layer)

1

C314

C314

10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C305

C305

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C323

C323

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

10U_080 5_6.3V6M

10U_080 5_6.3V6M

10U_080 5_6.3V6M

10U_080 5_6.3V6M

(Place these capacitors on North side,Primary Layer)

C,uF ESR, mohm ESL,nH

6X330uF 9m ohm/6 1.8nH/6

32X22uF 3m ohm/32 0.6nH/32

32X10uF 3m ohm/32 0.6nH/32

+VCCP

1

2

C38

C38

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

C43

C43

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

C58

C58

2

+CPU_CO RE

1

+

+

C332

C332

330U_V_ 2.5VM

330U_V_ 2.5VM

2

1

C29

C29

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C53

C53

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C306

C306

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C322

C322

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C24

C24

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

3 x 330uF(9mOhm/2)

1

+

+

C331

C331

2

330U_V_ 2.5VM

330U_V_ 2.5VM

1

C30

C30

2

1

C52

C52

2

1

C307

C307

2

1

C321

C321

2

1

10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C39

C39

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

C31

C31

C51

C51

C308

C308

C320

C320

1

2

1

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

C45

C45

C32

C32

10U_080 5_6.3V6M

10U_080 5_6.3V6M

C50

C50

10U_080 5_6.3V6M

10U_080 5_6.3V6M

C309

C309

10U_080 5_6.3V6M

10U_080 5_6.3V6M

C319

C319

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C33

C33

2

1

C49

C49

2

1

C310

C310

2

1

C318

C318

2

/25 10U checked. OK for use!

9

A A

Security Class ification

Security Class ification

Security Class ification

2006/08/ 18 2007/8/1 8

2006/08/ 18 2007/8/1 8

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/ 18 2007/8/1 8

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

B

B

B

Date: Sheet of

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

Merom (3/3)

Merom (3/3)

Merom (3/3)

LA-3861P

LA-3861P

LA-3861P

0.1

0.1

0.1

of

6 47Monday, August 2 0, 2007

6 47Monday, August 2 0, 2007

6 47Monday, August 2 0, 2007

1

5

http://shop36609371.taobao.com ; Email:[e-mail]

4

3

2

1

U20A

M10
N12

P13

W10

AD12

AE3
AD9
AC9

AC7
AC14
AD11
AC11

AB2

AD7

AB1

AC6

AE2

AC5

AG3

AH8

AJ14

AE9
AE11
AH12

AH5

AE7

AE5

AH2
AH13

E2
G2
G7
M6

H7

H3
G4

F3

N8

H2

N9

H5

K9
M2

Y8

V4
M3

J1
N5
N3

W6
W9

N2
Y7
Y9
P4

W3

N1

Y3

AJ9

AJ5

AJ6

AJ7
AJ2

AJ3

B3
C2

W1
W2

B6
E5

B9
A9

U20A

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_SWING
H_RCOMP

H_SCOMP
H_SCOMP#

H_CPURST#
H_CPUSLP#

H_AVREF
H_DVREF

CRESTLINE _1p0

CRESTLINE _1p0

PM@

PM@

HOST

HOST

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#
H_ADSTB#_0
H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#
H_LOCK#
H_TRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_REQ#_0
H_REQ#_1

H_REQ#_2
H_REQ#_3

H_REQ#_4

H_RS#_0
H_RS#_1
H_RS#_2

J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19

G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7

K5
L2
AD13
AE13

M7
K3
AD2
AH11

L7
K2
AC2
AJ10

M14
E13
A11
H13
B12

E12
D7
D8

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_ADS#
H_ADSTB #0
H_ADSTB #1
H_BNR#
H_BPRI#
H_BR0#
H_DEFER #
H_DBSY#
CLK_MCH _BCLK
CLK_MCH _BCLK#
H_DPW R#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN #0
H_DSTBN #1
H_DSTBN #2
H_DSTBN #3

H_DSTBP #0
H_DSTBP #1
H_DSTBP #2
H_DSTBP #3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

H_D#[0..63 ](5)

D D

+VCCP

12

R279

R279

221_040 2_1%

221_040 2_1%

H_SW NG

1

C360

R282

C C

R282

100_040 2_1%

100_040 2_1%

1 2

C360

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

Near B3 pin

H_RCOMP

12

R283

R283

24.9_040 2_1%

24.9_040 2_1%

layout note:

Route H_SCOMP and H_SCOMP# with
trace width, spacing and
impedance (55 ohm) same as FSB
data traces

B B

+VCCP

R112

R112

1K_0402 _1%

1K_0402 _1%

1 2

12

R117

R117

2K_0402 _1%

2K_0402 _1%

54.9_040 2_1%

54.9_040 2_1%

R164

R164

1

2

+VCCP

1 2

H_RESET #(4)

H_CPUSL P#(5)

C91

C91

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

R168

R168

54.9_040 2_1%

54.9_040 2_1%

1 2

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SW NG
H_RCOMP

H_SCOMP
H_SCOMP #

H_RESET #
H_CPUSL P#

H_VREF

H_A#[3..35 ] (4)

H_ADS# (4)
H_ADSTB #0 (4)
H_ADSTB #1 (4)
H_BNR# (4)
H_BPRI# (4 )
H_BR0# (4)
H_DEFER # (4)
H_DBSY# (4)
CLK_MCH _BCLK (16)
CLK_MCH _BCLK# (16)
H_DPW R# (5)
H_DRDY# (4)
H_HIT# (4)
H_HITM# (4)
H_LOCK# (4 )
H_TRDY# (4)

H_DINV#0 (5)
H_DINV#1 (5)
H_DINV#2 (5)
H_DINV#3 (5)

H_DSTBN #0 (5)
H_DSTBN #1 (5)
H_DSTBN #2 (5)
H_DSTBN #3 (5)

H_DSTBP #0 (5)
H_DSTBP #1 (5)
H_DSTBP #2 (5)
H_DSTBP #3 (5)

H_REQ#[0 ..4] (4)

H_RS#[0..2 ] (4 )

U20

U20

965GM

965GM

GM@

GM@

within 100mil to Ball A9,B9

A A

Security Class ification

Security Class ification

Layout Note:
H_RCOMP / H_VREF / H_SWNG

trace width and spacing is 10/20

5

Security Class ification

2006/08/ 18 2007/8/1 8

2006/08/ 18 2007/8/1 8

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/ 18 2007/8/1 8

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

B

B

B

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Crestline (1/7)-GTL

Crestline (1/7)-GTL

Crestline (1/7)-GTL

LA-3861P

LA-3861P

LA-3861P

1

0.1

0.1

0.1

7 47Monday, August 2 0, 2007

7 47Monday, August 2 0, 2007

7 47Monday, August 2 0, 2007

5

http://shop36609371.taobao.com ; Email:[e-mail]

D D

DDRA_SMA14(14)
DDRB_SMA14(15)

DDRA_SMA14
DDRB_SMA14

9/20 Modify NB symbol for Pin BJ29/BE24/C48/D47

C C

MCH_CLKSEL0(16)
MCH_CLKSEL1(16)

B B

PM_BMBUSY#(22)

H_DPRSTP#(5,21,46)
PM_EXTTS#0(14)

PLT_RST_BUF#(17,20,22,24,25,30)

H_THERMTRIP#(4,21)

PM_EXTTS#1(15)

PM_DPRSLPVR(22,46)

MCH_CLKSEL2(16)

PM_EXTTS#0
PM_EXTTS#1

R176 100_0402_5%

R176 100_0402_5%
R104 0_0402_5%

R104 0_0402_5%

1 2

MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2

MCH_CFG_5

MCH_CFG_7
MCH_CFG_8
MCH_CFG_9

MCH_CFG_12
MCH_CFG_13

MCH_CFG_16

MCH_CFG_19
MCH_CFG_20

GMCH_PWROK
MCH_RSTIN#

If THERMTRIP no used, left NC

Use VGATE for GMCH_PWROK

VGATE(22,46)

ICH_POK(22,32)

A A

VGATE

ICH_POK

1 2

R184 0_0402_5%@R184 0_0402_5%@

1 2

R186 0_0402_5% R186 0_0402_5%

GMCH_PWROK

AR12
AR13
AM12
AN13

AR37
AM36
AL36
AM37

BJ20
BK22
BF19
BH20
BK18

BJ18
BF23
BG23
BC23
BD24

BJ29
BE24
BH39

AW20

BK20

AW49

AV20

BJ51
BK51
BK50
BL50
BL49

P36
P37
R35
N35

D20

H10
B51

C48
D47
B44
C44
A35
B37
B36
B34
C34

P27
N27
N24
C21
C23
F23
N23
G23

C20
R24
L23

E23
E20
K23
M20
M24
L32
N33
L35

G41
L39
L36

N20
G36

BL3
BL2
BK1
BJ1

C51
B50
A50
A49
BK2

4

J12

J20

J23

J36

E1
A5

U20B

U20B

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14

RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
SA_MA_14
SB_MA_14
RSVD34
RSVD35
RSVD36
LVDSA_DATA#_3
LVDSA_DATA_3
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16

CRESTLINE_1p0

CRESTLINE_1p0

PM@

PM@

CFGRSVD

CFGRSVD

PM

PM

NC

NC

DDR MUXINGCLK

DDR MUXINGCLK

DMI

DMI

GRAPHICS VID

GRAPHICS VID

ME

ME

MISC

MISC

SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4

SM_CK#_0
SM_CK#_1
SM_CK#_3

SM_CK#_4

SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4

SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3

SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_VREF_0
SM_VREF_1

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST#
CL_VREF

SDVO_CTRL_CLK

SDVO_CTRL_DATA

CLK_REQ#

ICH_SYNC#

TEST_1
TEST_2

AV29
BB23
BA25
AV23

AW30
BA23
AW25
AW23

BE29
AY32
BD39
BG37

BG20
BK16
BG16
BE13

BH18
BJ15
BJ14
BE16

BL15
BK14

BK31
BL31

AR49
AW4

B42
C42
H48
H47

K44
K45

AN47
AJ38
AN42
AN46

AM47
AJ39
AN41
AN45

AJ46
AJ41
AM40
AM44

AJ47
AJ42
AM39
AM43

E35
A39
C38
B39
E36

AM49
AK50
AT43
AN49
AM50

H35
K36
G39
G40

A37
R32

3

SMRCOMP
SMRCOMP#

SM_RCOMP_VOH
SM_RCOMP_VOL

CLK_DREF_96M
CLK_DREF_96M#
CLK_DREF_SSC
CLK_DREF_SSC#

CLK_MCH_3GPLL
CLK_MCH_3GPLL#

DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3

DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3

DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3

DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3

CL_VREF

SDVO_CTRL_CLK
SDVO_CTRL_DATA
MCH_CLKREQ#

MCH_TEST_1
MCH_TEST_2

DDRA_CLK0 (14)
DDRA_CLK1 (14)
DDRB_CLK0 (15)
DDRB_CLK1 (15)

DDRA_CLK0# (14)
DDRA_CLK1# (14)
DDRB_CLK0# (15)
DDRB_CLK1# (15)

DDRA_CKE0 (14)
DDRA_CKE1 (14)
DDRB_CKE0 (15)
DDRB_CKE1 (15)

DDRA_SCS0# (14)
DDRA_SCS1# (14)
DDRB_SCS0# (15)
DDRB_SCS1# (15)

DDRA_ODT0 (14)
DDRA_ODT1 (14)
DDRB_ODT0 (15)
DDRB_ODT1 (15)

R382 20_0402_1% R382 20_0402_1%

1 2

R381 20_0402_1% R381 20_0402_1%

1 2

SM_VREF

CLK_DREF_96M (16)
CLK_DREF_96M# (16)
CLK_DREF_SSC (16)
CLK_DREF_SSC# (16)

CLK_MCH_3GPLL (16)
CLK_MCH_3GPLL# (16)

DMI_ITX_MRX_N0 (22)
DMI_ITX_MRX_N1 (22)
DMI_ITX_MRX_N2 (22)
DMI_ITX_MRX_N3 (22)

DMI_ITX_MRX_P0 (22)
DMI_ITX_MRX_P1 (22)
DMI_ITX_MRX_P2 (22)
DMI_ITX_MRX_P3 (22)

DMI_MTX_IRX_N0 (22)
DMI_MTX_IRX_N1 (22)
DMI_MTX_IRX_N2 (22)
DMI_MTX_IRX_N3 (22)

DMI_MTX_IRX_P0 (22)
DMI_MTX_IRX_P1 (22)
DMI_MTX_IRX_P2 (22)
DMI_MTX_IRX_P3 (22)

CL_CLK0 (22)
CL_DATA0 (22)
CL_PWROK (22)
CL_RST# (22)

MCH_CLKREQ# (16)
MCH_ICH_SYNC# (22)

R124 0_0402_5%

R124 0_0402_5%
R158 20K_0402_5%

R158 20K_0402_5%

20mil

+1.8V

1

C161

C161

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C142

C142

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

Layout Note:
SM_VREF trace
width and spacing
is 20/20.

+1.8V

R182

R182

1K_0402_1%

1K_0402_1%

1 2

R180

R180

1K_0402_1%

1K_0402_1%

1 2

+1.25VS

R173

R173

1K_0402_1%

1K_0402_1%

1 2

R172

R172

392_0402_1%

392_0402_1%

1 2

+1.8V

R410

R410
1K_0402_1%

1K_0402_1%

R397

R397

3.01K_0402_1%

3.01K_0402_1%

R384

R384
1K_0402_1%

1K_0402_1%

C469

C469

2.2U_0805_10V6K

2.2U_0805_10V6K

C467

C467

2.2U_0805_10V6K

2.2U_0805_10V6K

C465

C465

0.01U_0402_16V7K

0.01U_0402_16V7K

C464

C464

0.01U_0402_16V7K

0.01U_0402_16V7K

CLK_DREF_96M#

CLK_DREF_SSC#

CLK_DREF_96M

CLK_DREF_SSC

SM_RCOMP_VOH

SM_RCOMP_VOH

SM_RCOMP_VOL

CFG[17:3] have internal pull up

CFG[19:18] have internal pull down

CFG[2:0]

CFG5

CFG9

CFG[13:12]

CFG16

CFG19

CFG20

(PCIE/SDVO select)

SDVO_CTRLDATA

MCH_CFG_5

MCH_CFG_9

MCH_CFG_12

MCH_CFG_13

MCH_CFG_16

MCH_CFG_7

MCH_CFG_8

MCH_CFG_19

MCH_CFG_20

PM_EXTTS#0

PM_EXTTS#1

MCH_CLKREQ#

SDVO_CTRL_CLK

SDVO_CTRL_DATA

011 = 667MT/s FSB
010 = 800MT/s FSB

0 = DMI x 2
1 = DMI x 4

0 = Lane Reversal Enable
1 = Normal Operation

00 = Reserved
01 = XOR Mode Enabled
10 = All Z Mode Enabled
11 = Normal Operation

0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled

0 = Normal Operation
1 = DMI Lane Reversal Enable

0 = Only PCIE or SDVO is operational.

*

(Default)

1 = PCIE/SDVO are operating simu.

0 = No SDVO Device Present

1 = SDVO Device Present

R132 4.02K_0402_1%@R132 4.02K_0402_1%@

R141 4.02K_0402_1%@R141 4.02K_0402_1%@

R145 4.02K_0402_1%@R145 4.02K_0402_1%@

R133 4.02K_0402_1%@R133 4.02K_0402_1%@

R155 4.02K_0402_1%@R155 4.02K_0402_1%@

R135 4.02K_0402_1%@R135 4.02K_0402_1%@

R151 4.02K_0402_1%@R151 4.02K_0402_1%@

R113 4.02K_0402_1%@R113 4.02K_0402_1%@

R126 4.02K_0402_1%@R126 4.02K_0402_1%@

R114 10K_0402_5%

R114 10K_0402_5%

R138 10K_0402_5%

R138 10K_0402_5%

R125 10K_0402_5%

R125 10K_0402_5%

1 2

R149 0_0402_5%@R149 0_0402_5%@

1 2

R160 0_0402_5%@R160 0_0402_5%@

1

Maybe not used

1 2

R122 0_0402_5%PM@R122 0_0402_5%PM@

1 2

R146 0_0402_5%PM@R146 0_0402_5%PM@

1 2

R123 0_0402_5%PM@R123 0_0402_5%PM@

1 2

R142 0_0402_5%PM@R142 0_0402_5%PM@

Strap Pin Table

*

(Default)

*

(Default)

(Default)

*

*
*

(Default)

(Default)

(Default)

*

+3VS

+3VS

+VCCP

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

2006/08/18 2007/8/18

2006/08/18 2007/8/18

2006/08/18 2007/8/18

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Crestline (2/7)-DMI/DDR

Crestline (2/7)-DMI/DDR

Crestline (2/7)-DMI/DDR

LA-3861P

LA-3861P

LA-3861P

1

0.1

0.1

8 47Monday, August 20, 2007

8 47Monday, August 20, 2007

8 47Monday, August 20, 2007

0.1

5

http://shop36609371.taobao.com ; Email:[e-mail]

4

3

2

1

DDRA_SD Q[0..63](14)

D D

DDRA_SD Q0
DDRA_SD Q1
DDRA_SD Q2
DDRA_SD Q3
DDRA_SD Q4
DDRA_SD Q5
DDRA_SD Q6
DDRA_SD Q7
DDRA_SD Q8
DDRA_SD Q9
DDRA_SD Q10
DDRA_SD Q11
DDRA_SD Q12
DDRA_SD Q13
DDRA_SD Q14
DDRA_SD Q15
DDRA_SD Q16
DDRA_SD Q17

C C

B B

DDRA_SD Q18
DDRA_SD Q19
DDRA_SD Q20
DDRA_SD Q21
DDRA_SD Q22
DDRA_SD Q23
DDRA_SD Q24
DDRA_SD Q25
DDRA_SD Q26
DDRA_SD Q27
DDRA_SD Q28
DDRA_SD Q29
DDRA_SD Q30
DDRA_SD Q31
DDRA_SD Q32
DDRA_SD Q33
DDRA_SD Q34
DDRA_SD Q35
DDRA_SD Q36
DDRA_SD Q37
DDRA_SD Q38
DDRA_SD Q39
DDRA_SD Q40
DDRA_SD Q41
DDRA_SD Q42
DDRA_SD Q43
DDRA_SD Q44
DDRA_SD Q45
DDRA_SD Q46
DDRA_SD Q47
DDRA_SD Q48
DDRA_SD Q49
DDRA_SD Q50
DDRA_SD Q51
DDRA_SD Q52
DDRA_SD Q53
DDRA_SD Q54
DDRA_SD Q55
DDRA_SD Q56
DDRA_SD Q57
DDRA_SD Q58
DDRA_SD Q59
DDRA_SD Q60
DDRA_SD Q61
DDRA_SD Q62
DDRA_SD Q63

DDRA_SD M[0..7](14)

DDRA_SM A[0..13](14)

AR43

AW44

BA45
AY46
AR41
AR45
AT42

AW47

BB45
BF48
BG47

BJ45
BB47
BG50
BH49
BE45

AW43

BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40

AW40

AT39

AW36
AW41

AY41
AV38
AT38
AV13
AT13

AW11

AV11
AU15
AT11
BA13
BA11
BE10
BD10

BG10

AW9

AM8

AN10

AM9

AN11

BD8
AY9

BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3

AT9
AN9

U20D

U20D

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

CRESTLINE _1p0

CRESTLINE _1p0

PM@

PM@

DDRA_SD Q[0..63]

DDRA_SD M[0..7]

DDRA_SM A[0..13]

BB19

SA_BS_0

BK19

SA_BS_1

BF29

SA_BS_2

BL17

SA_CAS#

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13

SA_RAS#

SA_RCVEN#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_WE#

AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6

AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2

BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16

BE18
AY20

BA19

DDRA_SD M0
DDRA_SD M1
DDRA_SD M2
DDRA_SD M3
DDRA_SD M4
DDRA_SD M5
DDRA_SD M6
DDRA_SD M7

DDRA_SD QS0
DDRA_SD QS1
DDRA_SD QS2
DDRA_SD QS3
DDRA_SD QS4
DDRA_SD QS5
DDRA_SD QS6
DDRA_SD QS7
DDRA_SD QS0#
DDRA_SD QS1#
DDRA_SD QS2#
DDRA_SD QS3#
DDRA_SD QS4#
DDRA_SD QS5#
DDRA_SD QS6#
DDRA_SD QS7#

DDRA_SM A0
DDRA_SM A1
DDRA_SM A2
DDRA_SM A3
DDRA_SM A4
DDRA_SM A5
DDRA_SM A6
DDRA_SM A7
DDRA_SM A8
DDRA_SM A9
DDRA_SM A10
DDRA_SM A11
DDRA_SM A12
DDRA_SM A13

SA_RCVE N#

DDRA_SB S0 (1 4)
DDRA_SB S1 (1 4)
DDRA_SB S2 (1 4)

DDRA_SC AS# (14)

DDRA_SD QS0 (14)
DDRA_SD QS1 (14)
DDRA_SD QS2 (14)
DDRA_SD QS3 (14)
DDRA_SD QS4 (14)
DDRA_SD QS5 (14)
DDRA_SD QS6 (14)
DDRA_SD QS7 (14)
DDRA_SD QS0# (14)
DDRA_SD QS1# (14)
DDRA_SD QS2# (14)
DDRA_SD QS3# (14)
DDRA_SD QS4# (14)
DDRA_SD QS5# (14)
DDRA_SD QS6# (14)
DDRA_SD QS7# (14)

DDRA_SR AS# (14)

PAD

PAD

T15

T15

DDRA_SW E# (14)

DDRB_SD Q0
DDRB_SD Q1
DDRB_SD Q2
DDRB_SD Q3
DDRB_SD Q4
DDRB_SD Q5
DDRB_SD Q6
DDRB_SD Q7
DDRB_SD Q8
DDRB_SD Q9
DDRB_SD Q10
DDRB_SD Q11
DDRB_SD Q12
DDRB_SD Q13
DDRB_SD Q14
DDRB_SD Q15
DDRB_SD Q16
DDRB_SD Q17
DDRB_SD Q18
DDRB_SD Q19
DDRB_SD Q20
DDRB_SD Q21
DDRB_SD Q22
DDRB_SD Q23
DDRB_SD Q24
DDRB_SD Q25
DDRB_SD Q26
DDRB_SD Q27
DDRB_SD Q28
DDRB_SD Q29
DDRB_SD Q30
DDRB_SD Q31
DDRB_SD Q32
DDRB_SD Q33
DDRB_SD Q34
DDRB_SD Q35
DDRB_SD Q36
DDRB_SD Q37
DDRB_SD Q38
DDRB_SD Q39
DDRB_SD Q40
DDRB_SD Q41
DDRB_SD Q42
DDRB_SD Q43
DDRB_SD Q44
DDRB_SD Q45
DDRB_SD Q46
DDRB_SD Q47
DDRB_SD Q48
DDRB_SD Q49
DDRB_SD Q50
DDRB_SD Q51
DDRB_SD Q52
DDRB_SD Q53
DDRB_SD Q54
DDRB_SD Q55
DDRB_SD Q56
DDRB_SD Q57
DDRB_SD Q58
DDRB_SD Q59
DDRB_SD Q60
DDRB_SD Q61
DDRB_SD Q62
DDRB_SD Q63

DDRB_SD Q[0..63](15)

DDRB_SM A[0..13](15)

AP49

AR51
AW50
AW51

AN51

AN50

AV50

AV49

BA50

BB50

BA49

BE50

BA51

AY49

BF50

BF49

BJ50
BJ44

BJ43
BL43
BK47
BK49
BK43
BK42

BJ41
BL41

BJ37

BJ36
BK41

BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12

BJ10

BL9
BK5
BL5
BK9

BK10

BF4
BH5

BG1

BC2
BK3
BE4
BD3

BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2

DDRB_SD M[0..7](15)

BJ8
BJ6

BJ2

U20E

U20E

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

CRESTLINE _1p0

CRESTLINE _1p0

PM@

PM@

DDRB_SD Q[0..63]

DDRB_SD M[0..7]

DDRB_SM A[0..13]

SB_BS_0
SB_BS_1
SB_BS_2

SB_CAS#

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13

SB_RAS#

SB_RCVEN#

SB_WE#

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

AY17
BG18
BG36

BE17

AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2

AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3

BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13

AV16
AY18

BC17

DDRB_SD M0
DDRB_SD M1
DDRB_SD M2
DDRB_SD M3
DDRB_SD M4
DDRB_SD M5
DDRB_SD M6
DDRB_SD M7

DDRB_SD QS0
DDRB_SD QS1
DDRB_SD QS2
DDRB_SD QS3
DDRB_SD QS4
DDRB_SD QS5
DDRB_SD QS6
DDRB_SD QS7
DDRB_SD QS0#
DDRB_SD QS1#
DDRB_SD QS2#
DDRB_SD QS3#
DDRB_SD QS4#
DDRB_SD QS5#
DDRB_SD QS6#
DDRB_SD QS7#

DDRB_SM A0
DDRB_SM A1
DDRB_SM A2
DDRB_SM A3
DDRB_SM A4
DDRB_SM A5
DDRB_SM A6
DDRB_SM A7
DDRB_SM A8
DDRB_SM A9
DDRB_SM A10
DDRB_SM A11
DDRB_SM A12
DDRB_SM A13

SB_RCVE N#

DDRB_SB S0 (1 5)
DDRB_SB S1 (1 5)
DDRB_SB S2 (1 5)

DDRB_SC AS# (15)

DDRB_SD QS0 (15)
DDRB_SD QS1 (15)
DDRB_SD QS2 (15)
DDRB_SD QS3 (15)
DDRB_SD QS4 (15)
DDRB_SD QS5 (15)
DDRB_SD QS6 (15)
DDRB_SD QS7 (15)
DDRB_SD QS0# (15)
DDRB_SD QS1# (15)
DDRB_SD QS2# (15)
DDRB_SD QS3# (15)
DDRB_SD QS4# (15)
DDRB_SD QS5# (15)
DDRB_SD QS6# (15)
DDRB_SD QS7# (15)

DDRB_SR AS# (15)

PAD

PAD

T16

T16

DDRB_SW E# (15)

A A

Security Class ification

Security Class ification

Security Class ification

2006/08/ 18 2007/8/1 8

2006/08/ 18 2007/8/1 8

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/ 18 2007/8/1 8

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

B

B

B

Date: Sheet of

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

Crestline (3/7)-DDRII

Crestline (3/7)-DDRII

Crestline (3/7)-DDRII

LA-3861P

LA-3861P

LA-3861P

0.1

0.1

0.1

of

9 47Monday, August 2 0, 2007

9 47Monday, August 2 0, 2007

9 47Monday, August 2 0, 2007

1

5

http://shop36609371.taobao.com ; Email:[e-mail]

CRB 2.37K_1% to GND

D D

C C

R140

GMCH_CR T_B(19 )

GMCH_CR T_G(19)

GMCH_CR T_R(19)

R140

0_0402_ 5%

0_0402_ 5%

PM@

PM@

R143

R143

150_040 2_5%

150_040 2_5%

Change to 0Ohm when use PM chip

R147 150_040 2_1%GM@R147 150_04 02_1%GM@

R152 150_040 2_1%GM@R152 150_04 02_1%GM@

R140 150_040 2_1%GM@R140 150_04 02_1%GM@

1 2

R85 39_0402 _1%GM@R 85 39_0402 _1%GM@

1 2

R88 39_0402 _1%GM@R 88 39_0402 _1%GM@

LCTLB_D ATA

LCTLA_C LK

TV_DCON SEL_0

TV_DCON SEL_1

R147

R147

R152

R152

0_0402_ 5%

0_0402_ 5%

PM@

PM@

B B

CRB 2.2K , Follow!

+3VS

0_0402_ 5%

0_0402_ 5%

PM@

PM@

GMCH_CR T_HSYNC(19)

GMCH_CR T_VSYNC(19 )

R131 10K_0402_5%R131 10K_0402_5%

1 2

R130 10K_0402_5%R130 10K_0402_5%

1 2

R108 2.2K_0402_5%R108 2.2K_0402_5%

R109 2.2K_0402_5%R109 2.2K_0402_5%

GMCH_EN BKL(18)

LVDS_SC L(18)

LVDS_SD A(18)

GMCH_EN VDD(18) PCIE_MTX_ C_GRX_N[0..15] (17 )

1 2

R150 2.4K_0402_1%R150 2.4K_0402_1%

LVDS_AC LK#(18)
LVDS_AC LK(18)
LVDS_BC LK#(18)
LVDS_BC LK(18)

LVDS_A0 #(18)
LVDS_A1 #(18)
LVDS_A2 #(18)

LVDS_A0(18)
LVDS_A1(18)
LVDS_A2(18)

LVDS_B0 #(18)
LVDS_B1 #(18)
LVDS_B2 #(18)

LVDS_B0(18)
LVDS_B1(18)
LVDS_B2(18)

R153

R153

R148

R148

150_040 2_5%

150_040 2_5%

1 2

1 2

1 2

150_040 2_5%

150_040 2_5%

12

12

12

GMCH_CR T_CLK(19)

GMCH_CR T_DATA(19)

R86

R86
0_0402_ 5%

0_0402_ 5%

PM@

PM@

R87

R87
0_0402_ 5%

0_0402_ 5%

PM@

PM@

4

LBKLT_E N
LCTLA_C LK
LCTLB_D ATA

LVDS_IBG

LVDS_AC LK#
LVDS_AC LK
LVDS_BC LK#
LVDS_BC LK

LVDS_A0 #
LVDS_A1 #
LVDS_A2 #

LVDS_A0
LVDS_A1
LVDS_A2

LVDS_B0 #
LVDS_B1 #
LVDS_B2 #

LVDS_B0
LVDS_B1
LVDS_B2

GMCH_TV _COMPS
GMCH_TV _LUMA
GMCH_TV _CRMA

TV_DCON SEL_0
TV_DCON SEL_1

GMCH_CR T_CLK
GMCH_CR T_DATA

CRT_IREF

R110

R110

1.3K_040 2_1%

1.3K_040 2_1%

1 2

U20C

U20C

J40
H39
E39
E40
C37
D35
K40

L41
L43
N41
N40
D46
C45
D44
E42

G51

E51
F49

G50

E50
F48

G44

B47
B45

E44
A47
A45

E27

G27

K27

F27
J27
L27

M35

P33

H32

G32

K29
J29
F29
E29

K33

G35

F33
C32
E33

CRESTLINE _1p0

CRESTLINE _1p0

PM@

PM@

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN

LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2

LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2

LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2

LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2

TVA_DAC
TVB_DAC
TVC_DAC

TVA_RTN
TVB_RTN
TVC_RTN

TV_DCONSEL_0
TV_DCONSEL_1

CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#

CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC

3

PEG_COM P

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9

N43
M43

J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41

J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42

N45
U39
U47
N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44

M45
T38
T46
N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43

20/25mils

PCIE_GTX_ C_MRX_N0
PCIE_GTX_ C_MRX_N1
PCIE_GTX_ C_MRX_N2
PCIE_GTX_ C_MRX_N3
PCIE_GTX_ C_MRX_N4
PCIE_GTX_ C_MRX_N5
PCIE_GTX_ C_MRX_N6
PCIE_GTX_ C_MRX_N7
PCIE_GTX_ C_MRX_N8
PCIE_GTX_ C_MRX_N9
PCIE_GTX_ C_MRX_N10
PCIE_GTX_ C_MRX_N11
PCIE_GTX_ C_MRX_N12
PCIE_GTX_ C_MRX_N13
PCIE_GTX_ C_MRX_N14
PCIE_GTX_ C_MRX_N15

PCIE_GTX_ C_MRX_P0
PCIE_GTX_ C_MRX_P1
PCIE_GTX_ C_MRX_P2
PCIE_GTX_ C_MRX_P3
PCIE_GTX_ C_MRX_P4
PCIE_GTX_ C_MRX_P5
PCIE_GTX_ C_MRX_P6
PCIE_GTX_ C_MRX_P7
PCIE_GTX_ C_MRX_P8
PCIE_GTX_ C_MRX_P9
PCIE_GTX_ C_MRX_P10
PCIE_GTX_ C_MRX_P11
PCIE_GTX_ C_MRX_P12
PCIE_GTX_ C_MRX_P13
PCIE_GTX_ C_MRX_P14
PCIE_GTX_ C_MRX_P15

PCIE_MTX_ GRX_N0
PCIE_MTX_ GRX_N1
PCIE_MTX_ GRX_N2
PCIE_MTX_ GRX_N3
PCIE_MTX_ GRX_N4 PCIE_MTX_ C_GRX_N4
PCIE_MTX_ GRX_N5
PCIE_MTX_ GRX_N6
PCIE_MTX_ GRX_N7
PCIE_MTX_ GRX_N8
PCIE_MTX_ GRX_N9
PCIE_MTX_ GRX_N10
PCIE_MTX_ GRX_N11
PCIE_MTX_ GRX_N12
PCIE_MTX_ GRX_N13
PCIE_MTX_ GRX_N14
PCIE_MTX_ GRX_N15

PCIE_MTX_ GRX_P0
PCIE_MTX_ GRX_P1
PCIE_MTX_ GRX_P2
PCIE_MTX_ GRX_P3
PCIE_MTX_ GRX_P4
PCIE_MTX_ GRX_P5
PCIE_MTX_ GRX_P6
PCIE_MTX_ GRX_P7
PCIE_MTX_ GRX_P8
PCIE_MTX_ GRX_P9
PCIE_MTX_ GRX_P10
PCIE_MTX_ GRX_P11
PCIE_MTX_ GRX_P12
PCIE_MTX_ GRX_P13
PCIE_MTX_ GRX_P14
PCIE_MTX_ GRX_P15

PEG_COMPI

PEG_COMPO

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8

LVDS

LVDS

TV VGA

TV VGA

PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PEG_RX_10

PEG_RX_11

PEG_RX_12

PEG_RX_13

PEG_RX_14

PEG_RX_15

PEG_TX#_0

PEG_TX#_1

PEG_TX#_2

PEG_TX#_3

PEG_TX#_4

PEG_TX#_5

PEG_TX#_6

PEG_TX#_7

PEG_TX#_8

PEG_TX#_9
PEG_TX#_10

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

PEG_TX_10

PEG_TX_11

PEG_TX_12

PEG_TX_13

PEG_TX_14

PEG_TX_15

2

1 2

R154 24.9_040 2_1%

R154 24.9_040 2_1%

C396 0.1U_040 2_10V7KPM@C396 0.1U_040 2_10V7KPM@

1 2

C400 0.1U_040 2_10V7KPM@C400 0.1U_040 2_10V7KPM@

1 2

C410 0.1U_040 2_10V7KPM@C410 0.1U_040 2_10V7KPM@

1 2

C422 0.1U_040 2_10V7KPM@C422 0.1U_040 2_10V7KPM@

1 2

C425 0.1U_040 2_10V7KPM@C425 0.1U_040 2_10V7KPM@

1 2

C430 0.1U_040 2_10V7KPM@C430 0.1U_040 2_10V7KPM@

1 2

C432 0.1U_040 2_10V7KPM@C432 0.1U_040 2_10V7KPM@

1 2

C442 0.1U _0402_10V7KPM@C442 0.1U _0402_10V7KPM@

1 2

C394 0.1U_040 2_10V7KPM@C394 0.1U_040 2_10V7KPM@

1 2

C397 0.1U_040 2_10V7KPM@C397 0.1U_040 2_10V7KPM@

1 2

C402 0.1U_040 2_10V7KPM@C402 0.1U_040 2_10V7KPM@

1 2

C417 0.1U_040 2_10V7KPM@C417 0.1U_040 2_10V7KPM@

1 2

C424 0.1U_040 2_10V7KPM@C424 0.1U_040 2_10V7KPM@

1 2

C427 0.1U_040 2_10V7KPM@C427 0.1U_040 2_10V7KPM@

1 2

C431 0.1U_040 2_10V7KPM@C431 0.1U_040 2_10V7KPM@

1 2

C438 0.1U_040 2_10V7KPM@C438 0.1U_040 2_10V7KPM@

1 2

+VCCP

PCIE_MTX_ C_GRX_N[0..15]

PCIE_MTX_ C_GRX_P[0..15]

PCIE_GTX_ C_MRX_N[0..15]

PCIE_GTX_ C_MRX_P[0..15]

C124 0.1U_040 2_10V7KPM@C124 0.1U_040 2_10V7KPM@

1 2

C130 0.1U_040 2_10V7KPM@C130 0.1U_040 2_10V7KPM@

1 2

C140 0.1U_040 2_10V7KPM@C140 0.1U_040 2_10V7KPM@

1 2

C145 0.1U_040 2_10V7KPM@C145 0.1U_040 2_10V7KPM@

1 2

C153 0.1U_040 2_10V7KPM@C153 0.1U_040 2_10V7KPM@

1 2

C157 0.1U_040 2_10V7KPM@C157 0.1U_040 2_10V7KPM@

1 2

C165 0.1U_040 2_10V7KPM@C165 0.1U_040 2_10V7KPM@

1 2

C171 0.1U_040 2_10V7KPM@C171 0.1U_040 2_10V7KPM@

1 2

C121 0.1U_040 2_10V7KPM@C121 0.1U_040 2_10V7KPM@

1 2

C126 0.1U_040 2_10V7KPM@C126 0.1U_040 2_10V7KPM@

1 2

C134 0.1U_040 2_10V7KPM@C134 0.1U_040 2_10V7KPM@

1 2

C143 0.1U_040 2_10V7KPM@C143 0.1U_040 2_10V7KPM@

1 2

C148 0.1U_040 2_10V7KPM@C148 0.1U_040 2_10V7KPM@

1 2

C154 0.1U_040 2_10V7KPM@C154 0.1U_040 2_10V7KPM@

1 2

C163 0.1U_040 2_10V7KPM@C163 0.1U_040 2_10V7KPM@

1 2

C168 0.1U_040 2_10V7KPM@C168 0.1U_040 2_10V7KPM@

1 2

PCIE_MTX_ C_GRX_P[0..15] (17)

PCIE_GTX_ C_MRX_N[0..15] (17 )

PCIE_GTX_ C_MRX_P[0..15] (17)

PCIE_MTX_ C_GRX_N0
PCIE_MTX_ C_GRX_N1
PCIE_MTX_ C_GRX_N2

PCIE_MTX_ C_GRX_N3

PCIE_MTX_ C_GRX_N5
PCIE_MTX_ C_GRX_N6
PCIE_MTX_ C_GRX_N7
PCIE_MTX_ C_GRX_N8
PCIE_MTX_ C_GRX_N9
PCIE_MTX_ C_GRX_N10
PCIE_MTX_ C_GRX_N11
PCIE_MTX_ C_GRX_N12
PCIE_MTX_ C_GRX_N13
PCIE_MTX_ C_GRX_N14
PCIE_MTX_ C_GRX_N15

PCIE_MTX_ C_GRX_P0
PCIE_MTX_ C_GRX_P1
PCIE_MTX_ C_GRX_P2
PCIE_MTX_ C_GRX_P3
PCIE_MTX_ C_GRX_P4
PCIE_MTX_ C_GRX_P5
PCIE_MTX_ C_GRX_P6
PCIE_MTX_ C_GRX_P7
PCIE_MTX_ C_GRX_P8
PCIE_MTX_ C_GRX_P9
PCIE_MTX_ C_GRX_P10
PCIE_MTX_ C_GRX_P11
PCIE_MTX_ C_GRX_P12
PCIE_MTX_ C_GRX_P13
PCIE_MTX_ C_GRX_P14
PCIE_MTX_ C_GRX_P15

1

A A

Security Class ification

Security Class ification

Security Class ification

2006/08/ 18 2007/8/1 8

2006/08/ 18 2007/8/1 8

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/ 18 2007/8/1 8

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

B

B

B

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Crestline (4/7)-VGA/LVDS/TV

Crestline (4/7)-VGA/LVDS/TV

Crestline (4/7)-VGA/LVDS/TV

LA-3861P

LA-3861P

LA-3861P

10 47Monday, August 2 0, 2007

10 47Monday, August 2 0, 2007

10 47Monday, August 2 0, 2007

1

0.1

0.1

0.1

5

http://shop36609371.taobao.com ; Email:[e-mail]

U20G

U20G

+VCCP

D D

Replace 0 Ohm
by directly
connection

C C

+1.8V

+VCC_AX G

B B

A A

AT35

AT34
AH28
AC32
AC31
AK32

AJ31

AJ28
AH32
AH31
AH29

AF32

AU32
AU33
AU35
AV33

AW33
AW35

AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35

BF33

BF34
BG32
BG33
BG35
BH32
BH34
BH35

BJ32

BJ33

BJ34
BK32
BK33
BK34
BK35

BL33
AU30

W13
W14

AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28

AF21

AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31

AJ20
AN14

R30

R20
T14

Y12

VCC_1
VCC_2
VCC_3
VCC_5
VCC_4
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12

VCC_13

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34

VCC CORE

VCC CORE

POWER

POWER

VCC SMVCC GFX

VCC SMVCC GFX

VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8

VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54

VCC GFX NCTF

VCC GFX NCTF

VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83

VCC SM LF

VCC SM LF

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

4

9/18 modify from +1.05VS to +VCC_AXG

T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31

AW45
BC39
BE39
BD17
BD4
AW8
AT6

+VCC_AX G

VCC: 1573mA

+VCCP

(220UF*1, 22UF*1, 0.22UF*2, 0.1UF*1)

1

+

+

C408

C408

220U_D2 _4VMR15

220U_D2 _4VMR15

2

@

@

C474

C474

330U_V_ 2.5VM

330U_V_ 2.5VM

+1.8V

1

+

+

2

10U_080 5_10V4Z

10U_080 5_10V4Z

10U_080 5_10V4Z

10U_080 5_10V4Z

9/18 modify from +1.05VS to +VCC_AXG 9/18 Add for 965PM use

+VCC_AX G

1

C434

+

+

2

330U_V_ 2.5VM

330U_V_ 2.5VM

+VCCP

1

C158

C158

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

C434

VCCSM_L F1
VCCSM_L F2
VCCSM_L F3
VCCSM_L F4
VCCSM_L F5
VCCSM_L F6
VCCSM_L F7

C152

C152

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

C433

C433

330U_V_ 2.5VM

330U_V_ 2.5VM

1

2

3

CRB 270uF , there is no 270u part.

9/19 change to 330u, 9/29 change to 220u

1

C118

C118

2

VCC_SM: 3300mA
(330UF*1, 22UF*2, 0.1UF*1)

1

C164

C164

2

VCC_AXG: 7700mA
(330UF*2, 22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2)

1

+

+

2

C114

C114

0.22U_06 03_16V7K

0.22U_06 03_16V7K

0.22U_06 03_16V7K

0.22U_06 03_16V7K

1

C177

C177

10U_080 5_10V4Z

10U_080 5_10V4Z

2

4.7U_080 5_10V4Z

4.7U_080 5_10V4Z

C115

C115

1

10U_080 5_10V4Z

10U_080 5_10V4Z

2

GM@

GM@

1

C147

C147

22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

0.22U_06 03_16V7K

0.22U_06 03_16V7K

C112

C112

1

2

GM@

GM@

10U_080 5_10V4Z

10U_080 5_10V4Z

VCC_AXM: 540mA
(22UF*2, 0.22UF*2, 0.1UF*2)

C139

C139

1

C122

C122

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

C181

C181

1U_0603 _10V4Z

1U_0603 _10V4Z

C141

C141

1U_0603 _10V4Z

1U_0603 _10V4Z

GM@

GM@

C146

C146

0.22U_06 03_16V7K

0.22U_06 03_16V7K

C128

C128

Follow DG 1.1

1

C156

C156

2

0.1U_040 2_16V4Z@

0.1U_040 2_16V4Z@

C136

C136

GM@

GM@

0.47U_06 03_16V4Z

0.47U_06 03_16V4Z

1

C138

C138

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

9/14 add for reservation

C170

C170

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

9/29 +1.05VS_AXM change to +1.05VS

J6

J6

1 2

PAD-OPEN 3x3m

C173

C173

PAD-OPEN 3x3m

@

@

J2

J2

1 2

PAD-OPEN 3x3m

PAD-OPEN 3x3m

@

@

C175

C175

0.47U_06 03_16V4Z

0.47U_06 03_16V4Z

C166

C166

1U_0603 _10V4Z

1U_0603 _10V4Z

1005 This is for GM@

Remember open stencil at GM@

C159

C159

1U_0603 _10V4Z

1U_0603 _10V4Z

+VCCP +VCC_AX G

C172

C172

0.22U_06 03_16V7K

0.22U_06 03_16V7K

0.22U_06 03_16V7K

0.22U_06 03_16V7K

C127

C127

GM@

GM@

C137

C137

C183

C183

1U_0603 _10V4Z

1U_0603 _10V4Z

@

@

C119

C119

1

2

GM@

GM@

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

C150

C150

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

U20F

U20F

+VCCP

1

2

1

2

R159

R159

0_0805_ 5%

0_0805_ 5%

PM@

PM@

+VCCP

AB33

VCC_NCTF_1

AB36

VCC_NCTF_2

AB37

VCC_NCTF_3

AC33

VCC_NCTF_4

AC35

VCC_NCTF_5

AC36

VCC_NCTF_6

AD35

VCC_NCTF_7

AD36

VCC_NCTF_8

AF33

VCC_NCTF_9

AF36

VCC_NCTF_10

AH33

VCC_NCTF_11

AH35

VCC_NCTF_12

AH36

VCC_NCTF_13

AH37

VCC_NCTF_14

AJ33

VCC_NCTF_15

AJ35

VCC_NCTF_16

AK33

VCC_NCTF_17

AK35

VCC_NCTF_18

AK36

VCC_NCTF_19

AK37

VCC_NCTF_20

AD33

VCC_NCTF_21

AJ36

VCC_NCTF_22

AM35

VCC_NCTF_23

AL33

VCC_NCTF_24

AL35

VCC_NCTF_25

AA33

VCC_NCTF_26

AA35

VCC_NCTF_27

AA36

VCC_NCTF_28

AP35

VCC_NCTF_29

AP36

VCC_NCTF_30

AR35

VCC_NCTF_31

AR36

VCC_NCTF_32

Y32

VCC_NCTF_33

Y33

VCC_NCTF_34

Y35

VCC_NCTF_35

Y36

VCC_NCTF_36

Y37

VCC_NCTF_37

T30

VCC_NCTF_38

T34

VCC_NCTF_39

T35

VCC_NCTF_40

U29

VCC_NCTF_41

U31

VCC_NCTF_42

U32

VCC_NCTF_43

U33

VCC_NCTF_44

U35

VCC_NCTF_45

U36

VCC_NCTF_46

V32

VCC_NCTF_47

V33

VCC_NCTF_48

V36

VCC_NCTF_49

V37

VCC_NCTF_50

AL24

VCC_AXM_NCTF_1

AL26

VCC_AXM_NCTF_2

AL28

VCC_AXM_NCTF_3

AM26

VCC_AXM_NCTF_4

AM28

VCC_AXM_NCTF_5

AM29

VCC_AXM_NCTF_6

AM31

VCC_AXM_NCTF_7

AM32

VCC_AXM_NCTF_8

AM33

VCC_AXM_NCTF_9

AP29

VCC_AXM_NCTF_10

AP31

VCC_AXM_NCTF_11

AP32

VCC_AXM_NCTF_12

AP33

VCC_AXM_NCTF_13

AL29

VCC_AXM_NCTF_14

AL31

VCC_AXM_NCTF_15

AL32

VCC_AXM_NCTF_16

AR31

VCC_AXM_NCTF_17

AR32

VCC_AXM_NCTF_18

AR33

VCC_AXM_NCTF_19

CRESTLINE _1p0

CRESTLINE _1p0

PM@

PM@

VSS NCTF

VSS NCTF

VCC NCTF

VCC NCTF

POWER

POWER

VCC AXM NCTF

VCC AXM NCTF

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8

VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21

VSS_SCB1
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6

VSS SCBVCC AXM

VSS SCBVCC AXM

VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7

1

T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28

A3
B2
C1
BL1
BL51
A51

AT33
AT31
AK29
AK24
AK23
AJ26
AJ23

+VCCP

9/29
+1.05VS_AXM
change to
+1.05VS

9/18 modify from +1.05VS to +VCC_AXG

5

CRESTLINE _1p0

CRESTLINE _1p0

PM@

PM@

Security Class ification

Security Class ification

Security Class ification

2006/08/ 18 2007/8/1 8

2006/08/ 18 2007/8/1 8

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/ 18 2007/8/1 8

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

B

B

B

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Crestline (5/7)-VCC

Crestline (5/7)-VCC

Crestline (5/7)-VCC

LA-3861P

LA-3861P

LA-3861P

11 47Monday, August 2 0, 2007

11 47Monday, August 2 0, 2007

11 47Monday, August 2 0, 2007

1

0.1

0.1

0.1

5

http://shop36609371.taobao.com ; Email:[e-mail]

VCCA_HPLL: 50mA

+1.25VS

D D

C C

VCC_SYNC: 10mA (0.1UF*1)

+3VS

VCCA_MPLL:150mA
(10UF*1, 0.1UF*1)

1 2

R119 0_0603_ 5%

R119 0_0603_ 5%

GM@

GM@

(22UF*1, 0.1UF*1)

L26

L26

1 2

0_0603_ 5%

0_0603_ 5%

10U_080 5_10V4Z

10U_080 5_10V4Z

L25

L25

1 2

0_0603_ 5%

0_0603_ 5%

0.5_0603 _1%

0.5_0603 _1%

10U_080 5_10V4Z

10U_080 5_10V4Z

C102

C102

GM@

GM@

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

C421

C421

R327

R327

C404

C404

VCCA_CRT_DAC: 80mA (0.1UF*1, 0.022UF*1)

L9

L9

+3VS

B B

+3VS

+3VS

A A

1 2

MBK1608 121YZF_0603

MBK1608 121YZF_0603

GM@

GM@

R89

R89

10u_080 5

10u_080 5

GM@

GM@

VCCA_DAC_BG: 5mA (0.1UF*1, 0.022UF*1)

1 2

L13 10_0603_5 %

L13 10_0603_5 %

GM@

R106

R106

10u_080 5

10u_080 5

GM@

GM@

+1.5VS

GM@

L19

L19

1 2

MBK1608 121YZF_0603

MBK1608 121YZF_0603

GM@

GM@

1 2

10U_080 5_10V4Z

10U_080 5_10V4Z

C352

C352

GM@

GM@

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

C350

C350

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

GM@

GM@

VCCA_TV_DAC: 40mA each DAC (0.1UF*1, 0.022UF*1 for each DAC)

1

C335

C335

2

10U_080 5_10V4Z

10U_080 5_10V4Z

GM@

GM@

+1.5VS_T VDAC

L11

L11
0_0603_ 5%

0_0603_ 5%

1

C87

C87

2

5

1

2

1

2

+3VS_SYNC

1

R136

R136

0_0402_ 5%

0_0402_ 5%

2

PM@

PM@

1

C351

C351

GM@

GM@

2

1

C88

C88

2

GM@

GM@

1

C348

C348

GM@

GM@

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

+1.25VS_ HPLL

1

C418

C418

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

+1.25VS_ MPLL

1

C403

C403

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

+1.25VS

+3VS_CR TDAC

0.022U_0402_16V7K

0.022U_0402_16V7K

+3VS_DA CBG

0.022U_0402_16V7K

0.022U_0402_16V7K

C344

C344

C349

C349

GM@

GM@

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

0.022U_0 402_16V7K

0.022U_0 402_16V7K

GM@

GM@

+1.5VS

R127

R127

10u_080 5

10u_080 5

GM@

GM@

+1.25VS

+1.25VS

R89

R89

0_0805_ 5%

0_0805_ 5%

PM@

PM@

R106

R106

0_0805_ 5%

0_0805_ 5%

PM@

PM@

VCCA_DPLLA/B: 100mA
(470UF*1, 0.1UF*1)

L20

L20

1 2

10U_FLC -453232-100K_0 .25A_10%

10U_FLC -453232-100K_0 .25A_10%

220U_D2 _4VMR15

220U_D2 _4VMR15

VCCA_DPLLA/B: 100mA
(470UF*1, 0.1UF*1)

L22

L22

1 2

10U_FLC -453232-100K_0 .25A_10%

10U_FLC -453232-100K_0 .25A_10%

220U_D2 _4VMR15

220U_D2 _4VMR15

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

+1.25VS

12

R302 1_0603 _5%

C387

C387
10U_080 5_10V4Z

10U_080 5_10V4Z

R190 0_0603 _5%

R190 0_0603 _5%

1

C345

C345

2

0.022U_0 402_16V7K

0.022U_0 402_16V7K

GM@

GM@

L14

L14

1 2

MBK1608 121YZF_0603

MBK1608 121YZF_0603

GM@

GM@

R302 1_0603 _5%

1 2

R189 0_0805 _5%

R189 0_0805 _5%

22U_080 5_6.3V6M

22U_080 5_6.3V6M

+1.5VS_T VDAC

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

VCCA_PEG_PLL: 100mA
(0.1UF*1)

C337

C337

GM@

GM@

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

VCCD_QDAC: 5mA
(0.1UF*1, 0.022UF*1)

C110

C110

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

GM@

GM@

4

+1.25VS_ DPLLA

1

+

+

C357

C357

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

1

+

+

C378

C378

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

+1.8V_TX _LVDS

+3VS

L24

L24

1 2

C182

C182

22U_080 5_6.3V6M

22U_080 5_6.3V6M

@

@

+1.25VS_ A_SM_CK

C188

C188

VCCD_TVDAC / CRT: each 60mA (0.1UF*1, 0.022UF*1)

C105

C105

1

C338

C338

2

0.022U_0 402_16V7K

0.022U_0 402_16V7K

GM@

GM@

1

2

C90

C90

1000P_0 402_50V7K

1000P_0 402_50V7K

GM@

GM@

1

C106

C106

2

+1.25VS_ A_PEGPLL

0_0603_ 5%

0_0603_ 5%

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

+1.25VS_ A_SM

1

C180

C180

2

22U_080 5_6.3V6M

22U_080 5_6.3V6M

VCCA_SM_CK: 35mA
(22UF*1, 1UF*2, 0.1UF*1)

1

C178

C178

2

@

@

1U_0603 _10V4Z

1U_0603 _10V4Z

R115 0 _0402_5%

R115 0 _0402_5%

1

C93

C93

2

0.022U_0 402_16V7K

0.022U_0 402_16V7K

VCCD_HPLL: 250mA (0.1UF*1)

+1.25VS

C149

C149

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

+3VS_A_ TVDAC

C109

C109

0.022U_0 402_16V7K

0.022U_0 402_16V7K

GM@

GM@

4

1

C95

C95

2

+3VS_SYNC

+1.25VS_ DPLLB

C103

C103

1

2

VCCA_PEG_BG: 5mA
(0.1UF*1)

C385

C385

VCCA_SM: 640mA
(22UF*21, 4.7UF*1, 1UF*1)

1

2

C186

C186

1U_0603 _10V4Z

1U_0603 _10V4Z

+3VS_A_ TVDAC

GM@

GM@

1

2

R134

R134

0_0402_ 5%

0_0402_ 5%

PM@

PM@

+1.5VS_Q DAC

+3VS_CR TDAC

+3VS_DA CBG

1

2

+1.25VS_ DPLLA

+1.25VS_ DPLLB

+1.25VS_ HPLL

+1.25VS_ MPLL

VCCA_LVDS: 10mA
(0.1UF*1)

1

VCCA_PEG_PLL: 100mA
(0.1UF*1)

2

C187

C187

4.7U_080 5_10V4Z

4.7U_080 5_10V4Z

@

@

R118

R118

+1.8V

R127

R127

PM@

PM@

0_0805_ 5%

0_0805_ 5%

C162

C162

1U_0603 _10V4Z

1U_0603 _10V4Z

C167

C167

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

0_0402_ 5%

0_0402_ 5%

PM@

PM@

+1.25VS_ A_PEGPLL

C113

C113

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

R120 0_0402 _5%

R120 0_0402 _5%

10U_080 5_10V4Z

10U_080 5_10V4Z

Security Class ification

Security Class ification

Security Class ification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

VCCD_CR T

+1.5VS_T VDAC

+1.5VS_Q DAC

1

2

GM@

GM@

C89

C89

@

@

VCCD_LVDS: 150mA

10UF*1, 0.1UF*1)

(

Issued Date

Issued Date

Issued Date

J32

A33
B33

A30

B32

B49

H49

AL2

AM2

A41

B41

K50

K49

U51

AW18

AV19
AU19
AU18
AU17

AT22
AT21
AT19
AT18

AT17
AR17
AR16

BC29
BB29

C25
B25
C27
B27
B28
A28

M32

L29

N28

AN2

U48

J41

H42

+1.8V_LV DS

1

C96

C96

2

GM@

GM@

1U_0603 _10V4Z

1U_0603 _10V4Z

3

U20H

U20H

VCCSYNC

VCCA_CRT_DAC_1
VCCA_CRT_DAC_2

VCCA_DAC_BG

VSSA_DAC_BG

VCCA_DPLLA

VCCA_DPLLB

VCCA_HPLL

VCCA_MPLL

VCCA_LVDS

VSSA_LVDS

VCCA_PEG_BG

VSSA_PEG_BG

VCCA_PEG_PLL

VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5

VCCA_SM_7
VCCA_SM_8
VCCA_SM_9
VCCA_SM_10
VCCA_SM_11
VCCA_SM_NCTF_1
VCCA_SM_NCTF_2

VCCA_SM_CK_1
VCCA_SM_CK_2

VCCA_TVA_DAC_1
VCCA_TVA_DAC_2
VCCA_TVB_DAC_1
VCCA_TVB_DAC_2
VCCA_TVC_DAC_1
VCCA_TVC_DAC_2

VCCD_CRT
VCCD_TVDAC

VCCD_QDAC

VCCD_HPLL

VCCD_PEG_PLL

VCCD_LVDS_1
VCCD_LVDS_2

CRESTLINE _1p0

CRESTLINE _1p0

PM@

PM@

2006/08/ 18 2007/8/1 8

2006/08/ 18 2007/8/1 8

2006/08/ 18 2007/8/1 8

3

R129

R129

0_0402_ 5%

0_0402_ 5%

PM@

PM@

CRTPLLA PEGA SMTV

CRTPLLA PEGA SMTV

POWER

POWER

A CK A LVDS

A CK A LVDS

D TV/CRTLVDS

D TV/CRTLVDS

Compal Secret Data

Compal Secret Data

Compal Secret Data

VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5

AXD

AXD

VCC_AXD_6

VCC_AXD_NCTF

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

AXF

AXF

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

SM CK

SM CK

VCC_TX_LVDS

HV

HV

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4

PEG

PEG

VCC_PEG_5

VCC_RXR_DMI_1
VCC_RXR_DMI_2

DMI

DMI

+VCCP +3VS

RB751V-4 0TE17_SOD323 -2

RB751V-4 0TE17_SOD323 -2

Deciphered Date

Deciphered Date

Deciphered Date

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13

VTT

VTT

VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22

VCC_DMI

VCC_HV_1
VCC_HV_2

VTTLF1
VTTLF2
VTTLF3

VTTLF

VTTLF

D9

D9

U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1

AT23
AU28
AU24
AT29
AT25
AT30

AR29

B23
B21
A21

AJ50

BK24
BK23
BJ24
BJ23

A43

C40
B40

AD51
W50
W51
V49
V50

AH50
AH51

A7
F2
AH1

0.47U_06 03_16V4Z

0.47U_06 03_16V4Z

12

R156 10_060 3_5%

R156 10_060 3_5%

2

+VCCP

1

+

+

C395

C395

330U_V_ 2.5VM

330U_V_ 2.5VM

2

<BOM Struc ture>

<BOM Struc ture>

+1.25VS_ AXD

C155

C155

1U_0603 _10V4Z

1U_0603 _10V4Z

C343

C343

10U_080 5_10V4Z

10U_080 5_10V4Z

+1.8V_TX_LVDS: 100mA
(220UF*1, 1000PF*1)

VCC_HV: 100mA

VTTLF_C AP1
VTTLF_C AP2
VTTLF_C AP3

1 2

C398

C398

0.47U_06 03_16V4Z

0.47U_06 03_16V4Z

2

C371

C371

+3VS

C336

C336

220U_D2 _4VMR15

220U_D2 _4VMR15

GM@

GM@

C347

C347

0.47U_06 03_16V4Z

0.47U_06 03_16V4Z

VTT: 850mA
(220UF*1, 4.7UF*21, 2.2UF*1, 0.47UF*1)

C390

C390

4.7U_080 5_10V4Z

4.7U_080 5_10V4Z

VCC_AXD: 515mA
(22UF*1, 1UF*1)

+1.25VS_ AXF

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

22U_080 5_6.3V6M

22U_080 5_6.3V6M

+1.8V_TX _LVDS

C389

C389

4.7U_080 5_10V4Z

4.7U_080 5_10V4Z

R188 0_0603 _5%

R188 0_0603 _5%

1

C179

C179

22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

VCC_AXF: 495mA
(10UF*1, 1UF*1)

1

2

1

C133

C133

2

+1.8V_SM _CK

C466

C466

1

1

+

+

C353

C353

2

2

GM@

GM@

1000P_0 402_50V7K

1000P_0 402_50V7K

+VCCP_P EG

C393

C393

220U_D2 _4VMR15

220U_D2 _4VMR15

C108

C108

2.2U_080 5_10V6K

2.2U_080 5_10V6K

+1.25VS

R273 0_0603 _5%

R273 0_0603 _5%

C346

C346

1U_0603 _10V4Z

1U_0603 _10V4Z

VCC_DMI: 100mA (0.1UF*1)

+1.25VS

VCC_SM_CK: 200mA (22UF*1, 0.1UF*1)

1

2

1

C463

C463

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

L12

L12

1 2

MBK1608 121YZF_0603

MBK1608 121YZF_0603

GM@

GM@

R105

R105
0_0402_ 5%

0_0402_ 5%

PM@

PM@

+1.05VS_PEG: 1260mA (220UF*1, 10UF*1)

1

2

+

+

C120

C120

10U_080 5_10V4Z

10U_080 5_10V4Z

1

2

+1.05VS_DMI: 100mA (220UF*1, 10UF*1)

1

2

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet

+VCCP_P EG

C129

C129

10U_080 5_10V4Z

10U_080 5_10V4Z

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Crestline (6/7)-VCC

Crestline (6/7)-VCC

Crestline (6/7)-VCC

LA-3861P

LA-3861P

LA-3861P

1

C111

C111

0.47U_06 03_16V4Z

0.47U_06 03_16V4Z

+1.25VS

L34

L34

1 2

0_0603_ 5%

0_0603_ 5%

R396

R396
1_0603_ 5%

1_0603_ 5%

+1.8V

1 2

R162 0_0805 _5%

R162 0_0805 _5%

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

+1.8V

1 2

C472

C472
10U_080 5_10V4Z

10U_080 5_10V4Z

+VCCP

+3VS

1

C98

C98

2

Close to VCC_HV (pin C40/B40)

of

12 47Monday, August 2 0, 2007

12 47Monday, August 2 0, 2007

12 47Monday, August 2 0, 2007

1

0.1

0.1

0.1

5

http://shop36609371.taobao.com ; Email:[e-mail]

U20I

U20I

A13

VSS_1

A15

VSS_2

A17

VSS_3

A24

VSS_4

AA21

VSS_5

AA24

VSS_6

AA29

VSS_7

AB20

VSS_8

AB23

VSS_9

AB26

VSS_10

D D

C C

B B

A A

AB28

VSS_11

AB31

VSS_12

AC10

VSS_13

AC13

VSS_14

AC3

VSS_15

AC39

VSS_16

AC43

VSS_17

AC47

VSS_18

AD1

VSS_19

AD21

VSS_20

AD26

VSS_21

AD29

VSS_22

AD3

VSS_23

AD41

VSS_24

AD45

VSS_25

AD49

VSS_26

AD5

VSS_27

AD50

VSS_28

AD8

VSS_29

AE10

VSS_30

AE14

VSS_31

AE6

VSS_32

AF20

VSS_33

AF23

VSS_34

AF24

VSS_35

AF31

VSS_36

AG2

VSS_37

AG38

VSS_38

AG43

VSS_39

AG47

VSS_40

AG50

VSS_41

AH3

VSS_42

AH40

VSS_43

AH41

VSS_44

AH7

VSS_45

AH9

VSS_46

AJ11

VSS_47

AJ13

VSS_48

AJ21

VSS_49

AJ24

VSS_50

AJ29

VSS_51

AJ32

VSS_52

AJ43

VSS_53

AJ45

VSS_54

AJ49

VSS_55

AK20

VSS_56

AK21

VSS_57

AK26

VSS_58

AK28

VSS_59

AK31

VSS_60

AK51

VSS_61

AL1

VSS_62

AM11

VSS_63

AM13

VSS_64

AM3

VSS_65

AM4

VSS_66

AM41

VSS_67

AM45

VSS_68

AN1

VSS_69

AN38

VSS_70

AN39

VSS_71

AN43

VSS_72

AN5

VSS_73

AN7

VSS_74

AP4

VSS_75

AP48

VSS_76

AP50

VSS_77

AR11

VSS_78

AR2

VSS_79

AR39

VSS_80

AR44

VSS_81

AR47

VSS_82

AR7

VSS_83

AT10

VSS_84

AT14

VSS_85

AT41

VSS_86

AT49

VSS_87

AU1

VSS_88

AU23

VSS_89

AU29

VSS_90

AU3

VSS_91

AU36

VSS_92

AU49

VSS_93

AU51

VSS_94

AV39

VSS_95

AV48

VSS_96

AW1

VSS_97

AW12

VSS_98

AW16

VSS_99

CRESTLINE _1p0

CRESTLINE _1p0

PM@

PM@

5

VSS

VSS

VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198

AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41

4

U20J

U20J

C46

VSS_199

C50

VSS_200

C7

VSS_201

D13

VSS_202

D24

VSS_203

D3

VSS_204

D32

VSS_205

D39

VSS_206

D45

VSS_207

D49

VSS_208

E10

VSS_209

E16

VSS_210

E24

VSS_211

E28

VSS_212

E32

VSS_213

E47

VSS_214

F19

VSS_215

F36

VSS_216

F4

VSS_217

F40

VSS_218

F50

VSS_219

G1

VSS_220

G13

VSS_221

G16

VSS_222

G19

VSS_223

G24

VSS_224

G28

VSS_225

G29

VSS_226

G33

VSS_227

G42

VSS_228

G45

VSS_229

G48

VSS_230

G8

VSS_231

H24

VSS_232

H28

VSS_233

H4

VSS_234

H45

VSS_235

J11

VSS_236

J16

VSS_237

J2

VSS_238

J24

VSS_239

J28

VSS_240

J33

VSS_241

J35

VSS_242

J39

VSS_243

K12

VSS_245

K47

VSS_246

K8

VSS_247

L1

VSS_248

L17

VSS_249

L20

VSS_250

L24

VSS_251

L28

VSS_252

L3

VSS_253

L33

VSS_254

L49

VSS_255

M28

VSS_256

M42

VSS_257

M46

VSS_258

M49

VSS_259

M5

VSS_260

M50

VSS_261

M9

VSS_262

N11

VSS_263

N14

VSS_264

N17

VSS_265

N29

VSS_266

N32

VSS_267

N36

VSS_268

N39

VSS_269

N44

VSS_270

N49

VSS_271

N7

VSS_272

P19

VSS_273

P2

VSS_274

P23

VSS_275

P3

VSS_276

P50

VSS_277

R49

VSS_278

T39

VSS_279

T43

VSS_280

T47

VSS_281

U41

VSS_282

U45

VSS_283

U50

VSS_284

V2

VSS_285

V3

VSS_286

CRESTLINE _1p0

CRESTLINE _1p0

PM@

PM@

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VSS

VSS

3

W11

VSS_287

W39

VSS_288

W43

VSS_289

W47

VSS_290

W5

VSS_291

W7

VSS_292

Y13

VSS_293

Y2

VSS_294

Y41

VSS_295

Y45

VSS_296

Y49

VSS_297

Y5

VSS_298

Y50

VSS_299

Y11

VSS_300

P29

VSS_301

T29

VSS_302

T31

VSS_303

T33

VSS_304

R28

VSS_305

AA32

VSS_306

AB32

VSS_307

AD32

VSS_308

AF28

VSS_309

AF29

VSS_310

AT27

VSS_311

AV25

VSS_312

H50

VSS_313

Compal Secret Data

Compal Secret Data

2006/08/ 18 2007/8/1 8

2006/08/ 18 2007/8/1 8

2006/08/ 18 2007/8/1 8

3

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

B

B

B

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Crestline (7/7)-GND

Crestline (7/7)-GND

Crestline (7/7)-GND

LA-3861P

LA-3861P

LA-3861P

1

0.1

0.1

0.1

13 47Monday, August 2 0, 2007

13 47Monday, August 2 0, 2007

13 47Monday, August 2 0, 2007

1

5

http://shop36609371.taobao.com ; Email:[e-mail]

4

3

2

1

+1.8V +1.8V

JP25

JP25

+DIMM_VREF

DDRA_SDQ0
DDRA_SDQ1

1

C228

C228

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

DDRA_SDQS0#
DDRA_SDQS0

DDRA_SDQ2
DDRA_SDQ3

DDRA_SDQ8
DDRA_SDQ9

DDRA_SDQS1#
DDRA_SDQS1

DDRA_SDQ10
DDRA_SDQ11

DDRA_SDQ16
DDRA_SDQ17

DDRA_SDQS2#
DDRA_SDQS2

DDRA_SDQ18
DDRA_SDQ19

DDRA_SDQ24
DDRA_SDQ25

DDRA_SDM3
EC_TX_P80_DATA

DDRA_SDQ26
DDRA_SDQ27

DDRA_CKE0

EC_RX_P80_CLK
DDRA_SBS2

DDRA_SMA12
DDRA_SMA9
DDRA_SMA8

DDRA_SMA5
DDRA_SMA3
DDRA_SMA1

DDRA_SMA10
DDRA_SBS0
DDRA_SWE#

DDRA_SCAS#
DDRA_SCS1#

DDRA_ODT1

DDRA_SDQ32
DDRA_SDQ33

DDRA_SDQS4#
DDRA_SDQS4

DDRA_SDQ34
DDRA_SDQ35

DDRA_SDQ40
DDRA_SDQ41

DDRA_SDM5

DDRA_SDQ42
DDRA_SDQ43

DDRA_SDQ48
DDRA_SDQ49

EC_RX_P80_CLK_R

DDRA_SDQS6#
DDRA_SDQS6

DDRA_SDQ50
DDRA_SDQ51

DDRA_SDQ56
DDRA_SDQ57

DDRA_SDM7

DDRA_SDQ58
DDRA_SDQ59

D_CK_SDATA
D_CK_SCLK

+3VS

1

2

DIMM0 STD H:5.2mm (BOT)

DDRA_SDQS0#(9)
DDRA_SDQS0(9)

D D

DDRA_SDQS1#(9)
DDRA_SDQS1(9)

DDRA_SDQS2#(9)
DDRA_SDQS2(9)

EC_TX_P80_DATA(15,32,34)

C C

EC_RX_P80_CLK(15,32,34)

B B

EC_RX_P80_CLK

A A

DDRA_CKE0(8)

DDRA_SBS2(9)

DDRA_SBS0(9)
DDRA_SWE#(9)

DDRA_SCAS#(9)
DDRA_SCS1#(8)

DDRA_ODT1(8)

DDRA_SDQS4#(9)
DDRA_SDQS4(9)

R201 0_0402_5%

R201 0_0402_5%

1 2

EC_RX_P80_CLK_R(15)

DDRA_SDQS6#(9)
DDRA_SDQS6(9)

D_CK_SDATA(15,16,24,25)
D_CK_SCLK(15,16,24,25)

+3VS

C234

C234

2.2U_0805_10V6K

2.2U_0805_10V6K

5

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

TYCO_292526-4

TYCO_292526-4

ME@

ME@

Change PCB Footprint

VSS
DQ4
DQ5

VSS
DM0

VSS
DQ6
DQ7

VSS

DQ12
DQ13

VSS
DM1

VSS

CK0

CK0#

VSS

DQ14
DQ15

VSS

VSS

DQ20
DQ21

VSS

DM2

VSS

DQ22
DQ23

VSS

DQ28
DQ29

VSS

DQS3#

DQS3

VSS

DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD

BA1

RAS#

VDD

ODT0

NC/A13

VDD

VSS

DQ36
DQ37

VSS
DM4

VSS

DQ38
DQ39

VSS

DQ44
DQ45

VSS

DQS5#

DQS5

VSS

DQ46
DQ47

VSS

DQ52
DQ53

VSS

CK1

CK1#

VSS
DM6

VSS

DQ54
DQ55

VSS

DQ60
DQ61

VSS

DQS7#

DQS7

VSS

DQ62
DQ63

VSS

SA0

SA1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90

A11

92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110

S0#

112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

4

9/25 Change DIMM0 to SP070004Z00 (HBL50)

DDRA_SDQ4
DDRA_SDQ5

DDRA_SDM0

DDRA_SDQ6
DDRA_SDQ7

DDRA_SDQ12
DDRA_SDQ13

DDRA_SDM1

DDRA_SDQ14
DDRA_SDQ15

DDRA_SDQ20
DDRA_SDQ21

DDRA_SDM2

DDRA_SDQ22
DDRA_SDQ23

DDRA_SDQ28
DDRA_SDQ29

DDRA_SDQS3#
DDRA_SDQS3

DDRA_SDQ30
DDRA_SDQ31

DDRA_CKE1

DDRA_SMA14

DDRA_SMA11
DDRA_SMA7
DDRA_SMA6

DDRA_SMA4
DDRA_SMA2
DDRA_SMA0

DDRA_SBS1
DDRA_SRAS#
DDRA_SCS0#

DDRA_ODT0
DDRA_SMA13

DDRA_SDQ36
DDRA_SDQ37

DDRA_SDM4

DDRA_SDQ38
DDRA_SDQ39

DDRA_SDQ44
DDRA_SDQ45

DDRA_SDQS5#
DDRA_SDQS5

DDRA_SDQ46
DDRA_SDQ47

DDRA_SDQ52
DDRA_SDQ53

DDRA_SDM6

DDRA_SDQ54
DDRA_SDQ55

DDRA_SDQ60
DDRA_SDQ61

DDRA_SDQS7#
DDRA_SDQS7

DDRA_SDQ62
DDRA_SDQ63

R204 10 K_0402_5% R204 10K_0402_5%

1 2

R205 10 K_0402_5% R205 10K_0402_5%

1 2

DDRA_CLK0 (8)
DDRA_CLK0# (8)

R207 0_0402_5%

R207 0_0402_5%

1 2

DDRA_SDQS3# (9)
DDRA_SDQS3 (9)

DDRA_CKE1 (8)

DDRA_SBS1 (9)
DDRA_SRAS# (9)
DDRA_SCS0# (8)

DDRA_ODT0 (8)

DDRA_SDQS5# (9)
DDRA_SDQS5 (9)

DDRA_CLK1 (8)
DDRA_CLK1# (8)

DDRA_SDQS7# (9)
DDRA_SDQS7 (9)

PM_EXTTS#0 (8)

DDRA_SMA14(8)

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+DIMM_VREF

1

2

95.10.5 modify

2006/08/18 2007/8/18

2006/08/18 2007/8/18

2006/08/18 2007/8/18

3

20mils

C224

C224

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDRA_SMA[0..13](9)

DDRA_SDQ[0..63](9)

DDRA_SDM[0..7](9)

DDRA_CKE0
DDRA_SBS2

DDRA_SMA12
DDRA_SMA9

DDRA_SMA8
DDRA_SMA5

DDRA_SMA3
DDRA_SMA1

DDRA_SMA10
DDRA_SBS0

DDRA_SWE#
DDRA_SCAS#

DDRA_SCS1#
DDRA_ODT1

DDRA_SMA11
DDRA_SMA14

DDRA_SMA6
DDRA_SMA7

DDRA_SMA2
DDRA_SMA4

DDRA_SBS1
DDRA_SMA0

DDRA_SCS0#
DDRA_SRAS#

DDRA_SMA13
DDRA_ODT0

DDRA_CKE1

1

C225

C225

2.2U_0805_10V6K

2.2U_0805_10V6K

2

1 4
2 3

RP14 56_0404_4P 2R_5%

RP14 56_0404_4P 2R_5%

1 4
2 3

RP15 56_0404_4P 2R_5%

RP15 56_0404_4P 2R_5%

RP16 56_0404_4P 2R_5%

RP16 56_0404_4P 2R_5%

RP17 56_0404_4P 2R_5%

RP17 56_0404_4P 2R_5%

RP18 56_0404_4P 2R_5%

RP18 56_0404_4P 2R_5%

RP19 56_0404_4P 2R_5%

RP19 56_0404_4P 2R_5%

RP20 56_0404_4P 2R_5%

RP20 56_0404_4P 2R_5%

RP21 56_0404_4P 2R_5%

RP21 56_0404_4P 2R_5%

RP22 56_0404_4P 2R_5%

RP22 56_0404_4P 2R_5%

RP23 56_0404_4P 2R_5%

RP23 56_0404_4P 2R_5%

RP24 56_0404_4P 2R_5%

RP24 56_0404_4P 2R_5%

RP25 56_0404_4P 2R_5%

RP25 56_0404_4P 2R_5%

RP26 56_0404_4P 2R_5%

RP26 56_0404_4P 2R_5%

R208 56_0402_5%

R208 56_0402_5%

Layout Note:
Place these resistor
closely JP35,all
trace length Max=1.5"

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1K_0402_1%

1K_0402_1%

1K_0402_1%

1K_0402_1%

DDRA_SMA[0..13]

DDRA_SDQ[0..63]

DDRA_SDM[0..7]

+0.9VS

R195

R195

R198

R198

+1.8V

12

+DIMM_VREF

Layout Note:
Place near JP35

1

C245

C245

2.2U_0805_10V6K

2.2U_0805_10V6K

2

1

C244

C244

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C236

C236

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C241

C241

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C254

C254

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

C233

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

C233

2.2U_0805_10V6K

2.2U_0805_10V6K

2

1

C230

C230

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C237

C237

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C250

C250

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C255

C255

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

LA-3861P

LA-3861P

LA-3861P

1

C242

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

C242

2.2U_0805_10V6K

2.2U_0805_10V6K

2

1

C231

C231

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C238

C238

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C251

C251

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

DDRII-SODIMM0

DDRII-SODIMM0

DDRII-SODIMM0

1

1

C246

C246

2.2U_0805_10V6K

2.2U_0805_10V6K

2

1

C239

C239

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C252

C252

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

14 47Monday, August 20, 2007

14 47Monday, August 20, 2007

14 47Monday, August 20, 2007

0.1

0.1

0.1

12

1

C221

C221

220P_0402_50V7K

220P_0402_50V7K

2

@

@

+1.8V

1

C232

C232

2.2U_0805_10V6K

2.2U_0805_10V6K

2

+1.8V

1

C243

C243

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+0.9VS

1

C235

C235

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+0.9VS

1

C240

C240

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+0.9VS

1

C253

C253

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

2

A

http://shop36609371.taobao.com ; Email:[e-mail]

B

C

D

E

9/25 Change DIMM1 to SP070006F00

DQ12
DQ13

CK0#

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQS3

DQ30
DQ31

RAS#

ODT0

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQS5

DQ46
DQ47

DQ52
DQ53

CK1#

DQ54
DQ55

DQ60
DQ61

DQS7

DQ62
DQ63

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS

VSS
DM1
VSS
CK0

VSS

VSS

VSS

VSS

DM2
VSS

VSS

VSS

VSS

VSS

VDD

VDD

VDD

VDD
BA1

VDD

VDD

VSS

VSS
DM4
VSS

VSS

VSS

VSS

VSS

VSS
CK1

VSS
DM6
VSS

VSS

VSS

VSS

VSS
SAO
SA1

+1.8V+1.8V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90

A11

92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110

S0#

112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

B

DDRB_SDQ4
DDRB_SDQ5

DDRB_SDM0

DDRB_SDQ6
DDRB_SDQ7

DDRB_SDQ12
DDRB_SDQ13

DDRB_SDM1

DDRB_CLK0 (8)

R199

R199

DDRB_CLK0# (8)

0_0402_5%

0_0402_5%

1 2

DDRB_CKE1 (8)

DDRB_SMA14 (8)

DDRB_SBS1 (9)
DDRB_SRAS# (9)
DDRB_SCS0# (8)

DDRB_ODT0 (8)

DDRB_CLK1 (8)
DDRB_CLK1# (8)

DDRB_SDQ14
DDRB_SDQ15

DDRB_SDQ20
DDRB_SDQ21

DDRB_SDM2

DDRB_SDQ22
DDRB_SDQ23

DDRB_SDQ28
DDRB_SDQ29

DDRB_SDQS3#
DDRB_SDQS3

DDRB_SDQ30
DDRB_SDQ31

DDRB_CKE1

DDRB_SMA14

DDRB_SMA11
DDRB_SMA7
DDRB_SMA6

DDRB_SMA4
DDRB_SMA2
DDRB_SMA0

DDRB_SBS1
DDRB_SRAS#
DDRB_SCS0#

DDRB_ODT0
DDRB_SMA13

DDRB_SDQ36
DDRB_SDQ37

DDRB_SDM4

DDRB_SDQ38
DDRB_SDQ39

DDRB_SDQ44
DDRB_SDQ45

DDRB_SDQS5#
DDRB_SDQS5

DDRB_SDQ46
DDRB_SDQ47

DDRB_SDQ52
DDRB_SDQ53

DDRB_SDM6

DDRB_SDQ54
DDRB_SDQ55

DDRB_SDQ60
DDRB_SDQ61

DDRB_SDQS7

DDRB_SDQ62
DDRB_SDQ63

R196 10K_0402_5%

R196 10K_0402_5%

1 2

R197 10K_0402_5%

R197 10K_0402_5%

1 2

DDRB_SMA[0..13](9)

DDRB_SDQ[0..63](9)

DDRB_SDM[0..7](9)

DDRB_SMA[0..13]

DDRB_SDQ[0..63]

DDRB_SDM[0..7]

DDRB_CLK0?

PM_EXTTS#1 (8)

DDRB_SDQS3# (9)
DDRB_SDQS3 (9)

DDRB_CKE0
DDRB_SBS2

DDRB_SMA12
DDRB_SMA9

DDRB_SMA8
DDRB_SMA5

DDRB_SMA3
DDRB_SMA1

DDRB_SMA10
DDRB_SBS0

DDRB_SWE#
DDRB_SCAS#

DDRB_SCS1#
DDRB_ODT1

DDRB_SMA11
DDRB_CKE1

DDRB_SDQS5# (9)
DDRB_SDQS5 (9)

DDRB_CLK1?

DDRB_SDQS7# (9)
DDRB_SDQS7 (9)

+3VS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

DDRB_SMA14(8)

2006/08/18 2007/8/18

2006/08/18 2007/8/18

2006/08/18 2007/8/18

DDRB_SMA6
DDRB_SMA7

DDRB_SMA2
DDRB_SMA4

DDRB_SBS1
DDRB_SMA0

DDRB_SCS0#
DDRB_SRAS#

DDRB_SMA13
DDRB_ODT0

DDRB_SMA14DDRB_SDQS7#

Layout Note:
Place these resistor
closely JP35,all
trace length Max=1.5"

Compal Secret Data

Compal Secret Data

Compal Secret Data

1 4
2 3

RP1 56_0404_4P2R_5%

RP1 56_0404_4P2R_5%

1 4
2 3

RP2 56_0404_4P2R_5%

RP2 56_0404_4P2R_5%

1 4
2 3

RP3 56_0404_4P2R_5%

RP3 56_0404_4P2R_5%

1 4
2 3

RP4 56_0404_4P2R_5%

RP4 56_0404_4P2R_5%

1 4
2 3

RP5 56_0404_4P2R_5%

RP5 56_0404_4P2R_5%

1 4
2 3

RP6 56_0404_4P2R_5%

RP6 56_0404_4P2R_5%

1 4
2 3

RP7 56_0404_4P2R_5%

RP7 56_0404_4P2R_5%

1 4
2 3

RP8 56_0404_4P2R_5%

RP8 56_0404_4P2R_5%

1 4
2 3

RP9 56_0404_4P2R_5%

RP9 56_0404_4P2R_5%

1 4
2 3

RP10 56_0404_4P 2R_5%

RP10 56_0404_4P 2R_5%

1 4
2 3

RP11 56_0404_4P 2R_5%

RP11 56_0404_4P 2R_5%

1 4
2 3

RP12 56_0404_4P 2R_5%

RP12 56_0404_4P 2R_5%

1 4
2 3

RP13 56_0404_4P 2R_5%

RP13 56_0404_4P 2R_5%

1 2

R194 56_0402_5%

R194 56_0402_5%

Deciphered Date

Deciphered Date

Deciphered Date

D

+0.9VS

JP23

JP23

+DIMM_VREF

DDRB_SDQ0
DDRB_SDQ1

1 1

2 2

EC_TX_P80_DATA(14,32,34)

EC_RX_P80_CLK(14,32,34)

DDRB_SDQS0#(9)
DDRB_SDQS0(9)

DDRB_SDQS1#(9)
DDRB_SDQS1(9)

DDRB_SDQS2#(9)
DDRB_SDQS2(9)

DDRB_CKE0(8)

DDRB_SBS2(9)

DDRB_SBS0(9)
DDRB_SWE#(9)

DDRB_SCAS#(9)
DDRB_SCS1#(8)

DDRB_ODT1(8)

DDRB_SDQS4#(9)

3 3

EC_RX_P80_CLK_R(14)

4 4

DDRB_SDQS4(9)

DDRB_SDQS6#(9)
DDRB_SDQS6(9)

D_CK_SDATA(14,16,24,25)
D_CK_SCLK(14,16,24,25)

DDRB_SDQS0#
DDRB_SDQS0

DDRB_SDQ2
DDRB_SDQ3

DDRB_SDQ8
DDRB_SDQ9

DDRB_SDQS1#
DDRB_SDQS1

DDRB_SDQ10
DDRB_SDQ11

DDRB_SDQ16
DDRB_SDQ17

DDRB_SDQS2#
DDRB_SDQS2

DDRB_SDQ18
DDRB_SDQ19

DDRB_SDQ24
DDRB_SDQ25

DDRB_SDM3
EC_TX_P80_DATA

DDRB_SDQ26
DDRB_SDQ27

DDRB_CKE0

EC_RX_P80_CLK
DDRB_SBS2

DDRB_SMA12
DDRB_SMA9
DDRB_SMA8

DDRB_SMA5
DDRB_SMA3
DDRB_SMA1

DDRB_SMA10
DDRB_SBS0
DDRB_SWE#

DDRB_SCAS#
DDRB_SCS1#

DDRB_ODT1

DDRB_SDQ32
DDRB_SDQ33

DDRB_SDQS4#
DDRB_SDQS4

DDRB_SDQ34
DDRB_SDQ35

DDRB_SDQ40
DDRB_SDQ41

DDRB_SDM5

DDRB_SDQ42
DDRB_SDQ43

DDRB_SDQ48
DDRB_SDQ49

EC_RX_P80_CLK_R

DDRB_SDQS6#
DDRB_SDQS6

DDRB_SDQ50
DDRB_SDQ51

DDRB_SDQ56
DDRB_SDQ57

DDRB_SDM7

DDRB_SDQ58
DDRB_SDQ59

D_CK_SDATA
D_CK_SCLK

+3VS

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

TYCO_292530-4

TYCO_292530-4

ME@

ME@

DQS3#

NC/CKE1

NC/A15
NC/A14

NC/A13

DQS5#

DQS7#

DIMM1 STD H:9.2mm (BOT)

A

+DIMM_VREF

1

C199

C199

2.2U_0805_10V6K

2.2U_0805_10V6K

2

Layout Note:
Place near JP34

+1.8V

1

C487

C487

C483

C483

2.2U_0805_10V6K

2.2U_0805_10V6K

2

2.2U_0805_10V6K

2.2U_0805_10V6K

+1.8V

1

C218

C218

C217

C217

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+0.9VS

1

C192

C192

C193

C193

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+0.9VS

1

C197

C197

C198

C198

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+0.9VS

1

C207

C207

C206

C206

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

C200

C200

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C219

C219

2.2U_0805_10V6K

2.2U_0805_10V6K

2

1

C482

C482

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C194

C194

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C203

C203

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C208

C208

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

LA-3861P

LA-3861P

LA-3861P

1

1

C220

C220

2

2

2.2U_0805_10V6K

2.2U_0805_10V6K

1

1

C479

C479

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

1

1

C195

C195

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

1

1

C204

C204

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

DDRII-SODIMM1

DDRII-SODIMM1

DDRII-SODIMM1

E

1

C216

C216

2.2U_0805_10V6K

2.2U_0805_10V6K

2

1

C196

C196

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C205

C205

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

15 47Monday, August 20, 2007

15 47Monday, August 20, 2007

15 47Monday, August 20, 2007

0.1

0.1

0.1