Compal LA-3551P, Aspire 5320, Aspire 5315, Aspire 5715Z, Aspire 5720G Schematic

...

1 1

Compal Confidential

2 2

ICL50/51, ICK70/71 Schematics Document

Intel Merom Processor with Crestline(PM965/GM965) + DDRII + ICH8M

(With ATI MXM/B)

3 3

2007-4-20

REV:1A

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/04/04 2008/04/04

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Cover Page

ICL50/ICK70 M/B LA-3551P Schematic

148Monday, April 23, 2007

1.0

Compal Confidential

Model Name : ICL50/51, ICK70/ICK71

Fan Control

page 36

File Name : LA-3551P

1 1

DVI-D Conn.

page 18

DVI

LCD Conn.

page 18

LVDS

CRT & TV-out

page 19

LVDS SDVO

Intel Merom Processor

uPGA-478 Package

H_A#(3..35)

(Socket P)

667/800MHz

page 4,5,6

FSB

Intel Crestline

H_D#(0..63)

uFCBGA-1299

PCI-Express

page 7,8,9,10,11,12,13

Thermal Sensor

ADM1032

page 4

Memory BUS(DDRII)

Dual Channel

1.8V DDRII 533/667

MXM II VGA/B

DMI

page 17

2 2

PCI-Express

Intel ICH8-M

PCI BUS

New Card Socket

MINI Card x2

WLAN, TV-Tuner

page 28page 29

LAN(GbE)

BCM5787M

page 26

IDSEL:AD20 (PIRQA#, GNT#2, REQ#2)

3.3V 33 MHz

Card Reader

R5C833

page 25

BGA-676

page 20,21,22,23

RJ45

page 26

3 3

RTC CKT.

page 33

BTN/B Conn.

page 32

1394 Conn.

page 25

5 in 1 socket

page 25

LPC BUS

ENE KB926

page 30

C-Link

3.3V 48MHz

3.3V 24.576MHz/48Mhz

3.3V ATA-100 S-ATA

USB

IDE

port 0, 1

SATA HDD Conn.

USB conn x2

USB port 0, 2

page 24

Clock Generator

ICS9LPRS365

page 16

200pin DDRII-SO-DIMM X2

BANK 0, 1, 2, 3

page 14,15

Bluetooth Conn

HD Audio

CDROM Conn.

page 24

MDC 1.5 Conn

page 33

HDA Codec

Audio AMP

Phone Jack x3

CMOS Camera

ALC268

page 34

page 35

Power On/Off CKT.

page 33

DC/DC Interface CKT.

page 37

LED/B Conn.

page 32

USB&TV/B Conn.

USB port 4, 6

page 29

Touch Pad

page 32

EC I/O Buffer

page 32

Int.KBD

page 32

BIOS

page 32

CIR

Power Circuit DC/DC

4 4

page 38,39,40,41 42,43,44,45

AUDIO/B Conn. w/Woofer(ICK70)

page 35

page 29

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/12/25 2007/12/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Block Diagrams

ICL50/ICK70 M/B LA-3551P Schematic

248Thursday, April 19, 2007

1.0

Voltage Rails

Power Plane Description

VIN

1 1

2 2

B+ +CPU_CORE +0.9VS 0.9V switched power rail for DDR terminator +1.05VS +1.25VS 1.25V switched power rail ON OFF OFF +1.5VS +1.8V +1.8VS 1.8V switched power rail +2.5VS +3VALW +3V +3V_LAN +3VS +5VALW +5VS +VSB VSB always on power rail ON ON* +RTCVCC RTC power

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU

1.05V switched power rail

1.5V switched power rail

1.8V power rail for DDR

2.5V switched power rail

3.3V always on power rail

3.3V power rail for SB

3.3V power rail for LAN

3.3V switched power rail 5V always on power rail 5V switched power rail

S1 S3 S5

N/A N/A N/A

ON OFF ON OFF ON OFF OFF

ON OFF OFF ON ON ON ON ON ON ON ONXX ON ON

ON ON

N/AN/AN/A OFF OFF

OFF OFF

OFF

ON ON*

OFF

ON*

OFFON

OFF

ONON

STATE

SIGNAL

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S1# SLP_S3#

SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

LOW

LOW LOW LOW LOW

HIGH

LOWLOWLOW

HIGHHIGHHIGH

HIGH

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7 NC

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

V typ

OFF

AD_BID

ON ON

OFF

AD_BID

0 V 0 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

LOW

OFF

max

BOARD ID Table BTO Option Table

External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts

1394/Card Reader

AD16 0

PIRQE PIRQG

Board ID

0 1 2 3 4 5 6 7

PCB Revision

0.1

0.2

0.3

1.0 1A

BTO Item BOM Structure

Discrete

UMA

PM@ GM@

EC SM Bus1 address

3 3

Device

Smart Battery EEPROM(24C16/02) GMT G781-1

Address Address

1010 000X b 1001 101X b

EC SM Bus2 address

Device

ADI ADM1032

1001 100X b0001 011X b

ICH8M SM Bus address

Device

Clock Generator (ICS9LPRS365)

DDR DIMM0 DDR DIMM2

4 4

Address

1101 001Xb

1001 000Xb 1001 010Xb

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/12/25 2007/12/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Notes List

ICL50/ICK70 M/B LA-3551P Schematic

348Monday, April 23, 2007

1.0

H_A#[3..35]7

H_REQ#[0..4]7

H_RS#[0..2]7

D D

C C

B B

H_A#[3..35] H_REQ#[0..4] H_RS#[0..2]

JP22A

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15

H_ADSTB#07

H_ADSTB#17

H_A20M#21

H_FERR#21

H_IGNNE#21

H_STPCLK#21

H_INTR21

H_NMI21

H_SMI#21

H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

JP22A

A[3]#

A[4]#

A[5]#

A[6]#

A[7]#

A[8]#

A[9]#

A[10]#

A[11]#

A[12]#

A[13]#

A[14]#

A[15]#

A[16]#

ADSTB[0]#

REQ[0]#

REQ[1]#

REQ[2]#

REQ[3]#

REQ[4]#

A[17]#

A[18]#

A[19]#

A[20]#

A[21]#

A[22]#

A[23]#

A[24]#

A[25]#

A[26]#

A[27]#

A[28]#

A[29]#

A[30]#

A[31]#

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

ADSTB[1]#

A20M#

FERR#

IGNNE#

STPCLK#

LINT0

LINT1

SMI#

RSVD[01]

RSVD[02]

RSVD[03]

RSVD[04]

RSVD[05]

RSVD[06]

RSVD[07]

D22

RSVD[08]

RSVD[09]

RSVD[10]

Merom Ball-out Rev 1a

CONN@

ADDR GROUP 0 ADDR GROUP 1

ICH

ADS# BNR# BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HIT#

HITM#

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY# PREQ#

TCK

TDO TMS

TRST#

XDP/ITP SIGNALS

DBR#

THERMAL

PROCHOT#

THERMDA THERMDC

THERMTRIP#

H CLK

BCLK[0] BCLK[1]

RESERVED

H1 E2 G5

H5 F21 E1

H_IERR#

D20 B3

H_RESET#

H_RS#0

H_RS#1

H_RS#2

G3 G2

G6 E4

AD4 AD3 AD1 AC4 AC2

XDP_BPM#5

AC1

XDP_TCK

AC5

XDP_TDI

AA6

TDI

AB3

XDP_TMS

AB5

XDP_TRST#

AB6

XDP_DBRESET#

C20

H_PROCHOT#

D21

THERMDA

A24

THERMDC

B25 C7

A22 A21

Layout Note: THERMDA&THERMDC Trace / Space = 10 / 10 mil THERMDA_R&THERMDC_R Trace / Space = 10 / 10 mil

H_ADS# 7 H_BNR# 7 H_BPRI# 7

H_DEFER# 7 H_DRDY# 7 H_DBSY# 7

H_BR0# 7

H_INIT# 21 H_LOCK# 7 H_RESET# 7

H_TRDY# 7 H_HIT# 7

H_HITM# 7

XDP_DBRESET# 22

H_THERMTRIP# 8,21

CLK_CPU_BCLK 16 CLK_CPU_BCLK# 16

XDP_TDI

XDP_TMS XDP_BPM#5

H_PROCHOT# H_IERR#

XDP_TRST#

XDP_TCK

+3VS

R59 150_0402_1%

1 2

R63 39_0402_1%

1 2

R46 54.9_0402_1%

1 2

R114 56_0402_5%

R114 56_0402_5% R113 56_0402_5%

R113 56_0402_5%

R57 649_0402_1% R57 649_0402_1% R37 27_0402_5%

R37 27_0402_5%

C485

0.1U_0402_16V4Z

1 2

12 12

+1.05VS

left NC if no ITP 39Ohm

BSEL2 BSEL1 BSEL0 BCLK

01 01

A A

0 1

200 166

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THERMDA

1 2

R546 0_0402_5%

THERMDC

1 2

R547 0_0402_5%

C484

2200P_0402_50V7K

For Next Generation CUP (45nm)

Compal Secret Data

2006/12/25 2007/12/25

Compal Secret Data

THERMDA_R THERMDC_R

Deciphered Date

U21

VDD

D+

SDATA

ALERT#

DTHERM#4GND

ADM1032ARMZ_MSOP8

SCLK

8 7 6 5

Date: Sheet

EC_SMB_CK2 30 EC_SMB_DA2 30

Compal Electronics, Inc.

Title

Size Document Number Rev

ICL50/ICK70 M/B LA-3551P Schematic

Compal Electronics, Inc.

Merom (1/3)

448Monday, April 23, 2007

1.0

H_D#[0..63]

JP22B

H_D#0

PAD

PAD PAD

PAD

@ @

H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

GTL_REF0

TEST1 TEST2 TEST3 TEST4 TEST5 TEST6

D D

H_DSTBN#07 H_DSTBN#2 7 H_DSTBP#07 H_DSTBP#2 7

H_DINV#07

C C

Trace Close CPU < 0.5'

Width=4 mil , Spacing: 15mil (55Ohm)

B B

R366

R366 1K_0402_1%

1K_0402_1%

R369

R369 2K_0402_1%

2K_0402_1%

+1.05VS

1 2

H_DSTBN#17 H_DSTBN#3 7 H_DSTBP#17 H_DSTBP#3 7

H_DINV#17

R378 1K_0402_5%@R378 1K_0402_5%@ R377 1K_0402_5%@R377 1K_0402_5%@

C444 0.1U_0402_16V4Z@C444 0.1U_0402_16V4Z@

1 2

12 12

T17

T17 T15

T15 T16

T16

CPU_BSEL016 CPU_BSEL116 CPU_BSEL216

JP22B

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H22

D[12]#

F26

D[13]#

K22

D[14]#

H23

D[15]#

J26

DSTBN[0]#

H26

DSTBP[0]#

H25

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L23

D[20]#

M24

D[21]#

L22

D[22]#

M23

D[23]#

P25

D[24]#

P23

D[25]#

P22

D[26]#

T24

D[27]#

R24

D[28]#

L25

D[29]#

T25

D[30]#

N25

D[31]#

L26

DSTBN[1]#

M26

DSTBP[1]#

N24

DINV[1]#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

Merom Ball-out Rev 1a

CONN@

DATA GRP 0

DATA GRP 1

MISC

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]#

DATA GRP 2DATA GRP 3

D[46]# D[47]#

DSTBN[2]#

DSTBP[2]#

DINV[2]#

D[48]# D[49]# D[50]# D[51]# D[52]# D[53]# D[54]# D[55]# D[56]# D[57]# D[58]# D[59]# D[60]# D[61]# D[62]# D[63]#

DSTBN[3]#

DSTBP[3]#

DINV[3]# COMP[0]

COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

H_D#32

Y22

H_D#33

AB24

H_D#34

V24

H_D#35

V26

H_D#36

V23

H_D#37

T22

H_D#38

U25

H_D#39

U23

H_D#40

Y25

H_D#41

W22

H_D#42

Y23

H_D#43

W24

H_D#44

W25

H_D#45

AA23

H_D#46

AA24

H_D#47

AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

COMP0 COMP1 COMP2 COMP3

H_PWRGOOD H_CPUSLP#

R376 27.4_0402_1%

R376 27.4_0402_1% R375 54.9_0402_1%

R375 54.9_0402_1% R54 27.4_0402_1%

R54 27.4_0402_1% R56 54.9_0402_1%

R56 54.9_0402_1%

H_DINV#2 7

H_DINV#3 7

1 2 1 2 1 2 1 2

H_DPRSTP# 8,21,45 H_DPSLP# 21 H_DPWR# 7 H_PWRGOOD 21 H_CPUSLP# 7 PSI# 45

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 18mils and Space 25mils (27.4Ohms) COMP1, COMP3 layout : Width 4mils and Space 25mils (55Ohms)

H_D#[0..63] 7

+CPU_CORE

JP22C

VCC[001]

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

VCC[010]

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

VCC[033]

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

VCC[042]

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA7

VCC[051]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

Merom Ball-out Rev 1a

CONN@

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]

VCCA[01] VCCA[02]

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

VCCSENSE

VSSSENSE

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

+CPU_CORE

VCCSENSE

VSSSENSE

C153

CPU_VID0 45 CPU_VID1 45 CPU_VID2 45 CPU_VID3 45 CPU_VID4 45 CPU_VID5 45 CPU_VID6 45

R20 100_0402_1%

R21 100_0402_1% R21 100_0402_1%

0.01U_0402_16V7K

1 2

C153

+1.05VS

20mils

C148

10U_0805_10V4Z

VCCSENSE 45

VSSSENSE 45

+1.5VS

+CPU_CORE

A A

Security Classification

2006/12/25 2007/12/25

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/12/25 2007/12/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

ICL50/ICK70 M/B LA-3551P Schematic

Date: Sheet

Compal Electronics, Inc.

Merom (2/3)

548Monday, April 23, 2007

1.0

+CPU_CORE

JP22D

VSS[001]

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

D D

C C

B B

A23

VSS[007]

AF2

VSS[008]

VSS[009]

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

VSS[017]

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

VSS[023]

C22

VSS[024]

C25

VSS[025]

VSS[026]

VSS[027]

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

VSS[035]

VSS[036]

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

VSS[044]

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

VSS[050]

F22

VSS[051]

F25

VSS[052]

VSS[053]

VSS[054]

G23

VSS[055]

G26

VSS[056]

VSS[057]

VSS[058]

H21

VSS[059]

H24

VSS[060]

VSS[061]

VSS[062]

J22

VSS[063]

J25

VSS[064]

VSS[065]

VSS[066]

K23

VSS[067]

K26

VSS[068]

VSS[069]

VSS[070]

L21

VSS[071]

L24

VSS[072]

VSS[073]

VSS[074]

M22

VSS[075]

M25

VSS[076]

VSS[077]

VSS[078]

N23

VSS[079]

N26

VSS[080] VSS[081]P3VSS[162]

Merom Ball-out Rev 1a

CONN@

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]

VSS[163]

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

C155

C155 330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

+CPU_CORE

C116

10U_0805_6.3V6M

+CPU_CORE

C461

10U_0805_6.3V6M

+CPU_CORE

C83

10U_0805_6.3V6M

+CPU_CORE

C473

10U_0805_6.3V6M

+CPU-CORE Decoupling SPCAP,Polymer

MLCC 0805 X5R

+1.05VS

C40

330U_D2E_2.5VM_R9

3 x 330uF(9mOhm/3) 3 x 330uF(9mOhm/3)

C157

330U_D2E_2.5VM_R9

South Side Secondary North Side Secondary

10U_0805_6.3V6M

C117

C474

10U_0805_6.3V6M

(Place these capacitors on South side,Secondary Layer)

C119

10U_0805_6.3V6M

C458

(Place these capacitors on North side,Secondary Layer)

10U_0805_6.3V6M

C82

C476

10U_0805_6.3V6M

(Place these capacitors on South side,Primary Layer)

C459

10U_0805_6.3V6M

C466

(Place these capacitors on North side,Primary Layer)

C,uF ESR, mohm ESL,nH 6X330uF 9m ohm/6 1.8nH/6

32X22uF 3m ohm/32 0.6nH/32 32X10uF 3m ohm/32 0.6nH/32

0.1U_0402_16V4Z

C97

0.1U_0402_16V4Z

C113

0.1U_0402_16V4Z

C90

0.1U_0402_16V4Z

+CPU_CORE

C440

330U_D2E_2.5VM_R9

C465

C120

C81

C460

C469

10U_0805_6.3V6M

C104

10U_0805_6.3V6M

C105

10U_0805_6.3V6M

C475

10U_0805_6.3V6M

C115

0.1U_0402_16V4Z

C441

10U_0805_6.3V6M

C86

0.1U_0402_16V4Z

C468

C93

C472

C118

C87

C27

330U_D2E_2.5VM_R9

C462

10U_0805_6.3V6M

C92

10U_0805_6.3V6M

C625

10U_0805_6.3V6M

C627

10U_0805_6.3V6M

C85

C84

C624

C626

A A

Security Classification

2006/12/25 2007/12/25

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/12/25 2007/12/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Merom (3/3)

ICL50/ICK70 M/B LA-3551P Schematic

648Monday, April 23, 2007

1.0

U23A

M10 N12

P13

W10

AD12

AE3 AD9 AC9 AC7

AC14 AD11 AC11

AB2 AD7

AB1 AC6

AE2 AC5 AG3

AJ9 AH8

AJ14

AE9

AE11 AH12

AJ5 AH5

AJ6

AE7

AJ7

AJ2

AE5

AJ3 AH2

AH13

E2 G2 G7 M6

H3 G4

K9 M2

V4 M3

J1 N5 N3

W6 W9

N2 Y7 Y9 P4

B3 C2

W1 W2

B6 E5

B9 A9

U23A

H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63

H_SWING H_RCOMP

H_SCOMP H_SCOMP#

H_CPURST# H_CPUSLP#

H_AVREF H_DVREF

CRESTLINE_1p0

PM@

H_ADSTB#_0 H_ADSTB#_1

HOST

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM# H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_REQ#_0 H_REQ#_1

H_REQ#_2 H_REQ#_3

H_REQ#_4

H_RS#_0

H_RS#_1

H_RS#_2

J13 B11 C11 M11 C15 F16 L13 G17 C14 K16 B13 L16 J17 B14 K19 P15 R17 B16 H20 L19 D17 M17 N16 J19 B18 E19 B17 B15 E17 C18 A19 B19 N19

G12 H17 G20 C8 E8 F12 D6 C10 AM5 AM7 H8 K7 E4 C6 G10 B7

K5 L2 AD13 AE13

M7 K3 AD2 AH11

L7 K2 AC2 AJ10

M14 E13 A11 H13 B12

E12 D7 D8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BR0# H_DEFER# H_DBSY# CLK_MCH_BCLK CLK_MCH_BCLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY#

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

H_D#[0..63]5

D D

+1.05VS

R408

R408 221_0402_1%

221_0402_1%

H_SWING

width=10mil

H_RCOMP

+1.05VS

1 2 12

C502

0.1U_0402_16V4Z

width=10mil

54.9_0402_1%

R407

R407 1K_0402_1%

1K_0402_1%

R404

R404 2K_0402_1%

2K_0402_1%

R415

1 2

width=10mil

C492

0.1U_0402_16V4Z

H_RESET#4

H_CPUSLP#5

+1.05VS

R414

54.9_0402_1%

1 2

width=10mil

1 2

R406 0_0402_5% R406 0_0402_5%

R409

C C

B B

R409 100_0402_1%

100_0402_1%

1 2

R410

24.9_0402_1%

width:spacing=10mil:20mil (<0.5")

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWING H_RCOMP

H_SCOMP H_SCOMP#

H_RESET# H_CPUSLP#

H_AVREF H_DVREF

H_A#[3..35] 4

H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4 H_BNR# 4 H_BPRI# 4 H_BR0# 4 H_DEFER# 4 H_DBSY# 4 CLK_MCH_BCLK 16 CLK_MCH_BCLK# 16 H_DPWR# 5 H_DRDY# 4 H_HIT# 4 H_HITM# 4 H_LOCK# 4 H_TRDY# 4

H_DINV#0 5 H_DINV#1 5 H_DINV#2 5 H_DINV#3 5

H_DSTBN#0 5 H_DSTBN#1 5 H_DSTBN#2 5 H_DSTBN#3 5

H_DSTBP#0 5 H_DSTBP#1 5 H_DSTBP#2 5 H_DSTBP#3 5

H_REQ#[0..4] 4

H_RS#[0..2] 4

within 100mil to Ball A9,B9

A A

Security Classification

2006/12/25 2007/12/25

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/12/25 2007/12/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Crestline GMCH(1/7)-GTL

ICL50/ICK70 M/B LA-3551P Schematic

748Monday, April 23, 2007

1.0

D D

DDRA_SMA1414 DDRB_SMA1415

C C

MCH_CLKSEL016 MCH_CLKSEL116 MCH_CLKSEL216

B B

PM_BMBUSY#22

H_DPRSTP#5,21,45 PM_EXTTS#014 PM_EXTTS#115

PLT_RST#20,22,24,26,30

H_THERMTRIP#4,21

PM_DPRSLPVR22,45

Use VGATE for GMCH_PWROK

VGATE16,22,45 SYS_PWROK22,33

A A

VGATE

SYS_PWROK

1 2

R333 0_0402_5%@R333 0_0402_5%@

1 2

R332 0_0402_5% R332 0_0402_5%

PM_EXTTS#0 PM_EXTTS#1

R326 100_0402_5% R326 100_0402_5% R184 0_0402_5% R184 0_0402_5%

1 2

GMCH_PWROK

DDRA_SMA14 DDRB_SMA14

MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2

MCH_CFG_5

MCH_CFG_9

MCH_CFG_12 MCH_CFG_13

MCH_CFG_16

MCH_CFG_19 MCH_CFG_20

GMCH_PWROK MCH_RSTIN#

P36 P37 R35

N35 AR12 AR13

AM12

AN13 AR37

AM36

AL36

AM37

D20

H10

B51

BJ20 BK22 BF19 BH20 BK18

BJ18 BF23

BG23

BC23 BD24

BJ29 BE24 BH39

AW20

BK20

C48 D47 B44 C44 A35 B37 B36 B34 C34

M20 M24

G41

AW49

AV20

N20 G36

BJ51 BK51 BK50 BL50 BL49

BL3 BL2 BK1

C51 B50 A50 A49 BK2

J12

P27 N27 N24 C21 C23 F23 N23 G23 J20 C20 R24 L23 J23 E23 E20 K23

L32 N33 L35

L39 L36 J36

BJ1

E1 A5

U23B

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14

RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27 RSVD28 RSVD29 RSVD30 RSVD31 RSVD32 RSVD33 RSVD34 RSVD35 RSVD36 RSVD37 RSVD38 RSVD39 RSVD40 RSVD41 RSVD42 RSVD43 RSVD44 RSVD45

CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20

PM_BM_BUSY# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR

NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16

CRESTLINE_1p0

PM@

SM_CK_0 SM_CK_1 SM_CK_3 SM_CK_4

SM_CK#_0 SM_CK#_1 SM_CK#_3 SM_CK#_4

SM_CKE_0 SM_CKE_1 SM_CKE_3 SM_CKE_4

SM_CS#_0 SM_CS#_1 SM_CS#_2 SM_CS#_3

SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_VREF_0

DDR MUXINGCLK

SM_VREF_1

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2

CFGRSVD

DMI_TXN_3 DMI_TXP_0

DMI_TXP_1

DMI

DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3

GFX_VR_EN

GRAPHICS VID

MISC

CL_CLK

CL_DATA

CL_PWROK

CL_RST# CL_VREF

SDVO_CTRL_CLK

SDVO_CTRL_DATA

CLK_REQ#

ICH_SYNC#

TEST_1 TEST_2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AV29 BB23 BA25 AV23

AW30 BA23 AW25 AW23

BE29 AY32 BD39 BG37

BG20 BK16 BG16 BE13

BH18 BJ15 BJ14 BE16

BL15 BK14

BK31 BL31

AR49 AW4

B42 C42 H48 H47

K44 K45

AN47 AJ38 AN42 AN46

AM47 AJ39 AN41 AN45

AJ46 AJ41 AM40 AM44

AJ47 AJ42 AM39 AM43

E35 A39 C38 B39 E36

AM49 AK50 AT43 AN49 AM50

H35 K36 G39 G40

A37 R32

SMRCOMP SMRCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

CLK_DREF_96M CLK_DREF_96M# CLK_DREF_SSC CLK_DREF_SSC#

CLK_MCH_3GPLL CLK_MCH_3GPLL#

DMI_ITX_MRX_N0 DMI_ITX_MRX_N1 DMI_ITX_MRX_N2 DMI_ITX_MRX_N3

DMI_ITX_MRX_P0 DMI_ITX_MRX_P1 DMI_ITX_MRX_P2 DMI_ITX_MRX_P3

DMI_MTX_IRX_N0 DMI_MTX_IRX_N1 DMI_MTX_IRX_N2 DMI_MTX_IRX_N3

DMI_MTX_IRX_P0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P3

SYS_PWROK CL_VREF

MCH_CLKREQ#

MCH_TEST_1 MCH_TEST_2

DDRA_CLK0 14 DDRA_CLK1 14 DDRB_CLK0 15 DDRB_CLK1 15

DDRA_CLK0# 14 DDRA_CLK1# 14 DDRB_CLK0# 15 DDRB_CLK1# 15

DDRA_CKE0 14 DDRA_CKE1 14 DDRB_CKE0 15 DDRB_CKE1 15

DDRA_SCS0# 14 DDRA_SCS1# 14 DDRB_SCS0# 15 DDRB_SCS1# 15

DDRA_ODT0 14 DDRA_ODT1 14 DDRB_ODT0 15 DDRB_ODT1 15

R426 20_0402_1% R426 20_0402_1%

1 2

R425 20_0402_1% R425 20_0402_1%

1 2

SM_VREF

CLK_DREF_96M 16 CLK_DREF_96M# 16 CLK_DREF_SSC 16 CLK_DREF_SSC# 16

CLK_MCH_3GPLL 16 CLK_MCH_3GPLL# 16

DMI_ITX_MRX_N0 22 DMI_ITX_MRX_N1 22 DMI_ITX_MRX_N2 22 DMI_ITX_MRX_N3 22

DMI_ITX_MRX_P0 22 DMI_ITX_MRX_P1 22 DMI_ITX_MRX_P2 22 DMI_ITX_MRX_P3 22

DMI_MTX_IRX_N0 22 DMI_MTX_IRX_N1 22 DMI_MTX_IRX_N2 22 DMI_MTX_IRX_N3 22

DMI_MTX_IRX_P0 22 DMI_MTX_IRX_P1 22 DMI_MTX_IRX_P2 22 DMI_MTX_IRX_P3 22

CLK_DREF_96M CLK_DREF_96M#

CLK_DREF_SSC CLK_DREF_SSC#

R193 0_0402_5%PM@R193 0_0402_5%PM@ R201 0_0402_5%PM@R201 0_0402_5%PM@

R235 0_0402_5%PM@R235 0_0402_5%PM@ R234 0_0402_5%PM@R234 0_0402_5%PM@

20mil

1 2 1 2

+1.8V

C354

0.1U_0402_16V4Z

+1.8V

R334

1K_0402_1%

1 2

R337 0_0402_5% R337 0_0402_5%

R335

1K_0402_1%

1 2

+1.05VS

as close as possible to the related balls

+1.25VS_AXD

R304

CL_CLK0 22 CL_DATA0 22

CL_RST#0 22

C312

0.1U_0402_16V4Z

MCH_CLKREQ# 16 MCH_ICH_SYNC# 22

R194 0_0402_5%

R194 0_0402_5% R247 20K_0402_5%

R247 20K_0402_5%

Compal Secret Data

2006/12/25 2007/12/25

Compal Secret Data

Deciphered Date

R304

1K_0402_1%

1 2

R305

392_0402_1%

1 2

+1.8V

R431

R431 1K_0402_1%

1K_0402_1%

C534

R432

3.01K_0402_1%

R433

R433 1K_0402_1%

1K_0402_1%

C534

2.2U_0805_10V6K

C535

2.2U_0805_10V6K

+DIMM_VREF

Strap Pin Table

CFG[2:0]

CFG5 CFG9

CFG[13:12]

CFG16 CFG19 CFG20

(PCIE/SDVO select)

SDVO_CTRLDATA

MCH_CFG_5 MCH_CFG_9 MCH_CFG_12 MCH_CFG_13 MCH_CFG_16

MCH_CFG_19 MCH_CFG_20

PM_EXTTS#0 PM_EXTTS#1 MCH_CLKREQ#

Title

Size Document Number Rev

Custom

Date: Sheet

SM_RCOMP_VOH

C528

0.01U_0402_16V7K

011 = 667MT/s FSB 010 = 800MT/s FSB

0 = DMI x 2 1 = DMI x 4

0 = Lane Reversal Enable 1 = Normal Operation

00 = Reserved 01 = XOR Mode Enabled 10 = All Z Mode Enabled 11 = Normal Operation

0 = Dynamic ODT Disabled 1 = Dynamic ODT Enabled

0 = Normal Operation 1 = DMI Lane Reversal Enable

0 = Only PCIE or SDVO is operational. 1 = PCIE/SDVO are operating simu.

0 = No SDVO Device Present

SM_RCOMP_VOL

C529

0.01U_0402_16V7K

(Default)

1 = SDVO Device Present

R218 4.02K_0402_1%@R218 4.02K_0402_1%@ R401 4.02K_0402_1%@R401 4.02K_0402_1%@ R233 4.02K_0402_1%@R233 4.02K_0402_1%@ R212 4.02K_0402_1%@R212 4.02K_0402_1%@ R241 4.02K_0402_1%@R241 4.02K_0402_1%@

R243 4.02K_0402_1%@R243 4.02K_0402_1%@ R237 4.02K_0402_1%@R237 4.02K_0402_1%@

R183 10K_0402_5%

R183 10K_0402_5% R196 10K_0402_5%

R196 10K_0402_5% R197 10K_0402_5%

R197 10K_0402_5%

Compal Electronics, Inc.

Crestline GMCH (2/7)-DMI/DDR

ICL50/ICK70 M/B LA-3551P Schematic

+3VS

848Monday, April 23, 2007

1.0

DDRB_SDQ[0..63] DDRB_SDM[0..7] DDRB_SMA[0..13]

DDRA_SBS0# 14 DDRA_SBS1# 14 DDRA_SBS2# 14

DDRA_SCAS# 14

DDRA_SDQS0 14 DDRA_SDQS1 14 DDRA_SDQS2 14 DDRA_SDQS3 14 DDRA_SDQS4 14 DDRA_SDQS5 14 DDRA_SDQS6 14 DDRA_SDQS7 14 DDRA_SDQS0# 14 DDRA_SDQS1# 14 DDRA_SDQS2# 14 DDRA_SDQS3# 14 DDRA_SDQS4# 14 DDRA_SDQS5# 14 DDRA_SDQS6# 14 DDRA_SDQS7# 14

DDRA_SRAS# 14

PAD

T13

DDRA_SWE# 14

DDRB_SDQ0 DDRB_SDQ1 DDRB_SDQ2 DDRB_SDQ3 DDRB_SDQ4 DDRB_SDQ5 DDRB_SDQ6 DDRB_SDQ7 DDRB_SDQ8 DDRB_SDQ9 DDRB_SDQ10 DDRB_SDQ11 DDRB_SDQ12 DDRB_SDQ13 DDRB_SDQ14 DDRB_SDQ15 DDRB_SDQ16 DDRB_SDQ17 DDRB_SDQ18 DDRB_SDQ19 DDRB_SDQ20 DDRB_SDQ21 DDRB_SDQ22 DDRB_SDQ23 DDRB_SDQ24 DDRB_SDQ25 DDRB_SDQ26 DDRB_SDQ27 DDRB_SDQ28 DDRB_SDQ29 DDRB_SDQ30 DDRB_SDQ31 DDRB_SDQ32 DDRB_SDQ33 DDRB_SDQ34 DDRB_SDQ35 DDRB_SDQ36 DDRB_SDQ37 DDRB_SDQ38 DDRB_SDQ39 DDRB_SDQ40 DDRB_SDQ41 DDRB_SDQ42 DDRB_SDQ43 DDRB_SDQ44 DDRB_SDQ45 DDRB_SDQ46 DDRB_SDQ47 DDRB_SDQ48 DDRB_SDQ49 DDRB_SDQ50 DDRB_SDQ51 DDRB_SDQ52 DDRB_SDQ53 DDRB_SDQ54 DDRB_SDQ55 DDRB_SDQ56 DDRB_SDQ57 DDRB_SDQ58 DDRB_SDQ59 DDRB_SDQ60 DDRB_SDQ61 DDRB_SDQ62 DDRB_SDQ63

AP49

AR51 AW50 AW51

AN51

AN50

AV50

AV49

BA50

BB50

BA49

BE50

BA51

AY49

BF50 BF49 BJ50 BJ44 BJ43

BL43 BK47 BK49 BK43 BK42

BJ41

BL41

BJ37

BJ36 BK41

BJ40

BL35 BK37 BK13 BE11 BK11 BC11 BC13 BE12 BC12 BG12

BJ10

BK10

BH5 BG1 BC2 BK3 BE4 BD3

BA3 BB3 AR1 AT3 AY2 AY3 AU2 AT2

BL9 BK5 BL5 BK9

BJ8 BJ6 BF4

BJ2

U23E

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

CRESTLINE_1p0

PM@

AY17

SB_BS_0

BG18

SB_BS_1

BG36

SB_BS_2

BE17

SB_CAS# SB_DM_0

SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6

SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13

SB_RAS#

SB_RCVEN#

SB_WE#

DDR SYSTEM MEMORY B

AR50 BD49 BK45 BL39 BH12 BJ7 BF3 AW2

AT50 BD50 BK46 BK39 BJ12 BL7 BE2 AV2 AU50 BC50 BL45 BK38 BK12 BK7 BF2 AV3

BC18 BG28 BG25 AW17 BF25 BE25 BA29 BC28 AY28 BD37 BG17 BE37 BA39 BG13

AV16 AY18

BC17

DDRB_SDM0 DDRB_SDM1 DDRB_SDM2 DDRB_SDM3 DDRB_SDM4 DDRB_SDM5 DDRB_SDM6 DDRB_SDM7

DDRB_SDQS0 DDRB_SDQS1 DDRB_SDQS2 DDRB_SDQS3 DDRB_SDQS4 DDRB_SDQS5 DDRB_SDQS6 DDRB_SDQS7 DDRB_SDQS0# DDRB_SDQS1# DDRB_SDQS2# DDRB_SDQS3# DDRB_SDQS4# DDRB_SDQS5# DDRB_SDQS6# DDRB_SDQS7#

DDRB_SMA0 DDRB_SMA1 DDRB_SMA2 DDRB_SMA3 DDRB_SMA4 DDRB_SMA5 DDRB_SMA6 DDRB_SMA7 DDRB_SMA8 DDRB_SMA9 DDRB_SMA10 DDRB_SMA11 DDRB_SMA12 DDRB_SMA13

SB_RCVEN#

DDRB_SCAS# 15

DDRB_SDQS0 15 DDRB_SDQS1 15 DDRB_SDQS2 15 DDRB_SDQS3 15 DDRB_SDQS4 15 DDRB_SDQS5 15 DDRB_SDQS6 15 DDRB_SDQS7 15 DDRB_SDQS0# 15 DDRB_SDQS1# 15 DDRB_SDQS2# 15 DDRB_SDQS3# 15 DDRB_SDQS4# 15 DDRB_SDQS5# 15 DDRB_SDQS6# 15 DDRB_SDQS7# 15

DDRB_SRAS# 15

PAD

DDRB_SWE# 15

DDRB_SBS0# 15 DDRB_SBS1# 15 DDRB_SBS2# 15

T14

AR43

AW44

BA45 AY46 AR41 AR45 AT42

AW47

BB45 BF48 BG47

BJ45 BB47 BG50 BH49 BE45

AW43

BE44 BG42 BE40 BF44 BH45 BG40 BF40 AR40

AW40

AT39

AW36 AW41

AY41 AV38 AT38 AV13 AT13

AW11

AV11 AU15 AT11 BA13 BA11 BE10 BD10

BD8

BG10

AW9

BD7

AR5 AR8 AR9 AN3 AM8

AN10

AN9 AM9

AN11

AY9

BB9 BB5 AY7 AT5 AT7 AY6 BB7

AT9

DDRA_SDQ[0..63] DDRA_SDM[0..7] DDRA_SMA[0..13]

U23D

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

CRESTLINE_1p0

PM@

DDRB_SDQ[0..63]15

DDRB_SDM[0..7]15

DDRB_SMA[0..13]15

BB19

SA_BS_0

BK19

SA_BS_1

BF29

SA_BS_2

BL17

SA_CAS# SA_DM_0

SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6

SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13

SA_RAS#

SA_RCVEN#

DDR SYSTEM MEMORY A

SA_WE#

AT45 BD44 BD42 AW38 AW13 BG8 AY5 AN6

AT46 BE48 BB43 BC37 BB16 BH6 BB2 AP3 AT47 BD47 BC41 BA37 BA16 BH7 BC1 AP2

BJ19 BD20 BK27 BH28 BL24 BK28 BJ27 BJ25 BL28 BA28 BC19 BE28 BG30 BJ16

BE18 AY20

BA19

DDRA_SDM0 DDRA_SDM1 DDRA_SDM2 DDRA_SDM3 DDRA_SDM4 DDRA_SDM5 DDRA_SDM6 DDRA_SDM7

DDRA_SDQS0 DDRA_SDQS1 DDRA_SDQS2 DDRA_SDQS3 DDRA_SDQS4 DDRA_SDQS5 DDRA_SDQS6 DDRA_SDQS7 DDRA_SDQS0# DDRA_SDQS1# DDRA_SDQS2# DDRA_SDQS3# DDRA_SDQS4# DDRA_SDQS5# DDRA_SDQS6# DDRA_SDQS7#

DDRA_SMA0 DDRA_SMA1 DDRA_SMA2 DDRA_SMA3 DDRA_SMA4 DDRA_SMA5 DDRA_SMA6 DDRA_SMA7 DDRA_SMA8 DDRA_SMA9 DDRA_SMA10 DDRA_SMA11 DDRA_SMA12 DDRA_SMA13

SA_RCVEN#

DDRA_SDQ[0..63]14

D D

C C

B B

DDRA_SDM[0..7]14

DDRA_SMA[0..13]14

DDRA_SDQ0 DDRA_SDQ1 DDRA_SDQ2 DDRA_SDQ3 DDRA_SDQ4 DDRA_SDQ5 DDRA_SDQ6 DDRA_SDQ7 DDRA_SDQ8 DDRA_SDQ9 DDRA_SDQ10 DDRA_SDQ11 DDRA_SDQ12 DDRA_SDQ13 DDRA_SDQ14 DDRA_SDQ15 DDRA_SDQ16 DDRA_SDQ17 DDRA_SDQ18 DDRA_SDQ19 DDRA_SDQ20 DDRA_SDQ21 DDRA_SDQ22 DDRA_SDQ23 DDRA_SDQ24 DDRA_SDQ25 DDRA_SDQ26 DDRA_SDQ27 DDRA_SDQ28 DDRA_SDQ29 DDRA_SDQ30 DDRA_SDQ31 DDRA_SDQ32 DDRA_SDQ33 DDRA_SDQ34 DDRA_SDQ35 DDRA_SDQ36 DDRA_SDQ37 DDRA_SDQ38 DDRA_SDQ39 DDRA_SDQ40 DDRA_SDQ41 DDRA_SDQ42 DDRA_SDQ43 DDRA_SDQ44 DDRA_SDQ45 DDRA_SDQ46 DDRA_SDQ47 DDRA_SDQ48 DDRA_SDQ49 DDRA_SDQ50 DDRA_SDQ51 DDRA_SDQ52 DDRA_SDQ53 DDRA_SDQ54 DDRA_SDQ55 DDRA_SDQ56 DDRA_SDQ57 DDRA_SDQ58 DDRA_SDQ59 DDRA_SDQ60 DDRA_SDQ61 DDRA_SDQ62 DDRA_SDQ63

A A

Security Classification

2006/12/25 2007/12/25

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/12/25 2007/12/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

Crestline GMCH (3/7)-DDRII

ICL50/ICK70 M/B LA-3551P Schematic

948Monday, April 23, 2007

1.0

DPST_PWM18

ENBKL17,30

D D

C C

GMCH_TV_COMPS19 GMCH_TV_LUMA19 GMCH_TV_CRMA19

R222

GM@

150_0402_1%

1 2

R182 0_0402_5%GM@R182 0_0402_5%GM@

GMCH_LCD_CLK18

GMCH_LCD_DATA18 GMCH_ENVDD18 PCIE_MTX_C_GRX_N[0..15] 17

1 2

R236 2.4K_0402_1%

GMCH_TXCLK-18 GMCH_TXCLK+18 GMCH_TZCLK-18 GMCH_TZCLK+18

GMCH_TXOUT0-18 GMCH_TXOUT1-18 GMCH_TXOUT2-18

GMCH_TXOUT0+18 GMCH_TXOUT1+18 GMCH_TXOUT2+18

GMCH_TZOUT0-18 GMCH_TZOUT1-18 GMCH_TZOUT2-18

GMCH_TZOUT0+18 GMCH_TZOUT1+18 GMCH_TZOUT2+18

R170

R171

GM@

150_0402_1%

1 2

GM@

150_0402_1%

1 2

Change to 0Ohm when use PM chip

GMCH_CRT_B19 GMCH_CRT_G19 GMCH_CRT_R19

B B

GMCH_CRT_HSYNC19 GMCH_CRT_VSYNC19

+3VS

R390 10K_0402_5%

1 2

R389 10K_0402_5%

1 2

R187 10K_0402_5% R187 10K_0402_5%

1 2

R188 10K_0402_5% R188 10K_0402_5%

1 2

R173 2.2K_0402_5%

1 2

R172 2.2K_0402_5%

1 2

R174 2.2K_0402_5%@R174 2.2K_0402_5%@

A A

R192 2.2K_0402_5%@R192 2.2K_0402_5%@

R181 100K_0402_5%

1 2

R179 150_0402_1%GM@R179 150_0402_1%GM@ R176 150_0402_1%GM@R176 150_0402_1%GM@ R178 150_0402_1%GM@R178 150_0402_1%GM@

GMCH_LCD_CLK GMCH_LCD_DATA LCTLB_DATA LCTLA_CLK GMCH_CRT_CLK GMCH_CRT_DATA TV_DCONSEL_0 TV_DCONSEL_1

LBKLT_EN

GMCH_CRT_CLK19 GMCH_CRT_DATA19

12 12 12

R175

R175 0_0402_5%

0_0402_5%

PM@

R177

R177 0_0402_5%

0_0402_5%

PM@

LBKLT_EN LCTLA_CLK LCTLB_DATA GMCH_LCD_CLK GMCH_LCD_DATA

LVDS_IBG

GMCH_TXCLKGMCH_TXCLK+ GMCH_TZCLKGMCH_TZCLK+

GMCH_TXOUT0GMCH_TXOUT1GMCH_TXOUT2-

GMCH_TXOUT0+ GMCH_TXOUT1+ GMCH_TXOUT2+

GMCH_TZOUT0GMCH_TZOUT1GMCH_TZOUT2-

GMCH_TZOUT0+ GMCH_TZOUT1+ GMCH_TZOUT2+

GMCH_TV_COMPS GMCH_TV_LUMA GMCH_TV_CRMA

TV_DCONSEL_0 TV_DCONSEL_1

GMCH_CRT_CLK GMCH_CRT_DATA

CRT_IREF

R195

1.3K_0402_1%

1 2

U23C

J40 H39 E39 E40 C37 D35 K40

L41 L43 N41 N40 D46 C45 D44 E42

G51

E51 F49

G50

E50 F48

G44

B47 B45

E44 A47 A45

E27

G27

K27 F27

J27 L27

M35

P33

H32

G32

K29

J29 F29 E29

K33

G35

F33 C32 E33

CRESTLINE_1p0

PM@

L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK L_CTRL_DATA L_DDC_CLK L_DDC_DATA L_VDD_EN

LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK

LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2

LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2

LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2

LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2

TVA_DAC TVB_DAC TVC_DAC

TVA_RTN TVB_RTN TVC_RTN

TV_DCONSEL_0 TV_DCONSEL_1

CRT_BLUE CRT_BLUE# CRT_GREEN CRT_GREEN# CRT_RED CRT_RED#

CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LVDS

TV VGA

PEG_COMPI

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8

PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9

PEG_TX#_10

PCI-EXPRESS GRAPHICS

PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_0

PEG_TX_1

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_5

PEG_TX_6

PEG_TX_7

PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

2006/12/25 2007/12/25

PEG_COMP

N43 M43

PCIE_GTX_C_MRX_N0

J51

PCIE_GTX_C_MRX_N1

L51

PCIE_GTX_C_MRX_N2

N47

PCIE_GTX_C_MRX_N3

T45

PCIE_GTX_C_MRX_N4

T50

PCIE_GTX_C_MRX_N5

U40

PCIE_GTX_C_MRX_N6

Y44

PCIE_GTX_C_MRX_N7

Y40

PCIE_GTX_C_MRX_N8

AB51

PCIE_GTX_C_MRX_N9

W49

PCIE_GTX_C_MRX_N10

AD44

PCIE_GTX_C_MRX_N11

AD40

PCIE_GTX_C_MRX_N12

AG46

PCIE_GTX_C_MRX_N13

AH49

PCIE_GTX_C_MRX_N14

AG45

PCIE_GTX_C_MRX_N15

AG41

PCIE_GTX_C_MRX_P0

J50

PCIE_GTX_C_MRX_P1

L50

PCIE_GTX_C_MRX_P2

M47

PCIE_GTX_C_MRX_P3

U44

PCIE_GTX_C_MRX_P4

T49

PCIE_GTX_C_MRX_P5

T41

PCIE_GTX_C_MRX_P6

W45

PCIE_GTX_C_MRX_P7

W41

PCIE_GTX_C_MRX_P8

AB50

PCIE_GTX_C_MRX_P9

Y48

PCIE_GTX_C_MRX_P10

AC45

PCIE_GTX_C_MRX_P11

AC41

PCIE_GTX_C_MRX_P12

AH47

PCIE_GTX_C_MRX_P13

AG49

PCIE_GTX_C_MRX_P14

AH45

PCIE_GTX_C_MRX_P15

AG42

PCIE_MTX_GRX_N0

N45

PCIE_MTX_GRX_N1

U39

PCIE_MTX_GRX_N2

U47

PCIE_MTX_GRX_N3

N51

PCIE_MTX_GRX_N4

R50

PCIE_MTX_GRX_N5

T42

PCIE_MTX_GRX_N6

Y43

PCIE_MTX_GRX_N7

W46

PCIE_MTX_GRX_N8

W38

PCIE_MTX_GRX_N9

AD39

PCIE_MTX_GRX_N10

AC46

PCIE_MTX_GRX_N11

AC49

PCIE_MTX_GRX_N12

AC42

PCIE_MTX_GRX_N13

AH39

PCIE_MTX_GRX_N14

AE49

PCIE_MTX_GRX_N15

AH44

PCIE_MTX_GRX_P0

M45

PCIE_MTX_GRX_P1

T38

PCIE_MTX_GRX_P2

T46

PCIE_MTX_GRX_P3

N50

PCIE_MTX_GRX_P4

R51

PCIE_MTX_GRX_P5

U43

PCIE_MTX_GRX_P6

W42

PCIE_MTX_GRX_P7

Y47

PCIE_MTX_GRX_P8

Y39

PCIE_MTX_GRX_P9

AC38

PCIE_MTX_GRX_P10

AD47

PCIE_MTX_GRX_P11

AC50

PCIE_MTX_GRX_P12

AD43

PCIE_MTX_GRX_P13

AG39

PCIE_MTX_GRX_P14

AE50

PCIE_MTX_GRX_P15

AH43

Compal Secret Data

10mils

Deciphered Date

1 2

R240 24.9_0402_1%

C188 0.1U_0402_16V7KPM@C188 0.1U_0402_16V7KPM@

1 2

C201 0.1U_0402_16V7KPM@C201 0.1U_0402_16V7KPM@

1 2

C217 0.1U_0402_16V7KPM@C217 0.1U_0402_16V7KPM@

1 2

C240 0.1U_0402_16V7KPM@C240 0.1U_0402_16V7KPM@

1 2

C252 0.1U_0402_16V7KPM@C252 0.1U_0402_16V7KPM@

1 2

C270 0.1U_0402_16V7KPM@C270 0.1U_0402_16V7KPM@

1 2

C285 0.1U_0402_16V7KPM@C285 0.1U_0402_16V7KPM@

1 2

C304 0.1U_0402_16V7KPM@C304 0.1U_0402_16V7KPM@

1 2

C180 0.1U_0402_16V7KPM@C180 0.1U_0402_16V7KPM@

1 2

C198 0.1U_0402_16V7KPM@C198 0.1U_0402_16V7KPM@

1 2

C214 0.1U_0402_16V7KPM@C214 0.1U_0402_16V7KPM@

1 2

C232 0.1U_0402_16V7KPM@C232 0.1U_0402_16V7KPM@

1 2

C248 0.1U_0402_16V7KPM@C248 0.1U_0402_16V7KPM@

1 2

C263 0.1U_0402_16V7KPM@C263 0.1U_0402_16V7KPM@

1 2

C283 0.1U_0402_16V7KPM@C283 0.1U_0402_16V7KPM@

1 2

C297 0.1U_0402_16V7KPM@C297 0.1U_0402_16V7KPM@

1 2

+1.05VS

PCIE_MTX_C_GRX_N[0..15] PCIE_MTX_C_GRX_P[0..15]

PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]

C179 0.1U_0402_16V7KPM@C179 0.1U_0402_16V7KPM@

1 2

C195 0.1U_0402_16V7KPM@C195 0.1U_0402_16V7KPM@

1 2

C212 0.1U_0402_16V7KPM@C212 0.1U_0402_16V7KPM@

1 2

C229 0.1U_0402_16V7KPM@C229 0.1U_0402_16V7KPM@

1 2

C246 0.1U_0402_16V7KPM@C246 0.1U_0402_16V7KPM@

1 2

C261 0.1U_0402_16V7KPM@C261 0.1U_0402_16V7KPM@

1 2

C277 0.1U_0402_16V7KPM@C277 0.1U_0402_16V7KPM@

1 2

C296 0.1U_0402_16V7KPM@C296 0.1U_0402_16V7KPM@

1 2

C176 0.1U_0402_16V7KPM@C176 0.1U_0402_16V7KPM@

1 2

C189 0.1U_0402_16V7KPM@C189 0.1U_0402_16V7KPM@

1 2

C204 0.1U_0402_16V7KPM@C204 0.1U_0402_16V7KPM@

1 2

C219 0.1U_0402_16V7KPM@C219 0.1U_0402_16V7KPM@

1 2

C241 0.1U_0402_16V7KPM@C241 0.1U_0402_16V7KPM@

1 2

C253 0.1U_0402_16V7KPM@C253 0.1U_0402_16V7KPM@

1 2

C272 0.1U_0402_16V7KPM@C272 0.1U_0402_16V7KPM@

1 2

C288 0.1U_0402_16V7KPM@C288 0.1U_0402_16V7KPM@

1 2

PCIE_MTX_C_GRX_P[0..15] 17

PCIE_GTX_C_MRX_N[0..15] 17 PCIE_GTX_C_MRX_P[0..15] 17

PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_N15

PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_P15

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Crestline GMCH (4/7)-VGA/LVDS/TV

ICL50/ICK70 M/B LA-3551P Schematic

10 48Monday, April 23, 2007

1.0

U23G

+1.05VS

D D

+1.8V

C C

+VGFX_CORE

B B

A A

AT35 AT34 AH28 AC32 AC31 AK32

AJ31

AJ28 AH32 AH31 AH29

AF32

R30

AU32 AU33 AU35 AV33

AW33 AW35

AY35 BA32 BA33 BA35 BB33 BC32 BC33 BC35 BD32 BD35 BE32 BE33 BE35

BF33

BF34 BG32 BG33 BG35 BH32 BH34 BH35

BJ32

BJ33

BJ34 BK32 BK33 BK34 BK35

BL33 AU30

R20

T14 W13 W14

Y12

AA20 AA23 AA26 AA28 AB21 AB24 AB29 AC20 AC21 AC23 AC24 AC26 AC28 AC29 AD20 AD23 AD24 AD28

AF21

AF26 AA31 AH20 AH21 AH23 AH24 AH26 AD31

AJ20 AN14

VCC_1 VCC_2 VCC_3 VCC_5 VCC_4 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12

VCC_13

VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35 VCC_SM_36

VCC_AXG_1 VCC_AXG_2 VCC_AXG_3 VCC_AXG_4 VCC_AXG_5 VCC_AXG_6 VCC_AXG_7 VCC_AXG_8 VCC_AXG_9 VCC_AXG_10 VCC_AXG_11 VCC_AXG_12 VCC_AXG_13 VCC_AXG_14 VCC_AXG_15 VCC_AXG_16 VCC_AXG_17 VCC_AXG_18 VCC_AXG_19 VCC_AXG_20 VCC_AXG_21 VCC_AXG_22 VCC_AXG_23 VCC_AXG_24 VCC_AXG_25 VCC_AXG_26 VCC_AXG_27 VCC_AXG_28 VCC_AXG_29 VCC_AXG_30 VCC_AXG_31 VCC_AXG_32 VCC_AXG_33 VCC_AXG_34

VCC CORE

POWER

VCC SMVCC GFX

VCC_AXG_NCTF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8

VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52 VCC_AXG_NCTF_53 VCC_AXG_NCTF_54

VCC GFX NCTF

VCC_AXG_NCTF_55 VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60 VCC_AXG_NCTF_61 VCC_AXG_NCTF_62 VCC_AXG_NCTF_63 VCC_AXG_NCTF_64 VCC_AXG_NCTF_65 VCC_AXG_NCTF_66 VCC_AXG_NCTF_67 VCC_AXG_NCTF_68 VCC_AXG_NCTF_69 VCC_AXG_NCTF_70 VCC_AXG_NCTF_71 VCC_AXG_NCTF_72 VCC_AXG_NCTF_73 VCC_AXG_NCTF_74 VCC_AXG_NCTF_75 VCC_AXG_NCTF_76 VCC_AXG_NCTF_77 VCC_AXG_NCTF_78 VCC_AXG_NCTF_79 VCC_AXG_NCTF_80 VCC_AXG_NCTF_81 VCC_AXG_NCTF_82 VCC_AXG_NCTF_83

VCC SM LF

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

T17 T18 T19 T21 T22 T23 T25 U15 U16 U17 U19 U20 U21 U23 U26 V16 V17 V19 V20 V21 V23 V24 Y15 Y16 Y17 Y19 Y20 Y21 Y23 Y24 Y26 Y28 Y29 AA16 AA17 AB16 AB19 AC16 AC17 AC19 AD15 AD16 AD17 AF16 AF19 AH15 AH16 AH17 AH19 AJ16 AJ17 AJ19 AK16 AK19 AL16 AL17 AL19 AL20 AL21 AL23 AM15 AM16 AM19 AM20 AM21 AM23 AP15 AP16 AP17 AP19 AP20 AP21 AP23 AP24 AR20 AR21 AR23 AR24 AR26 V26 V28 V29 Y31

AW45 BC39 BE39 BD17 BD4 AW8 AT6

+VGFX_CORE

+1.05VS

VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7

C339

0.1U_0402_16V4Z

+1.05VS

C501

C501 220U_D2_2VMR15

220U_D2_2VMR15

+1.8V

C361

330U_D2E_2.5VM

C338

0.1U_0402_16V4Z

VCC: 1300mA (220UF*1, 22UF*1, 0.22UF*1, 0.1UF*1)

C264

0.22U_0603_16V7K

10U_0805_10V4Z

VCC_SM: 2400mA (330UF*1, 22UF*2, 0.1UF*1)

C356

10U_0805_10V4Z

+1.05VS

0.22U_0603_16V7K

C325

0.22U_0603_16V7K

C352

10U_0805_10V4Z

1 2

R518 0_1206_5%GM@R518 0_1206_5%GM@

1 2

R519 0_1206_5%GM@R519 0_1206_5%GM@

1 2

R520 0_1206_5%GM@R520 0_1206_5%GM@

C316

C316 10U_0805_10V4Z

10U_0805_10V4Z

C351

0.22U_0603_16V7K

C289

0.22U_0603_16V7K

C355

0.1U_0402_16V4Z

+VGFX_CORE

R255

R255 0_0603_5%

0_0603_5%

PM@

C273

0.47U_0603_16V4Z

GM@

VCC_AXM: 540mA (22UF*2, 0.22UF*2, 0.1UF*2)

C322

0.22U_0603_16V7K

C637

0.1U_0402_16V4Z

C353

0.47U_0603_16V4Z

C269

C346

C255

0.1U_0402_16V4Z

VCC_AXG: 7700mA (330UF*2, 22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2)

C218

330U_D2E_2.5VM

GM@

+1.05VS

330U_D2E_2.5VM

GM@

C267

0.1U_0402_16V4Z

GM@

C311

0.1U_0402_16V4Z

C638

0.1U_0402_16V4Z

C350

1U_0402_6.3V4Z

+1.05VS +1.05VS

C524

0.1U_0402_16V4Z

place on the shape edge

C278

0.1U_0402_16V4Z

GM@

C302

10U_0805_10V4Z

GM@

C303

C317

0.1U_0402_16V4Z

C639

0.1U_0402_16V4Z

C318

0.1U_0402_16V4Z

FOR EMI

C337

C337 1U_0402_6.3V4Z

1U_0402_6.3V4Z

C628

0.1U_0402_16V4Z

C276

10U_0805_10V4Z

GM@

+1.05VS

C293

1U_0402_6.3V4Z

GM@

+1.05VS

U23F

AB33

VCC_NCTF_1

AB36

VCC_NCTF_2

AB37

VCC_NCTF_3

AC33

VCC_NCTF_4

AC35

VCC_NCTF_5

AC36

VCC_NCTF_6

AD35

VCC_NCTF_7

AD36

VCC_NCTF_8

AF33

VCC_NCTF_9

AF36

VCC_NCTF_10

AH33

VCC_NCTF_11

AH35

VCC_NCTF_12

AH36

VCC_NCTF_13

AH37

VCC_NCTF_14

AJ33

VCC_NCTF_15

AJ35

VCC_NCTF_16

AK33

VCC_NCTF_17

AK35

VCC_NCTF_18

AK36

VCC_NCTF_19

AK37

VCC_NCTF_20

AD33

VCC_NCTF_21

AJ36

VCC_NCTF_22

AM35

VCC_NCTF_23

AL33

VCC_NCTF_24

AL35

VCC_NCTF_25

AA33

VCC_NCTF_26

AA35

VCC_NCTF_27

AA36

VCC_NCTF_28

AP35

VCC_NCTF_29

AP36

VCC_NCTF_30

AR35

VCC_NCTF_31

AR36

VCC_NCTF_32

Y32

VCC_NCTF_33

Y33

VCC_NCTF_34

Y35

VCC_NCTF_35

Y36

VCC_NCTF_36

Y37

VCC_NCTF_37

T30

VCC_NCTF_38

T34

VCC_NCTF_39

T35

VCC_NCTF_40

U29

VCC_NCTF_41

U31

VCC_NCTF_42

U32

VCC_NCTF_43

U33

VCC_NCTF_44

U35

VCC_NCTF_45

U36

VCC_NCTF_46

V32

VCC_NCTF_47

V33

VCC_NCTF_48

V36

VCC_NCTF_49

V37

VCC_NCTF_50

AL24

VCC_AXM_NCTF_1

AL26

VCC_AXM_NCTF_2

AL28

VCC_AXM_NCTF_3

AM26

VCC_AXM_NCTF_4

AM28

VCC_AXM_NCTF_5

AM29

VCC_AXM_NCTF_6

AM31

VCC_AXM_NCTF_7

AM32

VCC_AXM_NCTF_8

AM33

VCC_AXM_NCTF_9

AP29

VCC_AXM_NCTF_10

AP31

VCC_AXM_NCTF_11

AP32

VCC_AXM_NCTF_12

AP33

VCC_AXM_NCTF_13

AL29

VCC_AXM_NCTF_14

AL31

VCC_AXM_NCTF_15

AL32

VCC_AXM_NCTF_16

AR31

VCC_AXM_NCTF_17

AR32

VCC_AXM_NCTF_18

AR33

VCC_AXM_NCTF_19

CRESTLINE_1p0

PM@

VSS NCTF

VCC NCTF

POWER

VCC AXM NCTF

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21

VSS_SCB1 VSS_SCB2 VSS_SCB3 VSS_SCB4 VSS_SCB5 VSS_SCB6

VSS SCBVCC AXM

VCC_AXM_1 VCC_AXM_2 VCC_AXM_3 VCC_AXM_4 VCC_AXM_5 VCC_AXM_6 VCC_AXM_7

T27 T37 U24 U28 V31 V35 AA19 AB17 AB35 AD19 AD37 AF17 AF35 AK17 AM17 AM24 AP26 AP28 AR15 AR19 AR28

A3 B2 C1 BL1 BL51 A51

AT33 AT31 AK29 AK24 AK23 AJ26 AJ23

+1.05VS

Security Classification

2006/12/25 2007/12/25

Issued Date

CRESTLINE_1p0

PM@

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/12/25 2007/12/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Crestline GMCH (5/7)-VCC

ICL50/ICK70 M/B LA-3551P Schematic

11 48Monday, April 23, 2007

1.0

+1.25VS_HPLL

L20

L24

+1.25VS

VCCA_HPLL: 50mA (22UF*1, 0.1UF*1)

D D

VCCA_MPLL: 150mA (10UF*1, 0.1UF*1)

C C

VCC_SYNC: 10mA (0.1UF*1)

+3VS

1 2

MBK1608121YZF_0603

L25

1 2

MBK1608121YZF_0603

R239 0_0402_5%

C234

GM@

0.1U_0402_16V4Z

GM@

C306

C306 22U_0805_6.3V6M

22U_0805_6.3V6M

+1.25VS_MPLL

R315

0.5_0603_1%

C323

C323 10U_0805_10V4Z

10U_0805_10V4Z

+3VS_SYNC

VCCA_CRT_DAC: 80mA (0.1UF*1, 0.022UF*1)

L14

+3VS

GM@

B B

1 2

MBK1608121YZF_0603

GM@

C635

C635 220U_D2_2VMR15

220U_D2_2VMR15

C213

0.1U_0402_16V4Z

GM@

0.022U_0402_16V7K

GM@

+1.25VS

C307

0.1U_0402_16V4Z

C313

0.1U_0402_16V4Z

R219

R219 0_0402_5%

0_0402_5%

PM@

+3VS_CRTDAC

C205

+1.25VS

VCCA_DAC_BG: 5mA (0.1UF*1, 0.022UF*1)

L15

+3VS

A A

+1.5VS

1 2

MBK1608121YZF_0603

GM@

L38

1 2

MBK1608121YZF_0603

GM@

L13

L13 MBK1608121YZF_0603

MBK1608121YZF_0603

C636

C636 220U_D2_2VMR15

220U_D2_2VMR15

GM@

C202

0.1U_0402_16V4Z

GM@

C488

10U_0805_10V4Z

GM@

1 2

C199

GM@

0.022U_0402_16V7K

C661

10U_0805_10V4Z

GM@

4.7U_0805_10V4Z

C662

VCCA_TV_DAC: 40mA (0.1UF*1, 0.022UF*1 for each DAC)

C486

C493

+1.5VS_TV

C493

GM@

0.1U_0402_16V4Z

R244

R244 0_0402_5%

0_0402_5%

GM@

0.022U_0402_16V7K

GM@

+1.5VS_CRT

+1.5VS

R249

R249 0_0402_5%

0_0402_5%

PM@

GM@

0.1U_0402_16V4Z

L20

1 2

MBK1608121YZF_0603

VCCA_DPLLA: 80mA (470UF*1, 0.1UF*1)

L22

1 2

MBK1608121YZF_0603

VCCA_DPLLB: 80mA (470UF*1, 0.1UF*1)

+1.25VS

C513

C513 10U_0805_10V4Z

10U_0805_10V4Z

+1.25VS

C340

C340 220U_D2_2VMR15

220U_D2_2VMR15

R339 0_0603_5%

R198

R198 0_0402_5%

0_0402_5%

PM@

+3VS_DACBG

0_0402_5%

GM@

C500

C491

0.022U_0402_16V7K

GM@

L17

1 2

MBK1608121YZF_0603

GM@

R190

PM@

GM@

0.1U_0402_16V4Z

+1.25VS_DPLLA

C191

C191 22U_0805_6.3V6M

22U_0805_6.3V6M

GM@

+1.25VS_DPLLB

C230

C230 22U_0805_6.3V6M

22U_0805_6.3V6M

GM@

+1.8V_TX_LVDS

+3VS

C243

0.1U_0402_16V4Z

L41

1 2

MBK1608121YZF_0603

R254 1_0603_5%

R314 0_0603_5%

+1.25VS_A_SM_CK

C364

C364 10U_0805_10V4Z

10U_0805_10V4Z

VCCD_TVDAC: 60mA (0.1UF*1, 0.022UF*1)

+1.5VS_TV

VCCA_PEG_PLL: 100mA (0.1UF*1)

C494

C487

0.022U_0402_16V7K

GM@

VCCD_QDAC: 5mA (0.1UF*1, 0.022UF*1)

C251

C210

0.1U_0402_16V4Z

0.022U_0402_16V7K

GM@

0.022U_0402_16V7K

GM@

C207

0.1U_0402_16V4Z

C233

0.1U_0402_16V4Z

C497

GM@

1000P_0402_50V7K

C358

1U_0402_6.3V4Z

0.1U_0402_16V4Z

+1.25VS

+3VS_A_TVDAC

VCCA_PEG_BG: 5mA (0.1UF*1)

+1.25VS_A_PEGPLL

+1.25VS_A_SM

C336

10U_0805_10V4Z

VCCA_SM_CK (22UF*1, 1UF*2, 0.1UF*1)

C244

C260

0.1U_0402_16V4Z

VCCA_SM (22UF*21, 4.7UF*1, 1UF*1)

C320

4.7U_0805_10V4Z

C360

1U_0402_6.3V4Z

+3VS_A_TVDAC

C209

0.022U_0402_16V7K

VCCA_HPLL: 250mA (0.1UF*1)

C315

0.1U_0402_16V4Z

+1.8V

R393

R393 0_0402_5%

0_0402_5%

PM@

+1.5VS_QDAC

R202

R202 0_0402_5%

0_0402_5%

PM@

VCCA_LVDS: 10mA (0.1UF*1)

VCCA_PEG_PLL: 100mA (0.1UF*1)

0.1U_0402_16V4Z

+1.25VS_A_PEGPLL

0.1U_0402_16V4Z

R220 0_0402_5%

U23H

+3VS_SYNC

+3VS_CRTDAC

+3VS_DACBG

+1.25VS_DPLLA +1.25VS_DPLLB +1.25VS_HPLL +1.25VS_MPLL

C321

1U_0402_6.3V4Z

C348

C265

+1.5VS_CRT

+1.5VS_QDAC

GM@

C215

C215 10U_0805_10V4Z

10U_0805_10V4Z

GM@

VCCD_LVDS: 150mA (10UF*1, 0.1UF*1)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

J32

A33 B33

A30 B32

B49 H49 AL2

AM2

A41 B41

K50 K49

U51

AW18

AV19 AU19 AU18 AU17

AT22 AT21 AT19 AT18 AT17 AR17 AR16

BC29 BB29

C25 B25 C27 B27 B28 A28

M32

L29

N28

AN2

U48

J41

H42

+1.8V_LVDS

C231

0.1U_0402_16V4Z

GM@

VCCSYNC VCCA_CRT_DAC_1

VCCA_CRT_DAC_2

VCCA_DAC_BG VSSA_DAC_BG

VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL

VCCA_LVDS VSSA_LVDS

VCCA_PEG_BG VSSA_PEG_BG

VCCA_PEG_PLL

VCCA_SM_1 VCCA_SM_2 VCCA_SM_3 VCCA_SM_4 VCCA_SM_5

VCCA_SM_7 VCCA_SM_8 VCCA_SM_9 VCCA_SM_10 VCCA_SM_11 VCCA_SM_NCTF_1 VCCA_SM_NCTF_2

VCCA_SM_CK_1 VCCA_SM_CK_2

VCCA_TVA_DAC_1 VCCA_TVA_DAC_2 VCCA_TVB_DAC_1 VCCA_TVB_DAC_2 VCCA_TVC_DAC_1 VCCA_TVC_DAC_2

VCCD_CRT VCCD_TVDAC

VCCD_QDAC VCCD_HPLL VCCD_PEG_PLL VCCD_LVDS_1

VCCD_LVDS_2

CRESTLINE_1p0

PM@

2006/12/25 2007/12/25

R217

R217 0_0402_5%

0_0402_5%

PM@

CRTPLLA PEGA SMTV

POWER

A CK A LVDS

D TV/CRTLVDS

Compal Secret Data

VCC_AXD_1 VCC_AXD_2 VCC_AXD_3 VCC_AXD_4 VCC_AXD_5

AXD

VCC_AXD_6

VCC_AXD_NCTF

VCC_AXF_1 VCC_AXF_2 VCC_AXF_3

AXF

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

SM CK

VCC_TX_LVDS

VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4

PEG

VCC_PEG_5

VCC_RXR_DMI_1 VCC_RXR_DMI_2

DMI

+1.05VS +3VS

Deciphered Date

VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8

VTT_9 VTT_10 VTT_11 VTT_12 VTT_13

VTT

VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22

VCC_DMI

VCC_HV_1 VCC_HV_2

VTTLF1 VTTLF2 VTTLF3

VTTLF

D23

2 1

RB751V_SOD323

U13 U12 U11 U9 U8 U7 U5 U3 U2 U1 T13 T11 T10 T9 T7 T6 T5 T3 T2 R3 R2 R1

AT23 AU28 AU24 AT29 AT25 AT30

AR29

B23 B21 A21

AJ50

BK24 BK23 BJ24 BJ23

+1.8V_TX_LVDS: 100mA (220UF*1, 1000PF*1)

A43

C40 B40

AD51 W50 W51 V49 V50

AH50 AH51

A7 F2 AH1

1 2

VCC_HV: 100mA

VTTLF_CAP1 VTTLF_CAP2 VTTLF_CAP3

C517

0.47U_0603_16V4Z

R402

10_0603_5%

VTT: 850mA

+1.05VS

(220UF*1, 4.7UF*21, 2.2UF*1, 0.47UF*1)

C257

+1.25VS_AXD

+1.25VS_AXF

C490

C490 10U_0805_10V4Z

10U_0805_10V4Z

0.1U_0402_16V4Z

+1.8V_TX_LVDS

+3VS

C499

GM@

1000P_0402_50V7K

C496

0.47U_0603_16V4Z

C257

4.7U_0805_10V4Z

VCC_AXD: 200mA (22UF*1, 1UF*1)

C335

1U_0402_6.3V4Z

C507

C507 220U_D2_2VMR15

220U_D2_2VMR15

C324

C324 22U_0805_6.3V6M

22U_0805_6.3V6M

C505

C509

C268

4.7U_0805_10V4Z

R421 0_0603_5%

VCC_AXF: 350mA (10UF*1, 1UF*1)

C489

1U_0402_6.3V4Z

C314

C532

C532 10U_0805_10V4Z

10U_0805_10V4Z

+1.05VS_PEG

C284

C284 220U_D2_2VMR15

220U_D2_2VMR15

+1.05VS_PEG

C516

10U_0805_10V4Z

Title

Size Document Number Rev

Date: Sheet

C509

2.2U_0805_10V6K

R400 0_0603_5%

VCC_DMI: 100mA (0.1UF*1)

+1.25VS

+1.8V_SM_CK

0.1U_0402_16V4Z

0.1U_0402_16V4Z L39

L39 KC FBM-L11-201209-221LMAT_0805

KC FBM-L11-201209-221LMAT_0805

GM@

R405

R405 0_0402_5%

0_0402_5%

PM@

+1.05VS_PEG: 1200mA (220UF*1, 10UF*1)

C275

10U_0805_10V4Z

C262

0.47U_0603_16V4Z

+1.25VS

VCC_SM_CK: 200mA (22UF*1, 0.1UF*1)

C530

L23

L23 KC FBM-L11-201209-221LMAT_0805

KC FBM-L11-201209-221LMAT_0805

+1.25VS

1 2

L45

L45 MBK1608121YZF_0603

MBK1608121YZF_0603

R430

R430 1_0603_5%

1_0603_5%

+1.8V

1 2

C359

C359 10U_0805_10V4Z

10U_0805_10V4Z

+1.05VS

+1.05VS_DMI: 100mA (220UF*1, 10UF*1)

+3VS

C250

0.1U_0402_16V4Z

Compal Electronics, Inc.

Crestline GMCH (6/7)-VCC

ICL50/ICK70 M/B LA-3551P Schematic

+1.8V

1.0

12 48Monday, April 23, 2007

U23I

A13

VSS_1

A15

VSS_2

A17

VSS_3

A24

VSS_4

AA21

VSS_5

AA24

VSS_6

AA29

VSS_7

AB20

VSS_8

AB23

VSS_9

AB26

VSS_10

D D

C C

B B

A A

AB28

VSS_11

AB31

VSS_12

AC10

VSS_13

AC13

VSS_14

AC3

VSS_15

AC39

VSS_16

AC43

VSS_17

AC47

VSS_18

AD1

VSS_19

AD21

VSS_20

AD26

VSS_21

AD29

VSS_22

AD3

VSS_23

AD41

VSS_24

AD45

VSS_25

AD49

VSS_26

AD5

VSS_27

AD50

VSS_28

AD8

VSS_29

AE10

VSS_30

AE14

VSS_31

AE6

VSS_32

AF20

VSS_33

AF23

VSS_34

AF24

VSS_35

AF31

VSS_36

AG2

VSS_37

AG38

VSS_38

AG43

VSS_39

AG47

VSS_40

AG50

VSS_41

AH3

VSS_42

AH40

VSS_43

AH41

VSS_44

AH7

VSS_45

AH9

VSS_46

AJ11

VSS_47

AJ13

VSS_48

AJ21

VSS_49

AJ24

VSS_50

AJ29

VSS_51

AJ32

VSS_52

AJ43

VSS_53

AJ45

VSS_54

AJ49

VSS_55

AK20

VSS_56

AK21

VSS_57

AK26

VSS_58

AK28

VSS_59

AK31

VSS_60

AK51

VSS_61

AL1

VSS_62

AM11

VSS_63

AM13

VSS_64

AM3

VSS_65

AM4

VSS_66

AM41

VSS_67

AM45

VSS_68

AN1

VSS_69

AN38

VSS_70

AN39

VSS_71

AN43

VSS_72

AN5

VSS_73

AN7

VSS_74

AP4

VSS_75

AP48

VSS_76

AP50

VSS_77

AR11

VSS_78

AR2

VSS_79

AR39

VSS_80

AR44

VSS_81

AR47

VSS_82

AR7

VSS_83

AT10

VSS_84

AT14

VSS_85

AT41

VSS_86

AT49

VSS_87

AU1

VSS_88

AU23

VSS_89

AU29

VSS_90

AU3

VSS_91

AU36

VSS_92

AU49

VSS_93

AU51

VSS_94

AV39

VSS_95

AV48

VSS_96

AW1

VSS_97

AW12

VSS_98

AW16

VSS_99

CRESTLINE_1p0

PM@

VSS

VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198

AW24 AW29 AW32 AW5 AW7 AY10 AY24 AY37 AY42 AY43 AY45 AY47 AY50 B10 B20 B24 B29 B30 B35 B38 B43 B46 B5 B8 BA1 BA17 BA18 BA2 BA24 BB12 BB25 BB40 BB44 BB49 BB8 BC16 BC24 BC25 BC36 BC40 BC51 BD13 BD2 BD28 BD45 BD48 BD5 BE1 BE19 BE23 BE30 BE42 BE51 BE8 BF12 BF16 BF36 BG19 BG2 BG24 BG29 BG39 BG48 BG5 BG51 BH17 BH30 BH44 BH46 BH8 BJ11 BJ13 BJ38 BJ4 BJ42 BJ46 BK15 BK17 BK25 BK29 BK36 BK40 BK44 BK6 BK8 BL11 BL13 BL19 BL22 BL37 BL47 C12 C16 C19 C28 C29 C33 C36 C41

U23J

C46

VSS_199

C50

VSS_200

VSS_201

D13

VSS_202

D24

VSS_203

VSS_204

D32

VSS_205

D39

VSS_206

D45

VSS_207

D49

VSS_208

E10

VSS_209

E16

VSS_210

E24

VSS_211

E28

VSS_212

E32

VSS_213

E47

VSS_214

F19

VSS_215

F36

VSS_216

VSS_217

F40

VSS_218

F50

VSS_219

VSS_220

G13

VSS_221

G16

VSS_222

G19

VSS_223

G24

VSS_224

G28

VSS_225

G29

VSS_226

G33

VSS_227

G42

VSS_228

G45

VSS_229

G48

VSS_230

VSS_231

H24

VSS_232

H28

VSS_233

VSS_234

H45

VSS_235

J11

VSS_236

J16

VSS_237

VSS_238

J24

VSS_239

J28

VSS_240

J33

VSS_241

J35

VSS_242

J39

VSS_243

K12

VSS_245

K47

VSS_246

VSS_247

VSS_248

L17

VSS_249

L20

VSS_250

L24

VSS_251

L28

VSS_252

VSS_253

L33

VSS_254

L49

VSS_255

M28

VSS_256

M42

VSS_257

M46

VSS_258

M49

VSS_259

VSS_260

M50

VSS_261

VSS_262

N11

VSS_263

N14

VSS_264

N17

VSS_265

N29

VSS_266

N32

VSS_267

N36

VSS_268

N39

VSS_269

N44

VSS_270

N49

VSS_271

VSS_272

P19

VSS_273

VSS_274

P23

VSS_275

VSS_276

P50

VSS_277

R49

VSS_278

T39

VSS_279

T43

VSS_280

T47

VSS_281

U41

VSS_282

U45

VSS_283

U50

VSS_284

VSS_285

VSS_286

CRESTLINE_1p0

PM@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VSS

W11

VSS_287

W39

VSS_288

W43

VSS_289

W47

VSS_290

VSS_291

VSS_292

Y13

VSS_293

VSS_294

Y41

VSS_295

Y45

VSS_296

Y49

VSS_297

VSS_298

Y50

VSS_299

Y11

VSS_300

P29

VSS_301

T29

VSS_302

T31

VSS_303

T33

VSS_304

R28

VSS_305

AA32

VSS_306

AB32

VSS_307

AD32

VSS_308

AF28

VSS_309

AF29

VSS_310

AT27

VSS_311

AV25

VSS_312

H50

VSS_313

Compal Secret Data

2006/12/25 2007/12/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Crestline GMCH (7/7)-GND

ICL50/ICK70 M/B LA-3551P Schematic

1.0

13 48Monday, April 23, 2007

+1.8V +1.8V

JP28

+DIMM_VREF

DDRA_SDQ0 DDRA_SDQ5 DDRA_SDQ1

DDRA_SDQS0#9 DDRA_SDQS09

D D

DDRA_SDQS1#9 DDRA_SDQS19

DDRA_SDQS2#9 DDRA_SDQS29

DDRA_CKE08

C C

DDRA_SBS2#9

DDRA_SBS0#9 DDRA_SWE#9

DDRA_SCAS#9 DDRA_SCS1#8

DDRA_ODT18

DDRA_SDQS4#9 DDRA_SDQS49

B B

DDRA_SDQS6#9 DDRA_SDQS69

D_CK_SDATA15,16 D_CK_SCLK15,16

A A

+3VS

C607

2.2U_0805_10V6K

DDRA_SDQS0# DDRA_SDQS0

DDRA_SDQ2 DDRA_SDQ3

DDRA_SDQ8 DDRA_SDQ9

DDRA_SDQS1# DDRA_SDQS1

DDRA_SDQ10 DDRA_SDQ11

DDRA_SDQ16 DDRA_SDQ17

DDRA_SDQS2# DDRA_SDQS2

DDRA_SDQ18 DDRA_SDQ19

DDRA_SDQ24 DDRA_SDQ25 DDRA_SDQ29

DDRA_SDM3

DDRA_SDQ26 DDRA_SDQ27

DDRA_SBS2# DDRA_SMA12

DDRA_SMA9 DDRA_SMA8

DDRA_SMA5 DDRA_SMA3 DDRA_SMA1

DDRA_SMA10 DDRA_SBS0# DDRA_SWE#

DDRA_SCAS# DDRA_SCS1#

DDRA_ODT1 DDRA_SDQ32

DDRA_SDQ33 DDRA_SDQS4#

DDRA_SDQS4 DDRA_SDQ34

DDRA_SDQ35 DDRA_SDQ40

DDRA_SDQ41 DDRA_SDM5 DDRA_SDQ42

DDRA_SDQ43 DDRA_SDQ48

DDRA_SDQ49

DDRA_SDQS6# DDRA_SDQS6

DDRA_SDQ50 DDRA_SDQ51

DDRA_SDQ57 DDRA_SDM7 DDRA_SDQ58

DDRA_SDQ59 D_CK_SDATA

D_CK_SCLK

+3VS

C402

0.1U_0402_16V4Z

DIMM0 REV H:5.2mm (BOT)

VREF

VSS

DQ0

DQ1

VSS

DQS0#

DQS0

VSS

DQ2

DQ3

VSS

DQ8

DQ9

VSS

DQS1#

DQS1

VSS

DQ10

DQ11

VSS

DQ16

DQ17

VSS

DQS2#

DQS2

VSS

DQ18

DQ19

VSS

DQ24

DQ25

VSS

DM3

VSS

DQ26

DQ27

VSS

CKE0

VDD

BA2

VDD

A12

VDD

101

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

203

GND

FOX_AS0A426-M2RN-7F

CONN@

DQ4 DQ5

DM0 DQ6

DQ7

DQ12 DQ13

DM1

CK0#

DQ14 DQ15

DQ20 DQ21

DM2

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3 DQ30

DQ31

NC/CKE1

VDD NC/A15 NC/A14

VDD

RAS#

VDD

ODT0

NC/A13

VDD

DQ36 DQ37

DM4

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5 DQ46

DQ47 DQ52

DQ53

CK1#

DM6

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7 DQ62

DQ63

SAO

GND

VSS

VSS VSS

VSS

VSS VSS

CK0 VSS

VSS

A11

BA1 S0#

VSS

VSS VSS

VSS

VSS CK1

VSS VSS

VSS

VSS SA1

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50

52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92

96 98

100

102

104 106 108 110 112 114 116 118 120

122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 204

DDRA_SDQ4

DDRA_SDM0 DDRA_SDQ6

DDRA_SDQ7 DDRA_SDQ12

DDRA_SDQ13 DDRA_SDM1

DDRA_SDQ14 DDRA_SDQ15

DDRA_SDQ20 DDRA_SDQ21

DDRA_SDM2 DDRA_SDQ22

DDRA_SDQ23 DDRA_SDQ28

DDRA_SDQS3# DDRA_SDQS3

DDRA_SDQ30 DDRA_SDQ31

DDRA_CKE1DDRA_CKE0

DDRA_SMA14 DDRA_SMA11

DDRA_SMA7 DDRA_SMA6

DDRA_SMA4 DDRA_SMA2 DDRA_SMA0

DDRA_SBS1# DDRA_SRAS# DDRA_SCS0#

DDRA_ODT0 DDRA_SMA13

DDRA_SDQ36 DDRA_SDQ37

DDRA_SDM4 DDRA_SDQ38

DDRA_SDQ39 DDRA_SDQ44

DDRA_SDQ45 DDRA_SDQS5#

DDRA_SDQS5 DDRA_SDQ46

DDRA_SDQ47 DDRA_SDQ52

DDRA_SDQ53

DDRA_SDM6 DDRA_SDQ54

DDRA_SDQ55 DDRA_SDQ60DDRA_SDQ56

DDRA_SDQ61 DDRA_SDQS7#

DDRA_SDQS7 DDRA_SDQ62

DDRA_SDQ63

R353 10K_0402_5% R353 10K_0402_5%

1 2

R354 10K_0402_5% R354 10K_0402_5%

1 2

DDRA_CLK0 8 DDRA_CLK0# 8

R346 0_0402_5%

1 2

DDRA_SDQS3# 9 DDRA_SDQS3 9

DDRA_CKE1 8

DDRA_SBS1# 9 DDRA_SRAS# 9 DDRA_SCS0# 8

DDRA_ODT0 8

DDRA_SDQS5# 9 DDRA_SDQS5 9

DDRA_CLK1 8 DDRA_CLK1# 8

DDRA_SDQS7# 9 DDRA_SDQS7 9

PM_EXTTS#0 8

+DIMM_VREF

20mils

C410

0.1U_0402_16V4Z

DDRA_SMA[0..14]8,9 DDRA_SDQ[0..63]9

DDRA_SDM[0..7]9

DDRA_CKE0 DDRA_SBS2#

DDRA_SMA12 DDRA_SMA9

DDRA_SMA8 DDRA_SMA5

DDRA_SMA3 DDRA_SMA1

DDRA_SMA10 DDRA_SBS0#

DDRA_SWE# DDRA_SCAS#

DDRA_SCS1# DDRA_ODT1

DDRA_SMA11 DDRA_SMA14

DDRA_SMA6 DDRA_SMA7

DDRA_SMA2 DDRA_SMA4

DDRA_SBS1# DDRA_SMA0

DDRA_SCS0# DDRA_SRAS#

DDRA_SMA13 DDRA_ODT0

DDRA_CKE1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DDRA_SMA[0..14] DDRA_SDQ[0..63] DDRA_SDM[0..7]

1 4 2 3

RP19 56_0404_4P2R_5%

1 4 2 3

RP20 56_0404_4P2R_5%

RP21 56_0404_4P2R_5%

RP22 56_0404_4P2R_5%

RP23 56_0404_4P2R_5%

RP24 56_0404_4P2R_5%

RP25 56_0404_4P2R_5%

RP26 56_0404_4P2R_5%

RP27 56_0404_4P2R_5%

RP28 56_0404_4P2R_5%

RP29 56_0404_4P2R_5%

RP30 56_0404_4P2R_5%

RP31 56_0404_4P2R_5%

R347 56_0402_5%

2006/12/25 2007/12/25

1 4 2 3

1 2

Compal Secret Data

+1.8V

R345

R345 1K_0402_1%

1K_0402_1%

R344

R344 1K_0402_1%

1K_0402_1%

+0.9VS

Deciphered Date

C611

2.2U_0805_10V6K

C411

0.1U_0402_16V4Z

C427

0.1U_0402_16V4Z

C422

0.1U_0402_16V4Z

C424

0.1U_0402_16V4Z

20mils

+DIMM_VREF1

C376

C376 220P_0402_50V7K

220P_0402_50V7K

+1.8V

2.2U_0805_10V6K

+1.8V

0.1U_0402_16V4Z

+0.9VS

0.1U_0402_16V4Z

+0.9VS

0.1U_0402_16V4Z

R343 0_0402_5% R343 0_0402_5%

C605

C414

0.1U_0402_16V4Z

C404

0.1U_0402_16V4Z

C405

0.1U_0402_16V4Z

C423

0.1U_0402_16V4Z

+5VALW

U17A

TLV2462CDR_SO8

1 2

C608

2.2U_0805_10V6K

C417

0.1U_0402_16V4Z

C407

0.1U_0402_16V4Z

C409

0.1U_0402_16V4Z

C426

+5VALW

To SODIMM and GMCH

C606

C413

C425

C408

Title

Size Document Number Rev

Date: Sheet

+DIMM_VREF

C389

1U_0402_6.3V4Z

C403

0.1U_0402_16V4Z

C406

0.1U_0402_16V4Z

ICL50/ICK70 M/B LA-3551P Schematic

C400

C388

C388 1U_0402_6.3V4Z

1U_0402_6.3V4Z

Compal Electronics, Inc.

1U_0402_6.3V4Z

DDRII-SODIMM0

U17B

TLV2462CDR_SO8

14 48Monday, April 23, 2007

1.0

JP29

+DIMM_VREF

DDRB_SDQ0 DDRB_SDQ1

DDRB_SDQS0#9 DDRB_SDQS09

1 1

DDRB_SDQS1#9 DDRB_SDQS19

DDRB_SDQS2#9 DDRB_SDQS29

DDRB_CKE08

2 2

DDRB_SBS2#9

DDRB_SBS0#9 DDRB_SWE#9

DDRB_SCAS#9 DDRB_SCS1#8

DDRB_ODT18

DDRB_SDQS4#9 DDRB_SDQS49

3 3

DDRB_SDQS6#9 DDRB_SDQS69

D_CK_SDATA14,16 D_CK_SCLK14,16

4 4

DDRB_SDQS0# DDRB_SDQS0

DDRB_SDQ2 DDRB_SDQ3

DDRB_SDQ8 DDRB_SDQ9

DDRB_SDQS1# DDRB_SDQS1

DDRB_SDQ10 DDRB_SDQ11

DDRB_SDQ16

DDRB_SDQS2# DDRB_SDQS2

DDRB_SDQ18 DDRB_SDQ19

DDRB_SDQ24 DDRB_SDQ25

DDRB_SDM3

DDRB_SDQ26 DDRB_SDQ30 DDRB_SDQ27

DDRB_CKE0

DDRB_SBS2# DDRB_SMA12

DDRB_SMA9 DDRB_SMA8

DDRB_SMA5 DDRB_SMA3 DDRB_SMA1

DDRB_SMA10 DDRB_SBS0# DDRB_SWE#

DDRB_SCAS# DDRB_SCS1#

DDRB_ODT1 DDRB_SDQ32

DDRB_SDQ33 DDRB_SDQS4#

DDRB_SDQS4 DDRB_SDQ34

DDRB_SDQ35 DDRB_SDQ40

DDRB_SDQ41 DDRB_SDM5 DDRB_SDQ42

DDRB_SDQ43 DDRB_SDQ48

DDRB_SDQ49

DDRB_SDQS6# DDRB_SDQS6

DDRB_SDQ50 DDRB_SDQ51

DDRB_SDQ56

DDRB_SDM7 DDRB_SDQ58

DDRB_SDQ59 D_CK_SDATA

D_CK_SCLK

+3VS

DIMM1 REV H:9.2mm (BOT)

VREF

VSS

DQ0

DQ1

VSS

DQS0#

DQS0

VSS

DQ2

DQ3

VSS

DQ8

DQ9

VSS

DQS1#

DQS1

VSS

DQ10

DQ11

VSS

DQ16

DQ17

VSS

DQS2#

DQS2

VSS

DQ18

DQ19

VSS

DQ24

DQ25

VSS

DM3

VSS

DQ26

DQ27

VSS

CKE0

VDD

BA2

VDD

A12

VDD

101

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

201

GND

FOX_AS0A426-MARG-7F

CONN@

DQS3#

NC/CKE1

NC/A15 NC/A14

NC/A13

DQS5#

DQS7#

DQ12 DQ13

CK0#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3 DQ30

DQ31

RAS#

ODT0

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5 DQ46

DQ47 DQ52

DQ53

CK1#

DQ54 DQ55

DQ60 DQ61

DQS7 DQ62

DQ63

GND

VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7 VSS

VSS DM1 VSS CK0

VSS

VSS DM2

VSS

VSS VDD

VDD

VDD BA1

VDD

VDD VSS

VSS DM4 VSS

VSS

VSS CK1

VSS DM6 VSS

VSS

VSS SAO SA1

+1.8V+1.8V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50

52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90

A11

96 98

100

102

104 106 108 110

S0#

112 114 116 118 120

122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202

DDRB_SDQ4 DDRB_SDQ5

DDRB_SDM0 DDRB_SDQ6

DDRB_SDQ7 DDRB_SDQ12

DDRB_SDQ13 DDRB_SDM1

DDRB_SDQ14 DDRB_SDQ15

DDRB_SDQ20 DDRB_SDQ21DDRB_SDQ17

R356

DDRB_SDM2 DDRB_SDQ22

DDRB_SDQ23 DDRB_SDQ28

DDRB_SDQ29 DDRB_SDQS3#

DDRB_SDQS3

DDRB_SDQ31 DDRB_CKE1

DDRB_SMA14 DDRB_SMA11

DDRB_SMA7 DDRB_SMA6

DDRB_SMA4 DDRB_SMA2 DDRB_SMA0

DDRB_SBS1# DDRB_SRAS# DDRB_SCS0#

DDRB_ODT0 DDRB_SMA13

DDRB_SDQ36 DDRB_SDQ37

DDRB_SDM4 DDRB_SDQ38

DDRB_SDQ39 DDRB_SDQ44

DDRB_SDQ45 DDRB_SDQS5#

DDRB_SDQS5 DDRB_SDQ46

DDRB_SDQ47 DDRB_SDQ52

DDRB_SDQ53

DDRB_SDM6 DDRB_SDQ54

DDRB_SDQ55 DDRB_SDQ60

DDRB_SDQ61DDRB_SDQ57 DDRB_SDQS7#

DDRB_SDQS7 DDRB_SDQ62

DDRB_SDQ63

1 2

R348 10K_0402_5%

1 2

R349 10K_0402_5%

1 2

DDRB_CLK0 8 DDRB_CLK0# 8

0_0402_5%

DDRB_SDQS3# 9 DDRB_SDQS3 9

DDRB_CKE1 8

DDRB_SBS1# 9 DDRB_SRAS# 9 DDRB_SCS0# 8

DDRB_ODT0 8

DDRB_SDQS5# 9 DDRB_SDQS5 9

DDRB_CLK1 8 DDRB_CLK1# 8

DDRB_SDQS7# 9 DDRB_SDQS7 9

+3VS

PM_EXTTS#1 8

C373

2.2U_0805_10V6K

DDRB_SMA[0..14]8,9 DDRB_SDQ[0..63]9

DDRB_SDM[0..7]9

DDRB_CKE0 DDRB_SBS2#

DDRB_SMA12 DDRB_SMA9

DDRB_SMA8 DDRB_SMA5

DDRB_SMA3 DDRB_SMA1

DDRB_SMA10 DDRB_SBS0#

DDRB_SWE# DDRB_SCAS#

DDRB_SCS1# DDRB_ODT1

DDRB_SMA11 DDRB_SMA14

DDRB_SMA6 DDRB_SMA7

DDRB_SMA2 DDRB_SMA4

DDRB_SBS1# DDRB_SMA0

DDRB_SCS0# DDRB_SRAS#

DDRB_SMA13 DDRB_ODT0

DDRB_CKE1

C386

0.1U_0402_16V4Z

DDRB_SMA[0..14] DDRB_SDQ[0..63] DDRB_SDM[0..7]

1 4 2 3

RP32 56_0404_4P2R_5%

1 4 2 3

RP33 56_0404_4P2R_5%

1 4 2 3

RP34 56_0404_4P2R_5%

1 4 2 3

RP35 56_0404_4P2R_5%

1 4 2 3

RP36 56_0404_4P2R_5%

1 4 2 3

RP37 56_0404_4P2R_5%

1 4 2 3

RP38 56_0404_4P2R_5%

1 4 2 3

RP39 56_0404_4P2R_5%

1 4 2 3

RP40 56_0404_4P2R_5%

1 4 2 3

RP41 56_0404_4P2R_5%

1 4 2 3

RP42 56_0404_4P2R_5%

1 4 2 3

RP43 56_0404_4P2R_5%

1 4 2 3

RP44 56_0404_4P2R_5%

1 2

R355 56_0402_5%

+1.8V+DIMM_VREF

C519

330U_D2E_2.5VM_R9

C556

0.1U_0402_16V4Z

150U_D2_6.3VM

C420

C429

0.1U_0402_16V4Z

C385

0.1U_0402_16V4Z

C374

0.1U_0402_16V4Z

For EMI

+1.8V

0.1U_0402_16V4Z

+1.05VS

+1.8V

+0.9VS

C616

C369

2.2U_0805_10V6K

C398

0.1U_0402_16V4Z

C391

0.1U_0402_16V4Z

C396

0.1U_0402_16V4Z

C395

0.1U_0402_16V4Z

C615

0.1U_0402_16V4Z

+0.9VS

C372

2.2U_0805_10V6K

C384

0.1U_0402_16V4Z

C382

0.1U_0402_16V4Z

C397

0.1U_0402_16V4Z

C381

0.1U_0402_16V4Z

+1.8V

C617

0.1U_0402_16V4Z

+5VALW +1.5VS

C370

2.2U_0805_10V6K

C375

0.1U_0402_16V4Z

C392

0.1U_0402_16V4Z

C383

0.1U_0402_16V4Z

C380

0.1U_0402_16V4Z

C618

0.1U_0402_16V4Z

C371

2.2U_0805_10V6K

C399

0.1U_0402_16V4Z

C378

0.1U_0402_16V4Z

C379

0.1U_0402_16V4Z

+1.8V +1.8V

C620

C619

0.1U_0402_16V4Z

C419

C421

C393

C394

1U_0402_6.3V4Z

0.1U_0402_16V4Z

C622

0.1U_0402_16V4Z

C428

C428 1U_0402_6.3V4Z

1U_0402_6.3V4Z

C621

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/12/25 2007/12/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DDRII-SODIMM1

ICL50/ICK70 M/B LA-3551P Schematic

15 48Monday, April 23, 2007

1.0

+ 35 hidden pages