Compal LA-3481P, Satellite A200 Schematic

A
1 1
2 2
B
C
D
E
Compal confidential
ISKAA LA-3481P Schematics Document
Mobile Merom uFCPGA with Intel Crestline_PM+ICH8-M core logic
3 3
2007-06-23
REV:2.0A
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2006/08/05 2007/08/05
2006/08/05 2007/08/05
2006/08/05 2007/08/05
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Cover Sheet
Cover Sheet
Cover Sheet
LA-3481P
LA-3481P
LA-3481P
147Saturday, June 23, 2007
147Saturday, June 23, 2007
147Saturday, June 23, 2007
E
2.0
2.0
2.0
of
of
of
A
B
C
D
E
Compal confidential
Model : ISKAA File Name : LA-3481P
Santa Rosa Platform
1 1
Fan Control
page 4
Mobile Merom
uFCPGA-478 CPU
page 4,5,6
Thermal Sensor ADM1032ARMZ
page 4
Clock Generator ICS 9LPR365
page 16
ISKAA Sub-board
ATI VGA/B LS-3481P Rev 1.0 ATI VGA/B LS-3486P Rev 1.0
SW/B LS-3482P Rev 1.0 CRT/B LS-3483P Rev 1.0 USB/B LS-3484P Rev 1.0
Robson/B LS-3445P Rev 1.0
Finger Print/B LS-3401P Rev 1.0
H_A#(3..35) H_D#(0..63)
HDMI Conn
page 18
LCD Conn.
CRT & TV-out
page 17page 19
Intel Crestline MCH
FCBGA 1299
ATI M72/76
with 256/512
2 2
VRAM
USB port 9
VGA/B Conn.
Mini-Card
3G
page 31
page 19
PCI-Express x 16
PCI-E BUS
USB port 7
New Card socket
2.5GHz
page 7,8,9,10,11,12,13
3.3V 48MHz
page 30
Intel ICH8-M
3.3V 33 MHz
page 20,21,22,23
10/100/1000 LAN
RTL8111B/RTL8101E
page 26
Mini-Card
Robson
page 31
Mini-Card
WLAN
page 31
PCI BUS
FSB
667/800MHz 1.05V
DMI X4
mBGA-676
DDR2 667MHz 1.8V
Dual Channel
Int. Camera USB x 1
page 33
USB port 2
USB
Azalia
SATA
3.3V 24.576MHz/48Mhz
1.5GHz
PATA
3.3V ATA-100
USB x 2 conn
USB port 4, 5
3.3V 480MHz
USB port 6
DDR2-SO-DIMM X2
BANK 0, 1, 2, 3
page 14,15
USB/B conn
page 33
USB1.1 Finger Printer
page 33
page 33
USB2.0 Bluetooth Conn
page 33
USB port 8USB port 0, 1
Tweeter/HP Amplifier & Int-Mic
APA2056
page 28
MDC V1.5
RJ45/11 CONN
3 3
page 26
LPC BUS
3.3V 33 MHz
HD Audio Codec
ALC268
page 30
page 27
CardBus Controller
SATA 0
SATA 1
PATA Slave
LED
page 34
RTC CKT.
page 21
page 25
TI PCI8412
page 24,25
page 24 page 24
5in1 Slot Slot 0 1394 port
ENE KB926
page 29
Power On/Off CKT.
4 4
DC/DC Interface CKT.
Power Circuit DC/DC
page 34
page 35
A
Page 36~43
Touch Pad Int.KBD
page 34page 34
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Issued Date
Issued Date
SPI BIOS
page 34
C
CIR
page 33
2006/08/05 2007/08/05
2006/08/05 2007/08/05
2006/08/05 2007/08/05
Deciphered Date
Deciphered Date
Deciphered Date
SATA HDD Connector
page 32
SATA HDD Connector
page 32
PATA ODD Connector
page 32
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
D
Date: Sheet
Audio Jack
page 28
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
LA-3481P
LA-3481P
LA-3481P
247Tuesday, May 22, 2007
247Tuesday, May 22, 2007
247Tuesday, May 22, 2007
E
2.0
2.0
2.0
of
of
of
5
4
3
2
1
Voltage Rails
Power Plane
VIN
D D
C C
B+ +VCC_CORE +0.9VS +1.05VS +1.25VS 1.25V power rail for MCH/ICH core power +1.5VS +1.8V +1.8VS +2.5VS +3VALW
+5VALW +5VS +RTC_VCC
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Description
Adapter power supply (18.5V) AC or battery power rail for power circuit Core voltage for CPU
1.05V power rail for Processor I/O and MCH/ICH core power
1.5V switched power rail for PCI-E interface
1.8V power rail for DDRII
1.8V switched power rail
2.5V switched power rail for MCH video PLL
3.3V always on power rail
3.3V switched power rail+3VS 5V always on power rail 5V switched power rail RTC power ONON
S0-S1
S3
N/A
N/A
N/A ON OFF ON0.9V switched power rail for DDRII Vtt ON
OFF ON
OFF ON
OFF
ON
ON ON OFF ON OFF OFF
ON
ON ON OFF OFF
ON
ON ON
OFF
ON
S5
N/A N/AN/A OFF OFFOFF OFF OFF OFF OFF OFF
ON*
ON* OFF
External PCI Devices
DEVICE
1394 CARD BUS
PCI Device ID REQ/GNT #
D0 D4
IDSEL #
AD20 AD20 AD20D45IN1 2
PIRQ
2 2
A,B,C,D A,B,C,D A,B,C,D
KB926 I2C / SMBUS ADDRESSING
DEVICE
B B
SM1 24C16 SM1 SMART BATTERY SM2 ADM0132
CPU THERMAL MONITOR
HEX
A0H
98H
ADDRESS
1 0 1 0 0 0 0 X b 0 0 0 1 0 1 1 X b16H 1 0 0 1 1 0 0 X b
Board ID / SKU ID Table for AD channel
Vcc 3.3V +/- 5%
Board ID
0 1 2 3 4 5 6 7 NC
100K +/- 1%Ra/Rc/Re
Rb / Rd / Rf V min
AD_BID
0
8.2K +/- 1% 18K +/- 1% 33K +/- 1% 56K +/- 1% 100K +/- 1% 200K +/- 1%
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
BOARD ID Table
Board ID
0 1 2 3 4 5 6 7
PCB Revision
0.1
0.2
0.3
0.4
1.0
2.0 2A
SKU ID Table
SKU ID
0 1 2 3 4 5 6 7
SKU
10 10G
0 V
V typ
AD_BID
V
AD_BID
max
0 V 0.100 V
0.503 V
0.819 V
0.538 V
0.875 V
1.185 V 1.264 V
2.200 V
3.300 V
2.341 V
3.300 V
BTO Option Table
BTO Item BOM Structure
2nd HDD LAN
WLAN NB
BT MIC CIR FINGER PRINT HDMI
Camera Camera@ Robson Robson@ Express Card NEWCARD@ HD-DVD 3G@
2HDD@ 100M@
1000M@ WLAN@ GM@
PM@ BT@ MIC@ CIR@ FP@ HDMI@
USB PORT LIST
PORT
ICH8-M SM Bus address
DEVICE
DDR SO-DIMM 0 DDR SO-DIMM 1 CLOCK GENERATOR (EXT.)
HEX
A0
D2
ADDRESS
1 0 1 0 0 0 0 0 1 0 1 0 0 1 0 0A4 1 1 0 1 0 0 1 0
0 1 2 3 4 5 6 7 8
A A
9
DEVICE
RIGHT USB Port (Samll Board) RIGHT USB Port (Samll Board) 3G Card
N.C.
LEFT USB Port LEFT USB Port
Fingerprint or Felica Blue Tooth Internal Camera New Card
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/08/05 2007/08/05
2006/08/05 2007/08/05
2006/08/05 2007/08/05
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
Notes List
Notes List
Notes List
LA-3481P
LA-3481P
LA-3481P
347Tuesday, May 22, 2007
347Tuesday, May 22, 2007
347Tuesday, May 22, 2007
1
2.0
2.0
2.0
of
of
of
5
VS
5
+
6
-
R20
R20
1 2
8.2K_0402_5%
8.2K_0402_5%
FAN_SPEED1<29>
8
4
P
G
PU5B
7
0
H_INIT# H_A20M# H_INTR H_NMI H_SMI# H_STPCLK# H_IGNNE# H_FERR#
R629
R629
100_0402_5%
100_0402_5%
C925
C925
+3VS
LM358DT_SO8
LM358DT_SO8
@ PU5B
EN_DFAN1<29>
D D
C C
B B
A A
@
1 2
R19 10K_0402_5%
R19 10K_0402_5%
C1 180P_0402_50V8J@C1 180P_0402_50V8J@
1 2
C2 180P_0402_50V8J@C2 180P_0402_50V8J@
1 2
C3 180P_0402_50V8J@C3 180P_0402_50V8J@
1 2
C4 180P_0402_50V8J@C4 180P_0402_50V8J@
1 2
C5 180P_0402_50V8J@C5 180P_0402_50V8J@
1 2
C6 180P_0402_50V8J@C6 180P_0402_50V8J@
1 2
C7 180P_0402_50V8J@C7 180P_0402_50V8J@
1 2
C8 180P_0402_50V8J@C8 180P_0402_50V8J@
1 2
@
@
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R23
R23
+5VS
1
C
C
Q53
Q53
FMMT619_SOT23
FMMT619_SOT23
2
B
B
E
E
3
12
D2
1 2
10K_0402_5%
10K_0402_5%
1
C14
C14 1000P_0402_50V7K
1000P_0402_50V7K
2
1N4148_SOT23D21N4148_SOT23
D1
4
1 2
10U_0805_10V4Z
10U_0805_10V4Z
12
1SS355_SOD323D11SS355_SOD323
+FAN1_VOUT
C926
C926
@
@
JP2
JP2
1 2 3
4 5
1
C13
C13
@
@
2
1000P_0402_50V7K
1000P_0402_50V7K
Please add the 10uf capacitor if the +5VS power source not stable.
1 2 3
GND GND
ACES_85205-03001
ACES_85205-03001
H_A#[3..35]<7>
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16
H_ADSTB#0<7>
H_REQ#0<7> H_REQ#1<7> H_REQ#2<7> H_REQ#3<7> H_REQ#4<7>
H_ADSTB#1<7>
H_A20M#<21>
H_FERR#<21>
H_IGNNE#<21> H_STPCLK#<21>
H_INTR<21> H_NMI<21> H_SMI#<21>
H_ADSTB#0 H_REQ#0
H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_ADSTB#1
H_A20M# H_FERR# H_IGNNE#
H_STPCLK# H_INTR H_NMI H_SMI#
J4 L5 L4
K5 M3 N2
J1 N3
P5
P2
L2
P4
P1 R1 M1
K3 H2
K2
J3
L1
Y2 U5 R3 W6 U4
Y5 U1 R4
T5
T3 W2 W5
Y4 U2
V4 W3
AA4 AB2 AA3
V1
A6
A5 C4
D5 C6
B4
A3 M4
N5
T2
V3
B2 C3 D2
D22
D3
F6
JP1A
JP1A
A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#
REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#
A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]#
A20M# FERR# IGNNE#
STPCLK# LINT0 LINT1 SMI#
RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09] RSVD[10]
Merom Ball-out Rev 1aconn@
Merom Ball-out Rev 1aconn@
3
H_A#[3..35]
ADDR GROUP 0 ADDR GROUP 1
ADDR GROUP 0 ADDR GROUP 1
ADS# BNR# BPRI#
DEFER#
DRDY# DBSY#
BR0#
IERR#
INIT#
LOCK#
CONTROL
CONTROL
RESET#
RS[0]# RS[1]# RS[2]#
TRDY#
HIT#
HITM#
BPM[0]# BPM[1]# BPM[2]# BPM[3]#
PRDY# PREQ#
TCK
TDI TDO TMS
TRST#
XDP/ITP SIGNALS
XDP/ITP SIGNALS
DBR#
THERMAL
THERMAL
PROCHOT#
THERMDA THERMDC
ICH
ICH
THERMTRIP#
H CLK
H CLK
BCLK[0] BCLK[1]
RESERVED
RESERVED
H1 E2 G5
H5 F21 E1
F1 D20
B3 H4 C1
F3 F4 G3 G2
G6 E4
AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20
D21 A24 B25
C7
A22 A21
H_ADS# H_BNR# H_BPRI#
H_DEFER# H_DRDY# H_DBSY#
H_BR0# H_IERR#
H_INIT# H_LOCK# H_RESET#
H_RS#0 H_RS#1 H_RS#2 H_TRDY#
H_HIT# H_HITM#
ITP_PREQ ITP_TCK ITP_TDI ITP_TDO ITP_TMS ITP_TRST#
ITP_DBRESET#
H_PROCHOT# H_THERMDA H_THERMDC
H_THERMTRIP#
CLK_CPU_BCLK CLK_CPU_BCLK#
H_ADS# <7> H_BNR# <7> H_BPRI# <7>
H_DEFER# <7> H_DRDY# <7> H_DBSY# <7>
H_BR0# <7>
H_INIT# <21> H_LOCK# <7> H_RESET# <7>
H_RS#0 <7> H_RS#1 <7> H_RS#2 <7> H_TRDY# <7>
H_HIT# <7> H_HITM# <7>
ITP_DBRESET# <22>
H_THERMTRIP# <8,21>
CLK_CPU_BCLK <16> CLK_CPU_BCLK# <16>
2
Place close to CPU within 500mil
H_IERR#
ITP_PREQ ITP_TDI ITP_TDO ITP_TMS
H_PROCHOT#
ITP_TCK ITP_TRST#
+1.05VS
12
B
B
2
E
E
3 1
Q1
Q1
MMBT3904_SOT23@
MMBT3904_SOT23@
+1.05VS
12
B
B
2
E
H_THERMTRIP#
H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil
E
3 1
MMBT3904_SOT23@
MMBT3904_SOT23@
Q51
Q51
Thermal Sensor ADM1032ARM
1
C10
C10
2200P_0402_50V7K
2200P_0402_50V7K
EC_SMB_CK2<19,29> EC_SMB_DA2<19,29>
H_THERMDA
2
H_THERMDC
R14 56_0402_5%
R14 56_0402_5%
R604 54.9_0402_1%R604 54.9_0402_1% R11 150_0402_1%
R11 150_0402_1% R605 54.9_0402_1%@R605 54.9_0402_1%@ R10 39_0402_1%R10 39_0402_1%
R310 56_0402_5%
R310 56_0402_5%
R22 27_0402_1%R22 27_0402_1% R21 649_0402_5%
R21 649_0402_5%
R16
R16
56_0402_5%@
56_0402_5%@
OCP#H_PROCHOT#
C
2 3 8 7
C
R304
R304
C
C
330_0402_5%@
330_0402_5%@
D+ D­SCLK SDATA
OCP# <22>
MAINPWON <36,37,39>
+3VS
1
C9
C9
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
U1
U1
VDD1
ALERT#
THERM#
GND
ADM1032ARMZ_RM8
ADM1032ARMZ_RM8
1
+1.05VS
12
12 12 12 12
12
12 12
1 6 4 5
Place Caps Close to CPU Socket
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/08/05 2007/08/05
2006/08/05 2007/08/05
2006/08/05 2007/08/05
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
Merom(1/3)-AGTL+/XDP
Merom(1/3)-AGTL+/XDP
Merom(1/3)-AGTL+/XDP
LA-3481P
LA-3481P
LA-3481P
447Tuesday, May 22, 2007
447Tuesday, May 22, 2007
447Tuesday, May 22, 2007
1
2.0
2.0
2.0
of
of
of
5
4
3
2
1
H_D#[0..15]<7>
D D
+1.05VS
12
R35
R35 1K_0402_1%
1K_0402_1%
+GTL_REF0
12
R37
R37 2K_0402_1%
2K_0402_1%
Close to CPU pin AD26 within 500mils.
C C
R707 1K_0402_5%@R707 1K_0402_5%@ R708 1K_0402_5%@R708 1K_0402_5%@
C868 0.1U_0402_16V4Z@C868 0.1U_0402_16V4Z@
CPU_BSEL
166
200
B B
0
H_DSTBN#0<7> H_DSTBP#0<7>
H_DINV#0<7>
H_D#[16..31]<7>
H_DSTBN#1<7> H_DSTBP#1<7>
H_DINV#1<7> H_DINV#3 <7>
1 2 1 2
1 2
R732 0_0402_5%@R732 0_0402_5%@
CPU_BSEL0<16> CPU_BSEL1<16> CPU_BSEL2<16>
CPU_BSEL1CPU_BSEL2
10
1
+GTL_REF0
TEST1 TEST2
TEST4
CPU_BSEL0
1
0
JP1B
JP1B
H_D#0
E22
AD26
AF26
D[0]#
F24
D[1]#
E26
D[2]#
G22
D[3]#
F23
D[4]#
G25
D[5]#
E25
D[6]#
E23
D[7]#
K24
D[8]#
G24
D[9]#
J24
D[10]#
J23
D[11]#
H22
D[12]#
F26
D[13]#
K22
D[14]#
H23
D[15]#
J26
DSTBN[0]#
H26
DSTBP[0]#
H25
DINV[0]#
N22
D[16]#
K25
D[17]#
P26
D[18]#
R23
D[19]#
L23
D[20]#
M24
D[21]#
L22
D[22]#
M23
D[23]#
P25
D[24]#
P23
D[25]#
P22
D[26]#
T24
D[27]#
R24
D[28]#
L25
D[29]#
T25
D[30]#
N25
D[31]#
L26
DSTBN[1]#
M26
DSTBP[1]#
N24
DINV[1]# GTLREF
C23
TEST1
D25
TEST2
C24
TEST3 TEST4
AF1
TEST5
A26
TEST6
B22
BSEL[0]
B23
BSEL[1]
C21
BSEL[2]
Merom Ball-out Rev 1aconn@
Merom Ball-out Rev 1aconn@
H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#37 H_D#6 H_D#7 H_D#8 H_D#40
H_D#9 H_D#10 H_D#11 H_D#12 H_D#13
H_D#15
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31
DATA GRP 0
DATA GRP 0
DATA GRP 2DATA GRP 3
DATA GRP 2DATA GRP 3
DSTBN[2]# DSTBP[2]#
DINV[2]#
DATA GRP 1
DATA GRP 1
DSTBN[3]# DSTBP[3]#
DINV[3]# COMP[0]
MISC
MISC
COMP[1] COMP[2] COMP[3]
DPRSTP#
PWRGOOD
D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]# D[47]#
D[48]# D[49]# D[50]# D[51]# D[52]# D[53]# D[54]# D[55]# D[56]# D[57]# D[58]# D[59]# D[60]# D[61]# D[62]# D[63]#
DPSLP#
DPWR#
SLP#
PSI#
Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22
AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20
R26 U26 AA1 Y1
E5 B5 D24 D6 D7 AE6
H_D#32 H_D#33 H_D#34 H_D#35 H_D#36
H_D#38 H_D#39
H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46H_D#14 H_D#47
H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
COMP0 COMP1 COMP2 COMP3
H_DPSLP# H_PWRGOOD
H_CPUSLP#
H_D#[32..47] <7>
H_DSTBN#2 <7> H_DSTBP#2 <7> H_DINV#2 <7> H_D#[48..63] <7>
H_DSTBN#3 <7> H_DSTBP#3 <7>
H_DPRSTP# <8,21,43> H_DPSLP# <21>
H_DPWR# <7> H_PWRGOOD <21> H_CPUSLP# <7>
H_PSI# <43>
12
R31
R31
27.4_0402_1%
27.4_0402_1%
12
R32
R32
54.9_0402_1%
54.9_0402_1%
12
R30
R30
54.9_0402_1%
54.9_0402_1%
Resistor placed within
0.5" of CPU pin.Trace should be at least 25 mils away from any other toggling signal. COMP[0,2] trace width is 18 mils. COMP[1,3] trace width is 4 mils.
+VCC_CORE +VCC_CORE
12
R33
R33
27.4_0402_1%
27.4_0402_1%
AA10 AA12 AA13 AA15 AA17 AA18 AA20
AC10 AB10 AB12 AB14 AB15 AB17 AB18
A7
A9 A10 A12 A13 A15 A17 A18 A20
B7
B9 B10 B12 B14 B15 B17 B18 B20
C9 C10 C12 C13 C15 C17 C18
D9 D10 D12 D14 D15 D17 D18
E7
E9 E10 E12 E13 E15 E17 E18 E20
F7
F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9
AB9
JP1C
JP1C
VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067]
Merom Ball-out Rev 1a
conn@
Merom Ball-out Rev 1a
conn@
+VCC_CORE
VCCSENSE
VSSSENSE
1 2
1 2
VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]
VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]
VCCA[01] VCCA[02]
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
R34
R34 100_0402_1%
100_0402_1%
R36
R36 100_0402_1%
100_0402_1%
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26 C26
AD6 AF5 AE5 AF4 AE3 AF3 AE2
VCCSENSE
AF7
VSSSENSE
AE7
.
.
VCCSENSE
VSSSENSE
CPU_VID0 <43> CPU_VID1 <43> CPU_VID2 <43> CPU_VID3 <43> CPU_VID4 <43> CPU_VID5 <43> CPU_VID6 <43>
VCCSENSE <43>
VSSSENSE <43>
Length match within 25 mils.
+1.05VS
1
2
1
1
C18
C18
C19
C19
2
2
10U_0805_10V4Z
10U_0805_10V4Z
Near pin C26
+
+
C17
C17 330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
<BOM Structure>
<BOM Structure>
+1.5VS
0.01U_0402_25V7K
0.01U_0402_25V7K
Near pin B26
The trace
Close to CPU pin within 500mils.
width/space/other is 20/7/25.
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/08/05 2007/08/05
2006/08/05 2007/08/05
2006/08/05 2007/08/05
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
Merom(2/3)-AGTL+/PWR
Merom(2/3)-AGTL+/PWR
Merom(2/3)-AGTL+/PWR
LA-3481P
LA-3481P
LA-3481P
547Tuesday, May 22, 2007
547Tuesday, May 22, 2007
547Tuesday, May 22, 2007
1
2.0
2.0
2.0
of
of
of
5
Place these capacitors on L8 (North side,Secondary Layer)
D D
C C
B B
JP1D
JP1D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
AF2
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080] VSS[081]P3VSS[162]
conn@
conn@
VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]
VSS[163]
Merom Ball-out Rev 1a
Merom Ball-out Rev 1a
.
.
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25
Place these capacitors on L8 (North side,Secondary Layer)
Place these capacitors on L8 (Sorth side,Secondary Layer)
Place these capacitors on L8 (Sorth side,Secondary Layer)
4
+VCC_CORE
1
C21
C21 10U_0805_6.3V6M
10U_0805_6.3V6M
2
+VCC_CORE
1
C29
C29 10U_0805_6.3V6M
10U_0805_6.3V6M
2
+VCC_CORE
1
C37
C37 10U_0805_6.3V6M
10U_0805_6.3V6M
2
+VCC_CORE
1
C45
C45 10U_0805_6.3V6M
10U_0805_6.3V6M
2
South Side Secondary of CPU Socket
+1.05VS
1
+
+
C59
C59
@
@
2
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
1
2
1
C22
C22 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C30
C30 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C38
C38 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C46
C46 10U_0805_6.3V6M
10U_0805_6.3V6M
2
+VCC_CORE
1
+
C53
@+C53
@
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
C60
C60
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C61
C61
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C23
C23 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C31
C31 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C39
C39 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C47
C47 10U_0805_6.3V6M
10U_0805_6.3V6M
2
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
1
+
+
C54
C54
2
1
2
3
1
C24
C24 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C32
C32 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C40
C40 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C48
C48 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
+
+
C55
C55
2
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
C62
C62
0.1U_0402_16V4Z
0.1U_0402_16V4Z
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
C56
C56
1
2
1
2
1
2
1
2
1
+
+
C57
C57
2
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
1
C63
C63
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C25
C25 10U_0805_6.3V6M
10U_0805_6.3V6M
C33
C33 10U_0805_6.3V6M
10U_0805_6.3V6M
C41
C41 10U_0805_6.3V6M
10U_0805_6.3V6M
C49
C49 10U_0805_6.3V6M
10U_0805_6.3V6M
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
1
1
@
@
+
+
C58
C58
2
2
1
C64
C64
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C26
C26 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C34
C34 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C42
C42 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C50
C50 10U_0805_6.3V6M
10U_0805_6.3V6M
2
North Side Secondary of CPU Socket
+
+
1
2
2
1
C27
C27 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C35
C35 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C43
C43 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C51
C51 10U_0805_6.3V6M
10U_0805_6.3V6M
2
C65
C65
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C28
C28 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C36
C36 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C44
C44 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C52
C52 10U_0805_6.3V6M
10U_0805_6.3V6M
2
Mid Frequence Decoupling
ESR <= 1.5m ohm Capacitor > 1980uF
330uF ESR 7m ohm X 6 PCS
Place these inside socket cavity on Bottom layer (North side Secondary)
1
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/08/05 2007/08/05
2006/08/05 2007/08/05
2006/08/05 2007/08/05
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
Merom(3/3)-GND&Bypass
Merom(3/3)-GND&Bypass
Merom(3/3)-GND&Bypass
LA-3481P
LA-3481P
LA-3481P
647Tuesday, May 22, 2007
647Tuesday, May 22, 2007
647Tuesday, May 22, 2007
1
2.0
2.0
2.0
of
of
of
5
4
3
2
1
H_D#[0..63]<5>
+1.05VS
12
R40
D D
C C
B B
A A
R40 221_0603_1%
221_0603_1%
H_SWNG1
H_RCOMP
1
C66
C66
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
R41
R41 100_0402_1%
100_0402_1%
1 2
12
R42
R42
24.9_0402_1%
24.9_0402_1%
10-mil wide with 20-mil spacing
+1.05VS
R43
R43
54.9_0402_1%
54.9_0402_1%
H_SCOMP
12
R44
R44
54.9_0402_1%
54.9_0402_1%
H_SCOMP#
12
impedance is 55 ohm Width is 10mil
+1.05VS
12
R211
R211 1K_0402_1%
1K_0402_1%
12
R212
R212 2K_0402_1%
2K_0402_1%
H_AVREF
1
C67
C67
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
H_RESET#<4> H_CPUSLP#<5>
H_AVREF
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_SWNG1 H_RCOMP
H_SCOMP H_SCOMP#
H_RESET# H_CPUSLP#
M10 N12
W10
AD12
AE3 AD9 AC9 AC7
AC14 AD11 AC11
AB2 AD7
AB1 AC6
AE2 AC5 AG3
AH8
AJ14
AE9
AE11
AH12
AH5
AE7
AE5 AH2
AH13
P13
W6 W9
W3
AJ9
AJ5 AJ6 AJ7
AJ2 AJ3
W1 W2
E2 G2
G7 M6 H7 H3 G4
F3 N8 H2
N9 H5
K9 M2
Y8
V4 M3
J1 N5 N3
N2
Y7 Y9 P4
N1
Y3
B3
C2
B6 E5
B9 A9
U3A
U3A
H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63
H_SWING H_RCOMP
H_SCOMP H_SCOMP#
H_CPURST# H_CPUSLP#
H_AVREF H_DVREF
H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8
H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35
H_ADS# H_ADSTB#_0 H_ADSTB#_1
H_BNR#
H_BPRI#
HOST
HOST
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM# H_LOCK# H_TRDY#
H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3
H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3
H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3
H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4
H_RS#_0 H_RS#_1 H_RS#_2
CRESTLINE ES_FCBGA1299
CRESTLINE ES_FCBGA1299
PMR3@
PMR3@
J13 B11 C11 M11 C15 F16 L13 G17 C14 K16 B13 L16 J17 B14 K19 P15 R17 B16 H20 L19 D17 M17 N16 J19 B18 E19 B17 B15 E17 C18 A19 B19 N19
G12 H17 G20 C8 E8 F12 D6 C10 AM5 AM7 H8 K7 E4 C6 G10 B7
K5 L2 AD13 AE13
M7 K3 AD2 AH11
L7 K2 AC2 AJ10
M14 E13 A11 H13 B12
E12 D7 D8
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BR0# H_DEFER# H_DBSY# CLK_MCH_BCLK CLK_MCH_BCLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY#
H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3
H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_RS#0 H_RS#1 H_RS#2
H_A#[3..35] <4>
H_ADS# <4> H_ADSTB#0 <4> H_ADSTB#1 <4> H_BNR# <4> H_BPRI# <4> H_BR0# <4> H_DEFER# <4> H_DBSY# <4> CLK_MCH_BCLK <16> CLK_MCH_BCLK# <16> H_DPWR# <5> H_DRDY# <4> H_HIT# <4> H_HITM# <4> H_LOCK# <4> H_TRDY# <4>
H_DINV#0 <5> H_DINV#1 <5> H_DINV#2 <5> H_DINV#3 <5>
H_DSTBN#0 <5> H_DSTBN#1 <5> H_DSTBN#2 <5> H_DSTBN#3 <5>
H_DSTBP#0 <5> H_DSTBP#1 <5> H_DSTBP#2 <5> H_DSTBP#3 <5>
H_REQ#[0..4] <4>
H_RS#[0..2] <4>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2006/08/05 2007/08/05
2006/08/05 2007/08/05
2006/08/05 2007/08/05
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
Crestline (1/7)
Crestline (1/7)
Crestline (1/7)
LA-3481P
LA-3481P
LA-3481P
747Tuesday, May 22, 2007
747Tuesday, May 22, 2007
747Tuesday, May 22, 2007
1
2.0
2.0
2.0
of
of
of
5
Strap Pin Table
CFG[2:0]
CFG5 CFG9
CFG[13:12]
D D
CFG16
CFG19
CFG20
(PCIE/SDVO select)
SDVO_CTRLDATA
MCH_CFG_5 MCH_CFG_9 MCH_CFG_12 MCH_CFG_13 MCH_CFG_16
C C
MCH_CFG_19 MCH_CFG_20
CFG[17:3] have internal pull up CFG[19:18] have internal pull down
011 = 667MT/s FSB 010 = 800MT/s FSB
0 = DMI x 2 1 = DMI x 4
0 = Lane Reversal Enable 1 = Normal Operation
00 = Reserved 01 = XOR Mode Enabled 10 = All Z Mode Enabled 11 = Normal Operation
0 = Dynamic ODT Disabled 1 = Dynamic ODT Enabled
0 = Normal Operation 1 = DMI Lane Reversal Enable
0 = Only PCIE or SDVO is operational.
*
1 = PCIE/SDVO are operating simu.
*
(Default)
0 = No SDVO Device Present 1 = SDVO Device Present
R51 4.02K_0402_1%@R51 4.02K_0402_1%@ R53 4.02K_0402_1%@R53 4.02K_0402_1%@ R55 4.02K_0402_1%@R55 4.02K_0402_1%@ R56 4.02K_0402_1%@R56 4.02K_0402_1%@ R57 4.02K_0402_1%@R57 4.02K_0402_1%@
R58 4.02K_0402_1% R58 4.02K_0402_1% R60 4.02K_0402_1%@R60 4.02K_0402_1%@
Intel recommend 4.02K_1%
+1.05VS
(Default)
*
*
+3VS
(Default)
(Default)
(Default)
*
*
(Default)
*
(Default)
DDRA_SMA14<14> DDRB_SMA14<15>
Refer Strap Pin Table
12
R733
B B
H_DPRSTP#<5,21,43>
+3VS
A A
R62 10K_0402_5%
R62 10K_0402_5%
R63 10K_0402_5%
R63 10K_0402_5%
R65 10K_0402_5%
R65 10K_0402_5%
PM_EXTTS#0
PM_EXTTS#1_R
MCH_CLKREQ#
5
R733
56_0402_5%@
56_0402_5%@
R66 0_0402_5%
PM_BMBUSY#<22>
PM_EXTTS#0<14> PM_EXTTS#1<15> PWROK<22,29>
PLT_RST#<20,22,26,30,31> H_THERMTRIP#<4,21> DPRSLPVR<22,43>
R66 0_0402_5% R67 0_0402_5%
R67 0_0402_5% R68 0_0402_5%
R68 0_0402_5%
R71 0_0402_5% R71 0_0402_5%
4
DDRA_SMA14 DDRB_SMA14
R70
R70
MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2
MCH_CFG_5
MCH_CFG_9
MCH_CFG_12 MCH_CFG_13
MCH_CFG_16
MCH_CFG_19 MCH_CFG_20
PM_BMBUSY#_R H_DPRSTP#_R PM_EXTTS#0 PM_EXTTS#1_R
MCH_RSTIN# H_THERMTRIP# PM_DPRSLPVR_R
MCH_CLKSEL0<16> MCH_CLKSEL1<16> MCH_CLKSEL2<16>
1 2 1 2
1 2
100_0402_5%
100_0402_5%
1 2
4
AR12 AR13 AM12 AN13
AR37 AM36
AL36
AM37
BJ20 BK22 BF19
BH20
BK18
BJ18 BF23
BG23 BC23 BD24
BJ29 BE24
BH39
AW20
BK20
M20 M24
AW49
AV20
BJ51 BK51 BK50 BL50 BL49
P36 P37 R35 N35
D20
H10 B51
C48 D47 B44 C44 A35 B37 B36 B34 C34
P27 N27 N24 C21 C23 F23 N23 G23
C20 R24 L23
E23 E20 K23
L32 N33 L35
G41 L39 L36
N20 G36
BL3 BL2 BK1 BJ1
C51 B50 A50 A49 BK2
J12
J20
J23
J36
U3B
U3B
RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14
RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27 RSVD28 RSVD29 RSVD30 RSVD31 RSVD32 RSVD33 RSVD34 RSVD35 RSVD36 RSVD37 RSVD38 RSVD39 RSVD40 RSVD41 RSVD42 RSVD43 RSVD44 RSVD45
CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20
PM_BM_BUSY# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR
NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8 NC_9
E1
NC_10
A5
NC_11 NC_12 NC_13 NC_14 NC_15 NC_16
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
RSVD CFG PM NC
RSVD CFG PM NC
DDR MUXINGCLKDMIGRAPHICS VIDMEMISC
DDR MUXINGCLKDMIGRAPHICS VIDMEMISC
CRESTLINE ES_FCBGA1299
CRESTLINE ES_FCBGA1299
PMR3@
PMR3@
3
SM_RCOMP_VOH
SM_RCOMP_VOL
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
SDVO_CTRL_CLK
SDVO_CTRL_DATA
3
2
AV29
SM_CK_0
BB23
SM_CK_1
BA25
SM_CK_3
AV23
SM_CK_4
AW30
SM_CK#_0
BA23
SM_CK#_1
AW25
SM_CK#_3
AW23
SM_CK#_4
BE29
SM_CKE_0
AY32
SM_CKE_1
BD39
SM_CKE_3
BG37
SM_CKE_4
BG20
SM_CS#_0
BK16
SM_CS#_1
BG16
SM_CS#_2
BE13
SM_CS#_3
BH18
SM_ODT_0
BJ15
SM_ODT_1
BJ14
SM_ODT_2
BE16
SM_ODT_3
SM_RCOMP
SM_RCOMP#
SM_VREF_0 SM_VREF_1
DPLL_REF_CLK
GFX_VR_EN
CL_PWROK
ICH_SYNC#
BL15 BK14
BK31 BL31
AR49 AW4
CLK_DREF_96M
B42
CLK_DREF_96M#
C42
CLK_DREF_SSC
H48
CLK_DREF_SSC#
H47
CLK_MCH_3GPLL
K44
PEG_CLK
PEG_CLK#
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3
CL_CLK
CL_DATA
CL_RST#
CL_VREF
CLK_REQ#
TEST_1 TEST_2
2006/08/05 2007/08/05
2006/08/05 2007/08/05
2006/08/05 2007/08/05
CLK_MCH_3GPLL#
K45
DMI_ITX_MRX_N0
AN47
DMI_ITX_MRX_N1
AJ38
DMI_ITX_MRX_N2
AN42
DMI_ITX_MRX_N3
AN46
DMI_ITX_MRX_P0
AM47
DMI_ITX_MRX_P1
AJ39
DMI_ITX_MRX_P2
AN41
DMI_ITX_MRX_P3
AN45
DMI_MTX_IRX_N0
AJ46
DMI_MTX_IRX_N1
AJ41
DMI_MTX_IRX_N2
AM40
DMI_MTX_IRX_N3
AM44
DMI_MTX_IRX_P0
AJ47
DMI_MTX_IRX_P1
AJ42
DMI_MTX_IRX_P2
AM39
DMI_MTX_IRX_P3
AM43
E35
R734 22K_0402_5%@R734 22K_0402_5%@
A39
R735 22K_0402_5%@R735 22K_0402_5%@
C38
R736 22K_0402_5%@R736 22K_0402_5%@
B39
R737 22K_0402_5%@R737 22K_0402_5%@
E36
AM49 AK50 AT43 AN49 AM50
H35
SDVO_SDAT
K36
MCH_CLKREQ#
G39 G40
MCH_TEST_1
A37
MCH_TEST_2
R32
Compal Secret Data
Compal Secret Data
Compal Secret Data
1 2 1 2 1 2 1 2
Deciphered Date
Deciphered Date
Deciphered Date
DDRA_CLK0 <14> DDRA_CLK1 <14> DDRB_CLK0 <15> DDRB_CLK1 <15>
DDRA_CLK0# <14> DDRA_CLK1# <14> DDRB_CLK0# <15> DDRB_CLK1# <15>
DDRA_CKE0 <14> DDRA_CKE1 <14> DDRB_CKE0 <15> DDRB_CKE1 <15>
DDRA_SCS0# <14> DDRA_SCS1# <14> DDRB_SCS0# <15> DDRB_SCS1# <15>
DDRA_ODT0 <14> DDRA_ODT1 <14> DDRB_ODT0 <15> DDRB_ODT1 <15>
CLK_DREF_96M <16> CLK_DREF_96M# <16> CLK_DREF_SSC <16> CLK_DREF_SSC# <16>
CLK_MCH_3GPLL <16> CLK_MCH_3GPLL# <16>
DMI_ITX_MRX_N0 <22> DMI_ITX_MRX_N1 <22> DMI_ITX_MRX_N2 <22> DMI_ITX_MRX_N3 <22>
DMI_ITX_MRX_P0 <22> DMI_ITX_MRX_P1 <22> DMI_ITX_MRX_P2 <22> DMI_ITX_MRX_P3 <22>
DMI_MTX_IRX_N0 <22> DMI_MTX_IRX_N1 <22> DMI_MTX_IRX_N2 <22> DMI_MTX_IRX_N3 <22>
DMI_MTX_IRX_P0 <22> DMI_MTX_IRX_P1 <22> DMI_MTX_IRX_P2 <22> DMI_MTX_IRX_P3 <22>
CL_CLK0 <22> CL_DATA0 <22>
PWROK <22,29>
CL_RST# <22>
MCH_ICH_SYNC# <22>
R72 0_0402_5%
R72 0_0402_5%
1 2
R73 20K_0402_5% R73 20K_0402_5%
SMRCOMPP SMRCOMPN
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF
2
+3VS
CL_VREF
+1.8V
R48
R48 1K_0402_1%
1K_0402_1%
R49
R49
3.01K_0402_1%
3.01K_0402_1%
R50
R50 1K_0402_1%
1K_0402_1%
SDVO_SDAT
12
PM@
PM@
0_0402_5%
0_0402_5%
R757
R757
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
LA-3481P
LA-3481P
LA-3481P
1
C68
C68
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
C70
C70
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
SMRCOMPP SMRCOMPN
SM_VREF
CL_VREF
Crestline (2/7)
Crestline (2/7)
Crestline (2/7)
R52 20_0402_1% R52 20_0402_1% R54 20_0402_1% R54 20_0402_1%
C72
C72
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C73
C73
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
1
2
SM_RCOMP_VOH
C69
C69
0.01U_0402_25V7K
0.01U_0402_25V7K
SM_RCOMP_VOL
C71
C71
0.01U_0402_25V7K
0.01U_0402_25V7K
1 2 1 2
+1.8V
R59
R59
1K_0402_1%
1K_0402_1%
1 2
R61
R61
1K_0402_1%
1K_0402_1%
1 2
+1.25VS
R64
R64
1K_0402_1%
1K_0402_1%
1 2
R69
R69
392_0402_1%
392_0402_1%
1 2
of
847Tuesday, May 22, 2007
of
847Tuesday, May 22, 2007
of
847Tuesday, May 22, 2007
+1.8V
2.0
2.0
2.0
5
4
3
2
1
DDRA_SDQ[0..63]<14>
DDRA_SDM[0..7]<14>
D D
C C
B B
DDRA_SMA[0..13]<14>
DDRA_SDQ0 DDRA_SDQ1 DDRA_SDQ2 DDRA_SDQ3 DDRA_SDQ4 DDRA_SDQ5 DDRA_SDQ6 DDRA_SDQ7 DDRA_SDQ8 DDRA_SDQ9 DDRA_SDQ10 DDRA_SDQ11 DDRA_SDQ12 DDRA_SDQ13 DDRA_SDQ14 DDRA_SDQ15 DDRA_SDQ16 DDRA_SDQ17 DDRA_SDQ18 DDRA_SDQ19 DDRA_SDQ20 DDRA_SDQ21 DDRA_SDQ22 DDRA_SDQ23 DDRA_SDQ24 DDRA_SDQ25 DDRA_SDQ26 DDRA_SDQ27 DDRA_SDQ28 DDRA_SDQ29 DDRA_SDQ30 DDRA_SDQ31 DDRA_SDQ32 DDRA_SDQ33 DDRA_SDQ34 DDRA_SDQ35 DDRA_SDQ36 DDRA_SDQ37 DDRA_SDQ38 DDRA_SDQ39 DDRA_SDQ40 DDRA_SDQ41 DDRA_SDQ42 DDRA_SDQ43 DDRA_SDQ44 DDRA_SDQ45 DDRA_SDQ46 DDRA_SDQ47 DDRA_SDQ48 DDRA_SDQ49 DDRA_SDQ50 DDRA_SDQ51 DDRA_SDQ52 DDRA_SDQ53 DDRA_SDQ54 DDRA_SDQ55 DDRA_SDQ56 DDRA_SDQ57 DDRA_SDQ58 DDRA_SDQ59 DDRA_SDQ60 DDRA_SDQ61 DDRA_SDQ62 DDRA_SDQ63
DDRA_SDQ[0..63] DDRA_SDM[0..7] DDRA_SMA[0..13]
U3D
U3D
AR43
SA_DQ_0
AW44
SA_DQ_1
BA45
SA_DQ_2
AY46
SA_DQ_3
AR41
SA_DQ_4
AR45
SA_DQ_5
AT42
SA_DQ_6
AW47
SA_DQ_7
BB45
SA_DQ_8
BF48
SA_DQ_9
BG47
SA_DQ_10
BJ45
SA_DQ_11
BB47
SA_DQ_12
BG50
SA_DQ_13
BH49
SA_DQ_14
BE45
SA_DQ_15
AW43
SA_DQ_16
BE44
SA_DQ_17
BG42
SA_DQ_18
BE40
SA_DQ_19
BF44
SA_DQ_20
BH45
SA_DQ_21
BG40
SA_DQ_22
BF40
SA_DQ_23
AR40
SA_DQ_24
AW40
SA_DQ_25
AT39
SA_DQ_26
AW36
SA_DQ_27
AW41
SA_DQ_28
AY41
SA_DQ_29
AV38
SA_DQ_30
AT38
SA_DQ_31
AV13
SA_DQ_32
AT13
SA_DQ_33
AW11
SA_DQ_34
AV11
SA_DQ_35
AU15
SA_DQ_36
AT11
SA_DQ_37
BA13
SA_DQ_38
BA11
SA_DQ_39
BE10
SA_DQ_40
BD10
SA_DQ_41
BD8
SA_DQ_42
AY9
SA_DQ_43
BG10
SA_DQ_44
AW9
SA_DQ_45
BD7
SA_DQ_46
BB9
SA_DQ_47
BB5
SA_DQ_48
AY7
SA_DQ_49
AT5
SA_DQ_50
AT7
SA_DQ_51
AY6
SA_DQ_52
BB7
SA_DQ_53
AR5
SA_DQ_54
AR8
SA_DQ_55
AR9
SA_DQ_56
AN3
SA_DQ_57
AM8
SA_DQ_58
AN10
SA_DQ_59
AT9
SA_DQ_60
AN9
SA_DQ_61
AM9
SA_DQ_62
AN11
SA_DQ_63
CRESTLINE ES_FCBGA1299
CRESTLINE ES_FCBGA1299
PMR3@
PMR3@
DDRB_SDQ[0..63]<15> DDRB_SDM[0..7]<15> DDRB_SMA[0..13]<15>
BB19
SA_BS_0
BK19
SA_BS_1
BF29
SA_BS_2
DDRA_SDM0
AT45
SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7
SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_MA_8
SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13
SA_CAS#
SA_RAS#
SA_WE#
SA_RCVEN#
BD44 BD42 AW38 AW13 BG8 AY5 AN6
AT46 BE48 BB43 BC37 BB16 BH6 BB2 AP3
AT47 BD47 BC41 BA37 BA16 BH7 BC1 AP2
BJ19 BD20 BK27 BH28 BL24 BK28 BJ27 BJ25 BL28 BA28 BC19 BE28 BG30 BJ16
BL17 BE18 BA19
AY20
DDRA_SDM1 DDRA_SDM2 DDRA_SDM3 DDRA_SDM4 DDRA_SDM5 DDRA_SDM6 DDRA_SDM7
DDRA_SDQS0 DDRA_SDQS1 DDRA_SDQS2 DDRA_SDQS3 DDRA_SDQS4 DDRA_SDQS5 DDRA_SDQS6 DDRA_SDQS7
DDRA_SDQS0# DDRA_SDQS1# DDRA_SDQS2# DDRA_SDQS3# DDRA_SDQS4# DDRA_SDQS5# DDRA_SDQS6# DDRA_SDQS7#
DDRA_SMA0 DDRA_SMA1 DDRA_SMA2 DDRA_SMA3 DDRA_SMA4 DDRA_SMA5 DDRA_SMA6 DDRA_SMA7 DDRA_SMA8 DDRA_SMA9 DDRA_SMA10 DDRA_SMA11 DDRA_SMA12 DDRA_SMA13
DDRB_SDQ[0..63] DDRB_SDM[0..7] DDRB_SMA[0..13]
DDRA_SBS0# <14> DDRA_SBS1# <14> DDRA_SBS2# <14>
DDRA_SDQS0 <14> DDRA_SDQS1 <14> DDRA_SDQS2 <14> DDRA_SDQS3 <14> DDRA_SDQS4 <14> DDRA_SDQS5 <14> DDRA_SDQS6 <14> DDRA_SDQS7 <14>
DDRA_SDQS0# <14> DDRA_SDQS1# <14> DDRA_SDQS2# <14> DDRA_SDQS3# <14> DDRA_SDQS4# <14> DDRA_SDQS5# <14> DDRA_SDQS6# <14> DDRA_SDQS7# <14>
DDRA_SCAS# <14> DDRA_SRAS# <14> DDRA_SWE# <14>
DDRB_SDQ0 DDRB_SDQ1 DDRB_SDQ2 DDRB_SDQ3 DDRB_SDQ4 DDRB_SDQ5 DDRB_SDQ6 DDRB_SDQ7 DDRB_SDQ8 DDRB_SDQ9 DDRB_SDQ10 DDRB_SDQ11 DDRB_SDQ12 DDRB_SDQ13 DDRB_SDQ14 DDRB_SDQ15 DDRB_SDQ16 DDRB_SDQ17 DDRB_SDQ18 DDRB_SDQ19 DDRB_SDQ20 DDRB_SDQ21 DDRB_SDQ22 DDRB_SDQ23 DDRB_SDQ24 DDRB_SDQ25 DDRB_SDQ26 DDRB_SDQ27 DDRB_SDQ28 DDRB_SDQ29 DDRB_SDQ30 DDRB_SDQ31 DDRB_SDQ32 DDRB_SDQ33 DDRB_SDQ34 DDRB_SDQ35 DDRB_SDQ36 DDRB_SDQ37 DDRB_SDQ38 DDRB_SDQ39 DDRB_SDQ40 DDRB_SDQ41 DDRB_SDQ42 DDRB_SDQ43 DDRB_SDQ44 DDRB_SDQ45 DDRB_SDQ46 DDRB_SDQ47 DDRB_SDQ48 DDRB_SDQ49 DDRB_SDQ50 DDRB_SDQ51 DDRB_SDQ52 DDRB_SDQ53 DDRB_SDQ54 DDRB_SDQ55 DDRB_SDQ56 DDRB_SDQ57 DDRB_SDQ58 DDRB_SDQ59 DDRB_SDQ60 DDRB_SDQ61 DDRB_SDQ62 DDRB_SDQ63
U3E
U3E
AP49
SB_DQ_0
AR51
SB_DQ_1
AW50
SB_DQ_2
AW51
SB_DQ_3
AN51
SB_DQ_4
AN50
SB_DQ_5
AV50
SB_DQ_6
AV49
SB_DQ_7
BA50
SB_DQ_8
BB50
SB_DQ_9
BA49
SB_DQ_10
BE50
SB_DQ_11
BA51
SB_DQ_12
AY49
SB_DQ_13
BF50
SB_DQ_14
BF49
SB_DQ_15
BJ50
SB_DQ_16
BJ44
SB_DQ_17
BJ43
SB_DQ_18
BL43
SB_DQ_19
BK47
SB_DQ_20
BK49
SB_DQ_21
BK43
SB_DQ_22
BK42
SB_DQ_23
BJ41
SB_DQ_24
BL41
SB_DQ_25
BJ37
SB_DQ_26
BJ36
SB_DQ_27
BK41
SB_DQ_28
BJ40
SB_DQ_29
BL35
SB_DQ_30
BK37
SB_DQ_31
BK13
SB_DQ_32
BE11
SB_DQ_33
BK11
SB_DQ_34
BC11
SB_DQ_35
BC13
SB_DQ_36
BE12
SB_DQ_37
BC12
SB_DQ_38
BG12
SB_DQ_39
BJ10
SB_DQ_40
BL9
SB_DQ_41
BK5
SB_DQ_42
BL5
SB_DQ_43
BK9
SB_DQ_44
BK10
SB_DQ_45
BJ8
SB_DQ_46
BJ6
SB_DQ_47
BF4
SB_DQ_48
BH5
SB_DQ_49
BG1
SB_DQ_50
BC2
SB_DQ_51
BK3
SB_DQ_52
BE4
SB_DQ_53
BD3
SB_DQ_54
BJ2
SB_DQ_55
BA3
SB_DQ_56
BB3
SB_DQ_57
AR1
SB_DQ_58
AT3
SB_DQ_59
AY2
SB_DQ_60
AY3
SB_DQ_61
AU2
SB_DQ_62
AT2
SB_DQ_63
CRESTLINE ES_FCBGA1299
CRESTLINE ES_FCBGA1299
PMR3@
PMR3@
AY17
SB_BS_0
BG18
SB_BS_1
BG36
SB_BS_2
DDRB_SDM0
AR50
SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7
SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7
SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7
SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA_8
SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13
SB_CAS#
SB_RAS#
SB_WE#
SB_RCVEN#
BD49 BK45 BL39 BH12 BJ7 BF3 AW2
AT50 BD50 BK46 BK39 BJ12 BL7 BE2 AV2
AU50 BC50 BL45 BK38 BK12 BK7 BF2 AV3
BC18 BG28 BG25 AW17 BF25 BE25 BA29 BC28 AY28 BD37 BG17 BE37 BA39 BG13
BE17 AV16 BC17
AY18
DDRB_SDM1 DDRB_SDM2 DDRB_SDM3 DDRB_SDM4 DDRB_SDM5 DDRB_SDM6 DDRB_SDM7
DDRB_SDQS0 DDRB_SDQS1 DDRB_SDQS2 DDRB_SDQS3 DDRB_SDQS4 DDRB_SDQS5 DDRB_SDQS6 DDRB_SDQS7
DDRB_SDQS0# DDRB_SDQS1# DDRB_SDQS2# DDRB_SDQS3# DDRB_SDQS4# DDRB_SDQS5# DDRB_SDQS6# DDRB_SDQS7#
DDRB_SMA0 DDRB_SMA1 DDRB_SMA2 DDRB_SMA3 DDRB_SMA4 DDRB_SMA5 DDRB_SMA6 DDRB_SMA7 DDRB_SMA8 DDRB_SMA9 DDRB_SMA10 DDRB_SMA11 DDRB_SMA12 DDRB_SMA13
DDRB_SBS0# <15> DDRB_SBS1# <15> DDRB_SBS2# <15>
DDRB_SDQS0 <15> DDRB_SDQS1 <15> DDRB_SDQS2 <15> DDRB_SDQS3 <15> DDRB_SDQS4 <15> DDRB_SDQS5 <15> DDRB_SDQS6 <15> DDRB_SDQS7 <15>
DDRB_SDQS0# <15> DDRB_SDQS1# <15> DDRB_SDQS2# <15> DDRB_SDQS3# <15> DDRB_SDQS4# <15> DDRB_SDQS5# <15> DDRB_SDQS6# <15> DDRB_SDQS7# <15>
DDRB_SCAS# <15> DDRB_SRAS# <15> DDRB_SWE# <15>
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2006/08/05 2007/08/05
2006/08/05 2007/08/05
2006/08/05 2007/08/05
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet of
Compal Electronics, Inc.
Crestline (3/7)
Crestline (3/7)
Crestline (3/7)
LA-3481P
LA-3481P
LA-3481P
947Tuesday, May 22, 2007
947Tuesday, May 22, 2007
947Tuesday, May 22, 2007
1
2.0
2.0
2.0
of
of
5
4
3
2
1
PCIE_MTX_C_GRX_N[0..15]
U3C
U3C
J40
L_BKLT_CTRL
CRT_IREF
H39 E39 E40 C37 D35 K40
N41 N40
D46 C45 D44 E42
G51 E51
G50 E50
G44 B47 B45
E44 A47 A45
E27 G27 K27
M35 P33
H32 G32 K29
E29
K33 G35
E33 C32
L41 L43
F49
F48
F27 J27 L27
J29 F29
F33
L_BKLT_EN L_CTRL_CLK L_CTRL_DATA L_DDC_CLK L_DDC_DATA L_VDD_EN
LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL
LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK
LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2
LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2
LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2
LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2
TVA_DAC TVB_DAC TVC_DAC
TVA_RTN TVB_RTN TVC_RTN
TV_DCONSEL_0 TV_DCONSEL_1
CRT_BLUE CRT_BLUE# CRT_GREEN CRT_GREEN# CRT_RED CRT_RED#
CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_VSYNC
CRT_TVO_IREF
PEG_COMPI
PEG_COMPO
PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8
LVDS TV VGA
LVDS TV VGA
CRESTLINE ES_FCBGA1299
CRESTLINE ES_FCBGA1299
PMR3@
PMR3@
PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15
PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8
PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15
PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9
PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15
GMCH_ENBKL<29>
D D
C C
R86 2.4K_0402_5%
R86 2.4K_0402_5%
1 2
R87 75_0402_1% R87 75_0402_1%
1 2
R88 150_0402_1% R88 150_0402_1%
1 2
R89 150_0402_1% R89 150_0402_1%
1 2
R90 150_0402_1%
R90 150_0402_1% R91 150_0402_1%
R91 150_0402_1%
R92 150_0402_1%
R92 150_0402_1%
B B
+3VS
R667 2.2K_0402_5%R667 2.2K_0402_5% R669 2.2K_0402_5%R669 2.2K_0402_5% R671 10K_0402_5%R671 10K_0402_5% R673 10K_0402_5%R673 10K_0402_5% R675 2.2K_0402_5%R675 2.2K_0402_5% R677 2.2K_0402_5%R677 2.2K_0402_5% R679 2.2K_0402_5%R679 2.2K_0402_5%
A A
R681 2.2K_0402_5%R681 2.2K_0402_5%
12 12 12
1 2 1 2 1 2 1 2 1 2 1 2
GMCH_CRT_B GMCH_CRT_G GMCH_CRT_R
LVDS_IBG
GMCH_TV_COMPS
GMCH_TV_LUMA GMCH_TV_CRMA
GMCH_LCD_CLK GMCH_LCD_DATA LCTLB_DATA LCTLA_CLK GMCH_CRT_CLK GMCH_CRT_DATA TV_DCONSEL_0 TV_DCONSEL_1
GMCH_LCD_CLK<19>
GMCH_LCD_DATA<19>
GMCH_ENVDD<19>
GMCH_TXCLK-<19> GMCH_TXCLK+<19> GMCH_TZCLK-<19> GMCH_TZCLK+<19>
GMCH_TXOUT0-<19> GMCH_TXOUT1-<19> GMCH_TXOUT2-<19>
GMCH_TXOUT0+<19> GMCH_TXOUT1+<19> GMCH_TXOUT2+<19>
GMCH_TZOUT0-<19> GMCH_TZOUT1-<19> GMCH_TZOUT2-<19>
GMCH_TZOUT0+<19> GMCH_TZOUT1+<19> GMCH_TZOUT2+<19>
GMCH_TV_LUMA<17> GMCH_TV_CRMA<17>
GMCH_CRT_B<17> GMCH_CRT_G<17> GMCH_CRT_R<17>
GMCH_CRT_CLK<17> GMCH_CRT_DATA<17> GMCH_CRT_HSYNC<17> GMCH_CRT_VSYNC<17>
LCTLA_CLK LCTLB_DATA GMCH_LCD_CLK GMCH_LCD_DATA
LVDS_IBG
GMCH_TXCLK­GMCH_TXCLK+ GMCH_TZCLK­GMCH_TZCLK+
GMCH_TXOUT0­GMCH_TXOUT1­GMCH_TXOUT2-
GMCH_TXOUT0+ GMCH_TXOUT1+ GMCH_TXOUT2+
GMCH_TZOUT0­GMCH_TZOUT1­GMCH_TZOUT2-
GMCH_TZOUT0+ GMCH_TZOUT1+ GMCH_TZOUT2+
GMCH_TV_COMPS GMCH_TV_LUMA GMCH_TV_CRMA
TV_DCONSEL_0 TV_DCONSEL_1
GMCH_CRT_B GMCH_CRT_G GMCH_CRT_R
GMCH_CRT_CLK GMCH_CRT_DATA
1 2
R93 1.3K_0402_1%R93 1.3K_0402_1%
N43 M43
PCIE_GTX_C_MRX_N0
J51
PCIE_GTX_C_MRX_N1
L51
PCIE_GTX_C_MRX_N2
N47
PCIE_GTX_C_MRX_N3
T45
PCIE_GTX_C_MRX_N4
T50
PCIE_GTX_C_MRX_N5
U40
PCIE_GTX_C_MRX_N6
Y44
PCIE_GTX_C_MRX_N7
Y40
PCIE_GTX_C_MRX_N8
AB51
PCIE_GTX_C_MRX_N9
W49
PCIE_GTX_C_MRX_N10
AD44
PCIE_GTX_C_MRX_N11
AD40
PCIE_GTX_C_MRX_N12
AG46
PCIE_GTX_C_MRX_N13
AH49
PCIE_GTX_C_MRX_N14
AG45
PCIE_GTX_C_MRX_N15
AG41
PCIE_GTX_C_MRX_P0
J50
PCIE_GTX_C_MRX_P1
L50
PCIE_GTX_C_MRX_P2
M47
PCIE_GTX_C_MRX_P3
U44
PCIE_GTX_C_MRX_P4
T49
PCIE_GTX_C_MRX_P5
T41
PCIE_GTX_C_MRX_P6
W45
PCIE_GTX_C_MRX_P7
W41
PCIE_GTX_C_MRX_P8
AB50
PCIE_GTX_C_MRX_P9
Y48
PCIE_GTX_C_MRX_P10
AC45
PCIE_GTX_C_MRX_P11
AC41
PCIE_GTX_C_MRX_P12
AH47
PCIE_GTX_C_MRX_P13
AG49
PCIE_GTX_C_MRX_P14
AH45
PCIE_GTX_C_MRX_P15
AG42
PCIE_MTX_GRX_N0
N45
PCIE_MTX_GRX_N1
U39
PCIE_MTX_GRX_N2
U47
PCIE_MTX_GRX_N3
N51
PCIE_MTX_GRX_N4
R50
PCIE_MTX_GRX_N5
T42
PCIE_MTX_GRX_N6
Y43
PCIE_MTX_GRX_N7
W46
PCIE_MTX_GRX_N8
W38
PCIE_MTX_GRX_N9
AD39
PCIE_MTX_GRX_N10
AC46
PCIE_MTX_GRX_N11
AC49
PCIE_MTX_GRX_N12
AC42
PCIE_MTX_GRX_N13
AH39
PCIE_MTX_GRX_N14
AE49
PCIE_MTX_GRX_N15
AH44
PCIE_MTX_GRX_P0
M45
PCIE_MTX_GRX_P1
T38
PCIE_MTX_GRX_P2
T46
PCIE_MTX_GRX_P3
N50
PCIE_MTX_GRX_P4
R51
PCIE_MTX_GRX_P5
U43
PCIE_MTX_GRX_P6
W42
PCIE_MTX_GRX_P7
Y47
PCIE_MTX_GRX_P8
Y39
PCIE_MTX_GRX_P9
AC38
PCIE_MTX_GRX_P10
AD47
PCIE_MTX_GRX_P11
AC50
PCIE_MTX_GRX_P12
AD43
PCIE_MTX_GRX_P13
AG39
PCIE_MTX_GRX_P14
AE50
PCIE_MTX_GRX_P15
AH43
PEG_COMP
10mils
1 2
R75 24.9_0402_1%
R75 24.9_0402_1%
Close to U41
C85 0.1U_0402_16V7KPM@C85 0.1U_0402_16V7KPM@
1 2
C87 0.1U_0402_16V7KPM@C87 0.1U_0402_16V7KPM@
1 2
C89 0.1U_0402_16V7KPM@C89 0.1U_0402_16V7KPM@
1 2
C91 0.1U_0402_16V7KPM@C91 0.1U_0402_16V7KPM@
1 2
C93 0.1U_0402_16V7KPM@C93 0.1U_0402_16V7KPM@
1 2
C95 0.1U_0402_16V7KPM@C95 0.1U_0402_16V7KPM@
1 2
C97 0.1U_0402_16V7KPM@C97 0.1U_0402_16V7KPM@
1 2
C99 0.1U_0402_16V7KPM@C99 0.1U_0402_16V7KPM@
1 2
C101 0.1U_0402_16V7KPM@C101 0.1U_0402_16V7KPM@
1 2
C103 0.1U_0402_16V7KPM@C103 0.1U_0402_16V7KPM@
1 2
C105 0.1U_0402_16V7KPM@C105 0.1U_0402_16V7KPM@
1 2
C107 0.1U_0402_16V7KPM@C107 0.1U_0402_16V7KPM@
1 2
C109 0.1U_0402_16V7KPM@C109 0.1U_0402_16V7KPM@
1 2
C111 0.1U_0402_16V7KPM@C111 0.1U_0402_16V7KPM@
1 2
C113 0.1U_0402_16V7KPM@C113 0.1U_0402_16V7KPM@
1 2
C115 0.1U_0402_16V7KPM@C115 0.1U_0402_16V7KPM@
1 2
Close to U41
+1.05VS
C84 0.1U_0402_16V7KPM@C84 0.1U_0402_16V7KPM@
1 2
C86 0.1U_0402_16V7KPM@C86 0.1U_0402_16V7KPM@
1 2
C88 0.1U_0402_16V7KPM@C88 0.1U_0402_16V7KPM@
1 2
C90 0.1U_0402_16V7KPM@C90 0.1U_0402_16V7KPM@
1 2
C92 0.1U_0402_16V7KPM@C92 0.1U_0402_16V7KPM@
1 2
C94 0.1U_0402_16V7KPM@C94 0.1U_0402_16V7KPM@
1 2
C96 0.1U_0402_16V7KPM@C96 0.1U_0402_16V7KPM@
1 2
C98 0.1U_0402_16V7KPM@C98 0.1U_0402_16V7KPM@
1 2
C100 0.1U_0402_16V7KPM@C100 0.1U_0402_16V7KPM@
1 2
C102 0.1U_0402_16V7KPM@C102 0.1U_0402_16V7KPM@
1 2
C104 0.1U_0402_16V7KPM@C104 0.1U_0402_16V7KPM@
1 2
C106 0.1U_0402_16V7KPM@C106 0.1U_0402_16V7KPM@
1 2
C108 0.1U_0402_16V7KPM@C108 0.1U_0402_16V7KPM@
1 2
C110 0.1U_0402_16V7KPM@C110 0.1U_0402_16V7KPM@
1 2
C112 0.1U_0402_16V7KPM@C112 0.1U_0402_16V7KPM@
1 2
C114 0.1U_0402_16V7KPM@C114 0.1U_0402_16V7KPM@
1 2
PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N[0..15] <19> PCIE_MTX_C_GRX_P[0..15] <19>
PCIE_GTX_C_MRX_N[0..15] <19> PCIE_GTX_C_MRX_P[0..15] <19>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2006/08/05 2007/08/05
2006/08/05 2007/08/05
2006/08/05 2007/08/05
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
Crestline(4/7)
Crestline(4/7)
Crestline(4/7)
LA-3481P
LA-3481P
LA-3481P
10 47Tuesday, May 22, 2007
10 47Tuesday, May 22, 2007
10 47Tuesday, May 22, 2007
1
2.0
2.0
2.0
of
of
of
5
U3G
U3G
+1.05VS
D D
+1.8V
C C
+1.05VS
B B
A A
AT35
VCC_1
AT34
VCC_2
AH28
VCC_3
AC32
VCC_4
AC31
VCC_5
AK32
VCC_6
AJ31
VCC_7
AJ28
VCC_8
AH32
VCC_9
AH31
VCC_10
AH29
VCC_11
AF32
VCC_12
VCC CORE
R30
VCC_13
AU32
VCC_SM_1
AU33
VCC_SM_2
AU35
VCC_SM_3
AV33
VCC_SM_4
AW33
VCC_SM_5
AW35
VCC_SM_6
AY35
VCC_SM_7
BA32
VCC_SM_8
BA33
VCC_SM_9
BA35
VCC_SM_10
BB33
VCC_SM_11
BC32
VCC_SM_12
BC33
VCC_SM_13
BC35
VCC_SM_14
BD32
VCC_SM_15
BD35
VCC_SM_16
BE32
VCC_SM_17
BE33
VCC_SM_18
BE35
VCC_SM_19
BF33
VCC_SM_20
BF34
VCC_SM_21
BG32
VCC_SM_22
BG33
VCC_SM_23
BG35
VCC_SM_24
BH32
VCC_SM_25
BH34
VCC_SM_26
BH35
VCC_SM_27
BJ32
VCC_SM_28
BJ33
VCC_SM_29
BJ34
VCC_SM_30
BK32
VCC_SM_31
BK33
VCC_SM_32
BK34
VCC_SM_33
BK35
VCC_SM_34
BL33
VCC_SM_35
AU30
VCC_SM_36
R20
VCC_AXG_1
T14
VCC_AXG_2
W13
VCC_AXG_3
W14
VCC_AXG_4
Y12
VCC_AXG_5
AA20
VCC_AXG_6
AA23
VCC_AXG_7
AA26
VCC_AXG_8
AA28
VCC_AXG_9
AB21
VCC_AXG_10
AB24
VCC_AXG_11
AB29
VCC_AXG_12
AC20
VCC_AXG_13
AC21
VCC_AXG_14
AC23
VCC_AXG_15
AC24
VCC_AXG_16
AC26
VCC_AXG_17
AC28
VCC_AXG_18
AC29
VCC_AXG_19
AD20
VCC_AXG_20
AD23
VCC_AXG_21
AD24
VCC_AXG_22
AD28
VCC_AXG_23
AF21
VCC_AXG_24
AF26
VCC_AXG_25
AA31
VCC_AXG_26
AH20
VCC_AXG_27
AH21
VCC_AXG_28
AH23
VCC_AXG_29
AH24
VCC_AXG_30
AH26
VCC_AXG_31
AD31
VCC_AXG_32
AJ20
VCC_AXG_33
AN14
VCC_AXG_34
CRESTLINE ES_FCBGA1299
CRESTLINE ES_FCBGA1299
PMR3@
PMR3@
5
VCC CORE
POWER
POWER
VCC SMVCC GFX
VCC SMVCC GFX
VCC_AXG_NCTF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8
VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46
VCC GFX NCTFVCC SM LF
VCC GFX NCTFVCC SM LF
VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52 VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55 VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60 VCC_AXG_NCTF_61 VCC_AXG_NCTF_62 VCC_AXG_NCTF_63 VCC_AXG_NCTF_64 VCC_AXG_NCTF_65 VCC_AXG_NCTF_66 VCC_AXG_NCTF_67 VCC_AXG_NCTF_68 VCC_AXG_NCTF_69 VCC_AXG_NCTF_70 VCC_AXG_NCTF_71 VCC_AXG_NCTF_72 VCC_AXG_NCTF_73 VCC_AXG_NCTF_74 VCC_AXG_NCTF_75 VCC_AXG_NCTF_76 VCC_AXG_NCTF_77 VCC_AXG_NCTF_78 VCC_AXG_NCTF_79 VCC_AXG_NCTF_80 VCC_AXG_NCTF_81 VCC_AXG_NCTF_82 VCC_AXG_NCTF_83
VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7
4
4
T17 T18 T19 T21 T22 T23 T25 U15 U16 U17 U19 U20 U21 U23 U26 V16 V17 V19 V20 V21 V23 V24 Y15 Y16 Y17 Y19 Y20 Y21 Y23 Y24 Y26 Y28 Y29 AA16 AA17 AB16 AB19 AC16 AC17 AC19 AD15 AD16 AD17 AF16 AF19 AH15 AH16 AH17 AH19 AJ16 AJ17 AJ19 AK16 AK19 AL16 AL17 AL19 AL20 AL21 AL23 AM15 AM16 AM19 AM20 AM21 AM23 AP15 AP16 AP17 AP19 AP20 AP21 AP23 AP24 AR20 AR21 AR23 AR24 AR26 V26 V28 V29 Y31
AW45 BC39 BE39 BD17 BD4 AW8 AT6
+1.05VS
VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7
C139
C139
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VCC: 1300mA
+1.05VS
(220UF*1, 22UF*1, 0.22UF*1, 0.1UF*1)
1
+
+
C116
C116 220U_D2_2VMR15 @
220U_D2_2VMR15 @
2
22U_0805_6.3V6M
22U_0805_6.3V6M
+1.8V
1
C121
C121
+
+
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
2
22U_0805_6.3V6M
22U_0805_6.3V6M
+1.05VS
1
C125
C125
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
+1.05VS
1
2
C126
C126
+
+
2
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
1 2
1
C140
C140
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
C117
C117
2
VCC_SM: 2400mA (330UF*1, 22UF*2, 0.1UF*1)
1
C122
C122
2
VCC_AXG: 7700mA (330UF*2, 22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2)
1
+
+
2
L71
L71
MBK1608121YZF_0603
MBK1608121YZF_0603
C141
C141
0.22U_0603_16V7K
0.22U_0603_16V7K
Issued Date
Issued Date
Issued Date
C118
C118
0.22U_0603_16V7K
0.22U_0603_16V7K
0.22U_0603_16V7K
0.22U_0603_16V7K
1
C123
C123
22U_0805_6.3V6M
22U_0805_6.3V6M
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C127
C127
1
22U_0805_6.3V6M
22U_0805_6.3V6M
2
+1.05VM_AXM
1
C133
C133 22U_0805_6.3V6M
22U_0805_6.3V6M
2
0.22U_0603_16V7K
0.22U_0603_16V7K
C142
C142
0.22U_0603_16V7K
0.22U_0603_16V7K
C128
C128
VCC_AXM: 540mA (22UF*2, 0.22UF*2, 0.1UF*2)
C134
C134
C143
C143
0.47U_0603_16V4Z
0.47U_0603_16V4Z
1
C119
C119
1
C124
C124
2
1
2
3
C120
C120
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C129
C129
1U_0603_10V4Z
1U_0603_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
C135
C135
0.22U_0603_16V7K
0.22U_0603_16V7K
2006/08/05 2007/08/05
2006/08/05 2007/08/05
2006/08/05 2007/08/05
0.47U_0603_16V4Z
0.47U_0603_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C144
C144
1U_0603_10V4Z
1U_0603_10V4Z
C130
C130
C136
C136
C131
C131
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C137
C137
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C145
C145 1U_0603_10V4Z
1U_0603_10V4Z
Compal Secret Data
Compal Secret Data
Compal Secret Data
C132
C132
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C138
C138
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Deciphered Date
Deciphered Date
Deciphered Date
2
U3F
U3F
+1.05VS
1
2
+1.05VM_AXM
1
2
2
AB33
VCC_NCTF_1
AB36
VCC_NCTF_2
AB37
VCC_NCTF_3
AC33
VCC_NCTF_4
AC35
VCC_NCTF_5
AC36
VCC_NCTF_6
AD35
VCC_NCTF_7
AD36
VCC_NCTF_8
AF33
VCC_NCTF_9
AF36
VCC_NCTF_10
AH33
VCC_NCTF_11
AH35
VCC_NCTF_12
AH36
VCC_NCTF_13
AH37
VCC_NCTF_14
AJ33
VCC_NCTF_15
AJ35
VCC_NCTF_16
AK33
VCC_NCTF_17
AK35
VCC_NCTF_18
AK36
VCC_NCTF_19
AK37
VCC_NCTF_20
AD33
VCC_NCTF_21
AJ36
VCC_NCTF_22
AM35
VCC_NCTF_23
AL33
VCC_NCTF_24
AL35
VCC_NCTF_25
AA33
VCC_NCTF_26
AA35
VCC_NCTF_27
AA36
VCC_NCTF_28
AP35
VCC_NCTF_29
AP36
VCC_NCTF_30
AR35
VCC_NCTF_31
AR36
VCC_NCTF_32
Y32
VCC_NCTF_33
Y33
VCC_NCTF_34
Y35
VCC_NCTF_35
Y36
VCC_NCTF_36
Y37
VCC_NCTF_37
T30
VCC_NCTF_38
T34
VCC_NCTF_39
T35
VCC_NCTF_40
U29
VCC_NCTF_41
U31
VCC_NCTF_42
U32
VCC_NCTF_43
U33
VCC_NCTF_44
U35
VCC_NCTF_45
U36
VCC_NCTF_46
V32
VCC_NCTF_47
V33
VCC_NCTF_48
V36
VCC_NCTF_49
V37
VCC_NCTF_50
AL24
VCC_AXM_NCTF_1
AL26
VCC_AXM_NCTF_2
AL28
VCC_AXM_NCTF_3
AM26
VCC_AXM_NCTF_4
AM28
VCC_AXM_NCTF_5
AM29
VCC_AXM_NCTF_6
AM31
VCC_AXM_NCTF_7
AM32
VCC_AXM_NCTF_8
AM33
VCC_AXM_NCTF_9
AP29
VCC_AXM_NCTF_10
AP31
VCC_AXM_NCTF_11
AP32
VCC_AXM_NCTF_12
AP33
VCC_AXM_NCTF_13
AL29
VCC_AXM_NCTF_14
AL31
VCC_AXM_NCTF_15
AL32
VCC_AXM_NCTF_16
AR31
VCC_AXM_NCTF_17
AR32
VCC_AXM_NCTF_18
AR33
VCC_AXM_NCTF_19
CRESTLINE ES_FCBGA1299
CRESTLINE ES_FCBGA1299
PMR3@
PMR3@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8
VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21
VSS_SCB1 VSS_SCB2 VSS_SCB3 VSS_SCB4 VSS_SCB5 VSS_SCB6
POWER
POWER
VCC_AXM_1 VCC_AXM_2 VCC_AXM_3 VCC_AXM_4 VCC_AXM_6 VCC_AXM_5 VCC_AXM_7
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Crestline (5/7)
Crestline (5/7)
Crestline (5/7)
LA-3481P
LA-3481P
LA-3481P
1
T27 T37 U24 U28 V31 V35 AA19 AB17 AB35 AD19 AD37 AF17 AF35 AK17 AM17 AM24 AP26 AP28 AR15 AR19 AR28
A3 B2 C1 BL1 BL51 A51
AT33 AT31 AK29 AK24 AK23 AJ26 AJ23
1
+1.05VM_AXM
11 47Tuesday, May 22, 2007
11 47Tuesday, May 22, 2007
11 47Tuesday, May 22, 2007
2.0
2.0
2.0
of
of
of
5
+1.25VS_DPLLA +1.25VS_DPLLB
+1.25VS
D D
+1.25VS
VCCA_HPLL: 50mA (22UF*1, 0.1UF*1)
+3VS
+1.25VS
C C
+1.25VS
+1.25VS
B B
GM@L60
GM@
+3VS
MBK1608121YZF_0603
MBK1608121YZF_0603
+1.5VS +1.5VS_C
A A
1 2
L1 MBK1608121YZF_0603L1 MBK1608121YZF_0603
VCCA_DPLLA: 80mA (470UF*1, 0.1UF*1)
L5
1 2
MBK1608121YZF_0603 L5MBK1608121YZF_0603
L58
GM@ L58
GM@
4.7_0603_5%
4.7_0603_5% C742
C742
0.1U_0402_16V4Z
0.1U_0402_16V4Z
GM@
GM@
L10
L10
1 2
MBK1608121YZF_0603
MBK1608121YZF_0603
1_0402_5%
1_0402_5%
L74
L74
1 2
MBK1608121YZF_0603
MBK1608121YZF_0603
L75
L75
1 2
MBK1608121YZF_0603
MBK1608121YZF_0603 22U_0805_6.3V6M
22U_0805_6.3V6M
L60
1 2
C945
C945
@
@
+1.8V
GM@
GM@
C758
C758
10U_0805_10V4Z
10U_0805_10V4Z
1
+
+
2
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
C760
C760
C947
C947
GM@
GM@
1
0.022U_0402_16V7K
0.022U_0402_16V7K
2
R100
R100
C174
C174
1
C750
C750
2
1
GM@ C756
GM@
2
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+VCCD_LVDS
1
C761
C761
2
10U_0805_10V4Z
10U_0805_10V4Z
1
C147
C147
2
10U_0805_10V4Z
10U_0805_10V4Z
+1.25VM_HPLL
1
C163
C163
22U_0805_6.3V6M
22U_0805_6.3V6M
2
+3VS_DACBG
R686
C741
C741
GM@
GM@
1 2
+1.25VS_A_PEGPLL
1
2
10U_0805_10V4Z
10U_0805_10V4Z
C752
C752
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C756
GM@ C754
GM@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
GM@
GM@
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
5
+1.25VS
1
C148
C148
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+1.25VS
1
C164
C164
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
L59
L59
+3VS
MBK1608121YZF_0603
MBK1608121YZF_0603
GM@
GM@
PM@R686
PM@
0_0402_5%
0_0402_5%
1
C173
C173
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C748
C748 22U_0805_6.3V6M
22U_0805_6.3V6M
+1.25VM_A_SM_CK
C749
C749
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+3VS_A_TVDAC
C757
GM@C757
GM@
C754
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.022U_0402_16V7K
0.022U_0402_16V7K
GM@
GM@
1
C948
C948
C946
C946
2
10U_0805_10V4Z
10U_0805_10V4Z
+1.5VS
1 2
L3 MBK1608121YZF_0603L3 MBK1608121YZF_0603
VCCA_DPLLB: 80mA (470UF*1, 0.1UF*1)
L7
1 2
MBK1608121YZF_0603 L7MBK1608121YZF_0603
R99
R99
0.5_0603_1%
+3VS_CRTDAC
1
C744
2
R690
@R690
@
1 2
C745
C745
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
C759
GM@ C753
GM@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C954
C954
@
@
C201
C201
GM@
GM@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.5_0603_1%
GM@
GM@
C743
C743
0.022U_0402_16V7K
0.022U_0402_16V7K
+3VS_A_TVDAC
C753
1
+
+
2
1
GM@ C202
GM@
2
VCCA_MPLL: 150mA (10UF*1, 0.1UF*1)
1 2
GM@ C744
GM@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.25VS_DPLLA +1.25VS_DPLLB
0_0402_5%
0_0402_5%
1
2
1
C751
C751
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
GM@ C759
GM@
2
0.022U_0402_16V7K
0.022U_0402_16V7K
+1.25VS
0.022U_0402_16V7K
0.022U_0402_16V7K
L15
GM@ L15
GM@
100_0603_5%
100_0603_5%
4
1
C156
C156
2
10U_0805_10V4Z
10U_0805_10V4Z
+1.25VM_MPLL
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C172
C172
2
10U_0805_10V4Z
10U_0805_10V4Z
R687
1 2
0_0402_5%
0_0402_5%
R691
@R691
@
0_0402_5%
0_0402_5%
1 2
+1.25VM_A_SM
C746
C746
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
R692
PM@ R692
PM@
0_0402_5%
0_0402_5%
2
VCCA_HPLL: 250mA(0.1UF*1)
0.1U_0402_16V4Z
0.1U_0402_16V4Z
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
+1.5VS_QDAC
C202
0.022U_0402_16V7K
0.022U_0402_16V7K
4
1
+3VS
C157
C157
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
VCC_SYNC: 10mA (0.1UF*1)
+3VS_CRTDAC
C170
C170
PM@R687
PM@
1 2
1
2
+3VS
PM@ R694
PM@
VCCA_CRT_DAC: 80mA (0.1UF*1, 0.022UF*1)
+1.8V_TX_LVDS
VCCA_TV_DAC: 40mA (0.1UF*1, 0.022UF*1 for each DAC)
C197
C197
+VCCD_LVDS
VCCD_LVDS: 150mA (10UF*1, 0.1UF*1)
R694
0_0402_5%
0_0402_5%
+3VS_DACBG
VCCA_DAC_BG: 5mA (0.1UF*1, 0.022UF*1)
1
C162
C162 1000P_0402_50V7K
1000P_0402_50V7K
2
C165
C165
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.25VS_A_PEGPLL
+1.25VM_A_SM
VCCA_SM (22UF*2, 4.7UF*1, 1UF*1)
VCCA_SM_CK (22UF*1, 1UF*2, 0.1UF*1)
+1.25VM_A_SM_CK
+1.5VS
+1.5VS_QDAC
1
VCCA_PEG_PLL: 100mA (0.1UF*1)
2
GM@ R695
GM@
0_0402_5%
0_0402_5%
1 2
3
1
C146
C146
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+1.25VS_DPLLA +1.25VS_DPLLB +1.25VM_HPLL +1.25VM_MPLL
1 2
R688
GM@ R688
GM@
R695
R689
PM@R689
0_0402_5%
0_0402_5%
VCCA_LVDS: 10mA (0.1UF*1)
VCCA_PEG_BG: 5mA (0.1UF*1)
VCCA_PEG_PLL: 100mA (0.1UF*1)
R693 0_0402_5%PM@ R693 0_0402_5%PM@ R216 0_0402_5%GM@ R216 0_0402_5%GM@
VCCD_TVDAC: 60mA (0.1UF*1, 0.022UF*1)
VCCD_QDAC: 5mA (0.1UF*1, 0.022UF*1)
+1.25VS_A_PEGPLL
1 2
PM@
0_0402_5%
0_0402_5%
1 2
+1.5VS_C
C198
C198
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
PM@ R696
PM@
0_0402_5%
0_0402_5%
1 2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R696
A33 B33
A30 B32
B49 H49 AL2
AM2
A41 B41
K50 K49
U51
AW18
AV19 AU19 AU18 AU17 AT22 AT21 AT19 AT18 AT17 AR17 AR16
BC29 BB29
C25 B25 C27 B27 B28 A28
M32
N28
AN2
U48
H42
J32
L29
J41
U3H
U3H
VCCSYNC VCCA_CRT_DAC_1
VCCA_CRT_DAC_2
VCCA_DAC_BG VSSA_DAC_BG
VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL
VCCA_LVDS VSSA_LVDS
VCCA_PEG_BG VSSA_PEG_BG
VCCA_PEG_PLL
POWER
POWER
VCCA_SM_1 VCCA_SM_2 VCCA_SM_3 VCCA_SM_4 VCCA_SM_5 VCCA_SM_7 VCCA_SM_8 VCCA_SM_9 VCCA_SM_10 VCCA_SM_11 VCCA_SM_NCTF_1 VCCA_SM_NCTF_2
VCCA_SM_CK_1 VCCA_SM_CK_2
VCCA_TVA_DAC_1 VCCA_TVA_DAC_2 VCCA_TVB_DAC_1 VCCA_TVB_DAC_2 VCCA_TVC_DAC_1 VCCA_TVC_DAC_2
VCCD_CRT VCCD_TVDAC
VCCD_QDAC
VCCD_HPLL VCCD_PEG_PLL
VCCD_LVDS_1 VCCD_LVDS_2
CRESTLINE ES_FCBGA1299
CRESTLINE ES_FCBGA1299
PMR3@
PMR3@
2006/08/05 2007/08/05
2006/08/05 2007/08/05
2006/08/05 2007/08/05
3
CRTPLLLVDSPEGSM
CRTPLLLVDSPEGSM
VTT
VTT
VCC_AXD_1 VCC_AXD_2 VCC_AXD_3 VCC_AXD_4 VCC_AXD_5 VCC_AXD_6
AXD
AXD
VCC_AXD_NCTF
VCC_AXF_1 VCC_AXF_2 VCC_AXF_3
AXF
AXF
VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4
CLK
CLK
VCC_TX_LVDS
VCC_PEG_1 VCC_PEG_2
TV
TV
VCC_PEG_3 VCC_PEG_4
PEG
PEG
VCC_PEG_5
VCC_RXR_DMI_1 VCC_RXR_DMI_2
DMI
DMI
VTTLF
VTTLF
LVDS TV/CRT
LVDS TV/CRT
Compal Secret Data
Compal Secret Data
Compal Secret Data
VCC_HV_1 VCC_HV_2
U13
VTT_1
U12
VTT_2
U11
VTT_3
U9
VTT_4
U8
VTT_5
U7
VTT_6
U5
VTT_7
U3
VTT_8
U2
VTT_9
U1
VTT_10
T13
VTT_11
T11
VTT_12
T10
VTT_13
T9
VTT_14
T7
VTT_15
T6
VTT_16
T5
VTT_17
T3
VTT_18
T2
VTT_19
R3
VTT_20
R2
VTT_21
R1
VTT_22
AT23 AU28 AU24 AT29 AT25 AT30
AR29
B23 B21 A21
AJ50
VCC_DMI
VCC_DMI: 100mA (0.1UF*1)
BK24 BK23 BJ24 BJ23
VCC_SM_CK: 200mA (22UF*1, 0.1UF*1)
A43
C151
C151 220U_D2_2VMR15
220U_D2_2VMR15
+1.8V_TX_LVDS: 100mA (220UF*1, 1000PF*1)
C40 B40
VCC_HV: 100mA
AD51 W50 W51 V49 V50
+1.25VS_DMI: 100mA (220UF*1, 10UF*1)
AH50 AH51
VTTLF_CAP1
A7
VTTLF1 VTTLF2 VTTLF3
VTTLF_CAP2
F2
VTTLF_CAP3
AH1
0.47U_0402_10V4Z~D
0.47U_0402_10V4Z~D
Deciphered Date
Deciphered Date
Deciphered Date
C203
C203
C204
C204
0.47U_0402_10V4Z~D
0.47U_0402_10V4Z~D
+1.05VS
VCC_AXD: 200mA (22UF*1, 1UF*1)
VCC_AXF: 350mA (10UF*1, 1UF*1)
2
VTT: 850mA (220UF*1, 4.7UF*21, 2.2UF*1, 0.47UF*1)
1
+
+
C152
C152
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C205
C205
0.47U_0402_10V4Z~D
0.47U_0402_10V4Z~D
2
C153
C153
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
+1.25VM_AXD
+1.25VS_AXF
+1.25VS
1
C171
C171
2
+1.8V_SM_CK
+1.8V_TX_LVDS
+3VS_HV
1
C206
C206
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+1.25VS_PEG_DMI
1
+
+
C193
C193 220U_D2_2VMR15
220U_D2_2VMR15
2
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
C194
C194
+1.25VS_PEG_DMI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1
C155
C154
C154
C166
C166 22U_0805_6.3V6M
22U_0805_6.3V6M
C181
C181 22U_0805_6.3V6M
22U_0805_6.3V6M
+1.8V_TX_LVDS
C186
C186
GM@
GM@
+1.25VS_PEG: 1200mA (220UF*1, 10UF*1)
1
2
10U_0805_10V4Z
10U_0805_10V4Z
+3VS_HV +3VS
C155
0.47U_0402_10V4Z~D
0.47U_0402_10V4Z~D
+1.25VM_AXD
1
C167
C167
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+1.25VS_AXF
1
C169
C169
C168
C168
2
10U_0805_10V4Z
10U_0805_10V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+1.8V_SM_CK
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
1000P_0402_50V7K
1000P_0402_50V7K
L12
L12
1 2
KC FBM-L11-201209-221LMAT_0805
KC FBM-L11-201209-221LMAT_0805
R721
R721
12
0_0402_5%
0_0402_5%
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Crestline (6/7)
Crestline (6/7)
Crestline (6/7)
LA-3481P
LA-3481P
LA-3481P
L72
L72
1 2
MBK1608121YZF_0603
MBK1608121YZF_0603
L73
L73
1 2
MBK1608121YZF_0603
MBK1608121YZF_0603
1
C180
C180
R102
R102
2
1_0402_5%
1_0402_5%
C898
C898 220U_D2_2VMR15
220U_D2_2VMR15
GM@
GM@
R722
R722
10_0402_5%
10_0402_5%
1
+
+
2
12
1
+1.05VS
+1.25VS
+1.25VS
1 2
L9
L9 MBK1608121YZF_0603
MBK1608121YZF_0603
1 2
L61
L61 MBK1608121YZF_0603
MBK1608121YZF_0603
21
C182
C182
1 2
10U_0805_10V4Z
10U_0805_10V4Z
+1.05VS
D50
D50 RB751V_SOD323
RB751V_SOD323
of
12 47Saturday, June 23, 2007
of
12 47Saturday, June 23, 2007
of
12 47Saturday, June 23, 2007
+1.8V
+1.8V
2.0
2.0
2.0
5
U3I
U3I
A13
VSS_1
A15
VSS_2
A17
VSS_3
A24
VSS_4
AA21
VSS_5
AA24
VSS_6
AA29
VSS_7
AB20
VSS_8
AB23
VSS_9
AB26
VSS_10
D D
C C
B B
A A
AB28
VSS_11
AB31
VSS_12
AC10
VSS_13
AC13
VSS_14
AC3
VSS_15
AC39
VSS_16
AC43
VSS_17
AC47
VSS_18
AD1
VSS_19
AD21
VSS_20
AD26
VSS_21
AD29
VSS_22
AD3
VSS_23
AD41
VSS_24
AD45
VSS_25
AD49
VSS_26
AD5
VSS_27
AD50
VSS_28
AD8
VSS_29
AE10
VSS_30
AE14
VSS_31
AE6
VSS_32
AF20
VSS_33
AF23
VSS_34
AF24
VSS_35
AF31
VSS_36
AG2
VSS_37
AG38
VSS_38
AG43
VSS_39
AG47
VSS_40
AG50
VSS_41
AH3
VSS_42
AH40
VSS_43
AH41
VSS_44
AH7
VSS_45
AH9
VSS_46
AJ11
VSS_47
AJ13
VSS_48
AJ21
VSS_49
AJ24
VSS_50
AJ29
VSS_51
AJ32
VSS_52
AJ43
VSS_53
AJ45
VSS_54
AJ49
VSS_55
AK20
VSS_56
AK21
VSS_57
AK26
VSS_58
AK28
VSS_59
AK31
VSS_60
AK51
VSS_61
AL1
VSS_62
AM11
VSS_63
AM13
VSS_64
AM3
VSS_65
AM4
VSS_66
AM41
VSS_67
AM45
VSS_68
AN1
VSS_69
AN38
VSS_70
AN39
VSS_71
AN43
VSS_72
AN5
VSS_73
AN7
VSS_74
AP4
VSS_75
AP48
VSS_76
AP50
VSS_77
AR11
VSS_78
AR2
VSS_79
AR39
VSS_80
AR44
VSS_81
AR47
VSS_82
AR7
VSS_83
AT10
VSS_84
AT14
VSS_85
AT41
VSS_86
AT49
VSS_87
AU1
VSS_88
AU23
VSS_89
AU29
VSS_90
AU3
VSS_91
AU36
VSS_92
AU49
VSS_93
AU51
VSS_94
AV39
VSS_95
AV48
VSS_96
AW1
VSS_97
AW12
VSS_98
AW16
VSS_99
CRESTLINE ES_FCBGA1299
CRESTLINE ES_FCBGA1299
PMR3@
PMR3@
5
VSS
VSS
VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198
AW24 AW29 AW32 AW5 AW7 AY10 AY24 AY37 AY42 AY43 AY45 AY47 AY50 B10 B20 B24 B29 B30 B35 B38 B43 B46 B5 B8 BA1 BA17 BA18 BA2 BA24 BB12 BB25 BB40 BB44 BB49 BB8 BC16 BC24 BC25 BC36 BC40 BC51 BD13 BD2 BD28 BD45 BD48 BD5 BE1 BE19 BE23 BE30 BE42 BE51 BE8 BF12 BF16 BF36 BG19 BG2 BG24 BG29 BG39 BG48 BG5 BG51 BH17 BH30 BH44 BH46 BH8 BJ11 BJ13 BJ38 BJ4 BJ42 BJ46 BK15 BK17 BK25 BK29 BK36 BK40 BK44 BK6 BK8 BL11 BL13 BL19 BL22 BL37 BL47 C12 C16 C19 C28 C29 C33 C36 C41
4
U3J
U3J
C46
VSS_199
C50
VSS_200
C7
VSS_201
D13
VSS_202
D24
VSS_203
D3
VSS_204
D32
VSS_205
D39
VSS_206
D45
VSS_207
D49
VSS_208
E10
VSS_209
E16
VSS_210
E24
VSS_211
E28
VSS_212
E32
VSS_213
E47
VSS_214
F19
VSS_215
F36
VSS_216
F4
VSS_217
F40
VSS_218
F50
VSS_219
G1
VSS_220
G13
VSS_221
G16
VSS_222
G19
VSS_223
G24
VSS_224
G28
VSS_225
G29
VSS_226
G33
VSS_227
G42
VSS_228
G45
VSS_229
G48
VSS_230
G8
VSS_231
H24
VSS_232
H28
VSS_233
H4
VSS_234
H45
VSS_235
J11
VSS_236
J16
VSS_237
J2
VSS_238
J24
VSS_239
J28
VSS_240
J33
VSS_241
J35
VSS_242
J39
VSS_243
K12
VSS_245
K47
VSS_246
K8
VSS_247
L1
VSS_248
L17
VSS_249
L20
VSS_250
L24
VSS_251
L28
VSS_252
L3
VSS_253
L33
VSS_254
L49
VSS_255
M28
VSS_256
M42
VSS_257
M46
VSS_258
M49
VSS_259
M5
VSS_260
M50
VSS_261
M9
VSS_262
N11
VSS_263
N14
VSS_264
N17
VSS_265
N29
VSS_266
N32
VSS_267
N36
VSS_268
N39
VSS_269
N44
VSS_270
N49
VSS_271
N7
VSS_272
P19
VSS_273
P2
VSS_274
P23
VSS_275
P3
VSS_276
P50
VSS_277
R49
VSS_278
T39
VSS_279
T43
VSS_280
T47
VSS_281
U41
VSS_282
U45
VSS_283
U50
VSS_284
V2
VSS_285
V3
VSS_286
CRESTLINE ES_FCBGA1299
CRESTLINE ES_FCBGA1299
PMR3@
PMR3@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
W11
VSS_287
W39
VSS_288
W43
VSS_289
W47
VSS_290
W5
VSS_291
W7
VSS_292
Y13
VSS_293
Y2
VSS_294
Y41
VSS_295
Y45
VSS_296
Y49
VSS_297
Y5
VSS_298
Y50
VSS_299
Y11
VSS_300
P29
VSS_301
T29
VSS_302
T31
VSS_303
T33
VSS_304
R28
VSS_305
AA32
VSS_306
AB32
VSS_307
AD32
VSS_308
AF28
VSS_309
AF29
VSS_310
AT27
VSS_311
AV25
VSS_312
H50
VSS_313
VSS
VSS
Compal Secret Data
Compal Secret Data
2006/08/05 2007/08/05
2006/08/05 2007/08/05
2006/08/05 2007/08/05
3
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
Crestline (7/7)
Crestline (7/7)
Crestline (7/7)
LA-3481P
LA-3481P
LA-3481P
1
2.0
2.0
2.0
of
13 47Tuesday, May 22, 2007
of
13 47Tuesday, May 22, 2007
of
13 47Tuesday, May 22, 2007
1
5
+DIMM_VREF
DDRA_SDQ4 DDRA_SDQ0 DDRA_SDQ1
DDRA_SDQS0#<9> DDRA_SDQS0<9>
D D
DDRA_SDQS1#<9> DDRA_SDQS1<9>
DDRA_SDQS2#<9> DDRA_SDQS2<9>
DDRA_CKE0<8>
C C
DDRA_SBS2#<9>
DDRA_SBS0#<9> DDRA_SWE#<9>
DDRA_SCAS#<9> DDRA_SCS1#<8>
DDRA_ODT1<8>
DDRA_SDQS4#<9> DDRA_SDQS4<9>
B B
DDRA_SDQS6#<9> DDRA_SDQS6<9>
DDR_SMBDATA<15,16> DDR_SMBCLK<15,16>
A A
DDRA_SDQS0# DDRA_SDQS0
DDRA_SDQ2 DDRA_SDQ3
DDRA_SDQ8 DDRA_SDQ14
DDRA_SDQS1# DDRA_SDQS1
DDRA_SDQ9 DDRA_SDQ15
DDRA_SDQ16 DDRA_SDQ17
DDRA_SDQS2# DDRA_SDQS2
DDRA_SDQ18 DDRA_SDQ19
DDRA_SDQ29 DDRA_SDQ24 DDRA_SDQ25
DDRA_SDM3
DDRA_SDQ26 DDRA_SDQ27
DDRA_SBS2# DDRA_SMA12
DDRA_SMA9 DDRA_SMA8
DDRA_SMA5 DDRA_SMA3 DDRA_SMA1
DDRA_SMA10 DDRA_SBS0# DDRA_SWE#
DDRA_SCAS# DDRA_SCS1#
DDRA_ODT1 DDRA_SDQ37
DDRA_SDQ36 DDRA_SDQS4#
DDRA_SDQS4 DDRA_SDQ35
DDRA_SDQ32 DDRA_SDQ40
DDRA_SDQ44 DDRA_SDM5 DDRA_SDQ41
DDRA_SDQ46 DDRA_SDQ49
DDRA_SDQ48
DDRA_SDQS6# DDRA_SDQS6
DDRA_SDQ54 DDRA_SDQ50
DDRA_SDQ61 DDRA_SDM7 DDRA_SDQ59
DDRA_SDQ58 DDR_SMBDATA
DDR_SMBCLK
+3VS
+1.8V +1.8V
JP3
JP3
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
P-TWO_A5692B-A0G16-P
P-TWO_A5692B-A0G16-P
DQ4 DQ5 VSS DM0 VSS DQ6 DQ7
VSS DQ12 DQ13
VSS
DM1
VSS
CK0
CK0#
VSS DQ14 DQ15
VSS
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
NC/CKE1
VDD
NC/A15 NC/A14
VDD
VDD
VDD
RAS#
VDD ODT0
NC/A13
VDD
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
CK1
CK1#
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
SAO
VSS
A11
BA1 S0#
SA1
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50
NC
52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92
A7
94
A6
96 98
A4
100
A2
102
A0
104 106 108 110 112 114 116 118 120
NC
122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DIMM0 STD H:9.2mm (BOT)
DDRA_SDQ6
DDRA_SDM0 DDRA_SDQ5
DDRA_SDQ7 DDRA_SDQ13
DDRA_SDQ12 DDRA_SDM1
DDRA_SDQ11 DDRA_SDQ10
DDRA_SDQ20 DDRA_SDQ21
DDRA_SDM2 DDRA_SDQ23
DDRA_SDQ22 DDRA_SDQ28
DDRA_SDQS3# DDRA_SDQS3
DDRA_SDQ31 DDRA_SDQ30
DDRA_CKE1DDRA_CKE0
DDRA_SMA14 DDRA_SMA11
DDRA_SMA7 DDRA_SMA6
DDRA_SMA4 DDRA_SMA2 DDRA_SMA0
DDRA_SBS1# DDRA_SRAS# DDRA_SCS0#
DDRA_ODT0 DDRA_SMA13
DDRA_SDQ39 DDRA_SDQ38
DDRA_SDM4 DDRA_SDQ34
DDRA_SDQ33 DDRA_SDQ45
DDRA_SDQ43 DDRA_SDQS5#
DDRA_SDQS5 DDRA_SDQ47
DDRA_SDQ42 DDRA_SDQ52
DDRA_SDQ53
DDRA_SDM6 DDRA_SDQ51
DDRA_SDQ55 DDRA_SDQ57DDRA_SDQ60
DDRA_SDQ56 DDRA_SDQS7#
DDRA_SDQS7 DDRA_SDQ62
DDRA_SDQ63
R108 10K_0402_5% R108 10K_0402_5%
1 2
R109 10K_0402_5% R109 10K_0402_5%
1 2
4
DDRA_CLK0 <8> DDRA_CLK0# <8>
0_0402_5%
0_0402_5%
R107
R107
1 2
DDRA_CKE1 <8>
DDRA_SBS1# <9> DDRA_SRAS# <9> DDRA_SCS0# <8>
DDRA_ODT0 <8>
DDRA_CLK1 <8> DDRA_CLK1# <8>
DDRA_SDQS3# <9> DDRA_SDQS3 <9>
DDRA_SDQS5# <9> DDRA_SDQS5 <9>
DDRA_SDQS7# <9> DDRA_SDQS7 <9>
PM_EXTTS#0 <8>
+DIMM_VREF
3
1
C209
C209
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
DDRA_SMA[0..14]<8,9> DDRA_SDQ[0..63]<9>
DDRA_SDM[0..7]<9>
DDRA_SBS2# DDRA_CKE0
DDRA_SMA9 DDRA_SMA12
DDRA_SMA5 DDRA_SMA8
DDRA_SMA1 DDRA_SMA3
DDRA_SBS0# DDRA_SMA10
DDRA_SCAS# DDRA_SWE#
DDRA_ODT1 DDRA_SCS1#
DDRA_CKE1 DDRA_SMA11
DDRA_SMA7 DDRA_SMA6
DDRA_SMA4 DDRA_SMA2
DDRA_SMA0 DDRA_SBS1#
DDRA_SRAS# DDRA_SCS0#
DDRA_ODT0 DDRA_SMA13
DDRA_SMA14
20mils
C210
C210
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
DDRA_SMA[0..14] DDRA_SDQ[0..63] DDRA_SDM[0..7]
1 4 2 3
RP1 56_0404_4P2R_5%
RP1 56_0404_4P2R_5%
1 4 2 3
RP2 56_0404_4P2R_5%
RP2 56_0404_4P2R_5%
RP3 56_0404_4P2R_5%
RP3 56_0404_4P2R_5%
RP4 56_0404_4P2R_5%
RP4 56_0404_4P2R_5%
RP5 56_0404_4P2R_5%
RP5 56_0404_4P2R_5%
RP6 56_0404_4P2R_5%
RP6 56_0404_4P2R_5%
RP7 56_0404_4P2R_5%
RP7 56_0404_4P2R_5%
RP8 56_0404_4P2R_5%
RP8 56_0404_4P2R_5%
RP9 56_0404_4P2R_5%
RP9 56_0404_4P2R_5%
RP10 56_0404_4P2R_5%
RP10 56_0404_4P2R_5%
RP11 56_0404_4P2R_5%
RP11 56_0404_4P2R_5%
RP12 56_0404_4P2R_5%
RP12 56_0404_4P2R_5%
RP13 56_0404_4P2R_5%
RP13 56_0404_4P2R_5%
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
1 4 2 3
R647
R647
1 2
56_0402_5%
56_0402_5%
+1.8V
12
12
R105
R105 1K_0402_1%
1K_0402_1%
R106
R106 1K_0402_1%
1K_0402_1%
+0.9VS
C729
C729
C211
C211
2
+1.8V
1
+
+
2
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
+1.8V
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
+0.9VS
1
C220
C220
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+0.9VS
1
C225
C225
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+0.9VS
1
C230
C230
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C727
C727
C212
C212
1
2
1
2
1
2
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
C221
C221
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C226
C226
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C231
C231
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C730
C730
2
C213
C213
1
C222
C222
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C227
C227
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C232
C232
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C728
C728
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C214
C214
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
1
2
1
2
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
C223
C223
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C228
C228
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C215
C215
1
C224
C224
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C229
C229
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C731
C731
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/08/05 2007/08/05
2006/08/05 2007/08/05
2006/08/05 2007/08/05
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
DDRII-SODIMM0
DDRII-SODIMM0
DDRII-SODIMM0
LA-3481P
LA-3481P
LA-3481P
14 47Tuesday, May 22, 2007
14 47Tuesday, May 22, 2007
14 47Tuesday, May 22, 2007
1
2.0
2.0
2.0
of
of
of
A
JP4
JP4
+DIMM_VREF
DDRB_SDQ0 DDRB_SDQ1
DDRB_SDQS0#<9> DDRB_SDQS0<9>
1 1
DDRB_SDQS1#<9> DDRB_SDQS1<9>
DDRB_SDQS2#<9> DDRB_SDQS2<9>
DDRB_CKE0<8>
2 2
DDRB_SBS2#<9>
DDRB_SBS0#<9> DDRB_SWE#<9>
DDRB_SCAS#<9> DDRB_SCS1#<8>
DDRB_ODT1<8>
DDRB_SDQS4#<9> DDRB_SDQS4<9>
3 3
DDRB_SDQS6#<9> DDRB_SDQS6<9>
DDR_SMBDATA<14,16> DDR_SMBCLK<14,16>
4 4
DDRB_SDQS0# DDRB_SDQS0
DDRB_SDQ2 DDRB_SDQ3
DDRB_SDQ8 DDRB_SDQ9
DDRB_SDQS1# DDRB_SDQS1
DDRB_SDQ10 DDRB_SDQ11
DDRB_SDQ17
DDRB_SDQS2# DDRB_SDQS2
DDRB_SDQ18 DDRB_SDQ19
DDRB_SDQ28 DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ30 DDRB_SDQ29 DDRB_SDQ31
DDRB_CKE0
DDRB_SBS2# DDRB_SMA12
DDRB_SMA9 DDRB_SMA8
DDRB_SMA5 DDRB_SMA3 DDRB_SMA1
DDRB_SMA10 DDRB_SBS0# DDRB_SWE#
DDRB_SCAS# DDRB_SCS1#
DDRB_ODT1 DDRB_SDQ32
DDRB_SDQ33 DDRB_SDQS4#
DDRB_SDQS4 DDRB_SDQ34
DDRB_SDQ35 DDRB_SDQ40
DDRB_SDQ41 DDRB_SDM5 DDRB_SDQ42
DDRB_SDQ43 DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQS6# DDRB_SDQS6
DDRB_SDQ51 DDRB_SDQ50
DDRB_SDQ56
DDRB_SDM7 DDRB_SDQ59
DDRB_SDQ58 DDR_SMBDATA
DDR_SMBCLK
+3VS
DIMM1 STD H:5.2mm (BOT)
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
PTI_A5652D-A0G16-P
PTI_A5652D-A0G16-P
NC/CKE1
NC/A15 NC/A14
NC/A13
VSS DQ4 DQ5
VSS DM0
VSS DQ6 DQ7
VSS
DQ12 DQ13
VSS DM1
VSS
CK0
CK0#
VSS
DQ14 DQ15
VSS
VSS
DQ20 DQ21
VSS DM2
VSS
DQ22 DQ23
VSS
DQ28 DQ29
VSS
DQS3#
DQS3
VSS
DQ30 DQ31
VSS VDD
VDD
VDD
VDD
BA1
RAS#
VDD
ODT0
VDD
VSS
DQ36 DQ37
VSS DM4
VSS
DQ38 DQ39
VSS
DQ44 DQ45
VSS
DQS5#
DQS5
VSS
DQ46 DQ47
VSS
DQ52 DQ53
VSS
CK1
CK1#
VSS DM6
VSS
DQ54 DQ55
VSS
DQ60 DQ61
VSS
DQS7#
DQS7
VSS
DQ62 DQ63
VSS SAO
SA1
+1.8V+1.8V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50
NC
52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90
A11
92
A7
94
A6
96 98
A4
100
A2
102
A0
104 106 108 110
S0#
112 114 116 118 120
NC
122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
B
DDRB_SDQ5 DDRB_SDQ4
DDRB_SDM0 DDRB_SDQ6
DDRB_SDQ7 DDRB_SDQ12
DDRB_SDQ13 DDRB_SDM1
DDRB_SDQ14 DDRB_SDQ15
DDRB_SDQ21 DDRB_SDQ16DDRB_SDQ20
R110
R110
DDRB_SDM2 DDRB_SDQ22
DDRB_SDQ23 DDRB_SDQ26
DDRB_SDQ24 DDRB_SDQS3#
DDRB_SDQS3
DDRB_SDQ27 DDRB_CKE1
DDRB_SMA14 DDRB_SMA11
DDRB_SMA7 DDRB_SMA6
DDRB_SMA4 DDRB_SMA2 DDRB_SMA0
DDRB_SBS1# DDRB_SRAS# DDRB_SCS0#
DDRB_ODT0 DDRB_SMA13
DDRB_SDQ36 DDRB_SDQ37
DDRB_SDM4 DDRB_SDQ39
DDRB_SDQ38 DDRB_SDQ44
DDRB_SDQ45 DDRB_SDQS5#
DDRB_SDQS5 DDRB_SDQ46
DDRB_SDQ47 DDRB_SDQ52
DDRB_SDQ53
DDRB_SDM6 DDRB_SDQ54
DDRB_SDQ55 DDRB_SDQ60
DDRB_SDQ57DDRB_SDQ61 DDRB_SDQS7#
DDRB_SDQS7 DDRB_SDQ62
DDRB_SDQ63
1 2
R111 10K_0402_5%
R111 10K_0402_5%
1 2
R112 10K_0402_5%
R112 10K_0402_5%
1 2
DDRB_CLK1 <8> DDRB_CLK1# <8>
0_0402_5%
0_0402_5%
DDRB_SDQS3# <9> DDRB_SDQS3 <9>
DDRB_CKE1 <8>
DDRB_SBS1# <9> DDRB_SRAS# <9> DDRB_SCS0# <8>
DDRB_ODT0 <8>
DDRB_SDQS5# <9> DDRB_SDQS5 <9>
DDRB_CLK0 <8> DDRB_CLK0# <8>
DDRB_SDQS7# <9> DDRB_SDQS7 <9>
+3VS
PM_EXTTS#1 <8>
C235
C235
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
DDRB_SMA[0..14]<8,9>
DDRB_SDQ[0..63]<9>
DDRB_SDM[0..7]<9>
C
DDRB_SBS2# DDRB_CKE0
DDRB_SMA9 DDRB_SMA12
DDRB_SMA5 DDRB_SMA8
DDRB_SMA1 DDRB_SMA3
DDRB_SBS0# DDRB_SMA10
DDRB_SCAS# DDRB_SWE#
DDRB_ODT1 DDRB_SCS1#
DDRB_CKE1 DDRB_SMA11
DDRB_SMA7 DDRB_SMA6
DDRB_SMA4 DDRB_SMA2
DDRB_SMA0 DDRB_SBS1#
DDRB_SRAS# DDRB_SCS0#
DDRB_ODT0 DDRB_SMA13
DDRB_SMA14
1
C236
C236
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDRB_SMA[0..14] DDRB_SDQ[0..63] DDRB_SDM[0..7]
1 4 2 3
RP14 56_0404_4P2R_5%
RP14 56_0404_4P2R_5%
1 4 2 3
RP15 56_0404_4P2R_5%
RP15 56_0404_4P2R_5%
1 4 2 3
RP16 56_0404_4P2R_5%
RP16 56_0404_4P2R_5%
1 4 2 3
RP17 56_0404_4P2R_5%
RP17 56_0404_4P2R_5%
1 4 2 3
RP18 56_0404_4P2R_5%
RP18 56_0404_4P2R_5%
1 4 2 3
RP19 56_0404_4P2R_5%
RP19 56_0404_4P2R_5%
1 4 2 3
RP20 56_0404_4P2R_5%
RP20 56_0404_4P2R_5%
1 4 2 3
RP21 56_0404_4P2R_5%
RP21 56_0404_4P2R_5%
1 4 2 3
RP22 56_0404_4P2R_5%
RP22 56_0404_4P2R_5%
1 4 2 3
RP23 56_0404_4P2R_5%
RP23 56_0404_4P2R_5%
1 4 2 3
RP24 56_0404_4P2R_5%
RP24 56_0404_4P2R_5%
1 4 2 3
RP25 56_0404_4P2R_5%
RP25 56_0404_4P2R_5%
1 4 2 3
RP26 56_0404_4P2R_5%
RP26 56_0404_4P2R_5%
R648
R648
1 2
56_0402_5%
56_0402_5%
D
+1.8V+DIMM_VREF
1
C237
C237
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8V
C241
C241
+0.9VS
C250
C250
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C255
C255
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C260
C260
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C242
C242
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
+0.9VS
1
C251
C251
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+0.9VS
1
C256
C256
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
1
C261
C261
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C252
C252
C257
C257
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C262
C262
C238
C238
C243
C243
1
2
1
2
1
2
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
1
C253
C253
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C258
C258
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C239
C239
2
C244
C244
1
C254
C254
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C259
C259
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
C240
C240
C245
C245
E
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2006/08/05
2006/08/05
2006/08/05
Deciphered Date
Deciphered Date
Deciphered Date
2007/08/05
2007/08/05
2007/08/05
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DDRII-SODIMM1
DDRII-SODIMM1
DDRII-SODIMM1
LA-3481P
LA-3481P
LA-3481P
15 47Tuesday, May 22, 2007
15 47Tuesday, May 22, 2007
15 47Tuesday, May 22, 2007
E
of
of
of
2.0
2.0
2.0
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