COMPAL LA-3361P Schematics

A

1 1

B

C

D

E

2 2

Compal confidential

Schematics Document

Mobile Dothan uFCPGA with Intel
Alviso_GM+ICH6-M core logic

3 3

2006-09-15

REV:1.0

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

LA-3361P

E

143Thursday, September 21, 2006

0.3

of

A

B

C

D

E

Compal confidential

File Name : LA-3361P

1 1

Fan Control

page 13

H_A#(3..31)

Mobile Dothan/Yonah
uFCPGA-478 CPU

page 4,5,6

FSB

400/533MHz

Thermal Sensor
ADM1032ARM

page 13

H_D#(0..63)

LVDS CONN

page 14

One Channel

DDR2 -400/533

Intel Alviso GMCH

CRT conn

2 2

page 15

PCBGA 1257

page 7,8,9,10,11

PCI-E(DMI)

One Channel

Clock Generator

ICS 954226

page 16

DDR2-SO-DIMM0

page 12

USB conn x2

page 28

USB conn x2
Option(15.4 Sub board connector)

page 19

LAN I/F

Intel ICH6-M

PCI BUS

INTEL LAN

82562V 10 /100

3 3

RJ45/11 CONN

page 22

page 22

Mini PCI
socket

page 24

CardBus Controller

CB-1410

page 23

Slot 0

page 23

RTC CKT.

page 18

Power On/Off CKT.

page 31

4 4

Touch Pad CONN.

page 29

DC/DC Interface CKT.

page 32

mBGA-609

page 17,18,19,20

LPC BUS

EC KB910L

page 29

Int.KBD

page 29

AC-LINK

IDEBUS

Flash ROM

SST39VF080-70

page 30

Audio Conexant

CX20468-31

IDE HDD
Connector

page 21

page 25

IDE ODD
Connector

Power Circuit DC/DC

33,34,35,36,37,38,39

A

B

www.laptopfix.vn

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

MODEM AMOM
CX20493-58

page 26

AMP & Audio Jack
TPA6211

page 21

Intel CPU debug conn
EC debug conn
SW debug conn

Switch Button list:
Power Botton
Lid Switch

LED Function List
Power LED
Caps Lock LED
Wireless LED
Charger LED

Title

Size Document Number Rev
Custom

Date: Sheet

page 27

Page 4
Page 29
Page 29

Page 30
Page 30

：

Page 28
Page 28
Page 28
Page 28

Compal Electronics, Inc.

Block Diagram

LA-3361P

E

0.3

of

243Thursday, September 21, 2006

5

I2C / SMBUS ADDRESSING

4

3

2

1

External PCI Devices

Alviso 915GM SA00000K040
Alviso 910GML SA00000K100

D D

CARD BUS
Wireless LAN(MINI PCI)

IDSEL # PIRQREQ/GNT #DEVICE

AD22
AD20

2
0

C
E

、

F

BOM

@ : not install
45@ : 45 level
14@ : 14"(IAT00) install

WLAN@ : with WLAN (mini PCI) install

Power Managment table

AMOM@ : with AMOM install

Signal

C C

State

S0

S1

S3

+3VALW

+5VALW

ON

ON ON ON

ON ON

+1.8V

ON ON

+CPU_CORE
+VCCP(1.05V)
+5VS
+3VS
+2.5VS
+1.5VS
+1.8VS
+0.9VS

OFF

BATT@ : 45 level

SPI@ : SPI ROM install

conn@ : ME part

IAT00 14"

46144232L01 915GM
46144232L02 910GML W/O WLAN
46144232L03 910GML

S5 S4/AC

S5 S4/AC don't exist

ON OFF

OFF OFF OFF

OFF

IAT10 15.4"

46144232L11 910GML
46144232L12 915GM

B B

SMBUS Control Table

SOURCE

SMB_EC_CK1
SMB_EC_DA1

SMB_EC_CK2
SMB_EC_DA2

ICH_SMBCLK
ICH_SMBDATA
LCD_DDCCLK

LCD_DDCDATA
I2CC_SCL

I2CC_SDA

A A

KB910L

KB910L

ICH6-M

Alviso
GM-GP

NV44M

INVERTER BATT

5

SERIAL SENSOR
EEPROM

THERMAL
(CPU)

ADM1032

SODIMM CLK CHIP

4

www.laptopfix.vn

46144232L13 910GML W/O WLAN

MINI PCI

LCD

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Title

Size Document Number Rev
Custom

2

Date: Sheet

Compal Electronics, Inc.

Design Note

LA-3361P

1

343Thursday, September 21, 2006

0.3

of

ZZZ1

5

4

3

2

1

H_A#[3..31]<7>

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7

LA3361P-Rev0.1

D D

H_REQ#[0..4]<7>

H_ADSTB#0<7>

C C

R37

+VCCP

B B

H_DPRSLP will change to
H_DPRSTP in future
collateral version.

1 2

56_0402_5%

CLK_ITP<16>
CLK_ITP#<16>

CLK_CPU_BCLK<16>
CLK_CPU_BCLK#<16>

H_RS#[0..2]<7>

XDP_DBRESET#<19>

H_PWRGOOD_R

H_PWRGOOD<18>

H_THERMTRIP#<7,18>

H_ADSTB#1<7>

H_ADS#<7>
H_BNR#<7>
H_BPRI#<7>
H_BR0#<7>
H_DEFER#<7>
H_DRDY#<7>
H_HIT#<7>
H_HITM#<7>

H_LOCK#<7>
H_RESET#<7>

H_TRDY#<7>

H_DBSY#<7>
H_DPSLP#<18>

H_DPRSLP#<18>

H_DPWR#<7>

R2009 1K_0402_5%

H_CPUSLP#<7,18>

H_THERMDA<13>
H_THERMDC<13>

H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADSTB#0
H_ADSTB#1

CLK_ITP
CLK_ITP#

CLK_CPU_BCLK
CLK_CPU_BCLK#

H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_RESET#

1" ~ 6.5"

H_RS#0
H_RS#1
H_RS#2
H_TRDY#

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3

XDP_DBRESET#

H_DBSY#
H_DPSLP#
H_DPRSLP#

XDP_BPM#4
XDP_BPM#5

H_PROCHOT#

12

H_CPUSLP#
XDP_TCK
XDP_TDI
XDP_TDO
TEST1
TEST2
XDP_TMS
XDP_TRST#

H_THERMDA
H_THERMDC

U15A

P4

A3#

U4

A4#

V3

A5#

R3

A6#

V2

A7#

W1

A8#

T4

A9#

W2

A10#

Y4

A11#

Y1

A12#

U1

A13#

AA3

A14#

Y3

A15#

AA2

A16#

AF4

A17#

AC4

A18#

AC7

A19#

AC3

A20#

AD3

A21#

AE4

A22#

AD2

A23#

AB4

A24#

AC6

ADDR GROUP

A25#

AD5

A26#

AE2

A27#

AD6

A28#

AF3

A29#

AE1

A30#

AF1

A31#

R2

REQ0#

P3

REQ1#

T2

REQ2#

P1

REQ3#

T1

REQ4#

U3

ADSTB0#

AE5

ADSTB1#

A16

ITP_CLK0

A15

ITP_CLK1

B15

BCLK0

B14

BCLK1

N2

ADS#

L1

BNR#

J3

BPRI#

N4

BR0#

L4

DEFER#

H2

DRDY#

K3

HIT#

K4

HITM#

A4

IERR#

J2

LOCK#

B11

RESET#

H1

RS0#

K1

RS1#

L2

RS2#

M3

TRDY#

C8

BPM0#

B8

BPM1#

A9

BPM2#

C9

BPM3#

A7

DBR#

M2

DBSY#

B7

DPSLP#

G1

DPRSTP#

C19

DPWR#

A10

PRDY#

B10

PREQ#

B17

PROCHOT#

E4

PWRGOOD

A6

SLP#

A13

TCK

C12

TDI

A12

TDO

C5

TEST1

F23

TEST2

C11

TMS

B13

TRST#

B18

THERMDA

A18

THERMDC

C17

THERMTRIP#

TYCO_1612365-1_Dothan

Dothan

DATA GROUP

HOST CLK

CONTROL GROUP

MISC

THERMAL
DIODE

LEGACY CPU

D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DINV0#
DINV1#
DINV2#
DINV3#

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

A20M#
FERR#

IGNNE#

INIT#
LINT0
LINT1

STPCLK#

SMI#

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#

A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26

D25
J26
T24
AD20

C23
K24
W25
AE24
C22
L24
W24
AE25

C2
D3
A3
B5
D1
D4

C6
B4

H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI

H_STPCLK#
H_SMI#

H_DINV#0 <7>
H_DINV#1 <7>
H_DINV#2 <7>
H_DINV#3 <7>

H_A20M# <18>
H_FERR# <18>
H_IGNNE# <18>
H_INIT# <18>
H_INTR <18>
H_NMI <18>

H_STPCLK# <18>
H_SMI# <18>

+VCCP +VCCP

H_D#0

A19

H_D#[0..63] <7>

XDP Connector

XDP_BPM#5
XDP_BPM#4

XDP_BPM#3
XDP_BPM#2

XDP_BPM#1
XDP_BPM#0

H_PWRGOOD_R
XDP_HOOK1

1

C1531

2

0.1U_0402_16V4Z

XDP_TCK

H_DSTBN#[0..3] <7>

H_DSTBP#[0..3] <7>

layout note: Change R2004 to 649 ohm if using XTP to ITP adapter

R1998

1 2

R1999 54.9_0402_1%

1 2

R2000 54.9_0402_1%

1 2

R2001 54.9_0402_1%

1 2

R2002 54.9_0402_1%

1 2

R2003 54.9_0402_1%@

1 2

R2004 51_0402_1%

1 2

R2005 54.9_0402_1%

1 2

CLK_ITP
CLK_ITP#

H_RESET#H_RESET#_R

R2006

XDP_DBRESET#XDP_DBRESET#_R

12

R2007

PROCHOT# <29>

JP48

1

GND0

3

OBSFN_A0

5

OBSFN_A1

7

GND2

9

OBSDATA_A0

11

OBSDATA_A1

13

GND4

15

OBSDATA_A2

17

OBSDATA_A3

19

GND6

21

OBSFN_B0

23

OBSFN_B1

25

GND8

27

OBSDATA_B0

29

OBSDATA_B1

31

GND10

33

OBSDATA_B2

35

OBSDATA_B3

37

GND12

39

PWRGOOD/HOOK0

41

HOOK1

43

VCC_OBS_AB

45

HOOK2

47

HOOK3

49

GND14

51

SDA

53

SCL

55

TCK1

57

TCK0

59

GND16

+VCCP

R253
56_0402_5%

ITPCLK#/HOOK5

RESET#/HOOK6

SAMTE_BSH-030-01-L-D-A CONN@

+VCCP

12

R32
200_0402_5%

1 2

GND1
OBSFN_C0
OBSFN_C1

GND3

OBSDATA_C0
OBSDATA_C1

GND5

OBSDATA_C2
OBSDATA_C3

GND7
OBSFN_D0
OBSFN_D1

GND9

OBSDATA_D0
OBSDATA_D1

GND11
OBSDATA_D2
OBSDATA_D3

GND13

ITPCLK/HOOK4

VCC_OBS_CD

DBR#/HOOK7

GND15

TD0

TRST#

TMS

GND17

12

R266
56_0402_5%

H_PROCHOT#

H_PWRGOOD

XDP_DBRESET#_R

04/10 no stuff

XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_PRE

XDP_TDI
XDP_TMS
XDP_TDO
XDP_BPM#5
XDP_HOOK1

XDP_TRST#
XDP_TCK

R2008 0_0402_5%

1 2

1K_0402_1%

1 2

200_0402_1%

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56

TDI

58
60

Place R2006 within 200ps (~1") to CPU

+3VS

12

R258
1K_0402_5%

1

C

Q29

2

B

2SC2411K_SOT23

E

3

Add pullups for PWRGOOD and THERMTRIP per INTEL

+3VS

1K_0402_5%@

+VCCP

A A

5

TEST2

TEST1

R251

1 2

1K_0402_5%@

R35

1 2

1K_0402_5%@

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Title

Size Document Number Rev
Custom

2

Date: Sheet

Compal Electronics, Inc.

Dothan Processor(1/2)

LA-3361P

1

443Thursday, September 21, 2006

0.3

of

5

4

3

2

1

R181

+1.5VS

D D

1

1

C340

0.01U_0402_16V7K

C C

+VCCP

12

R248
1K_0402_1%

B B

12

R247
2K_0402_1%

1

C626
1U_0603_10V4Z

2

1

C627
220P_0402_50V7K

2

Layout close CPU

Layout Note:
500 mil max length

Spacing 25mil

R249

27.4_0402_1%

20 mils

12

R250

54.9_0402_1%

5 mils (55 Ohm)

20 mils(27.4Ohm)

12

12

R41

27.4_0402_1%

Spacing 1:2

5 mils(55 Ohm)

12

R40

54.9_0402_1%

2

2

PSI#<37>

CPU_BSEL0<16>
CPU_BSEL1<16>

Resistor placed within

0.5" of CPU pin.Trace
should be at least 25
miles away from any
other toggling signal.

54.9_0402_1%@

54.9_0402_1%@

C341
10U_1206_6.3V6M

+CPU_CORE

CPU_VID0<37>
CPU_VID1<37>
CPU_VID2<37>
CPU_VID3<37>
CPU_VID4<37>
CPU_VID5<37>

V_CPU_GTLREF

1 2
1 2

R178

+VCCP

Spacing 25mil

CPU_BSEL0
CPU_BSEL1

T10 PAD
T7 PAD
T20 PAD
T12 PAD
T11 PAD

VCCSENSE
VSSSENSE

PSI#
CPU_VID0

CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5

COMP0
COMP1
COMP2
COMP3

U15B

AE7

VCCSENSE

AF6

VSSSENSE

F26

VCCA0

B1

VCCA1

N1

VCCA2

AC26

VCCA3

P23

VCCQ0

W4

VCCQ1

D10

VCCP

D12

VCCP

D14

VCCP

D16

VCCP

E11

VCCP

E13

VCCP

E15

VCCP

F10

VCCP

F12

VCCP

F14

VCCP

F16

VCCP

K6

VCCP

L5

VCCP

L21

VCCP

M6

VCCP

M22

VCCP

N5

VCCP

N21

VCCP

P6

VCCP

P22

VCCP

R5

VCCP

R21

VCCP

T6

VCCP

T22

VCCP

U21

VCCP

D6

VCC

D8

VCC

D18

VCC

D20

VCC

D22

VCC

E5

VCC

E7

VCC

E9

VCC

E17

VCC

E19

VCC

E21

VCC

F6

VCC

F8

VCC

F18

VCC

E1

PSI#

E2

VID0

F2

VID1

F3

VID2

G3

VID3

G4

VID4

H4

VID5

AD26

GTLREF

C16

BSEL0

C14

BSEL1

P25

COMP0

P26

COMP1

AB2

COMP2

AB1

COMP3

B2

RSVD

C3

RSVD

E26

RSVD

AF7

RSVD

AC1

RSVD

TYCO_1612365-1_Dothan

A2

VSS

A5

VSS

A8

VSS

A11

VSS

A14

VSS

A17

VSS

A20

VSS

A23

VSS

A26

VSS

B3

VSS

B6

VSS

B9

VSS

B12

Dothan

VSS

B16

VSS

B19

VSS

B22

VSS

B25

VSS

C1

VSS

C4

VSS

C7

VSS

C10

VSS

C13

VSS

C15

VSS

C18

VSS

C21

VSS

C24

VSS

D2

VSS

D5

VSS

D7

VSS

D9

VSS

D11

VSS

D13

VSS

D15

VSS

D17

VSS

D19

VSS

D21

VSS

D23

VSS

D26

VSS

E3

VSS

E6

VSS

E8

VSS

E10

VSS

E12

VSS

E14

VSS

E16

VSS

E18

VSS

E20

VSS

E22

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1

POWER, GROUNG, RESERVED SIGNALS AND NC

+CPU_CORE

U15C

F20

VCC

F22

VCC

G5

VCC

G21

VCC

H6

VCC

H22

VCC

J5

VCC

J21

VCC

K22

VCC

U5

VCC

V6

VCC

V22

VCC

W5

VCC

W21

VCC

Y6

VCC

Y22

VCC

AA5

VCC

AA7

VCC

AA9

VCC

AA11

VCC

AA13

VCC

AA15

VCC

AA17

VCC

AA19

VCC

AA21

VCC

AB6

VCC

AB8

VCC

AB10

VCC

AB12

VCC

AB14

VCC

AB16

VCC

AB18

VCC

AB20

VCC

AB22

VCC

AC9

VCC

AC11

VCC

AC13

VCC

AC15

VCC

AC17

VCC

AC19

VCC

AD8

VCC

AD10

VCC

AD12

VCC

AD14

VCC

AD16

VCC

AD18

VCC

AE9

VCC

AE11

VCC

AE13

VCC

AE15

VCC

AE17

VCC

AE19

VCC

AF8

VCC

AF10

VCC

AF12

VCC

AF14

VCC

AF16

VCC

AF18

VCC

M4

VSS

M5

VSS

M21

VSS

M24

VSS

N3

VSS

N6

VSS

N22

VSS

N23

VSS

N26

VSS

P2

VSS

P5

VSS

P21

VSS

P24

VSS

R1

VSS

R4

VSS

R6

VSS

R22

VSS

R25

VSS

T3

VSS

T5

VSS

T21

VSS

T23

VSS

TYCO_1612365-1_Dothan

Dothan

POWER, GROUND

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

Dothan Processor(2/2)

LA-3361P

1

543Thursday, September 21, 2006

0.3

of

5

4

3

2

1

+CPU_CORE

1

C84
10U_1206_6.3V6M

2

+CPU_CORE

1

2

+CPU_CORE

1

2

+CPU_CORE

1

2

C259
10U_1206_6.3V6M

C274
10U_1206_6.3V6M

C303
10U_1206_6.3V6M

D D

C C

1

C87
10U_1206_6.3V6M

2

1

C265
10U_1206_6.3V6M

2

1

C280
10U_1206_6.3V6M

2

1

C302
10U_1206_6.3V6M

2

1

C90
10U_1206_6.3V6M

2

1

C81
10U_1206_6.3V6M

2

1

C293
10U_1206_6.3V6M

2

1

C282
10U_1206_6.3V6M

2

1

C93
10U_1206_6.3V6M

2

1

C82
10U_1206_6.3V6M

2

1

C301
10U_1206_6.3V6M

2

1

C283
10U_1206_6.3V6M

2

1

C97
10U_1206_6.3V6M

2

1

C100
10U_1206_6.3V6M

2

1

C273
10U_1206_6.3V6M

2

1

C272
10U_1206_6.3V6M

2

+CPU_CORE

1

2

+CPU_CORE

1

2

+CPU_CORE

1

2

C99
10U_1206_6.3V6M

C101
10U_1206_6.3V6M

C279
10U_1206_6.3V6M

1

C83
10U_1206_6.3V6M

2

1

C102
10U_1206_6.3V6M

2

1

C292
10U_1206_6.3V6M

2

1

C86
10U_1206_6.3V6M

2

1

C98
10U_1206_6.3V6M

2

1

C300
10U_1206_6.3V6M

2

1

C89
10U_1206_6.3V6M

2

1

C260
10U_1206_6.3V6M

2

1

C257
10U_1206_6.3V6M

2

1

C92
10U_1206_6.3V6M

2

1

C267
10U_1206_6.3V6M

2

1

C256
10U_1206_6.3V6M

2

Near VCORE regulator.

+CPU_CORE

6/21

B B

+VCCP

1

C70

+

150U_D2_6.3VM

2

A A

1

C85

0.1U_0402_16V4Z

2

5

1

C88

0.1U_0402_16V4Z

2

1

C91

0.1U_0402_16V4Z

2

1

C96

0.1U_0402_16V4Z

2

4

www.laptopfix.vn

1

C103

0.1U_0402_16V4Z

2

1

C104

0.1U_0402_16V4Z

2

330U_D2E_2.5VM

1

+

C94

C286

2

330U_D2E_2.5VM

1

C78

0.1U_0402_16V4Z

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

+

330U_D2E_2.5VM

2

1

2

1

+

C95

2

C80

0.1U_0402_16V4Z

C285

1

+

2

330U_D2E_2.5VM@

1

2

ESR <= 3m ohm
Capacitor > 880 uF

1

C105

0.1U_0402_16V4Z

C79

0.1U_0402_16V4Z

2

2

Title

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

Dothan Bypass

LA-3361P

1

643Thursday, September 21, 2006

of

0.3

5

4

3

2

1

H_VREF

U5A

G9

HA3#

C9

HA4#

E9

HA5#

B7

HA6#

A10

HA7#

F9

HA8#

D8

HA9#

B10

HA10#

E10

HA11#

G10

HA12#

D9

HA13#

E11

HA14#

F10

HA15#

G11

HA16#

G13

HA17#

C10

HA18#

C11

HA19#

D11

HA20#

C12

HA21#

B13

HA22#

A12

HA23#

F12

HA24#

G12

HA25#

E12

HA26#

C13

HA27#

B11

HA28#

D13

HA29#

A13

HA30#

F13

HA31#

A11

HPCREQ#

A7

HREQ#0

D7

HREQ#1

B8

HREQ#2

C7

HREQ#3

A8

HREQ#4

B9

HADSTB#0

E13

HADSTB#1

AB1

HCLKN

AB2

HCLKP

G4

HDSTBN#0

K1

HDSTBN#1

R3

HDSTBN#2

V3

HDSTBN#3

G5

HDSTBP#0

K2

HDSTBP#1

R2

HDSTBP#2

W4

HDSTBP#3

H8

HDINV#0

K3

HDINV#1

T7

HDINV#2

U5

HDINV#3

H10

HCPURST#

F8

HADS#

B5

HTRDY#

G6

HDPWR#

F7

HDRDY#

E6

HDEFER#

F6

HEDRDY#

D6

HHITM#

D4

HHIT#

B3

HLOCK#

E7

HBREQ0#

A5

HBNR#

D5

HBPRI#

C6

HDBSY#

G8

HCPUSLP#

A4

HRS0#

C5

HRS1#

B4

HRS2#

ALVISO_BGA1257

1

C237

2

0.1U_0402_16V4Z

Alviso

+VCCP

12

R156

100_0402_1%

12

R160

200_0402_1%

HOST

HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP

HXSWING
HYSWING

H_SWNG0

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#

HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

HVREF

C253

R163

12

12

R170

24.9_0402_1%

24.9_0402_1%

10/20 mils

R168

1

R167

2

0.1U_0402_16V4Z

H_D#[0..63] <4>

+VCCP

12

R164

54.9_0402_1%

54.9_0402_1%

+VCCP+VCCP

12

221_0603_1%

12

100_0402_1%

12

Layout Note:
Rote as short
as possible

V_DDR_MCH_REF<12>

U5B

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8

CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

RSVD21
RSVD22

CFG/RSVD

RSVD23
RSVD24
RSVD25
RSVD26
RSVD27

BM_BUSY#

EXT_TS0#
EXT_TS1#

THRMTRIP#

PWROK

RSTIN#

PM

DREF_CLKN
DREF_CLKP

DREF_SSCLKP

CLK

DREF_SSCLKN

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

NC10

NC

NC11

2

G16
H13
G14
F16
F15
G15
E16
D17
J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25

J23
J21
H22
F5
AD30
AE29

A24
A23
D37
C37

AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37

CFG0
MCH_CLKSEL1
MCH_CLKSEL0

PAD

T27

PAD

T28

CFG5
CFG6
CFG7

CFG9

CFG12
CFG13

CFG16
CFG18

CFG19

PM_EXTTS#0
PM_EXTTS#1

1 2
1 2

C252

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

M_CLK_DDR0
M_CLK_DDR1

M_CLK_DDR#0
M_CLK_DDR#1

DDR_CKE0_DIMMA
DDR_CKE1_DIMMA

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#

M_OCDOCMP0
M_OCDOCMP1
M_ODT0
M_ODT1

SMRCOMPN
SMRCOMPP
V_DDR_MCH_REF

R174

10K_0402_1%

1

2

0.1U_0402_16V4Z

DMI_TXN0<19>
DMI_TXN1<19>
DMI_TXN2<19>
DMI_TXN3<19>

DMI_TXP0<19>
DMI_TXP1<19>
DMI_TXP2<19>
DMI_TXP3<19>

DMI_RXN0<19>
DMI_RXN1<19>
DMI_RXN2<19>
DMI_RXN3<19>

DMI_RXP0<19>
DMI_RXP1<19>
DMI_RXP2<19>
DMI_RXP3<19>

M_CLK_DDR0<12>
M_CLK_DDR1<12>

M_CLK_DDR#0<12>
M_CLK_DDR#1<12>

DDR_CKE0_DIMMA<12>
DDR_CKE1_DIMMA<12>

DDR_CS0_DIMMA#<12>
DDR_CS1_DIMMA#<12>

R13640.2_0402_1%@
R14740.2_0402_1%@

M_ODT0<12>
M_ODT1<12>

R159 80.6_0402_1%

V_DDR_MCH_REF

3

1 2
1 2

R157 80.6_0402_1%

1

C22

2

0.1U_0402_16V4Z

+1.8V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.8V

12

12

AA31

AB35
AC31
AD35

Y31
AA35
AB31

AC35

AA33
AB37

AC33
AD37

Y33
AA37
AB33

AC37

AM33

AL1
AE11
AJ34

AF6

AC10
AN33

AK1
AE10
AJ33

AF5

AD10

AP21

AM21
AH21

AK21

AN16
AM14
AH15
AG16

AF22
AF16
AP14
AL15

AM11
AN10

AK10
AK11
AF37

AD1
AE27
AE28

AF9
AF10

R172
10K_0402_1%

DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3

DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3

DMITXN0
DMITXN1
DMITXN2
DMITXN3

DMITXP0
DMITXP1
DMITXP2
DMITXP3

SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5

SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#

SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

SM_OCDCOMP0
SM_OCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT

ALVISO_BGA1257

DMIDDR MUXING

MCH_CLKSEL1 <16>
MCH_CLKSEL0 <16>

CFG[17:3]: internal pull-up
CFG[19:18]: internal pull-down

CFG0

R149 10K_0402_5%

CFG0

R709 1K_0402_5%@

CFG5
CFG6
CFG7
CFG9
CFG12
CFG13
CFG16

CFG18
CFG19

6/07

Chage CFG18 and CFG19 to PU +2.5VS for SI

PM_BMBUSY# <19>

H_THERMTRIP# <4,18>
+VCCP_PWRGD <29>
PLTRST_MCH# <17,21,23>

DREFCLK# <16>
DREFCLK <16>
SSC_DREFCLK <16>
SSC_DREFCLK# <16>

CFG[2:0]

CFG5

CFG6

CFG7

CFG9

CFG[13:12]
CFG16

(FSB Dynamic
ODT)

CFG18
(VCC Select)

CFG19
(VTT Select)

Title

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

1 2

R127 1K_0402_5%@

1 2

R124 1K_0402_5%

1 2

R117 1K_0402_5%@

1 2

R119 1K_0402_5%@

1 2

R710 1K_0402_5%@

1 2

R711 1K_0402_5%@

1 2

R712 1K_0402_5%@

1 2

R641 1K_0402_5%@

1 2

R642 1K_0402_5%@

1 2

R141

PM_EXTTS#0

PM_EXTTS#1

Refer to sheet 19 for FSB
frequency select

10K_0402_5%

R137

10K_0402_5%

Low = DMI x 2
High = DMI x 4
Low = DDR-II
High = DDR-I
Low = DT/Transportable CPU
High = Mobile CPU
Low = Reverse Lane
High = Normal Operation

00 = Reserved
01 = XOR Mode Enabled
10 = All Z Mode Enabled
11 = Normal Operation (Default)

Low = Disabled
High = Enabled
Low = 1.05V (Default)
High = 1.5V
Low = 1.05V (Default)
High = 1.2V

Alviso(1 of 5)

LA-3361P

1

+VCCP

12

+2.5VS

12

12

*

*

*

*

*

*

*

*

of

743Thursday, September 21, 2006

0.3

H_D#0

E4

H_D#1

E1

H_D#2

F4

H_D#3

H7

H_D#4

E2

H_D#5

F1

H_D#6

E3

H_D#7

D3

H_D#8

K7

H_D#9

F2

H_D#10

J7

H_D#11

J8

H_D#12

H6

H_D#13

F3

H_D#14

K8

H_D#15

H5

H_D#16

H1

H_D#17

H2

H_D#18

K5

H_D#19

K6

H_D#20

J4

H_D#21

G3

H_D#22

H3

H_D#23

J1

H_D#24

L5

H_D#25

K4

H_D#26

J5

H_D#27

P7

H_D#28

L7

H_D#29

J3

H_D#30

P5

H_D#31

L3

H_D#32

U7

H_D#33

V6

H_D#34

R6

H_D#35

R5

H_D#36

P3

H_D#37

T8

H_D#38

R7

H_D#39

R8

H_D#40

U8

H_D#41

R4

H_D#42

T4

H_D#43

T5

H_D#44

R1

H_D#45

T3

H_D#46

V8

H_D#47

U6

H_D#48

W6

H_D#49

U3

H_D#50

V5

H_D#51

W8

H_D#52

W7

H_D#53

U2

H_D#54

U1

H_D#55

Y5

H_D#56

Y2

H_D#57

V4

H_D#58

Y7

H_D#59

W1

H_D#60

W3

H_D#61

Y3

H_D#62

Y6

H_D#63

W2

H_VREF

J11

H_XRCOMP

C1

H_XSCOMP

C2

H_YRCOMP

T1

H_YSCOMP

L1

H_SWNG0

D1

H_SWNG1

P1

R165

12

R173

221_0603_1%

H_SWNG1

12

1

R169

100_0402_1%

C247

4

www.laptopfix.vn

2

0.1U_0402_16V4Z

H_A#[3..31]<4>

D D

T29 PAD

H_REQ#[0..4]<4>

H_ADSTB#0<4>
H_ADSTB#1<4>

C C

B B

CLK_MCH_BCLK#<16>
CLK_MCH_BCLK<16>

H_DSTBN#[0..3]<4>

H_DSTBP#[0..3]<4>

H_DINV#0<4>
H_DINV#1<4>
H_DINV#2<4>
H_DINV#3<4>

H_RESET#<4>
H_ADS#<4>

H_TRDY#<4>
H_DPWR#<4>
H_DRDY#<4>
H_DEFER#<4>

T30 PAD

H_HITM#<4>
H_HIT#<4>
H_LOCK#<4>

H_BR0#<4>
H_BNR#<4>
H_BPRI#<4>
H_DBSY#<4>

H_CPUSLP#<4,18>

H_RS#[0..2]<4>

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

TP_H_PCREQ#

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADSTB#0
H_ADSTB#1

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_RESET#
H_ADS#

H_TRDY#
H_DRDY#

H_DEFER#
TP_H_EDRDY#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#

H_CPUSLP#

H_RS#0
H_RS#1
H_RS#2

PM-C0-SA0091501D0(R3)&SA0091501E0(R1)
GM-B1-SA0091500A0(R3)&SA009150070(R1)

100mil

A A

5

5

D D

4

3

2

1

DDR_A_BS#0<12>
DDR_A_BS#1<12>
DDR_A_BS#2<12>

DDR_A_DM[0..7]<12>

DDR_A_DQS[0..7]<12>

DDR_A_DQS#[0..7]<12>

C C

DDR_A_MA[0..13]<12>

DDR_A_CAS#<12>
DDR_A_RAS#<12>

T21 PAD~D
T22 PAD~D

B B

DDR_A_WE#<12>

DDR_A_BS#0
DDR_A_BS#1
DDR_A_BS#2

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13

DDR_A_CAS#
DDR_A_RAS#

TP_MA_RCVENIN#

TP_MA_RCVENOUT#

DDR_A_WE#

AK15
AK16

AL21
AJ37

AP35

AL29

AP24

AK36
AP33
AN29
AP23

AK35
AP34
AN30
AN23

AL17
AP17
AP18

AM17

AN18

AM18

AL19
AP20

AM19

AL20

AM16

AN20

AM20
AM15

AN15
AP16
AF29
AF28
AP15

AP9
AP4

AD3

AM8
AM4

AE5

AN8
AM5
AH1
AE4

AJ2

AJ1

U5C

SA_BS0#
SA_BS1#
SA_BS2#

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#

SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8

SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43

DDR MEMORY SYSTEM A

SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63

ALVISO_BGA1257

AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5

DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDR_A_D0

AG35

DDR_A_D[0..63] <12>

This Symbol as same
as Intel CRB
schematic, So Layout
Guide will show these
signals routed
differentially.

AJ15
AG17
AG21

AF32
AK34
AK27
AK24

AJ10

AK5
AE7
AB7

AF34
AK32

AJ28
AK23
AM10

AH6
AF8
AB4

AF35
AK33
AK28

AJ23

AL10

AH7
AF7
AB5

AH17
AK17
AH18

AJ18
AK18

AJ19
AK19
AH19

AJ20
AH20

AJ16
AG18
AG20
AG15

AH14
AK14
AF15
AF14
AH16

U5D

SB_BS0#
SB_BS1#
SB_BS2#

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#

AE31

SBDQ0

AE32

SBDQ1

AG32

SBDQ2

AG36

SBDQ3

AE34

SBDQ4

AE33

SBDQ5

AF31

SBDQ6

AF30

SBDQ7

AH33

SBDQ8

AH32

SBDQ9

AK31

SBDQ10

AG30

SBDQ11

AG34

SBDQ12

AG33

SBDQ13

AH31

SBDQ14

AJ31

SBDQ15

AK30

SBDQ16

AJ30

SBDQ17

AH29

SBDQ18

AH28

SBDQ19

AK29

SBDQ20

AH30

SBDQ21

AH27

SBDQ22

AG28

SBDQ23

AF24

SBDQ24

AG23

SBDQ25

AJ22

SBDQ26

AK22

SBDQ27

AH24

SBDQ28

AH23

SBDQ29

AG22

SBDQ30

AJ21

SBDQ31

AG10

SBDQ32

AG9

SBDQ33

AG8

SBDQ34

AH8

SBDQ35

AH11

SBDQ36

AH10

SBDQ37

AJ9

SBDQ38

AK9

SBDQ39

AJ7

SBDQ40

AK6

SBDQ41

AJ4

SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63

AH5
AK8
AJ8
AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5

DDR SYSTEM MEMORY B

ALVISO_BGA1257

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Title

Size Document Number Rev
Custom

2

Date: Sheet

Compal Electronics, Inc.

Alviso(2 of 5)

LA-3361P

1

843Thursday, September 21, 2006

0.3

of

5

D D

4

3

2

1

R5 0_0402_5%@

1 2

CLK_MCH_3GPLL#<16>
CLK_MCH_3GPLL<16>

1 2

R334150_0402_1%

1 2

R335150_0402_1%

1 2

R336150_0402_1%

C C

B B

A A

TV Enable: R334,R335,R336 :75 ohm
TV Disable: R334,R335,R336 :150 ohm

CRT_BLU<15>
CRT_GRN<15>
CRT_RED<15>

+2.5VS

R133 2.2K_0402_5%
R140 2.2K_0402_5%

LCD_CLK
LCD_DAT

1 2
1 2

CRT_SMBCLK<15>
CRT_SMBDAT<15>

VSYNC<15>
HSYNC<15>

BIA<14>
BK_EN<14,29>

LCD_CLK<14>
LCD_DAT<14>
EN_LCDVDD<14>

12

R128 1.5K_0402_1%

LVDSAC-<14>
LVDSAC+<14>
LVDSBC-<14>
LVDSBC+<14>

LVDSA0-<14>
LVDSA1-<14>
LVDSA2-<14>

LVDSA0+<14>
LVDSA1+<14>
LVDSA2+<14>

LVDSB0-<14>
LVDSB1-<14>
LVDSB2-<14>

LVDSB0+<14>
LVDSB1+<14>
LVDSB2+<14>

08/09 Add B channel

T46 PAD

COMPS
LUMA
CRMA

CRT_SMBCLK
CRT_SMBDAT

255_0402_1%

BIA
BK_EN

LCD_CLK
LCD_DAT
EN_LCDVDD

LVDSAC­LVDSAC+
LVDSBC­LVDSBC+

LVDSA0­LVDSA1­LVDSA2-

LVDSA0+
LVDSA1+
LVDSA2+

LVDSB0­LVDSB1­LVDSB2-

LVDSB0+
LVDSB1+
LVDSB2+

R392

4.99K_0603_1%

1 2

R143

H24

SDVOCTRL_DATA

H25

SDVOCTRL_CLK

AB29

GCLKN

AC29

GCLKP

A15

TVDAC_A

C16

TVDAC_B

A17

TVDAC_C

J18

TV_REFSET

B15

12

B16
B17

E24
E23
E21
D21
C20
B20
A19
B19
H21
G21

J20

E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27

B30
B29
C25
C24

B34
B33
B32

A34
A33
B31

C29
D28
C27

C28
D27
C26

TV_IRTNA
TV_IRTNB
TV_IRTNC

DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET

LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL

LACLKN
LACLKP
LBCLKN
LBCLKP

LADATAN0
LADATAN1
LADATAN2

LADATAP0
LADATAP1
LADATAP2

LBDATAN0
LBDATAN1
LBDATAN2

LBDATAP0
LBDATAP1
LBDATAP2

EXP_RXN0/SDVO_TVCLKIN#

EXP_RXN1/SDVO_INT#

MISCTVVGALVDS

EXP_RXN2/SDVO_FLDSTALL#

EXP_RXP0/SDVO_TVCLKIN

EXP_RXP1/SDVO_INT

EXP_RXP2/SDVO_FLDSTALL

EXP_TXN0/SDVOB_RED#

EXP_TXN1/SDVOB_GREEN#

EXP_TXN2/SDVOB_BLUE#

EXP_TXN3/SDVOB_CLKN
EXP_TXN4/SDVOC_RED#

EXP_TXN5/SDVOC_GREEN#

EXP_TXN6/SDVOC_BLUE#

EXP_TXN7/SDVOC_CLKN

PCI - EXPRESS GRAPHICS

EXP_TXP0/SDVOB_RED

EXP_TXP1/SDVOB_GREEN

EXP_TXP2/SDVOB_BLUE
EXP_TXP3/SDVOB_CLKP

EXP_TXP4/SDVOC_RED

EXP_TXP5/SDVOC_GREEN

EXP_TXP6/SDVOC_BLUE
EXP_TXP7/SDVOC_CLKP

EXP_COMPI

EXP_ICOMPO

EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8

EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

EXP_TXN8

EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

EXP_TXP8

EXP_TXP9

EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

ALVISO_BGA1257

U5G

D36
D34

E30
F34
G30
H34
J30
K34
L30
M34
N30
P34
R30
T34
U30
V34
W30
Y34

D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34

E32
F36
G32
H36
J32
K36
L32
M36
N32
P36
R32
T36
U32
V36
W32
Y36

D32
E36
F32
G36
H32
J36
K32
L36
M32
N36
P32
R36
T32
U36
V32
W36

PEGCOMP

24.9_0402_1%

1 2

R125

+1.5VS_PCIE

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

Alviso(3 of 5)

LA-3361P

1

943Thursday, September 21, 2006

0.3

of

5

4

3

2

1

K13

VTT0

J13

VTT1

K12

VTT2

W11

VTT3

V11

VTT4

U11

VTT5

T11

VTT6

R11

VTT7

P11

POWER

VTT8

N11

VTT9

M11

D D

+VCCP

1

C217

C232

2

4.7U_0805_10V4Z

2.2U_0603_6.3V4Z

1

C65

C C

0.47U_0603_16V7K

2

1

1

C244

C245

2

2

0.47U_0603_16V7K

CHB1608U301_0603

+1.5VS

B B

1 2

L11
K11

W10

V10
U10
T10
R10
P10
N10

M10

K10

J10

1

Y9

W9

U9

2

R9

P9
N9
M9

L9

J9
N8
M8
N7
M7
N6
M6

A6
N5
M5
N4
M4
N3
M3
N2
M2

B2

V1
N1
M1
G1

1

C254

2

0.22U_0603_10V7K

0.22U_0603_10V7K

L6

C205

470U_D2_2.5VM

VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51

+1.5VS_DPLLA

1

C209

1

+

2

2

0.1U_0402_16V4Z

U5F

VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8

VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64

ALVISO_BGA1257

V2.5_DDR_CAP1

AM37

V2.5_DDR_CAP2

AH37

V2.5_DDR_CAP5

AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13

Note: Place near chip.

AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9

V1.8_DDR_CAP6

AP8

V1.8_DDR_CAP4

AM1

V1.8_DDR_CAP3

AE1

C230

V2.5_DDR_CAP1
V2.5_DDR_CAP2
V2.5_DDR_CAP5

Note : All VCCSM pin
shorted internally.

V1.8_DDR_CAP6
V1.8_DDR_CAP4
V1.8_DDR_CAP3

C201

1

2

1

2

1

2

C248

1

2

+1.8V

10U_0805_6.3V6M

10U_0805_6.3V6M

C35

C236

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C235

C211

2

2

1

1

C192

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C246

1

2

@

330U_D2E_2.5VM

1

+

2

0.1U_0402_16V4Z

1

C234

2

C24

C23

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C239

1

2

+1.8V

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C199

C198

2

2

1

C212

2

10U_0805_6.3V6M

+1.5VS

+1.5VS_DPLLA
+1.5VS_DPLLB

+1.5VS_HPLL
+1.5VS_MPLL

0.1U_0402_16V4Z

C202

+VCCP

0.1U_0402_16V4Z

1

2

T29
R29
N29

M29

K29
J29
V28

U28

T28

R28

P28
N28
M28

L28

K28

J28
H28
G28

V27
U27

T27
R27

P27
N27
M27

L27

K27

J27
H27

K26
H26

K25

J25

K24

K23

K22

K21
W20
U20

T20

K20

V19
U19

K19
W18

V18

T18

K18

K17
AC1

AC2

B23
C35
AA1
AA2

10U_0805_6.3V6M

10U_0805_6.3V6M

W=20 mils

VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7

POWER

VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48

VCCD_HMPLL1
VCCD_HMPLL2
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

+VCCP

1

1

1

C543

C542

C544

2

2

2

0.1U_0402_16V4Z

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCD_TVDAC

VCCDQ_TVDAC

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2

VCCA_CRTDAC0
VCCA_CRTDAC1

VSSA_CRTDAC

ALVISO_BGA1257

1

1

C545

C546

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

VCCA_TVBG
VSSA_TVBG

VCCA_LVDS

VCCHV0
VCCHV1
VCCHV2

VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6

VCCA_3GBG
VSSA_3GBG

VCC_SYNC

U5E

F17
E17
D18
C18
F18
E18

H18
G18

D19
H17

B26
B25
A25

A35
B22

B21
A21

B28
A28
A27

AF20
AP19
AF19
AF18

AE37
W37
U37
R37
N37
L37
J37

Y29
Y28
Y27

F37
G37

H20
F19

E19
G19

+1.5VS

+2.5VS
+2.5VS

+2.5VS

4.7U_0805_10V4Z

1

C222

C44

2

0.1U_0402_16V4Z

+2.5VS_CRT_DAC

C221

0.1U_0402_16V4Z

C196

1

1

C195

0.1U_0402_16V4Z

2

2

1

+

2

1

100U_D2_6.3VM

+

2

C28

220U_D2_4VM

L21

1 2

CHB1608U301_0603

C220

0.022U_0402_16V7K

1

1

Route VSSA3GBG gnd from GMCH to

2

2

decoupling cap ground lead and
then connect to the gnd plane.

Route VSSACRTDAC gnd from GMCH to
decoupling cap ground lead and then
connect to the gnd plane.

+1.5VS_PCIE

1

1

C17

C16

C547

2

2

10U_0805_6.3V6M

0.22U_0603_10V7K

+2.5VS

1

+

C443
150U_D2_6.3VM

@

2

CRTDAC: Route caps within
250mil of Alviso. Route FB
within 3" of Alviso.

C249

10U_0805_6.3V6M

+1.5VS

1

2

0.1U_0402_16V4Z

1

2

1

2

C206

10U_0805_6.3V6M

VCCD_LVDS

1

C194

C193

2

0.1U_0402_16V4Z

0.5_0805_1%

1 2

1

2

10U_0805_6.3V6M

R13

BLM18PG600SN1_0603

BLM18PG600SN1_0603

BLM18PG600SN1_0603

3GRLL_R

CHB1608U301_0603

1

C20

0.1U_0402_16V4Z

2

@

1

C216

2

VCC_SYNC

C182

L2

0.1U_0402_16V4Z

0.01U_0402_16V7K

+2.5VS

C214

L7

L1

L3

+2.5VS

1

2

+2.5VS

1

C185

2

0.1U_0402_16V4Z

12

12

+1.5VS+1.5VS_3GPLL

12

1

C21

2

0.1U_0402_16V4Z

+2.5VS+2.5VS_3GBG

12

0.1U_0402_16V4Z

10U_0805_6.3V6M

1

1

C215

2

2

1

C38

2

10U_0805_6.3V6M

VCCHVVCCA_LVDS

+1.5VS

C18

0.1U_0402_16V4Z

1

C19

0.1U_0402_16V4Z

2

1

C40

2

0.1U_0402_16V4Z

+1.5VS+1.5VS_DDRDLL

1

C243

2

1

2

0.1U_0402_16V4Z

+1.5VS_DPLLB

L5

CHB1608U301_0603

+1.5VS

A A

1 2

C188

470U_D2_2.5VM

0.1U_0402_16V4Z

1

C186

1

+

2

2

5

+1.5VS

CHB1608U301_0603

1 2

470U_D2_2.5VM

+1.5VS_HPLL

L9

C73

0.1U_0402_16V4Z

1

C250

1

+

2

2

+1.5VS

CHB1608U301_0603

1 2

470U_D2_2.5VM

4

www.laptopfix.vn

+1.5VS_MPLL

L8

C145

1

1

+

C242

2

2

0.1U_0402_16V4Z

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+VCCP

+2.5VS

D30

2 1

RB751V_SOD323

+VCCP_CRTDAC_D

2

R714

10_0805_1%

1 2

PJP13

2 1

PAD-SHORT 2x2m

+2.5VS_CRTDAC

Title

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

Alviso(4 of 5)

LA-3361P

1

10 43Thursday, September 21, 2006

0.3

of

5

4

3

2

1

D D

C C

B B

A A

+VCCP

M12
N12

R12
U12
W12
M13

N13
R13
U13
W13

AA12
AA13

M14
N14

R14
U14
W14

AA14
AB14

M15
N15

R15
U15
W15

AA15
AB15

M16
N16

R16
U16
W16

AA16
AB16

R17

AA17
AB17
AA18
AB18
AA19
AB19
AA20
AB20

R21

AA21
AB21

AA22
AB22

AA23
AB23

AA24
AB24

AA25
AB25

AA26
AB26

W25
M26

N26
R26
U26
W26

L12

P12
T12
V12
L13

P13
T13
V13

Y12
Y13
L14

P14
T14
V14
Y14

L15

P15
T15
V15
Y15

L16

P16
T16
V16
Y16

Y17

Y21

Y22

Y23

Y24

Y25

Y26

V25
L26

P26
T26
V26

VTT_NCTF17
VTT_NCTF16
VTT_NCTF15
VTT_NCTF14
VTT_NCTF13
VTT_NCTF12
VTT_NCTF11
VTT_NCTF10
VTT_NCTF9
VTT_NCTF8
VTT_NCTF7
VTT_NCTF6
VTT_NCTF5
VTT_NCTF4
VTT_NCTF3
VTT_NCTF2
VTT_NCTF1
VTT_NCTF0

VSS_NCTF68
VSS_NCTF67
VSS_NCTF66
VSS_NCTF65
VSS_NCTF64
VSS_NCTF63
VSS_NCTF62
VSS_NCTF61
VSS_NCTF60
VSS_NCTF59
VSS_NCTF58
VSS_NCTF57
VSS_NCTF56
VSS_NCTF55
VSS_NCTF54
VSS_NCTF53
VSS_NCTF52
VSS_NCTF51
VSS_NCTF50
VSS_NCTF49
VSS_NCTF48
VSS_NCTF47
VSS_NCTF46
VSS_NCTF45
VSS_NCTF44
VSS_NCTF43
VSS_NCTF42
VSS_NCTF41
VSS_NCTF40
VSS_NCTF39
VSS_NCTF38
VSS_NCTF37
VSS_NCTF36
VSS_NCTF35
VSS_NCTF34
VSS_NCTF33
VSS_NCTF32
VSS_NCTF31
VSS_NCTF30
VSS_NCTF29
VSS_NCTF28
VSS_NCTF27
VSS_NCTF26
VSS_NCTF25
VSS_NCTF24
VSS_NCTF23
VSS_NCTF22
VSS_NCTF21
VSS_NCTF20
VSS_NCTF19
VSS_NCTF18
VSS_NCTF17
VSS_NCTF16
VSS_NCTF15
VSS_NCTF14
VSS_NCTF13
VSS_NCTF12
VSS_NCTF11
VSS_NCTF10
VSS_NCTF9
VSS_NCTF8
VSS_NCTF7
VSS_NCTF6
VSS_NCTF5
VSS_NCTF4
VSS_NCTF3
VSS_NCTF2
VSS_NCTF1
VSS_NCTF0

VCC_NCTF10
VCC_NCTF9
VCC_NCTF8
VCC_NCTF7
VCC_NCTF6
VCC_NCTF5
VCC_NCTF4
VCC_NCTF3
VCC_NCTF2
VCC_NCTF1
VCC_NCTF0

5

VCCSM_NCTF31
VCCSM_NCTF30
VCCSM_NCTF29
VCCSM_NCTF28
VCCSM_NCTF27
VCCSM_NCTF26
VCCSM_NCTF25
VCCSM_NCTF24
VCCSM_NCTF23
VCCSM_NCTF22
VCCSM_NCTF21
VCCSM_NCTF20
VCCSM_NCTF19
VCCSM_NCTF18
VCCSM_NCTF17
VCCSM_NCTF16
VCCSM_NCTF15
VCCSM_NCTF14
VCCSM_NCTF13
VCCSM_NCTF12
VCCSM_NCTF11
VCCSM_NCTF10

VCCSM_NCTF9
VCCSM_NCTF8
VCCSM_NCTF7
VCCSM_NCTF6
VCCSM_NCTF5
VCCSM_NCTF4
VCCSM_NCTF3
VCCSM_NCTF2
VCCSM_NCTF1
VCCSM_NCTF0

VCC_NCTF78
VCC_NCTF77
VCC_NCTF76
VCC_NCTF75
VCC_NCTF74
VCC_NCTF73
VCC_NCTF72
VCC_NCTF71
VCC_NCTF70

NCTF

VCC_NCTF69
VCC_NCTF68
VCC_NCTF67
VCC_NCTF66
VCC_NCTF65
VCC_NCTF64
VCC_NCTF63
VCC_NCTF62
VCC_NCTF61
VCC_NCTF60
VCC_NCTF59
VCC_NCTF58
VCC_NCTF57
VCC_NCTF56
VCC_NCTF55
VCC_NCTF54
VCC_NCTF53
VCC_NCTF52
VCC_NCTF51
VCC_NCTF50
VCC_NCTF49
VCC_NCTF48
VCC_NCTF47
VCC_NCTF46
VCC_NCTF45
VCC_NCTF44
VCC_NCTF43
VCC_NCTF42
VCC_NCTF41
VCC_NCTF40
VCC_NCTF39
VCC_NCTF38
VCC_NCTF37
VCC_NCTF36
VCC_NCTF35
VCC_NCTF34
VCC_NCTF33
VCC_NCTF32
VCC_NCTF31
VCC_NCTF30
VCC_NCTF29
VCC_NCTF28
VCC_NCTF27
VCC_NCTF26
VCC_NCTF25
VCC_NCTF24
VCC_NCTF23
VCC_NCTF22
VCC_NCTF21
VCC_NCTF20
VCC_NCTF19
VCC_NCTF18
VCC_NCTF17
VCC_NCTF16
VCC_NCTF15
VCC_NCTF14
VCC_NCTF13
VCC_NCTF12
VCC_NCTF11

ALVISO_BGA1257

U5H

+1.8V

AB12
AC12
AD12
AB13
AC13
AD13
AC14
AD14
AC15
AD15
AC16
AD16
AC17
AD17
AC18
AD18
AC19
AD19
AC20
AD20
AC21
AD21
AC22
AD22
AC23
AD23
AC24
AD24
AC25
AD25
AC26
AD26

L17

+VCCP
M17
N17

P17
T17
U17
V17
W17
L18
M18
N18
P18
R18
Y18
L19
M19
N19
P19
R19
Y19
L20
M20
N20
P20
R20
Y20
L21
M21
N21
P21
T21
U21
V21
W21
L22
M22
N22
P22
R22
T22
U22
V22
W22
L23
M23
N23
P23
R23
T23
U23
V23
W23
L24
M24
N24
P24
R24
T24
U24
V24
W24
L25
M25
N25
P25
R25
T25
U25

4

www.laptopfix.vn

AA10

AD2
AE2
AH2
AL2
AN2

AA3
AB3
AC3

AF4
AN4

AL5
AP5

AA6
AC6
AE6

AA7
AG7
AK7
AN7

AL8

AA9
AC9
AE9
AH9
AN9
D10

Y10

H11
Y11

Y1
D2

G2

J2
L2
P2
T2
V2

A3
C3

AJ3

C4
H4
L4
P4
U4
Y4

E5

W5

B6
J6
L6
P6
T6

AJ6

G7

V7

C8
E8
L8
P8
Y8

A9
H9
K9
T9
V9

L10

F11

VSS271
VSS270
VSS269
VSS268
VSS260
VSS259
VSS258
VSS257
VSS256
VSS255
VSS254
VSS253
VSS252
VSS251
VSS250
VSS249
VSS248
VSS247
VSS246
VSS245
VSS244
VSS243
VSS242
VSS241
VSS240
VSS239
VSS238
VSS237
VSS236
VSS235
VSS234
VSS233
VSS232
VSS231
VSS230
VSS229
VSS228
VSS227
VSS226
VSS225
VSS224
VSS223
VSS222
VSS221
VSS220
VSS219
VSS218
VSS217
VSS216
VSS215
VSS214
VSS213
VSS212
VSS211
VSS210
VSS209
VSS208
VSS207
VSS206
VSS205
VSS204
VSS203
VSS202
VSS201
VSS200
VSS199
VSS198
VSS197
VSS196

ALVISO_BGA1257

VSS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

VSSALVDS

VSS195
VSS194
VSS193
VSS192
VSS191
VSS190
VSS189
VSS188
VSS187
VSS186
VSS185
VSS184
VSS183
VSS182
VSS181
VSS180
VSS179
VSS178
VSS177
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS168
VSS167
VSS166
VSS165
VSS164
VSS163
VSS162
VSS161
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS133
VSS132
VSS131
VSS130

U5I

B36
AA11

AF11
AG11
AJ11
AL11
AN11
B12
D12
J12
A14
B14
F14
J14
K14
AG14
AJ14
AL14
AN14
C15
K15
A16
D16
H16
K16
AL16
C17
G17
AF17
AJ17
AN17
A18
B18
U18
AL18
C19
H19
J19
T19
W19
AG19
AN19
A20
D20
E20
F20
G20
V20
AK20
C21
F21
AF21
AN21
A22
D22
E22
J22
AH22
AL22
H23
AF23
B24
D24
F24
J24
AG24
AJ24

AL24

VSS267

AN24

VSS266

A26

VSS265

E26

VSS264

G26

VSS263

J26

VSS262

B27

VSS261

E27

VSS129

G27

VSS128

W27

VSS127

AA27

VSS126

AB27

VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68

VSS

Title

Size Document Number Rev
Custom

Date: Sheet

AF27
AG27

AJ27
AL27

AN27

E28

W28
AA28
AB28
AC28

A29
D29
E29
F29
G29
H29

L29
P29
U29
V29

W29
AA29
AD29
AG29

AJ29

AM29

C30

Y30
AA30
AB30
AC30
AE30
AP30

D31

E31

F31

G31

H31

J31

K31

L31

M31

N31

P31

R31

T31

U31

V31

W31
AD31
AG31

AL31

A32
C32

Y32
AA32
AB32

2

U5J

AC32

VSS67

AD32

VSS66

AJ32

VSS65

AN32

VSS64

D33

VSS63

E33

VSS62

F33

VSS61

G33

VSS60

H33

VSS59

J33

VSS58

K33

VSS57

L33

VSS56

M33

VSS55

N33

VSS54

P33

VSS53

R33

VSS52

T33

VSS51

U33

VSS50

V33

VSS49

W33

VSS48

AD33

VSS47

AF33

VSS46

AL33

VSS45

C34

VSS44

AA34

VSS43

AB34

VSS42

AC34

VSS41

AD34

VSS40

AH34

VSS39

AN34

VSS38

B35

VSS37

D35

VSS36

E35

VSS35

F35

VSS34

G35

VSS33

H35

VSS32

J35

VSS31

K35

VSS30

L35

VSS29

M35

VSS28

N35

VSS27

P35

VSS26

R35

VSS25

T35

VSS24

U35

VSS23

V35

VSS22

W35

VSS21

Y35

VSS20

AE35

VSS19

C36

VSS18

AA36

VSS17

AB36

VSS16

AC36

VSS15

AD36

VSS14

AE36

VSS13

AF36

VSS12

AJ36

VSS11

AL36

VSS10

AN36

VSS9

E37

VSS8

H37

VSS7

K37

VSS6

M37

VSS5

P37

VSS4

T37

VSS3

V37

VSS2

Y37

VSS1

AG37

VSS0

ALVISO_BGA1257

Compal Electronics, Inc.

Alviso(5 of 5)

LA-3361P

1

0.3

of

11 43Thursday, September 21, 2006

A

B

C

D

E

+1.8V

1 1

220P_0402_50V7K

2 2

3 3

4 4

C562

220P_0402_50V7K

+1.8V +1.8V

C566

+1.8V

C580

220P_0402_50V7K

+1.8V

1

2

1

2

1

2

0304 EMI

DDR_CKE0_DIMMA<7>

DDR_CS1_DIMMA#<7>

1

2

1

2

DDR_A_BS#2<8>

DDR_A_BS#0<8>
DDR_A_WE#<8>

DDR_A_CAS#<8>

CK_SDATA<16>
CK_SCLK<16>

A

C563
220P_0402_50V7K

C567

220P_0402_50V7K

M_ODT1<7>

DDR_A_D0
DDR_A_D1

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS#2
DDR_A_MA12
DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#

DDR_A_CAS#
DDR_CS1_DIMMA#

M_ODT1
DDR_A_D32

DDR_A_D33
DDR_A_DQS#4

DDR_A_DQS4
DDR_A_D34

DDR_A_D35
DDR_A_D40

DDR_A_D41
DDR_A_DM5
DDR_A_D42

DDR_A_D43
DDR_A_D48

DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_DM7
DDR_A_D58

DDR_A_D59
CK_SDATA

CK_SCLK

+3VS

1 2

C609

0.1U_0402_16V4Z

JP44

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD

NC/CKE1

NC/A15
NC/A14

NC/A13

B

81
83
85
87
89
91
93
95
97

99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

FOX_ASOA426-M4R-TR

CONN@

+1.8V+1.8V

2

DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0

CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

VDD

VDD

VDD

VDD
RAS#

VDD
ODT0

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1

CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SAO

VSS

A11

BA1
S0#

SA1

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110
112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_A_D4
DDR_A_D5

DDR_A_DM0
DDR_A_D6

DDR_A_D7
DDR_A_D12

DDR_A_D13
DDR_A_DM1
M_CLK_DDR0

M_CLK_DDR#0
DDR_A_D14

DDR_A_D15

DDR_A_D20
DDR_A_D21

DDR_A_DM2
DDR_A_D22

DDR_A_D23
DDR_A_D28

DDR_A_D29
DDR_A_DQS#3

DDR_A_DQS3
DDR_A_D30

DDR_A_D31
DDR_CKE1_DIMMA

DDR_A_MA11
DDR_A_MA7DDR_A_MA9
DDR_A_MA6

DDR_A_MA4
DDR_A_MA2
DDR_A_MA0

DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#

M_ODT0
DDR_A_MA13

DDR_A_D36
DDR_A_D37

DDR_A_DM4
DDR_A_D38

DDR_A_D39
DDR_A_D44

DDR_A_D45
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D46

DDR_A_D47
DDR_A_D52

DDR_A_D53
M_CLK_DDR1

M_CLK_DDR#1
DDR_A_DM6
DDR_A_D54

DDR_A_D55
DDR_A_D60

DDR_A_D61
DDR_A_DQS#7

DDR_A_DQS7
DDR_A_D62

DDR_A_D63

R666 10K_0402_5%

1 2

R668 10K_0402_5%

1 2

www.laptopfix.vn

V_DDR_MCH_REF

M_CLK_DDR0 <7>
M_CLK_DDR#0 <7>

DDR_CKE1_DIMMA <7>

DDR_A_BS#1 <8>
DDR_A_RAS# <8>
DDR_CS0_DIMMA# <7>

M_ODT0 <7>

M_CLK_DDR1 <7>
M_CLK_DDR#1 <7>

0.1U_0402_16V4Z

2.2U_0805_16V4Z

1

1

C564

2

2

+1.8V

10U_0805_10V4Z@

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

V_DDR_MCH_REF <7>

C565

10U_0805_10V4Z@

1

C573

2

+1.8V

1

C587

0.1U_0402_16V4Z

2

DDR_A_MA2
DDR_A_MA4

DDR_A_MA5
DDR_A_MA8

DDR_A_MA10
DDR_A_MA11

DDR_A_BS#0
DDR_A_BS#2

DDR_A_RAS#
DDR_CKE0_DIMMA

DDR_CKE1_DIMMA
M_ODT1

10U_0805_10V4Z@

1

C574

2

10U_0805_10V4Z@

+1.8V

+

+0.9VS

0.1U_0402_16V4Z

1

2

C596

R647 56_0402_5%
R648 56_0402_5%

R651 56_0402_5%
R652 56_0402_5%

R655 56_0402_5%
R656 56_0402_5%

R659 56_0402_5%
R660 56_0402_5%

R663 56_0402_5%
R664 56_0402_5%

R669 56_0402_5%
R670 56_0402_5%

1

1

C575

2

2

1

C585
150U_D2_6.3VM

2

1

C588

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C597

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

C576

1

2

C598

10U_0805_10V4Z@

1

+

2

1

C577

2

C586
150U_D2_6.3VM

1

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

2

C599

+0.9VS

DDR_A_D[0..63]<8>

DDR_A_DM[0..7]<8>

DDR_A_DQS[0..7]<8>

DDR_A_MA[0..13]<8>

DDR_A_DQS#[0..7]<8>

10U_0805_10V4Z@

C589

0.1U_0402_16V4Z

1

1

C579

C578

2

2

10U_0805_10V4Z@

1

C590

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

1

2

2

C601

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

2

C602

D

C600

R645 56_0402_5%
R646 56_0402_5%

R649 56_0402_5%
R650 56_0402_5%

R653 56_0402_5%
R654 56_0402_5%

R657 56_0402_5%
R658 56_0402_5%

R661 56_0402_5%
R662 56_0402_5%

R665 56_0402_5%
R667 56_0402_5%

R671 56_0402_5%
R672 56_0402_5%

+1.8V

0.1U_0402_16V4Z

1

2

C603

DDR_A_D[0..63]
DDR_A_DM[0..7]
DDR_A_DQS[0..7]
DDR_A_MA[0..13]
DDR_A_DQS#[0..7]

C568

4.7U_0805_10V4Z

1

C591

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C604

DDR_A_MA0
DDR_A_MA1

DDR_A_MA3
DDR_A_MA6

DDR_A_MA7
DDR_A_MA9

DDR_A_MA12
DDR_A_MA13

DDR_A_BS#1
DDR_A_WE#

DDR_A_CAS#

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#

M_ODT0

Layout Note:
Place near DIMM

1

2

1

2

C569

0.1U_0402_16V4Z

1

2

1

2

0.1U_0402_16V4Z

C605

1

1

1

C570

C571

2

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C582

C581

1

1

2

2

C592

0.1U_0402_16V4Z

1

2

C606

Title

Size Document Number Rev

Date: Sheet

1

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C608

C607

Layout Note:
Place these resistor
closely DIMM0,all
trace length<750 mil

Layout Note:
Place these resistor
closely DIMM0,all
trace length
Max=1.3"

DDR2-SODIMM SLOT0

1

C572

2

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

0.1U_0402_16V4Z
C584

C583

1

2

1

C593

C594

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

LA-3361P

E

1

C595

2

0.1U_0402_16V4Z

of

12 43Thursday, September 21, 2006

0.3

5

4

3

2

1

C

B

E3

1

2

2222 SYMBOL(SOT23-NEW)

D D

+3VS

2

C1449

0.1U_0402_16V4Z

H_THERMDA<4>

H_THERMDC<4>

C C

H_THERMDA SMB_EC_CK2

H_THERMDC

+3VS

1

C1450
2200P_0402_50V7K

2

R1919

1 2

10K_0402_5%

1

THERM#

SMB_EC_CK2<29>

SMB_EC_DA2<29>

U40

1

VDD

2

D+

3

D­THERM#4GND

ADM1032AR_SOP8

SCLK

SDATA

ALERT#

SMB_EC_CK2
SMB_EC_DA2

8
7
6
5

SMB_EC_DA2

PWM Fan Control circuit

+5VS

JP50

1
2

ACES_85205-0200

CONN@

2

Title

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

Thermal sensor and Fan

LA-3361P

1

13 43Thursday, September 21, 2006

of

0.3

FAN

1

C1452

0.1U_0402_16V4Z

2

12

ZD1

@

RLZ5.1B_LL34

B B

10K_0402_5%@

+3VS

5

U41

1

FAN_PWM<29>

A A

5

4

www.laptopfix.vn

THERM#

INB

2

INA

P

G

TC7SH00FU_SSOP5

3

12

R2011

4

O

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D38
RB751V_SOD323

2 1

6

2

1

D

Q48

G

3

3

SI3456DV-T1_TSOP6

S

4 5

1

C1451

4.7U_0805_10V4Z

2

5

C12

0.1U_0402_16V4Z

D D

+LCDVDD

1

2

4

1

C13

0.1U_0402_16V4Z

2

3

2

1

LVDS connector

JP3

INVPWR_B+

+LCDVDD

+3VS

C1533680P_0402_50V7K

1

C C

12

2

LVDSBC+<9>

LVDSBC-<9>

LVDSB0+<9>

LVDSB0-<9>

LVDSB1+<9>

LVDSB1-<9>

C1534680P_0402_50V7K

C1535

LVDSB2+<9>

LVDSB2-<9>

12

680P_0402_50V7K

LVDSBC+
LVDSBC-

LVDSB0+
LVDSB0-

LVDSB1+
LVDSB1-

LVDSB2+
LVDSB2-

0809 Change pin define

0711 EMI request

L34 0_0805_5%

FBMA-L11-201209-221LMA30T_0805

0711 EMI request

ACES_88107-4000G

1 2

L35

@

1 2

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

CONN@

2

LVDSA2+

4

LVDSA2-

6

8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

LVDSA1+
LVDSA1-

LVDSA0+
LVDSA0-

LVDSAC+

LVDSAC-

INVTPWM
DISPLAYOFF#
DAC_BRIG
LCDP_CLK
LCDP_DAT

INVPWR_B+B+

LVDSA2+ <9>
LVDSA2- <9>
LVDSA1+ <9>

LVDSA1- <9>
LVDSA0+ <9>

LVDSA0- <9>

LVDSAC+ <9>
LVDSAC- <9>

12

12

680P_0402_50V7K

680P_0402_50V7K

C1536

C1537

0711 EMI request

DAC_BRIG <29>

Aviso LCD/PANEL BD. CONN.

+LCDVDD

12

R102

100_0402_5%

13

D

Q3

2N7002_SOT23

R2016

EN_LCDVDD<9>

1 2

8/18

0_0402_5%

@

S

C1551

DTC124EK_SC59

0.01U_0402_16V7K

+5VALW

8/18

Q1
R8
47K_0402_5%

1 2

2

G

13

2

Q2

C1532

0.047U_0402_16V7K

8/18

SI2301BDS_SOT23

1

C31

4.7U_0805_10V4Z

2

1 3

D

2

S

G

4.7U_0805_10V4Z

+3VS+LCDVDD

1

C2

2

B B

2.2K_0402_5%

LCD_CLK<9>

+2.5VS

LCD EEPROM

LCD_DAT<9>

A A

5

+3VS

R14

Q5

BSS138_SOT23

D

S

13

G

2

G

2

13

D

S

BSS138_SOT23

Q6

12

LCDP_DAT

12

R10

2.2K_0402_5%

LCDP_CLK

2006/08/09

+3VALW

C117

R9

12

BK_EN<9,29>

BKOFF#<29> BIA<9>

4

www.laptopfix.vn

100K_0402_5%

14

1

P

A

2

B

G

7

R2014

1 2

0_0402_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.1U_0402_16V4Z

U13A

3

O

SN74LVC08APW_TSSOP14@

3

@

12

+3VS

1 2

R120

3.3K_0402_5%

DISPLAYOFF#

R1

INVT_PWM<29>

2

1 2

0_0402_5%

R2

1 2

0_0402_5%

12

R22 100K_0402_5%@

Title

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

+3VS

5

U1

P

2

4

A

Y

G

NC7SZ14M5X_SOT23-5@

3

LVDS connector

LA-3361P

1

INVTPWM

14 43Thursday, September 21, 2006

of

0.3

5

4

3

2

1

CRT CONNECTOR

1

D D

MSEN#<29>

CRT_RED<9>

CRT_GRN<9>

CRT_BLU<9>

C616

HSYNC

1

2

VSYNC

HSYNC<9>

C C

0.1U_0402_16V4Z

VSYNC<9>

CRT_RED

CRT_GRN

CRT_BLU

+5VS

1

5

U35

P

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

3

5

A2Y

3

4

1

U36

P

4

OE#

G

74AHCT1G125GW_SOT353-5

12

12

1

1

C610

C611

R674

R673

75_0402_1%

75_0402_1%

2

2

10P_0402_50V8J
R46 0_0402_5%

R47 0_0402_5%

10P_0402_50V8J

12

12

L26 BK2125LL121_0805

1 2

L27 BK2125LL121_0805

1 2

L28 BK2125LL121_0805

1 2

12

1

C612
R675
75_0402_1%

2

10P_0402_50V8J

L29

1 2

FBMA-L11-160808-800LMT_0603

L30

1 2

FBMA-L11-160808-800LMT_0603

+5VS

D24

1

2

22P_0402_50V8J

2

3

DAN217_SC59@

1

D21

DAN217_SC59

2

@

C613

D22

DAN217_SC59

3

2

@

1

C614

2

22P_0402_50V8J

D25

1

DAN217_SC59@

1

D23

DAN217_SC59

3

2

@

1

C615

2

22P_0402_50V8J

2

3

10P_0402_50V8J

1

+2.5VS

3

C617

1

2

1

C618

10P_0402_50V8J

2

MSEN#

CRTL_R
SMBDAT

CRTL_G

CRTL_B

SMBCLK

CRT_HSYNCRFL

CRT_VSYNCRFL

220P_0402_25V8K

CRT_VCC

JP45
SUYIN_070112FR015S222XU

6

11

1
7

12

16

2

17

8

13

3
9

14

4
10
15

5

CONN@

1

C619

2

+5VS CRT_VCC

B B

A A

5

4

www.laptopfix.vn

R_CRT_VCC

D26

2 1

RB411D_SOT23

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

F1

1A_6VDC_MINISMDC110

0.1U_0402_16V4Z

21

1

C620

2

220P_0402_25V8K

R680

4.7K_0402_5%

1

C621

2

R679

4.7K_0402_5%

SMBDAT CRT_SMBDAT

Q45

2N7002_SOT23

SMBCLK

C622

1

2

1 3

220P_0402_25V8K

D

2

1 3

S

G

+3VS

2

Q44
2N7002_SOT23

D

S

G

2

CRT_SMBCLK

2.2K_0402_5%

+2.5VS

12

12

R676

Title

Size Document Number Rev
Custom

Date: Sheet

R677

2.2K_0402_5%

CRT_SMBDAT <9>

CRT_SMBCLK <9>

Compal Electronics, Inc.

CRT

LA-3361P

1

15 43Thursday, September 21, 2006

of

0.3

5

+3VS

D

ICH_SMBDATA<19>

D D

+3VS

ICH_SMBCLK<19>

ICH_SMBCLK

1 3

1 3

D

D
1

3

G

S

2

2N7002

G

2

2

G

R330

10K_0402_5%

S

Q36
2N7002_SOT23

Q38
2N7002_SOT23

S

CK_VDD_A

12

12

R349

10K_0402_5%

CK_SDATAICH_SMBDATA

CK_SCLK

1

2

C444

4.7U_0805_10V4Z

0 0 1 for Dothan-B 533Mhz
1 0 1 for Dothan-B 400Mhz

FSC FSB FSA CPU

CLKSEL0 CLKSEL1 CLKSEL2

C C

*

0
0
0
1
1
1

00
0

1
0

1
11
0

0

0

1
0

1

0

11
Table : ICS 954226

+VCCP

B B

1 2

CLKSEL1

R451

4.7K_0402_5%

1 2

R339
0_0402_5%

1 2

R394

0_0402_5%

5

CLKSEL0

CPU_BSEL0<5>

A A

CPU_BSEL1<5>

+VCCP

R329

1 2

R340

1 2

R401

1 2

R395

1 2

10K_0402_5%

10K_0402_5%@

10K_0402_5%

10K_0402_5%@

MHz

266
133
200
166
333
100
400

SRC
MHz

100 33.30
100
100
100
100
100
100

RESERVED

R331

12

1K_0402_5%

R400

12

1K_0402_5%

PCI
MHz

33.3

33.3

33.3

33.3

33.3

33.3

CLK_33M_CBS<23>

CLK_33M_MPCI<24>

CLK_33M_ICH<17>

CLK_33M_LPCEC<29>

MCH_CLKSEL0 <7>

MCH_CLKSEL1 <7>

4

CK_SDATA <12>

CK_SCLK <12>

CK_VDD_48

1

2

C434

0.047U_0402_16V4Z

CLK_48M_ICH<19>

+3VS

R389
10K_0402_5%

1 2

R416

1 2

1

1

2

2

C460

33P_0402_50V8J

33P_0402_50V8J

CLKSEL2

10K_0402_5%@

4

C475

4.7U_0805_10V4Z

C428

12

X1 14.318MHZ_20P_1BX14318BE1A

C431

12

CLK_48M_ICH
CLKSEL0

PS: When CB714 unpop, R415 12 Ohm change to 33 Ohm

CLKSEL1

CLK_33M_CBS

CLK_33M_LPCEC

www.laptopfix.vn

+3VS

1

C474

2

0.1U_0402_16V4Z

KC FBM-L11-201209-221LMAT_0805

0713 EMI Request

CK_VDD_REF

0.047U_0402_16V4Z

Place crystal within
500 mils of CKGEN

12

R415 33_0402_5%

+3VS

R385 10K_0402_5%

L31

1 2

KC FBM-L11-201209-221LMAT_0805

0713 EMI Request

+CK_VDD_MAIN2

L32

1 2

1

2

C433

0.047U_0402_16V4Z

CK_XTAL_IN

CK_XTAL_OUT

12

12

R375 33_0402_5%

12

R377 33_0402_5%

12

R379 33_0402_5%

12

R376 33_0402_5%

1 2

1 2

R323 475_0402_1%

3

+CK_VDD_MAIN

2

C483
10U_0805_10V4Z

1

1

C432

0.047U_0402_16V4Z

2

1

C473

0.047U_0402_16V4Z

2

2

1

C435

0.047U_0402_16V4Z

2

Place near each pin
W>40 mil

2

C469
10U_0805_10V4Z

1

U28

21

VDDPCIEX_0

28

VDDPCIEX_1

34

VDDPCIEX_2

1

VDDPCI_0

7

VDDPCI_1

42

CK_VDD_REF

1 2

R338
1_0603_5%

CK_VDD_48

1 2

R368

2.2_0603_5%

CLKSEL2

PCICLK5

PCICLK3CLK_33M_MPCI

PCICLKF1CLK_33M_ICH

PCICLKF0

CK_SCLK

CK_SDATA

CLKIREF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

VDDCPU

48

VDDREF

11

VDD48

50

X1

49

X2

12

FS_A/USB_48MHz

53

REF1/FSLC/TEST_SEL

16

FSLB/TEST_MODE

5

PCICLK5

4

PCICLK4

3

PCICLK3

56

PCICLK2/REQ_SEL

9

SELPCIEX_LCDCLK#/PCICLK_F1

8

ITP_EN/PCICLK_F0

46

SCLK

47

SDATA

39

IREF

13

GND_0

29

GND_1

2

GND_2

45

GND_3

51

GND_4

6

GND_5

ICS954226AGT_TSSOP56

1

C429

0.047U_0402_16V4Z

2

R367

2.2_0603_5%

1 2

PCI/SRC_STOP#

CPUCLKT2_ITP/PCIEXT6
CPUCLKC2_ITP/PCIEXC6

PEREQ1#/PCIEXT5
PEREQ2#/PCIEXC5

LCDCLK_SS/PCIEX0T
LCDCLK_SS/PCIEX0C

VTT_PWRGD#/PD

Table : ICS 954226

1

C477

0.047U_0402_16V4Z

2

CK_VDD_A

VDDA

GNDA

CPU_STOP#

CPUCLKT1
CPUCLKC1

CPUCLKT0
CPUCLKC0

PCIEXT4
PCIEXC4

SATACLKT
SATACLKC

PCIEXT3
PCIEXC3

PCIEXT2
PCIEXC2

PCIEXT1
PCIEXC1

DOTT_96MHz
DOTC_96MHz

REF0

Place near ICS954226

37
38

H_STP_PCI#

55

H_STP_CPU#

54

CK_CPU1

41
40

44
43

36
35

33
32

31
30

26
27

24
25

22
23

19
20

17
18

14
15

10
52

1 2

R356 33_0402_5%

CK_CPU1#

1 2

R357 33_0402_5%

CK_CPU0
CK_CPU0#

CK_CPU2
CK_CPU2#

SRC5
SRC5#

SRC1
SRC1# CLK_PCIE_ICH#

SRC0
SRC0# SSC_DREFCLK#

DOTCLK
DOTCLK#

CLKREF

1 2

R341 33_0402_5%

1 2

R342 33_0402_5%

1 2

R343 33_0402_5%@

1 2

R344 33_0402_5%@

1 2

R352 33_0402_5%

1 2

R353 33_0402_5%

1 2

R410 33_0402_5%

1 2

R411 33_0402_5%

1 2

R382 33_0402_5%

1 2

R383 33_0402_5%

R408 33_0402_5%

1 2

R409

1 2

1 2

R355 33_0402_5%

1 2

R2010 33_0402_5%

2

1

C478

0.047U_0402_16V4Z

2

H_STP_PCI# <19>
H_STP_CPU# <19,37>

CLK_MCH_BCLK
CLK_MCH_BCLK#

CLK_MCH_3GPLL
CLK_MCH_3GPLL#

CLK_PCIE_ICH

SSC_DREFCLK

33_0402_5%

CLK_14M_ICH
CLK_14M_SIO

1

CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_ITP
CLK_ITP#

CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#

SSC_DREFCLK
SSC_DREFCLK#
DREFCLK
DREFCLK#

CLK_MCH_BCLK <7>
CLK_MCH_BCLK# <7>

CLK_CPU_BCLK
CLK_CPU_BCLK#

CLK_ITP
CLK_ITP#

DREFCLK
DREFCLK#

Title

Size Document Number Rev
Custom

Date: Sheet

CLK_CPU_BCLK <4>
CLK_CPU_BCLK# <4>

CLK_ITP <4>
CLK_ITP# <4>

CLK_MCH_3GPLL <9>
CLK_MCH_3GPLL# <9>

CLK_PCIE_ICH <19>
CLK_PCIE_ICH# <19>

SSC_DREFCLK <7>
SSC_DREFCLK# <7>

DREFCLK <7>
DREFCLK# <7>

R398

10K_0402_5%

CLK_14M_ICH <19>

CLK_14M_SIO <29>

Q42

2N7002_SOT23

Compal Electronics, Inc.

Clock Generator

LA-3361P

12

R332 49.9_0402_1%

12

R333 49.9_0402_1%

12

R321 49.9_0402_1%

12

R322 49.9_0402_1%

12

R319 49.9_0402_1%

12

R320 49.9_0402_1%

1 2

R420 49.9_0402_1%

1 2

R421 49.9_0402_1%

1 2

R345 49.9_0402_1%

1 2

R346 49.9_0402_1%

R390 49.9_0402_1%

1 2

R391 49.9_0402_1%

1 2

R418 49.9_0402_1%

1 2
1 2

R419 49.9_0402_1%

+3VS

12

VGATE<19,37>

13

D

2

G

S

1

16 43Thursday, September 21, 2006

0.3

of

5

4

3

2

1

Change to DAU00 REQ/GNT# Setting
REQ/GNT#0 for MINI PCI

+3VS

D D

+3VS

+3VS

C C

+3VS

+3VS

+3VALW

RP45

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

RP43

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%
RP44

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

PME# signal has an integrated pull-up of 18 k to 42 k

B B

PCI_SERR#
PCI_FRAME#
PCI_TRDY#
PCI_STOP#

PCI_PERR#
PCI_DEVSEL#
PCI_PLOCK#
PCI_IRDY#

PCI_PIRQC#
PCI_PIRQH#
PCI_PIRQD#
PCI_PIRQB#

RP47

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%
RP48

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

1 2

1 2
1 2

1 2

R254 10K_0402_1%@

R2768.2K_0402_5%

R2448.2K_0402_5%
R2618.2K_0402_5%

ICH_PME#

PCI_PIRQA#
PCI_REQ4#
PCI_PIRQG#
PCI_REQ1#

PCI_REQ0#
PCI_PIRQF#
PCI_PIRQE#
PCI_REQ3#

PCI_REQ2#

PCI_REQ5#
EC_SCI#

PCI_AD[0..31]<23,24>

PCI_FRAME#<23,24>

PCI_PIRQC#<23>

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_FRAME#

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

SA8280108G0 S IC 030 FW82801FBM B2 BGA 609P ICH6-M ->
SA8280108E0(R3)/SA8280108D0(R1) S IC 030 FW82801FBM QS ICH6-M BGA 609P

U9B

E2

AD[0]

E5

AD[1]

C2

AD[2]

F5

AD[3]

F3

AD[4]

E9

AD[5]

F2

AD[6]

D6

AD[7]

E6

AD[8]

D3

AD[9]

A2

AD[10]

D2

AD[11]

D5

AD[12]

H3

AD[13]

B4

AD[14]

J5

AD[15]

K2

AD[16]

K5

AD[17]

D4

AD[18]

L6

AD[19]

G3

AD[20]

H4

AD[21]

H2

AD[22]

H5

AD[23]

B3

AD[24]

M6

AD[25]

B2

AD[26]

K6

AD[27]

K3

AD[28]

A5

AD[29]

L1

AD[30]

K4

AD[31]

J3

FRAME#

Interrupt I/F

N2

PIRQ[A]#

L2

PIRQ[B]#

M1

PIRQ[C]#

L3

PIRQ[D]#

AC5

SATA[1]RXN/RSVD[1]

AD5

SATA[1]RXP/RSVD[2]

AF4

SATA[1]TXN/RSVD[3]

AG4

SATA[1]TXP/RSVD[4]

AC9

SATA[3]RXN/RSVD[5]

AD9

SATA[3]RXP/RSVD[6]

AF8

SATA[3]TXN/RSVD[7]

AG8

SATA[3]TXP/RSVD[8]

U3

TP[3]/RSVD[9]

ICH6_BGA609

PCI

REQ[4]#/GPI[40]

GNT[4]#/GPO[48]

REQ[5]#/GPI[1]

GNT[5]#/GPO[17]

REQ[6]#/GPI[0]

GNT[6]#/GPO[16]

PIRQ[E]#/GPI[2]
PIRQ[F]#/GPI[3]

PIRQ[G]#GPI[4]

PIRQ[H]#/GPI[5]

RESERVED

REQ[0]#
GNT[0]#
REQ[1]#
GNT[1]#
REQ[2]#
GNT[2]#
REQ[3]#
GNT[3]#

C/BE[0]#
C/BE[1]#
C/BE[2]#
C/BE[3]#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#

STOP#
TRDY#

PLTRST#

PCICLK

PME#

PCI_REQ0#

L5

PCI_GNT0#

C1

PCI_REQ1#

B5
B6

PCI_REQ2#

M5

PCI_GNT2#

F1

PCI_REQ3#

B8
C8

PCI_REQ4#

F7
E7

PCI_REQ5#

E8
F6

EC_SCI#

B7
D8

PCI_C_BE0#

J6

PCI_C_BE1#

H6

PCI_C_BE2#

G4

PCI_C_BE3#

G2

PCI_IRDY#

A3

PCI_PAR

E1

PCI_PCIRST#

R2

PCI_DEVSEL#

C3

PCI_PERR#

E3

PCI_PLOCK#

C5

PCI_SERR#

G5

PCI_STOP#

J1

PCI_TRDY#

J2

PLTRST#

R5

CLK_33M_ICH

G6

ICH_PME#

P6

PCI_PIRQE#

D9

PCI_PIRQF#

C7

PCI_PIRQG#

C6

PCI_PIRQH#

M3

PCI_REQ0# <24>
PCI_GNT0# <24>

PCI_REQ2# <23>
PCI_GNT2# <23>

EC_SCI# <29>

PCI_C_BE0# <23,24>
PCI_C_BE1# <23,24>
PCI_C_BE2# <23,24>
PCI_C_BE3# <23,24>

PCI_IRDY# <23,24>
PCI_PAR <23,24>

PCI_DEVSEL# <23,24>
PCI_PERR# <23,24>

PCI_SERR# <23,24>
PCI_STOP# <23,24>
PCI_TRDY# <23,24>

CLK_33M_ICH <16>

ICH_PME# <24,29>

PCI_PIRQE# <24>

PCI_PIRQF# <24>

REQ/GNT#2 for Cardbus

+3VALW

14

12

P

A

O

13

B

G

7

PLTRST#

PCI_PCIRST#

Change to DAU00 IRQ Setting
PCI_PIRQC# for Cardbus

、

F# for Mini PCI

PCI_PIRQE

U13D

11

SN74LVC08APW_TSSOP14@

+3VALW

14

U13B

4

P

A

6

O

5

B

G

7

SN74LVC08APW_TSSOP14@

R48 0_0402_5%

R49 0_0402_5%

CLK_33M_ICH

12

+3VALW

14

U13C

9

P

A

O

10

B

G

7

SN74LVC08APW_TSSOP14@

12

R264
10_0402_5%@

1 2
1

C348

2

PCIRSTB2#

PCIRSTB3#

8

8.2P_0402_50V@

R63 33_0402_5%

1 2

R61

33_0402_5%

1 2

PLTRST_MCH# <7,21,23>

PCIRST# <23,24,29>

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, Inc.

ICH6(1/4)

LA-3361P

1

17 43Thursday, September 21, 2006

0.3

of

5

+RTCVCC

12

R69

D D

+RTCVCC

12

12

1M_0402_5%

R81

330k_0402_5%@

INTVRMEN

R50
0_0402_5%

+RTCVCC

1 2

R67
20K_0402_5%

1U_0603_10V4Z

JOPEN1

1 2

SHORT PADS

C114

1 2

32.768KHZ_12.5P_1TJS125DJ2A073

ICH_RTCRST#

+3VALW

1

C1508

0.1U_0402_16V4Z

2

6/21

EEP_SK

12

C C

R80
20K_0402_5%

Check list rev1.701

LAN_TXD0
LAN_TXD1
LAN_TXD2

0915

+3VS +3VS

12

R187

4.7K_0402_5%@

B B

IDE_HIORDY IDE_HIRQ

12

R190

8.2K_0402_5%@

Colse to SB

R2023

C1554

1 2

33_0402_5%

1

2

33P_0402_50V8J

C1555

R2024

1 2
1

2

33_0402_5%

C1556

33P_0402_50V8J

U42

8

VCC

7

NC

6

NC

5

GND

AT93C46-10SI-2.7_SO8

AC97_CODEC_SDOUT<25>

R2025

33_0402_5%

1 2
1

2

33P_0402_50V8J

4

C115

15P_0402_50V8J

Y2

2

NC

3

NC

C113

15P_0402_50V8J

EEP_CS

1

CS
SK

DO

EMI

AC97_BITCLK<25>

AC97_SYNC<25>

AC97_RST#<25>
AC97_SDIN0<25>

EEP_SK

2

EEP_DOUT

3

DI

EEP_DIN

4

LAN_JCLK<22>

LAN_RSTSYNC<22>

LAN_RXD0<22>
LAN_RXD1<22>
LAN_RXD2<22>

LAN_TXD0<22>
LAN_TXD1<22>
LAN_TXD2<22>

C623

10P_0402_25V8K@

IDE_HIORDY<21>

IDE_HIRQ<21>
IDE_HDACK#<21>
IDE_HDIOW#<21>
IDE_HDIOR#<21>

ICH_RTCX1

12

1

IN

4

OUT

12

6/21

12

1 2

R6 33_0402_5%

R65

ICH_RTCX2INTRUDER#

INTRUDER#
INTVRMEN

LAN_JCLK
LAN_RSTSYNC
LAN_RXD0

LAN_RXD1
LAN_RXD2

LAN_TXD0
LAN_TXD1
LAN_TXD2

R697 10_0402_5%

1 2

@

R70333_0402_5%

AC97_SDIN0

AC97_SDOUT

IDE_HIORDY
IDE_HIRQ
IDE_HDACK#
IDE_HDIOW# IDE_HDREQ
IDE_HDIOR#

12

10M_0402_5%

AC97_BITCLK
AC97_SYNC

AC97RST#

12

AC19

AG2

AG6

AG11
AF11

AF16
AB16
AB15
AC14
AE16

Y1

Y2
AA2
AA3

AA5

D12
B12
D11

F13

F12
B11
E12

E11
C13

C12
C11
E13

C10

B9

A10

F11

F10
B10

C9

AE3
AD3

AF2
AD7

AC7
AF6

AC2
AC1

U9A

RTCX1
RTCX2

RTCRST#
INTRUDER#

INTVRMEN

EE_CS
EE_SHCLK
EE_DOUT
EE_DIN

LAN_CLK
LAN_RSTSYNC
LANRXD[0]

LANRXD[1]
LANRXD[2]

LANTXD[0]
LANTXD[1]
LANTXD[2]

ACZ_BIT_CLK
ACZ_SYNC

ACZ_RST#
ACZ_SDIN[0]

ACZ_SDIN[1]
ACZ_SDIN[2]

ACZ_SDO

SATALED#

SATA[0]RXN
SATA[0]RXP
SATA[0]TXN
SATA[0]TXP

SATA[2]RXN
SATA[2]RXP
SATA[2]TXN
SATA[2]TXP

SATA_CLKN
SATA_CLKP

SATARBIAS#
SATARBIAS

IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#

ICH6_BGA609

3

RTC

LAD[0]/FWH[0]
LAD[1]/FWH[1]
LAD[2]/FWH[2]
LAD[3]/FWH[3]

LPC

LDRQ[1]#/GPI[41]

LFRAME#/FWH[4]

LAN

CPU

DPRSLP#/TP[4]

DPSLP#/TP[2]

CPUPWRGD/GPO[49]

THRMTRIP#

SATAAC-97/AZALIA

LDRQ[0]#

A20GATE

A20M#

CPUSLP#

FERR#

IGNNE#

INIT3_3V#

INIT#

INTR

RCIN#

SMI#

STPCLK#

DA[0]
DA[1]
DA[2]

DCS1#
DCS3#

DD[0]
DD[1]
DD[2]
DD[3]

PIDE

DD[4]
DD[5]
DD[6]
DD[7]
DD[8]

DD[9]
DD[10]
DD[11]
DD[12]
DD[13]
DD[14]
DD[15]

DDREQ

2

LPC_LAD0

P2

LPC_LAD1

N3

LPC_LAD2

N5

LPC_LAD3

N4

LPC_LDRQ0#

N6
P4

LPC_LFRAME#

P3

GATEA20

AF22

H_A20M#

AF23

CPUSLP#

AE27
AE24

AD27
AF24
AG25
AG26

AE22
AF27
AG24

AD23
AF25

NMI

AG27
AE26
AE23

AC16
AB17
AC17

AD16
AE17

AD14
AF15
AF14
AD12
AE14
AC11
AD11
AB11
AE13
AF13
AB12
AB13
AC13
AE15
AG15
AD13

AB14

R45 0_0402_5%@

H_PWRGOOD
H_IGNNE#
H_INIT#

H_INTR

KBRST#
H_NMI

H_SMI#
H_STPCLK#
THRMTRIP_ICH#

IDE_HDA0
IDE_HDA1
IDE_HDA2

IDE_HDCS1#
IDE_HDCS3#

IDE_HDD0
IDE_HDD1
IDE_HDD2
IDE_HDD3
IDE_HDD4
IDE_HDD5
IDE_HDD6
IDE_HDD7
IDE_HDD8
IDE_HDD9
IDE_HDD10
IDE_HDD11
IDE_HDD12
IDE_HDD13
IDE_HDD14
IDE_HDD15

1 2

LPC_LAD[0..3] <29>

LPC_LDRQ0# <29>

LPC_LFRAME# <29>

12

H_PWRGOOD <4>
H_IGNNE# <4>
H_INIT# <4>

H_INTR <4>

KBRST# <29>

H_NMI <4>
H_SMI# <4>

H_STPCLK# <4>

H_THERMTRIP#

R201
56_0402_5%

IDE_HDA0 <21>
IDE_HDA1 <21>
IDE_HDA2 <21>

IDE_HDCS1# <21>
IDE_HDCS3# <21>

IDE_HDD[0..15] <21>

IDE_HDREQ <21>

H_CPUSLP#
H_DPRSLP#

H_DPSLP#
H_FERR#

GATEA20 <29>

H_A20M# <4>
H_CPUSLP# <4,7>
H_DPRSLP# <4>

H_DPSLP# <4>
H_FERR# <4>

+VCCP

+VCCP

H_THERMTRIP#<4,7>

R201 place within 2" from ICH
R194 place within 2" from R201

H_FERR# close as ICH6 0.5"

H_FERR#

H_DPRSLP#

R193
330_0402_5%@

1 2

1 2

C264
1U_0603_10V4Z@

1 2

R194
75_0402_5%

1

R203

56_0402_5%

R202

56_0402_5%@

+VCCP

12

12

MAINPWON <34,38>

1

C

Q21

2

B

2SC2411K_SOT23@

E

3

H_THERMTRIP#

R1923

9/05

JP55

BATT1.1

+-

1

+

W=20mils

SUYIN_060003FA002TX00NL~D

2

2

-

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

BATT1

CR2032 RTC BATTERY

ICH6(2/4)

LA-3361P

1

18 43Thursday, September 21, 2006

0.3

of

+RTCVCC

DAN202U_SC70

2

C1458
1U_0603_10V4Z

1

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+3VLP

D42

2

1

1 2

3

1K_0402_5%

5

2.2K_0402_5%

R289

1 2

SB_CLKRUN#

CLK_48M_ICH

1 2
2

1

LINKALERT#

XDP_DBRESET#

ICH_BATLOW#

ICH_PCIE_WAKE#

MCH_SYNC#

SIRQ

+3VALW

10K_0402_5%

10K_0402_5%

R292

1 2

R290

1 2

1 2

ICH_SMBDATA
ICH_SMBCLK
ICH_SMLINK0

12

R209

8.2K_0402_5%

ICH_SMLINK1

+3VS

5/30

R186

10_0402_5%@

1 2

2

C269

4.7P_0402_50V8C@

1

+3VS

GPIO 23 PLTRST_VGA# Delete 5/16

12

R23 10K_0402_5%

12

R24 10K_0402_5%

+3VALW

2.2K_0402_5%

R291

4.7P_0402_50V8C@

1 2

R271
10K_0402_5%

1 2

R66
10K_0402_5%

1 2

R64

8.2K_0402_5%

1 2

R267
680_0402_5%

1 2

R205
10K_0402_5%

1 2

R211
10K_0402_5%

1 2

CLK_14M_ICH

R238

10_0402_5%@

C327

OVP_OV#

5

D D

C C

B B

A A

ICH_SMBDATA<16>

ICH_SMBCLK<16>

Requires a PU Resistor to Vcc3_3(CRB uses 8.2K to Vcc3_3)
CLK RUN no work to pull down

CLK_14M_ICH<16>

CLK_48M_ICH<16>

+3VALW

R734 10K_0402_5%

+3VALW

+3VALW

+3VALW

+3VALW

+3VS

+3VS

8.2 k pull-up to Vcc3_3(CRB uses 10 k)

4

Reserve

Inform BIOS team

ICH6 VER1.5 GPI12 +3VS plan

GPI7

GPI12

Support wake on LAN R70 @
Support wake on LAN R71 0 ohm

RSMRST#<23,29>

EC_LANRST#<29>

PM_DPRSLPVR

12

Signal has integrated pull-down in ICH

May need pulldown for DPRSLPVR in case
the ICH6m does not set this value in time
for boot.

4

www.laptopfix.vn

R70 0_0402_5%

R71 0_0402_5%@

R208
100K_0402_5%

1 2

1 2

XDP_DBRESET#<4>

SB_INT_FLASH_SEL#<30>

+3VS

CLKRUN#<23,24,29>

+3VS power plan

+3VS

RP2

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%@

RP1

1 8
2 7
3 6
4 5

100_1206_8P4R_5%

SPKR<25>

SUS_STAT#<30>

PM_BMBUSY#<7>

EC_SMI#<29>
OVP_OV#<29>

LID_SWOUT#<29>
H_STP_PCI#<16>

H_STP_CPU#<16,37>

R210 10K_0402_5%@

XMIT#<24>

EC_FLASH#<30>

SIRQ<23,29>

THERM_SCI#<29>

VGATE<16,37>

SLP_S3#<29>
SLP_S4#<29>
SLP_S5#<29>

ICH_PWRGD<29>

PM_DPRSLPVR<37>

PWRBTN_OUT#<29>

3

1 2

1 2

R19 0_0402_5%

T35
PAD

+3VALW

12

R272

10K_0402_5%

ICH_RI#

ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1
MCH_SYNC#
SPKR

SUS_STAT#
XDP_DBRESET#
PM_BMBUSY#

EC_SMI#

R1924 0_0402_5%

H_STP_PCI#
SB_INT_FLASH_SEL#
H_STP_CPU#

XMIT#

ICH_PCIE_WAKE#
SIRQ
THERM_SCI#
VGATE
CLK_14M_ICH
CLK_48M_ICH

ICH_SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

ICH_PWRGD
PM_DPRSLPVR
ICH_BATLOW#
PWRBTN_OUT#

RSMRST#

1 2

GPI7

GPI12

SB_CLKRUN#

12

10K_0402_5%

R284

12

T2

AF17
AE18
AF18
AG18

Y4

W5

Y5

W4

U6

AG21

F8

W3

U2
AD19
AE19

R1

W6

M2

R6
AC21
AB21
AD22

AD20
AD21

V3
P5

R3

T3
AF19
AF20
AC18

U5
AB20
AC20
AF21

E10
A27

V6
T4

T5
T6

AA1

AE20

V2

U1

V5
Y3

10K_0402_5%

R278

U9C

RI#
SATA[0]GP/GPI[26]

SATA[1]GP/GPI[29]
SATA[2]GP/GPI[30]
SATA[3]GP/GPI[31]

SMBCLK
SMBDATA
LINKALERT#
SMLINK[0]
SMLINK[1]
MCH_SYNC#
SPKR

SUS_STAT#/LPCPD#
SYS_RESET#
BM_BUSY#/GPI[6]
GPI[7]

GPI[8]
SMBALERT#/GPI[11]
GPI[12]

GPI[13]
STP_PCI#/GPO[18]
GPO[19]
STP_CPU#/GPO[20]

GPO[21]
GPO[23]

GPIO[24]
GPIO[25]

GPIO[27]
GPIO[28]
CLKRUN#/GPIO[32]
GPIO[33]
GPIO[34]

WAKE#
SERIRQ
THRM#
VRMPWRGD
CLK14
CLK48
SUSCLK
SLP_S3#

SLP_S4#
SLP_S5#

PWROK
DPRSLPVR/TP[1]
BATLOW#/TP[0]
PWRBTN#
LAN_RST#
RSMRST#

ICH6_BGA609

GPIO

CLOCK

POWER MGT

2

H25

PERn[1]

H24

PERp[1]

G27

PETn[1]

G26

PETp[1]

K25

PERn[2]

K24

PERp[2]

J27

PETn[2]

J26

PETp[2]

M25

PERn[3]

M24

PERp[3]

L27

PETn[3]

L26

PETp[3]

P24

PERn[4]

P23

PERp[4]

N27

PETn[4]

N26

PCI-EXPRESSDIRECT MEDIA INTERFACE

OC[5]#/GPI[10]
OC[6]#/GPI[14]
OC[7]#/GPI[15]

USB

OVCUR#2
OVCUR#3

PETp[4]

DMI[0]RXN

DMI[0]RXP
DMI[0]TXN
DMI[0]TXP

DMI[1]RXN

DMI[1]RXP
DMI[1]TXN
DMI[1]TXP

DMI[2]RXN

DMI[2]RXP
DMI[2]TXN
DMI[2]TXP

DMI[3]RXN

DMI[3]RXP
DMI[3]TXN
DMI[3]TXP

DMI_CLKN

DMI_CLKP

DMI_ZCOMP
DMI_IRCOMP
OC[4]#/GPI[9]

OC[0]#
OC[1]#
OC[2]#
OC[3]#

USBP[0]N
USBP[0]P
USBP[1]N
USBP[1]P
USBP[2]N
USBP[2]P
USBP[3]N
USBP[3]P
USBP[4]N
USBP[4]P
USBP[5]N
USBP[5]P
USBP[6]N
USBP[6]P
USBP[7]N
USBP[7]P

USBRBIAS#

USBRBIAS

1 2

R2017 0_0402_5%@

1 2

R2018 0_0402_5%@

T25
T24
R27
R26

V25
V24
U27
U26

Y25
Y24
W27
W26

AB24
AB23
AA27
AA26

AD25
AC25

F24
F23
C23

D23
C25
C24

C27
B27
B26
C26

C21
D21
A20
B20
D19
C19
A18
B18
E17
D17
B16
A16
C15
D15
A14
B14

A22
B22

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

OVCUR#4
OVCUR#5
OVCUR#6
OVCUR#7

OVCUR#0
OVCUR#1
OVCUR#2
OVCUR#3

USBP0­USBP0+
USBP1­USBP1+
USBP2­USBP2+
USBP3­USBP3+

USBRBIAS

08/10 Add two USB port to subboard

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

CLK_PCIE_ICH#
CLK_PCIE_ICH

DMI_IRCOMP

closed to 500 mils

1 2

22.6_0402_1%

1

T31PAD
T33PAD
T32PAD
T34PAD

DMI_RXN0 <7>
DMI_RXP0 <7>
DMI_TXN0 <7>
DMI_TXP0 <7>

DMI_RXN1 <7>
DMI_RXP1 <7>
DMI_TXN1 <7>
DMI_TXP1 <7>

DMI_RXN2 <7>
DMI_RXP2 <7>
DMI_TXN2 <7>
DMI_TXP2 <7>

DMI_RXN3 <7>
DMI_RXP3 <7>
DMI_TXN3 <7>
DMI_TXP3 <7>

CLK_PCIE_ICH# <16>
CLK_PCIE_ICH <16>

R199 24.9_0402_1%

1 2

USBP0- <28>
USBP0+ <28>
USBP1- <28>
USBP1+ <28>

08/10

+1.5VS

OVCUR#0
OVCUR#1

1 2

R17 0_0402_5%@

1 2

R18 0_0402_5%@

OVCUR#2
OVCUR#6
OVCUR#7
OVCUR#5

OVCUR#0
OVCUR#3
OVCUR#1
OVCUR#4

RP42

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%

RP46

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%

+3VALW

+3VALW

06/23 change R to RP

R51

SYSON#<28,31>

08/14

Title

Size Document Number Rev

Date: Sheet

USBPN/USBPP impedance 45 Ohm

JP59

USBP3+
USBP3-

+5VALW

USBP2­USBP2+

SYSON#

1
2
3
4
5
6
7
8
9

10

ACES_87212-10G0

CONN@

Compal Electronics, Inc.

ICH6(3/4)

LA-3361P

1

1
2
3
4
5
6
7
8

G11119

12

G12

10

of

19 43Thursday, September 21, 2006

USB_OC# <28>

0.3

5

Near PIN F27(C968),

L10 0_0603_5%

+1.5VRUN_L

ICH_V5REF_RUN

2

C309

0.1U_0402_16V4Z

1

ICH_V5REF_SUS

2

C297

0.1U_0402_16V4Z

1

1

C298

0.1U_0402_16V4Z

2

1 2

220U_D2_4VM

2

C312

0.1U_0402_16V4Z

@

1

+1.5VS

D D

+3VS

+5VS

D15

R215

10_0402_5%

R212

10_0402_5%

C C

+3VALW +1.5VALW

1

C314

0.1U_0402_16V4Z

2

21

RB751V_SOD323

1 2

2

C310
1U_0603_10V4Z

1

+3VALW+5VALW

D14

21

RB751V_SOD323

1 2

2

C299
1U_0603_10V4Z

1

U18 APL5301-15DC_3P

Vin2Vout

GND

1

3

P27(C949), AB27(C950)

1

+

C270

C261

2

0.1U_0402_16V4Z

Near PIN AG5

+1.5VS

+1.5VS

Near PIN AG9

+1.5VS

+3VS

C278

Near PIN
E26, E27

2

1

0.1U_0402_16V4Z

R184

1 2

1_0805_1%

CHB1608U301_0603

5

L11

1 2

+3VS
+3VALW

Support wake on LAN R15 @
Support wake on LAN R16 0 ohm

ICH6_VCCPLL

1

2

C271

C263

0.1U_0402_16V4Z

1

2

0.01U_0402_16V7K

Near PIN
AC27

R15 0_0402_5%

1 2

R16 0_0402_5%@

1 2

+3VALW

Near PIN A17

B B

A A

4

2

2

C268

1

1

0.1U_0402_16V4Z

2

C313

1

4

3

+1.5VS

F9
U17
U16
U14
U12
U11
T17
T11
P17
P11
M17
M11
L17
L16
L14
L12
L11
AA21
AA20
AA19

AA10
AG19
AG16
AG13
AD17
AC15
AA17
AA15
AA14
AA12

P1
M7
L7
L4
J7
H7
H1
E4
B1
A6

U7
R7

G19
G20

F20
E24
E23
E22
E21

C308

E20
D27
D26
D25
D24

G8
AB18

P7

ICH_V5REF_RUN

AA18
A8

ICH_V5REF_SUS

F21
A25

A24
AB3

R12 0_0402_5%

G11

R11 0_0402_5%

G10
AG23

AD26
AB22

G16
G15
F16
F15
E16
D16
C16

C317

C343

1

2

0.1U_0402_16V4Z

+1.5VS

1 2
1 2

1

2

2

1

2

1

+1.5VALW

+1.5VS
+3VALW

+RTCVCC

+VCCP

C294

0.1U_0402_16V4Z

2

C323

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C360

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C338

Near PIN U7

@

Near PIN AG23

+3VS

Near PIN
AG13, AG16

+3VS

2

C354

1

0.1U_0402_16V4Z

Near PIN
A2-A6, D1-H1

1

2

2

1

C342

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+2.5VS

1

2

C311

Near PIN AB18

+3VS

C332

0.1U_0402_16V4Z

1 2

C331

1 2

0.1U_0402_16V4Z

+1.5VALW

0.1U_0402_16V4Z

2

C277

1

0.1U_0402_16V4Z

2

C333

1

0.1U_0402_16V4Z

2

C347

1

0.1U_0402_16V4Z

ICH6_VCCPLL

+1.5VS

+3VS

+3VALW

2

C316

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

U9E

AA22

VCC1_5[1]

AA23

VCC1_5[2]

AA24

VCC1_5[3]

AA25

VCC1_5[4]

AB25

VCC1_5[5]

AB26

VCC1_5[6]

AB27

VCC1_5[7]

F25

VCC1_5[8]

F26

VCC1_5[9]

F27

VCC1_5[10]

G22

VCC1_5[11]

G23

VCC1_5[12]

G24

VCC1_5[13]

G25

VCC1_5[14]

H21

VCC1_5[15]

H22

VCC1_5[16]

J21

VCC1_5[17]

J22

VCC1_5[18]

K21

VCC1_5[19]

K22

VCC1_5[20]

L21

VCC1_5[21]

L22

VCC1_5[22]

M21

VCC1_5[23]

M22

VCC1_5[24]

N21

VCC1_5[25]

N22

VCC1_5[26]

N23

VCC1_5[27]

N24

VCC1_5[28]

N25

VCC1_5[29]

P21

VCC1_5[30]

P25

VCC1_5[31]

P26

VCC1_5[32]

P27

VCC1_5[33]

R21

VCC1_5[34]

R22

VCC1_5[35]

T21

VCC1_5[36]

T22

VCC1_5[37]

U21

VCC1_5[38]

U22

VCC1_5[39]

V21

VCC1_5[40]

V22

VCC1_5[41]

W21

VCC1_5[42]

W22

VCC1_5[43]

Y21

VCC1_5[44]

Y22

VCC1_5[45]

AA6

VCC1_5[46]

AB4

VCC1_5[47]

AB5

VCC1_5[48]

AB6

VCC1_5[49]

AC4

VCC1_5[50]

AD4

VCC1_5[51]

AE4

VCC1_5[52]

AE5

VCC1_5[53]

AF5

VCC1_5[54]

AG5

VCC1_5[55]

AA7

VCC1_5[56]

AA8

VCC1_5[57]

AA9

VCC1_5[58]

AB8

VCC1_5[59]

AC8

VCC1_5[60]

AD8

VCC1_5[61]

AE8

VCC1_5[62]

AE9

VCC1_5[63]

AF9

VCC1_5[64]

AG9

VCC1_5[65]

AC27

VCCDMIPLL

E26

VCC3_3[1]

AE1

VCCSATAPLL

AG10

VCC3_3[22]

A13

VCCLAN3_3/VCCSUS3_3[1]

F14

VCCLAN3_3/VCCSUS3_3[2]

G13

VCCLAN3_3/VCCSUS3_3[3]

G14

VCCLAN3_3/VCCSUS3_3[4]

A11

VCCSUS3_3[1]

U4

VCCSUS3_3[2]

V1

VCCSUS3_3[3]

V7

VCCSUS3_3[4]

W2

VCCSUS3_3[5]

Y7

VCCSUS3_3[6]

A17

VCCSUS3_3[7]

B17

VCCSUS3_3[8]

C17

VCCSUS3_3[9]

F18

VCCSUS3_3[10]

G17

VCCSUS3_3[11]

G18

VCCSUS3_3[12]

ICH6_BGA609

COREIDE

PCIE

PCIUSB

VCCSUS1_5[3]
VCCSUS1_5[2]

VCCSUS1_5[1]

SATA

USB CORE

PCI/IDE RBP

VCCSUS3_3[20]

VCCLAN1_5/VCCSUS1_5[2]
VCCLAN1_5/VCCSUS1_5[1]

V_CPU_IO[3]
V_CPU_IO[2]
V_CPU_IO[1]

VCCSUS3_3[19]
VCCSUS3_3[18]
VCCSUS3_3[17]
VCCSUS3_3[16]
VCCSUS3_3[15]
VCCSUS3_3[14]
VCCSUS3_3[13]

VCC1_5[98]
VCC1_5[97]
VCC1_5[96]
VCC1_5[95]
VCC1_5[94]
VCC1_5[93]
VCC1_5[92]
VCC1_5[91]
VCC1_5[90]
VCC1_5[89]
VCC1_5[88]
VCC1_5[87]
VCC1_5[86]
VCC1_5[85]
VCC1_5[84]
VCC1_5[83]
VCC1_5[82]
VCC1_5[81]
VCC1_5[80]
VCC1_5[79]

VCC3_3[21]
VCC3_3[20]
VCC3_3[19]
VCC3_3[18]
VCC3_3[17]
VCC3_3[16]
VCC3_3[15]
VCC3_3[14]
VCC3_3[13]
VCC3_3[12]

VCC3_3[11]
VCC3_3[10]

VCC3_3[9]
VCC3_3[8]
VCC3_3[7]
VCC3_3[6]
VCC3_3[5]
VCC3_3[4]
VCC3_3[3]
VCC3_3[2]

VCC1_5[78]
VCC1_5[77]
VCC1_5[76]
VCC1_5[75]
VCC1_5[74]
VCC1_5[73]
VCC1_5[72]
VCC1_5[71]
VCC1_5[70]
VCC1_5[69]
VCC1_5[68]

VCC1_5[67]

VCC2_5[4]
VCC2_5[2]

V5REF[2]

V5REF[1]
V5REF_SUS
VCCUSBPLL

VCCRTC

Near PIN AG10

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

www.laptopfix.vn

3

2

+1.5VS

C322

0.1U_0402_16V4Z@

1 2

C325

0.1U_0402_16V4Z@

1 2

C319

0.1U_0402_16V4Z@

1 2

C330

0.1U_0402_16V4Z

1 2

C334

0.1U_0402_16V4Z

1 2

C335

0.1U_0402_16V4Z

1 2

C339

0.1U_0402_16V4Z

1 2

C346

0.1U_0402_16V4Z

1 2

C296

0.1U_0402_16V4Z

1 2

C305

0.1U_0402_16V4Z

1 2

C281

0.01U_0402_16V7K

1 2

Near PIN A25

C307

0.01U_0402_16V7K

1 2

Near PIN AA19

Support wake on LAN R12 @
Support wake on LAN R11 0 ohm

+1.5VS
+1.5VALW

+3VALW

C320

0.1U_0402_16V4Z@

1 2

C321

0.1U_0402_16V4Z@

1 2

C337

0.1U_0402_16V4Z@

1 2

C287

0.1U_0402_16V4Z

1 2

Near PIN A24

2

1

U9D

E27

VSS[172]

Y6

VSS[171]

Y27

VSS[170]

Y26

VSS[169]

Y23

VSS[168]

W7

VSS[167]

W25

VSS[166]

W24

VSS[165]

W23

VSS[164]

W1

VSS[163]

V4

VSS[162]

V27

VSS[161]

V26

VSS[160]

V23

VSS[159]

U25

VSS[158]

U24

VSS[157]

U23

VSS[156]

U15

VSS[155]

U13

VSS[154]

T7

VSS[153]

T27

VSS[152]

T26

VSS[151]

T23

VSS[150]

T16

VSS[149]

T15

VSS[148]

T14

VSS[147]

T13

VSS[146]

T12

VSS[145]

T1

VSS[144]

R4

VSS[143]

R25

VSS[142]

R24

VSS[141]

R23

VSS[140]

R17

VSS[139]

R16

VSS[138]

R15

VSS[137]

R14

VSS[136]

R13

VSS[135]

R12

VSS[134]

R11

VSS[133]

P22

VSS[132]

P16

VSS[131]

P15

VSS[130]

P14

VSS[129]

P13

VSS[128]

P12

VSS[127]

N7

VSS[126]

N17

VSS[125]

N16

VSS[124]

N15

VSS[123]

N14

VSS[122]

N13

VSS[121]

N12

VSS[120]

N11

VSS[119]

N1

VSS[118]

M4

VSS[117]

M27

VSS[116]

M26

VSS[115]

M23

VSS[114]

M16

VSS[113]

M15

VSS[112]

M14

VSS[111]

M13

VSS[110]

M12

VSS[109]

L25

VSS[108]

L24

VSS[107]

L23

VSS[106]

L15

VSS[105]

L13

VSS[104]

K7

VSS[103]

K27

VSS[102]

K26

VSS[101]

K23

VSS[100]

K1

VSS[99]

J4

VSS[98]

J25

VSS[97]

J24

VSS[96]

J23

VSS[95]

H27

VSS[94]

H26

VSS[93]

H23

VSS[92]

G9

VSS[91]

G7

VSS[90]

G21

VSS[89]

G12

VSS[88]

G1

VSS[87]

ICH6_BGA609

Title

Size Document Number Rev

Date: Sheet

GROUND

+RTCVCC

1

2

C356

0.1U_0402_16V4Z

Compal Electronics, Inc.

VSS[86]
VSS[85]
VSS[84]
VSS[83]
VSS[82]
VSS[81]
VSS[80]
VSS[79]
VSS[78]
VSS[77]
VSS[76]
VSS[75]
VSS[74]
VSS[73]
VSS[72]
VSS[71]
VSS[70]
VSS[69]
VSS[68]
VSS[67]
VSS[66]
VSS[65]
VSS[64]
VSS[63]
VSS[62]
VSS[61]
VSS[60]
VSS[59]
VSS[58]
VSS[57]
VSS[56]
VSS[55]
VSS[54]
VSS[53]
VSS[52]
VSS[51]
VSS[50]
VSS[49]
VSS[48]
VSS[47]
VSS[46]
VSS[45]
VSS[44]
VSS[43]
VSS[42]
VSS[41]
VSS[40]
VSS[39]
VSS[38]
VSS[37]
VSS[36]
VSS[35]
VSS[34]
VSS[33]
VSS[32]
VSS[31]
VSS[30]
VSS[29]
VSS[28]
VSS[27]
VSS[26]
VSS[25]
VSS[24]
VSS[23]
VSS[22]
VSS[21]
VSS[20]
VSS[19]
VSS[18]
VSS[17]
VSS[16]
VSS[15]
VSS[14]
VSS[13]
VSS[12]
VSS[11]
VSS[10]

VSS[9]
VSS[8]
VSS[7]
VSS[6]
VSS[5]
VSS[4]
VSS[3]
VSS[2]
VSS[1]

1

2

C353

0.1U_0402_16V4Z

ICH6(4/4)

F4
F22
F19
F17
E25
E19
E18
E15
E14
D7
D22
D20
D18
D14
D13
D10
D1
C4
C22
C20
C18
C14
B25
B24
B23
B21
B19
B15
B13
AG7
AG3
AG22
AG20
AG17
AG14
AG12
AG1
AF7
AF3
AF26
AF12
AF10
AF1
AE7
AE6
AE25
AE21
AE2
AE12
AE11
AE10
AD6
AD24
AD2
AD18
AD15
AD10
AD1
AC6
AC3
AC26
AC24
AC23
AC22
AC12
AC10
AB9
AB7
AB2
AB19
AB10
AB1
AA4
AA16
AA13
AA11
A9
A7
A4
A26
A23
A21
A19
A15
A12
A1

LA-3361P

1

20 43Thursday, September 21, 2006

0.3

of

A

B

C

D

E

F

G

H

HDD Connector CD-ROM Connector

JP12

PLTRST_MCH#<7,17,23>

1 1

IDE_HDREQ<18>
IDE_HDIOW#<18>
IDE_HDIOR#<18>
IDE_HIORDY<18>
IDE_HDACK#<18>

IDE_HDA1<18>
IDE_HDA0<18>

IDE_HDCS1#<18> IDE_HDCS3# <18>

+5VS

2 2

+5VS

PLTRST_MCH#
IDE_HDD7
IDE_HDD6
IDE_HDD5

IDE_HDD3
IDE_HDD2
IDE_HDD1
IDE_HDD0

IDE_HDREQ

IDE_HDIOW#

IDE_HDIOR#

IDE_HIORDY

IDE_HDACK#

IDE_HIRQ
IDE_HDA1
IDE_HDA0
IDE_HDCS1#
IDE_ACT#

44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10

8
6
4
2

OCTEK_HDD-22EG1_ REVERS

Placea caps. near HDD CONN.

0.1U_0402_16V4Z

1U_0603_10V4Z

C123

1

C121

2

10U_0805_10V4Z

1

C124

2

1

1

2

C541
10U_0805_10V4Z

2

Pls close HDD connector

43

43

44

41

42

39

40

37

38

35

36

33

34

31

32

29

30

27

28

25

26

23

24

21

22

19

20

17

18

15

16

13

14

11

12

9

10

7

8

5

6

3

4

1

2

454546

46

IDE_HDD8

41

IDE_HDD9

39

IDE_HDD10

37

IDE_HDD11IDE_HDD4

35

IDE_HDD12

33

IDE_HDD13

31

IDE_HDD14

29

IDE_HDD15

27
25
23
21
19

R77 470_0402_5%

17
15

R78 10K_0402_5%@

13
11

IDE_HDA2

9

IDE_HDCS3#

7
5
3
1

1 2
1 2

+5VS

IDE_HDD[0..15] <18>

PDIAG#

IDE_HDA2 <18>

10K_0402_5%@

Pull down set primary

R79

1 2

R216

4.7K_0402_5%

Pull high set slave

+5VS

IDE_HIRQ<18>

1 2

SEC_CSEL

+5VS

Placea caps. near ODD CONN.

0.1U_0402_16V4Z

C1459

1U_0603_10V4Z

1

1

C1460

2

2

PLTRST_MCH#
IDE_HDD7
IDE_HDD6
IDE_HDD5
IDE_HDD4
IDE_HDD3
IDE_HDD2
IDE_HDD1

IDE_HDIOW#
IDE_HIORDY

IDE_HIRQ
IDE_HDA1
IDE_HDA0
IDE_HDCS1#
IDE_ACT#

C1461

+5VS
+5VS

1

2

10U_0805_10V4Z

1

2

JP21

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

GND53GND

OCTEK_CDR-50TA1

54

06/23

C1462
10U_0805_10V4Z

Pls close HDD connector

IDE_HDD8
IDE_HDD9
IDE_HDD10
IDE_HDD11
IDE_HDD12
IDE_HDD13
IDE_HDD14
IDE_HDD15
IDE_HDREQIDE_HDD0
IDE_HDIOR#

IDE_HDACK#
PDIAG#

IDE_HDA2
IDE_HDCS3#

IDE_ACT#

+5VS
+5VS
+5VS

R27

1 2

10K_0402_5%

+5VS

3 3

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

www.laptopfix.vn

D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

F

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

HDD & CD-ROM CONN.

LA-3361P

G

0.3

of

21 43Thursday, September 21, 2006

H

5

4

3

2

1

C1513

1

2

close to U21

RDP

RDN

L36
BLM11A121SPT_0603

1

2

C1514

0.1U_0402_16V4Z

+3VLAN

R1982
110_0402_1%

1 2

Support wake on LAN R2019,2020 @
Support wake on LAN R1972,R1976 0 ohm

+3VLAN

15 mil

12

+3VLAN

1

2

C1510

09/15 follow INTEL suggest

10U_0805_6.3V4Z

45@

0.1U_0402_16V4Z

@

C1516

+3VLAN

R1977

@

0_0402_5%

1 2

1

2

RJ11 CABLE

+3VALW

+3VALW

C1517

0.1U_0402_16V4Z

+3VS

+3VS

1

2

RDN

TDN
TDP

RDP

TIP
RING

@

@

68P_0402_50V8K

R1972
300_0603_5%

1 2

R2019
300_0603_5%

1 2

8/23

R2020
300_0603_5%

1 2

R1976
300_0603_5%

1 2

U21

TD-8TX-

7

TD+

6

CT

3

CT

2

RD-

1

RD+

NS0013_16P

C1552

1

470P_1808_3KV

2

8/18 for EMI

C1463

12

ACTLED#

LINK_LED100#

C1464

1 2

68P_0402_50V8K

9
10

TX+

11

CT

14

CT

15

RX-

16

RX+

RJ45

JP49

12

Amber LED-

11

Amber LED+

8

PR4-

7

MDO1-

MDO1+
MDO0­MDO0+

MDO0­MDO0+
MCT0 RJ45_GND

MCT1
MDO1­MDO1+

C1553

1

470P_1808_3KV

2

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

SUYIN_100073FR012S100ZLCONN@

R1979
75_0402_5%

R1980
75_0402_5%

JP56

1
2

3
4

FOX_JM74613-P2002-7F~D

CONN@

RING
TIP

ACES_85205-0200

1
2

GND1
GND2

JP57

12

12

1
2

16

SHLD4

15

SHLD3

14

SHLD2

13

SHLD1

1000P_1206_2KV7K

RJ11

C1509

12

close to U25chip(Intel rule)close to U25chip(Intel rule)

RDP

R1978

110_0402_1%@

D D

0915

LAN_RXD0
LAN_RXD1
LAN_RXD2

R2026

C1557

1 2
1

2

R2027

1 2

33_0402_5%

1

2

C1558

33P_0402_50V8J

33_0402_5%

33P_0402_50V8J

R2028
33_0402_5%

1 2
1

C1559
33P_0402_50V8J

2

LAN1_XO

Colse to LAN chipset

LAN1_XI

0718 Intel checklist recommend

C C

B B

A A

LAN_JCLK<18>

LAN_RSTSYNC<18>

LAN_JCLK

LAN_TXD0<18>
LAN_TXD1<18>
LAN_TXD2<18>

LAN_RXD0<18>
LAN_RXD1<18>
LAN_RXD2<18>

R1984 649_0402_1%

1 2

R1983 619_0402_1%

1 2

R2013

33_0402_5%

1 2

LAN_RSTSYNC

LAN_TXD0
LAN_TXD1
LAN_TXD2

LAN_RXD0
LAN_RXD1
LAN_RXD2

LINK_LED100#
ACTLED#

TDP
TDN

RDP
RDN

1 2

R1985 200_0402_5%

U27

E2

JKCLK-JCLK

E3

JRSTSYNC

D1

JTXD0

F3

JTXD1

F1

JTXD2

D3

JRXD0

D2

JRXD1

C1

JRXD2

H2

GLAN_TXP-NC

J2

GLAN_TXN-NC

J4

GLAN_RXP-NC

H4

GLAN_RXN-NC

G7

KBIAS_P-RBIAS100

H7

KBIAS_N-RBIAS10

A4

LED0-LINK_UP_N

B4

LED1-ACT_LED_N

A5

LED2-SPEED_LED_N

B8

MDI_PLUS[0]-TDP

B9

MDI_MINUS[0]-TDN

D9

MDI_PLUS[1]-RDP

D8

MDI_MINUS[1]-RDN

F9

MDI_PLUS[2]-NC

F8

MDI_MINUS[2]-NC

H8

MDI_PLUS[3]-NC

H9

MDI_MINUS[3]-NC

A7

IEEE_TEST_P-NC

B7

IEEE_TEST_N-NC

J6

RSVD_J6-NC

J7

RSVD_J7-NC

E7

RBIAS_P-NC

E6

RBIAS_N-NC

B5

RSVD_B5-NC

A6

RSVD_A6-ADV10/LAN_DIS_N

C5

RSVD_C5-NC

B6

TEST_EN

NINEVEH-EKRON_N (REV 1p0)

LCI

GLCI

MDI

H6

XTAL2-X2H5XTAL1-X1

JTAG

JTAG_TCK-ISOL_TCKG1JTAG_TDI-ISOL_TIH1JTAG_TDO-TOUTG3JTAG_TMS-ISOL_EXEC

T1

T3

T2

G2

T4

RDN

1 2

VSSA[17]-NC
VSSA[16]-NC

VSSA[15]-VSSA2

VSSA[14]-VSS

VSSA[13]-NC
VSSA[12]-VSS
VSSA[11]-VSS
VSSA[10]-VSS
VSSA[09]-VSS
VSSA[08]-VSS
VSSA[07]-VSS
VSSA[06]-VSS
VSSA[05]-VSS
VSSA[04]-VSS

VSSA[03]-VSSR

VSSA[02]-NC
VSSA[01]-VSS

VSS[04]-VSS
VSS[03]-VSSP

VSS[02]-VSS

VSS[01]-NC

VDD1P0[03]-VCCA
VDD1P0[02]-VCCT
VDD1P0[01]-VCCR

VCCF1P0-VCC

VCCFC1P0-VCC

VCC3P3[02]-VCCP

VCC3P3[01]-VCC

VCC1P8[04]-NC
VCC1P8[03]-NC
VCC1P8[02]-NC
VCC1P8[01]-NC

VCC1P0-VCCA2

V1P0_OUT-NC

CTRL_10-NC

CTRL_18-NC

THERM_D_P-NC
THERM_D_N-NC

1 2

C1521

1 2

22P_0402_50V8J

Y3
25MHZ_20P_1BG25000CK1A

C1522

1 2

22P_0402_50V8J

J9
J8
J5
J3
J1
G9
G8
G6
F6
E9
D6
C9
C8
C7
C6
A9
A8
F4
E1
C4
A1

F7
E8
D7

E5

H3
F2

B3

G5
F5
D5
C2

G4
E4

VCC[02]

D4

VCC[01]

B1

C3
B2

A2
A3

TDP

R1975
110_0402_1%

1 2

TDN

+3VALW

+3VS

1

2

C1515

0.1U_0402_16V4Z

+3V_LAN

1

2

C1519

<BOM Structure>

0.1U_0402_16V4Z

NO SHORT PADS

NO SHORT PADS

1

2

C1511

0.1U_0402_16V4Z

1 2

1

2

C1520

10U_0805_6.3V4Z

J1

1 2

J2

1 2

1

2

C1512

0.1U_0402_16V4Z

R1981

0_0603_5%

0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/03/10 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

82562EZ LAN

LA-3361P

1

0.3

of

22 43Thursday, September 21, 2006

A

S1_VCC

U37

+5V_CB

+3V_CB

12

R723
10K_0603_1%

9

12V

5

5V

6

5V

3

3.3V

4

3.3V

6/02

1 1

0.1U_0402_16V7K

0.1U_0402_16V7K

2 2

3 3

C633

C640

1

2

1

2

6/02

GND

7

VCC
VCC
VCC

VPP

VCCD0
VCCD1
VPPD0
VPPD1

OC

SHDN

CP-2211_SSOP16

16

Change to DAU00 PCI Devices ID
Cardbus ---->AD22

CLK_33M_CBS

12

R721
10_0402_5%

@

1

C642

@

15P_0402_50V8J

4 4

2

A

RSMRST#<19,29>

PLTRST_MCH#<7,17,21>

13
12
11

10

1
2
15
14

8

1

C629

4.7U_0805_10V4Z

2

VCCD0#
VCCD1#
VPPD0
VPPD1

0711 EMI request

RSMRST#

PLTRST_MCH#

S1_VPP

1

C630

0.1U_0402_16V7K

2

PCI_AD[0..31]<17,24>

PCI_C_BE3#<17,24>
PCI_C_BE2#<17,24>
PCI_C_BE1#<17,24>
PCI_C_BE0#<17,24>

PCIRST#<17,24,29>

PCI_FRAME#<17,24>

PCI_IRDY#<17,24>

PCI_TRDY#<17,24>

PCI_DEVSEL#<17,24>

PCI_STOP#<17,24>
PCI_PERR#<17,24>
PCI_SERR#<17,24>

PCI_PAR<17,24>

PCI_REQ2#<17>

PCI_GNT2#<17>

CLK_33M_CBS<16>

PCI_AD22

PCI_PIRQC#<17>

CLKRUN#<19,24,29>

1 2

R20 0_0402_5%@

1 2

R21 0_0402_5%

+3V_CB

1 2

R720 100_0402_5%

SIRQ<19,29>

B

12

C1538

680P_0402_50V7K

VPPD0
VPPD1
VCCD0#
VCCD1#

PCI_AD[0..31]

PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCI_C_BE3#
PCI_C_BE2#
PCI_C_BE1#
PCI_C_BE0#

CLK_33M_CBS

R722 43K_0402_5%

CB_GRST#

B

www.laptopfix.vn

C634

4.7U_0805_10V4Z

U38

3

AD31

4

AD30

5

AD29

7

AD28

8

AD27

9

AD26

10

AD25

11

AD24

15

AD23

16

AD22

17

AD21

19

AD20

23

AD19

24

AD18

25

AD17

26

AD16

38

AD15

39

AD14

40

AD13

41

AD12

43

AD11

45

AD10

46

AD9

47

AD8

49

AD7

51

AD6

52

AD5

53

AD4

54

AD3

55

AD2

56

AD1

57

AD0

12

C/BE3#

27

C/BE2#

37

C/BE1#

48

C/BE0#

20

RST#

28

FRAME#

29

IRDY#

31

TRDY#

32

DEVSEL#

33

STOP#

34

PERR#

35

SERR#

36

PAR

1

REQ#

2

GNT#

21

PCLK

59

RI_OUT#/PME#

70

SUSPEND#

13

IDSEL

60

MFUNC0

61

MFUNC1

64

MFUNC2

65

MFUNC3

67

MFUNC4

68

MFUNC5

69

MFUNC6

66

VCC/GRST#

+3V_CB

1

2

0.1U_0402_16V7K

74

VCCD1#

1

C635

2

73

VCCD0#

0.1U_0402_16V7K

1

C631

2

90

126

72

18

44

VPPD071VPPD1

VCCP0

VCCP1

VCCSK1

VCCSK0

138

122

VCC1

VCC2

PQFP 144

22.2 X 22.2 X 1.60

GND1

GND2

GND3

GND4

GND5

6

22

42

58

78

94

GND6

114

GND7

130

GND8

RSVD/D14

84

C

S1_VCC

1

C632

0.1U_0402_16V7K

2

0711 EMI request

+3V_CB

C641

1 2

680P_0402_50V7K

14

30

50

86

102

63

VCCI

VCC7

VCC6

VCC5

VCC4

VCC3

S1_D10

144

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11
CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CC/BE3#/REG#

CC/BE2#/A12

CC/BE1#/A8

CC/BE0#/CE1#
CRST#/RESET

CFRAME#/A23

CIRDY#/A15

CTRDY#/A22

CDEVSEL#/A21

CSTOP#/A20
CPERR#/A14

CSERR#/WAIT#

CPAR/A13

CREQ#/INPACK#

CGNT#/WE#

CCLK/A16

CSTSCHG/BVD1

CCLKRUN#/WP

CBLOCK#/A19

CINT#/READY

SPKOUT

CAUDIO/BVD2

CCD2#/CD2#
CCD1#/CD1#

CVS2/VS2#
CVS1/VS1#

RSVD/A18

RSVD/D2

CB1410_LQFP144

100

143

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

S1_D9

142

S1_D1

141

S1_D8

140

S1_D0

139

S1_A0

129

S1_A1

128

S1_A2

127

S1_A3

124

S1_A4

121

S1_A5

120

S1_A6

118

S1_A25

116

S1_A7

115

S1_A24

113

S1_A17

98

S1_IOWR#

96

S1_A9

97

S1_IORD#

93

S1_A11

95

S1_OE#

92

S1_CE2#

91

S1_A10

89

S1_D15

87

S1_D7

85

S1_D13

82

S1_D6

83

S1_D12

80

S1_D5

81

S1_D11

77

S1_D4

79

S1_D3

76

S1_REG#

125

S1_A12

112

S1_A8

99

S1_CE1#

88

S1_RST

119

S1_A23

111

S1_A15

110

S1_A22

109

S1_A21

107

S1_A20

105

S1_A14

104

S1_WAIT#

133

S1_A13

101

S1_INPACK#

123

S1_WE#

106
108

S1_BVD1

135

S1_WP

136

S1_A19

103

S1_RDY#

132
62

S1_BVD2

134

S1_CD2#

137

S1_CD1#

75

S1_VS2

117

S1_VS1

131

S1_D2
S1_A18
S1_D14

+3V_CB

+5V_CB

1 2

R718 33_0402_5%

1000P_0402_50V7K

L37

1 2

0_0805_5%

0711 EMI request

L38

1 2

0_0805_5%

0711 EMI request

S1_VCC

12

R715
47K_0402_5%

S1_A16

CBS_SPK# <25>

C643

2

1

2

1

C644
1000P_0402_50V7K

+3VS

+5VS

D

S1_VCC
S1_VPP

D

E

S1_VPP

S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#

S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP

1

C636

4.7U_1206_25VFZ

2

S1_VCC

S1_VCC

1 2

R716 22K_0402

1 2

R717 22K_0402

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
69
71
73
75
77
79
81
83

1

C637

0.1U_0402_16V4Z

2

1

1

C63810U_1206_16V4Z

C639

0.1U_0402_16V7K

2

2

S1_A23PCI_AD31
S1_WP

JP54

GND
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#
S1_VCC
S1_VPP
S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP
GND
GND
GND
GND
GND
GND
GND
GND
GND

FOX_WZ21131-G2-P4_LT

GND

S1_CD1#

S1_D11
S1_D12
S1_D13
S1_D14
S1_D15

S1_CE2#

S1_VS1
S1_IORD#
S1_IOWR#

S1_A17

S1_A18

S1_A19

S1_A20

S1_A21

S1_VCC
S1_VPP

S1_A22

S1_A23

S1_A24

S1_A25

S1_VS2

S1_RST

S1_WAIT#

S1_INPACK#

S1_REG#

S1_BVD2
S1_BVD1

S1_D8
S1_D9

S1_D10

S1_CD2#

GND
GND
GND
GND
GND
GND
GND
GND
GND

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
70
72
74
76
78
80
82
84

S1_CD1#
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21

S1_A22
S1_A23
S1_A24
S1_A25
S1_VS2
S1_RST
S1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2
S1_BVD1
S1_D8
S1_D9
S1_D10
S1_CD2#

06/23 PCMCIA pin 71 and pin72 connect to GND

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

CardBus CTRL CB714

LA-3361P

E

of

23 43Thursday, September 21, 2006

S1_VCC
S1_VPP

0.3

5

4

3

2

1

PCI_AD[0..31]

+3VALW

R1913

1 2

D D

10K_0402_5%@

XMIT#

6/23

09/05

WL_LED<28>

XMIT#<19>

C C

B B

CLK_33M_MPCI

R73
10_0402_5%@

1 2

2

C118

4.7P_0402_50V8C

@

1

WL_LED

XMIT#

1 2

1 2

PCI_PIRQE#<17>

CLK_33M_MPCI<16>

PCI_REQ0#<17>

PCI_C_BE3#<17,23>

PCI_C_BE2#<17,23>
PCI_IRDY#<17,23>

CLKRUN#<19,23,29>

PCI_SERR#<17,23>
PCI_PERR#<17,23>

PCI_C_BE1#<17,23>

R2021 0_0402_5%WLAN@

R2022 0_0402_5%@

PCI_PIRQE#

CLK_33M_MPCI
PCI_REQ0#
PCI_AD31

PCI_AD29
PCI_AD27

PCI_AD25
PCI_C_BE3#

PCI_AD23
PCI_AD21

PCI_AD19
PCI_AD17

PCI_C_BE2#
PCI_IRDY#

CLKRUN#
PCI_SERR#

PCI_PERR#
PCI_C_BE1#
PCI_AD14

PCI_AD12
PCI_AD10

PCI_AD8
PCI_AD7

PCI_AD5

+5VS

+5VS

PCI_AD3
PCI_AD1

2

C119

WLAN@

0.1U_0402_16V4Z

1

+3VS

JP23

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

61

61

63

63

65

65

67

67

69

69

71

71

73

73

75

75

77

77

79

79

81

81

83

83

85

85

87

87

89

89

91

91

93

93

95

95

97

97

99

99

101

101

103

103

105

105

107

107

109

109

111

111

113

113

115

115

117

117

119

119

121

121

123

123

125

GND

TYCO_1734661-2~N

PCI_AD[0..31] <17,23>

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

54

56

56

58

58

60

60

62

62

64

64

66

66

68

68

70

70

72

72

74

74

76

76

78

78

80

80

82

82

84

84

86

86

88

88

90

90

92

92

94

94

96

96

98

98

100

100

102

102

104

104

106

106

108

108

110

110

112

112

114

114

116

116

118

118

120

120

122

122

124

124

126

GND

+3VS

PCI_PIRQF#

PCIRST#
PCI_GNT0#
ICH_PME#
PCI_AD30
PCI_AD28

PCI_AD26
PCI_AD24
MINIDSEL

PCI_AD22
PCI_AD20
PCI_PAR
PCI_AD18
PCI_AD16

PCI_FRAME#
PCI_TRDY#
PCI_STOP#

PCI_DEVSEL#
PCI_AD15

PCI_AD13
PCI_AD11

PCI_AD9
PCI_C_BE0#

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

2

C364

0.1U_0402_16V4Z

1

+3VALW

WLAN@

PCI_PIRQF# <17>

PCIRST# <17,23,29>
PCI_GNT0# <17>

ICH_PME# <17,29>

1 2

R293

WLAN@

100_0402_5%

PCI_PAR <17,23>

PCI_FRAME# <17,23>
PCI_TRDY# <17,23>
PCI_STOP# <17,23>

PCI_DEVSEL# <17,23>

PCI_C_BE0# <17,23>

PCI_AD20

2

C365

0.1U_0402_16V4Z

WLAN@

1

+3VALW

2

C110

0.1U_0402_16V4Z

WLAN@

1

+5VS

WLAN@

C548

+3VS

1

2

C371

WLAN@

2

0.047U_0402_16V4Z

1

2

C367

WLAN@

0.047U_0402_16V4Z

1

2

C111

WLAN@

0.047U_0402_16V4Z

1

4

www.laptopfix.vn

2

C402

WLAN@

0.047U_0402_16V4Z

1

2

C112

WLAN@

0.047U_0402_16V4Z

1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

C404

WLAN@

0.047U_0402_16V4Z

1

3

2

C368

WLAN@

0.047U_0402_16V4Z

1

2

C403

WLAN@

0.047U_0402_16V4Z

1

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

MINIPCI

LA-3361P

of

1

24 43Thursday, September 21, 2006

0.3

A A

10U_0805_10V4Z

5

A

B

C

D

E

R1926

1 2

12

10K_0603_1%

R1929

5.9K_0603_1%

GNDAGND

1

C1487

2

0.1U_0402_16V4Z

CODEC CX20468-31

+VDDA_CODEC

1

C1467

4.7U_0805_10V4Z

2

LA-3361P

GNDA <27>

E

1

C1468

2

0.1U_0402_16V4Z

of

25 43Thursday, September 21, 2006

0.3

W=40Mil

+VDDA_CODEC

12

R1928
10K_0402_1%

1 1

C1472

R1933

12

1U_0603_10V4Z

C1474

12

1U_0603_10V4Z

1 2

560_0402_5%

R1937

1 2

560_0402_5%

10K_0402_5%@

R1939

CBS_SPK#<23>

SPKR<19>

2 2

1

C1473

2

0.1U_0402_16V4Z@

12

R1930
10K_0402_1%

MONO_IN MONO_IN1 MONO_INR

1

C

Q50

2

B

E

2SC2411K_SOT23

3

12

D44

RB751V_SOD323

2 1

08/17 Delete L39

C1470

12

1U_0603_10V4Z

1 2

R1931 20K_0402_5%

+5VS

R1932

1 2

10K_0402_5%

4.7U_0805_10V4Z

C1471

12

1U_0603_10V4Z

C1465

1

1

2

2

0.1U_0402_16V4Z

10K_0402_5%

C1466

For Layout:

Place decoupling caps near the

0711 EMI request

L41

0.1U_0402_16V4Z

+3VALW

3 3

PWRCLKP<26>
PWRCLKN<26>

C1484

150P_0402_50V8J@

4 4

1

1

2

2

FBMA-L10-160808-301LMT_0603

C1485

150P_0402_50V8J@

0713 Disable AMOM

12

C1478

10U_0805_10V4Z

AC97_CODEC_SDOUT<18>

1

2

DIB_DATAN<26>
DIB_DATAP<26>

AC97_SYNC<18>
AC97_RST#<18>

AC97_SDIN0<18>

AC97_BITCLK<18>

1

C1480

C1479

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C1482

C1481

2

2

0.1U_0402_16V4Z

1 2

R1948 0_0402_5%AMOM@

1 2

R1949 0_0402_5%AMOM@

1 2

R1950 0_0402_5%AMOM@

1 2

R1951 0_0402_5%AMOM@

R7 33_0402_5%

1 2

R2012

1 2

0_0402_5%DISAMOM@

1 2

R1952 33_0402_5%

1 2

R1953 33_0402_5%

MONO_INR

power pins of SmartAMC
device.

+3VALW_CODEC

1

12

2

249K_0402_1%

R1947

1
3
4
7
8

15
16
17

20
21
22
11
12
14
45
13

U31

RCOSC1
DIB_DATAN
DIB_DATAP
PWRCLKP
PWRCLKN
SDATA_OUT

SYNC
AC_RESET#

AC_ONLY
SDATA_IN0
BIT_CLK
ID0#
ID1#
EAPD
PC_BEEP
DSPKOUT

5

VDD5

2

GNDC2

GND8

6

10

18

VDDC18

GNDC9

9

19

VDDC10

GNDC19

AVSS_CLK

26

23

VDD_CLK

LINE_OUT_R

MBIAS/AVDD

AGND35

35

LINE_OUT_L

41

33

44

AVDD33

MIC_IN

CD_IN_R

CD_IN_GND

CD_IN_L

LINE_IN_L
LINE_IN_R

HP_OUT_L

HP_OUT_R

REF_FLT

VC_SCA

VREF_SCA

S_PDIF
GPIO_4
GPIO_5

XTLO

XTLI

AGND41

CX20468-31_TQFP48

AVDD44

2

1

29
32

31
30

27
28

39
40
42
43

38
37
36

34
46
47
48
24

25

1

C1475
1U_0603_10V4Z

2

0.1U_0402_16V4Z

+CODEC_REF

33_0402_5%

1 2

R1957

+3VAMP_CODEC

C1476

C1483 1U_0603_10V4Z

LINE_OUTL <27>
LINE_OUTR <27>
HP_L <27>
HP_R <27>

X2 24.576MHZ_16P_XSL024576FG1H

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

0711 EMI request

L40

12

+CODEC_REF

12

1 2
1 2

+VDDA_CODEC

R1986
3K_0402_5%

C15230.1U_0402_10V6K

C1524

MIC <27>

FBMA-L10-160808-301LMT_0603

1

C1477
10U_0805_10V4Z

2

12

0.1U_0402_10V6K

09/15

R1954 0_0402_5%

1 2

R1992 0_0402_5%

1 2

1 2

C1490 15P_0402_50V8J

12

1 2

C1491 15P_0402_50V8J

2005/05/18 2006/05/18

Compal Secret Data

Deciphered Date

U29

4

VIN

12

2

DELAY

R1927

ERROR7CNOISE

8

SD

SI9182DH-AD_MSOP8

0.1U_0402_16V4Z

MIC_SENSE <27>
HP_SENSE <27>

D

5

VOUT

GND

6
1
3

1

C1469

2

0.01U_0402_16V7K

SENSE or ADJ

SI phase fine tune the best one

6/21

6/21

C1488

1 2

R1934 0_0402_5%@

1 2

R1935 0_0402_5%

1 2

R1936 0_0402_5%@

1 2

R1938 0_0402_5%@

1 2

R1940 0_0402_5%@

R1941 0_1206_5%@

R1942 0_1206_5%@

R1943 0_1206_5%@

R1944 0_1206_5%@

1

1

C1489

2

2

0.1U_0402_16V4Z

1 2

1 2

1 2

1 2

2

C1486
1U_0603_10V4Z

1

Title

Size Document Number Rev

Custom

Date: Sheet

MTP28

MTP52

1

MTP26

1

MTP22

1

PWRCLKN<25>

PWRCLKP<25>

DIB_DATAP<25>

DIB_DATAN<25>

MJ1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

HEADER8@

MJ1B

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

HEADER8@

MTP23

1

2 3

MTP24

1

GND

MT902

S X'FORM_ 835-00252

MTP25

1

SECPRI

BR908_AC1

41

1

MC962
47P_0603_50V8J

2

PCLK

MTP27

1

MC922 10P_1808_3KV

MC924 10P_1808_3KV

MT922

2 3

S X'FORM_ 835-00252@

1 2

1 2

BR908_CC

MBR908A

6

BAV99DW-7_SOT363

1

2

4

5

MBR908B

3

BAV99DW-7_SOT363

41

SECPRI

0.001U_0402_50V7M@

1

MC974

MTP72

1

MC944

2

AGND_LSD

MTP29

MR932

15K_0402_5%

12

1 2

MMZ1608D301BT_0603

1

MC970

0.1U_0402_10V6K

2

DIB_P1

1 2

1 2

MTP73

1

1

MC940
1U_0603_6.3V6M

2

0.1U_0402_10V6K

1

MR922
0_0402_5%

0_0402_5%
MR924

MTP61

2

1

0.001U_0402_50V7M

1

MC930

2.2U_0805_10V6K

MC926
10P_0402_50V8J

CLKCLK2

1 2

MFB906

PWR+

MTP60

1

DIB_P2

DIB_N2

1

Vc_LSD
Vref_LSD

1

MC976

2

MTP30

MTP62

MTP63

1

2

1

AGND_LSD

1

1

VDD

MU902

26

CLK

7

PWR+

27

DIB_P

28

DIB_N

3

Vc

4

VRef

8

NC1

22

NC2

25

NC3

29

PADDLE

AGND_LSD

0.1U_0402_10V6K

1

MC928

2

2

AVdd

AGnd

6

DGND_LSD

MTP58

DC_GND

15

1

VDD

24

RAC1

DVdd

TAC1

RAC2

TAC2

TRDC

GPIO1

RBias

DGnd

23

AGND_LSD

MTP59

MC978

0.1U_0402_10V6K

1 2

DGND_LSD

21
20

MTP34

19
18

12
11

EIC

9

RXI

1
5

10

VZ

17

EIO

16

EIF

14

TXO

13

TXF

CX20493-58_QFN28

1

1

MTP36

1

MTP35

MR902
1M_0805_5%

RAC1

1 2

TAC1

1 2

1M_0805_5%

1

TRDC

1

EIC

0.015U_0603_25V7K
MR910
237K_0805_1%

1 2

1

MTP70

RBias

1 2

MR954 59K_0402_1%

MTP69

1

VZ

1 2

MR908 348K_0805_1%

MTP68

1

EIO

Use 59K_0402_1% for MR954

EIF

TXO

TXF

MR904

MTP33

1 2

RAC1/RING
TAC1/TIP

MR906 6.8M_0805_5%

1

MC958

2

AGND_LSD

RXI-1DIB_N1 RXI

AGND_LSD

MTP67

1

1

1

MTP37

1

MTP38

MC902

1 2

MC904

1 2

MTP40

1 2

MC918

0.1U_0603_16V7K

1

MTP71

MC910

1 2

0.047U_1206_100V7K

2

B

MTP65

1

0.033U_1206_100V7K

0.033U_1206_100V7K

1

1

MTP32

C

MQ906
PMBTA42_SOT23

E

3 1

1

MTP64

12

MR938
110_0603_5%

AGND_LSD

C1553,C1552 replace MC906 and MC908 NI 09/20

MC906 and MC908 must be Y3 type
Capacitors for Nordic Countries
only

MTP39

2

B

RING_2

TIP_2

1 2

BRIDGE_CC

C

MQ902
PMBTA42_SOT23

E

3 1

MTP31

1 2

MMZ1608D301BT_0603

1

2

3

2

3

1

1 2

MMZ1608D301BT_0603

MC966

0.01U_0805_100V7M

1

1

AGND_LSD

MFB902

MBR904
MMBD3004S_SOT23

TIP_2

AGND_LSDAGND_LSD

MBR906
MMBD3004S_SOT23

MFB904

2

4

MQ904

FZT458TA_SOT223

MTP66

3

1

MR928
27_0805_5%

1 2

1

MTP49

MOD_RING

MC906

@

1

470P_1808_3KV

2

GND

1

MC908

@

470P_1808_3KV

2

AGND_LSD

TB3100M-13-01_SMB

2

2
1

1

MOD_TIP

MRV902

1

MTP41

E&T_3800-02

1

MTP42

MJ2

2
1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/18 2006/05/18

Compal Secret Data

Deciphered Date

www.laptopfix.vn

Title

Size Document Number Rev

Custom

Date: Sheet of

AMOM_modem

LA-3361P

26 43Thursday, September 21, 2006

0.3

A

1 1

B

C

D

SPKL+
SPKR+

2

3

D45

@

PSOT24C_SOT23

1

0711 EMI request

0711 EMI request

1

2

C1492

47P_0402_50V8J

E

1

2

C1493

47P_0402_50V8J

JP53

1
2

ACES_85205-0200

C0NN@

0819

+5VAMP +5VS

1

C1494

C503

LINE_C_OUTR

LINE_OUTR<25>

LINE_OUTL<25>

2 2

1 2

0.1U_0603_50V4Z
C502

LINE_C_OUTL

1 2

0.1U_0603_50V4Z
C504

1 2

0.22U_0603_10V7K

EC_MUTE#<29>

R425

1 2

20K_0603_1%

R424

1 2

20K_0603_1%

R429

1 2

10K_0603_1%

LINE_OUT# SPKR+

0809

3 3

LINE_OUT

LINE_OUT#

R28

1 2

0_0402_5%

@

1U_0603_16V4Z

U30

3

4

1
2

1

C1499

0.22U_0402_16V4Z

2

2

IN+

IN-

SHUTDOWN
BYPASS

C1495

10U_0805_10V4Z

6

VDD

5

VO+

8

VO-

GND

TPA6211A1DGNR_PMSOP8

7

1

C1496

2

SPKR+

SPKL+

0.1U_0402_16V4Z

1

2

R1958
0_1206_5%

1 2

1

C1497

2

0.1U_0402_16V4Z

HP_R<25>

HP_L<25>

HP_SENSE<25>

HP_L

0915

MIC<25>

C1501

1 2

100U_6.3V_M
C1502

1 2

100U_6.3V_M

HP_SENSE

+

+

MIC_SENSE<25>

1 2

30_0805_5%

1 2

30_0805_5%

MIC

0711 EMI request

+3VALW

12

1

2

R1962

INTSPK_CR+

R1963

INTSPK_CL+

R1964

1K_0402_5%

MIC_SENSE

FBMA-L11-160808-700LMT_0603

C1526

0.1U_0402_16V4Z

+3VALW

12

R2029
20K_0402_5%

1

C1560

0.1U_0402_16V4Z

2

0818

L42

12

R1991
20K_0402_5%

0711 EMI request

FBMA-L11-160808-700LMT_0603

FBMA-L11-160808-700LMT_0603

R1965

1K_0402_5%

1 2

1 2

1

2

6/21

L43

12

L44

12

C1503

47P_0402_50V8J

C1500
47P_0402_50V8J

5
4
3

6
2
1

PRHP_R

5
4
3

6

PL

2
1

C1504
47P_0402_50V8J

JP52

FOX_JA6033L-5S1-TR

CONN@

JP14

FOX_JA6033L-5S1-TR

CONN@

SHORT PADS

7

8

7

8

JOPEN3

1 2

For EMI

MIC IN

HP OUT

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/05/18 2006/05/18

C

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

D

Date: Sheet

AMP and Audio Jack

LA-3361P

E

0.3

27 43Thursday, September 21, 2006

of

A

B

C

D

E

1

2

C412
10P_0402_50V8J

@

1

1

2

2

1

C361
10P_0402_50V8J

@

2

+USB_VCCA

1

C386
1000P_0402_50V7K

2

1
2
3
4

5
6

+USB_VCCA

C355
1000P_0402_50V7K

JP22

1
2
3
4

5
6

SUYIN_020173MR004G552ZR

JP26

VCC
D­D+
GND

GND1
GND2

SUYIN_020173MR004G552ZR

VCC
D­D+
GND

GND1
GND2

CAP_LED#<29>

POWER LED

CAP LED

CAP_LED#

17-21SYGC/S530-E1/TR8_GRN

D35

GREEN

17-21SYGC/S530-E1/TR8_GRN

14@

21

D39

R738

1 2

200_0402_5%

+3VALW

12

21

+3VS

R696
200_0402_5%

14@

GREEN

+3VS

+5VALW

OUT
OUT
OUT

G528_SO8

R1993

200_0402_5%

D10

+USB_VCCA

FLG

+3VALW+3VALW

8
7
6
5

12

21

12

R1994
200_0402_5%

34

USB_OC# <19>

GREENAMBER

U26

1

C446 0.1U_0402_16V4Z

1 1

2 2

3 3

12

SYSON#<19,31>

Battery LED

19-22UYSYGC/S530-A2/TR8_ G/Y

AMBER_BATLED#<29>

GREEN_BATLED#<29>

AMBER_BATLED#

GREEN_BATLED#

GND

2

IN

3

IN

4

EN#

Charge LED

USB Port

USBP1-<19>
USBP1+<19>

D20

PSOT24C_SOT23@

For ESD

USBP0-<19>
USBP0+<19>

D19

PSOT24C_SOT23@

1

+

C392

C377

2

100U_6.3V_M

0.1U_0402_16V4Z

@

1

C405

2

1

+

C357

2

0.1U_0402_16V4Z

100U_6.3V_M

C358

1

2

C349

1

2

2

3

10P_0402_50V8J@

1

2

3

10P_0402_50V8J@

1

08/18

WL ON/OFF Wireless LED

R735

14@

10K_0402_5%

D32

14@

SF10402ML080C_0402@

08/18

SW1
1BT002-01210_4P

3
4

5

6

13

WL_LED<24>

1
2

WL_LED

2

G

12

R1916
100K_0402_5%

D

Q47

2N7002_SOT23

S

10 mA
FV:2.8V

WL_LED_S<30>

B

www.laptopfix.vn

WL_LED_S

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

+3VS

WL_BTN#<29,30>

4 4

WL_BTN#

A

1

2

BLUE

+3VS

14@

R1915
27_0402_5%

1 2

20mil

21

D40

14@

S LED HT-170NBQA 0805 BLUE

1

TVS1

SF10402ML080C_0402

@

2

<>

D

ON/OFFBTN_LED#<29,30>

T/P Board

JP6

6
5
4
3
2
1

ACES_87151-06051

CONN@

Title

Size Document Number Rev

Custom

Date: Sheet

ON/OFFBTN_LED#

PSOT24C_SOT23@

+5VALW

0711 EMI request

1

C1539

0.1U_0402_16V4Z

2

1

1

C4

C3

100P_0603_50V8J

2

2

100P_0603_50V8J

Compal Electronics, Inc.

USB Port

LA-3361P

EMI

E

PSDAT3
PSCLK3

08/22 for EMI

3

D47

1

PSDAT3 <29>
PSCLK3 <29>

28 43Thursday, September 21, 2006

2

0.3

of

A

+3VALW

0.1U_0402_16V4Z

1

+3VALW

08/09

12

R196

1 1

2 2

4.7K_0402_5%

47K_0402_5%

1

0.1U_0402_16V4Z

2

12

R233

R236

4.7K_0402_5%

GATEA20<18>

KBRST#<18>

C290

+5VALW

12

12

R227

4.7K_0402_5%

R273

10K_0402_5%

EC DEBUG port

3 3

JP7

1

1

2

2

3

3

4

4

ACES_85205-0400@

D46

RB751V_SOD323

2 1

ECRST#

12

JOPEN2

SHORT PADS

CLK_33M_LPCEC<16>

1 2

C328
15P_0402_50V8J@

12

R229

4.7K_0402_5%

SMB_EC_DA1
SMB_EC_CK1
SMB_EC_DA2
SMB_EC_CK2

+3VS

R263
10K_0402_5%

1 2

1 2

GATEA20

KBRST#

Short：SPI mode

1 2

R3 10K_0402_5%@

UTX

KSO3

+5VALW

08/18

1 2

R240

33_0402_5%@

100K_0402_5%

LID_SW#<30>

LPC_LAD[0..3]<18>

R736

FOR LPC SIO DEBUG PORT

+5VS

JP9

1

1

2

2

3

3

4

4

5

5

CLK_SIO_14M_

6

6

LPC_LAD0

7

7

LPC_LAD1

8

8

4 4

LPC_LAD2

9

9

LPC_LAD3

10

10

LPC_LFRAME#

11

11

12

12

PCIRST#

13

13

CLKRUN#

14

14

R270

15

15
16
17
18
19
20

ACES_85201-2005@

1 2

SIRQ

16
17
18
19
20

+3VS

1 2

R25 0_0402_5%

LPC_LDRQ0#

1 2

R26 0_0402_5%

22_0402_5%

A

CLK_14M_SIO <16>

CLK_33M_LPCEC

6/06

1

C291

2

0.1U_0402_16V4Z

LPC_LFRAME#<18>

LPC_LAD[0..3]

CLKRUN#<19,23,24>

SMB_EC_DA2<13>
SMB_EC_CK2<13>
SMB_EC_DA1<30,38>
SMB_EC_CK1<30,38>

GREEN_BATLED#<28>

+3VALW

12

3
2

LPC_LDRQ0# <18>

LID_SWOUT#<19>

EC_LANRST#<19>

PWRBTN_OUT#<19>

1 2

10P_0402_50V8J

C362

4

OUT

NC

1

IN

NC

32.768KHZ_12.5P_1TJS125DJ2A073

Y1

1 2

10P_0402_50V8J

Close to RTC pad

C363

SIRQ<19,23>

PCIRST#<17,23,24>
EC_SCI#<17>

CAP_LED#<28>

WL_BTN#<28,30>

ICH_PME#<17,24>

SYSON<31,35>
RSMRST#<19,23>

BKOFF#<14>
SLP_S3#<19>

SLP_S5#<19>
EC_SMI#<19>

2

+3VS

SUSP#<30,31,36>

C106

1000P_0402_50V7K

R252

1 2

1

2

10K_0402_5%@

0.1U_0402_16V4Z

C336

GATEA20
KBRST#
SIRQ
LPC_LFRAME#
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0

PCIRST#
ECRST#
EC_SCI#
CLKRUN#

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

SMB_EC_DA2
SMB_EC_CK2
SMB_EC_DA1
SMB_EC_CK1

UTX
URX

WL_BTN#

SLP_S3#
LID_SWOUT#
SLP_S5#
EC_SMI#
EC_LANRST#

ICH_PME#

CRY2

12

20M_0402_5%@

R286

CRY1

B

1

2

B

1000P_0402_50V7K

1

C345

C366

2

U20

1

GA20/ GPIO00/GA20

2

KBRST#/GPIO01/KBRST#

3

SERIRQ

5

LPC_FRAME# / LFRAME#

6

LPC AD3/LAD3

9

LPC AD2/LAD2

10

LPC AD1/LAD1

12

LPC AD0/LAD0

14

CLK_PCI_EC/PCICLK

15

PCIRST#

42

EC RST#/ ECRST#

24

EC SCI#/SCI#/GPIO0E

44

PM_CLKRUN#/ CLKRUN#

63

KSI0/GPIO30

64

KSI1/GPIO31

65

KSI2/GPI032

66

KSI3/GPIO33

67

KSI4/GPIO34

68

KSI5/GPI035

69

KSI6/GPIO36

70

KSI7/GPIO37

47

KSO0/GPIO20

48

KSO1/GPIO21

49

KSO2/GPIO22

50

KSO3/GPIO23

51

KSO4/GPIO24

52

KSO5/GPIO25

53

KSO6/GPIO26

54

KSO7/GPIO27

55

KSO8/GPIO28

56

KSO9/GPIO29

57

KSO10/GPIO2A

58

KSO11/GPIO2B

59

KSO12/GPIO2C

60

KSO13/GPIO2D

61

KSO14/GPIO2E

62

KSO15/GPIO2F

89

EC URXD/KSO16/GPIO48

90

EC UTXD/KSO17/GPIO49

88

EC SMD2/ GPIO47/SDA2

87

EC SMC2/GPIO46/SCL2

86

EC SMD1/GPIO44/SDA1

85

EC SMC1/GPIO44/SCL1

34

PCM_SPK#/EMAIL_LED#/ GPIO16

35

SB_SPKR/PWR_SUSP_LED#/ GPIO17

38

PWRLED#/ GPIO19

40

NUMLED#/ GPIO1A

99

BATT CHGI LED#/ E51CS#

101

BATT LOW LED#/ E51MR0

100

CAPS LED#/ E51TMR1

102

ARROW LED#/ E51 INT0

104

SYSON/GPIO56/ E51 INT1

4

EC_RSMRST#/ GPIO02

7

BKOFF#/GPIO03

8

PM SLP S3#/GPIO04

16

EC LID OUT#/GPIO06

17

PM SLP S05#/ GPIO07

18

EC SMI#/GPIO08

19

EC SWI#/GPIO09

20

LID SW#/ GPIO0A

21

SUSP#/GPIO0B

22

PBTN_OUT#/GPIO0C

23

EC PME#/GPIO0D

140

XCLKO

138

XCLKI

+EC_AVCC

Host

INTERFACE

key Matrix

scan

+3VALW

12

L12
0_0603_5%

C315

11

26

VCC/ EC VCC

VCC / EC VCC

SM BUS

GND

GND

103

129

139

1 2

0.1U_0402_16V4Z

105

VCC / EC VCC37VCC / EC VCC

PWR

FAN/PWM

GND13GND28GND

GND

+EC_AVCC+3VALW

75

127

141

BATTEMP/AD0/GPIO38

VCC

VCC

BATT OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD BID0/AD3/GPIO3B

AD INtput or GPI

EC_AVCC / AVCC

DAC_BRIG/DA0/GPIO3D

EN DFAN1/DA1/GPIO3D

EN DFAN2/DA3/ GPIO3F

DA output or GPO

INVT_PWM/GPIO0F/PWM1

BEEP#/GPIO10/PWM2

OUT BEEP/GPIO12/PWM3

ACOFF/GPIO18/PWM4
FAN SPEED1/GPIO14/FANFB1
FAN SPEED2/GPIO15/FANFB2

PS2 interface

Data
BUS

Address

BUS

SELIO2#/ GPIO43

FSEL#/SELMEM#

ECTHERM#/GPIO11

PCMRST#/GPIO1E

WL OFF#/GPIO1F

FSTCHG/GPIO41

AGND

KB910L_LQFP144

39

77

SA009100100(RevA0)->SA009100110(RevA1)

ECAGND

www.laptopfix.vn

C

BATT_TEMP

BATT_TEMP

71

BATT_OVP

72
73

M/B_ID

74

76
78
79

IREF2/DA2

80

25
27
30
31
32
33

91

PSCLK1

92

PSDAT1

PSCLK2

PSDAT2

PSCLK3

PSDAT3
ADB0/D0

ADB1/D1
ADB2/D2

ADB3/ D3

ADB4/D4
ADB5/D5
ADB6/D6
ADB7/D7
KBA0/A0
KBA1/A1
KBA2/A2
KBA3/A3
KBA4/A4
KBA5/A5
KBA6/A6
KBA7/A7
KBA8/A8

KBA9/A9
KBA10/A10
KBA11/A11
KBA12/A12
KBA13/A13
KBA14/A14
KBA15/A15
KBA16/A16
KBA17/A17
KBA18/A18
KBA19/A19

SELIO#/ GPIO50

FRD#/RD#

FWR#/WR#

EC ON/ GPIO1B

AC IN/ GPIO1C

ONOFF/GPIO18

ALI/MH#/GPIO40

VR ON/ GPIO42
GPIO57/GPIO57
GPIO58/GPIO58
GPIO59/GPIO59

L13

1 2

ON/OFFBTN_LED#

93
94

PSCLK3

95

PSDAT3

96

ADB0

125

ADB1

126

ADB2

128

ADB3

130

ADB4

131

ADB5

132

ADB6

133

ADB7

134

KBA0

111

KBA1

112

KBA2

113

KBA3

114

KBA4

115

KBA5

116

KBA6

117

KBA7

118

KBA8

119

KBA9

120

KBA10

121

KBA11

122

KBA12

123

KBA13

124

KBA14

110

KBA15

109

KBA16

108

KBA17

107

KBA18

106

KBA19

98
84

97

FRD#URX

135

FWR#

136

FSEL#

144
41

43

THERM_SCI#

29
36
45

ICH_PWRGD

46

MSEN#

81
82
83

SLP_S4#

137

SPI_CLK

142
143

0_0603_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

1 2

BATT_TEMP <38>
BATT_OVP <38>

DAC_BRIG <14>
IREF <33>

INVT_PWM <14>
FAN_PWM <13>

ACOFF <33>

BK_EN <9,14>

2006/08/09

ADB[0..7]
KBA[0..19]

+VCCP_PWRGD <7>
FRD# <30>

FWR# <30>
FSEL# <30>

EC_ON <30>

ON/OFF <30>
OVP_OV# <19>
ICH_PWRGD <19>

FSTCHG <33>
VR_ON <37>
SLP_S4# <19>
SPI_CLK <30>

ECAGND

C295

0.01U_0402_16V7K

ON/OFFBTN_LED# <28,30>
AMBER_BATLED# <28>
PSCLK3 <28>
PSDAT3 <28>

ADB[0..7] <30>
KBA[0..19] <30>

EC_MUTE# <27>

THERM_SCI# <19>

MSEN# <15>

PROCHOT# <4>

+3VALW

12

R1925
10K_0402_5%

D43 RB751V_SOD323

2 1

D

BID definition

Low (0V) --->DB

1.65V(R1995=2K,R1997=2K) --->SI

2.2V(R1996=1K,R1997=2K) --->PV
High (3.3V) --->MV

M/B_ID

E

2K_0402_5%

@

R1995

2006/09/15

CP3

KSO14
KSO11

2

KSO10

3

KSO15

4 5

100P_1206_8P4C_50V8@

KSO6
KSO3

2

KSO12

3

KSO13

4 5

100P_1206_8P4C_50V8@

KSO2
KSO4

2

KSO7

3

KSO8

4 5

100P_1206_8P4C_50V8@

KSI3
KSO5

2

KSO1

3

KSI0

4 5

100P_1206_8P4C_50V8@

KSI4
KSI5

2

KSO0

3

KSI2

4 5

100P_1206_8P4C_50V8@

KSI1
KSI7

2

KSI6

3

KSO9

4 5

@

12

R24310K_0402_5%

12

R24610K_0402_5%

R288 10K_0402_5%

1 2

R287 10K_0402_5%

1 2

R231 10K_0402_5%@

1 2

CP4

CP6

CP5

CP2

CP1

100P_1206_8P4C_50V8

+5VALW

+3VALW

KSO2<30>

ACIN <33,34>

INT_KBD CONN.

ACES_85201-2405

CONN@

KSO15

1

KSO10

2

KSO11

3

KSO14

4

KSO13

5

KSO12

6

KSO3

7

KSO6

8

KSO8

9

KSO7

10

KSO4

11

KSO2

12

KSI0

13

KSO1

14

KSO5

15

KSI3

16

KSI2

17

KSO0

18

KSI5

19

KSI4

20

KSO9

21

KSI6

22

KSI7

23

KSI1

24

JP4

PSCLK3
PSDAT3

FSEL#
FRD#
EC_SMI#

WL/BT ON delete，follow DAU00 use SB GPIO control

Title

Size Document Number Rev

D

Date: Sheet

Compal Electronics, Inc.

KBD EC CTRL-KB910L

LA-3361P

E

29 43Thursday, September 21, 2006

+3VALW

12

12

1K_0402_5%

12

R1997

@

2K_0402_5%

EMI Add

81
7
6

81
7
6

81
7
6

81
7
6

81
7
6

81
7
6

of

R1996

0.3

A

Power BTN

ON/OFF Botton

100K_0402_5%

D5

1

DAN202U_SC70

2

+3VALW

R55

3
2

12

ON/OFF
51ON#

Q9
DTC124EK_SC59

13

2

D33
SF10402ML080C_0402

SW2

1 1

2 2

14@

1BT002-01210_4P

3
4

5

@

1

1
2

6

ON/OFFBTN#

+3VALW

12

R53

4.7K_0402_5%

EC_ON<29>

EC_ON

B

1

2

C107

1000P_0402_50V7K

ON/OFF <29>
51ON# <32,34>

12

D4
RLZ20A_LL34

LID_SW

SPPB530600_4P

3
4

SW3

FWR#

TC7SH32FU_SSOP5@

14@

C

R60

10K_0402_5%@

R59

1 2

22_0402_5%@

SUSP# <29,31,36>

EC_FLASH# <19>

2

1 3

D

G

Q8

S

2N7002_SOT23@

FWR# <29>

INT_FSEL# FSEL#LID_SW#_R

1
2

+3VALW

5

P

I0

4

O

I1

G

U10

3

+3VALW

12

R54
100K_0402_5%@

2
1

12

1 2

C109

2

0.1U_0402_16V4Z@

1

4

R58

0_0402_5%

D

1

OE#

+3VALW

INT_FLASH_EN#

5

U11

P

I2O

G

74LVC1G125GW_SOT3535@

3

100K_0402_5%@

R57

1 2

C108 0.1U_0402_16V4Z@

12

FSEL# <29>

C540

0.1U_0402_16V4Z

1 2

4

74LVC1G125GW_SOT3535

+3VALW

SB_INT_FLASH_SEL#

1

U33

OE#

E

5

P

SUS_STAT#INT_FLASH_SEL

I2O

G

3

SB_INT_FLASH_SEL# <19>

SUS_STAT# <19>

1MB FLASH ROM

+3VALW

Alternative SA290080100

WE#

VDD

OE#
CE#

DQ7
DQ6
DQ5
DQ4
DQ3

ADB[0..7]KBA[0..19]

KBA0
KBA1
KBA2
KBA3
KBA4

32

FWR#

31

KBA17

30

A17

KBA14

29

A14

KBA13

28

A13

KBA8

27

A8

KBA9

26

A9

KBA11

25

A11

FRD#

24

KBA10

23

A10

INT_FSEL#

22

ADB7

21

ADB6

20

ADB5

19

ADB4

18

ADB3

17

+3VALW+3VALW

12

R226
100K_0402_5%

1

A0

2

A1

3

A2

4

GND

12

R228
100K_0402_5%

2

C120

0.1U_0402_16V4Z

1

+3VALW

FRD#<29>

KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

INT_FSEL#
FRD#
FWR#

INT_FLASH_EN#
INT_FLASH_SEL

B

U12

21

A0

20

A1

19

A2

18

A3

17

A4

16

A5

15

A6

14

A7

8

A8

7

A9

36

A10

6

A11

5

A12

4

A13

3

A14

2

A15

1

A16

READY/BUSY#

40

A17

13

A18

37

A19

22

CE#

24

OE#

9

WE#

SST39VF080-70_TSOP40@

VCC0
VCC1

GND0
GND1

RP#

NC0
NC1

31
30

25

D0

26

D1

27

D2

28

D3

32

D4

33

D5

34

D6

35

D7

10
11

NC

12
29
38

23
39

1MB ROM SOCKET

KBA15
KBA14
KBA13
KBA12
KBA11

KBA8
FWR#
RESET#1

KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1

JP8

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40

SUYIN_80065AR-040G2T

KBA17KBA16

KBA19
KBA10
ADB7
ADB6KBA9
ADB5
ADB4

ADB3
ADB2
ADB1
ADB0
FRD#

FSEL#
KBA0

www.laptopfix.vn

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

RESET#1

+3VALW

+3VALW

ON/OFFBTN_LED#<28,29>

1 2

R294
100K_0402_5% @

+3VALW

C1447

0.1U_0402_16V4ZSPI@

SPI_CLK<29>

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

KBA[0..19] <29> ADB[0..7] <29>

512K FLASH ROM

U14

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1

0.1U_0402_16V4Z

SMB_EC_CK1<29,38>
SMB_EC_DA1<29,38>

ADB2

C324

3 3

4 4

1

A18

2

A16

3

A15

4

A12

5

A7

6

A6

7

A5

8

A4

9

A3

10

A2

11

A1

12

A0

13

DQ0

14

DQ1

15

DQ2

16

VSS

SST39VF040-70-4C-NH_PLCC32

BIOS SOCKET-DC040043905

1

2

8
7
6
5

AT24C16AN-10SI-2.7_SO8

A

U19

VCC
WP
SCL
SDA

8/11

WL_LED_S<28>

WL_BTN#<28,29>

LID_SW#<29>

KBA19 KSO2

+3VALW

20mils

1

WP#
HOLD#

2

FSEL#

SPI_CLK
FWR#

D

+3VS

ON/OFFBTN#
ON/OFFBTN_LED#
WL_LED_S
WL_BTN#
LID_SW# LID_SW#_R

1 2

R2015 1K_0402_5%

R1908

SPI@

1 2

0_0402_5%

WP#
HOLD#

Short：SPI mode

U39

8

VCC

VSS

3

W

7

HOLD

1

S

6

C

5

Q

D

WIESO_G6179-100000_8PCONN@

1 2

0_0402_5%

1 2

0_0402_5%

Compal Electronics, Inc.

Title

BIOS & EXT. I/O PORT & PW BT

Size Document Number Rev

Custom

Date: Sheet

4

2

R1906
R1907

JP60

1
2
3
4
5
6
7
8

ACES_85201-0805_8PCONN@

KSO2 <29>

&U1

SPI@

SST25LF080A_SO8-200mil

E

30 43Thursday, September 21, 2006

0.3

of

FRD#

@
@

1

C1446

0.1U_0402_16V8K

2

SPI@

LA-3361P

5

4

3

2

1

+3VALW +3VS

Q33

8

S

D

7

S

CF1

1

FM1

H1
HOLEA

1

H21
HOLEA

1

D

6

D

5

D

AO4422_SO8
C350
10U_0805_10V4Z

C480

10U_0805_10V4Z

C136

0.01U_0402_16V7K

CF2

1

FM2

1

H2
HOLEA

1

S
G

+5VALW to +5VS Transfer

+5VALW

1

H3
HOLEA

H23
HOLEA

D D

C C

B B

A A

SUSP

C352
22U_1206_10V4Z

C351
22U_1206_10V4Z

B+

12

13

D

2

G

S

10U_0805_10V4Z

R92
100K_0402_5%

R99
1M_0402_5%

Q19
2N7002_SOT23

1

+3VALW to +3VS Transfer

1
2
3
4

CF3

1

FM3

1

1

Q39

8

D

7

D

6

D

5

D

AO4422_SO8

RUNON

1

H4
HOLEA

H14
HOLEA

H24
HOLEA

C380

22U_1206_10V4Z

RUNON

S
S
S
G

CF4

1

FM4

1

1

1

1

1
2
3
4

H5
HOLEA

H15
HOLEA

H25
HOLEA

CF5

1

FM5

1

1

1

C382

0.1U_0402_16V4Z

+5VS

0.1U_0402_16V4Z

CF6

1

FM6

1

H6
HOLEA

1

H16
HOLEA

1

H26
HOLEA

1

1

2

H7
HOLEA

H17
HOLEA

C448
22U_1206_10V4Z

CF8

CF7

1

1

H8
HOLEA

1

1

H18
HOLEA

1

1

CF9

1

CF12

1

H9
HOLEA

1

H19
HOLEA

1

CF10

1

CF11

1

H20
HOLEA

1

+5VS +2.5VS+3VS +1.5VS +0.9VS +VCCP

C1549

R74
470_0402_5%

Q13

13

D

SUSP SUSP

2

G

2N7002_SOT23

S

+1.5VS

+3VALW

+3VALW

+3VS

+3VS

+3VS

+3VS

+VCCP

1

2

2

1

C1550

0.047U_0402_16V4Z

0.047U_0402_16V4Z

C481

D

S

R72
470_0402_5%

13

R76
470_0402_5%

C450

13

D

Q15

SUSP SUSP SUSP

2

G

2N7002_SOT23

S

+3VS

+3VS

+5VALW

+5VALW +5VS

+1.8V

+1.8V

+1.8V

+1.8V

+1.8V

+5VALW +5VALW +5VALW +5VALW +5VALW +5VALW

C1545

0.01U_0402_16V7K

R75
470_0402_5%

Q14

13

D

SUSP

2

G

2N7002_SOT23

S

1 2

C5 0.1U_0402_16V4Z@

1 2

C6 0.1U_0402_16V4Z@

1 2

C7 0.1U_0402_16V4Z@

1 2

C8 0.1U_0402_16V4Z@

1 2

C10 0.1U_0402_16V4Z@

C1540 1000P_0402_50V7K

1 2

C1541 1000P_0402_50V7K

1 2

C1542 1000P_0402_50V7K

1 2

C1543 1000P_0402_50V7K

1 2

C1544 1000P_0402_50V7K

1 2

7/11 EMI request

C1547

C1548

0.01U_0402_16V7K

0.01U_0402_16V7K

C1546

0.01U_0402_16V7K

7/11 EMI request

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Q12

2

G

2N7002_SOT23

D

S

+1.8V

R1921
470_0402_5%

13

D

S

Q49

SYSON#

2

G

2N7002_SOT23

R68
470_0402_5%

Q11

13

2

G

2N7002_SOT23

R62
470_0402_5%

Q10

13

D

2

G

2N7002_SOT23

S

+5VALW

12

R280
47K_0402_5%

SYSON#<19,28>

SYSON<29,35>

SUSP#<29,30,36>

Title

Size Document Number Rev
Custom

Date: Sheet

SYSON#

13

D

2

G

S

+5VALW

12

SUSP#

SUSP

13

D

2

G

S

SUSP<35>

Compal Electronics, Inc.

POWER CONTROL

LA-3361P

1

Q31
2N7002_SOT23

R285
10K_0402_5%

Q32
2N7002_SOT23

31 43Thursday, September 21, 2006

of

0.3

A

1 1

2 2

5

6

123

3

4

4

PCN1
SINGATRON_2DC_S736I201

1

2

ADPIN

12

PC2

100P_0402_50V8J

SMB3025500YA_2P

PL1

1 2

12

PC3
1000P_0402_50V7K

PC4

B

12

12

PC5

1000P_0402_50V7K

100P_0402_50V8J

C

PD1

VIN

1 2

PR1

12

PR3
15K_0402_5%

47_1206_5%

PD2

RLS4148_LLDS2

VS

PQ1
TP0610K-T1-E3_SOT23

12

12

PC6

0.1U_0603_50V4Z

1 3

2

12

PC1

0.22U_1206_25V7K

1 2

RB751V_SOD323

12

PR2

100K_0402_5%

PR4

22K_0402_5%

VMB

12

51ON# <30,34>

D

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

<Issued_Date> <Deciphered_Date>

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

Custom

Date: Sheet

DC CONN

<Doc>

D

32 43Thursday, September 21, 2006

of

A

VIN P4

PR5

1 2

13

PR15

1 2

3K_0402_5%

1 2

PD4

1N4148_SOD80

VIN

PR30

12

PR34

A

47K_0402_5%

47K

2

47K

DTC115EUA_SC70
PQ6

12

133K_0603_1%

PR33

2.15K_0402_1%

1 2

12

12.4K_0603_0.1%

PC25

0.022U_0402_16V7K

12

12

1 1

PC7

PR10

47K_0402_1%

1 2

2

2 2

3 3

4 4

47P_0402_50V8J

2

13

D

PQ8RHU002N06_SOT323

G

S

PACIN

ACOFF#

PC22

0.047U_0402_16V7K

1 3

2

G

3
2

PQ3
SI4835BDY-T1-E3_SO8

8
7

5

DTA144EUA_SC70
PQ5

13

D

S

PQ10

RHU002N06_SOT323

PR26

1 2

1M_0402_5%

VS

12

8

PU2A

P

+

1

O

-

G

LM393DG_SO8

4

PR38

1 2

75K_0402_1%

4

REF

5

ANODE

LMV431ACM5X_SOT23-5

4

PC107

0.1U_0603_25V7K

CATHODE

P2

12

0.1U_0603_16V7K

1 2

1 2

3
2
1

PR17
191K_0402_1%

3
2
1 6

12

PR7
200K_0402_5%

PR14
150K_0402_5%

1.24VREF

3
2
16

PC8

IREF<29>

P2

PU3

NC
NC

www.laptopfix.vn

B

PQ4
SI4835BDY-T1-E3_SO8

4

12

PC13

0.1U_0603_25V7K

VIN

PD6

B

12

PC9

10U_1206_25V6M

25
22
21
16

SRP

15
12
24

18

VS

20
6

1
17
23

NC4

14

NC3

Deciphered Date

C

12

PC10

4.7U_1206_25V6K
PD3

RLZ16B_LL34

DH_CHG
SE_CHG+
SE_CHG-

12

C

3
2
1 6

12

2 1

+3VLP

12

PR28

100K_0402_5%

12

PR35

@75K_0402_1%

12

PR39

PC23

@15K_0402_1%

@100P_0402_50V8J

PQ2
SI4835BDY-T1-E3_SO8

B+

8
7

5

PL2

FBM-L11-322513-151LMAT_1210

1 2

PU1

8

ACN

9

26

5
28
19

2

3
13

4

7
10
11

ACDRV#
ACP
ACDET

ENABLE
ACSEL
ALARM
SRSET
ACSET
ACPRES27VHSP
IBAT
VREF

COMP
NC1
NC2

12

12

BATDRV#

BATSET
BATDEP

BQ24703_QFN28

PR25
150_0402_1%

PC21

4.7U_0805_10V6K

PWM#

VCC

SRN

BATP

GND

Compal Secret Data

PACIN

FSTCHG<29>

PR20

1 2

100K_0402_1%

12

PC19

1U_0603_6.3V6M

12

PR29

10K_0402_1%

3.2V

12

RLZ4.3B_LL34

Security Classification

12

PR11
100_0402_1%

1U_0603_6.3V6M

+3VLP

BQ24703VREF

12

12

1 2

1K_0402_5%

12

PR36
10K_0402_5%

PR9

0.015_2512_1%

1 2

1 2

PC11

0_0402_5%

PR18

PR21

100K_0402_1%

12

PC17

PR24

32.4K_0402_1%

150P_0402_50V8J

PR31

PACIN

12

PR12
100_0402_1%

SE_ConPWR­SE_ConPWR+

PR16

12

12

100K_0402_5%

4.7U_0805_6.3V6K

PC20

ACIN <29,34>

PACIN <34>

12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

PC12

1U_0805_25V4Z

CHG_B+

PR13

0_0402_5%

BATT

12

PC24

470P_0402_50V7K

D

8
7

5

ACOFF#

+3VLP

12

RHU002N06_SOT323

16

243

578

LX_CHG

16UH_SIL104R-160PF_3.6A_30%

12

PD5
EC31QS04

PR153
100K_0402_5%

PACIN

2

G

PQ31

PQ9
SI4835BDY-T1-E3_SO8

1 2

PL3

13

D

12

2

G

S

13

D

RHU002N06_SOT323

PQ32

S

PR19

0.015_2512_1%

1 2

12

PR22

3K_0402_1%
PC18

1 2

0.1U_0402_16V7K

CV=16.8V (4/8 CELLS LI-ION)
=12.6V (6 CELLS LI-ION)
CC=1.54A (4 CELLS LI-ION)
=3A (6/8 CELLS LI-ION)

12

PR27
604K_0603_0.1%

12

PR32
10K_0603_0.1%

12

PR37
47K_0603_0.1%

100K_0402_5%

RHU002N06_SOT323

PQ33

12

PR156

17.4K_0603_0.1%

13

D

G

S

Title

Size Document Number Rev

Custom

Date: Sheet

Thursday, September 21, 2006

+3VALW

PQ34

12

PR155
47K_0402_5%

"Lo": 4/8 CELLS LI-ION

2

G

"Hi": 6 CELLS LI-ION

PR154

2

12

13

D

S

RHU002N06_SOT323

Compal Electronics, Inc.

Charger

D

1 2

47K_0402_5%

PR8
10K_0402_5%

1 2

PQ7
DTC115EUA_SC70

13

2

12

12

PR23

3K_0402_1%

BATT

PR6

BATT

12

PC14

4.7U_1206_25V6K

Batt_Det <38>

of

4333

VIN

ACOFF <29>

PC15

10U_1206_25V6M

A

B

C

D

E

PC26

D2
D2

D1/S2/K

G1

D1/S2/K
D1/S2/K

S1/A

AO4916_SO8

VL

0.1U_0603_25V7K
499K_0603_1%

0.1U_0603_50V4Z

1 2

PQ11

DH_5V_B

8

G2

7
6
5

2VREF_1999

PR56

12

BST_5V_B

PR40

0_0402_5%

1 2

PR50

1 2

0_0402_5%

ACIN<29,33>

MAINPWON

12

PC41

0.047U_0603_16V7K

RHU002N06_SOT323

PR51

1 2

@0_0402_5%

1 2

PR53

10K_0402_5%

2VREF_1999

MAINPWON <18,38>

13

D

S

PQ13

1 2

2

G

PR42
0_0402_5%

BST_5V
DH_5V
LX_5V

DL_5V

12

D

S

2

3

PD7
CHP202UPT_SOT323-3

1

B++

VL

1

PC35

2

4.7U_0805_10V4Z

18

PU4

14

BST5
DH5
LX5

DL5
OUT5

9

FB5

1

N.C.

6

SHDN#

4

ON5

3

ON3
SKIP#

8

REF

PC39

0.22U_0603_10V7K

LD05

23

16
15

19
21

12

VL

12

PR59
100K_0402_5%

13

2

G

PQ14

RHU002N06_SOT323

12

PC33

20

V+

GND

25

1

PC40

2

4.7U_0805_10V4Z

BST_3.3V_B

VL

1 2

0.1U_0603_50V4Z

13

17

TON

VCC

OUT3

PGOOD

PRO#

LDO3

10

+3VLP

1 2

PACIN <33>

ILIM3

ILIM5
BST3

12

PC30

47_0402_5%

0.1U_0603_16V7K

PR41

2VREF_1999

12

PC34

PR44
0_0402_5%

1 2

1U_0805_16V7K

5

1 2

11

BST_3.3V

28

DH_3.3V

26

DH3

DL_3.3V

24

DL3

LX_3.3V

27

LX3

22
7

FB3

2

MAX8734AEEI+_QSOP28

PR57
0_0402_5%

13

D

2

G

PQ15

S

RHU002N06_SOT323

0_0402_5%

PR45

1 2

PR47

PR48

1 2

@499K_0402_1%

1 2

@499K_0402_1%

PR61
100K_0402_5%

1 1

B+

2 2

PL4

FBM-L11-322513-151LMAT_1210

12

B++

12

12

PC28

10U_LF919AS-100M-P3_4.5A_20%

PC29

10U_1206_25V6M

2200P_0402_50V7K

PL5

1
2
3
4

12

+5VALWP

PC36

150U_D2_6.3VM

3 3

PR49

1

1 2

+

2

@10.2K_0402_1%

PR54

0_0402_5%

1 2

B++

12

PR52

47K_0402_5%

12

PC37

PC27

0.1U_0603_50V4Z

1 2

B++

PR43
0_0402_5%

1 2

PR46

1 2

PQ30
TP0610K-T1-E3_SOT23

1 3

12

PC31

2200P_0402_50V7K

0_0402_5%

2

12

PC32

4.7U_1206_25V6K

PQ12

1

D2

2

D2

D1/S2/K

3

G1

D1/S2/K

4

D1/S2/K

S1/A

AO4916_SO8

10U_LF919AS-100M-P3_4.5A_20%

+3VLP

G2

8
7
6
5

DH_3.3V_B

PL6

PR55

1 2

@3.57K_0402_1%

PR58

1 2

0_0402_5%

12

+3VALWP

1

+

PC38
150U_D2_6.3VM

2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

<Issued_Date> <Deciphered_Date>

C

Compal Secret Data

Deciphered Date

51ON#<30,32>

Title

Size Document Number Rev

D

Date: Sheet

Compal Electronics, Inc.

3.3VALWP / 5VALWP

Thursday, September 21, 2006

E

of

4334

A

PL15

FBMA-L11-322513-151LMA50T_1210

B+

12

1 1

PC116
680P_0402_50V7K

+6269_VCC

2.2U_0603_6.3V6K

SYSON<29,31>

2 2

3 3

PJP1

+5VALWP

+3VALWP

+1.8VP

+1.05V_VCCP

4 4

+1.5VSP

+0.9VSP

1 2

PAD-OPEN 4x4m
PJP3

1 2

PAD-OPEN 4x4m
PJP4

1 2

PAD-OPEN 4x4m
PJP5

1 2

PAD-OPEN 4x4m
PJP6

1 2

PAD-OPEN 4x4m
PJP7

1 2

PAD-OPEN 3x3m

12

PC43

2200P_0402_50V7K

PC49

1.8V_B+

12

12

1 2

PR67

0_0402_5%

A

12

PC44

10U_1206_25V6M

1

2

PR66

1 2

0_0402_5%

+5VALW

+3VALW

+1.8V

+VCCP

+1.5VS

+0.9VS

3

4

12

PC113
@2200P_0402_25V7K

PC53

22P_0402_50V8J

(4.5A,180mils ,Via NO.= 9)

(3A,120mils ,Via NO.= 6)

(6A,240mils ,Via NO.= 12)

(4A,160mils ,Via NO.= 8)

(4A,160mils ,Via NO.=8)

(2A,80mils ,Via NO.= 4)

PR63

10K_0402_5%

17

PU5

VIN

VCC

FCCM

EN

12

12

90.9K_0402_1%

12

PC54

+6269_VCC

12

LX_1.8V

DH_1.8V

16

15

14

GND

COMP5FB6FSET

PHASE

PGOOD

FB_1.8V

PR69

PR70

6800P_0603_50V7K

1 2

12

PR72

2.05K_0603_1%

7

12

57.6K_0402_1%

PR71

4.12K_0402_1%

1 2

BST_1.8V

0_0402_5%

13

UG

BOOT

PVCC

LG

PGND

ISEN

VO

ISL6269ACRZ-T_QFN16

8

12

PC52

0.01U_0402_16V7K

+2.5VSP

www.laptopfix.vn

PR62
0_0603_5%

+5VALW

PR64

12

DL_1.8V

11

10

SE_1.8V

9

B

0.22U_0603_16V7K

12

PR65

1 2

2.2_0603_5%

1 2

1 2

15.4K_0402_1%

PJP2

1 2

PAD-OPEN 3x3m

B

C

1 2

PC47

+6269_VCC

PC48

2.2U_0603_6.3V6K

PR68

(500mA,40mils ,Via NO.= 1)

+2.5VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

D8D7D6D

S1S2S3G

PQ16
SI4800BDY-T1-E3_SO8

4

1 2

PR75

0_0402_5%

C

1 2

PL7

+1.8V

12

12

PC55

RHU002N06_SOT323

2

G

12

PC60
@0.1U_0402_16V7K

PC56

PQ18

10U_0805_10V4Z

13

D

S

3.3UH_PCMC063T-3R3MN_6A_20%

12

PR152

5

D8D7D6D

PQ17

S1S2S3G

AO4702_SO8

4

4.7_1206_5%

PC114

1 2

680P_0603_50V7K

10U_0805_10V4Z

SUSP<31>

<Issued_Date> <Deciphered_Date>

Compal Secret Data

Deciphered Date

12

12

PR74
1K_0402_1%

1

+

PC42

2

+3VS

PR73

1.07K_0402_1%

D

+1.8VP

12

12

PC46

PC45

0.1U_0402_16V7K

0.1U_0402_16V7K

220U_V_4VM_R25M

(500mA,40mils ,Via NO.= 1)

PU6
APL5508_SOT89

12

PC50

1U_0603_10V6K

PU7

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

2

IN

NC
NC
NC
TP

GND

3

OUT

1

6
5
7
8
9

+0.9VSP

12

12

PC59
22U_1206_6.3V6M

0.1U_0402_16V7K

PC58

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

1.8VP/0.9VSP/2.5VSP

<Doc>

D

12

+2.5VSP

PC51

12

35 43Thursday, September 21, 2006

4.7U_0805_6.3V6K

+5VALW

PC57
1U_0603_16V6K

of

0.1

5

D D

4

3

2

1

PC65

PC76

PU8

1
2

PR151

B+++

12

12

0.1U_0603_25V7K

BST1
DH1
LX1

DL1
CS1

OUT1
FB1

ON1

OVP

8

PR86

0_0402_5%

PR76
0_0402_5%

1 2

4

V+

GND

23

2VREF

12

PR77
20_0603_5%

1 2

VCC_MAX8743

9

22

UVP

VCC

PGOOD

SKIP

REF

6

10

12

PC67

0.22U_0603_16V7K

12

PC66
1U_0805_16V7K

VDD

BST2

DH2

LX2
DL2
CS2

OUT2

FB2
ON2

TON

ILIM2
ILIM1

PR82

0_0402_5%

PR83

0_0402_5%

100K_0402_1%

21
19

18
17
20
16

15
14
12

7
5

13
3

PR92

12

12

BST_1.5V
DH_1.5V
LX_1.5V
DL_1.5V

12

12

PR79

1 2

0_0603_5%

0_0402_5%

1 2

PR87

0_0402_5%

12

PR93
100K_0402_1%

+5VALWP

PC68

4.7U_1206_25V6K

BST_1.5V_B

PR81

12

PC70

12

0.1U_0603_25V7K

DH_1.5V_B

@1SS355_SOD323

12

PC80
@1000P_0402_50V7K

8
7
6
5

PD13

1 2

0_0402_5%

PR90

G2
D1/S2/K
D1/S2/K
D1/S2/K

AO4916_SO8

12

PQ19

D2
D2
G1

S1/A

SUSP#

12

12

PC63

@2200P_0402_50V7K

1
2
3
4

PL10

3.3UH_PCMC063T-3R3MN_6A_20%

1 2

PC64

4.7U_1206_25V6K

12

12

PR84

5.1K_0402_1%

PR91
10K_0402_1%

+1.5VSP

1

+

PC73

2

220U_B2_2.5VM

PC74

4.7U_0805_6.3V6K

1 2

12

PL8

1 2

3.3UH_PCMC063T-3R3MN_6A_20%

12

1

+

PC71

2

220U_V_4VM_R25M

12

12

5.1K_0402_1%

PR85

PR88
100K_0402_1%

12

PC61

PC62

10U_1206_25V6M

@2200P_0402_50V7K

PL9

12

PQ20

1

D2

2

D2

3

G1

4

S1/A

SUSP#<29,30,31>

D1/S2/K
D1/S2/K
D1/S2/K

AO4916_SO8

G2

8
7
6
5

0.1U_0603_25V7K

@1SS355_SOD323

@1000P_0402_50V7K

PC69

12

DH_1.05V_B

PD12

1 2

PR89
0_0402_5%

1

PD8
CHP202UPT_SOT323-3

2

3

BST_1.5V_B

BST_1.05V_B

0_0603_5%

1 2

PR80

1 2

0_0402_5%

12

12

PC79

PR78

1U_0805_50V4Z

BST_1.05V

DH_1.05V

MAX8743EEI+T_QSOP28

VCC_MAX8743

LX_1.05V

DL_1.05V

25
26
27

24
28

11

1 2

@0_0402_5%

FBMA-L11-322513-151LMA50T_1210

B+

C C

+1.05V_VCCP

PC72

4.7U_0805_6.3V6K

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

<Issued_Date>

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

1.05VSP/1.5VSP

1

0.1

36 43Thursday, September 21, 2006

of

5

4

3

2

1

+5VS

+3VS

12

PR94

1 2

PC87

1U_0603_10V6K

PR113

1 2

0_0402_5%

12

REF_CPU

1 2

PC97

12

PR130
10K_0402_1%

13

D

PQ27
RHU002N06_SOT323

S

10_0402_5%

PU9

VCC_CPU

10
24
23
22
21
20
19
25

4
5
6
1

12

2
8
9
7

3
18
11

27P_0402_50V8J

2.2U_0603_6.3V4Z

VCC
D0
D1
D2
D3
D4
D5
VROK
S0
S1
SHDN
TIME
CCV
TON
REF
ILIM
OFS
SUS
SKIP
GND

MAX1532AETL+T_TQFN40

D D

10K_0402_5%

PR116

PR119

1 2

200K_0402_1%

1 2

10.7K_0402_1%

PR127

0_0402_5%

1 2

+3VS

100K_0402_1%

PR134

12

PR96 0_0402_5%

PR97 0_0402_5%
PR100 0_0402_5%
PR103 0_0402_5%
PR105 0_0402_5%
PR108 0_0402_5%

PR109 0_0402_5%

1 2

12

PC96

100P_0402_50V8J

PR131

2

PR99

@0_0402_5%

VCC_CPU

1 2

REF_CPU

1 2

PR102

@0_0402_5%

1 2

PR107

0_0402_5%

C C

VR_ON9>

6,19>

B B

H_STP_CPU#

+3VS

1 2

FB_CPU

PR122 100K_0402_1%

PR124

0_0402_5%

1 2

PR126

1 2

100K_0402_5%

PM_DPRSLPVR<19>

PR115
0_0402_5%

1 2

PSI#<5>

A A

CPU_VID0<5>
CPU_VID1<5>
CPU_VID2<5>
CPU_VID3<5>
CPU_VID4<5>
CPU_VID5<5>

PR121

71.5K_0402_1%

1 2

PQ23

2

G

RHU002N06_SOT323

VGATE<16,19>

1 2

@100K_0402_5%

13

D

PR123

S

0_0402_5%

12

PR95

12
12
12
12
12
12

VCC_CPU

30.1K_0402_1%

PR117

PC93

1 2

270P_0402_50V7K

1 2

PC95 0.22U_0603_16V7K

13

D

PQ24

2

G

S

RHU002N06_SOT323

PR128

12

10K_0402_1%

1 2

2

G

1

PQ28

3

PMBT2222A_SOT23-3

VDD

BSTM

DHM

LXM

DLM

PGND

CMP
CMN

OAIN+

OAIN-

BSTS

DHS

DLS
CSP
CSN

GNDS

PC86

CCI

LXS

1 2

0.01U_0402_50V4Z

BST_CPU1_B

12

PC89

PR125

1 2

12

PC102

PR101

2.2_0402_5%

0.22U_0603_16V7K

1 2

BST_CPU1_B
BST_CPU2_B

0_0402_5%

1 2

0.22U_0603_16V7K

DH_CPU1_B

IRF7413Z_SO8

PR129

2.2_0402_5%

2
3

PQ25

12

30
36

V+

26
28
27
29
31
37
38
17
16
15

FB

14
35
33
34
32
40
39
13
41

TP

PC88

BST_CPU1
DH_CPU1
LX_CPU1
DL_CPU1

SE_CPU1+
SE_CPU1­OAIN+
OAIN­FB_CPU

BST_CPU2
DH_CPU2
LX_CPU2
DL_CPU2
SE_CPU2+
SE_CPU2-

PR98

1 2

0_0402_5%

1 2

PC94 470P_0402_50V8J

CPU_B+

5

4

5

4

1 2

PD9

CHP202UPT_SOT323-3

1 2

PQ21

D8D7D6D

IRF7413Z_SO8

S1S3G

S

2

D8D7D6D

S1S2S3G

PQ22

FDS6676AS_SO8

PR118 820_0402_5%

1

CPU_B+

5

D8D7D6D

S1S3G

S

4

2

5

D8D7D6D

S1S2S3G

PQ26

FDS6676AS_SO8

4

PR135
820_0402_5%

12

PC81

12

PR106

4.7_1206_5%

PC90

1 2

680P_0603_50V7K

+5VS

12

PC98

12

PC82

10U_1206_25V6M

10U_1206_25V6M

0.56UH_ETQP4LR56WFC_21A_20%

12

PC99

10U_1206_25V6M

2200P_0402_50V7K

12

PR132

4.7_1206_5%

PC103

1 2

680P_0603_50V7K

HCB4532KF-800T90_1812

12

12

PC83

PC84

12

PR110
820_0402_5%

12

PC100

0.01U_0402_50V4Z

2200P_0402_50V7K

PL12

1 2

PC92

1 2

0.47U_0603_16V7K

1 2

12

PC101

10U_1206_25V6M

0.01U_0402_50V4Z

PL13

0.56UH_ETQP4LR56WFC_21A_20%

1 2

PR133
820_0402_5%

1 2

1 2

PC104

0.47U_0603_16V7K

PL11

1 2

12

PR111 499_0402_1%

PR120

3K_0402_1%

PR104

1 2

0.001_2512_5%

1

+

PC85

2

@100U_25V_M

12

PR112 499_0402_1%

PR114 3K_0402_1%

B+

12

PC115
1000P_0402_50V7K

+CPU_CORE

CPU VCC SENSE

1 2

PC91

1 2

@1000P_0402_50V7K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Compal Electronics, Inc.

Title

+CPU_CORE

Size Document Number Rev

Custom

Date: Sheet of

37 43Thursday, September 21, 2006

1

0.1

A

B

C

D

OVP voltage :
LI-MH 4 CELL(4S1P)/ 8 CELL (4S2P)

BATT+ : 18.0V--> BATT_OVP : 2.0V

VMB

PCN2

6

1 1

2 2

BATT+

SMD
SMC
RES

TS

GND

TYCO_C-1746706_6P

EC_SMD

5

EC_SMC

4
3
2

1

PR139

100_0402_5%

Batt_Det <33>

PR136

12

@1K_0402_5%

PD10 @SM05_SOT23

3

1

2

PR137

6.49K_0402_1%

1 2

12

12

12

PR138
1K_0402_5%

PR140
100_0402_5%

+3VALW

SMB_EC_DA1
SMB_EC_CK1

2

3

PD11

1

@SM24_SOT23

BATT_TEMP <29>

PL14

HCB4532KF-800T90_1812

1 2

12

PC105
1000P_0402_50V7K

SMB_EC_DA1 <29,30>
SMB_EC_CK1 <29,30>

12

BATT

PC106

0.01U_0402_50V4Z

LI-MH 6 CELL(3S2P)
BATT+ : 13.5V--> BATT_OVP : 1.5V
(BATT_OVP voltage = 0.1109*BATT+)

BATT_OVP<29>

12

PC110

@0.1U_0402_16V7K

12

PR148

2.2K_0402_5%

1

0

7

VS

8

PU10A

P

+

-

G

LM358ADR_SO8

4

8

0

4

12

3
2

PU10B

5

P

+

6

-

G

LM358ADR_SO8

BATT

PC111

0.1U_0603_25V7K

12

PR149
340K_0402_1%

12

PR150
499K_0402_1%

12

PR147
105K_0603_0.5%

12

PC112

0.01U_0402_50V4Z

PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C
Recovery at 47 +-3 degree C

+5VS

3 3

CPU

12

PC108

0.22U_0603_10V7K

4 4

12

PH1

10K_TH11-3H103FT_0603_1%

PR142

15K_0603_1%

1 2

+5VS

12

PR144

2.55K_0603_1%

1 2

PR143

150K_0402_1%

150K_0402_1%

PR145

12

12

PC109
1000P_0402_50V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

PR141

47K_0402_1%

1 2

+5VS

PR146
10K_0402_5%

1 2

8

PU2B

5

P

+

7

O

6

-

G

LM393DG_SO8

4

<Issued_Date> <Deciphered_Date>

Compal Secret Data

Deciphered Date

C

2

G

13

D

PQ29
RHU002N06_SOT323

S

MAINPWON <18,34>

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

BATTERY CONN

<Doc>

D

3843Thursday, September 21, 2006

of

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1

Fixed IssueItem

1

2

D D

3

4

5

6

7

Reason for change Rev. PG#

0.2 6

Change U31 to LF parts Change U31 from SA204680000 to SA204680010

LID switch material error

CardBus controller material error

Un-install some bridge between AGND and DGND Un-install R1934,R1936,R1938,R1940

Let XMIT# match SW's GPIO definition

Modify Head phone sense's level

0.2 30

0.2 23

0.2 24

250.2

250.2

270.2

8

180.2

9

10

C C

11

12

13

14

15

16

17

HDD and ODD can't work at same time

0.2 21

0.2 23

0.2 24

0.2 17

0.2 19

Cost down ChangeR277、R274、R265、R279 to RP47

Cost down

Reserver a resistor for 2nd source Amp Add R28 for 2nd source Amp

0.2 17

0.2 17

0.2 27

Modify List Note Phase

Change C94,C95,C286 from SGA20331D80 to SGA20331D20

Debug DB
Debug DB

Change SW3 from SN511000300 to SN111000207

Change U38 from SA014100310 to SA014100130

Debug DB
Debug DB
Debug DB

Delete Q46,R1913,R1914

Delete R1990；Change C1526 to 0.1u 0402 cap；
Change R1991 to 20K resistor.

Add R81 and R50Reserve for SB internal +1.5VALW regulator

Add R27 pull high

JP54(PCMCIA connector) pin 71、pin72 connect to GNDDB phase loss
Reserve R1913 pull high +3VALWXMIT# Reserved pull high

Change RP43、RP44、RP45 package SIZE from 0804 to1206DB phase error

ChangeR732、R733、R737、R739 to RP46Cost down

ChangeR269、R268、R245、R262 to RP48

Debug DB

Debug DB

Debug DB
Debug DB

Debug DB

18

B B

19

20

21

22

23

24

A A

25
26
27

Avoid DISPLAYOFF# error status to high Change R120 to 47K and R9 to 4.7K

Avoid DISPLAYOFF# error status to high

EMI Request

EMI Request

EMI Request

EMI Request

EMI Request
EMI Request

EMI Request
EMI Request

28

5

4

www.laptopfix.vn

0.2 14

0.2 14

0.2 23

0.2

0.2 31

0.2 14

0.2 14

0.2 25

0.2 27

0.2 27

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Remove R4、C1 and Add C2. Change pull-up RES R8 with
+3VALW to Q1 gate net

Change C641 from 0.1u to 680P、Add C1538(680p) for +3V_CB

23

Change J4、J6 to bead L37、L38(SM010016810)

Add C1540、C1541、C1542、C1543、C1544 for +1.8V cross plane

Add C1533、C1534、C1535、C1536、C1537 for LVDS EMI Solution

Change L35 from R to Bead

Change R1946、R1945 to Bead L40、L41 and Add L39 For codec requlator

Add C1492、C1493
Change R1982、R1987、 R1989 to Bead L42、L43、L44

2

Compal Electronics, Inc.

Title

PIR

Size Document Number Rev

LA-3361P

Date: Sheet

1

of

39 43Thursday, September 21, 2006

0.3

5

4

3

2

1

Version change list (P.I.R. List) Page 2 of 2

Fixed IssueItem

1

2

D D

3

4

5

6

Reason for change Rev. PG#

280.2

EMI Request

EMI Request

Change LCD pin define

Reserve ESD diode for SPEAKER

EMI Request

0.2 22

0.2 30

0.2 14

0.2 27

0.2 16

Modify List B.Ver# Phase

Add C1539(0.1u) for Touch Pad +5VALWEMI Request

Add C1516、C1517 for LAN Transformer
Add C1545、C1546、C1547、C1548、C1549、C1550 for

Cardbus reference +5VALW power plane to GND
Change LCD pin define

Reserve D45

Change PJP14、PJP15 to Bead

7

8

9

C C

10
11

12

13

14

15

16

17

18

B B

19

20

21

22

23

24

25

26

A A

Reserve a resistor to disable AMOM

0.2 25

0.2 22

Add B channel from compatible with Others Connect NB LVDS B Channel to LVDS connector

Modify DISPLAYOFF# circuit

Let EC control BK_EN
EC Reset dis-charge

MotherBoard ID change to PV

Change LVDS CONN pin assignment for compatible

Reserve two USB port connector

Reserve bottom board connector

Modify LVDS power circuit

Delete MB standoff

Delete L39 Delete L39

WL ON/OFF & Wireless LED pull high voltage

EMI Request

Change amplifier gain

Change value of RTC capacitor

EMI Request

Reserve +3VS for LAN connector LED

EMI Request

0.3 9

0.3

0.3

0.3

0.3

0.3

0.3 30

0.3 14

0.3 31

0.3 28

0.3 22

0.3 27

0.3 18

0.3 28

0.3 12

Add R2012

Add R2013 The 33 ohm series resistor is required for signal integrityPlace JKCLK series resistor with 2 inches of the 82566

Connect BK_EN and BKOFF# to U13A gate to generate DISPLAYOFF#

14

Remove D28,D13 add R2014, Change R9 from 4.7Khom to 100Kohm

29

Connect BK_EN from NB to EC pin33(GPIO15)
Add a DIODE D46 for EC reset discharge

29

R1996 install 1Kohm,R1997 install 2Kohm

29

Add LVDS Channel B from NB and change pin assignment

14

Add JP59,R2017,R2018

190.3

Add JP60,R2015
Change Q3 pull high from +3VAL to +5VAL,Add R2016,C1551

Change C1532 from 0.01U to 0.047U
Delete H22

250.3

Change pull high voltage form +5VS to +3VS;R1915 from 200 ohm to 27ohm

Add C1552,C1553

Change R425,R424 from 34.8k to 20k; R429 from 16.2k to 10k

Change C115,C113 from 18P to 15P

Reserve D47

Add R2019,R2020

220.3

Change C562,C563,C566,C567,C568 from 680P to 220P

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

PIR

Size Document Number Rev

LA-3361P

Date: Sheet

1

of

40 43Thursday, September 21, 2006

0.3

5

4

3

2

1

Version change list (P.I.R. List) Page 2 of 2

Fixed IssueItem

1

LAN signal measure fail on Intel site Delete EMI capacitor 221.0 Change C1516,C1517 to NI

WLAN LED work wrong 1.0Add two resister to select WL_LED and XMIT# 24 Add R2021,R2022 ; R2022 NI ,R2021 0 ohm

2

D D

3

4

EMITest fail from LAN Add parallel damping test is PASS but marging 1.0 18、22

5

MIC always on have noise Add MIC_Sense pin to detect MIC plug in 1.0 25 R1954 change from 10k to 0 ohm

6

7

M/B ID Change to 3.3V for MV 1.0 29 R1997 Change to NI

8

9

C C

AMON capacitor duplication 1.0C1533,C1552 replace with MC906,MC908 26 Change MC906,MC908 NI

10

Reason for change Rev. PG#

increase RTC battery life 181.0 D42 pin2 change power form +3VALW to +3VLP

Follow intel reference design 1.0 22 C1517 change form 0.01u to 0.1U and C1516 NIEMITest fail from LAN

1.0 27 Add R？and C？, MIC connector pin 3、pin 5 connect to AGNDAdd MIC_Sense pin to detect MIC plug inMIC always on have noise

Disable wake on LAN functionreduce S3 power consumption Change R16,R11R70 to NI;R15,R12,R71 0 hom 19 20 221.0

11

12

13

Modify List B.Ver# Phase

14

15

16

17

18

B B

19

20

21

22

23

24

25

26

A A

27

Compal Electronics, Inc.

Title

28

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

PIR

Size Document Number Rev

LA-3361P

Date: Sheet

1

of

41 43Thursday, September 21, 2006

0.3

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 2

Reason for change PG# Modify List PhaseItem

D D

Fine tune the 1.8V OCP set-point as 7.5A (minimum

1

continue load)

2

Fine tune the charge current as 3A (maximum)

35

33

Power section

Change PR68
From SD034182280 (S RES 1/16W 18.2K +-1% 0402)
To SD034154280 (S RES 1/16W 15.4K +-1% 0402)

Change PR20
From SD034137380 (S RES 1/16W 137K +-1% 0402)

Date

2006/05/26

2006/05/30

Before DB

Before DB

To SD034100380 (S RES 1/16W 100K +-1% 0402)

3

Fine tune the AC detector set-point

33

Change PR26
From SD034681380 (S RES 1/16W 681K +-1% 0402)

2006/05/30

Before DB

To SD028100480 (S RES 1/16W 1M +-5% 0402)

Change PR82
From SD034274180 (S RES 1/16W 2.74K +-1% 0402)

Fine tune the 1.05V OCP set-point as 8.125A

4

(minimum continue load)

C C

36

To SD000009480 (S RES 1/16W 1.47K +-1% 0402)
Change PR92
From SD034909280 (S RES 1/16W 90.9K +-1% 0402)
To SD034499280 (S RES 1/16W 49.9K +-1% 0402)

2006/05/30

Before DB

Change PR83
From SD034274180 (S RES 1/16W 2.74K +-1% 0402)

Fine tune the 1.5V OCP set-point as 5A

5

(minimum continue load)

36

To SD000009480 (S RES 1/16W 1.47K +-1% 0402)
Change PR93
From SD034909280 (S RES 1/16W 90.9K +-1% 0402)

2006/05/30

Before DB

To SD034715280 (S RES 1/16W 71.5K +-1% 0402)

6

ID pin for 4 cells battery

7

PL1 crack issue

38

32

Add PR136
SD028100180 (S RES 1/16W 1K +-5% 0402)

As manufactory's comments,
change the PL1 from multi-layer bead to

2006/05/30

2006/07/13

Before DB

DB

beadcore

8

B B

9

The transient of +1.8V is fail Change PR69 from 49.9K to 90.9K for transient 2006/07/1235 DB

Due to the unstable of ISL6227,

10

change the +1.5V/ +1.05V solution to MAX8743

34Modify the sequence of 3V/5V when DC mode

36

Change PC41 from 0.1u to 0.047u

Change the +1.5V/ +1.05V solution
from ISL6227 to MAX8743,
included all the related components.

2006/07/7

DB2006/07/10Connect the PQ30.1 from VS to +3VLP

DB

2006/07/17 DB3511 For EMI's concern Add PC116 (680pf)

For EMI's concern 37

13 Modify the sequence of 1.8V for S3 can't

resume issue

35

PC115 (1000pf), PR106/PR132 (4.7ohm),
and PC90/ PC103 (680pf)

Change connection of PR64.1 from +5VS to
+5VALW

2006/07/17 DB12

2006/08/02 SI

For 4 series/ 3 series battery selection,

A A

add circuit for changing charge voltage

14

33 Add PQ33, PQ34, PR154, PR155 and PR156

2006/08/10 SI

as 16.8V (4 series) or 12.6V (3 series)

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

PWR PIR

Size Document Number Rev

Custom

LA-3361

Date: Sheet

1

of

42 43Thursday, September 21, 2006

0.1

5

4

3

2

1

Version change list (P.I.R. List) Page 2 of 2

Reason for change PG# Modify List PhaseItem

15

D D

33Disable the "ALARM" function of charger

Power section

Un-pop PR35, PR39 and PC23
Change PR28 from 604K to 100K

Date

2006/08/16

SI

Change connection of PR28.1 from BATT to +3VLP

16

Reduce S3 power consumption 38 Change the connection of PU10.1 from VS to VL

17

For EMI's requirement 35 Add PR152 (4.7ohm) and PC114 (680pf) 2006/08/16 SI

2006/08/16

SI

Item 16 causes the S4 power consumption fail,
so return to SI design. This change will not

18

impact the S3 power consumption

Change the connection of PU10.1 from VL to VS38

2006/09/05

PV

(this change adds less than 10mW back)

C C

B B

A A

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

www.laptopfix.vn

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

PWR PIR

Size Document Number Rev

LA-3361

Date: Sheet

1

of

43 43Thursday, September 21, 2006

0.1