COMPAL LA3241P, HGL31 Schematics

A

B

C

D

E

1 1

Compal confidential

2 2

HGL30/HGL31 Schematics Document

Mobile Yonah uFCPGA with Intel 945GM/PM+ICH7-M

3 3

LA-3241P

REV:1.0
2006/4/28

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/12/28 2006/12/28

2005/12/28 2006/12/28

2005/12/28 2006/12/28

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

401426

401426

401426

145Wednesday, January 03, 2007

145Wednesday, January 03, 2007

145Wednesday, January 03, 2007

of

of

E

of

C

C

C

A

B

C

D

E

Compal Confidential

Thermal Sensor

ADM1032

page 4

Memory BUS(DDRII)

Dual Channel

1.8V DDRII 400/533

page 16

Fan Control

page 4

CRT & TV-out

page 16

LVDS

H_A#(3..31)

Model Name : HGL30
File Name : LA-3241P

ZZZ1

ZZZ1

1 1

14W_PCB

14W_PCB

LCD Conn.

Yonah

uPGA-478 Package

page 4-6

FSB

533/667MHz

Intel 945PM/GM

H_D#(0..63)

uFCBGA-1466

PCI-Express

page 7-12

nVidia G73M

VGA board Conn.

page 17

2 2

IDSEL:AD16
(PIRQE#,
GNT#0,
REQ#0)

IEEE 1394

VT6311S

page 25

1394 Conn.

page 25

3 3

IDSEL:AD20
(PIRQA/B#,
GNT#2,
REQ#2)

Slot 0

page 24

CardBus

ENE CB714

page 23

3 in 1
socket

page 24

3.3V 33 MHz

S-ATA

S-ATA HDD
Conn.

page 22

PATA Conn.

page 22

PCI BUS

3.3V ATA-100

IDE

CDROM
Conn.

Intel ICH7-M

page 22

INT KB /PWR BTN /Debug Port

page 30

DMI

BGA-652

page 18-21

LPC BUS

3.3V 24.576MHz/48Mhz

3.3V 48MHz

New Card
Socket

page 35

PCI Express

TPM1.2

SLB9635 TT 1.2

page 35

MINI CARD x1

ENE KB910L

D2D /CMOS /FP /LID /KILL#

page 33

Int.KBD

page 30

TP /SW /USB OC /LED

page 34

4 4

page 31

Touch Pad

page 34

BIOS

page 32

Clock Generator

SLG8LP465VTR

page 15

200pin DDRII-SO-DIMM X2

BANK 0, 1, 2, 3

MDC 1.5
Conn

page 27

HD Audio

USB 2.0

USB port 1

LAN RJ45

page 27

page 26

Realtek
LAN 8111B

page 26

DC-IN'

BATT OVP

CHARGER

+3/5 VAWL

page 13,14

HD Codec

ALC883

USB Conn. x1

page 36

page 37

page 38

page 39

page 28

Audio AMP

MIC ARRAY

USB port 0

page 34

DC-DC

+1.05VP/+1.8VP

+0.9VPS
/+1.5VPS /

2.5VPS

VCORE

page 29

page 44

USB port5

Bluetooth

page 27

Conn

page 33

page 40

page 41

page 42

A

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/12/28

2005/12/28

2005/12/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2006/12/28

2006/12/28

2006/12/28

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

401426

401426

401426

E

245Wednesday, January 03, 2007

245Wednesday, January 03, 2007

245Wednesday, January 03, 2007

of

of

of

C

C

C

A

Voltage Rails

+5VS

power
plane

State

S0

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery
don't exist

O MEANS ON

X MEANS OFF

+B
LDO3
LDO5

O

O
O
O

O

X

S3 : STR
S4 : STD

+5VALW
+3VALW

+5V

O

O
O
O

X

O

XX

X

XX X

S5 : SOFT OFF

1 1

External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts

CardBus

AD20
AD16

2
0

EC SM Bus1 address

Device

Smart Battery
EEPROM(24C16/02)

Address

0001 011X b
1010 000X b

+3VS
+2.5VS
+1.8VS
+1.5VS+1.8V
+1.2VS
+VGA_CORE
+0.9VS
+CPU_CORE
+VCCP

OO

OO

X

X

PIRQA/B

PIRQE1394

EC SM Bus2 address

Device

ADM1032
EEPROM(24C02)

Address

1001 100X b
1010 000X b

SKU ID Table

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6
7 NC

SKU ID

*

100K +/- 5%Ra

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

0
1
2
3
4
5
6
7

Rb V min

0

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

HEL30/31 SKU
HEL30 SKU
HEL31 SKU
TEST MODE

V typ

AD_BID

0 V 0 V

0.503 V

0.819 V

1.185 V 1.264 V

2.200 V

3.300 V

BOM Structure USB PORT LIST

MARK FUNCTION

VP1020@

ONEMIC@

NC FOR ALL@

UMA@

Internal 945GM

VGA@

External G7xM
TPM1.2

TPM@

MIC ARRAY
1394

1394@

SATA HDD

SATA@

ONE MIC
IOMP

IOMP@

PATA@ PATA HDD

HP out from AMP

APA@

HP out from HP AMP

HPA@
HP@ HP out from CODEC

PORT DEVICE

0

LEFT SIDE

1

BLUE TOOTH
RIGHT SIDE

2

CMOS

3
4

RIGHT SIDE

5

FINGER PRINTER

6

NEW CARD

7

V

AD_BID

0.538 V

0.875 V

2.341 V

3.300 V

max

+3VALW

+CPU_CORE

+VCCP

+5VS

+3VS

+2.5VS

+1.8V

+1.8VS

+0.9VREF

+0.9VS

KB910L
SB

mA

160mA

RTL8110SBL/CL

CPU

CPU
NB

EXPRESS CARD
HDD
ODD
MDC
APA2066

36A

2.5A

9.8A
(14.7A)

1A

1.5A

1.8A

300mA

1A
TPA0211 mA
AD1986
USB PORT * 6

70mA

3A

NB 480mA
EXPRESS CARD
CLK_GEN
LCDVCC

1A

200mA

1A

VGA CARD (G7XM) 655mA
SB
R5C832
BIOS ROM
KB910L

680mA

mA

15mA

200mA

CB1410 mA

VGA CARD (G7XM) 130mA
NB

(143mA)

DDR2_DIMM 8A
NB (667Mhz)

GDDR2
VGA CARD (G7XM)

DDR2_DIMM

GDDR2

3.1A

6A

4.06A

10mA

1A

DDR2_DIMM 2A

ICH7 SM Bus address

Device

Clock Generator
(SLG8LP465VTR)

DDRII DIMM0
DDRII DIMM1

Address

1101 001Xb
1010 000Xb
1010 010Xb

+1.5V

+1.5VS

SB 40mA

NB 8.9A(13.8A)
SB 3.8A
MiniCard 1A
EXPRESS CARD 0.65A
VGA CARD (G7XM)

2A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2005/12/28

2005/12/28

2005/12/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2006/12/28

2006/12/28

2006/12/28

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

401426

401426

401426

345Wednesday, January 03, 2007

345Wednesday, January 03, 2007

345Wednesday, January 03, 2007

of

of

of

C

C

C

5

H_A#[3..31](7)

D D

H_REQ#[0..4](7)

H_ADSTB#0(7)

C C

R69

56_0402_5%

56_0402_5%

1 2

+VCCP

B B

H_PROCHOT#(42)

+VCCP

R68 68_0402_5%

R68 68_0402_5%

H_THERMDA, H_THERMDC routing together.
Trace width / Spacing = 10 / 10 mil

A A

H_PROCHOT# OCP#

H_ADSTB#1(7)

CLK_CPU_BCLK(15)

CLK_CPU_BCLK#(15)

H_ADS#(7)
H_BNR#(7)

H_BPRI#(7)

H_BR0#(7)

H_DEFER#(7)

H_DRDY#(7)

R69

H_HITM#(7)

H_LOCK#(7)

H_RESET#(7)

H_RS#[0..2](7)

H_TRDY#(7)

ITP_DBRESET#(20)

H_DBSY#(7)

H_DPSLP#(19)

H_DPRSTP#(19,42)

H_DPWR#(7)

H_PWRGOOD(19)

H_CPUSLP#(7,19)

R71 1K_0402_5%@ R71 1K_0402_5%@

1 2

R70 51_0402_5% R70 51_0402_5%

1 2

H_THERMTRIP#(7,19)

+VCCP

12

R72

R72

56_0402_5%@

56_0402_5%@

B

B

2

E

E

3 1

C

C

Q4

Q4

MMBT3904_SOT23@

MMBT3904_SOT23@

5

H_HIT#(7)

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADSTB#0
H_ADSTB#1

CLK_CPU_BCLK
CLK_CPU_BCLK#

H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_RESET#

H_RS#0
H_RS#1
H_RS#2
H_TRDY#

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3

ITP_DBRESET#

H_DBSY#
H_DPSLP#
H_DPRSTP#
H_DPWR#
ITP_BPM#4
ITP_BPM#5
H_PROCHOT#

H_PWRGOOD
H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#

H_THERMDA
H_THERMDC
H_THERMTRIP#

OCP# (20)

2005/11/07

Modified Q4 part number to SB039040000.

JP1A

JP1A

J4

A3#

L4

A4#

M3

A5#

K5

A6#

M1

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L1

A13#

P4

A14#

P1

A15#

R1

A16#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U2

A23#

R4

A24#

T5

ADDR GROUP

ADDR GROUP

A25#

T3

A26#

W3

A27#

W5

A28#

Y4

A29#

W2

A30#

Y1

A31#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L5

REQ4#

L2

ADSTB0#

V4

ADSTB1#

A22

BCLK0

A21

H1

E2

G5

F1

H5

F21

G6

E4

D20

H4

B1

F3

F4
G3
G2

AD4
AD3
AD1
AC4

C20

E1

B5

E5

D24
AC2
AC1
D21

D6
D7

AC5
AA6
AB3
C26
D25
AB5
AB6

A24
A25

C7

HOST CLK

HOST CLK

BCLK1

ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#

CONTROL

CONTROL

HITM#
IERR#
LOCK#
RESET#

RS0#
RS1#
RS2#
TRDY#

BPM0#
BPM1#
BPM2#
BPM3#

DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#

PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#

THERMAL

THERMAL

THERMDA

DIODE

DIODE

THERMDC
THERMTRIP#

TYCO_1-1674770-2_Yonah~D

TYCO_1-1674770-2_Yonah~D

ME@

ME@

4

YONAH

YONAH

DATA GROUP

DATA GROUP

MISC

MISC

LEGACY CPU

LEGACY CPU

4

D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DINV0#
DINV1#
DINV2#
DINV3#

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

A20M#
FERR#

IGNNE#

INIT#
LINT0
LINT1

STPCLK#

SMI#

3

This shall place near CPU

H_D#[0..63] (7)

H_D#0

E22

D0#

H_D#1

F24

D1#

H_D#2

E26

D2#

H_D#3

H22

D3#

H_D#4

F23

D4#

H_D#5

G25

D5#

H_D#6

E25

D6#

H_D#7

E23

D7#

H_D#8

K24

D8#

H_D#9

G24

D9#

H_D#10

J24

H_D#11

J23
H26
F26
K22
H25
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26

J26
M26
V23
AC20

H23
M24
W24
AD23
G22
N25
Y25
AE24

A6
A5
C4
B3
C6
B4

D5
A3

H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI

H_STPCLK#
H_SMI#

Thermal Sensor ADM1032AR

2200P_0402_50V7K

2200P_0402_50V7K

+3VS

H_DINV#0 (7)
H_DINV#1 (7)
H_DINV#2 (7)
H_DINV#3 (7)

H_DSTBN#[0..3] (7)

H_DSTBP#[0..3] (7)

H_A20M# (19)
H_FERR# (19)
H_IGNNE# (19)
H_INIT# (19)
H_INTR (19)
H_NMI (19)

H_STPCLK# (19)
H_SMI# (19)

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ITP_DBRESET#

C405

C405

0.1U_0402_16V4Z

0.1U_0402_16V4Z

H_THERMDA

C406

C406

H_THERMDC

1 2

R303

R303

1 2

10K_0402_5%

10K_0402_5%

Note : ADM1032 has no SO8 lead free ones.Only MSO8

3

+3VS

2

1

THERM#

R82 200_0402_5%@R82 200_0402_5%@

1 2

U24

U24

1

VDD

2

D+

3

D­THERM#4GND

ADM1032ARMZ-2REEL_MSOP8

ADM1032ARMZ-2REEL_MSOP8

Address:1001_100

2005/12/28

2005/12/28

2005/12/28

ITP_TDI
ITP_TMS
ITP_TDO
ITP_BPM#5
ITP_TRST#
ITP_TCK

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4

THER_EC_SMB_CK2

8

SCLK

THER_EC_SMB_DA2

7

SDATA

6

ALERT#

5

EN_FAN1(31)

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

R130 56_0402_5% R130 56_0402_5%

1 2

R129 56_0402_1%

R129 56_0402_1%
R128 56_0402_5% R128 56_0402_5%

1 2

R127 56_0402_5% R127 56_0402_5%

1 2

R119 56_0402_5% R119 56_0402_5%

1 2

R120 56_0402_5% R120 56_0402_5%

1 2

T14

T14

PAD

PAD

T18

T18

PAD

PAD

T20

T20

PAD

PAD

T21

T21

PAD

PAD

T17

T17

PAD

PAD

T19

T19

PAD

PAD

R835 0_0402_5% @R835 0_0402_5% @

R836 0_0402_5% R836 0_0402_5%
R837 0_0402_5% R837 0_0402_5%

R838 0_0402_5% @R838 0_0402_5% @

+5VS

U23

U23

1

VEN

2

FAN_SPEED1(31)

2006/12/28

2006/12/28

2006/12/28

2

VIN

3

VO

4

VSET

G993P1UF_SOP8

G993P1UF_SOP8

+VCC_FAN1
EN_FAN1

+VCCP

1 2

1 2
1 2

1 2

C399 10U_1206_16V4Z

C399 10U_1206_16V4Z

1 2

8

GND

7

GND

6

GND

5

GND

+3VS

12

R297

R297
10K_0402_5%

10K_0402_5%

1

C402

C402
1000P_0402_50V7K

1000P_0402_50V7K

2

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Title

Title

Title

Custom

Custom

Custom

1

EC_SMB_CK1

EC_SMB_CK2
EC_SMB_DA2

EC_SMB_DA1

1SS355_SOD323

1SS355_SOD323

40mil

+VCC_FAN1

401426

401426

401426

EC_SMB_CK1 (31,32,37)

EC_SMB_CK2 (31,44)
EC_SMB_DA2 (31,44)

EC_SMB_DA1 (31,32,37)

+5VS

12

D16

D16

D15

D15

1

1N4148_SOT23

1N4148_SOT23

C397

C397

1 2

10U_1206_16V4Z

10U_1206_16V4Z

C401

C401

1 2

1000P_0402_50V7K

1000P_0402_50V7K

1
2
3

4
5

ACES_85205-03001

ACES_85205-03001

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

1

2

3

1
2
3

GND
GND

JP2

JP2

C

C

C

of

of

of

445Wednesday, January 03, 2007

445Wednesday, January 03, 2007

445Wednesday, January 03, 2007

5

4

3

2

1

D D

+CPU_GTLREF

Close to CPU pin AD26
within 500mils.

+VCCP

12

R79

R79
1K_0402_1%

12

1K_0402_1%

R67

R67
2K_0402_1%

2K_0402_1%

+CPU_CORE

R126

R126
100_0402_1%

100_0402_1%

1 2

R134

R134
100_0402_1%

100_0402_1%

1 2

VCCSENSE

VSSENSE

+1.5VS

0.01U_0402_16V7K

0.01U_0402_16V7K

C146

C146

1

2

1

C144

C144
10U_0805_10V4Z

10U_0805_10V4Z

2

VCCSENSE(42)
VSSENSE(42)

+VCCP

VCCSENSE
VSSENSE

Close to CPU pin
within 500mils.

Trace / Width = 4 / 25 mils Trace / Width = 18 / 50 mils

H_PSI#(42)

CPU_VID0(42)
CPU_VID1(42)
CPU_VID2(42)

C C

B B

CPU_BSEL CPU_BSEL2 CPU_BSEL1

133

166

00

0

12

R80

R80

27.4_0402_1%

27.4_0402_1%

R81

R81

12

54.9_0402_1%

54.9_0402_1%

R123

R123

12

27.4_0402_1%

27.4_0402_1%

1

R131

R131

COMP 0/2Trace / Width = 18 / 25 mils

CPU_BSEL0

1

1

Resistor placed within

12

0.5" of CPU pin.Trace
should be at least 25
mils away from any

54.9_0402_1%

54.9_0402_1%

other toggling signal.

CPU_VID3(42)
CPU_VID4(42)
CPU_VID5(42)
CPU_VID6(42)

+CPU_GTLREF

CPU_BSEL0(15)
CPU_BSEL1(15)
CPU_BSEL2(15)

+CPU_CORE

H_PSI#
CPU_VID0

CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

COMP0
COMP1
COMP2
COMP3

COMP 1/3Trace / Width = 5 / 25 mils

JP1B

JP1B

AF7

VCCSENSE

AE7

VSSSENSE

B26

VCCA

K6

VCCP

J6

VCCP

M6

VCCP

N6

VCCP

T6

VCCP

R6

VCCP

K21

VCCP

J21

VCCP

M21

VCCP

N21

VCCP

T21

VCCP

R21

VCCP

V21

VCCP

W21

VCCP

V6

VCCP

G21

VCCP

AE6

PSI#

AD6

VID0

AF5

VID1

AE5

VID2

AF4

VID3

AE3

VID4

AF2

VID5

AE2

VID6

AD26

GTLREF

B22

BSEL0

B23

BSEL1

C21

BSEL2

R26

COMP0

U26

COMP1

U1

COMP2

V1

COMP3

E7

VCC

AB20

VCC

AA20

VCC

AF20

VCC

AE20

VCC

AB18

VCC

AB17

VCC

AA18

VCC

AA17

VCC

AD18

VCC

AD17

VCC

AC18

VCC

AC17

VCC

AF18

VCC

AF17

VCC

D2

RSVD

F6

RSVD

D3

RSVD

C1

RSVD

AF1

RSVD

D22

RSVD

C23

RSVD

C24

RSVD

AA1

RSVD

AA4

RSVD

AB2

RSVD

AA3

RSVD

M4

RSVD

N5

RSVD

T2

RSVD

V3

RSVD

B2

RSVD

C3

RSVD

T22

RSVD

B25

RSVD

TYCO_1-1674770-2_Yonah~D

TYCO_1-1674770-2_Yonah~D

ME@

ME@

AB26

VSS

AA25

VSS

AD25

VSS

AE26

VSS

AB23

VSS

AC24

VSS

AF24

VSS

AE23

VSS

AA22

VSS

AD22

YONAH

YONAH

VSS

AC21

VSS

AF21

VSS

AB19

VSS

AA19

VSS

AD19

VSS

AC19

VSS

AF19

VSS

AE19

VSS

AB16

VSS

AA16

VSS

AD16

VSS

AC16

VSS

AF16

VSS

AE16

VSS

AB13

VSS

AA14

VSS

AD13

VSS

AC14

VSS

AF13

VSS

AE14

VSS

AB11

VSS

AA11

VSS

AD11

VSS

AC11

VSS

AF11

VSS

AE11

VSS

AB8

VSS

AA8

VSS

AD8

VSS

AC8

VSS

AF8

VSS

AE8

VSS

AA5

VSS

AD5

VSS

AC6

VSS

AF6

VSS

AB4

VSS

AC3

VSS

AF3

VSS

POWER, GROUNG, RESERVED SIGNALS AND NC

POWER, GROUNG, RESERVED SIGNALS AND NC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AE4
AB1
AA2
AD2
AE1
B6
C5
F5
E6
H6
J5
M5
L6
P6
R5
V5
U6
Y6
A4
D4
E3
H3
G4
K4
L3
P3
N4
T4
U3
Y3
W4
D1
C2
F2
G1

+CPU_CORE

JP1C

JP1C

AE18

VCC

AE17

VCC

AB15

VCC

AA15

VCC

AD15

VCC

AC15

VCC

AF15

VCC

AE15

VCC

AB14

VCC

AA13

VCC

AD14

VCC

AC13

VCC

AF14

VCC

AE13

VCC

AB12

VCC

AA12

VCC

AD12

VCC

AC12

VCC

AF12

VCC

AE12

VCC

AB10

VCC

AB9

VCC

AA10

VCC

AA9

VCC

AD10

VCC

AD9

VCC

AC10

VCC

AC9

VCC

AF10

VCC

AF9

VCC

AE10

VCC

AE9

VCC

AB7

VCC

AA7

VCC

AD7

VCC

AC7

VCC

B20

VCC

A20

VCC

F20

VCC

E20

VCC

B18

VCC

B17

VCC

A18

VCC

A17

VCC

D18

VCC

D17

VCC

C18

VCC

C17

VCC

F18

VCC

F17

VCC

E18

VCC

E17

VCC

B15

VCC

A15

VCC

D15

VCC

C15

VCC

F15

VCC

E15

VCC

B14

VCC

A13

VCC

D14

VCC

C13

VCC

F14

VCC

E13

VCC

B12

VCC

A12

VCC

D12

VCC

C12

VCC

F12

VCC

E12

VCC

B10

VCC

B9

VCC

A10

VCC

A9

VCC

D10

VCC

D9

VCC

C10

VCC

C9

VCC

F10

VCC

F9

VCC

E10

VCC

E9

VCC

B7

VCC

A7

VCC

F7

VCC

TYCO_1-1674770-2_Yonah~D

TYCO_1-1674770-2_Yonah~D

ME@

ME@

YONAH

YONAH

POWER, GROUND

POWER, GROUND

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

K1
J2
M2
N1
T1
R2
V2
W1
A26
D26
C25
F25
B24
A23
D23
E24
B21
C22
F22
E21
B19
A19
D19
C19
F19
E19
B16
A16
D16
C16
F16
E16
B13
A14
D13
C14
F13
E14
B11
A11
D11
C11
F11
E11
B8
A8
D8
C8
F8
E8
G26
K26
J25
M25
N26
T26
R25
V25
W26
H24
G23
K23
L24
P24
N23
T23
U24
Y24
W23
H21
J22
M22
L21
P21
R22
V22
U21
Y21

A A

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/12/28

2005/12/28

2005/12/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2006/12/28

2006/12/28

2006/12/28

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

401426

401426

401426

545Wednesday, January 03, 2007

545Wednesday, January 03, 2007

545Wednesday, January 03, 2007

of

of

1

of

C

C

C

5

4

3

2

1

D D

C C

Place these capacitors on L8
(North side,Secondary Layer)

Place these capacitors on L8
(North side,Secondary Layer)

Place these capacitors on L8
(Sorth side,Secondary Layer)

Place these capacitors on L8
(Sorth side,Secondary Layer)

+CPU_CORE

1

2

+CPU_CORE

1

2

+CPU_CORE

1

2

+CPU_CORE

1

2

C411

C411
10U_0805_6.3V6M

10U_0805_6.3V6M

C416

C416
10U_0805_6.3V6M

10U_0805_6.3V6M

C207

C207
10U_0805_6.3V6M

10U_0805_6.3V6M

C174

C174
10U_0805_6.3V6M

10U_0805_6.3V6M

1

C417

C417
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C212

C212
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C192

C192
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C188

C188
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C175

C175
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C437

C437
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C428

C428
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C442

C442
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C193

C193
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C201

C201
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C412

C412
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C196

C196
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C443

C443
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C409

C409
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C195

C195
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C202

C202
10U_0805_6.3V6M

10U_0805_6.3V6M

2

3/29:from 22uF change to 10uF

1

C191

C191
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C211

C211
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C427

C427
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C200

C200
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C206

C206
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C189

C189
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C204

C204
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C410

C410
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C208

C208
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C438

C438
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C199

C199
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C205

C205
10U_0805_6.3V6M

10U_0805_6.3V6M

2

Mid Frequence Decoupling

+CPU_CORE

ESR <= 1.5m ohm
Capacitor > 1980uF

Place these inside
socket cavity on L8
(North side
Secondary)

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2006/12/28

2006/12/28

2006/12/28

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.
SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

401426

401426

401426

1

of

of

of

645Wednesday, January 03, 2007

645Wednesday, January 03, 2007

645Wednesday, January 03, 2007

C

C

C

C431

C431

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

1

+

+

2

1

2

1

+

+

C413

C413

2

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

C177

C177

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

+

+

C415

C415

2

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

1

C210

C210

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

North Side Secondary

Issued Date

Issued Date

Issued Date

1

C213

C213

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

3

2005/12/28

2005/12/28

2005/12/28

1

+

+

South Side Secondary

B B

+VCCP

1

+

+

C131

C131

220U_D2_2VMR15

220U_D2_2VMR15

A A

2

1

C209

C209

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C414

C414

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

2

C198

C198

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

1

C176

C176

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+

+

+

+

C197

C197

2

2

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

1

C178

C178

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

1

5

4

5

Note : 2005/12/26 modify pn

4

U22

U22

3

2

1

PM : SA00000KDC0

H_D#[0..63](4)

D D

C C

+VCCP

12

R30

R30

54.9_0402_1%

54.9_0402_1%

R31

R31

54.9_0402_1%

54.9_0402_1%

+VCCP

R34

R34

R38

R38

12

12

R28

R28

24.9_0402_1%

24.9_0402_1%

12

100_0402_1%

100_0402_1%

12

200_0603_1%

200_0603_1%

B B

A A

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

+H_VREF
H_XRCOMP
H_XSCOMP
H_YRCOMP
H_YSCOMP
+H_SWNG0
+H_SWNG1

12

R24

R24

24.9_0402_1%

24.9_0402_1%

Layout Note:
H_XRCOMP / H_YRCOMP / +H_VREF / +H_SWNG0 /
+H_SWNG1 trace width and spacing is 10/20.

+H_VREF

1

C24

C24

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

5

GM : SA0000059H0

U22A

U22A

F1

HD0#

J1

HD1#

H1

HD2#

J6

HD3#

H3

HD4#

K2

HD5#

G1

HD6#

G2

HD7#

K9

HD8#

K1

HD9#

K7

HD10#

J8

HD11#

H4

HD12#

J3

HD13#

K11

HD14#

G4

HD15#

T10

HD16#

W11

HD17#

T3

HD18#

U7

HD19#

U9

HD20#

U11

HD21#

T11

HD22#

W9

HD23#

T1

HD24#

T8

HD25#

T4

HD26#

W7

HD27#

U5

HD28#

T9

HD29#

W6

HD30#

T5

HD31#

AB7

HD32#

AA9

HD33#

W4

HD34#

W3

HD35#

Y3

HD36#

Y7

HD37#

W5

HD38#

Y10

HD39#

AB8

HD40#

W2

HD41#

AA4

HD42#

AA7

HD43#

AA2

HD44#

AA6

HD45#

AA10

HD46#

Y8

HD47#

AA1

HD48#

AB4

HD49#

AC9

HD50#

AB11

HD51#

AC11

HD52#

AB3

HD53#

AC2

HD54#

AD1

HD55#

AD9

HD56#

AC1

HD57#

AD7

HD58#

AC6

HD59#

AB5

HD60#

AD10

HD61#

AD4

HD62#

AC8

HD63#

J13

HVREF0

K13

HVREF1

E1

HXRCOMP

E2

HXSCOMP

Y1

HYRCOMP

U1

HYSCOMP

E4

HXSWING

W1

HYSWING

CALISTOGA_FCBGA1466~D

CALISTOGA_FCBGA1466~D

UMA@

UMA@

H9

HA3#

C9

HA4#

E11

HA5#

G11

HA6#

F11

HA7#

G12

HA8#

F9

HA9#

H11

HA10#

J12

HA11#

G14

HA12#

D9

HA13#

J14

HA14#

H13

HA15#

J15

HA16#

F14

HA17#

D12

HA18#

A11

HA19#

C11

HA20#

A12

HA21#

A13

HA22#

E13

HA23#

G13

HA24#

F12

HA25#

B12

HA26#

B14

HA27#

C12

HA28#

A14

HA29#

C14

HA30#

D14

HA31#

D8

HREQ#0

G8

HREQ#1

B8

HREQ#2

F8

HREQ#3

A8

HREQ#4

B9

HADSTB#0

C13

HADSTB#1

HCLKN
HCLKP

HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3

HDINV#0
HDINV#1
HDINV#2
HDINV#3

HCPURST#

HADS#

HTRDY#

HDPWR#

HDRDY#

HDEFER#

HHITM#

HHIT#

HLOCK#

HBREQ0#

HBNR#
HBPRI#

HDBSY#

HCPUSLP#

HRS0#
HRS1#
HRS2#

12

R25

R25

12

R29

R29

AG1
AG2

K4
T7
Y5
AC4
K3
T6
AA5
AC5

J7
W8
U3
AB10

B7
E8
E7
J9
H8
C3
D4
D3
B3
C7
C6
F6
A7
E3

B4
E6
D6

221_0603_1%

221_0603_1%

100_0402_1%

100_0402_1%

HOST

HOST

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADSTB#0
H_ADSTB#1

CLK_MCH_BCLK#
CLK_MCH_BCLK

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_RESET#
H_ADS#
H_TRDY#
H_DPWR#
H_DRDY#
H_DEFER#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#
H_CPUSLP#

H_RS#0
H_RS#1
H_RS#2

+H_SWNG0

1

C16

C16

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4

+VCCP+VCCP

12

R22

R22

12

R23

R23

H_A#[3..31] (4)

H_REQ#[0..4] (4)

H_ADSTB#0 (4)
H_ADSTB#1 (4)

CLK_MCH_BCLK# (15)
CLK_MCH_BCLK (15)
H_DSTBN#[0..3] (4)

H_DSTBP#[0..3] (4)

H_DINV#0 (4)
H_DINV#1 (4)
H_DINV#2 (4)
H_DINV#3 (4)

H_RESET# (4)
H_ADS# (4)
H_TRDY# (4)
H_DPWR# (4)
H_DRDY# (4)
H_DEFER# (4)
H_HITM# (4)
H_HIT# (4)
H_LOCK# (4)
H_BR0# (4)
H_BNR# (4)
H_BPRI# (4)
H_DBSY# (4)
H_CPUSLP# (4,19)

H_RS#[0..2] (4)

+H_SWNG1

221_0603_1%

221_0603_1%

1

2

100_0402_1%

100_0402_1%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C9

C9

PM

PM

VGA@

VGA@

DMI_TXN0(20)
DMI_TXN1(20)
DMI_TXN2(20)
DMI_TXN3(20)

DMI_TXP0(20)
DMI_TXP1(20)
DMI_TXP2(20)
DMI_TXP3(20)

DMI_RXN0(20)
DMI_RXN1(20)
DMI_RXN2(20)
DMI_RXN3(20)

DMI_RXP0(20)
DMI_RXP1(20)
DMI_RXP2(20)
DMI_RXP3(20)

M_CLK_DDR0(13)
M_CLK_DDR1(13)
M_CLK_DDR2(14)
M_CLK_DDR3(14)

M_CLK_DDR#0(13)
M_CLK_DDR#1(13)
M_CLK_DDR#2(14)
M_CLK_DDR#3(14)

DDR_CKE0_DIMMA(13)
DDR_CKE1_DIMMA(13)
DDR_CKE2_DIMMB(14)
DDR_CKE3_DIMMB(14)

DDR_CS0_DIMMA#(13)
DDR_CS1_DIMMA#(13)
DDR_CS2_DIMMB#(14)
DDR_CS3_DIMMB#(14)

T12

T12
T1

+1.8V

R33 80.6_0402_1% R33 80.6_0402_1%
R32 80.6_0402_1% R32 80.6_0402_1%

R93

R93
0_0402_5%

0_0402_5%

DPRSLPVR(20,42)

PLT_RST#(17,18,20,22,26,27,31,35)

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

M_ODT0(13)
M_ODT1(13)
M_ODT2(14)
M_ODT3(14)

1 2
1 2

+DDR_MCH_REF

PM_BMBUSY#(20)
PM_EXTTS#0(13,14)

12

H_THERMTRIP#(4,19)

ICH_POK(20,31)

R60 100_0402_1% R60 100_0402_1%

MCH_ICH_SYNC#(18)

Layout Note:
+DDR_MCH_REF
trace width and
spacing is 20/20.

+DDR_MCH_REF PM_EXTTS#1

2005/12/28

2005/12/28

2005/12/28

PAD

PAD
PADT1PAD

1

2

12

C14

C14

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3

M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3

M_OCDOCMP0
M_OCDOCMP1

M_ODT0
M_ODT1
M_ODT2
M_ODT3

SMRCOMPN
SMRCOMPP

PM_BMBUSY#
PM_EXTTS#0
PM_EXTTS#1
H_THERMTRIP#
ICH_POK
PLTRST_R#

+1.8V

12

R27

R27
100_0402_1%

100_0402_1%

12

R26

R26
100_0402_1%

100_0402_1%

Compal Secret Data

Compal Secret Data

Compal Secret Data

U22B

U22B

AE35

DMIRXN0

AF39

DMIRXN1

AG35

DMIRXN2

AH39

DMIRXN3

AC35

DMIRXP0

AE39

DMIRXP1

AF35

DMIRXP2

AG39

DMIRXP3

AE37

DMITXN0

AF41

DMITXN1

AG37

DMITXN2

AH41

DMITXN3

AC37

DMITXP0

AE41

DMITXP1

AF37

DMITXP2

AG41

DMITXP3

AY35

SM_CK0

AR1

SM_CK1

AW7

SM_CK2

AW40

SM_CK3

AW35

SM_CK0#

AT1

SM_CK1#

AY7

SM_CK2#

AY40

SM_CK3#

AU20

SM_CKE0

AT20

SM_CKE1

BA29

SM_CKE2

AY29

SM_CKE3

AW13

SM_CS0#

AW12

SM_CS1#

AY21

SM_CS2#

AW21

SM_CS3#

AL20

SM_OCDCOMP0

AF10

SM_OCDCOMP1

BA13

SM_ODT0

BA12

SM_ODT1

AY20

SM_ODT2

AU21

SM_ODT3

AV9

SM_RCOMPN

AT9

SM_RCOMPP

AK1

SM_VREF0

AK41

SM_VREF1

G28

PM_BMBUSY#

F25

PM_EXTTS0#

H26

PM_EXTTS1#

G6

PM_THERMTRIP#

AH33

PWROK

AH34

RSTIN#

K28

ICH_SYNC#

CALISTOGA_FCBGA1466~D

CALISTOGA_FCBGA1466~D

UMA@

UMA@

Deciphered Date

Deciphered Date

Deciphered Date

DMI

DMI

DDR MUXING

DDR MUXING

2006/12/28

2006/12/28

2006/12/28

2

PM

PM

Description at page 11.

MCH_CLKSEL0

K16

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8

CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16

CFG

CFG

CFG17
CFG18
CFG19
CFG20

G_CLKP
G_CLKN

D_REF_CLKN
D_REF_CLKP

CLKNC

CLKNC

D_REF_SSCLKN
D_REF_SSCLKP

CLK_REQ#

NC10

NC11

NC12

NC13

NC14

NC15

NC16

NC17

NC18

RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
RESERVED7
RESERVED8

RESERVED9
RESERVED10
RESERVED11
RESERVED12
RESERVED13

RESERVED

RESERVED

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

Custom

Custom

Custom

K18
J18
F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J26

AG33
AF33

A27
A26

C40
D41

H32

A3
A39
A4
A40
AW1
AW41
AY1
BA1
BA2
BA3
BA39
BA40
BA41
C1
AY41
B2
B41
C41
D1

T32
R32
F3
F7
AG11
AF11
H7
J19
A41
A34
D28
D27
A35

MCH_CLKSEL1
MCH_CLKSEL2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

CLK_MCH_3GPLL
CLK_MCH_3GPLL#

CLK_MCH_DREFCLK#

CLK_MCH_DREFCLK

CLK_MCH_SSCDREFCLK#
CLK_MCH_SSCDREFCLK

MCH_CLKREQ#

PM_EXTTS#0

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

MCH_CLKSEL0 (15)
MCH_CLKSEL1 (15)
MCH_CLKSEL2 (15)

T9

PADT9PAD

T3

PADT3PAD

CFG5 (11)

T10

T10

PAD

PAD

CFG7 (11)

T7

PADT7PAD

CFG9 (11)
CFG10 (11)
CFG11 (11)
CFG12 (11)
CFG13 (11)

T4

PADT4PAD

T8

PADT8PAD

CFG16 (11)

T2

PADT2PAD

CFG18 (11)
CFG19 (11)
CFG20 (11)

CLK_MCH_3GPLL (15)
CLK_MCH_3GPLL# (15)

CLK_MCH_DREFCLK# (15)
CLK_MCH_DREFCLK (15)

MCH_CLKREQ# (15)

10K_0402_5%

10K_0402_5%

10K_0402_5%@

10K_0402_5%@

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

401426

401426

401426

1

CLK_MCH_SSCDREFCLK# (15)
CLK_MCH_SSCDREFCLK (15)

+3VS

R51

R51

12

R56

R56

12

745Wednesday, January 03, 2007

745Wednesday, January 03, 2007

745Wednesday, January 03, 2007

of

of

of

C

C

C

5

4

3

2

1

D D

U22E

U22D

DDR_A_BS#0(13)
DDR_A_BS#1(13)
DDR_A_BS#2(13)

DDR_A_DM[0..7](13)

DDR_A_DQS[0..7](13)

C C

DDR_A_DQS#[0..7](13)

DDR_A_MA[0..13](13)

B B

DDR_A_CAS#(13)
DDR_A_RAS#(13)

DDR_A_WE#(13)

T6 PADT6 PAD
T13 PADT13 PAD

DDR_A_BS#0
DDR_A_BS#1
DDR_A_BS#2

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5

DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11 DDR_B_MA11
DDR_A_MA12
DDR_A_MA13

DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
SA_RCVENIN#
SA_RCVENOUT#

U22D

AU12

SA_BS0

AV14

SA_BS1

BA20

SA_BS2

AJ33

SA_DM0

AM35

SA_DM1

AL26

SA_DM2

AN22

SA_DM3

AM14

SA_DM4

AL9

SA_DM5

AR3

SA_DM6

AH4

SA_DM7

AK33

SA_DQS0

AT33

SA_DQS1

AN28

SA_DQS2

AM22

SA_DQS3

AN12

SA_DQS4

AN8

SA_DQS5

AP3

SA_DQS6

AG5

SA_DQS7

AK32

SA_DQS0#

AU33

SA_DQS1#

AN27

SA_DQS2#

AM21

SA_DQS3#

AM12

SA_DQS4#

AL8

SA_DQS5#

AN3

SA_DQS6#

AH5

SA_DQS7#

AY16

SA_MA0

AU14

SA_MA1

AW16

SA_MA2

BA16

SA_MA3

BA17

SA_MA4

AU16

SA_MA5

AV17

SA_MA6

AU17

SA_MA7

AW17

SA_MA8

AT16

SA_MA9

AU13

SA_MA10

AT17

SA_MA11

AV20

SA_MA12

AV12

SA_MA13

AY13

SA_CAS#

AW14

SA_RAS#

AY14

SA_WE#

AK23

SA_RCVENIN#

AK24

SA_RCVENOUT#

CALISTOGA_FCBGA1466~D

CALISTOGA_FCBGA1466~D

UMA@

UMA@

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8

SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39

DDR SYS MEMORY A

DDR SYS MEMORY A

SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDR_A_D[0..63] (13) DDR_B_D[0..63] (14)

DDR_B_BS#0(14)
DDR_B_BS#1(14)
DDR_B_BS#2(14)

DDR_B_DM[0..7](14)

DDR_B_DQS[0..7](14)

DDR_B_DQS#[0..7](14)

DDR_B_MA[0..13](14)

DDR_B_CAS#(14)

DDR_B_RAS#(14)

DDR_B_WE#(14)

T5 PADT5 PAD
T11 PADT11 PAD

DDR_B_BS#0
DDR_B_BS#1
DDR_B_BS#2

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6DDR_A_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10

DDR_B_MA12
DDR_B_MA13

DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
SB_RCVENIN#
SB_RCVENOUT#

U22E

AT24

SB_BS0

AV23

SB_BS1

AY28

SB_BS2

AK36

SB_DM0

AR38

SB_DM1

AT36

SB_DM2

BA31

SB_DM3

AL17

SB_DM4

AH8

SB_DM5

BA5

SB_DM6

AN4

SB_DM7

AM39

SB_DQS0

AT39

SB_DQS1

AU35

SB_DQS2

AR29

SB_DQS3

AR16

SB_DQS4

AR10

SB_DQS5

AR7

SB_DQS6

AN5

SB_DQS7

AM40

SB_DQS0#

AU39

SB_DQS1#

AT35

SB_DQS2#

AP29

SB_DQS3#

AP16

SB_DQS4#

AT10

SB_DQS5#

AT7

SB_DQS6#

AP5

SB_DQS7#

AY23

SB_MA0

AW24

SB_MA1

AY24

SB_MA2

AR28

SB_MA3

AT27

SB_MA4

AT28

SB_MA5

AU27

SB_MA6

AV28

SB_MA7

AV27

SB_MA8

AW27

SB_MA9

AV24

SB_MA10

BA27

SB_MA11

AY27

SB_MA12

AR23

SB_MA13

AR24

SB_CAS#

AU23

SB_RAS#

AR27

SB_WE#

AK16

SB_RCVENIN#

AK18

SB_RCVENOUT#

CALISTOGA_FCBGA1466~D

CALISTOGA_FCBGA1466~D

UMA@

UMA@

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8

SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39

DDR SYS MEMORY B

DDR SYS MEMORY B

SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AJ9
AN10
AK13
AH11
AK10
AJ8
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AT4
AK5
AJ5
AJ3

DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

DDR_B_D0

AK39

A A

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/12/28

2005/12/28

2005/12/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2006/12/28

2006/12/28

2006/12/28

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

401426

401426

401426

845Wednesday, January 03, 2007

845Wednesday, January 03, 2007

845Wednesday, January 03, 2007

of

of

1

of

C

C

C

5

4

3

2

1

D D

R58 1.5K_0402_1%

R58 1.5K_0402_1%

TV_COMPS
TV_LUMA
TV_CRMA

CRT_B(16)
CRT_G(16)
CRT_R(16)

LVDSA0+
LVDSA1+
LVDSA2+

LVDSA0­LVDSA1­LVDSA2-

LVDSB0+
LVDSB1+
LVDSB2+

LVDSB0­LVDSB1­LVDSB2-

LVDSAC+
LVDSAC­LVDSBC+
LVDSBC-

GMCH_ENBKL

EDID_CLK_LCD
EDID_DAT_LCD
GMCH_LVDDEN

R47 4.99K_0402_1% R47 4.99K_0402_1%

3VDDCCL
3VDDCDA

VSYNC
HSYNC
CRT_B

CRT_G
CRT_R

CRT_IREF

12

10 mils

12

LVDSA0+(16)
LVDSA1+(16)
LVDSA2+(16)

LVDSA0-(16)
LVDSA1-(16)
LVDSA2-(16)

LVDSB0+(16)
LVDSB1+(16)
LVDSB2+(16)

LVDSB0-(16)
LVDSB1-(16)
LVDSB2-(16)

LVDSAC+(16)
LVDSAC-(16)
LVDSBC+(16)
LVDSBC-(16)

C C

TV_COMPS

R286 150_0402_1%UMA@R286 150_0402_1%UMA@
R287 150_0402_1%UMA@R287 150_0402_1%UMA@
R288 150_0402_1%UMA@R288 150_0402_1%UMA@

B B

R289 150_0402_1%UMA@R289 150_0402_1%UMA@
R290 150_0402_1%UMA@R290 150_0402_1%UMA@
R291 150_0402_1%UMA@R291 150_0402_1%UMA@

12

TV_LUMA

12

TV_CRMA

12

CRT_VSYNC(16)
CRT_HSYNC(16)

CRT_VSYNC
CRT_HSYNC

CRT_R

12

CRT_G

12

CRT_B

12

+3VS

R50 39_0402_5%UMA@R50 39_0402_5%UMA@
R53 39_0402_5%UMA@ R53 39_0402_5%UMA@

GMCH_LVDDEN(16)

TV_COMPS(16)
TV_LUMA(16)
TV_CRMA(16)

1 2
1 2

GMCH_ENBKL(16)

3VDDCCL(16)

3VDDCDA(16)

R49 255_0402_1%

R49 255_0402_1%

H27
H28

B37
B34
A36

C37
B35
A37

F30
D29
F28

G30
D30
F29

A32
A33
E26
E27

D32
H30

H29
G26
G25
F32
B38
C35
C33
C32

A16
C18
A19

12

B16
B18
B19

K30

C26
C25

H23
G23
E23
D23
C22
B22
A21
B21

U22C

U22C

SDVOCTRL_DATA
SDVOCTRL_CLK

LA_DATA0
LA_DATA1
LA_DATA2

LA_DATA#0
LA_DATA#1
LA_DATA#2

LB_DATA0
LB_DATA1
LB_DATA2

LB_DATA#0
LB_DATA#1
LB_DATA#2

LA_CLK
LA_CLK#
LB_CLK
LB_CLK#

LBKLT_CTL

J30

LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL

TVDAC_A
TVDAC_B
TVDAC_C

J20

TV_IREF
TV_IRTNA

TV_IRTNB
TV_IRTNC

J29

TV_DCONSEL1
TV_DCONSEL0

DDCCLK
DDCDATA

VSYNC
HSYNC
BLUE
BLUE#
GREEN
GREEN#
RED
RED#

J22

CRT_IREF

CALISTOGA_FCBGA1466~D

CALISTOGA_FCBGA1466~D

UMA@

UMA@

LVDS

LVDS

TV CRT

TV CRT

EXP_COMPI

EXP_COMPO

EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8

EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

EXP_RXP0

EXP_RXP1

EXP_RXP2

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

EXP_TXN0

EXP_TXN1

EXP_TXN2

EXP_TXN3

EXP_TXN4

EXP_TXN5

EXP_TXN6

EXP_TXN7

EXP_TXN8

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

EXP_TXP0

EXP_TXP1

EXP_TXP2

EXP_TXP3

EXP_TXP4

EXP_TXP5

EXP_TXP6

EXP_TXP7

EXP_TXP8

EXP_TXP9

EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

D40
D38

F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38

D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38

F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40

D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40

10 mils

PEGCOMP

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

PEG_TXN0

C180 0.1U_0402_10V7KVGA@C180 0.1U_0402_10V7KVGA@

PEG_TXN1

C148 0.1U_0402_10V7KVGA@C148 0.1U_0402_10V7KVGA@

PEG_TXN2

C163 0.1U_0402_10V7KVGA@C163 0.1U_0402_10V7KVGA@

PEG_TXN3

C135 0.1U_0402_10V7KVGA@C135 0.1U_0402_10V7KVGA@

PEG_TXN4

C182 0.1U_0402_10V7KVGA@C182 0.1U_0402_10V7KVGA@

PEG_TXN5

C150 0.1U_0402_10V7KVGA@C150 0.1U_0402_10V7KVGA@

PEG_TXN6

C167 0.1U_0402_10V7KVGA@C167 0.1U_0402_10V7KVGA@

PEG_TXN7

C137 0.1U_0402_10V7KVGA@C137 0.1U_0402_10V7KVGA@

PEG_TXN8

C184 0.1U_0402_10V7KVGA@C184 0.1U_0402_10V7KVGA@

PEG_TXN9

C152 0.1U_0402_10V7KVGA@C152 0.1U_0402_10V7KVGA@

PEG_TXN10

C161 0.1U_0402_10V7KVGA@C161 0.1U_0402_10V7KVGA@

PEG_TXN11

C139 0.1U_0402_10V7KVGA@C139 0.1U_0402_10V7KVGA@

PEG_TXN12

C186 0.1U_0402_10V7KVGA@C186 0.1U_0402_10V7KVGA@

PEG_TXN13

C154 0.1U_0402_10V7KVGA@C154 0.1U_0402_10V7KVGA@

PEG_TXN14

C165 0.1U_0402_10V7KVGA@C165 0.1U_0402_10V7KVGA@

PEG_TXN15

C141 0.1U_0402_10V7KVGA@C141 0.1U_0402_10V7KVGA@

PEG_TXP0

C179 0.1U_0402_10V7KVGA@C179 0.1U_0402_10V7KVGA@

PEG_TXP1

C147 0.1U_0402_10V7KVGA@C147 0.1U_0402_10V7KVGA@

PEG_TXP2

C162 0.1U_0402_10V7KVGA@C162 0.1U_0402_10V7KVGA@

PEG_TXP3

C134 0.1U_0402_10V7KVGA@C134 0.1U_0402_10V7KVGA@

PEG_TXP4

C181 0.1U_0402_10V7KVGA@C181 0.1U_0402_10V7KVGA@

PEG_TXP5

C149 0.1U_0402_10V7KVGA@C149 0.1U_0402_10V7KVGA@

PEG_TXP6

C166 0.1U_0402_10V7KVGA@C166 0.1U_0402_10V7KVGA@

PEG_TXP7

C136 0.1U_0402_10V7KVGA@C136 0.1U_0402_10V7KVGA@

PEG_TXP8

C183 0.1U_0402_10V7KVGA@C183 0.1U_0402_10V7KVGA@

PEG_TXP9

C151 0.1U_0402_10V7KVGA@C151 0.1U_0402_10V7KVGA@

PEG_TXP10

C160 0.1U_0402_10V7KVGA@C160 0.1U_0402_10V7KVGA@

PEG_TXP11

C138 0.1U_0402_10V7KVGA@C138 0.1U_0402_10V7KVGA@

PEG_TXP12

C185 0.1U_0402_10V7KVGA@C185 0.1U_0402_10V7KVGA@

PEG_TXP13

C153 0.1U_0402_10V7KVGA@C153 0.1U_0402_10V7KVGA@

PEG_TXP14

C164 0.1U_0402_10V7KVGA@C164 0.1U_0402_10V7KVGA@

PEG_TXP15

C140 0.1U_0402_10V7KVGA@C140 0.1U_0402_10V7KVGA@

2/27 modified to 0402_X7R

R59

R59

24.9_0402_1%

24.9_0402_1%

1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

+1.5VS_PCIE

PEG_RXP[0..15] (17)

PEG_RXN[0..15] (17)

PEG_M_TXN0
PEG_M_TXN1
PEG_M_TXN2
PEG_M_TXN3
PEG_M_TXN4
PEG_M_TXN5
PEG_M_TXN6
PEG_M_TXN7
PEG_M_TXN8
PEG_M_TXN9
PEG_M_TXN10
PEG_M_TXN11
PEG_M_TXN12
PEG_M_TXN13
PEG_M_TXN14
PEG_M_TXN15

PEG_M_TXP0
PEG_M_TXP1
PEG_M_TXP2
PEG_M_TXP3
PEG_M_TXP4
PEG_M_TXP5
PEG_M_TXP6
PEG_M_TXP7
PEG_M_TXP8
PEG_M_TXP9
PEG_M_TXP10
PEG_M_TXP11
PEG_M_TXP12
PEG_M_TXP13
PEG_M_TXP14
PEG_M_TXP15

PEG_M_TXP[0..15] (17)

PEG_M_TXN[0..15] (17)

12

12

R293

R293

2.2K_0402_5%

2.2K_0402_5%

UMA@

UMA@

EDID_CLK_LCD(16)

A A

EDID_DAT_LCD(16)

5

R294

R294

2.2K_0402_5%

2.2K_0402_5%

UMA@

UMA@

EDID_CLK_LCD

EDID_DAT_LCD

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/12/28

2005/12/28

2005/12/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2006/12/28

2006/12/28

2006/12/28

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

401426

401426

401426

945Wednesday, January 03, 2007

945Wednesday, January 03, 2007

945Wednesday, January 03, 2007

of

of

1

of

C

C

C

5

4

3

2

1

+VCCP

21

D18

D18

R299

R299

R298

R298

D17

D17

+1.5VS

12

21

12

+2.5VS

220U_D2_2VMR15

220U_D2_2VMR15

+3VS

C93

C93

0.22U_0603_16V7K

0.22U_0603_16V7K

1

C23

C23

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

1

2

C15

C15

C89

C89

1

C54

C54

2

2.2U_0805_10V6K

2.2U_0805_10V6K

1

C390

C390

2

0.47U_0603_16V4Z

0.47U_0603_16V4Z

1

2

0.22U_0603_16V7K

0.22U_0603_16V7K

+1.5VS

1

+

+

2

MCH_A6

MCH_D2

C8

C8

+VCCP

MCH_AB1

1

2

0.47U_0603_16V4Z

0.47U_0603_16V4Z

U22H

U22H

AC14

VTT0

AB14

VTT1

W14

VTT2

V14

VTT3

T14

VTT4

R14

VTT5

P14

VTT6

N14

VTT7

M14

VTT8

L14

VTT9

AD13

VTT10

AC13

VTT11

AB13

VTT12

AA13

VTT13

Y13

VTT14

W13

VTT15

V13

VTT16

U13

VTT17

T13

VTT18

R13

VTT19

N13

VTT20

M13

VTT21

L13

VTT22

AB12

VTT23

AA12

VTT24

Y12

VTT25

W12

VTT26

V12

VTT27

U12

VTT28

T12

VTT29

R12

VTT30

P12

VTT31

N12

VTT32

M12

VTT33

L12

VTT34

R11

VTT35

P11

VTT36

N11

VTT37

M11

VTT38

R10

VTT39

P10

VTT40

N10

VTT41

M10

VTT42

P9

VTT43

N9

VTT44

M9

VTT45

R8

VTT46

P8

VTT47

N8

VTT48

M8

VTT49

P7

VTT50

N7

VTT51

M7

VTT52

R6

VTT53

P6

VTT54

M6

VTT55

A6

VTT56

R5

VTT57

P5

VTT58

N5

VTT59

M5

VTT60

P4

VTT61

N4

VTT62

M4

VTT63

R3

VTT64

P3

VTT65

N3

VTT66

M3

VTT67

R2

VTT68

P2

VTT69

M2

VTT70

D2

VTT71

AB1

VTT72

R1

VTT73

P1

VTT74

N1

VTT75

M1

VTT76

AG14

VCCAUX32

AF14

VCCAUX33

AE14

VCCAUX34

Y14

VCCAUX35

AF13

VCCAUX36

AE13

VCCAUX37

AF12

VCCAUX38

AE12

VCCAUX39

AD12

VCCAUX40

CALISTOGA_FCBGA1466~D

CALISTOGA_FCBGA1466~D

UMA@

UMA@

P O W E R

P O W E R

VCC_SYNC

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6

VCCA_3GPLL

VCCA_3GBG
VSSA_3GBG

VCCA_CRTDAC0
VCCA_CRTDAC1

VSSA_CRTDAC2

VCCA_DPLLA
VCCA_DPLLB

VCCA_HPLL

VCCA_LVDS

VSSA_LVDS

VCCA_MPLL
VCCA_TVBG

VSSA_TVBG

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0

VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCD_HMPLL0
VCCD_HMPLL1

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCD_TVDAC

VCCDQ_TVDAC

VCCHV0
VCCHV1
VCCHV2

VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8

VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31

H22

B30
C30
A30

AB41
AJ41
L41
N41
R41
V41
Y41

AC33
G41
H41

E21
F21
G21

B26
C39
AF1

A38
B39

AF2
H20

G20

E19
F19
C20
D20
E20
F20

AH1
AH2

A28
B28
C28

D21
H19

A23
B23
B25

AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
P19
P16
AH15
P15
AH14

+2.5VS

1 2

C400

C400

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+2.5VS

W=60 mils

C130

C130

220U_D2_2VMR15

220U_D2_2VMR15

+1.5VS_3GPLL
+2.5VS

+2.5VS_CRTDAC

+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL

+2.5VS

+1.5VS_MPLL
+3VS_TVBG

+3VS_TVDACA
+3VS_TVDACB
+3VS_TVDACC

+1.5VS

+1.5VS_TVDAC

1

C396

C396

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.5VS

1

C393

C393

2

+1.5VS_PCIE

1

+

+

2

1

C392

C392

2

10U_0805_10V4Z

10U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C103

C103

2

10U_0805_10V4Z

10U_0805_10V4Z

1

C69

C69

2

+3VS

1

C107

C107

2

10U_0805_10V4Z

10U_0805_10V4Z

1

2

0.022U_0402_16V7K

0.022U_0402_16V7K

0_0805_5%

0_0805_5%

1 2

C64

C64

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R63

R63

12

+1.5VS

CRTDAC: Route caps within
250mil of Alviso. Route FB

L1
MBK1608301YZF_0603 L1MBK1608301YZF_0603

within 3" of Calistoga

1

+

+

C187

C187
220U_D2_4VM

220U_D2_4VM

2

@

@

1

1

C60

C60

C49

C49

2

2

0.022U_0402_16V7K

0.022U_0402_16V7K

+2.5VS

R285

R285

0_0603_5%

0_0603_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VS+3VS_TVBG

12

PCI-E/MEM/PSB PLL decoupling

RB751V_SOD323

RB751V_SOD323

10_0402_5%

10_0402_5%

D D

12/09 Modified

RB751V_SOD323

RB751V_SOD323

10_0402_5%

10_0402_5%

C C

B B

A A

12/09 Modified

+2.5VS

1

1

C100

2

0.01U_0402_16V7K

0.01U_0402_16V7K

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C51

C51

2

1

C391

C391

2

1

C95

C95

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+

+

0.022U_0402_16V7K

0.022U_0402_16V7K

0.022U_0402_16V7K

0.022U_0402_16V7K

10U_0805_10V4Z

10U_0805_10V4Z

C6

C6

C100

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

close pin G41

L20

L20

MBK1608301YZF_0603

MBK1608301YZF_0603

1

2

MBK1608301YZF_0603

MBK1608301YZF_0603

1

2

MBK1608301YZF_0603

MBK1608301YZF_0603

1

2

1

2

10U_0805_10V4Z

10U_0805_10V4Z

12

C394

C394

330U_D2E_2.5VM

330U_D2E_2.5VM

UMA@

UMA@

L19

L19

12

C59

C59

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VS+3VS_TVDACC

L18

L18

12

C50

C50

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.5VS+1.5VS_3GPLL

R61

R61
0_0603_5%

0_0603_5%

12

1

C108

C108

@

@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R20

R20
0_0603_5%

0_0603_5%

12

45mA Max. 45mA Max.

1

2

C99

C99

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VS_TVDACA+3VS+3VS_TVDACB

1

2

+1.5VS_TVDAC +1.5VS

1

C65

C65

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C398

C398

close pin A38

+1.5VS_DPLLA +1.5VS_DPLLB

C73

C73

C96

C96

+1.5VS_MPLL

C10

C10

+2.5VS

1

C97

C97

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

MBK1608301YZF_0603

MBK1608301YZF_0603

1

1

+

+

C98

C98

330U_D2E_2.5VM

330U_D2E_2.5VM

2

2

UMA@

UMA@

MBK1608301YZF_0603

MBK1608301YZF_0603

1

C43

C43

C42

C42

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.022U_0402_16V7K

0.022U_0402_16V7K

R292

R292
0_0603_5%

0_0603_5%

1

C35

C35

2

0.022U_0402_16V7K

0.022U_0402_16V7K

+1.5VS_HPLL

1

C11

C11

C7

C7

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
10U_0805_10V4Z

10U_0805_10V4Z

L2

L2

L17

L17

R21

R21
0_0603_5%

0_0603_5%

1

2

12

+3VS

12

12

C395

C395

@

@

1

+

+

C389

C389
220U_D2_4VM

220U_D2_4VM

2

@

@

1

2

10U_0805_10V4Z

10U_0805_10V4Z

12

+1.5VS+1.5VS

+1.5VS+1.5VS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/12/28

2005/12/28

2005/12/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2006/12/28

2006/12/28

2006/12/28

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

401426

401426

401426

10 45Wednesday, January 03, 2007

10 45Wednesday, January 03, 2007

10 45Wednesday, January 03, 2007

of

of

1

of

C

C

C

5

4

3

2

1

Strap Pin Table

CFG[3:17] have internal pull up

U22F

+VCCP

D D

1

1

1

C47

C47

C57

C57

2

0.22U_0603_16V7K

0.22U_0603_16V7K

0.22U_0603_16V7K

0.22U_0603_16V7K

1

C94

C94

C45

C45

2

10U_0805_10V4Z

10U_0805_10V4Z

10U_0805_10V4Z

10U_0805_10V4Z

C C

C18

C18

220U_D2_2VMR15

220U_D2_2VMR15

C77

C77

220U_D2_2VMR15

220U_D2_2VMR15

@

B B

@

C22

C22

2

2

0.22U_0603_16V7K

0.22U_0603_16V7K

1

1

C29

C29

2

2

1U_0603_10V4Z

1U_0603_10V4Z

1

+

+

2

1

+

+

2

+VCCP

U22F

AD27

VCC_NCTF0

AC27

VCC_NCTF1

AB27

VCC_NCTF2

AA27

VCC_NCTF3

Y27

VCC_NCTF4

W27

VCC_NCTF5

V27

VCC_NCTF6

U27

VCC_NCTF7

T27

VCC_NCTF8

R27

VCC_NCTF9

AD26

VCC_NCTF10

AC26

VCC_NCTF11

AB26

VCC_NCTF12

AA26

VCC_NCTF13

Y26

VCC_NCTF14

W26

VCC_NCTF15

V26

VCC_NCTF16

U26

VCC_NCTF17

T26

VCC_NCTF18

R26

VCC_NCTF19

AD25

VCC_NCTF20

AC25

VCC_NCTF21

AB25

VCC_NCTF22

AA25

VCC_NCTF23

Y25

VCC_NCTF24

W25

VCC_NCTF25

V25

VCC_NCTF26

U25

VCC_NCTF27

T25

VCC_NCTF28

R25

VCC_NCTF29

AD24

VCC_NCTF30

AC24

VCC_NCTF31

AB24

VCC_NCTF32

AA24

VCC_NCTF33

Y24

VCC_NCTF34

W24

VCC_NCTF35

V24

VCC_NCTF36

U24

VCC_NCTF37

T24

VCC_NCTF38

R24

VCC_NCTF39

AD23

VCC_NCTF40

V23

VCC_NCTF41

U23

VCC_NCTF42

T23

VCC_NCTF43

R23

VCC_NCTF44

AD22

VCC_NCTF45

V22

VCC_NCTF46

U22

VCC_NCTF47

T22

VCC_NCTF48

R22

VCC_NCTF49

AD21

VCC_NCTF50

V21

VCC_NCTF51

U21

VCC_NCTF52

T21

VCC_NCTF53

R21

VCC_NCTF54

AD20

VCC_NCTF55

V20

VCC_NCTF56

U20

VCC_NCTF57

T20

VCC_NCTF58

R20

VCC_NCTF59

AD19

VCC_NCTF60

V19

VCC_NCTF61

U19

VCC_NCTF62

T19

VCC_NCTF63

AD18

VCC_NCTF64

AC18

VCC_NCTF65

AB18

VCC_NCTF66

AA18

VCC_NCTF67

Y18

VCC_NCTF68

W18

VCC_NCTF69

V18

VCC_NCTF70

U18

VCC_NCTF71

T18

VCC_NCTF72

M19

VCC100

L19

VCC101

N18

VCC102

M18

VCC103

L18

VCC104

P17

VCC105

N17

VCC106

M17

VCC107

N16

VCC108

M16

VCC109

L16

VCC110

CALISTOGA_FCBGA1466~D

CALISTOGA_FCBGA1466~D

UMA@

UMA@

VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8

VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36

P O W E R

P O W E R

VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57

VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8

VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12

VCC_SM100

VCC_SM101

VCC_SM102

VCC_SM103

VCC_SM104

VCC_SM105

VCC_SM106

VCC_SM107

AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15

AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17

AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1

+1.5VS

+1.8V

1

1

C13

C13

C12

C12

2

2

0.47U_0603_16V4Z

0.47U_0603_16V4Z

0.47U_0603_16V4Z

0.47U_0603_16V4Z

Place near pin AV1 & AJ1

A A

+VCCP

U22G

U22G

AA33

VCC0

W33

VCC1

P33

VCC2

N33

VCC3

L33

VCC4

J33

VCC5

AA32

VCC6

Y32

VCC7

W32

VCC8

V32

VCC9

P32

VCC10

N32

VCC11

M32

VCC12

L32

VCC13

J32

VCC14

AA31

VCC15

W31

VCC16

V31

VCC17

T31

VCC18

R31

VCC19

P31

VCC20

N31

VCC21

M31

VCC22

AA30

VCC23

Y30

VCC24

W30

VCC25

V30

VCC26

U30

VCC27

T30

VCC28

R30

VCC29

P30

VCC30

N30

VCC31

M30

VCC32

L30

VCC33

AA29

VCC34

Y29

VCC35

W29

VCC36

V29

VCC37

U29

VCC38

R29

VCC39

P29

VCC40

M29

VCC41

L29

VCC42

AB28

VCC43

AA28

VCC44

Y28

VCC45

V28

VCC46

U28

VCC47

T28

VCC48

R28

VCC49

P28

VCC50

N28

VCC51

M28

VCC52

L28

VCC53

P27

VCC54

N27

VCC55

M27

VCC56

L27

VCC57

P26

VCC58

N26

VCC59

L26

VCC60

N25

VCC61

M25

VCC62

L25

VCC63

P24

VCC64

N24

VCC65

M24

VCC66

AB23

VCC67

AA23

VCC68

Y23

VCC69

P23

VCC70

N23

VCC71

M23

VCC72

L23

VCC73

AC22

VCC74

AB22

VCC75

Y22

VCC76

W22

VCC77

P22

VCC78

N22

VCC79

M22

VCC80

L22

VCC81

AC21

VCC82

AA21

VCC83

W21

VCC84

N21

VCC85

M21

VCC86

L21

VCC87

AC20

VCC88

AB20

VCC89

Y20

VCC90

W20

VCC91

P20

VCC92

N20

VCC93

M20

VCC94

L20

VCC95

AB19

VCC96

AA19

VCC97

Y19

VCC98

N19

VCC99

CALISTOGA_FCBGA1466~D

CALISTOGA_FCBGA1466~D

UMA@

UMA@

P O W E R

P O W E R

VCC_SM0
VCC_SM1
VCC_SM2
VCC_SM3
VCC_SM4
VCC_SM5
VCC_SM6
VCC_SM7
VCC_SM8

VCC_SM9
VCC_SM10
VCC_SM11
VCC_SM12
VCC_SM13
VCC_SM14
VCC_SM15
VCC_SM16
VCC_SM17
VCC_SM18
VCC_SM19
VCC_SM20
VCC_SM21
VCC_SM22
VCC_SM23
VCC_SM24
VCC_SM25
VCC_SM26
VCC_SM27
VCC_SM28
VCC_SM29
VCC_SM30
VCC_SM31
VCC_SM32
VCC_SM33
VCC_SM34
VCC_SM35
VCC_SM36
VCC_SM37
VCC_SM38
VCC_SM39
VCC_SM40
VCC_SM41
VCC_SM42
VCC_SM43
VCC_SM44
VCC_SM45
VCC_SM46
VCC_SM47
VCC_SM48
VCC_SM49
VCC_SM50
VCC_SM51
VCC_SM52
VCC_SM53
VCC_SM54
VCC_SM55
VCC_SM56
VCC_SM57
VCC_SM58
VCC_SM59
VCC_SM60
VCC_SM61
VCC_SM62
VCC_SM63
VCC_SM64
VCC_SM65
VCC_SM66
VCC_SM67
VCC_SM68
VCC_SM69
VCC_SM70
VCC_SM71
VCC_SM72
VCC_SM73
VCC_SM74
VCC_SM75
VCC_SM76
VCC_SM77
VCC_SM78
VCC_SM79
VCC_SM80
VCC_SM81
VCC_SM82
VCC_SM83
VCC_SM84
VCC_SM85
VCC_SM86
VCC_SM87
VCC_SM88
VCC_SM89
VCC_SM90
VCC_SM91
VCC_SM92
VCC_SM93
VCC_SM94
VCC_SM95
VCC_SM96
VCC_SM97
VCC_SM98
VCC_SM99

AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6

+1.8V

MCH_AT41
MCH_AM41

1

1

C102

C102

C101

C101

2

2

0.47U_0603_16V4Z

0.47U_0603_16V4Z

0.47U_0603_16V4Z

0.47U_0603_16V4Z

Place near pin AT41 & AM41

1

1

C17

C17

C19

C19

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Place near pin BA23

1

C25

C25

2

0.47U_0603_16V4Z

0.47U_0603_16V4Z

1

1

C36

C36

C76

C76

2

2

10U_0805_10V4Z

10U_0805_10V4Z

10U_0805_10V4Z

10U_0805_10V4Z

1

C91

C91

2

0.47U_0603_16V4Z

0.47U_0603_16V4Z

Place near pin BA15

1

C88

C88

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

+

+

C72

C72
220U_D2_4VM

220U_D2_4VM

2

@

@

CFG[2:0]

CFG5

CFG7

CFG9

CFG6

PSB 4X CLK Enable 1 = Calistoga

CFG[13:12]

CFG16

C44

C44

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CFG10 CFG18

CFG19

SDVO_CTRLDATA

1

2

CFG20

(PCIE/SDVO select)

CFG[19:18] have internal pull down

011 = 667MT/s FSB
001 = 533MT/s FSB

0 = DMI x 2
1 = DMI x 4

0 = Reserved
1 = Mobile Yonah CPU

0 = Lane Reversal Enable
1 = Normal Operation

(Default)

*

0 = Reserved

*

00 = Reserved
01 = XOR Mode Enabled
10 = All Z Mode Enabled
11 = Normal Operation

0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled (Default)

10 = 1.05V
01 = 1.5V

0 = Normal Operation
1 = DMI Lane Reversal Enable

0 = No SDVO Device Present

1 = SDVO Device Present

0 = Only PCIE or SDVO is
operational.
1 = PCIE/SDVO are operating
simu.

R36 2.2K_0402_5%@R36 2.2K_0402_5%@

CFG5(7)

R44 2.2K_0402_5%@R44 2.2K_0402_5%@

CFG7(7)

R40 2.2K_0402_5%@R40 2.2K_0402_5%@

CFG9(7)
CFG10(7)
CFG11(7)

CFG12(7)
CFG13(7)
CFG16(7)

CFG18(7)
CFG19(7)
CFG20(7)

R41 2.2K_0402_5%@R41 2.2K_0402_5%@
R39 2.2K_0402_5%@R39 2.2K_0402_5%@
R37 2.2K_0402_5%@R37 2.2K_0402_5%@
R42 2.2K_0402_5%@R42 2.2K_0402_5%@
R35 2.2K_0402_5%@R35 2.2K_0402_5%@

R52 1K_0402_5%@R52 1K_0402_5%@
R54 1K_0402_5%@R54 1K_0402_5%@
R55 1K_0402_5%@R55 1K_0402_5%@

*

(Default)

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2

(Default)

(Default)

*

(Default)

*

(Default)

(Default)

*

*

(Default)

*

+3VS

*

*

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/12/28

2005/12/28

2005/12/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2006/12/28

2006/12/28

2006/12/28

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

401426

401426

401426

11 45Wednesday, January 03, 2007

11 45Wednesday, January 03, 2007

11 45Wednesday, January 03, 2007

of

of

1

of

C

C

C

5

D D

C C

B B

A A

AC41
AA41

W41

M41

AV40
AP40
AN40
AK40

AJ40
AH40
AG40
AF40
AE40

AY39

AW39

AV39
AR39
AN39

AJ39
AC39
AB39
AA39

W39

M39

AT38

AM38

AH38
AG38
AF38
AE38

AK37
AH37
AB37
AA37

W37

M37

AY36

AW36

AN36
AH36
AG36
AF36
AE36
AC36

BA35
AV35
AR35
AH35
AB35
AA35

W35

M35

AN34
AK34
AG34
AF34

T41
P41

J41

F41

B40

Y39
V39

T39
R39
P39
N39

L39

J39
H39
G39
F39
D39

C38

Y37
V37

T37
R37
P37
N37

L37

J37
H37
G37
F37
D37

C36
B36

Y35
V35

T35
R35
P35
N35

L35

J35
H35
G35
F35
D35

4

U22I

U22I

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34

P O W E R

P O W E R

VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99

CALISTOGA_FCBGA1466~D

CALISTOGA_FCBGA1466~D

UMA@

UMA@

VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199

AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
AT23
AN23
AM23
AH23
AC23
W23
K23
J23
F23
C23
AA22
K22
G22
F22
E22
D22
A22
BA21
AV21
AR21

3

U22J

U22J

AN21

VSS200

AL21

VSS201

AB21

VSS202

Y21

VSS203

P21

VSS204

K21

VSS205

J21

VSS206

H21

VSS207

C21

VSS208

AW20

VSS209

AR20

VSS210

AM20

VSS211

AA20

VSS212

K20

VSS213

B20

VSS214

A20

VSS215

AN19

VSS216

AC19

VSS217

W19

VSS218

K19

VSS219

G19

VSS220

C19

VSS221

AH18

VSS222

P18

VSS223

H18

VSS224

D18

VSS225

A18

VSS226

AY17

VSS227

AR17

VSS228

AP17

VSS229

P O W E R

AM17

AK17
AV16
AN16

AL16

AN15

AM15

AK15

M15

BA14
AT14
AK14
AD14
AA14

AV13
AR13
AN13

AM13

AL13

AG13

AY12
AC12

AD11
AA11

AV10
AP10

AL10
AJ10

J16
F16
C16

N15
L15

B15
A15

U14
K14
H14
E14

P13
F13
D13
B13

K12
H12
E12

Y11

J11
D11
B11

P O W E R

VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS265
VSS264
VSS263
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279

CALISTOGA_FCBGA1466~D

CALISTOGA_FCBGA1466~D

UMA@

UMA@

2

VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS292
VSS291
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360

AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1

1

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/12/28

2005/12/28

2005/12/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2006/12/28

2006/12/28

2006/12/28

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

401426

401426

401426

12 45Wednesday, January 03, 2007

12 45Wednesday, January 03, 2007

12 45Wednesday, January 03, 2007

of

of

1

of

C

C

C

5

DDR_A_DQS#[0..7](8)

DDR_A_D[0..63](8)
DDR_A_DM[0..7](8)
DDR_A_DQS[0..7](8)
DDR_A_MA[0..13](8)

D D

Layout Note:
Place near JP41

+1.8V

2.2U_0805_10V6K

2.2U_0805_10V6K

2.2U_0805_10V6K

2.2U_0805_10V6K
C84

C84

1

2

C C

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

+0.9VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C70

C70

B B

DDR_A_WE#
DDR_A_CAS#
DDR_CS1_DIMMA#
M_ODT1

DDR_A_BS#0
DDR_A_MA10

DDR_A_MA1
DDR_A_MA3
DDR_A_MA5

A A

DDR_A_MA8

DDR_A_MA9
DDR_A_MA12
DDR_A_BS#2
DDR_CKE0_DIMMA

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C63

C63

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

56_0804_8P4R_5%

R43

R43

1 2

R46

R46

1 2

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

56_0804_8P4R_5%

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

56_0804_8P4R_5%

5

2.2U_0805_10V6K

2.2U_0805_10V6K

C83

C83

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C56

C56

RP1

RP1

56_0402_5%

56_0402_5%

56_0402_5%

56_0402_5%

RP7

RP7

RP10

RP10

C27

C27

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

+0.9VS

2.2U_0805_10V6K

2.2U_0805_10V6K

C46

C46

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

56_0804_8P4R_5%

C90

C90

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C78

C78

RP2

RP2

RP6

RP6

RP9

RP9

Layout Note:
+DDR_MCH_REF
trace width and
spacing is 20/20.

2.2U_0805_10V6K

2.2U_0805_10V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C26

C26

1

1

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C38

C38

C31

C31

DDR_A_RAS#

18

DDR_CS0_DIMMA#

27

M_ODT0

36

DDR_A_MA13

45

DDR_A_BS#1

45

DDR_A_MA0

36

DDR_A_MA2

27

DDR_A_MA4

18

DDR_A_MA6

45

DDR_A_MA7

36

DDR_A_MA11

27

DDR_CKE1_DIMMA

18

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C85

C85

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C52

C52

+DDR_MCH_REF1(14)

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C55

C55

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C61

C61

4

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C81

C81

C41

C41

1

1

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C40

C40

C75

C75

Layout Note:
Place these resistor
closely JP41,all
trace length Max=1.5"

4

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C67

C67

+DDR_MCH_REF1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C34

C34

+1.8V

12

12

R92

R92
1K_0402_1%

1K_0402_1%

R87

R87
1K_0402_1%

1K_0402_1%

3

+1.8V

JP3

+DDR_MCH_REF1

2.2U_0805_10V6K

2.2U_0805_10V6K

1

C171

C171

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C158

C158

2

DDR_CKE0_DIMMA(7)

DDR_A_BS#2(8)

DDR_A_BS#0(8)

DDR_A_WE#(8)

DDR_A_CAS#(8)

DDR_CS1_DIMMA#(7)

M_ODT1(7)

CLK_SMBDATA(14,15)

CLK_SMBCLK(14,15)

DDR_A_D4
DDR_A_D1

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D14

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D9 DDR_A_D11
DDR_A_D15 DDR_A_D10

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS#2
DDR_A_MA12

DDR_A_MA9 DDR_A_MA7
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#

DDR_A_CAS#
DDR_CS1_DIMMA#

M_ODT1
DDR_A_D37

DDR_A_D36
DDR_A_DQS#4

DDR_A_DQS4
DDR_A_D35

DDR_A_D32
DDR_A_D40

DDR_A_D44
DDR_A_DM5
DDR_A_D41

DDR_A_D46
DDR_A_D49

DDR_A_D48

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D61 DDR_A_D57

DDR_A_D60
DDR_A_DM7
DDR_A_D59

DDR_A_D58
CLK_SMBDATA

CLK_SMBCLK

+3VS

11/9 Modify pn to SP070006V00

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/12/28

2005/12/28

2005/12/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

JP3

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

FOX_ASOA426-M2RN-7F

FOX_ASOA426-M2RN-7F

ME@

ME@

SO-DIMM A

Top side

Deciphered Date

Deciphered Date

Deciphered Date

DQ4
DQ5

DM0
DQ6

DQ7

DQ12
DQ13

DM1

CK0#

DQ14
DQ15

DQ20
DQ21

DM2

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3
DQ30

DQ31

NC/CKE1

VDD
NC/A15
NC/A14

VDD

VDD

VDD

RAS#

VDD

ODT0

NC/A13

VDD

DQ36
DQ37

DM4

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5
DQ46

DQ47
DQ52

DQ53

CK1#

DM6

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7
DQ62

DQ63

2

VSS

VSS
VSS

VSS

VSS
VSS

CK0
VSS

VSS

VSS

VSS

NC

VSS

VSS

VSS

VSS

VSS

A11

A7
A6

A4
A2

A0
BA1
S0#

NC

VSS

VSS
VSS

VSS

VSS

VSS

VSS

VSS
CK1

VSS
VSS

VSS

VSS

VSS

VSS
SA0
SA1

2006/12/28

2006/12/28

2006/12/28

2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

10K_0402_5%

10K_0402_5%

+1.8V

R18

R18

DDR_A_D6
DDR_A_D0

DDR_A_DM0
DDR_A_D5

DDR_A_D7
DDR_A_D13

DDR_A_D12
DDR_A_DM1
M_CLK_DDR0

M_CLK_DDR#0

DDR_A_D20
DDR_A_D21

DDR_A_DM2
DDR_A_D23

DDR_A_D22
DDR_A_D28DDR_A_D29

DDR_A_D25DDR_A_D24
DDR_A_DQS#3

DDR_A_DQS3
DDR_A_D31

DDR_A_D30
DDR_CKE1_DIMMA

DDR_A_MA11
DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#

M_ODT0
DDR_A_MA13

DDR_A_D39
DDR_A_D38

DDR_A_DM4
DDR_A_D34

DDR_A_D33
DDR_A_D45

DDR_A_D43
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D47

DDR_A_D42
DDR_A_D52

DDR_A_D53
M_CLK_DDR1

M_CLK_DDR#1
DDR_A_DM6
DDR_A_D51DDR_A_D54

DDR_A_D55

DDR_A_D56
DDR_A_DQS#7

DDR_A_DQS7
DDR_A_D62

DDR_A_D63

12

12

R16

R16
10K_0402_5%

10K_0402_5%

1

M_CLK_DDR0 (7)
M_CLK_DDR#0 (7)

PM_EXTTS#0 (7,14)

DDR_CKE1_DIMMA (7)

DDR_A_BS#1 (8)
DDR_A_RAS# (8)
DDR_CS0_DIMMA# (7)

M_ODT0 (7)

M_CLK_DDR1 (7)
M_CLK_DDR#1 (7)

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

401426

401426

401426

13 45Wednesday, January 03, 2007

13 45Wednesday, January 03, 2007

13 45Wednesday, January 03, 2007

of

of

1

of

C

C

C

5

DDR_B_DQS#[0..7](8)

DDR_B_D[0..63](8)
DDR_B_DM[0..7](8)
DDR_B_DQS[0..7](8)
DDR_B_MA[0..13](8)

D D

Layout Note:
Place near JP42

+1.8V

2.2U_0805_10V6K

2.2U_0805_10V6K

2.2U_0805_10V6K

2.2U_0805_10V6K

2.2U_0805_10V6K

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C79

C79

R48

R48
R45

R45

56_0804_8P4R_5%

56_0804_8P4R_5%

2.2U_0805_10V6K

C21

C21

C87

C87

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C74

C74

RP3

RP3

18
27
36
45

56_0804_8P4R_5%

56_0804_8P4R_5%

1 2

56_0402_5%

56_0402_5%

56_0402_5%

56_0402_5%

1 2

RP8

RP8

45
36
27
18

56_0804_8P4R_5%

56_0804_8P4R_5%

RP12

RP12

18
27
36
45

5

C28

C28

1

2

C C

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

+0.9VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C68

C68

B B

DDR_B_CAS#
DDR_B_WE#

M_ODT3

DDR_B_BS#0
DDR_B_MA10

DDR_B_MA1

A A

DDR_B_MA3
DDR_B_MA5
DDR_B_MA9

DDR_CKE2_DIMMB
DDR_B_BS#2
DDR_B_MA12
DDR_B_MA8

2.2U_0805_10V6K

2.2U_0805_10V6K

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C32

C32

+0.9VS

56_0804_8P4R_5%

56_0804_8P4R_5%

2.2U_0805_10V6K

2.2U_0805_10V6K
C20

C20

C92

C92

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C39

C39

C53

C53

RP4

RP4

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

56_0804_8P4R_5%

RP5

RP5

4 5
3 6
2 7
1 8

RP11

RP11

4 5
3 6
2 7
1 8

56_0804_8P4R_5%

56_0804_8P4R_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C66

C66

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C80

C80

DDR_B_MA13
M_ODT2
DDR_CS2_DIMMB#DDR_CS3_DIMMB#
DDR_B_RAS#

DDR_B_BS#1
DDR_B_MA0
DDR_B_MA2
DDR_B_MA4

DDR_B_MA7
DDR_B_MA11
DDR_B_MA6
DDR_CKE3_DIMMB

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C71

C71

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C58

C58

C48

C48

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C86

C86

1

1

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C82

C82

Layout Note:
Place these resistor
closely JP42,all
trace length Max=1.5"

4

C30

C30

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C37

C37

C33

C62

C62

C33

3

+1.8V

JP4

JP4

1

VREF

3

DDR_B_D0
DDR_B_D1

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D20
DDR_B_DQS#2

DDR_B_DQS2
DDR_B_D18

DDR_B_D19
DDR_B_D28

DDR_B_DM3

DDR_B_D30
DDR_B_D31

DDR_CKE2_DIMMB(7)

DDR_B_BS#2(8)

DDR_B_BS#0(8)

DDR_B_WE#(8)

DDR_B_CAS#(8)

DDR_CS3_DIMMB#(7)

M_ODT3(7)

CLK_SMBDATA(13,15)

CLK_SMBCLK(13,15)

DDR_CKE2_DIMMB

DDR_B_BS#2
DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#

DDR_B_CAS#
DDR_CS3_DIMMB#

M_ODT3
DDR_B_D32

DDR_B_D33
DDR_B_DQS#4

DDR_B_DQS4
DDR_B_D34

DDR_B_D35
DDR_B_D40

DDR_B_D41
DDR_B_DM5
DDR_B_D42

DDR_B_D43
DDR_B_D48

DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D51
DDR_B_D50

DDR_B_D56
DDR_B_D61 DDR_B_D57

DDR_B_DM7
DDR_B_D59

DDR_B_D58
CLK_SMBDATA

CLK_SMBCLK

+3VS

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

P-TWO_A5692B-A0G16-P

P-TWO_A5692B-A0G16-P

ME@

ME@

SO-DIMM B

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0

CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD

RAS#

VDD
ODT0

NC/A13

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1

CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SAO

2

+1.8V

+DDR_MCH_REF1

2

DDR_B_D5

4

DDR_B_D4

6
8

DDR_B_DM0

10
12

DDR_B_D6

14

DDR_B_D7

16
18

DDR_B_D12

20

DDR_B_D13

22
24

DDR_B_DM1

26
28

M_CLK_DDR3

30

M_CLK_DDR#3

32
34

DDR_B_D14

36

DDR_B_D15

38
40

42

DDR_B_D21DDR_B_D17

44

DDR_B_D16

46
48
50

NC

A11

A7
A6

A4
A2

A0
BA1
S0#

NC

SA1

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_B_DM2
DDR_B_D22

DDR_B_D23
DDR_B_D26

DDR_B_D24DDR_B_D25
DDR_B_DQS#3

DDR_B_DQS3
DDR_B_D29

DDR_B_D27
DDR_CKE3_DIMMB

DDR_B_MA11
DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0

DDR_B_BS#1
DDR_B_RAS#
DDR_CS2_DIMMB#

M_ODT2
DDR_B_MA13

DDR_B_D36
DDR_B_D37

DDR_B_DM4
DDR_B_D39

DDR_B_D38
DDR_B_D44

DDR_B_D45
DDR_B_DQS#5

DDR_B_DQS5
DDR_B_D46

DDR_B_D47
DDR_B_D52

DDR_B_D53
M_CLK_DDR2

M_CLK_DDR#2
DDR_B_DM6
DDR_B_D54

DDR_B_D55
DDR_B_D60

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D62
DDR_B_D63

R19

R19

10K_0402_5%

10K_0402_5%

12

R17

R17

1 2

10K_0402_5%

10K_0402_5%

2.2U_0805_10V6K

2.2U_0805_10V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C172

C172

1

1

2

2

M_CLK_DDR3 (7)
M_CLK_DDR#3 (7)

PM_EXTTS#0 (7,13)

DDR_CKE3_DIMMB (7)

DDR_B_BS#1 (8)
DDR_B_RAS# (8)
DDR_CS2_DIMMB# (7)

M_ODT2 (7)

M_CLK_DDR2 (7)
M_CLK_DDR#2 (7)

+3VS

1

+DDR_MCH_REF1 (13)

C159

C159

11/9 Modify pn to SP07000BY00

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/12/28

2005/12/28

2005/12/28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2006/12/28

2006/12/28

2006/12/28

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

SCHEMATIC, M/B LA-3241P

401426

401426

401426

14 45Wednesday, January 03, 2007

14 45Wednesday, January 03, 2007

14 45Wednesday, January 03, 2007

of

of

1

of

C

C

C