Compal LA-3211P Schematic

A

1 1

B

C

D

E

Compal Confidential

2 2

HCL51 Schematics Document

Intel Yonah Processor with ATIRC410MD/E + DDRII + SB460M

3 3

2006-04-05

REV: 1.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

Cover Page

HCL51 LA-3211P

星期二, 四月

11, 2006

E

0.4

of

143

A

B

C

D

E

Compal Confidential

Model Name : HCL51

Fan Control

page 35

File Name : LA-3211P

1 1

LCD Conn.

page 18

CRT & TV-out

page 19

LVDS

H_A#(3..31)

Yonah

uPGA-478 Package

PSB

533/667MHz

page 4,5

H_D#(0..63)

ATI RC410MB/D/E

uFCBGA-1466

Mini card

page 25

2 2

IDSEL:AD18
(PIRQF/H#,
GNT#3,
REQ#3)

Mini PCI
socket

(WLAN)
(TV-Tuner)

page 25

3.3V 33 MHz

IDSEL:AD22
(PIRQG#,
GNT#1,
REQ#1)

LAN (100/1000)

RTL8100/8110

page 23

RJ45

page 24

PCI-Express

PCI BUS

IDSEL:AD20
(PIRQE#/B#,
GNT#2,
REQ#2)

CardBus

ENE CB714

Slot 0

page 22

page 21

6 in 1
socket

page 22

page 7,8,9

Alink

ATI SB460M

page 13~~17

Thermal Sensor

F75383M

page 4

Memory BUS(DDRII)

Single Channel

1.8V DDRII 400/533/667

3.3V 48MHz

3.3V 24.576MHz/48Mhz

3.3V ATA-100
S-ATA

IDE

PIDE-HDD
Conn.

page 20

S-ATA HDD
Conn.

page 15

LPC BUS

3 3

RTC CKT.

page 13

Power On/Off CKT.

page 32

DC/DC Interface CKT.

page 36

Power Circuit DC/DC

page 37~~43

4 4

Switch/B Conn.

USB port4, 6

page 31

CD-PLAY/B Conn.

page 31

MEDIA/B Conn.

page 31

Touch Pad

EC I/O Buffer

ENE KB910Q

page 32

page 30

page 29

Int.KBD

page 30

BIOS

page 30

Super I/O

SMsC LPC47N207

page 28

FIR

TFDU6102-TR3

page 28

Clock Generator

ICS951413

page 12

200pin DDRII-SO-DIMM X2

BANK 0, 1, 2, 3

page 10,11

USB conn x4

page 26

USB port 0, 2 on M/B
USB port 4, 6 on PWRBTN/B

HD Audio

SIDE-ODD

page 20

MDC 1.5
Conn

page 31

HDA Codec

ALC883

page 33

Audio AMP

page 34

Phone Jack x3

page 34

Bluetooth
Conn

page 31

USB port1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

Block Diagrams

HCL51 LA-3211P

星期二, 四月

11, 2006

E

0.4

of

243

A

Voltage Rails

Power Plane Description

VIN

1 1

2 2

B+
+CPU_CORE
+0.9VS 0.9V switched power rail for DDR terminator
+1.05VS
+1.5VS
+1.8V
+1.8VS 1.8V switched power rail
+2.5VS
+3VALW
+3VS
+5VALW
+5VS
+VSB VSB alw ays on power rail ON ON*
+RTCVCC RTC p o w e r

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OF F.

Adapter power supply (19V)
AC or battery power rail for power circui t.
Core voltage for CPU

1.05V switched power rail

1.5V switched power rail

1.8V power rail for DDR

2.5V switched power rail

3.3V always on power rail

3.3V switched power rail
5V always on power rail
5V switched power rail

External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts

CardBus(SD)

1394
LAN(10/100)

Mini-PCI(WLAN/TV-Tuner)

AD20
AD16 0
AD22
AD18

2

1
3

B

S1 S3 S5

N/A N/A N/A

ON OFF
ON OFF
ON OFF OFF
ON OFF OFF
ON
ON
ON
ON
ON
ON

ON
ON

PIRQE/PIRQH
PIRQA
PIRQG
PIRQF/PORQH

N/AN/AN/A
OFF
OFF

ON

OFF

OFF

OFF
OFF

OFF
ON ON*
OFF

OFF

ON

ON*

OFF

OFFON

ONON

C

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

LOW

LOW

LOW

HIGH

LOWLOWLOW

LOW LOW LOW LOW

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6
7 NC

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

BOARD ID Table

Board ID

0
1
2
3
4
5

PCB Revision

0.2

0.2

D

ON

ONONON ON

HIGHHIGHHIGH

HIGH

HIGH

ON

ON

ON

ON

V typ

AD_BID

ON

OFF

OFF

V

0 V 0 V

0.503 V

0.819 V

1.185 V 1.264 V

2.200 V

3.300 V

BTO Option Table

BTO Item BOM Structure

LAN(10/100)
LAN(GIGA)
FIR FIR@
MINI CARD1 MINI1@
SATA HDD SATA@
CardReader 4IN1@

ON

OFF

OFF

OFF

AD_BID

0.538 V

0.875 V

2.341 V

3.300 V

E

LOW

OFF

OFF

OFF

max

8100C@
8110S@

6
7

EC SM Bus1 address

3 3

Device

Smart Battery
EEPROM(24C16/02)
GMT G781-1

Address Address

1010 000X b
1001 101X b

EC SM Bus2 address

Device

Fintek F75383M

1001 100X b0001 011X b

SKU ID Table

SKU ID

0
1
2
3

SKU

4
5

SB460M SM Bus address

Device

Clock Generator
(ICS951413)

DDR DIMM0
DDR DIMM2

4 4

A

Address

1101 001Xb

1001 000Xb
1001 010Xb

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

6
7

2005/06/20 2006/06/20

C

Compal Secret Data

Deciphered Date

D

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

Notes List

HCL51 LA-3211P

星期二, 四月

11, 2006

E

0.4

of

343

5

4

3

2

1

H_A#[3..31](7)

H_A#4
H_A#5
H_A#6
H_A#7
H_A#8

D D

H_REQ#[0..4](7)

H_ADSTB#0(7)

C C

B B

B

H_THERMDA, H_THERMDC routing together.
Trace width / Spacing = 10 / 10 mil

A A

For B-0 stepping engineering samples (ES) of Celeron M
processor need to pop this 51 ohm resistor.

H_ADSTB#1(7)

CLK_CPU_BCLK(12)

CLK_CPU_BCLK#(12)

H_ADS#(7)
H_BNR#(7)

H_BPRI#(7)

H_BR0#(7)

H_DEFER#(7)

H_DRDY#(7)

H_HIT#(7)
H_HITM#(7)

H_LOCK#(7)

H_RS#[0..2](7)

H_RESET#(7,13)

H_TRDY#(7)

H_DBSY#(7)

H_DPSLP#(13,14)

H_DPRSTP#(42)

H_DPWR#(7)

H_PWRGOOD(13)
H_CPUSLP#(14)

R20

1K_0402_5% @

12
12

51_0402_1%

H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22

H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADSTB#0
H_ADSTB#1

CLK_CPU_BCLK
CLK_CPU_BCLK#

H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_RESET#

H_RS#0
H_RS#1
H_RS#2
H_TRDY#

ITP_DBRESET#
H_DBSY#
H_DPSLP# H_BR0#
H_DPRSTP#
H_DPWR#

T2 PAD
T3 PAD

PROCHOT#

C

H_PWRGOOD
H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1

R22

TEST2
ITP_TMS
ITP_TRST#

THERMDA
THERMDC

H_THERMTRIP#

A

JCPU1A

J4

A3#

L4

A4#

M3

A5#

K5

A6#

M1

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L1

A13#

P4

A14#

P1

A15#

R1

A16#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U2

A23#

R4

A24#

T5

ADDR GROUP

A25#

T3

A26#

W3

A27#

W5

A28#

Y4

A29#

W2

A30#

Y1

A31#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L5

REQ4#

L2

ADSTB0#

V4

ADSTB1#

A22

BCLK0

A21

F21

D20

AD4
AD3
AD1
AC4

C20

D24
AC2
AC1
D21

AC5
AA6
AB3
C26
D25
AB5
AB6

A24
A25

H1
E2
G5

F1

H5
G6

E4
H4

B1

F3

F4
G3
G2

E1
B5
E5

D6
D7

C7

HOST CLK

BCLK1

ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#

CONTROL

HITM#
IERR#
LOCK#
RESET#

RS0#
RS1#
RS2#
TRDY#

BPM0#
BPM1#
BPM2#
BPM3#

DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#

PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#

THERMAL

THERMDA

DIODE

THERMDC
THERMTRIP#

FOX_PZ47903-2741-42_YONAH

YONAH

DATA GROUP

MISC

LEGACY CPU

D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DINV0#
DINV1#
DINV2#
DINV3#

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

A20M#

FERR#

IGNNE#

INIT#
LINT0
LINT1

STPCLK#

SMI#

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#

F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26

J26
M26
V23
AC20

H23
M24
W24
AD23
G22
N25
Y25
AE24

A6
A5
C4
B3
C6
B4

D5
A3

H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20H_A#23
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR

0_0402_5%

R25

H_STPCLK#
H_SMI#

12

H_NMI

H_DINV#0 (7)
H_DINV#1 (7)
H_DINV#2 (7)
H_DINV#3 (7)

H_A20M# (13)
H_FERR# (13)
H_IGNNE# (13)
H_INIT# (13)
H_INTR (13)

H_NMI (13)

H_STPCLK# (13)
H_SMI# (13)

H_D#0H_A#3

E22

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

H_D#[0..63] (7)

+CPU_CORE

+1.05VS

12

12

R1

47K_0402_5% @

C3

1 2

+1.05VS

H_THERMTRIP#

0.1U_0603_25V7K@

56_0402_5%

1 2

R4

R2
47K_0402_5%

1

C

2

B

E

3

MAINPWON (14,36,37,39)

Q1
2SC2411K_SC59

A

+1.05VS

R6

R9

H_DPRSTP#

0_0402_5%

B

H_DSTBN#[0..3] (7)

H_DSTBP#[0..3] (7)

Place Caps Close to CPU Socket

C4 180P_0402_50V8J

1 2

C5 180P_0402_50V8J

1 2

C6 180P_0402_50V8J

1 2

C7 180P_0402_50V8J

1 2

C8 180P_0402_50V8J

1 2

C9 180P_0402_50V8J

1 2

C10 180P_0402_50V8J

1 2

C11 180P_0402_50V8J

1 2

C12 180P_0402_50V8J

1 2

C13 180P_0402_50V8J

1 2

2005/11/01 2006/11/30

470_0402_5%

1 2

12

1

C

2

B

E

2SC2411K_SC59

3

Q3

Compal Secret Data

Deciphered Date

R10 470_0402_5%

1 2

H_INIT#
H_A20M#
H_CPUSLP#
H_INTR
H_NMI
H_SMI#
H_STPCLK#
H_IGNNE#
H_PWRGOOD
H_FERR#
H_DPSLP#

R18 390_0402_5%@
R19 390_0402_5%@
R23 200_0402_5%
R24 390_0402_5%@
R26 390_0402_5%@
R28 390_0402_5%@
R30 390_0402_5%@
R31 390_0402_5%@
R32 332_0402_1%
R33 56_0402_5%
R34 200_0402_5%

2

C2

2200P_0402_50V7K

DPRSLPVR (13,42)

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

12
12

1 2

+3VS

1

THERMDA

2

THERMDC

+1.05VS

R7

75_0402_1%

PROCHOT#

C1

0.1U_0402_16V4Z

1 2

U1

1

VDD

2
3
4 5

12

SCLK

D+

SDATA

ALERT#

D­THERM# GND

ADM1032ARMZ-2REEL_MSOP8

F75383M_MSOP8

12

R8
56_0402_5%

2

B

8
7
6

+3VALW

12

1

C

E

3

1K_0402_5%
R5

Q2
PMBT3904_SOT23

C

H_DPRSTP#
H_RESET#
ITP_TMS
ITP_TDI
ITP_TDO

H_IERR#

+1.05VS

ITP_DBRESET#

ITP_TRST#

ITP_TCK

Compal Electronics, Inc.

Title

Yonah(1/2)-GTLITP

Size Document Number Rev

Custom

HCL51 LA-3211P

, 11, 2006

星期二 四月

Date: Sheet

R12 54.9_0402_1%@
R13 40.2_0402_1%

R15 54.9_0402_1%@

R16 200_0402_5%
R17 56_0402_5%

R27 680_0402_5%

R29 27.4_0402_1%

12
12
12
12

R14 150_0402_5%

12

1 2

12

12

R21 150_0402_5%

12
12

1

EC_SMB_CK2 (28)
EC_SMB_DA2 (28)

H_PROCHOT# (14,42)

+1.05VS

R11 56_0402_5%@

+3VALW

of

443

0.4

5

4

3

2

1

Length match within 25 mils

Layout close CPU

20mils

1

2

VCCSENSE
VSSENSE

1

C15

0.01U_0402_16V7K

2

CPU_VID0(42)
CPU_VID1(42)
CPU_VID2(42)
CPU_VID3(42)
CPU_VID4(42)
CPU_VID5(42)
CPU_VID6(42)

+GTL_REF0

CPU_BSEL0(12)
CPU_BSEL1(8,12)
CPU_BSEL2(12)

H_PSI#(42)

+1.05VS

+CPU_CORE

H_PSI#
CPU_VID0

CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

COMP0
COMP1
COMP2
COMP3

JCPU1B

AF7

VCCSENSE

AE7

VSSSENSE

B26

VCCA

K6

VCCP

J6

VCCP

M6

VCCP

N6

VCCP

YONAH

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

PSI#
VID0

VID1
VID2
VID3
VID4
VID5
VID6

GTLREF
BSEL0

BSEL1
BSEL2

COMP0
COMP1
COMP2
COMP3

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

FOX_PZ47903-2741-42_YONAH

W21
G21

AD6
AE5
AE3
AE2

AD26

AB20
AA20
AF20
AE20
AB18
AB17
AA18
AA17
AD18
AD17
AC18
AC17
AF18
AF17

AA1
AA4
AB2
AA3

K21
M21

N21
T21
R21
V21

AE6

AF5
AF4
AF2

B22
B23
C21

R26
U26

AF1
D22
C23
C24

T22

T6

R6

J21

V6

U1

V1

E7

D2

F6
D3
C1

M4
N5

T2

V3

B2
C3

AB26

VSS

AA25

VSS

AD25

VSS

AE26

VSS

AB23

VSS

AC24

VSS

AF24

VSS

AE23

VSS

AA22

VSS

AD22

VSS

AC21

VSS

AF21

VSS

AB19

VSS

AA19

VSS

AD19

VSS

AC19

VSS

AF19

VSS

AE19

VSS

AB16

VSS

AA16

VSS

AD16

VSS

AC16

VSS

AF16

VSS

AE16

VSS

AB13

VSS

AA14

VSS

AD13

VSS

AC14

VSS

AF13

VSS

AE14

VSS

AB11

VSS

AA11

VSS

AD11

VSS

AC11

VSS

AF11

VSS

AE11

VSS

AB8

VSS

AA8

VSS

AD8

VSS

AC8

VSS

AF8

VSS

AE8

VSS

AA5

VSS

AD5

VSS

AC6

VSS

AF6

VSS

AB4

VSS

AC3

VSS

AF3

VSS

POWER, GROUNG, RESERVED SIGNALS AND NC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSRSVD

AE4
AB1
AA2
AD2
AE1
B6
C5
F5
E6
H6
J5
M5
L6
P6
R5
V5
U6
Y6
A4
D4
E3
H3
G4
K4
L3
P3
N4
T4
U3
Y3
W4
D1
C2
F2
G1B25

+CPU_CORE

D D

+1.05VS

R_A

12

12

R37
1K_0402_1%

R_B

2K_0402_1%
R38

+GTL_REF0

VCCSENSE(42)
VSSENSE(42)

R35 100_0402_1%

1 2

R36 100_0402_1%

1 2

+1.5VS

C14

10U_0805_10V4Z

Layout close CPU PIN AD26

0.5 inch (max)

C C

R39 27.4_0402_1%

1 2

R40 54.9_0402_1%

1 2

R41 27.4_0402_1%

1 2

R42 54.9_0402_1%

1 2

CPU_BSEL CPU_BSEL0 CPU_BSEL1

133

166

B B

00

0

1

CPU_BSEL2

1

1

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 18mils and Space 25mils
COMP1, COMP3 layout : Space 25mils

+CPU_CORE

JCPU1C

AE18

VCC

AE17

VCC

AB15

VCC

AA15

VCC

AD15

VCC

AC15

VCC

AF15

VCC

AE15

VCC

AB14

VCC

AA13

VCC

AD14

VCC

AC13

VCC

AF14

VCC

AE13

VCC

AB12

VCC

AA12

VCC

AD12

VCC

AC12

VCC

AF12

VCC

AE12

VCC

AB10

VCC

AB9

VCC

AA10

VCC

AA9

VCC

AD10

VCC

AD9

VCC

AC10

VCC

AC9

VCC

AF10

VCC

AF9

VCC

AE10

AD7
AC7

POWER, GROUND

VCC

AE9

VCC

AB7

VCC

AA7

VCC
VCC
VCC

B20

VCC

A20

VCC

F20

VCC

E20

VCC

B18

VCC

B17

VCC

A18

VCC

A17

VCC

D18

VCC

D17

VCC

C18

VCC

C17

VCC

F18

VCC

F17

VCC

E18

VCC

E17

VCC

B15

VCC

A15

VCC

D15

VCC

C15

VCC

F15

VCC

E15

VCC

B14

VCC

A13

VCC

D14

VCC

C13

VCC

F14

VCC

E13

VCC

B12

VCC

A12

VCC

D12

VCC

C12

VCC

F12

VCC

E12

VCC

B10

VCC

B9

VCC

A10

VCC

A9

VCC

D10

VCC

D9

VCC

C10

VCC

C9

VCC

F10

VCC

F9

VCC

E10

VCC

E9

VCC

B7

VCC

A7

VCC

F7

VCC

FOX_PZ47903-2741-42_YONAH

YONAH

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

K1
J2
M2
N1
T1
R2
V2
W1
A26
D26
C25
F25
B24
A23
D23
E24
B21
C22
F22
E21
B19
A19
D19
C19
F19
E19
B16
A16
D16
C16
F16
E16
B13
A14
D13
C14
F13
E14
B11
A11
D11
C11
F11
E11
B8
A8
D8
C8
F8
E8
G26
K26
J25
M25
N26
T26
R25
V25
W26
H24
G23
K23
L24
P24
N23
T23
U24
Y24
W23
H21
J22
M22
L21
P21
R22
V22
U21
Y21

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/11/01 2006/11/30

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Yonah(2/2)-PWR/GND

Size Document Number Rev

Custom

HCL51 LA-3211P 0.4

, 11, 2006

星期二 四月

2

Date: Sheet

1

of

543

5

Place these inside
socket cavity on L6
(North side

1

C16
22U_0805_6.3V6M

2

1

C26
22U_0805_6.3V6M

2

1

C36
22U_0805_6.3V6M

2

1

C42
22U_0805_6.3V6M

2

Secondary)

+CPU_CORE

D D

+CPU_CORE

+CPU_CORE

+CPU_CORE

C C

1

C17
22U_0805_6.3V6M

2

1

C27
22U_0805_6.3V6M

2

1

C37
22U_0805_6.3V6M

2

1

C43
22U_0805_6.3V6M

2

4

1

C18
22U_0805_6.3V6M

2

1

C28
22U_0805_6.3V6M

2

1

C38
22U_0805_6.3V6M

2

1

C44
22U_0805_6.3V6M

2

1

C19
22U_0805_6.3V6M

2

1

C29
22U_0805_6.3V6M

2

1

C39
22U_0805_6.3V6M

2

1

C45
22U_0805_6.3V6M

2

1

2

1

2

1

2

1

2

3

C20
22U_0805_6.3V6M

C30
22U_0805_6.3V6M

C40
22U_0805_6.3V6M

C46
22U_0805_6.3V6M

1

C21
22U_0805_6.3V6M

2

1

C31
22U_0805_6.3V6M

2

1

C41
22U_0805_6.3V6M

2

1

C47
22U_0805_6.3V6M

2

1

C22
22U_0805_6.3V6M

2

1

C32
22U_0805_6.3V6M

2

1

2

1

2

22uF 0805 X5R -> 85 degree C

C23
22U_0805_6.3V6M

C33
22U_0805_6.3V6M

2

1

2

1

2

C24
22U_0805_6.3V6M

C34
22U_0805_6.3V6M

1

C25
22U_0805_6.3V6M

2

1

C35
22U_0805_6.3V6M

2

1

High Frequence Decoupling

Near VCORE regulator.

+CPU_CORE

2006/02/13

South Side Secondary

B B

+1.05VS

1

+

C54

2

A A

5

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

1

+

C48

2

9mOhm
7343
PS CAP

1

+

C49

2

330U_D2E_2.5VM_R9

1

C55

2

0.1U_0402_16V4Z

4

330U_D2E_2.5VM_R9

1

+

C50

2

1

2

1

+

C51

@

2

330U_D2E_2.5VM_R9

1

+

C52

@

2

330U_D2E_2.5VM_R9

H=1.9mm H=1.9mm

C56

0.1U_0402_16V4Z

1

C57

2

0.1U_0402_16V4Z

1

C58

2

0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

330U_D2E_2.5VM_R9

1

C59

2

0.1U_0402_16V4Z

1

+

C53

North Side Secondary

2

1

C60

2

0.1U_0402_16V4Z

2005/11/01 2006/11/30

Compal Secret Data

Deciphered Date

ESR <= 1.5m ohm
Capacitor > 1980uF

Place these inside
socket cavity on L8
(North side
Secondary)

2

Compal Electronics, Inc.

Title

Yonah Bypass

Size Document Number Rev

Custom

HCL51 LA-3211P 0.4

, 11, 2006

星期二 四月

Date: Sheet

1

of

643

A

H_A#[3..31](4)

H_REQ#[0..4](4)

H_RS#[0..2](4)

U2A

H_A#3

G28

M28
K29
K30

M30
K27
M29
K26
N28

N25
N24

D25
E11
G22

H26
G27
G30
G29
G26
H28
J28
H25
K28
H29
J29
K24
K25
F29
G25
F26
F28
E29
H27

J26
L28
L29

L26
L25
L27

F25
F24
E23
E25
G24
F23

E27
C11

D23
G23
E26

F22
D26
E24

D11
B11

H22

CPU_A3#
CPU_A4#
CPU_A5#
CPU_A6#
CPU_A7#
CPU_A8#
CPU_A9#
CPU_A10#
CPU_A11#
CPU_A12#
CPU_A13#
CPU_A14#
CPU_A15#
CPU_A16#
CPU_REQ0#
CPU_REQ1#
CPU_REQ2#
CPU_REQ3#
CPU_REQ4#
CPU_ADSTB0#

CPU_A17#
CPU_A18#
CPU_A19#
CPU_A20#
CPU_A21#
CPU_A22#
CPU_A23#
CPU_A24#
CPU_A25#
CPU_A26#
CPU_A27#
CPU_A28#
CPU_A29#
CPU_A30#
CPU_A31#
CPU_ADSTB1#

CPU_ADS#
CPU_BNR#
CPU_BPRI#
CPU_DEFER#
CPU_DRDY#
CPU_DBSY#

CPU_LOCK#
CPU_CPURSET#

CPU_RS2#
CPU_RS1#
CPU_RS0#

CPU_TRDY#
CPU_HIT#
CPU_HITM#

CPU_COMP_N
CPU_COMP_P

CPU_VREF

RESERVED0
RESERVED1
CPU_DPWR#

PART 1 OF

ADDR.

ADDR.

6

GROUP 0

GROUP 1

CPU I/F

CONTROLMISC.

RC410MD

216CPP4AKA21HK_BGA707

H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9

R47

12

R48

12

+CPU_VREF

C69

A

1

2

H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15

H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17

H_A#18

H_A#19

H_A#20

H_A#21

H_A#22

H_A#23

H_A#24

H_A#25

H_A#26

H_A#27

H_A#28

H_A#29

H_A#30

H_A#31

H_RS#2
H_RS#1
H_RS#0

HSCOMP

HRCOMP

1 1

H_ADSTB#0(4)

2 2

3 3

4 4

+1.05VS

49.9_0402_1%

220P_0402_50V7K

H_ADSTB#1(4)

H_ADS#(4)
H_BNR#(4)
H_BPRI#(4)
H_DEFER#(4)
H_DRDY#(4)
H_DBSY#(4)

H_LOCK#(4)
H_RESET#(4,13)

H_TRDY#(4)
H_HIT#(4)
H_HITM#(4)

24.9_0402_1%

Place C close
to Ball H22

H_BR0#(4)
H_DPWR#(4)

DATA GROUP

0

CPU_DBI0#
CPU_DSTBN0#
CPU_DSTBP0#

DATA GROUP

1

CPU_DBI1#
CPU_DSTBN1#
CPU_DSTBP1#

DATA GROUP

2

CPU_DBI2#
CPU_DSTBN2#
CPU_DSTBP2#

DATA

GROUP 3

CPU_DBI3#
CPU_DSTBN3#
CPU_DSTBP3#

B

CPU_D0#
CPU_D1#
CPU_D2#
CPU_D3#
CPU_D4#
CPU_D5#
CPU_D6#
CPU_D7#
CPU_D8#

CPU_D9#
CPU_D10#
CPU_D11#
CPU_D12#
CPU_D13#
CPU_D14#
CPU_D15#

CPU_D16#
CPU_D17#
CPU_D18#
CPU_D19#
CPU_D20#
CPU_D21#
CPU_D22#
CPU_D23#
CPU_D24#
CPU_D25#
CPU_D26#
CPU_D27#
CPU_D28#
CPU_D29#
CPU_D30#
CPU_D31#

CPU_D32#
CPU_D33#
CPU_D34#
CPU_D35#
CPU_D36#
CPU_D37#
CPU_D38#
CPU_D39#
CPU_D40#
CPU_D41#
CPU_D42#
CPU_D43#
CPU_D44#
CPU_D45#
CPU_D46#
CPU_D47#

CPU_D48#
CPU_D49#
CPU_D50#
CPU_D51#
CPU_D52#
CPU_D53#
CPU_D54#
CPU_D55#
CPU_D56#
CPU_D57#
CPU_D58#
CPU_D59#
CPU_D60#
CPU_D61#
CPU_D62#
CPU_D63#

CPU_VREF
Trace=12Mil
Space=15Mil

+CPU_VREF

C72

B

H_D#[0..63] (4)
H_DINV#[0..3] (4)
H_DSTBN#[0..3] (4)
H_DSTBP#[0..3] (4)

H_D#0

E28

H_D#1

D28

H_D#2

D29

H_D#3

C29

H_D#4

D30

H_D#5

C30

H_D#6

B29

H_D#7

C28

H_D#8

C26

H_D#9

B25

H_D#10

B27

H_D#11

C25

H_D#12

A27

H_D#13

C24

H_D#14

A24

H_D#15

B26

H_DINV#0

C27

H_DSTBN#0

A28

H_DSTBP#0

B28

H_D#16

C19

H_D#17

C23

H_D#18

C20

H_D#19

C22

H_D#20

B22

H_D#21

B23

H_D#22

C21

H_D#23

B24

H_D#24

E21

H_D#25

B21

H_D#26

B20

H_D#27

G19

H_D#28

F21

H_D#29

B19

H_D#30

E20

H_D#31

D21

H_DINV#1

A21

H_DSTBN#1

D22

H_DSTBP#1

E22

H_D#32

C18

H_D#33

F19

H_D#34

E19

H_D#35

A18

H_D#36

D19

H_D#37

B18

H_D#38

C17

H_D#39

B17

H_D#40

E17

H_D#41

B16

H_D#42

C15

H_D#43

A15

H_D#44

B15

H_D#45

F16

H_D#46

G18

H_D#47

F18

H_DINV#2

C16

H_DSTBN#2

D18

H_DSTBP#2

E18

H_D#48

E16

H_D#49

D16

H_D#50

C14

H_D#51

B14

H_D#52

E15

H_D#53

D15

H_D#54

C13

H_D#55

E14

H_D#56

F13

H_D#57

B13

H_D#58

A12

H_D#59

C12

H_D#60

E12

H_D#61

D13

H_D#62

D12

H_D#63

B12

H_DINV#3

E13

H_DSTBN#3

F15

H_DSTBP#3

G15

+1.05VS

1

2

1U_0402_6.3V4Z

12

R49

49.9_0402_1%

12

R50
100_0402_1%

+1.2VS

SB_A_RXN0
SB_A_RXP0
SB_A_RXN1
SB_A_RXP1

NB_A_RXN0
NB_A_RXP0
NB_A_RXN1
NB_A_RXP1

C

ATI recommendation R33, R34

Place R
Close to Ball

C64 0.1U_0402_16V7K
C66 0.1U_0402_16V7K
C67 0.1U_0402_16V7K
C68 0.1U_0402_16V7K

CLK_NB_ALINK#(12)
CLK_NB_ALINK(12)

SB_A_RXN[0..3]
SB_A_RXP[0..3]

NB_A_RXN[0..3]
NB_A_RXP[0..3]

1 2
1 2
1 2
1 2

12
12
12
12

R4310K_0402_1%

PCE_RXISET

R448.25K_0402_1%

PCE_TXISET

R4582.5_0402_1%

PCE_NCAL

R46150_0402_1%

PCE_PCAL

SB_A_RXN[0..3] (13)
SB_A_RXP[0..3] (13)

NB_A_RXN[0..3] (13)
NB_A_RXP[0..3] (13)

10 mils
10 mils
10 mils
10 mils

NB_A_TXN0
NB_A_TXP0

NB_A_TXP1

AJ12

AK13

AG12

AH12

AJ11
AJ10

AK10

AG10

AG9

AF10

AA4
AA5

AB3
AB4

AC5
AC6

AD4
AD5

AK9

AE9

J4
J5

L4

K4
L5

L6

M4
M5

P4

N4

P5
P6

R4
R5

T3
T4

U5
U6

V4
V5

W3
W4

Y5
Y6

L2
K2

U2C

GFX_RX0N
GFX_RX0P

GFX_RX1N
GFX_RX1P

GFX_RX2N
GFX_RX2P

GFX_RX3N
GFX_RX3P

GFX_RX4N
GFX_RX4P

GFX_RX5N
GFX_RX5P

GFX_RX6N
GFX_RX6P

GFX_RX7N
GFX_RX7P

GFX_RX8N
GFX_RX8P

GFX_RX9N
GFX_RX9P

GFX_RX10N
GFX_RX10P

GFX_RX11N
GFX_RX11P

GFX_RX12N
GFX_RX12P

GFX_RX13N
GFX_RX13P

GFX_RX14N
GFX_RX14P

GFX_RX15N
GFX_RX15P

PCE_ISET
PCE_TXISET
PCE_NCAL
PCE_PCAL

SB_TX0N
SB_TX0P
SB_TX1N
SB_TX1P

SB_RX0N
SB_RX0P
SB_RX1N
SB_RX1P

SB_CLKN
SB_CLKP

A-LINK EXPRESS

I/F

216CPP4AKA21HK_BGA707

PCIE_WLAN_TX_P1

D

PART 3 OF

6

PCI EXPRESS

PCI EXPRESS I/F

RC410MD

GPP_TX0N/SB_TX2N
GPP_TX0P/SB_TX2P
GPP_TX1N/SB_TX3N
GPP_TX1P/SB_TX3P

GPP_RX0N/SB_RX2N
GPP_RX0P/SB_RX2P
GPP_RX1N/SB_RX3N
GPP_RX1P/SB_RX3P

C70 0.1U_0402_16V7K

1 2

C71 0.1U_0402_16V7K

1 2

To SB A-PCIE Link

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/11/01 2006/11/30

Compal Secret Data

Deciphered Date

D

I/F

GFX_TX0N
GFX_TX0P

GFX_TX1N
GFX_TX1P

GFX_TX2N
GFX_TX2P

GFX_TX3N
GFX_TX3P

GFX_TX4N
GFX_TX4P

GFX_TX5N
GFX_TX5P

GFX_TX6N
GFX_TX6P

GFX_TX7N
GFX_TX7P

GFX_TX8N
GFX_TX8P

GFX_TX9N
GFX_TX9P

GFX_TX10N
GFX_TX10P

GFX_TX11N
GFX_TX11P

GFX_TX12N
GFX_TX12P

GFX_TX13N
GFX_TX13P

GFX_TX14N
GFX_TX14P

GFX_TX15N
GFX_TX15P

GFX_CLKN
GFX_CLKP

GPP_TX2N
GPP_TX2P
GPP_TX3N
GPP_TX3P

GPP_RX2N
GPP_RX2P
GPP_RX3N
GPP_RX3P

E

N2
N1

R2
P2

T1
R1

U2
T2

V1
V2

W2
W1

AA2
Y2

AB1
AA1

AC2
AB2

AD1
AD2

AE2
AE1

AG2
AF2

AH1
AG1

AJ2
AH2

AJ4
AJ3

AJ5
AK4

M1
M2

NB_A_TXN2

AJ9

NB_A_TXP2

AJ8

NB_A_TXN3

AF6

NB_A_TXP3

AE6

PCIE_WLAN_TX_N1

AK6

PCIE_WLAN_TX_P1NB_A_TXN1

AJ6
AF4
AE4

NB_A_RXN2

AG8

NB_A_RXP2

AF8

NB_A_RXN3

AG7

NB_A_RXP3

AG6

PCIE_WLAN_C_RX_N1

AJ7

PCIE_WLAN_C_RX_P1

AK7
AH4
AG4

PCIE_WLAN_C_TX_N1PCIE_WLAN_TX_N1
PCIE_WLAN_C_TX_P1

Compal Electronics, Inc.

Title

RC410MD-FSB, PCIE,A-PCIE

Size Document Number Rev

Custom

HCL51 LA-3211P

, 11, 2006

星期二 四月

Date: Sheet

C610.1U_0402_16V7K

SB_A_RXN2

12

C620.1U_0402_16V7K

SB_A_RXP2

12

C630.1U_0402_16V7K

SB_A_RXN3

12

C650.1U_0402_16V7K

SB_A_RXP3

12

PCIE_WLAN_C_RX_N1 (25)
PCIE_WLAN_C_RX_P1 (25)

PCIE_WLAN_C_TX_N1 (25)
PCIE_WLAN_C_TX_P1 (25)

E

0.4

of

743

A

DDR_DQ[0..63]
DDR_DQS[0..7]
DDR_DQS#[0..7]
DDR_DM[0..7]

DDR_SMA[0..17]

1 1

+1.8V

12

1

R55

1K_0402_1%

1K_0402_1%

2 2

12

R57

2

0.1U_0402_10V6K

1

2

0.1U_0402_10V6K

MEM_VMODE: 1.8V: DDR2

+1.8V

R62

12

61.9_0603_1%

R67

12

3 3

@

61.9_0603_1%

Place these R and C
close to relative Ball.

1

C76

2

MEM_COMPN

MEM_COMPP

C77

@

0.47U_0603_16V4Z

C74

+DDR_VREF

C75

MEM_CAP1
MEM_CAP2

1

2

0.47U_0603_16V4Z

DDR_DQ[0..63] (10,11)
DDR_DQS[0..7] (10,11)
DDR_DQS#[0..7] (10,11)
DDR_DM[0..7] (10,11)

DDR_SMA[0..17] (10,11)

DDR_SRAS#(10,11)
DDR_SCAS#(10,11)
DDR_SWE#(10,11)

EMC_DDR_CLK0#(10)
EMC_DDR_CLK0(10)

EMC_DDR_CLK1#(10)
EMC_DDR_CLK1(10)

EMC_DDR_CLK3#(11)
EMC_DDR_CLK3(11)

EMC_DDR_CLK4#(11)
EMC_DDR_CLK4(11)

DDR_SCKE0(10)
DDR_SCKE1(10)
DDR_SCKE2(10,11)
DDR_SCKE3(10,11)

DDR_SCS#0(10)
DDR_SCS#1(10)
DDR_SCS#2(10,11)
DDR_SCS#3(10,11)
DDR_ODT0(10)
DDR_ODT1(10,11)
DDR_ODT2(10)
DDR_ODT3(10,11)

+1.8V

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12
DDR_SMA13
DDR_SMA14
DDR_SMA15
DDR_SMA16
DDR_SMA17

DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SCS#3

DDR_ODT0
DDR_ODT1

DDR_ODT2
DDR_ODT3

R60 1K_0402_5%

1 2

MEM_CAP1
MEM_CAP2
MEM_COMPP
MEM_COMPN
+DDR_VREF

DDR_DQS#0
DDR_DQS0

DDR_DQS#1
DDR_DQS1

DDR_DQS#2
DDR_DQS2

DDR_DQS#3
DDR_DQS3

DDR_DQS#4
DDR_DQS4

DDR_DQS#5
DDR_DQS5

DDR_DQS#6
DDR_DQS6

DDR_DQS#7
DDR_DQS7

10mil
10mil
10mil
10mil
20mil

AK27

AJ27

AH26

AJ26

AH25

AJ25
AH24
AH23

AJ24

AJ23
AH27
AH22

AJ22
AF28

AJ21
AG27

AJ28
AH21

AJ29
AG28
AH30

AC26
AC25

AF16
AE16

V29
V30

AC24
AC23

AG17
AF17

W29
W28

AH20

AJ20
AE24
AE21

AH29
AG29
AH28
AF29
AG30
AE28
AC30

Y30

AD28

AJ14

N30

AJ15
AE29
AB27

AH17

AJ18
AF15

AE14
AE22

AF22
AF26

AE25

W26
W27

AB30
AB29

R25
P25

R30
R29

U2B

MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_A14
MEM_A15
MEM_A16
MEM_A17

MEM_RAS#
MEM_CAS#
MEM_WE#

MEM_CK0N
MEM_CK0P

MEM_CK1N
MEM_CK1P

MEM_CK2N
MEM_CK2P

MEM_CK3N
MEM_CK3P

MEM_CK4N
MEM_CK4P

MEM_CK5N
MEM_CK5P
MEM_CKE0
MEM_CKE1
MEM_CKE2
MEM_CKE3

MEM_CS#0
MEM_CS#1
MEM_CS#2
MEM_CS#3
MEM_ODT0
MEM_ODT1
MEM_ODT2/RSV2
MEM_ODT3/RSV3
MEM_VMODE
MEM_CAP1
MEM_CAP2
MEM_COMPP
MEM_COMPN
MEM_VREF

MEM_DQS0N
MEM_DQS0P

MEM_DQS1N
MEM_DQS1P

MEM_DQS2N
MEM_DQS2P

MEM_DQS3N
MEM_DQS3P

MEM_DQS4N
MEM_DQS4P

MEM_DQS5N
MEM_DQS5P

MEM_DQS6N
MEM_DQS6P

MEM_DQS7N
MEM_DQS7P

NB STRAPING PINS

FSB SPEED

BM_REQ#

4 4

EMC_NB_CRT_VSYNC

EMC_NB_CRT_HSYNC

BM_REQ# EMC_NB_CRT_HSYNC EMC_NB_CRT_VSYNC

166MHZ
133MHZ

0
0

@

R70 4.7K_0402_5%

1 2

R71 4.7K_0402_5%

1 2

+3VS

R73 4.7K_0402_5%

1 2

R76

4.7K_0402_5%

2SC2411K_SC59

A

12

12

1

C

Q5

E

3

1
0

4.7K_0402_5%
R74

2

B

4.7K_0402_5%

+3VS

1
1

R77

12

+1.05VS

+1.05VS

12

B

ADDRESS

DATA CLKMISC

216CPP4AKA21HK_BGA707

2005/12/21

4.7K_0402_5%
R75

CPU_BSEL1 (5,12)

B

MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6

DATA

MEM_DQ7
MEM_DQ8

MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39
MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63

MEM_DM0

MEM_DM1

MEM_DM2

MEM_DM3

MEM_DM4

MEM_DM5

MEM_DM6

MEM_DM7

STRP_DATA

NB_DDC_CLK

2SC2411K_SC59

PART 2

OF 6

MEMORY I/F

RC410MD

C

DDR_DQ0

AJ16

DDR_DQ1

AH16

DDR_DQ2

AJ19

DDR_DQ3

AH19

DDR_DQ4

AH15

DDR_DQ5

AK16

DDR_DQ6

AH18

DDR_DQ7

AK19

DDR_DQ8

AF13

DDR_DQ9

AF14

DDR_DQ10

AE19

DDR_DQ11

AF19

DDR_DQ12

AE13

DDR_DQ13

AG13

DDR_DQ14

AF18
AE17
AF20
AF21
AG23
AF24
AG19
AG20
AG22
AF23
AD25
AG25
AE27
AD27
AE23
AD24
AE26
AD26
AA25
Y26
W24
U25
AA26
Y25
V26
W25
AC28
AC29
AA29
Y29
AD30
AD29
AA30
Y28
U27
T27
N26
M27
U26
T26
P27
P26
U29
T29
P29
N29
U28
T28
P28
N27

AJ17
AG15
AE20
AF25
Y27
AB28
R26
R28

Q4

DDR_DQ15
DDR_DQ16
DDR_DQ17
DDR_DQ18
DDR_DQ19
DDR_DQ20
DDR_DQ21
DDR_DQ22
DDR_DQ23
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_DQ28
DDR_DQ29
DDR_DQ30
DDR_DQ31
DDR_DQ32
DDR_DQ33
DDR_DQ34
DDR_DQ35
DDR_DQ36
DDR_DQ37
DDR_DQ38
DDR_DQ39
DDR_DQ40
DDR_DQ41
DDR_DQ42
DDR_DQ43
DDR_DQ44
DDR_DQ45
DDR_DQ46
DDR_DQ47
DDR_DQ48
DDR_DQ49
DDR_DQ50
DDR_DQ51
DDR_DQ52
DDR_DQ53
DDR_DQ54
DDR_DQ55
DDR_DQ56
DDR_DQ57
DDR_DQ58
DDR_DQ59
DDR_DQ60
DDR_DQ61
DDR_DQ62
DDR_DQ63

DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DM4
DDR_DM5
DDR_DM6
DDR_DM7

1

C

E

3

4.7K_0402_5%
R68

1 2

4.7K_0402_5%
R69

1 2

@

1 2

2

B

R72
2K_0402_1%

EMC_NB_CRT_HSYNC(19)

EMC_NB_CRT_VSYNC(19)

EMC_CLK_NB_14M(12)

NB_EDID_DATA(18)

+3VS

+3VS

SB_PWRGD# (15)

EMC_CLK_NB_BCLK(12)
EMC_CLK_NB_BCLK#(12)

NB_EDID_CLK(18)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

1 2

R262 75_0402_1%

1 2

R263 75_0402_1%

1 2

R264 75_0402_1%

R51

1 2

715_0402_1%

NB_DDC_CLK(19)
NB_DDC_DATA(19)

R58

4.7K_0402_5%
R63

1 2

4.7K_0402_5%
R64

1 2

4.7K_0402_5%
R65

1 2

R52
10_0402_5%

NB_EDID_CLK
NB_EDID_DATA
NB_DVI_DDCDATA
STRP_DATA
TESTMODE

1 2

1.8K_0402_5%

NB_EDID_CLK

NB_EDID_DATA

NB_DVI_DDCDATA

RSET

15mil

NB_DDC_CLK
NB_DDC_DATA

C73

12

15P_0402_50V8D@

NB_14M

12

1 2

R56 10K_0402_5%

EMC_NB_CRT_R(19)
EMC_NB_CRT_G(19)
EMC_NB_CRT_B(19)

Low: Normal Mode(Fixed)

High: Test Mode

2005/12/21

STRP_DATA: DEBUG STRAP
DEFAULT: 1
0: MEMORY CHANNEL STRAPING
1: EEPROM STRAPING

NB_DDC_CLK: CPU VCC SEL
DEFAULT: 1 1: DESKTOP CPU 0: MOBILE CPU

2005/11/01 2006/11/30

Compal Secret Data

U2D

F9

Y

D9

C

E9

COMP

F10

RED

E10

GREEN

D10

BLUE

C3

DACHSYNC

B3

DACVSYNC

B10

RSET

B2

DACSCL

C2

DACSDA

G1

OSCIN

F1

OSCOUT

G2

TVCLKIN

J1

CPU_CLKP

K1

CPU_CLKN

D2

I2C_CLK

C1

I2C_DATA

H3

DDC_DATA

D1

STRP_DATA

C4

TESTMODE

AH13

THERMALDIODE_P

AJ13

THERMALDIODE_N

R66

1 2

4.7K_0402_5%

@

Deciphered Date

D

CRT &

TV I/F

CLK.

GEN.

216CPP4AKA21HK_BGA707

LVDS_ENBKL

LVDS_ENVDD

D

TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P

PART 4 OF

6

TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P

LVDS

TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P

LVDS_BLON

LVDS_DIGON

RC410MD

NB_PWRGD

LVDS_BLEN

SYSRESET#

SUS_STAT#

POWERGOOD

SUS_STAT#

1
2

Title

Size Document Number Rev

Custom

Date: Sheet

E

EMC_NB_TZOUT0-

B4

EMC_NB_TZOUT0+

A4

EMC_NB_TZOUT1-

B5

EMC_NB_TZOUT1+

C6

EMC_NB_TZOUT2-

B6

EMC_NB_TZOUT2+

A6
B7
A7

EMC_NB_TZCLK-

F7

TXCLK_UN
TXCLK_UP

TXCLK_LN
TXCLK_LP

BMREQ#

TMDS_HPD

+1.8V

EMC_NB_TZCLK+

F8

EMC_NB_TXOUT0-

E5

EMC_NB_TXOUT0+

F5

EMC_NB_TXOUT1-

D5

EMC_NB_TXOUT1+

C5

EMC_NB_TXOUT2-

E6

EMC_NB_TXOUT2+

D6
E7
E8

EMC_NB_TXCLK-

G6

EMC_NB_TXCLK+

F6

LVDS_ENBKL

G3

LVDS_ENVDD

E2
F2

NB_RST#

A3

SUS_STAT#

AH14

NB_PWRGD

E3

BM_REQ#

H2

J2

12

R59

10K_0402_5%

R53 4.7K_0402_5%@

1 2
1 2

R54

2006/03/31

R61
220K_0402_1%

D1

1 2

2 1

CH751H-40_SC76
D2

NB_RST#

2 1

CH751H-40_SC76

+3VALW

147

U3A

PG

A

O

B

SN74LVC08APW_TSSOP14

+3VALW

147

U3B

4

PG

A

O

5

B

SN74LVC08APW_TSSOP14

3

6

ENBKL (28)

NB_ENVDD (18)

Compal Electronics, Inc.

RC410MD-DDR/DISP/MISC

HCL51 LA-3211P

, 11, 2006

星期二 四月

E

EMC_NB_TZOUT0- (18)
EMC_NB_TZOUT0+ (18)
EMC_NB_TZOUT1- (18)
EMC_NB_TZOUT1+ (18)
EMC_NB_TZOUT2- (18)
EMC_NB_TZOUT2+ (18)

EMC_NB_TZCLK- (18)
EMC_NB_TZCLK+ (18)

EMC_NB_TXOUT0- (18)
EMC_NB_TXOUT0+ (18)
EMC_NB_TXOUT1- (18)
EMC_NB_TXOUT1+ (18)
EMC_NB_TXOUT2- (18)
EMC_NB_TXOUT2+ (18)

EMC_NB_TXCLK- (18)
EMC_NB_TXCLK+ (18)

4.7K_0402_5%@

NB_RST# (13)
NB_PWRGD (15)

BM_REQ# (13)

NB_SUS_STAT# (14,29)

of

843

0.4

A

C162

C172

1

2

0.1U_0402_16V4Z

+1.2VS

+1.05VS

1

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

C188

1

2

0.1U_0402_16V4Z

C133
C135
C137
C155
C158
C159

1 2

C78 10U_0805_10V4Z

1 2

C79 10U_0805_10V4Z

1 2

C82 1U_0402_6.3V4Z

1 2

C85 1U_0402_6.3V4Z

1 2

C88 1U_0402_6.3V4Z

1 2

C90 1U_0402_6.3V4Z

1 2

C92 1U_0402_6.3V4Z

1 1

1 2

C94 1U_0402_6.3V4Z

1 2

C96 1U_0402_6.3V4Z

1 2

C98 1U_0402_6.3V4Z

1 2

C100 1U_0402_6.3V4Z

1 2

C102 1U_0402_6.3V4Z

1 2

C104 1U_0402_6.3V4Z

1 2

C106 1U_0402_6.3V4Z

1 2

C108 1U_0402_6.3V4Z

1 2

C110 1U_0402_6.3V4Z

1 2

C112 1U_0402_6.3V4Z

1 2

C118 10U_0805_10V4Z

1 2

C120 10U_0805_10V4Z

1 2

C122 1U_0402_6.3V4Z

2 2

1 2

C124 1U_0402_6.3V4Z

1 2

C127 1U_0402_6.3V4Z

1 2

C130 1U_0402_6.3V4Z

1 2

C132 1U_0402_6.3V4Z

1 2

C134 1U_0402_6.3V4Z

1 2

C136 1U_0402_6.3V4Z

1 2

C138 1U_0402_6.3V4Z

1 2

C144 1U_0402_6.3V4Z

1 2

C147 1U_0402_6.3V4Z

1 2

C150 1U_0402_6.3V4Z

1 2

C153 1U_0402_6.3V4Z

1 2

C156 1U_0402_6.3V4Z

3 3

+1.8VS

L3

1 2

CHB1608U301_0603

+1.8VS +AVDDDI

L6

1 2

CHB1608U301_0603

C187

C186

4 4

1

2

0.1U_0402_16V4Z

1 2
1 2
1 2
1 2
1 2
1 2

+

1 2

C160

+AVDDQ

1

C163

2

1U_0402_6.3V4Z

1

C173

2

1U_0402_6.3V4Z

1

C189

2

10U_0805_10V4Z

A

10U_0805_10V4Z
10U_0805_10V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z

470U_D2_2.5VM

+AVDDDI

2

C164

1

1U_0402_6.3V4Z

2

C174

1

1U_0402_6.3V4Z

+LPVDD

1

1U_0402_6.3V4Z

2

+AVDD

+CPVDD
+MPVDD

C190

+1.2VS

5A

+1.05VS

5A

1

+

2

220U_D2_4VM

H=1.9mm

1 2

CHB2012U170_0805

U2E

M13

VDD_CORE

M15

VDD_CORE

M17

VDD_CORE

M19

VDD_CORE

N12

VDD_CORE

N14

VDD_CORE

N16

VDD_CORE

N18

VDD_CORE

P13

VDD_CORE

P15

VDD_CORE

P17

VDD_CORE

P19

VDD_CORE

R12

VDD_CORE

R14

VDD_CORE

R16

VDD_CORE

R18

VDD_CORE

T13

VDD_CORE

T15

VDD_CORE

T17

VDD_CORE

T19

VDD_CORE

U12

VDD_CORE

U14

VDD_CORE

U16

VDD_CORE

U18

VDD_CORE

V13

VDD_CORE

V15

VDD_CORE

V17

VDD_CORE

V19

VDD_CORE

W12

VDD_CORE

W14

VDD_CORE

W16

VDD_CORE

W18

VDD_CORE

A10

VDD_CPU

F11

VDD_CPU

F12

VDD_CPU

F17

VDD_CPU

G11

VDD_CPU

G12

VDD_CPU

G13

VDD_CPU

G14

VDD_CPU

G16

VDD_CPU

G17

VDD_CPU

G20

VDD_CPU

H11

VDD_CPU

H12

VDD_CPU

H13

VDD_CPU

H14

VDD_CPU

H16

VDD_CPU

H17

VDD_CPU

H19

VDD_CPU

H23

VDD_CPU

H24

VDD_CPU

L23

VDD_CPU

L24

VDD_CPU

N23

VDD_CPU

P23

VDD_CPU

P24

VDD_CPU

C9

AVDD

B8

AVDDQ

D8

AVDDDI

H21

CPVDD

AB26

MPVDD

C165

22U_1206_6.3V6M

L10

2006/01/23

ATI recommend 2.2uF

1

C169

0.1U_0402_16V4Z

2

+1.8VS

CORE

PWR

216CPP4AKA21HK_BGA707

1

C170

2

+1.8VS

1

+

2

B

VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM

MEM I/F PWRCPU I/F

VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM
VDDR_MEM

PART 5

OF 6

POWER

RC410MD

PWR

+AVDD

L5

1 2

CHB2012U170_0805

1

C171

1U_0402_6.3V4Z

2

+CPVDD

C191
470U_D2_2.5VM

B

VDD_18
VDD_18
VDD_18
VDD_18

VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12

VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18
VDDA_18

VDDR3
VDDR3

LPVDD
LVDDR18D
LVDDR18A
LVDDR18A

PLLVDD

1

2

C182

AB23
AB24
AC13
AC16
AC19
AC21
AC22
AD13
AD16
AD19
AD21
AD22
AD23
AK21
AK24
AK28
T23
T24
V23
V24
Y23
Y24

0.1A

AB22
AB9
J22
J9

AB7
AC7
AC8
AD9
H4
H5
J6
K6
L7
L8
M7
M8
P7
P8
T7
T8
W7
W8

0.75A

AB8
AC10
AC9
AD10
AE11
AF11
AG11
U7
U8
Y7
Y8

0.1A

G4
G5
J8
C7
H7
H8
H10

+3VS

1

C183

2

10U_0805_10V4Z

1U_0402_6.3V4Z

+1.8V

2A

RC_VDD_18

2.25A

RC_VDDA_18

C140 0.1U_0402_16V4Z
C142 1U_0402_6.3V4Z
C145 1U_0402_6.3V4Z
C148 1U_0402_6.3V4Z
C151 1U_0402_6.3V4Z
C154 1U_0402_6.3V4Z
C157 10U_0805_10V4Z

+VDDQ

20mils

+LPVDD

20mils

ATI recommend separate pure power

+PLLVDD

1

C166

10U_0805_10V4Z

2

L9

1 2

CHB1608U301_0603

1

C184

0.1U_0402_16V4Z

2

C80 0.1U_0402_16V4Z
C83 0.1U_0402_16V4Z
C86 0.1U_0402_16V4Z

L1

1 2

CHB1608U301_0603

1 2

C116 1U_0402_6.3V4Z

1 2

C119 1U_0402_6.3V4Z

1 2

C121 1U_0402_6.3V4Z

1 2

C123 1U_0402_6.3V4Z

1 2

C125 10U_0805_10V4Z

1 2

C128 10U_0805_10V4Z

RC_VDDA_12

L2

1 2

CHB1608U301_0603

1 2
1 2
1 2
1 2
1 2
1 2
1 2

20mils

0.1U_0402_16V4Z

1

C167

2

+1.8VS

1

C185

2

1U_0402_6.3V4Z

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2
1 2
1 2

1

C168

0.1U_0402_16V4Z

2

Issued Date

C

+1.8V

+1.8VS

+1.8VS

L4

1 2

CHB2012U170_0805

1

C175

2

10U_0805_10V4Z

C

D

1 2

C81 10U_0805_10V4Z

1 2

C84 10U_0805_10V4Z

1 2

C87 10U_0805_10V4Z

1 2

C89 10U_0805_10V4Z

1 2

C91 1U_0402_6.3V4Z

1 2

C93 1U_0402_6.3V4Z

1 2

C95 1U_0402_6.3V4Z

1 2

C97 1U_0402_6.3V4Z

1 2

C99 1U_0402_6.3V4Z

1 2

C101 1U_0402_6.3V4Z

1 2

C103 1U_0402_6.3V4Z

1 2

C105 1U_0402_6.3V4Z

1 2

C107 1U_0402_6.3V4Z

1 2

C109 1U_0402_6.3V4Z

1 2

C111 1U_0402_6.3V4Z

1 2

C113 1U_0402_6.3V4Z

1 2

C114 1U_0402_6.3V4Z

1 2

C115 1U_0402_6.3V4Z

1 2

C117 1U_0402_6.3V4Z

+1.2VS

1 2

L50 CHB2012U170_0805

1 2

L51 CHB2012U170_0805

C126 10U_0805_10V4Z

1 2

C129 10U_0805_10V4Z

1 2

C131 10U_0805_10V4Z

1 2

C139 1U_0402_6.3V4Z

1 2

C141 1U_0402_6.3V4Z

1 2

C143 1U_0402_6.3V4Z

1 2

C146 1U_0402_6.3V4Z

1 2

C149 1U_0402_6.3V4Z

1 2

C152 1U_0402_6.3V4Z

1 2

+

1 2

470U_D2_2.5VM

C161

2006/01/23

+3VS+VDDQ

Place L close to Ball AB26
Place C between Ball AB26,AA27

L7

1 2

1

2

1U_0402_6.3V4Z

CHB1608U301_0603

1

C176

C177

0.1U_0402_16V4Z

2

2005/11/01 2006/11/30

Compal Secret Data

+1.8VS+MPVDD

1U_0402_6.3V4Z

Deciphered Date

D

AA23
AA24
AA28
AC11
AC12
AC14
AC15
AC17
AC18
AC20
AC27
AD11
AD12
AD14
AD15
AD17
AD18
AD20
AE30
AF12
AF27
AG14
AG16
AG18
AG21
AG24
AG26
AH11

AJ30
AK12
AK15
AK18

AK2
AK22
AK25
AK29

B30

D14

D17

D20

D24

D27

G10

H15

H18

K23

M12

M14

M16

M18

M23

M24

M26

N13

N15

N17

N19

P12

P14

P16

P18

C178

A13
A16
A19

A22
A25
A29

AJ1

D3
D4

F27
F30

J23
J24
J27

J30

U2F

A2

A9

B1

F3
F4

J3

K8

+PLLVDD

1

2

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

E

R13

VSS

R15

VSS

R17

VSS

R19

VSS

R23

VSS

R24

VSS

R27

VSS

T12

VSS

T14

VSS

T16

VSS

T18

VSS

T30

VSS

PART 6 OF

6

GOUNDRC410MD

216CPP4AKA21HK_BGA707

L8

1 2

CHB1608U301_0603

1

C179

1U_0402_6.3V4Z

2

1

C180

10U_0805_10V4Z

2

Compal Electronics, Inc.

Title

RC410MB PWR/GND

Size Document Number Rev

Custom

HCL51 LA-3211P

, 11, 2006

星期二 四月

Date: Sheet

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA

AVSSN
AVSSQ

AVSSDI

LPVSS
LVSSR
LVSSR
LVSSR

PLLVSS

CPVSS
MPVSS

+1.8VS

1

C181

10U_0805_10V4Z

2

E

U13
U15
U17
U19
U23
U24
V12
V14
V16
V18
V27
V28
W13
W15
W17
W19
W23
W30

AA3
AA7
AA8
AB5
AB6
AC3
AD3
AD7
AD8
AE8
AF3
AF5
AF7
AF9
AG5
AH10
AH3
AH5
AH6
AH7
AH8
AH9
K5
L3
M3
N5
N6
N7
N8
P3
R3
R7
R8
T5
T6
U3
V3
V7
V8
W5
W6
Y3

C10
B9
C8
J7
G7
G8
G9
H9
H20
AA27

0.4

of

943

A

+1.8V

1 1

C197 0.1U_0402_16V4Z

C196 0.1U_0402_16V4Z

C195 0.1U_0402_16V4Z

1

1

+

C194

470U_D2_2.5VM

2 2

3 3

4 4

2

2

+0.9VS

C208 0.1U_0402_16V4Z

C207 0.1U_0402_16V4Z

1

1

2

2

Layout Note:
Every four parallel termination resistors with two caps,
one is connected to ground, the other one is connected
between +1.8V and +0.9VS. Need to place each parallel
resistor with one cap to GND and one cap between
+1.8V and +0.9VS

DDR_SCKE3(8,11)

DDR_SCS#3(8,11)

2005/12/26

A

1

1

2

2

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to V_DDR_MCH_REF

C210 0.1U_0402_16V4Z

C209 0.1U_0402_16V4Z

1

2

DDR_SMA14
DDR_SMA11

DDR_SCKE3

DDR_SMA5
DDR_SMA2

DDR_SMA12
DDR_SMA17

DDR_SWE#
DDR_SMA3

DDR_SMA10
DDR_SMA16

C211 0.1U_0402_16V4Z

1

1

2

2

1 4
2 3

1 2

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

RP37 56_0404_4P2 R_5%

1 4

DDR_SMA13

2 3

DDR_SCKE0
DDR_SCKE1
DDR_SCS#0
DDR_SCS#1

B

Layout Note:
Place near JDIM1

C199 0.1U_0402_16V4Z

C198 0.1U_0402_16V4Z

1

1

2

2

C212 0.1U_0402_16V4Z

C213 0.1U_0402_16V4Z

1

1

2

2

RP29 56_0404_4P2R_5%

56_0402_5%

R496

RP31 56_0404_4P2R_5%

56_0404_4P2R_5%

RP33

56_0404_4P2R_5%

RP35

RP39
56_0404_4P2R_5%

56_0402_5%

R491

1 2

56_0402_5%

R492

1 2

56_0402_5%

R493

1 2

56_0402_5%

R494

1 2

B

C200 0.1U_0402_16V4Z

1

2

C214 0.1U_0402_16V4Z

1

2

+0.9VS

C225 0.01U_0402_16V7K @
C226 0.01U_0402_16V7K @

C227 0.01U_0402_16V7K @
C228 0.01U_0402_16V7K @

C229 0.01U_0402_16V7K @
C230 0.01U_0402_16V7K @

C231 0.01U_0402_16V7K @
C232 0.01U_0402_16V7K @

C235 0.01U_0402_16V7K @

C201 0.1U_0402_16V4Z

1

2

C215 0.1U_0402_16V4Z

1

2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2

R80

1 2

56_0402_5%

C202 0.1U_0402_16V4Z

1

2

C216 0.1U_0402_16V4Z

1

2

+1.8V

1

2

C

C203 0.1U_0402_16V4Z

C204 0.1U_0402_16V4Z

1

1

2

2

C218 0.1U_0402_16V4Z

C217 0.1U_0402_16V4Z

1 2
1 4

2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

C219 0.1U_0402_16V4Z

1

1

2

2

56_0402_5%

R495

DDR_SCKE2
DDR_SMA6

DDR_SMA7

56_0404_4P2R_5%

RP30

RP32 56_0404_4P2R_5%

DDR_SMA9
DDR_SMA8

DDR_SRAS#
DDR_SMA4

56_0404_4P2R_5%

RP34

RP36 56_0404_4P2R_5%

DDR_SMA0
DDR_SMA1

DDR_SCS#2
DDR_SMA15

56_0404_4P2R_5%

RP38

RP40 56_0404_4P2R_5%

DDR_SCAS#DDR_SCS#3
DDR_ODT2

DDR_ODT3
DDR_ODT1

56_0404_4P2R_5%

RP41

DDR_ODT0

C

C205 0.1U_0402_16V4Z

1

2

C220 0.1U_0402_16V4Z

1

2

R78
1K_0402_1%

+DDR_VREF1

R79
1K_0402_1%

C206 0.1U_0402_16V4Z

1

2

C222 0.1U_0402_16V4Z

C221 0.1U_0402_16V4Z

1

1

2

2

2006/01/23

DDR_SCKE2 (8,11)

DDR_SCS#2 (8,11)

DDR_ODT3 (8,11)
DDR_ODT1 (8,11)

1

2

C223 22U_1206_6.3V6M

D

+1.8V

12

12

1

2

C224 22U_1206_6.3V6M

2

C192

0.1U_0402_16V4Z

1

C193 0.1U_0402_16V4Z

1

2

DDR_SCKE0(8)

DDR_SWE#(8,11)
DDR_SCAS#(8,11)

DDR_SCS#1(8)
DDR_ODT2(8)

SB_SMDATA(11,12,14,25)
SB_SMCLK(11,12,14,25)

DDR_DQS#6
DDR_DQS6

DDR_DQ50
DDR_DQ55

DDR_DQ60
DDR_DQ57

DDR_DM7
DDR_DQ58

DDR_DQ62

+3VS

E

DDR_DQ8
DDR_DQ10

DDR_DQS#1
DDR_DQS1

DDR_DQ14
DDR_DQ11

DDR_DQ0
DDR_DQ5

DDR_DQS#0
DDR_DQS0

DDR_DQ7
DDR_DQ2

DDR_DQ16
DDR_DQ20

DDR_DQS#2
DDR_DQS2

DDR_DQ23
DDR_DQ22

DDR_DQ25
DDR_DQ28

DDR_DM3

DDR_DQ31
DDR_DQ30

DDR_SCKE0

DDR_SMA17
DDR_SMA12

DDR_SMA9
DDR_SMA8

DDR_SMA5
DDR_SMA3
DDR_SMA1

DDR_SMA10
DDR_SMA15
DDR_SWE#

DDR_SCAS#
DDR_SCS#1

DDR_ODT2
DDR_DQ36

DDR_DQ32
DDR_DQS#4

DDR_DQS4
DDR_DQ39

DDR_DQ34
DDR_DQ41

DDR_DQ45
DDR_DM5
DDR_DQ42

DDR_DQ46
DDR_DQ53

DDR_DQ48

F

+1.8V +1.8V

+DDR_VREF1

Trace=20mil

JP1

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

C233 0.1U_0402_16V4Z

10U_0805_10V6K

1

2

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

P-TWO_A5692B-A0G16-P

C234

1

2

NC/CKE1

DIMMA

DQ12
DQ13

CK0#
DQ14

DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3
DQ30

DQ31

NC/A15
NC/A14

RAS#

ODT0

NC/A13

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5
DQ46

DQ47
DQ52

DQ53

CK1#

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7
DQ62

DQ63

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS

VSS
DM1
VSS
CK0

VSS

VSS

VSS

VSS
DM2

VSS

VSS

VSS

VSS

VSS
VDD

VDD

VDD

VDD
BA1

VDD

VDD
VSS

VSS
DM4
VSS

VSS

VSS

VSS

VSS

VSS
CK1

VSS
DM6
VSS

VSS

VSS

VSS

VSS
SAO
SA1

G

DDR_DQ[0..63]
DDR_DQS[0..7]
DDR_DQS#[0..7]
DDR_DM[0..7]

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90

A11

92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110

S0#

112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_DQ15
DDR_DQ12

DDR_DM1
DDR_DQ9

DDR_DQ13
DDR_DQ1

DDR_DQ4
DDR_DM0
EMC_DDR_CLK1

EMC_DDR_CLK1#
DDR_DQ3

DDR_DQ6

DDR_DQ17
DDR_DQ21

DDR_DM2
DDR_DQ19

DDR_DQ18
DDR_DQ29

DDR_DQ24
DDR_DQS#3

DDR_DQS3
DDR_DQ26

DDR_DQ27

DDR_SCKE1

DDR_SMA14
DDR_SMA11

DDR_SMA7
DDR_SMA6

DDR_SMA4
DDR_SMA2
DDR_SMA0

DDR_SMA16
DDR_SRAS#
DDR_SCS#0

DDR_ODT0
DDR_SMA13

DDR_DQ37
DDR_DQ33

DDR_DM4
DDR_DQ35

DDR_DQ38
DDR_DQ44

DDR_DQ40
DDR_DQS#5

DDR_DQS5
DDR_DQ47

DDR_DQ43
DDR_DQ49

DDR_DQ52
EMC_DDR_CLK0

EMC_DDR_CLK0#
DDR_DM6
DDR_DQ54

DDR_DQ51
DDR_DQ56

DDR_DQ61
DDR_DQS#7

DDR_DQS7
DDR_DQ63

DDR_DQ59

+3VS

DDR_SMA[0..17]

EMC_DDR_CLK1 (8)
EMC_DDR_CLK1# (8)

DDR_SCKE1 (8)

DDR_SRAS# (8,11)
DDR_SCS#0 (8)

DDR_ODT0 (8)

EMC_DDR_CLK0 (8)

EMC_DDR_CLK0# (8)

DDR_DQ[0..63] (8,11)
DDR_DQS[0..7] (8,11)
DDR_DQS#[0..7] (8,11)
DDR_DM[0..7] (8,11)

DDR_SMA[0..17] (8,11)

H

Reverse H9.2

2006/03/27

Security Classific a t i o n

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHE R THIS SHEE T NOR THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2005/11/01 2006/11/30

E

Compal Secret Data

Deciphered Date

Title

DDRII-SODIMM2

Size Document Number Rev

Custom

HCL51 LA-3211P

,

星期二 四

11, 2006

F

Date: Sheet

月

G

10 43

H

0.4

of

Compal Electronics, Inc.

A

B

C

D

E

+1.8V +1.8V

+DDR_VREF2

Trace=20mil

JP2

1

VREF

3

C253

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

PTI_A5652D-A0G16-P

DIMMB
Reverse H5.6

DDR_DQ8

DDR_DQ[0..63](8,10)

1 1

2 2

3 3

4 4

DDR_DQS[0..7](8,10)

DDR_DQS#[0..7](8,10)

DDR_DM[0..7](8,10)

DDR_SMA[0..17](8,10)

DDR_DQ[0..63]
DDR_DQS[0..7]
DDR_DQS#[0..7]
DDR_DM[0..7]
DDR_SMA[0..17]

DDR_SCKE2(8,10)

DDR_SWE#(8,10)

DDR_SCAS#(8,10)
DDR_SCS#3(8,10)

DDR_ODT3(8,10)

SB_SMDATA(10,12,14,25)
SB_SMCLK(10,12,14,25)

DDR_DQ10
DDR_DQS#1

DDR_DQS1
DDR_DQ14

DDR_DQ11
DDR_DQ0

DDR_DQ5
DDR_DQS#0

DDR_DQS0
DDR_DQ7 DDR_DQ3

DDR_DQ2 DDR_DQ6

DDR_DQ16
DDR_DQ20

DDR_DQS#2
DDR_DQS2 DDR_DM2

DDR_DQ23
DDR_DQ22

DDR_DQ25
DDR_DQ28

DDR_DM3

DDR_DQ31
DDR_DQ30

DDR_SCKE2

DDR_SMA17
DDR_SMA12

DDR_SMA9
DDR_SMA8

DDR_SMA5
DDR_SMA3
DDR_SMA1

DDR_SMA10
DDR_SMA15
DDR_SWE#

DDR_SCAS#
DDR_SCS#3

DDR_ODT3
DDR_DQ36

DDR_DQ32
DDR_DQS#4

DDR_DQS4
DDR_DQ39

DDR_DQ34
DDR_DQ41

DDR_DQ45
DDR_DM5
DDR_DQ42

DDR_DQ46
DDR_DQ53

DDR_DQ48

DDR_DQS#6
DDR_DQS6

DDR_DQ50
DDR_DQ55

DDR_DQ60
DDR_DQ57

DDR_DM7
DDR_DQ58

DDR_DQ62

+3VS

10U_0805_10V6K

0.1U_0402_16V4Z
C252

1

2

1

2

2006/03/27

A

B

VSS
DQ4
DQ5

VSS
DM0

VSS
DQ6
DQ7

VSS

DQ12
DQ13

VSS
DM1

VSS

CK0

CK0#

VSS

DQ14
DQ15

VSS

VSS

DQ20
DQ21

VSS
DM2

VSS

DQ22
DQ23

VSS

DQ28
DQ29

VSS

DQS3#

DQS3

VSS

DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD

BA1

RAS#

VDD

ODT0

NC/A13

VDD

VSS

DQ36
DQ37

VSS
DM4

VSS

DQ38
DQ39

VSS

DQ44
DQ45

VSS

DQS5#

DQS5

VSS

DQ46
DQ47

VSS

DQ52
DQ53

VSS

CK1

CK1#

VSS
DM6

VSS

DQ54
DQ55

VSS

DQ60
DQ61

VSS

DQS7#

DQS7

VSS

DQ62
DQ63

VSS
SAO

SA1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90

A11

92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110

S0#

112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_DQ15
DDR_DQ12

DDR_DM1
DDR_DQ9

DDR_DQ13
DDR_DQ1

DDR_DQ4
DDR_DM0
EMC_DDR_CLK4

EMC_DDR_CLK4#

DDR_DQ17
DDR_DQ21

DDR_DQ19
DDR_DQ18

DDR_DQ29
DDR_DQ24

DDR_DQS#3
DDR_DQS3

DDR_DQ26
DDR_DQ27

DDR_SCKE3

DDR_SMA14
DDR_SMA11

DDR_SMA7
DDR_SMA6

DDR_SMA4
DDR_SMA2
DDR_SMA0

DDR_SMA16
DDR_SRAS#
DDR_SCS#2

DDR_ODT1
DDR_SMA13

DDR_DQ37
DDR_DQ33

DDR_DM4
DDR_DQ35

DDR_DQ38
DDR_DQ44

DDR_DQ40
DDR_DQS#5

DDR_DQS5
DDR_DQ47

DDR_DQ43
DDR_DQ49

DDR_DQ52

EMC_DDR_CLK3
EMC_DDR_CLK3#

DDR_DM6
DDR_DQ54

DDR_DQ51
DDR_DQ56

DDR_DQ61
DDR_DQS#7

DDR_DQS7
DDR_DQ63

DDR_DQ59

EMC_DDR_CLK4 (8)
EMC_DDR_CLK4# (8)

DDR_SCKE3 (8,10)

DDR_SRAS# (8,10)
DDR_SCS#2 (8,10)

DDR_ODT1 (8,10)

EMC_DDR_CLK3 (8)
EMC_DDR_CLK3# (8)

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

+1.8V

C236

470U_D2_2.5VM

C237 0.1U_0402_16V4Z

1

2

C238 0.1U_0402_16V4Z

1

2

Compal Secret Data

1

+

2

2005/11/01 2006/11/30

Layout Note:
Place near JDIM1

C240 0.1U_0402_16V4Z

C239 0.1U_0402_16V4Z

1

1

2

2

1K_0402_1%

+DDR_VREF2

1K_0402_1%

Deciphered Date

R81

R82

C241 0.1U_0402_16V4Z

1

2

+1.8V

12

12

D

C242 0.1U_0402_16V4Z

1

2

C243 0.1U_0402_16V4Z

1

2

1

C250

0.1U_0402_16V4Z

2

1

C251

0.1U_0402_16V4Z

2

C246 0.1U_0402_16V4Z

C244 0.1U_0402_16V4Z

C245 0.1U_0402_16V4Z

1

1

2

2

Title

Size Document Number Rev

Custom

Date: Sheet

C247 0.1U_0402_16V4Z

1

1

2

2

C248 0.1U_0402_16V4Z

1

2

C249 0.1U_0402_16V4Z

1

2

Compal Electronics, Inc.

DDR-II SODIMM1

HCL51 LA-3211P

, 11, 2006

星期二 四月

E

of

11 43

0.4

A

1 1

+3VS

KC FBM-L11-201209-221LMAT_0805

+3VS

+3VS

2 2

Clock Generator

L11

1 2

L12

1 2

CHB1608U301_0603

L14

1 2

CHB1608U301_0603

4.7U_0805_10V4Z

CLK_EN#(42)

+CLK_VDD1

1 2

10K_0402_5%

+CLK_VDD1

C263

R104 0_0402_5%

R109

1

C254

10U_0805_10V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C260

10U_0805_10V4Z

2

0.1U_0402_16V4Z

1

2

@

12

13

D

2

G

S

2N7002_SOT23

0.1U_0402_16V4Z

1

C255

2

1

C261

2

1

C264

2

Q6

1

1

C256

2

2

0.1U_0402_16V4Z

1

C262

0.1U_0402_16V4Z

2

33P_0402_50V8J

33P_0402_50V8J

+CLK_VDD1
CPU_STP#(13)

0.1U_0402_16V4Z

1

C258

C257

2

R113 4.7K_0402_5%

2006/03/03

3 3

B

0.1U_0402_16V4Z

1

C259

2

+3VS

1 2

C267

12

C268

Y1

1 2

14.31818MHZ_20P_6X1430004201

12

2

C725
33P_0402_50V8J

1

1 2

L13 CHB1608U301_0603

2

2

C266

C265

1

1

10U_0805_10V4Z

EMC_XTALIN_CLK

EMC_XTALOUT_CLK

R1114.7K_0402_5% @

12

SB_SMCLK(10,11,14,25)

SB_SMDATA(10,11,14,25)

C

1- PLACE ALL THE SERIES TERMINATION RESISTORS
AS CLOSE TO CLOCK GEN AS POSSIBLE

2- ROUTE ALL CPUCLK/#, NBCLK/#, ITPCLK/#
AND SCR/# ,AS DIFFERENT PAIR RULE

3- PUT DECOUPLING CAPS CLOSE TO CLOCK GEN
POWER PIN

U4

12

R103
1M_0402_5%

@

0.1U_0402_16V4Z

12

R122
475_0402_1%

45

VDDCPU

51

VDDPCI

32

VDDATI

35

VDDSRC

14

VDDSRC

21

VDDSRC

3

VDD48

56

VDDREF

39

VDDA

44

GNDCPU

49

GNDPCI

31

GNDATI

36

GNDSRC

26

GNDSRC

20

GNDSRC

15

GNDSRC

5

GND

55

GND

38

GNDA

1

XIN

2

XOUT

6

VTT_PWRGD#/PD

48

CPU_STOP#

7

SCLK

37

IREF

ICS951413CGLFT_TSSOP56

ICS951413

CPUCLKT0

CPUCLKC0

CPUCLKT1

CPUCLKC1
CPUCLKT2_ITP
CPUCLKC2_ITP

SRCCLKT0

SRCCLKC0
ATIGCLKT0
ATIGCLKC0
ATIGCLKT1
ATIGCLKC1

SRCCLKT3
SRCCLKC3

SRCCLKT4
SRCCLKC4

SRCCLKT5
SRCCLKC5

SRCCLKT6
SRCCLKC6

SRCCLKT7
SRCCLKC7

CLKREQA#
CLKREQB#

CK410#/PCICLK0

USB_48MHZ

FS_B/REF1
FS_A/REF0SDATA

TEST_SEL/REF2

FS_C

47
46
43
42
41
40

34
33
30
29
27
28
24
25
22
23
18
19
16
17
12
13

10
11

50
4

9
53
548
52

CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1

SRCCLKT0
SRCCLKC0

SRCCLKT3
SRCCLKC3

SRCCLKT5
SRCCLKC5

48M_SB
FS_C

FS_B/REF1
FS_A/REF0
TEST_SEL/REF2

R87 33_0402_5%

1 2

R88 33_0402_5%

1 2

R89 33_0402_5%

1 2

R90 33_0402_5%

1 2

R91 33_0402_5%

1 2

R92 33_0402_5%

1 2

R93 33_0402_5%

1 2

R94 33_0402_5%

1 2

R95 33_0402_5%

1 2

R96 33_0402_5%

1 2

R105

12

10K_0402_5%

R108 4.7K_0402_5%

1 2

R110 4.7K_0402_5%

1 2

@

R112 33_0402_5%

1 2

R114 33_0402_5%

1 2

R116 33_0402_5%

1 2

R118 33_0402_5%

1 2

R120 33_0402_5%

1 2

D

R84

R83

1 2

1 2

49.9_0402_1%

CLK_PCIE_MINI1 (25)

R99 49.9_0402_1%

R102 49.9_0402_1%

@

CLK_PCIE_MINI1# (25)

1 2
1 2

R106 10K_0402_5%

+CLK_VDD1

R115 4.7K_0402_5%

1 2

R117 4.7K_0402_5%

1 2

R119 4.7K_0402_5%

1 2

R107 0_0402_5%

R85

49.9_0402_1%

E

R86

1 2

1 2

49.9_0402_1%

49.9_0402_1%

12

12

R100

R101

49.9_0402_1%

12

MINI_CLKREQ#

12

EMC_CLK_SB_14M (14)

EMC_CLK_NB_BCLK (8)
EMC_CLK_NB_BCLK# (8)
CLK_CPU_BCLK (4)
CLK_CPU_BCLK# (4)

12

12

R98

R97

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

+CLK_VDD1
+CLK_VDD1

MINI1_CLKREQ# (25)

CLK_48M_SB (14)
CLK_SD_48M (21)CLK_OK(14,15)
CPU_BSEL2 (5)
CPU_BSEL1 (5,8)
CPU_BSEL0 (5)

EMC_CLK_NB_14M (8)

CLK_14M_SIO (27)

CLK_SB_ALINK (13)
CLK_SB_ALINK# (13)

CLK_NB_ALINK (7)
CLK_NB_ALINK# (7)

FS_C FS_B FS_A CPU SRC PCI REF USB

10

0

4 4

A

B

1

133.33 100.00 33.33 14.318 48.000

1

00

166.66 100.00 33.33 14.318 48.000

11

100.00 33.33 14.318 48.000100.00

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/11/01 2006/11/30

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

ClockGen ICS 951413

Size Document Number Rev

Custom

HCL51 LA-3211P

, 11, 2006

星期二 四月

Date: Sheet

E

of

12 43

0.4

+3VS

5

1219 DEL

CLK_SB_ALINK(12)

CLK_SB_ALINK#(12)

C269 0.01U_0402_16V7K

8.2K_1206_8P4R_5%

D D

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

8.2K_1206_8P4R_5%

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

C C

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%

8.2K_1206_8P4R_5%

C283 470U_D2_2.5VM

B B

C284 10U_0805_10V4Z
C285 10U_0805_10V4Z
C286 0.1U_0402_16V4Z
C287 0.1U_0402_16V4Z
C288 0.1U_0402_16V4Z
C289 0.1U_0402_16V4Z
C290 0.1U_0402_16V4Z
C291 0.1U_0402_16V4Z
C292 0.1U_0402_16V4Z
C293 0.1U_0402_16V4Z
C294 0.1U_0402_16V4Z

RP10

RP11

RP12

RP13

RP14

RP15

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

45
36
27
18

LOCK#
PCI_DEVSEL#

PCI_REQ#1

45

PCI_PIRQF#

36

PCI_GNT#1

27

PCI_GNT#4

18

PCI_FRAME#
PCI_STOP#
PCI_GNT#3
PCI_TRDY#

PCI_GNT#0
PCI_REQ#2
PCI_PERR#

PCI_REQ#3

18

PCI_REQ#0

27

PCI_GNT#2

36

PCI_REQ#4

45

12

+

PCI_PIRQE#
PCI_IRDY#
PCI_PIRQG#
PCI_SERR#

PCI_PIRQH#

NB_A_RXP0(7)

NB_A_RXN0(7)

NB_A_RXP1(7)

NB_A_RXN1(7)

NB_A_RXP2(7)

NB_A_RXN2(7)

NB_A_RXP3(7)

NB_A_RXN3(7)

SB_A_RXP0(7)

SB_A_RXN0(7)

SB_A_RXP1(7)

SB_A_RXN1(7)

SB_A_RXP2(7)

SB_A_RXN2(7)

SB_A_RXP3(7)

SB_A_RXN3(7)

CHB2012U170_0805

15P_0402_50V8K

+PCIE_VDDR

L16

C278

1 2

1U_0402_6.3V4Z
C279

1 2

10U_0805_10V4Z
C280

1 2

0.1U_0402_10V6K

C297

+1.8VS

+1.8VS

L17
CHB2012U170_0805

1 2

Pull-high on CPU side

CPU_STP#(12)

CPU_STP#

1 2

C270 0.01U_0402_16V7K

1 2

C271 0.01U_0402_16V7K

1 2

C272 0.01U_0402_16V7K

1 2

C273 0.01U_0402_16V7K

1 2

C275 0.01U_0402_16V7K

1 2

C276 0.01U_0402_16V7K

1 2

C277 0.01U_0402_16V7K

1 2

12

+PCIE_VDDR

80mA

+PCIE_VDDR

2006/03/03

R155

1 2

20M_0603_5%

EMC_SB_32KH0

1

2

4

Y2

OUT

NC

3

32.768KHZ_12.5P_1TJS125DJ2A073

H_PWRGOOD(4)

H_INTR(4)

H_NMI(4)
H_INIT#(4)
H_SMI#(4)

H_IGNNE#(4)

H_A20M#(4)

H_FERR#(4)

H_STPCLK#(4)

DPRSLPVR(4,42)

H_RESET#(4,7)

PCIE_PVDD

50mil trace width

EMC_SB_32KHI

1

IN

NC

2

EMC_SB_32KH0

2006/03/03

+3VALW

0.1U_0402_16V4Z

C726

147

PG

12 13

OI

1 2

U35F
SN74LVC14APWLE_TSSOP14

1

C274

2

5

2N7002_SOT23

H_DPSLP#

Q42

13

D

2

G

S

A A

H_DPSLP#(4,14)

R123

8.2K_0402_5%

1 2

A_RST#

SB_A_TXP0
SB_A_TXN0
SB_A_TXP1
SB_A_TXN1
SB_A_TXP2
SB_A_TXN2
SB_A_TXP3
SB_A_TXN3

SB_A_RXP0
SB_A_RXN0
SB_A_RXP1
SB_A_RXN1
SB_A_RXP2
SB_A_RXN2
SB_A_RXP3
SB_A_RXN3

150_0402_1%
R134
R135

150_0402_1%
R137

1 2

4.12K_0402_1%

1

15P_0402_50V8K

C298

2

EMC_SB_32KHI

H_PWRGD

H_A20M#

1 2

R148 0_0402_5%

1 2

R154 0_0402_5%

1 2

D36

2 1

330P_0402_50V7K

CH751H-40_SC76

4

12
12

R158

20M_0603_5%

1 2

@

215K_0603_1%
R503

4

U5A

AG10

A_RST#

J24

PCIE_RCLKP

J25

PCIE_RCLKN

P29

PCIE_TX0P

P28

PCIE_TX0N

M29

PCIE_TX1P

M28

PCIE_TX1N

K29

PCIE_TX2P

K28

PCIE_TX2N

H29

PCIE_TX3P

H28

PCIE_TX3N

T25

PCIE_RX0P

T26

PCIE_RX0N

T22

PCIE_RX1P

T23

PCIE_RX1N

M25

PCIE_RX2P

M26

PCIE_RX2N

M22

PCIE_RX3P

M23

PCIE_RX3N

E29

PCIE_CALRP

E28

PCIE_CALRN

E27

PCIE_CALI

U29

PCIE_PVDD

U28

NC

F27

PCIE_VDDR_1

F28

PCIE_VDDR_2

F29

PCIE_VDDR_3

G26

PCIE_VDDR_4

G27

PCIE_VDDR_5

G28

PCIE_VDDR_6

G29

PCIE_VDDR_7

J27

PCIE_VDDR_8

J29

PCIE_VDDR_9

L25

PCIE_VDDR_10

L26

PCIE_VDDR_11

L29

PCIE_VDDR_12

N29

PCIE_VDDR_13

D2

X1

C1

X2

AC26

CPU_PG

W26

INTR/LINT0

W24

NMI/LINT1

W25

INIT#

AA24

SMI#

AA23

NC

AA22

IGNNE#

AA26

A20M#

Y27

FERR#

AA25

STPCLK#/ALLOW_LDTSTP

AH9

CPU_STP#/DPSLP_3V#

B24

NC

W23

DPRSLPVR

AC25

LDT_RST#/DPRSTP#/PROCHOT#

218S4RASA11GS SB460_BGA549

CPU_STP#

SB460

Part 1 of 4

PCI EXPRESS INTERFACE

REQ4#/PLL_BP33/PDMA_REQ1#

GNT3#/PLL_BP66/PDMA_GNT0#
GNT4#/PLL_BP50/PDMA_GNT1#

XTAL

CPU

NB_RST#(8)

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6

PCI CLKS

SPDIF_OUT/GPIO41

PCIRST#

AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11

AD8/ROMA9

AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7

AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBE0#/ROMA10

CBE1#/ROMA1

CBE2#/ROMWE#

CBE3#

FRAME#

DEVSEL#/ROMA0

PCI INTERFACE

REQ3#/PDMA_REQ0#

LPC

RTC_IRQ#/ACPWR_STRAP

RTC

TRDY#/ROMOE#

PAR/ROMA19

INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36

+3VS

4

Y

IRDY#

STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#

GNT0#
GNT1#
GNT2#

CLKRUN#

LOCK#

LAD0
LAD1
LAD2
LAD3

LFRAME#

LDRQ0#
LDRQ1#

BMREQ#

SERIRQ

RTCCLK

VBAT

RTC_GND

TC7SH08FU_SSOP5

53

PG

B
A

3

PCI_AD[0..31](17,21,23,25,31)

U2

PCI_CLK1_R

T2

PCI_CLK2_R CLK_PCI_LAN

U1

PCI_CLK3_R

V2

PCI_CLK4_R

W3

PCI_CLK5_R CLK_PCI_LPC

U3

PCI_CLK6_R

V1

SPDIF_OUT

T1

PCI_PLTRST#

AJ9

PCI_AD0

W7

PCI_AD1

Y1

PCI_AD2

W8

PCI_AD3

W5

PCI_AD4

AA5

PCI_AD5

Y3

PCI_AD6

AA6

PCI_AD7

AC5

PCI_AD8

AA7

PCI_AD9

AC3

PCI_AD10

AC7

PCI_AD11

AJ7

PCI_AD12

AD4

PCI_AD13

AB11

PCI_AD14

AE6

PCI_AD15

AC9

PCI_AD16

AA3

PCI_AD17

AJ4

PCI_AD18

AB1

PCI_AD19

AH4

PCI_AD20

AB2

PCI_AD21

AJ3

PCI_AD22

AB3

PCI_AD23

AH3

PCI_AD24

AC1

PCI_AD25

AH2

PCI_AD26

AC2

PCI_AD27

AH1

PCI_AD28

AD2

PCI_AD29

AG2

PCI_AD30

AD1

PCI_AD31

AG1
AB9
AF9
AJ5
AG3

PCI_FRAME#

AA2

PCI_DEVSEL#

AH6

PCI_IRDY#

AG5

PCI_TRDY#

AA1

PCI_PAR

AF7

PCI_STOP#

Y2

PCI_PERR#

AG8

PCI_SERR#

AC11

PCI_REQ#0

AJ8

PCI_REQ#1

AE2

PCI_REQ#2

AG9

PCI_REQ#3

AH8

PCI_REQ#4

AH5

PCI_GNT#0

AD11

PCI_GNT#1

AF2

PCI_GNT#2

AH7

PCI_GNT#3

AB12

PCI_GNT#4

AG4

PM_CLKRUN#

AG7

LOCK#

AF6

PCI_PIRQE#

AD3

PCI_PIRQF#

AF1

PCI_PIRQG#

AF4

PCI_PIRQH#

AF3

LPC_AD0

AG24

LPC_AD1

AG25

LPC_AD2

AH24

LPC_AD3

AH25

LPC_FRAME#

AF24

LPC_DRQ0#

AJ24

LPC_DRQ1#

AH26
W22

SERIRQ

AF23

RTC_CLK

D3
F5

E1

+SB_VBAT

D1

R124 22_0402_5%@

1 2

R125 22_0402_5%@

1 2

R127 22_0402_5%

1 2

R128 22_0402_5%@

1 2

R130 22_0402_5%@

1 2

R126 22_0402_5%@

1 2

R129 22_0402_5%@

1 2

R132

1 2

8.2K_0402_5%

SS_DECT(14)

C281

1U_0402_6.3V4Z

PCI_CBE#0 (21,23,25,31)
PCI_CBE#1 (21,23,25,31)
PCI_CBE#2 (21,23,25,31)
PCI_CBE#3 (21,23,25,31)
PCI_FRAME# (21,23,25,31)
PCI_DEVSEL# (21,23,25)
PCI_IRDY# (21,23,25)
PCI_TRDY# (21,23,25,31)
PCI_PAR (21,23,25)
PCI_STOP# (21,23,25)
PCI_PERR# (21,23,25)
PCI_SERR# (21,23,25)

PCI_REQ#1 (23)
PCI_REQ#2 (21)
PCI_REQ#3 (25)

PCI_GNT#1 (23)
PCI_GNT#2 (21)
PCI_GNT#3 (25)

PM_CLKRUN# (23,25,27)

LPC_AD0 (27,28)
LPC_AD1 (27,28)
LPC_AD2 (27,28)
LPC_AD3 (27,28)
LPC_FRAME# (17,27,28)

LPC_DRQ0# (27)

BM_REQ# (8)

SERIRQ (21,27,28)

RTC_CLK (17)

AUTO_ON# (17)

Consider

--connect
RTC_CLK

U37

1
2

to EC

A_RST#

PCI_AD[0..31]

12

1 2

10K_0402_5%

FBM-L11-160808-800LMT_0603

1

2

PCI_PIRQE#(21)
PCI_PIRQF#(25)
PCI_PIRQG#(23)
PCI_PIRQH#(21,25)

CLK_PCI_MINIPCI_CLK0_R
CLK_PCI_CB

CLK_PCI3
CLK_PCI_DB

CLK_PCI_SIO

SPDIF_OUT (17)

L15

PCI_CLK3_R
SS_VDD

R141

10K_0402_5%

R145

@

2

+3VS+3VS

12

R133
10K_0402_5%

8
1
3

13

9
4
5

12

12

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

Close to SB
PIN A2

Layout Note:

1. Under BATT1 battery Body, no Trace and Via

2. BATT1 + - PIN keep out 80mil from other
component ,trace and via

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/11/01 2006/11/30

Compal Secret Data

Deciphered Date

2

CLK_PCI_MINI (25)
CLK_PCI_CB (21)
CLK_PCI_LAN (23)

CLK_PCI_DB (31)

CLK_PCI_LPC (28)

CLK_PCI_SIO (27)

EMI 11/15 Modify

U6

DLY CNTRL
CLKIN
VDD
VDD
SSON
SS%
GND
GND

ASM3P623S00EF-16-TR_TSSOP16

+SB_VBAT

C295

1

2

2

CLKOUT1

6

CLKOUT2

7

CLKOUT3

10

CLKOUT4

11

CLKOUT5

14

CLKOUT6

15

CLKOUT7

16

CLKOUT8

Place JOPEN1 close
to DDR-SODIMM

470_0603_5%
R156

1 2

W=20mils

1U_0402_6.3V4Z

1

PCI_CLK0_R
PCI_CLK1_R

PCI_CLK2_R
PCI_CLK3_R
PCI_CLK4_R
PCI_CLK5_R
PCI_CLK6_R

PCI_CLK0_R (17)

PCI_CLK1_R (17)

PCI_CLK2_R (17)
PCI_CLK3_R (17)
PCI_CLK4_R (17)
PCI_CLK5_R (17)

PCI_CLK6_R (17)

2006/03/09

CKO1 CLK_PCI_MINI

R136 39_0402_5%

1 2

CKO2

R138 39_0402_5%

1 2

CKO3

R139 39_0402_5%

1 2

CKO4

R140 39_0402_5%@

1 2

CKO5

R142 39_0402_5%

1 2

CKO6

R143 39_0402_5%

1 2

CKO7

R144 39_0402_5%

1 2

+3VS

C282

53

PCI_PLTRST#

R146 0_0402_5%

PCI_PAR

LPC_DRQ0#
SERIRQ

LPC_DRQ1#

10K_1206_8P4R_5%

LPC_AD2
LPC_AD0
LPC_AD3
LPC_AD1

PM_CLKRUN#

RTC Battery

-

+VBAT_JOP

12

JOPEN1

12

JUMP_43X39@

No short

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

U7

1

PG

B

2

A

12

R147

8.2K_0402_5%

1 2

RP16

4 5
3 6
2 7
1 8

RP17

1 2

R152 4.7K_0402_5%

BATT1

RTCBATT45@

+RTCVCC

470_0603_5%
R157

1 2

PCI_EXP/LPC/RTC

HCL51 LA-3211P 0.4

, 11, 2006

星期二 四月

0.1U_0402_16V4Z

1 2

4

Y

TC7SH08FU_SSOP5@

45
36
27
18

100K_1206_8P4R_5%

+

+RTCBATT

12

3

1

C296

0.1U_0402_16V4Z

2

CLK_PCI_CB
CLK_PCI3
CLK_PCI_LAN
CLK_PCI_LPC
CLK_PCI_DB
CLK_PCI_SIO

PCI_RST# (15,21,23,25,27,28,31)

+3VS

+RTCBATT

D3

1

BAS40-04_SOT23

2

+CHGRTC

1

13 43

of

+3VALW

D D

R169 4.7K_0402_5%
R170 10K_0402_5%
R171 4.7K_0402_5%

+3VS

R173 10K_0402_5%
R175 10K_0402_5%
R176 10K_0402_5%
R177 10K_0402_5%

+3VS

C C

AZ_BITCLK_HD(32)
AZ_SYNC_HD(32)
AZ_SDOUT_HD(32)
AZ_RST_HD#(32)

AZ_BITCLK_MDC(30)
AZ_SYNC_MDC(30)
AZ_SDOUT_MDC(30)

AZ_RST_MDC#(30)

B B

+3VALW

@

0_0603_5%

R191

1 2
1

C313

@

0.1U_0402_10V6K

A A

2

5

RP18

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

RP19

1 8
2 7
3 6
4 5

4.7K_1206_8P4R_5%

1 2
1 2
1 2

1 2
1 2
1 2
1 2

R178 2.2K_0402_5%

1 2

R179 2.2K_0402_5%

1 2

10K_1206_8P4R_5%

4 5
3 6
2 7
1 8

RP28

RP21

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

10K_1206_8P4R_5%

4 5
3 6
2 7
1 8

RP22

12

R192

10K_0402_5%

@

R161

1 2

10K_0402_5%

SB_FANOUT0
SB_GPIO31
SB_GPIO13
SB_GPIO14

SS_DECT (13)

SBGPIO40
AZ_BITCLK
SBGPIO44

AZ_SDIN0_MDC

GPIO_M
LDT_PG
AZ_RST
AGP_STP#

R181 33_0402_5%
R183 33_0402_5%
R182 33_0402_5%
R184 33_0402_5%

R185 33_0402_5%
R187 33_0402_5%
R186 33_0402_5%
R188 33_0402_5%

GPIO_M
AZ_RST

X1 48MHZ_4P_FN4800002

4

OUT

VDD

1

GND

OE

@

5

EC_PME#
EC_THERM#
MASTER_RST#
PBTN_OUT#

GPM6#

PCIE_PME#
PM_SLP_S5#
EC_FLASH#
EXTEVENT0#

EC_SWI#
PM_SLP_S3#
MAINPWON_R

AGP_BUSY#
SIO_SMI#
SB_GA20
SB_KBRST#
SB_SMCLK
SB_SMDATA

1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2

+3VALW

53

1

PG

B

2

A

@

3

2

2006/02/07

1

C712

0.1U_0402_10V6K@

2

U32

AZ_RST_MDC#

4

Y

TC7SH08FU_SSOP5

EMC_OSCLIN

MINI_WAKE#(25)

AZ_SDIN3_HD(32)

AZ_SDIN0_MDC(30)

AZ_BITCLK
AZ_SYNC
AZ_SDOUT
AZ_RST

NB_SUS_STAT#(8,29)

EMC_CLK_SB_14M(12)

ACIN(28,36)

2006/01/23

AC_SDOUT(17)

H_DPSLP#(4,13)

4

EC_SWI#(28)

PM_SLP_S3#(28)
PM_SLP_S5#(28)

PBTN_OUT#(28)

SB_PWRGD(15)

H_PROCHOT#(4,42)

12

R1720_0402_5%

EC_RSMRST#(28)

R174

12

0_0402_5%

SB_INT_FLASH_SEL(29)

SIDERST#(15)

CLK_OK(12,15)

SB_SPKR(32)

SB_SMCLK(10,11,12,25)

SB_SMDATA(10,11,12,25)

D35

ACIN SB_GPIO9

@

CH751H-40_SC76

EC_SMI#(28)

EC_LID_OUT#(28)

USB_OC2#(26)
EC_FLASH#(29)

EC_SCI#(28)

R488 10K_0402_5%

1 2

AC_SDOUT

AZ_SDIN3_HD

AZ_SDIN0_MDC

R189 0_0402_5%

2006/03/06

R149

EC_THERM#(28)

H_CPUSLP#(4)

MAINPWON_R

4

EC_SWI#
EXTEVENT0#
PM_SLP_S3#
PM_SLP_S5#

PBTN_OUT#

1 2

R166 0_0402_5%

R167 10K_0402_5%

1 2

R168 10K_0402_5%

1 2

SB_GA20
SB_KBRST#
EC_PME#
SIO_SMI#

MASTER_RST#
PCIE_PME#
GPM6#
MAINPWON_R

EC_RSMRST#

SB_14M

1

C299
15P_0402_50V8D@

2

SB_INT_FLASH_SEL

AGP_STP#
AGP_BUSY#
SPKR
SB_SMCLK
SB_SMDATA

21

GPIO_M
LDT_PG

EC_SMI#

USB_OC6#

AZ_RST

USB_OC4#

EC_LID_OUT#

USB_OC2#
EC_FLASH#

EC_SCI#

AZ_BITCLK

AZ_SDOUT
AZ_SYNC

R486

AC_BITCLK

1 2

10K_0402_5%

1 2

0_0402_5%@

1 2

SBGPIO44
SBGPIO40

AC_RST

1 2

R487 10K_0402_5%

SB_FANOUT0
SB_GPIO31
SB_GPIO13

SB_GPIO14

EC_THERM#

SB_GA20

SB_KBRST#

CH751H-40_SC76

2 1

D6

2 1

1 2

2 1

3

2005/12/22

U5D

Part 4 of 4

USB_RCOMP
USB_ATEST1

USB_ATEST0

USB_HSDP7+
USB_HSDM7-

USB_HSDP6+
USB_HSDM6-

USB_HSDP5+
USB_HSDM5-

USB_HSDP4+

USB INTERFACE

USB_HSDM4­USB_HSDP3+

USB_HSDM3­USB_HSDP2+

USB_HSDM2­USB_HSDP1+

USB_HSDM1­USB_HSDP0+

USB_HSDM0-

AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3

AVDDTX_4
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4

AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8

AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12

USB PWR

AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21

AVSS_USB_23
AVSS_USB_24
AVSS_USB_25
AVSS_USB_26
AVSS_USB_27
AVSS_USB_28
AVSS_USB_29
AVSS_USB_30
AVSS_USB_31
AVSS_USB_32
AVSS_USB_33

2005/11/01 2006/11/30

OSC / RST

GATEA20

EC_KBRST#

SB460

ACPI / WAKE UP EVENTS

GPIO

USB OC

AC97 AZALIA

EC_GA20 (28)

EC_KBRST# (28)

MAINPWON (4,36,37,39)

A3

PCI_PME#/GEVENT4#

B2

RI#/EXTEVNT0#

F7

SLP_S3#

A5

SLP_S5#

E3

PWR_BTN#

B5

PWR_GOOD

B3

SUS_STAT#

F9

NC

E9

TEST1

G9

TEST0

AF26

GA20IN

AG26

KBRST#

D7

LPC_PME#/GEVENT3#

C25

LPC_SMI#/EXTEVNT1#

D9

S3_STATE/GEVENT5#

F4

SYS_RESET#/GPM7#

E7

WAKE#/GEVENT8#

C2

BLINK/GPM6#

G7

SMBALERT#/THRMTRIP#/GEVENT2#

E2

RSMRST#

B23

14M_OSC

C28

NC

A26

ROM_CS#/GPIO1

B29

GHI#/GPIO6

A23

VGATE/GPIO7

B27

GPIO4

D23

GPIO5

B26

SPKR/GPIO2

C27

SCL0/GPOC0#

B28

SDA0/GPOC1#

C3

NC

F3

NC

D26

DDC1_SCL/GPIO9

C26

DDC1_SDA/GPIO8

A27

LDT_PG/SSMUXSEL/GPIO0

A4

NC

C6

NC

C5

NC

C4

USB_OC7#/GEVENT7#

B4

USB_OC6#/GEVENT6#

B6

USB_OC5#/AZ_RST#/GPM5#

A6

USB_OC4#/GPM4#

C8

USB_OC3#/GPM3#

C7

USB_OC2#/FANOUT1/LLB#/GPM2#

B8

USB_OC1#/GPM1#

A8

USB_OC0#/GPM0#

N2

AZ_BITCLK

M2

AZ_SDOUT

K2

NC

L3

AZ_SYNC

K3

NC

L1

AC_BITCLK/GPIO38

L2

AC_SDOUT/GPIO39

L4

ACZ_SDIN0/GPIO42

J2

ACZ_SDIN1/GPIO43

J4

ACZ_SDIN2/GPIO44

M3

AC_SYNC/GPIO40

L5

AC_RST#/GPIO45

E23

FANOUT0/GPIO3

AC21

GPIO31

AD7

GPIO13

AE7

DPSLP_OD#/GPIO37

AA4 F19

GPIO14 AVSS_USB_22

T4

TALERT#/GPIO10

D4

SLP#/LDT_STP#

AB19

NC

218S4RASA11GS SB460_BGA549

D4

CH751H-40_SC76@

R190 0_0402_5%

CH751H-40_SC76@

D5

1 2

R194 0_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

A17

USBCLK

AVDDC
AVSSC

USB_RCOMP

A14
A11

A10
H12

NC

G12

NC

E12

NC

D12

NC

E14
D14

G14
H14

D16
E16

D18
E18

G16
H16

G18
H18

D19
E19

G19
H19

B9
B11
B13
B16
B18
A9
B10
B12
B14
B17

A12
A13
A16

C9
C10
C11
C12
C13
C14
C16
C17
C18
C19
C20
D11
D21
E11
E21
F11
F12
F14
F16
F18

F21
G11
G21
H11
H21
J11
J12
J14
J16
J18
J19

Compal Secret Data

Deciphered Date

2

@

R163

CLK_48M_SB
EMC_OSCLIN

1 2

10.7K_0402_1%

2006/03/27

1 2

R159 0_0402_5%

1 2

R160 0_0402_5%

Only for HCL51
default value is 11.8K

USBP6+
USBP6-

USBP4+
USBP4-

USBP2+
USBP2-

USBP1+
USBP1-

USBP0+
USBP0-

+AVDDTX

+AVDDRX

+AVDDC

USBP6+ (30)

USBP6- (30)

USBP4+ (30)

USBP4- (30)

USBP2+ (25)
USBP2- (25)

USBP1+ (30)

USBP1- (30)

USBP0+ (26)

USBP0- (26)

+AVDDTX

+AVDDRX

+AVDDC

Control by EC
Delay 50ms
after +3VALW
ready

2

1

CLK_48M_SB (12)

EC_SCI#
EC_LID_OUT#

L18 FBM-10-201209-260-T_0805

C300 10U_0805_10V4Z
C301 1U_0402_6.3V4Z
C302 0.1U_0402_16V4Z

C303 0.1U_0402_16V4Z
C304 0.1U_0402_16V4Z

L19 FBM-10-201209-260-T_0805

C305 10U_0805_10V4Z
C306 1U_0402_6.3V4Z
C307 0.1U_0402_16V4Z

C308 0.1U_0402_16V4Z
C309 0.1U_0402_16V4Z

C310 10U_0805_10V4Z
C311 1U_0402_6.3V4Z
C312 0.1U_0402_16V4Z

R164 10K_0402_5%

1 2

R165 10K_0402_5%

1 2

10K_1206_8P4R_5%

EC_SMI#
USB_OC6#
USB_OC2#
USB_OC4#

1 2

1 2
1 2
1 2

1 2
1 2

1 2

1 2
1 2
1 2

1 2
1 2

L20 FBM-10-201209-260-T_0805

1 2
1 2
1 2
1 2

EC_RSMRST#(28)

Compal Electronics, Inc.

Title

SB450 USB/ACPI/AC97/GPIO

Size Document Number Rev

Custom

Date: Sheet

HCL51 LA-3211P

, 11, 2006

星期二 四月

RP20

+3VALW

45
36
27
18

+3VALW

EC_RSMRST#

12

R193
47K_0402_5%

1

14 43

0.4

of

5

Place closely SATA CONN.

+5VS

10U_0805_10V4Z

1

C317

2

D D

+3V_SATA

0.1U_0402_16V4Z

10U_0805_10V4Z@

1

C322

2

0.1U_0402_16V4Z@

0.1U_0402_16V4Z

1

C318

2

1

C323

2

1

C319

2

0.1U_0402_16V4Z@

1

C324

2

1

C320

2

0.1U_0402_16V4Z

1

C325

2

0.1U_0402_16V4Z@

SATA HDD CONNECTOR

+PLLVDD_SATA+1.8VS

CHB1608U301_0603

C C

B B

L21

0.1U_0402_16V4Z

C329

12

PCI_RST#(13,21,23,25,27,28,31)
SIDERST#(14)

1

2

1U_0402_6.3V4Z

1

C330

2

1
2

+3VALW

B
A

1

C331

10U_0805_10V4Z

2

0.1U_0402_16V4Z

C342

1 2

53

U34

PG

4

Y

TC7SH08FU_SSOP5

CHB1608U301_0603

0.1U_0402_16V4Z

IDE_RESET# (20)

NB & SB POWER GOOD

+3VS

12

+3VALW +3VALW +3VALW

OI

43

2006/01/23

R475

332K_0402_1%

1 2

C715

0.1U_0402_10V6K

CLK_OK

R474

10K_0402_5%

VGATE(42)

R478

1M_0402_5%

A A

147

PG

OI

12

U35A

SN74LVC14APWLE_TSSOP14

SN74LVC14APWLE_TSSOP14

147

21

PG

U35B

4

OCTEK_SAT-22SG1G_NR

L22

12

1

C332

2

1

2

CLK_OK (12,14)

JP3

GND

HTX+

HTX­GND

HRX-

HRX+

GND

VCC3.3
VCC3.3
VCC3.3

GND
GND

GND
VCC5
VCC5
VCC5

GND

RESERVED

GND

VCC12
VCC12
VCC12

SATA@

1U_0402_6.3V4Z

1

2

+3VALW

147

PG

65

OI

U35C

TO SB & CLK_GEN

1

SATA_TX0+_C

2

SATA_TX0-_C

3
4

SATA_RX0-_C

5

SATA_RX0+_C

6
7

+3V_SATA

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

+XTLVDD_SATA+1.8VS

C333

CHB1608U301_0603

SN74LVC14APWLE_TSSOP14

100 mil

1

C334

10U_0805_10V4Z

2

L23

0.1U_0402_16V4Z

+3VALW

SN74LVC14APWLE_TSSOP14

147

PG

89

OI

U35D

J1

12

JUMP_43X118

+5VS

12

1

C335

2

0.1U_0402_16V4Z

+3VS

1 2

R476 0_0402_5%

12

+3VS

R196 10M_0402_5%SATA@

27P_0402_50V8J

SATA@

C327

0.1U_0402_16V4Z

1

C336

2

12

R197
10K_0402_5%

SATA_LED#

CLK_OK

2006/03/27

R477

1 2

332K_0402_5%

0.47U_0603_16V4Z

3

C314 0.01U_0402_16V7KSATA@

1 2

C315 0.01U_0402_16V7KSATA@

1 2

C316 0.01U_0402_16V7KSATA@

1 2

C321 0.01U_0402_16V7KSATA@

1 2

SATA_TX0+
SATA_TX0­SATA_RX0­SATA_RX0+

Place SATA CAP & RES very close to SB

1

2

SATA_LED#

+1.8_SATA+1.8VS

12

1

2

1 2

0_0402_5%
R505

R195
1K_0402_1%

SATA@

Y3

1 2

2

25MHZ_20P

SATA@

1

1

C337

2

0.1U_0402_16V4Z

+3VALW

12

A

13

B

147

0.01U_0402_16V7K

EMC_SATA_X1
EMC_SATA_X2

12

1

C328
27P_0402_50V8J

2

SATA@

1U_0402_6.3V4Z

1

1

C338

2

U3D

PG

O

SN74LVC08APW_TSSOP14

1

C716

2

U35E

C339

2

11

C326

@

SATA_LED#(28)

+PLLVDD_SATA

+XTLVDD_SATA

1

C340

C341

2

10U_0805_10V4Z

1U_0402_6.3V4Z

NB_PWRGD (8)

2006/03/06

+3VALW

147

SN74LVC14APWLE_TSSOP14

PG

1011

OI

+3VALW

2

G

SB_PWRGD# (8)

2

U5B

AH21

SATA_TX0+

AJ21

SATA_TX0-

AH20

SATA_RX0-

AJ20

SATA_RX0+

AH18

SATA_TX1+

AJ18

SATA_TX1-

AH17

SATA_RX1-

AJ17

SATA_RX1+

AH13

SATA_TX2+

AH14

SATA_TX2-

AH16

SATA_RX2-

AJ16

SATA_RX2+

AJ11

SATA_TX3+

AH11

SATA_TX3-

AH12

SATA_RX3-

AJ13

SATA_RX3+

AF12

SATA_CAL

AD16

SATA_X1

AD18

SATA_X2

AC12

SATA_ACT#

AD14

PLLVDD_SATA_1

AJ10

PLLVDD_SATA_2

AC16

XTLVDD_SATA

AE14

AVDD_SATA_1

AE16

AVDD_SATA_2

AE18

AVDD_SATA_3

AE19

AVDD_SATA_4

AF19

AVDD_SATA_5

AF21

AVDD_SATA_6

AG22

AVDD_SATA_7

AG23

AVDD_SATA_8

AH22

AVDD_SATA_9

AH23

AVDD_SATA_10

AJ12

AVDD_SATA_11

AJ14

AVDD_SATA_12

AJ19

AVDD_SATA_13

AJ22

AVDD_SATA_14

AJ23

AVDD_SATA_15

AB14

AVSS_SATA_1

AB16

AVSS_SATA_2

AB18

AVSS_SATA_3

AC14

AVSS_SATA_4

AC18

AVSS_SATA_5

AC19

AVSS_SATA_6

AD12

AVSS_SATA_7

AD19

AVSS_SATA_8

AD21

AVSS_SATA_9

AE12

AVSS_SATA_10

AE21

AVSS_SATA_11

AF11

AVSS_SATA_12

AF14

AVSS_SATA_13

AF16

AVSS_SATA_14

AF18

AVSS_SATA_15

AG11

AVSS_SATA_16

AG12

AVSS_SATA_17

AG13

AVSS_SATA_18

AG14

AVSS_SATA_19

AG16

AVSS_SATA_20

AG17

AVSS_SATA_21

AG18

AVSS_SATA_22

AG19

AVSS_SATA_23

AG20

AVSS_SATA_24

AG21

AVSS_SATA_25

AH10

AVSS_SATA_26

AH19

AVSS_SATA_27

218S4RASA11GS SB460_BGA549

R504
10K_0402_5%

1 2
13

D

CLK_OK

Q43

S

2N7002_SOT23

C714 0.1U_0402_16V4Z

147

U3C

9

PG

A

O

10

B

SN74LVC08APW_TSSOP14

SB460

Part 2 of 4

SERIAL ATA

SERIAL ATA POWER

8

R479

ATA 66/100

SPI ROMHW MONITOR

0_0402_5%

12

@

PIDE_IORDY

PIDE_DACK#

PIDE_DRQ

PIDE_IOR#
PIDE_IOW#
PIDE_CS1#
PIDE_CS3#

R480

0_0402_5%

PIDE_IRQ

PIDE_A0
PIDE_A1
PIDE_A2

PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4
PIDE_D5
PIDE_D6
PIDE_D7
PIDE_D8

PIDE_D9
PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15

12

NC
NC
NC
NC
NC

NC
NC

NC
NC
NC

NC
NC
NC

NC
NC
NC
NC
NC

NC
NC
NC
NC
NC
NC
NC
NC

NC
NC

PIDE_DA[0..2](20)
PIDE_DD[0..15](20)

AB29
AA28
AA29
AB27
Y28
AB28
AC27
AC29
AC28
W28
W27

AD28
AD26
AE29
AF27
AG29
AH28
AJ28
AJ27
AH27
AG27
AG28
AF28
AF29
AE28
AD25
AD29

J3
J6
G3
G2
G6

C23
G5

M4
T3
V4

N3
P2
W4

P5
P7
P8
T8
T7

V5
L7
M8
V6
M6
P4
M7
V7

N1
M1

SB_PWRGD (14)

1

PIDE_DA0
PIDE_DA1
PIDE_DA2

PIDE_DD0
PIDE_DD1
PIDE_DD2
PIDE_DD3
PIDE_DD4
PIDE_DD5
PIDE_DD6
PIDE_DD7
PIDE_DD8
PIDE_DD9
PIDE_DD10
PIDE_DD11
PIDE_DD12
PIDE_DD13
PIDE_DD14
PIDE_DD15

EC_PWROK (28)

PIDE_DA[0..2]
PIDE_DD[0..15]

PIDE_DIORDY (20)

PIDE_INTRQ# (20)

PIDE_DMACK# (17,20)
PIDE_DREQ (20)
PIDE_DIOR# (20)
PIDE_DIOW# (20)
PIDE_CS1# (20)
PIDE_CS3# (20)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/11/01 2006/11/30

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

SB450 IDE/SATA

Size Document Number Rev

Custom

HCL51 LA-3211P

, 11, 2006

星期二 四月

2

Date: Sheet

1

15 43

0.4

of

+3VS +1.8VS

D32

12

1N4148_SOT23

D33

1N4148_SOT23

12

D34

12

1N4148_SOT23

2005/12/21

+3VS +1.8VALW

1

22U_0805_6.3V6M

C381

2

+3VS

+5VS

R204 1K_0402_5%

D7 CH751H-40_SC76

2 1

1 2

1

C382

2

22U_0805_6.3V6M

C408

1U_0603_10V4Z

C398 1U_0402_6.3V4Z

1 2

C399 1U_0402_6.3V4Z

1 2

C400 0.1U_0402_16V4Z

1 2

C401 0.1U_0402_16V4Z

1 2

C402 0.1U_0402_16V4Z

1 2

C403 0.1U_0402_16V4Z

1 2

C404 0.1U_0402_16V4Z

1 2

C405 0.1U_0402_16V4Z

1 2

C407 0.1U_0402_16V4Z

1 2

+V5_VREF

2

2

C409

1

1

0.1U_0402_16V4Z

C348 1U_0402_6.3V4Z

1 2

C349 1U_0402_6.3V4Z

1 2

C350 1U_0402_6.3V4Z

1 2

C351 1U_0402_6.3V4Z

1 2

C352 0.1U_0402_16V4Z

1 2

C353 0.1U_0402_16V4Z

1 2

C354 0.1U_0402_16V4Z

1 2

C355 0.1U_0402_16V4Z

1 2

C356 0.1U_0402_16V4Z

1 2

C357 0.1U_0402_16V4Z

1 2

C358 0.1U_0402_16V4Z

1 2

C359 0.1U_0402_16V4Z

1 2

C360 0.1U_0402_16V4Z

1 2

C361 0.1U_0402_16V4Z

1 2

C362 0.1U_0402_16V4Z

1 2

C363 0.1U_0402_16V4Z

1 2

C364 0.1U_0402_16V4Z

1 2

C365 0.1U_0402_16V4Z

1 2

C366 0.1U_0402_16V4Z

1 2

C367 0.1U_0402_16V4Z

1 2

C368 0.1U_0402_16V4Z

1 2

C369 1U_0402_6.3V4Z

1 2

C370 1U_0402_6.3V4Z

1 2

C371 1U_0402_6.3V4Z

1 2

C372 1U_0402_6.3V4Z

1 2

C373 1U_0402_6.3V4Z

1 2

C374 1U_0402_6.3V4Z

1 2

C375 1U_0402_6.3V4Z

1 2

C376 1U_0402_6.3V4Z

1 2

C377 0.1U_0402_16V4Z

1 2

C378 0.1U_0402_16V4Z

1 2

C379 0.1U_0402_16V4Z

1 2

C380 0.1U_0402_16V4Z

1 2

C383 0.1U_0402_16V4Z

1 2

C384 0.1U_0402_16V4Z

1 2

C385 0.1U_0402_16V4Z

1 2

C386 0.1U_0402_16V4Z

1 2

C387 0.1U_0402_16V4Z

1 2

C388 0.1U_0402_16V4Z

1 2

C389 0.1U_0402_16V4Z

1 2

C390 0.1U_0402_16V4Z

1 2

C391 10U_0805_10V4Z

1 2

C392 10U_0805_10V4Z

1 2

C393 0.1U_0402_16V4Z

1 2

C394 0.1U_0402_16V4Z

1 2

C395 0.1U_0402_16V4Z

1 2

C396 0.1U_0402_16V4Z

1 2

C397 0.1U_0402_16V4Z

1 2

+1.8VALW

C410 10U_0805_10V4Z

1 2

C411 1U_0402_6.3V4Z

1 2

C412 0.1U_0402_16V4Z

1 2

+3VS

+1.8VS

+3VALW

+1.05VS

0.1U_0402_16V4Z
C406

0_0805_5%

R205

1 2

+1.8VS

220mA

12

+AVDD_CK

U5C

A25

VDDQ_1

A28

VDDQ_2

C29

VDDQ_3

D24

VDDQ_4

L9

VDDQ_5

L21

VDDQ_6

M5

VDDQ_7

P3

VDDQ_8

P9

VDDQ_9

T5

VDDQ_10

V9

VDDQ_11

W2

VDDQ_12

W6

VDDQ_13

W21

VDDQ_14

W29

VDDQ_15

AA12

VDDQ_16

AA16

VDDQ_17

AA19

VDDQ_18

AC4

VDDQ_19

AC23

VDDQ_20

AD27

VDDQ_21

AE1

VDDQ_22

AE9

VDDQ_23

AE23

VDDQ_24

AH29

VDDQ_25

AJ2

VDDQ_26

AJ6

VDDQ_27

AJ26

VDDQ_28

M13

VDD_1

M17

VDD_2

N12

VDD_3

N15

VDD_4

N18

VDD_5

R13

VDD_6

R17

VDD_7

U12

VDD_8

U15

VDD_9

U18

VDD_10

V13

VDD_11

V17

VDD_12

A2

S5_3.3V_1

A7

S5_3.3V_2

F1

S5_3.3V_3

J5

S5_3.3V_4

J7

S5_3.3V_5

K1

S5_3.3V_6

G4

S5_1.8V_1

H1

S5_1.8V_2

H2

S5_1.8V_3

H3

S5_1.8V_4

A18

USB_PHY_1.8V_1

A19

USB_PHY_1.8V_2

B19

USB_PHY_1.8V_3

B20

USB_PHY_1.8V_4

B21

USB_PHY_1.8V_5

AA27

CPU_PWR

AE11

V5_VREF

A24

AVDDCK

A22

NC

B22

AVSSCK

V29

PCIE_VSS_42

V28

PCIE_VSS_41

V27

PCIE_VSS_40

V26

PCIE_VSS_39

V25

PCIE_VSS_38

V24

PCIE_VSS_37

V23

PCIE_VSS_36

V22

PCIE_VSS_35

U27

PCIE_VSS_34

T29

PCIE_VSS_33

T28

PCIE_VSS_32

T27

PCIE_VSS_31

T24

PCIE_VSS_30

T21

PCIE_VSS_29

218S4RASA11GS SB460_BGA549

SB460

Part 3 of 4

POWER

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57

PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8

PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27PCIE_VSS_28

A1
A20
A21
A29
B1
B7
B25
C21
C22
C24
D6
E24
F2
F23
G1
J1
J8
L6
L8
M9
M12
M15
M18
N13
N17
P1
P6
P21
R12
R15
R18
T6
T9
U13
U17
V3
V8
V12
V15
V18
V21
W1
W9
Y29
AA11
AA14
AA18
AC6
AC24
AD9
AD23
AE3
AE27
AG6
AJ1
AJ25
AJ29

D27
D28
D29
F26
G23
G24
G25
H27
J23
J26
J28
K27
L22
L23
L24
L27
L28
M21
M24
M27
N27
N28
P22
P23
P24
P25
P26P27

+V5_VREF (20mils)
+AVDD_CK(40mils)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/11/01 2006/11/30

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

SB450/POWER/GND

Size Document Number Rev

HCL51 LA-3211P 0.4

Custom

Date: Sheet

, 11, 2006

星期二 四月

of

16 43

5

+3VALW +3VS +3VALW +3VS +3VS +3VS +3VS +3VS +3VS +3VS

R206

10K_0402_5%

AUTO_ON#(13)
AC_SDOUT(14)

D D

RTC_CLK(13)
SPDIF_OUT(13)
PCI_CLK3_R(13)
PCI_CLK4_R(13)
PCI_CLK5_R(13)
PCI_CLK6_R(13)
PCI_CLK0_R(13)
PCI_CLK1_R(13)
LPC_FRAME#(13,27,28)

4

12

12

R207

@

10K_0402_5%

12

R208
10K_0402_5%

12

R209
10K_0402_5%

12

@

R210
10K_0402_5%

12

R211
10K_0402_5%

3

+3VS

12

@

R212
10K_0402_5%

12

R213
10K_0402_5%

12

@

R214
10K_0402_5%

12

R215
10K_0402_5%

12

@

R216
10K_0402_5%

2

+3VS

12

@

R217
10K_0402_5%

PCI_CLK2_R(13)

1

Selects type of 48MHz

12

R218

10K_0402_5%

12

R219
10K_0402_5%

12

@

R220
10K_0402_5%

12

R221
10K_0402_5%

12

@

R222
10K_0402_5%

12

R223
10K_0402_5%

12

@

R224
10K_0402_5%

12

R225
10K_0402_5%

12

@

R226
10K_0402_5%

clock pad

12

R227
10K_0402_5%

REQUIRED STRAPS

ACPWRON

12

R230
10K_0402_5%

12

R240
10K_0402_5%

RTC_CLK

INTERNAL
RTC

DEFAULT

EXTERNAL
RTC (NOT
SUPPORTED
W/ IT8712 )

12

R231

@

10K_0402_5%

12

R241

@

10K_0402_5%

PU for 48Mhz
XTAL mode

48M OSC
mode

DEFAULT

12

R232

@

10K_0402_5%

12

R242

@

10K_0402_5%

AUTO_ON#

PULL

C C

PIDE_DMACK#(15,20)

PCI_AD31(13,21,23,25)
PCI_AD30(13,21,23,25)
PCI_AD29(13,21,23,25)
PCI_AD28(13,21,23,25)

B B

PCI_AD27(13,21,23,25)
PCI_AD26(13,21,23,25)
PCI_AD25(13,21,23,25)
PCI_AD24(13,21,23,25)
PCI_AD23(13,21,23,25)

HIGH

PULL
LOW

Pop R634 when debug .

MANUAL
PWR ON

DEFAULT

AUTO
PWR
ON

+3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS

12

R228
10K_0402_5%

12

R238

@

10K_0402_5%

AC97_SDOUT SPDIF_OUT

USE
DEBUG
STRAPS

IGNORE
DEBUG
STRAPS

DEFAULT

12

R229

@

@

10K_0402_5%

12

R239
10K_0402_5%

@

@

12

R233

@

10K_0402_5%

12

R243
10K_0402_5%

CLK_PCI3

USB PHY
PWRDOWN
DISABLE

DEFAULT

USB PHY
PWRDOWN
ENABLE

12

R234

@

10K_0402_5%

12

R244
10K_0402_5%

CLK_PCI4

Internal PLL

External
Clock

DEFAULT

12

R235

@

10K_0402_5%

12

R245
10K_0402_5%

CLK_PCI5

PCIE AUTO
detect

DEFAULT

Forcing PCIE
to 2 lanes
(debug only)

@

PCI_CLK6

CPU I/F = K8

CPU I/F = P4

DEFAULT

12

R236
10K_0402_5%

12

R246
10K_0402_5%

12

R237

@

10K_0402_5%

12

R247

@

10K_0402_5%

PCI_CLK0

ROM TYPE
H,H = PCI ROM

H,L = LPC ROM I

L,H = LPC ROM II

L,L = FWH ROM

PCI_CLK1

DEFAULT

LFRAME#

THERMTRIP#
ENABLE

DEFAULT

THERMTRIP#
DISABLE

CLK_PCI2

Crystal Pad

Clock input
buffer

DEFAULT

DEBUG STRAPS

PIDE_DMACK#

PULL
HIGH

A A

PULL
LOW

USE
LONG
RESET

DEFAULT

USE
SHORT
RESET

PCI_AD31 PCI_AD30

Reserved

Reserved

PCI_AD29

PCI_AD28

Reserved Reserved

PCI_AD27 PCI_AD26

BYPASS
PCI PLL

USE PCI
PLL

DEFAULT DEFAULT DEFAULT DEFAULT

BYPASS
ACPI
BCLK

USE
ACPI
BCLK

PCI_AD25 PCI_AD24

BYPASS IDE
PLL

USE IDE
PLL

USE EEPROM
PCIE STRAPS

USE DEFAULT
PCIE STRAPS

PCI_AD23

Reserved

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/11/01 2006/11/30

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

HARDWARE TRAP

Size Document Number Rev

Custom

HCL51 LA-3211P

, 11, 2006

星期二 四月

2

Date: Sheet

1

17 43

0.4

of

5

4

3

2

1

LCD POWER CIRCUIT

+3VS

12

R253

4.7K_0402_5%

DAC_BRIG
INVT_PWM
DISPOFF#

2

+3VS

G

4.7U_0805_10V4Z

DAC_BRIG (28)
INVT_PWM (28)

EMC_NB_TXOUT0- (8)
EMC_NB_TXOUT0+ (8)

EMC_NB_TXOUT1- (8)
EMC_NB_TXOUT1+ (8)

EMC_NB_TXOUT2+ (8)
EMC_NB_TXOUT2- (8)

EMC_NB_TXCLK- (8)
EMC_NB_TXCLK+ (8)

W=60mils

1

C413

4.7U_0805_10V4Z

S

Q8
SI2301BDS_SOT23

D

1 3

1

C415

2

2005/11/18

1 2

C417 220P_0402_50V7K

1 2

C418 220P_0402_50V7K

1 2

C419 220P_0402_50V7K

2

+LCDVDD

W=60mils

1

C416

0.1U_0402_16V4Z

2

AOS 3413

+LCDVDD

12

D D

NB_ENVDD(8)

C C

R251 0_0402_5%

300_0402_5%

2N7002_SOT23

1 2

R248

Q7

BKOFF#(28)

13

D

S

10K_0402_5%

+3VALW

12

R249
100K_0402_5%

2

G

13

D

Q9

2

2N7002_SOT23

G

S

12

R252

BKOFF# DISPOFF#

R250 1K_0402_5%

D8
RB751V_SOD323

21

12

1

C414

0.047U_0402_16V7K

2

LCD/PANEL BD. Conn.

+INVPWR_B+

+3VS +LCDVDD
NB_EDID_CLK(8)
NB_EDID_DATA(8)

EMC_NB_TZOUT0-(8)
EMC_NB_TZOUT0+(8)

EMC_NB_TZOUT1+(8)
EMC_NB_TZOUT1-(8)

EMC_NB_TZOUT2+(8)
EMC_NB_TZOUT2-(8)

EMC_NB_TZCLK-(8)

B B

EMC_NB_TZCLK+(8)

NB_EDID_CLK
NB_EDID_DATA

EMC_NB_TZOUT0-

EMC_NB_TZOUT1+
EMC_NB_TZOUT1-

EMC_NB_TZOUT2+
EMC_NB_TZOUT2-

EMC_NB_TZCLK­EMC_NB_TZCLK+

JP4

40

20

39

19

38

18

37

17

36

16

35

15

34

14

33

13

32

12

31

11

30

10

29

9

28

8

27

7

26

6

25

5

24

4

23

3

22

2

21

1

ACES_88107-4000G

DAC_BRIG
INVT_PWM
DISPOFF#

(60 MIL)

EMC_NB_TXOUT0­EMC_NB_TXOUT0+EMC_NB_TZOUT0+

EMC_NB_TXOUT1­EMC_NB_TXOUT1+

EMC_NB_TXOUT2+
EMC_NB_TXOUT2-

EMC_NB_TXCLK­EMC_NB_TXCLK+

(SAME AS ACES_87216-4016)

+LCDVDD

1

C421
10U_0805_10V4Z

2

1

C422

0.1U_0402_16V4Z

2

680P_0603_50V7K

C423

L24

KC FBM-L11-201209-221LMAT_0805

L25

KC FBM-L11-201209-221LMAT_0805

1

2

1

C424
68P_0402_50V8K

2

+3VS+INVPWR_B+

12

12

B+

1

C420

0.1U_0402_16V4Z

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

2

Date: Sheet

Compal Electronics, Inc.

LCD Connector

HCL51 LA-3211P

星期二, 四月

11, 2006

0.4

of

18 43

1

A

B

C

D

E

D9

2 1

RB411D_SOT23

C432

100P_0402_50V8J

2

G

S

2

G

1 3

D

Q11
2N7002_SOT23

W=40mils

F1

1.1A_6VDC_FUSE

DDC_MD2

1

2

C434

68P_0402_50V8K

4.7K_0402_5%

S

21

C425

0.1U_0402_16V4Z

1

2

+3VS +3VS

12

R260

W=40mils

1

2

DSUB_12

DSUB_15

1

C437
68P_0402_50V8K

2

12

+CRT_VCC+R_CRT_VCC

JP5

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

SUYIN_070549FR015S208CR

4.7K_0402_5%
R261

12

R501 0_0402_5%

NB_DDC_DATA (8)

NB_DDC_CLK (8)

CRT_DECT (28)

2006/02/07

CRT Connector

+3VS

1 1

EMC_NB_CRT_R(8)

EMC_NB_CRT_G(8)

EMC_NB_CRT_B(8)

EMC_NB_CRT_HSYNC(8)

2 2

R254

75_0402_1%

12

12

R255

75_0402_1%

75_0402_1%

1 2

C433 0.1U_0402_16V4Z

Place closed to chipset

EMC_NB_CRT_VSYNC(8)

3 3

EMC_NB_CRT_R

EMC_NB_CRT_G

EMC_NB_CRT_B

12

R256

CRT_HSYNC CRT_HSYNC_B

1

C426
6P_0402_50V8K

2

+CRT_VCC

1

U11

2 4

OE#

AY

GP

SN74AHCT1G125DCKR_SC70-5

3 5

1 2

C438 0.1U_0402_16V4Z

C427

6P_0402_50V8K

CRT_VSYNC

1

2

6P_0402_50V8K

+CRT_VCC

2 4

AY

GP

SN74AHCT1G125DCKR_SC70-5

3 5

+CRT_PULLUP

1 2

L26

FCM2012C-800_0805

1 2

L27

FCM2012C-800_0805

1 2

L28

FCM2012C-800_0805

1

C428

2

12

R257 10K_0402_5%

1

U12

CRT_VSYNC_B

OE#

6P_0402_50V8K

CRT_R_L

CRT_G_L

CRT_B_L

C429

D10

@

DAN217_SC59

1

2

D11

@

DAN217_SC59

1

2

C430

6P_0402_50V8K

1 2

L29 FCM1608C-121T_0603

1 2

L30 FCM1608C-121T_0603

1

2

3

3

1

2

10P_0402_50V8K

4.7K_0402_5%

DSUB_12

DSUB_15

D12

@

DAN217_SC59

2

1

C431
6P_0402_50V8K

2

CRT_HSYNC_L

CRT_VSYNC_L

C435

+CRT_VCC

12

R258

1

3

1

1

C436
10P_0402_50V8K

2

2

Place closed to chipset

12

R259

4.7K_0402_5%

Q10
2N7002_SOT23

+5VS

+3VS

1 3

D

2005/10/18

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

CRT & TV-OUT Connector

HCL51 LA-3211P

星期二, 四月

11, 2006

E

of

19 43

0.4

A

1 1

B

C

D

E

F

G

H

1

C456

2

PIDE_DD8
PIDE_DD9
PIDE_DD10
PIDE_DD11
PIDE_DD12
PIDE_DD13
PIDE_DD14
PIDE_DD15

PCSEL

1 2

R271 475_0402_1%

PIDE_PDIAG#
PIDE_DA2

1 2

R273 10K_0402_5%

+3VS

1

C457

2

10U_0805_10V4Z

+5VS+5VS

Place closed to Connector

PIDE_DIORDY

PIDE_DREQ
PIDE_INTRQ
PIDE_DD7

Placea caps. near ODD CONN.

+5VS

0.1U_0402_16V4Z

C448

C449

1

2

1U_0603_10V4Z

1

2 2

2

1000P_0402_50V7K

1

C450

2

10U_0805_10V4Z

1

C451

2

1

C452

2

10U_0805_10V4Z

PIDE_DA[0..2](15)
PIDE_DD[0..15](15)

ODD Conn.

JP7

1

IDE_RESET#(15)

+5VS

PIDE_DIOW#(15)

R272100K_0402_5%

PIDE_DIORDY(15)
PIDE_INTRQ#(15)

1 2

IDE_LED#(28)

3 3

IDE_LED#

PIDE_CS1#(15)

+5VS +5VS

1 2

R270 475_0402_1%

IDE_RESET#

PIDE_DD7
PIDE_DD6
PIDE_DD5
PIDE_DD4
PIDE_DD3
PIDE_DD2
PIDE_DD1
PIDE_DD0

PIDE_DIOW#
PIDE_DIORDY
PIDE_INTRQ#
PIDE_DA1
PIDE_DA0
PIDE_CS1#

@

3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

OCTEK_CDR-50JL1G

(NEW)

2005/10/20

2

1

2

4

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

PIDE_DD8

6

PIDE_DD9

8

PIDE_DD10

10

PIDE_DD11

12

PIDE_DD12

14

PIDE_DD13

16

PIDE_DD14

18

PIDE_DD15

20

PIDE_DREQ

22

PIDE_DIOR#

24
26

PIDE_DMACK#

28
30

PIDE_PDIAG#

32

PIDE_DA2

34

PIDE_CS3#

36
38
40
42
44
46
48
50

1 2

PIDE_DREQ (15)
PIDE_DIOR# (15)

PIDE_DMACK# (15,17)

R269

100K_0402_5%@

PIDE_CS3# (15)

+5VS

PIDE_DA[0..2]
PIDE_DD[0..15]

PIDE_DREQ(15)

PIDE_DIOW#(15)

PIDE_DIOR#(15)
PIDE_DIORDY(15)
PIDE_DMACK#(15,17)

PIDE_INTRQ#(15)

PIDE_CS1#(15) PIDE_CS3# (15)

+5VS

0.1U_0402_16V4Z

1

C453

2

1000P_0402_50V7K

PATA HDD Conn.

IDE_RESET#

PIDE_DD7
PIDE_DD6
PIDE_DD5
PIDE_DD4
PIDE_DD3
PIDE_DD2
PIDE_DD1
PIDE_DD0

PIDE_DREQ
PIDE_DIOW#
PIDE_DIOR#
PIDE_DIORDY
PIDE_DMACK#
PIDE_INTRQ
PIDE_DA1
PIDE_DA0
PIDE_CS1# PIDE_CS3#
IDE_LED#

1 2

R265 4.7K_0402_5%@

1 2

R266 5.6K_0402_5%@

1 2

R267 10K_0402_5%@

1 2

R268 10K_0402_5%@

1

1

2

11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44

OCTEK_HDD-22SG1G_NR

C454

2

1U_0603_10V4Z

JP8

1 2

12

3 4

34

5 6

56

7 8

78

9 10

910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44

C455

(NEW)

PIDE_PDIAG#

10U_0805_10V4Z

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

E

F

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

ODD & SATA HDD Connector
HCL51 LA-3211P

星期二, 四月

11, 2006

G

of

20 43

H

0.4

A

+3VS

40mil

0.1U_0402_16V4Z

1

1

C459

C458

0.1U_0402_16V4Z

1 2

R276 43K_0402_5%

SM_CD#

1 1

+3VS

2 2

3 3

2

2

0.1U_0402_16V4Z

1

1

C461

C460

2

2

0.1U_0402_16V4Z

MFUNC5[3:0] = (0 1 0 1)
MFUNC5[4] = 1

0.1U_0402_16V4Z

PCI_CBE#[0..3](13,23,25,31)

MS_PWREN#(22)

PCI_AD[0..31](13,17,23,25,31)

+3VS

SDCK_XDWE#(22)

1

C462

2

12

1

2

B

0.1U_0402_16V4Z

1

C463

2

CLK_PCI_CB

R274

10_0402_5%@

C469

15P_0402_50V8J@

1 2

R278 10K_0402_5%

R280
0_0402_5%

@

1

C464

2

0.1U_0402_16V4Z

PCI_AD[0..31]
PCI_CBE#[0..3]

CLK_SD_48M

12

R275

1

C470

2

1 2

R282 33_0402_5%4IN1@

1 2

SDCM_XDALE(22)

SDDA0_XDD7(22)
SDDA1_XDD0(22)
SDDA2_XDCL(22)
SDDA3_XDD4(22)

10_0402_5%@

15P_0402_50V8J@

PCI_FRAME#(13,23,25,31)

PCI_DEVSEL#(13,23,25)

CLK_PCI_CB(13)

PCI_AD20

SD_PWREN#(22)

CLK_SD_48M(12)

C

+3VS

VPPD0(22)
VPPD1(22)
VCCD0#(22)
VCCD1#(22)

PCI_RST#(13,15,23,25,27,28,31)

PCI_IRDY#(13,23,25)

PCI_TRDY#(13,23,25,31)

PCI_STOP#(13,23,25)
PCI_PERR#(13,23,25)
PCI_SERR#(13,23,25)

PCI_PAR(13,23,25)

PCI_REQ#2(13)

PCI_GNT#2(13)

1 2

R279 100_0402_5%

PCI_PIRQE#(13)
PCI_PIRQH#(13,25)

SERIRQ(13,27,28)
5IN1_LED#(28)
SDOC#(22)

+VCC_SD

SD_CD#(22)
SD_WP#(22)

VPPD0
VPPD1
VCCD0#
VCCD1#

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0

PCI_RST#

PCI_REQ#2
CLK_PCI_CB

SD_PULLHIGH

SM_CD#
5IN1_LED#

SDOC#

PCI_RST#

SD_CD#
SD_WP#
SD_PWREN#

CLK_SD_48M
SD_CLK

SDCM_XDALE
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4

U13

C2

AD31

C1

AD30

D4

AD29

D2

AD28

D1

AD27

E4

AD26

E3

AD25

E2

AD24

F2

AD23

F1

AD22

G2

AD21

G3

AD20

H3

AD19

H4

AD18

J1

AD17

J2

AD16

N2

AD15

M3

AD14

N3

AD13

K4

AD12

M4

AD11

K5

AD10

L5

AD9

M5

AD8

K6

AD7

M6

AD6

N6

AD5

M7

AD4

N7

AD3

L7

AD2

K7

AD1

N8

AD0

E1

CBE3#

J3

CBE2#

N1

CBE1#

N5

CBE0#

G4

PCIRST#

J4

FRAME#

K1

IRDY#

K3

TRDY#

L1

DEVSEL#

L2

STOP#

L3

PERR#

M1

SERR#

M2

PAR

A1

PCIREQ#

B1

PCIGNT#

H1

PCICLK

L8

RIOUT#_PME#

L11

SUSPEND#

F4

IDSEL

K8

MFUNC0

N9

MFUNC1

K9

MFUNC2

N10

MFUNC3

L10

MFUNC4

N11

MFUNC5

M11

MFUNC6

J9

MFUNC7

M10

GRST#

E7

VCC_SD

E8

SDCD#

F8

SDWP/SMWPD#

G7

SDPWREN33#

H5

SDCLKI

F6

SDCLK/SMWE#

E5

SDCMD/SMALE

E6

SDDAT0/SMDATA7

F7

SDDAT1/SMDATA0

F5

SDDAT2/SMCLE

G6

SDDAT3/SMDATA4

G5

GND_SD

+S1_VCC

N12

M12

N13

M13

VPPD0

VPPD1

VCCD0#

VCCD1#

PCI Interface

SD/MMC/MS/SM

G13

A7

VCCA1

VCCA2

GND1

D3H2L4M8K11

C8

H11

B4

D12

VCC9

VCC8

VCC10

CSTSCHG/BVD1_STSCHG#

CCLKRUN#/WP_IOIS16#

MSPWREN#/SMPWREN#

GND2

GND3

GND4

GND5

GND6

GND7

F12

C10

B6

G1

K2

N4

F3

L6

L9

VCC2

VCC3

VCC4

VCC1

VCC5

VCC6

VCC7

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD15/IOWR#

CAD14/A9

CAD13/IORD#

CAD12/A11

CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CCBE3#/REG#

CCBE2#/A12

CCBE1#/A8

CCBE0#/CE1#

CARDBUS

CRST#/RESET

CFRAME#/A23

CIRDY#/A15

CTRDY#/A22

CDEVSEL#/A21

CSTOP#/A20
CPERR#/A14

CSERR#/WAIT#

CPAR/A13

CREQ#/INPACK#

CGNT#/WE#

CCLK/A16

CBLOCK#/A19

CINT#/READY_IREQ#

SPKROUT

CAUDIO/BVD2_SPKR#

CCD2#/CD2#
CCD1#/CD1#

CVS2/VS2#

CVS1/VS1

CRSV3/D2
CRSV2/A18
CRSV1/D14

MSINS#

MSBS/SMDATA1

MSCLK/SMRE#
MSDATA0/SMDATA2
MSDATA1/SMDATA6
MSDATA2/SMDATA5
MSDATA3/SMDATA3

SMBSY#

SMCD#

SMWP#

SMCE#

GND8

CB714_LFBGA169

B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13

B7
A11
E11
H13

B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12

C5
D5

D11
D6
M9

B5
A4

L12
D9
C6
A2
E10
J13

H7
J8
H8
E9
G9
H9
G8
F9

H6
J7
J6
J5

**CB714 use B0 version

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

S1_REG#
S1_A12
S1_A8
S1_CE1#

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#

S1_BVD1
S1_WP

S1_A19
S1_RDY#
PCM_SPK#

S1_BVD2
S1_CD2#

S1_CD1#
S1_VS2
S1_VS1
S1_D2
S1_A18
S1_D14

XD_PWREN#
MSBS_XDD1
MS_CLK
MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3

XD_CD#
XD_WP#

1 2

D

IDSEL:AD20
(PIRQE#/B#,
GNT#2,
REQ#2)

1 2

R277 33_0402_5%

R281 33_0402_5%4IN1@

R283

2.2K_0402_5%

4IN1@

S1_IOWR# (22)
S1_IORD# (22)
S1_OE# (22)

S1_CE2# (22)

S1_REG# (22)

S1_CE1# (22)
S1_RST (22)

S1_WAIT# (22)
S1_INPACK# (22)

S1_WE# (22)

S1_BVD1 (22)
S1_WP (22)

S1_RDY# (22)
PCM_SPK# (32)

S1_BVD2 (22)
S1_CD2# (22)

S1_CD1# (22)
S1_VS2 (22)
S1_VS1 (22)

1 2

XD_BSY# (22)
XD_CD# (22)
XD_WP# (22)
XD_CE# (22)

S1_A16

S1_A[0..25]
S1_D[0..15]

MS_INS# (22)
XD_PWREN# (22)
MSBS_XDD1 (22)

MSCLK_XDRE# (22)
MSD0_XDD2 (22)
MSD1_XDD6 (22)
MSD2_XDD5 (22)
MSD3_XDD3 (22)

E

S1_A[0..25] (22)
S1_D[0..15] (22)

+3VS

2

1

1

C466

0.1U_0402_16V4Z

2

1

C468

0.1U_0402_16V4Z

2

1

C465

4.7U_0805_10V4Z

2

+S1_VCC

1

C467

0.1U_0402_16V4Z

2

S1_CD2# S1_CD1#

C471
10P_0402_50V8K

C472

2

10P_0402_50V8K

1

4 4

A

B

CB714 P/N: SA007140B50
CB1410 P/N: SA014100310

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

D

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

Cardbus Controller CB714
HCL51 LA-3211P

星期二, 四月

11, 2006

E

of

21 43

0.4

A

PCMCIA Power Control

+S1_VCC

1 1

W=40mil

C476
10U_0805_10V4Z

1

2

1

C477

2

0.1U_0402_16V4Z

W=40mil

1

C480
10U_0805_10V4Z

2

2 2

1

C481

2

0.1U_0402_16V4Z

+5VS

+3VS

9

5
6

3
4

12

R285
10K_0402_5%

U14

12V

5V
5V

3.3V

3.3V

VCCD0#
VCCD1#

7

R290 10K_0402_5%
R291 10K_0402_5%

VCC
VCC
VCC

VPP

VCCD0
VCCD1
VPPD0
VPPD1

GND

SHDN

CP2211FD3_SSOP16

16

1 2
1 2

40mil

13
12
11

10

VCCD0#

1

VCCD1#

2

VPPD0

15

VPPD1

14

8

OC

SD/MS Power Control

XD Power Control

+3VS

R293

10K_0402_5%

4IN1@

XD_PWREN#

3 3

SD_PWREN#(21)
MS_PWREN#(21)

SD_PWREN#

1 2

12

R297
0_0402_5%

4IN1@

U15

1

GND

OUT

2

IN

OUT

3

OUT

IN

4

EN#

G528_SO8

4IN1@

XD_PWREN#

1 2

R301 0_0603_5%

FLG

4IN1@

40mil

+VCC_XD+3VS

8
7
6

SDOC#

5

12

R295
300_0402_5%

4IN1@

13

D

2

G

S

+VCC_SD+VCC_XD

40mil

+3VS

1 2

Q12
2N7002_SOT23

4IN1@

B

+S1_VPP

1

C475

0.1U_0402_16V4Z

2

VCCD0# (21)

VCCD1# (21)
VPPD0 (21)
VPPD1 (21)

R292
10K_0402_5%

4IN1@

C

+S1_VCC

1

C473

10U_0805_10V4Z

2

+S1_VPP

1

C478

2

10U_0805_10V4Z

S1_OE#

1 2

R284 43K_0402_5%

S1_WP

R286 43K_0402_5%

S1_RST

1 2

R287 43K_0402_5%

S1_CE1#

1 2

R288 43K_0402_5%

S1_CE2#

1 2

R289 43K_0402_5%

xD PU and PD. Close to Socket

+3VS +VCC_XD

R294 43K_0402_5%4IN1@

SDOC# (21)XD_PWREN#(21)

+VCC_XD

1 2

R296 2.2K_0402_5%4IN1@

1 2

R298 2.2K_0402_5%4IN1@

1 2

R299 2.2K_0402_5%4IN1@

1 2

R300 2.2K_0402_5%4IN1@

Reserve for SD,MS CLK.
Close to Socket

SDCK_XDWE#

C487 10P_0402_50V8K

MSCLK_XDRE#

C488 10P_0402_50V8K

C479

12

XD_CD#

12

MSCLK_XDRE#

1 2

1 2

1

C474

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2

SDCK_XDWE#

XD_CE#
XD_BSY#

4IN1@

4IN1@

+S1_VCC
+S1_VCC
+S1_VCC
+S1_VCC
+S1_VCC

S1_A[0..25](21)

S1_D[0..15](21)

+VCC_SD

1

C482

4IN1@

10U_0805_10V4Z

2

1

C485

4IN1@

2

10U_0805_10V4Z

1

C483

4IN1@

2

0.1U_0402_16V4Z

1

C486

4IN1@

0.1U_0402_16V4Z

2

SDDA1_XDD0(21)
MSBS_XDD1(21)
MSD0_XDD2(21)
MSD3_XDD3(21)

SDDA3_XDD4(21)

MSD2_XDD5(21)
MSD1_XDD6(21)

SDDA0_XDD7(21)

SDCK_XDWE#(21)

XD_WP#(21)

SDCM_XDALE(21)

XD_CD#(21)

XD_BSY#(21)

MSCLK_XDRE#(21)

XD_CE#(21)

SDDA2_XDCL(21)

S1_A[0..25]

S1_D[0..15]

1

C484

4IN1@

0.1U_0402_16V4Z

2

SDDA1_XDD0
MSBS_XDD1
MSD0_XDD2
MSD3_XDD3
SDDA3_XDD4
MSD2_XDD5
MSD1_XDD6
SDDA0_XDD7

SDCK_XDWE#
XD_WP#
SDCM_XDALE
XD_CD#
XD_BSY#
MSCLK_XDRE#
XD_CE#
SDDA2_XDCL

JP10

34

26
27
28
29
30
31
32
33

24
25
23
18
19
20
21
22

TAITW_R007-520-L3

4IN1@

D

PCMCIA Socket

S1_CD1#(21)

S1_CE1#(21)

S1_CE2#(21)

S1_OE#(21)
S1_VS1(21)

S1_IORD#(21)

S1_IOWR#(21)

S1_WE#(21)

S1_RDY#(21)

+S1_VCC
+S1_VCC
+S1_VPP
+S1_VPP

S1_VS2(21)
S1_RST(21)

S1_WAIT#(21)

S1_INPACK#(21)

S1_REG#(21)
S1_BVD2(21)
S1_BVD1(21)

S1_WP(21)

S1_CD2#(21)

XD-VCC

4 IN 1 CONN

SD / MMC / MS(PRO) / XD

XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7

XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE

S1_D3

S1_CD1#

S1_D4

S1_D11

S1_D5

S1_D12

S1_D6

S1_D13

S1_D7

S1_D14

S1_CE1#

S1_D15
S1_A10

S1_CE2#

S1_OE#
S1_VS1
S1_A11

S1_IORD#

S1_A9

S1_IOWR#

S1_A8
S1_A17
S1_A13
S1_A18
S1_A14
S1_A19

S1_WE#

S1_A20

S1_RDY#

S1_A21

S1_A16
S1_A22
S1_A15
S1_A23
S1_A12
S1_A24

S1_A7
S1_A25

S1_A6
S1_VS2

S1_A5
S1_RST

S1_A4

S1_WAIT#

S1_A3

S1_INPACK#

S1_A2

S1_REG#

S1_A1

S1_BVD2

S1_A0

S1_BVD1

S1_D0

S1_D8

S1_D1

S1_D9

S1_D2
S1_D10

S1_WP

S1_CD2#

SD-VCC
MS-VCC

SD-CLK

SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3

SD-CMD

SD-CD-SW

SD-WP-SW

MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3

MS-INS

MS-BS

4IN1-GND
4IN1-GND

JP9

1

GND

35

GND

2

DATA3

36

CD1#

3

DATA4

37

DATA11

4

DATA5

38

DATA12

5

DATA6

39

DATA13

6

DATA7

40

DATA14

7

CE1#

41

DATA15

8

ADD10

42

CE2#

9

OE#

43

VS1#

10

ADD11

44

IORD#

11

ADD9

45

IOWR#

12

ADD8

46

ADD17

13

ADD13

47

ADD18

14

ADD14

48

ADD19

15

WE#

49

ADD20

16

READY

50

ADD21

17

VCC

51

VCC

18

VPP

52

VPP

19

ADD16

53

ADD22

20

ADD15

54

ADD23

21

ADD12

55

ADD24

22

ADD7

56

ADD25

23

ADD6

57

VS2#

24

ADD5

58

RESET

25

ADD4

59

WAIT#

26

ADD3

60

INPACK#

27

ADD2

61

REG#

28

ADD1

62

BVD2

29

ADD0

63

BVD1

30

DATA0

64

DATA8

31

DATA1

65

DATA9

GND

32

DATA2

GND

66

DATA10

33

WP

67

CD2#

34

GND

68

GND

SANTA_130601-7_LT

4 IN 1 Socket

(HDQ70)

14
3

SDCK_XDWE#

15

SDDA0_XDD7

16

SDDA1_XDD0

17

SDDA2_XDCL

11

SDDA3_XDD4

12

SDCM_XDALE

13

SD_CD#

2

SD_WP#

35

MSCLK_XDRE#

4

MSD0_XDD2

8

MSD1_XDD6

9

MSD2_XDD5

7

MSD3_XDD3

5

MS_INS#

6

MSBS_XDD1

10
1

36

69
70

+VCC_SD+VCC_XD

(NEW)

SD_CD# (21)

E

SD_WP# (21)

MS_INS# (21)

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

PCMCIA Socket

HCL51 LA-3211P

星期二, 四月

11, 2006

0.4

of

22 43

E

5

4

3

2

1

PCI_AD[0..31](13,17,21,25,31)

D D

IDSEL:AD22
(PIRQG#,
GNT#1,
REQ#1)

C C

PCI_AD22 LAN_IDSEL

PCI_FRAME#(13,21,25,31)

PCI_DEVSEL#(13,21,25)

PCI_PIRQG#(13)

CLK_PCI_LAN(13)

B B

CLK_PCI_LAN

10_0402_5%

A A

PM_CLKRUN#(13,25,27)

12

@

R315

1

2

8100CL(10/100 LAN) P/N:SA081000310 ver.A.2

5

PCI_AD[0..31]

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_CBE#0(13,21,25,31)
PCI_CBE#1(13,21,25,31)
PCI_CBE#2(13,21,25,31)
PCI_CBE#3(13,21,25,31)

1 2

R311 100_0402_5%

PCI_PAR(13,21,25)

PCI_IRDY#(13,21,25)

PCI_TRDY#(13,21,25,31)

PCI_STOP#(13,21,25)

PCI_PERR#(13,21,25)
PCI_SERR#(13,21,25)

PCI_REQ#1(13)
PCI_GNT#1(13)

LAN_PME#(25,28)

PCI_RST#(13,15,21,25,27,28,31)

C511
18P_0402_50V8J

@

CLK_PCI_LAN
PM_CLKRUN#

RTL8110SBL change to Ver.D

104
103
102

98
97
96
95
93
90
89
87
86
85
83
82
79
59
58
57
55
53
50
49
47
43
42
40
39
37
36
34
33

92
77
60
44

46
76

61
63
67
68
69

70
75

30
29

25
31
27
28

65

4

17

128

21
38
51
66
81

91
101
119

35

52

80
100

U16

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE#0
C/BE#1
C/BE#2
C/BE#3

IDSEL
PAR

FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#

PERR#
SERR#

REQ#
GNT#

INTA#
PME#
RST#
CLK

CLKRUN#

GND/VSS
GND/VSS
GND/VSS

GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST

GND
GND
GND
GND

RTL8110SBL_LQFP128

8100C@

EEDO

AUX/EEDI

EESK
EECS

LED0
LED1
LED2

NC/LED3

TXD+/MDI0+

TXD-/MDI0-

RXIN+/MDI1+

RXIN-/MDI1-

NC/MDI2+

NC/MDI2-

NC/MDI3+

NC/MDI3-

X1
X2

LWAKE

ISOLATE#

RTSET

NC/SMBCLK

NC/SMBDATA

NC/M66EN

NC/AVDDH

PCI I/F

AVDDH

NC/HSDAC+

NC/HG

NC/LG2

NC/VSS
NC/VSS

NC/GND
NC/GND
NC/GND
NC/GND
NC/GND

LAN I/F

NC/GND

CTRL25
CTRL12

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

AVDDL
AVDDL
AVDDL
AVDDL

VDD12
VDD12
VDD12
VDD12
VDD12

NC/VDD12
NC/VDD12
NC/VDD12
NC/VDD12
NC/VDD12

Power

4

NC

R302 3.6K_0402_5%

LAN_EEDO

108

LAN_EEDI

109

LAN_EECLK

111

LAN_EECS

106

ACTIVITY#

117

LINK_100#

115
114

LINK_1000#

113

LAN_MDI0+

1

LAN_MDI0-

2

LAN_MDI1+

5

LAN_MDI1-

6
14

15
18
19

121
122

105
23
127
72
74

88
10

120
11

123
124

9
13

22
48
62
73
112
118

8
125
26

41
56
71
84
94
107

3
7
20
16

126
32
54
78
99

24
45
64
110
116

12

20mils

LAN_X1
LAN_X2

R305 1K_0402_5%

1 2

R306 15K_0402_5%

1 2
1 2

1 2

+LAN_AVDDH

8110S@

12

R310 0_0402_5%

CTRL25
CTRL12

1

C498

0.1U_0402_16V4Z

2

+LAN_AVDDL25

20mils

1

C507

0.1U_0402_16V4Z

2

2

C512

8110S@

1

0.1U_0402_16V4Z

V_12P

1

C517

R319

0.1U_0402_16V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

4
3
2
1

1 2

R303 0_0402_5%

R304 0_0402_5%@

LAN_MIDI0+ (24)
LAN_MIDI0- (24)
LAN_MIDI1+ (24)
LAN_MIDI1- (24)

R307
R308

20mils

C496

27P_0402_50V8J

R314

1 2

8110S@

R318

1 2

0_0402_5%8100C@

1 2

0_0402_5%8110S@

U17

DO
DI
SK
CS

AT93C46-10SI-2.7_SO8

12

5.6K_0603_1%8100C@

2.49K_0603_1%8110S@

1

C491

2

1

2

1

2

0_0402_5%

1

2

2

0.1U_0402_16V4Z8110S@

1

5

GND

6

NC

7

NC

8

VCC

+3VS

1

2

0.1U_0402_16V4Z8110S@

Y4

1 2

25MHZ_20P

C499

0.1U_0402_16V4Z

+2.5V_LAN

C508

0.1U_0402_16V4Z

C513

+2.5V_LAN

+LAN_AVDDH

2005/07/29 2006/07/29

3

+3VALW

LAN_ACTIVITY# (24)

LAN_LINK# (24)

R309

0_0805_5%

1 2

8110S@

C490

0.1U_0402_16V4Z8110S@

LAN_X2LAN_X1

1

C500

0.1U_0402_16V4Z

2

1

C503

0.1U_0402_16V4Z

2

1

C509

0.1U_0402_16V4Z

2

2

C514

8110S@
1

0.1U_0402_16V4Z

1

C489 0.1U_0402_16V4Z

2

+3VALW

RSET 5.6K for 8100CL

2.49K for 8110S(B)

1

C497
27P_0402_50V8J

2

1

2

1

C504

0.1U_0402_16V4Z

2

1

2

2

C515

8110S@

1

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

+3VALW

C501

0.1U_0402_16V4Z

+LAN_DVDD

40mils

C510

0.1U_0402_16V4Z

1U_0603_10V4Z

CTRL25

1

C502

0.1U_0402_16V4Z

2

1

C505

0.1U_0402_16V4Z

2

2

C516

0.1U_0402_16V4Z

1

8110S@

8100CL(10/100 LAN) 8110SBL(10/100/1000 LAN)

PIN
RSET 5.6K 2.49K

8100CL(10/100 LAN) 8110SBL(10/100/1000 LAN)BOM structure

8100C@

Stuff No_Stuff

8110S@ StuffNo_Stuff

@ No_Stuff No_Stuff

+3VALW

C492

12

31

E

+2.5V_LAN

Q14

2

B

2SB1197K_SOT23

+3VALW

R316

1 2

8110S@

R317

1 2

8100C@

+1.2V_LAN

2

C

1

C506

0.1U_0402_16V4Z

2

0_0805_5%

0_0805_5%

+LAN_AVDDL

40mils

40mils

1

C493

4.7U_0805_10V4Z

2

+1.2V_LAN

+2.5V_LAN

Title

Size Document Number Rev

B

Date: Sheet of

+3VALW

8110S@

2SB1197K_SOT23

CTRL12

R312

1 2

8100C@

R313

1 2

8110S@

0_0805_5%

0_0805_5%

31

E

Q13

2

B

C

8110S@

4.7U_0805_10V4Z

Compal Electronics, Inc.

LAN RTL8110SBL

HCL51 LA-3211P

星期二, 四月

11, 2006

C494

+1.2V_LAN

1

1

2

2

0.1U_0402_16V4Z

+3VALW

+2.5V_LAN

1

40mils

C495

8110S@

0.4

23 43

5

4

3

2

1

LAN RTL8100CL

D D

1 2

C710
220P_0402_50V7K

T1

LAN_MIDI1-(23)

C C

LAN_MIDI1+(23)

R328

49.9_0402_1%

12

12

49.9_0402_1%
R329

C527

1

0.1U_0402_16V4Z

2

LAN_MIDI0-(23)
LAN_MIDI0+(23)

49.9_0402_1%
R330

0.1U_0402_16V4Z

C528

12

1

2

12

49.9_0402_1%
R331

LAN_MIDI1+

LAN_MIDI0­LAN_MIDI0+

C724

0.1U_0402_16V4Z

1

2

1

RD+

RX+

2

RD-

3
4
5
6
7 10

1

C723

2

0.1U_0402_16V4Z

@

RJ45_MDI3+
RJ45_MDI3-

RJ45_MDI2+
RJ45_MDI2- RJ45_GND LANGND

RX­CT
NC
NC
CT
TD+ TX+

TX-TD-

LF-H80P_16P

R334 0_0402_5%

R335 0_0402_5%

R336 0_0402_5%

R337 0_0402_5%

reseved for RTL8100CL(10/100)

B B

CT
NC
NC
CT

RJ45_MDI1-LAN_MIDI1-

16

RJ45_MDI1+

15
14
13
12
11

RJ45_MDI0­RJ45_MDI0+

98

1 2
1 2

1 2
1 2

MCT3

MCT4

75_0402_1%

R332

12

R338

75_0402_1%

12

R333
75_0402_1%

12

12

R339
75_0402_1%

RJ45_GND

LAN_ACTIVITY#(23)

+3VALW

LAN_LINK#(23)

LAN_ACTIVITY#

R320 300_0402_5%

R327 300_0402_5%

+3VALW

LAN_LINK#

12

RJ45_MDI3­RJ45_MDI3+
RJ45_MDI1­RJ45_MDI2­RJ45_MDI2+
RJ45_MDI1+
RJ45_MDI0­RJ45_MDI0+

12

2006/03/27

1 2

C711
220P_0402_50V7K

C520
1000P_1206_2KV7K

JP11

12

Yellow LED-

11

Yellow LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

SUYIN_100073FR012G101ZL

1 2

SHLD2
SHLD1

1

C525

2

0.1U_0402_16V4Z

14
13

1

C526

4.7U_0805_10V4Z

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/07/29 2006/07/29

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

2

Date: Sheet of

Compal Electronics, Inc.

LAN Magnetic & RJ45/RJ11

HCL51 LA-3211P

星期二, 四月

11, 2006

1

24 43

0.4

A

B

C

D

E

+3VALW

1

1

C544

C545

2

+5VS

+3VALW

PCI_RST# (13,15,21,23,27,28,31)
+3VS
PCI_GNT#3 (13)

MINI_PME# (23,28)
WLAN_BT_CLK (30)

PCI_AD18

0.1U_0402_16V4Z

2

PCI_PIRQF# (13)

1

C529

MINI1@

4.7U_0805_10V4Z

2

MINI_WAKE#(14)

MINI1_CLKREQ#(12)

CLK_PCIE_MINI1#(12)

CLK_PCIE_MINI1(12)

PCIE_WLAN_C_RX_N1(7)

PCIE_WLAN_C_RX_P1(7)

PCIE_WLAN_C_TX_N1(7)
PCIE_WLAN_C_TX_P1(7)

1

2

MINI_WAKE#
WLAN_BT_DATA
WLAN_BT_CLK

C530

MINI1@

0.1U_0402_16V4Z

1

C531

MINI1@

4.7U_0805_10V4Z

2

JP12

1 2

12

3 4

34

5 6

56

7 8

78

9 10

910

11 12

11 12

13 14

13 14

15 16

15 16

17 18

17 18

19 20

19 20

21 22

21 22

23 24

23 24

25 26

25 26

27 28

27 28

29 30

29 30

31 32

31 32

33 34

33 34

35 36

35 36

37 38

37 38

39 40

39 40

41 42

41 42

43 44

43 44

45 46

45 46

47 48

47 48

49 50

49 50

51 52

51 52

G1G2G3

535455

1

C532

MINI1@

0.1U_0402_16V4Z

2

(MINI1_LED#)

G3

FOX_AS0B226-S99N-7F

56

MINI1@

1

C533

MINI1@

0.1U_0402_16V4Z

2

MINI1_OFF#

SB_SMBCLK
SB_SMBDATA

2006/03/29 audy mirror L54
R506/507 ADD @

+3VS

USB CAM

JP37

GND1
GND2

ACES_88266-05001

0.1U_0402_16V4Z

1

C727

1

1

2

2

3

3

4

4

5

5

6
7

2

USBP2-_L
USBP2+_L

@

R506 0_0402_5%

1 2

L54

1 2

12

34

WCM2012F2S-900T04_0805

1 2

R507 0_0402_5%

@

USBP2-

USBP2+

34

1

C536

2

WLAN_BT_DATA(30)

10U_0805_10V4Z

WL_OFF#(28)

CLK_PCI_MINI(13)

PCI_REQ#3(13)

PCI_CBE#3(13,21,23,31)

PCI_CBE#2(13,21,23,31)
PCI_IRDY#(13,21,23)

PM_CLKRUN#(13,23,27)

PCI_SERR#(13,21,23)

PCI_CBE#1(13,21,23,31)

+5VS

1

C537

2

IDSEL:AD18
(PIRQF/H#,
GNT#3,
REQ#3)

+3VS

+5VS

+5VS

1000P_0402_50V7K

WL_OFF#

RB751V_SOD323

W=40mils

CLK_PCI_MINI
PCI_REQ#3
PCI_AD31

PCI_AD29
PCI_AD27

PCI_AD25
WLAN_BT_DATA

PCI_AD23
PCI_AD21

PCI_AD19
PCI_AD17

PCI_CBE#2
PCI_IRDY#

PCI_SERR#
PCI_PERR#

PCI_CBE#1
PCI_AD14

PCI_AD12
PCI_AD10

PCI_AD8
PCI_AD7

PCI_AD5
PCI_AD3
PCI_AD1

W=30mils W=20mils

0.1U_0402_16V4Z

1

C535

1 1

2 2

3 3

2

1000P_0402_50V7K

PCI_PIRQH#(13,21)

CLK_PCI_MINI

12

R341
10_0402_5%@

1

C546
10P_0402_50V8K@

2

1

2

W=40mils

1000P_0402_50V7K

C538

D16

1

C539

2

21

1

C540

2

0.1U_0402_16V4Z

PCI_AD[0..31]

JP13

1 2

12

KEY KEY

3 4

34

5 6

56

7 8

78

9 10

910

11 12

11 12

13 14

13 14

15 16

15 16

17 18

17 18

19 20

19 20

21 22

21 22

23 24

23 24

25 26

25 26

27 28

27 28

29 30

29 30

31 32

31 32

33 34

33 34

35 36

35 36

37 38

37 38

39 40

39 40

41 42

41 42

43 44

43 44

45 46

45 46

47 48

47 48

49 50

49 50

51 52

51 52

53 54

53 54

55 56

55 56

57 58

57 58

59 60

59 60

61 62

61 62

63 64

63 64

65 66

65 66

67 68

67 68

69 70

69 70

71 72

71 72

73 74

73 74

75 76

75 76

77 78

77 78

79 80

79 80

81 82

81 82

83 84

83 84

85 86

85 86

87 88

87 88

89 90

89 90

91 92

91 92

93 94

93 94

95 96

95 96

97 98

97 98

99 100

99 100

101 102

101 102

103 104

103 104

105 106

105 106

107 108

107 108

109 110

109 110

111 112

111 112

113 114

113 114

115 116

115 116

117 118

117 118

119 120

119 120

121 122

121 122

123 124

123 124

P-TWO_A53921-A0G16-P

0.1U_0402_16V4Z

PCI_AD[0..31] (13,17,21,23,31)

1

C541

2

RINGTIP

+3VS

1

C542

4.7U_0805_10V4Z

2

W=40mils

W=40mils
W=40mils

PCI_GNT#3

WLAN_BT_CLK
PCI_AD30

PCI_AD28
PCI_AD26
PCI_AD24
MINI_IDSEL1

PCI_AD22
PCI_AD20

PCI_AD18
PCI_AD16

PCI_FRAME#
PCI_TRDY#
PCI_STOP#

PCI_DEVSEL#
PCI_AD15

PCI_AD13
PCI_AD11

PCI_AD9
PCI_CBE#0

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

W=40mils

1

C543

0.1U_0402_16V4Z

2

1000P_0402_50V7K

R340

1 2

100_0402_5%

PCI_PAR (13,21,23)

PCI_FRAME# (13,21,23,31)
PCI_TRDY# (13,21,23,31)
PCI_STOP# (13,21,23)

PCI_DEVSEL# (13,21,23)PCI_PERR#(13,21,23)

PCI_CBE#0 (13,21,23,31)

+3VALW

+3VALW+3VS +1.5VS

1

2

MINI1_OFF# (28)
PCI_RST# (13,15,21,23,27,28,31)

+3VALW

SB_SMCLK (10,11,12,14)
SB_SMDATA (10,11,12,14)

2006/03/07

USBP2- (14)

USBP2+ (14)

C534

MINI1@

0.1U_0402_16V4Z

+3VS
+1.5VS

(Change to SP070003200)

4 4

Power

+3VS
+3VALW
+1.5VS

A

Mini Card Power Rating
Primary Power (mA)
Peak Normal
1000
330
500

750
250
375

B

Auxiliary Power (mA)

Normal

250 (wake enable)
5 (Not wake enable)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

D

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

MINI-PCI Slot (WLAN)

HCL51 LA-3211P

星期二, 四月

11, 2006

of

25 43

E

0.4

A

1 1

2 2

B

C

D

E

USB CONN. 1 & 2

+USB_VCCA

+USB_VCCA

1

+

C548
150U_D_6.3VM

2

@

1 2

R489 0_0402_5%

L49

12

12

34

1 2

R490 0_0402_5%

@

USB20_N0_L
USB20_P0_L

+3VALW

12

R342
100K_0402_5%

10K_0402_5%

1 2

R343

USB20_N0

USB20_P0

1

C553

0.1U_0402_16V4Z

2

3 4

WCM2012F2S-900T04_0805

USB_OC2# (14)

USBP0-(14)

USBP0+(14)

3 3

USB_EN#(28,30)

+5VALW

1

C552

4.7U_0805_10V4Z

2

USB_EN#

U18

1
2
3
4

G528_SO8

GND
IN
IN
EN#

OUT
OUT
OUT

+USB_VCCA

8
7
6
5

FLG

W=80mils

1

C550
470P_0402_50V7K

2

2005/09/06

JP15

1
2
3
4

SUYIN_020173MR004S312ZL

ECQ60

1207 DEL

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

NEW CARD SOCKET

11, 2006

HCL51 LA-3211P

E

星期二, 四月

of

26 43

0.4

SUPER I/O SMsC LPC47N207

U21

+3VS
+3VS

1 2

R361 10K_0402_5%FIR@

1 2

R362 10K_0402_5%FIR@

LPC_AD0(13,28)
LPC_AD1(13,28)
LPC_AD2(13,28)
LPC_AD3(13,28)

LPC_DRQ0#(13)

LPC_FRAME#(13,17,28)

PM_CLKRUN#(13,23,25)

SERIRQ(13,21,28)

CLK_PCI_SIO(13)

PCI_RST#(13,15,21,23,25,28,31)

CLK_14M_SIO(12)

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_DRQ#0
LPC_FRAME#
PM_CLKRUN#

SERIRQ
CLK_PCI_SIO
PCI_RST#
CLK_14M_SIO
SIO_PD#
SIO_PME#

64

2
4
7

10
12
24
14
16
19
21
22
23
25
47

LAD0
LAD1
LAD2
LAD3

LPC_CLK_33
LDRQ1#
LDRQ0#
LFRAME#
CLKRUN#
SERIRQ
PCI_CLK
PCIRST#
SIO_14M
LPCPD#
IO_PME#

+3VS

1

C574

FIR@

2

0.1U_0402_16V4Z

+3VS

517314260

3.3V

3.3V

LPC I/F

0.1U_0402_16V4Z

1

C575

FIR@

2

48

VTR

3.3V

3.3V

3.3V

GPIO12/IO_SMI#

GPIO13/IRQIN1
GPIO14/IRQIN2

GPIO

GPIO10
GPIO11

GPIO15
GPIO16
GPIO17
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37

1

C576

FIR@

0.1U_0402_16V4Z

2

27
28
30
32
33
34
35
36
38
39
40
41
43
44
46
61

1 2

R358 10K_0402_5%FIR@

1 2

R360 10K_0402_5%FIR@

+3VS

1207 DEL

CLK_14M_SIO CLK_PCI_SIO

R367
10_0402_5%@

1 2

2

C578

15P_0402_50V8J@

1

1 2

2

1

Place on the BOT side(near MINIPCI conn.)

+5VS

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

JP19

1
2
3
4
5
6
7
8
9

10

ACES_85201-10051

@

For SW debug use when no seial port

63

DLAD0

1

DLAD1

3

DLAD2

6

DLAD3

9

DLPC_CLK_33

11

DLDRQ1#

13

DLFRAME#

15

DCLKRUN#

18

DSER_IRQ

26

DSIO_14M

LPC47N207-JN_STQFP64

FIR@

RTS#1

Base I/O Address
*

R368
33_0402_5%@

C579

22P_0402_50V8J@

0 = 02Eh
1 = 04Eh

DSR#1
CTS#1
RI#1
DCD#1

DLPC I/F

RP23

1 8
2 7
3 6
4 5

4.7K_1206_8P4R_5%

FIR@

RTS1#/SYSOPT0
DTR1#/SYSOPT1

SERIAL I/F

IRMODE/IRRX3

IR

GND0

GND1

GND2

GND3

820293745

+3VS

DRSR1#

GND4

GND5

62

RXD1

TXD1

CTS1#

RI1#

DCD1#

IRTX2

IRRX2

RXD1

52

TXD1

53

DSR#1

54

RTS#1

55

CTS#1

56

DTR#1

57

RI#1

58

DCD#1

59

IRTXOUT

49

IRRX

50

IRMODE

51

1 2

R364 10K_0402_5%FIR@

1 2

R365 10K_0402_5%FIR@

1 2

R366

FIR@

10K_0402_5%

+3VS

C580

FIR@

FIR Module

FIR@

1 2

+3VS

R371
47_1206_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/06/20 2006/06/20

+IR_3VS

1

C581

FIR@

10U_0805_10V4Z

2

Compal Secret Data

W=40mil

1

C582

FIR@

0.1U_0402_16V4Z

2

Deciphered Date

4.7U_0805_10V4Z

+IR_3VS

1

2

2
4
6
8

R369 0_1206_5%
R370 0_1206_5%

IR1

IRED_C
RXD
VCC

GND

TFDU6102-TR3_8P

FIR@

FIR@

1 2

FIR@

1 2

+IR_ANODE

W=60mil

1

IRED_A

3

TXD

5

SD/MODE

7

MODE

Title

Size Document Number Rev

B

星期二, 四月

Date: Sheet

IRTXOUT

T = 12mil

IRMODEIRRX

T = 12mil

Compal Electronics, Inc.

SIO1036 & FIR

HCL51 LA-3211P

11, 2006

of

27 43

0.4

5

KBA[0..19]

ADB[0..7]

L36

1 2

FBM-L11-160808-800LMT_0603

D D

C C

+5VS

+3VALW

+3VALW

B B

+3VS

+5VALW

+5VS

+3VALW

A A

MINI_PME#(23,25)

LAN_PME#(23,25)

PCI_PME#(23,25)

RP24

1 8
2 7
3 6
4 5

4.7K_1206_8P4R_5%

RP25

1 8
2 7
3 6
4 5

10K_1206_8P4R_5%

RP26

1 8
2 7
3 6
4 5

100K_1206_8P4R_5%

1 2

R386 10K_0402_5%

RP27

1 8
2 7
3 6
4 5

4.7K_1206_8P4R_5%

22P_0402_50V8J@

KB_CLK
KB_DATA
PS_CLK
PS_DATA

ARCADE#
FRD#
SELIO#
FSEL#

EMPWR_BTN#
E-MAIL_BTN#
IE_BTN#
USER_BTN#

5IN1_LED#

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

12

R3904.7K_0402_5%

12

R3914.7K_0402_5%

12

R3931K_0402_5%

12

R3951K_0402_5%

12

R3971K_0402_5%

12

R5021K_0402_5%

5

KBA[0..19] (29)
ADB[0..7] (29)

ECAGND

C592

12

CLK_PCI_LPC(13)

+3VALW

TP_CLK

TP_DATA

KBA1
KBA4
KBA5

CRT_DECT

20mil

R372 33_0402_5%@

R375
10K_0402_5%

1 2

EC_PME#

+3VALW

0.1U_0402_16V4Z

12

+3VALW

1 2

R378 100K_0402_5%

1 2

R379 100K_0402_5%

1 2

R380 100K_0402_5%

1 2

R381 100K_0402_5%

1 2

R383 100K_0402_5%

+3VALW

C598 0.1U_0402_16V4Z

12

12

R388 47K_0402_5%

1 2

R394 100K_0402_5%

1 2

R396 1K_0402_5%

1 2

R398 1K_0402_5%

1

C583

2

ENBKL
DPLL_TP
TEST_TP

4

+3VALW

C584

0.1U_0402_16V4Z

LPC_AD0(13,27)
LPC_AD1(13,27)
LPC_AD2(13,27)
LPC_AD3(13,27)

PCI_RST#(13,15,21,23,25,27,31)

SERIRQ(13,21,27)

FRD#(29)

FWR#(29)

FSEL#(29)

TP_CLK(31)

TP_DATA(31)

EC_SCI#(14)

IE_BTN#(30)

ENBKL(8)

BKOFF#(18)

FSTCHG(38)

EC_SMI#(14)

LID_SW#(31)

BT_ON#(30)

SYSON(35)

SUSP#(29,35,40,41)
VR_ON(42)

1

2

12

0.1U_0402_16V4Z

1

C585

C586

2

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

FRD#
FWR#
FSEL#
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

KB_CLK
KB_DATA
PS_CLK
PS_DATA
TP_CLK
TP_DATA

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

EMPWR_BTN#
EC_SCI#

E-MAIL_BTN#

IE_BTN#
ENBKL
BKOFF#

FSTCHG

EC_SMI#
IDE_LED#
USER_BTN#

3GSW_EN#
LID_SW#
BT_ON#
SYSON
SUSP#
VR_ON

BTSW_EN#
PBTN_OUT#

CRT_DECT
CAPS_LED#
NUM_LED#
SATA_LED#

2

C587

1000P_0402_50V7K

1

U22

15

LAD0

14

LAD1

13

LAD2

10

LAD3

9

LFRAME#

165

LRST#/GPIO2C

18

LCLK

7

SERIRQ

25

CLKRUN#/GPIO0C

24

LPCPD#/GPIO0B

150

RD#

151

WR#

173

MEMCS#

152

IOCS#

138

D0

139

D1

140

D2

141

D3

144

D4

145

D5

146

D6

147

D7

124

A0

125

A1/XIOP_TP

126

A2

127

A3

128

A4/DMRP_TP

131

A5/EMWB_TP

132

A6

133

A7

143

A8

142

A9

135

A10

134

A11

130

A12

129

A13

121

A14

120

A15

113

A16

112

A17

104

A18

103

A19

108

A20/GPIO23

105

E51CS#/GPIO20/ISPEN

110

PSCLK1

111

PSDAT1

114

PSCLK2

115

PSDAT2

116

PSCLK3

117

PSDAT3

163

SCL1

164

SDA1

169

SCL2

170

SDA2

8

GPIO04

20

GPIO07

21

GPIO08

22

GPIO09

27

GPIO0D

28

GPIO0E

48

GPIO10

62

GPIO13

63

GPIO14

69

GPIO15

70

GPIO16

75

GPIO17

109

GPIO24

118

GPIO25

119

GPIO26

148

GPIO27

149

GPIO28

155

GPIO29

156

GPIO2A

162

GPIO2B

168

GPIO2D

55

FnLock#/GPIO12

54

CapLock#/GPIO011

23

NumLock#/GPIO0A

41

ScrollLock#/GPIO0F

19

ECRST#

5

GA20/GPIO02

6

KBRST#/GPIO03

31

ECSCI#

1 2

FBM-L11-160808-800LMT_0603

2

C588
1000P_0402_50V7K

1

163445

VCC

VCC

LPC Interface

*

*

X-BUS Interface

PS2 Interface

SMBus

GPIO

*

*

*
*

MISC

VCC

0.1U_0402_16V4Z

1

2

LPC_FRAME#(13,17,27)

3G_LED#(30)

3GSW_EN#
BTSW_EN#
WLSW_EN#

MUSIC_BTN#
MOVIE_BTN#

R384 100K_0402_5%

EC_SMB_CK1(29,37)
EC_SMB_DA1(29,37)
EC_SMB_CK2(4)
EC_SMB_DA2(4)

EMPWR_BTN#(30)

E-MAIL_BTN#(30)

IDE_LED#(20)

USER_BTN#(30)
EC_SWI#(14)

ARCADE#

3GSW_EN#

5IN1_LED#(21)

BTSW_EN#(30)
PBTN_OUT#(14) EC_THERM# (14)

CRT_DECT(19)

CAPS_LED#(30)
NUM_LED#(30) EAPD (32)

SATA_LED#(15)

EC_GA20(14)

EC_KBRST#(14)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

L35

+EC_VCCA

20mil

1

2

ECAGND

1669596

VCC

VCC

VCCA

161

AGND

123

136

157

VCC

VCC

Pulse Width

Wake Up Pin

ENE-KB910-B4

Analog To Digital

Digital To Analog

Expanded I/O

FAN

Timer Pin

GND

GND

GND

GND

GND

GND

173546

122

137

167

20mil

C589

0.1U_0402_16V4Z

159

VCCBAT

BATGND

Internal Keyboard

FAN2PWM/GPOW2/PWM2

FAN1PWM/GPOW7/PWM7

TIN2/FANFB2/GPWU7

GPIO2E/TOUT1/FANFB1

DPLL_TP/GPIO06/FANFB3

TEST_TP/GPIO05/FAN3PWM

E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT

GPOK0/KSO0
GPOK1/KSO1
GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8

GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17

GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4
GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7

GPOW0/PWM0
GPOW1/PWM1

GPOW3/PWM3
GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6

TIN1/GPWU6

GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2
GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7

GPODA0/DA0

GPODA1/DA1

GPODA2/DA2

GPODA3/DA3

GPODA4/DA4

GPODA5/DA5

GPODA6/DA6

GPODA7/DA7

GPIO18/XIO8CS#

*

GPIO19/XIO9CS#

*

GPIO1A/XIOACS#

*
*

GPIO1B/XIOBCS#
GPIO1C/XIOCCS#

*

GPIO1D/XIODCS#

*

GPIO1E/XIOECS#

*

GPIO1F/XIOFCS#

*

TOUT2/GPIO2F
E51IT0/GPIO00

E51IT1/GPIO01

KB910Q B4_LQFP176

0.1U_0402_16V4Z

GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5

XCLKI

XCLKO

KB910 C1 VERSION

2005/06/20 2006/06/20

3

+3VALW

1

1

C590

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154

71
72
73
74
77
78
79
80

32
33
36
37
38
39
40
43

2
26
29
30
44
76
172
176

81
82
83
84
87
88
89
90

99
100
101
102
1
42
47
174

85
86
91
92
93
94
97
98

171
12
11

175
3

4
106
107

158
160

C591
1U_0603_10V4Z

2

2

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

INVT_PWM
BEEP#

ACOFF
EC_ON

EC_LID_OUT#
EC_MUTE

ON/OFF
5WAY_BTN

PM_SLP_S3#
PM_SLP_S5#

EC_PME#

BATT_TEMP
SKU_ID
BATT_OVP

MOVIE_BTN#

MUSIC_BTN#
AD_BID0

DAC_BRIG
IREF

EN_DFAN1

EC_PWROK
PWR_LED

PWR_SUSP_LED#
BATT_GRN_LED#
BATT_AMB_LED#
WL_LED#
BT_LED#
E-MAIL_LED#
MEDIA_LED#

FAN_SPEED1
DPLL_TP
TEST_TP

EC_THERM#

WLSW_EN#
E51_RXD
E51_TXD

CRY2
CRY1

Compal Secret Data

Deciphered Date

Analog Board ID definition,
Please see page 3.

KSO16 (30)
KSO17 (30)

INVT_PWM (18)

BEEP# (32)

ACOFF (36,38)
USB_EN# (26,30)
EC_ON (31)
EC_LID_OUT# (14)
EC_MUTE (33)

ON/OFF (31)

ACIN (14,36)

5WAY_BTN
PM_SLP_S3# (14)
PM_SLP_S5# (14)

BATT_OVP (38)

MOVIE_BTN#

MUSIC_BTN#

POUT (42)
DAC_BRIG (18)
IREF (38)

EN_DFAN1 (34)
WL_OFF# (25)
MINI1_OFF# (25)

EC_PWROK (15)
PWR_LED (30)

PWR_SUSP_LED# (30)
BATT_GRN_LED# (30)
BATT_AMB_LED# (30)
WL_LED# (30)
BT_LED# (30)
E-MAIL_LED# (30)
MEDIA_LED# (30)

FAN_SPEED1 (34)

EC_RSMRST# (14)

WLSW_EN# (30)

2

KSI[0..7]
KSO[0..15]

R387 0_0402_5%
R389 0_0402_5%@

2

For EC Tools

KSI[0..7] (29,30)
KSO[0..15] (29)

ACES_85205-0400@

SKU ID definition,
Please see page 3.

+3VALW +3VALW

R373
100K_0402_5%

Ra

1 2

AD_BID0

1

C593

R376
33K_0402_1%

Rb

2

0.1U_0402_16V4Z

1 2

ECAGND

12

C595 0.01U_0402_16V7K

1 2
1 2

5WAY_BTN

EAPD

R385

100K_0402_5%

10P_0402_50V8K

EAPD

R392

100K_0402_5%

@

Title

Size Document Number Rev

B

Date: Sheet

JP20

1
2
3
4

Rc

1 2

@

Rd

1 2

BATT_TEMP (37)

1

C596

2

32.768KHZ_12.5P_1TJS125DJ2A073

HD_EAPD# (32)

12

Compal Electronics, Inc.

HCL51 LA-3211P

星期二, 四月

1

+3VALW

1

E51_RXD

2

E51_TXD

3
4

R374

100K_0402_5%

SKU_ID

1

R377
0_0402_5%

12

CRY1 CRY2

X2

2

4

1

IN

OUT

NC

NC

3

2

C594

0.1U_0402_16V4Z

10P_0402_50V8K

Change P/N SJ100001V00

+3VS

EC ENE KB910

11, 2006

1

1

2

C597

of

28 43

0.4

+3VALW

C599

1 2

0.1U_0402_16V4Z

FWE#

4

Y

Check PCB Footprint

EC_SMB_CK1(28,37)
EC_SMB_DA1(28,37)

FOR DEBUG ONLY

NB_SUS_STAT#(8,14)

SN74AHCT1G125DCKR_SC70-5

KBA[0..19](28)
ADB[0..7](28)

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

INT_FSEL#

FRD#(28)

FRD#
FWE#

+3VALW

12

R399
100K_0402_5%

U23

2

B

1

A

GVcc

NC7SZ32P5X_NL_SC70-5

3 5

+5VALW

C601 0.1U_0402_16V4Z

1 2

U25

8
7
6
5

AT24C16N10SC-2.7_SO8

+3VALW

2 4

U33

@

VCC
WP
SCL
SDA

1

OE#

AY

GP

3 5

1 3

A0
A1
A2

GND

1207 ADD

1MB Flash ROM

KBA[0..19]
ADB[0..7]

U27

21

A0

20

A1

19

A2

18

A3

17

A4

16

A5

15

A6

14

A7

8

A8

7

A9

36

A10

6

A11

5

A12

4

A13

3

A14

2

A15

1

A16

40

A17

13

A18

37

A19

22

CE#

24

OE#

9

WE#

SST39VF080-70_TSOP40

VCC0
VCC1

RP#

READY/BUSY#

NC0
NC1

GND0
GND1

D0
D1
D2
D3
D4
D5
D6
D7

NC

2

G

D

S

Q16
2N7002_SOT23

+5VALW

1
2
3
4

SB_INT_FLASH_SEL (14)

INT_FLASH_SEL

31
30

ADB0

25

ADB1

26

ADB2

27

ADB3

28

ADB4

32

ADB5

33

ADB6

34

ADB7

35

RESET#

10
11
12
29
38

23
39

FWR# (28)

12

R400
100K_0402_5%

12

R401
100K_0402_5%

SUSP# (28,35,40,41)

EC_FLASH# (14)

+3VALW

1

C619

0.1U_0402_16V4Z

2

1 2

R406 100K_0402_5%

FSEL#(28)

SN74AHCT1G125DCKR_SC70-5

2006/01/23

DEL SB_INT_FLASH_SEL

+3VALW

2006/01/23

+3VALW

2 4

AY

GP

@

3 5

U26

1 2

R405 0_0402_5%

INT_FLASH_EN#

1

OE#

+3VALW

R402 100K_0402_5%@

1 2

R403 22_0402_5%@

12

R404
10K_0402_5%

C602 0.1U_0402_16V4Z@

1 2

1 2

INT_FSEL#FSEL#

1MB ROM Socket

Issued Date

JP22

12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40

SUYIN_80065AR-040G2T@

KBA19KBA13
KBA10
ADB7
ADB6
ADB5
ADB4

ADB3
ADB2
ADB1
ADB0
FRD#

FSEL#
KBA0KBA1

2005/06/20 2006/06/20

+3VALW

Compal Secret Data

Deciphered Date

KBA16 KBA17
KBA15
KBA14

KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
INT_FLASH_EN#
INT_FLASH_SEL
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

KSO15
KSO14
KSO13
KSO12

KSI0
KSO11
KSO10
KSI1

KSI2
KSO9
KSI3
KSO8

C603 100P_0402_50V8J

1 2

C605 100P_0402_50V8J

1 2

C607 100P_0402_50V8J

1 2

C609 100P_0402_50V8J

1 2

C611 100P_0402_50V8J

1 2

C613 100P_0402_50V8J

1 2

C615 100P_0402_50V8J

1 2

C617 100P_0402_50V8J

1 2

C620 100P_0402_50V8J

1 2

C622 100P_0402_50V8J

1 2

C624 100P_0402_50V8J

1 2

C626 100P_0402_50V8J

1 2

INT_KBD Conn.

KSI[0..7]
KSO[0..15]

Title

Size Document Number Rev

B

星期二, 四月

Date: Sheet

KSI[0..7] (28,30)
KSO[0..15] (28)

ACES_85201-24051

C604 100P_0402_50V8J

1 2

C606 100P_0402_50V8J

1 2

C608 100P_0402_50V8J

1 2

C610 100P_0402_50V8J

1 2

C612 100P_0402_50V8J

1 2

C614 100P_0402_50V8J

1 2

C616 100P_0402_50V8J

1 2

C618 100P_0402_50V8J

1 2

C621 100P_0402_50V8J

1 2

C623 100P_0402_50V8J

1 2

C625 100P_0402_50V8J

1 2

C627 100P_0402_50V8J

1 2

JP21

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

(Right)

(Left)

KSO7
KSO6
KSO5
KSO4

KSO3
KSI4
KSO2
KSO1

KSO0
KSI5
KSI6
KSI7

KSO15
KSO14
KSO13
KSO12
KSI0
KSO11
KSO10
KSI1
KSI2
KSO9
KSI3
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSI4
KSO2
KSO1
KSO0
KSI5
KSI6
KSI7

Compal Electronics, Inc.

BIOS, I/O Port & K/B Connector

HCL51 LA-3211P

11, 2006

of

29 43

0.4

+5VALW

+5VS

R414
680_0402_5%

1 2

R415
300_0402_5%@

1 2

94/08/04

PWR_LED(28)

12

21

3

LED8

2 1
3

HT-110UD_1204

LED11

2 1
3

HT-110UYG_1204

@

R412
680_0402_5%

LED9
HT-110UD_1204

BATT_AMB_LED#

3G_LED#

PWR_LED#

13

D

2

G

Q17

S

2N7002_SOT23

WL_LED# (28) BT_LED# (28)

Geneva Grapevine

BATT_AMB_LED# (28)

3G_LED# (28)

+5VS+5VS

12

R413
680_0402_5%

21

3

LED10
HT-110NBQA_BULE_1204

BT_LED#WL_LED#

56

56

1
2
3
4

SW1
HSS110_4P

2005/09/04

KSO16 KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6

VOL_UP

RIGHT

PLAY

STOP

NEXT

REV

LEFT
VOL_DOWN
ENTER

RECORD

WL_SW

1
2
3
4

+5VS

+5VALW

+5VALW

WLSW_EN#

KSI2
KSI3
KSI4
KSI5

KSO16

PLAY
STOP
NEXT
REV

R409
680_0402_5%

1 2

R410
680_0402_5%

1 2

R411
680_0402_5%

1 2

To LED/B Conn.

MEDIA_LED#(28)
CAPS_LED#(28)

NUM_LED#(28)
E-MAIL_LED#(28)
ON/OFFBTN#(31)

E-MAIL_BTN#(28)

IE_BTN#(28)

USER_BTN#(28)

EMPWR_BTN#(28)

WLSW_EN# (28)

KSO17

VOL_UP
VOL_DOWN
ARCADE_TV

LED2

2 1
3

HT-110UYG_1204

LED4

2 1
3

HT-110UD_1204

LED6

2 1
3

HT-110UYG_1204

+5VS

PWR_LED#

PWR_LED#

PWR_SUSP_LED#

BATT_GRN_LED#

JP27

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

GND

3132333435

56

56

1
2
3
4

SW2
HSS110_4P

AZ_SYNC_MDC(14)

AZ_SDIN0_MDC(14)

PWR_SUSP_LED# (28)

BATT_GRN_LED# (28)

+5VALW

C631

0.1U_0402_16V4Z

GND

GND

2
4
6

8
10
12
14
16
18
20
22
24
26
28
30

GND

GND

GND

ACES_88018-304G

36

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

USB20_N4
USB20_P4

USB20_N6
USB20_P6

+5VALW

USB_EN# (26,28)

BT_SW

2006/03/03

1
2
3

BTSW_EN#

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BTSW_EN# (28)

2005/06/20 2006/06/20

ZZZ

MDC

45@

AZ_SDOUT_MDC(14)

AZ_RST_MDC#(14)

100K_0402_5%

BT_ON#(28)

AZ_SDOUT_MDC

R408 33_0402_5%

1 2

AZ_RST_MDC#

@

1 2

R497 0_0402_5%

1 2

12

L52

WCM2012F2S-900T04_0805

1 2

R498 0_0402_5%@

R499 0_0402_5%

1 2

@

WCM2012F2S-900T04_0805

1 2

12

L53

1 2

R500 0_0402_5%@

12

R417

Compal Secret Data

Deciphered Date

AZ_SYNC_MDC

+3VALW

C632

@

0.1U_0402_16V4Z

G

2

2006/01/23

34

34

34

34

1

S

2

Q18
SI2301BDS_SOT23

D

1 3

W=40mils

1

C636

4.7U_0805_10V4Z

2

MDC Conn.

JP24

1

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

GND

GND

GND

1314151617

RES0
RES1

GND3
GND4

IAC_BITCLK

GND

GND

GND

18

Connector for MDC Rev1.5

KSO17(28)
KSI2(28,29)
KSI5(28,29)

KSO16(28)

KSI3(28,29)
KSI4(28,29)

USBP4- (14)

USBP4+ (14)

USBP6- (14)

USBP6+ (14)

2006/01/24

Bluetooth Conn.

C633
1U_0603_10V4Z

+BT_VCC

C637

0.1U_0402_16V4Z

WLAN_BT_DATA(25)

WLAN_BT_CLK(25)

+3VALW

S

1 2

+BT_VCC

G

2

D

Q44

1 3

SI2301BDS_SOT23

AZ_BITCLK_MDC (14)

JP26

1
2
3
4
5
6
7
8
9
10

ACES_85201-10051

SYSON# (35)

+3VALW

1

C628
1U_0603_10V4Z

2

JP28

1
2
3
4
5
6
7
8

ACES_87212-0800

30 43

of

@

R508

0_0603_5%

2
4

20mil

6

3.3V

8
10

AZ_BITCLK_MDC

12

ACES_88018-124G

USBP1+(14)
USBP1-(14)

Title

Size Document Number Rev

B

Date: Sheet

1

C629
22P_0402_50V8J

2

KSO17
KSI2
KSI5
KSO16
KSI3
KSI4

Compal Electronics, Inc.

CD-PLAY / MDC / BT / CIR / LED

HCL51 LA-3211P

星期二, 四月

11, 2006

0.4

A

B

C

D

E

ON/OFF switch

TOP Side

12

J2 JOPEN@

12

J3 JOPEN@

1 1

ON/OFFBTN#(30)

Bottom Side

ON/OFFBTN#

D23

1

DAN202U_SC70

+3VALW

2
3

1 2

Power Button

R419
100K_0402_5%

51ON#

2

C638
1000P_0402_50V7K

1

ON/OFF (28)

51ON# (36)

12

D25
RLZ20A_LL34

Lid Switch

Change P/N : SN111000207

SW3

MPU-101-81_4P

2005/09/04

1

2

3

4

2

1

+3VALW

12

3

D24

@

PSOT24C_SOT23

R418
100K_0402_5%

LID_SW# (28)

13

EC_ON(28)

2 2

EC_ON

R420

10K_0402_5%

1 2

2006/03/07

JP36

@

3 3

ACES_85201-2005

PCI_CBE#0

20

20

PCI_AD6

19

19

PCI_AD4

18

18

PCI_AD2

17

17

PCI_AD0

16

16

PCI_AD1

15

15

PCI_AD3

14

14

PCI_AD5

13

13

PCI_AD7

12

12

PCI_AD8

11

11

PCI_CBE#1

10

10

PCI_CBE#2

9

9

PCI_CBE#3

8

8

7

7

6

6

5

5

4

4

3

3

2

2

PCI_AD9

1

1

PCI_CBE#0 (13,21,23,25)
PCI_AD6 (13,21,23,25)
PCI_AD4 (13,21,23,25)
PCI_AD2 (13,21,23,25)
PCI_AD0 (13,21,23,25)
PCI_AD1 (13,21,23,25)
PCI_AD3 (13,21,23,25)
PCI_AD5 (13,21,23,25)
PCI_AD7 (13,21,23,25)
PCI_AD8 (13,21,23,25)
PCI_CBE#1 (13,21,23,25)
PCI_CBE#2 (13,21,23,25)
PCI_CBE#3 (13,21,23,25)

CLK_PCI_DB (13)

+5VS

PCI_RST# (13,15,21,23,25,27,28)
PCI_FRAME# (13,21,23,25)
PCI_TRDY# (13,21,23,25)
PCI_AD9 (13,21,23,25)

D

Q19

2

G

2N7002_SOT23

S

SW5
EVQPLHA15_4P

3
4

1
2

5

6

Left Right

SW8
EVQPLHA15_4P

BTN_L

+5VS

C642

0.1U_0402_16V4Z

3
4

TP_DATA(28)
TP_CLK(28)

5

+5VS

1
2

6

Scroll Up

SW4

SCRL_U

EVQPLHA15_4P

3
4

5

1
2

6

Scroll Down

SW7
EVQPLHA15_4P

SCRL_D

3
4

1
2

5

6

To TP/B Conn.

JP29

1

TP_DATA
TP_CLK

BTN_R
SCRL_R
SCRL_U
SCRL_L
SCRL_D
BTN_L

2
3
4
5
6
7
8
9
10
11
12

ACES_87151-1207

SCRL_RSCRL_L

BTN_R

BTN_R
SCRL_R
SCRL_U
SCRL_L
SCRL_D
BTN_L
TP_DATA
TP_CLK

Scroll RightScroll Left

SW6
EVQPLHA15_4P

3
4

SW9
EVQPLHA15_4P

3
4

C639 100P_0402_50V8J@
C640 100P_0402_50V8J@
C641 100P_0402_50V8J@
C643 100P_0402_50V8J@
C644 100P_0402_50V8J@
C645 100P_0402_50V8J@
C646 100P_0402_50V8J@
C647 100P_0402_50V8J@

SCRL_R
BTN_R

2

3

D26

@

1
2

5

6

1
2

5

6

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1

2

1

2

1

PSOT24C_SOT23

SCRL_L
SCRL_U

3

D27

@

PSOT24C_SOT23

SCRL_D
BTN_L

3

D28

@

PSOT24C_SOT23

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

D

Date: Sheet

Compal Electronics, Inc.

Power OK, Reset and RTC Circuit, TP

HCL51 LA-3211P

星期二, 四月

11, 2006

E

of

31 43

0.4

A

1 1

2 2

3 3

2005/09/20

BEEP#(28)

PCM_SPK#(21)

SB_SPKR(14)

J4

@

1 2

12

JUMP_43X79
J5

@

1 2

12

JUMP_43X79

1 2

R432 0_0603_5%

1 2

R433 0_0603_5%

1 2

R434 0_0603_5%

1U_0603_10V4Z

1U_0603_10V4Z

1U_0603_10V4Z

GND GNDA

B

C653

1 2

C655

1 2

C656

1 2

2006/03/31

R424

1 2

560_0402_5%

R427

1 2

560_0402_5%

R428

1 2

560_0402_5%

10K_0402_5%

2005/10/26

HD_EAPD#(28)

+VDDA

2

B

12

R429

L40

+VDDA

FBM-L11-160808-800LMT_0603

LINE_L(33)
LINE_R(33)

MIC1_L(33)

SPDIF(33)

C

12

R421
10K_0402_5%

1 2

C648 1U_0603_10V4Z

12

R423
10K_0402_5%

C654

1 2

1U_0603_10V4Z

1

C

E

3

2 1

1 2

Q20
2SC2411K_SC59

D29
RB751V_SOD323

10U_0805_10V4Z

LINE_L
LINE_R

MIC1_L

1 2

R426

2.4K_0402_5%

C660

NBA_PLUG(33)

P/N :SM010012010

1

C728

220P_0402_50V7K

SPDIF

120P_0402_25V8K

C717

2

1

2

@

MONO_IN

1

2

0.1U_0402_16V4Z

12

12

40mil

1

C662

2

LINE_C_L
LINE_C_R
CD_L_RC
CD_R_RC
CD_AGND_RC
MIC1_C_L

MONO_IN

0.1U_0402_16V4Z

1

C661

2

1 2

C663 1U_0603_10V4Z

1 2

C664 1U_0603_10V4Z

1 2

C665 1U_0603_10V4Z@

1 2

C666 1U_0603_10V4Z@

1 2

C667 1U_0603_10V4Z@

1 2

C669 1U_0603_10V4Z

AZ_RST_HD#(14)

AZ_SYNC_HD(14)
AZ_SDOUT_HD(14)
EAPD(28)

FBM-L11-160808-800LMT_0603
L55

FBM-L11-160808-800LMT_0603

L56

D

+5VS

HD Audio Codec

+AVDD_AC97

25

38

U29

AVDD1

AVDD2

14

DGND

15
16
17
23
24
18
20
19
21
22
12

11
10

13
34

47
48

LINE2_L
LINE2_R
MIC2_L
MIC2_R
LINE1_L
LINE1_R
CD_L
CD_R
CD_GND
MIC1_L
MIC1_R
PCBEEP

RESET#
SYNC

5

SDATA_OUT

2

GPIO0

3

GPIO1
SENSE A
SENSE B

SPDIFI/EAPD
SPDIFO

4

DVSS1

7

DVSS2

ALC883-LF_LQFP48

FRONT_OUT_L

FRONT_OUT_R

SIDESURR_OUT_L
SIDESURR_OUT_R

MIC1_VREFO_L

MIC1_VREFO_R

L37

1 2

KC FBM-L11-201209-221LMAT_0805

L38

1 2

KC FBM-L11-201209-221LMAT_0805

20mil

1

SURR_OUT_L

SURR_OUT_R

CEN_OUT

LFE_OUT

BIT_CLK

SDATA_IN
PIN37_VREFO
LINE1_VREFO
LINE2_VREFO

MIC2_VREFO

VREF

JDREF

VAUX

AVSS1
AVSS2

9

DVDD1

0.1U_0402_16V4Z

1

C657

2

0.1U_0402_16V4Z

DVDD2

AMP_LEFT

35

AMP_RIGHT

36
39
41
45
46
43
44

C668 22P_0402_50V8J

6

R430 33_0402_5%

8
37
29
31

10mil

28
32
30

AC97_VREF

27
40
33
26

42

AGND

E

+5VAMP

10U_0805_10V4Z

+3VS_DVDD

1

C658

2

1 2

1 2

MIC1_VREFO_L

12

R431
20K_0402_1%

@

1

C649

2

0.1U_0402_16V4Z

MBK1608301YZF_0603

1

C659
10U_0805_10V4Z

2

10mil

1

2

60mil

1

C650

2

L39

C671
10U_0805_10V4Z

12

+3VS

AMP_LEFT (33)
AMP_RIGHT (33)

AZ_BITCLK_HD (14)

AZ_SDIN3_HD (14)

F

28.7K for Module Design (VDDA = 4.702)

U28

4

VIN

2

DELAY

7 1

ERROR CNOISE

8

SD

SI9182DH-AD_MSOP8

VOUT

SENSE or ADJ

GND

5
6

3

1

2

0.1U_0402_16V4Z

G

(output = 250 mA)

40mil

R422

30K_0402_1%

1 2

C652

12

R425
10K_0402_1%

+VDDA

4.85V

1

C651
10U_0805_10V4Z

2

H

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

E

F

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

HD Audio Codec ALC883
HCL51 LA-3211P

星期二, 四月

11, 2006

G

of

32 43

H

0.4

A

B

C

D

E

+5VAMP

12

R439
10K_0402_5%

VOL_AMP

(0.75V -> 8dB )

1 1

AMP_LEFT(32)

AMP_RIGHT(32)

2 2

3 3

12

R440

2006/03/31

1.8K_0402_5%

C675

0.47U_0603_16V4Z

1 2
1 2

C677

0.47U_0603_16V4Z

1K_0402_5%

HPF Fc = 338Hz

AMP_LEFT_C-1

AMP_RIGHT_C-1

12

R444

@

+5VSPDIF

1 2

C676 1U_0603_10V4Z

1 2

C678 1U_0603_10V4Z

12

R445

@

1K_0402_5%

+5VAMP

S

@

G

SPDIF_PLUG#

2

Q40
SI2301BDS_SOT23

D

1 3

20mil

C674 0.1U_0402_16V4Z

12

12

R443 0_0402_5%

C672

0.1U_0402_16V4Z

VOL_AMP
VOLMAX
NBA_PLUG
AMP_LEFT_C

AMP_RIGHT_C

BYPASS

20mil

1

C679

4.7U_0805_10V4Z

2

NBA_PLUG(32)

+5VAMP

W=40mil

1

2

U30

10

VDD

15

VDD

7

VOLUME

8

VOLMAX

13

SE/BTL#

6

LIN-

3

RIN-

4

BYPASS

APA2068KAI-TRL_SOP16

1

C673

4.7U_0805_10V4Z

2

SHUTDOWN#

LOUT­ROUT­LOUT+

ROUT+

NBA_PLUG

+5VAMP

12

R441
100K_0402_5%

1

MUTE

2

SPKL-

9

SPKR-

16

SPKL+

11

SPKR+

14

5

GND

12

GND

+5VAMP

12

R485
100K_0402_5%

Q41 2N7002_SOT23

13

D

SPDIF_PLUG#

2

G

S

R442

100K_0402_5%

1 2

EC_MUTE

EC_MUTE (28)

47_0603_5%

+

1 2

+

1 2

LINE_R(32)
LINE_L(32)

HPOUT_L_1
HPOUT_R_1

SPKL+

C720 150U_D_6.3VM

SPKR+

C721 150U_D_6.3VM

R482

LINE_R
LINE_L LINE_L_R

SPKL+
SPKL­SPKR+
SPKR-

HPOUT_L_2
HPOUT_R_2

R484
47_0603_5%

1 2

1 2

L43 FBM-11-160808-700T_0603

1 2
1 2

L44 FBM-11-160808-700T_0603

220P_0402_50V7K

R435 0_0603_5%
R436 0_0603_5%
R437 0_0603_5%
R438 0_0603_5%

20mil

Speaker Conn.

330P_0402_50V7K

1 2

L47 FBM-11-160808-700T_0603

1 2

L48 FBM-11-160808-700T_0603

+5VAMP

C685

R483 100K_0402_5%

1

2

1 2
1 2
1 2
1 2

2

C718

1

HPOUT_L_3
HPOUT_R_3

12

SPDIF(32)

+5VSPDIF

LINE_R_R

1

C686

220P_0402_50V7K

2

2

C719
330P_0402_50V7K

1

SPDIF_PLUG#

SPDIF

SPK_L+
SPK_L­SPK_R+
SPK_R-

S/PDIF Out JACK

JP31

1
2
6
3

5
4

7
8

10

9

ACES_20234-0101

LINE-IN JACK

5
4
3

6
2
1

JP30

1
2
3
4

ACES_85204-0400

JP32

SUYIN_010164FR006G118ZL

MIC1_VREFO_L

Int MIC Conn.

2.2K_0402_5%

1 2

L46

220P_0402_50V7K

Compal Secret Data

Deciphered Date

15mil

C

2005/09/06

INT_MIC_L

MIC1_L(32)

2005/06/20 2006/06/20

JP34

1
2

ACES_85204-0200

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

R448

FBM-11-160808-700T_0603

1

C687

2

D

MIC1_L_1

MIC JACK

JP33

5
4
3

6
2
1

SUYIN_010164FR006G118ZL

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

Amplifier & Audio Jack

HCL51 LA-3211P

星期二, 四月

11, 2006

of

33 43

E

0.4

H1

H_S394DD138

@

1

H4

H_R315X394D138

@

1

H3

H_C236D162

1

@

H2

H_R366X394RDD138

@

1

H5

H_C177D177N

@

1

FAN1 Conn

+5VS

+VCC_FAN1

EN_DFAN1(28)

EN_DFAN1

C689 10U_1206_16V4Z

U31

1

VEN

2

VIN

3

VO

4

VSET

G993P1UF_SOP8

FAN_SPEED1(28)

1 2

GND
GND
GND
GND

8
7
6
5

+3VS

12

R451
10K_0402_5%

1

C692
1000P_0402_50V7K

2

40mil

+VCC_FAN1

+5VS

12

D30
1SS355_SOD323

1N4148_SOT23

1 2

10U_1206_16V4Z

1000P_0402_50V7K

D31

C690

1 2

C691

1 2

ACES_85205-03001

JP35

1
2
3

H_TS394X374BR394X374D138

H6

H_C236D162

@

1

H16

H_C158D158N

@

1

H21

H_TS559X295LUBS394X276UD138

@

1

H26

H_O217X157D217X157N

@

1

H7

H_R315D197

1

H23

1

H27

H_TR315X295UBR276X291UD138

1

H_R315D177

@

H_S374X354D138

H_S394D138

@

@

H8

@

1

H13

@

1

H22

@

1

H_TR315X295UBR276X291UD138

H30

@

1

H_R315D177

H_S354X293UD138

FD1

@

1

H9

@

1

H14

H_S394D138

@

1

H19

H_C236D162

@

1

H24

@

1

H28

H_S354X335RUD138

@

1

FD2

FD3

@

@

1

1

H10

H_R315D197

@

1

H15

H_S394X394D138

1

H20

H_C236D162

H25

H_S374X354RD138

1

H_C236D162

FD4

FD5

@

1

1

@

@

1

@

H29

@

1

FD6

@

@

1

CF1

1

CF11

1

CF21

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

CF3

CF2

@

@

CF12

@

@

1

1

CF13

@

@

1

1

CF14

1

1

CF15

@

@

1

1

@

@

@

CF5

CF4

CF7

CF6

1

CF16

1

CF8

@

@

1

1

CF18

CF17

@

@

1

1

Title

Size Document Number Rev

B

Date: Sheet

CF10

CF9

CF19

@

@

1

1

CF20

@

@

1

1

@

@

Compal Electronics, Inc.

FAN & Screw Hole

HCL51 LA-3211P

星期二, 四月

11, 2006

of

34 43

0.4

A

B

C

D

E

+1.8VALW TO +1.8VS

+1.8VALW

Q21

8

D

7

D

C697

6

D

5

D

SI4800BDY_SO8

1

2

0.1U_0603_25V7K

1 1

4.7U_0805_10V4Z

G

S
S
S

1
2
3
4

1

2

+1.8VS

1

C693

2

1U_0402_6.3V4Z

C698

D

Q23

S

1 2

13

2

G

2N7002_SOT23

2

C694
10U_0805_10V4Z

1

R455
100K_0402_5%

SUSP

2

2N7002_SOT23

+5VALW

Q22

8

D

7

C699

D

6

D

5

D

SI4800BDY_SO8

1

2

0.1U_0603_25V7K

R453
470_0603_5%

1 2
13

D

Q24

G

S

4.7U_0805_10V4Z

+5VALW TO +5VS

+5VS

1

S

2

S

3

S

4

G

1

C700

2

Q25

1

C696 4.7U_0805_10V4Z

C695

1U_0603_10V4Z

2

R456

1 2

33K_0402_1%

13

D

2

G

2N7002_SOT23

S

1

2

2006/03/09

SUSP

2N7002_SOT23

R454
470_0603_5%

+VSBP+VSBP

1 2
13

D

Q26

2

G

S

1207 DEL

+1.8VALW TO +1.8V

2 2

4.7U_0805_10V4Z

+1.8VALW +1.8V

Q28

8

D

S

7

D

S

6

D

S

5

D

G

SI4800BDY_SO8

1

C704

2

0.1U_0603_25V7K

1
2
3
4

1

2

1

C702

2

1U_0402_6.3V4Z

C705

Q29

13

D

2N7002_SOT23

S

R461

1 2

100K_0402_5%

SYSON#

2

G

1

C703

4.7U_0805_10V4Z

2

2N7002_SOT23

+VSBP

+5VALW +5VALW

R458
470_0603_5%

1 2
13

D

Q30

2

G

S

SUSP(41)

SUSP#(28,29,40,41)

SUSP SYSON#

R462

10K_0402_5%

1 2

2

G

R459

10K_0402_5%

1 2
13

D

Q31

S

2N7002_SOT23

SYSON#(30)

SYSON(28)

R463

10K_0402_5%

1 2

R460

10K_0402_5%

1 2
13

D

Q32

2

G

S

2N7002_SOT23

3 3

+3VALW TO +3VS

+3VALW +3VS

1
2
3
4

1

2

A

1

C706

2

1U_0402_6.3V4Z

Q34

D

S

Q33

8

S

D

7

S

D

6

S

D

5

G

D

SI4800BDY_SO8

1

C708

4.7U_0805_10V4Z

4 4

2

0.1U_0603_25V7K

C709

1

C707 4.7U_0805_10V4Z

2

R465

1 2

68K_0402_1%

13

2N7002_SOT23

SUSP

2

G

+VSBP

2N7002_SOT23

R464
470_0603_5%

1 2

13

D

Q35

2

G

S

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

+1.2VS +0.9VS

R466
470_0603_5%

1 2
13

D

SUSP SUSP

2

Q36

G

2N7002_SOT23

S

2005/11/01 2006/11/30

Compal Secret Data

R467
470_0603_5%

@

1 2
13

D

Q37

2N7002_SOT23

S

Deciphered Date

2

@

G

D

+1.5VS +1.05VS

R468
470_0603_5%

@

1 2
13

D

SUSP SUSP

2

@

G

Q38

2N7002_SOT23

S

Title

Size Document Number Rev

Custom

Date: Sheet

R469
470_0603_5%

@

1 2
13

D

2

@

2N7002_SOT23

S

G

Q39

Compal Electronics, Inc.

DC-DC INTERFACE

HCL51 LA-3211P

, 11, 2006

星期二 四月

E

of

35 43

0.4

A

PCN1

1

2

G
G

3

PR17

PJ7

PJ1

JUMP_43X118@

PJ3

JUMP_43X118@

PJ5

JUMP_43X118@

JUMP_43X118@

PJ8

JUMP_43X118@

SINGA_2DC-G756I200

@

RLS4148_LLDS2

200_0603_5%

1 2

100K_0402_1%

1 2

22K_0402_1%

PR18

1 2

560_0603_5%

12

12

12

12

12

12

12

12

12

12

A

PD2

PR11

PR12

PR14

RTCVREF

12

12

3.3V

12

1 1

BATT+

2 2

+CHGRTC

3 3

CHGRTCP N1

51ON#(31)

1 2

560_0603_5%

(5A,200mils ,Via NO.= 10)

+5VALWP +5VALW

(5A,200mils ,Via NO.= 10)

+1.8VALWP +1.8VALW

4 4

(8A,320mils ,Via NO.= 16)

+1.05VSP

(5A,200mils ,Via NO.= 10)

ADPIN

12

12

PC7

0.22U_1206_25V7M

3

PC10
10U_0805_6.3V6M

+1.05VS

FBMA-L18-453215-900LMA90T_1812

PC1
1000P_0402_50V7K

PU2 G920AT24U_SOT89

OUT

+1.2VSP +1.2VS+3VALWP +3VALW

12

PC2
100P_0402_50V8J

PQ1

TP0610K-T1-E3_SOT23

2

2

IN

GND

1

PC9

1U_0805_25V4Z

(5A,200mils ,Via NO.= 10)

(2A,80mils ,Via NO.= 4)

(1A,40mils ,Via NO.= 2)

PL1

1 2

13

PR181
200_0603_5%

1 2

12

PJ2

12

JUMP_43X118@

PJ4

12

JUMP_43X118@

PJ6

12

JUMP_43X118@

VIN

1 2

12

12

2 1

12

12

12

12

PC3
1000P_0402_50V7K

PD1
RLS4148_LLDS2

12

PR8

68_1206_5%

PC8

0.1U_0603_25V7K

PD15
RLZ16B_LL34

B

12

1 2

1 2

1 2

VIN

PR13

1K_1206_5%

PR15

1K_1206_5%

PR16

1K_1206_5%

12

PR3

84.5K_0402_1%

12

PR6
20K_0402_1%

PR9

68_1206_5%

VS

VIN

12

PC4
100P_0402_50V8J

PC5

1000P_0402_50V7K

PD4

VIN

12

RLS4148_LLDS2

ACIN

Precharge detector
Min. typ. Max.

PR5

22K_0402_1%

1 2

C

12

PC6

0.1U_0402_16V7K

PR1 1M_0402_1%

3

+

2

-

PR10

10K_0402_1%

12

PR265

100K_0402_5%

H-->L 14.620V 14.853V 15.245V
L-->H 15.534V 15.970V 16.421V

ACOFF(28,38)

DTC115EUA_SC70

PR20

100K_0402_1%

VL

MAINPWON(4,14,37,39)

ACON(38)

+0.9VS+0.9VSP

1 2

PD5

2
3

RB715F_SOT323

PC12

0.1U_0603_25V7K

1

LM393DG_SO8

7

12

1000P_0402_50V7K

NA

2

O

PU1B

PQ58

84

PG

PC13

+

-

13

DTC115EUA_SC70

1 2

2.2M_0402_5%

5
6

12

BATT ONLY

Precharge detector

+1.5VS+1.5VSP

Min. typ. Max.

H-->L 6.169V 6.231V 6.361V
L-->H 7.168V 7.349V 7.537V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2005/11/01 2006/11/30

Compal Secret Data

Deciphered Date

C

1 2

VS

84

PU1A

PG

1

O

LM393DG_SO8

12

RTCVREF

3.3V

PQ60
TP0610K-T1-E3_SOT23

12

PR266

100K_0402_5%

2

PQ59

PR21

PR23

1 2

12

34K_0402_1%

PR24

66.5K_0402_1%@

2N7002-7-F_SOT23-3

PQ2

DTC115EUA_SC70

PD3

RLZ4.3B_LL34

2

12

PR267

100K_0402_5%

13

RTCVREF

12

PR25
191K_0402_1%

13

D

S

PQ3

VS

12

PR2

5.6K_0402_5%

12

1 2

PR4

10K_0402_1%

PACIN

12

PR7
10K_0402_1%

Vin Detector

D

NA

ACIN (14,28)

PACIN (38)

High 18.384 17.901 17.430
Low 17.728 17.257 16.976

13

12

PR19
499K_0402_1%

12

PR22
499K_0402_1%

47K_0402_1%

2

1 2

G

13

Title

Size Document Number Rev

B

Date: Sheet

B+

12

PC11

0.01U_0402_25V7K

NA

PR26

PACIN

2

+5VALWP

Compal Electronics, Inc.

DCIN & DETECTOR

HCL51 LA-3211P

星期

, 11, 2006

二四月

D

36 43

of

0.4

A

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 85 degree C
Recovery at 70 degree C

1 1

BATT++BATT+

PL14

FBMA-L18-453215-900LMA90T_1812

BATT+

12

PC185

0.01U_0402_25V7K

1 2

1000P_0402_50V7K

PC186

PJP2 battery connector

2 2

3 3

SMART

Battery:

1.GND

2.SMC

3.SMD

4.TS

5.B/I

6.ID

7.BATT+

SUYIN_200275MR007G161ZL

12

PJP2

7
6
5
4
3
2
1

BATT++

PR257

100K_0402_5%

1 2

PR258

1K_0402_5%

1 2

PR260

1K_0402_5%

12

PR259
1K_0402_5%

@

12

+3VALWP

6C/8C# (38)

PR261

1K_0402_5%

1 2

6.49K_0402_1%

1 2

1 2

100_0402_5%

1 2

BATT_TEMP

PR262

100_0402_5%
PR263

PR264

BATT_TEMP (28)

+3VALWP

EC_SMB_DA1 (28,29)

EC_SMB_CK1 (28,29)

VL VS

12

PR36

12

0.1U_0603_25V7K

PH1

12

100K_0603_1%_TH11-4H104FT

PR32

61.9K_0402_1%

1 2

10.7K_0402_1%

PC17

1000P_0402_50V7K

PC14

TM_REF1

12

PC18

12

3
2

150K_0402_1%

12

1U_0603_6.3V6M

PR39
150K_0402_1%

+

-

PR37

PR30

442K_0603_1%

1 2

84

PU3A

PG

O

LM393DG_SO8

12

VS

VL

PR27
150K_0402_1%

1 2

1

VL

MAINPWON (4,14,36,39)

84

PU3B

5

PG

+

7

O

6

-

PQ41
TP0610K-T1-E3_SOT23

B+

12

PR182

2

G

100K_0402_1%

PR183

22K_0402_1%

1 2

13

D

PQ42
2N7002-7-F_SOT23-3

S

VL

4 4

POK(39,40)

PR184
100K_0402_1%

1 2

PR185
0_0402_5%

1 2

PC133

0.1U_0402_16V7K

12

A

12

PC131

0.22U_1206_25V7K

13

2

+VSBP

12

PC132

0.1U_0603_25V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2005/06/23 2006/10/22

Compal Secret Data

Deciphered Date

C

LM393DG_SO8

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

BATTERY CONN /OTP

HCL51 LA-3211P

星期

, 11, 2006

二四月

37 43

D

of

0.4

A

B

C

D

E

Charger

Iadp=0~3.117A(65W)

PQ6

AO4407_SO8

PQ8

2

13

ACOFF#

8
7

5

47K

47K

1 3

PQ10
DTC115EUA_SC70

PD18

1 2

1N4148_SOD80
PR248

22K_0402_5%

1 2

VIN

1 1

12

PR235
47K_0402_5%

DTA144EUA_SC70

2

13

D

PQ54

2

2 2

3 3

G

S

RHU002N06_SOT323

PACIN(36)

ACON(36)

P2

1
2
36

4

12

PC167

0.1U_0603_25V7K

PR239

150K_0402_5%

2

G

LI-4S :17.8V--BATT-OVP=1.9758V

PQ7

AO4407_SO8

1
2
3 6

4

12

PR234
200K_0402_1%

1U_0603_10V6K

60.4K_0402_1%
PR238

12

12

PR242

100K_0402_1%

13

D

PQ55

S

RHU002N06_SOT323

8
7

5

PC169

12

1908LDO

12

PC171

0.1U_0402_16V7K

12

IREF(28)

0.1U_0603_25V7K

9.31K_0402_1%

P3

PC165

1SS355_SOD323

PD16

VIN

PC168

0.1U_0603_25V7K

12

PR240

21K_0402_1%

PR245

PR246

100K_0402_1%

FSTCHG(28)

12

12

12

PR44

0.015_2512_1%

213

6C/8C#(37)

12

SI2301DS_SOT23~D

PR241

15K_0402_1%

12

PR249

0_0402_5%

1 2

4

PQ52

12

12

PC176

0.01U_0402_25V7K

BATT-OVP=0.111*BATT+

PR250

FOR 8 CELL& 6 CELL IREF=0.806*Icharge
IREF=3.1V

FOR 4 CELL IREF=0.403*Icharge
IREF=1.55V

2P4S:4800mAH/cell

0.8C=3.84A

100K_0402_5%

1 2

1P4S:2400mAH/cell 0.8C=1.92A

OVP voltage :

4 4

LI-4S :17.8V----BATT-OVP=1.98V

12

G

S

PR237
0_0402_5% @

PR251

10K_0402_5%

7

B+

PC166

0.1U_0603_25V7K

2

13

D

12

0.1U_0402_16V7K

1 2

VS

84

PG

0

FBMA-L18-453215-900LMA90T_1812

1 2

PU4

MAX1908ETI_QFN28

1

DCIN

17

CELLS

4

REF

3

CLS

12

REFIN

15

VCTL

13

ICTL

11

ACOK#

8

SHDN#

10

ACIN

9

ICHG

28

IINP

7

CCV

CCI

NA

6

PR247

10K_0402_1%

1 2

12

12

PC179

0.01U_0402_25V7K

PC181

12

PC182

0.1U_0402_16V7K

PU5B

5

+

6

-

LM358ADR_SO8

PL12

CCS

5

MAX1908-CCS

1 2

PC180

0.01U_0402_25V7K

BATT_OVP(28)

12

charger_DHI

charger_LX

charger_DLO

charger_BST

charger_DLOV

1908LDO

PC163

0.1U_0603_25V7K

1 2

BATT+

12

PC164

PC177
1U_0603_10V6K

1

12

PC161

PC162

4.7U_1206_25V6K

4.7U_1206_25V6K

27

CSSP

26

CSSN

25

DHI

23

LX

21

DLO

24

BST

22

DLOV

2

LDO

19

CSIP

18

CSIN

16

BATT

PGND

GND

20

14

BATT-OVP=0.111*BATT+
LI-3S :13.35V----BATT-OVP=1.98V
BATT-OVP=0.111*BATT+

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2006/06/20

Compal Secret Data

Deciphered Date

12

2200P_0402_50V7K

1 2

PR243 0_0402_5%

84

PG

0

CHG_B+

876

5

DDD

D

SSS

G

123

4

876

5

DDD

D

SSS

G

123

4

12

PR244

33_1206_5%

VS

12

PC183

PU5A

3

+

2

-

LM358ADR_SO8

D

0.01U_0402_25V7K

PQ50

SI4810BDY-T1-E3_SO8

PQ53

SI4810BDY-T1-E3_SO8

1 2

12

PC170

@

1000P_0402_50V7K

PC172

0.1U_0603_25V7K

1 2
12

PD17
1SS355_SOD323

PC178
1U_0805_25V4Z

BATT+

12

PR252
845K_0603_1%

12

PR253

300K_0603_0.1%

12

PR256

200K_0402_1%

PQ5

AO4407_SO8

1
2
3 6

PR236

10K_0402_1%

1 2

4

1 2

13

PL13

8
7

5

PR233

47K_0402_1%

1 2

ACOFF#

PQ51
DTC115EUA_SC70

ACOFF

2

PR58

0.015_2512_1%

213

10U_LF919AS-100M-P3_4.5A_20%

VIN

ACOFF (28,36)

4

12

12

PC173

PC174

4.7U_1206_25V6K

4.7U_1206_25V6K

Charge voltage
3S CC-CV MODE : 12.6V
4S CC-CV MODE : 16.8V

+3VALWP

PR255

511K_0402_1%

1 2

12

PC184

0.01U_0402_25V7K

Title

Size Document Number Rev

B

Date: Sheet

RHU002N06_SOT323

PQ56

13

D

2

G

S

Compal Electronics, Inc.

Charger

星期二, 四月

11, 2006

12

13

D

G

S

E

BATT+

12

PC175

4.7U_1206_25V6K

PR254
10K_0402_5%

2

6C/8C# (37)

RHU002N06_SOT323
PQ57

of

38 43

0.4

5

4

3

2

1

+5V Ipeak = 6.66A ~ 10A

BST_5V

2

D D

PC51

B+++

12

12

PC41

PC39

10U_1206_25VAK

2200P_0402_50V7K

1

+

2

PR83

1 2

PR87

150U_V_6.3VM_R18

0_0402_5%

1 2

DH_5V

12

PL4

10UH_SIQB125-100APF_4.5A_20%

PD12

1 2

VS

RLZ5.1B_LL34

10.5K_0402_1%@

PR75

0_0603_5%

1 2

PQ19

8

G2

7

D1/S2/K

6

D1/S2/K

5

D1/S2/K

S1/A

FDS6900AS_NL_SO8

PR84

1 2

47K_0402_1%

MAINPWON(4,14,36,37)

D2
D2

G1

1
2
3
4

PR172

100K_0402_1%

DH_5V-1

DL_5V

12

12

PC52

0.047U_0603_16V7K

47K_0402_5%

0.1U_0603_25V7K

PR270

1 2

PC49

PR78

0_0603_5%

1 2

0_0402_5%

2VREF_8734

12

PJ12

1 2

B+

12

JUMP_43X118@

C C

+5VALWP

B B

BST_5V-1

12

PR85

LX_5V

FB5

PC54

DAP202U_SOT323

PR72

PC45

VL

12

PC47

4.7U_0805_6.3V6K
PU6

14

BST5

16

DH5

15

LX5

19

DL5

21

OUT5

9

FB5

1

N.C.

6

SHDN#

4

ON5

3

ON3

8

REF

12

0.22U_0603_10V7K

4.7_1206_5%

4.7U_1206_25V6K

PD11

12

12

18

LD05

B+++

GND

23

12

20

V+

PC55

1

PR73

4.7_1206_5%

@

12

13

TON

LDO3

25

12

3

VL

1 2

PC48

0.1U_0603_25V7K

PGOODSKIP#

PRO# VCC

10 17

1 2

4.7U_0805_6.3V6K

BST_3V

12

PC44

47_0402_5%

0.1U_0402_16V7K

PR71

2VREF_8734

PC46

1 2

1U_0603_6.3V6M

ILIM3

5

ILIM3

ILIM5

11

ILIM5

28

BST3

26

DH3

24

DL3

27

LX3

22

OUT3

FB3

MAX8734AEEI+_QSOP28

PR88
0_0402_5%

FB3

7
212

PR76

100K_0402_1%

1 2

PR79

1 2

499K_0402_1%

BST_3V-1
DH_3V-1

LX_3V

POK (37,40)

PR77

1 2

PR80

1 2

PR82

0_0603_5%

+3.3VALWP/+5VALWP

+3.3V Ipeak = 6.66A ~ 10A

B+++

12

PC42

10U_1206_25VAK

100K_0402_1%

PR81

499K_0402_1%

12

PC50

0.1U_0603_25V7K

12

0_0603_5%

1 2

DH_3V

DL_3V

NA

PQ18

1

D2

2

D1/S2/K

D2

3

G1

D1/S2/K

4

D1/S2/K

S1/A

FDS6900AS_NL_SO8

PR86

1 2

6.81K_0402_1%@

PR89

1 2

0_0402_5%

8

G2

7
6
5

12

PL5

10UH_SIQB125-100APF_4.5A_20%

+3VALWP

1

+

PC53
150U_V_6.3VM_R18

2

1U_0603_6.3V6M

12

PC187

0.047U_0603_16V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/11/01 2006/11/30

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

2

Date: Sheet of

星期

+5V/+3V

, 11, 2006

二四月

HCL51 LA-3211P

1

39 43

0.4

12

PC188

A A

5

4

A

B

C

D

+1.8VP O.C.P= 9.68A~15.72A

12

PC57

10U_1206_25V6M

1 1

+1.8V

+1.8VALWP

1.8UH_SIL104R-1R8PF_9.5A_30%

1

+

PC68
220U_D2_4VMR15

2

12

PR100

PR108

12

PC69

0.01U_0402_25V7K

12

2 2

10.5K_0402_1%

10K_0402_1%

PR101

1 2

PR111

1 2

1 2

0_0402_5%

VSE_1.8V

0_0402_5%@

SI4800BDY-T1-E3_SO8

PL7

SI4810BDY-T1-E3_SO8

PQ25

LX_1.8V

PQ27

12

1

PD14

DAP202U_SOT323

876

5

DDD

D

SSS

G

123

4

DH_1.8V-2

876

5

DDD

D

SSS

G

123

4

POK(37,39) SUSP# (28,29,35,41)

PC66

0.1U_0603_25V7K

1 2

PR106

0_0402_5%

0.1U_0402_16V7K@

BST_1.8V-1

1 2

12

0_0603_5%

PR98

1 2

0_0603_5%

PR102

1.96K_0402_1%

1 2

DL_1.8V

PC73

2

PR96

12

PC61

3

0.01U_0402_25V7K

4.7U_0805_6.3V6K

BST_1.2V-1

PC64

12

12

6

5
4

ISE_1.8V ISE_1.2V

7
2

3

9

10

8

15 16
11

12

PR113

80.6K_0402_1%

12

PR94

0_1206_5%

12

PC62

0.1U_0603_25V7K

PU7

SOFT1

BOOT1

UGATE1
PHASE1

ISEN1
LGATE1

PGND1

VOUT1
VSEN1
EN1
PG1 PG2/REF

OCSET1

+5VALW

PR95

2.2_0603_5%

1 2

14

28

VIN

VCC

UGATE2
PHASE2

LGATE2

PGND2

GND

1

OCSET2

DDR

ISL6227CAZ-T_SSOP28

13

SOFT2

BOOT2

ISEN2

VOUT2
VSEN2

EN2

PC65

17

0.01U_0402_25V7K

BST_1.2V-2BST_1.8V-2

23

DH_1.2V-1 DH_1.2V-2DH_1.8V-1

24
25

22
27

26

20
19
21

18

12

PC63

2.2U_0805_10V6K

12

PR97

1 2

0_0603_5%

12

PR112

90.9K_0402_1%

0.1U_0603_25V7K

PR99

1 2

0_0603_5%

PR103
2K_0402_1%

1 2

12

PC67

12

DL_1.2V

1 2

PR107
47K_0402_5%

PC72

0.047U_0402_16V7K

LX_1.2V

10U_1206_25V6M

5

D

G

4

NA

5

D

G

4

12

PC59

876

DDD

PQ26
SI4800BDY-T1-E3_SO8

SSS

123

1.8UH_SIL104R-1R8PF_9.5A_30%

1 2

876

DDD

PQ28
SI4810BDY-T1-E3_SO8

SSS

123

PL8

0_0402_5%

VSE_1.2V

PR109

0_0402_5%@

PR104

1 2

1 2

PJ13

12

JUMP_43X118@

12

PC71

0.01U_0402_25V7K

12

B+

12

PR105

2.21K_0402_1%

12

PR110

6.49K_0402_1%

+1.2V

+1.2VSP

1

+

PC70
220U_D2_2VMR15

2

+1.2VP O.C.P= 8.67A~14.09A

3 3

4 4

Security Classifi c a t i o n

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/11/01 2006/11/30

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

星期

二四月

+1.8V/+1.2V

, 11, 2006

HCL51 LA-3211P

D

of

40 43

0.4

5

4

3

2

1

D D

+5VS

PR117

10K_0402_1%

1 2

PU8

7

PR114

0_0402_5%

0.1U_0402_16V7K@

1 2

PC78

SUSP#(28,29,35,40)

C C

8

12

6

POK

EN

1

12

PC76
1U_0603_6.3V6M

5

VIN

4

VOUT

VCNTL

3

VOUT

2

FB

9

VIN

GND

APL5912-KAC-TRL_SO8

+1.2VSP

12

12

PJ14
JUMP_43X118@

12

PC77
22U_1206_6.3V6M

12

12

12

PC79

0.01U_0402_25V

PR115

316_0402_1%

PR116

1K_0402_1%

12

PC80
22U_1206_6.3V6M

+1.05VSP

1

+

PC81
150U_D2E_6.3VM_R18@

2

+1.8V

B B

+3VS

12

PJ11

12

JUMP_43X79@

PU10

1 6

12

VIN VCNTL

PC87

10U_1206_25VAK

2N7002-7-F_SOT23-3

0.1U_0402_16V7K@

1 2

PR123

0_0402_5%

PC94

SUSP(35)

A A

1.15K_0402_1%

PQ38

13

D

2

G

S

12

PR124

PR127

1K_0402_1%

12

12

PC92

0.1U_0402_16V7K

12

3
4

12

PC93
10U_1206_25VAK

VREF
VOUT

G2992_SO8

+1.5VSP

52

NCGND

7

NC

8

NC

9

TP

+5VALWP

12

PC91
1U_0603_6.3V6M

SUSP

0.1U_0402_16V7K@

10U_1206_25VAK

2N7002-7-F_SOT23-3

1 2

PR125
0_0402_5%

PC97

PC88

12

PQ31

12

PJ10

12

JUMP_43X118@

PU9

1 6

12

13

D

2

G

S

PR122

1K_0402_1%

PR126

1K_0402_1%

12

12

PC95

0.1U_0402_16V7K

12

3
4

12

PC96
10U_1206_25VAK

VREF
VOUT

G2992_SO8

+0.9VSP

VIN VCNTL

52

NCGND

7

NC

8

NC

9

TP

12

PC89
1U_0603_6.3V6M

+5VALWP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/06/23 2006/10/22

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

2

Date: Sheet

+1.05V/+1.5V/+0.9V

HCL51 LA-3211P

,

星期二

11, 2006

四月

0.4

of

1

41 43

5

4

3

2

1

+5VS

PR186

12

D D

PR189

13K_0402_1%@

NTC

0_0402_5%

PR190

1 2

PR191 0_0402_5%
PR193 0_0402_5%
PR194 0_0402_5%
PR195 0_0402_5%
PR197 0_0402_5%
PR199 0_0402_5%
PR200 0_0402_5%

C C

PR205 499_0402_1%
PR206 0_0402_5%
PR208 0_0402_5%

DPRSLPVR(4,13)
H_DPRSTP#(4)

+3VS

CPU_VID0(5)
CPU_VID1(5)
CPU_VID2(5)
CPU_VID3(5)
CPU_VID4(5)
CPU_VID5(5)
CPU_VID6(5)

H_PSI#(5)

1 2

1 2

1 2

1 2

12
12
12
12
12
12

1 2

VCC

PR204 71.5K_0402_1%

1 2

12
12

PC145470P_0402_50V8J

PC147 0.22U_0603_16V7K

PR212

PR216

0_0402_5%

VGATE(15)

CLK_EN#(12)

1 2

PR219

1 2

0_0402_5%@

B B

2K_0402_1%@

1 2

VR_ON(28)

H_PROCHOT#(4,14)

POUT(28)

2K_0402_1%@

1 2

1 2

PR221

0_0402_5%

PR225 0_0402_5%@

PR213

PR222
10K_0402_5%@

1 2

56_0402_5%

1 2

1 2

PC158

0.1U_0402_16V7K

1 2

+3VS

12

PR224

PR226 10K_0402_5%

5VS1

PR187
10_0402_5%

PC142
1U_0603_6.3V6M

1 2

PU11

19

Vcc

6

THRM

31 30

D0 BST1

32

D1

33

D2

34

D3

35

D4

36

D5

37

D6

7

TIME

9

CCV

39

DPRSLPVR

40

DPRSTP

3

PSI

2

PWRGD

1

CLKEN

38

SHDN

5

VRHOT

4

POUT

MAX8770GTL+_TQFN40

VSSENSE(5)

12

0_1206_5%

PC141

2.2U_0603_6.3V6K

VDD
TON

DH1

LX1

DL1

PGND1

GND

CSP1

CSN1

FB

CCIREF

DH2

BST2

LX2

DL2

PGND2

CSP2
CSN2
GNDS

PC151

1000P_0402_50V7K

VSSENSE

12

12

PR188

1 2

25
8

29
28
26

200K_0402_5%

0_0603_5%

BST1_CPU BSTM1_CPU

PR192

1 2

DH1__CPU-1
LX1__CPU
DL1__CPU

27
18

CSP1__CPU

17

CSN1_CPU

16

FB_CPU

12

CCI_CPU

1011

DH2_CPU-1

21

BST2_CPU

20

LX2_CPU

22

DL2__CPU

24
23

CSP2_CPU

14

CSN2__CPU

15
13

1 2

PR223

100_0402_5%

@10_0402_5%

PR227

1 2

12

PC134

0.01U_0402_25V7K

0.22U_0603_16V7K

PR211

0_0603_5%

1 2

BSTM2_CPU

12

PC152

0.22U_0603_16V7K

PC143

1 2

PR269 2.2_0603_5%

1 2

PR268 2.2_0603_5%

1 2

PQ44

FDS6676AS_SO8

PR210 3K_0603_1%@

PR214 3.65K_0402_1%

1 2

PR217

NTC

3K_0603_1%@

1 2

PR220

20K_0402_1%

DH2_CPU-2

DH1__CPU-2

5

D

1 2

1 2

5

D

PQ49

2

FDS6676AS_SO8

CPU_B+

12

PC136

PC137

12

PC138

12

12

PC139

0.1U_0603_25V7K

10U_1206_25VAK

10U_1206_25VAK

PQ43
SI7840DP-T1-E3_SO8

3 5

241

876

5

876

DDD

SSG

S

134

2

DDD

D

PQ45

2

FDS6676AS_SO8

4.7_1206_5%

PR196

SSG

S

134

DL1__CPU

PR209 0_0402_5%

1 2

10U_1206_25VAK

PL10

P_0.36H_ETQP4LR36WFC_24A_20%

12

PR198

3.48K_0402_1%

2.1K_0402_1%

1 2

PR202

1 2

12

1 2

PC144

PC146 0.22U_0603_16V7K

680P_0603_50V7K

PC148 0.022U_0402_16V7K@

1 2

PL9

FBM-L11-322513-201LMAT_1210

12

PC140

2200P_0402_50V7K

12

NTC

10K_0603_5%

PR203

1 2

CPU_VCC_SENSE

1 2

PR215 100_0402_5%

1 2

PR218
3K_0603_1%@

1 2

PC149
4700P_0402_25V7K

1 2

PC150

470P_0402_50V8J

12

PQ47
SI7840DP-T1-E3_SO8

3 5

241

12

876

PQ48

FDS6676AS_SO8

5

DDD

D

4.7_1206_5%

PR228

SSG

S

134

2

12

876

DDD

SSG

S

134

PC159

DL2__CPU

680P_0603_50V7K

12

PC154

PC153

10U_1206_25VAK

P_0.36H_ETQP4LR36WFC_24A_20%

12

PR229

2.1K_0402_1%

PR230

3.48K_0402_1%

1 2

PC155

10U_1206_25VAK

PL11

10U_1206_25VAK

12

PC156

12

10K_0603_5%

1 2

B+

12

1

+

PC135

100U_25V_M

2

+CPU_CORE

12

VCCSENSE(5)

PR201 10_0402_5%

1 2

CPU_B+

12

PC157

0.1U_0603_25V7K
2200P_0402_50V7K

NTC

PR231

+CPU_CORE

PR207 0_0402_5%

12

1 2

A A

PR232 0_0402_5%

1 2

PC160 0.22U_0603_16V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/06/20 2006/06/20

3

Compal Secret Data

Deciphered Date

Compal Electronics, I n c.

Title

Size Document Number Rev

Custom

2

Date: Sheet

星期二, 四月

+CPU_CORE

11, 2006

0.4

of

42 43

1

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1

for PWR

Reason for change Rev. PG# Modify List VER PhaseFixed IssueItem

1

D D

For EMI require CPU core change from 0 to 2.2

42 MODIFY PR268/PR269 FROM 0 TO 2.2 DVT

2

3

modify 1.2V sequence(HW require) change PR107 from 0 to 1k ;add PC72: :0.01uF

modify 1.2V sequence(HW requir e) 40

40 DVT

change PR107 from 1K to 47K ;change PC72: : from

0.01uF to 0.047uF

PVT

4

5

6

C C

7

8

9

10

11

B B

8

9

A A

Title

Size Document Number Rev

5

4

3

2

Date: Sheet

Compal Electronics, Inc.

PIR (PWR)

星期二, 四月

11, 2006

1

43 43

of

0.4